ipq60xx: rework cpufreq support

Some cost down devices like jdc
do not have the pmic chips.

target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-360v6.dts

@@ -4,7 +4,7 @@
 
 #include "ipq6018-512m.dtsi"
 #include "ipq6018-ess.dtsi"
-#include "ipq6018-opp.dtsi"
+#include "ipq6018-mp5496.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
@@ -86,6 +86,10 @@
 	status = "okay";
 };
 
+&qpic_bam {
+	status = "okay";
+};
+
 &qpic_nand {
 	status = "okay";
 

target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-ax18.dts

@@ -4,7 +4,6 @@
 
 #include "ipq6018-256m.dtsi"
 #include "ipq6018-ess.dtsi"
-#include "ipq6000-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>

target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-glinet.dtsi

@@ -2,7 +2,6 @@
 
 #include "ipq6018-512m.dtsi"
 #include "ipq6018-ess.dtsi"
-#include "ipq6000-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>

target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-mr7350.dts

@@ -4,7 +4,7 @@
 
 #include "ipq6018-512m.dtsi"
 #include "ipq6018-ess.dtsi"
-#include "ipq6018-opp.dtsi"
+#include "ipq6018-mp5496.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>

target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-xiaomi.dtsi

@@ -4,7 +4,7 @@
 
 #include "ipq6018-512m.dtsi"
 #include "ipq6018-ess.dtsi"
-#include "ipq6018-opp.dtsi"
+#include "ipq6018-mp5496.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>

target/linux/qualcommax/patches-6.1/0134-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch

@@ -1,15 +0,0 @@
---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -173,6 +173,12 @@
- 						regulator-max-microvolt = <1062500>;
- 						regulator-always-on;
- 					};
-+
-+					ipq6018_l2: l2 {
-+						regulator-min-microvolt = <1800000>;
-+						regulator-max-microvolt = <3300000>;
-+						regulator-always-on;
-+					};
- 				};
- 			};
- 		};

target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch

@@ -1,6 +1,6 @@
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -477,6 +477,26 @@
+@@ -471,6 +471,26 @@
  			};
  		};
  

target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch

@@ -13,7 +13,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -358,6 +358,16 @@
+@@ -352,6 +352,16 @@
  			clock-names = "core";
  		};
  
@@ -30,7 +30,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  		cryptobam: dma-controller@704000 {
  			compatible = "qcom,bam-v1.7.0";
  			reg = <0x0 0x00704000 0x0 0x20000>;
-@@ -1043,6 +1053,113 @@
+@@ -1037,6 +1047,113 @@
  		};
  	};
  

target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch

@@ -1,184 +1,55 @@
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -41,8 +41,6 @@
+@@ -42,7 +42,6 @@
- 			next-level-cache = <&L2_0>;
  			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
  			clock-names = "cpu";
--			operating-points-v2 = <&cpu_opp_table>;
+ 			operating-points-v2 = <&cpu_opp_table>;
 -			cpu-supply = <&ipq6018_s2>;
  		};
  
  		CPU1: cpu@1 {
-@@ -53,8 +51,6 @@
+@@ -54,7 +53,6 @@
- 			next-level-cache = <&L2_0>;
  			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
  			clock-names = "cpu";
--			operating-points-v2 = <&cpu_opp_table>;
+ 			operating-points-v2 = <&cpu_opp_table>;
 -			cpu-supply = <&ipq6018_s2>;
  		};
  
  		CPU2: cpu@2 {
-@@ -65,8 +61,6 @@
+@@ -66,7 +64,6 @@
- 			next-level-cache = <&L2_0>;
  			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
  			clock-names = "cpu";
--			operating-points-v2 = <&cpu_opp_table>;
+ 			operating-points-v2 = <&cpu_opp_table>;
 -			cpu-supply = <&ipq6018_s2>;
  		};
  
  		CPU3: cpu@3 {
-@@ -77,8 +71,6 @@
+@@ -78,7 +75,6 @@
- 			next-level-cache = <&L2_0>;
  			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
  			clock-names = "cpu";
--			operating-points-v2 = <&cpu_opp_table>;
+ 			operating-points-v2 = <&cpu_opp_table>;
 -			cpu-supply = <&ipq6018_s2>;
  		};
  
  		L2_0: l2-cache {
-@@ -94,54 +86,6 @@
+@@ -113,6 +109,13 @@
+ 			clock-latency-ns = <200000>;
  		};
- 	};
  
--	cpu_opp_table: opp-table-cpu {
--		compatible = "operating-points-v2-kryo-cpu";
--		nvmem-cells = <&cpu_speed_bin>;
--		opp-shared;
--
--		opp-864000000 {
--			opp-hz = /bits/ 64 <864000000>;
--			opp-microvolt = <725000>;
--			opp-supported-hw = <0xf>;
--			clock-latency-ns = <200000>;
--		};
--
--		opp-1056000000 {
--			opp-hz = /bits/ 64 <1056000000>;
--			opp-microvolt = <787500>;
--			opp-supported-hw = <0xf>;
--			clock-latency-ns = <200000>;
--		};
--
--		opp-1320000000 {
--			opp-hz = /bits/ 64 <1320000000>;
--			opp-microvolt = <862500>;
--			opp-supported-hw = <0x3>;
--			clock-latency-ns = <200000>;
--		};
--
--		opp-1440000000 {
--			opp-hz = /bits/ 64 <1440000000>;
--			opp-microvolt = <925000>;
--			opp-supported-hw = <0x3>;
--			clock-latency-ns = <200000>;
--		};
--
--		opp-1608000000 {
--			opp-hz = /bits/ 64 <1608000000>;
--			opp-microvolt = <987500>;
--			opp-supported-hw = <0x1>;
--			clock-latency-ns = <200000>;
--		};
--
--		opp-1800000000 {
--			opp-hz = /bits/ 64 <1800000000>;
--			opp-microvolt = <1062500>;
--			opp-supported-hw = <0x1>;
--			clock-latency-ns = <200000>;
--		};
--	};
--
- 	pmuv8: pmu {
- 		compatible = "arm,cortex-a53-pmu";
- 		interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
---- /dev/null
-+++ b/arch/arm64/boot/dts/qcom/ipq6000-opp.dtsi
-@@ -0,0 +1,46 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+/ {
-+	cpu_opp_table: opp-table-cpu {
-+		compatible = "operating-points-v2-kryo-cpu";
-+		nvmem-cells = <&cpu_speed_bin>;
-+		opp-shared;
-+
-+		opp-864000000 {
-+			opp-hz = /bits/ 64 <864000000>;
-+			opp-microvolt = <725000>;
-+			opp-supported-hw = <0xf>;
-+			clock-latency-ns = <200000>;
-+		};
-+
-+		opp-1056000000 {
-+			opp-hz = /bits/ 64 <1056000000>;
-+			opp-microvolt = <787500>;
-+			opp-supported-hw = <0xf>;
-+			clock-latency-ns = <200000>;
-+		};
-+
 +		opp-1200000000 {
 +			opp-hz = /bits/ 64 <1200000000>;
 +			opp-microvolt = <850000>;
 +			opp-supported-hw = <0x4>;
 +			clock-latency-ns = <200000>;
 +		};
-+	};
-+};
-+
-+&CPU0 {
-+	operating-points-v2 = <&cpu_opp_table>;
-+};
-+
-+&CPU1 {
-+	operating-points-v2 = <&cpu_opp_table>;
-+};
-+
-+&CPU2 {
-+	operating-points-v2 = <&cpu_opp_table>;
-+};
-+
-+&CPU3 {
-+	operating-points-v2 = <&cpu_opp_table>;
-+};
---- /dev/null
-+++ b/arch/arm64/boot/dts/qcom/ipq6018-opp.dtsi
-@@ -0,0 +1,78 @@
-+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-+
-+/ {
-+	cpu_opp_table: opp-table-cpu {
-+		compatible = "operating-points-v2-kryo-cpu";
-+		nvmem-cells = <&cpu_speed_bin>;
-+		opp-shared;
-+
-+		opp-864000000 {
-+			opp-hz = /bits/ 64 <864000000>;
-+			opp-microvolt = <725000>;
-+			opp-supported-hw = <0xf>;
-+			clock-latency-ns = <200000>;
-+		};
-+
-+		opp-1056000000 {
-+			opp-hz = /bits/ 64 <1056000000>;
-+			opp-microvolt = <787500>;
-+			opp-supported-hw = <0xf>;
-+			clock-latency-ns = <200000>;
-+		};
-+
-+		opp-1320000000 {
-+			opp-hz = /bits/ 64 <1320000000>;
-+			opp-microvolt = <862500>;
-+			opp-supported-hw = <0x3>;
-+			clock-latency-ns = <200000>;
-+		};
-+
-+		opp-1440000000 {
-+			opp-hz = /bits/ 64 <1440000000>;
-+			opp-microvolt = <925000>;
-+			opp-supported-hw = <0x3>;
-+			clock-latency-ns = <200000>;
-+		};
 +
+ 		opp-1320000000 {
+ 			opp-hz = /bits/ 64 <1320000000>;
+ 			opp-microvolt = <862500>;
+@@ -127,6 +130,13 @@
+ 			clock-latency-ns = <200000>;
+ 		};
+ 
 +		opp-1512000000 {
 +			opp-hz = /bits/ 64 <1512000000>;
 +			opp-microvolt = <937500>;
@@ -186,38 +57,65 @@
 +			clock-latency-ns = <200000>;
 +		};
 +
-+		opp-1608000000 {
+ 		opp-1608000000 {
-+			opp-hz = /bits/ 64 <1608000000>;
+ 			opp-hz = /bits/ 64 <1608000000>;
-+			opp-microvolt = <987500>;
+ 			opp-microvolt = <987500>;
-+			opp-supported-hw = <0x1>;
+@@ -164,16 +174,6 @@
-+			clock-latency-ns = <200000>;
+ 			rpm_requests: rpm-requests {
+ 				compatible = "qcom,rpm-ipq6018";
+ 				qcom,glink-channels = "rpm_requests";
+-
+-				regulators {
+-					compatible = "qcom,rpm-mp5496-regulators";
+-
+-					ipq6018_s2: s2 {
+-						regulator-min-microvolt = <725000>;
+-						regulator-max-microvolt = <1062500>;
+-						regulator-always-on;
+-					};
+-				};
+ 			};
+ 		};
+ 	};
+--- /dev/null
++++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
+@@ -0,0 +1,39 @@
++// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
++
++&rpm_requests {
++	regulators {
++		compatible = "qcom,rpm-mp5496-regulators";
++
++		ipq6018_s2: s2 {
++			regulator-min-microvolt = <725000>;
++			regulator-max-microvolt = <1062500>;
++			regulator-always-on;
 +		};
 +
-+		opp-1800000000 {
++		ipq6018_l2: l2 {
-+			opp-hz = /bits/ 64 <1800000000>;
++			regulator-min-microvolt = <1800000>;
-+			opp-microvolt = <1062500>;
++			regulator-max-microvolt = <3300000>;
-+			opp-supported-hw = <0x1>;
++			regulator-always-on;
-+			clock-latency-ns = <200000>;
 +		};
 +	};
 +};
 +
++&sdhc {
++	vqmmc-supply = <&ipq6018_l2>;
++};
++
 +&CPU0 {
-+	operating-points-v2 = <&cpu_opp_table>;
 +	cpu-supply = <&ipq6018_s2>;
 +};
 +
 +&CPU1 {
-+	operating-points-v2 = <&cpu_opp_table>;
 +	cpu-supply = <&ipq6018_s2>;
 +};
 +
 +&CPU2 {
-+	operating-points-v2 = <&cpu_opp_table>;
 +	cpu-supply = <&ipq6018_s2>;
 +};
 +
 +&CPU3 {
-+	operating-points-v2 = <&cpu_opp_table>;
 +	cpu-supply = <&ipq6018_s2>;
 +};