From 8fe0636b8af76b7ecc652e4cff83206fb0cd9097 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Mon, 23 Apr 2018 18:50:49 +0800 Subject: [PATCH] Merge branch 'master' of github.com:lede-project/source --- 4m.config | 5378 ----- config/Config-build.in | 2 +- config/Config-devel.in | 9 +- config/Config-images.in | 57 +- config/Config-kernel.in | 9 +- feeds.conf.default | 4 +- include/feeds.mk | 2 - include/hardened-ld-pie.specs | 2 + include/hardening.mk | 7 + include/host-build.mk | 1 + include/image-commands.mk | 29 +- include/image.mk | 21 +- include/kernel-build.mk | 6 +- include/kernel-defaults.mk | 1 - include/kernel-version.mk | 23 +- include/kernel.mk | 6 +- include/netfilter.mk | 5 +- include/package-defaults.mk | 2 +- include/prereq-build.mk | 12 +- include/prereq.mk | 3 +- include/rootfs.mk | 20 +- include/target.mk | 9 +- include/u-boot.mk | 4 +- include/version.mk | 66 +- package/Makefile | 3 +- package/base-files/Makefile | 10 +- .../files/etc/hotplug.d/net/00-sysctl | 2 +- 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target/linux/brcm63xx/dts/spw303v.dts | 33 +- target/linux/brcm63xx/dts/spw500v.dts | 33 +- target/linux/brcm63xx/dts/td-w8900gb.dts | 33 +- target/linux/brcm63xx/dts/usr9108.dts | 33 +- target/linux/brcm63xx/dts/v2110.dts | 33 +- target/linux/brcm63xx/dts/v2500v-bb.dts | 33 +- target/linux/brcm63xx/dts/vg50.dts | 6 +- target/linux/brcm63xx/dts/vh4032n.dts | 33 +- target/linux/brcm63xx/dts/vr-3025u.dts | 33 +- target/linux/brcm63xx/dts/vr-3025un.dts | 33 +- target/linux/brcm63xx/dts/vr-3026e.dts | 33 +- target/linux/brcm63xx/dts/wap-5813n.dts | 33 +- target/linux/brcm63xx/image/bcm63xx.mk | 6 +- ...PS-BCM63XX-add-clkdev-lookup-support.patch | 210 + ...vide-periph-clock-as-refclk-for-uart.patch | 84 + ...-use-refclk-for-the-expected-clock-n.patch | 26 + ...rt-allow-naming-clock-in-device-tree.patch | 55 + ...e-the-HSSPI-PLL-HZ-into-its-own-cloc.patch | 62 + ...vide-enet-clocks-as-enet-to-the-ethe.patch | 60 + ...M63XX-split-out-swpkt_sar-usb-clocks.patch | 105 + ...-08-bcm63xx_enet-correct-clock-usage.patch | 101 + ...not-write-to-random-DMA-channel-on-B.patch | 29 + ...63xx_enet-do-not-rely-on-probe-order.patch | 41 + ...-managed-functions-for-clock-ioremap.patch | 150 + ...net-drop-unneeded-NULL-phy_clk-check.patch | 36 + ...bcm63xx_enet-remove-unneeded-include.patch | 22 + ...enet-just-use-enet-as-the-clock-name.patch | 39 + ...-platform-data-for-dma-channel-numbe.patch | 72 + ...x_enet-remove-pointless-mac_id-check.patch | 25 + ...-platform-device-id-directly-for-mii.patch | 46 + ...63XX-add-USB-host-clock-enable-delay.patch | 28 + ...-USB-device-clock-enable-delay-to-cl.patch | 41 + ...e-code-touching-the-USB-private-regi.patch | 151 + ...-OHCI-EHCI-configuration-bits-to-com.patch | 169 + ...roduce-BCM63XX_OHCI-configuration-sy.patch | 62 + ...-support-for-the-on-chip-OHCI-contro.patch | 138 + ...ister-OHCI-controller-if-board-enabl.patch | 36 + ...roduce-BCM63XX_EHCI-configuration-sy.patch | 62 + ...-support-for-the-on-chip-EHCI-contro.patch | 137 + ...ister-EHCI-controller-if-board-enabl.patch | 36 + ...I-controller-does-not-support-overcu.patch | 24 + ..._table-parsing-for-partition-parsers.patch | 79 + ...move-imagetag-parsing-to-its-own-par.patch | 481 + ...2-mtd-bcm63xxpart-add-of_match_table.patch | 37 + ...xx_imagetag-add-of_match_table-suppo.patch | 37 + .../130-pinctrl-add-bcm63xx-base-code.patch | 226 + ...d-BCM6328-pincontroller-binding-docu.patch | 78 + ...-add-a-pincontrol-driver-for-BCM6328.patch | 495 + ...d-BCM6348-pincontroller-binding-docu.patch | 49 + ...-add-a-pincontrol-driver-for-BCM6348.patch | 432 + ...d-BCM6358-pincontroller-binding-docu.patch | 61 + ...-add-a-pincontrol-driver-for-BCM6358.patch | 436 + ...d-BCM6362-pincontroller-binding-docu.patch | 96 + ...-add-a-pincontrol-driver-for-BCM6362.patch | 733 + ...d-BCM6368-pincontroller-binding-docu.patch | 84 + ...-add-a-pincontrol-driver-for-BCM6368.patch | 620 + ...d-BCM63268-pincontroller-binding-doc.patch | 106 + ...add-a-pincontrol-driver-for-BCM63268.patch | 736 + ...low-limiting-ports-for-ehci-platform.patch | 66 + ...e-device-registration-code-into-its-.patch | 492 + ...s-a-mac-addresss-allocator-to-board-.patch | 100 + .../patches-4.14/309-cfe_version_mod.patch | 27 + .../310-cfe_simplify_detection.patch | 20 + .../311-bcm63xxpart_use_cfedetection.patch | 51 + ...ort-for-bcm6345-style-periphery-irq-.patch | 455 + ...ort-for-bcm6345-style-external-inter.patch | 394 + ...22-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch | 695 + ...e-up-BCM6358-s-external-interrupts-4.patch | 57 + ...BCM63XX-add-a-new-cpu-variant-helper.patch | 77 + ...MIPS-BCM63XX-define-variant-id-field.patch | 23 + ...MIPS-BCM63XX-detect-BCM6328-variants.patch | 68 + ...MIPS-BCM63XX-detect-BCM6362-variants.patch | 46 + ...MIPS-BCM63XX-detect-BCM6368-variants.patch | 48 + ...-BCM63XX-fix-PCIe-memory-window-size.patch | 20 + ...amically-set-the-pcie-memory-windows.patch | 70 + .../337-MIPS-BCM63XX-widen-cpuid-field.patch | 56 + ...MIPS-BCM63XX-increase-number-of-IRQs.patch | 39 + ...IPS-BCM63XX-add-support-for-BCM63268.patch | 737 + ...CM63XX-add-pcie-support-for-BCM63268.patch | 55 + ...MIPS-BCM63XX-add-support-for-BCM6318.patch | 697 + ...IPS-BCM63XX-split-PCIe-reset-signals.patch | 156 + ...BCM63XX-add-PCIe-support-for-BCM6318.patch | 333 + ...ect-flash-type-early-and-store-the-r.patch | 74 + ...ixup-mapped-SPI-flash-access-on-boot.patch | 84 + ...-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch | 44 + .../347-MIPS-BCM6318-USB-support.patch | 124 + ...-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch | 71 + ...IPS-BCM63XX-add-BCM63268-USB-support.patch | 117 + ...63XX-support-settings-num-usbh-ports.patch | 108 + .../351-set-board-usbh-ports.patch | 10 + ...ow-building-support-for-more-than-on.patch | 96 + ...ow-board-implementations-to-force-fl.patch | 61 + ...e-fallback-sprom-support-into-its-ow.patch | 188 + ...63XX-use-platform-data-for-the-sprom.patch | 95 + ...BCM63XX-make-fallback-sprom-optional.patch | 140 + ...M63XX-allow-different-types-of-sprom.patch | 66 + ...S-BCM63XX-add-support-for-raw-sproms.patch | 517 + ...-raw-fallback-sproms-for-most-common.patch | 181 + ...o-register-a-fallback-sprom-for-bcma.patch | 128 + ...M63XX-add-BCMA-based-sprom-templates.patch | 303 + ...ow-board-files-to-provide-sprom-fixu.patch | 67 + ...ow-setting-a-pci-bus-device-for-fall.patch | 102 + ...-BCM63XX-add-support-for-loading-DTB.patch | 118 + ...-support-for-matching-the-board_info.patch | 95 + ...ulate-the-compatible-to-board_info-l.patch | 65 + .../371_add_of_node_available_by_alias.patch | 37 + ...egister_pflash_when_available_in_dtb.patch | 21 + ...ister-interrupt-controllers-through-.patch | 45 + ...add-a-simple-GPIO-driver-for-bcm63xx.patch | 178 + ...PS-BCM63XX-switch-to-new-gpio-driver.patch | 215 + ...-register-lookup-for-ephy-reset-gpio.patch | 129 + ...not-register-gpio-controller-if-pres.patch | 35 + ...vide-a-gpio-lookup-for-the-pcmcia-re.patch | 59 + ...bcm63xx_pmcia-use-the-new-named-gpio.patch | 59 + ...d-BCM6318-pincontroller-binding-docu.patch | 96 + ...-add-a-pincontrol-driver-for-BCM6318.patch | 609 + .../383-bcm63xx_select_pinctrl.patch | 65 + ...X-add-clkdev-lookups-for-device-tree.patch | 105 + ...63XX-do-not-register-SPI-controllers.patch | 172 + ...91-MIPS-BCM63XX-do-not-register-uart.patch | 259 + ...MIPS-BCM63XX-remove-leds-and-buttons.patch | 343 + .../patches-4.14/400-bcm963xx_flashmap.patch | 65 + .../401-bcm963xx_real_rootfs_length.patch | 27 + ...402_bcm63xx_enet_vlan_incoming_fixed.patch | 11 + .../403-6358-enet1-external-mii-clk.patch | 22 + ...-move-phy_-dis-connect-into-probe-re.patch | 269 + ...enable-rgmii-clock-on-external-ports.patch | 53 + ...CM63XX-Register-SPI-flash-if-present.patch | 157 + ...w-providing-fixup-data-in-board-data.patch | 72 + ...M63XX-export-the-attached-flash-type.patch | 31 + ...CM63XX-add-a-fixup-for-ath9k-devices.patch | 237 + ...0-BCM63XX-add-endian-check-for-ath9k.patch | 51 + .../421-BCM63XX-add-led-pin-for-ath9k.patch | 51 + ...M63XX-add-a-fixup-for-rt2x00-devices.patch | 185 + .../423-bcm63xx_enet_add_b53_support.patch | 169 + ...4-bcm63xx_enet_no_request_mem_region.patch | 15 + .../427-boards_probe_switch.patch | 119 + ...low_better_context_for_board_patches.patch | 56 + .../patches-4.14/500-board-D4PW.patch | 40 + .../brcm63xx/patches-4.14/501-board-NB4.patch | 81 + .../patches-4.14/502-board-96338W2_E7T.patch | 39 + .../patches-4.14/503-board-CPVA642.patch | 44 + .../504-board_dsl_274xb_rev_c.patch | 41 + .../patches-4.14/505-board_spw500v.patch | 63 + .../506-board_gw6200_gw6000.patch | 85 + .../patches-4.14/507-board-MAGIC.patch | 58 + .../patches-4.14/508-board_hw553.patch | 51 + .../patches-4.14/509-board_rta1320_16m.patch | 39 + .../patches-4.14/510-board_spw303v.patch | 39 + .../patches-4.14/511-board_V2500V.patch | 92 + .../patches-4.14/512-board_BTV2110.patch | 43 + ...BCM63XX-add-inventel-Livebox-support.patch | 223 + .../patches-4.14/514-board_ct536_ct5621.patch | 53 + .../patches-4.14/515-board_DWV-S0_fixes.patch | 10 + .../patches-4.14/516-board_96348A-122.patch | 49 + .../patches-4.14/519_board_CPVA502plus.patch | 52 + ...63xx-add-support-for-96368MVWG-board.patch | 118 + ...3xx-add-support-for-96368MVNgr-board.patch | 73 + ...CM63XX-add-96328avng-reference-board.patch | 45 + ...CM63XX-add-963281TAN-reference-board.patch | 68 + .../524-board_dsl_274xb_rev_f.patch | 80 + .../patches-4.14/525-board_96348w3.patch | 43 + .../patches-4.14/526-board_CT6373-1.patch | 49 + .../527-board_dva-g3810bn-tl-1.patch | 54 + .../brcm63xx/patches-4.14/528-board_nb6.patch | 56 + .../patches-4.14/529-board_fast2604.patch | 41 + .../patches-4.14/530-board_A4001N1.patch | 68 + .../patches-4.14/531-board_AR-5387un.patch | 97 + .../patches-4.14/532-board_AR-5381u.patch | 79 + .../patches-4.14/533-board_rta770bw.patch | 39 + .../patches-4.14/534-board_hw556.patch | 123 + .../patches-4.14/535-board_rta770w.patch | 44 + .../patches-4.14/536-board_fast2704.patch | 74 + .../patches-4.14/537-board_fast2504n.patch | 66 + .../patches-4.14/555-board_96318ref.patch | 78 + .../556-board_96318ref_p300.patch | 69 + .../patches-4.14/557-board_bcm963269bhr.patch | 71 + .../patches-4.14/558-board_AR1004G.patch | 48 + .../patches-4.14/559-board_vw6339gu.patch | 70 + .../560-board_963268gu_p300.patch | 83 + .../patches-4.14/561-board_WAP-5813n.patch | 75 + .../patches-4.14/562-board_VR-3025u.patch | 78 + .../patches-4.14/563-board_VR-3025un.patch | 78 + .../564-board_P870HW-51a_v2.patch | 67 + .../patches-4.14/565-board_hw520.patch | 55 + .../patches-4.14/566-board_A4001N.patch | 68 + .../patches-4.14/567-board_dsl-2751b_e1.patch | 93 + .../568-board_DGND3700v1_3800B.patch | 49 + .../patches-4.14/569-board_homehub2a.patch | 50 + .../patches-4.14/570-board_HG655b.patch | 71 + .../patches-4.14/571-board_fast2704n.patch | 64 + .../patches-4.14/572-board_VR-3026e.patch | 78 + .../patches-4.14/573-board_R5010UNv2.patch | 69 + .../patches-4.14/574-board_HG622.patch | 71 + .../patches-4.14/575-board_EVG2000.patch | 61 + .../patches-4.14/576-board_AV4202N.patch | 70 + .../patches-4.14/577-board_VH4032N.patch | 63 + .../patches-4.14/578-board_R1000H.patch | 48 + .../patches-4.14/579-board_AR-5315u.patch | 86 + .../patches-4.14/580-board_AD1018.patch | 92 + .../patches-4.14/800-wl_exports.patch | 25 + .../801-ssb_export_fallback_sprom.patch | 31 + .../802-rtl8367r_fix_RGMII_support.patch | 30 + ...d-unaligned-accesses-failing-on-bcm6.patch | 26 + .../804-bcm63xx_enet_63268_rgmii_ports.patch | 13 + ...-mtd-nand-spi-nor-assign-MTD-of_node.patch | 2 +- ...-nand-convert-to-nand_set_flash_node.patch | 4 +- ...op-unnecessary-partition-parser-data.patch | 12 +- ...enet-just-use-enet-as-the-clock-name.patch | 39 + ...-platform-data-for-dma-channel-numbe.patch | 72 + ...x_enet-remove-pointless-mac_id-check.patch | 25 + ...-platform-device-id-directly-for-mii.patch | 46 + ...IPS-BCM63XX-add-support-for-BCM63268.patch | 6 +- ...MIPS-BCM63XX-add-support-for-BCM6318.patch | 4 +- ...-register-lookup-for-ephy-reset-gpio.patch | 2 +- ...-move-phy_-dis-connect-into-probe-re.patch | 8 +- ...enable-rgmii-clock-on-external-ports.patch | 2 +- .../423-bcm63xx_enet_add_b53_support.patch | 14 +- ...4-bcm63xx_enet_no_request_mem_region.patch | 2 +- ...-bcm63xxpart_parse_paritions_from_dt.patch | 28 +- .../804-bcm63xx_enet_63268_rgmii_ports.patch | 2 +- ...ider-max-message-size-in-m25p80_read.patch | 30 + ...-spi-subsystem-aware-of-message-size.patch | 42 + ...cm63xx-document-device-tree-bindings.patch | 50 + ...support-for-probing-through-devicetr.patch | 98 + ...i-allow-providing-clock-rate-through.patch | 35 + ...-hsspi-document-device-tree-bindings.patch | 51 + ...i-add-support-for-probing-through-de.patch | 76 + ...07-mdio_bus-Issue-GPIO-RESET-to-PHYs.patch | 192 + ...-reset-after-releasing-PHYs-from-res.patch | 43 + ...-signal-source-assignment-for-high-l.patch | 34 + ...PS-BCM63XX-add-clkdev-lookup-support.patch | 210 + ...vide-periph-clock-as-refclk-for-uart.patch | 84 + ...-use-refclk-for-the-expected-clock-n.patch | 26 + ...rt-allow-naming-clock-in-device-tree.patch | 55 + ...e-the-HSSPI-PLL-HZ-into-its-own-cloc.patch | 62 + ...vide-enet-clocks-as-enet-to-the-ethe.patch | 60 + ...M63XX-split-out-swpkt_sar-usb-clocks.patch | 105 + ...-08-bcm63xx_enet-correct-clock-usage.patch | 101 + ...not-write-to-random-DMA-channel-on-B.patch | 29 + ...63xx_enet-do-not-rely-on-probe-order.patch | 41 + ...-managed-functions-for-clock-ioremap.patch | 150 + ...net-drop-unneeded-NULL-phy_clk-check.patch | 36 + ...bcm63xx_enet-remove-unneeded-include.patch | 22 + ...enet-just-use-enet-as-the-clock-name.patch | 39 + ...-platform-data-for-dma-channel-numbe.patch | 72 + ...x_enet-remove-pointless-mac_id-check.patch | 25 + ...-platform-device-id-directly-for-mii.patch | 46 + ...63XX-add-USB-host-clock-enable-delay.patch | 28 + ...-USB-device-clock-enable-delay-to-cl.patch | 41 + ...e-code-touching-the-USB-private-regi.patch | 151 + ...-OHCI-EHCI-configuration-bits-to-com.patch | 169 + ...roduce-BCM63XX_OHCI-configuration-sy.patch | 62 + ...-support-for-the-on-chip-OHCI-contro.patch | 138 + ...ister-OHCI-controller-if-board-enabl.patch | 36 + ...roduce-BCM63XX_EHCI-configuration-sy.patch | 62 + ...-support-for-the-on-chip-EHCI-contro.patch | 137 + ...ister-EHCI-controller-if-board-enabl.patch | 36 + ...I-controller-does-not-support-overcu.patch | 24 + ...XX-allow-NULL-clock-for-clk_get_rate.patch | 48 + ..._table-parsing-for-partition-parsers.patch | 79 + ...move-imagetag-parsing-to-its-own-par.patch | 481 + ...2-mtd-bcm63xxpart-add-of_match_table.patch | 37 + ...xx_imagetag-add-of_match_table-suppo.patch | 37 + .../130-pinctrl-add-bcm63xx-base-code.patch | 226 + ...d-BCM6328-pincontroller-binding-docu.patch | 78 + ...-add-a-pincontrol-driver-for-BCM6328.patch | 495 + ...d-BCM6348-pincontroller-binding-docu.patch | 49 + ...-add-a-pincontrol-driver-for-BCM6348.patch | 432 + ...d-BCM6358-pincontroller-binding-docu.patch | 61 + ...-add-a-pincontrol-driver-for-BCM6358.patch | 436 + ...d-BCM6362-pincontroller-binding-docu.patch | 96 + ...-add-a-pincontrol-driver-for-BCM6362.patch | 733 + ...d-BCM6368-pincontroller-binding-docu.patch | 84 + ...-add-a-pincontrol-driver-for-BCM6368.patch | 620 + ...d-BCM63268-pincontroller-binding-doc.patch | 106 + ...add-a-pincontrol-driver-for-BCM63268.patch | 736 + ...low-limiting-ports-for-ehci-platform.patch | 66 + ...e-device-registration-code-into-its-.patch | 492 + ...s-a-mac-addresss-allocator-to-board-.patch | 100 + .../patches-4.9/309-cfe_version_mod.patch | 27 + .../310-cfe_simplify_detection.patch | 20 + .../311-bcm63xxpart_use_cfedetection.patch | 51 + ...ort-for-bcm6345-style-periphery-irq-.patch | 455 + ...ort-for-bcm6345-style-external-inter.patch | 394 + ...22-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch | 695 + ...e-up-BCM6358-s-external-interrupts-4.patch | 57 + ...BCM63XX-add-a-new-cpu-variant-helper.patch | 77 + ...MIPS-BCM63XX-define-variant-id-field.patch | 23 + ...MIPS-BCM63XX-detect-BCM6328-variants.patch | 68 + ...MIPS-BCM63XX-detect-BCM6362-variants.patch | 46 + ...MIPS-BCM63XX-detect-BCM6368-variants.patch | 48 + ...-BCM63XX-fix-PCIe-memory-window-size.patch | 20 + ...amically-set-the-pcie-memory-windows.patch | 70 + .../337-MIPS-BCM63XX-widen-cpuid-field.patch | 56 + ...MIPS-BCM63XX-increase-number-of-IRQs.patch | 39 + ...IPS-BCM63XX-add-support-for-BCM63268.patch | 737 + ...CM63XX-add-pcie-support-for-BCM63268.patch | 55 + ...MIPS-BCM63XX-add-support-for-BCM6318.patch | 697 + ...IPS-BCM63XX-split-PCIe-reset-signals.patch | 156 + ...BCM63XX-add-PCIe-support-for-BCM6318.patch | 333 + ...ect-flash-type-early-and-store-the-r.patch | 74 + ...ixup-mapped-SPI-flash-access-on-boot.patch | 84 + ...-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch | 44 + .../347-MIPS-BCM6318-USB-support.patch | 124 + ...-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch | 71 + ...IPS-BCM63XX-add-BCM63268-USB-support.patch | 117 + ...63XX-support-settings-num-usbh-ports.patch | 108 + .../351-set-board-usbh-ports.patch | 10 + ...ow-building-support-for-more-than-on.patch | 95 + ...ow-board-implementations-to-force-fl.patch | 61 + ...e-fallback-sprom-support-into-its-ow.patch | 188 + ...63XX-use-platform-data-for-the-sprom.patch | 95 + ...BCM63XX-make-fallback-sprom-optional.patch | 140 + ...M63XX-allow-different-types-of-sprom.patch | 66 + ...S-BCM63XX-add-support-for-raw-sproms.patch | 517 + ...-raw-fallback-sproms-for-most-common.patch | 181 + ...o-register-a-fallback-sprom-for-bcma.patch | 128 + ...M63XX-add-BCMA-based-sprom-templates.patch | 303 + ...ow-board-files-to-provide-sprom-fixu.patch | 67 + ...ow-setting-a-pci-bus-device-for-fall.patch | 102 + ...-BCM63XX-add-support-for-loading-DTB.patch | 118 + ...-support-for-matching-the-board_info.patch | 95 + ...ulate-the-compatible-to-board_info-l.patch | 65 + .../371_add_of_node_available_by_alias.patch | 37 + ...egister_pflash_when_available_in_dtb.patch | 21 + ...ister-interrupt-controllers-through-.patch | 45 + ...add-a-simple-GPIO-driver-for-bcm63xx.patch | 178 + ...PS-BCM63XX-switch-to-new-gpio-driver.patch | 215 + ...-register-lookup-for-ephy-reset-gpio.patch | 128 + ...not-register-gpio-controller-if-pres.patch | 35 + ...vide-a-gpio-lookup-for-the-pcmcia-re.patch | 59 + ...bcm63xx_pmcia-use-the-new-named-gpio.patch | 59 + ...d-BCM6318-pincontroller-binding-docu.patch | 96 + ...-add-a-pincontrol-driver-for-BCM6318.patch | 609 + .../383-bcm63xx_select_pinctrl.patch | 65 + ...X-add-clkdev-lookups-for-device-tree.patch | 105 + ...63XX-do-not-register-SPI-controllers.patch | 170 + ...91-MIPS-BCM63XX-do-not-register-uart.patch | 257 + ...MIPS-BCM63XX-remove-leds-and-buttons.patch | 343 + .../patches-4.9/400-bcm963xx_flashmap.patch | 65 + .../401-bcm963xx_real_rootfs_length.patch | 27 + ...402_bcm63xx_enet_vlan_incoming_fixed.patch | 11 + .../403-6358-enet1-external-mii-clk.patch | 22 + ...-move-phy_-dis-connect-into-probe-re.patch | 263 + ...enable-rgmii-clock-on-external-ports.patch | 53 + ...CM63XX-Register-SPI-flash-if-present.patch | 157 + ...w-providing-fixup-data-in-board-data.patch | 72 + ...M63XX-export-the-attached-flash-type.patch | 31 + ...CM63XX-add-a-fixup-for-ath9k-devices.patch | 237 + ...0-BCM63XX-add-endian-check-for-ath9k.patch | 51 + .../421-BCM63XX-add-led-pin-for-ath9k.patch | 51 + ...M63XX-add-a-fixup-for-rt2x00-devices.patch | 185 + .../423-bcm63xx_enet_add_b53_support.patch | 169 + ...4-bcm63xx_enet_no_request_mem_region.patch | 15 + .../patches-4.9/427-boards_probe_switch.patch | 119 + ...low_better_context_for_board_patches.patch | 56 + .../brcm63xx/patches-4.9/500-board-D4PW.patch | 40 + .../brcm63xx/patches-4.9/501-board-NB4.patch | 81 + .../patches-4.9/502-board-96338W2_E7T.patch | 39 + .../patches-4.9/503-board-CPVA642.patch | 44 + .../504-board_dsl_274xb_rev_c.patch | 41 + .../patches-4.9/505-board_spw500v.patch | 63 + .../patches-4.9/506-board_gw6200_gw6000.patch | 85 + .../patches-4.9/507-board-MAGIC.patch | 58 + .../patches-4.9/508-board_hw553.patch | 51 + .../patches-4.9/509-board_rta1320_16m.patch | 39 + .../patches-4.9/510-board_spw303v.patch | 39 + .../patches-4.9/511-board_V2500V.patch | 92 + .../patches-4.9/512-board_BTV2110.patch | 43 + ...BCM63XX-add-inventel-Livebox-support.patch | 223 + .../patches-4.9/514-board_ct536_ct5621.patch | 53 + .../patches-4.9/515-board_DWV-S0_fixes.patch | 10 + .../patches-4.9/516-board_96348A-122.patch | 49 + .../patches-4.9/519_board_CPVA502plus.patch | 52 + ...63xx-add-support-for-96368MVWG-board.patch | 118 + ...3xx-add-support-for-96368MVNgr-board.patch | 73 + ...CM63XX-add-96328avng-reference-board.patch | 45 + ...CM63XX-add-963281TAN-reference-board.patch | 68 + .../524-board_dsl_274xb_rev_f.patch | 80 + .../patches-4.9/525-board_96348w3.patch | 43 + .../patches-4.9/526-board_CT6373-1.patch | 49 + .../527-board_dva-g3810bn-tl-1.patch | 54 + .../brcm63xx/patches-4.9/528-board_nb6.patch | 56 + .../patches-4.9/529-board_fast2604.patch | 41 + .../patches-4.9/530-board_A4001N1.patch | 68 + .../patches-4.9/531-board_AR-5387un.patch | 97 + .../patches-4.9/532-board_AR-5381u.patch | 79 + .../patches-4.9/533-board_rta770bw.patch | 39 + .../patches-4.9/534-board_hw556.patch | 123 + .../patches-4.9/535-board_rta770w.patch | 44 + .../patches-4.9/536-board_fast2704.patch | 74 + .../patches-4.9/537-board_fast2504n.patch | 66 + .../patches-4.9/555-board_96318ref.patch | 78 + .../patches-4.9/556-board_96318ref_p300.patch | 69 + .../patches-4.9/557-board_bcm963269bhr.patch | 71 + .../patches-4.9/558-board_AR1004G.patch | 48 + .../patches-4.9/559-board_vw6339gu.patch | 70 + .../patches-4.9/560-board_963268gu_p300.patch | 83 + .../patches-4.9/561-board_WAP-5813n.patch | 75 + .../patches-4.9/562-board_VR-3025u.patch | 78 + .../patches-4.9/563-board_VR-3025un.patch | 78 + .../patches-4.9/564-board_P870HW-51a_v2.patch | 67 + .../patches-4.9/565-board_hw520.patch | 55 + .../patches-4.9/566-board_A4001N.patch | 68 + .../patches-4.9/567-board_dsl-2751b_e1.patch | 93 + .../568-board_DGND3700v1_3800B.patch | 49 + .../patches-4.9/569-board_homehub2a.patch | 50 + .../patches-4.9/570-board_HG655b.patch | 71 + .../patches-4.9/571-board_fast2704n.patch | 64 + .../patches-4.9/572-board_VR-3026e.patch | 78 + .../patches-4.9/573-board_R5010UNv2.patch | 69 + .../patches-4.9/574-board_HG622.patch | 71 + .../patches-4.9/575-board_EVG2000.patch | 61 + .../patches-4.9/576-board_AV4202N.patch | 70 + .../patches-4.9/577-board_VH4032N.patch | 63 + .../patches-4.9/578-board_R1000H.patch | 48 + .../patches-4.9/579-board_AR-5315u.patch | 86 + .../patches-4.9/580-board_AD1018.patch | 92 + .../brcm63xx/patches-4.9/800-wl_exports.patch | 25 + .../801-ssb_export_fallback_sprom.patch | 31 + .../802-rtl8367r_fix_RGMII_support.patch | 30 + ...d-unaligned-accesses-failing-on-bcm6.patch | 26 + .../804-bcm63xx_enet_63268_rgmii_ports.patch | 13 + target/linux/cns3xxx/Makefile | 2 +- .../base-files/lib/upgrade/platform.sh | 12 - .../linux/cns3xxx/{config-4.9 => config-4.14} | 104 +- .../files/arch/arm/mach-cns3xxx/laguna.c | 6 +- .../drivers/net/ethernet/cavium/cns3xxx_eth.c | 38 +- target/linux/cns3xxx/image/Makefile | 4 +- .../000-cns3xxx_arch_include.patch | 3 +- .../001-arm_openwrt_machtypes.patch | 10 + ...-arm_introduce-dma-fiq-irq-broadcast.patch | 6 +- .../020-watchdog_support.patch | 8 +- .../025-smp_support.patch | 4 +- .../030-pcie_clock.patch | 0 .../040-fiq_support.patch | 6 +- .../045-twd_base.patch | 0 .../055-pcie_io.patch | 0 .../060-pcie_abort.patch | 0 .../065-pcie_skip_inactive.patch | 0 .../070-i2c_support.patch | 6 +- .../075-spi_support.patch | 12 +- .../080-sata_support.patch | 0 .../090-timers.patch | 2 +- .../093-add-virt-pci-io-mapping.patch | 0 .../095-gpio_support.patch | 4 +- .../097-l2x0_cmdline_disable.patch | 0 .../100-laguna_support.patch | 4 +- .../101-laguna_sdhci_card_detect.patch | 0 .../110-pci_isolated_interrupts.patch | 0 ...-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch | 4 +- .../200-broadcom_phy_reinit.patch | 15 + .../patches-4.14/210-dwc2_defaults.patch | 63 + .../001-arm_openwrt_machtypes.patch | 7 - .../patches-4.9/200-broadcom_phy_reinit.patch | 14 - .../patches-4.9/210-dwc2_defaults.patch | 47 - ...d-of_match_table-parser-matching-fo.patch} | 12 +- ...-parser-to-fixed-partitions-as-it-f.patch} | 12 +- ...f_match_table-with-fixed-partitions.patch} | 11 +- ...-defensive-check-on-malformed-packet.patch | 6 +- ...etfilter-flow-table-support-for-IPv6.patch | 4 +- ...tfilter-exit_net-cleanup-check-added.patch | 2 +- ...ipv6-make-ip6_dst_mtu_forward-inline.patch | 2 +- .../011-kbuild-export-SUBARCH.patch | 2 +- ...tsq-add-shortcut-in-tcp_tasklet_func.patch | 2 +- ...-a-shortcut-in-tcp_small_queue_check.patch | 2 +- ...cp_mtu_probe-is-likely-to-exit-early.patch | 2 +- ...ove-tsq_flags-close-to-sk_wmem_alloc.patch | 10 +- ...tcp-allow-drivers-to-tweak-TSQ-logic.patch | 2 +- ...ypo-in-KPP-dependency-of-CRYPTO_ECDH.patch | 25 - ...50-usb-dwc2-Remove-unnecessary-kfree.patch | 2 +- ...td-nand-Add-Winbond-manufacturer-id.patch} | 0 ...d-introduce-function-max_bad_blocks.patch} | 0 ...-device-node-to-mtd-partition-devic.patch} | 0 ...e-stateless-4b-op-codes-for-mx25u25.patch} | 0 ...s-add-of_match_table-parser-matching.patch | 121 - ...ding-master-MTD-out-of-mtd_add_devic.patch | 74 + ...rid-of-the-mtd_add_device_partitions.patch | 93 + ...dd-of_match_table-parser-matching-fo.patch | 200 + ...t-parser-to-fixed-partitions-as-it-f.patch | 74 + ...f_match_table-with-fixed-partitions.patch} | 10 +- ...te-struct-bgmac-just-once-don-t-copy.patch | 6 +- ...truct-bcma_mdio-we-don-t-need-anymor.patch | 2 +- ...-master-mode-for-BCM54210E-and-B5021.patch | 2 +- ...90-net-generalize-napi_complete_done.patch | 22 +- ...les-fix-mismatch-in-big-endian-syste.patch | 323 + ...prevent-redefinition-of-struct-ethhd.patch | 44 +- target/linux/generic/config-3.18 | 1 + target/linux/generic/config-4.4 | 1 + target/linux/generic/config-4.9 | 3 + .../files/drivers/mtd/mtdsplit/Kconfig | 5 + .../files/drivers/mtd/mtdsplit/Makefile | 1 + .../drivers/mtd/mtdsplit/mtdsplit_jimage.c | 277 + .../drivers/mtd/mtdsplit/mtdsplit_wrgg.c | 21 +- .../generic/files/drivers/net/phy/ar8216.c | 9 +- .../generic/files/drivers/net/phy/ar8216.h | 1 + .../generic/files/drivers/net/phy/ar8327.c | 56 +- .../generic/files/drivers/net/phy/ar8327.h | 6 + .../files/drivers/net/phy/b53/b53_priv.h | 18 +- .../generic/files/drivers/net/phy/swconfig.c | 6 +- .../files/drivers/net/phy/swconfig_leds.c | 161 +- .../hack-4.14/250-netfilter_depends.patch | 2 +- .../generic/hack-4.14/721-phy_packets.patch | 8 +- .../hack-4.9/202-reduce_module_size.patch | 2 +- .../generic/hack-4.9/204-module_strip.patch | 26 +- .../hack-4.9/207-disable-modorder.patch | 4 +- .../generic/hack-4.9/220-gc_sections.patch | 4 +- ...cache-use-more-efficient-cache-blast.patch | 66 + .../hack-4.9/641-bridge_port_isolate.patch | 2 +- .../hack-4.9/660-fq_codel_defaults.patch | 2 +- .../661-use_fq_codel_by_default.patch | 4 +- .../generic/hack-4.9/721-phy_packets.patch | 2 +- .../hack-4.9/773-bgmac-add-srab-switch.patch | 2 +- .../generic/hack-4.9/902-debloat_proc.patch | 8 +- .../hack-4.9/904-debloat_dma_buf.patch | 2 +- .../002-phy_drivers_backport.patch | 16 +- ...libc-specific-inclusion-of-sysinfo.h.patch | 34 - ...t-add-fallback-for-unsupported-libcs.patch | 102 + ...bc-compat.h-do-not-rely-on-__GLIBC__.patch | 81 - ...prevent-redefinition-of-struct-ethhd.patch | 48 +- ...s-negative-stack-offsets-on-stack-tr.patch | 57 + ...-improve-handling-TRX-partition-size.patch | 65 + ...w_table-support-hw-offload-through-v.patch | 53 +- ...-support-hardware-flow-table-offload.patch | 7 +- ...-support-hardware-flow-table-offload.patch | 2 +- ...Add-support-for-MAP-E-FMRs-mesh-mode.patch | 30 +- ...ng-with-source-address-failed-policy.patch | 18 +- ...T-skip-GRO-for-foreign-MAC-addresses.patch | 2 +- .../pending-4.4/001-mtdsplit_backport.patch | 2 +- ...1-0005-ovl-proper-cleanup-of-workdir.patch | 2 +- ...-improve-handling-TRX-partition-size.patch | 65 + .../pending-4.4/201-extra_optimization.patch | 2 +- .../pending-4.4/202-reduce_module_size.patch | 2 +- .../pending-4.4/204-module_strip.patch | 19 +- .../pending-4.4/208-disable-modorder.patch | 4 +- .../pending-4.4/221-module_exports.patch | 2 +- ...libc-specific-inclusion-of-sysinfo.h.patch | 34 - ...t-add-fallback-for-unsupported-libcs.patch | 130 + ...bc-compat.h-do-not-rely-on-__GLIBC__.patch | 94 - ...prevent-redefinition-of-struct-ethhd.patch | 46 +- ...to-create-ubiblock-device-for-rootfs.patch | 4 +- ...ROOT_DEV-to-ubiblock-rootfs-if-unset.patch | 4 +- ...etfilter_match_bypass_default_checks.patch | 14 +- ...del-do-not-defer-queue-length-update.patch | 86 + .../pending-4.4/650-pppoe_header_pad.patch | 20 - .../pending-4.4/660-fq_codel_defaults.patch | 2 +- .../662-use_fq_codel_by_default.patch | 4 +- ...Add-support-for-MAP-E-FMRs-mesh-mode.patch | 40 +- ...ng-with-source-address-failed-policy.patch | 18 +- ...T-skip-GRO-for-foreign-MAC-addresses.patch | 10 +- .../generic/pending-4.4/721-phy_packets.patch | 2 +- .../pending-4.4/834-ledtrig-libata.patch | 8 +- .../pending-4.4/901-debloat_sock_diag.patch | 2 +- .../pending-4.4/902-debloat_proc.patch | 4 +- .../pending-4.4/995-mangle_bootargs.patch | 2 +- ...e_mem_map-with-ARCH_PFN_OFFSET-calcu.patch | 2 +- ...-improve-handling-TRX-partition-size.patch | 65 + ...generic-parsing-of-linux-part-probe.patch} | 12 +- ...sb-add-lte-modem-wistron-neweb-d18q1.patch | 61 + ..._wwan-add-BroadMobi-BM806U-2020-2033.patch | 28 + ...ng-comment-related-to-link-detection.patch | 4 +- .../pending-4.9/201-extra_optimization.patch | 2 +- ...libc-specific-inclusion-of-sysinfo.h.patch | 32 - ...bc-compat.h-do-not-rely-on-__GLIBC__.patch | 105 - ...for-different-partition-parser-types.patch | 2 +- .../404-mtd-add-more-helper-functions.patch | 2 +- ...-fallback-from-spi_flash_read-to-reg.patch | 36 + ...support-for-XM25QH64A-and-XM25QH128A.patch | 30 + ...to-create-ubiblock-device-for-rootfs.patch | 4 +- ...ROOT_DEV-to-ubiblock-rootfs-if-unset.patch | 2 +- ...etfilter_match_bypass_default_checks.patch | 14 +- ...del-do-not-defer-queue-length-update.patch | 86 + .../pending-4.9/650-pppoe_header_pad.patch | 29 - ...Add-support-for-MAP-E-FMRs-mesh-mode.patch | 22 +- ...ng-with-source-address-failed-policy.patch | 18 +- ...T-skip-GRO-for-foreign-MAC-addresses.patch | 17 +- .../pending-4.9/834-ledtrig-libata.patch | 8 +- .../pending-4.9/890-uart_optional_sysrq.patch | 2 +- .../pending-4.9/920-mangle_bootargs.patch | 2 +- target/linux/imx6/Makefile | 2 +- .../imx6/base-files/lib/upgrade/platform.sh | 2 +- target/linux/imx6/{config-4.9 => config-4.14} | 65 +- .../arch/arm/boot/dts/imx6dl-gw5904.dts | 19 - .../arch/arm/boot/dts/imx6q-gw5904.dts | 23 - .../arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 629 - target/linux/imx6/image/Makefile | 2 +- .../100-bootargs.patch | 0 .../imx6/patches-4.14/200-disable-msi.patch | 18 + .../210-disable-uart-dma.patch | 0 ...add-gateworks-ventana-gw5904-support.patch | 18 - .../imx6/patches-4.9/200-disable-msi.patch | 22 - target/linux/ipq40xx/Makefile | 1 + .../ipq40xx/base-files/etc/board.d/01_leds | 5 + .../ipq40xx/base-files/etc/board.d/02_network | 11 +- .../etc/hotplug.d/firmware/11-ath10k-caldata | 28 +- .../base-files/lib/upgrade/platform.sh | 3 + target/linux/ipq40xx/config-4.14 | 2 + target/linux/ipq40xx/config-4.9 | 497 - .../arch/arm/boot/dts/qcom-ipq4018-a42.dts | 21 - .../arm/boot/dts/qcom-ipq4018-ex6100v2.dts | 33 + .../arm/boot/dts/qcom-ipq4018-ex6150v2.dts | 33 + .../arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi} | 263 +- .../arm/boot/dts/qcom-ipq4018-fritz4040.dts | 21 - .../arm/boot/dts/qcom-ipq4018-jalapeno.dts | 257 + .../arm/boot/dts/qcom-ipq4018-rt-ac58u.dts | 16 - .../arm/boot/dts/qcom-ipq4019-rt-acrh17.dts | 11 - .../arch/arm/boot/dts/qcom-ipq4028-wpj428.dts | 21 - .../arm/boot/dts/qcom-ipq4029-gl-b1300.dts | 41 - .../arch/arm/boot/dts/qcom-ipq4029-mr33.dts | 21 - .../arch/arm/boot/dts/qcom-ipq4019-a42.dts | 244 - .../arch/arm/boot/dts/qcom-ipq4019-bus.dtsi | 1142 - .../arm/boot/dts/qcom-ipq4019-rt-ac58u.dts | 197 - .../arm/boot/dts/qcom-ipq4019-rt-acrh17.dts | 291 - .../arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 246 - .../arch/arm/boot/dts/qcom-ipq8064-c2600.dts | 500 - .../arch/arm/boot/dts/qcom-ipq8064-d7800.dts | 419 - .../arch/arm/boot/dts/qcom-ipq8064-db149.dts | 236 - .../arch/arm/boot/dts/qcom-ipq8064-ea8500.dts | 406 - .../arch/arm/boot/dts/qcom-ipq8064-r7500.dts | 394 - .../arm/boot/dts/qcom-ipq8064-r7500v2.dts | 425 - .../arm/boot/dts/qcom-ipq8064-vr2600v.dts | 424 - .../arch/arm/boot/dts/qcom-ipq8064.dtsi | 1333 -- .../arm/boot/dts/qcom-ipq8065-nbg6817.dts | 391 - .../arch/arm/boot/dts/qcom-ipq8065-r7800.dts | 573 - .../arch/arm/boot/dts/qcom-ipq8065-v1.0.dtsi | 1 - .../arch/arm/boot/dts/qcom-ipq8065.dtsi | 164 - target/linux/ipq40xx/image/Makefile | 51 +- .../069-arm-boot-add-dts-files.patch | 5 +- ...4019-needs-rfs-vlan_tag-callbacks-in.patch | 2 +- ...9-ap-dk01.1-c1-add-spi-and-ram-nodes.patch | 43 +- ...019-Add-TZ-and-SMEM-reserved-regions.patch | 88 + ...ings-qcom_adm-Fix-channel-specifiers.patch | 71 - .../0002-dmaengine-Add-ADM-driver.patch | 966 - ...ke-sure-mode-is-only-determined-once.patch | 208 - ...i-qup-Fix-transaction-done-signaling.patch | 29 - ...i-qup-Fix-DMA-mode-to-work-correctly.patch | 219 - ...qup-Fix-block-mode-to-work-correctly.patch | 310 - ...qup-properly-detect-extra-interrupts.patch | 61 - ...-read-opflags-to-see-if-transaction-.patch | 26 - ...r-spi_qup_io_config-in-two-functions.patch | 202 - ...-io_config-in-mode-specific-function.patch | 391 - ...ock-mode-to-generate-multiple-transa.patch | 268 - ...-spi_qup_prep_sg-to-be-more-take-spe.patch | 73 - ...litple-DMA-transactions-per-spi-xfer.patch | 166 - ...014-spi-qup-Fix-sg-nents-calculation.patch | 86 - ...-ipq4019-Add-compat-for-qcom-ipq4019.patch | 27 - ...19-report-accurate-fixed-clock-rates.patch | 33 - ...-cpu-operating-points-for-cpufreq-su.patch | 77 - ...018-qcom-ipq4019-turn-on-DMA-for-i2c.patch | 23 - ...4019-use-correct-clock-for-i2c-bus-0.patch | 28 - ...0020-qcom-ipq4019-enable-DMA-for-spi.patch | 23 - ...9-Add-support-for-IPQ4019-DK04-board.patch | 225 - ...-qcom-Add-support-for-SMD-RPM-Clocks.patch | 731 - ...-clk-qcom-Add-support-for-RPM-Clocks.patch | 587 - ...k-qcom-clk-rpm-Fix-clk_hw-references.patch | 94 - ...0030-clk-Disable-i2c-device-on-gsbi4.patch | 40 - ...d-add-SMEM-parser-for-QCOM-platforms.patch | 275 - .../0032-phy-add-qcom-dwc3-phy.patch | 617 - ...ically-select-PCI_DOMAINS-if-PCI-is-.patch | 29 - ...Krait-L2-register-accessor-functions.patch | 147 - ...lit-out-register-accessors-for-reuse.patch | 195 - ...pport-for-High-Frequency-PLLs-HFPLLs.patch | 352 - .../0039-clk-qcom-Add-HFPLL-driver.patch | 206 - .../0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch | 129 - ...lk-qcom-Add-support-for-Krait-clocks.patch | 241 - ...042-clk-qcom-Add-KPSS-ACC-GCC-driver.patch | 209 - ...om-Add-Krait-clock-controller-driver.patch | 436 - .../0044-clk-Add-safe-switch-hook.patch | 160 - ...le-to-register-cpufreq-on-Krait-CPUs.patch | 307 - ...cpufreq-qcom-independent-core-clocks.patch | 66 - ...a-BBT-flag-to-access-bad-block-marke.patch | 72 - ...ow-to-set-regulator-without-opp_list.patch | 27 - ...rt-adjusting-OPP-voltages-at-runtime.patch | 147 - ...ers-to-call-dev_pm_opp_get_-voltage-.patch | 107 - ...per-to-get-an-opp-regulator-for-devi.patch | 52 - ...e-voltage-tolerance-when-adjusting-t.patch | 38 - .../0053-regulator-add-smb208-support.patch | 55 - ...-dt-Handle-OPP-voltage-adjust-events.patch | 144 - ...-dt-Add-L2-frequency-scaling-support.patch | 90 - ...056-cpufreq-dt-Add-missing-rcu-locks.patch | 23 - ...lways-add-factor-clock-for-xo-clocks.patch | 38 - ...le-Add-cpuidle-support-for-QCOM-cpus.patch | 29 - ...arch-arm-force-ZRELADDR-on-arch-qcom.patch | 62 - ...conflicts-with-OpenWrt-auto-mounting.patch | 23 - ...ed-the-enable-regs-and-mask-for-PRNG.patch | 25 - .../0063-1-ipq806x-tsens-driver.patch | 627 - ...sens-support-configurable-interrupts.patch | 462 - .../patches-4.9/0064-clk-clk-rpm-fixes.patch | 93 - .../0065-arm-override-compiler-flags.patch | 21 - ...Mangle-bootloader-s-kernel-arguments.patch | 189 - .../0068-spi-add-gpio-cs-support.patch | 71 - .../0069-arm-boot-add-dts-files.patch | 32 - .../0070-qcom-spm-fix-probe-order.patch | 16 - ...I-qcom-Fixed-IPQ806x-specific-clocks.patch | 95 - ...com-Fixed-IPQ806x-PCIE-reset-changes.patch | 85 - ...qcom-Fixed-IPQ806x-PCIE-init-changes.patch | 127 - ...-PCIE-designware-Fixed-PCI-host-init.patch | 68 - ...rogramming-the-PCIE-iATU-for-IPQ806x.patch | 113 - .../0071-6-PCI-qcom-Force-GEN1-support.patch | 61 - ...7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch | 69 - ...qcom-Fixed-pcie_phy_clk-branch-issue.patch | 91 - ...nge-duplicate-pci-reset-to-phy-reset.patch | 25 - ...clock-to-be-enabled-disabled-for-ipq.patch | 166 - ...e-scm_call-to-route-GPIO-irq-to-Apps.patch | 166 - ...ipq806x-usb-Control-USB-master-reset.patch | 75 - ...nd-add-Winbond-manufacturer-and-chip.patch | 38 - .../105-mtd-nor-add-mx25l25635f.patch | 22 - ...use-v2-of-the-kpss-bringup-mechanism.patch | 109 - ...-USB-nodes-to-ipq4019-SoC-device-tre.patch | 130 - ...307-ARM-qcom-Add-IPQ4019-SoC-support.patch | 35 - ...-both-IPQ4019-wifi-block-definitions.patch | 105 - ...9-add-pseudo-random-number-generator.patch | 29 - .../310-msm-adhoc-bus-support.patch | 11026 ---------- ...dd-quirk-to-autoload-ubi-on-rt-ac58u.patch | 29 - ...4019-needs-rfs-vlan_tag-callbacks-in.patch | 53 - .../700-net-add-qualcomm-mdio-and-phy.patch | 2690 --- .../701-dts-ipq4019-add-mdio-node.patch | 52 - ...702-dts-ipq4019-add-PHY-switch-nodes.patch | 46 - ...add-qualcomm-essedma-ethernet-driver.patch | 4602 ---- ...ts-ipq4019-add-ethernet-essedma-node.patch | 92 - ...712-net-essedma-disable-default-vlan.patch | 69 - ...19-Add-IPQ4019-USB-HS-SS-PHY-drivers.patch | 429 - ...r-qca-ipq4019-dwc3-in-dwc3-of-simple.patch | 25 - .../850-soc-add-qualcomm-syscon.patch | 177 - ...ctrl-Updated-various-Pin-definitions.patch | 1328 -- ...support-to-configure-ipq40xx-GPIO_PU.patch | 236 - ...d-bam_dma-support-in-qcom_nand-drive.patch | 370 - ...ded-bam-transaction-and-support-addi.patch | 1267 -- ...qcom-bam_dma-Add-custom-data-mapping.patch | 209 - ...q4019-add-nand-and-qpic-bam-dma-node.patch | 166 - ...-2-dts-ipq4019-Fix-pinctrl-node-name.patch | 44 - ...-Move-xo-and-timer-nodes-to-SoC-dtsi.patch | 78 - ...pq4019-ap-dk04-fix-pinctrl-node-name.patch | 11 - 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...-npe_driver_add_update_link_function.patch | 98 - .../207-npe_driver_multiphy_support.patch | 167 - .../patches-4.4/295-latch_led_driver.patch | 201 - .../patches-4.4/300-avila_support.patch | 726 - .../patches-4.4/310-gtwx5717_spi_bus.patch | 52 - .../311-gtwx5717_mac_plat_info.patch | 50 - .../312-ixp4xx_pata_optimization.patch | 137 - .../patches-4.4/500-usr8200_support.patch | 347 - .../patches-4.4/520-tw2662_support.patch | 317 - .../patches-4.4/530-ap42x_support.patch | 282 - .../patches-4.4/600-skb_avoid_dmabounce.patch | 23 - .../900-ixp4xx-crypto-include-module.h.patch | 10 - .../patches-4.4/910-ixp4xx-nr_irq_lines.patch | 22 - .../patches-4.9/160-delayed_uart_io.patch | 4 +- target/linux/kirkwood/Makefile | 2 +- .../base-files/lib/upgrade/platform.sh | 2 +- .../config-4.4 => kirkwood/config-4.14} | 311 +- .../kirkwood/patches-4.14/100-ib62x0.patch | 30 + .../kirkwood/patches-4.14/101-iconnect.patch | 50 + .../kirkwood/patches-4.14/102-dockstar.patch | 32 + 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.../arch/mips/boot}/dts/FALCON-MDU.dts | 0 .../arch/mips/boot}/dts/FALCON-SFP.dts | 0 .../arch/mips/boot/dts/FRITZ3370.dts | 296 + .../arch/mips/boot/dts/FRITZ7320.dts | 163 + .../arch/mips/boot/dts/FRITZ7360SL.dts | 239 + .../arch/mips/boot/dts/GIGASX76X.dts | 130 + .../files-4.14/arch/mips/boot/dts/H201L.dts | 174 + .../arch/mips/boot/dts/P2601HNFX.dts | 194 + .../arch/mips/boot/dts/P2812HNUF1.dts | 70 + .../arch/mips/boot/dts/P2812HNUF3.dts | 64 + .../arch/mips/boot/dts/P2812HNUFX.dtsi | 297 + .../arch/mips/boot}/dts/TDW8970.dts | 0 .../files-4.14/arch/mips/boot/dts/TDW8980.dts | 33 + .../arch/mips/boot/dts/TDW89X0.dtsi | 298 + .../files-4.14/arch/mips/boot/dts/VG3503J.dts | 164 + .../arch/mips/boot/dts/VGV7510KW22.dtsi | 268 + .../arch/mips/boot/dts/VGV7510KW22BRN.dts | 65 + .../arch/mips/boot/dts/VGV7510KW22NOR.dts | 31 + .../arch/mips/boot/dts/VGV7519.dtsi | 312 + .../arch/mips/boot/dts/VGV7519BRN.dts | 70 + .../arch/mips/boot/dts/VGV7519NOR.dts | 29 + .../files-4.14/arch/mips/boot/dts/VR200v.dts | 305 + .../files-4.14/arch/mips/boot/dts/WBMR.dts | 199 + .../files-4.14/arch/mips/boot/dts/WBMR300.dts | 329 + .../arch/mips/boot/dts/amazonse.dtsi | 204 + .../files-4.14/arch/mips/boot/dts/ar9.dtsi | 268 + .../files-4.14/arch/mips/boot/dts/danube.dtsi | 252 + .../mips/boot}/dts/falcon-sflash-16M.dtsi | 0 .../arch/mips/boot}/dts/falcon.dtsi | 0 .../files-4.14/arch/mips/boot/dts/vr9.dtsi | 339 + .../arch/mips/boot}/dts/ACMP252.dts | 0 .../arch/mips/boot}/dts/ALL0333CJ.dts | 0 .../arch/mips/boot}/dts/ARV4510PW.dts | 0 .../arch/mips/boot/dts/ARV4518PWR01.dts | 8 + .../arch/mips/boot}/dts/ARV4518PWR01.dtsi | 0 .../arch/mips/boot}/dts/ARV4518PWR01A.dts | 0 .../arch/mips/boot}/dts/ARV4519PW.dts | 0 .../arch/mips/boot}/dts/ARV4520PW.dts | 0 .../arch/mips/boot}/dts/ARV4525PW.dts | 0 .../arch/mips/boot}/dts/ARV452CQW.dts | 0 .../arch/mips/boot}/dts/ARV7506PW11.dts | 0 .../arch/mips/boot}/dts/ARV7510PW22.dts | 0 .../arch/mips/boot}/dts/ARV7518PW.dts | 0 .../arch/mips/boot}/dts/ARV7519PW.dts | 0 .../arch/mips/boot}/dts/ARV7519RW22.dts | 4 +- .../arch/mips/boot}/dts/ARV7525PW.dts | 0 .../arch/mips/boot}/dts/ARV752DPW.dts | 0 .../arch/mips/boot}/dts/ARV752DPW22.dts | 0 .../arch/mips/boot}/dts/ARV8539PW22.dts | 0 .../arch/mips/boot}/dts/ASL56026.dts | 4 +- .../arch/mips/boot}/dts/BTHOMEHUBV2B.dts | 0 .../arch/mips/boot}/dts/BTHOMEHUBV3A.dts | 0 .../arch/mips/boot}/dts/BTHOMEHUBV5A.dts | 4 +- .../arch/mips/boot}/dts/DGN1000B.dts | 0 .../files-4.9/arch/mips/boot/dts/DGN3500.dts | 8 + .../arch/mips/boot}/dts/DGN3500.dtsi | 0 .../files-4.9/arch/mips/boot/dts/DGN3500B.dts | 8 + .../arch/mips/boot}/dts/DM200.dts | 2 +- .../arch/mips/boot}/dts/EASY50712.dts | 0 .../arch/mips/boot}/dts/EASY50810.dts | 0 .../arch/mips/boot}/dts/EASY80920.dtsi | 4 +- .../arch/mips/boot}/dts/EASY80920NAND.dts | 0 .../arch/mips/boot}/dts/EASY80920NOR.dts | 0 .../arch/mips/boot/dts/EASY88388.dts | 106 + .../arch/mips/boot/dts/EASY88444.dts | 80 + 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0 .../arch/mips/boot}/dts/TDW89X0.dtsi | 2 +- .../arch/mips/boot}/dts/VG3503J.dts | 4 +- .../arch/mips/boot}/dts/VGV7510KW22.dtsi | 4 +- .../arch/mips/boot}/dts/VGV7510KW22BRN.dts | 0 .../arch/mips/boot}/dts/VGV7510KW22NOR.dts | 0 .../arch/mips/boot}/dts/VGV7519.dtsi | 4 +- .../arch/mips/boot}/dts/VGV7519BRN.dts | 0 .../arch/mips/boot}/dts/VGV7519NOR.dts | 0 .../arch/mips/boot}/dts/VR200v.dts | 2 +- .../arch/mips/boot}/dts/WBMR.dts | 0 .../arch/mips/boot}/dts/WBMR300.dts | 2 +- .../arch/mips/boot}/dts/amazonse.dtsi | 0 .../arch/mips/boot}/dts/ar9.dtsi | 0 .../arch/mips/boot}/dts/danube.dtsi | 0 .../arch/mips/boot/dts/falcon-sflash-16M.dtsi | 37 + .../files-4.9/arch/mips/boot/dts/falcon.dtsi | 392 + .../arch/mips/boot}/dts/vr9.dtsi | 8 +- ...9_phy11g_a1x.bin => xrx200_phy11g_a14.bin} | Bin ...9_phy11g_a2x.bin => xrx200_phy11g_a22.bin} | Bin ...9_phy22f_a1x.bin => xrx200_phy22f_a14.bin} | Bin ...9_phy22f_a2x.bin => xrx200_phy22f_a22.bin} | Bin target/linux/lantiq/image/Makefile | 10 +- .../0001-MIPS-lantiq-add-pcie-driver.patch | 5520 +++++ .../0004-MIPS-lantiq-add-atm-hack.patch | 499 + ...-MIPS-lantiq-backport-old-timer-code.patch | 1034 + .../0018-MTD-nand-lots-of-xrx200-fixes.patch | 122 + ...antiq-handle-NO_XIP-on-cfi0001-flash.patch | 25 + ...25p80-allow-loading-mtd-name-from-OF.patch | 44 + ...T-PHY-add-led-support-for-intel-xway.patch | 294 + ...antiq-autoselect-soc-rev-matching-fw.patch | 45 + ...0025-NET-MIPS-lantiq-adds-xrx200-net.patch | 3430 +++ ...hy-intel-xway-add-VR9-version-number.patch | 62 + ...-phy-intel-xway-add-VR9-v1.1-phy-ids.patch | 69 + .../0028-NET-lantiq-various-etop-fixes.patch | 868 + .../0030-GPIO-add-named-gpio-exports.patch} | 90 +- ...PS-lantiq-add-FALC-ON-i2c-bus-master.patch | 1034 + ...iq-wifi-and-ethernet-eeprom-handling.patch | 218 + ...42-arch-mips-increase-io_space_limit.patch | 23 + ...e-lantiq-settings-match-vendor-drive.patch | 78 + ...PS-lantiq-improve-USB-initialization.patch | 49 + .../patches-4.14/0101-find_active_root.patch | 93 + .../0151-lantiq-ifxmips_pcie-use-of.patch | 166 + .../lantiq/patches-4.14/0152-lantiq-VPE.patch | 180 + .../0154-lantiq-pci-bar11mask-fix.patch | 22 + .../patches-4.14/0155-lantiq-VPE-nosmp.patch | 14 + .../0160-owrt-lantiq-multiple-flash.patch | 220 + ...-cmdset-0001-disable-buffered-writes.patch | 11 + ...add-gphy-clk-src-device-tree-binding.patch | 30 + ...mt-Use-CPU-interrupt-controller-IPI-.patch | 271 + ...25p80-allow-loading-mtd-name-from-OF.patch | 4 +- ...ET-lantiq-adds-PHY11G-firmware-blobs.patch | 16 +- ...hy-intel-xway-add-VR9-version-number.patch | 62 + ...-phy-intel-xway-add-VR9-v1.1-phy-ids.patch | 71 + ...dd-support-for-Lantiq-SSC-SPI-contro.patch | 2 +- .../patches-4.9/0101-find_active_root.patch | 12 +- target/linux/lantiq/xrx200/config-4.14 | 97 + .../xrx200/{config-default => config-4.9} | 0 target/linux/lantiq/xway/config-4.14 | 50 + .../xway/{config-default => config-4.9} | 0 target/linux/lantiq/xway_legacy/config-4.14 | 39 + .../{config-default => config-4.9} | 0 target/linux/layerscape/Makefile | 2 +- target/linux/layerscape/README | 63 +- target/linux/layerscape/armv8_32b/config-4.9 | 157 +- target/linux/layerscape/armv8_64b/config-4.9 | 60 +- target/linux/layerscape/image/Makefile | 33 +- .../201-config-support-layerscape.patch | 226 +- .../202-core-linux-support-layerscape.patch | 28 +- .../301-arch-support-layerscape.patch | 49 +- .../302-dts-support-layercape.patch | 365 +- ...elect-ARCH_DMA_ADDR_T_64BIT-for-LPAE.patch | 23 - .../401-mtd-spi-nor-support-layerscape.patch | 8 +- .../402-mtd-support-layerscape.patch | 19 +- .../701-sdk_dpaa-support-layerscape.patch | 250 +- .../702-pci-support-layerscape.patch | 68 +- .../703-phy-support-layerscape.patch | 37 +- .../704-fsl-mc-layerscape-support.patch | 154 +- .../705-dpaa2-support-layerscape.patch | 994 +- ...706-fsl-dpaa-use-4-9-ndo-get-stats64.patch | 112 - .../706-fsl_ppfe-support-layercape.patch | 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.../base-files/etc/board.d/02_network | 6 +- .../mediatek/base-files/etc/config/mtkhnat | 60 - .../mediatek/base-files/etc/init.d/mtkhnat | 13 - .../base-files/etc/uci-defaults/99-firewall | 9 - .../base-files/lib/upgrade/platform.sh | 34 +- target/linux/mediatek/base-files/sbin/mtkhnat | 64 - .../mediatek/{config-4.9 => config-4.14} | 69 +- .../files/arch/arm/boot/dts/_mt7623.dtsi | 804 - .../files/arch/arm/boot/dts/mt6323.dtsi | 241 - .../arch/arm/boot/dts/mt7623-NAND-ePHY.dts | 523 - .../files/arch/arm/boot/dts/mt7623-NAND.dts | 553 - .../files/arch/arm/boot/dts/mt7623-eMMC.dts | 547 - .../files/arch/arm/boot/dts/mt7623-evb.dts | 50 - .../arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 443 - .../files/drivers/char/hw_random/mtk-rng.c | 168 - .../files/drivers/crypto/mediatek/Makefile | 2 - .../files/drivers/crypto/mediatek/mtk-aes.c | 1304 -- .../drivers/crypto/mediatek/mtk-platform.c | 607 - .../drivers/crypto/mediatek/mtk-platform.h | 237 - .../files/drivers/crypto/mediatek/mtk-regs.h | 194 - .../files/drivers/crypto/mediatek/mtk-sha.c | 1358 -- target/linux/mediatek/image/32.mk | 19 +- target/linux/mediatek/modules.mk | 14 - ...6-reset-mediatek-mt2701-reset-driver.patch | 15 +- .../0012-clk-dont-disable-unused-clocks.patch | 0 ...27-net-next-mediatek-fix-DQL-support.patch | 13 +- ...-add-support-for-GMAC2-wired-to-ext-.patch | 14 +- .../patches-4.14/0033-dsa-multi-cpu.patch | 268 + ...-mediatek-disable-RX-VLan-offloading.patch | 8 +- ...k-honour-special-tag-bit-inside-RX-D.patch | 8 +- ...k-enable-special-tag-indication-for-.patch | 4 +- ...iatek-tell-GDMA-when-we-are-turning-.patch | 2 +- ...a-mediatek-turn-into-platform-driver.patch | 14 +- .../0046-net-mediatek-add-irq-delay.patch | 21 + .../0048-net-core-add-RPS-balancer.patch | 6 +- ...051-net-mediatek-increase-tx_timeout.patch | 2 +- .../0052-net-phy-add-FC.patch | 2 +- .../0062-mdio-atomic.patch | 2 +- .../0063-atomic-sleep.patch | 14 +- .../mediatek/patches-4.14/0064-dts.patch | 589 + .../0001-arch-arm-add-dts-build-code.patch | 23 - ...-MediaTek-PCIe-binding-documentation.patch | 154 - ...-support-for-PCIe-found-on-MT7623-MT.patch | 698 - ...ediatek-Add-MT2701-power-dt-bindings.patch | 75 - ...lk-mediatek-Add-MT2701-clock-support.patch | 1431 -- ...-MT2701-config-options-for-mediatek-.patch | 29 - ...ine-scpsys-to-support-multiple-platf.patch | 487 - ...oc-mediatek-Add-MT2701-scpsys-driver.patch | 194 - .../0010-clk-add-hifsys-reset.patch | 30 - .../0011-scpsys-various-fixes.patch | 20 - ...-clk-mediatek-enable-critical-clocks.patch | 69 - ...ort-CPU-mux-clocks-for-CPU-frequency.patch | 287 - .../0015-cpufreq-mediatek-add-driver.patch | 433 - .../0016-pwm-add-pwm-mediatek.patch | 274 - ...T6323-LED-support-into-MT6397-driver.patch | 27 - ...-Add-document-bindings-for-leds-mt63.patch | 78 - ...Add-the-description-for-LED-as-the-s.patch | 24 - ...leds-Add-LED-support-for-MT6323-PMIC.patch | 539 - ...-the-placement-at-which-the-mfd_cell.patch | 27 - ...ke-bootrom-work-with-upstream-driver.patch | 32 - .../0023-rng-add-mediatek-hw-rng.patch | 81 - ...ver-for-IR-remote-receiver-on-MT7623.patch | 1034 - ...-net-dsa-add-Mediatek-MT7530-binding.patch | 110 - ...6-net-mediatek-backport-v4.10-driver.patch | 1788 -- ...t-dsa-add-Mediatek-tag-RX-TX-handler.patch | 192 - ...t-mediatek-add-CDM-able-to-recognize.patch | 48 - ...-dsa-support-for-Mediatek-MT7530-swi.patch | 1584 -- .../0031-net-dsa-dsa-api-compat.patch | 106 - .../0033-net-dsa-add-multi-gmac-support.patch | 272 - ...t-dsa-mediatek-add-dual-gmac-support.patch | 91 - ...tek-fix-typos-inside-the-header-file.patch | 25 - ...ext-mediatek-bring-up-QDMA-RX-ring-0.patch | 128 - ...e-struct-dsa_device_ops-to-the-globa.patch | 46 - ...-flow_dissect-callback-to-struct-dsa.patch | 32 - ...-add-flow_dissect-callback-to-the-op.patch | 39 - ...041-net-next-dsa-fix-flow-dissection.patch | 65 - .../0046-net-mediatek-add-irq-delay.patch | 56 - ...k-split-IRQ-register-locking-into-TX.patch | 208 - .../0049-net-mediatek-add-rx-queue.patch | 20 - .../0050-net-mediatek-add-trgmii-clock.patch | 21 - ...sa-mediatek-add-software-phy-polling.patch | 68 - ...iatek-fixed-deadlock-captured-by-loc.patch | 105 - ...iatek-avoid-potential-invalid-memory.patch | 31 - ...0056-net-mediatek-add-hw-nat-support.patch | 119 - ...0057-net-mediatek-add-HW-QoS-support.patch | 121 - .../patches-4.9/0058-pinctrl-update.patch | 470 - .../mediatek/patches-4.9/0059-eth-fixes.patch | 511 - .../mediatek/patches-4.9/0060-eth-debug.patch | 69 - .../patches-4.9/0061-eth-up_down_lock.patch | 72 - .../base-files/lib/upgrade/platform.sh | 10 - target/linux/mpc85xx/image/Makefile | 12 +- .../102-powerpc-add-cmdline-override.patch | 2 +- target/linux/mvebu/config-4.9 | 457 - .../arm/boot/dts/armada-385-linksys-rango.dts | 455 - .../boot/dts/armada-385-linksys-shelby.dts | 115 - .../arm/boot/dts/armada-385-linksys-rango.dts | 455 - .../boot/dts/armada-385-linksys-shelby.dts | 115 - ...eeprom-ethtool-access-into-netdev-co.patch | 2 +- .../patches-4.4/002-add_powertables.patch | 748 - .../patches-4.4/003-add_switch_nodes.patch | 40 - .../patches-4.4/010-build_new_dtbs.patch | 11 - ..._nand-add-support-for-partial-chunks.patch | 428 - ...nand-Increase-the-initial-chunk-size.patch | 42 - ...Fix-initial-controller-configuration.patch | 104 - ...rovide-api-for-obtaining-IO-and-DRAM.patch | 94 - ...-mvneta-consolidate-autoneg-enabling.patch | 55 - ...ment-ethtool-autonegotiation-control.patch | 165 - ...the-default-queue-related-for-each-p.patch | 131 - ...ta-Associate-RX-queues-with-each-CPU.patch | 278 - ...034-net-mvneta-Add-naive-RSS-support.patch | 191 - ...035-net-mvneta-Configure-XPS-support.patch | 124 - ...rivial-cut-off-issue-in-mvneta_ethto.patch | 46 - ...he-CPU-choice-in-mvneta_percpu_elect.patch | 57 - ...mvneta-Use-on_each_cpu-when-possible.patch | 68 - ...y-the-queue-related-fields-from-each.patch | 179 - ...vneta_percpu_elect-function-should-b.patch | 68 - ...a-Fix-race-condition-during-stopping.patch | 128 - ...sort-the-headers-in-alphabetic-order.patch | 56 - ...ardware-buffer-management-helper-API.patch | 159 - ...d-support-for-hardware-buffer-manage.patch | 1684 -- ...et-mvneta-Use-the-new-hwbm-framework.patch | 359 - .../047-net-mvneta-Fix-spinlock-usage.patch | 52 - ...rror-messages-in-mvneta_port_down-fu.patch | 33 - ...ce-MVNETA_CPU_D_CACHE_LINE_SIZE-with.patch | 56 - ...hanging-MTU-when-using-per-cpu-proce.patch | 75 - ...-armada-38x-add-buffer-manager-nodes.patch | 53 - ...s-armada-xp-add-buffer-manager-nodes.patch | 53 - ...idRun-Armada-388-Clearfog-A1-DT-file.patch | 611 - ...8x-enable-buffer-manager-support-on-.patch | 256 - ...88-clearfog-remove-duplicate-mdio-en.patch | 41 - .../patches-4.4/100-find_active_root.patch | 62 - .../patches-4.4/102-revert_i2c_delay.patch | 15 - .../103-remove-nand-driver-bug.patch | 13 - ...04-linksys_mamba_disable_keep_config.patch | 10 - .../106-enable-bm-on-linksys-devices.patch | 107 - .../110-pxa3xxx_revert_irq_thread.patch | 69 - ...hy-MII-register-generation-to-a-libr.patch | 306 - ...y-register-generation-to-tabular-for.patch | 203 - ...hy-state-validation-from-register-ge.patch | 138 - ...-generate-swphy-registers-on-the-fly.patch | 204 - ...ty-of-fixed-phy-MII-register-reading.patch | 92 - ...-a-hook-for-link-up-link-down-events.patch | 183 - ...ell-88E1512-add-flow-control-support.patch | 26 - ...export-phy_start_machine-for-phylink.patch | 25 - ...-export-phy_speed_to_str-for-phylink.patch | 44 - .../129-phy-add-I2C-mdio-bus.patch | 163 - ...0-phylink-add-phylink-infrastructure.patch | 1005 - ...31-phylink-add-hooks-for-SFP-support.patch | 156 - ...add-phylink-based-SFP-module-support.patch | 1382 -- ...3-sfp-display-SFP-module-information.patch | 283 - .../134-net-mvneta-convert-to-phylink.patch | 708 - ...ed-phy-remove-fixed_phy_update_state.patch | 80 - ...ylink-add-ethtool-nway_reset-support.patch | 48 - ...37-net-mvneta-add-nway_reset-support.patch | 38 - ...138-phylink-add-flow-control-support.patch | 262 - ...add-flow-control-support-via-phylink.patch | 66 - ...ble-flow-control-for-PHY-connections.patch | 32 - ...e-flow-control-for-fixed-connections.patch | 53 - .../142-phylink-add-EEE-support.patch | 111 - .../143-net-mvneta-add-EEE-support.patch | 182 - ...44-phylink-add-module-EEPROM-support.patch | 137 - ...ta-add-module-EEPROM-reading-support.patch | 44 - ...sfp-phylink-hook-up-eeprom-functions.patch | 68 - .../147-net-mvneta-add-BQL-support.patch | 83 - ...2-gpio_mvebu_add_limited_pwm_support.patch | 433 - ...nd_mvebu_gpio_documentation_with_pwm.patch | 52 - ..._xp_add_pwm_properties_to_dtsi_files.patch | 149 - ...05-arm_mvebu_enable_pwm_in_defconfig.patch | 18 - ...0ac_use_pwm-fan_rather_than_gpio-fan.patch | 28 - .../207-armada-385-rd-mtd-partitions.patch | 19 - .../208-ARM-mvebu-385-ap-Add-partitions.patch | 34 - .../209-clearfog_switch_node.patch | 21 - ...a388-clearfog-add-SFP-module-support.patch | 84 - .../patches-4.4/300-reprobe_sfp_phy.patch | 96 - .../400-mvneta-tx-queue-workaround.patch | 36 - .../patches-4.9/002-add_powertables.patch | 748 - .../patches-4.9/003-add_switch_nodes.patch | 40 - .../004-add_sata_disk_activity_trigger.patch | 49 - .../patches-4.9/010-build_new_dtbs.patch | 11 - .../patches-4.9/102-revert_i2c_delay.patch | 15 - .../103-remove-nand-driver-bug.patch | 13 - ...04-linksys_mamba_disable_keep_config.patch | 10 - .../106-enable-bm-on-linksys-devices.patch | 107 - .../110-pxa3xxx_revert_irq_thread.patch | 69 - .../120-net-mvneta-add-BQL-support.patch | 83 - .../130-irqchip-armada-xp-backport.patch | 17 - ...0-gpio_mvebu_add_limited_pwm_support.patch | 433 - ...nd_mvebu_gpio_documentation_with_pwm.patch | 52 - ..._xp_add_pwm_properties_to_dtsi_files.patch | 149 - ...03-arm_mvebu_enable_pwm_in_defconfig.patch | 18 - ...0ac_use_pwm-fan_rather_than_gpio-fan.patch | 28 - .../205-armada-385-rd-mtd-partitions.patch | 19 - .../206-ARM-mvebu-385-ap-Add-partitions.patch | 35 - .../210-clearfog_switch_node.patch | 21 - ...a388-clearfog-add-SFP-module-support.patch | 84 - .../300-mvneta-tx-queue-workaround.patch | 36 - ...-a-hook-for-link-up-link-down-events.patch | 177 - ...move-phy-MMD-accessors-to-phy-core.c.patch | 292 - ..._-read-write-_mmd-generic-MMD-access.patch | 97 - ...etting-unsupported-EEE-advertisments.patch | 57 - ...phy-autonegotiation-after-EEE-advert.patch | 53 - ...allow-EEE-with-SGMII-interface-modes.patch | 21 - ...phylib-correctness-for-non-autoneg-s.patch | 199 - ...dd-802.3-clause-45-support-to-phylib.patch | 323 - ...up-clause-45-autonegotiation-restart.patch | 54 - ...ouble-read-clause-45-status-register.patch | 35 - ...ttings-table-to-support-more-than-32.patch | 142 - ...t-PHY-speed-and-duplex-string-genera.patch | 103 - ..._lookup_setting-and-guts-of-phy_supp.patch | 329 - ...export-phy_start_machine-for-phylink.patch | 22 - .../414-phy-add-I2C-mdio-bus.patch | 180 - ...5-phylink-add-phylink-infrastructure.patch | 1120 - ...16-phylink-add-hooks-for-SFP-support.patch | 177 - ...add-phylink-based-SFP-module-support.patch | 1477 -- ...8-sfp-display-SFP-module-information.patch | 280 - .../419-net-mvneta-convert-to-phylink.patch | 754 - ...le-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch | 58 - ...ylink-add-ethtool-nway_reset-support.patch | 44 - ...22-net-mvneta-add-nway_reset-support.patch | 35 - ...423-phylink-add-flow-control-support.patch | 232 - ...add-flow-control-support-via-phylink.patch | 76 - ...ble-flow-control-for-PHY-connections.patch | 28 - ...e-flow-control-for-fixed-connections.patch | 32 - .../427-phylink-add-EEE-support.patch | 116 - .../428-net-mvneta-add-EEE-support.patch | 179 - ...29-phylink-add-module-EEPROM-support.patch | 123 - ...ta-add-module-EEPROM-reading-support.patch | 41 - ...sfp-phylink-hook-up-eeprom-functions.patch | 65 - ...ell-88E1512-add-flow-control-support.patch | 24 - ...ell-88E1111-add-flow-control-support.patch | 22 - ...ell-88E1540-add-flow-control-support.patch | 22 - ...ate-PHY-interface-mode-to-MAC-driver.patch | 126 - ...ylink-ensure-link-drops-are-reported.patch | 52 - .../patches-4.9/450-reprobe_sfp_phy.patch | 119 - ...-add-ClearFog-Base-device-tree-files.patch | 540 - ...idrun-microsom-backport-improvements.patch | 185 - ...ix-marvell-phy-initialization-issues.patch | 51 - target/linux/mxs/Makefile | 2 +- target/linux/mxs/{config-4.9 => config-4.14} | 35 +- .../arch/arm/boot/dts/imx28-duckbill.dts | 139 - ...0-crypto-mxsdcp-provide-importexport.patch | 0 target/linux/octeon/Makefile | 2 +- target/linux/octeontx/Makefile | 26 + .../base-files/etc/board.d/02_network | 17 + target/linux/octeontx/base-files/etc/inittab | 5 + target/linux/octeontx/config-4.14 | 550 + target/linux/octeontx/image/Makefile | 21 + ...-support-for-rgmii-internal-delay-mo.patch | 139 + ...rx-workaround-BGX-TX-Underflow-issue.patch | 110 + target/linux/omap/Makefile | 2 +- target/linux/omap/{config-4.4 => config-4.14} | 110 +- .../001-omap4_pandaboard-wlan_fix.patch | 10 - target/linux/orion/config-4.4 | 244 - .../000-arm_openwrt_machtypes.patch | 8 - .../100-wrt350nv2_openwrt_partition_map.patch | 32 - .../101-wnr854t_partition_map.patch | 25 - .../patches-4.4/200-dt2_board_support.patch | 570 - .../patches-4.4/210-wn802t_support.patch | 75 - .../oxnas/base-files/lib/upgrade/platform.sh | 12 +- ...ackport-v4.7-0day-patches-from-Boris.patch | 81 +- ...mtd-nand-import-nand_hw_control_init.patch | 6 +- .../oxnas/patches-4.4/800-oxnas-ehci.patch | 2 +- .../oxnas/patches-4.4/999-libata-hacks.patch | 4 +- target/linux/pistachio/Makefile | 2 +- .../base-files/lib/upgrade/platform.sh | 2 +- .../pistachio/{config-4.9 => config-4.14} | 45 +- ...ine-img-mdc-Handle-early-status-read.patch | 2 +- ...mg-spfi-Implement-dual-and-quad-mode.patch | 0 ...-device-select-bits-for-SPFI-port-st.patch | 0 ...-device-0-configuration-for-all-devi.patch | 0 ...i-RX-maximum-burst-size-for-DMA-is-8.patch | 0 ...g-spfi-finish-every-transfer-cleanly.patch | 0 ...y-programming-min-delta-up-to-10-tim.patch | 0 ...istachio-Fix-wrong-SDHost-card-speed.patch | 0 ...-img-marduk-switch-mmc-to-1-bit-mode.patch | 0 ...or-support-mtd-name-from-device-tree.patch | 4 +- ...ength-of-ID-before-reading-bits-per-.patch | 2 +- ...JEDEC-manufacturer-ID-for-Gigadevice.patch | 16 +- ...413-mtd-Introduce-SPI-NAND-framework.patch | 6 +- ...mtd-spi-nand-Support-Gigadevice-GD5F.patch | 0 ...TS-img-marduk-add-nor-partition-name.patch | 0 ...S-img-marduk-add-nand-device-support.patch | 0 ...d-base-device-tree-for-Pistachio-SoC.patch | 983 - ...img-add-device-tree-for-Marduk-board.patch | 230 - ...PS-DTS-add-img-directory-to-Makefile.patch | 22 - .../701-net-micrel-Disable-PME.patch | 35 - target/linux/ramips/Makefile | 2 +- .../ramips/base-files/etc/board.d/01_leds | 6 +- .../ramips/base-files/etc/board.d/02_network | 11 - target/linux/ramips/base-files/etc/diag.sh | 5 +- target/linux/ramips/base-files/lib/ramips.sh | 9 - .../ramips/base-files/lib/upgrade/platform.sh | 9 +- target/linux/ramips/dts/AI-BR100.dts | 2 - target/linux/ramips/dts/GL-MT300A.dts | 2 - target/linux/ramips/dts/GL-MT750.dts | 2 - target/linux/ramips/dts/MIWIFI-R3.dts | 172 - target/linux/ramips/dts/PUPPIES.dts | 114 - target/linux/ramips/dts/R6220A.dts | 158 - target/linux/ramips/dts/R6220B.dts | 158 - target/linux/ramips/dts/mt7628an.dtsi | 2 +- .../drivers/net/ethernet/mtk/mdio.c | 1 + .../drivers/net/ethernet/mtk/mtk_eth_soc.c | 5 +- target/linux/ramips/image/Makefile | 4 - target/linux/ramips/image/mt7620.mk | 10 +- target/linux/ramips/image/mt7620nand.mk | 22 - target/linux/ramips/image/mt7621.mk | 89 +- target/linux/ramips/image/rt305x.mk | 2 +- target/linux/ramips/mt7620/config-4.14 | 1 - .../ramips/mt7620nand/profiles/00-default.mk | 17 - target/linux/ramips/mt7620nand/target.mk | 15 - target/linux/ramips/mt7621/target.mk | 2 - target/linux/ramips/mt76x8/config-4.14 | 1 - .../0032-USB-dwc2-add-device_reset.patch | 2 +- ...38-mtd-ralink-add-mt7620-nand-driver.patch | 2385 -- .../0043-spi-add-mt7621-support.patch | 5 +- ...d-spi-nor-add-w25q256-3b-mode-switch.patch | 10 +- .../patches-4.14/999-fix-m25p-shutdown.patch | 34 - target/linux/ramips/rt305x/config-4.14 | 1 - .../rb532/base-files/lib/upgrade/platform.sh | 6 +- target/linux/sunxi/Makefile | 2 +- .../sunxi/base-files/etc/board.d/02_network | 3 + target/linux/sunxi/config-4.14 | 604 + target/linux/sunxi/config-4.9 | 2 + target/linux/sunxi/cortexa53/config-default | 34 +- target/linux/sunxi/cortexa7/config-default | 4 +- target/linux/sunxi/cortexa8/config-default | 1 - target/linux/sunxi/image/cortex-a53.mk | 31 + target/linux/sunxi/image/cortex-a7.mk | 10 + ...dwmac-mdio-MDIOs-are-automatically-r.patch | 33 + ...-sun8i-Handle-integrated-external-MD.patch | 506 + ...stmmac-sun8i-Restore-the-compatibles.patch | 35 + ...-sun8i-fix-allwinner-leds-active-low.patch | 29 + ...ts-sunxi-Restore-EMAC-changes-boards.patch | 292 + ...dts-sunxi-h3-h5-Restore-EMAC-changes.patch | 54 + ...-h5-represent-the-mdio-switch-used-b.patch | 59 + ...s-allwinner-A64-Restore-EMAC-changes.patch | 184 + ...ner-add-snps-dwmac-mdio-compatible-t.patch | 28 + ...ts-allwinner-H5-Restore-EMAC-changes.patch | 120 + ...a64-add-Ethernet-PHY-regulator-for-s.patch | 51 + ...-sun8i-add-support-for-Orange-Pi-R1.patch} | 93 +- ...i-support-for-nanopi-neo-plus2-board.patch | 242 + .../115-musb-ignore-vbus-errors.patch | 26 + .../131-reset-add-h3-resets.patch | 92 + ...n8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch | 48 + ...s-sun8i-activate-SPI-on-Orange-Pi-R1.patch | 29 + .../220-ARM-dts-orange-pi-zero-plus.patch | 185 + ...un7i-Add-BCM53125-switch-nodes-to-th.patch | 88 + ...sunxi-always-enable-reset-controller.patch | 39 - ...ove-the-use-of-rational-computations.patch | 2 +- .../0007-clk-sunxi-ng-Add-A64-clocks.patch | 2 +- ...-setjmp-symbol-clashes-with-libpthre.patch | 130 - .../uml/patches-4.4/101-mconsole-exec.patch | 211 - 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target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch delete mode 100644 target/linux/ar71xx/patches-4.4/506-MIPS-ath79-prom-parse-redboot-args.patch delete mode 100644 target/linux/ar71xx/patches-4.4/507-MIPS-ath79-prom-add-myloader-support.patch delete mode 100644 target/linux/ar71xx/patches-4.4/508-MIPS-ath79-prom-image-command-line-hack.patch delete mode 100644 target/linux/ar71xx/patches-4.4/509-MIPS-ath79-process-board-kernel-option.patch delete mode 100644 target/linux/ar71xx/patches-4.4/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch delete mode 100644 target/linux/ar71xx/patches-4.4/520-MIPS-ath79-enable-UART-function.patch delete mode 100644 target/linux/ar71xx/patches-4.4/521-MIPS-ath79-enable-UART-for-early_serial.patch delete mode 100644 target/linux/ar71xx/patches-4.4/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch delete mode 100644 target/linux/ar71xx/patches-4.4/523-MIPS-ath79-OTP-support.patch delete mode 100644 target/linux/ar71xx/patches-4.4/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch delete mode 100644 target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch delete mode 100644 target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch delete mode 100644 target/linux/ar71xx/patches-4.4/602-MIPS-ath79-add-openwrt-stuff.patch delete mode 100644 target/linux/ar71xx/patches-4.4/603-MIPS-ath79-ap121-fixes.patch delete mode 100644 target/linux/ar71xx/patches-4.4/605-MIPS-ath79-db120-fixes.patch delete mode 100644 target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch delete mode 100644 target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch delete mode 100644 target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch delete mode 100644 target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch delete mode 100644 target/linux/ar71xx/patches-4.4/611-MIPS-ath79-wdt-timeout.patch delete mode 100644 target/linux/ar71xx/patches-4.4/612-MIPS-ath79-set-buffalo-txgain.patch delete mode 100644 target/linux/ar71xx/patches-4.4/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch delete mode 100644 target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch delete mode 100644 target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch delete mode 100644 target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch delete mode 100644 target/linux/ar71xx/patches-4.4/630-MIPS-ath79-fix-chained-irq-disable.patch delete mode 100644 target/linux/ar71xx/patches-4.4/631-MIPS-ath79-wmac-enable-set-led-pin.patch delete mode 100644 target/linux/ar71xx/patches-4.4/632-MIPS-ath79-gpio-enable-set-direction.patch delete mode 100644 target/linux/ar71xx/patches-4.4/634-MIPS-ath79-ar724x-clock-calculation-fixes.patch delete mode 100644 target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch delete mode 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target/linux/ar71xx/patches-4.4/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch delete mode 100644 target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch delete mode 100644 target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch delete mode 100644 target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch delete mode 100644 target/linux/ar71xx/patches-4.4/930-chipidea-pullup.patch create mode 100644 target/linux/ar71xx/patches-4.9/442-leds-gpio-allow-to-use-OPEN_-DRAIN-SOURCE-flags-with.patch create mode 100644 target/linux/ar71xx/patches-4.9/921-MIPS-ath79-add-even-more-register-defines-for-QCA956x-SoC.patch rename target/linux/archs38/{config-4.9 => config-4.14} (84%) create mode 100644 target/linux/archs38/image/uboot.env.txt rename target/linux/archs38/{patches-4.9 => patches-4.14}/700-stmmac-Disable-frame-filtering-completely.patch (98%) create mode 100644 target/linux/brcm47xx/config-4.14 create mode 100644 target/linux/brcm47xx/patches-4.14/031-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch create mode 100644 target/linux/brcm47xx/patches-4.14/159-cpu_fixes.patch create mode 100644 target/linux/brcm47xx/patches-4.14/160-kmap_coherent.patch create mode 100644 target/linux/brcm47xx/patches-4.14/209-b44-register-adm-switch.patch create mode 100644 target/linux/brcm47xx/patches-4.14/210-b44_phy_fix.patch create mode 100644 target/linux/brcm47xx/patches-4.14/280-activate_ssb_support_in_usb.patch create mode 100644 target/linux/brcm47xx/patches-4.14/300-fork_cacheflush.patch create mode 100644 target/linux/brcm47xx/patches-4.14/310-no_highpage.patch create mode 100644 target/linux/brcm47xx/patches-4.14/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch create mode 100644 target/linux/brcm47xx/patches-4.14/400-mtd-bcm47xxpart-get-nvram.patch create mode 100644 target/linux/brcm47xx/patches-4.14/610-pci_ide_fix.patch create mode 100644 target/linux/brcm47xx/patches-4.14/791-tg3-no-pci-sleep.patch create mode 100644 target/linux/brcm47xx/patches-4.14/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch create mode 100644 target/linux/brcm47xx/patches-4.14/820-wgt634u-nvram-fix.patch create mode 100644 target/linux/brcm47xx/patches-4.14/830-huawei_e970_support.patch create mode 100644 target/linux/brcm47xx/patches-4.14/831-old_gpio_wdt.patch create mode 100644 target/linux/brcm47xx/patches-4.14/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch create mode 100644 target/linux/brcm47xx/patches-4.14/901-Revert-bcma-switch-GPIO-portions-to-use-GPIOLIB_IRQC.patch create mode 100644 target/linux/brcm47xx/patches-4.14/940-bcm47xx-yenta.patch create mode 100644 target/linux/brcm47xx/patches-4.14/976-ssb_increase_pci_delay.patch create mode 100644 target/linux/brcm47xx/patches-4.14/999-wl_exports.patch create mode 100644 target/linux/brcm47xx/patches-4.4/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch create mode 100644 target/linux/brcm47xx/patches-4.9/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch create mode 100644 target/linux/brcm63xx/config-4.14 create mode 100644 target/linux/brcm63xx/config-4.9 create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch create mode 100644 target/linux/brcm63xx/patches-4.14/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch create mode 100644 target/linux/brcm63xx/patches-4.14/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch create mode 100644 target/linux/brcm63xx/patches-4.14/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch create mode 100644 target/linux/brcm63xx/patches-4.14/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch create mode 100644 target/linux/brcm63xx/patches-4.14/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch create mode 100644 target/linux/brcm63xx/patches-4.14/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch create mode 100644 target/linux/brcm63xx/patches-4.14/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch create mode 100644 target/linux/brcm63xx/patches-4.14/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch create mode 100644 target/linux/brcm63xx/patches-4.14/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch create mode 100644 target/linux/brcm63xx/patches-4.14/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch create mode 100644 target/linux/brcm63xx/patches-4.14/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch create mode 100644 target/linux/brcm63xx/patches-4.14/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch create mode 100644 target/linux/brcm63xx/patches-4.14/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch create mode 100644 target/linux/brcm63xx/patches-4.14/122-mtd-bcm63xxpart-add-of_match_table.patch create mode 100644 target/linux/brcm63xx/patches-4.14/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch create mode 100644 target/linux/brcm63xx/patches-4.14/130-pinctrl-add-bcm63xx-base-code.patch create mode 100644 target/linux/brcm63xx/patches-4.14/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch create mode 100644 target/linux/brcm63xx/patches-4.14/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch create mode 100644 target/linux/brcm63xx/patches-4.14/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch create mode 100644 target/linux/brcm63xx/patches-4.14/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch create mode 100644 target/linux/brcm63xx/patches-4.14/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch create mode 100644 target/linux/brcm63xx/patches-4.14/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch create mode 100644 target/linux/brcm63xx/patches-4.14/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch create mode 100644 target/linux/brcm63xx/patches-4.14/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch create mode 100644 target/linux/brcm63xx/patches-4.14/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch create mode 100644 target/linux/brcm63xx/patches-4.14/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch create mode 100644 target/linux/brcm63xx/patches-4.14/309-cfe_version_mod.patch create mode 100644 target/linux/brcm63xx/patches-4.14/310-cfe_simplify_detection.patch create mode 100644 target/linux/brcm63xx/patches-4.14/311-bcm63xxpart_use_cfedetection.patch create mode 100644 target/linux/brcm63xx/patches-4.14/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch create mode 100644 target/linux/brcm63xx/patches-4.14/321-irqchip-add-support-for-bcm6345-style-external-inter.patch create mode 100644 target/linux/brcm63xx/patches-4.14/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch create mode 100644 target/linux/brcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch create mode 100644 target/linux/brcm63xx/patches-4.14/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch create mode 100644 target/linux/brcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch create mode 100644 target/linux/brcm63xx/patches-4.14/332-MIPS-BCM63XX-detect-BCM6328-variants.patch create mode 100644 target/linux/brcm63xx/patches-4.14/333-MIPS-BCM63XX-detect-BCM6362-variants.patch create mode 100644 target/linux/brcm63xx/patches-4.14/334-MIPS-BCM63XX-detect-BCM6368-variants.patch create mode 100644 target/linux/brcm63xx/patches-4.14/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch create mode 100644 target/linux/brcm63xx/patches-4.14/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch create mode 100644 target/linux/brcm63xx/patches-4.14/337-MIPS-BCM63XX-widen-cpuid-field.patch create mode 100644 target/linux/brcm63xx/patches-4.14/338-MIPS-BCM63XX-increase-number-of-IRQs.patch create mode 100644 target/linux/brcm63xx/patches-4.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch create mode 100644 target/linux/brcm63xx/patches-4.14/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch create mode 100644 target/linux/brcm63xx/patches-4.14/341-MIPS-BCM63XX-add-support-for-BCM6318.patch create mode 100644 target/linux/brcm63xx/patches-4.14/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch create mode 100644 target/linux/brcm63xx/patches-4.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch create mode 100644 target/linux/brcm63xx/patches-4.14/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch create mode 100644 target/linux/brcm63xx/patches-4.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch create mode 100644 target/linux/brcm63xx/patches-4.14/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch create mode 100644 target/linux/brcm63xx/patches-4.14/347-MIPS-BCM6318-USB-support.patch create mode 100644 target/linux/brcm63xx/patches-4.14/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch create mode 100644 target/linux/brcm63xx/patches-4.14/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch create mode 100644 target/linux/brcm63xx/patches-4.14/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch create mode 100644 target/linux/brcm63xx/patches-4.14/351-set-board-usbh-ports.patch create mode 100644 target/linux/brcm63xx/patches-4.14/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch create mode 100644 target/linux/brcm63xx/patches-4.14/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch create mode 100644 target/linux/brcm63xx/patches-4.14/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch create mode 100644 target/linux/brcm63xx/patches-4.14/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch create mode 100644 target/linux/brcm63xx/patches-4.14/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch create mode 100644 target/linux/brcm63xx/patches-4.14/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch create mode 100644 target/linux/brcm63xx/patches-4.14/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch create mode 100644 target/linux/brcm63xx/patches-4.14/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch create mode 100644 target/linux/brcm63xx/patches-4.14/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch create mode 100644 target/linux/brcm63xx/patches-4.14/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch create mode 100644 target/linux/brcm63xx/patches-4.14/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch create mode 100644 target/linux/brcm63xx/patches-4.14/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch create mode 100644 target/linux/brcm63xx/patches-4.14/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch create mode 100644 target/linux/brcm63xx/patches-4.14/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch create mode 100644 target/linux/brcm63xx/patches-4.14/371_add_of_node_available_by_alias.patch create mode 100644 target/linux/brcm63xx/patches-4.14/372_dont_register_pflash_when_available_in_dtb.patch create mode 100644 target/linux/brcm63xx/patches-4.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch create mode 100644 target/linux/brcm63xx/patches-4.14/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch create mode 100644 target/linux/brcm63xx/patches-4.14/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch create mode 100644 target/linux/brcm63xx/patches-4.14/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch create mode 100644 target/linux/brcm63xx/patches-4.14/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch create mode 100644 target/linux/brcm63xx/patches-4.14/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch create mode 100644 target/linux/brcm63xx/patches-4.14/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch create mode 100644 target/linux/brcm63xx/patches-4.14/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch create mode 100644 target/linux/brcm63xx/patches-4.14/383-bcm63xx_select_pinctrl.patch create mode 100644 target/linux/brcm63xx/patches-4.14/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch create mode 100644 target/linux/brcm63xx/patches-4.14/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch create mode 100644 target/linux/brcm63xx/patches-4.14/391-MIPS-BCM63XX-do-not-register-uart.patch create mode 100644 target/linux/brcm63xx/patches-4.14/392-MIPS-BCM63XX-remove-leds-and-buttons.patch create mode 100644 target/linux/brcm63xx/patches-4.14/400-bcm963xx_flashmap.patch create mode 100644 target/linux/brcm63xx/patches-4.14/401-bcm963xx_real_rootfs_length.patch create mode 100644 target/linux/brcm63xx/patches-4.14/402_bcm63xx_enet_vlan_incoming_fixed.patch create mode 100644 target/linux/brcm63xx/patches-4.14/403-6358-enet1-external-mii-clk.patch create mode 100644 target/linux/brcm63xx/patches-4.14/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch create mode 100644 target/linux/brcm63xx/patches-4.14/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch create mode 100644 target/linux/brcm63xx/patches-4.14/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch create mode 100644 target/linux/brcm63xx/patches-4.14/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch create mode 100644 target/linux/brcm63xx/patches-4.14/415-MIPS-BCM63XX-export-the-attached-flash-type.patch create mode 100644 target/linux/brcm63xx/patches-4.14/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch create mode 100644 target/linux/brcm63xx/patches-4.14/420-BCM63XX-add-endian-check-for-ath9k.patch create mode 100644 target/linux/brcm63xx/patches-4.14/421-BCM63XX-add-led-pin-for-ath9k.patch create mode 100644 target/linux/brcm63xx/patches-4.14/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch create mode 100644 target/linux/brcm63xx/patches-4.14/423-bcm63xx_enet_add_b53_support.patch create mode 100644 target/linux/brcm63xx/patches-4.14/424-bcm63xx_enet_no_request_mem_region.patch create mode 100644 target/linux/brcm63xx/patches-4.14/427-boards_probe_switch.patch create mode 100644 target/linux/brcm63xx/patches-4.14/499-allow_better_context_for_board_patches.patch create mode 100644 target/linux/brcm63xx/patches-4.14/500-board-D4PW.patch create mode 100644 target/linux/brcm63xx/patches-4.14/501-board-NB4.patch create mode 100644 target/linux/brcm63xx/patches-4.14/502-board-96338W2_E7T.patch create mode 100644 target/linux/brcm63xx/patches-4.14/503-board-CPVA642.patch create mode 100644 target/linux/brcm63xx/patches-4.14/504-board_dsl_274xb_rev_c.patch create mode 100644 target/linux/brcm63xx/patches-4.14/505-board_spw500v.patch create mode 100644 target/linux/brcm63xx/patches-4.14/506-board_gw6200_gw6000.patch create mode 100644 target/linux/brcm63xx/patches-4.14/507-board-MAGIC.patch create mode 100644 target/linux/brcm63xx/patches-4.14/508-board_hw553.patch create mode 100644 target/linux/brcm63xx/patches-4.14/509-board_rta1320_16m.patch create mode 100644 target/linux/brcm63xx/patches-4.14/510-board_spw303v.patch create mode 100644 target/linux/brcm63xx/patches-4.14/511-board_V2500V.patch create mode 100644 target/linux/brcm63xx/patches-4.14/512-board_BTV2110.patch create mode 100644 target/linux/brcm63xx/patches-4.14/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch create mode 100644 target/linux/brcm63xx/patches-4.14/514-board_ct536_ct5621.patch create mode 100644 target/linux/brcm63xx/patches-4.14/515-board_DWV-S0_fixes.patch create mode 100644 target/linux/brcm63xx/patches-4.14/516-board_96348A-122.patch create mode 100644 target/linux/brcm63xx/patches-4.14/519_board_CPVA502plus.patch create mode 100644 target/linux/brcm63xx/patches-4.14/520-bcm63xx-add-support-for-96368MVWG-board.patch create mode 100644 target/linux/brcm63xx/patches-4.14/521-bcm63xx-add-support-for-96368MVNgr-board.patch create mode 100644 target/linux/brcm63xx/patches-4.14/522-MIPS-BCM63XX-add-96328avng-reference-board.patch create mode 100644 target/linux/brcm63xx/patches-4.14/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch create mode 100644 target/linux/brcm63xx/patches-4.14/524-board_dsl_274xb_rev_f.patch create mode 100644 target/linux/brcm63xx/patches-4.14/525-board_96348w3.patch create mode 100644 target/linux/brcm63xx/patches-4.14/526-board_CT6373-1.patch create mode 100644 target/linux/brcm63xx/patches-4.14/527-board_dva-g3810bn-tl-1.patch create mode 100644 target/linux/brcm63xx/patches-4.14/528-board_nb6.patch create mode 100644 target/linux/brcm63xx/patches-4.14/529-board_fast2604.patch create mode 100644 target/linux/brcm63xx/patches-4.14/530-board_A4001N1.patch create mode 100644 target/linux/brcm63xx/patches-4.14/531-board_AR-5387un.patch create mode 100644 target/linux/brcm63xx/patches-4.14/532-board_AR-5381u.patch create mode 100644 target/linux/brcm63xx/patches-4.14/533-board_rta770bw.patch create mode 100644 target/linux/brcm63xx/patches-4.14/534-board_hw556.patch create mode 100644 target/linux/brcm63xx/patches-4.14/535-board_rta770w.patch create mode 100644 target/linux/brcm63xx/patches-4.14/536-board_fast2704.patch create mode 100644 target/linux/brcm63xx/patches-4.14/537-board_fast2504n.patch create mode 100644 target/linux/brcm63xx/patches-4.14/555-board_96318ref.patch create mode 100644 target/linux/brcm63xx/patches-4.14/556-board_96318ref_p300.patch create mode 100644 target/linux/brcm63xx/patches-4.14/557-board_bcm963269bhr.patch create mode 100644 target/linux/brcm63xx/patches-4.14/558-board_AR1004G.patch create mode 100644 target/linux/brcm63xx/patches-4.14/559-board_vw6339gu.patch create mode 100644 target/linux/brcm63xx/patches-4.14/560-board_963268gu_p300.patch create mode 100644 target/linux/brcm63xx/patches-4.14/561-board_WAP-5813n.patch create mode 100644 target/linux/brcm63xx/patches-4.14/562-board_VR-3025u.patch create mode 100644 target/linux/brcm63xx/patches-4.14/563-board_VR-3025un.patch create mode 100644 target/linux/brcm63xx/patches-4.14/564-board_P870HW-51a_v2.patch create mode 100644 target/linux/brcm63xx/patches-4.14/565-board_hw520.patch create mode 100644 target/linux/brcm63xx/patches-4.14/566-board_A4001N.patch create mode 100644 target/linux/brcm63xx/patches-4.14/567-board_dsl-2751b_e1.patch create mode 100644 target/linux/brcm63xx/patches-4.14/568-board_DGND3700v1_3800B.patch create mode 100644 target/linux/brcm63xx/patches-4.14/569-board_homehub2a.patch create mode 100644 target/linux/brcm63xx/patches-4.14/570-board_HG655b.patch create mode 100644 target/linux/brcm63xx/patches-4.14/571-board_fast2704n.patch create mode 100644 target/linux/brcm63xx/patches-4.14/572-board_VR-3026e.patch create mode 100644 target/linux/brcm63xx/patches-4.14/573-board_R5010UNv2.patch create mode 100644 target/linux/brcm63xx/patches-4.14/574-board_HG622.patch create mode 100644 target/linux/brcm63xx/patches-4.14/575-board_EVG2000.patch create mode 100644 target/linux/brcm63xx/patches-4.14/576-board_AV4202N.patch create mode 100644 target/linux/brcm63xx/patches-4.14/577-board_VH4032N.patch create mode 100644 target/linux/brcm63xx/patches-4.14/578-board_R1000H.patch create mode 100644 target/linux/brcm63xx/patches-4.14/579-board_AR-5315u.patch create mode 100644 target/linux/brcm63xx/patches-4.14/580-board_AD1018.patch create mode 100644 target/linux/brcm63xx/patches-4.14/800-wl_exports.patch create mode 100644 target/linux/brcm63xx/patches-4.14/801-ssb_export_fallback_sprom.patch create mode 100644 target/linux/brcm63xx/patches-4.14/802-rtl8367r_fix_RGMII_support.patch create mode 100644 target/linux/brcm63xx/patches-4.14/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch create mode 100644 target/linux/brcm63xx/patches-4.14/804-bcm63xx_enet_63268_rgmii_ports.patch create mode 100644 target/linux/brcm63xx/patches-4.4/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch create mode 100644 target/linux/brcm63xx/patches-4.4/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch create mode 100644 target/linux/brcm63xx/patches-4.4/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch create mode 100644 target/linux/brcm63xx/patches-4.4/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.11-01-mtd-m25p80-consider-max-message-size-in-m25p80_read.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-01-spi-bcm63xx-make-spi-subsystem-aware-of-message-size.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-02-spi-bcm63xx-document-device-tree-bindings.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-03-spi-bcm63xx-add-support-for-probing-through-devicetr.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-04-spi-bcm63xx-hsspi-allow-providing-clock-rate-through.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-05-spi-bcm63xx-hsspi-document-device-tree-bindings.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-06-spi-bcm63xx-hsspi-add-support-for-probing-through-de.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-07-mdio_bus-Issue-GPIO-RESET-to-PHYs.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.12-08-net-phy-Call-bus-reset-after-releasing-PHYs-from-res.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.13-01-leds-bcm6328-fix-signal-source-assignment-for-high-l.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch create mode 100644 target/linux/brcm63xx/patches-4.9/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch create mode 100644 target/linux/brcm63xx/patches-4.9/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch create mode 100644 target/linux/brcm63xx/patches-4.9/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch create mode 100644 target/linux/brcm63xx/patches-4.9/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch create mode 100644 target/linux/brcm63xx/patches-4.9/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch create mode 100644 target/linux/brcm63xx/patches-4.9/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch create mode 100644 target/linux/brcm63xx/patches-4.9/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch create mode 100644 target/linux/brcm63xx/patches-4.9/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch create mode 100644 target/linux/brcm63xx/patches-4.9/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch create mode 100644 target/linux/brcm63xx/patches-4.9/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch create mode 100644 target/linux/brcm63xx/patches-4.9/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch create mode 100644 target/linux/brcm63xx/patches-4.9/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/111-MIPS-BCM63XX-allow-NULL-clock-for-clk_get_rate.patch create mode 100644 target/linux/brcm63xx/patches-4.9/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch create mode 100644 target/linux/brcm63xx/patches-4.9/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch create mode 100644 target/linux/brcm63xx/patches-4.9/122-mtd-bcm63xxpart-add-of_match_table.patch create mode 100644 target/linux/brcm63xx/patches-4.9/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch create mode 100644 target/linux/brcm63xx/patches-4.9/130-pinctrl-add-bcm63xx-base-code.patch create mode 100644 target/linux/brcm63xx/patches-4.9/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch create mode 100644 target/linux/brcm63xx/patches-4.9/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch create mode 100644 target/linux/brcm63xx/patches-4.9/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch create mode 100644 target/linux/brcm63xx/patches-4.9/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch create mode 100644 target/linux/brcm63xx/patches-4.9/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch create mode 100644 target/linux/brcm63xx/patches-4.9/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch create mode 100644 target/linux/brcm63xx/patches-4.9/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch create mode 100644 target/linux/brcm63xx/patches-4.9/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch create mode 100644 target/linux/brcm63xx/patches-4.9/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch create mode 100644 target/linux/brcm63xx/patches-4.9/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch create mode 100644 target/linux/brcm63xx/patches-4.9/309-cfe_version_mod.patch create mode 100644 target/linux/brcm63xx/patches-4.9/310-cfe_simplify_detection.patch create mode 100644 target/linux/brcm63xx/patches-4.9/311-bcm63xxpart_use_cfedetection.patch create mode 100644 target/linux/brcm63xx/patches-4.9/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch create mode 100644 target/linux/brcm63xx/patches-4.9/321-irqchip-add-support-for-bcm6345-style-external-inter.patch create mode 100644 target/linux/brcm63xx/patches-4.9/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch create mode 100644 target/linux/brcm63xx/patches-4.9/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch create mode 100644 target/linux/brcm63xx/patches-4.9/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch create mode 100644 target/linux/brcm63xx/patches-4.9/331-MIPS-BCM63XX-define-variant-id-field.patch create mode 100644 target/linux/brcm63xx/patches-4.9/332-MIPS-BCM63XX-detect-BCM6328-variants.patch create mode 100644 target/linux/brcm63xx/patches-4.9/333-MIPS-BCM63XX-detect-BCM6362-variants.patch create mode 100644 target/linux/brcm63xx/patches-4.9/334-MIPS-BCM63XX-detect-BCM6368-variants.patch create mode 100644 target/linux/brcm63xx/patches-4.9/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch create mode 100644 target/linux/brcm63xx/patches-4.9/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch create mode 100644 target/linux/brcm63xx/patches-4.9/337-MIPS-BCM63XX-widen-cpuid-field.patch create mode 100644 target/linux/brcm63xx/patches-4.9/338-MIPS-BCM63XX-increase-number-of-IRQs.patch create mode 100644 target/linux/brcm63xx/patches-4.9/339-MIPS-BCM63XX-add-support-for-BCM63268.patch create mode 100644 target/linux/brcm63xx/patches-4.9/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch create mode 100644 target/linux/brcm63xx/patches-4.9/341-MIPS-BCM63XX-add-support-for-BCM6318.patch create mode 100644 target/linux/brcm63xx/patches-4.9/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch create mode 100644 target/linux/brcm63xx/patches-4.9/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch create mode 100644 target/linux/brcm63xx/patches-4.9/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch create mode 100644 target/linux/brcm63xx/patches-4.9/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch create mode 100644 target/linux/brcm63xx/patches-4.9/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch create mode 100644 target/linux/brcm63xx/patches-4.9/347-MIPS-BCM6318-USB-support.patch create mode 100644 target/linux/brcm63xx/patches-4.9/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch create mode 100644 target/linux/brcm63xx/patches-4.9/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch create mode 100644 target/linux/brcm63xx/patches-4.9/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch create mode 100644 target/linux/brcm63xx/patches-4.9/351-set-board-usbh-ports.patch create mode 100644 target/linux/brcm63xx/patches-4.9/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch create mode 100644 target/linux/brcm63xx/patches-4.9/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch create mode 100644 target/linux/brcm63xx/patches-4.9/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch create mode 100644 target/linux/brcm63xx/patches-4.9/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch create mode 100644 target/linux/brcm63xx/patches-4.9/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch create mode 100644 target/linux/brcm63xx/patches-4.9/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch create mode 100644 target/linux/brcm63xx/patches-4.9/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch create mode 100644 target/linux/brcm63xx/patches-4.9/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch create mode 100644 target/linux/brcm63xx/patches-4.9/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch create mode 100644 target/linux/brcm63xx/patches-4.9/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch create mode 100644 target/linux/brcm63xx/patches-4.9/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch create mode 100644 target/linux/brcm63xx/patches-4.9/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch create mode 100644 target/linux/brcm63xx/patches-4.9/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch create mode 100644 target/linux/brcm63xx/patches-4.9/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch create mode 100644 target/linux/brcm63xx/patches-4.9/371_add_of_node_available_by_alias.patch create mode 100644 target/linux/brcm63xx/patches-4.9/372_dont_register_pflash_when_available_in_dtb.patch create mode 100644 target/linux/brcm63xx/patches-4.9/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch create mode 100644 target/linux/brcm63xx/patches-4.9/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch create mode 100644 target/linux/brcm63xx/patches-4.9/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch create mode 100644 target/linux/brcm63xx/patches-4.9/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch create mode 100644 target/linux/brcm63xx/patches-4.9/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch create mode 100644 target/linux/brcm63xx/patches-4.9/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch create mode 100644 target/linux/brcm63xx/patches-4.9/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch create mode 100644 target/linux/brcm63xx/patches-4.9/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch create mode 100644 target/linux/brcm63xx/patches-4.9/383-bcm63xx_select_pinctrl.patch create mode 100644 target/linux/brcm63xx/patches-4.9/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch create mode 100644 target/linux/brcm63xx/patches-4.9/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch create mode 100644 target/linux/brcm63xx/patches-4.9/391-MIPS-BCM63XX-do-not-register-uart.patch create mode 100644 target/linux/brcm63xx/patches-4.9/392-MIPS-BCM63XX-remove-leds-and-buttons.patch create mode 100644 target/linux/brcm63xx/patches-4.9/400-bcm963xx_flashmap.patch create mode 100644 target/linux/brcm63xx/patches-4.9/401-bcm963xx_real_rootfs_length.patch create mode 100644 target/linux/brcm63xx/patches-4.9/402_bcm63xx_enet_vlan_incoming_fixed.patch create mode 100644 target/linux/brcm63xx/patches-4.9/403-6358-enet1-external-mii-clk.patch create mode 100644 target/linux/brcm63xx/patches-4.9/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch create mode 100644 target/linux/brcm63xx/patches-4.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch create mode 100644 target/linux/brcm63xx/patches-4.9/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch create mode 100644 target/linux/brcm63xx/patches-4.9/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch create mode 100644 target/linux/brcm63xx/patches-4.9/415-MIPS-BCM63XX-export-the-attached-flash-type.patch create mode 100644 target/linux/brcm63xx/patches-4.9/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch create mode 100644 target/linux/brcm63xx/patches-4.9/420-BCM63XX-add-endian-check-for-ath9k.patch create mode 100644 target/linux/brcm63xx/patches-4.9/421-BCM63XX-add-led-pin-for-ath9k.patch create mode 100644 target/linux/brcm63xx/patches-4.9/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch create mode 100644 target/linux/brcm63xx/patches-4.9/423-bcm63xx_enet_add_b53_support.patch create mode 100644 target/linux/brcm63xx/patches-4.9/424-bcm63xx_enet_no_request_mem_region.patch create mode 100644 target/linux/brcm63xx/patches-4.9/427-boards_probe_switch.patch create mode 100644 target/linux/brcm63xx/patches-4.9/499-allow_better_context_for_board_patches.patch create mode 100644 target/linux/brcm63xx/patches-4.9/500-board-D4PW.patch create mode 100644 target/linux/brcm63xx/patches-4.9/501-board-NB4.patch create mode 100644 target/linux/brcm63xx/patches-4.9/502-board-96338W2_E7T.patch create mode 100644 target/linux/brcm63xx/patches-4.9/503-board-CPVA642.patch create mode 100644 target/linux/brcm63xx/patches-4.9/504-board_dsl_274xb_rev_c.patch create mode 100644 target/linux/brcm63xx/patches-4.9/505-board_spw500v.patch create mode 100644 target/linux/brcm63xx/patches-4.9/506-board_gw6200_gw6000.patch create mode 100644 target/linux/brcm63xx/patches-4.9/507-board-MAGIC.patch create mode 100644 target/linux/brcm63xx/patches-4.9/508-board_hw553.patch create mode 100644 target/linux/brcm63xx/patches-4.9/509-board_rta1320_16m.patch create mode 100644 target/linux/brcm63xx/patches-4.9/510-board_spw303v.patch create mode 100644 target/linux/brcm63xx/patches-4.9/511-board_V2500V.patch create mode 100644 target/linux/brcm63xx/patches-4.9/512-board_BTV2110.patch create mode 100644 target/linux/brcm63xx/patches-4.9/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch create mode 100644 target/linux/brcm63xx/patches-4.9/514-board_ct536_ct5621.patch create mode 100644 target/linux/brcm63xx/patches-4.9/515-board_DWV-S0_fixes.patch create mode 100644 target/linux/brcm63xx/patches-4.9/516-board_96348A-122.patch create mode 100644 target/linux/brcm63xx/patches-4.9/519_board_CPVA502plus.patch create mode 100644 target/linux/brcm63xx/patches-4.9/520-bcm63xx-add-support-for-96368MVWG-board.patch create mode 100644 target/linux/brcm63xx/patches-4.9/521-bcm63xx-add-support-for-96368MVNgr-board.patch create mode 100644 target/linux/brcm63xx/patches-4.9/522-MIPS-BCM63XX-add-96328avng-reference-board.patch create mode 100644 target/linux/brcm63xx/patches-4.9/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch create mode 100644 target/linux/brcm63xx/patches-4.9/524-board_dsl_274xb_rev_f.patch create mode 100644 target/linux/brcm63xx/patches-4.9/525-board_96348w3.patch create mode 100644 target/linux/brcm63xx/patches-4.9/526-board_CT6373-1.patch create mode 100644 target/linux/brcm63xx/patches-4.9/527-board_dva-g3810bn-tl-1.patch create mode 100644 target/linux/brcm63xx/patches-4.9/528-board_nb6.patch create mode 100644 target/linux/brcm63xx/patches-4.9/529-board_fast2604.patch create mode 100644 target/linux/brcm63xx/patches-4.9/530-board_A4001N1.patch create mode 100644 target/linux/brcm63xx/patches-4.9/531-board_AR-5387un.patch create mode 100644 target/linux/brcm63xx/patches-4.9/532-board_AR-5381u.patch create mode 100644 target/linux/brcm63xx/patches-4.9/533-board_rta770bw.patch create mode 100644 target/linux/brcm63xx/patches-4.9/534-board_hw556.patch create mode 100644 target/linux/brcm63xx/patches-4.9/535-board_rta770w.patch create mode 100644 target/linux/brcm63xx/patches-4.9/536-board_fast2704.patch create mode 100644 target/linux/brcm63xx/patches-4.9/537-board_fast2504n.patch create mode 100644 target/linux/brcm63xx/patches-4.9/555-board_96318ref.patch create mode 100644 target/linux/brcm63xx/patches-4.9/556-board_96318ref_p300.patch create mode 100644 target/linux/brcm63xx/patches-4.9/557-board_bcm963269bhr.patch create mode 100644 target/linux/brcm63xx/patches-4.9/558-board_AR1004G.patch create mode 100644 target/linux/brcm63xx/patches-4.9/559-board_vw6339gu.patch create mode 100644 target/linux/brcm63xx/patches-4.9/560-board_963268gu_p300.patch create mode 100644 target/linux/brcm63xx/patches-4.9/561-board_WAP-5813n.patch create mode 100644 target/linux/brcm63xx/patches-4.9/562-board_VR-3025u.patch create mode 100644 target/linux/brcm63xx/patches-4.9/563-board_VR-3025un.patch create mode 100644 target/linux/brcm63xx/patches-4.9/564-board_P870HW-51a_v2.patch create mode 100644 target/linux/brcm63xx/patches-4.9/565-board_hw520.patch create mode 100644 target/linux/brcm63xx/patches-4.9/566-board_A4001N.patch create mode 100644 target/linux/brcm63xx/patches-4.9/567-board_dsl-2751b_e1.patch create mode 100644 target/linux/brcm63xx/patches-4.9/568-board_DGND3700v1_3800B.patch create mode 100644 target/linux/brcm63xx/patches-4.9/569-board_homehub2a.patch create mode 100644 target/linux/brcm63xx/patches-4.9/570-board_HG655b.patch create mode 100644 target/linux/brcm63xx/patches-4.9/571-board_fast2704n.patch create mode 100644 target/linux/brcm63xx/patches-4.9/572-board_VR-3026e.patch create mode 100644 target/linux/brcm63xx/patches-4.9/573-board_R5010UNv2.patch create mode 100644 target/linux/brcm63xx/patches-4.9/574-board_HG622.patch create mode 100644 target/linux/brcm63xx/patches-4.9/575-board_EVG2000.patch create mode 100644 target/linux/brcm63xx/patches-4.9/576-board_AV4202N.patch create mode 100644 target/linux/brcm63xx/patches-4.9/577-board_VH4032N.patch create mode 100644 target/linux/brcm63xx/patches-4.9/578-board_R1000H.patch create mode 100644 target/linux/brcm63xx/patches-4.9/579-board_AR-5315u.patch create mode 100644 target/linux/brcm63xx/patches-4.9/580-board_AD1018.patch create mode 100644 target/linux/brcm63xx/patches-4.9/800-wl_exports.patch create mode 100644 target/linux/brcm63xx/patches-4.9/801-ssb_export_fallback_sprom.patch create mode 100644 target/linux/brcm63xx/patches-4.9/802-rtl8367r_fix_RGMII_support.patch create mode 100644 target/linux/brcm63xx/patches-4.9/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch create mode 100644 target/linux/brcm63xx/patches-4.9/804-bcm63xx_enet_63268_rgmii_ports.patch rename target/linux/cns3xxx/{config-4.9 => config-4.14} (73%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/000-cns3xxx_arch_include.patch (83%) create mode 100644 target/linux/cns3xxx/patches-4.14/001-arm_openwrt_machtypes.patch rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/010-arm_introduce-dma-fiq-irq-broadcast.patch (95%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/020-watchdog_support.patch (95%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/025-smp_support.patch (90%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/030-pcie_clock.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/040-fiq_support.patch (91%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/045-twd_base.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/055-pcie_io.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/060-pcie_abort.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/065-pcie_skip_inactive.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/070-i2c_support.patch (86%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/075-spi_support.patch (80%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/080-sata_support.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/090-timers.patch (98%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/093-add-virt-pci-io-mapping.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/095-gpio_support.patch (97%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/097-l2x0_cmdline_disable.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/100-laguna_support.patch (93%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/101-laguna_sdhci_card_detect.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/110-pci_isolated_interrupts.patch (100%) rename target/linux/cns3xxx/{patches-4.9 => patches-4.14}/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch (88%) create mode 100644 target/linux/cns3xxx/patches-4.14/200-broadcom_phy_reinit.patch create mode 100644 target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch delete mode 100644 target/linux/cns3xxx/patches-4.9/001-arm_openwrt_machtypes.patch delete mode 100644 target/linux/cns3xxx/patches-4.9/200-broadcom_phy_reinit.patch delete mode 100644 target/linux/cns3xxx/patches-4.9/210-dwc2_defaults.patch rename target/linux/generic/{pending-4.14/160-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch => backport-4.14/041-v4.17-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch} (92%) rename target/linux/generic/{pending-4.14/160-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch => backport-4.14/041-v4.17-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch} (83%) rename target/linux/generic/{backport-4.9/066-v4.16-0002-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch => backport-4.14/041-v4.17-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch} (82%) delete mode 100644 target/linux/generic/backport-4.9/040-crypto-fix-typo-in-KPP-dependency-of-CRYPTO_ECDH.patch rename target/linux/generic/backport-4.9/{067-v4.11-mtd-nand-Add-Winbond-manufacturer-id.patch => 063-v4.11-0001-mtd-nand-Add-Winbond-manufacturer-id.patch} (100%) rename target/linux/generic/backport-4.9/{064-v4.11-0001-mtd-introduce-function-max_bad_blocks.patch => 063-v4.11-0002-mtd-introduce-function-max_bad_blocks.patch} (100%) rename target/linux/generic/backport-4.9/{064-v4.11-0002-mtd-Add-partition-device-node-to-mtd-partition-devic.patch => 063-v4.11-0003-mtd-Add-partition-device-node-to-mtd-partition-devic.patch} (100%) rename target/linux/generic/backport-4.9/{063-mtd-spi-nor-enable-stateless-4b-op-codes-for-mx25u25.patch => 064-v4.12-mtd-spi-nor-enable-stateless-4b-op-codes-for-mx25u25.patch} (100%) delete mode 100644 target/linux/generic/backport-4.9/066-v4.16-0001-mtd-partitions-add-of_match_table-parser-matching.patch create mode 100644 target/linux/generic/backport-4.9/066-v4.17-0001-mtd-move-code-adding-master-MTD-out-of-mtd_add_devic.patch create mode 100644 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create mode 100644 target/linux/lantiq/patches-4.14/0025-NET-MIPS-lantiq-adds-xrx200-net.patch create mode 100644 target/linux/lantiq/patches-4.14/0027-01-net-phy-intel-xway-add-VR9-version-number.patch create mode 100644 target/linux/lantiq/patches-4.14/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch create mode 100644 target/linux/lantiq/patches-4.14/0028-NET-lantiq-various-etop-fixes.patch rename target/linux/{ipq40xx/patches-4.9/0066-GPIO-add-named-gpio-exports.patch => lantiq/patches-4.14/0030-GPIO-add-named-gpio-exports.patch} (84%) create mode 100644 target/linux/lantiq/patches-4.14/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch create mode 100644 target/linux/lantiq/patches-4.14/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch create mode 100644 target/linux/lantiq/patches-4.14/0042-arch-mips-increase-io_space_limit.patch create mode 100644 target/linux/lantiq/patches-4.14/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch create mode 100644 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toolchain/binutils/patches/2.28/001-ELF-BFD-Limit-_bfd_elf_link_renumber_dynsyms-call-in.patch delete mode 100644 toolchain/binutils/patches/2.28/002-PR-ld-21334-Always-call-_bfd_elf_link_renumber_dynsy.patch rename toolchain/binutils/patches/{2.28 => 2.30}/300-001_ld_makefile_patch.patch (92%) rename toolchain/binutils/patches/{2.28 => 2.30}/300-012_check_ldrunpath_length.patch (55%) rename toolchain/binutils/patches/{2.28 => 2.30}/400-mips_no_dynamic_linking_sym.patch (79%) rename toolchain/binutils/patches/{2.28 => 2.30}/500-Change-default-emulation-for-mips64-linux.patch (92%) create mode 100644 toolchain/gcc/patches/7.3.0/020-PR-libstdc-81797-Add-.NOTPARALLEL-to-include-Makefil.patch create mode 100644 toolchain/gcc/patches/7.3.0/100-PR-rtl-optimization-83496.patch create mode 100644 toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch delete mode 100644 toolchain/musl/patches/010-kernel-suppress-some-more-Linux-uapi-definitions.patch delete mode 100644 tools/cmake/patches/010-backport-macos-fix.patch delete mode 100644 tools/cmake/patches/110-alpine_musl-compat.patch rename tools/cmake/patches/{120-libarchive-fix-libressl-compat.patch => 110-libarchive-fix-libressl-compat.patch} (50%) rename tools/cmake/patches/{130-curl-fix-libressl-linking.patch => 120-curl-fix-libressl-linking.patch} (96%) rename tools/cmake/patches/{140-bootstrap_parallel_make_flag.patch => 130-bootstrap_parallel_make_flag.patch} (89%) create mode 100644 tools/firmware-utils/src/mkdapimg2.c create mode 100644 tools/firmware-utils/src/mkdlinkfw-lib.c create mode 100644 tools/firmware-utils/src/mkdlinkfw-lib.h create mode 100644 tools/firmware-utils/src/mkdlinkfw.c delete mode 100644 tools/gptfdisk/Makefile delete mode 100644 tools/mkimage/patches/040-include_order.patch delete mode 100644 tools/mkimage/patches/070-socfpgaimage_portability.patch delete mode 100644 tools/mkimage/patches/090-reproducible-SOURCE_DATE_EPOCH.patch delete mode 100644 tools/mkimage/patches/110-fix_musl_build.patch create mode 100644 tools/mkimage/patches/200-rsa-sign-add-support-for-libressl.patch create mode 100644 tools/mkimage/patches/210-link-libcrypto-static.patch delete mode 100644 tools/mkimage/patches/210-openssl-1.1.x-compat.patch delete mode 100644 tools/patch/patches/001-fix-macos-vasnprintf.patch delete mode 100644 tools/popt/Makefile delete mode 100644 tools/tar/patches/001-fix-macos-vasnprintf.patch diff --git a/4m.config b/4m.config deleted file mode 100644 index 8ef31bc66..000000000 --- a/4m.config +++ /dev/null @@ -1,5378 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# OpenWrt Configuration -# -CONFIG_MODULES=y -CONFIG_HAVE_DOT_CONFIG=y -# CONFIG_TARGET_sunxi is not set -# CONFIG_TARGET_apm821xx is not set -# CONFIG_TARGET_ath25 is not set -CONFIG_TARGET_ar71xx=y -# CONFIG_TARGET_brcm2708 is not set -# CONFIG_TARGET_bcm53xx is not set -# CONFIG_TARGET_brcm47xx is not set -# CONFIG_TARGET_brcm63xx is not set -# CONFIG_TARGET_cns3xxx is not set -# CONFIG_TARGET_octeon is not set -# CONFIG_TARGET_gemini is not set -# CONFIG_TARGET_mpc85xx is not set -# CONFIG_TARGET_imx6 is not set -# CONFIG_TARGET_mxs is not set -# CONFIG_TARGET_adm8668 is not set -# CONFIG_TARGET_adm5120 is not set -# CONFIG_TARGET_xburst is not set -# CONFIG_TARGET_ixp4xx is not set -# CONFIG_TARGET_lantiq is not set -# CONFIG_TARGET_malta is not set -# CONFIG_TARGET_pistachio is not set -# CONFIG_TARGET_mvebu is not set -# CONFIG_TARGET_kirkwood is not set -# CONFIG_TARGET_mediatek is not set -# CONFIG_TARGET_ramips is not set -# CONFIG_TARGET_at91 is not set -# CONFIG_TARGET_rb532 is not set -# CONFIG_TARGET_mcs814x is not set -# CONFIG_TARGET_layerscape is not set -# CONFIG_TARGET_oxnas is not set -# CONFIG_TARGET_armvirt is not set -# CONFIG_TARGET_ipq806x is not set -# CONFIG_TARGET_au1000 is not set -# CONFIG_TARGET_arc770 is not set -# CONFIG_TARGET_archs38 is not set -# CONFIG_TARGET_ar7 is not set -# CONFIG_TARGET_omap is not set -# CONFIG_TARGET_uml is not set -# CONFIG_TARGET_zynq is not set -# CONFIG_TARGET_x86 is not set -# CONFIG_TARGET_ar71xx_generic is not set -CONFIG_TARGET_ar71xx_tiny=y -# CONFIG_TARGET_ar71xx_nand is not set -# CONFIG_TARGET_ar71xx_mikrotik is not set -# CONFIG_TARGET_MULTI_PROFILE is not set -# CONFIG_TARGET_ar71xx_tiny_Default is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_A02RBW300N is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WHRG301N is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WHRHPG300N is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WHRHPGN is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WLAEAG300N is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WP543_4M is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WPE72_4M is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR600A1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR601A1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR601B1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR615C1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR615E1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR615E4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR615I1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_DIR615I3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_EBR2310C1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_FR54RTR is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_REALWNR1000V2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WNR1000V2_VC is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WNR2000 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WNR2000V3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WNR2000V4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_REALWNR612V2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_WPN824N is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_N150R is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_rnx-n360rt is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr10u-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr11u-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr11u-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr12u-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr13u-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr3020-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr3040-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr3040-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr3220-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr3220-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr3420-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-mr3420-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa701nd-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa701nd-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa7210n-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa730re-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa750re-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa7510n-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa801nd-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa801nd-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa801nd-v3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa830re-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa830re-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa850re-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa850re-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa855re-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa860re-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa901nd-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa901nd-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa901nd-v3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa901nd-v4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wa901nd-v5 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wdr3320-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr1041n-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr2041n-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr2041n-v2 is not set -CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr703n-v1=y -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr710n-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr720n-v3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr720n-v4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr740n-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr740n-v3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr740n-v4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr740n-v5 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr740n-v6 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr741nd-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr741nd-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr741nd-v4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr741nd-v5 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr743nd-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr743nd-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr802n-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr802n-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr840n-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr840n-v3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v1.5 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v10 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v11 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v12 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v5 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v7 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v8 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr841-v9 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr843nd-v1 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr847n-v8 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr940n-v4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr941nd-v2 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr941nd-v3 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr941nd-v4 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr941nd-v5 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr941nd-v6 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr941nd-v6-cn is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_tl-wr941n-v7 is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_TEW632BRP is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_TEW652BRP_FW is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_TEW652BRP_RECOVERY is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_TEW712BR is not set -# CONFIG_TARGET_ar71xx_tiny_DEVICE_NBG_460N_550N_550NH is not set -CONFIG_HAS_SUBTARGETS=y -CONFIG_HAS_DEVICES=y -CONFIG_TARGET_BOARD="ar71xx" -CONFIG_TARGET_SUBTARGET="tiny" -CONFIG_TARGET_PROFILE="DEVICE_tl-wr703n-v1" -CONFIG_TARGET_ARCH_PACKAGES="mips_24kc" -CONFIG_DEFAULT_TARGET_OPTIMIZATION="-Os -pipe -mno-branch-likely -mips32r2 -mtune=24kc" -CONFIG_CPU_TYPE="24kc" -CONFIG_LINUX_4_4=y -CONFIG_DEFAULT_base-files=y -CONFIG_DEFAULT_busybox=y -CONFIG_DEFAULT_dnsmasq-full=y -CONFIG_DEFAULT_dropbear=y -CONFIG_DEFAULT_firewall=y -CONFIG_DEFAULT_fstools=y -CONFIG_DEFAULT_ip6tables=y -CONFIG_DEFAULT_iptables=y -CONFIG_DEFAULT_iwinfo=y -CONFIG_DEFAULT_kmod-ath9k=y -CONFIG_DEFAULT_kmod-gpio-button-hotplug=y -CONFIG_DEFAULT_kmod-usb-core=y -CONFIG_DEFAULT_kmod-usb2=y -CONFIG_DEFAULT_libc=y -CONFIG_DEFAULT_libgcc=y -CONFIG_DEFAULT_logd=y -CONFIG_DEFAULT_mtd=y -CONFIG_DEFAULT_netifd=y -CONFIG_DEFAULT_opkg=y -CONFIG_DEFAULT_ppp=y -CONFIG_DEFAULT_ppp-mod-pppoe=y -CONFIG_DEFAULT_swconfig=y -CONFIG_DEFAULT_uboot-envtools=y -CONFIG_DEFAULT_uci=y -CONFIG_DEFAULT_uclient-fetch=y -CONFIG_DEFAULT_wpad-mini=y -CONFIG_AUDIO_SUPPORT=y -CONFIG_GPIO_SUPPORT=y -CONFIG_PCI_SUPPORT=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_GADGET_SUPPORT=y -CONFIG_BIG_ENDIAN=y -CONFIG_USES_DEVICETREE=y -CONFIG_USES_SQUASHFS=y -CONFIG_SMALL_FLASH=y -CONFIG_HAS_MIPS16=y -CONFIG_mips=y -CONFIG_ARCH="mips" - -# -# Target Images -# -# CONFIG_TARGET_ROOTFS_INITRAMFS is not set -CONFIG_EXTERNAL_CPIO="" - -# -# Root filesystem archives -# -# CONFIG_TARGET_ROOTFS_CPIOGZ is not set -# CONFIG_TARGET_ROOTFS_TARGZ is not set - -# -# Root filesystem images -# -# CONFIG_TARGET_ROOTFS_EXT4FS is not set -CONFIG_TARGET_ROOTFS_SQUASHFS=y -CONFIG_TARGET_SQUASHFS_BLOCK_SIZE=256 -CONFIG_TARGET_UBIFS_FREE_SPACE_FIXUP=y -CONFIG_TARGET_UBIFS_JOURNAL_SIZE="" - -# -# Image Options -# - -# -# Global build settings -# -# CONFIG_ALL_NONSHARED is not set -# CONFIG_ALL_KMODS is not set -# CONFIG_ALL is not set -# CONFIG_BUILDBOT is not set -CONFIG_SIGNED_PACKAGES=y - -# -# General build options -# -# CONFIG_DISPLAY_SUPPORT is not set -CONFIG_BUILD_PATENTED=y -# CONFIG_BUILD_NLS is not set -CONFIG_SHADOW_PASSWORDS=y -# CONFIG_CLEAN_IPKG is not set -# CONFIG_INCLUDE_CONFIG is not set -# CONFIG_COLLECT_KERNEL_DEBUG is not set - -# -# Kernel build options -# -CONFIG_KERNEL_BUILD_USER="" -CONFIG_KERNEL_BUILD_DOMAIN="" -CONFIG_KERNEL_PRINTK=y -CONFIG_KERNEL_CRASHLOG=y -CONFIG_KERNEL_SWAP=y -CONFIG_KERNEL_DEBUG_FS=y -# CONFIG_KERNEL_PERF_EVENTS is not set -# CONFIG_KERNEL_PROFILING is not set -# CONFIG_KERNEL_KALLSYMS is not set -# CONFIG_KERNEL_FTRACE is not set -CONFIG_KERNEL_DEBUG_KERNEL=y -CONFIG_KERNEL_DEBUG_INFO=y -# CONFIG_KERNEL_DYNAMIC_DEBUG is not set -# CONFIG_KERNEL_KPROBES is not set -# CONFIG_KERNEL_AIO is not set -# CONFIG_KERNEL_FHANDLE is not set -# CONFIG_KERNEL_FANOTIFY is not set -# CONFIG_KERNEL_BLK_DEV_BSG is not set -CONFIG_KERNEL_MAGIC_SYSRQ=y -# CONFIG_KERNEL_DEBUG_PINCTRL is not set -# CONFIG_KERNEL_DEBUG_GPIO is not set -CONFIG_KERNEL_COREDUMP=y -CONFIG_KERNEL_ELF_CORE=y -# CONFIG_KERNEL_PROVE_LOCKING is not set -CONFIG_KERNEL_PRINTK_TIME=y -# CONFIG_KERNEL_SLABINFO is not set -# CONFIG_KERNEL_PROC_PAGE_MONITOR is not set -CONFIG_KERNEL_RELAY=y -# CONFIG_KERNEL_KEXEC is not set -# CONFIG_USE_RFKILL is not set -# CONFIG_USE_SPARSE is not set -# CONFIG_KERNEL_DEVTMPFS is not set -# CONFIG_KERNEL_KEYS is not set -# CONFIG_KERNEL_CGROUPS is not set -# CONFIG_KERNEL_NAMESPACES is not set -# CONFIG_KERNEL_LXC_MISC is not set -# CONFIG_KERNEL_SECCOMP_FILTER is not set -# CONFIG_KERNEL_SECCOMP is not set -CONFIG_KERNEL_IPV6=y -CONFIG_KERNEL_IPV6_MULTIPLE_TABLES=y -CONFIG_KERNEL_IPV6_SUBTREES=y -CONFIG_KERNEL_IPV6_MROUTE=y -# CONFIG_KERNEL_IPV6_PIMSM_V2 is not set -# CONFIG_KERNEL_IP_PNP is not set - -# -# Filesystem ACL and attr support options -# -# CONFIG_USE_FS_ACL_ATTR is not set -# CONFIG_KERNEL_FS_POSIX_ACL is not set -# CONFIG_KERNEL_BTRFS_FS_POSIX_ACL is not set -# CONFIG_KERNEL_EXT4_FS_POSIX_ACL is not set -# CONFIG_KERNEL_F2FS_FS_POSIX_ACL is not set -# CONFIG_KERNEL_JFFS2_FS_POSIX_ACL is not set -# CONFIG_KERNEL_TMPFS_POSIX_ACL is not set -# CONFIG_KERNEL_CIFS_ACL is not set -# CONFIG_KERNEL_HFS_FS_POSIX_ACL is not set -# CONFIG_KERNEL_HFSPLUG_FS_POSIX_ACL is not set -# CONFIG_KERNEL_NFS_ACL_SUPPORT is not set -# CONFIG_KERNEL_NFS_V3_ACL_SUPPORT is not set -# CONFIG_KERNEL_NFSD_V2_ACL_SUPPORT is not set -# CONFIG_KERNEL_NFSD_V3_ACL_SUPPORT is not set -# CONFIG_KERNEL_REISER_FS_POSIX_ACL is not set -# CONFIG_KERNEL_XFS_POSIX_ACL is not set -# CONFIG_KERNEL_JFS_POSIX_ACL is not set -# CONFIG_KERNEL_DEVMEM is not set -# CONFIG_KERNEL_DEVKMEM is not set - -# -# Package build options -# -# CONFIG_DEBUG is not set -CONFIG_IPV6=y - -# -# Stripping options -# -# CONFIG_NO_STRIP is not set -# CONFIG_USE_STRIP is not set -CONFIG_USE_SSTRIP=y -# CONFIG_STRIP_KERNEL_EXPORTS is not set -# CONFIG_USE_MKLIBS is not set -CONFIG_USE_UCLIBCXX=y -# CONFIG_USE_LIBSTDCXX is not set - -# -# Hardening build options -# -CONFIG_PKG_CHECK_FORMAT_SECURITY=y -# CONFIG_PKG_CC_STACKPROTECTOR_NONE is not set -CONFIG_PKG_CC_STACKPROTECTOR_REGULAR=y -# CONFIG_KERNEL_CC_STACKPROTECTOR_NONE is not set -CONFIG_KERNEL_CC_STACKPROTECTOR_REGULAR=y -# CONFIG_KERNEL_CC_STACKPROTECTOR_STRONG is not set -# CONFIG_PKG_FORTIFY_SOURCE_NONE is not set -CONFIG_PKG_FORTIFY_SOURCE_1=y -# CONFIG_PKG_FORTIFY_SOURCE_2 is not set -# CONFIG_PKG_RELRO_NONE is not set -# CONFIG_PKG_RELRO_PARTIAL is not set -CONFIG_PKG_RELRO_FULL=y -# CONFIG_DEVEL is not set -# CONFIG_BROKEN is not set -CONFIG_BINARY_FOLDER="" -CONFIG_DOWNLOAD_FOLDER="" -CONFIG_LOCALMIRROR="" -CONFIG_AUTOREBUILD=y -# CONFIG_AUTOREMOVE is not set -CONFIG_BUILD_SUFFIX="" -CONFIG_TARGET_ROOTFS_DIR="" -# CONFIG_CCACHE is not set -CONFIG_EXTERNAL_KERNEL_TREE="" -CONFIG_KERNEL_GIT_CLONE_URI="" -CONFIG_EXTRA_OPTIMIZATION="-fno-caller-saves -fno-plt" -CONFIG_TARGET_OPTIMIZATION="-Os -pipe -mno-branch-likely -mips32r2 -mtune=24kc" -CONFIG_SOFT_FLOAT=y -CONFIG_USE_MIPS16=y -# CONFIG_EXTRA_TARGET_ARCH is not set -CONFIG_EXTRA_BINUTILS_CONFIG_OPTIONS="" -CONFIG_EXTRA_GCC_CONFIG_OPTIONS="" -# CONFIG_SJLJ_EXCEPTIONS is not set -# CONFIG_INSTALL_GFORTRAN is not set -CONFIG_GDB=y -CONFIG_USE_MUSL=y -CONFIG_BINUTILS_VERSION_2_28=y -CONFIG_BINUTILS_VERSION="2.28" -CONFIG_GCC_VERSION="5.5.0" -CONFIG_LIBC="musl" -CONFIG_TARGET_SUFFIX="musl" -# CONFIG_IB is not set -# CONFIG_SDK is not set -# CONFIG_MAKE_TOOLCHAIN is not set -# CONFIG_IMAGEOPT is not set -# CONFIG_PREINITOPT is not set -CONFIG_TARGET_PREINIT_SUPPRESS_STDERR=y -# CONFIG_TARGET_PREINIT_DISABLE_FAILSAFE is not set -CONFIG_TARGET_PREINIT_TIMEOUT=2 -# CONFIG_TARGET_PREINIT_SHOW_NETMSG is not set -# CONFIG_TARGET_PREINIT_SUPPRESS_FAILSAFE_NETMSG is not set -CONFIG_TARGET_PREINIT_IFNAME="" -CONFIG_TARGET_PREINIT_IP="192.168.1.1" -CONFIG_TARGET_PREINIT_NETMASK="255.255.255.0" -CONFIG_TARGET_PREINIT_BROADCAST="192.168.1.255" -# CONFIG_INITOPT is not set -CONFIG_TARGET_INIT_PATH="/usr/sbin:/usr/bin:/sbin:/bin" -CONFIG_TARGET_INIT_ENV="" -CONFIG_TARGET_INIT_CMD="/sbin/init" -CONFIG_TARGET_INIT_SUPPRESS_STDERR=y -# CONFIG_VERSIONOPT is not set -CONFIG_PER_FEED_REPO=y -CONFIG_PER_FEED_REPO_ADD_DISABLED=y -CONFIG_PER_FEED_REPO_ADD_COMMENTED=y -CONFIG_FEED_packages=y -CONFIG_FEED_luci=y -CONFIG_FEED_routing=y -CONFIG_FEED_telephony=y - -# -# Base system -# -# CONFIG_PACKAGE_attendedsysupgrade-common is not set -# CONFIG_PACKAGE_auc is not set -CONFIG_PACKAGE_base-files=y -# CONFIG_PACKAGE_block-mount is not set -# CONFIG_PACKAGE_bridge is not set -CONFIG_PACKAGE_busybox=y -CONFIG_BUSYBOX_CUSTOM=y -CONFIG_BUSYBOX_DEFAULT_HAVE_DOT_CONFIG=y -# CONFIG_BUSYBOX_DEFAULT_DESKTOP is not set -# CONFIG_BUSYBOX_DEFAULT_EXTRA_COMPAT is not set -CONFIG_BUSYBOX_DEFAULT_INCLUDE_SUSv2=y -# CONFIG_BUSYBOX_DEFAULT_USE_PORTABLE_CODE is not set -CONFIG_BUSYBOX_DEFAULT_PLATFORM_LINUX=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_BUFFERS_USE_MALLOC is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_BUFFERS_GO_ON_STACK=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_BUFFERS_GO_IN_BSS is not set -CONFIG_BUSYBOX_DEFAULT_SHOW_USAGE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VERBOSE_USAGE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_COMPRESS_USAGE=y -# CONFIG_BUSYBOX_DEFAULT_BUSYBOX is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSTALLER is not set -# CONFIG_BUSYBOX_DEFAULT_INSTALL_NO_USR is not set -# CONFIG_BUSYBOX_DEFAULT_LOCALE_SUPPORT is not set -# CONFIG_BUSYBOX_DEFAULT_UNICODE_SUPPORT is not set -# CONFIG_BUSYBOX_DEFAULT_UNICODE_USING_LOCALE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHECK_UNICODE_IN_ENV is not set -CONFIG_BUSYBOX_DEFAULT_SUBST_WCHAR=0 -CONFIG_BUSYBOX_DEFAULT_LAST_SUPPORTED_WCHAR=0 -# CONFIG_BUSYBOX_DEFAULT_UNICODE_COMBINING_WCHARS is not set -# CONFIG_BUSYBOX_DEFAULT_UNICODE_WIDE_WCHARS is not set -# CONFIG_BUSYBOX_DEFAULT_UNICODE_BIDI_SUPPORT is not set -# CONFIG_BUSYBOX_DEFAULT_UNICODE_NEUTRAL_TABLE is not set -# CONFIG_BUSYBOX_DEFAULT_UNICODE_PRESERVE_BROKEN is not set -# CONFIG_BUSYBOX_DEFAULT_PAM is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_USE_SENDFILE is not set -CONFIG_BUSYBOX_DEFAULT_LONG_OPTS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_DEVPTS=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CLEAN_UP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UTMP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WTMP is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_PIDFILE=y -CONFIG_BUSYBOX_DEFAULT_PID_FILE_PATH="/var/run" -CONFIG_BUSYBOX_DEFAULT_FEATURE_SUID=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SUID_CONFIG is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SUID_CONFIG_QUIET is not set -# CONFIG_BUSYBOX_DEFAULT_SELINUX is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_PREFER_APPLETS=y -CONFIG_BUSYBOX_DEFAULT_BUSYBOX_EXEC_PATH="/proc/self/exe" -CONFIG_BUSYBOX_DEFAULT_FEATURE_SYSLOG=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HAVE_RPC is not set -# CONFIG_BUSYBOX_DEFAULT_STATIC is not set -# CONFIG_BUSYBOX_DEFAULT_PIE is not set -# CONFIG_BUSYBOX_DEFAULT_NOMMU is not set -# CONFIG_BUSYBOX_DEFAULT_BUILD_LIBBUSYBOX is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INDIVIDUAL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SHARED_BUSYBOX is not set -CONFIG_BUSYBOX_DEFAULT_LFS=y -CONFIG_BUSYBOX_DEFAULT_CROSS_COMPILER_PREFIX="" -CONFIG_BUSYBOX_DEFAULT_SYSROOT="" -CONFIG_BUSYBOX_DEFAULT_EXTRA_CFLAGS="" -CONFIG_BUSYBOX_DEFAULT_EXTRA_LDFLAGS="" -CONFIG_BUSYBOX_DEFAULT_EXTRA_LDLIBS="" -# CONFIG_BUSYBOX_DEFAULT_DEBUG is not set -# CONFIG_BUSYBOX_DEFAULT_DEBUG_PESSIMIZE is not set -# CONFIG_BUSYBOX_DEFAULT_DEBUG_SANITIZE is not set -# CONFIG_BUSYBOX_DEFAULT_UNIT_TEST is not set -# CONFIG_BUSYBOX_DEFAULT_WERROR is not set -CONFIG_BUSYBOX_DEFAULT_NO_DEBUG_LIB=y -# CONFIG_BUSYBOX_DEFAULT_DMALLOC is not set -# CONFIG_BUSYBOX_DEFAULT_EFENCE is not set -CONFIG_BUSYBOX_DEFAULT_INSTALL_APPLET_SYMLINKS=y -# CONFIG_BUSYBOX_DEFAULT_INSTALL_APPLET_HARDLINKS is not set -# CONFIG_BUSYBOX_DEFAULT_INSTALL_APPLET_SCRIPT_WRAPPERS is not set -# CONFIG_BUSYBOX_DEFAULT_INSTALL_APPLET_DONT is not set -# CONFIG_BUSYBOX_DEFAULT_INSTALL_SH_APPLET_SYMLINK is not set -# CONFIG_BUSYBOX_DEFAULT_INSTALL_SH_APPLET_HARDLINK is not set -# CONFIG_BUSYBOX_DEFAULT_INSTALL_SH_APPLET_SCRIPT_WRAPPER is not set -CONFIG_BUSYBOX_DEFAULT_PREFIX="./_install" -# CONFIG_BUSYBOX_DEFAULT_FEATURE_USE_BSS_TAIL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_RTMINMAX is not set -CONFIG_BUSYBOX_DEFAULT_PASSWORD_MINLEN=6 -CONFIG_BUSYBOX_DEFAULT_MD5_SMALL=1 -CONFIG_BUSYBOX_DEFAULT_SHA3_SMALL=1 -CONFIG_BUSYBOX_DEFAULT_FEATURE_FAST_TOP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_ETC_NETWORKS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_USE_TERMIOS is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING_MAX_LEN=512 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING_VI is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING_HISTORY=256 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING_SAVEHISTORY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING_SAVE_ON_EXIT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_REVERSE_SEARCH is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_TAB_COMPLETION=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_USERNAME_COMPLETION is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING_FANCY_PROMPT=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_EDITING_ASK_TERMINAL is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_NON_POSIX_CP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VERBOSE_CP_MESSAGE is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_COPYBUF_KB=4 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SKIP_ROOTFS is not set -# CONFIG_BUSYBOX_DEFAULT_MONOTONIC_SYSCALL is not set -CONFIG_BUSYBOX_DEFAULT_IOCTL_HEX2STR_ERROR=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HWIB is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SEAMLESS_XZ is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SEAMLESS_LZMA is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SEAMLESS_BZ2 is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_SEAMLESS_GZ=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SEAMLESS_Z is not set -# CONFIG_BUSYBOX_DEFAULT_AR is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_AR_LONG_FILENAMES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_AR_CREATE is not set -# CONFIG_BUSYBOX_DEFAULT_UNCOMPRESS is not set -CONFIG_BUSYBOX_DEFAULT_GUNZIP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_GUNZIP_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_BUNZIP2=y -# CONFIG_BUSYBOX_DEFAULT_UNLZMA is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LZMA_FAST is not set -# CONFIG_BUSYBOX_DEFAULT_LZMA is not set -# CONFIG_BUSYBOX_DEFAULT_UNXZ is not set -# CONFIG_BUSYBOX_DEFAULT_XZ is not set -# CONFIG_BUSYBOX_DEFAULT_BZIP2 is not set -# CONFIG_BUSYBOX_DEFAULT_CPIO is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CPIO_O is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CPIO_P is not set -# CONFIG_BUSYBOX_DEFAULT_DPKG is not set -# CONFIG_BUSYBOX_DEFAULT_DPKG_DEB is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DPKG_DEB_EXTRACT_ONLY is not set -CONFIG_BUSYBOX_DEFAULT_GZIP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_GZIP_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_GZIP_FAST=0 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_GZIP_LEVELS is not set -# CONFIG_BUSYBOX_DEFAULT_LZOP is not set -# CONFIG_BUSYBOX_DEFAULT_LZOP_COMPR_HIGH is not set -# CONFIG_BUSYBOX_DEFAULT_RPM is not set -# CONFIG_BUSYBOX_DEFAULT_RPM2CPIO is not set -CONFIG_BUSYBOX_DEFAULT_TAR=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_CREATE=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_AUTODETECT is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_FROM=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_OLDGNU_COMPATIBILITY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_GNU_EXTENSIONS=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_TO_COMMAND is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_UNAME_GNAME is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_NOPRESERVE_TIME is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TAR_SELINUX is not set -# CONFIG_BUSYBOX_DEFAULT_UNZIP is not set -CONFIG_BUSYBOX_DEFAULT_BASENAME=y -CONFIG_BUSYBOX_DEFAULT_CAT=y -CONFIG_BUSYBOX_DEFAULT_DATE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_DATE_ISOFMT=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DATE_NANO is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DATE_COMPAT is not set -CONFIG_BUSYBOX_DEFAULT_DD=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_DD_SIGNAL_HANDLING=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DD_THIRD_STATUS_LINE is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_DD_IBS_OBS=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DD_STATUS is not set -# CONFIG_BUSYBOX_DEFAULT_HOSTID is not set -CONFIG_BUSYBOX_DEFAULT_ID=y -# CONFIG_BUSYBOX_DEFAULT_GROUPS is not set -# CONFIG_BUSYBOX_DEFAULT_SHUF is not set -# CONFIG_BUSYBOX_DEFAULT_STAT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_STAT_FORMAT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_STAT_FILESYSTEM is not set -CONFIG_BUSYBOX_DEFAULT_SYNC=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SYNC_FANCY is not set -CONFIG_BUSYBOX_DEFAULT_TEST=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_TEST_64=y -CONFIG_BUSYBOX_DEFAULT_TOUCH=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TOUCH_NODEREF is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_TOUCH_SUSV3=y -CONFIG_BUSYBOX_DEFAULT_TR=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TR_CLASSES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TR_EQUIV is not set -# CONFIG_BUSYBOX_DEFAULT_TRUNCATE is not set -# CONFIG_BUSYBOX_DEFAULT_UNLINK is not set -# CONFIG_BUSYBOX_DEFAULT_BASE64 is not set -# CONFIG_BUSYBOX_DEFAULT_WHO is not set -# CONFIG_BUSYBOX_DEFAULT_USERS is not set -# CONFIG_BUSYBOX_DEFAULT_CAL is not set -# CONFIG_BUSYBOX_DEFAULT_CATV is not set -CONFIG_BUSYBOX_DEFAULT_CHGRP=y -CONFIG_BUSYBOX_DEFAULT_CHMOD=y -CONFIG_BUSYBOX_DEFAULT_CHOWN=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHOWN_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_CHROOT=y -# CONFIG_BUSYBOX_DEFAULT_CKSUM is not set -# CONFIG_BUSYBOX_DEFAULT_COMM is not set -CONFIG_BUSYBOX_DEFAULT_CP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CP_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_CUT=y -CONFIG_BUSYBOX_DEFAULT_DF=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DF_FANCY is not set -CONFIG_BUSYBOX_DEFAULT_DIRNAME=y -# CONFIG_BUSYBOX_DEFAULT_DOS2UNIX is not set -# CONFIG_BUSYBOX_DEFAULT_UNIX2DOS is not set -CONFIG_BUSYBOX_DEFAULT_DU=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y -CONFIG_BUSYBOX_DEFAULT_ECHO=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FANCY_ECHO=y -CONFIG_BUSYBOX_DEFAULT_ENV=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_ENV_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_EXPAND is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_EXPAND_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_EXPR=y -CONFIG_BUSYBOX_DEFAULT_EXPR_MATH_SUPPORT_64=y -CONFIG_BUSYBOX_DEFAULT_FALSE=y -# CONFIG_BUSYBOX_DEFAULT_FOLD is not set -CONFIG_BUSYBOX_DEFAULT_FSYNC=y -CONFIG_BUSYBOX_DEFAULT_HEAD=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FANCY_HEAD=y -# CONFIG_BUSYBOX_DEFAULT_INSTALL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSTALL_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_LN=y -# CONFIG_BUSYBOX_DEFAULT_LOGNAME is not set -CONFIG_BUSYBOX_DEFAULT_LS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_FILETYPES=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_FOLLOWLINKS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_RECURSIVE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_SORTFILES=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_TIMESTAMPS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_USERNAME=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_COLOR=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LS_COLOR_IS_DEFAULT=y -CONFIG_BUSYBOX_DEFAULT_MD5SUM=y -CONFIG_BUSYBOX_DEFAULT_MKDIR=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MKDIR_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_MKFIFO=y -CONFIG_BUSYBOX_DEFAULT_MKNOD=y -CONFIG_BUSYBOX_DEFAULT_MV=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MV_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_NICE=y -# CONFIG_BUSYBOX_DEFAULT_NOHUP is not set -# CONFIG_BUSYBOX_DEFAULT_OD is not set -# CONFIG_BUSYBOX_DEFAULT_PRINTENV is not set -CONFIG_BUSYBOX_DEFAULT_PRINTF=y -CONFIG_BUSYBOX_DEFAULT_PWD=y -CONFIG_BUSYBOX_DEFAULT_READLINK=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_READLINK_FOLLOW=y -# CONFIG_BUSYBOX_DEFAULT_REALPATH is not set -CONFIG_BUSYBOX_DEFAULT_RM=y -CONFIG_BUSYBOX_DEFAULT_RMDIR=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_RMDIR_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_SEQ=y -# CONFIG_BUSYBOX_DEFAULT_SHA1SUM is not set -CONFIG_BUSYBOX_DEFAULT_SHA256SUM=y -# CONFIG_BUSYBOX_DEFAULT_SHA512SUM is not set -# CONFIG_BUSYBOX_DEFAULT_SHA3SUM is not set -CONFIG_BUSYBOX_DEFAULT_SLEEP=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FANCY_SLEEP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FLOAT_SLEEP is not set -CONFIG_BUSYBOX_DEFAULT_SORT=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SORT_BIG is not set -# CONFIG_BUSYBOX_DEFAULT_SPLIT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SPLIT_FANCY is not set -# CONFIG_BUSYBOX_DEFAULT_STTY is not set -# CONFIG_BUSYBOX_DEFAULT_SUM is not set -# CONFIG_BUSYBOX_DEFAULT_TAC is not set -CONFIG_BUSYBOX_DEFAULT_TAIL=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FANCY_TAIL=y -CONFIG_BUSYBOX_DEFAULT_TEE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_TEE_USE_BLOCK_IO=y -CONFIG_BUSYBOX_DEFAULT_TRUE=y -# CONFIG_BUSYBOX_DEFAULT_TTY is not set -CONFIG_BUSYBOX_DEFAULT_UNAME=y -CONFIG_BUSYBOX_DEFAULT_UNAME_OSNAME="GNU/Linux" -# CONFIG_BUSYBOX_DEFAULT_UNEXPAND is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UNEXPAND_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_UNIQ=y -# CONFIG_BUSYBOX_DEFAULT_USLEEP is not set -# CONFIG_BUSYBOX_DEFAULT_UUDECODE is not set -# CONFIG_BUSYBOX_DEFAULT_UUENCODE is not set -CONFIG_BUSYBOX_DEFAULT_WC=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WC_LARGE is not set -# CONFIG_BUSYBOX_DEFAULT_WHOAMI is not set -CONFIG_BUSYBOX_DEFAULT_YES=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VERBOSE is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_PRESERVE_HARDLINKS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_AUTOWIDTH=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_HUMAN_READABLE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_MD5_SHA1_SUM_CHECK=y -# CONFIG_BUSYBOX_DEFAULT_CHVT is not set -# CONFIG_BUSYBOX_DEFAULT_FGCONSOLE is not set -CONFIG_BUSYBOX_DEFAULT_CLEAR=y -# CONFIG_BUSYBOX_DEFAULT_DEALLOCVT is not set -# CONFIG_BUSYBOX_DEFAULT_DUMPKMAP is not set -# CONFIG_BUSYBOX_DEFAULT_KBD_MODE is not set -# CONFIG_BUSYBOX_DEFAULT_LOADFONT is not set -# CONFIG_BUSYBOX_DEFAULT_LOADKMAP is not set -# CONFIG_BUSYBOX_DEFAULT_OPENVT is not set -CONFIG_BUSYBOX_DEFAULT_RESET=y -# CONFIG_BUSYBOX_DEFAULT_RESIZE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_RESIZE_PRINT is not set -# CONFIG_BUSYBOX_DEFAULT_SETCONSOLE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SETCONSOLE_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_SETFONT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SETFONT_TEXTUAL_MAP is not set -CONFIG_BUSYBOX_DEFAULT_DEFAULT_SETFONT_DIR="" -# CONFIG_BUSYBOX_DEFAULT_SETKEYCODES is not set -# CONFIG_BUSYBOX_DEFAULT_SETLOGCONS is not set -# CONFIG_BUSYBOX_DEFAULT_SHOWKEY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LOADFONT_PSF2 is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LOADFONT_RAW is not set -CONFIG_BUSYBOX_DEFAULT_MKTEMP=y -# CONFIG_BUSYBOX_DEFAULT_PIPE_PROGRESS is not set -# CONFIG_BUSYBOX_DEFAULT_RUN_PARTS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_RUN_PARTS_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_RUN_PARTS_FANCY is not set -CONFIG_BUSYBOX_DEFAULT_START_STOP_DAEMON=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_START_STOP_DAEMON_FANCY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_START_STOP_DAEMON_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_WHICH=y -CONFIG_BUSYBOX_DEFAULT_AWK=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_AWK_LIBM=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_AWK_GNU_EXTENSIONS=y -CONFIG_BUSYBOX_DEFAULT_CMP=y -# CONFIG_BUSYBOX_DEFAULT_DIFF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DIFF_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DIFF_DIR is not set -# CONFIG_BUSYBOX_DEFAULT_ED is not set -# CONFIG_BUSYBOX_DEFAULT_PATCH is not set -CONFIG_BUSYBOX_DEFAULT_SED=y -CONFIG_BUSYBOX_DEFAULT_VI=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_MAX_LEN=1024 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_8BIT is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_COLON=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_YANKMARK=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_SEARCH=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_REGEX_SEARCH is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_USE_SIGNALS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_DOT_CMD=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_READONLY=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_SETOPTS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_SET=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_WIN_RESIZE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_ASK_TERMINAL=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_UNDO is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_UNDO_QUEUE is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_VI_UNDO_QUEUE_MAX=0 -CONFIG_BUSYBOX_DEFAULT_FEATURE_ALLOW_EXEC=y -CONFIG_BUSYBOX_DEFAULT_FIND=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_PRINT0=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_MTIME=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_MMIN is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_PERM=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_TYPE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_XDEV=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_MAXDEPTH=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_NEWER is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_INUM is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_EXEC=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_EXEC_PLUS is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_USER=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_GROUP=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_NOT=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_DEPTH=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_PAREN=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_SIZE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_PRUNE=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_DELETE is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_PATH=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_REGEX=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_CONTEXT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FIND_LINKS is not set -CONFIG_BUSYBOX_DEFAULT_GREP=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_GREP_EGREP_ALIAS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_GREP_FGREP_ALIAS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_GREP_CONTEXT=y -CONFIG_BUSYBOX_DEFAULT_XARGS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_CONFIRMATION=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_QUOTES=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_TERMOPT=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_ZERO_TERM=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_REPL_STR is not set -# CONFIG_BUSYBOX_DEFAULT_BOOTCHARTD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_BOOTCHARTD_BLOATED_HEADER is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_BOOTCHARTD_CONFIG_FILE is not set -CONFIG_BUSYBOX_DEFAULT_HALT=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CALL_TELINIT is not set -CONFIG_BUSYBOX_DEFAULT_TELINIT_PATH="" -# CONFIG_BUSYBOX_DEFAULT_INIT is not set -# CONFIG_BUSYBOX_DEFAULT_LINUXRC is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_USE_INITTAB is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_KILL_REMOVED is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_KILL_DELAY=0 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INIT_SCTTY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INIT_SYSLOG is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_EXTRA_QUIET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INIT_COREDUMPS is not set -CONFIG_BUSYBOX_DEFAULT_INIT_TERMINAL_TYPE="" -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INIT_MODIFY_CMDLINE is not set -# CONFIG_BUSYBOX_DEFAULT_MESG is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MESG_ENABLE_ONLY_GROUP is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_SHADOWPASSWDS=y -# CONFIG_BUSYBOX_DEFAULT_USE_BB_PWD_GRP is not set -# CONFIG_BUSYBOX_DEFAULT_USE_BB_SHADOW is not set -# CONFIG_BUSYBOX_DEFAULT_USE_BB_CRYPT is not set -# CONFIG_BUSYBOX_DEFAULT_USE_BB_CRYPT_SHA is not set -# CONFIG_BUSYBOX_DEFAULT_ADD_SHELL is not set -# CONFIG_BUSYBOX_DEFAULT_REMOVE_SHELL is not set -# CONFIG_BUSYBOX_DEFAULT_ADDGROUP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_ADDGROUP_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_ADDUSER_TO_GROUP is not set -# CONFIG_BUSYBOX_DEFAULT_ADDUSER is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_ADDUSER_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHECK_NAMES is not set -CONFIG_BUSYBOX_DEFAULT_LAST_ID=0 -CONFIG_BUSYBOX_DEFAULT_FIRST_SYSTEM_ID=0 -CONFIG_BUSYBOX_DEFAULT_LAST_SYSTEM_ID=0 -# CONFIG_BUSYBOX_DEFAULT_CHPASSWD is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_DEFAULT_PASSWD_ALGO="md5" -# CONFIG_BUSYBOX_DEFAULT_CRYPTPW is not set -# CONFIG_BUSYBOX_DEFAULT_MKPASSWD is not set -# CONFIG_BUSYBOX_DEFAULT_DELUSER is not set -# CONFIG_BUSYBOX_DEFAULT_DELGROUP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DEL_USER_FROM_GROUP is not set -# CONFIG_BUSYBOX_DEFAULT_GETTY is not set -CONFIG_BUSYBOX_DEFAULT_LOGIN=y -CONFIG_BUSYBOX_DEFAULT_LOGIN_SESSION_AS_CHILD=y -# CONFIG_BUSYBOX_DEFAULT_LOGIN_SCRIPTS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_NOLOGIN is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SECURETTY is not set -CONFIG_BUSYBOX_DEFAULT_PASSWD=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_PASSWD_WEAK_CHECK=y -# CONFIG_BUSYBOX_DEFAULT_SU is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SU_SYSLOG is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SU_CHECKS_SHELLS is not set -# CONFIG_BUSYBOX_DEFAULT_SULOGIN is not set -# CONFIG_BUSYBOX_DEFAULT_VLOCK is not set -# CONFIG_BUSYBOX_DEFAULT_CHATTR is not set -# CONFIG_BUSYBOX_DEFAULT_FSCK is not set -# CONFIG_BUSYBOX_DEFAULT_LSATTR is not set -# CONFIG_BUSYBOX_DEFAULT_TUNE2FS is not set -# CONFIG_BUSYBOX_DEFAULT_MODINFO is not set -# CONFIG_BUSYBOX_DEFAULT_MODPROBE_SMALL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MODPROBE_SMALL_OPTIONS_ON_CMDLINE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MODPROBE_SMALL_CHECK_ALREADY_LOADED is not set -# CONFIG_BUSYBOX_DEFAULT_INSMOD is not set -# CONFIG_BUSYBOX_DEFAULT_RMMOD is not set -# CONFIG_BUSYBOX_DEFAULT_LSMOD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LSMOD_PRETTY_2_6_OUTPUT is not set -# CONFIG_BUSYBOX_DEFAULT_MODPROBE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MODPROBE_BLACKLIST is not set -# CONFIG_BUSYBOX_DEFAULT_DEPMOD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_2_4_MODULES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSMOD_TRY_MMAP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSMOD_VERSION_CHECKING is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSMOD_KSYMOOPS_SYMBOLS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSMOD_LOADINKMEM is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSMOD_LOAD_MAP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INSMOD_LOAD_MAP_FULL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHECK_TAINTED_MODULE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MODUTILS_ALIAS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MODUTILS_SYMBOLS is not set -CONFIG_BUSYBOX_DEFAULT_DEFAULT_MODULES_DIR="" -CONFIG_BUSYBOX_DEFAULT_DEFAULT_DEPMOD_FILE="" -# CONFIG_BUSYBOX_DEFAULT_BLKDISCARD is not set -# CONFIG_BUSYBOX_DEFAULT_BLOCKDEV is not set -# CONFIG_BUSYBOX_DEFAULT_FATATTR is not set -# CONFIG_BUSYBOX_DEFAULT_FSTRIM is not set -# CONFIG_BUSYBOX_DEFAULT_MDEV is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MDEV_CONF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MDEV_RENAME is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MDEV_RENAME_REGEXP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MDEV_EXEC is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MDEV_LOAD_FIRMWARE is not set -CONFIG_BUSYBOX_DEFAULT_MOUNT=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_FAKE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_VERBOSE is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_HELPERS=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_LABEL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_NFS is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_CIFS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_FLAGS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_FSTAB=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_OTHERTAB is not set -# CONFIG_BUSYBOX_DEFAULT_NSENTER is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_NSENTER_LONG_OPTS is not set -# CONFIG_BUSYBOX_DEFAULT_REV is not set -# CONFIG_BUSYBOX_DEFAULT_SETARCH is not set -# CONFIG_BUSYBOX_DEFAULT_UEVENT is not set -# CONFIG_BUSYBOX_DEFAULT_UNSHARE is not set -# CONFIG_BUSYBOX_DEFAULT_ACPID is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_ACPID_COMPAT is not set -# CONFIG_BUSYBOX_DEFAULT_BLKID is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_BLKID_TYPE is not set -CONFIG_BUSYBOX_DEFAULT_DMESG=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_DMESG_PRETTY=y -# CONFIG_BUSYBOX_DEFAULT_FBSET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FBSET_FANCY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FBSET_READMODE is not set -# CONFIG_BUSYBOX_DEFAULT_FDFLUSH is not set -# CONFIG_BUSYBOX_DEFAULT_FDFORMAT is not set -# CONFIG_BUSYBOX_DEFAULT_FDISK is not set -# CONFIG_BUSYBOX_DEFAULT_FDISK_SUPPORT_LARGE_DISKS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FDISK_WRITABLE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_AIX_LABEL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SGI_LABEL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SUN_LABEL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_OSF_LABEL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_GPT_LABEL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FDISK_ADVANCED is not set -# CONFIG_BUSYBOX_DEFAULT_FINDFS is not set -# CONFIG_BUSYBOX_DEFAULT_FLOCK is not set -# CONFIG_BUSYBOX_DEFAULT_FREERAMDISK is not set -# CONFIG_BUSYBOX_DEFAULT_FSCK_MINIX is not set -# CONFIG_BUSYBOX_DEFAULT_MKFS_EXT2 is not set -# CONFIG_BUSYBOX_DEFAULT_MKFS_MINIX is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MINIX2 is not set -# CONFIG_BUSYBOX_DEFAULT_MKFS_REISER is not set -# CONFIG_BUSYBOX_DEFAULT_MKFS_VFAT is not set -# CONFIG_BUSYBOX_DEFAULT_GETOPT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_GETOPT_LONG is not set -CONFIG_BUSYBOX_DEFAULT_HEXDUMP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HEXDUMP_REVERSE is not set -# CONFIG_BUSYBOX_DEFAULT_HD is not set -CONFIG_BUSYBOX_DEFAULT_HWCLOCK=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HWCLOCK_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HWCLOCK_ADJTIME_FHS is not set -# CONFIG_BUSYBOX_DEFAULT_IPCRM is not set -# CONFIG_BUSYBOX_DEFAULT_IPCS is not set -# CONFIG_BUSYBOX_DEFAULT_LOSETUP is not set -# CONFIG_BUSYBOX_DEFAULT_LSPCI is not set -# CONFIG_BUSYBOX_DEFAULT_LSUSB is not set -CONFIG_BUSYBOX_DEFAULT_MKSWAP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MKSWAP_UUID is not set -# CONFIG_BUSYBOX_DEFAULT_MORE is not set -CONFIG_BUSYBOX_DEFAULT_PIVOT_ROOT=y -# CONFIG_BUSYBOX_DEFAULT_RDATE is not set -# CONFIG_BUSYBOX_DEFAULT_RDEV is not set -# CONFIG_BUSYBOX_DEFAULT_READPROFILE is not set -# CONFIG_BUSYBOX_DEFAULT_RTCWAKE is not set -# CONFIG_BUSYBOX_DEFAULT_SCRIPT is not set -# CONFIG_BUSYBOX_DEFAULT_SCRIPTREPLAY is not set -# CONFIG_BUSYBOX_DEFAULT_SWAPONOFF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SWAPON_DISCARD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SWAPON_PRI is not set -CONFIG_BUSYBOX_DEFAULT_SWITCH_ROOT=y -CONFIG_BUSYBOX_DEFAULT_UMOUNT=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_UMOUNT_ALL=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_LOOP=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MOUNT_LOOP_CREATE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MTAB_SUPPORT is not set -# CONFIG_BUSYBOX_DEFAULT_VOLUMEID is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_BCACHE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_BTRFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_CRAMFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_EXFAT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_EXT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_F2FS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_FAT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_HFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_ISO9660 is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_JFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_LINUXRAID is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_LINUXSWAP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_LUKS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_NILFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_NTFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_OCFS2 is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_REISERFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_ROMFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_SQUASHFS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_SYSV is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_UDF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_VOLUMEID_XFS is not set -# CONFIG_BUSYBOX_DEFAULT_CONSPY is not set -CONFIG_BUSYBOX_DEFAULT_CROND=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CROND_D is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CROND_CALL_SENDMAIL is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_CROND_DIR="/etc" -# CONFIG_BUSYBOX_DEFAULT_I2CGET is not set -# CONFIG_BUSYBOX_DEFAULT_I2CSET is not set -# CONFIG_BUSYBOX_DEFAULT_I2CDUMP is not set -# CONFIG_BUSYBOX_DEFAULT_I2CDETECT is not set -CONFIG_BUSYBOX_DEFAULT_LESS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_MAXLINES=9999999 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_BRACKETS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_FLAGS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_TRUNCATE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_MARKS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_REGEXP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_WINCH is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_ASK_TERMINAL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_DASHCMD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LESS_LINENUMS is not set -# CONFIG_BUSYBOX_DEFAULT_NANDWRITE is not set -# CONFIG_BUSYBOX_DEFAULT_NANDDUMP is not set -# CONFIG_BUSYBOX_DEFAULT_RFKILL is not set -# CONFIG_BUSYBOX_DEFAULT_SETSERIAL is not set -# CONFIG_BUSYBOX_DEFAULT_TASKSET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TASKSET_FANCY is not set -# CONFIG_BUSYBOX_DEFAULT_UBIATTACH is not set -# CONFIG_BUSYBOX_DEFAULT_UBIDETACH is not set -# CONFIG_BUSYBOX_DEFAULT_UBIMKVOL is not set -# CONFIG_BUSYBOX_DEFAULT_UBIRMVOL is not set -# CONFIG_BUSYBOX_DEFAULT_UBIRSVOL is not set -# CONFIG_BUSYBOX_DEFAULT_UBIUPDATEVOL is not set -# CONFIG_BUSYBOX_DEFAULT_UBIRENAME is not set -# CONFIG_BUSYBOX_DEFAULT_WALL is not set -# CONFIG_BUSYBOX_DEFAULT_ADJTIMEX is not set -# CONFIG_BUSYBOX_DEFAULT_BBCONFIG is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_COMPRESS_BBCONFIG is not set -# CONFIG_BUSYBOX_DEFAULT_BEEP is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_BEEP_FREQ=0 -CONFIG_BUSYBOX_DEFAULT_FEATURE_BEEP_LENGTH_MS=0 -# CONFIG_BUSYBOX_DEFAULT_CHAT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHAT_NOFAIL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHAT_TTY_HIFI is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHAT_IMPLICIT_CR is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHAT_SWALLOW_OPTS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHAT_SEND_ESCAPES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHAT_VAR_ABORT_LEN is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHAT_CLR_ABORT is not set -# CONFIG_BUSYBOX_DEFAULT_CHRT is not set -CONFIG_BUSYBOX_DEFAULT_CRONTAB=y -# CONFIG_BUSYBOX_DEFAULT_DC is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DC_LIBM is not set -# CONFIG_BUSYBOX_DEFAULT_DEVFSD is not set -# CONFIG_BUSYBOX_DEFAULT_DEVFSD_MODLOAD is not set -# CONFIG_BUSYBOX_DEFAULT_DEVFSD_FG_NP is not set -# CONFIG_BUSYBOX_DEFAULT_DEVFSD_VERBOSE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_DEVFS is not set -# CONFIG_BUSYBOX_DEFAULT_DEVMEM is not set -# CONFIG_BUSYBOX_DEFAULT_EJECT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_EJECT_SCSI is not set -# CONFIG_BUSYBOX_DEFAULT_FBSPLASH is not set -# CONFIG_BUSYBOX_DEFAULT_FLASHCP is not set -# CONFIG_BUSYBOX_DEFAULT_FLASH_LOCK is not set -# CONFIG_BUSYBOX_DEFAULT_FLASH_UNLOCK is not set -# CONFIG_BUSYBOX_DEFAULT_FLASH_ERASEALL is not set -# CONFIG_BUSYBOX_DEFAULT_IONICE is not set -# CONFIG_BUSYBOX_DEFAULT_INOTIFYD is not set -# CONFIG_BUSYBOX_DEFAULT_LAST is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LAST_FANCY is not set -# CONFIG_BUSYBOX_DEFAULT_HDPARM is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HDPARM_GET_IDENTITY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HDPARM_HDIO_SCAN_HWIF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HDPARM_HDIO_UNREGISTER_HWIF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HDPARM_HDIO_DRIVE_RESET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HDPARM_HDIO_TRISTATE_HWIF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HDPARM_HDIO_GETSET_DMA is not set -CONFIG_BUSYBOX_DEFAULT_LOCK=y -# CONFIG_BUSYBOX_DEFAULT_MAKEDEVS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MAKEDEVS_LEAF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_MAKEDEVS_TABLE is not set -# CONFIG_BUSYBOX_DEFAULT_MAN is not set -# CONFIG_BUSYBOX_DEFAULT_MICROCOM is not set -# CONFIG_BUSYBOX_DEFAULT_MOUNTPOINT is not set -# CONFIG_BUSYBOX_DEFAULT_MT is not set -# CONFIG_BUSYBOX_DEFAULT_RAIDAUTORUN is not set -# CONFIG_BUSYBOX_DEFAULT_READAHEAD is not set -# CONFIG_BUSYBOX_DEFAULT_RUNLEVEL is not set -# CONFIG_BUSYBOX_DEFAULT_RX is not set -# CONFIG_BUSYBOX_DEFAULT_SETSID is not set -CONFIG_BUSYBOX_DEFAULT_STRINGS=y -CONFIG_BUSYBOX_DEFAULT_TIME=y -# CONFIG_BUSYBOX_DEFAULT_TIMEOUT is not set -# CONFIG_BUSYBOX_DEFAULT_TTYSIZE is not set -# CONFIG_BUSYBOX_DEFAULT_VOLNAME is not set -# CONFIG_BUSYBOX_DEFAULT_WATCHDOG is not set -# CONFIG_BUSYBOX_DEFAULT_NAMEIF is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_NAMEIF_EXTENDED is not set -# CONFIG_BUSYBOX_DEFAULT_NBDCLIENT is not set -CONFIG_BUSYBOX_DEFAULT_NC=y -# CONFIG_BUSYBOX_DEFAULT_NC_SERVER is not set -# CONFIG_BUSYBOX_DEFAULT_NC_EXTRA is not set -# CONFIG_BUSYBOX_DEFAULT_NC_110_COMPAT is not set -CONFIG_BUSYBOX_DEFAULT_PING=y -CONFIG_BUSYBOX_DEFAULT_PING6=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_FANCY_PING=y -# CONFIG_BUSYBOX_DEFAULT_WGET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WGET_STATUSBAR is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WGET_AUTHENTICATION is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WGET_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WGET_TIMEOUT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WGET_OPENSSL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_WGET_SSL_HELPER is not set -# CONFIG_BUSYBOX_DEFAULT_WHOIS is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_IPV6=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UNIX_LOCAL is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_PREFER_IPV4_ADDRESS=y -CONFIG_BUSYBOX_DEFAULT_VERBOSE_RESOLUTION_ERRORS=y -# CONFIG_BUSYBOX_DEFAULT_ARP is not set -# CONFIG_BUSYBOX_DEFAULT_ARPING is not set -CONFIG_BUSYBOX_DEFAULT_BRCTL=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_BRCTL_FANCY=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_BRCTL_SHOW=y -# CONFIG_BUSYBOX_DEFAULT_DNSD is not set -# CONFIG_BUSYBOX_DEFAULT_ETHER_WAKE is not set -# CONFIG_BUSYBOX_DEFAULT_FAKEIDENTD is not set -# CONFIG_BUSYBOX_DEFAULT_FTPD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FTP_WRITE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FTPD_ACCEPT_BROKEN_LIST is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FTP_AUTHENTICATION is not set -# CONFIG_BUSYBOX_DEFAULT_FTPGET is not set -# CONFIG_BUSYBOX_DEFAULT_FTPPUT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_FTPGETPUT_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_HOSTNAME is not set -# CONFIG_BUSYBOX_DEFAULT_HTTPD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_RANGES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_SETUID is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_BASIC_AUTH is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_AUTH_MD5 is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_CGI is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_ENCODE_URL_STR is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_ERROR_PAGES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_PROXY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_HTTPD_GZIP is not set -CONFIG_BUSYBOX_DEFAULT_IFCONFIG=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_IFCONFIG_STATUS=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFCONFIG_SLIP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_IFCONFIG_HW=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_IFCONFIG_BROADCAST_PLUS=y -# CONFIG_BUSYBOX_DEFAULT_IFENSLAVE is not set -# CONFIG_BUSYBOX_DEFAULT_IFPLUGD is not set -# CONFIG_BUSYBOX_DEFAULT_IFUPDOWN is not set -CONFIG_BUSYBOX_DEFAULT_IFUPDOWN_IFSTATE_PATH="" -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFUPDOWN_IP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFUPDOWN_IP_BUILTIN is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFUPDOWN_IFCONFIG_BUILTIN is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFUPDOWN_IPV4 is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFUPDOWN_IPV6 is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFUPDOWN_MAPPING is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IFUPDOWN_EXTERNAL_DHCP is not set -# CONFIG_BUSYBOX_DEFAULT_INETD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INETD_SUPPORT_BUILTIN_ECHO is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INETD_SUPPORT_BUILTIN_DISCARD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INETD_SUPPORT_BUILTIN_TIME is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INETD_SUPPORT_BUILTIN_DAYTIME is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INETD_SUPPORT_BUILTIN_CHARGEN is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_INETD_RPC is not set -CONFIG_BUSYBOX_DEFAULT_IP=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_ADDRESS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_LINK=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_ROUTE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_ROUTE_DIR="/etc/iproute2" -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_TUNNEL is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_RULE=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_NEIGH is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_SHORT_FORMS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IP_RARE_PROTOCOLS is not set -# CONFIG_BUSYBOX_DEFAULT_IPADDR is not set -# CONFIG_BUSYBOX_DEFAULT_IPLINK is not set -# CONFIG_BUSYBOX_DEFAULT_IPROUTE is not set -# CONFIG_BUSYBOX_DEFAULT_IPTUNNEL is not set -# CONFIG_BUSYBOX_DEFAULT_IPRULE is not set -# CONFIG_BUSYBOX_DEFAULT_IPNEIGH is not set -# CONFIG_BUSYBOX_DEFAULT_IPCALC is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IPCALC_FANCY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IPCALC_LONG_OPTIONS is not set -CONFIG_BUSYBOX_DEFAULT_NETMSG=y -CONFIG_BUSYBOX_DEFAULT_NETSTAT=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_NETSTAT_WIDE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_NETSTAT_PRG=y -# CONFIG_BUSYBOX_DEFAULT_NSLOOKUP is not set -CONFIG_BUSYBOX_DEFAULT_NSLOOKUP_LEDE=y -CONFIG_BUSYBOX_DEFAULT_NTPD=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_NTPD_SERVER=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_NTPD_CONF is not set -# CONFIG_BUSYBOX_DEFAULT_PSCAN is not set -CONFIG_BUSYBOX_DEFAULT_ROUTE=y -# CONFIG_BUSYBOX_DEFAULT_SLATTACH is not set -# CONFIG_BUSYBOX_DEFAULT_TCPSVD is not set -# CONFIG_BUSYBOX_DEFAULT_TELNET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TELNET_TTYPE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TELNET_AUTOLOGIN is not set -# CONFIG_BUSYBOX_DEFAULT_TELNETD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TELNETD_STANDALONE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TELNETD_INETD_WAIT is not set -# CONFIG_BUSYBOX_DEFAULT_TFTP is not set -# CONFIG_BUSYBOX_DEFAULT_TFTPD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TFTP_GET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TFTP_PUT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TFTP_BLOCKSIZE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TFTP_PROGRESS_BAR is not set -# CONFIG_BUSYBOX_DEFAULT_TFTP_DEBUG is not set -CONFIG_BUSYBOX_DEFAULT_TRACEROUTE=y -CONFIG_BUSYBOX_DEFAULT_TRACEROUTE6=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_TRACEROUTE_VERBOSE=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TRACEROUTE_USE_ICMP is not set -# CONFIG_BUSYBOX_DEFAULT_TUNCTL is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TUNCTL_UG is not set -# CONFIG_BUSYBOX_DEFAULT_UDHCPC6 is not set -# CONFIG_BUSYBOX_DEFAULT_UDHCPD is not set -# CONFIG_BUSYBOX_DEFAULT_DHCPRELAY is not set -# CONFIG_BUSYBOX_DEFAULT_DUMPLEASES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UDHCPD_WRITE_LEASES_EARLY is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UDHCPD_BASE_IP_ON_MAC is not set -CONFIG_BUSYBOX_DEFAULT_DHCPD_LEASES_FILE="" -CONFIG_BUSYBOX_DEFAULT_UDHCPC=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UDHCPC_ARPING is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UDHCPC_SANITIZEOPT is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UDHCP_PORT is not set -CONFIG_BUSYBOX_DEFAULT_UDHCP_DEBUG=0 -CONFIG_BUSYBOX_DEFAULT_FEATURE_UDHCP_RFC3397=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UDHCP_8021Q is not set -CONFIG_BUSYBOX_DEFAULT_UDHCPC_DEFAULT_SCRIPT="/usr/share/udhcpc/default.script" -CONFIG_BUSYBOX_DEFAULT_UDHCPC_SLACK_FOR_BUGGY_SERVERS=80 -CONFIG_BUSYBOX_DEFAULT_IFUPDOWN_UDHCPC_CMD_OPTIONS="" -# CONFIG_BUSYBOX_DEFAULT_UDPSVD is not set -# CONFIG_BUSYBOX_DEFAULT_VCONFIG is not set -# CONFIG_BUSYBOX_DEFAULT_ZCIP is not set -# CONFIG_BUSYBOX_DEFAULT_LPD is not set -# CONFIG_BUSYBOX_DEFAULT_LPR is not set -# CONFIG_BUSYBOX_DEFAULT_LPQ is not set -# CONFIG_BUSYBOX_DEFAULT_MAKEMIME is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_MIME_CHARSET="" -# CONFIG_BUSYBOX_DEFAULT_POPMAILDIR is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_POPMAILDIR_DELIVERY is not set -# CONFIG_BUSYBOX_DEFAULT_REFORMIME is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_REFORMIME_COMPAT is not set -# CONFIG_BUSYBOX_DEFAULT_SENDMAIL is not set -# CONFIG_BUSYBOX_DEFAULT_IOSTAT is not set -# CONFIG_BUSYBOX_DEFAULT_LSOF is not set -# CONFIG_BUSYBOX_DEFAULT_MPSTAT is not set -# CONFIG_BUSYBOX_DEFAULT_NMETER is not set -# CONFIG_BUSYBOX_DEFAULT_PMAP is not set -# CONFIG_BUSYBOX_DEFAULT_POWERTOP is not set -# CONFIG_BUSYBOX_DEFAULT_PSTREE is not set -# CONFIG_BUSYBOX_DEFAULT_PWDX is not set -# CONFIG_BUSYBOX_DEFAULT_SMEMCAP is not set -CONFIG_BUSYBOX_DEFAULT_TOP=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TOP_SMP_CPU is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TOP_DECIMALS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TOP_SMP_PROCESS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_TOPMEM is not set -CONFIG_BUSYBOX_DEFAULT_UPTIME=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_UPTIME_UTMP_SUPPORT is not set -CONFIG_BUSYBOX_DEFAULT_FREE=y -# CONFIG_BUSYBOX_DEFAULT_FUSER is not set -CONFIG_BUSYBOX_DEFAULT_KILL=y -CONFIG_BUSYBOX_DEFAULT_KILLALL=y -# CONFIG_BUSYBOX_DEFAULT_KILLALL5 is not set -CONFIG_BUSYBOX_DEFAULT_PGREP=y -CONFIG_BUSYBOX_DEFAULT_PIDOF=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_PIDOF_SINGLE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_PIDOF_OMIT is not set -# CONFIG_BUSYBOX_DEFAULT_PKILL is not set -CONFIG_BUSYBOX_DEFAULT_PS=y -CONFIG_BUSYBOX_DEFAULT_FEATURE_PS_WIDE=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_PS_LONG is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_PS_TIME is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_PS_ADDITIONAL_COLUMNS is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_PS_UNUSUAL_SYSTEMS is not set -# CONFIG_BUSYBOX_DEFAULT_RENICE is not set -CONFIG_BUSYBOX_DEFAULT_BB_SYSCTL=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SHOW_THREADS is not set -# CONFIG_BUSYBOX_DEFAULT_WATCH is not set -# CONFIG_BUSYBOX_DEFAULT_CHPST is not set -# CONFIG_BUSYBOX_DEFAULT_SETUIDGID is not set -# CONFIG_BUSYBOX_DEFAULT_ENVUIDGID is not set -# CONFIG_BUSYBOX_DEFAULT_ENVDIR is not set -# CONFIG_BUSYBOX_DEFAULT_SOFTLIMIT is not set -# CONFIG_BUSYBOX_DEFAULT_RUNSV is not set -# CONFIG_BUSYBOX_DEFAULT_RUNSVDIR is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_RUNSVDIR_LOG is not set -# CONFIG_BUSYBOX_DEFAULT_SV is not set -CONFIG_BUSYBOX_DEFAULT_SV_DEFAULT_SERVICE_DIR="" -# CONFIG_BUSYBOX_DEFAULT_SVLOGD is not set -# CONFIG_BUSYBOX_DEFAULT_CHCON is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_CHCON_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_GETENFORCE is not set -# CONFIG_BUSYBOX_DEFAULT_GETSEBOOL is not set -# CONFIG_BUSYBOX_DEFAULT_LOAD_POLICY is not set -# CONFIG_BUSYBOX_DEFAULT_MATCHPATHCON is not set -# CONFIG_BUSYBOX_DEFAULT_RESTORECON is not set -# CONFIG_BUSYBOX_DEFAULT_RUNCON is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_RUNCON_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_SELINUXENABLED is not set -# CONFIG_BUSYBOX_DEFAULT_SETENFORCE is not set -# CONFIG_BUSYBOX_DEFAULT_SETFILES is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SETFILES_CHECK_OPTION is not set -# CONFIG_BUSYBOX_DEFAULT_SETSEBOOL is not set -# CONFIG_BUSYBOX_DEFAULT_SESTATUS is not set -CONFIG_BUSYBOX_DEFAULT_ASH=y -CONFIG_BUSYBOX_DEFAULT_ASH_BASH_COMPAT=y -# CONFIG_BUSYBOX_DEFAULT_ASH_IDLE_TIMEOUT is not set -CONFIG_BUSYBOX_DEFAULT_ASH_JOB_CONTROL=y -CONFIG_BUSYBOX_DEFAULT_ASH_ALIAS=y -CONFIG_BUSYBOX_DEFAULT_ASH_GETOPTS=y -CONFIG_BUSYBOX_DEFAULT_ASH_BUILTIN_ECHO=y -CONFIG_BUSYBOX_DEFAULT_ASH_BUILTIN_PRINTF=y -CONFIG_BUSYBOX_DEFAULT_ASH_BUILTIN_TEST=y -# CONFIG_BUSYBOX_DEFAULT_ASH_HELP is not set -CONFIG_BUSYBOX_DEFAULT_ASH_CMDCMD=y -# CONFIG_BUSYBOX_DEFAULT_ASH_MAIL is not set -# CONFIG_BUSYBOX_DEFAULT_ASH_OPTIMIZE_FOR_SIZE is not set -# CONFIG_BUSYBOX_DEFAULT_ASH_RANDOM_SUPPORT is not set -CONFIG_BUSYBOX_DEFAULT_ASH_EXPAND_PRMT=y -# CONFIG_BUSYBOX_DEFAULT_CTTYHACK is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_BASH_COMPAT is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_BRACE_EXPANSION is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_HELP is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_INTERACTIVE is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_SAVEHISTORY is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_JOB is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_TICK is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_IF is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_LOOPS is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_CASE is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_FUNCTIONS is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_LOCAL is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_RANDOM_SUPPORT is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_EXPORT_N is not set -# CONFIG_BUSYBOX_DEFAULT_HUSH_MODE_X is not set -# CONFIG_BUSYBOX_DEFAULT_MSH is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_SH_IS_ASH=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SH_IS_HUSH is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SH_IS_NONE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_BASH_IS_ASH is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_BASH_IS_HUSH is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_BASH_IS_NONE=y -CONFIG_BUSYBOX_DEFAULT_SH_MATH_SUPPORT=y -CONFIG_BUSYBOX_DEFAULT_SH_MATH_SUPPORT_64=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SH_EXTRA_QUIET is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SH_STANDALONE is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_SH_NOFORK=y -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SH_HISTFILESIZE is not set -# CONFIG_BUSYBOX_DEFAULT_KLOGD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_KLOGD_KLOGCTL is not set -CONFIG_BUSYBOX_DEFAULT_LOGGER=y -# CONFIG_BUSYBOX_DEFAULT_LOGREAD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_LOGREAD_REDUCED_LOCKING is not set -# CONFIG_BUSYBOX_DEFAULT_SYSLOGD is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_ROTATE_LOGFILE is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_REMOTE_LOG is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SYSLOGD_DUP is not set -# CONFIG_BUSYBOX_DEFAULT_FEATURE_SYSLOGD_CFG is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_SYSLOGD_READ_BUFFER_SIZE=0 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_IPC_SYSLOG is not set -CONFIG_BUSYBOX_DEFAULT_FEATURE_IPC_SYSLOG_BUFFER_SIZE=0 -# CONFIG_BUSYBOX_DEFAULT_FEATURE_KMSG_SYSLOG is not set -CONFIG_BUSYBOX_CONFIG_HAVE_DOT_CONFIG=y - -# -# Busybox Settings -# - -# -# General Configuration -# -# CONFIG_BUSYBOX_CONFIG_DESKTOP is not set -# CONFIG_BUSYBOX_CONFIG_EXTRA_COMPAT is not set -CONFIG_BUSYBOX_CONFIG_INCLUDE_SUSv2=y -# CONFIG_BUSYBOX_CONFIG_USE_PORTABLE_CODE is not set -CONFIG_BUSYBOX_CONFIG_PLATFORM_LINUX=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_BUFFERS_USE_MALLOC is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_BUFFERS_GO_ON_STACK=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_BUFFERS_GO_IN_BSS is not set -CONFIG_BUSYBOX_CONFIG_SHOW_USAGE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VERBOSE_USAGE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_COMPRESS_USAGE=y -# CONFIG_BUSYBOX_CONFIG_BUSYBOX is not set -# CONFIG_BUSYBOX_CONFIG_INSTALL_NO_USR is not set -# CONFIG_BUSYBOX_CONFIG_LOCALE_SUPPORT is not set -# CONFIG_BUSYBOX_CONFIG_UNICODE_SUPPORT is not set -# CONFIG_BUSYBOX_CONFIG_PAM is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_USE_SENDFILE is not set -CONFIG_BUSYBOX_CONFIG_LONG_OPTS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_DEVPTS=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_CLEAN_UP is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_UTMP is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_PIDFILE=y -CONFIG_BUSYBOX_CONFIG_PID_FILE_PATH="/var/run" -CONFIG_BUSYBOX_CONFIG_FEATURE_SUID=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SUID_CONFIG is not set -# CONFIG_BUSYBOX_CONFIG_SELINUX is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_PREFER_APPLETS=y -CONFIG_BUSYBOX_CONFIG_BUSYBOX_EXEC_PATH="/proc/self/exe" -CONFIG_BUSYBOX_CONFIG_FEATURE_SYSLOG=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_HAVE_RPC is not set - -# -# Build Options -# -# CONFIG_BUSYBOX_CONFIG_STATIC is not set -# CONFIG_BUSYBOX_CONFIG_PIE is not set -# CONFIG_BUSYBOX_CONFIG_NOMMU is not set -CONFIG_BUSYBOX_CONFIG_LFS=y -CONFIG_BUSYBOX_CONFIG_CROSS_COMPILER_PREFIX="" -CONFIG_BUSYBOX_CONFIG_SYSROOT="" -CONFIG_BUSYBOX_CONFIG_EXTRA_CFLAGS="" -CONFIG_BUSYBOX_CONFIG_EXTRA_LDFLAGS="" -CONFIG_BUSYBOX_CONFIG_EXTRA_LDLIBS="" - -# -# Debugging Options -# -# CONFIG_BUSYBOX_CONFIG_DEBUG is not set -# CONFIG_BUSYBOX_CONFIG_DEBUG_SANITIZE is not set -# CONFIG_BUSYBOX_CONFIG_UNIT_TEST is not set -# CONFIG_BUSYBOX_CONFIG_WERROR is not set -CONFIG_BUSYBOX_CONFIG_NO_DEBUG_LIB=y -# CONFIG_BUSYBOX_CONFIG_DMALLOC is not set -# CONFIG_BUSYBOX_CONFIG_EFENCE is not set - -# -# Installation Options ("make install" behavior) -# -CONFIG_BUSYBOX_CONFIG_INSTALL_APPLET_SYMLINKS=y -# CONFIG_BUSYBOX_CONFIG_INSTALL_APPLET_HARDLINKS is not set -# CONFIG_BUSYBOX_CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS is not set -# CONFIG_BUSYBOX_CONFIG_INSTALL_APPLET_DONT is not set -CONFIG_BUSYBOX_CONFIG_PREFIX="./_install" - -# -# Busybox Library Tuning -# -# CONFIG_BUSYBOX_CONFIG_FEATURE_USE_BSS_TAIL is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_RTMINMAX is not set -CONFIG_BUSYBOX_CONFIG_PASSWORD_MINLEN=6 -CONFIG_BUSYBOX_CONFIG_MD5_SMALL=1 -CONFIG_BUSYBOX_CONFIG_SHA3_SMALL=1 -CONFIG_BUSYBOX_CONFIG_FEATURE_FAST_TOP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_ETC_NETWORKS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_USE_TERMIOS is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_EDITING=y -CONFIG_BUSYBOX_CONFIG_FEATURE_EDITING_MAX_LEN=512 -# CONFIG_BUSYBOX_CONFIG_FEATURE_EDITING_VI is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_EDITING_HISTORY=256 -# CONFIG_BUSYBOX_CONFIG_FEATURE_EDITING_SAVEHISTORY is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_REVERSE_SEARCH is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_TAB_COMPLETION=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_USERNAME_COMPLETION is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_EDITING_FANCY_PROMPT=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_EDITING_ASK_TERMINAL is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_NON_POSIX_CP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_VERBOSE_CP_MESSAGE is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_COPYBUF_KB=4 -# CONFIG_BUSYBOX_CONFIG_FEATURE_SKIP_ROOTFS is not set -# CONFIG_BUSYBOX_CONFIG_MONOTONIC_SYSCALL is not set -CONFIG_BUSYBOX_CONFIG_IOCTL_HEX2STR_ERROR=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_HWIB is not set - -# -# Applets -# - -# -# Archival Utilities -# -# CONFIG_BUSYBOX_CONFIG_FEATURE_SEAMLESS_XZ is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_SEAMLESS_LZMA is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_SEAMLESS_BZ2 is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_SEAMLESS_GZ=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SEAMLESS_Z is not set -# CONFIG_BUSYBOX_CONFIG_AR is not set -# CONFIG_BUSYBOX_CONFIG_UNCOMPRESS is not set -CONFIG_BUSYBOX_CONFIG_GUNZIP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_GUNZIP_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_BUNZIP2=y -# CONFIG_BUSYBOX_CONFIG_UNLZMA is not set -# CONFIG_BUSYBOX_CONFIG_UNXZ is not set -# CONFIG_BUSYBOX_CONFIG_BZIP2 is not set -# CONFIG_BUSYBOX_CONFIG_CPIO is not set -# CONFIG_BUSYBOX_CONFIG_DPKG is not set -# CONFIG_BUSYBOX_CONFIG_DPKG_DEB is not set -CONFIG_BUSYBOX_CONFIG_GZIP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_GZIP_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_GZIP_FAST=0 -# CONFIG_BUSYBOX_CONFIG_FEATURE_GZIP_LEVELS is not set -# CONFIG_BUSYBOX_CONFIG_LZOP is not set -# CONFIG_BUSYBOX_CONFIG_RPM is not set -# CONFIG_BUSYBOX_CONFIG_RPM2CPIO is not set -CONFIG_BUSYBOX_CONFIG_TAR=y -CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_CREATE=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_AUTODETECT is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_FROM=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_OLDGNU_COMPATIBILITY is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_OLDSUN_COMPATIBILITY is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_GNU_EXTENSIONS=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_UNAME_GNAME is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TAR_NOPRESERVE_TIME is not set -# CONFIG_BUSYBOX_CONFIG_UNZIP is not set - -# -# Coreutils -# -CONFIG_BUSYBOX_CONFIG_BASENAME=y -CONFIG_BUSYBOX_CONFIG_CAT=y -CONFIG_BUSYBOX_CONFIG_DATE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_DATE_ISOFMT=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_DATE_NANO is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_DATE_COMPAT is not set -CONFIG_BUSYBOX_CONFIG_DD=y -CONFIG_BUSYBOX_CONFIG_FEATURE_DD_SIGNAL_HANDLING=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_DD_THIRD_STATUS_LINE is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_DD_IBS_OBS=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_DD_STATUS is not set -# CONFIG_BUSYBOX_CONFIG_HOSTID is not set -CONFIG_BUSYBOX_CONFIG_ID=y -# CONFIG_BUSYBOX_CONFIG_GROUPS is not set -# CONFIG_BUSYBOX_CONFIG_SHUF is not set -# CONFIG_BUSYBOX_CONFIG_STAT is not set -CONFIG_BUSYBOX_CONFIG_SYNC=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SYNC_FANCY is not set -CONFIG_BUSYBOX_CONFIG_TEST=y -CONFIG_BUSYBOX_CONFIG_FEATURE_TEST_64=y -CONFIG_BUSYBOX_CONFIG_TOUCH=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_TOUCH_NODEREF is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_TOUCH_SUSV3=y -CONFIG_BUSYBOX_CONFIG_TR=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_TR_CLASSES is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TR_EQUIV is not set -# CONFIG_BUSYBOX_CONFIG_TRUNCATE is not set -# CONFIG_BUSYBOX_CONFIG_UNLINK is not set -# CONFIG_BUSYBOX_CONFIG_BASE64 is not set -# CONFIG_BUSYBOX_CONFIG_CAL is not set -# CONFIG_BUSYBOX_CONFIG_CATV is not set -CONFIG_BUSYBOX_CONFIG_CHGRP=y -CONFIG_BUSYBOX_CONFIG_CHMOD=y -CONFIG_BUSYBOX_CONFIG_CHOWN=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_CHOWN_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_CHROOT=y -# CONFIG_BUSYBOX_CONFIG_CKSUM is not set -# CONFIG_BUSYBOX_CONFIG_COMM is not set -CONFIG_BUSYBOX_CONFIG_CP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_CP_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_CUT=y -CONFIG_BUSYBOX_CONFIG_DF=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_DF_FANCY is not set -CONFIG_BUSYBOX_CONFIG_DIRNAME=y -# CONFIG_BUSYBOX_CONFIG_DOS2UNIX is not set -CONFIG_BUSYBOX_CONFIG_DU=y -CONFIG_BUSYBOX_CONFIG_FEATURE_DU_DEFAULT_BLOCKSIZE_1K=y -CONFIG_BUSYBOX_CONFIG_ECHO=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FANCY_ECHO=y -CONFIG_BUSYBOX_CONFIG_ENV=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_ENV_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_CONFIG_EXPAND is not set -CONFIG_BUSYBOX_CONFIG_EXPR=y -CONFIG_BUSYBOX_CONFIG_EXPR_MATH_SUPPORT_64=y -CONFIG_BUSYBOX_CONFIG_FALSE=y -# CONFIG_BUSYBOX_CONFIG_FOLD is not set -CONFIG_BUSYBOX_CONFIG_FSYNC=y -CONFIG_BUSYBOX_CONFIG_HEAD=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FANCY_HEAD=y -# CONFIG_BUSYBOX_CONFIG_INSTALL is not set -CONFIG_BUSYBOX_CONFIG_LN=y -# CONFIG_BUSYBOX_CONFIG_LOGNAME is not set -CONFIG_BUSYBOX_CONFIG_LS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_FILETYPES=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_FOLLOWLINKS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_RECURSIVE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_SORTFILES=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_TIMESTAMPS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_USERNAME=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_COLOR=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LS_COLOR_IS_DEFAULT=y -CONFIG_BUSYBOX_CONFIG_MD5SUM=y -CONFIG_BUSYBOX_CONFIG_MKDIR=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_MKDIR_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_MKFIFO=y -CONFIG_BUSYBOX_CONFIG_MKNOD=y -CONFIG_BUSYBOX_CONFIG_MV=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_MV_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_NICE=y -# CONFIG_BUSYBOX_CONFIG_NOHUP is not set -# CONFIG_BUSYBOX_CONFIG_OD is not set -# CONFIG_BUSYBOX_CONFIG_PRINTENV is not set -CONFIG_BUSYBOX_CONFIG_PRINTF=y -CONFIG_BUSYBOX_CONFIG_PWD=y -CONFIG_BUSYBOX_CONFIG_READLINK=y -CONFIG_BUSYBOX_CONFIG_FEATURE_READLINK_FOLLOW=y -# CONFIG_BUSYBOX_CONFIG_REALPATH is not set -CONFIG_BUSYBOX_CONFIG_RM=y -CONFIG_BUSYBOX_CONFIG_RMDIR=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_RMDIR_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_SEQ=y -# CONFIG_BUSYBOX_CONFIG_SHA1SUM is not set -CONFIG_BUSYBOX_CONFIG_SHA256SUM=y -# CONFIG_BUSYBOX_CONFIG_SHA512SUM is not set -# CONFIG_BUSYBOX_CONFIG_SHA3SUM is not set -CONFIG_BUSYBOX_CONFIG_SLEEP=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FANCY_SLEEP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_FLOAT_SLEEP is not set -CONFIG_BUSYBOX_CONFIG_SORT=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SORT_BIG is not set -# CONFIG_BUSYBOX_CONFIG_SPLIT is not set -# CONFIG_BUSYBOX_CONFIG_STTY is not set -# CONFIG_BUSYBOX_CONFIG_SUM is not set -# CONFIG_BUSYBOX_CONFIG_TAC is not set -CONFIG_BUSYBOX_CONFIG_TAIL=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FANCY_TAIL=y -CONFIG_BUSYBOX_CONFIG_TEE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_TEE_USE_BLOCK_IO=y -CONFIG_BUSYBOX_CONFIG_TRUE=y -# CONFIG_BUSYBOX_CONFIG_TTY is not set -CONFIG_BUSYBOX_CONFIG_UNAME=y -CONFIG_BUSYBOX_CONFIG_UNAME_OSNAME="GNU/Linux" -# CONFIG_BUSYBOX_CONFIG_UNEXPAND is not set -CONFIG_BUSYBOX_CONFIG_UNIQ=y -# CONFIG_BUSYBOX_CONFIG_USLEEP is not set -# CONFIG_BUSYBOX_CONFIG_UUDECODE is not set -# CONFIG_BUSYBOX_CONFIG_UUENCODE is not set -CONFIG_BUSYBOX_CONFIG_WC=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_WC_LARGE is not set -# CONFIG_BUSYBOX_CONFIG_WHOAMI is not set -CONFIG_BUSYBOX_CONFIG_YES=y - -# -# Common options -# -# CONFIG_BUSYBOX_CONFIG_FEATURE_VERBOSE is not set - -# -# Common options for cp and mv -# -CONFIG_BUSYBOX_CONFIG_FEATURE_PRESERVE_HARDLINKS=y - -# -# Common options for ls, more and telnet -# -CONFIG_BUSYBOX_CONFIG_FEATURE_AUTOWIDTH=y - -# -# Common options for df, du, ls -# -CONFIG_BUSYBOX_CONFIG_FEATURE_HUMAN_READABLE=y - -# -# Common options for md5sum, sha1sum, sha256sum, sha512sum, sha3sum -# -CONFIG_BUSYBOX_CONFIG_FEATURE_MD5_SHA1_SUM_CHECK=y - -# -# Console Utilities -# -# CONFIG_BUSYBOX_CONFIG_CHVT is not set -# CONFIG_BUSYBOX_CONFIG_FGCONSOLE is not set -CONFIG_BUSYBOX_CONFIG_CLEAR=y -# CONFIG_BUSYBOX_CONFIG_DEALLOCVT is not set -# CONFIG_BUSYBOX_CONFIG_DUMPKMAP is not set -# CONFIG_BUSYBOX_CONFIG_KBD_MODE is not set -# CONFIG_BUSYBOX_CONFIG_LOADFONT is not set -# CONFIG_BUSYBOX_CONFIG_LOADKMAP is not set -# CONFIG_BUSYBOX_CONFIG_OPENVT is not set -CONFIG_BUSYBOX_CONFIG_RESET=y -# CONFIG_BUSYBOX_CONFIG_RESIZE is not set -# CONFIG_BUSYBOX_CONFIG_SETCONSOLE is not set -# CONFIG_BUSYBOX_CONFIG_SETFONT is not set -# CONFIG_BUSYBOX_CONFIG_SETKEYCODES is not set -# CONFIG_BUSYBOX_CONFIG_SETLOGCONS is not set -# CONFIG_BUSYBOX_CONFIG_SHOWKEY is not set - -# -# Debian Utilities -# -CONFIG_BUSYBOX_CONFIG_MKTEMP=y -# CONFIG_BUSYBOX_CONFIG_PIPE_PROGRESS is not set -# CONFIG_BUSYBOX_CONFIG_RUN_PARTS is not set -CONFIG_BUSYBOX_CONFIG_START_STOP_DAEMON=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_START_STOP_DAEMON_FANCY is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_START_STOP_DAEMON_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_WHICH=y - -# -# Editors -# -CONFIG_BUSYBOX_CONFIG_AWK=y -CONFIG_BUSYBOX_CONFIG_FEATURE_AWK_LIBM=y -CONFIG_BUSYBOX_CONFIG_FEATURE_AWK_GNU_EXTENSIONS=y -CONFIG_BUSYBOX_CONFIG_CMP=y -# CONFIG_BUSYBOX_CONFIG_DIFF is not set -# CONFIG_BUSYBOX_CONFIG_ED is not set -# CONFIG_BUSYBOX_CONFIG_PATCH is not set -CONFIG_BUSYBOX_CONFIG_SED=y -CONFIG_BUSYBOX_CONFIG_VI=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_MAX_LEN=1024 -# CONFIG_BUSYBOX_CONFIG_FEATURE_VI_8BIT is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_COLON=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_YANKMARK=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_SEARCH=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_VI_REGEX_SEARCH is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_USE_SIGNALS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_DOT_CMD=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_READONLY=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_SETOPTS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_SET=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_WIN_RESIZE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_VI_ASK_TERMINAL=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_VI_UNDO is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_ALLOW_EXEC=y - -# -# Finding Utilities -# -CONFIG_BUSYBOX_CONFIG_FIND=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_PRINT0=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_MTIME=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_MMIN is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_PERM=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_TYPE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_XDEV=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_MAXDEPTH=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_NEWER is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_INUM is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_EXEC=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_EXEC_PLUS is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_USER=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_GROUP=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_NOT=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_DEPTH=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_PAREN=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_SIZE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_PRUNE=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_DELETE is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_PATH=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_REGEX=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_FIND_LINKS is not set -CONFIG_BUSYBOX_CONFIG_GREP=y -CONFIG_BUSYBOX_CONFIG_FEATURE_GREP_EGREP_ALIAS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_GREP_FGREP_ALIAS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_GREP_CONTEXT=y -CONFIG_BUSYBOX_CONFIG_XARGS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_XARGS_SUPPORT_CONFIRMATION=y -CONFIG_BUSYBOX_CONFIG_FEATURE_XARGS_SUPPORT_QUOTES=y -CONFIG_BUSYBOX_CONFIG_FEATURE_XARGS_SUPPORT_TERMOPT=y -CONFIG_BUSYBOX_CONFIG_FEATURE_XARGS_SUPPORT_ZERO_TERM=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_XARGS_SUPPORT_REPL_STR is not set - -# -# Init Utilities -# -# CONFIG_BUSYBOX_CONFIG_BOOTCHARTD is not set -CONFIG_BUSYBOX_CONFIG_HALT=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_CALL_TELINIT is not set -# CONFIG_BUSYBOX_CONFIG_INIT is not set -# CONFIG_BUSYBOX_CONFIG_LINUXRC is not set -# CONFIG_BUSYBOX_CONFIG_MESG is not set - -# -# Login/Password Management Utilities -# -CONFIG_BUSYBOX_CONFIG_FEATURE_SHADOWPASSWDS=y -# CONFIG_BUSYBOX_CONFIG_USE_BB_PWD_GRP is not set -# CONFIG_BUSYBOX_CONFIG_USE_BB_CRYPT is not set -# CONFIG_BUSYBOX_CONFIG_ADD_SHELL is not set -# CONFIG_BUSYBOX_CONFIG_REMOVE_SHELL is not set -# CONFIG_BUSYBOX_CONFIG_ADDGROUP is not set -# CONFIG_BUSYBOX_CONFIG_ADDUSER is not set -# CONFIG_BUSYBOX_CONFIG_CHPASSWD is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_DEFAULT_PASSWD_ALGO="md5" -# CONFIG_BUSYBOX_CONFIG_CRYPTPW is not set -# CONFIG_BUSYBOX_CONFIG_MKPASSWD is not set -# CONFIG_BUSYBOX_CONFIG_DELUSER is not set -# CONFIG_BUSYBOX_CONFIG_DELGROUP is not set -# CONFIG_BUSYBOX_CONFIG_GETTY is not set -CONFIG_BUSYBOX_CONFIG_LOGIN=y -# CONFIG_BUSYBOX_CONFIG_LOGIN_SESSION_AS_CHILD is not set -# CONFIG_BUSYBOX_CONFIG_LOGIN_SCRIPTS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_NOLOGIN is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_SECURETTY is not set -CONFIG_BUSYBOX_CONFIG_PASSWD=y -CONFIG_BUSYBOX_CONFIG_FEATURE_PASSWD_WEAK_CHECK=y -# CONFIG_BUSYBOX_CONFIG_SU is not set -# CONFIG_BUSYBOX_CONFIG_SULOGIN is not set -# CONFIG_BUSYBOX_CONFIG_VLOCK is not set - -# -# Linux Ext2 FS Progs -# -# CONFIG_BUSYBOX_CONFIG_CHATTR is not set -# CONFIG_BUSYBOX_CONFIG_FSCK is not set -# CONFIG_BUSYBOX_CONFIG_LSATTR is not set -# CONFIG_BUSYBOX_CONFIG_TUNE2FS is not set - -# -# Linux Module Utilities -# -# CONFIG_BUSYBOX_CONFIG_MODINFO is not set -# CONFIG_BUSYBOX_CONFIG_MODPROBE_SMALL is not set -# CONFIG_BUSYBOX_CONFIG_INSMOD is not set -# CONFIG_BUSYBOX_CONFIG_RMMOD is not set -# CONFIG_BUSYBOX_CONFIG_LSMOD is not set -# CONFIG_BUSYBOX_CONFIG_MODPROBE is not set -# CONFIG_BUSYBOX_CONFIG_DEPMOD is not set - -# -# Options common to multiple modutils -# - -# -# Linux System Utilities -# -# CONFIG_BUSYBOX_CONFIG_BLKDISCARD is not set -# CONFIG_BUSYBOX_CONFIG_BLOCKDEV is not set -# CONFIG_BUSYBOX_CONFIG_FATATTR is not set -# CONFIG_BUSYBOX_CONFIG_FSTRIM is not set -# CONFIG_BUSYBOX_CONFIG_MDEV is not set -CONFIG_BUSYBOX_CONFIG_MOUNT=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_FAKE is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_VERBOSE is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_HELPERS=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_LABEL is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_NFS is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_CIFS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_FLAGS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_FSTAB=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_OTHERTAB is not set -# CONFIG_BUSYBOX_CONFIG_NSENTER is not set -# CONFIG_BUSYBOX_CONFIG_REV is not set -# CONFIG_BUSYBOX_CONFIG_SETARCH is not set -# CONFIG_BUSYBOX_CONFIG_UEVENT is not set -# CONFIG_BUSYBOX_CONFIG_UNSHARE is not set -# CONFIG_BUSYBOX_CONFIG_ACPID is not set -# CONFIG_BUSYBOX_CONFIG_BLKID is not set -CONFIG_BUSYBOX_CONFIG_DMESG=y -CONFIG_BUSYBOX_CONFIG_FEATURE_DMESG_PRETTY=y -# CONFIG_BUSYBOX_CONFIG_FBSET is not set -# CONFIG_BUSYBOX_CONFIG_FDFLUSH is not set -# CONFIG_BUSYBOX_CONFIG_FDFORMAT is not set -# CONFIG_BUSYBOX_CONFIG_FDISK is not set -# CONFIG_BUSYBOX_CONFIG_FINDFS is not set -# CONFIG_BUSYBOX_CONFIG_FLOCK is not set -# CONFIG_BUSYBOX_CONFIG_FREERAMDISK is not set -# CONFIG_BUSYBOX_CONFIG_FSCK_MINIX is not set -# CONFIG_BUSYBOX_CONFIG_MKFS_EXT2 is not set -# CONFIG_BUSYBOX_CONFIG_MKFS_MINIX is not set -# CONFIG_BUSYBOX_CONFIG_MKFS_REISER is not set -# CONFIG_BUSYBOX_CONFIG_MKFS_VFAT is not set -# CONFIG_BUSYBOX_CONFIG_GETOPT is not set -CONFIG_BUSYBOX_CONFIG_HEXDUMP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_HEXDUMP_REVERSE is not set -# CONFIG_BUSYBOX_CONFIG_HD is not set -CONFIG_BUSYBOX_CONFIG_HWCLOCK=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_HWCLOCK_LONG_OPTIONS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_HWCLOCK_ADJTIME_FHS is not set -# CONFIG_BUSYBOX_CONFIG_IPCRM is not set -# CONFIG_BUSYBOX_CONFIG_IPCS is not set -# CONFIG_BUSYBOX_CONFIG_LOSETUP is not set -# CONFIG_BUSYBOX_CONFIG_LSPCI is not set -# CONFIG_BUSYBOX_CONFIG_LSUSB is not set -CONFIG_BUSYBOX_CONFIG_MKSWAP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_MKSWAP_UUID is not set -# CONFIG_BUSYBOX_CONFIG_MORE is not set -CONFIG_BUSYBOX_CONFIG_PIVOT_ROOT=y -# CONFIG_BUSYBOX_CONFIG_RDATE is not set -# CONFIG_BUSYBOX_CONFIG_RDEV is not set -# CONFIG_BUSYBOX_CONFIG_READPROFILE is not set -# CONFIG_BUSYBOX_CONFIG_RTCWAKE is not set -# CONFIG_BUSYBOX_CONFIG_SCRIPT is not set -# CONFIG_BUSYBOX_CONFIG_SCRIPTREPLAY is not set -# CONFIG_BUSYBOX_CONFIG_SWAPONOFF is not set -CONFIG_BUSYBOX_CONFIG_SWITCH_ROOT=y -CONFIG_BUSYBOX_CONFIG_UMOUNT=y -CONFIG_BUSYBOX_CONFIG_FEATURE_UMOUNT_ALL=y - -# -# Common options for mount/umount -# -CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_LOOP=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_MOUNT_LOOP_CREATE is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_MTAB_SUPPORT is not set -# CONFIG_BUSYBOX_CONFIG_VOLUMEID is not set - -# -# Miscellaneous Utilities -# -# CONFIG_BUSYBOX_CONFIG_CONSPY is not set -CONFIG_BUSYBOX_CONFIG_CROND=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_CROND_D is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_CROND_CALL_SENDMAIL is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_CROND_DIR="/etc" -# CONFIG_BUSYBOX_CONFIG_I2CGET is not set -# CONFIG_BUSYBOX_CONFIG_I2CSET is not set -# CONFIG_BUSYBOX_CONFIG_I2CDUMP is not set -# CONFIG_BUSYBOX_CONFIG_I2CDETECT is not set -CONFIG_BUSYBOX_CONFIG_LESS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_MAXLINES=9999999 -# CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_BRACKETS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_FLAGS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_TRUNCATE is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_MARKS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_REGEXP is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_WINCH is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_LESS_DASHCMD is not set -# CONFIG_BUSYBOX_CONFIG_NANDWRITE is not set -# CONFIG_BUSYBOX_CONFIG_NANDDUMP is not set -# CONFIG_BUSYBOX_CONFIG_RFKILL is not set -# CONFIG_BUSYBOX_CONFIG_SETSERIAL is not set -# CONFIG_BUSYBOX_CONFIG_TASKSET is not set -# CONFIG_BUSYBOX_CONFIG_UBIATTACH is not set -# CONFIG_BUSYBOX_CONFIG_UBIDETACH is not set -# CONFIG_BUSYBOX_CONFIG_UBIMKVOL is not set -# CONFIG_BUSYBOX_CONFIG_UBIRMVOL is not set -# CONFIG_BUSYBOX_CONFIG_UBIRSVOL is not set -# CONFIG_BUSYBOX_CONFIG_UBIUPDATEVOL is not set -# CONFIG_BUSYBOX_CONFIG_UBIRENAME is not set -# CONFIG_BUSYBOX_CONFIG_ADJTIMEX is not set -# CONFIG_BUSYBOX_CONFIG_BBCONFIG is not set -# CONFIG_BUSYBOX_CONFIG_BEEP is not set -# CONFIG_BUSYBOX_CONFIG_CHAT is not set -# CONFIG_BUSYBOX_CONFIG_CHRT is not set -CONFIG_BUSYBOX_CONFIG_CRONTAB=y -# CONFIG_BUSYBOX_CONFIG_DC is not set -# CONFIG_BUSYBOX_CONFIG_DEVFSD is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_DEVFS is not set -# CONFIG_BUSYBOX_CONFIG_DEVMEM is not set -# CONFIG_BUSYBOX_CONFIG_EJECT is not set -# CONFIG_BUSYBOX_CONFIG_FBSPLASH is not set -# CONFIG_BUSYBOX_CONFIG_FLASHCP is not set -# CONFIG_BUSYBOX_CONFIG_FLASH_LOCK is not set -# CONFIG_BUSYBOX_CONFIG_FLASH_UNLOCK is not set -# CONFIG_BUSYBOX_CONFIG_FLASH_ERASEALL is not set -# CONFIG_BUSYBOX_CONFIG_IONICE is not set -# CONFIG_BUSYBOX_CONFIG_INOTIFYD is not set -# CONFIG_BUSYBOX_CONFIG_HDPARM is not set -CONFIG_BUSYBOX_CONFIG_LOCK=y -# CONFIG_BUSYBOX_CONFIG_MAKEDEVS is not set -# CONFIG_BUSYBOX_CONFIG_MAN is not set -# CONFIG_BUSYBOX_CONFIG_MICROCOM is not set -# CONFIG_BUSYBOX_CONFIG_MOUNTPOINT is not set -# CONFIG_BUSYBOX_CONFIG_MT is not set -# CONFIG_BUSYBOX_CONFIG_RAIDAUTORUN is not set -# CONFIG_BUSYBOX_CONFIG_READAHEAD is not set -# CONFIG_BUSYBOX_CONFIG_RX is not set -# CONFIG_BUSYBOX_CONFIG_SETSID is not set -CONFIG_BUSYBOX_CONFIG_STRINGS=y -CONFIG_BUSYBOX_CONFIG_TIME=y -# CONFIG_BUSYBOX_CONFIG_TIMEOUT is not set -# CONFIG_BUSYBOX_CONFIG_TTYSIZE is not set -# CONFIG_BUSYBOX_CONFIG_VOLNAME is not set -# CONFIG_BUSYBOX_CONFIG_WATCHDOG is not set - -# -# Networking Utilities -# -# CONFIG_BUSYBOX_CONFIG_NAMEIF is not set -# CONFIG_BUSYBOX_CONFIG_NBDCLIENT is not set -CONFIG_BUSYBOX_CONFIG_NC=y -# CONFIG_BUSYBOX_CONFIG_NC_SERVER is not set -# CONFIG_BUSYBOX_CONFIG_NC_EXTRA is not set -# CONFIG_BUSYBOX_CONFIG_NC_110_COMPAT is not set -CONFIG_BUSYBOX_CONFIG_PING=y -CONFIG_BUSYBOX_CONFIG_FEATURE_FANCY_PING=y -# CONFIG_BUSYBOX_CONFIG_WGET is not set -# CONFIG_BUSYBOX_CONFIG_WHOIS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_IPV6 is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_UNIX_LOCAL is not set -CONFIG_BUSYBOX_CONFIG_VERBOSE_RESOLUTION_ERRORS=y -# CONFIG_BUSYBOX_CONFIG_ARP is not set -# CONFIG_BUSYBOX_CONFIG_ARPING is not set -CONFIG_BUSYBOX_CONFIG_BRCTL=y -CONFIG_BUSYBOX_CONFIG_FEATURE_BRCTL_FANCY=y -CONFIG_BUSYBOX_CONFIG_FEATURE_BRCTL_SHOW=y -# CONFIG_BUSYBOX_CONFIG_DNSD is not set -# CONFIG_BUSYBOX_CONFIG_ETHER_WAKE is not set -# CONFIG_BUSYBOX_CONFIG_FAKEIDENTD is not set -# CONFIG_BUSYBOX_CONFIG_FTPD is not set -# CONFIG_BUSYBOX_CONFIG_FTPGET is not set -# CONFIG_BUSYBOX_CONFIG_FTPPUT is not set -# CONFIG_BUSYBOX_CONFIG_HOSTNAME is not set -# CONFIG_BUSYBOX_CONFIG_HTTPD is not set -CONFIG_BUSYBOX_CONFIG_IFCONFIG=y -CONFIG_BUSYBOX_CONFIG_FEATURE_IFCONFIG_STATUS=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_IFCONFIG_SLIP is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_IFCONFIG_MEMSTART_IOADDR_IRQ is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_IFCONFIG_HW=y -CONFIG_BUSYBOX_CONFIG_FEATURE_IFCONFIG_BROADCAST_PLUS=y -# CONFIG_BUSYBOX_CONFIG_IFENSLAVE is not set -# CONFIG_BUSYBOX_CONFIG_IFPLUGD is not set -# CONFIG_BUSYBOX_CONFIG_IFUPDOWN is not set -# CONFIG_BUSYBOX_CONFIG_INETD is not set -CONFIG_BUSYBOX_CONFIG_IP=y -CONFIG_BUSYBOX_CONFIG_FEATURE_IP_ADDRESS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_IP_LINK=y -CONFIG_BUSYBOX_CONFIG_FEATURE_IP_ROUTE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_IP_ROUTE_DIR="/etc/iproute2" -# CONFIG_BUSYBOX_CONFIG_FEATURE_IP_TUNNEL is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_IP_RULE=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_IP_NEIGH is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_IP_SHORT_FORMS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_IP_RARE_PROTOCOLS is not set -# CONFIG_BUSYBOX_CONFIG_IPCALC is not set -CONFIG_BUSYBOX_CONFIG_NETMSG=y -CONFIG_BUSYBOX_CONFIG_NETSTAT=y -CONFIG_BUSYBOX_CONFIG_FEATURE_NETSTAT_WIDE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_NETSTAT_PRG=y -# CONFIG_BUSYBOX_CONFIG_NSLOOKUP is not set -CONFIG_BUSYBOX_CONFIG_NSLOOKUP_LEDE=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_NSLOOKUP_LEDE_LONG_OPTIONS is not set -CONFIG_BUSYBOX_CONFIG_NTPD=y -CONFIG_BUSYBOX_CONFIG_FEATURE_NTPD_SERVER=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_NTPD_CONF is not set -# CONFIG_BUSYBOX_CONFIG_PSCAN is not set -CONFIG_BUSYBOX_CONFIG_ROUTE=y -# CONFIG_BUSYBOX_CONFIG_SLATTACH is not set -# CONFIG_BUSYBOX_CONFIG_TCPSVD is not set -# CONFIG_BUSYBOX_CONFIG_TELNET is not set -# CONFIG_BUSYBOX_CONFIG_TELNETD is not set -# CONFIG_BUSYBOX_CONFIG_TFTP is not set -# CONFIG_BUSYBOX_CONFIG_TFTPD is not set -CONFIG_BUSYBOX_CONFIG_TRACEROUTE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_TRACEROUTE_VERBOSE=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_TRACEROUTE_SOURCE_ROUTE is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TRACEROUTE_USE_ICMP is not set -# CONFIG_BUSYBOX_CONFIG_TUNCTL is not set -# CONFIG_BUSYBOX_CONFIG_UDHCPD is not set -CONFIG_BUSYBOX_CONFIG_UDHCPC=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_UDHCPC_ARPING is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_UDHCPC_SANITIZEOPT is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_UDHCP_PORT is not set -CONFIG_BUSYBOX_CONFIG_UDHCP_DEBUG=0 -CONFIG_BUSYBOX_CONFIG_FEATURE_UDHCP_RFC3397=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_UDHCP_8021Q is not set -CONFIG_BUSYBOX_CONFIG_UDHCPC_DEFAULT_SCRIPT="/usr/share/udhcpc/default.script" -CONFIG_BUSYBOX_CONFIG_UDHCPC_SLACK_FOR_BUGGY_SERVERS=80 -# CONFIG_BUSYBOX_CONFIG_UDPSVD is not set -# CONFIG_BUSYBOX_CONFIG_VCONFIG is not set -# CONFIG_BUSYBOX_CONFIG_ZCIP is not set - -# -# Print Utilities -# -# CONFIG_BUSYBOX_CONFIG_LPD is not set -# CONFIG_BUSYBOX_CONFIG_LPR is not set -# CONFIG_BUSYBOX_CONFIG_LPQ is not set - -# -# Mail Utilities -# -# CONFIG_BUSYBOX_CONFIG_MAKEMIME is not set -# CONFIG_BUSYBOX_CONFIG_POPMAILDIR is not set -# CONFIG_BUSYBOX_CONFIG_REFORMIME is not set -# CONFIG_BUSYBOX_CONFIG_SENDMAIL is not set - -# -# Process Utilities -# -# CONFIG_BUSYBOX_CONFIG_IOSTAT is not set -# CONFIG_BUSYBOX_CONFIG_LSOF is not set -# CONFIG_BUSYBOX_CONFIG_MPSTAT is not set -# CONFIG_BUSYBOX_CONFIG_NMETER is not set -# CONFIG_BUSYBOX_CONFIG_PMAP is not set -# CONFIG_BUSYBOX_CONFIG_POWERTOP is not set -# CONFIG_BUSYBOX_CONFIG_PSTREE is not set -# CONFIG_BUSYBOX_CONFIG_PWDX is not set -# CONFIG_BUSYBOX_CONFIG_SMEMCAP is not set -CONFIG_BUSYBOX_CONFIG_TOP=y -CONFIG_BUSYBOX_CONFIG_FEATURE_TOP_CPU_USAGE_PERCENTAGE=y -CONFIG_BUSYBOX_CONFIG_FEATURE_TOP_CPU_GLOBAL_PERCENTS=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_TOP_SMP_CPU is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TOP_DECIMALS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TOP_SMP_PROCESS is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_TOPMEM is not set -CONFIG_BUSYBOX_CONFIG_UPTIME=y -CONFIG_BUSYBOX_CONFIG_FREE=y -# CONFIG_BUSYBOX_CONFIG_FUSER is not set -CONFIG_BUSYBOX_CONFIG_KILL=y -CONFIG_BUSYBOX_CONFIG_KILLALL=y -# CONFIG_BUSYBOX_CONFIG_KILLALL5 is not set -CONFIG_BUSYBOX_CONFIG_PGREP=y -CONFIG_BUSYBOX_CONFIG_PIDOF=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_PIDOF_SINGLE is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_PIDOF_OMIT is not set -# CONFIG_BUSYBOX_CONFIG_PKILL is not set -CONFIG_BUSYBOX_CONFIG_PS=y -CONFIG_BUSYBOX_CONFIG_FEATURE_PS_WIDE=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_PS_LONG is not set -# CONFIG_BUSYBOX_CONFIG_RENICE is not set -CONFIG_BUSYBOX_CONFIG_BB_SYSCTL=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SHOW_THREADS is not set -# CONFIG_BUSYBOX_CONFIG_WATCH is not set - -# -# Runit Utilities -# -# CONFIG_BUSYBOX_CONFIG_CHPST is not set -# CONFIG_BUSYBOX_CONFIG_SETUIDGID is not set -# CONFIG_BUSYBOX_CONFIG_ENVUIDGID is not set -# CONFIG_BUSYBOX_CONFIG_ENVDIR is not set -# CONFIG_BUSYBOX_CONFIG_SOFTLIMIT is not set -# CONFIG_BUSYBOX_CONFIG_RUNSV is not set -# CONFIG_BUSYBOX_CONFIG_RUNSVDIR is not set -# CONFIG_BUSYBOX_CONFIG_SV is not set -# CONFIG_BUSYBOX_CONFIG_SVLOGD is not set - -# -# Shells -# -CONFIG_BUSYBOX_CONFIG_ASH=y -CONFIG_BUSYBOX_CONFIG_ASH_BASH_COMPAT=y -# CONFIG_BUSYBOX_CONFIG_ASH_IDLE_TIMEOUT is not set -CONFIG_BUSYBOX_CONFIG_ASH_JOB_CONTROL=y -CONFIG_BUSYBOX_CONFIG_ASH_ALIAS=y -CONFIG_BUSYBOX_CONFIG_ASH_GETOPTS=y -CONFIG_BUSYBOX_CONFIG_ASH_BUILTIN_ECHO=y -CONFIG_BUSYBOX_CONFIG_ASH_BUILTIN_PRINTF=y -CONFIG_BUSYBOX_CONFIG_ASH_BUILTIN_TEST=y -# CONFIG_BUSYBOX_CONFIG_ASH_HELP is not set -CONFIG_BUSYBOX_CONFIG_ASH_CMDCMD=y -# CONFIG_BUSYBOX_CONFIG_ASH_MAIL is not set -# CONFIG_BUSYBOX_CONFIG_ASH_OPTIMIZE_FOR_SIZE is not set -# CONFIG_BUSYBOX_CONFIG_ASH_RANDOM_SUPPORT is not set -CONFIG_BUSYBOX_CONFIG_ASH_EXPAND_PRMT=y -# CONFIG_BUSYBOX_CONFIG_CTTYHACK is not set -# CONFIG_BUSYBOX_CONFIG_HUSH is not set -# CONFIG_BUSYBOX_CONFIG_MSH is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_SH_IS_ASH=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SH_IS_NONE is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_BASH_IS_ASH is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_BASH_IS_NONE=y -CONFIG_BUSYBOX_CONFIG_SH_MATH_SUPPORT=y -CONFIG_BUSYBOX_CONFIG_SH_MATH_SUPPORT_64=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SH_EXTRA_QUIET is not set -# CONFIG_BUSYBOX_CONFIG_FEATURE_SH_STANDALONE is not set -CONFIG_BUSYBOX_CONFIG_FEATURE_SH_NOFORK=y -# CONFIG_BUSYBOX_CONFIG_FEATURE_SH_HISTFILESIZE is not set - -# -# System Logging Utilities -# -# CONFIG_BUSYBOX_CONFIG_KLOGD is not set -CONFIG_BUSYBOX_CONFIG_LOGGER=y -# CONFIG_BUSYBOX_CONFIG_SYSLOGD is not set -# CONFIG_PACKAGE_ca-bundle is not set -# CONFIG_PACKAGE_ca-certificates is not set -# CONFIG_PACKAGE_dnsmasq is not set -# CONFIG_PACKAGE_dnsmasq-dhcpv6 is not set -CONFIG_PACKAGE_dnsmasq-full=y -# CONFIG_PACKAGE_dnsmasq_full_dhcpv6 is not set -# CONFIG_PACKAGE_dnsmasq_full_dnssec is not set -# CONFIG_PACKAGE_dnsmasq_full_auth is not set -CONFIG_PACKAGE_dnsmasq_full_ipset=y -# CONFIG_PACKAGE_dnsmasq_full_conntrack is not set -# CONFIG_PACKAGE_dnsmasq_full_noid is not set -# CONFIG_PACKAGE_dnsmasq_full_broken_rtc is not set -CONFIG_PACKAGE_dropbear=y - -# -# Configuration -# -CONFIG_DROPBEAR_CURVE25519=y -# CONFIG_DROPBEAR_ECC is not set -# CONFIG_DROPBEAR_ZLIB is not set -# CONFIG_PACKAGE_ead is not set -CONFIG_PACKAGE_firewall=y -CONFIG_PACKAGE_fstools=y -CONFIG_PACKAGE_fwtool=y -CONFIG_PACKAGE_jsonfilter=y -CONFIG_PACKAGE_lede-keyring=y -# CONFIG_PACKAGE_libatomic is not set -CONFIG_PACKAGE_libc=y -CONFIG_PACKAGE_libgcc=y -CONFIG_PACKAGE_libpthread=y -# CONFIG_PACKAGE_librt is not set -# CONFIG_PACKAGE_libstdcpp is not set -CONFIG_PACKAGE_logd=y -# CONFIG_PACKAGE_mksh is not set -CONFIG_PACKAGE_mtd=y -CONFIG_PACKAGE_netifd=y -# CONFIG_PACKAGE_nvram is not set -# CONFIG_PACKAGE_om-watchdog is not set -CONFIG_PACKAGE_opkg=y -CONFIG_PACKAGE_procd=y - -# -# Configuration -# -# CONFIG_PROCD_SHOW_BOOT is not set -# CONFIG_PROCD_ZRAM_TMPFS is not set -# CONFIG_PACKAGE_qos-scripts is not set -# CONFIG_PACKAGE_resolveip is not set -# CONFIG_PACKAGE_rpcd is not set -# CONFIG_PACKAGE_snapshot-tool is not set -# CONFIG_PACKAGE_sqm-scripts is not set -# CONFIG_PACKAGE_sqm-scripts-extra is not set -CONFIG_PACKAGE_swconfig=y -CONFIG_PACKAGE_ubox=y -CONFIG_PACKAGE_ubus=y -CONFIG_PACKAGE_ubusd=y -CONFIG_PACKAGE_uci=y -CONFIG_PACKAGE_usign=y -# CONFIG_PACKAGE_wireless-tools is not set -# CONFIG_PACKAGE_zram-swap is not set - -# -# Administration -# - -# -# openwisp -# -# CONFIG_PACKAGE_openwisp-config-cyassl is not set -# CONFIG_PACKAGE_openwisp-config-mbedtls is not set -# CONFIG_PACKAGE_openwisp-config-nossl is not set -# CONFIG_PACKAGE_openwisp-config-openssl is not set - -# -# zabbix -# -# CONFIG_PACKAGE_zabbix-agentd is not set -# CONFIG_PACKAGE_zabbix-extra-mac80211 is not set -# CONFIG_PACKAGE_zabbix-extra-network is not set -# CONFIG_PACKAGE_zabbix-extra-wifi is not set -# CONFIG_PACKAGE_zabbix-get is not set -# CONFIG_PACKAGE_zabbix-proxy is not set -# CONFIG_PACKAGE_zabbix-sender is not set -# CONFIG_PACKAGE_zabbix-server is not set -# CONFIG_PACKAGE_htop is not set -# CONFIG_PACKAGE_ipmitool is not set -# CONFIG_PACKAGE_monit is not set -# CONFIG_PACKAGE_monit-nossl is not set -# CONFIG_PACKAGE_muninlite is not set -# CONFIG_PACKAGE_netdata is not set -# CONFIG_PACKAGE_sudo is not set -# CONFIG_PACKAGE_syslog-ng is not set - -# -# Boot Loaders -# - -# -# Development -# - -# -# Libraries -# -# CONFIG_PACKAGE_ar is not set -# CONFIG_PACKAGE_autoconf is not set -# CONFIG_PACKAGE_automake is not set -# CONFIG_PACKAGE_binutils is not set -# CONFIG_PACKAGE_diffutils is not set -# CONFIG_PACKAGE_gcc is not set -# CONFIG_PACKAGE_gdb is not set -# CONFIG_PACKAGE_gdbserver is not set -# CONFIG_PACKAGE_libtool-bin is not set -# CONFIG_PACKAGE_lpc21isp is not set -# CONFIG_PACKAGE_lttng-tools is not set -# CONFIG_PACKAGE_m4 is not set -# CONFIG_PACKAGE_make is not set -# CONFIG_PACKAGE_objdump is not set -# CONFIG_PACKAGE_patch is not set -# CONFIG_PACKAGE_perf is not set -# CONFIG_PACKAGE_pkg-config is not set -# CONFIG_PACKAGE_trace-cmd is not set -# CONFIG_PACKAGE_trace-cmd-extra is not set -# CONFIG_PACKAGE_valgrind is not set - -# -# Extra packages -# -# CONFIG_PACKAGE_autosamba is not set -# CONFIG_PACKAGE_he-6in4 is not set -# CONFIG_PACKAGE_k3wifi is not set - -# -# Firmware -# - -# -# ath10k IPQ4019 Boarddata -# -# CONFIG_PACKAGE_aircard-pcmcia-firmware is not set -# CONFIG_PACKAGE_ar3k-firmware is not set -# CONFIG_PACKAGE_ath10k-firmware-qca4019 is not set -# CONFIG_PACKAGE_ath10k-firmware-qca6174 is not set -# CONFIG_PACKAGE_ath10k-firmware-qca9887 is not set -# CONFIG_PACKAGE_ath10k-firmware-qca9887-ct is not set -# CONFIG_PACKAGE_ath10k-firmware-qca9888 is not set -# CONFIG_PACKAGE_ath10k-firmware-qca9888-ct is not set -# CONFIG_PACKAGE_ath10k-firmware-qca988x is not set -# CONFIG_PACKAGE_ath10k-firmware-qca988x-ct is not set -# CONFIG_PACKAGE_ath10k-firmware-qca9984 is not set -# CONFIG_PACKAGE_ath10k-firmware-qca9984-ct is not set -# CONFIG_PACKAGE_ath10k-firmware-qca99x0 is not set -# CONFIG_PACKAGE_ath10k-firmware-qca99x0-ct is not set -# CONFIG_PACKAGE_ath6k-firmware is not set -# CONFIG_PACKAGE_ath9k-htc-firmware is not set -# CONFIG_PACKAGE_b43legacy-firmware is not set -# CONFIG_PACKAGE_bnx2-firmware is not set -# CONFIG_PACKAGE_brcmfmac-firmware-4329-sdio is not set -# CONFIG_PACKAGE_brcmfmac-firmware-43362-sdio is not set -# CONFIG_PACKAGE_brcmfmac-firmware-43430-sdio is not set -# CONFIG_PACKAGE_brcmfmac-firmware-43602a1-pcie is not set -# CONFIG_PACKAGE_brcmfmac-firmware-4366b1-pcie is not set -# CONFIG_PACKAGE_brcmfmac-firmware-usb is not set -# CONFIG_PACKAGE_brcmsmac-firmware is not set -# CONFIG_PACKAGE_carl9170-firmware is not set -# CONFIG_PACKAGE_e100-firmware is not set -# CONFIG_PACKAGE_edgeport-firmware is not set -# CONFIG_PACKAGE_ibt-firmware is not set -# CONFIG_PACKAGE_iwl3945-firmware is not set -# CONFIG_PACKAGE_iwl4965-firmware is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl100 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl1000 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl105 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl135 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl2000 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl2030 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl3160 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl3168 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl5000 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl5150 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl6000g2 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl6000g2a is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl6000g2b is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl6050 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl7260 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl7265 is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl7265d is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl8260c is not set -# CONFIG_PACKAGE_iwlwifi-firmware-iwl8265 is not set -# CONFIG_PACKAGE_libertas-sdio-firmware is not set -# CONFIG_PACKAGE_libertas-spi-firmware is not set -# CONFIG_PACKAGE_libertas-usb-firmware is not set -# CONFIG_PACKAGE_mt7601u-firmware is not set -# CONFIG_PACKAGE_mwifiex-pcie-firmware is not set -# CONFIG_PACKAGE_mwifiex-sdio-firmware is not set -# CONFIG_PACKAGE_mwl8k-firmware is not set -# CONFIG_PACKAGE_p54-pci-firmware is not set -# CONFIG_PACKAGE_p54-spi-firmware is not set -# CONFIG_PACKAGE_p54-usb-firmware is not set -# CONFIG_PACKAGE_prism54-firmware is not set -# CONFIG_PACKAGE_r8169-firmware is not set -# CONFIG_PACKAGE_rt2800-pci-firmware is not set -# CONFIG_PACKAGE_rt2800-usb-firmware is not set -# CONFIG_PACKAGE_rt61-pci-firmware is not set -# CONFIG_PACKAGE_rt73-usb-firmware is not set -# CONFIG_PACKAGE_rtl8188eu-firmware is not set -# CONFIG_PACKAGE_rtl8192ce-firmware is not set -# CONFIG_PACKAGE_rtl8192cu-firmware is not set -# CONFIG_PACKAGE_rtl8192de-firmware is not set -# CONFIG_PACKAGE_rtl8192se-firmware is not set -# CONFIG_PACKAGE_rtl8192su-firmware is not set -# CONFIG_PACKAGE_rtl8821ae-firmware is not set -CONFIG_PACKAGE_wireless-regdb=y -# CONFIG_PACKAGE_wl12xx-firmware is not set -# CONFIG_PACKAGE_wl18xx-firmware is not set - -# -# Fonts -# - -# -# DejaVu -# -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuMathTeXGyre is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSans is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSans-Bold is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSans-BoldOblique is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSans-ExtraLight is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSans-Oblique is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansCondensed is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansCondensed-Bold is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansCondensed-BoldOblique is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansCondensed-Oblique is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansMono is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansMono-Bold is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansMono-BoldOblique is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSansMono-Oblique is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerif is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerif-Bold is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerif-BoldItalic is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerif-Italic is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerifCondensed is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerifCondensed-Bold is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerifCondensed-BoldItalic is not set -# CONFIG_PACKAGE_dejavu-fonts-ttf-DejaVuSerifCondensed-Italic is not set - -# -# Kernel modules -# - -# -# Block Devices -# -# CONFIG_PACKAGE_kmod-aoe is not set -# CONFIG_PACKAGE_kmod-ata-core is not set -# CONFIG_PACKAGE_kmod-block2mtd is not set -# CONFIG_PACKAGE_kmod-dm is not set -# CONFIG_PACKAGE_kmod-loop is not set -# CONFIG_PACKAGE_kmod-md-mod is not set -# CONFIG_PACKAGE_kmod-nbd is not set -# CONFIG_PACKAGE_kmod-scsi-cdrom is not set -# CONFIG_PACKAGE_kmod-scsi-core is not set -# CONFIG_PACKAGE_kmod-scsi-generic is not set -# CONFIG_PACKAGE_kmod-scsi-tape is not set - -# -# CAN Support -# -# CONFIG_PACKAGE_kmod-can is not set - -# -# Cryptographic API modules -# -# CONFIG_PACKAGE_kmod-crypto-aead is not set -# CONFIG_PACKAGE_kmod-crypto-authenc is not set -# CONFIG_PACKAGE_kmod-crypto-cbc is not set -# CONFIG_PACKAGE_kmod-crypto-ccm is not set -# CONFIG_PACKAGE_kmod-crypto-cmac is not set -# CONFIG_PACKAGE_kmod-crypto-crc32c is not set -# CONFIG_PACKAGE_kmod-crypto-ctr is not set -# CONFIG_PACKAGE_kmod-crypto-cts is not set -# CONFIG_PACKAGE_kmod-crypto-deflate is not set -# CONFIG_PACKAGE_kmod-crypto-des is not set -# CONFIG_PACKAGE_kmod-crypto-ecb is not set -# CONFIG_PACKAGE_kmod-crypto-echainiv is not set -# CONFIG_PACKAGE_kmod-crypto-fcrypt is not set -# CONFIG_PACKAGE_kmod-crypto-gcm is not set -# CONFIG_PACKAGE_kmod-crypto-gf128 is not set -# CONFIG_PACKAGE_kmod-crypto-ghash is not set -# CONFIG_PACKAGE_kmod-crypto-hash is not set -# CONFIG_PACKAGE_kmod-crypto-hmac is not set -# CONFIG_PACKAGE_kmod-crypto-hw-ccp is not set -# CONFIG_PACKAGE_kmod-crypto-hw-geode is not set -# CONFIG_PACKAGE_kmod-crypto-hw-hifn-795x is not set -# CONFIG_PACKAGE_kmod-crypto-hw-padlock is not set -# CONFIG_PACKAGE_kmod-crypto-hw-talitos is not set -# CONFIG_PACKAGE_kmod-crypto-manager is not set -# CONFIG_PACKAGE_kmod-crypto-md4 is not set -# CONFIG_PACKAGE_kmod-crypto-md5 is not set -# CONFIG_PACKAGE_kmod-crypto-michael-mic is not set -# CONFIG_PACKAGE_kmod-crypto-misc is not set -# CONFIG_PACKAGE_kmod-crypto-null is not set -# CONFIG_PACKAGE_kmod-crypto-pcbc is not set -# CONFIG_PACKAGE_kmod-crypto-pcompress is not set -# CONFIG_PACKAGE_kmod-crypto-rng is not set -# CONFIG_PACKAGE_kmod-crypto-seqiv is not set -# CONFIG_PACKAGE_kmod-crypto-sha1 is not set -# CONFIG_PACKAGE_kmod-crypto-sha256 is not set -# CONFIG_PACKAGE_kmod-crypto-sha512 is not set -# CONFIG_PACKAGE_kmod-crypto-test is not set -# CONFIG_PACKAGE_kmod-crypto-user is not set -# CONFIG_PACKAGE_kmod-crypto-wq is not set -# CONFIG_PACKAGE_kmod-crypto-xts is not set -# CONFIG_PACKAGE_kmod-cryptodev is not set - -# -# Filesystems -# -# CONFIG_PACKAGE_kmod-fs-afs is not set -# CONFIG_PACKAGE_kmod-fs-autofs4 is not set -# CONFIG_PACKAGE_kmod-fs-btrfs is not set -# CONFIG_PACKAGE_kmod-fs-cifs is not set -# CONFIG_PACKAGE_kmod-fs-configfs is not set -# CONFIG_PACKAGE_kmod-fs-cramfs is not set -# CONFIG_PACKAGE_kmod-fs-exfat is not set -# CONFIG_PACKAGE_kmod-fs-exportfs is not set -# CONFIG_PACKAGE_kmod-fs-ext4 is not set -# CONFIG_PACKAGE_kmod-fs-f2fs is not set -# CONFIG_PACKAGE_kmod-fs-fscache is not set -# CONFIG_PACKAGE_kmod-fs-hfs is not set -# CONFIG_PACKAGE_kmod-fs-hfsplus is not set -# CONFIG_PACKAGE_kmod-fs-isofs is not set -# CONFIG_PACKAGE_kmod-fs-jfs is not set -# CONFIG_PACKAGE_kmod-fs-minix is not set -# CONFIG_PACKAGE_kmod-fs-msdos is not set -# CONFIG_PACKAGE_kmod-fs-nfs is not set -# CONFIG_PACKAGE_kmod-fs-nfs-common is not set -# CONFIG_PACKAGE_kmod-fs-nfs-common-rpcsec is not set -# CONFIG_PACKAGE_kmod-fs-nfs-v3 is not set -# CONFIG_PACKAGE_kmod-fs-nfs-v4 is not set -# CONFIG_PACKAGE_kmod-fs-nfsd is not set -# CONFIG_PACKAGE_kmod-fs-ntfs is not set -# CONFIG_PACKAGE_kmod-fs-reiserfs is not set -# CONFIG_PACKAGE_kmod-fs-squashfs is not set -# CONFIG_PACKAGE_kmod-fs-udf is not set -# CONFIG_PACKAGE_kmod-fs-vfat is not set -# CONFIG_PACKAGE_kmod-fs-xfs is not set -# CONFIG_PACKAGE_kmod-fuse is not set - -# -# FireWire support -# -# CONFIG_PACKAGE_kmod-firewire is not set - -# -# Hardware Monitoring Support -# -# CONFIG_PACKAGE_kmod-hwmon-core is not set - -# -# I2C support -# -# CONFIG_PACKAGE_kmod-i2c-core is not set -# CONFIG_PACKAGE_kmod-i2c-gpio-custom is not set - -# -# Industrial I/O Modules -# -# CONFIG_PACKAGE_kmod-iio-ad799x is not set -# CONFIG_PACKAGE_kmod-iio-core is not set -# CONFIG_PACKAGE_kmod-iio-dht11 is not set - -# -# Input modules -# -# CONFIG_PACKAGE_kmod-hid is not set -# CONFIG_PACKAGE_kmod-hid-generic is not set -# CONFIG_PACKAGE_kmod-input-core is not set -# CONFIG_PACKAGE_kmod-input-evdev is not set -# CONFIG_PACKAGE_kmod-input-gpio-encoder is not set -# CONFIG_PACKAGE_kmod-input-gpio-keys is not set -# CONFIG_PACKAGE_kmod-input-gpio-keys-polled is not set -# CONFIG_PACKAGE_kmod-input-joydev is not set -# CONFIG_PACKAGE_kmod-input-matrixkmap is not set -# CONFIG_PACKAGE_kmod-input-polldev is not set -# CONFIG_PACKAGE_kmod-input-uinput is not set - -# -# LED modules -# -# CONFIG_PACKAGE_kmod-leds-gpio is not set -# CONFIG_PACKAGE_kmod-leds-nu801 is not set -# CONFIG_PACKAGE_kmod-leds-pca963x is not set -# CONFIG_PACKAGE_kmod-leds-rb750 is not set -# CONFIG_PACKAGE_kmod-leds-wndr3700-usb is not set -# CONFIG_PACKAGE_kmod-ledtrig-default-on is not set -# CONFIG_PACKAGE_kmod-ledtrig-gpio is not set -# CONFIG_PACKAGE_kmod-ledtrig-heartbeat is not set -# CONFIG_PACKAGE_kmod-ledtrig-netdev is not set -# CONFIG_PACKAGE_kmod-ledtrig-oneshot is not set -# CONFIG_PACKAGE_kmod-ledtrig-timer is not set -# CONFIG_PACKAGE_kmod-ledtrig-transient is not set - -# -# Libraries -# -# CONFIG_PACKAGE_kmod-lib-cordic is not set -CONFIG_PACKAGE_kmod-lib-crc-ccitt=y -# CONFIG_PACKAGE_kmod-lib-crc-itu-t is not set -# CONFIG_PACKAGE_kmod-lib-crc16 is not set -# CONFIG_PACKAGE_kmod-lib-crc32c is not set -# CONFIG_PACKAGE_kmod-lib-crc7 is not set -# CONFIG_PACKAGE_kmod-lib-crc8 is not set -# CONFIG_PACKAGE_kmod-lib-textsearch is not set - -# -# Native Language Support -# -CONFIG_PACKAGE_kmod-nls-base=y -# CONFIG_PACKAGE_kmod-nls-cp1250 is not set -# CONFIG_PACKAGE_kmod-nls-cp1251 is not set -# CONFIG_PACKAGE_kmod-nls-cp437 is not set -# CONFIG_PACKAGE_kmod-nls-cp775 is not set -# CONFIG_PACKAGE_kmod-nls-cp850 is not set -# CONFIG_PACKAGE_kmod-nls-cp852 is not set -# CONFIG_PACKAGE_kmod-nls-cp862 is not set -# CONFIG_PACKAGE_kmod-nls-cp864 is not set -# CONFIG_PACKAGE_kmod-nls-cp866 is not set -# CONFIG_PACKAGE_kmod-nls-cp932 is not set -# CONFIG_PACKAGE_kmod-nls-cp936 is not set -# CONFIG_PACKAGE_kmod-nls-cp950 is not set -# CONFIG_PACKAGE_kmod-nls-iso8859-1 is not set -# CONFIG_PACKAGE_kmod-nls-iso8859-13 is not set -# CONFIG_PACKAGE_kmod-nls-iso8859-15 is not set -# CONFIG_PACKAGE_kmod-nls-iso8859-2 is not set -# CONFIG_PACKAGE_kmod-nls-iso8859-6 is not set -# CONFIG_PACKAGE_kmod-nls-iso8859-8 is not set -# CONFIG_PACKAGE_kmod-nls-koi8r is not set -# CONFIG_PACKAGE_kmod-nls-utf8 is not set - -# -# Netfilter Extensions -# -# CONFIG_PACKAGE_kmod-arptables is not set -# CONFIG_PACKAGE_kmod-ebtables is not set -# CONFIG_PACKAGE_kmod-ip6tables is not set -# CONFIG_PACKAGE_kmod-ip6tables-extra is not set -# CONFIG_PACKAGE_kmod-ipt-account is not set -# CONFIG_PACKAGE_kmod-ipt-chaos is not set -# CONFIG_PACKAGE_kmod-ipt-checksum is not set -# CONFIG_PACKAGE_kmod-ipt-cluster is not set -# CONFIG_PACKAGE_kmod-ipt-clusterip is not set -# CONFIG_PACKAGE_kmod-ipt-compat-xtables is not set -# CONFIG_PACKAGE_kmod-ipt-condition is not set -CONFIG_PACKAGE_kmod-ipt-conntrack=y -# CONFIG_PACKAGE_kmod-ipt-conntrack-extra is not set -CONFIG_PACKAGE_kmod-ipt-core=y -# CONFIG_PACKAGE_kmod-ipt-debug is not set -# CONFIG_PACKAGE_kmod-ipt-delude is not set -# CONFIG_PACKAGE_kmod-ipt-dhcpmac is not set -# CONFIG_PACKAGE_kmod-ipt-dnetmap is not set -# CONFIG_PACKAGE_kmod-ipt-extra is not set -# CONFIG_PACKAGE_kmod-ipt-filter is not set -# CONFIG_PACKAGE_kmod-ipt-fuzzy is not set -# CONFIG_PACKAGE_kmod-ipt-geoip is not set -# CONFIG_PACKAGE_kmod-ipt-hashlimit is not set -# CONFIG_PACKAGE_kmod-ipt-iface is not set -# CONFIG_PACKAGE_kmod-ipt-ipmark is not set -# CONFIG_PACKAGE_kmod-ipt-ipopt is not set -# CONFIG_PACKAGE_kmod-ipt-ipp2p is not set -# CONFIG_PACKAGE_kmod-ipt-iprange is not set -# CONFIG_PACKAGE_kmod-ipt-ipsec is not set -CONFIG_PACKAGE_kmod-ipt-ipset=y -# CONFIG_PACKAGE_kmod-ipt-ipv4options is not set -# CONFIG_PACKAGE_kmod-ipt-led is not set -# CONFIG_PACKAGE_kmod-ipt-length2 is not set -# CONFIG_PACKAGE_kmod-ipt-logmark is not set -# CONFIG_PACKAGE_kmod-ipt-lscan is not set -# CONFIG_PACKAGE_kmod-ipt-lua is not set -CONFIG_PACKAGE_kmod-ipt-nat=y -# CONFIG_PACKAGE_kmod-ipt-nat-extra is not set -# CONFIG_PACKAGE_kmod-ipt-nat6 is not set -# CONFIG_PACKAGE_kmod-ipt-nathelper-rtsp is not set -# CONFIG_PACKAGE_kmod-ipt-nflog is not set -# CONFIG_PACKAGE_kmod-ipt-nfqueue is not set -# CONFIG_PACKAGE_kmod-ipt-psd is not set -# CONFIG_PACKAGE_kmod-ipt-quota2 is not set -# CONFIG_PACKAGE_kmod-ipt-raw is not set -# CONFIG_PACKAGE_kmod-ipt-raw6 is not set -# CONFIG_PACKAGE_kmod-ipt-rpfilter is not set -# CONFIG_PACKAGE_kmod-ipt-sysrq is not set -# CONFIG_PACKAGE_kmod-ipt-tarpit is not set -# CONFIG_PACKAGE_kmod-ipt-tee is not set -# CONFIG_PACKAGE_kmod-ipt-tproxy is not set -# CONFIG_PACKAGE_kmod-ipt-u32 is not set -# CONFIG_PACKAGE_kmod-ipt-ulog is not set -CONFIG_PACKAGE_kmod-nf-conntrack=y -# CONFIG_PACKAGE_kmod-nf-conntrack-netlink is not set -CONFIG_PACKAGE_kmod-nf-conntrack6=y -CONFIG_PACKAGE_kmod-nf-ipt=y -CONFIG_PACKAGE_kmod-nf-ipt6=y -CONFIG_PACKAGE_kmod-nf-nat=y -# CONFIG_PACKAGE_kmod-nf-nat6 is not set -# CONFIG_PACKAGE_kmod-nf-nathelper is not set -# CONFIG_PACKAGE_kmod-nf-nathelper-extra is not set -CONFIG_PACKAGE_kmod-nfnetlink=y -# CONFIG_PACKAGE_kmod-nfnetlink-log is not set -# CONFIG_PACKAGE_kmod-nfnetlink-queue is not set -# CONFIG_PACKAGE_kmod-nft-core is not set -# CONFIG_PACKAGE_kmod-nft-nat is not set -# CONFIG_PACKAGE_kmod-nft-nat6 is not set - -# -# Network Devices -# -# CONFIG_PACKAGE_kmod-3c59x is not set -# CONFIG_PACKAGE_kmod-8139cp is not set -# CONFIG_PACKAGE_kmod-8139too is not set -# CONFIG_PACKAGE_kmod-atl1 is not set -# CONFIG_PACKAGE_kmod-atl1c is not set -# CONFIG_PACKAGE_kmod-atl1e is not set -# CONFIG_PACKAGE_kmod-atl2 is not set -# CONFIG_PACKAGE_kmod-b44 is not set -# CONFIG_PACKAGE_kmod-bnx2 is not set -# CONFIG_PACKAGE_kmod-dm9000 is not set -# CONFIG_PACKAGE_kmod-dummy is not set -# CONFIG_PACKAGE_kmod-e100 is not set -# CONFIG_PACKAGE_kmod-e1000 is not set -# CONFIG_PACKAGE_kmod-et131x is not set -# CONFIG_PACKAGE_kmod-ethoc is not set -# CONFIG_PACKAGE_kmod-forcedeth is not set -# CONFIG_PACKAGE_kmod-gigaset is not set -# CONFIG_PACKAGE_kmod-hfcmulti is not set -# CONFIG_PACKAGE_kmod-hfcpci is not set -# CONFIG_PACKAGE_kmod-ifb is not set -# CONFIG_PACKAGE_kmod-igb is not set -# CONFIG_PACKAGE_kmod-ixgbe is not set -# CONFIG_PACKAGE_kmod-ixgbevf is not set -# CONFIG_PACKAGE_kmod-libphy is not set -# CONFIG_PACKAGE_kmod-macvlan is not set -# CONFIG_PACKAGE_kmod-mii is not set -# CONFIG_PACKAGE_kmod-natsemi is not set -# CONFIG_PACKAGE_kmod-ne2k-pci is not set -# CONFIG_PACKAGE_kmod-niu is not set -# CONFIG_PACKAGE_kmod-of-mdio is not set -# CONFIG_PACKAGE_kmod-pcnet32 is not set -# CONFIG_PACKAGE_kmod-phy-broadcom is not set -# CONFIG_PACKAGE_kmod-r6040 is not set -# CONFIG_PACKAGE_kmod-r8169 is not set -# CONFIG_PACKAGE_kmod-siit is not set -# CONFIG_PACKAGE_kmod-sis190 is not set -# CONFIG_PACKAGE_kmod-sis900 is not set -# CONFIG_PACKAGE_kmod-skge is not set -# CONFIG_PACKAGE_kmod-sky2 is not set -# CONFIG_PACKAGE_kmod-solos-pci is not set -# CONFIG_PACKAGE_kmod-spi-ks8995 is not set -# CONFIG_PACKAGE_kmod-swconfig is not set -# CONFIG_PACKAGE_kmod-switch-ip17xx is not set -# CONFIG_PACKAGE_kmod-switch-mvsw61xx is not set -# CONFIG_PACKAGE_kmod-switch-rtl8366-smi is not set -# CONFIG_PACKAGE_kmod-switch-rtl8366rb is not set -# CONFIG_PACKAGE_kmod-switch-rtl8366s is not set -# CONFIG_PACKAGE_kmod-switch-rtl8367b is not set -# CONFIG_PACKAGE_kmod-tg3 is not set -# CONFIG_PACKAGE_kmod-tulip is not set -# CONFIG_PACKAGE_kmod-via-rhine is not set -# CONFIG_PACKAGE_kmod-via-velocity is not set -# CONFIG_PACKAGE_kmod-vmxnet3 is not set - -# -# Network Support -# -# CONFIG_PACKAGE_kmod-appletalk is not set -# CONFIG_PACKAGE_kmod-atm is not set -# CONFIG_PACKAGE_kmod-ax25 is not set -# CONFIG_PACKAGE_kmod-batman-adv is not set -# CONFIG_PACKAGE_kmod-bonding is not set -# CONFIG_PACKAGE_kmod-capi is not set -# CONFIG_PACKAGE_kmod-dnsresolver is not set -# CONFIG_PACKAGE_kmod-fast-classifier is not set -# CONFIG_PACKAGE_kmod-gre is not set -# CONFIG_PACKAGE_kmod-gre6 is not set -# CONFIG_PACKAGE_kmod-ip6-tunnel is not set -# CONFIG_PACKAGE_kmod-ipip is not set -# CONFIG_PACKAGE_kmod-ipsec is not set -# CONFIG_PACKAGE_kmod-iptunnel6 is not set -# CONFIG_PACKAGE_kmod-isdn4linux is not set -# CONFIG_PACKAGE_kmod-jool is not set -# CONFIG_PACKAGE_kmod-l2tp is not set -# CONFIG_PACKAGE_kmod-l2tp-eth is not set -# CONFIG_PACKAGE_kmod-l2tp-ip is not set -# CONFIG_PACKAGE_kmod-misdn is not set -# CONFIG_PACKAGE_kmod-mpls is not set -CONFIG_PACKAGE_kmod-ppp=y -# CONFIG_PACKAGE_kmod-mppe is not set -# CONFIG_PACKAGE_kmod-nat46 is not set -# CONFIG_PACKAGE_kmod-netem is not set -# CONFIG_PACKAGE_kmod-nlmon is not set -# CONFIG_PACKAGE_kmod-openvswitch is not set -# CONFIG_PACKAGE_kmod-pktgen is not set -# CONFIG_PACKAGE_kmod-ppp-synctty is not set -# CONFIG_PACKAGE_kmod-pppoa is not set -CONFIG_PACKAGE_kmod-pppoe=y -# CONFIG_PACKAGE_kmod-pppol2tp is not set -CONFIG_PACKAGE_kmod-pppox=y -# CONFIG_PACKAGE_kmod-pptp is not set -# CONFIG_PACKAGE_kmod-sched is not set -# CONFIG_PACKAGE_kmod-sched-cake is not set -# CONFIG_PACKAGE_kmod-sched-connmark is not set -# CONFIG_PACKAGE_kmod-sched-core is not set -# CONFIG_PACKAGE_kmod-sctp is not set -# CONFIG_PACKAGE_kmod-shortcut-fe is not set -# CONFIG_PACKAGE_kmod-shortcut-fe-cm is not set -# CONFIG_PACKAGE_kmod-sit is not set -CONFIG_PACKAGE_kmod-slhc=y -# CONFIG_PACKAGE_kmod-slip is not set -# CONFIG_PACKAGE_kmod-trelay is not set -# CONFIG_PACKAGE_kmod-tun is not set -# CONFIG_PACKAGE_kmod-veth is not set -# CONFIG_PACKAGE_kmod-vxlan is not set -# CONFIG_PACKAGE_kmod-wireguard is not set - -# -# Other modules -# -# CONFIG_PACKAGE_kmod-6lowpan is not set -# CONFIG_PACKAGE_kmod-ath3k is not set -# CONFIG_PACKAGE_kmod-bcma is not set -# CONFIG_PACKAGE_kmod-bluetooth is not set -# CONFIG_PACKAGE_kmod-bluetooth_6lowpan is not set -# CONFIG_PACKAGE_kmod-bmp085 is not set -# CONFIG_PACKAGE_kmod-bmp085-i2c is not set -# CONFIG_PACKAGE_kmod-bmp085-spi is not set -# CONFIG_PACKAGE_kmod-btmrvl is not set -# CONFIG_PACKAGE_kmod-button-hotplug is not set -# CONFIG_PACKAGE_kmod-echo is not set -# CONFIG_PACKAGE_kmod-eeprom-93cx6 is not set -# CONFIG_PACKAGE_kmod-eeprom-at24 is not set -# CONFIG_PACKAGE_kmod-eeprom-at25 is not set -# CONFIG_PACKAGE_kmod-gpio-beeper is not set -CONFIG_PACKAGE_kmod-gpio-button-hotplug=y -# CONFIG_PACKAGE_kmod-gpio-dev is not set -# CONFIG_PACKAGE_kmod-gpio-mcp23s08 is not set -# CONFIG_PACKAGE_kmod-gpio-nxp-74hc164 is not set -# CONFIG_PACKAGE_kmod-gpio-pca953x is not set -# CONFIG_PACKAGE_kmod-gpio-pcf857x is not set -# CONFIG_PACKAGE_kmod-ikconfig is not set -# CONFIG_PACKAGE_kmod-it87-wdt is not set -# CONFIG_PACKAGE_kmod-itco-wdt is not set -# CONFIG_PACKAGE_kmod-lp is not set -# CONFIG_PACKAGE_kmod-mmc is not set -# CONFIG_PACKAGE_kmod-mtd-rw is not set -# CONFIG_PACKAGE_kmod-mtdoops is not set -# CONFIG_PACKAGE_kmod-mtdtests is not set -# CONFIG_PACKAGE_kmod-pps is not set -# CONFIG_PACKAGE_kmod-pps-gpio is not set -# CONFIG_PACKAGE_kmod-pps-ldisc is not set -# CONFIG_PACKAGE_kmod-ptp is not set -# CONFIG_PACKAGE_kmod-random-core is not set -# CONFIG_PACKAGE_kmod-regmap is not set -# CONFIG_PACKAGE_kmod-rotary-gpio-custom is not set -# CONFIG_PACKAGE_kmod-rtc-ds1307 is not set -# CONFIG_PACKAGE_kmod-rtc-ds1374 is not set -# CONFIG_PACKAGE_kmod-rtc-ds1672 is not set -# CONFIG_PACKAGE_kmod-rtc-isl1208 is not set -# CONFIG_PACKAGE_kmod-rtc-pcf2123 is not set -# CONFIG_PACKAGE_kmod-rtc-pcf8563 is not set -# CONFIG_PACKAGE_kmod-rtc-pt7c4338 is not set -# CONFIG_PACKAGE_kmod-rtc-rs5c372a is not set -# CONFIG_PACKAGE_kmod-sdhci is not set -# CONFIG_PACKAGE_kmod-serial-8250 is not set -# CONFIG_PACKAGE_kmod-softdog is not set -# CONFIG_PACKAGE_kmod-ssb is not set -# CONFIG_PACKAGE_kmod-tpm is not set -# CONFIG_PACKAGE_kmod-tpm-i2c-atmel is not set -# CONFIG_PACKAGE_kmod-tpm-i2c-infineon is not set -# CONFIG_PACKAGE_kmod-w83627hf-wdt is not set -# CONFIG_PACKAGE_kmod-zram is not set - -# -# PCMCIA support -# - -# -# SPI Support -# -# CONFIG_PACKAGE_kmod-mmc-spi is not set -# CONFIG_PACKAGE_kmod-spi-bitbang is not set -# CONFIG_PACKAGE_kmod-spi-dev is not set -# CONFIG_PACKAGE_kmod-spi-gpio is not set -# CONFIG_PACKAGE_kmod-spi-gpio-custom is not set -# CONFIG_PACKAGE_kmod-spi-gpio-old is not set -# CONFIG_PACKAGE_kmod-spi-vsc7385 is not set - -# -# Sound Support -# -# CONFIG_PACKAGE_kmod-sound-core is not set - -# -# USB Support -# -# CONFIG_PACKAGE_kmod-usb-acm is not set -# CONFIG_PACKAGE_kmod-usb-atm is not set -# CONFIG_PACKAGE_kmod-usb-chipidea is not set -# CONFIG_PACKAGE_kmod-usb-cm109 is not set -CONFIG_PACKAGE_kmod-usb-core=y -# CONFIG_PACKAGE_kmod-usb-dwc2 is not set -# CONFIG_PACKAGE_kmod-usb-dwc3 is not set -# CONFIG_PACKAGE_kmod-usb-dwc3-of-simple is not set -CONFIG_PACKAGE_kmod-usb-ehci=y -# CONFIG_PACKAGE_kmod-usb-gadget-ehci-debug is not set -# CONFIG_PACKAGE_kmod-usb-gadget-eth is not set -# CONFIG_PACKAGE_kmod-usb-gadget-mass-storage is not set -# CONFIG_PACKAGE_kmod-usb-gadget-serial is not set -# CONFIG_PACKAGE_kmod-usb-hid is not set -# CONFIG_PACKAGE_kmod-usb-ledtrig-usbport is not set -# CONFIG_PACKAGE_kmod-usb-net is not set -# CONFIG_PACKAGE_kmod-usb-net2280 is not set -# CONFIG_PACKAGE_kmod-usb-ohci is not set -# CONFIG_PACKAGE_kmod-usb-ohci-pci is not set -# CONFIG_PACKAGE_kmod-usb-phy-qcom-ipq4019 is not set -# CONFIG_PACKAGE_kmod-usb-printer is not set -# CONFIG_PACKAGE_kmod-usb-serial is not set -# CONFIG_PACKAGE_kmod-usb-storage is not set -# CONFIG_PACKAGE_kmod-usb-storage-extras is not set -# CONFIG_PACKAGE_kmod-usb-storage-uas is not set -# CONFIG_PACKAGE_kmod-usb-uhci is not set -# CONFIG_PACKAGE_kmod-usb-wdm is not set -# CONFIG_PACKAGE_kmod-usb-yealink is not set -CONFIG_PACKAGE_kmod-usb2=y -# CONFIG_PACKAGE_kmod-usb2-pci is not set -# CONFIG_PACKAGE_kmod-usb3 is not set -# CONFIG_PACKAGE_kmod-usbip is not set -# CONFIG_PACKAGE_kmod-usbip-client is not set -# CONFIG_PACKAGE_kmod-usbip-server is not set -# CONFIG_PACKAGE_kmod-usbmon is not set - -# -# Video Support -# -# CONFIG_PACKAGE_kmod-video-core is not set - -# -# Virtualization -# - -# -# Voice over IP -# -# CONFIG_PACKAGE_kmod-dahdi is not set - -# -# W1 support -# -# CONFIG_PACKAGE_kmod-w1 is not set - -# -# WPAN 802.15.4 Support -# -# CONFIG_PACKAGE_kmod-at86rf230 is not set -# CONFIG_PACKAGE_kmod-cc2520 is not set -# CONFIG_PACKAGE_kmod-fakelb is not set -# CONFIG_PACKAGE_kmod-ieee802154 is not set -# CONFIG_PACKAGE_kmod-ieee802154_6lowpan is not set -# CONFIG_PACKAGE_kmod-mac802154 is not set -# CONFIG_PACKAGE_kmod-mrf24j40 is not set - -# -# Wireless Drivers -# -# CONFIG_PACKAGE_kmod-adm8211 is not set -CONFIG_PACKAGE_kmod-ath=y -CONFIG_ATH_USER_REGD=y -# CONFIG_PACKAGE_ATH_DEBUG is not set -CONFIG_PACKAGE_ATH_DFS=y -# CONFIG_PACKAGE_kmod-ath10k is not set -# CONFIG_PACKAGE_kmod-ath10k-ct is not set -# CONFIG_PACKAGE_kmod-ath5k is not set -# CONFIG_PACKAGE_kmod-ath6kl-sdio is not set -# CONFIG_PACKAGE_kmod-ath6kl-usb is not set -CONFIG_PACKAGE_kmod-ath9k=y -# CONFIG_ATH9K_SUPPORT_PCOEM is not set -# CONFIG_ATH9K_TX99 is not set -CONFIG_PACKAGE_kmod-ath9k-common=y -# CONFIG_PACKAGE_kmod-ath9k-htc is not set -# CONFIG_PACKAGE_kmod-b43 is not set -# CONFIG_PACKAGE_kmod-b43legacy is not set -# CONFIG_PACKAGE_kmod-brcmfmac is not set -# CONFIG_PACKAGE_kmod-brcmsmac is not set -# CONFIG_PACKAGE_kmod-brcmutil is not set -# CONFIG_PACKAGE_kmod-carl9170 is not set -CONFIG_PACKAGE_kmod-cfg80211=y -# CONFIG_PACKAGE_kmod-hermes is not set -# CONFIG_PACKAGE_kmod-hermes-pci is not set -# CONFIG_PACKAGE_kmod-hermes-plx is not set -# CONFIG_PACKAGE_kmod-iwl-legacy is not set -# CONFIG_PACKAGE_kmod-iwl3945 is not set -# CONFIG_PACKAGE_kmod-iwl4965 is not set -# CONFIG_PACKAGE_kmod-iwlwifi is not set -# CONFIG_PACKAGE_kmod-lib80211 is not set -# CONFIG_PACKAGE_kmod-libertas-sdio is not set -# CONFIG_PACKAGE_kmod-libertas-spi is not set -# CONFIG_PACKAGE_kmod-libertas-usb is not set -CONFIG_PACKAGE_kmod-mac80211=y -CONFIG_PACKAGE_MAC80211_DEBUGFS=y -# CONFIG_PACKAGE_MAC80211_TRACING is not set -CONFIG_PACKAGE_MAC80211_MESH=y -# CONFIG_PACKAGE_kmod-mac80211-hwsim is not set -# CONFIG_PACKAGE_kmod-mt76 is not set -# CONFIG_PACKAGE_kmod-mt76-core is not set -# CONFIG_PACKAGE_kmod-mt7601u is not set -# CONFIG_PACKAGE_kmod-mt7603 is not set -# CONFIG_PACKAGE_kmod-mt76x2 is not set -# CONFIG_PACKAGE_kmod-mwifiex-pcie is not set -# CONFIG_PACKAGE_kmod-mwifiex-sdio is not set -# CONFIG_PACKAGE_kmod-mwl8k is not set -# CONFIG_PACKAGE_kmod-net-prism54 is not set -# CONFIG_PACKAGE_kmod-net-rtl8192su is not set -# CONFIG_PACKAGE_kmod-owl-loader is not set -# CONFIG_PACKAGE_kmod-p54-common is not set -# CONFIG_PACKAGE_kmod-p54-pci is not set -# CONFIG_PACKAGE_kmod-p54-usb is not set -# CONFIG_PACKAGE_kmod-rt2400-pci is not set -# CONFIG_PACKAGE_kmod-rt2500-pci is not set -# CONFIG_PACKAGE_kmod-rt2500-usb is not set -# CONFIG_PACKAGE_kmod-rt2800-pci is not set -# CONFIG_PACKAGE_kmod-rt2800-usb is not set -# CONFIG_PACKAGE_kmod-rt2x00-lib is not set -# CONFIG_PACKAGE_kmod-rt61-pci is not set -# CONFIG_PACKAGE_kmod-rt73-usb is not set -# CONFIG_PACKAGE_kmod-rtl8180 is not set -# CONFIG_PACKAGE_kmod-rtl8187 is not set -# CONFIG_PACKAGE_kmod-rtl8192ce is not set -# CONFIG_PACKAGE_kmod-rtl8192cu is not set -# CONFIG_PACKAGE_kmod-rtl8192de is not set -# CONFIG_PACKAGE_kmod-rtl8192se is not set -# CONFIG_PACKAGE_kmod-rtl8821ae is not set -# CONFIG_PACKAGE_kmod-rtl8xxxu is not set -# CONFIG_PACKAGE_kmod-wl12xx is not set -# CONFIG_PACKAGE_kmod-wl18xx is not set -# CONFIG_PACKAGE_kmod-wlcore is not set -# CONFIG_PACKAGE_kmod-zd1211rw is not set - -# -# Languages -# - -# -# Erlang -# -# CONFIG_PACKAGE_erlang is not set -# CONFIG_PACKAGE_erlang-asn1 is not set -# CONFIG_PACKAGE_erlang-compiler is not set -# CONFIG_PACKAGE_erlang-crypto is not set -# CONFIG_PACKAGE_erlang-hipe is not set -# CONFIG_PACKAGE_erlang-inets is not set -# CONFIG_PACKAGE_erlang-mnesia is not set -# CONFIG_PACKAGE_erlang-runtime-tools is not set -# CONFIG_PACKAGE_erlang-snmp is not set -# CONFIG_PACKAGE_erlang-ssh is not set -# CONFIG_PACKAGE_erlang-ssl is not set -# CONFIG_PACKAGE_erlang-syntax-tools is not set - -# -# Java -# -# CONFIG_PACKAGE_jamvm is not set - -# -# Lua -# -# CONFIG_PACKAGE_dkjson is not set -# CONFIG_PACKAGE_json4lua is not set -# CONFIG_PACKAGE_ldbus is not set -# CONFIG_PACKAGE_libiwinfo-lua is not set -# CONFIG_PACKAGE_lpeg is not set -# CONFIG_PACKAGE_lsqlite3 is not set -# CONFIG_PACKAGE_lua is not set -# CONFIG_PACKAGE_lua-bencode is not set -# CONFIG_PACKAGE_lua-cjson is not set -# CONFIG_PACKAGE_lua-copas is not set -# CONFIG_PACKAGE_lua-coxpcall is not set -# CONFIG_PACKAGE_lua-lzlib is not set -# CONFIG_PACKAGE_lua-md5 is not set -# CONFIG_PACKAGE_lua-mobdebug is not set -# CONFIG_PACKAGE_lua-mosquitto is not set -# CONFIG_PACKAGE_lua-openssl is not set -# CONFIG_PACKAGE_lua-penlight is not set -# CONFIG_PACKAGE_lua-rings is not set -# CONFIG_PACKAGE_lua-rs232 is not set -# CONFIG_PACKAGE_lua-sha2 is not set -# CONFIG_PACKAGE_lua-wsapi-base is not set -# CONFIG_PACKAGE_lua-wsapi-xavante is not set -# CONFIG_PACKAGE_lua-xavante is not set -# CONFIG_PACKAGE_luabitop is not set -# CONFIG_PACKAGE_luac is not set -# CONFIG_PACKAGE_luaexpat is not set -# CONFIG_PACKAGE_luafilesystem is not set -# CONFIG_PACKAGE_luai2c is not set -# CONFIG_PACKAGE_luajit is not set -# CONFIG_PACKAGE_lualanes is not set -# CONFIG_PACKAGE_luaposix is not set -# CONFIG_PACKAGE_luarocks is not set -# CONFIG_PACKAGE_luasec is not set -# CONFIG_PACKAGE_luasoap is not set -# CONFIG_PACKAGE_luasocket is not set -# CONFIG_PACKAGE_luasql-mysql is not set -# CONFIG_PACKAGE_luasql-pgsql is not set -# CONFIG_PACKAGE_luasql-sqlite3 is not set -# CONFIG_PACKAGE_luci-lib-fs is not set -# CONFIG_PACKAGE_luv is not set -# CONFIG_PACKAGE_lzmq is not set -# CONFIG_PACKAGE_uuid is not set - -# -# Node.js -# -# CONFIG_PACKAGE_node is not set - -# -# Module Selection -# -# CONFIG_NODEJS_ICU is not set -# CONFIG_PACKAGE_node-arduino-firmata is not set -# CONFIG_PACKAGE_node-cylon is not set -# CONFIG_PACKAGE_node-cylon-firmata is not set -# CONFIG_PACKAGE_node-cylon-gpio is not set -# CONFIG_PACKAGE_node-cylon-i2c is not set -# CONFIG_PACKAGE_node-hid is not set -# CONFIG_PACKAGE_node-npm is not set -# CONFIG_PACKAGE_node-serialport is not set - -# -# PHP -# -# CONFIG_PACKAGE_php7 is not set - -# -# Perl -# -# CONFIG_PACKAGE_perl is not set - -# -# Python -# -# CONFIG_PACKAGE_chardet is not set -# CONFIG_PACKAGE_django is not set -# CONFIG_PACKAGE_django-appconf is not set -# CONFIG_PACKAGE_django-compressor is not set -# CONFIG_PACKAGE_django-constance is not set -# CONFIG_PACKAGE_django-jsonfield is not set -# CONFIG_PACKAGE_django-picklefield is not set -# CONFIG_PACKAGE_django-postoffice is not set -# CONFIG_PACKAGE_django-restframework is not set -# CONFIG_PACKAGE_django-statici18n is not set -# CONFIG_PACKAGE_et_xmlfile is not set -# CONFIG_PACKAGE_flup is not set -# CONFIG_PACKAGE_gunicorn is not set -# CONFIG_PACKAGE_jdcal is not set -# CONFIG_PACKAGE_micropython is not set -# CONFIG_PACKAGE_micropython-lib is not set -# CONFIG_PACKAGE_openpyxl is not set -# CONFIG_PACKAGE_pillow is not set -# CONFIG_PACKAGE_python is not set -# CONFIG_PACKAGE_python-asn1crypto is not set -# CONFIG_PACKAGE_python-attrs is not set -# CONFIG_PACKAGE_python-base is not set -# CONFIG_PACKAGE_python-base-src is not set -# CONFIG_PACKAGE_python-cffi is not set -# CONFIG_PACKAGE_python-codecs is not set -# CONFIG_PACKAGE_python-codecs-src is not set -# CONFIG_PACKAGE_python-compiler is not set -# CONFIG_PACKAGE_python-compiler-src is not set -# CONFIG_PACKAGE_python-crcmod is not set -# CONFIG_PACKAGE_python-crypto is not set -# CONFIG_PACKAGE_python-cryptography is not set -# CONFIG_PACKAGE_python-ctypes is not set -# CONFIG_PACKAGE_python-ctypes-src is not set -# CONFIG_PACKAGE_python-curl is not set -# CONFIG_PACKAGE_python-dateutil is not set -# CONFIG_PACKAGE_python-db is not set -# CONFIG_PACKAGE_python-db-src is not set -# CONFIG_PACKAGE_python-decimal is not set -# CONFIG_PACKAGE_python-decimal-src is not set -# CONFIG_PACKAGE_python-dev is not set -# CONFIG_PACKAGE_python-dev-src is not set -# CONFIG_PACKAGE_python-distutils is not set -# CONFIG_PACKAGE_python-distutils-src is not set -# CONFIG_PACKAGE_python-dns is not set -# CONFIG_PACKAGE_python-dpkt is not set -# CONFIG_PACKAGE_python-egenix-mx-base is not set -# CONFIG_PACKAGE_python-email is not set -# CONFIG_PACKAGE_python-email-src is not set -# CONFIG_PACKAGE_python-enum34 is not set -# CONFIG_PACKAGE_python-evdev is not set -# CONFIG_PACKAGE_python-gdbm is not set -# CONFIG_PACKAGE_python-gdbm-src is not set -# CONFIG_PACKAGE_python-gmpy2 is not set -# CONFIG_PACKAGE_python-gnupg is not set -# CONFIG_PACKAGE_python-idna is not set -# CONFIG_PACKAGE_python-ipaddress is not set -# CONFIG_PACKAGE_python-ldap is not set -# CONFIG_PACKAGE_python-lib2to3 is not set -# CONFIG_PACKAGE_python-lib2to3-src is not set -# CONFIG_PACKAGE_python-light is not set - -# -# Configuration -# -# CONFIG_PYTHON_BLUETOOTH_SUPPORT is not set -# CONFIG_PACKAGE_python-light-src is not set -# CONFIG_PACKAGE_python-logging is not set -# CONFIG_PACKAGE_python-logging-src is not set -# CONFIG_PACKAGE_python-lxml is not set -# CONFIG_PACKAGE_python-multiprocessing is not set -# CONFIG_PACKAGE_python-multiprocessing-src is not set -# CONFIG_PACKAGE_python-mysql is not set -# CONFIG_PACKAGE_python-ncurses is not set -# CONFIG_PACKAGE_python-ncurses-src is not set -# CONFIG_PACKAGE_python-openssl is not set -# CONFIG_PACKAGE_python-openssl-src is not set -# CONFIG_PACKAGE_python-parsley is not set -# CONFIG_PACKAGE_python-pcapy is not set -# CONFIG_PACKAGE_python-pip is not set -# CONFIG_PACKAGE_python-pip-conf is not set -# CONFIG_PACKAGE_python-pip-src is not set -# CONFIG_PACKAGE_python-ply is not set -# CONFIG_PACKAGE_python-psycopg2 is not set -# CONFIG_PACKAGE_python-pyasn1 is not set -# CONFIG_PACKAGE_python-pyasn1-modules is not set -# CONFIG_PACKAGE_python-pycparser is not set -# CONFIG_PACKAGE_python-pydoc is not set -# CONFIG_PACKAGE_python-pydoc-src is not set -# CONFIG_PACKAGE_python-pyodbc is not set -# CONFIG_PACKAGE_python-pyopenssl is not set -# CONFIG_PACKAGE_python-pyptlib is not set -# CONFIG_PACKAGE_python-pyserial is not set -# CONFIG_PACKAGE_python-service-identity is not set -# CONFIG_PACKAGE_python-setuptools is not set -# CONFIG_PACKAGE_python-setuptools-src is not set -# CONFIG_PACKAGE_python-six is not set -# CONFIG_PACKAGE_python-smbus is not set -# CONFIG_PACKAGE_python-sqlite3 is not set -# CONFIG_PACKAGE_python-sqlite3-src is not set -# CONFIG_PACKAGE_python-src is not set -# CONFIG_PACKAGE_python-txsocksx is not set -# CONFIG_PACKAGE_python-unittest is not set -# CONFIG_PACKAGE_python-unittest-src is not set -# CONFIG_PACKAGE_python-urllib3 is not set -# CONFIG_PACKAGE_python-xml is not set -# CONFIG_PACKAGE_python-xml-src is not set -# CONFIG_PACKAGE_python-yaml is not set -# CONFIG_PACKAGE_python3 is not set -# CONFIG_PACKAGE_python3-asn1crypto is not set -# CONFIG_PACKAGE_python3-asyncio is not set -# CONFIG_PACKAGE_python3-asyncio-src is not set -# CONFIG_PACKAGE_python3-base is not set -# CONFIG_PACKAGE_python3-base-src is not set -# CONFIG_PACKAGE_python3-bottle is not set -# CONFIG_PACKAGE_python3-cffi is not set -# CONFIG_PACKAGE_python3-cgi is not set -# CONFIG_PACKAGE_python3-cgi-src is not set -# CONFIG_PACKAGE_python3-cgitb is not set -# CONFIG_PACKAGE_python3-cgitb-src is not set -# CONFIG_PACKAGE_python3-click is not set -# CONFIG_PACKAGE_python3-codecs is not set -# CONFIG_PACKAGE_python3-codecs-src is not set -# CONFIG_PACKAGE_python3-cryptography is not set -# CONFIG_PACKAGE_python3-ctypes is not set -# CONFIG_PACKAGE_python3-ctypes-src is not set -# CONFIG_PACKAGE_python3-dbm is not set -# CONFIG_PACKAGE_python3-dbm-src is not set -# CONFIG_PACKAGE_python3-decimal is not set -# CONFIG_PACKAGE_python3-decimal-src is not set -# CONFIG_PACKAGE_python3-dev is not set -# CONFIG_PACKAGE_python3-dev-src is not set -# CONFIG_PACKAGE_python3-distutils is not set -# CONFIG_PACKAGE_python3-distutils-src is not set -# CONFIG_PACKAGE_python3-email is not set -# CONFIG_PACKAGE_python3-email-src is not set -# CONFIG_PACKAGE_python3-evdev is not set -# CONFIG_PACKAGE_python3-flask is not set -# CONFIG_PACKAGE_python3-gdbm is not set -# CONFIG_PACKAGE_python3-gdbm-src is not set -# CONFIG_PACKAGE_python3-gnupg is not set -# CONFIG_PACKAGE_python3-idna is not set -# CONFIG_PACKAGE_python3-itsdangerous is not set -# CONFIG_PACKAGE_python3-jinja2 is not set -# CONFIG_PACKAGE_python3-lib2to3 is not set -# CONFIG_PACKAGE_python3-lib2to3-src is not set -# CONFIG_PACKAGE_python3-light is not set - -# -# Configuration -# -# CONFIG_PYTHON3_BLUETOOTH_SUPPORT is not set -# CONFIG_PACKAGE_python3-light-src is not set -# CONFIG_PACKAGE_python3-logging is not set -# CONFIG_PACKAGE_python3-logging-src is not set -# CONFIG_PACKAGE_python3-lxml is not set -# CONFIG_PACKAGE_python3-lzma is not set -# CONFIG_PACKAGE_python3-lzma-src is not set -# CONFIG_PACKAGE_python3-markupsafe is not set -# CONFIG_PACKAGE_python3-multiprocessing is not set -# CONFIG_PACKAGE_python3-multiprocessing-src is not set -# CONFIG_PACKAGE_python3-ncurses is not set -# CONFIG_PACKAGE_python3-ncurses-src is not set -# CONFIG_PACKAGE_python3-openssl is not set -# CONFIG_PACKAGE_python3-openssl-src is not set -# CONFIG_PACKAGE_python3-pip is not set -# CONFIG_PACKAGE_python3-pip-src is not set -# CONFIG_PACKAGE_python3-ply is not set -# CONFIG_PACKAGE_python3-pyasn1 is not set -# CONFIG_PACKAGE_python3-pyasn1-modules is not set -# CONFIG_PACKAGE_python3-pycparser is not set -# CONFIG_PACKAGE_python3-pydoc is not set -# CONFIG_PACKAGE_python3-pydoc-src is not set -# CONFIG_PACKAGE_python3-pyodbc is not set -# CONFIG_PACKAGE_python3-pyopenssl is not set -# CONFIG_PACKAGE_python3-setuptools is not set -# CONFIG_PACKAGE_python3-setuptools-src is not set -# CONFIG_PACKAGE_python3-six is not set -# CONFIG_PACKAGE_python3-smbus is not set -# CONFIG_PACKAGE_python3-sqlite3 is not set -# CONFIG_PACKAGE_python3-sqlite3-src is not set -# CONFIG_PACKAGE_python3-src is not set -# CONFIG_PACKAGE_python3-unittest is not set -# CONFIG_PACKAGE_python3-unittest-src is not set -# CONFIG_PACKAGE_python3-werkzeug is not set -# CONFIG_PACKAGE_python3-xml is not set -# CONFIG_PACKAGE_python3-xml-src is not set -# CONFIG_PACKAGE_python3-yaml is not set -# CONFIG_PACKAGE_pytz is not set -# CONFIG_PACKAGE_rcssmin is not set -# CONFIG_PACKAGE_simplejson is not set -# CONFIG_PACKAGE_twisted is not set -# CONFIG_PACKAGE_zope-interface is not set - -# -# Ruby -# -# CONFIG_PACKAGE_ruby is not set - -# -# Tcl -# -# CONFIG_PACKAGE_vala is not set - -# -# Libraries -# - -# -# Compression -# -# CONFIG_PACKAGE_libbz2 is not set -# CONFIG_PACKAGE_liblzma is not set -# CONFIG_PACKAGE_libunrar is not set - -# -# Filesystem -# -# CONFIG_PACKAGE_libacl is not set -# CONFIG_PACKAGE_libattr is not set -# CONFIG_PACKAGE_libext2fs is not set -# CONFIG_PACKAGE_libfuse is not set -# CONFIG_PACKAGE_libow is not set -# CONFIG_PACKAGE_libow-capi is not set -# CONFIG_PACKAGE_libsysfs is not set - -# -# Firewall -# -# CONFIG_PACKAGE_libfko is not set -CONFIG_PACKAGE_libip4tc=y -CONFIG_PACKAGE_libip6tc=y -# CONFIG_PACKAGE_libiptc is not set -CONFIG_PACKAGE_libxtables=y - -# -# Instant Messaging -# -# CONFIG_PACKAGE_quasselc is not set - -# -# IoT -# -# CONFIG_PACKAGE_libupm is not set -# CONFIG_PACKAGE_libupm-a110x is not set -# CONFIG_PACKAGE_libupm-ad8232 is not set -# CONFIG_PACKAGE_libupm-adafruitss is not set -# CONFIG_PACKAGE_libupm-adc121c021 is not set -# CONFIG_PACKAGE_libupm-adis16448 is not set -# CONFIG_PACKAGE_libupm-adxl335 is not set -# CONFIG_PACKAGE_libupm-adxl345 is not set -# CONFIG_PACKAGE_libupm-am2315 is not set -# CONFIG_PACKAGE_libupm-apds9002 is not set -# CONFIG_PACKAGE_libupm-at42qt1070 is not set -# CONFIG_PACKAGE_libupm-biss0001 is not set -# CONFIG_PACKAGE_libupm-bmpx8x is not set -# CONFIG_PACKAGE_libupm-buzzer is not set -# CONFIG_PACKAGE_libupm-cjq4435 is not set -# CONFIG_PACKAGE_libupm-ds1307 is not set -# CONFIG_PACKAGE_libupm-ecs1030 is not set -# CONFIG_PACKAGE_libupm-enc03r is not set -# CONFIG_PACKAGE_libupm-flex is not set -# CONFIG_PACKAGE_libupm-gas is not set -# CONFIG_PACKAGE_libupm-gp2y0a is not set -# CONFIG_PACKAGE_libupm-grove is not set -# CONFIG_PACKAGE_libupm-grovecircularled is not set -# CONFIG_PACKAGE_libupm-grovecollision is not set -# CONFIG_PACKAGE_libupm-groveehr is not set -# CONFIG_PACKAGE_libupm-groveeldriver is not set -# CONFIG_PACKAGE_libupm-groveelectromagnet is not set -# CONFIG_PACKAGE_libupm-groveemg is not set -# CONFIG_PACKAGE_libupm-grovegprs is not set -# CONFIG_PACKAGE_libupm-grovegsr is not set -# CONFIG_PACKAGE_libupm-grovelinefinder is not set -# CONFIG_PACKAGE_libupm-grovemd is not set -# CONFIG_PACKAGE_libupm-grovemoisture is not set -# CONFIG_PACKAGE_libupm-groveo2 is not set -# CONFIG_PACKAGE_libupm-grovescam is not set -# CONFIG_PACKAGE_libupm-grovespeaker is not set -# CONFIG_PACKAGE_libupm-grovevdiv is not set -# CONFIG_PACKAGE_libupm-grovewater is not set -# CONFIG_PACKAGE_libupm-grovewfs is not set -# CONFIG_PACKAGE_libupm-guvas12d is not set -# CONFIG_PACKAGE_libupm-h3lis331dl is not set -# CONFIG_PACKAGE_libupm-hcsr04 is not set -# CONFIG_PACKAGE_libupm-hm11 is not set -# CONFIG_PACKAGE_libupm-hmc5883l is not set -# CONFIG_PACKAGE_libupm-hmtrp is not set -# CONFIG_PACKAGE_libupm-hp20x is not set -# CONFIG_PACKAGE_libupm-ht9170 is not set -# CONFIG_PACKAGE_libupm-htu21d is not set -# CONFIG_PACKAGE_libupm-hx711 is not set -# CONFIG_PACKAGE_libupm-i2clcd is not set -# CONFIG_PACKAGE_libupm-ina132 is not set -# CONFIG_PACKAGE_libupm-isd1820 is not set -# CONFIG_PACKAGE_libupm-itg3200 is not set -# CONFIG_PACKAGE_libupm-joystick12 is not set -# CONFIG_PACKAGE_libupm-l298 is not set -# CONFIG_PACKAGE_libupm-ldt0028 is not set -# CONFIG_PACKAGE_libupm-lm35 is not set -# CONFIG_PACKAGE_libupm-lol is not set -# CONFIG_PACKAGE_libupm-loudness is not set -# CONFIG_PACKAGE_libupm-lpd8806 is not set -# CONFIG_PACKAGE_libupm-lsm303 is not set -# CONFIG_PACKAGE_libupm-lsm9ds0 is not set -# CONFIG_PACKAGE_libupm-m24lr64e is not set -# CONFIG_PACKAGE_libupm-max31723 is not set -# CONFIG_PACKAGE_libupm-max31855 is not set -# CONFIG_PACKAGE_libupm-max44000 is not set -# CONFIG_PACKAGE_libupm-max5487 is not set -# CONFIG_PACKAGE_libupm-maxds3231m is not set -# CONFIG_PACKAGE_libupm-maxsonarez is not set -# CONFIG_PACKAGE_libupm-mg811 is not set -# CONFIG_PACKAGE_libupm-mhz16 is not set -# CONFIG_PACKAGE_libupm-mic is not set -# CONFIG_PACKAGE_libupm-mlx90614 is not set -# CONFIG_PACKAGE_libupm-mma7455 is not set -# CONFIG_PACKAGE_libupm-mma7660 is not set -# CONFIG_PACKAGE_libupm-mpl3115a2 is not set -# CONFIG_PACKAGE_libupm-mpr121 is not set -# CONFIG_PACKAGE_libupm-mpu9150 is not set -# CONFIG_PACKAGE_libupm-mq303a is not set -# CONFIG_PACKAGE_libupm-my9221 is not set -# CONFIG_PACKAGE_libupm-nrf24l01 is not set -# CONFIG_PACKAGE_libupm-nrf8001 is not set -# CONFIG_PACKAGE_libupm-nunchuck is not set -# CONFIG_PACKAGE_libupm-otp538u is not set -# CONFIG_PACKAGE_libupm-pn532 is not set -# CONFIG_PACKAGE_libupm-ppd42ns is not set -# CONFIG_PACKAGE_libupm-pulsensor is not set -# CONFIG_PACKAGE_libupm-rfr359f is not set -# CONFIG_PACKAGE_libupm-rgbringcoder is not set -# CONFIG_PACKAGE_libupm-rotaryencoder is not set -# CONFIG_PACKAGE_libupm-rpr220 is not set -# CONFIG_PACKAGE_libupm-servo is not set -# CONFIG_PACKAGE_libupm-si114x is not set -# CONFIG_PACKAGE_libupm-sm130 is not set -# CONFIG_PACKAGE_libupm-st7735 is not set -# CONFIG_PACKAGE_libupm-stepmotor is not set -# CONFIG_PACKAGE_libupm-sx6119 is not set -# CONFIG_PACKAGE_libupm-ta12200 is not set -# CONFIG_PACKAGE_libupm-tcs3414cs is not set -# CONFIG_PACKAGE_libupm-th02 is not set -# CONFIG_PACKAGE_libupm-tm1637 is not set -# CONFIG_PACKAGE_libupm-tsl2561 is not set -# CONFIG_PACKAGE_libupm-ttp223 is not set -# CONFIG_PACKAGE_libupm-ublox6 is not set -# CONFIG_PACKAGE_libupm-uln200xa is not set -# CONFIG_PACKAGE_libupm-waterlevel is not set -# CONFIG_PACKAGE_libupm-wheelencoder is not set -# CONFIG_PACKAGE_libupm-wt5001 is not set -# CONFIG_PACKAGE_libupm-yg1006 is not set -# CONFIG_PACKAGE_libupm-zfm20 is not set - -# -# Languages -# -# CONFIG_PACKAGE_libyaml is not set - -# -# Networking -# -# CONFIG_PACKAGE_libsctp is not set - -# -# SSL -# -# CONFIG_PACKAGE_libcyassl is not set -# CONFIG_PACKAGE_libgnutls is not set -# CONFIG_PACKAGE_libmbedtls is not set -# CONFIG_PACKAGE_libopenssl is not set - -# -# Sound -# -# CONFIG_PACKAGE_liblo is not set - -# -# Telephony -# -# CONFIG_PACKAGE_bcg729 is not set -# CONFIG_PACKAGE_dahdi-tools-libtonezone is not set -# CONFIG_PACKAGE_gsmlib is not set -# CONFIG_PACKAGE_libctb is not set -# CONFIG_PACKAGE_libiksemel is not set -# CONFIG_PACKAGE_libosip2 is not set -# CONFIG_PACKAGE_libpj is not set -# CONFIG_PACKAGE_libpjlib-util is not set -# CONFIG_PACKAGE_libpjmedia is not set -# CONFIG_PACKAGE_libpjnath is not set -# CONFIG_PACKAGE_libpjsip is not set -# CONFIG_PACKAGE_libpjsip-simple is not set -# CONFIG_PACKAGE_libpjsip-ua is not set -# CONFIG_PACKAGE_libpjsua is not set -# CONFIG_PACKAGE_libpjsua2 is not set -# CONFIG_PACKAGE_libre is not set -# CONFIG_PACKAGE_librem is not set -# CONFIG_PACKAGE_libspandsp is not set -# CONFIG_PACKAGE_libsrtp is not set -# CONFIG_PACKAGE_libsrtp2 is not set - -# -# database -# -# CONFIG_PACKAGE_libpq is not set -# CONFIG_PACKAGE_libsqlite3 is not set -# CONFIG_PACKAGE_pgsqlodbc is not set -# CONFIG_PACKAGE_psqlodbca is not set -# CONFIG_PACKAGE_psqlodbcw is not set -# CONFIG_PACKAGE_tdb is not set -# CONFIG_PACKAGE_unixodbc is not set - -# -# libelektra -# -# CONFIG_PACKAGE_libelektra-boost is not set -# CONFIG_PACKAGE_libelektra-core is not set -# CONFIG_PACKAGE_libelektra-cpp is not set -# CONFIG_PACKAGE_libelektra-crypto is not set -# CONFIG_PACKAGE_libelektra-curlget is not set -# CONFIG_PACKAGE_libelektra-dbus is not set -# CONFIG_PACKAGE_libelektra-extra is not set -# CONFIG_PACKAGE_libelektra-lua is not set -# CONFIG_PACKAGE_libelektra-plugins is not set -# CONFIG_PACKAGE_libelektra-python2 is not set -# CONFIG_PACKAGE_libelektra-python3 is not set -# CONFIG_PACKAGE_libelektra-resolvers is not set -# CONFIG_PACKAGE_libelektra-xerces is not set -# CONFIG_PACKAGE_libelektra-xml is not set -# CONFIG_PACKAGE_libelektra-yajl is not set -# CONFIG_PACKAGE_libelektra-yamlcpp is not set -# CONFIG_PACKAGE_alsa-lib is not set -# CONFIG_PACKAGE_argp-standalone is not set -# CONFIG_PACKAGE_avro-c is not set -# CONFIG_PACKAGE_bind-libs is not set -# CONFIG_PACKAGE_bluez-libs is not set -# CONFIG_PACKAGE_boost is not set -# CONFIG_PACKAGE_ccid is not set -# CONFIG_PACKAGE_check is not set -# CONFIG_PACKAGE_classpath is not set -# CONFIG_PACKAGE_classpath-tools is not set -# CONFIG_PACKAGE_confuse is not set -# CONFIG_PACKAGE_dtndht is not set -# CONFIG_PACKAGE_fcgi is not set -# CONFIG_PACKAGE_fftw3 is not set -# CONFIG_PACKAGE_fftw3f is not set -# CONFIG_PACKAGE_giflib is not set -# CONFIG_PACKAGE_glib2 is not set -# CONFIG_PACKAGE_glog is not set -# CONFIG_PACKAGE_hidapi is not set -# CONFIG_PACKAGE_ibrcommon is not set -# CONFIG_PACKAGE_ibrdtn is not set -# CONFIG_PACKAGE_icu is not set -# CONFIG_PACKAGE_jansson is not set -# CONFIG_PACKAGE_knot-libs is not set -# CONFIG_PACKAGE_knot-libzscanner is not set -# CONFIG_PACKAGE_libaio is not set -# CONFIG_PACKAGE_libantlr3c is not set -# CONFIG_PACKAGE_libao is not set -# CONFIG_PACKAGE_libapr is not set -# CONFIG_PACKAGE_libaprutil is not set -# CONFIG_PACKAGE_libarchive is not set -# CONFIG_PACKAGE_libarchive-noopenssl is not set -# CONFIG_PACKAGE_libartnet is not set -# CONFIG_PACKAGE_libaudiofile is not set -# CONFIG_PACKAGE_libavahi-client is not set -# CONFIG_PACKAGE_libavahi-compat-libdnssd is not set -# CONFIG_PACKAGE_libavahi-dbus-support is not set -# CONFIG_PACKAGE_libavahi-nodbus-support is not set -# CONFIG_PACKAGE_libavl is not set -# CONFIG_PACKAGE_libbfd is not set -# CONFIG_PACKAGE_libblkid is not set -CONFIG_PACKAGE_libblobmsg-json=y -# CONFIG_PACKAGE_libcanfestival is not set -# CONFIG_PACKAGE_libcap is not set -# CONFIG_PACKAGE_libcares is not set -# CONFIG_PACKAGE_libcharset is not set -# CONFIG_PACKAGE_libcoap is not set -# CONFIG_PACKAGE_libconfig is not set -# CONFIG_PACKAGE_libcryptopp is not set -# CONFIG_PACKAGE_libcurl is not set -# CONFIG_PACKAGE_libdaemon is not set -# CONFIG_PACKAGE_libdaq is not set -# CONFIG_PACKAGE_libdb47 is not set -# CONFIG_PACKAGE_libdb47xx is not set -# CONFIG_PACKAGE_libdbi is not set -# CONFIG_PACKAGE_libdbus is not set -# CONFIG_PACKAGE_libdevmapper is not set -# CONFIG_PACKAGE_libdmapsharing is not set -# CONFIG_PACKAGE_libdnet is not set -# CONFIG_PACKAGE_libdouble-conversion is not set -# CONFIG_PACKAGE_libdrm is not set -# CONFIG_PACKAGE_libedit is not set -# CONFIG_PACKAGE_libelf1 is not set -# CONFIG_PACKAGE_libecdsautil is not set -# CONFIG_PACKAGE_libesmtp is not set -# CONFIG_PACKAGE_libestr is not set -# CONFIG_PACKAGE_libev is not set -# CONFIG_PACKAGE_libevdev is not set -# CONFIG_PACKAGE_libevent2 is not set -# CONFIG_PACKAGE_libevent2-core is not set -# CONFIG_PACKAGE_libevent2-extra is not set -# CONFIG_PACKAGE_libevent2-openssl is not set -# CONFIG_PACKAGE_libevent2-pthreads is not set -# CONFIG_PACKAGE_libeventlog is not set -# CONFIG_PACKAGE_libevhtp is not set -# CONFIG_PACKAGE_libexif is not set -# CONFIG_PACKAGE_libexpat is not set -# CONFIG_PACKAGE_libexslt is not set -# CONFIG_PACKAGE_libextractor is not set -# CONFIG_PACKAGE_libf2fs is not set -# CONFIG_PACKAGE_libfaad2 is not set -# CONFIG_PACKAGE_libfastjson is not set -# CONFIG_PACKAGE_libfdisk is not set -# CONFIG_PACKAGE_libfdt is not set -# CONFIG_PACKAGE_libffi is not set -# CONFIG_PACKAGE_libffmpeg-audio-dec is not set -# CONFIG_PACKAGE_libffmpeg-custom is not set -# CONFIG_PACKAGE_libffmpeg-full is not set -# CONFIG_PACKAGE_libffmpeg-mini is not set -# CONFIG_PACKAGE_libflac is not set -# CONFIG_PACKAGE_libfreetype is not set -# CONFIG_PACKAGE_libftdi is not set -# CONFIG_PACKAGE_libftdi1 is not set -# CONFIG_PACKAGE_libgcrypt is not set -# CONFIG_PACKAGE_libgd is not set -# CONFIG_PACKAGE_libgdbm is not set -# CONFIG_PACKAGE_libgee is not set -# CONFIG_PACKAGE_libglpk is not set -# CONFIG_PACKAGE_libgmp is not set -# CONFIG_PACKAGE_libgnurl is not set -# CONFIG_PACKAGE_libgpg-error is not set -# CONFIG_PACKAGE_libgphoto2 is not set -# CONFIG_PACKAGE_libgps is not set -# CONFIG_PACKAGE_libhamlib is not set -# CONFIG_PACKAGE_libhavege is not set -# CONFIG_PACKAGE_libhiredis is not set -# CONFIG_PACKAGE_libhttp-parser is not set -# CONFIG_PACKAGE_libical is not set -# CONFIG_PACKAGE_libiconv is not set -# CONFIG_PACKAGE_libiconv-full is not set -# CONFIG_PACKAGE_libid3tag is not set -# CONFIG_PACKAGE_libidn is not set -# CONFIG_PACKAGE_libiio is not set -# CONFIG_PACKAGE_libimobiledevice is not set -# CONFIG_PACKAGE_libinput is not set -# CONFIG_PACKAGE_libintl is not set -# CONFIG_PACKAGE_libintl-full is not set -# CONFIG_PACKAGE_libiw is not set -CONFIG_PACKAGE_libiwinfo=y -# CONFIG_PACKAGE_libjpeg is not set -CONFIG_PACKAGE_libjson-c=y -# CONFIG_PACKAGE_libkmod is not set -# CONFIG_PACKAGE_libldns is not set -# CONFIG_PACKAGE_libltdl is not set -# CONFIG_PACKAGE_liblua is not set -# CONFIG_PACKAGE_liblz4 is not set -# CONFIG_PACKAGE_liblzo is not set -# CONFIG_PACKAGE_libmad is not set -# CONFIG_PACKAGE_libmagic is not set -# CONFIG_PACKAGE_libmcrypt is not set -# CONFIG_PACKAGE_libmicrohttpd is not set -# CONFIG_PACKAGE_libmicrohttpd-no-ssl is not set -# CONFIG_PACKAGE_libminiupnpc is not set -# CONFIG_PACKAGE_libmms is not set -# CONFIG_PACKAGE_libmnl is not set -# CONFIG_PACKAGE_libmodbus is not set -# CONFIG_PACKAGE_libmosquitto-nossl is not set -# CONFIG_PACKAGE_libmosquitto-ssl is not set -# CONFIG_PACKAGE_libmount is not set -# CONFIG_PACKAGE_libmpdclient is not set -# CONFIG_PACKAGE_libmpeg2 is not set -# CONFIG_PACKAGE_libmpg123 is not set -# CONFIG_PACKAGE_libmraa is not set -# CONFIG_PACKAGE_libmysqlclient is not set -# CONFIG_PACKAGE_libmysqlclient-r is not set -# CONFIG_PACKAGE_libnatpmp is not set -# CONFIG_PACKAGE_libncurses is not set -# CONFIG_PACKAGE_libndpi is not set -# CONFIG_PACKAGE_libneon is not set -# CONFIG_PACKAGE_libnet-1.2.x is not set -# CONFIG_PACKAGE_libnetconf2 is not set -# CONFIG_PACKAGE_libnetfilter-acct is not set -# CONFIG_PACKAGE_libnetfilter-conntrack is not set -# CONFIG_PACKAGE_libnetfilter-cthelper is not set -# CONFIG_PACKAGE_libnetfilter-cttimeout is not set -# CONFIG_PACKAGE_libnetfilter-log is not set -# CONFIG_PACKAGE_libnetfilter-queue is not set -# CONFIG_PACKAGE_libnetsnmp is not set -# CONFIG_PACKAGE_libnettle is not set -# CONFIG_PACKAGE_libnfnetlink is not set -# CONFIG_PACKAGE_libnftnl is not set -# CONFIG_PACKAGE_libnl is not set -# CONFIG_PACKAGE_libnl-core is not set -# CONFIG_PACKAGE_libnl-genl is not set -# CONFIG_PACKAGE_libnl-nf is not set -# CONFIG_PACKAGE_libnl-route is not set -CONFIG_PACKAGE_libnl-tiny=y -# CONFIG_PACKAGE_libnopoll is not set -# CONFIG_PACKAGE_libogg is not set -# CONFIG_PACKAGE_liboil is not set -# CONFIG_PACKAGE_libopcodes is not set -# CONFIG_PACKAGE_libopenldap is not set -# CONFIG_PACKAGE_libopenobex is not set -# CONFIG_PACKAGE_libopensc is not set -# CONFIG_PACKAGE_libopenzwave is not set -# CONFIG_PACKAGE_liboping is not set -# CONFIG_PACKAGE_libopus is not set -# CONFIG_PACKAGE_libout123 is not set -# CONFIG_PACKAGE_libowfat is not set -# CONFIG_PACKAGE_libp11 is not set -# CONFIG_PACKAGE_libpam is not set -# CONFIG_PACKAGE_libpcap is not set -# CONFIG_PACKAGE_libpcre is not set -# CONFIG_PACKAGE_libpcre16 is not set -# CONFIG_PACKAGE_libpcre2 is not set -# CONFIG_PACKAGE_libpcre2-16 is not set -# CONFIG_PACKAGE_libpcre2-32 is not set -# CONFIG_PACKAGE_libpcrecpp is not set -# CONFIG_PACKAGE_libpcsclite is not set -# CONFIG_PACKAGE_libpkcs11-spy is not set -# CONFIG_PACKAGE_libplist is not set -# CONFIG_PACKAGE_libplistcxx is not set -# CONFIG_PACKAGE_libpng is not set -# CONFIG_PACKAGE_libpopt is not set -# CONFIG_PACKAGE_libpri is not set -# CONFIG_PACKAGE_libprotobuf-c is not set -# CONFIG_PACKAGE_libqrencode is not set -# CONFIG_PACKAGE_libradcli is not set -# CONFIG_PACKAGE_libreadline is not set -# CONFIG_PACKAGE_libredblack is not set -# CONFIG_PACKAGE_libroxml is not set -# CONFIG_PACKAGE_librpc is not set -# CONFIG_PACKAGE_librrd1 is not set -# CONFIG_PACKAGE_librtlsdr is not set -# CONFIG_PACKAGE_libruby is not set -# CONFIG_PACKAGE_libsamplerate is not set -# CONFIG_PACKAGE_libsane is not set -# CONFIG_PACKAGE_libsasl2 is not set -# CONFIG_PACKAGE_libsearpc is not set -# CONFIG_PACKAGE_libseccomp is not set -# CONFIG_PACKAGE_libsensors is not set -# CONFIG_PACKAGE_libshout is not set -# CONFIG_PACKAGE_libshout-full is not set -# CONFIG_PACKAGE_libshout-nossl is not set -# CONFIG_PACKAGE_libsigcxx is not set -# CONFIG_PACKAGE_libsmartcols is not set -# CONFIG_PACKAGE_libsndfile is not set -# CONFIG_PACKAGE_libsoc is not set -# CONFIG_PACKAGE_libsocks is not set -# CONFIG_PACKAGE_libsodium is not set -# CONFIG_PACKAGE_libsoup is not set -# CONFIG_PACKAGE_libsoxr is not set -# CONFIG_PACKAGE_libspeex is not set -# CONFIG_PACKAGE_libspeexdsp is not set -# CONFIG_PACKAGE_libssh is not set -# CONFIG_PACKAGE_libssh2 is not set -# CONFIG_PACKAGE_libstoken is not set -# CONFIG_PACKAGE_libstrophe is not set -# CONFIG_PACKAGE_libtalloc is not set -# CONFIG_PACKAGE_libtasn1 is not set -# CONFIG_PACKAGE_libtheora is not set -# CONFIG_PACKAGE_libtiff is not set -# CONFIG_PACKAGE_libtiffxx is not set -# CONFIG_PACKAGE_libtins is not set -# CONFIG_PACKAGE_libtorrent is not set -CONFIG_PACKAGE_libubox=y -# CONFIG_PACKAGE_libubox-lua is not set -CONFIG_PACKAGE_libubus=y -# CONFIG_PACKAGE_libubus-lua is not set -CONFIG_PACKAGE_libuci=y -# CONFIG_PACKAGE_libuci-lua is not set -CONFIG_PACKAGE_libuclient=y -# CONFIG_PACKAGE_libudev-fbsd is not set -# CONFIG_PACKAGE_libudns is not set -# CONFIG_PACKAGE_libuecc is not set -# CONFIG_PACKAGE_libugpio is not set -# CONFIG_PACKAGE_libunbound is not set -# CONFIG_PACKAGE_libunistring is not set -# CONFIG_PACKAGE_libunwind is not set -# CONFIG_PACKAGE_libupnp is not set -# CONFIG_PACKAGE_libupnpp is not set -# CONFIG_PACKAGE_liburcu is not set -# CONFIG_PACKAGE_libusb-1.0 is not set -# CONFIG_PACKAGE_libusb-compat is not set -# CONFIG_PACKAGE_libusbmuxd is not set -# CONFIG_PACKAGE_libustream-cyassl is not set -# CONFIG_PACKAGE_libustream-mbedtls is not set -# CONFIG_PACKAGE_libustream-openssl is not set -# CONFIG_PACKAGE_libuuid is not set -# CONFIG_PACKAGE_libuv is not set -# CONFIG_PACKAGE_libuvc is not set -# CONFIG_PACKAGE_libv4l is not set -# CONFIG_PACKAGE_libvorbis is not set -# CONFIG_PACKAGE_libvorbisidec is not set -# CONFIG_PACKAGE_libvpx is not set -# CONFIG_PACKAGE_libwebcam is not set -# CONFIG_PACKAGE_libwebsockets-full is not set -# CONFIG_PACKAGE_libwebsockets-mbedtls is not set -# CONFIG_PACKAGE_libwebsockets-openssl is not set -# CONFIG_PACKAGE_libwrap is not set -# CONFIG_PACKAGE_libwxbase is not set -# CONFIG_PACKAGE_libx264 is not set -# CONFIG_PACKAGE_libxerces-c is not set -# CONFIG_PACKAGE_libxerces-c-samples is not set -# CONFIG_PACKAGE_libxml2 is not set -# CONFIG_PACKAGE_libxslt is not set -# CONFIG_PACKAGE_libyaml-cpp is not set -# CONFIG_PACKAGE_libyang is not set -# CONFIG_PACKAGE_libzdb is not set -# CONFIG_PACKAGE_libzmq-curve is not set -# CONFIG_PACKAGE_libzmq-nc is not set -# CONFIG_PACKAGE_linux-atm is not set -# CONFIG_PACKAGE_loudmouth is not set -# CONFIG_PACKAGE_lttng-ust is not set -# CONFIG_PACKAGE_mtdev is not set -# CONFIG_PACKAGE_musl-fts is not set -# CONFIG_PACKAGE_mxml is not set -# CONFIG_PACKAGE_nacl is not set -# CONFIG_PACKAGE_opencv is not set -# CONFIG_PACKAGE_p11-kit is not set -# CONFIG_PACKAGE_poco is not set -# CONFIG_PACKAGE_protobuf is not set -# CONFIG_PACKAGE_pthsem is not set -# CONFIG_PACKAGE_rpcd-mod-rrdns is not set -# CONFIG_PACKAGE_rxtx is not set -# CONFIG_PACKAGE_sbc is not set -# CONFIG_PACKAGE_terminfo is not set -# CONFIG_PACKAGE_tinycdb is not set -# CONFIG_PACKAGE_uclibcxx is not set -# CONFIG_PACKAGE_uw-imap is not set -# CONFIG_PACKAGE_xmlrpc-c is not set -# CONFIG_PACKAGE_xmlrpc-c-client is not set -# CONFIG_PACKAGE_xmlrpc-c-server is not set -# CONFIG_PACKAGE_yajl is not set -# CONFIG_PACKAGE_zlib is not set - -# -# LuCI -# - -# -# 1. Collections -# -# CONFIG_PACKAGE_luci is not set -# CONFIG_PACKAGE_luci-ssl is not set -# CONFIG_PACKAGE_luci-ssl-openssl is not set - -# -# 2. Modules -# -# CONFIG_PACKAGE_luci-base is not set -# CONFIG_LUCI_SRCDIET is not set - -# -# Translations -# -# CONFIG_LUCI_LANG_ca is not set -# CONFIG_LUCI_LANG_cs is not set -# CONFIG_LUCI_LANG_de is not set -# CONFIG_LUCI_LANG_el is not set -# CONFIG_LUCI_LANG_en is not set -# CONFIG_LUCI_LANG_es is not set -# CONFIG_LUCI_LANG_fr is not set -# CONFIG_LUCI_LANG_he is not set -# CONFIG_LUCI_LANG_hu is not set -# CONFIG_LUCI_LANG_it is not set -# CONFIG_LUCI_LANG_ja is not set -# CONFIG_LUCI_LANG_ko is not set -# CONFIG_LUCI_LANG_ms is not set -# CONFIG_LUCI_LANG_no is not set -# CONFIG_LUCI_LANG_pl is not set -# CONFIG_LUCI_LANG_pt is not set -# CONFIG_LUCI_LANG_pt-br is not set -# CONFIG_LUCI_LANG_ro is not set -# CONFIG_LUCI_LANG_ru is not set -# CONFIG_LUCI_LANG_sk is not set -# CONFIG_LUCI_LANG_sv is not set -# CONFIG_LUCI_LANG_tr is not set -# CONFIG_LUCI_LANG_uk is not set -# CONFIG_LUCI_LANG_vi is not set -# CONFIG_LUCI_LANG_zh-cn is not set -# CONFIG_LUCI_LANG_zh-tw is not set -# CONFIG_PACKAGE_luci-mod-admin-full is not set -# CONFIG_PACKAGE_luci-mod-failsafe is not set -# CONFIG_PACKAGE_luci-mod-freifunk is not set -# CONFIG_PACKAGE_luci-mod-freifunk-community is not set -# CONFIG_PACKAGE_luci-mod-rpc is not set - -# -# 3. Applications -# -# CONFIG_PACKAGE_luci-app-adblock is not set -# CONFIG_PACKAGE_luci-app-adbyby-plus is not set -# CONFIG_PACKAGE_luci-app-advanced-reboot is not set -# CONFIG_PACKAGE_luci-app-ahcp is not set -# CONFIG_PACKAGE_luci-app-amule is not set -# CONFIG_PACKAGE_luci-app-aria2 is not set -# CONFIG_PACKAGE_luci-app-arpbind is not set -# CONFIG_PACKAGE_luci-app-asterisk is not set -# CONFIG_PACKAGE_luci-app-autoreboot is not set -# CONFIG_PACKAGE_luci-app-bcp38 is not set -# CONFIG_PACKAGE_luci-app-bird4 is not set -# CONFIG_PACKAGE_luci-app-bird6 is not set -# CONFIG_PACKAGE_luci-app-bmx6 is not set -# CONFIG_PACKAGE_luci-app-bmx7 is not set -# CONFIG_PACKAGE_luci-app-cjdns is not set -# CONFIG_PACKAGE_luci-app-clamav is not set -# CONFIG_PACKAGE_luci-app-commands is not set -# CONFIG_PACKAGE_luci-app-cshark is not set -# CONFIG_PACKAGE_luci-app-ddns is not set -# CONFIG_PACKAGE_luci-app-diag-core is not set -# CONFIG_PACKAGE_luci-app-dnscrypt-proxy is not set -# CONFIG_PACKAGE_luci-app-dogcom is not set -# CONFIG_PACKAGE_luci-app-dump1090 is not set -# CONFIG_PACKAGE_luci-app-dynapoint is not set -# CONFIG_PACKAGE_luci-app-e2guardian is not set -# CONFIG_PACKAGE_luci-app-filetransfer is not set -# CONFIG_PACKAGE_luci-app-firewall is not set -# CONFIG_PACKAGE_luci-app-freifunk-diagnostics is not set -# CONFIG_PACKAGE_luci-app-freifunk-policyrouting is not set -# CONFIG_PACKAGE_luci-app-freifunk-widgets is not set -# CONFIG_PACKAGE_luci-app-frpc is not set -# CONFIG_PACKAGE_luci-app-fwknopd is not set -# CONFIG_PACKAGE_luci-app-hd-idle is not set -# CONFIG_PACKAGE_luci-app-hnet is not set -# CONFIG_PACKAGE_luci-app-ipsec-vpnd is not set -# CONFIG_PACKAGE_luci-app-kcptun is not set -# CONFIG_PACKAGE_luci-app-meshwizard is not set -# CONFIG_PACKAGE_luci-app-minidlna is not set -# CONFIG_PACKAGE_luci-app-mjpg-streamer is not set -# CONFIG_PACKAGE_luci-app-mmc-over-gpio is not set -# CONFIG_PACKAGE_luci-app-mproxy is not set -# CONFIG_PACKAGE_luci-app-mwan3 is not set -# CONFIG_PACKAGE_luci-app-n2n_v2 is not set -# CONFIG_PACKAGE_luci-app-ngrokc is not set -# CONFIG_PACKAGE_luci-app-nlbwmon is not set -# CONFIG_PACKAGE_luci-app-noddos is not set -# CONFIG_PACKAGE_luci-app-ntpc is not set -# CONFIG_PACKAGE_luci-app-ocserv is not set -# CONFIG_PACKAGE_luci-app-olsr is not set -# CONFIG_PACKAGE_luci-app-olsr-services is not set -# CONFIG_PACKAGE_luci-app-olsr-viz is not set -# CONFIG_PACKAGE_luci-app-openvpn is not set -# CONFIG_PACKAGE_luci-app-openvpn-server is not set -# CONFIG_PACKAGE_luci-app-oscam is not set -# CONFIG_PACKAGE_luci-app-p910nd is not set -# CONFIG_PACKAGE_luci-app-polipo is not set -# CONFIG_PACKAGE_luci-app-pptp-server is not set -# CONFIG_PACKAGE_luci-app-privoxy is not set -# CONFIG_PACKAGE_luci-app-qos is not set -# CONFIG_PACKAGE_luci-app-radicale is not set -# CONFIG_PACKAGE_luci-app-rp-pppoe-server is not set -# CONFIG_PACKAGE_luci-app-samba is not set -# CONFIG_PACKAGE_luci-app-sfe is not set -# CONFIG_PACKAGE_luci-app-shadowsocks-libev is not set -# CONFIG_PACKAGE_luci-app-shadowsocksr-pro is not set -# CONFIG_PACKAGE_luci-app-shairplay is not set -# CONFIG_PACKAGE_luci-app-shairport is not set -# CONFIG_PACKAGE_luci-app-siitwizard is not set -# CONFIG_PACKAGE_luci-app-simple-adblock is not set -# CONFIG_PACKAGE_luci-app-splash is not set -# CONFIG_PACKAGE_luci-app-squid is not set -# CONFIG_PACKAGE_luci-app-ssrserver-python is not set -# CONFIG_PACKAGE_luci-app-statistics is not set -# CONFIG_PACKAGE_luci-app-syncdial is not set -# CONFIG_PACKAGE_luci-app-tinyproxy is not set -# CONFIG_PACKAGE_luci-app-transmission is not set -# CONFIG_PACKAGE_luci-app-transparent-proxy is not set -# CONFIG_PACKAGE_luci-app-travelmate is not set -# CONFIG_PACKAGE_luci-app-udp2raw is not set -# CONFIG_PACKAGE_luci-app-udpxy is not set -# CONFIG_PACKAGE_luci-app-uhttpd is not set -# CONFIG_PACKAGE_luci-app-unbound is not set -# CONFIG_PACKAGE_luci-app-upnp is not set -# CONFIG_PACKAGE_luci-app-usb-printer is not set -# CONFIG_PACKAGE_luci-app-vlmcsd is not set -# CONFIG_PACKAGE_luci-app-vnstat is not set -# CONFIG_PACKAGE_luci-app-vpnbypass is not set -# CONFIG_PACKAGE_luci-app-vsftpd is not set -# CONFIG_PACKAGE_luci-app-watchcat is not set -# CONFIG_PACKAGE_luci-app-wifischedule is not set -# CONFIG_PACKAGE_luci-app-wireguard is not set -# CONFIG_PACKAGE_luci-app-wol is not set -# CONFIG_PACKAGE_luci-app-xlnetacc is not set -# CONFIG_PACKAGE_luci-app-zerotier is not set - -# -# 4. Themes -# -# CONFIG_PACKAGE_luci-theme-atmaterial is not set -# CONFIG_PACKAGE_luci-theme-bootstrap is not set -# CONFIG_PACKAGE_luci-theme-freifunk-generic is not set -# CONFIG_PACKAGE_luci-theme-material is not set -# CONFIG_PACKAGE_luci-theme-openwrt is not set - -# -# 5. Protocols -# -# CONFIG_PACKAGE_luci-proto-3g is not set -# CONFIG_PACKAGE_luci-proto-ipip is not set -# CONFIG_PACKAGE_luci-proto-ipv6 is not set -# CONFIG_PACKAGE_luci-proto-ncm is not set -# CONFIG_PACKAGE_luci-proto-openconnect is not set -# CONFIG_PACKAGE_luci-proto-ppp is not set -# CONFIG_PACKAGE_luci-proto-qmi is not set -# CONFIG_PACKAGE_luci-proto-relay is not set -# CONFIG_PACKAGE_luci-proto-vpnc is not set -# CONFIG_PACKAGE_luci-proto-wireguard is not set - -# -# 6. Libraries -# -# CONFIG_PACKAGE_luci-lib-dracula is not set -# CONFIG_PACKAGE_luci-lib-httpclient is not set -# CONFIG_PACKAGE_luci-lib-ip is not set -# CONFIG_PACKAGE_luci-lib-jquery-1-4 is not set -# CONFIG_PACKAGE_luci-lib-json is not set -# CONFIG_PACKAGE_luci-lib-jsonc is not set -# CONFIG_PACKAGE_luci-lib-luaneightbl is not set -# CONFIG_PACKAGE_luci-lib-nixio is not set -# CONFIG_PACKAGE_luci-lib-px5g is not set - -# -# 9. Freifunk -# -# CONFIG_PACKAGE_freifunk-common is not set -# CONFIG_PACKAGE_freifunk-firewall is not set -# CONFIG_PACKAGE_freifunk-policyrouting is not set -# CONFIG_PACKAGE_freifunk-watchdog is not set -# CONFIG_PACKAGE_meshwizard is not set -# CONFIG_PACKAGE_default-settings is not set - -# -# Mail -# -# CONFIG_PACKAGE_alpine is not set -# CONFIG_PACKAGE_alpine-nossl is not set -# CONFIG_PACKAGE_bogofilter is not set -# CONFIG_PACKAGE_clamsmtp is not set -# CONFIG_PACKAGE_dovecot is not set -# CONFIG_PACKAGE_dovecot-pigeonhole is not set -# CONFIG_PACKAGE_dovecot-utils is not set -# CONFIG_PACKAGE_emailrelay is not set -# CONFIG_PACKAGE_fdm is not set -# CONFIG_PACKAGE_greyfix is not set -# CONFIG_PACKAGE_mailman is not set -# CONFIG_PACKAGE_mailsend is not set -# CONFIG_PACKAGE_mailsend-nossl is not set -# CONFIG_PACKAGE_msmtp is not set -# CONFIG_PACKAGE_msmtp-nossl is not set -# CONFIG_PACKAGE_mutt is not set -# CONFIG_PACKAGE_nail is not set -# CONFIG_PACKAGE_postfix is not set - -# -# Select postfix build options -# -CONFIG_POSTFIX_TLS=y -CONFIG_POSTFIX_SASL=y -CONFIG_POSTFIX_LDAP=y -# CONFIG_POSTFIX_DB is not set -CONFIG_POSTFIX_CDB=y -CONFIG_POSTFIX_SQLITE=y -# CONFIG_POSTFIX_PGSQL is not set -CONFIG_POSTFIX_PCRE=y -# CONFIG_POSTFIX_EAI is not set -# CONFIG_PACKAGE_ssmtp is not set - -# -# Multimedia -# - -# -# Streaming -# -# CONFIG_PACKAGE_oggfwd is not set -# CONFIG_PACKAGE_crtmpserver is not set -# CONFIG_PACKAGE_ffmpeg is not set -# CONFIG_PACKAGE_ffprobe is not set -# CONFIG_PACKAGE_ffserver is not set -# CONFIG_PACKAGE_fswebcam is not set -# CONFIG_PACKAGE_gphoto2 is not set -# CONFIG_PACKAGE_grilo is not set -# CONFIG_PACKAGE_grilo-plugins is not set -# CONFIG_PACKAGE_gst1-libav is not set -# CONFIG_PACKAGE_gstreamer1-libs is not set -# CONFIG_PACKAGE_gstreamer1-plugins-bad is not set -# CONFIG_PACKAGE_gstreamer1-plugins-base is not set -# CONFIG_PACKAGE_gstreamer1-plugins-good is not set -# CONFIG_PACKAGE_gstreamer1-plugins-ugly is not set -# CONFIG_PACKAGE_gstreamer1-utils is not set -# CONFIG_PACKAGE_icecast is not set -# CONFIG_PACKAGE_lcdgrilo is not set -# CONFIG_PACKAGE_minidlna is not set -# CONFIG_PACKAGE_mjpg-streamer is not set -# CONFIG_PACKAGE_motion is not set -# CONFIG_PACKAGE_tvheadend is not set -# CONFIG_PACKAGE_v4l2rtspserver is not set -# CONFIG_PACKAGE_vips is not set -# CONFIG_PACKAGE_xupnpd is not set -# CONFIG_PACKAGE_youtube-dl is not set - -# -# Network -# - -# -# BitTorrent -# -# CONFIG_PACKAGE_mktorrent is not set -# CONFIG_PACKAGE_opentracker is not set -# CONFIG_PACKAGE_opentracker6 is not set -# CONFIG_PACKAGE_rtorrent is not set -# CONFIG_PACKAGE_rtorrent-rpc is not set -# CONFIG_PACKAGE_transmission-cli-mbedtls is not set -# CONFIG_PACKAGE_transmission-cli-openssl is not set -# CONFIG_PACKAGE_transmission-daemon-mbedtls is not set -# CONFIG_PACKAGE_transmission-daemon-openssl is not set -# CONFIG_PACKAGE_transmission-remote-mbedtls is not set -# CONFIG_PACKAGE_transmission-remote-openssl is not set - -# -# Captive Portals -# -# CONFIG_PACKAGE_coova-chilli is not set -# CONFIG_PACKAGE_nodogsplash is not set -# CONFIG_PACKAGE_nodogsplash2 is not set -# CONFIG_PACKAGE_wifidog is not set -# CONFIG_PACKAGE_wifidog-tls is not set - -# -# Download Manager -# -# CONFIG_PACKAGE_webui-aria2 is not set -# CONFIG_PACKAGE_yaaw is not set - -# -# File Transfer -# -# CONFIG_PACKAGE_aria2 is not set -# CONFIG_PACKAGE_atftp is not set -# CONFIG_PACKAGE_atftpd is not set -# CONFIG_PACKAGE_curl is not set -# CONFIG_PACKAGE_gnurl is not set -# CONFIG_PACKAGE_lftp is not set -# CONFIG_PACKAGE_rsync is not set -# CONFIG_PACKAGE_rsyncd is not set -# CONFIG_PACKAGE_vsftpd is not set -# CONFIG_PACKAGE_vsftpd-alt is not set -# CONFIG_PACKAGE_vsftpd-tls is not set -# CONFIG_PACKAGE_wget is not set -# CONFIG_PACKAGE_wget-nossl is not set - -# -# Filesystem -# -# CONFIG_PACKAGE_davfs2 is not set -# CONFIG_PACKAGE_netatalk is not set -# CONFIG_PACKAGE_nfs-kernel-server is not set -# CONFIG_PACKAGE_owftpd is not set -# CONFIG_PACKAGE_owhttpd is not set -# CONFIG_PACKAGE_owserver is not set -# CONFIG_PACKAGE_sshfs is not set - -# -# Firewall -# -# CONFIG_PACKAGE_arptables is not set -# CONFIG_PACKAGE_conntrack is not set -# CONFIG_PACKAGE_conntrackd is not set -# CONFIG_PACKAGE_ebtables is not set -# CONFIG_PACKAGE_fwknop is not set -# CONFIG_PACKAGE_fwknopd is not set -# CONFIG_PACKAGE_ip6tables is not set -CONFIG_PACKAGE_iptables=y -# CONFIG_PACKAGE_iptables-mod-account is not set -# CONFIG_PACKAGE_iptables-mod-chaos is not set -# CONFIG_PACKAGE_iptables-mod-cluster is not set -# CONFIG_PACKAGE_iptables-mod-clusterip is not set -# CONFIG_PACKAGE_iptables-mod-condition is not set -# CONFIG_PACKAGE_iptables-mod-conntrack-extra is not set -# CONFIG_PACKAGE_iptables-mod-delude is not set -# CONFIG_PACKAGE_iptables-mod-dhcpmac is not set -# CONFIG_PACKAGE_iptables-mod-dnetmap is not set -# CONFIG_PACKAGE_iptables-mod-extra is not set -# CONFIG_PACKAGE_iptables-mod-filter is not set -# CONFIG_PACKAGE_iptables-mod-fuzzy is not set -# CONFIG_PACKAGE_iptables-mod-geoip is not set -# CONFIG_PACKAGE_iptables-mod-hashlimit is not set -# CONFIG_PACKAGE_iptables-mod-iface is not set -# CONFIG_PACKAGE_iptables-mod-ipmark is not set -# CONFIG_PACKAGE_iptables-mod-ipopt is not set -# CONFIG_PACKAGE_iptables-mod-ipp2p is not set -# CONFIG_PACKAGE_iptables-mod-iprange is not set -# CONFIG_PACKAGE_iptables-mod-ipsec is not set -# CONFIG_PACKAGE_iptables-mod-ipv4options is not set -# CONFIG_PACKAGE_iptables-mod-led is not set -# CONFIG_PACKAGE_iptables-mod-length2 is not set -# CONFIG_PACKAGE_iptables-mod-logmark is not set -# CONFIG_PACKAGE_iptables-mod-lscan is not set -# CONFIG_PACKAGE_iptables-mod-lua is not set -# CONFIG_PACKAGE_iptables-mod-nat-extra is not set -# CONFIG_PACKAGE_iptables-mod-nflog is not set -# CONFIG_PACKAGE_iptables-mod-nfqueue is not set -# CONFIG_PACKAGE_iptables-mod-psd is not set -# CONFIG_PACKAGE_iptables-mod-quota2 is not set -# CONFIG_PACKAGE_iptables-mod-rpfilter is not set -# CONFIG_PACKAGE_iptables-mod-sysrq is not set -# CONFIG_PACKAGE_iptables-mod-tarpit is not set -# CONFIG_PACKAGE_iptables-mod-tee is not set -# CONFIG_PACKAGE_iptables-mod-tproxy is not set -# CONFIG_PACKAGE_iptables-mod-u32 is not set -# CONFIG_PACKAGE_iptables-mod-ulog is not set -# CONFIG_PACKAGE_iptaccount is not set -# CONFIG_PACKAGE_miniupnpc is not set -# CONFIG_PACKAGE_miniupnpd is not set -# CONFIG_MINIUPNPD_IGDv2 is not set -# CONFIG_PACKAGE_natpmpc is not set -# CONFIG_PACKAGE_nftables is not set -# CONFIG_PACKAGE_shorewall is not set -# CONFIG_PACKAGE_shorewall-core is not set -# CONFIG_PACKAGE_shorewall-lite is not set -# CONFIG_PACKAGE_shorewall6 is not set -# CONFIG_PACKAGE_shorewall6-lite is not set -# CONFIG_PACKAGE_snort is not set - -# -# Firewall Tunnel -# -# CONFIG_PACKAGE_iodine is not set -# CONFIG_PACKAGE_iodined is not set - -# -# FreeRADIUS (version 3) -# -# CONFIG_PACKAGE_freeradius3 is not set -# CONFIG_PACKAGE_freeradius3-common is not set -# CONFIG_PACKAGE_freeradius3-utils is not set - -# -# IP Addresses and Names -# -# CONFIG_PACKAGE_aggregate is not set -# CONFIG_PACKAGE_announce is not set -# CONFIG_PACKAGE_avahi-autoipd is not set -# CONFIG_PACKAGE_avahi-daemon-service-http is not set -# CONFIG_PACKAGE_avahi-daemon-service-ssh is not set -# CONFIG_PACKAGE_avahi-dbus-daemon is not set -# CONFIG_PACKAGE_avahi-dnsconfd is not set -# CONFIG_PACKAGE_avahi-nodbus-daemon is not set -# CONFIG_PACKAGE_avahi-utils is not set -# CONFIG_PACKAGE_bind-check is not set -# CONFIG_PACKAGE_bind-client is not set -# CONFIG_PACKAGE_bind-dig is not set -# CONFIG_PACKAGE_bind-dnssec is not set -# CONFIG_PACKAGE_bind-host is not set -# CONFIG_PACKAGE_bind-rndc is not set -# CONFIG_PACKAGE_bind-server is not set -# CONFIG_PACKAGE_bind-tools is not set -# CONFIG_PACKAGE_danish is not set -# CONFIG_PACKAGE_ddns-scripts is not set -# CONFIG_PACKAGE_ddns-scripts_aliyun is not set -# CONFIG_PACKAGE_dhcp-forwarder is not set -# CONFIG_PACKAGE_dnscrypt-proxy is not set -# CONFIG_PACKAGE_dnscrypt-proxy-resolvers is not set -# CONFIG_PACKAGE_drill is not set -# CONFIG_PACKAGE_hostip is not set -# CONFIG_PACKAGE_idn is not set -# CONFIG_PACKAGE_inadyn is not set -# CONFIG_PACKAGE_isc-dhcp-client-ipv4 is not set -# CONFIG_PACKAGE_isc-dhcp-client-ipv6 is not set -# CONFIG_PACKAGE_isc-dhcp-omshell-ipv4 is not set -# CONFIG_PACKAGE_isc-dhcp-omshell-ipv6 is not set -# CONFIG_PACKAGE_isc-dhcp-relay-ipv4 is not set -# CONFIG_PACKAGE_isc-dhcp-relay-ipv6 is not set -# CONFIG_PACKAGE_isc-dhcp-server-ipv4 is not set -# CONFIG_PACKAGE_isc-dhcp-server-ipv6 is not set -# CONFIG_PACKAGE_knot is not set -# CONFIG_PACKAGE_knot-dig is not set -# CONFIG_PACKAGE_knot-host is not set -# CONFIG_PACKAGE_knot-keymgr is not set -# CONFIG_PACKAGE_knot-nsupdate is not set -# CONFIG_PACKAGE_knot-tests is not set -# CONFIG_PACKAGE_knot-zonecheck is not set -# CONFIG_PACKAGE_mdns-utils is not set -# CONFIG_PACKAGE_mdnsd is not set -# CONFIG_PACKAGE_mdnsresponder is not set -# CONFIG_PACKAGE_nsd is not set -# CONFIG_PACKAGE_nsd-control is not set -# CONFIG_PACKAGE_nsd-control-setup is not set -# CONFIG_PACKAGE_nsd-nossl is not set -# CONFIG_PACKAGE_ohybridproxy is not set -# CONFIG_PACKAGE_unbound is not set -# CONFIG_PACKAGE_unbound-anchor is not set -# CONFIG_PACKAGE_unbound-control is not set -# CONFIG_PACKAGE_unbound-control-setup is not set -# CONFIG_PACKAGE_unbound-host is not set -# CONFIG_PACKAGE_zonestitcher is not set - -# -# Instant Messaging -# -# CONFIG_PACKAGE_bitlbee is not set -# CONFIG_PACKAGE_irssi is not set -# CONFIG_PACKAGE_ngircd is not set -# CONFIG_PACKAGE_ngircd-nossl is not set -# CONFIG_PACKAGE_prosody is not set -# CONFIG_PACKAGE_quassel-irssi is not set -# CONFIG_PACKAGE_umurmur-mbedtls is not set -# CONFIG_PACKAGE_umurmur-openssl is not set -# CONFIG_PACKAGE_znc is not set - -# -# Linux ATM tools -# -# CONFIG_PACKAGE_atm-aread is not set -# CONFIG_PACKAGE_atm-atmaddr is not set -# CONFIG_PACKAGE_atm-atmdiag is not set -# CONFIG_PACKAGE_atm-atmdump is not set -# CONFIG_PACKAGE_atm-atmloop is not set -# CONFIG_PACKAGE_atm-atmsigd is not set -# CONFIG_PACKAGE_atm-atmswitch is not set -# CONFIG_PACKAGE_atm-atmtcp is not set -# CONFIG_PACKAGE_atm-awrite is not set -# CONFIG_PACKAGE_atm-bus is not set -# CONFIG_PACKAGE_atm-debug-tools is not set -# CONFIG_PACKAGE_atm-diagnostics is not set -# CONFIG_PACKAGE_atm-esi is not set -# CONFIG_PACKAGE_atm-ilmid is not set -# CONFIG_PACKAGE_atm-ilmidiag is not set -# CONFIG_PACKAGE_atm-lecs is not set -# CONFIG_PACKAGE_atm-les is not set -# CONFIG_PACKAGE_atm-mpcd is not set -# CONFIG_PACKAGE_atm-saaldump is not set -# CONFIG_PACKAGE_atm-sonetdiag is not set -# CONFIG_PACKAGE_atm-svc_recv is not set -# CONFIG_PACKAGE_atm-svc_send is not set -# CONFIG_PACKAGE_atm-tools is not set -# CONFIG_PACKAGE_atm-ttcp_atm is not set -# CONFIG_PACKAGE_atm-zeppelin is not set -# CONFIG_PACKAGE_br2684ctl is not set - -# -# NMAP Suite -# -# CONFIG_PACKAGE_ncat is not set -# CONFIG_PACKAGE_ncat-ssl is not set -# CONFIG_PACKAGE_ndiff is not set -# CONFIG_PACKAGE_nmap is not set -# CONFIG_PACKAGE_nmap-ssl is not set -# CONFIG_PACKAGE_nping is not set - -# -# NTRIP -# -# CONFIG_PACKAGE_ntripcaster is not set -# CONFIG_PACKAGE_ntripclient is not set -# CONFIG_PACKAGE_ntripserver is not set - -# -# OLSR.org network framework -# -# CONFIG_PACKAGE_oonf-dlep-proxy is not set -# CONFIG_PACKAGE_oonf-dlep-radio is not set -# CONFIG_PACKAGE_oonf-init-scripts is not set -# CONFIG_PACKAGE_oonf-olsrd2 is not set - -# -# Open vSwitch -# -# CONFIG_PACKAGE_openvswitch is not set -# CONFIG_PACKAGE_openvswitch-base is not set -# CONFIG_PACKAGE_openvswitch-ovn is not set -# CONFIG_PACKAGE_openvswitch-ovn-base is not set -# CONFIG_PACKAGE_openvswitch-ovn-controller is not set -# CONFIG_PACKAGE_openvswitch-ovn-controller-vtep is not set -# CONFIG_PACKAGE_openvswitch-ovn-detrace is not set -# CONFIG_PACKAGE_openvswitch-ovn-docker-overlay-driver is not set -# CONFIG_PACKAGE_openvswitch-ovn-docker-underlay-driver is not set -# CONFIG_PACKAGE_openvswitch-ovn-nbctl is not set -# CONFIG_PACKAGE_openvswitch-ovn-sbctl is not set -# CONFIG_PACKAGE_openvswitch-ovn-trace is not set -# CONFIG_PACKAGE_openvswitch-ovs-dpctl-top is not set -# CONFIG_PACKAGE_openvswitch-ovs-l3ping is not set -# CONFIG_PACKAGE_openvswitch-ovs-parse-backtrace is not set -# CONFIG_PACKAGE_openvswitch-ovs-pcap is not set -# CONFIG_PACKAGE_openvswitch-ovs-tcpdump is not set -# CONFIG_PACKAGE_openvswitch-ovs-tcpundump is not set -# CONFIG_PACKAGE_openvswitch-ovsdb-client is not set -# CONFIG_PACKAGE_openvswitch-python is not set -# CONFIG_PACKAGE_openvswitch-vtep is not set - -# -# P2P -# -# CONFIG_PACKAGE_amule is not set -CONFIG_AMULE_CRYPTOPP_STATIC_LINKING=y - -# -# Printing -# -# CONFIG_PACKAGE_p910nd is not set - -# -# Routing and Redirection -# -# CONFIG_PACKAGE_babel-pinger is not set -# CONFIG_PACKAGE_babeld is not set -# CONFIG_PACKAGE_batmand is not set -# CONFIG_PACKAGE_bcp38 is not set -# CONFIG_PACKAGE_bird4 is not set -# CONFIG_PACKAGE_bird4-uci is not set -# CONFIG_PACKAGE_bird6 is not set -# CONFIG_PACKAGE_bird6-uci is not set -# CONFIG_PACKAGE_birdc4 is not set -# CONFIG_PACKAGE_birdc6 is not set -# CONFIG_PACKAGE_birdcl4 is not set -# CONFIG_PACKAGE_birdcl6 is not set -# CONFIG_PACKAGE_bmx6 is not set -# CONFIG_PACKAGE_bmx7 is not set -# CONFIG_PACKAGE_cjdns is not set -# CONFIG_PACKAGE_cjdns-tests is not set -# CONFIG_PACKAGE_genl is not set -# CONFIG_PACKAGE_igmpproxy is not set -# CONFIG_PACKAGE_ip-bridge is not set -# CONFIG_PACKAGE_ip-full is not set -# CONFIG_PACKAGE_ip-tiny is not set -# CONFIG_PACKAGE_lldpd is not set -# CONFIG_PACKAGE_mcproxy is not set -# CONFIG_PACKAGE_mwan3 is not set -# CONFIG_PACKAGE_nstat is not set -# CONFIG_PACKAGE_olsrd is not set -# CONFIG_PACKAGE_prince is not set -# CONFIG_PACKAGE_quagga is not set -# CONFIG_PACKAGE_relayd is not set -# CONFIG_PACKAGE_smcroute is not set -# CONFIG_PACKAGE_ss is not set -# CONFIG_PACKAGE_sslh is not set -# CONFIG_PACKAGE_tc is not set -# CONFIG_PACKAGE_tcpproxy is not set -# CONFIG_PACKAGE_vis is not set - -# -# SSH -# -# CONFIG_PACKAGE_autossh is not set -# CONFIG_PACKAGE_openssh-client is not set -# CONFIG_PACKAGE_openssh-client-utils is not set -# CONFIG_PACKAGE_openssh-keygen is not set -# CONFIG_PACKAGE_openssh-moduli is not set -# CONFIG_PACKAGE_openssh-server is not set -# CONFIG_PACKAGE_openssh-server-pam is not set -# CONFIG_PACKAGE_openssh-sftp-avahi-service is not set -# CONFIG_PACKAGE_openssh-sftp-client is not set -# CONFIG_PACKAGE_openssh-sftp-server is not set -# CONFIG_PACKAGE_sshtunnel is not set - -# -# THC-IPv6 attack and analyzing toolkit -# -# CONFIG_PACKAGE_thc-ipv6-address6 is not set -# CONFIG_PACKAGE_thc-ipv6-alive6 is not set -# CONFIG_PACKAGE_thc-ipv6-covert-send6 is not set -# CONFIG_PACKAGE_thc-ipv6-covert-send6d is not set -# CONFIG_PACKAGE_thc-ipv6-denial6 is not set -# CONFIG_PACKAGE_thc-ipv6-detect-new-ip6 is not set -# CONFIG_PACKAGE_thc-ipv6-detect-sniffer6 is not set -# CONFIG_PACKAGE_thc-ipv6-dnsdict6 is not set -# CONFIG_PACKAGE_thc-ipv6-dnsrevenum6 is not set -# CONFIG_PACKAGE_thc-ipv6-dos-new-ip6 is not set -# CONFIG_PACKAGE_thc-ipv6-dump-router6 is not set -# CONFIG_PACKAGE_thc-ipv6-exploit6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-advertise6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-dhcps6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-dns6d is not set -# CONFIG_PACKAGE_thc-ipv6-fake-dnsupdate6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-mipv6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-mld26 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-mld6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-mldrouter6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-router26 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-router6 is not set -# CONFIG_PACKAGE_thc-ipv6-fake-solicitate6 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-advertise6 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-dhcpc6 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-mld26 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-mld6 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-mldrouter6 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-router26 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-router6 is not set -# CONFIG_PACKAGE_thc-ipv6-flood-solicitate6 is not set -# CONFIG_PACKAGE_thc-ipv6-fragmentation6 is not set -# CONFIG_PACKAGE_thc-ipv6-fuzz-dhcpc6 is not set -# CONFIG_PACKAGE_thc-ipv6-fuzz-dhcps6 is not set -# CONFIG_PACKAGE_thc-ipv6-fuzz-ip6 is not set -# CONFIG_PACKAGE_thc-ipv6-implementation6 is not set -# CONFIG_PACKAGE_thc-ipv6-implementation6d is not set -# CONFIG_PACKAGE_thc-ipv6-inverse-lookup6 is not set -# CONFIG_PACKAGE_thc-ipv6-kill-router6 is not set -# CONFIG_PACKAGE_thc-ipv6-ndpexhaust6 is not set -# CONFIG_PACKAGE_thc-ipv6-node-query6 is not set -# CONFIG_PACKAGE_thc-ipv6-parasite6 is not set -# CONFIG_PACKAGE_thc-ipv6-passive-discovery6 is not set -# CONFIG_PACKAGE_thc-ipv6-randicmp6 is not set -# CONFIG_PACKAGE_thc-ipv6-redir6 is not set -# CONFIG_PACKAGE_thc-ipv6-rsmurf6 is not set -# CONFIG_PACKAGE_thc-ipv6-sendpees6 is not set -# CONFIG_PACKAGE_thc-ipv6-sendpeesmp6 is not set -# CONFIG_PACKAGE_thc-ipv6-smurf6 is not set -# CONFIG_PACKAGE_thc-ipv6-thcping6 is not set -# CONFIG_PACKAGE_thc-ipv6-toobig6 is not set -# CONFIG_PACKAGE_thc-ipv6-trace6 is not set - -# -# Telephony -# -# CONFIG_PACKAGE_asterisk13 is not set -# CONFIG_PACKAGE_asterisk15 is not set -# CONFIG_PACKAGE_baresip is not set -# CONFIG_PACKAGE_freeswitch is not set -# CONFIG_PACKAGE_freeswitch-stable is not set -# CONFIG_PACKAGE_kamailio5 is not set -# CONFIG_PACKAGE_miax is not set -# CONFIG_PACKAGE_pcapsipdump is not set -# CONFIG_PACKAGE_restund is not set -# CONFIG_PACKAGE_rtpproxy is not set -# CONFIG_PACKAGE_sipp is not set -# CONFIG_PACKAGE_siproxd is not set -# CONFIG_PACKAGE_yate is not set - -# -# Time Synchronization -# -# CONFIG_PACKAGE_chrony is not set -# CONFIG_PACKAGE_htpdate is not set -# CONFIG_PACKAGE_linuxptp is not set -# CONFIG_PACKAGE_ntp-keygen is not set -# CONFIG_PACKAGE_ntp-utils is not set -# CONFIG_PACKAGE_ntpclient is not set -# CONFIG_PACKAGE_ntpd is not set -# CONFIG_PACKAGE_ntpdate is not set - -# -# VPN -# -# CONFIG_PACKAGE_chaosvpn is not set -# CONFIG_PACKAGE_fastd is not set -# CONFIG_PACKAGE_ipsec-tools is not set -# CONFIG_PACKAGE_n2n_v2 is not set -# CONFIG_PACKAGE_ocserv is not set -# CONFIG_PACKAGE_openconnect is not set -# CONFIG_PACKAGE_opennhrp is not set -# CONFIG_PACKAGE_openvpn-easy-rsa is not set -# CONFIG_PACKAGE_openvpn-mbedtls is not set -# CONFIG_PACKAGE_openvpn-nossl is not set -# CONFIG_PACKAGE_openvpn-openssl is not set -# CONFIG_PACKAGE_pptpd is not set -# CONFIG_PACKAGE_softethervpn is not set -# CONFIG_PACKAGE_sstp-client is not set -# CONFIG_PACKAGE_strongswan is not set -# CONFIG_PACKAGE_strongswan-charon is not set -# CONFIG_PACKAGE_strongswan-charon-cmd is not set -# CONFIG_PACKAGE_strongswan-default is not set -# CONFIG_PACKAGE_strongswan-ipsec is not set -# CONFIG_PACKAGE_strongswan-isakmp is not set -# CONFIG_PACKAGE_strongswan-libtls is not set -# CONFIG_PACKAGE_strongswan-minimal is not set -# CONFIG_PACKAGE_strongswan-mod-addrblock is not set -# CONFIG_PACKAGE_strongswan-mod-aes is not set -# CONFIG_PACKAGE_strongswan-mod-af-alg is not set -# CONFIG_PACKAGE_strongswan-mod-agent is not set -# CONFIG_PACKAGE_strongswan-mod-attr is not set -# CONFIG_PACKAGE_strongswan-mod-attr-sql is not set -# CONFIG_PACKAGE_strongswan-mod-blowfish is not set -# CONFIG_PACKAGE_strongswan-mod-ccm is not set -# CONFIG_PACKAGE_strongswan-mod-cmac is not set -# CONFIG_PACKAGE_strongswan-mod-connmark is not set -# CONFIG_PACKAGE_strongswan-mod-constraints is not set -# CONFIG_PACKAGE_strongswan-mod-coupling is not set -# CONFIG_PACKAGE_strongswan-mod-ctr is not set -# CONFIG_PACKAGE_strongswan-mod-curl is not set -# CONFIG_PACKAGE_strongswan-mod-curve25519 is not set -# CONFIG_PACKAGE_strongswan-mod-des is not set -# CONFIG_PACKAGE_strongswan-mod-dhcp is not set -# CONFIG_PACKAGE_strongswan-mod-dnskey is not set -# CONFIG_PACKAGE_strongswan-mod-duplicheck is not set -# CONFIG_PACKAGE_strongswan-mod-eap-identity is not set -# CONFIG_PACKAGE_strongswan-mod-eap-md5 is not set -# CONFIG_PACKAGE_strongswan-mod-eap-mschapv2 is not set -# CONFIG_PACKAGE_strongswan-mod-eap-radius is not set -# CONFIG_PACKAGE_strongswan-mod-eap-tls is not set -# CONFIG_PACKAGE_strongswan-mod-farp is not set -# CONFIG_PACKAGE_strongswan-mod-fips-prf is not set -# CONFIG_PACKAGE_strongswan-mod-forecast is not set -# CONFIG_PACKAGE_strongswan-mod-gcm is not set -# CONFIG_PACKAGE_strongswan-mod-gcrypt is not set -# CONFIG_PACKAGE_strongswan-mod-gmp is not set -# CONFIG_PACKAGE_strongswan-mod-gmpdh is not set -# CONFIG_PACKAGE_strongswan-mod-ha is not set -# CONFIG_PACKAGE_strongswan-mod-hmac is not set -# CONFIG_PACKAGE_strongswan-mod-kernel-libipsec is not set -# CONFIG_PACKAGE_strongswan-mod-kernel-netlink is not set -# CONFIG_PACKAGE_strongswan-mod-ldap is not set -# CONFIG_PACKAGE_strongswan-mod-led is not set -# CONFIG_PACKAGE_strongswan-mod-load-tester is not set -# CONFIG_PACKAGE_strongswan-mod-md4 is not set -# CONFIG_PACKAGE_strongswan-mod-md5 is not set -# CONFIG_PACKAGE_strongswan-mod-mysql is not set -# CONFIG_PACKAGE_strongswan-mod-nonce is not set -# CONFIG_PACKAGE_strongswan-mod-openssl is not set -# CONFIG_PACKAGE_strongswan-mod-pem is not set -# CONFIG_PACKAGE_strongswan-mod-pgp is not set -# CONFIG_PACKAGE_strongswan-mod-pkcs1 is not set -# CONFIG_PACKAGE_strongswan-mod-pkcs11 is not set -# CONFIG_PACKAGE_strongswan-mod-pkcs12 is not set -# CONFIG_PACKAGE_strongswan-mod-pkcs7 is not set -# CONFIG_PACKAGE_strongswan-mod-pkcs8 is not set -# CONFIG_PACKAGE_strongswan-mod-pubkey is not set -# CONFIG_PACKAGE_strongswan-mod-random is not set -# CONFIG_PACKAGE_strongswan-mod-rc2 is not set -# CONFIG_PACKAGE_strongswan-mod-resolve is not set -# CONFIG_PACKAGE_strongswan-mod-revocation is not set -# CONFIG_PACKAGE_strongswan-mod-sha1 is not set -# CONFIG_PACKAGE_strongswan-mod-sha2 is not set -# CONFIG_PACKAGE_strongswan-mod-smp is not set -# CONFIG_PACKAGE_strongswan-mod-socket-default is not set -# CONFIG_PACKAGE_strongswan-mod-socket-dynamic is not set -# CONFIG_PACKAGE_strongswan-mod-sql is not set -# CONFIG_PACKAGE_strongswan-mod-sqlite is not set -# CONFIG_PACKAGE_strongswan-mod-sshkey is not set -# CONFIG_PACKAGE_strongswan-mod-stroke is not set -# CONFIG_PACKAGE_strongswan-mod-test-vectors is not set -# CONFIG_PACKAGE_strongswan-mod-uci is not set -# CONFIG_PACKAGE_strongswan-mod-unity is not set -# CONFIG_PACKAGE_strongswan-mod-updown is not set -# CONFIG_PACKAGE_strongswan-mod-vici is not set -# CONFIG_PACKAGE_strongswan-mod-whitelist is not set -# CONFIG_PACKAGE_strongswan-mod-x509 is not set -# CONFIG_PACKAGE_strongswan-mod-xauth-eap is not set -# CONFIG_PACKAGE_strongswan-mod-xauth-generic is not set -# CONFIG_PACKAGE_strongswan-mod-xcbc is not set -# CONFIG_PACKAGE_strongswan-pki is not set -# CONFIG_PACKAGE_strongswan-scepclient is not set -# CONFIG_PACKAGE_strongswan-swanctl is not set -# CONFIG_PACKAGE_tinc is not set -# CONFIG_PACKAGE_uanytun is not set -# CONFIG_PACKAGE_uanytun-nettle is not set -# CONFIG_PACKAGE_uanytun-nocrypt is not set -# CONFIG_PACKAGE_uanytun-sslcrypt is not set -# CONFIG_PACKAGE_vpnc is not set -# CONFIG_PACKAGE_vpnc-scripts is not set -# CONFIG_PACKAGE_wireguard is not set -# CONFIG_PACKAGE_wireguard-tools is not set -# CONFIG_PACKAGE_xl2tpd is not set -# CONFIG_PACKAGE_zerotier is not set - -# -# Version Control Systems -# -# CONFIG_PACKAGE_fossil is not set -# CONFIG_PACKAGE_git is not set -# CONFIG_PACKAGE_git-http is not set -# CONFIG_PACKAGE_subversion-client is not set -# CONFIG_PACKAGE_subversion-libs is not set -# CONFIG_PACKAGE_subversion-server is not set - -# -# WWAN -# -# CONFIG_PACKAGE_comgt is not set -# CONFIG_PACKAGE_comgt-directip is not set -# CONFIG_PACKAGE_comgt-ncm is not set -# CONFIG_PACKAGE_uqmi is not set - -# -# Web Servers/Proxies -# -# CONFIG_PACKAGE_apache is not set -# CONFIG_PACKAGE_cgi-io is not set -# CONFIG_PACKAGE_clamav is not set -# CONFIG_PACKAGE_e2guardian is not set -# CONFIG_PACKAGE_freshclam is not set -# CONFIG_PACKAGE_haproxy is not set -# CONFIG_PACKAGE_haproxy-nossl is not set -# CONFIG_PACKAGE_lighttpd is not set -# CONFIG_PACKAGE_nginx is not set -# CONFIG_PACKAGE_ngrokc is not set -# CONFIG_PACKAGE_pdnsd-alt is not set -# CONFIG_PACKAGE_polipo is not set -# CONFIG_PACKAGE_privoxy is not set -# CONFIG_PACKAGE_radicale-py2 is not set -# CONFIG_PACKAGE_radicale-py3 is not set -# CONFIG_PACKAGE_shadowsocks-client is not set -# CONFIG_PACKAGE_shadowsocks-libev-config is not set -# CONFIG_PACKAGE_shadowsocks-libev-ss-local is not set -# CONFIG_PACKAGE_shadowsocks-libev-ss-redir is not set -# CONFIG_PACKAGE_shadowsocks-libev-ss-rules is not set -# CONFIG_PACKAGE_shadowsocks-libev-ss-server is not set -# CONFIG_PACKAGE_shadowsocks-libev-ss-tunnel is not set -# CONFIG_PACKAGE_sockd is not set -# CONFIG_PACKAGE_socksify is not set -# CONFIG_PACKAGE_spawn-fcgi is not set -# CONFIG_PACKAGE_squid is not set -# CONFIG_PACKAGE_tinyproxy is not set -# CONFIG_PACKAGE_uhttpd is not set -# CONFIG_PACKAGE_uhttpd_debug is not set - -# -# dial-in/up -# -# CONFIG_PACKAGE_rp-pppoe-common is not set -# CONFIG_PACKAGE_rp-pppoe-relay is not set -# CONFIG_PACKAGE_rp-pppoe-server is not set - -# -# tcprelay -# -# CONFIG_PACKAGE_tcpbridge is not set -# CONFIG_PACKAGE_tcpcapinfo is not set -# CONFIG_PACKAGE_tcpliveplay is not set -# CONFIG_PACKAGE_tcpprep is not set -# CONFIG_PACKAGE_tcpreplay is not set -# CONFIG_PACKAGE_tcpreplay-all is not set -# CONFIG_PACKAGE_tcpreplay-edit is not set -# CONFIG_PACKAGE_tcprewrite is not set - -# -# wireless -# -# CONFIG_PACKAGE_aircrack-ng is not set -# CONFIG_PACKAGE_airmon-ng is not set -# CONFIG_PACKAGE_dynapoint is not set -# CONFIG_PACKAGE_horst is not set -# CONFIG_PACKAGE_kismet-client is not set -# CONFIG_PACKAGE_kismet-drone is not set -# CONFIG_PACKAGE_kismet-server is not set -# CONFIG_PACKAGE_pixiewps is not set -# CONFIG_PACKAGE_reaver is not set -# CONFIG_PACKAGE_wavemon is not set -# CONFIG_PACKAGE_wifischedule is not set -# CONFIG_PACKAGE_464xlat is not set -# CONFIG_PACKAGE_6in4 is not set -# CONFIG_PACKAGE_6rd is not set -# CONFIG_PACKAGE_6to4 is not set -# CONFIG_PACKAGE_acme is not set -# CONFIG_PACKAGE_adblock is not set -# CONFIG_PACKAGE_adbyby is not set -# CONFIG_PACKAGE_addrwatch is not set -# CONFIG_PACKAGE_ahcpd is not set -# CONFIG_PACKAGE_alfred is not set -# CONFIG_PACKAGE_apcupsd is not set -# CONFIG_PACKAGE_apcupsd-cgi is not set -# CONFIG_PACKAGE_apinger is not set -# CONFIG_PACKAGE_arp-scan is not set -# CONFIG_PACKAGE_authsae is not set -# CONFIG_PACKAGE_batctl is not set -# CONFIG_PACKAGE_beanstalkd is not set -# CONFIG_PACKAGE_bmon is not set -# CONFIG_PACKAGE_bwm-ng is not set -# CONFIG_PACKAGE_chat is not set -# CONFIG_PACKAGE_cifsmount is not set -# CONFIG_PACKAGE_coap-server is not set -# CONFIG_PACKAGE_conserver is not set -# CONFIG_PACKAGE_cshark is not set -# CONFIG_PACKAGE_daemonlogger is not set -# CONFIG_PACKAGE_darkstat is not set -# CONFIG_PACKAGE_dhcpcd is not set -# CONFIG_PACKAGE_dmapd is not set -# CONFIG_PACKAGE_dogcom is not set -# CONFIG_PACKAGE_ds-lite is not set -# CONFIG_PACKAGE_eapol-test is not set -# CONFIG_PACKAGE_esniper is not set -# CONFIG_PACKAGE_etherwake is not set -# CONFIG_PACKAGE_ethtool is not set -# CONFIG_PACKAGE_fakeidentd is not set -# CONFIG_PACKAGE_fping is not set -# CONFIG_PACKAGE_frpc is not set -# CONFIG_PACKAGE_gnunet is not set -# CONFIG_PACKAGE_gre is not set -# CONFIG_PACKAGE_hnet-full is not set -# CONFIG_PACKAGE_hnet-full-l2tp is not set -# CONFIG_PACKAGE_hnet-full-secure is not set -# CONFIG_PACKAGE_hnetd-nossl is not set -# CONFIG_PACKAGE_hnetd-openssl is not set -# CONFIG_PACKAGE_hostapd is not set -CONFIG_PACKAGE_hostapd-common=y -# CONFIG_PACKAGE_hostapd-mini is not set -# CONFIG_PACKAGE_hostapd-utils is not set -# CONFIG_PACKAGE_httping is not set -# CONFIG_PACKAGE_httping-nossl is not set -# CONFIG_PACKAGE_https_dns_proxy is not set -# CONFIG_PACKAGE_i2pd is not set -# CONFIG_PACKAGE_ibrdtn-tools is not set -# CONFIG_PACKAGE_ibrdtnd is not set -# CONFIG_PACKAGE_ifstat is not set -# CONFIG_PACKAGE_iftop is not set -# CONFIG_PACKAGE_iiod is not set -# CONFIG_PACKAGE_iotivity is not set -# CONFIG_PACKAGE_iotivity-cpp is not set -# CONFIG_PACKAGE_iotivity-example-garage is not set -# CONFIG_PACKAGE_iotivity-example-simple is not set -# CONFIG_PACKAGE_iotivity-oic-middle is not set -# CONFIG_PACKAGE_iotivity-resource-container-hue is not set -# CONFIG_PACKAGE_iotivity-resource-container-lib is not set -# CONFIG_PACKAGE_iotivity-resource-container-sample is not set -# CONFIG_PACKAGE_iotivity-resource-directory-lib is not set -# CONFIG_PACKAGE_iperf is not set -# CONFIG_PACKAGE_iperf3 is not set -# CONFIG_PACKAGE_ipip is not set -# CONFIG_PACKAGE_ipset is not set -# CONFIG_PACKAGE_ipset-dns is not set -# CONFIG_PACKAGE_ipset-lists is not set -# CONFIG_PACKAGE_iptraf-ng is not set -# CONFIG_PACKAGE_iputils-arping is not set -# CONFIG_PACKAGE_iputils-clockdiff is not set -# CONFIG_PACKAGE_iputils-ping is not set -# CONFIG_PACKAGE_iputils-ping6 is not set -# CONFIG_PACKAGE_iputils-tftpd is not set -# CONFIG_PACKAGE_iputils-tracepath is not set -# CONFIG_PACKAGE_iputils-tracepath6 is not set -# CONFIG_PACKAGE_iputils-traceroute6 is not set -CONFIG_PACKAGE_iw=y -# CONFIG_PACKAGE_jool is not set -# CONFIG_PACKAGE_jool-tools is not set -# CONFIG_PACKAGE_keepalived is not set -# CONFIG_PACKAGE_knxd is not set -# CONFIG_PACKAGE_kplex is not set -# CONFIG_PACKAGE_krb5-client is not set -# CONFIG_PACKAGE_krb5-libs is not set -# CONFIG_PACKAGE_krb5-server is not set -# CONFIG_PACKAGE_linknx is not set -# CONFIG_PACKAGE_lispd is not set -# CONFIG_PACKAGE_mac-telnet-client is not set -# CONFIG_PACKAGE_mac-telnet-discover is not set -# CONFIG_PACKAGE_mac-telnet-ping is not set -# CONFIG_PACKAGE_mac-telnet-server is not set -# CONFIG_PACKAGE_map is not set -# CONFIG_PACKAGE_map-t is not set -# CONFIG_PACKAGE_memcached is not set -# CONFIG_PACKAGE_mii-tool is not set -# CONFIG_PACKAGE_mikrotik-btest is not set -# CONFIG_PACKAGE_mini_snmpd is not set -# CONFIG_PACKAGE_minimalist-pcproxy is not set -# CONFIG_PACKAGE_mosquitto-client-nossl is not set -# CONFIG_PACKAGE_mosquitto-client-ssl is not set -# CONFIG_PACKAGE_mosquitto-nossl is not set -# CONFIG_PACKAGE_mosquitto-ssl is not set -# CONFIG_PACKAGE_mproxy is not set -# CONFIG_PACKAGE_mrd6 is not set -# CONFIG_PACKAGE_mtr is not set -# CONFIG_PACKAGE_nbd is not set -# CONFIG_PACKAGE_nbd-server is not set -# CONFIG_PACKAGE_ncp is not set -# CONFIG_PACKAGE_ndppd is not set -# CONFIG_PACKAGE_netcat is not set -# CONFIG_PACKAGE_netdiscover is not set -# CONFIG_PACKAGE_netperf is not set -# CONFIG_PACKAGE_nlbwmon is not set -# CONFIG_PACKAGE_noddos is not set -# CONFIG_PACKAGE_noping is not set -# CONFIG_PACKAGE_nut is not set -# CONFIG_PACKAGE_obfsproxy is not set -# CONFIG_PACKAGE_odhcp6c is not set -# CONFIG_PACKAGE_odhcpd is not set -# CONFIG_PACKAGE_ola is not set -# CONFIG_PACKAGE_omcproxy is not set -# CONFIG_PACKAGE_openldap-server is not set -# CONFIG_PACKAGE_oscam is not set -# CONFIG_PACKAGE_oping is not set -# CONFIG_PACKAGE_pen is not set -# CONFIG_PACKAGE_pimbd is not set -# CONFIG_PACKAGE_pingcheck is not set -# CONFIG_PACKAGE_port-mirroring is not set -# CONFIG_PACKAGE_portmap is not set -CONFIG_PACKAGE_ppp=y -# CONFIG_PACKAGE_ppp-mod-passwordfd is not set -# CONFIG_PACKAGE_ppp-mod-pppoa is not set -CONFIG_PACKAGE_ppp-mod-pppoe=y -# CONFIG_PACKAGE_ppp-mod-pppol2tp is not set -# CONFIG_PACKAGE_ppp-mod-pptp is not set -# CONFIG_PACKAGE_ppp-mod-radius is not set -# CONFIG_PACKAGE_ppp-multilink is not set -# CONFIG_PACKAGE_pppdump is not set -# CONFIG_PACKAGE_pppoe-discovery is not set -# CONFIG_PACKAGE_pppossh is not set -# CONFIG_PACKAGE_pppstats is not set -# CONFIG_PACKAGE_radsecproxy is not set -# CONFIG_PACKAGE_redsocks is not set -# CONFIG_PACKAGE_remserial is not set -# CONFIG_PACKAGE_rssileds is not set -# CONFIG_PACKAGE_rsyslog is not set -# CONFIG_PACKAGE_samba36-client is not set -# CONFIG_PACKAGE_samba36-server is not set -# CONFIG_PACKAGE_scapy is not set -# CONFIG_PACKAGE_sctp is not set -# CONFIG_PACKAGE_sctp-tools is not set -# CONFIG_PACKAGE_seafile-ccnet is not set -# CONFIG_PACKAGE_seafile-seahub is not set -# CONFIG_PACKAGE_seafile-server is not set -# CONFIG_PACKAGE_ser2net is not set -# CONFIG_PACKAGE_shadowsocksr-libev is not set -# CONFIG_PACKAGE_shadowsocksr-libev-alt is not set -# CONFIG_PACKAGE_shadowsocksr-libev-gfwlist is not set -# CONFIG_PACKAGE_shadowsocksr-libev-gfwlist-4M is not set -# CONFIG_PACKAGE_shadowsocksr-libev-gfwlist-polarssl is not set -# CONFIG_PACKAGE_shadowsocksr-libev-mini is not set -# CONFIG_PACKAGE_shadowsocksr-libev-polarssl is not set -# CONFIG_PACKAGE_simple-adblock is not set -# CONFIG_PACKAGE_sipgrep is not set -# CONFIG_PACKAGE_smartsnmpd is not set -# CONFIG_PACKAGE_sngrep is not set -# CONFIG_PACKAGE_snmp-mibs is not set -# CONFIG_PACKAGE_snmp-utils is not set -# CONFIG_PACKAGE_snmpd is not set -# CONFIG_PACKAGE_snmpd-static is not set -# CONFIG_PACKAGE_snmptrapd is not set -# CONFIG_PACKAGE_socat is not set -# CONFIG_PACKAGE_softflowd is not set -# CONFIG_PACKAGE_soloscli is not set -# CONFIG_PACKAGE_stunnel is not set -# CONFIG_PACKAGE_tayga is not set -# CONFIG_PACKAGE_tcpdump is not set -# CONFIG_PACKAGE_tcpdump-mini is not set -# CONFIG_PACKAGE_tor is not set -# CONFIG_PACKAGE_tor-gencert is not set -# CONFIG_PACKAGE_tor-geoip is not set -# CONFIG_PACKAGE_tor-resolve is not set -# CONFIG_PACKAGE_travelmate is not set -# CONFIG_PACKAGE_u2pnpd is not set -CONFIG_PACKAGE_uclient-fetch=y -# CONFIG_PACKAGE_udp2raw-tunnel is not set -# CONFIG_PACKAGE_udpxy is not set -# CONFIG_PACKAGE_ulogd is not set -# CONFIG_PACKAGE_umbim is not set -# CONFIG_PACKAGE_umdns is not set -# CONFIG_PACKAGE_usbip is not set -# CONFIG_PACKAGE_vallumd is not set -# CONFIG_PACKAGE_vlmcsd is not set -# CONFIG_PACKAGE_vncrepeater is not set -# CONFIG_PACKAGE_vnstat is not set -# CONFIG_PACKAGE_vpnbypass is not set -# CONFIG_PACKAGE_vsc7385-ucode-pb44 is not set -# CONFIG_PACKAGE_vsc7395-ucode-pb44 is not set -# CONFIG_PACKAGE_vti is not set -# CONFIG_PACKAGE_wakeonlan is not set -# CONFIG_PACKAGE_wpa-cli is not set -# CONFIG_PACKAGE_wpa-supplicant is not set -# CONFIG_WPA_SUPPLICANT_NO_TIMESTAMP_CHECK is not set -# CONFIG_WPA_RFKILL_SUPPORT is not set -CONFIG_WPA_MSG_MIN_PRIORITY=3 -# CONFIG_DRIVER_WEXT_SUPPORT is not set -CONFIG_DRIVER_11N_SUPPORT=y -# CONFIG_DRIVER_11AC_SUPPORT is not set -CONFIG_DRIVER_11W_SUPPORT=y -# CONFIG_PACKAGE_wpa-supplicant-mesh is not set -# CONFIG_PACKAGE_wpa-supplicant-mini is not set -# CONFIG_PACKAGE_wpa-supplicant-p2p is not set -# CONFIG_PACKAGE_wpad is not set -# CONFIG_PACKAGE_wpad-mesh is not set -CONFIG_PACKAGE_wpad-mini=y -# CONFIG_PACKAGE_wpan-tools is not set -# CONFIG_PACKAGE_wwan is not set -# CONFIG_PACKAGE_xinetd is not set - -# -# Sound -# -# CONFIG_PACKAGE_alsa-utils is not set -# CONFIG_PACKAGE_alsa-utils-seq is not set -# CONFIG_PACKAGE_alsa-utils-tests is not set -# CONFIG_PACKAGE_espeak is not set -# CONFIG_PACKAGE_faad2 is not set -# CONFIG_PACKAGE_fdk-aac is not set -# CONFIG_PACKAGE_forked-daapd is not set -# CONFIG_PACKAGE_ices is not set -# CONFIG_PACKAGE_lame is not set -# CONFIG_PACKAGE_lame-lib is not set -# CONFIG_PACKAGE_liblo-utils is not set -# CONFIG_PACKAGE_madplay is not set -# CONFIG_PACKAGE_madplay-alsa is not set -# CONFIG_PACKAGE_moc is not set -# CONFIG_PACKAGE_mpc is not set -# CONFIG_PACKAGE_mpd-avahi-service is not set -# CONFIG_PACKAGE_mpd-full is not set -# CONFIG_PACKAGE_mpd-mini is not set -# CONFIG_PACKAGE_mpg123 is not set -# CONFIG_PACKAGE_opus-tools is not set -# CONFIG_PACKAGE_pianod is not set -# CONFIG_PACKAGE_pianod-client is not set -# CONFIG_PACKAGE_portaudio is not set -# CONFIG_PACKAGE_pulseaudio-daemon is not set -# CONFIG_PACKAGE_pulseaudio-profiles is not set -# CONFIG_PACKAGE_pulseaudio-tools is not set -# CONFIG_PACKAGE_shairplay is not set -# CONFIG_PACKAGE_shairport-sync-mbedtls is not set -# CONFIG_PACKAGE_shairport-sync-mini is not set -# CONFIG_PACKAGE_shairport-sync-openssl is not set -# CONFIG_PACKAGE_shine is not set -# CONFIG_PACKAGE_sox is not set -# CONFIG_PACKAGE_squeezelite-full is not set -# CONFIG_PACKAGE_squeezelite-mini is not set -# CONFIG_PACKAGE_svox is not set -# CONFIG_PACKAGE_upmpdcli is not set - -# -# Utilities -# - -# -# Boot Loaders -# -# CONFIG_PACKAGE_fconfig is not set -# CONFIG_PACKAGE_rbcfg is not set -CONFIG_PACKAGE_uboot-envtools=y -# CONFIG_UBOOT_ENVTOOLS_UBI is not set - -# -# Compression -# -# CONFIG_PACKAGE_bsdtar is not set -# CONFIG_PACKAGE_bzip2 is not set -# CONFIG_PACKAGE_gzip is not set -# CONFIG_PACKAGE_unrar is not set -# CONFIG_PACKAGE_unzip is not set -# CONFIG_PACKAGE_xz-utils is not set -# CONFIG_PACKAGE_zip is not set - -# -# Disc -# -# CONFIG_PACKAGE_blkdiscard is not set -# CONFIG_PACKAGE_blkid is not set -# CONFIG_PACKAGE_cfdisk is not set -# CONFIG_PACKAGE_fdisk is not set -# CONFIG_PACKAGE_findfs is not set -# CONFIG_PACKAGE_hd-idle is not set -# CONFIG_PACKAGE_hdparm is not set -# CONFIG_PACKAGE_lsblk is not set -# CONFIG_PACKAGE_lvm2 is not set -# CONFIG_PACKAGE_mdadm is not set -# CONFIG_PACKAGE_partx-utils is not set -# CONFIG_PACKAGE_sfdisk is not set -# CONFIG_PACKAGE_wipefs is not set - -# -# Editors -# -# CONFIG_PACKAGE_joe is not set -# CONFIG_PACKAGE_nano is not set -# CONFIG_PACKAGE_vim is not set -# CONFIG_PACKAGE_vim-full is not set -# CONFIG_PACKAGE_vim-fuller is not set -# CONFIG_PACKAGE_vim-help is not set -# CONFIG_PACKAGE_vim-runtime is not set -# CONFIG_PACKAGE_zile is not set - -# -# Encryption -# -# CONFIG_PACKAGE_ccrypt is not set -# CONFIG_PACKAGE_certtool is not set -# CONFIG_PACKAGE_cryptsetup is not set -# CONFIG_PACKAGE_cryptsetup-openssl is not set -# CONFIG_PACKAGE_gnupg is not set -# CONFIG_PACKAGE_gnutls-utils is not set -# CONFIG_PACKAGE_gpgv is not set -# CONFIG_PACKAGE_px5g-mbedtls is not set -# CONFIG_PACKAGE_px5g-standalone is not set -# CONFIG_PACKAGE_stoken is not set - -# -# Filesystem -# -# CONFIG_PACKAGE_acl is not set -# CONFIG_PACKAGE_attr is not set -# CONFIG_PACKAGE_badblocks is not set -# CONFIG_PACKAGE_btrfs-progs is not set -# CONFIG_PACKAGE_chattr is not set -# CONFIG_PACKAGE_debugfs is not set -# CONFIG_PACKAGE_dosfstools is not set -# CONFIG_PACKAGE_dumpe2fs is not set -# CONFIG_PACKAGE_e2freefrag is not set -# CONFIG_PACKAGE_e2fsprogs is not set -# CONFIG_PACKAGE_f2fs-tools is not set -# CONFIG_PACKAGE_f2fsck is not set -# CONFIG_PACKAGE_filefrag is not set -# CONFIG_PACKAGE_fuse-utils is not set -# CONFIG_PACKAGE_hfsfsck is not set -# CONFIG_PACKAGE_lsattr is not set -# CONFIG_PACKAGE_mkf2fs is not set -# CONFIG_PACKAGE_mkhfs is not set -# CONFIG_PACKAGE_ncdu is not set -# CONFIG_PACKAGE_nfs-utils is not set -# CONFIG_PACKAGE_ntfs-3g is not set -# CONFIG_PACKAGE_ntfs-3g-low is not set -# CONFIG_PACKAGE_ntfs-3g-utils is not set -# CONFIG_PACKAGE_owfs is not set -# CONFIG_PACKAGE_owshell is not set -# CONFIG_PACKAGE_resize2fs is not set -# CONFIG_PACKAGE_squashfs-tools-mksquashfs is not set -# CONFIG_PACKAGE_squashfs-tools-unsquashfs is not set -# CONFIG_PACKAGE_swap-utils is not set -# CONFIG_PACKAGE_sysfsutils is not set -# CONFIG_PACKAGE_tune2fs is not set -# CONFIG_PACKAGE_xfs-fsck is not set -# CONFIG_PACKAGE_xfs-growfs is not set -# CONFIG_PACKAGE_xfs-mkfs is not set - -# -# Image Manipulation -# -# CONFIG_PACKAGE_jpeg-tools is not set -# CONFIG_PACKAGE_tiff-utils is not set - -# -# Luci -# -# CONFIG_PACKAGE_luci-app-haproxy-tcp is not set - -# -# Microcontroller programming -# -# CONFIG_PACKAGE_avrdude is not set -# CONFIG_PACKAGE_dfu-programmer is not set -# CONFIG_PACKAGE_stm32flash is not set - -# -# RTKLIB Suite -# -# CONFIG_PACKAGE_convbin is not set -# CONFIG_PACKAGE_pos2kml is not set -# CONFIG_PACKAGE_rnx2rtkp is not set -# CONFIG_PACKAGE_rtkrcv is not set -# CONFIG_PACKAGE_str2str is not set - -# -# Shells -# -# CONFIG_PACKAGE_bash is not set -# CONFIG_PACKAGE_klish is not set -# CONFIG_PACKAGE_tcsh is not set -# CONFIG_PACKAGE_zsh is not set - -# -# Telephony -# -# CONFIG_PACKAGE_dahdi-cfg is not set -# CONFIG_PACKAGE_dahdi-monitor is not set -# CONFIG_PACKAGE_gsm-utils is not set - -# -# Terminal -# -# CONFIG_PACKAGE_agetty is not set -# CONFIG_PACKAGE_dvtm is not set -# CONFIG_PACKAGE_minicom is not set -# CONFIG_PACKAGE_picocom is not set -# CONFIG_PACKAGE_screen is not set -# CONFIG_PACKAGE_script-utils is not set -# CONFIG_PACKAGE_serialconsole is not set -# CONFIG_PACKAGE_setterm is not set -# CONFIG_PACKAGE_tio is not set -# CONFIG_PACKAGE_tmux is not set -# CONFIG_PACKAGE_ttyd is not set -# CONFIG_PACKAGE_wall is not set - -# -# Virtualization -# - -# -# Zoneinfo -# -# CONFIG_PACKAGE_zoneinfo-africa is not set -# CONFIG_PACKAGE_zoneinfo-asia is not set -# CONFIG_PACKAGE_zoneinfo-atlantic is not set -# CONFIG_PACKAGE_zoneinfo-australia-nz is not set -# CONFIG_PACKAGE_zoneinfo-core is not set -# CONFIG_PACKAGE_zoneinfo-europe is not set -# CONFIG_PACKAGE_zoneinfo-india is not set -# CONFIG_PACKAGE_zoneinfo-northamerica is not set -# CONFIG_PACKAGE_zoneinfo-pacific is not set -# CONFIG_PACKAGE_zoneinfo-poles is not set -# CONFIG_PACKAGE_zoneinfo-simple is not set -# CONFIG_PACKAGE_zoneinfo-southamerica is not set - -# -# database -# -# CONFIG_PACKAGE_mysql-server is not set -# CONFIG_PACKAGE_pgsql-cli is not set -# CONFIG_PACKAGE_pgsql-cli-extra is not set -# CONFIG_PACKAGE_pgsql-server is not set -# CONFIG_PACKAGE_rrdcgi1 is not set -# CONFIG_PACKAGE_rrdtool1 is not set -# CONFIG_PACKAGE_sqlite3-cli is not set -# CONFIG_PACKAGE_unixodbc-tools is not set -# CONFIG_PACKAGE_adb is not set -# CONFIG_PACKAGE_ap51-flash is not set -# CONFIG_PACKAGE_at is not set -# CONFIG_PACKAGE_bandwidthd is not set -# CONFIG_PACKAGE_bandwidthd-pgsql is not set -# CONFIG_PACKAGE_bandwidthd-php is not set -# CONFIG_PACKAGE_bandwidthd-sqlite is not set -# CONFIG_PACKAGE_banhostlist is not set -# CONFIG_PACKAGE_bc is not set -# CONFIG_PACKAGE_bluelog is not set -# CONFIG_PACKAGE_bluez-daemon is not set -# CONFIG_PACKAGE_bluez-examples is not set -# CONFIG_PACKAGE_bluez-utils is not set -# CONFIG_PACKAGE_bonniexx is not set -# CONFIG_PACKAGE_bsdiff is not set -# CONFIG_PACKAGE_bspatch is not set -# CONFIG_PACKAGE_cal is not set -# CONFIG_PACKAGE_canutils is not set -# CONFIG_PACKAGE_cmdpad is not set -# CONFIG_PACKAGE_coap-client is not set -# CONFIG_PACKAGE_collectd is not set -# CONFIG_PACKAGE_coreutils is not set -# CONFIG_PACKAGE_crconf is not set -# CONFIG_PACKAGE_crelay is not set -# CONFIG_PACKAGE_ct-bugcheck is not set -# CONFIG_PACKAGE_dbus is not set -# CONFIG_PACKAGE_dfu-util is not set -# CONFIG_PACKAGE_digitemp is not set -# CONFIG_PACKAGE_digitemp-usb is not set -# CONFIG_PACKAGE_dmesg is not set -# CONFIG_PACKAGE_dropbearconvert is not set -# CONFIG_PACKAGE_dtc is not set -# CONFIG_PACKAGE_dump1090 is not set -# CONFIG_PACKAGE_ecdsautils is not set -# CONFIG_PACKAGE_elektra-kdb is not set -# CONFIG_PACKAGE_evtest is not set -# CONFIG_PACKAGE_extract is not set -# CONFIG_PACKAGE_file is not set -# CONFIG_PACKAGE_findutils-find is not set -# CONFIG_PACKAGE_findutils-locate is not set -# CONFIG_PACKAGE_findutils-xargs is not set -# CONFIG_PACKAGE_flashrom is not set -# CONFIG_PACKAGE_flashrom-pci is not set -# CONFIG_PACKAGE_flashrom-spi is not set -# CONFIG_PACKAGE_flashrom-usb is not set -# CONFIG_PACKAGE_flent-tools is not set -# CONFIG_PACKAGE_flock is not set -# CONFIG_PACKAGE_ftdi_eeprom is not set -# CONFIG_PACKAGE_gammu is not set -# CONFIG_PACKAGE_gawk is not set -# CONFIG_PACKAGE_getopt is not set -# CONFIG_PACKAGE_gkermit is not set -# CONFIG_PACKAGE_gpioctl-sysfs is not set -# CONFIG_PACKAGE_gpsd is not set -# CONFIG_PACKAGE_gpsd-clients is not set -# CONFIG_PACKAGE_grep is not set -# CONFIG_PACKAGE_hamlib is not set -# CONFIG_PACKAGE_haserl is not set -# CONFIG_PACKAGE_haveged is not set -# CONFIG_PACKAGE_hub-ctrl is not set -# CONFIG_PACKAGE_hwclock is not set -# CONFIG_PACKAGE_i2c-tools is not set -# CONFIG_PACKAGE_iconv is not set -# CONFIG_PACKAGE_iio-utils is not set -# CONFIG_PACKAGE_io is not set -# CONFIG_PACKAGE_irqbalance is not set -# CONFIG_PACKAGE_iwcap is not set -CONFIG_PACKAGE_iwinfo=y -# CONFIG_PACKAGE_jq is not set -CONFIG_PACKAGE_jshn=y -# CONFIG_PACKAGE_kexec-tools is not set -# CONFIG_PACKAGE_kmod is not set -# CONFIG_PACKAGE_lcd4linux-custom is not set -# CONFIG_PACKAGE_lcdproc-clients is not set -# CONFIG_PACKAGE_lcdproc-drivers is not set -# CONFIG_PACKAGE_lcdproc-server is not set -# CONFIG_PACKAGE_less is not set -# CONFIG_PACKAGE_less-wide is not set -# CONFIG_PACKAGE_libimobiledevice-utils is not set -CONFIG_PACKAGE_libjson-script=y -# CONFIG_PACKAGE_libplist-utils is not set -# CONFIG_PACKAGE_libsysrepo is not set -# CONFIG_PACKAGE_libusbmuxd-utils is not set -# CONFIG_PACKAGE_lm-sensors is not set -# CONFIG_PACKAGE_lm-sensors-detect is not set -# CONFIG_PACKAGE_logger is not set -# CONFIG_PACKAGE_logrotate is not set -# CONFIG_PACKAGE_look is not set -# CONFIG_PACKAGE_losetup is not set -# CONFIG_PACKAGE_lrzsz is not set -# CONFIG_PACKAGE_lsof is not set -# CONFIG_PACKAGE_lxc is not set -# CONFIG_PACKAGE_lxc-unprivileged is not set -# CONFIG_PACKAGE_maccalc is not set -# CONFIG_PACKAGE_macchanger is not set -# CONFIG_PACKAGE_mbtools is not set -# CONFIG_PACKAGE_mc is not set -# CONFIG_PACKAGE_mcookie is not set -# CONFIG_PACKAGE_mmc-utils is not set -# CONFIG_PACKAGE_moreutils is not set -# CONFIG_PACKAGE_mount-utils is not set -# CONFIG_PACKAGE_mountd is not set -# CONFIG_PACKAGE_mpack is not set -# CONFIG_PACKAGE_mt-st is not set -# CONFIG_PACKAGE_namei is not set -# CONFIG_PACKAGE_netopeer2-cli is not set -# CONFIG_PACKAGE_netopeer2-keystored is not set -# CONFIG_PACKAGE_netopeer2-server is not set -# CONFIG_PACKAGE_netwhere is not set -# CONFIG_PACKAGE_oath-toolkit is not set -# CONFIG_PACKAGE_open-plc-utils is not set -# CONFIG_PACKAGE_open2300 is not set -# CONFIG_PACKAGE_openldap-utils is not set -# CONFIG_PACKAGE_openobex is not set -# CONFIG_PACKAGE_openobex-apps is not set -# CONFIG_PACKAGE_openocd is not set -# CONFIG_PACKAGE_opensc-utils is not set -# CONFIG_PACKAGE_openssl-util is not set -# CONFIG_PACKAGE_openzwave is not set -# CONFIG_PACKAGE_openzwave-config is not set -# CONFIG_PACKAGE_owipcalc is not set -# CONFIG_PACKAGE_pciutils is not set -# CONFIG_PACKAGE_pcsc-tools is not set -# CONFIG_PACKAGE_pcscd is not set -# CONFIG_PACKAGE_pps-tools is not set -# CONFIG_PACKAGE_prlimit is not set -# CONFIG_PACKAGE_procps-ng is not set -# CONFIG_PACKAGE_progress is not set -# CONFIG_PACKAGE_prometheus-node-exporter-lua is not set -# CONFIG_PACKAGE_pv is not set -# CONFIG_PACKAGE_qrencode is not set -# CONFIG_PACKAGE_relayctl is not set -# CONFIG_PACKAGE_rename is not set -# CONFIG_PACKAGE_rng-tools is not set -# CONFIG_PACKAGE_rtl-ais is not set -# CONFIG_PACKAGE_rtl-sdr is not set -# CONFIG_PACKAGE_rtl_433 is not set -# CONFIG_PACKAGE_sane-backends is not set -# CONFIG_PACKAGE_sane-daemon is not set -# CONFIG_PACKAGE_sane-frontends is not set -# CONFIG_PACKAGE_setserial is not set -# CONFIG_PACKAGE_shadow-utils is not set -CONFIG_PACKAGE_shellsync=y -# CONFIG_PACKAGE_sispmctl is not set -# CONFIG_PACKAGE_slide-switch is not set -# CONFIG_PACKAGE_smartd is not set -# CONFIG_PACKAGE_smartmontools is not set -# CONFIG_PACKAGE_smstools3 is not set -# CONFIG_PACKAGE_sockread is not set -# CONFIG_PACKAGE_spi-tools is not set -# CONFIG_PACKAGE_spidev-test is not set -# CONFIG_PACKAGE_strace is not set -# CONFIG_PACKAGE_strace_libunwind is not set -# CONFIG_PACKAGE_stress is not set -# CONFIG_PACKAGE_sumo is not set -# CONFIG_PACKAGE_sysrepo is not set -# CONFIG_PACKAGE_sysrepocfg is not set -# CONFIG_PACKAGE_sysrepoctl is not set -# CONFIG_PACKAGE_sysstat is not set -# CONFIG_PACKAGE_tar is not set -# CONFIG_PACKAGE_taskwarrior is not set -# CONFIG_PACKAGE_tracertools is not set -# CONFIG_PACKAGE_tree is not set -# CONFIG_PACKAGE_triggerhappy is not set -# CONFIG_PACKAGE_udns-dnsget is not set -# CONFIG_PACKAGE_udns-ex-rdns is not set -# CONFIG_PACKAGE_udns-rblcheck is not set -# CONFIG_PACKAGE_ugps is not set -# CONFIG_PACKAGE_uledd is not set -# CONFIG_PACKAGE_usb-modeswitch is not set -# CONFIG_PACKAGE_usbmuxd is not set -# CONFIG_PACKAGE_usbreset is not set -# CONFIG_PACKAGE_usbutils is not set -# CONFIG_PACKAGE_uuidd is not set -# CONFIG_PACKAGE_uuidgen is not set -# CONFIG_PACKAGE_uvcdynctrl is not set -# CONFIG_PACKAGE_v4l-utils is not set -# CONFIG_PACKAGE_view1090 is not set -# CONFIG_PACKAGE_watchcat is not set -# CONFIG_PACKAGE_whereis is not set -# CONFIG_PACKAGE_wifitoggle is not set -# CONFIG_PACKAGE_xsltproc is not set -# CONFIG_PACKAGE_xxd is not set -# CONFIG_PACKAGE_yanglint is not set -# CONFIG_PACKAGE_yara is not set -# CONFIG_PACKAGE_yunbridge is not set - -# -# Xorg -# - -# -# font-utils -# -# CONFIG_PACKAGE_fontconfig is not set diff --git a/config/Config-build.in b/config/Config-build.in index dbfd09959..a082a5e0e 100644 --- a/config/Config-build.in +++ b/config/Config-build.in @@ -41,7 +41,7 @@ menu "Global build settings" default n config BUILD_PATENTED - default y + default n bool "Compile with support for patented functionality" help When this option is disabled, software which provides patented functionality diff --git a/config/Config-devel.in b/config/Config-devel.in index 30fbd6f7a..fd7c3ead1 100644 --- a/config/Config-devel.in +++ b/config/Config-devel.in @@ -90,13 +90,14 @@ menuconfig DEVEL In this instance, the --reference option of git clone will be used thus creating a quick local clone of your repo. - config KERNEL_GIT_BRANCH - string "Enter git branch to clone" if DEVEL + config KERNEL_GIT_REF + string "Enter git ref at which to checkout" if DEVEL depends on (KERNEL_GIT_CLONE_URI != "") default "" help - Enter the branch name to checkout after cloning the git repository. - In this instance, the --branch option of git clone will be used. + Enter the git ref at which to checkout the git repository + after it is cloned, and before making it a tar-ball. + It can be a git hash or a branch name. If unused, the clone's repository HEAD will be checked-out. config BUILD_LOG diff --git a/config/Config-images.in b/config/Config-images.in index 23e85433f..be10dba13 100644 --- a/config/Config-images.in +++ b/config/Config-images.in @@ -18,7 +18,6 @@ menu "Target Images" default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_ramips default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_apm821xx default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_mpc85xx - default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_ipq40xx default TARGET_INITRAMFS_COMPRESSION_NONE depends on TARGET_ROOTFS_INITRAMFS help @@ -53,6 +52,13 @@ menu "Target Images" help Kernel uses specified external cpio as INITRAMFS_SOURCE. + config TARGET_INITRAMFS_FORCE + bool "Force" + depends on TARGET_ROOTFS_INITRAMFS + default n + help + Ignore the initramfs passed by the bootloader. + comment "Root filesystem archives" config TARGET_ROOTFS_CPIOGZ @@ -63,7 +69,7 @@ menu "Target Images" config TARGET_ROOTFS_TARGZ bool "tar.gz" - default n + default n if USES_TARGZ help Build a compressed tar archive of the root filesystem. @@ -71,7 +77,7 @@ menu "Target Images" menuconfig TARGET_ROOTFS_EXT4FS bool "ext4" - default n + default n if USES_EXT4 help Build an ext4 root filesystem. @@ -116,7 +122,7 @@ menu "Target Images" config TARGET_ROOTFS_ISO bool "iso" default n - depends on TARGET_x86 + depends on TARGET_x86_generic help Create a bootable ISO image. @@ -143,7 +149,7 @@ menu "Target Images" int "Block size (in KiB)" depends on TARGET_ROOTFS_SQUASHFS default 64 if LOW_MEMORY_FOOTPRINT - default 1024 + default 256 menuconfig TARGET_ROOTFS_UBIFS bool "ubifs" @@ -186,30 +192,22 @@ menu "Target Images" depends on TARGET_ROOTFS_EXT4FS || TARGET_ROOTFS_ISO || TARGET_ROOTFS_JFFS2 || TARGET_ROOTFS_SQUASHFS select PACKAGE_grub2 default y - - config EFI_IMAGES - bool "Build EFI GRUB images (Linux x86 or x86_64 host only)" - depends on TARGET_x86 - depends on TARGET_ROOTFS_EXT4FS || TARGET_ROOTFS_ISO || TARGET_ROOTFS_JFFS2 || TARGET_ROOTFS_SQUASHFS - select PACKAGE_grub2 - select PACKAGE_grub2-efi - default n config GRUB_CONSOLE bool "Use Console Terminal (in addition to Serial)" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES default n if (TARGET_x86_generic_Soekris45xx || TARGET_x86_generic_Soekris48xx || TARGET_x86_net5501 || TARGET_x86_geos || TARGET_x86_alix2) default y config GRUB_SERIAL string "Serial port device" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES default "hvc0" if TARGET_x86_xen_domu default "ttyS0" if ! TARGET_x86_xen_domu config GRUB_BAUDRATE int "Serial port baud rate" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES default 38400 if TARGET_x86_generic default 115200 @@ -220,14 +218,14 @@ menu "Target Images" config GRUB_BOOTOPTS string "Extra kernel boot options" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES default "xencons=hvc" if TARGET_x86_xen_domu help If you don't know, just leave it blank. config GRUB_TIMEOUT string "Seconds to wait before booting the default entry" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES default "0" help If you don't know, 5 seconds is a reasonable default. @@ -235,29 +233,22 @@ menu "Target Images" config VDI_IMAGES bool "Build VirtualBox image files (VDI)" depends on TARGET_x86 || TARGET_x86_64 - depends on GRUB_IMAGES || EFI_IMAGES + select GRUB_IMAGES select TARGET_IMAGES_PAD select PACKAGE_kmod-e1000 config VMDK_IMAGES bool "Build VMware image files (VMDK)" depends on TARGET_x86 || TARGET_x86_64 - default y - depends on GRUB_IMAGES || EFI_IMAGES + select GRUB_IMAGES select TARGET_IMAGES_PAD select PACKAGE_kmod-e1000 - - config VHD_IMAGES - bool "Build Hyper-V image files (VHD)" - depends on TARGET_x86 || TARGET_x86_64 - default n - depends on GRUB_IMAGES || EFI_IMAGES - select TARGET_IMAGES_PAD - select PACKAGE_kmod-tulip + default y config TARGET_IMAGES_PAD bool "Pad images to filesystem size (for JFFS2)" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES + default y config TARGET_IMAGES_GZIP bool "GZip images" @@ -270,19 +261,19 @@ menu "Target Images" config TARGET_KERNEL_PARTSIZE int "Kernel partition size (in MB)" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES default 16 config TARGET_ROOTFS_PARTSIZE int "Root filesystem partition size (in MB)" - depends on GRUB_IMAGES || EFI_IMAGES || TARGET_ROOTFS_EXT4FS || TARGET_rb532 || TARGET_mvebu || TARGET_uml + depends on GRUB_IMAGES || TARGET_ROOTFS_EXT4FS || TARGET_rb532 || TARGET_mvebu || TARGET_uml default 90 help Select the root filesystem partition size. config TARGET_ROOTFS_PARTNAME string "Root partition on target device" - depends on GRUB_IMAGES || EFI_IMAGES + depends on GRUB_IMAGES help Override the root partition on the final device. If left empty, it will be mounted by PARTUUID which makes the kernel find the diff --git a/config/Config-kernel.in b/config/Config-kernel.in index fa06b5044..0cbe5e835 100644 --- a/config/Config-kernel.in +++ b/config/Config-kernel.in @@ -42,15 +42,20 @@ config KERNEL_DEBUG_FS write to these files. Many common debugging facilities, such as ftrace, require the existence of debugfs. +config KERNEL_MIPS_FPU_EMULATOR + bool "Compile the kernel with MIPS FPU Emulator" + default y if TARGET_pistachio + depends on (mips || mipsel || mips64 || mips64el) + config KERNEL_ARM_PMU bool default n - depends on (arm || arm64) + depends on (arm || aarch64) config KERNEL_PERF_EVENTS bool "Compile the kernel with performance events and counters" default n - select KERNEL_ARM_PMU if (arm || arm64) + select KERNEL_ARM_PMU if (arm || aarch64) config KERNEL_PROFILING bool "Compile the kernel with profiling enabled" diff --git a/feeds.conf.default b/feeds.conf.default index d8576f750..da6c66562 100644 --- a/feeds.conf.default +++ b/feeds.conf.default @@ -1,9 +1,9 @@ src-git packages https://git.openwrt.org/feed/packages.git src-git luci https://git.openwrt.org/project/luci.git src-git routing https://git.openwrt.org/feed/routing.git -#src-git telephony https://git.openwrt.org/feed/telephony.git +src-git telephony https://git.openwrt.org/feed/telephony.git #src-git video https://github.com/openwrt/video.git #src-git targets https://github.com/openwrt/targets.git #src-git management https://github.com/openwrt-management/packages.git #src-git oldpackages http://git.openwrt.org/packages.git -#src-link custom /usr/src/openwrt/custom-feed \ No newline at end of file +#src-link custom /usr/src/openwrt/custom-feed diff --git a/include/feeds.mk b/include/feeds.mk index b85438301..cecd30424 100644 --- a/include/feeds.mk +++ b/include/feeds.mk @@ -23,8 +23,6 @@ ifneq ($(CONFIG_PER_FEED_REPO),) endif endif -PACKAGE_DIR_ALL := $(TOPDIR)/staging_dir/packages/$(BOARD) - opkg_package_files = $(wildcard \ $(foreach dir,$(PACKAGE_SUBDIRS), \ $(foreach pkg,$(1), $(dir)/$(pkg)_*.ipk))) diff --git a/include/hardened-ld-pie.specs b/include/hardened-ld-pie.specs new file mode 100644 index 000000000..7317b19a1 --- /dev/null +++ b/include/hardened-ld-pie.specs @@ -0,0 +1,2 @@ +*self_spec: ++ %{no-pie|static|r|shared:;:-pie} diff --git a/include/hardening.mk b/include/hardening.mk index c277081c5..06a61789e 100644 --- a/include/hardening.mk +++ b/include/hardening.mk @@ -6,6 +6,7 @@ # PKG_CHECK_FORMAT_SECURITY ?= 1 +PKG_ASLR_PIE ?= 1 PKG_SSP ?= 1 PKG_FORTIFY_SOURCE ?= 1 PKG_RELRO ?= 1 @@ -15,6 +16,12 @@ ifdef CONFIG_PKG_CHECK_FORMAT_SECURITY TARGET_CFLAGS += -Wformat -Werror=format-security endif endif +ifdef CONFIG_PKG_ASLR_PIE + ifeq ($(strip $(PKG_ASLR_PIE)),1) + TARGET_CFLAGS += -fPIC + TARGET_LDFLAGS += -specs=$(INCLUDE_DIR)/hardened-ld-pie.specs + endif +endif ifdef CONFIG_PKG_CC_STACKPROTECTOR_REGULAR ifeq ($(strip $(PKG_SSP)),1) TARGET_CFLAGS += -fstack-protector diff --git a/include/host-build.mk b/include/host-build.mk index 9120570c5..a2a31ae04 100644 --- a/include/host-build.mk +++ b/include/host-build.mk @@ -52,6 +52,7 @@ endef HOST_CONFIGURE_VARS = \ CC="$(HOSTCC)" \ CFLAGS="$(HOST_CFLAGS)" \ + CXX="$(HOSTCXX)" \ CPPFLAGS="$(HOST_CPPFLAGS)" \ LDFLAGS="$(HOST_LDFLAGS)" \ CONFIG_SHELL="$(SHELL)" diff --git a/include/image-commands.mk b/include/image-commands.mk index bcc1256df..a84865539 100644 --- a/include/image-commands.mk +++ b/include/image-commands.mk @@ -7,7 +7,7 @@ define Build/uImage mkimage -A $(LINUX_KARCH) \ -O linux -T kernel \ -C $(1) -a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \ - -n '$(if $(UIMAGE_NAME),$(UIMAGE_NAME),$(call toupper,$(LINUX_KARCH)) OpenWrt Linux-$(LINUX_VERSION))' -d $@ $@.new + -n '$(if $(UIMAGE_NAME),$(UIMAGE_NAME),$(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION))' -d $@ $@.new mv $@.new $@ endef @@ -60,7 +60,7 @@ endef define Build/netgear-dni $(STAGING_DIR_HOST)/bin/mkdniimg \ - -B $(NETGEAR_BOARD_ID) -v OpenWrt.$(REVISION) \ + -B $(NETGEAR_BOARD_ID) -v $(VERSION_DIST).$(REVISION) \ $(if $(NETGEAR_HW_ID),-H $(NETGEAR_HW_ID)) \ -r "$(1)" \ -i $@ -o $@.new @@ -77,16 +77,17 @@ define Build/append-squashfs-fakeroot-be cat $@.fakesquashfs >> $@ endef -# append a fake/empty rootfs uImage header, to fool the bootloaders -# rootfs integrity check -define Build/append-uImage-fakeroot-hdr - rm -f $@.fakeroot +# append a fake/empty uImage header, to fool bootloaders rootfs integrity check +# for example +define Build/append-uImage-fakehdr + touch $@.fakehdr $(STAGING_DIR_HOST)/bin/mkimage \ - -A $(LINUX_KARCH) -O linux -T filesystem -C none \ - -n '$(call toupper,$(LINUX_KARCH)) OpenWrt fakeroot' \ + -A $(LINUX_KARCH) -O linux -T $(1) -C none \ + -n '$(VERSION_DIST) fake $(1)' \ + -d $@.fakehdr \ -s \ - $@.fakeroot - cat $@.fakeroot >> $@ + $@.fakehdr + cat $@.fakehdr >> $@ endef define Build/tplink-safeloader @@ -113,16 +114,12 @@ define Build/install-dtb ) endef -define Build/install-zImage - $(CP) $(KDIR)/zImage \ - $(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE_SANITIZED)-zImage -endef - define Build/fit $(TOPDIR)/scripts/mkits.sh \ -D $(DEVICE_NAME) -o $@.its -k $@ \ $(if $(word 2,$(1)),-d $(word 2,$(1))) -C $(word 1,$(1)) \ -a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \ + -c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config@1") \ -A $(LINUX_KARCH) -v $(LINUX_VERSION) PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $@.its $@.new @mv $@.new $@ @@ -138,7 +135,7 @@ define Build/lzma-no-dict endef define Build/gzip - gzip -9n -c $@ $(1) > $@.new + gzip --force -9n -c $@ $(1) > $@.new @mv $@.new $@ endef diff --git a/include/image.mk b/include/image.mk index af01951b4..d35805400 100644 --- a/include/image.mk +++ b/include/image.mk @@ -18,10 +18,8 @@ ifndef IB endif include $(INCLUDE_DIR)/image-legacy.mk - -ifdef TARGET_PER_DEVICE_ROOTFS - include $(INCLUDE_DIR)/rootfs.mk -endif +include $(INCLUDE_DIR)/feeds.mk +include $(INCLUDE_DIR)/rootfs.mk override MAKE:=$(_SINGLE)$(SUBMAKE) override NO_TRACE_MAKE:=$(_SINGLE)$(NO_TRACE_MAKE) @@ -136,12 +134,13 @@ endef define Image/BuildKernel/MkuImage mkimage -A $(ARCH) -O linux -T kernel -C $(1) -a $(2) -e $(3) \ - -n '$(call toupper,$(ARCH)) OpenWrt Linux-$(LINUX_VERSION)' -d $(4) $(5) + -n '$(call toupper,$(ARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION)' -d $(4) $(5) endef define Image/BuildKernel/MkFIT $(TOPDIR)/scripts/mkits.sh \ -D $(1) -o $(KDIR)/fit-$(1).its -k $(2) $(if $(3),-d $(3)) -C $(4) -a $(5) -e $(6) \ + -c $(if $(DEVICE_DTS_CONFIG),$(DEVICE_DTS_CONFIG),"config@1") \ -A $(LINUX_KARCH) -v $(LINUX_VERSION) PATH=$(LINUX_DIR)/scripts/dtc:$(PATH) mkimage -f $(KDIR)/fit-$(1).its $(KDIR)/fit-$(1)$(7).itb endef @@ -261,10 +260,7 @@ define Image/mkfs/ext4 endef define Image/Manifest - $(STAGING_DIR_HOST)/bin/opkg \ - --offline-root $(TARGET_DIR) \ - --add-arch all:100 \ - --add-arch $(if $(ARCH_PACKAGES),$(ARCH_PACKAGES),$(BOARD)):200 list-installed > \ + $(call opkg,$(TARGET_DIR_ORIG)) list-installed > \ $(BIN_DIR)/$(IMG_PREFIX)$(if $(PROFILE_SANITIZED),-$(PROFILE_SANITIZED)).manifest endef @@ -305,7 +301,7 @@ target-dir-%: FORCE $(call opkg_package_files,$(mkfs_packages_add))) -$(CP) -T $(mkfs_cur_target_dir).opkg/ $(mkfs_cur_target_dir)/etc/opkg/ rm -rf $(mkfs_cur_target_dir).opkg $(mkfs_cur_target_dir).conf - $(call prepare_rootfs,$(mkfs_cur_target_dir)) + $(call prepare_rootfs,$(mkfs_cur_target_dir),$(TOPDIR)/files) $(KDIR)/root.%: kernel_prepare $(call Image/mkfs/$(word 1,$(target_params)),$(target_params)) @@ -352,6 +348,7 @@ define Device/Init FS_OPTIONS/ubifs = $$(MKUBIFS_OPTS) DEVICE_DTS := + DEVICE_DTS_CONFIG := DEVICE_DTS_DIR := BOARD_NAME := @@ -364,8 +361,8 @@ endef DEFAULT_DEVICE_VARS := \ DEVICE_NAME KERNEL KERNEL_INITRAMFS KERNEL_SIZE KERNEL_INITRAMFS_IMAGE \ - KERNEL_LOADADDR DEVICE_DTS DEVICE_DTS_DIR BOARD_NAME CMDLINE \ - UBOOTENV_IN_UBI KERNEL_IN_UBI \ + KERNEL_LOADADDR DEVICE_DTS DEVICE_DTS_CONFIG DEVICE_DTS_DIR BOARD_NAME \ + CMDLINE UBOOTENV_IN_UBI KERNEL_IN_UBI \ BLOCKSIZE PAGESIZE SUBPAGESIZE VID_HDR_OFFSET \ UBINIZE_OPTS UIMAGE_NAME UBINIZE_PARTS \ SUPPORTED_DEVICES IMAGE_METADATA diff --git a/include/kernel-build.mk b/include/kernel-build.mk index 5c58e443d..c3658c216 100644 --- a/include/kernel-build.mk +++ b/include/kernel-build.mk @@ -50,14 +50,10 @@ ifneq ($(strip $(CONFIG_KERNEL_GIT_LOCAL_REPOSITORY)),"") KERNEL_GIT_OPTS+=--reference $(CONFIG_KERNEL_GIT_LOCAL_REPOSITORY) endif -ifneq ($(strip $(CONFIG_KERNEL_GIT_BRANCH)),"") - KERNEL_GIT_OPTS+=--branch $(CONFIG_KERNEL_GIT_BRANCH) -endif - define Download/git-kernel URL:=$(call qstrip,$(CONFIG_KERNEL_GIT_CLONE_URI)) PROTO:=git - VERSION:=$(CONFIG_KERNEL_GIT_BRANCH) + VERSION:=$(CONFIG_KERNEL_GIT_REF) FILE:=$(LINUX_SOURCE) SUBDIR:=linux-$(LINUX_VERSION) OPTS:=$(KERNEL_GIT_OPTS) diff --git a/include/kernel-defaults.mk b/include/kernel-defaults.mk index 33f3a8210..5e905a2fa 100644 --- a/include/kernel-defaults.mk +++ b/include/kernel-defaults.mk @@ -63,7 +63,6 @@ ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y) $(call Kernel/SetInitramfs/PreConfigure) echo 'CONFIG_INITRAMFS_ROOT_UID=$(shell id -u)' >> $(LINUX_DIR)/.config echo 'CONFIG_INITRAMFS_ROOT_GID=$(shell id -g)' >> $(LINUX_DIR)/.config - echo 'CONFIG_INITRAMFS_FORCE=y' >> $(LINUX_DIR)/.config echo "$(if $(CONFIG_TARGET_INITRAMFS_FORCE),CONFIG_INITRAMFS_FORCE=y,# CONFIG_INITRAMFS_FORCE is not set)" >> $(LINUX_DIR)/.config echo "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_NONE),CONFIG_INITRAMFS_COMPRESSION_NONE=y,# CONFIG_INITRAMFS_COMPRESSION_NONE is not set)" >> $(LINUX_DIR)/.config echo -e "$(if $(CONFIG_TARGET_INITRAMFS_COMPRESSION_GZIP),CONFIG_INITRAMFS_COMPRESSION_GZIP=y\nCONFIG_RD_GZIP=y,# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set\n# CONFIG_RD_GZIP is not set)" >> $(LINUX_DIR)/.config diff --git a/include/kernel-version.mk b/include/kernel-version.mk index 691f33fa7..3e9ddaa81 100644 --- a/include/kernel-version.mk +++ b/include/kernel-version.mk @@ -3,18 +3,29 @@ LINUX_RELEASE?=1 LINUX_VERSION-3.18 = .71 -LINUX_VERSION-4.4 = .112 -LINUX_VERSION-4.9 = .77 -LINUX_VERSION-4.14 = .32 +LINUX_VERSION-4.4 = .121 +LINUX_VERSION-4.9 = .91 +LINUX_VERSION-4.14 = .34 LINUX_KERNEL_HASH-3.18.71 = 5abc9778ad44ce02ed6c8ab52ece8a21c6d20d21f6ed8a19287b4a38a50c1240 -LINUX_KERNEL_HASH-4.4.112 = 544b42cbeed022896115c76a18fc97b4507d5b41d7ac0ce1dce9afd6ffd11ecd -LINUX_KERNEL_HASH-4.9.77 = 7c29bc3fb96f1e23d98f664e786dddd53a1599f56431b9b7fdfba402a4b3705c -LINUX_KERNEL_HASH-4.14.32 = cb0979bec663089a43b10cfbeae0cf9673544b0ff5968c33ede614ec0f43b680 +LINUX_KERNEL_HASH-4.4.121 = 44a88268b5088dc326b30c9b9133ac35a9a200b636b7268d08f32abeae6ca729 +LINUX_KERNEL_HASH-4.9.91 = 60caa752ec9fa1c426f6a2f37db3f268d0961b67a723b6443949112167b39832 +LINUX_KERNEL_HASH-4.14.34 = 782b6c4c85275c382c820e1934d3e6003ef468f43cfc5e7c22bc07c331a12bb9 +remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1)))) +sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1))))))) + +ifneq ($(call qstrip,$(CONFIG_KERNEL_GIT_CLONE_URI)),) + LINUX_VERSION:=$(call sanitize_uri,$(call remove_uri_prefix,$(CONFIG_KERNEL_GIT_CLONE_URI))) + ifeq ($(call qstrip,$(CONFIG_KERNEL_GIT_REF)),) + CONFIG_KERNEL_GIT_REF:=HEAD + endif + LINUX_VERSION:=$(LINUX_VERSION)-$(call sanitize_uri,$(CONFIG_KERNEL_GIT_REF)) +else ifdef KERNEL_PATCHVER LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER))) endif +endif split_version=$(subst ., ,$(1)) merge_version=$(subst $(space),.,$(1)) diff --git a/include/kernel.mk b/include/kernel.mk index 1b6006a62..c169550f4 100644 --- a/include/kernel.mk +++ b/include/kernel.mk @@ -225,8 +225,7 @@ $(call KernelPackage/$(1)/config) $(call KernelPackage/hooks) ifneq ($(if $(filter-out %=y %=n %=m,$(KCONFIG)),$(filter m y,$(foreach c,$(filter-out %=y %=n %=m,$(KCONFIG)),$($(c)))),.),) - ifneq ($(strip $(FILES)),) - define Package/kmod-$(1)/install + define Package/kmod-$(1)/install @for mod in $$(call version_filter,$$(FILES)); do \ if grep -q "$$$$$$$${mod##$(LINUX_DIR)/}" "$(LINUX_DIR)/modules.builtin"; then \ echo "NOTICE: module '$$$$$$$$mod' is built-in."; \ @@ -240,8 +239,7 @@ $(call KernelPackage/$(1)/config) done; $(call ModuleAutoLoad,$(1),$$(1),$(filter-out 0-,$(word 1,$(AUTOLOAD))-),$(filter-out 0,$(word 2,$(AUTOLOAD))),$(wordlist 3,99,$(AUTOLOAD))) $(call KernelPackage/$(1)/install,$$(1)) - endef - endif + endef $(if $(CONFIG_PACKAGE_kmod-$(1)), else compile: $(1)-disabled diff --git a/include/netfilter.mk b/include/netfilter.mk index c4e43a84a..5d532cea5 100644 --- a/include/netfilter.mk +++ b/include/netfilter.mk @@ -94,12 +94,14 @@ $(eval $(call nf_add,IPT_CONNTRACK_LABEL,CONFIG_NETFILTER_XT_MATCH_CONNLABEL, $( $(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_ADDRTYPE, $(if $(NF_KMOD),$(P_XT)xt_addrtype,$(P_XT)ipt_addrtype))) $(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_OWNER, $(P_XT)xt_owner)) -$(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_PHYSDEV, $(P_XT)xt_physdev)) $(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_PKTTYPE, $(P_XT)xt_pkttype)) $(eval $(call nf_add,IPT_EXTRA,CONFIG_NETFILTER_XT_MATCH_QUOTA, $(P_XT)xt_quota)) #$(eval $(call nf_add,IPT_EXTRA,CONFIG_IP_NF_TARGET_ROUTE, $(P_V4)ipt_ROUTE)) +# physdev + +$(eval $(call nf_add,IPT_PHYSDEV,CONFIG_NETFILTER_XT_MATCH_PHYSDEV, $(P_XT)xt_physdev)) # filter @@ -371,6 +373,7 @@ IPT_BUILTIN += $(NF_CONNTRACK6-y) IPT_BUILTIN += $(IPT_CONNTRACK-y) IPT_BUILTIN += $(IPT_CONNTRACK_EXTRA-y) IPT_BUILTIN += $(IPT_EXTRA-y) +IPT_BUILTIN += $(IPT_PHYSDEV-y) IPT_BUILTIN += $(IPT_FILTER-y) IPT_BUILTIN += $(IPT_FLOW-y) $(IPT_FLOW-m) IPT_BUILTIN += $(IPT_IPOPT-y) diff --git a/include/package-defaults.mk b/include/package-defaults.mk index 6bbfdcc3c..31e331b2d 100644 --- a/include/package-defaults.mk +++ b/include/package-defaults.mk @@ -65,7 +65,7 @@ Build/Patch:=$(Build/Patch/Default) ifneq ($(strip $(PKG_UNPACK)),) define Build/Prepare/Default $(PKG_UNPACK) - [ ! -d ./src/ ] || $(CP) ./src/* $(PKG_BUILD_DIR) + [ ! -d ./src/ ] || $(CP) ./src/. $(PKG_BUILD_DIR) $(Build/Patch) endef endif diff --git a/include/prereq-build.mk b/include/prereq-build.mk index 6a423d2c7..691771634 100644 --- a/include/prereq-build.mk +++ b/include/prereq-build.mk @@ -28,13 +28,15 @@ $(eval $(call TestHostCommand,proper-umask, \ $(eval $(call SetupHostCommand,gcc, \ Please install the GNU C Compiler (gcc) 4.8 or later \ - $(CC) -dumpversion | grep -E '(4\.[8-9]|5\.?[0-9]?|6\.?[0-9]?|7\.?[0-9]?)', \ - gcc -dumpversion | grep -E '(4\.[8-9]|5\.?[0-9]?|6\.?[0-9]?|7\.?[0-9]?)', \ + $(CC) -dumpversion | grep -E '^(4\.[8-9]|[5-9]\.?)', \ + gcc -dumpversion | grep -E '^(4\.[8-9]|[5-9]\.?)', \ gcc48 --version | grep gcc, \ gcc49 --version | grep gcc, \ gcc5 --version | grep gcc, \ gcc6 --version | grep gcc, \ gcc7 --version | grep gcc, \ + gcc8 --version | grep gcc, \ + gcc9 --version | grep gcc, \ gcc --version | grep Apple.LLVM )) $(eval $(call TestHostCommand,working-gcc, \ @@ -45,13 +47,15 @@ $(eval $(call TestHostCommand,working-gcc, \ $(eval $(call SetupHostCommand,g++, \ Please install the GNU C++ Compiler (g++) 4.8 or later \ - $(CXX) -dumpversion | grep -E '(4\.[8-9]|5\.?[0-9]?|6\.?[0-9]?|7\.?[0-9]?)', \ - g++ -dumpversion | grep -E '(4\.[8-9]|5\.?[0-9]?|6\.?[0-9]?|7\.?[0-9]?)', \ + $(CXX) -dumpversion | grep -E '^(4\.[8-9]|[5-9]\.?)', \ + g++ -dumpversion | grep -E '^(4\.[8-9]|[5-9]\.?)', \ g++48 --version | grep g++, \ g++49 --version | grep g++, \ g++5 --version | grep g++, \ g++6 --version | grep g++, \ g++7 --version | grep g++, \ + g++8 --version | grep g++, \ + g++9 --version | grep g++, \ g++ --version | grep Apple.LLVM )) $(eval $(call TestHostCommand,working-g++, \ diff --git a/include/prereq.mk b/include/prereq.mk index 6cb590e36..0f0f25374 100644 --- a/include/prereq.mk +++ b/include/prereq.mk @@ -90,7 +90,8 @@ define SetupHostCommand for cmd in $(call QuoteHostCommand,$(3)) $(call QuoteHostCommand,$(4)) \ $(call QuoteHostCommand,$(5)) $(call QuoteHostCommand,$(6)) \ $(call QuoteHostCommand,$(7)) $(call QuoteHostCommand,$(8)) \ - $(call QuoteHostCommand,$(9)); do \ + $(call QuoteHostCommand,$(9)) $(call QuoteHostCommand,$(10)) \ + $(call QuoteHostCommand,$(11)) $(call QuoteHostCommand,$(12)); do \ if [ -n "$$$$$$$$cmd" ]; then \ bin="$$$$$$$$(PATH="$(subst $(space),:,$(filter-out $(STAGING_DIR_HOST)/%,$(subst :,$(space),$(PATH))))" \ which "$$$$$$$${cmd%% *}")"; \ diff --git a/include/rootfs.mk b/include/rootfs.mk index 74785cbbd..76425c017 100644 --- a/include/rootfs.mk +++ b/include/rootfs.mk @@ -1,5 +1,3 @@ -include $(INCLUDE_DIR)/feeds.mk - ifdef CONFIG_USE_MKLIBS define mklibs rm -rf $(TMP_DIR)/mklibs-progs $(TMP_DIR)/mklibs-out @@ -49,17 +47,25 @@ TARGET_DIR_ORIG := $(TARGET_ROOTFS_DIR)/root.orig-$(BOARD) ifdef CONFIG_CLEAN_IPKG define clean_ipkg - -find $(1)/usr/lib/opkg -type f -and -not -name '*.control' | $(XARGS) rm -rf + -find $(1)/usr/lib/opkg/info -type f -and -not -name '*.control' | $(XARGS) rm -rf -sed -i -ne '/^Require-User: /p' $(1)/usr/lib/opkg/info/*.control + awk ' \ + BEGIN { conffiles = 0; print "Conffiles:" } \ + /^Conffiles:/ { conffiles = 1; next } \ + !/^ / { conffiles = 0; next } \ + conffiles == 1 { print } \ + ' $(1)/usr/lib/opkg/status >$(1)/usr/lib/opkg/status.new + mv $(1)/usr/lib/opkg/status.new $(1)/usr/lib/opkg/status -find $(1)/usr/lib/opkg -empty | $(XARGS) rm -rf endef endif define prepare_rootfs - @if [ -d $(TOPDIR)/files ]; then \ - $(call file_copy,$(TOPDIR)/files/.,$(1)); \ - fi + $(if $(2),@if [ -d '$(2)' ]; then \ + $(call file_copy,$(2)/.,$(1)); \ + fi) @mkdir -p $(1)/etc/rc.d + @mkdir -p $(1)/var/lock @( \ cd $(1); \ for script in ./usr/lib/opkg/info/*.postinst; do \ @@ -83,7 +89,7 @@ define prepare_rootfs rm -rf $(1)/tmp/* rm -f $(1)/usr/lib/opkg/lists/* rm -f $(1)/usr/lib/opkg/info/*.postinst* - rm -f $(1)/usr/lib/opkg/info/*.prerm* + rm -f $(1)/var/lock/*.lock $(call clean_ipkg,$(1)) $(call mklibs,$(1)) endef diff --git a/include/target.mk b/include/target.mk index 810b02fb8..6e3863672 100644 --- a/include/target.mk +++ b/include/target.mk @@ -13,7 +13,7 @@ __target_inc=1 DEVICE_TYPE?=router # Default packages - the really basic set -DEFAULT_PACKAGES:=base-files libc libgcc busybox dropbear mtd uci opkg netifd fstools uclient-fetch logd ip-full \ +DEFAULT_PACKAGES:=base-files libc libgcc busybox dropbear mtd uci opkg netifd fstools uclient-fetch logd \ iptables-mod-nat-extra kmod-nf-nathelper kmod-nf-nathelper-extra kmod-macvlan block-mount automount \ default-settings ipset-lists luci luci-app-ddns luci-app-sqm luci-app-upnp luci-app-adbyby-plus luci-app-autoreboot \ luci-app-filetransfer luci-app-shadowsocksr-pro luci-app-usb-printer luci-app-vsftpd ddns-scripts_aliyun luci-app-xlnetacc \ @@ -76,6 +76,8 @@ define Profile $(eval $(call ProfileDefault)) $(eval $(call Profile/$(1))) dumpinfo : $(call shexport,Profile/$(1)/Description) + DEFAULT_PACKAGES := $(filter-out $(patsubst -%,%,$(filter -%,$(PACKAGES))),$(DEFAULT_PACKAGES)) + PACKAGES := $(filter-out -%,$(PACKAGES)) DUMPINFO += \ echo "Target-Profile: $(1)"; \ $(if $(PRIORITY), echo "Target-Profile-Priority: $(PRIORITY)"; ) \ @@ -196,6 +198,7 @@ ifeq ($(DUMP),1) CPU_CFLAGS_cortex-a9 = -mcpu=cortex-a9 CPU_CFLAGS_cortex-a15 = -mcpu=cortex-a15 CPU_CFLAGS_cortex-a53 = -mcpu=cortex-a53 + CPU_CFLAGS_cortex-a72 = -mcpu=cortex-a72 CPU_CFLAGS_fa526 = -mcpu=fa526 CPU_CFLAGS_mpcore = -mcpu=mpcore CPU_CFLAGS_xscale = -mcpu=xscale @@ -277,9 +280,7 @@ ifeq ($(DUMP),1) FEATURES += virtio endif ifneq ($(CONFIG_CPU_MIPS32_R2),) - ifneq ($(CPU_SUBTYPE),nomips16) - FEATURES += mips16 - endif + FEATURES += mips16 endif FEATURES += $(foreach v,6 7,$(if $(CONFIG_CPU_V$(v)),arm_v$(v))) diff --git a/include/u-boot.mk b/include/u-boot.mk index 4b3ff69d6..babb76497 100644 --- a/include/u-boot.mk +++ b/include/u-boot.mk @@ -42,8 +42,8 @@ TARGET_DEP = TARGET_$(BUILD_TARGET)$(if $(BUILD_SUBTARGET),_$(BUILD_SUBTARGET)) UBOOT_MAKE_FLAGS = \ HOSTCC="$(HOSTCC)" \ - HOSTCFLAGS='$(HOST_CFLAGS) $$$$(HOSTCPPFLAGS)' \ - HOSTLDFLAGS="" + HOSTCFLAGS="$(HOST_CFLAGS) $(HOST_CPPFLAGS)" \ + HOSTLDFLAGS="$(HOST_LDFLAGS)" define Build/U-Boot/Target $(eval $(call U-Boot/Init,$(1))) diff --git a/include/version.mk b/include/version.mk index a869ed6f5..ab427ecba 100644 --- a/include/version.mk +++ b/include/version.mk @@ -22,40 +22,37 @@ PKG_CONFIG_DEPENDS += \ CONFIG_VERSION_SUPPORT_URL \ CONFIG_VERSION_HWREV \ -qstrip_escape=$(subst ','\'',$(call qstrip,$(1))) -#' - sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1)))) -VERSION_NUMBER:=$(call qstrip_escape,$(CONFIG_VERSION_NUMBER)) +VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER)) VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),SNAPSHOT) -VERSION_CODE:=$(call qstrip_escape,$(CONFIG_VERSION_CODE)) +VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE)) VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION)) -VERSION_REPO:=$(call qstrip_escape,$(CONFIG_VERSION_REPO)) +VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO)) VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),http://downloads.lede-project.org/snapshots) -VERSION_DIST:=$(call qstrip_escape,$(CONFIG_VERSION_DIST)) +VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST)) VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt) VERSION_DIST_SANITIZED:=$(call sanitize,$(VERSION_DIST)) -VERSION_MANUFACTURER:=$(call qstrip_escape,$(CONFIG_VERSION_MANUFACTURER)) +VERSION_MANUFACTURER:=$(call qstrip,$(CONFIG_VERSION_MANUFACTURER)) VERSION_MANUFACTURER:=$(if $(VERSION_MANUFACTURER),$(VERSION_MANUFACTURER),OpenWrt) -VERSION_MANUFACTURER_URL:=$(call qstrip_escape,$(CONFIG_VERSION_MANUFACTURER_URL)) +VERSION_MANUFACTURER_URL:=$(call qstrip,$(CONFIG_VERSION_MANUFACTURER_URL)) VERSION_MANUFACTURER_URL:=$(if $(VERSION_MANUFACTURER_URL),$(VERSION_MANUFACTURER_URL),http://lede-project.org/) -VERSION_BUG_URL:=$(call qstrip_escape,$(CONFIG_VERSION_BUG_URL)) +VERSION_BUG_URL:=$(call qstrip,$(CONFIG_VERSION_BUG_URL)) VERSION_BUG_URL:=$(if $(VERSION_BUG_URL),$(VERSION_BUG_URL),http://bugs.lede-project.org/) -VERSION_SUPPORT_URL:=$(call qstrip_escape,$(CONFIG_VERSION_SUPPORT_URL)) +VERSION_SUPPORT_URL:=$(call qstrip,$(CONFIG_VERSION_SUPPORT_URL)) VERSION_SUPPORT_URL:=$(if $(VERSION_SUPPORT_URL),$(VERSION_SUPPORT_URL),http://forum.lede-project.org/) -VERSION_PRODUCT:=$(call qstrip_escape,$(CONFIG_VERSION_PRODUCT)) +VERSION_PRODUCT:=$(call qstrip,$(CONFIG_VERSION_PRODUCT)) VERSION_PRODUCT:=$(if $(VERSION_PRODUCT),$(VERSION_PRODUCT),Generic) -VERSION_HWREV:=$(call qstrip_escape,$(CONFIG_VERSION_HWREV)) +VERSION_HWREV:=$(call qstrip,$(CONFIG_VERSION_HWREV)) VERSION_HWREV:=$(if $(VERSION_HWREV),$(VERSION_HWREV),v0) define taint2sym @@ -82,23 +79,28 @@ VERSION_TAINTS := $(strip $(foreach taint,$(VERSION_TAINT_SPECS), \ PKG_CONFIG_DEPENDS += $(foreach taint,$(VERSION_TAINT_SPECS),$(call taint2sym,$(taint))) -VERSION_SED:=$(SED) 's,%U,$(VERSION_REPO),g' \ - -e 's,%V,$(VERSION_NUMBER),g' \ - -e 's,%v,\L$(subst $(space),_,$(VERSION_NUMBER)),g' \ - -e 's,%C,$(VERSION_CODE),g' \ - -e 's,%c,\L$(subst $(space),_,$(VERSION_CODE)),g' \ - -e 's,%D,$(VERSION_DIST),g' \ - -e 's,%d,\L$(subst $(space),_,$(VERSION_DIST)),g' \ - -e 's,%R,$(REVISION),g' \ - -e 's,%T,$(BOARD),g' \ - -e 's,%S,$(BOARD)/$(if $(SUBTARGET),$(SUBTARGET),generic),g' \ - -e 's,%A,$(ARCH_PACKAGES),g' \ - -e 's,%t,$(VERSION_TAINTS),g' \ - -e 's,%M,$(VERSION_MANUFACTURER),g' \ - -e 's,%m,$(VERSION_MANUFACTURER_URL),g' \ - -e 's,%b,$(VERSION_BUG_URL),g' \ - -e 's,%s,$(VERSION_SUPPORT_URL),g' \ - -e 's,%P,$(VERSION_PRODUCT),g' \ - -e 's,%h,$(VERSION_HWREV),g' +# escape commas, backslashes, squotes, and ampersands for sed +define sed_escape +$(subst &,\&,$(subst $(comma),\$(comma),$(subst ','\'',$(subst \,\\,$(1))))) +endef +#' + +VERSION_SED_SCRIPT:=$(SED) 's,%U,$(call sed_escape,$(VERSION_REPO)),g' \ + -e 's,%V,$(call sed_escape,$(VERSION_NUMBER)),g' \ + -e 's,%v,\L$(call sed_escape,$(subst $(space),_,$(VERSION_NUMBER))),g' \ + -e 's,%C,$(call sed_escape,$(VERSION_CODE)),g' \ + -e 's,%c,\L$(call sed_escape,$(subst $(space),_,$(VERSION_CODE))),g' \ + -e 's,%D,$(call sed_escape,$(VERSION_DIST)),g' \ + -e 's,%d,\L$(call sed_escape,$(subst $(space),_,$(VERSION_DIST))),g' \ + -e 's,%R,$(call sed_escape,$(REVISION)),g' \ + -e 's,%T,$(call sed_escape,$(BOARD)),g' \ + -e 's,%S,$(call sed_escape,$(BOARD)/$(if $(SUBTARGET),$(SUBTARGET),generic)),g' \ + -e 's,%A,$(call sed_escape,$(ARCH_PACKAGES)),g' \ + -e 's,%t,$(call sed_escape,$(VERSION_TAINTS)),g' \ + -e 's,%M,$(call sed_escape,$(VERSION_MANUFACTURER)),g' \ + -e 's,%m,$(call sed_escape,$(VERSION_MANUFACTURER_URL)),g' \ + -e 's,%b,$(call sed_escape,$(VERSION_BUG_URL)),g' \ + -e 's,%s,$(call sed_escape,$(VERSION_SUPPORT_URL)),g' \ + -e 's,%P,$(call sed_escape,$(VERSION_PRODUCT)),g' \ + -e 's,%h,$(call sed_escape,$(VERSION_HWREV)),g' -VERSION_SED_SCRIPT:=$(subst '\'','\'\\\\\'\'',$(VERSION_SED)) diff --git a/package/Makefile b/package/Makefile index 0aefbb802..610d09d6f 100644 --- a/package/Makefile +++ b/package/Makefile @@ -7,6 +7,7 @@ curdir:=package +include $(INCLUDE_DIR)/feeds.mk include $(INCLUDE_DIR)/rootfs.mk -include $(TMP_DIR)/.packagedeps @@ -75,7 +76,7 @@ $(curdir)/install: $(TMP_DIR)/.build $(curdir)/merge $(if $(CONFIG_TARGET_PER_DE $(CP) $(TARGET_DIR) $(TARGET_DIR_ORIG) - $(call prepare_rootfs,$(TARGET_DIR)) + $(call prepare_rootfs,$(TARGET_DIR),$(TOPDIR)/files) $(curdir)/index: FORCE @echo Generating package index... diff --git a/package/base-files/Makefile b/package/base-files/Makefile index 005547416..7fe8642ff 100644 --- a/package/base-files/Makefile +++ b/package/base-files/Makefile @@ -12,7 +12,7 @@ include $(INCLUDE_DIR)/version.mk include $(INCLUDE_DIR)/feeds.mk PKG_NAME:=base-files -PKG_RELEASE:=183 +PKG_RELEASE:=190 PKG_FLAGS:=nonshared PKG_FILE_DEPENDS:=$(PLATFORM_DIR)/ $(GENERIC_PLATFORM_DIR)/base-files/ @@ -65,8 +65,6 @@ define Package/base-files/conffiles /etc/shadow /etc/shells /etc/sysctl.conf -/etc/sysctl.d/ -/etc/sysctl.d/local.conf /etc/sysupgrade.conf $(call $(TARGET)/conffiles) endef @@ -137,7 +135,7 @@ define Package/base-files/install fi; \ ) - $(VERSION_SED) \ + $(VERSION_SED_SCRIPT) \ $(1)/etc/banner \ $(1)/etc/openwrt_version \ $(1)/usr/lib/os-release @@ -171,7 +169,7 @@ define Package/base-files/install mkdir -p $(1)/root $(LN) /proc/mounts $(1)/etc/mtab rm -f $(1)/var - $(LN) /tmp $(1)/var + $(LN) tmp $(1)/var mkdir -p $(1)/etc $(LN) /tmp/resolv.conf /tmp/TZ /tmp/localtime $(1)/etc/ @@ -194,7 +192,7 @@ define Package/base-files/install $(if $(CONFIG_CLEAN_IPKG),, \ mkdir -p $(1)/etc/opkg; \ $(call FeedSourcesAppend,$(1)/etc/opkg/distfeeds.conf); \ - $(VERSION_SED) $(1)/etc/opkg/distfeeds.conf) + $(VERSION_SED_SCRIPT) $(1)/etc/opkg/distfeeds.conf) endef ifneq ($(DUMP),1) diff --git a/package/base-files/files/etc/hotplug.d/net/00-sysctl b/package/base-files/files/etc/hotplug.d/net/00-sysctl index 7a71652c4..8abe7f8bb 100644 --- a/package/base-files/files/etc/hotplug.d/net/00-sysctl +++ b/package/base-files/files/etc/hotplug.d/net/00-sysctl @@ -1,7 +1,7 @@ #!/bin/sh if [ "$ACTION" = add ]; then - for CONF in /etc/sysctl.conf /etc/sysctl.d/*.conf; do + for CONF in /etc/sysctl.d/*.conf /etc/sysctl.conf; do [ ! -f "$CONF" ] && continue; sed -ne "/^[[:space:]]*net\..*\.$DEVICENAME\./p" "$CONF" | \ sysctl -e -p - | logger -t sysctl diff --git a/package/base-files/files/etc/init.d/gpio_switch b/package/base-files/files/etc/init.d/gpio_switch index b67950a99..6b2dcdce4 100755 --- a/package/base-files/files/etc/init.d/gpio_switch +++ b/package/base-files/files/etc/init.d/gpio_switch @@ -23,8 +23,15 @@ load_gpio_switch() # we need to wait a bit until the GPIO appears [ -d "$gpio_path" ] || sleep 1 } - # set the pin to output with high or low pin value - { [ "$value" = "0" ] && echo "high" || echo "low"; } >"$gpio_path/direction" + + # direction attribute only exists if the kernel supports changing the + # direction of a GPIO + if [ -e "${gpio_path}/direction" ]; then + # set the pin to output with high or low pin value + { [ "$value" = "0" ] && echo "low" || echo "high"; } >"$gpio_path/direction" + else + { [ "$value" = "0" ] && echo "0" || echo "1"; } >"$gpio_path/value" + fi } service_triggers() diff --git a/package/base-files/files/etc/init.d/sysctl b/package/base-files/files/etc/init.d/sysctl index 3a497fb66..a236a0194 100755 --- a/package/base-files/files/etc/init.d/sysctl +++ b/package/base-files/files/etc/init.d/sysctl @@ -3,23 +3,42 @@ START=11 -set_vm_min_free() { - mem="$(grep MemTotal /proc/meminfo | awk '{print $2}')" +apply_defaults() { + local mem="$(awk '/^MemTotal:/ {print $2}' /proc/meminfo)" + local min_free frag_low_thresh frag_high_thresh + if [ "$mem" -gt 65536 ]; then # 128M - val=16384 + min_free=16384 elif [ "$mem" -gt 32768 ]; then # 64M - val=8192 - elif [ "$mem" -gt 16384 ]; then # 32M - val=1024 + min_free=8192 else - return + min_free=1024 + frag_low_thresh=393216 + frag_high_thresh=524288 + fi + + sysctl -qw vm.min_free_kbytes="$min_free" + + [ "$frag_low_thresh" ] && sysctl -qw \ + net.ipv4.ipfrag_low_thresh="$frag_low_thresh" \ + net.ipv4.ipfrag_high_thresh="$frag_high_thresh" \ + net.ipv6.ip6frag_low_thresh="$frag_low_thresh" \ + net.ipv6.ip6frag_high_thresh="$frag_high_thresh" \ + net.netfilter.nf_conntrack_frag6_low_thresh="$frag_low_thresh" \ + net.netfilter.nf_conntrack_frag6_high_thresh="$frag_high_thresh" + + # first set default, then all interfaces to avoid races with appearing interfaces + if [ -d /proc/sys/net/ipv6/conf ]; then + echo 0 > /proc/sys/net/ipv6/conf/default/accept_ra + for iface in /proc/sys/net/ipv6/conf/*/accept_ra; do + echo 0 > "$iface" + done fi - sysctl -qw vm.min_free_kbytes="$val" } start() { - set_vm_min_free - for CONF in /etc/sysctl.conf /etc/sysctl.d/*.conf; do + apply_defaults + for CONF in /etc/sysctl.d/*.conf /etc/sysctl.conf; do [ -f "$CONF" ] && sysctl -p "$CONF" -e >&- done } diff --git a/package/base-files/files/etc/rc.button/reset b/package/base-files/files/etc/rc.button/reset index 426576743..2403122ad 100755 --- a/package/base-files/files/etc/rc.button/reset +++ b/package/base-files/files/etc/rc.button/reset @@ -20,7 +20,7 @@ released) echo "REBOOT" > /dev/console sync reboot - elif [ "$SEEN" -gt 5 -a -n "$OVERLAY" ] + elif [ "$SEEN" -ge 5 -a -n "$OVERLAY" ] then echo "FACTORY RESET" > /dev/console jffs2reset -y && reboot & diff --git a/package/base-files/files/etc/sysctl.conf b/package/base-files/files/etc/sysctl.conf index ddc7a9bf6..ae04212f4 100644 --- a/package/base-files/files/etc/sysctl.conf +++ b/package/base-files/files/etc/sysctl.conf @@ -1,31 +1 @@ -kernel.panic=3 -kernel.core_pattern=/tmp/%e.%t.%p.%s.core -fs.suid_dumpable=2 - -net.ipv4.conf.default.arp_ignore=1 -net.ipv4.conf.all.arp_ignore=1 -net.ipv4.ip_forward=1 -net.ipv4.icmp_echo_ignore_broadcasts=1 -net.ipv4.icmp_ignore_bogus_error_responses=1 -net.ipv4.igmp_max_memberships=100 -net.ipv4.tcp_fin_timeout=30 -net.ipv4.tcp_keepalive_time=120 -net.ipv4.tcp_syncookies=1 -net.ipv4.tcp_timestamps=1 -net.ipv4.tcp_sack=1 -net.ipv4.tcp_dsack=1 - -net.ipv6.conf.default.forwarding=1 -net.ipv6.conf.all.forwarding=1 - -net.netfilter.nf_conntrack_acct=1 -net.netfilter.nf_conntrack_checksum=0 -net.netfilter.nf_conntrack_max=16384 -net.netfilter.nf_conntrack_tcp_timeout_established=7440 -net.netfilter.nf_conntrack_udp_timeout=60 -net.netfilter.nf_conntrack_udp_timeout_stream=180 - -# disable bridge firewalling by default -net.bridge.bridge-nf-call-arptables=0 -net.bridge.bridge-nf-call-ip6tables=0 -net.bridge.bridge-nf-call-iptables=0 +# Defaults are configured in /etc/sysctl.d/* and can be customized in this file diff --git a/package/base-files/files/etc/sysctl.d/10-default.conf b/package/base-files/files/etc/sysctl.d/10-default.conf new file mode 100644 index 000000000..9ab650924 --- /dev/null +++ b/package/base-files/files/etc/sysctl.d/10-default.conf @@ -0,0 +1,24 @@ +# Do not edit, changes to this file will be lost on upgrades +# /etc/sysctl.conf can be used to customize sysctl settings + +kernel.panic=3 +kernel.core_pattern=/tmp/%e.%t.%p.%s.core +fs.suid_dumpable=2 + +net.ipv4.conf.default.arp_ignore=1 +net.ipv4.conf.all.arp_ignore=1 +net.ipv4.ip_forward=1 +net.ipv4.icmp_echo_ignore_broadcasts=1 +net.ipv4.icmp_ignore_bogus_error_responses=1 +net.ipv4.igmp_max_memberships=100 +net.ipv4.tcp_fin_timeout=30 +net.ipv4.tcp_keepalive_time=120 +net.ipv4.tcp_syncookies=1 +net.ipv4.tcp_timestamps=1 +net.ipv4.tcp_sack=1 +net.ipv4.tcp_dsack=1 + +net.ipv6.conf.default.forwarding=1 +net.ipv6.conf.all.forwarding=1 + +net.netfilter.nf_conntrack_helper = 1 diff --git a/package/base-files/files/etc/sysctl.d/local.conf b/package/base-files/files/etc/sysctl.d/local.conf deleted file mode 100644 index 891da73df..000000000 --- a/package/base-files/files/etc/sysctl.d/local.conf +++ /dev/null @@ -1 +0,0 @@ -# local sysctl settings can be stored in this directory diff --git a/package/base-files/files/etc/uci-defaults/11_migrate-sysctl b/package/base-files/files/etc/uci-defaults/11_migrate-sysctl deleted file mode 100644 index 464e27577..000000000 --- a/package/base-files/files/etc/uci-defaults/11_migrate-sysctl +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/sh - -if [ ! -f "/rom/etc/sysctl.conf" ] || cmp -s "/rom/etc/sysctl.conf" "/etc/sysctl.conf"; then - exit 0 -fi - -fingerprint="$(md5sum /etc/sysctl.conf)" -fingerprint="${fingerprint%% *}" - -if [ "$fingerprint" = "1b05ebb41f72cb84e5510573cd4aca26" ] || \ - [ "$fingerprint" = "62deb895be1a7f496040187b7c930e4e" ]; then - logger -t migrate-sysctl "Updating sysctl.conf to use current defaults" - cp "/rom/etc/sysctl.conf" "/etc/sysctl.conf" -fi - -exit 0 diff --git a/package/base-files/files/lib/functions.sh b/package/base-files/files/lib/functions.sh index dfadfdb2d..197aef10e 100755 --- a/package/base-files/files/lib/functions.sh +++ b/package/base-files/files/lib/functions.sh @@ -153,16 +153,6 @@ config_list_foreach() { done } -insert_modules() { - for m in $*; do - if [ -f /etc/modules.d/$m ]; then - sed 's/^[^#]/insmod &/' /etc/modules.d/$m | ash 2>&- || : - else - modprobe $m - fi - done -} - default_prerm() { local root="${IPKG_INSTROOT}" local name diff --git a/package/base-files/files/lib/functions/leds.sh b/package/base-files/files/lib/functions/leds.sh index 83e775fad..8a1d21cae 100644 --- a/package/base-files/files/lib/functions/leds.sh +++ b/package/base-files/files/lib/functions/leds.sh @@ -8,7 +8,9 @@ get_dt_led() { local nodepath="$basepath/aliases/led-$1" [ -f "$nodepath" ] && ledpath=$(cat "$nodepath") - [ -n "$ledpath" ] && label=$(cat "$basepath$ledpath/label") + [ -n "$ledpath" ] && \ + label=$(cat "$basepath$ledpath/label" 2>/dev/null) || \ + label=$(cat "$basepath$ledpath/chan-name" 2>/dev/null) echo "$label" } diff --git a/package/base-files/files/lib/functions/system.sh b/package/base-files/files/lib/functions/system.sh index 35f6d10fd..d4402c3a1 100644 --- a/package/base-files/files/lib/functions/system.sh +++ b/package/base-files/files/lib/functions/system.sh @@ -1,5 +1,17 @@ # Copyright (C) 2006-2013 OpenWrt.org +get_mac_binary() { + local path="$1" + local offset="$2" + + if [ -z "$path" ]; then + echo "get_mac_binary: file $path not found!" >&2 + return + fi + + hexdump -v -n 6 -s $offset -e '5/1 "%02x:" 1/1 "%02x"' $path 2>/dev/null +} + find_mtd_chardev() { local INDEX=$(find_mtd_index "$1") local PREFIX=/dev/mtd @@ -33,12 +45,7 @@ mtd_get_mac_binary() { local part part=$(find_mtd_part "$mtdname") - if [ -z "$part" ]; then - echo "mtd_get_mac_binary: partition $mtdname not found!" >&2 - return - fi - - hexdump -v -n 6 -s $offset -e '5/1 "%02x:" 1/1 "%02x"' $part 2>/dev/null + get_mac_binary "$part" "$offset" } mtd_get_mac_binary_ubi() { diff --git a/package/base-files/files/lib/upgrade/common.sh b/package/base-files/files/lib/upgrade/common.sh index 1c755cf61..5f5c9dc8a 100644 --- a/package/base-files/files/lib/upgrade/common.sh +++ b/package/base-files/files/lib/upgrade/common.sh @@ -101,7 +101,7 @@ get_magic_long() { } export_bootdevice() { - local cmdline uuid disk uevent + local cmdline uuid disk uevent line local MAJOR MINOR DEVNAME DEVTYPE if read cmdline < /proc/cmdline; then @@ -117,24 +117,6 @@ export_bootdevice() { esac case "$disk" in - PARTUUID=[A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9]-[A-F0-9][A-F0-9][A-F0-9][A-F0-9]-[A-F0-9][A-F0-9][A-F0-9][A-F0-9]-[A-F0-9][A-F0-9][A-F0-9][A-F0-9]-[A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9][A-F0-9]0002) - uuid="${disk#PARTUUID=}" - uuid="${uuid%0002}0002" - for disk in $(find /dev -type b); do - set -- $(dd if=$disk bs=1 skip=$((2*51225612816)) count=16 2>/dev/null | hexdump -v -e '4/1 "%02x"' | awk '{ \ - for(i=1;i<9;i=i2) first=substr($0,i,1) substr($0,i1,1) first; \ - for(i=9;i<13;i=i2) second=substr($0,i,1) substr($0,i1,1) second; \ - for(i=13;i<16;i=i2) third=substr($0,i,1) substr($0,i1,1) third; \ - fourth = substr($0,17,4); \ - five = substr($0,21,12); \ - } END { print toupper(first"-"second"-"third"-"fourth"-"five) }') - if [ "$1" = "$uuid" ]; then - uevent="/sys/class/block/${disk##*/}/uevent" - export SAVE_PARTITIONS=0 - break - fi - done -;; PARTUUID=[a-f0-9][a-f0-9][a-f0-9][a-f0-9][a-f0-9][a-f0-9][a-f0-9][a-f0-9]-02) uuid="${disk#PARTUUID=}" uuid="${uuid%-02}" @@ -152,8 +134,9 @@ export_bootdevice() { esac if [ -e "$uevent" ]; then - . "$uevent" - + while read line; do + export -n "$line" + done < "$uevent" export BOOTDEV_MAJOR=$MAJOR export BOOTDEV_MINOR=$MINOR return 0 @@ -165,10 +148,12 @@ export_bootdevice() { export_partdevice() { local var="$1" offset="$2" - local uevent MAJOR MINOR DEVNAME DEVTYPE + local uevent line MAJOR MINOR DEVNAME DEVTYPE for uevent in /sys/class/block/*/uevent; do - . "$uevent" + while read line; do + export -n "$line" + done < "$uevent" if [ $BOOTDEV_MAJOR = $MAJOR -a $(($BOOTDEV_MINOR + $offset)) = $MINOR -a -b "/dev/$DEVNAME" ]; then export "$var=$DEVNAME" return 0 diff --git a/package/base-files/files/sbin/sysupgrade b/package/base-files/files/sbin/sysupgrade index c747c4eaa..bf5428af2 100755 --- a/package/base-files/files/sbin/sysupgrade +++ b/package/base-files/files/sbin/sysupgrade @@ -96,12 +96,31 @@ EOF # prevent messages from clobbering the tarball when using stdout [ "$CONF_BACKUP" = "-" ] && export VERBOSE=0 + +list_conffiles() { + awk ' + BEGIN { conffiles = 0 } + /^Conffiles:/ { conffiles = 1; next } + !/^ / { conffiles = 0; next } + conffiles == 1 { print } + ' /usr/lib/opkg/status +} + +list_changed_conffiles() { + # Cannot handle spaces in filenames - but opkg cannot either... + list_conffiles | while read file csum; do + [ -r "$file" ] || continue + + echo "${csum} ${file}" | sha256sum -sc - || echo "$file" + done +} + add_uci_conffiles() { local file="$1" ( find $(sed -ne '/^[[:space:]]*$/d; /^#/d; p' \ /etc/sysupgrade.conf /lib/upgrade/keep.d/* 2>/dev/null) \ -type f -o -type l 2>/dev/null; - opkg list-changed-conffiles ) | sort -u > "$file" + list_changed_conffiles ) | sort -u > "$file" return 0 } diff --git a/package/boot/arm-trusted-firmware-sunxi/Makefile b/package/boot/arm-trusted-firmware-sunxi/Makefile index 88d4f6efa..d2554f4eb 100644 --- a/package/boot/arm-trusted-firmware-sunxi/Makefile +++ b/package/boot/arm-trusted-firmware-sunxi/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/apritzel/arm-trusted-firmware -PKG_SOURCE_DATE:=2016-07-12 -PKG_SOURCE_VERSION:=87e8aedd80e6448a55b2328768d956fcb5f5d410 -PKG_MIRROR_HASH:=4e71a7d4bc0613533854c646b0fa574b18503c0ab28621aac67c70b9827562d8 +PKG_SOURCE_DATE:=2018-02-04 +PKG_SOURCE_VERSION:=ae78724247a01560164d607ed66db111c74d8df0 +PKG_MIRROR_HASH:=e4ddc3294f86c1e163d683a2322427bbdd5b63762ead4b1792b34df75d7bda28 PKG_LICENSE:=BSD-3-Clause PKG_LICENSE_FILES:=license.md @@ -38,12 +38,11 @@ MAKE_VARS = \ MAKE_FLAGS += \ PLAT=sun50iw1p1 \ - DEBUG=1 \ bl31 define Build/InstallDev $(INSTALL_DIR) $(STAGING_DIR_IMAGE) - $(CP) $(PKG_BUILD_DIR)/build/sun50iw1p1/debug/bl31.bin $(STAGING_DIR_IMAGE)/bl31.bin + $(CP) $(PKG_BUILD_DIR)/build/sun50iw1p1/release/bl31.bin $(STAGING_DIR_IMAGE)/bl31.bin endef define Package/arm-trusted-firmware-sunxi/install diff --git a/package/boot/at91bootstrap/at91bootstrap.mk b/package/boot/at91bootstrap/at91bootstrap.mk index dda5fa4e9..92353ff96 100644 --- a/package/boot/at91bootstrap/at91bootstrap.mk +++ b/package/boot/at91bootstrap/at91bootstrap.mk @@ -26,7 +26,7 @@ TARGET_DEP = TARGET_$(BUILD_TARGET)$(if $(BUILD_SUBTARGET),_$(BUILD_SUBTARGET)) AT91BOOTSTRAP_MAKE_FLAGS = \ HOSTCC="$(HOSTCC)" \ - HOSTCFLAGS='$(HOST_CFLAGS) $$$$(HOSTCPPFLAGS)' \ + HOSTCFLAGS="$(HOST_CFLAGS) $(HOST_CPPFLAGS)" \ HOSTLDFLAGS="" define Build/AT91Bootstrap/Target diff --git a/package/boot/grub2/common.mk b/package/boot/grub2/Makefile similarity index 55% rename from package/boot/grub2/common.mk rename to package/boot/grub2/Makefile index 0f528f0b6..b2ae17156 100644 --- a/package/boot/grub2/common.mk +++ b/package/boot/grub2/Makefile @@ -1,24 +1,34 @@ +# +# Copyright (C) 2006-2015 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=grub +PKG_CPE_ID:=cpe:/a:gnu:grub2 PKG_VERSION:=2.02 PKG_RELEASE:=1 -PKG_SOURCE:=grub-$(PKG_VERSION).tar.xz +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@GNU/grub PKG_HASH:=810b3798d316394f94096ec2797909dbf23c858e48f7b3830826b8daa06b7b0f PKG_FIXUP:=autoreconf HOST_BUILD_PARALLEL:=1 +PKG_BUILD_DEPENDS:=grub2/host PKG_SSP:=0 PKG_FLAGS:=nonshared -PATCH_DIR := ../patches -HOST_PATCH_DIR := ../patches - include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/package.mk -define Package/grub2/Default +define Package/grub2 CATEGORY:=Boot Loaders SECTION:=boot TITLE:=GRand Unified Bootloader @@ -26,6 +36,19 @@ define Package/grub2/Default DEPENDS:=@TARGET_x86||TARGET_x86_64 endef +define Package/grub2-editenv + CATEGORY:=Utilities + SECTION:=utils + SUBMENU:=Boot Loaders + TITLE:=Grub2 Environment editor + URL:=http://www.gnu.org/software/grub/ + DEPENDS:=@TARGET_x86||TARGET_x86_64 +endef + +define Package/grub2-editenv/description + Edit grub2 environment files. +endef + HOST_BUILD_PREFIX := $(STAGING_DIR_HOST) CONFIGURE_VARS += \ @@ -37,7 +60,8 @@ CONFIGURE_ARGS += \ --disable-nls \ --disable-device-mapper \ --disable-libzfs \ - --disable-grub-mkfont + --disable-grub-mkfont \ + --with-platform=none HOST_CONFIGURE_VARS += \ grub_build_mkfont_excuse="don't want fonts" @@ -59,3 +83,11 @@ define Host/Configure $(Host/Configure/Default) endef +define Package/grub2-editenv/install + $(INSTALL_DIR) $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/grub-editenv $(1)/usr/sbin/ +endef + +$(eval $(call HostBuild)) +$(eval $(call BuildPackage,grub2)) +$(eval $(call BuildPackage,grub2-editenv)) diff --git a/package/boot/grub2/grub2-efi/Makefile b/package/boot/grub2/grub2-efi/Makefile deleted file mode 100644 index 37e0b353e..000000000 --- a/package/boot/grub2/grub2-efi/Makefile +++ /dev/null @@ -1,22 +0,0 @@ -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_NAME:=grub-efi - -include ../common.mk - -TAR_OPTIONS:= --transform 's/grub-${PKG_VERSION}/${PKG_NAME}-${PKG_VERSION}/' $(TAR_OPTIONS) - -PKG_BUILD_DEPENDS:=grub2-efi/host - -CONFIGURE_ARGS += --with-platform=efi -HOST_CONFIGURE_ARGS += --with-platform=efi --program-suffix=-efi - -define Package/grub2-efi -$(call Package/grub2/Default) -HIDDEN:=1 -TITLE += (with EFI support) -endef - -$(eval $(call HostBuild)) -$(eval $(call BuildPackage,grub2-efi)) diff --git a/package/boot/grub2/grub2/Makefile b/package/boot/grub2/grub2/Makefile deleted file mode 100644 index c00797662..000000000 --- a/package/boot/grub2/grub2/Makefile +++ /dev/null @@ -1,33 +0,0 @@ -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_NAME:=grub - -include ../common.mk - -PKG_BUILD_DEPENDS:=grub2/host - -define Package/grub2 -$(call Package/grub2/Default) -endef - -define Package/grub2-editenv - CATEGORY:=Utilities - SECTION:=utils - TITLE:=Grub2 Environment editor - URL:=http://www.gnu.org/software/grub/ - DEPENDS:=@TARGET_x86||TARGET_x86_64 -endef - -define Package/grub2-editenv/description - Edit grub2 environment files. -endef - -define Package/grub2-editenv/install - $(INSTALL_DIR) $(1)/usr/sbin - $(INSTALL_BIN) $(PKG_BUILD_DIR)/grub-editenv $(1)/usr/sbin/ -endef - -$(eval $(call HostBuild)) -$(eval $(call BuildPackage,grub2)) -$(eval $(call BuildPackage,grub2-editenv)) diff --git a/package/boot/kexec-tools/Makefile b/package/boot/kexec-tools/Makefile index 1c686a254..76ea46f10 100644 --- a/package/boot/kexec-tools/Makefile +++ b/package/boot/kexec-tools/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=kexec-tools -PKG_VERSION:=2.0.14 +PKG_VERSION:=2.0.16 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@KERNEL/linux/utils/kernel/kexec -PKG_HASH:=ffb2e7e99d9d08754c6bc1922aed3c000094f318665d82a72ecc76c4ff1c0dc6 +PKG_HASH:=5b103351ad752c9badd1d65b00eb6de4bce579f944f4df4e3ef3a755ba567010 PKG_FIXUP:=autoreconf diff --git a/package/boot/kexec-tools/files/kdump.init b/package/boot/kexec-tools/files/kdump.init index 057b8cc17..6a6a94c07 100755 --- a/package/boot/kexec-tools/files/kdump.init +++ b/package/boot/kexec-tools/files/kdump.init @@ -43,8 +43,10 @@ run_kdump() { timestamp=$(date "+%Y%m%dT%H%M%S") if [ "$save_vmcore" -eq 1 ]; then + echo -n "Saving vmcore (this may take a while)..." # would like 'sparse' but busybox doesn't support it dd if=/proc/vmcore of="$path/vmcore-$timestamp" conv=fsync bs=1M + echo " done" fi if [ "$save_dmesg" -eq 1 ]; then diff --git a/package/boot/kexec-tools/patches/100-format_string_fix.patch b/package/boot/kexec-tools/patches/100-format_string_fix.patch deleted file mode 100644 index 601121bcc..000000000 --- a/package/boot/kexec-tools/patches/100-format_string_fix.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/kexec/arch/i386/kexec-elf-x86.c -+++ b/kexec/arch/i386/kexec-elf-x86.c -@@ -296,6 +296,6 @@ out: - free(command_line); - free(modified_cmdline); - if (error_msg) -- die(error_msg); -+ die("%s", error_msg); - return result; - } ---- a/kexec/arch/x86_64/kexec-elf-x86_64.c -+++ b/kexec/arch/x86_64/kexec-elf-x86_64.c -@@ -276,6 +276,6 @@ out: - free(command_line); - free(modified_cmdline); - if (error_msg) -- die(error_msg); -+ die("%s", error_msg); - return result; - } diff --git a/package/boot/kexec-tools/patches/110-fix-vmcore-dmsg-compilation-error.patch b/package/boot/kexec-tools/patches/110-fix-vmcore-dmsg-compilation-error.patch deleted file mode 100644 index 0cf2d3ebb..000000000 --- a/package/boot/kexec-tools/patches/110-fix-vmcore-dmsg-compilation-error.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/vmcore-dmesg/vmcore-dmesg.c -+++ b/vmcore-dmesg/vmcore-dmesg.c -@@ -1,6 +1,8 @@ - #define _XOPEN_SOURCE 600 - #define _LARGEFILE_SOURCE 1 - #define _FILE_OFFSET_BITS 64 -+#define _GNU_SOURCE -+ - #include - #include - #include diff --git a/package/boot/kexec-tools/patches/120-fail-to-get-symbol-debug.patch b/package/boot/kexec-tools/patches/120-fail-to-get-symbol-debug.patch deleted file mode 100644 index d80c6db84..000000000 --- a/package/boot/kexec-tools/patches/120-fail-to-get-symbol-debug.patch +++ /dev/null @@ -1,33 +0,0 @@ -commit 263e45ccf27b21e9862cc538ed28978533d04e4b -Author: Baoquan He -Date: Fri Mar 3 11:52:15 2017 +0800 - - Only print debug message when failed to serach for kernel symbol from /proc/kallsyms - - Kernel symbol page_offset_base could be unavailable when mm KASLR code is - not compiled in kernel. It's inappropriate to print out error message - when failed to search for page_offset_base from /proc/kallsyms. Seems now - there is not a way to find out if mm KASLR is compiled in or not. An - alternative approach is only printing out debug message in get_kernel_sym - if failed to search a expected kernel symbol. - - Do it in this patch, a simple fix. - - Signed-off-by: Baoquan He - Reviewed-by: Pratyush Anand - Acked-by: Dave Young - Signed-off-by: Simon Horman - -diff --git a/kexec/arch/i386/crashdump-x86.c b/kexec/arch/i386/crashdump-x86.c -index 88aeee3..c4cf201 100644 ---- a/kexec/arch/i386/crashdump-x86.c -+++ b/kexec/arch/i386/crashdump-x86.c -@@ -127,7 +127,7 @@ static unsigned long long get_kernel_sym(const char *symbol) - } - } - -- fprintf(stderr, "Cannot get kernel %s symbol address\n", symbol); -+ dbgprintf("Cannot get kernel %s symbol address\n", symbol); - return 0; - } - diff --git a/package/boot/kexec-tools/patches/130-dont-use-percentL.patch b/package/boot/kexec-tools/patches/130-dont-use-percentL.patch deleted file mode 100644 index 70a6873cd..000000000 --- a/package/boot/kexec-tools/patches/130-dont-use-percentL.patch +++ /dev/null @@ -1,178 +0,0 @@ -commit f14881e87b1426d2c439e2fad9a1e03a3b35e196 -Author: Philip Prindeville -Date: Fri Mar 10 19:57:11 2017 -0700 - - Don't use %L width specifier with integer values - - MUSL doesn't support %L except for floating-point arguments; therefore, - %ll must be used instead with integer arguments. - - Signed-off-by: Philip Prindeville - -diff --git a/kexec/arch/arm/kexec-arm.c b/kexec/arch/arm/kexec-arm.c -index 2194b7c..49f35b1 100644 ---- a/kexec/arch/arm/kexec-arm.c -+++ b/kexec/arch/arm/kexec-arm.c -@@ -47,7 +47,7 @@ int get_memory_ranges(struct memory_range **range, int *ranges, - int count; - if (memory_ranges >= MAX_MEMORY_RANGES) - break; -- count = sscanf(line, "%Lx-%Lx : %n", -+ count = sscanf(line, "%llx-%llx : %n", - &start, &end, &consumed); - if (count != 2) - continue; -diff --git a/kexec/arch/i386/crashdump-x86.c b/kexec/arch/i386/crashdump-x86.c -index c4cf201..285dea9 100644 ---- a/kexec/arch/i386/crashdump-x86.c -+++ b/kexec/arch/i386/crashdump-x86.c -@@ -119,7 +119,7 @@ static unsigned long long get_kernel_sym(const char *symbol) - } - - while(fgets(line, sizeof(line), fp) != NULL) { -- if (sscanf(line, "%Lx %c %s", &vaddr, &type, sym) != 3) -+ if (sscanf(line, "%llx %c %s", &vaddr, &type, sym) != 3) - continue; - if (strcmp(sym, symbol) == 0) { - dbgprintf("kernel symbol %s vaddr = %16llx\n", symbol, vaddr); -@@ -296,12 +296,12 @@ static int get_crash_memory_ranges(struct memory_range **range, int *ranges, - - if (memory_ranges >= CRASH_MAX_MEMORY_RANGES) - break; -- count = sscanf(line, "%Lx-%Lx : %n", -+ count = sscanf(line, "%llx-%llx : %n", - &start, &end, &consumed); - if (count != 2) - continue; - str = line + consumed; -- dbgprintf("%016Lx-%016Lx : %s", -+ dbgprintf("%016llx-%016llx : %s", - start, end, str); - /* Only Dumping memory of type System RAM. */ - if (memcmp(str, "System RAM\n", 11) == 0) { -@@ -778,7 +778,7 @@ static int get_crash_notes(int cpu, uint64_t *addr, uint64_t *len) - *addr = x86__pa(vaddr + (cpu * MAX_NOTE_BYTES)); - *len = MAX_NOTE_BYTES; - -- dbgprintf("crash_notes addr = %Lx\n", -+ dbgprintf("crash_notes addr = %llx\n", - (unsigned long long)*addr); - - fclose(fp); -diff --git a/kexec/arch/i386/kexec-x86-common.c b/kexec/arch/i386/kexec-x86-common.c -index 3e97239..be03618 100644 ---- a/kexec/arch/i386/kexec-x86-common.c -+++ b/kexec/arch/i386/kexec-x86-common.c -@@ -81,7 +81,7 @@ static int get_memory_ranges_proc_iomem(struct memory_range **range, int *ranges - int count; - if (memory_ranges >= MAX_MEMORY_RANGES) - break; -- count = sscanf(line, "%Lx-%Lx : %n", -+ count = sscanf(line, "%llx-%llx : %n", - &start, &end, &consumed); - if (count != 2) - continue; -diff --git a/kexec/arch/ia64/kexec-elf-rel-ia64.c b/kexec/arch/ia64/kexec-elf-rel-ia64.c -index 7f7c08c..500f247 100644 ---- a/kexec/arch/ia64/kexec-elf-rel-ia64.c -+++ b/kexec/arch/ia64/kexec-elf-rel-ia64.c -@@ -155,6 +155,6 @@ void machine_apply_elf_rel(struct mem_ehdr *ehdr, - } - return; - overflow: -- die("overflow in relocation type %lu val %Lx\n", -+ die("overflow in relocation type %lu val %llx\n", - r_type, value); - } -diff --git a/kexec/arch/mips/crashdump-mips.c b/kexec/arch/mips/crashdump-mips.c -index 9c33599..6308ec8 100644 ---- a/kexec/arch/mips/crashdump-mips.c -+++ b/kexec/arch/mips/crashdump-mips.c -@@ -173,7 +173,7 @@ static int get_crash_memory_ranges(struct memory_range **range, int *ranges) - int type, consumed, count; - if (memory_ranges >= CRASH_MAX_MEMORY_RANGES) - break; -- count = sscanf(line, "%Lx-%Lx : %n", -+ count = sscanf(line, "%llx-%llx : %n", - &start, &end, &consumed); - if (count != 2) - continue; -diff --git a/kexec/arch/mips/kexec-mips.c b/kexec/arch/mips/kexec-mips.c -index ee3cd3a..2e5b700 100644 ---- a/kexec/arch/mips/kexec-mips.c -+++ b/kexec/arch/mips/kexec-mips.c -@@ -48,7 +48,7 @@ int get_memory_ranges(struct memory_range **range, int *ranges, - while (fgets(line, sizeof(line), fp) != 0) { - if (memory_ranges >= MAX_MEMORY_RANGES) - break; -- count = sscanf(line, "%Lx-%Lx : %n", &start, &end, &consumed); -+ count = sscanf(line, "%llx-%llx : %n", &start, &end, &consumed); - if (count != 2) - continue; - str = line + consumed; -diff --git a/kexec/arch/s390/kexec-s390.c b/kexec/arch/s390/kexec-s390.c -index f863483..33ba6b9 100644 ---- a/kexec/arch/s390/kexec-s390.c -+++ b/kexec/arch/s390/kexec-s390.c -@@ -170,7 +170,7 @@ int get_memory_ranges_s390(struct memory_range memory_range[], int *ranges, - if (current_range == MAX_MEMORY_RANGES) - break; - -- sscanf(line,"%Lx-%Lx : %n", &start, &end, &cons); -+ sscanf(line,"%llx-%llx : %n", &start, &end, &cons); - str = line+cons; - if ((memcmp(str, sys_ram, strlen(sys_ram)) == 0) || - ((memcmp(str, crash_kernel, strlen(crash_kernel)) == 0) && -diff --git a/kexec/crashdump.c b/kexec/crashdump.c -index 15c1105..0b363c5 100644 ---- a/kexec/crashdump.c -+++ b/kexec/crashdump.c -@@ -98,7 +98,7 @@ int get_crash_notes_per_cpu(int cpu, uint64_t *addr, uint64_t *len) - } - if (!fgets(line, sizeof(line), fp)) - die("Cannot parse %s: %s\n", crash_notes, strerror(errno)); -- count = sscanf(line, "%Lx", &temp); -+ count = sscanf(line, "%llx", &temp); - if (count != 1) - die("Cannot parse %s: %s\n", crash_notes, strerror(errno)); - *addr = (uint64_t) temp; -@@ -112,7 +112,7 @@ int get_crash_notes_per_cpu(int cpu, uint64_t *addr, uint64_t *len) - if (!fgets(line, sizeof(line), fp)) - die("Cannot parse %s: %s\n", - crash_notes_size, strerror(errno)); -- count = sscanf(line, "%Lu", &temp); -+ count = sscanf(line, "%llu", &temp); - if (count != 1) - die("Cannot parse %s: %s\n", - crash_notes_size, strerror(errno)); -@@ -120,7 +120,7 @@ int get_crash_notes_per_cpu(int cpu, uint64_t *addr, uint64_t *len) - fclose(fp); - } - -- dbgprintf("%s: crash_notes addr = %Lx, size = %Lu\n", __FUNCTION__, -+ dbgprintf("%s: crash_notes addr = %llx, size = %llu\n", __FUNCTION__, - (unsigned long long)*addr, (unsigned long long)*len); - - return 0; -@@ -141,7 +141,7 @@ static int get_vmcoreinfo(const char *kdump_info, uint64_t *addr, uint64_t *len) - - if (!fgets(line, sizeof(line), fp)) - die("Cannot parse %s: %s\n", kdump_info, strerror(errno)); -- count = sscanf(line, "%Lx %Lx", &temp, &temp2); -+ count = sscanf(line, "%llx %llx", &temp, &temp2); - if (count != 2) - die("Cannot parse %s: %s\n", kdump_info, strerror(errno)); - -diff --git a/kexec/kexec-iomem.c b/kexec/kexec-iomem.c -index 485a2e8..7ec3853 100644 ---- a/kexec/kexec-iomem.c -+++ b/kexec/kexec-iomem.c -@@ -44,7 +44,7 @@ int kexec_iomem_for_each_line(char *match, - die("Cannot open %s\n", iomem); - - while(fgets(line, sizeof(line), fp) != 0) { -- count = sscanf(line, "%Lx-%Lx : %n", &start, &end, &consumed); -+ count = sscanf(line, "%llx-%llx : %n", &start, &end, &consumed); - if (count != 2) - continue; - str = line + consumed; diff --git a/package/boot/uboot-envtools/Config.in b/package/boot/uboot-envtools/Config.in deleted file mode 100644 index 8f0078f05..000000000 --- a/package/boot/uboot-envtools/Config.in +++ /dev/null @@ -1,9 +0,0 @@ -config UBOOT_ENVTOOLS_UBI - bool "Support environment in UBI volume" - depends on PACKAGE_uboot-envtools - default TARGET_oxnas - help - Add support for reading and writing U-Boot environment - stored in UBI volume(s). - - Increases binary size by about 8 kB diff --git a/package/boot/uboot-envtools/Makefile b/package/boot/uboot-envtools/Makefile index 57a2ec539..8de6455b1 100644 --- a/package/boot/uboot-envtools/Makefile +++ b/package/boot/uboot-envtools/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=uboot-envtools PKG_DISTNAME:=u-boot -PKG_VERSION:=2015.10 +PKG_VERSION:=2018.03 PKG_RELEASE:=1 PKG_BUILD_DIR:=$(BUILD_DIR)/u-boot-$(PKG_VERSION) @@ -17,7 +17,7 @@ PKG_SOURCE:=$(PKG_DISTNAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=\ http://mirror2.openwrt.org/sources \ ftp://ftp.denx.de/pub/u-boot -PKG_HASH:=bdc68d5f9455ad933b059c735d983f2c8b6b552dafb062e5ff1444f623021955 +PKG_HASH:=7e7477534409d5368eb1371ffde6820f0f79780a1a1f676161c48442cb303dfd PKG_BUILD_DEPENDS:=fstools @@ -42,13 +42,10 @@ define Package/uboot-envtools/description This package includes tools to read and modify U-Boot bootloader environment. endef -define Package/uboot-envtools/config - source "$(SOURCE)/Config.in" -endef - define Build/Configure - touch $(PKG_BUILD_DIR)/include/config.mk touch $(PKG_BUILD_DIR)/include/config.h + mkdir -p $(PKG_BUILD_DIR)/include/config + touch $(PKG_BUILD_DIR)/include/config/auto.conf mkdir -p $(PKG_BUILD_DIR)/include/generated touch $(PKG_BUILD_DIR)/include/generated/autoconf.h endef @@ -59,10 +56,9 @@ define Build/Compile $(MAKE) -C $(PKG_BUILD_DIR) \ CROSS_COMPILE="$(TARGET_CROSS)" \ TARGET_CFLAGS="$(TARGET_CFLAGS)" \ - UBI="$(CONFIG_UBOOT_ENVTOOLS_UBI)" \ - dot-config=0 \ HOSTLDFLAGS= \ - env + no-dot-config-targets=envtools \ + envtools endef define Package/uboot-envtools/conffiles @@ -76,50 +72,11 @@ define Package/uboot-envtools/install $(LN) fw_printenv $(1)/usr/sbin/fw_setenv $(INSTALL_DIR) $(1)/lib $(INSTALL_DATA) ./files/uboot-envtools.sh $(1)/lib -ifneq ($(CONFIG_TARGET_ar71xx),) $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/ar71xx $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_cns3xxx),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/cns3xxx $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_imx6),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/imx6 $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_ipq806x),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/ipq $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_kirkwood),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/kirkwood $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_lantiq),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/lantiq $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_mvebu),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_BIN) ./files/mvebu $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_mxs),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_BIN) ./files/mxs $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_oxnas),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_BIN) ./files/oxnas $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_pistachio),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/pistachio $(1)/etc/uci-defaults/30_uboot-envtools -endif -ifneq ($(CONFIG_TARGET_ramips),) - $(INSTALL_DIR) $(1)/etc/uci-defaults - $(INSTALL_DATA) ./files/ramips $(1)/etc/uci-defaults/30_uboot-envtools -endif + $(if $(wildcard ./files/$(BOARD)), \ + $(INSTALL_DATA) ./files/$(BOARD) \ + $(1)/etc/uci-defaults/30_uboot-envtools \ + ) endef $(eval $(call BuildPackage,uboot-envtools)) diff --git a/package/boot/uboot-envtools/files/ar71xx b/package/boot/uboot-envtools/files/ar71xx index 66eaeb0df..516042e91 100644 --- a/package/boot/uboot-envtools/files/ar71xx +++ b/package/boot/uboot-envtools/files/ar71xx @@ -28,6 +28,9 @@ cpe830|\ cpe870|\ cr3000|\ cr5000|\ +e1700ac-v2|\ +e600g-v2|\ +e600gac-v2|\ eap300v2|\ ens202ext|\ gl-ar300m|\ @@ -48,8 +51,11 @@ om5p-ac|\ om5p-acv2|\ om5p-an|\ r36a|\ +rme-eg200|\ sr3200|\ +t830|\ tube2h|\ +wam250|\ wndr3700|\ xd3200) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000" diff --git a/package/boot/uboot-envtools/files/ipq40xx b/package/boot/uboot-envtools/files/ipq40xx new file mode 100644 index 000000000..4eae506fb --- /dev/null +++ b/package/boot/uboot-envtools/files/ipq40xx @@ -0,0 +1,42 @@ +#!/bin/sh +# +# Copyright (C) 2016 LEDE +# + +[ -e /etc/config/ubootenv ] && exit 0 + +touch /etc/config/ubootenv + +. /lib/uboot-envtools.sh +. /lib/functions.sh + +board=$(board_name) + +ubootenv_mtdinfo () { + UBOOTENV_PART=$(cat /proc/mtd | grep APPSBLENV) + mtd_dev=$(echo $UBOOTENV_PART | awk '{print $1}' | sed 's/:$//') + mtd_size=$(echo $UBOOTENV_PART | awk '{print "0x"$2}') + mtd_erase=$(echo $UBOOTENV_PART | awk '{print "0x"$3}') + nor_flash=$(find /sys/bus/spi/devices/*/mtd -name ${mtd_dev}) + + if [ -n "$nor_flash" ]; then + ubootenv_size=$mtd_size + else + # size is fixed to 0x40000 in u-boot + ubootenv_size=0x40000 + fi + + sectors=$(( $ubootenv_size / $mtd_erase )) + echo /dev/$mtd_dev 0x0 $ubootenv_size $mtd_erase $sectors +} + +case "$board" in +openmesh,a42) + ubootenv_add_uci_config "/dev/mtd5" "0x0" "0x10000" "0x10000" + ;; +esac + +config_load ubootenv +config_foreach ubootenv_add_app_config ubootenv + +exit 0 diff --git a/package/boot/uboot-envtools/files/ipq b/package/boot/uboot-envtools/files/ipq806x similarity index 93% rename from package/boot/uboot-envtools/files/ipq rename to package/boot/uboot-envtools/files/ipq806x index 441ba4837..4618aac89 100644 --- a/package/boot/uboot-envtools/files/ipq +++ b/package/boot/uboot-envtools/files/ipq806x @@ -34,9 +34,6 @@ case "$board" in linksys,ea8500) ubootenv_add_uci_config "/dev/mtd10" "0x0" "0x20000" "0x20000" ;; -openmesh,a42) - ubootenv_add_uci_config "/dev/mtd5" "0x0" "0x10000" "0x10000" - ;; qcom,ipq8064-ap148 |\ qcom,ipq8064-db149) ubootenv_add_uci_config $(ubootenv_mtdinfo) diff --git a/package/boot/uboot-envtools/files/mvebu b/package/boot/uboot-envtools/files/mvebu index e33830e0a..24ca6798e 100644 --- a/package/boot/uboot-envtools/files/mvebu +++ b/package/boot/uboot-envtools/files/mvebu @@ -22,6 +22,9 @@ armada-385-linksys-shelby) armada-385-linksys-rango) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" ;; +armada-385-turris-omnia) + ubootenv_add_uci_config "/dev/mtd0" "0xC0000" "0x10000" "0x40000" + ;; armada-xp-linksys-mamba) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x20000" ;; diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips index 6fee6e01f..f992f41bc 100644 --- a/package/boot/uboot-envtools/files/ramips +++ b/package/boot/uboot-envtools/files/ramips @@ -13,6 +13,10 @@ touch /etc/config/ubootenv board=$(board_name) case "$board" in +alfa-network,ac1200rm|\ +alfa-network,awusfree1) + ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x1000" + ;; all0239-3g|\ all0256n-4M|\ all0256n-8M|\ @@ -27,7 +31,6 @@ wsr-600|\ zbt-wg2626) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000" ;; -xiaomi,miwifi-r3|\ mir3g) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x20000" ;; diff --git a/package/boot/uboot-envtools/patches/001-compile.patch b/package/boot/uboot-envtools/patches/001-compile.patch index 170597976..f7ec9130d 100644 --- a/package/boot/uboot-envtools/patches/001-compile.patch +++ b/package/boot/uboot-envtools/patches/001-compile.patch @@ -2,7 +2,7 @@ +++ b/tools/env/Makefile @@ -10,6 +10,10 @@ # with "CC" here for the maximum code reuse of scripts/Makefile.host. - HOSTCC = $(CC) + override HOSTCC = $(CC) +ifneq ($(TARGET_CFLAGS),) +HOSTCFLAGS = $(TARGET_CFLAGS) diff --git a/package/boot/uboot-envtools/patches/200-fw_env_no_aes.patch b/package/boot/uboot-envtools/patches/200-fw_env_no_aes.patch deleted file mode 100644 index 9c8681ff4..000000000 --- a/package/boot/uboot-envtools/patches/200-fw_env_no_aes.patch +++ /dev/null @@ -1,38 +0,0 @@ ---- a/tools/env/fw_env.c -+++ b/tools/env/fw_env.c -@@ -246,7 +246,7 @@ int fw_printenv (int argc, char *argv[]) - int i, n_flag; - int rc = 0; - -- if (argc >= 2 && strcmp(argv[1], "-a") == 0) { -+ if (0 && argc >= 2 && strcmp(argv[1], "-a") == 0) { - if (argc < 3) { - fprintf(stderr, - "## Error: '-a' option requires AES key\n"); -@@ -325,7 +325,7 @@ int fw_printenv (int argc, char *argv[]) - int fw_env_close(void) - { - int ret; -- if (aes_flag) { -+ if (0 && aes_flag) { - ret = env_aes_cbc_crypt(environment.data, 1); - if (ret) { - fprintf(stderr, -@@ -1223,7 +1223,7 @@ int fw_env_open(void) - - crc0 = crc32 (0, (uint8_t *) environment.data, ENV_SIZE); - -- if (aes_flag) { -+ if (0 && aes_flag) { - ret = env_aes_cbc_crypt(environment.data, 0); - if (ret) - return ret; -@@ -1280,7 +1280,7 @@ int fw_env_open(void) - - crc1 = crc32 (0, (uint8_t *) redundant->data, ENV_SIZE); - -- if (aes_flag) { -+ if (0 && aes_flag) { - ret = env_aes_cbc_crypt(redundant->data, 0); - if (ret) - return ret; diff --git a/package/boot/uboot-envtools/patches/300-support-env-in-ubivol-chardev.patch b/package/boot/uboot-envtools/patches/300-support-env-in-ubivol-chardev.patch deleted file mode 100644 index 75d3804ed..000000000 --- a/package/boot/uboot-envtools/patches/300-support-env-in-ubivol-chardev.patch +++ /dev/null @@ -1,163 +0,0 @@ -From 6e2630a0fc872d0db34157972f6dc3941f6d66dd Mon Sep 17 00:00:00 2001 -From: Daniel Golle -Date: Mon, 19 May 2014 21:38:01 +0200 -Subject: [PATCH] tools/env: add support for env in ubi volume chardev - -Signed-off-by: Daniel Golle ---- - tools/env/Makefile | 5 ++++ - tools/env/fw_env.c | 76 +++++++++++++++++++++++++++++++++++++++++++++++------- - 2 files changed, 71 insertions(+), 10 deletions(-) - ---- a/tools/env/Makefile -+++ b/tools/env/Makefile -@@ -24,6 +24,13 @@ ifeq ($(MTD_VERSION),old) - HOST_EXTRACFLAGS += -DMTD_OLD - endif - -+ifeq ($(UBI),y) -+HOST_EXTRACFLAGS += -DUBI -+HOST_LOADLIBES = "-Wl,--gc-sections,-lubi-utils" -+else -+HOST_LOADLIBES = "-Wl,--gc-sections" -+endif -+ - always := fw_printenv - hostprogs-y := fw_printenv - ---- a/tools/env/fw_env.c -+++ b/tools/env/fw_env.c -@@ -31,6 +31,9 @@ - # include - #endif - -+#ifdef UBI -+# include -+#endif - #include "fw_env.h" - - #include -@@ -811,6 +814,11 @@ static int flash_write_buf (int dev, int - off_t top_of_range; /* end of the last block we may use */ - loff_t blockstart; /* running start of the current block - - MEMGETBADBLOCK needs 64 bits */ -+#ifdef UBI -+ libubi_t *libubi = NULL;/* pointer to libubi struct */ -+#else -+ void *libubi = NULL; -+#endif - int rc; - - /* -@@ -916,7 +924,30 @@ static int flash_write_buf (int dev, int - continue; - } - -- if (mtd_type != MTD_ABSENT) { -+#ifdef UBI -+ if (mtd_type == MTD_UBIVOLUME) { -+ struct ubi_vol_info volinfo; -+ libubi = libubi_open(); -+ if (libubi) -+ rc = ubi_get_vol_info(libubi, -+ DEVNAME(dev_current), &volinfo); -+ if (libubi && !rc) { -+ erasesize = volinfo.leb_size; -+ int leb = blockstart / erasesize; -+ if (volinfo.type != UBI_STATIC_VOLUME) -+ rc = ubi_leb_change_start(libubi, fd, -+ leb, erasesize); -+ else -+ rc = ubi_update_start(libubi, fd, -+ erasesize); -+ } -+ if (libubi && rc) { -+ libubi_close(libubi); -+ libubi = NULL; -+ } -+ } -+#endif -+ if (!libubi && mtd_type != MTD_ABSENT) { - erase.start = blockstart; - ioctl(fd, MEMUNLOCK, &erase); - /* These do not need an explicit erase cycle */ -@@ -933,7 +964,8 @@ static int flash_write_buf (int dev, int - fprintf (stderr, - "Seek error on %s: %s\n", - DEVNAME (dev), strerror (errno)); -- return -1; -+ processed = -1; -+ goto out; - } - - #ifdef DEBUG -@@ -943,10 +975,11 @@ static int flash_write_buf (int dev, int - if (write (fd, data + processed, erasesize) != erasesize) { - fprintf (stderr, "Write error on %s: %s\n", - DEVNAME (dev), strerror (errno)); -- return -1; -+ processed = -1; -+ goto out; - } - -- if (mtd_type != MTD_ABSENT) -+ if (!libubi && mtd_type != MTD_ABSENT) - ioctl(fd, MEMLOCK, &erase); - - processed += erasesize; -@@ -957,6 +990,11 @@ static int flash_write_buf (int dev, int - if (write_total > count) - free (data); - -+out: -+#ifdef UBI -+ if (libubi) -+ libubi_close(libubi); -+#endif - return processed; - } - -@@ -1068,12 +1106,8 @@ static int flash_read (int fd) - - if (S_ISCHR(st.st_mode)) { - rc = ioctl(fd, MEMGETINFO, &mtdinfo); -- if (rc < 0) { -- fprintf(stderr, "Cannot get MTD information for %s\n", -- DEVNAME(dev_current)); -- return -1; -- } -- if (mtdinfo.type != MTD_NORFLASH && -+ if (!rc && -+ mtdinfo.type != MTD_NORFLASH && - mtdinfo.type != MTD_NANDFLASH && - mtdinfo.type != MTD_DATAFLASH && - mtdinfo.type != MTD_UBIVOLUME) { -@@ -1081,6 +1115,28 @@ static int flash_read (int fd) - mtdinfo.type, DEVNAME(dev_current)); - return -1; - } -+#ifdef UBI -+ if (rc) { -+ libubi_t *libubi; -+ struct ubi_vol_info volinfo; -+ libubi = libubi_open(); -+ if (!libubi) -+ return -ENOMEM; -+ -+ rc = ubi_get_vol_info(libubi, DEVNAME(dev_current), -+ &volinfo); -+ if (rc) { -+ libubi_close(libubi); -+ return -ENODEV; -+ } -+ memset(&mtdinfo, 0, sizeof(mtdinfo)); -+ mtdinfo.type = MTD_UBIVOLUME; -+ mtdinfo.size = volinfo.data_bytes; -+ mtdinfo.erasesize = volinfo.leb_size; -+ mtdinfo.writesize = volinfo.leb_size; -+ libubi_close(libubi); -+ } -+#endif - } else { - memset(&mtdinfo, 0, sizeof(mtdinfo)); - mtdinfo.type = MTD_ABSENT; diff --git a/package/boot/uboot-envtools/patches/400-u-boot-2015.10-stdint.patch b/package/boot/uboot-envtools/patches/400-u-boot-2015.10-stdint.patch deleted file mode 100644 index 395674fd8..000000000 --- a/package/boot/uboot-envtools/patches/400-u-boot-2015.10-stdint.patch +++ /dev/null @@ -1,13 +0,0 @@ -diff -Naur u-boot-2015.10.orig/tools/env/fw_env.c u-boot-2015.10/tools/env/fw_env.c ---- u-boot-2015.10.orig/tools/env/fw_env.c 2016-06-24 12:42:31.152391850 +0200 -+++ u-boot-2015.10/tools/env/fw_env.c 2016-06-24 12:42:59.080391754 +0200 -@@ -21,7 +21,8 @@ - #include - #include - #include --#include -+#include -+#include - - #ifdef MTD_OLD - # include diff --git a/package/boot/uboot-fritz4040/Makefile b/package/boot/uboot-fritz4040/Makefile index 9f9b4e05f..77d6fdc3b 100644 --- a/package/boot/uboot-fritz4040/Makefile +++ b/package/boot/uboot-fritz4040/Makefile @@ -20,7 +20,7 @@ include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk define U-Boot/Default - BUILD_TARGET:=ipq806x + BUILD_TARGET:=ipq40xx UBOOT_IMAGE:=uboot-fritz4040.bin endef @@ -29,7 +29,7 @@ define U-Boot/fritz4040 endef UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes -UBOOT_MAKE_FLAGS += USE_PRIVATE_LIBGCC=yes +UBOOT_MAKE_FLAGS = USE_PRIVATE_LIBGCC=yes export DTC define Build/Configure @@ -37,6 +37,7 @@ define Build/Configure $(HOSTCC) -o $(PKG_BUILD_DIR)/fritz/lzma2eva $(PKG_BUILD_DIR)/fritz/src/lzma2eva.c -lz $(HOSTCC) -o $(PKG_BUILD_DIR)/fritz/tichksum $(PKG_BUILD_DIR)/fritz/src/tichksum.c ln -sf $(STAGING_DIR_HOST)/bin/lzma $(PKG_BUILD_DIR)/fritz + ln -sf compiler-gcc5.h $(PKG_BUILD_DIR)/include/linux/compiler-gcc7.h endef define Build/Compile diff --git a/package/boot/uboot-imx6/patches/101-gcc-compiler-linux-3-16.patch b/package/boot/uboot-imx6/patches/101-gcc-compiler-linux-3-16.patch new file mode 100644 index 000000000..7bc65b47f --- /dev/null +++ b/package/boot/uboot-imx6/patches/101-gcc-compiler-linux-3-16.patch @@ -0,0 +1,480 @@ +From fb8ffd7cfc68b3dc44e182356a207d784cb30b34 Mon Sep 17 00:00:00 2001 +From: Masahiro Yamada +Date: Thu, 4 Sep 2014 02:40:58 +0900 +Subject: compiler*.h: sync include/linux/compiler*.h with Linux 3.16 + +Copy them from Linux v3.16 tag. +My main motivation of this commit is to add compiler-clang.h. + +Signed-off-by: Masahiro Yamada +Cc: Jeroen Hofstee +--- + include/linux/compiler-clang.h | 12 ++++++ + include/linux/compiler-gcc.h | 57 ++++++++++++++++++-------- + include/linux/compiler-gcc3.h | 20 ++++----- + include/linux/compiler-gcc4.h | 59 +++++++++++++++++++-------- + include/linux/compiler-intel.h | 40 ++++++++++++++++++ + include/linux/compiler.h | 92 +++++++++++++++++++++++++++++++++++++++++- + 6 files changed, 236 insertions(+), 44 deletions(-) + create mode 100644 include/linux/compiler-clang.h + create mode 100644 include/linux/compiler-intel.h + +--- /dev/null ++++ b/include/linux/compiler-clang.h +@@ -0,0 +1,12 @@ ++#ifndef __LINUX_COMPILER_H ++#error "Please don't include directly, include instead." ++#endif ++ ++/* Some compiler specific definitions are overwritten here ++ * for Clang compiler ++ */ ++ ++#ifdef uninitialized_var ++#undef uninitialized_var ++#define uninitialized_var(x) x = *(&(x)) ++#endif +--- a/include/linux/compiler-gcc.h ++++ b/include/linux/compiler-gcc.h +@@ -5,6 +5,9 @@ + /* + * Common definitions for all gcc versions go here. + */ ++#define GCC_VERSION (__GNUC__ * 10000 \ ++ + __GNUC_MINOR__ * 100 \ ++ + __GNUC_PATCHLEVEL__) + + + /* Optimization barrier */ +@@ -34,9 +37,15 @@ + __asm__ ("" : "=r"(__ptr) : "0"(ptr)); \ + (typeof(ptr)) (__ptr + (off)); }) + ++/* Make the optimizer believe the variable can be manipulated arbitrarily. */ ++#define OPTIMIZER_HIDE_VAR(var) __asm__ ("" : "=r" (var) : "0" (var)) ++ ++#ifdef __CHECKER__ ++#define __must_be_array(arr) 0 ++#else + /* &a[0] degrades to a pointer: a different type from an array */ +-#define __must_be_array(a) \ +- BUILD_BUG_ON_ZERO(__builtin_types_compatible_p(typeof(a), typeof(&a[0]))) ++#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0])) ++#endif + + /* + * Force always-inline if the user requests it so via the .config, +@@ -44,15 +53,18 @@ + */ + #if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \ + !defined(CONFIG_OPTIMIZE_INLINING) || (__GNUC__ < 4) +-# define inline inline __attribute__((always_inline)) +-# define __inline__ __inline__ __attribute__((always_inline)) +-# define __inline __inline __attribute__((always_inline)) ++# define inline inline __attribute__((always_inline)) notrace ++# define __inline__ __inline__ __attribute__((always_inline)) notrace ++# define __inline __inline __attribute__((always_inline)) notrace ++#else ++/* A lot of inline functions can cause havoc with function tracing */ ++# define inline inline notrace ++# define __inline__ __inline__ notrace ++# define __inline __inline notrace + #endif + + #define __deprecated __attribute__((deprecated)) +-#ifndef __packed +-# define __packed __attribute__((packed)) +-#endif ++#define __packed __attribute__((packed)) + #define __weak __attribute__((weak)) + + /* +@@ -60,8 +72,12 @@ + * naked functions because then mcount is called without stack and frame pointer + * being set up and there is no chance to restore the lr register to the value + * before mcount was called. ++ * ++ * The asm() bodies of naked functions often depend on standard calling conventions, ++ * therefore they must be noinline and noclone. GCC 4.[56] currently fail to enforce ++ * this, so we must do so ourselves. See GCC PR44290. + */ +-#define __naked __attribute__((naked)) notrace ++#define __naked __attribute__((naked)) noinline __noclone notrace + + #define __noreturn __attribute__((noreturn)) + +@@ -75,13 +91,10 @@ + * would be. + * [...] + */ +-#ifndef __pure +-# define __pure __attribute__((pure)) +-#endif +-#ifndef __aligned +-# define __aligned(x) __attribute__((aligned(x))) +-#endif +-#define __printf(a,b) __attribute__((format(printf,a,b))) ++#define __pure __attribute__((pure)) ++#define __aligned(x) __attribute__((aligned(x))) ++#define __printf(a, b) __attribute__((format(printf, a, b))) ++#define __scanf(a, b) __attribute__((format(scanf, a, b))) + #define noinline __attribute__((noinline)) + #define __attribute_const__ __attribute__((__const__)) + #define __maybe_unused __attribute__((unused)) +@@ -91,3 +104,15 @@ + #define _gcc_header(x) __gcc_header(linux/compiler-gcc##x.h) + #define gcc_header(x) _gcc_header(x) + #include gcc_header(__GNUC__) ++ ++#if !defined(__noclone) ++#define __noclone /* not needed */ ++#endif ++ ++/* ++ * A trick to suppress uninitialized variable warning without generating any ++ * code ++ */ ++#define uninitialized_var(x) x = x ++ ++#define __always_inline inline __attribute__((always_inline)) +--- a/include/linux/compiler-gcc3.h ++++ b/include/linux/compiler-gcc3.h +@@ -2,20 +2,22 @@ + #error "Please don't include directly, include instead." + #endif + +-#if __GNUC_MINOR__ >= 3 ++#if GCC_VERSION < 30200 ++# error Sorry, your compiler is too old - please upgrade it. ++#endif ++ ++#if GCC_VERSION >= 30300 + # define __used __attribute__((__used__)) + #else + # define __used __attribute__((__unused__)) + #endif + +-#if __GNUC_MINOR__ >= 4 ++#if GCC_VERSION >= 30400 + #define __must_check __attribute__((warn_unused_result)) + #endif + +-/* +- * A trick to suppress uninitialized variable warning without generating any +- * code +- */ +-#define uninitialized_var(x) x = x +- +-#define __always_inline inline __attribute__((always_inline)) ++#ifdef CONFIG_GCOV_KERNEL ++# if GCC_VERSION < 30400 ++# error "GCOV profiling support for gcc versions below 3.4 not included" ++# endif /* __GNUC_MINOR__ */ ++#endif /* CONFIG_GCOV_KERNEL */ +--- a/include/linux/compiler-gcc4.h ++++ b/include/linux/compiler-gcc4.h +@@ -4,7 +4,7 @@ + + /* GCC 4.1.[01] miscompiles __weak */ + #ifdef __KERNEL__ +-# if __GNUC_MINOR__ == 1 && __GNUC_PATCHLEVEL__ <= 1 ++# if GCC_VERSION >= 40100 && GCC_VERSION <= 40101 + # error Your version of gcc miscompiles the __weak directive + # endif + #endif +@@ -12,17 +12,12 @@ + #define __used __attribute__((__used__)) + #define __must_check __attribute__((warn_unused_result)) + #define __compiler_offsetof(a,b) __builtin_offsetof(a,b) +-#ifndef __always_inline +-# define __always_inline inline __attribute__((always_inline)) +-#endif + +-/* +- * A trick to suppress uninitialized variable warning without generating any +- * code +- */ +-#define uninitialized_var(x) x = x ++#if GCC_VERSION >= 40100 && GCC_VERSION < 40600 ++# define __compiletime_object_size(obj) __builtin_object_size(obj, 0) ++#endif + +-#if __GNUC_MINOR__ >= 3 ++#if GCC_VERSION >= 40300 + /* Mark functions as cold. gcc will assume any path leading to a call + to them will be unlikely. This means a lot of manual unlikely()s + are unnecessary now for any paths leading to the usual suspects +@@ -38,8 +33,15 @@ + the kernel context */ + #define __cold __attribute__((__cold__)) + ++#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) + +-#if __GNUC_MINOR__ >= 5 ++#ifndef __CHECKER__ ++# define __compiletime_warning(message) __attribute__((warning(message))) ++# define __compiletime_error(message) __attribute__((error(message))) ++#endif /* __CHECKER__ */ ++#endif /* GCC_VERSION >= 40300 */ ++ ++#if GCC_VERSION >= 40500 + /* + * Mark a position in code as unreachable. This can be used to + * suppress control flow warnings after asm blocks that transfer +@@ -50,14 +52,37 @@ + * unreleased. Really, we need to have autoconf for the kernel. + */ + #define unreachable() __builtin_unreachable() +-#endif + ++/* Mark a function definition as prohibited from being cloned. */ ++#define __noclone __attribute__((__noclone__)) ++ ++#endif /* GCC_VERSION >= 40500 */ ++ ++#if GCC_VERSION >= 40600 ++/* ++ * Tell the optimizer that something else uses this function or variable. ++ */ ++#define __visible __attribute__((externally_visible)) + #endif + +-#if __GNUC_MINOR__ > 0 +-#define __compiletime_object_size(obj) __builtin_object_size(obj, 0) ++/* ++ * GCC 'asm goto' miscompiles certain code sequences: ++ * ++ * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 ++ * ++ * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. ++ * Fixed in GCC 4.8.2 and later versions. ++ * ++ * (asm goto is automatically volatile - the naming reflects this.) ++ */ ++#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) ++ ++#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP ++#if GCC_VERSION >= 40400 ++#define __HAVE_BUILTIN_BSWAP32__ ++#define __HAVE_BUILTIN_BSWAP64__ + #endif +-#if __GNUC_MINOR__ >= 4 +-#define __compiletime_warning(message) __attribute__((warning(message))) +-#define __compiletime_error(message) __attribute__((error(message))) ++#if GCC_VERSION >= 40800 || (defined(__powerpc__) && GCC_VERSION >= 40600) ++#define __HAVE_BUILTIN_BSWAP16__ + #endif ++#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ +--- /dev/null ++++ b/include/linux/compiler-intel.h +@@ -0,0 +1,40 @@ ++#ifndef __LINUX_COMPILER_H ++#error "Please don't include directly, include instead." ++#endif ++ ++#ifdef __ECC ++ ++/* Some compiler specific definitions are overwritten here ++ * for Intel ECC compiler ++ */ ++ ++#include ++ ++/* Intel ECC compiler doesn't support gcc specific asm stmts. ++ * It uses intrinsics to do the equivalent things. ++ */ ++#undef RELOC_HIDE ++#undef OPTIMIZER_HIDE_VAR ++ ++#define RELOC_HIDE(ptr, off) \ ++ ({ unsigned long __ptr; \ ++ __ptr = (unsigned long) (ptr); \ ++ (typeof(ptr)) (__ptr + (off)); }) ++ ++/* This should act as an optimization barrier on var. ++ * Given that this compiler does not have inline assembly, a compiler barrier ++ * is the best we can do. ++ */ ++#define OPTIMIZER_HIDE_VAR(var) barrier() ++ ++/* Intel ECC compiler doesn't support __builtin_types_compatible_p() */ ++#define __must_be_array(a) 0 ++ ++#endif ++ ++#ifndef __HAVE_BUILTIN_BSWAP16__ ++/* icc has this, but it's called _bswap16 */ ++#define __HAVE_BUILTIN_BSWAP16__ ++#define __builtin_bswap16 _bswap16 ++#endif ++ +--- a/include/linux/compiler.h ++++ b/include/linux/compiler.h +@@ -5,16 +5,23 @@ + + #ifdef __CHECKER__ + # define __user __attribute__((noderef, address_space(1))) +-# define __kernel /* default address space */ ++# define __kernel __attribute__((address_space(0))) + # define __safe __attribute__((safe)) + # define __force __attribute__((force)) + # define __nocast __attribute__((nocast)) + # define __iomem __attribute__((noderef, address_space(2))) ++# define __must_hold(x) __attribute__((context(x,1,1))) + # define __acquires(x) __attribute__((context(x,0,1))) + # define __releases(x) __attribute__((context(x,1,0))) + # define __acquire(x) __context__(x,1) + # define __release(x) __context__(x,-1) + # define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) ++# define __percpu __attribute__((noderef, address_space(3))) ++#ifdef CONFIG_SPARSE_RCU_POINTER ++# define __rcu __attribute__((noderef, address_space(4))) ++#else ++# define __rcu ++#endif + extern void __chk_user_ptr(const volatile void __user *); + extern void __chk_io_ptr(const volatile void __iomem *); + #else +@@ -27,13 +34,20 @@ extern void __chk_io_ptr(const volatile + # define __chk_user_ptr(x) (void)0 + # define __chk_io_ptr(x) (void)0 + # define __builtin_warning(x, y...) (1) ++# define __must_hold(x) + # define __acquires(x) + # define __releases(x) + # define __acquire(x) (void)0 + # define __release(x) (void)0 + # define __cond_lock(x,c) (c) ++# define __percpu ++# define __rcu + #endif + ++/* Indirect macros required for expanded argument pasting, eg. __LINE__. */ ++#define ___PASTE(a,b) a##b ++#define __PASTE(a,b) ___PASTE(a,b) ++ + #ifdef __KERNEL__ + + #ifdef __GNUC__ +@@ -49,6 +63,13 @@ extern void __chk_io_ptr(const volatile + # include + #endif + ++/* Clang compiler defines __GNUC__. So we will overwrite implementations ++ * coming from above header files here ++ */ ++#ifdef __clang__ ++#include ++#endif ++ + /* + * Generic compiler-dependent macros required for kernel + * build go below this comment. Actual compiler/compiler version +@@ -156,6 +177,15 @@ void ftrace_likely_update(struct ftrace_ + (typeof(ptr)) (__ptr + (off)); }) + #endif + ++#ifndef OPTIMIZER_HIDE_VAR ++#define OPTIMIZER_HIDE_VAR(var) barrier() ++#endif ++ ++/* Not-quite-unique ID. */ ++#ifndef __UNIQUE_ID ++# define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __LINE__) ++#endif ++ + #endif /* __KERNEL__ */ + + #endif /* __ASSEMBLY__ */ +@@ -228,7 +258,7 @@ void ftrace_likely_update(struct ftrace_ + + /* + * Rather then using noinline to prevent stack consumption, use +- * noinline_for_stack instead. For documentaiton reasons. ++ * noinline_for_stack instead. For documentation reasons. + */ + #define noinline_for_stack noinline + +@@ -270,11 +300,20 @@ void ftrace_likely_update(struct ftrace_ + # define __section(S) __attribute__ ((__section__(#S))) + #endif + ++#ifndef __visible ++#define __visible ++#endif ++ + /* Are two types/vars the same type (ignoring qualifiers)? */ + #ifndef __same_type + # define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) + #endif + ++/* Is this type a native word size -- useful for atomic operations */ ++#ifndef __native_word ++# define __native_word(t) (sizeof(t) == sizeof(int) || sizeof(t) == sizeof(long)) ++#endif ++ + /* Compile time object size, -1 for unknown */ + #ifndef __compiletime_object_size + # define __compiletime_object_size(obj) -1 +@@ -284,7 +323,48 @@ void ftrace_likely_update(struct ftrace_ + #endif + #ifndef __compiletime_error + # define __compiletime_error(message) ++/* ++ * Sparse complains of variable sized arrays due to the temporary variable in ++ * __compiletime_assert. Unfortunately we can't just expand it out to make ++ * sparse see a constant array size without breaking compiletime_assert on old ++ * versions of GCC (e.g. 4.2.4), so hide the array from sparse altogether. ++ */ ++# ifndef __CHECKER__ ++# define __compiletime_error_fallback(condition) \ ++ do { ((void)sizeof(char[1 - 2 * condition])); } while (0) ++# endif + #endif ++#ifndef __compiletime_error_fallback ++# define __compiletime_error_fallback(condition) do { } while (0) ++#endif ++ ++#define __compiletime_assert(condition, msg, prefix, suffix) \ ++ do { \ ++ bool __cond = !(condition); \ ++ extern void prefix ## suffix(void) __compiletime_error(msg); \ ++ if (__cond) \ ++ prefix ## suffix(); \ ++ __compiletime_error_fallback(__cond); \ ++ } while (0) ++ ++#define _compiletime_assert(condition, msg, prefix, suffix) \ ++ __compiletime_assert(condition, msg, prefix, suffix) ++ ++/** ++ * compiletime_assert - break build and emit msg if condition is false ++ * @condition: a compile-time constant condition to check ++ * @msg: a message to emit if condition is false ++ * ++ * In tradition of POSIX assert, this macro will break the build if the ++ * supplied condition is *false*, emitting the supplied error message if the ++ * compiler has support to do so. ++ */ ++#define compiletime_assert(condition, msg) \ ++ _compiletime_assert(condition, msg, __compiletime_assert_, __LINE__) ++ ++#define compiletime_assert_atomic_type(t) \ ++ compiletime_assert(__native_word(t), \ ++ "Need native word sized stores/loads for atomicity.") + + /* + * Prevent the compiler from merging or refetching accesses. The compiler +@@ -300,4 +380,12 @@ void ftrace_likely_update(struct ftrace_ + */ + #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) + ++/* Ignore/forbid kprobes attach on very low level functions marked by this attribute: */ ++#ifdef CONFIG_KPROBES ++# define __kprobes __attribute__((__section__(".kprobes.text"))) ++# define nokprobe_inline __always_inline ++#else ++# define __kprobes ++# define nokprobe_inline inline ++#endif + #endif /* __LINUX_COMPILER_H */ diff --git a/package/boot/uboot-imx6/patches/102-compiler_gcc-prevent-redefining-attributes.patch b/package/boot/uboot-imx6/patches/102-compiler_gcc-prevent-redefining-attributes.patch new file mode 100644 index 000000000..0a6219c2b --- /dev/null +++ b/package/boot/uboot-imx6/patches/102-compiler_gcc-prevent-redefining-attributes.patch @@ -0,0 +1,69 @@ +From 0a5051ce6ebd5f6fad58fd50d6922493d8447f14 Mon Sep 17 00:00:00 2001 +From: Jeroen Hofstee +Date: Thu, 18 Sep 2014 20:10:27 +0200 +Subject: compiler_gcc: prevent redefining attributes + +The libc headers on FreeBSD and likely related projects as well contain an +header file, cdefs.h which provides similiar functionality as linux/compiler.h. +It provides compiler independent defines like __weak __packed, to allow +compiling with multiple compilers which might have a different syntax for such +extension. + +Since that header file is included in multiple standard headers, like stddef.h +and stdarg.h, multiple definitions of those defines will be present if both are +included. When compiling u-boot the compiler will warn about it hundreds of +times since e.g. common.h will include both files indirectly. + +commit 7ea50d52849fe8ffa5b5b74c979b60b1045d6fc9 "compiler_gcc: do not redefine +__gnu_attributes" prevented such redefinitions, but this was undone by commit +fb8ffd7cfc68b3dc44e182356a207d784cb30b34 "compiler*.h: sync +include/linux/compiler*.h with Linux 3.16". + +Add the checks back where necessary to prevent such warnings. + +As the original patch this checkpatch warning is ignored: +"WARNING: Adding new packed members is to be done with care" + +Cc: Masahiro Yamada +Cc: Tom Rini +Signed-off-by: Jeroen Hofstee +Acked-by: Masahiro Yamada +--- + include/linux/compiler-gcc.h | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/include/linux/compiler-gcc.h ++++ b/include/linux/compiler-gcc.h +@@ -64,8 +64,12 @@ + #endif + + #define __deprecated __attribute__((deprecated)) ++#ifndef __packed + #define __packed __attribute__((packed)) ++#endif ++#ifndef __weak + #define __weak __attribute__((weak)) ++#endif + + /* + * it doesn't make sense on ARM (currently the only user of __naked) to trace +@@ -91,8 +95,12 @@ + * would be. + * [...] + */ ++#ifndef __pure + #define __pure __attribute__((pure)) ++#endif ++#ifndef __aligned + #define __aligned(x) __attribute__((aligned(x))) ++#endif + #define __printf(a, b) __attribute__((format(printf, a, b))) + #define __scanf(a, b) __attribute__((format(scanf, a, b))) + #define noinline __attribute__((noinline)) +@@ -115,4 +123,6 @@ + */ + #define uninitialized_var(x) x = x + ++#ifndef __always_inline + #define __always_inline inline __attribute__((always_inline)) ++#endif diff --git a/package/boot/uboot-imx6/patches/001-gcc-5-compiler.patch b/package/boot/uboot-imx6/patches/103-Add-linux-compiler-gcc5.h-to-fix-builds-with-gcc5.patch similarity index 91% rename from package/boot/uboot-imx6/patches/001-gcc-5-compiler.patch rename to package/boot/uboot-imx6/patches/103-Add-linux-compiler-gcc5.h-to-fix-builds-with-gcc5.patch index 872492740..686167406 100644 --- a/package/boot/uboot-imx6/patches/001-gcc-5-compiler.patch +++ b/package/boot/uboot-imx6/patches/103-Add-linux-compiler-gcc5.h-to-fix-builds-with-gcc5.patch @@ -1,10 +1,7 @@ +From 478b02f1a7043b673565075ea5016376f3293b23 Mon Sep 17 00:00:00 2001 From: Hans de Goede -Date: Sat, 7 Feb 2015 21:52:40 +0000 (+0100) +Date: Sat, 7 Feb 2015 22:52:40 +0100 Subject: Add linux/compiler-gcc5.h to fix builds with gcc5 -X-Git-Tag: v2015.04-rc2~31 -X-Git-Url: http://git.denx.de/?p=u-boot.git;a=commitdiff_plain;h=478b02f1a7043b673565075ea5016376f3293b23 - -Add linux/compiler-gcc5.h to fix builds with gcc5 Add linux/compiler-gcc5/h from the kernel sources at: @@ -16,6 +13,9 @@ Date: Sat Oct 25 15:09:42 2014 -0700 Signed-off-by: Hans de Goede --- + include/linux/compiler-gcc5.h | 65 +++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 65 insertions(+) + create mode 100644 include/linux/compiler-gcc5.h --- /dev/null +++ b/include/linux/compiler-gcc5.h diff --git a/tools/mkimage/patches/200-compiler-support.patch b/package/boot/uboot-imx6/patches/104-gcc-compiler-linux-4-5.patch similarity index 83% rename from tools/mkimage/patches/200-compiler-support.patch rename to package/boot/uboot-imx6/patches/104-gcc-compiler-linux-4-5.patch index ca9c5b5a3..af4da8e69 100644 --- a/tools/mkimage/patches/200-compiler-support.patch +++ b/package/boot/uboot-imx6/patches/104-gcc-compiler-linux-4-5.patch @@ -1,7 +1,29 @@ -diff --git b/include/linux/compiler-gcc.h a/include/linux/compiler-gcc.h -index e057bd2..22ab246 100644 ---- b/include/linux/compiler-gcc.h -+++ a/include/linux/compiler-gcc.h +From 9b2c282b348dfe966bbba967dc7a45ce817cce50 Mon Sep 17 00:00:00 2001 +From: Tom Rini +Date: Mon, 29 Feb 2016 11:34:15 -0500 +Subject: compiler*.h: sync include/linux/compiler*.h with Linux 4.5-rc6 + +Copy these from Linux v4.5-rc6 tag. + +This is needed so that we can keep up with newer gcc versions. Note +that we don't have the uapi/ hierarchy from the kernel so continue to +use + +Signed-off-by: Tom Rini +--- + include/linux/compiler-gcc.h | 259 ++++++++++++++++++++++++++++++++--------- + include/linux/compiler-gcc3.h | 23 ---- + include/linux/compiler-gcc4.h | 88 -------------- + include/linux/compiler-gcc5.h | 65 ----------- + include/linux/compiler-intel.h | 5 + + include/linux/compiler.h | 178 ++++++++++++++++++++++++++-- + 6 files changed, 383 insertions(+), 235 deletions(-) + delete mode 100644 include/linux/compiler-gcc3.h + delete mode 100644 include/linux/compiler-gcc4.h + delete mode 100644 include/linux/compiler-gcc5.h + +--- a/include/linux/compiler-gcc.h ++++ b/include/linux/compiler-gcc.h @@ -5,14 +5,28 @@ /* * Common definitions for all gcc versions go here. @@ -163,7 +185,9 @@ index e057bd2..22ab246 100644 + +#if GCC_VERSION >= 30400 +#define __must_check __attribute__((warn_unused_result)) -+#endif + #endif +-#ifndef __aligned +-#define __aligned(x) __attribute__((aligned(x))) + +#if GCC_VERSION >= 40000 + @@ -180,7 +204,18 @@ index e057bd2..22ab246 100644 + +#if GCC_VERSION >= 40100 && GCC_VERSION < 40600 +# define __compiletime_object_size(obj) __builtin_object_size(obj, 0) -+#endif + #endif +-#define __printf(a, b) __attribute__((format(printf, a, b))) +-#define __scanf(a, b) __attribute__((format(scanf, a, b))) +-#define noinline __attribute__((noinline)) +-#define __attribute_const__ __attribute__((__const__)) +-#define __maybe_unused __attribute__((unused)) +-#define __always_unused __attribute__((unused)) +- +-#define __gcc_header(x) #x +-#define _gcc_header(x) __gcc_header(linux/compiler-gcc##x.h) +-#define gcc_header(x) _gcc_header(x) +-#include gcc_header(__GNUC__) + +#if GCC_VERSION >= 40300 +/* Mark functions as cold. gcc will assume any path leading to a call @@ -232,9 +267,7 @@ index e057bd2..22ab246 100644 + * this. + */ +#define __visible __attribute__((externally_visible)) - #endif --#ifndef __aligned --#define __aligned(x) __attribute__((aligned(x))) ++#endif + + +#if GCC_VERSION >= 40900 && !defined(__CHECKER__) @@ -251,18 +284,8 @@ index e057bd2..22ab246 100644 + * massaged by 'flags = ptr & 3; ptr &= ~3;'). + */ +#define __assume_aligned(a, ...) __attribute__((__assume_aligned__(a, ## __VA_ARGS__))) - #endif --#define __printf(a, b) __attribute__((format(printf, a, b))) --#define __scanf(a, b) __attribute__((format(scanf, a, b))) --#define noinline __attribute__((noinline)) --#define __attribute_const__ __attribute__((__const__)) --#define __maybe_unused __attribute__((unused)) --#define __always_unused __attribute__((unused)) - --#define __gcc_header(x) #x --#define _gcc_header(x) __gcc_header(linux/compiler-gcc##x.h) --#define gcc_header(x) _gcc_header(x) --#include gcc_header(__GNUC__) ++#endif ++ +/* + * GCC 'asm goto' miscompiles certain code sequences: + * @@ -318,10 +341,7 @@ index e057bd2..22ab246 100644 -#ifndef __always_inline -#define __always_inline inline __attribute__((always_inline)) -#endif -diff --git b/include/linux/compiler-gcc3.h a/include/linux/compiler-gcc3.h -deleted file mode 100644 -index 7d89feb..0000000 ---- b/include/linux/compiler-gcc3.h +--- a/include/linux/compiler-gcc3.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef __LINUX_COMPILER_H @@ -347,16 +367,20 @@ index 7d89feb..0000000 -# error "GCOV profiling support for gcc versions below 3.4 not included" -# endif /* __GNUC_MINOR__ */ -#endif /* CONFIG_GCOV_KERNEL */ -diff --git b/include/linux/compiler-gcc4.h a/include/linux/compiler-gcc4.h -deleted file mode 100644 -index c982a09..0000000 ---- b/include/linux/compiler-gcc4.h +--- a/include/linux/compiler-gcc4.h +++ /dev/null -@@ -1,81 +0,0 @@ +@@ -1,88 +0,0 @@ -#ifndef __LINUX_COMPILER_H -#error "Please don't include directly, include instead." -#endif - +-/* GCC 4.1.[01] miscompiles __weak */ +-#ifdef __KERNEL__ +-# if GCC_VERSION >= 40100 && GCC_VERSION <= 40101 +-# error Your version of gcc miscompiles the __weak directive +-# endif +-#endif +- -#define __used __attribute__((__used__)) -#define __must_check __attribute__((warn_unused_result)) -#define __compiler_offsetof(a,b) __builtin_offsetof(a,b) @@ -434,10 +458,76 @@ index c982a09..0000000 -#define __HAVE_BUILTIN_BSWAP16__ -#endif -#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ -diff --git b/include/linux/compiler-intel.h a/include/linux/compiler-intel.h -index ba147a1..d4c7113 100644 ---- b/include/linux/compiler-intel.h -+++ a/include/linux/compiler-intel.h +--- a/include/linux/compiler-gcc5.h ++++ /dev/null +@@ -1,65 +0,0 @@ +-#ifndef __LINUX_COMPILER_H +-#error "Please don't include directly, include instead." +-#endif +- +-#define __used __attribute__((__used__)) +-#define __must_check __attribute__((warn_unused_result)) +-#define __compiler_offsetof(a, b) __builtin_offsetof(a, b) +- +-/* Mark functions as cold. gcc will assume any path leading to a call +- to them will be unlikely. This means a lot of manual unlikely()s +- are unnecessary now for any paths leading to the usual suspects +- like BUG(), printk(), panic() etc. [but let's keep them for now for +- older compilers] +- +- Early snapshots of gcc 4.3 don't support this and we can't detect this +- in the preprocessor, but we can live with this because they're unreleased. +- Maketime probing would be overkill here. +- +- gcc also has a __attribute__((__hot__)) to move hot functions into +- a special section, but I don't see any sense in this right now in +- the kernel context */ +-#define __cold __attribute__((__cold__)) +- +-#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) +- +-#ifndef __CHECKER__ +-# define __compiletime_warning(message) __attribute__((warning(message))) +-# define __compiletime_error(message) __attribute__((error(message))) +-#endif /* __CHECKER__ */ +- +-/* +- * Mark a position in code as unreachable. This can be used to +- * suppress control flow warnings after asm blocks that transfer +- * control elsewhere. +- * +- * Early snapshots of gcc 4.5 don't support this and we can't detect +- * this in the preprocessor, but we can live with this because they're +- * unreleased. Really, we need to have autoconf for the kernel. +- */ +-#define unreachable() __builtin_unreachable() +- +-/* Mark a function definition as prohibited from being cloned. */ +-#define __noclone __attribute__((__noclone__)) +- +-/* +- * Tell the optimizer that something else uses this function or variable. +- */ +-#define __visible __attribute__((externally_visible)) +- +-/* +- * GCC 'asm goto' miscompiles certain code sequences: +- * +- * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 +- * +- * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. +- * +- * (asm goto is automatically volatile - the naming reflects this.) +- */ +-#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) +- +-#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP +-#define __HAVE_BUILTIN_BSWAP32__ +-#define __HAVE_BUILTIN_BSWAP64__ +-#define __HAVE_BUILTIN_BSWAP16__ +-#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ +--- a/include/linux/compiler-intel.h ++++ b/include/linux/compiler-intel.h @@ -13,9 +13,14 @@ /* Intel ECC compiler doesn't support gcc specific asm stmts. * It uses intrinsics to do the equivalent things. @@ -453,10 +543,8 @@ index ba147a1..d4c7113 100644 #define RELOC_HIDE(ptr, off) \ ({ unsigned long __ptr; \ __ptr = (unsigned long) (ptr); \ -diff --git b/include/linux/compiler.h a/include/linux/compiler.h -index d5ad7b1..020ad16 100644 ---- b/include/linux/compiler.h -+++ a/include/linux/compiler.h +--- a/include/linux/compiler.h ++++ b/include/linux/compiler.h @@ -17,6 +17,7 @@ # define __release(x) __context__(x,-1) # define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) @@ -465,7 +553,7 @@ index d5ad7b1..020ad16 100644 #ifdef CONFIG_SPARSE_RCU_POINTER # define __rcu __attribute__((noderef, address_space(4))) #else -@@ -42,6 +43,7 @@ extern void __chk_io_ptr(const volatile void __iomem *); +@@ -42,6 +43,7 @@ extern void __chk_io_ptr(const volatile # define __cond_lock(x,c) (c) # define __percpu # define __rcu @@ -473,7 +561,7 @@ index d5ad7b1..020ad16 100644 #endif /* Indirect macros required for expanded argument pasting, eg. __LINE__. */ -@@ -54,7 +56,11 @@ extern void __chk_io_ptr(const volatile void __iomem *); +@@ -54,7 +56,11 @@ extern void __chk_io_ptr(const volatile #include #endif @@ -485,7 +573,7 @@ index d5ad7b1..020ad16 100644 /* Intel compiler defines __GNUC__. So we will overwrite implementations * coming from above header files here -@@ -138,7 +144,7 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); +@@ -138,7 +144,7 @@ void ftrace_likely_update(struct ftrace_ */ #define if(cond, ...) __trace_if( (cond , ## __VA_ARGS__) ) #define __trace_if(cond) \ @@ -494,7 +582,7 @@ index d5ad7b1..020ad16 100644 ({ \ int ______r; \ static struct ftrace_branch_data \ -@@ -165,6 +171,10 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); +@@ -165,6 +171,10 @@ void ftrace_likely_update(struct ftrace_ # define barrier() __memory_barrier() #endif @@ -505,7 +593,7 @@ index d5ad7b1..020ad16 100644 /* Unreachable code */ #ifndef unreachable # define unreachable() do { } while (1) -@@ -186,6 +196,126 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); +@@ -186,6 +196,126 @@ void ftrace_likely_update(struct ftrace_ # define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __LINE__) #endif @@ -632,7 +720,7 @@ index d5ad7b1..020ad16 100644 #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ -@@ -304,6 +434,14 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); +@@ -304,6 +434,14 @@ void ftrace_likely_update(struct ftrace_ #define __visible #endif @@ -647,7 +735,7 @@ index d5ad7b1..020ad16 100644 /* Are two types/vars the same type (ignoring qualifiers)? */ #ifndef __same_type # define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) -@@ -311,7 +449,7 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); +@@ -311,7 +449,7 @@ void ftrace_likely_update(struct ftrace_ /* Is this type a native word size -- useful for atomic operations */ #ifndef __native_word @@ -656,7 +744,7 @@ index d5ad7b1..020ad16 100644 #endif /* Compile time object size, -1 for unknown */ -@@ -373,12 +511,38 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); +@@ -373,12 +511,38 @@ void ftrace_likely_update(struct ftrace_ * to make the compiler aware of ordering is to put the two invocations of * ACCESS_ONCE() in different C statements. * @@ -676,7 +764,8 @@ index d5ad7b1..020ad16 100644 + * required ordering. + * + * If possible use READ_ONCE()/WRITE_ONCE() instead. -+ */ + */ +-#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) +#define __ACCESS_ONCE(x) ({ \ + __maybe_unused typeof(x) __var = (__force typeof(x)) 0; \ + (volatile typeof(x) *)&(x); }) @@ -689,8 +778,7 @@ index d5ad7b1..020ad16 100644 + * Similar to rcu_dereference(), but for situations where the pointed-to + * object's lifetime is managed by something other than RCU. That + * "something other" might be reference counting or simple immortality. - */ --#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) ++ */ +#define lockless_dereference(p) \ +({ \ + typeof(p) _________p1 = READ_ONCE(p); \ diff --git a/package/boot/uboot-kirkwood/Makefile b/package/boot/uboot-kirkwood/Makefile index f4bb87556..e724bdf61 100644 --- a/package/boot/uboot-kirkwood/Makefile +++ b/package/boot/uboot-kirkwood/Makefile @@ -7,10 +7,10 @@ include $(TOPDIR)/rules.mk -PKG_VERSION:=2017.09 +PKG_VERSION:=2018.03 PKG_RELEASE:=1 -PKG_HASH:=b2d15f2cf5f72e706025cde73d67247c6da8cd35f7e10891eefe7d9095089744 +PKG_HASH:=7e7477534409d5368eb1371ffde6820f0f79780a1a1f676161c48442cb303dfd include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk diff --git a/package/boot/uboot-kirkwood/patches/007-nsa310-uboot-generic.patch b/package/boot/uboot-kirkwood/patches/007-nsa310-uboot-generic.patch index 10d8d4405..2ff916eb8 100644 --- a/package/boot/uboot-kirkwood/patches/007-nsa310-uboot-generic.patch +++ b/package/boot/uboot-kirkwood/patches/007-nsa310-uboot-generic.patch @@ -23,8 +23,6 @@ Signed-off-by: Alberto Bursi NOTE: this patch is ready for upstream, LEDE-specific parts are in another patch -diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig -index 9205b1e..819bd3b 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -56,6 +56,9 @@ config TARGET_GOFLEXHOME @@ -45,9 +43,6 @@ index 9205b1e..819bd3b 100644 source "board/zyxel/nsa310s/Kconfig" endif -diff --git a/board/zyxel/nsa310/Kconfig b/board/zyxel/nsa310/Kconfig -new file mode 100644 -index 0000000..145ade6 --- /dev/null +++ b/board/zyxel/nsa310/Kconfig @@ -0,0 +1,12 @@ @@ -63,9 +58,6 @@ index 0000000..145ade6 + default "nsa310" + +endif -diff --git a/board/zyxel/nsa310/MAINTAINERS b/board/zyxel/nsa310/MAINTAINERS -new file mode 100644 -index 0000000..d09f1ab --- /dev/null +++ b/board/zyxel/nsa310/MAINTAINERS @@ -0,0 +1,6 @@ @@ -75,9 +67,6 @@ index 0000000..d09f1ab +F: board/zyxel/nsa310/ +F: include/configs/nsa310.h +F: configs/nsa310_defconfig -diff --git a/board/zyxel/nsa310/Makefile b/board/zyxel/nsa310/Makefile -new file mode 100644 -index 0000000..dfe93cc --- /dev/null +++ b/board/zyxel/nsa310/Makefile @@ -0,0 +1,12 @@ @@ -93,9 +82,6 @@ index 0000000..dfe93cc +# + +obj-y := nsa310.o -diff --git a/board/zyxel/nsa310/kwbimage.cfg b/board/zyxel/nsa310/kwbimage.cfg -new file mode 100644 -index 0000000..f60e1d2 --- /dev/null +++ b/board/zyxel/nsa310/kwbimage.cfg @@ -0,0 +1,166 @@ @@ -265,9 +251,6 @@ index 0000000..f60e1d2 + +# End of Header extension +DATA 0x0 0x0 -diff --git a/board/zyxel/nsa310/nsa310.c b/board/zyxel/nsa310/nsa310.c -new file mode 100644 -index 0000000..eee3f1a --- /dev/null +++ b/board/zyxel/nsa310/nsa310.c @@ -0,0 +1,190 @@ @@ -461,9 +444,6 @@ index 0000000..eee3f1a + } +} +#endif -diff --git a/board/zyxel/nsa310/nsa310.h b/board/zyxel/nsa310/nsa310.h -new file mode 100644 -index 0000000..6634a4f --- /dev/null +++ b/board/zyxel/nsa310/nsa310.h @@ -0,0 +1,56 @@ @@ -501,19 +481,19 @@ index 0000000..6634a4f +/* GPIO's */ +#define SYS_GREEN_LED (1 << 28) +#define SYS_RED_LED (1 << 29) -+#define SATA1_GREEN_LED (1 << 41) -+#define SATA1_RED_LED (1 << 42) ++#define SATA1_GREEN_LED (1ULL << 41) ++#define SATA1_RED_LED (1ULL << 42) +#define SATA2_GREEN_LED (1 << 12) +#define SATA2_RED_LED (1 << 13) +#define USB_GREEN_LED (1 << 15) +#define USB_RED_LED (1 << 21) -+#define COPY_GREEN_LED (1 << 39) -+#define COPY_RED_LED (1 << 40) ++#define COPY_GREEN_LED (1ULL << 39) ++#define COPY_RED_LED (1ULL << 40) + +#define NSA310_OE_LOW (0) +#define NSA310_VAL_LOW (SYS_GREEN_LED) -+#define NSA310_OE_HIGH ((COPY_GREEN_LED | COPY_RED_LED | \ -+ SATA1_GREEN_LED | SATA1_RED_LED)) ++#define NSA310_OE_HIGH (((COPY_GREEN_LED | COPY_RED_LED | \ ++ SATA1_GREEN_LED | SATA1_RED_LED)) >> 32UL) +#define NSA310_VAL_HIGH (0) + +/* PHY related */ @@ -523,14 +503,12 @@ index 0000000..6634a4f +#define MV88E1318_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __NSA310_H */ -diff --git a/configs/nsa310_defconfig b/configs/nsa310_defconfig -new file mode 100644 -index 0000000..d26ef35 --- /dev/null +++ b/configs/nsa310_defconfig -@@ -0,0 +1,34 @@ +@@ -0,0 +1,37 @@ +CONFIG_ARM=y +CONFIG_KIRKWOOD=y ++CONFIG_SYS_TEXT_BASE=0x600000 +CONFIG_TARGET_NSA310=y +CONFIG_IDENT_STRING="\nZyXEL NSA310 1-Bay Power Media Server" +CONFIG_BOOTDELAY=3 @@ -552,6 +530,7 @@ index 0000000..d26ef35 +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_JFFS2=y ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x0c0000(uboot),0x80000(uboot_env),0x7ec0000(ubi)" +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_ENV=y +CONFIG_CMD_NAND=y @@ -563,12 +542,10 @@ index 0000000..d26ef35 +CONFIG_USB_STORAGE=y +CONFIG_LZMA=y +CONFIG_LZO=y -diff --git a/include/configs/nsa310.h b/include/configs/nsa310.h -new file mode 100644 -index 0000000..86ef825 ++CONFIG_SYS_LONGHELP=y --- /dev/null +++ b/include/configs/nsa310.h -@@ -0,0 +1,126 @@ +@@ -0,0 +1,119 @@ +/* Copyright (C) 2015-2016 bodhi + * + * Based on @@ -617,7 +594,6 @@ index 0000000..86ef825 +/* + * Commands configuration + */ -+#define CONFIG_SYS_LONGHELP +#define CONFIG_PREBOOT + +/* @@ -648,16 +624,10 @@ index 0000000..86ef825 + "ubi read 0x800000 kernel; " \ + "bootm 0x800000" + -+#define CONFIG_MTDPARTS \ -+ "mtdparts=orion_nand:" \ -+ "0x0c0000(uboot)," \ -+ "0x80000(uboot_env)," \ -+ "0x7ec0000(ubi)\0" -+ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ -+ "mtdparts="CONFIG_MTDPARTS \ ++ "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "bootargs_root=\0" + +/* diff --git a/package/boot/uboot-kirkwood/patches/008-nsa325-uboot-generic.patch b/package/boot/uboot-kirkwood/patches/008-nsa325-uboot-generic.patch index 4b4356e5d..fd6dd6fa3 100644 --- a/package/boot/uboot-kirkwood/patches/008-nsa325-uboot-generic.patch +++ b/package/boot/uboot-kirkwood/patches/008-nsa325-uboot-generic.patch @@ -1,5 +1,3 @@ -diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig -index 819bd3b..6a2d578 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -62,6 +62,9 @@ config TARGET_NSA310 @@ -19,9 +17,6 @@ index 819bd3b..6a2d578 100644 +source "board/zyxel/nsa325/Kconfig" endif -diff --git a/board/zyxel/nsa325/Kconfig b/board/zyxel/nsa325/Kconfig -new file mode 100644 -index 0000000..1fe5ead --- /dev/null +++ b/board/zyxel/nsa325/Kconfig @@ -0,0 +1,12 @@ @@ -37,9 +32,6 @@ index 0000000..1fe5ead + default "nsa325" + +endif -diff --git a/board/zyxel/nsa325/MAINTAINERS b/board/zyxel/nsa325/MAINTAINERS -new file mode 100644 -index 0000000..130b4d9 --- /dev/null +++ b/board/zyxel/nsa325/MAINTAINERS @@ -0,0 +1,6 @@ @@ -49,9 +41,6 @@ index 0000000..130b4d9 +F: board/zyxel/nsa325/ +F: include/configs/nsa325.h +F: configs/nsa325_defconfig -diff --git a/board/zyxel/nsa325/Makefile b/board/zyxel/nsa325/Makefile -new file mode 100644 -index 0000000..4ee953b --- /dev/null +++ b/board/zyxel/nsa325/Makefile @@ -0,0 +1,13 @@ @@ -68,9 +57,6 @@ index 0000000..4ee953b + +obj-y := nsa325.o + -diff --git a/board/zyxel/nsa325/kwbimage.cfg b/board/zyxel/nsa325/kwbimage.cfg -new file mode 100644 -index 0000000..5a27d38 --- /dev/null +++ b/board/zyxel/nsa325/kwbimage.cfg @@ -0,0 +1,78 @@ @@ -152,9 +138,6 @@ index 0000000..5a27d38 +# End of Header extension +DATA 0x0 0x0 + -diff --git a/board/zyxel/nsa325/nsa325.c b/board/zyxel/nsa325/nsa325.c -new file mode 100644 -index 0000000..4cd1c0f --- /dev/null +++ b/board/zyxel/nsa325/nsa325.c @@ -0,0 +1,265 @@ @@ -423,9 +406,6 @@ index 0000000..4cd1c0f + +#endif + -diff --git a/board/zyxel/nsa325/nsa325.h b/board/zyxel/nsa325/nsa325.h -new file mode 100644 -index 0000000..996653e --- /dev/null +++ b/board/zyxel/nsa325/nsa325.h @@ -0,0 +1,77 @@ @@ -506,14 +486,12 @@ index 0000000..996653e +#define BTN_COPY 37 + +#endif /* __NSA325_H */ -diff --git a/configs/nsa325_defconfig b/configs/nsa325_defconfig -new file mode 100644 -index 0000000..48e09cc --- /dev/null +++ b/configs/nsa325_defconfig -@@ -0,0 +1,34 @@ +@@ -0,0 +1,37 @@ +CONFIG_ARM=y +CONFIG_KIRKWOOD=y ++CONFIG_SYS_TEXT_BASE=0x600000 +CONFIG_TARGET_NSA325=y +CONFIG_IDENT_STRING="\nZyXEL NSA325 2-Bay Power Media Server" +CONFIG_BOOTDELAY=3 @@ -536,6 +514,7 @@ index 0000000..48e09cc +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_JFFS2=y ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x0c0000(uboot),0x80000(uboot_env),0x7ec0000(ubi)" +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_ENV=y +CONFIG_CMD_NAND=y @@ -546,12 +525,10 @@ index 0000000..48e09cc +CONFIG_USB_STORAGE=y +CONFIG_LZMA=y +CONFIG_LZO=y -diff --git a/include/configs/nsa325.h b/include/configs/nsa325.h -new file mode 100644 -index 0000000..e5a8e2a ++CONFIG_SYS_LONGHELP=y --- /dev/null +++ b/include/configs/nsa325.h -@@ -0,0 +1,129 @@ +@@ -0,0 +1,122 @@ +/* + * (C) Copyright 2016 bodhi + * @@ -603,7 +580,6 @@ index 0000000..e5a8e2a +/* + * Commands configuration + */ -+#define CONFIG_SYS_LONGHELP +#define CONFIG_PREBOOT + +/* @@ -634,16 +610,10 @@ index 0000000..e5a8e2a + "ubi read 0x800000 kernel; " \ + "bootm 0x800000" + -+#define CONFIG_MTDPARTS \ -+ "mtdparts=orion_nand:" \ -+ "0x0c0000(uboot)," \ -+ "0x80000(uboot_env)," \ -+ "0x7ec0000(ubi)\0" -+ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ -+ "mtdparts="CONFIG_MTDPARTS \ ++ "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "bootargs_root=\0" + +/* diff --git a/package/boot/uboot-kirkwood/patches/010-pogoplug_v4.patch b/package/boot/uboot-kirkwood/patches/010-pogoplug_v4.patch index d2daf0b66..50551bad6 100644 --- a/package/boot/uboot-kirkwood/patches/010-pogoplug_v4.patch +++ b/package/boot/uboot-kirkwood/patches/010-pogoplug_v4.patch @@ -3,13 +3,13 @@ @@ -25,6 +25,9 @@ config TARGET_LSXL config TARGET_POGO_E02 bool "pogo_e02 Board" - + +config TARGET_POGOPLUGV4 + bool "Pogoplug V4 Board" + config TARGET_DNS325 bool "dns325 Board" - + @@ -77,6 +80,7 @@ source "board/Marvell/guruplug/Kconfig" source "board/Marvell/sheevaplug/Kconfig" source "board/buffalo/lsxl/Kconfig" @@ -18,49 +18,15 @@ source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" source "board/keymile/km_arm/Kconfig" ---- a/arch/arm/mach-kirkwood/include/mach/config.h -+++ b/arch/arm/mach-kirkwood/include/mach/config.h -@@ -77,6 +77,7 @@ - * Ethernet Driver configuration - */ - #ifdef CONFIG_CMD_NET -+#define CONFIG_FEATURE_COMMAND_EDITING - #define CONFIG_NETCONSOLE /* include NetConsole support */ - #define CONFIG_MII /* expose smi ove miiphy interface */ - #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ -@@ -110,6 +111,7 @@ - #define CONFIG_SYS_ATA_STRIDE 4 - /* Controller supports 48-bits LBA addressing */ - #define CONFIG_LBA48 -+#define CONFIG_SYS_64BIT_LBA - /* CONFIG_IDE requires some #defines for ATA registers */ - #define CONFIG_SYS_IDE_MAXBUS 2 - #define CONFIG_SYS_IDE_MAXDEVICE 2 -@@ -134,4 +136,15 @@ - #define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14) - #define CONFIG_SYS_TIMER_RATE CONFIG_SYS_TCLK - -+/* -+ * Boot option -+ */ -+#define CONFIG_CMD_BOOTZ -+ -+/* -+ * GPIO -+ */ -+#define CONFIG_CMD_GPIO -+#define CONFIG_KIRKWOOD_GPIO -+ - #endif /* _KW_CONFIG_H */ --- a/arch/arm/mach-kirkwood/include/mach/kw88f6192.h +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6192.h @@ -16,6 +16,6 @@ #define KW_REGS_PHY_BASE KW88F6192_REGS_PHYS_BASE - + /* TCLK Core Clock defination */ -#define CONFIG_SYS_TCLK 166000000 /* 166MHz */ +#define CONFIG_SYS_TCLK 166666667 /* 166MHz */ - + #endif /* _CONFIG_KW88F6192_H */ --- a/arch/arm/mach-kirkwood/include/mach/mpp.h +++ b/arch/arm/mach-kirkwood/include/mach/mpp.h @@ -69,25 +35,14 @@ #define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1 ) #define MPP33_GE1_13 MPP( 33, 0x3, 0, 0, 0, 1, 1, 1 ) +#define MPP33_SATA1_ACTn MPP( 33, 0x5, 0, 1, 0, 1, 1, 1 ) - + #define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1 ) #define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1 ) #define MPP34_GE1_14 MPP( 34, 0x3, 0, 0, 0, 1, 1, 1 ) +#define MPP34_SATA1_ACTn MPP( 34, 0x5, 0, 1, 0, 1, 1, 1 ) - + #define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1 ) #define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1 ) ---- a/arch/arm/mach-mvebu/include/mach/soc.h -+++ b/arch/arm/mach-mvebu/include/mach/soc.h -@@ -18,6 +18,8 @@ - #define SOC_88F6810_ID 0x6810 - #define SOC_88F6820_ID 0x6820 - #define SOC_88F6828_ID 0x6828 -+#define SOC_88F6192_ID 0x6192 -+#define SOC_88F6702_ID 0x6702 - - /* A375 revisions */ - #define MV_88F67XX_A0_ID 0x3 --- /dev/null +++ b/board/cloudengines/pogoplugv4/Kconfig @@ -0,0 +1,12 @@ @@ -577,9 +532,10 @@ +#endif /* __POGOPLUGV4_H */ --- /dev/null +++ b/configs/pogoplugv4_defconfig -@@ -0,0 +1,35 @@ +@@ -0,0 +1,40 @@ +CONFIG_ARM=y +CONFIG_KIRKWOOD=y ++CONFIG_SYS_TEXT_BASE=0x600000 +CONFIG_TARGET_POGOPLUGV4=y +CONFIG_SYS_PROMPT="pogoplugv4> " +CONFIG_IDENT_STRING="\nPogoplug V4" @@ -589,6 +545,7 @@ +CONFIG_SYS_NS16550=y +CONFIG_CMD_FDT=y +CONFIG_OF_LIBFDT=y ++CONFIG_OF_BOOTZ=y +CONFIG_CMD_SETEXPR=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y @@ -601,10 +558,12 @@ +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_JFFS2=y ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x1c0000(uboot),0x40000(uboot_env),0x7e00000(ubi)" +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_ENV=y +CONFIG_CMD_NAND=y +CONFIG_CMD_MMC=y ++CONFIG_CMD_GPIO=y +CONFIG_EFI_PARTITION=y +CONFIG_ENV_IS_IN_NAND=y +CONFIG_CMD_UBI=y @@ -613,6 +572,7 @@ +CONFIG_USB_STORAGE=y +CONFIG_LZMA=y +CONFIG_LZO=y ++CONFIG_SYS_LONGHELP=y --- a/drivers/gpio/kw_gpio.c +++ b/drivers/gpio/kw_gpio.c @@ -148,3 +148,36 @@ void kw_gpio_set_blink(unsigned pin, int @@ -659,7 +619,7 @@ obj-$(CONFIG_MMC_SDHCI_XENON) += xenon_sdhci.o obj-$(CONFIG_MMC_SDHCI_ZYNQ) += zynq_sdhci.o +obj-$(CONFIG_KIRKWOOD_MMC) += kirkwood_mmc.o - + obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o obj-$(CONFIG_MMC_UNIPHIER) += uniphier-sd.o --- /dev/null @@ -1149,26 +1109,20 @@ +} --- a/include/configs/mv-common.h +++ b/include/configs/mv-common.h -@@ -130,4 +130,16 @@ +@@ -117,4 +117,10 @@ #define CONFIG_MTD_PARTITIONS #endif - + +/* + * Kirkwood MMC + */ +#if defined(CONFIG_KIRKWOOD) && defined(CONFIG_CMD_MMC) +#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE +#endif /* defined(CONFIG_KIRKWOOD) && defined(CONFIG_CMD_MMC) */ -+ -+/* -+ * GPIO command for all Kirkwood boxes -+ */ -+#define CONFIG_CMD_GPIO -+ #endif /* _MV_COMMON_H */ --- /dev/null +++ b/include/configs/pogoplugv4.h -@@ -0,0 +1,132 @@ +@@ -0,0 +1,129 @@ +/* + * Copyright (C) 2014-2016 bodhi + * Based on @@ -1214,11 +1168,14 @@ +#define CONFIG_KW88F6192 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ + ++#define CONFIG_FEATURE_COMMAND_EDITING ++#define CONFIG_SYS_64BIT_LBA ++ +/* + * Commands configuration + */ + -+#define CONFIG_SYS_LONGHELP ++#define CONFIG_KIRKWOOD_GPIO +#define CONFIG_PREBOOT + +/* @@ -1252,16 +1209,10 @@ + "ubi read 0x800000 kernel; " \ + "bootm 0x800000" + -+#define CONFIG_MTDPARTS \ -+ "mtdparts=orion_nand:" \ -+ "0x1c0000(uboot)," \ -+ "0x40000(uboot_env)," \ -+ "0x7e00000(ubi)\0" -+ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ -+ "mtdparts="CONFIG_MTDPARTS \ ++ "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "bootargs_root=\0" + +/* diff --git a/package/boot/uboot-kirkwood/patches/110-dockstar.patch b/package/boot/uboot-kirkwood/patches/110-dockstar.patch index 94d62cee8..43dce1a0d 100644 --- a/package/boot/uboot-kirkwood/patches/110-dockstar.patch +++ b/package/boot/uboot-kirkwood/patches/110-dockstar.patch @@ -1,14 +1,14 @@ --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h -@@ -19,6 +19,7 @@ +@@ -18,6 +18,7 @@ + #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ #define CONFIG_KW88F6281 1 /* SOC Name */ - #define CONFIG_MACH_DOCKSTAR /* Machine type */ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_SYS_MVFS /* * mv-common.h should be defined after CMD configs since it used them -@@ -37,29 +38,29 @@ +@@ -36,27 +37,22 @@ * it has to be rounded to sector size */ #define CONFIG_ENV_SIZE 0x20000 /* 128k */ @@ -26,30 +26,32 @@ - "ubifsload 0x800000 ${kernel}; " \ - "ubifsload 0x1100000 ${initrd}; " \ - "bootm 0x800000 0x1100000" -- --#define CONFIG_MTDPARTS "mtdparts=orion_nand:1m(uboot),-(root)\0" + "ubi part ubi; " \ + "ubi read 0x800000 kernel; " \ + "bootm 0x800000" -+ -+#define CONFIG_MTDPARTS \ -+ "mtdparts=orion_nand:" \ -+ "0xe0000@0x0(uboot)," \ -+ "0x20000@0xe0000(uboot_env)," \ -+ "0x100000@0x100000(second_stage_uboot)," \ -+ "-@0x200000(ubi)\0" #define CONFIG_EXTRA_ENV_SETTINGS \ - "console=console=ttyS0,115200\0" \ - "mtdids=nand0=orion_nand\0" \ -- "mtdparts="CONFIG_MTDPARTS \ +- "mtdparts="CONFIG_MTDPARTS_DEFAULT \ - "kernel=/boot/uImage\0" \ - "initrd=/boot/uInitrd\0" \ - "bootargs_root=ubi.mtd=1 root=ubi0:root rootfstype=ubifs ro\0" + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ -+ "mtdparts="CONFIG_MTDPARTS \ ++ "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "bootargs_root=\0" /* * Ethernet Driver configuration +--- a/configs/dockstar_defconfig ++++ b/configs/dockstar_defconfig +@@ -16,7 +16,7 @@ CONFIG_CMD_PING=y + CONFIG_CMD_EXT2=y + CONFIG_CMD_FAT=y + CONFIG_CMD_JFFS2=y +-CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),-(root)" ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)" + CONFIG_CMD_UBI=y + CONFIG_ISO_PARTITION=y + CONFIG_ENV_IS_IN_NAND=y diff --git a/package/boot/uboot-kirkwood/patches/120-iconnect.patch b/package/boot/uboot-kirkwood/patches/120-iconnect.patch index bd1dab818..d2e89115e 100644 --- a/package/boot/uboot-kirkwood/patches/120-iconnect.patch +++ b/package/boot/uboot-kirkwood/patches/120-iconnect.patch @@ -1,6 +1,6 @@ --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h -@@ -44,30 +44,29 @@ +@@ -44,24 +44,22 @@ #define CONFIG_ENV_SECT_SIZE 0x20000 #endif #define CONFIG_ENV_SIZE 0x20000 @@ -19,21 +19,10 @@ + "ubi read 0x800000 kernel; " \ "bootm 0x800000" - #define CONFIG_MTDPARTS \ -- "mtdparts=orion_nand:" \ -- "0x80000@0x0(uboot)," \ -- "0x20000@0x80000(uboot_env)," \ -- "-@0xa0000(rootfs)\0" -+ "mtdparts=orion_nand:" \ -+ "0xe0000@0x0(uboot)," \ -+ "0x20000@0xe0000(uboot_env)," \ -+ "0x100000@0x100000(second_stage_uboot)," \ -+ "-@0x200000(ubi)\0" - #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS \ + "mtdparts="CONFIG_MTDPARTS_DEFAULT \ - "kernel=/boot/uImage\0" \ - "bootargs_root=noinitrd ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" + "bootargs_root=\0" @@ -42,7 +31,7 @@ * Ethernet driver configuration --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig -@@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="iconnect => " +@@ -10,12 +10,13 @@ CONFIG_SYS_PROMPT="iconnect => " CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -50,3 +39,10 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y + CONFIG_CMD_FAT=y + CONFIG_CMD_JFFS2=y +-CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0x80000@0x0(uboot),0x20000@0x80000(uboot_env),-@0xa0000(rootfs)" ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)" + CONFIG_CMD_UBI=y + CONFIG_ISO_PARTITION=y + CONFIG_ENV_IS_IN_NAND=y diff --git a/package/boot/uboot-kirkwood/patches/130-ib62x0.patch b/package/boot/uboot-kirkwood/patches/130-ib62x0.patch index 58db8c8c8..ec0792c58 100644 --- a/package/boot/uboot-kirkwood/patches/130-ib62x0.patch +++ b/package/boot/uboot-kirkwood/patches/130-ib62x0.patch @@ -1,6 +1,6 @@ --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h -@@ -49,27 +49,22 @@ +@@ -49,21 +49,15 @@ */ #define CONFIG_BOOTCOMMAND \ "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ @@ -15,18 +15,10 @@ + "ubi read 0x800000 kernel; " \ + "bootm 0x800000" - #define CONFIG_MTDPARTS \ - "mtdparts=orion_nand:" \ - "0xe0000@0x0(uboot)," \ - "0x20000@0xe0000(uboot_env)," \ -- "-@0x100000(root)\0" -+ "0x100000@0x100000(second_stage_uboot)," \ -+ "-@0x200000(ubi)\0" - #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS \ + "mtdparts="CONFIG_MTDPARTS_DEFAULT \ - "kernel=/boot/zImage\0" \ - "fdt=/boot/ib62x0.dtb\0" \ - "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0" @@ -34,3 +26,14 @@ /* * Ethernet driver configuration +--- a/configs/ib62x0_defconfig ++++ b/configs/ib62x0_defconfig +@@ -19,7 +19,7 @@ CONFIG_CMD_PING=y + CONFIG_CMD_EXT2=y + CONFIG_CMD_FAT=y + CONFIG_CMD_JFFS2=y +-CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),-@0x100000(root)" ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)" + CONFIG_CMD_UBI=y + CONFIG_ISO_PARTITION=y + CONFIG_ENV_IS_IN_NAND=y diff --git a/package/boot/uboot-kirkwood/patches/140-pogoplug_e02.patch b/package/boot/uboot-kirkwood/patches/140-pogoplug_e02.patch index 5c8ff35be..34379f261 100644 --- a/package/boot/uboot-kirkwood/patches/140-pogoplug_e02.patch +++ b/package/boot/uboot-kirkwood/patches/140-pogoplug_e02.patch @@ -1,6 +1,6 @@ --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h -@@ -44,23 +44,30 @@ +@@ -44,23 +44,23 @@ #endif #define CONFIG_ENV_SIZE 0x20000 /* 128k */ @@ -14,18 +14,11 @@ - "setenv bootargs $(bootargs_console); " \ - "run bootcmd_usb; " \ - "bootm 0x00800000 0x01100000" -+ "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ ++ "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ + "ubi part ubi; " \ + "ubifsmount ubi:rootfs; " \ + "ubi read 0x800000 kernel; " \ + "bootm 0x800000" -+ -+#define CONFIG_MTDPARTS \ -+ "mtdparts=orion_nand:" \ -+ "0xe0000@0x0(uboot)," \ -+ "0x20000@0xe0000(uboot_env)," \ -+ "0x100000@0x100000(second_stage_uboot)," \ -+ "-@0x200000(ubi)\0" #define CONFIG_EXTRA_ENV_SETTINGS \ - "mtdparts=mtdparts=orion_nand:1M(u-boot),4M(uImage)," \ @@ -36,8 +29,18 @@ - "ext2load usb 0:1 0x01100000 /uInitrd\0" + "console=console=ttyS0,115200\0" \ + "mtdids=nand0=orion_nand\0" \ -+ "mtdparts="CONFIG_MTDPARTS \ ++ "mtdparts="CONFIG_MTDPARTS_DEFAULT \ + "bootargs_root=\0" /* * Ethernet Driver configuration +--- a/configs/pogo_e02_defconfig ++++ b/configs/pogo_e02_defconfig +@@ -16,6 +16,7 @@ CONFIG_CMD_PING=y + CONFIG_CMD_EXT2=y + CONFIG_CMD_FAT=y + CONFIG_CMD_JFFS2=y ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:0xe0000@0x0(uboot),0x20000@0xe0000(uboot_env),0x100000@0x100000(second_stage_uboot),-@0x200000(ubi)" + CONFIG_CMD_UBI=y + CONFIG_ISO_PARTITION=y + CONFIG_ENV_IS_IN_NAND=y diff --git a/package/boot/uboot-kirkwood/patches/150-goflexhome.patch b/package/boot/uboot-kirkwood/patches/150-goflexhome.patch index 88b833072..186e33a0c 100644 --- a/package/boot/uboot-kirkwood/patches/150-goflexhome.patch +++ b/package/boot/uboot-kirkwood/patches/150-goflexhome.patch @@ -1,6 +1,6 @@ --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h -@@ -70,20 +70,18 @@ +@@ -69,17 +69,15 @@ */ #define CONFIG_BOOTCOMMAND \ "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \ @@ -11,17 +11,24 @@ + "ubi read 0x800000 kernel; " \ "bootm 0x800000" - #define CONFIG_MTDPARTS \ -- "mtdparts=orion_nand:1m(uboot),6M(uImage),-(root)\0" -+ "mtdparts=orion_nand:1m(uboot),255m(ubi)\0" - #define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdids=nand0=orion_nand\0" \ - "mtdparts="CONFIG_MTDPARTS \ + "mtdparts="CONFIG_MTDPARTS_DEFAULT \ - "kernel=/boot/uImage\0" \ - "bootargs_root=ubi.mtd=root root=ubi0:root rootfstype=ubifs ro\0" + "bootargs_root=\0" /* * Ethernet Driver configuration +--- a/configs/goflexhome_defconfig ++++ b/configs/goflexhome_defconfig +@@ -21,7 +21,7 @@ CONFIG_CMD_EXT4=y + CONFIG_CMD_FAT=y + CONFIG_CMD_JFFS2=y + CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" +-CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),6M(uImage),-(root)" ++CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:1m(uboot),255m(ubi)" + CONFIG_CMD_UBI=y + CONFIG_ISO_PARTITION=y + CONFIG_ENV_IS_IN_NAND=y diff --git a/package/boot/uboot-kirkwood/patches/200-openwrt-config.patch b/package/boot/uboot-kirkwood/patches/200-openwrt-config.patch index 04614f77c..6400e5bb6 100644 --- a/package/boot/uboot-kirkwood/patches/200-openwrt-config.patch +++ b/package/boot/uboot-kirkwood/patches/200-openwrt-config.patch @@ -1,6 +1,6 @@ --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig -@@ -90,4 +90,7 @@ source "board/zyxel/nsa310/Kconfig" +@@ -94,4 +94,7 @@ source "board/zyxel/nsa310/Kconfig" source "board/zyxel/nsa310s/Kconfig" source "board/zyxel/nsa325/Kconfig" @@ -10,7 +10,7 @@ endif --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h -@@ -76,4 +76,6 @@ +@@ -68,4 +68,6 @@ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_MTD_PARTITIONS @@ -19,7 +19,7 @@ #endif /* _CONFIG_DOCKSTAR_H */ --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h -@@ -94,4 +94,6 @@ +@@ -87,4 +87,6 @@ #define CONFIG_RTC_MV #endif /* CONFIG_CMD_DATE */ @@ -28,7 +28,7 @@ #endif /* _CONFIG_IB62x0_H */ --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h -@@ -83,4 +83,6 @@ +@@ -76,4 +76,6 @@ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS @@ -71,7 +71,7 @@ +#endif /* __OPENWRT_KIRKWOOD_COMMON_H */ --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h -@@ -83,4 +83,6 @@ +@@ -76,4 +76,6 @@ #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_MTD_PARTITIONS @@ -80,7 +80,7 @@ #endif /* _CONFIG_POGO_E02_H */ --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h -@@ -105,4 +105,6 @@ +@@ -101,4 +101,6 @@ #define CONFIG_RTC_MV #endif /* CONFIG_CMD_DATE */ @@ -89,7 +89,7 @@ #endif /* _CONFIG_GOFLEXHOME_H */ --- a/include/configs/nsa310.h +++ b/include/configs/nsa310.h -@@ -123,4 +123,6 @@ +@@ -116,4 +116,6 @@ #define CONFIG_RTC_MV #endif /* CONFIG_CMD_DATE */ @@ -98,7 +98,7 @@ #endif /* _CONFIG_NSA310_H */ --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig -@@ -25,3 +25,8 @@ CONFIG_USB=y +@@ -26,3 +26,8 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y @@ -109,7 +109,7 @@ +CONFIG_LZO=y --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig -@@ -29,3 +29,8 @@ CONFIG_USB=y +@@ -32,3 +32,8 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y @@ -120,20 +120,19 @@ +CONFIG_LZO=y --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig -@@ -27,5 +27,9 @@ CONFIG_SYS_NS16550=y +@@ -29,5 +29,8 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y -CONFIG_LZMA=y CONFIG_OF_LIBFDT=y -+CONFIG_CMD_BOOTZ=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_LZMA=y +CONFIG_LZO=y --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig -@@ -24,5 +24,9 @@ CONFIG_SYS_NS16550=y +@@ -25,5 +25,9 @@ CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y @@ -146,7 +145,7 @@ +CONFIG_LZO=y --- a/configs/nsa310_defconfig +++ b/configs/nsa310_defconfig -@@ -30,5 +30,8 @@ CONFIG_CMD_UBI=y +@@ -32,6 +32,9 @@ CONFIG_CMD_UBI=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y @@ -155,9 +154,10 @@ +CONFIG_FIT_VERBOSE=y CONFIG_LZMA=y CONFIG_LZO=y + CONFIG_SYS_LONGHELP=y --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig -@@ -25,3 +25,8 @@ CONFIG_USB=y +@@ -26,3 +26,8 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT=y diff --git a/package/boot/uboot-lantiq/Makefile b/package/boot/uboot-lantiq/Makefile index 5493737d3..55038fdf6 100644 --- a/package/boot/uboot-lantiq/Makefile +++ b/package/boot/uboot-lantiq/Makefile @@ -353,17 +353,17 @@ UBOOT_TARGETS:= \ define CompressVR9Firmware $(STAGING_DIR_HOST)/bin/lzma e \ - $(FIRMWARE_LANTIQ_SOURCE)/vr9_phy$(1)_a$(2)x.bin \ + $(FIRMWARE_LANTIQ_SOURCE)/xrx200_phy$(1)_a$(2)$(3).bin \ $(PKG_BUILD_DIR)/arch/mips/cpu/mips32/vrx200/fw_phy$(1)_a$(2)x.blob endef define Build/Prepare $(call Build/Prepare/Default) mkdir -p $(PKG_BUILD_DIR)/arch/mips/cpu/mips32/vrx200/ - $(call CompressVR9Firmware,11g,1) - $(call CompressVR9Firmware,11g,2) - $(call CompressVR9Firmware,22f,1) - $(call CompressVR9Firmware,22f,2) + $(call CompressVR9Firmware,11g,1,4) + $(call CompressVR9Firmware,11g,2,2) + $(call CompressVR9Firmware,22f,1,4) + $(call CompressVR9Firmware,22f,2,2) endef UBOOT_MAKE_FLAGS := diff --git a/package/boot/uboot-layerscape-armv8_32b/Makefile b/package/boot/uboot-layerscape-armv8_32b/Makefile index d1ca82917..3d3b684dc 100644 --- a/package/boot/uboot-layerscape-armv8_32b/Makefile +++ b/package/boot/uboot-layerscape-armv8_32b/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=uboot-layerscape-armv8_32b -PKG_SOURCE_DATE:=2017-10-24 +PKG_SOURCE_DATE:=2018-01-22 PKG_RELEASE:=1 # Layerscape ARMv8 platforms use 64-bit u-boot to support both 32-bit and 64-bit @@ -17,8 +17,8 @@ PKG_RELEASE:=1 # uboot-layerscape's source code. PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/yangbolu1991/u-boot-lede.git -PKG_SOURCE_VERSION:=43cb4c0fcab237f8daa39c393cc1441b76b99fcf -PKG_MIRROR_HASH:=ff7d1fcb85dda2be6a9e3785821b5791c7189d2d412b160a9621bb2dcad24dea +PKG_SOURCE_VERSION:=40a40dfd8136fcc314dd442a3b24a41b1e5652dd +PKG_MIRROR_HASH:=3dde5a33d19c573cbdce74f5d7edb6c5ca2a26a39d503c3efe5d5ad06f01e9f5 PKG_MAINTAINER:=Yangbo Lu diff --git a/package/boot/uboot-layerscape/Makefile b/package/boot/uboot-layerscape/Makefile index c37b335b4..1805c1f0d 100644 --- a/package/boot/uboot-layerscape/Makefile +++ b/package/boot/uboot-layerscape/Makefile @@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=uboot-layerscape -PKG_SOURCE_DATE:=2017-08-24 +PKG_SOURCE_DATE:=2017-12-07 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/qoriq-open-source/u-boot.git -PKG_SOURCE_VERSION:=fbedf04c1bad675eadbac86febdcf759441a02af -PKG_MIRROR_HASH:=29922f83ce3e8dde163eafcfd07f3595e2779b7a3e8eb43640f058f58248718d +PKG_SOURCE_VERSION:=9f7df1b406ff11409021cd2112beedd6b57bb600 +PKG_MIRROR_HASH:=b3756f814b731af2d03b0582ece90b2de564955b778f341fbfc34fa9bd849819 include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk diff --git a/package/boot/uboot-layerscape/patches/0001-armv8-ls1043a-add-LEDE-boot-support-in-environment.patch b/package/boot/uboot-layerscape/patches/0001-armv8-ls1043a-add-LEDE-boot-support-in-environment.patch index 597383166..b5adca620 100644 --- a/package/boot/uboot-layerscape/patches/0001-armv8-ls1043a-add-LEDE-boot-support-in-environment.patch +++ b/package/boot/uboot-layerscape/patches/0001-armv8-ls1043a-add-LEDE-boot-support-in-environment.patch @@ -1,21 +1,21 @@ -From 74be1b50f96b3ada0a4fc18f0283659739edbadf Mon Sep 17 00:00:00 2001 +From d1b42455f62baefe7fb782d0d7100715b0fdb41f Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Fri, 22 Sep 2017 11:00:12 +0800 -Subject: [PATCH 1/3] armv8: ls1043a: add LEDE boot support in environment +Date: Fri, 19 Jan 2018 10:16:57 +0800 +Subject: [PATCH] armv8: ls1043a: add LEDE boot support in environment Signed-off-by: Yangbo Lu --- - include/configs/ls1043a_common.h | 20 +++++++++++++++++++- - 1 file changed, 19 insertions(+), 1 deletion(-) + include/configs/ls1043a_common.h | 20 +++++++++++++++++++- + 1 files changed, 19 insertions(+), 1 deletions(-) diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h -index 0b3fb4e..5c01111 100644 +index c437ce5..48ecff5 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h -@@ -336,7 +336,19 @@ - "sd_bootcmd=echo Trying load from SD ..;" \ - "mmcinfo; mmc read $load_addr " \ - "$kernel_addr_sd $kernel_size_sd ;" \ +@@ -341,7 +341,19 @@ + "env exists secureboot && mmc read $kernelheader_addr_r " \ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ - " bootm $load_addr#$board\0" + " bootm $load_addr#$board\0" \ + "lede_setenv=setenv loadaddr 82000000 && " \ @@ -33,7 +33,7 @@ index 0b3fb4e..5c01111 100644 #undef CONFIG_BOOTCOMMAND -@@ -351,6 +363,12 @@ +@@ -356,6 +368,12 @@ "env exists secureboot && esbc_halt;" #endif @@ -47,5 +47,5 @@ index 0b3fb4e..5c01111 100644 "earlycon=uart8250,mmio,0x21c0500 " \ MTDPARTS_DEFAULT -- -2.7.4 +1.7.1 diff --git a/package/boot/uboot-layerscape/patches/0002-armv8-ls1046ardb-add-LEDE-boot-support-in-environmen.patch b/package/boot/uboot-layerscape/patches/0002-armv8-ls1046ardb-add-LEDE-boot-support-in-environmen.patch index 418f6287f..f2e72870e 100644 --- a/package/boot/uboot-layerscape/patches/0002-armv8-ls1046ardb-add-LEDE-boot-support-in-environmen.patch +++ b/package/boot/uboot-layerscape/patches/0002-armv8-ls1046ardb-add-LEDE-boot-support-in-environmen.patch @@ -1,32 +1,32 @@ -From dc0e8734ea1c679738377d13bdd9bf3fa644e6b3 Mon Sep 17 00:00:00 2001 +From a5293c6d5fdacf84fdd4772d0532aa5478df4d3c Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Fri, 22 Sep 2017 11:36:43 +0800 -Subject: [PATCH 2/3] armv8: ls1046ardb: add LEDE boot support in environment +Date: Fri, 19 Jan 2018 10:18:47 +0800 +Subject: [PATCH] armv8: ls1046ardb: add LEDE boot support in environment Signed-off-by: Yangbo Lu --- - include/configs/ls1046a_common.h | 15 ++++++++++++++- - include/configs/ls1046ardb.h | 6 ++++++ - 2 files changed, 20 insertions(+), 1 deletion(-) + include/configs/ls1046a_common.h | 15 ++++++++++++++- + include/configs/ls1046ardb.h | 6 ++++++ + 2 files changed, 20 insertions(+), 1 deletions(-) diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h -index 4fc2f94..53bd41b 100644 +index d163347..d26147b 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h -@@ -276,7 +276,20 @@ - "sd_bootcmd=echo Trying load from SD ..;" \ - "mmcinfo; mmc read $load_addr " \ - "$kernel_addr_sd $kernel_size_sd ;" \ +@@ -281,7 +281,20 @@ + "env exists secureboot && mmc read $kernelheader_addr_r " \ + "$kernelhdr_addr_sd $kernelhdr_size_sd " \ + " && esbc_validate ${kernelheader_addr_r};" \ - " bootm $load_addr#$board\0" + " bootm $load_addr#$board\0" \ + "lede_setenv=setenv loadaddr 82000000 && " \ + "setenv fdtaddr 8f000000 && " \ -+ "setenv bootargs root=/dev/mtdblock9 " \ -+ "rootfstype=ext4 noinitrd " \ ++ "setenv bootargs ubi.mtd=9 root=ubi0:rootfs rw " \ ++ "rootfstype=ubifs noinitrd " \ + "earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 " \ + "mtdparts=1550000.quadspi:1M(rcw),2M(u-boot),1M(u-boot-env)," \ + "5M(reserved-1),256k(fman),5888k(reserved-2),1M(dtb)," \ -+ "16M(kernel),30M(ext4rfs),2M(user)\0" \ ++ "16M(kernel),32M(ubifs)\0" \ + "lede_run=sf probe 0:0 && " \ + "sf read $fdtaddr f00000 100000 && " \ + "sf read $loadaddr 1000000 1000000 && " \ @@ -36,10 +36,10 @@ index 4fc2f94..53bd41b 100644 #define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \ diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h -index f8c15a6..c3b50b1 100644 +index 4475ac7..15e7858 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h -@@ -251,6 +251,12 @@ +@@ -253,6 +253,12 @@ "env exists secureboot && esbc_halt;" #endif @@ -53,5 +53,5 @@ index f8c15a6..c3b50b1 100644 "15m(u-boot),48m(kernel.itb);" \ "7e800000.flash:16m(nand_uboot)," \ -- -2.7.4 +1.7.1 diff --git a/package/boot/uboot-layerscape/patches/0003-armv8-ls1012ardb-add-LEDE-boot-support-in-environmen.patch b/package/boot/uboot-layerscape/patches/0003-armv8-ls1012ardb-add-LEDE-boot-support-in-environmen.patch index e8bbe7faa..f9f1ed41a 100644 --- a/package/boot/uboot-layerscape/patches/0003-armv8-ls1012ardb-add-LEDE-boot-support-in-environmen.patch +++ b/package/boot/uboot-layerscape/patches/0003-armv8-ls1012ardb-add-LEDE-boot-support-in-environmen.patch @@ -20,12 +20,12 @@ index 5fe3218..242cdf0 100644 + "bootm $load_addr#$board\0" \ + "lede_setenv=setenv loadaddr 82000000 && " \ + "setenv fdtaddr 8f000000 && " \ -+ "setenv bootargs root=/dev/mtdblock8 " \ -+ "rootfstype=ext4 noinitrd " \ ++ "setenv bootargs ubi.mtd=8 root=ubi0:rootfs rw " \ ++ "rootfstype=ubifs noinitrd " \ + "earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 " \ + "mtdparts=1550000.quadspi:1M(rcw),2M(u-boot),1M(u-boot-env)," \ + "5M(reserved-1),256k(fman),5888k(reserved-2),1M(dtb)," \ -+ "16M(kernel),30M(ext4rfs),2M(user)\0" \ ++ "16M(kernel),32M(ubifs)\0" \ + "lede_run=pfe stop && sf probe 0:0 && " \ + "sf read $fdtaddr f00000 100000 && " \ + "sf read $loadaddr 1000000 1000000 && " \ diff --git a/package/boot/uboot-layerscape/patches/0004-armv8-ls1088ardb-add-LEDE-boot-support-in-environmen.patch b/package/boot/uboot-layerscape/patches/0004-armv8-ls1088ardb-add-LEDE-boot-support-in-environmen.patch index eaf0da283..6ce71f2c6 100644 --- a/package/boot/uboot-layerscape/patches/0004-armv8-ls1088ardb-add-LEDE-boot-support-in-environmen.patch +++ b/package/boot/uboot-layerscape/patches/0004-armv8-ls1088ardb-add-LEDE-boot-support-in-environmen.patch @@ -20,12 +20,12 @@ index 7bd152d..4cefa40 100644 + "bootm $load_addr#$BOARD\0" \ + "lede_setenv=setenv loadaddr 82000000 && " \ + "setenv fdtaddr 8f000000 && " \ -+ "setenv bootargs root=/dev/mtdblock10 " \ -+ "rootfstype=ext4 noinitrd " \ ++ "setenv bootargs ubi.mtd=10 root=ubi0:rootfs rw " \ ++ "rootfstype=ubifs noinitrd " \ + "earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 " \ + "mtdparts=20c0000.quadspi:1M(rcw),2M(u-boot),1M(u-boot-env)," \ + "6M(reserved-1),3M(mc),1M(dpl),1M(dpc),1M(dtb)," \ -+ "16M(kernel),30M(ext4rfs),2M(user)\0" \ ++ "16M(kernel),32M(ubifs)\0" \ + "lede_run=sf probe 0:0 && " \ + "sf read $fdtaddr f00000 100000 && " \ + "sf read $loadaddr 1000000 1000000 && " \ diff --git a/package/boot/uboot-layerscape/patches/0006-armv8-ls1012afrdm-add-LEDE-boot-support-in-environme.patch b/package/boot/uboot-layerscape/patches/0006-armv8-ls1012afrdm-add-LEDE-boot-support-in-environme.patch index 45010a210..524b7f450 100644 --- a/package/boot/uboot-layerscape/patches/0006-armv8-ls1012afrdm-add-LEDE-boot-support-in-environme.patch +++ b/package/boot/uboot-layerscape/patches/0006-armv8-ls1012afrdm-add-LEDE-boot-support-in-environme.patch @@ -18,12 +18,12 @@ index a3f8824d27..36dff19bdd 100644 "$kernel_addr $kernel_size && bootm $load_addr#$board\0" \ + "lede_setenv=setenv loadaddr 82000000 && " \ + "setenv fdtaddr 8f000000 && " \ -+ "setenv bootargs root=/dev/mtdblock8 " \ -+ "rootfstype=ext4 noinitrd " \ ++ "setenv bootargs ubi.mtd=8 root=ubi0:rootfs rw " \ ++ "rootfstype=ubifs noinitrd " \ + "earlycon=uart8250,mmio,0x21c0500 console=ttyS0,115200 " \ + "mtdparts=1550000.quadspi:1M(rcw),2M(u-boot),1M(u-boot-env)," \ + "5M(reserved-1),256k(fman),5888k(reserved-2),1M(dtb)," \ -+ "16M(kernel),30M(ext4rfs),2M(user)\0" \ ++ "16M(kernel),32M(ubifs)\0" \ + "lede_run=pfe stop && sf probe 0:0 && " \ + "sf read $fdtaddr f00000 100000 && " \ + "sf read $loadaddr 1000000 1000000 && " \ diff --git a/package/boot/uboot-mvebu/Makefile b/package/boot/uboot-mvebu/Makefile index b29039cd8..3005e45c4 100644 --- a/package/boot/uboot-mvebu/Makefile +++ b/package/boot/uboot-mvebu/Makefile @@ -8,16 +8,14 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2017.03 +PKG_VERSION:=2018.03 PKG_RELEASE:=1 -PKG_HASH:=f54baf3f9325bf444c7905f3a5b6f83680edb1e6e1a4d5f8a5ad80abe885113f +PKG_HASH:=7e7477534409d5368eb1371ffde6820f0f79780a1a1f676161c48442cb303dfd include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk -UBOOT_MAKE_FLAGS:= - define U-Boot/Default BUILD_TARGET:=mvebu HIDDEN:=1 @@ -26,12 +24,21 @@ endef define U-Boot/clearfog NAME:=SolidRun ClearFog A1 BUILD_DEVICES:=armada-388-clearfog-base armada-388-clearfog-pro + BUILD_SUBTARGET:=cortexa9 UBOOT_IMAGE:=u-boot-spl.kwb endef UBOOT_TARGETS:= \ clearfog +define Build/Configure + # enable additional options beyond clearfog_defconfig + echo CONFIG_NET_RANDOM_ETHADDR=y >> $(PKG_BUILD_DIR)/configs/$(BUILD_VARIANT)_defconfig + echo CONFIG_CMD_SETEXPR=y >> $(PKG_BUILD_DIR)/configs/$(BUILD_VARIANT)_defconfig + + +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIGURE_VARS) $(UBOOT_CONFIG)_config +endef + define Build/InstallDev $(INSTALL_DIR) $(STAGING_DIR_IMAGE) $(CP) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot-spl.kwb diff --git a/package/boot/uboot-mvebu/patches/0001-clearfog-generate-random-MAC-address.patch b/package/boot/uboot-mvebu/patches/0001-clearfog-generate-random-MAC-address.patch deleted file mode 100644 index c34616292..000000000 --- a/package/boot/uboot-mvebu/patches/0001-clearfog-generate-random-MAC-address.patch +++ /dev/null @@ -1,28 +0,0 @@ -From ee16ee20205ea374613c3ac7f50209451eb29068 Mon Sep 17 00:00:00 2001 -From: Josua Mayer -Date: Sun, 23 Apr 2017 18:02:40 +0200 -Subject: [PATCH 1/4] clearfog: generate random MAC address - -The Clearfog does not come with predetermined MACs. -Falling back to random ones ensures ethernet can still operate anyway. - -Signed-off-by: Josua Mayer >josua.mayer97@gmail.com> ---- - configs/clearfog_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig -index 1264871e83..41e94e6daf 100644 ---- a/configs/clearfog_defconfig -+++ b/configs/clearfog_defconfig -@@ -47,6 +47,7 @@ CONFIG_DEBUG_UART=y - CONFIG_DEBUG_UART_BASE=0xd0012000 - CONFIG_DEBUG_UART_CLOCK=250000000 - CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_NET_RANDOM_ETHADDR=y - CONFIG_SYS_NS16550=y - CONFIG_USB=y - CONFIG_DM_USB=y --- -2.12.2 - diff --git a/package/boot/uboot-mvebu/patches/0002-clearfog-reset-usom-onboard-1512-phy.patch b/package/boot/uboot-mvebu/patches/0002-clearfog-reset-usom-onboard-1512-phy.patch deleted file mode 100644 index 164c6f3f2..000000000 --- a/package/boot/uboot-mvebu/patches/0002-clearfog-reset-usom-onboard-1512-phy.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 98848106b9558244ae36a85229caabcdb57d0f7b Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Fri, 23 Sep 2016 13:58:14 +0200 -Subject: [PATCH 2/4] clearfog: reset usom onboard 1512 phy - -Use GPIO19 which is wired to the uSOM phy reset signal in order to reset -the uSOM's 88E81512 gigabit Ethernet phy. - -This GPIO is valid on ClearFog rev 2.1 and newer. - -Signed-off-by: Rabeeh Khoury -[jonas.gorski: adapted to upstream u-boot code] -Signed-off-by: Jonas Gorski ---- - board/solidrun/clearfog/clearfog.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c -index 2773f5957e..3a8257cac3 100644 ---- a/board/solidrun/clearfog/clearfog.c -+++ b/board/solidrun/clearfog/clearfog.c -@@ -131,8 +131,12 @@ int board_init(void) - /* Toggle GPIO41 to reset onboard switch and phy */ - clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); - clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9)); -+ /* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */ -+ clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); -+ clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19)); - mdelay(1); - setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); -+ setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); - mdelay(10); - - /* Init I2C IO expanders */ --- -2.12.2 - diff --git a/package/boot/uboot-mvebu/patches/0003-clearfog-enable-distro-boot-code.patch b/package/boot/uboot-mvebu/patches/0003-clearfog-enable-distro-boot-code.patch deleted file mode 100644 index 97b2d1f25..000000000 --- a/package/boot/uboot-mvebu/patches/0003-clearfog-enable-distro-boot-code.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 9653921eadd5d5268afbee6c928708158fc4e844 Mon Sep 17 00:00:00 2001 -From: Josua Mayer -Date: Tue, 22 Nov 2016 16:33:23 +0100 -Subject: [PATCH 3/4] clearfog: enable distro boot code - -load addresses start at 0x02000000, leaving enough space for fdt, -boot scripts and ramdisk at the end. -Only boot from mmc, the other options are not in working order. -Removed *_high variables in good faith. They can be re-added with sane -values when, and if required. - -Signed-off-by: Josua Mayer ---- - Kconfig | 1 + - include/configs/clearfog.h | 47 +++++++++++++++++++++++++++++++++++++++++----- - 2 files changed, 43 insertions(+), 5 deletions(-) - -diff --git a/Kconfig b/Kconfig -index 81b4226463..f7aec2255b 100644 ---- a/Kconfig -+++ b/Kconfig -@@ -59,6 +59,7 @@ config DISTRO_DEFAULTS - default y if ARCH_LS2080A - default y if ARCH_MESON - default y if ARCH_ROCKCHIP -+ default y if TARGET_CLEARFOG - default n - select CMD_BOOTZ if ARM && !ARM64 - select CMD_BOOTI if ARM64 -diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h -index 0c51d2a288..890dd84b5d 100644 ---- a/include/configs/clearfog.h -+++ b/include/configs/clearfog.h -@@ -79,11 +79,6 @@ - - #define CONFIG_SYS_ALT_MEMTEST - --/* Keep device tree and initrd in lower memory so the kernel can access them */ --#define CONFIG_EXTRA_ENV_SETTINGS \ -- "fdt_high=0x10000000\0" \ -- "initrd_high=0x10000000\0" -- - /* SPL */ - /* - * Select the boot device here -@@ -128,6 +123,48 @@ - #endif - #endif - -+#ifndef CONFIG_SPL_BUILD -+/* -+ * Add standard bootenv from distro boot code: -+ * Keep device tree and initrd in lower memory so the kernel can access them -+ * Set default load addresses: -+ * - 63MiB space for kernel -+ * - 1MiB space for fdt -+ * - 1MiB space for extlinux file, or boot script -+ * - remainder for ramdisk -+ * Keep device tree and initrd in lower memory so the kernel can access them -+ * Set name of fdt file (default to Clearfog Pro) -+ * specify console device -+ */ -+#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "kernel_addr_r=0x02000000\0" \ -+ "fdt_addr_r=0x05f00000\0" \ -+ "pxefile_addr_r=0x06000000\0" \ -+ "scriptaddr=0x06000000\0" \ -+ "ramdisk_addr_r=0x06100000\0" \ -+ "fdt_high=0x10000000\0" \ -+ "initrd_high=0x10000000\0" \ -+ "fdtfile=armada-388-clearfog-pro.dtb\0" \ -+ "console=ttyS0," __stringify(CONFIG_BAUDRATE) "\0" \ -+ BOOTENV -+ -+/* include distro boot code defaults */ -+#include -+ -+/* -+ * specify boot order -+ * sdcard or emmc -> usb -> network -+ */ -+#define BOOT_TARGET_DEVICES(func) \ -+ func(MMC, mmc, 0) \ -+ func(USB, usb, 0) \ -+ func(PXE, pxe, na) \ -+ func(DHCP, dhcp, na) -+ -+/* include the actual distro boot code */ -+#include -+#endif -+ - /* - * mv-common.h should be defined after CMD configs since it used them - * to enable certain macros --- -2.12.2 - diff --git a/package/boot/uboot-mvebu/patches/0004-clearfog-enable-setexpr-command-by-default.patch b/package/boot/uboot-mvebu/patches/0004-clearfog-enable-setexpr-command-by-default.patch deleted file mode 100644 index ca734660e..000000000 --- a/package/boot/uboot-mvebu/patches/0004-clearfog-enable-setexpr-command-by-default.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 7b53a0f5ddf0b1201a09c368b06cd5750d5fbe3a Mon Sep 17 00:00:00 2001 -From: Josua Mayer -Date: Sun, 23 Apr 2017 17:45:11 +0200 -Subject: [PATCH 4/4] clearfog: enable setexpr command by default - -Turns out this command is pretty useful in advanced boot-scripts. --> enable - -Signed-off-by: Josua Mayer ---- - configs/clearfog_defconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/configs/clearfog_defconfig -+++ b/configs/clearfog_defconfig -@@ -23,7 +23,7 @@ CONFIG_CMD_SF=y - CONFIG_CMD_SPI=y - CONFIG_CMD_I2C=y - CONFIG_CMD_USB=y --# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_SETEXPR=y - CONFIG_CMD_TFTPPUT=y - CONFIG_CMD_DHCP=y - CONFIG_CMD_MII=y diff --git a/package/boot/uboot-mvebu/patches/0011-rsa-Fix-build-with-OpenSSL-1.1.x.patch b/package/boot/uboot-mvebu/patches/0011-rsa-Fix-build-with-OpenSSL-1.1.x.patch deleted file mode 100644 index fbbfe462b..000000000 --- a/package/boot/uboot-mvebu/patches/0011-rsa-Fix-build-with-OpenSSL-1.1.x.patch +++ /dev/null @@ -1,153 +0,0 @@ -From 59be82ef7e7ec4be6e1597d8aef65dd3d8c3a0d9 Mon Sep 17 00:00:00 2001 -From: Jelle van der Waa -Date: Mon, 8 May 2017 21:31:19 +0200 -Subject: [PATCH 1/2] rsa: Fix build with OpenSSL 1.1.x - -The rsa_st struct has been made opaque in 1.1.x, add forward compatible -code to access the n, e, d members of rsa_struct. - -EVP_MD_CTX_cleanup has been removed in 1.1.x and EVP_MD_CTX_reset should be -called to reinitialise an already created structure. ---- - lib/rsa/rsa-sign.c | 44 ++++++++++++++++++++++++++++++++++++++------ - 1 file changed, 38 insertions(+), 6 deletions(-) - ---- a/lib/rsa/rsa-sign.c -+++ b/lib/rsa/rsa-sign.c -@@ -9,6 +9,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -20,6 +21,19 @@ - #define HAVE_ERR_REMOVE_THREAD_STATE - #endif - -+#if OPENSSL_VERSION_NUMBER < 0x10100000L -+static void RSA_get0_key(const RSA *r, -+ const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) -+{ -+ if (n != NULL) -+ *n = r->n; -+ if (e != NULL) -+ *e = r->e; -+ if (d != NULL) -+ *d = r->d; -+} -+#endif -+ - static int rsa_err(const char *msg) - { - unsigned long sslErr = ERR_get_error(); -@@ -286,16 +300,22 @@ static int rsa_init(void) - { - int ret; - -+#if OPENSSL_VERSION_NUMBER < 0x10100000L - ret = SSL_library_init(); -+#else -+ ret = OPENSSL_init_ssl(0, NULL); -+#endif - if (!ret) { - fprintf(stderr, "Failure to init SSL library\n"); - return -1; - } -+#if OPENSSL_VERSION_NUMBER < 0x10100000L - SSL_load_error_strings(); - - OpenSSL_add_all_algorithms(); - OpenSSL_add_all_digests(); - OpenSSL_add_all_ciphers(); -+#endif - - return 0; - } -@@ -335,12 +355,15 @@ err_set_rsa: - err_engine_init: - ENGINE_free(e); - err_engine_by_id: -+#if OPENSSL_VERSION_NUMBER < 0x10100000L - ENGINE_cleanup(); -+#endif - return ret; - } - - static void rsa_remove(void) - { -+#if OPENSSL_VERSION_NUMBER < 0x10100000L - CRYPTO_cleanup_all_ex_data(); - ERR_free_strings(); - #ifdef HAVE_ERR_REMOVE_THREAD_STATE -@@ -349,6 +372,7 @@ static void rsa_remove(void) - ERR_remove_state(0); - #endif - EVP_cleanup(); -+#endif - } - - static void rsa_engine_remove(ENGINE *e) -@@ -409,7 +433,11 @@ static int rsa_sign_with_key(RSA *rsa, s - ret = rsa_err("Could not obtain signature"); - goto err_sign; - } -- EVP_MD_CTX_cleanup(context); -+ #if OPENSSL_VERSION_NUMBER < 0x10100000L -+ EVP_MD_CTX_cleanup(context); -+ #else -+ EVP_MD_CTX_reset(context); -+ #endif - EVP_MD_CTX_destroy(context); - EVP_PKEY_free(key); - -@@ -479,6 +507,7 @@ static int rsa_get_exponent(RSA *key, ui - { - int ret; - BIGNUM *bn_te; -+ const BIGNUM *key_e; - uint64_t te; - - ret = -EINVAL; -@@ -487,17 +516,18 @@ static int rsa_get_exponent(RSA *key, ui - if (!e) - goto cleanup; - -- if (BN_num_bits(key->e) > 64) -+ RSA_get0_key(key, NULL, &key_e, NULL); -+ if (BN_num_bits(key_e) > 64) - goto cleanup; - -- *e = BN_get_word(key->e); -+ *e = BN_get_word(key_e); - -- if (BN_num_bits(key->e) < 33) { -+ if (BN_num_bits(key_e) < 33) { - ret = 0; - goto cleanup; - } - -- bn_te = BN_dup(key->e); -+ bn_te = BN_dup(key_e); - if (!bn_te) - goto cleanup; - -@@ -527,6 +557,7 @@ int rsa_get_params(RSA *key, uint64_t *e - { - BIGNUM *big1, *big2, *big32, *big2_32; - BIGNUM *n, *r, *r_squared, *tmp; -+ const BIGNUM *key_n; - BN_CTX *bn_ctx = BN_CTX_new(); - int ret = 0; - -@@ -548,7 +579,8 @@ int rsa_get_params(RSA *key, uint64_t *e - if (0 != rsa_get_exponent(key, exponent)) - ret = -1; - -- if (!BN_copy(n, key->n) || !BN_set_word(big1, 1L) || -+ RSA_get0_key(key, &key_n, NULL, NULL); -+ if (!BN_copy(n, key_n) || !BN_set_word(big1, 1L) || - !BN_set_word(big2, 2L) || !BN_set_word(big32, 32L)) - ret = -1; - diff --git a/package/boot/uboot-mvebu/patches/0012-tools-kwbimage-fix-build-with-OpenSSL-1.1.x.patch b/package/boot/uboot-mvebu/patches/0012-tools-kwbimage-fix-build-with-OpenSSL-1.1.x.patch deleted file mode 100644 index 882969905..000000000 --- a/package/boot/uboot-mvebu/patches/0012-tools-kwbimage-fix-build-with-OpenSSL-1.1.x.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 65030804dc57f3488e4ffe21e72fc65cd245cb98 Mon Sep 17 00:00:00 2001 -From: Jelle van der Waa -Date: Mon, 8 May 2017 21:31:20 +0200 -Subject: [PATCH 2/2] tools: kwbimage fix build with OpenSSL 1.1.x - -The rsa_st struct has been made opaque in 1.1.x, add forward compatible -code to access the n, e, d members of rsa_struct. - -EVP_MD_CTX_cleanup has been removed in 1.1.x and EVP_MD_CTX_reset should be -called to reinitialise an already created structure. - -Signed-off-by: Jelle van der Waa ---- - tools/kwbimage.c | 36 ++++++++++++++++++++++++++++++------ - 1 file changed, 30 insertions(+), 6 deletions(-) - ---- a/tools/kwbimage.c -+++ b/tools/kwbimage.c -@@ -18,10 +18,30 @@ - #include "kwbimage.h" - - #ifdef CONFIG_KWB_SECURE -+#include - #include - #include - #include - #include -+ -+#if OPENSSL_VERSION_NUMBER < 0x10100000L -+static void RSA_get0_key(const RSA *r, -+ const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) -+{ -+ if (n != NULL) -+ *n = r->n; -+ if (e != NULL) -+ *e = r->e; -+ if (d != NULL) -+ *d = r->d; -+} -+ -+#else -+void EVP_MD_CTX_cleanup(EVP_MD_CTX *ctx) -+{ -+ EVP_MD_CTX_reset(ctx); -+} -+#endif - #endif - - static struct image_cfg_element *image_cfg; -@@ -470,12 +490,16 @@ static int kwb_export_pubkey(RSA *key, s - char *keyname) - { - int size_exp, size_mod, size_seq; -+ const BIGNUM *key_e, *key_n; - uint8_t *cur; - char *errmsg = "Failed to encode %s\n"; - -- if (!key || !key->e || !key->n || !dst) { -+ RSA_get0_key(key, NULL, &key_e, NULL); -+ RSA_get0_key(key, &key_n, NULL, NULL); -+ -+ if (!key || !key_e || !key_n || !dst) { - fprintf(stderr, "export pk failed: (%p, %p, %p, %p)", -- key, key->e, key->n, dst); -+ key, key_e, key_n, dst); - fprintf(stderr, errmsg, keyname); - return -EINVAL; - } -@@ -490,8 +514,8 @@ static int kwb_export_pubkey(RSA *key, s - * do the encoding manually. - */ - -- size_exp = BN_num_bytes(key->e); -- size_mod = BN_num_bytes(key->n); -+ size_exp = BN_num_bytes(key_e); -+ size_mod = BN_num_bytes(key_n); - size_seq = 4 + size_mod + 4 + size_exp; - - if (size_mod > 256) { -@@ -520,14 +544,14 @@ static int kwb_export_pubkey(RSA *key, s - *cur++ = 0x82; - *cur++ = (size_mod >> 8) & 0xFF; - *cur++ = size_mod & 0xFF; -- BN_bn2bin(key->n, cur); -+ BN_bn2bin(key_n, cur); - cur += size_mod; - /* Exponent */ - *cur++ = 0x02; /* INTEGER */ - *cur++ = 0x82; - *cur++ = (size_exp >> 8) & 0xFF; - *cur++ = size_exp & 0xFF; -- BN_bn2bin(key->e, cur); -+ BN_bn2bin(key_e, cur); - - if (hashf) { - struct hash_v1 pk_hash; diff --git a/package/boot/uboot-mxs/Makefile b/package/boot/uboot-mxs/Makefile index 92cf9e6b2..cd752bb81 100644 --- a/package/boot/uboot-mxs/Makefile +++ b/package/boot/uboot-mxs/Makefile @@ -8,10 +8,10 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2016.01 +PKG_VERSION:=2017.11 PKG_RELEASE:=1 -PKG_HASH:=e5792fba9399d9804aa2ef667f14ff771e2cdece72367d340250265bf095a5d5 +PKG_HASH:=6a018fd3caf58f3dcfa23ee989a82bd35df03af71872b9dca8c6d758a0d26c05 include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk diff --git a/package/boot/uboot-mxs/patches/001-add-i2se-duckbill.patch b/package/boot/uboot-mxs/patches/001-add-i2se-duckbill.patch index 91f583f36..1ad67fbba 100644 --- a/package/boot/uboot-mxs/patches/001-add-i2se-duckbill.patch +++ b/package/boot/uboot-mxs/patches/001-add-i2se-duckbill.patch @@ -1,20 +1,40 @@ -From 4d9a32780ec795b9edc83c7b3a1e947cec49a5a4 Mon Sep 17 00:00:00 2001 +From 25de6430219d3f3698d709c10358fbea17b24cf1 Mon Sep 17 00:00:00 2001 From: Michael Heimpold -Date: Sat, 15 Aug 2015 20:26:18 +0200 -Subject: [PATCH] Add support for I2SE Duckbill boards +Date: Fri, 21 Apr 2017 11:08:19 +0200 +Subject: [PATCH] arm: mxs: add support for I2SE's Duckbill boards + +The Duckbill devices are small, pen-drive sized boards based on +NXP's i.MX28 SoC. While the initial variants (Duckbill series) were +equipped with a micro SD card slot only, the latest generation +(Duckbill 2 series) have an additional internal eMMC onboard. + +Both device generations consists of four "family members": + +- Duckbill/Duckbill 2: generic board, intended to be used as + baseboard for custom designs and/or as development board + +- Duckbill EnOcean/Duckbill 2 EnOcean: come with an EnOcean + daugther board equipped with the popular TCM310 module + +- Duckbill 485/Duckbill 2 485: as the name implies, these + devices are intended to be used as Ethernet - RS485 converters + +- Duckbill SPI/Duckbill 2 SPI: not sold separately, but used + in I2SE's development kits for Green PHY HomePlug Powerline + communication Signed-off-by: Michael Heimpold +Signed-off-by: Stefan Wahren --- - arch/arm/Kconfig | 6 ++ - arch/arm/include/asm/mach-types.h | 13 +++ - board/i2se/duckbill/Kconfig | 15 ++++ - board/i2se/duckbill/MAINTAINERS | 6 ++ - board/i2se/duckbill/Makefile | 12 +++ - board/i2se/duckbill/duckbill.c | 112 +++++++++++++++++++++++ - board/i2se/duckbill/iomux.c | 125 ++++++++++++++++++++++++++ - configs/duckbill_defconfig | 9 ++ - include/configs/duckbill.h | 177 +++++++++++++++++++++++++++++++++++++ - 9 files changed, 475 insertions(+) + arch/arm/Kconfig | 9 +- + board/i2se/duckbill/Kconfig | 15 +++ + board/i2se/duckbill/MAINTAINERS | 6 ++ + board/i2se/duckbill/Makefile | 12 +++ + board/i2se/duckbill/duckbill.c | 181 ++++++++++++++++++++++++++++++++++++ + board/i2se/duckbill/iomux.c | 157 +++++++++++++++++++++++++++++++ + configs/duckbill_defconfig | 31 +++++++ + include/configs/duckbill.h | 199 ++++++++++++++++++++++++++++++++++++++++ + 8 files changed, 609 insertions(+), 1 deletion(-) create mode 100644 board/i2se/duckbill/Kconfig create mode 100644 board/i2se/duckbill/MAINTAINERS create mode 100644 board/i2se/duckbill/Makefile @@ -25,55 +45,36 @@ Signed-off-by: Michael Heimpold --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig -@@ -178,6 +178,11 @@ config TARGET_MX28EVK - select CPU_ARM926EJS +@@ -373,6 +373,12 @@ config TARGET_MX28EVK select SUPPORT_SPL + select BOARD_EARLY_INIT_F +config TARGET_DUCKBILL -+ bool "Support I2SE Duckbill" ++ bool "Support duckbill" + select CPU_ARM926EJS + select SUPPORT_SPL ++ select BOARD_EARLY_INIT_F + config TARGET_MX23_OLINUXINO bool "Support mx23_olinuxino" select CPU_ARM926EJS -@@ -926,6 +931,7 @@ source "board/genesi/mx51_efikamx/Kconfi - source "board/gumstix/pepper/Kconfig" +@@ -1250,6 +1256,7 @@ source "board/gumstix/pepper/Kconfig" source "board/h2200/Kconfig" source "board/hisilicon/hikey/Kconfig" + source "board/hisilicon/poplar/Kconfig" +source "board/i2se/duckbill/Kconfig" source "board/imx31_phycore/Kconfig" - source "board/isee/igep0033/Kconfig" - source "board/maxbcm/Kconfig" ---- a/arch/arm/include/asm/mach-types.h -+++ b/arch/arm/include/asm/mach-types.h -@@ -1109,6 +1109,7 @@ extern unsigned int __machine_arch_type; - #define MACH_TYPE_COLIBRI_T30 4493 - #define MACH_TYPE_APALIS_T30 4513 - #define MACH_TYPE_OMAPL138_LCDK 2495 -+#define MACH_TYPE_DUCKBILL 4754 + source "board/isee/igep003x/Kconfig" + source "board/olimex/mx23_olinuxino/Kconfig" +@@ -1279,7 +1286,7 @@ source "arch/arm/Kconfig.debug" + endmenu - #ifdef CONFIG_ARCH_EBSA110 - # ifdef machine_arch_type -@@ -14262,6 +14263,18 @@ extern unsigned int __machine_arch_type; - # define machine_is_apalis_t30() (0) - #endif + config SPL_LDSCRIPT +- default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if TARGET_APX4DEVKIT || TARGET_BG0900 || TARGET_M28EVK || TARGET_MX23_OLINUXINO || TARGET_MX23EVK || TARGET_MX28EVK || TARGET_SANSA_FUZE_PLUS || TARGET_SC_SPS_1 || TARGET_TS4600 || TARGET_XFI3 ++ default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if TARGET_APX4DEVKIT || TARGET_BG0900 || TARGET_M28EVK || TARGET_MX23_OLINUXINO || TARGET_MX23EVK || TARGET_MX28EVK || TARGET_DUCKBILL || TARGET_SANSA_FUZE_PLUS || TARGET_SC_SPS_1 || TARGET_TS4600 || TARGET_XFI3 + default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 + default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 -+#ifdef CONFIG_MACH_DUCKBILL -+# ifdef machine_arch_type -+# undef machine_arch_type -+# define machine_arch_type __machine_arch_type -+# else -+# define machine_arch_type MACH_TYPE_DUCKBILL -+# endif -+# define machine_is_duckbill() (machine_arch_type == MACH_TYPE_DUCKBILL) -+#else -+# define machine_is_duckbill() (0) -+#endif -+ - /* - * These have not yet been registered - */ --- /dev/null +++ b/board/i2se/duckbill/Kconfig @@ -0,0 +1,15 @@ @@ -105,7 +106,7 @@ Signed-off-by: Michael Heimpold +++ b/board/i2se/duckbill/Makefile @@ -0,0 +1,12 @@ +# -+# (C) Copyright 2014-2015 ++# (C) Copyright 2014-2017 +# Michael Heimpold, mhei@heimpold.de. +# +# SPDX-License-Identifier: GPL-2.0+ @@ -118,11 +119,11 @@ Signed-off-by: Michael Heimpold +endif --- /dev/null +++ b/board/i2se/duckbill/duckbill.c -@@ -0,0 +1,112 @@ +@@ -0,0 +1,181 @@ +/* + * I2SE Duckbill board + * -+ * (C) Copyright 2014-2015 Michael Heimpold ++ * (C) Copyright 2014-2017 Michael Heimpold + * + * SPDX-License-Identifier: GPL-2.0+ + */ @@ -134,17 +135,19 @@ Signed-off-by: Michael Heimpold +#include +#include +#include ++#include ++#include +#include +#include +#include +#include -+ -+#define GPIO_PHY_RESET MX28_PAD_SSP0_DATA7__GPIO_2_7 -+#define GPIO_LED_GREEN MX28_PAD_AUART1_TX__GPIO_3_5 -+#define GPIO_LED_RED MX28_PAD_AUART1_RX__GPIO_3_4 ++#include + +DECLARE_GLOBAL_DATA_PTR; + ++static u32 system_rev; ++static u32 serialno; ++ +/* + * Functions + */ @@ -184,14 +187,20 @@ Signed-off-by: Michael Heimpold +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ ++ unsigned int reset_gpio; + int ret; + + ret = cpu_eth_init(bis); + ++ if (system_rev == 1) ++ reset_gpio = MX28_PAD_SSP0_DATA7__GPIO_2_7; ++ else ++ reset_gpio = MX28_PAD_GPMI_ALE__GPIO_0_26; ++ + /* Reset PHY */ -+ gpio_direction_output(GPIO_PHY_RESET, 0); ++ gpio_direction_output(reset_gpio, 0); + udelay(200); -+ gpio_set_value(GPIO_PHY_RESET, 1); ++ gpio_set_value(reset_gpio, 1); + + /* give PHY some time to get out of the reset */ + udelay(10000); @@ -209,20 +218,81 @@ Signed-off-by: Michael Heimpold +{ + mac[0] = 0x00; + mac[1] = 0x01; ++ mac[2] = 0x87; ++} ++#endif + -+ if (dev_id == 1) /* Let MAC1 be MAC0 + 1 by default */ -+ mac[5] += 1; ++#ifdef CONFIG_OF_BOARD_SETUP ++int ft_board_setup(void *blob, bd_t *bd) ++{ ++ uint8_t enetaddr[6]; ++ u32 mac = 0; ++ ++ enetaddr[0] = 0x00; ++ enetaddr[1] = 0x01; ++ enetaddr[2] = 0x87; ++ ++#ifdef CONFIG_MXS_OCOTP ++ /* only Duckbill SPI has a MAC for the QCA7k */ ++ fuse_read(0, 1, &mac); ++#endif ++ ++ if (mac != 0) { ++ enetaddr[3] = (mac >> 16) & 0xff; ++ enetaddr[4] = (mac >> 8) & 0xff; ++ enetaddr[5] = mac & 0xff; ++ ++ fdt_find_and_setprop(blob, ++ "/apb@80000000/apbh@80000000/ssp@80014000/ethernet@0", ++ "local-mac-address", enetaddr, 6, 1); ++ } ++ ++ return 0; ++} ++#endif ++ ++#ifdef CONFIG_REVISION_TAG ++u32 get_board_rev(void) ++{ ++ return system_rev; ++} ++#endif ++ ++#ifdef CONFIG_SERIAL_TAG ++void get_board_serial(struct tag_serialnr *serialnr) ++{ ++ serialnr->low = serialno; ++ serialnr->high = 0; +} +#endif + +int misc_init_r(void) +{ -+ char *s = getenv("serial#"); ++ unsigned int led_red_gpio; ++ char *s; ++ ++ /* Board revision detection */ ++ gpio_direction_input(MX28_PAD_LCD_D17__GPIO_1_17); ++ ++ /* MX28_PAD_LCD_D17__GPIO_1_17: v1 = pull-down, v2 = pull-up */ ++ system_rev = ++ gpio_get_value(MX28_PAD_LCD_D17__GPIO_1_17); ++ system_rev += 1; + + /* enable red LED to indicate a running bootloader */ -+ gpio_direction_output(GPIO_LED_RED, 1); ++ if (system_rev == 1) ++ led_red_gpio = MX28_PAD_AUART1_RX__GPIO_3_4; ++ else ++ led_red_gpio = MX28_PAD_SAIF0_LRCLK__GPIO_3_21; ++ gpio_direction_output(led_red_gpio, 1); + -+ puts("Board: I2SE Duckbill\n"); ++ if (system_rev == 1) ++ puts("Board: I2SE Duckbill\n"); ++ else ++ puts("Board: I2SE Duckbill 2\n"); ++ ++ serialno = env_get_ulong("serial#", 10, 0); ++ s = env_get("serial#"); + if (s && s[0]) { + puts("Serial: "); + puts(s); @@ -233,11 +303,11 @@ Signed-off-by: Michael Heimpold +} --- /dev/null +++ b/board/i2se/duckbill/iomux.c -@@ -0,0 +1,125 @@ +@@ -0,0 +1,157 @@ +/* + * I2SE Duckbill IOMUX setup + * -+ * Copyright (C) 2013-2015 Michael Heimpold ++ * Copyright (C) 2013-2017 Michael Heimpold + * + * SPDX-License-Identifier: GPL-2.0+ + */ @@ -245,6 +315,7 @@ Signed-off-by: Michael Heimpold +#include +#include +#include ++#include +#include +#include +#include @@ -253,12 +324,13 @@ Signed-off-by: Michael Heimpold +#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP) +#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL) + ++/* For all revisions */ +const iomux_cfg_t iomux_setup[] = { + /* DUART */ + MX28_PAD_PWM0__DUART_RX, + MX28_PAD_PWM1__DUART_TX, + -+ /* SD card */ ++ /* eMMC (v2) or SD card (v1) */ + MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0, + MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0, @@ -280,10 +352,6 @@ Signed-off-by: Michael Heimpold + MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET, + MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET, + -+ /* PHY reset */ -+ MX28_PAD_SSP0_DATA7__GPIO_2_7 | -+ (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), -+ + /* EMI */ + MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI, + MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI, @@ -336,11 +404,38 @@ Signed-off-by: Michael Heimpold + MX28_PAD_EMI_CE1N__EMI_CE1N | MUX_CONFIG_EMI, + MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI, + ++ /* Revision pin(s) */ ++ MX28_PAD_LCD_D17__GPIO_1_17, ++}; ++ ++/* For revision 1 only */ ++const iomux_cfg_t iomux_setup_v1[] = { ++ /* PHY reset */ ++ MX28_PAD_SSP0_DATA7__GPIO_2_7 | ++ (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), ++ + /* LEDs */ + MX28_PAD_AUART1_RX__GPIO_3_4, + MX28_PAD_AUART1_TX__GPIO_3_5, +}; + ++/* For revision 2 only */ ++const iomux_cfg_t iomux_setup_v2[] = { ++ /* eMMC (v2) */ ++ MX28_PAD_SSP0_DATA4__SSP0_D4 | MUX_CONFIG_SSP0, ++ MX28_PAD_SSP0_DATA5__SSP0_D5 | MUX_CONFIG_SSP0, ++ MX28_PAD_SSP0_DATA6__SSP0_D6 | MUX_CONFIG_SSP0, ++ MX28_PAD_SSP0_DATA7__SSP0_D7 | MUX_CONFIG_SSP0, ++ ++ /* PHY reset */ ++ MX28_PAD_GPMI_ALE__GPIO_0_26 | ++ (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), ++ ++ /* LEDs */ ++ MX28_PAD_SAIF0_LRCLK__GPIO_3_21, ++ MX28_PAD_SAIF0_MCLK__GPIO_3_20, ++}; ++ +#define HW_DRAM_CTL29 (0x74 >> 2) +#define CS_MAP 0xf +#define COLUMN_SIZE 0x2 @@ -358,22 +453,51 @@ Signed-off-by: Michael Heimpold +void board_init_ll(const uint32_t arg, const uint32_t *resptr) +{ + mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup)); ++ ++ gpio_direction_input(MX28_PAD_LCD_D17__GPIO_1_17); ++ ++ if (gpio_get_value(MX28_PAD_LCD_D17__GPIO_1_17)) ++ mxs_iomux_setup_multiple_pads(iomux_setup_v2, ARRAY_SIZE(iomux_setup_v2)); ++ else ++ mxs_iomux_setup_multiple_pads(iomux_setup_v1, ARRAY_SIZE(iomux_setup_v1)); +} --- /dev/null +++ b/configs/duckbill_defconfig -@@ -0,0 +1,9 @@ +@@ -0,0 +1,31 @@ +CONFIG_ARM=y +CONFIG_TARGET_DUCKBILL=y ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_BOOTDELAY=1 ++# CONFIG_CONSOLE_MUX is not set ++CONFIG_SYS_CONSOLE_IS_IN_ENV=y ++CONFIG_VERSION_VARIABLE=y ++# CONFIG_DISPLAY_BOARDINFO is not set ++# CONFIG_EFI_LOADER is not set ++CONFIG_ARCH_MISC_INIT=y +CONFIG_SPL=y -+CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC" ++CONFIG_HUSH_PARSER=y ++CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set -+# CONFIG_SPI_FLASH is not set -+# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_MII=y +CONFIG_CMD_PING=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_EXT4_WRITE=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_MMC_MXS=y ++CONFIG_OF_LIBFDT=y --- /dev/null +++ b/include/configs/duckbill.h -@@ -0,0 +1,177 @@ +@@ -0,0 +1,199 @@ +/* + * Copyright (C) 2014-2015 Michael Heimpold + * @@ -391,22 +515,7 @@ Signed-off-by: Michael Heimpold +#define CONFIG_SYS_MXS_VDD5V_ONLY + +/* U-Boot Commands */ -+#define CONFIG_SYS_NO_FLASH -+#define CONFIG_DISPLAY_CPUINFO -+#define CONFIG_DOS_PARTITION -+ -+#define CONFIG_CMD_BOOTZ -+#define CONFIG_CMD_CACHE -+#define CONFIG_CMD_DHCP -+#define CONFIG_CMD_EXT4 -+#define CONFIG_CMD_EXT4_WRITE -+#define CONFIG_CMD_FAT +#define CONFIG_CMD_FUSE -+#define CONFIG_CMD_GPIO -+#define CONFIG_CMD_I2C -+#define CONFIG_CMD_MII -+#define CONFIG_CMD_MMC -+#define CONFIG_CMD_SPI +#define CONFIG_CMD_UNZIP + +/* Memory configuration */ @@ -417,7 +526,6 @@ Signed-off-by: Michael Heimpold + +/* Environment is in MMC */ +#define CONFIG_ENV_OVERWRITE -+#define CONFIG_ENV_IS_IN_MMC 1 +#define CONFIG_ENV_SIZE (128 * 1024) +#define CONFIG_ENV_OFFSET (128 * 1024) +#define CONFIG_ENV_OFFSET_REDUND (256 * 1024) @@ -454,29 +562,70 @@ Signed-off-by: Michael Heimpold +#define CONFIG_BOOTFILE "zImage" +#define CONFIG_LOADADDR 0x42000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR ++#define CONFIG_REVISION_TAG ++#define CONFIG_SERIAL_TAG ++#define CONFIG_OF_BOARD_SETUP ++#define CONFIG_BOOT_RETRY_TIME 120 /* retry autoboot after 120 seconds */ ++#define CONFIG_AUTOBOOT_KEYED ++#define CONFIG_AUTOBOOT_PROMPT "Autobooting in %d seconds, " \ ++ "press to stop\n" ++#define CONFIG_AUTOBOOT_DELAY_STR "\x63" /* allows retry after retry time */ ++#define CONFIG_AUTOBOOT_STOP_STR " " /* stop autoboot with */ ++#define CONFIG_RESET_TO_RETRY /* reset board to retry booting */ + +/* Extra Environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ -+ "update_sd_firmware_filename=openwrt-mxs-root.ext4\0" \ -+ "update_sd_firmware=" \ ++ "mmc_part2_offset=1000\0" \ ++ "mmc_part3_offset=19000\0" \ ++ "update_openwrt_firmware_filename=openwrt-mxs-root.ext4\0" \ ++ "update_openwrt_firmware=" \ + "if mmc rescan; then " \ -+ "if tftp ${update_sd_firmware_filename}; then " \ -+ "setexpr fw_sz ${filesize} / 200; " \ -+ "setexpr fw_sz ${fw_sz} + 1; " \ -+ "mmc dev ${mmcdev} 3; " \ -+ "mmc write ${loadaddr} 0 ${fw_sz}; " \ -+ "mmc dev ${mmcdev} 2; " \ -+ "mmc write ${loadaddr} 0 ${fw_sz}; " \ -+ "mmc dev ${mmcdev}; " \ -+ "fi; " \ ++ "if tftp ${update_openwrt_firmware_filename}; then " \ ++ "setexpr fw_sz ${filesize} + 1ff; " \ ++ "setexpr fw_sz ${fw_sz} / 200; " \ ++ "mmc write ${loadaddr} ${mmc_part2_offset} ${fw_sz}; " \ ++ "mmc write ${loadaddr} ${mmc_part3_offset} ${fw_sz}; " \ ++ "fi; " \ + "fi\0" \ ++ "update_fw_filename_prefix=emmc.img.\0" \ ++ "update_fw_filename_suffix=.gz\0" \ ++ "update_fw_parts=0x6\0" \ ++ "update_fw_fsize_uncompressed=4000000\0" \ ++ "gzwrite_wbuf=100000\0" \ ++ "update_emmc_firmware=" \ ++ "setexpr i ${update_fw_parts}; setexpr error 0; " \ ++ "while itest ${i} -gt 0; do " \ ++ "echo Transfering firmware image part ${i} of ${update_fw_parts}; " \ ++ "if itest ${i} -le 9; then " \ ++ "setenv j 0${i}; " \ ++ "else " \ ++ "setenv j ${i}; " \ ++ "fi; " \ ++ "if tftp ${loadaddr} ${update_fw_basedir}${update_fw_filename_prefix}${j}${update_fw_filename_suffix}; then " \ ++ "setexpr k ${i} - 1; " \ ++ "setexpr offset ${update_fw_fsize_uncompressed} * ${k}; " \ ++ "if gzwrite mmc ${mmcdev} ${loadaddr} ${filesize} ${gzwrite_wbuf} ${offset}; then " \ ++ "setexpr i ${i} - 1; " \ ++ "else " \ ++ "setexpr i 0; " \ ++ "setexpr error 1; " \ ++ "fi; " \ ++ "else " \ ++ "setexpr i 0; " \ ++ "setexpr error 1; " \ ++ "fi; " \ ++ "done; setenv i; setenv j; setenv k; setenv fsize; setenv filesize; setenv offset; " \ ++ "if test ${error} -eq 1; then " \ ++ "echo Firmware Update FAILED; " \ ++ "else " \ ++ "echo Firmware Update OK; " \ ++ "fi; setenv error\0" \ + "erase_mmc=mmc erase 0 2\0" \ + "erase_env1=mmc erase 100 100\0" \ + "erase_env2=mmc erase 200 100\0" \ -+ "script=boot.scr\0" \ + "image=zImage\0" \ + "console=ttyAMA0\0" \ -+ "fdt_file=imx28-duckbill.dtb\0" \ ++ "fdt_file=imx28-duckbill-2.dtb\0" \ + "fdt_addr=0x41000000\0" \ + "boot_fdt=try\0" \ + "ip_dyn=yes\0" \ @@ -487,10 +636,6 @@ Signed-off-by: Michael Heimpold + "mmcargs=setenv bootargs console=${console},${baudrate} " \ + "root=${mmcroot} " \ + "rootwait bootsys=${bootsys} panic=1\0" \ -+ "loadbootscript=" \ -+ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ -+ "bootscript=echo Running bootscript from mmc ...; " \ -+ "source\0" \ + "loadimage=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} /boot/${image}\0" \ + "loadfdt=ext4load mmc ${mmcdev}:${mmcpart} ${fdt_addr} /boot/${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ @@ -509,7 +654,8 @@ Signed-off-by: Michael Heimpold + "fi; " \ + "else " \ + "bootz; " \ -+ "fi;\0" \ ++ "fi\0" \ ++ "nfsroot=/\0" \ + "netargs=setenv bootargs console=${console},${baudrate} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ @@ -521,7 +667,7 @@ Signed-off-by: Michael Heimpold + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${image}; " \ -+ "if test ${boot_fdt} = yes; then " \ ++ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "bootz ${loadaddr} - ${fdt_addr}; " \ + "else " \ @@ -533,19 +679,19 @@ Signed-off-by: Michael Heimpold + "fi; " \ + "else " \ + "bootz; " \ -+ "fi;\0" ++ "fi\0" + +#define CONFIG_BOOTCOMMAND \ -+ "mmc dev ${mmcdev}; if mmc rescan; then " \ -+ "if run loadbootscript; then " \ -+ "run bootscript; " \ ++ "mmc dev ${mmcdev}; " \ ++ "if mmc rescan; then " \ ++ "if run loadimage; then " \ ++ "run mmcboot; " \ + "else " \ -+ "if run loadimage; then " \ -+ "run mmcboot; " \ -+ "else run netboot; " \ -+ "fi; " \ ++ "run netboot; " \ + "fi; " \ -+ "else run netboot; fi" ++ "else " \ ++ "run netboot; " \ ++ "fi" + +/* The rest of the configuration is shared */ +#include diff --git a/package/boot/uboot-mxs/patches/002-tools-mxsimage-Support-building-with-LibreSSL.patch b/package/boot/uboot-mxs/patches/002-tools-mxsimage-Support-building-with-LibreSSL.patch new file mode 100644 index 000000000..c99c53863 --- /dev/null +++ b/package/boot/uboot-mxs/patches/002-tools-mxsimage-Support-building-with-LibreSSL.patch @@ -0,0 +1,35 @@ +From 74e3ace3495b73f6e592e92eca18175cccdb5a24 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Sat, 17 Feb 2018 15:34:19 +0100 +Subject: [PATCH v2] tools/mxsimage: Support building with LibreSSL + +The mxsimage utility fails to compile against LibreSSL because LibreSSL +says it is OpenSSL 2.0, but it does not support the complete OpenSSL 1.1 +interface. + +LibreSSL defines OPENSSL_VERSION_NUMBER with 0x20000000L and therefor +claims to have an API compatible with OpenSSL 2.0, but it does not +implement OPENSSL_zalloc() and some other functions in its most recent +version. OpenSSL implements this function since version 1.1.0. + +This commit will activate the compatibility code meant for +OpenSSL < 1.1.0 also for all versions of LibreSSL, if some version of +LibreSSL will support these functions in the future the version check +should be adapted. + +Signed-off-by: Hauke Mehrtens +--- + tools/mxsimage.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/tools/mxsimage.c ++++ b/tools/mxsimage.c +@@ -26,7 +26,7 @@ + * OpenSSL 1.1.0 and newer compatibility functions: + * https://wiki.openssl.org/index.php/1.1_API_Changes + */ +-#if OPENSSL_VERSION_NUMBER < 0x10100000L ++#if OPENSSL_VERSION_NUMBER < 0x10100000L || defined(LIBRESSL_VERSION_NUMBER) + static void *OPENSSL_zalloc(size_t num) + { + void *ret = OPENSSL_malloc(num); diff --git a/package/boot/uboot-omap/Makefile b/package/boot/uboot-omap/Makefile index 9084f3740..0d5260d12 100644 --- a/package/boot/uboot-omap/Makefile +++ b/package/boot/uboot-omap/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_VERSION:=2017.01 -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_HASH:=6c425175f93a4bcf2ec9faf5658ef279633dbd7856a293d95bd1ff516528ecf2 diff --git a/package/boot/uboot-omap/patches/105-serial-ns16550-bugfix-ns16550-fifo-not-enabled.patch b/package/boot/uboot-omap/patches/105-serial-ns16550-bugfix-ns16550-fifo-not-enabled.patch new file mode 100644 index 000000000..513efaf74 --- /dev/null +++ b/package/boot/uboot-omap/patches/105-serial-ns16550-bugfix-ns16550-fifo-not-enabled.patch @@ -0,0 +1,309 @@ +From 17fa032671f7981628fe16b30399638842a4b1bb Mon Sep 17 00:00:00 2001 +From: Heiko Schocher +Date: Wed, 18 Jan 2017 08:05:49 +0100 +Subject: [PATCH] serial, ns16550: bugfix: ns16550 fifo not enabled + +commit: 65f83802b7a5b "serial: 16550: Add getfcr accessor" +breaks u-boot commandline working with long commands +sending to the board. + +Since the above patch, you have to setup the fcr register. + +For board/archs which enable OF_PLATDATA, the new field +fcr in struct ns16550_platdata is not filled with a +default value ... + +This leads in not setting up the uarts fifo, which ends +in problems, when you send long commands to u-boots +commandline. + +Detected this issue with automated tbot tests on am335x +based shc board. + +The error does not popup, if you type commands. You need +to copy&paste a long command to u-boots commandshell +(or send a long command with tbot) + +Possible boards/plattforms with problems: +./arch/arm/cpu/arm926ejs/lpc32xx/devices.c +./arch/arm/mach-tegra/board.c +./board/overo/overo.c +./board/quipos/cairo/cairo.c +./board/logicpd/omap3som/omap3logic.c +./board/logicpd/zoom1/zoom1.c +./board/timll/devkit8000/devkit8000.c +./board/lg/sniper/sniper.c +./board/ti/beagle/beagle.c +./drivers/serial/serial_rockchip.c + +Signed-off-by: Heiko Schocher +Signed-off-by: Ladislav Michl +Tested-by: Adam Ford +Reviewed-by: Tom Rini +--- + arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 12 ++++++++---- + arch/arm/mach-omap2/am33xx/board.c | 18 ++++++++++++------ + arch/arm/mach-tegra/board.c | 1 + + board/isee/igep00x0/igep00x0.c | 3 ++- + board/lg/sniper/sniper.c | 3 ++- + board/logicpd/omap3som/omap3logic.c | 3 ++- + board/logicpd/zoom1/zoom1.c | 3 ++- + board/overo/overo.c | 3 ++- + board/quipos/cairo/cairo.c | 3 ++- + board/ti/beagle/beagle.c | 3 ++- + board/timll/devkit8000/devkit8000.c | 3 ++- + drivers/serial/ns16550.c | 9 +++------ + drivers/serial/serial_rockchip.c | 1 + + include/ns16550.h | 5 +++++ + 14 files changed, 46 insertions(+), 24 deletions(-) + +diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c +index 399b07c5420a..f744398ca7ad 100644 +--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c ++++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c +@@ -45,10 +45,14 @@ void lpc32xx_uart_init(unsigned int uart_id) + + #if !CONFIG_IS_ENABLED(OF_CONTROL) + static const struct ns16550_platdata lpc32xx_uart[] = { +- { .base = UART3_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, +- { .base = UART4_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, +- { .base = UART5_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, +- { .base = UART6_BASE, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, ++ { .base = UART3_BASE, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, ++ { .base = UART4_BASE, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, ++ { .base = UART5_BASE, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, ++ { .base = UART6_BASE, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, + }; + + #if defined(CONFIG_LPC32XX_HSUART) +diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c +index 73824df18fa7..190310fd0079 100644 +--- a/arch/arm/mach-omap2/am33xx/board.c ++++ b/arch/arm/mach-omap2/am33xx/board.c +@@ -40,14 +40,20 @@ DECLARE_GLOBAL_DATA_PTR; + + #if !CONFIG_IS_ENABLED(OF_CONTROL) + static const struct ns16550_platdata am33xx_serial[] = { +- { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, ++ { .base = CONFIG_SYS_NS16550_COM1, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, + # ifdef CONFIG_SYS_NS16550_COM2 +- { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, ++ { .base = CONFIG_SYS_NS16550_COM2, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, + # ifdef CONFIG_SYS_NS16550_COM3 +- { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, +- { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, +- { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, +- { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, .clock = CONFIG_SYS_NS16550_CLK }, ++ { .base = CONFIG_SYS_NS16550_COM3, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, ++ { .base = CONFIG_SYS_NS16550_COM4, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, ++ { .base = CONFIG_SYS_NS16550_COM5, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, ++ { .base = CONFIG_SYS_NS16550_COM6, .reg_shift = 2, ++ .clock = CONFIG_SYS_NS16550_CLK, .fcr = UART_FCR_DEFVAL, }, + # endif + # endif + }; +diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c +index 3d1d26d13d13..b3a041b539af 100644 +--- a/arch/arm/mach-tegra/board.c ++++ b/arch/arm/mach-tegra/board.c +@@ -219,6 +219,7 @@ static struct ns16550_platdata ns16550_com1_pdata = { + .base = CONFIG_SYS_NS16550_COM1, + .reg_shift = 2, + .clock = CONFIG_SYS_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(ns16550_com1) = { +diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c +index ae7959b1eb6e..5a3498f570a6 100644 +--- a/board/isee/igep00x0/igep00x0.c ++++ b/board/isee/igep00x0/igep00x0.c +@@ -32,7 +32,8 @@ DECLARE_GLOBAL_DATA_PTR; + static const struct ns16550_platdata igep_serial = { + .base = OMAP34XX_UART3, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(igep_uart) = { +diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c +index 0662449c3875..b2b8f8861f11 100644 +--- a/board/lg/sniper/sniper.c ++++ b/board/lg/sniper/sniper.c +@@ -31,7 +31,8 @@ const omap3_sysinfo sysinfo = { + static const struct ns16550_platdata serial_omap_platdata = { + .base = OMAP34XX_UART3, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(sniper_serial) = { +diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c +index 21b3fdcf49cf..b2fcc28f8b4b 100644 +--- a/board/logicpd/omap3som/omap3logic.c ++++ b/board/logicpd/omap3som/omap3logic.c +@@ -49,7 +49,8 @@ DECLARE_GLOBAL_DATA_PTR; + static const struct ns16550_platdata omap3logic_serial = { + .base = OMAP34XX_UART1, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(omap3logic_uart) = { +diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c +index 2821ee22674f..0fad23af62f6 100644 +--- a/board/logicpd/zoom1/zoom1.c ++++ b/board/logicpd/zoom1/zoom1.c +@@ -47,7 +47,8 @@ static const u32 gpmc_lab_enet[] = { + static const struct ns16550_platdata zoom1_serial = { + .base = OMAP34XX_UART3, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(zoom1_uart) = { +diff --git a/board/overo/overo.c b/board/overo/overo.c +index 40f13e5876cc..5e447262bcfd 100644 +--- a/board/overo/overo.c ++++ b/board/overo/overo.c +@@ -70,7 +70,8 @@ static struct { + static const struct ns16550_platdata overo_serial = { + .base = OMAP34XX_UART3, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(overo_uart) = { +diff --git a/board/quipos/cairo/cairo.c b/board/quipos/cairo/cairo.c +index 77e4482906f0..793aa9023150 100644 +--- a/board/quipos/cairo/cairo.c ++++ b/board/quipos/cairo/cairo.c +@@ -93,7 +93,8 @@ void get_board_mem_timings(struct board_sdrc_timings *timings) + static const struct ns16550_platdata cairo_serial = { + .base = OMAP34XX_UART2, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(cairo_uart) = { +diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c +index cfdab3e34253..23c79333a223 100644 +--- a/board/ti/beagle/beagle.c ++++ b/board/ti/beagle/beagle.c +@@ -75,7 +75,8 @@ static struct { + static const struct ns16550_platdata beagle_serial = { + .base = OMAP34XX_UART3, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(beagle_uart) = { +diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c +index f785dbe6d732..b2f060b2ddbf 100644 +--- a/board/timll/devkit8000/devkit8000.c ++++ b/board/timll/devkit8000/devkit8000.c +@@ -48,7 +48,8 @@ static u32 gpmc_net_config[GPMC_MAX_REG] = { + static const struct ns16550_platdata devkit8000_serial = { + .base = OMAP34XX_UART3, + .reg_shift = 2, +- .clock = V_NS16550_CLK ++ .clock = V_NS16550_CLK, ++ .fcr = UART_FCR_DEFVAL, + }; + + U_BOOT_DEVICE(devkit8000_uart) = { +diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c +index 9b423a591d8a..2df4a1f04fe5 100644 +--- a/drivers/serial/ns16550.c ++++ b/drivers/serial/ns16550.c +@@ -20,9 +20,6 @@ DECLARE_GLOBAL_DATA_PTR; + #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ + #define UART_MCRVAL (UART_MCR_DTR | \ + UART_MCR_RTS) /* RTS/DTR */ +-#define UART_FCRVAL (UART_FCR_FIFO_EN | \ +- UART_FCR_RXSR | \ +- UART_FCR_TXSR) /* Clear & enable FIFOs */ + + #ifndef CONFIG_DM_SERIAL + #ifdef CONFIG_SYS_NS16550_PORT_MAPPED +@@ -138,7 +135,7 @@ static u32 ns16550_getfcr(NS16550_t port) + #else + static u32 ns16550_getfcr(NS16550_t port) + { +- return UART_FCRVAL; ++ return UART_FCR_DEFVAL; + } + #endif + +@@ -275,7 +272,7 @@ static inline void _debug_uart_init(void) + CONFIG_BAUDRATE); + serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER); + serial_dout(&com_port->mcr, UART_MCRVAL); +- serial_dout(&com_port->fcr, UART_FCRVAL); ++ serial_dout(&com_port->fcr, UART_FCR_DEFVAL); + + serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); + serial_dout(&com_port->dll, baud_divisor & 0xff); +@@ -440,7 +437,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) + return -EINVAL; + } + +- plat->fcr = UART_FCRVAL; ++ plat->fcr = UART_FCR_DEFVAL; + if (port_type == PORT_JZ4780) + plat->fcr |= UART_FCR_UME; + +diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_rockchip.c +index 6bac95a414ce..c06afc58f7ea 100644 +--- a/drivers/serial/serial_rockchip.c ++++ b/drivers/serial/serial_rockchip.c +@@ -27,6 +27,7 @@ static int rockchip_serial_probe(struct udevice *dev) + plat->plat.base = plat->dtplat.reg[0]; + plat->plat.reg_shift = plat->dtplat.reg_shift; + plat->plat.clock = plat->dtplat.clock_frequency; ++ plat->plat.fcr = UART_FCR_DEFVAL; + dev->platdata = &plat->plat; + + return ns16550_serial_probe(dev); +diff --git a/include/ns16550.h b/include/ns16550.h +index 7c9703683109..5fcbcd2e74e3 100644 +--- a/include/ns16550.h ++++ b/include/ns16550.h +@@ -121,6 +121,11 @@ typedef struct NS16550 *NS16550_t; + /* Ingenic JZ47xx specific UART-enable bit. */ + #define UART_FCR_UME 0x10 + ++/* Clear & enable FIFOs */ ++#define UART_FCR_DEFVAL (UART_FCR_FIFO_EN | \ ++ UART_FCR_RXSR | \ ++ UART_FCR_TXSR) ++ + /* + * These are the definitions for the Modem Control Register + */ +-- +2.17.0 + diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile index 056300e18..5257a41ad 100644 --- a/package/boot/uboot-sunxi/Makefile +++ b/package/boot/uboot-sunxi/Makefile @@ -9,9 +9,9 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2017.07 +PKG_VERSION:=2017.11 -PKG_HASH:=5374bfdc8acb9a38c025371b1ff20f45e7533668e84e685d0df5d9e7c0e4feff +PKG_HASH:=6a018fd3caf58f3dcfa23ee989a82bd35df03af71872b9dca8c6d758a0d26c05 PKG_MAINTAINER:=Zoltan HERPAI @@ -150,6 +150,12 @@ define U-Boot/orangepi_r1 BUILD_DEVICES:=sun8i-h2-plus-orangepi-r1 endef +define U-Boot/orangepi_pc + BUILD_SUBTARGET:=cortexa7 + NAME:=Orange Pi PC (H3) + BUILD_DEVICES:=sun8i-h3-orangepi-pc +endef + define U-Boot/orangepi_plus BUILD_SUBTARGET:=cortexa7 NAME:=Orange Pi Plus (H3) @@ -168,6 +174,14 @@ define U-Boot/pangolin UENV:=pangolin endef +define U-Boot/nanopi_neo_plus2 + BUILD_SUBTARGET:=cortexa53 + NAME:=NanoPi NEO Plus2 (H5) + BUILD_DEVICES:=sun50i-h5-nanopi-neo-plus2 + DEPENDS:=+PACKAGE_u-boot-nanopi_neo_plus2:arm-trusted-firmware-sunxi + UENV:=a64 +endef + define U-Boot/pine64_plus BUILD_SUBTARGET:=cortexa53 NAME:=Pine64 Plus A64 @@ -176,6 +190,23 @@ define U-Boot/pine64_plus UENV:=a64 endef +define U-Boot/sopine_baseboard + BUILD_SUBTARGET:=cortexa53 + NAME:=Sopine Baseboard + BUILD_DEVICES:=sun50i-a64-sopine-baseboard + DEPENDS:=+PACKAGE_u-boot-sopine_baseboard:arm-trusted-firmware-sunxi + UENV:=a64 +endef + + +define U-Boot/orangepi_zero_plus + BUILD_SUBTARGET:=cortexa53 + NAME:=Xunlong Orange Pi Zero Plus + BUILD_DEVICES:=sun50i-h5-orangepi-zero-plus + DEPENDS:=+PACKAGE_u-boot-orangepi_zero_plus:arm-trusted-firmware-sunxi + UENV:=a64 +endef + UBOOT_TARGETS := \ A10-OLinuXino-Lime \ A13-OLinuXino \ @@ -197,11 +228,15 @@ UBOOT_TARGETS := \ Lamobo_R1 \ nanopi_m1_plus \ nanopi_neo \ + nanopi_neo_plus2 \ orangepi_r1 \ + orangepi_pc \ orangepi_plus \ orangepi_2 \ pangolin \ - pine64_plus + pine64_plus \ + sopine_baseboard \ + orangepi_zero_plus UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes diff --git a/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch b/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch index 2fce04828..4458d514c 100644 --- a/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch +++ b/package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch @@ -1,6 +1,6 @@ --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -254,6 +254,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ +@@ -261,6 +261,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \ sun6i-a31-m9.dtb \ sun6i-a31-mele-a1000g-quad.dtb \ sun6i-a31-mixtile-loftq.dtb \ @@ -360,7 +360,7 @@ +CONFIG_SUNXI_SPI=y --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig -@@ -746,6 +746,14 @@ config VIDEO_LCD_PANEL_I2C_SCL +@@ -752,6 +752,14 @@ config VIDEO_LCD_PANEL_I2C_SCL Set the SCL pin for the LCD i2c interface. This takes a string in the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H. diff --git a/package/boot/uboot-sunxi/patches/060-sun7i-Add-support-for-Olimex-A20-OLinuXino-LIME2-eMM.patch b/package/boot/uboot-sunxi/patches/060-sun7i-Add-support-for-Olimex-A20-OLinuXino-LIME2-eMM.patch deleted file mode 100644 index a7bfdd62d..000000000 --- a/package/boot/uboot-sunxi/patches/060-sun7i-Add-support-for-Olimex-A20-OLinuXino-LIME2-eMM.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 335d30050b0d02444c9297f7a9b0cbf75dce847f Mon Sep 17 00:00:00 2001 -From: Olliver Schinagl -Date: Fri, 12 May 2017 11:38:54 +0200 -Subject: sun7i: Add support for Olimex A20-OLinuXino-LIME2-eMMC - -This patch adds support for the Olimex OLinuXino Lime2 with eMMC flash -storage. -https://www.olimex.com/Products/OLinuXino/A20/A20-OLinuXino-LIME2-eMMC/ - -It is a assembly variant of the regular Lime2 but featuring eMMC for -storage. - -Signed-off-by: Olliver Schinagl -Signed-off-by: Jagan Teki -Acked-by: Maxime Ripard -Reviewed-by: Jagan Teki ---- - board/sunxi/MAINTAINERS | 5 +++++ - configs/A20-OLinuXino-Lime2-eMMC_defconfig | 36 ++++++++++++++++++++++++++++++ - 2 files changed, 41 insertions(+) - create mode 100644 configs/A20-OLinuXino-Lime2-eMMC_defconfig - ---- a/board/sunxi/MAINTAINERS -+++ b/board/sunxi/MAINTAINERS -@@ -88,6 +88,11 @@ M: Iain Paton - S: Maintained - F: configs/A20-OLinuXino-Lime2_defconfig - -+A20-OLINUXINO-LIME2-EMMC BOARD -+M: Olliver Schinagl -+S: Maintained -+F: configs/A20-OLinuXino-Lime2-eMMC_defconfig -+ - A33-OLINUXINO BOARD - M: Stefan Mavrodiev - S: Maintained ---- /dev/null -+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig -@@ -0,0 +1,37 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_MACH_SUN7I=y -+CONFIG_DRAM_CLK=384 -+CONFIG_MMC0_CD_PIN="PH1" -+CONFIG_MMC_SUNXI_SLOT_EXTRA=2 -+CONFIG_USB0_VBUS_PIN="PC17" -+CONFIG_USB0_VBUS_DET="PH5" -+CONFIG_I2C1_ENABLE=y -+CONFIG_SATAPWR="PC3" -+CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc" -+CONFIG_AHCI=y -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_SPL=y -+CONFIG_SPL_I2C_SUPPORT=y -+# CONFIG_CMD_IMLS is not set -+# CONFIG_CMD_FLASH is not set -+CONFIG_CMD_DFU=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_FPGA is not set -+# CONFIG_SPL_DOS_PARTITION is not set -+# CONFIG_SPL_ISO_PARTITION is not set -+# CONFIG_SPL_PARTITION_UUIDS is not set -+CONFIG_DFU_RAM=y -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_RGMII=y -+CONFIG_SUN7I_GMAC=y -+CONFIG_GMAC_TX_DELAY=1 -+CONFIG_AXP_ALDO3_VOLT=2800 -+CONFIG_AXP_ALDO4_VOLT=2800 -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_MUSB_GADGET=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_G_DNL_MANUFACTURER="Allwinner Technology" -+CONFIG_G_DNL_VENDOR_NUM=0x1f3a -+CONFIG_G_DNL_PRODUCT_NUM=0x1010 diff --git a/package/boot/uboot-sunxi/patches/061-ARM-dts-sunxi-Change-node-name-for-pwrseq-pin-on-Oli.patch b/package/boot/uboot-sunxi/patches/061-ARM-dts-sunxi-Change-node-name-for-pwrseq-pin-on-Oli.patch deleted file mode 100644 index 8db3e67e5..000000000 --- a/package/boot/uboot-sunxi/patches/061-ARM-dts-sunxi-Change-node-name-for-pwrseq-pin-on-Oli.patch +++ /dev/null @@ -1,31 +0,0 @@ -From fb7fe04da2187b9853d713cb643d01bd56813e3d Mon Sep 17 00:00:00 2001 -From: Emmanuel Vadot -Date: Fri, 12 May 2017 11:38:53 +0200 -Subject: ARM: dts: sunxi: Change node name for pwrseq pin on - Olinuxino-lime2-emmc - -The node name for the power seq pin is mmc2@0 like the mmc2_pins_a one. -This makes the original node (mmc2_pins_a) scrapped out of the dtb and -result in a unusable eMMC if U-Boot didn't configured the pins to the -correct functions. - -Signed-off-by: Emmanuel Vadot -Signed-off-by: Maxime Ripard -Signed-off-by: Olliver Schinagl -Acked-by: Maxime Ripard -Reviewed-by: Jagan Teki ---- - arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts -+++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2-emmc.dts -@@ -56,7 +56,7 @@ - }; - - &pio { -- mmc2_pins_nrst: mmc2@0 { -+ mmc2_pins_nrst: mmc2-rst-pin { - allwinner,pins = "PC16"; - allwinner,function = "gpio_out"; - allwinner,drive = ; diff --git a/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch b/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch index df2300194..679649c3f 100644 --- a/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch +++ b/package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch @@ -9,4 +9,4 @@ +CONFIG_GMAC_TX_DELAY=1 CONFIG_AXP_ALDO3_VOLT=2800 CONFIG_AXP_ALDO4_VOLT=2800 - CONFIG_USB_EHCI_HCD=y + CONFIG_SCSI=y diff --git a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch index 40d79878a..cf41c4f1f 100644 --- a/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch +++ b/package/boot/uboot-sunxi/patches/091-sun6i-sync-PLL1-multdiv-with-Boot1.patch @@ -14,7 +14,7 @@ More specifically, the following settings are now used: --- a/arch/arm/mach-sunxi/clock_sun6i.c +++ b/arch/arm/mach-sunxi/clock_sun6i.c -@@ -107,11 +107,12 @@ void clock_set_pll1(unsigned int clk) +@@ -113,11 +113,12 @@ void clock_set_pll1(unsigned int clk) struct sunxi_ccm_reg * const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; const int p = 0; diff --git a/package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch b/package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch index d140f2d53..c1ba07eec 100644 --- a/package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch +++ b/package/boot/uboot-sunxi/patches/101-sun6i-support-console-on-UART2.patch @@ -6,7 +6,7 @@ Subject: ARM: sun6i: Support console on UART2 (GPG6/GPG7) --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c -@@ -126,6 +126,10 @@ static int gpio_init(void) +@@ -124,6 +124,10 @@ static int gpio_init(void) sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1); sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1); sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP); @@ -19,7 +19,7 @@ Subject: ARM: sun6i: Support console on UART2 (GPG6/GPG7) sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2); --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h -@@ -259,6 +259,8 @@ extern int soft_i2c_gpio_scl; +@@ -256,6 +256,8 @@ extern int soft_i2c_gpio_scl; #endif #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I) #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200" diff --git a/package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch b/package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch index 41039796a..7a0ff9744 100644 --- a/package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch +++ b/package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch @@ -6,7 +6,7 @@ Subject: ARM: sunxi: Make CONS_INDEX configurable --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig -@@ -412,6 +412,14 @@ config SYS_BOARD +@@ -416,6 +416,14 @@ config SYS_BOARD config SYS_SOC default "sunxi" diff --git a/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch b/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch index d61895a3f..249157958 100644 --- a/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch +++ b/package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch @@ -1,7 +1,7 @@ -From 5b707cdadb35d896daafff52983416e1c617745b Mon Sep 17 00:00:00 2001 +From 637800493945ffed2f454756300437a4ec86e3b1 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Wed, 19 Jul 2017 22:23:15 +0200 -Subject: [PATCH] mkimage: check environment for dtc binary location +Subject: mkimage: check environment for dtc binary location Currently mkimage assumes the dtc binary is in the path and fails otherwise. This patch makes it check the DTC environment variable first @@ -17,7 +17,7 @@ Cc: Simon Glass --- a/tools/fit_image.c +++ b/tools/fit_image.c -@@ -647,9 +647,14 @@ static int fit_handle_file(struct image_ +@@ -650,9 +650,14 @@ static int fit_handle_file(struct image_ } *cmd = '\0'; } else if (params->datafile) { @@ -27,9 +27,9 @@ Cc: Simon Glass + dtc = MKIMAGE_DTC; + /* dtc -I dts -O dtb -p 500 datafile > tmpfile */ - snprintf(cmd, sizeof(cmd), "%s %s %s > %s", + snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"", - MKIMAGE_DTC, params->dtc, params->datafile, tmpfile); + dtc, params->dtc, params->datafile, tmpfile); debug("Trying to execute \"%s\"\n", cmd); } else { - snprintf(cmd, sizeof(cmd), "cp %s %s", + snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"", diff --git a/package/boot/uboot-sunxi/patches/210-Revert-fdt-Makefile-Build-python-libfdt-library-if-n.patch b/package/boot/uboot-sunxi/patches/210-Revert-fdt-Makefile-Build-python-libfdt-library-if-n.patch deleted file mode 100644 index 25edf5104..000000000 --- a/package/boot/uboot-sunxi/patches/210-Revert-fdt-Makefile-Build-python-libfdt-library-if-n.patch +++ /dev/null @@ -1,89 +0,0 @@ -From eed65e5c25cbc4b6e893f140e9d7898f4624c114 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Wed, 19 Jul 2017 23:12:38 +0200 -Subject: [PATCH 210/213] Revert "fdt: Makefile: Build python libfdt library if - needed" - -This reverts commit e38ffc42674fedc750ca895046be0bd983b56dd5. ---- - Makefile | 17 ++--------------- - scripts/Makefile.spl | 17 ++++------------- - 2 files changed, 6 insertions(+), 28 deletions(-) - ---- a/Makefile -+++ b/Makefile -@@ -1116,7 +1116,7 @@ cmd_ldr = $(LD) $(LDFLAGS_$(@F)) \ - - u-boot.rom: u-boot-x86-16bit.bin u-boot.bin \ - $(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \ -- $(if $(CONFIG_HAVE_REFCODE),refcode.bin) checkbinman FORCE -+ $(if $(CONFIG_HAVE_REFCODE),refcode.bin) FORCE - $(call if_changed,binman) - - OBJCOPYFLAGS_u-boot-x86-16bit.bin := -O binary -j .start16 -j .resetvec -@@ -1125,8 +1125,7 @@ u-boot-x86-16bit.bin: u-boot FORCE - endif - - ifneq ($(CONFIG_ARCH_SUNXI),) --u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb \ -- checkbinman FORCE -+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE - $(call if_changed,binman) - endif - -@@ -1355,18 +1354,6 @@ $(version_h): include/config/uboot.relea - $(timestamp_h): $(srctree)/Makefile FORCE - $(call filechk,timestamp.h) - --checkbinman: tools -- @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools python )); then \ -- echo >&2; \ -- echo >&2 '*** binman needs the Python libfdt library.'; \ -- echo >&2 '*** Either install it on your system, or try:'; \ -- echo >&2 '***'; \ -- echo >&2 '*** sudo apt-get install swig libpython-dev'; \ -- echo >&2 '***'; \ -- echo >&2 '*** to have U-Boot build its own version.'; \ -- false; \ -- fi -- - # --------------------------------------------------------------------------- - quiet_cmd_cpp_lds = LDS $@ - cmd_cpp_lds = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) \ ---- a/scripts/Makefile.spl -+++ b/scripts/Makefile.spl -@@ -257,12 +257,14 @@ PHONY += dts_dir - dts_dir: - $(shell [ -d $(obj)/dts ] || mkdir -p $(obj)/dts) - --include/generated/dt-structs.h: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc -+include/generated/dt-structs.h: $(obj)/$(SPL_BIN).dtb dts_dir dtoc - $(call if_changed,dtoch) - --$(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir checkdtoc -+$(obj)/dts/dt-platdata.c: $(obj)/$(SPL_BIN).dtb dts_dir dtoc - $(call if_changed,dtocc) - -+dtoc: #$(objtree)/tools/_libfdt.so -+ - ifdef CONFIG_SAMSUNG - ifdef CONFIG_VAR_SIZE_SPL - VAR_SIZE_PARAM = --vs -@@ -355,17 +357,6 @@ ifneq ($(cmd_files),) - include $(cmd_files) - endif - --checkdtoc: tools -- @if ! ( echo 'import libfdt' | ( PYTHONPATH=tools python )); then \ -- echo '*** dtoc needs the Python libfdt library. Either '; \ -- echo '*** install it on your system, or try:'; \ -- echo '***'; \ -- echo '*** sudo apt-get install swig libpython-dev'; \ -- echo '***'; \ -- echo '*** to have U-Boot build its own version.'; \ -- false; \ -- fi -- - PHONY += FORCE - FORCE: - diff --git a/package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch b/package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch new file mode 100644 index 000000000..b9cd9c7ac --- /dev/null +++ b/package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch @@ -0,0 +1,28 @@ +From def280c4792262a368c8861312dc6b376181021f Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Mon, 1 Jan 2018 23:10:56 +0100 +Subject: sunxi: deactivate binman + +Use the old way to generate the images instead of binman. +binman needs python with swig to avoid this host tool dependency use the +old way of generating images. +--- + Makefile | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +--- a/Makefile ++++ b/Makefile +@@ -1144,9 +1144,10 @@ u-boot-x86-16bit.bin: u-boot FORCE + endif + + ifneq ($(CONFIG_ARCH_SUNXI),) +-u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb \ +- checkbinman FORCE +- $(call if_changed,binman) ++OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \ ++ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff ++u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE ++ $(call if_changed,pad_cat) + endif + + ifneq ($(CONFIG_TEGRA),) diff --git a/package/boot/uboot-sunxi/patches/211-Revert-scripts-Makefile.lib-Always-have-.-u-boot.dts.patch b/package/boot/uboot-sunxi/patches/211-Revert-scripts-Makefile.lib-Always-have-.-u-boot.dts.patch deleted file mode 100644 index d40238d3a..000000000 --- a/package/boot/uboot-sunxi/patches/211-Revert-scripts-Makefile.lib-Always-have-.-u-boot.dts.patch +++ /dev/null @@ -1,26 +0,0 @@ -From cdee74ad13e933631caf7f544c319d8e981c6063 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Thu, 20 Jul 2017 19:49:25 +0200 -Subject: [PATCH 211/213] Revert "scripts/Makefile.lib: Always have - ...-u-boot.dtsi be able to override" - -This reverts commit 7452946e7f3742b3ff1cb4a50603e7492aceea88. ---- - scripts/Makefile.lib | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -306,10 +306,10 @@ $(obj)/%.dtb.S: $(obj)/%.dtb - - quiet_cmd_dtc = DTC $@ - # Modified for U-Boot --# Bring in any U-Boot-specific include at the end of the file -+# Bring in any U-Boot-specific include after the '/dts-v1/;' header - cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ - cat $< $(if $(u_boot_dtsi),\ -- | sed "$$ a\#include \"$(u_boot_dtsi)\"") | \ -+ | sed '/^\/ {$$/{x;s%$$%\#include \"$(u_boot_dtsi)\"%;G;}') | \ - $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \ - $(DTC) -O dtb -o $@ -b 0 \ - -i $(dir $<) $(DTC_FLAGS) \ diff --git a/package/boot/uboot-sunxi/patches/212-Revert-Avoid-non-portable-sed-construct.patch b/package/boot/uboot-sunxi/patches/212-Revert-Avoid-non-portable-sed-construct.patch deleted file mode 100644 index 1a5603417..000000000 --- a/package/boot/uboot-sunxi/patches/212-Revert-Avoid-non-portable-sed-construct.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 53d123333fa0ddc64b2c55d48366f4582ac6922d Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Thu, 20 Jul 2017 19:50:52 +0200 -Subject: [PATCH 212/213] Revert "Avoid non-portable sed construct" - -This reverts commit 208db781cad4c24f538658a9cb17e24fa43ca3c9. ---- - scripts/Makefile.lib | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -309,7 +309,7 @@ quiet_cmd_dtc = DTC $@ - # Bring in any U-Boot-specific include after the '/dts-v1/;' header - cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ - cat $< $(if $(u_boot_dtsi),\ -- | sed '/^\/ {$$/{x;s%$$%\#include \"$(u_boot_dtsi)\"%;G;}') | \ -+ | sed 's%^/ {$$%\#include \"$(u_boot_dtsi)\"\n&%') | \ - $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \ - $(DTC) -O dtb -o $@ -b 0 \ - -i $(dir $<) $(DTC_FLAGS) \ diff --git a/package/boot/uboot-sunxi/patches/213-Revert-sunxi-Use-binman-for-sunxi-boards.patch b/package/boot/uboot-sunxi/patches/213-Revert-sunxi-Use-binman-for-sunxi-boards.patch deleted file mode 100644 index 6f75259a7..000000000 --- a/package/boot/uboot-sunxi/patches/213-Revert-sunxi-Use-binman-for-sunxi-boards.patch +++ /dev/null @@ -1,58 +0,0 @@ -From cf1defd80b7594f6f2721ab2dacffe48522abfca Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Thu, 20 Jul 2017 19:51:01 +0200 -Subject: [PATCH 213/213] Revert "sunxi: Use binman for sunxi boards" - -This reverts commit 61b994a386eb6f631dc1c2194d4cce9b1a43542c. ---- - Makefile | 6 ++++-- - arch/arm/dts/sunxi-u-boot.dtsi | 14 -------------- - scripts/Makefile.lib | 4 ++-- - 3 files changed, 6 insertions(+), 18 deletions(-) - delete mode 100644 arch/arm/dts/sunxi-u-boot.dtsi - ---- a/Makefile -+++ b/Makefile -@@ -1125,8 +1125,10 @@ u-boot-x86-16bit.bin: u-boot FORCE - endif - - ifneq ($(CONFIG_ARCH_SUNXI),) --u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE -- $(call if_changed,binman) -+OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \ -+ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff -+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE -+ $(call if_changed,pad_cat) - endif - - ifneq ($(CONFIG_TEGRA),) ---- a/arch/arm/dts/sunxi-u-boot.dtsi -+++ /dev/null -@@ -1,14 +0,0 @@ --#include -- --/ { -- binman { -- filename = "u-boot-sunxi-with-spl.bin"; -- pad-byte = <0xff>; -- blob { -- filename = "spl/sunxi-spl.bin"; -- }; -- u-boot-img { -- pos = ; -- }; -- }; --}; ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -308,8 +308,8 @@ quiet_cmd_dtc = DTC $@ - # Modified for U-Boot - # Bring in any U-Boot-specific include after the '/dts-v1/;' header - cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ -- cat $< $(if $(u_boot_dtsi),\ -- | sed 's%^/ {$$%\#include \"$(u_boot_dtsi)\"\n&%') | \ -+ cat $< $(if $(u-boot-dtsi),\ -+ | sed 's%^/ {$$%\#include \"$(u-boot-dtsi)\"\n&%') | \ - $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) - ; \ - $(DTC) -O dtb -o $@ -b 0 \ - -i $(dir $<) $(DTC_FLAGS) \ diff --git a/package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch b/package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch new file mode 100644 index 000000000..aeee5b497 --- /dev/null +++ b/package/boot/uboot-sunxi/patches/220-add-sunxi50i-nanopi-neo-plus2.patch @@ -0,0 +1,165 @@ +From 77f54e8698001d8a987f2aa4870f71b65dc089eb Mon Sep 17 00:00:00 2001 +In-Reply-To: <20170921152217.4011-1-antony@phenome.org> +References: <20170921152217.4011-1-antony@phenome.org> +From: Antony Antony +Date: Thu, 21 Sep 2017 13:34:07 +0200 +Subject: [PATCH v5 1/2] sun50i: h5: Add NanoPi Neo Plus2 DT initial support + +Add initial DT for NanoPi NEO Plus2 by FriendlyARM +- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU +- 1 GB DDR3 RAM +- 8GB eMMC flash (Samsung KLM8G1WEPD-B031) +- micro SD card slot +- Gigabit Ethernet (external RTL8211E-VB-CG chip) +- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module) +- 2x USB 2.0 host ports + +Signed-off-by: Antony Antony +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 106 ++++++++++++++++++++++++++++ + configs/nanopi_neo_plus2_defconfig | 18 +++++ + 3 files changed, 125 insertions(+) + create mode 100644 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts + create mode 100644 configs/nanopi_neo_plus2_defconfig + +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -337,6 +337,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \ + sun8i-v3s-licheepi-zero.dtb + dtb-$(CONFIG_MACH_SUN50I_H5) += \ + sun50i-h5-nanopi-neo2.dtb \ ++ sun50i-h5-nanopi-neo-plus2.dtb \ + sun50i-h5-orangepi-pc2.dtb \ + sun50i-h5-orangepi-prime.dtb \ + sun50i-h5-orangepi-zero-plus2.dtb +--- /dev/null ++++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts +@@ -0,0 +1,106 @@ ++/* ++ * Copyright (C) 2017 Antony Antony ++ * Copyright (c) 2016 ARM Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h5.dtsi" ++ ++#include ++ ++/ { ++ model = "FriendlyARM NanoPi NEO Plus 2"; ++ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; ++ cd-inverted; ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; +--- /dev/null ++++ b/configs/nanopi_neo_plus2_defconfig +@@ -0,0 +1,18 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_MACH_SUN50I_H5=y ++CONFIG_DRAM_CLK=408 ++CONFIG_DRAM_ZQ=3881977 ++CONFIG_MACPWR="PD6" ++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2" ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_SPL=y ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_ISO_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 diff --git a/package/boot/uboot-sunxi/patches/221-compatible-old-dtc.patch b/package/boot/uboot-sunxi/patches/221-compatible-old-dtc.patch new file mode 100644 index 000000000..1b88de3e2 --- /dev/null +++ b/package/boot/uboot-sunxi/patches/221-compatible-old-dtc.patch @@ -0,0 +1,52 @@ +Revert the commit c0e032e0090d65 ("scripts/dtc: Update to upstream +version v1.4.3") +OpenWrt uses the dtc from the kernel also in u-boot, but when we compile +against kernel 4.9 we run into some errors because it is too old now. +Add the options only when they are supported to make it compatible with +dtc from kernel 4.9. + +--- a/scripts/Kbuild.include ++++ b/scripts/Kbuild.include +@@ -172,6 +172,11 @@ ld-version = $(shell $(LD) --version | $ + # Usage: $(call ld-ifversion, -ge, 22252, y) + ld-ifversion = $(shell [ $(ld-version) $(1) $(2) ] && echo $(3) || echo $(4)) + ++# dtc-option ++# Usage: DTC_FLAGS += $(call dtc-option,-Wno-unit_address_vs_reg) ++dtc-option = $(call try-run,\ ++ echo '/dts-v1/; / {};' | $(DTC) $(1),$(1),$(2)) ++ + ###### + + ### +--- a/scripts/Makefile.extrawarn ++++ b/scripts/Makefile.extrawarn +@@ -58,8 +58,8 @@ endif + + KBUILD_CFLAGS += $(warning) + +-dtc-warning-2 += -Wnode_name_chars_strict +-dtc-warning-2 += -Wproperty_name_chars_strict ++dtc-warning-2 += $(call dtc-option,-Wnode_name_chars_strict) ++dtc-warning-2 += $(call dtc-option,-Wproperty_name_chars_strict) + + dtc-warning := $(dtc-warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS))) + dtc-warning += $(dtc-warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS))) +@@ -70,11 +70,11 @@ DTC_FLAGS += $(dtc-warning) + else + + # Disable noisy checks by default +-DTC_FLAGS += -Wno-unit_address_vs_reg +-DTC_FLAGS += -Wno-simple_bus_reg +-DTC_FLAGS += -Wno-unit_address_format +-DTC_FLAGS += -Wno-pci_bridge +-DTC_FLAGS += -Wno-pci_device_bus_num +-DTC_FLAGS += -Wno-pci_device_reg ++DTC_FLAGS += $(call dtc-option,-Wno-unit_address_vs_reg) ++DTC_FLAGS += $(call dtc-option,-Wno-simple_bus_reg) ++DTC_FLAGS += $(call dtc-option,-Wno-unit_address_format) ++DTC_FLAGS += $(call dtc-option,-Wno-pci_bridge) ++DTC_FLAGS += $(call dtc-option,-Wno-pci_device_bus_num) ++DTC_FLAGS += $(call dtc-option,-Wno-pci_device_reg) + + endif diff --git a/package/boot/uboot-sunxi/patches/301-sunxi-add-orangepi-R1-defconfig.patch b/package/boot/uboot-sunxi/patches/301-sunxi-add-orangepi-R1-defconfig.patch deleted file mode 100644 index 6240fe3f5..000000000 --- a/package/boot/uboot-sunxi/patches/301-sunxi-add-orangepi-R1-defconfig.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 231201c71b902b5999ed9b143f2a54674cfae88a Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Tue, 26 Sep 2017 22:17:33 +0200 -Subject: sunxi: add orangepi R1 defconfig - -Signed-off-by: Hauke Mehrtens ---- - board/sunxi/MAINTAINERS | 5 +++++ - configs/orangepi_r1_defconfig | 19 +++++++++++++++++++ - 2 files changed, 24 insertions(+) - create mode 100644 configs/orangepi_r1_defconfig - ---- a/board/sunxi/MAINTAINERS -+++ b/board/sunxi/MAINTAINERS -@@ -302,6 +302,11 @@ M: Jagan Teki -+S: Maintained -+F: configs/orangepi_r1_defconfig -+ - PINE64 BOARDS - M: Andre Przywara - S: Maintained ---- /dev/null -+++ b/configs/orangepi_r1_defconfig -@@ -0,0 +1,19 @@ -+CONFIG_ARM=y -+CONFIG_ARCH_SUNXI=y -+CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_MACH_SUN8I_H3=y -+CONFIG_DRAM_CLK=624 -+CONFIG_DRAM_ZQ=3881979 -+CONFIG_DRAM_ODT_EN=y -+# CONFIG_VIDEO_DE2 is not set -+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1" -+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -+CONFIG_CONSOLE_MUX=y -+CONFIG_SPL=y -+# CONFIG_CMD_IMLS is not set -+# CONFIG_CMD_FLASH is not set -+# CONFIG_CMD_FPGA is not set -+CONFIG_SPL_SPI_SUNXI=y -+CONFIG_SUN8I_EMAC=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y diff --git a/package/boot/uboot-sunxi/patches/302-sunxi-Fix-CONFIG_SUNXI_GMAC-references.patch b/package/boot/uboot-sunxi/patches/302-sunxi-Fix-CONFIG_SUNXI_GMAC-references.patch deleted file mode 100644 index d884173c4..000000000 --- a/package/boot/uboot-sunxi/patches/302-sunxi-Fix-CONFIG_SUNXI_GMAC-references.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 6ff005cf19363382fc867d7876a75fd8a386e894 Mon Sep 17 00:00:00 2001 -From: Dave Prue -Date: Thu, 31 Aug 2017 19:21:01 +0200 -Subject: [PATCH] sunxi: Fix CONFIG_SUNXI_GMAC references - -SUNXI_GMAC was still used to configure the code where as the -same has been renamed and moved to Kconfig in below commit -"sunxi: Move SUNXI_GMAC to Kconfig" -(sha1: 4d43d065db3262f9a9918ba72457bf36dfb8e0bb) - -Signed-off-by: Dave Prue -Reviewed-by: Simon Glass -Reviewed-by: Jagan Teki -Reviewed-by: Mark Kettenis -Tested-by: Mark Kettenis -[Tweek commit message, config_whitelist.txt, build-whitelist.sh] -Signed-off-by: Jagan Teki ---- - arch/arm/include/asm/arch-sunxi/sys_proto.h | 2 +- - board/sunxi/Makefile | 2 +- - include/configs/sunxi-common.h | 2 +- - scripts/build-whitelist.sh | 4 ++-- - scripts/config_whitelist.txt | 1 - - 5 files changed, 5 insertions(+), 6 deletions(-) - ---- a/arch/arm/include/asm/arch-sunxi/sys_proto.h -+++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h -@@ -24,7 +24,7 @@ void sdelay(unsigned long); - void return_to_fel(uint32_t lr, uint32_t sp); - - /* Board / SoC level designware gmac init */ --#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUNXI_GMAC -+#if !defined CONFIG_SPL_BUILD && defined CONFIG_SUN7I_GMAC - void eth_init_board(void); - #else - static inline void eth_init_board(void) {} ---- a/board/sunxi/Makefile -+++ b/board/sunxi/Makefile -@@ -9,7 +9,7 @@ - # SPDX-License-Identifier: GPL-2.0+ - # - obj-y += board.o --obj-$(CONFIG_SUNXI_GMAC) += gmac.o -+obj-$(CONFIG_SUN7I_GMAC) += gmac.o - obj-$(CONFIG_SUNXI_AHCI) += ahci.o - obj-$(CONFIG_MACH_SUN4I) += dram_sun4i_auto.o - obj-$(CONFIG_MACH_SUN5I) += dram_sun5i_auto.o ---- a/include/configs/sunxi-common.h -+++ b/include/configs/sunxi-common.h -@@ -302,7 +302,7 @@ extern int soft_i2c_gpio_scl; - #define CONFIG_PHYLIB - #endif - --#ifdef CONFIG_SUNXI_GMAC -+#ifdef CONFIG_SUN7I_GMAC - #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */ - #define CONFIG_PHY_ADDR 1 - #define CONFIG_MII /* MII PHY management */ ---- a/scripts/build-whitelist.sh -+++ b/scripts/build-whitelist.sh -@@ -13,10 +13,10 @@ export LC_ALL=C LC_COLLATE=C - # There are two independent greps. The first pulls out the component parts - # of CONFIG_SYS_EXTRA_OPTIONS. An example is: - # --# SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8) -+# SUN7I_GMAC,AHCI,SATAPWR=SUNXI_GPB(8) - # - # We want this to produce: --# CONFIG_SUNXI_GMAC -+# CONFIG_SUN7I_GMAC - # CONFIG_AHCI - # CONFIG_SATAPWR - # ---- a/scripts/config_whitelist.txt -+++ b/scripts/config_whitelist.txt -@@ -2371,7 +2371,6 @@ CONFIG_STV0991_HZ_CLOCK - CONFIG_ST_SMI - CONFIG_SUNXI_AHCI - CONFIG_SUNXI_EMAC --CONFIG_SUNXI_GMAC - CONFIG_SUNXI_GPIO - CONFIG_SUNXI_MAX_FB_SIZE - CONFIG_SUNXI_USB_PHYS diff --git a/package/boot/uboot-sunxi/patches/300-sunxi-add-device-tree-for-Orange-Pi-R1-board.patch b/package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch similarity index 53% rename from package/boot/uboot-sunxi/patches/300-sunxi-add-device-tree-for-Orange-Pi-R1-board.patch rename to package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch index 65ae63c64..1181a44e8 100644 --- a/package/boot/uboot-sunxi/patches/300-sunxi-add-device-tree-for-Orange-Pi-R1-board.patch +++ b/package/boot/uboot-sunxi/patches/320-sunxi-Add-support-for-Orange-Pi-R1.patch @@ -1,20 +1,26 @@ -From 1f92596cc520f760589289059a5aa739366dd19c Mon Sep 17 00:00:00 2001 +From 068fb0d5728c5ec93cb961718d59e7c718886edd Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Tue, 26 Sep 2017 22:16:59 +0200 -Subject: sunxi: add device tree for Orange Pi R1 board +Subject: sunxi: Add support for Orange Pi R1 + +The device tree files are also submitted for inclusion into the Linux +kernel. Signed-off-by: Hauke Mehrtens --- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 157 +++++++++++++++++++++++++++++ - 2 files changed, 158 insertions(+) + arch/arm/dts/Makefile | 1 + + arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts | 77 ++++++++++++++++++++++++++++++ + board/sunxi/MAINTAINERS | 5 ++ + configs/orangepi_r1_defconfig | 26 ++++++++++ + 4 files changed, 109 insertions(+) create mode 100644 arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts + create mode 100644 configs/orangepi_r1_defconfig --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -310,6 +310,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ - sun8i-a83t-cubietruck-plus.dtb \ - sun8i-a83t-sinovoip-bpi-m3.dtb +@@ -318,6 +318,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \ + sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-cubietruck-plus.dtb dtb-$(CONFIG_MACH_SUN8I_H3) += \ + sun8i-h2-plus-orangepi-r1.dtb \ sun8i-h2-plus-orangepi-zero.dtb \ @@ -22,15 +28,9 @@ Signed-off-by: Hauke Mehrtens sun8i-h3-orangepi-2.dtb \ --- /dev/null +++ b/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts -@@ -0,0 +1,157 @@ +@@ -0,0 +1,91 @@ +/* -+ * Copyright (C) 2017 Hauke Mehrtens -+ * -+ * Based on sun8i-h2-plus-orangepi-zero.dts, which is: -+ * Copyright (C) 2016 Icenowy Zheng -+ * -+ * Based on sun8i-h3-orangepi-one.dts, which is: -+ * Copyright (C) 2016 Hans de Goede ++ * Copyright (C) 2017 Icenowy Zheng + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual @@ -71,112 +71,87 @@ Signed-off-by: Hauke Mehrtens + * OTHER DEALINGS IN THE SOFTWARE. + */ + -+/dts-v1/; -+#include "sun8i-h3.dtsi" -+#include "sunxi-common-regulators.dtsi" -+ -+#include -+#include -+#include ++/* Orange Pi R1 is based on Orange Pi Zero design */ ++#include "sun8i-h2-plus-orangepi-zero.dts" + +/ { + model = "Xunlong Orange Pi R1"; + compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus"; + -+ aliases { -+ serial0 = &uart0; -+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ -+ ethernet1 = &xr819; -+ }; ++ /delete-node/ reg_vcc_wifi; + -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ -+ pwr_led { -+ label = "orangepi:green:pwr"; -+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; -+ default-state = "on"; -+ }; -+ -+ status_led { -+ label = "orangepi:red:status"; -+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; -+ }; -+ }; -+ -+ reg_vcc_wifi: reg_vcc_wifi { ++ /* ++ * Ths pin of this regulator is the same with the Wi-Fi extra ++ * regulator on the original Zero. However it's used for USB ++ * Ethernet rather than the Wi-Fi now. ++ */ ++ reg_vcc_usb_eth: reg-vcc-usb-ethernet { + compatible = "regulator-fixed"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc-wifi"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc-usb-ethernet"; + enable-active-high; + gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>; + }; + -+ wifi_pwrseq: wifi_pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; -+ }; -+}; -+ -+&ehci1 { -+ status = "okay"; -+}; -+ -+&emac { -+ phy = <&phy1>; -+ phy-mode = "mii"; -+ allwinner,use-internal-phy; -+ allwinner,leds-active-low; -+ status = "okay"; -+ phy1: ethernet-phy@1 { -+ reg = <1>; -+ }; -+}; -+ -+&mmc0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc0_pins_a>; -+ vmmc-supply = <®_vcc3v3>; -+ bus-width = <4>; -+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ -+ cd-inverted; -+ status = "okay"; -+}; -+ -+&mmc1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&mmc1_pins_a>; -+ vmmc-supply = <®_vcc_wifi>; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ bus-width = <4>; -+ non-removable; -+ status = "okay"; -+ -+ /* -+ * Explicitly define the sdio device, so that we can add an ethernet -+ * alias for it (which e.g. makes u-boot set a mac-address). -+ */ -+ xr819: sdio_wifi@1 { -+ reg = <1>; ++ aliases { ++ ethernet1 = &rtl8189etv; + }; +}; + +&ohci1 { -+ status = "okay"; ++ /* ++ * RTL8152B USB-Ethernet adapter is connected to USB1, ++ * and it's a USB 2.0 device. So the OHCI1 controller ++ * can be left disabled. ++ */ ++ status = "disabled"; +}; + -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_pins_a>; -+ status = "okay"; ++&mmc1 { ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ ++ rtl8189etv: sdio_wifi@1 { ++ reg = <1>; ++ }; +}; + +&usbphy { -+ /* USB VBUS is always on */ -+ status = "okay"; ++ usb1_vbus-supply = <®_vcc_usb_eth>; +}; +--- a/board/sunxi/MAINTAINERS ++++ b/board/sunxi/MAINTAINERS +@@ -326,6 +326,11 @@ M: Jagan Teki ++S: Maintained ++F: configs/orangepi_r1_defconfig ++ + PINE64 BOARDS + M: Andre Przywara + S: Maintained +--- /dev/null ++++ b/configs/orangepi_r1_defconfig +@@ -0,0 +1,18 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_MACH_SUN8I_H3=y ++CONFIG_DRAM_CLK=624 ++CONFIG_DRAM_ZQ=3881979 ++CONFIG_DRAM_ODT_EN=y ++# CONFIG_VIDEO_DE2 is not set ++CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-orangepi-r1" ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_CONSOLE_MUX=y ++CONFIG_SPL=y ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_SPL_SPI_SUNXI=y ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y diff --git a/package/boot/uboot-sunxi/patches/400-ARM-dts-orange-pi-zero-plus.patch b/package/boot/uboot-sunxi/patches/400-ARM-dts-orange-pi-zero-plus.patch new file mode 100644 index 000000000..4363b5ee2 --- /dev/null +++ b/package/boot/uboot-sunxi/patches/400-ARM-dts-orange-pi-zero-plus.patch @@ -0,0 +1,148 @@ +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -339,6 +339,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \ + dtb-$(CONFIG_MACH_SUN50I_H5) += \ + sun50i-h5-nanopi-neo2.dtb \ + sun50i-h5-nanopi-neo-plus2.dtb \ ++ sun50i-h5-orangepi-zero-plus.dtb \ + sun50i-h5-orangepi-pc2.dtb \ + sun50i-h5-orangepi-prime.dtb \ + sun50i-h5-orangepi-zero-plus2.dtb +--- /dev/null ++++ b/configs/orangepi_zero_plus_defconfig +@@ -0,0 +1,19 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_SUNXI=y ++CONFIG_MACH_SUN50I_H5=y ++CONFIG_DRAM_CLK=624 ++CONFIG_DRAM_ZQ=3881977 ++CONFIG_MACPWR="PD6" ++CONFIG_MMC_SUNXI_SLOT_EXTRA=2 ++CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-zero-plus" ++# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set ++CONFIG_SPL=y ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_SPL_ISO_PARTITION is not set ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_SPL_SPI_SUNXI=y ++CONFIG_SUN8I_EMAC=y ++CONFIG_USB_EHCI_HCD=y +--- /dev/null ++++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts +@@ -0,0 +1,113 @@ ++/* ++ * Copyright (C) 2017 Antony Antony ++ * Copyright (c) 2016 ARM Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h5.dtsi" ++ ++#include ++ ++/ { ++ model = "Xunlong Orange Pi Zero Plus"; ++ compatible = "xunlong,orangepizero-zero-plus", "allwinner,sun50i-h5"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory { ++ reg = <0x40000000 0x40000000>; ++ }; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ compatible = "allwinner,sun50i-h5-mmc", ++ "allwinner,sun50i-a64-mmc", ++ "allwinner,sun5i-a13-mmc"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; ++ cd-inverted; ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; diff --git a/package/devel/gdb-arc/Makefile b/package/devel/gdb-arc/Makefile index 6cdf6bdf5..7d087ffcb 100644 --- a/package/devel/gdb-arc/Makefile +++ b/package/devel/gdb-arc/Makefile @@ -8,14 +8,14 @@ include $(TOPDIR)/rules.mk PKG_NAME:=gdb-arc -PKG_VERSION:=arc-2017.03-gdb +PKG_VERSION:=arc-2017.09-gdb PKG_RELEASE:=1 -PKG_SOURCE:=gdb-arc-2017.03-gdb.tar.gz +PKG_SOURCE:=gdb-arc-2017.09-gdb.tar.gz PKG_SOURCE_URL:=https://github.com/foss-for-synopsys-dwc-arc-processors/binutils-gdb/archive/$(PKG_VERSION) PKG_HASH:=6a91f86cc487c1548d3f5d4f29f7226d2019c0db8a63633aeabd5914a340f3f9 -PKG_BUILD_DIR:=$(BUILD_DIR)/binutils-gdb-arc-2017.03-gdb +PKG_BUILD_DIR:=$(BUILD_DIR)/binutils-gdb-arc-2017.09-gdb PKG_BUILD_PARALLEL:=1 PKG_INSTALL:=1 diff --git a/package/devel/perf/Makefile b/package/devel/perf/Makefile index 5bfcaa699..61388580d 100644 --- a/package/devel/perf/Makefile +++ b/package/devel/perf/Makefile @@ -26,7 +26,7 @@ include $(INCLUDE_DIR)/package.mk define Package/perf SECTION:=devel CATEGORY:=Development - DEPENDS:= +libelf1 +libdw +libpthread +librt +objdump @!LINUX_3_18 @!IN_SDK @!TARGET_arc770 @KERNEL_PERF_EVENTS + DEPENDS:= +libelf1 +libdw +(mips||mipsel||powerpc||i386||x86_64||arm||aarch64):libunwind +libpthread +librt +objdump @!LINUX_3_18 @!IN_SDK @!TARGET_arc770 @KERNEL_PERF_EVENTS TITLE:=Linux performance monitoring tool VERSION:=$(LINUX_VERSION)-$(PKG_RELEASE) URL:=http://www.kernel.org diff --git a/package/devel/valgrind/Makefile b/package/devel/valgrind/Makefile index 6be2f9ec1..dd300b6d9 100644 --- a/package/devel/valgrind/Makefile +++ b/package/devel/valgrind/Makefile @@ -85,7 +85,7 @@ CPU := $(patsubst x86_64,amd64,$(patsubst x86,i386,$(patsubst um,$(ARCH),$(LINUX CONFIGURE_VARS += \ UNAME_R=$(LINUX_VERSION) -ifeq ($(ARCH),x86_64) +ifeq ($(CONFIG_ARCH_64BIT),y) CONFIGURE_ARGS += \ --enable-only64bit BITS := 64bit @@ -114,12 +114,17 @@ define Package/valgrind/install ./files/default.supp \ $(PKG_INSTALL_DIR)/usr/lib/valgrind/none-* \ $(PKG_INSTALL_DIR)/usr/lib/valgrind/vgpreload_core*.so \ - $(PKG_INSTALL_DIR)/usr/lib/valgrind/$(CPU)-*.xml \ $(PKG_INSTALL_DIR)/usr/lib/valgrind/$(BITS)-core*.xml \ $(PKG_INSTALL_DIR)/usr/lib/valgrind/$(BITS)-linux*.xml \ $(PKG_INSTALL_DIR)/usr/lib/valgrind/memcheck-* \ $(PKG_INSTALL_DIR)/usr/lib/valgrind/vgpreload_memcheck*.so \ $(1)/usr/lib/valgrind/ + +ifneq ($(ARCH),aarch64) + $(CP) \ + $(PKG_INSTALL_DIR)/usr/lib/valgrind/$(CPU)-*.xml \ + $(1)/usr/lib/valgrind/ +endif endef define Package/valgrind-cachegrind/install diff --git a/package/ext/luci-app-shadowsocksr b/package/ext/luci-app-shadowsocksr deleted file mode 160000 index 86ef75ed8..000000000 --- a/package/ext/luci-app-shadowsocksr +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 86ef75ed8a376ca0a7490ce68c5b09fa0fbe8c1d diff --git a/package/firmware/ath10k-firmware/Makefile b/package/firmware/ath10k-firmware/Makefile index ad9e57b04..79af6b7f1 100644 --- a/package/firmware/ath10k-firmware/Makefile +++ b/package/firmware/ath10k-firmware/Makefile @@ -8,11 +8,9 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ath10k-firmware -#PKG_SOURCE_DATE:=2018-02-09 -#PKG_SOURCE_VERSION:=8f4bafdd400d21a65966004d0ce6e0686ef4d9bc -#PKG_MIRROR_HASH:=4f4f0678b9d07c0282f18c69bd63a5e2a2ae015b9ce7298cedb88a60be87ed3a -PKG_SOURCE_DATE:=2018-04-04 -PKG_SOURCE_VERSION:=55ab47d118c4238b9ce1265cf12a829841c90c0d +PKG_SOURCE_DATE:=2018-02-09 +PKG_SOURCE_VERSION:=8f4bafdd400d21a65966004d0ce6e0686ef4d9bc +PKG_MIRROR_HASH:=4f4f0678b9d07c0282f18c69bd63a5e2a2ae015b9ce7298cedb88a60be87ed3a PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git @@ -66,92 +64,92 @@ define Download/ct-firmware-htt URL_FILE:=$($(1)_FIRMWARE_FILE_CT_HTT) endef -QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-20.bin.lede.006 +QCA988X_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-21.bin.lede.001 define Download/ath10k-firmware-qca988x-ct $(call Download/ct-firmware,QCA988X,) - HASH:=b28ff3eb10f15033be68bbedc91abcf40f7369cc44da4273e3c0df285c74a4f8 + HASH:=a3d029c46a77be265e33bb57f827a59f01969f157825d66ecf42a9d327127578 endef $(eval $(call Download,ath10k-firmware-qca988x-ct)) -QCA988X_FIRMWARE_FILE_CT_HTT:=firmware-2-ct-full-htt-mgt-community-20.bin.lede.006 +QCA988X_FIRMWARE_FILE_CT_HTT:=firmware-2-ct-full-htt-mgt-community-21.bin.lede.001 define Download/ath10k-firmware-qca988x-ct-htt $(call Download/ct-firmware-htt,QCA988X,) - HASH:=08dd8d339079c9a704cf3f91787cc06a73168a9f57eeb777edaa9cd4194c246c + HASH:=8666523a6271c4aa6409880d2efd52643258c21464d6bf5948507bcb72d3e350 endef $(eval $(call Download,ath10k-firmware-qca988x-ct-htt)) -QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-20.bin.lede.006 +QCA9887_FIRMWARE_FILE_CT:=firmware-2-ct-full-community-21.bin.lede.001 define Download/ath10k-firmware-qca9887-ct $(call Download/ct-firmware,QCA9887,ath10k-9887) - HASH:=8d3fd2fb62479efa955e0d0487ca8971409e68b395f3a2df28569ec243bd937d + HASH:=ab8ef9afae5117f1cf71bbf80abde225f9f104620ba04a9734da51268e139803 endef $(eval $(call Download,ath10k-firmware-qca9887-ct)) -QCA9887_FIRMWARE_FILE_CT_HTT:=firmware-2-ct-full-htt-mgt-community-20.bin.lede.006 +QCA9887_FIRMWARE_FILE_CT_HTT:=firmware-2-ct-full-htt-mgt-community-21.bin.lede.001 define Download/ath10k-firmware-qca9887-ct-htt $(call Download/ct-firmware-htt,QCA9887,ath10k-9887) - HASH:=f192b5a8ac4b90d828cace0a2279c02fda689fa936f5154f08df6658d0230e9b + HASH:=bb16a90ec8e7f80539ad016ebf5e3542bfc95a0e1a58c9f1b91e408a130ac058 endef $(eval $(call Download,ath10k-firmware-qca9887-ct-htt)) -QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-10.bin-lede.006 +QCA99X0_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-11.bin-lede.001 define Download/ath10k-firmware-qca99x0-ct $(call Download/ct-firmware,QCA99X0,ath10k-10-4) - HASH:=1aa21acab7974651af6c0a2698891fc8792edb5124824fac1587123d3b48df67 + HASH:=f5c1caaf5a7fb8a07d0e292bab853311a1e826b5de7e76a06e4d801e33827a49 endef $(eval $(call Download,ath10k-firmware-qca99x0-ct)) -QCA99X0_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-10.bin-lede.006 +QCA99X0_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-11.bin-lede.001 define Download/ath10k-firmware-qca99x0-ct-htt $(call Download/ct-firmware-htt,QCA99X0,ath10k-10-4) - HASH:=e3d89c00f194975649b2f41ff5f5ffc34d60c393d15800df6ea56a8ac29aeeee + HASH:=a78a457a76f28e2ef34a7a3b1beef06064f7512680e14beafe02625d94d11619 endef $(eval $(call Download,ath10k-firmware-qca99x0-ct-htt)) -QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-10.bin-lede.006 +QCA9984_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-11.bin-lede.001 define Download/ath10k-firmware-qca9984-ct $(call Download/ct-firmware,QCA9984,ath10k-9984-10-4) - HASH:=f9700cafb4e2cebe8364eb6fe1754eb2c37b1b02a7408ded908ecc78954380a3 + HASH:=204dde43a107911cd48ac04f6450365722fba6121487e49d4ef36b8aaa83339b endef $(eval $(call Download,ath10k-firmware-qca9984-ct)) -QCA9984_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-10.bin-lede.006 +QCA9984_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-11.bin-lede.001 define Download/ath10k-firmware-qca9984-ct-htt $(call Download/ct-firmware-htt,QCA9984,ath10k-9984-10-4) - HASH:=c8c288cd38f3e6b378d7ed8407ee6b01cfcc73acc03d6ad5b8d392a8a346dd82 + HASH:=e60b6033e96a9b14f43aae360e6a35e1217f3e94a4578821ccdb3e2da8521fae endef $(eval $(call Download,ath10k-firmware-qca9984-ct-htt)) -QCA4019_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-10.bin-lede.006 +QCA4019_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-11.bin-lede.001 define Download/ath10k-firmware-qca4019-ct $(call Download/ct-firmware,QCA4019,ath10k-4019-10-4) - HASH:=d2207982b49959b9526d4dc1fd4181b49b3d43a841cf5d6cc396ccb1bc4b572c + HASH:=3daa439104806b1796c90e65bcafb18164358f0bd9e4d444302f7caf1c220dad endef $(eval $(call Download,ath10k-firmware-qca4019-ct)) -QCA4019_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-10.bin-lede.006 +QCA4019_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-11.bin-lede.001 define Download/ath10k-firmware-qca4019-ct-htt $(call Download/ct-firmware-htt,QCA4019,ath10k-4019-10-4) - HASH:=3c900bb656f093fe6882616d788c6e2e8fc09edbdda06691e16e5f08d79c4955 + HASH:=eaf64c2942dac4d4718c5f7178be0676aee86b0293443d7b414e3f88290e2d15 endef $(eval $(call Download,ath10k-firmware-qca4019-ct-htt)) -QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-10.bin-lede.006 +QCA9888_FIRMWARE_FILE_CT:=firmware-5-ct-full-community-11.bin-lede.001 define Download/ath10k-firmware-qca9888-ct $(call Download/ct-firmware,QCA9888,ath10k-9888-10-4) - HASH:=9bd38e80ec52484bae5edc785df09cf9acdad3e28ee5080a8105ba786118193a + HASH:=8d4415a77745259bbac4fc821c85f4001e58e49d9797a2e23585c44a03505678 endef $(eval $(call Download,ath10k-firmware-qca9888-ct)) -QCA9888_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-10.bin-lede.006 +QCA9888_FIRMWARE_FILE_CT_HTT:=firmware-5-ct-full-htt-mgt-community-11.bin-lede.001 define Download/ath10k-firmware-qca9888-ct-htt $(call Download/ct-firmware-htt,QCA9888,ath10k-9888-10-4) - HASH:=63e695f55400f784ca8123c299e240626a403437b30d197a7e69a4b42d155b8a + HASH:=2a1bf2c7b4122469c40d70c48f155a53bd5d30a2900c01fe5ff896abc67acc9c endef $(eval $(call Download,ath10k-firmware-qca9888-ct-htt)) diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile index a92be6fd4..2734911aa 100644 --- a/package/firmware/ipq-wifi/Makefile +++ b/package/firmware/ipq-wifi/Makefile @@ -13,14 +13,14 @@ endef define Build/Compile endef -ALLWIFIBOARDS:=asus_rt-ac58u avm_fritzbox-4040 glinet_gl-b1300 meraki_mr33 +ALLWIFIBOARDS:=8dev_jalapeno asus_rt-ac58u avm_fritzbox-4040 glinet_gl-b1300 meraki_mr33 netgear_ex61x0v2 ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD)) define Package/ipq-wifi-default SUBMENU:=ath10k IPQ4019 Boarddata SECTION:=firmware CATEGORY:=Firmware - DEPENDS:=@TARGET_ipq40xx +ath10k-firmware-qca4019 + DEPENDS:=@TARGET_ipq40xx TITLE:=Custom Board endef @@ -47,9 +47,11 @@ Don't install it for any other device! PREV_BOARD+=ipq-wifi-$(1) endef +$(eval $(call generate-ipq-wifi-package,8dev_jalapeno,board-8dev_jalapeno.bin,8devices Jalapeno)) $(eval $(call generate-ipq-wifi-package,asus_rt-ac58u,board-asus_rt-ac58u.bin,ASUS RT-AC58U)) $(eval $(call generate-ipq-wifi-package,avm_fritzbox-4040,board-avm_fritzbox-4040.bin,AVM FRITZ!Box 4040)) $(eval $(call generate-ipq-wifi-package,glinet_gl-b1300,board-glinet_gl-b1300.bin,GL.iNet GL-B1300)) $(eval $(call generate-ipq-wifi-package,meraki_mr33,board-meraki_mr33.bin,Cisco Meraki MR33)) +$(eval $(call generate-ipq-wifi-package,netgear_ex61x0v2,board-netgear_ex61x0v2.bin,Netgear EX61x0v2)) $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE)))) diff --git a/package/firmware/ipq-wifi/board-8dev_jalapeno.bin b/package/firmware/ipq-wifi/board-8dev_jalapeno.bin new file mode 100644 index 0000000000000000000000000000000000000000..0e12d9573c3dab79f8d668141ca970aea5482129 GIT binary patch literal 24324 zcmeHPT~HHQ7H$v(T^#932A|$03o_Aze)l~49btelA1w9 zjL68!5HP|}sK`&RqZFevDzmFI>r^?ZseRolU-oSuOzqUxmM`n3ZzeR z`<{FIo_o&u`qJs{bLfxr^SF6s(zH}LS6rM|DuG&BS|C8`6nqOoxuDdZZrfMWSesni zqU6>!D%D(N{k~LltG2a9Q;#>(GLzeDG|HM2r}hcz8`_n14Q<@Qn&ujH!->|G05Asw z%*RN1RuT{ZZ97NGh{WgKD*~Hp2-+C}YCz!-v@6|Q1I`6;IO+IQ5R{&t{_mfEhJ@tp z(3^i;&9#+nWEVo7b^U$iutAF^=odgM_qlKHUfvZByum*88XSS$F<%kUg*U=b1Zbwb}WwCJmEh8K*_ado2&QvMAO+qRqCP0+_{@= zeOdMF@@V;!nUng0i%A-4wSM-n{=b{=s&>y_a?VulfepB6D(7=>MWIvl~?JaCgD36rfxvd07YeOJ7WXErI?S>;Ld!lGDv9>e5y~fY6cCtx1)!>2%f&u~p0|Nu_?Y3>f z!NJ?D6f)gYnM!?ewuFzw$Fsnf&5Vmk*(|eQsb5FMx#- z;+YI{VKNv9g3#&o1fOv6_-y!ebl-5ett$yeU^oxSgVT^SSbh4;x!y|yLnEshNNATDMpKbg zSb!`WVVHEyF54s&E?Y>B#K+kVGI6uOna@LgUfUd?f#MJ}gJ%JUN<v80dqAHl_>EPfW8OA56SR9bs&^8Pc& zt?ky|yLz>b9X9fr4nIDGgzH-c0Z$_Yo{rmOxS%DKjk<}2m+orcJo8?^S$y*h-Pg0& z7lE&5_Vs*rO9_rZz`qdq`zx&}w?{_%F@w~fo-87>i za~u>U_1Pk!<`^g{?z2Tf&GAo^-)D<}dJm#oiLH z_yuqgDU+WG?(1 zwSpW=SXdb3Me#-6J=4iY$A*YJLH>#SErk(T64?`Z&%F8^_rHsuwbHxBS@wft?LeN% zxEke`;atLLS4&}K-v&f!rHMqFK!8AiKwv8&P+hI4u;ks7Na4FIo)LNX_Q=Ekd*Q^s>s)KP zWNgMzLz<3m>N7TBasyu%v$SX!)}E{?5U`i-V^cb(kP1t;Da}`0Wb9llRPJym}h>Qv-%6DZW+2iLos3dQ^s8ujW# z#X#B_hH7`w_jjAGiF(*AQAb~lDoe5w6ZSyR)A2LS(tI8_Cg$Pv$zjna91W@b*^F{1 zw};hCJ^FmSty-MPrc=Wn-)cTCl_JdW2;ErG`Lt7%L%R+u|G_T#)ya1ly+z(hxXZV<^}o-Ydt5h>cW;h${n`zYcmHdVBjh$L0-nT- Y-R0Ul_HS4R*Jv1#ckkVApsz>&51q$w=>Px# literal 0 HcmV?d00001 diff --git a/package/firmware/ipq-wifi/board-netgear_ex61x0v2.bin b/package/firmware/ipq-wifi/board-netgear_ex61x0v2.bin new file mode 100644 index 0000000000000000000000000000000000000000..0937a65fc976444ad72ad9ccc0b3df2a524a071e GIT binary patch literal 48628 zcmeHQYgAK59=|Av547A69)@tqQxcj)2vkyy@(?jVs+9TwbS)q%2~ZIfMcgB&r4?yJ zs@3u^fG)K@;I3;quC^-Owe7Y&HK)5@`pqx>)l>DjZVU)Ju-y?NY(dm(|O1ekxA zng7h4$A5k^Np3Q~{CRzIwmN%Pl5* zok_jF+ElMLRc%b6a+QZG8meG6b)BlIqQO-0*3pgI4jesnprS#&rDR=dN=lQqt}X=h zAp-r0)>a-23BeYh=B4j~eJ2lss2szVherYh!$2%f1L;!mU=yV>4R(cLX=!Qy`T1u| z&tHQ5^3U^`jK$Tw~B0pT{g=ANP?D zs_z_z+r}>L7CgH#($Qfy<(FkX8|iCrt|}|cfA#ULzB3&Srq}b=J-!XJMpJSAE587_ zdrz5!J-;>bZbyyjwX&>dxBK2}t}Zj?>mT2Q)yneob)dof9mhf02D(8~GWL9E z+4_7HXxi4izbqG2yWZCUnilF5k4O40G}o6E>r(6ulHBc^BG(LLiYo4xQ3H28*mLs% zCH9%kt3*=DJXn&>qt-D8AU@}dC%=VJ+Gb-HAYoDxMDh0 zSR;KcChNhq!|!dVR+h#azrNZ0(e^W%#)SQ!-9Fy)+WYF`!h>J-*PqHeAjywf|77TJ zTfyNqJ7aP`xo+wk>yRw-nqEVOU7WqD6~BV7z#7SXkH+yM*8Gs?Jh;^LCMfFOx~ZpIjmqOC@57 zWLM}?%zlUB)*H$M6oIa;rluV`jCne2#fl|M=%I8+>{V=#60o~W1?i_{zj`Xr!R4P@n0&J=Tfqygw6q!Us#QR5M zLj@;rJe$bIQ;Af({@BUWZD%_#c27`-F%?P6h*Qzq<)Kp%UZKV6RCokW!~33x3kZQm zV2mUp@i-!f$kF6{pMw_=1)2h57LkP;2rZ%2XusFu>xuQ6^~Mw;1=kTyBdph0)nQC- zw}~W&X0FPdo&AAbbxc#Qcg{F~D$(zhDb@Hsr?9K89tIdHqiz%t^*joXC*n2n#?8d$ z=bQ0DqEJ(4Oe4~sr{Noj4Vn!`un1>6;nr}*i30;eLj#k?6lyeJoH1<^Gp0>r#&GY} zpS2D%gM5bKdS_wR*q$%bEt?Pbq-YM_tUf{sp~Qgz+8P|dxD_u*l-v+N8H4~r03m=7 zKnNfN7BB*_+E_f1w^gzg-_FaBWZ;>+r4GT0D=%ET`-B-&pSATun8eY#H*u`QbBtvU z;T&TX?3m|G?{u97yo6}#^92EKPYArNH^*=>?ya_rKE*JQp0Es#KJ`r1YPC|iMlKa4 z1g8eSq*tzyNkxglsU-uU>`MqvO$bFGh>MG1)dZ7XoxH6OH0JJkinfk%KMcpQtaJ>s z@bHirAYJzKLwl-Nieq|AABthAm=p*6DL}Z903MGc=s|f-nDU35f>-{Y6An^)hz!NC z@YXQV4RHP04?kf){`eD>LLG)IQ2yN$W$SluC|j4exxyTKdLwfuLEzUr5&T7=Rp0~y zoGvd4UHTD_t3Vu0?gN=gnXv@CxDJkf%atark;`T?&?k5FSsi^kXDr%LvbVgd+S2u5 z_m#n+8^d=-??3v>SKmJM{Q{;YNsaUL&91-#jqew{za^crrfi5^WSkeoa7(a=7^BWX zjl6cpNhoy&YRqYOoPtv4pGIxF;{?=q5II};6J6ie!;dYdT(CJ(fph!(78k@U+Y=Uv zeZSz%nenz=`wn(q?!Qjn8~YoVo&=xjlxQ?F(fzgjjAdXx)!lRkT1@2Jbp8uIE+m8+ zp^=Z}zR1Omgi&KO=3?nD(s4bZ*XWJuET69_B7e0_b{)QnSJn$36Z?0(&pFb$@)5^Z-hGBwy!(IUhJ*mp{fRD$1s**JP$|c- z=x`bxaBC?B0Z1sg*PJNQHzxA#0skP=5vI$#2P1vqIoeEk_mKbY$-9R(!Z8T9f!O)) z)8*a6t~q)4UX1Gt?;eYdjdcrrJ|AO-h=>Txhp=o}AbIy${6YQ?{C`Im#k9uUiE)F% ztITa$ysC>)ztsTiZ5J;au~b`-$GK?IEIVOBQ4pdu!A4Yo5I_hZ1m+O}<>h6&Xx=@K z7rBz2n2)^sa=QJ>m5Y9++aEmW=u;qwfxGuO(j1)#Hn8?2C1K;ews*-x)*{Qs@d4Xevevq@MNNKYxomDQPyy+iJA*<=uartPGu zCC3m?{>eIEt}|ro*4jQNuUVSSyLAHCV4zpI1{=R@YbDED)*Duj_t@IVsusOrH87;7 zb!5x^XLks!R)M<#i*fCwdo5(fhFVQX+qZ2=d*pym#pm%!j5bLESF53_yA-aC8h zcUw}`!qrPYZm->&p%o{rT6*+yUYqiWpfV!wi=hMOHnvC)#g_i{;)$|M^_u9ouum_Y zswv3Pu8og7Ke($i^`yxB(zdT})?UbJmDjD__f4;S0%$kN3S(CY%xd_(SnYi?eC>G#g#@FKE3_sCEeSJbbhoTCv-#Fa6p-tMr-}lM+`pVo5QlXIF`$5%#Ed?rVwBTIl?%$`I zC3|>TcW*Ub*>+BGJnn!mSfjcK0fazsAuv-f9N|o1nc5eF?d3%$%Jf==TrLBDzypU! zDi%w`yTXFT3kTxevn(7cTG$A9d++D(dJ7wM$hSwl`v7wGgOhFVvI^4QCt=6WI`94l zhEqIv45W}tp9NCLgUp%elKd(au11EYQha*IsSj^m4gyTWL=^uXa_+;F z|DbsIkc$uU3;gLH)YFH&_)x%$FX_JVRUmlrfu1}U-`-I^o1A+%Hsak6IfY5UbrwQ} z=C=Y8v!@{5z5UGCPOk>Z?Ea*}abi6ysmyKDxH8=P%8xC?o_o`tXEMg!s&HRGyn6~L zCO~dF;@t=OU32RGedXP=`@4U|!{2>H1@d>##NNNWd*tt)iS6v^$ltvS`}uIfjOO54 z&-tw(fA{lyef>SVnVz%(dyv0-e=kY^`(yK0?<4Pig1`I#noD)PV0rh$c2PML$CnmP zX8A)W-QKALmUo}z{5t3Q%vE+L_l#1x(S(B)fd$UvpNe-6-L=#H?t@mN{mCafx#YpA zA%FK=KJ_PM{v&_)!TQ2E_w7Rd?%{u`4wS$9WG;XAzF%;iw#``co$V}kV=TKev&*~p z9mH8}q2$^OGhWaj>A?4W<;NDBTh#Xp{^H%sHI8F^jbRd$YE#w56e?GFxT2v7 zW>eYy-Fx!x-+6N?fA?wBEf4Z{@7tZ6t zIBi825CRARgupyN0QtLDsZ_}dxkQ{GVAB*(WD*e(?;nkA%isi#XA{|YDv^rUA3J%v z?QG}8?g`2;=A_#@700K)hfc*ww|6Rtcke{UN4h@ELhpw%rONK)o>A)R!LR=ALAP_7 zcW*3#|J?Nv@^_E?-Lt(k(q%#T*#McuyK@F;^2mC9{IbU2QMsR<-B3TQG>>SDC_Ok2A}!a$i8adkQEfKyEtX-B0t)+)vH^51gt> AI{*Lx literal 0 HcmV?d00001 diff --git a/package/firmware/linux-firmware/rsi.mk b/package/firmware/linux-firmware/rsi.mk new file mode 100644 index 000000000..6d960a24f --- /dev/null +++ b/package/firmware/linux-firmware/rsi.mk @@ -0,0 +1,6 @@ +Package/rs9113-firmware = $(call Package/firmware-default,RedPine Signals rs9113 firmware) +define Package/rs9113-firmware/install + $(INSTALL_DIR) $(1)/lib/firmware/rsi + $(INSTALL_DATA) $(PKG_BUILD_DIR)/rsi/rs9113_wlan_qspi.rps $(1)/lib/firmware/rsi +endef +$(eval $(call BuildPackage,rs9113-firmware)) diff --git a/package/firmware/wireless-regdb/patches/600-custom-fix-txpower-and-dfs.patch b/package/firmware/wireless-regdb/patches/600-custom-fix-txpower-and-dfs.patch deleted file mode 100644 index b1c912444..000000000 --- a/package/firmware/wireless-regdb/patches/600-custom-fix-txpower-and-dfs.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 7eb6313910023f1be6015a8cd9e1b380ae01af64 Mon Sep 17 00:00:00 2001 -From: Chen Minqiang -Date: Sun, 7 Jan 2018 14:38:36 +0800 -Subject: [PATCH] custom fix txpower and dfs - ---- - db.txt | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/db.txt b/db.txt -index 75dc0a3..24989ad 100644 ---- a/db.txt -+++ b/db.txt -@@ -277,9 +277,9 @@ country CL: DFS-JP - (5735 - 5835 @ 80), (20) - - country CN: DFS-FCC -- (2402 - 2482 @ 40), (20) -- (5170 - 5250 @ 80), (23), AUTO-BW -- (5250 - 5330 @ 80), (23), DFS, AUTO-BW -+ (2402 - 2482 @ 40), (30) -+ (5170 - 5250 @ 80), (30), AUTO-BW -+ (5250 - 5330 @ 80), (30), AUTO-BW - (5735 - 5835 @ 80), (30) - # 60 GHz band channels 1,4: 28dBm, channels 2,3: 44dBm - # ref: http://www.miit.gov.cn/n11293472/n11505629/n11506593/n11960250/n11960606/n11960700/n12330791.files/n12330790.pdf -@@ -1238,9 +1238,9 @@ country UG: DFS-FCC - country US: DFS-FCC - (2402 - 2472 @ 40), (30) - # 5.15 ~ 5.25 GHz: 30 dBm for master mode, 23 dBm for clients -- (5170 - 5250 @ 80), (23), AUTO-BW -- (5250 - 5330 @ 80), (23), DFS, AUTO-BW -- (5490 - 5730 @ 160), (23), DFS -+ (5170 - 5250 @ 80), (30), AUTO-BW -+ (5250 - 5330 @ 80), (30), AUTO-BW -+ (5490 - 5730 @ 160), (30) - (5735 - 5835 @ 80), (30) - # 60g band - # reference: http://cfr.regstoday.com/47cfr15.aspx#47_CFR_15p255 --- -2.7.4 - diff --git a/package/kernel/ath10k-ct/Makefile b/package/kernel/ath10k-ct/Makefile index 1725bb7d1..9c69dee72 100644 --- a/package/kernel/ath10k-ct/Makefile +++ b/package/kernel/ath10k-ct/Makefile @@ -29,7 +29,7 @@ include $(INCLUDE_DIR)/package.mk define KernelPackage/ath10k-ct SUBMENU:=Wireless Drivers TITLE:=ath10k-ct driver optimized for CT ath10k firmware - DEPENDS:=+kmod-mac80211 +kmod-ath +@DRIVER_11N_SUPPORT +@DRIVER_11AC_SUPPORT +@DRIVER_11W_SUPPORT +kmod-hwmon-core + DEPENDS:=+kmod-mac80211 +kmod-ath +@DRIVER_11N_SUPPORT +@DRIVER_11AC_SUPPORT +@DRIVER_11W_SUPPORT @PCI_SUPPORT +kmod-hwmon-core FILES:=\ $(PKG_BUILD_DIR)/ath10k$(CT_KVER)/ath10k_pci.ko \ $(PKG_BUILD_DIR)/ath10k$(CT_KVER)/ath10k_core.ko diff --git a/package/kernel/linux/files/sysctl-br-netfilter.conf b/package/kernel/linux/files/sysctl-br-netfilter.conf new file mode 100644 index 000000000..b10ddc087 --- /dev/null +++ b/package/kernel/linux/files/sysctl-br-netfilter.conf @@ -0,0 +1,7 @@ +# Do not edit, changes to this file will be lost on upgrades +# /etc/sysctl.conf can be used to customize sysctl settings + +# disable bridge firewalling by default +net.bridge.bridge-nf-call-arptables=0 +net.bridge.bridge-nf-call-ip6tables=0 +net.bridge.bridge-nf-call-iptables=0 diff --git a/package/kernel/linux/files/sysctl-nf-conntrack.conf b/package/kernel/linux/files/sysctl-nf-conntrack.conf new file mode 100644 index 000000000..37baf5fd6 --- /dev/null +++ b/package/kernel/linux/files/sysctl-nf-conntrack.conf @@ -0,0 +1,9 @@ +# Do not edit, changes to this file will be lost on upgrades +# /etc/sysctl.conf can be used to customize sysctl settings + +net.netfilter.nf_conntrack_acct=1 +net.netfilter.nf_conntrack_checksum=0 +net.netfilter.nf_conntrack_max=16384 +net.netfilter.nf_conntrack_tcp_timeout_established=7440 +net.netfilter.nf_conntrack_udp_timeout=60 +net.netfilter.nf_conntrack_udp_timeout_stream=180 diff --git a/package/kernel/linux/modules/netfilter.mk b/package/kernel/linux/modules/netfilter.mk index f296a9096..51f3544ed 100644 --- a/package/kernel/linux/modules/netfilter.mk +++ b/package/kernel/linux/modules/netfilter.mk @@ -101,6 +101,11 @@ define KernelPackage/nf-conntrack AUTOLOAD:=$(call AutoProbe,$(notdir $(NF_CONNTRACK-m))) endef +define KernelPackage/nf-conntrack/install + $(INSTALL_DIR) $(1)/etc/sysctl.d + $(INSTALL_DATA) ./files/sysctl-nf-conntrack.conf $(1)/etc/sysctl.d/11-nf-conntrack.conf +endef + $(eval $(call KernelPackage,nf-conntrack)) @@ -686,7 +691,7 @@ define KernelPackage/ipt-extra KCONFIG:=$(KCONFIG_IPT_EXTRA) FILES:=$(foreach mod,$(IPT_EXTRA-m),$(LINUX_DIR)/net/$(mod).ko) AUTOLOAD:=$(call AutoProbe,$(notdir $(IPT_EXTRA-m))) - $(call AddDepends/ipt,+kmod-br-netfilter) + $(call AddDepends/ipt) endef define KernelPackage/ipt-extra/description @@ -694,7 +699,6 @@ define KernelPackage/ipt-extra/description Includes: - addrtype - owner - - physdev (if bridge support was enabled in kernel) - pkttype - quota endef @@ -702,6 +706,21 @@ endef $(eval $(call KernelPackage,ipt-extra)) +define KernelPackage/ipt-physdev + TITLE:=physdev module + KCONFIG:=$(KCONFIG_IPT_PHYSDEV) + FILES:=$(foreach mod,$(IPT_PHYSDEV-m),$(LINUX_DIR)/net/$(mod).ko) + AUTOLOAD:=$(call AutoProbe,$(notdir $(IPT_PHYSDEV-m))) + $(call AddDepends/ipt,+kmod-br-netfilter) +endef + +define KernelPackage/ipt-physdev/description + The iptables physdev kernel module +endef + +$(eval $(call KernelPackage,ipt-physdev)) + + define KernelPackage/ip6tables SUBMENU:=$(NF_MENU) TITLE:=IPv6 modules @@ -754,20 +773,24 @@ $(eval $(call KernelPackage,arptables)) define KernelPackage/br-netfilter SUBMENU:=$(NF_MENU) TITLE:=Bridge netfilter support modules - HIDDEN:=1 DEPENDS:=+kmod-ipt-core FILES:=$(LINUX_DIR)/net/bridge/br_netfilter.ko KCONFIG:=CONFIG_BRIDGE_NETFILTER AUTOLOAD:=$(call AutoProbe,br_netfilter) endef +define KernelPackage/br-netfilter/install + $(INSTALL_DIR) $(1)/etc/sysctl.d + $(INSTALL_DATA) ./files/sysctl-br-netfilter.conf $(1)/etc/sysctl.d/11-br-netfilter.conf +endef + $(eval $(call KernelPackage,br-netfilter)) define KernelPackage/ebtables SUBMENU:=$(NF_MENU) TITLE:=Bridge firewalling modules - DEPENDS:=+kmod-ipt-core +kmod-br-netfilter + DEPENDS:=+kmod-ipt-core FILES:=$(foreach mod,$(EBTABLES-m),$(LINUX_DIR)/net/$(mod).ko) KCONFIG:=$(KCONFIG_EBTABLES) AUTOLOAD:=$(call AutoProbe,$(notdir $(EBTABLES-m))) @@ -784,7 +807,7 @@ $(eval $(call KernelPackage,ebtables)) define AddDepends/ebtables SUBMENU:=$(NF_MENU) - DEPENDS+=kmod-ebtables $(1) + DEPENDS+= +kmod-ebtables $(1) endef diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile index 528ebbd88..f3e4d79c8 100644 --- a/package/kernel/mac80211/Makefile +++ b/package/kernel/mac80211/Makefile @@ -11,7 +11,7 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=mac80211 PKG_VERSION:=2017-11-01 -PKG_RELEASE:=4 +PKG_RELEASE:=5 PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources PKG_HASH:=8437ab7886b988c8152e7a4db30b7f41009e49a3b2cb863edd05da1ecd7eb05a @@ -36,6 +36,7 @@ PKG_DRIVERS = \ mt7601u \ mwl8k mwifiex-pcie mwifiex-sdio \ p54-common p54-pci p54-spi p54-usb \ + rsi91x rsi91x-usb rsi91x-sdio\ rt2x00-lib rt2x00-pci rt2x00-usb \ rt2400-pci rt2500-pci rt2500-usb \ rt2800-lib rt2800-mmio rt2800-pci rt2800-soc rt2800-usb \ @@ -988,7 +989,11 @@ IPW2100_NAME:=ipw2100-fw IPW2100_VERSION:=1.3 define Download/ipw2100 - URL:=http://bughost.org/firmware/ + URL:= \ + https://src.fedoraproject.org/repo/pkgs/ipw2100-firmware/ipw2100-fw-1.3.tgz/46aa75bcda1a00efa841f9707bbbd113/ \ + https://archlinux.mirror.pkern.at/other/packages/ipw2100-fw/ \ + http://mirror.ox.ac.uk/sites/ftp.openbsd.org/pub/OpenBSD/distfiles/firmware/ \ + http://firmware.openbsd.org/firmware-dist/ FILE:=$(IPW2100_NAME)-$(IPW2100_VERSION).tgz HASH:=e1107c455e48d324a616b47a622593bc8413dcce72026f72731c0b03dae3a7a2 endef @@ -1012,7 +1017,11 @@ IPW2200_NAME:=ipw2200-fw IPW2200_VERSION:=3.1 define Download/ipw2200 - URL:=http://bughost.org/firmware/ + URL:= \ + https://src.fedoraproject.org/repo/pkgs/ipw2200-firmware/ipw2200-fw-3.1.tgz/eaba788643c7cc7483dd67ace70f6e99/ \ + https://archlinux.mirror.pkern.at/other/packages/ipw2200-fw/ \ + http://mirror.ox.ac.uk/sites/ftp.openbsd.org/pub/OpenBSD/distfiles/firmware/ \ + http://firmware.openbsd.org/firmware-dist/ FILE:=$(IPW2200_NAME)-$(IPW2200_VERSION).tgz HASH:=c6818c11c18cc030d55ff83f64b2bad8feef485e7742f84f94a61d811a6258bd endef @@ -1169,6 +1178,31 @@ define KernelPackage/p54-spi AUTOLOAD:=$(call AutoProbe,p54spi) endef +define KernelPackage/rsi91x + $(call KernelPackage/mac80211/Default) + TITLE:=Redpine Signals Inc 91x WLAN driver support + DEPENDS+= +kmod-mac80211 +rs9113-firmware + FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_91x.ko +endef + +define KernelPackage/rsi91x-usb + $(call KernelPackage/mac80211/Default) + TITLE:=Redpine Signals USB bus support + DEPENDS+= +kmod-mac80211 +kmod-usb2 +kmod-rsi91x +rs9113-firmware + FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_usb.ko + AUTOLOAD:=$(call AutoProbe,rsi_usb) +endef + +define KernelPackage/rsi91x-sdio + $(call KernelPackage/mac80211/Default) + TITLE:=Redpine Signals SDIO bus support + DEPENDS+= +kmod-mac80211 +kmod-mmc +kmod-rsi91x +rs9113-firmware + FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_sdio.ko + AUTOLOAD:=$(call AutoProbe,rsi_sdio) +endef + + + define KernelPackage/rt2x00/Default $(call KernelPackage/mac80211/Default) TITLE:=Ralink Drivers for RT2x00 cards @@ -1269,7 +1303,7 @@ endef define KernelPackage/rt2800-soc $(call KernelPackage/rt2x00/Default) - DEPENDS += @(TARGET_ramips_rt288x||TARGET_ramips_rt305x||TARGET_ramips_rt3883||TARGET_ramips_mt7620||TARGET_ramips_mt7620nand) +kmod-rt2800-mmio +kmod-rt2800-lib + DEPENDS += @(TARGET_ramips_rt288x||TARGET_ramips_rt305x||TARGET_ramips_rt3883||TARGET_ramips_mt7620) +kmod-rt2800-mmio +kmod-rt2800-lib TITLE += (RT28xx/RT3xxx SoC) FILES := \ $(PKG_BUILD_DIR)/drivers/net/wireless/ralink/rt2x00/rt2x00soc.ko \ @@ -1691,6 +1725,9 @@ config-$(call config_package,wl12xx) += WL12XX config-$(call config_package,wl18xx) += WL18XX config-y += WL_TI WILINK_PLATFORM_DATA config-$(call config_package,zd1211rw) += ZD1211RW +config-$(call config_package,rsi91x) += RSI_91X +config-$(call config_package,rsi91x-usb) += RSI_USB +config-$(call config_package,rsi91x-sdio) += RSI_SDIO config-$(call config_package,rtlwifi) += RTL_CARDS RTLWIFI config-$(call config_package,rtlwifi-pci) += RTLWIFI_PCI @@ -1883,6 +1920,9 @@ $(eval $(call KernelPackage,p54-common)) $(eval $(call KernelPackage,p54-pci)) $(eval $(call KernelPackage,p54-usb)) $(eval $(call KernelPackage,p54-spi)) +$(eval $(call KernelPackage,rsi91x)) +$(eval $(call KernelPackage,rsi91x-usb)) +$(eval $(call KernelPackage,rsi91x-sdio)) $(eval $(call KernelPackage,rt2x00-lib)) $(eval $(call KernelPackage,rt2x00-mmio)) $(eval $(call KernelPackage,rt2x00-pci)) diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh index bf9d52ae4..16e32a91a 100644 --- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh +++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh @@ -524,7 +524,7 @@ mac80211_setup_supplicant() { mac80211_setup_supplicant_noctl() { wpa_supplicant_prepare_interface "$ifname" nl80211 || return 1 - wpa_supplicant_add_network "$ifname" "$freq" "$htmode" + wpa_supplicant_add_network "$ifname" "$freq" "$htmode" "$noscan" wpa_supplicant_run "$ifname" } diff --git a/package/kernel/mac80211/files/lib/wifi/mac80211.sh b/package/kernel/mac80211/files/lib/wifi/mac80211.sh old mode 100755 new mode 100644 index 220ad69d7..6103b5d04 --- a/package/kernel/mac80211/files/lib/wifi/mac80211.sh +++ b/package/kernel/mac80211/files/lib/wifi/mac80211.sh @@ -82,14 +82,11 @@ detect_mac80211() { ht_capab="" iw phy "$dev" info | grep -q 'Capabilities:' && htmode=HT20 - iw phy "$dev" info | grep -q '2412 MHz' || { mode_band="a"; channel="36"; } - vht_cap=$(iw phy "$dev" info | grep -c 'VHT Capabilities') - cap_5ghz=$(iw phy "$dev" info | grep -c "Band 2") - [ "$vht_cap" -gt 0 -a "$cap_5ghz" -gt 0 ] && { - mode_band="a"; + iw phy "$dev" info | grep -q '5180 MHz' && { + mode_band="a" channel="36" - htmode="VHT80" + iw phy "$dev" info | grep -q 'VHT Capabilities' && htmode="VHT80" } [ -n "$htmode" ] && ht_capab="set wireless.radio${devidx}.htmode=$htmode" @@ -109,15 +106,6 @@ detect_mac80211() { dev_id="set wireless.radio${devidx}.macaddr=$(cat /sys/class/ieee80211/${dev}/macaddress)" fi - if [ $mode_band == "a" ]; then - ssid_5g="_5G" - else - ssid_5g="_2.4G" - fi - [ -f /lib/03_set_wifi_mac ] && ./lib/03_set_wifi_mac - Mac=`cat /sys/class/ieee80211/${dev}/macaddress|awk -F ":" '{print $4""$5""$6 }'| tr a-z A-Z` - Wifi_name="OpenWrt${ssid_5g}_${Mac}" - uci -q batch <<-EOF set wireless.radio${devidx}=wifi-device set wireless.radio${devidx}.type=mac80211 @@ -125,13 +113,13 @@ detect_mac80211() { set wireless.radio${devidx}.hwmode=11${mode_band} ${dev_id} ${ht_capab} - set wireless.radio${devidx}.noscan=1 set wireless.radio${devidx}.disabled=0 + set wireless.default_radio${devidx}=wifi-iface set wireless.default_radio${devidx}.device=radio${devidx} set wireless.default_radio${devidx}.network=lan set wireless.default_radio${devidx}.mode=ap - set wireless.default_radio${devidx}.ssid=${Wifi_name} + set wireless.default_radio${devidx}.ssid=OpenWrt set wireless.default_radio${devidx}.encryption=none EOF uci -q commit wireless diff --git a/package/kernel/mac80211/patches/081-ath10k-calibration-variant.patch b/package/kernel/mac80211/patches/081-ath10k-calibration-variant.patch index f9a830c7a..272402786 100644 --- a/package/kernel/mac80211/patches/081-ath10k-calibration-variant.patch +++ b/package/kernel/mac80211/patches/081-ath10k-calibration-variant.patch @@ -1,5 +1,6 @@ +From d06f26c5c8a41f246a9c40862a77a55725cedbd3 Mon Sep 17 00:00:00 2001 From: Sven Eckelmann -Date: Fri, 10 Mar 2017 09:06:15 +0100 +Date: Fri, 8 Dec 2017 11:37:42 +0100 Subject: ath10k: search DT for qcom,ath10k-calibration-variant Board Data File (BDF) is loaded upon driver boot-up procedure. The right @@ -7,7 +8,7 @@ board data file is identified on QCA4019 using bus, bmi-chip-id and bmi-board-id. The problem, however, can occur when the (default) board data file cannot -fulfill the vendor requirements and it is necessary to use a different +fulfill with the vendor requirements and it is necessary to use a different board data file. This problem was solved for SMBIOS by adding a special SMBIOS type 0xF8. @@ -33,13 +34,14 @@ This would create the boarddata identifiers for the board-2.bin search * bus=ahb,bmi-chip-id=0,bmi-board-id=17,variant=RT-AC58U Signed-off-by: Sven Eckelmann - -Origin: other, https://patchwork.kernel.org/patch/9615185/ +Signed-off-by: Kalle Valo --- + drivers/net/wireless/ath/ath10k/core.c | 40 ++++++++++++++++++++++++++++------ + 1 file changed, 33 insertions(+), 7 deletions(-) --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c -@@ -860,6 +860,25 @@ static int ath10k_core_check_smbios(stru +@@ -860,6 +860,28 @@ static int ath10k_core_check_smbios(stru return 0; } @@ -57,7 +59,10 @@ Origin: other, https://patchwork.kernel.org/patch/9615185/ + if (!variant) + return -ENODATA; + -+ strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)); ++ if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) ++ ath10k_dbg(ar, ATH10K_DBG_BOOT, ++ "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", ++ variant); + + return 0; +} @@ -65,7 +70,7 @@ Origin: other, https://patchwork.kernel.org/patch/9615185/ static int ath10k_download_and_run_otp(struct ath10k *ar) { u32 result, address = ar->hw_params.patch_load_addr; -@@ -1231,19 +1250,19 @@ static int ath10k_core_create_board_name +@@ -1231,19 +1253,19 @@ static int ath10k_core_create_board_name /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; @@ -91,7 +96,7 @@ Origin: other, https://patchwork.kernel.org/patch/9615185/ scnprintf(name, name_len, "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", ath10k_bus_str(ar->hif.bus), -@@ -2343,7 +2362,11 @@ static int ath10k_core_probe_fw(struct a +@@ -2343,7 +2365,11 @@ static int ath10k_core_probe_fw(struct a ret = ath10k_core_check_smbios(ar); if (ret) diff --git a/package/kernel/mac80211/patches/082-ath10k-suppress-Unknown-eventid-36925-warnings.patch b/package/kernel/mac80211/patches/082-ath10k-suppress-Unknown-eventid-36925-warnings.patch new file mode 100644 index 000000000..9ddede3a6 --- /dev/null +++ b/package/kernel/mac80211/patches/082-ath10k-suppress-Unknown-eventid-36925-warnings.patch @@ -0,0 +1,36 @@ +From 606204bb863fa3b0bb54929d79b4dc46338f9180 Mon Sep 17 00:00:00 2001 +From: Sathishkumar Muruganandam +Date: Tue, 27 Mar 2018 11:26:46 +0300 +Subject: [PATCH] ath10k: suppress "Unknown eventid: 36925" warnings + +FW has Smart Logging feature enabled by default for detecting failures +and processing FATAL_CONDITION_EVENTID (36925 - 0x903D) back to host. + +Since ath10k doesn't implement the Smart Logging and FATAL CONDITION +EVENT processing yet, suppressing the unknown event ID warning by moving +this under ATH10K_DBG_WMI. + +Simulated the same issue by having associated STA powered off when +ping flood was running from AP backbone. This triggerd STA KICKOUT +in AP followed by FATAL CONDITION event 36925. + +Issue was reproduced and verified in below DUT +------------------------------------------------ +AP mode of OpenWRT QCA9984 running 6.0.8 with FW ver 10.4-3.5.3-00053 + +Signed-off-by: Sathishkumar Muruganandam +Signed-off-by: Kalle Valo +--- + drivers/net/wireless/ath/ath10k/wmi.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/wireless/ath/ath10k/wmi.c ++++ b/drivers/net/wireless/ath/ath10k/wmi.c +@@ -5462,6 +5462,7 @@ static void ath10k_wmi_10_4_op_rx(struct + case WMI_10_4_WOW_WAKEUP_HOST_EVENTID: + case WMI_10_4_PEER_RATECODE_LIST_EVENTID: + case WMI_10_4_WDS_PEER_EVENTID: ++ case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID: + ath10k_dbg(ar, ATH10K_DBG_WMI, + "received event id %d not implemented\n", id); + break; diff --git a/package/kernel/mac80211/patches/160-ath10k-search-all-IEs-for-variant-before-falling-back.patch b/package/kernel/mac80211/patches/160-ath10k-search-all-IEs-for-variant-before-falling-back.patch index cac396aec..357b006bc 100644 --- a/package/kernel/mac80211/patches/160-ath10k-search-all-IEs-for-variant-before-falling-back.patch +++ b/package/kernel/mac80211/patches/160-ath10k-search-all-IEs-for-variant-before-falling-back.patch @@ -47,7 +47,7 @@ Signed-off-by: Thomas Hebb --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c -@@ -1129,14 +1129,61 @@ out: +@@ -1132,14 +1132,61 @@ out: return ret; } @@ -112,7 +112,7 @@ Signed-off-by: Thomas Hebb ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, -@@ -1174,69 +1221,23 @@ static int ath10k_core_fetch_board_data_ +@@ -1177,69 +1224,23 @@ static int ath10k_core_fetch_board_data_ data += magic_len; len -= magic_len; @@ -191,7 +191,7 @@ Signed-off-by: Thomas Hebb return 0; err: -@@ -1245,12 +1246,12 @@ err: +@@ -1248,12 +1249,12 @@ err: } static int ath10k_core_create_board_name(struct ath10k *ar, char *name, @@ -206,7 +206,7 @@ Signed-off-by: Thomas Hebb scnprintf(variant, sizeof(variant), ",variant=%s", ar->id.bdf_ext); -@@ -1276,17 +1277,26 @@ out: +@@ -1279,17 +1280,26 @@ out: static int ath10k_core_fetch_board_file(struct ath10k *ar) { diff --git a/package/kernel/mac80211/patches/921-ath10k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/921-ath10k_init_devices_synchronously.patch index 3b1e9673b..2c466a300 100644 --- a/package/kernel/mac80211/patches/921-ath10k_init_devices_synchronously.patch +++ b/package/kernel/mac80211/patches/921-ath10k_init_devices_synchronously.patch @@ -14,7 +14,7 @@ Signed-off-by: Sven Eckelmann --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c -@@ -2458,6 +2458,16 @@ int ath10k_core_register(struct ath10k * +@@ -2494,6 +2494,16 @@ int ath10k_core_register(struct ath10k * ar->chip_id = chip_id; queue_work(ar->workqueue, &ar->register_work); diff --git a/package/kernel/mac80211/patches/970-rsi-fix-kbuild-reported-build-errors-with-CONFIG_PM-off b/package/kernel/mac80211/patches/970-rsi-fix-kbuild-reported-build-errors-with-CONFIG_PM-off new file mode 100644 index 000000000..3b139ee32 --- /dev/null +++ b/package/kernel/mac80211/patches/970-rsi-fix-kbuild-reported-build-errors-with-CONFIG_PM-off @@ -0,0 +1,93 @@ +From e6b3b2ed3d270b3c7080c9cf7d28636dc74b0387 Mon Sep 17 00:00:00 2001 +From: Amitkumar Karwar +Date: Wed, 1 Nov 2017 17:42:45 +0530 +Subject: rsi: fix kbuild reported build errors with CONFIG_PM off + +Some wowlan related code was outside CONFIG_PM flag which caused these +build errors. They are fixed by moving that code under CONFIG_PM flag. + +Reported-by: kbuild test robot +Fixes: ef71ed0608c ("rsi: sdio: Add WOWLAN support for S5 shutdown state") +Fixes: a24e35fcee0 ("rsi: sdio: Add WOWLAN support for S4 hibernate state") +Fixes: e1ced6422a3 ("rsi: sdio: add WOWLAN support for S3 suspend state") +Signed-off-by: Amitkumar Karwar +Signed-off-by: Kalle Valo +--- + drivers/net/wireless/rsi/rsi_91x_mac80211.c | 5 ++++- + drivers/net/wireless/rsi/rsi_91x_mgmt.c | 2 ++ + drivers/net/wireless/rsi/rsi_common.h | 2 ++ + drivers/net/wireless/rsi/rsi_mgmt.h | 2 ++ + 4 files changed, 10 insertions(+), 1 deletion(-) + +--- a/drivers/net/wireless/rsi/rsi_91x_mac80211.c ++++ b/drivers/net/wireless/rsi/rsi_91x_mac80211.c +@@ -1752,6 +1752,7 @@ static int rsi_mac80211_cancel_roc(struc + return 0; + } + ++#ifdef CONFIG_PM + static const struct wiphy_wowlan_support rsi_wowlan_support = { + .flags = WIPHY_WOWLAN_ANY | + WIPHY_WOWLAN_MAGIC_PKT | +@@ -1824,7 +1825,6 @@ int rsi_config_wowlan(struct rsi_hw *ada + } + EXPORT_SYMBOL(rsi_config_wowlan); + +-#ifdef CONFIG_PM + static int rsi_mac80211_suspend(struct ieee80211_hw *hw, + struct cfg80211_wowlan *wowlan) + { +@@ -1977,7 +1977,10 @@ int rsi_mac80211_attach(struct rsi_commo + wiphy->features |= NL80211_FEATURE_INACTIVITY_TIMER; + wiphy->reg_notifier = rsi_reg_notify; + ++#ifdef CONFIG_PM + wiphy->wowlan = &rsi_wowlan_support; ++#endif ++ + wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); + + /* Wi-Fi direct parameters */ +--- a/drivers/net/wireless/rsi/rsi_91x_mgmt.c ++++ b/drivers/net/wireless/rsi/rsi_91x_mgmt.c +@@ -1597,6 +1597,7 @@ static int rsi_send_beacon(struct rsi_co + return 0; + } + ++#ifdef CONFIG_PM + int rsi_send_wowlan_request(struct rsi_common *common, u16 flags, + u16 sleep_status) + { +@@ -1630,6 +1631,7 @@ int rsi_send_wowlan_request(struct rsi_c + + return rsi_send_internal_mgmt_frame(common, skb); + } ++#endif + + /** + * rsi_handle_ta_confirm_type() - This function handles the confirm frames. +--- a/drivers/net/wireless/rsi/rsi_common.h ++++ b/drivers/net/wireless/rsi/rsi_common.h +@@ -83,7 +83,9 @@ u16 rsi_get_connected_channel(struct iee + struct rsi_hw *rsi_91x_init(void); + void rsi_91x_deinit(struct rsi_hw *adapter); + int rsi_read_pkt(struct rsi_common *common, s32 rcv_pkt_len); ++#ifdef CONFIG_PM + int rsi_config_wowlan(struct rsi_hw *adapter, struct cfg80211_wowlan *wowlan); ++#endif + struct rsi_sta *rsi_find_sta(struct rsi_common *common, u8 *mac_addr); + struct ieee80211_vif *rsi_get_vif(struct rsi_hw *adapter, u8 *mac); + void rsi_roc_timeout(struct timer_list *t); +--- a/drivers/net/wireless/rsi/rsi_mgmt.h ++++ b/drivers/net/wireless/rsi/rsi_mgmt.h +@@ -668,8 +668,10 @@ int rsi_band_check(struct rsi_common *co + int rsi_send_rx_filter_frame(struct rsi_common *common, u16 rx_filter_word); + int rsi_send_radio_params_update(struct rsi_common *common); + int rsi_set_antenna(struct rsi_common *common, u8 antenna); ++#ifdef CONFIG_PM + int rsi_send_wowlan_request(struct rsi_common *common, u16 flags, + u16 sleep_status); ++#endif + int rsi_send_ps_request(struct rsi_hw *adapter, bool enable, + struct ieee80211_vif *vif); + #endif diff --git a/package/kernel/mac80211/patches/971-rsi-move-rsi_sdio_reinit_device-out-of-CONFIG_PM.patch b/package/kernel/mac80211/patches/971-rsi-move-rsi_sdio_reinit_device-out-of-CONFIG_PM.patch new file mode 100644 index 000000000..499b4ee7f --- /dev/null +++ b/package/kernel/mac80211/patches/971-rsi-move-rsi_sdio_reinit_device-out-of-CONFIG_PM.patch @@ -0,0 +1,96 @@ +From 39f1332c526cd9d6de59a72520e8334e54b62cda Mon Sep 17 00:00:00 2001 +From: Amitkumar Karwar +Date: Wed, 1 Nov 2017 17:42:44 +0530 +Subject: rsi: move rsi_sdio_reinit_device() out of CONFIG_PM + +This function is generic. It doesn't contain wowlan specific code. +It should not be under CONFIG_PM. This patch resolves compilation +errors observed when CONFIG_PM flag is disabled. + +Reported-by: kbuild test robot +Fixes: ef71ed0608c ("rsi: sdio: Add WOWLAN support for S5 shutdown state") +Fixes: a24e35fcee0 ("rsi: sdio: Add WOWLAN support for S4 hibernate state") +Fixes: e1ced6422a3 ("rsi: sdio: add WOWLAN support for S3 suspend state") +Signed-off-by: Amitkumar Karwar +Signed-off-by: Kalle Valo +--- + drivers/net/wireless/rsi/rsi_91x_sdio.c | 52 ++++++++++++++++----------------- + drivers/net/wireless/rsi/rsi_sdio.h | 1 - + 2 files changed, 26 insertions(+), 27 deletions(-) + +--- a/drivers/net/wireless/rsi/rsi_91x_sdio.c ++++ b/drivers/net/wireless/rsi/rsi_91x_sdio.c +@@ -871,6 +871,32 @@ fail: + return status; + } + ++static int rsi_sdio_reinit_device(struct rsi_hw *adapter) ++{ ++ struct rsi_91x_sdiodev *sdev = adapter->rsi_dev; ++ struct sdio_func *pfunction = sdev->pfunction; ++ int ii; ++ ++ for (ii = 0; ii < NUM_SOFT_QUEUES; ii++) ++ skb_queue_purge(&adapter->priv->tx_queue[ii]); ++ ++ /* Initialize device again */ ++ sdio_claim_host(pfunction); ++ ++ sdio_release_irq(pfunction); ++ rsi_reset_card(pfunction); ++ ++ sdio_enable_func(pfunction); ++ rsi_setupcard(adapter); ++ rsi_init_sdio_slave_regs(adapter); ++ sdio_claim_irq(pfunction, rsi_handle_interrupt); ++ rsi_hal_device_init(adapter); ++ ++ sdio_release_host(pfunction); ++ ++ return 0; ++} ++ + static struct rsi_host_intf_ops sdio_host_intf_ops = { + .write_pkt = rsi_sdio_host_intf_write_pkt, + .read_pkt = rsi_sdio_host_intf_read_pkt, +@@ -1281,32 +1307,6 @@ static void rsi_shutdown(struct device * + rsi_dbg(INFO_ZONE, "***** RSI module shut down *****\n"); + } + +-int rsi_sdio_reinit_device(struct rsi_hw *adapter) +-{ +- struct rsi_91x_sdiodev *sdev = adapter->rsi_dev; +- struct sdio_func *pfunction = sdev->pfunction; +- int ii; +- +- for (ii = 0; ii < NUM_SOFT_QUEUES; ii++) +- skb_queue_purge(&adapter->priv->tx_queue[ii]); +- +- /* Initialize device again */ +- sdio_claim_host(pfunction); +- +- sdio_release_irq(pfunction); +- rsi_reset_card(pfunction); +- +- sdio_enable_func(pfunction); +- rsi_setupcard(adapter); +- rsi_init_sdio_slave_regs(adapter); +- sdio_claim_irq(pfunction, rsi_handle_interrupt); +- rsi_hal_device_init(adapter); +- +- sdio_release_host(pfunction); +- +- return 0; +-} +- + static int rsi_restore(struct device *dev) + { + struct sdio_func *pfunction = dev_to_sdio_func(dev); +--- a/drivers/net/wireless/rsi/rsi_sdio.h ++++ b/drivers/net/wireless/rsi/rsi_sdio.h +@@ -131,5 +131,4 @@ int rsi_sdio_master_access_msword(struct + void rsi_sdio_ack_intr(struct rsi_hw *adapter, u8 int_bit); + int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter); + int rsi_sdio_check_buffer_status(struct rsi_hw *adapter, u8 q_num); +-int rsi_sdio_reinit_device(struct rsi_hw *adapter); + #endif diff --git a/package/kernel/mt76/Makefile b/package/kernel/mt76/Makefile index d83e38793..dbd2d892c 100644 --- a/package/kernel/mt76/Makefile +++ b/package/kernel/mt76/Makefile @@ -8,9 +8,9 @@ PKG_LICENSE_FILES:= PKG_SOURCE_URL:=https://github.com/openwrt/mt76 PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2018-02-27 -PKG_SOURCE_VERSION:=ffa2069e78cf267ce79d7a8820aa0368161ff6e1 -PKG_MIRROR_HASH:=dee90d713e3c351ee51da51030e56867fa9bd2eac8f222734d0573223a5e0a41 +PKG_SOURCE_DATE:=2018-04-18 +PKG_SOURCE_VERSION:=e2eedc9229dad9b9d653ad0abb4f3571d1676148 +PKG_MIRROR_HASH:=5bf8879814ffb498228a070e5f8ebedd06cbf4c286a7875e8616d26f154be6ac PKG_MAINTAINER:=Felix Fietkau PKG_BUILD_PARALLEL:=1 diff --git a/package/kernel/mwlwifi/Makefile b/package/kernel/mwlwifi/Makefile index 1613fb405..86228eeb1 100644 --- a/package/kernel/mwlwifi/Makefile +++ b/package/kernel/mwlwifi/Makefile @@ -15,9 +15,9 @@ PKG_LICENSE_FILES:= PKG_SOURCE_URL:=https://github.com/kaloz/mwlwifi PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2018-03-05 -PKG_SOURCE_VERSION:=b1b9a9e1c1beee30a8cce4038f4109727362ebe0 -PKG_MIRROR_HASH:=720a3bc5ecb31419fdeebe02efba764ecc77815332114e97dc80f989d85a816f +PKG_SOURCE_DATE:=2018-03-30 +PKG_SOURCE_VERSION:=fcaea79ad33d6ae3c381d9e96bf77d6870ca8e79 +PKG_MIRROR_HASH:=1c0fa04ca80939038139dd50a50d9dc0d879b7cb594770282e3ec0008a479452 PKG_MAINTAINER:=Imre Kaloz PKG_BUILD_PARALLEL:=1 diff --git a/package/lean/default-settings/Makefile b/package/lean/default-settings/Makefile index e501db0ac..8a1d0ab66 100644 --- a/package/lean/default-settings/Makefile +++ b/package/lean/default-settings/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=default-settings PKG_VERSION:=1.0 -PKG_RELEASE:=38 +PKG_RELEASE:=39 PKG_LICENSE:=GPLv3 PKG_LICENSE_FILES:=LICENSE diff --git a/package/lean/default-settings/files/zzz-default-settings b/package/lean/default-settings/files/zzz-default-settings index 6a643249e..ef69eeef7 100755 --- a/package/lean/default-settings/files/zzz-default-settings +++ b/package/lean/default-settings/files/zzz-default-settings @@ -46,7 +46,7 @@ sed -i '/set wireless.radio${devidx}.disabled/d' /lib/wifi/mac80211.sh wifi up sed -i '/DISTRIB_REVISION/d' /etc/openwrt_release -echo "DISTRIB_REVISION='R7.6.1 By Lean'" >> /etc/openwrt_release +echo "DISTRIB_REVISION='R7.7 By Lean'" >> /etc/openwrt_release sed -i '/DISTRIB_DESCRIPTION/d' /etc/openwrt_release echo "DISTRIB_DESCRIPTION='OpenWrt '" >> /etc/openwrt_release diff --git a/package/lean/default-settings/i18n/default.zh-cn.po b/package/lean/default-settings/i18n/default.zh-cn.po index bf5517236..f689bca08 100644 --- a/package/lean/default-settings/i18n/default.zh-cn.po +++ b/package/lean/default-settings/i18n/default.zh-cn.po @@ -25,9 +25,6 @@ msgstr "闪存大小" msgid "Free Memory" msgstr "释放内存" -msgid "ShadowsocksR Pro" -msgstr "酸酸乳" - msgid "Core" msgstr "核心数" diff --git a/package/libs/libevent2/Makefile b/package/libs/libevent2/Makefile index ecab6fb9f..5d56f37c5 100644 --- a/package/libs/libevent2/Makefile +++ b/package/libs/libevent2/Makefile @@ -8,15 +8,14 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libevent2 -PKG_VERSION:=2.1.8 +PKG_VERSION:=2.0.22 PKG_RELEASE:=1 -PKG_SOURCE_PROTO:=git -PKG_SOURCE_URL=https://github.com/libevent/libevent.git -PKG_SOURCE_VERSION:=release-2.1.8-stable -PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION) +PKG_BUILD_DIR:=$(BUILD_DIR)/libevent-$(PKG_VERSION)-stable PKG_SOURCE:=libevent-$(PKG_VERSION)-stable.tar.gz -PKG_MAINTAINER:=Dengfeng Liu +PKG_SOURCE_URL:=@SF/levent +PKG_HASH:=71c2c49f0adadacfdbe6332a372c38cf9c8b7895bb73dabeaa53cdcc1d4e1fa3 +PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=BSD-3-Clause PKG_CPE_ID:=cpe:/a:libevent_project:libevent @@ -31,7 +30,6 @@ define Package/libevent2/Default CATEGORY:=Libraries TITLE:=Event notification URL:=http://www.monkey.org/~provos/libevent/ - DEPENDS+=+libopenssl endef define Package/libevent2/Default/description @@ -85,6 +83,7 @@ endef define Package/libevent2-openssl $(call Package/libevent2/Default) TITLE+= OpenSSL library (version 2.0) + DEPENDS+=+libopenssl endef define Package/libevent2-openssl/description @@ -122,34 +121,34 @@ define Build/InstallDev $(CP) $(PKG_INSTALL_DIR)/usr/include/* $(1)/usr/include/ $(INSTALL_DIR) $(1)/usr/lib $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent*.{la,a,so} $(1)/usr/lib/ - $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent*-2.1.so* $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent*-2.0.so* $(1)/usr/lib/ $(INSTALL_DIR) $(1)/usr/lib/pkgconfig $(CP) $(PKG_INSTALL_DIR)/usr/lib/pkgconfig/libevent*.pc $(1)/usr/lib/pkgconfig/ endef define Package/libevent2/install $(INSTALL_DIR) $(1)/usr/lib - $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent-2.1.so.* $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent-2.0.so.* $(1)/usr/lib/ endef define Package/libevent2-core/install $(INSTALL_DIR) $(1)/usr/lib - $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_core-2.1.so.* $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_core-2.0.so.* $(1)/usr/lib/ endef define Package/libevent2-extra/install $(INSTALL_DIR) $(1)/usr/lib - $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_extra-2.1.so.* $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_extra-2.0.so.* $(1)/usr/lib/ endef define Package/libevent2-openssl/install $(INSTALL_DIR) $(1)/usr/lib - $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_openssl-2.1.so.* $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_openssl-2.0.so.* $(1)/usr/lib/ endef define Package/libevent2-pthreads/install $(INSTALL_DIR) $(1)/usr/lib - $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_pthreads-2.1.so.* $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libevent_pthreads-2.0.so.* $(1)/usr/lib/ endef $(eval $(call BuildPackage,libevent2)) diff --git a/package/libs/libnftnl/Makefile b/package/libs/libnftnl/Makefile index f4a1bb132..149fad908 100644 --- a/package/libs/libnftnl/Makefile +++ b/package/libs/libnftnl/Makefile @@ -8,13 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libnftnl -PKG_VERSION:=1.0.7 -PKG_RELEASE:=1 +PKG_VERSION:=1.0.9 +PKG_RELEASE:=2 -PKG_SOURCE_URL:=https://git.netfilter.org/libnftnl -PKG_SOURCE_PROTO:=git -PKG_SOURCE_VERSION:=libnftnl-1.0.7 -PKG_MIRROR_HASH:=d38a409d52074a5b20f5b7477b385506692a9a05ec6f4ac3d14a8a80aa4f81d9 +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 +PKG_SOURCE_URL:=https://netfilter.org/projects/$(PKG_NAME)/files +PKG_HASH:=fec1d824aee301e59a11aeaae2a2d429cb99ead81e6bafab791a4dd6569b3635 PKG_MAINTAINER:=Steven Barth PKG_LICENSE:=GPL-2.0+ @@ -24,6 +23,8 @@ PKG_INSTALL:=1 include $(INCLUDE_DIR)/package.mk +DISABLE_NLS:= + define Package/libnftnl SECTION:=libs CATEGORY:=Libraries @@ -42,8 +43,7 @@ TARGET_CFLAGS += $(FPIC) CONFIGURE_ARGS += \ --enable-static \ --enable-shared \ - --without-json-parsing \ - --without-xml-parsing \ + --without-json-parsing define Build/InstallDev $(INSTALL_DIR) $(1)/usr/include/libnftnl diff --git a/package/libs/libnftnl/patches/100-src-add-flowtable-support.patch b/package/libs/libnftnl/patches/100-src-add-flowtable-support.patch new file mode 100644 index 000000000..0d15f9235 --- /dev/null +++ b/package/libs/libnftnl/patches/100-src-add-flowtable-support.patch @@ -0,0 +1,1444 @@ +From: Pablo Neira Ayuso +Date: Wed, 29 Nov 2017 13:07:02 +0100 +Subject: [PATCH] src: add flowtable support + +This patch allows you to add, delete and list flowtable through the +existing netlink interface. + +Signed-off-by: Pablo Neira Ayuso +--- + create mode 100644 examples/nft-flowtable-add.c + create mode 100644 examples/nft-flowtable-del.c + create mode 100644 examples/nft-flowtable-get.c + create mode 100644 include/libnftnl/flowtable.h + create mode 100644 src/flowtable.c + +--- a/examples/Makefile.am ++++ b/examples/Makefile.am +@@ -25,6 +25,9 @@ check_PROGRAMS = nft-table-add \ + nft-obj-add \ + nft-obj-get \ + nft-obj-del \ ++ nft-flowtable-add \ ++ nft-flowtable-del \ ++ nft-flowtable-get \ + nft-ruleset-get \ + nft-ruleset-parse-file \ + nft-compat-get +@@ -104,6 +107,15 @@ nft_obj_del_LDADD = ../src/libnftnl.la $ + nft_obj_get_SOURCES = nft-obj-get.c + nft_obj_get_LDADD = ../src/libnftnl.la ${LIBMNL_LIBS} + ++nft_flowtable_add_SOURCES = nft-flowtable-add.c ++nft_flowtable_add_LDADD = ../src/libnftnl.la ${LIBMNL_LIBS} ++ ++nft_flowtable_del_SOURCES = nft-flowtable-del.c ++nft_flowtable_del_LDADD = ../src/libnftnl.la ${LIBMNL_LIBS} ++ ++nft_flowtable_get_SOURCES = nft-flowtable-get.c ++nft_flowtable_get_LDADD = ../src/libnftnl.la ${LIBMNL_LIBS} ++ + nft_ruleset_get_SOURCES = nft-ruleset-get.c + nft_ruleset_get_LDADD = ../src/libnftnl.la ${LIBMNL_LIBS} + +--- /dev/null ++++ b/examples/nft-flowtable-add.c +@@ -0,0 +1,136 @@ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++ ++static struct nftnl_flowtable *flowtable_add_parse(int argc, char *argv[]) ++{ ++ const char *dev_array[] = { "eth0", "tap0", NULL }; ++ struct nftnl_flowtable *t; ++ int hooknum = 0; ++ ++ if (strcmp(argv[4], "ingress") == 0) ++ hooknum = NF_NETDEV_INGRESS; ++ else { ++ fprintf(stderr, "Unknown hook: %s\n", argv[4]); ++ return NULL; ++ } ++ ++ t = nftnl_flowtable_alloc(); ++ if (t == NULL) { ++ perror("OOM"); ++ return NULL; ++ } ++ nftnl_flowtable_set(t, NFTNL_FLOWTABLE_TABLE, argv[2]); ++ nftnl_flowtable_set(t, NFTNL_FLOWTABLE_NAME, argv[3]); ++ if (argc == 6) { ++ nftnl_flowtable_set_u32(t, NFTNL_FLOWTABLE_HOOKNUM, hooknum); ++ nftnl_flowtable_set_u32(t, NFTNL_FLOWTABLE_PRIO, atoi(argv[5])); ++ } ++ nftnl_flowtable_set_array(t, NFTNL_FLOWTABLE_DEVICES, dev_array); ++ ++ return t; ++} ++ ++int main(int argc, char *argv[]) ++{ ++ struct mnl_socket *nl; ++ char buf[MNL_SOCKET_BUFFER_SIZE]; ++ struct nlmsghdr *nlh; ++ uint32_t portid, seq, flowtable_seq; ++ int ret, family; ++ struct nftnl_flowtable *t; ++ struct mnl_nlmsg_batch *batch; ++ int batching; ++ ++ if (argc != 6) { ++ fprintf(stderr, "Usage: %s \n", ++ argv[0]); ++ exit(EXIT_FAILURE); ++ } ++ ++ if (strcmp(argv[1], "ip") == 0) ++ family = NFPROTO_IPV4; ++ else if (strcmp(argv[1], "ip6") == 0) ++ family = NFPROTO_IPV6; ++ else if (strcmp(argv[1], "bridge") == 0) ++ family = NFPROTO_BRIDGE; ++ else if (strcmp(argv[1], "arp") == 0) ++ family = NFPROTO_ARP; ++ else { ++ fprintf(stderr, "Unknown family: ip, ip6, bridge, arp\n"); ++ exit(EXIT_FAILURE); ++ } ++ ++ t = flowtable_add_parse(argc, argv); ++ if (t == NULL) ++ exit(EXIT_FAILURE); ++ ++ batching = nftnl_batch_is_supported(); ++ if (batching < 0) { ++ perror("cannot talk to nfnetlink"); ++ exit(EXIT_FAILURE); ++ } ++ ++ seq = time(NULL); ++ batch = mnl_nlmsg_batch_start(buf, sizeof(buf)); ++ ++ if (batching) { ++ nftnl_batch_begin(mnl_nlmsg_batch_current(batch), seq++); ++ mnl_nlmsg_batch_next(batch); ++ } ++ ++ flowtable_seq = seq; ++ nlh = nftnl_flowtable_nlmsg_build_hdr(mnl_nlmsg_batch_current(batch), ++ NFT_MSG_NEWFLOWTABLE, family, ++ NLM_F_CREATE|NLM_F_ACK, seq++); ++ nftnl_flowtable_nlmsg_build_payload(nlh, t); ++ nftnl_flowtable_free(t); ++ mnl_nlmsg_batch_next(batch); ++ ++ if (batching) { ++ nftnl_batch_end(mnl_nlmsg_batch_current(batch), seq++); ++ mnl_nlmsg_batch_next(batch); ++ } ++ ++ nl = mnl_socket_open(NETLINK_NETFILTER); ++ if (nl == NULL) { ++ perror("mnl_socket_open"); ++ exit(EXIT_FAILURE); ++ } ++ ++ if (mnl_socket_bind(nl, 0, MNL_SOCKET_AUTOPID) < 0) { ++ perror("mnl_socket_bind"); ++ exit(EXIT_FAILURE); ++ } ++ portid = mnl_socket_get_portid(nl); ++ ++ if (mnl_socket_sendto(nl, mnl_nlmsg_batch_head(batch), ++ mnl_nlmsg_batch_size(batch)) < 0) { ++ perror("mnl_socket_send"); ++ exit(EXIT_FAILURE); ++ } ++ ++ mnl_nlmsg_batch_stop(batch); ++ ++ ret = mnl_socket_recvfrom(nl, buf, sizeof(buf)); ++ while (ret > 0) { ++ ret = mnl_cb_run(buf, ret, flowtable_seq, portid, NULL, NULL); ++ if (ret <= 0) ++ break; ++ ret = mnl_socket_recvfrom(nl, buf, sizeof(buf)); ++ } ++ if (ret == -1) { ++ perror("error"); ++ exit(EXIT_FAILURE); ++ } ++ mnl_socket_close(nl); ++ ++ return EXIT_SUCCESS; ++} +--- /dev/null ++++ b/examples/nft-flowtable-del.c +@@ -0,0 +1,122 @@ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++ ++static struct nftnl_flowtable *flowtable_del_parse(int argc, char *argv[]) ++{ ++ struct nftnl_flowtable *t; ++ ++ t = nftnl_flowtable_alloc(); ++ if (t == NULL) { ++ perror("OOM"); ++ return NULL; ++ } ++ ++ nftnl_flowtable_set(t, NFTNL_FLOWTABLE_TABLE, argv[2]); ++ nftnl_flowtable_set(t, NFTNL_FLOWTABLE_NAME, argv[3]); ++ ++ return t; ++} ++ ++int main(int argc, char *argv[]) ++{ ++ struct mnl_socket *nl; ++ struct mnl_nlmsg_batch *batch; ++ char buf[MNL_SOCKET_BUFFER_SIZE]; ++ struct nlmsghdr *nlh; ++ uint32_t portid, seq, flowtable_seq; ++ struct nftnl_flowtable *t; ++ int ret, family, batching; ++ ++ if (argc != 4) { ++ fprintf(stderr, "Usage: %s
\n", ++ argv[0]); ++ exit(EXIT_FAILURE); ++ } ++ ++ if (strcmp(argv[1], "ip") == 0) ++ family = NFPROTO_IPV4; ++ else if (strcmp(argv[1], "ip6") == 0) ++ family = NFPROTO_IPV6; ++ else if (strcmp(argv[1], "bridge") == 0) ++ family = NFPROTO_BRIDGE; ++ else if (strcmp(argv[1], "arp") == 0) ++ family = NFPROTO_ARP; ++ else { ++ fprintf(stderr, "Unknown family: ip, ip6, bridge, arp\n"); ++ exit(EXIT_FAILURE); ++ } ++ ++ t = flowtable_del_parse(argc, argv); ++ if (t == NULL) ++ exit(EXIT_FAILURE); ++ ++ batching = nftnl_batch_is_supported(); ++ if (batching < 0) { ++ perror("cannot talk to nfnetlink"); ++ exit(EXIT_FAILURE); ++ } ++ ++ seq = time(NULL); ++ batch = mnl_nlmsg_batch_start(buf, sizeof(buf)); ++ ++ if (batching) { ++ nftnl_batch_begin(mnl_nlmsg_batch_current(batch), seq++); ++ mnl_nlmsg_batch_next(batch); ++ } ++ ++ flowtable_seq = seq; ++ nlh = nftnl_flowtable_nlmsg_build_hdr(mnl_nlmsg_batch_current(batch), ++ NFT_MSG_DELFLOWTABLE, family, ++ NLM_F_ACK, seq++); ++ nftnl_flowtable_nlmsg_build_payload(nlh, t); ++ nftnl_flowtable_free(t); ++ mnl_nlmsg_batch_next(batch); ++ ++ if (batching) { ++ nftnl_batch_end(mnl_nlmsg_batch_current(batch), seq++); ++ mnl_nlmsg_batch_next(batch); ++ } ++ ++ nl = mnl_socket_open(NETLINK_NETFILTER); ++ if (nl == NULL) { ++ perror("mnl_socket_open"); ++ exit(EXIT_FAILURE); ++ } ++ ++ if (mnl_socket_bind(nl, 0, MNL_SOCKET_AUTOPID) < 0) { ++ perror("mnl_socket_bind"); ++ exit(EXIT_FAILURE); ++ } ++ portid = mnl_socket_get_portid(nl); ++ ++ if (mnl_socket_sendto(nl, mnl_nlmsg_batch_head(batch), ++ mnl_nlmsg_batch_size(batch)) < 0) { ++ perror("mnl_socket_send"); ++ exit(EXIT_FAILURE); ++ } ++ ++ mnl_nlmsg_batch_stop(batch); ++ ++ ret = mnl_socket_recvfrom(nl, buf, sizeof(buf)); ++ while (ret > 0) { ++ ret = mnl_cb_run(buf, ret, flowtable_seq, portid, NULL, NULL); ++ if (ret <= 0) ++ break; ++ ret = mnl_socket_recvfrom(nl, buf, sizeof(buf)); ++ } ++ if (ret == -1) { ++ perror("error"); ++ exit(EXIT_FAILURE); ++ } ++ mnl_socket_close(nl); ++ ++ return EXIT_SUCCESS; ++} +--- /dev/null ++++ b/examples/nft-flowtable-get.c +@@ -0,0 +1,121 @@ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++ ++static int table_cb(const struct nlmsghdr *nlh, void *data) ++{ ++ struct nftnl_flowtable *t; ++ char buf[4096]; ++ uint32_t *type = data; ++ ++ t = nftnl_flowtable_alloc(); ++ if (t == NULL) { ++ perror("OOM"); ++ goto err; ++ } ++ ++ if (nftnl_flowtable_nlmsg_parse(nlh, t) < 0) { ++ perror("nftnl_flowtable_nlmsg_parse"); ++ goto err_free; ++ } ++ ++ nftnl_flowtable_snprintf(buf, sizeof(buf), t, *type, 0); ++ printf("%s\n", buf); ++ ++err_free: ++ nftnl_flowtable_free(t); ++err: ++ return MNL_CB_OK; ++} ++ ++int main(int argc, char *argv[]) ++{ ++ struct mnl_socket *nl; ++ char buf[MNL_SOCKET_BUFFER_SIZE]; ++ struct nlmsghdr *nlh; ++ uint32_t portid, seq, type = NFTNL_OUTPUT_DEFAULT; ++ struct nftnl_flowtable *t = NULL; ++ int ret, family; ++ ++ seq = time(NULL); ++ ++ if (argc < 2 || argc > 5) { ++ fprintf(stderr, "Usage: %s [
] [json]\n", ++ argv[0]); ++ exit(EXIT_FAILURE); ++ } ++ ++ if (strcmp(argv[1], "ip") == 0) ++ family = NFPROTO_IPV4; ++ else if (strcmp(argv[1], "ip6") == 0) ++ family = NFPROTO_IPV6; ++ else if (strcmp(argv[1], "bridge") == 0) ++ family = NFPROTO_BRIDGE; ++ else if (strcmp(argv[1], "arp") == 0) ++ family = NFPROTO_ARP; ++ else if (strcmp(argv[1], "unspec") == 0) ++ family = NFPROTO_UNSPEC; ++ else { ++ fprintf(stderr, "Unknown family: ip, ip6, bridge, arp, unspec\n"); ++ exit(EXIT_FAILURE); ++ } ++ ++ if (argc >= 4) { ++ t = nftnl_flowtable_alloc(); ++ if (t == NULL) { ++ perror("OOM"); ++ exit(EXIT_FAILURE); ++ } ++ nlh = nftnl_flowtable_nlmsg_build_hdr(buf, NFT_MSG_GETFLOWTABLE, family, ++ NLM_F_ACK, seq); ++ nftnl_flowtable_set(t, NFTNL_FLOWTABLE_TABLE, argv[2]); ++ nftnl_flowtable_set(t, NFTNL_FLOWTABLE_NAME, argv[3]); ++ nftnl_flowtable_nlmsg_build_payload(nlh, t); ++ nftnl_flowtable_free(t); ++ } else if (argc >= 2) { ++ nlh = nftnl_flowtable_nlmsg_build_hdr(buf, NFT_MSG_GETFLOWTABLE, family, ++ NLM_F_DUMP, seq); ++ } ++ ++ if (strcmp(argv[argc-1], "json") == 0) ++ type = NFTNL_OUTPUT_JSON; ++ ++ nl = mnl_socket_open(NETLINK_NETFILTER); ++ if (nl == NULL) { ++ perror("mnl_socket_open"); ++ exit(EXIT_FAILURE); ++ } ++ ++ if (mnl_socket_bind(nl, 0, MNL_SOCKET_AUTOPID) < 0) { ++ perror("mnl_socket_bind"); ++ exit(EXIT_FAILURE); ++ } ++ portid = mnl_socket_get_portid(nl); ++ ++ if (mnl_socket_sendto(nl, nlh, nlh->nlmsg_len) < 0) { ++ perror("mnl_socket_send"); ++ exit(EXIT_FAILURE); ++ } ++ ++ ret = mnl_socket_recvfrom(nl, buf, sizeof(buf)); ++ while (ret > 0) { ++ ret = mnl_cb_run(buf, ret, seq, portid, table_cb, &type); ++ if (ret <= 0) ++ break; ++ ret = mnl_socket_recvfrom(nl, buf, sizeof(buf)); ++ } ++ if (ret == -1) { ++ perror("error"); ++ exit(EXIT_FAILURE); ++ } ++ mnl_socket_close(nl); ++ ++ return EXIT_SUCCESS; ++} +--- a/include/libnftnl/Makefile.am ++++ b/include/libnftnl/Makefile.am +@@ -6,6 +6,7 @@ pkginclude_HEADERS = batch.h \ + rule.h \ + expr.h \ + set.h \ ++ flowtable.h \ + ruleset.h \ + common.h \ + udata.h \ +--- /dev/null ++++ b/include/libnftnl/flowtable.h +@@ -0,0 +1,81 @@ ++#ifndef _LIBNFTNL_FLOWTABLE_H_ ++#define _LIBNFTNL_FLOWTABLE_H_ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++struct nftnl_flowtable; ++ ++struct nftnl_flowtable *nftnl_flowtable_alloc(void); ++void nftnl_flowtable_free(const struct nftnl_flowtable *); ++ ++enum nftnl_flowtable_attr { ++ NFTNL_FLOWTABLE_NAME = 0, ++ NFTNL_FLOWTABLE_FAMILY, ++ NFTNL_FLOWTABLE_TABLE, ++ NFTNL_FLOWTABLE_HOOKNUM, ++ NFTNL_FLOWTABLE_PRIO = 4, ++ NFTNL_FLOWTABLE_USE, ++ NFTNL_FLOWTABLE_DEVICES, ++ __NFTNL_FLOWTABLE_MAX ++}; ++#define NFTNL_FLOWTABLE_MAX (__NFTNL_FLOWTABLE_MAX - 1) ++ ++bool nftnl_flowtable_is_set(const struct nftnl_flowtable *c, uint16_t attr); ++void nftnl_flowtable_unset(struct nftnl_flowtable *c, uint16_t attr); ++void nftnl_flowtable_set(struct nftnl_flowtable *t, uint16_t attr, const void *data); ++int nftnl_flowtable_set_data(struct nftnl_flowtable *t, uint16_t attr, ++ const void *data, uint32_t data_len); ++void nftnl_flowtable_set_u32(struct nftnl_flowtable *t, uint16_t attr, uint32_t data); ++void nftnl_flowtable_set_s32(struct nftnl_flowtable *t, uint16_t attr, int32_t data); ++int nftnl_flowtable_set_str(struct nftnl_flowtable *t, uint16_t attr, const char *str); ++void nftnl_flowtable_set_array(struct nftnl_flowtable *t, uint16_t attr, const char **data); ++ ++const void *nftnl_flowtable_get(const struct nftnl_flowtable *c, uint16_t attr); ++const void *nftnl_flowtable_get_data(const struct nftnl_flowtable *c, uint16_t attr, ++ uint32_t *data_len); ++const char *nftnl_flowtable_get_str(const struct nftnl_flowtable *c, uint16_t attr); ++uint32_t nftnl_flowtable_get_u32(const struct nftnl_flowtable *c, uint16_t attr); ++int32_t nftnl_flowtable_get_s32(const struct nftnl_flowtable *c, uint16_t attr); ++const char **nftnl_flowtable_get_array(const struct nftnl_flowtable *t, uint16_t attr); ++ ++struct nlmsghdr; ++ ++void nftnl_flowtable_nlmsg_build_payload(struct nlmsghdr *nlh, const struct nftnl_flowtable *t); ++ ++int nftnl_flowtable_parse(struct nftnl_flowtable *c, enum nftnl_parse_type type, ++ const char *data, struct nftnl_parse_err *err); ++int nftnl_flowtable_parse_file(struct nftnl_flowtable *c, enum nftnl_parse_type type, ++ FILE *fp, struct nftnl_parse_err *err); ++int nftnl_flowtable_snprintf(char *buf, size_t size, const struct nftnl_flowtable *t, uint32_t type, uint32_t flags); ++int nftnl_flowtable_fprintf(FILE *fp, const struct nftnl_flowtable *c, uint32_t type, uint32_t flags); ++ ++#define nftnl_flowtable_nlmsg_build_hdr nftnl_nlmsg_build_hdr ++int nftnl_flowtable_nlmsg_parse(const struct nlmsghdr *nlh, struct nftnl_flowtable *t); ++ ++struct nftnl_flowtable_list; ++ ++struct nftnl_flowtable_list *nftnl_flowtable_list_alloc(void); ++void nftnl_flowtable_list_free(struct nftnl_flowtable_list *list); ++int nftnl_flowtable_list_is_empty(const struct nftnl_flowtable_list *list); ++void nftnl_flowtable_list_add(struct nftnl_flowtable *s, ++ struct nftnl_flowtable_list *list); ++void nftnl_flowtable_list_add_tail(struct nftnl_flowtable *s, ++ struct nftnl_flowtable_list *list); ++void nftnl_flowtable_list_del(struct nftnl_flowtable *s); ++int nftnl_flowtable_list_foreach(struct nftnl_flowtable_list *flowtable_list, ++ int (*cb)(struct nftnl_flowtable *t, void *data), void *data); ++ ++#ifdef __cplusplus ++} /* extern "C" */ ++#endif ++ ++#endif /* _LIBNFTNL_FLOWTABLE_H_ */ +--- a/include/linux/netfilter/nf_tables.h ++++ b/include/linux/netfilter/nf_tables.h +@@ -90,6 +90,9 @@ enum nft_verdicts { + * @NFT_MSG_GETOBJ: get a stateful object (enum nft_obj_attributes) + * @NFT_MSG_DELOBJ: delete a stateful object (enum nft_obj_attributes) + * @NFT_MSG_GETOBJ_RESET: get and reset a stateful object (enum nft_obj_attributes) ++ * @NFT_MSG_NEWFLOWTABLE: add new flow table (enum nft_flowtable_attributes) ++ * @NFT_MSG_GETFLOWTABLE: get flow table (enum nft_flowtable_attributes) ++ * @NFT_MSG_DELFLOWTABLE: delete flow table (enum nft_flowtable_attributes) + */ + enum nf_tables_msg_types { + NFT_MSG_NEWTABLE, +@@ -114,6 +117,9 @@ enum nf_tables_msg_types { + NFT_MSG_GETOBJ, + NFT_MSG_DELOBJ, + NFT_MSG_GETOBJ_RESET, ++ NFT_MSG_NEWFLOWTABLE, ++ NFT_MSG_GETFLOWTABLE, ++ NFT_MSG_DELFLOWTABLE, + NFT_MSG_MAX, + }; + +@@ -1303,6 +1309,53 @@ enum nft_object_attributes { + #define NFTA_OBJ_MAX (__NFTA_OBJ_MAX - 1) + + /** ++ * enum nft_flowtable_attributes - nf_tables flow table netlink attributes ++ * ++ * @NFTA_FLOWTABLE_TABLE: name of the table containing the expression (NLA_STRING) ++ * @NFTA_FLOWTABLE_NAME: name of this flow table (NLA_STRING) ++ * @NFTA_FLOWTABLE_HOOK: netfilter hook configuration(NLA_U32) ++ * @NFTA_FLOWTABLE_USE: number of references to this flow table (NLA_U32) ++ */ ++enum nft_flowtable_attributes { ++ NFTA_FLOWTABLE_UNSPEC, ++ NFTA_FLOWTABLE_TABLE, ++ NFTA_FLOWTABLE_NAME, ++ NFTA_FLOWTABLE_HOOK, ++ NFTA_FLOWTABLE_USE, ++ __NFTA_FLOWTABLE_MAX ++}; ++#define NFTA_FLOWTABLE_MAX (__NFTA_FLOWTABLE_MAX - 1) ++ ++/** ++ * enum nft_flowtable_hook_attributes - nf_tables flow table hook netlink attributes ++ * ++ * @NFTA_FLOWTABLE_HOOK_NUM: netfilter hook number (NLA_U32) ++ * @NFTA_FLOWTABLE_HOOK_PRIORITY: netfilter hook priority (NLA_U32) ++ * @NFTA_FLOWTABLE_HOOK_DEVS: input devices this flow table is bound to (NLA_NESTED) ++ */ ++enum nft_flowtable_hook_attributes { ++ NFTA_FLOWTABLE_HOOK_UNSPEC, ++ NFTA_FLOWTABLE_HOOK_NUM, ++ NFTA_FLOWTABLE_HOOK_PRIORITY, ++ NFTA_FLOWTABLE_HOOK_DEVS, ++ __NFTA_FLOWTABLE_HOOK_MAX ++}; ++#define NFTA_FLOWTABLE_HOOK_MAX (__NFTA_FLOWTABLE_HOOK_MAX - 1) ++ ++/** ++ * enum nft_device_attributes - nf_tables device netlink attributes ++ * ++ * @NFTA_DEVICE_NAME: name of this device (NLA_STRING) ++ */ ++enum nft_devices_attributes { ++ NFTA_DEVICE_UNSPEC, ++ NFTA_DEVICE_NAME, ++ __NFTA_DEVICE_MAX ++}; ++#define NFTA_DEVICE_MAX (__NFTA_DEVICE_MAX - 1) ++ ++ ++/** + * enum nft_trace_attributes - nf_tables trace netlink attributes + * + * @NFTA_TRACE_TABLE: name of the table (NLA_STRING) +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -8,6 +8,7 @@ libnftnl_la_LDFLAGS = -Wl,--version-scri + libnftnl_la_SOURCES = utils.c \ + batch.c \ + buffer.c \ ++ flowtable.c \ + common.c \ + gen.c \ + table.c \ +--- /dev/null ++++ b/src/flowtable.c +@@ -0,0 +1,793 @@ ++#include "internal.h" ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct nftnl_flowtable { ++ struct list_head head; ++ const char *name; ++ const char *table; ++ int family; ++ uint32_t hooknum; ++ int32_t prio; ++ const char **dev_array; ++ uint32_t dev_array_len; ++ uint32_t use; ++ uint32_t flags; ++}; ++ ++struct nftnl_flowtable *nftnl_flowtable_alloc(void) ++{ ++ return calloc(1, sizeof(struct nftnl_flowtable)); ++} ++EXPORT_SYMBOL(nftnl_flowtable_alloc); ++ ++void nftnl_flowtable_free(const struct nftnl_flowtable *c) ++{ ++ int i; ++ ++ if (c->flags & (1 << NFTNL_FLOWTABLE_NAME)) ++ xfree(c->name); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_TABLE)) ++ xfree(c->table); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_DEVICES)) { ++ for (i = 0; i < c->dev_array_len; i++) ++ xfree(c->dev_array[i]); ++ ++ xfree(c->dev_array); ++ } ++ xfree(c); ++} ++EXPORT_SYMBOL(nftnl_flowtable_free); ++ ++bool nftnl_flowtable_is_set(const struct nftnl_flowtable *c, uint16_t attr) ++{ ++ return c->flags & (1 << attr); ++} ++EXPORT_SYMBOL(nftnl_flowtable_is_set); ++ ++void nftnl_flowtable_unset(struct nftnl_flowtable *c, uint16_t attr) ++{ ++ int i; ++ ++ if (!(c->flags & (1 << attr))) ++ return; ++ ++ switch (attr) { ++ case NFTNL_FLOWTABLE_NAME: ++ xfree(c->name); ++ break; ++ case NFTNL_FLOWTABLE_TABLE: ++ xfree(c->table); ++ break; ++ case NFTNL_FLOWTABLE_HOOKNUM: ++ case NFTNL_FLOWTABLE_PRIO: ++ case NFTNL_FLOWTABLE_USE: ++ case NFTNL_FLOWTABLE_FAMILY: ++ break; ++ case NFTNL_FLOWTABLE_DEVICES: ++ for (i = 0; i < c->dev_array_len; i++) { ++ xfree(c->dev_array[i]); ++ xfree(c->dev_array); ++ } ++ break; ++ default: ++ return; ++ } ++ ++ c->flags &= ~(1 << attr); ++} ++EXPORT_SYMBOL(nftnl_flowtable_unset); ++ ++static uint32_t nftnl_flowtable_validate[NFTNL_FLOWTABLE_MAX + 1] = { ++ [NFTNL_FLOWTABLE_HOOKNUM] = sizeof(uint32_t), ++ [NFTNL_FLOWTABLE_PRIO] = sizeof(int32_t), ++ [NFTNL_FLOWTABLE_FAMILY] = sizeof(uint32_t), ++}; ++ ++int nftnl_flowtable_set_data(struct nftnl_flowtable *c, uint16_t attr, ++ const void *data, uint32_t data_len) ++{ ++ const char **dev_array; ++ int len = 0, i; ++ ++ nftnl_assert_attr_exists(attr, NFTNL_FLOWTABLE_MAX); ++ nftnl_assert_validate(data, nftnl_flowtable_validate, attr, data_len); ++ ++ switch(attr) { ++ case NFTNL_FLOWTABLE_NAME: ++ if (c->flags & (1 << NFTNL_FLOWTABLE_NAME)) ++ xfree(c->name); ++ ++ c->name = strdup(data); ++ if (!c->name) ++ return -1; ++ break; ++ case NFTNL_FLOWTABLE_TABLE: ++ if (c->flags & (1 << NFTNL_FLOWTABLE_TABLE)) ++ xfree(c->table); ++ ++ c->table = strdup(data); ++ if (!c->table) ++ return -1; ++ break; ++ case NFTNL_FLOWTABLE_HOOKNUM: ++ memcpy(&c->hooknum, data, sizeof(c->hooknum)); ++ break; ++ case NFTNL_FLOWTABLE_PRIO: ++ memcpy(&c->prio, data, sizeof(c->prio)); ++ break; ++ case NFTNL_FLOWTABLE_FAMILY: ++ memcpy(&c->family, data, sizeof(c->family)); ++ break; ++ case NFTNL_FLOWTABLE_DEVICES: ++ dev_array = (const char **)data; ++ while (dev_array[len] != NULL) ++ len++; ++ ++ if (c->flags & (1 << NFTNL_FLOWTABLE_DEVICES)) { ++ for (i = 0; i < c->dev_array_len; i++) { ++ xfree(c->dev_array[i]); ++ xfree(c->dev_array); ++ } ++ } ++ ++ c->dev_array = calloc(len + 1, sizeof(char *)); ++ if (!c->dev_array) ++ return -1; ++ ++ for (i = 0; i < len; i++) ++ c->dev_array[i] = strdup(dev_array[i]); ++ ++ c->dev_array_len = len; ++ break; ++ } ++ c->flags |= (1 << attr); ++ return 0; ++} ++EXPORT_SYMBOL(nftnl_flowtable_set_data); ++ ++void nftnl_flowtable_set(struct nftnl_flowtable *c, uint16_t attr, const void *data) ++{ ++ nftnl_flowtable_set_data(c, attr, data, nftnl_flowtable_validate[attr]); ++} ++EXPORT_SYMBOL(nftnl_flowtable_set); ++ ++void nftnl_flowtable_set_array(struct nftnl_flowtable *c, uint16_t attr, const char **data) ++{ ++ nftnl_flowtable_set_data(c, attr, &data[0], nftnl_flowtable_validate[attr]); ++} ++EXPORT_SYMBOL(nftnl_flowtable_set_array); ++ ++void nftnl_flowtable_set_u32(struct nftnl_flowtable *c, uint16_t attr, uint32_t data) ++{ ++ nftnl_flowtable_set_data(c, attr, &data, sizeof(uint32_t)); ++} ++EXPORT_SYMBOL(nftnl_flowtable_set_u32); ++ ++void nftnl_flowtable_set_s32(struct nftnl_flowtable *c, uint16_t attr, int32_t data) ++{ ++ nftnl_flowtable_set_data(c, attr, &data, sizeof(int32_t)); ++} ++EXPORT_SYMBOL(nftnl_flowtable_set_s32); ++ ++int nftnl_flowtable_set_str(struct nftnl_flowtable *c, uint16_t attr, const char *str) ++{ ++ return nftnl_flowtable_set_data(c, attr, str, strlen(str) + 1); ++} ++EXPORT_SYMBOL(nftnl_flowtable_set_str); ++ ++const void *nftnl_flowtable_get_data(const struct nftnl_flowtable *c, ++ uint16_t attr, uint32_t *data_len) ++{ ++ if (!(c->flags & (1 << attr))) ++ return NULL; ++ ++ switch(attr) { ++ case NFTNL_FLOWTABLE_NAME: ++ *data_len = strlen(c->name) + 1; ++ return c->name; ++ case NFTNL_FLOWTABLE_TABLE: ++ *data_len = strlen(c->table) + 1; ++ return c->table; ++ case NFTNL_FLOWTABLE_HOOKNUM: ++ *data_len = sizeof(uint32_t); ++ return &c->hooknum; ++ case NFTNL_FLOWTABLE_PRIO: ++ *data_len = sizeof(int32_t); ++ return &c->prio; ++ case NFTNL_FLOWTABLE_FAMILY: ++ *data_len = sizeof(int32_t); ++ return &c->family; ++ case NFTNL_FLOWTABLE_DEVICES: ++ return &c->dev_array[0]; ++ } ++ return NULL; ++} ++EXPORT_SYMBOL(nftnl_flowtable_get_data); ++ ++const void *nftnl_flowtable_get(const struct nftnl_flowtable *c, uint16_t attr) ++{ ++ uint32_t data_len; ++ return nftnl_flowtable_get_data(c, attr, &data_len); ++} ++EXPORT_SYMBOL(nftnl_flowtable_get); ++ ++const char *nftnl_flowtable_get_str(const struct nftnl_flowtable *c, uint16_t attr) ++{ ++ return nftnl_flowtable_get(c, attr); ++} ++EXPORT_SYMBOL(nftnl_flowtable_get_str); ++ ++uint32_t nftnl_flowtable_get_u32(const struct nftnl_flowtable *c, uint16_t attr) ++{ ++ uint32_t data_len; ++ const uint32_t *val = nftnl_flowtable_get_data(c, attr, &data_len); ++ ++ nftnl_assert(val, attr, data_len == sizeof(uint32_t)); ++ ++ return val ? *val : 0; ++} ++EXPORT_SYMBOL(nftnl_flowtable_get_u32); ++ ++int32_t nftnl_flowtable_get_s32(const struct nftnl_flowtable *c, uint16_t attr) ++{ ++ uint32_t data_len; ++ const int32_t *val = nftnl_flowtable_get_data(c, attr, &data_len); ++ ++ nftnl_assert(val, attr, data_len == sizeof(int32_t)); ++ ++ return val ? *val : 0; ++} ++EXPORT_SYMBOL(nftnl_flowtable_get_s32); ++ ++const char **nftnl_flowtable_get_array(const struct nftnl_flowtable *c, uint16_t attr) ++{ ++ return (const char **)nftnl_flowtable_get(c, attr); ++} ++EXPORT_SYMBOL(nftnl_flowtable_get_array); ++ ++void nftnl_flowtable_nlmsg_build_payload(struct nlmsghdr *nlh, ++ const struct nftnl_flowtable *c) ++{ ++ int i; ++ ++ if (c->flags & (1 << NFTNL_FLOWTABLE_TABLE)) ++ mnl_attr_put_strz(nlh, NFTA_FLOWTABLE_TABLE, c->table); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_NAME)) ++ mnl_attr_put_strz(nlh, NFTA_FLOWTABLE_NAME, c->name); ++ if ((c->flags & (1 << NFTNL_FLOWTABLE_HOOKNUM)) && ++ (c->flags & (1 << NFTNL_FLOWTABLE_PRIO))) { ++ struct nlattr *nest; ++ ++ nest = mnl_attr_nest_start(nlh, NFTA_FLOWTABLE_HOOK); ++ mnl_attr_put_u32(nlh, NFTA_FLOWTABLE_HOOK_NUM, htonl(c->hooknum)); ++ mnl_attr_put_u32(nlh, NFTA_FLOWTABLE_HOOK_PRIORITY, htonl(c->prio)); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_DEVICES)) { ++ struct nlattr *nest_dev; ++ ++ nest_dev = mnl_attr_nest_start(nlh, ++ NFTA_FLOWTABLE_HOOK_DEVS); ++ for (i = 0; i < c->dev_array_len; i++) ++ mnl_attr_put_strz(nlh, NFTA_DEVICE_NAME, ++ c->dev_array[i]); ++ mnl_attr_nest_end(nlh, nest_dev); ++ } ++ mnl_attr_nest_end(nlh, nest); ++ } ++ if (c->flags & (1 << NFTNL_FLOWTABLE_USE)) ++ mnl_attr_put_u32(nlh, NFTA_FLOWTABLE_USE, htonl(c->use)); ++} ++EXPORT_SYMBOL(nftnl_flowtable_nlmsg_build_payload); ++ ++static int nftnl_flowtable_parse_attr_cb(const struct nlattr *attr, void *data) ++{ ++ const struct nlattr **tb = data; ++ int type = mnl_attr_get_type(attr); ++ ++ if (mnl_attr_type_valid(attr, NFTA_FLOWTABLE_MAX) < 0) ++ return MNL_CB_OK; ++ ++ switch(type) { ++ case NFTA_FLOWTABLE_NAME: ++ case NFTA_FLOWTABLE_TABLE: ++ if (mnl_attr_validate(attr, MNL_TYPE_STRING) < 0) ++ abi_breakage(); ++ break; ++ case NFTA_FLOWTABLE_HOOK: ++ if (mnl_attr_validate(attr, MNL_TYPE_NESTED) < 0) ++ abi_breakage(); ++ break; ++ case NFTA_FLOWTABLE_USE: ++ if (mnl_attr_validate(attr, MNL_TYPE_U32) < 0) ++ abi_breakage(); ++ break; ++ } ++ ++ tb[type] = attr; ++ return MNL_CB_OK; ++} ++ ++static int nftnl_flowtable_parse_hook_cb(const struct nlattr *attr, void *data) ++{ ++ const struct nlattr **tb = data; ++ int type = mnl_attr_get_type(attr); ++ ++ if (mnl_attr_type_valid(attr, NFTA_FLOWTABLE_HOOK_MAX) < 0) ++ return MNL_CB_OK; ++ ++ switch(type) { ++ case NFTA_FLOWTABLE_HOOK_NUM: ++ case NFTA_FLOWTABLE_HOOK_PRIORITY: ++ if (mnl_attr_validate(attr, MNL_TYPE_U32) < 0) ++ abi_breakage(); ++ break; ++ case NFTA_FLOWTABLE_HOOK_DEVS: ++ if (mnl_attr_validate(attr, MNL_TYPE_NESTED) < 0) ++ abi_breakage(); ++ break; ++ } ++ ++ tb[type] = attr; ++ return MNL_CB_OK; ++} ++ ++static int nftnl_flowtable_parse_devs(struct nlattr *nest, ++ struct nftnl_flowtable *c) ++{ ++ struct nlattr *attr; ++ char *dev_array[8]; ++ int len = 0, i; ++ ++ mnl_attr_for_each_nested(attr, nest) { ++ if (mnl_attr_get_type(attr) != NFTA_DEVICE_NAME) ++ return -1; ++ dev_array[len++] = strdup(mnl_attr_get_str(attr)); ++ if (len >= 8) ++ break; ++ } ++ ++ if (!len) ++ return -1; ++ ++ c->dev_array = calloc(len + 1, sizeof(char *)); ++ if (!c->dev_array) ++ return -1; ++ ++ c->dev_array_len = len; ++ ++ for (i = 0; i < len; i++) ++ c->dev_array[i] = strdup(dev_array[i]); ++ ++ return 0; ++} ++ ++static int nftnl_flowtable_parse_hook(struct nlattr *attr, struct nftnl_flowtable *c) ++{ ++ struct nlattr *tb[NFTA_FLOWTABLE_HOOK_MAX + 1] = {}; ++ int ret; ++ ++ if (mnl_attr_parse_nested(attr, nftnl_flowtable_parse_hook_cb, tb) < 0) ++ return -1; ++ ++ if (tb[NFTA_FLOWTABLE_HOOK_NUM]) { ++ c->hooknum = ntohl(mnl_attr_get_u32(tb[NFTA_FLOWTABLE_HOOK_NUM])); ++ c->flags |= (1 << NFTNL_FLOWTABLE_HOOKNUM); ++ } ++ if (tb[NFTA_FLOWTABLE_HOOK_PRIORITY]) { ++ c->prio = ntohl(mnl_attr_get_u32(tb[NFTA_FLOWTABLE_HOOK_PRIORITY])); ++ c->flags |= (1 << NFTNL_FLOWTABLE_PRIO); ++ } ++ if (tb[NFTA_FLOWTABLE_HOOK_DEVS]) { ++ ret = nftnl_flowtable_parse_devs(tb[NFTA_FLOWTABLE_HOOK_DEVS], c); ++ if (ret < 0) ++ return -1; ++ c->flags |= (1 << NFTNL_FLOWTABLE_DEVICES); ++ } ++ ++ return 0; ++} ++ ++int nftnl_flowtable_nlmsg_parse(const struct nlmsghdr *nlh, struct nftnl_flowtable *c) ++{ ++ struct nlattr *tb[NFTA_FLOWTABLE_MAX + 1] = {}; ++ struct nfgenmsg *nfg = mnl_nlmsg_get_payload(nlh); ++ int ret = 0; ++ ++ if (mnl_attr_parse(nlh, sizeof(*nfg), nftnl_flowtable_parse_attr_cb, tb) < 0) ++ return -1; ++ ++ if (tb[NFTA_FLOWTABLE_NAME]) { ++ if (c->flags & (1 << NFTNL_FLOWTABLE_NAME)) ++ xfree(c->name); ++ c->name = strdup(mnl_attr_get_str(tb[NFTA_FLOWTABLE_NAME])); ++ if (!c->name) ++ return -1; ++ c->flags |= (1 << NFTNL_FLOWTABLE_NAME); ++ } ++ if (tb[NFTA_FLOWTABLE_TABLE]) { ++ if (c->flags & (1 << NFTNL_FLOWTABLE_TABLE)) ++ xfree(c->table); ++ c->table = strdup(mnl_attr_get_str(tb[NFTA_FLOWTABLE_TABLE])); ++ if (!c->table) ++ return -1; ++ c->flags |= (1 << NFTNL_FLOWTABLE_TABLE); ++ } ++ if (tb[NFTA_FLOWTABLE_HOOK]) { ++ ret = nftnl_flowtable_parse_hook(tb[NFTA_FLOWTABLE_HOOK], c); ++ if (ret < 0) ++ return ret; ++ } ++ if (tb[NFTA_FLOWTABLE_USE]) { ++ c->use = ntohl(mnl_attr_get_u32(tb[NFTA_FLOWTABLE_USE])); ++ c->flags |= (1 << NFTNL_FLOWTABLE_USE); ++ } ++ ++ c->family = nfg->nfgen_family; ++ c->flags |= (1 << NFTNL_FLOWTABLE_FAMILY); ++ ++ return ret; ++} ++EXPORT_SYMBOL(nftnl_flowtable_nlmsg_parse); ++ ++static const char *nftnl_hooknum2str(int family, int hooknum) ++{ ++ switch (family) { ++ case NFPROTO_IPV4: ++ case NFPROTO_IPV6: ++ case NFPROTO_INET: ++ case NFPROTO_BRIDGE: ++ switch (hooknum) { ++ case NF_INET_PRE_ROUTING: ++ return "prerouting"; ++ case NF_INET_LOCAL_IN: ++ return "input"; ++ case NF_INET_FORWARD: ++ return "forward"; ++ case NF_INET_LOCAL_OUT: ++ return "output"; ++ case NF_INET_POST_ROUTING: ++ return "postrouting"; ++ } ++ break; ++ case NFPROTO_ARP: ++ switch (hooknum) { ++ case NF_ARP_IN: ++ return "input"; ++ case NF_ARP_OUT: ++ return "output"; ++ case NF_ARP_FORWARD: ++ return "forward"; ++ } ++ break; ++ case NFPROTO_NETDEV: ++ switch (hooknum) { ++ case NF_NETDEV_INGRESS: ++ return "ingress"; ++ } ++ break; ++ } ++ return "unknown"; ++} ++ ++static inline int nftnl_str2hooknum(int family, const char *hook) ++{ ++ int hooknum; ++ ++ for (hooknum = 0; hooknum < NF_INET_NUMHOOKS; hooknum++) { ++ if (strcmp(hook, nftnl_hooknum2str(family, hooknum)) == 0) ++ return hooknum; ++ } ++ return -1; ++} ++ ++#ifdef JSON_PARSING ++static int nftnl_jansson_parse_flowtable(struct nftnl_flowtable *c, ++ json_t *tree, ++ struct nftnl_parse_err *err) ++{ ++ const char *name, *table, *hooknum_str; ++ int32_t family, prio, hooknum; ++ json_t *root; ++ ++ root = nftnl_jansson_get_node(tree, "flowtable", err); ++ if (root == NULL) ++ return -1; ++ ++ name = nftnl_jansson_parse_str(root, "name", err); ++ if (name != NULL) ++ nftnl_flowtable_set_str(c, NFTNL_FLOWTABLE_NAME, name); ++ ++ if (nftnl_jansson_parse_family(root, &family, err) == 0) ++ nftnl_flowtable_set_u32(c, NFTNL_FLOWTABLE_FAMILY, family); ++ ++ table = nftnl_jansson_parse_str(root, "table", err); ++ ++ if (table != NULL) ++ nftnl_flowtable_set_str(c, NFTNL_FLOWTABLE_TABLE, table); ++ ++ if (nftnl_jansson_node_exist(root, "hooknum")) { ++ if (nftnl_jansson_parse_val(root, "prio", NFTNL_TYPE_S32, ++ &prio, err) == 0) ++ nftnl_flowtable_set_s32(c, NFTNL_FLOWTABLE_PRIO, prio); ++ ++ hooknum_str = nftnl_jansson_parse_str(root, "hooknum", err); ++ if (hooknum_str != NULL) { ++ hooknum = nftnl_str2hooknum(c->family, hooknum_str); ++ if (hooknum == -1) ++ return -1; ++ nftnl_flowtable_set_u32(c, NFTNL_FLOWTABLE_HOOKNUM, ++ hooknum); ++ } ++ } ++ ++ return 0; ++} ++#endif ++ ++static int nftnl_flowtable_json_parse(struct nftnl_flowtable *c, ++ const void *json, ++ struct nftnl_parse_err *err, ++ enum nftnl_parse_input input) ++{ ++#ifdef JSON_PARSING ++ json_t *tree; ++ json_error_t error; ++ int ret; ++ ++ tree = nftnl_jansson_create_root(json, &error, err, input); ++ if (tree == NULL) ++ return -1; ++ ++ ret = nftnl_jansson_parse_flowtable(c, tree, err); ++ ++ nftnl_jansson_free_root(tree); ++ ++ return ret; ++#else ++ errno = EOPNOTSUPP; ++ return -1; ++#endif ++} ++ ++static int nftnl_flowtable_do_parse(struct nftnl_flowtable *c, ++ enum nftnl_parse_type type, ++ const void *data, ++ struct nftnl_parse_err *err, ++ enum nftnl_parse_input input) ++{ ++ int ret; ++ struct nftnl_parse_err perr = {}; ++ ++ switch (type) { ++ case NFTNL_PARSE_JSON: ++ ret = nftnl_flowtable_json_parse(c, data, &perr, input); ++ break; ++ case NFTNL_PARSE_XML: ++ default: ++ ret = -1; ++ errno = EOPNOTSUPP; ++ break; ++ } ++ ++ if (err != NULL) ++ *err = perr; ++ ++ return ret; ++} ++ ++int nftnl_flowtable_parse(struct nftnl_flowtable *c, enum nftnl_parse_type type, ++ const char *data, struct nftnl_parse_err *err) ++{ ++ return nftnl_flowtable_do_parse(c, type, data, err, NFTNL_PARSE_BUFFER); ++} ++EXPORT_SYMBOL(nftnl_flowtable_parse); ++ ++int nftnl_flowtable_parse_file(struct nftnl_flowtable *c, ++ enum nftnl_parse_type type, ++ FILE *fp, struct nftnl_parse_err *err) ++{ ++ return nftnl_flowtable_do_parse(c, type, fp, err, NFTNL_PARSE_FILE); ++} ++EXPORT_SYMBOL(nftnl_flowtable_parse_file); ++ ++static int nftnl_flowtable_export(char *buf, size_t size, ++ const struct nftnl_flowtable *c, int type) ++{ ++ NFTNL_BUF_INIT(b, buf, size); ++ ++ nftnl_buf_open(&b, type, CHAIN); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_NAME)) ++ nftnl_buf_str(&b, type, c->name, NAME); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_TABLE)) ++ nftnl_buf_str(&b, type, c->table, TABLE); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_FAMILY)) ++ nftnl_buf_str(&b, type, nftnl_family2str(c->family), FAMILY); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_USE)) ++ nftnl_buf_u32(&b, type, c->use, USE); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_HOOKNUM)) { ++ if (c->flags & (1 << NFTNL_FLOWTABLE_HOOKNUM)) ++ nftnl_buf_str(&b, type, nftnl_hooknum2str(c->family, ++ c->hooknum), HOOKNUM); ++ if (c->flags & (1 << NFTNL_FLOWTABLE_PRIO)) ++ nftnl_buf_s32(&b, type, c->prio, PRIO); ++ } ++ ++ nftnl_buf_close(&b, type, CHAIN); ++ ++ return nftnl_buf_done(&b); ++} ++ ++static int nftnl_flowtable_snprintf_default(char *buf, size_t size, ++ const struct nftnl_flowtable *c) ++{ ++ int ret, remain = size, offset = 0, i; ++ ++ ret = snprintf(buf, remain, "flow table %s %s use %u", ++ c->table, c->name, c->use); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ ++ if (c->flags & (1 << NFTNL_FLOWTABLE_HOOKNUM)) { ++ ret = snprintf(buf + offset, remain, " hook %s prio %d", ++ nftnl_hooknum2str(c->family, c->hooknum), ++ c->prio); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ ++ if (c->flags & (1 << NFTNL_FLOWTABLE_DEVICES)) { ++ ret = snprintf(buf + offset, remain, " dev { "); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ ++ for (i = 0; i < c->dev_array_len; i++) { ++ ret = snprintf(buf + offset, remain, " %s ", ++ c->dev_array[i]); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ } ++ ret = snprintf(buf + offset, remain, " } "); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ } ++ } ++ ++ return offset; ++} ++ ++static int nftnl_flowtable_cmd_snprintf(char *buf, size_t size, ++ const struct nftnl_flowtable *c, ++ uint32_t cmd, uint32_t type, ++ uint32_t flags) ++{ ++ int ret, remain = size, offset = 0; ++ ++ ret = nftnl_cmd_header_snprintf(buf + offset, remain, cmd, type, flags); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ ++ switch (type) { ++ case NFTNL_OUTPUT_DEFAULT: ++ ret = nftnl_flowtable_snprintf_default(buf + offset, remain, c); ++ break; ++ case NFTNL_OUTPUT_XML: ++ case NFTNL_OUTPUT_JSON: ++ ret = nftnl_flowtable_export(buf + offset, remain, c, type); ++ break; ++ default: ++ return -1; ++ } ++ ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ ++ ret = nftnl_cmd_footer_snprintf(buf + offset, remain, cmd, type, flags); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ ++ return offset; ++} ++ ++int nftnl_flowtable_snprintf(char *buf, size_t size, const struct nftnl_flowtable *c, ++ uint32_t type, uint32_t flags) ++{ ++ if (size) ++ buf[0] = '\0'; ++ ++ return nftnl_flowtable_cmd_snprintf(buf, size, c, nftnl_flag2cmd(flags), ++ type, flags); ++} ++EXPORT_SYMBOL(nftnl_flowtable_snprintf); ++ ++static int nftnl_flowtable_do_snprintf(char *buf, size_t size, const void *c, ++ uint32_t cmd, uint32_t type, uint32_t flags) ++{ ++ return nftnl_flowtable_snprintf(buf, size, c, type, flags); ++} ++ ++int nftnl_flowtable_fprintf(FILE *fp, const struct nftnl_flowtable *c, ++ uint32_t type, uint32_t flags) ++{ ++ return nftnl_fprintf(fp, c, NFTNL_CMD_UNSPEC, type, flags, ++ nftnl_flowtable_do_snprintf); ++} ++EXPORT_SYMBOL(nftnl_flowtable_fprintf); ++ ++struct nftnl_flowtable_list { ++ struct list_head list; ++}; ++ ++struct nftnl_flowtable_list *nftnl_flowtable_list_alloc(void) ++{ ++ struct nftnl_flowtable_list *list; ++ ++ list = calloc(1, sizeof(struct nftnl_flowtable_list)); ++ if (list == NULL) ++ return NULL; ++ ++ INIT_LIST_HEAD(&list->list); ++ ++ return list; ++} ++EXPORT_SYMBOL(nftnl_flowtable_list_alloc); ++ ++void nftnl_flowtable_list_free(struct nftnl_flowtable_list *list) ++{ ++ struct nftnl_flowtable *s, *tmp; ++ ++ list_for_each_entry_safe(s, tmp, &list->list, head) { ++ list_del(&s->head); ++ nftnl_flowtable_free(s); ++ } ++ xfree(list); ++} ++EXPORT_SYMBOL(nftnl_flowtable_list_free); ++ ++int nftnl_flowtable_list_is_empty(const struct nftnl_flowtable_list *list) ++{ ++ return list_empty(&list->list); ++} ++EXPORT_SYMBOL(nftnl_flowtable_list_is_empty); ++ ++void nftnl_flowtable_list_add(struct nftnl_flowtable *s, ++ struct nftnl_flowtable_list *list) ++{ ++ list_add(&s->head, &list->list); ++} ++EXPORT_SYMBOL(nftnl_flowtable_list_add); ++ ++void nftnl_flowtable_list_add_tail(struct nftnl_flowtable *s, ++ struct nftnl_flowtable_list *list) ++{ ++ list_add_tail(&s->head, &list->list); ++} ++EXPORT_SYMBOL(nftnl_flowtable_list_add_tail); ++ ++void nftnl_flowtable_list_del(struct nftnl_flowtable *s) ++{ ++ list_del(&s->head); ++} ++EXPORT_SYMBOL(nftnl_flowtable_list_del); ++ ++int nftnl_flowtable_list_foreach(struct nftnl_flowtable_list *flowtable_list, ++ int (*cb)(struct nftnl_flowtable *t, void *data), void *data) ++{ ++ struct nftnl_flowtable *cur, *tmp; ++ int ret; ++ ++ list_for_each_entry_safe(cur, tmp, &flowtable_list->list, head) { ++ ret = cb(cur, data); ++ if (ret < 0) ++ return ret; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(nftnl_flowtable_list_foreach); +--- a/src/libnftnl.map ++++ b/src/libnftnl.map +@@ -311,3 +311,34 @@ local: *; + LIBNFTNL_6 { + nftnl_expr_fprintf; + } LIBNFTNL_5; ++ ++LIBNFTNL_7 { ++ nftnl_flowtable_alloc; ++ nftnl_flowtable_free; ++ nftnl_flowtable_is_set; ++ nftnl_flowtable_unset; ++ nftnl_flowtable_set; ++ nftnl_flowtable_set_u32; ++ nftnl_flowtable_set_s32; ++ nftnl_flowtable_set_array; ++ nftnl_flowtable_set_str; ++ nftnl_flowtable_get; ++ nftnl_flowtable_get_u32; ++ nftnl_flowtable_get_s32; ++ nftnl_flowtable_get_array; ++ nftnl_flowtable_get_str; ++ nftnl_flowtable_parse; ++ nftnl_flowtable_parse_file; ++ nftnl_flowtable_snprintf; ++ nftnl_flowtable_fprintf; ++ nftnl_flowtable_nlmsg_build_payload; ++ nftnl_flowtable_nlmsg_parse; ++ nftnl_flowtable_list_alloc; ++ nftnl_flowtable_list_free; ++ nftnl_flowtable_list_is_empty; ++ nftnl_flowtable_list_add; ++ nftnl_flowtable_list_add_tail; ++ nftnl_flowtable_list_del; ++ nftnl_flowtable_list_foreach; ++ ++} LIBNFTNL_6; diff --git a/package/libs/libnftnl/patches/101-expr-add-flow-offload-expression.patch b/package/libs/libnftnl/patches/101-expr-add-flow-offload-expression.patch new file mode 100644 index 000000000..c7d3676ac --- /dev/null +++ b/package/libs/libnftnl/patches/101-expr-add-flow-offload-expression.patch @@ -0,0 +1,259 @@ +From: Pablo Neira Ayuso +Date: Sun, 3 Dec 2017 21:05:54 +0100 +Subject: [PATCH] expr: add flow offload expression + +This patch adds the new "flow_offload" expression to select what flows +are offloaded to an existing flowtable. + +Signed-off-by: Pablo Neira Ayuso +--- + create mode 100644 src/expr/flow_offload.c + +--- a/include/libnftnl/expr.h ++++ b/include/libnftnl/expr.h +@@ -221,6 +221,10 @@ enum { + }; + + enum { ++ NFTNL_EXPR_FLOW_TABLE_NAME = NFTNL_EXPR_BASE, ++}; ++ ++enum { + NFTNL_EXPR_FWD_SREG_DEV = NFTNL_EXPR_BASE, + }; + +--- a/include/linux/netfilter/nf_tables.h ++++ b/include/linux/netfilter/nf_tables.h +@@ -952,6 +952,17 @@ enum nft_ct_attributes { + }; + #define NFTA_CT_MAX (__NFTA_CT_MAX - 1) + ++/** ++ * enum nft_flow_attributes - ct offload expression attributes ++ * @NFTA_FLOW_TABLE_NAME: flow table name (NLA_STRING) ++ */ ++enum nft_offload_attributes { ++ NFTA_FLOW_UNSPEC, ++ NFTA_FLOW_TABLE_NAME, ++ __NFTA_FLOW_MAX, ++}; ++#define NFTA_FLOW_MAX (__NFTA_FLOW_MAX - 1) ++ + enum nft_limit_type { + NFT_LIMIT_PKTS, + NFT_LIMIT_PKT_BYTES +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -32,6 +32,7 @@ libnftnl_la_SOURCES = utils.c \ + expr/data_reg.c \ + expr/dup.c \ + expr/exthdr.c \ ++ expr/flow_offload.c \ + expr/fib.c \ + expr/fwd.c \ + expr/limit.c \ +--- /dev/null ++++ b/src/expr/flow_offload.c +@@ -0,0 +1,184 @@ ++#include "internal.h" ++ ++#include ++#include ++#include /* for memcpy */ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct nftnl_expr_flow { ++ char *table_name; ++}; ++ ++static int nftnl_expr_flow_set(struct nftnl_expr *e, uint16_t type, ++ const void *data, uint32_t data_len) ++{ ++ struct nftnl_expr_flow *flow = nftnl_expr_data(e); ++ ++ switch (type) { ++ case NFTNL_EXPR_FLOW_TABLE_NAME: ++ flow->table_name = strdup((const char *)data); ++ if (!flow->table_name) ++ return -1; ++ break; ++ default: ++ return -1; ++ } ++ return 0; ++} ++ ++static const void *nftnl_expr_flow_get(const struct nftnl_expr *e, ++ uint16_t type, uint32_t *data_len) ++{ ++ struct nftnl_expr_flow *flow = nftnl_expr_data(e); ++ ++ switch(type) { ++ case NFTNL_EXPR_FLOW_TABLE_NAME: ++ *data_len = strlen(flow->table_name) + 1; ++ return flow->table_name; ++ } ++ return NULL; ++} ++ ++static int nftnl_expr_flow_cb(const struct nlattr *attr, void *data) ++{ ++ const struct nlattr **tb = data; ++ int type = mnl_attr_get_type(attr); ++ ++ if (mnl_attr_type_valid(attr, NFTA_FLOW_MAX) < 0) ++ return MNL_CB_OK; ++ ++ switch(type) { ++ case NFTA_FLOW_TABLE_NAME: ++ if (mnl_attr_validate(attr, MNL_TYPE_STRING) < 0) ++ abi_breakage(); ++ break; ++ } ++ ++ tb[type] = attr; ++ return MNL_CB_OK; ++} ++ ++static void nftnl_expr_flow_build(struct nlmsghdr *nlh, ++ const struct nftnl_expr *e) ++{ ++ struct nftnl_expr_flow *flow = nftnl_expr_data(e); ++ ++ if (e->flags & (1 << NFTNL_EXPR_FLOW_TABLE_NAME)) ++ mnl_attr_put_strz(nlh, NFTA_FLOW_TABLE_NAME, flow->table_name); ++} ++ ++static int nftnl_expr_flow_parse(struct nftnl_expr *e, struct nlattr *attr) ++{ ++ struct nftnl_expr_flow *flow = nftnl_expr_data(e); ++ struct nlattr *tb[NFTA_FLOW_MAX+1] = {}; ++ int ret = 0; ++ ++ if (mnl_attr_parse_nested(attr, nftnl_expr_flow_cb, tb) < 0) ++ return -1; ++ ++ if (tb[NFTA_FLOW_TABLE_NAME]) { ++ flow->table_name = ++ strdup(mnl_attr_get_str(tb[NFTA_FLOW_TABLE_NAME])); ++ if (!flow->table_name) ++ return -1; ++ e->flags |= (1 << NFTNL_EXPR_FLOW_TABLE_NAME); ++ } ++ ++ return ret; ++} ++ ++static int ++nftnl_expr_flow_json_parse(struct nftnl_expr *e, json_t *root, ++ struct nftnl_parse_err *err) ++{ ++#ifdef JSON_PARSING ++ const char *table_name; ++ ++ table_name = nftnl_jansson_parse_str(root, "flowtable", err); ++ if (table_name != NULL) ++ nftnl_expr_set_str(e, NFTNL_EXPR_FLOW_TABLE_NAME, table_name); ++ ++ return 0; ++#else ++ errno = EOPNOTSUPP; ++ return -1; ++#endif ++} ++ ++static int nftnl_expr_flow_export(char *buf, size_t size, ++ const struct nftnl_expr *e, int type) ++{ ++ struct nftnl_expr_flow *l = nftnl_expr_data(e); ++ NFTNL_BUF_INIT(b, buf, size); ++ ++ if (e->flags & (1 << NFTNL_EXPR_FLOW_TABLE_NAME)) ++ nftnl_buf_str(&b, type, l->table_name, SET); ++ ++ return nftnl_buf_done(&b); ++} ++ ++static int nftnl_expr_flow_snprintf_default(char *buf, size_t size, ++ const struct nftnl_expr *e) ++{ ++ int remain = size, offset = 0, ret; ++ struct nftnl_expr_flow *l = nftnl_expr_data(e); ++ ++ ret = snprintf(buf, remain, "flowtable %s ", l->table_name); ++ SNPRINTF_BUFFER_SIZE(ret, remain, offset); ++ ++ return offset; ++} ++ ++static int nftnl_expr_flow_snprintf(char *buf, size_t size, uint32_t type, ++ uint32_t flags, const struct nftnl_expr *e) ++{ ++ switch(type) { ++ case NFTNL_OUTPUT_DEFAULT: ++ return nftnl_expr_flow_snprintf_default(buf, size, e); ++ case NFTNL_OUTPUT_XML: ++ case NFTNL_OUTPUT_JSON: ++ return nftnl_expr_flow_export(buf, size, e, type); ++ default: ++ break; ++ } ++ return -1; ++} ++ ++static void nftnl_expr_flow_free(const struct nftnl_expr *e) ++{ ++ struct nftnl_expr_flow *flow = nftnl_expr_data(e); ++ ++ xfree(flow->table_name); ++} ++ ++static bool nftnl_expr_flow_cmp(const struct nftnl_expr *e1, ++ const struct nftnl_expr *e2) ++{ ++ struct nftnl_expr_flow *l1 = nftnl_expr_data(e1); ++ struct nftnl_expr_flow *l2 = nftnl_expr_data(e2); ++ bool eq = true; ++ ++ if (e1->flags & (1 << NFTNL_EXPR_FLOW_TABLE_NAME)) ++ eq &= !strcmp(l1->table_name, l2->table_name); ++ ++ return eq; ++} ++ ++struct expr_ops expr_ops_flow = { ++ .name = "flow_offload", ++ .alloc_len = sizeof(struct nftnl_expr_flow), ++ .max_attr = NFTA_FLOW_MAX, ++ .free = nftnl_expr_flow_free, ++ .cmp = nftnl_expr_flow_cmp, ++ .set = nftnl_expr_flow_set, ++ .get = nftnl_expr_flow_get, ++ .parse = nftnl_expr_flow_parse, ++ .build = nftnl_expr_flow_build, ++ .snprintf = nftnl_expr_flow_snprintf, ++ .json_parse = nftnl_expr_flow_json_parse, ++}; +--- a/src/expr_ops.c ++++ b/src/expr_ops.c +@@ -33,6 +33,7 @@ extern struct expr_ops expr_ops_target; + extern struct expr_ops expr_ops_dynset; + extern struct expr_ops expr_ops_hash; + extern struct expr_ops expr_ops_fib; ++extern struct expr_ops expr_ops_flow; + + static struct expr_ops expr_ops_notrack = { + .name = "notrack", +@@ -69,6 +70,7 @@ static struct expr_ops *expr_ops[] = { + &expr_ops_hash, + &expr_ops_fib, + &expr_ops_objref, ++ &expr_ops_flow, + NULL, + }; + diff --git a/package/libs/libtool/Makefile b/package/libs/libtool/Makefile index 8cef09f78..37b91dce7 100644 --- a/package/libs/libtool/Makefile +++ b/package/libs/libtool/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libtool -PKG_VERSION:=2.4 -PKG_RELEASE:=2 +PKG_VERSION:=2.4.6 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@GNU/libtool -PKG_HASH:=afcce660d3dc54c63a0a5ba3cf05272239dc3c54bbeba20f6bad250f9dc007ae +PKG_HASH:=7c87a8c2c8c0fc9cd5019e402bed4292462d00a718a7cd5f11218153bf28b26f PKG_LICENSE:=GPL-2.0+ PKG_LICENSE_FILES:=COPYING diff --git a/package/libs/libtool/patches/160-passthrough-ssp.patch b/package/libs/libtool/patches/160-passthrough-ssp.patch deleted file mode 100644 index 6fcbe6800..000000000 --- a/package/libs/libtool/patches/160-passthrough-ssp.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/libltdl/config/ltmain.m4sh -+++ b/libltdl/config/ltmain.m4sh -@@ -5051,7 +5051,7 @@ func_mode_link () - # -O*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization - -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \ - -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*|--sysroot=*| \ -- -O*|-flto*|-fwhopr*|-fuse-linker-plugin) -+ -O*|-flto*|-fwhopr*|-fuse-linker-plugin|-fstack-protector*) - func_quote_for_eval "$arg" - arg="$func_quote_for_eval_result" - func_append compile_command " $arg" diff --git a/package/libs/libubox/Makefile b/package/libs/libubox/Makefile index 9b7d867f6..6b1680534 100644 --- a/package/libs/libubox/Makefile +++ b/package/libs/libubox/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/libubox.git -PKG_SOURCE_DATE:=2018-01-07 -PKG_SOURCE_VERSION:=1c08e80313fd487112c48346889cc57badeef751 -PKG_MIRROR_HASH:=58cad98de55d44d7791e5d49b809ac5c32d3e6c481dc385b10e02386853f2263 +PKG_SOURCE_DATE:=2018-04-12 +PKG_SOURCE_VERSION:=6eff829d788b36939325557066f58aafd6a05321 +PKG_MIRROR_HASH:=d0ea16385a133d668d18d793d0bffd867a8c799832a176f0a312c1b473ff918d CMAKE_INSTALL:=1 PKG_LICENSE:=ISC diff --git a/package/libs/libunwind/Makefile b/package/libs/libunwind/Makefile index 2e655ed6f..ddb467f65 100644 --- a/package/libs/libunwind/Makefile +++ b/package/libs/libunwind/Makefile @@ -32,7 +32,7 @@ define Package/libunwind CATEGORY:=Libraries TITLE:=The libunwind project URL:=http://www.nongnu.org/libunwind/ - DEPENDS:=@(mips||mipsel||powerpc||i386||x86_64) + DEPENDS:=@(mips||mipsel||powerpc||i386||x86_64||arm||aarch64) endef define Package/libunwind/description diff --git a/package/libs/libunwind/patches/004-ppc-musl.patch b/package/libs/libunwind/patches/004-ppc-musl.patch new file mode 100644 index 000000000..f0f46258a --- /dev/null +++ b/package/libs/libunwind/patches/004-ppc-musl.patch @@ -0,0 +1,383 @@ +--- a/include/libunwind-ppc32.h ++++ b/include/libunwind-ppc32.h +@@ -74,6 +74,88 @@ typedef int64_t unw_sword_t; + + typedef long double unw_tdep_fpreg_t; + ++#ifndef __GLIBC__ ++ ++/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */ ++ ++#define PT_R0 0 ++#define PT_R1 1 ++#define PT_R2 2 ++#define PT_R3 3 ++#define PT_R4 4 ++#define PT_R5 5 ++#define PT_R6 6 ++#define PT_R7 7 ++#define PT_R8 8 ++#define PT_R9 9 ++#define PT_R10 10 ++#define PT_R11 11 ++#define PT_R12 12 ++#define PT_R13 13 ++#define PT_R14 14 ++#define PT_R15 15 ++#define PT_R16 16 ++#define PT_R17 17 ++#define PT_R18 18 ++#define PT_R19 19 ++#define PT_R20 20 ++#define PT_R21 21 ++#define PT_R22 22 ++#define PT_R23 23 ++#define PT_R24 24 ++#define PT_R25 25 ++#define PT_R26 26 ++#define PT_R27 27 ++#define PT_R28 28 ++#define PT_R29 29 ++#define PT_R30 30 ++#define PT_R31 31 ++ ++#define PT_NIP 32 ++#define PT_MSR 33 ++#define PT_ORIG_R3 34 ++#define PT_CTR 35 ++#define PT_LNK 36 ++#define PT_XER 37 ++#define PT_CCR 38 ++#ifndef __powerpc64__ ++#define PT_MQ 39 ++#else ++#define PT_SOFTE 39 ++#endif ++#define PT_TRAP 40 ++#define PT_DAR 41 ++#define PT_DSISR 42 ++#define PT_RESULT 43 ++#define PT_DSCR 44 ++#define PT_REGS_COUNT 44 ++ ++#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ ++ ++#ifndef __powerpc64__ ++ ++#define PT_FPR31 (PT_FPR0 + 2*31) ++#define PT_FPSCR (PT_FPR0 + 2*32 + 1) ++ ++#else /* __powerpc64__ */ ++ ++#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ ++ ++ ++#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ ++#define PT_VSCR (PT_VR0 + 32*2 + 1) ++#define PT_VRSAVE (PT_VR0 + 33*2) ++ ++ ++/* ++ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31 ++ */ ++#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */ ++#define PT_VSR31 (PT_VSR0 + 2*31) ++#endif /* __powerpc64__ */ ++ ++#endif /* !__GLIBC__ */ ++ + typedef enum + { + UNW_PPC32_R0, +--- a/include/libunwind-ppc64.h ++++ b/include/libunwind-ppc64.h +@@ -81,6 +81,88 @@ typedef struct { + uint64_t halves[2]; + } unw_tdep_vreg_t; + ++#ifndef __GLIBC__ ++ ++/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */ ++ ++#define PT_R0 0 ++#define PT_R1 1 ++#define PT_R2 2 ++#define PT_R3 3 ++#define PT_R4 4 ++#define PT_R5 5 ++#define PT_R6 6 ++#define PT_R7 7 ++#define PT_R8 8 ++#define PT_R9 9 ++#define PT_R10 10 ++#define PT_R11 11 ++#define PT_R12 12 ++#define PT_R13 13 ++#define PT_R14 14 ++#define PT_R15 15 ++#define PT_R16 16 ++#define PT_R17 17 ++#define PT_R18 18 ++#define PT_R19 19 ++#define PT_R20 20 ++#define PT_R21 21 ++#define PT_R22 22 ++#define PT_R23 23 ++#define PT_R24 24 ++#define PT_R25 25 ++#define PT_R26 26 ++#define PT_R27 27 ++#define PT_R28 28 ++#define PT_R29 29 ++#define PT_R30 30 ++#define PT_R31 31 ++ ++#define PT_NIP 32 ++#define PT_MSR 33 ++#define PT_ORIG_R3 34 ++#define PT_CTR 35 ++#define PT_LNK 36 ++#define PT_XER 37 ++#define PT_CCR 38 ++#ifndef __powerpc64__ ++#define PT_MQ 39 ++#else ++#define PT_SOFTE 39 ++#endif ++#define PT_TRAP 40 ++#define PT_DAR 41 ++#define PT_DSISR 42 ++#define PT_RESULT 43 ++#define PT_DSCR 44 ++#define PT_REGS_COUNT 44 ++ ++#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ ++ ++#ifndef __powerpc64__ ++ ++#define PT_FPR31 (PT_FPR0 + 2*31) ++#define PT_FPSCR (PT_FPR0 + 2*32 + 1) ++ ++#else /* __powerpc64__ */ ++ ++#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ ++ ++ ++#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ ++#define PT_VSCR (PT_VR0 + 32*2 + 1) ++#define PT_VRSAVE (PT_VR0 + 33*2) ++ ++ ++/* ++ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31 ++ */ ++#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */ ++#define PT_VSR31 (PT_VSR0 + 2*31) ++#endif /* __powerpc64__ */ ++ ++#endif /* !__GLIBC__ */ ++ + typedef enum + { + UNW_PPC64_R0, +--- a/src/ppc32/Ginit.c ++++ b/src/ppc32/Ginit.c +@@ -46,14 +46,19 @@ static void * + uc_addr (ucontext_t *uc, int reg) + { + void *addr; ++#ifdef __GLIBC__ ++ mcontext_t *mc = uc->uc_mcontext.uc_regs; ++#else ++ mcontext_t *mc = &uc->uc_mcontext; ++#endif + + if ((unsigned) (reg - UNW_PPC32_R0) < 32) +- addr = &uc->uc_mcontext.uc_regs->gregs[reg - UNW_PPC32_R0]; ++ addr = &mc->gregs[reg - UNW_PPC32_R0]; + + else + if ( ((unsigned) (reg - UNW_PPC32_F0) < 32) && + ((unsigned) (reg - UNW_PPC32_F0) >= 0) ) +- addr = &uc->uc_mcontext.uc_regs->fpregs.fpregs[reg - UNW_PPC32_F0]; ++ addr = &mc->fpregs.fpregs[reg - UNW_PPC32_F0]; + + else + { +@@ -76,7 +81,7 @@ uc_addr (ucontext_t *uc, int reg) + default: + return NULL; + } +- addr = &uc->uc_mcontext.uc_regs->gregs[gregs_idx]; ++ addr = &mc->gregs[gregs_idx]; + } + return addr; + } +--- a/src/ppc32/ucontext_i.h ++++ b/src/ppc32/ucontext_i.h +@@ -46,83 +46,89 @@ WITH THE SOFTWARE OR THE USE OR OTHER DE + various structure members. */ + static ucontext_t dmy_ctxt UNUSED; + +-#define UC_MCONTEXT_GREGS_R0 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[0] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R1 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[1] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R2 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[2] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R3 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[3] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R4 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[4] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R5 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[5] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R6 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[6] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R7 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[7] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R8 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[8] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R9 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[9] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R10 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[10] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R11 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[11] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R12 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[12] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R13 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[13] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R14 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[14] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R15 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[15] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R16 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[16] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R17 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[17] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R18 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[18] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R19 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[19] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R20 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[20] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R21 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[21] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R22 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[22] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R23 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[23] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R24 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[24] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R25 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[25] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R26 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[26] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R27 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[27] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R28 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[28] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R29 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[29] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R30 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[30] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_R31 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[31] - (void *)&dmy_ctxt) ++#ifdef __GLIBC__ ++#define UC_MCONTEXT_OFFSET(field) ((void *)&dmy_ctxt.uc_mcontext.uc_regs->field - (void *)&dmy_ctxt) ++#else ++#define UC_MCONTEXT_OFFSET(field) ((void *)&dmy_ctxt.uc_mcontext.field - (void *)&dmy_ctxt) ++#endif ++ ++#define UC_MCONTEXT_GREGS_R0 UC_MCONTEXT_OFFSET(gregs[0]) ++#define UC_MCONTEXT_GREGS_R1 UC_MCONTEXT_OFFSET(gregs[1]) ++#define UC_MCONTEXT_GREGS_R2 UC_MCONTEXT_OFFSET(gregs[2]) ++#define UC_MCONTEXT_GREGS_R3 UC_MCONTEXT_OFFSET(gregs[3]) ++#define UC_MCONTEXT_GREGS_R4 UC_MCONTEXT_OFFSET(gregs[4]) ++#define UC_MCONTEXT_GREGS_R5 UC_MCONTEXT_OFFSET(gregs[5]) ++#define UC_MCONTEXT_GREGS_R6 UC_MCONTEXT_OFFSET(gregs[6]) ++#define UC_MCONTEXT_GREGS_R7 UC_MCONTEXT_OFFSET(gregs[7]) ++#define UC_MCONTEXT_GREGS_R8 UC_MCONTEXT_OFFSET(gregs[8]) ++#define UC_MCONTEXT_GREGS_R9 UC_MCONTEXT_OFFSET(gregs[9]) ++#define UC_MCONTEXT_GREGS_R10 UC_MCONTEXT_OFFSET(gregs[10]) ++#define UC_MCONTEXT_GREGS_R11 UC_MCONTEXT_OFFSET(gregs[11]) ++#define UC_MCONTEXT_GREGS_R12 UC_MCONTEXT_OFFSET(gregs[12]) ++#define UC_MCONTEXT_GREGS_R13 UC_MCONTEXT_OFFSET(gregs[13]) ++#define UC_MCONTEXT_GREGS_R14 UC_MCONTEXT_OFFSET(gregs[14]) ++#define UC_MCONTEXT_GREGS_R15 UC_MCONTEXT_OFFSET(gregs[15]) ++#define UC_MCONTEXT_GREGS_R16 UC_MCONTEXT_OFFSET(gregs[16]) ++#define UC_MCONTEXT_GREGS_R17 UC_MCONTEXT_OFFSET(gregs[17]) ++#define UC_MCONTEXT_GREGS_R18 UC_MCONTEXT_OFFSET(gregs[18]) ++#define UC_MCONTEXT_GREGS_R19 UC_MCONTEXT_OFFSET(gregs[19]) ++#define UC_MCONTEXT_GREGS_R20 UC_MCONTEXT_OFFSET(gregs[20]) ++#define UC_MCONTEXT_GREGS_R21 UC_MCONTEXT_OFFSET(gregs[21]) ++#define UC_MCONTEXT_GREGS_R22 UC_MCONTEXT_OFFSET(gregs[22]) ++#define UC_MCONTEXT_GREGS_R23 UC_MCONTEXT_OFFSET(gregs[23]) ++#define UC_MCONTEXT_GREGS_R24 UC_MCONTEXT_OFFSET(gregs[24]) ++#define UC_MCONTEXT_GREGS_R25 UC_MCONTEXT_OFFSET(gregs[25]) ++#define UC_MCONTEXT_GREGS_R26 UC_MCONTEXT_OFFSET(gregs[26]) ++#define UC_MCONTEXT_GREGS_R27 UC_MCONTEXT_OFFSET(gregs[27]) ++#define UC_MCONTEXT_GREGS_R28 UC_MCONTEXT_OFFSET(gregs[28]) ++#define UC_MCONTEXT_GREGS_R29 UC_MCONTEXT_OFFSET(gregs[29]) ++#define UC_MCONTEXT_GREGS_R30 UC_MCONTEXT_OFFSET(gregs[30]) ++#define UC_MCONTEXT_GREGS_R31 UC_MCONTEXT_OFFSET(gregs[31]) + +-#define UC_MCONTEXT_GREGS_MSR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[MSR_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_ORIG_GPR3 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[ORIG_GPR3_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_CTR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[CTR_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_LINK ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[LINK_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_XER ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[XER_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_CCR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[CCR_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_SOFTE ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[SOFTE_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_TRAP ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[TRAP_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_DAR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[DAR_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_DSISR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[DSISR_IDX] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_GREGS_RESULT ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[RESULT_IDX] - (void *)&dmy_ctxt) ++#define UC_MCONTEXT_GREGS_MSR UC_MCONTEXT_OFFSET(gregs[MSR_IDX]) ++#define UC_MCONTEXT_GREGS_ORIG_GPR3 UC_MCONTEXT_OFFSET(gregs[ORIG_GPR3_IDX]) ++#define UC_MCONTEXT_GREGS_CTR UC_MCONTEXT_OFFSET(gregs[CTR_IDX]) ++#define UC_MCONTEXT_GREGS_LINK UC_MCONTEXT_OFFSET(gregs[LINK_IDX]) ++#define UC_MCONTEXT_GREGS_XER UC_MCONTEXT_OFFSET(gregs[XER_IDX]) ++#define UC_MCONTEXT_GREGS_CCR UC_MCONTEXT_OFFSET(gregs[CCR_IDX]) ++#define UC_MCONTEXT_GREGS_SOFTE UC_MCONTEXT_OFFSET(gregs[SOFTE_IDX]) ++#define UC_MCONTEXT_GREGS_TRAP UC_MCONTEXT_OFFSET(gregs[TRAP_IDX]) ++#define UC_MCONTEXT_GREGS_DAR UC_MCONTEXT_OFFSET(gregs[DAR_IDX]) ++#define UC_MCONTEXT_GREGS_DSISR UC_MCONTEXT_OFFSET(gregs[DSISR_IDX]) ++#define UC_MCONTEXT_GREGS_RESULT UC_MCONTEXT_OFFSET(gregs[RESULT_IDX]) + +-#define UC_MCONTEXT_FREGS_R0 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[0] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R1 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[1] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R2 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[2] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R3 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[3] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R4 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[4] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R5 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[5] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R6 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[6] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R7 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[7] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R8 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[8] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R9 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[9] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R10 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[10] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R11 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[11] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R12 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[12] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R13 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[13] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R14 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[14] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R15 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[15] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R16 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[16] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R17 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[17] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R18 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[18] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R19 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[19] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R20 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[20] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R21 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[21] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R22 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[22] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R23 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[23] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R24 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[24] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R25 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[25] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R26 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[26] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R27 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[27] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R28 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[28] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R29 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[29] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R30 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[30] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_R31 ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[31] - (void *)&dmy_ctxt) +-#define UC_MCONTEXT_FREGS_FPSCR ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[32] - (void *)&dmy_ctxt) ++#define UC_MCONTEXT_FREGS_R0 UC_MCONTEXT_OFFSET(fpregs.fpregs[0]) ++#define UC_MCONTEXT_FREGS_R1 UC_MCONTEXT_OFFSET(fpregs.fpregs[1]) ++#define UC_MCONTEXT_FREGS_R2 UC_MCONTEXT_OFFSET(fpregs.fpregs[2]) ++#define UC_MCONTEXT_FREGS_R3 UC_MCONTEXT_OFFSET(fpregs.fpregs[3]) ++#define UC_MCONTEXT_FREGS_R4 UC_MCONTEXT_OFFSET(fpregs.fpregs[4]) ++#define UC_MCONTEXT_FREGS_R5 UC_MCONTEXT_OFFSET(fpregs.fpregs[5]) ++#define UC_MCONTEXT_FREGS_R6 UC_MCONTEXT_OFFSET(fpregs.fpregs[6]) ++#define UC_MCONTEXT_FREGS_R7 UC_MCONTEXT_OFFSET(fpregs.fpregs[7]) ++#define UC_MCONTEXT_FREGS_R8 UC_MCONTEXT_OFFSET(fpregs.fpregs[8]) ++#define UC_MCONTEXT_FREGS_R9 UC_MCONTEXT_OFFSET(fpregs.fpregs[9]) ++#define UC_MCONTEXT_FREGS_R10 UC_MCONTEXT_OFFSET(fpregs.fpregs[10]) ++#define UC_MCONTEXT_FREGS_R11 UC_MCONTEXT_OFFSET(fpregs.fpregs[11]) ++#define UC_MCONTEXT_FREGS_R12 UC_MCONTEXT_OFFSET(fpregs.fpregs[12]) ++#define UC_MCONTEXT_FREGS_R13 UC_MCONTEXT_OFFSET(fpregs.fpregs[13]) ++#define UC_MCONTEXT_FREGS_R14 UC_MCONTEXT_OFFSET(fpregs.fpregs[14]) ++#define UC_MCONTEXT_FREGS_R15 UC_MCONTEXT_OFFSET(fpregs.fpregs[15]) ++#define UC_MCONTEXT_FREGS_R16 UC_MCONTEXT_OFFSET(fpregs.fpregs[16]) ++#define UC_MCONTEXT_FREGS_R17 UC_MCONTEXT_OFFSET(fpregs.fpregs[17]) ++#define UC_MCONTEXT_FREGS_R18 UC_MCONTEXT_OFFSET(fpregs.fpregs[18]) ++#define UC_MCONTEXT_FREGS_R19 UC_MCONTEXT_OFFSET(fpregs.fpregs[19]) ++#define UC_MCONTEXT_FREGS_R20 UC_MCONTEXT_OFFSET(fpregs.fpregs[20]) ++#define UC_MCONTEXT_FREGS_R21 UC_MCONTEXT_OFFSET(fpregs.fpregs[21]) ++#define UC_MCONTEXT_FREGS_R22 UC_MCONTEXT_OFFSET(fpregs.fpregs[22]) ++#define UC_MCONTEXT_FREGS_R23 UC_MCONTEXT_OFFSET(fpregs.fpregs[23]) ++#define UC_MCONTEXT_FREGS_R24 UC_MCONTEXT_OFFSET(fpregs.fpregs[24]) ++#define UC_MCONTEXT_FREGS_R25 UC_MCONTEXT_OFFSET(fpregs.fpregs[25]) ++#define UC_MCONTEXT_FREGS_R26 UC_MCONTEXT_OFFSET(fpregs.fpregs[26]) ++#define UC_MCONTEXT_FREGS_R27 UC_MCONTEXT_OFFSET(fpregs.fpregs[27]) ++#define UC_MCONTEXT_FREGS_R28 UC_MCONTEXT_OFFSET(fpregs.fpregs[28]) ++#define UC_MCONTEXT_FREGS_R29 UC_MCONTEXT_OFFSET(fpregs.fpregs[29]) ++#define UC_MCONTEXT_FREGS_R30 UC_MCONTEXT_OFFSET(fpregs.fpregs[30]) ++#define UC_MCONTEXT_FREGS_R31 UC_MCONTEXT_OFFSET(fpregs.fpregs[31]) ++#define UC_MCONTEXT_FREGS_FPSCR UC_MCONTEXT_OFFSET(fpregs.fpregs[32]) + + #endif diff --git a/package/libs/mbedtls/Makefile b/package/libs/mbedtls/Makefile index 3a2b29228..8ac4e3b13 100644 --- a/package/libs/mbedtls/Makefile +++ b/package/libs/mbedtls/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mbedtls -PKG_VERSION:=2.6.0 +PKG_VERSION:=2.8.0 PKG_RELEASE:=1 PKG_USE_MIPS16:=0 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-gpl.tgz PKG_SOURCE_URL:=https://tls.mbed.org/download/ -PKG_HASH:=a99959d7360def22f9108d2d487c9de384fe76c349697176b1f22370080d5810 +PKG_HASH:=649eb27187154590edda52943a7f468e740ec08807e5bf68ff45f4e8ffd68923 PKG_BUILD_PARALLEL:=1 PKG_LICENSE:=GPL-2.0+ @@ -24,7 +24,6 @@ include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/cmake.mk define Package/mbedtls/Default - SUBMENU:=SSL TITLE:=Embedded SSL URL:=https://tls.mbed.org endef @@ -38,15 +37,30 @@ define Package/libmbedtls $(call Package/mbedtls/Default) SECTION:=libs CATEGORY:=Libraries + SUBMENU:=SSL TITLE+= (library) ABI_VERSION:=$(PKG_VERSION)-$(PKG_RELEASE) endef +define Package/mbedtls-util +$(call Package/mbedtls/Default) + SECTION:=utils + CATEGORY:=Utilities + TITLE+= (utilities) + DEPENDS:=+libmbedtls +endef + define Package/libmbedtls/description $(call Package/mbedtls/Default/description) This package contains the mbedtls library. endef +define Package/mbedtls-util/description +$(call Package/mbedtls/Default/description) +This package contains mbedtls helper programs for private key and +CSR generation (gen_key, cert_req) +endef + PKG_INSTALL:=1 TARGET_CFLAGS += -ffunction-sections -fdata-sections @@ -55,7 +69,7 @@ CMAKE_OPTIONS += \ -DCMAKE_BUILD_TYPE:String="Release" \ -DUSE_SHARED_MBEDTLS_LIBRARY:Bool=ON \ -DENABLE_TESTING:Bool=OFF \ - -DENABLE_PROGRAMS:Bool=OFF \ + -DENABLE_PROGRAMS:Bool=ON define Build/InstallDev $(INSTALL_DIR) $(1)/usr/include @@ -70,4 +84,11 @@ define Package/libmbedtls/install $(CP) $(PKG_INSTALL_DIR)/usr/lib/lib*.so* $(1)/usr/lib/ endef +define Package/mbedtls-util/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/gen_key $(1)/usr/bin/ + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/cert_req $(1)/usr/bin/ +endef + $(eval $(call BuildPackage,libmbedtls)) +$(eval $(call BuildPackage,mbedtls-util)) diff --git a/package/libs/mbedtls/patches/200-config.patch b/package/libs/mbedtls/patches/200-config.patch index 5fbd6b145..70ef95477 100644 --- a/package/libs/mbedtls/patches/200-config.patch +++ b/package/libs/mbedtls/patches/200-config.patch @@ -1,15 +1,6 @@ --- a/include/mbedtls/config.h +++ b/include/mbedtls/config.h -@@ -220,7 +220,7 @@ - * - * Uncomment to get errors on using deprecated functions. - */ --//#define MBEDTLS_DEPRECATED_REMOVED -+#define MBEDTLS_DEPRECATED_REMOVED - - /* \} name SECTION: System support */ - -@@ -539,17 +539,17 @@ +@@ -566,17 +566,17 @@ * * Comment macros to disable the curve and functions for it */ @@ -35,7 +26,7 @@ #define MBEDTLS_ECP_DP_CURVE25519_ENABLED /** -@@ -574,8 +574,8 @@ +@@ -601,8 +601,8 @@ * Requires: MBEDTLS_HMAC_DRBG_C * * Comment this macro to disable deterministic ECDSA. @@ -45,16 +36,16 @@ /** * \def MBEDTLS_KEY_EXCHANGE_PSK_ENABLED -@@ -621,7 +621,7 @@ - * MBEDTLS_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA - * MBEDTLS_TLS_DHE_PSK_WITH_RC4_128_SHA +@@ -655,7 +655,7 @@ + * See dhm.h for more details. + * */ -#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED +//#define MBEDTLS_KEY_EXCHANGE_DHE_PSK_ENABLED /** * \def MBEDTLS_KEY_EXCHANGE_ECDHE_PSK_ENABLED -@@ -640,8 +640,8 @@ +@@ -674,8 +674,8 @@ * MBEDTLS_TLS_ECDHE_PSK_WITH_CAMELLIA_128_CBC_SHA256 * MBEDTLS_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA * MBEDTLS_TLS_ECDHE_PSK_WITH_RC4_128_SHA @@ -64,7 +55,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_RSA_PSK_ENABLED -@@ -666,7 +666,7 @@ +@@ -700,7 +700,7 @@ * MBEDTLS_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA * MBEDTLS_TLS_RSA_PSK_WITH_RC4_128_SHA */ @@ -73,7 +64,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_RSA_ENABLED -@@ -793,7 +793,7 @@ +@@ -834,7 +834,7 @@ * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_128_GCM_SHA256 * MBEDTLS_TLS_ECDH_ECDSA_WITH_CAMELLIA_256_GCM_SHA384 */ @@ -82,7 +73,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_ECDH_RSA_ENABLED -@@ -817,7 +817,7 @@ +@@ -858,7 +858,7 @@ * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_128_GCM_SHA256 * MBEDTLS_TLS_ECDH_RSA_WITH_CAMELLIA_256_GCM_SHA384 */ @@ -91,7 +82,7 @@ /** * \def MBEDTLS_KEY_EXCHANGE_ECJPAKE_ENABLED -@@ -921,7 +921,7 @@ +@@ -962,7 +962,7 @@ * This option is only useful if both MBEDTLS_SHA256_C and * MBEDTLS_SHA512_C are defined. Otherwise the available hash module is used. */ @@ -100,7 +91,7 @@ /** * \def MBEDTLS_ENTROPY_NV_SEED -@@ -1015,14 +1015,14 @@ +@@ -1057,14 +1057,14 @@ * Uncomment this macro to disable the use of CRT in RSA. * */ @@ -117,7 +108,7 @@ /** * \def MBEDTLS_SHA256_SMALLER -@@ -1038,7 +1038,7 @@ +@@ -1080,7 +1080,7 @@ * * Uncomment to enable the smaller implementation of SHA256. */ @@ -126,17 +117,16 @@ /** * \def MBEDTLS_SSL_ALL_ALERT_MESSAGES -@@ -1157,8 +1157,8 @@ - * misuse/misunderstand. +@@ -1207,7 +1207,7 @@ + * configuration of this extension). * - * Comment this to disable support for renegotiation. -- */ - #define MBEDTLS_SSL_RENEGOTIATION -+ */ + */ +-#define MBEDTLS_SSL_RENEGOTIATION ++//#define MBEDTLS_SSL_RENEGOTIATION /** * \def MBEDTLS_SSL_SRV_SUPPORT_SSLV2_CLIENT_HELLO -@@ -1332,8 +1332,8 @@ +@@ -1381,8 +1381,8 @@ * callbacks are provided by MBEDTLS_SSL_TICKET_C. * * Comment this macro to disable support for SSL session tickets @@ -146,7 +136,7 @@ /** * \def MBEDTLS_SSL_EXPORT_KEYS -@@ -1363,7 +1363,7 @@ +@@ -1412,7 +1412,7 @@ * * Comment this macro to disable support for truncated HMAC in SSL */ @@ -154,8 +144,8 @@ +//#define MBEDTLS_SSL_TRUNCATED_HMAC /** - * \def MBEDTLS_THREADING_ALT -@@ -1397,8 +1397,8 @@ + * \def MBEDTLS_SSL_TRUNCATED_HMAC_COMPAT +@@ -1470,8 +1470,8 @@ * Requires: MBEDTLS_VERSION_C * * Comment this to disable run-time checking and save ROM space @@ -165,7 +155,7 @@ /** * \def MBEDTLS_X509_ALLOW_EXTENSIONS_NON_V3 -@@ -1719,7 +1719,7 @@ +@@ -1801,7 +1801,7 @@ * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_GCM_SHA256 * MBEDTLS_TLS_PSK_WITH_CAMELLIA_128_CBC_SHA256 */ @@ -174,7 +164,7 @@ /** * \def MBEDTLS_CCM_C -@@ -1733,7 +1733,7 @@ +@@ -1815,7 +1815,7 @@ * This module enables the AES-CCM ciphersuites, if other requisites are * enabled as well. */ @@ -183,7 +173,7 @@ /** * \def MBEDTLS_CERTS_C -@@ -1745,7 +1745,7 @@ +@@ -1827,7 +1827,7 @@ * * This module is used for testing (ssl_client/server). */ @@ -192,7 +182,7 @@ /** * \def MBEDTLS_CIPHER_C -@@ -1798,7 +1798,7 @@ +@@ -1880,7 +1880,7 @@ * * This module provides debugging functions. */ @@ -201,17 +191,16 @@ /** * \def MBEDTLS_DES_C -@@ -1823,8 +1823,8 @@ - * MBEDTLS_TLS_PSK_WITH_3DES_EDE_CBC_SHA - * - * PEM_PARSE uses DES/3DES for decrypting encrypted keys. -- */ - #define MBEDTLS_DES_C -+ */ +@@ -1909,7 +1909,7 @@ + * \warning DES is considered a weak cipher and its use constitutes a + * security risk. We recommend considering stronger ciphers instead. + */ +-#define MBEDTLS_DES_C ++//#define MBEDTLS_DES_C /** * \def MBEDTLS_DHM_C -@@ -1978,8 +1978,8 @@ +@@ -2070,8 +2070,8 @@ * Requires: MBEDTLS_MD_C * * Uncomment to enable the HMAC_DRBG random number geerator. @@ -221,7 +210,7 @@ /** * \def MBEDTLS_MD_C -@@ -2256,7 +2256,7 @@ +@@ -2365,7 +2365,7 @@ * Caller: library/md.c * */ @@ -230,7 +219,7 @@ /** * \def MBEDTLS_RSA_C -@@ -2334,8 +2334,8 @@ +@@ -2449,8 +2449,8 @@ * Caller: * * Requires: MBEDTLS_SSL_CACHE_C @@ -240,7 +229,7 @@ /** * \def MBEDTLS_SSL_COOKIE_C -@@ -2356,8 +2356,8 @@ +@@ -2471,8 +2471,8 @@ * Caller: * * Requires: MBEDTLS_CIPHER_C @@ -250,7 +239,7 @@ /** * \def MBEDTLS_SSL_CLI_C -@@ -2456,8 +2456,8 @@ +@@ -2571,8 +2571,8 @@ * Module: library/version.c * * This module provides run-time version information. @@ -260,7 +249,7 @@ /** * \def MBEDTLS_X509_USE_C -@@ -2567,7 +2567,7 @@ +@@ -2682,7 +2682,7 @@ * Module: library/xtea.c * Caller: */ diff --git a/package/libs/ncurses/Makefile b/package/libs/ncurses/Makefile index 26fabeef7..95f05fa71 100644 --- a/package/libs/ncurses/Makefile +++ b/package/libs/ncurses/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ncurses -PKG_VERSION:=6.0 +PKG_VERSION:=6.1 PKG_RELEASE:=1 PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=@GNU/ncurses -PKG_HASH:=f551c24b30ce8bfb6e96d9f59b42fbea30fa3a6123384172f9e7284bcf647260 +PKG_SOURCE_URL:=@GNU/$(PKG_NAME) +PKG_HASH:=aa057eeeb4a14d470101eff4597d5833dcef5965331be3528c08d99cebaa0d17 PKG_LICENSE:=MIT PKG_LICENSE_FILES:=README diff --git a/package/libs/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch b/package/libs/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch index 49537b94e..ed7b2ee44 100644 --- a/package/libs/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch +++ b/package/libs/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch @@ -1,6 +1,6 @@ --- a/misc/terminfo.src +++ b/misc/terminfo.src -@@ -5214,6 +5214,172 @@ rxvt-cygwin-native|rxvt terminal emulato +@@ -5875,6 +5875,172 @@ rxvt-cygwin-native|rxvt terminal emulato rxvt-16color|rxvt with 16 colors like aixterm, ncv#32, use=ibm+16color, use=rxvt, diff --git a/package/libs/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch b/package/libs/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch index 394b6f9fd..ebd6df2e9 100644 --- a/package/libs/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch +++ b/package/libs/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch @@ -1,52 +1,52 @@ --- a/misc/terminfo.src +++ b/misc/terminfo.src -@@ -3955,6 +3955,7 @@ xterm-xfree86|xterm terminal emulator (X +@@ -4327,6 +4327,7 @@ xterm-xfree86|xterm terminal emulator (X # This version reflects the current xterm features. xterm-new|modern xterm terminal emulator, npc, + kbs=\177, indn=\E[%p1%dS, kb2=\EOE, kcbt=\E[Z, kent=\EOM, - rin=\E[%p1%dT, use=xterm+pcfkeys, use=xterm+tmux, - use=xterm-basic, -@@ -5048,6 +5049,7 @@ mlterm-256color|mlterm 3.0 with xterm 25 + rin=\E[%p1%dT, use=ansi+rep, use=ecma+strikeout, + use=xterm+sm+1006, use=xterm+pcfkeys, use=xterm+tmux, +@@ -5703,6 +5704,7 @@ mlterm-256color|mlterm 3.0 with xterm 25 rxvt-basic|rxvt terminal base (X Window System), OTbs, am, bce, eo, mir, msgr, xenl, xon, XT, cols#80, it#8, lines#24, + kbs=\177, acsc=``aaffggjjkkllmmnnooppqqrrssttuuvvwwxxyyzz{{||}}~~, bel=^G, blink=\E[5m, bold=\E[1m, civis=\E[?25l, - clear=\E[H\E[2J, cnorm=\E[?25h, cr=^M, -@@ -5058,7 +5060,7 @@ rxvt-basic|rxvt terminal base (X Window - enacs=\E(B\E)0, flash=\E[?5h\E[?5l, home=\E[H, ht=^I, - hts=\EH, ich=\E[%p1%d@, ich1=\E[@, il=\E[%p1%dL, il1=\E[L, - ind=^J, is1=\E[?47l\E=\E[?1l, + clear=\E[H\E[2J, cnorm=\E[?25h, cr=\r, +@@ -5713,7 +5715,7 @@ rxvt-basic|rxvt terminal base (X Window + enacs=\E(B\E)0, flash=\E[?5h$<100/>\E[?5l, home=\E[H, + ht=^I, hts=\EH, ich=\E[%p1%d@, ich1=\E[@, il=\E[%p1%dL, + il1=\E[L, ind=\n, is1=\E[?47l\E=\E[?1l, - is2=\E[r\E[m\E[2J\E[H\E[?7h\E[?1;3;4;6l\E[4l, kbs=^H, + is2=\E[r\E[m\E[2J\E[H\E[?7h\E[?1;3;4;6l\E[4l, kcbt=\E[Z, kmous=\E[M, rc=\E8, rev=\E[7m, ri=\EM, rmacs=^O, rmcup=\E[2J\E[?47l\E8, rmir=\E[4l, rmkx=\E>, rmso=\E[27m, rmul=\E[24m, -@@ -6118,6 +6120,7 @@ eterm-color|Emacs term.el terminal emula +@@ -6883,6 +6885,7 @@ dumb-emacs-ansi|Emacs dumb terminal with screen|VT 100/ANSI X3.64 virtual terminal, OTbs, OTpt, am, km, mir, msgr, xenl, G0, colors#8, cols#80, it#8, lines#24, ncv@, pairs#64, U8#1, + kbs=\177, - acsc=++\,\,--..00``aaffgghhiijjkkllmmnnooppqqrrssttuuvvwwxxyyzz{{||}}~~, + acsc=++\,\,--..00``aaffgghhiijjkkllmmnnooppqqrrssttuuvvwwxxy + yzz{{||}}~~, bel=^G, blink=\E[5m, bold=\E[1m, cbt=\E[Z, civis=\E[?25l, - clear=\E[H\E[J, cnorm=\E[34h\E[?25h, cr=^M, -@@ -6128,7 +6131,7 @@ screen|VT 100/ANSI X3.64 virtual termina +@@ -6894,7 +6897,7 @@ screen|VT 100/ANSI X3.64 virtual termina dl=\E[%p1%dM, dl1=\E[M, ed=\E[J, el=\E[K, el1=\E[1K, - enacs=\E(B\E)0, flash=\Eg, home=\E[H, ht=^I, hts=\EH, - ich=\E[%p1%d@, il=\E[%p1%dL, il1=\E[L, ind=^J, is2=\E)0, -- kbs=^H, kcbt=\E[Z, kcub1=\EOD, kcud1=\EOB, kcuf1=\EOC, -+ kcbt=\E[Z, kcub1=\EOD, kcud1=\EOB, kcuf1=\EOC, - kcuu1=\EOA, kdch1=\E[3~, kend=\E[4~, kf1=\EOP, kf10=\E[21~, + enacs=\E(B\E)0, flash=\Eg, home=\E[H, hpa=\E[%i%p1%dG, + ht=^I, hts=\EH, ich=\E[%p1%d@, il=\E[%p1%dL, il1=\E[L, +- ind=\n, indn=\E[%p1%dS, is2=\E)0, kbs=^H, kcbt=\E[Z, ++ ind=\n, indn=\E[%p1%dS, is2=\E)0, kcbt=\E[Z, + kcub1=\EOD, kcud1=\EOB, kcuf1=\EOC, kcuu1=\EOA, + kdch1=\E[3~, kend=\E[4~, kf1=\EOP, kf10=\E[21~, kf11=\E[23~, kf12=\E[24~, kf2=\EOQ, kf3=\EOR, kf4=\EOS, - kf5=\E[15~, kf6=\E[17~, kf7=\E[18~, kf8=\E[19~, kf9=\E[20~, -@@ -6252,6 +6255,7 @@ screen.xterm-r6|screen customized for X1 +@@ -7023,6 +7026,7 @@ screen.xterm-r6|screen customized for X1 # on Solaris because Sun's curses implementation gets confused. screen.teraterm|disable ncv in teraterm, ncv#127, + kbs=^H, - acsc=+\020\,\021-\030.^Y0\333`\004a\261f\370g\361h\260i\316j\331k\277l\332m\300n\305o~p\304q\304r\304s_t\303u\264v\301w\302x\263y\363z\362{\343|\330}\234~\376, - use=screen+fkeys, use=screen, - # Other terminals + acsc=+\020\,\021-\030.^Y0\333`\004a\261f\370g\361h\260i + \316j\331k\277l\332m\300n\305o~p\304q\304r\304s_t\303u + \264v\301w\302x\263y\363z\362{\343|\330}\234~\376, diff --git a/package/libs/ncurses/patches/102-ncurses-5.9-gcc-5.patch b/package/libs/ncurses/patches/102-ncurses-5.9-gcc-5.patch index 0424b2378..b84fcb965 100644 --- a/package/libs/ncurses/patches/102-ncurses-5.9-gcc-5.patch +++ b/package/libs/ncurses/patches/102-ncurses-5.9-gcc-5.patch @@ -15,7 +15,7 @@ Subject: [PATCH] ncurses 5.9 - patch 20141206 --- a/ncurses/base/MKlib_gen.sh +++ b/ncurses/base/MKlib_gen.sh -@@ -491,11 +491,22 @@ sed -n -f $ED1 \ +@@ -505,11 +505,22 @@ sed -n -f $ED1 \ -e 's/gen_$//' \ -e 's/ / /g' >>$TMP diff --git a/package/libs/ncurses/patches/500-cross.patch b/package/libs/ncurses/patches/500-cross.patch deleted file mode 100644 index 590bddf68..000000000 --- a/package/libs/ncurses/patches/500-cross.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/aclocal.m4 -+++ b/aclocal.m4 -@@ -5720,7 +5720,7 @@ CF_EOF - EXTRA_LDFLAGS="${cf_ld_rpath_opt}\${RPATH_LIST} $EXTRA_LDFLAGS" - fi - CF_SHARED_SONAME -- MK_SHARED_LIB='${CC} ${CFLAGS} -shared -Wl,-soname,'$cf_cv_shared_soname',-stats,-lc -o $[@]' -+ MK_SHARED_LIB='${CC} ${CFLAGS} -shared -Wl,-soname,'$cf_shared_soname',-stats,$(LDFLAGS) -lc -o $[@]' - ;; - (mingw*) - cf_cv_shlib_version=mingw diff --git a/package/libs/ncurses/patches/900-terminfo.patch b/package/libs/ncurses/patches/900-terminfo.patch index ab623b197..645b7ad90 100644 --- a/package/libs/ncurses/patches/900-terminfo.patch +++ b/package/libs/ncurses/patches/900-terminfo.patch @@ -1,20 +1,20 @@ --- a/misc/terminfo.src +++ b/misc/terminfo.src -@@ -4919,12 +4919,11 @@ konsole-xf3x|KDE console window with key - # The value for kbs reflects local customization rather than the settings used - # for XFree86 xterm. +@@ -5563,12 +5563,11 @@ konsole-xf3x|KDE console window with key + # The value for kbs (see konsole-vt100) reflects local customization rather + # than the settings used for XFree86 xterm. konsole-xf4x|KDE console window with keyboard for XFree86 4.x xterm, - kend=\EOF, khome=\EOH, use=konsole+pcfkeys, - use=konsole-vt100, --# Konsole does not implement shifted cursor-keys. +- -konsole+pcfkeys|konsole subset of xterm+pcfkeys, -- kLFT@, kRIT@, kcbt=\E[Z, kind@, kri@, kDN@, kUP@, use=xterm+pcc2, -- use=xterm+pcf0, +- kcbt=\E[Z, use=xterm+pcc2, use=xterm+pcf0, +- use=xterm+pce2, + kend=\EOF, kf1=\EOP, kf13=\EO2P, kf14=\EO2Q, kf15=\EO2R, + kf16=\EO2S, kf17=\E[15;2~, kf18=\E[17;2~, kf19=\E[18;2~, + kf2=\EOQ, kf20=\E[19;2~, kf21=\E[20;2~, kf22=\E[21;2~, + kf23=\E[23;2~, kf24=\E[24;2~, kf3=\EOR, kf4=\EOS, + khome=\EOH, use=konsole-vt100, + + # Obsolete: vt100.keymap # KDE's "vt100" keyboard has no relationship to any terminal that DEC made, but - # it is still useful for deriving the other entries. - konsole-vt100|KDE console window with vt100 (sic) keyboard, diff --git a/package/libs/nghttp2/Makefile b/package/libs/nghttp2/Makefile index 3cc2a5543..554d31b2a 100644 --- a/package/libs/nghttp2/Makefile +++ b/package/libs/nghttp2/Makefile @@ -1,12 +1,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=nghttp2 -PKG_VERSION:=1.29.0 +PKG_VERSION:=1.31.1 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://github.com/nghttp2/nghttp2/releases/download/v$(PKG_VERSION) -PKG_HASH:=a7a1b18be57be6a53a7739988ea27d6ec9209e7b0e8372b8483cd911d7838739 +PKG_HASH:=65b9c83ae95a7760a14410aeefa9d441c34453027bc938df7a2272520f32e103 PKG_LICENSE:=MIT PKG_LICENSE_FILES:=COPYING diff --git a/package/libs/openssl/Makefile b/package/libs/openssl/Makefile index b75aa45e8..8409730d7 100644 --- a/package/libs/openssl/Makefile +++ b/package/libs/openssl/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=openssl PKG_BASE:=1.0.2 -PKG_BUGFIX:=n +PKG_BUGFIX:=o PKG_VERSION:=$(PKG_BASE)$(PKG_BUGFIX) PKG_RELEASE:=1 PKG_USE_MIPS16:=0 @@ -24,7 +24,7 @@ PKG_SOURCE_URL:= \ http://gd.tuwien.ac.at/infosys/security/openssl/source/ \ http://www.openssl.org/source/ \ http://www.openssl.org/source/old/$(PKG_BASE)/ -PKG_HASH:=370babb75f278c39e0c50e8c4e7493bc0f18db6867478341a832a982fd15a8fe +PKG_HASH:=ec3f5c9714ba0fd45cb4e087301eb1336c317e0d20b575a125050470e8089e4d PKG_LICENSE:=OpenSSL PKG_LICENSE_FILES:=LICENSE @@ -194,10 +194,8 @@ define Build/Configure $(OPENSSL_NO_CIPHERS) \ $(OPENSSL_OPTIONS) \ ) - # XXX: OpenSSL "make depend" will look for installed headers before its own, - # so remove installed stuff first - -$(SUBMAKE) -j1 clean-staging +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ MAKEDEPPROG="$(TARGET_CROSS)gcc" \ OPENWRT_OPTIMIZATION_FLAGS="$(TARGET_CFLAGS)" \ $(OPENSSL_MAKEFLAGS) \ @@ -209,6 +207,7 @@ TARGET_LDFLAGS += -Wl,--gc-sections define Build/Compile +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ CC="$(TARGET_CC)" \ ASFLAGS="$(TARGET_ASFLAGS) -I$(PKG_BUILD_DIR)/crypto -c" \ AR="$(TARGET_CROSS)ar r" \ @@ -217,6 +216,7 @@ define Build/Compile $(OPENSSL_MAKEFLAGS) \ all +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ CC="$(TARGET_CC)" \ ASFLAGS="$(TARGET_ASFLAGS) -I$(PKG_BUILD_DIR)/crypto -c" \ AR="$(TARGET_CROSS)ar r" \ @@ -227,11 +227,13 @@ define Build/Compile # Work around openssl build bug to link libssl.so with libcrypto.so. -rm $(PKG_BUILD_DIR)/libssl.so.*.*.* +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ CC="$(TARGET_CC)" \ OPENWRT_OPTIMIZATION_FLAGS="$(TARGET_CFLAGS)" \ $(OPENSSL_MAKEFLAGS) \ do_linux-shared $(MAKE) -C $(PKG_BUILD_DIR) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ CC="$(TARGET_CC)" \ INSTALL_PREFIX="$(PKG_INSTALL_DIR)" \ $(OPENSSL_MAKEFLAGS) \ diff --git a/package/libs/openssl/patches/150-no_engines.patch b/package/libs/openssl/patches/150-no_engines.patch index 1cb04bdab..102e7a327 100644 --- a/package/libs/openssl/patches/150-no_engines.patch +++ b/package/libs/openssl/patches/150-no_engines.patch @@ -1,6 +1,6 @@ --- a/Configure +++ b/Configure -@@ -2130,6 +2130,11 @@ EOF +@@ -2136,6 +2136,11 @@ EOF close(OUT); } diff --git a/package/libs/openssl/patches/200-parallel_build.patch b/package/libs/openssl/patches/200-parallel_build.patch index f2acc4a27..0616551b6 100644 --- a/package/libs/openssl/patches/200-parallel_build.patch +++ b/package/libs/openssl/patches/200-parallel_build.patch @@ -164,7 +164,7 @@ ctags $(SRC) --- a/test/Makefile +++ b/test/Makefile -@@ -144,7 +144,7 @@ install: +@@ -145,7 +145,7 @@ install: tags: ctags $(SRC) @@ -173,7 +173,7 @@ apps: @(cd ..; $(MAKE) DIRS=apps all) -@@ -578,7 +578,7 @@ $(DTLSTEST)$(EXE_EXT): $(DTLSTEST).o ssl +@@ -586,7 +586,7 @@ $(DTLSTEST)$(EXE_EXT): $(DTLSTEST).o ssl # fi dummytest$(EXE_EXT): dummytest.o $(DLIBCRYPTO) diff --git a/package/libs/ustream-ssl/Makefile b/package/libs/ustream-ssl/Makefile index b5e773ba7..1a8e0e78b 100644 --- a/package/libs/ustream-ssl/Makefile +++ b/package/libs/ustream-ssl/Makefile @@ -1,7 +1,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ustream-ssl -PKG_RELEASE:=2 +PKG_RELEASE:=3 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/ustream-ssl.git diff --git a/package/network/config/gre/Makefile b/package/network/config/gre/Makefile index b191327f8..73319e80c 100644 --- a/package/network/config/gre/Makefile +++ b/package/network/config/gre/Makefile @@ -15,40 +15,21 @@ PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk define Package/gre/Default - SECTION:=net - CATEGORY:=Network - MAINTAINER:=Hans Dedecker endef define Package/gre -$(call Package/gre/Default) + SECTION:=net + CATEGORY:=Network + MAINTAINER:=Hans Dedecker TITLE:=Generic Routing Encapsulation config support + DEPENDS:=+kmod-gre +IPV6:kmod-gre6 +resolveip + PROVIDES:=grev4 grev6 endef define Package/gre/description Generic Routing Encapsulation config support (IPv4 and IPv6) in /etc/config/network. endef -define Package/grev4 -$(call Package/gre/Default) - TITLE:=Generic Routing Encapsulation (IPv4) config support - DEPENDS:=@(PACKAGE_gre) +kmod-gre +resolveip -endef - -define Package/grev4/description - Generic Routing Encapsulation config support (IPv4) in /etc/config/network. -endef - -define Package/grev6 -$(call Package/gre/Default) - TITLE:=Generic Routing Encapsulation (IPv6) config support - DEPENDS:=@(PACKAGE_gre) @IPV6 +kmod-gre6 +resolveip -endef - -define Package/grev6/description - Generic Routing Encapsulation config support (IPv6) in /etc/config/network. -endef - define Build/Compile endef @@ -60,14 +41,4 @@ define Package/gre/install $(INSTALL_BIN) ./files/gre.sh $(1)/lib/netifd/proto/gre.sh endef -define Package/grev4/install - : -endef - -define Package/grev6/install - : -endef - $(eval $(call BuildPackage,gre)) -$(eval $(call BuildPackage,grev4)) -$(eval $(call BuildPackage,grev6)) diff --git a/package/network/config/ltq-vdsl-app/Makefile b/package/network/config/ltq-vdsl-app/Makefile index fd5014957..e2ecefa25 100644 --- a/package/network/config/ltq-vdsl-app/Makefile +++ b/package/network/config/ltq-vdsl-app/Makefile @@ -19,6 +19,7 @@ PKG_LICENSE:=BSD-2-Clause PKG_BUILD_DEPENDS:=ltq-vdsl +PKG_ASLR_PIE:=0 PKG_FLAGS:=nonshared include $(INCLUDE_DIR)/package.mk diff --git a/package/network/config/netifd/Makefile b/package/network/config/netifd/Makefile index 90cce9155..4f431246b 100644 --- a/package/network/config/netifd/Makefile +++ b/package/network/config/netifd/Makefile @@ -1,13 +1,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=netifd -PKG_RELEASE:=2 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git -PKG_SOURCE_DATE:=2018-01-04 -PKG_SOURCE_VERSION:=fd5c399c01ceb1bbede3ae8b0e1daaa7652a6fa1 -PKG_MIRROR_HASH:=0040f94d11d0039505328a90b2ff48968db873e9e7967307631bf40ef5679275 +PKG_SOURCE_DATE:=2018-04-20 +PKG_SOURCE_VERSION:=b3dca7b64d3646a91cc4520652f2e2e144478143 +PKG_MIRROR_HASH:=2f640ab588e9de1c2f469300a6d4b0dacc7b8319ed9d547b657a880b2821903c PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=GPL-2.0 diff --git a/package/network/config/netifd/files/etc/hotplug.d/net/20-smp-tune b/package/network/config/netifd/files/etc/hotplug.d/net/20-smp-tune new file mode 100644 index 000000000..ab9a90418 --- /dev/null +++ b/package/network/config/netifd/files/etc/hotplug.d/net/20-smp-tune @@ -0,0 +1,67 @@ +#!/bin/sh +[ "$ACTION" = add ] || exit + +NPROCS="$(grep -c "^processor.*:" /proc/cpuinfo)" +[ "$NPROCS" -gt 1 ] || exit + +PROC_MASK="$(( (1 << $NPROCS) - 1 ))" + +find_irq_cpu() { + local dev="$1" + local match="$(grep -m 1 "$dev\$" /proc/interrupts)" + local cpu=0 + + [ -n "$match" ] && { + set -- $match + shift + for cur in `seq 1 $NPROCS`; do + [ "$1" -gt 0 ] && { + cpu=$(($cur - 1)) + break + } + shift + done + } + + echo "$cpu" +} + +set_hex_val() { + local file="$1" + local val="$2" + val="$(printf %x "$val")" + [ -n "$DEBUG" ] && echo "$file = $val" + echo "$val" > "$file" +} + +default_ps="$(uci get "network.@globals[0].default_ps")" +[ -n "$default_ps" -a "$default_ps" != 1 ] && exit 0 + +exec 512>/var/lock/smp_tune.lock +flock 512 || exit 1 + +for dev in /sys/class/net/*; do + [ -d "$dev" ] || continue + + # ignore virtual interfaces + [ -n "$(ls "${dev}/" | grep '^lower_')" ] && continue + [ -d "${dev}/device" ] || continue + + device="$(readlink "${dev}/device")" + device="$(basename "$device")" + irq_cpu="$(find_irq_cpu "$device")" + irq_cpu_mask="$((1 << $irq_cpu))" + + for q in ${dev}/queues/rx-*; do + set_hex_val "$q/rps_cpus" "$(($PROC_MASK & ~$irq_cpu_mask))" + done + + ntxq="$(ls -d ${dev}/queues/tx-* | wc -l)" + + idx=$(($irq_cpu + 1)) + for q in ${dev}/queues/tx-*; do + set_hex_val "$q/xps_cpus" "$((1 << $idx))" + let "idx = idx + 1" + [ "$idx" -ge "$NPROCS" ] && idx=0 + done +done diff --git a/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh b/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh index 143e4451b..a2b0ccedb 100755 --- a/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh +++ b/package/network/config/netifd/files/lib/netifd/proto/dhcp.sh @@ -1,5 +1,7 @@ #!/bin/sh +[ -L /sbin/udhcpc ] || exit 0 + . /lib/functions.sh . ../netifd-proto.sh init_proto "$@" @@ -14,8 +16,9 @@ proto_dhcp_init_config() { proto_config_add_boolean 'broadcast:bool' proto_config_add_boolean 'release:bool' proto_config_add_string 'reqopts:list(string)' + proto_config_add_boolean 'defaultreqopts:bool' proto_config_add_string iface6rd - proto_config_add_string sendopts + proto_config_add_array 'sendopts:list(string)' proto_config_add_boolean delegate proto_config_add_string zone6rd proto_config_add_string zone @@ -24,23 +27,26 @@ proto_dhcp_init_config() { proto_config_add_boolean classlessroute } +proto_dhcp_add_sendopts() { + [ -n "$1" ] && append "$3" "-x $1" +} + proto_dhcp_setup() { local config="$1" local iface="$2" - local ipaddr hostname clientid vendorid broadcast release reqopts iface6rd sendopts delegate zone6rd zone mtu6rd customroutes classlessroute - json_get_vars ipaddr hostname clientid vendorid broadcast release reqopts iface6rd sendopts delegate zone6rd zone mtu6rd customroutes classlessroute + local ipaddr hostname clientid vendorid broadcast release reqopts defaultreqopts iface6rd sendopts delegate zone6rd zone mtu6rd customroutes classlessroute + json_get_vars ipaddr hostname clientid vendorid broadcast release reqopts defaultreqopts iface6rd delegate zone6rd zone mtu6rd customroutes classlessroute local opt dhcpopts for opt in $reqopts; do append dhcpopts "-O $opt" done - for opt in $sendopts; do - append dhcpopts "-x $opt" - done + json_for_each_item proto_dhcp_add_sendopts sendopts dhcpopts [ -z "$hostname" ] && hostname="$(cat /proc/sys/kernel/hostname)" + [ "$defaultreqopts" = 0 ] && defaultreqopts="-o" || defaultreqopts= [ "$broadcast" = 1 ] && broadcast="-B" || broadcast= [ "$release" = 1 ] && release="-R" || release= [ -n "$clientid" ] && clientid="-x 0x3d:${clientid//:/}" || clientid="-C" @@ -62,7 +68,7 @@ proto_dhcp_setup() { ${ipaddr:+-r $ipaddr} \ ${hostname:+-x "hostname:$hostname"} \ ${vendorid:+-V "$vendorid"} \ - $clientid $broadcast $release $dhcpopts + $clientid $defaultreqopts $broadcast $release $dhcpopts } proto_dhcp_renew() { diff --git a/package/network/config/vxlan/Makefile b/package/network/config/vxlan/Makefile index a471d4e90..aeceb9cd8 100644 --- a/package/network/config/vxlan/Makefile +++ b/package/network/config/vxlan/Makefile @@ -1,7 +1,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=vxlan -PKG_VERSION:=1 +PKG_VERSION:=2 PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk diff --git a/package/network/config/vxlan/files/vxlan.sh b/package/network/config/vxlan/files/vxlan.sh index 27ccd8f12..d055d41ed 100755 --- a/package/network/config/vxlan/files/vxlan.sh +++ b/package/network/config/vxlan/files/vxlan.sh @@ -15,8 +15,8 @@ vxlan_generic_setup() { local link="$cfg" - local port vid ttl tos mtu macaddr zone - json_get_vars port vid ttl tos mtu macaddr zone + local port vid ttl tos mtu macaddr zone rxcsum txcsum + json_get_vars port vid ttl tos mtu macaddr zone rxcsum txcsum proto_init_update "$link" 1 @@ -36,6 +36,8 @@ vxlan_generic_setup() { [ -n "$port" ] && json_add_int port "$port" [ -n "$vid" ] && json_add_int id "$vid" [ -n "$macaddr" ] && json_add_string macaddr "$macaddr" + [ -n "$rxcsum" ] && json_add_boolean rxcsum "$rxcsum" + [ -n "$txcsum" ] && json_add_boolean txcsum "$txcsum" json_close_object proto_close_tunnel diff --git a/package/network/ipv6/6in4/Makefile b/package/network/ipv6/6in4/Makefile index 34227ce9e..8ff4730e7 100644 --- a/package/network/ipv6/6in4/Makefile +++ b/package/network/ipv6/6in4/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=6in4 -PKG_VERSION:=24 +PKG_VERSION:=25 PKG_RELEASE:=1 PKG_LICENSE:=GPL-2.0 diff --git a/package/network/ipv6/6in4/files/6in4.sh b/package/network/ipv6/6in4/files/6in4.sh index 786f37fc1..941dc43d6 100755 --- a/package/network/ipv6/6in4/files/6in4.sh +++ b/package/network/ipv6/6in4/files/6in4.sh @@ -22,13 +22,18 @@ proto_6in4_update() { ' "$1" "$@" } +proto_6in4_add_prefix() { + append "$3" "$1" +} + proto_6in4_setup() { local cfg="$1" local iface="$2" local link="6in4-$cfg" - local mtu ttl tos ipaddr peeraddr ip6addr ip6prefix tunlink tunnelid username password updatekey - json_get_vars mtu ttl tos ipaddr peeraddr ip6addr ip6prefix tunlink tunnelid username password updatekey + local mtu ttl tos ipaddr peeraddr ip6addr ip6prefix ip6prefixes tunlink tunnelid username password updatekey + json_get_vars mtu ttl tos ipaddr peeraddr ip6addr tunlink tunnelid username password updatekey + json_for_each_item proto_6in4_add_prefix ip6prefix ip6prefixes [ -z "$peeraddr" ] && { proto_notify_error "$cfg" "MISSING_ADDRESS" @@ -61,10 +66,10 @@ proto_6in4_setup() { proto_add_ipv6_route "::" 0 "" "" "" "$local6/$mask6" } - [ -n "$ip6prefix" ] && { + for ip6prefix in $ip6prefixes; do proto_add_ipv6_prefix "$ip6prefix" proto_add_ipv6_route "::" 0 "" "" "" "$ip6prefix" - } + done proto_add_tunnel json_add_string mode sit @@ -122,7 +127,7 @@ proto_6in4_init_config() { proto_config_add_string "ipaddr" proto_config_add_string "ip6addr" - proto_config_add_string "ip6prefix" + proto_config_add_array "ip6prefix" proto_config_add_string "peeraddr" proto_config_add_string "tunlink" proto_config_add_string "tunnelid" diff --git a/package/network/ipv6/6rd/Makefile b/package/network/ipv6/6rd/Makefile index 5086fae69..47f20414f 100644 --- a/package/network/ipv6/6rd/Makefile +++ b/package/network/ipv6/6rd/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=6rd PKG_VERSION:=9 -PKG_RELEASE:=3 +PKG_RELEASE:=4 PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk diff --git a/package/network/ipv6/6rd/files/6rd.sh b/package/network/ipv6/6rd/files/6rd.sh index 8b3441428..62a20314d 100644 --- a/package/network/ipv6/6rd/files/6rd.sh +++ b/package/network/ipv6/6rd/files/6rd.sh @@ -40,8 +40,8 @@ proto_6rd_setup() { # Determine the relay prefix. local ip4prefixlen="${ip4prefixlen:-0}" - local ip4prefix=$(ipcalc.sh "$ipaddr/$ip4prefixlen" | grep NETWORK) - ip4prefix="${ip4prefix#NETWORK=}" + local ip4prefix + eval "$(ipcalc.sh "$ipaddr/$ip4prefixlen")";ip4prefix=$NETWORK # Determine our IPv6 address. local ip6subnet=$(6rdcalc "$ip6prefix/$ip6prefixlen" "$ipaddr/$ip4prefixlen") diff --git a/package/network/ipv6/map/Makefile b/package/network/ipv6/map/Makefile index ce04235f2..77967042b 100644 --- a/package/network/ipv6/map/Makefile +++ b/package/network/ipv6/map/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=map PKG_VERSION:=4 -PKG_RELEASE:=9 +PKG_RELEASE:=10 PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk diff --git a/package/network/ipv6/map/src/mapcalc.c b/package/network/ipv6/map/src/mapcalc.c index 6233bce73..66610c427 100644 --- a/package/network/ipv6/map/src/mapcalc.c +++ b/package/network/ipv6/map/src/mapcalc.c @@ -4,6 +4,7 @@ * Author: Steven Barth * Copyright (c) 2014-2015 cisco Systems, Inc. * Copyright (c) 2015 Steven Barth + * Copyright (c) 2018 Hans Dedecker * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 @@ -311,25 +312,30 @@ int main(int argc, char *argv[]) if (psidlen <= 0) { psidlen = ealen - (32 - prefix4len); + if (psidlen < 0) + psidlen = 0; + psid = -1; } - if (psid < 0 && psidlen <= 16 && psidlen >= 0 && pdlen >= 0 && ealen >= psidlen) { - bmemcpys64(&psid16, &pd, prefix6len + ealen - psidlen, psidlen); - psid = be16_to_cpu(psid16); - } - - psid = psid >> (16 - psidlen); - psid16 = cpu_to_be16(psid); - psid = psid << (16 - psidlen); - - if (prefix4len < 0 || prefix6len < 0 || ealen < 0 || ealen < psidlen) { + if (prefix4len < 0 || prefix6len < 0 || ealen < 0 || psidlen > 16 || ealen < psidlen) { fprintf(stderr, "Skipping invalid or incomplete rule: %s\n", argv[i]); status = 1; continue; } - if ((pdlen >= 0 || ealen == psidlen) && ealen >= psidlen) { + if (psid < 0 && psidlen >= 0 && pdlen >= 0) { + bmemcpys64(&psid16, &pd, prefix6len + ealen - psidlen, psidlen); + psid = be16_to_cpu(psid16); + } + + if (psidlen > 0) { + psid = psid >> (16 - psidlen); + psid16 = cpu_to_be16(psid); + psid = psid << (16 - psidlen); + } + + if (pdlen >= 0 || ealen == psidlen) { bmemcpys64(&ipv4addr, &pd, prefix6len, ealen - psidlen); ipv4addr.s_addr = htonl(ntohl(ipv4addr.s_addr) >> prefix4len); bmemcpy(&ipv4addr, &ipv4prefix, prefix4len); diff --git a/package/network/ipv6/odhcp6c/Makefile b/package/network/ipv6/odhcp6c/Makefile index 24cbe0b2c..70f213471 100644 --- a/package/network/ipv6/odhcp6c/Makefile +++ b/package/network/ipv6/odhcp6c/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=odhcp6c -PKG_RELEASE:=4 +PKG_RELEASE:=11 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/odhcp6c.git -PKG_SOURCE_DATE:=2017-09-05 -PKG_SOURCE_VERSION:=51733a6d3bfe0fb9e8c53aea22231e5b8a1f64c3 -PKG_MIRROR_HASH:=fdccfb9a6cb00d6dbf1a3160bd36622ee8e188a9d58bcd282c71a9368972e184 +PKG_SOURCE_DATE:=2018-05-04 +PKG_SOURCE_VERSION:=474b5a3a9a25f0aa12e69afd72d7661638ad879d +PKG_MIRROR_HASH:=3eff22792c5a0c3450f72d04088e3f31cacba03edac4cc1a00565cf3051e4330 PKG_MAINTAINER:=Hans Dedecker PKG_LICENSE:=GPL-2.0 diff --git a/package/network/ipv6/odhcp6c/files/dhcpv6.script b/package/network/ipv6/odhcp6c/files/dhcpv6.script index 03efaf721..317101396 100755 --- a/package/network/ipv6/odhcp6c/files/dhcpv6.script +++ b/package/network/ipv6/odhcp6c/files/dhcpv6.script @@ -48,7 +48,9 @@ setup_interface () { fi done - [ -n "$USERPREFIX" ] && proto_add_ipv6_prefix "$USERPREFIX" + for prefix in $USERPREFIX; do + proto_add_ipv6_prefix "$prefix" + done # Merge addresses for entry in $RA_ADDRESSES; do diff --git a/package/network/ipv6/odhcp6c/files/dhcpv6.sh b/package/network/ipv6/odhcp6c/files/dhcpv6.sh index 56f75521e..919872fe8 100755 --- a/package/network/ipv6/odhcp6c/files/dhcpv6.sh +++ b/package/network/ipv6/odhcp6c/files/dhcpv6.sh @@ -11,11 +11,12 @@ proto_dhcpv6_init_config() { proto_config_add_string 'reqprefix:or("auto","no",range(0, 64))' proto_config_add_string clientid proto_config_add_string 'reqopts:list(uinteger)' + proto_config_add_string 'defaultreqopts:bool' proto_config_add_string 'noslaaconly:bool' proto_config_add_string 'forceprefix:bool' proto_config_add_string 'extendprefix:bool' proto_config_add_string 'norelease:bool' - proto_config_add_string 'ip6prefix:ip6addr' + proto_config_add_array 'ip6prefix:list(ip6addr)' proto_config_add_string iface_dslite proto_config_add_string zone_dslite proto_config_add_string iface_map @@ -26,6 +27,7 @@ proto_dhcpv6_init_config() { proto_config_add_string 'ifaceid:ip6addr' proto_config_add_string "userclass" proto_config_add_string "vendorclass" + proto_config_add_array "sendopts:list(string)" proto_config_add_boolean delegate proto_config_add_int "soltimeout" proto_config_add_boolean fakeroutes @@ -34,13 +36,21 @@ proto_dhcpv6_init_config() { proto_config_add_int "ra_holdoff" } +proto_dhcpv6_add_prefix() { + append "$3" "$1" +} + +proto_dhcpv6_add_sendopts() { + [ -n "$1" ] && append "$3" "-x$1" +} + proto_dhcpv6_setup() { local config="$1" local iface="$2" - local reqaddress reqprefix clientid reqopts noslaaconly forceprefix extendprefix norelease ip6prefix iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass delegate zone_dslite zone_map zone_464xlat zone soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff - json_get_vars reqaddress reqprefix clientid reqopts noslaaconly forceprefix extendprefix norelease ip6prefix iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass delegate zone_dslite zone_map zone_464xlat zone soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff - + local reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease ip6prefix ip6prefixes iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass sendopts delegate zone_dslite zone_map zone_464xlat zone soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff + json_get_vars reqaddress reqprefix clientid reqopts defaultreqopts noslaaconly forceprefix extendprefix norelease iface_dslite iface_map iface_464xlat ifaceid userclass vendorclass delegate zone_dslite zone_map zone_464xlat zone soltimeout fakeroutes sourcefilter keep_ra_dnslifetime ra_holdoff + json_for_each_item proto_dhcpv6_add_prefix ip6prefix ip6prefixes # Configure local opts="" @@ -51,6 +61,8 @@ proto_dhcpv6_setup() { [ -n "$clientid" ] && append opts "-c$clientid" + [ "$defaultreqopts" = "0" ] && append opts "-R" + [ "$noslaaconly" = "1" ] && append opts "-S" [ "$forceprefix" = "1" ] && append opts "-F" @@ -67,13 +79,16 @@ proto_dhcpv6_setup() { [ -n "$ra_holdoff" ] && append opts "-m$ra_holdoff" + local opt for opt in $reqopts; do append opts "-r$opt" done + json_for_each_item proto_dhcpv6_add_sendopts sendopts opts + append opts "-t${soltimeout:-120}" - [ -n "$ip6prefix" ] && proto_export "USERPREFIX=$ip6prefix" + [ -n "$ip6prefixes" ] && proto_export "USERPREFIX=$ip6prefixes" [ -n "$iface_dslite" ] && proto_export "IFACE_DSLITE=$iface_dslite" [ -n "$iface_map" ] && proto_export "IFACE_MAP=$iface_map" [ -n "$iface_464xlat" ] && proto_export "IFACE_464XLAT=$iface_464xlat" diff --git a/package/network/services/authsae/Makefile b/package/network/services/authsae/Makefile deleted file mode 100644 index fd0e82ffd..000000000 --- a/package/network/services/authsae/Makefile +++ /dev/null @@ -1,46 +0,0 @@ - -# Copyright (C) 2007-2013 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -include $(TOPDIR)/rules.mk - -PKG_NAME:=authsae -PKG_RELEASE:=1 - -PKG_SOURCE_PROTO:=git -PKG_SOURCE_URL:=https://github.com/cozybit/authsae.git -PKG_SOURCE_DATE:=2014-06-09 -PKG_SOURCE_VERSION:=8531ab158910a525d4bcbb3ad02c08342f6987f2 -PKG_MIRROR_HASH:=a8fbed9eada17c552c70d834ee8f7c1e0987df59839bc113b3ec000500696715 - -PKG_BUILD_PARALLEL:=1 -CMAKE_INSTALL:=1 - -CMAKE_OPTIONS += -DSYSCONF_INSTALL_DIR=/etc - -PKG_MAINTAINER:=Felix Fietkau -PKG_LICENSE:=BSD-4-Clause - -include $(INCLUDE_DIR)/package.mk -include $(INCLUDE_DIR)/cmake.mk - -define Package/authsae - SECTION:=net - CATEGORY:=Network - TITLE:=80211s mesh security - DEPENDS:=+libopenssl +libconfig +libnl-tiny +@OPENSSL_WITH_EC -endef - -TARGET_CFLAGS += -D_GNU_SOURCE - -define Package/authsae/install - $(INSTALL_DIR) $(1)/usr/bin - $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/* $(1)/usr/bin - $(INSTALL_DIR) $(1)/lib/wifi - $(INSTALL_DATA) ./files/lib/wifi/authsae.sh $(1)/lib/wifi/ -endef - -$(eval $(call BuildPackage,authsae)) diff --git a/package/network/services/authsae/files/lib/wifi/authsae.sh b/package/network/services/authsae/files/lib/wifi/authsae.sh deleted file mode 100644 index 75be48e47..000000000 --- a/package/network/services/authsae/files/lib/wifi/authsae.sh +++ /dev/null @@ -1,65 +0,0 @@ -authsae_start_interface() { - local mcast_rate - local mesh_htmode - local mesh_band - local authsae_conf_file="/var/run/authsae-$ifname.cfg" - local ret=1 - - json_get_vars mcast_rate mesh_id - set_default mcast_rate "12000" - - case "$htmode" in - HT20|HT40+|HT40-) mesh_htmode="$htmode";; - *) mesh_htmode="none";; - esac - - case "$hwmode" in - *g*) mesh_band=11g;; - *a*) mesh_band=11a;; - esac - - if [ "$mcast_rate" -gt 1000 ]; then - # authsae only allows integers as rates and not things like 5.5 - mcval=$(($mcast_rate / 1000)) - else - # compat: to still support mbit/s rates - mcval="$mcast_rate" - fi - - cat > "$authsae_conf_file" </dev/null 2>/dev/null & - authsae_pid="$!" - ret="$?" - - echo $authsae_pid > /var/run/authsae-$ifname.pid - wireless_add_process "$authsae_pid" "/usr/bin/meshd-nl80211" 1 - - [ "$ret" != 0 ] && wireless_setup_vif_failed AUTHSAE_FAILED - return $ret -} diff --git a/package/network/services/authsae/patches/100-musl_fix.patch b/package/network/services/authsae/patches/100-musl_fix.patch deleted file mode 100644 index 19d2d9b72..000000000 --- a/package/network/services/authsae/patches/100-musl_fix.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/linux/mon.c -+++ b/linux/mon.c -@@ -44,7 +44,6 @@ - #include - #include - #include --#include - #include - #include - #include ---- a/linux/meshd.c -+++ b/linux/meshd.c -@@ -44,7 +44,6 @@ - #include - #include - #include --#include - #include - #include - #include diff --git a/package/network/services/dnsmasq/Makefile b/package/network/services/dnsmasq/Makefile index 79c228aff..8e5df169a 100644 --- a/package/network/services/dnsmasq/Makefile +++ b/package/network/services/dnsmasq/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=dnsmasq -PKG_VERSION:=2.78 -PKG_RELEASE:=7 +PKG_VERSION:=2.79 +PKG_RELEASE:=3 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=http://thekelleys.org.uk/dnsmasq/ -PKG_HASH:=89949f438c74b0c7543f06689c319484bd126cc4b1f8c745c742ab397681252b +PKG_HASH:=78ad74f5ca14fd85a8bac93f764cd9d60b27579e90eabd3687ca7b030e67861f PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=COPYING diff --git a/package/network/services/dnsmasq/files/dnsmasq.init b/package/network/services/dnsmasq/files/dnsmasq.init index dcc18e34d..1881b2bcd 100644 --- a/package/network/services/dnsmasq/files/dnsmasq.init +++ b/package/network/services/dnsmasq/files/dnsmasq.init @@ -1027,7 +1027,7 @@ dnsmasq_start() dnsmasq_stop() { - local cfg="$1" + local cfg="$1" resolvfile config_get resolvfile "$cfg" "resolvfile" diff --git a/package/network/services/dnsmasq/files/dnsmasqsec.hotplug b/package/network/services/dnsmasq/files/dnsmasqsec.hotplug index a155eb0f6..781d53373 100644 --- a/package/network/services/dnsmasq/files/dnsmasqsec.hotplug +++ b/package/network/services/dnsmasq/files/dnsmasqsec.hotplug @@ -9,6 +9,6 @@ TIMEVALIDFILE="/var/state/dnsmasqsec" [ -f "$TIMEVALIDFILE" ] || { echo "ntpd says time is valid" >$TIMEVALIDFILE /etc/init.d/dnsmasq enabled && { - procd_send_signal dnsmasq + procd_send_signal dnsmasq '*' INT } } diff --git a/package/network/services/dnsmasq/files/rfc6761.conf b/package/network/services/dnsmasq/files/rfc6761.conf index ebc1a1211..e9f649252 100644 --- a/package/network/services/dnsmasq/files/rfc6761.conf +++ b/package/network/services/dnsmasq/files/rfc6761.conf @@ -4,10 +4,6 @@ # to reduce burden on them, asking questions that they won't know the answer to. server=/bind/ -server=/example/ -server=/example.com/ -server=/example.org/ -server=/example.net/ server=/invalid/ server=/local/ server=/localhost/ diff --git a/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch b/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch index 2f854d490..be1195abb 100644 --- a/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch +++ b/package/network/services/dnsmasq/patches/210-dnssec-improve-timestamp-heuristic.patch @@ -10,7 +10,7 @@ Signed-off-by: Steven Barth --- a/src/dnssec.c +++ b/src/dnssec.c -@@ -462,17 +462,24 @@ static time_t timestamp_time; +@@ -143,17 +143,24 @@ static time_t timestamp_time; int setup_timestamp(void) { struct stat statbuf; @@ -36,7 +36,7 @@ Signed-off-by: Steven Barth { /* time already OK, update timestamp, and do key checking from the start. */ if (utimes(daemon->timestamp_file, NULL) == -1) -@@ -493,7 +500,7 @@ int setup_timestamp(void) +@@ -174,7 +181,7 @@ int setup_timestamp(void) close(fd); diff --git a/package/network/services/dnsmasq/patches/240-ubus.patch b/package/network/services/dnsmasq/patches/240-ubus.patch index d21ca0dba..415c7a5e4 100644 --- a/package/network/services/dnsmasq/patches/240-ubus.patch +++ b/package/network/services/dnsmasq/patches/240-ubus.patch @@ -74,7 +74,7 @@ int main (int argc, char **argv) { int bind_fallback = 0; -@@ -911,6 +971,7 @@ int main (int argc, char **argv) +@@ -928,6 +988,7 @@ int main (int argc, char **argv) set_dbus_listeners(); #endif @@ -82,7 +82,7 @@ #ifdef HAVE_DHCP if (daemon->dhcp || daemon->relay4) { -@@ -1041,6 +1102,8 @@ int main (int argc, char **argv) +@@ -1058,6 +1119,8 @@ int main (int argc, char **argv) check_dbus_listeners(); #endif @@ -104,7 +104,7 @@ mostly_clean : --- a/src/dnsmasq.h +++ b/src/dnsmasq.h -@@ -1397,6 +1397,8 @@ void emit_dbus_signal(int action, struct +@@ -1415,6 +1415,8 @@ void emit_dbus_signal(int action, struct # endif #endif diff --git a/package/network/services/dnsmasq/patches/250-Fix-infinite-retries-in-strict-order-mode.patch b/package/network/services/dnsmasq/patches/250-Fix-infinite-retries-in-strict-order-mode.patch deleted file mode 100644 index faff680e0..000000000 --- a/package/network/services/dnsmasq/patches/250-Fix-infinite-retries-in-strict-order-mode.patch +++ /dev/null @@ -1,45 +0,0 @@ -From ef3d137a646fa8309e1ff5184e3e145eef40cc4d Mon Sep 17 00:00:00 2001 -From: Simon Kelley -Date: Tue, 5 Dec 2017 22:37:29 +0000 -Subject: [PATCH] Fix infinite retries in strict-order mode. - - If all configured dns servers return refused in - response to a query; dnsmasq will end up in an infinite loop - retransmitting the dns query resulting into high CPU load. - Problem is caused by the dns refuse retransmission logic which does - not check for the end of a dns server list iteration in strict mode. - Having one configured dns server returning a refused reply easily - triggers this problem in strict order mode. This was introduced in - 9396752c115b3ab733fa476b30da73237e12e7ba - - Thanks to Hans Dedecker for spotting this - and the initial patch. ---- - src/forward.c | 14 ++++++++++++-- - 1 file changed, 12 insertions(+), 2 deletions(-) - ---- a/src/forward.c -+++ b/src/forward.c -@@ -797,10 +797,20 @@ void reply_query(int fd, int family, tim - unsigned char *pheader; - size_t plen; - int is_sign; -- -+ -+ /* In strict order mode, there must be a server later in the chain -+ left to send to, otherwise without the forwardall mechanism, -+ code further on will cycle around the list forwever if they -+ all return REFUSED. Note that server is always non-NULL before -+ this executes. */ -+ if (option_bool(OPT_ORDER)) -+ for (server = forward->sentto->next; server; server = server->next) -+ if (!(server->flags & (SERV_LITERAL_ADDRESS | SERV_HAS_DOMAIN | SERV_FOR_NODOTS | SERV_NO_ADDR | SERV_LOOP))) -+ break; -+ - /* recreate query from reply */ - pheader = find_pseudoheader(header, (size_t)n, &plen, NULL, &is_sign, NULL); -- if (!is_sign) -+ if (!is_sign && server) - { - header->ancount = htons(0); - header->nscount = htons(0); diff --git a/package/network/services/dropbear/files/dropbear.init b/package/network/services/dropbear/files/dropbear.init index 3d8cb2ca5..222511349 100755 --- a/package/network/services/dropbear/files/dropbear.init +++ b/package/network/services/dropbear/files/dropbear.init @@ -42,6 +42,7 @@ validate_section_dropbear() 'SSHKeepAlive:uinteger:300' \ 'IdleTimeout:uinteger:0' \ 'MaxAuthTries:uinteger:3' \ + 'RecvWindowSize:uinteger:0' \ 'mdns:bool:1' } @@ -50,7 +51,7 @@ dropbear_instance() local PasswordAuth enable Interface GatewayPorts \ RootPasswordAuth RootLogin rsakeyfile \ BannerFile Port SSHKeepAlive IdleTimeout \ - MaxAuthTries mdns ipaddrs + MaxAuthTries RecvWindowSize mdns ipaddrs validate_section_dropbear "${1}" || { echo "validation failed" @@ -80,6 +81,8 @@ dropbear_instance() [ "${IdleTimeout}" -ne 0 ] && procd_append_param command -I "${IdleTimeout}" [ "${SSHKeepAlive}" -ne 0 ] && procd_append_param command -K "${SSHKeepAlive}" [ "${MaxAuthTries}" -ne 0 ] && procd_append_param command -T "${MaxAuthTries}" + [ "${RecvWindowSize}" -gt 0 -a "${RecvWindowSize}" -le 1048576 ] && \ + procd_append_param command -W "${RecvWindowSize}" [ "${mdns}" -ne 0 ] && procd_add_mdns "ssh" "tcp" "$Port" "daemon=dropbear" procd_set_param respawn procd_close_instance diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile index 51f169293..fef0fa8e5 100644 --- a/package/network/services/hostapd/Makefile +++ b/package/network/services/hostapd/Makefile @@ -7,13 +7,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=hostapd -PKG_RELEASE:=6 +PKG_RELEASE:=3 PKG_SOURCE_URL:=http://w1.fi/hostap.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2017-08-24 -PKG_SOURCE_VERSION:=c2d4f2eb5dba0b5c5a8c5805823084da958a9b52 -PKG_MIRROR_HASH:=c6ad9a73fc1ae0ba8bc48f71cf14394b274bc9c2c1d1b53c2775f08312597e74 +PKG_SOURCE_DATE:=2018-04-09 +PKG_SOURCE_VERSION:=fa617ee6a0b2d39e6372c93ef9437caa3bd9065a +PKG_MIRROR_HASH:=5e6f20153c3405ac905f89fea8a614a57e9ba19583b2de2777179381a74aa7b1 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=BSD-3-Clause diff --git a/package/network/services/hostapd/files/hostapd-full.config b/package/network/services/hostapd/files/hostapd-full.config index fe627676d..786afad2b 100644 --- a/package/network/services/hostapd/files/hostapd-full.config +++ b/package/network/services/hostapd/files/hostapd-full.config @@ -153,7 +153,7 @@ CONFIG_IEEE80211N=y # Wireless Network Management (IEEE Std 802.11v-2011) # Note: This is experimental and not complete implementation. -#CONFIG_WNM=y +CONFIG_WNM=y # IEEE 802.11ac (Very High Throughput) support CONFIG_IEEE80211AC=y diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh index 36aee85f1..d3633a2a5 100644 --- a/package/network/services/hostapd/files/hostapd.sh +++ b/package/network/services/hostapd/files/hostapd.sh @@ -172,6 +172,7 @@ hostapd_common_add_bss_config() { config_add_string nasid config_add_string ownip + config_add_string radius_client_addr config_add_string iapp_interface config_add_string eap_type ca_cert client_cert identity anonymous_identity auth priv_key priv_key_pwd config_add_string ieee80211w_mgmt_cipher @@ -188,6 +189,10 @@ hostapd_common_add_bss_config() { config_add_int wps_ap_setup_locked wps_independent config_add_string wps_device_type wps_device_name wps_manufacturer wps_pin + config_add_boolean ieee80211v wnm_sleep_mode bss_transition + config_add_int time_advertisement + config_add_string time_zone + config_add_boolean ieee80211r pmk_r1_push ft_psk_generate_local ft_over_ds config_add_int r0_key_lifetime reassociation_deadline config_add_string mobility_domain r1_key_holder @@ -305,7 +310,7 @@ hostapd_set_bss_options() { json_get_vars \ auth_server auth_secret auth_port \ dae_client dae_secret dae_port \ - ownip \ + ownip radius_client_addr \ eap_reauth_period # radius can provide VLAN ID for clients @@ -332,6 +337,7 @@ hostapd_set_bss_options() { } [ -n "$ownip" ] && append bss_conf "own_ip_addr=$ownip" "$N" + [ -n "$radius_client_addr" ] && append bss_conf "radius_client_addr=$radius_client_addr" "$N" append bss_conf "eapol_key_index_workaround=1" "$N" append bss_conf "ieee8021x=1" "$N" @@ -391,6 +397,21 @@ hostapd_set_bss_options() { append bss_conf "iapp_interface=$ifname" "$N" } + json_get_vars ieee80211v + set_default ieee80211v 0 + if [ "$ieee80211v" -eq "1" ]; then + json_get_vars time_advertisement time_zone wnm_sleep_mode bss_transition + + set_default time_advertisement 0 + set_default wnm_sleep_mode 0 + set_default bss_transition 0 + + append bss_conf "time_advertisement=$time_advertisement" "$N" + [ -n "$time_zone" ] && append bss_conf "time_zone=$time_zone" "$N" + append bss_conf "wnm_sleep_mode=$wnm_sleep_mode" "$N" + append bss_conf "bss_transition=$bss_transition" "$N" + fi + if [ "$wpa" -ge "1" ]; then json_get_vars ieee80211r set_default ieee80211r 0 @@ -626,6 +647,7 @@ wpa_supplicant_add_network() { local ifname="$1" local freq="$2" local htmode="$3" + local noscan="$4" _wpa_supplicant_common "$1" wireless_vif_parse_encryption @@ -655,11 +677,13 @@ wpa_supplicant_add_network() { } [[ "$_w_mode" = "mesh" ]] && { - json_get_vars mesh_id + json_get_vars mesh_id mesh_fwding ssid="${mesh_id}" append network_data "mode=5" "$N$T" + [ -n "$mesh_fwding" ] && append network_data "mesh_fwding=${mesh_fwding}" "$N$T" [ -n "$channel" ] && wpa_supplicant_set_fixed_freq "$freq" "$htmode" + [ "$noscan" = "1" ] && append network_data "noscan=1" "$N$T" append wpa_key_mgmt "SAE" scan_ssid="" } @@ -685,7 +709,11 @@ wpa_supplicant_add_network() { if [ ${#key} -eq 64 ]; then passphrase="psk=${key}" else - passphrase="psk=\"${key}\"" + if [ "$_w_mode" = "mesh" ]; then + passphrase="sae_password=\"${key}\"" + else + passphrase="psk=\"${key}\"" + fi fi append network_data "$passphrase" "$N$T" ;; diff --git a/package/network/services/hostapd/files/wpa_supplicant-full.config b/package/network/services/hostapd/files/wpa_supplicant-full.config index 81fa8f539..c22e1cca5 100644 --- a/package/network/services/hostapd/files/wpa_supplicant-full.config +++ b/package/network/services/hostapd/files/wpa_supplicant-full.config @@ -465,7 +465,7 @@ CONFIG_NO_RANDOM_POOL=y # Wireless Network Management (IEEE Std 802.11v-2011) # Note: This is experimental and not complete implementation. -#CONFIG_WNM=y +CONFIG_WNM=y # Interworking (IEEE 802.11u) # This can be used to enable functionality to improve interworking with diff --git a/package/network/services/hostapd/patches/000-hostapd-Avoid-key-reinstallation-in-FT-handshake.patch b/package/network/services/hostapd/patches/000-hostapd-Avoid-key-reinstallation-in-FT-handshake.patch deleted file mode 100644 index 14b2d7c71..000000000 --- a/package/network/services/hostapd/patches/000-hostapd-Avoid-key-reinstallation-in-FT-handshake.patch +++ /dev/null @@ -1,154 +0,0 @@ -From: Mathy Vanhoef -Date: Fri, 14 Jul 2017 15:15:35 +0200 -Subject: [PATCH] hostapd: Avoid key reinstallation in FT handshake - -Do not reinstall TK to the driver during Reassociation Response frame -processing if the first attempt of setting the TK succeeded. This avoids -issues related to clearing the TX/RX PN that could result in reusing -same PN values for transmitted frames (e.g., due to CCM nonce reuse and -also hitting replay protection on the receiver) and accepting replayed -frames on RX side. - -This issue was introduced by the commit -0e84c25434e6a1f283c7b4e62e483729085b78d2 ('FT: Fix PTK configuration in -authenticator') which allowed wpa_ft_install_ptk() to be called multiple -times with the same PTK. While the second configuration attempt is -needed with some drivers, it must be done only if the first attempt -failed. - -Signed-off-by: Mathy Vanhoef ---- - ---- a/src/ap/ieee802_11.c -+++ b/src/ap/ieee802_11.c -@@ -2522,6 +2522,7 @@ static int add_associated_sta(struct hos - { - struct ieee80211_ht_capabilities ht_cap; - struct ieee80211_vht_capabilities vht_cap; -+ int set = 1; - - /* - * Remove the STA entry to ensure the STA PS state gets cleared and -@@ -2529,9 +2530,18 @@ static int add_associated_sta(struct hos - * FT-over-the-DS, where a station re-associates back to the same AP but - * skips the authentication flow, or if working with a driver that - * does not support full AP client state. -+ * -+ * Skip this if the STA has already completed FT reassociation and the -+ * TK has been configured since the TX/RX PN must not be reset to 0 for -+ * the same key. - */ -- if (!sta->added_unassoc) -+ if (!sta->added_unassoc && -+ (!(sta->flags & WLAN_STA_AUTHORIZED) || -+ !wpa_auth_sta_ft_tk_already_set(sta->wpa_sm))) { - hostapd_drv_sta_remove(hapd, sta->addr); -+ wpa_auth_sm_event(sta->wpa_sm, WPA_DRV_STA_REMOVED); -+ set = 0; -+ } - - #ifdef CONFIG_IEEE80211N - if (sta->flags & WLAN_STA_HT) -@@ -2554,11 +2564,11 @@ static int add_associated_sta(struct hos - sta->flags & WLAN_STA_VHT ? &vht_cap : NULL, - sta->flags | WLAN_STA_ASSOC, sta->qosinfo, - sta->vht_opmode, sta->p2p_ie ? 1 : 0, -- sta->added_unassoc)) { -+ set)) { - hostapd_logger(hapd, sta->addr, - HOSTAPD_MODULE_IEEE80211, HOSTAPD_LEVEL_NOTICE, - "Could not %s STA to kernel driver", -- sta->added_unassoc ? "set" : "add"); -+ set ? "set" : "add"); - - if (sta->added_unassoc) { - hostapd_drv_sta_remove(hapd, sta->addr); ---- a/src/ap/wpa_auth.c -+++ b/src/ap/wpa_auth.c -@@ -1783,6 +1783,9 @@ int wpa_auth_sm_event(struct wpa_state_m - #else /* CONFIG_FILS */ - break; - #endif /* CONFIG_FILS */ -+ case WPA_DRV_STA_REMOVED: -+ sm->tk_already_set = FALSE; -+ return 0; - } - - #ifdef CONFIG_IEEE80211R_AP -@@ -3922,6 +3925,14 @@ int wpa_auth_sta_wpa_version(struct wpa_ - } - - -+int wpa_auth_sta_ft_tk_already_set(struct wpa_state_machine *sm) -+{ -+ if (!sm || !wpa_key_mgmt_ft(sm->wpa_key_mgmt)) -+ return 0; -+ return sm->tk_already_set; -+} -+ -+ - int wpa_auth_sta_clear_pmksa(struct wpa_state_machine *sm, - struct rsn_pmksa_cache_entry *entry) - { ---- a/src/ap/wpa_auth.h -+++ b/src/ap/wpa_auth.h -@@ -300,7 +300,7 @@ void wpa_receive(struct wpa_authenticato - u8 *data, size_t data_len); - enum wpa_event { - WPA_AUTH, WPA_ASSOC, WPA_DISASSOC, WPA_DEAUTH, WPA_REAUTH, -- WPA_REAUTH_EAPOL, WPA_ASSOC_FT, WPA_ASSOC_FILS -+ WPA_REAUTH_EAPOL, WPA_ASSOC_FT, WPA_ASSOC_FILS, WPA_DRV_STA_REMOVED - }; - void wpa_remove_ptk(struct wpa_state_machine *sm); - int wpa_auth_sm_event(struct wpa_state_machine *sm, enum wpa_event event); -@@ -313,6 +313,7 @@ int wpa_auth_pairwise_set(struct wpa_sta - int wpa_auth_get_pairwise(struct wpa_state_machine *sm); - int wpa_auth_sta_key_mgmt(struct wpa_state_machine *sm); - int wpa_auth_sta_wpa_version(struct wpa_state_machine *sm); -+int wpa_auth_sta_ft_tk_already_set(struct wpa_state_machine *sm); - int wpa_auth_sta_clear_pmksa(struct wpa_state_machine *sm, - struct rsn_pmksa_cache_entry *entry); - struct rsn_pmksa_cache_entry * ---- a/src/ap/wpa_auth_ft.c -+++ b/src/ap/wpa_auth_ft.c -@@ -1937,6 +1937,14 @@ void wpa_ft_install_ptk(struct wpa_state - return; - } - -+ if (sm->tk_already_set) { -+ /* Must avoid TK reconfiguration to prevent clearing of TX/RX -+ * PN in the driver */ -+ wpa_printf(MSG_DEBUG, -+ "FT: Do not re-install same PTK to the driver"); -+ return; -+ } -+ - /* FIX: add STA entry to kernel/driver here? The set_key will fail - * most likely without this.. At the moment, STA entry is added only - * after association has been completed. This function will be called -@@ -1949,6 +1957,7 @@ void wpa_ft_install_ptk(struct wpa_state - - /* FIX: MLME-SetProtection.Request(TA, Tx_Rx) */ - sm->pairwise_set = TRUE; -+ sm->tk_already_set = TRUE; - } - - -@@ -2152,6 +2161,7 @@ static int wpa_ft_process_auth_req(struc - - sm->pairwise = pairwise; - sm->PTK_valid = TRUE; -+ sm->tk_already_set = FALSE; - wpa_ft_install_ptk(sm); - - buflen = 2 + sizeof(struct rsn_mdie) + 2 + sizeof(struct rsn_ftie) + ---- a/src/ap/wpa_auth_i.h -+++ b/src/ap/wpa_auth_i.h -@@ -61,6 +61,7 @@ struct wpa_state_machine { - struct wpa_ptk PTK; - Boolean PTK_valid; - Boolean pairwise_set; -+ Boolean tk_already_set; - int keycount; - Boolean Pair; - struct wpa_key_replay_counter { diff --git a/package/network/services/hostapd/patches/001-Prevent-reinstallation-of-an-already-in-use-group-ke.patch b/package/network/services/hostapd/patches/001-Prevent-reinstallation-of-an-already-in-use-group-ke.patch deleted file mode 100644 index b283bf887..000000000 --- a/package/network/services/hostapd/patches/001-Prevent-reinstallation-of-an-already-in-use-group-ke.patch +++ /dev/null @@ -1,244 +0,0 @@ -From: Mathy Vanhoef -Date: Wed, 12 Jul 2017 16:03:24 +0200 -Subject: [PATCH] Prevent reinstallation of an already in-use group key - -Track the current GTK and IGTK that is in use and when receiving a -(possibly retransmitted) Group Message 1 or WNM-Sleep Mode Response, do -not install the given key if it is already in use. This prevents an -attacker from trying to trick the client into resetting or lowering the -sequence counter associated to the group key. - -Signed-off-by: Mathy Vanhoef ---- - ---- a/src/common/wpa_common.h -+++ b/src/common/wpa_common.h -@@ -218,6 +218,17 @@ struct wpa_ptk { - size_t tk_len; - }; - -+struct wpa_gtk { -+ u8 gtk[WPA_GTK_MAX_LEN]; -+ size_t gtk_len; -+}; -+ -+#ifdef CONFIG_IEEE80211W -+struct wpa_igtk { -+ u8 igtk[WPA_IGTK_MAX_LEN]; -+ size_t igtk_len; -+}; -+#endif /* CONFIG_IEEE80211W */ - - /* WPA IE version 1 - * 00-50-f2:1 (OUI:OUI type) ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -800,6 +800,15 @@ static int wpa_supplicant_install_gtk(st - const u8 *_gtk = gd->gtk; - u8 gtk_buf[32]; - -+ /* Detect possible key reinstallation */ -+ if (sm->gtk.gtk_len == (size_t) gd->gtk_len && -+ os_memcmp(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len) == 0) { -+ wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, -+ "WPA: Not reinstalling already in-use GTK to the driver (keyidx=%d tx=%d len=%d)", -+ gd->keyidx, gd->tx, gd->gtk_len); -+ return 0; -+ } -+ - wpa_hexdump_key(MSG_DEBUG, "WPA: Group Key", gd->gtk, gd->gtk_len); - wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, - "WPA: Installing GTK to the driver (keyidx=%d tx=%d len=%d)", -@@ -834,6 +843,9 @@ static int wpa_supplicant_install_gtk(st - } - os_memset(gtk_buf, 0, sizeof(gtk_buf)); - -+ sm->gtk.gtk_len = gd->gtk_len; -+ os_memcpy(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len); -+ - return 0; - } - -@@ -940,6 +952,48 @@ static int wpa_supplicant_pairwise_gtk(s - } - - -+#ifdef CONFIG_IEEE80211W -+static int wpa_supplicant_install_igtk(struct wpa_sm *sm, -+ const struct wpa_igtk_kde *igtk) -+{ -+ size_t len = wpa_cipher_key_len(sm->mgmt_group_cipher); -+ u16 keyidx = WPA_GET_LE16(igtk->keyid); -+ -+ /* Detect possible key reinstallation */ -+ if (sm->igtk.igtk_len == len && -+ os_memcmp(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len) == 0) { -+ wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, -+ "WPA: Not reinstalling already in-use IGTK to the driver (keyidx=%d)", -+ keyidx); -+ return 0; -+ } -+ -+ wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, -+ "WPA: IGTK keyid %d pn %02x%02x%02x%02x%02x%02x", -+ keyidx, MAC2STR(igtk->pn)); -+ wpa_hexdump_key(MSG_DEBUG, "WPA: IGTK", igtk->igtk, len); -+ if (keyidx > 4095) { -+ wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, -+ "WPA: Invalid IGTK KeyID %d", keyidx); -+ return -1; -+ } -+ if (wpa_sm_set_key(sm, wpa_cipher_to_alg(sm->mgmt_group_cipher), -+ broadcast_ether_addr, -+ keyidx, 0, igtk->pn, sizeof(igtk->pn), -+ igtk->igtk, len) < 0) { -+ wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, -+ "WPA: Failed to configure IGTK to the driver"); -+ return -1; -+ } -+ -+ sm->igtk.igtk_len = len; -+ os_memcpy(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len); -+ -+ return 0; -+} -+#endif /* CONFIG_IEEE80211W */ -+ -+ - static int ieee80211w_set_keys(struct wpa_sm *sm, - struct wpa_eapol_ie_parse *ie) - { -@@ -950,30 +1004,14 @@ static int ieee80211w_set_keys(struct wp - if (ie->igtk) { - size_t len; - const struct wpa_igtk_kde *igtk; -- u16 keyidx; -+ - len = wpa_cipher_key_len(sm->mgmt_group_cipher); - if (ie->igtk_len != WPA_IGTK_KDE_PREFIX_LEN + len) - return -1; -+ - igtk = (const struct wpa_igtk_kde *) ie->igtk; -- keyidx = WPA_GET_LE16(igtk->keyid); -- wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, "WPA: IGTK keyid %d " -- "pn %02x%02x%02x%02x%02x%02x", -- keyidx, MAC2STR(igtk->pn)); -- wpa_hexdump_key(MSG_DEBUG, "WPA: IGTK", -- igtk->igtk, len); -- if (keyidx > 4095) { -- wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, -- "WPA: Invalid IGTK KeyID %d", keyidx); -+ if (wpa_supplicant_install_igtk(sm, igtk) < 0) - return -1; -- } -- if (wpa_sm_set_key(sm, wpa_cipher_to_alg(sm->mgmt_group_cipher), -- broadcast_ether_addr, -- keyidx, 0, igtk->pn, sizeof(igtk->pn), -- igtk->igtk, len) < 0) { -- wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, -- "WPA: Failed to configure IGTK to the driver"); -- return -1; -- } - } - - return 0; -@@ -2491,7 +2529,7 @@ void wpa_sm_deinit(struct wpa_sm *sm) - */ - void wpa_sm_notify_assoc(struct wpa_sm *sm, const u8 *bssid) - { -- int clear_ptk = 1; -+ int clear_keys = 1; - - if (sm == NULL) - return; -@@ -2517,7 +2555,7 @@ void wpa_sm_notify_assoc(struct wpa_sm * - /* Prepare for the next transition */ - wpa_ft_prepare_auth_request(sm, NULL); - -- clear_ptk = 0; -+ clear_keys = 0; - } - #endif /* CONFIG_IEEE80211R */ - #ifdef CONFIG_FILS -@@ -2527,11 +2565,11 @@ void wpa_sm_notify_assoc(struct wpa_sm * - * AUTHENTICATED state to get the EAPOL port Authorized. - */ - wpa_supplicant_key_neg_complete(sm, sm->bssid, 1); -- clear_ptk = 0; -+ clear_keys = 0; - } - #endif /* CONFIG_FILS */ - -- if (clear_ptk) { -+ if (clear_keys) { - /* - * IEEE 802.11, 8.4.10: Delete PTK SA on (re)association if - * this is not part of a Fast BSS Transition. -@@ -2541,6 +2579,10 @@ void wpa_sm_notify_assoc(struct wpa_sm * - os_memset(&sm->ptk, 0, sizeof(sm->ptk)); - sm->tptk_set = 0; - os_memset(&sm->tptk, 0, sizeof(sm->tptk)); -+ os_memset(&sm->gtk, 0, sizeof(sm->gtk)); -+#ifdef CONFIG_IEEE80211W -+ os_memset(&sm->igtk, 0, sizeof(sm->igtk)); -+#endif /* CONFIG_IEEE80211W */ - } - - #ifdef CONFIG_TDLS -@@ -3117,6 +3159,10 @@ void wpa_sm_drop_sa(struct wpa_sm *sm) - os_memset(sm->pmk, 0, sizeof(sm->pmk)); - os_memset(&sm->ptk, 0, sizeof(sm->ptk)); - os_memset(&sm->tptk, 0, sizeof(sm->tptk)); -+ os_memset(&sm->gtk, 0, sizeof(sm->gtk)); -+#ifdef CONFIG_IEEE80211W -+ os_memset(&sm->igtk, 0, sizeof(sm->igtk)); -+#endif /* CONFIG_IEEE80211W */ - #ifdef CONFIG_IEEE80211R - os_memset(sm->xxkey, 0, sizeof(sm->xxkey)); - os_memset(sm->pmk_r0, 0, sizeof(sm->pmk_r0)); -@@ -3189,29 +3235,11 @@ int wpa_wnmsleep_install_key(struct wpa_ - os_memset(&gd, 0, sizeof(gd)); - #ifdef CONFIG_IEEE80211W - } else if (subelem_id == WNM_SLEEP_SUBELEM_IGTK) { -- struct wpa_igtk_kde igd; -- u16 keyidx; -+ const struct wpa_igtk_kde *igtk; - -- os_memset(&igd, 0, sizeof(igd)); -- keylen = wpa_cipher_key_len(sm->mgmt_group_cipher); -- os_memcpy(igd.keyid, buf + 2, 2); -- os_memcpy(igd.pn, buf + 4, 6); -- -- keyidx = WPA_GET_LE16(igd.keyid); -- os_memcpy(igd.igtk, buf + 10, keylen); -- -- wpa_hexdump_key(MSG_DEBUG, "Install IGTK (WNM SLEEP)", -- igd.igtk, keylen); -- if (wpa_sm_set_key(sm, wpa_cipher_to_alg(sm->mgmt_group_cipher), -- broadcast_ether_addr, -- keyidx, 0, igd.pn, sizeof(igd.pn), -- igd.igtk, keylen) < 0) { -- wpa_printf(MSG_DEBUG, "Failed to install the IGTK in " -- "WNM mode"); -- os_memset(&igd, 0, sizeof(igd)); -+ igtk = (const struct wpa_igtk_kde *) (buf + 2); -+ if (wpa_supplicant_install_igtk(sm, igtk) < 0) - return -1; -- } -- os_memset(&igd, 0, sizeof(igd)); - #endif /* CONFIG_IEEE80211W */ - } else { - wpa_printf(MSG_DEBUG, "Unknown element id"); ---- a/src/rsn_supp/wpa_i.h -+++ b/src/rsn_supp/wpa_i.h -@@ -31,6 +31,10 @@ struct wpa_sm { - u8 rx_replay_counter[WPA_REPLAY_COUNTER_LEN]; - int rx_replay_counter_set; - u8 request_counter[WPA_REPLAY_COUNTER_LEN]; -+ struct wpa_gtk gtk; -+#ifdef CONFIG_IEEE80211W -+ struct wpa_igtk igtk; -+#endif /* CONFIG_IEEE80211W */ - - struct eapol_sm *eapol; /* EAPOL state machine from upper level code */ - diff --git a/package/network/services/hostapd/patches/002-Extend-protection-of-GTK-IGTK-reinstallation-of-WNM-.patch b/package/network/services/hostapd/patches/002-Extend-protection-of-GTK-IGTK-reinstallation-of-WNM-.patch deleted file mode 100644 index 2093d25e9..000000000 --- a/package/network/services/hostapd/patches/002-Extend-protection-of-GTK-IGTK-reinstallation-of-WNM-.patch +++ /dev/null @@ -1,182 +0,0 @@ -From: Jouni Malinen -Date: Sun, 1 Oct 2017 12:12:24 +0300 -Subject: [PATCH] Extend protection of GTK/IGTK reinstallation of WNM-Sleep - Mode cases - -This extends the protection to track last configured GTK/IGTK value -separately from EAPOL-Key frames and WNM-Sleep Mode frames to cover a -corner case where these two different mechanisms may get used when the -GTK/IGTK has changed and tracking a single value is not sufficient to -detect a possible key reconfiguration. - -Signed-off-by: Jouni Malinen ---- - ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -795,14 +795,17 @@ struct wpa_gtk_data { - - static int wpa_supplicant_install_gtk(struct wpa_sm *sm, - const struct wpa_gtk_data *gd, -- const u8 *key_rsc) -+ const u8 *key_rsc, int wnm_sleep) - { - const u8 *_gtk = gd->gtk; - u8 gtk_buf[32]; - - /* Detect possible key reinstallation */ -- if (sm->gtk.gtk_len == (size_t) gd->gtk_len && -- os_memcmp(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len) == 0) { -+ if ((sm->gtk.gtk_len == (size_t) gd->gtk_len && -+ os_memcmp(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len) == 0) || -+ (sm->gtk_wnm_sleep.gtk_len == (size_t) gd->gtk_len && -+ os_memcmp(sm->gtk_wnm_sleep.gtk, gd->gtk, -+ sm->gtk_wnm_sleep.gtk_len) == 0)) { - wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, - "WPA: Not reinstalling already in-use GTK to the driver (keyidx=%d tx=%d len=%d)", - gd->keyidx, gd->tx, gd->gtk_len); -@@ -843,8 +846,14 @@ static int wpa_supplicant_install_gtk(st - } - os_memset(gtk_buf, 0, sizeof(gtk_buf)); - -- sm->gtk.gtk_len = gd->gtk_len; -- os_memcpy(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len); -+ if (wnm_sleep) { -+ sm->gtk_wnm_sleep.gtk_len = gd->gtk_len; -+ os_memcpy(sm->gtk_wnm_sleep.gtk, gd->gtk, -+ sm->gtk_wnm_sleep.gtk_len); -+ } else { -+ sm->gtk.gtk_len = gd->gtk_len; -+ os_memcpy(sm->gtk.gtk, gd->gtk, sm->gtk.gtk_len); -+ } - - return 0; - } -@@ -938,7 +947,7 @@ static int wpa_supplicant_pairwise_gtk(s - (wpa_supplicant_check_group_cipher(sm, sm->group_cipher, - gtk_len, gtk_len, - &gd.key_rsc_len, &gd.alg) || -- wpa_supplicant_install_gtk(sm, &gd, key_rsc))) { -+ wpa_supplicant_install_gtk(sm, &gd, key_rsc, 0))) { - wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, - "RSN: Failed to install GTK"); - os_memset(&gd, 0, sizeof(gd)); -@@ -954,14 +963,18 @@ static int wpa_supplicant_pairwise_gtk(s - - #ifdef CONFIG_IEEE80211W - static int wpa_supplicant_install_igtk(struct wpa_sm *sm, -- const struct wpa_igtk_kde *igtk) -+ const struct wpa_igtk_kde *igtk, -+ int wnm_sleep) - { - size_t len = wpa_cipher_key_len(sm->mgmt_group_cipher); - u16 keyidx = WPA_GET_LE16(igtk->keyid); - - /* Detect possible key reinstallation */ -- if (sm->igtk.igtk_len == len && -- os_memcmp(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len) == 0) { -+ if ((sm->igtk.igtk_len == len && -+ os_memcmp(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len) == 0) || -+ (sm->igtk_wnm_sleep.igtk_len == len && -+ os_memcmp(sm->igtk_wnm_sleep.igtk, igtk->igtk, -+ sm->igtk_wnm_sleep.igtk_len) == 0)) { - wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, - "WPA: Not reinstalling already in-use IGTK to the driver (keyidx=%d)", - keyidx); -@@ -986,8 +999,14 @@ static int wpa_supplicant_install_igtk(s - return -1; - } - -- sm->igtk.igtk_len = len; -- os_memcpy(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len); -+ if (wnm_sleep) { -+ sm->igtk_wnm_sleep.igtk_len = len; -+ os_memcpy(sm->igtk_wnm_sleep.igtk, igtk->igtk, -+ sm->igtk_wnm_sleep.igtk_len); -+ } else { -+ sm->igtk.igtk_len = len; -+ os_memcpy(sm->igtk.igtk, igtk->igtk, sm->igtk.igtk_len); -+ } - - return 0; - } -@@ -1010,7 +1029,7 @@ static int ieee80211w_set_keys(struct wp - return -1; - - igtk = (const struct wpa_igtk_kde *) ie->igtk; -- if (wpa_supplicant_install_igtk(sm, igtk) < 0) -+ if (wpa_supplicant_install_igtk(sm, igtk, 0) < 0) - return -1; - } - -@@ -1659,7 +1678,7 @@ static void wpa_supplicant_process_1_of_ - if (wpa_supplicant_rsc_relaxation(sm, key->key_rsc)) - key_rsc = null_rsc; - -- if (wpa_supplicant_install_gtk(sm, &gd, key_rsc) || -+ if (wpa_supplicant_install_gtk(sm, &gd, key_rsc, 0) || - wpa_supplicant_send_2_of_2(sm, key, ver, key_info) < 0) - goto failed; - os_memset(&gd, 0, sizeof(gd)); -@@ -2580,8 +2599,10 @@ void wpa_sm_notify_assoc(struct wpa_sm * - sm->tptk_set = 0; - os_memset(&sm->tptk, 0, sizeof(sm->tptk)); - os_memset(&sm->gtk, 0, sizeof(sm->gtk)); -+ os_memset(&sm->gtk_wnm_sleep, 0, sizeof(sm->gtk_wnm_sleep)); - #ifdef CONFIG_IEEE80211W - os_memset(&sm->igtk, 0, sizeof(sm->igtk)); -+ os_memset(&sm->igtk_wnm_sleep, 0, sizeof(sm->igtk_wnm_sleep)); - #endif /* CONFIG_IEEE80211W */ - } - -@@ -3160,8 +3181,10 @@ void wpa_sm_drop_sa(struct wpa_sm *sm) - os_memset(&sm->ptk, 0, sizeof(sm->ptk)); - os_memset(&sm->tptk, 0, sizeof(sm->tptk)); - os_memset(&sm->gtk, 0, sizeof(sm->gtk)); -+ os_memset(&sm->gtk_wnm_sleep, 0, sizeof(sm->gtk_wnm_sleep)); - #ifdef CONFIG_IEEE80211W - os_memset(&sm->igtk, 0, sizeof(sm->igtk)); -+ os_memset(&sm->igtk_wnm_sleep, 0, sizeof(sm->igtk_wnm_sleep)); - #endif /* CONFIG_IEEE80211W */ - #ifdef CONFIG_IEEE80211R - os_memset(sm->xxkey, 0, sizeof(sm->xxkey)); -@@ -3226,7 +3249,7 @@ int wpa_wnmsleep_install_key(struct wpa_ - - wpa_hexdump_key(MSG_DEBUG, "Install GTK (WNM SLEEP)", - gd.gtk, gd.gtk_len); -- if (wpa_supplicant_install_gtk(sm, &gd, key_rsc)) { -+ if (wpa_supplicant_install_gtk(sm, &gd, key_rsc, 1)) { - os_memset(&gd, 0, sizeof(gd)); - wpa_printf(MSG_DEBUG, "Failed to install the GTK in " - "WNM mode"); -@@ -3238,7 +3261,7 @@ int wpa_wnmsleep_install_key(struct wpa_ - const struct wpa_igtk_kde *igtk; - - igtk = (const struct wpa_igtk_kde *) (buf + 2); -- if (wpa_supplicant_install_igtk(sm, igtk) < 0) -+ if (wpa_supplicant_install_igtk(sm, igtk, 1) < 0) - return -1; - #endif /* CONFIG_IEEE80211W */ - } else { -@@ -4121,7 +4144,7 @@ int fils_process_assoc_resp(struct wpa_s - os_memcpy(gd.gtk, kde.gtk + 2, kde.gtk_len - 2); - - wpa_printf(MSG_DEBUG, "FILS: Set GTK to driver"); -- if (wpa_supplicant_install_gtk(sm, &gd, elems.key_delivery) < 0) { -+ if (wpa_supplicant_install_gtk(sm, &gd, elems.key_delivery, 0) < 0) { - wpa_printf(MSG_DEBUG, "FILS: Failed to set GTK"); - goto fail; - } ---- a/src/rsn_supp/wpa_i.h -+++ b/src/rsn_supp/wpa_i.h -@@ -32,8 +32,10 @@ struct wpa_sm { - int rx_replay_counter_set; - u8 request_counter[WPA_REPLAY_COUNTER_LEN]; - struct wpa_gtk gtk; -+ struct wpa_gtk gtk_wnm_sleep; - #ifdef CONFIG_IEEE80211W - struct wpa_igtk igtk; -+ struct wpa_igtk igtk_wnm_sleep; - #endif /* CONFIG_IEEE80211W */ - - struct eapol_sm *eapol; /* EAPOL state machine from upper level code */ diff --git a/package/network/services/hostapd/patches/003-Prevent-installation-of-an-all-zero-TK.patch b/package/network/services/hostapd/patches/003-Prevent-installation-of-an-all-zero-TK.patch deleted file mode 100644 index 30679e25c..000000000 --- a/package/network/services/hostapd/patches/003-Prevent-installation-of-an-all-zero-TK.patch +++ /dev/null @@ -1,73 +0,0 @@ -From: Mathy Vanhoef -Date: Fri, 29 Sep 2017 04:22:51 +0200 -Subject: [PATCH] Prevent installation of an all-zero TK - -Properly track whether a PTK has already been installed to the driver -and the TK part cleared from memory. This prevents an attacker from -trying to trick the client into installing an all-zero TK. - -This fixes the earlier fix in commit -ad00d64e7d8827b3cebd665a0ceb08adabf15e1e ('Fix TK configuration to the -driver in EAPOL-Key 3/4 retry case') which did not take into account -possibility of an extra message 1/4 showing up between retries of -message 3/4. - -Signed-off-by: Mathy Vanhoef ---- - ---- a/src/common/wpa_common.h -+++ b/src/common/wpa_common.h -@@ -216,6 +216,7 @@ struct wpa_ptk { - size_t kck_len; - size_t kek_len; - size_t tk_len; -+ int installed; /* 1 if key has already been installed to driver */ - }; - - struct wpa_gtk { ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -594,7 +594,6 @@ static void wpa_supplicant_process_1_of_ - os_memset(buf, 0, sizeof(buf)); - } - sm->tptk_set = 1; -- sm->tk_to_set = 1; - - kde = sm->assoc_wpa_ie; - kde_len = sm->assoc_wpa_ie_len; -@@ -701,7 +700,7 @@ static int wpa_supplicant_install_ptk(st - enum wpa_alg alg; - const u8 *key_rsc; - -- if (!sm->tk_to_set) { -+ if (sm->ptk.installed) { - wpa_dbg(sm->ctx->msg_ctx, MSG_DEBUG, - "WPA: Do not re-install same PTK to the driver"); - return 0; -@@ -745,7 +744,7 @@ static int wpa_supplicant_install_ptk(st - - /* TK is not needed anymore in supplicant */ - os_memset(sm->ptk.tk, 0, WPA_TK_MAX_LEN); -- sm->tk_to_set = 0; -+ sm->ptk.installed = 1; - - if (sm->wpa_ptk_rekey) { - eloop_cancel_timeout(wpa_sm_rekey_ptk, sm, NULL); -@@ -4172,6 +4171,7 @@ int fils_process_assoc_resp(struct wpa_s - * takes care of association frame encryption/decryption. */ - /* TK is not needed anymore in supplicant */ - os_memset(sm->ptk.tk, 0, WPA_TK_MAX_LEN); -+ sm->ptk.installed = 1; - - /* FILS HLP Container */ - fils_process_hlp_container(sm, ie_start, end - ie_start); ---- a/src/rsn_supp/wpa_i.h -+++ b/src/rsn_supp/wpa_i.h -@@ -24,7 +24,6 @@ struct wpa_sm { - struct wpa_ptk ptk, tptk; - int ptk_set, tptk_set; - unsigned int msg_3_of_4_ok:1; -- unsigned int tk_to_set:1; - u8 snonce[WPA_NONCE_LEN]; - u8 anonce[WPA_NONCE_LEN]; /* ANonce from the last 1/4 msg */ - int renew_snonce; diff --git a/package/network/services/hostapd/patches/004-Fix-PTK-rekeying-to-generate-a-new-ANonce.patch b/package/network/services/hostapd/patches/004-Fix-PTK-rekeying-to-generate-a-new-ANonce.patch deleted file mode 100644 index 6f28e7431..000000000 --- a/package/network/services/hostapd/patches/004-Fix-PTK-rekeying-to-generate-a-new-ANonce.patch +++ /dev/null @@ -1,56 +0,0 @@ -From: Jouni Malinen -Date: Sun, 1 Oct 2017 12:32:57 +0300 -Subject: [PATCH] Fix PTK rekeying to generate a new ANonce - -The Authenticator state machine path for PTK rekeying ended up bypassing -the AUTHENTICATION2 state where a new ANonce is generated when going -directly to the PTKSTART state since there is no need to try to -determine the PMK again in such a case. This is far from ideal since the -new PTK would depend on a new nonce only from the supplicant. - -Fix this by generating a new ANonce when moving to the PTKSTART state -for the purpose of starting new 4-way handshake to rekey PTK. - -Signed-off-by: Jouni Malinen ---- - ---- a/src/ap/wpa_auth.c -+++ b/src/ap/wpa_auth.c -@@ -1951,6 +1951,21 @@ SM_STATE(WPA_PTK, AUTHENTICATION2) - } - - -+static int wpa_auth_sm_ptk_update(struct wpa_state_machine *sm) -+{ -+ if (random_get_bytes(sm->ANonce, WPA_NONCE_LEN)) { -+ wpa_printf(MSG_ERROR, -+ "WPA: Failed to get random data for ANonce"); -+ sm->Disconnect = TRUE; -+ return -1; -+ } -+ wpa_hexdump(MSG_DEBUG, "WPA: Assign new ANonce", sm->ANonce, -+ WPA_NONCE_LEN); -+ sm->TimeoutCtr = 0; -+ return 0; -+} -+ -+ - SM_STATE(WPA_PTK, INITPMK) - { - u8 msk[2 * PMK_LEN]; -@@ -3116,9 +3131,12 @@ SM_STEP(WPA_PTK) - SM_ENTER(WPA_PTK, AUTHENTICATION); - else if (sm->ReAuthenticationRequest) - SM_ENTER(WPA_PTK, AUTHENTICATION2); -- else if (sm->PTKRequest) -- SM_ENTER(WPA_PTK, PTKSTART); -- else switch (sm->wpa_ptk_state) { -+ else if (sm->PTKRequest) { -+ if (wpa_auth_sm_ptk_update(sm) < 0) -+ SM_ENTER(WPA_PTK, DISCONNECTED); -+ else -+ SM_ENTER(WPA_PTK, PTKSTART); -+ } else switch (sm->wpa_ptk_state) { - case WPA_PTK_INITIALIZE: - break; - case WPA_PTK_DISCONNECT: diff --git a/package/network/services/hostapd/patches/005-TDLS-Reject-TPK-TK-reconfiguration.patch b/package/network/services/hostapd/patches/005-TDLS-Reject-TPK-TK-reconfiguration.patch deleted file mode 100644 index 2ca05dd64..000000000 --- a/package/network/services/hostapd/patches/005-TDLS-Reject-TPK-TK-reconfiguration.patch +++ /dev/null @@ -1,124 +0,0 @@ -From: Jouni Malinen -Date: Fri, 22 Sep 2017 11:03:15 +0300 -Subject: [PATCH] TDLS: Reject TPK-TK reconfiguration - -Do not try to reconfigure the same TPK-TK to the driver after it has -been successfully configured. This is an explicit check to avoid issues -related to resetting the TX/RX packet number. There was already a check -for this for TPK M2 (retries of that message are ignored completely), so -that behavior does not get modified. - -For TPK M3, the TPK-TK could have been reconfigured, but that was -followed by immediate teardown of the link due to an issue in updating -the STA entry. Furthermore, for TDLS with any real security (i.e., -ignoring open/WEP), the TPK message exchange is protected on the AP path -and simple replay attacks are not feasible. - -As an additional corner case, make sure the local nonce gets updated if -the peer uses a very unlikely "random nonce" of all zeros. - -Signed-off-by: Jouni Malinen ---- - ---- a/src/rsn_supp/tdls.c -+++ b/src/rsn_supp/tdls.c -@@ -112,6 +112,7 @@ struct wpa_tdls_peer { - u8 tk[16]; /* TPK-TK; assuming only CCMP will be used */ - } tpk; - int tpk_set; -+ int tk_set; /* TPK-TK configured to the driver */ - int tpk_success; - int tpk_in_progress; - -@@ -192,6 +193,20 @@ static int wpa_tdls_set_key(struct wpa_s - u8 rsc[6]; - enum wpa_alg alg; - -+ if (peer->tk_set) { -+ /* -+ * This same TPK-TK has already been configured to the driver -+ * and this new configuration attempt (likely due to an -+ * unexpected retransmitted frame) would result in clearing -+ * the TX/RX sequence number which can break security, so must -+ * not allow that to happen. -+ */ -+ wpa_printf(MSG_INFO, "TDLS: TPK-TK for the peer " MACSTR -+ " has already been configured to the driver - do not reconfigure", -+ MAC2STR(peer->addr)); -+ return -1; -+ } -+ - os_memset(rsc, 0, 6); - - switch (peer->cipher) { -@@ -209,12 +224,15 @@ static int wpa_tdls_set_key(struct wpa_s - return -1; - } - -+ wpa_printf(MSG_DEBUG, "TDLS: Configure pairwise key for peer " MACSTR, -+ MAC2STR(peer->addr)); - if (wpa_sm_set_key(sm, alg, peer->addr, -1, 1, - rsc, sizeof(rsc), peer->tpk.tk, key_len) < 0) { - wpa_printf(MSG_WARNING, "TDLS: Failed to set TPK to the " - "driver"); - return -1; - } -+ peer->tk_set = 1; - return 0; - } - -@@ -695,7 +713,7 @@ static void wpa_tdls_peer_clear(struct w - peer->cipher = 0; - peer->qos_info = 0; - peer->wmm_capable = 0; -- peer->tpk_set = peer->tpk_success = 0; -+ peer->tk_set = peer->tpk_set = peer->tpk_success = 0; - peer->chan_switch_enabled = 0; - os_memset(&peer->tpk, 0, sizeof(peer->tpk)); - os_memset(peer->inonce, 0, WPA_NONCE_LEN); -@@ -1158,6 +1176,7 @@ skip_rsnie: - wpa_tdls_peer_free(sm, peer); - return -1; - } -+ peer->tk_set = 0; /* A new nonce results in a new TK */ - wpa_hexdump(MSG_DEBUG, "TDLS: Initiator Nonce for TPK handshake", - peer->inonce, WPA_NONCE_LEN); - os_memcpy(ftie->Snonce, peer->inonce, WPA_NONCE_LEN); -@@ -1751,6 +1770,19 @@ static int wpa_tdls_addset_peer(struct w - } - - -+static int tdls_nonce_set(const u8 *nonce) -+{ -+ int i; -+ -+ for (i = 0; i < WPA_NONCE_LEN; i++) { -+ if (nonce[i]) -+ return 1; -+ } -+ -+ return 0; -+} -+ -+ - static int wpa_tdls_process_tpk_m1(struct wpa_sm *sm, const u8 *src_addr, - const u8 *buf, size_t len) - { -@@ -2004,7 +2036,8 @@ skip_rsn: - peer->rsnie_i_len = kde.rsn_ie_len; - peer->cipher = cipher; - -- if (os_memcmp(peer->inonce, ftie->Snonce, WPA_NONCE_LEN) != 0) { -+ if (os_memcmp(peer->inonce, ftie->Snonce, WPA_NONCE_LEN) != 0 || -+ !tdls_nonce_set(peer->inonce)) { - /* - * There is no point in updating the RNonce for every obtained - * TPK M1 frame (e.g., retransmission due to timeout) with the -@@ -2020,6 +2053,7 @@ skip_rsn: - "TDLS: Failed to get random data for responder nonce"); - goto error; - } -+ peer->tk_set = 0; /* A new nonce results in a new TK */ - } - - #if 0 diff --git a/package/network/services/hostapd/patches/006-WNM-Ignore-WNM-Sleep-Mode-Response-without-pending-r.patch b/package/network/services/hostapd/patches/006-WNM-Ignore-WNM-Sleep-Mode-Response-without-pending-r.patch deleted file mode 100644 index 13d78b8cb..000000000 --- a/package/network/services/hostapd/patches/006-WNM-Ignore-WNM-Sleep-Mode-Response-without-pending-r.patch +++ /dev/null @@ -1,35 +0,0 @@ -From: Jouni Malinen -Date: Fri, 22 Sep 2017 11:25:02 +0300 -Subject: [PATCH] WNM: Ignore WNM-Sleep Mode Response without pending - request - -Commit 03ed0a52393710be6bdae657d1b36efa146520e5 ('WNM: Ignore WNM-Sleep -Mode Response if WNM-Sleep Mode has not been used') started ignoring the -response when no WNM-Sleep Mode Request had been used during the -association. This can be made tighter by clearing the used flag when -successfully processing a response. This adds an additional layer of -protection against unexpected retransmissions of the response frame. - -Signed-off-by: Jouni Malinen ---- - ---- a/wpa_supplicant/wnm_sta.c -+++ b/wpa_supplicant/wnm_sta.c -@@ -260,7 +260,7 @@ static void ieee802_11_rx_wnmsleep_resp( - - if (!wpa_s->wnmsleep_used) { - wpa_printf(MSG_DEBUG, -- "WNM: Ignore WNM-Sleep Mode Response frame since WNM-Sleep Mode has not been used in this association"); -+ "WNM: Ignore WNM-Sleep Mode Response frame since WNM-Sleep Mode operation has not been requested"); - return; - } - -@@ -299,6 +299,8 @@ static void ieee802_11_rx_wnmsleep_resp( - return; - } - -+ wpa_s->wnmsleep_used = 0; -+ - if (wnmsleep_ie->status == WNM_STATUS_SLEEP_ACCEPT || - wnmsleep_ie->status == WNM_STATUS_SLEEP_EXIT_ACCEPT_GTK_UPDATE) { - wpa_printf(MSG_DEBUG, "Successfully recv WNM-Sleep Response " diff --git a/package/network/services/hostapd/patches/007-FT-Do-not-allow-multiple-Reassociation-Response-fram.patch b/package/network/services/hostapd/patches/007-FT-Do-not-allow-multiple-Reassociation-Response-fram.patch deleted file mode 100644 index 7712ce519..000000000 --- a/package/network/services/hostapd/patches/007-FT-Do-not-allow-multiple-Reassociation-Response-fram.patch +++ /dev/null @@ -1,68 +0,0 @@ -From: Jouni Malinen -Date: Fri, 22 Sep 2017 12:06:37 +0300 -Subject: [PATCH] FT: Do not allow multiple Reassociation Response frames - -The driver is expected to not report a second association event without -the station having explicitly request a new association. As such, this -case should not be reachable. However, since reconfiguring the same -pairwise or group keys to the driver could result in nonce reuse issues, -be extra careful here and do an additional state check to avoid this -even if the local driver ends up somehow accepting an unexpected -Reassociation Response frame. - -Signed-off-by: Jouni Malinen ---- - ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -2637,6 +2637,9 @@ void wpa_sm_notify_disassoc(struct wpa_s - #ifdef CONFIG_FILS - sm->fils_completed = 0; - #endif /* CONFIG_FILS */ -+#ifdef CONFIG_IEEE80211R -+ sm->ft_reassoc_completed = 0; -+#endif /* CONFIG_IEEE80211R */ - - /* Keys are not needed in the WPA state machine anymore */ - wpa_sm_drop_sa(sm); ---- a/src/rsn_supp/wpa_ft.c -+++ b/src/rsn_supp/wpa_ft.c -@@ -153,6 +153,7 @@ static u8 * wpa_ft_gen_req_ies(struct wp - u16 capab; - - sm->ft_completed = 0; -+ sm->ft_reassoc_completed = 0; - - buf_len = 2 + sizeof(struct rsn_mdie) + 2 + sizeof(struct rsn_ftie) + - 2 + sm->r0kh_id_len + ric_ies_len + 100; -@@ -687,6 +688,11 @@ int wpa_ft_validate_reassoc_resp(struct - return -1; - } - -+ if (sm->ft_reassoc_completed) { -+ wpa_printf(MSG_DEBUG, "FT: Reassociation has already been completed for this FT protocol instance - ignore unexpected retransmission"); -+ return 0; -+ } -+ - if (wpa_ft_parse_ies(ies, ies_len, &parse) < 0) { - wpa_printf(MSG_DEBUG, "FT: Failed to parse IEs"); - return -1; -@@ -787,6 +793,8 @@ int wpa_ft_validate_reassoc_resp(struct - return -1; - } - -+ sm->ft_reassoc_completed = 1; -+ - if (wpa_ft_process_gtk_subelem(sm, parse.gtk, parse.gtk_len) < 0) - return -1; - ---- a/src/rsn_supp/wpa_i.h -+++ b/src/rsn_supp/wpa_i.h -@@ -128,6 +128,7 @@ struct wpa_sm { - size_t r0kh_id_len; - u8 r1kh_id[FT_R1KH_ID_LEN]; - int ft_completed; -+ int ft_reassoc_completed; - int over_the_ds_in_progress; - u8 target_ap[ETH_ALEN]; /* over-the-DS target AP */ - int set_ptk_after_assoc; diff --git a/package/network/services/hostapd/patches/008-WPA-Extra-defense-against-PTK-reinstalls-in-4-way-ha.patch b/package/network/services/hostapd/patches/008-WPA-Extra-defense-against-PTK-reinstalls-in-4-way-ha.patch deleted file mode 100644 index 40f6b5696..000000000 --- a/package/network/services/hostapd/patches/008-WPA-Extra-defense-against-PTK-reinstalls-in-4-way-ha.patch +++ /dev/null @@ -1,34 +0,0 @@ -From a00e946c1c9a1f9cc65c72900d2a444ceb1f872e Mon Sep 17 00:00:00 2001 -From: Mathy Vanhoef -Date: Thu, 5 Oct 2017 23:53:01 +0200 -Subject: [PATCH] WPA: Extra defense against PTK reinstalls in 4-way handshake - -Currently, reinstallations of the PTK are prevented by (1) assuring the -same TPTK is only set once as the PTK, and (2) that one particular PTK -is only installed once. This patch makes it more explicit that point (1) -is required to prevent key reinstallations. At the same time, this patch -hardens wpa_supplicant such that future changes do not accidentally -break this property. - -Signed-off-by: Mathy Vanhoef ---- - src/rsn_supp/wpa.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -1728,6 +1728,14 @@ static int wpa_supplicant_verify_eapol_k - sm->ptk_set = 1; - os_memcpy(&sm->ptk, &sm->tptk, sizeof(sm->ptk)); - os_memset(&sm->tptk, 0, sizeof(sm->tptk)); -+ /* -+ * This assures the same TPTK in sm->tptk can never be -+ * copied twice to sm->pkt as the new PTK. In -+ * combination with the installed flag in the wpa_ptk -+ * struct, this assures the same PTK is only installed -+ * once. -+ */ -+ sm->renew_snonce = 1; - } - } - diff --git a/package/network/services/hostapd/patches/009-Clear-PMK-length-and-check-for-this-when-deriving-PT.patch b/package/network/services/hostapd/patches/009-Clear-PMK-length-and-check-for-this-when-deriving-PT.patch deleted file mode 100644 index ed7d79ec1..000000000 --- a/package/network/services/hostapd/patches/009-Clear-PMK-length-and-check-for-this-when-deriving-PT.patch +++ /dev/null @@ -1,53 +0,0 @@ -From b488a12948751f57871f09baa345e59b23959a41 Mon Sep 17 00:00:00 2001 -From: Jouni Malinen -Date: Sun, 8 Oct 2017 13:18:02 +0300 -Subject: [PATCH] Clear PMK length and check for this when deriving PTK - -Instead of setting the default PMK length for the cleared PMK, set the -length to 0 and explicitly check for this when deriving PTK to avoid -unexpected key derivation with an all-zeroes key should it be possible -to somehow trigger PTK derivation to happen before PMK derivation. - -Signed-off-by: Jouni Malinen ---- - src/common/wpa_common.c | 5 +++++ - src/rsn_supp/wpa.c | 7 ++++--- - 2 files changed, 9 insertions(+), 3 deletions(-) - ---- a/src/common/wpa_common.c -+++ b/src/common/wpa_common.c -@@ -225,6 +225,11 @@ int wpa_pmk_to_ptk(const u8 *pmk, size_t - u8 tmp[WPA_KCK_MAX_LEN + WPA_KEK_MAX_LEN + WPA_TK_MAX_LEN]; - size_t ptk_len; - -+ if (pmk_len == 0) { -+ wpa_printf(MSG_ERROR, "WPA: No PMK set for PT derivation"); -+ return -1; -+ } -+ - if (os_memcmp(addr1, addr2, ETH_ALEN) < 0) { - os_memcpy(data, addr1, ETH_ALEN); - os_memcpy(data + ETH_ALEN, addr2, ETH_ALEN); ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -584,7 +584,8 @@ static void wpa_supplicant_process_1_of_ - /* Calculate PTK which will be stored as a temporary PTK until it has - * been verified when processing message 3/4. */ - ptk = &sm->tptk; -- wpa_derive_ptk(sm, src_addr, key, ptk); -+ if (wpa_derive_ptk(sm, src_addr, key, ptk) < 0) -+ goto failed; - if (sm->pairwise_cipher == WPA_CIPHER_TKIP) { - u8 buf[8]; - /* Supplicant: swap tx/rx Mic keys */ -@@ -2705,8 +2706,8 @@ void wpa_sm_set_pmk_from_pmksa(struct wp - sm->pmk_len = sm->cur_pmksa->pmk_len; - os_memcpy(sm->pmk, sm->cur_pmksa->pmk, sm->pmk_len); - } else { -- sm->pmk_len = PMK_LEN; -- os_memset(sm->pmk, 0, PMK_LEN); -+ sm->pmk_len = 0; -+ os_memset(sm->pmk, 0, PMK_LEN_MAX); - } - } - diff --git a/package/network/services/hostapd/patches/010-Optional-AP-side-workaround-for-key-reinstallation-a.patch b/package/network/services/hostapd/patches/010-Optional-AP-side-workaround-for-key-reinstallation-a.patch deleted file mode 100644 index 19165cce2..000000000 --- a/package/network/services/hostapd/patches/010-Optional-AP-side-workaround-for-key-reinstallation-a.patch +++ /dev/null @@ -1,221 +0,0 @@ -From 6f234c1e2ee1ede29f2412b7012b3345ed8e52d3 Mon Sep 17 00:00:00 2001 -From: Jouni Malinen -Date: Mon, 16 Oct 2017 18:37:43 +0300 -Subject: [PATCH] Optional AP side workaround for key reinstallation attacks - -This adds a new hostapd configuration parameter -wpa_disable_eapol_key_retries=1 that can be used to disable -retransmission of EAPOL-Key frames that are used to install -keys (EAPOL-Key message 3/4 and group message 1/2). This is -similar to setting wpa_group_update_count=1 and -wpa_pairwise_update_count=1, but with no impact to message 1/4 -retries and with extended timeout for messages 4/4 and group -message 2/2 to avoid causing issues with stations that may use -aggressive power saving have very long time in replying to the -EAPOL-Key messages. - -This option can be used to work around key reinstallation attacks -on the station (supplicant) side in cases those station devices -cannot be updated for some reason. By removing the -retransmissions the attacker cannot cause key reinstallation with -a delayed frame transmission. This is related to the station side -vulnerabilities CVE-2017-13077, CVE-2017-13078, CVE-2017-13079, -CVE-2017-13080, and CVE-2017-13081. - -This workaround might cause interoperability issues and reduced -robustness of key negotiation especially in environments with -heavy traffic load due to the number of attempts to perform the -key exchange is reduced significantly. As such, this workaround -is disabled by default (unless overridden in build -configuration). To enable this, set the parameter to 1. - -It is also possible to enable this in the build by default by -adding the following to the build configuration: - -CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1 - -Signed-off-by: Jouni Malinen ---- - hostapd/config_file.c | 2 ++ - hostapd/defconfig | 4 ++++ - hostapd/hostapd.conf | 24 ++++++++++++++++++++++++ - src/ap/ap_config.c | 6 ++++++ - src/ap/ap_config.h | 1 + - src/ap/wpa_auth.c | 22 ++++++++++++++++++++-- - src/ap/wpa_auth.h | 1 + - src/ap/wpa_auth_glue.c | 2 ++ - 8 files changed, 60 insertions(+), 2 deletions(-) - ---- a/hostapd/config_file.c -+++ b/hostapd/config_file.c -@@ -2542,6 +2542,8 @@ static int hostapd_config_fill(struct ho - return 1; - } - bss->wpa_pairwise_update_count = (u32) val; -+ } else if (os_strcmp(buf, "wpa_disable_eapol_key_retries") == 0) { -+ bss->wpa_disable_eapol_key_retries = atoi(pos); - } else if (os_strcmp(buf, "wpa_passphrase") == 0) { - int len = os_strlen(pos); - if (len < 8 || len > 63) { ---- a/hostapd/defconfig -+++ b/hostapd/defconfig -@@ -372,3 +372,7 @@ CONFIG_IPV6=y - # Opportunistic Wireless Encryption (OWE) - # Experimental implementation of draft-harkins-owe-07.txt - #CONFIG_OWE=y -+ -+# Override default value for the wpa_disable_eapol_key_retries configuration -+# parameter. See that parameter in hostapd.conf for more details. -+#CFLAGS += -DDEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES=1 ---- a/hostapd/hostapd.conf -+++ b/hostapd/hostapd.conf -@@ -1315,6 +1315,30 @@ own_ip_addr=127.0.0.1 - # Range 1..4294967295; default: 4 - #wpa_pairwise_update_count=4 - -+# Workaround for key reinstallation attacks -+# -+# This parameter can be used to disable retransmission of EAPOL-Key frames that -+# are used to install keys (EAPOL-Key message 3/4 and group message 1/2). This -+# is similar to setting wpa_group_update_count=1 and -+# wpa_pairwise_update_count=1, but with no impact to message 1/4 and with -+# extended timeout on the response to avoid causing issues with stations that -+# may use aggressive power saving have very long time in replying to the -+# EAPOL-Key messages. -+# -+# This option can be used to work around key reinstallation attacks on the -+# station (supplicant) side in cases those station devices cannot be updated -+# for some reason. By removing the retransmissions the attacker cannot cause -+# key reinstallation with a delayed frame transmission. This is related to the -+# station side vulnerabilities CVE-2017-13077, CVE-2017-13078, CVE-2017-13079, -+# CVE-2017-13080, and CVE-2017-13081. -+# -+# This workaround might cause interoperability issues and reduced robustness of -+# key negotiation especially in environments with heavy traffic load due to the -+# number of attempts to perform the key exchange is reduced significantly. As -+# such, this workaround is disabled by default (unless overridden in build -+# configuration). To enable this, set the parameter to 1. -+#wpa_disable_eapol_key_retries=1 -+ - # Enable IEEE 802.11i/RSN/WPA2 pre-authentication. This is used to speed up - # roaming be pre-authenticating IEEE 802.1X/EAP part of the full RSN - # authentication and key handshake before actually associating with a new AP. ---- a/src/ap/ap_config.c -+++ b/src/ap/ap_config.c -@@ -37,6 +37,10 @@ static void hostapd_config_free_vlan(str - } - - -+#ifndef DEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES -+#define DEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES 0 -+#endif /* DEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES */ -+ - void hostapd_config_defaults_bss(struct hostapd_bss_config *bss) - { - dl_list_init(&bss->anqp_elem); -@@ -58,6 +62,8 @@ void hostapd_config_defaults_bss(struct - bss->wpa_gmk_rekey = 86400; - bss->wpa_group_update_count = 4; - bss->wpa_pairwise_update_count = 4; -+ bss->wpa_disable_eapol_key_retries = -+ DEFAULT_WPA_DISABLE_EAPOL_KEY_RETRIES; - bss->wpa_key_mgmt = WPA_KEY_MGMT_PSK; - bss->wpa_pairwise = WPA_CIPHER_TKIP; - bss->wpa_group = WPA_CIPHER_TKIP; ---- a/src/ap/ap_config.h -+++ b/src/ap/ap_config.h -@@ -333,6 +333,7 @@ struct hostapd_bss_config { - int wpa_ptk_rekey; - u32 wpa_group_update_count; - u32 wpa_pairwise_update_count; -+ int wpa_disable_eapol_key_retries; - int rsn_pairwise; - int rsn_preauth; - char *rsn_preauth_interfaces; ---- a/src/ap/wpa_auth.c -+++ b/src/ap/wpa_auth.c -@@ -65,6 +65,7 @@ static u8 * ieee80211w_kde_add(struct wp - static const u32 eapol_key_timeout_first = 100; /* ms */ - static const u32 eapol_key_timeout_subseq = 1000; /* ms */ - static const u32 eapol_key_timeout_first_group = 500; /* ms */ -+static const u32 eapol_key_timeout_no_retrans = 4000; /* ms */ - - /* TODO: make these configurable */ - static const int dot11RSNAConfigPMKLifetime = 43200; -@@ -1653,6 +1654,9 @@ static void wpa_send_eapol(struct wpa_au - eapol_key_timeout_first_group; - else - timeout_ms = eapol_key_timeout_subseq; -+ if (wpa_auth->conf.wpa_disable_eapol_key_retries && -+ (!pairwise || (key_info & WPA_KEY_INFO_MIC))) -+ timeout_ms = eapol_key_timeout_no_retrans; - if (pairwise && ctr == 1 && !(key_info & WPA_KEY_INFO_MIC)) - sm->pending_1_of_4_timeout = 1; - wpa_printf(MSG_DEBUG, "WPA: Use EAPOL-Key timeout of %u ms (retry " -@@ -2882,6 +2886,11 @@ SM_STATE(WPA_PTK, PTKINITNEGOTIATING) - sm->TimeoutEvt = FALSE; - - sm->TimeoutCtr++; -+ if (sm->wpa_auth->conf.wpa_disable_eapol_key_retries && -+ sm->TimeoutCtr > 1) { -+ /* Do not allow retransmission of EAPOL-Key msg 3/4 */ -+ return; -+ } - if (sm->TimeoutCtr > sm->wpa_auth->conf.wpa_pairwise_update_count) { - /* No point in sending the EAPOL-Key - we will disconnect - * immediately following this. */ -@@ -3220,7 +3229,9 @@ SM_STEP(WPA_PTK) - sm->EAPOLKeyPairwise && sm->MICVerified) - SM_ENTER(WPA_PTK, PTKINITDONE); - else if (sm->TimeoutCtr > -- sm->wpa_auth->conf.wpa_pairwise_update_count) { -+ sm->wpa_auth->conf.wpa_pairwise_update_count || -+ (sm->wpa_auth->conf.wpa_disable_eapol_key_retries && -+ sm->TimeoutCtr > 1)) { - wpa_auth->dot11RSNA4WayHandshakeFailures++; - wpa_auth_vlogger( - sm->wpa_auth, sm->addr, LOGGER_DEBUG, -@@ -3260,6 +3271,11 @@ SM_STATE(WPA_PTK_GROUP, REKEYNEGOTIATING - SM_ENTRY_MA(WPA_PTK_GROUP, REKEYNEGOTIATING, wpa_ptk_group); - - sm->GTimeoutCtr++; -+ if (sm->wpa_auth->conf.wpa_disable_eapol_key_retries && -+ sm->GTimeoutCtr > 1) { -+ /* Do not allow retransmission of EAPOL-Key group msg 1/2 */ -+ return; -+ } - if (sm->GTimeoutCtr > sm->wpa_auth->conf.wpa_group_update_count) { - /* No point in sending the EAPOL-Key - we will disconnect - * immediately following this. */ -@@ -3363,7 +3379,9 @@ SM_STEP(WPA_PTK_GROUP) - !sm->EAPOLKeyPairwise && sm->MICVerified) - SM_ENTER(WPA_PTK_GROUP, REKEYESTABLISHED); - else if (sm->GTimeoutCtr > -- sm->wpa_auth->conf.wpa_group_update_count) -+ sm->wpa_auth->conf.wpa_group_update_count || -+ (sm->wpa_auth->conf.wpa_disable_eapol_key_retries && -+ sm->GTimeoutCtr > 1)) - SM_ENTER(WPA_PTK_GROUP, KEYERROR); - else if (sm->TimeoutEvt) - SM_ENTER(WPA_PTK_GROUP, REKEYNEGOTIATING); ---- a/src/ap/wpa_auth.h -+++ b/src/ap/wpa_auth.h -@@ -165,6 +165,7 @@ struct wpa_auth_config { - int wpa_ptk_rekey; - u32 wpa_group_update_count; - u32 wpa_pairwise_update_count; -+ int wpa_disable_eapol_key_retries; - int rsn_pairwise; - int rsn_preauth; - int eapol_version; ---- a/src/ap/wpa_auth_glue.c -+++ b/src/ap/wpa_auth_glue.c -@@ -45,6 +45,8 @@ static void hostapd_wpa_auth_conf(struct - wconf->wpa_gmk_rekey = conf->wpa_gmk_rekey; - wconf->wpa_ptk_rekey = conf->wpa_ptk_rekey; - wconf->wpa_group_update_count = conf->wpa_group_update_count; -+ wconf->wpa_disable_eapol_key_retries = -+ conf->wpa_disable_eapol_key_retries; - wconf->wpa_pairwise_update_count = conf->wpa_pairwise_update_count; - wconf->rsn_pairwise = conf->rsn_pairwise; - wconf->rsn_preauth = conf->rsn_preauth; diff --git a/package/network/services/hostapd/patches/0101-mesh-factor-out-mesh-join-function.patch b/package/network/services/hostapd/patches/0101-mesh-factor-out-mesh-join-function.patch new file mode 100644 index 000000000..7671d1e96 --- /dev/null +++ b/package/network/services/hostapd/patches/0101-mesh-factor-out-mesh-join-function.patch @@ -0,0 +1,219 @@ +From 91c0f3f6a9ecae3c9106bef8a8606fab0792dd28 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:48:58 -0700 +Subject: [PATCH 01/15] mesh: factor out mesh join function + +mesh join function consitss of 2 parts which are preparing +configurations and sending join event to driver. +Since physical mesh join event could happen either right +after mesh configuration is done or after CAC is done +in case of DFS channel is used, factor out the function +into 2 parts to reduce redundant calls. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 120 ++++++++++++++++-------------- + wpa_supplicant/mesh.h | 1 + + wpa_supplicant/wpa_supplicant_i.h | 1 + + 3 files changed, 68 insertions(+), 54 deletions(-) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -25,6 +25,7 @@ + #include "mesh_mpm.h" + #include "mesh_rsn.h" + #include "mesh.h" ++#include "drivers/driver_nl80211.h" + + + static void wpa_supplicant_mesh_deinit(struct wpa_supplicant *wpa_s) +@@ -359,13 +360,48 @@ void wpa_supplicant_mesh_add_scan_ie(str + } + + ++void wpas_join_mesh(struct wpa_supplicant *wpa_s) ++{ ++ struct wpa_driver_mesh_join_params *params = wpa_s->mesh_params; ++ struct wpa_ssid *ssid = wpa_s->current_ssid; ++ int ret = 0; ++ ++ if (ssid->key_mgmt & WPA_KEY_MGMT_SAE) { ++ wpa_s->pairwise_cipher = wpa_s->mesh_rsn->pairwise_cipher; ++ wpa_s->group_cipher = wpa_s->mesh_rsn->group_cipher; ++ wpa_s->mgmt_group_cipher = wpa_s->mesh_rsn->mgmt_group_cipher; ++ } ++ ++ if (wpa_s->ifmsh) { ++ params->ies = wpa_s->ifmsh->mconf->rsn_ie; ++ params->ie_len = wpa_s->ifmsh->mconf->rsn_ie_len; ++ params->basic_rates = wpa_s->ifmsh->basic_rates; ++ params->conf.flags |= WPA_DRIVER_MESH_CONF_FLAG_HT_OP_MODE; ++ params->conf.ht_opmode = wpa_s->ifmsh->bss[0]->iface->ht_op_mode; ++ } ++ ++ ret = wpa_drv_join_mesh(wpa_s, params); ++ if (ret) ++ wpa_msg(wpa_s, MSG_ERROR, "mesh join error=%d\n", ret); ++ ++ /* hostapd sets the interface down until we associate */ ++ wpa_drv_set_operstate(wpa_s, 1); ++ ++ if (!ret) ++ wpa_supplicant_set_state(wpa_s, WPA_COMPLETED); ++ ++ return; ++} ++ ++ + int wpa_supplicant_join_mesh(struct wpa_supplicant *wpa_s, + struct wpa_ssid *ssid) + { +- struct wpa_driver_mesh_join_params params; ++ struct wpa_driver_mesh_join_params *params = ++ os_zalloc(sizeof(struct wpa_driver_mesh_join_params)); + int ret = 0; + +- if (!ssid || !ssid->ssid || !ssid->ssid_len || !ssid->frequency) { ++ if (!ssid || !ssid->ssid || !ssid->ssid_len || !ssid->frequency || !params) { + ret = -ENOENT; + goto out; + } +@@ -376,22 +412,22 @@ int wpa_supplicant_join_mesh(struct wpa_ + wpa_s->group_cipher = WPA_CIPHER_NONE; + wpa_s->mgmt_group_cipher = 0; + +- os_memset(¶ms, 0, sizeof(params)); +- params.meshid = ssid->ssid; +- params.meshid_len = ssid->ssid_len; +- ibss_mesh_setup_freq(wpa_s, ssid, ¶ms.freq); +- wpa_s->mesh_ht_enabled = !!params.freq.ht_enabled; +- wpa_s->mesh_vht_enabled = !!params.freq.vht_enabled; +- if (params.freq.ht_enabled && params.freq.sec_channel_offset) +- ssid->ht40 = params.freq.sec_channel_offset; ++ params->meshid = ssid->ssid; ++ params->meshid_len = ssid->ssid_len; ++ ibss_mesh_setup_freq(wpa_s, ssid, ¶ms->freq); ++ wpa_s->mesh_ht_enabled = !!params->freq.ht_enabled; ++ wpa_s->mesh_vht_enabled = !!params->freq.vht_enabled; ++ if (params->freq.ht_enabled && params->freq.sec_channel_offset) ++ ssid->ht40 = params->freq.sec_channel_offset; ++ + if (wpa_s->mesh_vht_enabled) { + ssid->vht = 1; +- switch (params.freq.bandwidth) { ++ switch (params->freq.bandwidth) { + case 80: +- if (params.freq.center_freq2) { ++ if (params->freq.center_freq2) { + ssid->max_oper_chwidth = VHT_CHANWIDTH_80P80MHZ; + ssid->vht_center_freq2 = +- params.freq.center_freq2; ++ params->freq.center_freq2; + } else { + ssid->max_oper_chwidth = VHT_CHANWIDTH_80MHZ; + } +@@ -405,67 +441,43 @@ int wpa_supplicant_join_mesh(struct wpa_ + } + } + if (ssid->beacon_int > 0) +- params.beacon_int = ssid->beacon_int; ++ params->beacon_int = ssid->beacon_int; + else if (wpa_s->conf->beacon_int > 0) +- params.beacon_int = wpa_s->conf->beacon_int; ++ params->beacon_int = wpa_s->conf->beacon_int; + if (ssid->dtim_period > 0) +- params.dtim_period = ssid->dtim_period; ++ params->dtim_period = ssid->dtim_period; + else if (wpa_s->conf->dtim_period > 0) +- params.dtim_period = wpa_s->conf->dtim_period; +- params.conf.max_peer_links = wpa_s->conf->max_peer_links; ++ params->dtim_period = wpa_s->conf->dtim_period; ++ params->conf.max_peer_links = wpa_s->conf->max_peer_links; + if (ssid->mesh_rssi_threshold < DEFAULT_MESH_RSSI_THRESHOLD) { +- params.conf.rssi_threshold = ssid->mesh_rssi_threshold; +- params.conf.flags |= WPA_DRIVER_MESH_CONF_FLAG_RSSI_THRESHOLD; ++ params->conf.rssi_threshold = ssid->mesh_rssi_threshold; ++ params->conf.flags |= WPA_DRIVER_MESH_CONF_FLAG_RSSI_THRESHOLD; + } + + if (ssid->key_mgmt & WPA_KEY_MGMT_SAE) { +- params.flags |= WPA_DRIVER_MESH_FLAG_SAE_AUTH; +- params.flags |= WPA_DRIVER_MESH_FLAG_AMPE; ++ params->flags |= WPA_DRIVER_MESH_FLAG_SAE_AUTH; ++ params->flags |= WPA_DRIVER_MESH_FLAG_AMPE; + wpa_s->conf->user_mpm = 1; + } + + if (wpa_s->conf->user_mpm) { +- params.flags |= WPA_DRIVER_MESH_FLAG_USER_MPM; +- params.conf.auto_plinks = 0; ++ params->flags |= WPA_DRIVER_MESH_FLAG_USER_MPM; ++ params->conf.auto_plinks = 0; + } else { +- params.flags |= WPA_DRIVER_MESH_FLAG_DRIVER_MPM; +- params.conf.auto_plinks = 1; ++ params->flags |= WPA_DRIVER_MESH_FLAG_DRIVER_MPM; ++ params->conf.auto_plinks = 1; + } +- params.conf.peer_link_timeout = wpa_s->conf->mesh_max_inactivity; ++ params->conf.peer_link_timeout = wpa_s->conf->mesh_max_inactivity; + +- if (wpa_supplicant_mesh_init(wpa_s, ssid, ¶ms.freq)) { ++ wpa_s->mesh_params = params; ++ if (wpa_supplicant_mesh_init(wpa_s, ssid, ¶ms->freq)) { + wpa_msg(wpa_s, MSG_ERROR, "Failed to init mesh"); + wpa_drv_leave_mesh(wpa_s); + ret = -1; + goto out; + } + +- if (ssid->key_mgmt & WPA_KEY_MGMT_SAE) { +- wpa_s->pairwise_cipher = wpa_s->mesh_rsn->pairwise_cipher; +- wpa_s->group_cipher = wpa_s->mesh_rsn->group_cipher; +- wpa_s->mgmt_group_cipher = wpa_s->mesh_rsn->mgmt_group_cipher; +- } +- +- if (wpa_s->ifmsh) { +- params.ies = wpa_s->ifmsh->mconf->rsn_ie; +- params.ie_len = wpa_s->ifmsh->mconf->rsn_ie_len; +- params.basic_rates = wpa_s->ifmsh->basic_rates; +- params.conf.flags |= WPA_DRIVER_MESH_CONF_FLAG_HT_OP_MODE; +- params.conf.ht_opmode = wpa_s->ifmsh->bss[0]->iface->ht_op_mode; +- } +- +- wpa_msg(wpa_s, MSG_INFO, "joining mesh %s", +- wpa_ssid_txt(ssid->ssid, ssid->ssid_len)); +- ret = wpa_drv_join_mesh(wpa_s, ¶ms); +- if (ret) +- wpa_msg(wpa_s, MSG_ERROR, "mesh join error=%d", ret); +- +- /* hostapd sets the interface down until we associate */ +- wpa_drv_set_operstate(wpa_s, 1); +- +- if (!ret) +- wpa_supplicant_set_state(wpa_s, WPA_COMPLETED); +- ++ wpas_join_mesh(wpa_s); + out: + return ret; + } +--- a/wpa_supplicant/mesh.h ++++ b/wpa_supplicant/mesh.h +@@ -21,6 +21,7 @@ int wpas_mesh_add_interface(struct wpa_s + int wpas_mesh_peer_remove(struct wpa_supplicant *wpa_s, const u8 *addr); + int wpas_mesh_peer_add(struct wpa_supplicant *wpa_s, const u8 *addr, + int duration); ++void wpas_join_mesh(struct wpa_supplicant *wpa_s); + + #ifdef CONFIG_MESH + +--- a/wpa_supplicant/wpa_supplicant_i.h ++++ b/wpa_supplicant/wpa_supplicant_i.h +@@ -810,6 +810,7 @@ struct wpa_supplicant { + unsigned int mesh_if_created:1; + unsigned int mesh_ht_enabled:1; + unsigned int mesh_vht_enabled:1; ++ struct wpa_driver_mesh_join_params *mesh_params; + #ifdef CONFIG_PMKSA_CACHE_EXTERNAL + /* struct external_pmksa_cache::list */ + struct dl_list mesh_external_pmksa_cache; diff --git a/package/network/services/hostapd/patches/0102-mesh-factor-out-rsn-initialization.patch b/package/network/services/hostapd/patches/0102-mesh-factor-out-rsn-initialization.patch new file mode 100644 index 000000000..75717a50e --- /dev/null +++ b/package/network/services/hostapd/patches/0102-mesh-factor-out-rsn-initialization.patch @@ -0,0 +1,115 @@ +From 04ebcadc059a6cfd45cd8ec06e6321b69bdb68b8 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:48:59 -0700 +Subject: [PATCH 02/15] mesh: factor out rsn initialization + +RSN initialization can be used in different phases +if mesh initialization and mesh join don't happen +in sequence such as DFS CAC is done in between, +hence factor it out to help convering the case. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 73 ++++++++++++++++++++++++++----------------- + wpa_supplicant/mesh.h | 1 + + 2 files changed, 45 insertions(+), 29 deletions(-) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -147,6 +147,48 @@ static void wpas_mesh_copy_groups(struct + groups_size); + } + ++int wpas_mesh_init_rsn(struct wpa_supplicant *wpa_s) ++{ ++ struct hostapd_iface *ifmsh = wpa_s->ifmsh; ++ struct mesh_conf *mconf = wpa_s->ifmsh->mconf; ++ struct wpa_ssid *ssid = wpa_s->current_ssid; ++ struct hostapd_data *bss = ifmsh->bss[0]; ++ static int default_groups[] = { 19, 20, 21, 25, 26, -1 }; ++ size_t len; ++ ++ if (mconf->security != MESH_CONF_SEC_NONE) { ++ if (ssid->passphrase == NULL) { ++ wpa_printf(MSG_ERROR, ++ "mesh: Passphrase for SAE not configured"); ++ return -1; ++ } ++ ++ bss->conf->wpa = ssid->proto; ++ bss->conf->wpa_key_mgmt = ssid->key_mgmt; ++ ++ if (wpa_s->conf->sae_groups && ++ wpa_s->conf->sae_groups[0] > 0) { ++ wpas_mesh_copy_groups(bss, wpa_s); ++ } else { ++ bss->conf->sae_groups = ++ os_memdup(default_groups, ++ sizeof(default_groups)); ++ if (!bss->conf->sae_groups) ++ return -1; ++ } ++ ++ len = os_strlen(ssid->passphrase); ++ bss->conf->ssid.wpa_passphrase = ++ dup_binstr(ssid->passphrase, len); ++ ++ wpa_s->mesh_rsn = mesh_rsn_auth_init(wpa_s, mconf); ++ if (!wpa_s->mesh_rsn) ++ return -1; ++ } ++ ++ return 0; ++} ++ + + static int wpa_supplicant_mesh_init(struct wpa_supplicant *wpa_s, + struct wpa_ssid *ssid, +@@ -291,35 +333,8 @@ static int wpa_supplicant_mesh_init(stru + return -1; + } + +- if (mconf->security != MESH_CONF_SEC_NONE) { +- if (ssid->passphrase == NULL) { +- wpa_printf(MSG_ERROR, +- "mesh: Passphrase for SAE not configured"); +- goto out_free; +- } +- +- bss->conf->wpa = ssid->proto; +- bss->conf->wpa_key_mgmt = ssid->key_mgmt; +- +- if (wpa_s->conf->sae_groups && +- wpa_s->conf->sae_groups[0] > 0) { +- wpas_mesh_copy_groups(bss, wpa_s); +- } else { +- bss->conf->sae_groups = +- os_memdup(default_groups, +- sizeof(default_groups)); +- if (!bss->conf->sae_groups) +- goto out_free; +- } +- +- len = os_strlen(ssid->passphrase); +- bss->conf->ssid.wpa_passphrase = +- dup_binstr(ssid->passphrase, len); +- +- wpa_s->mesh_rsn = mesh_rsn_auth_init(wpa_s, mconf); +- if (!wpa_s->mesh_rsn) +- goto out_free; +- } ++ if (wpas_mesh_init_rsn(wpa_s)) ++ goto out_free; + + wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf); + +--- a/wpa_supplicant/mesh.h ++++ b/wpa_supplicant/mesh.h +@@ -22,6 +22,7 @@ int wpas_mesh_peer_remove(struct wpa_sup + int wpas_mesh_peer_add(struct wpa_supplicant *wpa_s, const u8 *addr, + int duration); + void wpas_join_mesh(struct wpa_supplicant *wpa_s); ++int wpas_mesh_init_rsn(struct wpa_supplicant *wpa_s); + + #ifdef CONFIG_MESH + diff --git a/package/network/services/hostapd/patches/0103-mesh-relocate-RSN-init-function.patch b/package/network/services/hostapd/patches/0103-mesh-relocate-RSN-init-function.patch new file mode 100644 index 000000000..153e9b2c6 --- /dev/null +++ b/package/network/services/hostapd/patches/0103-mesh-relocate-RSN-init-function.patch @@ -0,0 +1,41 @@ +From cbe8b9901f9cc254cbaa1ec1cee1c52af8f828bf Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:00 -0700 +Subject: [PATCH 03/15] mesh: relocate RSN init function + +RSN init function should work together with mesh join +when it's used. Since mesh join could be called at different stage +if DFS channel is used, relocate the function to mesh join. +It is still the same call flows of mesh join before this changes +if non-DFS channels are used, hence no side effect will occur. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -333,9 +333,6 @@ static int wpa_supplicant_mesh_init(stru + return -1; + } + +- if (wpas_mesh_init_rsn(wpa_s)) +- goto out_free; +- + wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf); + + return 0; +@@ -381,6 +378,12 @@ void wpas_join_mesh(struct wpa_supplican + struct wpa_ssid *ssid = wpa_s->current_ssid; + int ret = 0; + ++ if (wpas_mesh_init_rsn(wpa_s)) { ++ wpa_printf(MSG_ERROR, "Init RSN failed. Deinit mesh..."); ++ wpa_supplicant_mesh_deinit(wpa_s); ++ return; ++ } ++ + if (ssid->key_mgmt & WPA_KEY_MGMT_SAE) { + wpa_s->pairwise_cipher = wpa_s->mesh_rsn->pairwise_cipher; + wpa_s->group_cipher = wpa_s->mesh_rsn->group_cipher; diff --git a/package/network/services/hostapd/patches/0104-mesh-use-setup-completion-callback-to-complete-mesh-.patch b/package/network/services/hostapd/patches/0104-mesh-use-setup-completion-callback-to-complete-mesh-.patch new file mode 100644 index 000000000..8927d5ca8 --- /dev/null +++ b/package/network/services/hostapd/patches/0104-mesh-use-setup-completion-callback-to-complete-mesh-.patch @@ -0,0 +1,73 @@ +From 8a4ebbb6bbbc1460c1d584d1a710bf1361797ffd Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:01 -0700 +Subject: [PATCH 04/15] mesh: use setup completion callback to complete mesh + join + +mesh join function is the last function to be called during +mesh join process, but it's been called a bit earlier than +it's supposed to be, so that some mesh parameter values +such as VHT capabilities not applied correct when mesh join +is in process. Moreover current design of mesh join that is called +directly after mesh initialization is not suitable for DFS channels +to use, since mesh join process should be paused until DFS CAC is +done and resumed once it's done. +Using setup completion callback is how AP mode is using for DFS channels +and mesh can use the same way. +The callback will be called by hostapd_setup_interface_complete_sync. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 7 +++++-- + wpa_supplicant/mesh.h | 2 +- + 2 files changed, 6 insertions(+), 3 deletions(-) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -215,6 +215,7 @@ static int wpa_supplicant_mesh_init(stru + if (!ifmsh) + return -ENOMEM; + ++ ifmsh->owner = wpa_s; + ifmsh->drv_flags = wpa_s->drv_flags; + ifmsh->num_bss = 1; + ifmsh->bss = os_calloc(wpa_s->ifmsh->num_bss, +@@ -231,6 +232,8 @@ static int wpa_supplicant_mesh_init(stru + bss->drv_priv = wpa_s->drv_priv; + bss->iface = ifmsh; + bss->mesh_sta_free_cb = mesh_mpm_free_sta; ++ bss->setup_complete_cb = wpas_mesh_complete_cb; ++ bss->setup_complete_cb_ctx = wpa_s; + frequency = ssid->frequency; + if (frequency != freq->freq && + frequency == freq->freq + freq->sec_channel_offset * 20) { +@@ -372,8 +375,9 @@ void wpa_supplicant_mesh_add_scan_ie(str + } + + +-void wpas_join_mesh(struct wpa_supplicant *wpa_s) ++void wpas_mesh_complete_cb(void *ctx) + { ++ struct wpa_supplicant *wpa_s = (struct wpa_supplicant *)ctx; + struct wpa_driver_mesh_join_params *params = wpa_s->mesh_params; + struct wpa_ssid *ssid = wpa_s->current_ssid; + int ret = 0; +@@ -495,7 +499,6 @@ int wpa_supplicant_join_mesh(struct wpa_ + goto out; + } + +- wpas_join_mesh(wpa_s); + out: + return ret; + } +--- a/wpa_supplicant/mesh.h ++++ b/wpa_supplicant/mesh.h +@@ -21,7 +21,7 @@ int wpas_mesh_add_interface(struct wpa_s + int wpas_mesh_peer_remove(struct wpa_supplicant *wpa_s, const u8 *addr); + int wpas_mesh_peer_add(struct wpa_supplicant *wpa_s, const u8 *addr, + int duration); +-void wpas_join_mesh(struct wpa_supplicant *wpa_s); ++void wpas_mesh_complete_cb(void *ctx); + int wpas_mesh_init_rsn(struct wpa_supplicant *wpa_s); + + #ifdef CONFIG_MESH diff --git a/package/network/services/hostapd/patches/0105-mesh-reflect-country-setting-to-mesh-configuration.patch b/package/network/services/hostapd/patches/0105-mesh-reflect-country-setting-to-mesh-configuration.patch new file mode 100644 index 000000000..ba6947883 --- /dev/null +++ b/package/network/services/hostapd/patches/0105-mesh-reflect-country-setting-to-mesh-configuration.patch @@ -0,0 +1,32 @@ +From e223e851cbe776029a2768b56e7aa1a9f2873d09 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:02 -0700 +Subject: [PATCH 05/15] mesh: reflect country setting to mesh configuration + +wpa_supplicant configuration has country parameter that is +supposed to be used in AP mode to indicate supporting 802.11h +and 802.11d. Reflect this configuration to Mesh also since Mesh +is required to support 802.11h and 802.11d to use DFS channels. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -252,6 +252,14 @@ static int wpa_supplicant_mesh_init(stru + bss->conf->start_disabled = 1; + bss->conf->mesh = MESH_ENABLED; + bss->conf->ap_max_inactivity = wpa_s->conf->mesh_max_inactivity; ++ ++ if (ieee80211_is_dfs(ssid->frequency) && wpa_s->conf->country[0]) { ++ conf->ieee80211h = 1; ++ conf->ieee80211d = 1; ++ conf->country[0] = wpa_s->conf->country[0]; ++ conf->country[1] = wpa_s->conf->country[1]; ++ } ++ + bss->iconf = conf; + ifmsh->conf = conf; + diff --git a/package/network/services/hostapd/patches/0106-mesh-inform-kernel-driver-DFS-handler-in-userspace.patch b/package/network/services/hostapd/patches/0106-mesh-inform-kernel-driver-DFS-handler-in-userspace.patch new file mode 100644 index 000000000..66b956fec --- /dev/null +++ b/package/network/services/hostapd/patches/0106-mesh-inform-kernel-driver-DFS-handler-in-userspace.patch @@ -0,0 +1,48 @@ +From c7f107e52205dd5fdb20f7ae13413b3673b0547e Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:03 -0700 +Subject: [PATCH 06/15] mesh: inform kernel driver DFS handler in userspace + +NL80211_ATTR_HANDLE_DFS is required by kerenel space +to enable DFS channels that indicates DFS handler +resides in userspace. + +Signed-off-by: Peter Oh +--- + src/drivers/driver.h | 1 + + src/drivers/driver_nl80211.c | 3 +++ + wpa_supplicant/mesh.c | 1 + + 3 files changed, 5 insertions(+) + +--- a/src/drivers/driver.h ++++ b/src/drivers/driver.h +@@ -1390,6 +1390,7 @@ struct wpa_driver_mesh_join_params { + #define WPA_DRIVER_MESH_FLAG_SAE_AUTH 0x00000004 + #define WPA_DRIVER_MESH_FLAG_AMPE 0x00000008 + unsigned int flags; ++ u8 handle_dfs; + }; + + /** +--- a/src/drivers/driver_nl80211.c ++++ b/src/drivers/driver_nl80211.c +@@ -9244,6 +9244,9 @@ static int nl80211_join_mesh(struct i802 + + wpa_printf(MSG_DEBUG, " * flags=%08X", params->flags); + ++ if (params->handle_dfs) ++ if (nla_put_flag(msg, NL80211_ATTR_HANDLE_DFS)) ++ goto fail; + container = nla_nest_start(msg, NL80211_ATTR_MESH_SETUP); + if (!container) + goto fail; +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -258,6 +258,7 @@ static int wpa_supplicant_mesh_init(stru + conf->ieee80211d = 1; + conf->country[0] = wpa_s->conf->country[0]; + conf->country[1] = wpa_s->conf->country[1]; ++ wpa_s->mesh_params->handle_dfs = 1; + } + + bss->iconf = conf; diff --git a/package/network/services/hostapd/patches/0107-mesh-apply-channel-attributes-before-running-Mesh.patch b/package/network/services/hostapd/patches/0107-mesh-apply-channel-attributes-before-running-Mesh.patch new file mode 100644 index 000000000..9c8b2b948 --- /dev/null +++ b/package/network/services/hostapd/patches/0107-mesh-apply-channel-attributes-before-running-Mesh.patch @@ -0,0 +1,33 @@ +From a0c5eea22d5d1181dbe0861b24e4b9bb598f4e50 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:04 -0700 +Subject: [PATCH 07/15] mesh: apply channel attributes before running Mesh + +This helps mesh interface initializes with correct +channel parameters. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -334,6 +334,8 @@ static int wpa_supplicant_mesh_init(stru + conf->basic_rates[rate_len] = -1; + } + ++ wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf); ++ + if (hostapd_setup_interface(ifmsh)) { + wpa_printf(MSG_ERROR, + "Failed to initialize hostapd interface for mesh"); +@@ -345,8 +347,6 @@ static int wpa_supplicant_mesh_init(stru + return -1; + } + +- wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf); +- + return 0; + out_free: + wpa_supplicant_mesh_deinit(wpa_s); diff --git a/package/network/services/hostapd/patches/0108-mesh-set-interface-type-to-mesh-before-setting-inter.patch b/package/network/services/hostapd/patches/0108-mesh-set-interface-type-to-mesh-before-setting-inter.patch new file mode 100644 index 000000000..da47aa8d2 --- /dev/null +++ b/package/network/services/hostapd/patches/0108-mesh-set-interface-type-to-mesh-before-setting-inter.patch @@ -0,0 +1,36 @@ +From 143809f1e60f749a5a5c72735ffa8eb99d602cc1 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:05 -0700 +Subject: [PATCH 08/15] mesh: set interface type to mesh before setting + interface + +Correct interface type is required to start DFS CAC that can be +triggered during interface setup. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -336,14 +336,14 @@ static int wpa_supplicant_mesh_init(stru + + wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf); + +- if (hostapd_setup_interface(ifmsh)) { +- wpa_printf(MSG_ERROR, +- "Failed to initialize hostapd interface for mesh"); ++ if (wpa_drv_init_mesh(wpa_s)) { ++ wpa_msg(wpa_s, MSG_ERROR, "Failed to init mesh in driver"); + return -1; + } + +- if (wpa_drv_init_mesh(wpa_s)) { +- wpa_msg(wpa_s, MSG_ERROR, "Failed to init mesh in driver"); ++ if (hostapd_setup_interface(ifmsh)) { ++ wpa_printf(MSG_ERROR, ++ "Failed to initialize hostapd interface for mesh"); + return -1; + } + diff --git a/package/network/services/hostapd/patches/0109-mesh-set-mesh-center-frequency.patch b/package/network/services/hostapd/patches/0109-mesh-set-mesh-center-frequency.patch new file mode 100644 index 000000000..ac5e7d389 --- /dev/null +++ b/package/network/services/hostapd/patches/0109-mesh-set-mesh-center-frequency.patch @@ -0,0 +1,22 @@ +From 4347c97600f4484be8df804dfb5ed85b867d3c43 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:06 -0700 +Subject: [PATCH 09/15] mesh: set mesh center frequency + +vht center frequency value is required to compose the correct channel info. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -453,6 +453,7 @@ int wpa_supplicant_join_mesh(struct wpa_ + + if (wpa_s->mesh_vht_enabled) { + ssid->vht = 1; ++ ssid->vht_center_freq1 = params->freq.center_freq1; + switch (params->freq.bandwidth) { + case 80: + if (params->freq.center_freq2) { diff --git a/package/network/services/hostapd/patches/011-Additional-consistentcy-checks-for-PTK-component-len.patch b/package/network/services/hostapd/patches/011-Additional-consistentcy-checks-for-PTK-component-len.patch deleted file mode 100644 index 5cc2f7b17..000000000 --- a/package/network/services/hostapd/patches/011-Additional-consistentcy-checks-for-PTK-component-len.patch +++ /dev/null @@ -1,100 +0,0 @@ -From a6ea665300919d6a3af22b1f4237203647fda93a Mon Sep 17 00:00:00 2001 -From: Jouni Malinen -Date: Tue, 17 Oct 2017 00:01:11 +0300 -Subject: [PATCH] Additional consistentcy checks for PTK component lengths - -Verify that TK, KCK, and KEK lengths are set to consistent values within -struct wpa_ptk before using them in supplicant. This is an additional -layer of protection against unexpected states. - -Signed-off-by: Jouni Malinen ---- - src/common/wpa_common.c | 6 ++++++ - src/rsn_supp/wpa.c | 26 ++++++++++++++++++++------ - 2 files changed, 26 insertions(+), 6 deletions(-) - ---- a/src/common/wpa_common.c -+++ b/src/common/wpa_common.c -@@ -100,6 +100,12 @@ int wpa_eapol_key_mic(const u8 *key, siz - { - u8 hash[SHA512_MAC_LEN]; - -+ if (key_len == 0) { -+ wpa_printf(MSG_DEBUG, -+ "WPA: KCK not set - cannot calculate MIC"); -+ return -1; -+ } -+ - switch (ver) { - #ifndef CONFIG_FIPS - case WPA_KEY_INFO_TYPE_HMAC_MD5_RC4: ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -725,6 +725,11 @@ static int wpa_supplicant_install_ptk(st - - alg = wpa_cipher_to_alg(sm->pairwise_cipher); - keylen = wpa_cipher_key_len(sm->pairwise_cipher); -+ if (keylen <= 0 || (unsigned int) keylen != sm->ptk.tk_len) { -+ wpa_printf(MSG_DEBUG, "WPA: TK length mismatch: %d != %lu", -+ keylen, (long unsigned int) sm->ptk.tk_len); -+ return -1; -+ } - rsclen = wpa_cipher_rsc_len(sm->pairwise_cipher); - - if (sm->proto == WPA_PROTO_RSN || sm->proto == WPA_PROTO_OSEN) { -@@ -745,6 +750,7 @@ static int wpa_supplicant_install_ptk(st - - /* TK is not needed anymore in supplicant */ - os_memset(sm->ptk.tk, 0, WPA_TK_MAX_LEN); -+ sm->ptk.tk_len = 0; - sm->ptk.installed = 1; - - if (sm->wpa_ptk_rekey) { -@@ -1717,9 +1723,10 @@ static int wpa_supplicant_verify_eapol_k - os_memcpy(mic, key + 1, mic_len); - if (sm->tptk_set) { - os_memset(key + 1, 0, mic_len); -- wpa_eapol_key_mic(sm->tptk.kck, sm->tptk.kck_len, sm->key_mgmt, -- ver, buf, len, (u8 *) (key + 1)); -- if (os_memcmp_const(mic, key + 1, mic_len) != 0) { -+ if (wpa_eapol_key_mic(sm->tptk.kck, sm->tptk.kck_len, -+ sm->key_mgmt, -+ ver, buf, len, (u8 *) (key + 1)) < 0 || -+ os_memcmp_const(mic, key + 1, mic_len) != 0) { - wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, - "WPA: Invalid EAPOL-Key MIC " - "when using TPTK - ignoring TPTK"); -@@ -1742,9 +1749,10 @@ static int wpa_supplicant_verify_eapol_k - - if (!ok && sm->ptk_set) { - os_memset(key + 1, 0, mic_len); -- wpa_eapol_key_mic(sm->ptk.kck, sm->ptk.kck_len, sm->key_mgmt, -- ver, buf, len, (u8 *) (key + 1)); -- if (os_memcmp_const(mic, key + 1, mic_len) != 0) { -+ if (wpa_eapol_key_mic(sm->ptk.kck, sm->ptk.kck_len, -+ sm->key_mgmt, -+ ver, buf, len, (u8 *) (key + 1)) < 0 || -+ os_memcmp_const(mic, key + 1, mic_len) != 0) { - wpa_msg(sm->ctx->msg_ctx, MSG_WARNING, - "WPA: Invalid EAPOL-Key MIC - " - "dropping packet"); -@@ -4167,6 +4175,11 @@ int fils_process_assoc_resp(struct wpa_s - - alg = wpa_cipher_to_alg(sm->pairwise_cipher); - keylen = wpa_cipher_key_len(sm->pairwise_cipher); -+ if (keylen <= 0 || (unsigned int) keylen != sm->ptk.tk_len) { -+ wpa_printf(MSG_DEBUG, "FILS: TK length mismatch: %u != %lu", -+ keylen, (long unsigned int) sm->ptk.tk_len); -+ goto fail; -+ } - rsclen = wpa_cipher_rsc_len(sm->pairwise_cipher); - wpa_hexdump_key(MSG_DEBUG, "FILS: Set TK to driver", - sm->ptk.tk, keylen); -@@ -4183,6 +4196,7 @@ int fils_process_assoc_resp(struct wpa_s - * takes care of association frame encryption/decryption. */ - /* TK is not needed anymore in supplicant */ - os_memset(sm->ptk.tk, 0, WPA_TK_MAX_LEN); -+ sm->ptk.tk_len = 0; - sm->ptk.installed = 1; - - /* FILS HLP Container */ diff --git a/package/network/services/hostapd/patches/0110-mesh-consider-mesh-interface-on-dfs-event-handler.patch b/package/network/services/hostapd/patches/0110-mesh-consider-mesh-interface-on-dfs-event-handler.patch new file mode 100644 index 000000000..0c78dd432 --- /dev/null +++ b/package/network/services/hostapd/patches/0110-mesh-consider-mesh-interface-on-dfs-event-handler.patch @@ -0,0 +1,138 @@ +From d0a0e1030005834b99225feb64ec3794d31beab0 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:07 -0700 +Subject: [PATCH 10/15] mesh: consider mesh interface on dfs event handler + +Once mesh starts supporting DFS channels, it has to handle DFS related events +from drivers, hence add mesh interface to the check list. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/ap.c | 55 ++++++++++++++++++++++++++++++++--------- + wpa_supplicant/events.c | 1 + + 2 files changed, 44 insertions(+), 12 deletions(-) + +--- a/wpa_supplicant/ap.c ++++ b/wpa_supplicant/ap.c +@@ -1328,13 +1328,18 @@ int ap_ctrl_iface_chanswitch(struct wpa_ + void wpas_ap_ch_switch(struct wpa_supplicant *wpa_s, int freq, int ht, + int offset, int width, int cf1, int cf2) + { ++ struct hostapd_iface *iface = wpa_s->ap_iface; ++ + if (!wpa_s->ap_iface) +- return; ++ if (!wpa_s->ifmsh) ++ return; ++ else ++ iface = wpa_s->ifmsh; + + wpa_s->assoc_freq = freq; + if (wpa_s->current_ssid) + wpa_s->current_ssid->frequency = freq; +- hostapd_event_ch_switch(wpa_s->ap_iface->bss[0], freq, ht, ++ hostapd_event_ch_switch(iface->bss[0], freq, ht, + offset, width, cf1, cf2); + } + +@@ -1531,10 +1536,15 @@ int wpas_ap_pmksa_cache_add_external(str + void wpas_event_dfs_radar_detected(struct wpa_supplicant *wpa_s, + struct dfs_event *radar) + { ++ struct hostapd_iface *iface = wpa_s->ap_iface; ++ + if (!wpa_s->ap_iface || !wpa_s->ap_iface->bss[0]) +- return; ++ if (!wpa_s->ifmsh || !wpa_s->ifmsh->bss[0]) ++ return; ++ else ++ iface = wpa_s->ifmsh; + wpa_printf(MSG_DEBUG, "DFS radar detected on %d MHz", radar->freq); +- hostapd_dfs_radar_detected(wpa_s->ap_iface, radar->freq, ++ hostapd_dfs_radar_detected(iface, radar->freq, + radar->ht_enabled, radar->chan_offset, + radar->chan_width, + radar->cf1, radar->cf2); +@@ -1544,10 +1554,15 @@ void wpas_event_dfs_radar_detected(struc + void wpas_event_dfs_cac_started(struct wpa_supplicant *wpa_s, + struct dfs_event *radar) + { ++ struct hostapd_iface *iface = wpa_s->ap_iface; ++ + if (!wpa_s->ap_iface || !wpa_s->ap_iface->bss[0]) +- return; ++ if (!wpa_s->ifmsh || !wpa_s->ifmsh->bss[0]) ++ return; ++ else ++ iface = wpa_s->ifmsh; + wpa_printf(MSG_DEBUG, "DFS CAC started on %d MHz", radar->freq); +- hostapd_dfs_start_cac(wpa_s->ap_iface, radar->freq, ++ hostapd_dfs_start_cac(iface, radar->freq, + radar->ht_enabled, radar->chan_offset, + radar->chan_width, radar->cf1, radar->cf2); + } +@@ -1556,10 +1571,16 @@ void wpas_event_dfs_cac_started(struct w + void wpas_event_dfs_cac_finished(struct wpa_supplicant *wpa_s, + struct dfs_event *radar) + { ++ struct hostapd_iface *iface = wpa_s->ap_iface; ++ + if (!wpa_s->ap_iface || !wpa_s->ap_iface->bss[0]) +- return; ++ if (!wpa_s->ifmsh || !wpa_s->ifmsh->bss[0]) ++ return; ++ else ++ iface = wpa_s->ifmsh; ++ + wpa_printf(MSG_DEBUG, "DFS CAC finished on %d MHz", radar->freq); +- hostapd_dfs_complete_cac(wpa_s->ap_iface, 1, radar->freq, ++ hostapd_dfs_complete_cac(iface, 1, radar->freq, + radar->ht_enabled, radar->chan_offset, + radar->chan_width, radar->cf1, radar->cf2); + } +@@ -1568,10 +1589,15 @@ void wpas_event_dfs_cac_finished(struct + void wpas_event_dfs_cac_aborted(struct wpa_supplicant *wpa_s, + struct dfs_event *radar) + { ++ struct hostapd_iface *iface = wpa_s->ap_iface; ++ + if (!wpa_s->ap_iface || !wpa_s->ap_iface->bss[0]) +- return; ++ if (!wpa_s->ifmsh || !wpa_s->ifmsh->bss[0]) ++ return; ++ else ++ iface = wpa_s->ifmsh; + wpa_printf(MSG_DEBUG, "DFS CAC aborted on %d MHz", radar->freq); +- hostapd_dfs_complete_cac(wpa_s->ap_iface, 0, radar->freq, ++ hostapd_dfs_complete_cac(iface, 0, radar->freq, + radar->ht_enabled, radar->chan_offset, + radar->chan_width, radar->cf1, radar->cf2); + } +@@ -1580,10 +1606,15 @@ void wpas_event_dfs_cac_aborted(struct w + void wpas_event_dfs_cac_nop_finished(struct wpa_supplicant *wpa_s, + struct dfs_event *radar) + { ++ struct hostapd_iface *iface = wpa_s->ap_iface; ++ + if (!wpa_s->ap_iface || !wpa_s->ap_iface->bss[0]) +- return; ++ if (!wpa_s->ifmsh || !wpa_s->ifmsh->bss[0]) ++ return; ++ else ++ iface = wpa_s->ifmsh; + wpa_printf(MSG_DEBUG, "DFS NOP finished on %d MHz", radar->freq); +- hostapd_dfs_nop_finished(wpa_s->ap_iface, radar->freq, ++ hostapd_dfs_nop_finished(iface, radar->freq, + radar->ht_enabled, radar->chan_offset, + radar->chan_width, radar->cf1, radar->cf2); + } +--- a/wpa_supplicant/events.c ++++ b/wpa_supplicant/events.c +@@ -4168,6 +4168,7 @@ void wpa_supplicant_event(void *ctx, enu + + if (wpa_s->current_ssid->mode == WPAS_MODE_AP || + wpa_s->current_ssid->mode == WPAS_MODE_P2P_GO || ++ wpa_s->current_ssid->mode == WPAS_MODE_MESH || + wpa_s->current_ssid->mode == + WPAS_MODE_P2P_GROUP_FORMATION) { + wpas_ap_ch_switch(wpa_s, data->ch_switch.freq, diff --git a/package/network/services/hostapd/patches/0111-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch b/package/network/services/hostapd/patches/0111-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch new file mode 100644 index 000000000..928ba8eb9 --- /dev/null +++ b/package/network/services/hostapd/patches/0111-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch @@ -0,0 +1,79 @@ +From e7fc5d2e6b34102282ff94a6e5255af4b6e9ccb5 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:08 -0700 +Subject: [PATCH 11/15] mesh: Allow DFS channels to be selected if dfs is + enabled + +Note: DFS is assumed to be usable if a country code has been set + +Signed-off-by: Benjamin Berg +Signed-off-by: Peter Oh +--- + wpa_supplicant/wpa_supplicant.c | 24 ++++++++++++++++++------ + 1 file changed, 18 insertions(+), 6 deletions(-) + +--- a/wpa_supplicant/wpa_supplicant.c ++++ b/wpa_supplicant/wpa_supplicant.c +@@ -2033,6 +2033,8 @@ void ibss_mesh_setup_freq(struct wpa_sup + struct hostapd_freq_params vht_freq; + int chwidth, seg0, seg1; + u32 vht_caps = 0; ++ int dfs_enabled = wpa_s->conf->country[0] && ++ (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR); + + freq->freq = ssid->frequency; + +@@ -2109,8 +2111,11 @@ void ibss_mesh_setup_freq(struct wpa_sup + return; + + /* Check primary channel flags */ +- if (pri_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR)) ++ if (pri_chan->flag & HOSTAPD_CHAN_DISABLED) + return; ++ if (pri_chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR)) ++ if (!dfs_enabled) ++ return; + + #ifdef CONFIG_HT_OVERRIDES + if (ssid->disable_ht40) +@@ -2136,8 +2141,11 @@ void ibss_mesh_setup_freq(struct wpa_sup + return; + + /* Check secondary channel flags */ +- if (sec_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR)) ++ if (sec_chan->flag & HOSTAPD_CHAN_DISABLED) + return; ++ if (sec_chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR)) ++ if (!dfs_enabled) ++ return; + + freq->channel = pri_chan->chan; + +@@ -2227,8 +2235,11 @@ void ibss_mesh_setup_freq(struct wpa_sup + return; + + /* Back to HT configuration if channel not usable */ +- if (chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR)) ++ if (chan->flag & HOSTAPD_CHAN_DISABLED) + return; ++ if (chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR)) ++ if (!dfs_enabled) ++ return; + } + + chwidth = VHT_CHANWIDTH_80MHZ; +@@ -2248,10 +2259,11 @@ void ibss_mesh_setup_freq(struct wpa_sup + if (!chan) + continue; + +- if (chan->flag & (HOSTAPD_CHAN_DISABLED | +- HOSTAPD_CHAN_NO_IR | +- HOSTAPD_CHAN_RADAR)) ++ if (chan->flag & HOSTAPD_CHAN_DISABLED) + continue; ++ if (chan->flag & (HOSTAPD_CHAN_RADAR | HOSTAPD_CHAN_NO_IR)) ++ if (!dfs_enabled) ++ continue; + + /* Found a suitable second segment for 80+80 */ + chwidth = VHT_CHANWIDTH_80P80MHZ; diff --git a/package/network/services/hostapd/patches/0112-mesh-allow-mesh-to-send-channel-switch-request.patch b/package/network/services/hostapd/patches/0112-mesh-allow-mesh-to-send-channel-switch-request.patch new file mode 100644 index 000000000..b011a3c35 --- /dev/null +++ b/package/network/services/hostapd/patches/0112-mesh-allow-mesh-to-send-channel-switch-request.patch @@ -0,0 +1,25 @@ +From 851f67301a8b9bc96c3d8cce08e355a64d30350d Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:09 -0700 +Subject: [PATCH 12/15] mesh: allow mesh to send channel switch request + +add mesh type to nl80211 channel switch request, +so mesh is able to send the request to kernel drivers. + +Signed-off-by: Peter Oh +--- + src/drivers/driver_nl80211.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/src/drivers/driver_nl80211.c ++++ b/src/drivers/driver_nl80211.c +@@ -8659,7 +8659,8 @@ static int nl80211_switch_channel(void * + } + + if ((drv->nlmode != NL80211_IFTYPE_AP) && +- (drv->nlmode != NL80211_IFTYPE_P2P_GO)) ++ (drv->nlmode != NL80211_IFTYPE_P2P_GO) && ++ (drv->nlmode != NL80211_IFTYPE_MESH_POINT) ) + return -EOPNOTSUPP; + + /* diff --git a/package/network/services/hostapd/patches/0113-mesh-do-not-allow-pri-sec-channel-switch.patch b/package/network/services/hostapd/patches/0113-mesh-do-not-allow-pri-sec-channel-switch.patch new file mode 100644 index 000000000..988ccdbeb --- /dev/null +++ b/package/network/services/hostapd/patches/0113-mesh-do-not-allow-pri-sec-channel-switch.patch @@ -0,0 +1,27 @@ +From 5fe4fa1c1f426d81496458d2127bfbd7623fe5d5 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:10 -0700 +Subject: [PATCH 13/15] mesh: do not allow pri/sec channel switch + +We don't want mesh to switch the channel from primary to secondary, +since mesh points are not able to join each other in that case. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/mesh.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -333,7 +333,10 @@ static int wpa_supplicant_mesh_init(stru + rate_len * sizeof(int)); + conf->basic_rates[rate_len] = -1; + } +- ++ /* Do not allow primary/secondary channel switch in mesh mode, ++ * since mesh is not able to establish a physical link for it ++ */ ++ conf->no_pri_sec_switch = 1; + wpa_supplicant_conf_ap_ht(wpa_s, ssid, conf); + + if (wpa_drv_init_mesh(wpa_s)) { diff --git a/package/network/services/hostapd/patches/0114-mesh-do-not-allow-scan-result-to-swap-pri-sec.patch b/package/network/services/hostapd/patches/0114-mesh-do-not-allow-scan-result-to-swap-pri-sec.patch new file mode 100644 index 000000000..2545cb4a1 --- /dev/null +++ b/package/network/services/hostapd/patches/0114-mesh-do-not-allow-scan-result-to-swap-pri-sec.patch @@ -0,0 +1,24 @@ +From fcc5fe675d1155d65df0471aa06f746c28b66b6c Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:11 -0700 +Subject: [PATCH 14/15] mesh: do not allow scan result to swap pri/sec + +Swapping between primary and secondary channel will break +mesh from joining, hence don't allow it. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/wpa_supplicant.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/wpa_supplicant/wpa_supplicant.c ++++ b/wpa_supplicant/wpa_supplicant.c +@@ -2158,7 +2158,7 @@ void ibss_mesh_setup_freq(struct wpa_sup + } + freq->sec_channel_offset = ht40; + +- if (obss_scan) { ++ if (ssid->mode != WPAS_MODE_MESH && obss_scan) { + struct wpa_scan_results *scan_res; + + scan_res = wpa_supplicant_get_scan_results(wpa_s, NULL, 0); diff --git a/package/network/services/hostapd/patches/0115-mesh-do-not-use-offchan-mgmt-tx-on-DFS.patch b/package/network/services/hostapd/patches/0115-mesh-do-not-use-offchan-mgmt-tx-on-DFS.patch new file mode 100644 index 000000000..76b4fe64c --- /dev/null +++ b/package/network/services/hostapd/patches/0115-mesh-do-not-use-offchan-mgmt-tx-on-DFS.patch @@ -0,0 +1,40 @@ +From ab2ba9fd9ac73c83dc15a6d76d93df4434d539d6 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Thu, 12 Apr 2018 02:49:12 -0700 +Subject: [PATCH 15/15] mesh: do not use offchan mgmt tx on DFS + +Drivers don't allow mesh to use offchannel on management Tx. + +Signed-off-by: Peter Oh +--- + src/drivers/driver_nl80211.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/src/drivers/driver_nl80211.c ++++ b/src/drivers/driver_nl80211.c +@@ -7148,6 +7148,7 @@ static int wpa_driver_nl80211_send_actio + struct wpa_driver_nl80211_data *drv = bss->drv; + int ret = -1; + u8 *buf; ++ int offchanok = 1; + struct ieee80211_hdr *hdr; + + wpa_printf(MSG_DEBUG, "nl80211: Send Action frame (ifindex=%d, " +@@ -7173,6 +7174,8 @@ static int wpa_driver_nl80211_send_actio + os_memset(bss->rand_addr, 0, ETH_ALEN); + } + ++ if (is_mesh_interface(drv->nlmode) && ieee80211_is_dfs(freq)) ++ offchanok = 0; + if (is_ap_interface(drv->nlmode) && + (!(drv->capa.flags & WPA_DRIVER_FLAGS_OFFCHANNEL_TX) || + (int) freq == bss->freq || drv->device_ap_sme || +@@ -7184,7 +7187,7 @@ static int wpa_driver_nl80211_send_actio + ret = nl80211_send_frame_cmd(bss, freq, wait_time, buf, + 24 + data_len, + &drv->send_action_cookie, +- no_cck, 0, 1, NULL, 0); ++ no_cck, 0, offchanok, NULL, 0); + + os_free(buf); + return ret; diff --git a/package/network/services/hostapd/patches/012-Clear-BSSID-information-in-supplicant-state-machine-.patch b/package/network/services/hostapd/patches/012-Clear-BSSID-information-in-supplicant-state-machine-.patch deleted file mode 100644 index 808d34586..000000000 --- a/package/network/services/hostapd/patches/012-Clear-BSSID-information-in-supplicant-state-machine-.patch +++ /dev/null @@ -1,25 +0,0 @@ -From c0fe5f125a9d4a6564e1f4956ccc3809bf2fd69d Mon Sep 17 00:00:00 2001 -From: Jouni Malinen -Date: Tue, 17 Oct 2017 01:15:24 +0300 -Subject: [PATCH] Clear BSSID information in supplicant state machine on - disconnection - -This fixes a corner case where RSN pre-authentication candidate from -scan results was ignored if the station was associated with that BSS -just before running the new scan for the connection. - -Signed-off-by: Jouni Malinen ---- - src/rsn_supp/wpa.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/src/rsn_supp/wpa.c -+++ b/src/rsn_supp/wpa.c -@@ -2662,6 +2662,7 @@ void wpa_sm_notify_disassoc(struct wpa_s - wpa_sm_drop_sa(sm); - - sm->msg_3_of_4_ok = 0; -+ os_memset(sm->bssid, 0, ETH_ALEN); - } - - diff --git a/package/network/services/hostapd/patches/013-WNM-Ignore-WNM-Sleep-Mode-Request-in-wnm_sleep_mode-.patch b/package/network/services/hostapd/patches/013-WNM-Ignore-WNM-Sleep-Mode-Request-in-wnm_sleep_mode-.patch deleted file mode 100644 index 13426e4db..000000000 --- a/package/network/services/hostapd/patches/013-WNM-Ignore-WNM-Sleep-Mode-Request-in-wnm_sleep_mode-.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 114f2830d2c2aee6db23d48240e93415a256a37c Mon Sep 17 00:00:00 2001 -From: Jouni Malinen -Date: Fri, 20 Oct 2017 17:39:42 +0300 -Subject: [PATCH] WNM: Ignore WNM-Sleep Mode Request in wnm_sleep_mode=0 case - -The hostapd wnm_sleep_mode parameter was previously used to control -advertisement of WNM-Sleep Mode support, but it was not used when -processing a request to use WNM-Sleep Mode. Add an explicit check during -request processing as well so that any misbehaving station is ignored. - -Signed-off-by: Jouni Malinen ---- - src/ap/wnm_ap.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/src/ap/wnm_ap.c b/src/ap/wnm_ap.c -index 7c4fde0..973e4d3 100644 ---- a/src/ap/wnm_ap.c -+++ b/src/ap/wnm_ap.c -@@ -200,6 +200,13 @@ static void ieee802_11_rx_wnmsleep_req(struct hostapd_data *hapd, - u8 *tfsreq_ie_end = NULL; - u16 tfsreq_ie_len = 0; - -+ if (!hapd->conf->wnm_sleep_mode) { -+ wpa_printf(MSG_DEBUG, "Ignore WNM-Sleep Mode Request from " -+ MACSTR " since WNM-Sleep Mode is disabled", -+ MAC2STR(addr)); -+ return; -+ } -+ - dialog_token = *pos++; - while (pos + 1 < frm + len) { - u8 ie_len = pos[1]; --- -2.1.4 diff --git a/package/network/services/hostapd/patches/020-mesh-properly-handle-sae_password.patch b/package/network/services/hostapd/patches/020-mesh-properly-handle-sae_password.patch new file mode 100644 index 000000000..17cc1e738 --- /dev/null +++ b/package/network/services/hostapd/patches/020-mesh-properly-handle-sae_password.patch @@ -0,0 +1,57 @@ +From 30c1693f42326d4f927e76120492bc9593b8f739 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Fri, 13 Apr 2018 00:42:10 +0200 +Subject: [PATCH] mesh: properly handle sae_password + +The recently introduced sae_password parameter is only handled properly +in wpa_supplicant/sme.c while wpa_supplicant/mesh.c assumed that +ssid->passphrase exclusively holds the secret. +Import the logic from sme.c to mesh.c to allow having only sae_password +set which otherwise throws this error: +AP-ENABLED +mesh: Passphrase for SAE not configured +Init RSN failed. Deinit mesh... +wlan1: interface state ENABLED->DISABLED +AP-DISABLED +Segmentation fault + +Signed-off-by: Daniel Golle +--- + wpa_supplicant/mesh.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/wpa_supplicant/mesh.c b/wpa_supplicant/mesh.c +index 22dec4822..0bf87245d 100644 +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -154,10 +154,14 @@ int wpas_mesh_init_rsn(struct wpa_supplicant *wpa_s) + struct wpa_ssid *ssid = wpa_s->current_ssid; + struct hostapd_data *bss = ifmsh->bss[0]; + static int default_groups[] = { 19, 20, 21, 25, 26, -1 }; ++ const char *password; + size_t len; + + if (mconf->security != MESH_CONF_SEC_NONE) { +- if (ssid->passphrase == NULL) { ++ password = ssid->sae_password; ++ if (!password) ++ password = ssid->passphrase; ++ if (!password) { + wpa_printf(MSG_ERROR, + "mesh: Passphrase for SAE not configured"); + return -1; +@@ -177,9 +181,9 @@ int wpas_mesh_init_rsn(struct wpa_supplicant *wpa_s) + return -1; + } + +- len = os_strlen(ssid->passphrase); ++ len = os_strlen(password); + bss->conf->ssid.wpa_passphrase = +- dup_binstr(ssid->passphrase, len); ++ dup_binstr(password, len); + + wpa_s->mesh_rsn = mesh_rsn_auth_init(wpa_s, mconf); + if (!wpa_s->mesh_rsn) +-- +2.17.0 + diff --git a/package/network/services/hostapd/patches/021-mesh-make-forwarding-configurable.patch b/package/network/services/hostapd/patches/021-mesh-make-forwarding-configurable.patch new file mode 100644 index 000000000..c7e7ffde9 --- /dev/null +++ b/package/network/services/hostapd/patches/021-mesh-make-forwarding-configurable.patch @@ -0,0 +1,242 @@ +From d11881c1ad0d6a102962d1a040a398f597256ae0 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Wed, 18 Apr 2018 19:24:31 +0200 +Subject: [PATCH] mesh: make forwarding configurable +To: hostap@lists.infradead.org +Cc: Jouni Malinen , + Johannes Berg + +Allow mesh_fwding to be specified in a mesh bss config, pass that +to the driver (only nl80211 implemented for now) and announce +forwarding capability accordingly. + +Signed-off-by: Daniel Golle +--- + src/ap/ap_config.h | 2 ++ + src/drivers/driver.h | 2 ++ + src/drivers/driver_nl80211.c | 3 +++ + wpa_supplicant/config.c | 4 ++++ + wpa_supplicant/config.h | 3 +++ + wpa_supplicant/config_file.c | 4 ++++ + wpa_supplicant/config_ssid.h | 5 +++++ + wpa_supplicant/mesh.c | 6 ++++++ + wpa_supplicant/mesh_mpm.c | 4 ++-- + wpa_supplicant/wpa_supplicant.conf | 6 ++++++ + 10 files changed, 37 insertions(+), 2 deletions(-) + +diff --git a/src/ap/ap_config.h b/src/ap/ap_config.h +index 03ab80d43..804385e93 100644 +--- a/src/ap/ap_config.h ++++ b/src/ap/ap_config.h +@@ -49,6 +49,7 @@ struct mesh_conf { + int dot11MeshRetryTimeout; /* msec */ + int dot11MeshConfirmTimeout; /* msec */ + int dot11MeshHoldingTimeout; /* msec */ ++ int mesh_fwding; + }; + + #define MAX_STA_COUNT 2007 +@@ -612,6 +613,7 @@ struct hostapd_bss_config { + + #define MESH_ENABLED BIT(0) + int mesh; ++ int mesh_fwding; + + u8 radio_measurements[RRM_CAPABILITIES_IE_LEN]; + +diff --git a/src/drivers/driver.h b/src/drivers/driver.h +index 6c9245584..7f1ec3697 100644 +--- a/src/drivers/driver.h ++++ b/src/drivers/driver.h +@@ -1363,6 +1363,7 @@ struct wpa_driver_mesh_bss_params { + #define WPA_DRIVER_MESH_CONF_FLAG_MAX_PEER_LINKS 0x00000004 + #define WPA_DRIVER_MESH_CONF_FLAG_HT_OP_MODE 0x00000008 + #define WPA_DRIVER_MESH_CONF_FLAG_RSSI_THRESHOLD 0x00000010 ++#define WPA_DRIVER_MESH_CONF_FLAG_FORWARDING 0x00000020 + /* + * TODO: Other mesh configuration parameters would go here. + * See NL80211_MESHCONF_* for all the mesh config parameters. +@@ -1372,6 +1373,7 @@ struct wpa_driver_mesh_bss_params { + int peer_link_timeout; + int max_peer_links; + int rssi_threshold; ++ int forwarding; + u16 ht_opmode; + }; + +diff --git a/src/drivers/driver_nl80211.c b/src/drivers/driver_nl80211.c +index e9cb4ae2f..f3de61886 100644 +--- a/src/drivers/driver_nl80211.c ++++ b/src/drivers/driver_nl80211.c +@@ -9197,6 +9197,9 @@ static int nl80211_put_mesh_config(struct nl_msg *msg, + if (((params->flags & WPA_DRIVER_MESH_CONF_FLAG_AUTO_PLINKS) && + nla_put_u8(msg, NL80211_MESHCONF_AUTO_OPEN_PLINKS, + params->auto_plinks)) || ++ ((params->flags & WPA_DRIVER_MESH_CONF_FLAG_FORWARDING) && ++ nla_put_u8(msg, NL80211_MESHCONF_FORWARDING, ++ params->forwarding)) || + ((params->flags & WPA_DRIVER_MESH_CONF_FLAG_MAX_PEER_LINKS) && + nla_put_u16(msg, NL80211_MESHCONF_MAX_PEER_LINKS, + params->max_peer_links)) || +diff --git a/wpa_supplicant/config.c b/wpa_supplicant/config.c +index a0b8cd007..0212e3f86 100644 +--- a/wpa_supplicant/config.c ++++ b/wpa_supplicant/config.c +@@ -2211,6 +2211,7 @@ static const struct parse_data ssid_fields[] = { + #ifdef CONFIG_MESH + { INT_RANGE(mode, 0, 5) }, + { INT_RANGE(no_auto_peer, 0, 1) }, ++ { INT_RANGE(mesh_fwding, 0, 1) }, + { INT_RANGE(mesh_rssi_threshold, -255, 1) }, + #else /* CONFIG_MESH */ + { INT_RANGE(mode, 0, 4) }, +@@ -2757,6 +2758,7 @@ void wpa_config_set_network_defaults(struct wpa_ssid *ssid) + ssid->dot11MeshRetryTimeout = DEFAULT_MESH_RETRY_TIMEOUT; + ssid->dot11MeshConfirmTimeout = DEFAULT_MESH_CONFIRM_TIMEOUT; + ssid->dot11MeshHoldingTimeout = DEFAULT_MESH_HOLDING_TIMEOUT; ++ ssid->mesh_fwding = DEFAULT_MESH_FWDING; + ssid->mesh_rssi_threshold = DEFAULT_MESH_RSSI_THRESHOLD; + #endif /* CONFIG_MESH */ + #ifdef CONFIG_HT_OVERRIDES +@@ -3886,6 +3888,7 @@ struct wpa_config * wpa_config_alloc_empty(const char *ctrl_interface, + config->user_mpm = DEFAULT_USER_MPM; + config->max_peer_links = DEFAULT_MAX_PEER_LINKS; + config->mesh_max_inactivity = DEFAULT_MESH_MAX_INACTIVITY; ++ config->mesh_fwding = DEFAULT_MESH_FWDING; + config->dot11RSNASAERetransPeriod = + DEFAULT_DOT11_RSNA_SAE_RETRANS_PERIOD; + config->fast_reauth = DEFAULT_FAST_REAUTH; +@@ -4508,6 +4511,7 @@ static const struct global_parse_data global_fields[] = { + { INT(user_mpm), 0 }, + { INT_RANGE(max_peer_links, 0, 255), 0 }, + { INT(mesh_max_inactivity), 0 }, ++ { INT_RANGE(mesh_fwding, 0, 1), 0 }, + { INT(dot11RSNASAERetransPeriod), 0 }, + #endif /* CONFIG_MESH */ + { INT(disable_scan_offload), 0 }, +diff --git a/wpa_supplicant/config.h b/wpa_supplicant/config.h +index 05c4f8fb9..491d8aa5c 100644 +--- a/wpa_supplicant/config.h ++++ b/wpa_supplicant/config.h +@@ -18,6 +18,7 @@ + #define DEFAULT_USER_MPM 1 + #define DEFAULT_MAX_PEER_LINKS 99 + #define DEFAULT_MESH_MAX_INACTIVITY 300 ++#define DEFAULT_MESH_FWDING 1 + /* + * The default dot11RSNASAERetransPeriod is defined as 40 ms in the standard, + * but use 1000 ms in practice to avoid issues on low power CPUs. +@@ -1269,6 +1270,8 @@ struct wpa_config { + */ + int mesh_max_inactivity; + ++ int mesh_fwding; ++ + /** + * dot11RSNASAERetransPeriod - Timeout to retransmit SAE Auth frame + * +diff --git a/wpa_supplicant/config_file.c b/wpa_supplicant/config_file.c +index 5a7186961..c4112b3ff 100644 +--- a/wpa_supplicant/config_file.c ++++ b/wpa_supplicant/config_file.c +@@ -816,6 +816,7 @@ static void wpa_config_write_network(FILE *f, struct wpa_ssid *ssid) + #endif /* IEEE8021X_EAPOL */ + INT(mode); + INT(no_auto_peer); ++ INT(mesh_fwding); + INT(frequency); + INT(fixed_freq); + #ifdef CONFIG_ACS +@@ -1433,6 +1434,9 @@ static void wpa_config_write_global(FILE *f, struct wpa_config *config) + fprintf(f, "mesh_max_inactivity=%d\n", + config->mesh_max_inactivity); + ++ if (config->mesh_fwding != DEFAULT_MESH_FWDING) ++ fprintf(f, "mesh_fwding=%d\n", config->mesh_fwding); ++ + if (config->dot11RSNASAERetransPeriod != + DEFAULT_DOT11_RSNA_SAE_RETRANS_PERIOD) + fprintf(f, "dot11RSNASAERetransPeriod=%d\n", +diff --git a/wpa_supplicant/config_ssid.h b/wpa_supplicant/config_ssid.h +index 87a45c435..24d1848e0 100644 +--- a/wpa_supplicant/config_ssid.h ++++ b/wpa_supplicant/config_ssid.h +@@ -492,6 +492,11 @@ struct wpa_ssid { + int dot11MeshConfirmTimeout; /* msec */ + int dot11MeshHoldingTimeout; /* msec */ + ++ /** ++ * Mesh network layer-2 forwarding ++ */ ++ int mesh_fwding; ++ + int ht; + int ht40; + +diff --git a/wpa_supplicant/mesh.c b/wpa_supplicant/mesh.c +index 3c2ee97da..22c10a015 100644 +--- a/wpa_supplicant/mesh.c ++++ b/wpa_supplicant/mesh.c +@@ -121,6 +121,7 @@ static struct mesh_conf * mesh_config_create(struct wpa_supplicant *wpa_s, + conf->mesh_cc_id = 0; + conf->mesh_sp_id = MESH_SYNC_METHOD_NEIGHBOR_OFFSET; + conf->mesh_auth_id = (conf->security & MESH_CONF_SEC_AUTH) ? 1 : 0; ++ conf->mesh_fwding = ssid->mesh_fwding; + conf->dot11MeshMaxRetries = ssid->dot11MeshMaxRetries; + conf->dot11MeshRetryTimeout = ssid->dot11MeshRetryTimeout; + conf->dot11MeshConfirmTimeout = ssid->dot11MeshConfirmTimeout; +@@ -254,6 +255,7 @@ static int wpa_supplicant_mesh_init(struct wpa_supplicant *wpa_s, + bss->conf->start_disabled = 1; + bss->conf->mesh = MESH_ENABLED; + bss->conf->ap_max_inactivity = wpa_s->conf->mesh_max_inactivity; ++ bss->conf->mesh_fwding = wpa_s->conf->mesh_fwding; + + if (ieee80211_is_dfs(ssid->frequency) && wpa_s->conf->country[0]) { + conf->ieee80211h = 1; +@@ -506,6 +508,10 @@ int wpa_supplicant_join_mesh(struct wpa_supplicant *wpa_s, + } + params->conf.peer_link_timeout = wpa_s->conf->mesh_max_inactivity; + ++ /* always explicitely set forwarding to on or off for now */ ++ params->conf.flags |= WPA_DRIVER_MESH_CONF_FLAG_FORWARDING; ++ params->conf.forwarding = ssid->mesh_fwding; ++ + wpa_s->mesh_params = params; + if (wpa_supplicant_mesh_init(wpa_s, ssid, ¶ms->freq)) { + wpa_msg(wpa_s, MSG_ERROR, "Failed to init mesh"); +diff --git a/wpa_supplicant/mesh_mpm.c b/wpa_supplicant/mesh_mpm.c +index bc3cc5ef9..e7058e646 100644 +--- a/wpa_supplicant/mesh_mpm.c ++++ b/wpa_supplicant/mesh_mpm.c +@@ -288,9 +288,9 @@ static void mesh_mpm_send_plink_action(struct wpa_supplicant *wpa_s, + info = (bss->num_plinks > 63 ? 63 : bss->num_plinks) << 1; + /* TODO: Add Connected to Mesh Gate/AS subfields */ + wpabuf_put_u8(buf, info); +- /* always forwarding & accepting plinks for now */ ++ /* set forwarding & always accepting plinks for now */ + wpabuf_put_u8(buf, MESH_CAP_ACCEPT_ADDITIONAL_PEER | +- MESH_CAP_FORWARDING); ++ (conf->mesh_fwding ? MESH_CAP_FORWARDING : 0)); + } else { /* Peer closing frame */ + /* IE: Mesh ID */ + wpabuf_put_u8(buf, WLAN_EID_MESH_ID); +diff --git a/wpa_supplicant/wpa_supplicant.conf b/wpa_supplicant/wpa_supplicant.conf +index 972e7e73d..e1c475f37 100644 +--- a/wpa_supplicant/wpa_supplicant.conf ++++ b/wpa_supplicant/wpa_supplicant.conf +@@ -153,6 +153,12 @@ ap_scan=1 + # This timeout value is used in mesh STA to clean up inactive stations. + #mesh_max_inactivity=300 + ++# Enable 802.11s layer-2 routing and forwarding ++#mesh_fwding=1 ++ ++# Accept additional peer links ++#mesh_auto_open_plinks=1 ++ + # cert_in_cb - Whether to include a peer certificate dump in events + # This controls whether peer certificates for authentication server and + # its certificate chain are included in EAP peer certificate events. This is +-- +2.17.0 + diff --git a/package/network/services/hostapd/patches/030-rsn_supp-fix-stub-pmksa_cache.patch b/package/network/services/hostapd/patches/030-rsn_supp-fix-stub-pmksa_cache.patch new file mode 100644 index 000000000..bd380765c --- /dev/null +++ b/package/network/services/hostapd/patches/030-rsn_supp-fix-stub-pmksa_cache.patch @@ -0,0 +1,23 @@ +diff --git a/src/rsn_supp/pmksa_cache.h b/src/rsn_supp/pmksa_cache.h +index 626761dea..6c49fa924 100644 +--- a/src/rsn_supp/pmksa_cache.h ++++ b/src/rsn_supp/pmksa_cache.h +@@ -101,7 +101,7 @@ static inline void pmksa_cache_deinit(struct rsn_pmksa_cache *pmksa) + + static inline struct rsn_pmksa_cache_entry * + pmksa_cache_get(struct rsn_pmksa_cache *pmksa, const u8 *aa, const u8 *pmkid, +- const void *network_ctx) ++ const void *network_ctx, int akmp) + { + return NULL; + } +@@ -148,7 +148,8 @@ static inline int pmksa_cache_set_current(struct wpa_sm *sm, const u8 *pmkid, + const u8 *bssid, + void *network_ctx, + int try_opportunistic, +- const u8 *fils_cache_id) ++ const u8 *fils_cache_id, ++ int akmp) + { + return -1; + } diff --git a/package/network/services/hostapd/patches/031-mesh-add-VHT_CHANWIDTH_USE_HT-to-max_oper_chwidth.patch b/package/network/services/hostapd/patches/031-mesh-add-VHT_CHANWIDTH_USE_HT-to-max_oper_chwidth.patch new file mode 100644 index 000000000..30003116e --- /dev/null +++ b/package/network/services/hostapd/patches/031-mesh-add-VHT_CHANWIDTH_USE_HT-to-max_oper_chwidth.patch @@ -0,0 +1,58 @@ +From 838225f2319348e430b553fd9bb3680bd7434ae3 Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Wed, 18 Apr 2018 14:14:18 -0700 +Subject: [PATCH 1/2] mesh: add VHT_CHANWIDTH_USE_HT to max_oper_chwidth + +Channel width in VHT mode refers HT capability when +the width goes down to below 80MHz, hence add checking +HT channel width to its max operation channel width. +So that mesh has capable to select bandwidth below 80Mhz. + +Signed-off-by: Peter Oh +--- + wpa_supplicant/config.c | 1 + + wpa_supplicant/config_ssid.h | 1 + + wpa_supplicant/wpa_supplicant.c | 3 +++ + 3 files changed, 5 insertions(+) + +diff --git a/wpa_supplicant/config.c b/wpa_supplicant/config.c +index f65bbb02f..7e8f014cc 100644 +--- a/wpa_supplicant/config.c ++++ b/wpa_supplicant/config.c +@@ -2798,6 +2798,7 @@ void wpa_config_set_network_defaults(struct wpa_ssid *ssid) + ssid->mka_priority = DEFAULT_PRIO_NOT_KEY_SERVER; + #endif /* CONFIG_MACSEC */ + ssid->mac_addr = -1; ++ ssid->max_oper_chwidth = (u8)DEFAULT_MAX_OPER_CHWIDTH; + } + + +diff --git a/wpa_supplicant/config_ssid.h b/wpa_supplicant/config_ssid.h +index 9fd56c32f..2ddb777b2 100644 +--- a/wpa_supplicant/config_ssid.h ++++ b/wpa_supplicant/config_ssid.h +@@ -37,6 +37,7 @@ + #define DEFAULT_AMPDU_FACTOR -1 /* no change */ + #define DEFAULT_AMPDU_DENSITY -1 /* no change */ + #define DEFAULT_USER_SELECTED_SIM 1 ++#define DEFAULT_MAX_OPER_CHWIDTH -1 + + struct psk_list_entry { + struct dl_list list; +diff --git a/wpa_supplicant/wpa_supplicant.c b/wpa_supplicant/wpa_supplicant.c +index dcd787bec..ca893f942 100644 +--- a/wpa_supplicant/wpa_supplicant.c ++++ b/wpa_supplicant/wpa_supplicant.c +@@ -2293,6 +2293,9 @@ void ibss_mesh_setup_freq(struct wpa_supplicant *wpa_s, + vht_caps |= VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; + seg0 = 114; + } ++ } else if (ssid->max_oper_chwidth == VHT_CHANWIDTH_USE_HT) { ++ chwidth = VHT_CHANWIDTH_USE_HT; ++ seg0 = vht80[j] + 2; + } + + if (hostapd_set_freq_params(&vht_freq, mode->mode, freq->freq, +-- +2.17.0 + diff --git a/package/network/services/hostapd/patches/032-mesh-implement-use-of-VHT20-config-in-mesh-mode.patch b/package/network/services/hostapd/patches/032-mesh-implement-use-of-VHT20-config-in-mesh-mode.patch new file mode 100644 index 000000000..3bd6eaf34 --- /dev/null +++ b/package/network/services/hostapd/patches/032-mesh-implement-use-of-VHT20-config-in-mesh-mode.patch @@ -0,0 +1,87 @@ +From 24fc73b2470ff79cd8c92e029ca785c8e95a204c Mon Sep 17 00:00:00 2001 +From: Peter Oh +Date: Wed, 18 Apr 2018 14:14:19 -0700 +Subject: [PATCH 2/2] mesh: implement use of VHT20 config in mesh mode + +mesh in VHT mode is supposed to be able to use any bandwidth +that 11ac supports, but we don't have a way to set VHT20 +although there are parameters that are supposed to be used. +This patch along with the patch of +"mesh: add VHT_CHANWIDTH_USE_HT to max_oper_chwidth" makes mesh +available to use of any bandwidth using combination of +existing parameters like below shown. + +VHT80: + default + do not set any parameters +VHT40: + max_oper_chwidth = 0 +VHT20: + max_oper_chwidth=0 + disable_ht40=1 +HT40: + disable_vht = 1 +HT20: + disable_ht40 = 1 +disable HT: + disable_ht = 1 + +Signed-off-by: Peter Oh +--- + wpa_supplicant/wpa_supplicant.c | 18 +++++++++++++----- + 1 file changed, 13 insertions(+), 5 deletions(-) + +diff --git a/wpa_supplicant/wpa_supplicant.c b/wpa_supplicant/wpa_supplicant.c +index ca893f942..8429cfd43 100644 +--- a/wpa_supplicant/wpa_supplicant.c ++++ b/wpa_supplicant/wpa_supplicant.c +@@ -2132,9 +2132,15 @@ void ibss_mesh_setup_freq(struct wpa_supplicant *wpa_s, + if (pri_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR)) + return; + ++ freq->channel = pri_chan->chan; ++ + #ifdef CONFIG_HT_OVERRIDES +- if (ssid->disable_ht40) +- return; ++ if (ssid->disable_ht40) { ++ if (ssid->disable_vht) ++ return; ++ else ++ goto skip_ht40; ++ } + #endif /* CONFIG_HT_OVERRIDES */ + + /* Check/setup HT40+/HT40- */ +@@ -2159,8 +2165,6 @@ void ibss_mesh_setup_freq(struct wpa_supplicant *wpa_s, + if (sec_chan->flag & (HOSTAPD_CHAN_DISABLED | HOSTAPD_CHAN_NO_IR)) + return; + +- freq->channel = pri_chan->chan; +- + if (ht40 == -1) { + if (!(pri_chan->flag & HOSTAPD_CHAN_HT40MINUS)) + return; +@@ -2204,6 +2208,7 @@ void ibss_mesh_setup_freq(struct wpa_supplicant *wpa_s, + wpa_scan_results_free(scan_res); + } + ++skip_ht40: + wpa_printf(MSG_DEBUG, + "IBSS/mesh: setup freq channel %d, sec_channel_offset %d", + freq->channel, freq->sec_channel_offset); +@@ -2295,7 +2300,10 @@ void ibss_mesh_setup_freq(struct wpa_supplicant *wpa_s, + } + } else if (ssid->max_oper_chwidth == VHT_CHANWIDTH_USE_HT) { + chwidth = VHT_CHANWIDTH_USE_HT; +- seg0 = vht80[j] + 2; ++ if (ssid->disable_ht40) ++ seg0 = 0; ++ else ++ seg0 = vht80[j] + 2; + } + + if (hostapd_set_freq_params(&vht_freq, mode->mode, freq->freq, +-- +2.17.0 + diff --git a/package/network/services/hostapd/patches/110-no_eapol_fix.patch b/package/network/services/hostapd/patches/110-no_eapol_fix.patch index 3a48a7a95..b8e057e2f 100644 --- a/package/network/services/hostapd/patches/110-no_eapol_fix.patch +++ b/package/network/services/hostapd/patches/110-no_eapol_fix.patch @@ -1,6 +1,6 @@ --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -265,9 +265,10 @@ void wpa_supplicant_cancel_auth_timeout( +@@ -272,9 +272,10 @@ void wpa_supplicant_cancel_auth_timeout( */ void wpa_supplicant_initiate_eapol(struct wpa_supplicant *wpa_s) { diff --git a/package/network/services/hostapd/patches/120-disable_bridge_packet_workaround.patch b/package/network/services/hostapd/patches/120-disable_bridge_packet_workaround.patch index 4a5b63716..090aaaa0d 100644 --- a/package/network/services/hostapd/patches/120-disable_bridge_packet_workaround.patch +++ b/package/network/services/hostapd/patches/120-disable_bridge_packet_workaround.patch @@ -1,6 +1,6 @@ --- a/src/l2_packet/l2_packet_linux.c +++ b/src/l2_packet/l2_packet_linux.c -@@ -340,8 +340,7 @@ struct l2_packet_data * l2_packet_init_b +@@ -360,8 +360,7 @@ struct l2_packet_data * l2_packet_init_b l2 = l2_packet_init(br_ifname, own_addr, protocol, rx_callback, rx_callback_ctx, l2_hdr); diff --git a/package/network/services/hostapd/patches/200-multicall.patch b/package/network/services/hostapd/patches/200-multicall.patch index 0d289d53a..56cb8f95c 100644 --- a/package/network/services/hostapd/patches/200-multicall.patch +++ b/package/network/services/hostapd/patches/200-multicall.patch @@ -36,7 +36,7 @@ LIBS += $(DRV_AP_LIBS) ifdef CONFIG_L2_PACKET -@@ -1204,6 +1210,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) +@@ -1270,6 +1276,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) BCHECK=../src/drivers/build.hostapd @@ -49,7 +49,7 @@ hostapd: $(BCHECK) $(OBJS) $(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS) @$(E) " LD " $@ -@@ -1248,6 +1260,12 @@ ifeq ($(CONFIG_TLS), linux) +@@ -1315,6 +1327,12 @@ ifeq ($(CONFIG_TLS), linux) HOBJS += ../src/crypto/crypto_linux.o endif @@ -72,7 +72,7 @@ ifndef CONFIG_NO_GITVER # Add VERSION_STR postfix for builds from a git repository -@@ -357,7 +358,9 @@ endif +@@ -354,7 +355,9 @@ endif ifdef CONFIG_IBSS_RSN NEED_RSN_AUTHENTICATOR=y CFLAGS += -DCONFIG_IBSS_RSN @@ -82,7 +82,7 @@ OBJS += ibss_rsn.o endif -@@ -861,6 +864,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS +@@ -862,6 +865,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS CFLAGS += -DCONFIG_DYNAMIC_EAP_METHODS LIBS += -ldl -rdynamic endif @@ -93,7 +93,7 @@ endif ifdef CONFIG_AP -@@ -868,9 +875,11 @@ NEED_EAP_COMMON=y +@@ -869,9 +876,11 @@ NEED_EAP_COMMON=y NEED_RSN_AUTHENTICATOR=y CFLAGS += -DCONFIG_AP OBJS += ap.o @@ -105,7 +105,7 @@ OBJS += ../src/ap/hostapd.o OBJS += ../src/ap/wpa_auth_glue.o OBJS += ../src/ap/utils.o -@@ -952,6 +961,12 @@ endif +@@ -953,6 +962,12 @@ endif ifdef CONFIG_HS20 OBJS += ../src/ap/hs20.o endif @@ -118,7 +118,7 @@ endif ifdef CONFIG_MBO -@@ -960,7 +975,9 @@ CFLAGS += -DCONFIG_MBO +@@ -961,7 +976,9 @@ CFLAGS += -DCONFIG_MBO endif ifdef NEED_RSN_AUTHENTICATOR @@ -128,7 +128,7 @@ NEED_AES_WRAP=y OBJS += ../src/ap/wpa_auth.o OBJS += ../src/ap/wpa_auth_ie.o -@@ -1835,6 +1852,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) +@@ -1887,6 +1904,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) $(OBJS_c) $(OBJS_t) $(OBJS_t2) $(OBJS) $(BCHECK) $(EXTRA_progs): .config @@ -141,7 +141,7 @@ wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs) $(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS) @$(E) " LD " $@ -@@ -1937,6 +1960,12 @@ endif +@@ -1989,6 +2012,12 @@ endif -e 's|\@DBUS_INTERFACE\@|$(DBUS_INTERFACE)|g' $< >$@ @$(E) " sed" $< @@ -156,7 +156,7 @@ wpa_cli.exe: wpa_cli --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -5317,8 +5317,8 @@ union wpa_event_data { +@@ -5428,8 +5428,8 @@ union wpa_event_data { * Driver wrapper code should call this function whenever an event is received * from the driver. */ @@ -167,7 +167,7 @@ /** * wpa_supplicant_event_global - Report a driver event for wpa_supplicant -@@ -5330,7 +5330,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -5441,7 +5441,7 @@ void wpa_supplicant_event(void *ctx, enu * Same as wpa_supplicant_event(), but we search for the interface in * wpa_global. */ @@ -178,7 +178,7 @@ /* --- a/src/ap/drv_callbacks.c +++ b/src/ap/drv_callbacks.c -@@ -1375,8 +1375,8 @@ static void hostapd_event_dfs_cac_starte +@@ -1473,8 +1473,8 @@ static void hostapd_event_dfs_cac_starte #endif /* NEED_AP_MLME */ @@ -189,7 +189,7 @@ { struct hostapd_data *hapd = ctx; #ifndef CONFIG_NO_STDOUT_DEBUG -@@ -1590,7 +1590,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -1694,7 +1694,7 @@ void wpa_supplicant_event(void *ctx, enu } @@ -211,7 +211,7 @@ { struct wpa_priv_interface *iface = ctx; -@@ -1101,7 +1101,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -1095,7 +1095,7 @@ void wpa_supplicant_event(void *ctx, enu } @@ -220,7 +220,7 @@ union wpa_event_data *data) { struct wpa_priv_global *global = ctx; -@@ -1213,6 +1213,8 @@ int main(int argc, char *argv[]) +@@ -1207,6 +1207,8 @@ int main(int argc, char *argv[]) if (os_program_init()) return -1; @@ -231,7 +231,7 @@ os_memset(&global, 0, sizeof(global)); --- a/wpa_supplicant/events.c +++ b/wpa_supplicant/events.c -@@ -3709,8 +3709,8 @@ static void wpa_supplicant_event_assoc_a +@@ -3812,8 +3812,8 @@ static void wpa_supplicant_event_assoc_a } @@ -242,7 +242,7 @@ { struct wpa_supplicant *wpa_s = ctx; int resched; -@@ -4466,7 +4466,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -4632,7 +4632,7 @@ void wpa_supplicant_event(void *ctx, enu } @@ -253,7 +253,7 @@ struct wpa_supplicant *wpa_s; --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -5457,7 +5457,6 @@ struct wpa_interface * wpa_supplicant_ma +@@ -5725,7 +5725,6 @@ struct wpa_interface * wpa_supplicant_ma return NULL; } @@ -261,7 +261,7 @@ /** * wpa_supplicant_match_existing - Match existing interfaces * @global: Pointer to global data from wpa_supplicant_init() -@@ -5494,6 +5493,11 @@ static int wpa_supplicant_match_existing +@@ -5762,6 +5761,11 @@ static int wpa_supplicant_match_existing #endif /* CONFIG_MATCH_IFACE */ @@ -273,7 +273,7 @@ /** * wpa_supplicant_add_iface - Add a new network interface -@@ -5750,6 +5754,8 @@ struct wpa_global * wpa_supplicant_init( +@@ -6018,6 +6022,8 @@ struct wpa_global * wpa_supplicant_init( #ifndef CONFIG_NO_WPA_MSG wpa_msg_register_ifname_cb(wpa_supplicant_msg_ifname_cb); #endif /* CONFIG_NO_WPA_MSG */ @@ -284,7 +284,7 @@ wpa_debug_open_file(params->wpa_debug_file_path); --- a/hostapd/main.c +++ b/hostapd/main.c -@@ -590,6 +590,11 @@ fail: +@@ -591,6 +591,11 @@ fail: return -1; } @@ -296,9 +296,9 @@ #ifdef CONFIG_WPS static int gen_uuid(const char *txt_addr) -@@ -670,6 +675,8 @@ int main(int argc, char *argv[]) - dl_list_init(&interfaces.eth_p_oui); - #endif /* CONFIG_ETH_P_OUI */ +@@ -674,6 +679,8 @@ int main(int argc, char *argv[]) + hostapd_dpp_init_global(&interfaces); + #endif /* CONFIG_DPP */ + wpa_supplicant_event = hostapd_wpa_event; + wpa_supplicant_event_global = hostapd_wpa_event_global; diff --git a/package/network/services/hostapd/patches/300-noscan.patch b/package/network/services/hostapd/patches/300-noscan.patch index c8ca3694c..e064ad7eb 100644 --- a/package/network/services/hostapd/patches/300-noscan.patch +++ b/package/network/services/hostapd/patches/300-noscan.patch @@ -1,6 +1,6 @@ --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3016,6 +3016,10 @@ static int hostapd_config_fill(struct ho +@@ -3131,6 +3131,10 @@ static int hostapd_config_fill(struct ho } #endif /* CONFIG_IEEE80211W */ #ifdef CONFIG_IEEE80211N @@ -13,7 +13,7 @@ } else if (os_strcmp(buf, "ht_capab") == 0) { --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h -@@ -735,6 +735,8 @@ struct hostapd_config { +@@ -761,6 +761,8 @@ struct hostapd_config { int ht_op_mode_fixed; u16 ht_capab; @@ -36,17 +36,17 @@ hostapd_set_state(iface, HAPD_IFACE_HT_SCAN); --- a/src/ap/ieee802_11_ht.c +++ b/src/ap/ieee802_11_ht.c -@@ -244,6 +244,9 @@ void hostapd_2040_coex_action(struct hos - if (!(iface->conf->ht_capab & HT_CAP_INFO_SUPP_CHANNEL_WIDTH_SET)) +@@ -252,6 +252,9 @@ void hostapd_2040_coex_action(struct hos return; + } + if (iface->conf->noscan || iface->conf->no_ht_coex) + return; + - if (len < IEEE80211_HDRLEN + 2 + sizeof(*bc_ie)) - return; - -@@ -368,6 +371,9 @@ void ht40_intolerant_add(struct hostapd_ + if (len < IEEE80211_HDRLEN + 2 + sizeof(*bc_ie)) { + wpa_printf(MSG_DEBUG, + "Ignore too short 20/40 BSS Coexistence Management frame"); +@@ -412,6 +415,9 @@ void ht40_intolerant_add(struct hostapd_ if (iface->current_mode->mode != HOSTAPD_MODE_IEEE80211G) return; diff --git a/package/network/services/hostapd/patches/301-mesh-noscan.patch b/package/network/services/hostapd/patches/301-mesh-noscan.patch new file mode 100644 index 000000000..09b67a392 --- /dev/null +++ b/package/network/services/hostapd/patches/301-mesh-noscan.patch @@ -0,0 +1,78 @@ +Index: hostapd-2018-04-09-fa617ee6/wpa_supplicant/config.c +=================================================================== +--- hostapd-2018-04-09-fa617ee6.orig/wpa_supplicant/config.c ++++ hostapd-2018-04-09-fa617ee6/wpa_supplicant/config.c +@@ -2216,6 +2216,7 @@ static const struct parse_data ssid_fiel + #else /* CONFIG_MESH */ + { INT_RANGE(mode, 0, 4) }, + #endif /* CONFIG_MESH */ ++ { INT_RANGE(noscan, 0, 1) }, + { INT_RANGE(proactive_key_caching, 0, 1) }, + { INT_RANGE(disabled, 0, 2) }, + { STR(id_str) }, +Index: hostapd-2018-04-09-fa617ee6/wpa_supplicant/config_file.c +=================================================================== +--- hostapd-2018-04-09-fa617ee6.orig/wpa_supplicant/config_file.c ++++ hostapd-2018-04-09-fa617ee6/wpa_supplicant/config_file.c +@@ -816,6 +816,7 @@ static void wpa_config_write_network(FIL + #endif /* IEEE8021X_EAPOL */ + INT(mode); + INT(no_auto_peer); ++ INT(noscan); + INT(mesh_fwding); + INT(frequency); + INT(fixed_freq); +Index: hostapd-2018-04-09-fa617ee6/wpa_supplicant/mesh.c +=================================================================== +--- hostapd-2018-04-09-fa617ee6.orig/wpa_supplicant/mesh.c ++++ hostapd-2018-04-09-fa617ee6/wpa_supplicant/mesh.c +@@ -287,6 +287,8 @@ static int wpa_supplicant_mesh_init(stru + frequency); + goto out_free; + } ++ if (ssid->noscan) ++ conf->noscan = 1; + if (ssid->ht40) + conf->secondary_channel = ssid->ht40; + if (conf->hw_mode == HOSTAPD_MODE_IEEE80211A && ssid->vht) { +Index: hostapd-2018-04-09-fa617ee6/wpa_supplicant/wpa_supplicant.c +=================================================================== +--- hostapd-2018-04-09-fa617ee6.orig/wpa_supplicant/wpa_supplicant.c ++++ hostapd-2018-04-09-fa617ee6/wpa_supplicant/wpa_supplicant.c +@@ -2024,12 +2024,12 @@ void ibss_mesh_setup_freq(struct wpa_sup + { + enum hostapd_hw_mode hw_mode; + struct hostapd_hw_modes *mode = NULL; +- int ht40plus[] = { 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, ++ int ht40plus[] = { 1, 2, 3, 4, 5, 6, 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, + 184, 192 }; + int vht80[] = { 36, 52, 100, 116, 132, 149 }; + struct hostapd_channel_data *pri_chan = NULL, *sec_chan = NULL; + u8 channel; +- int i, chan_idx, ht40 = -1, res, obss_scan = 1; ++ int i, chan_idx, ht40 = -1, res, obss_scan = !(ssid->noscan); + unsigned int j, k; + struct hostapd_freq_params vht_freq; + int chwidth, seg0, seg1; +@@ -2099,7 +2099,7 @@ void ibss_mesh_setup_freq(struct wpa_sup + return; + + /* Setup higher BW only for 5 GHz */ +- if (mode->mode != HOSTAPD_MODE_IEEE80211A) ++ if (mode->mode != HOSTAPD_MODE_IEEE80211A && !(ssid->noscan)) + return; + + for (chan_idx = 0; chan_idx < mode->num_channels; chan_idx++) { +Index: hostapd-2018-04-09-fa617ee6/wpa_supplicant/config_ssid.h +=================================================================== +--- hostapd-2018-04-09-fa617ee6.orig/wpa_supplicant/config_ssid.h ++++ hostapd-2018-04-09-fa617ee6/wpa_supplicant/config_ssid.h +@@ -835,6 +835,8 @@ struct wpa_ssid { + */ + int no_auto_peer; + ++ int noscan; ++ + /** + * mesh_rssi_threshold - Set mesh parameter mesh_rssi_threshold (dBm) + * diff --git a/package/network/services/hostapd/patches/310-rescan_immediately.patch b/package/network/services/hostapd/patches/310-rescan_immediately.patch index 6846db275..f4ee1d1f6 100644 --- a/package/network/services/hostapd/patches/310-rescan_immediately.patch +++ b/package/network/services/hostapd/patches/310-rescan_immediately.patch @@ -1,6 +1,6 @@ --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -3927,7 +3927,7 @@ wpa_supplicant_alloc(struct wpa_supplica +@@ -4176,7 +4176,7 @@ wpa_supplicant_alloc(struct wpa_supplica if (wpa_s == NULL) return NULL; wpa_s->scan_req = INITIAL_SCAN_REQ; diff --git a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch index 3bc916b6b..6aa8d1a3a 100644 --- a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch +++ b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch @@ -1,6 +1,6 @@ --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -4152,7 +4152,7 @@ static int nl80211_set_channel(struct i8 +@@ -4234,7 +4234,7 @@ static int nl80211_set_channel(struct i8 freq->freq, freq->ht_enabled, freq->vht_enabled, freq->bandwidth, freq->center_freq1, freq->center_freq2); diff --git a/package/network/services/hostapd/patches/340-reload_freq_change.patch b/package/network/services/hostapd/patches/340-reload_freq_change.patch index f05b9147b..87c30976d 100644 --- a/package/network/services/hostapd/patches/340-reload_freq_change.patch +++ b/package/network/services/hostapd/patches/340-reload_freq_change.patch @@ -1,6 +1,6 @@ --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -87,6 +87,25 @@ static void hostapd_reload_bss(struct ho +@@ -90,6 +90,25 @@ static void hostapd_reload_bss(struct ho #endif /* CONFIG_NO_RADIUS */ ssid = &hapd->conf->ssid; @@ -26,7 +26,7 @@ if (!ssid->wpa_psk_set && ssid->wpa_psk && !ssid->wpa_psk->next && ssid->wpa_passphrase_set && ssid->wpa_passphrase) { /* -@@ -165,6 +184,7 @@ int hostapd_reload_config(struct hostapd +@@ -168,6 +187,7 @@ int hostapd_reload_config(struct hostapd struct hostapd_data *hapd = iface->bss[0]; struct hostapd_config *newconf, *oldconf; size_t j; @@ -34,7 +34,7 @@ if (iface->config_fname == NULL) { /* Only in-memory config in use - assume it has been updated */ -@@ -186,21 +206,20 @@ int hostapd_reload_config(struct hostapd +@@ -189,21 +209,20 @@ int hostapd_reload_config(struct hostapd oldconf = hapd->iconf; iface->conf = newconf; diff --git a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch index 92e6ae9ae..2cf92c8a1 100644 --- a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch +++ b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch @@ -1,6 +1,6 @@ --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -2536,10 +2536,15 @@ static int wpa_driver_nl80211_del_beacon +@@ -2566,10 +2566,15 @@ static int wpa_driver_nl80211_del_beacon struct nl_msg *msg; struct wpa_driver_nl80211_data *drv = bss->drv; @@ -18,7 +18,7 @@ return send_and_recv_msgs(drv, msg, NULL, NULL); } -@@ -4753,7 +4758,7 @@ static void nl80211_teardown_ap(struct i +@@ -4835,7 +4840,7 @@ static void nl80211_teardown_ap(struct i nl80211_mgmt_unsubscribe(bss, "AP teardown"); nl80211_put_wiphy_data_ap(bss); @@ -27,7 +27,7 @@ } -@@ -6853,8 +6858,6 @@ static int wpa_driver_nl80211_if_remove( +@@ -7040,8 +7045,6 @@ static int wpa_driver_nl80211_if_remove( } else { wpa_printf(MSG_DEBUG, "nl80211: First BSS - reassign context"); nl80211_teardown_ap(bss); @@ -36,7 +36,7 @@ nl80211_destroy_bss(bss); if (!bss->added_if) i802_set_iface_flags(bss, 0); -@@ -7225,7 +7228,6 @@ static int wpa_driver_nl80211_deinit_ap( +@@ -7415,7 +7418,6 @@ static int wpa_driver_nl80211_deinit_ap( if (!is_ap_interface(drv->nlmode)) return -1; wpa_driver_nl80211_del_beacon(bss); @@ -44,7 +44,7 @@ /* * If the P2P GO interface was dynamically added, then it is -@@ -7245,7 +7247,6 @@ static int wpa_driver_nl80211_stop_ap(vo +@@ -7435,7 +7437,6 @@ static int wpa_driver_nl80211_stop_ap(vo if (!is_ap_interface(drv->nlmode)) return -1; wpa_driver_nl80211_del_beacon(bss); diff --git a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch b/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch index 043ddbf88..e7fc814d6 100644 --- a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch +++ b/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch @@ -1,6 +1,6 @@ --- a/hostapd/ctrl_iface.c +++ b/hostapd/ctrl_iface.c -@@ -56,6 +56,7 @@ +@@ -60,6 +60,7 @@ #include "fst/fst_ctrl_iface.h" #include "config_file.h" #include "ctrl_iface.h" @@ -8,7 +8,7 @@ #define HOSTAPD_CLI_DUP_VALUE_MAX_LEN 256 -@@ -74,6 +75,7 @@ static void hostapd_ctrl_iface_send(stru +@@ -78,6 +79,7 @@ static void hostapd_ctrl_iface_send(stru enum wpa_msg_type type, const char *buf, size_t len); @@ -16,7 +16,7 @@ static int hostapd_ctrl_iface_attach(struct hostapd_data *hapd, struct sockaddr_storage *from, -@@ -125,6 +127,61 @@ static int hostapd_ctrl_iface_new_sta(st +@@ -129,6 +131,61 @@ static int hostapd_ctrl_iface_new_sta(st return 0; } @@ -78,7 +78,7 @@ #ifdef CONFIG_IEEE80211W #ifdef NEED_AP_MLME -@@ -2607,6 +2664,8 @@ static int hostapd_ctrl_iface_receive_pr +@@ -3026,6 +3083,8 @@ static int hostapd_ctrl_iface_receive_pr } else if (os_strncmp(buf, "VENDOR ", 7) == 0) { reply_len = hostapd_ctrl_iface_vendor(hapd, buf + 7, reply, reply_size); @@ -89,7 +89,7 @@ #ifdef RADIUS_SERVER --- a/src/ap/ctrl_iface_ap.c +++ b/src/ap/ctrl_iface_ap.c -@@ -624,7 +624,13 @@ int hostapd_parse_csa_settings(const cha +@@ -857,7 +857,13 @@ int hostapd_parse_csa_settings(const cha int hostapd_ctrl_iface_stop_ap(struct hostapd_data *hapd) { diff --git a/package/network/services/hostapd/patches/370-ap_sta_support.patch b/package/network/services/hostapd/patches/370-ap_sta_support.patch index a37b193b6..f8cd34b00 100644 --- a/package/network/services/hostapd/patches/370-ap_sta_support.patch +++ b/package/network/services/hostapd/patches/370-ap_sta_support.patch @@ -12,7 +12,7 @@ * bridge_ifname - Optional bridge interface name * * If the driver interface (ifname) is included in a Linux bridge -@@ -512,6 +517,8 @@ struct wpa_supplicant { +@@ -513,6 +518,8 @@ struct wpa_supplicant { #endif /* CONFIG_CTRL_IFACE_BINDER */ char bridge_ifname[16]; @@ -45,8 +45,8 @@ CONFIG_OS=win32 --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -118,6 +118,55 @@ const char *const wpa_supplicant_full_li - static void wpa_bss_tmp_disallow_timeout(void *eloop_ctx, void *timeout_ctx); +@@ -125,6 +125,55 @@ static void wpas_update_fils_connect_par + #endif /* CONFIG_FILS && IEEE8021X_EAPOL */ +static int hostapd_stop(struct wpa_supplicant *wpa_s) @@ -101,12 +101,16 @@ /* Configure default/group WEP keys for static WEP */ int wpa_set_wep_keys(struct wpa_supplicant *wpa_s, struct wpa_ssid *ssid) { -@@ -883,8 +932,12 @@ void wpa_supplicant_set_state(struct wpa - wpas_p2p_completed(wpa_s); +@@ -893,12 +942,16 @@ void wpa_supplicant_set_state(struct wpa sme_sched_obss_scan(wpa_s, 1); + + if (wpa_s->hostapd) + hostapd_reload(wpa_s, wpa_s->current_bss); + #if defined(CONFIG_FILS) && defined(IEEE8021X_EAPOL) + if (!fils_hlp_sent && ssid && ssid->eap.erp) + wpas_update_fils_connect_params(wpa_s); + #endif /* CONFIG_FILS && IEEE8021X_EAPOL */ } else if (state == WPA_DISCONNECTED || state == WPA_ASSOCIATING || state == WPA_ASSOCIATED) { + if (wpa_s->hostapd) @@ -114,7 +118,7 @@ wpa_s->new_connection = 1; wpa_drv_set_operstate(wpa_s, 0); #ifndef IEEE8021X_EAPOL -@@ -5080,6 +5133,20 @@ static int wpa_supplicant_init_iface(str +@@ -5351,6 +5404,20 @@ static int wpa_supplicant_init_iface(str sizeof(wpa_s->bridge_ifname)); } @@ -135,7 +139,7 @@ /* RSNA Supplicant Key Management - INITIALIZE */ eapol_sm_notify_portEnabled(wpa_s->eapol, FALSE); eapol_sm_notify_portValid(wpa_s->eapol, FALSE); -@@ -5404,6 +5471,11 @@ static void wpa_supplicant_deinit_iface( +@@ -5672,6 +5739,11 @@ static void wpa_supplicant_deinit_iface( if (terminate) wpa_msg(wpa_s, MSG_INFO, WPA_EVENT_TERMINATING); diff --git a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch b/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch index e977f00a2..93ac40e9b 100644 --- a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch +++ b/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch @@ -12,7 +12,7 @@ else --- a/hostapd/ctrl_iface.c +++ b/hostapd/ctrl_iface.c -@@ -2458,6 +2458,7 @@ static int hostapd_ctrl_iface_receive_pr +@@ -2852,6 +2852,7 @@ static int hostapd_ctrl_iface_receive_pr reply_size); } else if (os_strcmp(buf, "STATUS-DRIVER") == 0) { reply_len = hostapd_drv_status(hapd, reply, reply_size); @@ -20,17 +20,17 @@ } else if (os_strcmp(buf, "MIB") == 0) { reply_len = ieee802_11_get_mib(hapd, reply, reply_size); if (reply_len >= 0) { -@@ -2499,6 +2500,7 @@ static int hostapd_ctrl_iface_receive_pr +@@ -2893,6 +2894,7 @@ static int hostapd_ctrl_iface_receive_pr } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { reply_len = hostapd_ctrl_iface_sta_next(hapd, buf + 9, reply, reply_size); +#endif } else if (os_strcmp(buf, "ATTACH") == 0) { - if (hostapd_ctrl_iface_attach(hapd, from, fromlen)) + if (hostapd_ctrl_iface_attach(hapd, from, fromlen, NULL)) reply_len = -1; --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -926,6 +926,9 @@ ifdef CONFIG_FILS +@@ -927,6 +927,9 @@ ifdef CONFIG_FILS OBJS += ../src/ap/fils_hlp.o endif ifdef CONFIG_CTRL_IFACE @@ -42,7 +42,7 @@ --- a/wpa_supplicant/ctrl_iface.c +++ b/wpa_supplicant/ctrl_iface.c -@@ -2070,7 +2070,7 @@ static int wpa_supplicant_ctrl_iface_sta +@@ -2108,7 +2108,7 @@ static int wpa_supplicant_ctrl_iface_sta pos += ret; } @@ -51,7 +51,7 @@ if (wpa_s->ap_iface) { pos += ap_ctrl_iface_wpa_get_status(wpa_s, pos, end - pos, -@@ -9631,6 +9631,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -9809,6 +9809,7 @@ char * wpa_supplicant_ctrl_iface_process reply_len = -1; } else if (os_strncmp(buf, "NOTE ", 5) == 0) { wpa_printf(MSG_INFO, "NOTE: %s", buf + 5); @@ -59,7 +59,7 @@ } else if (os_strcmp(buf, "MIB") == 0) { reply_len = wpa_sm_get_mib(wpa_s->wpa, reply, reply_size); if (reply_len >= 0) { -@@ -9638,6 +9639,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -9816,6 +9817,7 @@ char * wpa_supplicant_ctrl_iface_process reply + reply_len, reply_size - reply_len); } @@ -67,7 +67,7 @@ } else if (os_strncmp(buf, "STATUS", 6) == 0) { reply_len = wpa_supplicant_ctrl_iface_status( wpa_s, buf + 6, reply, reply_size); -@@ -10124,6 +10126,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -10297,6 +10299,7 @@ char * wpa_supplicant_ctrl_iface_process reply_len = wpa_supplicant_ctrl_iface_bss( wpa_s, buf + 4, reply, reply_size); #ifdef CONFIG_AP @@ -75,7 +75,7 @@ } else if (os_strcmp(buf, "STA-FIRST") == 0) { reply_len = ap_ctrl_iface_sta_first(wpa_s, reply, reply_size); } else if (os_strncmp(buf, "STA ", 4) == 0) { -@@ -10132,12 +10135,15 @@ char * wpa_supplicant_ctrl_iface_process +@@ -10305,12 +10308,15 @@ char * wpa_supplicant_ctrl_iface_process } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { reply_len = ap_ctrl_iface_sta_next(wpa_s, buf + 9, reply, reply_size); @@ -99,9 +99,9 @@ +#ifdef CONFIG_CTRL_IFACE_MIB - static int hostapd_get_sta_tx_rx(struct hostapd_data *hapd, - struct sta_info *sta, -@@ -250,6 +251,7 @@ int hostapd_ctrl_iface_sta_next(struct h + static size_t hostapd_write_ht_mcs_bitmask(char *buf, size_t buflen, + size_t curr_len, const u8 *mcs_set) +@@ -408,6 +409,7 @@ int hostapd_ctrl_iface_sta_next(struct h return hostapd_ctrl_iface_sta_mib(hapd, sta->next, buf, buflen); } @@ -109,9 +109,24 @@ #ifdef CONFIG_P2P_MANAGER static int p2p_manager_disconnect(struct hostapd_data *hapd, u16 stype, +@@ -746,12 +748,12 @@ int hostapd_ctrl_iface_status(struct hos + return len; + len += ret; + } +- ++#ifdef CONFIG_CTRL_IFACE_MIB + if (iface->conf->ieee80211n && !hapd->conf->disable_11n && mode) { + len = hostapd_write_ht_mcs_bitmask(buf, buflen, len, + mode->mcs_set); + } +- ++#endif /* CONFIG_CTRL_IFACE_MIB */ + if (iface->current_rates && iface->num_rates) { + ret = os_snprintf(buf + len, buflen - len, "supported_rates="); + if (os_snprintf_error(buflen - len, ret)) --- a/src/ap/ieee802_1x.c +++ b/src/ap/ieee802_1x.c -@@ -2492,6 +2492,7 @@ static const char * bool_txt(Boolean val +@@ -2504,6 +2504,7 @@ static const char * bool_txt(Boolean val return val ? "TRUE" : "FALSE"; } @@ -119,7 +134,7 @@ int ieee802_1x_get_mib(struct hostapd_data *hapd, char *buf, size_t buflen) { -@@ -2667,6 +2668,7 @@ int ieee802_1x_get_mib_sta(struct hostap +@@ -2679,6 +2680,7 @@ int ieee802_1x_get_mib_sta(struct hostap return len; } @@ -129,7 +144,7 @@ static void ieee802_1x_wnm_notif_send(void *eloop_ctx, void *timeout_ctx) --- a/src/ap/wpa_auth.c +++ b/src/ap/wpa_auth.c -@@ -3780,6 +3780,7 @@ static const char * wpa_bool_txt(int val +@@ -3772,6 +3772,7 @@ static const char * wpa_bool_txt(int val return val ? "TRUE" : "FALSE"; } @@ -137,7 +152,7 @@ #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ -@@ -3924,7 +3925,7 @@ int wpa_get_mib_sta(struct wpa_state_mac +@@ -3916,7 +3917,7 @@ int wpa_get_mib_sta(struct wpa_state_mac return len; } @@ -148,7 +163,7 @@ { --- a/src/rsn_supp/wpa.c +++ b/src/rsn_supp/wpa.c -@@ -2356,6 +2356,8 @@ static u32 wpa_key_mgmt_suite(struct wpa +@@ -2295,6 +2295,8 @@ static u32 wpa_key_mgmt_suite(struct wpa } @@ -157,7 +172,7 @@ #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ ((s) >> 24) & 0xff, ((s) >> 16) & 0xff, ((s) >> 8) & 0xff, (s) & 0xff -@@ -2439,6 +2441,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch +@@ -2378,6 +2380,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch return (int) len; } @@ -167,7 +182,7 @@ --- a/wpa_supplicant/ap.c +++ b/wpa_supplicant/ap.c -@@ -1139,7 +1139,7 @@ int wpas_ap_wps_nfc_report_handover(stru +@@ -1170,7 +1170,7 @@ int wpas_ap_wps_nfc_report_handover(stru #endif /* CONFIG_WPS */ diff --git a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch b/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch index 8f7a6879c..164662719 100644 --- a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch +++ b/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch @@ -1,6 +1,6 @@ --- a/src/common/wpa_common.c +++ b/src/common/wpa_common.c -@@ -1675,6 +1675,31 @@ u32 wpa_akm_to_suite(int akm) +@@ -1849,6 +1849,31 @@ u32 wpa_akm_to_suite(int akm) } @@ -32,7 +32,7 @@ int wpa_compare_rsn_ie(int ft_initial_assoc, const u8 *ie1, size_t ie1len, const u8 *ie2, size_t ie2len) -@@ -1682,8 +1707,19 @@ int wpa_compare_rsn_ie(int ft_initial_as +@@ -1856,8 +1881,19 @@ int wpa_compare_rsn_ie(int ft_initial_as if (ie1 == NULL || ie2 == NULL) return -1; diff --git a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch b/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch index c10176371..ea144f4de 100644 --- a/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch +++ b/package/network/services/hostapd/patches/400-wps_single_auth_enc_type.patch @@ -10,8 +10,8 @@ bss->wpa_pairwise |= WPA_CIPHER_TKIP; bss->rsn_pairwise = bss->wpa_pairwise; bss->wpa_group = wpa_select_ap_group_cipher(bss->wpa, -@@ -1067,8 +1066,7 @@ int hostapd_init_wps(struct hostapd_data - if (conf->rsn_pairwise & (WPA_CIPHER_CCMP | WPA_CIPHER_GCMP)) { +@@ -1069,8 +1068,7 @@ int hostapd_init_wps(struct hostapd_data + WPA_CIPHER_GCMP_256)) { wps->encr_types |= WPS_ENCR_AES; wps->encr_types_rsn |= WPS_ENCR_AES; - } diff --git a/package/network/services/hostapd/patches/420-indicate-features.patch b/package/network/services/hostapd/patches/420-indicate-features.patch index 2b529ca3e..d582c8574 100644 --- a/package/network/services/hostapd/patches/420-indicate-features.patch +++ b/package/network/services/hostapd/patches/420-indicate-features.patch @@ -8,7 +8,7 @@ #include "crypto/random.h" #include "crypto/tls.h" #include "common/version.h" -@@ -678,7 +679,7 @@ int main(int argc, char *argv[]) +@@ -682,7 +683,7 @@ int main(int argc, char *argv[]) wpa_supplicant_event = hostapd_wpa_event; wpa_supplicant_event_global = hostapd_wpa_event_global; for (;;) { @@ -17,7 +17,7 @@ if (c < 0) break; switch (c) { -@@ -715,6 +716,8 @@ int main(int argc, char *argv[]) +@@ -719,6 +720,8 @@ int main(int argc, char *argv[]) break; #endif /* CONFIG_DEBUG_LINUX_TRACING */ case 'v': diff --git a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch b/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch index 32cab7ff6..c1882d84a 100644 --- a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch +++ b/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch @@ -16,7 +16,7 @@ static int hostapd_cli_cmd_disassoc_imminent(struct wpa_ctrl *ctrl, int argc, -@@ -1476,7 +1474,6 @@ static const struct hostapd_cli_cmd host +@@ -1518,7 +1516,6 @@ static const struct hostapd_cli_cmd host { "sa_query", hostapd_cli_cmd_sa_query, hostapd_complete_stations, " = send SA Query to a station" }, #endif /* CONFIG_IEEE80211W */ @@ -24,7 +24,7 @@ { "wps_pin", hostapd_cli_cmd_wps_pin, NULL, " [timeout] [addr] = add WPS Enrollee PIN" }, { "wps_check_pin", hostapd_cli_cmd_wps_check_pin, NULL, -@@ -1501,7 +1498,6 @@ static const struct hostapd_cli_cmd host +@@ -1543,7 +1540,6 @@ static const struct hostapd_cli_cmd host " = configure AP" }, { "wps_get_status", hostapd_cli_cmd_wps_get_status, NULL, "= show current WPS status" }, diff --git a/package/network/services/hostapd/patches/450-scan_wait.patch b/package/network/services/hostapd/patches/450-scan_wait.patch index 463a36291..9620ecc52 100644 --- a/package/network/services/hostapd/patches/450-scan_wait.patch +++ b/package/network/services/hostapd/patches/450-scan_wait.patch @@ -1,6 +1,6 @@ --- a/hostapd/main.c +++ b/hostapd/main.c -@@ -37,6 +37,8 @@ struct hapd_global { +@@ -38,6 +38,8 @@ struct hapd_global { }; static struct hapd_global global; @@ -9,7 +9,7 @@ #ifndef CONFIG_NO_HOSTAPD_LOGGER -@@ -147,6 +149,14 @@ static void hostapd_logger_cb(void *ctx, +@@ -148,6 +150,14 @@ static void hostapd_logger_cb(void *ctx, } #endif /* CONFIG_NO_HOSTAPD_LOGGER */ @@ -24,7 +24,7 @@ /** * hostapd_driver_init - Preparate driver interface -@@ -165,6 +175,8 @@ static int hostapd_driver_init(struct ho +@@ -166,6 +176,8 @@ static int hostapd_driver_init(struct ho return -1; } @@ -33,7 +33,7 @@ /* Initialize the driver interface */ if (!(b[0] | b[1] | b[2] | b[3] | b[4] | b[5])) b = NULL; -@@ -405,8 +417,6 @@ static void hostapd_global_deinit(const +@@ -406,8 +418,6 @@ static void hostapd_global_deinit(const #endif /* CONFIG_NATIVE_WINDOWS */ eap_server_unregister_methods(); @@ -42,7 +42,7 @@ } -@@ -432,18 +442,6 @@ static int hostapd_global_run(struct hap +@@ -433,18 +443,6 @@ static int hostapd_global_run(struct hap } #endif /* EAP_SERVER_TNC */ @@ -61,7 +61,7 @@ eloop_run(); return 0; -@@ -645,8 +643,7 @@ int main(int argc, char *argv[]) +@@ -646,8 +644,7 @@ int main(int argc, char *argv[]) struct hapd_interfaces interfaces; int ret = 1; size_t i, j; diff --git a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch index 213ee6d72..cab0325dd 100644 --- a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch +++ b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch @@ -42,8 +42,8 @@ Signed-hostap: Antonio Quartulli #include "config.h" -@@ -1985,6 +1986,97 @@ static char * wpa_config_write_mka_ckn(c - #endif /* CONFIG_MACSEC */ +@@ -2037,6 +2038,97 @@ static char * wpa_config_write_peerkey(c + #endif /* NO_CONFIG_WRITE */ +static int wpa_config_parse_mcast_rate(const struct parse_data *data, @@ -140,7 +140,7 @@ Signed-hostap: Antonio Quartulli /* Helper macros for network block parser */ #ifdef OFFSET -@@ -2224,6 +2316,8 @@ static const struct parse_data ssid_fiel +@@ -2279,6 +2371,8 @@ static const struct parse_data ssid_fiel { INT(ap_max_inactivity) }, { INT(dtim_period) }, { INT(beacon_int) }, @@ -162,7 +162,7 @@ Signed-hostap: Antonio Quartulli #define DEFAULT_EAP_WORKAROUND ((unsigned int) -1) -@@ -735,6 +737,9 @@ struct wpa_ssid { +@@ -743,6 +745,9 @@ struct wpa_ssid { */ void *parent_cred; @@ -174,7 +174,7 @@ Signed-hostap: Antonio Quartulli * macsec_policy - Determines the policy for MACsec secure session --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -2781,6 +2781,12 @@ static void wpas_start_assoc_cb(struct w +@@ -2987,6 +2987,12 @@ static void wpas_start_assoc_cb(struct w params.beacon_int = ssid->beacon_int; else params.beacon_int = wpa_s->conf->beacon_int; @@ -186,4 +186,4 @@ Signed-hostap: Antonio Quartulli + params.mcast_rate = ssid->mcast_rate; } - params.wpa_ie = wpa_ie; + params.pairwise_suite = cipher_pairwise; diff --git a/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch b/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch index 11822366d..b56fa3d38 100644 --- a/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch +++ b/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch @@ -10,7 +10,7 @@ Signed-hostap: Antonio Quartulli --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -5012,7 +5012,7 @@ static int wpa_driver_nl80211_ibss(struc +@@ -5094,7 +5094,7 @@ static int wpa_driver_nl80211_ibss(struc struct wpa_driver_associate_params *params) { struct nl_msg *msg; @@ -19,7 +19,7 @@ Signed-hostap: Antonio Quartulli int count = 0; wpa_printf(MSG_DEBUG, "nl80211: Join IBSS (ifindex=%d)", drv->ifindex); -@@ -5039,6 +5039,37 @@ retry: +@@ -5121,6 +5121,37 @@ retry: nl80211_put_beacon_int(msg, params->beacon_int)) goto fail; diff --git a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch index 9b5ee4bbb..b868884a9 100644 --- a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch +++ b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch @@ -19,17 +19,17 @@ Tested-by: Simon Wunderlich --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -1424,6 +1424,7 @@ struct wpa_driver_mesh_join_params { - #define WPA_DRIVER_MESH_FLAG_SAE_AUTH 0x00000004 +@@ -1395,6 +1395,7 @@ struct wpa_driver_mesh_join_params { #define WPA_DRIVER_MESH_FLAG_AMPE 0x00000008 unsigned int flags; + u8 handle_dfs; + int mcast_rate; }; /** --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -8981,6 +8981,18 @@ static int nl80211_put_mesh_id(struct nl +@@ -9217,6 +9217,18 @@ static int nl80211_put_mesh_id(struct nl } @@ -48,7 +48,7 @@ Tested-by: Simon Wunderlich static int nl80211_put_mesh_config(struct nl_msg *msg, struct wpa_driver_mesh_bss_params *params) { -@@ -9039,6 +9051,7 @@ static int nl80211_join_mesh(struct i802 +@@ -9275,6 +9287,7 @@ static int nl80211_join_mesh(struct i802 nl80211_put_basic_rates(msg, params->basic_rates) || nl80211_put_mesh_id(msg, params->meshid, params->meshid_len) || nl80211_put_beacon_int(msg, params->beacon_int) || @@ -58,11 +58,11 @@ Tested-by: Simon Wunderlich --- a/wpa_supplicant/mesh.c +++ b/wpa_supplicant/mesh.c -@@ -379,6 +379,7 @@ int wpa_supplicant_join_mesh(struct wpa_ - os_memset(¶ms, 0, sizeof(params)); - params.meshid = ssid->ssid; - params.meshid_len = ssid->ssid_len; -+ params.mcast_rate = ssid->mcast_rate; - ibss_mesh_setup_freq(wpa_s, ssid, ¶ms.freq); - wpa_s->mesh_ht_enabled = !!params.freq.ht_enabled; - wpa_s->mesh_vht_enabled = !!params.freq.vht_enabled; +@@ -448,6 +448,7 @@ int wpa_supplicant_join_mesh(struct wpa_ + + params->meshid = ssid->ssid; + params->meshid_len = ssid->ssid_len; ++ params->mcast_rate = ssid->mcast_rate; + ibss_mesh_setup_freq(wpa_s, ssid, ¶ms->freq); + wpa_s->mesh_ht_enabled = !!params->freq.ht_enabled; + wpa_s->mesh_vht_enabled = !!params->freq.vht_enabled; diff --git a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch index 383353948..48682abd0 100644 --- a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch +++ b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch @@ -1,6 +1,6 @@ --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -2010,11 +2010,13 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -2095,11 +2095,13 @@ void ibss_mesh_setup_freq(struct wpa_sup for (j = 0; j < wpa_s->last_scan_res_used; j++) { struct wpa_bss *bss = wpa_s->last_scan_res[j]; diff --git a/package/network/services/hostapd/patches/600-ubus_support.patch b/package/network/services/hostapd/patches/600-ubus_support.patch index 8f14f125d..91c5c411d 100644 --- a/package/network/services/hostapd/patches/600-ubus_support.patch +++ b/package/network/services/hostapd/patches/600-ubus_support.patch @@ -22,7 +22,7 @@ struct wpa_ctrl_dst; struct radius_server_data; -@@ -122,6 +123,7 @@ struct hostapd_data { +@@ -129,6 +130,7 @@ struct hostapd_data { struct hostapd_iface *iface; struct hostapd_config *iconf; struct hostapd_bss_config *conf; @@ -30,7 +30,7 @@ int interface_added; /* virtual interface added for this BSS */ unsigned int started:1; unsigned int disabled:1; -@@ -370,6 +372,8 @@ struct hostapd_iface { +@@ -392,6 +394,8 @@ struct hostapd_iface { struct hostapd_config *conf; char phy[16]; /* Name of the PHY (radio) */ @@ -39,9 +39,17 @@ enum hostapd_iface_state { HAPD_IFACE_UNINITIALIZED, HAPD_IFACE_DISABLED, +@@ -544,6 +548,7 @@ hostapd_alloc_bss_data(struct hostapd_if + struct hostapd_bss_config *bss); + int hostapd_setup_interface(struct hostapd_iface *iface); + int hostapd_setup_interface_complete(struct hostapd_iface *iface, int err); ++void hostapd_set_own_neighbor_report(struct hostapd_data *hapd); + void hostapd_interface_deinit(struct hostapd_iface *iface); + void hostapd_interface_free(struct hostapd_iface *iface); + struct hostapd_iface * hostapd_alloc_iface(void); --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -309,6 +309,7 @@ static void hostapd_free_hapd_data(struc +@@ -312,6 +312,7 @@ static void hostapd_free_hapd_data(struc hapd->started = 0; wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface); @@ -49,7 +57,7 @@ iapp_deinit(hapd->iapp); hapd->iapp = NULL; accounting_deinit(hapd); -@@ -1186,6 +1187,8 @@ static int hostapd_setup_bss(struct host +@@ -1189,6 +1190,8 @@ static int hostapd_setup_bss(struct host if (hapd->driver && hapd->driver->set_operstate) hapd->driver->set_operstate(hapd->drv_priv, 1); @@ -58,7 +66,16 @@ return 0; } -@@ -1711,6 +1714,7 @@ static int hostapd_setup_interface_compl +@@ -1603,7 +1606,7 @@ static enum nr_chan_width hostapd_get_nr + #endif /* NEED_AP_MLME */ + + +-static void hostapd_set_own_neighbor_report(struct hostapd_data *hapd) ++void hostapd_set_own_neighbor_report(struct hostapd_data *hapd) + { + #ifdef NEED_AP_MLME + u16 capab = hostapd_own_capab_info(hapd); +@@ -1810,6 +1813,7 @@ static int hostapd_setup_interface_compl if (err) goto fail; @@ -66,7 +83,7 @@ wpa_printf(MSG_DEBUG, "Completing interface initialization"); if (iface->conf->channel) { #ifdef NEED_AP_MLME -@@ -1890,6 +1894,7 @@ dfs_offload: +@@ -1990,6 +1994,7 @@ dfs_offload: fail: wpa_printf(MSG_ERROR, "Interface initialization failed"); @@ -74,7 +91,7 @@ hostapd_set_state(iface, HAPD_IFACE_DISABLED); wpa_msg(hapd->msg_ctx, MSG_INFO, AP_EVENT_DISABLED); #ifdef CONFIG_FST -@@ -2344,6 +2349,7 @@ void hostapd_interface_deinit_free(struc +@@ -2444,6 +2449,7 @@ void hostapd_interface_deinit_free(struc (unsigned int) iface->conf->num_bss); driver = iface->bss[0]->driver; drv_priv = iface->bss[0]->drv_priv; @@ -84,7 +101,7 @@ __func__, driver, drv_priv); --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -1587,7 +1587,8 @@ ieee802_11_set_radius_info(struct hostap +@@ -1682,12 +1682,13 @@ ieee802_11_set_radius_info(struct hostap static void handle_auth(struct hostapd_data *hapd, @@ -94,7 +111,13 @@ { u16 auth_alg, auth_transaction, status_code; u16 resp = WLAN_STATUS_SUCCESS; -@@ -1603,6 +1604,11 @@ static void handle_auth(struct hostapd_d + struct sta_info *sta = NULL; +- int res, reply_res; ++ int res, reply_res, ubus_resp; + u16 fc; + const u8 *challenge = NULL; + u32 session_timeout, acct_interim_interval; +@@ -1698,6 +1699,11 @@ static void handle_auth(struct hostapd_d char *identity = NULL; char *radius_cui = NULL; u16 seq_ctrl; @@ -106,20 +129,21 @@ if (len < IEEE80211_HDRLEN + sizeof(mgmt->u.auth)) { wpa_printf(MSG_INFO, "handle_auth - too short payload (len=%lu)", -@@ -1757,6 +1763,12 @@ static void handle_auth(struct hostapd_d +@@ -1858,6 +1864,13 @@ static void handle_auth(struct hostapd_d resp = WLAN_STATUS_UNSPECIFIED_FAILURE; goto fail; } -+ if (hostapd_ubus_handle_event(hapd, &req)) { ++ ubus_resp = hostapd_ubus_handle_event(hapd, &req); ++ if (ubus_resp) { + wpa_printf(MSG_DEBUG, "Station " MACSTR " rejected by ubus handler.\n", + MAC2STR(mgmt->sa)); -+ resp = WLAN_STATUS_UNSPECIFIED_FAILURE; ++ resp = ubus_resp > 0 ? (u16) ubus_resp : WLAN_STATUS_UNSPECIFIED_FAILURE; + goto fail; + } if (res == HOSTAPD_ACL_PENDING) return; -@@ -2870,7 +2882,7 @@ void fils_hlp_timeout(void *eloop_ctx, v +@@ -3129,12 +3142,12 @@ void fils_hlp_timeout(void *eloop_ctx, v static void handle_assoc(struct hostapd_data *hapd, const struct ieee80211_mgmt *mgmt, size_t len, @@ -128,7 +152,13 @@ { u16 capab_info, listen_interval, seq_ctrl, fc; u16 resp = WLAN_STATUS_SUCCESS, reply_res; -@@ -2884,6 +2896,11 @@ static void handle_assoc(struct hostapd_ + const u8 *pos; +- int left, i; ++ int left, i, ubus_resp; + struct sta_info *sta; + u8 *tmp = NULL; + struct hostapd_sta_wpa_psk_short *psk = NULL; +@@ -3143,6 +3156,11 @@ static void handle_assoc(struct hostapd_ #ifdef CONFIG_FILS int delay_assoc = 0; #endif /* CONFIG_FILS */ @@ -140,21 +170,22 @@ if (len < IEEE80211_HDRLEN + (reassoc ? sizeof(mgmt->u.reassoc_req) : sizeof(mgmt->u.assoc_req))) { -@@ -3051,6 +3068,13 @@ static void handle_assoc(struct hostapd_ +@@ -3314,6 +3332,14 @@ static void handle_assoc(struct hostapd_ } #endif /* CONFIG_MBO */ -+ if (hostapd_ubus_handle_event(hapd, &req)) { ++ ubus_resp = hostapd_ubus_handle_event(hapd, &req); ++ if (ubus_resp) { + wpa_printf(MSG_DEBUG, "Station " MACSTR " assoc rejected by ubus handler.\n", + MAC2STR(mgmt->sa)); -+ resp = WLAN_STATUS_UNSPECIFIED_FAILURE; ++ resp = ubus_resp > 0 ? (u16) ubus_resp : WLAN_STATUS_UNSPECIFIED_FAILURE; + goto fail; + } + /* * sta->capability is used in check_assoc_ies() for RRM enabled * capability element. -@@ -3258,6 +3282,7 @@ static void handle_disassoc(struct hosta +@@ -3527,6 +3553,7 @@ static void handle_disassoc(struct hosta wpa_printf(MSG_DEBUG, "disassocation: STA=" MACSTR " reason_code=%d", MAC2STR(mgmt->sa), le_to_host16(mgmt->u.disassoc.reason_code)); @@ -162,7 +193,7 @@ sta = ap_get_sta(hapd, mgmt->sa); if (sta == NULL) { -@@ -3323,6 +3348,8 @@ static void handle_deauth(struct hostapd +@@ -3592,6 +3619,8 @@ static void handle_deauth(struct hostapd " reason_code=%d", MAC2STR(mgmt->sa), le_to_host16(mgmt->u.deauth.reason_code)); @@ -171,16 +202,16 @@ sta = ap_get_sta(hapd, mgmt->sa); if (sta == NULL) { wpa_msg(hapd->msg_ctx, MSG_DEBUG, "Station " MACSTR " trying " -@@ -3637,7 +3664,7 @@ int ieee802_11_mgmt(struct hostapd_data +@@ -3911,7 +3940,7 @@ int ieee802_11_mgmt(struct hostapd_data if (stype == WLAN_FC_STYPE_PROBE_REQ) { -- handle_probe_req(hapd, mgmt, len, fi->ssi_signal); +- handle_probe_req(hapd, mgmt, len, ssi_signal); + handle_probe_req(hapd, mgmt, len, fi); return 1; } -@@ -3657,17 +3684,17 @@ int ieee802_11_mgmt(struct hostapd_data +@@ -3931,17 +3960,17 @@ int ieee802_11_mgmt(struct hostapd_data switch (stype) { case WLAN_FC_STYPE_AUTH: wpa_printf(MSG_DEBUG, "mgmt::auth"); @@ -203,7 +234,7 @@ case WLAN_FC_STYPE_DISASSOC: --- a/src/ap/beacon.c +++ b/src/ap/beacon.c -@@ -716,7 +716,7 @@ void sta_track_claim_taxonomy_info(struc +@@ -720,7 +720,7 @@ void sta_track_claim_taxonomy_info(struc void handle_probe_req(struct hostapd_data *hapd, const struct ieee80211_mgmt *mgmt, size_t len, @@ -212,7 +243,7 @@ { u8 *resp; struct ieee802_11_elems elems; -@@ -725,9 +725,15 @@ void handle_probe_req(struct hostapd_dat +@@ -729,6 +729,7 @@ void handle_probe_req(struct hostapd_dat size_t i, resp_len; int noack; enum ssid_match_result res; @@ -220,6 +251,10 @@ int ret; u16 csa_offs[2]; size_t csa_offs_len; +@@ -737,6 +738,11 @@ void handle_probe_req(struct hostapd_dat + struct hostapd_sta_wpa_psk_short *psk = NULL; + char *identity = NULL; + char *radius_cui = NULL; + struct hostapd_ubus_request req = { + .type = HOSTAPD_UBUS_PROBE_REQ, + .mgmt_frame = mgmt, @@ -228,7 +263,7 @@ if (len < IEEE80211_HDRLEN) return; -@@ -894,6 +900,12 @@ void handle_probe_req(struct hostapd_dat +@@ -914,6 +920,12 @@ void handle_probe_req(struct hostapd_dat } #endif /* CONFIG_P2P */ @@ -280,7 +315,7 @@ wpabuf_free(sta->p2p_ie); --- a/src/ap/sta_info.c +++ b/src/ap/sta_info.c -@@ -404,6 +404,7 @@ void ap_handle_timer(void *eloop_ctx, vo +@@ -412,6 +412,7 @@ void ap_handle_timer(void *eloop_ctx, vo HOSTAPD_LEVEL_INFO, "deauthenticated due to " "local deauth request"); ap_free_sta(hapd, sta); @@ -288,7 +323,7 @@ return; } -@@ -551,6 +552,7 @@ skip_poll: +@@ -559,6 +560,7 @@ skip_poll: hapd, sta, WLAN_REASON_PREV_AUTH_NOT_VALID); ap_free_sta(hapd, sta); @@ -296,7 +331,7 @@ break; } } -@@ -1212,6 +1214,7 @@ void ap_sta_set_authorized(struct hostap +@@ -1220,6 +1222,7 @@ void ap_sta_set_authorized(struct hostap buf, ip_addr); } else { wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_DISCONNECTED "%s", buf); @@ -306,7 +341,7 @@ hapd->msg_ctx_parent != hapd->msg_ctx) --- a/src/ap/wpa_auth_glue.c +++ b/src/ap/wpa_auth_glue.c -@@ -175,6 +175,7 @@ static void hostapd_wpa_auth_psk_failure +@@ -177,6 +177,7 @@ static void hostapd_wpa_auth_psk_failure struct hostapd_data *hapd = ctx; wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_POSSIBLE_PSK_MISMATCH MACSTR, MAC2STR(addr)); diff --git a/package/network/services/hostapd/src/src/ap/ubus.c b/package/network/services/hostapd/src/src/ap/ubus.c index beb4388f7..2c310adae 100644 --- a/package/network/services/hostapd/src/src/ap/ubus.c +++ b/package/network/services/hostapd/src/src/ap/ubus.c @@ -18,6 +18,8 @@ #include "ubus.h" #include "ap_drv_ops.h" #include "beacon.h" +#include "rrm.h" +#include "wnm_ap.h" static struct ubus_context *ctx; static struct blob_buf b; @@ -168,6 +170,7 @@ hostapd_bss_get_clients(struct ubus_context *ctx, struct ubus_object *obj, blobmsg_add_u32(&b, "freq", hapd->iface->freq); list = blobmsg_open_table(&b, "clients"); for (sta = hapd->sta_list; sta; sta = sta->next) { + void *r; int i; sprintf(mac_buf, MACSTR, MAC2STR(sta->addr)); @@ -175,6 +178,11 @@ hostapd_bss_get_clients(struct ubus_context *ctx, struct ubus_object *obj, for (i = 0; i < ARRAY_SIZE(sta_flags); i++) blobmsg_add_u8(&b, sta_flags[i].name, !!(sta->flags & sta_flags[i].flag)); + + r = blobmsg_open_array(&b, "rrm"); + for (i = 0; i < ARRAY_SIZE(sta->rrm_enabled_capa); i++) + blobmsg_add_u32(&b, "", sta->rrm_enabled_capa[i]); + blobmsg_close_array(&b, r); blobmsg_add_u32(&b, "aid", sta->aid); blobmsg_close_table(&b, c); } @@ -469,6 +477,110 @@ hostapd_rrm_print_nr(struct hostapd_neighbor_entry *nr) blobmsg_add_string_buffer(&b); } +enum { + BSS_MGMT_EN_NEIGHBOR, + BSS_MGMT_EN_BEACON, +#ifdef CONFIG_WNM_AP + BSS_MGMT_EN_BSS_TRANSITION, +#endif + __BSS_MGMT_EN_MAX +}; + +static bool +__hostapd_bss_mgmt_enable_f(struct hostapd_data *hapd, int flag) +{ + struct hostapd_bss_config *bss = hapd->conf; + uint32_t flags; + + switch (flag) { + case BSS_MGMT_EN_NEIGHBOR: + if (bss->radio_measurements[0] & + WLAN_RRM_CAPS_NEIGHBOR_REPORT) + return false; + + bss->radio_measurements[0] |= + WLAN_RRM_CAPS_NEIGHBOR_REPORT; + hostapd_set_own_neighbor_report(hapd); + return true; + case BSS_MGMT_EN_BEACON: + flags = WLAN_RRM_CAPS_BEACON_REPORT_PASSIVE | + WLAN_RRM_CAPS_BEACON_REPORT_ACTIVE | + WLAN_RRM_CAPS_BEACON_REPORT_TABLE; + + if (bss->radio_measurements[0] & flags == flags) + return false; + + bss->radio_measurements[0] |= (u8) flags; + return true; +#ifdef CONFIG_WNM_AP + case BSS_MGMT_EN_BSS_TRANSITION: + if (bss->bss_transition) + return false; + + bss->bss_transition = 1; + return true; +#endif + } +} + +static void +__hostapd_bss_mgmt_enable(struct hostapd_data *hapd, uint32_t flags) +{ + bool update = false; + int i; + + for (i = 0; i < __BSS_MGMT_EN_MAX; i++) { + if (!(flags & (1 << i))) + continue; + + update |= __hostapd_bss_mgmt_enable_f(hapd, i); + } + + if (update) + ieee802_11_update_beacons(hapd->iface); +} + + +static const struct blobmsg_policy bss_mgmt_enable_policy[__BSS_MGMT_EN_MAX] = { + [BSS_MGMT_EN_NEIGHBOR] = { "neighbor_report", BLOBMSG_TYPE_BOOL }, + [BSS_MGMT_EN_BEACON] = { "beacon_report", BLOBMSG_TYPE_BOOL }, +#ifdef CONFIG_WNM_AP + [BSS_MGMT_EN_BSS_TRANSITION] = { "bss_transition", BLOBMSG_TYPE_BOOL }, +#endif +}; + +static int +hostapd_bss_mgmt_enable(struct ubus_context *ctx, struct ubus_object *obj, + struct ubus_request_data *req, const char *method, + struct blob_attr *msg) + +{ + struct hostapd_data *hapd = get_hapd_from_object(obj); + struct blob_attr *tb[__BSS_MGMT_EN_MAX]; + struct blob_attr *cur; + uint32_t flags = 0; + int i; + bool neigh = false, beacon = false; + + blobmsg_parse(bss_mgmt_enable_policy, __BSS_MGMT_EN_MAX, tb, blob_data(msg), blob_len(msg)); + + for (i = 0; i < ARRAY_SIZE(tb); i++) { + if (!tb[i] || !blobmsg_get_bool(tb[i])) + continue; + + flags |= (1 << i); + } + + __hostapd_bss_mgmt_enable(hapd, flags); +} + + +static void +hostapd_rrm_nr_enable(struct hostapd_data *hapd) +{ + __hostapd_bss_mgmt_enable(hapd, 1 << BSS_MGMT_EN_NEIGHBOR); +} + static int hostapd_rrm_nr_get_own(struct ubus_context *ctx, struct ubus_object *obj, struct ubus_request_data *req, const char *method, @@ -478,8 +590,7 @@ hostapd_rrm_nr_get_own(struct ubus_context *ctx, struct ubus_object *obj, struct hostapd_neighbor_entry *nr; void *c; - if (!(hapd->conf->radio_measurements[0] & WLAN_RRM_CAPS_NEIGHBOR_REPORT)) - return UBUS_STATUS_NOT_SUPPORTED; + hostapd_rrm_nr_enable(hapd); nr = hostapd_neighbor_get(hapd, hapd->own_addr, NULL); if (!nr) @@ -505,9 +616,7 @@ hostapd_rrm_nr_list(struct ubus_context *ctx, struct ubus_object *obj, struct hostapd_neighbor_entry *nr; void *c; - if (!(hapd->conf->radio_measurements[0] & WLAN_RRM_CAPS_NEIGHBOR_REPORT)) - return UBUS_STATUS_NOT_SUPPORTED; - + hostapd_rrm_nr_enable(hapd); blob_buf_init(&b, 0); c = blobmsg_open_array(&b, "list"); @@ -570,8 +679,7 @@ hostapd_rrm_nr_set(struct ubus_context *ctx, struct ubus_object *obj, int ret = 0; int rem; - if (!(hapd->conf->radio_measurements[0] & WLAN_RRM_CAPS_NEIGHBOR_REPORT)) - return UBUS_STATUS_NOT_SUPPORTED; + hostapd_rrm_nr_enable(hapd); blobmsg_parse(nr_set_policy, __NR_SET_LIST_MAX, tb_l, blob_data(msg), blob_len(msg)); if (!tb_l[NR_SET_LIST]) @@ -613,6 +721,187 @@ invalid: return 0; } +enum { + BEACON_REQ_ADDR, + BEACON_REQ_MODE, + BEACON_REQ_OP_CLASS, + BEACON_REQ_CHANNEL, + BEACON_REQ_DURATION, + BEACON_REQ_BSSID, + BEACON_REQ_SSID, + __BEACON_REQ_MAX, +}; + +static const struct blobmsg_policy beacon_req_policy[__BEACON_REQ_MAX] = { + [BEACON_REQ_ADDR] = { "addr", BLOBMSG_TYPE_STRING }, + [BEACON_REQ_OP_CLASS] { "op_class", BLOBMSG_TYPE_INT32 }, + [BEACON_REQ_CHANNEL] { "channel", BLOBMSG_TYPE_INT32 }, + [BEACON_REQ_DURATION] { "duration", BLOBMSG_TYPE_INT32 }, + [BEACON_REQ_MODE] { "mode", BLOBMSG_TYPE_INT32 }, + [BEACON_REQ_BSSID] { "bssid", BLOBMSG_TYPE_STRING }, + [BEACON_REQ_SSID] { "ssid", BLOBMSG_TYPE_STRING }, +}; + +static int +hostapd_rrm_beacon_req(struct ubus_context *ctx, struct ubus_object *obj, + struct ubus_request_data *ureq, const char *method, + struct blob_attr *msg) +{ + struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj); + struct blob_attr *tb[__BEACON_REQ_MAX]; + struct blob_attr *cur; + struct wpabuf *req; + u8 bssid[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; + u8 addr[ETH_ALEN]; + int mode, rem, ret; + int buf_len = 13; + + blobmsg_parse(beacon_req_policy, __BEACON_REQ_MAX, tb, blob_data(msg), blob_len(msg)); + + if (!tb[BEACON_REQ_ADDR] || !tb[BEACON_REQ_MODE] || !tb[BEACON_REQ_DURATION] || + !tb[BEACON_REQ_OP_CLASS] || !tb[BEACON_REQ_CHANNEL]) + return UBUS_STATUS_INVALID_ARGUMENT; + + if (tb[BEACON_REQ_SSID]) + buf_len += blobmsg_data_len(tb[BEACON_REQ_SSID]) + 2 - 1; + + mode = blobmsg_get_u32(tb[BEACON_REQ_MODE]); + if (hwaddr_aton(blobmsg_data(tb[BEACON_REQ_ADDR]), addr)) + return UBUS_STATUS_INVALID_ARGUMENT; + + if (tb[BEACON_REQ_BSSID] && + hwaddr_aton(blobmsg_data(tb[BEACON_REQ_BSSID]), bssid)) + return UBUS_STATUS_INVALID_ARGUMENT; + + req = wpabuf_alloc(buf_len); + if (!req) + return UBUS_STATUS_UNKNOWN_ERROR; + + /* 1: regulatory class */ + wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_OP_CLASS])); + + /* 2: channel number */ + wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_CHANNEL])); + + /* 3-4: randomization interval */ + wpabuf_put_le16(req, 0); + + /* 5-6: duration */ + wpabuf_put_le16(req, blobmsg_get_u32(tb[BEACON_REQ_DURATION])); + + /* 7: mode */ + wpabuf_put_u8(req, blobmsg_get_u32(tb[BEACON_REQ_MODE])); + + /* 8-13: BSSID */ + wpabuf_put_data(req, bssid, ETH_ALEN); + + if ((cur = tb[BEACON_REQ_SSID]) != NULL) { + wpabuf_put_u8(req, WLAN_EID_SSID); + wpabuf_put_u8(req, blobmsg_data_len(cur) - 1); + wpabuf_put_data(req, blobmsg_data(cur), blobmsg_data_len(cur) - 1); + } + + ret = hostapd_send_beacon_req(hapd, addr, 0, req); + if (ret < 0) + return -ret; + + return 0; +} + + +#ifdef CONFIG_WNM_AP +enum { + WNM_DISASSOC_ADDR, + WNM_DISASSOC_DURATION, + WNM_DISASSOC_NEIGHBORS, + __WNM_DISASSOC_MAX, +}; + +static const struct blobmsg_policy wnm_disassoc_policy[__WNM_DISASSOC_MAX] = { + [WNM_DISASSOC_ADDR] = { "addr", BLOBMSG_TYPE_STRING }, + [WNM_DISASSOC_DURATION] { "duration", BLOBMSG_TYPE_INT32 }, + [WNM_DISASSOC_NEIGHBORS] { "neighbors", BLOBMSG_TYPE_ARRAY }, +}; + +static int +hostapd_wnm_disassoc_imminent(struct ubus_context *ctx, struct ubus_object *obj, + struct ubus_request_data *ureq, const char *method, + struct blob_attr *msg) +{ + struct hostapd_data *hapd = container_of(obj, struct hostapd_data, ubus.obj); + struct blob_attr *tb[__WNM_DISASSOC_MAX]; + struct blob_attr *cur; + struct sta_info *sta; + int duration = 10; + int rem; + int nr_len = 0; + u8 *nr = NULL; + u8 req_mode = WNM_BSS_TM_REQ_DISASSOC_IMMINENT; + u8 addr[ETH_ALEN]; + + blobmsg_parse(wnm_disassoc_policy, __WNM_DISASSOC_MAX, tb, blob_data(msg), blob_len(msg)); + + if (!tb[WNM_DISASSOC_ADDR]) + return UBUS_STATUS_INVALID_ARGUMENT; + + if (hwaddr_aton(blobmsg_data(tb[WNM_DISASSOC_ADDR]), addr)) + return UBUS_STATUS_INVALID_ARGUMENT; + + if ((cur = tb[WNM_DISASSOC_DURATION]) != NULL) + duration = blobmsg_get_u32(cur); + + sta = ap_get_sta(hapd, addr); + if (!sta) + return UBUS_STATUS_NOT_FOUND; + + if (tb[WNM_DISASSOC_NEIGHBORS]) { + u8 *nr_cur; + + if (blobmsg_check_array(tb[WNM_DISASSOC_NEIGHBORS], + BLOBMSG_TYPE_STRING) < 0) + return UBUS_STATUS_INVALID_ARGUMENT; + + blobmsg_for_each_attr(cur, tb[WNM_DISASSOC_NEIGHBORS], rem) { + int len = strlen(blobmsg_get_string(cur)); + + if (len % 2) + return UBUS_STATUS_INVALID_ARGUMENT; + + nr_len += (len / 2) + 2; + } + + if (nr_len) { + nr = os_zalloc(nr_len); + if (!nr) + return UBUS_STATUS_UNKNOWN_ERROR; + } + + nr_cur = nr; + blobmsg_for_each_attr(cur, tb[WNM_DISASSOC_NEIGHBORS], rem) { + int len = strlen(blobmsg_get_string(cur)) / 2; + + *nr_cur++ = WLAN_EID_NEIGHBOR_REPORT; + *nr_cur++ = (u8) len; + if (hexstr2bin(blobmsg_data(cur), nr_cur, len)) { + free(nr); + return UBUS_STATUS_INVALID_ARGUMENT; + } + + nr_cur += len; + } + } + + if (nr) + req_mode |= WNM_BSS_TM_REQ_PREF_CAND_LIST_INCLUDED; + + if (wnm_send_bss_tm_req(hapd, sta, req_mode, duration, 0, NULL, + NULL, nr, nr_len, NULL, 0)) + return UBUS_STATUS_UNKNOWN_ERROR; + + return 0; +} +#endif + static const struct ubus_method bss_methods[] = { UBUS_METHOD_NOARG("get_clients", hostapd_bss_get_clients), UBUS_METHOD("del_client", hostapd_bss_del_client, del_policy), @@ -625,9 +914,14 @@ static const struct ubus_method bss_methods[] = { #endif UBUS_METHOD("set_vendor_elements", hostapd_vendor_elements, ve_policy), UBUS_METHOD("notify_response", hostapd_notify_response, notify_policy), + UBUS_METHOD("bss_mgmt_enable", hostapd_bss_mgmt_enable, bss_mgmt_enable_policy), UBUS_METHOD_NOARG("rrm_nr_get_own", hostapd_rrm_nr_get_own), UBUS_METHOD_NOARG("rrm_nr_list", hostapd_rrm_nr_list), UBUS_METHOD("rrm_nr_set", hostapd_rrm_nr_set, nr_set_policy), + UBUS_METHOD("rrm_beacon_req", hostapd_rrm_beacon_req, beacon_req_policy), +#ifdef CONFIG_WNM_AP + UBUS_METHOD("wnm_disassoc_imminent", hostapd_wnm_disassoc_imminent, wnm_disassoc_policy), +#endif }; static struct ubus_object_type bss_object_type = @@ -644,6 +938,11 @@ void hostapd_ubus_add_bss(struct hostapd_data *hapd) char *name; int ret; +#ifdef CONFIG_MESH + if (hapd->conf->mesh & MESH_ENABLED) + return; +#endif + if (!hostapd_ubus_init()) return; @@ -677,7 +976,7 @@ void hostapd_ubus_free_bss(struct hostapd_data *hapd) struct ubus_event_req { struct ubus_notify_request nreq; - bool deny; + int resp; }; static void @@ -685,8 +984,7 @@ ubus_event_cb(struct ubus_notify_request *req, int idx, int ret) { struct ubus_event_req *ureq = container_of(req, struct ubus_event_req, nreq); - if (ret) - ureq->deny = true; + ureq->resp = ret; } int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_request *req) @@ -708,10 +1006,10 @@ int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_req ban = avl_find_element(&hapd->ubus.banned, addr, ban, avl); if (ban) - return -2; + return WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; if (!hapd->ubus.obj.has_subscribers) - return 0; + return WLAN_STATUS_SUCCESS; if (req->type < ARRAY_SIZE(types)) type = types[req->type]; @@ -726,19 +1024,19 @@ int hostapd_ubus_handle_event(struct hostapd_data *hapd, struct hostapd_ubus_req if (!hapd->ubus.notify_response) { ubus_notify(ctx, &hapd->ubus.obj, type, b.head, -1); - return 0; + return WLAN_STATUS_SUCCESS; } if (ubus_notify_async(ctx, &hapd->ubus.obj, type, b.head, &ureq.nreq)) - return 0; + return WLAN_STATUS_SUCCESS; ureq.nreq.status_cb = ubus_event_cb; ubus_complete_request(ctx, &ureq.nreq.req, 100); - if (ureq.deny) - return -1; + if (ureq.resp) + return ureq.resp; - return 0; + return WLAN_STATUS_SUCCESS; } void hostapd_ubus_notify(struct hostapd_data *hapd, const char *type, const u8 *addr) diff --git a/package/network/services/lldpd/Makefile b/package/network/services/lldpd/Makefile index cdd8f99d5..22b55c6df 100644 --- a/package/network/services/lldpd/Makefile +++ b/package/network/services/lldpd/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=lldpd -PKG_VERSION:=0.9.9 +PKG_VERSION:=1.0.1 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=http://media.luffy.cx/files/lldpd -PKG_HASH:=5e9e08f500d21376631cbc9f8e19a4b167cd38eb2d8fd9e660b8e80507f802db +PKG_HASH:=450b622aac7ae1758f1ef82f3b7b94ec47f2ff33abfb0e6ac82555b9ee55f151 PKG_MAINTAINER:=Stijn Tintel PKG_LICENSE:=ISC diff --git a/package/network/services/odhcpd/Makefile b/package/network/services/odhcpd/Makefile index 16c903db3..75e19d7e7 100644 --- a/package/network/services/odhcpd/Makefile +++ b/package/network/services/odhcpd/Makefile @@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=odhcpd PKG_RELEASE:=1 -PKG_VERSION:=1.3 +PKG_VERSION:=1.6 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/odhcpd.git -PKG_SOURCE_DATE:=2017-12-22 -PKG_SOURCE_VERSION:=7aa2594c5a127d92fa8f04328ac7b43e595bcaa7 -PKG_MIRROR_HASH:=67ce9303ce2f7a47ca9c54e1ebd984f108066ab0fa4e0d81f39a9cfc2431f90b +PKG_SOURCE_DATE:=2018-04-18 +PKG_SOURCE_VERSION:=dcfc06a7cf32e21ae575ea491ba0206844596516 +PKG_MIRROR_HASH:=cc14837bba174ee39fc2702ab3a320a76f42960d0b1e6df5158cc68baead737c PKG_MAINTAINER:=Hans Dedecker PKG_LICENSE:=GPL-2.0 diff --git a/package/network/services/openvpn/Makefile b/package/network/services/openvpn/Makefile index ec48e734f..552ed158b 100644 --- a/package/network/services/openvpn/Makefile +++ b/package/network/services/openvpn/Makefile @@ -9,14 +9,14 @@ include $(TOPDIR)/rules.mk PKG_NAME:=openvpn -PKG_VERSION:=2.4.4 -PKG_RELEASE:=2 +PKG_VERSION:=2.4.5 +PKG_RELEASE:=3 PKG_SOURCE_URL:=\ https://build.openvpn.net/downloads/releases/ \ https://swupdate.openvpn.net/community/releases/ PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=96cd1b8fe1e8cb2920f07c3fd3985faea756e16fdeebd11d3e146d5bd2b04a80 +PKG_HASH:=43c0a363a332350f620d1cd93bb431e082bedbc93d4fb872f758650d53c1d29e PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION) PKG_MAINTAINER:=Felix Fietkau diff --git a/package/network/services/openvpn/files/openvpn.options b/package/network/services/openvpn/files/openvpn.options index a6a3ded06..6c084d22d 100644 --- a/package/network/services/openvpn/files/openvpn.options +++ b/package/network/services/openvpn/files/openvpn.options @@ -14,7 +14,6 @@ cipher client_config_dir client_connect client_disconnect -comp_lzo compress connect_freq connect_retry @@ -132,6 +131,7 @@ txqueuelen up user verb +verify_client_cert verify_x509_name x509_username_field ' @@ -143,7 +143,6 @@ auth_user_pass_optional bind ccd_exclusive client -client_cert_not_required client_to_client comp_noadapt disable @@ -155,7 +154,6 @@ float http_proxy_retry ifconfig_noexec ifconfig_nowarn -ifconfig_pool_linear management_forget_disconnect management_hold management_query_passwords @@ -167,9 +165,6 @@ multihome mute_replay_warnings ncp_disable nobind -no_iv -no_name_remapping -no_replay opt_verify passtos persist_key @@ -191,7 +186,6 @@ test_crypto tls_client tls_exit tls_server -tun_ipv6 up_delay up_restart username_as_common_name diff --git a/package/network/services/openvpn/patches/100-mbedtls-disable-runtime-version-check.patch b/package/network/services/openvpn/patches/100-mbedtls-disable-runtime-version-check.patch index 8209bca4f..5608fa443 100644 --- a/package/network/services/openvpn/patches/100-mbedtls-disable-runtime-version-check.patch +++ b/package/network/services/openvpn/patches/100-mbedtls-disable-runtime-version-check.patch @@ -1,6 +1,6 @@ --- a/src/openvpn/ssl_mbedtls.c +++ b/src/openvpn/ssl_mbedtls.c -@@ -1336,7 +1336,7 @@ const char * +@@ -1394,7 +1394,7 @@ const char * get_ssl_library_version(void) { static char mbedtls_version[30]; diff --git a/package/network/services/openvpn/patches/210-build_always_use_internal_lz4.patch b/package/network/services/openvpn/patches/210-build_always_use_internal_lz4.patch index d49e0bf9e..b3eb7c742 100644 --- a/package/network/services/openvpn/patches/210-build_always_use_internal_lz4.patch +++ b/package/network/services/openvpn/patches/210-build_always_use_internal_lz4.patch @@ -1,15 +1,17 @@ --- a/configure.ac +++ b/configure.ac -@@ -1068,62 +1068,15 @@ dnl +@@ -1077,68 +1077,15 @@ dnl AC_ARG_VAR([LZ4_CFLAGS], [C compiler flags for lz4]) AC_ARG_VAR([LZ4_LIBS], [linker flags for lz4]) if test "$enable_lz4" = "yes" && test "$enable_comp_stub" = "no"; then - if test -z "${LZ4_CFLAGS}" -a -z "${LZ4_LIBS}"; then - # if the user did not explicitly specify flags, try to autodetect - PKG_CHECK_MODULES([LZ4], -- [liblz4 >= 1.7.1], +- [liblz4 >= 1.7.1 liblz4 < 100], - [have_lz4="yes"], -- [] # If this fails, we will do another test next +- [LZ4_LIBS="-llz4"] # If this fails, we will do another test next. +- # We also add set LZ4_LIBS otherwise the +- # linker will not know about the lz4 library - ) - fi @@ -47,20 +49,24 @@ - fi - fi - -- # if LZ4_LIBS is set, we assume it will work, otherwise test -- if test -z "${LZ4_LIBS}"; then +- # Double check we have a few needed functions +- if test "${have_lz4}" = "yes" ; then - AC_CHECK_LIB([lz4], -- [LZ4_compress], -- [LZ4_LIBS="-llz4"], +- [LZ4_compress_default], +- [], +- [have_lz4="no"]) +- AC_CHECK_LIB([lz4], +- [LZ4_decompress_safe], +- [], - [have_lz4="no"]) - fi - - if test "${have_lz4}" != "yes" ; then -- AC_MSG_RESULT([ usuable LZ4 library or header not found, using version in src/compat/compat-lz4.*]) +- AC_MSG_RESULT([ usable LZ4 library or header not found, using version in src/compat/compat-lz4.*]) - AC_DEFINE([NEED_COMPAT_LZ4], [1], [use copy of LZ4 source in compat/]) - LZ4_LIBS="" - fi -+ AC_MSG_RESULT([ usuable LZ4 library or header not found, using version in src/compat/compat-lz4.*]) ++ AC_MSG_RESULT([ usable LZ4 library or header not found, using version in src/compat/compat-lz4.*]) + AC_DEFINE([NEED_COMPAT_LZ4], [1], [use copy of LZ4 source in compat/]) + LZ4_LIBS="" OPTIONAL_LZ4_CFLAGS="${LZ4_CFLAGS}" diff --git a/package/network/services/samba36/Makefile b/package/network/services/samba36/Makefile index 42c23b4e8..30e26195f 100644 --- a/package/network/services/samba36/Makefile +++ b/package/network/services/samba36/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=samba PKG_VERSION:=3.6.25 -PKG_RELEASE:=9 +PKG_RELEASE:=10 PKG_SOURCE_URL:=https://download.samba.org/pub/samba \ https://download.samba.org/pub/samba/stable @@ -101,6 +101,7 @@ CONFIGURE_ARGS += \ --prefix=/ \ --disable-avahi \ --disable-cups \ + --disable-external-libtalloc \ --disable-pie \ --disable-relro \ --disable-static \ diff --git a/package/network/services/samba36/patches/028-CVE-2016-2125-v3.6.patch b/package/network/services/samba36/patches/028-CVE-2016-2125-v3.6.patch new file mode 100644 index 000000000..8e174f0e7 --- /dev/null +++ b/package/network/services/samba36/patches/028-CVE-2016-2125-v3.6.patch @@ -0,0 +1,59 @@ +From: =?utf-8?q?Guido_G=C3=BCnther?= +Date: Wed, 28 Dec 2016 19:21:49 +0100 +Subject: security-CVE-2016-2125: Don't pass GSS_C_DELEG_FLAG by default + +This is a backport of upstream commits + + b1a056f77e793efc45df34ab7bf78fbec1bf8a59 + b83897ae49fdee1fda73c10c7fe73362bfaba690 (code not used in wheezy) + 3106964a640ddf6a3c08c634ff586a814f94dff8 (code not used in wheezy) +--- + source3/librpc/crypto/gse.c | 1 - + source3/libsmb/clifsinfo.c | 2 +- + source4/auth/gensec/gensec_gssapi.c | 2 +- + source4/scripting/bin/nsupdate-gss | 2 +- + 4 files changed, 3 insertions(+), 4 deletions(-) + +--- a/source3/librpc/crypto/gse.c ++++ b/source3/librpc/crypto/gse.c +@@ -162,7 +162,6 @@ static NTSTATUS gse_context_init(TALLOC_ + memcpy(&gse_ctx->gss_mech, gss_mech_krb5, sizeof(gss_OID_desc)); + + gse_ctx->gss_c_flags = GSS_C_MUTUAL_FLAG | +- GSS_C_DELEG_FLAG | + GSS_C_DELEG_POLICY_FLAG | + GSS_C_REPLAY_FLAG | + GSS_C_SEQUENCE_FLAG; +--- a/source3/libsmb/clifsinfo.c ++++ b/source3/libsmb/clifsinfo.c +@@ -726,7 +726,7 @@ static NTSTATUS make_cli_gss_blob(TALLOC + &es->s.gss_state->gss_ctx, + srv_name, + GSS_C_NO_OID, /* default OID. */ +- GSS_C_MUTUAL_FLAG | GSS_C_REPLAY_FLAG | GSS_C_SEQUENCE_FLAG | GSS_C_DELEG_FLAG, ++ GSS_C_MUTUAL_FLAG | GSS_C_REPLAY_FLAG | GSS_C_SEQUENCE_FLAG | GSS_C_DELEG_POLICY_FLAG, + GSS_C_INDEFINITE, /* requested ticket lifetime. */ + NULL, /* no channel bindings */ + p_tok_in, +--- a/source4/auth/gensec/gensec_gssapi.c ++++ b/source4/auth/gensec/gensec_gssapi.c +@@ -172,7 +172,7 @@ static NTSTATUS gensec_gssapi_start(stru + if (gensec_setting_bool(gensec_security->settings, "gensec_gssapi", "mutual", true)) { + gensec_gssapi_state->want_flags |= GSS_C_MUTUAL_FLAG; + } +- if (gensec_setting_bool(gensec_security->settings, "gensec_gssapi", "delegation", true)) { ++ if (gensec_setting_bool(gensec_security->settings, "gensec_gssapi", "delegation", false)) { + gensec_gssapi_state->want_flags |= GSS_C_DELEG_FLAG; + } + if (gensec_setting_bool(gensec_security->settings, "gensec_gssapi", "replay", true)) { +--- a/source4/scripting/bin/nsupdate-gss ++++ b/source4/scripting/bin/nsupdate-gss +@@ -178,7 +178,7 @@ sub negotiate_tkey($$$$) + my $flags = + GSS_C_REPLAY_FLAG | GSS_C_MUTUAL_FLAG | + GSS_C_SEQUENCE_FLAG | GSS_C_CONF_FLAG | +- GSS_C_INTEG_FLAG | GSS_C_DELEG_FLAG; ++ GSS_C_INTEG_FLAG; + + + $status = GSSAPI::Cred::acquire_cred(undef, 120, undef, GSS_C_INITIATE, diff --git a/package/network/services/samba36/patches/028-CVE-2017-7494-v3-6.patch b/package/network/services/samba36/patches/029-CVE-2017-7494-v3-6.patch similarity index 100% rename from package/network/services/samba36/patches/028-CVE-2017-7494-v3-6.patch rename to package/network/services/samba36/patches/029-CVE-2017-7494-v3-6.patch diff --git a/package/network/services/samba36/patches/029-CVE-2017-15275.patch b/package/network/services/samba36/patches/030-CVE-2017-15275-v3.6.patch similarity index 100% rename from package/network/services/samba36/patches/029-CVE-2017-15275.patch rename to package/network/services/samba36/patches/030-CVE-2017-15275-v3.6.patch diff --git a/package/network/services/samba36/patches/031-CVE-2017-12163-v3.6.patch b/package/network/services/samba36/patches/031-CVE-2017-12163-v3.6.patch new file mode 100644 index 000000000..d7faa1388 --- /dev/null +++ b/package/network/services/samba36/patches/031-CVE-2017-12163-v3.6.patch @@ -0,0 +1,136 @@ +From: =?utf-8?q?Guido_G=C3=BCnther?= +Date: Wed, 20 Sep 2017 20:02:03 +0200 +Subject: CVE-2017-12163: s3:smbd: Prevent client short SMB1 write from + writing server memory to file. + +BUG: https://bugzilla.samba.org/show_bug.cgi?id=13020 + +Author: Jeremy Allison +Signed-off-by: Jeremy Allison +Signed-off-by: Stefan Metzmacher +--- + source3/smbd/reply.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 50 insertions(+) + +--- a/source3/smbd/reply.c ++++ b/source3/smbd/reply.c +@@ -3979,6 +3979,9 @@ void reply_writebraw(struct smb_request + } + + /* Ensure we don't write bytes past the end of this packet. */ ++ /* ++ * This already protects us against CVE-2017-12163. ++ */ + if (data + numtowrite > smb_base(req->inbuf) + smb_len(req->inbuf)) { + reply_nterror(req, NT_STATUS_INVALID_PARAMETER); + error_to_writebrawerr(req); +@@ -4080,6 +4083,11 @@ void reply_writebraw(struct smb_request + exit_server_cleanly("secondary writebraw failed"); + } + ++ /* ++ * We are not vulnerable to CVE-2017-12163 ++ * here as we are guarenteed to have numtowrite ++ * bytes available - we just read from the client. ++ */ + nwritten = write_file(req,fsp,buf+4,startpos+nwritten,numtowrite); + if (nwritten == -1) { + TALLOC_FREE(buf); +@@ -4161,6 +4169,7 @@ void reply_writeunlock(struct smb_reques + connection_struct *conn = req->conn; + ssize_t nwritten = -1; + size_t numtowrite; ++ size_t remaining; + SMB_OFF_T startpos; + const char *data; + NTSTATUS status = NT_STATUS_OK; +@@ -4193,6 +4202,17 @@ void reply_writeunlock(struct smb_reques + startpos = IVAL_TO_SMB_OFF_T(req->vwv+2, 0); + data = (const char *)req->buf + 3; + ++ /* ++ * Ensure client isn't asking us to write more than ++ * they sent. CVE-2017-12163. ++ */ ++ remaining = smbreq_bufrem(req, data); ++ if (numtowrite > remaining) { ++ reply_nterror(req, NT_STATUS_INVALID_PARAMETER); ++ END_PROFILE(SMBwriteunlock); ++ return; ++ } ++ + if (!fsp->print_file && numtowrite > 0) { + init_strict_lock_struct(fsp, (uint64_t)req->smbpid, + (uint64_t)startpos, (uint64_t)numtowrite, WRITE_LOCK, +@@ -4274,6 +4294,7 @@ void reply_write(struct smb_request *req + { + connection_struct *conn = req->conn; + size_t numtowrite; ++ size_t remaining; + ssize_t nwritten = -1; + SMB_OFF_T startpos; + const char *data; +@@ -4314,6 +4335,17 @@ void reply_write(struct smb_request *req + startpos = IVAL_TO_SMB_OFF_T(req->vwv+2, 0); + data = (const char *)req->buf + 3; + ++ /* ++ * Ensure client isn't asking us to write more than ++ * they sent. CVE-2017-12163. ++ */ ++ remaining = smbreq_bufrem(req, data); ++ if (numtowrite > remaining) { ++ reply_nterror(req, NT_STATUS_INVALID_PARAMETER); ++ END_PROFILE(SMBwrite); ++ return; ++ } ++ + if (!fsp->print_file) { + init_strict_lock_struct(fsp, (uint64_t)req->smbpid, + (uint64_t)startpos, (uint64_t)numtowrite, WRITE_LOCK, +@@ -4525,6 +4557,9 @@ void reply_write_and_X(struct smb_reques + return; + } + } else { ++ /* ++ * This already protects us against CVE-2017-12163. ++ */ + if (smb_doff > smblen || smb_doff + numtowrite < numtowrite || + smb_doff + numtowrite > smblen) { + reply_nterror(req, NT_STATUS_INVALID_PARAMETER); +@@ -4894,6 +4929,7 @@ void reply_writeclose(struct smb_request + { + connection_struct *conn = req->conn; + size_t numtowrite; ++ size_t remaining; + ssize_t nwritten = -1; + NTSTATUS close_status = NT_STATUS_OK; + SMB_OFF_T startpos; +@@ -4927,6 +4963,17 @@ void reply_writeclose(struct smb_request + mtime = convert_time_t_to_timespec(srv_make_unix_date3(req->vwv+4)); + data = (const char *)req->buf + 1; + ++ /* ++ * Ensure client isn't asking us to write more than ++ * they sent. CVE-2017-12163. ++ */ ++ remaining = smbreq_bufrem(req, data); ++ if (numtowrite > remaining) { ++ reply_nterror(req, NT_STATUS_INVALID_PARAMETER); ++ END_PROFILE(SMBwriteclose); ++ return; ++ } ++ + if (!fsp->print_file) { + init_strict_lock_struct(fsp, (uint64_t)req->smbpid, + (uint64_t)startpos, (uint64_t)numtowrite, WRITE_LOCK, +@@ -5497,6 +5544,9 @@ void reply_printwrite(struct smb_request + + numtowrite = SVAL(req->buf, 1); + ++ /* ++ * This already protects us against CVE-2017-12163. ++ */ + if (req->buflen < numtowrite + 3) { + reply_nterror(req, NT_STATUS_INVALID_PARAMETER); + END_PROFILE(SMBsplwr); diff --git a/package/network/services/samba36/patches/032-CVE-2017-12150-v3.6.patch b/package/network/services/samba36/patches/032-CVE-2017-12150-v3.6.patch new file mode 100644 index 000000000..01589b8a7 --- /dev/null +++ b/package/network/services/samba36/patches/032-CVE-2017-12150-v3.6.patch @@ -0,0 +1,75 @@ +From: =?utf-8?q?Guido_G=C3=BCnther?= +Date: Wed, 20 Sep 2017 20:01:34 +0200 +Subject: CVE-2017-12150 + +These are the three upstream patches + + From: Stefan Metzmacher + Subject: CVE-2017-12150: s3:lib: get_cmdline_auth_info_signing_state use Required for smb_encrypt + + This is an addition to the fixes for CVE-2015-5296. + + It applies to smb2mount -e, smbcacls -e and smbcquotas -e. + + BUG: https://bugzilla.samba.org/show_bug.cgi?id=12997 + + + From: Stefan Metzmacher + Subject: CVE-2017-12150: libgpo: make use of Required for SMB signing in gpo_connect_server() + + It's important that we use a signed connection to get the GPOs! + + BUG: https://bugzilla.samba.org/show_bug.cgi?id=12997 + + Signed-off-by: Stefan Metzmacher + Backported-by: Andreas Schneider + + + From: Stefan Metzmacher + Subject: CVE-2017-12150: s3:libsmb: only fallback to anonymous if authentication was not requested + + With forced encryption or required signing we should also don't fallback. + + BUG: https://bugzilla.samba.org/show_bug.cgi?id=12997 + +--- + libgpo/gpo_fetch.c | 2 +- + source3/lib/util_cmdline.c | 3 +++ + source3/libsmb/clidfs.c | 2 ++ + 3 files changed, 6 insertions(+), 1 deletion(-) + +--- a/libgpo/gpo_fetch.c ++++ b/libgpo/gpo_fetch.c +@@ -151,7 +151,7 @@ static NTSTATUS gpo_connect_server(ADS_S + ads->auth.password, + CLI_FULL_CONNECTION_USE_KERBEROS | + CLI_FULL_CONNECTION_FALLBACK_AFTER_KERBEROS, +- Undefined); ++ Required); + if (!NT_STATUS_IS_OK(result)) { + DEBUG(10,("check_refresh_gpo: " + "failed to connect: %s\n", +--- a/source3/lib/util_cmdline.c ++++ b/source3/lib/util_cmdline.c +@@ -122,6 +122,9 @@ bool set_cmdline_auth_info_signing_state + + int get_cmdline_auth_info_signing_state(const struct user_auth_info *auth_info) + { ++ if (auth_info->smb_encrypt) { ++ return Required; ++ } + return auth_info->signing_state; + } + +--- a/source3/libsmb/clidfs.c ++++ b/source3/libsmb/clidfs.c +@@ -202,7 +202,9 @@ static struct cli_state *do_connect(TALL + /* If a password was not supplied then + * try again with a null username. */ + if (password[0] || !username[0] || ++ force_encrypt || client_is_signing_mandatory(c) || + get_cmdline_auth_info_use_kerberos(auth_info) || ++ get_cmdline_auth_info_use_ccache(auth_info) || + !NT_STATUS_IS_OK(cli_session_setup(c, "", + "", 0, + "", 0, diff --git a/package/network/services/samba36/patches/032-CVE-2018-1050-v3-6.patch b/package/network/services/samba36/patches/032-CVE-2018-1050-v3-6.patch new file mode 100644 index 000000000..4c44243a6 --- /dev/null +++ b/package/network/services/samba36/patches/032-CVE-2018-1050-v3-6.patch @@ -0,0 +1,49 @@ +From 6cc45e3452194f312e04109cfdae047eb0719c7c Mon Sep 17 00:00:00 2001 +From: Jeremy Allison +Date: Tue, 2 Jan 2018 15:56:03 -0800 +Subject: [PATCH] CVE-2018-1050: s3: RPC: spoolss server. Protect against null + pointer derefs. + +BUG: https://bugzilla.samba.org/show_bug.cgi?id=11343 + +Signed-off-by: Jeremy Allison +--- + source3/rpc_server/spoolss/srv_spoolss_nt.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/source3/rpc_server/spoolss/srv_spoolss_nt.c ++++ b/source3/rpc_server/spoolss/srv_spoolss_nt.c +@@ -176,6 +176,11 @@ static void prune_printername_cache(void + static const char *canon_servername(const char *servername) + { + const char *pservername = servername; ++ ++ if (servername == NULL) { ++ return ""; ++ } ++ + while (*pservername == '\\') { + pservername++; + } +@@ -2080,6 +2085,10 @@ WERROR _spoolss_DeletePrinterDriver(stru + return WERR_ACCESS_DENIED; + } + ++ if (r->in.architecture == NULL || r->in.driver == NULL) { ++ return WERR_INVALID_ENVIRONMENT; ++ } ++ + /* check that we have a valid driver name first */ + + if ((version = get_version_id(r->in.architecture)) == -1) +@@ -2225,6 +2234,10 @@ WERROR _spoolss_DeletePrinterDriverEx(st + return WERR_ACCESS_DENIED; + } + ++ if (r->in.architecture == NULL || r->in.driver == NULL) { ++ return WERR_INVALID_ENVIRONMENT; ++ } ++ + /* check that we have a valid driver name first */ + if (get_version_id(r->in.architecture) == -1) { + /* this is what NT returns */ diff --git a/package/network/services/samba36/patches/200-remove_printer_support.patch b/package/network/services/samba36/patches/200-remove_printer_support.patch index de567a762..90f13feb0 100644 --- a/package/network/services/samba36/patches/200-remove_printer_support.patch +++ b/package/network/services/samba36/patches/200-remove_printer_support.patch @@ -51,7 +51,7 @@ d_printf(_("Usage:\n")); --- a/source3/smbd/reply.c +++ b/source3/smbd/reply.c -@@ -5208,7 +5208,11 @@ void reply_printopen(struct smb_request +@@ -5255,7 +5255,11 @@ void reply_printopen(struct smb_request return; } @@ -64,7 +64,7 @@ reply_nterror(req, NT_STATUS_ACCESS_DENIED); END_PROFILE(SMBsplopen); return; -@@ -5314,7 +5318,10 @@ void reply_printqueue(struct smb_request +@@ -5361,7 +5365,10 @@ void reply_printqueue(struct smb_request is really quite gross and only worked when there was only one printer - I think we should now only accept it if they get it right (tridge) */ diff --git a/package/network/services/wireguard/Makefile b/package/network/services/wireguard/Makefile index 0cb17e9cc..9ed24ecaa 100644 --- a/package/network/services/wireguard/Makefile +++ b/package/network/services/wireguard/Makefile @@ -11,12 +11,12 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=wireguard -PKG_VERSION:=0.0.20171221 +PKG_VERSION:=0.0.20180420 PKG_RELEASE:=1 PKG_SOURCE:=WireGuard-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://git.zx2c4.com/WireGuard/snapshot/ -PKG_HASH:=2b97697e9b271ba8836a04120a287b824648124f21d5309170ec51c1f86ac5ed +PKG_HASH:=b58cd2acf9e8d3fe9044c06c0056bd74da1f5673a456f011d36eee3f6fb1da16 PKG_LICENSE:=GPL-2.0 Apache-2.0 PKG_LICENSE_FILES:=COPYING diff --git a/package/network/utils/curl/Config.in b/package/network/utils/curl/Config.in index 973da3d96..9afeb00bc 100644 --- a/package/network/utils/curl/Config.in +++ b/package/network/utils/curl/Config.in @@ -119,8 +119,8 @@ config LIBCURL_TLS_SRP bool "Enable TLS-SRP authentication" default n -config LIBCURL_LIBIDN - bool "Enable IDN support" +config LIBCURL_LIBIDN2 + bool "Enable IDN2 support" default n config LIBCURL_THREADED_RESOLVER diff --git a/package/network/utils/curl/Makefile b/package/network/utils/curl/Makefile index 17fcf704d..307ca9995 100644 --- a/package/network/utils/curl/Makefile +++ b/package/network/utils/curl/Makefile @@ -8,15 +8,15 @@ include $(TOPDIR)/rules.mk PKG_NAME:=curl -PKG_VERSION:=7.57.0 -PKG_RELEASE:=1 +PKG_VERSION:=7.59.0 +PKG_RELEASE:=2 -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://dl.uxnr.de/mirror/curl/ \ http://curl.mirror.anstey.ca/ \ http://curl.askapache.com/download/ \ https://curl.haxx.se/download/ -PKG_HASH:=c92fe31a348eae079121b73884065e600c533493eb50f1f6cee9c48a3f454826 +PKG_HASH:=e44eaabdf916407585bf5c7939ff1161e6242b6b015d3f2f5b758b2a330461fc PKG_LICENSE:=MIT PKG_LICENSE_FILES:=COPYING @@ -34,7 +34,7 @@ PKG_CONFIG_DEPENDS:= \ CONFIG_LIBCURL_MBEDTLS \ CONFIG_LIBCURL_NOSSL \ \ - CONFIG_LIBCURL_LIBIDN \ + CONFIG_LIBCURL_LIBIDN2 \ CONFIG_LIBCURL_SSH2 \ CONFIG_LIBCURL_ZLIB \ \ @@ -87,7 +87,7 @@ define Package/libcurl SECTION:=libs CATEGORY:=Libraries DEPENDS:= +LIBCURL_WOLFSSL:libwolfssl +LIBCURL_OPENSSL:libopenssl +LIBCURL_GNUTLS:libgnutls +LIBCURL_MBEDTLS:libmbedtls - DEPENDS += +LIBCURL_ZLIB:zlib +LIBCURL_THREADED_RESOLVER:libpthread +LIBCURL_LDAP:libopenldap +LIBCURL_LIBIDN:libidn + DEPENDS += +LIBCURL_ZLIB:zlib +LIBCURL_THREADED_RESOLVER:libpthread +LIBCURL_LDAP:libopenldap +LIBCURL_LIBIDN2:libidn2 DEPENDS += +LIBCURL_SSH2:libssh2 +LIBCURL_NGHTTP2:libnghttp2 TITLE:=A client-side URL transfer library MENU:=1 @@ -111,6 +111,7 @@ CONFIGURE_ARGS += \ --without-nss \ --without-libmetalink \ --without-librtmp \ + --without-libidn \ \ $(call autoconf_bool,CONFIG_IPV6,ipv6) \ \ @@ -119,7 +120,7 @@ CONFIGURE_ARGS += \ $(if $(CONFIG_LIBCURL_OPENSSL),--with-ssl="$(STAGING_DIR)/usr" --without-ca-bundle --with-ca-path=/etc/ssl/certs,--without-ssl) \ $(if $(CONFIG_LIBCURL_MBEDTLS),--with-mbedtls="$(STAGING_DIR)/usr" --without-ca-path --with-ca-bundle=/etc/ssl/certs/ca-certificates.crt,--without-mbedtls) \ \ - $(if $(CONFIG_LIBCURL_LIBIDN),--with-libidn="$(STAGING_DIR)/usr",--without-libidn) \ + $(if $(CONFIG_LIBCURL_LIBIDN2),--with-libidn2="$(STAGING_DIR)/usr",--without-libidn2) \ $(if $(CONFIG_LIBCURL_SSH2),--with-libssh2="$(STAGING_DIR)/usr",--without-libssh2) \ $(if $(CONFIG_LIBCURL_ZLIB),--with-zlib="$(STAGING_DIR)/usr",--without-zlib) \ $(if $(CONFIG_LIBCURL_NGHTTP2),--with-nghttp2="$(STAGING_DIR)/usr",--without-nghttp2) \ diff --git a/package/network/utils/curl/patches/200-no_docs_tests.patch b/package/network/utils/curl/patches/200-no_docs_tests.patch index a2a685125..1aa86a7e4 100644 --- a/package/network/utils/curl/patches/200-no_docs_tests.patch +++ b/package/network/utils/curl/patches/200-no_docs_tests.patch @@ -1,6 +1,6 @@ --- a/Makefile.am +++ b/Makefile.am -@@ -156,7 +156,7 @@ CLEANFILES = $(VC6_LIBDSP) $(VC6_SRCDSP) +@@ -168,7 +168,7 @@ CLEANFILES = $(VC6_LIBDSP) $(VC6_SRCDSP) bin_SCRIPTS = curl-config SUBDIRS = lib src @@ -9,7 +9,7 @@ pkgconfigdir = $(libdir)/pkgconfig pkgconfig_DATA = libcurl.pc -@@ -267,8 +267,8 @@ cygwinbin: +@@ -279,8 +279,8 @@ cygwinbin: # We extend the standard install with a custom hook: install-data-hook: cd include && $(MAKE) install diff --git a/package/network/utils/curl/patches/320-mbedtls_dont_use_deprecated_sha256_function.patch b/package/network/utils/curl/patches/320-mbedtls_dont_use_deprecated_sha256_function.patch new file mode 100644 index 000000000..5c4c18c2a --- /dev/null +++ b/package/network/utils/curl/patches/320-mbedtls_dont_use_deprecated_sha256_function.patch @@ -0,0 +1,11 @@ +--- a/lib/vtls/mbedtls.c ++++ b/lib/vtls/mbedtls.c +@@ -1029,7 +1029,7 @@ static void Curl_mbedtls_sha256sum(const + size_t sha256len UNUSED_PARAM) + { + (void)sha256len; +- mbedtls_sha256(input, inputlen, sha256sum, 0); ++ mbedtls_sha256_ret(input, inputlen, sha256sum, 0); + } + + static void *Curl_mbedtls_get_internals(struct ssl_connect_data *connssl, diff --git a/package/network/utils/ebtables/Makefile b/package/network/utils/ebtables/Makefile index 693b4d8f0..baa8f2efe 100644 --- a/package/network/utils/ebtables/Makefile +++ b/package/network/utils/ebtables/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ebtables -PKG_SOURCE_DATE:=2017-10-24 +PKG_SOURCE_DATE:=2018-04-11 PKG_RELEASE:=1 PKG_SOURCE_URL:=https://git.netfilter.org/ebtables PKG_SOURCE_PROTO:=git -PKG_SOURCE_VERSION:=6a826591878db3fa9e2a94b87a3d5edd8e0fc442 -PKG_MIRROR_HASH:=7100f34f8d9373c88a788e8161f8158b364b4d6c87f766fc353382b6111196bd +PKG_SOURCE_VERSION:=2e783b2277665c467138e7685309622456c41db4 +PKG_MIRROR_HASH:=601a41f579f76c8121bb6076ebcf5eb5efddf634ebb5949ec9e983a17e66e689 PKG_LICENSE:=GPL-2.0 diff --git a/package/network/utils/ebtables/patches/200-fix-extension-init.patch b/package/network/utils/ebtables/patches/200-fix-extension-init.patch index b77df159a..52ab175ec 100644 --- a/package/network/utils/ebtables/patches/200-fix-extension-init.patch +++ b/package/network/utils/ebtables/patches/200-fix-extension-init.patch @@ -62,7 +62,7 @@ } --- a/extensions/ebt_ip.c +++ b/extensions/ebt_ip.c -@@ -338,7 +338,7 @@ static struct ebt_u_match ip_match = +@@ -472,7 +472,7 @@ static struct ebt_u_match ip_match = .extra_ops = opts, }; @@ -73,7 +73,7 @@ } --- a/extensions/ebt_ip6.c +++ b/extensions/ebt_ip6.c -@@ -560,7 +560,7 @@ static struct ebt_u_match ip6_match = +@@ -413,7 +413,7 @@ static struct ebt_u_match ip6_match = .extra_ops = opts, }; diff --git a/package/network/utils/iperf3/Makefile b/package/network/utils/iperf3/Makefile index a64d7396a..2635d5959 100644 --- a/package/network/utils/iperf3/Makefile +++ b/package/network/utils/iperf3/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=iperf -PKG_VERSION:=3.3 +PKG_VERSION:=3.5 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=http://downloads.es.net/pub/iperf -PKG_HASH:=6f596271251056bffc11bbb8f17d4244ad9a7d4a317c2459fdbb853ae51284d8 +PKG_HASH:=539bd9ecdca1b8c1157ff85b70ed09b3c75242e69886fc16b54883b399f72cd5 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=BSD-3-Clause diff --git a/package/network/utils/iperf3/patches/010-iperf-3.3-fix-build-warnings.patch b/package/network/utils/iperf3/patches/010-iperf-3.3-fix-build-warnings.patch deleted file mode 100644 index d617ba9f4..000000000 --- a/package/network/utils/iperf3/patches/010-iperf-3.3-fix-build-warnings.patch +++ /dev/null @@ -1,300 +0,0 @@ -The following patches are taken directly from: - -https://github.com/esnet/iperf/pull/664 - -as an upstream submission. - -commit b63d41b25f49a76d0be66edfb61bd4cb68921d55 -Author: Philip Prindeville -Date: Tue Oct 31 13:41:08 2017 -0600 - - Fix warnings about _GNU_SOURCE being redefined. - - Signed-off-by: Philip Prindeville - -diff --git a/src/iperf.h b/src/iperf.h -index bb951dc..b656784 100755 ---- a/src/iperf.h -+++ b/src/iperf.h -@@ -36,7 +36,9 @@ - #endif - #include - #include --#define _GNU_SOURCE -+#ifndef _GNU_SOURCE -+# define _GNU_SOURCE -+#endif - #include - - #if defined(HAVE_CPUSET_SETAFFINITY) -diff --git a/src/iperf_api.c b/src/iperf_api.c -index ab30b93..9e41238 100755 ---- a/src/iperf_api.c -+++ b/src/iperf_api.c -@@ -24,7 +24,9 @@ - * This code is distributed under a BSD style license, see the LICENSE file - * for complete information. - */ --#define _GNU_SOURCE -+#ifndef _GNU_SOURCE -+# define _GNU_SOURCE -+#endif - #define __USE_GNU - - #include "iperf_config.h" - -commit 315254cfc5f5682627f4a46ade3100bc3c64cfcc -Author: Philip Prindeville -Date: Tue Oct 31 13:42:58 2017 -0600 - - Fix warnings of format-specified mismatching type - - Signed-off-by: Philip Prindeville - -diff --git a/src/iperf_tcp.c b/src/iperf_tcp.c -index 91cf032..6f86d5d 100644 ---- a/src/iperf_tcp.c -+++ b/src/iperf_tcp.c -@@ -24,8 +24,6 @@ - * This code is distributed under a BSD style license, see the LICENSE - * file for complete information. - */ --#include "iperf_config.h" -- - #include - #include - #include -@@ -44,6 +42,12 @@ - #include "net.h" - #include "cjson.h" - -+#if defined(HAVE_INTTYPES_H) -+# include -+#else -+# define PRIu64 "llu" -+#endif -+ - #if defined(HAVE_FLOWLABEL) - #include "flowlabel.h" - #endif /* HAVE_FLOWLABEL */ -@@ -90,7 +94,7 @@ iperf_tcp_send(struct iperf_stream *sp) - sp->result->bytes_sent_this_interval += r; - - if (sp->test->debug) -- printf("sent %d bytes of %d, total %llu\n", r, sp->settings->blksize, sp->result->bytes_sent); -+ printf("sent %d bytes of %d, total %" PRIu64 "\n", r, sp->settings->blksize, sp->result->bytes_sent); - - return r; - } -diff --git a/src/iperf_udp.c b/src/iperf_udp.c -index a2ea6d0..d04ae44 100644 ---- a/src/iperf_udp.c -+++ b/src/iperf_udp.c -@@ -48,6 +48,12 @@ - #include "cjson.h" - #include "portable_endian.h" - -+#if defined(HAVE_INTTYPES_H) -+# include -+#else -+# define PRIu64 "llu" -+#endif -+ - /* iperf_udp_recv - * - * receives the data for UDP -@@ -98,7 +104,7 @@ iperf_udp_recv(struct iperf_stream *sp) - } - - if (sp->test->debug) -- fprintf(stderr, "pcount %llu packet_count %d\n", pcount, sp->packet_count); -+ fprintf(stderr, "pcount %" PRIu64 " packet_count %d\n", pcount, sp->packet_count); - - /* - * Try to handle out of order packets. The way we do this -@@ -141,7 +147,7 @@ iperf_udp_recv(struct iperf_stream *sp) - - /* Log the out-of-order packet */ - if (sp->test->debug) -- fprintf(stderr, "OUT OF ORDER - incoming packet sequence %llu but expected sequence %d on stream %d", pcount, sp->packet_count, sp->socket); -+ fprintf(stderr, "OUT OF ORDER - incoming packet sequence %" PRIu64 " but expected sequence %d on stream %d", pcount, sp->packet_count, sp->socket); - } - - /* -@@ -220,7 +226,7 @@ iperf_udp_send(struct iperf_stream *sp) - sp->result->bytes_sent_this_interval += r; - - if (sp->test->debug) -- printf("sent %d bytes of %d, total %llu\n", r, sp->settings->blksize, sp->result->bytes_sent); -+ printf("sent %d bytes of %d, total %" PRIu64 "\n", r, sp->settings->blksize, sp->result->bytes_sent); - - return r; - } - -commit 9a66b3b0349e0a158bb4940b668a5cbc7c245762 -Author: Philip Prindeville -Date: Tue Oct 31 13:44:34 2017 -0600 - - Simplify endianness checks - - Linux can be built with too many types of C run-time library and it's - not reasonable to have to enumerate all of them, especially since at - least one of them (MUSL) goes out of its way to not be easily - detectable. - - Instead, leverage autoconf better for Linux/BSD to detect either - or directly. - - Signed-off-by: Philip Prindeville - -diff --git a/configure.ac b/configure.ac -index f57e83f..cfb42ac 100644 ---- a/configure.ac -+++ b/configure.ac -@@ -101,6 +101,14 @@ AC_CHECK_HEADERS([netinet/sctp.h], - #endif - ]) - -+AC_CHECK_HEADER([endian.h], -+ AC_DEFINE([HAVE_ENDIAN_H], [1], [Define to 1 if you have the header file.]), -+ AC_CHECK_HEADER([sys/endian.h], -+ AC_DEFINE([HAVE_SYS_ENDIAN_H], [1], [Define to 1 if you have the header file.]), -+ AC_MSG_WARN([Couldn't find endian.h or sys/endian.h files: doing compile-time tests.]) -+ ) -+ ) -+ - if test "x$with_openssl" = "xno"; then - AC_MSG_WARN( [Building without OpenSSL; disabling iperf_auth functionality.] ) - else -diff --git a/src/iperf_config.h.in b/src/iperf_config.h.in -index bd03935..a9e51ec 100644 ---- a/src/iperf_config.h.in -+++ b/src/iperf_config.h.in -@@ -9,6 +9,9 @@ - /* Define to 1 if you have the header file. */ - #undef HAVE_DLFCN_H - -+/* Define to 1 if you have the header file. */ -+#undef HAVE_ENDIAN_H -+ - /* Have IPv6 flowlabel support. */ - #undef HAVE_FLOWLABEL - -@@ -54,6 +57,9 @@ - /* Define to 1 if the system has the type `struct sctp_assoc_value'. */ - #undef HAVE_STRUCT_SCTP_ASSOC_VALUE - -+/* Define to 1 if you have the header file. */ -+#undef HAVE_SYS_ENDIAN_H -+ - /* Define to 1 if you have the header file. */ - #undef HAVE_SYS_SOCKET_H - -diff --git a/src/portable_endian.h b/src/portable_endian.h -index b86d37a..5dbc6e5 100644 ---- a/src/portable_endian.h -+++ b/src/portable_endian.h -@@ -10,14 +10,33 @@ - - #endif - --// GLIBC / Linux with endian(3) support, which was added in glibc 2.9. --// Intended to support CentOS 6 and newer. --#if defined(__linux__) && \ -- ((__GLIBC__ > 3) || \ -- (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 9)) -- -+#if defined(HAVE_ENDIAN_H) - # include - -+#elif defined(HAVE_SYS_ENDIAN_H) -+# include -+ -+# if defined(__OpenBSD__) -+ -+# define be16toh(x) betoh16(x) -+# define le16toh(x) letoh16(x) -+ -+# define be32toh(x) betoh32(x) -+# define le32toh(x) letoh32(x) -+ -+# define be64toh(x) betoh64(x) -+# define le64toh(x) letoh64(x) -+ -+# elif defined(__sgi) -+ -+# include -+# include -+ -+# define be64toh(x) (x) -+# define htobe64(x) (x) -+ -+# endif -+ - #elif defined(__CYGWIN__) - - # include -@@ -46,32 +65,6 @@ - # define __LITTLE_ENDIAN LITTLE_ENDIAN - # define __PDP_ENDIAN PDP_ENDIAN - --#elif defined(__OpenBSD__) -- --# include -- --# define be16toh(x) betoh16(x) --# define le16toh(x) letoh16(x) -- --# define be32toh(x) betoh32(x) --# define le32toh(x) letoh32(x) -- --# define be64toh(x) betoh64(x) --# define le64toh(x) letoh64(x) -- --#elif defined(__NetBSD__) || defined(__FreeBSD__) || defined(__DragonFly__) -- --# include -- --#elif defined(__sgi) -- --# include --# include --# include -- --# define be64toh(x) (x) --# define htobe64(x) (x) -- - #elif defined(__sun) && defined(__SVR4) - - # include - -commit 7e7285d0daf92ef7beda8f78a6f63cc647a77f38 -Author: Philip Prindeville -Date: Tue Oct 31 13:48:06 2017 -0600 - - Sys headers should not be included directly - - There's usually a top-level header which then includes the sys/ - descendent. - - Signed-off-by: Philip Prindeville - -diff --git a/src/net.c b/src/net.c -index af456cb..afd0022 100644 ---- a/src/net.c -+++ b/src/net.c -@@ -31,13 +31,12 @@ - #include - #include - #include --#include - #include - #include - #include - #include - #include --#include -+#include - - #ifdef HAVE_SENDFILE - #ifdef linux diff --git a/package/network/utils/iproute2/Makefile b/package/network/utils/iproute2/Makefile index 5f718748d..ef4befaed 100644 --- a/package/network/utils/iproute2/Makefile +++ b/package/network/utils/iproute2/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=iproute2 -PKG_VERSION:=4.14.1 -PKG_RELEASE:=2 +PKG_VERSION:=4.15.0 +PKG_RELEASE:=3 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@KERNEL/linux/utils/net/iproute2 -PKG_HASH:=d43ac068afcc350a448f4581b6e292331ef7e4e7aa746e34981582d5fdb10067 +PKG_HASH:=48d4616a99d7b609b7b795c0ae8ec57099fb0271ed89253e8772c02327798355 PKG_BUILD_PARALLEL:=1 PKG_BUILD_DEPENDS:=iptables PKG_LICENSE:=GPL-2.0 diff --git a/package/network/utils/iproute2/patches/006-no_sctp.patch b/package/network/utils/iproute2/patches/006-no_sctp.patch deleted file mode 100644 index e23fbcd77..000000000 --- a/package/network/utils/iproute2/patches/006-no_sctp.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/ip/ipxfrm.c -+++ b/ip/ipxfrm.c -@@ -454,7 +454,6 @@ void xfrm_selector_print(struct xfrm_sel - switch (sel->proto) { - case IPPROTO_TCP: - case IPPROTO_UDP: -- case IPPROTO_SCTP: - case IPPROTO_DCCP: - default: /* XXX */ - if (sel->sport_mask) -@@ -1329,7 +1328,6 @@ static int xfrm_selector_upspec_parse(st - switch (sel->proto) { - case IPPROTO_TCP: - case IPPROTO_UDP: -- case IPPROTO_SCTP: - case IPPROTO_DCCP: - case IPPROTO_IP: /* to allow shared SA for different protocols */ - break; diff --git a/package/network/utils/iproute2/patches/007-no_arpd.patch b/package/network/utils/iproute2/patches/007-no_arpd.patch index ac216ba82..772398140 100644 --- a/package/network/utils/iproute2/patches/007-no_arpd.patch +++ b/package/network/utils/iproute2/patches/007-no_arpd.patch @@ -1,6 +1,6 @@ --- a/misc/Makefile +++ b/misc/Makefile -@@ -5,9 +5,9 @@ TARGETS=ss nstat ifstat rtacct lnstat +@@ -6,9 +6,9 @@ TARGETS=ss nstat ifstat rtacct lnstat include ../config.mk diff --git a/package/network/utils/iproute2/patches/008-no_netem.patch b/package/network/utils/iproute2/patches/008-no_netem.patch index 2e088f199..15a60e794 100644 --- a/package/network/utils/iproute2/patches/008-no_netem.patch +++ b/package/network/utils/iproute2/patches/008-no_netem.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -49,7 +49,7 @@ WFLAGS += -Wmissing-declarations -Wold-s +@@ -57,7 +57,7 @@ WFLAGS += -Wmissing-declarations -Wold-s CFLAGS := $(WFLAGS) $(CCOPTS) -I../include -I../include/uapi $(DEFINES) $(CFLAGS) YACCFLAGS = -d -t -v diff --git a/package/network/utils/iproute2/patches/009-keep_libmnl_optional.patch b/package/network/utils/iproute2/patches/009-keep_libmnl_optional.patch index 7a5a70223..61f8a695e 100644 --- a/package/network/utils/iproute2/patches/009-keep_libmnl_optional.patch +++ b/package/network/utils/iproute2/patches/009-keep_libmnl_optional.patch @@ -1,6 +1,6 @@ --- a/configure +++ b/configure -@@ -292,7 +292,7 @@ check_selinux() +@@ -293,7 +293,7 @@ check_selinux() check_mnl() { diff --git a/package/network/utils/iproute2/patches/110-extra-ccopts.patch b/package/network/utils/iproute2/patches/110-extra-ccopts.patch index e779934d7..a083b7c04 100644 --- a/package/network/utils/iproute2/patches/110-extra-ccopts.patch +++ b/package/network/utils/iproute2/patches/110-extra-ccopts.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -42,7 +42,7 @@ HOSTCC ?= $(CC) +@@ -50,7 +50,7 @@ HOSTCC ?= $(CC) DEFINES += -D_GNU_SOURCE # Turn on transparent support for LFS DEFINES += -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -D_LARGEFILE64_SOURCE diff --git a/package/network/utils/iproute2/patches/120-libnetlink-pic.patch b/package/network/utils/iproute2/patches/120-libnetlink-pic.patch index 83ce66d97..889bca28b 100644 --- a/package/network/utils/iproute2/patches/120-libnetlink-pic.patch +++ b/package/network/utils/iproute2/patches/120-libnetlink-pic.patch @@ -1,6 +1,7 @@ --- a/lib/Makefile +++ b/lib/Makefile -@@ -1,6 +1,6 @@ +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 include ../config.mk -CFLAGS += -fPIC diff --git a/package/network/utils/iproute2/patches/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch b/package/network/utils/iproute2/patches/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch deleted file mode 100644 index e3364ad05..000000000 --- a/package/network/utils/iproute2/patches/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch +++ /dev/null @@ -1,107 +0,0 @@ -From f972afc2509eebcb00d370256c55b112a3b5ffca Mon Sep 17 00:00:00 2001 -From: David Heidelberger -Date: Mon, 29 Jun 2015 16:50:40 +0200 -Subject: [PATCH 2/3] uapi/libc-compat.h: do not rely on __GLIBC__ - -Musl provides the same structs as glibc, but does not provide a define to -allow its detection. Since the absence of __GLIBC__ also can mean that it -is included from the kernel, change the __GLIBC__ detection to -!__KERNEL__, which should always be true when included from userspace. - -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/libc-compat.h | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - ---- a/include/uapi/linux/libc-compat.h -+++ b/include/uapi/linux/libc-compat.h -@@ -49,13 +49,13 @@ - #ifndef _LIBC_COMPAT_H - #define _LIBC_COMPAT_H - --/* We have included glibc headers... */ --#if defined(__GLIBC__) -+/* We have included libc headers... */ -+#if !defined(__KERNEL__) - --/* Coordinate with glibc net/if.h header. */ --#if defined(_NET_IF_H) && defined(__USE_MISC) -+/* Coordinate with libc net/if.h header. */ -+#if defined(_NET_IF_H) && (!defined(__GLIBC__) || defined(__USE_MISC)) - --/* GLIBC headers included first so don't define anything -+/* LIBC headers included first so don't define anything - * that would already be defined. */ - - #define __UAPI_DEF_IF_IFCONF 0 -@@ -66,7 +66,11 @@ - #define __UAPI_DEF_IF_NET_DEVICE_FLAGS 0 - /* For the future if glibc adds IFF_LOWER_UP, IFF_DORMANT and IFF_ECHO */ - #ifndef __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO -+#ifdef __GLIBC__ - #define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 1 -+#else -+#define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 0 -+#endif - #endif /* __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO */ - - #else /* _NET_IF_H */ -@@ -86,10 +90,10 @@ - - #endif /* _NET_IF_H */ - --/* Coordinate with glibc netinet/in.h header. */ -+/* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - --/* GLIBC headers included first so don't define anything -+/* LIBC headers included first so don't define anything - * that would already be defined. */ - #define __UAPI_DEF_IN_ADDR 0 - #define __UAPI_DEF_IN_IPPROTO 0 -@@ -103,7 +107,7 @@ - * if the glibc code didn't define them. This guard matches - * the guard in glibc/inet/netinet/in.h which defines the - * additional in6_addr macros e.g. s6_addr16, and s6_addr32. */ --#if defined(__USE_MISC) || defined (__USE_GNU) -+#if !defined(__GLIBC__) || defined(__USE_MISC) || defined (__USE_GNU) - #define __UAPI_DEF_IN6_ADDR_ALT 0 - #else - #define __UAPI_DEF_IN6_ADDR_ALT 1 -@@ -118,7 +122,7 @@ - #else - - /* Linux headers included first, and we must define everything -- * we need. The expectation is that glibc will check the -+ * we need. The expectation is that the libc will check the - * __UAPI_DEF_* defines and adjust appropriately. */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 -@@ -128,7 +132,7 @@ - #define __UAPI_DEF_IN_CLASS 1 - - #define __UAPI_DEF_IN6_ADDR 1 --/* We unconditionally define the in6_addr macros and glibc must -+/* We unconditionally define the in6_addr macros and the libc must - * coordinate. */ - #define __UAPI_DEF_IN6_ADDR_ALT 1 - #define __UAPI_DEF_SOCKADDR_IN6 1 -@@ -169,7 +173,7 @@ - /* If we did not see any headers from any supported C libraries, - * or we are being included in the kernel, then define everything - * that we need. */ --#else /* !defined(__GLIBC__) */ -+#else /* defined(__KERNEL__) */ - - /* Definitions for if.h */ - #define __UAPI_DEF_IF_IFCONF 1 -@@ -209,6 +213,6 @@ - /* Definitions for xattr.h */ - #define __UAPI_DEF_XATTR 1 - --#endif /* __GLIBC__ */ -+#endif /* __KERNEL__ */ - - #endif /* _LIBC_COMPAT_H */ diff --git a/package/network/utils/iproute2/patches/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch b/package/network/utils/iproute2/patches/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch deleted file mode 100644 index abd1f7eac..000000000 --- a/package/network/utils/iproute2/patches/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch +++ /dev/null @@ -1,67 +0,0 @@ -From fcbb6fed85ea9ff4feb4f1ebd4f0f235fdaf06b6 Mon Sep 17 00:00:00 2001 -From: David Heidelberger -Date: Mon, 29 Jun 2015 16:53:03 +0200 -Subject: [PATCH 3/3] uapi/if_ether.h: prevent redefinition of struct ethhdr - -Musl provides its own ethhdr struct definition. Add a guard to prevent -its definition of the appropriate musl header has already been included. - -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/if_ether.h | 3 +++ - include/uapi/linux/libc-compat.h | 11 +++++++++++ - 2 files changed, 14 insertions(+) - ---- a/include/uapi/linux/if_ether.h -+++ b/include/uapi/linux/if_ether.h -@@ -23,6 +23,7 @@ - #define _LINUX_IF_ETHER_H - - #include -+#include - - /* - * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble -@@ -149,11 +150,13 @@ - * This is an Ethernet frame header. - */ - -+#if __UAPI_DEF_ETHHDR - struct ethhdr { - unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ - unsigned char h_source[ETH_ALEN]; /* source ether addr */ - __be16 h_proto; /* packet type ID field */ - } __attribute__((packed)); -+#endif - - - #endif /* _LINUX_IF_ETHER_H */ ---- a/include/uapi/linux/libc-compat.h -+++ b/include/uapi/linux/libc-compat.h -@@ -90,6 +90,14 @@ - - #endif /* _NET_IF_H */ - -+/* musl defines the ethhdr struct itself in its netinet/if_ether.h. -+ * Glibc just includes the kernel header and uses a different guard. */ -+#if defined(_NETINET_IF_ETHER_H) -+#define __UAPI_DEF_ETHHDR 0 -+#else -+#define __UAPI_DEF_ETHHDR 1 -+#endif -+ - /* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - -@@ -185,6 +193,9 @@ - /* For the future if glibc adds IFF_LOWER_UP, IFF_DORMANT and IFF_ECHO */ - #define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 1 - -+/* Definitions for if_ether.h */ -+#define __UAPI_DEF_ETHHDR 1 -+ - /* Definitions for in.h */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 diff --git a/package/network/utils/iproute2/patches/300-ip_tiny.patch b/package/network/utils/iproute2/patches/300-ip_tiny.patch index 35b588f7e..d06e91e37 100644 --- a/package/network/utils/iproute2/patches/300-ip_tiny.patch +++ b/package/network/utils/iproute2/patches/300-ip_tiny.patch @@ -1,6 +1,6 @@ --- a/ip/Makefile +++ b/ip/Makefile -@@ -15,6 +15,13 @@ RTMONOBJ=rtmon.o +@@ -16,6 +16,13 @@ RTMONOBJ=rtmon.o include ../config.mk @@ -14,7 +14,7 @@ ALLOBJ=$(IPOBJ) $(RTMONOBJ) SCRIPTS=ifcfg rtpr routel routef TARGETS=ip rtmon -@@ -44,7 +51,7 @@ else +@@ -45,7 +52,7 @@ else ip: static-syms.o static-syms.o: static-syms.h @@ -25,7 +25,7 @@ sed -n '/'$$s'[^ ]* =/{s:.* \([^ ]*'$$s'[^ ]*\) .*:extern char \1[] __attribute__((weak)); if (!strcmp(sym, "\1")) return \1;:;p}' $$files ; \ --- a/ip/ip.c +++ b/ip/ip.c -@@ -49,10 +49,16 @@ static void usage(void) +@@ -48,10 +48,16 @@ static void usage(void) fprintf(stderr, "Usage: ip [ OPTIONS ] OBJECT { COMMAND | help }\n" " ip [ -force ] -batch filename\n" @@ -42,7 +42,7 @@ " OPTIONS := { -V[ersion] | -s[tatistics] | -d[etails] | -r[esolve] |\n" " -h[uman-readable] | -iec |\n" " -f[amily] { inet | inet6 | ipx | dnet | mpls | bridge | link } |\n" -@@ -74,32 +80,44 @@ static const struct cmd { +@@ -73,32 +79,44 @@ static const struct cmd { int (*func)(int argc, char **argv); } cmds[] = { { "address", do_ipaddr }, @@ -89,7 +89,7 @@ { "help", do_help }, --- a/lib/utils.c +++ b/lib/utils.c -@@ -817,6 +817,7 @@ const char *rt_addr_n2a_r(int af, int le +@@ -885,6 +885,7 @@ const char *rt_addr_n2a_r(int af, int le return inet_ntop(af, addr, buf, buflen); case AF_MPLS: return mpls_ntop(af, addr, buf, buflen); @@ -97,7 +97,7 @@ case AF_IPX: return ipx_ntop(af, addr, buf, buflen); case AF_DECnet: -@@ -826,6 +827,7 @@ const char *rt_addr_n2a_r(int af, int le +@@ -894,6 +895,7 @@ const char *rt_addr_n2a_r(int af, int le memcpy(dna.a_addr, addr, 2); return dnet_ntop(af, &dna, buf, buflen); } @@ -107,7 +107,7 @@ default: --- a/lib/Makefile +++ b/lib/Makefile -@@ -2,6 +2,10 @@ include ../config.mk +@@ -3,6 +3,10 @@ include ../config.mk CFLAGS += $(FPIC) diff --git a/package/network/utils/iproute2/patches/900-drop_FAILED_POLICY.patch b/package/network/utils/iproute2/patches/900-drop_FAILED_POLICY.patch index 1980f8710..9c063791d 100644 --- a/package/network/utils/iproute2/patches/900-drop_FAILED_POLICY.patch +++ b/package/network/utils/iproute2/patches/900-drop_FAILED_POLICY.patch @@ -11,7 +11,7 @@ Subject: [PATCH] add support for dropping with FAILED_POLICY --- a/ip/rtm_map.c +++ b/ip/rtm_map.c -@@ -49,6 +49,8 @@ char *rtnl_rtntype_n2a(int id, char *buf +@@ -48,6 +48,8 @@ char *rtnl_rtntype_n2a(int id, char *buf return "nat"; case RTN_XRESOLVE: return "xresolve"; @@ -20,7 +20,7 @@ Subject: [PATCH] add support for dropping with FAILED_POLICY default: snprintf(buf, len, "%d", id); return buf; -@@ -84,6 +86,8 @@ int rtnl_rtntype_a2n(int *id, char *arg) +@@ -83,6 +85,8 @@ int rtnl_rtntype_a2n(int *id, char *arg) res = RTN_UNICAST; else if (strcmp(arg, "throw") == 0) res = RTN_THROW; diff --git a/package/network/utils/iproute2/patches/950-add-cake-to-tc.patch b/package/network/utils/iproute2/patches/950-add-cake-to-tc.patch index 5e91cd7ed..216d7c7ef 100644 --- a/package/network/utils/iproute2/patches/950-add-cake-to-tc.patch +++ b/package/network/utils/iproute2/patches/950-add-cake-to-tc.patch @@ -1,10 +1,11 @@ +diff --git a/include/uapi/linux/pkt_sched.h b/include/uapi/linux/pkt_sched.h +index 37b5096a..66da5df9 100644 --- a/include/uapi/linux/pkt_sched.h +++ b/include/uapi/linux/pkt_sched.h -@@ -872,4 +872,63 @@ struct tc_pie_xstats { - __u32 maxq; /* maximum queue size */ - __u32 ecn_mark; /* packets marked with ecn*/ - }; -+ +@@ -934,4 +934,75 @@ enum { + + #define TCA_CBS_MAX (__TCA_CBS_MAX - 1) + +/* CAKE */ +enum { + TCA_CAKE_UNSPEC, @@ -18,7 +19,7 @@ + TCA_CAKE_AUTORATE, + TCA_CAKE_MEMORY, + TCA_CAKE_NAT, -+ TCA_CAKE_ETHERNET, ++ TCA_CAKE_RAW, // was _ETHERNET + TCA_CAKE_WASH, + TCA_CAKE_MPU, + TCA_CAKE_INGRESS, @@ -34,53 +35,757 @@ +}; + +#define TC_CAKE_MAX_TINS (8) -+struct tc_cake_xstats { -+ __u16 version; /* == 5, increments when struct extended */ -+ __u8 max_tins; /* == TC_CAKE_MAX_TINS */ -+ __u8 tin_cnt; /* <= TC_CAKE_MAX_TINS */ ++struct tc_cake_tin_stats { + -+ __u32 threshold_rate [TC_CAKE_MAX_TINS]; -+ __u32 target_us [TC_CAKE_MAX_TINS]; -+ struct tc_cake_traffic_stats sent [TC_CAKE_MAX_TINS]; -+ struct tc_cake_traffic_stats dropped [TC_CAKE_MAX_TINS]; -+ struct tc_cake_traffic_stats ecn_marked[TC_CAKE_MAX_TINS]; -+ struct tc_cake_traffic_stats backlog [TC_CAKE_MAX_TINS]; -+ __u32 interval_us [TC_CAKE_MAX_TINS]; -+ __u32 way_indirect_hits[TC_CAKE_MAX_TINS]; -+ __u32 way_misses [TC_CAKE_MAX_TINS]; -+ __u32 way_collisions [TC_CAKE_MAX_TINS]; -+ __u32 peak_delay_us [TC_CAKE_MAX_TINS]; /* ~= bulk flow delay */ -+ __u32 avge_delay_us [TC_CAKE_MAX_TINS]; -+ __u32 base_delay_us [TC_CAKE_MAX_TINS]; /* ~= sparse flows delay */ -+ __u16 sparse_flows [TC_CAKE_MAX_TINS]; -+ __u16 bulk_flows [TC_CAKE_MAX_TINS]; -+ __u16 unresponse_flows [TC_CAKE_MAX_TINS]; /* v4 - was u32 last_len */ -+ __u16 spare [TC_CAKE_MAX_TINS]; /* v4 - split last_len */ -+ __u32 max_skblen [TC_CAKE_MAX_TINS]; -+ __u32 capacity_estimate; /* version 2 */ -+ __u32 memory_limit; /* version 3 */ -+ __u32 memory_used; /* version 3 */ -+ struct tc_cake_traffic_stats ack_drops [TC_CAKE_MAX_TINS]; /* v5 */ ++ __u32 threshold_rate; ++ __u32 target_us; ++ struct tc_cake_traffic_stats sent; ++ struct tc_cake_traffic_stats dropped; ++ struct tc_cake_traffic_stats ecn_marked; ++ struct tc_cake_traffic_stats backlog; ++ __u32 interval_us; ++ __u32 way_indirect_hits; ++ __u32 way_misses; ++ __u32 way_collisions; ++ __u32 peak_delay_us; /* ~= bulk flow delay */ ++ __u32 avge_delay_us; ++ __u32 base_delay_us; /* ~= sparse flows delay */ ++ __u16 sparse_flows; ++ __u16 bulk_flows; ++ __u16 unresponse_flows; ++ __u16 spare; ++ __u32 max_skblen; ++ struct tc_cake_traffic_stats ack_drops; ++}; ++ ++struct tc_cake_xstats { ++ __u16 version; ++ __u16 tin_stats_size; /* == sizeof(struct tc_cake_tin_stats) */ ++ __u32 capacity_estimate; ++ __u32 memory_limit; ++ __u32 memory_used; ++ __u8 tin_cnt; ++ __u8 avg_trnoff; ++ __u16 max_trnlen; ++ __u16 max_adjlen; ++ __u16 min_trnlen; ++ __u16 min_adjlen; ++ ++ __u16 spare1; ++ __u32 spare2; ++ ++ struct tc_cake_tin_stats tin_stats[0]; /* keep last */ +}; + #endif +diff --git a/man/man8/tc-cake.8 b/man/man8/tc-cake.8 +new file mode 100644 +index 00000000..ff77db8f +--- /dev/null ++++ b/man/man8/tc-cake.8 +@@ -0,0 +1,678 @@ ++.TH CAKE 8 "23 November 2017" "iproute2" "Linux" ++.SH NAME ++CAKE \- COMMON Applications Kept Enhanced (CAKE) ++.SH SYNOPSIS ++.B tc qdisc ... cake ++.br ++[ ++.BR bandwidth ++RATE | ++.BR unlimited* ++| ++.BR autorate_ingress ++] ++.br ++[ ++.BR rtt ++TIME | ++.BR datacentre ++| ++.BR lan ++| ++.BR metro ++| ++.BR regional ++| ++.BR internet* ++| ++.BR oceanic ++| ++.BR satellite ++| ++.BR interplanetary ++] ++.br ++[ ++.BR besteffort ++| ++.BR diffserv8 ++| ++.BR diffserv4 ++| ++.BR diffserv-llt ++| ++.BR diffserv3* ++] ++.br ++[ ++.BR flowblind ++| ++.BR srchost ++| ++.BR dsthost ++| ++.BR hosts ++| ++.BR flows ++| ++.BR dual-srchost ++| ++.BR dual-dsthost ++| ++.BR triple-isolate* ++] ++.br ++[ ++.BR nat ++| ++.BR nonat* ++] ++.br ++[ ++.BR wash ++| ++.BR nowash* ++] ++.br ++[ ++.BR ack-filter ++| ++.BR ack-filter-aggressive ++| ++.BR no-ack-filter* ++] ++.br ++[ ++.BR memlimit ++LIMIT ] ++.br ++[ ++.BR ptm ++| ++.BR atm ++| ++.BR noatm* ++] ++.br ++[ ++.BR overhead ++N | ++.BR conservative ++| ++.BR raw* ++] ++.br ++[ ++.BR mpu ++N ] ++.br ++[ ++.BR ingress ++| ++.BR egress* ++] ++.br ++(* marks defaults) ++ ++ ++.SH DESCRIPTION ++CAKE (Common Applications Kept Enhanced) is a shaping-capable queue discipline ++which uses both AQM and FQ. It combines COBALT, which is an AQM algorithm ++combining Codel and BLUE, a shaper which operates in deficit mode, and a variant ++of DRR++ for flow isolation. 8-way set-associative hashing is used to virtually ++eliminate hash collisions. Priority queuing is available through a simplified ++diffserv implementation. Overhead compensation for various encapsulation ++schemes is tightly integrated. ++ ++All settings are optional; the default settings are chosen to be sensible in ++most common deployments. Most people will only need to set the ++.B bandwidth ++parameter to get useful results, but reading the ++.B Overhead Compensation ++and ++.B Round Trip Time ++sections is strongly encouraged. ++ ++.SH SHAPER PARAMETERS ++CAKE uses a deficit-mode shaper, which does not exhibit the initial burst ++typical of token-bucket shapers. It will automatically burst precisely as much ++as required to maintain the configured throughput. As such, it is very ++straightforward to configure. ++.PP ++.B unlimited ++(default) ++.br ++ No limit on the bandwidth. ++.PP ++.B bandwidth ++RATE ++.br ++ Set the shaper bandwidth. See ++.BR tc(8) ++or examples below for details of the RATE value. ++.PP ++.B autorate_ingress ++.br ++ Automatic capacity estimation based on traffic arriving at this qdisc. ++This is most likely to be useful with cellular links, which tend to change ++quality randomly. A ++.B bandwidth ++parameter can be used in conjunction to specify an initial estimate. The shaper ++will periodically be set to a bandwidth slightly below the estimated rate. This ++estimator cannot estimate the bandwidth of links downstream of itself. ++ ++.SH OVERHEAD COMPENSATION PARAMETERS ++The size of each packet on the wire may differ from that seen by Linux. The ++following parameters allow CAKE to compensate for this difference by internally ++considering each packet to be bigger than Linux informs it. To assist users who ++are not expert network engineers, keywords have been provided to represent a ++number of common link technologies. ++ ++.SS Manual Overhead Specification ++.B overhead ++BYTES ++.br ++ Adds BYTES to the size of each packet. BYTES may be negative; values ++between -64 and 256 (inclusive) are accepted. ++.PP ++.B mpu ++BYTES ++.br ++ Rounds each packet (including overhead) up to a minimum length ++BYTES. BYTES may not be negative; values between 0 and 256 (inclusive) ++are accepted. ++.PP ++.B atm ++.br ++ Compensates for ATM cell framing, which is normally found on ADSL links. ++This is performed after the ++.B overhead ++parameter above. ATM uses fixed 53-byte cells, each of which can carry 48 bytes ++payload. ++.PP ++.B ptm ++.br ++ Compensates for PTM encoding, which is normally found on VDSL2 links and ++uses a 64b/65b encoding scheme. It is even more efficient to simply ++derate the specified shaper bandwidth by a factor of 64/65 or 0.984. See ++ITU G.992.3 Annex N and IEEE 802.3 Section 61.3 for details. ++.PP ++.B noatm ++.br ++ Disables ATM and PTM compensation. ++ ++.SS Failsafe Overhead Keywords ++These two keywords are provided for quick-and-dirty setup. Use them if you ++can't be bothered to read the rest of this section. ++.PP ++.B raw ++(default) ++.br ++ Turns off all overhead compensation in CAKE. The packet size reported ++by Linux will be used directly. ++.PP ++ Other overhead keywords may be added after "raw". The effect of this is ++to make the overhead compensation operate relative to the reported packet size, ++not the underlying IP packet size. ++.PP ++.B conservative ++.br ++ Compensates for more overhead than is likely to occur on any ++widely-deployed link technology. ++.br ++ Equivalent to ++.B overhead 48 atm. ++ ++.SS ADSL Overhead Keywords ++Most ADSL modems have a way to check which framing scheme is in use. Often this ++is also specified in the settings document provided by the ISP. The keywords in ++this section are intended to correspond with these sources of information. All ++of them implicitly set the ++.B atm ++flag. ++.PP ++.B pppoa-vcmux ++.br ++ Equivalent to ++.B overhead 10 atm ++.PP ++.B pppoa-llc ++.br ++ Equivalent to ++.B overhead 14 atm ++.PP ++.B pppoe-vcmux ++.br ++ Equivalent to ++.B overhead 32 atm ++.PP ++.B pppoe-llcsnap ++.br ++ Equivalent to ++.B overhead 40 atm ++.PP ++.B bridged-vcmux ++.br ++ Equivalent to ++.B overhead 24 atm ++.PP ++.B bridged-llcsnap ++.br ++ Equivalent to ++.B overhead 32 atm ++.PP ++.B ipoa-vcmux ++.br ++ Equivalent to ++.B overhead 8 atm ++.PP ++.B ipoa-llcsnap ++.br ++ Equivalent to ++.B overhead 16 atm ++.PP ++See also the Ethernet Correction Factors section below. ++ ++.SS VDSL2 Overhead Keywords ++ATM was dropped from VDSL2 in favour of PTM, which is a much more ++straightforward framing scheme. Some ISPs retained PPPoE for compatibility with ++their existing back-end systems. ++.PP ++.B pppoe-ptm ++.br ++ Equivalent to ++.B overhead 30 ptm ++ ++.br ++ PPPoE: 2B PPP + 6B PPPoE + ++.br ++ ETHERNET: 6B dest MAC + 6B src MAC + 2B ethertype + 4B Frame Check Sequence + ++.br ++ PTM: 1B Start of Frame (S) + 1B End of Frame (Ck) + 2B TC-CRC (PTM-FCS) ++.br ++.PP ++.B bridged-ptm ++.br ++ Equivalent to ++.B overhead 22 ptm ++.br ++ ETHERNET: 6B dest MAC + 6B src MAC + 2B ethertype + 4B Frame Check Sequence + ++.br ++ PTM: 1B Start of Frame (S) + 1B End of Frame (Ck) + 2B TC-CRC (PTM-FCS) ++.br ++.PP ++See also the Ethernet Correction Factors section below. ++ ++.SS DOCSIS Cable Overhead Keyword ++DOCSIS is the universal standard for providing Internet service over cable-TV ++infrastructure. ++ ++In this case, the actual on-wire overhead is less important than the packet size ++the head-end equipment uses for shaping and metering. This is specified to be ++an Ethernet frame including the CRC (aka FCS). ++.PP ++.B docsis ++.br ++ Equivalent to ++.B overhead 18 mpu 64 noatm ++ ++.SS Ethernet Overhead Keywords ++.PP ++.B ethernet ++.br ++ Accounts for Ethernet's preamble, inter-frame gap, and Frame Check ++Sequence. Use this keyword when the bottleneck being shaped for is an ++actual Ethernet cable. ++.br ++ Equivalent to ++.B overhead 38 mpu 84 noatm ++.PP ++.B ether-vlan ++.br ++ Adds 4 bytes to the overhead compensation, accounting for an IEEE 802.1Q ++VLAN header appended to the Ethernet frame header. NB: Some ISPs use one or ++even two of these within PPPoE; this keyword may be repeated as necessary to ++express this. ++ ++.SH ROUND TRIP TIME PARAMETERS ++Active Queue Management (AQM) consists of embedding congestion signals in the ++packet flow, which receivers use to instruct senders to slow down when the queue ++is persistently occupied. CAKE uses ECN signalling when available, and packet ++drops otherwise, according to a combination of the Codel and BLUE AQM algorithms ++called COBALT. ++ ++Very short latencies require a very rapid AQM response to adequately control ++latency. However, such a rapid response tends to impair throughput when the ++actual RTT is relatively long. CAKE allows specifying the RTT it assumes for ++tuning various parameters. Actual RTTs within an order of magnitude of this ++will generally work well for both throughput and latency management. ++ ++At the 'lan' setting and below, the time constants are similar in magnitude to ++the jitter in the Linux kernel itself, so congestion might be signalled ++prematurely. The flows will then become sparse and total throughput reduced, ++leaving little or no back-pressure for the fairness logic to work against. Use ++the "metro" setting for local lans unless you have a custom kernel. ++.PP ++.B rtt ++TIME ++.br ++ Manually specify an RTT. ++.PP ++.B datacentre ++.br ++ For extremely high-performance 10GigE+ networks only. Equivalent to ++.B rtt 100us. ++.PP ++.B lan ++.br ++ For pure Ethernet (not Wi-Fi) networks, at home or in the office. Don't ++use this when shaping for an Internet access link. Equivalent to ++.B rtt 1ms. ++.PP ++.B metro ++.br ++ For traffic mostly within a single city. Equivalent to ++.B rtt 10ms. ++.PP ++.B regional ++.br ++ For traffic mostly within a European-sized country. Equivalent to ++.B rtt 30ms. ++.PP ++.B internet ++(default) ++.br ++ This is suitable for most Internet traffic. Equivalent to ++.B rtt 100ms. ++.PP ++.B oceanic ++.br ++ For Internet traffic with generally above-average latency, such as that ++suffered by Australasian residents. Equivalent to ++.B rtt 300ms. ++.PP ++.B satellite ++.br ++ For traffic via geostationary satellites. Equivalent to ++.B rtt 1000ms. ++.PP ++.B interplanetary ++.br ++ So named because Jupiter is about 1 light-hour from Earth. Use this to ++(almost) completely disable AQM actions. Equivalent to ++.B rtt 1000s. ++ ++.SH FLOW ISOLATION PARAMETERS ++With flow isolation enabled, CAKE places packets from different flows into ++different queues, each of which carries its own AQM state. Packets from each ++queue are then delivered fairly, according to a DRR++ algorithm which minimises ++latency for "sparse" flows. CAKE uses a set-associative hashing algorithm to ++minimise flow collisions. ++ ++These keywords specify whether fairness based on source address, destination ++address, individual flows, or any combination of those is desired. ++.PP ++.B flowblind ++.br ++ Disables flow isolation; all traffic passes through a single queue for ++each tin. ++.PP ++.B srchost ++.br ++ Flows are defined only by source address. Could be useful on the egress ++path of an ISP backhaul. ++.PP ++.B dsthost ++.br ++ Flows are defined only by destination address. Could be useful on the ++ingress path of an ISP backhaul. ++.PP ++.B hosts ++.br ++ Flows are defined by source-destination host pairs. This is host ++isolation, rather than flow isolation. ++.PP ++.B flows ++.br ++ Flows are defined by the entire 5-tuple of source address, destination ++address, transport protocol, source port and destination port. This is the type ++of flow isolation performed by SFQ and fq_codel. ++.PP ++.B dual-srchost ++.br ++ Flows are defined by the 5-tuple, and fairness is applied first over ++source addresses, then over individual flows. Good for use on egress traffic ++from a LAN to the internet, where it'll prevent any one LAN host from ++monopolising the uplink, regardless of the number of flows they use. ++.PP ++.B dual-dsthost ++.br ++ Flows are defined by the 5-tuple, and fairness is applied first over ++destination addresses, then over individual flows. Good for use on ingress ++traffic to a LAN from the internet, where it'll prevent any one LAN host from ++monopolising the downlink, regardless of the number of flows they use. ++.PP ++.B triple-isolate ++(default) ++.br ++ Flows are defined by the 5-tuple, and fairness is applied over source ++*and* destination addresses intelligently (ie. not merely by host-pairs), and ++also over individual flows. Use this if you're not certain whether to use ++dual-srchost or dual-dsthost; it'll do both jobs at once, preventing any one ++host on *either* side of the link from monopolising it with a large number of ++flows. ++.PP ++.B nat ++.br ++ Instructs Cake to perform a NAT lookup before applying flow-isolation ++rules, to determine the true addresses and port numbers of the packet, to ++improve fairness between hosts "inside" the NAT. This has no practical effect ++in "flowblind" or "flows" modes, or if NAT is performed on a different host. ++.PP ++.B nonat ++(default) ++.br ++ Cake will not perform a NAT lookup. Flow isolation will be performed ++using the addresses and port numbers directly visible to the interface Cake is ++attached to. ++ ++.SH PRIORITY QUEUE PARAMETERS ++CAKE can divide traffic into "tins" based on the Diffserv field. Each tin has ++its own independent set of flow-isolation queues, and is serviced based on a WRR ++algorithm. To avoid perverse Diffserv marking incentives, tin weights have a ++"priority sharing" value when bandwidth used by that tin is below a threshold, ++and a lower "bandwidth sharing" value when above. Bandwidth is compared against ++the threshold using the same algorithm as the deficit-mode shaper. ++ ++Detailed customisation of tin parameters is not provided. The following presets ++perform all necessary tuning, relative to the current shaper bandwidth and RTT ++settings. ++.PP ++.B besteffort ++.br ++ Disables priority queuing by placing all traffic in one tin. ++.PP ++.B precedence ++.br ++ Enables legacy interpretation of TOS "Precedence" field. Use of this ++preset on the modern Internet is firmly discouraged. ++.PP ++.B diffserv-llt ++.br ++ Provides a "Latency-Loss Tradeoff" implementation with five tins: ++.br ++ Low Loss (TOS1, TOS2), 100% threshold, increased Codel target. ++.br ++ Best Effort (general), 100% threshold, normal Codel target & interval. ++.br ++ Low Latency (TOS4, TOS5, VA, EF), 100% threshold, reduced Codel interval. ++.br ++ Bulk (CS1), 6.25% threshold, normal Codel target & interval. ++.br ++ Net Control (CS6, CS7), 6.25% threshold, increased Codel target & interval. ++.PP ++.B diffserv4 ++.br ++ Provides a general-purpose Diffserv implementation with four tins: ++.br ++ Bulk (CS1), 6.25% threshold, generally low priority. ++.br ++ Best Effort (general), 100% threshold. ++.br ++ Video (AF4x, AF3x, CS3, AF2x, CS2, TOS4, TOS1), 50% threshold. ++.br ++ Voice (CS7, CS6, EF, VA, CS5, CS4), 25% threshold. ++.PP ++.B diffserv3 ++(default) ++.br ++ Provides a simple, general-purpose Diffserv implementation with three tins: ++.br ++ Bulk (CS1), 6.25% threshold, generally low priority. ++.br ++ Best Effort (general), 100% threshold. ++.br ++ Voice (CS7, CS6, EF, VA, TOS4), 25% threshold, reduced Codel interval. ++ ++.SH OTHER PARAMETERS ++.B memlimit ++LIMIT ++.br ++ Limit the memory consumed by Cake to LIMIT bytes. Note that this does ++not translate directly to queue size (so do not size this based on bandwidth ++delay product considerations, but rather on worst case acceptable memory ++consumption), as there is some overhead in the data structures containing the ++packets, especially for small packets. ++ ++ By default, the limit is calculated based on the bandwidth and RTT ++settings. ++ ++.PP ++.B wash ++ ++.br ++ Traffic entering your diffserv domain is frequently mis-marked in ++transit from the perspective of your network, and traffic exiting yours may be ++mis-marked from the perspective of the transiting provider. ++ ++Apply the wash option to clear all extra diffserv (but not ECN bits), after ++priority queuing has taken place. ++ ++If you are shaping inbound, and cannot trust the diffserv markings (as is the ++case for Comcast Cable, among others), it is best to use a single queue ++"besteffort" mode with wash. ++ ++.SH EXAMPLES ++# tc qdisc delete root dev eth0 ++.br ++# tc qdisc add root dev eth0 cake bandwidth 9500Kbit pppoe-ptm ether-vlan ++.br ++# tc -s qdisc show dev eth0 ++.br ++qdisc cake 8007: root refcnt 6 bandwidth 9500Kbit diffserv3 triple-isolate rtt 100.0ms ptm overhead 34 via-ethernet total_overhead 34 hard_header_len 14 ++ Sent 0 bytes 0 pkt (dropped 0, overlimits 0 requeues 0) ++ backlog 0b 0p requeues 0 ++ memory used: 0b of 4Mb ++ capacity estimate: 9500Kbit ++.br ++ Bulk Best Effort Voice ++.br ++ thresh 593744bit 9500Kbit 2375Kbit ++.br ++ target 30.6ms 5.0ms 7.6ms ++.br ++ interval 125.6ms 100.0ms 102.6ms ++.br ++ pk_delay 0us 0us 0us ++.br ++ av_delay 0us 0us 0us ++.br ++ sp_delay 0us 0us 0us ++.br ++ pkts 0 0 0 ++.br ++ bytes 0 0 0 ++.br ++ way_inds 0 0 0 ++.br ++ way_miss 0 0 0 ++.br ++ way_cols 0 0 0 ++.br ++ drops 0 0 0 ++.br ++ marks 0 0 0 ++.br ++ ack_drop 0 0 0 ++.br ++ sp_flows 0 0 0 ++.br ++ bk_flows 0 0 0 ++.br ++ un_flows 0 0 0 ++.br ++ max_len 0 0 0 ++.br ++ ++After some use: ++.br ++# tc -s qdisc show dev eth0 ++ ++qdisc cake 8007: root refcnt 6 bandwidth 9500Kbit diffserv3 triple-isolate rtt 100.0ms ptm overhead 34 via-ethernet total_overhead 34 hard_header_len 14 ++ Sent 110769306 bytes 313857 pkt (dropped 18, overlimits 741791 requeues 0) ++ backlog 0b 0p requeues 0 ++ memory used: 110488b of 4Mb ++ capacity estimate: 9500Kbit ++.br ++ Bulk Best Effort Voice ++.br ++ thresh 593744bit 9500Kbit 2375Kbit ++.br ++ target 30.6ms 5.0ms 7.6ms ++.br ++ interval 125.6ms 100.0ms 102.6ms ++.br ++ pk_delay 16.0ms 545us 15us ++.br ++ av_delay 2.4ms 161us 3us ++.br ++ sp_delay 59us 1us 1us ++.br ++ pkts 32866 195815 85194 ++.br ++ bytes 8132614 69517496 33122156 ++.br ++ way_inds 0 29208 0 ++.br ++ way_miss 7 173 17 ++.br ++ way_cols 0 0 0 ++.br ++ drops 10 7 1 ++.br ++ marks 217 692 300 ++.br ++ ack_drop 0 0 0 ++.br ++ sp_flows 0 0 0 ++.br ++ bk_flows 0 0 1 ++.br ++ un_flows 0 0 0 ++.br ++ max_len 3028 3012 3028 ++.br ++ ++.SH SEE ALSO ++.BR tc (8), ++.BR tc-codel (8), ++.BR tc-fq_codel (8), ++.BR tc-red (8) ++ ++.SH AUTHORS ++Cake's principal author is Jonathan Morton, with contributions from ++Tony Ambardar, Kevin Darbyshire-Bryant, Toke Høiland-Jørgensen, ++Sebastian Moeller, Ryan Mounce, Dean Scarff, Nils Andreas Svee, and Dave Täht. ++ ++This manual page was written by Loganaden Velvindron. Please report corrections ++to the Linux Networking mailing list . +diff --git a/tc/Makefile b/tc/Makefile +index 3716dd6a..69f50a6b 100644 --- a/tc/Makefile +++ b/tc/Makefile -@@ -65,6 +65,7 @@ TCMODULES += q_codel.o +@@ -64,6 +64,7 @@ TCMODULES += em_meta.o + TCMODULES += q_mqprio.o + TCMODULES += q_codel.o TCMODULES += q_fq_codel.o ++TCMODULES += q_cake.o TCMODULES += q_fq.o TCMODULES += q_pie.o -+TCMODULES += q_cake.o TCMODULES += q_hhf.o - TCMODULES += q_clsact.o - TCMODULES += e_bpf.o +diff --git a/tc/q_cake.c b/tc/q_cake.c +new file mode 100644 +index 00000000..44cadb63 --- /dev/null +++ b/tc/q_cake.c -@@ -0,0 +1,771 @@ +@@ -0,0 +1,770 @@ ++/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ +/* + * Common Applications Kept Enhanced -- CAKE + * -+ * Copyright (C) 2014-2015 Jonathan Morton ++ * Copyright (C) 2014-2018 Jonathan Morton ++ * Copyright (C) 2017-2018 Toke Høiland-Jørgensen + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions @@ -139,8 +844,8 @@ +" [ flowblind | srchost | dsthost | hosts | flows |\n" +" dual-srchost | dual-dsthost | triple-isolate* ]\n" +" [ nat | nonat* ]\n" -+" [ wash | nowash * ]\n" -+" [ ack-filter | ack-filter-aggressive | no-ack-filter * ]\n" ++" [ wash | nowash* ]\n" ++" [ ack-filter | ack-filter-aggressive | no-ack-filter* ]\n" +" [ memlimit LIMIT ]\n" +" [ ptm | atm | noatm* ] [ overhead N | conservative | raw* ]\n" +" [ mpu N ] [ ingress | egress* ]\n" @@ -148,7 +853,7 @@ +} + +static int cake_parse_opt(struct qdisc_util *qu, int argc, char **argv, -+ struct nlmsghdr *n) ++ struct nlmsghdr *n, const char *dev) +{ + int unlimited = 0; + unsigned bandwidth = 0; @@ -216,8 +921,8 @@ + interval = 1000000; + target = 50000; + } else if (strcmp(*argv, "interplanetary") == 0) { -+ interval = 3600000000U; -+ target = 5000; ++ interval = 1000000000; ++ target = 50000000; + + } else if (strcmp(*argv, "besteffort") == 0) { + diffserv = 1; @@ -352,23 +1057,6 @@ + * active. + */ + -+ } else if (strcmp(*argv, "total_overhead") == 0) { -+ /* -+ * This is the overhead cake accounts for; added here so -+ * that cake's "tc -s qdisc" output can be directly -+ * pasted into the tc command to instantate a new cake.. -+ */ -+ NEXT_ARG(); -+ -+ } else if (strcmp(*argv, "hard_header_len") == 0) { -+ /* -+ * This is the overhead the kernel automatically -+ * accounted for; added here so that cake's "tc -s -+ * qdisc" output can be directly pasted into the tc -+ * command to instantiate a new cake.. -+ */ -+ NEXT_ARG(); -+ + } else if (strcmp(*argv, "ethernet") == 0) { + /* ethernet pre-amble & interframe gap & FCS + * you may need to add vlan tag */ @@ -455,7 +1143,7 @@ + addattr_l(n, 1024, TCA_CAKE_OVERHEAD, &overhead, sizeof(overhead)); + if (overhead_override) { + unsigned zero = 0; -+ addattr_l(n, 1024, TCA_CAKE_ETHERNET, &zero, sizeof(zero)); ++ addattr_l(n, 1024, TCA_CAKE_RAW, &zero, sizeof(zero)); + } + if (mpu > 0) + addattr_l(n, 1024, TCA_CAKE_MPU, &mpu, sizeof(mpu)); @@ -490,7 +1178,7 @@ + unsigned interval = 0; + unsigned memlimit = 0; + int overhead = 0; -+ int ethernet = 0; ++ int raw = 0; + int mpu = 0; + int atm = 0; + int nat = 0; @@ -509,43 +1197,44 @@ + if (tb[TCA_CAKE_BASE_RATE] && + RTA_PAYLOAD(tb[TCA_CAKE_BASE_RATE]) >= sizeof(__u32)) { + bandwidth = rta_getattr_u32(tb[TCA_CAKE_BASE_RATE]); -+ if(bandwidth) -+ fprintf(f, "bandwidth %s ", sprint_rate(bandwidth, b1)); -+ else -+ fprintf(f, "unlimited "); ++ if(bandwidth) { ++ print_uint(PRINT_JSON, "bandwidth", NULL, bandwidth); ++ print_string(PRINT_FP, NULL, "bandwidth %s ", sprint_rate(bandwidth, b1)); ++ } else ++ print_string(PRINT_ANY, "bandwidth", "bandwidth %s ", "unlimited"); + } + if (tb[TCA_CAKE_AUTORATE] && + RTA_PAYLOAD(tb[TCA_CAKE_AUTORATE]) >= sizeof(__u32)) { + autorate = rta_getattr_u32(tb[TCA_CAKE_AUTORATE]); + if(autorate == 1) -+ fprintf(f, "autorate_ingress "); ++ print_string(PRINT_ANY, "autorate", "autorate_%s ", "ingress"); + else if(autorate) -+ fprintf(f, "(?autorate?) "); ++ print_string(PRINT_ANY, "autorate", "(?autorate?) ", "unknown"); + } + if (tb[TCA_CAKE_DIFFSERV_MODE] && + RTA_PAYLOAD(tb[TCA_CAKE_DIFFSERV_MODE]) >= sizeof(__u32)) { + diffserv = rta_getattr_u32(tb[TCA_CAKE_DIFFSERV_MODE]); + switch(diffserv) { + case 1: -+ fprintf(f, "besteffort "); ++ print_string(PRINT_ANY, "diffserv", "%s ", "besteffort"); + break; + case 2: -+ fprintf(f, "precedence "); ++ print_string(PRINT_ANY, "diffserv", "%s ", "precedence"); + break; + case 3: -+ fprintf(f, "diffserv8 "); ++ print_string(PRINT_ANY, "diffserv", "%s ", "diffserv8"); + break; + case 4: -+ fprintf(f, "diffserv4 "); ++ print_string(PRINT_ANY, "diffserv", "%s ", "diffserv4"); + break; + case 5: -+ fprintf(f, "diffserv-llt "); ++ print_string(PRINT_ANY, "diffserv", "%s ", "diffserv-llt"); + break; + case 6: -+ fprintf(f, "diffserv3 "); ++ print_string(PRINT_ANY, "diffserv", "%s ", "diffserv3"); + break; + default: -+ fprintf(f, "(?diffserv?) "); ++ print_string(PRINT_ANY, "diffserv", "(?diffserv?) ", "unknown"); + break; + }; + } @@ -556,36 +1245,37 @@ + flowmode &= ~64; + switch(flowmode) { + case 0: -+ fprintf(f, "flowblind "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "flowblind"); + break; + case 1: -+ fprintf(f, "srchost "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "srchost"); + break; + case 2: -+ fprintf(f, "dsthost "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "dsthost"); + break; + case 3: -+ fprintf(f, "hosts "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "hosts"); + break; + case 4: -+ fprintf(f, "flows "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "flows"); + break; + case 5: -+ fprintf(f, "dual-srchost "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "dual-srchost"); + break; + case 6: -+ fprintf(f, "dual-dsthost "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "dual-dsthost"); + break; + case 7: -+ fprintf(f, "triple-isolate "); ++ print_string(PRINT_ANY, "flowmode", "%s ", "triple-isolate"); + break; + default: -+ fprintf(f, "(?flowmode?) "); ++ print_string(PRINT_ANY, "flowmode", "(?flowmode?) ", "unknown"); + break; + }; + + if(nat) -+ fprintf(f, "nat "); ++ print_string(PRINT_FP, NULL, "nat ", NULL); ++ print_bool(PRINT_JSON, "nat", NULL, nat); + } + if (tb[TCA_CAKE_WASH] && + RTA_PAYLOAD(tb[TCA_CAKE_WASH]) >= sizeof(__u32)) { @@ -611,9 +1301,8 @@ + RTA_PAYLOAD(tb[TCA_CAKE_ACK_FILTER]) >= sizeof(__u32)) { + ack_filter = rta_getattr_u32(tb[TCA_CAKE_ACK_FILTER]); + } -+ if (tb[TCA_CAKE_ETHERNET] && -+ RTA_PAYLOAD(tb[TCA_CAKE_ETHERNET]) >= sizeof(__u32)) { -+ ethernet = rta_getattr_u32(tb[TCA_CAKE_ETHERNET]); ++ if (tb[TCA_CAKE_RAW]) { ++ raw = 1; + } + if (tb[TCA_CAKE_RTT] && + RTA_PAYLOAD(tb[TCA_CAKE_RTT]) >= sizeof(__u32)) { @@ -621,224 +1310,237 @@ + } + + if (wash) -+ fprintf(f,"wash "); ++ print_string(PRINT_FP, NULL, "wash ", NULL); ++ print_bool(PRINT_JSON, "wash", NULL, wash); + + if (ingress) -+ fprintf(f,"ingress "); ++ print_string(PRINT_FP, NULL, "ingress ", NULL); ++ print_bool(PRINT_JSON, "ingress", NULL, ingress); + + if (ack_filter == 0x0600) -+ fprintf(f,"ack-filter-aggressive "); ++ print_string(PRINT_ANY, "ack-filter", "ack-filter-%s ", "aggressive"); + else if (ack_filter) -+ fprintf(f,"ack-filter "); ++ print_string(PRINT_ANY, "ack-filter", "ack-filter ", "enabled"); ++ else ++ print_string(PRINT_JSON, "ack-filter", NULL, "disabled"); + + if (interval) -+ fprintf(f, "rtt %s ", sprint_time(interval, b2)); ++ print_string(PRINT_FP, NULL, "rtt %s ", sprint_time(interval, b2)); ++ print_uint(PRINT_JSON, "rtt", NULL, interval); + -+ if (!atm && overhead == ethernet) { -+ fprintf(f, "raw "); -+ } else { -+ if (atm == 1) -+ fprintf(f, "atm "); -+ else if (atm == 2) -+ fprintf(f, "ptm "); -+ else -+ fprintf(f, "noatm "); ++ if (raw) ++ print_string(PRINT_FP, NULL, "raw ", NULL); ++ print_bool(PRINT_JSON, "raw", NULL, raw); + -+ fprintf(f, "overhead %d ", overhead); ++ if (atm == 1) ++ print_string(PRINT_ANY, "atm", "%s ", "atm"); ++ else if (atm == 2) ++ print_string(PRINT_ANY, "atm", "%s ", "ptm"); ++ else if (!raw) ++ print_string(PRINT_ANY, "atm", "%s ", "noatm"); + -+ /* This is actually the *amount* of automatic compensation, but -+ * we only report its presence as a boolean for now. -+ */ -+ if (ethernet) -+ fprintf(f, "via-ethernet "); ++ print_uint(PRINT_ANY, "overhead", "overhead %d ", overhead); ++ ++ if (mpu) ++ print_uint(PRINT_ANY, "mpu", "mpu %d ", mpu); ++ ++ if (memlimit) { ++ print_uint(PRINT_JSON, "memlimit", NULL, memlimit); ++ print_string(PRINT_FP, NULL, "memlimit %s", sprint_size(memlimit, b1)); + } + -+ /* unconditionally report the overhead and hard_header_len overhead the -+ * kernel added automatically -+ */ -+ fprintf(f, "total_overhead %d ", overhead); -+ fprintf(f, "hard_header_len %d ", ethernet); -+ -+ if (mpu) { -+ fprintf(f, "mpu %d ", mpu); -+ } -+ -+ if (memlimit) -+ fprintf(f, "memlimit %s", sprint_size(memlimit, b1)); -+ + return 0; +} + ++#define FOR_EACH_TIN(xstats, tst, i) \ ++ for(tst = xstats->tin_stats, i = 0; \ ++ i < xstats->tin_cnt; \ ++ i++, tst = ((void *) xstats->tin_stats) + xstats->tin_stats_size * i) ++ ++static void cake_print_json_tin(struct tc_cake_tin_stats *tst) ++{ ++ open_json_object(NULL); ++ print_uint(PRINT_JSON, "threshold_rate", NULL, tst->threshold_rate); ++ print_uint(PRINT_JSON, "target", NULL, tst->target_us); ++ print_uint(PRINT_JSON, "interval", NULL, tst->interval_us); ++ print_uint(PRINT_JSON, "peak_delay", NULL, tst->peak_delay_us); ++ print_uint(PRINT_JSON, "average_delay", NULL, tst->avge_delay_us); ++ print_uint(PRINT_JSON, "base_delay", NULL, tst->base_delay_us); ++ print_uint(PRINT_JSON, "sent_packets", NULL, tst->sent.packets); ++ print_uint(PRINT_JSON, "sent_bytes", NULL, tst->sent.bytes); ++ print_uint(PRINT_JSON, "way_indirect_hits", NULL, tst->way_indirect_hits); ++ print_uint(PRINT_JSON, "way_misses", NULL, tst->way_misses); ++ print_uint(PRINT_JSON, "way_collisions", NULL, tst->way_collisions); ++ print_uint(PRINT_JSON, "drops", NULL, tst->dropped.packets); ++ print_uint(PRINT_JSON, "ecn_mark", NULL, tst->ecn_marked.packets); ++ print_uint(PRINT_JSON, "ack_drops", NULL, tst->ack_drops.packets); ++ print_uint(PRINT_JSON, "sparse_flows", NULL, tst->sparse_flows); ++ print_uint(PRINT_JSON, "bulk_flows", NULL, tst->bulk_flows); ++ print_uint(PRINT_JSON, "unresponsive_flows", NULL, tst->unresponse_flows); ++ print_uint(PRINT_JSON, "max_pkt_len", NULL, tst->max_skblen); ++ close_json_object(); ++} ++ +static int cake_print_xstats(struct qdisc_util *qu, FILE *f, + struct rtattr *xstats) +{ -+ /* fq_codel stats format borrowed */ -+ struct tc_fq_codel_xstats *st; + struct tc_cake_xstats *stnc; ++ struct tc_cake_tin_stats *tst; + SPRINT_BUF(b1); -+ SPRINT_BUF(b2); ++ int i; + + if (xstats == NULL) + return 0; + -+ if (RTA_PAYLOAD(xstats) < sizeof(st->type)) ++ if (RTA_PAYLOAD(xstats) < sizeof(*stnc)) + return -1; + -+ st = RTA_DATA(xstats); + stnc = RTA_DATA(xstats); + -+ if (st->type == TCA_FQ_CODEL_XSTATS_QDISC && RTA_PAYLOAD(xstats) >= sizeof(*st)) { -+ fprintf(f, " maxpacket %u drop_overlimit %u new_flow_count %u ecn_mark %u", -+ st->qdisc_stats.maxpacket, -+ st->qdisc_stats.drop_overlimit, -+ st->qdisc_stats.new_flow_count, -+ st->qdisc_stats.ecn_mark); -+ fprintf(f, "\n new_flows_len %u old_flows_len %u", -+ st->qdisc_stats.new_flows_len, -+ st->qdisc_stats.old_flows_len); -+ } else if (st->type == TCA_FQ_CODEL_XSTATS_CLASS && RTA_PAYLOAD(xstats) >= sizeof(*st)) { -+ fprintf(f, " deficit %d count %u lastcount %u ldelay %s", -+ st->class_stats.deficit, -+ st->class_stats.count, -+ st->class_stats.lastcount, -+ sprint_time(st->class_stats.ldelay, b1)); -+ if (st->class_stats.dropping) { -+ fprintf(f, " dropping"); -+ if (st->class_stats.drop_next < 0) -+ fprintf(f, " drop_next -%s", -+ sprint_time(-st->class_stats.drop_next, b1)); -+ else -+ fprintf(f, " drop_next %s", -+ sprint_time(st->class_stats.drop_next, b1)); -+ } -+ } else if (stnc->version >= 1 && stnc->version < 0xFF -+ && stnc->max_tins == TC_CAKE_MAX_TINS -+ && RTA_PAYLOAD(xstats) >= offsetof(struct tc_cake_xstats, capacity_estimate)) -+ { -+ int i; -+ -+ if(stnc->version >= 3) -+ fprintf(f, " memory used: %s of %s\n", sprint_size(stnc->memory_used, b1), sprint_size(stnc->memory_limit, b2)); -+ -+ if(stnc->version >= 2) -+ fprintf(f, " capacity estimate: %s\n", sprint_rate(stnc->capacity_estimate, b1)); -+ -+ switch(stnc->tin_cnt) { -+ case 3: -+ fprintf(f, " Bulk Best Effort Voice\n"); -+ break; -+ -+ case 4: -+ fprintf(f, " Bulk Best Effort Video Voice\n"); -+ break; -+ -+ case 5: -+ fprintf(f, " Low Loss Best Effort Low Delay Bulk Net Control\n"); -+ break; -+ -+ default: -+ fprintf(f, " "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " Tin %u", i); -+ fprintf(f, "\n"); -+ }; -+ -+ fprintf(f, " thresh "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12s", sprint_rate(stnc->threshold_rate[i], b1)); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " target "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12s", sprint_time(stnc->target_us[i], b1)); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " interval"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12s", sprint_time(stnc->interval_us[i], b1)); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " pk_delay"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12s", sprint_time(stnc->peak_delay_us[i], b1)); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " av_delay"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12s", sprint_time(stnc->avge_delay_us[i], b1)); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " sp_delay"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12s", sprint_time(stnc->base_delay_us[i], b1)); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " pkts "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->sent[i].packets); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " bytes "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12llu", stnc->sent[i].bytes); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " way_inds"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->way_indirect_hits[i]); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " way_miss"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->way_misses[i]); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " way_cols"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->way_collisions[i]); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " drops "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->dropped[i].packets); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " marks "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->ecn_marked[i].packets); -+ fprintf(f, "\n"); -+ -+ if(stnc->version >= 5) { -+ fprintf(f, " ack_drop"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->ack_drops[i].packets); -+ fprintf(f, "\n"); -+ } -+ -+ fprintf(f, " sp_flows"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->sparse_flows[i]); -+ fprintf(f, "\n"); -+ -+ fprintf(f, " bk_flows"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->bulk_flows[i]); -+ fprintf(f, "\n"); -+ -+ if(stnc->version >= 4) { -+ fprintf(f, " un_flows"); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->unresponse_flows[i]); -+ fprintf(f, "\n"); -+ } -+ -+ fprintf(f, " max_len "); -+ for(i=0; i < stnc->tin_cnt; i++) -+ fprintf(f, " %12u", stnc->max_skblen[i]); -+ fprintf(f, "\n"); -+ } else { ++ if (stnc->version < 0x101 || ++ RTA_PAYLOAD(xstats) < (sizeof(struct tc_cake_xstats) + ++ stnc->tin_stats_size * stnc->tin_cnt)) + return -1; ++ ++ print_uint(PRINT_JSON, "memory_used", NULL, stnc->memory_used); ++ print_uint(PRINT_JSON, "memory_limit", NULL, stnc->memory_limit); ++ print_uint(PRINT_JSON, "capacity_estimate", NULL, stnc->capacity_estimate); ++ ++ print_string(PRINT_FP, NULL, " memory used: %s", ++ sprint_size(stnc->memory_used, b1)); ++ print_string(PRINT_FP, NULL, " of %s\n", ++ sprint_size(stnc->memory_limit, b1)); ++ print_string(PRINT_FP, NULL, " capacity estimate: %s\n", ++ sprint_rate(stnc->capacity_estimate, b1)); ++ ++ print_uint(PRINT_ANY, "min_transport_size", " min/max transport layer size: %10u", ++ stnc->min_trnlen); ++ print_uint(PRINT_ANY, "max_transport_size", " /%8u\n", stnc->max_trnlen); ++ print_uint(PRINT_ANY, "min_adj_size", " min/max overhead-adjusted size: %8u", ++ stnc->min_adjlen); ++ print_uint(PRINT_ANY, "max_adj_size", " /%8u\n", stnc->max_adjlen); ++ print_uint(PRINT_ANY, "avg_hdr_offset", " average transport hdr offset: %10u\n\n", ++ stnc->avg_trnoff); ++ ++ if (is_json_context()) { ++ open_json_array(PRINT_JSON, "tins"); ++ FOR_EACH_TIN(stnc, tst, i) ++ cake_print_json_tin(tst); ++ close_json_array(PRINT_JSON, NULL); ++ return 0; + } ++ ++ ++ switch(stnc->tin_cnt) { ++ case 3: ++ fprintf(f, " Bulk Best Effort Voice\n"); ++ break; ++ ++ case 4: ++ fprintf(f, " Bulk Best Effort Video Voice\n"); ++ break; ++ ++ case 5: ++ fprintf(f, " Low Loss Best Effort Low Delay Bulk Net Control\n"); ++ break; ++ ++ default: ++ fprintf(f, " "); ++ for(i=0; i < stnc->tin_cnt; i++) ++ fprintf(f, " Tin %u", i); ++ fprintf(f, "\n"); ++ }; ++ ++ fprintf(f, " thresh "); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12s", sprint_rate(tst->threshold_rate, b1)); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " target "); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12s", sprint_time(tst->target_us, b1)); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " interval"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12s", sprint_time(tst->interval_us, b1)); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " pk_delay"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12s", sprint_time(tst->peak_delay_us, b1)); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " av_delay"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12s", sprint_time(tst->avge_delay_us, b1)); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " sp_delay"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12s", sprint_time(tst->base_delay_us, b1)); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " pkts "); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->sent.packets); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " bytes "); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12llu", tst->sent.bytes); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " way_inds"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->way_indirect_hits); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " way_miss"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->way_misses); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " way_cols"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->way_collisions); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " drops "); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->dropped.packets); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " marks "); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->ecn_marked.packets); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " ack_drop"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->ack_drops.packets); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " sp_flows"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->sparse_flows); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " bk_flows"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->bulk_flows); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " un_flows"); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->unresponse_flows); ++ fprintf(f, "\n"); ++ ++ fprintf(f, " max_len "); ++ FOR_EACH_TIN(stnc, tst, i) ++ fprintf(f, " %12u", tst->max_skblen); ++ fprintf(f, "\n"); ++ + return 0; +} + diff --git a/package/network/utils/iptables/Makefile b/package/network/utils/iptables/Makefile index e09c35c69..d70dc11d4 100644 --- a/package/network/utils/iptables/Makefile +++ b/package/network/utils/iptables/Makefile @@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=iptables -PKG_VERSION:=1.6.1 +PKG_VERSION:=1.6.2 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://git.netfilter.org/iptables -PKG_SOURCE_VERSION:=7df66f1c13563cfbab75246b009ce36f69ee4487 -PKG_MIRROR_HASH:=22f15ef41fd8e3724bedcee666b7b6a3491d2d038d580ef1fb032718dcb73f14 +PKG_SOURCE_VERSION:=c16bdec15137b241586310d0e61bc88cc3726004 +PKG_MIRROR_HASH:=72e4bec94a56dd600097846c773e1074ff705e38f800ef221db646c064371a53 PKG_FIXUP:=autoreconf @@ -124,6 +124,20 @@ Extra iptables extensions for connection tracking. endef +define Package/iptables-mod-conntrack-label +$(call Package/iptables/Module, +kmod-ipt-conntrack-label @IPTABLES_CONNLABEL) + TITLE:=Connection tracking labeling extension + DEFAULT:=y if IPTABLES_CONNLABEL +endef + +define Package/iptables-mod-conntrack-label/description +Match and set label(s) on connection tracking entries + + Matches: + - connlabel + +endef + define Package/iptables-mod-filter $(call Package/iptables/Module, +kmod-ipt-filter) TITLE:=Content inspection extensions @@ -218,7 +232,7 @@ define Package/iptables-mod-nflog/description endef define Package/iptables-mod-trace -$(call Package/iptables/Module, +kmod-ipt-debug +kmod-ipt-raw) +$(call Package/iptables/Module, +kmod-ipt-debug) TITLE:=Netfilter TRACE target endef @@ -335,12 +349,20 @@ Other extra iptables extensions. - addrtype - condition - owner - - physdev (if ebtables is enabled) - pkttype - quota endef +define Package/iptables-mod-physdev +$(call Package/iptables/Module, +kmod-ipt-physdev) + TITLE:=physdev iptables extension +endef + +define Package/iptables-mod-physdev/description +The iptables physdev match. +endef + define Package/iptables-mod-led $(call Package/iptables/Module, +kmod-ipt-led) TITLE:=LED trigger iptables extension @@ -492,6 +514,7 @@ CONFIGURE_ARGS += \ --enable-devel \ --with-kernel="$(LINUX_DIR)/user_headers" \ --with-xtlibdir=/usr/lib/iptables \ + --with-xt-lock-name=/var/run/xtables.lock \ $(if $(CONFIG_IPTABLES_CONNLABEL),,--disable-connlabel) \ $(if $(CONFIG_IPTABLES_NFTABLES),,--disable-nftables) \ $(if $(CONFIG_IPV6),,--disable-ipv6) @@ -592,7 +615,9 @@ endef $(eval $(call BuildPackage,iptables)) $(eval $(call BuildPlugin,iptables-mod-conntrack-extra,$(IPT_CONNTRACK_EXTRA-m))) +$(eval $(call BuildPlugin,iptables-mod-conntrack-label,$(IPT_CONNTRACK_LABEL-m))) $(eval $(call BuildPlugin,iptables-mod-extra,$(IPT_EXTRA-m))) +$(eval $(call BuildPlugin,iptables-mod-physdev,$(IPT_PHYSDEV-m))) $(eval $(call BuildPlugin,iptables-mod-filter,$(IPT_FILTER-m))) $(eval $(call BuildPlugin,iptables-mod-ipopt,$(IPT_IPOPT-m))) $(eval $(call BuildPlugin,iptables-mod-ipsec,$(IPT_IPSEC-m))) diff --git a/package/network/utils/iptables/patches/030-extensions-libxt_bpf-Fix-build-with-old-kernel-versi.patch b/package/network/utils/iptables/patches/030-extensions-libxt_bpf-Fix-build-with-old-kernel-versi.patch new file mode 100644 index 000000000..c825eee3a --- /dev/null +++ b/package/network/utils/iptables/patches/030-extensions-libxt_bpf-Fix-build-with-old-kernel-versi.patch @@ -0,0 +1,40 @@ +From a12326ad330c4f7cd8d2b6ae1c4fbcd952c378dc Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Mon, 26 Feb 2018 17:39:09 +0100 +Subject: [PATCH] extensions: libxt_bpf: Fix build with old kernel versions + +In kernel 3.18 the union bpf_attr does not have a pathname attribute and +BPF_OBJ_GET is also not defined in these versions. +This was added in Linux commit b2197755b263 ("bpf: add support for +persistent maps/progs"). Check for the BPF_FS_MAGIC define which was +also added in this Linux commit and only activate this code in case we +find that define. + +This fixes a build problem with Linux 3.18. +Netfilter bug: #1231 + +Fixes: f17f9ace8a8 ("extensions: libxt_bpf: support ebpf pinned objects") +Signed-off-by: Hauke Mehrtens +--- + extensions/libxt_bpf.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/extensions/libxt_bpf.c ++++ b/extensions/libxt_bpf.c +@@ -22,6 +22,7 @@ + #include + #endif + ++#include + #include + + #define BCODE_FILE_MAX_LEN_B 1024 +@@ -62,7 +63,7 @@ static const struct xt_option_entry bpf_ + + static int bpf_obj_get(const char *filepath) + { +-#if defined HAVE_LINUX_BPF_H && defined __NR_bpf ++#if defined HAVE_LINUX_BPF_H && defined __NR_bpf && defined BPF_FS_MAGIC + union bpf_attr attr; + + memset(&attr, 0, sizeof(attr)); diff --git a/package/network/utils/iptables/patches/800-flowoffload_target.patch b/package/network/utils/iptables/patches/800-flowoffload_target.patch new file mode 100644 index 000000000..2f79ee835 --- /dev/null +++ b/package/network/utils/iptables/patches/800-flowoffload_target.patch @@ -0,0 +1,95 @@ +--- /dev/null ++++ b/extensions/libxt_FLOWOFFLOAD.c +@@ -0,0 +1,72 @@ ++#include ++#include ++#include ++ ++enum { ++ O_HW, ++}; ++ ++static void offload_help(void) ++{ ++ printf( ++"FLOWOFFLOAD target options:\n" ++" --hw Enable hardware offload\n" ++ ); ++} ++ ++static const struct xt_option_entry offload_opts[] = { ++ {.name = "hw", .id = O_HW, .type = XTTYPE_NONE}, ++ XTOPT_TABLEEND, ++}; ++ ++static void offload_parse(struct xt_option_call *cb) ++{ ++ struct xt_flowoffload_target_info *info = cb->data; ++ ++ xtables_option_parse(cb); ++ switch (cb->entry->id) { ++ case O_HW: ++ info->flags |= XT_FLOWOFFLOAD_HW; ++ break; ++ } ++} ++ ++static void offload_print(const void *ip, const struct xt_entry_target *target, int numeric) ++{ ++ const struct xt_flowoffload_target_info *info = ++ (const struct xt_flowoffload_target_info *)target->data; ++ ++ printf(" FLOWOFFLOAD"); ++ if (info->flags & XT_FLOWOFFLOAD_HW) ++ printf(" hw"); ++} ++ ++static void offload_save(const void *ip, const struct xt_entry_target *target) ++{ ++ const struct xt_flowoffload_target_info *info = ++ (const struct xt_flowoffload_target_info *)target->data; ++ ++ if (info->flags & XT_FLOWOFFLOAD_HW) ++ printf(" --hw"); ++} ++ ++static struct xtables_target offload_tg_reg[] = { ++ { ++ .family = NFPROTO_UNSPEC, ++ .name = "FLOWOFFLOAD", ++ .revision = 0, ++ .version = XTABLES_VERSION, ++ .size = XT_ALIGN(sizeof(struct xt_flowoffload_target_info)), ++ .userspacesize = sizeof(struct xt_flowoffload_target_info), ++ .help = offload_help, ++ .print = offload_print, ++ .save = offload_save, ++ .x6_parse = offload_parse, ++ .x6_options = offload_opts, ++ }, ++}; ++ ++void _init(void) ++{ ++ xtables_register_targets(offload_tg_reg, ARRAY_SIZE(offload_tg_reg)); ++} +--- /dev/null ++++ b/include/linux/netfilter/xt_FLOWOFFLOAD.h +@@ -0,0 +1,17 @@ ++/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ ++#ifndef _XT_FLOWOFFLOAD_H ++#define _XT_FLOWOFFLOAD_H ++ ++#include ++ ++enum { ++ XT_FLOWOFFLOAD_HW = 1 << 0, ++ ++ XT_FLOWOFFLOAD_MASK = XT_FLOWOFFLOAD_HW ++}; ++ ++struct xt_flowoffload_target_info { ++ __u32 flags; ++}; ++ ++#endif /* _XT_FLOWOFFLOAD_H */ diff --git a/package/network/utils/iw/Makefile b/package/network/utils/iw/Makefile index 9b3c12bec..912fc3e28 100644 --- a/package/network/utils/iw/Makefile +++ b/package/network/utils/iw/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=iw -PKG_VERSION:=4.9 +PKG_VERSION:=4.14 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@KERNEL/software/network/iw -PKG_HASH:=324cc805fad52cba2c16b9ab569906889fb645cc962aac4cfda1db85d2de97ce +PKG_HASH:=f01671c0074bfdec082a884057edba1b9efd35c89eda554638496f03b769ad89 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=GPL-2.0 diff --git a/package/network/utils/iw/patches/001-nl80211_h_sync.patch b/package/network/utils/iw/patches/001-nl80211_h_sync.patch index 25ec1263a..2052cb2af 100644 --- a/package/network/utils/iw/patches/001-nl80211_h_sync.patch +++ b/package/network/utils/iw/patches/001-nl80211_h_sync.patch @@ -1,662 +1,39 @@ --- a/nl80211.h +++ b/nl80211.h -@@ -10,7 +10,7 @@ - * Copyright 2008, 2009 Luis R. Rodriguez - * Copyright 2008 Jouni Malinen - * Copyright 2008 Colin McCabe -- * Copyright 2015 Intel Deutschland GmbH -+ * Copyright 2015-2017 Intel Deutschland GmbH +@@ -2153,6 +2153,9 @@ enum nl80211_commands { + * @NL80211_ATTR_PMKR0_NAME: PMK-R0 Name for offloaded FT. + * @NL80211_ATTR_PORT_AUTHORIZED: (reserved) * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above -@@ -173,6 +173,65 @@ - */ - - /** -+ * DOC: WPA/WPA2 EAPOL handshake offload -+ * -+ * By setting @NL80211_EXT_FEATURE_4WAY_HANDSHAKE_STA_PSK flag drivers -+ * can indicate they support offloading EAPOL handshakes for WPA/WPA2 -+ * preshared key authentication. In %NL80211_CMD_CONNECT the preshared -+ * key should be specified using %NL80211_ATTR_PMK. Drivers supporting -+ * this offload may reject the %NL80211_CMD_CONNECT when no preshared -+ * key material is provided, for example when that driver does not -+ * support setting the temporal keys through %CMD_NEW_KEY. -+ * -+ * Similarly @NL80211_EXT_FEATURE_4WAY_HANDSHAKE_STA_1X flag can be -+ * set by drivers indicating offload support of the PTK/GTK EAPOL -+ * handshakes during 802.1X authentication. In order to use the offload -+ * the %NL80211_CMD_CONNECT should have %NL80211_ATTR_WANT_1X_4WAY_HS -+ * attribute flag. Drivers supporting this offload may reject the -+ * %NL80211_CMD_CONNECT when the attribute flag is not present. -+ * -+ * For 802.1X the PMK or PMK-R0 are set by providing %NL80211_ATTR_PMK -+ * using %NL80211_CMD_SET_PMK. For offloaded FT support also -+ * %NL80211_ATTR_PMKR0_NAME must be provided. -+ */ -+ -+/** -+ * DOC: FILS shared key authentication offload -+ * -+ * FILS shared key authentication offload can be advertized by drivers by -+ * setting @NL80211_EXT_FEATURE_FILS_SK_OFFLOAD flag. The drivers that support -+ * FILS shared key authentication offload should be able to construct the -+ * authentication and association frames for FILS shared key authentication and -+ * eventually do a key derivation as per IEEE 802.11ai. The below additional -+ * parameters should be given to driver in %NL80211_CMD_CONNECT. -+ * %NL80211_ATTR_FILS_ERP_USERNAME - used to construct keyname_nai -+ * %NL80211_ATTR_FILS_ERP_REALM - used to construct keyname_nai -+ * %NL80211_ATTR_FILS_ERP_NEXT_SEQ_NUM - used to construct erp message -+ * %NL80211_ATTR_FILS_ERP_RRK - used to generate the rIK and rMSK -+ * rIK should be used to generate an authentication tag on the ERP message and -+ * rMSK should be used to derive a PMKSA. -+ * rIK, rMSK should be generated and keyname_nai, sequence number should be used -+ * as specified in IETF RFC 6696. -+ * -+ * When FILS shared key authentication is completed, driver needs to provide the -+ * below additional parameters to userspace. -+ * %NL80211_ATTR_FILS_KEK - used for key renewal -+ * %NL80211_ATTR_FILS_ERP_NEXT_SEQ_NUM - used in further EAP-RP exchanges -+ * %NL80211_ATTR_PMKID - used to identify the PMKSA used/generated -+ * %Nl80211_ATTR_PMK - used to update PMKSA cache in userspace -+ * The PMKSA can be maintained in userspace persistently so that it can be used -+ * later after reboots or wifi turn off/on also. -+ * -+ * %NL80211_ATTR_FILS_CACHE_ID is the cache identifier advertized by a FILS -+ * capable AP supporting PMK caching. It specifies the scope within which the -+ * PMKSAs are cached in an ESS. %NL80211_CMD_SET_PMKSA and -+ * %NL80211_CMD_DEL_PMKSA are enhanced to allow support for PMKSA caching based -+ * on FILS cache identifier. Additionally %NL80211_ATTR_PMK is used with -+ * %NL80211_SET_PMKSA to specify the PMK corresponding to a PMKSA for driver to -+ * use in a FILS shared key connection with PMKSA caching. -+ */ -+ -+/** - * enum nl80211_commands - supported nl80211 commands - * - * @NL80211_CMD_UNSPEC: unspecified command to catch errors -@@ -323,7 +382,7 @@ - * @NL80211_CMD_GET_SCAN: get scan results - * @NL80211_CMD_TRIGGER_SCAN: trigger a new scan with the given parameters - * %NL80211_ATTR_TX_NO_CCK_RATE is used to decide whether to send the -- * probe requests at CCK rate or not. %NL80211_ATTR_MAC can be used to -+ * probe requests at CCK rate or not. %NL80211_ATTR_BSSID can be used to - * specify a BSSID to scan for; if not included, the wildcard BSSID will - * be used. - * @NL80211_CMD_NEW_SCAN_RESULTS: scan notification (as a reply to -@@ -351,7 +410,9 @@ - * are used. Extra IEs can also be passed from the userspace by - * using the %NL80211_ATTR_IE attribute. The first cycle of the - * scheduled scan can be delayed by %NL80211_ATTR_SCHED_SCAN_DELAY -- * is supplied. -+ * is supplied. If the device supports multiple concurrent scheduled -+ * scans, it will allow such when the caller provides the flag attribute -+ * %NL80211_ATTR_SCHED_SCAN_MULTI to indicate user-space support for it. - * @NL80211_CMD_STOP_SCHED_SCAN: stop a scheduled scan. Returns -ENOENT if - * scheduled scan is not running. The caller may assume that as soon - * as the call returns, it is safe to start a new scheduled scan again. -@@ -370,10 +431,18 @@ - * @NL80211_CMD_NEW_SURVEY_RESULTS: survey data notification (as a reply to - * NL80211_CMD_GET_SURVEY and on the "scan" multicast group) - * -- * @NL80211_CMD_SET_PMKSA: Add a PMKSA cache entry, using %NL80211_ATTR_MAC -- * (for the BSSID) and %NL80211_ATTR_PMKID. -+ * @NL80211_CMD_SET_PMKSA: Add a PMKSA cache entry using %NL80211_ATTR_MAC -+ * (for the BSSID), %NL80211_ATTR_PMKID, and optionally %NL80211_ATTR_PMK -+ * (PMK is used for PTKSA derivation in case of FILS shared key offload) or -+ * using %NL80211_ATTR_SSID, %NL80211_ATTR_FILS_CACHE_ID, -+ * %NL80211_ATTR_PMKID, and %NL80211_ATTR_PMK in case of FILS -+ * authentication where %NL80211_ATTR_FILS_CACHE_ID is the identifier -+ * advertized by a FILS capable AP identifying the scope of PMKSA in an -+ * ESS. - * @NL80211_CMD_DEL_PMKSA: Delete a PMKSA cache entry, using %NL80211_ATTR_MAC -- * (for the BSSID) and %NL80211_ATTR_PMKID. -+ * (for the BSSID) and %NL80211_ATTR_PMKID or using %NL80211_ATTR_SSID, -+ * %NL80211_ATTR_FILS_CACHE_ID, and %NL80211_ATTR_PMKID in case of FILS -+ * authentication. - * @NL80211_CMD_FLUSH_PMKSA: Flush all PMKSA cache entries. - * - * @NL80211_CMD_REG_CHANGE: indicates to userspace the regulatory domain -@@ -500,8 +569,13 @@ - * authentication/association or not receiving a response from the AP. - * Non-zero %NL80211_ATTR_STATUS_CODE value is indicated in that case as - * well to remain backwards compatible. -- * @NL80211_CMD_ROAM: request that the card roam (currently not implemented), -- * sent as an event when the card/driver roamed by itself. -+ * @NL80211_CMD_ROAM: notifcation indicating the card/driver roamed by itself. -+ * When the driver roamed in a network that requires 802.1X authentication, -+ * %NL80211_ATTR_PORT_AUTHORIZED should be set if the 802.1X authentication -+ * was done by the driver or if roaming was done using Fast Transition -+ * protocol (in which case 802.1X authentication is not needed). If -+ * %NL80211_ATTR_PORT_AUTHORIZED is not set, user space is responsible for -+ * the 802.1X authentication. - * @NL80211_CMD_DISCONNECT: drop a given connection; also used to notify - * userspace that a connection was dropped by the AP or due to other - * reasons, for this the %NL80211_ATTR_DISCONNECTED_BY_AP and -@@ -600,6 +674,20 @@ - * - * @NL80211_CMD_SET_WDS_PEER: Set the MAC address of the peer on a WDS interface. - * -+ * @NL80211_CMD_SET_MULTICAST_TO_UNICAST: Configure if this AP should perform -+ * multicast to unicast conversion. When enabled, all multicast packets -+ * with ethertype ARP, IPv4 or IPv6 (possibly within an 802.1Q header) -+ * will be sent out to each station once with the destination (multicast) -+ * MAC address replaced by the station's MAC address. Note that this may -+ * break certain expectations of the receiver, e.g. the ability to drop -+ * unicast IP packets encapsulated in multicast L2 frames, or the ability -+ * to not send destination unreachable messages in such cases. -+ * This can only be toggled per BSS. Configure this on an interface of -+ * type %NL80211_IFTYPE_AP. It applies to all its VLAN interfaces -+ * (%NL80211_IFTYPE_AP_VLAN), except for those in 4addr (WDS) mode. -+ * If %NL80211_ATTR_MULTICAST_TO_UNICAST_ENABLED is not present with this -+ * command, the feature is disabled. -+ * - * @NL80211_CMD_JOIN_MESH: Join a mesh. The mesh ID must be given, and initial - * mesh config parameters may be given. - * @NL80211_CMD_LEAVE_MESH: Leave the mesh network -- no special arguments, the -@@ -840,12 +928,15 @@ - * cfg80211_scan_done(). - * - * @NL80211_CMD_START_NAN: Start NAN operation, identified by its -- * %NL80211_ATTR_WDEV interface. This interface must have been previously -- * created with %NL80211_CMD_NEW_INTERFACE. After it has been started, the -- * NAN interface will create or join a cluster. This command must have a -- * valid %NL80211_ATTR_NAN_MASTER_PREF attribute and optional -- * %NL80211_ATTR_NAN_DUAL attributes. -- * After this command NAN functions can be added. -+ * %NL80211_ATTR_WDEV interface. This interface must have been -+ * previously created with %NL80211_CMD_NEW_INTERFACE. After it -+ * has been started, the NAN interface will create or join a -+ * cluster. This command must have a valid -+ * %NL80211_ATTR_NAN_MASTER_PREF attribute and optional -+ * %NL80211_ATTR_BANDS attributes. If %NL80211_ATTR_BANDS is -+ * omitted or set to 0, it means don't-care and the device will -+ * decide what to use. After this command NAN functions can be -+ * added. - * @NL80211_CMD_STOP_NAN: Stop the NAN operation, identified by - * its %NL80211_ATTR_WDEV interface. - * @NL80211_CMD_ADD_NAN_FUNCTION: Add a NAN function. The function is defined -@@ -866,14 +957,32 @@ - * This command is also used as a notification sent when a NAN function is - * terminated. This will contain a %NL80211_ATTR_NAN_FUNC_INST_ID - * and %NL80211_ATTR_COOKIE attributes. -- * @NL80211_CMD_CHANGE_NAN_CONFIG: Change current NAN configuration. NAN -- * must be operational (%NL80211_CMD_START_NAN was executed). -- * It must contain at least one of the following attributes: -- * %NL80211_ATTR_NAN_MASTER_PREF, %NL80211_ATTR_NAN_DUAL. -+ * @NL80211_CMD_CHANGE_NAN_CONFIG: Change current NAN -+ * configuration. NAN must be operational (%NL80211_CMD_START_NAN -+ * was executed). It must contain at least one of the following -+ * attributes: %NL80211_ATTR_NAN_MASTER_PREF, -+ * %NL80211_ATTR_BANDS. If %NL80211_ATTR_BANDS is omitted, the -+ * current configuration is not changed. If it is present but -+ * set to zero, the configuration is changed to don't-care -+ * (i.e. the device can decide what to do). - * @NL80211_CMD_NAN_FUNC_MATCH: Notification sent when a match is reported. - * This will contain a %NL80211_ATTR_NAN_MATCH nested attribute and - * %NL80211_ATTR_COOKIE. - * -+ * @NL80211_CMD_UPDATE_CONNECT_PARAMS: Update one or more connect parameters -+ * for subsequent roaming cases if the driver or firmware uses internal -+ * BSS selection. This command can be issued only while connected and it -+ * does not result in a change for the current association. Currently, -+ * only the %NL80211_ATTR_IE data is used and updated with this command. -+ * -+ * @NL80211_CMD_SET_PMK: For offloaded 4-Way handshake, set the PMK or PMK-R0 -+ * for the given authenticator address (specified with &NL80211_ATTR_MAC). -+ * When &NL80211_ATTR_PMKR0_NAME is set, &NL80211_ATTR_PMK specifies the -+ * PMK-R0, otherwise it specifies the PMK. -+ * @NL80211_CMD_DEL_PMK: For offloaded 4-Way handshake, delete the previously -+ * configured PMK for the authenticator address identified by -+ * &NL80211_ATTR_MAC. -+ * - * @NL80211_CMD_MAX: highest used command number - * @__NL80211_CMD_AFTER_LAST: internal use - */ -@@ -1069,6 +1178,13 @@ enum nl80211_commands { - NL80211_CMD_CHANGE_NAN_CONFIG, - NL80211_CMD_NAN_MATCH, - -+ NL80211_CMD_SET_MULTICAST_TO_UNICAST, -+ -+ NL80211_CMD_UPDATE_CONNECT_PARAMS, -+ -+ NL80211_CMD_SET_PMK, -+ NL80211_CMD_DEL_PMK, -+ - /* add new commands above here */ - - /* used to define NL80211_CMD_MAX below */ -@@ -1638,8 +1754,16 @@ enum nl80211_commands { - * the connection request from a station. nl80211_connect_failed_reason - * enum has different reasons of connection failure. - * -- * @NL80211_ATTR_SAE_DATA: SAE elements in Authentication frames. This starts -- * with the Authentication transaction sequence number field. -+ * @NL80211_ATTR_AUTH_DATA: Fields and elements in Authentication frames. -+ * This contains the authentication frame body (non-IE and IE data), -+ * excluding the Authentication algorithm number, i.e., starting at the -+ * Authentication transaction sequence number field. It is used with -+ * authentication algorithms that need special fields to be added into -+ * the frames (SAE and FILS). Currently, only the SAE cases use the -+ * initial two fields (Authentication transaction sequence number and -+ * Status code). However, those fields are included in the attribute data -+ * for all authentication algorithms to keep the attribute definition -+ * consistent. - * - * @NL80211_ATTR_VHT_CAPABILITY: VHT Capability information element (from - * association request when used with NL80211_CMD_NEW_STATION) -@@ -1740,7 +1864,9 @@ enum nl80211_commands { - * - * @NL80211_ATTR_OPMODE_NOTIF: Operating mode field from Operating Mode - * Notification Element based on association request when used with -- * %NL80211_CMD_NEW_STATION; u8 attribute. -+ * %NL80211_CMD_NEW_STATION or %NL80211_CMD_SET_STATION (only when -+ * %NL80211_FEATURE_FULL_AP_CLIENT_STATE is supported, or with TDLS); -+ * u8 attribute. - * - * @NL80211_ATTR_VENDOR_ID: The vendor ID, either a 24-bit OUI or, if - * %NL80211_VENDOR_ID_IS_LINUX is set, a special Linux ID (not used yet) -@@ -1783,11 +1909,12 @@ enum nl80211_commands { - * that configured the indoor setting, and the indoor operation would be - * cleared when the socket is closed. - * If set during NAN interface creation, the interface will be destroyed -- * if the socket is closed just like any other interface. Moreover, only -- * the netlink socket that created the interface will be allowed to add -- * and remove functions. NAN notifications will be sent in unicast to that -- * socket. Without this attribute, any socket can add functions and the -- * notifications will be sent to the %NL80211_MCGRP_NAN multicast group. -+ * if the socket is closed just like any other interface. Moreover, NAN -+ * notifications will be sent in unicast to that socket. Without this -+ * attribute, the notifications will be sent to the %NL80211_MCGRP_NAN -+ * multicast group. -+ * If set during %NL80211_CMD_ASSOCIATE or %NL80211_CMD_CONNECT the -+ * station will deauthenticate when the socket is closed. - * - * @NL80211_ATTR_TDLS_INITIATOR: flag attribute indicating the current end is - * the TDLS link initiator. -@@ -1927,15 +2054,93 @@ enum nl80211_commands { - * %NL80211_CMD_CHANGE_NAN_CONFIG. Its type is u8 and it can't be 0. - * Also, values 1 and 255 are reserved for certification purposes and - * should not be used during a normal device operation. -- * @NL80211_ATTR_NAN_DUAL: NAN dual band operation config (see -- * &enum nl80211_nan_dual_band_conf). This attribute is used with -- * %NL80211_CMD_START_NAN and optionally with -- * %NL80211_CMD_CHANGE_NAN_CONFIG. -+ * @NL80211_ATTR_BANDS: operating bands configuration. This is a u32 -+ * bitmask of BIT(NL80211_BAND_*) as described in %enum -+ * nl80211_band. For instance, for NL80211_BAND_2GHZ, bit 0 -+ * would be set. This attribute is used with -+ * %NL80211_CMD_START_NAN and %NL80211_CMD_CHANGE_NAN_CONFIG, and -+ * it is optional. If no bands are set, it means don't-care and -+ * the device will decide what to use. - * @NL80211_ATTR_NAN_FUNC: a function that can be added to NAN. See - * &enum nl80211_nan_func_attributes for description of this nested - * attribute. - * @NL80211_ATTR_NAN_MATCH: used to report a match. This is a nested attribute. - * See &enum nl80211_nan_match_attributes. -+ * @NL80211_ATTR_FILS_KEK: KEK for FILS (Re)Association Request/Response frame -+ * protection. -+ * @NL80211_ATTR_FILS_NONCES: Nonces (part of AAD) for FILS (Re)Association -+ * Request/Response frame protection. This attribute contains the 16 octet -+ * STA Nonce followed by 16 octets of AP Nonce. -+ * -+ * @NL80211_ATTR_MULTICAST_TO_UNICAST_ENABLED: Indicates whether or not multicast -+ * packets should be send out as unicast to all stations (flag attribute). -+ * -+ * @NL80211_ATTR_BSSID: The BSSID of the AP. Note that %NL80211_ATTR_MAC is also -+ * used in various commands/events for specifying the BSSID. -+ * -+ * @NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI: Relative RSSI threshold by which -+ * other BSSs has to be better or slightly worse than the current -+ * connected BSS so that they get reported to user space. -+ * This will give an opportunity to userspace to consider connecting to -+ * other matching BSSs which have better or slightly worse RSSI than -+ * the current connected BSS by using an offloaded operation to avoid -+ * unnecessary wakeups. -+ * -+ * @NL80211_ATTR_SCHED_SCAN_RSSI_ADJUST: When present the RSSI level for BSSs in -+ * the specified band is to be adjusted before doing -+ * %NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI based comparision to figure out -+ * better BSSs. The attribute value is a packed structure -+ * value as specified by &struct nl80211_bss_select_rssi_adjust. -+ * -+ * @NL80211_ATTR_TIMEOUT_REASON: The reason for which an operation timed out. -+ * u32 attribute with an &enum nl80211_timeout_reason value. This is used, -+ * e.g., with %NL80211_CMD_CONNECT event. -+ * -+ * @NL80211_ATTR_FILS_ERP_USERNAME: EAP Re-authentication Protocol (ERP) -+ * username part of NAI used to refer keys rRK and rIK. This is used with -+ * %NL80211_CMD_CONNECT. -+ * -+ * @NL80211_ATTR_FILS_ERP_REALM: EAP Re-authentication Protocol (ERP) realm part -+ * of NAI specifying the domain name of the ER server. This is used with -+ * %NL80211_CMD_CONNECT. -+ * -+ * @NL80211_ATTR_FILS_ERP_NEXT_SEQ_NUM: Unsigned 16-bit ERP next sequence number -+ * to use in ERP messages. This is used in generating the FILS wrapped data -+ * for FILS authentication and is used with %NL80211_CMD_CONNECT. -+ * -+ * @NL80211_ATTR_FILS_ERP_RRK: ERP re-authentication Root Key (rRK) for the -+ * NAI specified by %NL80211_ATTR_FILS_ERP_USERNAME and -+ * %NL80211_ATTR_FILS_ERP_REALM. This is used for generating rIK and rMSK -+ * from successful FILS authentication and is used with -+ * %NL80211_CMD_CONNECT. -+ * -+ * @NL80211_ATTR_FILS_CACHE_ID: A 2-octet identifier advertized by a FILS AP -+ * identifying the scope of PMKSAs. This is used with -+ * @NL80211_CMD_SET_PMKSA and @NL80211_CMD_DEL_PMKSA. -+ * -+ * @NL80211_ATTR_PMK: attribute for passing PMK key material. Used with -+ * %NL80211_CMD_SET_PMKSA for the PMKSA identified by %NL80211_ATTR_PMKID. -+ * For %NL80211_CMD_CONNECT it is used to provide PSK for offloading 4-way -+ * handshake for WPA/WPA2-PSK networks. For 802.1X authentication it is -+ * used with %NL80211_CMD_SET_PMK. For offloaded FT support this attribute -+ * specifies the PMK-R0 if NL80211_ATTR_PMKR0_NAME is included as well. -+ * -+ * @NL80211_ATTR_SCHED_SCAN_MULTI: flag attribute which user-space shall use to -+ * indicate that it supports multiple active scheduled scan requests. -+ * @NL80211_ATTR_SCHED_SCAN_MAX_REQS: indicates maximum number of scheduled -+ * scan request that may be active for the device (u32). -+ * -+ * @NL80211_ATTR_WANT_1X_4WAY_HS: flag attribute which user-space can include -+ * in %NL80211_CMD_CONNECT to indicate that for 802.1X authentication it -+ * wants to use the supported offload of the 4-way handshake. -+ * @NL80211_ATTR_PMKR0_NAME: PMK-R0 Name for offloaded FT. -+ * @NL80211_ATTR_PORT_AUTHORIZED: flag attribute used in %NL80211_CMD_ROAMED -+ * notification indicating that that 802.1X authentication was done by -+ * the driver or is not needed (because roaming used the Fast Transition -+ * protocol). -+ * + * @NL80211_ATTR_WIPHY_ANTENNA_GAIN: Configured antenna gain. Used to reduce + * transmit power to stay within regulatory limits. u32, dBi. - * ++ * * @NUM_NL80211_ATTR: total number of nl80211_attrs available * @NL80211_ATTR_MAX: highest attribute number currently defined -@@ -2195,7 +2400,7 @@ enum nl80211_attrs { + * @__NL80211_ATTR_AFTER_LAST: internal use +@@ -2579,6 +2582,8 @@ enum nl80211_attrs { + NL80211_ATTR_PMKR0_NAME, + NL80211_ATTR_PORT_AUTHORIZED, - NL80211_ATTR_CONN_FAILED_REASON, - -- NL80211_ATTR_SAE_DATA, -+ NL80211_ATTR_AUTH_DATA, - - NL80211_ATTR_VHT_CAPABILITY, - -@@ -2332,10 +2537,39 @@ enum nl80211_attrs { - NL80211_ATTR_MESH_PEER_AID, - - NL80211_ATTR_NAN_MASTER_PREF, -- NL80211_ATTR_NAN_DUAL, -+ NL80211_ATTR_BANDS, - NL80211_ATTR_NAN_FUNC, - NL80211_ATTR_NAN_MATCH, - -+ NL80211_ATTR_FILS_KEK, -+ NL80211_ATTR_FILS_NONCES, -+ -+ NL80211_ATTR_MULTICAST_TO_UNICAST_ENABLED, -+ -+ NL80211_ATTR_BSSID, -+ -+ NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI, -+ NL80211_ATTR_SCHED_SCAN_RSSI_ADJUST, -+ -+ NL80211_ATTR_TIMEOUT_REASON, -+ -+ NL80211_ATTR_FILS_ERP_USERNAME, -+ NL80211_ATTR_FILS_ERP_REALM, -+ NL80211_ATTR_FILS_ERP_NEXT_SEQ_NUM, -+ NL80211_ATTR_FILS_ERP_RRK, -+ NL80211_ATTR_FILS_CACHE_ID, -+ -+ NL80211_ATTR_PMK, -+ -+ NL80211_ATTR_SCHED_SCAN_MULTI, -+ NL80211_ATTR_SCHED_SCAN_MAX_REQS, -+ -+ NL80211_ATTR_WANT_1X_4WAY_HS, -+ NL80211_ATTR_PMKR0_NAME, -+ NL80211_ATTR_PORT_AUTHORIZED, -+ + NL80211_ATTR_WIPHY_ANTENNA_GAIN, + /* add attributes here, update the policy in nl80211.c */ __NL80211_ATTR_AFTER_LAST, -@@ -2347,6 +2581,7 @@ enum nl80211_attrs { - #define NL80211_ATTR_SCAN_GENERATION NL80211_ATTR_GENERATION - #define NL80211_ATTR_MESH_PARAMS NL80211_ATTR_MESH_CONFIG - #define NL80211_ATTR_IFACE_SOCKET_OWNER NL80211_ATTR_SOCKET_OWNER -+#define NL80211_ATTR_SAE_DATA NL80211_ATTR_AUTH_DATA - - /* - * Allow user space programs to use #ifdef on new attributes by defining them -@@ -3019,6 +3254,7 @@ enum nl80211_reg_rule_attr { - * @__NL80211_SCHED_SCAN_MATCH_ATTR_INVALID: attribute number 0 is reserved - * @NL80211_SCHED_SCAN_MATCH_ATTR_SSID: SSID to be used for matching, - * only report BSS with matching SSID. -+ * (This cannot be used together with BSSID.) - * @NL80211_SCHED_SCAN_MATCH_ATTR_RSSI: RSSI threshold (in dBm) for reporting a - * BSS in scan results. Filtering is turned off if not specified. Note that - * if this attribute is in a match set of its own, then it is treated as -@@ -3027,6 +3263,15 @@ enum nl80211_reg_rule_attr { - * how this API was implemented in the past. Also, due to the same problem, - * the only way to create a matchset with only an RSSI filter (with this - * attribute) is if there's only a single matchset with the RSSI attribute. -+ * @NL80211_SCHED_SCAN_MATCH_ATTR_RELATIVE_RSSI: Flag indicating whether -+ * %NL80211_SCHED_SCAN_MATCH_ATTR_RSSI to be used as absolute RSSI or -+ * relative to current bss's RSSI. -+ * @NL80211_SCHED_SCAN_MATCH_ATTR_RSSI_ADJUST: When present the RSSI level for -+ * BSS-es in the specified band is to be adjusted before doing -+ * RSSI-based BSS selection. The attribute value is a packed structure -+ * value as specified by &struct nl80211_bss_select_rssi_adjust. -+ * @NL80211_SCHED_SCAN_MATCH_ATTR_BSSID: BSSID to be used for matching -+ * (this cannot be used together with SSID). - * @NL80211_SCHED_SCAN_MATCH_ATTR_MAX: highest scheduled scan filter - * attribute number currently defined - * @__NL80211_SCHED_SCAN_MATCH_ATTR_AFTER_LAST: internal use -@@ -3036,6 +3281,9 @@ enum nl80211_sched_scan_match_attr { - - NL80211_SCHED_SCAN_MATCH_ATTR_SSID, - NL80211_SCHED_SCAN_MATCH_ATTR_RSSI, -+ NL80211_SCHED_SCAN_MATCH_ATTR_RELATIVE_RSSI, -+ NL80211_SCHED_SCAN_MATCH_ATTR_RSSI_ADJUST, -+ NL80211_SCHED_SCAN_MATCH_ATTR_BSSID, - - /* keep last */ - __NL80211_SCHED_SCAN_MATCH_ATTR_AFTER_LAST, -@@ -3660,6 +3908,9 @@ enum nl80211_bss_status { - * @NL80211_AUTHTYPE_FT: Fast BSS Transition (IEEE 802.11r) - * @NL80211_AUTHTYPE_NETWORK_EAP: Network EAP (some Cisco APs and mainly LEAP) - * @NL80211_AUTHTYPE_SAE: Simultaneous authentication of equals -+ * @NL80211_AUTHTYPE_FILS_SK: Fast Initial Link Setup shared key -+ * @NL80211_AUTHTYPE_FILS_SK_PFS: Fast Initial Link Setup shared key with PFS -+ * @NL80211_AUTHTYPE_FILS_PK: Fast Initial Link Setup public key - * @__NL80211_AUTHTYPE_NUM: internal - * @NL80211_AUTHTYPE_MAX: maximum valid auth algorithm - * @NL80211_AUTHTYPE_AUTOMATIC: determine automatically (if necessary by -@@ -3672,6 +3923,9 @@ enum nl80211_auth_type { - NL80211_AUTHTYPE_FT, - NL80211_AUTHTYPE_NETWORK_EAP, - NL80211_AUTHTYPE_SAE, -+ NL80211_AUTHTYPE_FILS_SK, -+ NL80211_AUTHTYPE_FILS_SK_PFS, -+ NL80211_AUTHTYPE_FILS_PK, - - /* keep last */ - __NL80211_AUTHTYPE_NUM, -@@ -3839,7 +4093,10 @@ enum nl80211_ps_state { - * @__NL80211_ATTR_CQM_INVALID: invalid - * @NL80211_ATTR_CQM_RSSI_THOLD: RSSI threshold in dBm. This value specifies - * the threshold for the RSSI level at which an event will be sent. Zero -- * to disable. -+ * to disable. Alternatively, if %NL80211_EXT_FEATURE_CQM_RSSI_LIST is -+ * set, multiple values can be supplied as a low-to-high sorted array of -+ * threshold values in dBm. Events will be sent when the RSSI value -+ * crosses any of the thresholds. - * @NL80211_ATTR_CQM_RSSI_HYST: RSSI hysteresis in dBm. This value specifies - * the minimum amount the RSSI level must change after an event before a - * new event may be issued (to reduce effects of RSSI oscillation). -@@ -3859,6 +4116,8 @@ enum nl80211_ps_state { - * %NL80211_CMD_NOTIFY_CQM. Set to 0 to turn off TX error reporting. - * @NL80211_ATTR_CQM_BEACON_LOSS_EVENT: flag attribute that's set in a beacon - * loss event -+ * @NL80211_ATTR_CQM_RSSI_LEVEL: the RSSI value in dBm that triggered the -+ * RSSI threshold event. - * @__NL80211_ATTR_CQM_AFTER_LAST: internal - * @NL80211_ATTR_CQM_MAX: highest key attribute +@@ -3862,9 +3867,6 @@ enum nl80211_bss_scan_width { + * @NL80211_BSS_PARENT_BSSID. (u64). + * @NL80211_BSS_PARENT_BSSID: the BSS according to which @NL80211_BSS_PARENT_TSF + * is set. +- * @NL80211_BSS_CHAIN_SIGNAL: per-chain signal strength of last BSS update. +- * Contains a nested array of signal strength attributes (u8, dBm), +- * using the nesting index as the antenna number. + * @__NL80211_BSS_AFTER_LAST: internal + * @NL80211_BSS_MAX: highest BSS attribute */ -@@ -3872,6 +4131,7 @@ enum nl80211_attr_cqm { - NL80211_ATTR_CQM_TXE_PKTS, - NL80211_ATTR_CQM_TXE_INTVL, - NL80211_ATTR_CQM_BEACON_LOSS_EVENT, -+ NL80211_ATTR_CQM_RSSI_LEVEL, +@@ -3888,7 +3890,6 @@ enum nl80211_bss { + NL80211_BSS_PAD, + NL80211_BSS_PARENT_TSF, + NL80211_BSS_PARENT_BSSID, +- NL80211_BSS_CHAIN_SIGNAL, /* keep last */ - __NL80211_ATTR_CQM_AFTER_LAST, -@@ -4280,6 +4540,9 @@ enum nl80211_iface_limit_attrs { - * of supported channel widths for radar detection. - * @NL80211_IFACE_COMB_RADAR_DETECT_REGIONS: u32 attribute containing the bitmap - * of supported regulatory regions for radar detection. -+ * @NL80211_IFACE_COMB_BI_MIN_GCD: u32 attribute specifying the minimum GCD of -+ * different beacon intervals supported by all the interface combinations -+ * in this group (if not present, all beacon intervals be identical). - * @NUM_NL80211_IFACE_COMB: number of attributes - * @MAX_NL80211_IFACE_COMB: highest attribute number - * -@@ -4287,8 +4550,8 @@ enum nl80211_iface_limit_attrs { - * limits = [ #{STA} <= 1, #{AP} <= 1 ], matching BI, channels = 1, max = 2 - * => allows an AP and a STA that must match BIs - * -- * numbers = [ #{AP, P2P-GO} <= 8 ], channels = 1, max = 8 -- * => allows 8 of AP/GO -+ * numbers = [ #{AP, P2P-GO} <= 8 ], BI min gcd, channels = 1, max = 8, -+ * => allows 8 of AP/GO that can have BI gcd >= min gcd - * - * numbers = [ #{STA} <= 2 ], channels = 2, max = 2 - * => allows two STAs on different channels -@@ -4314,6 +4577,7 @@ enum nl80211_if_combination_attrs { - NL80211_IFACE_COMB_NUM_CHANNELS, - NL80211_IFACE_COMB_RADAR_DETECT_WIDTHS, - NL80211_IFACE_COMB_RADAR_DETECT_REGIONS, -+ NL80211_IFACE_COMB_BI_MIN_GCD, - - /* keep last */ - NUM_NL80211_IFACE_COMB, -@@ -4634,6 +4898,27 @@ enum nl80211_feature_flags { - * configuration (AP/mesh) with HT rates. - * @NL80211_EXT_FEATURE_BEACON_RATE_VHT: Driver supports beacon rate - * configuration (AP/mesh) with VHT rates. -+ * @NL80211_EXT_FEATURE_FILS_STA: This driver supports Fast Initial Link Setup -+ * with user space SME (NL80211_CMD_AUTHENTICATE) in station mode. -+ * @NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA: This driver supports randomized TA -+ * in @NL80211_CMD_FRAME while not associated. -+ * @NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA_CONNECTED: This driver supports -+ * randomized TA in @NL80211_CMD_FRAME while associated. -+ * @NL80211_EXT_FEATURE_SCHED_SCAN_RELATIVE_RSSI: The driver supports sched_scan -+ * for reporting BSSs with better RSSI than the current connected BSS -+ * (%NL80211_ATTR_SCHED_SCAN_RELATIVE_RSSI). -+ * @NL80211_EXT_FEATURE_CQM_RSSI_LIST: With this driver the -+ * %NL80211_ATTR_CQM_RSSI_THOLD attribute accepts a list of zero or more -+ * RSSI threshold values to monitor rather than exactly one threshold. -+ * @NL80211_EXT_FEATURE_FILS_SK_OFFLOAD: Driver SME supports FILS shared key -+ * authentication with %NL80211_CMD_CONNECT. -+ * @NL80211_EXT_FEATURE_4WAY_HANDSHAKE_STA_PSK: Device wants to do 4-way -+ * handshake with PSK in station mode (PSK is passed as part of the connect -+ * and associate commands), doing it in the host might not be supported. -+ * @NL80211_EXT_FEATURE_4WAY_HANDSHAKE_STA_1X: Device wants to do doing 4-way -+ * handshake with 802.1X in station mode (will pass EAP frames to the host -+ * and accept the set_pmk/del_pmk commands), doing it in the host might not -+ * be supported. - * - * @NUM_NL80211_EXT_FEATURES: number of extended features. - * @MAX_NL80211_EXT_FEATURES: highest extended feature index. -@@ -4648,6 +4933,14 @@ enum nl80211_ext_feature_index { - NL80211_EXT_FEATURE_BEACON_RATE_LEGACY, - NL80211_EXT_FEATURE_BEACON_RATE_HT, - NL80211_EXT_FEATURE_BEACON_RATE_VHT, -+ NL80211_EXT_FEATURE_FILS_STA, -+ NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA, -+ NL80211_EXT_FEATURE_MGMT_TX_RANDOM_TA_CONNECTED, -+ NL80211_EXT_FEATURE_SCHED_SCAN_RELATIVE_RSSI, -+ NL80211_EXT_FEATURE_CQM_RSSI_LIST, -+ NL80211_EXT_FEATURE_FILS_SK_OFFLOAD, -+ NL80211_EXT_FEATURE_4WAY_HANDSHAKE_STA_PSK, -+ NL80211_EXT_FEATURE_4WAY_HANDSHAKE_STA_1X, - - /* add new features before the definition below */ - NUM_NL80211_EXT_FEATURES, -@@ -4687,6 +4980,21 @@ enum nl80211_connect_failed_reason { - }; - - /** -+ * enum nl80211_timeout_reason - timeout reasons -+ * -+ * @NL80211_TIMEOUT_UNSPECIFIED: Timeout reason unspecified. -+ * @NL80211_TIMEOUT_SCAN: Scan (AP discovery) timed out. -+ * @NL80211_TIMEOUT_AUTH: Authentication timed out. -+ * @NL80211_TIMEOUT_ASSOC: Association timed out. -+ */ -+enum nl80211_timeout_reason { -+ NL80211_TIMEOUT_UNSPECIFIED, -+ NL80211_TIMEOUT_SCAN, -+ NL80211_TIMEOUT_AUTH, -+ NL80211_TIMEOUT_ASSOC, -+}; -+ -+/** - * enum nl80211_scan_flags - scan request control flags - * - * Scan request control flags are used to control the handling -@@ -4768,12 +5076,17 @@ enum nl80211_smps_mode { - * change to the channel status. - * @NL80211_RADAR_NOP_FINISHED: The Non-Occupancy Period for this channel is - * over, channel becomes usable. -+ * @NL80211_RADAR_PRE_CAC_EXPIRED: Channel Availability Check done on this -+ * non-operating channel is expired and no longer valid. New CAC must -+ * be done on this channel before starting the operation. This is not -+ * applicable for ETSI dfs domain where pre-CAC is valid for ever. - */ - enum nl80211_radar_event { - NL80211_RADAR_DETECTED, - NL80211_RADAR_CAC_FINISHED, - NL80211_RADAR_CAC_ABORTED, - NL80211_RADAR_NOP_FINISHED, -+ NL80211_RADAR_PRE_CAC_EXPIRED, - }; - - /** -@@ -4900,8 +5213,9 @@ enum nl80211_sched_scan_plan { - /** - * struct nl80211_bss_select_rssi_adjust - RSSI adjustment parameters. - * -- * @band: band of BSS that must match for RSSI value adjustment. -- * @delta: value used to adjust the RSSI value of matching BSS. -+ * @band: band of BSS that must match for RSSI value adjustment. The value -+ * of this field is according to &enum nl80211_band. -+ * @delta: value used to adjust the RSSI value of matching BSS in dB. - */ - struct nl80211_bss_select_rssi_adjust { - __u8 band; -@@ -4942,21 +5256,6 @@ enum nl80211_bss_select_attr { - }; - - /** -- * enum nl80211_nan_dual_band_conf - NAN dual band configuration -- * -- * Defines the NAN dual band mode of operation -- * -- * @NL80211_NAN_BAND_DEFAULT: device default mode -- * @NL80211_NAN_BAND_2GHZ: 2.4GHz mode -- * @NL80211_NAN_BAND_5GHZ: 5GHz mode -- */ --enum nl80211_nan_dual_band_conf { -- NL80211_NAN_BAND_DEFAULT = 1 << 0, -- NL80211_NAN_BAND_2GHZ = 1 << 1, -- NL80211_NAN_BAND_5GHZ = 1 << 2, --}; -- --/** - * enum nl80211_nan_function_type - NAN function type - * - * Defines the function type of a NAN function + __NL80211_BSS_AFTER_LAST, diff --git a/package/network/utils/iw/patches/120-antenna_gain.patch b/package/network/utils/iw/patches/120-antenna_gain.patch index b21943736..27ba390c7 100644 --- a/package/network/utils/iw/patches/120-antenna_gain.patch +++ b/package/network/utils/iw/patches/120-antenna_gain.patch @@ -1,6 +1,6 @@ --- a/phy.c +++ b/phy.c -@@ -675,3 +675,30 @@ COMMAND(set, antenna, " | all | +@@ -727,3 +727,30 @@ COMMAND(set, antenna, " | all | NL80211_CMD_SET_WIPHY, 0, CIB_PHY, handle_antenna, "Set a bitmap of allowed antennas to use for TX and RX.\n" "The driver may reject antenna configurations it cannot support."); diff --git a/package/network/utils/iw/patches/200-reduce_size.patch b/package/network/utils/iw/patches/200-reduce_size.patch index 3f92982a4..36fe0ff74 100644 --- a/package/network/utils/iw/patches/200-reduce_size.patch +++ b/package/network/utils/iw/patches/200-reduce_size.patch @@ -1,16 +1,3 @@ ---- a/Makefile -+++ b/Makefile -@@ -16,8 +16,8 @@ CFLAGS += -Wall -Wundef -Wstrict-prototy - OBJS = iw.o genl.o event.o info.o phy.o \ - interface.o ibss.o station.o survey.o util.o ocb.o \ - mesh.o mpath.o mpp.o scan.o reg.o version.o \ -- reason.o status.o connect.o link.o offch.o ps.o cqm.o \ -- bitrate.o wowlan.o coalesce.o roc.o p2p.o vendor.o -+ reason.o status.o link.o offch.o ps.o cqm.o \ -+ bitrate.o vendor.o - OBJS += sections.o - - OBJS-$(HWSIM) += hwsim.o --- a/event.c +++ b/event.c @@ -342,6 +342,7 @@ static int print_event(struct nl_msg *ms @@ -37,7 +24,7 @@ case NL80211_CMD_JOIN_IBSS: mac_addr_n2a(macbuf, nla_data(tb[NL80211_ATTR_MAC])); printf("IBSS %s joined\n", macbuf); -@@ -612,9 +615,9 @@ static int print_event(struct nl_msg *ms +@@ -618,9 +621,9 @@ static int print_event(struct nl_msg *ms case NL80211_CMD_DEL_WIPHY: printf("delete wiphy\n"); break; @@ -147,7 +134,7 @@ { --- a/scan.c +++ b/scan.c -@@ -1147,6 +1147,7 @@ static void print_ht_op(const uint8_t ty +@@ -1170,6 +1170,7 @@ static void print_ht_op(const uint8_t ty printf("\t\t * secondary channel offset: %s\n", ht_secondary_offset[data[1] & 0x3]); printf("\t\t * STA channel width: %s\n", sta_chan_width[(data[1] & 0x4)>>2]); @@ -155,7 +142,7 @@ printf("\t\t * RIFS: %d\n", (data[1] & 0x8)>>3); printf("\t\t * HT protection: %s\n", protection[data[2] & 0x3]); printf("\t\t * non-GF present: %d\n", (data[2] & 0x4) >> 2); -@@ -1380,6 +1381,14 @@ static void print_ie(const struct ie_pri +@@ -1497,6 +1498,14 @@ static void print_ie(const struct ie_pri static const struct ie_print ieprinters[] = { [0] = { "SSID", print_ssid, 0, 32, BIT(PRINT_SCAN) | BIT(PRINT_LINK), }, @@ -170,7 +157,7 @@ [1] = { "Supported rates", print_supprates, 0, 255, BIT(PRINT_SCAN), }, [3] = { "DS Parameter set", print_ds, 1, 1, BIT(PRINT_SCAN), }, [5] = { "TIM", print_tim, 4, 255, BIT(PRINT_SCAN), }, -@@ -1389,21 +1398,15 @@ static const struct ie_print ieprinters[ +@@ -1506,21 +1515,15 @@ static const struct ie_print ieprinters[ [32] = { "Power constraint", print_powerconstraint, 1, 1, BIT(PRINT_SCAN), }, [35] = { "TPC report", print_tpcreport, 2, 2, BIT(PRINT_SCAN), }, [42] = { "ERP", print_erp, 1, 255, BIT(PRINT_SCAN), }, @@ -192,16 +179,16 @@ +#endif }; - static void print_wifi_wpa(const uint8_t type, uint8_t len, const uint8_t *data) -@@ -1835,6 +1838,7 @@ void print_ies(unsigned char *ie, int ie - ieprinters[ie[0]].name && + static void print_wifi_wpa(const uint8_t type, uint8_t len, const uint8_t *data, +@@ -1968,6 +1971,7 @@ void print_ies(unsigned char *ie, int ie ieprinters[ie[0]].flags & BIT(ptype)) { - print_ie(&ieprinters[ie[0]], ie[0], ie[1], ie + 2); + print_ie(&ieprinters[ie[0]], + ie[0], ie[1], ie + 2, &ie_buffer); +#if 0 } else if (ie[0] == 221 /* vendor */) { print_vendor(ie[1], ie + 2, unknown, ptype); } else if (unknown) { -@@ -1844,6 +1848,7 @@ void print_ies(unsigned char *ie, int ie +@@ -1977,6 +1981,7 @@ void print_ies(unsigned char *ie, int ie for (i=0; i plink_action ", + NL80211_CMD_SET_STATION, 0, CIB_NETDEV, handle_station_set_plink, + "Set mesh peer link action for this station (peer).", + select_station_cmd, station_set_plink); ++#endif + + static int handle_station_set_vlan(struct nl80211_state *state, + struct nl_msg *msg, +@@ -727,11 +729,13 @@ static int handle_station_set_mesh_power + nla_put_failure: + return -ENOBUFS; + } ++#if 0 + COMMAND_ALIAS(station, set, " mesh_power_mode " + "", NL80211_CMD_SET_STATION, 0, CIB_NETDEV, + handle_station_set_mesh_power_mode, + "Set link-specific mesh power mode for this station", + select_station_cmd, station_set_mesh_power_mode); ++#endif + + static int handle_station_dump(struct nl80211_state *state, + struct nl_msg *msg, diff --git a/package/network/utils/iwinfo/Makefile b/package/network/utils/iwinfo/Makefile index 453978eb9..2145f7d2a 100644 --- a/package/network/utils/iwinfo/Makefile +++ b/package/network/utils/iwinfo/Makefile @@ -11,9 +11,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/iwinfo.git -PKG_SOURCE_DATE:=2017-08-23 -PKG_SOURCE_VERSION:=c1a03e8231a5d8b348b70a182d256725c98a3b0b -PKG_MIRROR_HASH:=7bd294f50f8ec8c0497c5fbe5527f3ae098814cdfeecf4ccf78a2a8937611664 +PKG_SOURCE_DATE:=2018-02-15 +PKG_SOURCE_VERSION:=223e09bf3f180797aeea0f6dc1721e5a55215e66 +PKG_MIRROR_HASH:=cbf90b6dcc9765c03814f1c99363efef073c030bc5e5456a0674d2748e2eeed8 PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=GPL-2.0 diff --git a/package/network/utils/layerscape/restool/Makefile b/package/network/utils/layerscape/restool/Makefile index 988bc8075..675d31368 100644 --- a/package/network/utils/layerscape/restool/Makefile +++ b/package/network/utils/layerscape/restool/Makefile @@ -9,13 +9,13 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=restool -PKG_SOURCE_DATE:=2017-10-23 +PKG_SOURCE_DATE:=2017-12-03 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/qoriq-open-source/restool.git -PKG_SOURCE_VERSION:=8f08b9d499e84f9057784c2036f0ddf75ae3fc70 -PKG_MIRROR_HASH:=29f70ad27c7ab20bc018f0d0b11c680fcf8b829d10e5af5c30af4a3f9228a2fc +PKG_SOURCE_VERSION:=90fe5c4054bb9a77adef76c0b16a5af68f3905d3 +PKG_MIRROR_HASH:=af016aeaf7f17c668dc18d93c353f687d186c517d7aaee23ed23477c0fc8d42f include $(INCLUDE_DIR)/package.mk diff --git a/package/network/utils/layerscape/restool/patches/0001-scripts-move-shebang-on-the-first-line.patch b/package/network/utils/layerscape/restool/patches/0001-scripts-move-shebang-on-the-first-line.patch deleted file mode 100644 index 691e3bba5..000000000 --- a/package/network/utils/layerscape/restool/patches/0001-scripts-move-shebang-on-the-first-line.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 978f00c0a9f17de9cf17b205a741222084261d3a Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:29:17 +0000 -Subject: [PATCH 01/12] scripts: move shebang on the first line - -If the shebang is not placed on the first line of the shell script -it will be accounted only as a comment. - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index 588c736..09bef5a 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -1,3 +1,5 @@ -+#!/bin/bash -+ - # Copyright 2013-2016 Freescale Semiconductor Inc. - # Copyright 2017 NXP - -@@ -30,8 +32,6 @@ - # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - # POSSIBILITY OF SUCH DAMAGE. - --#!/bin/bash -- - ## Restool wrapper script - # - # Prerequisites: --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0002-dprc-add-full-path-option-to-dprc-list-command.patch b/package/network/utils/layerscape/restool/patches/0002-dprc-add-full-path-option-to-dprc-list-command.patch deleted file mode 100644 index 0e39ef724..000000000 --- a/package/network/utils/layerscape/restool/patches/0002-dprc-add-full-path-option-to-dprc-list-command.patch +++ /dev/null @@ -1,151 +0,0 @@ -From 6039bd1b7e5e71a0a171406cf980d2d61a6e79d4 Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:29:37 +0000 -Subject: [PATCH 02/12] dprc: add --full-path option to dprc list command - -Instead of printing an indented dprc list, activating -the --full-path option restool will print the entire path -of the dprc. -Example: - -root@rodos:~# restool dprc list --full-path -dprc.1 -dprc.1/dprc.3 -dprc.1/dprc.2 -dprc.1/dprc.2/dprc.4 - -Signed-off-by: Ioana Ciornei ---- - dprc_commands.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++----------- - 1 file changed, 50 insertions(+), 11 deletions(-) - -diff --git a/dprc_commands.c b/dprc_commands.c -index e1a8f16..8de2f0e 100644 ---- a/dprc_commands.c -+++ b/dprc_commands.c -@@ -76,13 +76,16 @@ C_ASSERT(ARRAY_SIZE(dprc_sync_options) <= MAX_NUM_CMD_LINE_OPTIONS + 1); - */ - enum dprc_list_options { - LIST_OPT_HELP = 0, -+ LIST_OPT_FULL_PATH, - }; - - static struct option dprc_list_options[] = { - [LIST_OPT_HELP] = { - .name = "help", - }, -- -+ [LIST_OPT_FULL_PATH] = { -+ .name = "full-path", -+ }, - { 0 }, - }; - -@@ -421,17 +424,33 @@ static int cmd_dprc_sync(void) - * Lists nested DPRCs inside a given DPRC, recursively - */ - static int list_dprc(uint32_t dprc_id, uint16_t dprc_handle, -- int nesting_level, bool show_non_dprc_objects) -+ int nesting_level, bool show_non_dprc_objects, -+ char *full_path) - { -+ char *updated_full_path = NULL; - int num_child_devices; - int error = 0; -+ int full_path_len; - - assert(nesting_level <= MAX_DPRC_NESTING); - -- for (int i = 0; i < nesting_level; i++) -- printf(" "); -- -- printf("dprc.%u\n", dprc_id); -+ if (full_path) { -+ full_path_len = strlen(full_path); -+ updated_full_path = malloc(full_path_len + 10); -+ if (!updated_full_path) { -+ ERROR_PRINTF("Could not alloc memory for full-path!\n"); -+ return -ENOMEM; -+ } -+ if (full_path_len != 0) -+ sprintf(updated_full_path, "%s/dprc.%d", full_path, dprc_id); -+ else -+ sprintf(updated_full_path, "dprc.%d", dprc_id); -+ printf("%s\n", updated_full_path); -+ } else { -+ for (int i = 0; i < nesting_level; i++) -+ printf(" "); -+ printf("dprc.%u\n", dprc_id); -+ } - - error = dprc_get_obj_count(&restool.mc_io, 0, - dprc_handle, -@@ -475,8 +494,11 @@ static int list_dprc(uint32_t dprc_id, uint16_t dprc_handle, - if (error < 0) - goto out; - -- error = list_dprc(obj_desc.id, child_dprc_handle, -- nesting_level + 1, show_non_dprc_objects); -+ error = list_dprc(obj_desc.id, -+ child_dprc_handle, -+ nesting_level + 1, -+ show_non_dprc_objects, -+ updated_full_path); - - error2 = dprc_close(&restool.mc_io, 0, child_dprc_handle); - if (error2 < 0) { -@@ -491,6 +513,9 @@ static int list_dprc(uint32_t dprc_id, uint16_t dprc_handle, - } - - out: -+ if (full_path) -+ free(updated_full_path); -+ - return error; - } - -@@ -498,8 +523,14 @@ static int cmd_dprc_list(void) - { - static const char usage_msg[] = - "\n" -- "Usage: restool dprc list\n" -+ "Usage: restool dprc list [OPTIONS]\n" -+ "\n" -+ "OPTIONS:\n" -+ "--full-path\n" -+ " prints the dprc list in a full-path\n" -+ " format like: dprc.1/dprc.2\n" - "\n"; -+ bool full_path = false; - - if (restool.cmd_option_mask & ONE_BIT_MASK(LIST_OPT_HELP)) { - puts(usage_msg); -@@ -507,6 +538,12 @@ static int cmd_dprc_list(void) - return 0; - } - -+ -+ if (restool.cmd_option_mask & ONE_BIT_MASK(LIST_OPT_FULL_PATH)) { -+ restool.cmd_option_mask &= ~ONE_BIT_MASK(LIST_OPT_FULL_PATH); -+ full_path = true; -+ } -+ - if (restool.obj_name != NULL) { - ERROR_PRINTF( - "Unexpected argument: \'%s\'\n\n", restool.obj_name); -@@ -514,8 +551,10 @@ static int cmd_dprc_list(void) - return -EINVAL; - } - -- return list_dprc( -- restool.root_dprc_id, restool.root_dprc_handle, 0, false); -+ return list_dprc(restool.root_dprc_id, -+ restool.root_dprc_handle, -+ 0, false, -+ full_path ? "" : NULL); - } - - static int show_one_resource_type(uint16_t dprc_handle, --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0003-scripts-remove-unnecessary-arrays.patch b/package/network/utils/layerscape/restool/patches/0003-scripts-remove-unnecessary-arrays.patch deleted file mode 100644 index c846fbab5..000000000 --- a/package/network/utils/layerscape/restool/patches/0003-scripts-remove-unnecessary-arrays.patch +++ /dev/null @@ -1,62 +0,0 @@ -From e316b4c7d421afa6ca5f6b6ae86d0a8219a9bd56 Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:29:42 +0000 -Subject: [PATCH 03/12] scripts: remove unnecessary arrays - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 22 ++-------------------- - 1 file changed, 2 insertions(+), 20 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index 09bef5a..ea0df92 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -87,8 +87,6 @@ root_c= - # Type of endpoint object - toe= - --dpnis=() --dpmacs=() - containers=() - # Full path containers - fpc=() -@@ -944,16 +942,8 @@ process_listni() { - fi - fi - -- dpnis+=("$dpni $details") -+ echo "${i}/${dpni} ${details}" - done -- -- if [ -n "$dpnis" ]; then -- for j in "${dpnis[@]}"; do -- echo "$i/$j" -- done -- -- dpnis=() -- fi - done - } - -@@ -984,16 +974,8 @@ process_listmac() { - fi - fi - -- dpmacs+=("$dpmac $details") -+ echo "${i}/${dpmac} ${details}" - done -- -- if [ -n "$dpmacs" ]; then -- for j in "${dpmacs[@]}"; do -- echo "$i/$j" -- done -- -- dpmacs=() -- fi - done - } - --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0004-scripts-use-restool-full-path-option.patch b/package/network/utils/layerscape/restool/patches/0004-scripts-use-restool-full-path-option.patch deleted file mode 100644 index e1cc38f48..000000000 --- a/package/network/utils/layerscape/restool/patches/0004-scripts-use-restool-full-path-option.patch +++ /dev/null @@ -1,111 +0,0 @@ -From 09f840049d155fa4b681ece749feeff9a269ecde Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:29:45 +0000 -Subject: [PATCH 04/12] scripts: use restool --full-path option - -Instead of constructing the the full path container list by -hand use the restool option newly added. - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 54 +++++++----------------------------------------------- - 1 file changed, 7 insertions(+), 47 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index ea0df92..72f6c77 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -73,7 +73,6 @@ - ## - - shopt -s extglob --shopt -s lastpipe - - # Intercept the Ctrl+C command but do not interrupt execution - trap ' ' INT -@@ -87,11 +86,6 @@ root_c= - # Type of endpoint object - toe= - --containers=() --# Full path containers --fpc=() --idx=0 -- - SYS_DPRC="/sys/bus/fsl-mc/drivers/fsl_mc_dprc" - - set -e -@@ -220,42 +214,6 @@ get_container() { - echo $(echo "$i" | sed "s/\(dprc.[0-9]*\/\)*//g") - } - --build_fpc_list() { -- $restool dprc list | -- while IFS= read -r line -- do -- containers+=("$line") -- done -- -- for i in "${containers[@]}" -- do -- cnt=$(count_spaces "$i") -- -- if [ "$cnt" -gt 0 ]; then -- # Get index of the upper level container -- idx2=$((idx-1)) -- crt_ct="$i" -- -- while [ "$idx2" -ge 0 ] -- do -- cntp=$(count_spaces "${containers[idx2]}") -- -- if [ "$cntp" -lt "$cnt" ]; then -- upc=$(echo "${containers[idx2]}" | sed "s/ *$//") -- crt_ct=$upc"/""$(echo $crt_ct | sed 's/ *$//')" -- fi -- idx2=$((idx2-1)) -- done -- -- fpc+=($crt_ct) -- else -- fpc+=("$i") -- fi -- -- idx=$((idx+1)) -- done --} -- - get_label() { - # Retrieve the type of the object - too=$(echo "$1" | sed "s/\(\.[0-9]*\)\(\.[0-9]*\)*$//g") -@@ -897,9 +855,9 @@ process_addni() { - } - - process_listni() { -- build_fpc_list -- -- for i in "${fpc[@]}" -+ dprc_list="$($restool dprc list --full-path)" -+ echo "${dprc_list}" | -+ while read -r i - do - crt_c=$(get_container "$i") - $restool dprc show "$crt_c" | grep dpni | -@@ -948,10 +906,12 @@ process_listni() { - } - - process_listmac() { -- build_fpc_list -+ dprc_list="$($restool dprc list --full-path)" - -- for i in "${fpc[@]}" -+ echo "${dprc_list}" | -+ while read -r i - do -+ - crt_c=$(get_container "$i") - $restool dprc show "$crt_c" | grep dpmac | - while IFS= read -r line --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0005-scripts-use-proper-arithmetic-operation-syntax.patch b/package/network/utils/layerscape/restool/patches/0005-scripts-use-proper-arithmetic-operation-syntax.patch deleted file mode 100644 index b34c6a31a..000000000 --- a/package/network/utils/layerscape/restool/patches/0005-scripts-use-proper-arithmetic-operation-syntax.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 899d6c74286cbc672e1bad1abd7eff15b1b7298d Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:29:49 +0000 -Subject: [PATCH 05/12] scripts: use proper arithmetic operation syntax - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index 72f6c77..a39df2c 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -966,7 +966,7 @@ fi - - # Check compatibility with MC version - mc_major=$($restool --mc-version | cut -f2 -d':' | cut -f1 -d'.' | tr -d ' ') --if (( $mc_major != 10 )); then -+if [ $mc_major != 10 ]; then - echo "Restool wrapper scripts only support the latest major MC version\n" - echo "that currently is MC10.x. Use with caution." - fi --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0006-scripts-use-strings-instead-of-arrays.patch b/package/network/utils/layerscape/restool/patches/0006-scripts-use-strings-instead-of-arrays.patch deleted file mode 100644 index a1217668f..000000000 --- a/package/network/utils/layerscape/restool/patches/0006-scripts-use-strings-instead-of-arrays.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 2127850302de2bd8dccff0e31415ce0218750773 Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:29:53 +0000 -Subject: [PATCH 06/12] scripts: use strings instead of arrays - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 21 ++++++++++++++------- - 1 file changed, 14 insertions(+), 7 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index a39df2c..b0c742e 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -485,7 +485,9 @@ create_dpsw() { - - # Make a link in case there is an end point specified - index=0 -- for i in "${endpoint[@]}"; do -+ echo "${endpoint}" | -+ while read -r i -+ do - connect $root_c "$dpsw.$index" "$i" - index=$((index + 1)) - done -@@ -519,8 +521,8 @@ process_addsw() { - max_fdb_mc_groups=32 - # dpsw object label - label= -- #Endpoint objects provided as argument -- endpoint=() -+ # Endpoint objects provided as argument -+ endpoint= - ifcnt=0 - container=$root_c - -@@ -559,7 +561,7 @@ process_addsw() { - container="${i#*=}" - ;; - @(dpni|dpmac).+([0-9])) -- endpoint[$ifcnt]="$(echo ${i#*=} | tr -d ,)" -+ endpoint="${endpoint}"$'\n'"${i}" - ifcnt=$((ifcnt + 1)) - ;; - *) -@@ -571,14 +573,19 @@ process_addsw() { - done - - # Check if there are more endpoints provided than the number of the interfaces -- if [ $num_ifs -lt ${#endpoint[@]} ]; then -+ if [ $num_ifs -lt $ifcnt ]; then - echo "Error: there are more endpoints provided than the number of the interfaces" - usage_addsw - exit 1 - fi - -+ # Delete first empty line from the endpoint string -+ endpoint="$(echo "${endpoint}" | tail -n +2)" -+ - # Check if the endpoints are valid -- for i in "${endpoint[@]}"; do -+ echo "${endpoint}" | -+ while read -r i -+ do - type_of_endpoint "$i" - check_endpoint "$i" - has_endpoint "$i" -@@ -592,7 +599,7 @@ process_addsw() { - if (( $object_exists_status == 1 )); then - echo "Created ETHSW object $dpsw with ${num_ifs} ports" - -- if [ $num_ifs -gt ${#endpoint[@]} ]; then -+ if [ $num_ifs -gt $ifcnt ]; then - echo "Do not forget to connect devices to interface(s)." - fi - fi --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0007-scripts-use-Bourne-shell-s-pattern-matching.patch b/package/network/utils/layerscape/restool/patches/0007-scripts-use-Bourne-shell-s-pattern-matching.patch deleted file mode 100644 index ed9d76d45..000000000 --- a/package/network/utils/layerscape/restool/patches/0007-scripts-use-Bourne-shell-s-pattern-matching.patch +++ /dev/null @@ -1,126 +0,0 @@ -From e1036011baf9204d5fe6dd74e5a65f95b9681ebd Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:29:56 +0000 -Subject: [PATCH 07/12] scripts: use Bourne shell's pattern matching - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 71 ++++++++++++++++++++++++++++----------------------------- - 1 file changed, 35 insertions(+), 36 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index b0c742e..a8b9573 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -72,8 +72,6 @@ - # - ## - --shopt -s extglob -- - # Intercept the Ctrl+C command but do not interrupt execution - trap ' ' INT - -@@ -370,15 +368,16 @@ process_addmux() { - -c=* | --container=*) - container="${i#*=}" - ;; -- *(dprc.+([0-9])/)dpmac.+([0-9])) -- endpoint="${i#*=}" -- ;; -- *(dprc.+([0-9])/)dpni.+([0-9])) -- endpoint="${i#*=}" -- ;; - *) -- usage_addmux -- exit 1 -+ arg_dpmac="$(echo $i | grep -x -E "(dprc.[0-9]+/)*dpmac.[0-9]+" || true )" -+ arg_dpni="$(echo $i | grep -x -E "(dprc.+[0-9]+/)*dpni.[0-9]+" || true )" -+ if [ "$i" = "$arg_dpmac" ] || -+ [ "$i" = "$arg_dpni" ]; then -+ endpoint="$i" -+ else -+ usage_addmux -+ exit 1 -+ fi - ;; - esac - done -@@ -560,14 +559,17 @@ process_addsw() { - -c=* | --container=*) - container="${i#*=}" - ;; -- @(dpni|dpmac).+([0-9])) -- endpoint="${endpoint}"$'\n'"${i}" -- ifcnt=$((ifcnt + 1)) -- ;; - *) -- echo "Error: $i argument is invalid" -- usage_addsw -- exit 1 -+ arg_dpmac="$(echo $i | grep -x -E "dpmac.[0-9]+" || true )" -+ arg_dpni="$(echo $i | grep -x -E "dpni.[0-9]+" || true )" -+ if [ "$i" = "$arg_dpmac" ] || -+ [ "$i" = "$arg_dpni" ]; then -+ endpoint="$i" -+ else -+ echo "Error: $i argument is invalid" -+ usage_addsw -+ exit 1 -+ fi - ;; - esac - done -@@ -704,7 +706,8 @@ process_addni() { - ;; - --mac-addr=*) - mac_addr="${i#*=}" -- if [[ ! "$mac_addr" =~ ^([a-fA-F0-9]{2}:){5}[a-fA-F0-9]{2}$ ]]; then -+ mac_addr_valid="$(echo $mac_addr | grep -x -E "^([a-fA-F0-9]{2}:){5}[a-fA-F0-9]{2}$" || true )" -+ if [ "$mac_addr" != "$mac_addr_valid" ]; then - echo "Invalid MAC address: $mac_addr" - exit 1 - fi -@@ -776,25 +779,21 @@ process_addni() { - -o=* | --options=*) - options="${i#*=}" - ;; -- *(dprc.+([0-9])/)dpmac.+([0-9])) -- no_link=0 -- endpoint="${i#*=}" -- ;; -- *(dprc.+([0-9])/)dpni.+([0-9])) -- no_link=0 -- endpoint="${i#*=}" -- ;; -- *(dprc.+([0-9])/)dpdmux.+([0-9]).+([0-9])) -- no_link=0 -- endpoint="${i#*=}" -- ;; -- *(dprc.+([0-9])/)dpsw.+([0-9]).+([0-9])) -- no_link=0 -- endpoint="${i#*=}" -- ;; - *) -- usage_addni -- exit 1 -+ arg_dpmac="$(echo $i | grep -x -E "(dprc.[0-9]+/)*dpmac.[0-9]+" || true )" -+ arg_dpni="$(echo $i | grep -x -E "(dprc.+[0-9]+/)*dpni.[0-9]+" || true )" -+ arg_dpdmux="$(echo $i | grep -x -E "(dprc.[0-9]+/)*dpdmux.[0-9]+.[0-9]+" || true )" -+ arg_dpsw="$(echo $i | grep -x -E "(dprc.[0-9]+/)*dpsw.[0-9]+.[0-9]+" || true )" -+ if [ "$i" = "$arg_dpmac" ] || -+ [ "$i" = "$arg_dpni" ] || -+ [ "$i" = "$arg_dpdmux" ] || -+ [ "$i" = "$arg_dpsw" ]; then -+ no_link=0 -+ endpoint="$i" -+ else -+ usage_addni -+ exit 1 -+ fi - ;; - esac - done --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0008-scripts-use-Bourne-shell-instead-of-bash.patch b/package/network/utils/layerscape/restool/patches/0008-scripts-use-Bourne-shell-instead-of-bash.patch deleted file mode 100644 index 4921f63c9..000000000 --- a/package/network/utils/layerscape/restool/patches/0008-scripts-use-Bourne-shell-instead-of-bash.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 4a1df345edc59a7407b955529955d6799d974b70 Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Tue, 24 Oct 2017 16:30:00 +0000 -Subject: [PATCH 08/12] scripts: use Bourne shell instead of bash - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index a8b9573..bd79295 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -1,4 +1,4 @@ --#!/bin/bash -+#!/bin/sh - - # Copyright 2013-2016 Freescale Semiconductor Inc. - # Copyright 2017 NXP -@@ -37,7 +37,7 @@ - # Prerequisites: - # - Management Complex version 10.x - # - restool version 1.4 or newer --# - bash shell -+# - Bourne Shell (sh) - # - # - # The purpose of this script is to offer a user friendly way to create --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0009-scripts-workaround-for-a-improper-sed-substitution-T.patch b/package/network/utils/layerscape/restool/patches/0009-scripts-workaround-for-a-improper-sed-substitution-T.patch deleted file mode 100644 index c642afcaf..000000000 --- a/package/network/utils/layerscape/restool/patches/0009-scripts-workaround-for-a-improper-sed-substitution-T.patch +++ /dev/null @@ -1,36 +0,0 @@ -From ac387de9688099bca1fbdb587d078b369aaf2dab Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Wed, 25 Oct 2017 11:23:42 +0000 -Subject: [PATCH 09/12] scripts: workaround for a improper sed substitution - (TODO) - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index bd79295..7ce73f0 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -197,7 +197,7 @@ has_endpoint() { - ep=$($restool "$toe" info "$1" | grep "endpoint:" | sed "s/endpoint: \([^ ]*\)\,.*/\1/") - fi - -- if [[ "$ep" != *"No object associated"* && "$ep" != *"none"* ]]; then -+ if [[ "$ep" != "endpoint: No object associated" && "$ep" != *"none"* ]]; then - echo "$1 is already linked to $ep" - exit 1 - fi -@@ -230,7 +230,7 @@ get_endpoint() { - end_point=$($restool "$too" info "$1" | grep "endpoint:" | sed "s/endpoint: \([^ ]*\)\,.*/\1/") - fi - -- if [[ "$end_point" != *"No object associated"* && "$end_point" != *"none"* ]]; then -+ if [[ "$end_point" != "endpoint: No object associated" && "$end_point" != *"none"* ]]; then - echo "$end_point" - fi - } --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0010-scripts-use-proper-arithmetic-operations.patch b/package/network/utils/layerscape/restool/patches/0010-scripts-use-proper-arithmetic-operations.patch deleted file mode 100644 index 9945cd438..000000000 --- a/package/network/utils/layerscape/restool/patches/0010-scripts-use-proper-arithmetic-operations.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 66ae6e5313da8be5742a502c0d7027689e84a17d Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Wed, 25 Oct 2017 11:30:08 +0000 -Subject: [PATCH 10/12] scripts: use proper arithmetic operations - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index 7ce73f0..0dcd2fa 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -409,7 +409,7 @@ process_addmux() { - - # check the status - object_exists $container $dpdmux -- if (( $object_exists_status == 1 )); then -+ if [ $object_exists_status == 1 ]; then - - if [ "$root_c" == "$container" ]; then - evb=$(ls $SYS_DPRC/"$root_c"/"$dpdmux"/net/ | grep -v "p") -@@ -598,7 +598,7 @@ process_addsw() { - - # check the status - object_exists $container $dpsw -- if (( $object_exists_status == 1 )); then -+ if [ $object_exists_status == 1 ]; then - echo "Created ETHSW object $dpsw with ${num_ifs} ports" - - if [ $num_ifs -gt $ifcnt ]; then -@@ -850,7 +850,7 @@ process_addni() { - - # check the status - object_exists $container $dpni -- if (( $object_exists_status == 1 )); then -+ if [ $object_exists_status == 1 ]; then - if [ "$root_c" == "$container" ]; then - ni=$(ls $SYS_DPRC/"$root_c"/"$dpni"/net/) - fi --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0011-scripts-do-not-compare-strings-with-regexp-expressio.patch b/package/network/utils/layerscape/restool/patches/0011-scripts-do-not-compare-strings-with-regexp-expressio.patch deleted file mode 100644 index 1b6cc46a3..000000000 --- a/package/network/utils/layerscape/restool/patches/0011-scripts-do-not-compare-strings-with-regexp-expressio.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 6af86a65f2dcfd42f572e04207eef45da3573b92 Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Wed, 25 Oct 2017 11:30:33 +0000 -Subject: [PATCH 11/12] scripts: do not compare strings with regexp expressions - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index 0dcd2fa..526c052 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -805,7 +805,8 @@ process_addni() { - fi - - # if no --num-queues is specified then set it to number of cores -- if [[ $dpni_args != *"--num-queues"* ]]; then -+ num_queues_present=$(echo "$dpni_args" | grep -o "\-\-num-queues" || true) -+ if [[ -z "$num_queues_present" ]]; then - dpni_args=$dpni_args" --num-queues="$(nproc) - fi - --- -2.14.1 - diff --git a/package/network/utils/layerscape/restool/patches/0012-scripts-replace-nproc-with-cross-platform-implementa.patch b/package/network/utils/layerscape/restool/patches/0012-scripts-replace-nproc-with-cross-platform-implementa.patch deleted file mode 100644 index 3acb3b5d8..000000000 --- a/package/network/utils/layerscape/restool/patches/0012-scripts-replace-nproc-with-cross-platform-implementa.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 0e5f9f0a7f0ef1947984cd82ade9dbc14ba2c80d Mon Sep 17 00:00:00 2001 -From: Ioana Ciornei -Date: Wed, 25 Oct 2017 12:48:04 +0000 -Subject: [PATCH 12/12] scripts: replace 'nproc' with cross-platform - implementation - -Signed-off-by: Ioana Ciornei ---- - scripts/ls-main | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/scripts/ls-main b/scripts/ls-main -index 526c052..7d127f6 100755 ---- a/scripts/ls-main -+++ b/scripts/ls-main -@@ -807,7 +807,7 @@ process_addni() { - # if no --num-queues is specified then set it to number of cores - num_queues_present=$(echo "$dpni_args" | grep -o "\-\-num-queues" || true) - if [[ -z "$num_queues_present" ]]; then -- dpni_args=$dpni_args" --num-queues="$(nproc) -+ dpni_args=$dpni_args" --num-queues="$(grep -c ^processor /proc/cpuinfo) - fi - - # Check if --no-link the endpoint have been provided otherwise display the usage --- -2.14.1 - diff --git a/package/network/utils/nftables/Makefile b/package/network/utils/nftables/Makefile index 5aaa1cbf4..182fcace3 100644 --- a/package/network/utils/nftables/Makefile +++ b/package/network/utils/nftables/Makefile @@ -7,13 +7,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=nftables -PKG_VERSION:=0.7 +PKG_VERSION:=0.8.2 PKG_RELEASE:=1 -PKG_SOURCE_URL:=https://git.netfilter.org/nftables -PKG_SOURCE_PROTO:=git -PKG_SOURCE_VERSION:=79cbd19e7437680561b26109bbf4f48cb2e8e0a7 -PKG_MIRROR_HASH:=2c0af691948519556952097673ad1b57f888c8314b8eb15e83066951de01fc82 +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 +PKG_SOURCE_URL:=https://netfilter.org/projects/$(PKG_NAME)/files +PKG_HASH:=675f0aaf88f11e7eacef63dc89cb65d207d9e09c3ea6d518f0ebbb013f0767ec PKG_MAINTAINER:=Steven Barth PKG_LICENSE:=GPL-2.0 @@ -21,6 +20,8 @@ PKG_FIXUP:=autoreconf include $(INCLUDE_DIR)/package.mk +DISABLE_NLS:= + CONFIGURE_ARGS += \ --with-mini-gmp \ --without-cli \ @@ -30,7 +31,7 @@ define Package/nftables CATEGORY:=Network SUBMENU:=Firewall TITLE:=nftables packet filtering userspace utility - DEPENDS:=+kmod-nft-core +kmod-nft-nat +libnftnl + DEPENDS:=+kmod-nft-core +libnftnl URL:=http://netfilter.org/projects/nftables/ endef diff --git a/package/network/utils/nftables/patches/100-disable-doc-generation.patch b/package/network/utils/nftables/patches/100-disable-doc-generation.patch index bcbffe25c..2aa4409ef 100644 --- a/package/network/utils/nftables/patches/100-disable-doc-generation.patch +++ b/package/network/utils/nftables/patches/100-disable-doc-generation.patch @@ -1,8 +1,10 @@ --- a/Makefile.am +++ b/Makefile.am -@@ -2,5 +2,4 @@ ACLOCAL_AMFLAGS = -I m4 +@@ -2,7 +2,6 @@ ACLOCAL_AMFLAGS = -I m4 SUBDIRS = src \ include \ - doc \ files + + EXTRA_DIST = tests diff --git a/package/network/utils/nftables/patches/101-nftables-statement-fix-print-of-ip-dnat-address.patch b/package/network/utils/nftables/patches/101-nftables-statement-fix-print-of-ip-dnat-address.patch deleted file mode 100644 index 99f968435..000000000 --- a/package/network/utils/nftables/patches/101-nftables-statement-fix-print-of-ip-dnat-address.patch +++ /dev/null @@ -1,76 +0,0 @@ -From patchwork Fri Feb 3 14:25:45 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [nftables] statement: fix print of ip dnat address -From: Florian Westphal -X-Patchwork-Id: 723692 -X-Patchwork-Delegate: pablo@netfilter.org -Message-Id: <20170203142545.13724-1-fw@strlen.de> -To: -Cc: Florian Westphal -Date: Fri, 3 Feb 2017 15:25:45 +0100 - -the change causes non-ipv6 addresses to not be printed at all in case -a nfproto was given. - -Also add a test case to catch this. - -Closes: https://bugzilla.netfilter.org/show_bug.cgi?id=1117 -Fixes: 5ab0e10fc6e2c22363a ("src: support for RFC2732 IPv6 address format with brackets") -Signed-off-by: Florian Westphal -Acked-by: Pablo Neira Ayuso ---- - src/statement.c | 2 ++ - tests/py/ip/dnat.t | 1 + - tests/py/ip/dnat.t.payload.ip | 12 ++++++++++++ - 3 files changed, 15 insertions(+) - -diff --git a/src/statement.c b/src/statement.c -index 9cdabbb979e8..3beb86ab4263 100644 ---- a/src/statement.c -+++ b/src/statement.c -@@ -508,6 +508,8 @@ static void nat_stmt_print(const struct stmt *stmt) - printf("]-["); - expr_print(stmt->nat.addr->right); - printf("]"); -+ } else { -+ expr_print(stmt->nat.addr); - } - } else { - expr_print(stmt->nat.addr); -diff --git a/tests/py/ip/dnat.t b/tests/py/ip/dnat.t -index da00106edbb4..089017c84704 100644 ---- a/tests/py/ip/dnat.t -+++ b/tests/py/ip/dnat.t -@@ -7,6 +7,7 @@ iifname "eth0" tcp dport != 80-90 dnat to 192.168.3.2;ok - iifname "eth0" tcp dport {80, 90, 23} dnat to 192.168.3.2;ok - iifname "eth0" tcp dport != {80, 90, 23} dnat to 192.168.3.2;ok - iifname "eth0" tcp dport != 23-34 dnat to 192.168.3.2;ok -+iifname "eth0" tcp dport 81 dnat to 192.168.3.2:8080;ok - - dnat to ct mark map { 0x00000014 : 1.2.3.4};ok - dnat to ct mark . ip daddr map { 0x00000014 . 1.1.1.1 : 1.2.3.4};ok -diff --git a/tests/py/ip/dnat.t.payload.ip b/tests/py/ip/dnat.t.payload.ip -index 66926990d880..7a7f5a82dd5a 100644 ---- a/tests/py/ip/dnat.t.payload.ip -+++ b/tests/py/ip/dnat.t.payload.ip -@@ -60,6 +60,18 @@ ip test-ip4 prerouting - [ immediate reg 1 0x0203a8c0 ] - [ nat dnat ip addr_min reg 1 addr_max reg 0 ] - -+# iifname "eth0" tcp dport 81 dnat to 192.168.3.2:8080 -+ip test-ip4 prerouting -+ [ meta load iifname => reg 1 ] -+ [ cmp eq reg 1 0x30687465 0x00000000 0x00000000 0x00000000 ] -+ [ payload load 1b @ network header + 9 => reg 1 ] -+ [ cmp eq reg 1 0x00000006 ] -+ [ payload load 2b @ transport header + 2 => reg 1 ] -+ [ cmp eq reg 1 0x00005100 ] -+ [ immediate reg 1 0x0203a8c0 ] -+ [ immediate reg 2 0x0000901f ] -+ [ nat dnat ip addr_min reg 1 addr_max reg 0 proto_min reg 2 proto_max reg 0 ] -+ - # dnat to ct mark map { 0x00000014 : 1.2.3.4} - __map%d test-ip4 b - __map%d test-ip4 0 diff --git a/package/network/utils/nftables/patches/200-src-support-for-flowtable-listing.patch b/package/network/utils/nftables/patches/200-src-support-for-flowtable-listing.patch new file mode 100644 index 000000000..259513de8 --- /dev/null +++ b/package/network/utils/nftables/patches/200-src-support-for-flowtable-listing.patch @@ -0,0 +1,515 @@ +From: Pablo Neira Ayuso +Date: Mon, 4 Dec 2017 13:28:25 +0100 +Subject: [PATCH] src: support for flowtable listing + +This patch allows you to dump existing flowtable. + + # nft list ruleset + table ip x { + flowtable x { + hook ingress priority 10 + devices = { eth0, tap0 } + } + } + +You can also list existing flowtables via: + + # nft list flowtables + table ip x { + flowtable x { + hook ingress priority 10 + devices = { eth0, tap0 } + } + } + + You need a Linux kernel >= 4.16-rc to test this new feature. + +Signed-off-by: Pablo Neira Ayuso +--- + +--- a/include/linux/netfilter/nf_tables.h ++++ b/include/linux/netfilter/nf_tables.h +@@ -92,6 +92,9 @@ enum nft_verdicts { + * @NFT_MSG_GETOBJ: get a stateful object (enum nft_obj_attributes) + * @NFT_MSG_DELOBJ: delete a stateful object (enum nft_obj_attributes) + * @NFT_MSG_GETOBJ_RESET: get and reset a stateful object (enum nft_obj_attributes) ++ * @NFT_MSG_NEWFLOWTABLE: add new flow table (enum nft_flowtable_attributes) ++ * @NFT_MSG_GETFLOWTABLE: get flow table (enum nft_flowtable_attributes) ++ * @NFT_MSG_DELFLOWTABLE: delete flow table (enum nft_flowtable_attributes) + */ + enum nf_tables_msg_types { + NFT_MSG_NEWTABLE, +@@ -116,6 +119,9 @@ enum nf_tables_msg_types { + NFT_MSG_GETOBJ, + NFT_MSG_DELOBJ, + NFT_MSG_GETOBJ_RESET, ++ NFT_MSG_NEWFLOWTABLE, ++ NFT_MSG_GETFLOWTABLE, ++ NFT_MSG_DELFLOWTABLE, + NFT_MSG_MAX, + }; + +--- a/include/mnl.h ++++ b/include/mnl.h +@@ -89,6 +89,9 @@ int mnl_nft_obj_batch_add(struct nftnl_o + int mnl_nft_obj_batch_del(struct nftnl_obj *nln, struct nftnl_batch *batch, + unsigned int flags, uint32_t seqnum); + ++struct nftnl_flowtable_list * ++mnl_nft_flowtable_dump(struct netlink_ctx *ctx, int family, const char *table); ++ + struct nftnl_ruleset *mnl_nft_ruleset_dump(struct netlink_ctx *ctx, + uint32_t family); + int mnl_nft_event_listener(struct mnl_socket *nf_sock, unsigned int debug_mask, +--- a/include/netlink.h ++++ b/include/netlink.h +@@ -179,6 +179,10 @@ extern int netlink_add_obj(struct netlin + extern int netlink_delete_obj(struct netlink_ctx *ctx, const struct handle *h, + struct location *loc, uint32_t type); + ++extern int netlink_list_flowtables(struct netlink_ctx *ctx, ++ const struct handle *h, ++ const struct location *loc); ++ + extern void netlink_dump_chain(const struct nftnl_chain *nlc, + struct netlink_ctx *ctx); + extern void netlink_dump_rule(const struct nftnl_rule *nlr, +--- a/include/rule.h ++++ b/include/rule.h +@@ -35,6 +35,7 @@ struct position_spec { + * @chain: chain name (chains and rules only) + * @set: set name (sets only) + * @obj: stateful object name (stateful object only) ++ * @flowtable: flow table name (flow table only) + * @handle: rule handle (rules only) + * @position: rule position (rules only) + * @set_id: set ID (sets only) +@@ -45,6 +46,7 @@ struct handle { + const char *chain; + const char *set; + const char *obj; ++ const char *flowtable; + struct handle_spec handle; + struct position_spec position; + uint32_t set_id; +@@ -98,6 +100,7 @@ enum table_flags { + * @chains: chains contained in the table + * @sets: sets contained in the table + * @objs: stateful objects contained in the table ++ * @flowtables: flow tables contained in the table + * @flags: table flags + * @refcnt: table reference counter + */ +@@ -109,6 +112,7 @@ struct table { + struct list_head chains; + struct list_head sets; + struct list_head objs; ++ struct list_head flowtables; + enum table_flags flags; + unsigned int refcnt; + }; +@@ -315,6 +319,24 @@ void obj_print_plain(const struct obj *o + const char *obj_type_name(uint32_t type); + uint32_t obj_type_to_cmd(uint32_t type); + ++struct flowtable { ++ struct list_head list; ++ struct handle handle; ++ struct location location; ++ unsigned int hooknum; ++ int priority; ++ const char **dev_array; ++ int dev_array_len; ++ unsigned int refcnt; ++}; ++ ++extern struct flowtable *flowtable_alloc(const struct location *loc); ++extern struct flowtable *flowtable_get(struct flowtable *flowtable); ++extern void flowtable_free(struct flowtable *flowtable); ++extern void flowtable_add_hash(struct flowtable *flowtable, struct table *table); ++ ++void flowtable_print(const struct flowtable *n, struct output_ctx *octx); ++ + /** + * enum cmd_ops - command operations + * +@@ -373,6 +395,7 @@ enum cmd_ops { + * @CMD_OBJ_QUOTAS: multiple quotas + * @CMD_OBJ_LIMIT: limit + * @CMD_OBJ_LIMITS: multiple limits ++ * @CMD_OBJ_FLOWTABLES: flow tables + */ + enum cmd_obj { + CMD_OBJ_INVALID, +@@ -399,6 +422,7 @@ enum cmd_obj { + CMD_OBJ_CT_HELPERS, + CMD_OBJ_LIMIT, + CMD_OBJ_LIMITS, ++ CMD_OBJ_FLOWTABLES, + }; + + struct markup { +--- a/src/evaluate.c ++++ b/src/evaluate.c +@@ -3196,6 +3196,7 @@ static int cmd_evaluate_list(struct eval + case CMD_OBJ_CT_HELPERS: + case CMD_OBJ_LIMITS: + case CMD_OBJ_SETS: ++ case CMD_OBJ_FLOWTABLES: + if (cmd->handle.table == NULL) + return 0; + if (table_lookup(&cmd->handle, ctx->cache) == NULL) +--- a/src/mnl.c ++++ b/src/mnl.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -953,6 +954,63 @@ int mnl_nft_setelem_get(struct netlink_c + return nft_mnl_talk(ctx, nlh, nlh->nlmsg_len, set_elem_cb, nls); + } + ++static int flowtable_cb(const struct nlmsghdr *nlh, void *data) ++{ ++ struct nftnl_flowtable_list *nln_list = data; ++ struct nftnl_flowtable *n; ++ ++ if (check_genid(nlh) < 0) ++ return MNL_CB_ERROR; ++ ++ n = nftnl_flowtable_alloc(); ++ if (n == NULL) ++ memory_allocation_error(); ++ ++ if (nftnl_flowtable_nlmsg_parse(nlh, n) < 0) ++ goto err_free; ++ ++ nftnl_flowtable_list_add_tail(n, nln_list); ++ return MNL_CB_OK; ++ ++err_free: ++ nftnl_flowtable_free(n); ++ return MNL_CB_OK; ++} ++ ++struct nftnl_flowtable_list * ++mnl_nft_flowtable_dump(struct netlink_ctx *ctx, int family, const char *table) ++{ ++ struct nftnl_flowtable_list *nln_list; ++ char buf[MNL_SOCKET_BUFFER_SIZE]; ++ struct nftnl_flowtable *n; ++ struct nlmsghdr *nlh; ++ int ret; ++ ++ n = nftnl_flowtable_alloc(); ++ if (n == NULL) ++ memory_allocation_error(); ++ ++ nlh = nftnl_nlmsg_build_hdr(buf, NFT_MSG_GETFLOWTABLE, family, ++ NLM_F_DUMP | NLM_F_ACK, ctx->seqnum); ++ if (table != NULL) ++ nftnl_flowtable_set_str(n, NFTNL_FLOWTABLE_TABLE, table); ++ nftnl_flowtable_nlmsg_build_payload(nlh, n); ++ nftnl_flowtable_free(n); ++ ++ nln_list = nftnl_flowtable_list_alloc(); ++ if (nln_list == NULL) ++ memory_allocation_error(); ++ ++ ret = nft_mnl_talk(ctx, nlh, nlh->nlmsg_len, flowtable_cb, nln_list); ++ if (ret < 0) ++ goto err; ++ ++ return nln_list; ++err: ++ nftnl_flowtable_list_free(nln_list); ++ return NULL; ++} ++ + /* + * ruleset + */ +--- a/src/netlink.c ++++ b/src/netlink.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -1826,6 +1827,70 @@ int netlink_reset_objs(struct netlink_ct + return err; + } + ++static struct flowtable * ++netlink_delinearize_flowtable(struct netlink_ctx *ctx, ++ struct nftnl_flowtable *nlo) ++{ ++ struct flowtable *flowtable; ++ const char **dev_array; ++ int len = 0, i; ++ ++ flowtable = flowtable_alloc(&netlink_location); ++ flowtable->handle.family = ++ nftnl_flowtable_get_u32(nlo, NFTNL_FLOWTABLE_FAMILY); ++ flowtable->handle.table = ++ xstrdup(nftnl_flowtable_get_str(nlo, NFTNL_FLOWTABLE_TABLE)); ++ flowtable->handle.flowtable = ++ xstrdup(nftnl_flowtable_get_str(nlo, NFTNL_FLOWTABLE_NAME)); ++ dev_array = nftnl_flowtable_get_array(nlo, NFTNL_FLOWTABLE_DEVICES); ++ while (dev_array[len] != '\0') ++ len++; ++ ++ flowtable->dev_array = calloc(1, len * sizeof(char *)); ++ for (i = 0; i < len; i++) ++ flowtable->dev_array[i] = xstrdup(dev_array[i]); ++ ++ flowtable->dev_array_len = len; ++ ++ flowtable->priority = ++ nftnl_flowtable_get_u32(nlo, NFTNL_FLOWTABLE_PRIO); ++ flowtable->hooknum = ++ nftnl_flowtable_get_u32(nlo, NFTNL_FLOWTABLE_HOOKNUM); ++ ++ return flowtable; ++} ++ ++static int list_flowtable_cb(struct nftnl_flowtable *nls, void *arg) ++{ ++ struct netlink_ctx *ctx = arg; ++ struct flowtable *flowtable; ++ ++ flowtable = netlink_delinearize_flowtable(ctx, nls); ++ if (flowtable == NULL) ++ return -1; ++ list_add_tail(&flowtable->list, &ctx->list); ++ return 0; ++} ++ ++int netlink_list_flowtables(struct netlink_ctx *ctx, const struct handle *h, ++ const struct location *loc) ++{ ++ struct nftnl_flowtable_list *flowtable_cache; ++ int err; ++ ++ flowtable_cache = mnl_nft_flowtable_dump(ctx, h->family, h->table); ++ if (flowtable_cache == NULL) { ++ if (errno == EINTR) ++ return -1; ++ ++ return 0; ++ } ++ ++ err = nftnl_flowtable_list_foreach(flowtable_cache, list_flowtable_cb, ctx); ++ nftnl_flowtable_list_free(flowtable_cache); ++ return err; ++} ++ + int netlink_batch_send(struct netlink_ctx *ctx, struct list_head *err_list) + { + return mnl_batch_talk(ctx, err_list); +--- a/src/parser_bison.y ++++ b/src/parser_bison.y +@@ -248,6 +248,8 @@ int nft_lex(void *, void *, void *); + %token METER "meter" + %token METERS "meters" + ++%token FLOWTABLES "flowtables" ++ + %token NUM "number" + %token STRING "string" + %token QUOTED_STRING "quoted string" +@@ -1104,6 +1106,10 @@ list_cmd : TABLE table_spec + { + $$ = cmd_alloc(CMD_LIST, CMD_OBJ_METER, &$2, &@$, NULL); + } ++ | FLOWTABLES ruleset_spec ++ { ++ $$ = cmd_alloc(CMD_LIST, CMD_OBJ_FLOWTABLES, &$2, &@$, NULL); ++ } + | MAPS ruleset_spec + { + $$ = cmd_alloc(CMD_LIST, CMD_OBJ_MAPS, &$2, &@$, NULL); +--- a/src/rule.c ++++ b/src/rule.c +@@ -95,6 +95,11 @@ static int cache_init_objects(struct net + return -1; + list_splice_tail_init(&ctx->list, &table->chains); + ++ ret = netlink_list_flowtables(ctx, &table->handle, &internal_location); ++ if (ret < 0) ++ return -1; ++ list_splice_tail_init(&ctx->list, &table->flowtables); ++ + if (cmd != CMD_RESET) { + ret = netlink_list_objs(ctx, &table->handle, &internal_location); + if (ret < 0) +@@ -722,6 +727,7 @@ struct table *table_alloc(void) + init_list_head(&table->chains); + init_list_head(&table->sets); + init_list_head(&table->objs); ++ init_list_head(&table->flowtables); + init_list_head(&table->scope.symbols); + table->refcnt = 1; + +@@ -797,6 +803,7 @@ static void table_print_options(const st + + static void table_print(const struct table *table, struct output_ctx *octx) + { ++ struct flowtable *flowtable; + struct chain *chain; + struct obj *obj; + struct set *set; +@@ -818,6 +825,11 @@ static void table_print(const struct tab + set_print(set, octx); + delim = "\n"; + } ++ list_for_each_entry(flowtable, &table->flowtables, list) { ++ nft_print(octx, "%s", delim); ++ flowtable_print(flowtable, octx); ++ delim = "\n"; ++ } + list_for_each_entry(chain, &table->chains, list) { + nft_print(octx, "%s", delim); + chain_print(chain, octx); +@@ -1481,6 +1493,114 @@ static int do_list_obj(struct netlink_ct + return 0; + } + ++struct flowtable *flowtable_alloc(const struct location *loc) ++{ ++ struct flowtable *flowtable; ++ ++ flowtable = xzalloc(sizeof(*flowtable)); ++ if (loc != NULL) ++ flowtable->location = *loc; ++ ++ flowtable->refcnt = 1; ++ return flowtable; ++} ++ ++struct flowtable *flowtable_get(struct flowtable *flowtable) ++{ ++ flowtable->refcnt++; ++ return flowtable; ++} ++ ++void flowtable_free(struct flowtable *flowtable) ++{ ++ if (--flowtable->refcnt > 0) ++ return; ++ handle_free(&flowtable->handle); ++ xfree(flowtable); ++} ++ ++void flowtable_add_hash(struct flowtable *flowtable, struct table *table) ++{ ++ list_add_tail(&flowtable->list, &table->flowtables); ++} ++ ++static void flowtable_print_declaration(const struct flowtable *flowtable, ++ struct print_fmt_options *opts, ++ struct output_ctx *octx) ++{ ++ int i; ++ ++ nft_print(octx, "%sflowtable", opts->tab); ++ ++ if (opts->family != NULL) ++ nft_print(octx, " %s", opts->family); ++ ++ if (opts->table != NULL) ++ nft_print(octx, " %s", opts->table); ++ ++ nft_print(octx, " %s {%s", flowtable->handle.flowtable, opts->nl); ++ ++ nft_print(octx, "%s%shook %s priority %d%s", ++ opts->tab, opts->tab, "ingress", ++ flowtable->priority, opts->stmt_separator); ++ ++ nft_print(octx, "%s%sdevices = { ", opts->tab, opts->tab); ++ for (i = 0; i < flowtable->dev_array_len; i++) { ++ nft_print(octx, "%s", flowtable->dev_array[i]); ++ if (i + 1 != flowtable->dev_array_len) ++ nft_print(octx, ", "); ++ } ++ nft_print(octx, " }%s", opts->stmt_separator); ++} ++ ++static void do_flowtable_print(const struct flowtable *flowtable, ++ struct print_fmt_options *opts, ++ struct output_ctx *octx) ++{ ++ flowtable_print_declaration(flowtable, opts, octx); ++ nft_print(octx, "%s}%s", opts->tab, opts->nl); ++} ++ ++void flowtable_print(const struct flowtable *s, struct output_ctx *octx) ++{ ++ struct print_fmt_options opts = { ++ .tab = "\t", ++ .nl = "\n", ++ .stmt_separator = "\n", ++ }; ++ ++ do_flowtable_print(s, &opts, octx); ++} ++ ++static int do_list_flowtables(struct netlink_ctx *ctx, struct cmd *cmd) ++{ ++ struct print_fmt_options opts = { ++ .tab = "\t", ++ .nl = "\n", ++ .stmt_separator = "\n", ++ }; ++ struct flowtable *flowtable; ++ struct table *table; ++ ++ list_for_each_entry(table, &ctx->cache->list, list) { ++ if (cmd->handle.family != NFPROTO_UNSPEC && ++ cmd->handle.family != table->handle.family) ++ continue; ++ ++ nft_print(ctx->octx, "table %s %s {\n", ++ family2str(table->handle.family), ++ table->handle.table); ++ ++ list_for_each_entry(flowtable, &table->flowtables, list) { ++ flowtable_print_declaration(flowtable, &opts, ctx->octx); ++ nft_print(ctx->octx, "%s}%s", opts.tab, opts.nl); ++ } ++ ++ nft_print(ctx->octx, "}\n"); ++ } ++ return 0; ++} ++ + static int do_list_ruleset(struct netlink_ctx *ctx, struct cmd *cmd) + { + unsigned int family = cmd->handle.family; +@@ -1628,6 +1748,8 @@ static int do_command_list(struct netlin + case CMD_OBJ_LIMIT: + case CMD_OBJ_LIMITS: + return do_list_obj(ctx, cmd, NFT_OBJECT_LIMIT); ++ case CMD_OBJ_FLOWTABLES: ++ return do_list_flowtables(ctx, cmd); + default: + BUG("invalid command object type %u\n", cmd->obj); + } +--- a/src/scanner.l ++++ b/src/scanner.l +@@ -297,6 +297,8 @@ addrstring ({macaddr}|{ip4addr}|{ip6addr + "meter" { return METER; } + "meters" { return METERS; } + ++"flowtables" { return FLOWTABLES; } ++ + "counter" { return COUNTER; } + "name" { return NAME; } + "packets" { return PACKETS; } diff --git a/package/network/utils/nftables/patches/201-src-add-support-to-add-flowtables.patch b/package/network/utils/nftables/patches/201-src-add-support-to-add-flowtables.patch new file mode 100644 index 000000000..888a76716 --- /dev/null +++ b/package/network/utils/nftables/patches/201-src-add-support-to-add-flowtables.patch @@ -0,0 +1,515 @@ +From: Pablo Neira Ayuso +Date: Thu, 18 Jan 2018 08:43:23 +0100 +Subject: [PATCH] src: add support to add flowtables + +This patch allows you to create flowtable: + + # nft add table x + # nft add flowtable x m { hook ingress priority 10\; devices = { eth0, wlan0 }\; } + +You have to specify hook and priority. So far, only the ingress hook is +supported. The priority represents where this flowtable is placed in the +ingress hook, which is registered to the devices that the user +specifies. + +You can also use the 'create' command instead to bail out in case that +there is an existing flowtable with this name. + +Signed-off-by: Pablo Neira Ayuso +--- + +--- a/include/expression.h ++++ b/include/expression.h +@@ -407,6 +407,8 @@ extern struct expr *prefix_expr_alloc(co + extern struct expr *range_expr_alloc(const struct location *loc, + struct expr *low, struct expr *high); + ++extern struct expr *compound_expr_alloc(const struct location *loc, ++ const struct expr_ops *ops); + extern void compound_expr_add(struct expr *compound, struct expr *expr); + extern void compound_expr_remove(struct expr *compound, struct expr *expr); + extern void list_expr_sort(struct list_head *head); +--- a/include/mnl.h ++++ b/include/mnl.h +@@ -92,6 +92,10 @@ int mnl_nft_obj_batch_del(struct nftnl_o + struct nftnl_flowtable_list * + mnl_nft_flowtable_dump(struct netlink_ctx *ctx, int family, const char *table); + ++int mnl_nft_flowtable_batch_add(struct nftnl_flowtable *flo, ++ struct nftnl_batch *batch, unsigned int flags, ++ uint32_t seqnum); ++ + struct nftnl_ruleset *mnl_nft_ruleset_dump(struct netlink_ctx *ctx, + uint32_t family); + int mnl_nft_event_listener(struct mnl_socket *nf_sock, unsigned int debug_mask, +--- a/include/netlink.h ++++ b/include/netlink.h +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -182,6 +183,9 @@ extern int netlink_delete_obj(struct net + extern int netlink_list_flowtables(struct netlink_ctx *ctx, + const struct handle *h, + const struct location *loc); ++extern int netlink_add_flowtable(struct netlink_ctx *ctx, ++ const struct handle *h, struct flowtable *ft, ++ uint32_t flags); + + extern void netlink_dump_chain(const struct nftnl_chain *nlc, + struct netlink_ctx *ctx); +--- a/include/rule.h ++++ b/include/rule.h +@@ -322,10 +322,13 @@ uint32_t obj_type_to_cmd(uint32_t type); + struct flowtable { + struct list_head list; + struct handle handle; ++ struct scope scope; + struct location location; ++ const char * hookstr; + unsigned int hooknum; + int priority; + const char **dev_array; ++ struct expr *dev_expr; + int dev_array_len; + unsigned int refcnt; + }; +@@ -383,6 +386,8 @@ enum cmd_ops { + * @CMD_OBJ_CHAIN: chain + * @CMD_OBJ_CHAINS: multiple chains + * @CMD_OBJ_TABLE: table ++ * @CMD_OBJ_FLOWTABLE: flowtable ++ * @CMD_OBJ_FLOWTABLES: flowtables + * @CMD_OBJ_RULESET: ruleset + * @CMD_OBJ_EXPR: expression + * @CMD_OBJ_MONITOR: monitor +@@ -422,6 +427,7 @@ enum cmd_obj { + CMD_OBJ_CT_HELPERS, + CMD_OBJ_LIMIT, + CMD_OBJ_LIMITS, ++ CMD_OBJ_FLOWTABLE, + CMD_OBJ_FLOWTABLES, + }; + +@@ -481,6 +487,7 @@ struct cmd { + struct rule *rule; + struct chain *chain; + struct table *table; ++ struct flowtable *flowtable; + struct monitor *monitor; + struct markup *markup; + struct obj *object; +--- a/src/evaluate.c ++++ b/src/evaluate.c +@@ -2897,6 +2897,24 @@ static int set_evaluate(struct eval_ctx + return 0; + } + ++static uint32_t str2hooknum(uint32_t family, const char *hook); ++ ++static int flowtable_evaluate(struct eval_ctx *ctx, struct flowtable *ft) ++{ ++ struct table *table; ++ ++ table = table_lookup_global(ctx); ++ if (table == NULL) ++ return cmd_error(ctx, "Could not process rule: Table '%s' does not exist", ++ ctx->cmd->handle.table); ++ ++ ft->hooknum = str2hooknum(NFPROTO_NETDEV, ft->hookstr); ++ if (ft->hooknum == NF_INET_NUMHOOKS) ++ return chain_error(ctx, ft, "invalid hook %s", ft->hookstr); ++ ++ return 0; ++} ++ + static int rule_evaluate(struct eval_ctx *ctx, struct rule *rule) + { + struct stmt *stmt, *tstmt = NULL; +@@ -3069,6 +3087,14 @@ static int cmd_evaluate_add(struct eval_ + return chain_evaluate(ctx, cmd->chain); + case CMD_OBJ_TABLE: + return table_evaluate(ctx, cmd->table); ++ case CMD_OBJ_FLOWTABLE: ++ ret = cache_update(ctx->nf_sock, ctx->cache, cmd->op, ++ ctx->msgs, ctx->debug_mask & NFT_DEBUG_NETLINK, ctx->octx); ++ if (ret < 0) ++ return ret; ++ ++ handle_merge(&cmd->flowtable->handle, &cmd->handle); ++ return flowtable_evaluate(ctx, cmd->flowtable); + case CMD_OBJ_COUNTER: + case CMD_OBJ_QUOTA: + case CMD_OBJ_CT_HELPER: +--- a/src/expression.c ++++ b/src/expression.c +@@ -663,8 +663,8 @@ struct expr *range_expr_alloc(const stru + return expr; + } + +-static struct expr *compound_expr_alloc(const struct location *loc, +- const struct expr_ops *ops) ++struct expr *compound_expr_alloc(const struct location *loc, ++ const struct expr_ops *ops) + { + struct expr *expr; + +--- a/src/mnl.c ++++ b/src/mnl.c +@@ -1011,6 +1011,22 @@ err: + return NULL; + } + ++int mnl_nft_flowtable_batch_add(struct nftnl_flowtable *flo, ++ struct nftnl_batch *batch, unsigned int flags, ++ uint32_t seqnum) ++{ ++ struct nlmsghdr *nlh; ++ ++ nlh = nftnl_nlmsg_build_hdr(nftnl_batch_buffer(batch), ++ NFT_MSG_NEWFLOWTABLE, ++ nftnl_flowtable_get_u32(flo, NFTNL_FLOWTABLE_FAMILY), ++ NLM_F_CREATE | flags, seqnum); ++ nftnl_flowtable_nlmsg_build_payload(nlh, flo); ++ mnl_nft_batch_continue(batch); ++ ++ return 0; ++} ++ + /* + * ruleset + */ +--- a/src/netlink.c ++++ b/src/netlink.c +@@ -1773,6 +1773,64 @@ static struct obj *netlink_delinearize_o + return obj; + } + ++static struct nftnl_flowtable *alloc_nftnl_flowtable(const struct handle *h, ++ const struct flowtable *ft) ++{ ++ struct nftnl_flowtable *flo; ++ ++ flo = nftnl_flowtable_alloc(); ++ if (flo == NULL) ++ memory_allocation_error(); ++ ++ nftnl_flowtable_set_u32(flo, NFTNL_FLOWTABLE_FAMILY, h->family); ++ nftnl_flowtable_set_str(flo, NFTNL_FLOWTABLE_TABLE, h->table); ++ if (h->flowtable != NULL) ++ nftnl_flowtable_set_str(flo, NFTNL_FLOWTABLE_NAME, h->flowtable); ++ ++ return flo; ++} ++ ++static void netlink_dump_flowtable(struct nftnl_flowtable *flo, ++ struct netlink_ctx *ctx) ++{ ++ FILE *fp = ctx->octx->output_fp; ++ ++ if (!(ctx->debug_mask & NFT_DEBUG_NETLINK) || !fp) ++ return; ++ ++ nftnl_flowtable_fprintf(fp, flo, 0, 0); ++ fprintf(fp, "\n"); ++} ++ ++int netlink_add_flowtable(struct netlink_ctx *ctx, const struct handle *h, ++ struct flowtable *ft, uint32_t flags) ++{ ++ struct nftnl_flowtable *flo; ++ const char *dev_array[8]; ++ struct expr *expr; ++ int i = 0, err; ++ ++ flo = alloc_nftnl_flowtable(h, ft); ++ nftnl_flowtable_set_u32(flo, NFTNL_FLOWTABLE_HOOKNUM, ft->hooknum); ++ nftnl_flowtable_set_u32(flo, NFTNL_FLOWTABLE_PRIO, ft->priority); ++ ++ list_for_each_entry(expr, &ft->dev_expr->expressions, list) ++ dev_array[i++] = expr->identifier; ++ ++ dev_array[i] = NULL; ++ nftnl_flowtable_set_array(flo, NFTNL_FLOWTABLE_DEVICES, dev_array); ++ ++ netlink_dump_flowtable(flo, ctx); ++ ++ err = mnl_nft_flowtable_batch_add(flo, ctx->batch, flags, ctx->seqnum); ++ if (err < 0) ++ netlink_io_error(ctx, &ft->location, "Could not add flowtable: %s", ++ strerror(errno)); ++ nftnl_flowtable_free(flo); ++ ++ return err; ++} ++ + static int list_obj_cb(struct nftnl_obj *nls, void *arg) + { + struct netlink_ctx *ctx = arg; +--- a/src/parser_bison.y ++++ b/src/parser_bison.y +@@ -145,6 +145,7 @@ int nft_lex(void *, void *, void *); + struct expr *expr; + struct set *set; + struct obj *obj; ++ struct flowtable *flowtable; + struct counter *counter; + struct quota *quota; + struct ct *ct; +@@ -189,6 +190,7 @@ int nft_lex(void *, void *, void *); + + %token HOOK "hook" + %token DEVICE "device" ++%token DEVICES "devices" + %token TABLE "table" + %token TABLES "tables" + %token CHAIN "chain" +@@ -200,6 +202,7 @@ int nft_lex(void *, void *, void *); + %token ELEMENT "element" + %token MAP "map" + %token MAPS "maps" ++%token FLOWTABLE "flowtable" + %token HANDLE "handle" + %token RULESET "ruleset" + %token TRACE "trace" +@@ -500,9 +503,9 @@ int nft_lex(void *, void *, void *); + %type base_cmd add_cmd replace_cmd create_cmd insert_cmd delete_cmd list_cmd reset_cmd flush_cmd rename_cmd export_cmd monitor_cmd describe_cmd import_cmd + %destructor { cmd_free($$); } base_cmd add_cmd replace_cmd create_cmd insert_cmd delete_cmd list_cmd reset_cmd flush_cmd rename_cmd export_cmd monitor_cmd describe_cmd import_cmd + +-%type table_spec chain_spec chain_identifier ruleid_spec handle_spec position_spec rule_position ruleset_spec +-%destructor { handle_free(&$$); } table_spec chain_spec chain_identifier ruleid_spec handle_spec position_spec rule_position ruleset_spec +-%type set_spec set_identifier obj_spec obj_identifier ++%type table_spec chain_spec flowtable_spec chain_identifier ruleid_spec handle_spec position_spec rule_position ruleset_spec ++%destructor { handle_free(&$$); } table_spec chain_spec flowtable_spec chain_identifier ruleid_spec handle_spec position_spec rule_position ruleset_spec ++%type set_spec set_identifier flowtable_identifier obj_spec obj_identifier + %destructor { handle_free(&$$); } set_spec set_identifier obj_spec obj_identifier + %type family_spec family_spec_explicit chain_policy prio_spec + +@@ -526,6 +529,9 @@ int nft_lex(void *, void *, void *); + %type map_block_alloc map_block + %destructor { set_free($$); } map_block_alloc + ++%type flowtable_block_alloc flowtable_block ++%destructor { flowtable_free($$); } flowtable_block_alloc ++ + %type obj_block_alloc counter_block quota_block ct_helper_block limit_block + %destructor { obj_free($$); } obj_block_alloc + +@@ -606,8 +612,8 @@ int nft_lex(void *, void *, void *); + %type verdict_map_expr verdict_map_list_expr verdict_map_list_member_expr + %destructor { expr_free($$); } verdict_map_expr verdict_map_list_expr verdict_map_list_member_expr + +-%type set_expr set_block_expr set_list_expr set_list_member_expr +-%destructor { expr_free($$); } set_expr set_block_expr set_list_expr set_list_member_expr ++%type set_expr set_block_expr set_list_expr set_list_member_expr flowtable_expr flowtable_list_expr flowtable_expr_member ++%destructor { expr_free($$); } set_expr set_block_expr set_list_expr set_list_member_expr flowtable_expr flowtable_list_expr flowtable_expr_member + %type set_elem_expr set_elem_expr_alloc set_lhs_expr set_rhs_expr + %destructor { expr_free($$); } set_elem_expr set_elem_expr_alloc set_lhs_expr set_rhs_expr + %type set_elem_expr_stmt set_elem_expr_stmt_alloc +@@ -872,6 +878,13 @@ add_cmd : TABLE table_spec + { + $$ = cmd_alloc(CMD_ADD, CMD_OBJ_SETELEM, &$2, &@$, $3); + } ++ | FLOWTABLE flowtable_spec flowtable_block_alloc ++ '{' flowtable_block '}' ++ { ++ $5->location = @5; ++ handle_merge(&$3->handle, &$2); ++ $$ = cmd_alloc(CMD_ADD, CMD_OBJ_FLOWTABLE, &$2, &@$, $5); ++ } + | COUNTER obj_spec + { + struct obj *obj; +@@ -947,6 +960,13 @@ create_cmd : TABLE table_spec + { + $$ = cmd_alloc(CMD_CREATE, CMD_OBJ_SETELEM, &$2, &@$, $3); + } ++ | FLOWTABLE flowtable_spec flowtable_block_alloc ++ '{' flowtable_block '}' ++ { ++ $5->location = @5; ++ handle_merge(&$3->handle, &$2); ++ $$ = cmd_alloc(CMD_CREATE, CMD_OBJ_FLOWTABLE, &$2, &@$, $5); ++ } + | COUNTER obj_spec + { + struct obj *obj; +@@ -1317,6 +1337,17 @@ table_block : /* empty */ { $$ = $list, &$1->sets); + $$ = $1; + } ++ ++ | table_block FLOWTABLE flowtable_identifier ++ flowtable_block_alloc '{' flowtable_block '}' ++ stmt_separator ++ { ++ $4->location = @3; ++ handle_merge(&$4->handle, &$3); ++ handle_free(&$3); ++ list_add_tail(&$4->list, &$1->flowtables); ++ $$ = $1; ++ } + | table_block COUNTER obj_identifier + obj_block_alloc '{' counter_block '}' + stmt_separator +@@ -1512,6 +1543,62 @@ set_policy_spec : PERFORMANCE { $$ = NF + | MEMORY { $$ = NFT_SET_POL_MEMORY; } + ; + ++flowtable_block_alloc : /* empty */ ++ { ++ $$ = flowtable_alloc(NULL); ++ } ++ ; ++ ++flowtable_block : /* empty */ { $$ = $-1; } ++ | flowtable_block common_block ++ | flowtable_block stmt_separator ++ | flowtable_block HOOK STRING PRIORITY prio_spec stmt_separator ++ { ++ $$->hookstr = chain_hookname_lookup($3); ++ if ($$->hookstr == NULL) { ++ erec_queue(error(&@3, "unknown chain hook %s", $3), ++ state->msgs); ++ xfree($3); ++ YYERROR; ++ } ++ xfree($3); ++ ++ $$->priority = $5; ++ } ++ | flowtable_block DEVICES '=' flowtable_expr stmt_separator ++ { ++ $$->dev_expr = $4; ++ } ++ ; ++ ++flowtable_expr : '{' flowtable_list_expr '}' ++ { ++ $2->location = @$; ++ $$ = $2; ++ } ++ ; ++ ++flowtable_list_expr : flowtable_expr_member ++ { ++ $$ = compound_expr_alloc(&@$, NULL); ++ compound_expr_add($$, $1); ++ } ++ | flowtable_list_expr COMMA flowtable_expr_member ++ { ++ compound_expr_add($1, $3); ++ $$ = $1; ++ } ++ | flowtable_list_expr COMMA opt_newline ++ ; ++ ++flowtable_expr_member : STRING ++ { ++ $$ = symbol_expr_alloc(&@$, SYMBOL_VALUE, ++ current_scope(state), ++ $1); ++ } ++ ; ++ + data_type_atom_expr : type_identifier + { + const struct datatype *dtype = datatype_lookup_byname($1); +@@ -1720,6 +1807,21 @@ set_identifier : identifier + } + ; + ++ ++flowtable_spec : table_spec identifier ++ { ++ $$ = $1; ++ $$.flowtable = $2; ++ } ++ ; ++ ++flowtable_identifier : identifier ++ { ++ memset(&$$, 0, sizeof($$)); ++ $$.flowtable = $1; ++ } ++ ; ++ + obj_spec : table_spec identifier + { + $$ = $1; +--- a/src/rule.c ++++ b/src/rule.c +@@ -45,6 +45,8 @@ void handle_merge(struct handle *dst, co + dst->chain = xstrdup(src->chain); + if (dst->set == NULL && src->set != NULL) + dst->set = xstrdup(src->set); ++ if (dst->flowtable == NULL && src->flowtable != NULL) ++ dst->flowtable = xstrdup(src->flowtable); + if (dst->obj == NULL && src->obj != NULL) + dst->obj = xstrdup(src->obj); + if (dst->handle.id == 0) +@@ -857,6 +859,7 @@ struct cmd *cmd_alloc(enum cmd_ops op, e + void nft_cmd_expand(struct cmd *cmd) + { + struct list_head new_cmds; ++ struct flowtable *ft; + struct table *table; + struct chain *chain; + struct rule *rule; +@@ -896,6 +899,14 @@ void nft_cmd_expand(struct cmd *cmd) + &set->location, set_get(set)); + list_add_tail(&new->list, &new_cmds); + } ++ list_for_each_entry(ft, &table->flowtables, list) { ++ handle_merge(&ft->handle, &table->handle); ++ memset(&h, 0, sizeof(h)); ++ handle_merge(&h, &ft->handle); ++ new = cmd_alloc(CMD_ADD, CMD_OBJ_FLOWTABLE, &h, ++ &ft->location, flowtable_get(ft)); ++ list_add_tail(&new->list, &new_cmds); ++ } + list_for_each_entry(chain, &table->chains, list) { + list_for_each_entry(rule, &chain->rules, list) { + memset(&h, 0, sizeof(h)); +@@ -982,6 +993,9 @@ void cmd_free(struct cmd *cmd) + case CMD_OBJ_LIMIT: + obj_free(cmd->object); + break; ++ case CMD_OBJ_FLOWTABLE: ++ flowtable_free(cmd->flowtable); ++ break; + default: + BUG("invalid command object type %u\n", cmd->obj); + } +@@ -1071,6 +1085,9 @@ static int do_command_add(struct netlink + case CMD_OBJ_CT_HELPER: + case CMD_OBJ_LIMIT: + return netlink_add_obj(ctx, &cmd->handle, cmd->object, flags); ++ case CMD_OBJ_FLOWTABLE: ++ return netlink_add_flowtable(ctx, &cmd->handle, cmd->flowtable, ++ flags); + default: + BUG("invalid command object type %u\n", cmd->obj); + } +--- a/src/scanner.l ++++ b/src/scanner.l +@@ -238,6 +238,7 @@ addrstring ({macaddr}|{ip4addr}|{ip6addr + + "hook" { return HOOK; } + "device" { return DEVICE; } ++"devices" { return DEVICES; } + "table" { return TABLE; } + "tables" { return TABLES; } + "chain" { return CHAIN; } +@@ -249,6 +250,7 @@ addrstring ({macaddr}|{ip4addr}|{ip6addr + "element" { return ELEMENT; } + "map" { return MAP; } + "maps" { return MAPS; } ++"flowtable" { return FLOWTABLE; } + "handle" { return HANDLE; } + "ruleset" { return RULESET; } + "trace" { return TRACE; } diff --git a/package/network/utils/nftables/patches/202-src-delete-flowtable.patch b/package/network/utils/nftables/patches/202-src-delete-flowtable.patch new file mode 100644 index 000000000..32b7f96bc --- /dev/null +++ b/package/network/utils/nftables/patches/202-src-delete-flowtable.patch @@ -0,0 +1,122 @@ +From: Pablo Neira Ayuso +Date: Fri, 19 Jan 2018 01:41:38 +0100 +Subject: [PATCH] src: delete flowtable + +This patch allows you to delete an existing flowtable: + + # nft delete flowtable x m + +Signed-off-by: Pablo Neira Ayuso +--- + +--- a/include/mnl.h ++++ b/include/mnl.h +@@ -95,6 +95,9 @@ mnl_nft_flowtable_dump(struct netlink_ct + int mnl_nft_flowtable_batch_add(struct nftnl_flowtable *flo, + struct nftnl_batch *batch, unsigned int flags, + uint32_t seqnum); ++int mnl_nft_flowtable_batch_del(struct nftnl_flowtable *flow, ++ struct nftnl_batch *batch, unsigned int flags, ++ uint32_t seqnum); + + struct nftnl_ruleset *mnl_nft_ruleset_dump(struct netlink_ctx *ctx, + uint32_t family); +--- a/include/netlink.h ++++ b/include/netlink.h +@@ -186,6 +186,9 @@ extern int netlink_list_flowtables(struc + extern int netlink_add_flowtable(struct netlink_ctx *ctx, + const struct handle *h, struct flowtable *ft, + uint32_t flags); ++extern int netlink_delete_flowtable(struct netlink_ctx *ctx, ++ const struct handle *h, ++ struct location *loc); + + extern void netlink_dump_chain(const struct nftnl_chain *nlc, + struct netlink_ctx *ctx); +--- a/src/evaluate.c ++++ b/src/evaluate.c +@@ -3121,6 +3121,7 @@ static int cmd_evaluate_delete(struct ev + case CMD_OBJ_RULE: + case CMD_OBJ_CHAIN: + case CMD_OBJ_TABLE: ++ case CMD_OBJ_FLOWTABLE: + case CMD_OBJ_COUNTER: + case CMD_OBJ_QUOTA: + case CMD_OBJ_CT_HELPER: +--- a/src/mnl.c ++++ b/src/mnl.c +@@ -1027,6 +1027,22 @@ int mnl_nft_flowtable_batch_add(struct n + return 0; + } + ++int mnl_nft_flowtable_batch_del(struct nftnl_flowtable *flo, ++ struct nftnl_batch *batch, unsigned int flags, ++ uint32_t seqnum) ++{ ++ struct nlmsghdr *nlh; ++ ++ nlh = nftnl_nlmsg_build_hdr(nftnl_batch_buffer(batch), ++ NFT_MSG_DELFLOWTABLE, ++ nftnl_flowtable_get_u32(flo, NFTNL_FLOWTABLE_FAMILY), ++ flags, seqnum); ++ nftnl_flowtable_nlmsg_build_payload(nlh, flo); ++ mnl_nft_batch_continue(batch); ++ ++ return 0; ++} ++ + /* + * ruleset + */ +--- a/src/netlink.c ++++ b/src/netlink.c +@@ -1831,6 +1831,24 @@ int netlink_add_flowtable(struct netlink + return err; + } + ++int netlink_delete_flowtable(struct netlink_ctx *ctx, const struct handle *h, ++ struct location *loc) ++{ ++ struct nftnl_flowtable *flo; ++ int err; ++ ++ flo = alloc_nftnl_flowtable(h, NULL); ++ netlink_dump_flowtable(flo, ctx); ++ ++ err = mnl_nft_flowtable_batch_del(flo, ctx->batch, 0, ctx->seqnum); ++ if (err < 0) ++ netlink_io_error(ctx, loc, "Could not delete flowtable: %s", ++ strerror(errno)); ++ nftnl_flowtable_free(flo); ++ ++ return err; ++} ++ + static int list_obj_cb(struct nftnl_obj *nls, void *arg) + { + struct netlink_ctx *ctx = arg; +--- a/src/parser_bison.y ++++ b/src/parser_bison.y +@@ -1024,6 +1024,10 @@ delete_cmd : TABLE table_spec + { + $$ = cmd_alloc(CMD_DELETE, CMD_OBJ_SETELEM, &$2, &@$, $3); + } ++ | FLOWTABLE flowtable_spec ++ { ++ $$ = cmd_alloc(CMD_DELETE, CMD_OBJ_FLOWTABLE, &$2, &@$, NULL); ++ } + | COUNTER obj_spec + { + $$ = cmd_alloc(CMD_DELETE, CMD_OBJ_COUNTER, &$2, &@$, NULL); +--- a/src/rule.c ++++ b/src/rule.c +@@ -1177,6 +1177,9 @@ static int do_command_delete(struct netl + case CMD_OBJ_LIMIT: + return netlink_delete_obj(ctx, &cmd->handle, &cmd->location, + NFT_OBJECT_LIMIT); ++ case CMD_OBJ_FLOWTABLE: ++ return netlink_delete_flowtable(ctx, &cmd->handle, ++ &cmd->location); + default: + BUG("invalid command object type %u\n", cmd->obj); + } diff --git a/package/network/utils/nftables/patches/203-src-flow-offload-support.patch b/package/network/utils/nftables/patches/203-src-flow-offload-support.patch new file mode 100644 index 000000000..86dfb1d94 --- /dev/null +++ b/package/network/utils/nftables/patches/203-src-flow-offload-support.patch @@ -0,0 +1,191 @@ +From: Pablo Neira Ayuso +Date: Sun, 3 Dec 2017 21:27:03 +0100 +Subject: [PATCH] src: flow offload support + +This patch allows us to refer to existing flowtables: + + # nft add rule x x flow offload @m + +Packets matching this rule create an entry in the flow table 'm', hence, +follow up packets that get to the flowtable at ingress bypass the +classic forwarding path. + +Signed-off-by: Pablo Neira Ayuso +--- + +--- a/include/ct.h ++++ b/include/ct.h +@@ -29,6 +29,8 @@ extern struct expr *ct_expr_alloc(const + extern void ct_expr_update_type(struct proto_ctx *ctx, struct expr *expr); + + extern struct stmt *notrack_stmt_alloc(const struct location *loc); ++extern struct stmt *flow_offload_stmt_alloc(const struct location *loc, ++ const char *table_name); + + extern const struct datatype ct_dir_type; + extern const struct datatype ct_state_type; +--- a/include/statement.h ++++ b/include/statement.h +@@ -10,6 +10,12 @@ extern struct stmt *expr_stmt_alloc(cons + extern struct stmt *verdict_stmt_alloc(const struct location *loc, + struct expr *expr); + ++struct flow_stmt { ++ const char *table_name; ++}; ++ ++struct stmt *flow_stmt_alloc(const struct location *loc, const char *name); ++ + struct objref_stmt { + uint32_t type; + struct expr *expr; +@@ -231,6 +237,7 @@ extern struct stmt *xt_stmt_alloc(const + * @STMT_NOTRACK: notrack statement + * @STMT_OBJREF: stateful object reference statement + * @STMT_EXTHDR: extension header statement ++ * @STMT_FLOW_OFFLOAD: flow offload statement + */ + enum stmt_types { + STMT_INVALID, +@@ -256,6 +263,7 @@ enum stmt_types { + STMT_NOTRACK, + STMT_OBJREF, + STMT_EXTHDR, ++ STMT_FLOW_OFFLOAD, + }; + + /** +@@ -316,6 +324,7 @@ struct stmt { + struct fwd_stmt fwd; + struct xt_stmt xt; + struct objref_stmt objref; ++ struct flow_stmt flow; + }; + }; + +--- a/src/ct.c ++++ b/src/ct.c +@@ -456,3 +456,26 @@ struct stmt *notrack_stmt_alloc(const st + { + return stmt_alloc(loc, ¬rack_stmt_ops); + } ++ ++static void flow_offload_stmt_print(const struct stmt *stmt, ++ struct output_ctx *octx) ++{ ++ printf("flow offload @%s", stmt->flow.table_name); ++} ++ ++static const struct stmt_ops flow_offload_stmt_ops = { ++ .type = STMT_FLOW_OFFLOAD, ++ .name = "flow_offload", ++ .print = flow_offload_stmt_print, ++}; ++ ++struct stmt *flow_offload_stmt_alloc(const struct location *loc, ++ const char *table_name) ++{ ++ struct stmt *stmt; ++ ++ stmt = stmt_alloc(loc, &flow_offload_stmt_ops); ++ stmt->flow.table_name = table_name; ++ ++ return stmt; ++} +--- a/src/evaluate.c ++++ b/src/evaluate.c +@@ -2773,6 +2773,7 @@ int stmt_evaluate(struct eval_ctx *ctx, + case STMT_LIMIT: + case STMT_QUOTA: + case STMT_NOTRACK: ++ case STMT_FLOW_OFFLOAD: + return 0; + case STMT_EXPRESSION: + return stmt_evaluate_expr(ctx, stmt); +--- a/src/netlink_delinearize.c ++++ b/src/netlink_delinearize.c +@@ -680,6 +680,16 @@ static void netlink_parse_notrack(struct + ctx->stmt = notrack_stmt_alloc(loc); + } + ++static void netlink_parse_flow_offload(struct netlink_parse_ctx *ctx, ++ const struct location *loc, ++ const struct nftnl_expr *nle) ++{ ++ const char *table_name; ++ ++ table_name = xstrdup(nftnl_expr_get_str(nle, NFTNL_EXPR_FLOW_TABLE_NAME)); ++ ctx->stmt = flow_offload_stmt_alloc(loc, table_name); ++} ++ + static void netlink_parse_ct_stmt(struct netlink_parse_ctx *ctx, + const struct location *loc, + const struct nftnl_expr *nle) +@@ -1255,6 +1265,7 @@ static const struct { + { .name = "hash", .parse = netlink_parse_hash }, + { .name = "fib", .parse = netlink_parse_fib }, + { .name = "tcpopt", .parse = netlink_parse_exthdr }, ++ { .name = "flow_offload", .parse = netlink_parse_flow_offload }, + }; + + static int netlink_parse_expr(const struct nftnl_expr *nle, +--- a/src/netlink_linearize.c ++++ b/src/netlink_linearize.c +@@ -1201,6 +1201,17 @@ static void netlink_gen_notrack_stmt(str + nftnl_rule_add_expr(ctx->nlr, nle); + } + ++static void netlink_gen_flow_offload_stmt(struct netlink_linearize_ctx *ctx, ++ const struct stmt *stmt) ++{ ++ struct nftnl_expr *nle; ++ ++ nle = alloc_nft_expr("flow_offload"); ++ nftnl_expr_set_str(nle, NFTNL_EXPR_FLOW_TABLE_NAME, ++ stmt->flow.table_name); ++ nftnl_rule_add_expr(ctx->nlr, nle); ++} ++ + static void netlink_gen_set_stmt(struct netlink_linearize_ctx *ctx, + const struct stmt *stmt) + { +@@ -1300,6 +1311,8 @@ static void netlink_gen_stmt(struct netl + break; + case STMT_NOTRACK: + return netlink_gen_notrack_stmt(ctx, stmt); ++ case STMT_FLOW_OFFLOAD: ++ return netlink_gen_flow_offload_stmt(ctx, stmt); + case STMT_OBJREF: + return netlink_gen_objref_stmt(ctx, stmt); + default: +--- a/src/parser_bison.y ++++ b/src/parser_bison.y +@@ -248,6 +248,7 @@ int nft_lex(void *, void *, void *); + %token SIZE "size" + + %token FLOW "flow" ++%token OFFLOAD "offload" + %token METER "meter" + %token METERS "meters" + +@@ -3384,6 +3385,10 @@ meta_stmt : META meta_key SET stmt_expr + { + $$ = notrack_stmt_alloc(&@$); + } ++ | FLOW OFFLOAD AT string ++ { ++ $$ = flow_offload_stmt_alloc(&@$, $4); ++ } + ; + + offset_opt : /* empty */ { $$ = 0; } +--- a/src/scanner.l ++++ b/src/scanner.l +@@ -296,6 +296,7 @@ addrstring ({macaddr}|{ip4addr}|{ip6addr + "memory" { return MEMORY; } + + "flow" { return FLOW; } ++"offload" { return OFFLOAD; } + "meter" { return METER; } + "meters" { return METERS; } + diff --git a/package/network/utils/nftables/patches/204-tests-shell-add-flowtable-tests.patch b/package/network/utils/nftables/patches/204-tests-shell-add-flowtable-tests.patch new file mode 100644 index 000000000..e6dbf8fbe --- /dev/null +++ b/package/network/utils/nftables/patches/204-tests-shell-add-flowtable-tests.patch @@ -0,0 +1,110 @@ +From: Pablo Neira Ayuso +Date: Mon, 22 Jan 2018 19:54:36 +0100 +Subject: [PATCH] tests: shell: add flowtable tests + +Add basic flowtable tests. + +Signed-off-by: Pablo Neira Ayuso +--- + create mode 100755 tests/shell/testcases/flowtable/0001flowtable_0 + create mode 100755 tests/shell/testcases/flowtable/0002create_flowtable_0 + create mode 100755 tests/shell/testcases/flowtable/0003add_after_flush_0 + create mode 100755 tests/shell/testcases/flowtable/0004delete_after_add0 + create mode 100755 tests/shell/testcases/flowtable/0005delete_in_use_1 + +--- a/tests/shell/run-tests.sh ++++ b/tests/shell/run-tests.sh +@@ -68,7 +68,9 @@ kernel_cleanup() { + nft_set_hash nft_set_rbtree nft_set_bitmap \ + nft_chain_nat_ipv4 nft_chain_nat_ipv6 \ + nf_tables_inet nf_tables_bridge nf_tables_arp \ +- nf_tables_ipv4 nf_tables_ipv6 nf_tables ++ nf_tables_ipv4 nf_tables_ipv6 nf_tables \ ++ nf_flow_table nf_flow_table_ipv4 nf_flow_tables_ipv6 \ ++ nf_flow_table_inet nft_flow_offload + } + + find_tests() { +--- /dev/null ++++ b/tests/shell/testcases/flowtable/0001flowtable_0 +@@ -0,0 +1,33 @@ ++#!/bin/bash ++ ++tmpfile=$(mktemp) ++if [ ! -w $tmpfile ] ; then ++ echo "Failed to create tmp file" >&2 ++ exit 0 ++fi ++ ++trap "rm -rf $tmpfile" EXIT # cleanup if aborted ++ ++ ++EXPECTED='table inet t { ++ flowtable f { ++ hook ingress priority 10 ++ devices = { eth0, wlan0 } ++ } ++ ++ chain c { ++ flow offload @f ++ } ++}' ++ ++echo "$EXPECTED" > $tmpfile ++set -e ++$NFT -f $tmpfile ++ ++GET="$($NFT list ruleset)" ++ ++if [ "$EXPECTED" != "$GET" ] ; then ++ DIFF="$(which diff)" ++ [ -x $DIFF ] && $DIFF -u <(echo "$EXPECTED") <(echo "$GET") ++ exit 1 ++fi +--- /dev/null ++++ b/tests/shell/testcases/flowtable/0002create_flowtable_0 +@@ -0,0 +1,12 @@ ++#!/bin/bash ++ ++set -e ++$NFT add table t ++$NFT add flowtable t f { hook ingress priority 10 \; devices = { eth0, wlan0 }\; } ++if $NFT create flowtable t f { hook ingress priority 10 \; devices = { eth0, wlan0 }\; } 2>/dev/null ; then ++ echo "E: flowtable creation not failing on existing set" >&2 ++ exit 1 ++fi ++$NFT add flowtable t f { hook ingress priority 10 \; devices = { eth0, wlan0 }\; } ++ ++exit 0 +--- /dev/null ++++ b/tests/shell/testcases/flowtable/0003add_after_flush_0 +@@ -0,0 +1,8 @@ ++#!/bin/bash ++ ++set -e ++$NFT add table x ++$NFT add flowtable x y { hook ingress priority 0\; devices = { eth0, wlan0 }\;} ++$NFT flush ruleset ++$NFT add table x ++$NFT add flowtable x y { hook ingress priority 0\; devices = { eth0, wlan0 }\;} +--- /dev/null ++++ b/tests/shell/testcases/flowtable/0004delete_after_add0 +@@ -0,0 +1,6 @@ ++#!/bin/bash ++ ++set -e ++$NFT add table x ++$NFT add flowtable x y { hook ingress priority 0\; devices = { eth0, wlan0 }\;} ++$NFT delete flowtable x y +--- /dev/null ++++ b/tests/shell/testcases/flowtable/0005delete_in_use_1 +@@ -0,0 +1,9 @@ ++#!/bin/bash ++ ++set -e ++$NFT add table x ++$NFT add chain x x ++$NFT add flowtable x y { hook ingress priority 0\; devices = { eth0, wlan0 }\;} ++$NFT add rule x x flow offload @y ++$NFT delete flowtable x y ++echo "E: delete flowtable in use" diff --git a/package/network/utils/nftables/patches/205-doc-nft-document-flowtable.patch b/package/network/utils/nftables/patches/205-doc-nft-document-flowtable.patch new file mode 100644 index 000000000..dd6faa574 --- /dev/null +++ b/package/network/utils/nftables/patches/205-doc-nft-document-flowtable.patch @@ -0,0 +1,128 @@ +From: Pablo Neira Ayuso +Date: Tue, 23 Jan 2018 12:58:30 +0100 +Subject: [PATCH] doc: nft: document flowtable + +Document the new flowtable objects available since Linux kernel 4.16-rc. + +Signed-off-by: Pablo Neira Ayuso +--- + +--- a/doc/nft.xml ++++ b/doc/nft.xml +@@ -1166,6 +1166,91 @@ filter input iif $int_ifs accept + + + ++ Flowtables ++ ++ ++ ++ add ++ create ++ ++ flowtable ++ family ++ table ++ flowtable ++ ++ hook hook ++ priority priority ; ++ devices = { device[,...] } ; ++ ++ ++ ++ ++ delete ++ list ++ ++ flowtable ++ family ++ table ++ flowtable ++ ++ ++ ++ ++ Flowtables allow you to accelerate packet forwarding in software. ++ Flowtables entries are represented through a tuple that is composed of the ++ input interface, source and destination address, source and destination ++ port; and layer 3/4 protocols. Each entry also caches the destination ++ interface and the gateway address - to update the destination link-layer ++ address - to forward packets. The ttl and hoplimit fields are also ++ decremented. Hence, flowtables provides an alternative path that allow ++ packets to bypass the classic forwarding path. Flowtables reside in the ++ ingress hook, that is located before the prerouting hook. You can select ++ what flows you want to offload through the flow offload ++ expression from the forward chain. Flowtables are ++ identified by their address family and their name. The address family ++ must be one of ++ ++ ++ ip ++ ip6 ++ inet ++ . ++ ++ The inet address family is a dummy family which is used to create ++ hybrid IPv4/IPv6 tables. ++ ++ When no address family is specified, ip is used by default. ++ ++ ++ ++ ++ ++ ++ ++ Add a new flowtable for the given family with the given name. ++ ++ ++ ++ ++ ++ ++ ++ Delete the specified flowtable. ++ ++ ++ ++ ++ ++ ++ ++ List all flowtables. ++ ++ ++ ++ ++ ++ ++ + Stateful objects + + +@@ -4923,6 +5008,24 @@ add rule nat prerouting tcp dport 22 red + + + ++ ++ ++ Flow offload statement ++ ++ A flow offload statement allows us to select what flows ++ you want to accelerate forwarding through layer 3 network ++ stack bypass. You have to specify the flowtable name where ++ you want to offload this flow. ++ ++ ++ ++ flow offload ++ @flowtable ++ ++ ++ ++ ++ + + Queue statement + diff --git a/package/network/utils/uqmi/Makefile b/package/network/utils/uqmi/Makefile index 9c8dadabe..21b3c7eba 100644 --- a/package/network/utils/uqmi/Makefile +++ b/package/network/utils/uqmi/Makefile @@ -1,7 +1,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=uqmi -PKG_RELEASE:=1 +PKG_RELEASE:=3 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/uqmi.git diff --git a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh index 9c953ea69..38d83ace5 100755 --- a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh +++ b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh @@ -27,7 +27,7 @@ proto_qmi_init_config() { proto_qmi_setup() { local interface="$1" - + local dataformat connstat local device apn auth username password pincode delay modes pdptype profile dhcpv6 autoconnect plmn $PROTO_DEFAULT_OPTIONS local cid_4 pdh_4 cid_6 pdh_6 local ip_6 ip_prefix_length gateway_6 dns1_6 dns2_6 @@ -70,7 +70,7 @@ proto_qmi_setup() { done [ -n "$pincode" ] && { - uqmi -s -d "$device" --verify-pin1 "$pincode" || uqmi -s -d "$device" --uim-verify-pin1 "$pincode" || { + uqmi -s -d "$device" --verify-pin1 "$pincode" > /dev/null || uqmi -s -d "$device" --uim-verify-pin1 "$pincode" > /dev/null || { echo "Unable to verify PIN" proto_notify_error "$interface" PIN_FAILED proto_block_restart "$interface" @@ -97,8 +97,25 @@ proto_qmi_setup() { } } + # Cleanup current state if any + uqmi -s -d "$device" --stop-network 0xffffffff --autoconnect + + # Set IP format uqmi -s -d "$device" --set-data-format 802.3 uqmi -s -d "$device" --wda-set-data-format 802.3 + dataformat="$(uqmi -s -d "$device" --wda-get-data-format)" + + if [ "$dataformat" = '"raw-ip"' ]; then + + [ -f /sys/class/net/$ifname/qmi/raw_ip ] || { + echo "Device only supports raw-ip mode but is missing this required driver attribute: /sys/class/net/$ifname/qmi/raw_ip" + return 1 + } + + echo "Device does not support 802.3 mode. Informing driver of raw-ip only for $ifname .." + echo "Y" > /sys/class/net/$ifname/qmi/raw_ip + fi + uqmi -s -d "$device" --sync echo "Waiting for network registration" @@ -123,19 +140,14 @@ proto_qmi_setup() { [ "$pdptype" = "ip" -o "$pdptype" = "ipv4v6" ] && { cid_4=$(uqmi -s -d "$device" --get-client-id wds) - [ $? -ne 0 ] && { + if ! [ "$cid_4" -eq "$cid_4" ] 2> /dev/null; then echo "Unable to obtain client ID" proto_notify_error "$interface" NO_CID return 1 - } + fi uqmi -s -d "$device" --set-client-id wds,"$cid_4" --set-ip-family ipv4 > /dev/null - # try to clear previous autoconnect state - uqmi -s -d "$device" --set-client-id wds,"$cid_4" \ - --stop-network 0xffffffff \ - --autoconnect > /dev/null - pdh_4=$(uqmi -s -d "$device" --set-client-id wds,"$cid_4" \ --start-network \ ${apn:+--apn $apn} \ @@ -144,29 +156,35 @@ proto_qmi_setup() { ${username:+--username $username} \ ${password:+--password $password} \ ${autoconnect:+--autoconnect}) - [ $? -ne 0 ] && { + + # pdh_4 is a numeric value on success + if ! [ "$pdh_4" -eq "$pdh_4" ] 2> /dev/null; then echo "Unable to connect IPv4" uqmi -s -d "$device" --set-client-id wds,"$cid_4" --release-client-id wds proto_notify_error "$interface" CALL_FAILED return 1 - } + fi + + # Check data connection state + connstat=$(uqmi -s -d "$device" --get-data-status) + [ "$connstat" == '"connected"' ] || { + echo "No data link!" + uqmi -s -d "$device" --set-client-id wds,"$cid_4" --release-client-id wds + proto_notify_error "$interface" CALL_FAILED + return 1 + } } [ "$pdptype" = "ipv6" -o "$pdptype" = "ipv4v6" ] && { cid_6=$(uqmi -s -d "$device" --get-client-id wds) - [ $? -ne 0 ] && { + if ! [ "$cid_6" -eq "$cid_6" ] 2> /dev/null; then echo "Unable to obtain client ID" proto_notify_error "$interface" NO_CID return 1 - } + fi uqmi -s -d "$device" --set-client-id wds,"$cid_6" --set-ip-family ipv6 > /dev/null - # try to clear previous autoconnect state - uqmi -s -d "$device" --set-client-id wds,"$cid_6" \ - --stop-network 0xffffffff \ - --autoconnect > /dev/null - pdh_6=$(uqmi -s -d "$device" --set-client-id wds,"$cid_6" \ --start-network \ ${apn:+--apn $apn} \ @@ -175,12 +193,23 @@ proto_qmi_setup() { ${username:+--username $username} \ ${password:+--password $password} \ ${autoconnect:+--autoconnect}) - [ $? -ne 0 ] && { + + # pdh_6 is a numeric value on success + if ! [ "$pdh_6" -eq "$pdh_6" ] 2> /dev/null; then echo "Unable to connect IPv6" uqmi -s -d "$device" --set-client-id wds,"$cid_6" --release-client-id wds proto_notify_error "$interface" CALL_FAILED return 1 - } + fi + + # Check data connection state + connstat=$(uqmi -s -d "$device" --get-data-status) + [ "$connstat" == '"connected"' ] || { + echo "No data link!" + uqmi -s -d "$device" --set-client-id wds,"$cid_6" --release-client-id wds + proto_notify_error "$interface" CALL_FAILED + return 1 + } } echo "Setting up $ifname" @@ -250,10 +279,15 @@ qmi_wds_stop() { uqmi -s -d "$device" --set-client-id wds,"$cid" \ --stop-network 0xffffffff \ - --autoconnect > /dev/null + --autoconnect > /dev/null 2>&1 - [ -n "$pdh" ] && uqmi -s -d "$device" --set-client-id wds,"$cid" --stop-network "$pdh" - uqmi -s -d "$device" --set-client-id wds,"$cid" --release-client-id wds + [ -n "$pdh" ] && { + uqmi -s -d "$device" --set-client-id wds,"$cid" \ + --stop-network "$pdh" > /dev/null 2>&1 + } + + uqmi -s -d "$device" --set-client-id wds,"$cid" \ + --release-client-id wds > /dev/null 2>&1 } proto_qmi_teardown() { diff --git a/package/network/utils/xtables-addons/Makefile b/package/network/utils/xtables-addons/Makefile deleted file mode 100644 index 0c12d7464..000000000 --- a/package/network/utils/xtables-addons/Makefile +++ /dev/null @@ -1,149 +0,0 @@ -# -# Copyright (C) 2009-2013 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_NAME:=xtables-addons -PKG_VERSION:=2.14 -PKG_RELEASE:=1 -PKG_HASH:=d215a9a8b8e66aae04b982fa2e1228e8a71e7dfe42320df99e34e5000cbdf152 - -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_SOURCE_URL:=@SF/xtables-addons -PKG_BUILD_DEPENDS:=iptables -PKG_INSTALL:=1 -PKG_BUILD_PARALLEL:=1 -PKG_CHECK_FORMAT_SECURITY:=0 - -PKG_MAINTAINER:=Jo-Philipp Wich -PKG_LICENSE:=GPL-2.0 - -PKG_FIXUP:=autoreconf - -include $(INCLUDE_DIR)/package.mk - -define Package/xtables-addons - SECTION:=net - CATEGORY:=Network - SUBMENU:=Firewall - TITLE:=Extensions not distributed in the main Xtables - URL:=http://xtables-addons.sourceforge.net/ -endef - -# uses GNU configure - -CONFIGURE_ARGS+= \ - --with-kbuild="$(LINUX_DIR)" \ - --with-xtlibdir="/usr/lib/iptables" \ - -define Build/Compile - +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \ - $(KERNEL_MAKE_FLAGS) \ - DESTDIR="$(PKG_INSTALL_DIR)" \ - DEPMOD="/bin/true" \ - all -endef - -define Build/Install - $(MAKE) -C $(PKG_BUILD_DIR) \ - $(KERNEL_MAKE_FLAGS) \ - DESTDIR="$(PKG_INSTALL_DIR)" \ - DEPMOD="/bin/true" \ - install -endef - -# 1: extension/module suffix used in package name -# 2: extension/module display name used in package title/description -# 3: list of extensions to package -# 4: list of modules to package -# 5: module load priority -# 6: module depends -define BuildTemplate - - ifneq ($(3),) - define Package/iptables-mod-$(1) - $$(call Package/xtables-addons) - CATEGORY:=Network - TITLE:=$(2) iptables extension - DEPENDS:=iptables $(if $(4),+kmod-ipt-$(1)) - endef - - define Package/iptables-mod-$(1)/install - $(INSTALL_DIR) $$(1)/usr/lib/iptables - for m in $(3); do \ - $(CP) \ - $(PKG_INSTALL_DIR)/usr/lib/iptables/lib$$$$$$$${m}.so \ - $$(1)/usr/lib/iptables/ ; \ - done - endef - - $$(eval $$(call BuildPackage,iptables-mod-$(1))) - endif - - ifneq ($(4),) - define KernelPackage/ipt-$(1) - SUBMENU:=Netfilter Extensions - TITLE:=$(2) netfilter module - DEPENDS:=+kmod-ipt-core $(5) - KCONFIG:=CONFIG_NF_CONNTRACK_MARK=y - FILES:=$(foreach mod,$(4),$(PKG_BUILD_DIR)/extensions/$(mod).$(LINUX_KMOD_SUFFIX)) - AUTOLOAD:=$(call AutoProbe,$(notdir $(4))) - endef - - $$(eval $$(call KernelPackage,ipt-$(1))) - endif - -endef - - -define Package/iptaccount - $(call Package/xtables-addons) - CATEGORY:=Network - TITLE:=iptables-mod-account control utility - DEPENDS:=iptables +iptables-mod-account -endef - -define Package/iptaccount/install - $(INSTALL_DIR) $(1)/usr/lib - $(INSTALL_DIR) $(1)/usr/sbin - $(CP) \ - $(PKG_INSTALL_DIR)/usr/lib/libxt_ACCOUNT_cl.so* \ - $(1)/usr/lib/ - $(CP) \ - $(PKG_INSTALL_DIR)/usr/sbin/iptaccount \ - $(1)/usr/sbin/ -endef - - -#$(eval $(call BuildTemplate,SUFFIX,DESCRIPTION,EXTENSION,MODULE,PRIORITY,DEPENDS)) - -$(eval $(call BuildTemplate,compat-xtables,API compatibilty layer,,compat_xtables,+IPV6:kmod-ip6tables)) -$(eval $(call BuildTemplate,nathelper-rtsp,RTSP Conntrack and NAT,,rtsp/nf_conntrack_rtsp rtsp/nf_nat_rtsp,+kmod-ipt-conntrack-extra +kmod-ipt-nat)) - -$(eval $(call BuildTemplate,account,ACCOUNT,xt_ACCOUNT,ACCOUNT/xt_ACCOUNT,+kmod-ipt-compat-xtables)) -$(eval $(call BuildTemplate,chaos,CHAOS,xt_CHAOS,xt_CHAOS,+kmod-ipt-compat-xtables +kmod-ipt-delude +kmod-ipt-tarpit)) -$(eval $(call BuildTemplate,condition,Condition,xt_condition,xt_condition,)) -$(eval $(call BuildTemplate,delude,DELUDE,xt_DELUDE,xt_DELUDE,+kmod-ipt-compat-xtables)) -$(eval $(call BuildTemplate,dhcpmac,DHCPMAC,xt_DHCPMAC,xt_DHCPMAC,+kmod-ipt-compat-xtables)) -$(eval $(call BuildTemplate,dnetmap,DNETMAP,xt_DNETMAP,xt_DNETMAP,+kmod-ipt-compat-xtables +kmod-ipt-nat)) -$(eval $(call BuildTemplate,fuzzy,fuzzy,xt_fuzzy,xt_fuzzy,)) -$(eval $(call BuildTemplate,geoip,geoip,xt_geoip,xt_geoip,)) -$(eval $(call BuildTemplate,iface,iface,xt_iface,xt_iface,)) -$(eval $(call BuildTemplate,ipmark,IPMARK,xt_IPMARK,xt_IPMARK,+kmod-ipt-compat-xtables)) -$(eval $(call BuildTemplate,ipp2p,IPP2P,xt_ipp2p,xt_ipp2p,+kmod-ipt-compat-xtables)) -$(eval $(call BuildTemplate,ipv4options,ipv4options,xt_ipv4options,xt_ipv4options,)) -$(eval $(call BuildTemplate,length2,length2,xt_length2,xt_length2,+kmod-ipt-compat-xtables)) -$(eval $(call BuildTemplate,logmark,LOGMARK,xt_LOGMARK,xt_LOGMARK,+kmod-ipt-compat-xtables)) -$(eval $(call BuildTemplate,lscan,lscan,xt_lscan,xt_lscan,)) -$(eval $(call BuildTemplate,lua,Lua PacketScript,xt_LUA,LUA/xt_LUA,+kmod-ipt-conntrack-extra)) -$(eval $(call BuildTemplate,psd,psd,xt_psd,xt_psd,)) -$(eval $(call BuildTemplate,quota2,quota2,xt_quota2,xt_quota2,)) -$(eval $(call BuildTemplate,sysrq,SYSRQ,xt_SYSRQ,xt_SYSRQ,+kmod-ipt-compat-xtables +kmod-crypto-hash)) -$(eval $(call BuildTemplate,tarpit,TARPIT,xt_TARPIT,xt_TARPIT,+kmod-ipt-compat-xtables)) - -$(eval $(call BuildPackage,iptaccount)) diff --git a/package/network/utils/xtables-addons/patches/002-fix-kernel-version-detection.patch b/package/network/utils/xtables-addons/patches/002-fix-kernel-version-detection.patch deleted file mode 100644 index 775ccf657..000000000 --- a/package/network/utils/xtables-addons/patches/002-fix-kernel-version-detection.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/configure.ac -+++ b/configure.ac -@@ -44,7 +44,7 @@ regular_CFLAGS="-Wall -Waggregate-return - - if test -n "$kbuilddir"; then - AC_MSG_CHECKING([kernel version that we will build against]) -- krel="$(make -sC "$kbuilddir" M=$PWD kernelrelease | $AWK -v 'FS=[[^0-9.]]' '{print $1; exit}')" -+ krel="$(make -sC "$kbuilddir" M=$PWD kernelversion | $AWK -v 'FS=[[^0-9.]]' '{print $1; exit}')" - save_IFS="$IFS" - IFS='.' - set x $krel diff --git a/package/network/utils/xtables-addons/patches/100-add-rtsp-conntrack.patch b/package/network/utils/xtables-addons/patches/100-add-rtsp-conntrack.patch deleted file mode 100644 index bd49d92de..000000000 --- a/package/network/utils/xtables-addons/patches/100-add-rtsp-conntrack.patch +++ /dev/null @@ -1,1526 +0,0 @@ ---- /dev/null -+++ b/extensions/rtsp/Kbuild -@@ -0,0 +1,4 @@ -+# -*- Makefile -*- -+ -+obj-m += nf_nat_rtsp.o -+obj-m += nf_conntrack_rtsp.o ---- /dev/null -+++ b/extensions/rtsp/netfilter_helpers.h -@@ -0,0 +1,133 @@ -+/* -+ * Helpers for netfiler modules. This file provides implementations for basic -+ * functions such as strncasecmp(), etc. -+ * -+ * gcc will warn for defined but unused functions, so we only include the -+ * functions requested. The following macros are used: -+ * NF_NEED_STRNCASECMP nf_strncasecmp() -+ * NF_NEED_STRTOU16 nf_strtou16() -+ * NF_NEED_STRTOU32 nf_strtou32() -+ */ -+#ifndef _NETFILTER_HELPERS_H -+#define _NETFILTER_HELPERS_H -+ -+/* Only include these functions for kernel code. */ -+#ifdef __KERNEL__ -+ -+#include -+#define iseol(c) ( (c) == '\r' || (c) == '\n' ) -+ -+/* -+ * The standard strncasecmp() -+ */ -+#ifdef NF_NEED_STRNCASECMP -+static int -+nf_strncasecmp(const char* s1, const char* s2, u_int32_t len) -+{ -+ if (s1 == NULL || s2 == NULL) -+ { -+ if (s1 == NULL && s2 == NULL) -+ { -+ return 0; -+ } -+ return (s1 == NULL) ? -1 : 1; -+ } -+ while (len > 0 && tolower(*s1) == tolower(*s2)) -+ { -+ len--; -+ s1++; -+ s2++; -+ } -+ return ( (len == 0) ? 0 : (tolower(*s1) - tolower(*s2)) ); -+} -+#endif /* NF_NEED_STRNCASECMP */ -+ -+/* -+ * Parse a string containing a 16-bit unsigned integer. -+ * Returns the number of chars used, or zero if no number is found. -+ */ -+#ifdef NF_NEED_STRTOU16 -+static int -+nf_strtou16(const char* pbuf, u_int16_t* pval) -+{ -+ int n = 0; -+ -+ *pval = 0; -+ while (isdigit(pbuf[n])) -+ { -+ *pval = (*pval * 10) + (pbuf[n] - '0'); -+ n++; -+ } -+ -+ return n; -+} -+#endif /* NF_NEED_STRTOU16 */ -+ -+/* -+ * Parse a string containing a 32-bit unsigned integer. -+ * Returns the number of chars used, or zero if no number is found. -+ */ -+#ifdef NF_NEED_STRTOU32 -+static int -+nf_strtou32(const char* pbuf, u_int32_t* pval) -+{ -+ int n = 0; -+ -+ *pval = 0; -+ while (pbuf[n] >= '0' && pbuf[n] <= '9') -+ { -+ *pval = (*pval * 10) + (pbuf[n] - '0'); -+ n++; -+ } -+ -+ return n; -+} -+#endif /* NF_NEED_STRTOU32 */ -+ -+/* -+ * Given a buffer and length, advance to the next line and mark the current -+ * line. -+ */ -+#ifdef NF_NEED_NEXTLINE -+static int -+nf_nextline(char* p, uint len, uint* poff, uint* plineoff, uint* plinelen) -+{ -+ uint off = *poff; -+ uint physlen = 0; -+ -+ if (off >= len) -+ { -+ return 0; -+ } -+ -+ while (p[off] != '\n') -+ { -+ if (len-off <= 1) -+ { -+ return 0; -+ } -+ -+ physlen++; -+ off++; -+ } -+ -+ /* if we saw a crlf, physlen needs adjusted */ -+ if (physlen > 0 && p[off] == '\n' && p[off-1] == '\r') -+ { -+ physlen--; -+ } -+ -+ /* advance past the newline */ -+ off++; -+ -+ *plineoff = *poff; -+ *plinelen = physlen; -+ *poff = off; -+ -+ return 1; -+} -+#endif /* NF_NEED_NEXTLINE */ -+ -+#endif /* __KERNEL__ */ -+ -+#endif /* _NETFILTER_HELPERS_H */ ---- /dev/null -+++ b/extensions/rtsp/netfilter_mime.h -@@ -0,0 +1,89 @@ -+/* -+ * MIME functions for netfilter modules. This file provides implementations -+ * for basic MIME parsing. MIME headers are used in many protocols, such as -+ * HTTP, RTSP, SIP, etc. -+ * -+ * gcc will warn for defined but unused functions, so we only include the -+ * functions requested. The following macros are used: -+ * NF_NEED_MIME_NEXTLINE nf_mime_nextline() -+ */ -+#ifndef _NETFILTER_MIME_H -+#define _NETFILTER_MIME_H -+ -+/* Only include these functions for kernel code. */ -+#ifdef __KERNEL__ -+ -+#include -+ -+/* -+ * Given a buffer and length, advance to the next line and mark the current -+ * line. If the current line is empty, *plinelen will be set to zero. If -+ * not, it will be set to the actual line length (including CRLF). -+ * -+ * 'line' in this context means logical line (includes LWS continuations). -+ * Returns 1 on success, 0 on failure. -+ */ -+#ifdef NF_NEED_MIME_NEXTLINE -+static int -+nf_mime_nextline(char* p, uint len, uint* poff, uint* plineoff, uint* plinelen) -+{ -+ uint off = *poff; -+ uint physlen = 0; -+ int is_first_line = 1; -+ -+ if (off >= len) -+ { -+ return 0; -+ } -+ -+ do -+ { -+ while (p[off] != '\n') -+ { -+ if (len-off <= 1) -+ { -+ return 0; -+ } -+ -+ physlen++; -+ off++; -+ } -+ -+ /* if we saw a crlf, physlen needs adjusted */ -+ if (physlen > 0 && p[off] == '\n' && p[off-1] == '\r') -+ { -+ physlen--; -+ } -+ -+ /* advance past the newline */ -+ off++; -+ -+ /* check for an empty line */ -+ if (physlen == 0) -+ { -+ break; -+ } -+ -+ /* check for colon on the first physical line */ -+ if (is_first_line) -+ { -+ is_first_line = 0; -+ if (memchr(p+(*poff), ':', physlen) == NULL) -+ { -+ return 0; -+ } -+ } -+ } -+ while (p[off] == ' ' || p[off] == '\t'); -+ -+ *plineoff = *poff; -+ *plinelen = (physlen == 0) ? 0 : (off - *poff); -+ *poff = off; -+ -+ return 1; -+} -+#endif /* NF_NEED_MIME_NEXTLINE */ -+ -+#endif /* __KERNEL__ */ -+ -+#endif /* _NETFILTER_MIME_H */ ---- /dev/null -+++ b/extensions/rtsp/nf_conntrack_rtsp.c -@@ -0,0 +1,576 @@ -+/* -+ * RTSP extension for IP connection tracking -+ * (C) 2003 by Tom Marshall -+ * -+ * 2005-02-13: Harald Welte -+ * - port to 2.6 -+ * - update to recent post-2.6.11 api changes -+ * 2006-09-14: Steven Van Acker -+ * - removed calls to NAT code from conntrack helper: NAT no longer needed to use rtsp-conntrack -+ * 2007-04-18: Michael Guntsche -+ * - Port to new NF API -+ * 2013-03-04: Il'inykh Sergey . Inango Systems Ltd -+ * - fixed rtcp nat mapping and other port mapping fixes -+ * - simple TEARDOWN request handling -+ * - codestyle fixes and other less significant bug fixes -+ * -+ * based on ip_conntrack_irc.c -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Module load syntax: -+ * insmod nf_conntrack_rtsp.o ports=port1,port2,...port -+ * max_outstanding=n setup_timeout=secs -+ * -+ * If no ports are specified, the default will be port 554. -+ * -+ * With max_outstanding you can define the maximum number of not yet -+ * answered SETUP requests per RTSP session (default 8). -+ * With setup_timeout you can specify how long the system waits for -+ * an expected data channel (default 300 seconds). -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include "nf_conntrack_rtsp.h" -+ -+#define NF_NEED_STRNCASECMP -+#define NF_NEED_STRTOU16 -+#define NF_NEED_STRTOU32 -+#define NF_NEED_NEXTLINE -+#include "netfilter_helpers.h" -+#define NF_NEED_MIME_NEXTLINE -+#include "netfilter_mime.h" -+ -+#include -+ -+#define MAX_PORTS 8 -+static int ports[MAX_PORTS]; -+static int num_ports = 0; -+static int max_outstanding = 8; -+static unsigned int setup_timeout = 300; -+ -+MODULE_AUTHOR("Tom Marshall "); -+MODULE_DESCRIPTION("RTSP connection tracking module"); -+MODULE_LICENSE("GPL"); -+module_param_array(ports, int, &num_ports, 0400); -+MODULE_PARM_DESC(ports, "port numbers of RTSP servers"); -+module_param(max_outstanding, int, 0400); -+MODULE_PARM_DESC(max_outstanding, "max number of outstanding SETUP requests per RTSP session"); -+module_param(setup_timeout, int, 0400); -+MODULE_PARM_DESC(setup_timeout, "timeout on for unestablished data channels"); -+ -+static char *rtsp_buffer; -+static DEFINE_SPINLOCK(rtsp_buffer_lock); -+ -+static struct nf_conntrack_expect_policy rtsp_exp_policy; -+ -+unsigned int (*nf_nat_rtsp_hook)(struct sk_buff *skb, -+ enum ip_conntrack_info ctinfo, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ unsigned int protoff, -+#endif -+ unsigned int matchoff, unsigned int matchlen, -+ struct ip_ct_rtsp_expect* prtspexp, -+ struct nf_conntrack_expect *rtp_exp, -+ struct nf_conntrack_expect *rtcp_exp); -+ -+EXPORT_SYMBOL_GPL(nf_nat_rtsp_hook); -+ -+/* -+ * Max mappings we will allow for one RTSP connection (for RTP, the number -+ * of allocated ports is twice this value). Note that SMIL burns a lot of -+ * ports so keep this reasonably high. If this is too low, you will see a -+ * lot of "no free client map entries" messages. -+ */ -+#define MAX_PORT_MAPS 16 -+ -+/*** default port list was here in the masq code: 554, 3030, 4040 ***/ -+ -+#define SKIP_WSPACE(ptr,len,off) while(off < len && isspace(*(ptr+off))) { off++; } -+ -+/* -+ * Parse an RTSP packet. -+ * -+ * Returns zero if parsing failed. -+ * -+ * Parameters: -+ * IN ptcp tcp data pointer -+ * IN tcplen tcp data len -+ * IN/OUT ptcpoff points to current tcp offset -+ * OUT phdrsoff set to offset of rtsp headers -+ * OUT phdrslen set to length of rtsp headers -+ * OUT pcseqoff set to offset of CSeq header -+ * OUT pcseqlen set to length of CSeq header -+ */ -+static int -+rtsp_parse_message(char* ptcp, uint tcplen, uint* ptcpoff, -+ uint* phdrsoff, uint* phdrslen, -+ uint* pcseqoff, uint* pcseqlen, -+ uint* transoff, uint* translen) -+{ -+ uint entitylen = 0; -+ uint lineoff; -+ uint linelen; -+ -+ if (!nf_nextline(ptcp, tcplen, ptcpoff, &lineoff, &linelen)) -+ return 0; -+ -+ *phdrsoff = *ptcpoff; -+ while (nf_mime_nextline(ptcp, tcplen, ptcpoff, &lineoff, &linelen)) { -+ if (linelen == 0) { -+ if (entitylen > 0) -+ *ptcpoff += min(entitylen, tcplen - *ptcpoff); -+ break; -+ } -+ if (lineoff+linelen > tcplen) { -+ pr_info("!! overrun !!\n"); -+ break; -+ } -+ -+ if (nf_strncasecmp(ptcp+lineoff, "CSeq:", 5) == 0) { -+ *pcseqoff = lineoff; -+ *pcseqlen = linelen; -+ } -+ -+ if (nf_strncasecmp(ptcp+lineoff, "Transport:", 10) == 0) { -+ *transoff = lineoff; -+ *translen = linelen; -+ } -+ -+ if (nf_strncasecmp(ptcp+lineoff, "Content-Length:", 15) == 0) { -+ uint off = lineoff+15; -+ SKIP_WSPACE(ptcp+lineoff, linelen, off); -+ nf_strtou32(ptcp+off, &entitylen); -+ } -+ } -+ *phdrslen = (*ptcpoff) - (*phdrsoff); -+ -+ return 1; -+} -+ -+/* -+ * Find lo/hi client ports (if any) in transport header -+ * In: -+ * ptcp, tcplen = packet -+ * tranoff, tranlen = buffer to search -+ * -+ * Out: -+ * pport_lo, pport_hi = lo/hi ports (host endian) -+ * -+ * Returns nonzero if any client ports found -+ * -+ * Note: it is valid (and expected) for the client to request multiple -+ * transports, so we need to parse the entire line. -+ */ -+static int -+rtsp_parse_transport(char* ptran, uint tranlen, -+ struct ip_ct_rtsp_expect* prtspexp) -+{ -+ int rc = 0; -+ uint off = 0; -+ -+ if (tranlen < 10 || !iseol(ptran[tranlen-1]) || -+ nf_strncasecmp(ptran, "Transport:", 10) != 0) { -+ pr_info("sanity check failed\n"); -+ return 0; -+ } -+ -+ pr_debug("tran='%.*s'\n", (int)tranlen, ptran); -+ off += 10; -+ SKIP_WSPACE(ptran, tranlen, off); -+ -+ /* Transport: tran;field;field=val,tran;field;field=val,... */ -+ while (off < tranlen) { -+ const char* pparamend; -+ uint nextparamoff; -+ -+ pparamend = memchr(ptran+off, ',', tranlen-off); -+ pparamend = (pparamend == NULL) ? ptran+tranlen : pparamend+1; -+ nextparamoff = pparamend-ptran; -+ -+ while (off < nextparamoff) { -+ const char* pfieldend; -+ uint nextfieldoff; -+ -+ pfieldend = memchr(ptran+off, ';', nextparamoff-off); -+ nextfieldoff = (pfieldend == NULL) ? nextparamoff : pfieldend-ptran+1; -+ -+ if (strncmp(ptran+off, "client_port=", 12) == 0) { -+ u_int16_t port; -+ uint numlen; -+ -+ off += 12; -+ numlen = nf_strtou16(ptran+off, &port); -+ off += numlen; -+ if (prtspexp->loport != 0 && prtspexp->loport != port) -+ pr_debug("multiple ports found, port %hu ignored\n", port); -+ else { -+ pr_debug("lo port found : %hu\n", port); -+ prtspexp->loport = prtspexp->hiport = port; -+ if (ptran[off] == '-') { -+ off++; -+ numlen = nf_strtou16(ptran+off, &port); -+ off += numlen; -+ prtspexp->pbtype = pb_range; -+ prtspexp->hiport = port; -+ -+ // If we have a range, assume rtp: -+ // loport must be even, hiport must be loport+1 -+ if ((prtspexp->loport & 0x0001) != 0 || -+ prtspexp->hiport != prtspexp->loport+1) { -+ pr_debug("incorrect range: %hu-%hu, correcting\n", -+ prtspexp->loport, prtspexp->hiport); -+ prtspexp->loport &= 0xfffe; -+ prtspexp->hiport = prtspexp->loport+1; -+ } -+ } else if (ptran[off] == '/') { -+ off++; -+ numlen = nf_strtou16(ptran+off, &port); -+ off += numlen; -+ prtspexp->pbtype = pb_discon; -+ prtspexp->hiport = port; -+ } -+ rc = 1; -+ } -+ } -+ -+ /* -+ * Note we don't look for the destination parameter here. -+ * If we are using NAT, the NAT module will handle it. If not, -+ * and the client is sending packets elsewhere, the expectation -+ * will quietly time out. -+ */ -+ -+ off = nextfieldoff; -+ } -+ -+ off = nextparamoff; -+ } -+ -+ return rc; -+} -+ -+ -+/*** conntrack functions ***/ -+ -+/* outbound packet: client->server */ -+ -+static inline int -+help_out(struct sk_buff *skb, unsigned char *rb_ptr, unsigned int datalen, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ struct nf_conn *ct, enum ip_conntrack_info ctinfo, -+ unsigned int protoff) -+#else -+ struct nf_conn *ct, enum ip_conntrack_info ctinfo) -+#endif -+{ -+ struct ip_ct_rtsp_expect expinfo; -+ -+ int dir = CTINFO2DIR(ctinfo); /* = IP_CT_DIR_ORIGINAL */ -+ //struct tcphdr* tcph = (void*)iph + iph->ihl * 4; -+ //uint tcplen = pktlen - iph->ihl * 4; -+ char* pdata = rb_ptr; -+ //uint datalen = tcplen - tcph->doff * 4; -+ uint dataoff = 0; -+ int ret = NF_ACCEPT; -+ -+ struct nf_conntrack_expect *rtp_exp; -+ struct nf_conntrack_expect *rtcp_exp = NULL; -+ -+ __be16 be_loport; -+ __be16 be_hiport; -+ -+ typeof(nf_nat_rtsp_hook) nf_nat_rtsp; -+ -+ memset(&expinfo, 0, sizeof(expinfo)); -+ -+ while (dataoff < datalen) { -+ uint cmdoff = dataoff; -+ uint hdrsoff = 0; -+ uint hdrslen = 0; -+ uint cseqoff = 0; -+ uint cseqlen = 0; -+ uint transoff = 0; -+ uint translen = 0; -+ uint off; -+ -+ if (!rtsp_parse_message(pdata, datalen, &dataoff, -+ &hdrsoff, &hdrslen, -+ &cseqoff, &cseqlen, -+ &transoff, &translen)) -+ break; /* not a valid message */ -+ -+ if (strncmp(pdata+cmdoff, "TEARDOWN ", 9) == 0) { -+ pr_debug("teardown handled\n"); -+ nf_ct_remove_expectations(ct); /* FIXME must be session id aware */ -+ break; -+ } -+ -+ if (strncmp(pdata+cmdoff, "SETUP ", 6) != 0) -+ continue; /* not a SETUP message */ -+ -+ pr_debug("found a setup message\n"); -+ -+ off = 0; -+ if(translen) -+ rtsp_parse_transport(pdata+transoff, translen, &expinfo); -+ -+ if (expinfo.loport == 0) { -+ pr_debug("no udp transports found\n"); -+ continue; /* no udp transports found */ -+ } -+ -+ pr_debug("udp transport found, ports=(%d,%hu,%hu)\n", -+ (int)expinfo.pbtype, expinfo.loport, expinfo.hiport); -+ -+ -+ be_loport = htons(expinfo.loport); -+ -+ rtp_exp = nf_ct_expect_alloc(ct); -+ if (rtp_exp == NULL) { -+ ret = NF_DROP; -+ goto out; -+ } -+ -+ nf_ct_expect_init(rtp_exp, NF_CT_EXPECT_CLASS_DEFAULT, -+ nf_ct_l3num(ct), -+ NULL, /* &ct->tuplehash[!dir].tuple.src.u3, */ -+ &ct->tuplehash[!dir].tuple.dst.u3, -+ IPPROTO_UDP, NULL, &be_loport); -+ -+ rtp_exp->flags = 0; -+ -+ if (expinfo.pbtype == pb_range) { -+ pr_debug("setup expectation for rtcp\n"); -+ -+ be_hiport = htons(expinfo.hiport); -+ rtcp_exp = nf_ct_expect_alloc(ct); -+ if (rtcp_exp == NULL) { -+ ret = NF_DROP; -+ goto out1; -+ } -+ -+ nf_ct_expect_init(rtcp_exp, NF_CT_EXPECT_CLASS_DEFAULT, -+ nf_ct_l3num(ct), -+ NULL, /* &ct->tuplehash[!dir].tuple.src.u3, */ -+ &ct->tuplehash[!dir].tuple.dst.u3, -+ IPPROTO_UDP, NULL, &be_hiport); -+ -+ rtcp_exp->flags = 0; -+ -+ pr_debug("expect_related %pI4:%u-%u-%pI4:%u-%u\n", -+ &rtp_exp->tuple.src.u3.ip, -+ ntohs(rtp_exp->tuple.src.u.udp.port), -+ ntohs(rtcp_exp->tuple.src.u.udp.port), -+ &rtp_exp->tuple.dst.u3.ip, -+ ntohs(rtp_exp->tuple.dst.u.udp.port), -+ ntohs(rtcp_exp->tuple.dst.u.udp.port)); -+ } else { -+ pr_debug("expect_related %pI4:%u-%pI4:%u\n", -+ &rtp_exp->tuple.src.u3.ip, -+ ntohs(rtp_exp->tuple.src.u.udp.port), -+ &rtp_exp->tuple.dst.u3.ip, -+ ntohs(rtp_exp->tuple.dst.u.udp.port)); -+ } -+ -+ nf_nat_rtsp = rcu_dereference(nf_nat_rtsp_hook); -+ if (nf_nat_rtsp && ct->status & IPS_NAT_MASK) -+ /* pass the request off to the nat helper */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ ret = nf_nat_rtsp(skb, ctinfo, protoff, hdrsoff, hdrslen, -+ &expinfo, rtp_exp, rtcp_exp); -+#else -+ ret = nf_nat_rtsp(skb, ctinfo, hdrsoff, hdrslen, -+ &expinfo, rtp_exp, rtcp_exp); -+#endif -+ else { -+ if (nf_ct_expect_related(rtp_exp) == 0) { -+ if (rtcp_exp && nf_ct_expect_related(rtcp_exp) != 0) { -+ nf_ct_unexpect_related(rtp_exp); -+ pr_info("nf_conntrack_expect_related failed for rtcp\n"); -+ ret = NF_DROP; -+ } -+ } else { -+ pr_info("nf_conntrack_expect_related failed for rtp\n"); -+ ret = NF_DROP; -+ } -+ } -+ if (rtcp_exp) { -+ nf_ct_expect_put(rtcp_exp); -+ } -+out1: -+ nf_ct_expect_put(rtp_exp); -+ goto out; -+ } -+out: -+ -+ return ret; -+} -+ -+ -+static inline int -+help_in(struct sk_buff *skb, size_t pktlen, -+ struct nf_conn* ct, enum ip_conntrack_info ctinfo) -+{ -+ return NF_ACCEPT; -+} -+ -+static int help(struct sk_buff *skb, unsigned int protoff, -+ struct nf_conn *ct, enum ip_conntrack_info ctinfo) -+{ -+ struct tcphdr _tcph, *th; -+ unsigned int dataoff, datalen; -+ char *rb_ptr; -+ int ret = NF_DROP; -+ -+ /* Until there's been traffic both ways, don't look in packets. */ -+ if (ctinfo != IP_CT_ESTABLISHED && -+ ctinfo != IP_CT_ESTABLISHED + IP_CT_IS_REPLY) { -+ pr_debug("conntrackinfo = %u\n", ctinfo); -+ return NF_ACCEPT; -+ } -+ -+ /* Not whole TCP header? */ -+ th = skb_header_pointer(skb, protoff, sizeof(_tcph), &_tcph); -+ -+ if (!th) -+ return NF_ACCEPT; -+ -+ /* No data ? */ -+ dataoff = protoff + th->doff*4; -+ datalen = skb->len - dataoff; -+ if (dataoff >= skb->len) -+ return NF_ACCEPT; -+ -+ spin_lock_bh(&rtsp_buffer_lock); -+ rb_ptr = skb_header_pointer(skb, dataoff, -+ skb->len - dataoff, rtsp_buffer); -+ BUG_ON(rb_ptr == NULL); -+ -+#if 0 -+ /* Checksum invalid? Ignore. */ -+ /* FIXME: Source route IP option packets --RR */ -+ if (tcp_v4_check(tcph, tcplen, iph->saddr, iph->daddr, -+ csum_partial((char*)tcph, tcplen, 0))) -+ { -+ DEBUGP("bad csum: %p %u %u.%u.%u.%u %u.%u.%u.%u\n", -+ tcph, tcplen, NIPQUAD(iph->saddr), NIPQUAD(iph->daddr)); -+ return NF_ACCEPT; -+ } -+#endif -+ -+ switch (CTINFO2DIR(ctinfo)) { -+ case IP_CT_DIR_ORIGINAL: -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ ret = help_out(skb, rb_ptr, datalen, ct, ctinfo, protoff); -+#else -+ ret = help_out(skb, rb_ptr, datalen, ct, ctinfo); -+#endif -+ break; -+ case IP_CT_DIR_REPLY: -+ pr_debug("IP_CT_DIR_REPLY\n"); -+ /* inbound packet: server->client */ -+ ret = NF_ACCEPT; -+ break; -+ } -+ -+ spin_unlock_bh(&rtsp_buffer_lock); -+ -+ return ret; -+} -+ -+static struct nf_conntrack_helper rtsp_helpers[MAX_PORTS]; -+static char rtsp_names[MAX_PORTS][10]; -+ -+/* This function is intentionally _NOT_ defined as __exit */ -+static void -+fini(void) -+{ -+ int i; -+ for (i = 0; i < num_ports; i++) { -+ pr_debug("unregistering port %d\n", ports[i]); -+ nf_conntrack_helper_unregister(&rtsp_helpers[i]); -+ } -+ kfree(rtsp_buffer); -+} -+ -+static int __init -+init(void) -+{ -+ int i, ret; -+ struct nf_conntrack_helper *hlpr; -+ char *tmpname; -+ -+ printk("nf_conntrack_rtsp v" IP_NF_RTSP_VERSION " loading\n"); -+ -+ if (max_outstanding < 1) { -+ printk("nf_conntrack_rtsp: max_outstanding must be a positive integer\n"); -+ return -EBUSY; -+ } -+ if (setup_timeout < 0) { -+ printk("nf_conntrack_rtsp: setup_timeout must be a positive integer\n"); -+ return -EBUSY; -+ } -+ -+ rtsp_exp_policy.max_expected = max_outstanding; -+ rtsp_exp_policy.timeout = setup_timeout; -+ -+ rtsp_buffer = kmalloc(65536, GFP_KERNEL); -+ if (!rtsp_buffer) -+ return -ENOMEM; -+ -+ /* If no port given, default to standard rtsp port */ -+ if (ports[0] == 0) { -+ ports[0] = RTSP_PORT; -+ num_ports = 1; -+ } -+ -+ for (i = 0; (i < MAX_PORTS) && ports[i]; i++) { -+ hlpr = &rtsp_helpers[i]; -+ memset(hlpr, 0, sizeof(struct nf_conntrack_helper)); -+ hlpr->tuple.src.l3num = AF_INET; -+ hlpr->tuple.src.u.tcp.port = htons(ports[i]); -+ hlpr->tuple.dst.protonum = IPPROTO_TCP; -+ hlpr->expect_policy = &rtsp_exp_policy; -+ hlpr->me = THIS_MODULE; -+ hlpr->help = help; -+ -+ tmpname = &rtsp_names[i][0]; -+ if (ports[i] == RTSP_PORT) { -+ sprintf(tmpname, "rtsp"); -+ } else { -+ sprintf(tmpname, "rtsp-%d", i); -+ } -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) -+ strlcpy(hlpr->name, tmpname, sizeof(hlpr->name)); -+#else -+ hlpr->name = tmpname; -+#endif -+ pr_debug("port #%d: %d\n", i, ports[i]); -+ -+ ret = nf_conntrack_helper_register(hlpr); -+ -+ if (ret) { -+ printk("nf_conntrack_rtsp: ERROR registering port %d\n", ports[i]); -+ fini(); -+ return -EBUSY; -+ } -+ } -+ return 0; -+} -+ -+module_init(init); -+module_exit(fini); ---- /dev/null -+++ b/extensions/rtsp/nf_conntrack_rtsp.h -@@ -0,0 +1,72 @@ -+/* -+ * RTSP extension for IP connection tracking. -+ * (C) 2003 by Tom Marshall -+ * based on ip_conntrack_irc.h -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * 2013-03-04: Il'inykh Sergey . Inango Systems Ltd -+ * - conditional compilation for kernel 3.7 -+ * - port mapping improvements -+*/ -+#ifndef _IP_CONNTRACK_RTSP_H -+#define _IP_CONNTRACK_RTSP_H -+ -+#include -+ -+//#define IP_NF_RTSP_DEBUG 1 -+#define IP_NF_RTSP_VERSION "0.7" -+ -+#ifdef __KERNEL__ -+/* port block types */ -+typedef enum { -+ pb_single, /* client_port=x */ -+ pb_range, /* client_port=x-y */ -+ pb_discon /* client_port=x/y (rtspbis) */ -+} portblock_t; -+ -+/* We record seq number and length of rtsp headers here, all in host order. */ -+ -+/* -+ * This structure is per expected connection. It is a member of struct -+ * ip_conntrack_expect. The TCP SEQ for the conntrack expect is stored -+ * there and we are expected to only store the length of the data which -+ * needs replaced. If a packet contains multiple RTSP messages, we create -+ * one expected connection per message. -+ * -+ * We use these variables to mark the entire header block. This may seem -+ * like overkill, but the nature of RTSP requires it. A header may appear -+ * multiple times in a message. We must treat two Transport headers the -+ * same as one Transport header with two entries. -+ */ -+struct ip_ct_rtsp_expect -+{ -+ u_int32_t len; /* length of header block */ -+ portblock_t pbtype; /* Type of port block that was requested */ -+ u_int16_t loport; /* Port that was requested, low or first */ -+ u_int16_t hiport; /* Port that was requested, high or second */ -+#if 0 -+ uint method; /* RTSP method */ -+ uint cseq; /* CSeq from request */ -+#endif -+}; -+ -+extern unsigned int (*nf_nat_rtsp_hook)(struct sk_buff *skb, -+ enum ip_conntrack_info ctinfo, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ unsigned int protoff, -+#endif -+ unsigned int matchoff, -+ unsigned int matchlen, -+ struct ip_ct_rtsp_expect *prtspexp, -+ struct nf_conntrack_expect *rtp_exp, -+ struct nf_conntrack_expect *rtcp_exp); -+ -+#define RTSP_PORT 554 -+ -+#endif /* __KERNEL__ */ -+ -+#endif /* _IP_CONNTRACK_RTSP_H */ ---- /dev/null -+++ b/extensions/rtsp/nf_nat_rtsp.c -@@ -0,0 +1,617 @@ -+/* -+ * RTSP extension for TCP NAT alteration -+ * (C) 2003 by Tom Marshall -+ * -+ * 2013-03-04: Il'inykh Sergey . Inango Systems Ltd -+ * - fixed rtcp nat mapping and other port mapping fixes -+ * - fixed system hard lock because of bug in the parser -+ * - codestyle fixes and less significant fixes -+ * -+ * based on ip_nat_irc.c -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ * -+ * Module load syntax: -+ * insmod nf_nat_rtsp.o ports=port1,port2,...port -+ * stunaddr=
-+ * destaction=[auto|strip|none] -+ * -+ * If no ports are specified, the default will be port 554 only. -+ * -+ * stunaddr specifies the address used to detect that a client is using STUN. -+ * If this address is seen in the destination parameter, it is assumed that -+ * the client has already punched a UDP hole in the firewall, so we don't -+ * mangle the client_port. If none is specified, it is autodetected. It -+ * only needs to be set if you have multiple levels of NAT. It should be -+ * set to the external address that the STUN clients detect. Note that in -+ * this case, it will not be possible for clients to use UDP with servers -+ * between the NATs. -+ * -+ * If no destaction is specified, auto is used. -+ * destaction=auto: strip destination parameter if it is not stunaddr. -+ * destaction=strip: always strip destination parameter (not recommended). -+ * destaction=none: do not touch destination parameter (not recommended). -+ */ -+ -+#include -+#include -+#include -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+# include -+#else -+# include -+#endif -+#include -+#include "nf_conntrack_rtsp.h" -+#include -+ -+#include -+#include -+#define NF_NEED_STRNCASECMP -+#define NF_NEED_STRTOU16 -+#include "netfilter_helpers.h" -+#define NF_NEED_MIME_NEXTLINE -+#include "netfilter_mime.h" -+ -+#define MAX_PORTS 8 -+#define DSTACT_AUTO 0 -+#define DSTACT_STRIP 1 -+#define DSTACT_NONE 2 -+ -+static char* stunaddr = NULL; -+static char* destaction = NULL; -+ -+static u_int32_t extip = 0; -+static int dstact = 0; -+ -+static void nf_nat_rtsp_expected(struct nf_conn* ct, struct nf_conntrack_expect *exp); -+ -+MODULE_AUTHOR("Tom Marshall "); -+MODULE_DESCRIPTION("RTSP network address translation module"); -+MODULE_LICENSE("GPL"); -+module_param(stunaddr, charp, 0644); -+MODULE_PARM_DESC(stunaddr, "Address for detecting STUN"); -+module_param(destaction, charp, 0644); -+MODULE_PARM_DESC(destaction, "Action for destination parameter (auto/strip/none)"); -+ -+#define SKIP_WSPACE(ptr,len,off) while(off < len && isspace(*(ptr+off))) { off++; } -+ -+/*** helper functions ***/ -+ -+static void -+get_skb_tcpdata(struct sk_buff* skb, char** pptcpdata, uint* ptcpdatalen) -+{ -+ struct iphdr* iph = ip_hdr(skb); -+ struct tcphdr* tcph = (void *)iph + ip_hdrlen(skb); -+ -+ *pptcpdata = (char*)tcph + tcph->doff*4; -+ *ptcpdatalen = ((char*)skb_transport_header(skb) + skb->len) - *pptcpdata; -+} -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+/* copy of sip_sprintf_addr */ -+static int rtsp_sprintf_addr(const struct nf_conn *ct, char *buffer, -+ const union nf_inet_addr *addr, bool delim) -+{ -+ if (nf_ct_l3num(ct) == NFPROTO_IPV4) { -+ return sprintf(buffer, "%pI4", &addr->ip); -+ } else { -+ if (delim) -+ return sprintf(buffer, "[%pI6c]", &addr->ip6); -+ else -+ return sprintf(buffer, "%pI6c", &addr->ip6); -+ } -+} -+#endif -+ -+/*** nat functions ***/ -+ -+/* -+ * Mangle the "Transport:" header: -+ * - Replace all occurences of "client_port=" -+ * - Handle destination parameter -+ * -+ * In: -+ * ct, ctinfo = conntrack context -+ * skb = packet -+ * tranoff = Transport header offset from TCP data -+ * tranlen = Transport header length (incl. CRLF) -+ * rport_lo = replacement low port (host endian) -+ * rport_hi = replacement high port (host endian) -+ * -+ * Returns packet size difference. -+ * -+ * Assumes that a complete transport header is present, ending with CR or LF -+ */ -+static int -+rtsp_mangle_tran(enum ip_conntrack_info ctinfo, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ unsigned int protoff, -+#endif -+ struct nf_conntrack_expect* rtp_exp, -+ struct nf_conntrack_expect* rtcp_exp, -+ struct ip_ct_rtsp_expect* prtspexp, -+ struct sk_buff* skb, uint tranoff, uint tranlen) -+{ -+ char* ptcp; -+ uint tcplen; -+ char* ptran; -+ char rbuf1[16]; /* Replacement buffer (one port) */ -+ uint rbuf1len; /* Replacement len (one port) */ -+ char rbufa[16]; /* Replacement buffer (all ports) */ -+ uint rbufalen; /* Replacement len (all ports) */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ union nf_inet_addr newip; -+#else -+ u_int32_t newip; -+#endif -+ u_int16_t loport, hiport; -+ uint off = 0; -+ uint diff; /* Number of bytes we removed */ -+ -+ struct nf_conn *ct = rtp_exp->master; -+ /* struct nf_conn *ct = nf_ct_get(skb, &ctinfo); */ -+ struct nf_conntrack_tuple *rtp_t; -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ char szextaddr[INET6_ADDRSTRLEN]; -+#else -+ char szextaddr[INET_ADDRSTRLEN]; -+#endif -+ uint extaddrlen; -+ int is_stun; -+ -+ get_skb_tcpdata(skb, &ptcp, &tcplen); -+ ptran = ptcp+tranoff; -+ -+ if (tranoff+tranlen > tcplen || tcplen-tranoff < tranlen || -+ tranlen < 10 || !iseol(ptran[tranlen-1]) || -+ nf_strncasecmp(ptran, "Transport:", 10) != 0) { -+ pr_info("sanity check failed\n"); -+ return 0; -+ } -+ off += 10; -+ SKIP_WSPACE(ptcp+tranoff, tranlen, off); -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ newip = ct->tuplehash[IP_CT_DIR_REPLY].tuple.dst.u3; -+ rtp_t = &rtp_exp->tuple; -+ rtp_t->dst.u3 = newip; -+ if (rtcp_exp) { -+ rtcp_exp->tuple.dst.u3 = newip; -+ } -+ extaddrlen = rtsp_sprintf_addr(ct, szextaddr, &newip, true); // FIXME handle extip -+ pr_debug("stunaddr=%s (auto)\n", szextaddr); -+#else -+ newip = ct->tuplehash[IP_CT_DIR_REPLY].tuple.dst.u3.ip; -+ rtp_t = &rtp_exp->tuple; -+ rtp_t->dst.u3.ip = newip; -+ if (rtcp_exp) { -+ rtcp_exp->tuple.dst.u3.ip = newip; -+ } -+ extaddrlen = extip ? sprintf(szextaddr, "%pI4", &extip) -+ : sprintf(szextaddr, "%pI4", &newip); -+ pr_debug("stunaddr=%s (%s)\n", szextaddr, (extip?"forced":"auto")); -+#endif -+ hiport = 0; -+ rbuf1len = rbufalen = 0; -+ switch (prtspexp->pbtype) { -+ case pb_single: -+ for (loport = prtspexp->loport; loport != 0; loport++) { /* XXX: improper wrap? */ -+ rtp_t->dst.u.udp.port = htons(loport); -+ if (nf_ct_expect_related(rtp_exp) == 0) { -+ pr_debug("using port %hu\n", loport); -+ break; -+ } -+ } -+ if (loport != 0) { -+ rbuf1len = sprintf(rbuf1, "%hu", loport); -+ rbufalen = sprintf(rbufa, "%hu", loport); -+ } -+ break; -+ case pb_range: -+ for (loport = prtspexp->loport; loport != 0; loport += 2) { /* XXX: improper wrap? */ -+ rtp_t->dst.u.udp.port = htons(loport); -+ if (nf_ct_expect_related(rtp_exp) != 0) { -+ continue; -+ } -+ hiport = loport + 1; -+ rtcp_exp->tuple.dst.u.udp.port = htons(hiport); -+ if (nf_ct_expect_related(rtcp_exp) != 0) { -+ nf_ct_unexpect_related(rtp_exp); -+ continue; -+ } -+ -+ /* FIXME: invalid print in case of ipv6 */ -+ pr_debug("nat expect_related %pI4:%u-%u-%pI4:%u-%u\n", -+ &rtp_exp->tuple.src.u3.ip, -+ ntohs(rtp_exp->tuple.src.u.udp.port), -+ ntohs(rtcp_exp->tuple.src.u.udp.port), -+ &rtp_exp->tuple.dst.u3.ip, -+ ntohs(rtp_exp->tuple.dst.u.udp.port), -+ ntohs(rtcp_exp->tuple.dst.u.udp.port)); -+ break; -+ } -+ if (loport != 0) { -+ rbuf1len = sprintf(rbuf1, "%hu", loport); -+ rbufalen = sprintf(rbufa, "%hu-%hu", loport, hiport); -+ } -+ break; -+ case pb_discon: -+ for (loport = prtspexp->loport; loport != 0; loport++) { /* XXX: improper wrap? */ -+ rtp_t->dst.u.udp.port = htons(loport); -+ if (nf_ct_expect_related(rtp_exp) == 0) { -+ pr_debug("using port %hu (1 of 2)\n", loport); -+ break; -+ } -+ } -+ for (hiport = prtspexp->hiport; hiport != 0; hiport++) { /* XXX: improper wrap? */ -+ rtp_t->dst.u.udp.port = htons(hiport); -+ if (nf_ct_expect_related(rtp_exp) == 0) { -+ pr_debug("using port %hu (2 of 2)\n", hiport); -+ break; -+ } -+ } -+ if (loport != 0 && hiport != 0) { -+ rbuf1len = sprintf(rbuf1, "%hu", loport); -+ rbufalen = sprintf(rbufa, hiport == loport+1 ? -+ "%hu-%hu":"%hu/%hu", loport, hiport); -+ } -+ break; -+ } -+ -+ if (rbuf1len == 0) -+ return 0; /* cannot get replacement port(s) */ -+ -+ /* Transport: tran;field;field=val,tran;field;field=val,... -+ `off` is set to the start of Transport value from start of line -+ */ -+ while (off < tranlen) { -+ uint saveoff; -+ const char* pparamend; -+ uint nextparamoff; -+ -+ pparamend = memchr(ptran+off, ',', tranlen-off); -+ pparamend = (pparamend == NULL) ? ptran+tranlen : pparamend+1; -+ nextparamoff = pparamend-ptran; -+ -+ /* -+ * We pass over each param twice. On the first pass, we look for a -+ * destination= field. It is handled by the security policy. If it -+ * is present, allowed, and equal to our external address, we assume -+ * that STUN is being used and we leave the client_port= field alone. -+ */ -+ is_stun = 0; -+ saveoff = off; -+ while (off < nextparamoff) { -+ const char* pfieldend; -+ uint nextfieldoff; -+ -+ pfieldend = memchr(ptran+off, ';', nextparamoff-off); -+ nextfieldoff = (pfieldend == NULL) ? nextparamoff : pfieldend-ptran+1; -+ -+ if (dstact != DSTACT_NONE && strncmp(ptran+off, "destination=", 12) == 0) { -+ if (strncmp(ptran+off+12, szextaddr, extaddrlen) == 0) -+ is_stun = 1; -+ -+ if (dstact == DSTACT_STRIP || (dstact == DSTACT_AUTO && !is_stun)) { -+ uint dstoff = (ptran-ptcp)+off; -+ uint dstlen = nextfieldoff-off; -+ char* pdstrep = NULL; -+ uint dstreplen = 0; -+ diff = dstlen; -+ if (dstact == DSTACT_AUTO && !is_stun) { -+ pr_debug("RTSP: replace dst addr\n"); -+ dstoff += 12; -+ dstlen -= 13; -+ pdstrep = szextaddr; -+ dstreplen = extaddrlen; -+ diff = nextfieldoff-off-13-extaddrlen; -+ } -+ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ if (!nf_nat_mangle_tcp_packet(skb, ct, ctinfo, protoff, -+ dstoff, dstlen, pdstrep, dstreplen)) { -+#else -+ if (!nf_nat_mangle_tcp_packet(skb, ct, ctinfo, -+ dstoff, dstlen, pdstrep, dstreplen)) { -+#endif -+ /* mangle failed, all we can do is bail */ -+ nf_ct_unexpect_related(rtp_exp); -+ if (rtcp_exp) -+ nf_ct_unexpect_related(rtcp_exp); -+ return 0; -+ } -+ get_skb_tcpdata(skb, &ptcp, &tcplen); -+ ptran = ptcp+tranoff; -+ tranlen -= diff; -+ nextparamoff -= diff; -+ nextfieldoff -= diff; -+ } -+ } -+ -+ off = nextfieldoff; -+ } -+ -+ if (is_stun) -+ continue; -+ -+ off = saveoff; -+ while (off < nextparamoff) { -+ const char* pfieldend; -+ uint nextfieldoff; -+ -+ pfieldend = memchr(ptran+off, ';', nextparamoff-off); -+ nextfieldoff = (pfieldend == NULL) ? nextparamoff : pfieldend-ptran+1; -+ -+ if (strncmp(ptran+off, "client_port=", 12) == 0) { -+ u_int16_t port; -+ uint numlen; -+ uint origoff; -+ uint origlen; -+ char* rbuf = rbuf1; -+ uint rbuflen = rbuf1len; -+ -+ off += 12; -+ origoff = (ptran-ptcp)+off; -+ origlen = 0; -+ numlen = nf_strtou16(ptran+off, &port); -+ off += numlen; -+ origlen += numlen; -+ if (port != prtspexp->loport) { -+ pr_debug("multiple ports found, port %hu ignored\n", port); -+ } else { -+ if (ptran[off] == '-' || ptran[off] == '/') { -+ off++; -+ origlen++; -+ numlen = nf_strtou16(ptran+off, &port); -+ off += numlen; -+ origlen += numlen; -+ rbuf = rbufa; -+ rbuflen = rbufalen; -+ } -+ -+ /* -+ * note we cannot just memcpy() if the sizes are the same. -+ * the mangle function does skb resizing, checks for a -+ * cloned skb, and updates the checksums. -+ * -+ * parameter 4 below is offset from start of tcp data. -+ */ -+ diff = origlen-rbuflen; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ if (!nf_nat_mangle_tcp_packet(skb, ct, ctinfo, protoff, -+ origoff, origlen, rbuf, rbuflen)) { -+#else -+ if (!nf_nat_mangle_tcp_packet(skb, ct, ctinfo, -+ origoff, origlen, rbuf, rbuflen)) { -+#endif -+ /* mangle failed, all we can do is bail */ -+ nf_ct_unexpect_related(rtp_exp); -+ if (rtcp_exp) -+ nf_ct_unexpect_related(rtcp_exp); -+ return 0; -+ } -+ get_skb_tcpdata(skb, &ptcp, &tcplen); -+ ptran = ptcp+tranoff; -+ tranlen -= diff; -+ nextparamoff -= diff; -+ nextfieldoff -= diff; -+ } -+ } -+ -+ off = nextfieldoff; -+ } -+ -+ off = nextparamoff; -+ } -+ -+ return 1; -+} -+ -+static uint -+help_out(struct sk_buff *skb, enum ip_conntrack_info ctinfo, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ unsigned int protoff, -+#endif -+ unsigned int matchoff, unsigned int matchlen, -+ struct ip_ct_rtsp_expect* prtspexp, -+ struct nf_conntrack_expect* rtp_exp, -+ struct nf_conntrack_expect* rtcp_exp) -+{ -+ char* ptcp; -+ uint tcplen; -+ uint hdrsoff; -+ uint hdrslen; -+ uint lineoff; -+ uint linelen; -+ uint off; -+ int dir = CTINFO2DIR(ctinfo); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ union nf_inet_addr saddr = rtp_exp->master->tuplehash[dir].tuple.src.u3; -+#else -+ __be32 saddr = rtp_exp->master->tuplehash[dir].tuple.src.u3.ip; -+#endif -+ -+ //struct iphdr* iph = (struct iphdr*)(*pskb)->nh.iph; -+ //struct tcphdr* tcph = (struct tcphdr*)((void*)iph + iph->ihl*4); -+ -+ get_skb_tcpdata(skb, &ptcp, &tcplen); -+ hdrsoff = matchoff;//exp->seq - ntohl(tcph->seq); -+ hdrslen = matchlen; -+ off = hdrsoff; -+ pr_debug("NAT rtsp help_out\n"); -+ -+ while (nf_mime_nextline(ptcp, hdrsoff+hdrslen, &off, &lineoff, &linelen)) { -+ if (linelen == 0) -+ break; -+ -+ if (off > hdrsoff+hdrslen) { -+ pr_info("!! overrun !!"); -+ break; -+ } -+ pr_debug("hdr: len=%u, %.*s", linelen, (int)linelen, ptcp+lineoff); -+ -+ if (nf_strncasecmp(ptcp+lineoff, "Transport:", 10) == 0) { -+ uint oldtcplen = tcplen; -+ pr_debug("hdr: Transport\n"); -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ if (!rtsp_mangle_tran(ctinfo, protoff, rtp_exp, rtcp_exp, -+ prtspexp, skb, lineoff, linelen)) { -+#else -+ if (!rtsp_mangle_tran(ctinfo, rtp_exp, rtcp_exp, prtspexp, -+ skb, lineoff, linelen)) { -+#endif -+ pr_debug("hdr: Transport mangle failed"); -+ break; -+ } -+ rtp_exp->expectfn = nf_nat_rtsp_expected; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ rtp_exp->saved_addr = saddr; -+#else -+ rtp_exp->saved_ip = saddr; -+#endif -+ rtp_exp->saved_proto.udp.port = htons(prtspexp->loport); -+ rtp_exp->dir = !dir; -+ if (rtcp_exp) { -+ rtcp_exp->expectfn = nf_nat_rtsp_expected; -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ rtcp_exp->saved_addr = saddr; -+#else -+ rtcp_exp->saved_ip = saddr; -+#endif -+ rtcp_exp->saved_proto.udp.port = htons(prtspexp->hiport); -+ rtcp_exp->dir = !dir; -+ } -+ get_skb_tcpdata(skb, &ptcp, &tcplen); -+ hdrslen -= (oldtcplen-tcplen); -+ off -= (oldtcplen-tcplen); -+ lineoff -= (oldtcplen-tcplen); -+ linelen -= (oldtcplen-tcplen); -+ pr_debug("rep: len=%u, %.*s", linelen, (int)linelen, ptcp+lineoff); -+ } -+ } -+ -+ return NF_ACCEPT; -+} -+ -+static unsigned int -+nf_nat_rtsp(struct sk_buff *skb, enum ip_conntrack_info ctinfo, -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ unsigned int protoff, -+#endif -+ unsigned int matchoff, unsigned int matchlen, -+ struct ip_ct_rtsp_expect* prtspexp, -+ struct nf_conntrack_expect* rtp_exp, -+ struct nf_conntrack_expect* rtcp_exp) -+{ -+ int dir = CTINFO2DIR(ctinfo); -+ int rc = NF_ACCEPT; -+ -+ switch (dir) { -+ case IP_CT_DIR_ORIGINAL: -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ rc = help_out(skb, ctinfo, protoff, matchoff, matchlen, prtspexp, -+ rtp_exp, rtcp_exp); -+#else -+ rc = help_out(skb, ctinfo, matchoff, matchlen, prtspexp, -+ rtp_exp, rtcp_exp); -+#endif -+ break; -+ case IP_CT_DIR_REPLY: -+ pr_debug("unmangle ! %u\n", ctinfo); -+ /* XXX: unmangle */ -+ rc = NF_ACCEPT; -+ break; -+ } -+ //UNLOCK_BH(&ip_rtsp_lock); -+ -+ return rc; -+} -+ -+static void nf_nat_rtsp_expected(struct nf_conn* ct, struct nf_conntrack_expect *exp) -+{ -+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) || LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ struct nf_nat_range range; -+#else -+ struct nf_nat_ipv4_range range; -+#endif -+ -+ /* This must be a fresh one. */ -+ BUG_ON(ct->status & IPS_NAT_DONE_MASK); -+ -+ /* For DST manip, map port here to where it's expected. */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ range.min_proto = range.max_proto = exp->saved_proto; -+ range.min_addr = range.max_addr = exp->saved_addr; -+#else -+ range.min = range.max = exp->saved_proto; -+ range.min_ip = range.max_ip = exp->saved_ip; -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0) -+ range.flags = (NF_NAT_RANGE_MAP_IPS | NF_NAT_RANGE_PROTO_SPECIFIED); -+ nf_nat_setup_info(ct, &range, NF_NAT_MANIP_DST); -+#else -+ range.flags = (IP_NAT_RANGE_MAP_IPS | IP_NAT_RANGE_PROTO_SPECIFIED); -+ nf_nat_setup_info(ct, &range, IP_NAT_MANIP_DST); -+#endif -+ -+ /* Change src to where master sends to, but only if the connection -+ * actually came from the same source. */ -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0) -+ if (nf_inet_addr_cmp(&ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.src.u3, -+ &ct->master->tuplehash[exp->dir].tuple.src.u3)) { -+ range.min_addr = range.max_addr -+ = ct->master->tuplehash[!exp->dir].tuple.dst.u3; -+#else -+ if (ct->tuplehash[IP_CT_DIR_ORIGINAL].tuple.src.u3.ip == -+ ct->master->tuplehash[exp->dir].tuple.src.u3.ip) { -+ range.min_ip = range.max_ip -+ = ct->master->tuplehash[!exp->dir].tuple.dst.u3.ip; -+#endif -+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,3,0) -+ range.flags = NF_NAT_RANGE_MAP_IPS; -+ nf_nat_setup_info(ct, &range, NF_NAT_MANIP_SRC); -+#else -+ range.flags = IP_NAT_RANGE_MAP_IPS; -+ nf_nat_setup_info(ct, &range, IP_NAT_MANIP_SRC); -+#endif -+ } -+} -+ -+ -+static void __exit fini(void) -+{ -+ rcu_assign_pointer(nf_nat_rtsp_hook, NULL); -+ synchronize_net(); -+} -+ -+static int __init init(void) -+{ -+ printk("nf_nat_rtsp v" IP_NF_RTSP_VERSION " loading\n"); -+ -+ BUG_ON(nf_nat_rtsp_hook); -+ rcu_assign_pointer(nf_nat_rtsp_hook, nf_nat_rtsp); -+ -+ if (stunaddr != NULL) -+ extip = in_aton(stunaddr); -+ -+ if (destaction != NULL) { -+ if (strcmp(destaction, "auto") == 0) -+ dstact = DSTACT_AUTO; -+ -+ if (strcmp(destaction, "strip") == 0) -+ dstact = DSTACT_STRIP; -+ -+ if (strcmp(destaction, "none") == 0) -+ dstact = DSTACT_NONE; -+ } -+ -+ return 0; -+} -+ -+module_init(init); -+module_exit(fini); ---- a/extensions/Kbuild -+++ b/extensions/Kbuild -@@ -26,6 +26,7 @@ obj-${build_lscan} += xt_lscan.o - obj-${build_pknock} += pknock/ - obj-${build_psd} += xt_psd.o - obj-${build_quota2} += xt_quota2.o -+obj-${build_rtsp} += rtsp/ - - -include ${M}/*.Kbuild - -include ${M}/Kbuild.* ---- a/mconfig -+++ b/mconfig -@@ -22,3 +22,4 @@ build_lscan=m - build_pknock=m - build_psd=m - build_quota2=m -+build_rtsp=m diff --git a/package/network/utils/xtables-addons/patches/200-add-lua-packetscript.patch b/package/network/utils/xtables-addons/patches/200-add-lua-packetscript.patch deleted file mode 100644 index 33d0d7481..000000000 --- a/package/network/utils/xtables-addons/patches/200-add-lua-packetscript.patch +++ /dev/null @@ -1,18158 +0,0 @@ ---- /dev/null -+++ b/extensions/LUA/byte_array.c -@@ -0,0 +1,145 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+#include "controller.h" -+ -+/* Initialization helper function. This function should be used whenever -+ * a new byte array need to be initialized. Depending on the arguments it -+ * initializes the array in a different way. Have a look at the inline -+ * comments */ -+lua_packet_segment * init_byte_array(lua_State *L, unsigned char * start, int length, int do_copy) -+{ -+ lua_packet_segment *array; -+ -+ if (length < 0) -+ luaL_error(L, "init_byte_array, requested size < 0"); -+ -+ if (start && do_copy) { -+ /* we have a start address where we copy from */ -+ array = lua_newuserdata(L, sizeof(lua_packet_segment) + length); -+ array->start = (unsigned char *)array + sizeof(lua_packet_segment); /* aligning pointer */ -+ memcpy(array->start, start, length); -+ }else if (start && !do_copy) { -+ /* just link the start pointer, in this case you have to free the memory yourself */ -+ array = lua_newuserdata(L, sizeof(lua_packet_segment)); -+ array->start = start; -+ }else{ -+ /* create an empty array, fully managed by Lua */ -+ array = lua_newuserdata(L, sizeof(lua_packet_segment) + length); -+ array->start = (unsigned char *)array + sizeof(lua_packet_segment); /* aligning pointer */ -+ memset(array->start, 0, length); -+ } -+ -+ array->length = length; -+ array->offset = 0; -+ array->changes = NULL; -+ -+ luaL_getmetatable(L, LUA_BYTE_ARRAY); -+ lua_setmetatable(L, -2); -+ -+ return array; -+} -+ -+ -+ -+/* LUA_API: get one byte of the given byte array -+ * access-pattern: array[] */ -+static int32_t get_byte_array(lua_State *L) -+{ -+ lua_packet_segment * array = checkbytearray(L, 1); -+ int32_t index = luaL_checkinteger(L, 2); /* array starts with index 0 (not 1 as usual in Lua) */ -+ -+ luaL_argcheck(L, 0 <= index && index < array->length, 1, "index out of range"); -+ lua_pushinteger(L, (array->start + array->offset)[index]); -+ -+ return 1; -+} -+ -+/* LUA_API: set one byte of the given byte array -+ * access-pattern: array[]= 0xFF */ -+static int32_t set_byte_array(lua_State *L) -+{ -+ lua_packet_segment * array = checkbytearray(L, 1); -+ uint8_t byte; -+ int32_t index = luaL_checkinteger(L, 2); /* array starts with index 0 (not 1 as usual in Lua) */ -+ int32_t val = luaL_checkinteger(L, 3); -+ uint32_t nob = 1 << CHAR_BIT; /* we should use something like 1 << CHAR_BIT */ -+ -+ luaL_argcheck(L, 0 <= index && index < array->length, 1, "index out of range"); -+ luaL_argcheck(L, 0 <= val && val < nob, 2, "cannot cast value to char"); -+ -+ byte = (uint8_t)val; -+ -+ (array->start + array->offset)[index] = byte; -+ -+ return 0; -+} -+ -+/* LUA_API: get size of the given byte array -+ * access-pattern: #array (__length meta-method) */ -+static int32_t get_byte_array_size(lua_State *L) -+{ -+ lua_packet_segment * array = checkbytearray(L, 1); -+ -+ lua_pushnumber(L, array->length); -+ -+ return 1; -+} -+ -+ -+/* LUA_API: converts a given byte array to a string. -+ * access-pattern: implicit through functions calling the -+ * __to_string() metamethod , e.g. print32_t */ -+static int32_t byte_array_to_string(lua_State *L) -+{ -+ lua_packet_segment * array = checkbytearray(L, 1); -+ uint8_t buf[(array->length * 3) + 255]; -+ uint8_t hexval[16] = { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f' }; -+ char res[255 + (array->length * 3)]; /* make sure the buffer is big enough*/ -+ int32_t i, n; -+ uint8_t *ptr = array->start + array->offset; -+ -+ for (i = 0; i < array->length; i++) { -+ buf[i * 3] = hexval[(ptr[i] >> 4) & 0xF]; -+ buf[(i * 3) + 1] = hexval[ptr[i] & 0x0F]; -+ buf[(i * 3) + 2] = ' '; /* seperator */ -+ } -+ -+ buf[array->length * 3] = '\0'; -+ n = sprintf(res, "byte_array: length: %d value: %s", array->length, buf); -+ -+ lua_pushlstring(L, res, n); -+ -+ return 1; -+} -+ -+static const struct luaL_Reg bytearray_lib_m [] = { -+ { "__len", get_byte_array_size }, -+ { "__newindex", set_byte_array }, -+ { "__index", get_byte_array }, -+ { "__tostring", byte_array_to_string }, -+ { NULL, NULL } -+}; -+ -+void luaopen_bytearraylib(lua_State *L) -+{ -+ luaL_newmetatable(L, LUA_BYTE_ARRAY); -+ luaL_register(L, NULL, bytearray_lib_m); -+ lua_pop(L, 1); -+} -+ -+ ---- /dev/null -+++ b/extensions/LUA/controller.c -@@ -0,0 +1,604 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#if defined(__KERNEL__) -+ #include -+#endif -+#include "controller.h" -+ -+/* the array 'supported_protocols' holds all pointers to the -+ * static and dynamic protocol buffers. It is filled by the -+ * call to register_protbuf */ -+static struct protocol_buf * supported_protocols[MAX_NR_OF_PROTOCOLS]; -+ -+/* C_API: the function 'get_protocol_buf' returns the pointer -+ * to the protocol buffer of a given protocol id. */ -+struct protocol_buf * get_protocol_buf(uint32_t protocol_id) -+{ -+ return (struct protocol_buf *)supported_protocols[protocol_id]; -+} -+ -+ -+/* LUA_INT: the function 'gc_packet_segment' is triggered by the -+ * garbage collector whenever a userdata annotated with one of -+ * the protocol buffer metatable should be collected. */ -+static int32_t gc_packet_segment(lua_State *L) -+{ -+ lua_packet_segment * seg = (lua_packet_segment *)lua_touserdata(L, 1); -+ if (seg && seg->changes) { -+ seg->changes->ref_count--; -+ if (seg->changes->ref_count <= 0) { -+ kfree(seg->changes->field_length_changes); -+ kfree(seg->changes->field_offset_changes); -+ kfree(seg->changes); -+ seg->changes = NULL; -+ } -+ } -+ return 0; -+} -+ -+ -+/* LUA_API: the function 'set_raw' is used to set the bytes of a segment -+ * in 'raw' mode. The function is per default available in each protocol -+ * buffer until it gets overridden by a specific setter function inside -+ * a protocol buffer. -+ * -+ * Parameters: -+ * 1. lua_packet_segment (implicit) -+ * 2. int32_t byte_value -+ * -+ * Upvalues: -+ * 1. struct protocol_buf* -+ * 2. int32_t field index, not used in this function -+ * -+ * Return: void -+ */ -+static int32_t set_raw(lua_State *L) -+{ -+ int32_t i; -+ uint32_t nob; -+ uint8_t byte; -+ uint8_t *ptr; -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ int32_t val = luaL_checkinteger(L, 2); -+ -+ nob = 1 << CHAR_BIT; -+ -+ luaL_argcheck(L, 0 <= val && val < nob, 2, "cannot cast value to char"); -+ -+ byte = (uint8_t)val; -+ ptr = seg->start + seg->offset; -+ -+ for (i = 0; i < seg->length; i++) -+ ptr[i] = byte; -+ -+ return 0; -+} -+ -+/* LUA_API: the function 'get_raw' is used to get the bytes of a segment -+ * in 'raw' mode. The function is per default available in each protocol -+ * buffer until it gets overridden by a specific getter function inside -+ * a protocol buffer. -+ * -+ * Parameters: -+ * 1. lua_packet_segment (implicit) -+ * 2. uint32_t offset -+ * 3. uint32_t length -+ * -+ * Upvalues: -+ * 1. struct protocol_buf* -+ * 2. int32_t field index, not used in this function -+ * -+ * Return: -+ * the byte array representing the given array -+ */ -+static int32_t get_raw(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ init_byte_array(L, seg->start + seg->offset, seg->length, 1); -+ -+ return 1; -+} -+/* LUA_API: The function 'get_segment' is used to get a new segment in 'raw' mode. -+ * Typically this function is applied on another raw segment in order -+ * to extract a part of the segment as new segment. -+ * -+ * Parameters: -+ * 1. lua_packet_segment, implicit through object oriented access seg:raw(..) -+ * 2. uint32_t offset, this indicates where to start the new segment, see e.g below. -+ * 3. uint32_t length, this indicates the size of the new segment -+ * -+ * Upvalues: -+ * 1. struct protocol_buf* -+ * 2. int32_t field index, not used in this function -+ * -+ * Return: -+ * 1. A lua_packet_segment annotated with the according metatable or False in -+ * case the input data is not valid -+ * -+ * Example: -+ * -+ * +------------------------+---------------------------------------+ -+ * | function call | resulting lua_packet_segment | -+ * +========================+===+===+===+===+===+===+===+===+===+===+ -+ * | seg = packet:raw(0,10) | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | -+ * +------------------------+---+---+---+---+---+---+---+---+---+---+ -+ * | 1st_half = seg:raw(0,5)| 0 | 1 | 2 | 3 | 4 | | -+ * +------------------------+---+---+---+---+---+---+---+---+---+---+ -+ * | 2nd_half = seg:raw(5,5)| | 5 | 6 | 7 | 8 | 9 | -+ * +------------------------+-------------------+---+---+---+---+---+ -+ */ -+static int32_t get_segment(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ uint32_t offset = luaL_checkinteger(L, 2); -+ uint32_t length = luaL_checkinteger(L, 3); -+ lua_packet_segment * new = (lua_packet_segment *)lua_newuserdata(L, sizeof(lua_packet_segment)); -+ -+ new->start = seg->start; -+ new->offset = seg->offset + offset; -+ new->changes = NULL; -+ /* we allow a seg->length == 0 , this enables processing packets where the packetsize is not fixed (0 = not fixed)*/ -+ if (seg->length != 0 && length > seg->length) { -+ lua_pushboolean(L, 0); -+ return 1; -+ } -+ -+ new->length = length; -+ luaL_getmetatable(L, prot_buf->name); -+ lua_setmetatable(L, -2); -+ -+ return 1; -+} -+ -+/* LUA_API: the function 'get_segment_size' is used to get the size of a segment. -+ * -+ * Parameters: -+ * 1. lua_packet_segment, implicit through object oriented access seg:raw(..) -+ * -+ * Upvalues: -+ * 1. struct protocol_buf* -+ * 2. int32_t field index, not used in this function -+ * -+ * Return: -+ * 1. Size as lua_Number -+ */ -+static int32_t get_segment_size(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ lua_pushnumber(L, seg->length); -+ return 1; -+} -+ -+/* LUA_API: the function 'get_segment_offset' is used to get the real offset -+ * of a segment. This function returns the offset of the segment to the start -+ * of the buffer. This means the following -+ * seg1 = packet:raw(2,10) -+ * seg2 = seg1:raw(3,5) -+ * offset = seg2:get_offset() -+ * -+ * will give an offset of 5, since the seg1 starts at offset 2, and seg2 starts -+ * at offset (seg1:get_offset() + 3). -+ * -+ * Parameters: -+ * 1. lua_packet_segment, implicit through object oriented access seg:raw(..) -+ * -+ * Upvalues: -+ * 1. struct protocol_buf* -+ * 2. int32_t field index, not used in this function -+ * -+ * Return: -+ * 1. Offset as lua_Number -+ */ -+static int32_t get_segment_offset(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ lua_pushnumber(L, seg->offset); -+ return 1; -+} -+ -+/* LUA_API: overwrites the __tostring function of a lua_packet_segment. -+ * this will print32_t a nicely formated string, including length, -+ * offset and name of the protocol buffer. -+ * -+ * Parameters: -+ * 1. lua_packet_segment (implicit) -+ * -+ * Returns: -+ * 1. the representing string -+ */ -+static int32_t packet_segment_tostring(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ int32_t n; -+ char buf[128]; -+ -+ n = sprintf(buf, "type: %s, offset: %d, length: %d", prot_buf->name, seg->offset, seg->length); -+ lua_pushlstring(L, buf, n); -+ -+ return 1; -+} -+ -+ -+static const struct luaL_Reg seg_access_functions [] = { -+ { "set", set_raw }, -+ { "get", get_raw }, -+ { "raw", get_segment }, -+ { "get_offset", get_segment_offset }, -+ { "get_size", get_segment_size }, -+ { "to_bytes", get_raw }, -+ { "__tostring", packet_segment_tostring }, -+ { "__gc", gc_packet_segment }, -+ { NULL, NULL } -+}; -+ -+/* C_API: the function 'get_metatable_from_protocol_type' is a helper -+ * used in controller.c as well as it may find usage in the static -+ * protocol buffers and byte array implementation. */ -+void get_metatable_from_protocol_type(lua_State *L, int32_t type) -+{ -+ char * table; -+ lua_getglobal(L, SUPPORTED_PROTOCOL_TABLE); -+ lua_rawgeti(L, -1, type); -+ table = (char *)luaL_checkstring(L, -1); -+ lua_pop(L, 2); /* pop the table SUPPORTED_PROTOCOL_TABLE and the string pushed by lua_gettable */ -+ luaL_getmetatable(L, table); -+ return; -+} -+ -+/* C_INT: the function 'payload_contains_protocol' is used internally. -+ * Depending if static or dynamic protocol buffer it calls the right -+ * validation function. */ -+static int32_t payload_contains_protocol(lua_State *L, struct protocol_buf *prot_buf, lua_packet_segment *seg, uint32_t prot_type) -+{ -+ if (prot_buf->is_dynamic) -+ return has_protocol_dynamic(L, prot_buf, seg, prot_type); -+ else -+ return prot_buf->has_protocol(L, prot_buf, seg, prot_type); -+} -+ -+/* C_INT: the function 'protocol_get_field_changes' is used interally. -+ * It requests the field_changes struct calling the protocol buffers -+ * 'get_field_changes' function. This funciton is called, whenever -+ * the payload field with a given protocol type is requested inside -+ * the function 'get_protocol_field' */ -+static struct field_changes * protocol_get_field_changes(lua_State *L, struct protocol_buf *prot_buf, lua_packet_segment * seg) -+{ -+ struct field_changes * changes = NULL; -+ -+ if (prot_buf->get_field_changes) { -+ if (prot_buf->is_dynamic) -+ changes = get_field_changes_dynamic(L, prot_buf, seg); -+ else -+ changes = prot_buf->get_field_changes(L, seg); -+ /* is already 1 when set by helper 'get_allocated_field_changes, -+ * since not every prot_buf may use this function we enforce it. */ -+ changes->ref_count = 1; -+ } -+ return changes; -+} -+ -+/* C_INT: the function 'get_field_offset_in_bytes' wrapps the logic of -+ * calculating the new length with considering the optional field_changes. */ -+static int32_t get_field_offset_in_bytes(struct protocol_field * field, lua_packet_segment * seg, int32_t field_index) -+{ -+ uint32_t nr_of_bits, nr_of_bytes, field_offset; -+ -+ field_offset = field->offset; -+ /* do we need to manipulate the default values stored inside the protocol buffer ?? */ -+ if (seg->changes) -+ field_offset += seg->changes->field_offset_changes[field_index]; -+ /* how many bits remain */ -+ nr_of_bits = field_offset & (CHAR_BIT - 1); -+ /* assuming CHAR_BIT == 2 ^ 3 */ -+ nr_of_bytes = (field_offset - nr_of_bits) >> 3; -+ -+ return seg->offset + nr_of_bytes; -+} -+ -+/* C_INT: the function 'get_field_length_in_bytes' wrapps the logic of -+ * calculating the new offset with considering the optional field_changes. */ -+static int32_t get_field_length_in_bytes(struct protocol_field * field, lua_packet_segment * seg, int32_t field_index) -+{ -+ uint32_t nr_of_bits, nr_of_bytes, field_length; -+ -+ field_length = field->length; -+ /* if the field length is smaller than 1 byte, we take the size of one byte -+ * we treat the case where field_length == 0 in a special way ...*/ -+ if (field_length < CHAR_BIT && field_length > 0) -+ field_length = CHAR_BIT; -+ -+ /* do we need to manipulate the default values stored inside the protocol buffer ?? */ -+ if (seg->changes) -+ field_length += seg->changes->field_length_changes[field_index]; -+ /* how many bits remain */ -+ nr_of_bits = field_length & (CHAR_BIT - 1); -+ /* assuming CHAR_BIT == 2 ^ 3 */ -+ nr_of_bytes = (field_length - nr_of_bits) >> 3; -+ return nr_of_bytes; -+} -+ -+/* C_INT: the function 'initialize_field_getter_and_setter' initializes -+ * the setter and getter function of the field, considering the optional -+ * field manipulator functions defined inside the protocol buffers. */ -+static void initialize_field_getter_and_setter(lua_State *L, struct protocol_buf *prot_buf, int32_t field_index) -+{ -+ /* lets check if there is a metatable on top of the stack */ -+ struct protocol_field * f = (struct protocol_field *)&prot_buf->protocol_fields[field_index]; -+ -+ if (!lua_istable(L, -1)) luaL_error(L, "cannot initialize getter and setter for field %s->%s, " -+ "not a table on top of the stack, is '%s'", prot_buf->name, f->name, lua_typename(L, lua_type(L, -1))); -+ -+ /* is there a 'getter' to initialize ? */ -+ lua_pushlightuserdata(L, prot_buf); /* push upvalue 1 */ -+ lua_pushinteger(L, field_index); /* push upvalue 2 */ -+ if (f->get) { -+ if (prot_buf->is_dynamic) -+ lua_pushcclosure(L, field_dynamic_getter, 2); -+ else -+ lua_pushcclosure(L, f->get, 2); -+ }else -+ /* there is no specific getter defined - fall back to 'get_raw' */ -+ lua_pushcclosure(L, get_raw, 2); -+ /* set the metatable field 'get' */ -+ lua_setfield(L, -2, "get"); -+ -+ /* is there a 'setter' to initialize ? */ -+ lua_pushlightuserdata(L, prot_buf); /* push upvalue 1 */ -+ lua_pushinteger(L, field_index); /* push upvalue 2 */ -+ if (f->set) { -+ if (prot_buf->is_dynamic) -+ lua_pushcclosure(L, field_dynamic_setter, 2); -+ else -+ lua_pushcclosure(L, f->set, 2); -+ }else -+ /* there is no specific setter defined - fall back to 'set_raw' */ -+ lua_pushcclosure(L, set_raw, 2); -+ /* set the metatable field 'set' */ -+ lua_setfield(L, -2, "set"); -+} -+ -+/* LUA_API: 'get_protocol_field' is used in Lua as a closure for each field of a protocol -+ * buffer. E.g a call to ip = packet:data(packet_ip) will go to this function, -+ * and trigger the conversion of the raw packet to a ip packet. Each call -+ * to a field function of an IP packet, like ip:daddr() uses this function -+ * to to return the right data. In each case you will end up either with a -+ * new packet segment (annotated with the proper metatable) or a boolean -+ * value (False) if something went wrong. In the case everything went fine, -+ * the newly created lua_packet_segment is annotated with the proper -+ * metatable where the fields get and set also contain the specific getter -+ * and setter functions given by the protocol buffer. E.g. the function call -+ * ip:daddr():get() or ip:daddr():set(...) will call the proper function -+ * defined inside the corresponding field definition. -+ * -+ * Parameters: -+ * 1. lua_packet_segment, implicit through object oriented access seg:raw(..) -+ * 2. type of the protocol buffer, optional, and only used if the accessed -+ * field is the payload field. If a type is provided for the access of the -+ * payload field, the function tries to convert the data pointed to by the -+ * payload field to the given type. To check if such a conversion is -+ * possible, it calls the function pointed to by the protocol buffer member -+ * has_protocol. If this function returns True, the conversion takes place. -+ * -+ * Upvalues: -+ * 1. struct protocol_buf* -+ * 2. int32_t field index -+ * -+ * Return: -+ * 1. A lua_packet_segment annotated with the according metatable or False in -+ * case the input data is not valid -+ */ -+static int32_t get_protocol_field(lua_State *L) -+{ -+ int32_t prot_type; -+ lua_packet_segment * seg, *new; -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ int32_t field_index = lua_tointeger(L, lua_upvalueindex(2)); -+ struct protocol_field * field = &prot_buf->protocol_fields[field_index]; -+ -+ /* get the current packet segment */ -+ seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ /* initialize the new packet segment */ -+ new = (lua_packet_segment *)lua_newuserdata(L, sizeof(lua_packet_segment)); -+ new->start = seg->start; /* the start is unchanged */ -+ new->offset = get_field_offset_in_bytes(field, seg, field_index); -+ new->length = get_field_length_in_bytes(field, seg, field_index); -+ -+ /* if new->length == 0 then no configuration was done, we guess the size by subtracting the -+ * new offset from the packet length. since the old length is getting initialized by the -+ * netfilter extension this assumption holds for the very last field of the protocol. -+ * this 'feature' should be used by protocol buffers containing a payload, whereas the -+ * payload field is the last field of the buffer. However, at compile-time unknown field -+ * sizes (and offsets) of fields not being placed at the end of the protocol should be -+ * initialized using the 'get_field_changes' hook system. */ -+ if (new->length == 0) -+ new->length = (seg->length + seg->offset) - (new->offset); -+ /* -+ printf("%s->%s:: seg->offset %i, seg->length %i, new->offset %i, new->length %i\n", -+ prot_buf->name, field->name, seg->offset, seg->length, new->offset, new->length); -+ */ -+ /* special care for packet payload requests */ -+ if (prot_buf->payload_field != NULL && strcmp(prot_buf->payload_field, field->name) == 0) { -+ /* we know the payload field is requested */ -+ /* the requested payload can be delivered either as a common segment or as -+ * an other packet type, such a conversion needs an extra protocol parameter -+ * ... so lets check */ -+ -+ if (lua_isnumber(L, 2)) { -+ /* we have an extra parameter, ... lets see if it is a valid protocol -+ * the parameter is the index of the 'supported_protocols'-array member */ -+ prot_type = lua_tointeger(L, 2); -+ if (prot_type >= 0 && prot_type < PACKET_SENTINEL) { -+ /* we are sure the purpose of the request is to get the payload data, -+ * converted to the given protocol. lets check if the payload contains -+ * data of the given protocol */ -+ if (payload_contains_protocol(L, prot_buf, seg, prot_type)) { -+ /* success, we can push the metatable for the given protocol */ -+ get_metatable_from_protocol_type(L, prot_type); -+ if (!lua_isnil(L, -1)) /* check if the metatable was found */ -+ /* perhaps the field offsets and lengths of the containing protocol -+ * are not set correctly. request the optional 'field_changes' structure -+ * holding the changes for lengths and offsets. */ -+ new->changes = protocol_get_field_changes(L, get_protocol_buf(prot_type), new); -+ else{ -+ /* failed, the requested protocol is not available -+ * we push false and return */ -+ lua_pop(L, 1); /* pop the userdata */ -+ lua_pushboolean(L, 0); -+ return 1; -+ } -+ }else{ -+ /* payload does not carry the provided protocol */ -+ /* we push false and return */ -+ lua_pop(L, 1); /* pop the userdata */ -+ lua_pushboolean(L, 0); -+ return 1; -+ } -+ }else{ -+ /* unknown protocol */ -+ lua_pop(L, 1); /* pop the userdata */ -+ luaL_error(L, "provided protocol is unknown"); -+ } -+ } -+ } -+ -+ /* if there is still the 'new' userdata on the top, we push our own metatable */ -+ if (lua_isuserdata(L, -1)) { -+ luaL_getmetatable(L, prot_buf->name); -+ new->changes = seg->changes; -+ if (seg->changes) -+ new->changes->ref_count++; -+ } -+ -+ /* a new packet segment is at index -2 , and the proper metatable at index -1 of the stack -+ * lets set the propper setter and getter function for the requested field */ -+ initialize_field_getter_and_setter(L, prot_buf, field_index); -+ -+ lua_setmetatable(L, -2); -+ return 1; -+} -+ -+/* C_API: 'register_protbuf' is only used internally. This function takes a -+ * pointer to a fully initialized protocol buffer struct and registers it -+ * inside the Lua state. Registering means: -+ * -+ * 1. it creates a new metatable with the name of the protocol buffer. -+ * 2. it registers the default functions which are stored in the luaL_Reg -+ * array seg_access_functions. -+ * 3. it loops over the protocol fields stored at prot_buf->protocol_fields -+ * and registers a new function (using the field name) inside the -+ * metatable. Each field points to the function 'get_protocol_field' -+ * which acts as a closure taking a pointer to the protocol buffer as -+ * well as the index of the field as upvalues. -+ * 4. The protocol index, serves as numerical identifier of this protocol -+ * buffer or even of the protocol itself. This index is stored as a -+ * global value inside the Lua state as well as inside the Lua table -+ * 'supported_protocols'. Assuming the name of a procotol buffer is -+ * "packet_ip" the following statements are true: -+ * -+ * supported_protocols[protocol_index] == "packet_ip" -+ * packet_ip == protocol_index -+ * -+ * This allows you to get all registered protocols from within Lua. This -+ * is especially usefull for the dynamic protocol buffers where you have -+ * to provide your own "has_protocol"-function, which probably needs the -+ * information on which protocols it is able to contain. -+ */ -+void register_protbuf(lua_State *L, struct protocol_buf * prot_buf, uint32_t protocol_index) -+{ -+ int32_t field_index; -+ luaL_Reg *reg = (struct luaL_Reg *)seg_access_functions; -+ struct protocol_field * field = prot_buf->protocol_fields; -+ -+ luaL_newmetatable(L, prot_buf->name); -+ -+ /* metatable.__index = metatable */ -+ lua_pushvalue(L, -1); /* duplicates the metatable */ -+ lua_setfield(L, -2, "__index"); -+ -+ /* pushing default functions */ -+ for (; reg->name; reg++) { -+ lua_pushlightuserdata(L, (void *)prot_buf); -+ lua_pushcclosure(L, reg->func, 1); -+ lua_setfield(L, -2, reg->name); -+ } -+ -+ /* pushing functions specific to the protocol buffer */ -+ for (field_index = 0; field->name; field++, field_index++) { -+ lua_pushlightuserdata(L, (void *)prot_buf); /* upvalue: prot_buf */ -+ lua_pushinteger(L, field_index); /* upvalue: index of protocol field */ -+ lua_pushcclosure(L, get_protocol_field, 2); -+ lua_setfield(L, -2, field->name); -+ } -+ /* pop the metatable */ -+ lua_pop(L, 1); -+ -+ /* registering the array-index as the protocol_id*/ -+ lua_getglobal(L, "_G"); -+ lua_pushinteger(L, protocol_index); -+ lua_setfield(L, -2, prot_buf->name); -+ lua_pop(L, 1); /* pop _G */ -+ -+ lua_getglobal(L, SUPPORTED_PROTOCOL_TABLE); -+ lua_pushstring(L, prot_buf->name); -+ lua_rawseti(L, -2, protocol_index); -+ -+ lua_pop(L, 1); /* pop SUPPORTED_PROTOCOL_TABLE */ -+ -+ supported_protocols[protocol_index] = prot_buf; -+} -+ -+void luaopen_controller(lua_State *L) -+{ -+ /* registering a table inside the _G with table[protocol_index] = prot_buf->name */ -+ lua_getglobal(L, "_G"); -+ lua_newtable(L); -+ lua_setfield(L, -2, SUPPORTED_PROTOCOL_TABLE); -+ lua_pop(L, 1); /* pop _G */ -+ -+ luaopen_protbuf_raw(L); -+ luaopen_protbuf_eth(L); -+ luaopen_protbuf_ip(L); -+ luaopen_protbuf_icmp(L); -+ luaopen_protbuf_tcp(L); -+ luaopen_protbuf_tcp_options(L); -+ luaopen_protbuf_udp(L); -+ luaopen_protbuf_tftp(L); -+ luaopen_protbuf_dynamic(L); -+ /* should follow all other static buffers */ -+#if defined(__KERNEL__) -+ luaopen_nflib(L); -+#endif -+ -+ luaopen_bytearraylib(L); -+} -+ -+ -+ -+ ---- /dev/null -+++ b/extensions/LUA/controller.h -@@ -0,0 +1,264 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#ifndef CONTROLLER_H_ -+#define CONTROLLER_H_ -+ -+#include "stdlib.h" /* wrapper */ -+#include "string.h" /* wrapper */ -+#include "lua.h" -+#include "lualib.h" -+#include "lauxlib.h" -+ -+#if defined(__KERNEL__) -+#include -+#include -+#include -+#endif -+ -+ -+/* to compile the stuff in userspace (for testing)*/ -+#if !defined(__KERNEL__) -+#include -+#define pr_debug printf; -+ -+#define kmalloc(size, type) malloc(size) -+#define kfree(ptr) free(ptr) -+ -+#endif -+ -+ -+/**********************************************************************/ -+/* nf Lua configuration */ -+/**********************************************************************/ -+#define MAX_NR_OF_PROTOCOLS 16 -+#define SUPPORTED_PROTOCOL_TABLE "supported_protocols" -+ -+#define MAX_NR_OF_FIELDS_IN_DYN_PROT_BUF 32 -+ -+ -+/**********************************************************************/ -+/* Static Protocol Buffer configuration */ -+/**********************************************************************/ -+ -+/* the definitions of the stringified expression of the prot_bufs... -+ * make sure all static prot_bufs are listed and are unique */ -+#define LUA_PACKET_SEG_RAW "packet_raw" -+#define LUA_PACKET_SEG_ETH "packet_eth" -+#define LUA_PACKET_SEG_ICMP "packet_icmp" -+#define LUA_PACKET_SEG_IP "packet_ip" -+#define LUA_PACKET_SEG_TCP "packet_tcp" -+#define LUA_PACKET_SEG_TCP_OPT "packet_tcp_opt" -+#define LUA_PACKET_SEG_UDP "packet_udp" -+#define LUA_PACKET_SEG_TFTP "packet_tftp" -+ -+/* the enum holding all static prot_bufs... make sure it contains all -+ * static prot_bufs */ -+enum PROT_BUF { -+ PACKET_RAW, -+ PACKET_ETH, -+ PACKET_IP, -+ PACKET_ICMP, -+ PACKET_TCP, -+ PACKET_TCP_OPTIONS, -+ PACKET_UDP, -+ PACKET_TFTP, -+ PACKET_DYNAMIC, -+ PACKET_SENTINEL -+}; -+ -+/* the luaopen-function of the prot_bufs... make sure it is called -+ * inside luaopen_controller */ -+void luaopen_protbuf_raw(lua_State *L); -+void luaopen_protbuf_eth(lua_State *L); -+void luaopen_protbuf_ip(lua_State *L); -+void luaopen_protbuf_icmp(lua_State *L); -+void luaopen_protbuf_tcp(lua_State *L); -+void luaopen_protbuf_tcp_options(lua_State *L); -+void luaopen_protbuf_udp(lua_State *L); -+void luaopen_protbuf_tftp(lua_State *L); -+void luaopen_protbuf_dynamic(lua_State *L); -+ -+/**********************************************************************/ -+/* field changes */ -+/**********************************************************************/ -+struct field_changes { -+ int ref_count; -+ int *field_length_changes; -+ int *field_offset_changes; -+}; -+ -+/**********************************************************************/ -+/* lua packet segment */ -+/* ------------------ */ -+/* The struct lua_packet_segment is the integral part of a Lua packet.*/ -+/* At the very beginning, when a new packet arrives in `lua_tg`_ such */ -+/* a struct is initialized. The field start then points to the lowest */ -+/* available header inside the sk_buff structure. During packet */ -+/* processing the start pointer remains the same, only the offset and */ -+/* length value change. */ -+/**********************************************************************/ -+#define checkpacketseg(L, i, seg_type) \ -+ (lua_packet_segment *)luaL_checkudata(L, i, seg_type) -+ -+typedef struct lua_packet_segment { -+ unsigned int offset; -+ unsigned int length; -+ struct field_changes * changes; -+ unsigned char * start; /* need to be at the end because of the memory alignment */ -+} lua_packet_segment; -+ -+/**********************************************************************/ -+/* protocol field */ -+/* -------------- */ -+/* This structure is a container for the field definitions used by the*/ -+/* protocol buffer. Each protocol field is expressed using this struct*/ -+/* Have a look at the protocol buffers to see how the struct gets */ -+/* initialized. */ -+/* */ -+/* name: */ -+/* This member expresses the name of the field, ending */ -+/* in its own Lua function to access the field. */ -+/* offset / length: */ -+/* These members do specify the position inside the protocol header */ -+/* in bits (not bytes!). */ -+/* get / set: */ -+/* The get and set functions take a function pointer pointing to the*/ -+/* specific getter and setter function for this field. */ -+/**********************************************************************/ -+struct protocol_field { -+ const char * name; -+ uint32_t offset; -+ uint32_t length; -+ lua_CFunction get; -+ lua_CFunction set; -+}; -+#define PROT_FIELD_SENTINEL { NULL, 0, 0, NULL, NULL } -+ -+ -+/**********************************************************************/ -+/* protocol_buf */ -+/**********************************************************************/ -+/* This structure is a container for all the information needed for a -+ * protocol buffer. It gets initialized in each protocol buffer header -+ * file or for the dynamic protocol buffers on runtime using the -+ * 'register_dynamic_protocol_buffer' function. -+ * -+ * name: -+ * This member is used throughout the system. It is also exported -+ * to Lua as a variable name holding the index of the 'supported_protocols' -+ * array. The name is also used as the name of the generated Lua -+ * metatable, that is why inside the macro checkpacketseg_ it -+ * is always the name of a protocol buffer that is passed as the -+ * second parameter. -+ * payload_field: -+ * This member holds the string of the field responsible for payload -+ * data. The payload field of a protocol has an extra property, since -+ * it can be used to invoke another protocol buffer that is applied to -+ * the payload content. -+ * has_protocol: -+ * This member is used together with the payload_field. Since we must -+ * be sure that the payload content does really contain a protocol -+ * of type X. The function pointed to by has_protocol checks if the -+ * protocol buffer X can be applied on the payload_data. -+ * protocol_fields: -+ * This member points to the array of 'protocol_field' structures -+ * get_field_changes: -+ * This member is optional. It is used to return a pointer to an initialized -+ * field_changes struct. The function is called, whenever the payload field -+ * is requested with a given protocol type. Usually this function will -+ * initialize the field_changes struct depending on the content of the -+ * payload data. e.g. -+ * tcp = ip:data(packet_tcp) -+ * such a request will call the 'get_field_changes' function of the tcp -+ * protocol buffer. This enables, that the tcp options field have the proper -+ * length as well as the tcp data start at the right offset. -+ */ -+struct protocol_buf { -+ int is_dynamic; -+ const char * name; -+ char * payload_field; -+ int (*has_protocol)(lua_State *L, struct protocol_buf *prot_buf, lua_packet_segment * seg, int type); -+ struct protocol_field * protocol_fields; -+ struct field_changes * (*get_field_changes)(lua_State *L, lua_packet_segment * seg); -+}; -+ -+/**********************************************************************/ -+/* lua byte array library */ -+/**********************************************************************/ -+#define LUA_BYTE_ARRAY "byte_array" -+#define checkbytearray(L, i) \ -+ (lua_packet_segment *)luaL_checkudata(L, i, LUA_BYTE_ARRAY) -+lua_packet_segment * init_byte_array(lua_State *L, unsigned char * start, int length, int do_copy); -+void luaopen_bytearraylib(lua_State *L); -+ -+ -+/**********************************************************************/ -+/* lua netfilter environment library */ -+/**********************************************************************/ -+#define NETFILTER_LIB "nf" -+#if defined(__KERNEL__) -+ struct lua_env { -+ lua_State *L; -+ /* perhaps more to come here (e.g. a state per CPU) */ -+ }; -+ #define LUA_ENV "lua_env" -+ #define checkluaenv(L, i) \ -+ (struct lua_env *)luaL_checkudata(L, i, LUA_ENV) -+ -+ void luaopen_nflib(lua_State *L); -+#endif -+ -+void cleanup_dynamic_prot_bufs(void); /* freeing all dynamic prot bufs */ -+/**********************************************************************/ -+/* lua protbuf helpers */ -+/**********************************************************************/ -+int get_1_bit_generic(lua_State *L); -+int set_1_bit_generic(lua_State *L); -+int get_lower_4_bit_generic(lua_State *L); -+int set_lower_4_bit_generic(lua_State *L); -+int get_upper_4_bit_generic(lua_State *L); -+int set_upper_4_bit_generic(lua_State *L); -+int get_8_bit_generic(lua_State *L); -+int set_8_bit_generic(lua_State *L); -+int get_16_bit_generic(lua_State *L); -+int set_16_bit_generic(lua_State *L); -+int get_32_bit_generic(lua_State *L); -+int set_32_bit_generic(lua_State *L); -+int set_data_generic(lua_State *L); -+int get_string_generic(lua_State *L); -+int get_byte_generic_str(lua_State *L); -+struct field_changes * get_allocated_field_changes(lua_State *L, int nr_of_fields); -+ -+/* only used by the dynamic prot buf subsystem */ -+#define MAX_NR_OF_DYN_PROT_BUFS 16 -+int field_dynamic_setter(lua_State *L); -+int field_dynamic_getter(lua_State *L); -+int has_protocol_dynamic(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int type); -+struct field_changes * get_field_changes_dynamic(lua_State *L, struct protocol_buf *prot_buf, lua_packet_segment * seg); -+ -+/**********************************************************************/ -+/* lua controller API */ -+/**********************************************************************/ -+void luaopen_controller(lua_State *L); -+struct protocol_buf * get_protocol_buf(unsigned int protocol_id); -+void get_metatable_from_protocol_type(lua_State *L, int type); -+void register_protbuf(lua_State *L, struct protocol_buf * prot_buf, unsigned int protocol_index); -+ -+ -+#endif /* CONTROLLER_H_ */ ---- /dev/null -+++ b/extensions/LUA/Kbuild -@@ -0,0 +1,49 @@ -+# -*- Makefile -*- -+ -+# Adding debug options -+EXTRA_CFLAGS += -DDEBUG -+ -+obj-m += xt_LUA.o -+ -+EXTRA_CFLAGS += -I$(src)/prot_buf_new -+xt_LUA-y += xt_LUA_target.o \ -+ -+xt_LUA-y += nf_lua.o \ -+ prot_buf_helpers.o \ -+ byte_array.o \ -+ controller.o \ -+ prot_buf_ethernet.o \ -+ prot_buf_icmp.o \ -+ prot_buf_ip.o \ -+ prot_buf_raw.o \ -+ prot_buf_tcp.o \ -+ prot_buf_udp.o \ -+ prot_buf_tftp.o \ -+ prot_buf_dynamic.o \ -+ -+ -+# Adding Lua Support -+EXTRA_CFLAGS += -I$(src)/lua -I$(src)/lua/include -+xt_LUA-y += lua/lapi.o \ -+ lua/lbaselib.o \ -+ lua/lcode.o \ -+ lua/ldebug.o \ -+ lua/ldo.o \ -+ lua/ldump.o \ -+ lua/lfunc.o \ -+ lua/lgc.o \ -+ lua/llex.o \ -+ lua/lmem.o \ -+ lua/lobject.o \ -+ lua/lopcodes.o \ -+ lua/lparser.o \ -+ lua/lstate.o \ -+ lua/lstring.o \ -+ lua/lstrlib.o \ -+ lua/ltable.o \ -+ lua/ltablib.o \ -+ lua/ltm.o \ -+ lua/lundump.o \ -+ lua/lvm.o \ -+ lua/lzio.o \ -+ lua/lauxlib.o \ ---- /dev/null -+++ b/extensions/LUA/libxt_LUA.c -@@ -0,0 +1,191 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "xt_LUA.h" -+ -+enum { -+ FLAG_SCRIPT = 1 << 0, -+ FLAG_STATE = 1 << 1, -+ FLAG_FUNCTION = 1 << 2, -+}; -+ -+static const struct option lua_tg_opts[] = { -+ { .name = "script", .has_arg = true, .val = 's' }, -+ { .name = "state", .has_arg = true, .val = 'l' }, -+ { .name = "function", .has_arg = true, .val = 'f' }, -+ { NULL }, -+}; -+ -+ -+static void lua_tg_help(void) -+{ -+ printf( -+ "LUA target options:\n" -+ " --script SCRIPT Process packet with the Lua script given by SCRIPT\n" -+ " \n" -+ " --state ID Process packet within the Lua state given by ID.\n" -+ " Omitting --state infers the ID 0, which can be\n" -+ " refered to the 'global' state.\n" -+ " \n" -+ " --function FUNCTION Name of the function that processes the Lua packet\n" -+ "\n"); -+} -+ -+static void -+lua_tg_init(struct xt_entry_target *target) -+{ -+ struct xt_lua_tginfo *info = (void *)target->data; -+ -+ info->state_id = 0; -+ strncpy(info->function, "process_packet\0", sizeof("process_packet\0")); -+} -+ -+static int -+lua_tg_parse(int32_t c, char **argv, int32_t invert, uint32_t *flags, -+ const void *entry, struct xt_entry_target **target) -+{ -+ struct xt_lua_tginfo *info = (void *)(*target)->data; -+ char buf[MAX_SCRIPT_SIZE]; -+ long script_size; -+ uint32_t state_id; -+ FILE *file; -+ -+ switch (c) { -+ case 's': -+ if (*flags & FLAG_SCRIPT) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Cannot specify --script more than once"); -+ -+ if (strlen(optarg) > sizeof(info->filename)) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Maximum script length is %zu", -+ sizeof(info->filename)); -+ -+ if (strchr(optarg, '\n')) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Newlines not allowed in script name"); -+ file = fopen(optarg, "rb"); -+ if (file != NULL) { -+ fseek(file, 0, SEEK_END); -+ script_size = ftell(file); -+ if (script_size > MAX_SCRIPT_SIZE) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: The size of the script is too big"); -+ -+ fseek(file, 0, SEEK_SET); -+ fread(buf, script_size, 1, file); -+ fclose(file); -+ } else -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Cannot open script %s", optarg); -+ -+ strncpy(info->filename, optarg, sizeof(info->filename)); -+ strncpy(info->buf, buf, sizeof(info->buf)); -+ info->script_size = script_size; -+ -+ *flags |= FLAG_SCRIPT; -+ return true; -+ -+ case 'l': -+ if (*flags & FLAG_STATE) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Cannot specify --state more than once"); -+ -+ if (!xtables_strtoui(optarg, NULL, &state_id, 0, 8)) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Invalid --state %s", optarg); -+ -+ info->state_id = state_id; -+ *flags |= FLAG_STATE; -+ return true; -+ -+ case 'f': -+ if (*flags & FLAG_FUNCTION) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Cannot specify --function more than once"); -+ if (strlen(optarg) > sizeof(info->function)) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Maximum function length is %zu", -+ sizeof(info->function)); -+ -+ if (strchr(optarg, '\n')) -+ xtables_error(PARAMETER_PROBLEM, -+ "LUA: Newlines not allowed in function name"); -+ -+ strncpy(info->function, optarg, sizeof(info->function)); -+ -+ *flags |= FLAG_FUNCTION; -+ return true; -+ } -+ -+ return false; -+} -+ -+static void -+lua_tg_check(uint32_t flags) -+{ -+ if (flags == 0) -+ xtables_error(PARAMETER_PROBLEM, "LUA: --script parameter required"); -+} -+ -+static void -+lua_tg_print(const void *entry, const struct xt_entry_target *target, -+ int32_t numeric) -+{ -+ const struct xt_lua_tginfo *info = (const void *)target->data; -+ -+ printf("LUA script: %s ", info->filename); -+} -+ -+static void -+lua_tg_save(const void *entry, const struct xt_entry_target *target) -+{ -+ const struct xt_lua_tginfo *info = (const void *)target->data; -+ -+ printf("--script %s ", info->filename); -+} -+ -+static struct xtables_target lua_tg_reg = { -+ .name = "LUA", -+ .version = XTABLES_VERSION, -+ .revision = 0, -+ .family = NFPROTO_UNSPEC, -+ .size = XT_ALIGN(sizeof(struct xt_lua_tginfo)), -+ .userspacesize = XT_ALIGN(sizeof(struct xt_lua_tginfo)), -+ .help = lua_tg_help, -+ .init = lua_tg_init, -+ .parse = lua_tg_parse, -+ .final_check = lua_tg_check, -+ .print = lua_tg_print, -+ .save = lua_tg_save, -+ .extra_opts = lua_tg_opts, -+}; -+ -+static __attribute__((constructor)) void lua_tg_ldr(void) -+{ -+ xtables_register_target(&lua_tg_reg); -+} -+ ---- /dev/null -+++ b/extensions/LUA/libxt_LUA.man -@@ -0,0 +1 @@ -+Lorem ipsum dolor sit amet, consectetur adipisicing elit, sed do eiusmod tempor incididunt ut labore et dolore magna aliqua. Ut enim ad minim veniam, quis nostrud exercitation ullamco laboris nisi ut aliquip ex ea commodo consequat. Duis aute irure dolor in reprehenderit in voluptate velit esse cillum dolore eu fugiat nulla pariatur. Excepteur sint occaecat cupidatat non proident, sunt in culpa qui officia deserunt mollit anim id est laborum. ---- /dev/null -+++ b/extensions/LUA/lua/include/ctype.h -@@ -0,0 +1,11 @@ -+#include -+#undef isalnum -+#define isalnum(c) (((__ismask(c)&(_U|_L|_D)) != 0) && (c > 0)) -+#undef isalpha -+#define isalpha(c) (((__ismask(c)&(_U|_L)) != 0) && (c > 0)) -+#undef iscntrl -+#define iscntrl(c) (((__ismask(c)&(_C)) != 0) && (c > 0)) -+#undef isdigit -+#define isdigit(c) (((__ismask(c)&(_D)) != 0) && (c > 0)) -+#undef isspace -+#define isspace(c) (((__ismask(c)&(_S)) != 0) && (c > 0)) ---- /dev/null -+++ b/extensions/LUA/lua/include/errno.h -@@ -0,0 +1 @@ -+#include ---- /dev/null -+++ b/extensions/LUA/lua/include/locale.h -@@ -0,0 +1,5 @@ -+struct lconv { -+ char * decimal_point ; -+} ; -+ -+#define localeconv() NULL ---- /dev/null -+++ b/extensions/LUA/lua/include/setjmp.h -@@ -0,0 +1,26 @@ -+/* -+ * arch/um/include/sysdep-i386/archsetjmp.h -+ */ -+ -+#ifndef _KLIBC_ARCHSETJMP_H -+#define _KLIBC_ARCHSETJMP_H -+ -+struct __jmp_buf { -+ unsigned int __ebx; -+ unsigned int __esp; -+ unsigned int __ebp; -+ unsigned int __esi; -+ unsigned int __edi; -+ unsigned int __eip; -+}; -+ -+typedef struct __jmp_buf jmp_buf[1]; -+ -+#define JB_IP __eip -+#define JB_SP __esp -+ -+int setjmp(jmp_buf); -+void longjmp(jmp_buf, int); -+ -+#endif /* _SETJMP_H */ -+ ---- /dev/null -+++ b/extensions/LUA/lua/include/stdio.h -@@ -0,0 +1 @@ -+#include ---- /dev/null -+++ b/extensions/LUA/lua/include/stdlib.h -@@ -0,0 +1,7 @@ -+#include -+ -+#define exit(E) return -+#define strtoul simple_strtoul -+#define strcoll strcmp -+ -+#define CHAR_BIT 8 ---- /dev/null -+++ b/extensions/LUA/lua/include/string.h -@@ -0,0 +1 @@ -+#include ---- /dev/null -+++ b/extensions/LUA/lua/lapi.c -@@ -0,0 +1,1086 @@ -+/* -+** $Id: lapi.c,v 2.55.1.5 2008/07/04 18:41:18 roberto Exp $ -+** Lua API -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+#include -+#include -+#include -+ -+#define lapi_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lapi.h" -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "lgc.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "ltm.h" -+#include "lundump.h" -+#include "lvm.h" -+ -+ -+ -+const char lua_ident[] = -+ "$Lua: " LUA_RELEASE " " LUA_COPYRIGHT " $\n" -+ "$Authors: " LUA_AUTHORS " $\n" -+ "$URL: www.lua.org $\n"; -+ -+ -+ -+#define api_checknelems(L, n) api_check(L, (n) <= (L->top - L->base)) -+ -+#define api_checkvalidindex(L, i) api_check(L, (i) != luaO_nilobject) -+ -+#define api_incr_top(L) {api_check(L, L->top < L->ci->top); L->top++;} -+ -+ -+ -+static TValue *index2adr (lua_State *L, int idx) { -+ if (idx > 0) { -+ TValue *o = L->base + (idx - 1); -+ api_check(L, idx <= L->ci->top - L->base); -+ if (o >= L->top) return cast(TValue *, luaO_nilobject); -+ else return o; -+ } -+ else if (idx > LUA_REGISTRYINDEX) { -+ api_check(L, idx != 0 && -idx <= L->top - L->base); -+ return L->top + idx; -+ } -+ else switch (idx) { /* pseudo-indices */ -+ case LUA_REGISTRYINDEX: return registry(L); -+ case LUA_ENVIRONINDEX: { -+ Closure *func = curr_func(L); -+ sethvalue(L, &L->env, func->c.env); -+ return &L->env; -+ } -+ case LUA_GLOBALSINDEX: return gt(L); -+ default: { -+ Closure *func = curr_func(L); -+ idx = LUA_GLOBALSINDEX - idx; -+ return (idx <= func->c.nupvalues) -+ ? &func->c.upvalue[idx-1] -+ : cast(TValue *, luaO_nilobject); -+ } -+ } -+} -+ -+ -+static Table *getcurrenv (lua_State *L) { -+ if (L->ci == L->base_ci) /* no enclosing function? */ -+ return hvalue(gt(L)); /* use global table as environment */ -+ else { -+ Closure *func = curr_func(L); -+ return func->c.env; -+ } -+} -+ -+ -+void luaA_pushobject (lua_State *L, const TValue *o) { -+ setobj2s(L, L->top, o); -+ api_incr_top(L); -+} -+ -+ -+LUA_API int lua_checkstack (lua_State *L, int size) { -+ int res = 1; -+ lua_lock(L); -+ if (size > LUAI_MAXCSTACK || (L->top - L->base + size) > LUAI_MAXCSTACK) -+ res = 0; /* stack overflow */ -+ else if (size > 0) { -+ luaD_checkstack(L, size); -+ if (L->ci->top < L->top + size) -+ L->ci->top = L->top + size; -+ } -+ lua_unlock(L); -+ return res; -+} -+ -+ -+LUA_API void lua_xmove (lua_State *from, lua_State *to, int n) { -+ int i; -+ if (from == to) return; -+ lua_lock(to); -+ api_checknelems(from, n); -+ api_check(from, G(from) == G(to)); -+ api_check(from, to->ci->top - to->top >= n); -+ from->top -= n; -+ for (i = 0; i < n; i++) { -+ setobj2s(to, to->top++, from->top + i); -+ } -+ lua_unlock(to); -+} -+ -+ -+LUA_API void lua_setlevel (lua_State *from, lua_State *to) { -+ to->nCcalls = from->nCcalls; -+} -+ -+ -+LUA_API lua_CFunction lua_atpanic (lua_State *L, lua_CFunction panicf) { -+ lua_CFunction old; -+ lua_lock(L); -+ old = G(L)->panic; -+ G(L)->panic = panicf; -+ lua_unlock(L); -+ return old; -+} -+ -+ -+LUA_API lua_State *lua_newthread (lua_State *L) { -+ lua_State *L1; -+ lua_lock(L); -+ luaC_checkGC(L); -+ L1 = luaE_newthread(L); -+ setthvalue(L, L->top, L1); -+ api_incr_top(L); -+ lua_unlock(L); -+ luai_userstatethread(L, L1); -+ return L1; -+} -+ -+ -+ -+/* -+** basic stack manipulation -+*/ -+ -+ -+LUA_API int lua_gettop (lua_State *L) { -+ return cast_int(L->top - L->base); -+} -+ -+ -+LUA_API void lua_settop (lua_State *L, int idx) { -+ lua_lock(L); -+ if (idx >= 0) { -+ api_check(L, idx <= L->stack_last - L->base); -+ while (L->top < L->base + idx) -+ setnilvalue(L->top++); -+ L->top = L->base + idx; -+ } -+ else { -+ api_check(L, -(idx+1) <= (L->top - L->base)); -+ L->top += idx+1; /* `subtract' index (index is negative) */ -+ } -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_remove (lua_State *L, int idx) { -+ StkId p; -+ lua_lock(L); -+ p = index2adr(L, idx); -+ api_checkvalidindex(L, p); -+ while (++p < L->top) setobjs2s(L, p-1, p); -+ L->top--; -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_insert (lua_State *L, int idx) { -+ StkId p; -+ StkId q; -+ lua_lock(L); -+ p = index2adr(L, idx); -+ api_checkvalidindex(L, p); -+ for (q = L->top; q>p; q--) setobjs2s(L, q, q-1); -+ setobjs2s(L, p, L->top); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_replace (lua_State *L, int idx) { -+ StkId o; -+ lua_lock(L); -+ /* explicit test for incompatible code */ -+ if (idx == LUA_ENVIRONINDEX && L->ci == L->base_ci) -+ luaG_runerror(L, "no calling environment"); -+ api_checknelems(L, 1); -+ o = index2adr(L, idx); -+ api_checkvalidindex(L, o); -+ if (idx == LUA_ENVIRONINDEX) { -+ Closure *func = curr_func(L); -+ api_check(L, ttistable(L->top - 1)); -+ func->c.env = hvalue(L->top - 1); -+ luaC_barrier(L, func, L->top - 1); -+ } -+ else { -+ setobj(L, o, L->top - 1); -+ if (idx < LUA_GLOBALSINDEX) /* function upvalue? */ -+ luaC_barrier(L, curr_func(L), L->top - 1); -+ } -+ L->top--; -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_pushvalue (lua_State *L, int idx) { -+ lua_lock(L); -+ setobj2s(L, L->top, index2adr(L, idx)); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+ -+/* -+** access functions (stack -> C) -+*/ -+ -+ -+LUA_API int lua_type (lua_State *L, int idx) { -+ StkId o = index2adr(L, idx); -+ return (o == luaO_nilobject) ? LUA_TNONE : ttype(o); -+} -+ -+ -+LUA_API const char *lua_typename (lua_State *L, int t) { -+ UNUSED(L); -+ return (t == LUA_TNONE) ? "no value" : luaT_typenames[t]; -+} -+ -+ -+LUA_API int lua_iscfunction (lua_State *L, int idx) { -+ StkId o = index2adr(L, idx); -+ return iscfunction(o); -+} -+ -+ -+LUA_API int lua_isnumber (lua_State *L, int idx) { -+ TValue n; -+ const TValue *o = index2adr(L, idx); -+ return tonumber(o, &n); -+} -+ -+ -+LUA_API int lua_isstring (lua_State *L, int idx) { -+ int t = lua_type(L, idx); -+ return (t == LUA_TSTRING || t == LUA_TNUMBER); -+} -+ -+ -+LUA_API int lua_isuserdata (lua_State *L, int idx) { -+ const TValue *o = index2adr(L, idx); -+ return (ttisuserdata(o) || ttislightuserdata(o)); -+} -+ -+ -+LUA_API int lua_rawequal (lua_State *L, int index1, int index2) { -+ StkId o1 = index2adr(L, index1); -+ StkId o2 = index2adr(L, index2); -+ return (o1 == luaO_nilobject || o2 == luaO_nilobject) ? 0 -+ : luaO_rawequalObj(o1, o2); -+} -+ -+ -+LUA_API int lua_equal (lua_State *L, int index1, int index2) { -+ StkId o1, o2; -+ int i; -+ lua_lock(L); /* may call tag method */ -+ o1 = index2adr(L, index1); -+ o2 = index2adr(L, index2); -+ i = (o1 == luaO_nilobject || o2 == luaO_nilobject) ? 0 : equalobj(L, o1, o2); -+ lua_unlock(L); -+ return i; -+} -+ -+ -+LUA_API int lua_lessthan (lua_State *L, int index1, int index2) { -+ StkId o1, o2; -+ int i; -+ lua_lock(L); /* may call tag method */ -+ o1 = index2adr(L, index1); -+ o2 = index2adr(L, index2); -+ i = (o1 == luaO_nilobject || o2 == luaO_nilobject) ? 0 -+ : luaV_lessthan(L, o1, o2); -+ lua_unlock(L); -+ return i; -+} -+ -+ -+ -+LUA_API lua_Number lua_tonumber (lua_State *L, int idx) { -+ TValue n; -+ const TValue *o = index2adr(L, idx); -+ if (tonumber(o, &n)) -+ return nvalue(o); -+ else -+ return 0; -+} -+ -+ -+LUA_API lua_Integer lua_tointeger (lua_State *L, int idx) { -+ TValue n; -+ const TValue *o = index2adr(L, idx); -+ if (tonumber(o, &n)) { -+ lua_Integer res; -+ lua_Number num = nvalue(o); -+ lua_number2integer(res, num); -+ return res; -+ } -+ else -+ return 0; -+} -+ -+ -+LUA_API int lua_toboolean (lua_State *L, int idx) { -+ const TValue *o = index2adr(L, idx); -+ return !l_isfalse(o); -+} -+ -+ -+LUA_API const char *lua_tolstring (lua_State *L, int idx, size_t *len) { -+ StkId o = index2adr(L, idx); -+ if (!ttisstring(o)) { -+ lua_lock(L); /* `luaV_tostring' may create a new string */ -+ if (!luaV_tostring(L, o)) { /* conversion failed? */ -+ if (len != NULL) *len = 0; -+ lua_unlock(L); -+ return NULL; -+ } -+ luaC_checkGC(L); -+ o = index2adr(L, idx); /* previous call may reallocate the stack */ -+ lua_unlock(L); -+ } -+ if (len != NULL) *len = tsvalue(o)->len; -+ return svalue(o); -+} -+ -+ -+LUA_API size_t lua_objlen (lua_State *L, int idx) { -+ StkId o = index2adr(L, idx); -+ switch (ttype(o)) { -+ case LUA_TSTRING: return tsvalue(o)->len; -+ case LUA_TUSERDATA: return uvalue(o)->len; -+ case LUA_TTABLE: return luaH_getn(hvalue(o)); -+ case LUA_TNUMBER: { -+ size_t l; -+ lua_lock(L); /* `luaV_tostring' may create a new string */ -+ l = (luaV_tostring(L, o) ? tsvalue(o)->len : 0); -+ lua_unlock(L); -+ return l; -+ } -+ default: return 0; -+ } -+} -+ -+ -+LUA_API lua_CFunction lua_tocfunction (lua_State *L, int idx) { -+ StkId o = index2adr(L, idx); -+ return (!iscfunction(o)) ? NULL : clvalue(o)->c.f; -+} -+ -+ -+LUA_API void *lua_touserdata (lua_State *L, int idx) { -+ StkId o = index2adr(L, idx); -+ switch (ttype(o)) { -+ case LUA_TUSERDATA: return (rawuvalue(o) + 1); -+ case LUA_TLIGHTUSERDATA: return pvalue(o); -+ default: return NULL; -+ } -+} -+ -+ -+LUA_API lua_State *lua_tothread (lua_State *L, int idx) { -+ StkId o = index2adr(L, idx); -+ return (!ttisthread(o)) ? NULL : thvalue(o); -+} -+ -+ -+LUA_API const void *lua_topointer (lua_State *L, int idx) { -+ StkId o = index2adr(L, idx); -+ switch (ttype(o)) { -+ case LUA_TTABLE: return hvalue(o); -+ case LUA_TFUNCTION: return clvalue(o); -+ case LUA_TTHREAD: return thvalue(o); -+ case LUA_TUSERDATA: -+ case LUA_TLIGHTUSERDATA: -+ return lua_touserdata(L, idx); -+ default: return NULL; -+ } -+} -+ -+ -+ -+/* -+** push functions (C -> stack) -+*/ -+ -+ -+LUA_API void lua_pushnil (lua_State *L) { -+ lua_lock(L); -+ setnilvalue(L->top); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_pushnumber (lua_State *L, lua_Number n) { -+ lua_lock(L); -+ setnvalue(L->top, n); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_pushinteger (lua_State *L, lua_Integer n) { -+ lua_lock(L); -+ setnvalue(L->top, cast_num(n)); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_pushlstring (lua_State *L, const char *s, size_t len) { -+ lua_lock(L); -+ luaC_checkGC(L); -+ setsvalue2s(L, L->top, luaS_newlstr(L, s, len)); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_pushstring (lua_State *L, const char *s) { -+ if (s == NULL) -+ lua_pushnil(L); -+ else -+ lua_pushlstring(L, s, strlen(s)); -+} -+ -+ -+LUA_API const char *lua_pushvfstring (lua_State *L, const char *fmt, -+ va_list argp) { -+ const char *ret; -+ lua_lock(L); -+ luaC_checkGC(L); -+ ret = luaO_pushvfstring(L, fmt, argp); -+ lua_unlock(L); -+ return ret; -+} -+ -+ -+LUA_API const char *lua_pushfstring (lua_State *L, const char *fmt, ...) { -+ const char *ret; -+ va_list argp; -+ lua_lock(L); -+ luaC_checkGC(L); -+ va_start(argp, fmt); -+ ret = luaO_pushvfstring(L, fmt, argp); -+ va_end(argp); -+ lua_unlock(L); -+ return ret; -+} -+ -+ -+LUA_API void lua_pushcclosure (lua_State *L, lua_CFunction fn, int n) { -+ Closure *cl; -+ lua_lock(L); -+ luaC_checkGC(L); -+ api_checknelems(L, n); -+ cl = luaF_newCclosure(L, n, getcurrenv(L)); -+ cl->c.f = fn; -+ L->top -= n; -+ while (n--) -+ setobj2n(L, &cl->c.upvalue[n], L->top+n); -+ setclvalue(L, L->top, cl); -+ lua_assert(iswhite(obj2gco(cl))); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_pushboolean (lua_State *L, int b) { -+ lua_lock(L); -+ setbvalue(L->top, (b != 0)); /* ensure that true is 1 */ -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_pushlightuserdata (lua_State *L, void *p) { -+ lua_lock(L); -+ setpvalue(L->top, p); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API int lua_pushthread (lua_State *L) { -+ lua_lock(L); -+ setthvalue(L, L->top, L); -+ api_incr_top(L); -+ lua_unlock(L); -+ return (G(L)->mainthread == L); -+} -+ -+ -+ -+/* -+** get functions (Lua -> stack) -+*/ -+ -+ -+LUA_API void lua_gettable (lua_State *L, int idx) { -+ StkId t; -+ lua_lock(L); -+ t = index2adr(L, idx); -+ api_checkvalidindex(L, t); -+ luaV_gettable(L, t, L->top - 1, L->top - 1); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_getfield (lua_State *L, int idx, const char *k) { -+ StkId t; -+ TValue key; -+ lua_lock(L); -+ t = index2adr(L, idx); -+ api_checkvalidindex(L, t); -+ setsvalue(L, &key, luaS_new(L, k)); -+ luaV_gettable(L, t, &key, L->top); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_rawget (lua_State *L, int idx) { -+ StkId t; -+ lua_lock(L); -+ t = index2adr(L, idx); -+ api_check(L, ttistable(t)); -+ setobj2s(L, L->top - 1, luaH_get(hvalue(t), L->top - 1)); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_rawgeti (lua_State *L, int idx, int n) { -+ StkId o; -+ lua_lock(L); -+ o = index2adr(L, idx); -+ api_check(L, ttistable(o)); -+ setobj2s(L, L->top, luaH_getnum(hvalue(o), n)); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_createtable (lua_State *L, int narray, int nrec) { -+ lua_lock(L); -+ luaC_checkGC(L); -+ sethvalue(L, L->top, luaH_new(L, narray, nrec)); -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+LUA_API int lua_getmetatable (lua_State *L, int objindex) { -+ const TValue *obj; -+ Table *mt = NULL; -+ int res; -+ lua_lock(L); -+ obj = index2adr(L, objindex); -+ switch (ttype(obj)) { -+ case LUA_TTABLE: -+ mt = hvalue(obj)->metatable; -+ break; -+ case LUA_TUSERDATA: -+ mt = uvalue(obj)->metatable; -+ break; -+ default: -+ mt = G(L)->mt[ttype(obj)]; -+ break; -+ } -+ if (mt == NULL) -+ res = 0; -+ else { -+ sethvalue(L, L->top, mt); -+ api_incr_top(L); -+ res = 1; -+ } -+ lua_unlock(L); -+ return res; -+} -+ -+ -+LUA_API void lua_getfenv (lua_State *L, int idx) { -+ StkId o; -+ lua_lock(L); -+ o = index2adr(L, idx); -+ api_checkvalidindex(L, o); -+ switch (ttype(o)) { -+ case LUA_TFUNCTION: -+ sethvalue(L, L->top, clvalue(o)->c.env); -+ break; -+ case LUA_TUSERDATA: -+ sethvalue(L, L->top, uvalue(o)->env); -+ break; -+ case LUA_TTHREAD: -+ setobj2s(L, L->top, gt(thvalue(o))); -+ break; -+ default: -+ setnilvalue(L->top); -+ break; -+ } -+ api_incr_top(L); -+ lua_unlock(L); -+} -+ -+ -+/* -+** set functions (stack -> Lua) -+*/ -+ -+ -+LUA_API void lua_settable (lua_State *L, int idx) { -+ StkId t; -+ lua_lock(L); -+ api_checknelems(L, 2); -+ t = index2adr(L, idx); -+ api_checkvalidindex(L, t); -+ luaV_settable(L, t, L->top - 2, L->top - 1); -+ L->top -= 2; /* pop index and value */ -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_setfield (lua_State *L, int idx, const char *k) { -+ StkId t; -+ TValue key; -+ lua_lock(L); -+ api_checknelems(L, 1); -+ t = index2adr(L, idx); -+ api_checkvalidindex(L, t); -+ setsvalue(L, &key, luaS_new(L, k)); -+ luaV_settable(L, t, &key, L->top - 1); -+ L->top--; /* pop value */ -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_rawset (lua_State *L, int idx) { -+ StkId t; -+ lua_lock(L); -+ api_checknelems(L, 2); -+ t = index2adr(L, idx); -+ api_check(L, ttistable(t)); -+ setobj2t(L, luaH_set(L, hvalue(t), L->top-2), L->top-1); -+ luaC_barriert(L, hvalue(t), L->top-1); -+ L->top -= 2; -+ lua_unlock(L); -+} -+ -+ -+LUA_API void lua_rawseti (lua_State *L, int idx, int n) { -+ StkId o; -+ lua_lock(L); -+ api_checknelems(L, 1); -+ o = index2adr(L, idx); -+ api_check(L, ttistable(o)); -+ setobj2t(L, luaH_setnum(L, hvalue(o), n), L->top-1); -+ luaC_barriert(L, hvalue(o), L->top-1); -+ L->top--; -+ lua_unlock(L); -+} -+ -+ -+LUA_API int lua_setmetatable (lua_State *L, int objindex) { -+ TValue *obj; -+ Table *mt; -+ lua_lock(L); -+ api_checknelems(L, 1); -+ obj = index2adr(L, objindex); -+ api_checkvalidindex(L, obj); -+ if (ttisnil(L->top - 1)) -+ mt = NULL; -+ else { -+ api_check(L, ttistable(L->top - 1)); -+ mt = hvalue(L->top - 1); -+ } -+ switch (ttype(obj)) { -+ case LUA_TTABLE: { -+ hvalue(obj)->metatable = mt; -+ if (mt) -+ luaC_objbarriert(L, hvalue(obj), mt); -+ break; -+ } -+ case LUA_TUSERDATA: { -+ uvalue(obj)->metatable = mt; -+ if (mt) -+ luaC_objbarrier(L, rawuvalue(obj), mt); -+ break; -+ } -+ default: { -+ G(L)->mt[ttype(obj)] = mt; -+ break; -+ } -+ } -+ L->top--; -+ lua_unlock(L); -+ return 1; -+} -+ -+ -+LUA_API int lua_setfenv (lua_State *L, int idx) { -+ StkId o; -+ int res = 1; -+ lua_lock(L); -+ api_checknelems(L, 1); -+ o = index2adr(L, idx); -+ api_checkvalidindex(L, o); -+ api_check(L, ttistable(L->top - 1)); -+ switch (ttype(o)) { -+ case LUA_TFUNCTION: -+ clvalue(o)->c.env = hvalue(L->top - 1); -+ break; -+ case LUA_TUSERDATA: -+ uvalue(o)->env = hvalue(L->top - 1); -+ break; -+ case LUA_TTHREAD: -+ sethvalue(L, gt(thvalue(o)), hvalue(L->top - 1)); -+ break; -+ default: -+ res = 0; -+ break; -+ } -+ if (res) luaC_objbarrier(L, gcvalue(o), hvalue(L->top - 1)); -+ L->top--; -+ lua_unlock(L); -+ return res; -+} -+ -+ -+/* -+** `load' and `call' functions (run Lua code) -+*/ -+ -+ -+#define adjustresults(L,nres) \ -+ { if (nres == LUA_MULTRET && L->top >= L->ci->top) L->ci->top = L->top; } -+ -+ -+#define checkresults(L,na,nr) \ -+ api_check(L, (nr) == LUA_MULTRET || (L->ci->top - L->top >= (nr) - (na))) -+ -+ -+LUA_API void lua_call (lua_State *L, int nargs, int nresults) { -+ StkId func; -+ lua_lock(L); -+ api_checknelems(L, nargs+1); -+ checkresults(L, nargs, nresults); -+ func = L->top - (nargs+1); -+ luaD_call(L, func, nresults); -+ adjustresults(L, nresults); -+ lua_unlock(L); -+} -+ -+ -+ -+/* -+** Execute a protected call. -+*/ -+struct CallS { /* data to `f_call' */ -+ StkId func; -+ int nresults; -+}; -+ -+ -+static void f_call (lua_State *L, void *ud) { -+ struct CallS *c = cast(struct CallS *, ud); -+ luaD_call(L, c->func, c->nresults); -+} -+ -+ -+ -+LUA_API int lua_pcall (lua_State *L, int nargs, int nresults, int errfunc) { -+ struct CallS c; -+ int status; -+ ptrdiff_t func; -+ lua_lock(L); -+ api_checknelems(L, nargs+1); -+ checkresults(L, nargs, nresults); -+ if (errfunc == 0) -+ func = 0; -+ else { -+ StkId o = index2adr(L, errfunc); -+ api_checkvalidindex(L, o); -+ func = savestack(L, o); -+ } -+ c.func = L->top - (nargs+1); /* function to be called */ -+ c.nresults = nresults; -+ status = luaD_pcall(L, f_call, &c, savestack(L, c.func), func); -+ adjustresults(L, nresults); -+ lua_unlock(L); -+ return status; -+} -+ -+ -+/* -+** Execute a protected C call. -+*/ -+struct CCallS { /* data to `f_Ccall' */ -+ lua_CFunction func; -+ void *ud; -+}; -+ -+ -+static void f_Ccall (lua_State *L, void *ud) { -+ struct CCallS *c = cast(struct CCallS *, ud); -+ Closure *cl; -+ cl = luaF_newCclosure(L, 0, getcurrenv(L)); -+ cl->c.f = c->func; -+ setclvalue(L, L->top, cl); /* push function */ -+ api_incr_top(L); -+ setpvalue(L->top, c->ud); /* push only argument */ -+ api_incr_top(L); -+ luaD_call(L, L->top - 2, 0); -+} -+ -+ -+LUA_API int lua_cpcall (lua_State *L, lua_CFunction func, void *ud) { -+ struct CCallS c; -+ int status; -+ lua_lock(L); -+ c.func = func; -+ c.ud = ud; -+ status = luaD_pcall(L, f_Ccall, &c, savestack(L, L->top), 0); -+ lua_unlock(L); -+ return status; -+} -+ -+ -+LUA_API int lua_load (lua_State *L, lua_Reader reader, void *data, -+ const char *chunkname) { -+ ZIO z; -+ int status; -+ lua_lock(L); -+ if (!chunkname) chunkname = "?"; -+ luaZ_init(L, &z, reader, data); -+ status = luaD_protectedparser(L, &z, chunkname); -+ lua_unlock(L); -+ return status; -+} -+ -+ -+LUA_API int lua_dump (lua_State *L, lua_Writer writer, void *data) { -+ int status; -+ TValue *o; -+ lua_lock(L); -+ api_checknelems(L, 1); -+ o = L->top - 1; -+ if (isLfunction(o)) -+ status = luaU_dump(L, clvalue(o)->l.p, writer, data, 0); -+ else -+ status = 1; -+ lua_unlock(L); -+ return status; -+} -+ -+ -+LUA_API int lua_status (lua_State *L) { -+ return L->status; -+} -+ -+ -+/* -+** Garbage-collection function -+*/ -+ -+LUA_API int lua_gc (lua_State *L, int what, int data) { -+ int res = 0; -+ global_State *g; -+ lua_lock(L); -+ g = G(L); -+ switch (what) { -+ case LUA_GCSTOP: { -+ g->GCthreshold = MAX_LUMEM; -+ break; -+ } -+ case LUA_GCRESTART: { -+ g->GCthreshold = g->totalbytes; -+ break; -+ } -+ case LUA_GCCOLLECT: { -+ luaC_fullgc(L); -+ break; -+ } -+ case LUA_GCCOUNT: { -+ /* GC values are expressed in Kbytes: #bytes/2^10 */ -+ res = cast_int(g->totalbytes >> 10); -+ break; -+ } -+ case LUA_GCCOUNTB: { -+ res = cast_int(g->totalbytes & 0x3ff); -+ break; -+ } -+ case LUA_GCSTEP: { -+ lu_mem a = (cast(lu_mem, data) << 10); -+ if (a <= g->totalbytes) -+ g->GCthreshold = g->totalbytes - a; -+ else -+ g->GCthreshold = 0; -+ while (g->GCthreshold <= g->totalbytes) { -+ luaC_step(L); -+ if (g->gcstate == GCSpause) { /* end of cycle? */ -+ res = 1; /* signal it */ -+ break; -+ } -+ } -+ break; -+ } -+ case LUA_GCSETPAUSE: { -+ res = g->gcpause; -+ g->gcpause = data; -+ break; -+ } -+ case LUA_GCSETSTEPMUL: { -+ res = g->gcstepmul; -+ g->gcstepmul = data; -+ break; -+ } -+ default: res = -1; /* invalid option */ -+ } -+ lua_unlock(L); -+ return res; -+} -+ -+ -+ -+/* -+** miscellaneous functions -+*/ -+ -+ -+LUA_API int lua_error (lua_State *L) { -+ lua_lock(L); -+ api_checknelems(L, 1); -+ luaG_errormsg(L); -+ lua_unlock(L); -+ return 0; /* to avoid warnings */ -+} -+ -+ -+LUA_API int lua_next (lua_State *L, int idx) { -+ StkId t; -+ int more; -+ lua_lock(L); -+ t = index2adr(L, idx); -+ api_check(L, ttistable(t)); -+ more = luaH_next(L, hvalue(t), L->top - 1); -+ if (more) { -+ api_incr_top(L); -+ } -+ else /* no more elements */ -+ L->top -= 1; /* remove key */ -+ lua_unlock(L); -+ return more; -+} -+ -+ -+LUA_API void lua_concat (lua_State *L, int n) { -+ lua_lock(L); -+ api_checknelems(L, n); -+ if (n >= 2) { -+ luaC_checkGC(L); -+ luaV_concat(L, n, cast_int(L->top - L->base) - 1); -+ L->top -= (n-1); -+ } -+ else if (n == 0) { /* push empty string */ -+ setsvalue2s(L, L->top, luaS_newlstr(L, "", 0)); -+ api_incr_top(L); -+ } -+ /* else n == 1; nothing to do */ -+ lua_unlock(L); -+} -+ -+ -+LUA_API lua_Alloc lua_getallocf (lua_State *L, void **ud) { -+ lua_Alloc f; -+ lua_lock(L); -+ if (ud) *ud = G(L)->ud; -+ f = G(L)->frealloc; -+ lua_unlock(L); -+ return f; -+} -+ -+ -+LUA_API void lua_setallocf (lua_State *L, lua_Alloc f, void *ud) { -+ lua_lock(L); -+ G(L)->ud = ud; -+ G(L)->frealloc = f; -+ lua_unlock(L); -+} -+ -+ -+LUA_API void *lua_newuserdata (lua_State *L, size_t size) { -+ Udata *u; -+ lua_lock(L); -+ luaC_checkGC(L); -+ u = luaS_newudata(L, size, getcurrenv(L)); -+ setuvalue(L, L->top, u); -+ api_incr_top(L); -+ lua_unlock(L); -+ return u + 1; -+} -+ -+ -+ -+ -+static const char *aux_upvalue (StkId fi, int n, TValue **val) { -+ Closure *f; -+ if (!ttisfunction(fi)) return NULL; -+ f = clvalue(fi); -+ if (f->c.isC) { -+ if (!(1 <= n && n <= f->c.nupvalues)) return NULL; -+ *val = &f->c.upvalue[n-1]; -+ return ""; -+ } -+ else { -+ Proto *p = f->l.p; -+ if (!(1 <= n && n <= p->sizeupvalues)) return NULL; -+ *val = f->l.upvals[n-1]->v; -+ return getstr(p->upvalues[n-1]); -+ } -+} -+ -+ -+LUA_API const char *lua_getupvalue (lua_State *L, int funcindex, int n) { -+ const char *name; -+ TValue *val; -+ lua_lock(L); -+ name = aux_upvalue(index2adr(L, funcindex), n, &val); -+ if (name) { -+ setobj2s(L, L->top, val); -+ api_incr_top(L); -+ } -+ lua_unlock(L); -+ return name; -+} -+ -+ -+LUA_API const char *lua_setupvalue (lua_State *L, int funcindex, int n) { -+ const char *name; -+ TValue *val; -+ StkId fi; -+ lua_lock(L); -+ fi = index2adr(L, funcindex); -+ api_checknelems(L, 1); -+ name = aux_upvalue(fi, n, &val); -+ if (name) { -+ L->top--; -+ setobj(L, val, L->top); -+ luaC_barrier(L, clvalue(fi), L->top); -+ } -+ lua_unlock(L); -+ return name; -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lapi.h -@@ -0,0 +1,16 @@ -+/* -+** $Id: lapi.h,v 2.2.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Auxiliary functions from Lua API -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lapi_h -+#define lapi_h -+ -+ -+#include "lobject.h" -+ -+ -+LUAI_FUNC void luaA_pushobject (lua_State *L, const TValue *o); -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lauxlib.c -@@ -0,0 +1,674 @@ -+/* -+** $Id: lauxlib.c,v 1.159.1.3 2008/01/21 13:20:51 roberto Exp $ -+** Auxiliary functions for building Lua libraries -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#if !defined(__KERNEL__) -+#include -+#include -+#include -+#include -+#include -+#else -+#include -+#include -+#include -+#include -+#include -+#endif -+ -+/* This file uses only the official API of Lua. -+** Any function declared here could be written as an application function. -+*/ -+ -+#define lauxlib_c -+#define LUA_LIB -+ -+#include "lua.h" -+ -+#include "lauxlib.h" -+ -+ -+#define FREELIST_REF 0 /* free list of references */ -+ -+ -+/* convert a stack index to positive */ -+#define abs_index(L, i) ((i) > 0 || (i) <= LUA_REGISTRYINDEX ? (i) : \ -+ lua_gettop(L) + (i) + 1) -+ -+ -+/* -+** {====================================================== -+** Error-report functions -+** ======================================================= -+*/ -+ -+ -+LUALIB_API int luaL_argerror (lua_State *L, int narg, const char *extramsg) { -+ lua_Debug ar; -+ if (!lua_getstack(L, 0, &ar)) /* no stack frame? */ -+ return luaL_error(L, "bad argument #%d (%s)", narg, extramsg); -+ lua_getinfo(L, "n", &ar); -+ if (strcmp(ar.namewhat, "method") == 0) { -+ narg--; /* do not count `self' */ -+ if (narg == 0) /* error is in the self argument itself? */ -+ return luaL_error(L, "calling " LUA_QS " on bad self (%s)", -+ ar.name, extramsg); -+ } -+ if (ar.name == NULL) -+ ar.name = "?"; -+ return luaL_error(L, "bad argument #%d to " LUA_QS " (%s)", -+ narg, ar.name, extramsg); -+} -+ -+ -+LUALIB_API int luaL_typerror (lua_State *L, int narg, const char *tname) { -+ const char *msg = lua_pushfstring(L, "%s expected, got %s", -+ tname, luaL_typename(L, narg)); -+ return luaL_argerror(L, narg, msg); -+} -+ -+ -+static void tag_error (lua_State *L, int narg, int tag) { -+ luaL_typerror(L, narg, lua_typename(L, tag)); -+} -+ -+ -+LUALIB_API void luaL_where (lua_State *L, int level) { -+ lua_Debug ar; -+ if (lua_getstack(L, level, &ar)) { /* check function at level */ -+ lua_getinfo(L, "Sl", &ar); /* get info about it */ -+ if (ar.currentline > 0) { /* is there info? */ -+ lua_pushfstring(L, "%s:%d: ", ar.short_src, ar.currentline); -+ return; -+ } -+ } -+ lua_pushliteral(L, ""); /* else, no information available... */ -+} -+ -+ -+LUALIB_API int luaL_error (lua_State *L, const char *fmt, ...) { -+ va_list argp; -+ va_start(argp, fmt); -+ luaL_where(L, 1); -+ lua_pushvfstring(L, fmt, argp); -+ va_end(argp); -+ lua_concat(L, 2); -+ return lua_error(L); -+} -+ -+/* }====================================================== */ -+ -+ -+LUALIB_API int luaL_checkoption (lua_State *L, int narg, const char *def, -+ const char *const lst[]) { -+ const char *name = (def) ? luaL_optstring(L, narg, def) : -+ luaL_checkstring(L, narg); -+ int i; -+ for (i=0; lst[i]; i++) -+ if (strcmp(lst[i], name) == 0) -+ return i; -+ return luaL_argerror(L, narg, -+ lua_pushfstring(L, "invalid option " LUA_QS, name)); -+} -+ -+ -+LUALIB_API int luaL_newmetatable (lua_State *L, const char *tname) { -+ lua_getfield(L, LUA_REGISTRYINDEX, tname); /* get registry.name */ -+ if (!lua_isnil(L, -1)) /* name already in use? */ -+ return 0; /* leave previous value on top, but return 0 */ -+ lua_pop(L, 1); -+ lua_newtable(L); /* create metatable */ -+ lua_pushvalue(L, -1); -+ lua_setfield(L, LUA_REGISTRYINDEX, tname); /* registry.name = metatable */ -+ return 1; -+} -+ -+ -+LUALIB_API void *luaL_checkudata (lua_State *L, int ud, const char *tname) { -+ void *p = lua_touserdata(L, ud); -+ if (p != NULL) { /* value is a userdata? */ -+ if (lua_getmetatable(L, ud)) { /* does it have a metatable? */ -+ lua_getfield(L, LUA_REGISTRYINDEX, tname); /* get correct metatable */ -+ if (lua_rawequal(L, -1, -2)) { /* does it have the correct mt? */ -+ lua_pop(L, 2); /* remove both metatables */ -+ return p; -+ } -+ } -+ } -+ luaL_typerror(L, ud, tname); /* else error */ -+ return NULL; /* to avoid warnings */ -+} -+ -+ -+LUALIB_API void luaL_checkstack (lua_State *L, int space, const char *mes) { -+ if (!lua_checkstack(L, space)) -+ luaL_error(L, "stack overflow (%s)", mes); -+} -+ -+ -+LUALIB_API void luaL_checktype (lua_State *L, int narg, int t) { -+ if (lua_type(L, narg) != t) -+ tag_error(L, narg, t); -+} -+ -+ -+LUALIB_API void luaL_checkany (lua_State *L, int narg) { -+ if (lua_type(L, narg) == LUA_TNONE) -+ luaL_argerror(L, narg, "value expected"); -+} -+ -+ -+LUALIB_API const char *luaL_checklstring (lua_State *L, int narg, size_t *len) { -+ const char *s = lua_tolstring(L, narg, len); -+ if (!s) tag_error(L, narg, LUA_TSTRING); -+ return s; -+} -+ -+ -+LUALIB_API const char *luaL_optlstring (lua_State *L, int narg, -+ const char *def, size_t *len) { -+ if (lua_isnoneornil(L, narg)) { -+ if (len) -+ *len = (def ? strlen(def) : 0); -+ return def; -+ } -+ else return luaL_checklstring(L, narg, len); -+} -+ -+ -+LUALIB_API lua_Number luaL_checknumber (lua_State *L, int narg) { -+ lua_Number d = lua_tonumber(L, narg); -+ if (d == 0 && !lua_isnumber(L, narg)) /* avoid extra test when d is not 0 */ -+ tag_error(L, narg, LUA_TNUMBER); -+ return d; -+} -+ -+ -+LUALIB_API lua_Number luaL_optnumber (lua_State *L, int narg, lua_Number def) { -+ return luaL_opt(L, luaL_checknumber, narg, def); -+} -+ -+ -+LUALIB_API lua_Integer luaL_checkinteger (lua_State *L, int narg) { -+ lua_Integer d = lua_tointeger(L, narg); -+ if (d == 0 && !lua_isnumber(L, narg)) /* avoid extra test when d is not 0 */ -+ tag_error(L, narg, LUA_TNUMBER); -+ return d; -+} -+ -+ -+LUALIB_API lua_Integer luaL_optinteger (lua_State *L, int narg, -+ lua_Integer def) { -+ return luaL_opt(L, luaL_checkinteger, narg, def); -+} -+ -+ -+LUALIB_API int luaL_getmetafield (lua_State *L, int obj, const char *event) { -+ if (!lua_getmetatable(L, obj)) /* no metatable? */ -+ return 0; -+ lua_pushstring(L, event); -+ lua_rawget(L, -2); -+ if (lua_isnil(L, -1)) { -+ lua_pop(L, 2); /* remove metatable and metafield */ -+ return 0; -+ } -+ else { -+ lua_remove(L, -2); /* remove only metatable */ -+ return 1; -+ } -+} -+ -+ -+LUALIB_API int luaL_callmeta (lua_State *L, int obj, const char *event) { -+ obj = abs_index(L, obj); -+ if (!luaL_getmetafield(L, obj, event)) /* no metafield? */ -+ return 0; -+ lua_pushvalue(L, obj); -+ lua_call(L, 1, 1); -+ return 1; -+} -+ -+ -+LUALIB_API void (luaL_register) (lua_State *L, const char *libname, -+ const luaL_Reg *l) { -+ luaI_openlib(L, libname, l, 0); -+} -+ -+ -+static int libsize (const luaL_Reg *l) { -+ int size = 0; -+ for (; l->name; l++) size++; -+ return size; -+} -+ -+ -+LUALIB_API void luaI_openlib (lua_State *L, const char *libname, -+ const luaL_Reg *l, int nup) { -+ if (libname) { -+ int size = libsize(l); -+ /* check whether lib already exists */ -+ luaL_findtable(L, LUA_REGISTRYINDEX, "_LOADED", 1); -+ lua_getfield(L, -1, libname); /* get _LOADED[libname] */ -+ if (!lua_istable(L, -1)) { /* not found? */ -+ lua_pop(L, 1); /* remove previous result */ -+ /* try global variable (and create one if it does not exist) */ -+ if (luaL_findtable(L, LUA_GLOBALSINDEX, libname, size) != NULL) -+ luaL_error(L, "name conflict for module " LUA_QS, libname); -+ lua_pushvalue(L, -1); -+ lua_setfield(L, -3, libname); /* _LOADED[libname] = new table */ -+ } -+ lua_remove(L, -2); /* remove _LOADED table */ -+ lua_insert(L, -(nup+1)); /* move library table to below upvalues */ -+ } -+ for (; l->name; l++) { -+ int i; -+ for (i=0; ifunc, nup); -+ lua_setfield(L, -(nup+2), l->name); -+ } -+ lua_pop(L, nup); /* remove upvalues */ -+} -+ -+ -+ -+/* -+** {====================================================== -+** getn-setn: size for arrays -+** ======================================================= -+*/ -+ -+#if defined(LUA_COMPAT_GETN) -+ -+static int checkint (lua_State *L, int topop) { -+ int n = (lua_type(L, -1) == LUA_TNUMBER) ? lua_tointeger(L, -1) : -1; -+ lua_pop(L, topop); -+ return n; -+} -+ -+ -+static void getsizes (lua_State *L) { -+ lua_getfield(L, LUA_REGISTRYINDEX, "LUA_SIZES"); -+ if (lua_isnil(L, -1)) { /* no `size' table? */ -+ lua_pop(L, 1); /* remove nil */ -+ lua_newtable(L); /* create it */ -+ lua_pushvalue(L, -1); /* `size' will be its own metatable */ -+ lua_setmetatable(L, -2); -+ lua_pushliteral(L, "kv"); -+ lua_setfield(L, -2, "__mode"); /* metatable(N).__mode = "kv" */ -+ lua_pushvalue(L, -1); -+ lua_setfield(L, LUA_REGISTRYINDEX, "LUA_SIZES"); /* store in register */ -+ } -+} -+ -+ -+LUALIB_API void luaL_setn (lua_State *L, int t, int n) { -+ t = abs_index(L, t); -+ lua_pushliteral(L, "n"); -+ lua_rawget(L, t); -+ if (checkint(L, 1) >= 0) { /* is there a numeric field `n'? */ -+ lua_pushliteral(L, "n"); /* use it */ -+ lua_pushinteger(L, n); -+ lua_rawset(L, t); -+ } -+ else { /* use `sizes' */ -+ getsizes(L); -+ lua_pushvalue(L, t); -+ lua_pushinteger(L, n); -+ lua_rawset(L, -3); /* sizes[t] = n */ -+ lua_pop(L, 1); /* remove `sizes' */ -+ } -+} -+ -+ -+LUALIB_API int luaL_getn (lua_State *L, int t) { -+ int n; -+ t = abs_index(L, t); -+ lua_pushliteral(L, "n"); /* try t.n */ -+ lua_rawget(L, t); -+ if ((n = checkint(L, 1)) >= 0) return n; -+ getsizes(L); /* else try sizes[t] */ -+ lua_pushvalue(L, t); -+ lua_rawget(L, -2); -+ if ((n = checkint(L, 2)) >= 0) return n; -+ return (int)lua_objlen(L, t); -+} -+ -+#endif -+ -+/* }====================================================== */ -+ -+ -+ -+LUALIB_API const char *luaL_gsub (lua_State *L, const char *s, const char *p, -+ const char *r) { -+ const char *wild; -+ size_t l = strlen(p); -+ luaL_Buffer *b = (luaL_Buffer *)kmalloc(sizeof(luaL_Buffer) + BUFSIZ, GFP_ATOMIC); -+ if(!b) luaL_error(L, "luaL_gsub: cannot allocate memory"); -+ luaL_buffinit(L, b); -+ while ((wild = strstr(s, p)) != NULL) { -+ luaL_addlstring(b, s, wild - s); /* push prefix */ -+ luaL_addstring(b, r); /* push replacement in place of pattern */ -+ s = wild + l; /* continue after `p' */ -+ } -+ luaL_addstring(b, s); /* push last suffix */ -+ luaL_pushresult(b); -+ kfree(b); -+ return lua_tostring(L, -1); -+} -+ -+ -+LUALIB_API const char *luaL_findtable (lua_State *L, int idx, -+ const char *fname, int szhint) { -+ const char *e; -+ lua_pushvalue(L, idx); -+ do { -+ e = strchr(fname, '.'); -+ if (e == NULL) e = fname + strlen(fname); -+ lua_pushlstring(L, fname, e - fname); -+ lua_rawget(L, -2); -+ if (lua_isnil(L, -1)) { /* no such field? */ -+ lua_pop(L, 1); /* remove this nil */ -+ lua_createtable(L, 0, (*e == '.' ? 1 : szhint)); /* new table for field */ -+ lua_pushlstring(L, fname, e - fname); -+ lua_pushvalue(L, -2); -+ lua_settable(L, -4); /* set new table into field */ -+ } -+ else if (!lua_istable(L, -1)) { /* field has a non-table value? */ -+ lua_pop(L, 2); /* remove table and value */ -+ return fname; /* return problematic part of the name */ -+ } -+ lua_remove(L, -2); /* remove previous table */ -+ fname = e + 1; -+ } while (*e == '.'); -+ return NULL; -+} -+ -+ -+ -+/* -+** {====================================================== -+** Generic Buffer manipulation -+** ======================================================= -+*/ -+ -+ -+#define bufflen(B) ((B)->p - (B)->buffer) -+#define bufffree(B) ((size_t)(LUAL_BUFFERSIZE - bufflen(B))) -+ -+#define LIMIT (LUA_MINSTACK/2) -+ -+ -+static int emptybuffer (luaL_Buffer *B) { -+ size_t l = bufflen(B); -+ if (l == 0) return 0; /* put nothing on stack */ -+ else { -+ lua_pushlstring(B->L, B->buffer, l); -+ B->p = B->buffer; -+ B->lvl++; -+ return 1; -+ } -+} -+ -+ -+static void adjuststack (luaL_Buffer *B) { -+ if (B->lvl > 1) { -+ lua_State *L = B->L; -+ int toget = 1; /* number of levels to concat */ -+ size_t toplen = lua_strlen(L, -1); -+ do { -+ size_t l = lua_strlen(L, -(toget+1)); -+ if (B->lvl - toget + 1 >= LIMIT || toplen > l) { -+ toplen += l; -+ toget++; -+ } -+ else break; -+ } while (toget < B->lvl); -+ lua_concat(L, toget); -+ B->lvl = B->lvl - toget + 1; -+ } -+} -+ -+ -+LUALIB_API char *luaL_prepbuffer (luaL_Buffer *B) { -+ if (emptybuffer(B)) -+ adjuststack(B); -+ return B->buffer; -+} -+ -+ -+LUALIB_API void luaL_addlstring (luaL_Buffer *B, const char *s, size_t l) { -+ while (l--) -+ luaL_addchar(B, *s++); -+} -+ -+ -+LUALIB_API void luaL_addstring (luaL_Buffer *B, const char *s) { -+ luaL_addlstring(B, s, strlen(s)); -+} -+ -+ -+LUALIB_API void luaL_pushresult (luaL_Buffer *B) { -+ emptybuffer(B); -+ lua_concat(B->L, B->lvl); -+ B->lvl = 1; -+} -+ -+ -+LUALIB_API void luaL_addvalue (luaL_Buffer *B) { -+ lua_State *L = B->L; -+ size_t vl; -+ const char *s = lua_tolstring(L, -1, &vl); -+ if (vl <= bufffree(B)) { /* fit into buffer? */ -+ memcpy(B->p, s, vl); /* put it there */ -+ B->p += vl; -+ lua_pop(L, 1); /* remove from stack */ -+ } -+ else { -+ if (emptybuffer(B)) -+ lua_insert(L, -2); /* put buffer before new value */ -+ B->lvl++; /* add new value into B stack */ -+ adjuststack(B); -+ } -+} -+ -+ -+LUALIB_API void luaL_buffinit (lua_State *L, luaL_Buffer *B) { -+ B->L = L; -+ B->p = B->buffer; -+ B->lvl = 0; -+} -+ -+/* }====================================================== */ -+ -+ -+LUALIB_API int luaL_ref (lua_State *L, int t) { -+ int ref; -+ t = abs_index(L, t); -+ if (lua_isnil(L, -1)) { -+ lua_pop(L, 1); /* remove from stack */ -+ return LUA_REFNIL; /* `nil' has a unique fixed reference */ -+ } -+ lua_rawgeti(L, t, FREELIST_REF); /* get first free element */ -+ ref = (int)lua_tointeger(L, -1); /* ref = t[FREELIST_REF] */ -+ lua_pop(L, 1); /* remove it from stack */ -+ if (ref != 0) { /* any free element? */ -+ lua_rawgeti(L, t, ref); /* remove it from list */ -+ lua_rawseti(L, t, FREELIST_REF); /* (t[FREELIST_REF] = t[ref]) */ -+ } -+ else { /* no free elements */ -+ ref = (int)lua_objlen(L, t); -+ ref++; /* create new reference */ -+ } -+ lua_rawseti(L, t, ref); -+ return ref; -+} -+ -+ -+LUALIB_API void luaL_unref (lua_State *L, int t, int ref) { -+ if (ref >= 0) { -+ t = abs_index(L, t); -+ lua_rawgeti(L, t, FREELIST_REF); -+ lua_rawseti(L, t, ref); /* t[ref] = t[FREELIST_REF] */ -+ lua_pushinteger(L, ref); -+ lua_rawseti(L, t, FREELIST_REF); /* t[FREELIST_REF] = ref */ -+ } -+} -+ -+ -+ -+/* -+** {====================================================== -+** Load functions -+** ======================================================= -+*/ -+ -+#if !defined(__KERNEL__) -+typedef struct LoadF { -+ int extraline; -+ FILE *f; -+ char buff[LUAL_BUFFERSIZE]; -+} LoadF; -+ -+ -+static const char *getF (lua_State *L, void *ud, size_t *size) { -+ LoadF *lf = (LoadF *)ud; -+ (void)L; -+ if (lf->extraline) { -+ lf->extraline = 0; -+ *size = 1; -+ return "\n"; -+ } -+ if (feof(lf->f)) return NULL; -+ *size = fread(lf->buff, 1, sizeof(lf->buff), lf->f); -+ return (*size > 0) ? lf->buff : NULL; -+} -+ -+ -+static int errfile (lua_State *L, const char *what, int fnameindex) { -+ const char *serr = strerror(errno); -+ const char *filename = lua_tostring(L, fnameindex) + 1; -+ lua_pushfstring(L, "cannot %s %s: %s", what, filename, serr); -+ lua_remove(L, fnameindex); -+ return LUA_ERRFILE; -+} -+ -+ -+LUALIB_API int luaL_loadfile (lua_State *L, const char *filename) { -+ LoadF lf; -+ int status, readstatus; -+ int c; -+ int fnameindex = lua_gettop(L) + 1; /* index of filename on the stack */ -+ lf.extraline = 0; -+ if (filename == NULL) { -+ lua_pushliteral(L, "=stdin"); -+ lf.f = stdin; -+ } -+ else { -+ lua_pushfstring(L, "@%s", filename); -+ lf.f = fopen(filename, "r"); -+ if (lf.f == NULL) return errfile(L, "open", fnameindex); -+ } -+ c = getc(lf.f); -+ if (c == '#') { /* Unix exec. file? */ -+ lf.extraline = 1; -+ while ((c = getc(lf.f)) != EOF && c != '\n') ; /* skip first line */ -+ if (c == '\n') c = getc(lf.f); -+ } -+ if (c == LUA_SIGNATURE[0] && filename) { /* binary file? */ -+ lf.f = freopen(filename, "rb", lf.f); /* reopen in binary mode */ -+ if (lf.f == NULL) return errfile(L, "reopen", fnameindex); -+ /* skip eventual `#!...' */ -+ while ((c = getc(lf.f)) != EOF && c != LUA_SIGNATURE[0]) ; -+ lf.extraline = 0; -+ } -+ ungetc(c, lf.f); -+ status = lua_load(L, getF, &lf, lua_tostring(L, -1)); -+ readstatus = ferror(lf.f); -+ if (filename) fclose(lf.f); /* close file (even in case of errors) */ -+ if (readstatus) { -+ lua_settop(L, fnameindex); /* ignore results from `lua_load' */ -+ return errfile(L, "read", fnameindex); -+ } -+ lua_remove(L, fnameindex); -+ return status; -+} -+#endif -+ -+typedef struct LoadS { -+ const char *s; -+ size_t size; -+} LoadS; -+ -+ -+static const char *getS (lua_State *L, void *ud, size_t *size) { -+ LoadS *ls = (LoadS *)ud; -+ (void)L; -+ if (ls->size == 0) return NULL; -+ *size = ls->size; -+ ls->size = 0; -+ return ls->s; -+} -+ -+ -+LUALIB_API int luaL_loadbuffer (lua_State *L, const char *buff, size_t size, -+ const char *name) { -+ LoadS ls; -+ ls.s = buff; -+ ls.size = size; -+ return lua_load(L, getS, &ls, name); -+} -+ -+ -+LUALIB_API int (luaL_loadstring) (lua_State *L, const char *s) { -+ return luaL_loadbuffer(L, s, strlen(s), s); -+} -+ -+ -+ -+/* }====================================================== */ -+ -+ -+static void *l_alloc (void *ud, void *ptr, size_t osize, size_t nsize) { -+ (void)ud; -+ (void)osize; -+ if (nsize == 0) { -+#if !defined(__KERNEL__) -+ free(ptr); -+#else -+ kfree(ptr); -+#endif -+ return NULL; -+ } -+ else -+#if !defined(__KERNEL__) -+ return realloc(ptr, nsize); -+#else -+ return krealloc(ptr, nsize, GFP_ATOMIC); -+#endif -+} -+ -+ -+static int lpanic (lua_State *L) { -+ (void)L; /* to avoid warnings */ -+#if !defined(__KERNEL__) -+ fprintf(stderr, "PANIC: unprotected error in call to Lua API (%s)\n", -+#else -+ printk( "PANIC: unprotected error in call to Lua API (%s)\n", -+#endif -+ lua_tostring(L, -1)); -+ return 0; -+} -+ -+ -+LUALIB_API lua_State *luaL_newstate (void) { -+ lua_State *L = lua_newstate(l_alloc, NULL); -+ if (L) lua_atpanic(L, &lpanic); -+ return L; -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lauxlib.h -@@ -0,0 +1,184 @@ -+/* -+** $Id: lauxlib.h,v 1.88.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Auxiliary functions for building Lua libraries -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#ifndef lauxlib_h -+#define lauxlib_h -+ -+ -+#include -+#include /* for kmalloc and kfree when allocating luaL_Buffer */ -+ -+#if !defined(__KERNEL__) -+#include -+#endif -+ -+#include "lua.h" -+ -+ -+#if defined(LUA_COMPAT_GETN) -+LUALIB_API int (luaL_getn) (lua_State *L, int t); -+LUALIB_API void (luaL_setn) (lua_State *L, int t, int n); -+#else -+#define luaL_getn(L,i) ((int)lua_objlen(L, i)) -+#define luaL_setn(L,i,j) ((void)0) /* no op! */ -+#endif -+ -+#if defined(LUA_COMPAT_OPENLIB) -+#define luaI_openlib luaL_openlib -+#endif -+ -+ -+/* extra error code for `luaL_load' */ -+#define LUA_ERRFILE (LUA_ERRERR+1) -+ -+ -+typedef struct luaL_Reg { -+ const char *name; -+ lua_CFunction func; -+} luaL_Reg; -+ -+ -+ -+LUALIB_API void (luaI_openlib) (lua_State *L, const char *libname, -+ const luaL_Reg *l, int nup); -+LUALIB_API void (luaL_register) (lua_State *L, const char *libname, -+ const luaL_Reg *l); -+LUALIB_API int (luaL_getmetafield) (lua_State *L, int obj, const char *e); -+LUALIB_API int (luaL_callmeta) (lua_State *L, int obj, const char *e); -+LUALIB_API int (luaL_typerror) (lua_State *L, int narg, const char *tname); -+LUALIB_API int (luaL_argerror) (lua_State *L, int numarg, const char *extramsg); -+LUALIB_API const char *(luaL_checklstring) (lua_State *L, int numArg, -+ size_t *l); -+LUALIB_API const char *(luaL_optlstring) (lua_State *L, int numArg, -+ const char *def, size_t *l); -+LUALIB_API lua_Number (luaL_checknumber) (lua_State *L, int numArg); -+LUALIB_API lua_Number (luaL_optnumber) (lua_State *L, int nArg, lua_Number def); -+ -+LUALIB_API lua_Integer (luaL_checkinteger) (lua_State *L, int numArg); -+LUALIB_API lua_Integer (luaL_optinteger) (lua_State *L, int nArg, -+ lua_Integer def); -+ -+LUALIB_API void (luaL_checkstack) (lua_State *L, int sz, const char *msg); -+LUALIB_API void (luaL_checktype) (lua_State *L, int narg, int t); -+LUALIB_API void (luaL_checkany) (lua_State *L, int narg); -+ -+LUALIB_API int (luaL_newmetatable) (lua_State *L, const char *tname); -+LUALIB_API void *(luaL_checkudata) (lua_State *L, int ud, const char *tname); -+ -+LUALIB_API void (luaL_where) (lua_State *L, int lvl); -+LUALIB_API int (luaL_error) (lua_State *L, const char *fmt, ...); -+ -+LUALIB_API int (luaL_checkoption) (lua_State *L, int narg, const char *def, -+ const char *const lst[]); -+ -+LUALIB_API int (luaL_ref) (lua_State *L, int t); -+LUALIB_API void (luaL_unref) (lua_State *L, int t, int ref); -+ -+#if !defined(__KERNEL__) -+LUALIB_API int (luaL_loadfile) (lua_State *L, const char *filename); -+#endif -+ -+LUALIB_API int (luaL_loadbuffer) (lua_State *L, const char *buff, size_t sz, -+ const char *name); -+LUALIB_API int (luaL_loadstring) (lua_State *L, const char *s); -+ -+LUALIB_API lua_State *(luaL_newstate) (void); -+ -+ -+LUALIB_API const char *(luaL_gsub) (lua_State *L, const char *s, const char *p, -+ const char *r); -+ -+LUALIB_API const char *(luaL_findtable) (lua_State *L, int idx, -+ const char *fname, int szhint); -+ -+ -+ -+ -+/* -+** =============================================================== -+** some useful macros -+** =============================================================== -+*/ -+ -+#define luaL_argcheck(L, cond,numarg,extramsg) \ -+ ((void)((cond) || luaL_argerror(L, (numarg), (extramsg)))) -+#define luaL_checkstring(L,n) (luaL_checklstring(L, (n), NULL)) -+#define luaL_optstring(L,n,d) (luaL_optlstring(L, (n), (d), NULL)) -+#define luaL_checkint(L,n) ((int)luaL_checkinteger(L, (n))) -+#define luaL_optint(L,n,d) ((int)luaL_optinteger(L, (n), (d))) -+#define luaL_checklong(L,n) ((long)luaL_checkinteger(L, (n))) -+#define luaL_optlong(L,n,d) ((long)luaL_optinteger(L, (n), (d))) -+ -+#define luaL_typename(L,i) lua_typename(L, lua_type(L,(i))) -+ -+#if !defined(__KERNEL__) -+#define luaL_dofile(L, fn) \ -+ (luaL_loadfile(L, fn) || lua_pcall(L, 0, LUA_MULTRET, 0)) -+#endif -+ -+#define luaL_dostring(L, s) \ -+ (luaL_loadstring(L, s) || lua_pcall(L, 0, LUA_MULTRET, 0)) -+ -+#define luaL_getmetatable(L,n) (lua_getfield(L, LUA_REGISTRYINDEX, (n))) -+ -+#define luaL_opt(L,f,n,d) (lua_isnoneornil(L,(n)) ? (d) : f(L,(n))) -+ -+/* -+** {====================================================== -+** Generic Buffer manipulation -+** ======================================================= -+*/ -+ -+ -+ -+typedef struct luaL_Buffer { -+ char *p; /* current position in buffer */ -+ int lvl; /* number of strings in the stack (level) */ -+ lua_State *L; -+ char buffer[LUAL_BUFFERSIZE]; -+} luaL_Buffer; -+ -+#define luaL_addchar(B,c) \ -+ ((void)((B)->p < ((B)->buffer+LUAL_BUFFERSIZE) || luaL_prepbuffer(B)), \ -+ (*(B)->p++ = (char)(c))) -+ -+/* compatibility only */ -+#define luaL_putchar(B,c) luaL_addchar(B,c) -+ -+#define luaL_addsize(B,n) ((B)->p += (n)) -+ -+ -+LUALIB_API void (luaL_buffinit) (lua_State *L, luaL_Buffer *B); -+LUALIB_API char *(luaL_prepbuffer) (luaL_Buffer *B); -+LUALIB_API void (luaL_addlstring) (luaL_Buffer *B, const char *s, size_t l); -+LUALIB_API void (luaL_addstring) (luaL_Buffer *B, const char *s); -+LUALIB_API void (luaL_addvalue) (luaL_Buffer *B); -+LUALIB_API void (luaL_pushresult) (luaL_Buffer *B); -+ -+ -+/* }====================================================== */ -+ -+ -+/* compatibility with ref system */ -+ -+/* pre-defined references */ -+#define LUA_NOREF (-2) -+#define LUA_REFNIL (-1) -+ -+#define lua_ref(L,lock) ((lock) ? luaL_ref(L, LUA_REGISTRYINDEX) : \ -+ (lua_pushstring(L, "unlocked references are obsolete"), lua_error(L), 0)) -+ -+#define lua_unref(L,ref) luaL_unref(L, LUA_REGISTRYINDEX, (ref)) -+ -+#define lua_getref(L,ref) lua_rawgeti(L, LUA_REGISTRYINDEX, (ref)) -+ -+ -+#define luaL_reg luaL_Reg -+ -+#endif -+ -+ ---- /dev/null -+++ b/extensions/LUA/lua/lbaselib.c -@@ -0,0 +1,647 @@ -+/* -+** $Id: lbaselib.c,v 1.191.1.6 2008/02/14 16:46:22 roberto Exp $ -+** Basic library -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+#include -+#include -+ -+#define lbaselib_c -+#define LUA_LIB -+ -+#include "lua.h" -+ -+#include "lauxlib.h" -+#include "lualib.h" -+ -+ -+ -+ -+/* -+** If your system does not support `stdout', you can just remove this function. -+** If you need, you can define your own `print' function, following this -+** model but changing `fputs' to put the strings at a proper place -+** (a console window or a log file, for instance). -+*/ -+static int luaB_print (lua_State *L) { -+ int n = lua_gettop(L); /* number of arguments */ -+ int i; -+ lua_getglobal(L, "tostring"); -+ for (i=1; i<=n; i++) { -+ const char *s; -+ lua_pushvalue(L, -1); /* function to be called */ -+ lua_pushvalue(L, i); /* value to print */ -+ lua_call(L, 1, 1); -+ s = lua_tostring(L, -1); /* get result */ -+ if (s == NULL) -+ return luaL_error(L, LUA_QL("tostring") " must return a string to " -+ LUA_QL("print")); -+ printk(KERN_INFO "LUA[print]: %s", s); -+ lua_pop(L, 1); /* pop result */ -+ } -+ return 0; -+} -+ -+ -+static int luaB_tonumber (lua_State *L) { -+ int base = luaL_optint(L, 2, 10); -+ if (base == 10) { /* standard conversion */ -+ luaL_checkany(L, 1); -+ if (lua_isnumber(L, 1)) { -+ lua_pushnumber(L, lua_tonumber(L, 1)); -+ return 1; -+ } -+ } -+ else { -+ const char *s1 = luaL_checkstring(L, 1); -+ char *s2; -+ unsigned long n; -+ luaL_argcheck(L, 2 <= base && base <= 36, 2, "base out of range"); -+ n = simple_strtoul(s1, &s2, base); -+ if (s1 != s2) { /* at least one valid digit? */ -+ while (isspace((unsigned char)(*s2))) s2++; /* skip trailing spaces */ -+ if (*s2 == '\0') { /* no invalid trailing characters? */ -+ lua_pushnumber(L, (lua_Number)n); -+ return 1; -+ } -+ } -+ } -+ lua_pushnil(L); /* else not a number */ -+ return 1; -+} -+ -+ -+static int luaB_error (lua_State *L) { -+ int level = luaL_optint(L, 2, 1); -+ lua_settop(L, 1); -+ if (lua_isstring(L, 1) && level > 0) { /* add extra information? */ -+ luaL_where(L, level); -+ lua_pushvalue(L, 1); -+ lua_concat(L, 2); -+ } -+ return lua_error(L); -+} -+ -+ -+static int luaB_getmetatable (lua_State *L) { -+ luaL_checkany(L, 1); -+ if (!lua_getmetatable(L, 1)) { -+ lua_pushnil(L); -+ return 1; /* no metatable */ -+ } -+ luaL_getmetafield(L, 1, "__metatable"); -+ return 1; /* returns either __metatable field (if present) or metatable */ -+} -+ -+ -+static int luaB_setmetatable (lua_State *L) { -+ int t = lua_type(L, 2); -+ luaL_checktype(L, 1, LUA_TTABLE); -+ luaL_argcheck(L, t == LUA_TNIL || t == LUA_TTABLE, 2, -+ "nil or table expected"); -+ if (luaL_getmetafield(L, 1, "__metatable")) -+ luaL_error(L, "cannot change a protected metatable"); -+ lua_settop(L, 2); -+ lua_setmetatable(L, 1); -+ return 1; -+} -+ -+ -+static void getfunc (lua_State *L, int opt) { -+ if (lua_isfunction(L, 1)) lua_pushvalue(L, 1); -+ else { -+ lua_Debug ar; -+ int level = opt ? luaL_optint(L, 1, 1) : luaL_checkint(L, 1); -+ luaL_argcheck(L, level >= 0, 1, "level must be non-negative"); -+ if (lua_getstack(L, level, &ar) == 0) -+ luaL_argerror(L, 1, "invalid level"); -+ lua_getinfo(L, "f", &ar); -+ if (lua_isnil(L, -1)) -+ luaL_error(L, "no function environment for tail call at level %d", -+ level); -+ } -+} -+ -+ -+static int luaB_getfenv (lua_State *L) { -+ getfunc(L, 1); -+ if (lua_iscfunction(L, -1)) /* is a C function? */ -+ lua_pushvalue(L, LUA_GLOBALSINDEX); /* return the thread's global env. */ -+ else -+ lua_getfenv(L, -1); -+ return 1; -+} -+ -+ -+static int luaB_setfenv (lua_State *L) { -+ luaL_checktype(L, 2, LUA_TTABLE); -+ getfunc(L, 0); -+ lua_pushvalue(L, 2); -+ if (lua_isnumber(L, 1) && lua_tonumber(L, 1) == 0) { -+ /* change environment of current thread */ -+ lua_pushthread(L); -+ lua_insert(L, -2); -+ lua_setfenv(L, -2); -+ return 0; -+ } -+ else if (lua_iscfunction(L, -2) || lua_setfenv(L, -2) == 0) -+ luaL_error(L, -+ LUA_QL("setfenv") " cannot change environment of given object"); -+ return 1; -+} -+ -+ -+static int luaB_rawequal (lua_State *L) { -+ luaL_checkany(L, 1); -+ luaL_checkany(L, 2); -+ lua_pushboolean(L, lua_rawequal(L, 1, 2)); -+ return 1; -+} -+ -+ -+static int luaB_rawget (lua_State *L) { -+ luaL_checktype(L, 1, LUA_TTABLE); -+ luaL_checkany(L, 2); -+ lua_settop(L, 2); -+ lua_rawget(L, 1); -+ return 1; -+} -+ -+static int luaB_rawset (lua_State *L) { -+ luaL_checktype(L, 1, LUA_TTABLE); -+ luaL_checkany(L, 2); -+ luaL_checkany(L, 3); -+ lua_settop(L, 3); -+ lua_rawset(L, 1); -+ return 1; -+} -+ -+ -+static int luaB_gcinfo (lua_State *L) { -+ lua_pushinteger(L, lua_getgccount(L)); -+ return 1; -+} -+ -+static int luaB_collectgarbage (lua_State *L) { -+ static const char *const opts[] = {"stop", "restart", "collect", -+ "count", "step", "setpause", "setstepmul", NULL}; -+ static const int optsnum[] = {LUA_GCSTOP, LUA_GCRESTART, LUA_GCCOLLECT, -+ LUA_GCCOUNT, LUA_GCSTEP, LUA_GCSETPAUSE, LUA_GCSETSTEPMUL}; -+ int o = luaL_checkoption(L, 1, "collect", opts); -+ int ex = luaL_optint(L, 2, 0); -+ int res = lua_gc(L, optsnum[o], ex); -+ switch (optsnum[o]) { -+ case LUA_GCCOUNT: { -+ int b = lua_gc(L, LUA_GCCOUNTB, 0); -+ lua_pushnumber(L, res + ((lua_Number)b/1024)); -+ return 1; -+ } -+ case LUA_GCSTEP: { -+ lua_pushboolean(L, res); -+ return 1; -+ } -+ default: { -+ lua_pushnumber(L, res); -+ return 1; -+ } -+ } -+} -+ -+ -+static int luaB_type (lua_State *L) { -+ luaL_checkany(L, 1); -+ lua_pushstring(L, luaL_typename(L, 1)); -+ return 1; -+} -+ -+ -+static int luaB_next (lua_State *L) { -+ luaL_checktype(L, 1, LUA_TTABLE); -+ lua_settop(L, 2); /* create a 2nd argument if there isn't one */ -+ if (lua_next(L, 1)) -+ return 2; -+ else { -+ lua_pushnil(L); -+ return 1; -+ } -+} -+ -+ -+static int luaB_pairs (lua_State *L) { -+ luaL_checktype(L, 1, LUA_TTABLE); -+ lua_pushvalue(L, lua_upvalueindex(1)); /* return generator, */ -+ lua_pushvalue(L, 1); /* state, */ -+ lua_pushnil(L); /* and initial value */ -+ return 3; -+} -+ -+ -+static int ipairsaux (lua_State *L) { -+ int i = luaL_checkint(L, 2); -+ luaL_checktype(L, 1, LUA_TTABLE); -+ i++; /* next value */ -+ lua_pushinteger(L, i); -+ lua_rawgeti(L, 1, i); -+ return (lua_isnil(L, -1)) ? 0 : 2; -+} -+ -+ -+static int luaB_ipairs (lua_State *L) { -+ luaL_checktype(L, 1, LUA_TTABLE); -+ lua_pushvalue(L, lua_upvalueindex(1)); /* return generator, */ -+ lua_pushvalue(L, 1); /* state, */ -+ lua_pushinteger(L, 0); /* and initial value */ -+ return 3; -+} -+ -+ -+static int load_aux (lua_State *L, int status) { -+ if (status == 0) /* OK? */ -+ return 1; -+ else { -+ lua_pushnil(L); -+ lua_insert(L, -2); /* put before error message */ -+ return 2; /* return nil plus error message */ -+ } -+} -+ -+ -+static int luaB_loadstring (lua_State *L) { -+ size_t l; -+ const char *s = luaL_checklstring(L, 1, &l); -+ const char *chunkname = luaL_optstring(L, 2, s); -+ return load_aux(L, luaL_loadbuffer(L, s, l, chunkname)); -+} -+ -+/* -+static int luaB_loadfile (lua_State *L) { -+ const char *fname = luaL_optstring(L, 1, NULL); -+ return load_aux(L, luaL_loadfile(L, fname)); -+} -+*/ -+ -+/* -+** Reader for generic `load' function: `lua_load' uses the -+** stack for internal stuff, so the reader cannot change the -+** stack top. Instead, it keeps its resulting string in a -+** reserved slot inside the stack. -+*/ -+static const char *generic_reader (lua_State *L, void *ud, size_t *size) { -+ (void)ud; /* to avoid warnings */ -+ luaL_checkstack(L, 2, "too many nested functions"); -+ lua_pushvalue(L, 1); /* get function */ -+ lua_call(L, 0, 1); /* call it */ -+ if (lua_isnil(L, -1)) { -+ *size = 0; -+ return NULL; -+ } -+ else if (lua_isstring(L, -1)) { -+ lua_replace(L, 3); /* save string in a reserved stack slot */ -+ return lua_tolstring(L, 3, size); -+ } -+ else luaL_error(L, "reader function must return a string"); -+ return NULL; /* to avoid warnings */ -+} -+ -+ -+static int luaB_load (lua_State *L) { -+ int status; -+ const char *cname = luaL_optstring(L, 2, "=(load)"); -+ luaL_checktype(L, 1, LUA_TFUNCTION); -+ lua_settop(L, 3); /* function, eventual name, plus one reserved slot */ -+ status = lua_load(L, generic_reader, NULL, cname); -+ return load_aux(L, status); -+} -+ -+/* -+static int luaB_dofile (lua_State *L) { -+ const char *fname = luaL_optstring(L, 1, NULL); -+ int n = lua_gettop(L); -+ if (luaL_loadfile(L, fname) != 0) lua_error(L); -+ lua_call(L, 0, LUA_MULTRET); -+ return lua_gettop(L) - n; -+} -+*/ -+ -+static int luaB_assert (lua_State *L) { -+ luaL_checkany(L, 1); -+ if (!lua_toboolean(L, 1)) -+ return luaL_error(L, "%s", luaL_optstring(L, 2, "assertion failed!")); -+ return lua_gettop(L); -+} -+ -+ -+static int luaB_unpack (lua_State *L) { -+ int i, e, n; -+ luaL_checktype(L, 1, LUA_TTABLE); -+ i = luaL_optint(L, 2, 1); -+ e = luaL_opt(L, luaL_checkint, 3, luaL_getn(L, 1)); -+ if (i > e) return 0; /* empty range */ -+ n = e - i + 1; /* number of elements */ -+ if (n <= 0 || !lua_checkstack(L, n)) /* n <= 0 means arith. overflow */ -+ return luaL_error(L, "too many results to unpack"); -+ lua_rawgeti(L, 1, i); /* push arg[i] (avoiding overflow problems) */ -+ while (i++ < e) /* push arg[i + 1...e] */ -+ lua_rawgeti(L, 1, i); -+ return n; -+} -+ -+ -+static int luaB_select (lua_State *L) { -+ int n = lua_gettop(L); -+ if (lua_type(L, 1) == LUA_TSTRING && *lua_tostring(L, 1) == '#') { -+ lua_pushinteger(L, n-1); -+ return 1; -+ } -+ else { -+ int i = luaL_checkint(L, 1); -+ if (i < 0) i = n + i; -+ else if (i > n) i = n; -+ luaL_argcheck(L, 1 <= i, 1, "index out of range"); -+ return n - i; -+ } -+} -+ -+ -+static int luaB_pcall (lua_State *L) { -+ int status; -+ luaL_checkany(L, 1); -+ status = lua_pcall(L, lua_gettop(L) - 1, LUA_MULTRET, 0); -+ lua_pushboolean(L, (status == 0)); -+ lua_insert(L, 1); -+ return lua_gettop(L); /* return status + all results */ -+} -+ -+ -+static int luaB_xpcall (lua_State *L) { -+ int status; -+ luaL_checkany(L, 2); -+ lua_settop(L, 2); -+ lua_insert(L, 1); /* put error function under function to be called */ -+ status = lua_pcall(L, 0, LUA_MULTRET, 1); -+ lua_pushboolean(L, (status == 0)); -+ lua_replace(L, 1); -+ return lua_gettop(L); /* return status + all results */ -+} -+ -+ -+static int luaB_tostring (lua_State *L) { -+ luaL_checkany(L, 1); -+ if (luaL_callmeta(L, 1, "__tostring")) /* is there a metafield? */ -+ return 1; /* use its value */ -+ switch (lua_type(L, 1)) { -+ case LUA_TNUMBER: -+ lua_pushstring(L, lua_tostring(L, 1)); -+ break; -+ case LUA_TSTRING: -+ lua_pushvalue(L, 1); -+ break; -+ case LUA_TBOOLEAN: -+ lua_pushstring(L, (lua_toboolean(L, 1) ? "true" : "false")); -+ break; -+ case LUA_TNIL: -+ lua_pushliteral(L, "nil"); -+ break; -+ default: -+ lua_pushfstring(L, "%s: %p", luaL_typename(L, 1), lua_topointer(L, 1)); -+ break; -+ } -+ return 1; -+} -+ -+ -+static int luaB_newproxy (lua_State *L) { -+ lua_settop(L, 1); -+ lua_newuserdata(L, 0); /* create proxy */ -+ if (lua_toboolean(L, 1) == 0) -+ return 1; /* no metatable */ -+ else if (lua_isboolean(L, 1)) { -+ lua_newtable(L); /* create a new metatable `m' ... */ -+ lua_pushvalue(L, -1); /* ... and mark `m' as a valid metatable */ -+ lua_pushboolean(L, 1); -+ lua_rawset(L, lua_upvalueindex(1)); /* weaktable[m] = true */ -+ } -+ else { -+ int validproxy = 0; /* to check if weaktable[metatable(u)] == true */ -+ if (lua_getmetatable(L, 1)) { -+ lua_rawget(L, lua_upvalueindex(1)); -+ validproxy = lua_toboolean(L, -1); -+ lua_pop(L, 1); /* remove value */ -+ } -+ luaL_argcheck(L, validproxy, 1, "boolean or proxy expected"); -+ lua_getmetatable(L, 1); /* metatable is valid; get it */ -+ } -+ lua_setmetatable(L, 2); -+ return 1; -+} -+ -+ -+static const luaL_Reg base_funcs[] = { -+ {"assert", luaB_assert}, -+ {"collectgarbage", luaB_collectgarbage}, -+// {"dofile", luaB_dofile}, -+ {"error", luaB_error}, -+ {"gcinfo", luaB_gcinfo}, -+ {"getfenv", luaB_getfenv}, -+ {"getmetatable", luaB_getmetatable}, -+// {"loadfile", luaB_loadfile}, -+ {"load", luaB_load}, -+ {"loadstring", luaB_loadstring}, -+ {"next", luaB_next}, -+ {"pcall", luaB_pcall}, -+ {"print", luaB_print}, -+ {"rawequal", luaB_rawequal}, -+ {"rawget", luaB_rawget}, -+ {"rawset", luaB_rawset}, -+ {"select", luaB_select}, -+ {"setfenv", luaB_setfenv}, -+ {"setmetatable", luaB_setmetatable}, -+ {"tonumber", luaB_tonumber}, -+ {"tostring", luaB_tostring}, -+ {"type", luaB_type}, -+ {"unpack", luaB_unpack}, -+ {"xpcall", luaB_xpcall}, -+ {NULL, NULL} -+}; -+ -+ -+/* -+** {====================================================== -+** Coroutine library -+** ======================================================= -+*/ -+ -+#define CO_RUN 0 /* running */ -+#define CO_SUS 1 /* suspended */ -+#define CO_NOR 2 /* 'normal' (it resumed another coroutine) */ -+#define CO_DEAD 3 -+ -+static const char *const statnames[] = -+ {"running", "suspended", "normal", "dead"}; -+ -+static int costatus (lua_State *L, lua_State *co) { -+ if (L == co) return CO_RUN; -+ switch (lua_status(co)) { -+ case LUA_YIELD: -+ return CO_SUS; -+ case 0: { -+ lua_Debug ar; -+ if (lua_getstack(co, 0, &ar) > 0) /* does it have frames? */ -+ return CO_NOR; /* it is running */ -+ else if (lua_gettop(co) == 0) -+ return CO_DEAD; -+ else -+ return CO_SUS; /* initial state */ -+ } -+ default: /* some error occured */ -+ return CO_DEAD; -+ } -+} -+ -+ -+static int luaB_costatus (lua_State *L) { -+ lua_State *co = lua_tothread(L, 1); -+ luaL_argcheck(L, co, 1, "coroutine expected"); -+ lua_pushstring(L, statnames[costatus(L, co)]); -+ return 1; -+} -+ -+ -+static int auxresume (lua_State *L, lua_State *co, int narg) { -+ int status = costatus(L, co); -+ if (!lua_checkstack(co, narg)) -+ luaL_error(L, "too many arguments to resume"); -+ if (status != CO_SUS) { -+ lua_pushfstring(L, "cannot resume %s coroutine", statnames[status]); -+ return -1; /* error flag */ -+ } -+ lua_xmove(L, co, narg); -+ lua_setlevel(L, co); -+ status = lua_resume(co, narg); -+ if (status == 0 || status == LUA_YIELD) { -+ int nres = lua_gettop(co); -+ if (!lua_checkstack(L, nres + 1)) -+ luaL_error(L, "too many results to resume"); -+ lua_xmove(co, L, nres); /* move yielded values */ -+ return nres; -+ } -+ else { -+ lua_xmove(co, L, 1); /* move error message */ -+ return -1; /* error flag */ -+ } -+} -+ -+ -+static int luaB_coresume (lua_State *L) { -+ lua_State *co = lua_tothread(L, 1); -+ int r; -+ luaL_argcheck(L, co, 1, "coroutine expected"); -+ r = auxresume(L, co, lua_gettop(L) - 1); -+ if (r < 0) { -+ lua_pushboolean(L, 0); -+ lua_insert(L, -2); -+ return 2; /* return false + error message */ -+ } -+ else { -+ lua_pushboolean(L, 1); -+ lua_insert(L, -(r + 1)); -+ return r + 1; /* return true + `resume' returns */ -+ } -+} -+ -+ -+static int luaB_auxwrap (lua_State *L) { -+ lua_State *co = lua_tothread(L, lua_upvalueindex(1)); -+ int r = auxresume(L, co, lua_gettop(L)); -+ if (r < 0) { -+ if (lua_isstring(L, -1)) { /* error object is a string? */ -+ luaL_where(L, 1); /* add extra info */ -+ lua_insert(L, -2); -+ lua_concat(L, 2); -+ } -+ lua_error(L); /* propagate error */ -+ } -+ return r; -+} -+ -+ -+static int luaB_cocreate (lua_State *L) { -+ lua_State *NL = lua_newthread(L); -+ luaL_argcheck(L, lua_isfunction(L, 1) && !lua_iscfunction(L, 1), 1, -+ "Lua function expected"); -+ lua_pushvalue(L, 1); /* move function to top */ -+ lua_xmove(L, NL, 1); /* move function from L to NL */ -+ return 1; -+} -+ -+ -+static int luaB_cowrap (lua_State *L) { -+ luaB_cocreate(L); -+ lua_pushcclosure(L, luaB_auxwrap, 1); -+ return 1; -+} -+ -+ -+static int luaB_yield (lua_State *L) { -+ return lua_yield(L, lua_gettop(L)); -+} -+ -+ -+static int luaB_corunning (lua_State *L) { -+ if (lua_pushthread(L)) -+ lua_pushnil(L); /* main thread is not a coroutine */ -+ return 1; -+} -+ -+ -+static const luaL_Reg co_funcs[] = { -+ {"create", luaB_cocreate}, -+ {"resume", luaB_coresume}, -+ {"running", luaB_corunning}, -+ {"status", luaB_costatus}, -+ {"wrap", luaB_cowrap}, -+ {"yield", luaB_yield}, -+ {NULL, NULL} -+}; -+ -+/* }====================================================== */ -+ -+ -+static void auxopen (lua_State *L, const char *name, -+ lua_CFunction f, lua_CFunction u) { -+ lua_pushcfunction(L, u); -+ lua_pushcclosure(L, f, 1); -+ lua_setfield(L, -2, name); -+} -+ -+ -+static void base_open (lua_State *L) { -+ /* set global _G */ -+ lua_pushvalue(L, LUA_GLOBALSINDEX); -+ lua_setglobal(L, "_G"); -+ /* open lib into global table */ -+ luaL_register(L, "_G", base_funcs); -+ lua_pushliteral(L, LUA_VERSION); -+ lua_setglobal(L, "_VERSION"); /* set global _VERSION */ -+ /* `ipairs' and `pairs' need auxliliary functions as upvalues */ -+ auxopen(L, "ipairs", luaB_ipairs, ipairsaux); -+ auxopen(L, "pairs", luaB_pairs, luaB_next); -+ /* `newproxy' needs a weaktable as upvalue */ -+ lua_createtable(L, 0, 1); /* new table `w' */ -+ lua_pushvalue(L, -1); /* `w' will be its own metatable */ -+ lua_setmetatable(L, -2); -+ lua_pushliteral(L, "kv"); -+ lua_setfield(L, -2, "__mode"); /* metatable(w).__mode = "kv" */ -+ lua_pushcclosure(L, luaB_newproxy, 1); -+ lua_setglobal(L, "newproxy"); /* set global `newproxy' */ -+} -+ -+ -+LUALIB_API int luaopen_base (lua_State *L) { -+ base_open(L); -+ luaL_register(L, LUA_COLIBNAME, co_funcs); -+ return 2; -+} ---- /dev/null -+++ b/extensions/LUA/lua/lcode.c -@@ -0,0 +1,838 @@ -+/* -+** $Id: lcode.c,v 2.25.1.3 2007/12/28 15:32:23 roberto Exp $ -+** Code generator for Lua -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#define lcode_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lcode.h" -+#include "ldebug.h" -+#include "ldo.h" -+#include "lgc.h" -+#include "llex.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lopcodes.h" -+#include "lparser.h" -+#include "ltable.h" -+ -+ -+#define hasjumps(e) ((e)->t != (e)->f) -+ -+ -+static int isnumeral(expdesc *e) { -+ return (e->k == VKNUM && e->t == NO_JUMP && e->f == NO_JUMP); -+} -+ -+ -+void luaK_nil (FuncState *fs, int from, int n) { -+ Instruction *previous; -+ if (fs->pc > fs->lasttarget) { /* no jumps to current position? */ -+ if (fs->pc == 0) { /* function start? */ -+ if (from >= fs->nactvar) -+ return; /* positions are already clean */ -+ } -+ else { -+ previous = &fs->f->code[fs->pc-1]; -+ if (GET_OPCODE(*previous) == OP_LOADNIL) { -+ int pfrom = GETARG_A(*previous); -+ int pto = GETARG_B(*previous); -+ if (pfrom <= from && from <= pto+1) { /* can connect both? */ -+ if (from+n-1 > pto) -+ SETARG_B(*previous, from+n-1); -+ return; -+ } -+ } -+ } -+ } -+ luaK_codeABC(fs, OP_LOADNIL, from, from+n-1, 0); /* else no optimization */ -+} -+ -+ -+int luaK_jump (FuncState *fs) { -+ int jpc = fs->jpc; /* save list of jumps to here */ -+ int j; -+ fs->jpc = NO_JUMP; -+ j = luaK_codeAsBx(fs, OP_JMP, 0, NO_JUMP); -+ luaK_concat(fs, &j, jpc); /* keep them on hold */ -+ return j; -+} -+ -+ -+void luaK_ret (FuncState *fs, int first, int nret) { -+ luaK_codeABC(fs, OP_RETURN, first, nret+1, 0); -+} -+ -+ -+static int condjump (FuncState *fs, OpCode op, int A, int B, int C) { -+ luaK_codeABC(fs, op, A, B, C); -+ return luaK_jump(fs); -+} -+ -+ -+static void fixjump (FuncState *fs, int pc, int dest) { -+ Instruction *jmp = &fs->f->code[pc]; -+ int offset = dest-(pc+1); -+ lua_assert(dest != NO_JUMP); -+ if (abs(offset) > MAXARG_sBx) -+ luaX_syntaxerror(fs->ls, "control structure too long"); -+ SETARG_sBx(*jmp, offset); -+} -+ -+ -+/* -+** returns current `pc' and marks it as a jump target (to avoid wrong -+** optimizations with consecutive instructions not in the same basic block). -+*/ -+int luaK_getlabel (FuncState *fs) { -+ fs->lasttarget = fs->pc; -+ return fs->pc; -+} -+ -+ -+static int getjump (FuncState *fs, int pc) { -+ int offset = GETARG_sBx(fs->f->code[pc]); -+ if (offset == NO_JUMP) /* point to itself represents end of list */ -+ return NO_JUMP; /* end of list */ -+ else -+ return (pc+1)+offset; /* turn offset into absolute position */ -+} -+ -+ -+static Instruction *getjumpcontrol (FuncState *fs, int pc) { -+ Instruction *pi = &fs->f->code[pc]; -+ if (pc >= 1 && testTMode(GET_OPCODE(*(pi-1)))) -+ return pi-1; -+ else -+ return pi; -+} -+ -+ -+/* -+** check whether list has any jump that do not produce a value -+** (or produce an inverted value) -+*/ -+static int need_value (FuncState *fs, int list) { -+ for (; list != NO_JUMP; list = getjump(fs, list)) { -+ Instruction i = *getjumpcontrol(fs, list); -+ if (GET_OPCODE(i) != OP_TESTSET) return 1; -+ } -+ return 0; /* not found */ -+} -+ -+ -+static int patchtestreg (FuncState *fs, int node, int reg) { -+ Instruction *i = getjumpcontrol(fs, node); -+ if (GET_OPCODE(*i) != OP_TESTSET) -+ return 0; /* cannot patch other instructions */ -+ if (reg != NO_REG && reg != GETARG_B(*i)) -+ SETARG_A(*i, reg); -+ else /* no register to put value or register already has the value */ -+ *i = CREATE_ABC(OP_TEST, GETARG_B(*i), 0, GETARG_C(*i)); -+ -+ return 1; -+} -+ -+ -+static void removevalues (FuncState *fs, int list) { -+ for (; list != NO_JUMP; list = getjump(fs, list)) -+ patchtestreg(fs, list, NO_REG); -+} -+ -+ -+static void patchlistaux (FuncState *fs, int list, int vtarget, int reg, -+ int dtarget) { -+ while (list != NO_JUMP) { -+ int next = getjump(fs, list); -+ if (patchtestreg(fs, list, reg)) -+ fixjump(fs, list, vtarget); -+ else -+ fixjump(fs, list, dtarget); /* jump to default target */ -+ list = next; -+ } -+} -+ -+ -+static void dischargejpc (FuncState *fs) { -+ patchlistaux(fs, fs->jpc, fs->pc, NO_REG, fs->pc); -+ fs->jpc = NO_JUMP; -+} -+ -+ -+void luaK_patchlist (FuncState *fs, int list, int target) { -+ if (target == fs->pc) -+ luaK_patchtohere(fs, list); -+ else { -+ lua_assert(target < fs->pc); -+ patchlistaux(fs, list, target, NO_REG, target); -+ } -+} -+ -+ -+void luaK_patchtohere (FuncState *fs, int list) { -+ luaK_getlabel(fs); -+ luaK_concat(fs, &fs->jpc, list); -+} -+ -+ -+void luaK_concat (FuncState *fs, int *l1, int l2) { -+ if (l2 == NO_JUMP) return; -+ else if (*l1 == NO_JUMP) -+ *l1 = l2; -+ else { -+ int list = *l1; -+ int next; -+ while ((next = getjump(fs, list)) != NO_JUMP) /* find last element */ -+ list = next; -+ fixjump(fs, list, l2); -+ } -+} -+ -+ -+void luaK_checkstack (FuncState *fs, int n) { -+ int newstack = fs->freereg + n; -+ if (newstack > fs->f->maxstacksize) { -+ if (newstack >= MAXSTACK) -+ luaX_syntaxerror(fs->ls, "function or expression too complex"); -+ fs->f->maxstacksize = cast_byte(newstack); -+ } -+} -+ -+ -+void luaK_reserveregs (FuncState *fs, int n) { -+ luaK_checkstack(fs, n); -+ fs->freereg += n; -+} -+ -+ -+static void freereg (FuncState *fs, int reg) { -+ if (!ISK(reg) && reg >= fs->nactvar) { -+ fs->freereg--; -+ lua_assert(reg == fs->freereg); -+ } -+} -+ -+ -+static void freeexp (FuncState *fs, expdesc *e) { -+ if (e->k == VNONRELOC) -+ freereg(fs, e->u.s.info); -+} -+ -+ -+static int addk (FuncState *fs, TValue *k, TValue *v) { -+ lua_State *L = fs->L; -+ TValue *idx = luaH_set(L, fs->h, k); -+ Proto *f = fs->f; -+ int oldsize = f->sizek; -+ if (ttisnumber(idx)) { -+ lua_assert(luaO_rawequalObj(&fs->f->k[cast_int(nvalue(idx))], v)); -+ return cast_int(nvalue(idx)); -+ } -+ else { /* constant not found; create a new entry */ -+ setnvalue(idx, cast_num(fs->nk)); -+ luaM_growvector(L, f->k, fs->nk, f->sizek, TValue, -+ MAXARG_Bx, "constant table overflow"); -+ while (oldsize < f->sizek) setnilvalue(&f->k[oldsize++]); -+ setobj(L, &f->k[fs->nk], v); -+ luaC_barrier(L, f, v); -+ return fs->nk++; -+ } -+} -+ -+ -+int luaK_stringK (FuncState *fs, TString *s) { -+ TValue o; -+ setsvalue(fs->L, &o, s); -+ return addk(fs, &o, &o); -+} -+ -+ -+int luaK_numberK (FuncState *fs, lua_Number r) { -+ TValue o; -+ setnvalue(&o, r); -+ return addk(fs, &o, &o); -+} -+ -+ -+static int boolK (FuncState *fs, int b) { -+ TValue o; -+ setbvalue(&o, b); -+ return addk(fs, &o, &o); -+} -+ -+ -+static int nilK (FuncState *fs) { -+ TValue k, v; -+ setnilvalue(&v); -+ /* cannot use nil as key; instead use table itself to represent nil */ -+ sethvalue(fs->L, &k, fs->h); -+ return addk(fs, &k, &v); -+} -+ -+ -+void luaK_setreturns (FuncState *fs, expdesc *e, int nresults) { -+ if (e->k == VCALL) { /* expression is an open function call? */ -+ SETARG_C(getcode(fs, e), nresults+1); -+ } -+ else if (e->k == VVARARG) { -+ SETARG_B(getcode(fs, e), nresults+1); -+ SETARG_A(getcode(fs, e), fs->freereg); -+ luaK_reserveregs(fs, 1); -+ } -+} -+ -+ -+void luaK_setoneret (FuncState *fs, expdesc *e) { -+ if (e->k == VCALL) { /* expression is an open function call? */ -+ e->k = VNONRELOC; -+ e->u.s.info = GETARG_A(getcode(fs, e)); -+ } -+ else if (e->k == VVARARG) { -+ SETARG_B(getcode(fs, e), 2); -+ e->k = VRELOCABLE; /* can relocate its simple result */ -+ } -+} -+ -+ -+void luaK_dischargevars (FuncState *fs, expdesc *e) { -+ switch (e->k) { -+ case VLOCAL: { -+ e->k = VNONRELOC; -+ break; -+ } -+ case VUPVAL: { -+ e->u.s.info = luaK_codeABC(fs, OP_GETUPVAL, 0, e->u.s.info, 0); -+ e->k = VRELOCABLE; -+ break; -+ } -+ case VGLOBAL: { -+ e->u.s.info = luaK_codeABx(fs, OP_GETGLOBAL, 0, e->u.s.info); -+ e->k = VRELOCABLE; -+ break; -+ } -+ case VINDEXED: { -+ freereg(fs, e->u.s.aux); -+ freereg(fs, e->u.s.info); -+ e->u.s.info = luaK_codeABC(fs, OP_GETTABLE, 0, e->u.s.info, e->u.s.aux); -+ e->k = VRELOCABLE; -+ break; -+ } -+ case VVARARG: -+ case VCALL: { -+ luaK_setoneret(fs, e); -+ break; -+ } -+ default: break; /* there is one value available (somewhere) */ -+ } -+} -+ -+ -+static int code_label (FuncState *fs, int A, int b, int jump) { -+ luaK_getlabel(fs); /* those instructions may be jump targets */ -+ return luaK_codeABC(fs, OP_LOADBOOL, A, b, jump); -+} -+ -+ -+static void discharge2reg (FuncState *fs, expdesc *e, int reg) { -+ luaK_dischargevars(fs, e); -+ switch (e->k) { -+ case VNIL: { -+ luaK_nil(fs, reg, 1); -+ break; -+ } -+ case VFALSE: case VTRUE: { -+ luaK_codeABC(fs, OP_LOADBOOL, reg, e->k == VTRUE, 0); -+ break; -+ } -+ case VK: { -+ luaK_codeABx(fs, OP_LOADK, reg, e->u.s.info); -+ break; -+ } -+ case VKNUM: { -+ luaK_codeABx(fs, OP_LOADK, reg, luaK_numberK(fs, e->u.nval)); -+ break; -+ } -+ case VRELOCABLE: { -+ Instruction *pc = &getcode(fs, e); -+ SETARG_A(*pc, reg); -+ break; -+ } -+ case VNONRELOC: { -+ if (reg != e->u.s.info) -+ luaK_codeABC(fs, OP_MOVE, reg, e->u.s.info, 0); -+ break; -+ } -+ default: { -+ lua_assert(e->k == VVOID || e->k == VJMP); -+ return; /* nothing to do... */ -+ } -+ } -+ e->u.s.info = reg; -+ e->k = VNONRELOC; -+} -+ -+ -+static void discharge2anyreg (FuncState *fs, expdesc *e) { -+ if (e->k != VNONRELOC) { -+ luaK_reserveregs(fs, 1); -+ discharge2reg(fs, e, fs->freereg-1); -+ } -+} -+ -+ -+static void exp2reg (FuncState *fs, expdesc *e, int reg) { -+ discharge2reg(fs, e, reg); -+ if (e->k == VJMP) -+ luaK_concat(fs, &e->t, e->u.s.info); /* put this jump in `t' list */ -+ if (hasjumps(e)) { -+ int final; /* position after whole expression */ -+ int p_f = NO_JUMP; /* position of an eventual LOAD false */ -+ int p_t = NO_JUMP; /* position of an eventual LOAD true */ -+ if (need_value(fs, e->t) || need_value(fs, e->f)) { -+ int fj = (e->k == VJMP) ? NO_JUMP : luaK_jump(fs); -+ p_f = code_label(fs, reg, 0, 1); -+ p_t = code_label(fs, reg, 1, 0); -+ luaK_patchtohere(fs, fj); -+ } -+ final = luaK_getlabel(fs); -+ patchlistaux(fs, e->f, final, reg, p_f); -+ patchlistaux(fs, e->t, final, reg, p_t); -+ } -+ e->f = e->t = NO_JUMP; -+ e->u.s.info = reg; -+ e->k = VNONRELOC; -+} -+ -+ -+void luaK_exp2nextreg (FuncState *fs, expdesc *e) { -+ luaK_dischargevars(fs, e); -+ freeexp(fs, e); -+ luaK_reserveregs(fs, 1); -+ exp2reg(fs, e, fs->freereg - 1); -+} -+ -+ -+int luaK_exp2anyreg (FuncState *fs, expdesc *e) { -+ luaK_dischargevars(fs, e); -+ if (e->k == VNONRELOC) { -+ if (!hasjumps(e)) return e->u.s.info; /* exp is already in a register */ -+ if (e->u.s.info >= fs->nactvar) { /* reg. is not a local? */ -+ exp2reg(fs, e, e->u.s.info); /* put value on it */ -+ return e->u.s.info; -+ } -+ } -+ luaK_exp2nextreg(fs, e); /* default */ -+ return e->u.s.info; -+} -+ -+ -+void luaK_exp2val (FuncState *fs, expdesc *e) { -+ if (hasjumps(e)) -+ luaK_exp2anyreg(fs, e); -+ else -+ luaK_dischargevars(fs, e); -+} -+ -+ -+int luaK_exp2RK (FuncState *fs, expdesc *e) { -+ luaK_exp2val(fs, e); -+ switch (e->k) { -+ case VKNUM: -+ case VTRUE: -+ case VFALSE: -+ case VNIL: { -+ if (fs->nk <= MAXINDEXRK) { /* constant fit in RK operand? */ -+ e->u.s.info = (e->k == VNIL) ? nilK(fs) : -+ (e->k == VKNUM) ? luaK_numberK(fs, e->u.nval) : -+ boolK(fs, (e->k == VTRUE)); -+ e->k = VK; -+ return RKASK(e->u.s.info); -+ } -+ else break; -+ } -+ case VK: { -+ if (e->u.s.info <= MAXINDEXRK) /* constant fit in argC? */ -+ return RKASK(e->u.s.info); -+ else break; -+ } -+ default: break; -+ } -+ /* not a constant in the right range: put it in a register */ -+ return luaK_exp2anyreg(fs, e); -+} -+ -+ -+void luaK_storevar (FuncState *fs, expdesc *var, expdesc *ex) { -+ switch (var->k) { -+ case VLOCAL: { -+ freeexp(fs, ex); -+ exp2reg(fs, ex, var->u.s.info); -+ return; -+ } -+ case VUPVAL: { -+ int e = luaK_exp2anyreg(fs, ex); -+ luaK_codeABC(fs, OP_SETUPVAL, e, var->u.s.info, 0); -+ break; -+ } -+ case VGLOBAL: { -+ int e = luaK_exp2anyreg(fs, ex); -+ luaK_codeABx(fs, OP_SETGLOBAL, e, var->u.s.info); -+ break; -+ } -+ case VINDEXED: { -+ int e = luaK_exp2RK(fs, ex); -+ luaK_codeABC(fs, OP_SETTABLE, var->u.s.info, var->u.s.aux, e); -+ break; -+ } -+ default: { -+ lua_assert(0); /* invalid var kind to store */ -+ break; -+ } -+ } -+ freeexp(fs, ex); -+} -+ -+ -+void luaK_self (FuncState *fs, expdesc *e, expdesc *key) { -+ int func; -+ luaK_exp2anyreg(fs, e); -+ freeexp(fs, e); -+ func = fs->freereg; -+ luaK_reserveregs(fs, 2); -+ luaK_codeABC(fs, OP_SELF, func, e->u.s.info, luaK_exp2RK(fs, key)); -+ freeexp(fs, key); -+ e->u.s.info = func; -+ e->k = VNONRELOC; -+} -+ -+ -+static void invertjump (FuncState *fs, expdesc *e) { -+ Instruction *pc = getjumpcontrol(fs, e->u.s.info); -+ lua_assert(testTMode(GET_OPCODE(*pc)) && GET_OPCODE(*pc) != OP_TESTSET && -+ GET_OPCODE(*pc) != OP_TEST); -+ SETARG_A(*pc, !(GETARG_A(*pc))); -+} -+ -+ -+static int jumponcond (FuncState *fs, expdesc *e, int cond) { -+ if (e->k == VRELOCABLE) { -+ Instruction ie = getcode(fs, e); -+ if (GET_OPCODE(ie) == OP_NOT) { -+ fs->pc--; /* remove previous OP_NOT */ -+ return condjump(fs, OP_TEST, GETARG_B(ie), 0, !cond); -+ } -+ /* else go through */ -+ } -+ discharge2anyreg(fs, e); -+ freeexp(fs, e); -+ return condjump(fs, OP_TESTSET, NO_REG, e->u.s.info, cond); -+} -+ -+ -+void luaK_goiftrue (FuncState *fs, expdesc *e) { -+ int pc; /* pc of last jump */ -+ luaK_dischargevars(fs, e); -+ switch (e->k) { -+ case VK: case VKNUM: case VTRUE: { -+ pc = NO_JUMP; /* always true; do nothing */ -+ break; -+ } -+ case VFALSE: { -+ pc = luaK_jump(fs); /* always jump */ -+ break; -+ } -+ case VJMP: { -+ invertjump(fs, e); -+ pc = e->u.s.info; -+ break; -+ } -+ default: { -+ pc = jumponcond(fs, e, 0); -+ break; -+ } -+ } -+ luaK_concat(fs, &e->f, pc); /* insert last jump in `f' list */ -+ luaK_patchtohere(fs, e->t); -+ e->t = NO_JUMP; -+} -+ -+ -+static void luaK_goiffalse (FuncState *fs, expdesc *e) { -+ int pc; /* pc of last jump */ -+ luaK_dischargevars(fs, e); -+ switch (e->k) { -+ case VNIL: case VFALSE: { -+ pc = NO_JUMP; /* always false; do nothing */ -+ break; -+ } -+ case VTRUE: { -+ pc = luaK_jump(fs); /* always jump */ -+ break; -+ } -+ case VJMP: { -+ pc = e->u.s.info; -+ break; -+ } -+ default: { -+ pc = jumponcond(fs, e, 1); -+ break; -+ } -+ } -+ luaK_concat(fs, &e->t, pc); /* insert last jump in `t' list */ -+ luaK_patchtohere(fs, e->f); -+ e->f = NO_JUMP; -+} -+ -+ -+static void codenot (FuncState *fs, expdesc *e) { -+ luaK_dischargevars(fs, e); -+ switch (e->k) { -+ case VNIL: case VFALSE: { -+ e->k = VTRUE; -+ break; -+ } -+ case VK: case VKNUM: case VTRUE: { -+ e->k = VFALSE; -+ break; -+ } -+ case VJMP: { -+ invertjump(fs, e); -+ break; -+ } -+ case VRELOCABLE: -+ case VNONRELOC: { -+ discharge2anyreg(fs, e); -+ freeexp(fs, e); -+ e->u.s.info = luaK_codeABC(fs, OP_NOT, 0, e->u.s.info, 0); -+ e->k = VRELOCABLE; -+ break; -+ } -+ default: { -+ lua_assert(0); /* cannot happen */ -+ break; -+ } -+ } -+ /* interchange true and false lists */ -+ { int temp = e->f; e->f = e->t; e->t = temp; } -+ removevalues(fs, e->f); -+ removevalues(fs, e->t); -+} -+ -+ -+void luaK_indexed (FuncState *fs, expdesc *t, expdesc *k) { -+ t->u.s.aux = luaK_exp2RK(fs, k); -+ t->k = VINDEXED; -+} -+ -+ -+static int constfolding (OpCode op, expdesc *e1, expdesc *e2) { -+ lua_Number v1, v2, r; -+ if (!isnumeral(e1) || !isnumeral(e2)) return 0; -+ v1 = e1->u.nval; -+ v2 = e2->u.nval; -+ switch (op) { -+ case OP_ADD: r = luai_numadd(v1, v2); break; -+ case OP_SUB: r = luai_numsub(v1, v2); break; -+ case OP_MUL: r = luai_nummul(v1, v2); break; -+ case OP_DIV: -+ if (v2 == 0) return 0; /* do not attempt to divide by 0 */ -+ r = luai_numdiv(v1, v2); break; -+ case OP_MOD: -+ if (v2 == 0) return 0; /* do not attempt to divide by 0 */ -+ r = luai_nummod(v1, v2); break; -+ case OP_POW: r = luai_numpow(v1, v2); break; -+ case OP_UNM: r = luai_numunm(v1); break; -+ case OP_LEN: return 0; /* no constant folding for 'len' */ -+ default: lua_assert(0); r = 0; break; -+ } -+ if (luai_numisnan(r)) return 0; /* do not attempt to produce NaN */ -+ e1->u.nval = r; -+ return 1; -+} -+ -+ -+static void codearith (FuncState *fs, OpCode op, expdesc *e1, expdesc *e2) { -+ if (constfolding(op, e1, e2)) -+ return; -+ else { -+ int o2 = (op != OP_UNM && op != OP_LEN) ? luaK_exp2RK(fs, e2) : 0; -+ int o1 = luaK_exp2RK(fs, e1); -+ if (o1 > o2) { -+ freeexp(fs, e1); -+ freeexp(fs, e2); -+ } -+ else { -+ freeexp(fs, e2); -+ freeexp(fs, e1); -+ } -+ e1->u.s.info = luaK_codeABC(fs, op, 0, o1, o2); -+ e1->k = VRELOCABLE; -+ } -+} -+ -+ -+static void codecomp (FuncState *fs, OpCode op, int cond, expdesc *e1, -+ expdesc *e2) { -+ int o1 = luaK_exp2RK(fs, e1); -+ int o2 = luaK_exp2RK(fs, e2); -+ freeexp(fs, e2); -+ freeexp(fs, e1); -+ if (cond == 0 && op != OP_EQ) { -+ int temp; /* exchange args to replace by `<' or `<=' */ -+ temp = o1; o1 = o2; o2 = temp; /* o1 <==> o2 */ -+ cond = 1; -+ } -+ e1->u.s.info = condjump(fs, op, cond, o1, o2); -+ e1->k = VJMP; -+} -+ -+ -+void luaK_prefix (FuncState *fs, UnOpr op, expdesc *e) { -+ expdesc e2; -+ e2.t = e2.f = NO_JUMP; e2.k = VKNUM; e2.u.nval = 0; -+ switch (op) { -+ case OPR_MINUS: { -+ if (!isnumeral(e)) -+ luaK_exp2anyreg(fs, e); /* cannot operate on non-numeric constants */ -+ codearith(fs, OP_UNM, e, &e2); -+ break; -+ } -+ case OPR_NOT: codenot(fs, e); break; -+ case OPR_LEN: { -+ luaK_exp2anyreg(fs, e); /* cannot operate on constants */ -+ codearith(fs, OP_LEN, e, &e2); -+ break; -+ } -+ default: lua_assert(0); -+ } -+} -+ -+ -+void luaK_infix (FuncState *fs, BinOpr op, expdesc *v) { -+ switch (op) { -+ case OPR_AND: { -+ luaK_goiftrue(fs, v); -+ break; -+ } -+ case OPR_OR: { -+ luaK_goiffalse(fs, v); -+ break; -+ } -+ case OPR_CONCAT: { -+ luaK_exp2nextreg(fs, v); /* operand must be on the `stack' */ -+ break; -+ } -+ case OPR_ADD: case OPR_SUB: case OPR_MUL: case OPR_DIV: -+ case OPR_MOD: case OPR_POW: { -+ if (!isnumeral(v)) luaK_exp2RK(fs, v); -+ break; -+ } -+ default: { -+ luaK_exp2RK(fs, v); -+ break; -+ } -+ } -+} -+ -+ -+void luaK_posfix (FuncState *fs, BinOpr op, expdesc *e1, expdesc *e2) { -+ switch (op) { -+ case OPR_AND: { -+ lua_assert(e1->t == NO_JUMP); /* list must be closed */ -+ luaK_dischargevars(fs, e2); -+ luaK_concat(fs, &e2->f, e1->f); -+ *e1 = *e2; -+ break; -+ } -+ case OPR_OR: { -+ lua_assert(e1->f == NO_JUMP); /* list must be closed */ -+ luaK_dischargevars(fs, e2); -+ luaK_concat(fs, &e2->t, e1->t); -+ *e1 = *e2; -+ break; -+ } -+ case OPR_CONCAT: { -+ luaK_exp2val(fs, e2); -+ if (e2->k == VRELOCABLE && GET_OPCODE(getcode(fs, e2)) == OP_CONCAT) { -+ lua_assert(e1->u.s.info == GETARG_B(getcode(fs, e2))-1); -+ freeexp(fs, e1); -+ SETARG_B(getcode(fs, e2), e1->u.s.info); -+ e1->k = VRELOCABLE; e1->u.s.info = e2->u.s.info; -+ } -+ else { -+ luaK_exp2nextreg(fs, e2); /* operand must be on the 'stack' */ -+ codearith(fs, OP_CONCAT, e1, e2); -+ } -+ break; -+ } -+ case OPR_ADD: codearith(fs, OP_ADD, e1, e2); break; -+ case OPR_SUB: codearith(fs, OP_SUB, e1, e2); break; -+ case OPR_MUL: codearith(fs, OP_MUL, e1, e2); break; -+ case OPR_DIV: codearith(fs, OP_DIV, e1, e2); break; -+ case OPR_MOD: codearith(fs, OP_MOD, e1, e2); break; -+ case OPR_POW: codearith(fs, OP_POW, e1, e2); break; -+ case OPR_EQ: codecomp(fs, OP_EQ, 1, e1, e2); break; -+ case OPR_NE: codecomp(fs, OP_EQ, 0, e1, e2); break; -+ case OPR_LT: codecomp(fs, OP_LT, 1, e1, e2); break; -+ case OPR_LE: codecomp(fs, OP_LE, 1, e1, e2); break; -+ case OPR_GT: codecomp(fs, OP_LT, 0, e1, e2); break; -+ case OPR_GE: codecomp(fs, OP_LE, 0, e1, e2); break; -+ default: lua_assert(0); -+ } -+} -+ -+ -+void luaK_fixline (FuncState *fs, int line) { -+ fs->f->lineinfo[fs->pc - 1] = line; -+} -+ -+ -+static int luaK_code (FuncState *fs, Instruction i, int line) { -+ Proto *f = fs->f; -+ dischargejpc(fs); /* `pc' will change */ -+ /* put new instruction in code array */ -+ luaM_growvector(fs->L, f->code, fs->pc, f->sizecode, Instruction, -+ MAX_INT, "code size overflow"); -+ f->code[fs->pc] = i; -+ /* save corresponding line information */ -+ luaM_growvector(fs->L, f->lineinfo, fs->pc, f->sizelineinfo, int, -+ MAX_INT, "code size overflow"); -+ f->lineinfo[fs->pc] = line; -+ return fs->pc++; -+} -+ -+ -+int luaK_codeABC (FuncState *fs, OpCode o, int a, int b, int c) { -+ lua_assert(getOpMode(o) == iABC); -+ lua_assert(getBMode(o) != OpArgN || b == 0); -+ lua_assert(getCMode(o) != OpArgN || c == 0); -+ return luaK_code(fs, CREATE_ABC(o, a, b, c), fs->ls->lastline); -+} -+ -+ -+int luaK_codeABx (FuncState *fs, OpCode o, int a, unsigned int bc) { -+ lua_assert(getOpMode(o) == iABx || getOpMode(o) == iAsBx); -+ lua_assert(getCMode(o) == OpArgN); -+ return luaK_code(fs, CREATE_ABx(o, a, bc), fs->ls->lastline); -+} -+ -+ -+void luaK_setlist (FuncState *fs, int base, int nelems, int tostore) { -+ int c = (nelems - 1)/LFIELDS_PER_FLUSH + 1; -+ int b = (tostore == LUA_MULTRET) ? 0 : tostore; -+ lua_assert(tostore != 0); -+ if (c <= MAXARG_C) -+ luaK_codeABC(fs, OP_SETLIST, base, b, c); -+ else { -+ luaK_codeABC(fs, OP_SETLIST, base, b, 0); -+ luaK_code(fs, cast(Instruction, c), fs->ls->lastline); -+ } -+ fs->freereg = base + 1; /* free registers with list values */ -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lcode.h -@@ -0,0 +1,76 @@ -+/* -+** $Id: lcode.h,v 1.48.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Code generator for Lua -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lcode_h -+#define lcode_h -+ -+#include "llex.h" -+#include "lobject.h" -+#include "lopcodes.h" -+#include "lparser.h" -+ -+ -+/* -+** Marks the end of a patch list. It is an invalid value both as an absolute -+** address, and as a list link (would link an element to itself). -+*/ -+#define NO_JUMP (-1) -+ -+ -+/* -+** grep "ORDER OPR" if you change these enums -+*/ -+typedef enum BinOpr { -+ OPR_ADD, OPR_SUB, OPR_MUL, OPR_DIV, OPR_MOD, OPR_POW, -+ OPR_CONCAT, -+ OPR_NE, OPR_EQ, -+ OPR_LT, OPR_LE, OPR_GT, OPR_GE, -+ OPR_AND, OPR_OR, -+ OPR_NOBINOPR -+} BinOpr; -+ -+ -+typedef enum UnOpr { OPR_MINUS, OPR_NOT, OPR_LEN, OPR_NOUNOPR } UnOpr; -+ -+ -+#define getcode(fs,e) ((fs)->f->code[(e)->u.s.info]) -+ -+#define luaK_codeAsBx(fs,o,A,sBx) luaK_codeABx(fs,o,A,(sBx)+MAXARG_sBx) -+ -+#define luaK_setmultret(fs,e) luaK_setreturns(fs, e, LUA_MULTRET) -+ -+LUAI_FUNC int luaK_codeABx (FuncState *fs, OpCode o, int A, unsigned int Bx); -+LUAI_FUNC int luaK_codeABC (FuncState *fs, OpCode o, int A, int B, int C); -+LUAI_FUNC void luaK_fixline (FuncState *fs, int line); -+LUAI_FUNC void luaK_nil (FuncState *fs, int from, int n); -+LUAI_FUNC void luaK_reserveregs (FuncState *fs, int n); -+LUAI_FUNC void luaK_checkstack (FuncState *fs, int n); -+LUAI_FUNC int luaK_stringK (FuncState *fs, TString *s); -+LUAI_FUNC int luaK_numberK (FuncState *fs, lua_Number r); -+LUAI_FUNC void luaK_dischargevars (FuncState *fs, expdesc *e); -+LUAI_FUNC int luaK_exp2anyreg (FuncState *fs, expdesc *e); -+LUAI_FUNC void luaK_exp2nextreg (FuncState *fs, expdesc *e); -+LUAI_FUNC void luaK_exp2val (FuncState *fs, expdesc *e); -+LUAI_FUNC int luaK_exp2RK (FuncState *fs, expdesc *e); -+LUAI_FUNC void luaK_self (FuncState *fs, expdesc *e, expdesc *key); -+LUAI_FUNC void luaK_indexed (FuncState *fs, expdesc *t, expdesc *k); -+LUAI_FUNC void luaK_goiftrue (FuncState *fs, expdesc *e); -+LUAI_FUNC void luaK_storevar (FuncState *fs, expdesc *var, expdesc *e); -+LUAI_FUNC void luaK_setreturns (FuncState *fs, expdesc *e, int nresults); -+LUAI_FUNC void luaK_setoneret (FuncState *fs, expdesc *e); -+LUAI_FUNC int luaK_jump (FuncState *fs); -+LUAI_FUNC void luaK_ret (FuncState *fs, int first, int nret); -+LUAI_FUNC void luaK_patchlist (FuncState *fs, int list, int target); -+LUAI_FUNC void luaK_patchtohere (FuncState *fs, int list); -+LUAI_FUNC void luaK_concat (FuncState *fs, int *l1, int l2); -+LUAI_FUNC int luaK_getlabel (FuncState *fs); -+LUAI_FUNC void luaK_prefix (FuncState *fs, UnOpr op, expdesc *v); -+LUAI_FUNC void luaK_infix (FuncState *fs, BinOpr op, expdesc *v); -+LUAI_FUNC void luaK_posfix (FuncState *fs, BinOpr op, expdesc *v1, expdesc *v2); -+LUAI_FUNC void luaK_setlist (FuncState *fs, int base, int nelems, int tostore); -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/ldebug.c -@@ -0,0 +1,637 @@ -+/* -+** $Id: ldebug.c,v 2.29.1.6 2008/05/08 16:56:26 roberto Exp $ -+** Debug Interface -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+#include -+#include -+ -+#define ldebug_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lapi.h" -+#include "lcode.h" -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "lobject.h" -+#include "lopcodes.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "ltm.h" -+#include "lvm.h" -+ -+ -+ -+static const char *getfuncname (lua_State *L, CallInfo *ci, const char **name); -+ -+ -+static int currentpc (lua_State *L, CallInfo *ci) { -+ if (!isLua(ci)) return -1; /* function is not a Lua function? */ -+ if (ci == L->ci) -+ ci->savedpc = L->savedpc; -+ return pcRel(ci->savedpc, ci_func(ci)->l.p); -+} -+ -+ -+static int currentline (lua_State *L, CallInfo *ci) { -+ int pc = currentpc(L, ci); -+ if (pc < 0) -+ return -1; /* only active lua functions have current-line information */ -+ else -+ return getline(ci_func(ci)->l.p, pc); -+} -+ -+ -+/* -+** this function can be called asynchronous (e.g. during a signal) -+*/ -+LUA_API int lua_sethook (lua_State *L, lua_Hook func, int mask, int count) { -+ if (func == NULL || mask == 0) { /* turn off hooks? */ -+ mask = 0; -+ func = NULL; -+ } -+ L->hook = func; -+ L->basehookcount = count; -+ resethookcount(L); -+ L->hookmask = cast_byte(mask); -+ return 1; -+} -+ -+ -+LUA_API lua_Hook lua_gethook (lua_State *L) { -+ return L->hook; -+} -+ -+ -+LUA_API int lua_gethookmask (lua_State *L) { -+ return L->hookmask; -+} -+ -+ -+LUA_API int lua_gethookcount (lua_State *L) { -+ return L->basehookcount; -+} -+ -+ -+LUA_API int lua_getstack (lua_State *L, int level, lua_Debug *ar) { -+ int status; -+ CallInfo *ci; -+ lua_lock(L); -+ for (ci = L->ci; level > 0 && ci > L->base_ci; ci--) { -+ level--; -+ if (f_isLua(ci)) /* Lua function? */ -+ level -= ci->tailcalls; /* skip lost tail calls */ -+ } -+ if (level == 0 && ci > L->base_ci) { /* level found? */ -+ status = 1; -+ ar->i_ci = cast_int(ci - L->base_ci); -+ } -+ else if (level < 0) { /* level is of a lost tail call? */ -+ status = 1; -+ ar->i_ci = 0; -+ } -+ else status = 0; /* no such level */ -+ lua_unlock(L); -+ return status; -+} -+ -+ -+static Proto *getluaproto (CallInfo *ci) { -+ return (isLua(ci) ? ci_func(ci)->l.p : NULL); -+} -+ -+ -+static const char *findlocal (lua_State *L, CallInfo *ci, int n) { -+ const char *name; -+ Proto *fp = getluaproto(ci); -+ if (fp && (name = luaF_getlocalname(fp, n, currentpc(L, ci))) != NULL) -+ return name; /* is a local variable in a Lua function */ -+ else { -+ StkId limit = (ci == L->ci) ? L->top : (ci+1)->func; -+ if (limit - ci->base >= n && n > 0) /* is 'n' inside 'ci' stack? */ -+ return "(*temporary)"; -+ else -+ return NULL; -+ } -+} -+ -+ -+LUA_API const char *lua_getlocal (lua_State *L, const lua_Debug *ar, int n) { -+ CallInfo *ci = L->base_ci + ar->i_ci; -+ const char *name = findlocal(L, ci, n); -+ lua_lock(L); -+ if (name) -+ luaA_pushobject(L, ci->base + (n - 1)); -+ lua_unlock(L); -+ return name; -+} -+ -+ -+LUA_API const char *lua_setlocal (lua_State *L, const lua_Debug *ar, int n) { -+ CallInfo *ci = L->base_ci + ar->i_ci; -+ const char *name = findlocal(L, ci, n); -+ lua_lock(L); -+ if (name) -+ setobjs2s(L, ci->base + (n - 1), L->top - 1); -+ L->top--; /* pop value */ -+ lua_unlock(L); -+ return name; -+} -+ -+ -+static void funcinfo (lua_Debug *ar, Closure *cl) { -+ if (cl->c.isC) { -+ ar->source = "=[C]"; -+ ar->linedefined = -1; -+ ar->lastlinedefined = -1; -+ ar->what = "C"; -+ } -+ else { -+ ar->source = getstr(cl->l.p->source); -+ ar->linedefined = cl->l.p->linedefined; -+ ar->lastlinedefined = cl->l.p->lastlinedefined; -+ ar->what = (ar->linedefined == 0) ? "main" : "Lua"; -+ } -+ luaO_chunkid(ar->short_src, ar->source, LUA_IDSIZE); -+} -+ -+ -+static void info_tailcall (lua_Debug *ar) { -+ ar->name = ar->namewhat = ""; -+ ar->what = "tail"; -+ ar->lastlinedefined = ar->linedefined = ar->currentline = -1; -+ ar->source = "=(tail call)"; -+ luaO_chunkid(ar->short_src, ar->source, LUA_IDSIZE); -+ ar->nups = 0; -+} -+ -+ -+static void collectvalidlines (lua_State *L, Closure *f) { -+ if (f == NULL || f->c.isC) { -+ setnilvalue(L->top); -+ } -+ else { -+ Table *t = luaH_new(L, 0, 0); -+ int *lineinfo = f->l.p->lineinfo; -+ int i; -+ for (i=0; il.p->sizelineinfo; i++) -+ setbvalue(luaH_setnum(L, t, lineinfo[i]), 1); -+ sethvalue(L, L->top, t); -+ } -+ incr_top(L); -+} -+ -+ -+static int auxgetinfo (lua_State *L, const char *what, lua_Debug *ar, -+ Closure *f, CallInfo *ci) { -+ int status = 1; -+ if (f == NULL) { -+ info_tailcall(ar); -+ return status; -+ } -+ for (; *what; what++) { -+ switch (*what) { -+ case 'S': { -+ funcinfo(ar, f); -+ break; -+ } -+ case 'l': { -+ ar->currentline = (ci) ? currentline(L, ci) : -1; -+ break; -+ } -+ case 'u': { -+ ar->nups = f->c.nupvalues; -+ break; -+ } -+ case 'n': { -+ ar->namewhat = (ci) ? getfuncname(L, ci, &ar->name) : NULL; -+ if (ar->namewhat == NULL) { -+ ar->namewhat = ""; /* not found */ -+ ar->name = NULL; -+ } -+ break; -+ } -+ case 'L': -+ case 'f': /* handled by lua_getinfo */ -+ break; -+ default: status = 0; /* invalid option */ -+ } -+ } -+ return status; -+} -+ -+ -+LUA_API int lua_getinfo (lua_State *L, const char *what, lua_Debug *ar) { -+ int status; -+ Closure *f = NULL; -+ CallInfo *ci = NULL; -+ lua_lock(L); -+ if (*what == '>') { -+ StkId func = L->top - 1; -+ luai_apicheck(L, ttisfunction(func)); -+ what++; /* skip the '>' */ -+ f = clvalue(func); -+ L->top--; /* pop function */ -+ } -+ else if (ar->i_ci != 0) { /* no tail call? */ -+ ci = L->base_ci + ar->i_ci; -+ lua_assert(ttisfunction(ci->func)); -+ f = clvalue(ci->func); -+ } -+ status = auxgetinfo(L, what, ar, f, ci); -+ if (strchr(what, 'f')) { -+ if (f == NULL) setnilvalue(L->top); -+ else setclvalue(L, L->top, f); -+ incr_top(L); -+ } -+ if (strchr(what, 'L')) -+ collectvalidlines(L, f); -+ lua_unlock(L); -+ return status; -+} -+ -+ -+/* -+** {====================================================== -+** Symbolic Execution and code checker -+** ======================================================= -+*/ -+ -+#define check(x) if (!(x)) return 0; -+ -+#define checkjump(pt,pc) check(0 <= pc && pc < pt->sizecode) -+ -+#define checkreg(pt,reg) check((reg) < (pt)->maxstacksize) -+ -+ -+ -+static int precheck (const Proto *pt) { -+ check(pt->maxstacksize <= MAXSTACK); -+ check(pt->numparams+(pt->is_vararg & VARARG_HASARG) <= pt->maxstacksize); -+ check(!(pt->is_vararg & VARARG_NEEDSARG) || -+ (pt->is_vararg & VARARG_HASARG)); -+ check(pt->sizeupvalues <= pt->nups); -+ check(pt->sizelineinfo == pt->sizecode || pt->sizelineinfo == 0); -+ check(pt->sizecode > 0 && GET_OPCODE(pt->code[pt->sizecode-1]) == OP_RETURN); -+ return 1; -+} -+ -+ -+#define checkopenop(pt,pc) luaG_checkopenop((pt)->code[(pc)+1]) -+ -+int luaG_checkopenop (Instruction i) { -+ switch (GET_OPCODE(i)) { -+ case OP_CALL: -+ case OP_TAILCALL: -+ case OP_RETURN: -+ case OP_SETLIST: { -+ check(GETARG_B(i) == 0); -+ return 1; -+ } -+ default: return 0; /* invalid instruction after an open call */ -+ } -+} -+ -+ -+static int checkArgMode (const Proto *pt, int r, enum OpArgMask mode) { -+ switch (mode) { -+ case OpArgN: check(r == 0); break; -+ case OpArgU: break; -+ case OpArgR: checkreg(pt, r); break; -+ case OpArgK: -+ check(ISK(r) ? INDEXK(r) < pt->sizek : r < pt->maxstacksize); -+ break; -+ } -+ return 1; -+} -+ -+ -+static Instruction symbexec (const Proto *pt, int lastpc, int reg) { -+ int pc; -+ int last; /* stores position of last instruction that changed `reg' */ -+ last = pt->sizecode-1; /* points to final return (a `neutral' instruction) */ -+ check(precheck(pt)); -+ for (pc = 0; pc < lastpc; pc++) { -+ Instruction i = pt->code[pc]; -+ OpCode op = GET_OPCODE(i); -+ int a = GETARG_A(i); -+ int b = 0; -+ int c = 0; -+ check(op < NUM_OPCODES); -+ checkreg(pt, a); -+ switch (getOpMode(op)) { -+ case iABC: { -+ b = GETARG_B(i); -+ c = GETARG_C(i); -+ check(checkArgMode(pt, b, getBMode(op))); -+ check(checkArgMode(pt, c, getCMode(op))); -+ break; -+ } -+ case iABx: { -+ b = GETARG_Bx(i); -+ if (getBMode(op) == OpArgK) check(b < pt->sizek); -+ break; -+ } -+ case iAsBx: { -+ b = GETARG_sBx(i); -+ if (getBMode(op) == OpArgR) { -+ int dest = pc+1+b; -+ check(0 <= dest && dest < pt->sizecode); -+ if (dest > 0) { -+ int j; -+ /* check that it does not jump to a setlist count; this -+ is tricky, because the count from a previous setlist may -+ have the same value of an invalid setlist; so, we must -+ go all the way back to the first of them (if any) */ -+ for (j = 0; j < dest; j++) { -+ Instruction d = pt->code[dest-1-j]; -+ if (!(GET_OPCODE(d) == OP_SETLIST && GETARG_C(d) == 0)) break; -+ } -+ /* if 'j' is even, previous value is not a setlist (even if -+ it looks like one) */ -+ check((j&1) == 0); -+ } -+ } -+ break; -+ } -+ } -+ if (testAMode(op)) { -+ if (a == reg) last = pc; /* change register `a' */ -+ } -+ if (testTMode(op)) { -+ check(pc+2 < pt->sizecode); /* check skip */ -+ check(GET_OPCODE(pt->code[pc+1]) == OP_JMP); -+ } -+ switch (op) { -+ case OP_LOADBOOL: { -+ if (c == 1) { /* does it jump? */ -+ check(pc+2 < pt->sizecode); /* check its jump */ -+ check(GET_OPCODE(pt->code[pc+1]) != OP_SETLIST || -+ GETARG_C(pt->code[pc+1]) != 0); -+ } -+ break; -+ } -+ case OP_LOADNIL: { -+ if (a <= reg && reg <= b) -+ last = pc; /* set registers from `a' to `b' */ -+ break; -+ } -+ case OP_GETUPVAL: -+ case OP_SETUPVAL: { -+ check(b < pt->nups); -+ break; -+ } -+ case OP_GETGLOBAL: -+ case OP_SETGLOBAL: { -+ check(ttisstring(&pt->k[b])); -+ break; -+ } -+ case OP_SELF: { -+ checkreg(pt, a+1); -+ if (reg == a+1) last = pc; -+ break; -+ } -+ case OP_CONCAT: { -+ check(b < c); /* at least two operands */ -+ break; -+ } -+ case OP_TFORLOOP: { -+ check(c >= 1); /* at least one result (control variable) */ -+ checkreg(pt, a+2+c); /* space for results */ -+ if (reg >= a+2) last = pc; /* affect all regs above its base */ -+ break; -+ } -+ case OP_FORLOOP: -+ case OP_FORPREP: -+ checkreg(pt, a+3); -+ /* go through */ -+ case OP_JMP: { -+ int dest = pc+1+b; -+ /* not full check and jump is forward and do not skip `lastpc'? */ -+ if (reg != NO_REG && pc < dest && dest <= lastpc) -+ pc += b; /* do the jump */ -+ break; -+ } -+ case OP_CALL: -+ case OP_TAILCALL: { -+ if (b != 0) { -+ checkreg(pt, a+b-1); -+ } -+ c--; /* c = num. returns */ -+ if (c == LUA_MULTRET) { -+ check(checkopenop(pt, pc)); -+ } -+ else if (c != 0) -+ checkreg(pt, a+c-1); -+ if (reg >= a) last = pc; /* affect all registers above base */ -+ break; -+ } -+ case OP_RETURN: { -+ b--; /* b = num. returns */ -+ if (b > 0) checkreg(pt, a+b-1); -+ break; -+ } -+ case OP_SETLIST: { -+ if (b > 0) checkreg(pt, a + b); -+ if (c == 0) { -+ pc++; -+ check(pc < pt->sizecode - 1); -+ } -+ break; -+ } -+ case OP_CLOSURE: { -+ int nup, j; -+ check(b < pt->sizep); -+ nup = pt->p[b]->nups; -+ check(pc + nup < pt->sizecode); -+ for (j = 1; j <= nup; j++) { -+ OpCode op1 = GET_OPCODE(pt->code[pc + j]); -+ check(op1 == OP_GETUPVAL || op1 == OP_MOVE); -+ } -+ if (reg != NO_REG) /* tracing? */ -+ pc += nup; /* do not 'execute' these pseudo-instructions */ -+ break; -+ } -+ case OP_VARARG: { -+ check((pt->is_vararg & VARARG_ISVARARG) && -+ !(pt->is_vararg & VARARG_NEEDSARG)); -+ b--; -+ if (b == LUA_MULTRET) check(checkopenop(pt, pc)); -+ checkreg(pt, a+b-1); -+ break; -+ } -+ default: break; -+ } -+ } -+ return pt->code[last]; -+} -+ -+#undef check -+#undef checkjump -+#undef checkreg -+ -+/* }====================================================== */ -+ -+ -+int luaG_checkcode (const Proto *pt) { -+ return (symbexec(pt, pt->sizecode, NO_REG) != 0); -+} -+ -+ -+static const char *kname (Proto *p, int c) { -+ if (ISK(c) && ttisstring(&p->k[INDEXK(c)])) -+ return svalue(&p->k[INDEXK(c)]); -+ else -+ return "?"; -+} -+ -+ -+static const char *getobjname (lua_State *L, CallInfo *ci, int stackpos, -+ const char **name) { -+ if (isLua(ci)) { /* a Lua function? */ -+ Proto *p = ci_func(ci)->l.p; -+ int pc = currentpc(L, ci); -+ Instruction i; -+ *name = luaF_getlocalname(p, stackpos+1, pc); -+ if (*name) /* is a local? */ -+ return "local"; -+ i = symbexec(p, pc, stackpos); /* try symbolic execution */ -+ lua_assert(pc != -1); -+ switch (GET_OPCODE(i)) { -+ case OP_GETGLOBAL: { -+ int g = GETARG_Bx(i); /* global index */ -+ lua_assert(ttisstring(&p->k[g])); -+ *name = svalue(&p->k[g]); -+ return "global"; -+ } -+ case OP_MOVE: { -+ int a = GETARG_A(i); -+ int b = GETARG_B(i); /* move from `b' to `a' */ -+ if (b < a) -+ return getobjname(L, ci, b, name); /* get name for `b' */ -+ break; -+ } -+ case OP_GETTABLE: { -+ int k = GETARG_C(i); /* key index */ -+ *name = kname(p, k); -+ return "field"; -+ } -+ case OP_GETUPVAL: { -+ int u = GETARG_B(i); /* upvalue index */ -+ *name = p->upvalues ? getstr(p->upvalues[u]) : "?"; -+ return "upvalue"; -+ } -+ case OP_SELF: { -+ int k = GETARG_C(i); /* key index */ -+ *name = kname(p, k); -+ return "method"; -+ } -+ default: break; -+ } -+ } -+ return NULL; /* no useful name found */ -+} -+ -+ -+static const char *getfuncname (lua_State *L, CallInfo *ci, const char **name) { -+ Instruction i; -+ if ((isLua(ci) && ci->tailcalls > 0) || !isLua(ci - 1)) -+ return NULL; /* calling function is not Lua (or is unknown) */ -+ ci--; /* calling function */ -+ i = ci_func(ci)->l.p->code[currentpc(L, ci)]; -+ if (GET_OPCODE(i) == OP_CALL || GET_OPCODE(i) == OP_TAILCALL || -+ GET_OPCODE(i) == OP_TFORLOOP) -+ return getobjname(L, ci, GETARG_A(i), name); -+ else -+ return NULL; /* no useful name can be found */ -+} -+ -+ -+/* only ANSI way to check whether a pointer points to an array */ -+static int isinstack (CallInfo *ci, const TValue *o) { -+ StkId p; -+ for (p = ci->base; p < ci->top; p++) -+ if (o == p) return 1; -+ return 0; -+} -+ -+ -+void luaG_typeerror (lua_State *L, const TValue *o, const char *op) { -+ const char *name = NULL; -+ const char *t = luaT_typenames[ttype(o)]; -+ const char *kind = (isinstack(L->ci, o)) ? -+ getobjname(L, L->ci, cast_int(o - L->base), &name) : -+ NULL; -+ if (kind) -+ luaG_runerror(L, "attempt to %s %s " LUA_QS " (a %s value)", -+ op, kind, name, t); -+ else -+ luaG_runerror(L, "attempt to %s a %s value", op, t); -+} -+ -+ -+void luaG_concaterror (lua_State *L, StkId p1, StkId p2) { -+ if (ttisstring(p1) || ttisnumber(p1)) p1 = p2; -+ lua_assert(!ttisstring(p1) && !ttisnumber(p1)); -+ luaG_typeerror(L, p1, "concatenate"); -+} -+ -+ -+void luaG_aritherror (lua_State *L, const TValue *p1, const TValue *p2) { -+ TValue temp; -+ if (luaV_tonumber(p1, &temp) == NULL) -+ p2 = p1; /* first operand is wrong */ -+ luaG_typeerror(L, p2, "perform arithmetic on"); -+} -+ -+ -+int luaG_ordererror (lua_State *L, const TValue *p1, const TValue *p2) { -+ const char *t1 = luaT_typenames[ttype(p1)]; -+ const char *t2 = luaT_typenames[ttype(p2)]; -+ if (t1[2] == t2[2]) -+ luaG_runerror(L, "attempt to compare two %s values", t1); -+ else -+ luaG_runerror(L, "attempt to compare %s with %s", t1, t2); -+ return 0; -+} -+ -+ -+static void addinfo (lua_State *L, const char *msg) { -+ CallInfo *ci = L->ci; -+ if (isLua(ci)) { /* is Lua code? */ -+ char buff[LUA_IDSIZE]; /* add file:line information */ -+ int line = currentline(L, ci); -+ luaO_chunkid(buff, getstr(getluaproto(ci)->source), LUA_IDSIZE); -+ luaO_pushfstring(L, "%s:%d: %s", buff, line, msg); -+ } -+} -+ -+ -+void luaG_errormsg (lua_State *L) { -+ if (L->errfunc != 0) { /* is there an error handling function? */ -+ StkId errfunc = restorestack(L, L->errfunc); -+ if (!ttisfunction(errfunc)) luaD_throw(L, LUA_ERRERR); -+ setobjs2s(L, L->top, L->top - 1); /* move argument */ -+ setobjs2s(L, L->top - 1, errfunc); /* push function */ -+ incr_top(L); -+ luaD_call(L, L->top - 2, 1); /* call it */ -+ } -+ luaD_throw(L, LUA_ERRRUN); -+} -+ -+ -+void luaG_runerror (lua_State *L, const char *fmt, ...) { -+ va_list argp; -+ va_start(argp, fmt); -+ addinfo(L, luaO_pushvfstring(L, fmt, argp)); -+ va_end(argp); -+ luaG_errormsg(L); -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/ldebug.h -@@ -0,0 +1,33 @@ -+/* -+** $Id: ldebug.h,v 2.3.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Auxiliary functions from Debug Interface module -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef ldebug_h -+#define ldebug_h -+ -+ -+#include "lstate.h" -+ -+ -+#define pcRel(pc, p) (cast(int, (pc) - (p)->code) - 1) -+ -+#define getline(f,pc) (((f)->lineinfo) ? (f)->lineinfo[pc] : 0) -+ -+#define resethookcount(L) (L->hookcount = L->basehookcount) -+ -+ -+LUAI_FUNC void luaG_typeerror (lua_State *L, const TValue *o, -+ const char *opname); -+LUAI_FUNC void luaG_concaterror (lua_State *L, StkId p1, StkId p2); -+LUAI_FUNC void luaG_aritherror (lua_State *L, const TValue *p1, -+ const TValue *p2); -+LUAI_FUNC int luaG_ordererror (lua_State *L, const TValue *p1, -+ const TValue *p2); -+LUAI_FUNC void luaG_runerror (lua_State *L, const char *fmt, ...); -+LUAI_FUNC void luaG_errormsg (lua_State *L); -+LUAI_FUNC int luaG_checkcode (const Proto *pt); -+LUAI_FUNC int luaG_checkopenop (Instruction i); -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/ldo.c -@@ -0,0 +1,515 @@ -+/* -+** $Id: ldo.c,v 2.38.1.3 2008/01/18 22:31:22 roberto Exp $ -+** Stack and Call structure of Lua -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+#include -+#include -+ -+#define ldo_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "lgc.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lopcodes.h" -+#include "lparser.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "ltm.h" -+#include "lundump.h" -+#include "lvm.h" -+#include "lzio.h" -+ -+ -+ -+/* -+** {====================================================== -+** Error-recovery functions -+** ======================================================= -+*/ -+ -+ -+/* chain list of long jump buffers */ -+struct lua_longjmp { -+ struct lua_longjmp *previous; -+ luai_jmpbuf b; -+ volatile int status; /* error code */ -+}; -+ -+ -+void luaD_seterrorobj (lua_State *L, int errcode, StkId oldtop) { -+ switch (errcode) { -+ case LUA_ERRMEM: { -+ setsvalue2s(L, oldtop, luaS_newliteral(L, MEMERRMSG)); -+ break; -+ } -+ case LUA_ERRERR: { -+ setsvalue2s(L, oldtop, luaS_newliteral(L, "error in error handling")); -+ break; -+ } -+ case LUA_ERRSYNTAX: -+ case LUA_ERRRUN: { -+ setobjs2s(L, oldtop, L->top - 1); /* error message on current top */ -+ break; -+ } -+ } -+ L->top = oldtop + 1; -+} -+ -+ -+static void restore_stack_limit (lua_State *L) { -+ lua_assert(L->stack_last - L->stack == L->stacksize - EXTRA_STACK - 1); -+ if (L->size_ci > LUAI_MAXCALLS) { /* there was an overflow? */ -+ int inuse = cast_int(L->ci - L->base_ci); -+ if (inuse + 1 < LUAI_MAXCALLS) /* can `undo' overflow? */ -+ luaD_reallocCI(L, LUAI_MAXCALLS); -+ } -+} -+ -+ -+static void resetstack (lua_State *L, int status) { -+ L->ci = L->base_ci; -+ L->base = L->ci->base; -+ luaF_close(L, L->base); /* close eventual pending closures */ -+ luaD_seterrorobj(L, status, L->base); -+ L->nCcalls = L->baseCcalls; -+ L->allowhook = 1; -+ restore_stack_limit(L); -+ L->errfunc = 0; -+ L->errorJmp = NULL; -+} -+ -+ -+void luaD_throw (lua_State *L, int errcode) { -+ if (L->errorJmp) { -+ L->errorJmp->status = errcode; -+ LUAI_THROW(L, L->errorJmp); -+ } -+ else { -+ L->status = cast_byte(errcode); -+ if (G(L)->panic) { -+ resetstack(L, errcode); -+ lua_unlock(L); -+ G(L)->panic(L); -+ } -+ exit(EXIT_FAILURE); -+ } -+} -+ -+ -+int luaD_rawrunprotected (lua_State *L, Pfunc f, void *ud) { -+ struct lua_longjmp lj; -+ lj.status = 0; -+ lj.previous = L->errorJmp; /* chain new error handler */ -+ L->errorJmp = &lj; -+ LUAI_TRY(L, &lj, -+ (*f)(L, ud); -+ ); -+ L->errorJmp = lj.previous; /* restore old error handler */ -+ return lj.status; -+} -+ -+/* }====================================================== */ -+ -+ -+static void correctstack (lua_State *L, TValue *oldstack) { -+ CallInfo *ci; -+ GCObject *up; -+ L->top = (L->top - oldstack) + L->stack; -+ for (up = L->openupval; up != NULL; up = up->gch.next) -+ gco2uv(up)->v = (gco2uv(up)->v - oldstack) + L->stack; -+ for (ci = L->base_ci; ci <= L->ci; ci++) { -+ ci->top = (ci->top - oldstack) + L->stack; -+ ci->base = (ci->base - oldstack) + L->stack; -+ ci->func = (ci->func - oldstack) + L->stack; -+ } -+ L->base = (L->base - oldstack) + L->stack; -+} -+ -+ -+void luaD_reallocstack (lua_State *L, int newsize) { -+ TValue *oldstack = L->stack; -+ int realsize = newsize + 1 + EXTRA_STACK; -+ lua_assert(L->stack_last - L->stack == L->stacksize - EXTRA_STACK - 1); -+ luaM_reallocvector(L, L->stack, L->stacksize, realsize, TValue); -+ L->stacksize = realsize; -+ L->stack_last = L->stack+newsize; -+ correctstack(L, oldstack); -+} -+ -+ -+void luaD_reallocCI (lua_State *L, int newsize) { -+ CallInfo *oldci = L->base_ci; -+ luaM_reallocvector(L, L->base_ci, L->size_ci, newsize, CallInfo); -+ L->size_ci = newsize; -+ L->ci = (L->ci - oldci) + L->base_ci; -+ L->end_ci = L->base_ci + L->size_ci - 1; -+} -+ -+ -+void luaD_growstack (lua_State *L, int n) { -+ if (n <= L->stacksize) /* double size is enough? */ -+ luaD_reallocstack(L, 2*L->stacksize); -+ else -+ luaD_reallocstack(L, L->stacksize + n); -+} -+ -+ -+static CallInfo *growCI (lua_State *L) { -+ if (L->size_ci > LUAI_MAXCALLS) /* overflow while handling overflow? */ -+ luaD_throw(L, LUA_ERRERR); -+ else { -+ luaD_reallocCI(L, 2*L->size_ci); -+ if (L->size_ci > LUAI_MAXCALLS) -+ luaG_runerror(L, "stack overflow"); -+ } -+ return ++L->ci; -+} -+ -+ -+void luaD_callhook (lua_State *L, int event, int line) { -+ lua_Hook hook = L->hook; -+ if (hook && L->allowhook) { -+ ptrdiff_t top = savestack(L, L->top); -+ ptrdiff_t ci_top = savestack(L, L->ci->top); -+ lua_Debug ar; -+ ar.event = event; -+ ar.currentline = line; -+ if (event == LUA_HOOKTAILRET) -+ ar.i_ci = 0; /* tail call; no debug information about it */ -+ else -+ ar.i_ci = cast_int(L->ci - L->base_ci); -+ luaD_checkstack(L, LUA_MINSTACK); /* ensure minimum stack size */ -+ L->ci->top = L->top + LUA_MINSTACK; -+ lua_assert(L->ci->top <= L->stack_last); -+ L->allowhook = 0; /* cannot call hooks inside a hook */ -+ lua_unlock(L); -+ (*hook)(L, &ar); -+ lua_lock(L); -+ lua_assert(!L->allowhook); -+ L->allowhook = 1; -+ L->ci->top = restorestack(L, ci_top); -+ L->top = restorestack(L, top); -+ } -+} -+ -+ -+static StkId adjust_varargs (lua_State *L, Proto *p, int actual) { -+ int i; -+ int nfixargs = p->numparams; -+ Table *htab = NULL; -+ StkId base, fixed; -+ for (; actual < nfixargs; ++actual) -+ setnilvalue(L->top++); -+#if defined(LUA_COMPAT_VARARG) -+ if (p->is_vararg & VARARG_NEEDSARG) { /* compat. with old-style vararg? */ -+ int nvar = actual - nfixargs; /* number of extra arguments */ -+ lua_assert(p->is_vararg & VARARG_HASARG); -+ luaC_checkGC(L); -+ htab = luaH_new(L, nvar, 1); /* create `arg' table */ -+ for (i=0; itop - nvar + i); -+ /* store counter in field `n' */ -+ setnvalue(luaH_setstr(L, htab, luaS_newliteral(L, "n")), cast_num(nvar)); -+ } -+#endif -+ /* move fixed parameters to final position */ -+ fixed = L->top - actual; /* first fixed argument */ -+ base = L->top; /* final position of first argument */ -+ for (i=0; itop++, fixed+i); -+ setnilvalue(fixed+i); -+ } -+ /* add `arg' parameter */ -+ if (htab) { -+ sethvalue(L, L->top++, htab); -+ lua_assert(iswhite(obj2gco(htab))); -+ } -+ return base; -+} -+ -+ -+static StkId tryfuncTM (lua_State *L, StkId func) { -+ const TValue *tm = luaT_gettmbyobj(L, func, TM_CALL); -+ StkId p; -+ ptrdiff_t funcr = savestack(L, func); -+ if (!ttisfunction(tm)) -+ luaG_typeerror(L, func, "call"); -+ /* Open a hole inside the stack at `func' */ -+ for (p = L->top; p > func; p--) setobjs2s(L, p, p-1); -+ incr_top(L); -+ func = restorestack(L, funcr); /* previous call may change stack */ -+ setobj2s(L, func, tm); /* tag method is the new function to be called */ -+ return func; -+} -+ -+ -+ -+#define inc_ci(L) \ -+ ((L->ci == L->end_ci) ? growCI(L) : \ -+ (condhardstacktests(luaD_reallocCI(L, L->size_ci)), ++L->ci)) -+ -+ -+int luaD_precall (lua_State *L, StkId func, int nresults) { -+ LClosure *cl; -+ ptrdiff_t funcr; -+ if (!ttisfunction(func)) /* `func' is not a function? */ -+ func = tryfuncTM(L, func); /* check the `function' tag method */ -+ funcr = savestack(L, func); -+ cl = &clvalue(func)->l; -+ L->ci->savedpc = L->savedpc; -+ if (!cl->isC) { /* Lua function? prepare its call */ -+ CallInfo *ci; -+ StkId st, base; -+ Proto *p = cl->p; -+ luaD_checkstack(L, p->maxstacksize); -+ func = restorestack(L, funcr); -+ if (!p->is_vararg) { /* no varargs? */ -+ base = func + 1; -+ if (L->top > base + p->numparams) -+ L->top = base + p->numparams; -+ } -+ else { /* vararg function */ -+ int nargs = cast_int(L->top - func) - 1; -+ base = adjust_varargs(L, p, nargs); -+ func = restorestack(L, funcr); /* previous call may change the stack */ -+ } -+ ci = inc_ci(L); /* now `enter' new function */ -+ ci->func = func; -+ L->base = ci->base = base; -+ ci->top = L->base + p->maxstacksize; -+ lua_assert(ci->top <= L->stack_last); -+ L->savedpc = p->code; /* starting point */ -+ ci->tailcalls = 0; -+ ci->nresults = nresults; -+ for (st = L->top; st < ci->top; st++) -+ setnilvalue(st); -+ L->top = ci->top; -+ if (L->hookmask & LUA_MASKCALL) { -+ L->savedpc++; /* hooks assume 'pc' is already incremented */ -+ luaD_callhook(L, LUA_HOOKCALL, -1); -+ L->savedpc--; /* correct 'pc' */ -+ } -+ return PCRLUA; -+ } -+ else { /* if is a C function, call it */ -+ CallInfo *ci; -+ int n; -+ luaD_checkstack(L, LUA_MINSTACK); /* ensure minimum stack size */ -+ ci = inc_ci(L); /* now `enter' new function */ -+ ci->func = restorestack(L, funcr); -+ L->base = ci->base = ci->func + 1; -+ ci->top = L->top + LUA_MINSTACK; -+ lua_assert(ci->top <= L->stack_last); -+ ci->nresults = nresults; -+ if (L->hookmask & LUA_MASKCALL) -+ luaD_callhook(L, LUA_HOOKCALL, -1); -+ lua_unlock(L); -+ n = (*curr_func(L)->c.f)(L); /* do the actual call */ -+ lua_lock(L); -+ if (n < 0) /* yielding? */ -+ return PCRYIELD; -+ else { -+ luaD_poscall(L, L->top - n); -+ return PCRC; -+ } -+ } -+} -+ -+ -+static StkId callrethooks (lua_State *L, StkId firstResult) { -+ ptrdiff_t fr = savestack(L, firstResult); /* next call may change stack */ -+ luaD_callhook(L, LUA_HOOKRET, -1); -+ if (f_isLua(L->ci)) { /* Lua function? */ -+ while ((L->hookmask & LUA_MASKRET) && L->ci->tailcalls--) /* tail calls */ -+ luaD_callhook(L, LUA_HOOKTAILRET, -1); -+ } -+ return restorestack(L, fr); -+} -+ -+ -+int luaD_poscall (lua_State *L, StkId firstResult) { -+ StkId res; -+ int wanted, i; -+ CallInfo *ci; -+ if (L->hookmask & LUA_MASKRET) -+ firstResult = callrethooks(L, firstResult); -+ ci = L->ci--; -+ res = ci->func; /* res == final position of 1st result */ -+ wanted = ci->nresults; -+ L->base = (ci - 1)->base; /* restore base */ -+ L->savedpc = (ci - 1)->savedpc; /* restore savedpc */ -+ /* move results to correct place */ -+ for (i = wanted; i != 0 && firstResult < L->top; i--) -+ setobjs2s(L, res++, firstResult++); -+ while (i-- > 0) -+ setnilvalue(res++); -+ L->top = res; -+ return (wanted - LUA_MULTRET); /* 0 iff wanted == LUA_MULTRET */ -+} -+ -+ -+/* -+** Call a function (C or Lua). The function to be called is at *func. -+** The arguments are on the stack, right after the function. -+** When returns, all the results are on the stack, starting at the original -+** function position. -+*/ -+void luaD_call (lua_State *L, StkId func, int nResults) { -+ if (++L->nCcalls >= LUAI_MAXCCALLS) { -+ if (L->nCcalls == LUAI_MAXCCALLS) -+ luaG_runerror(L, "C stack overflow"); -+ else if (L->nCcalls >= (LUAI_MAXCCALLS + (LUAI_MAXCCALLS>>3))) -+ luaD_throw(L, LUA_ERRERR); /* error while handing stack error */ -+ } -+ if (luaD_precall(L, func, nResults) == PCRLUA) /* is a Lua function? */ -+ luaV_execute(L, 1); /* call it */ -+ L->nCcalls--; -+ luaC_checkGC(L); -+} -+ -+ -+static void resume (lua_State *L, void *ud) { -+ StkId firstArg = cast(StkId, ud); -+ CallInfo *ci = L->ci; -+ if (L->status == 0) { /* start coroutine? */ -+ lua_assert(ci == L->base_ci && firstArg > L->base); -+ if (luaD_precall(L, firstArg - 1, LUA_MULTRET) != PCRLUA) -+ return; -+ } -+ else { /* resuming from previous yield */ -+ lua_assert(L->status == LUA_YIELD); -+ L->status = 0; -+ if (!f_isLua(ci)) { /* `common' yield? */ -+ /* finish interrupted execution of `OP_CALL' */ -+ lua_assert(GET_OPCODE(*((ci-1)->savedpc - 1)) == OP_CALL || -+ GET_OPCODE(*((ci-1)->savedpc - 1)) == OP_TAILCALL); -+ if (luaD_poscall(L, firstArg)) /* complete it... */ -+ L->top = L->ci->top; /* and correct top if not multiple results */ -+ } -+ else /* yielded inside a hook: just continue its execution */ -+ L->base = L->ci->base; -+ } -+ luaV_execute(L, cast_int(L->ci - L->base_ci)); -+} -+ -+ -+static int resume_error (lua_State *L, const char *msg) { -+ L->top = L->ci->base; -+ setsvalue2s(L, L->top, luaS_new(L, msg)); -+ incr_top(L); -+ lua_unlock(L); -+ return LUA_ERRRUN; -+} -+ -+ -+LUA_API int lua_resume (lua_State *L, int nargs) { -+ int status; -+ lua_lock(L); -+ if (L->status != LUA_YIELD && (L->status != 0 || L->ci != L->base_ci)) -+ return resume_error(L, "cannot resume non-suspended coroutine"); -+ if (L->nCcalls >= LUAI_MAXCCALLS) -+ return resume_error(L, "C stack overflow"); -+ luai_userstateresume(L, nargs); -+ lua_assert(L->errfunc == 0); -+ L->baseCcalls = ++L->nCcalls; -+ status = luaD_rawrunprotected(L, resume, L->top - nargs); -+ if (status != 0) { /* error? */ -+ L->status = cast_byte(status); /* mark thread as `dead' */ -+ luaD_seterrorobj(L, status, L->top); -+ L->ci->top = L->top; -+ } -+ else { -+ lua_assert(L->nCcalls == L->baseCcalls); -+ status = L->status; -+ } -+ --L->nCcalls; -+ lua_unlock(L); -+ return status; -+} -+ -+ -+LUA_API int lua_yield (lua_State *L, int nresults) { -+ luai_userstateyield(L, nresults); -+ lua_lock(L); -+ if (L->nCcalls > L->baseCcalls) -+ luaG_runerror(L, "attempt to yield across metamethod/C-call boundary"); -+ L->base = L->top - nresults; /* protect stack slots below */ -+ L->status = LUA_YIELD; -+ lua_unlock(L); -+ return -1; -+} -+ -+ -+int luaD_pcall (lua_State *L, Pfunc func, void *u, -+ ptrdiff_t old_top, ptrdiff_t ef) { -+ int status; -+ unsigned short oldnCcalls = L->nCcalls; -+ ptrdiff_t old_ci = saveci(L, L->ci); -+ lu_byte old_allowhooks = L->allowhook; -+ ptrdiff_t old_errfunc = L->errfunc; -+ L->errfunc = ef; -+ status = luaD_rawrunprotected(L, func, u); -+ if (status != 0) { /* an error occurred? */ -+ StkId oldtop = restorestack(L, old_top); -+ luaF_close(L, oldtop); /* close eventual pending closures */ -+ luaD_seterrorobj(L, status, oldtop); -+ L->nCcalls = oldnCcalls; -+ L->ci = restoreci(L, old_ci); -+ L->base = L->ci->base; -+ L->savedpc = L->ci->savedpc; -+ L->allowhook = old_allowhooks; -+ restore_stack_limit(L); -+ } -+ L->errfunc = old_errfunc; -+ return status; -+} -+ -+ -+ -+/* -+** Execute a protected parser. -+*/ -+struct SParser { /* data to `f_parser' */ -+ ZIO *z; -+ Mbuffer buff; /* buffer to be used by the scanner */ -+ const char *name; -+}; -+ -+static void f_parser (lua_State *L, void *ud) { -+ int i; -+ Proto *tf; -+ Closure *cl; -+ struct SParser *p = cast(struct SParser *, ud); -+ int c = luaZ_lookahead(p->z); -+ luaC_checkGC(L); -+ tf = ((c == LUA_SIGNATURE[0]) ? luaU_undump : luaY_parser)(L, p->z, -+ &p->buff, p->name); -+ cl = luaF_newLclosure(L, tf->nups, hvalue(gt(L))); -+ cl->l.p = tf; -+ for (i = 0; i < tf->nups; i++) /* initialize eventual upvalues */ -+ cl->l.upvals[i] = luaF_newupval(L); -+ setclvalue(L, L->top, cl); -+ incr_top(L); -+} -+ -+ -+int luaD_protectedparser (lua_State *L, ZIO *z, const char *name) { -+ struct SParser p; -+ int status; -+ p.z = z; p.name = name; -+ luaZ_initbuffer(L, &p.buff); -+ status = luaD_pcall(L, f_parser, &p, savestack(L, L->top), L->errfunc); -+ luaZ_freebuffer(L, &p.buff); -+ return status; -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/ldo.h -@@ -0,0 +1,57 @@ -+/* -+** $Id: ldo.h,v 2.7.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Stack and Call structure of Lua -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef ldo_h -+#define ldo_h -+ -+ -+#include "lobject.h" -+#include "lstate.h" -+#include "lzio.h" -+ -+ -+#define luaD_checkstack(L,n) \ -+ if ((char *)L->stack_last - (char *)L->top <= (n)*(int)sizeof(TValue)) \ -+ luaD_growstack(L, n); \ -+ else condhardstacktests(luaD_reallocstack(L, L->stacksize - EXTRA_STACK - 1)); -+ -+ -+#define incr_top(L) {luaD_checkstack(L,1); L->top++;} -+ -+#define savestack(L,p) ((char *)(p) - (char *)L->stack) -+#define restorestack(L,n) ((TValue *)((char *)L->stack + (n))) -+ -+#define saveci(L,p) ((char *)(p) - (char *)L->base_ci) -+#define restoreci(L,n) ((CallInfo *)((char *)L->base_ci + (n))) -+ -+ -+/* results from luaD_precall */ -+#define PCRLUA 0 /* initiated a call to a Lua function */ -+#define PCRC 1 /* did a call to a C function */ -+#define PCRYIELD 2 /* C funtion yielded */ -+ -+ -+/* type of protected functions, to be ran by `runprotected' */ -+typedef void (*Pfunc) (lua_State *L, void *ud); -+ -+LUAI_FUNC int luaD_protectedparser (lua_State *L, ZIO *z, const char *name); -+LUAI_FUNC void luaD_callhook (lua_State *L, int event, int line); -+LUAI_FUNC int luaD_precall (lua_State *L, StkId func, int nresults); -+LUAI_FUNC void luaD_call (lua_State *L, StkId func, int nResults); -+LUAI_FUNC int luaD_pcall (lua_State *L, Pfunc func, void *u, -+ ptrdiff_t oldtop, ptrdiff_t ef); -+LUAI_FUNC int luaD_poscall (lua_State *L, StkId firstResult); -+LUAI_FUNC void luaD_reallocCI (lua_State *L, int newsize); -+LUAI_FUNC void luaD_reallocstack (lua_State *L, int newsize); -+LUAI_FUNC void luaD_growstack (lua_State *L, int n); -+ -+LUAI_FUNC void luaD_throw (lua_State *L, int errcode); -+LUAI_FUNC int luaD_rawrunprotected (lua_State *L, Pfunc f, void *ud); -+ -+LUAI_FUNC void luaD_seterrorobj (lua_State *L, int errcode, StkId oldtop); -+ -+#endif -+ ---- /dev/null -+++ b/extensions/LUA/lua/ldump.c -@@ -0,0 +1,164 @@ -+/* -+** $Id: ldump.c,v 2.8.1.1 2007/12/27 13:02:25 roberto Exp $ -+** save precompiled Lua chunks -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#define ldump_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lobject.h" -+#include "lstate.h" -+#include "lundump.h" -+ -+typedef struct { -+ lua_State* L; -+ lua_Writer writer; -+ void* data; -+ int strip; -+ int status; -+} DumpState; -+ -+#define DumpMem(b,n,size,D) DumpBlock(b,(n)*(size),D) -+#define DumpVar(x,D) DumpMem(&x,1,sizeof(x),D) -+ -+static void DumpBlock(const void* b, size_t size, DumpState* D) -+{ -+ if (D->status==0) -+ { -+ lua_unlock(D->L); -+ D->status=(*D->writer)(D->L,b,size,D->data); -+ lua_lock(D->L); -+ } -+} -+ -+static void DumpChar(int y, DumpState* D) -+{ -+ char x=(char)y; -+ DumpVar(x,D); -+} -+ -+static void DumpInt(int x, DumpState* D) -+{ -+ DumpVar(x,D); -+} -+ -+static void DumpNumber(lua_Number x, DumpState* D) -+{ -+ DumpVar(x,D); -+} -+ -+static void DumpVector(const void* b, int n, size_t size, DumpState* D) -+{ -+ DumpInt(n,D); -+ DumpMem(b,n,size,D); -+} -+ -+static void DumpString(const TString* s, DumpState* D) -+{ -+ if (s==NULL || getstr(s)==NULL) -+ { -+ size_t size=0; -+ DumpVar(size,D); -+ } -+ else -+ { -+ size_t size=s->tsv.len+1; /* include trailing '\0' */ -+ DumpVar(size,D); -+ DumpBlock(getstr(s),size,D); -+ } -+} -+ -+#define DumpCode(f,D) DumpVector(f->code,f->sizecode,sizeof(Instruction),D) -+ -+static void DumpFunction(const Proto* f, const TString* p, DumpState* D); -+ -+static void DumpConstants(const Proto* f, DumpState* D) -+{ -+ int i,n=f->sizek; -+ DumpInt(n,D); -+ for (i=0; ik[i]; -+ DumpChar(ttype(o),D); -+ switch (ttype(o)) -+ { -+ case LUA_TNIL: -+ break; -+ case LUA_TBOOLEAN: -+ DumpChar(bvalue(o),D); -+ break; -+ case LUA_TNUMBER: -+ DumpNumber(nvalue(o),D); -+ break; -+ case LUA_TSTRING: -+ DumpString(rawtsvalue(o),D); -+ break; -+ default: -+ lua_assert(0); /* cannot happen */ -+ break; -+ } -+ } -+ n=f->sizep; -+ DumpInt(n,D); -+ for (i=0; ip[i],f->source,D); -+} -+ -+static void DumpDebug(const Proto* f, DumpState* D) -+{ -+ int i,n; -+ n= (D->strip) ? 0 : f->sizelineinfo; -+ DumpVector(f->lineinfo,n,sizeof(int),D); -+ n= (D->strip) ? 0 : f->sizelocvars; -+ DumpInt(n,D); -+ for (i=0; ilocvars[i].varname,D); -+ DumpInt(f->locvars[i].startpc,D); -+ DumpInt(f->locvars[i].endpc,D); -+ } -+ n= (D->strip) ? 0 : f->sizeupvalues; -+ DumpInt(n,D); -+ for (i=0; iupvalues[i],D); -+} -+ -+static void DumpFunction(const Proto* f, const TString* p, DumpState* D) -+{ -+ DumpString((f->source==p || D->strip) ? NULL : f->source,D); -+ DumpInt(f->linedefined,D); -+ DumpInt(f->lastlinedefined,D); -+ DumpChar(f->nups,D); -+ DumpChar(f->numparams,D); -+ DumpChar(f->is_vararg,D); -+ DumpChar(f->maxstacksize,D); -+ DumpCode(f,D); -+ DumpConstants(f,D); -+ DumpDebug(f,D); -+} -+ -+static void DumpHeader(DumpState* D) -+{ -+ char h[LUAC_HEADERSIZE]; -+ luaU_header(h); -+ DumpBlock(h,LUAC_HEADERSIZE,D); -+} -+ -+/* -+** dump Lua function as precompiled chunk -+*/ -+int luaU_dump (lua_State* L, const Proto* f, lua_Writer w, void* data, int strip) -+{ -+ DumpState D; -+ D.L=L; -+ D.writer=w; -+ D.data=data; -+ D.strip=strip; -+ D.status=0; -+ DumpHeader(&D); -+ DumpFunction(f,NULL,&D); -+ return D.status; -+} ---- /dev/null -+++ b/extensions/LUA/lua/lfunc.c -@@ -0,0 +1,174 @@ -+/* -+** $Id: lfunc.c,v 2.12.1.2 2007/12/28 14:58:43 roberto Exp $ -+** Auxiliary functions to manipulate prototypes and closures -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+ -+#define lfunc_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lfunc.h" -+#include "lgc.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lstate.h" -+ -+ -+ -+Closure *luaF_newCclosure (lua_State *L, int nelems, Table *e) { -+ Closure *c = cast(Closure *, luaM_malloc(L, sizeCclosure(nelems))); -+ luaC_link(L, obj2gco(c), LUA_TFUNCTION); -+ c->c.isC = 1; -+ c->c.env = e; -+ c->c.nupvalues = cast_byte(nelems); -+ return c; -+} -+ -+ -+Closure *luaF_newLclosure (lua_State *L, int nelems, Table *e) { -+ Closure *c = cast(Closure *, luaM_malloc(L, sizeLclosure(nelems))); -+ luaC_link(L, obj2gco(c), LUA_TFUNCTION); -+ c->l.isC = 0; -+ c->l.env = e; -+ c->l.nupvalues = cast_byte(nelems); -+ while (nelems--) c->l.upvals[nelems] = NULL; -+ return c; -+} -+ -+ -+UpVal *luaF_newupval (lua_State *L) { -+ UpVal *uv = luaM_new(L, UpVal); -+ luaC_link(L, obj2gco(uv), LUA_TUPVAL); -+ uv->v = &uv->u.value; -+ setnilvalue(uv->v); -+ return uv; -+} -+ -+ -+UpVal *luaF_findupval (lua_State *L, StkId level) { -+ global_State *g = G(L); -+ GCObject **pp = &L->openupval; -+ UpVal *p; -+ UpVal *uv; -+ while (*pp != NULL && (p = ngcotouv(*pp))->v >= level) { -+ lua_assert(p->v != &p->u.value); -+ if (p->v == level) { /* found a corresponding upvalue? */ -+ if (isdead(g, obj2gco(p))) /* is it dead? */ -+ changewhite(obj2gco(p)); /* ressurect it */ -+ return p; -+ } -+ pp = &p->next; -+ } -+ uv = luaM_new(L, UpVal); /* not found: create a new one */ -+ uv->tt = LUA_TUPVAL; -+ uv->marked = luaC_white(g); -+ uv->v = level; /* current value lives in the stack */ -+ uv->next = *pp; /* chain it in the proper position */ -+ *pp = obj2gco(uv); -+ uv->u.l.prev = &g->uvhead; /* double link it in `uvhead' list */ -+ uv->u.l.next = g->uvhead.u.l.next; -+ uv->u.l.next->u.l.prev = uv; -+ g->uvhead.u.l.next = uv; -+ lua_assert(uv->u.l.next->u.l.prev == uv && uv->u.l.prev->u.l.next == uv); -+ return uv; -+} -+ -+ -+static void unlinkupval (UpVal *uv) { -+ lua_assert(uv->u.l.next->u.l.prev == uv && uv->u.l.prev->u.l.next == uv); -+ uv->u.l.next->u.l.prev = uv->u.l.prev; /* remove from `uvhead' list */ -+ uv->u.l.prev->u.l.next = uv->u.l.next; -+} -+ -+ -+void luaF_freeupval (lua_State *L, UpVal *uv) { -+ if (uv->v != &uv->u.value) /* is it open? */ -+ unlinkupval(uv); /* remove from open list */ -+ luaM_free(L, uv); /* free upvalue */ -+} -+ -+ -+void luaF_close (lua_State *L, StkId level) { -+ UpVal *uv; -+ global_State *g = G(L); -+ while (L->openupval != NULL && (uv = ngcotouv(L->openupval))->v >= level) { -+ GCObject *o = obj2gco(uv); -+ lua_assert(!isblack(o) && uv->v != &uv->u.value); -+ L->openupval = uv->next; /* remove from `open' list */ -+ if (isdead(g, o)) -+ luaF_freeupval(L, uv); /* free upvalue */ -+ else { -+ unlinkupval(uv); -+ setobj(L, &uv->u.value, uv->v); -+ uv->v = &uv->u.value; /* now current value lives here */ -+ luaC_linkupval(L, uv); /* link upvalue into `gcroot' list */ -+ } -+ } -+} -+ -+ -+Proto *luaF_newproto (lua_State *L) { -+ Proto *f = luaM_new(L, Proto); -+ luaC_link(L, obj2gco(f), LUA_TPROTO); -+ f->k = NULL; -+ f->sizek = 0; -+ f->p = NULL; -+ f->sizep = 0; -+ f->code = NULL; -+ f->sizecode = 0; -+ f->sizelineinfo = 0; -+ f->sizeupvalues = 0; -+ f->nups = 0; -+ f->upvalues = NULL; -+ f->numparams = 0; -+ f->is_vararg = 0; -+ f->maxstacksize = 0; -+ f->lineinfo = NULL; -+ f->sizelocvars = 0; -+ f->locvars = NULL; -+ f->linedefined = 0; -+ f->lastlinedefined = 0; -+ f->source = NULL; -+ return f; -+} -+ -+ -+void luaF_freeproto (lua_State *L, Proto *f) { -+ luaM_freearray(L, f->code, f->sizecode, Instruction); -+ luaM_freearray(L, f->p, f->sizep, Proto *); -+ luaM_freearray(L, f->k, f->sizek, TValue); -+ luaM_freearray(L, f->lineinfo, f->sizelineinfo, int); -+ luaM_freearray(L, f->locvars, f->sizelocvars, struct LocVar); -+ luaM_freearray(L, f->upvalues, f->sizeupvalues, TString *); -+ luaM_free(L, f); -+} -+ -+ -+void luaF_freeclosure (lua_State *L, Closure *c) { -+ int size = (c->c.isC) ? sizeCclosure(c->c.nupvalues) : -+ sizeLclosure(c->l.nupvalues); -+ luaM_freemem(L, c, size); -+} -+ -+ -+/* -+** Look for n-th local variable at line `line' in function `func'. -+** Returns NULL if not found. -+*/ -+const char *luaF_getlocalname (const Proto *f, int local_number, int pc) { -+ int i; -+ for (i = 0; isizelocvars && f->locvars[i].startpc <= pc; i++) { -+ if (pc < f->locvars[i].endpc) { /* is variable active? */ -+ local_number--; -+ if (local_number == 0) -+ return getstr(f->locvars[i].varname); -+ } -+ } -+ return NULL; /* not found */ -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lfunc.h -@@ -0,0 +1,34 @@ -+/* -+** $Id: lfunc.h,v 2.4.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Auxiliary functions to manipulate prototypes and closures -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lfunc_h -+#define lfunc_h -+ -+ -+#include "lobject.h" -+ -+ -+#define sizeCclosure(n) (cast(int, sizeof(CClosure)) + \ -+ cast(int, sizeof(TValue)*((n)-1))) -+ -+#define sizeLclosure(n) (cast(int, sizeof(LClosure)) + \ -+ cast(int, sizeof(TValue *)*((n)-1))) -+ -+ -+LUAI_FUNC Proto *luaF_newproto (lua_State *L); -+LUAI_FUNC Closure *luaF_newCclosure (lua_State *L, int nelems, Table *e); -+LUAI_FUNC Closure *luaF_newLclosure (lua_State *L, int nelems, Table *e); -+LUAI_FUNC UpVal *luaF_newupval (lua_State *L); -+LUAI_FUNC UpVal *luaF_findupval (lua_State *L, StkId level); -+LUAI_FUNC void luaF_close (lua_State *L, StkId level); -+LUAI_FUNC void luaF_freeproto (lua_State *L, Proto *f); -+LUAI_FUNC void luaF_freeclosure (lua_State *L, Closure *c); -+LUAI_FUNC void luaF_freeupval (lua_State *L, UpVal *uv); -+LUAI_FUNC const char *luaF_getlocalname (const Proto *func, int local_number, -+ int pc); -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lgc.c -@@ -0,0 +1,711 @@ -+/* -+** $Id: lgc.c,v 2.38.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Garbage Collector -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#define lgc_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "lgc.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "ltm.h" -+ -+ -+#define GCSTEPSIZE 1024u -+#define GCSWEEPMAX 40 -+#define GCSWEEPCOST 10 -+#define GCFINALIZECOST 100 -+ -+ -+#define maskmarks cast_byte(~(bitmask(BLACKBIT)|WHITEBITS)) -+ -+#define makewhite(g,x) \ -+ ((x)->gch.marked = cast_byte(((x)->gch.marked & maskmarks) | luaC_white(g))) -+ -+#define white2gray(x) reset2bits((x)->gch.marked, WHITE0BIT, WHITE1BIT) -+#define black2gray(x) resetbit((x)->gch.marked, BLACKBIT) -+ -+#define stringmark(s) reset2bits((s)->tsv.marked, WHITE0BIT, WHITE1BIT) -+ -+ -+#define isfinalized(u) testbit((u)->marked, FINALIZEDBIT) -+#define markfinalized(u) l_setbit((u)->marked, FINALIZEDBIT) -+ -+ -+#define KEYWEAK bitmask(KEYWEAKBIT) -+#define VALUEWEAK bitmask(VALUEWEAKBIT) -+ -+ -+ -+#define markvalue(g,o) { checkconsistency(o); \ -+ if (iscollectable(o) && iswhite(gcvalue(o))) reallymarkobject(g,gcvalue(o)); } -+ -+#define markobject(g,t) { if (iswhite(obj2gco(t))) \ -+ reallymarkobject(g, obj2gco(t)); } -+ -+ -+#define setthreshold(g) (g->GCthreshold = (g->estimate/100) * g->gcpause) -+ -+ -+static void removeentry (Node *n) { -+ lua_assert(ttisnil(gval(n))); -+ if (iscollectable(gkey(n))) -+ setttype(gkey(n), LUA_TDEADKEY); /* dead key; remove it */ -+} -+ -+ -+static void reallymarkobject (global_State *g, GCObject *o) { -+ lua_assert(iswhite(o) && !isdead(g, o)); -+ white2gray(o); -+ switch (o->gch.tt) { -+ case LUA_TSTRING: { -+ return; -+ } -+ case LUA_TUSERDATA: { -+ Table *mt = gco2u(o)->metatable; -+ gray2black(o); /* udata are never gray */ -+ if (mt) markobject(g, mt); -+ markobject(g, gco2u(o)->env); -+ return; -+ } -+ case LUA_TUPVAL: { -+ UpVal *uv = gco2uv(o); -+ markvalue(g, uv->v); -+ if (uv->v == &uv->u.value) /* closed? */ -+ gray2black(o); /* open upvalues are never black */ -+ return; -+ } -+ case LUA_TFUNCTION: { -+ gco2cl(o)->c.gclist = g->gray; -+ g->gray = o; -+ break; -+ } -+ case LUA_TTABLE: { -+ gco2h(o)->gclist = g->gray; -+ g->gray = o; -+ break; -+ } -+ case LUA_TTHREAD: { -+ gco2th(o)->gclist = g->gray; -+ g->gray = o; -+ break; -+ } -+ case LUA_TPROTO: { -+ gco2p(o)->gclist = g->gray; -+ g->gray = o; -+ break; -+ } -+ default: lua_assert(0); -+ } -+} -+ -+ -+static void marktmu (global_State *g) { -+ GCObject *u = g->tmudata; -+ if (u) { -+ do { -+ u = u->gch.next; -+ makewhite(g, u); /* may be marked, if left from previous GC */ -+ reallymarkobject(g, u); -+ } while (u != g->tmudata); -+ } -+} -+ -+ -+/* move `dead' udata that need finalization to list `tmudata' */ -+size_t luaC_separateudata (lua_State *L, int all) { -+ global_State *g = G(L); -+ size_t deadmem = 0; -+ GCObject **p = &g->mainthread->next; -+ GCObject *curr; -+ while ((curr = *p) != NULL) { -+ if (!(iswhite(curr) || all) || isfinalized(gco2u(curr))) -+ p = &curr->gch.next; /* don't bother with them */ -+ else if (fasttm(L, gco2u(curr)->metatable, TM_GC) == NULL) { -+ markfinalized(gco2u(curr)); /* don't need finalization */ -+ p = &curr->gch.next; -+ } -+ else { /* must call its gc method */ -+ deadmem += sizeudata(gco2u(curr)); -+ markfinalized(gco2u(curr)); -+ *p = curr->gch.next; -+ /* link `curr' at the end of `tmudata' list */ -+ if (g->tmudata == NULL) /* list is empty? */ -+ g->tmudata = curr->gch.next = curr; /* creates a circular list */ -+ else { -+ curr->gch.next = g->tmudata->gch.next; -+ g->tmudata->gch.next = curr; -+ g->tmudata = curr; -+ } -+ } -+ } -+ return deadmem; -+} -+ -+ -+static int traversetable (global_State *g, Table *h) { -+ int i; -+ int weakkey = 0; -+ int weakvalue = 0; -+ const TValue *mode; -+ if (h->metatable) -+ markobject(g, h->metatable); -+ mode = gfasttm(g, h->metatable, TM_MODE); -+ if (mode && ttisstring(mode)) { /* is there a weak mode? */ -+ weakkey = (strchr(svalue(mode), 'k') != NULL); -+ weakvalue = (strchr(svalue(mode), 'v') != NULL); -+ if (weakkey || weakvalue) { /* is really weak? */ -+ h->marked &= ~(KEYWEAK | VALUEWEAK); /* clear bits */ -+ h->marked |= cast_byte((weakkey << KEYWEAKBIT) | -+ (weakvalue << VALUEWEAKBIT)); -+ h->gclist = g->weak; /* must be cleared after GC, ... */ -+ g->weak = obj2gco(h); /* ... so put in the appropriate list */ -+ } -+ } -+ if (weakkey && weakvalue) return 1; -+ if (!weakvalue) { -+ i = h->sizearray; -+ while (i--) -+ markvalue(g, &h->array[i]); -+ } -+ i = sizenode(h); -+ while (i--) { -+ Node *n = gnode(h, i); -+ lua_assert(ttype(gkey(n)) != LUA_TDEADKEY || ttisnil(gval(n))); -+ if (ttisnil(gval(n))) -+ removeentry(n); /* remove empty entries */ -+ else { -+ lua_assert(!ttisnil(gkey(n))); -+ if (!weakkey) markvalue(g, gkey(n)); -+ if (!weakvalue) markvalue(g, gval(n)); -+ } -+ } -+ return weakkey || weakvalue; -+} -+ -+ -+/* -+** All marks are conditional because a GC may happen while the -+** prototype is still being created -+*/ -+static void traverseproto (global_State *g, Proto *f) { -+ int i; -+ if (f->source) stringmark(f->source); -+ for (i=0; isizek; i++) /* mark literals */ -+ markvalue(g, &f->k[i]); -+ for (i=0; isizeupvalues; i++) { /* mark upvalue names */ -+ if (f->upvalues[i]) -+ stringmark(f->upvalues[i]); -+ } -+ for (i=0; isizep; i++) { /* mark nested protos */ -+ if (f->p[i]) -+ markobject(g, f->p[i]); -+ } -+ for (i=0; isizelocvars; i++) { /* mark local-variable names */ -+ if (f->locvars[i].varname) -+ stringmark(f->locvars[i].varname); -+ } -+} -+ -+ -+ -+static void traverseclosure (global_State *g, Closure *cl) { -+ markobject(g, cl->c.env); -+ if (cl->c.isC) { -+ int i; -+ for (i=0; ic.nupvalues; i++) /* mark its upvalues */ -+ markvalue(g, &cl->c.upvalue[i]); -+ } -+ else { -+ int i; -+ lua_assert(cl->l.nupvalues == cl->l.p->nups); -+ markobject(g, cl->l.p); -+ for (i=0; il.nupvalues; i++) /* mark its upvalues */ -+ markobject(g, cl->l.upvals[i]); -+ } -+} -+ -+ -+static void checkstacksizes (lua_State *L, StkId max) { -+ int ci_used = cast_int(L->ci - L->base_ci); /* number of `ci' in use */ -+ int s_used = cast_int(max - L->stack); /* part of stack in use */ -+ if (L->size_ci > LUAI_MAXCALLS) /* handling overflow? */ -+ return; /* do not touch the stacks */ -+ if (4*ci_used < L->size_ci && 2*BASIC_CI_SIZE < L->size_ci) -+ luaD_reallocCI(L, L->size_ci/2); /* still big enough... */ -+ condhardstacktests(luaD_reallocCI(L, ci_used + 1)); -+ if (4*s_used < L->stacksize && -+ 2*(BASIC_STACK_SIZE+EXTRA_STACK) < L->stacksize) -+ luaD_reallocstack(L, L->stacksize/2); /* still big enough... */ -+ condhardstacktests(luaD_reallocstack(L, s_used)); -+} -+ -+ -+static void traversestack (global_State *g, lua_State *l) { -+ StkId o, lim; -+ CallInfo *ci; -+ markvalue(g, gt(l)); -+ lim = l->top; -+ for (ci = l->base_ci; ci <= l->ci; ci++) { -+ lua_assert(ci->top <= l->stack_last); -+ if (lim < ci->top) lim = ci->top; -+ } -+ for (o = l->stack; o < l->top; o++) -+ markvalue(g, o); -+ for (; o <= lim; o++) -+ setnilvalue(o); -+ checkstacksizes(l, lim); -+} -+ -+ -+/* -+** traverse one gray object, turning it to black. -+** Returns `quantity' traversed. -+*/ -+static l_mem propagatemark (global_State *g) { -+ GCObject *o = g->gray; -+ lua_assert(isgray(o)); -+ gray2black(o); -+ switch (o->gch.tt) { -+ case LUA_TTABLE: { -+ Table *h = gco2h(o); -+ g->gray = h->gclist; -+ if (traversetable(g, h)) /* table is weak? */ -+ black2gray(o); /* keep it gray */ -+ return sizeof(Table) + sizeof(TValue) * h->sizearray + -+ sizeof(Node) * sizenode(h); -+ } -+ case LUA_TFUNCTION: { -+ Closure *cl = gco2cl(o); -+ g->gray = cl->c.gclist; -+ traverseclosure(g, cl); -+ return (cl->c.isC) ? sizeCclosure(cl->c.nupvalues) : -+ sizeLclosure(cl->l.nupvalues); -+ } -+ case LUA_TTHREAD: { -+ lua_State *th = gco2th(o); -+ g->gray = th->gclist; -+ th->gclist = g->grayagain; -+ g->grayagain = o; -+ black2gray(o); -+ traversestack(g, th); -+ return sizeof(lua_State) + sizeof(TValue) * th->stacksize + -+ sizeof(CallInfo) * th->size_ci; -+ } -+ case LUA_TPROTO: { -+ Proto *p = gco2p(o); -+ g->gray = p->gclist; -+ traverseproto(g, p); -+ return sizeof(Proto) + sizeof(Instruction) * p->sizecode + -+ sizeof(Proto *) * p->sizep + -+ sizeof(TValue) * p->sizek + -+ sizeof(int) * p->sizelineinfo + -+ sizeof(LocVar) * p->sizelocvars + -+ sizeof(TString *) * p->sizeupvalues; -+ } -+ default: lua_assert(0); return 0; -+ } -+} -+ -+ -+static size_t propagateall (global_State *g) { -+ size_t m = 0; -+ while (g->gray) m += propagatemark(g); -+ return m; -+} -+ -+ -+/* -+** The next function tells whether a key or value can be cleared from -+** a weak table. Non-collectable objects are never removed from weak -+** tables. Strings behave as `values', so are never removed too. for -+** other objects: if really collected, cannot keep them; for userdata -+** being finalized, keep them in keys, but not in values -+*/ -+static int iscleared (const TValue *o, int iskey) { -+ if (!iscollectable(o)) return 0; -+ if (ttisstring(o)) { -+ stringmark(rawtsvalue(o)); /* strings are `values', so are never weak */ -+ return 0; -+ } -+ return iswhite(gcvalue(o)) || -+ (ttisuserdata(o) && (!iskey && isfinalized(uvalue(o)))); -+} -+ -+ -+/* -+** clear collected entries from weaktables -+*/ -+static void cleartable (GCObject *l) { -+ while (l) { -+ Table *h = gco2h(l); -+ int i = h->sizearray; -+ lua_assert(testbit(h->marked, VALUEWEAKBIT) || -+ testbit(h->marked, KEYWEAKBIT)); -+ if (testbit(h->marked, VALUEWEAKBIT)) { -+ while (i--) { -+ TValue *o = &h->array[i]; -+ if (iscleared(o, 0)) /* value was collected? */ -+ setnilvalue(o); /* remove value */ -+ } -+ } -+ i = sizenode(h); -+ while (i--) { -+ Node *n = gnode(h, i); -+ if (!ttisnil(gval(n)) && /* non-empty entry? */ -+ (iscleared(key2tval(n), 1) || iscleared(gval(n), 0))) { -+ setnilvalue(gval(n)); /* remove value ... */ -+ removeentry(n); /* remove entry from table */ -+ } -+ } -+ l = h->gclist; -+ } -+} -+ -+ -+static void freeobj (lua_State *L, GCObject *o) { -+ switch (o->gch.tt) { -+ case LUA_TPROTO: luaF_freeproto(L, gco2p(o)); break; -+ case LUA_TFUNCTION: luaF_freeclosure(L, gco2cl(o)); break; -+ case LUA_TUPVAL: luaF_freeupval(L, gco2uv(o)); break; -+ case LUA_TTABLE: luaH_free(L, gco2h(o)); break; -+ case LUA_TTHREAD: { -+ lua_assert(gco2th(o) != L && gco2th(o) != G(L)->mainthread); -+ luaE_freethread(L, gco2th(o)); -+ break; -+ } -+ case LUA_TSTRING: { -+ G(L)->strt.nuse--; -+ luaM_freemem(L, o, sizestring(gco2ts(o))); -+ break; -+ } -+ case LUA_TUSERDATA: { -+ luaM_freemem(L, o, sizeudata(gco2u(o))); -+ break; -+ } -+ default: lua_assert(0); -+ } -+} -+ -+ -+ -+#define sweepwholelist(L,p) sweeplist(L,p,MAX_LUMEM) -+ -+ -+static GCObject **sweeplist (lua_State *L, GCObject **p, lu_mem count) { -+ GCObject *curr; -+ global_State *g = G(L); -+ int deadmask = otherwhite(g); -+ while ((curr = *p) != NULL && count-- > 0) { -+ if (curr->gch.tt == LUA_TTHREAD) /* sweep open upvalues of each thread */ -+ sweepwholelist(L, &gco2th(curr)->openupval); -+ if ((curr->gch.marked ^ WHITEBITS) & deadmask) { /* not dead? */ -+ lua_assert(!isdead(g, curr) || testbit(curr->gch.marked, FIXEDBIT)); -+ makewhite(g, curr); /* make it white (for next cycle) */ -+ p = &curr->gch.next; -+ } -+ else { /* must erase `curr' */ -+ lua_assert(isdead(g, curr) || deadmask == bitmask(SFIXEDBIT)); -+ *p = curr->gch.next; -+ if (curr == g->rootgc) /* is the first element of the list? */ -+ g->rootgc = curr->gch.next; /* adjust first */ -+ freeobj(L, curr); -+ } -+ } -+ return p; -+} -+ -+ -+static void checkSizes (lua_State *L) { -+ global_State *g = G(L); -+ /* check size of string hash */ -+ if (g->strt.nuse < cast(lu_int32, g->strt.size/4) && -+ g->strt.size > MINSTRTABSIZE*2) -+ luaS_resize(L, g->strt.size/2); /* table is too big */ -+ /* check size of buffer */ -+ if (luaZ_sizebuffer(&g->buff) > LUA_MINBUFFER*2) { /* buffer too big? */ -+ size_t newsize = luaZ_sizebuffer(&g->buff) / 2; -+ luaZ_resizebuffer(L, &g->buff, newsize); -+ } -+} -+ -+ -+static void GCTM (lua_State *L) { -+ global_State *g = G(L); -+ GCObject *o = g->tmudata->gch.next; /* get first element */ -+ Udata *udata = rawgco2u(o); -+ const TValue *tm; -+ /* remove udata from `tmudata' */ -+ if (o == g->tmudata) /* last element? */ -+ g->tmudata = NULL; -+ else -+ g->tmudata->gch.next = udata->uv.next; -+ udata->uv.next = g->mainthread->next; /* return it to `root' list */ -+ g->mainthread->next = o; -+ makewhite(g, o); -+ tm = fasttm(L, udata->uv.metatable, TM_GC); -+ if (tm != NULL) { -+ lu_byte oldah = L->allowhook; -+ lu_mem oldt = g->GCthreshold; -+ L->allowhook = 0; /* stop debug hooks during GC tag method */ -+ g->GCthreshold = 2*g->totalbytes; /* avoid GC steps */ -+ setobj2s(L, L->top, tm); -+ setuvalue(L, L->top+1, udata); -+ L->top += 2; -+ luaD_call(L, L->top - 2, 0); -+ L->allowhook = oldah; /* restore hooks */ -+ g->GCthreshold = oldt; /* restore threshold */ -+ } -+} -+ -+ -+/* -+** Call all GC tag methods -+*/ -+void luaC_callGCTM (lua_State *L) { -+ while (G(L)->tmudata) -+ GCTM(L); -+} -+ -+ -+void luaC_freeall (lua_State *L) { -+ global_State *g = G(L); -+ int i; -+ g->currentwhite = WHITEBITS | bitmask(SFIXEDBIT); /* mask to collect all elements */ -+ sweepwholelist(L, &g->rootgc); -+ for (i = 0; i < g->strt.size; i++) /* free all string lists */ -+ sweepwholelist(L, &g->strt.hash[i]); -+} -+ -+ -+static void markmt (global_State *g) { -+ int i; -+ for (i=0; imt[i]) markobject(g, g->mt[i]); -+} -+ -+ -+/* mark root set */ -+static void markroot (lua_State *L) { -+ global_State *g = G(L); -+ g->gray = NULL; -+ g->grayagain = NULL; -+ g->weak = NULL; -+ markobject(g, g->mainthread); -+ /* make global table be traversed before main stack */ -+ markvalue(g, gt(g->mainthread)); -+ markvalue(g, registry(L)); -+ markmt(g); -+ g->gcstate = GCSpropagate; -+} -+ -+ -+static void remarkupvals (global_State *g) { -+ UpVal *uv; -+ for (uv = g->uvhead.u.l.next; uv != &g->uvhead; uv = uv->u.l.next) { -+ lua_assert(uv->u.l.next->u.l.prev == uv && uv->u.l.prev->u.l.next == uv); -+ if (isgray(obj2gco(uv))) -+ markvalue(g, uv->v); -+ } -+} -+ -+ -+static void atomic (lua_State *L) { -+ global_State *g = G(L); -+ size_t udsize; /* total size of userdata to be finalized */ -+ /* remark occasional upvalues of (maybe) dead threads */ -+ remarkupvals(g); -+ /* traverse objects cautch by write barrier and by 'remarkupvals' */ -+ propagateall(g); -+ /* remark weak tables */ -+ g->gray = g->weak; -+ g->weak = NULL; -+ lua_assert(!iswhite(obj2gco(g->mainthread))); -+ markobject(g, L); /* mark running thread */ -+ markmt(g); /* mark basic metatables (again) */ -+ propagateall(g); -+ /* remark gray again */ -+ g->gray = g->grayagain; -+ g->grayagain = NULL; -+ propagateall(g); -+ udsize = luaC_separateudata(L, 0); /* separate userdata to be finalized */ -+ marktmu(g); /* mark `preserved' userdata */ -+ udsize += propagateall(g); /* remark, to propagate `preserveness' */ -+ cleartable(g->weak); /* remove collected objects from weak tables */ -+ /* flip current white */ -+ g->currentwhite = cast_byte(otherwhite(g)); -+ g->sweepstrgc = 0; -+ g->sweepgc = &g->rootgc; -+ g->gcstate = GCSsweepstring; -+ g->estimate = g->totalbytes - udsize; /* first estimate */ -+} -+ -+ -+static l_mem singlestep (lua_State *L) { -+ global_State *g = G(L); -+ /*lua_checkmemory(L);*/ -+ switch (g->gcstate) { -+ case GCSpause: { -+ markroot(L); /* start a new collection */ -+ return 0; -+ } -+ case GCSpropagate: { -+ if (g->gray) -+ return propagatemark(g); -+ else { /* no more `gray' objects */ -+ atomic(L); /* finish mark phase */ -+ return 0; -+ } -+ } -+ case GCSsweepstring: { -+ lu_mem old = g->totalbytes; -+ sweepwholelist(L, &g->strt.hash[g->sweepstrgc++]); -+ if (g->sweepstrgc >= g->strt.size) /* nothing more to sweep? */ -+ g->gcstate = GCSsweep; /* end sweep-string phase */ -+ lua_assert(old >= g->totalbytes); -+ g->estimate -= old - g->totalbytes; -+ return GCSWEEPCOST; -+ } -+ case GCSsweep: { -+ lu_mem old = g->totalbytes; -+ g->sweepgc = sweeplist(L, g->sweepgc, GCSWEEPMAX); -+ if (*g->sweepgc == NULL) { /* nothing more to sweep? */ -+ checkSizes(L); -+ g->gcstate = GCSfinalize; /* end sweep phase */ -+ } -+ lua_assert(old >= g->totalbytes); -+ g->estimate -= old - g->totalbytes; -+ return GCSWEEPMAX*GCSWEEPCOST; -+ } -+ case GCSfinalize: { -+ if (g->tmudata) { -+ GCTM(L); -+ if (g->estimate > GCFINALIZECOST) -+ g->estimate -= GCFINALIZECOST; -+ return GCFINALIZECOST; -+ } -+ else { -+ g->gcstate = GCSpause; /* end collection */ -+ g->gcdept = 0; -+ return 0; -+ } -+ } -+ default: lua_assert(0); return 0; -+ } -+} -+ -+ -+void luaC_step (lua_State *L) { -+ global_State *g = G(L); -+ l_mem lim = (GCSTEPSIZE/100) * g->gcstepmul; -+ if (lim == 0) -+ lim = (MAX_LUMEM-1)/2; /* no limit */ -+ g->gcdept += g->totalbytes - g->GCthreshold; -+ do { -+ lim -= singlestep(L); -+ if (g->gcstate == GCSpause) -+ break; -+ } while (lim > 0); -+ if (g->gcstate != GCSpause) { -+ if (g->gcdept < GCSTEPSIZE) -+ g->GCthreshold = g->totalbytes + GCSTEPSIZE; /* - lim/g->gcstepmul;*/ -+ else { -+ g->gcdept -= GCSTEPSIZE; -+ g->GCthreshold = g->totalbytes; -+ } -+ } -+ else { -+ lua_assert(g->totalbytes >= g->estimate); -+ setthreshold(g); -+ } -+} -+ -+ -+void luaC_fullgc (lua_State *L) { -+ global_State *g = G(L); -+ if (g->gcstate <= GCSpropagate) { -+ /* reset sweep marks to sweep all elements (returning them to white) */ -+ g->sweepstrgc = 0; -+ g->sweepgc = &g->rootgc; -+ /* reset other collector lists */ -+ g->gray = NULL; -+ g->grayagain = NULL; -+ g->weak = NULL; -+ g->gcstate = GCSsweepstring; -+ } -+ lua_assert(g->gcstate != GCSpause && g->gcstate != GCSpropagate); -+ /* finish any pending sweep phase */ -+ while (g->gcstate != GCSfinalize) { -+ lua_assert(g->gcstate == GCSsweepstring || g->gcstate == GCSsweep); -+ singlestep(L); -+ } -+ markroot(L); -+ while (g->gcstate != GCSpause) { -+ singlestep(L); -+ } -+ setthreshold(g); -+} -+ -+ -+void luaC_barrierf (lua_State *L, GCObject *o, GCObject *v) { -+ global_State *g = G(L); -+ lua_assert(isblack(o) && iswhite(v) && !isdead(g, v) && !isdead(g, o)); -+ lua_assert(g->gcstate != GCSfinalize && g->gcstate != GCSpause); -+ lua_assert(ttype(&o->gch) != LUA_TTABLE); -+ /* must keep invariant? */ -+ if (g->gcstate == GCSpropagate) -+ reallymarkobject(g, v); /* restore invariant */ -+ else /* don't mind */ -+ makewhite(g, o); /* mark as white just to avoid other barriers */ -+} -+ -+ -+void luaC_barrierback (lua_State *L, Table *t) { -+ global_State *g = G(L); -+ GCObject *o = obj2gco(t); -+ lua_assert(isblack(o) && !isdead(g, o)); -+ lua_assert(g->gcstate != GCSfinalize && g->gcstate != GCSpause); -+ black2gray(o); /* make table gray (again) */ -+ t->gclist = g->grayagain; -+ g->grayagain = o; -+} -+ -+ -+void luaC_link (lua_State *L, GCObject *o, lu_byte tt) { -+ global_State *g = G(L); -+ o->gch.next = g->rootgc; -+ g->rootgc = o; -+ o->gch.marked = luaC_white(g); -+ o->gch.tt = tt; -+} -+ -+ -+void luaC_linkupval (lua_State *L, UpVal *uv) { -+ global_State *g = G(L); -+ GCObject *o = obj2gco(uv); -+ o->gch.next = g->rootgc; /* link upvalue into `rootgc' list */ -+ g->rootgc = o; -+ if (isgray(o)) { -+ if (g->gcstate == GCSpropagate) { -+ gray2black(o); /* closed upvalues need barrier */ -+ luaC_barrier(L, uv, uv->v); -+ } -+ else { /* sweep phase: sweep it (turning it into white) */ -+ makewhite(g, o); -+ lua_assert(g->gcstate != GCSfinalize && g->gcstate != GCSpause); -+ } -+ } -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lgc.h -@@ -0,0 +1,110 @@ -+/* -+** $Id: lgc.h,v 2.15.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Garbage Collector -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lgc_h -+#define lgc_h -+ -+ -+#include "lobject.h" -+ -+ -+/* -+** Possible states of the Garbage Collector -+*/ -+#define GCSpause 0 -+#define GCSpropagate 1 -+#define GCSsweepstring 2 -+#define GCSsweep 3 -+#define GCSfinalize 4 -+ -+ -+/* -+** some userful bit tricks -+*/ -+#define resetbits(x,m) ((x) &= cast(lu_byte, ~(m))) -+#define setbits(x,m) ((x) |= (m)) -+#define testbits(x,m) ((x) & (m)) -+#define bitmask(b) (1<<(b)) -+#define bit2mask(b1,b2) (bitmask(b1) | bitmask(b2)) -+#define l_setbit(x,b) setbits(x, bitmask(b)) -+#define resetbit(x,b) resetbits(x, bitmask(b)) -+#define testbit(x,b) testbits(x, bitmask(b)) -+#define set2bits(x,b1,b2) setbits(x, (bit2mask(b1, b2))) -+#define reset2bits(x,b1,b2) resetbits(x, (bit2mask(b1, b2))) -+#define test2bits(x,b1,b2) testbits(x, (bit2mask(b1, b2))) -+ -+ -+ -+/* -+** Layout for bit use in `marked' field: -+** bit 0 - object is white (type 0) -+** bit 1 - object is white (type 1) -+** bit 2 - object is black -+** bit 3 - for userdata: has been finalized -+** bit 3 - for tables: has weak keys -+** bit 4 - for tables: has weak values -+** bit 5 - object is fixed (should not be collected) -+** bit 6 - object is "super" fixed (only the main thread) -+*/ -+ -+ -+#define WHITE0BIT 0 -+#define WHITE1BIT 1 -+#define BLACKBIT 2 -+#define FINALIZEDBIT 3 -+#define KEYWEAKBIT 3 -+#define VALUEWEAKBIT 4 -+#define FIXEDBIT 5 -+#define SFIXEDBIT 6 -+#define WHITEBITS bit2mask(WHITE0BIT, WHITE1BIT) -+ -+ -+#define iswhite(x) test2bits((x)->gch.marked, WHITE0BIT, WHITE1BIT) -+#define isblack(x) testbit((x)->gch.marked, BLACKBIT) -+#define isgray(x) (!isblack(x) && !iswhite(x)) -+ -+#define otherwhite(g) (g->currentwhite ^ WHITEBITS) -+#define isdead(g,v) ((v)->gch.marked & otherwhite(g) & WHITEBITS) -+ -+#define changewhite(x) ((x)->gch.marked ^= WHITEBITS) -+#define gray2black(x) l_setbit((x)->gch.marked, BLACKBIT) -+ -+#define valiswhite(x) (iscollectable(x) && iswhite(gcvalue(x))) -+ -+#define luaC_white(g) cast(lu_byte, (g)->currentwhite & WHITEBITS) -+ -+ -+#define luaC_checkGC(L) { \ -+ condhardstacktests(luaD_reallocstack(L, L->stacksize - EXTRA_STACK - 1)); \ -+ if (G(L)->totalbytes >= G(L)->GCthreshold) \ -+ luaC_step(L); } -+ -+ -+#define luaC_barrier(L,p,v) { if (valiswhite(v) && isblack(obj2gco(p))) \ -+ luaC_barrierf(L,obj2gco(p),gcvalue(v)); } -+ -+#define luaC_barriert(L,t,v) { if (valiswhite(v) && isblack(obj2gco(t))) \ -+ luaC_barrierback(L,t); } -+ -+#define luaC_objbarrier(L,p,o) \ -+ { if (iswhite(obj2gco(o)) && isblack(obj2gco(p))) \ -+ luaC_barrierf(L,obj2gco(p),obj2gco(o)); } -+ -+#define luaC_objbarriert(L,t,o) \ -+ { if (iswhite(obj2gco(o)) && isblack(obj2gco(t))) luaC_barrierback(L,t); } -+ -+LUAI_FUNC size_t luaC_separateudata (lua_State *L, int all); -+LUAI_FUNC void luaC_callGCTM (lua_State *L); -+LUAI_FUNC void luaC_freeall (lua_State *L); -+LUAI_FUNC void luaC_step (lua_State *L); -+LUAI_FUNC void luaC_fullgc (lua_State *L); -+LUAI_FUNC void luaC_link (lua_State *L, GCObject *o, lu_byte tt); -+LUAI_FUNC void luaC_linkupval (lua_State *L, UpVal *uv); -+LUAI_FUNC void luaC_barrierf (lua_State *L, GCObject *o, GCObject *v); -+LUAI_FUNC void luaC_barrierback (lua_State *L, Table *t); -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/llex.c -@@ -0,0 +1,460 @@ -+/* -+** $Id: llex.c,v 2.20.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Lexical Analyzer -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+#include -+#include -+ -+#define llex_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldo.h" -+#include "llex.h" -+#include "lobject.h" -+#include "lparser.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "lzio.h" -+ -+ -+ -+#define next(ls) (ls->current = zgetc(ls->z)) -+ -+ -+ -+ -+#define currIsNewline(ls) (ls->current == '\n' || ls->current == '\r') -+ -+ -+/* ORDER RESERVED */ -+const char *const luaX_tokens [] = { -+ "and", "break", "do", "else", "elseif", -+ "end", "false", "for", "function", "if", -+ "in", "local", "nil", "not", "or", "repeat", -+ "return", "then", "true", "until", "while", -+ "..", "...", "==", ">=", "<=", "~=", -+ "", "", "", "", -+ NULL -+}; -+ -+ -+#define save_and_next(ls) (save(ls, ls->current), next(ls)) -+ -+ -+static void save (LexState *ls, int c) { -+ Mbuffer *b = ls->buff; -+ if (b->n + 1 > b->buffsize) { -+ size_t newsize; -+ if (b->buffsize >= MAX_SIZET/2) -+ luaX_lexerror(ls, "lexical element too long", 0); -+ newsize = b->buffsize * 2; -+ luaZ_resizebuffer(ls->L, b, newsize); -+ } -+ b->buffer[b->n++] = cast(char, c); -+} -+ -+ -+void luaX_init (lua_State *L) { -+ int i; -+ for (i=0; itsv.reserved = cast_byte(i+1); /* reserved word */ -+ } -+} -+ -+ -+#define MAXSRC 80 -+ -+ -+const char *luaX_token2str (LexState *ls, int token) { -+ if (token < FIRST_RESERVED) { -+ lua_assert(token == cast(unsigned char, token)); -+ return (iscntrl(token)) ? luaO_pushfstring(ls->L, "char(%d)", token) : -+ luaO_pushfstring(ls->L, "%c", token); -+ } -+ else -+ return luaX_tokens[token-FIRST_RESERVED]; -+} -+ -+ -+static const char *txtToken (LexState *ls, int token) { -+ switch (token) { -+ case TK_NAME: -+ case TK_STRING: -+ case TK_NUMBER: -+ save(ls, '\0'); -+ return luaZ_buffer(ls->buff); -+ default: -+ return luaX_token2str(ls, token); -+ } -+} -+ -+ -+void luaX_lexerror (LexState *ls, const char *msg, int token) { -+ char buff[MAXSRC]; -+ luaO_chunkid(buff, getstr(ls->source), MAXSRC); -+ msg = luaO_pushfstring(ls->L, "%s:%d: %s", buff, ls->linenumber, msg); -+ if (token) -+ luaO_pushfstring(ls->L, "%s near " LUA_QS, msg, txtToken(ls, token)); -+ luaD_throw(ls->L, LUA_ERRSYNTAX); -+} -+ -+ -+void luaX_syntaxerror (LexState *ls, const char *msg) { -+ luaX_lexerror(ls, msg, ls->t.token); -+} -+ -+ -+TString *luaX_newstring (LexState *ls, const char *str, size_t l) { -+ lua_State *L = ls->L; -+ TString *ts = luaS_newlstr(L, str, l); -+ TValue *o = luaH_setstr(L, ls->fs->h, ts); /* entry for `str' */ -+ if (ttisnil(o)) -+ setbvalue(o, 1); /* make sure `str' will not be collected */ -+ return ts; -+} -+ -+ -+static void inclinenumber (LexState *ls) { -+ int old = ls->current; -+ lua_assert(currIsNewline(ls)); -+ next(ls); /* skip `\n' or `\r' */ -+ if (currIsNewline(ls) && ls->current != old) -+ next(ls); /* skip `\n\r' or `\r\n' */ -+ if (++ls->linenumber >= MAX_INT) -+ luaX_syntaxerror(ls, "chunk has too many lines"); -+} -+ -+ -+void luaX_setinput (lua_State *L, LexState *ls, ZIO *z, TString *source) { -+ ls->decpoint = '.'; -+ ls->L = L; -+ ls->lookahead.token = TK_EOS; /* no look-ahead token */ -+ ls->z = z; -+ ls->fs = NULL; -+ ls->linenumber = 1; -+ ls->lastline = 1; -+ ls->source = source; -+ luaZ_resizebuffer(ls->L, ls->buff, LUA_MINBUFFER); /* initialize buffer */ -+ next(ls); /* read first char */ -+} -+ -+ -+ -+/* -+** ======================================================= -+** LEXICAL ANALYZER -+** ======================================================= -+*/ -+ -+ -+ -+static int check_next (LexState *ls, const char *set) { -+ if (!strchr(set, ls->current)) -+ return 0; -+ save_and_next(ls); -+ return 1; -+} -+ -+ -+static void buffreplace (LexState *ls, char from, char to) { -+ size_t n = luaZ_bufflen(ls->buff); -+ char *p = luaZ_buffer(ls->buff); -+ while (n--) -+ if (p[n] == from) p[n] = to; -+} -+ -+ -+static void trydecpoint (LexState *ls, SemInfo *seminfo) { -+ /* format error: try to update decimal point separator */ -+ char old = ls->decpoint; -+ struct lconv *cv = localeconv(); -+ ls->decpoint = (cv ? cv->decimal_point[0] : '.'); -+ buffreplace(ls, old, ls->decpoint); /* try updated decimal separator */ -+ if (!luaO_str2d(luaZ_buffer(ls->buff), &seminfo->r)) { -+ /* format error with correct decimal point: no more options */ -+ buffreplace(ls, ls->decpoint, '.'); /* undo change (for error message) */ -+ luaX_lexerror(ls, "malformed number", TK_NUMBER); -+ } -+} -+ -+ -+/* LUA_NUMBER */ -+static void read_numeral (LexState *ls, SemInfo *seminfo) { -+ lua_assert(isdigit(ls->current)); -+ do { -+ save_and_next(ls); -+ } while (isdigit(ls->current) || ls->current == '.'); -+ if (check_next(ls, "Ee")) /* `E'? */ -+ check_next(ls, "+-"); /* optional exponent sign */ -+ while (isalnum(ls->current) || ls->current == '_') -+ save_and_next(ls); -+ save(ls, '\0'); -+ buffreplace(ls, '.', ls->decpoint); /* follow locale for decimal point */ -+ if (!luaO_str2d(luaZ_buffer(ls->buff), &seminfo->r)) /* format error? */ -+ trydecpoint(ls, seminfo); /* try to update decimal point separator */ -+} -+ -+ -+static int skip_sep (LexState *ls) { -+ int count = 0; -+ int s = ls->current; -+ lua_assert(s == '[' || s == ']'); -+ save_and_next(ls); -+ while (ls->current == '=') { -+ save_and_next(ls); -+ count++; -+ } -+ return (ls->current == s) ? count : (-count) - 1; -+} -+ -+ -+static void read_long_string (LexState *ls, SemInfo *seminfo, int sep) { -+ int cont = 0; -+ (void)(cont); /* avoid warnings when `cont' is not used */ -+ save_and_next(ls); /* skip 2nd `[' */ -+ if (currIsNewline(ls)) /* string starts with a newline? */ -+ inclinenumber(ls); /* skip it */ -+ for (;;) { -+ switch (ls->current) { -+ case EOZ: -+ luaX_lexerror(ls, (seminfo) ? "unfinished long string" : -+ "unfinished long comment", TK_EOS); -+ break; /* to avoid warnings */ -+#if defined(LUA_COMPAT_LSTR) -+ case '[': { -+ if (skip_sep(ls) == sep) { -+ save_and_next(ls); /* skip 2nd `[' */ -+ cont++; -+#if LUA_COMPAT_LSTR == 1 -+ if (sep == 0) -+ luaX_lexerror(ls, "nesting of [[...]] is deprecated", '['); -+#endif -+ } -+ break; -+ } -+#endif -+ case ']': { -+ if (skip_sep(ls) == sep) { -+ save_and_next(ls); /* skip 2nd `]' */ -+#if defined(LUA_COMPAT_LSTR) && LUA_COMPAT_LSTR == 2 -+ cont--; -+ if (sep == 0 && cont >= 0) break; -+#endif -+ goto endloop; -+ } -+ break; -+ } -+ case '\n': -+ case '\r': { -+ save(ls, '\n'); -+ inclinenumber(ls); -+ if (!seminfo) luaZ_resetbuffer(ls->buff); /* avoid wasting space */ -+ break; -+ } -+ default: { -+ if (seminfo) save_and_next(ls); -+ else next(ls); -+ } -+ } -+ } endloop: -+ if (seminfo) -+ seminfo->ts = luaX_newstring(ls, luaZ_buffer(ls->buff) + (2 + sep), -+ luaZ_bufflen(ls->buff) - 2*(2 + sep)); -+} -+ -+ -+static void read_string (LexState *ls, int del, SemInfo *seminfo) { -+ save_and_next(ls); -+ while (ls->current != del) { -+ switch (ls->current) { -+ case EOZ: -+ luaX_lexerror(ls, "unfinished string", TK_EOS); -+ continue; /* to avoid warnings */ -+ case '\n': -+ case '\r': -+ luaX_lexerror(ls, "unfinished string", TK_STRING); -+ continue; /* to avoid warnings */ -+ case '\\': { -+ int c; -+ next(ls); /* do not save the `\' */ -+ switch (ls->current) { -+ case 'a': c = '\a'; break; -+ case 'b': c = '\b'; break; -+ case 'f': c = '\f'; break; -+ case 'n': c = '\n'; break; -+ case 'r': c = '\r'; break; -+ case 't': c = '\t'; break; -+ case 'v': c = '\v'; break; -+ case '\n': /* go through */ -+ case '\r': save(ls, '\n'); inclinenumber(ls); continue; -+ case EOZ: continue; /* will raise an error next loop */ -+ default: { -+ if (!isdigit(ls->current)) -+ save_and_next(ls); /* handles \\, \", \', and \? */ -+ else { /* \xxx */ -+ int i = 0; -+ c = 0; -+ do { -+ c = 10*c + (ls->current-'0'); -+ next(ls); -+ } while (++i<3 && isdigit(ls->current)); -+ if (c > UCHAR_MAX) -+ luaX_lexerror(ls, "escape sequence too large", TK_STRING); -+ save(ls, c); -+ } -+ continue; -+ } -+ } -+ save(ls, c); -+ next(ls); -+ continue; -+ } -+ default: -+ save_and_next(ls); -+ } -+ } -+ save_and_next(ls); /* skip delimiter */ -+ seminfo->ts = luaX_newstring(ls, luaZ_buffer(ls->buff) + 1, -+ luaZ_bufflen(ls->buff) - 2); -+} -+ -+ -+static int llex (LexState *ls, SemInfo *seminfo) { -+ luaZ_resetbuffer(ls->buff); -+ for (;;) { -+ switch (ls->current) { -+ case '\n': -+ case '\r': { -+ inclinenumber(ls); -+ continue; -+ } -+ case '-': { -+ next(ls); -+ if (ls->current != '-') return '-'; -+ /* else is a comment */ -+ next(ls); -+ if (ls->current == '[') { -+ int sep = skip_sep(ls); -+ luaZ_resetbuffer(ls->buff); /* `skip_sep' may dirty the buffer */ -+ if (sep >= 0) { -+ read_long_string(ls, NULL, sep); /* long comment */ -+ luaZ_resetbuffer(ls->buff); -+ continue; -+ } -+ } -+ /* else short comment */ -+ while (!currIsNewline(ls) && ls->current != EOZ) -+ next(ls); -+ continue; -+ } -+ case '[': { -+ int sep = skip_sep(ls); -+ if (sep >= 0) { -+ read_long_string(ls, seminfo, sep); -+ return TK_STRING; -+ } -+ else if (sep == -1) return '['; -+ else luaX_lexerror(ls, "invalid long string delimiter", TK_STRING); -+ } -+ case '=': { -+ next(ls); -+ if (ls->current != '=') return '='; -+ else { next(ls); return TK_EQ; } -+ } -+ case '<': { -+ next(ls); -+ if (ls->current != '=') return '<'; -+ else { next(ls); return TK_LE; } -+ } -+ case '>': { -+ next(ls); -+ if (ls->current != '=') return '>'; -+ else { next(ls); return TK_GE; } -+ } -+ case '~': { -+ next(ls); -+ if (ls->current != '=') return '~'; -+ else { next(ls); return TK_NE; } -+ } -+ case '"': -+ case '\'': { -+ read_string(ls, ls->current, seminfo); -+ return TK_STRING; -+ } -+ case '.': { -+ save_and_next(ls); -+ if (check_next(ls, ".")) { -+ if (check_next(ls, ".")) -+ return TK_DOTS; /* ... */ -+ else return TK_CONCAT; /* .. */ -+ } -+ else if (!isdigit(ls->current)) return '.'; -+ else { -+ read_numeral(ls, seminfo); -+ return TK_NUMBER; -+ } -+ } -+ case EOZ: { -+ return TK_EOS; -+ } -+ default: { -+ if (isspace(ls->current)) { -+ lua_assert(!currIsNewline(ls)); -+ next(ls); -+ continue; -+ } -+ else if (isdigit(ls->current)) { -+ read_numeral(ls, seminfo); -+ return TK_NUMBER; -+ } -+ else if (isalpha(ls->current) || ls->current == '_') { -+ /* identifier or reserved word */ -+ TString *ts; -+ do { -+ save_and_next(ls); -+ } while (isalnum(ls->current) || ls->current == '_'); -+ ts = luaX_newstring(ls, luaZ_buffer(ls->buff), -+ luaZ_bufflen(ls->buff)); -+ if (ts->tsv.reserved > 0) /* reserved word? */ -+ return ts->tsv.reserved - 1 + FIRST_RESERVED; -+ else { -+ seminfo->ts = ts; -+ return TK_NAME; -+ } -+ } -+ else { -+ int c = ls->current; -+ next(ls); -+ return c; /* single-char tokens (+ - / ...) */ -+ } -+ } -+ } -+ } -+} -+ -+ -+void luaX_next (LexState *ls) { -+ ls->lastline = ls->linenumber; -+ if (ls->lookahead.token != TK_EOS) { /* is there a look-ahead token? */ -+ ls->t = ls->lookahead; /* use this one */ -+ ls->lookahead.token = TK_EOS; /* and discharge it */ -+ } -+ else -+ ls->t.token = llex(ls, &ls->t.seminfo); /* read next token */ -+} -+ -+ -+void luaX_lookahead (LexState *ls) { -+ lua_assert(ls->lookahead.token == TK_EOS); -+ ls->lookahead.token = llex(ls, &ls->lookahead.seminfo); -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/llex.h -@@ -0,0 +1,81 @@ -+/* -+** $Id: llex.h,v 1.58.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Lexical Analyzer -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef llex_h -+#define llex_h -+ -+#include "lobject.h" -+#include "lzio.h" -+ -+ -+#define FIRST_RESERVED 257 -+ -+/* maximum length of a reserved word */ -+#define TOKEN_LEN (sizeof("function")/sizeof(char)) -+ -+ -+/* -+* WARNING: if you change the order of this enumeration, -+* grep "ORDER RESERVED" -+*/ -+enum RESERVED { -+ /* terminal symbols denoted by reserved words */ -+ TK_AND = FIRST_RESERVED, TK_BREAK, -+ TK_DO, TK_ELSE, TK_ELSEIF, TK_END, TK_FALSE, TK_FOR, TK_FUNCTION, -+ TK_IF, TK_IN, TK_LOCAL, TK_NIL, TK_NOT, TK_OR, TK_REPEAT, -+ TK_RETURN, TK_THEN, TK_TRUE, TK_UNTIL, TK_WHILE, -+ /* other terminal symbols */ -+ TK_CONCAT, TK_DOTS, TK_EQ, TK_GE, TK_LE, TK_NE, TK_NUMBER, -+ TK_NAME, TK_STRING, TK_EOS -+}; -+ -+/* number of reserved words */ -+#define NUM_RESERVED (cast(int, TK_WHILE-FIRST_RESERVED+1)) -+ -+ -+/* array with token `names' */ -+LUAI_DATA const char *const luaX_tokens []; -+ -+ -+typedef union { -+ lua_Number r; -+ TString *ts; -+} SemInfo; /* semantics information */ -+ -+ -+typedef struct Token { -+ int token; -+ SemInfo seminfo; -+} Token; -+ -+ -+typedef struct LexState { -+ int current; /* current character (charint) */ -+ int linenumber; /* input line counter */ -+ int lastline; /* line of last token `consumed' */ -+ Token t; /* current token */ -+ Token lookahead; /* look ahead token */ -+ struct FuncState *fs; /* `FuncState' is private to the parser */ -+ struct lua_State *L; -+ ZIO *z; /* input stream */ -+ Mbuffer *buff; /* buffer for tokens */ -+ TString *source; /* current source name */ -+ char decpoint; /* locale decimal point */ -+} LexState; -+ -+ -+LUAI_FUNC void luaX_init (lua_State *L); -+LUAI_FUNC void luaX_setinput (lua_State *L, LexState *ls, ZIO *z, -+ TString *source); -+LUAI_FUNC TString *luaX_newstring (LexState *ls, const char *str, size_t l); -+LUAI_FUNC void luaX_next (LexState *ls); -+LUAI_FUNC void luaX_lookahead (LexState *ls); -+LUAI_FUNC void luaX_lexerror (LexState *ls, const char *msg, int token); -+LUAI_FUNC void luaX_syntaxerror (LexState *ls, const char *s); -+LUAI_FUNC const char *luaX_token2str (LexState *ls, int token); -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/llimits.h -@@ -0,0 +1,125 @@ -+/* -+** $Id: llimits.h,v 1.69.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Limits, basic types, and some other `installation-dependent' definitions -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef llimits_h -+#define llimits_h -+ -+#include -+#include -+ -+#include "lua.h" -+ -+typedef LUAI_UINT32 lu_int32; -+ -+typedef LUAI_UMEM lu_mem; -+ -+typedef LUAI_MEM l_mem; -+ -+ -+ -+/* chars used as small naturals (so that `char' is reserved for characters) */ -+typedef unsigned char lu_byte; -+ -+ -+#define MAX_SIZET ((size_t)(~(size_t)0)-2) -+ -+#define MAX_LUMEM ((lu_mem)(~(lu_mem)0)-2) -+ -+ -+#define MAX_INT (LUA_INT_MAX-2) /* maximum value of an int (-2 for safety) */ -+ -+/* -+** conversion of pointer to integer -+** this is for hashing only; there is no problem if the integer -+** cannot hold the whole pointer value -+*/ -+#define IntPoint(p) ((unsigned int)(lu_mem)(p)) -+ -+ -+ -+/* type to ensure maximum alignment */ -+typedef LUAI_USER_ALIGNMENT_T L_Umaxalign; -+ -+ -+/* result of a `usual argument conversion' over lua_Number */ -+typedef LUAI_UACNUMBER l_uacNumber; -+ -+ -+/* internal assertions for in-house debugging */ -+#ifdef lua_assert -+ -+#define check_exp(c,e) (lua_assert(c), (e)) -+#define api_check(l,e) lua_assert(e) -+ -+#else -+ -+#define lua_assert(c) ((void)0) -+#define check_exp(c,e) (e) -+#define api_check luai_apicheck -+ -+#endif -+ -+ -+#ifndef UNUSED -+#define UNUSED(x) ((void)(x)) /* to avoid warnings */ -+#endif -+ -+ -+#ifndef cast -+#define cast(t, exp) ((t)(exp)) -+#endif -+ -+#define cast_byte(i) cast(lu_byte, (i)) -+#define cast_num(i) cast(lua_Number, (i)) -+#define cast_int(i) cast(int, (i)) -+ -+ -+ -+/* -+** type for virtual-machine instructions -+** must be an unsigned with (at least) 4 bytes (see details in lopcodes.h) -+*/ -+typedef lu_int32 Instruction; -+ -+ -+ -+/* maximum stack for a Lua function */ -+#define MAXSTACK 250 -+ -+ -+ -+/* minimum size for the string table (must be power of 2) */ -+#ifndef MINSTRTABSIZE -+#define MINSTRTABSIZE 32 -+#endif -+ -+ -+/* minimum size for string buffer */ -+#ifndef LUA_MINBUFFER -+#define LUA_MINBUFFER 32 -+#endif -+ -+ -+#ifndef lua_lock -+#define lua_lock(L) ((void) 0) -+#define lua_unlock(L) ((void) 0) -+#endif -+ -+#ifndef luai_threadyield -+#define luai_threadyield(L) {lua_unlock(L); lua_lock(L);} -+#endif -+ -+ -+/* -+** macro to control inclusion of some hard tests on stack reallocation -+*/ -+#ifndef HARDSTACKTESTS -+#define condhardstacktests(x) ((void)0) -+#else -+#define condhardstacktests(x) x -+#endif -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lmem.c -@@ -0,0 +1,86 @@ -+/* -+** $Id: lmem.c,v 1.70.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Interface to Memory Manager -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+ -+#define lmem_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldebug.h" -+#include "ldo.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lstate.h" -+ -+ -+ -+/* -+** About the realloc function: -+** void * frealloc (void *ud, void *ptr, size_t osize, size_t nsize); -+** (`osize' is the old size, `nsize' is the new size) -+** -+** Lua ensures that (ptr == NULL) iff (osize == 0). -+** -+** * frealloc(ud, NULL, 0, x) creates a new block of size `x' -+** -+** * frealloc(ud, p, x, 0) frees the block `p' -+** (in this specific case, frealloc must return NULL). -+** particularly, frealloc(ud, NULL, 0, 0) does nothing -+** (which is equivalent to free(NULL) in ANSI C) -+** -+** frealloc returns NULL if it cannot create or reallocate the area -+** (any reallocation to an equal or smaller size cannot fail!) -+*/ -+ -+ -+ -+#define MINSIZEARRAY 4 -+ -+ -+void *luaM_growaux_ (lua_State *L, void *block, int *size, size_t size_elems, -+ int limit, const char *errormsg) { -+ void *newblock; -+ int newsize; -+ if (*size >= limit/2) { /* cannot double it? */ -+ if (*size >= limit) /* cannot grow even a little? */ -+ luaG_runerror(L, errormsg); -+ newsize = limit; /* still have at least one free place */ -+ } -+ else { -+ newsize = (*size)*2; -+ if (newsize < MINSIZEARRAY) -+ newsize = MINSIZEARRAY; /* minimum size */ -+ } -+ newblock = luaM_reallocv(L, block, *size, newsize, size_elems); -+ *size = newsize; /* update only when everything else is OK */ -+ return newblock; -+} -+ -+ -+void *luaM_toobig (lua_State *L) { -+ luaG_runerror(L, "memory allocation error: block too big"); -+ return NULL; /* to avoid warnings */ -+} -+ -+ -+ -+/* -+** generic allocation routine. -+*/ -+void *luaM_realloc_ (lua_State *L, void *block, size_t osize, size_t nsize) { -+ global_State *g = G(L); -+ lua_assert((osize == 0) == (block == NULL)); -+ block = (*g->frealloc)(g->ud, block, osize, nsize); -+ if (block == NULL && nsize > 0) -+ luaD_throw(L, LUA_ERRMEM); -+ lua_assert((nsize == 0) == (block == NULL)); -+ g->totalbytes = (g->totalbytes - osize) + nsize; -+ return block; -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lmem.h -@@ -0,0 +1,49 @@ -+/* -+** $Id: lmem.h,v 1.31.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Interface to Memory Manager -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lmem_h -+#define lmem_h -+ -+ -+#include -+ -+#include "llimits.h" -+#include "lua.h" -+ -+#define MEMERRMSG "not enough memory" -+ -+ -+#define luaM_reallocv(L,b,on,n,e) \ -+ ((cast(size_t, (n)+1) <= MAX_SIZET/(e)) ? /* +1 to avoid warnings */ \ -+ luaM_realloc_(L, (b), (on)*(e), (n)*(e)) : \ -+ luaM_toobig(L)) -+ -+#define luaM_freemem(L, b, s) luaM_realloc_(L, (b), (s), 0) -+#define luaM_free(L, b) luaM_realloc_(L, (b), sizeof(*(b)), 0) -+#define luaM_freearray(L, b, n, t) luaM_reallocv(L, (b), n, 0, sizeof(t)) -+ -+#define luaM_malloc(L,t) luaM_realloc_(L, NULL, 0, (t)) -+#define luaM_new(L,t) cast(t *, luaM_malloc(L, sizeof(t))) -+#define luaM_newvector(L,n,t) \ -+ cast(t *, luaM_reallocv(L, NULL, 0, n, sizeof(t))) -+ -+#define luaM_growvector(L,v,nelems,size,t,limit,e) \ -+ if ((nelems)+1 > (size)) \ -+ ((v)=cast(t *, luaM_growaux_(L,v,&(size),sizeof(t),limit,e))) -+ -+#define luaM_reallocvector(L, v,oldn,n,t) \ -+ ((v)=cast(t *, luaM_reallocv(L, v, oldn, n, sizeof(t)))) -+ -+ -+LUAI_FUNC void *luaM_realloc_ (lua_State *L, void *block, size_t oldsize, -+ size_t size); -+LUAI_FUNC void *luaM_toobig (lua_State *L); -+LUAI_FUNC void *luaM_growaux_ (lua_State *L, void *block, int *size, -+ size_t size_elem, int limit, -+ const char *errormsg); -+ -+#endif -+ ---- /dev/null -+++ b/extensions/LUA/lua/lobject.c -@@ -0,0 +1,215 @@ -+/* -+** $Id: lobject.c,v 2.22.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Some generic functions over Lua objects -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#include -+#include -+#include -+#include -+ -+#define lobject_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldo.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "lvm.h" -+ -+ -+ -+const TValue luaO_nilobject_ = {{NULL}, LUA_TNIL}; -+ -+ -+/* -+** converts an integer to a "floating point byte", represented as -+** (eeeeexxx), where the real value is (1xxx) * 2^(eeeee - 1) if -+** eeeee != 0 and (xxx) otherwise. -+*/ -+int luaO_int2fb (unsigned int x) { -+ int e = 0; /* expoent */ -+ while (x >= 16) { -+ x = (x+1) >> 1; -+ e++; -+ } -+ if (x < 8) return x; -+ else return ((e+1) << 3) | (cast_int(x) - 8); -+} -+ -+ -+/* converts back */ -+int luaO_fb2int (int x) { -+ int e = (x >> 3) & 31; -+ if (e == 0) return x; -+ else return ((x & 7)+8) << (e - 1); -+} -+ -+ -+int luaO_log2 (unsigned int x) { -+ static const lu_byte log_2[256] = { -+ 0,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5, -+ 6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6, -+ 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, -+ 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, -+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8, -+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8, -+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8, -+ 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8 -+ }; -+ int l = -1; -+ while (x >= 256) { l += 8; x >>= 8; } -+ return l + log_2[x]; -+ -+} -+ -+ -+int luaO_rawequalObj (const TValue *t1, const TValue *t2) { -+ if (ttype(t1) != ttype(t2)) return 0; -+ else switch (ttype(t1)) { -+ case LUA_TNIL: -+ return 1; -+ case LUA_TNUMBER: -+ return luai_numeq(nvalue(t1), nvalue(t2)); -+ case LUA_TBOOLEAN: -+ return bvalue(t1) == bvalue(t2); /* boolean true must be 1 !! */ -+ case LUA_TLIGHTUSERDATA: -+ return pvalue(t1) == pvalue(t2); -+ default: -+ lua_assert(iscollectable(t1)); -+ return gcvalue(t1) == gcvalue(t2); -+ } -+} -+ -+ -+int luaO_str2d (const char *s, lua_Number *result) { -+ char *endptr; -+ *result = lua_str2number(s, &endptr); -+ if (endptr == s) return 0; /* conversion failed */ -+ if (*endptr == 'x' || *endptr == 'X') /* maybe an hexadecimal constant? */ -+ *result = cast_num(strtoul(s, &endptr, 16)); -+ if (*endptr == '\0') return 1; /* most common case */ -+ while (isspace(cast(unsigned char, *endptr))) endptr++; -+ if (*endptr != '\0') return 0; /* invalid trailing characters? */ -+ return 1; -+} -+ -+ -+ -+static void pushstr (lua_State *L, const char *str) { -+ setsvalue2s(L, L->top, luaS_new(L, str)); -+ incr_top(L); -+} -+ -+ -+/* this function handles only `%d', `%c', %f, %p, and `%s' formats */ -+const char *luaO_pushvfstring (lua_State *L, const char *fmt, va_list argp) { -+ int n = 1; -+ pushstr(L, ""); -+ for (;;) { -+ const char *e = strchr(fmt, '%'); -+ if (e == NULL) break; -+ setsvalue2s(L, L->top, luaS_newlstr(L, fmt, e-fmt)); -+ incr_top(L); -+ switch (*(e+1)) { -+ case 's': { -+ const char *s = va_arg(argp, char *); -+ if (s == NULL) s = "(null)"; -+ pushstr(L, s); -+ break; -+ } -+ case 'c': { -+ char buff[2]; -+ buff[0] = cast(char, va_arg(argp, int)); -+ buff[1] = '\0'; -+ pushstr(L, buff); -+ break; -+ } -+ case 'd': { -+ setnvalue(L->top, cast_num(va_arg(argp, int))); -+ incr_top(L); -+ break; -+ } -+ case 'f': { -+ setnvalue(L->top, cast_num(va_arg(argp, l_uacNumber))); -+ incr_top(L); -+ break; -+ } -+ case 'p': { -+ char buff[4*sizeof(void *) + 8]; /* should be enough space for a `%p' */ -+ sprintf(buff, "%p", va_arg(argp, void *)); -+ pushstr(L, buff); -+ break; -+ } -+ case '%': { -+ pushstr(L, "%"); -+ break; -+ } -+ default: { -+ char buff[3]; -+ buff[0] = '%'; -+ buff[1] = *(e+1); -+ buff[2] = '\0'; -+ pushstr(L, buff); -+ break; -+ } -+ } -+ n += 2; -+ fmt = e+2; -+ } -+ pushstr(L, fmt); -+ luaV_concat(L, n+1, cast_int(L->top - L->base) - 1); -+ L->top -= n; -+ return svalue(L->top - 1); -+} -+ -+ -+const char *luaO_pushfstring (lua_State *L, const char *fmt, ...) { -+ const char *msg; -+ va_list argp; -+ va_start(argp, fmt); -+ msg = luaO_pushvfstring(L, fmt, argp); -+ va_end(argp); -+ return msg; -+} -+ -+ -+void luaO_chunkid (char *out, const char *source, size_t bufflen) { -+ if (*source == '=') { -+ strncpy(out, source+1, bufflen); /* remove first char */ -+ out[bufflen-1] = '\0'; /* ensures null termination */ -+ } -+ else { /* out = "source", or "...source" */ -+ if (*source == '@') { -+ size_t l; -+ source++; /* skip the `@' */ -+ bufflen -= sizeof(" '...' "); -+ l = strlen(source); -+ strcpy(out, ""); -+ if (l > bufflen) { -+ source += (l-bufflen); /* get last part of file name */ -+ strcat(out, "..."); -+ } -+ strcat(out, source); -+ } -+ else { /* out = [string "string"] */ -+ size_t len = strcspn(source, "\n\r"); /* stop at first newline */ -+ bufflen -= sizeof(" [string \"...\"] "); -+ if (len > bufflen) len = bufflen; -+ strcpy(out, "[string \""); -+ if (source[len] != '\0') { /* must truncate? */ -+ strncat(out, source, len); -+ strcat(out, "..."); -+ } -+ else -+ strcat(out, source); -+ strcat(out, "\"]"); -+ } -+ } -+} ---- /dev/null -+++ b/extensions/LUA/lua/lobject.h -@@ -0,0 +1,381 @@ -+/* -+** $Id: lobject.h,v 2.20.1.2 2008/08/06 13:29:48 roberto Exp $ -+** Type definitions for Lua objects -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#ifndef lobject_h -+#define lobject_h -+ -+ -+#include -+ -+ -+#include "llimits.h" -+#include "lua.h" -+ -+ -+/* tags for values visible from Lua */ -+#define LAST_TAG LUA_TTHREAD -+ -+#define NUM_TAGS (LAST_TAG+1) -+ -+ -+/* -+** Extra tags for non-values -+*/ -+#define LUA_TPROTO (LAST_TAG+1) -+#define LUA_TUPVAL (LAST_TAG+2) -+#define LUA_TDEADKEY (LAST_TAG+3) -+ -+ -+/* -+** Union of all collectable objects -+*/ -+typedef union GCObject GCObject; -+ -+ -+/* -+** Common Header for all collectable objects (in macro form, to be -+** included in other objects) -+*/ -+#define CommonHeader GCObject *next; lu_byte tt; lu_byte marked -+ -+ -+/* -+** Common header in struct form -+*/ -+typedef struct GCheader { -+ CommonHeader; -+} GCheader; -+ -+ -+ -+ -+/* -+** Union of all Lua values -+*/ -+typedef union { -+ GCObject *gc; -+ void *p; -+ lua_Number n; -+ int b; -+} Value; -+ -+ -+/* -+** Tagged Values -+*/ -+ -+#define TValuefields Value value; int tt -+ -+typedef struct lua_TValue { -+ TValuefields; -+} TValue; -+ -+ -+/* Macros to test type */ -+#define ttisnil(o) (ttype(o) == LUA_TNIL) -+#define ttisnumber(o) (ttype(o) == LUA_TNUMBER) -+#define ttisstring(o) (ttype(o) == LUA_TSTRING) -+#define ttistable(o) (ttype(o) == LUA_TTABLE) -+#define ttisfunction(o) (ttype(o) == LUA_TFUNCTION) -+#define ttisboolean(o) (ttype(o) == LUA_TBOOLEAN) -+#define ttisuserdata(o) (ttype(o) == LUA_TUSERDATA) -+#define ttisthread(o) (ttype(o) == LUA_TTHREAD) -+#define ttislightuserdata(o) (ttype(o) == LUA_TLIGHTUSERDATA) -+ -+/* Macros to access values */ -+#define ttype(o) ((o)->tt) -+#define gcvalue(o) check_exp(iscollectable(o), (o)->value.gc) -+#define pvalue(o) check_exp(ttislightuserdata(o), (o)->value.p) -+#define nvalue(o) check_exp(ttisnumber(o), (o)->value.n) -+#define rawtsvalue(o) check_exp(ttisstring(o), &(o)->value.gc->ts) -+#define tsvalue(o) (&rawtsvalue(o)->tsv) -+#define rawuvalue(o) check_exp(ttisuserdata(o), &(o)->value.gc->u) -+#define uvalue(o) (&rawuvalue(o)->uv) -+#define clvalue(o) check_exp(ttisfunction(o), &(o)->value.gc->cl) -+#define hvalue(o) check_exp(ttistable(o), &(o)->value.gc->h) -+#define bvalue(o) check_exp(ttisboolean(o), (o)->value.b) -+#define thvalue(o) check_exp(ttisthread(o), &(o)->value.gc->th) -+ -+#define l_isfalse(o) (ttisnil(o) || (ttisboolean(o) && bvalue(o) == 0)) -+ -+/* -+** for internal debug only -+*/ -+#define checkconsistency(obj) \ -+ lua_assert(!iscollectable(obj) || (ttype(obj) == (obj)->value.gc->gch.tt)) -+ -+#define checkliveness(g,obj) \ -+ lua_assert(!iscollectable(obj) || \ -+ ((ttype(obj) == (obj)->value.gc->gch.tt) && !isdead(g, (obj)->value.gc))) -+ -+ -+/* Macros to set values */ -+#define setnilvalue(obj) ((obj)->tt=LUA_TNIL) -+ -+#define setnvalue(obj,x) \ -+ { TValue *i_o=(obj); i_o->value.n=(x); i_o->tt=LUA_TNUMBER; } -+ -+#define setpvalue(obj,x) \ -+ { TValue *i_o=(obj); i_o->value.p=(x); i_o->tt=LUA_TLIGHTUSERDATA; } -+ -+#define setbvalue(obj,x) \ -+ { TValue *i_o=(obj); i_o->value.b=(x); i_o->tt=LUA_TBOOLEAN; } -+ -+#define setsvalue(L,obj,x) \ -+ { TValue *i_o=(obj); \ -+ i_o->value.gc=cast(GCObject *, (x)); i_o->tt=LUA_TSTRING; \ -+ checkliveness(G(L),i_o); } -+ -+#define setuvalue(L,obj,x) \ -+ { TValue *i_o=(obj); \ -+ i_o->value.gc=cast(GCObject *, (x)); i_o->tt=LUA_TUSERDATA; \ -+ checkliveness(G(L),i_o); } -+ -+#define setthvalue(L,obj,x) \ -+ { TValue *i_o=(obj); \ -+ i_o->value.gc=cast(GCObject *, (x)); i_o->tt=LUA_TTHREAD; \ -+ checkliveness(G(L),i_o); } -+ -+#define setclvalue(L,obj,x) \ -+ { TValue *i_o=(obj); \ -+ i_o->value.gc=cast(GCObject *, (x)); i_o->tt=LUA_TFUNCTION; \ -+ checkliveness(G(L),i_o); } -+ -+#define sethvalue(L,obj,x) \ -+ { TValue *i_o=(obj); \ -+ i_o->value.gc=cast(GCObject *, (x)); i_o->tt=LUA_TTABLE; \ -+ checkliveness(G(L),i_o); } -+ -+#define setptvalue(L,obj,x) \ -+ { TValue *i_o=(obj); \ -+ i_o->value.gc=cast(GCObject *, (x)); i_o->tt=LUA_TPROTO; \ -+ checkliveness(G(L),i_o); } -+ -+ -+ -+ -+#define setobj(L,obj1,obj2) \ -+ { const TValue *o2=(obj2); TValue *o1=(obj1); \ -+ o1->value = o2->value; o1->tt=o2->tt; \ -+ checkliveness(G(L),o1); } -+ -+ -+/* -+** different types of sets, according to destination -+*/ -+ -+/* from stack to (same) stack */ -+#define setobjs2s setobj -+/* to stack (not from same stack) */ -+#define setobj2s setobj -+#define setsvalue2s setsvalue -+#define sethvalue2s sethvalue -+#define setptvalue2s setptvalue -+/* from table to same table */ -+#define setobjt2t setobj -+/* to table */ -+#define setobj2t setobj -+/* to new object */ -+#define setobj2n setobj -+#define setsvalue2n setsvalue -+ -+#define setttype(obj, tt) (ttype(obj) = (tt)) -+ -+ -+#define iscollectable(o) (ttype(o) >= LUA_TSTRING) -+ -+ -+ -+typedef TValue *StkId; /* index to stack elements */ -+ -+ -+/* -+** String headers for string table -+*/ -+typedef union TString { -+ L_Umaxalign dummy; /* ensures maximum alignment for strings */ -+ struct { -+ CommonHeader; -+ lu_byte reserved; -+ unsigned int hash; -+ size_t len; -+ } tsv; -+} TString; -+ -+ -+#define getstr(ts) cast(const char *, (ts) + 1) -+#define svalue(o) getstr(rawtsvalue(o)) -+ -+ -+ -+typedef union Udata { -+ L_Umaxalign dummy; /* ensures maximum alignment for `local' udata */ -+ struct { -+ CommonHeader; -+ struct Table *metatable; -+ struct Table *env; -+ size_t len; -+ } uv; -+} Udata; -+ -+ -+ -+ -+/* -+** Function Prototypes -+*/ -+typedef struct Proto { -+ CommonHeader; -+ TValue *k; /* constants used by the function */ -+ Instruction *code; -+ struct Proto **p; /* functions defined inside the function */ -+ int *lineinfo; /* map from opcodes to source lines */ -+ struct LocVar *locvars; /* information about local variables */ -+ TString **upvalues; /* upvalue names */ -+ TString *source; -+ int sizeupvalues; -+ int sizek; /* size of `k' */ -+ int sizecode; -+ int sizelineinfo; -+ int sizep; /* size of `p' */ -+ int sizelocvars; -+ int linedefined; -+ int lastlinedefined; -+ GCObject *gclist; -+ lu_byte nups; /* number of upvalues */ -+ lu_byte numparams; -+ lu_byte is_vararg; -+ lu_byte maxstacksize; -+} Proto; -+ -+ -+/* masks for new-style vararg */ -+#define VARARG_HASARG 1 -+#define VARARG_ISVARARG 2 -+#define VARARG_NEEDSARG 4 -+ -+ -+typedef struct LocVar { -+ TString *varname; -+ int startpc; /* first point where variable is active */ -+ int endpc; /* first point where variable is dead */ -+} LocVar; -+ -+ -+ -+/* -+** Upvalues -+*/ -+ -+typedef struct UpVal { -+ CommonHeader; -+ TValue *v; /* points to stack or to its own value */ -+ union { -+ TValue value; /* the value (when closed) */ -+ struct { /* double linked list (when open) */ -+ struct UpVal *prev; -+ struct UpVal *next; -+ } l; -+ } u; -+} UpVal; -+ -+ -+/* -+** Closures -+*/ -+ -+#define ClosureHeader \ -+ CommonHeader; lu_byte isC; lu_byte nupvalues; GCObject *gclist; \ -+ struct Table *env -+ -+typedef struct CClosure { -+ ClosureHeader; -+ lua_CFunction f; -+ TValue upvalue[1]; -+} CClosure; -+ -+ -+typedef struct LClosure { -+ ClosureHeader; -+ struct Proto *p; -+ UpVal *upvals[1]; -+} LClosure; -+ -+ -+typedef union Closure { -+ CClosure c; -+ LClosure l; -+} Closure; -+ -+ -+#define iscfunction(o) (ttype(o) == LUA_TFUNCTION && clvalue(o)->c.isC) -+#define isLfunction(o) (ttype(o) == LUA_TFUNCTION && !clvalue(o)->c.isC) -+ -+ -+/* -+** Tables -+*/ -+ -+typedef union TKey { -+ struct { -+ TValuefields; -+ struct Node *next; /* for chaining */ -+ } nk; -+ TValue tvk; -+} TKey; -+ -+ -+typedef struct Node { -+ TValue i_val; -+ TKey i_key; -+} Node; -+ -+ -+typedef struct Table { -+ CommonHeader; -+ lu_byte flags; /* 1<

lsizenode)) -+ -+ -+#define luaO_nilobject (&luaO_nilobject_) -+ -+LUAI_DATA const TValue luaO_nilobject_; -+ -+#define ceillog2(x) (luaO_log2((x)-1) + 1) -+ -+LUAI_FUNC int luaO_log2 (unsigned int x); -+LUAI_FUNC int luaO_int2fb (unsigned int x); -+LUAI_FUNC int luaO_fb2int (int x); -+LUAI_FUNC int luaO_rawequalObj (const TValue *t1, const TValue *t2); -+LUAI_FUNC int luaO_str2d (const char *s, lua_Number *result); -+LUAI_FUNC const char *luaO_pushvfstring (lua_State *L, const char *fmt, -+ va_list argp); -+LUAI_FUNC const char *luaO_pushfstring (lua_State *L, const char *fmt, ...); -+LUAI_FUNC void luaO_chunkid (char *out, const char *source, size_t len); -+ -+ -+#endif -+ ---- /dev/null -+++ b/extensions/LUA/lua/lopcodes.c -@@ -0,0 +1,102 @@ -+/* -+** $Id: lopcodes.c,v 1.37.1.1 2007/12/27 13:02:25 roberto Exp $ -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#define lopcodes_c -+#define LUA_CORE -+ -+ -+#include "lopcodes.h" -+ -+ -+/* ORDER OP */ -+ -+const char *const luaP_opnames[NUM_OPCODES+1] = { -+ "MOVE", -+ "LOADK", -+ "LOADBOOL", -+ "LOADNIL", -+ "GETUPVAL", -+ "GETGLOBAL", -+ "GETTABLE", -+ "SETGLOBAL", -+ "SETUPVAL", -+ "SETTABLE", -+ "NEWTABLE", -+ "SELF", -+ "ADD", -+ "SUB", -+ "MUL", -+ "DIV", -+ "MOD", -+ "POW", -+ "UNM", -+ "NOT", -+ "LEN", -+ "CONCAT", -+ "JMP", -+ "EQ", -+ "LT", -+ "LE", -+ "TEST", -+ "TESTSET", -+ "CALL", -+ "TAILCALL", -+ "RETURN", -+ "FORLOOP", -+ "FORPREP", -+ "TFORLOOP", -+ "SETLIST", -+ "CLOSE", -+ "CLOSURE", -+ "VARARG", -+ NULL -+}; -+ -+ -+#define opmode(t,a,b,c,m) (((t)<<7) | ((a)<<6) | ((b)<<4) | ((c)<<2) | (m)) -+ -+const lu_byte luaP_opmodes[NUM_OPCODES] = { -+/* T A B C mode opcode */ -+ opmode(0, 1, OpArgR, OpArgN, iABC) /* OP_MOVE */ -+ ,opmode(0, 1, OpArgK, OpArgN, iABx) /* OP_LOADK */ -+ ,opmode(0, 1, OpArgU, OpArgU, iABC) /* OP_LOADBOOL */ -+ ,opmode(0, 1, OpArgR, OpArgN, iABC) /* OP_LOADNIL */ -+ ,opmode(0, 1, OpArgU, OpArgN, iABC) /* OP_GETUPVAL */ -+ ,opmode(0, 1, OpArgK, OpArgN, iABx) /* OP_GETGLOBAL */ -+ ,opmode(0, 1, OpArgR, OpArgK, iABC) /* OP_GETTABLE */ -+ ,opmode(0, 0, OpArgK, OpArgN, iABx) /* OP_SETGLOBAL */ -+ ,opmode(0, 0, OpArgU, OpArgN, iABC) /* OP_SETUPVAL */ -+ ,opmode(0, 0, OpArgK, OpArgK, iABC) /* OP_SETTABLE */ -+ ,opmode(0, 1, OpArgU, OpArgU, iABC) /* OP_NEWTABLE */ -+ ,opmode(0, 1, OpArgR, OpArgK, iABC) /* OP_SELF */ -+ ,opmode(0, 1, OpArgK, OpArgK, iABC) /* OP_ADD */ -+ ,opmode(0, 1, OpArgK, OpArgK, iABC) /* OP_SUB */ -+ ,opmode(0, 1, OpArgK, OpArgK, iABC) /* OP_MUL */ -+ ,opmode(0, 1, OpArgK, OpArgK, iABC) /* OP_DIV */ -+ ,opmode(0, 1, OpArgK, OpArgK, iABC) /* OP_MOD */ -+ ,opmode(0, 1, OpArgK, OpArgK, iABC) /* OP_POW */ -+ ,opmode(0, 1, OpArgR, OpArgN, iABC) /* OP_UNM */ -+ ,opmode(0, 1, OpArgR, OpArgN, iABC) /* OP_NOT */ -+ ,opmode(0, 1, OpArgR, OpArgN, iABC) /* OP_LEN */ -+ ,opmode(0, 1, OpArgR, OpArgR, iABC) /* OP_CONCAT */ -+ ,opmode(0, 0, OpArgR, OpArgN, iAsBx) /* OP_JMP */ -+ ,opmode(1, 0, OpArgK, OpArgK, iABC) /* OP_EQ */ -+ ,opmode(1, 0, OpArgK, OpArgK, iABC) /* OP_LT */ -+ ,opmode(1, 0, OpArgK, OpArgK, iABC) /* OP_LE */ -+ ,opmode(1, 1, OpArgR, OpArgU, iABC) /* OP_TEST */ -+ ,opmode(1, 1, OpArgR, OpArgU, iABC) /* OP_TESTSET */ -+ ,opmode(0, 1, OpArgU, OpArgU, iABC) /* OP_CALL */ -+ ,opmode(0, 1, OpArgU, OpArgU, iABC) /* OP_TAILCALL */ -+ ,opmode(0, 0, OpArgU, OpArgN, iABC) /* OP_RETURN */ -+ ,opmode(0, 1, OpArgR, OpArgN, iAsBx) /* OP_FORLOOP */ -+ ,opmode(0, 1, OpArgR, OpArgN, iAsBx) /* OP_FORPREP */ -+ ,opmode(1, 0, OpArgN, OpArgU, iABC) /* OP_TFORLOOP */ -+ ,opmode(0, 0, OpArgU, OpArgU, iABC) /* OP_SETLIST */ -+ ,opmode(0, 0, OpArgN, OpArgN, iABC) /* OP_CLOSE */ -+ ,opmode(0, 1, OpArgU, OpArgN, iABx) /* OP_CLOSURE */ -+ ,opmode(0, 1, OpArgU, OpArgN, iABC) /* OP_VARARG */ -+}; -+ ---- /dev/null -+++ b/extensions/LUA/lua/lopcodes.h -@@ -0,0 +1,268 @@ -+/* -+** $Id: lopcodes.h,v 1.125.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Opcodes for Lua virtual machine -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lopcodes_h -+#define lopcodes_h -+ -+#include "llimits.h" -+ -+ -+/*=========================================================================== -+ We assume that instructions are unsigned numbers. -+ All instructions have an opcode in the first 6 bits. -+ Instructions can have the following fields: -+ `A' : 8 bits -+ `B' : 9 bits -+ `C' : 9 bits -+ `Bx' : 18 bits (`B' and `C' together) -+ `sBx' : signed Bx -+ -+ A signed argument is represented in excess K; that is, the number -+ value is the unsigned value minus K. K is exactly the maximum value -+ for that argument (so that -max is represented by 0, and +max is -+ represented by 2*max), which is half the maximum for the corresponding -+ unsigned argument. -+===========================================================================*/ -+ -+ -+enum OpMode {iABC, iABx, iAsBx}; /* basic instruction format */ -+ -+ -+/* -+** size and position of opcode arguments. -+*/ -+#define SIZE_C 9 -+#define SIZE_B 9 -+#define SIZE_Bx (SIZE_C + SIZE_B) -+#define SIZE_A 8 -+ -+#define SIZE_OP 6 -+ -+#define POS_OP 0 -+#define POS_A (POS_OP + SIZE_OP) -+#define POS_C (POS_A + SIZE_A) -+#define POS_B (POS_C + SIZE_C) -+#define POS_Bx POS_C -+ -+ -+/* -+** limits for opcode arguments. -+** we use (signed) int to manipulate most arguments, -+** so they must fit in LUAI_BITSINT-1 bits (-1 for sign) -+*/ -+#if SIZE_Bx < LUAI_BITSINT-1 -+#define MAXARG_Bx ((1<>1) /* `sBx' is signed */ -+#else -+#define MAXARG_Bx MAX_INT -+#define MAXARG_sBx MAX_INT -+#endif -+ -+ -+#define MAXARG_A ((1<>POS_OP) & MASK1(SIZE_OP,0))) -+#define SET_OPCODE(i,o) ((i) = (((i)&MASK0(SIZE_OP,POS_OP)) | \ -+ ((cast(Instruction, o)<>POS_A) & MASK1(SIZE_A,0))) -+#define SETARG_A(i,u) ((i) = (((i)&MASK0(SIZE_A,POS_A)) | \ -+ ((cast(Instruction, u)<>POS_B) & MASK1(SIZE_B,0))) -+#define SETARG_B(i,b) ((i) = (((i)&MASK0(SIZE_B,POS_B)) | \ -+ ((cast(Instruction, b)<>POS_C) & MASK1(SIZE_C,0))) -+#define SETARG_C(i,b) ((i) = (((i)&MASK0(SIZE_C,POS_C)) | \ -+ ((cast(Instruction, b)<>POS_Bx) & MASK1(SIZE_Bx,0))) -+#define SETARG_Bx(i,b) ((i) = (((i)&MASK0(SIZE_Bx,POS_Bx)) | \ -+ ((cast(Instruction, b)< C) then pc++ */ -+OP_TESTSET,/* A B C if (R(B) <=> C) then R(A) := R(B) else pc++ */ -+ -+OP_CALL,/* A B C R(A), ... ,R(A+C-2) := R(A)(R(A+1), ... ,R(A+B-1)) */ -+OP_TAILCALL,/* A B C return R(A)(R(A+1), ... ,R(A+B-1)) */ -+OP_RETURN,/* A B return R(A), ... ,R(A+B-2) (see note) */ -+ -+OP_FORLOOP,/* A sBx R(A)+=R(A+2); -+ if R(A) =) R(A)*/ -+OP_CLOSURE,/* A Bx R(A) := closure(KPROTO[Bx], R(A), ... ,R(A+n)) */ -+ -+OP_VARARG/* A B R(A), R(A+1), ..., R(A+B-1) = vararg */ -+} OpCode; -+ -+ -+#define NUM_OPCODES (cast(int, OP_VARARG) + 1) -+ -+ -+ -+/*=========================================================================== -+ Notes: -+ (*) In OP_CALL, if (B == 0) then B = top. C is the number of returns - 1, -+ and can be 0: OP_CALL then sets `top' to last_result+1, so -+ next open instruction (OP_CALL, OP_RETURN, OP_SETLIST) may use `top'. -+ -+ (*) In OP_VARARG, if (B == 0) then use actual number of varargs and -+ set top (like in OP_CALL with C == 0). -+ -+ (*) In OP_RETURN, if (B == 0) then return up to `top' -+ -+ (*) In OP_SETLIST, if (B == 0) then B = `top'; -+ if (C == 0) then next `instruction' is real C -+ -+ (*) For comparisons, A specifies what condition the test should accept -+ (true or false). -+ -+ (*) All `skips' (pc++) assume that next instruction is a jump -+===========================================================================*/ -+ -+ -+/* -+** masks for instruction properties. The format is: -+** bits 0-1: op mode -+** bits 2-3: C arg mode -+** bits 4-5: B arg mode -+** bit 6: instruction set register A -+** bit 7: operator is a test -+*/ -+ -+enum OpArgMask { -+ OpArgN, /* argument is not used */ -+ OpArgU, /* argument is used */ -+ OpArgR, /* argument is a register or a jump offset */ -+ OpArgK /* argument is a constant or register/constant */ -+}; -+ -+LUAI_DATA const lu_byte luaP_opmodes[NUM_OPCODES]; -+ -+#define getOpMode(m) (cast(enum OpMode, luaP_opmodes[m] & 3)) -+#define getBMode(m) (cast(enum OpArgMask, (luaP_opmodes[m] >> 4) & 3)) -+#define getCMode(m) (cast(enum OpArgMask, (luaP_opmodes[m] >> 2) & 3)) -+#define testAMode(m) (luaP_opmodes[m] & (1 << 6)) -+#define testTMode(m) (luaP_opmodes[m] & (1 << 7)) -+ -+ -+LUAI_DATA const char *const luaP_opnames[NUM_OPCODES+1]; /* opcode names */ -+ -+ -+/* number of list items to accumulate before a SETLIST instruction */ -+#define LFIELDS_PER_FLUSH 50 -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lparser.c -@@ -0,0 +1,1339 @@ -+/* -+** $Id: lparser.c,v 2.42.1.3 2007/12/28 15:32:23 roberto Exp $ -+** Lua Parser -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+ -+#define lparser_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lcode.h" -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "llex.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lopcodes.h" -+#include "lparser.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+ -+ -+ -+#define hasmultret(k) ((k) == VCALL || (k) == VVARARG) -+ -+#define getlocvar(fs, i) ((fs)->f->locvars[(fs)->actvar[i]]) -+ -+#define luaY_checklimit(fs,v,l,m) if ((v)>(l)) errorlimit(fs,l,m) -+ -+ -+/* -+** nodes for block list (list of active blocks) -+*/ -+typedef struct BlockCnt { -+ struct BlockCnt *previous; /* chain */ -+ int breaklist; /* list of jumps out of this loop */ -+ lu_byte nactvar; /* # active locals outside the breakable structure */ -+ lu_byte upval; /* true if some variable in the block is an upvalue */ -+ lu_byte isbreakable; /* true if `block' is a loop */ -+} BlockCnt; -+ -+ -+ -+/* -+** prototypes for recursive non-terminal functions -+*/ -+static void chunk (LexState *ls); -+static void expr (LexState *ls, expdesc *v); -+ -+ -+static void anchor_token (LexState *ls) { -+ if (ls->t.token == TK_NAME || ls->t.token == TK_STRING) { -+ TString *ts = ls->t.seminfo.ts; -+ luaX_newstring(ls, getstr(ts), ts->tsv.len); -+ } -+} -+ -+ -+static void error_expected (LexState *ls, int token) { -+ luaX_syntaxerror(ls, -+ luaO_pushfstring(ls->L, LUA_QS " expected", luaX_token2str(ls, token))); -+} -+ -+ -+static void errorlimit (FuncState *fs, int limit, const char *what) { -+ const char *msg = (fs->f->linedefined == 0) ? -+ luaO_pushfstring(fs->L, "main function has more than %d %s", limit, what) : -+ luaO_pushfstring(fs->L, "function at line %d has more than %d %s", -+ fs->f->linedefined, limit, what); -+ luaX_lexerror(fs->ls, msg, 0); -+} -+ -+ -+static int testnext (LexState *ls, int c) { -+ if (ls->t.token == c) { -+ luaX_next(ls); -+ return 1; -+ } -+ else return 0; -+} -+ -+ -+static void check (LexState *ls, int c) { -+ if (ls->t.token != c) -+ error_expected(ls, c); -+} -+ -+static void checknext (LexState *ls, int c) { -+ check(ls, c); -+ luaX_next(ls); -+} -+ -+ -+#define check_condition(ls,c,msg) { if (!(c)) luaX_syntaxerror(ls, msg); } -+ -+ -+ -+static void check_match (LexState *ls, int what, int who, int where) { -+ if (!testnext(ls, what)) { -+ if (where == ls->linenumber) -+ error_expected(ls, what); -+ else { -+ luaX_syntaxerror(ls, luaO_pushfstring(ls->L, -+ LUA_QS " expected (to close " LUA_QS " at line %d)", -+ luaX_token2str(ls, what), luaX_token2str(ls, who), where)); -+ } -+ } -+} -+ -+ -+static TString *str_checkname (LexState *ls) { -+ TString *ts; -+ check(ls, TK_NAME); -+ ts = ls->t.seminfo.ts; -+ luaX_next(ls); -+ return ts; -+} -+ -+ -+static void init_exp (expdesc *e, expkind k, int i) { -+ e->f = e->t = NO_JUMP; -+ e->k = k; -+ e->u.s.info = i; -+} -+ -+ -+static void codestring (LexState *ls, expdesc *e, TString *s) { -+ init_exp(e, VK, luaK_stringK(ls->fs, s)); -+} -+ -+ -+static void checkname(LexState *ls, expdesc *e) { -+ codestring(ls, e, str_checkname(ls)); -+} -+ -+ -+static int registerlocalvar (LexState *ls, TString *varname) { -+ FuncState *fs = ls->fs; -+ Proto *f = fs->f; -+ int oldsize = f->sizelocvars; -+ luaM_growvector(ls->L, f->locvars, fs->nlocvars, f->sizelocvars, -+ LocVar, SHRT_MAX, "too many local variables"); -+ while (oldsize < f->sizelocvars) f->locvars[oldsize++].varname = NULL; -+ f->locvars[fs->nlocvars].varname = varname; -+ luaC_objbarrier(ls->L, f, varname); -+ return fs->nlocvars++; -+} -+ -+ -+#define new_localvarliteral(ls,v,n) \ -+ new_localvar(ls, luaX_newstring(ls, "" v, (sizeof(v)/sizeof(char))-1), n) -+ -+ -+static void new_localvar (LexState *ls, TString *name, int n) { -+ FuncState *fs = ls->fs; -+ luaY_checklimit(fs, fs->nactvar+n+1, LUAI_MAXVARS, "local variables"); -+ fs->actvar[fs->nactvar+n] = cast(unsigned short, registerlocalvar(ls, name)); -+} -+ -+ -+static void adjustlocalvars (LexState *ls, int nvars) { -+ FuncState *fs = ls->fs; -+ fs->nactvar = cast_byte(fs->nactvar + nvars); -+ for (; nvars; nvars--) { -+ getlocvar(fs, fs->nactvar - nvars).startpc = fs->pc; -+ } -+} -+ -+ -+static void removevars (LexState *ls, int tolevel) { -+ FuncState *fs = ls->fs; -+ while (fs->nactvar > tolevel) -+ getlocvar(fs, --fs->nactvar).endpc = fs->pc; -+} -+ -+ -+static int indexupvalue (FuncState *fs, TString *name, expdesc *v) { -+ int i; -+ Proto *f = fs->f; -+ int oldsize = f->sizeupvalues; -+ for (i=0; inups; i++) { -+ if (fs->upvalues[i].k == v->k && fs->upvalues[i].info == v->u.s.info) { -+ lua_assert(f->upvalues[i] == name); -+ return i; -+ } -+ } -+ /* new one */ -+ luaY_checklimit(fs, f->nups + 1, LUAI_MAXUPVALUES, "upvalues"); -+ luaM_growvector(fs->L, f->upvalues, f->nups, f->sizeupvalues, -+ TString *, MAX_INT, ""); -+ while (oldsize < f->sizeupvalues) f->upvalues[oldsize++] = NULL; -+ f->upvalues[f->nups] = name; -+ luaC_objbarrier(fs->L, f, name); -+ lua_assert(v->k == VLOCAL || v->k == VUPVAL); -+ fs->upvalues[f->nups].k = cast_byte(v->k); -+ fs->upvalues[f->nups].info = cast_byte(v->u.s.info); -+ return f->nups++; -+} -+ -+ -+static int searchvar (FuncState *fs, TString *n) { -+ int i; -+ for (i=fs->nactvar-1; i >= 0; i--) { -+ if (n == getlocvar(fs, i).varname) -+ return i; -+ } -+ return -1; /* not found */ -+} -+ -+ -+static void markupval (FuncState *fs, int level) { -+ BlockCnt *bl = fs->bl; -+ while (bl && bl->nactvar > level) bl = bl->previous; -+ if (bl) bl->upval = 1; -+} -+ -+ -+static int singlevaraux (FuncState *fs, TString *n, expdesc *var, int base) { -+ if (fs == NULL) { /* no more levels? */ -+ init_exp(var, VGLOBAL, NO_REG); /* default is global variable */ -+ return VGLOBAL; -+ } -+ else { -+ int v = searchvar(fs, n); /* look up at current level */ -+ if (v >= 0) { -+ init_exp(var, VLOCAL, v); -+ if (!base) -+ markupval(fs, v); /* local will be used as an upval */ -+ return VLOCAL; -+ } -+ else { /* not found at current level; try upper one */ -+ if (singlevaraux(fs->prev, n, var, 0) == VGLOBAL) -+ return VGLOBAL; -+ var->u.s.info = indexupvalue(fs, n, var); /* else was LOCAL or UPVAL */ -+ var->k = VUPVAL; /* upvalue in this level */ -+ return VUPVAL; -+ } -+ } -+} -+ -+ -+static void singlevar (LexState *ls, expdesc *var) { -+ TString *varname = str_checkname(ls); -+ FuncState *fs = ls->fs; -+ if (singlevaraux(fs, varname, var, 1) == VGLOBAL) -+ var->u.s.info = luaK_stringK(fs, varname); /* info points to global name */ -+} -+ -+ -+static void adjust_assign (LexState *ls, int nvars, int nexps, expdesc *e) { -+ FuncState *fs = ls->fs; -+ int extra = nvars - nexps; -+ if (hasmultret(e->k)) { -+ extra++; /* includes call itself */ -+ if (extra < 0) extra = 0; -+ luaK_setreturns(fs, e, extra); /* last exp. provides the difference */ -+ if (extra > 1) luaK_reserveregs(fs, extra-1); -+ } -+ else { -+ if (e->k != VVOID) luaK_exp2nextreg(fs, e); /* close last expression */ -+ if (extra > 0) { -+ int reg = fs->freereg; -+ luaK_reserveregs(fs, extra); -+ luaK_nil(fs, reg, extra); -+ } -+ } -+} -+ -+ -+static void enterlevel (LexState *ls) { -+ if (++ls->L->nCcalls > LUAI_MAXCCALLS) -+ luaX_lexerror(ls, "chunk has too many syntax levels", 0); -+} -+ -+ -+#define leavelevel(ls) ((ls)->L->nCcalls--) -+ -+ -+static void enterblock (FuncState *fs, BlockCnt *bl, lu_byte isbreakable) { -+ bl->breaklist = NO_JUMP; -+ bl->isbreakable = isbreakable; -+ bl->nactvar = fs->nactvar; -+ bl->upval = 0; -+ bl->previous = fs->bl; -+ fs->bl = bl; -+ lua_assert(fs->freereg == fs->nactvar); -+} -+ -+ -+static void leaveblock (FuncState *fs) { -+ BlockCnt *bl = fs->bl; -+ fs->bl = bl->previous; -+ removevars(fs->ls, bl->nactvar); -+ if (bl->upval) -+ luaK_codeABC(fs, OP_CLOSE, bl->nactvar, 0, 0); -+ /* a block either controls scope or breaks (never both) */ -+ lua_assert(!bl->isbreakable || !bl->upval); -+ lua_assert(bl->nactvar == fs->nactvar); -+ fs->freereg = fs->nactvar; /* free registers */ -+ luaK_patchtohere(fs, bl->breaklist); -+} -+ -+ -+static void pushclosure (LexState *ls, FuncState *func, expdesc *v) { -+ FuncState *fs = ls->fs; -+ Proto *f = fs->f; -+ int oldsize = f->sizep; -+ int i; -+ luaM_growvector(ls->L, f->p, fs->np, f->sizep, Proto *, -+ MAXARG_Bx, "constant table overflow"); -+ while (oldsize < f->sizep) f->p[oldsize++] = NULL; -+ f->p[fs->np++] = func->f; -+ luaC_objbarrier(ls->L, f, func->f); -+ init_exp(v, VRELOCABLE, luaK_codeABx(fs, OP_CLOSURE, 0, fs->np-1)); -+ for (i=0; if->nups; i++) { -+ OpCode o = (func->upvalues[i].k == VLOCAL) ? OP_MOVE : OP_GETUPVAL; -+ luaK_codeABC(fs, o, 0, func->upvalues[i].info, 0); -+ } -+} -+ -+ -+static void open_func (LexState *ls, FuncState *fs) { -+ lua_State *L = ls->L; -+ Proto *f = luaF_newproto(L); -+ fs->f = f; -+ fs->prev = ls->fs; /* linked list of funcstates */ -+ fs->ls = ls; -+ fs->L = L; -+ ls->fs = fs; -+ fs->pc = 0; -+ fs->lasttarget = -1; -+ fs->jpc = NO_JUMP; -+ fs->freereg = 0; -+ fs->nk = 0; -+ fs->np = 0; -+ fs->nlocvars = 0; -+ fs->nactvar = 0; -+ fs->bl = NULL; -+ f->source = ls->source; -+ f->maxstacksize = 2; /* registers 0/1 are always valid */ -+ fs->h = luaH_new(L, 0, 0); -+ /* anchor table of constants and prototype (to avoid being collected) */ -+ sethvalue2s(L, L->top, fs->h); -+ incr_top(L); -+ setptvalue2s(L, L->top, f); -+ incr_top(L); -+} -+ -+ -+static void close_func (LexState *ls) { -+ lua_State *L = ls->L; -+ FuncState *fs = ls->fs; -+ Proto *f = fs->f; -+ removevars(ls, 0); -+ luaK_ret(fs, 0, 0); /* final return */ -+ luaM_reallocvector(L, f->code, f->sizecode, fs->pc, Instruction); -+ f->sizecode = fs->pc; -+ luaM_reallocvector(L, f->lineinfo, f->sizelineinfo, fs->pc, int); -+ f->sizelineinfo = fs->pc; -+ luaM_reallocvector(L, f->k, f->sizek, fs->nk, TValue); -+ f->sizek = fs->nk; -+ luaM_reallocvector(L, f->p, f->sizep, fs->np, Proto *); -+ f->sizep = fs->np; -+ luaM_reallocvector(L, f->locvars, f->sizelocvars, fs->nlocvars, LocVar); -+ f->sizelocvars = fs->nlocvars; -+ luaM_reallocvector(L, f->upvalues, f->sizeupvalues, f->nups, TString *); -+ f->sizeupvalues = f->nups; -+ lua_assert(luaG_checkcode(f)); -+ lua_assert(fs->bl == NULL); -+ ls->fs = fs->prev; -+ L->top -= 2; /* remove table and prototype from the stack */ -+ /* last token read was anchored in defunct function; must reanchor it */ -+ if (fs) anchor_token(ls); -+} -+ -+ -+Proto *luaY_parser (lua_State *L, ZIO *z, Mbuffer *buff, const char *name) { -+ struct LexState lexstate; -+ struct FuncState funcstate; -+ lexstate.buff = buff; -+ luaX_setinput(L, &lexstate, z, luaS_new(L, name)); -+ open_func(&lexstate, &funcstate); -+ funcstate.f->is_vararg = VARARG_ISVARARG; /* main func. is always vararg */ -+ luaX_next(&lexstate); /* read first token */ -+ chunk(&lexstate); -+ check(&lexstate, TK_EOS); -+ close_func(&lexstate); -+ lua_assert(funcstate.prev == NULL); -+ lua_assert(funcstate.f->nups == 0); -+ lua_assert(lexstate.fs == NULL); -+ return funcstate.f; -+} -+ -+ -+ -+/*============================================================*/ -+/* GRAMMAR RULES */ -+/*============================================================*/ -+ -+ -+static void field (LexState *ls, expdesc *v) { -+ /* field -> ['.' | ':'] NAME */ -+ FuncState *fs = ls->fs; -+ expdesc key; -+ luaK_exp2anyreg(fs, v); -+ luaX_next(ls); /* skip the dot or colon */ -+ checkname(ls, &key); -+ luaK_indexed(fs, v, &key); -+} -+ -+ -+static void yindex (LexState *ls, expdesc *v) { -+ /* index -> '[' expr ']' */ -+ luaX_next(ls); /* skip the '[' */ -+ expr(ls, v); -+ luaK_exp2val(ls->fs, v); -+ checknext(ls, ']'); -+} -+ -+ -+/* -+** {====================================================================== -+** Rules for Constructors -+** ======================================================================= -+*/ -+ -+ -+struct ConsControl { -+ expdesc v; /* last list item read */ -+ expdesc *t; /* table descriptor */ -+ int nh; /* total number of `record' elements */ -+ int na; /* total number of array elements */ -+ int tostore; /* number of array elements pending to be stored */ -+}; -+ -+ -+static void recfield (LexState *ls, struct ConsControl *cc) { -+ /* recfield -> (NAME | `['exp1`]') = exp1 */ -+ FuncState *fs = ls->fs; -+ int reg = ls->fs->freereg; -+ expdesc key, val; -+ int rkkey; -+ if (ls->t.token == TK_NAME) { -+ luaY_checklimit(fs, cc->nh, MAX_INT, "items in a constructor"); -+ checkname(ls, &key); -+ } -+ else /* ls->t.token == '[' */ -+ yindex(ls, &key); -+ cc->nh++; -+ checknext(ls, '='); -+ rkkey = luaK_exp2RK(fs, &key); -+ expr(ls, &val); -+ luaK_codeABC(fs, OP_SETTABLE, cc->t->u.s.info, rkkey, luaK_exp2RK(fs, &val)); -+ fs->freereg = reg; /* free registers */ -+} -+ -+ -+static void closelistfield (FuncState *fs, struct ConsControl *cc) { -+ if (cc->v.k == VVOID) return; /* there is no list item */ -+ luaK_exp2nextreg(fs, &cc->v); -+ cc->v.k = VVOID; -+ if (cc->tostore == LFIELDS_PER_FLUSH) { -+ luaK_setlist(fs, cc->t->u.s.info, cc->na, cc->tostore); /* flush */ -+ cc->tostore = 0; /* no more items pending */ -+ } -+} -+ -+ -+static void lastlistfield (FuncState *fs, struct ConsControl *cc) { -+ if (cc->tostore == 0) return; -+ if (hasmultret(cc->v.k)) { -+ luaK_setmultret(fs, &cc->v); -+ luaK_setlist(fs, cc->t->u.s.info, cc->na, LUA_MULTRET); -+ cc->na--; /* do not count last expression (unknown number of elements) */ -+ } -+ else { -+ if (cc->v.k != VVOID) -+ luaK_exp2nextreg(fs, &cc->v); -+ luaK_setlist(fs, cc->t->u.s.info, cc->na, cc->tostore); -+ } -+} -+ -+ -+static void listfield (LexState *ls, struct ConsControl *cc) { -+ expr(ls, &cc->v); -+ luaY_checklimit(ls->fs, cc->na, MAX_INT, "items in a constructor"); -+ cc->na++; -+ cc->tostore++; -+} -+ -+ -+static void constructor (LexState *ls, expdesc *t) { -+ /* constructor -> ?? */ -+ FuncState *fs = ls->fs; -+ int line = ls->linenumber; -+ int pc = luaK_codeABC(fs, OP_NEWTABLE, 0, 0, 0); -+ struct ConsControl cc; -+ cc.na = cc.nh = cc.tostore = 0; -+ cc.t = t; -+ init_exp(t, VRELOCABLE, pc); -+ init_exp(&cc.v, VVOID, 0); /* no value (yet) */ -+ luaK_exp2nextreg(ls->fs, t); /* fix it at stack top (for gc) */ -+ checknext(ls, '{'); -+ do { -+ lua_assert(cc.v.k == VVOID || cc.tostore > 0); -+ if (ls->t.token == '}') break; -+ closelistfield(fs, &cc); -+ switch(ls->t.token) { -+ case TK_NAME: { /* may be listfields or recfields */ -+ luaX_lookahead(ls); -+ if (ls->lookahead.token != '=') /* expression? */ -+ listfield(ls, &cc); -+ else -+ recfield(ls, &cc); -+ break; -+ } -+ case '[': { /* constructor_item -> recfield */ -+ recfield(ls, &cc); -+ break; -+ } -+ default: { /* constructor_part -> listfield */ -+ listfield(ls, &cc); -+ break; -+ } -+ } -+ } while (testnext(ls, ',') || testnext(ls, ';')); -+ check_match(ls, '}', '{', line); -+ lastlistfield(fs, &cc); -+ SETARG_B(fs->f->code[pc], luaO_int2fb(cc.na)); /* set initial array size */ -+ SETARG_C(fs->f->code[pc], luaO_int2fb(cc.nh)); /* set initial table size */ -+} -+ -+/* }====================================================================== */ -+ -+ -+ -+static void parlist (LexState *ls) { -+ /* parlist -> [ param { `,' param } ] */ -+ FuncState *fs = ls->fs; -+ Proto *f = fs->f; -+ int nparams = 0; -+ f->is_vararg = 0; -+ if (ls->t.token != ')') { /* is `parlist' not empty? */ -+ do { -+ switch (ls->t.token) { -+ case TK_NAME: { /* param -> NAME */ -+ new_localvar(ls, str_checkname(ls), nparams++); -+ break; -+ } -+ case TK_DOTS: { /* param -> `...' */ -+ luaX_next(ls); -+#if defined(LUA_COMPAT_VARARG) -+ /* use `arg' as default name */ -+ new_localvarliteral(ls, "arg", nparams++); -+ f->is_vararg = VARARG_HASARG | VARARG_NEEDSARG; -+#endif -+ f->is_vararg |= VARARG_ISVARARG; -+ break; -+ } -+ default: luaX_syntaxerror(ls, " or " LUA_QL("...") " expected"); -+ } -+ } while (!f->is_vararg && testnext(ls, ',')); -+ } -+ adjustlocalvars(ls, nparams); -+ f->numparams = cast_byte(fs->nactvar - (f->is_vararg & VARARG_HASARG)); -+ luaK_reserveregs(fs, fs->nactvar); /* reserve register for parameters */ -+} -+ -+ -+static void body (LexState *ls, expdesc *e, int needself, int line) { -+ /* body -> `(' parlist `)' chunk END */ -+ FuncState new_fs; -+ open_func(ls, &new_fs); -+ new_fs.f->linedefined = line; -+ checknext(ls, '('); -+ if (needself) { -+ new_localvarliteral(ls, "self", 0); -+ adjustlocalvars(ls, 1); -+ } -+ parlist(ls); -+ checknext(ls, ')'); -+ chunk(ls); -+ new_fs.f->lastlinedefined = ls->linenumber; -+ check_match(ls, TK_END, TK_FUNCTION, line); -+ close_func(ls); -+ pushclosure(ls, &new_fs, e); -+} -+ -+ -+static int explist1 (LexState *ls, expdesc *v) { -+ /* explist1 -> expr { `,' expr } */ -+ int n = 1; /* at least one expression */ -+ expr(ls, v); -+ while (testnext(ls, ',')) { -+ luaK_exp2nextreg(ls->fs, v); -+ expr(ls, v); -+ n++; -+ } -+ return n; -+} -+ -+ -+static void funcargs (LexState *ls, expdesc *f) { -+ FuncState *fs = ls->fs; -+ expdesc args; -+ int base, nparams; -+ int line = ls->linenumber; -+ switch (ls->t.token) { -+ case '(': { /* funcargs -> `(' [ explist1 ] `)' */ -+ if (line != ls->lastline) -+ luaX_syntaxerror(ls,"ambiguous syntax (function call x new statement)"); -+ luaX_next(ls); -+ if (ls->t.token == ')') /* arg list is empty? */ -+ args.k = VVOID; -+ else { -+ explist1(ls, &args); -+ luaK_setmultret(fs, &args); -+ } -+ check_match(ls, ')', '(', line); -+ break; -+ } -+ case '{': { /* funcargs -> constructor */ -+ constructor(ls, &args); -+ break; -+ } -+ case TK_STRING: { /* funcargs -> STRING */ -+ codestring(ls, &args, ls->t.seminfo.ts); -+ luaX_next(ls); /* must use `seminfo' before `next' */ -+ break; -+ } -+ default: { -+ luaX_syntaxerror(ls, "function arguments expected"); -+ return; -+ } -+ } -+ lua_assert(f->k == VNONRELOC); -+ base = f->u.s.info; /* base register for call */ -+ if (hasmultret(args.k)) -+ nparams = LUA_MULTRET; /* open call */ -+ else { -+ if (args.k != VVOID) -+ luaK_exp2nextreg(fs, &args); /* close last argument */ -+ nparams = fs->freereg - (base+1); -+ } -+ init_exp(f, VCALL, luaK_codeABC(fs, OP_CALL, base, nparams+1, 2)); -+ luaK_fixline(fs, line); -+ fs->freereg = base+1; /* call remove function and arguments and leaves -+ (unless changed) one result */ -+} -+ -+ -+ -+ -+/* -+** {====================================================================== -+** Expression parsing -+** ======================================================================= -+*/ -+ -+ -+static void prefixexp (LexState *ls, expdesc *v) { -+ /* prefixexp -> NAME | '(' expr ')' */ -+ switch (ls->t.token) { -+ case '(': { -+ int line = ls->linenumber; -+ luaX_next(ls); -+ expr(ls, v); -+ check_match(ls, ')', '(', line); -+ luaK_dischargevars(ls->fs, v); -+ return; -+ } -+ case TK_NAME: { -+ singlevar(ls, v); -+ return; -+ } -+ default: { -+ luaX_syntaxerror(ls, "unexpected symbol"); -+ return; -+ } -+ } -+} -+ -+ -+static void primaryexp (LexState *ls, expdesc *v) { -+ /* primaryexp -> -+ prefixexp { `.' NAME | `[' exp `]' | `:' NAME funcargs | funcargs } */ -+ FuncState *fs = ls->fs; -+ prefixexp(ls, v); -+ for (;;) { -+ switch (ls->t.token) { -+ case '.': { /* field */ -+ field(ls, v); -+ break; -+ } -+ case '[': { /* `[' exp1 `]' */ -+ expdesc key; -+ luaK_exp2anyreg(fs, v); -+ yindex(ls, &key); -+ luaK_indexed(fs, v, &key); -+ break; -+ } -+ case ':': { /* `:' NAME funcargs */ -+ expdesc key; -+ luaX_next(ls); -+ checkname(ls, &key); -+ luaK_self(fs, v, &key); -+ funcargs(ls, v); -+ break; -+ } -+ case '(': case TK_STRING: case '{': { /* funcargs */ -+ luaK_exp2nextreg(fs, v); -+ funcargs(ls, v); -+ break; -+ } -+ default: return; -+ } -+ } -+} -+ -+ -+static void simpleexp (LexState *ls, expdesc *v) { -+ /* simpleexp -> NUMBER | STRING | NIL | true | false | ... | -+ constructor | FUNCTION body | primaryexp */ -+ switch (ls->t.token) { -+ case TK_NUMBER: { -+ init_exp(v, VKNUM, 0); -+ v->u.nval = ls->t.seminfo.r; -+ break; -+ } -+ case TK_STRING: { -+ codestring(ls, v, ls->t.seminfo.ts); -+ break; -+ } -+ case TK_NIL: { -+ init_exp(v, VNIL, 0); -+ break; -+ } -+ case TK_TRUE: { -+ init_exp(v, VTRUE, 0); -+ break; -+ } -+ case TK_FALSE: { -+ init_exp(v, VFALSE, 0); -+ break; -+ } -+ case TK_DOTS: { /* vararg */ -+ FuncState *fs = ls->fs; -+ check_condition(ls, fs->f->is_vararg, -+ "cannot use " LUA_QL("...") " outside a vararg function"); -+ fs->f->is_vararg &= ~VARARG_NEEDSARG; /* don't need 'arg' */ -+ init_exp(v, VVARARG, luaK_codeABC(fs, OP_VARARG, 0, 1, 0)); -+ break; -+ } -+ case '{': { /* constructor */ -+ constructor(ls, v); -+ return; -+ } -+ case TK_FUNCTION: { -+ luaX_next(ls); -+ body(ls, v, 0, ls->linenumber); -+ return; -+ } -+ default: { -+ primaryexp(ls, v); -+ return; -+ } -+ } -+ luaX_next(ls); -+} -+ -+ -+static UnOpr getunopr (int op) { -+ switch (op) { -+ case TK_NOT: return OPR_NOT; -+ case '-': return OPR_MINUS; -+ case '#': return OPR_LEN; -+ default: return OPR_NOUNOPR; -+ } -+} -+ -+ -+static BinOpr getbinopr (int op) { -+ switch (op) { -+ case '+': return OPR_ADD; -+ case '-': return OPR_SUB; -+ case '*': return OPR_MUL; -+ case '/': return OPR_DIV; -+ case '%': return OPR_MOD; -+ case '^': return OPR_POW; -+ case TK_CONCAT: return OPR_CONCAT; -+ case TK_NE: return OPR_NE; -+ case TK_EQ: return OPR_EQ; -+ case '<': return OPR_LT; -+ case TK_LE: return OPR_LE; -+ case '>': return OPR_GT; -+ case TK_GE: return OPR_GE; -+ case TK_AND: return OPR_AND; -+ case TK_OR: return OPR_OR; -+ default: return OPR_NOBINOPR; -+ } -+} -+ -+ -+static const struct { -+ lu_byte left; /* left priority for each binary operator */ -+ lu_byte right; /* right priority */ -+} priority[] = { /* ORDER OPR */ -+ {6, 6}, {6, 6}, {7, 7}, {7, 7}, {7, 7}, /* `+' `-' `/' `%' */ -+ {10, 9}, {5, 4}, /* power and concat (right associative) */ -+ {3, 3}, {3, 3}, /* equality and inequality */ -+ {3, 3}, {3, 3}, {3, 3}, {3, 3}, /* order */ -+ {2, 2}, {1, 1} /* logical (and/or) */ -+}; -+ -+#define UNARY_PRIORITY 8 /* priority for unary operators */ -+ -+ -+/* -+** subexpr -> (simpleexp | unop subexpr) { binop subexpr } -+** where `binop' is any binary operator with a priority higher than `limit' -+*/ -+static BinOpr subexpr (LexState *ls, expdesc *v, unsigned int limit) { -+ BinOpr op; -+ UnOpr uop; -+ enterlevel(ls); -+ uop = getunopr(ls->t.token); -+ if (uop != OPR_NOUNOPR) { -+ luaX_next(ls); -+ subexpr(ls, v, UNARY_PRIORITY); -+ luaK_prefix(ls->fs, uop, v); -+ } -+ else simpleexp(ls, v); -+ /* expand while operators have priorities higher than `limit' */ -+ op = getbinopr(ls->t.token); -+ while (op != OPR_NOBINOPR && priority[op].left > limit) { -+ expdesc v2; -+ BinOpr nextop; -+ luaX_next(ls); -+ luaK_infix(ls->fs, op, v); -+ /* read sub-expression with higher priority */ -+ nextop = subexpr(ls, &v2, priority[op].right); -+ luaK_posfix(ls->fs, op, v, &v2); -+ op = nextop; -+ } -+ leavelevel(ls); -+ return op; /* return first untreated operator */ -+} -+ -+ -+static void expr (LexState *ls, expdesc *v) { -+ subexpr(ls, v, 0); -+} -+ -+/* }==================================================================== */ -+ -+ -+ -+/* -+** {====================================================================== -+** Rules for Statements -+** ======================================================================= -+*/ -+ -+ -+static int block_follow (int token) { -+ switch (token) { -+ case TK_ELSE: case TK_ELSEIF: case TK_END: -+ case TK_UNTIL: case TK_EOS: -+ return 1; -+ default: return 0; -+ } -+} -+ -+ -+static void block (LexState *ls) { -+ /* block -> chunk */ -+ FuncState *fs = ls->fs; -+ BlockCnt bl; -+ enterblock(fs, &bl, 0); -+ chunk(ls); -+ lua_assert(bl.breaklist == NO_JUMP); -+ leaveblock(fs); -+} -+ -+ -+/* -+** structure to chain all variables in the left-hand side of an -+** assignment -+*/ -+struct LHS_assign { -+ struct LHS_assign *prev; -+ expdesc v; /* variable (global, local, upvalue, or indexed) */ -+}; -+ -+ -+/* -+** check whether, in an assignment to a local variable, the local variable -+** is needed in a previous assignment (to a table). If so, save original -+** local value in a safe place and use this safe copy in the previous -+** assignment. -+*/ -+static void check_conflict (LexState *ls, struct LHS_assign *lh, expdesc *v) { -+ FuncState *fs = ls->fs; -+ int extra = fs->freereg; /* eventual position to save local variable */ -+ int conflict = 0; -+ for (; lh; lh = lh->prev) { -+ if (lh->v.k == VINDEXED) { -+ if (lh->v.u.s.info == v->u.s.info) { /* conflict? */ -+ conflict = 1; -+ lh->v.u.s.info = extra; /* previous assignment will use safe copy */ -+ } -+ if (lh->v.u.s.aux == v->u.s.info) { /* conflict? */ -+ conflict = 1; -+ lh->v.u.s.aux = extra; /* previous assignment will use safe copy */ -+ } -+ } -+ } -+ if (conflict) { -+ luaK_codeABC(fs, OP_MOVE, fs->freereg, v->u.s.info, 0); /* make copy */ -+ luaK_reserveregs(fs, 1); -+ } -+} -+ -+ -+static void assignment (LexState *ls, struct LHS_assign *lh, int nvars) { -+ expdesc e; -+ check_condition(ls, VLOCAL <= lh->v.k && lh->v.k <= VINDEXED, -+ "syntax error"); -+ if (testnext(ls, ',')) { /* assignment -> `,' primaryexp assignment */ -+ struct LHS_assign nv; -+ nv.prev = lh; -+ primaryexp(ls, &nv.v); -+ if (nv.v.k == VLOCAL) -+ check_conflict(ls, lh, &nv.v); -+ luaY_checklimit(ls->fs, nvars, LUAI_MAXCCALLS - ls->L->nCcalls, -+ "variables in assignment"); -+ assignment(ls, &nv, nvars+1); -+ } -+ else { /* assignment -> `=' explist1 */ -+ int nexps; -+ checknext(ls, '='); -+ nexps = explist1(ls, &e); -+ if (nexps != nvars) { -+ adjust_assign(ls, nvars, nexps, &e); -+ if (nexps > nvars) -+ ls->fs->freereg -= nexps - nvars; /* remove extra values */ -+ } -+ else { -+ luaK_setoneret(ls->fs, &e); /* close last expression */ -+ luaK_storevar(ls->fs, &lh->v, &e); -+ return; /* avoid default */ -+ } -+ } -+ init_exp(&e, VNONRELOC, ls->fs->freereg-1); /* default assignment */ -+ luaK_storevar(ls->fs, &lh->v, &e); -+} -+ -+ -+static int cond (LexState *ls) { -+ /* cond -> exp */ -+ expdesc v; -+ expr(ls, &v); /* read condition */ -+ if (v.k == VNIL) v.k = VFALSE; /* `falses' are all equal here */ -+ luaK_goiftrue(ls->fs, &v); -+ return v.f; -+} -+ -+ -+static void breakstat (LexState *ls) { -+ FuncState *fs = ls->fs; -+ BlockCnt *bl = fs->bl; -+ int upval = 0; -+ while (bl && !bl->isbreakable) { -+ upval |= bl->upval; -+ bl = bl->previous; -+ } -+ if (!bl) -+ luaX_syntaxerror(ls, "no loop to break"); -+ if (upval) -+ luaK_codeABC(fs, OP_CLOSE, bl->nactvar, 0, 0); -+ luaK_concat(fs, &bl->breaklist, luaK_jump(fs)); -+} -+ -+ -+static void whilestat (LexState *ls, int line) { -+ /* whilestat -> WHILE cond DO block END */ -+ FuncState *fs = ls->fs; -+ int whileinit; -+ int condexit; -+ BlockCnt bl; -+ luaX_next(ls); /* skip WHILE */ -+ whileinit = luaK_getlabel(fs); -+ condexit = cond(ls); -+ enterblock(fs, &bl, 1); -+ checknext(ls, TK_DO); -+ block(ls); -+ luaK_patchlist(fs, luaK_jump(fs), whileinit); -+ check_match(ls, TK_END, TK_WHILE, line); -+ leaveblock(fs); -+ luaK_patchtohere(fs, condexit); /* false conditions finish the loop */ -+} -+ -+ -+static void repeatstat (LexState *ls, int line) { -+ /* repeatstat -> REPEAT block UNTIL cond */ -+ int condexit; -+ FuncState *fs = ls->fs; -+ int repeat_init = luaK_getlabel(fs); -+ BlockCnt bl1, bl2; -+ enterblock(fs, &bl1, 1); /* loop block */ -+ enterblock(fs, &bl2, 0); /* scope block */ -+ luaX_next(ls); /* skip REPEAT */ -+ chunk(ls); -+ check_match(ls, TK_UNTIL, TK_REPEAT, line); -+ condexit = cond(ls); /* read condition (inside scope block) */ -+ if (!bl2.upval) { /* no upvalues? */ -+ leaveblock(fs); /* finish scope */ -+ luaK_patchlist(ls->fs, condexit, repeat_init); /* close the loop */ -+ } -+ else { /* complete semantics when there are upvalues */ -+ breakstat(ls); /* if condition then break */ -+ luaK_patchtohere(ls->fs, condexit); /* else... */ -+ leaveblock(fs); /* finish scope... */ -+ luaK_patchlist(ls->fs, luaK_jump(fs), repeat_init); /* and repeat */ -+ } -+ leaveblock(fs); /* finish loop */ -+} -+ -+ -+static int exp1 (LexState *ls) { -+ expdesc e; -+ int k; -+ expr(ls, &e); -+ k = e.k; -+ luaK_exp2nextreg(ls->fs, &e); -+ return k; -+} -+ -+ -+static void forbody (LexState *ls, int base, int line, int nvars, int isnum) { -+ /* forbody -> DO block */ -+ BlockCnt bl; -+ FuncState *fs = ls->fs; -+ int prep, endfor; -+ adjustlocalvars(ls, 3); /* control variables */ -+ checknext(ls, TK_DO); -+ prep = isnum ? luaK_codeAsBx(fs, OP_FORPREP, base, NO_JUMP) : luaK_jump(fs); -+ enterblock(fs, &bl, 0); /* scope for declared variables */ -+ adjustlocalvars(ls, nvars); -+ luaK_reserveregs(fs, nvars); -+ block(ls); -+ leaveblock(fs); /* end of scope for declared variables */ -+ luaK_patchtohere(fs, prep); -+ endfor = (isnum) ? luaK_codeAsBx(fs, OP_FORLOOP, base, NO_JUMP) : -+ luaK_codeABC(fs, OP_TFORLOOP, base, 0, nvars); -+ luaK_fixline(fs, line); /* pretend that `OP_FOR' starts the loop */ -+ luaK_patchlist(fs, (isnum ? endfor : luaK_jump(fs)), prep + 1); -+} -+ -+ -+static void fornum (LexState *ls, TString *varname, int line) { -+ /* fornum -> NAME = exp1,exp1[,exp1] forbody */ -+ FuncState *fs = ls->fs; -+ int base = fs->freereg; -+ new_localvarliteral(ls, "(for index)", 0); -+ new_localvarliteral(ls, "(for limit)", 1); -+ new_localvarliteral(ls, "(for step)", 2); -+ new_localvar(ls, varname, 3); -+ checknext(ls, '='); -+ exp1(ls); /* initial value */ -+ checknext(ls, ','); -+ exp1(ls); /* limit */ -+ if (testnext(ls, ',')) -+ exp1(ls); /* optional step */ -+ else { /* default step = 1 */ -+ luaK_codeABx(fs, OP_LOADK, fs->freereg, luaK_numberK(fs, 1)); -+ luaK_reserveregs(fs, 1); -+ } -+ forbody(ls, base, line, 1, 1); -+} -+ -+ -+static void forlist (LexState *ls, TString *indexname) { -+ /* forlist -> NAME {,NAME} IN explist1 forbody */ -+ FuncState *fs = ls->fs; -+ expdesc e; -+ int nvars = 0; -+ int line; -+ int base = fs->freereg; -+ /* create control variables */ -+ new_localvarliteral(ls, "(for generator)", nvars++); -+ new_localvarliteral(ls, "(for state)", nvars++); -+ new_localvarliteral(ls, "(for control)", nvars++); -+ /* create declared variables */ -+ new_localvar(ls, indexname, nvars++); -+ while (testnext(ls, ',')) -+ new_localvar(ls, str_checkname(ls), nvars++); -+ checknext(ls, TK_IN); -+ line = ls->linenumber; -+ adjust_assign(ls, 3, explist1(ls, &e), &e); -+ luaK_checkstack(fs, 3); /* extra space to call generator */ -+ forbody(ls, base, line, nvars - 3, 0); -+} -+ -+ -+static void forstat (LexState *ls, int line) { -+ /* forstat -> FOR (fornum | forlist) END */ -+ FuncState *fs = ls->fs; -+ TString *varname; -+ BlockCnt bl; -+ enterblock(fs, &bl, 1); /* scope for loop and control variables */ -+ luaX_next(ls); /* skip `for' */ -+ varname = str_checkname(ls); /* first variable name */ -+ switch (ls->t.token) { -+ case '=': fornum(ls, varname, line); break; -+ case ',': case TK_IN: forlist(ls, varname); break; -+ default: luaX_syntaxerror(ls, LUA_QL("=") " or " LUA_QL("in") " expected"); -+ } -+ check_match(ls, TK_END, TK_FOR, line); -+ leaveblock(fs); /* loop scope (`break' jumps to this point) */ -+} -+ -+ -+static int test_then_block (LexState *ls) { -+ /* test_then_block -> [IF | ELSEIF] cond THEN block */ -+ int condexit; -+ luaX_next(ls); /* skip IF or ELSEIF */ -+ condexit = cond(ls); -+ checknext(ls, TK_THEN); -+ block(ls); /* `then' part */ -+ return condexit; -+} -+ -+ -+static void ifstat (LexState *ls, int line) { -+ /* ifstat -> IF cond THEN block {ELSEIF cond THEN block} [ELSE block] END */ -+ FuncState *fs = ls->fs; -+ int flist; -+ int escapelist = NO_JUMP; -+ flist = test_then_block(ls); /* IF cond THEN block */ -+ while (ls->t.token == TK_ELSEIF) { -+ luaK_concat(fs, &escapelist, luaK_jump(fs)); -+ luaK_patchtohere(fs, flist); -+ flist = test_then_block(ls); /* ELSEIF cond THEN block */ -+ } -+ if (ls->t.token == TK_ELSE) { -+ luaK_concat(fs, &escapelist, luaK_jump(fs)); -+ luaK_patchtohere(fs, flist); -+ luaX_next(ls); /* skip ELSE (after patch, for correct line info) */ -+ block(ls); /* `else' part */ -+ } -+ else -+ luaK_concat(fs, &escapelist, flist); -+ luaK_patchtohere(fs, escapelist); -+ check_match(ls, TK_END, TK_IF, line); -+} -+ -+ -+static void localfunc (LexState *ls) { -+ expdesc v, b; -+ FuncState *fs = ls->fs; -+ new_localvar(ls, str_checkname(ls), 0); -+ init_exp(&v, VLOCAL, fs->freereg); -+ luaK_reserveregs(fs, 1); -+ adjustlocalvars(ls, 1); -+ body(ls, &b, 0, ls->linenumber); -+ luaK_storevar(fs, &v, &b); -+ /* debug information will only see the variable after this point! */ -+ getlocvar(fs, fs->nactvar - 1).startpc = fs->pc; -+} -+ -+ -+static void localstat (LexState *ls) { -+ /* stat -> LOCAL NAME {`,' NAME} [`=' explist1] */ -+ int nvars = 0; -+ int nexps; -+ expdesc e; -+ do { -+ new_localvar(ls, str_checkname(ls), nvars++); -+ } while (testnext(ls, ',')); -+ if (testnext(ls, '=')) -+ nexps = explist1(ls, &e); -+ else { -+ e.k = VVOID; -+ nexps = 0; -+ } -+ adjust_assign(ls, nvars, nexps, &e); -+ adjustlocalvars(ls, nvars); -+} -+ -+ -+static int funcname (LexState *ls, expdesc *v) { -+ /* funcname -> NAME {field} [`:' NAME] */ -+ int needself = 0; -+ singlevar(ls, v); -+ while (ls->t.token == '.') -+ field(ls, v); -+ if (ls->t.token == ':') { -+ needself = 1; -+ field(ls, v); -+ } -+ return needself; -+} -+ -+ -+static void funcstat (LexState *ls, int line) { -+ /* funcstat -> FUNCTION funcname body */ -+ int needself; -+ expdesc v, b; -+ luaX_next(ls); /* skip FUNCTION */ -+ needself = funcname(ls, &v); -+ body(ls, &b, needself, line); -+ luaK_storevar(ls->fs, &v, &b); -+ luaK_fixline(ls->fs, line); /* definition `happens' in the first line */ -+} -+ -+ -+static void exprstat (LexState *ls) { -+ /* stat -> func | assignment */ -+ FuncState *fs = ls->fs; -+ struct LHS_assign v; -+ primaryexp(ls, &v.v); -+ if (v.v.k == VCALL) /* stat -> func */ -+ SETARG_C(getcode(fs, &v.v), 1); /* call statement uses no results */ -+ else { /* stat -> assignment */ -+ v.prev = NULL; -+ assignment(ls, &v, 1); -+ } -+} -+ -+ -+static void retstat (LexState *ls) { -+ /* stat -> RETURN explist */ -+ FuncState *fs = ls->fs; -+ expdesc e; -+ int first, nret; /* registers with returned values */ -+ luaX_next(ls); /* skip RETURN */ -+ if (block_follow(ls->t.token) || ls->t.token == ';') -+ first = nret = 0; /* return no values */ -+ else { -+ nret = explist1(ls, &e); /* optional return values */ -+ if (hasmultret(e.k)) { -+ luaK_setmultret(fs, &e); -+ if (e.k == VCALL && nret == 1) { /* tail call? */ -+ SET_OPCODE(getcode(fs,&e), OP_TAILCALL); -+ lua_assert(GETARG_A(getcode(fs,&e)) == fs->nactvar); -+ } -+ first = fs->nactvar; -+ nret = LUA_MULTRET; /* return all values */ -+ } -+ else { -+ if (nret == 1) /* only one single value? */ -+ first = luaK_exp2anyreg(fs, &e); -+ else { -+ luaK_exp2nextreg(fs, &e); /* values must go to the `stack' */ -+ first = fs->nactvar; /* return all `active' values */ -+ lua_assert(nret == fs->freereg - first); -+ } -+ } -+ } -+ luaK_ret(fs, first, nret); -+} -+ -+ -+static int statement (LexState *ls) { -+ int line = ls->linenumber; /* may be needed for error messages */ -+ switch (ls->t.token) { -+ case TK_IF: { /* stat -> ifstat */ -+ ifstat(ls, line); -+ return 0; -+ } -+ case TK_WHILE: { /* stat -> whilestat */ -+ whilestat(ls, line); -+ return 0; -+ } -+ case TK_DO: { /* stat -> DO block END */ -+ luaX_next(ls); /* skip DO */ -+ block(ls); -+ check_match(ls, TK_END, TK_DO, line); -+ return 0; -+ } -+ case TK_FOR: { /* stat -> forstat */ -+ forstat(ls, line); -+ return 0; -+ } -+ case TK_REPEAT: { /* stat -> repeatstat */ -+ repeatstat(ls, line); -+ return 0; -+ } -+ case TK_FUNCTION: { -+ funcstat(ls, line); /* stat -> funcstat */ -+ return 0; -+ } -+ case TK_LOCAL: { /* stat -> localstat */ -+ luaX_next(ls); /* skip LOCAL */ -+ if (testnext(ls, TK_FUNCTION)) /* local function? */ -+ localfunc(ls); -+ else -+ localstat(ls); -+ return 0; -+ } -+ case TK_RETURN: { /* stat -> retstat */ -+ retstat(ls); -+ return 1; /* must be last statement */ -+ } -+ case TK_BREAK: { /* stat -> breakstat */ -+ luaX_next(ls); /* skip BREAK */ -+ breakstat(ls); -+ return 1; /* must be last statement */ -+ } -+ default: { -+ exprstat(ls); -+ return 0; /* to avoid warnings */ -+ } -+ } -+} -+ -+ -+static void chunk (LexState *ls) { -+ /* chunk -> { stat [`;'] } */ -+ int islast = 0; -+ enterlevel(ls); -+ while (!islast && !block_follow(ls->t.token)) { -+ islast = statement(ls); -+ testnext(ls, ';'); -+ lua_assert(ls->fs->f->maxstacksize >= ls->fs->freereg && -+ ls->fs->freereg >= ls->fs->nactvar); -+ ls->fs->freereg = ls->fs->nactvar; /* free registers */ -+ } -+ leavelevel(ls); -+} -+ -+/* }====================================================================== */ ---- /dev/null -+++ b/extensions/LUA/lua/lparser.h -@@ -0,0 +1,82 @@ -+/* -+** $Id: lparser.h,v 1.57.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Lua Parser -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lparser_h -+#define lparser_h -+ -+#include "llimits.h" -+#include "lobject.h" -+#include "lzio.h" -+ -+ -+/* -+** Expression descriptor -+*/ -+ -+typedef enum { -+ VVOID, /* no value */ -+ VNIL, -+ VTRUE, -+ VFALSE, -+ VK, /* info = index of constant in `k' */ -+ VKNUM, /* nval = numerical value */ -+ VLOCAL, /* info = local register */ -+ VUPVAL, /* info = index of upvalue in `upvalues' */ -+ VGLOBAL, /* info = index of table; aux = index of global name in `k' */ -+ VINDEXED, /* info = table register; aux = index register (or `k') */ -+ VJMP, /* info = instruction pc */ -+ VRELOCABLE, /* info = instruction pc */ -+ VNONRELOC, /* info = result register */ -+ VCALL, /* info = instruction pc */ -+ VVARARG /* info = instruction pc */ -+} expkind; -+ -+typedef struct expdesc { -+ expkind k; -+ union { -+ struct { int info, aux; } s; -+ lua_Number nval; -+ } u; -+ int t; /* patch list of `exit when true' */ -+ int f; /* patch list of `exit when false' */ -+} expdesc; -+ -+ -+typedef struct upvaldesc { -+ lu_byte k; -+ lu_byte info; -+} upvaldesc; -+ -+ -+struct BlockCnt; /* defined in lparser.c */ -+ -+ -+/* state needed to generate code for a given function */ -+typedef struct FuncState { -+ Proto *f; /* current function header */ -+ Table *h; /* table to find (and reuse) elements in `k' */ -+ struct FuncState *prev; /* enclosing function */ -+ struct LexState *ls; /* lexical state */ -+ struct lua_State *L; /* copy of the Lua state */ -+ struct BlockCnt *bl; /* chain of current blocks */ -+ int pc; /* next position to code (equivalent to `ncode') */ -+ int lasttarget; /* `pc' of last `jump target' */ -+ int jpc; /* list of pending jumps to `pc' */ -+ int freereg; /* first free register */ -+ int nk; /* number of elements in `k' */ -+ int np; /* number of elements in `p' */ -+ short nlocvars; /* number of elements in `locvars' */ -+ lu_byte nactvar; /* number of active local variables */ -+ upvaldesc upvalues[LUAI_MAXUPVALUES]; /* upvalues */ -+ unsigned short actvar[LUAI_MAXVARS]; /* declared-variable stack */ -+} FuncState; -+ -+ -+LUAI_FUNC Proto *luaY_parser (lua_State *L, ZIO *z, Mbuffer *buff, -+ const char *name); -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lstate.c -@@ -0,0 +1,214 @@ -+/* -+** $Id: lstate.c,v 2.36.1.2 2008/01/03 15:20:39 roberto Exp $ -+** Global State -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+ -+#define lstate_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "lgc.h" -+#include "llex.h" -+#include "lmem.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "ltm.h" -+ -+ -+#define state_size(x) (sizeof(x) + LUAI_EXTRASPACE) -+#define fromstate(l) (cast(lu_byte *, (l)) - LUAI_EXTRASPACE) -+#define tostate(l) (cast(lua_State *, cast(lu_byte *, l) + LUAI_EXTRASPACE)) -+ -+ -+/* -+** Main thread combines a thread state and the global state -+*/ -+typedef struct LG { -+ lua_State l; -+ global_State g; -+} LG; -+ -+ -+ -+static void stack_init (lua_State *L1, lua_State *L) { -+ /* initialize CallInfo array */ -+ L1->base_ci = luaM_newvector(L, BASIC_CI_SIZE, CallInfo); -+ L1->ci = L1->base_ci; -+ L1->size_ci = BASIC_CI_SIZE; -+ L1->end_ci = L1->base_ci + L1->size_ci - 1; -+ /* initialize stack array */ -+ L1->stack = luaM_newvector(L, BASIC_STACK_SIZE + EXTRA_STACK, TValue); -+ L1->stacksize = BASIC_STACK_SIZE + EXTRA_STACK; -+ L1->top = L1->stack; -+ L1->stack_last = L1->stack+(L1->stacksize - EXTRA_STACK)-1; -+ /* initialize first ci */ -+ L1->ci->func = L1->top; -+ setnilvalue(L1->top++); /* `function' entry for this `ci' */ -+ L1->base = L1->ci->base = L1->top; -+ L1->ci->top = L1->top + LUA_MINSTACK; -+} -+ -+ -+static void freestack (lua_State *L, lua_State *L1) { -+ luaM_freearray(L, L1->base_ci, L1->size_ci, CallInfo); -+ luaM_freearray(L, L1->stack, L1->stacksize, TValue); -+} -+ -+ -+/* -+** open parts that may cause memory-allocation errors -+*/ -+static void f_luaopen (lua_State *L, void *ud) { -+ global_State *g = G(L); -+ UNUSED(ud); -+ stack_init(L, L); /* init stack */ -+ sethvalue(L, gt(L), luaH_new(L, 0, 2)); /* table of globals */ -+ sethvalue(L, registry(L), luaH_new(L, 0, 2)); /* registry */ -+ luaS_resize(L, MINSTRTABSIZE); /* initial size of string table */ -+ luaT_init(L); -+ luaX_init(L); -+ luaS_fix(luaS_newliteral(L, MEMERRMSG)); -+ g->GCthreshold = 4*g->totalbytes; -+} -+ -+ -+static void preinit_state (lua_State *L, global_State *g) { -+ G(L) = g; -+ L->stack = NULL; -+ L->stacksize = 0; -+ L->errorJmp = NULL; -+ L->hook = NULL; -+ L->hookmask = 0; -+ L->basehookcount = 0; -+ L->allowhook = 1; -+ resethookcount(L); -+ L->openupval = NULL; -+ L->size_ci = 0; -+ L->nCcalls = L->baseCcalls = 0; -+ L->status = 0; -+ L->base_ci = L->ci = NULL; -+ L->savedpc = NULL; -+ L->errfunc = 0; -+ setnilvalue(gt(L)); -+} -+ -+ -+static void close_state (lua_State *L) { -+ global_State *g = G(L); -+ luaF_close(L, L->stack); /* close all upvalues for this thread */ -+ luaC_freeall(L); /* collect all objects */ -+ lua_assert(g->rootgc == obj2gco(L)); -+ lua_assert(g->strt.nuse == 0); -+ luaM_freearray(L, G(L)->strt.hash, G(L)->strt.size, TString *); -+ luaZ_freebuffer(L, &g->buff); -+ freestack(L, L); -+ lua_assert(g->totalbytes == sizeof(LG)); -+ (*g->frealloc)(g->ud, fromstate(L), state_size(LG), 0); -+} -+ -+ -+lua_State *luaE_newthread (lua_State *L) { -+ lua_State *L1 = tostate(luaM_malloc(L, state_size(lua_State))); -+ luaC_link(L, obj2gco(L1), LUA_TTHREAD); -+ preinit_state(L1, G(L)); -+ stack_init(L1, L); /* init stack */ -+ setobj2n(L, gt(L1), gt(L)); /* share table of globals */ -+ L1->hookmask = L->hookmask; -+ L1->basehookcount = L->basehookcount; -+ L1->hook = L->hook; -+ resethookcount(L1); -+ lua_assert(iswhite(obj2gco(L1))); -+ return L1; -+} -+ -+ -+void luaE_freethread (lua_State *L, lua_State *L1) { -+ luaF_close(L1, L1->stack); /* close all upvalues for this thread */ -+ lua_assert(L1->openupval == NULL); -+ luai_userstatefree(L1); -+ freestack(L, L1); -+ luaM_freemem(L, fromstate(L1), state_size(lua_State)); -+} -+ -+ -+LUA_API lua_State *lua_newstate (lua_Alloc f, void *ud) { -+ int i; -+ lua_State *L; -+ global_State *g; -+ void *l = (*f)(ud, NULL, 0, state_size(LG)); -+ if (l == NULL) return NULL; -+ L = tostate(l); -+ g = &((LG *)L)->g; -+ L->next = NULL; -+ L->tt = LUA_TTHREAD; -+ g->currentwhite = bit2mask(WHITE0BIT, FIXEDBIT); -+ L->marked = luaC_white(g); -+ set2bits(L->marked, FIXEDBIT, SFIXEDBIT); -+ preinit_state(L, g); -+ g->frealloc = f; -+ g->ud = ud; -+ g->mainthread = L; -+ g->uvhead.u.l.prev = &g->uvhead; -+ g->uvhead.u.l.next = &g->uvhead; -+ g->GCthreshold = 0; /* mark it as unfinished state */ -+ g->strt.size = 0; -+ g->strt.nuse = 0; -+ g->strt.hash = NULL; -+ setnilvalue(registry(L)); -+ luaZ_initbuffer(L, &g->buff); -+ g->panic = NULL; -+ g->gcstate = GCSpause; -+ g->rootgc = obj2gco(L); -+ g->sweepstrgc = 0; -+ g->sweepgc = &g->rootgc; -+ g->gray = NULL; -+ g->grayagain = NULL; -+ g->weak = NULL; -+ g->tmudata = NULL; -+ g->totalbytes = sizeof(LG); -+ g->gcpause = LUAI_GCPAUSE; -+ g->gcstepmul = LUAI_GCMUL; -+ g->gcdept = 0; -+ for (i=0; imt[i] = NULL; -+ if (luaD_rawrunprotected(L, f_luaopen, NULL) != 0) { -+ /* memory allocation error: free partial state */ -+ close_state(L); -+ L = NULL; -+ } -+ else -+ luai_userstateopen(L); -+ return L; -+} -+ -+ -+static void callallgcTM (lua_State *L, void *ud) { -+ UNUSED(ud); -+ luaC_callGCTM(L); /* call GC metamethods for all udata */ -+} -+ -+ -+LUA_API void lua_close (lua_State *L) { -+ L = G(L)->mainthread; /* only the main thread can be closed */ -+ lua_lock(L); -+ luaF_close(L, L->stack); /* close all upvalues for this thread */ -+ luaC_separateudata(L, 1); /* separate udata that have GC metamethods */ -+ L->errfunc = 0; /* no error function during GC metamethods */ -+ do { /* repeat until no more errors */ -+ L->ci = L->base_ci; -+ L->base = L->top = L->ci->base; -+ L->nCcalls = L->baseCcalls = 0; -+ } while (luaD_rawrunprotected(L, callallgcTM, NULL) != 0); -+ lua_assert(G(L)->tmudata == NULL); -+ luai_userstateclose(L); -+ close_state(L); -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lstate.h -@@ -0,0 +1,169 @@ -+/* -+** $Id: lstate.h,v 2.24.1.2 2008/01/03 15:20:39 roberto Exp $ -+** Global State -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lstate_h -+#define lstate_h -+ -+#include "lua.h" -+ -+#include "lobject.h" -+#include "ltm.h" -+#include "lzio.h" -+ -+ -+ -+struct lua_longjmp; /* defined in ldo.c */ -+ -+ -+/* table of globals */ -+#define gt(L) (&L->l_gt) -+ -+/* registry */ -+#define registry(L) (&G(L)->l_registry) -+ -+ -+/* extra stack space to handle TM calls and some other extras */ -+#define EXTRA_STACK 5 -+ -+ -+#define BASIC_CI_SIZE 8 -+ -+#define BASIC_STACK_SIZE (2*LUA_MINSTACK) -+ -+ -+ -+typedef struct stringtable { -+ GCObject **hash; -+ lu_int32 nuse; /* number of elements */ -+ int size; -+} stringtable; -+ -+ -+/* -+** informations about a call -+*/ -+typedef struct CallInfo { -+ StkId base; /* base for this function */ -+ StkId func; /* function index in the stack */ -+ StkId top; /* top for this function */ -+ const Instruction *savedpc; -+ int nresults; /* expected number of results from this function */ -+ int tailcalls; /* number of tail calls lost under this entry */ -+} CallInfo; -+ -+ -+ -+#define curr_func(L) (clvalue(L->ci->func)) -+#define ci_func(ci) (clvalue((ci)->func)) -+#define f_isLua(ci) (!ci_func(ci)->c.isC) -+#define isLua(ci) (ttisfunction((ci)->func) && f_isLua(ci)) -+ -+ -+/* -+** `global state', shared by all threads of this state -+*/ -+typedef struct global_State { -+ stringtable strt; /* hash table for strings */ -+ lua_Alloc frealloc; /* function to reallocate memory */ -+ void *ud; /* auxiliary data to `frealloc' */ -+ lu_byte currentwhite; -+ lu_byte gcstate; /* state of garbage collector */ -+ int sweepstrgc; /* position of sweep in `strt' */ -+ GCObject *rootgc; /* list of all collectable objects */ -+ GCObject **sweepgc; /* position of sweep in `rootgc' */ -+ GCObject *gray; /* list of gray objects */ -+ GCObject *grayagain; /* list of objects to be traversed atomically */ -+ GCObject *weak; /* list of weak tables (to be cleared) */ -+ GCObject *tmudata; /* last element of list of userdata to be GC */ -+ Mbuffer buff; /* temporary buffer for string concatentation */ -+ lu_mem GCthreshold; -+ lu_mem totalbytes; /* number of bytes currently allocated */ -+ lu_mem estimate; /* an estimate of number of bytes actually in use */ -+ lu_mem gcdept; /* how much GC is `behind schedule' */ -+ int gcpause; /* size of pause between successive GCs */ -+ int gcstepmul; /* GC `granularity' */ -+ lua_CFunction panic; /* to be called in unprotected errors */ -+ TValue l_registry; -+ struct lua_State *mainthread; -+ UpVal uvhead; /* head of double-linked list of all open upvalues */ -+ struct Table *mt[NUM_TAGS]; /* metatables for basic types */ -+ TString *tmname[TM_N]; /* array with tag-method names */ -+} global_State; -+ -+ -+/* -+** `per thread' state -+*/ -+struct lua_State { -+ CommonHeader; -+ lu_byte status; -+ StkId top; /* first free slot in the stack */ -+ StkId base; /* base of current function */ -+ global_State *l_G; -+ CallInfo *ci; /* call info for current function */ -+ const Instruction *savedpc; /* `savedpc' of current function */ -+ StkId stack_last; /* last free slot in the stack */ -+ StkId stack; /* stack base */ -+ CallInfo *end_ci; /* points after end of ci array*/ -+ CallInfo *base_ci; /* array of CallInfo's */ -+ int stacksize; -+ int size_ci; /* size of array `base_ci' */ -+ unsigned short nCcalls; /* number of nested C calls */ -+ unsigned short baseCcalls; /* nested C calls when resuming coroutine */ -+ lu_byte hookmask; -+ lu_byte allowhook; -+ int basehookcount; -+ int hookcount; -+ lua_Hook hook; -+ TValue l_gt; /* table of globals */ -+ TValue env; /* temporary place for environments */ -+ GCObject *openupval; /* list of open upvalues in this stack */ -+ GCObject *gclist; -+ struct lua_longjmp *errorJmp; /* current error recover point */ -+ ptrdiff_t errfunc; /* current error handling function (stack index) */ -+}; -+ -+ -+#define G(L) (L->l_G) -+ -+ -+/* -+** Union of all collectable objects -+*/ -+union GCObject { -+ GCheader gch; -+ union TString ts; -+ union Udata u; -+ union Closure cl; -+ struct Table h; -+ struct Proto p; -+ struct UpVal uv; -+ struct lua_State th; /* thread */ -+}; -+ -+ -+/* macros to convert a GCObject into a specific value */ -+#define rawgco2ts(o) check_exp((o)->gch.tt == LUA_TSTRING, &((o)->ts)) -+#define gco2ts(o) (&rawgco2ts(o)->tsv) -+#define rawgco2u(o) check_exp((o)->gch.tt == LUA_TUSERDATA, &((o)->u)) -+#define gco2u(o) (&rawgco2u(o)->uv) -+#define gco2cl(o) check_exp((o)->gch.tt == LUA_TFUNCTION, &((o)->cl)) -+#define gco2h(o) check_exp((o)->gch.tt == LUA_TTABLE, &((o)->h)) -+#define gco2p(o) check_exp((o)->gch.tt == LUA_TPROTO, &((o)->p)) -+#define gco2uv(o) check_exp((o)->gch.tt == LUA_TUPVAL, &((o)->uv)) -+#define ngcotouv(o) \ -+ check_exp((o) == NULL || (o)->gch.tt == LUA_TUPVAL, &((o)->uv)) -+#define gco2th(o) check_exp((o)->gch.tt == LUA_TTHREAD, &((o)->th)) -+ -+/* macro to convert any Lua object into a GCObject */ -+#define obj2gco(v) (cast(GCObject *, (v))) -+ -+ -+LUAI_FUNC lua_State *luaE_newthread (lua_State *L); -+LUAI_FUNC void luaE_freethread (lua_State *L, lua_State *L1); -+ -+#endif -+ ---- /dev/null -+++ b/extensions/LUA/lua/lstring.c -@@ -0,0 +1,110 @@ -+/* -+** $Id: lstring.c,v 2.8.1.1 2007/12/27 13:02:25 roberto Exp $ -+** String table (keeps all strings handled by Lua) -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#define lstring_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lmem.h" -+#include "lobject.h" -+#include "lstate.h" -+#include "lstring.h" -+ -+ -+ -+void luaS_resize (lua_State *L, int newsize) { -+ GCObject **newhash; -+ stringtable *tb; -+ int i; -+ if (G(L)->gcstate == GCSsweepstring) -+ return; /* cannot resize during GC traverse */ -+ newhash = luaM_newvector(L, newsize, GCObject *); -+ tb = &G(L)->strt; -+ for (i=0; isize; i++) { -+ GCObject *p = tb->hash[i]; -+ while (p) { /* for each node in the list */ -+ GCObject *next = p->gch.next; /* save next */ -+ unsigned int h = gco2ts(p)->hash; -+ int h1 = lmod(h, newsize); /* new position */ -+ lua_assert(cast_int(h%newsize) == lmod(h, newsize)); -+ p->gch.next = newhash[h1]; /* chain it */ -+ newhash[h1] = p; -+ p = next; -+ } -+ } -+ luaM_freearray(L, tb->hash, tb->size, TString *); -+ tb->size = newsize; -+ tb->hash = newhash; -+} -+ -+ -+static TString *newlstr (lua_State *L, const char *str, size_t l, -+ unsigned int h) { -+ TString *ts; -+ stringtable *tb; -+ if (l+1 > (MAX_SIZET - sizeof(TString))/sizeof(char)) -+ luaM_toobig(L); -+ ts = cast(TString *, luaM_malloc(L, (l+1)*sizeof(char)+sizeof(TString))); -+ ts->tsv.len = l; -+ ts->tsv.hash = h; -+ ts->tsv.marked = luaC_white(G(L)); -+ ts->tsv.tt = LUA_TSTRING; -+ ts->tsv.reserved = 0; -+ memcpy(ts+1, str, l*sizeof(char)); -+ ((char *)(ts+1))[l] = '\0'; /* ending 0 */ -+ tb = &G(L)->strt; -+ h = lmod(h, tb->size); -+ ts->tsv.next = tb->hash[h]; /* chain new entry */ -+ tb->hash[h] = obj2gco(ts); -+ tb->nuse++; -+ if (tb->nuse > cast(lu_int32, tb->size) && tb->size <= MAX_INT/2) -+ luaS_resize(L, tb->size*2); /* too crowded */ -+ return ts; -+} -+ -+ -+TString *luaS_newlstr (lua_State *L, const char *str, size_t l) { -+ GCObject *o; -+ unsigned int h = cast(unsigned int, l); /* seed */ -+ size_t step = (l>>5)+1; /* if string is too long, don't hash all its chars */ -+ size_t l1; -+ for (l1=l; l1>=step; l1-=step) /* compute hash */ -+ h = h ^ ((h<<5)+(h>>2)+cast(unsigned char, str[l1-1])); -+ for (o = G(L)->strt.hash[lmod(h, G(L)->strt.size)]; -+ o != NULL; -+ o = o->gch.next) { -+ TString *ts = rawgco2ts(o); -+ if (ts->tsv.len == l && (memcmp(str, getstr(ts), l) == 0)) { -+ /* string may be dead */ -+ if (isdead(G(L), o)) changewhite(o); -+ return ts; -+ } -+ } -+ return newlstr(L, str, l, h); /* not found */ -+} -+ -+ -+Udata *luaS_newudata (lua_State *L, size_t s, Table *e) { -+ Udata *u; -+ if (s > MAX_SIZET - sizeof(Udata)) -+ luaM_toobig(L); -+ u = cast(Udata *, luaM_malloc(L, s + sizeof(Udata))); -+ u->uv.marked = luaC_white(G(L)); /* is not finalized */ -+ u->uv.tt = LUA_TUSERDATA; -+ u->uv.len = s; -+ u->uv.metatable = NULL; -+ u->uv.env = e; -+ /* chain it on udata list (after main thread) */ -+ u->uv.next = G(L)->mainthread->next; -+ G(L)->mainthread->next = obj2gco(u); -+ return u; -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lstring.h -@@ -0,0 +1,31 @@ -+/* -+** $Id: lstring.h,v 1.43.1.1 2007/12/27 13:02:25 roberto Exp $ -+** String table (keep all strings handled by Lua) -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lstring_h -+#define lstring_h -+ -+ -+#include "lgc.h" -+#include "lobject.h" -+#include "lstate.h" -+ -+ -+#define sizestring(s) (sizeof(union TString)+((s)->len+1)*sizeof(char)) -+ -+#define sizeudata(u) (sizeof(union Udata)+(u)->len) -+ -+#define luaS_new(L, s) (luaS_newlstr(L, s, strlen(s))) -+#define luaS_newliteral(L, s) (luaS_newlstr(L, "" s, \ -+ (sizeof(s)/sizeof(char))-1)) -+ -+#define luaS_fix(s) l_setbit((s)->tsv.marked, FIXEDBIT) -+ -+LUAI_FUNC void luaS_resize (lua_State *L, int newsize); -+LUAI_FUNC Udata *luaS_newudata (lua_State *L, size_t s, Table *e); -+LUAI_FUNC TString *luaS_newlstr (lua_State *L, const char *str, size_t l); -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lstrlib.c -@@ -0,0 +1,883 @@ -+/* -+** $Id: lstrlib.c,v 1.132.1.4 2008/07/11 17:27:21 roberto Exp $ -+** Standard library for string operations and pattern-matching -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#define lstrlib_c -+#define LUA_LIB -+ -+#include "lua.h" -+ -+#include "lauxlib.h" -+#include "lualib.h" -+ -+ -+/* macro to `unsign' a character */ -+#define uchar(c) ((unsigned char)(c)) -+ -+ -+ -+static int str_len (lua_State *L) { -+ size_t l; -+ luaL_checklstring(L, 1, &l); -+ lua_pushinteger(L, l); -+ return 1; -+} -+ -+ -+static ptrdiff_t posrelat (ptrdiff_t pos, size_t len) { -+ /* relative string position: negative means back from end */ -+ if (pos < 0) pos += (ptrdiff_t)len + 1; -+ return (pos >= 0) ? pos : 0; -+} -+ -+ -+static int str_sub (lua_State *L) { -+ size_t l; -+ const char *s = luaL_checklstring(L, 1, &l); -+ ptrdiff_t start = posrelat(luaL_checkinteger(L, 2), l); -+ ptrdiff_t end = posrelat(luaL_optinteger(L, 3, -1), l); -+ if (start < 1) start = 1; -+ if (end > (ptrdiff_t)l) end = (ptrdiff_t)l; -+ if (start <= end) -+ lua_pushlstring(L, s+start-1, end-start+1); -+ else lua_pushliteral(L, ""); -+ return 1; -+} -+ -+ -+static int str_reverse (lua_State *L) { -+ size_t l; -+ const char *s = luaL_checklstring(L, 1, &l); -+ luaL_Buffer *b = (luaL_Buffer *)kmalloc(sizeof(luaL_Buffer) + BUFSIZ, GFP_ATOMIC); -+ if(!b) luaL_error(L, "str_reverse: cannot allocate memory"); -+ luaL_buffinit(L, b); -+ while (l--) luaL_addchar(b, s[l]); -+ luaL_pushresult(b); -+ kfree(b); -+ return 1; -+} -+ -+ -+static int str_lower (lua_State *L) { -+ size_t l; -+ size_t i; -+ const char *s = luaL_checklstring(L, 1, &l); -+ luaL_Buffer *b = (luaL_Buffer *)kmalloc(sizeof(luaL_Buffer) + BUFSIZ, GFP_ATOMIC); -+ if(!b) luaL_error(L, "str_lower: cannot allocate memory"); -+ luaL_buffinit(L, b); -+ for (i=0; i 0) -+ luaL_addlstring(b, s, l); -+ luaL_pushresult(b); -+ kfree(b); -+ return 1; -+} -+ -+ -+static int str_byte (lua_State *L) { -+ size_t l; -+ const char *s = luaL_checklstring(L, 1, &l); -+ ptrdiff_t posi = posrelat(luaL_optinteger(L, 2, 1), l); -+ ptrdiff_t pose = posrelat(luaL_optinteger(L, 3, posi), l); -+ int n, i; -+ if (posi <= 0) posi = 1; -+ if ((size_t)pose > l) pose = l; -+ if (posi > pose) return 0; /* empty interval; return no values */ -+ n = (int)(pose - posi + 1); -+ if (posi + n <= pose) /* overflow? */ -+ luaL_error(L, "string slice too long"); -+ luaL_checkstack(L, n, "string slice too long"); -+ for (i=0; i= ms->level || ms->capture[l].len == CAP_UNFINISHED) -+ return luaL_error(ms->L, "invalid capture index"); -+ return l; -+} -+ -+ -+static int capture_to_close (MatchState *ms) { -+ int level = ms->level; -+ for (level--; level>=0; level--) -+ if (ms->capture[level].len == CAP_UNFINISHED) return level; -+ return luaL_error(ms->L, "invalid pattern capture"); -+} -+ -+ -+static const char *classend (MatchState *ms, const char *p) { -+ switch (*p++) { -+ case L_ESC: { -+ if (*p == '\0') -+ luaL_error(ms->L, "malformed pattern (ends with " LUA_QL("%%") ")"); -+ return p+1; -+ } -+ case '[': { -+ if (*p == '^') p++; -+ do { /* look for a `]' */ -+ if (*p == '\0') -+ luaL_error(ms->L, "malformed pattern (missing " LUA_QL("]") ")"); -+ if (*(p++) == L_ESC && *p != '\0') -+ p++; /* skip escapes (e.g. `%]') */ -+ } while (*p != ']'); -+ return p+1; -+ } -+ default: { -+ return p; -+ } -+ } -+} -+ -+ -+static int match_class (int c, int cl) { -+ int res; -+ switch (tolower(cl)) { -+ case 'a' : res = isalpha(c); break; -+ case 'c' : res = iscntrl(c); break; -+ case 'd' : res = isdigit(c); break; -+ case 'l' : res = islower(c); break; -+ case 'p' : res = ispunct(c); break; -+ case 's' : res = isspace(c); break; -+ case 'u' : res = isupper(c); break; -+ case 'w' : res = isalnum(c); break; -+ case 'x' : res = isxdigit(c); break; -+ case 'z' : res = (c == 0); break; -+ default: return (cl == c); -+ } -+ return (islower(cl) ? res : !res); -+} -+ -+ -+static int matchbracketclass (int c, const char *p, const char *ec) { -+ int sig = 1; -+ if (*(p+1) == '^') { -+ sig = 0; -+ p++; /* skip the `^' */ -+ } -+ while (++p < ec) { -+ if (*p == L_ESC) { -+ p++; -+ if (match_class(c, uchar(*p))) -+ return sig; -+ } -+ else if ((*(p+1) == '-') && (p+2 < ec)) { -+ p+=2; -+ if (uchar(*(p-2)) <= c && c <= uchar(*p)) -+ return sig; -+ } -+ else if (uchar(*p) == c) return sig; -+ } -+ return !sig; -+} -+ -+ -+static int singlematch (int c, const char *p, const char *ep) { -+ switch (*p) { -+ case '.': return 1; /* matches any char */ -+ case L_ESC: return match_class(c, uchar(*(p+1))); -+ case '[': return matchbracketclass(c, p, ep-1); -+ default: return (uchar(*p) == c); -+ } -+} -+ -+ -+static const char *match (MatchState *ms, const char *s, const char *p); -+ -+ -+static const char *matchbalance (MatchState *ms, const char *s, -+ const char *p) { -+ if (*p == 0 || *(p+1) == 0) -+ luaL_error(ms->L, "unbalanced pattern"); -+ if (*s != *p) return NULL; -+ else { -+ int b = *p; -+ int e = *(p+1); -+ int cont = 1; -+ while (++s < ms->src_end) { -+ if (*s == e) { -+ if (--cont == 0) return s+1; -+ } -+ else if (*s == b) cont++; -+ } -+ } -+ return NULL; /* string ends out of balance */ -+} -+ -+ -+static const char *max_expand (MatchState *ms, const char *s, -+ const char *p, const char *ep) { -+ ptrdiff_t i = 0; /* counts maximum expand for item */ -+ while ((s+i)src_end && singlematch(uchar(*(s+i)), p, ep)) -+ i++; -+ /* keeps trying to match with the maximum repetitions */ -+ while (i>=0) { -+ const char *res = match(ms, (s+i), ep+1); -+ if (res) return res; -+ i--; /* else didn't match; reduce 1 repetition to try again */ -+ } -+ return NULL; -+} -+ -+ -+static const char *min_expand (MatchState *ms, const char *s, -+ const char *p, const char *ep) { -+ for (;;) { -+ const char *res = match(ms, s, ep+1); -+ if (res != NULL) -+ return res; -+ else if (ssrc_end && singlematch(uchar(*s), p, ep)) -+ s++; /* try with one more repetition */ -+ else return NULL; -+ } -+} -+ -+ -+static const char *start_capture (MatchState *ms, const char *s, -+ const char *p, int what) { -+ const char *res; -+ int level = ms->level; -+ if (level >= LUA_MAXCAPTURES) luaL_error(ms->L, "too many captures"); -+ ms->capture[level].init = s; -+ ms->capture[level].len = what; -+ ms->level = level+1; -+ if ((res=match(ms, s, p)) == NULL) /* match failed? */ -+ ms->level--; /* undo capture */ -+ return res; -+} -+ -+ -+static const char *end_capture (MatchState *ms, const char *s, -+ const char *p) { -+ int l = capture_to_close(ms); -+ const char *res; -+ ms->capture[l].len = s - ms->capture[l].init; /* close capture */ -+ if ((res = match(ms, s, p)) == NULL) /* match failed? */ -+ ms->capture[l].len = CAP_UNFINISHED; /* undo capture */ -+ return res; -+} -+ -+ -+static const char *match_capture (MatchState *ms, const char *s, int l) { -+ size_t len; -+ l = check_capture(ms, l); -+ len = ms->capture[l].len; -+ if ((size_t)(ms->src_end-s) >= len && -+ memcmp(ms->capture[l].init, s, len) == 0) -+ return s+len; -+ else return NULL; -+} -+ -+ -+static const char *match (MatchState *ms, const char *s, const char *p) { -+ init: /* using goto's to optimize tail recursion */ -+ switch (*p) { -+ case '(': { /* start capture */ -+ if (*(p+1) == ')') /* position capture? */ -+ return start_capture(ms, s, p+2, CAP_POSITION); -+ else -+ return start_capture(ms, s, p+1, CAP_UNFINISHED); -+ } -+ case ')': { /* end capture */ -+ return end_capture(ms, s, p+1); -+ } -+ case L_ESC: { -+ switch (*(p+1)) { -+ case 'b': { /* balanced string? */ -+ s = matchbalance(ms, s, p+2); -+ if (s == NULL) return NULL; -+ p+=4; goto init; /* else return match(ms, s, p+4); */ -+ } -+ case 'f': { /* frontier? */ -+ const char *ep; char previous; -+ p += 2; -+ if (*p != '[') -+ luaL_error(ms->L, "missing " LUA_QL("[") " after " -+ LUA_QL("%%f") " in pattern"); -+ ep = classend(ms, p); /* points to what is next */ -+ previous = (s == ms->src_init) ? '\0' : *(s-1); -+ if (matchbracketclass(uchar(previous), p, ep-1) || -+ !matchbracketclass(uchar(*s), p, ep-1)) return NULL; -+ p=ep; goto init; /* else return match(ms, s, ep); */ -+ } -+ default: { -+ if (isdigit(uchar(*(p+1)))) { /* capture results (%0-%9)? */ -+ s = match_capture(ms, s, uchar(*(p+1))); -+ if (s == NULL) return NULL; -+ p+=2; goto init; /* else return match(ms, s, p+2) */ -+ } -+ goto dflt; /* case default */ -+ } -+ } -+ } -+ case '\0': { /* end of pattern */ -+ return s; /* match succeeded */ -+ } -+ case '$': { -+ if (*(p+1) == '\0') /* is the `$' the last char in pattern? */ -+ return (s == ms->src_end) ? s : NULL; /* check end of string */ -+ else goto dflt; -+ } -+ default: dflt: { /* it is a pattern item */ -+ const char *ep = classend(ms, p); /* points to what is next */ -+ int m = ssrc_end && singlematch(uchar(*s), p, ep); -+ switch (*ep) { -+ case '?': { /* optional */ -+ const char *res; -+ if (m && ((res=match(ms, s+1, ep+1)) != NULL)) -+ return res; -+ p=ep+1; goto init; /* else return match(ms, s, ep+1); */ -+ } -+ case '*': { /* 0 or more repetitions */ -+ return max_expand(ms, s, p, ep); -+ } -+ case '+': { /* 1 or more repetitions */ -+ return (m ? max_expand(ms, s+1, p, ep) : NULL); -+ } -+ case '-': { /* 0 or more repetitions (minimum) */ -+ return min_expand(ms, s, p, ep); -+ } -+ default: { -+ if (!m) return NULL; -+ s++; p=ep; goto init; /* else return match(ms, s+1, ep); */ -+ } -+ } -+ } -+ } -+} -+ -+ -+ -+static const char *lmemfind (const char *s1, size_t l1, -+ const char *s2, size_t l2) { -+ if (l2 == 0) return s1; /* empty strings are everywhere */ -+ else if (l2 > l1) return NULL; /* avoids a negative `l1' */ -+ else { -+ const char *init; /* to search for a `*s2' inside `s1' */ -+ l2--; /* 1st char will be checked by `memchr' */ -+ l1 = l1-l2; /* `s2' cannot be found after that */ -+ while (l1 > 0 && (init = (const char *)memchr(s1, *s2, l1)) != NULL) { -+ init++; /* 1st char is already checked */ -+ if (memcmp(init, s2+1, l2) == 0) -+ return init-1; -+ else { /* correct `l1' and `s1' to try again */ -+ l1 -= init-s1; -+ s1 = init; -+ } -+ } -+ return NULL; /* not found */ -+ } -+} -+ -+ -+static void push_onecapture (MatchState *ms, int i, const char *s, -+ const char *e) { -+ if (i >= ms->level) { -+ if (i == 0) /* ms->level == 0, too */ -+ lua_pushlstring(ms->L, s, e - s); /* add whole match */ -+ else -+ luaL_error(ms->L, "invalid capture index"); -+ } -+ else { -+ ptrdiff_t l = ms->capture[i].len; -+ if (l == CAP_UNFINISHED) luaL_error(ms->L, "unfinished capture"); -+ if (l == CAP_POSITION) -+ lua_pushinteger(ms->L, ms->capture[i].init - ms->src_init + 1); -+ else -+ lua_pushlstring(ms->L, ms->capture[i].init, l); -+ } -+} -+ -+ -+static int push_captures (MatchState *ms, const char *s, const char *e) { -+ int i; -+ int nlevels = (ms->level == 0 && s) ? 1 : ms->level; -+ luaL_checkstack(ms->L, nlevels, "too many captures"); -+ for (i = 0; i < nlevels; i++) -+ push_onecapture(ms, i, s, e); -+ return nlevels; /* number of strings pushed */ -+} -+ -+ -+static int str_find_aux (lua_State *L, int find) { -+ size_t l1, l2; -+ const char *s = luaL_checklstring(L, 1, &l1); -+ const char *p = luaL_checklstring(L, 2, &l2); -+ ptrdiff_t init = posrelat(luaL_optinteger(L, 3, 1), l1) - 1; -+ if (init < 0) init = 0; -+ else if ((size_t)(init) > l1) init = (ptrdiff_t)l1; -+ if (find && (lua_toboolean(L, 4) || /* explicit request? */ -+ strpbrk(p, SPECIALS) == NULL)) { /* or no special characters? */ -+ /* do a plain search */ -+ const char *s2 = lmemfind(s+init, l1-init, p, l2); -+ if (s2) { -+ lua_pushinteger(L, s2-s+1); -+ lua_pushinteger(L, s2-s+l2); -+ return 2; -+ } -+ } -+ else { -+ MatchState ms; -+ int anchor = (*p == '^') ? (p++, 1) : 0; -+ const char *s1=s+init; -+ ms.L = L; -+ ms.src_init = s; -+ ms.src_end = s+l1; -+ do { -+ const char *res; -+ ms.level = 0; -+ if ((res=match(&ms, s1, p)) != NULL) { -+ if (find) { -+ lua_pushinteger(L, s1-s+1); /* start */ -+ lua_pushinteger(L, res-s); /* end */ -+ return push_captures(&ms, NULL, 0) + 2; -+ } -+ else -+ return push_captures(&ms, s1, res); -+ } -+ } while (s1++ < ms.src_end && !anchor); -+ } -+ lua_pushnil(L); /* not found */ -+ return 1; -+} -+ -+ -+static int str_find (lua_State *L) { -+ return str_find_aux(L, 1); -+} -+ -+ -+static int str_match (lua_State *L) { -+ return str_find_aux(L, 0); -+} -+ -+ -+static int gmatch_aux (lua_State *L) { -+ MatchState ms; -+ size_t ls; -+ const char *s = lua_tolstring(L, lua_upvalueindex(1), &ls); -+ const char *p = lua_tostring(L, lua_upvalueindex(2)); -+ const char *src; -+ ms.L = L; -+ ms.src_init = s; -+ ms.src_end = s+ls; -+ for (src = s + (size_t)lua_tointeger(L, lua_upvalueindex(3)); -+ src <= ms.src_end; -+ src++) { -+ const char *e; -+ ms.level = 0; -+ if ((e = match(&ms, src, p)) != NULL) { -+ lua_Integer newstart = e-s; -+ if (e == src) newstart++; /* empty match? go at least one position */ -+ lua_pushinteger(L, newstart); -+ lua_replace(L, lua_upvalueindex(3)); -+ return push_captures(&ms, src, e); -+ } -+ } -+ return 0; /* not found */ -+} -+ -+ -+static int gmatch (lua_State *L) { -+ luaL_checkstring(L, 1); -+ luaL_checkstring(L, 2); -+ lua_settop(L, 2); -+ lua_pushinteger(L, 0); -+ lua_pushcclosure(L, gmatch_aux, 3); -+ return 1; -+} -+ -+ -+static int gfind_nodef (lua_State *L) { -+ return luaL_error(L, LUA_QL("string.gfind") " was renamed to " -+ LUA_QL("string.gmatch")); -+} -+ -+ -+static void add_s (MatchState *ms, luaL_Buffer *b, const char *s, -+ const char *e) { -+ size_t l, i; -+ const char *news = lua_tolstring(ms->L, 3, &l); -+ for (i = 0; i < l; i++) { -+ if (news[i] != L_ESC) -+ luaL_addchar(b, news[i]); -+ else { -+ i++; /* skip ESC */ -+ if (!isdigit(uchar(news[i]))) -+ luaL_addchar(b, news[i]); -+ else if (news[i] == '0') -+ luaL_addlstring(b, s, e - s); -+ else { -+ push_onecapture(ms, news[i] - '1', s, e); -+ luaL_addvalue(b); /* add capture to accumulated result */ -+ } -+ } -+ } -+} -+ -+ -+static void add_value (MatchState *ms, luaL_Buffer *b, const char *s, -+ const char *e) { -+ lua_State *L = ms->L; -+ switch (lua_type(L, 3)) { -+ case LUA_TNUMBER: -+ case LUA_TSTRING: { -+ add_s(ms, b, s, e); -+ return; -+ } -+ case LUA_TFUNCTION: { -+ int n; -+ lua_pushvalue(L, 3); -+ n = push_captures(ms, s, e); -+ lua_call(L, n, 1); -+ break; -+ } -+ case LUA_TTABLE: { -+ push_onecapture(ms, 0, s, e); -+ lua_gettable(L, 3); -+ break; -+ } -+ } -+ if (!lua_toboolean(L, -1)) { /* nil or false? */ -+ lua_pop(L, 1); -+ lua_pushlstring(L, s, e - s); /* keep original text */ -+ } -+ else if (!lua_isstring(L, -1)) -+ luaL_error(L, "invalid replacement value (a %s)", luaL_typename(L, -1)); -+ luaL_addvalue(b); /* add result to accumulator */ -+} -+ -+ -+static int str_gsub (lua_State *L) { -+ size_t srcl; -+ const char *src = luaL_checklstring(L, 1, &srcl); -+ const char *p = luaL_checkstring(L, 2); -+ int tr = lua_type(L, 3); -+ int max_s = luaL_optint(L, 4, srcl+1); -+ int anchor = (*p == '^') ? (p++, 1) : 0; -+ int n = 0; -+ MatchState ms; -+ luaL_Buffer *b = (luaL_Buffer *)kmalloc(sizeof(luaL_Buffer) + BUFSIZ, GFP_ATOMIC); -+ if(!b) luaL_error(L, "str_gsub: cannot allocate memory"); -+ luaL_argcheck(L, tr == LUA_TNUMBER || tr == LUA_TSTRING || -+ tr == LUA_TFUNCTION || tr == LUA_TTABLE, 3, -+ "string/function/table expected"); -+ luaL_buffinit(L, b); -+ ms.L = L; -+ ms.src_init = src; -+ ms.src_end = src+srcl; -+ while (n < max_s) { -+ const char *e; -+ ms.level = 0; -+ e = match(&ms, src, p); -+ if (e) { -+ n++; -+ add_value(&ms, b, src, e); -+ } -+ if (e && e>src) /* non empty match? */ -+ src = e; /* skip it */ -+ else if (src < ms.src_end) -+ luaL_addchar(b, *src++); -+ else break; -+ if (anchor) break; -+ } -+ luaL_addlstring(b, src, ms.src_end-src); -+ luaL_pushresult(b); -+ lua_pushinteger(L, n); /* number of substitutions */ -+ kfree(b); -+ return 2; -+} -+ -+/* }====================================================== */ -+ -+ -+/* maximum size of each formatted item (> len(format('%99.99f', -1e308))) */ -+#define MAX_ITEM 512 -+/* valid flags in a format specification */ -+#define FLAGS "-+ #0" -+/* -+** maximum size of each format specification (such as '%-099.99d') -+** (+10 accounts for %99.99x plus margin of error) -+*/ -+#define MAX_FORMAT (sizeof(FLAGS) + sizeof(LUA_INTFRMLEN) + 10) -+ -+ -+static void addquoted (lua_State *L, luaL_Buffer *b, int arg) { -+ size_t l; -+ const char *s = luaL_checklstring(L, arg, &l); -+ luaL_addchar(b, '"'); -+ while (l--) { -+ switch (*s) { -+ case '"': case '\\': case '\n': { -+ luaL_addchar(b, '\\'); -+ luaL_addchar(b, *s); -+ break; -+ } -+ case '\r': { -+ luaL_addlstring(b, "\\r", 2); -+ break; -+ } -+ case '\0': { -+ luaL_addlstring(b, "\\000", 4); -+ break; -+ } -+ default: { -+ luaL_addchar(b, *s); -+ break; -+ } -+ } -+ s++; -+ } -+ luaL_addchar(b, '"'); -+} -+ -+static const char *scanformat (lua_State *L, const char *strfrmt, char *form) { -+ const char *p = strfrmt; -+ while (*p != '\0' && strchr(FLAGS, *p) != NULL) p++; /* skip flags */ -+ if ((size_t)(p - strfrmt) >= sizeof(FLAGS)) -+ luaL_error(L, "invalid format (repeated flags)"); -+ if (isdigit(uchar(*p))) p++; /* skip width */ -+ if (isdigit(uchar(*p))) p++; /* (2 digits at most) */ -+ if (*p == '.') { -+ p++; -+ if (isdigit(uchar(*p))) p++; /* skip precision */ -+ if (isdigit(uchar(*p))) p++; /* (2 digits at most) */ -+ } -+ if (isdigit(uchar(*p))) -+ luaL_error(L, "invalid format (width or precision too long)"); -+ *(form++) = '%'; -+ strncpy(form, strfrmt, p - strfrmt + 1); -+ form += p - strfrmt + 1; -+ *form = '\0'; -+ return p; -+} -+ -+ -+static void addintlen (char *form) { -+ size_t l = strlen(form); -+ char spec = form[l - 1]; -+ strcpy(form + l - 1, LUA_INTFRMLEN); -+ form[l + sizeof(LUA_INTFRMLEN) - 2] = spec; -+ form[l + sizeof(LUA_INTFRMLEN) - 1] = '\0'; -+} -+ -+ -+static int str_format (lua_State *L) { -+ int arg = 1; -+ size_t sfl; -+ const char *strfrmt = luaL_checklstring(L, arg, &sfl); -+ const char *strfrmt_end = strfrmt+sfl; -+ luaL_Buffer *b = (luaL_Buffer *)kmalloc(sizeof(luaL_Buffer) + BUFSIZ, GFP_ATOMIC); -+ if(!b) luaL_error(L, "str_format: cannot allocate memory"); -+ luaL_buffinit(L, b); -+ while (strfrmt < strfrmt_end) { -+ if (*strfrmt != L_ESC) -+ luaL_addchar(b, *strfrmt++); -+ else if (*++strfrmt == L_ESC) -+ luaL_addchar(b, *strfrmt++); /* %% */ -+ else { /* format item */ -+ char form[MAX_FORMAT]; /* to store the format (`%...') */ -+ char buff[MAX_ITEM]; /* to store the formatted item */ -+ arg++; -+ strfrmt = scanformat(L, strfrmt, form); -+ switch (*strfrmt++) { -+ case 'c': { -+ sprintf(buff, form, (int)luaL_checknumber(L, arg)); -+ break; -+ } -+ case 'd': case 'i': { -+ addintlen(form); -+ sprintf(buff, form, (LUA_INTFRM_T)luaL_checknumber(L, arg)); -+ break; -+ } -+ case 'o': case 'u': case 'x': case 'X': { -+ addintlen(form); -+ sprintf(buff, form, (unsigned LUA_INTFRM_T)luaL_checknumber(L, arg)); -+ break; -+ } -+ case 'q': { -+ addquoted(L, b, arg); -+ continue; /* skip the 'addsize' at the end */ -+ } -+ case 's': { -+ size_t l; -+ const char *s = luaL_checklstring(L, arg, &l); -+ if (!strchr(form, '.') && l >= 100) { -+ /* no precision and string is too long to be formatted; -+ keep original string */ -+ lua_pushvalue(L, arg); -+ luaL_addvalue(b); -+ continue; /* skip the `addsize' at the end */ -+ } -+ else { -+ sprintf(buff, form, s); -+ break; -+ } -+ } -+ default: { /* also treat cases `pnLlh' */ -+ kfree(b); -+ return luaL_error(L, "invalid option " LUA_QL("%%%c") " to " -+ LUA_QL("format"), *(strfrmt - 1)); -+ } -+ } -+ luaL_addlstring(b, buff, strlen(buff)); -+ } -+ } -+ luaL_pushresult(b); -+ kfree(b); -+ return 1; -+} -+ -+ -+static const luaL_Reg strlib[] = { -+ {"byte", str_byte}, -+ {"char", str_char}, -+ {"dump", str_dump}, -+ {"find", str_find}, -+ {"format", str_format}, -+ {"gfind", gfind_nodef}, -+ {"gmatch", gmatch}, -+ {"gsub", str_gsub}, -+ {"len", str_len}, -+ {"lower", str_lower}, -+ {"match", str_match}, -+ {"rep", str_rep}, -+ {"reverse", str_reverse}, -+ {"sub", str_sub}, -+ {"upper", str_upper}, -+ {NULL, NULL} -+}; -+ -+ -+static void createmetatable (lua_State *L) { -+ lua_createtable(L, 0, 1); /* create metatable for strings */ -+ lua_pushliteral(L, ""); /* dummy string */ -+ lua_pushvalue(L, -2); -+ lua_setmetatable(L, -2); /* set string metatable */ -+ lua_pop(L, 1); /* pop dummy string */ -+ lua_pushvalue(L, -2); /* string library... */ -+ lua_setfield(L, -2, "__index"); /* ...is the __index metamethod */ -+ lua_pop(L, 1); /* pop metatable */ -+} -+ -+ -+/* -+** Open string library -+*/ -+LUALIB_API int luaopen_string (lua_State *L) { -+ luaL_register(L, LUA_STRLIBNAME, strlib); -+#if defined(LUA_COMPAT_GFIND) -+ lua_getfield(L, -1, "gmatch"); -+ lua_setfield(L, -2, "gfind"); -+#endif -+ createmetatable(L); -+ return 1; -+} ---- /dev/null -+++ b/extensions/LUA/lua/ltable.c -@@ -0,0 +1,588 @@ -+/* -+** $Id: ltable.c,v 2.32.1.2 2007/12/28 15:32:23 roberto Exp $ -+** Lua tables (hash) -+** See Copyright Notice in lua.h -+*/ -+ -+ -+/* -+** Implementation of tables (aka arrays, objects, or hash tables). -+** Tables keep its elements in two parts: an array part and a hash part. -+** Non-negative integer keys are all candidates to be kept in the array -+** part. The actual size of the array is the largest `n' such that at -+** least half the slots between 0 and n are in use. -+** Hash uses a mix of chained scatter table with Brent's variation. -+** A main invariant of these tables is that, if an element is not -+** in its main position (i.e. the `original' position that its hash gives -+** to it), then the colliding element is in its own main position. -+** Hence even when the load factor reaches 100%, performance remains good. -+*/ -+ -+#include -+#include -+ -+#define ltable_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldebug.h" -+#include "ldo.h" -+#include "lgc.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lstate.h" -+#include "ltable.h" -+ -+ -+/* -+** max size of array part is 2^MAXBITS -+*/ -+#if LUAI_BITSINT > 26 -+#define MAXBITS 26 -+#else -+#define MAXBITS (LUAI_BITSINT-2) -+#endif -+ -+#define MAXASIZE (1 << MAXBITS) -+ -+ -+#define hashpow2(t,n) (gnode(t, lmod((n), sizenode(t)))) -+ -+#define hashstr(t,str) hashpow2(t, (str)->tsv.hash) -+#define hashboolean(t,p) hashpow2(t, p) -+ -+ -+/* -+** for some types, it is better to avoid modulus by power of 2, as -+** they tend to have many 2 factors. -+*/ -+#define hashmod(t,n) (gnode(t, ((n) % ((sizenode(t)-1)|1)))) -+ -+ -+#define hashpointer(t,p) hashmod(t, IntPoint(p)) -+ -+ -+/* -+** number of ints inside a lua_Number -+*/ -+#define numints cast_int(sizeof(lua_Number)/sizeof(int)) -+ -+ -+ -+#define dummynode (&dummynode_) -+ -+static const Node dummynode_ = { -+ {{NULL}, LUA_TNIL}, /* value */ -+ {{{NULL}, LUA_TNIL, NULL}} /* key */ -+}; -+ -+ -+/* -+** hash for lua_Numbers -+*/ -+static Node *hashnum (const Table *t, lua_Number n) { -+ unsigned int a[numints]; -+ int i; -+ if (luai_numeq(n, 0)) /* avoid problems with -0 */ -+ return gnode(t, 0); -+ memcpy(a, &n, sizeof(a)); -+ for (i = 1; i < numints; i++) a[0] += a[i]; -+ return hashmod(t, a[0]); -+} -+ -+ -+ -+/* -+** returns the `main' position of an element in a table (that is, the index -+** of its hash value) -+*/ -+static Node *mainposition (const Table *t, const TValue *key) { -+ switch (ttype(key)) { -+ case LUA_TNUMBER: -+ return hashnum(t, nvalue(key)); -+ case LUA_TSTRING: -+ return hashstr(t, rawtsvalue(key)); -+ case LUA_TBOOLEAN: -+ return hashboolean(t, bvalue(key)); -+ case LUA_TLIGHTUSERDATA: -+ return hashpointer(t, pvalue(key)); -+ default: -+ return hashpointer(t, gcvalue(key)); -+ } -+} -+ -+ -+/* -+** returns the index for `key' if `key' is an appropriate key to live in -+** the array part of the table, -1 otherwise. -+*/ -+static int arrayindex (const TValue *key) { -+ if (ttisnumber(key)) { -+ lua_Number n = nvalue(key); -+ int k; -+ lua_number2int(k, n); -+ if (luai_numeq(cast_num(k), n)) -+ return k; -+ } -+ return -1; /* `key' did not match some condition */ -+} -+ -+ -+/* -+** returns the index of a `key' for table traversals. First goes all -+** elements in the array part, then elements in the hash part. The -+** beginning of a traversal is signalled by -1. -+*/ -+static int findindex (lua_State *L, Table *t, StkId key) { -+ int i; -+ if (ttisnil(key)) return -1; /* first iteration */ -+ i = arrayindex(key); -+ if (0 < i && i <= t->sizearray) /* is `key' inside array part? */ -+ return i-1; /* yes; that's the index (corrected to C) */ -+ else { -+ Node *n = mainposition(t, key); -+ do { /* check whether `key' is somewhere in the chain */ -+ /* key may be dead already, but it is ok to use it in `next' */ -+ if (luaO_rawequalObj(key2tval(n), key) || -+ (ttype(gkey(n)) == LUA_TDEADKEY && iscollectable(key) && -+ gcvalue(gkey(n)) == gcvalue(key))) { -+ i = cast_int(n - gnode(t, 0)); /* key index in hash table */ -+ /* hash elements are numbered after array ones */ -+ return i + t->sizearray; -+ } -+ else n = gnext(n); -+ } while (n); -+ luaG_runerror(L, "invalid key to " LUA_QL("next")); /* key not found */ -+ return 0; /* to avoid warnings */ -+ } -+} -+ -+ -+int luaH_next (lua_State *L, Table *t, StkId key) { -+ int i = findindex(L, t, key); /* find original element */ -+ for (i++; i < t->sizearray; i++) { /* try first array part */ -+ if (!ttisnil(&t->array[i])) { /* a non-nil value? */ -+ setnvalue(key, cast_num(i+1)); -+ setobj2s(L, key+1, &t->array[i]); -+ return 1; -+ } -+ } -+ for (i -= t->sizearray; i < sizenode(t); i++) { /* then hash part */ -+ if (!ttisnil(gval(gnode(t, i)))) { /* a non-nil value? */ -+ setobj2s(L, key, key2tval(gnode(t, i))); -+ setobj2s(L, key+1, gval(gnode(t, i))); -+ return 1; -+ } -+ } -+ return 0; /* no more elements */ -+} -+ -+ -+/* -+** {============================================================= -+** Rehash -+** ============================================================== -+*/ -+ -+ -+static int computesizes (int nums[], int *narray) { -+ int i; -+ int twotoi; /* 2^i */ -+ int a = 0; /* number of elements smaller than 2^i */ -+ int na = 0; /* number of elements to go to array part */ -+ int n = 0; /* optimal size for array part */ -+ for (i = 0, twotoi = 1; twotoi/2 < *narray; i++, twotoi *= 2) { -+ if (nums[i] > 0) { -+ a += nums[i]; -+ if (a > twotoi/2) { /* more than half elements present? */ -+ n = twotoi; /* optimal size (till now) */ -+ na = a; /* all elements smaller than n will go to array part */ -+ } -+ } -+ if (a == *narray) break; /* all elements already counted */ -+ } -+ *narray = n; -+ lua_assert(*narray/2 <= na && na <= *narray); -+ return na; -+} -+ -+ -+static int countint (const TValue *key, int *nums) { -+ int k = arrayindex(key); -+ if (0 < k && k <= MAXASIZE) { /* is `key' an appropriate array index? */ -+ nums[ceillog2(k)]++; /* count as such */ -+ return 1; -+ } -+ else -+ return 0; -+} -+ -+ -+static int numusearray (const Table *t, int *nums) { -+ int lg; -+ int ttlg; /* 2^lg */ -+ int ause = 0; /* summation of `nums' */ -+ int i = 1; /* count to traverse all array keys */ -+ for (lg=0, ttlg=1; lg<=MAXBITS; lg++, ttlg*=2) { /* for each slice */ -+ int lc = 0; /* counter */ -+ int lim = ttlg; -+ if (lim > t->sizearray) { -+ lim = t->sizearray; /* adjust upper limit */ -+ if (i > lim) -+ break; /* no more elements to count */ -+ } -+ /* count elements in range (2^(lg-1), 2^lg] */ -+ for (; i <= lim; i++) { -+ if (!ttisnil(&t->array[i-1])) -+ lc++; -+ } -+ nums[lg] += lc; -+ ause += lc; -+ } -+ return ause; -+} -+ -+ -+static int numusehash (const Table *t, int *nums, int *pnasize) { -+ int totaluse = 0; /* total number of elements */ -+ int ause = 0; /* summation of `nums' */ -+ int i = sizenode(t); -+ while (i--) { -+ Node *n = &t->node[i]; -+ if (!ttisnil(gval(n))) { -+ ause += countint(key2tval(n), nums); -+ totaluse++; -+ } -+ } -+ *pnasize += ause; -+ return totaluse; -+} -+ -+ -+static void setarrayvector (lua_State *L, Table *t, int size) { -+ int i; -+ luaM_reallocvector(L, t->array, t->sizearray, size, TValue); -+ for (i=t->sizearray; iarray[i]); -+ t->sizearray = size; -+} -+ -+ -+static void setnodevector (lua_State *L, Table *t, int size) { -+ int lsize; -+ if (size == 0) { /* no elements to hash part? */ -+ t->node = cast(Node *, dummynode); /* use common `dummynode' */ -+ lsize = 0; -+ } -+ else { -+ int i; -+ lsize = ceillog2(size); -+ if (lsize > MAXBITS) -+ luaG_runerror(L, "table overflow"); -+ size = twoto(lsize); -+ t->node = luaM_newvector(L, size, Node); -+ for (i=0; ilsizenode = cast_byte(lsize); -+ t->lastfree = gnode(t, size); /* all positions are free */ -+} -+ -+ -+static void resize (lua_State *L, Table *t, int nasize, int nhsize) { -+ int i; -+ int oldasize = t->sizearray; -+ int oldhsize = t->lsizenode; -+ Node *nold = t->node; /* save old hash ... */ -+ if (nasize > oldasize) /* array part must grow? */ -+ setarrayvector(L, t, nasize); -+ /* create new hash part with appropriate size */ -+ setnodevector(L, t, nhsize); -+ if (nasize < oldasize) { /* array part must shrink? */ -+ t->sizearray = nasize; -+ /* re-insert elements from vanishing slice */ -+ for (i=nasize; iarray[i])) -+ setobjt2t(L, luaH_setnum(L, t, i+1), &t->array[i]); -+ } -+ /* shrink array */ -+ luaM_reallocvector(L, t->array, oldasize, nasize, TValue); -+ } -+ /* re-insert elements from hash part */ -+ for (i = twoto(oldhsize) - 1; i >= 0; i--) { -+ Node *old = nold+i; -+ if (!ttisnil(gval(old))) -+ setobjt2t(L, luaH_set(L, t, key2tval(old)), gval(old)); -+ } -+ if (nold != dummynode) -+ luaM_freearray(L, nold, twoto(oldhsize), Node); /* free old array */ -+} -+ -+ -+void luaH_resizearray (lua_State *L, Table *t, int nasize) { -+ int nsize = (t->node == dummynode) ? 0 : sizenode(t); -+ resize(L, t, nasize, nsize); -+} -+ -+ -+static void rehash (lua_State *L, Table *t, const TValue *ek) { -+ int nasize, na; -+ int nums[MAXBITS+1]; /* nums[i] = number of keys between 2^(i-1) and 2^i */ -+ int i; -+ int totaluse; -+ for (i=0; i<=MAXBITS; i++) nums[i] = 0; /* reset counts */ -+ nasize = numusearray(t, nums); /* count keys in array part */ -+ totaluse = nasize; /* all those keys are integer keys */ -+ totaluse += numusehash(t, nums, &nasize); /* count keys in hash part */ -+ /* count extra key */ -+ nasize += countint(ek, nums); -+ totaluse++; -+ /* compute new size for array part */ -+ na = computesizes(nums, &nasize); -+ /* resize the table to new computed sizes */ -+ resize(L, t, nasize, totaluse - na); -+} -+ -+ -+ -+/* -+** }============================================================= -+*/ -+ -+ -+Table *luaH_new (lua_State *L, int narray, int nhash) { -+ Table *t = luaM_new(L, Table); -+ luaC_link(L, obj2gco(t), LUA_TTABLE); -+ t->metatable = NULL; -+ t->flags = cast_byte(~0); -+ /* temporary values (kept only if some malloc fails) */ -+ t->array = NULL; -+ t->sizearray = 0; -+ t->lsizenode = 0; -+ t->node = cast(Node *, dummynode); -+ setarrayvector(L, t, narray); -+ setnodevector(L, t, nhash); -+ return t; -+} -+ -+ -+void luaH_free (lua_State *L, Table *t) { -+ if (t->node != dummynode) -+ luaM_freearray(L, t->node, sizenode(t), Node); -+ luaM_freearray(L, t->array, t->sizearray, TValue); -+ luaM_free(L, t); -+} -+ -+ -+static Node *getfreepos (Table *t) { -+ while (t->lastfree-- > t->node) { -+ if (ttisnil(gkey(t->lastfree))) -+ return t->lastfree; -+ } -+ return NULL; /* could not find a free place */ -+} -+ -+ -+ -+/* -+** inserts a new key into a hash table; first, check whether key's main -+** position is free. If not, check whether colliding node is in its main -+** position or not: if it is not, move colliding node to an empty place and -+** put new key in its main position; otherwise (colliding node is in its main -+** position), new key goes to an empty position. -+*/ -+static TValue *newkey (lua_State *L, Table *t, const TValue *key) { -+ Node *mp = mainposition(t, key); -+ if (!ttisnil(gval(mp)) || mp == dummynode) { -+ Node *othern; -+ Node *n = getfreepos(t); /* get a free place */ -+ if (n == NULL) { /* cannot find a free place? */ -+ rehash(L, t, key); /* grow table */ -+ return luaH_set(L, t, key); /* re-insert key into grown table */ -+ } -+ lua_assert(n != dummynode); -+ othern = mainposition(t, key2tval(mp)); -+ if (othern != mp) { /* is colliding node out of its main position? */ -+ /* yes; move colliding node into free position */ -+ while (gnext(othern) != mp) othern = gnext(othern); /* find previous */ -+ gnext(othern) = n; /* redo the chain with `n' in place of `mp' */ -+ *n = *mp; /* copy colliding node into free pos. (mp->next also goes) */ -+ gnext(mp) = NULL; /* now `mp' is free */ -+ setnilvalue(gval(mp)); -+ } -+ else { /* colliding node is in its own main position */ -+ /* new node will go into free position */ -+ gnext(n) = gnext(mp); /* chain new position */ -+ gnext(mp) = n; -+ mp = n; -+ } -+ } -+ gkey(mp)->value = key->value; gkey(mp)->tt = key->tt; -+ luaC_barriert(L, t, key); -+ lua_assert(ttisnil(gval(mp))); -+ return gval(mp); -+} -+ -+ -+/* -+** search function for integers -+*/ -+const TValue *luaH_getnum (Table *t, int key) { -+ /* (1 <= key && key <= t->sizearray) */ -+ if (cast(unsigned int, key-1) < cast(unsigned int, t->sizearray)) -+ return &t->array[key-1]; -+ else { -+ lua_Number nk = cast_num(key); -+ Node *n = hashnum(t, nk); -+ do { /* check whether `key' is somewhere in the chain */ -+ if (ttisnumber(gkey(n)) && luai_numeq(nvalue(gkey(n)), nk)) -+ return gval(n); /* that's it */ -+ else n = gnext(n); -+ } while (n); -+ return luaO_nilobject; -+ } -+} -+ -+ -+/* -+** search function for strings -+*/ -+const TValue *luaH_getstr (Table *t, TString *key) { -+ Node *n = hashstr(t, key); -+ do { /* check whether `key' is somewhere in the chain */ -+ if (ttisstring(gkey(n)) && rawtsvalue(gkey(n)) == key) -+ return gval(n); /* that's it */ -+ else n = gnext(n); -+ } while (n); -+ return luaO_nilobject; -+} -+ -+ -+/* -+** main search function -+*/ -+const TValue *luaH_get (Table *t, const TValue *key) { -+ switch (ttype(key)) { -+ case LUA_TNIL: return luaO_nilobject; -+ case LUA_TSTRING: return luaH_getstr(t, rawtsvalue(key)); -+ case LUA_TNUMBER: { -+ int k; -+ lua_Number n = nvalue(key); -+ lua_number2int(k, n); -+ if (luai_numeq(cast_num(k), nvalue(key))) /* index is int? */ -+ return luaH_getnum(t, k); /* use specialized version */ -+ /* else go through */ -+ } -+ default: { -+ Node *n = mainposition(t, key); -+ do { /* check whether `key' is somewhere in the chain */ -+ if (luaO_rawequalObj(key2tval(n), key)) -+ return gval(n); /* that's it */ -+ else n = gnext(n); -+ } while (n); -+ return luaO_nilobject; -+ } -+ } -+} -+ -+ -+TValue *luaH_set (lua_State *L, Table *t, const TValue *key) { -+ const TValue *p = luaH_get(t, key); -+ t->flags = 0; -+ if (p != luaO_nilobject) -+ return cast(TValue *, p); -+ else { -+ if (ttisnil(key)) luaG_runerror(L, "table index is nil"); -+ else if (ttisnumber(key) && luai_numisnan(nvalue(key))) -+ luaG_runerror(L, "table index is NaN"); -+ return newkey(L, t, key); -+ } -+} -+ -+ -+TValue *luaH_setnum (lua_State *L, Table *t, int key) { -+ const TValue *p = luaH_getnum(t, key); -+ if (p != luaO_nilobject) -+ return cast(TValue *, p); -+ else { -+ TValue k; -+ setnvalue(&k, cast_num(key)); -+ return newkey(L, t, &k); -+ } -+} -+ -+ -+TValue *luaH_setstr (lua_State *L, Table *t, TString *key) { -+ const TValue *p = luaH_getstr(t, key); -+ if (p != luaO_nilobject) -+ return cast(TValue *, p); -+ else { -+ TValue k; -+ setsvalue(L, &k, key); -+ return newkey(L, t, &k); -+ } -+} -+ -+ -+static int unbound_search (Table *t, unsigned int j) { -+ unsigned int i = j; /* i is zero or a present index */ -+ j++; -+ /* find `i' and `j' such that i is present and j is not */ -+ while (!ttisnil(luaH_getnum(t, j))) { -+ i = j; -+ j *= 2; -+ if (j > cast(unsigned int, MAX_INT)) { /* overflow? */ -+ /* table was built with bad purposes: resort to linear search */ -+ i = 1; -+ while (!ttisnil(luaH_getnum(t, i))) i++; -+ return i - 1; -+ } -+ } -+ /* now do a binary search between them */ -+ while (j - i > 1) { -+ unsigned int m = (i+j)/2; -+ if (ttisnil(luaH_getnum(t, m))) j = m; -+ else i = m; -+ } -+ return i; -+} -+ -+ -+/* -+** Try to find a boundary in table `t'. A `boundary' is an integer index -+** such that t[i] is non-nil and t[i+1] is nil (and 0 if t[1] is nil). -+*/ -+int luaH_getn (Table *t) { -+ unsigned int j = t->sizearray; -+ if (j > 0 && ttisnil(&t->array[j - 1])) { -+ /* there is a boundary in the array part: (binary) search for it */ -+ unsigned int i = 0; -+ while (j - i > 1) { -+ unsigned int m = (i+j)/2; -+ if (ttisnil(&t->array[m - 1])) j = m; -+ else i = m; -+ } -+ return i; -+ } -+ /* else must find a boundary in hash part */ -+ else if (t->node == dummynode) /* hash part is empty? */ -+ return j; /* that is easy... */ -+ else return unbound_search(t, j); -+} -+ -+ -+ -+#if defined(LUA_DEBUG) -+ -+Node *luaH_mainposition (const Table *t, const TValue *key) { -+ return mainposition(t, key); -+} -+ -+int luaH_isdummy (Node *n) { return n == dummynode; } -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/ltable.h -@@ -0,0 +1,40 @@ -+/* -+** $Id: ltable.h,v 2.10.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Lua tables (hash) -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef ltable_h -+#define ltable_h -+ -+#include "lobject.h" -+ -+ -+#define gnode(t,i) (&(t)->node[i]) -+#define gkey(n) (&(n)->i_key.nk) -+#define gval(n) (&(n)->i_val) -+#define gnext(n) ((n)->i_key.nk.next) -+ -+#define key2tval(n) (&(n)->i_key.tvk) -+ -+ -+LUAI_FUNC const TValue *luaH_getnum (Table *t, int key); -+LUAI_FUNC TValue *luaH_setnum (lua_State *L, Table *t, int key); -+LUAI_FUNC const TValue *luaH_getstr (Table *t, TString *key); -+LUAI_FUNC TValue *luaH_setstr (lua_State *L, Table *t, TString *key); -+LUAI_FUNC const TValue *luaH_get (Table *t, const TValue *key); -+LUAI_FUNC TValue *luaH_set (lua_State *L, Table *t, const TValue *key); -+LUAI_FUNC Table *luaH_new (lua_State *L, int narray, int lnhash); -+LUAI_FUNC void luaH_resizearray (lua_State *L, Table *t, int nasize); -+LUAI_FUNC void luaH_free (lua_State *L, Table *t); -+LUAI_FUNC int luaH_next (lua_State *L, Table *t, StkId key); -+LUAI_FUNC int luaH_getn (Table *t); -+ -+ -+#if defined(LUA_DEBUG) -+LUAI_FUNC Node *luaH_mainposition (const Table *t, const TValue *key); -+LUAI_FUNC int luaH_isdummy (Node *n); -+#endif -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/ltablib.c -@@ -0,0 +1,288 @@ -+/* -+** $Id: ltablib.c,v 1.38.1.3 2008/02/14 16:46:58 roberto Exp $ -+** Library for Table Manipulation -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#include -+ -+#define ltablib_c -+#define LUA_LIB -+ -+#include "lua.h" -+ -+#include "lauxlib.h" -+#include "lualib.h" -+ -+ -+#define aux_getn(L,n) (luaL_checktype(L, n, LUA_TTABLE), luaL_getn(L, n)) -+ -+ -+static int foreachi (lua_State *L) { -+ int i; -+ int n = aux_getn(L, 1); -+ luaL_checktype(L, 2, LUA_TFUNCTION); -+ for (i=1; i <= n; i++) { -+ lua_pushvalue(L, 2); /* function */ -+ lua_pushinteger(L, i); /* 1st argument */ -+ lua_rawgeti(L, 1, i); /* 2nd argument */ -+ lua_call(L, 2, 1); -+ if (!lua_isnil(L, -1)) -+ return 1; -+ lua_pop(L, 1); /* remove nil result */ -+ } -+ return 0; -+} -+ -+ -+static int foreach (lua_State *L) { -+ luaL_checktype(L, 1, LUA_TTABLE); -+ luaL_checktype(L, 2, LUA_TFUNCTION); -+ lua_pushnil(L); /* first key */ -+ while (lua_next(L, 1)) { -+ lua_pushvalue(L, 2); /* function */ -+ lua_pushvalue(L, -3); /* key */ -+ lua_pushvalue(L, -3); /* value */ -+ lua_call(L, 2, 1); -+ if (!lua_isnil(L, -1)) -+ return 1; -+ lua_pop(L, 2); /* remove value and result */ -+ } -+ return 0; -+} -+ -+ -+static int maxn (lua_State *L) { -+ lua_Number max = 0; -+ luaL_checktype(L, 1, LUA_TTABLE); -+ lua_pushnil(L); /* first key */ -+ while (lua_next(L, 1)) { -+ lua_pop(L, 1); /* remove value */ -+ if (lua_type(L, -1) == LUA_TNUMBER) { -+ lua_Number v = lua_tonumber(L, -1); -+ if (v > max) max = v; -+ } -+ } -+ lua_pushnumber(L, max); -+ return 1; -+} -+ -+ -+static int getn (lua_State *L) { -+ lua_pushinteger(L, aux_getn(L, 1)); -+ return 1; -+} -+ -+ -+static int setn (lua_State *L) { -+ luaL_checktype(L, 1, LUA_TTABLE); -+#ifndef luaL_setn -+ luaL_setn(L, 1, luaL_checkint(L, 2)); -+#else -+ luaL_error(L, LUA_QL("setn") " is obsolete"); -+#endif -+ lua_pushvalue(L, 1); -+ return 1; -+} -+ -+ -+static int tinsert (lua_State *L) { -+ int e = aux_getn(L, 1) + 1; /* first empty element */ -+ int pos; /* where to insert new element */ -+ switch (lua_gettop(L)) { -+ case 2: { /* called with only 2 arguments */ -+ pos = e; /* insert new element at the end */ -+ break; -+ } -+ case 3: { -+ int i; -+ pos = luaL_checkint(L, 2); /* 2nd argument is the position */ -+ if (pos > e) e = pos; /* `grow' array if necessary */ -+ for (i = e; i > pos; i--) { /* move up elements */ -+ lua_rawgeti(L, 1, i-1); -+ lua_rawseti(L, 1, i); /* t[i] = t[i-1] */ -+ } -+ break; -+ } -+ default: { -+ return luaL_error(L, "wrong number of arguments to " LUA_QL("insert")); -+ } -+ } -+ luaL_setn(L, 1, e); /* new size */ -+ lua_rawseti(L, 1, pos); /* t[pos] = v */ -+ return 0; -+} -+ -+ -+static int tremove (lua_State *L) { -+ int e = aux_getn(L, 1); -+ int pos = luaL_optint(L, 2, e); -+ if (!(1 <= pos && pos <= e)) /* position is outside bounds? */ -+ return 0; /* nothing to remove */ -+ luaL_setn(L, 1, e - 1); /* t.n = n-1 */ -+ lua_rawgeti(L, 1, pos); /* result = t[pos] */ -+ for ( ;pos= P */ -+ while (lua_rawgeti(L, 1, ++i), sort_comp(L, -1, -2)) { -+ if (i>u) luaL_error(L, "invalid order function for sorting"); -+ lua_pop(L, 1); /* remove a[i] */ -+ } -+ /* repeat --j until a[j] <= P */ -+ while (lua_rawgeti(L, 1, --j), sort_comp(L, -3, -1)) { -+ if (j -+ -+#define ltm_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "lobject.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "ltm.h" -+ -+ -+ -+const char *const luaT_typenames[] = { -+ "nil", "boolean", "userdata", "number", -+ "string", "table", "function", "userdata", "thread", -+ "proto", "upval" -+}; -+ -+ -+void luaT_init (lua_State *L) { -+ static const char *const luaT_eventname[] = { /* ORDER TM */ -+ "__index", "__newindex", -+ "__gc", "__mode", "__eq", -+ "__add", "__sub", "__mul", "__div", "__mod", -+ "__pow", "__unm", "__len", "__lt", "__le", -+ "__concat", "__call" -+ }; -+ int i; -+ for (i=0; itmname[i] = luaS_new(L, luaT_eventname[i]); -+ luaS_fix(G(L)->tmname[i]); /* never collect these names */ -+ } -+} -+ -+ -+/* -+** function to be used with macro "fasttm": optimized for absence of -+** tag methods -+*/ -+const TValue *luaT_gettm (Table *events, TMS event, TString *ename) { -+ const TValue *tm = luaH_getstr(events, ename); -+ lua_assert(event <= TM_EQ); -+ if (ttisnil(tm)) { /* no tag method? */ -+ events->flags |= cast_byte(1u<metatable; -+ break; -+ case LUA_TUSERDATA: -+ mt = uvalue(o)->metatable; -+ break; -+ default: -+ mt = G(L)->mt[ttype(o)]; -+ } -+ return (mt ? luaH_getstr(mt, G(L)->tmname[event]) : luaO_nilobject); -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/ltm.h -@@ -0,0 +1,54 @@ -+/* -+** $Id: ltm.h,v 2.6.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Tag methods -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef ltm_h -+#define ltm_h -+ -+ -+#include "lobject.h" -+ -+ -+/* -+* WARNING: if you change the order of this enumeration, -+* grep "ORDER TM" -+*/ -+typedef enum { -+ TM_INDEX, -+ TM_NEWINDEX, -+ TM_GC, -+ TM_MODE, -+ TM_EQ, /* last tag method with `fast' access */ -+ TM_ADD, -+ TM_SUB, -+ TM_MUL, -+ TM_DIV, -+ TM_MOD, -+ TM_POW, -+ TM_UNM, -+ TM_LEN, -+ TM_LT, -+ TM_LE, -+ TM_CONCAT, -+ TM_CALL, -+ TM_N /* number of elements in the enum */ -+} TMS; -+ -+ -+ -+#define gfasttm(g,et,e) ((et) == NULL ? NULL : \ -+ ((et)->flags & (1u<<(e))) ? NULL : luaT_gettm(et, e, (g)->tmname[e])) -+ -+#define fasttm(l,et,e) gfasttm(G(l), et, e) -+ -+LUAI_DATA const char *const luaT_typenames[]; -+ -+ -+LUAI_FUNC const TValue *luaT_gettm (Table *events, TMS event, TString *ename); -+LUAI_FUNC const TValue *luaT_gettmbyobj (lua_State *L, const TValue *o, -+ TMS event); -+LUAI_FUNC void luaT_init (lua_State *L); -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/luaconf.h -@@ -0,0 +1,797 @@ -+/* -+** $Id: luaconf.h,v 1.82.1.7 2008/02/11 16:25:08 roberto Exp $ -+** Configuration file for Lua -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#ifndef lconfig_h -+#define lconfig_h -+ -+#include -+ -+#if !defined(__KERNEL__) -+#include -+#else -+#define UCHAR_MAX 255 -+#define SHRT_MAX 32767 -+#define BUFSIZ 8192 -+#define NO_FPU -+#endif -+ -+/* -+** ================================================================== -+** Search for "@@" to find all configurable definitions. -+** =================================================================== -+*/ -+ -+ -+/* -+@@ LUA_ANSI controls the use of non-ansi features. -+** CHANGE it (define it) if you want Lua to avoid the use of any -+** non-ansi feature or library. -+*/ -+#if defined(__STRICT_ANSI__) -+#define LUA_ANSI -+#endif -+ -+ -+#if !defined(LUA_ANSI) && defined(_WIN32) -+#define LUA_WIN -+#endif -+ -+#if defined(LUA_USE_LINUX) -+#define LUA_USE_POSIX -+#define LUA_USE_DLOPEN /* needs an extra library: -ldl */ -+#define LUA_USE_READLINE /* needs some extra libraries */ -+#endif -+ -+#if defined(LUA_USE_MACOSX) -+#define LUA_USE_POSIX -+#define LUA_DL_DYLD /* does not need extra library */ -+#endif -+ -+ -+ -+/* -+@@ LUA_USE_POSIX includes all functionallity listed as X/Open System -+@* Interfaces Extension (XSI). -+** CHANGE it (define it) if your system is XSI compatible. -+*/ -+#if defined(LUA_USE_POSIX) -+#define LUA_USE_MKSTEMP -+#define LUA_USE_ISATTY -+#define LUA_USE_POPEN -+#define LUA_USE_ULONGJMP -+#endif -+ -+ -+/* -+@@ LUA_PATH and LUA_CPATH are the names of the environment variables that -+@* Lua check to set its paths. -+@@ LUA_INIT is the name of the environment variable that Lua -+@* checks for initialization code. -+** CHANGE them if you want different names. -+*/ -+#define LUA_PATH "LUA_PATH" -+#define LUA_CPATH "LUA_CPATH" -+#define LUA_INIT "LUA_INIT" -+ -+ -+/* -+@@ LUA_PATH_DEFAULT is the default path that Lua uses to look for -+@* Lua libraries. -+@@ LUA_CPATH_DEFAULT is the default path that Lua uses to look for -+@* C libraries. -+** CHANGE them if your machine has a non-conventional directory -+** hierarchy or if you want to install your libraries in -+** non-conventional directories. -+*/ -+#if defined(_WIN32) -+/* -+** In Windows, any exclamation mark ('!') in the path is replaced by the -+** path of the directory of the executable file of the current process. -+*/ -+#define LUA_LDIR "!\\lua\\" -+#define LUA_CDIR "!\\" -+#define LUA_PATH_DEFAULT \ -+ ".\\?.lua;" LUA_LDIR"?.lua;" LUA_LDIR"?\\init.lua;" \ -+ LUA_CDIR"?.lua;" LUA_CDIR"?\\init.lua" -+#define LUA_CPATH_DEFAULT \ -+ ".\\?.dll;" LUA_CDIR"?.dll;" LUA_CDIR"loadall.dll" -+ -+#else -+#define LUA_ROOT "/usr/local/" -+#define LUA_LDIR LUA_ROOT "share/lua/5.1/" -+#define LUA_CDIR LUA_ROOT "lib/lua/5.1/" -+#define LUA_PATH_DEFAULT \ -+ "./?.lua;" LUA_LDIR"?.lua;" LUA_LDIR"?/init.lua;" \ -+ LUA_CDIR"?.lua;" LUA_CDIR"?/init.lua" -+#define LUA_CPATH_DEFAULT \ -+ "./?.so;" LUA_CDIR"?.so;" LUA_CDIR"loadall.so" -+#endif -+ -+ -+/* -+@@ LUA_DIRSEP is the directory separator (for submodules). -+** CHANGE it if your machine does not use "/" as the directory separator -+** and is not Windows. (On Windows Lua automatically uses "\".) -+*/ -+#if defined(_WIN32) -+#define LUA_DIRSEP "\\" -+#else -+#define LUA_DIRSEP "/" -+#endif -+ -+ -+/* -+@@ LUA_PATHSEP is the character that separates templates in a path. -+@@ LUA_PATH_MARK is the string that marks the substitution points in a -+@* template. -+@@ LUA_EXECDIR in a Windows path is replaced by the executable's -+@* directory. -+@@ LUA_IGMARK is a mark to ignore all before it when bulding the -+@* luaopen_ function name. -+** CHANGE them if for some reason your system cannot use those -+** characters. (E.g., if one of those characters is a common character -+** in file/directory names.) Probably you do not need to change them. -+*/ -+#define LUA_PATHSEP ";" -+#define LUA_PATH_MARK "?" -+#define LUA_EXECDIR "!" -+#define LUA_IGMARK "-" -+ -+ -+/* -+@@ LUA_INTEGER is the integral type used by lua_pushinteger/lua_tointeger. -+** CHANGE that if ptrdiff_t is not adequate on your machine. (On most -+** machines, ptrdiff_t gives a good choice between int or long.) -+*/ -+#define LUA_INTEGER ptrdiff_t -+ -+ -+/* -+@@ LUA_API is a mark for all core API functions. -+@@ LUALIB_API is a mark for all standard library functions. -+** CHANGE them if you need to define those functions in some special way. -+** For instance, if you want to create one Windows DLL with the core and -+** the libraries, you may want to use the following definition (define -+** LUA_BUILD_AS_DLL to get it). -+*/ -+#if defined(LUA_BUILD_AS_DLL) -+ -+#if defined(LUA_CORE) || defined(LUA_LIB) -+#define LUA_API __declspec(dllexport) -+#else -+#define LUA_API __declspec(dllimport) -+#endif -+ -+#else -+ -+#define LUA_API extern -+ -+#endif -+ -+/* more often than not the libs go together with the core */ -+#define LUALIB_API LUA_API -+ -+ -+/* -+@@ LUAI_FUNC is a mark for all extern functions that are not to be -+@* exported to outside modules. -+@@ LUAI_DATA is a mark for all extern (const) variables that are not to -+@* be exported to outside modules. -+** CHANGE them if you need to mark them in some special way. Elf/gcc -+** (versions 3.2 and later) mark them as "hidden" to optimize access -+** when Lua is compiled as a shared library. -+*/ -+#if defined(luaall_c) -+#define LUAI_FUNC static -+#define LUAI_DATA /* empty */ -+ -+#elif defined(__GNUC__) && ((__GNUC__*100 + __GNUC_MINOR__) >= 302) && \ -+ defined(__ELF__) -+#define LUAI_FUNC __attribute__((visibility("hidden"))) extern -+#define LUAI_DATA LUAI_FUNC -+ -+#else -+#define LUAI_FUNC extern -+#define LUAI_DATA extern -+#endif -+ -+ -+ -+/* -+@@ LUA_QL describes how error messages quote program elements. -+** CHANGE it if you want a different appearance. -+*/ -+#define LUA_QL(x) "'" x "'" -+#define LUA_QS LUA_QL("%s") -+ -+ -+/* -+@@ LUA_IDSIZE gives the maximum size for the description of the source -+@* of a function in debug information. -+** CHANGE it if you want a different size. -+*/ -+#define LUA_IDSIZE 60 -+ -+ -+/* -+** {================================================================== -+** Stand-alone configuration -+** =================================================================== -+*/ -+ -+#if defined(lua_c) || defined(luaall_c) -+ -+/* -+@@ lua_stdin_is_tty detects whether the standard input is a 'tty' (that -+@* is, whether we're running lua interactively). -+** CHANGE it if you have a better definition for non-POSIX/non-Windows -+** systems. -+*/ -+#if defined(LUA_USE_ISATTY) -+#include -+#define lua_stdin_is_tty() isatty(0) -+#elif defined(LUA_WIN) -+#include -+#include -+#define lua_stdin_is_tty() _isatty(_fileno(stdin)) -+#else -+#define lua_stdin_is_tty() 1 /* assume stdin is a tty */ -+#endif -+ -+ -+/* -+@@ LUA_PROMPT is the default prompt used by stand-alone Lua. -+@@ LUA_PROMPT2 is the default continuation prompt used by stand-alone Lua. -+** CHANGE them if you want different prompts. (You can also change the -+** prompts dynamically, assigning to globals _PROMPT/_PROMPT2.) -+*/ -+#define LUA_PROMPT "> " -+#define LUA_PROMPT2 ">> " -+ -+ -+/* -+@@ LUA_PROGNAME is the default name for the stand-alone Lua program. -+** CHANGE it if your stand-alone interpreter has a different name and -+** your system is not able to detect that name automatically. -+*/ -+#define LUA_PROGNAME "lua" -+ -+ -+/* -+@@ LUA_MAXINPUT is the maximum length for an input line in the -+@* stand-alone interpreter. -+** CHANGE it if you need longer lines. -+*/ -+#define LUA_MAXINPUT 512 -+ -+ -+/* -+@@ lua_readline defines how to show a prompt and then read a line from -+@* the standard input. -+@@ lua_saveline defines how to "save" a read line in a "history". -+@@ lua_freeline defines how to free a line read by lua_readline. -+** CHANGE them if you want to improve this functionality (e.g., by using -+** GNU readline and history facilities). -+*/ -+#if defined(LUA_USE_READLINE) -+#include -+#include -+#include -+#define lua_readline(L,b,p) ((void)L, ((b)=readline(p)) != NULL) -+#define lua_saveline(L,idx) \ -+ if (lua_strlen(L,idx) > 0) /* non-empty line? */ \ -+ add_history(lua_tostring(L, idx)); /* add it to history */ -+#define lua_freeline(L,b) ((void)L, free(b)) -+#else -+#define lua_readline(L,b,p) \ -+ ((void)L, fputs(p, stdout), fflush(stdout), /* show prompt */ \ -+ fgets(b, LUA_MAXINPUT, stdin) != NULL) /* get line */ -+#define lua_saveline(L,idx) { (void)L; (void)idx; } -+#define lua_freeline(L,b) { (void)L; (void)b; } -+#endif -+ -+#endif -+ -+/* }================================================================== */ -+ -+ -+/* -+@@ LUAI_GCPAUSE defines the default pause between garbage-collector cycles -+@* as a percentage. -+** CHANGE it if you want the GC to run faster or slower (higher values -+** mean larger pauses which mean slower collection.) You can also change -+** this value dynamically. -+*/ -+#define LUAI_GCPAUSE 200 /* 200% (wait memory to double before next GC) */ -+ -+ -+/* -+@@ LUAI_GCMUL defines the default speed of garbage collection relative to -+@* memory allocation as a percentage. -+** CHANGE it if you want to change the granularity of the garbage -+** collection. (Higher values mean coarser collections. 0 represents -+** infinity, where each step performs a full collection.) You can also -+** change this value dynamically. -+*/ -+#define LUAI_GCMUL 200 /* GC runs 'twice the speed' of memory allocation */ -+ -+ -+ -+/* -+@@ LUA_COMPAT_GETN controls compatibility with old getn behavior. -+** CHANGE it (define it) if you want exact compatibility with the -+** behavior of setn/getn in Lua 5.0. -+*/ -+#undef LUA_COMPAT_GETN -+ -+/* -+@@ LUA_COMPAT_LOADLIB controls compatibility about global loadlib. -+** CHANGE it to undefined as soon as you do not need a global 'loadlib' -+** function (the function is still available as 'package.loadlib'). -+*/ -+#undef LUA_COMPAT_LOADLIB -+ -+/* -+@@ LUA_COMPAT_VARARG controls compatibility with old vararg feature. -+** CHANGE it to undefined as soon as your programs use only '...' to -+** access vararg parameters (instead of the old 'arg' table). -+*/ -+#define LUA_COMPAT_VARARG -+ -+/* -+@@ LUA_COMPAT_MOD controls compatibility with old math.mod function. -+** CHANGE it to undefined as soon as your programs use 'math.fmod' or -+** the new '%' operator instead of 'math.mod'. -+*/ -+#define LUA_COMPAT_MOD -+ -+/* -+@@ LUA_COMPAT_LSTR controls compatibility with old long string nesting -+@* facility. -+** CHANGE it to 2 if you want the old behaviour, or undefine it to turn -+** off the advisory error when nesting [[...]]. -+*/ -+#define LUA_COMPAT_LSTR 1 -+ -+/* -+@@ LUA_COMPAT_GFIND controls compatibility with old 'string.gfind' name. -+** CHANGE it to undefined as soon as you rename 'string.gfind' to -+** 'string.gmatch'. -+*/ -+#define LUA_COMPAT_GFIND -+ -+/* -+@@ LUA_COMPAT_OPENLIB controls compatibility with old 'luaL_openlib' -+@* behavior. -+** CHANGE it to undefined as soon as you replace to 'luaL_register' -+** your uses of 'luaL_openlib' -+*/ -+#define LUA_COMPAT_OPENLIB -+ -+ -+ -+/* -+@@ luai_apicheck is the assert macro used by the Lua-C API. -+** CHANGE luai_apicheck if you want Lua to perform some checks in the -+** parameters it gets from API calls. This may slow down the interpreter -+** a bit, but may be quite useful when debugging C code that interfaces -+** with Lua. A useful redefinition is to use assert.h. -+*/ -+#if defined(LUA_USE_APICHECK) -+#include -+#define luai_apicheck(L,o) { (void)L; assert(o); } -+#else -+#define luai_apicheck(L,o) { (void)L; } -+#endif -+ -+ -+/* -+@@ LUAI_BITSINT defines the number of bits in an int. -+** CHANGE here if Lua cannot automatically detect the number of bits of -+** your machine. Probably you do not need to change this. -+*/ -+/* avoid overflows in comparison */ -+#if !defined(__KERNEL__) -+#include -+#define LUA_INT_MAX INT_MAX -+#else -+#define LUA_INT_MAX (~0U>>1) -+#endif -+ -+#if LUA_INT_MAX-20 < 32760 -+#define LUAI_BITSINT 16 -+#elif LUA_INT_MAX > 2147483640L -+/* int has at least 32 bits */ -+#define LUAI_BITSINT 32 -+#else -+#error "you must define LUA_BITSINT with number of bits in an integer" -+#endif -+ -+ -+/* -+@@ LUAI_UINT32 is an unsigned integer with at least 32 bits. -+@@ LUAI_INT32 is an signed integer with at least 32 bits. -+@@ LUAI_UMEM is an unsigned integer big enough to count the total -+@* memory used by Lua. -+@@ LUAI_MEM is a signed integer big enough to count the total memory -+@* used by Lua. -+** CHANGE here if for some weird reason the default definitions are not -+** good enough for your machine. (The definitions in the 'else' -+** part always works, but may waste space on machines with 64-bit -+** longs.) Probably you do not need to change this. -+*/ -+#if LUAI_BITSINT >= 32 -+#define LUAI_UINT32 unsigned int -+#define LUAI_INT32 int -+#define LUAI_MAXINT32 INT_MAX -+#define LUAI_UMEM size_t -+#define LUAI_MEM ptrdiff_t -+#else -+/* 16-bit ints */ -+#define LUAI_UINT32 unsigned long -+#define LUAI_INT32 long -+#define LUAI_MAXINT32 LONG_MAX -+#define LUAI_UMEM unsigned long -+#define LUAI_MEM long -+#endif -+ -+ -+/* -+@@ LUAI_MAXCALLS limits the number of nested calls. -+** CHANGE it if you need really deep recursive calls. This limit is -+** arbitrary; its only purpose is to stop infinite recursion before -+** exhausting memory. -+*/ -+#define LUAI_MAXCALLS 20000 -+ -+ -+/* -+@@ LUAI_MAXCSTACK limits the number of Lua stack slots that a C function -+@* can use. -+** CHANGE it if you need lots of (Lua) stack space for your C -+** functions. This limit is arbitrary; its only purpose is to stop C -+** functions to consume unlimited stack space. (must be smaller than -+** -LUA_REGISTRYINDEX) -+*/ -+#define LUAI_MAXCSTACK 8000 -+ -+ -+ -+/* -+** {================================================================== -+** CHANGE (to smaller values) the following definitions if your system -+** has a small C stack. (Or you may want to change them to larger -+** values if your system has a large C stack and these limits are -+** too rigid for you.) Some of these constants control the size of -+** stack-allocated arrays used by the compiler or the interpreter, while -+** others limit the maximum number of recursive calls that the compiler -+** or the interpreter can perform. Values too large may cause a C stack -+** overflow for some forms of deep constructs. -+** =================================================================== -+*/ -+ -+ -+/* -+@@ LUAI_MAXCCALLS is the maximum depth for nested C calls (short) and -+@* syntactical nested non-terminals in a program. -+*/ -+#define LUAI_MAXCCALLS 200 -+ -+ -+/* -+@@ LUAI_MAXVARS is the maximum number of local variables per function -+@* (must be smaller than 250). -+*/ -+#define LUAI_MAXVARS 200 -+ -+ -+/* -+@@ LUAI_MAXUPVALUES is the maximum number of upvalues per function -+@* (must be smaller than 250). -+*/ -+#define LUAI_MAXUPVALUES 60 -+ -+ -+/* -+@@ LUAL_BUFFERSIZE is the buffer size used by the lauxlib buffer system. -+*/ -+#define LUAL_BUFFERSIZE BUFSIZ -+ -+/* }================================================================== */ -+ -+ -+ -+ -+/* -+** {================================================================== -+@@ LUA_NUMBER is the type of numbers in Lua. -+** CHANGE the following definitions only if you want to build Lua -+** with a number type different from double. You may also need to -+** change lua_number2int & lua_number2integer. -+** =================================================================== -+*/ -+#if !defined(NO_FPU) -+#define LUA_NUMBER_DOUBLE -+#define LUA_NUMBER double -+#else -+#define LUA_NUMBER long -+#endif -+ -+/* -+@@ LUAI_UACNUMBER is the result of an 'usual argument conversion' -+@* over a number. -+*/ -+#define LUAI_UACNUMBER LUA_NUMBER -+ -+ -+/* -+@@ LUA_NUMBER_SCAN is the format for reading numbers. -+@@ LUA_NUMBER_FMT is the format for writing numbers. -+@@ lua_number2str converts a number to a string. -+@@ LUAI_MAXNUMBER2STR is maximum size of previous conversion. -+@@ lua_str2number converts a string to a number. -+*/ -+#if !defined(NO_FPU) -+#define LUA_NUMBER_SCAN "%lf" -+#define LUA_NUMBER_FMT "%.14g" -+#define lua_str2number(s,p) strtod((s), (p)) -+#else -+#define LUA_NUMBER_SCAN "%ld" -+#define LUA_NUMBER_FMT "%ld" -+#if !defined(__KERNEL__) -+#define lua_str2number(s,p) strtol((s), (p), 10) -+#else -+#define lua_str2number(s,p) simple_strtol((s), (p), 10) -+#endif -+#endif -+ -+#define LUAI_MAXNUMBER2STR 32 /* 16 digits, sign, point, and \0 */ -+#define lua_number2str(s,n) sprintf((s), LUA_NUMBER_FMT, (n)) -+ -+/* -+@@ The luai_num* macros define the primitive operations over numbers. -+*/ -+#if defined(LUA_CORE) -+#define luai_numadd(a,b) ((a)+(b)) -+#define luai_numsub(a,b) ((a)-(b)) -+#define luai_nummul(a,b) ((a)*(b)) -+#define luai_numdiv(a,b) ((a)/(b)) -+#define luai_numunm(a) (-(a)) -+#define luai_numeq(a,b) ((a)==(b)) -+#define luai_numlt(a,b) ((a)<(b)) -+#define luai_numle(a,b) ((a)<=(b)) -+#define luai_numisnan(a) (!luai_numeq((a), (a))) -+#if !defined(NO_FPU) -+#include -+#define luai_nummod(a,b) ((a) - floor((a)/(b))*(b)) -+#define luai_numpow(a,b) (pow(a,b)) -+#else -+#define luai_nummod(a,b) ((a)%(b)) -+#define luai_numpow(a,b) luai_nummul(a,b) -+#endif -+#endif -+ -+ -+/* -+@@ lua_number2int is a macro to convert lua_Number to int. -+@@ lua_number2integer is a macro to convert lua_Number to lua_Integer. -+** CHANGE them if you know a faster way to convert a lua_Number to -+** int (with any rounding method and without throwing errors) in your -+** system. In Pentium machines, a naive typecast from double to int -+** in C is extremely slow, so any alternative is worth trying. -+*/ -+ -+/* On a Pentium, resort to a trick */ -+#if defined(LUA_NUMBER_DOUBLE) && !defined(LUA_ANSI) && !defined(__SSE2__) && \ -+ (defined(__i386) || defined (_M_IX86) || defined(__i386__)) -+ -+/* On a Microsoft compiler, use assembler */ -+#if defined(_MSC_VER) -+ -+#define lua_number2int(i,d) __asm fld d __asm fistp i -+#define lua_number2integer(i,n) lua_number2int(i, n) -+ -+/* the next trick should work on any Pentium, but sometimes clashes -+ with a DirectX idiosyncrasy */ -+#else -+ -+union luai_Cast { double l_d; long l_l; }; -+#define lua_number2int(i,d) \ -+ { volatile union luai_Cast u; u.l_d = (d) + 6755399441055744.0; (i) = u.l_l; } -+#define lua_number2integer(i,n) lua_number2int(i, n) -+ -+#endif -+ -+ -+/* this option always works, but may be slow */ -+#else -+#define lua_number2int(i,d) ((i)=(int)(d)) -+#define lua_number2integer(i,d) ((i)=(lua_Integer)(d)) -+ -+#endif -+ -+/* }================================================================== */ -+ -+ -+/* -+@@ LUAI_USER_ALIGNMENT_T is a type that requires maximum alignment. -+** CHANGE it if your system requires alignments larger than double. (For -+** instance, if your system supports long doubles and they must be -+** aligned in 16-byte boundaries, then you should add long double in the -+** union.) Probably you do not need to change this. -+*/ -+#define LUAI_USER_ALIGNMENT_T union { double u; void *s; long l; } -+ -+ -+/* -+@@ LUAI_THROW/LUAI_TRY define how Lua does exception handling. -+** CHANGE them if you prefer to use longjmp/setjmp even with C++ -+** or if want/don't to use _longjmp/_setjmp instead of regular -+** longjmp/setjmp. By default, Lua handles errors with exceptions when -+** compiling as C++ code, with _longjmp/_setjmp when asked to use them, -+** and with longjmp/setjmp otherwise. -+*/ -+#if defined(__KERNEL__) -+#undef LUA_USE_ULONGJMP -+#endif -+ -+#if defined(__cplusplus) -+/* C++ exceptions */ -+#define LUAI_THROW(L,c) throw(c) -+#define LUAI_TRY(L,c,a) try { a } catch(...) \ -+ { if ((c)->status == 0) (c)->status = -1; } -+#define luai_jmpbuf int /* dummy variable */ -+ -+#elif defined(LUA_USE_ULONGJMP) -+/* in Unix, try _longjmp/_setjmp (more efficient) */ -+#define LUAI_THROW(L,c) _longjmp((c)->b, 1) -+#define LUAI_TRY(L,c,a) if (_setjmp((c)->b) == 0) { a } -+#define luai_jmpbuf jmp_buf -+ -+#else -+/* default handling with long jumps */ -+#define LUAI_THROW(L,c) longjmp((c)->b, 1) -+#define LUAI_TRY(L,c,a) if (setjmp((c)->b) == 0) { a } -+#define luai_jmpbuf jmp_buf -+ -+#endif -+ -+ -+/* -+@@ LUA_MAXCAPTURES is the maximum number of captures that a pattern -+@* can do during pattern-matching. -+** CHANGE it if you need more captures. This limit is arbitrary. -+*/ -+#define LUA_MAXCAPTURES 32 -+ -+ -+/* -+@@ lua_tmpnam is the function that the OS library uses to create a -+@* temporary name. -+@@ LUA_TMPNAMBUFSIZE is the maximum size of a name created by lua_tmpnam. -+** CHANGE them if you have an alternative to tmpnam (which is considered -+** insecure) or if you want the original tmpnam anyway. By default, Lua -+** uses tmpnam except when POSIX is available, where it uses mkstemp. -+*/ -+#if defined(loslib_c) || defined(luaall_c) -+ -+#if defined(LUA_USE_MKSTEMP) -+#include -+#define LUA_TMPNAMBUFSIZE 32 -+#define lua_tmpnam(b,e) { \ -+ strcpy(b, "/tmp/lua_XXXXXX"); \ -+ e = mkstemp(b); \ -+ if (e != -1) close(e); \ -+ e = (e == -1); } -+ -+#else -+#define LUA_TMPNAMBUFSIZE L_tmpnam -+#define lua_tmpnam(b,e) { e = (tmpnam(b) == NULL); } -+#endif -+ -+#endif -+ -+ -+/* -+@@ lua_popen spawns a new process connected to the current one through -+@* the file streams. -+** CHANGE it if you have a way to implement it in your system. -+*/ -+#if defined(LUA_USE_POPEN) -+ -+#define lua_popen(L,c,m) ((void)L, fflush(NULL), popen(c,m)) -+#define lua_pclose(L,file) ((void)L, (pclose(file) != -1)) -+ -+#elif defined(LUA_WIN) -+ -+#define lua_popen(L,c,m) ((void)L, _popen(c,m)) -+#define lua_pclose(L,file) ((void)L, (_pclose(file) != -1)) -+ -+#else -+ -+#define lua_popen(L,c,m) ((void)((void)c, m), \ -+ luaL_error(L, LUA_QL("popen") " not supported"), (FILE*)0) -+#define lua_pclose(L,file) ((void)((void)L, file), 0) -+ -+#endif -+ -+/* -+@@ LUA_DL_* define which dynamic-library system Lua should use. -+** CHANGE here if Lua has problems choosing the appropriate -+** dynamic-library system for your platform (either Windows' DLL, Mac's -+** dyld, or Unix's dlopen). If your system is some kind of Unix, there -+** is a good chance that it has dlopen, so LUA_DL_DLOPEN will work for -+** it. To use dlopen you also need to adapt the src/Makefile (probably -+** adding -ldl to the linker options), so Lua does not select it -+** automatically. (When you change the makefile to add -ldl, you must -+** also add -DLUA_USE_DLOPEN.) -+** If you do not want any kind of dynamic library, undefine all these -+** options. -+** By default, _WIN32 gets LUA_DL_DLL and MAC OS X gets LUA_DL_DYLD. -+*/ -+#if defined(LUA_USE_DLOPEN) -+#define LUA_DL_DLOPEN -+#endif -+ -+#if defined(LUA_WIN) -+#define LUA_DL_DLL -+#endif -+ -+ -+/* -+@@ LUAI_EXTRASPACE allows you to add user-specific data in a lua_State -+@* (the data goes just *before* the lua_State pointer). -+** CHANGE (define) this if you really need that. This value must be -+** a multiple of the maximum alignment required for your machine. -+*/ -+#define LUAI_EXTRASPACE 0 -+ -+ -+/* -+@@ luai_userstate* allow user-specific actions on threads. -+** CHANGE them if you defined LUAI_EXTRASPACE and need to do something -+** extra when a thread is created/deleted/resumed/yielded. -+*/ -+#define luai_userstateopen(L) ((void)L) -+#define luai_userstateclose(L) ((void)L) -+#define luai_userstatethread(L,L1) ((void)L) -+#define luai_userstatefree(L) ((void)L) -+#define luai_userstateresume(L,n) ((void)L) -+#define luai_userstateyield(L,n) ((void)L) -+ -+ -+/* -+@@ LUA_INTFRMLEN is the length modifier for integer conversions -+@* in 'string.format'. -+@@ LUA_INTFRM_T is the integer type correspoding to the previous length -+@* modifier. -+** CHANGE them if your system supports long long or does not support long. -+*/ -+ -+#if defined(LUA_USELONGLONG) -+ -+#define LUA_INTFRMLEN "ll" -+#define LUA_INTFRM_T long long -+ -+#else -+ -+#define LUA_INTFRMLEN "l" -+#define LUA_INTFRM_T long -+ -+#endif -+ -+/* =================================================================== */ -+ -+/* -+** Local configuration. You can use this space to add your redefinitions -+** without modifying the main part of the file. -+*/ -+ -+ -+ -+#endif -+ ---- /dev/null -+++ b/extensions/LUA/lua/lua.h -@@ -0,0 +1,387 @@ -+/* -+** $Id: lua.h,v 1.218.1.5 2008/08/06 13:30:12 roberto Exp $ -+** Lua - An Extensible Extension Language -+** Lua.org, PUC-Rio, Brazil (http://www.lua.org) -+** See Copyright Notice at the end of this file -+*/ -+ -+ -+#ifndef lua_h -+#define lua_h -+ -+#include -+#include -+ -+#include "luaconf.h" -+ -+ -+#define LUA_VERSION "Lua 5.1" -+#define LUA_RELEASE "Lua 5.1.4" -+#define LUA_VERSION_NUM 501 -+#define LUA_COPYRIGHT "Copyright (C) 1994-2008 Lua.org, PUC-Rio" -+#define LUA_AUTHORS "R. Ierusalimschy, L. H. de Figueiredo & W. Celes" -+ -+ -+/* mark for precompiled code (`Lua') */ -+#define LUA_SIGNATURE "\033Lua" -+ -+/* option for multiple returns in `lua_pcall' and `lua_call' */ -+#define LUA_MULTRET (-1) -+ -+ -+/* -+** pseudo-indices -+*/ -+#define LUA_REGISTRYINDEX (-10000) -+#define LUA_ENVIRONINDEX (-10001) -+#define LUA_GLOBALSINDEX (-10002) -+#define lua_upvalueindex(i) (LUA_GLOBALSINDEX-(i)) -+ -+ -+/* thread status; 0 is OK */ -+#define LUA_YIELD 1 -+#define LUA_ERRRUN 2 -+#define LUA_ERRSYNTAX 3 -+#define LUA_ERRMEM 4 -+#define LUA_ERRERR 5 -+ -+ -+typedef struct lua_State lua_State; -+ -+typedef int (*lua_CFunction) (lua_State *L); -+ -+ -+/* -+** functions that read/write blocks when loading/dumping Lua chunks -+*/ -+typedef const char * (*lua_Reader) (lua_State *L, void *ud, size_t *sz); -+ -+typedef int (*lua_Writer) (lua_State *L, const void* p, size_t sz, void* ud); -+ -+ -+/* -+** prototype for memory-allocation functions -+*/ -+typedef void * (*lua_Alloc) (void *ud, void *ptr, size_t osize, size_t nsize); -+ -+ -+/* -+** basic types -+*/ -+#define LUA_TNONE (-1) -+ -+#define LUA_TNIL 0 -+#define LUA_TBOOLEAN 1 -+#define LUA_TLIGHTUSERDATA 2 -+#define LUA_TNUMBER 3 -+#define LUA_TSTRING 4 -+#define LUA_TTABLE 5 -+#define LUA_TFUNCTION 6 -+#define LUA_TUSERDATA 7 -+#define LUA_TTHREAD 8 -+ -+ -+ -+/* minimum Lua stack available to a C function */ -+#define LUA_MINSTACK 20 -+ -+ -+/* -+** generic extra include file -+*/ -+#if defined(LUA_USER_H) -+#include LUA_USER_H -+#endif -+ -+ -+/* type of numbers in Lua */ -+typedef LUA_NUMBER lua_Number; -+ -+ -+/* type for integer functions */ -+typedef LUA_INTEGER lua_Integer; -+ -+ -+ -+/* -+** state manipulation -+*/ -+LUA_API lua_State *(lua_newstate) (lua_Alloc f, void *ud); -+LUA_API void (lua_close) (lua_State *L); -+LUA_API lua_State *(lua_newthread) (lua_State *L); -+ -+LUA_API lua_CFunction (lua_atpanic) (lua_State *L, lua_CFunction panicf); -+ -+ -+/* -+** basic stack manipulation -+*/ -+LUA_API int (lua_gettop) (lua_State *L); -+LUA_API void (lua_settop) (lua_State *L, int idx); -+LUA_API void (lua_pushvalue) (lua_State *L, int idx); -+LUA_API void (lua_remove) (lua_State *L, int idx); -+LUA_API void (lua_insert) (lua_State *L, int idx); -+LUA_API void (lua_replace) (lua_State *L, int idx); -+LUA_API int (lua_checkstack) (lua_State *L, int sz); -+ -+LUA_API void (lua_xmove) (lua_State *from, lua_State *to, int n); -+ -+ -+/* -+** access functions (stack -> C) -+*/ -+ -+LUA_API int (lua_isnumber) (lua_State *L, int idx); -+LUA_API int (lua_isstring) (lua_State *L, int idx); -+LUA_API int (lua_iscfunction) (lua_State *L, int idx); -+LUA_API int (lua_isuserdata) (lua_State *L, int idx); -+LUA_API int (lua_type) (lua_State *L, int idx); -+LUA_API const char *(lua_typename) (lua_State *L, int tp); -+ -+LUA_API int (lua_equal) (lua_State *L, int idx1, int idx2); -+LUA_API int (lua_rawequal) (lua_State *L, int idx1, int idx2); -+LUA_API int (lua_lessthan) (lua_State *L, int idx1, int idx2); -+ -+LUA_API lua_Number (lua_tonumber) (lua_State *L, int idx); -+LUA_API lua_Integer (lua_tointeger) (lua_State *L, int idx); -+LUA_API int (lua_toboolean) (lua_State *L, int idx); -+LUA_API const char *(lua_tolstring) (lua_State *L, int idx, size_t *len); -+LUA_API size_t (lua_objlen) (lua_State *L, int idx); -+LUA_API lua_CFunction (lua_tocfunction) (lua_State *L, int idx); -+LUA_API void *(lua_touserdata) (lua_State *L, int idx); -+LUA_API lua_State *(lua_tothread) (lua_State *L, int idx); -+LUA_API const void *(lua_topointer) (lua_State *L, int idx); -+ -+ -+/* -+** push functions (C -> stack) -+*/ -+LUA_API void (lua_pushnil) (lua_State *L); -+LUA_API void (lua_pushnumber) (lua_State *L, lua_Number n); -+LUA_API void (lua_pushinteger) (lua_State *L, lua_Integer n); -+LUA_API void (lua_pushlstring) (lua_State *L, const char *s, size_t l); -+LUA_API void (lua_pushstring) (lua_State *L, const char *s); -+LUA_API const char *(lua_pushvfstring) (lua_State *L, const char *fmt, -+ va_list argp); -+LUA_API const char *(lua_pushfstring) (lua_State *L, const char *fmt, ...); -+LUA_API void (lua_pushcclosure) (lua_State *L, lua_CFunction fn, int n); -+LUA_API void (lua_pushboolean) (lua_State *L, int b); -+LUA_API void (lua_pushlightuserdata) (lua_State *L, void *p); -+LUA_API int (lua_pushthread) (lua_State *L); -+ -+ -+/* -+** get functions (Lua -> stack) -+*/ -+LUA_API void (lua_gettable) (lua_State *L, int idx); -+LUA_API void (lua_getfield) (lua_State *L, int idx, const char *k); -+LUA_API void (lua_rawget) (lua_State *L, int idx); -+LUA_API void (lua_rawgeti) (lua_State *L, int idx, int n); -+LUA_API void (lua_createtable) (lua_State *L, int narr, int nrec); -+LUA_API void *(lua_newuserdata) (lua_State *L, size_t sz); -+LUA_API int (lua_getmetatable) (lua_State *L, int objindex); -+LUA_API void (lua_getfenv) (lua_State *L, int idx); -+ -+ -+/* -+** set functions (stack -> Lua) -+*/ -+LUA_API void (lua_settable) (lua_State *L, int idx); -+LUA_API void (lua_setfield) (lua_State *L, int idx, const char *k); -+LUA_API void (lua_rawset) (lua_State *L, int idx); -+LUA_API void (lua_rawseti) (lua_State *L, int idx, int n); -+LUA_API int (lua_setmetatable) (lua_State *L, int objindex); -+LUA_API int (lua_setfenv) (lua_State *L, int idx); -+ -+ -+/* -+** `load' and `call' functions (load and run Lua code) -+*/ -+LUA_API void (lua_call) (lua_State *L, int nargs, int nresults); -+LUA_API int (lua_pcall) (lua_State *L, int nargs, int nresults, int errfunc); -+LUA_API int (lua_cpcall) (lua_State *L, lua_CFunction func, void *ud); -+LUA_API int (lua_load) (lua_State *L, lua_Reader reader, void *dt, -+ const char *chunkname); -+ -+LUA_API int (lua_dump) (lua_State *L, lua_Writer writer, void *data); -+ -+ -+/* -+** coroutine functions -+*/ -+LUA_API int (lua_yield) (lua_State *L, int nresults); -+LUA_API int (lua_resume) (lua_State *L, int narg); -+LUA_API int (lua_status) (lua_State *L); -+ -+/* -+** garbage-collection function and options -+*/ -+ -+#define LUA_GCSTOP 0 -+#define LUA_GCRESTART 1 -+#define LUA_GCCOLLECT 2 -+#define LUA_GCCOUNT 3 -+#define LUA_GCCOUNTB 4 -+#define LUA_GCSTEP 5 -+#define LUA_GCSETPAUSE 6 -+#define LUA_GCSETSTEPMUL 7 -+ -+LUA_API int (lua_gc) (lua_State *L, int what, int data); -+ -+ -+/* -+** miscellaneous functions -+*/ -+ -+LUA_API int (lua_error) (lua_State *L); -+ -+LUA_API int (lua_next) (lua_State *L, int idx); -+ -+LUA_API void (lua_concat) (lua_State *L, int n); -+ -+LUA_API lua_Alloc (lua_getallocf) (lua_State *L, void **ud); -+LUA_API void lua_setallocf (lua_State *L, lua_Alloc f, void *ud); -+ -+ -+ -+/* -+** =============================================================== -+** some useful macros -+** =============================================================== -+*/ -+ -+#define lua_pop(L,n) lua_settop(L, -(n)-1) -+ -+#define lua_newtable(L) lua_createtable(L, 0, 0) -+ -+#define lua_register(L,n,f) (lua_pushcfunction(L, (f)), lua_setglobal(L, (n))) -+ -+#define lua_pushcfunction(L,f) lua_pushcclosure(L, (f), 0) -+ -+#define lua_strlen(L,i) lua_objlen(L, (i)) -+ -+#define lua_isfunction(L,n) (lua_type(L, (n)) == LUA_TFUNCTION) -+#define lua_istable(L,n) (lua_type(L, (n)) == LUA_TTABLE) -+#define lua_islightuserdata(L,n) (lua_type(L, (n)) == LUA_TLIGHTUSERDATA) -+#define lua_isnil(L,n) (lua_type(L, (n)) == LUA_TNIL) -+#define lua_isboolean(L,n) (lua_type(L, (n)) == LUA_TBOOLEAN) -+#define lua_isthread(L,n) (lua_type(L, (n)) == LUA_TTHREAD) -+#define lua_isnone(L,n) (lua_type(L, (n)) == LUA_TNONE) -+#define lua_isnoneornil(L, n) (lua_type(L, (n)) <= 0) -+ -+#define lua_pushliteral(L, s) \ -+ lua_pushlstring(L, "" s, (sizeof(s)/sizeof(char))-1) -+ -+#define lua_setglobal(L,s) lua_setfield(L, LUA_GLOBALSINDEX, (s)) -+#define lua_getglobal(L,s) lua_getfield(L, LUA_GLOBALSINDEX, (s)) -+ -+#define lua_tostring(L,i) lua_tolstring(L, (i), NULL) -+ -+ -+ -+/* -+** compatibility macros and functions -+*/ -+ -+#define lua_open() luaL_newstate() -+ -+#define lua_getregistry(L) lua_pushvalue(L, LUA_REGISTRYINDEX) -+ -+#define lua_getgccount(L) lua_gc(L, LUA_GCCOUNT, 0) -+ -+#define lua_Chunkreader lua_Reader -+#define lua_Chunkwriter lua_Writer -+ -+ -+/* hack */ -+LUA_API void lua_setlevel (lua_State *from, lua_State *to); -+ -+ -+/* -+** {====================================================================== -+** Debug API -+** ======================================================================= -+*/ -+ -+ -+/* -+** Event codes -+*/ -+#define LUA_HOOKCALL 0 -+#define LUA_HOOKRET 1 -+#define LUA_HOOKLINE 2 -+#define LUA_HOOKCOUNT 3 -+#define LUA_HOOKTAILRET 4 -+ -+ -+/* -+** Event masks -+*/ -+#define LUA_MASKCALL (1 << LUA_HOOKCALL) -+#define LUA_MASKRET (1 << LUA_HOOKRET) -+#define LUA_MASKLINE (1 << LUA_HOOKLINE) -+#define LUA_MASKCOUNT (1 << LUA_HOOKCOUNT) -+ -+typedef struct lua_Debug lua_Debug; /* activation record */ -+ -+ -+/* Functions to be called by the debuger in specific events */ -+typedef void (*lua_Hook) (lua_State *L, lua_Debug *ar); -+ -+ -+LUA_API int lua_getstack (lua_State *L, int level, lua_Debug *ar); -+LUA_API int lua_getinfo (lua_State *L, const char *what, lua_Debug *ar); -+LUA_API const char *lua_getlocal (lua_State *L, const lua_Debug *ar, int n); -+LUA_API const char *lua_setlocal (lua_State *L, const lua_Debug *ar, int n); -+LUA_API const char *lua_getupvalue (lua_State *L, int funcindex, int n); -+LUA_API const char *lua_setupvalue (lua_State *L, int funcindex, int n); -+ -+LUA_API int lua_sethook (lua_State *L, lua_Hook func, int mask, int count); -+LUA_API lua_Hook lua_gethook (lua_State *L); -+LUA_API int lua_gethookmask (lua_State *L); -+LUA_API int lua_gethookcount (lua_State *L); -+ -+ -+struct lua_Debug { -+ int event; -+ const char *name; /* (n) */ -+ const char *namewhat; /* (n) `global', `local', `field', `method' */ -+ const char *what; /* (S) `Lua', `C', `main', `tail' */ -+ const char *source; /* (S) */ -+ int currentline; /* (l) */ -+ int nups; /* (u) number of upvalues */ -+ int linedefined; /* (S) */ -+ int lastlinedefined; /* (S) */ -+ char short_src[LUA_IDSIZE]; /* (S) */ -+ /* private part */ -+ int i_ci; /* active function */ -+}; -+ -+/* }====================================================================== */ -+ -+ -+/****************************************************************************** -+* Copyright (C) 1994-2008 Lua.org, PUC-Rio. All rights reserved. -+* -+* Permission is hereby granted, free of charge, to any person obtaining -+* a copy of this software and associated documentation files (the -+* "Software"), to deal in the Software without restriction, including -+* without limitation the rights to use, copy, modify, merge, publish, -+* distribute, sublicense, and/or sell copies of the Software, and to -+* permit persons to whom the Software is furnished to do so, subject to -+* the following conditions: -+* -+* The above copyright notice and this permission notice shall be -+* included in all copies or substantial portions of the Software. -+* -+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -+* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -+* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY -+* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -+* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -+* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. -+******************************************************************************/ -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lualib.h -@@ -0,0 +1,55 @@ -+/* -+** $Id: lualib.h,v 1.36.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Lua standard libraries -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#ifndef lualib_h -+#define lualib_h -+ -+#include "lua.h" -+ -+ -+/* Key to file-handle type */ -+#define LUA_FILEHANDLE "FILE*" -+ -+ -+#define LUA_COLIBNAME "coroutine" -+LUALIB_API int (luaopen_base) (lua_State *L); -+ -+#define LUA_TABLIBNAME "table" -+LUALIB_API int (luaopen_table) (lua_State *L); -+/* -+#define LUA_IOLIBNAME "io" -+LUALIB_API int (luaopen_io) (lua_State *L); -+ -+#define LUA_OSLIBNAME "os" -+LUALIB_API int (luaopen_os) (lua_State *L); -+*/ -+ -+#define LUA_STRLIBNAME "string" -+LUALIB_API int (luaopen_string) (lua_State *L); -+ -+/* -+#define LUA_MATHLIBNAME "math" -+LUALIB_API int (luaopen_math) (lua_State *L); -+ -+#define LUA_DBLIBNAME "debug" -+LUALIB_API int (luaopen_debug) (lua_State *L); -+ -+#define LUA_LOADLIBNAME "package" -+LUALIB_API int (luaopen_package) (lua_State *L); -+*/ -+ -+/* open all previous libraries */ -+LUALIB_API void (luaL_openlibs) (lua_State *L); -+ -+ -+ -+#ifndef lua_assert -+#define lua_assert(x) ((void)0) -+#endif -+ -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lundump.c -@@ -0,0 +1,227 @@ -+/* -+** $Id: lundump.c,v 2.7.1.4 2008/04/04 19:51:41 roberto Exp $ -+** load precompiled Lua chunks -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#define lundump_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "lmem.h" -+#include "lobject.h" -+#include "lstring.h" -+#include "lundump.h" -+#include "lzio.h" -+ -+typedef struct { -+ lua_State* L; -+ ZIO* Z; -+ Mbuffer* b; -+ const char* name; -+} LoadState; -+ -+#ifdef LUAC_TRUST_BINARIES -+#define IF(c,s) -+#define error(S,s) -+#else -+#define IF(c,s) if (c) error(S,s) -+ -+static void error(LoadState* S, const char* why) -+{ -+ luaO_pushfstring(S->L,"%s: %s in precompiled chunk",S->name,why); -+ luaD_throw(S->L,LUA_ERRSYNTAX); -+} -+#endif -+ -+#define LoadMem(S,b,n,size) LoadBlock(S,b,(n)*(size)) -+#define LoadByte(S) (lu_byte)LoadChar(S) -+#define LoadVar(S,x) LoadMem(S,&x,1,sizeof(x)) -+#define LoadVector(S,b,n,size) LoadMem(S,b,n,size) -+ -+static void LoadBlock(LoadState* S, void* b, size_t size) -+{ -+ size_t r=luaZ_read(S->Z,b,size); -+ IF (r!=0, "unexpected end"); -+} -+ -+static int LoadChar(LoadState* S) -+{ -+ char x; -+ LoadVar(S,x); -+ return x; -+} -+ -+static int LoadInt(LoadState* S) -+{ -+ int x; -+ LoadVar(S,x); -+ IF (x<0, "bad integer"); -+ return x; -+} -+ -+static lua_Number LoadNumber(LoadState* S) -+{ -+ lua_Number x; -+ LoadVar(S,x); -+ return x; -+} -+ -+static TString* LoadString(LoadState* S) -+{ -+ size_t size; -+ LoadVar(S,size); -+ if (size==0) -+ return NULL; -+ else -+ { -+ char* s=luaZ_openspace(S->L,S->b,size); -+ LoadBlock(S,s,size); -+ return luaS_newlstr(S->L,s,size-1); /* remove trailing '\0' */ -+ } -+} -+ -+static void LoadCode(LoadState* S, Proto* f) -+{ -+ int n=LoadInt(S); -+ f->code=luaM_newvector(S->L,n,Instruction); -+ f->sizecode=n; -+ LoadVector(S,f->code,n,sizeof(Instruction)); -+} -+ -+static Proto* LoadFunction(LoadState* S, TString* p); -+ -+static void LoadConstants(LoadState* S, Proto* f) -+{ -+ int i,n; -+ n=LoadInt(S); -+ f->k=luaM_newvector(S->L,n,TValue); -+ f->sizek=n; -+ for (i=0; ik[i]); -+ for (i=0; ik[i]; -+ int t=LoadChar(S); -+ switch (t) -+ { -+ case LUA_TNIL: -+ setnilvalue(o); -+ break; -+ case LUA_TBOOLEAN: -+ setbvalue(o,LoadChar(S)!=0); -+ break; -+ case LUA_TNUMBER: -+ setnvalue(o,LoadNumber(S)); -+ break; -+ case LUA_TSTRING: -+ setsvalue2n(S->L,o,LoadString(S)); -+ break; -+ default: -+ error(S,"bad constant"); -+ break; -+ } -+ } -+ n=LoadInt(S); -+ f->p=luaM_newvector(S->L,n,Proto*); -+ f->sizep=n; -+ for (i=0; ip[i]=NULL; -+ for (i=0; ip[i]=LoadFunction(S,f->source); -+} -+ -+static void LoadDebug(LoadState* S, Proto* f) -+{ -+ int i,n; -+ n=LoadInt(S); -+ f->lineinfo=luaM_newvector(S->L,n,int); -+ f->sizelineinfo=n; -+ LoadVector(S,f->lineinfo,n,sizeof(int)); -+ n=LoadInt(S); -+ f->locvars=luaM_newvector(S->L,n,LocVar); -+ f->sizelocvars=n; -+ for (i=0; ilocvars[i].varname=NULL; -+ for (i=0; ilocvars[i].varname=LoadString(S); -+ f->locvars[i].startpc=LoadInt(S); -+ f->locvars[i].endpc=LoadInt(S); -+ } -+ n=LoadInt(S); -+ f->upvalues=luaM_newvector(S->L,n,TString*); -+ f->sizeupvalues=n; -+ for (i=0; iupvalues[i]=NULL; -+ for (i=0; iupvalues[i]=LoadString(S); -+} -+ -+static Proto* LoadFunction(LoadState* S, TString* p) -+{ -+ Proto* f; -+ if (++S->L->nCcalls > LUAI_MAXCCALLS) error(S,"code too deep"); -+ f=luaF_newproto(S->L); -+ setptvalue2s(S->L,S->L->top,f); incr_top(S->L); -+ f->source=LoadString(S); if (f->source==NULL) f->source=p; -+ f->linedefined=LoadInt(S); -+ f->lastlinedefined=LoadInt(S); -+ f->nups=LoadByte(S); -+ f->numparams=LoadByte(S); -+ f->is_vararg=LoadByte(S); -+ f->maxstacksize=LoadByte(S); -+ LoadCode(S,f); -+ LoadConstants(S,f); -+ LoadDebug(S,f); -+ IF (!luaG_checkcode(f), "bad code"); -+ S->L->top--; -+ S->L->nCcalls--; -+ return f; -+} -+ -+static void LoadHeader(LoadState* S) -+{ -+ char h[LUAC_HEADERSIZE]; -+ char s[LUAC_HEADERSIZE]; -+ luaU_header(h); -+ LoadBlock(S,s,LUAC_HEADERSIZE); -+ IF (memcmp(h,s,LUAC_HEADERSIZE)!=0, "bad header"); -+} -+ -+/* -+** load precompiled chunk -+*/ -+Proto* luaU_undump (lua_State* L, ZIO* Z, Mbuffer* buff, const char* name) -+{ -+ LoadState S; -+ if (*name=='@' || *name=='=') -+ S.name=name+1; -+ else if (*name==LUA_SIGNATURE[0]) -+ S.name="binary string"; -+ else -+ S.name=name; -+ S.L=L; -+ S.Z=Z; -+ S.b=buff; -+ LoadHeader(&S); -+ return LoadFunction(&S,luaS_newliteral(L,"=?")); -+} -+ -+/* -+* make header -+*/ -+void luaU_header (char* h) -+{ -+ int x=1; -+ memcpy(h,LUA_SIGNATURE,sizeof(LUA_SIGNATURE)-1); -+ h+=sizeof(LUA_SIGNATURE)-1; -+ *h++=(char)LUAC_VERSION; -+ *h++=(char)LUAC_FORMAT; -+ *h++=(char)*(char*)&x; /* endianness */ -+ *h++=(char)sizeof(int); -+ *h++=(char)sizeof(size_t); -+ *h++=(char)sizeof(Instruction); -+ *h++=(char)sizeof(lua_Number); -+ *h++=(char)(((lua_Number)0.5)==0); /* is lua_Number integral? */ -+} ---- /dev/null -+++ b/extensions/LUA/lua/lundump.h -@@ -0,0 +1,36 @@ -+/* -+** $Id: lundump.h,v 1.37.1.1 2007/12/27 13:02:25 roberto Exp $ -+** load precompiled Lua chunks -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lundump_h -+#define lundump_h -+ -+#include "lobject.h" -+#include "lzio.h" -+ -+/* load one chunk; from lundump.c */ -+LUAI_FUNC Proto* luaU_undump (lua_State* L, ZIO* Z, Mbuffer* buff, const char* name); -+ -+/* make header; from lundump.c */ -+LUAI_FUNC void luaU_header (char* h); -+ -+/* dump one chunk; from ldump.c */ -+LUAI_FUNC int luaU_dump (lua_State* L, const Proto* f, lua_Writer w, void* data, int strip); -+ -+#ifdef luac_c -+/* print one chunk; from print.c */ -+LUAI_FUNC void luaU_print (const Proto* f, int full); -+#endif -+ -+/* for header of binary files -- this is Lua 5.1 */ -+#define LUAC_VERSION 0x51 -+ -+/* for header of binary files -- this is the official format */ -+#define LUAC_FORMAT 0 -+ -+/* size of header of binary files */ -+#define LUAC_HEADERSIZE 12 -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lvm.c -@@ -0,0 +1,762 @@ -+/* -+** $Id: lvm.c,v 2.63.1.3 2007/12/28 15:32:23 roberto Exp $ -+** Lua virtual machine -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+#include -+#include -+ -+#define lvm_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "ldebug.h" -+#include "ldo.h" -+#include "lfunc.h" -+#include "lgc.h" -+#include "lobject.h" -+#include "lopcodes.h" -+#include "lstate.h" -+#include "lstring.h" -+#include "ltable.h" -+#include "ltm.h" -+#include "lvm.h" -+ -+ -+ -+/* limit for table tag-method chains (to avoid loops) */ -+#define MAXTAGLOOP 100 -+ -+ -+const TValue *luaV_tonumber (const TValue *obj, TValue *n) { -+ lua_Number num; -+ if (ttisnumber(obj)) return obj; -+ if (ttisstring(obj) && luaO_str2d(svalue(obj), &num)) { -+ setnvalue(n, num); -+ return n; -+ } -+ else -+ return NULL; -+} -+ -+ -+int luaV_tostring (lua_State *L, StkId obj) { -+ if (!ttisnumber(obj)) -+ return 0; -+ else { -+ char s[LUAI_MAXNUMBER2STR]; -+ lua_Number n = nvalue(obj); -+ lua_number2str(s, n); -+ setsvalue2s(L, obj, luaS_new(L, s)); -+ return 1; -+ } -+} -+ -+ -+static void traceexec (lua_State *L, const Instruction *pc) { -+ lu_byte mask = L->hookmask; -+ const Instruction *oldpc = L->savedpc; -+ L->savedpc = pc; -+ if ((mask & LUA_MASKCOUNT) && L->hookcount == 0) { -+ resethookcount(L); -+ luaD_callhook(L, LUA_HOOKCOUNT, -1); -+ } -+ if (mask & LUA_MASKLINE) { -+ Proto *p = ci_func(L->ci)->l.p; -+ int npc = pcRel(pc, p); -+ int newline = getline(p, npc); -+ /* call linehook when enter a new function, when jump back (loop), -+ or when enter a new line */ -+ if (npc == 0 || pc <= oldpc || newline != getline(p, pcRel(oldpc, p))) -+ luaD_callhook(L, LUA_HOOKLINE, newline); -+ } -+} -+ -+ -+static void callTMres (lua_State *L, StkId res, const TValue *f, -+ const TValue *p1, const TValue *p2) { -+ ptrdiff_t result = savestack(L, res); -+ setobj2s(L, L->top, f); /* push function */ -+ setobj2s(L, L->top+1, p1); /* 1st argument */ -+ setobj2s(L, L->top+2, p2); /* 2nd argument */ -+ luaD_checkstack(L, 3); -+ L->top += 3; -+ luaD_call(L, L->top - 3, 1); -+ res = restorestack(L, result); -+ L->top--; -+ setobjs2s(L, res, L->top); -+} -+ -+ -+ -+static void callTM (lua_State *L, const TValue *f, const TValue *p1, -+ const TValue *p2, const TValue *p3) { -+ setobj2s(L, L->top, f); /* push function */ -+ setobj2s(L, L->top+1, p1); /* 1st argument */ -+ setobj2s(L, L->top+2, p2); /* 2nd argument */ -+ setobj2s(L, L->top+3, p3); /* 3th argument */ -+ luaD_checkstack(L, 4); -+ L->top += 4; -+ luaD_call(L, L->top - 4, 0); -+} -+ -+ -+void luaV_gettable (lua_State *L, const TValue *t, TValue *key, StkId val) { -+ int loop; -+ for (loop = 0; loop < MAXTAGLOOP; loop++) { -+ const TValue *tm; -+ if (ttistable(t)) { /* `t' is a table? */ -+ Table *h = hvalue(t); -+ const TValue *res = luaH_get(h, key); /* do a primitive get */ -+ if (!ttisnil(res) || /* result is no nil? */ -+ (tm = fasttm(L, h->metatable, TM_INDEX)) == NULL) { /* or no TM? */ -+ setobj2s(L, val, res); -+ return; -+ } -+ /* else will try the tag method */ -+ } -+ else if (ttisnil(tm = luaT_gettmbyobj(L, t, TM_INDEX))) -+ luaG_typeerror(L, t, "index"); -+ if (ttisfunction(tm)) { -+ callTMres(L, val, tm, t, key); -+ return; -+ } -+ t = tm; /* else repeat with `tm' */ -+ } -+ luaG_runerror(L, "loop in gettable"); -+} -+ -+ -+void luaV_settable (lua_State *L, const TValue *t, TValue *key, StkId val) { -+ int loop; -+ for (loop = 0; loop < MAXTAGLOOP; loop++) { -+ const TValue *tm; -+ if (ttistable(t)) { /* `t' is a table? */ -+ Table *h = hvalue(t); -+ TValue *oldval = luaH_set(L, h, key); /* do a primitive set */ -+ if (!ttisnil(oldval) || /* result is no nil? */ -+ (tm = fasttm(L, h->metatable, TM_NEWINDEX)) == NULL) { /* or no TM? */ -+ setobj2t(L, oldval, val); -+ luaC_barriert(L, h, val); -+ return; -+ } -+ /* else will try the tag method */ -+ } -+ else if (ttisnil(tm = luaT_gettmbyobj(L, t, TM_NEWINDEX))) -+ luaG_typeerror(L, t, "index"); -+ if (ttisfunction(tm)) { -+ callTM(L, tm, t, key, val); -+ return; -+ } -+ t = tm; /* else repeat with `tm' */ -+ } -+ luaG_runerror(L, "loop in settable"); -+} -+ -+ -+static int call_binTM (lua_State *L, const TValue *p1, const TValue *p2, -+ StkId res, TMS event) { -+ const TValue *tm = luaT_gettmbyobj(L, p1, event); /* try first operand */ -+ if (ttisnil(tm)) -+ tm = luaT_gettmbyobj(L, p2, event); /* try second operand */ -+ if (ttisnil(tm)) return 0; -+ callTMres(L, res, tm, p1, p2); -+ return 1; -+} -+ -+ -+static const TValue *get_compTM (lua_State *L, Table *mt1, Table *mt2, -+ TMS event) { -+ const TValue *tm1 = fasttm(L, mt1, event); -+ const TValue *tm2; -+ if (tm1 == NULL) return NULL; /* no metamethod */ -+ if (mt1 == mt2) return tm1; /* same metatables => same metamethods */ -+ tm2 = fasttm(L, mt2, event); -+ if (tm2 == NULL) return NULL; /* no metamethod */ -+ if (luaO_rawequalObj(tm1, tm2)) /* same metamethods? */ -+ return tm1; -+ return NULL; -+} -+ -+ -+static int call_orderTM (lua_State *L, const TValue *p1, const TValue *p2, -+ TMS event) { -+ const TValue *tm1 = luaT_gettmbyobj(L, p1, event); -+ const TValue *tm2; -+ if (ttisnil(tm1)) return -1; /* no metamethod? */ -+ tm2 = luaT_gettmbyobj(L, p2, event); -+ if (!luaO_rawequalObj(tm1, tm2)) /* different metamethods? */ -+ return -1; -+ callTMres(L, L->top, tm1, p1, p2); -+ return !l_isfalse(L->top); -+} -+ -+ -+static int l_strcmp (const TString *ls, const TString *rs) { -+ const char *l = getstr(ls); -+ size_t ll = ls->tsv.len; -+ const char *r = getstr(rs); -+ size_t lr = rs->tsv.len; -+ for (;;) { -+ int temp = strcoll(l, r); -+ if (temp != 0) return temp; -+ else { /* strings are equal up to a `\0' */ -+ size_t len = strlen(l); /* index of first `\0' in both strings */ -+ if (len == lr) /* r is finished? */ -+ return (len == ll) ? 0 : 1; -+ else if (len == ll) /* l is finished? */ -+ return -1; /* l is smaller than r (because r is not finished) */ -+ /* both strings longer than `len'; go on comparing (after the `\0') */ -+ len++; -+ l += len; ll -= len; r += len; lr -= len; -+ } -+ } -+} -+ -+ -+int luaV_lessthan (lua_State *L, const TValue *l, const TValue *r) { -+ int res; -+ if (ttype(l) != ttype(r)) -+ return luaG_ordererror(L, l, r); -+ else if (ttisnumber(l)) -+ return luai_numlt(nvalue(l), nvalue(r)); -+ else if (ttisstring(l)) -+ return l_strcmp(rawtsvalue(l), rawtsvalue(r)) < 0; -+ else if ((res = call_orderTM(L, l, r, TM_LT)) != -1) -+ return res; -+ return luaG_ordererror(L, l, r); -+} -+ -+ -+static int lessequal (lua_State *L, const TValue *l, const TValue *r) { -+ int res; -+ if (ttype(l) != ttype(r)) -+ return luaG_ordererror(L, l, r); -+ else if (ttisnumber(l)) -+ return luai_numle(nvalue(l), nvalue(r)); -+ else if (ttisstring(l)) -+ return l_strcmp(rawtsvalue(l), rawtsvalue(r)) <= 0; -+ else if ((res = call_orderTM(L, l, r, TM_LE)) != -1) /* first try `le' */ -+ return res; -+ else if ((res = call_orderTM(L, r, l, TM_LT)) != -1) /* else try `lt' */ -+ return !res; -+ return luaG_ordererror(L, l, r); -+} -+ -+ -+int luaV_equalval (lua_State *L, const TValue *t1, const TValue *t2) { -+ const TValue *tm; -+ lua_assert(ttype(t1) == ttype(t2)); -+ switch (ttype(t1)) { -+ case LUA_TNIL: return 1; -+ case LUA_TNUMBER: return luai_numeq(nvalue(t1), nvalue(t2)); -+ case LUA_TBOOLEAN: return bvalue(t1) == bvalue(t2); /* true must be 1 !! */ -+ case LUA_TLIGHTUSERDATA: return pvalue(t1) == pvalue(t2); -+ case LUA_TUSERDATA: { -+ if (uvalue(t1) == uvalue(t2)) return 1; -+ tm = get_compTM(L, uvalue(t1)->metatable, uvalue(t2)->metatable, -+ TM_EQ); -+ break; /* will try TM */ -+ } -+ case LUA_TTABLE: { -+ if (hvalue(t1) == hvalue(t2)) return 1; -+ tm = get_compTM(L, hvalue(t1)->metatable, hvalue(t2)->metatable, TM_EQ); -+ break; /* will try TM */ -+ } -+ default: return gcvalue(t1) == gcvalue(t2); -+ } -+ if (tm == NULL) return 0; /* no TM? */ -+ callTMres(L, L->top, tm, t1, t2); /* call TM */ -+ return !l_isfalse(L->top); -+} -+ -+ -+void luaV_concat (lua_State *L, int total, int last) { -+ do { -+ StkId top = L->base + last + 1; -+ int n = 2; /* number of elements handled in this pass (at least 2) */ -+ if (!(ttisstring(top-2) || ttisnumber(top-2)) || !tostring(L, top-1)) { -+ if (!call_binTM(L, top-2, top-1, top-2, TM_CONCAT)) -+ luaG_concaterror(L, top-2, top-1); -+ } else if (tsvalue(top-1)->len == 0) /* second op is empty? */ -+ (void)tostring(L, top - 2); /* result is first op (as string) */ -+ else { -+ /* at least two string values; get as many as possible */ -+ size_t tl = tsvalue(top-1)->len; -+ char *buffer; -+ int i; -+ /* collect total length */ -+ for (n = 1; n < total && tostring(L, top-n-1); n++) { -+ size_t l = tsvalue(top-n-1)->len; -+ if (l >= MAX_SIZET - tl) luaG_runerror(L, "string length overflow"); -+ tl += l; -+ } -+ buffer = luaZ_openspace(L, &G(L)->buff, tl); -+ tl = 0; -+ for (i=n; i>0; i--) { /* concat all strings */ -+ size_t l = tsvalue(top-i)->len; -+ memcpy(buffer+tl, svalue(top-i), l); -+ tl += l; -+ } -+ setsvalue2s(L, top-n, luaS_newlstr(L, buffer, tl)); -+ } -+ total -= n-1; /* got `n' strings to create 1 new */ -+ last -= n-1; -+ } while (total > 1); /* repeat until only 1 result left */ -+} -+ -+ -+static void Arith (lua_State *L, StkId ra, const TValue *rb, -+ const TValue *rc, TMS op) { -+ TValue tempb, tempc; -+ const TValue *b, *c; -+ if ((b = luaV_tonumber(rb, &tempb)) != NULL && -+ (c = luaV_tonumber(rc, &tempc)) != NULL) { -+ lua_Number nb = nvalue(b), nc = nvalue(c); -+ switch (op) { -+ case TM_ADD: setnvalue(ra, luai_numadd(nb, nc)); break; -+ case TM_SUB: setnvalue(ra, luai_numsub(nb, nc)); break; -+ case TM_MUL: setnvalue(ra, luai_nummul(nb, nc)); break; -+ case TM_DIV: setnvalue(ra, luai_numdiv(nb, nc)); break; -+ case TM_MOD: setnvalue(ra, luai_nummod(nb, nc)); break; -+ case TM_POW: setnvalue(ra, luai_numpow(nb, nc)); break; -+ case TM_UNM: setnvalue(ra, luai_numunm(nb)); break; -+ default: lua_assert(0); break; -+ } -+ } -+ else if (!call_binTM(L, rb, rc, ra, op)) -+ luaG_aritherror(L, rb, rc); -+} -+ -+ -+ -+/* -+** some macros for common tasks in `luaV_execute' -+*/ -+ -+#define runtime_check(L, c) { if (!(c)) break; } -+ -+#define RA(i) (base+GETARG_A(i)) -+/* to be used after possible stack reallocation */ -+#define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) -+#define RC(i) check_exp(getCMode(GET_OPCODE(i)) == OpArgR, base+GETARG_C(i)) -+#define RKB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgK, \ -+ ISK(GETARG_B(i)) ? k+INDEXK(GETARG_B(i)) : base+GETARG_B(i)) -+#define RKC(i) check_exp(getCMode(GET_OPCODE(i)) == OpArgK, \ -+ ISK(GETARG_C(i)) ? k+INDEXK(GETARG_C(i)) : base+GETARG_C(i)) -+#define KBx(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgK, k+GETARG_Bx(i)) -+ -+ -+#define dojump(L,pc,i) {(pc) += (i); luai_threadyield(L);} -+ -+ -+#define Protect(x) { L->savedpc = pc; {x;}; base = L->base; } -+ -+ -+#define arith_op(op,tm) { \ -+ TValue *rb = RKB(i); \ -+ TValue *rc = RKC(i); \ -+ if (ttisnumber(rb) && ttisnumber(rc)) { \ -+ lua_Number nb = nvalue(rb), nc = nvalue(rc); \ -+ setnvalue(ra, op(nb, nc)); \ -+ } \ -+ else \ -+ Protect(Arith(L, ra, rb, rc, tm)); \ -+ } -+ -+ -+ -+void luaV_execute (lua_State *L, int nexeccalls) { -+ LClosure *cl; -+ StkId base; -+ TValue *k; -+ const Instruction *pc; -+ reentry: /* entry point */ -+ lua_assert(isLua(L->ci)); -+ pc = L->savedpc; -+ cl = &clvalue(L->ci->func)->l; -+ base = L->base; -+ k = cl->p->k; -+ /* main loop of interpreter */ -+ for (;;) { -+ const Instruction i = *pc++; -+ StkId ra; -+ if ((L->hookmask & (LUA_MASKLINE | LUA_MASKCOUNT)) && -+ (--L->hookcount == 0 || L->hookmask & LUA_MASKLINE)) { -+ traceexec(L, pc); -+ if (L->status == LUA_YIELD) { /* did hook yield? */ -+ L->savedpc = pc - 1; -+ return; -+ } -+ base = L->base; -+ } -+ /* warning!! several calls may realloc the stack and invalidate `ra' */ -+ ra = RA(i); -+ lua_assert(base == L->base && L->base == L->ci->base); -+ lua_assert(base <= L->top && L->top <= L->stack + L->stacksize); -+ lua_assert(L->top == L->ci->top || luaG_checkopenop(i)); -+ switch (GET_OPCODE(i)) { -+ case OP_MOVE: { -+ setobjs2s(L, ra, RB(i)); -+ continue; -+ } -+ case OP_LOADK: { -+ setobj2s(L, ra, KBx(i)); -+ continue; -+ } -+ case OP_LOADBOOL: { -+ setbvalue(ra, GETARG_B(i)); -+ if (GETARG_C(i)) pc++; /* skip next instruction (if C) */ -+ continue; -+ } -+ case OP_LOADNIL: { -+ TValue *rb = RB(i); -+ do { -+ setnilvalue(rb--); -+ } while (rb >= ra); -+ continue; -+ } -+ case OP_GETUPVAL: { -+ int b = GETARG_B(i); -+ setobj2s(L, ra, cl->upvals[b]->v); -+ continue; -+ } -+ case OP_GETGLOBAL: { -+ TValue g; -+ TValue *rb = KBx(i); -+ sethvalue(L, &g, cl->env); -+ lua_assert(ttisstring(rb)); -+ Protect(luaV_gettable(L, &g, rb, ra)); -+ continue; -+ } -+ case OP_GETTABLE: { -+ Protect(luaV_gettable(L, RB(i), RKC(i), ra)); -+ continue; -+ } -+ case OP_SETGLOBAL: { -+ TValue g; -+ sethvalue(L, &g, cl->env); -+ lua_assert(ttisstring(KBx(i))); -+ Protect(luaV_settable(L, &g, KBx(i), ra)); -+ continue; -+ } -+ case OP_SETUPVAL: { -+ UpVal *uv = cl->upvals[GETARG_B(i)]; -+ setobj(L, uv->v, ra); -+ luaC_barrier(L, uv, ra); -+ continue; -+ } -+ case OP_SETTABLE: { -+ Protect(luaV_settable(L, ra, RKB(i), RKC(i))); -+ continue; -+ } -+ case OP_NEWTABLE: { -+ int b = GETARG_B(i); -+ int c = GETARG_C(i); -+ sethvalue(L, ra, luaH_new(L, luaO_fb2int(b), luaO_fb2int(c))); -+ Protect(luaC_checkGC(L)); -+ continue; -+ } -+ case OP_SELF: { -+ StkId rb = RB(i); -+ setobjs2s(L, ra+1, rb); -+ Protect(luaV_gettable(L, rb, RKC(i), ra)); -+ continue; -+ } -+ case OP_ADD: { -+ arith_op(luai_numadd, TM_ADD); -+ continue; -+ } -+ case OP_SUB: { -+ arith_op(luai_numsub, TM_SUB); -+ continue; -+ } -+ case OP_MUL: { -+ arith_op(luai_nummul, TM_MUL); -+ continue; -+ } -+ case OP_DIV: { -+ arith_op(luai_numdiv, TM_DIV); -+ continue; -+ } -+ case OP_MOD: { -+ arith_op(luai_nummod, TM_MOD); -+ continue; -+ } -+ case OP_POW: { -+ arith_op(luai_numpow, TM_POW); -+ continue; -+ } -+ case OP_UNM: { -+ TValue *rb = RB(i); -+ if (ttisnumber(rb)) { -+ lua_Number nb = nvalue(rb); -+ setnvalue(ra, luai_numunm(nb)); -+ } -+ else { -+ Protect(Arith(L, ra, rb, rb, TM_UNM)); -+ } -+ continue; -+ } -+ case OP_NOT: { -+ int res = l_isfalse(RB(i)); /* next assignment may change this value */ -+ setbvalue(ra, res); -+ continue; -+ } -+ case OP_LEN: { -+ const TValue *rb = RB(i); -+ switch (ttype(rb)) { -+ case LUA_TTABLE: { -+ setnvalue(ra, cast_num(luaH_getn(hvalue(rb)))); -+ break; -+ } -+ case LUA_TSTRING: { -+ setnvalue(ra, cast_num(tsvalue(rb)->len)); -+ break; -+ } -+ default: { /* try metamethod */ -+ Protect( -+ if (!call_binTM(L, rb, luaO_nilobject, ra, TM_LEN)) -+ luaG_typeerror(L, rb, "get length of"); -+ ) -+ } -+ } -+ continue; -+ } -+ case OP_CONCAT: { -+ int b = GETARG_B(i); -+ int c = GETARG_C(i); -+ Protect(luaV_concat(L, c-b+1, c); luaC_checkGC(L)); -+ setobjs2s(L, RA(i), base+b); -+ continue; -+ } -+ case OP_JMP: { -+ dojump(L, pc, GETARG_sBx(i)); -+ continue; -+ } -+ case OP_EQ: { -+ TValue *rb = RKB(i); -+ TValue *rc = RKC(i); -+ Protect( -+ if (equalobj(L, rb, rc) == GETARG_A(i)) -+ dojump(L, pc, GETARG_sBx(*pc)); -+ ) -+ pc++; -+ continue; -+ } -+ case OP_LT: { -+ Protect( -+ if (luaV_lessthan(L, RKB(i), RKC(i)) == GETARG_A(i)) -+ dojump(L, pc, GETARG_sBx(*pc)); -+ ) -+ pc++; -+ continue; -+ } -+ case OP_LE: { -+ Protect( -+ if (lessequal(L, RKB(i), RKC(i)) == GETARG_A(i)) -+ dojump(L, pc, GETARG_sBx(*pc)); -+ ) -+ pc++; -+ continue; -+ } -+ case OP_TEST: { -+ if (l_isfalse(ra) != GETARG_C(i)) -+ dojump(L, pc, GETARG_sBx(*pc)); -+ pc++; -+ continue; -+ } -+ case OP_TESTSET: { -+ TValue *rb = RB(i); -+ if (l_isfalse(rb) != GETARG_C(i)) { -+ setobjs2s(L, ra, rb); -+ dojump(L, pc, GETARG_sBx(*pc)); -+ } -+ pc++; -+ continue; -+ } -+ case OP_CALL: { -+ int b = GETARG_B(i); -+ int nresults = GETARG_C(i) - 1; -+ if (b != 0) L->top = ra+b; /* else previous instruction set top */ -+ L->savedpc = pc; -+ switch (luaD_precall(L, ra, nresults)) { -+ case PCRLUA: { -+ nexeccalls++; -+ goto reentry; /* restart luaV_execute over new Lua function */ -+ } -+ case PCRC: { -+ /* it was a C function (`precall' called it); adjust results */ -+ if (nresults >= 0) L->top = L->ci->top; -+ base = L->base; -+ continue; -+ } -+ default: { -+ return; /* yield */ -+ } -+ } -+ } -+ case OP_TAILCALL: { -+ int b = GETARG_B(i); -+ if (b != 0) L->top = ra+b; /* else previous instruction set top */ -+ L->savedpc = pc; -+ lua_assert(GETARG_C(i) - 1 == LUA_MULTRET); -+ switch (luaD_precall(L, ra, LUA_MULTRET)) { -+ case PCRLUA: { -+ /* tail call: put new frame in place of previous one */ -+ CallInfo *ci = L->ci - 1; /* previous frame */ -+ int aux; -+ StkId func = ci->func; -+ StkId pfunc = (ci+1)->func; /* previous function index */ -+ if (L->openupval) luaF_close(L, ci->base); -+ L->base = ci->base = ci->func + ((ci+1)->base - pfunc); -+ for (aux = 0; pfunc+aux < L->top; aux++) /* move frame down */ -+ setobjs2s(L, func+aux, pfunc+aux); -+ ci->top = L->top = func+aux; /* correct top */ -+ lua_assert(L->top == L->base + clvalue(func)->l.p->maxstacksize); -+ ci->savedpc = L->savedpc; -+ ci->tailcalls++; /* one more call lost */ -+ L->ci--; /* remove new frame */ -+ goto reentry; -+ } -+ case PCRC: { /* it was a C function (`precall' called it) */ -+ base = L->base; -+ continue; -+ } -+ default: { -+ return; /* yield */ -+ } -+ } -+ } -+ case OP_RETURN: { -+ int b = GETARG_B(i); -+ if (b != 0) L->top = ra+b-1; -+ if (L->openupval) luaF_close(L, base); -+ L->savedpc = pc; -+ b = luaD_poscall(L, ra); -+ if (--nexeccalls == 0) /* was previous function running `here'? */ -+ return; /* no: return */ -+ else { /* yes: continue its execution */ -+ if (b) L->top = L->ci->top; -+ lua_assert(isLua(L->ci)); -+ lua_assert(GET_OPCODE(*((L->ci)->savedpc - 1)) == OP_CALL); -+ goto reentry; -+ } -+ } -+ case OP_FORLOOP: { -+ lua_Number step = nvalue(ra+2); -+ lua_Number idx = luai_numadd(nvalue(ra), step); /* increment index */ -+ lua_Number limit = nvalue(ra+1); -+ if (luai_numlt(0, step) ? luai_numle(idx, limit) -+ : luai_numle(limit, idx)) { -+ dojump(L, pc, GETARG_sBx(i)); /* jump back */ -+ setnvalue(ra, idx); /* update internal index... */ -+ setnvalue(ra+3, idx); /* ...and external index */ -+ } -+ continue; -+ } -+ case OP_FORPREP: { -+ const TValue *init = ra; -+ const TValue *plimit = ra+1; -+ const TValue *pstep = ra+2; -+ L->savedpc = pc; /* next steps may throw errors */ -+ if (!tonumber(init, ra)) -+ luaG_runerror(L, LUA_QL("for") " initial value must be a number"); -+ else if (!tonumber(plimit, ra+1)) -+ luaG_runerror(L, LUA_QL("for") " limit must be a number"); -+ else if (!tonumber(pstep, ra+2)) -+ luaG_runerror(L, LUA_QL("for") " step must be a number"); -+ setnvalue(ra, luai_numsub(nvalue(ra), nvalue(pstep))); -+ dojump(L, pc, GETARG_sBx(i)); -+ continue; -+ } -+ case OP_TFORLOOP: { -+ StkId cb = ra + 3; /* call base */ -+ setobjs2s(L, cb+2, ra+2); -+ setobjs2s(L, cb+1, ra+1); -+ setobjs2s(L, cb, ra); -+ L->top = cb+3; /* func. + 2 args (state and index) */ -+ Protect(luaD_call(L, cb, GETARG_C(i))); -+ L->top = L->ci->top; -+ cb = RA(i) + 3; /* previous call may change the stack */ -+ if (!ttisnil(cb)) { /* continue loop? */ -+ setobjs2s(L, cb-1, cb); /* save control variable */ -+ dojump(L, pc, GETARG_sBx(*pc)); /* jump back */ -+ } -+ pc++; -+ continue; -+ } -+ case OP_SETLIST: { -+ int n = GETARG_B(i); -+ int c = GETARG_C(i); -+ int last; -+ Table *h; -+ if (n == 0) { -+ n = cast_int(L->top - ra) - 1; -+ L->top = L->ci->top; -+ } -+ if (c == 0) c = cast_int(*pc++); -+ runtime_check(L, ttistable(ra)); -+ h = hvalue(ra); -+ last = ((c-1)*LFIELDS_PER_FLUSH) + n; -+ if (last > h->sizearray) /* needs more space? */ -+ luaH_resizearray(L, h, last); /* pre-alloc it at once */ -+ for (; n > 0; n--) { -+ TValue *val = ra+n; -+ setobj2t(L, luaH_setnum(L, h, last--), val); -+ luaC_barriert(L, h, val); -+ } -+ continue; -+ } -+ case OP_CLOSE: { -+ luaF_close(L, ra); -+ continue; -+ } -+ case OP_CLOSURE: { -+ Proto *p; -+ Closure *ncl; -+ int nup, j; -+ p = cl->p->p[GETARG_Bx(i)]; -+ nup = p->nups; -+ ncl = luaF_newLclosure(L, nup, cl->env); -+ ncl->l.p = p; -+ for (j=0; jl.upvals[j] = cl->upvals[GETARG_B(*pc)]; -+ else { -+ lua_assert(GET_OPCODE(*pc) == OP_MOVE); -+ ncl->l.upvals[j] = luaF_findupval(L, base + GETARG_B(*pc)); -+ } -+ } -+ setclvalue(L, ra, ncl); -+ Protect(luaC_checkGC(L)); -+ continue; -+ } -+ case OP_VARARG: { -+ int b = GETARG_B(i) - 1; -+ int j; -+ CallInfo *ci = L->ci; -+ int n = cast_int(ci->base - ci->func) - cl->p->numparams - 1; -+ if (b == LUA_MULTRET) { -+ Protect(luaD_checkstack(L, n)); -+ ra = RA(i); /* previous call may change the stack */ -+ b = n; -+ L->top = ra + n; -+ } -+ for (j = 0; j < b; j++) { -+ if (j < n) { -+ setobjs2s(L, ra + j, ci->base - n + j); -+ } -+ else { -+ setnilvalue(ra + j); -+ } -+ } -+ continue; -+ } -+ } -+ } -+} -+ ---- /dev/null -+++ b/extensions/LUA/lua/lvm.h -@@ -0,0 +1,36 @@ -+/* -+** $Id: lvm.h,v 2.5.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Lua virtual machine -+** See Copyright Notice in lua.h -+*/ -+ -+#ifndef lvm_h -+#define lvm_h -+ -+ -+#include "ldo.h" -+#include "lobject.h" -+#include "ltm.h" -+ -+ -+#define tostring(L,o) ((ttype(o) == LUA_TSTRING) || (luaV_tostring(L, o))) -+ -+#define tonumber(o,n) (ttype(o) == LUA_TNUMBER || \ -+ (((o) = luaV_tonumber(o,n)) != NULL)) -+ -+#define equalobj(L,o1,o2) \ -+ (ttype(o1) == ttype(o2) && luaV_equalval(L, o1, o2)) -+ -+ -+LUAI_FUNC int luaV_lessthan (lua_State *L, const TValue *l, const TValue *r); -+LUAI_FUNC int luaV_equalval (lua_State *L, const TValue *t1, const TValue *t2); -+LUAI_FUNC const TValue *luaV_tonumber (const TValue *obj, TValue *n); -+LUAI_FUNC int luaV_tostring (lua_State *L, StkId obj); -+LUAI_FUNC void luaV_gettable (lua_State *L, const TValue *t, TValue *key, -+ StkId val); -+LUAI_FUNC void luaV_settable (lua_State *L, const TValue *t, TValue *key, -+ StkId val); -+LUAI_FUNC void luaV_execute (lua_State *L, int nexeccalls); -+LUAI_FUNC void luaV_concat (lua_State *L, int total, int last); -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/lua/lzio.c -@@ -0,0 +1,81 @@ -+/* -+** $Id: lzio.c,v 1.31.1.1 2007/12/27 13:02:25 roberto Exp $ -+** a generic input stream interface -+** See Copyright Notice in lua.h -+*/ -+ -+#include -+ -+#define lzio_c -+#define LUA_CORE -+ -+#include "lua.h" -+ -+#include "llimits.h" -+#include "lmem.h" -+#include "lstate.h" -+#include "lzio.h" -+ -+ -+int luaZ_fill (ZIO *z) { -+ size_t size; -+ lua_State *L = z->L; -+ const char *buff; -+ lua_unlock(L); -+ buff = z->reader(L, z->data, &size); -+ lua_lock(L); -+ if (buff == NULL || size == 0) return EOZ; -+ z->n = size - 1; -+ z->p = buff; -+ return char2int(*(z->p++)); -+} -+ -+ -+int luaZ_lookahead (ZIO *z) { -+ if (z->n == 0) { -+ if (luaZ_fill(z) == EOZ) -+ return EOZ; -+ else { -+ z->n++; /* luaZ_fill removed first byte; put back it */ -+ z->p--; -+ } -+ } -+ return char2int(*z->p); -+} -+ -+ -+void luaZ_init (lua_State *L, ZIO *z, lua_Reader reader, void *data) { -+ z->L = L; -+ z->reader = reader; -+ z->data = data; -+ z->n = 0; -+ z->p = NULL; -+} -+ -+ -+/* --------------------------------------------------------------- read --- */ -+size_t luaZ_read (ZIO *z, void *b, size_t n) { -+ while (n) { -+ size_t m; -+ if (luaZ_lookahead(z) == EOZ) -+ return n; /* return number of missing bytes */ -+ m = (n <= z->n) ? n : z->n; /* min. between n and z->n */ -+ memcpy(b, z->p, m); -+ z->n -= m; -+ z->p += m; -+ b = (char *)b + m; -+ n -= m; -+ } -+ return 0; -+} -+ -+/* ------------------------------------------------------------------------ */ -+char *luaZ_openspace (lua_State *L, Mbuffer *buff, size_t n) { -+ if (n > buff->buffsize) { -+ if (n < LUA_MINBUFFER) n = LUA_MINBUFFER; -+ luaZ_resizebuffer(L, buff, n); -+ } -+ return buff->buffer; -+} -+ -+ ---- /dev/null -+++ b/extensions/LUA/lua/lzio.h -@@ -0,0 +1,67 @@ -+/* -+** $Id: lzio.h,v 1.21.1.1 2007/12/27 13:02:25 roberto Exp $ -+** Buffered streams -+** See Copyright Notice in lua.h -+*/ -+ -+ -+#ifndef lzio_h -+#define lzio_h -+ -+#include "lua.h" -+ -+#include "lmem.h" -+ -+ -+#define EOZ (-1) /* end of stream */ -+ -+typedef struct Zio ZIO; -+ -+#define char2int(c) cast(int, cast(unsigned char, (c))) -+ -+#define zgetc(z) (((z)->n--)>0 ? char2int(*(z)->p++) : luaZ_fill(z)) -+ -+typedef struct Mbuffer { -+ char *buffer; -+ size_t n; -+ size_t buffsize; -+} Mbuffer; -+ -+#define luaZ_initbuffer(L, buff) ((buff)->buffer = NULL, (buff)->buffsize = 0) -+ -+#define luaZ_buffer(buff) ((buff)->buffer) -+#define luaZ_sizebuffer(buff) ((buff)->buffsize) -+#define luaZ_bufflen(buff) ((buff)->n) -+ -+#define luaZ_resetbuffer(buff) ((buff)->n = 0) -+ -+ -+#define luaZ_resizebuffer(L, buff, size) \ -+ (luaM_reallocvector(L, (buff)->buffer, (buff)->buffsize, size, char), \ -+ (buff)->buffsize = size) -+ -+#define luaZ_freebuffer(L, buff) luaZ_resizebuffer(L, buff, 0) -+ -+ -+LUAI_FUNC char *luaZ_openspace (lua_State *L, Mbuffer *buff, size_t n); -+LUAI_FUNC void luaZ_init (lua_State *L, ZIO *z, lua_Reader reader, -+ void *data); -+LUAI_FUNC size_t luaZ_read (ZIO* z, void* b, size_t n); /* read next n bytes */ -+LUAI_FUNC int luaZ_lookahead (ZIO *z); -+ -+ -+ -+/* --------- Private Part ------------------ */ -+ -+struct Zio { -+ size_t n; /* bytes still unread */ -+ const char *p; /* current position in buffer */ -+ lua_Reader reader; -+ void* data; /* additional data */ -+ lua_State *L; /* Lua state (for reader) */ -+}; -+ -+ -+LUAI_FUNC int luaZ_fill (ZIO *z); -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/Makefile -@@ -0,0 +1,389 @@ -+# Makefile.in generated by automake 1.11.1 from Makefile.am. -+# extensions/LUA/Makefile. Generated from Makefile.in by configure. -+ -+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -+# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, -+# Inc. -+# This Makefile.in is free software; the Free Software Foundation -+# gives unlimited permission to copy and/or distribute it, -+# with or without modifications, as long as this notice is preserved. -+ -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without -+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A -+# PARTICULAR PURPOSE. -+ -+ -+ -+# -*- Makefile -*- -+# AUTOMAKE -+ -+pkgdatadir = $(datadir)/xtables-addons -+pkgincludedir = $(includedir)/xtables-addons -+pkglibdir = $(libdir)/xtables-addons -+pkglibexecdir = $(libexecdir)/xtables-addons -+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd -+install_sh_DATA = $(install_sh) -c -m 644 -+install_sh_PROGRAM = $(install_sh) -c -+install_sh_SCRIPT = $(install_sh) -c -+INSTALL_HEADER = $(INSTALL_DATA) -+transform = $(program_transform_name) -+NORMAL_INSTALL = : -+PRE_INSTALL = : -+POST_INSTALL = : -+NORMAL_UNINSTALL = : -+PRE_UNINSTALL = : -+POST_UNINSTALL = : -+build_triplet = i686-pc-linux-gnu -+host_triplet = i686-pc-linux-gnu -+DIST_COMMON = $(srcdir)/../../Makefile.extra $(srcdir)/Makefile.am \ -+ $(srcdir)/Makefile.in -+subdir = extensions/LUA -+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 -+am__aclocal_m4_deps = $(top_srcdir)/m4/libtool.m4 \ -+ $(top_srcdir)/m4/ltoptions.m4 $(top_srcdir)/m4/ltsugar.m4 \ -+ $(top_srcdir)/m4/ltversion.m4 $(top_srcdir)/m4/lt~obsolete.m4 \ -+ $(top_srcdir)/configure.ac -+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ -+ $(ACLOCAL_M4) -+mkinstalldirs = $(install_sh) -d -+CONFIG_HEADER = $(top_builddir)/config.h -+CONFIG_CLEAN_FILES = -+CONFIG_CLEAN_VPATH_FILES = -+SOURCES = -+DIST_SOURCES = -+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -+ACLOCAL = ${SHELL} /home/andre/Dropbox/xtables-addons/missing --run aclocal-1.11 -+AMTAR = ${SHELL} /home/andre/Dropbox/xtables-addons/missing --run tar -+AR = ar -+AUTOCONF = ${SHELL} /home/andre/Dropbox/xtables-addons/missing --run autoconf -+AUTOHEADER = ${SHELL} /home/andre/Dropbox/xtables-addons/missing --run autoheader -+AUTOMAKE = ${SHELL} /home/andre/Dropbox/xtables-addons/missing --run automake-1.11 -+AWK = mawk -+CC = gcc -+CCDEPMODE = depmode=gcc3 -+CFLAGS = -g -O2 -+CPP = gcc -E -+CPPFLAGS = -+CYGPATH_W = echo -+DEFS = -DHAVE_CONFIG_H -+DEPDIR = .deps -+DSYMUTIL = -+DUMPBIN = -+ECHO_C = -+ECHO_N = -n -+ECHO_T = -+EGREP = /bin/grep -E -+EXEEXT = -+FGREP = /bin/grep -F -+GREP = /bin/grep -+INSTALL = /usr/bin/install -c -+INSTALL_DATA = ${INSTALL} -m 644 -+INSTALL_PROGRAM = ${INSTALL} -+INSTALL_SCRIPT = ${INSTALL} -+INSTALL_STRIP_PROGRAM = $(install_sh) -c -s -+LD = /usr/bin/ld -+LDFLAGS = -+LIBOBJS = -+LIBS = -+LIBTOOL = $(SHELL) $(top_builddir)/libtool -+LIPO = -+LN_S = ln -s -+LTLIBOBJS = -+MAKEINFO = ${SHELL} /home/andre/Dropbox/xtables-addons/missing --run makeinfo -+MKDIR_P = /bin/mkdir -p -+NM = /usr/bin/nm -B -+NMEDIT = -+OBJDUMP = objdump -+OBJEXT = o -+OTOOL = -+OTOOL64 = -+PACKAGE = xtables-addons -+PACKAGE_BUGREPORT = -+PACKAGE_NAME = xtables-addons -+PACKAGE_STRING = xtables-addons 1.21 -+PACKAGE_TARNAME = xtables-addons -+PACKAGE_URL = -+PACKAGE_VERSION = 1.21 -+PATH_SEPARATOR = : -+PKG_CONFIG = /usr/bin/pkg-config -+RANLIB = ranlib -+SED = /bin/sed -+SET_MAKE = -+SHELL = /bin/bash -+STRIP = strip -+VERSION = 1.21 -+abs_builddir = /home/andre/Dropbox/xtables-addons/extensions/LUA -+abs_srcdir = /home/andre/Dropbox/xtables-addons/extensions/LUA -+abs_top_builddir = /home/andre/Dropbox/xtables-addons -+abs_top_srcdir = /home/andre/Dropbox/xtables-addons -+ac_ct_CC = gcc -+ac_ct_DUMPBIN = -+am__include = include -+am__leading_dot = . -+am__quote = -+am__tar = ${AMTAR} chof - "$$tardir" -+am__untar = ${AMTAR} xf - -+bindir = ${exec_prefix}/bin -+build = i686-pc-linux-gnu -+build_alias = -+build_cpu = i686 -+build_os = linux-gnu -+build_vendor = pc -+builddir = . -+datadir = ${datarootdir} -+datarootdir = ${prefix}/share -+docdir = ${datarootdir}/doc/${PACKAGE_TARNAME} -+dvidir = ${docdir} -+exec_prefix = ${prefix} -+host = i686-pc-linux-gnu -+host_alias = -+host_cpu = i686 -+host_os = linux-gnu -+host_vendor = pc -+htmldir = ${docdir} -+includedir = ${prefix}/include -+infodir = ${datarootdir}/info -+install_sh = ${SHELL} /home/andre/Dropbox/xtables-addons/install-sh -+kbuilddir = /lib/modules/2.6.33-020633-generic/build -+kinclude_CFLAGS = -I /lib/modules/2.6.33-020633-generic/build/include -+ksourcedir = -+libdir = ${exec_prefix}/lib -+libexecdir = ${exec_prefix}/libexec -+libxtables_CFLAGS = -+libxtables_LIBS = -L/lib -lxtables -+localedir = ${datarootdir}/locale -+localstatedir = ${prefix}/var -+lt_ECHO = echo -+mandir = ${datarootdir}/man -+mkdir_p = /bin/mkdir -p -+oldincludedir = /usr/include -+pdfdir = ${docdir} -+prefix = /usr/local -+program_transform_name = s,x,x, -+psdir = ${docdir} -+regular_CFLAGS = -D_LARGEFILE_SOURCE=1 -D_LARGE_FILES -D_FILE_OFFSET_BITS=64 -D_REENTRANT -Wall -Waggregate-return -Wmissing-declarations -Wmissing-prototypes -Wredundant-decls -Wshadow -Wstrict-prototypes -Winline -pipe -DXTABLES_LIBDIR=\"${xtlibdir}\" -+sbindir = ${exec_prefix}/sbin -+sharedstatedir = ${prefix}/com -+srcdir = . -+sysconfdir = ${prefix}/etc -+target_alias = -+top_build_prefix = ../../ -+top_builddir = ../.. -+top_srcdir = ../.. -+xtlibdir = ${libexecdir}/xtables -+XA_SRCDIR = ${srcdir} -+XA_TOPSRCDIR = ${top_srcdir} -+XA_ABSTOPSRCDIR = ${abs_top_srcdir} -+_mcall = -f ${top_builddir}/Makefile.iptrules -+all: all-am -+ -+.SUFFIXES: -+$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/../../Makefile.extra $(am__configure_deps) -+ @for dep in $?; do \ -+ case '$(am__configure_deps)' in \ -+ *$$dep*) \ -+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ -+ && { if test -f $@; then exit 0; else break; fi; }; \ -+ exit 1;; \ -+ esac; \ -+ done; \ -+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign extensions/LUA/Makefile'; \ -+ $(am__cd) $(top_srcdir) && \ -+ $(AUTOMAKE) --foreign extensions/LUA/Makefile -+.PRECIOUS: Makefile -+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status -+ @case '$?' in \ -+ *config.status*) \ -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ -+ *) \ -+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ -+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ -+ esac; -+ -+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh -+ -+$(top_srcdir)/configure: $(am__configure_deps) -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh -+$(ACLOCAL_M4): $(am__aclocal_m4_deps) -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh -+$(am__aclocal_m4_deps): -+ -+mostlyclean-libtool: -+ -rm -f *.lo -+ -+clean-libtool: -+ -rm -rf .libs _libs -+tags: TAGS -+TAGS: -+ -+ctags: CTAGS -+CTAGS: -+ -+ -+distdir: $(DISTFILES) -+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ -+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ -+ list='$(DISTFILES)'; \ -+ dist_files=`for file in $$list; do echo $$file; done | \ -+ sed -e "s|^$$srcdirstrip/||;t" \ -+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ -+ case $$dist_files in \ -+ */*) $(MKDIR_P) `echo "$$dist_files" | \ -+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ -+ sort -u` ;; \ -+ esac; \ -+ for file in $$dist_files; do \ -+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ -+ if test -d $$d/$$file; then \ -+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ -+ if test -d "$(distdir)/$$file"; then \ -+ find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ -+ fi; \ -+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ -+ cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ -+ find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ -+ fi; \ -+ cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ -+ else \ -+ test -f "$(distdir)/$$file" \ -+ || cp -p $$d/$$file "$(distdir)/$$file" \ -+ || exit 1; \ -+ fi; \ -+ done -+check-am: all-am -+check: check-am -+all-am: Makefile all-local -+installdirs: -+install: install-am -+install-exec: install-exec-am -+install-data: install-data-am -+uninstall: uninstall-am -+ -+install-am: all-am -+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am -+ -+installcheck: installcheck-am -+install-strip: -+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ -+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ -+ `test -z '$(STRIP)' || \ -+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install -+mostlyclean-generic: -+ -+clean-generic: -+ -+distclean-generic: -+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) -+ -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) -+ -+maintainer-clean-generic: -+ @echo "This command is intended for maintainers to use" -+ @echo "it deletes files that may require special tools to rebuild." -+clean: clean-am -+ -+clean-am: clean-generic clean-libtool clean-local mostlyclean-am -+ -+distclean: distclean-am -+ -rm -f Makefile -+distclean-am: clean-am distclean-generic -+ -+dvi: dvi-am -+ -+dvi-am: -+ -+html: html-am -+ -+html-am: -+ -+info: info-am -+ -+info-am: -+ -+install-data-am: -+ -+install-dvi: install-dvi-am -+ -+install-dvi-am: -+ -+install-exec-am: install-exec-local -+ -+install-html: install-html-am -+ -+install-html-am: -+ -+install-info: install-info-am -+ -+install-info-am: -+ -+install-man: -+ -+install-pdf: install-pdf-am -+ -+install-pdf-am: -+ -+install-ps: install-ps-am -+ -+install-ps-am: -+ -+installcheck-am: -+ -+maintainer-clean: maintainer-clean-am -+ -rm -f Makefile -+maintainer-clean-am: distclean-am maintainer-clean-generic -+ -+mostlyclean: mostlyclean-am -+ -+mostlyclean-am: mostlyclean-generic mostlyclean-libtool -+ -+pdf: pdf-am -+ -+pdf-am: -+ -+ps: ps-am -+ -+ps-am: -+ -+uninstall-am: -+ -+.MAKE: install-am install-strip -+ -+.PHONY: all all-am all-local check check-am clean clean-generic \ -+ clean-libtool clean-local distclean distclean-generic \ -+ distclean-libtool distdir dvi dvi-am html html-am info info-am \ -+ install install-am install-data install-data-am install-dvi \ -+ install-dvi-am install-exec install-exec-am install-exec-local \ -+ install-html install-html-am install-info install-info-am \ -+ install-man install-pdf install-pdf-am install-ps \ -+ install-ps-am install-strip installcheck installcheck-am \ -+ installdirs maintainer-clean maintainer-clean-generic \ -+ mostlyclean mostlyclean-generic mostlyclean-libtool pdf pdf-am \ -+ ps ps-am uninstall uninstall-am -+ -+export XA_SRCDIR -+export XA_TOPSRCDIR -+export XA_ABSTOPSRCDIR -+ -+all-local: user-all-local -+ -+install-exec-local: user-install-local -+ -+clean-local: user-clean-local -+ -+user-all-local: -+ ${MAKE} ${_mcall} all; -+ -+# Have no user-install-data-local ATM -+user-install-local: user-install-exec-local -+ -+user-install-exec-local: -+ ${MAKE} ${_mcall} install; -+ -+user-clean-local: -+ ${MAKE} ${_mcall} clean; -+ -+# Tell versions [3.59,3.63) of GNU make to not export all variables. -+# Otherwise a system limit (for SysV at least) may be exceeded. -+.NOEXPORT: -+ ---- /dev/null -+++ b/extensions/LUA/Makefile.am -@@ -0,0 +1 @@ -+include ../../Makefile.extra ---- /dev/null -+++ b/extensions/LUA/Makefile.in -@@ -0,0 +1,389 @@ -+# Makefile.in generated by automake 1.11.1 from Makefile.am. -+# @configure_input@ -+ -+# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -+# 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, -+# Inc. -+# This Makefile.in is free software; the Free Software Foundation -+# gives unlimited permission to copy and/or distribute it, -+# with or without modifications, as long as this notice is preserved. -+ -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY, to the extent permitted by law; without -+# even the implied warranty of MERCHANTABILITY or FITNESS FOR A -+# PARTICULAR PURPOSE. -+ -+@SET_MAKE@ -+ -+# -*- Makefile -*- -+# AUTOMAKE -+VPATH = @srcdir@ -+pkgdatadir = $(datadir)/@PACKAGE@ -+pkgincludedir = $(includedir)/@PACKAGE@ -+pkglibdir = $(libdir)/@PACKAGE@ -+pkglibexecdir = $(libexecdir)/@PACKAGE@ -+am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd -+install_sh_DATA = $(install_sh) -c -m 644 -+install_sh_PROGRAM = $(install_sh) -c -+install_sh_SCRIPT = $(install_sh) -c -+INSTALL_HEADER = $(INSTALL_DATA) -+transform = $(program_transform_name) -+NORMAL_INSTALL = : -+PRE_INSTALL = : -+POST_INSTALL = : -+NORMAL_UNINSTALL = : -+PRE_UNINSTALL = : -+POST_UNINSTALL = : -+build_triplet = @build@ -+host_triplet = @host@ -+DIST_COMMON = $(srcdir)/../../Makefile.extra $(srcdir)/Makefile.am \ -+ $(srcdir)/Makefile.in -+subdir = extensions/LUA -+ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 -+am__aclocal_m4_deps = $(top_srcdir)/m4/libtool.m4 \ -+ $(top_srcdir)/m4/ltoptions.m4 $(top_srcdir)/m4/ltsugar.m4 \ -+ $(top_srcdir)/m4/ltversion.m4 $(top_srcdir)/m4/lt~obsolete.m4 \ -+ $(top_srcdir)/configure.ac -+am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ -+ $(ACLOCAL_M4) -+mkinstalldirs = $(install_sh) -d -+CONFIG_HEADER = $(top_builddir)/config.h -+CONFIG_CLEAN_FILES = -+CONFIG_CLEAN_VPATH_FILES = -+SOURCES = -+DIST_SOURCES = -+DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) -+ACLOCAL = @ACLOCAL@ -+AMTAR = @AMTAR@ -+AR = @AR@ -+AUTOCONF = @AUTOCONF@ -+AUTOHEADER = @AUTOHEADER@ -+AUTOMAKE = @AUTOMAKE@ -+AWK = @AWK@ -+CC = @CC@ -+CCDEPMODE = @CCDEPMODE@ -+CFLAGS = @CFLAGS@ -+CPP = @CPP@ -+CPPFLAGS = @CPPFLAGS@ -+CYGPATH_W = @CYGPATH_W@ -+DEFS = @DEFS@ -+DEPDIR = @DEPDIR@ -+DSYMUTIL = @DSYMUTIL@ -+DUMPBIN = @DUMPBIN@ -+ECHO_C = @ECHO_C@ -+ECHO_N = @ECHO_N@ -+ECHO_T = @ECHO_T@ -+EGREP = @EGREP@ -+EXEEXT = @EXEEXT@ -+FGREP = @FGREP@ -+GREP = @GREP@ -+INSTALL = @INSTALL@ -+INSTALL_DATA = @INSTALL_DATA@ -+INSTALL_PROGRAM = @INSTALL_PROGRAM@ -+INSTALL_SCRIPT = @INSTALL_SCRIPT@ -+INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@ -+LD = @LD@ -+LDFLAGS = @LDFLAGS@ -+LIBOBJS = @LIBOBJS@ -+LIBS = @LIBS@ -+LIBTOOL = @LIBTOOL@ -+LIPO = @LIPO@ -+LN_S = @LN_S@ -+LTLIBOBJS = @LTLIBOBJS@ -+MAKEINFO = @MAKEINFO@ -+MKDIR_P = @MKDIR_P@ -+NM = @NM@ -+NMEDIT = @NMEDIT@ -+OBJDUMP = @OBJDUMP@ -+OBJEXT = @OBJEXT@ -+OTOOL = @OTOOL@ -+OTOOL64 = @OTOOL64@ -+PACKAGE = @PACKAGE@ -+PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@ -+PACKAGE_NAME = @PACKAGE_NAME@ -+PACKAGE_STRING = @PACKAGE_STRING@ -+PACKAGE_TARNAME = @PACKAGE_TARNAME@ -+PACKAGE_URL = @PACKAGE_URL@ -+PACKAGE_VERSION = @PACKAGE_VERSION@ -+PATH_SEPARATOR = @PATH_SEPARATOR@ -+PKG_CONFIG = @PKG_CONFIG@ -+RANLIB = @RANLIB@ -+SED = @SED@ -+SET_MAKE = @SET_MAKE@ -+SHELL = @SHELL@ -+STRIP = @STRIP@ -+VERSION = @VERSION@ -+abs_builddir = @abs_builddir@ -+abs_srcdir = @abs_srcdir@ -+abs_top_builddir = @abs_top_builddir@ -+abs_top_srcdir = @abs_top_srcdir@ -+ac_ct_CC = @ac_ct_CC@ -+ac_ct_DUMPBIN = @ac_ct_DUMPBIN@ -+am__include = @am__include@ -+am__leading_dot = @am__leading_dot@ -+am__quote = @am__quote@ -+am__tar = @am__tar@ -+am__untar = @am__untar@ -+bindir = @bindir@ -+build = @build@ -+build_alias = @build_alias@ -+build_cpu = @build_cpu@ -+build_os = @build_os@ -+build_vendor = @build_vendor@ -+builddir = @builddir@ -+datadir = @datadir@ -+datarootdir = @datarootdir@ -+docdir = @docdir@ -+dvidir = @dvidir@ -+exec_prefix = @exec_prefix@ -+host = @host@ -+host_alias = @host_alias@ -+host_cpu = @host_cpu@ -+host_os = @host_os@ -+host_vendor = @host_vendor@ -+htmldir = @htmldir@ -+includedir = @includedir@ -+infodir = @infodir@ -+install_sh = @install_sh@ -+kbuilddir = @kbuilddir@ -+kinclude_CFLAGS = @kinclude_CFLAGS@ -+ksourcedir = @ksourcedir@ -+libdir = @libdir@ -+libexecdir = @libexecdir@ -+libxtables_CFLAGS = @libxtables_CFLAGS@ -+libxtables_LIBS = @libxtables_LIBS@ -+localedir = @localedir@ -+localstatedir = @localstatedir@ -+lt_ECHO = @lt_ECHO@ -+mandir = @mandir@ -+mkdir_p = @mkdir_p@ -+oldincludedir = @oldincludedir@ -+pdfdir = @pdfdir@ -+prefix = @prefix@ -+program_transform_name = @program_transform_name@ -+psdir = @psdir@ -+regular_CFLAGS = @regular_CFLAGS@ -+sbindir = @sbindir@ -+sharedstatedir = @sharedstatedir@ -+srcdir = @srcdir@ -+sysconfdir = @sysconfdir@ -+target_alias = @target_alias@ -+top_build_prefix = @top_build_prefix@ -+top_builddir = @top_builddir@ -+top_srcdir = @top_srcdir@ -+xtlibdir = @xtlibdir@ -+XA_SRCDIR = ${srcdir} -+XA_TOPSRCDIR = ${top_srcdir} -+XA_ABSTOPSRCDIR = ${abs_top_srcdir} -+_mcall = -f ${top_builddir}/Makefile.iptrules -+all: all-am -+ -+.SUFFIXES: -+$(srcdir)/Makefile.in: $(srcdir)/Makefile.am $(srcdir)/../../Makefile.extra $(am__configure_deps) -+ @for dep in $?; do \ -+ case '$(am__configure_deps)' in \ -+ *$$dep*) \ -+ ( cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh ) \ -+ && { if test -f $@; then exit 0; else break; fi; }; \ -+ exit 1;; \ -+ esac; \ -+ done; \ -+ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign extensions/LUA/Makefile'; \ -+ $(am__cd) $(top_srcdir) && \ -+ $(AUTOMAKE) --foreign extensions/LUA/Makefile -+.PRECIOUS: Makefile -+Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status -+ @case '$?' in \ -+ *config.status*) \ -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ -+ *) \ -+ echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ -+ cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ -+ esac; -+ -+$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh -+ -+$(top_srcdir)/configure: $(am__configure_deps) -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh -+$(ACLOCAL_M4): $(am__aclocal_m4_deps) -+ cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh -+$(am__aclocal_m4_deps): -+ -+mostlyclean-libtool: -+ -rm -f *.lo -+ -+clean-libtool: -+ -rm -rf .libs _libs -+tags: TAGS -+TAGS: -+ -+ctags: CTAGS -+CTAGS: -+ -+ -+distdir: $(DISTFILES) -+ @srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ -+ topsrcdirstrip=`echo "$(top_srcdir)" | sed 's/[].[^$$\\*]/\\\\&/g'`; \ -+ list='$(DISTFILES)'; \ -+ dist_files=`for file in $$list; do echo $$file; done | \ -+ sed -e "s|^$$srcdirstrip/||;t" \ -+ -e "s|^$$topsrcdirstrip/|$(top_builddir)/|;t"`; \ -+ case $$dist_files in \ -+ */*) $(MKDIR_P) `echo "$$dist_files" | \ -+ sed '/\//!d;s|^|$(distdir)/|;s,/[^/]*$$,,' | \ -+ sort -u` ;; \ -+ esac; \ -+ for file in $$dist_files; do \ -+ if test -f $$file || test -d $$file; then d=.; else d=$(srcdir); fi; \ -+ if test -d $$d/$$file; then \ -+ dir=`echo "/$$file" | sed -e 's,/[^/]*$$,,'`; \ -+ if test -d "$(distdir)/$$file"; then \ -+ find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ -+ fi; \ -+ if test -d $(srcdir)/$$file && test $$d != $(srcdir); then \ -+ cp -fpR $(srcdir)/$$file "$(distdir)$$dir" || exit 1; \ -+ find "$(distdir)/$$file" -type d ! -perm -700 -exec chmod u+rwx {} \;; \ -+ fi; \ -+ cp -fpR $$d/$$file "$(distdir)$$dir" || exit 1; \ -+ else \ -+ test -f "$(distdir)/$$file" \ -+ || cp -p $$d/$$file "$(distdir)/$$file" \ -+ || exit 1; \ -+ fi; \ -+ done -+check-am: all-am -+check: check-am -+all-am: Makefile all-local -+installdirs: -+install: install-am -+install-exec: install-exec-am -+install-data: install-data-am -+uninstall: uninstall-am -+ -+install-am: all-am -+ @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am -+ -+installcheck: installcheck-am -+install-strip: -+ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ -+ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ -+ `test -z '$(STRIP)' || \ -+ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install -+mostlyclean-generic: -+ -+clean-generic: -+ -+distclean-generic: -+ -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) -+ -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) -+ -+maintainer-clean-generic: -+ @echo "This command is intended for maintainers to use" -+ @echo "it deletes files that may require special tools to rebuild." -+clean: clean-am -+ -+clean-am: clean-generic clean-libtool clean-local mostlyclean-am -+ -+distclean: distclean-am -+ -rm -f Makefile -+distclean-am: clean-am distclean-generic -+ -+dvi: dvi-am -+ -+dvi-am: -+ -+html: html-am -+ -+html-am: -+ -+info: info-am -+ -+info-am: -+ -+install-data-am: -+ -+install-dvi: install-dvi-am -+ -+install-dvi-am: -+ -+install-exec-am: install-exec-local -+ -+install-html: install-html-am -+ -+install-html-am: -+ -+install-info: install-info-am -+ -+install-info-am: -+ -+install-man: -+ -+install-pdf: install-pdf-am -+ -+install-pdf-am: -+ -+install-ps: install-ps-am -+ -+install-ps-am: -+ -+installcheck-am: -+ -+maintainer-clean: maintainer-clean-am -+ -rm -f Makefile -+maintainer-clean-am: distclean-am maintainer-clean-generic -+ -+mostlyclean: mostlyclean-am -+ -+mostlyclean-am: mostlyclean-generic mostlyclean-libtool -+ -+pdf: pdf-am -+ -+pdf-am: -+ -+ps: ps-am -+ -+ps-am: -+ -+uninstall-am: -+ -+.MAKE: install-am install-strip -+ -+.PHONY: all all-am all-local check check-am clean clean-generic \ -+ clean-libtool clean-local distclean distclean-generic \ -+ distclean-libtool distdir dvi dvi-am html html-am info info-am \ -+ install install-am install-data install-data-am install-dvi \ -+ install-dvi-am install-exec install-exec-am install-exec-local \ -+ install-html install-html-am install-info install-info-am \ -+ install-man install-pdf install-pdf-am install-ps \ -+ install-ps-am install-strip installcheck installcheck-am \ -+ installdirs maintainer-clean maintainer-clean-generic \ -+ mostlyclean mostlyclean-generic mostlyclean-libtool pdf pdf-am \ -+ ps ps-am uninstall uninstall-am -+ -+export XA_SRCDIR -+export XA_TOPSRCDIR -+export XA_ABSTOPSRCDIR -+ -+all-local: user-all-local -+ -+install-exec-local: user-install-local -+ -+clean-local: user-clean-local -+ -+user-all-local: -+ ${MAKE} ${_mcall} all; -+ -+# Have no user-install-data-local ATM -+user-install-local: user-install-exec-local -+ -+user-install-exec-local: -+ ${MAKE} ${_mcall} install; -+ -+user-clean-local: -+ ${MAKE} ${_mcall} clean; -+ -+# Tell versions [3.59,3.63) of GNU make to not export all variables. -+# Otherwise a system limit (for SysV at least) may be exceeded. -+.NOEXPORT: -+ ---- /dev/null -+++ b/extensions/LUA/Mbuild -@@ -0,0 +1,3 @@ -+# -*- Makefile -*- -+ -+obj-${build_LUA} += libxt_LUA.so ---- /dev/null -+++ b/extensions/LUA/nf_lua.c -@@ -0,0 +1,64 @@ -+#if defined(__KERNEL__) -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#endif -+ -+#include "lua.h" -+#include "lobject.h" /*sizeof(udata) */ -+#include "lauxlib.h" -+#include "controller.h" -+ -+#if defined(__KERNEL__) /* reachs until luaopen_nflib */ -+ -+ -+static int32_t nf_get_random(lua_State *L) -+{ -+ uint32_t rand = 0; -+ -+ get_random_bytes(&rand, sizeof(uint32_t )); -+ lua_pushnumber(L, rand); -+ return 1; -+} -+ -+static int32_t nf_get_time(lua_State *L) -+{ -+ lua_pushnumber(L, jiffies_to_msecs(jiffies_64)); -+ return 1; -+} -+ -+static const struct luaL_Reg nf_lua_lib_f [] = { -+ { "get_random", nf_get_random }, -+ { "get_time", nf_get_time }, -+ { NULL, NULL } -+}; -+ -+void luaopen_nflib(lua_State *L) -+{ -+ int32_t top; -+ -+ luaL_register(L, NETFILTER_LIB, nf_lua_lib_f); -+ lua_pop(L, 1); -+ -+ /* registering verdicts inside the _G */ -+ lua_getglobal(L, "_G"); -+ top = lua_gettop(L); -+ -+ lua_pushinteger(L, XT_CONTINUE); -+ lua_setfield(L, top, "XT_CONTINUE"); /* continiue with next rule */ -+ -+ lua_pushinteger(L, NF_DROP); -+ lua_setfield(L, top, "NF_DROP"); /* stop traversal in the current table hook and drop packet */ -+ -+ lua_pushinteger(L, NF_ACCEPT); -+ lua_setfield(L, top, "NF_ACCEPT"); /* stop traversal in the current table hook and accept packet */ -+ -+ lua_pop(L, 1); /* pop _G */ -+} -+ -+#endif ---- /dev/null -+++ b/extensions/LUA/prot_buf_dynamic.c -@@ -0,0 +1,486 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include "controller.h" -+ -+ -+ -+struct protocol_buf * dyn_prot_buf_array[MAX_NR_OF_DYN_PROT_BUFS] = { NULL }; -+ -+ -+/* LUA_API: the function 'field_dynamic_setter' acts as a wrapper around -+ * a given Lua field setter function of a dynamic protocol buffer. The -+ * string containing the lua function name was piggybacked in the 'set' -+ * member of the protocol_field. We call this function passing the actual -+ * segment as byte array and the set value. -+ * -+ * Paramters: -+ * 1. lua_packet_segment (implicit) -+ * 2. some lua value -+ * -+ * Upvalues: -+ * 1. pointer to the protocol buffer -+ * 2. field index -+ * -+ * Returns: -+ * 1. true or false if the 'set' was successful -+ */ -+int32_t field_dynamic_setter(lua_State *L) -+{ -+ size_t nbytes; -+ lua_packet_segment * array; -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ int32_t field_index = lua_tointeger(L, lua_upvalueindex(2)); -+ -+ /* the function name is piggybacked as a string */ -+ lua_getglobal(L, (char *)prot_buf->protocol_fields[field_index].set); -+ if (!lua_isfunction(L, -1)) { -+ lua_pushboolean(L, 0); -+ return 1; -+ } -+ -+ nbytes = sizeof(lua_packet_segment) + seg->length * sizeof(uint8_t); -+ array = (lua_packet_segment *)lua_newuserdata(L, nbytes); -+ array->length = seg->length; -+ array->start = seg->start + seg->offset; -+ array->changes = NULL; -+ -+ luaL_getmetatable(L, LUA_BYTE_ARRAY); -+ lua_setmetatable(L, -2); -+ lua_pushvalue(L, 2); /* push value to set */ -+ if (lua_pcall(L, 2, 1, 0) != 0) { -+ pr_debug("Error: %s \n", lua_tostring(L, -1)); -+ lua_pop(L, 1); -+ lua_pushboolean(L, 0); -+ } -+ return 1; -+} -+ -+/* LUA_API: the function 'field_dynamic_getter' acts as a wrapper around -+ * a given Lua field getter function of a dynamic protocol buffer. The -+ * string containing the lua function name was piggybacked in the 'get' -+ * member of the protocol_field. We call this function passing the actual -+ * segment as byte array. -+ * -+ * Paramters: -+ * 1. lua_packet_segment (implicit) -+ * -+ * Upvalues: -+ * 1. pointer to the protocol buffer -+ * 2. field index -+ * -+ * Returns: -+ * 1. true or false if the 'get' was successful -+ */ -+int32_t field_dynamic_getter(lua_State *L) -+{ -+ size_t nbytes; -+ lua_packet_segment * array; -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ int32_t field_index = lua_tointeger(L, lua_upvalueindex(2)); -+ -+ /* the function name is piggybacked as a string */ -+ lua_getglobal(L, (char *)prot_buf->protocol_fields[field_index].get); -+ if (!lua_isfunction(L, -1)) { -+ lua_pushboolean(L, 0); -+ return 1; -+ } -+ -+ nbytes = sizeof(lua_packet_segment) + seg->length * sizeof(uint8_t); -+ array = (lua_packet_segment *)lua_newuserdata(L, nbytes); -+ array->length = seg->length; -+ array->start = seg->start + seg->offset; -+ array->changes = NULL; -+ -+ luaL_getmetatable(L, LUA_BYTE_ARRAY); -+ lua_setmetatable(L, -2); -+ if (lua_pcall(L, 1, 1, 0) != 0) { -+ pr_debug("Error: %s \n", luaL_checkstring(L, -1)); -+ lua_pop(L, 1); -+ lua_pushboolean(L, 0); -+ } -+ return 1; -+} -+ -+/* LUA_API: the function 'has_protocol_dynamic' acts as a wrapper around -+ * a given lua has_protocol function of a dynamic protocol buffer. The -+ * string containing the lua function name was piggybacked in the 'has_protocol' -+ * member of the protocol_buffer. We call this function passing the actual -+ * segment. -+ * -+ * Paramters: -+ * 1. lua_packet_segment -+ * 2. protocol type -+ * -+ * Returns: -+ * 1. true or false if the payload field contains the given protocol -+ */ -+int32_t has_protocol_dynamic(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int32_t type) -+{ -+ lua_packet_segment *seg_new; -+ int32_t res = 0; -+ -+ /* the function name is piggybacked as a string */ -+ lua_getglobal(L, (char *)prot_buf->has_protocol); -+ seg_new = (lua_packet_segment *)lua_newuserdata(L, sizeof(lua_packet_segment)); -+ seg_new->start = seg->start; -+ seg_new->offset = seg->offset; -+ seg_new->length = seg->length; -+ seg_new->changes = NULL; -+ luaL_getmetatable(L, prot_buf->name); -+ lua_setmetatable(L, -2); -+ lua_pushinteger(L, type); /* push the protocol type */ -+ if (lua_pcall(L, 2, 1, 0) != 0) { -+ pr_debug("Error: %s \n", luaL_checkstring(L, -1)); -+ lua_pop(L, 1); -+ return 0; -+ } -+ res = lua_toboolean(L, -1); -+ lua_pop(L, 1); -+ -+ return res; -+} -+ -+/* LUA_API: the function 'get_field_changes_dynamic' acts as a wrapper around -+ * a given lua get_field_changes function of a dynamic protocol buffer. The -+ * string containing the lua function name was piggybacked in the 'get_field_changes' -+ * member of the protocol_buffer. We call this function passing the actual -+ * segment. The lua function must return two lua table containing the offset -+ * and length changes (in bits). -+ * -+ * Paramters: -+ * 1. lua_packet_segment -+ * -+ * Returns: -+ * 1. new allocated field_changes struct -+ */ -+struct field_changes * get_field_changes_dynamic(lua_State *L, struct protocol_buf *prot_buf, lua_packet_segment * seg) -+{ -+ lua_packet_segment *seg_new; -+ struct field_changes * changes; -+ int32_t nr_of_changes, i; -+ -+ lua_getglobal(L, (char *)prot_buf->get_field_changes); -+ -+ seg_new = (lua_packet_segment *)lua_newuserdata(L, sizeof(lua_packet_segment)); -+ seg_new->start = seg->start; -+ seg_new->offset = seg->offset; -+ seg_new->length = seg->length; -+ seg_new->changes = NULL; -+ luaL_getmetatable(L, prot_buf->name); -+ lua_setmetatable(L, -2); -+ -+ if (lua_pcall(L, 1, 2, 0) != 0) -+ luaL_error(L, "inside get_field_changes_dynamic. %s\n", lua_tostring(L, -1)); -+ -+ /* the function call must return a table containing length changes */ -+ luaL_checktype(L, -1, LUA_TTABLE); -+ /* the function call must return a table containing offset changes */ -+ luaL_checktype(L, -2, LUA_TTABLE); -+ /* both tables have to be of same size */ -+ if (lua_objlen(L, -1) != lua_objlen(L, -2)) -+ luaL_error(L, "the provided tables are not of equal size"); -+ -+ nr_of_changes = lua_objlen(L, -1); -+ changes = get_allocated_field_changes(L, nr_of_changes); -+ -+ /* loop over the tables */ -+ for (i = 1; i < nr_of_changes; i++) { -+ lua_rawgeti(L, -1, i); /* push length value of field at index i */ -+ changes->field_length_changes[i - 1] = luaL_checkinteger(L, -1); -+ lua_pop(L, 1); /* pop offset value */ -+ -+ lua_rawgeti(L, -2, i); /* push offset value of field at index i */ -+ changes->field_offset_changes[i - 1] = luaL_checkinteger(L, -1); -+ lua_pop(L, 1); /* pop length value */ -+ } -+ -+ /* pop both tables */ -+ lua_pop(L, 2); -+ -+ return changes; -+} -+ -+/* C_INT: 'get_free_protocol_index' is only used internally. This function -+ * gets a free slot inside the array holding all the protocol buffers. -+ * There are several ways to get to this information. In this case I take -+ * the way over the reflected array SUPPORTED_PROTOCOL_TABLE inside the -+ * Lua state. Since this function is called at laodtime, we do not have -+ * to care about performance. -+ */ -+static int32_t get_free_protocol_index(lua_State *L) -+{ -+ int32_t protocol_index; -+ -+ lua_getglobal(L, SUPPORTED_PROTOCOL_TABLE); -+ protocol_index = lua_objlen(L, -1) + 1; -+ lua_pop(L, 1); -+ return protocol_index; -+} -+ -+/* C_API: 'free_dynamic_prot_buf' frees the allocated memory of a given -+ * dynamic protocol buffer. this function is normally called inside a -+ * cleanup routine. Be aware, before running this function you must be -+ * sure that no references to the dynamic protocol buffers were available. -+ * It's recomended to close the Lua state before calling the function. */ -+void free_dynamic_prot_buf(struct protocol_buf * prot_buf) -+{ -+ struct protocol_field * field = prot_buf->protocol_fields; -+ -+ for (; field->name != NULL; field++) { -+ if (field->get) kfree(field->get); -+ if (field->set) kfree(field->set); -+ if (field->name) kfree((char *)field->name); -+ } -+ -+ if (prot_buf->payload_field) kfree(prot_buf->payload_field); -+ if (prot_buf->has_protocol) kfree(prot_buf->has_protocol); -+ -+ if (prot_buf->get_field_changes) kfree(prot_buf->get_field_changes); -+ kfree((char *)prot_buf->name); -+ kfree(prot_buf); -+ return; -+} -+ -+void cleanup_dynamic_prot_bufs(void) -+{ -+ int32_t i; -+ -+ for (i = 0; i < MAX_NR_OF_DYN_PROT_BUFS; i++) { -+ if (dyn_prot_buf_array[i]) { -+ free_dynamic_prot_buf(dyn_prot_buf_array[i]); -+ dyn_prot_buf_array[i] = NULL; -+ } -+ } -+ return; -+} -+ -+ -+/* C_INT: 'free_protocol_fields' is used internally as a helper function for -+ * 'register_dynamic_protbuf'. It is used when durin registration an error -+ * occurs and the afore allocated fields needed to be freed. */ -+static inline void free_protocol_fields(struct protocol_field * prot_fields, int32_t i) -+{ -+ struct protocol_field * f; -+ -+ while (i >= 0) { -+ f = &prot_fields[i]; -+ if (f->name) kfree((void *)f->name); -+ if (f->get) kfree((void *)f->get); -+ if (f->set) kfree((void *)f->set); -+ kfree((void *)f); -+ i--; -+ } -+} -+ -+/* LUA_API: 'register_dynamic_protbuf' is called from within the Lua script. -+ * it takes a Lua table representing the dynamic protocol buffer as parameter. -+ * e.g.: -+ * eth_prot_buf = { -+ * name = "packet_eth_dyn", -+ * payload_field = "data", -+ * protocol_fields = { -+ * {"dmac", 0, 48, nil, nil }, -+ * {"smac", 48, 48, nil, nil }, -+ * {"type", 96, 16, nil, nil }, -+ * {"data", 112, 0, nil, nil }, -+ * }, -+ * has_protocol = "eth_dyn_has_protocol", -+ * get_field_changes = "eth_dyn_get_field_changes" -+ * } -+ * register_dynamic_protbuf(eth_prot_buf) -+ * -+ * the table gets parsed and a new protocol_buf struct is allocated and -+ * initialized using 'register_protbuf', which is also used for the static -+ * protocol buffers. This enables an identical behavior like the static -+ * protocol buffers. The dynamic protocol buffers are not garbage collected, -+ * use 'free_dynamic_protbuf' to free them after closing the Lua state. -+ */ -+static int32_t register_dynamic_protbuf(lua_State *L) -+{ -+ struct protocol_buf *prot_buf; -+ struct protocol_field *field, sentinel = PROT_FIELD_SENTINEL; -+ int32_t nr_of_fields, i; -+ -+ prot_buf = (struct protocol_buf *)kmalloc(sizeof(struct protocol_buf), GFP_KERNEL); -+ prot_buf->is_dynamic = 1; -+ -+ /* check if parameter is a table */ -+ luaL_checktype(L, 1, LUA_TTABLE); -+ -+ /* initialize prot_buf.name */ -+ lua_getfield(L, 1, "name"); -+ prot_buf->name = kmalloc(lua_objlen(L, -1), GFP_KERNEL); -+ strcpy((char *)prot_buf->name, luaL_checkstring(L, -1)); -+ lua_pop(L, 1); /* pop res from lua_getfield */ -+ -+ /* check if protocol buffer is already registered */ -+ lua_getglobal(L, prot_buf->name); -+ if (!lua_isnil(L, -1)) { -+ lua_pop(L, 1); /* pop res from lua_getglobal */ -+ pr_debug("protocol_buf '%s' already registered.\n", prot_buf->name); -+ goto free_prot_buf; -+ } -+ lua_pop(L, 1); /* pop res from lua_getglobal */ -+ -+ /* initialize payload field */ -+ lua_getfield(L, 1, "payload_field"); -+ if (lua_isstring(L, -1)) { -+ prot_buf->payload_field = kmalloc(lua_objlen(L, -1), GFP_KERNEL); -+ strcpy(prot_buf->payload_field, lua_tostring(L, -1)); -+ }else -+ prot_buf->payload_field = NULL; -+ lua_pop(L, 1); /* pop res from lua_getfield */ -+ -+ /* initialize protocol_fields field*/ -+ lua_getfield(L, 1, "protocol_fields"); -+ if (!lua_istable(L, -1)) { -+ pr_debug("invalid protocol_fields table.\n"); -+ goto err2; -+ -+ } -+ -+ nr_of_fields = lua_objlen(L, -1); -+ prot_buf->protocol_fields = (struct protocol_field *)kmalloc((nr_of_fields + 1) * sizeof(struct protocol_field), GFP_KERNEL); -+ -+ for (i = 1; i <= nr_of_fields; i++) { -+ field = &prot_buf->protocol_fields[i - 1]; -+ /* initialize protocol field */ -+ lua_rawgeti(L, -1, i); /* push field-table */ -+ if (!lua_istable(L, -1)) { -+ free_protocol_fields(prot_buf->protocol_fields, i); -+ pr_debug("invalid protocol_field at %i.\n", i); -+ goto err; -+ } -+ -+ /* initialize protocol field name */ -+ lua_rawgeti(L, -1, 1); -+ if (!lua_isstring(L, -1)) { -+ free_protocol_fields(prot_buf->protocol_fields, i); -+ pr_debug("invalid protocol_field name at %i.\n", i); -+ goto err; -+ } -+ -+ field->name = kmalloc(lua_objlen(L, -1), GFP_KERNEL); -+ strcpy((char*)field->name, lua_tostring(L, -1)); -+ lua_pop(L, 1); /* pop field name */ -+ -+ /* initialize protocol field offset */ -+ lua_rawgeti(L, -1, 2); -+ if (!lua_isnumber(L, -1)) { -+ free_protocol_fields(prot_buf->protocol_fields, i); -+ pr_debug("invalid protocol_field offset at %i.\n", i); -+ goto err; -+ } -+ field->offset = lua_tointeger(L, -1); -+ lua_pop(L, 1); /* pop field offset */ -+ -+ /* initialize protocol field length */ -+ lua_rawgeti(L, -1, 3); -+ if (!lua_isnumber(L, -1)) { -+ free_protocol_fields(prot_buf->protocol_fields, i); -+ pr_debug("invalid protocol_field length at %i.\n", i); -+ goto err; -+ } -+ field->length = lua_tointeger(L, -1); -+ lua_pop(L, 1); /* pop field length */ -+ -+ /* initialize protocol field getter */ -+ lua_rawgeti(L, -1, 4); -+ if (lua_isstring(L, -1)) { -+ field->get = kmalloc(lua_objlen(L, -1), GFP_KERNEL); -+ strcpy((char *)field->get, lua_tostring(L, -1)); /* the get-wrapper knows about the piggybacked string */ -+ }else -+ field->get = NULL; -+ lua_pop(L, 1); /* pop field getter */ -+ -+ /* initialize protocol field setter */ -+ lua_rawgeti(L, -1, 5); -+ if (lua_isstring(L, -1)) { -+ field->set = kmalloc(lua_objlen(L, -1), GFP_KERNEL); -+ strcpy((char *)field->set, lua_tostring(L, -1)); /* the set-wrapper knows about the piggybacked string */ -+ }else -+ field->set = NULL; -+ lua_pop(L, 1); /* pop field setter */ -+ -+ /* field initialization completed */ -+ lua_pop(L, 1); /* pop field-table */ -+ } -+ -+ /* put sentinel at the end of protocol_fields */ -+ memcpy(&prot_buf->protocol_fields[nr_of_fields], &sentinel, sizeof(sentinel)); -+ lua_pop(L, 1); /* pop protocol-fields-table */ -+ -+ /* initialize has_protocol field */ -+ lua_getfield(L, 1, "has_protocol"); -+ if (lua_isstring(L, -1)) { -+ prot_buf->has_protocol = kmalloc(lua_objlen(L, -1), GFP_KERNEL); -+ strcpy((char *)prot_buf->has_protocol, lua_tostring(L, -1)); /* the has_protocol-wrapper knows about the piggybacked string */ -+ }else -+ prot_buf->has_protocol = NULL; -+ lua_pop(L, 1); /* pop has_protocol */ -+ -+ /* initialize get_field_changes field */ -+ lua_getfield(L, 1, "get_field_changes"); -+ if (lua_isstring(L, -1)) { -+ prot_buf->get_field_changes = kmalloc(lua_objlen(L, -1), GFP_KERNEL); -+ strcpy((char *)prot_buf->get_field_changes, lua_tostring(L, -1)); /* the get_field_changes-wrapper knows about the piggybacked string */ -+ }else -+ prot_buf->get_field_changes = NULL; -+ lua_pop(L, 1); /* pop get_field_changes */ -+ -+ /* Storing the pointer to the DYNAMIC protbuf within dyn_prot_buf_array, in order to free it at cleanup */ -+ for (i = 0; i < MAX_NR_OF_DYN_PROT_BUFS; i++) { -+ if (!dyn_prot_buf_array[i]) { -+ dyn_prot_buf_array[i] = prot_buf; -+ break; -+ }else -+ goto err; -+ } -+ -+ /* call the "common" register_protbuf */ -+ register_protbuf(L, prot_buf, get_free_protocol_index(L)); /* register prot_buf as it is done with the static ones */ -+ -+ return 0; -+ -+err: -+ kfree(prot_buf->protocol_fields); -+err2: -+ if (prot_buf->payload_field) kfree(prot_buf->payload_field); -+free_prot_buf: -+ kfree((void *)prot_buf->name); -+ kfree(prot_buf); -+ -+ luaL_error(L, "one or more error happend while registering a dynamic protocol buffer, please consult the debug log"); -+ -+ return 0; -+ -+} -+ -+void luaopen_protbuf_dynamic(lua_State *L) -+{ -+ lua_getglobal(L, "_G"); -+ lua_pushcclosure(L, register_dynamic_protbuf, 0); -+ lua_setfield(L, -2, "register_dynamic_protbuf"); -+ lua_pop(L, 1); /* pop _G */ -+ return; -+} ---- /dev/null -+++ b/extensions/LUA/prot_buf_ethernet.c -@@ -0,0 +1,60 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include "controller.h" -+ -+ -+static int32_t eth_has_protocol(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int32_t protocol_type) -+{ -+ uint8_t *embedded_protocol = seg->start + seg->offset + 12 /*bytes*/; -+ unsigned short res = (unsigned short)((embedded_protocol[1] << CHAR_BIT) | (embedded_protocol[0] << CHAR_BIT)); -+ -+ switch (res) { -+ case 0x0800: /* 1: Internet Protocol (IP) */ -+ if (protocol_type == PACKET_IP) return 1; -+ break; -+ default: -+ return 0; -+ } -+ -+ return 0; -+} -+ -+static const struct protocol_field eth_protocol_fields[] = { -+ /* field name offset length getter setter */ -+ { "dmac", 0, 48, NULL, NULL }, -+ { "smac", 48, 48, NULL, NULL }, -+ { "type", 96, 16, NULL, NULL }, -+ { "data", 112, 0, NULL, NULL }, -+ PROT_FIELD_SENTINEL, -+}; -+ -+static const struct protocol_buf eth_protocol_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_ETH, -+ .payload_field = "data", -+ .protocol_fields = (struct protocol_field *)ð_protocol_fields, -+ .has_protocol = ð_has_protocol, -+ .get_field_changes = NULL, -+}; -+ -+ -+void luaopen_protbuf_eth(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)ð_protocol_buf, PACKET_ETH); -+} ---- /dev/null -+++ b/extensions/LUA/prot_buf_helpers.c -@@ -0,0 +1,216 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#if defined(__KERNEL__) -+#include -+#include /* kmalloc */ -+#endif -+ -+#include "controller.h" -+ -+int32_t get_header_size(struct protocol_buf * prot_buf) -+{ -+ int32_t bit_counter = 0; -+ struct protocol_field * field = prot_buf->protocol_fields; -+ -+ for (; field->name; field++) -+ bit_counter += field->length; -+ -+ return bit_counter >> 3; -+} -+ -+ -+int32_t set_32_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ *(uint32_t *)(seg->start + seg->offset) = (uint32_t )htonl(luaL_checkinteger(L, 2)); -+ return 0; -+} -+int32_t get_32_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ lua_pushinteger(L, ntohl(*((uint32_t *)(seg->start + seg->offset)))); -+ return 1; -+} -+ -+int32_t set_16_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ *(uint16_t *)(seg->start + seg->offset) = (uint16_t)htons(luaL_checkinteger(L, 2)); -+ return 0; -+} -+int32_t get_16_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ lua_pushinteger(L, ntohs(*((uint16_t *)(seg->start + seg->offset)))); -+ return 1; -+} -+ -+int32_t set_lower_4_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ uint8_t b = (uint8_t)luaL_checkinteger(L, 2) << 4; -+ uint8_t * pos = (uint8_t *)(seg->start + seg->offset); -+ -+ *pos &= 0x0F; /* reset lower 4 bits*/ -+ *pos |= b; -+ -+ return 0; -+} -+ -+int32_t get_lower_4_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ lua_pushinteger(L, (*(uint8_t *)(seg->start + seg->offset)) >> 4); -+ return 1; -+} -+ -+int32_t set_upper_4_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ uint8_t b = (uint8_t)luaL_checkinteger(L, 2) << 4; -+ uint8_t * pos = (uint8_t *)(seg->start + seg->offset); -+ -+ *pos &= 0xF0; /* reset upper 4 bits*/ -+ *pos |= (b >> 4); -+ -+ return 0; -+} -+ -+int32_t get_upper_4_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ lua_pushinteger(L, (*(uint8_t *)(seg->start + seg->offset)) & 0x0F); -+ return 1; -+} -+ -+ -+int32_t set_8_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ *(uint8_t *)(seg->start + seg->offset) = (uint8_t)luaL_checkinteger(L, 2); -+ return 0; -+} -+ -+int32_t get_8_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ lua_pushinteger(L, *(uint8_t *)(seg->start + seg->offset)); -+ return 1; -+} -+ -+int32_t set_1_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ unsigned long l = 0; -+ -+ memcpy(&l, (seg->start + seg->offset), seg->length); -+ l |= (1 << ((CHAR_BIT * seg->length) - luaL_checkinteger(L, 2))); -+ memcpy((seg->start + seg->offset), &l, seg->length); -+ -+ return 0; -+} -+ -+int32_t get_1_bit_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ unsigned long l = 0; -+ uint32_t bit = 0; -+ -+ memcpy(&l, (seg->start + seg->offset), seg->length); -+ bit = l & (1 << ((CHAR_BIT * seg->length) - luaL_checkinteger(L, 2))); -+ -+ lua_pushboolean(L, bit); -+ return 1; -+} -+ -+int32_t get_string_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+ /* Warning we cast from uchar to char */ -+ lua_pushlstring(L, (char *)seg->start + seg->offset, seg->length); -+ return 1; -+} -+ -+int32_t set_data_generic(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ lua_packet_segment * data = checkbytearray(L, 2); -+ -+ pr_debug("seg->length %u, data->length %u\n", seg->length, data->length); -+ -+ if (seg->length >= data->length) -+ memcpy((seg->start + seg->offset), data->start, data->length); -+ else -+ luaL_error(L, "provided byte array too big for given packet segment"); -+ return 0; -+} -+ -+struct field_changes * get_allocated_field_changes(lua_State *L, int32_t nr_of_fields) -+{ -+ struct field_changes * changes; -+ -+ changes = kmalloc(sizeof(struct field_changes), GFP_ATOMIC); -+ -+ if (!changes) -+ goto failure; -+ -+ changes->field_length_changes = kmalloc(nr_of_fields * sizeof(int), GFP_ATOMIC); -+ if (!changes->field_length_changes) -+ goto free1; -+ -+ changes->field_offset_changes = kmalloc(nr_of_fields * sizeof(int), GFP_ATOMIC); -+ if (!changes->field_offset_changes) -+ goto free2; -+ -+ memset(changes->field_length_changes, 0, nr_of_fields * sizeof(int)); -+ memset(changes->field_offset_changes, 0, nr_of_fields * sizeof(int)); -+ -+ changes->ref_count = 1; -+ -+ return changes; -+ -+free2: kfree(changes->field_length_changes); -+free1: kfree(changes); -+failure: -+ if (!changes) luaL_error(L, "couldnt allocate memory inside 'get_allocated_field_changes'"); -+ return NULL; /* only to omit warnings */ -+} -\ No newline at end of file ---- /dev/null -+++ b/extensions/LUA/prot_buf_icmp.c -@@ -0,0 +1,49 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include "controller.h" -+ -+static int32_t icmp_has_protocol(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int32_t protocol_type) -+{ -+ return 0; -+} -+ -+static const struct protocol_field icmp_protocol_fields[] = { -+ /* field name offset length getter setter */ -+ { "type", 0, 8, NULL, NULL }, -+ { "code", 8, 8, NULL, NULL }, -+ { "checksum", 16, 16, NULL, NULL }, -+ { "id", 32, 16, NULL, NULL }, -+ { "sequence", 48, 16, NULL, NULL }, -+ PROT_FIELD_SENTINEL, -+}; -+ -+static const struct protocol_buf icmp_protocol_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_ICMP, -+ .payload_field = NULL, -+ .protocol_fields = (struct protocol_field *)&icmp_protocol_fields, -+ .has_protocol = &icmp_has_protocol, -+ .get_field_changes = NULL, -+}; -+ -+void luaopen_protbuf_icmp(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)&icmp_protocol_buf, PACKET_ICMP); -+} -+ ---- /dev/null -+++ b/extensions/LUA/prot_buf_ip.c -@@ -0,0 +1,209 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#if defined(__KERNEL__) -+ #include -+ #include -+#endif -+ -+#include "controller.h" -+ -+ -+#define IP_FMT "%u.%u.%u.%u" -+#define IP_ACC(buf) buf[0], buf[1], buf[2], buf[3] -+ -+ -+static int32_t ip_version_set(lua_State *L) -+{ -+ uint8_t version_checked; -+ lua_packet_segment * seg = checkpacketseg(L, 1, LUA_PACKET_SEG_IP); -+ uint8_t *version_seg = seg->start + seg->offset; -+ int32_t version = luaL_checkinteger(L, 2); -+ -+ luaL_argcheck(L, version >= 0 && version <= 15, 1, "version number invalid"); -+ -+ version_checked = (uint8_t)version; -+ -+ version_seg[0] &= (uint8_t)0x0F; /* reset version bits */ -+ version_seg[0] |= version_checked << 4; -+ -+ return 0; -+} -+static int32_t ip_version_get(lua_State *L) -+{ -+ lua_packet_segment * seg = checkpacketseg(L, 1, LUA_PACKET_SEG_IP); -+ uint8_t *version_seg = seg->start + seg->offset; -+ uint8_t v = version_seg[0] & 0xF0; -+ -+ v >>= 4; -+ -+ lua_pushinteger(L, v); -+ return 1; -+} -+ -+static int32_t ip_ihl_set(lua_State *L) -+{ -+ uint8_t ihl_checked; -+ lua_packet_segment * seg = checkpacketseg(L, 1, LUA_PACKET_SEG_IP); -+ uint8_t *ihl_seg = seg->start + seg->offset; -+ int32_t ihl = luaL_checkinteger(L, 2); -+ -+ luaL_argcheck(L, ihl >= 5 && ihl <= 15, 1, "ip header length invalid"); // RFC 791 5x32 = 160 bits -+ -+ ihl_checked = (uint8_t)ihl; -+ -+ ihl_seg[0] &= (uint8_t)0xF0; /* reset ihl bits */ -+ ihl_seg[0] |= ihl_checked; -+ -+ return 0; -+} -+static int32_t ip_ihl_get(lua_State *L) -+{ -+ lua_packet_segment * seg = checkpacketseg(L, 1, LUA_PACKET_SEG_IP); -+ uint8_t *ihl_seg = seg->start + seg->offset; -+ uint8_t v = ihl_seg[0] & 0x0F; -+ -+ lua_pushinteger(L, v); -+ return 1; -+} -+ -+static int32_t ip_addr_set(lua_State *L) -+{ -+ int32_t field_id = lua_tointeger(L, lua_upvalueindex(2)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, LUA_PACKET_SEG_IP); -+ uint8_t *addr_seg = seg->start + seg->offset; -+ uint32_t old_addr; -+ char *ip = (char *)luaL_checkstring(L, 2); -+ uint32_t a, b, c, d; -+ struct sk_buff * skb = (struct sk_buff *)lua_touserdata(L, 3); -+ -+ /* for tcp / udp checksumming*/ -+ uint32_t prot_offset; -+ uint8_t *check, *protocol_seg; -+ -+ /* end */ -+ -+ sscanf(ip, IP_FMT, &a, &b, &c, &d); -+ -+ luaL_argcheck(L, a < 256 && b < 256 && c < 256 && d < 256, 1, "invalid ip addr"); -+ -+ old_addr = *((uint32_t *)addr_seg); -+ addr_seg[0] = (uint8_t)a; -+ addr_seg[1] = (uint8_t)b; -+ addr_seg[2] = (uint8_t)c; -+ addr_seg[3] = (uint8_t)d; -+ -+#if defined(__KERNEL__) -+ if (old_addr != *(uint32_t *)addr_seg) { -+ int32_t offset = (field_id == 10) ? -2 : -6; /* offset from saddr or daddr */ -+ -+ csum_replace4((uint16_t *)(addr_seg + offset), old_addr, *(uint32_t *)addr_seg); -+ -+ prot_offset = (field_id == 10) ? -3 : -7; /* offset from saddr or daddr */ -+ protocol_seg = seg->start + seg->offset + prot_offset; -+ -+ if (skb && (protocol_seg[0] == 0x06 || protocol_seg[0] == 0x11)) { /* is payload TCP or UDP ? */ -+ -+ check = seg->start + seg->offset; /* tmp res */ -+ check += (field_id == 10) ? 8 : 16; /* the start of the payload, depending saddr or daddr */ -+ check += (protocol_seg[0] == 0x06) ? 16 : 6; /* the start of the checksum, depending on TCP or UDP */ -+ -+ inet_proto_csum_replace4((__sum16 *)check, skb, old_addr, *(uint32_t *)addr_seg, 1); -+ -+ lua_pop(L, 1); -+ } -+ } -+#endif -+ return 0; -+} -+ -+ -+ -+ -+ -+static int32_t ip_addr_get(lua_State *L) -+{ -+ lua_packet_segment * seg = checkpacketseg(L, 1, LUA_PACKET_SEG_IP); -+ uint8_t *addr_seg = seg->start + seg->offset; -+ -+ char buf[16]; /*max: 255.255.255.255\0 --> 16 chars */ -+ -+ sprintf(buf, IP_FMT, IP_ACC(addr_seg)); -+ lua_pushstring(L, buf); -+ return 1; -+} -+ -+static int32_t ip_has_protocol(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int32_t protocol_type) -+{ -+ uint8_t * embedded_protocol = seg->start + seg->offset + 9 /*bytes*/; -+ -+ switch (embedded_protocol[0]) { -+ case 0x01: /* 1: Internet Control Message Protocol (ICMP) */ -+ if (protocol_type == PACKET_ICMP) return 1; -+ break; -+ case 0x02: /* 2: Internet Group Management Protocol (IGMP) */ -+ break; -+ case 0x06: /* 6: Transmission Control Protocol (TCP) */ -+ if (protocol_type == PACKET_TCP) return 1; -+ break; -+ case 0x11: /* 17: User Datagram Protocol (UDP) */ -+ if (protocol_type == PACKET_UDP) return 1; -+ break; -+ case 0x59: /* 89: Open Shortest Path First (OSPF) */ -+ break; -+ case 0x84: /* 132: Stream Control Transmission Protocol (SCTP) */ -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+static const struct protocol_field ip_protocol_fields[] = { -+ /* field name offset length getter setter */ -+ { "version", 0, 4, ip_version_get, ip_version_set }, -+ { "ihl", 4, 4, ip_ihl_get, ip_ihl_set }, -+ { "tos", 8, 8, get_8_bit_generic, set_8_bit_generic }, -+ { "tot_len", 16, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "id", 32, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "flags", 48, 3, get_1_bit_generic, set_1_bit_generic }, -+ { "frag_off", 51, 13, NULL, NULL }, -+ { "ttl", 64, 8, get_8_bit_generic, set_8_bit_generic }, -+ { "protocol", 72, 8, get_8_bit_generic, set_8_bit_generic }, -+ { "check", 80, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "saddr", 96, 32, ip_addr_get, ip_addr_set }, -+ { "daddr", 128, 32, ip_addr_get, ip_addr_set }, -+ { "data", 160, 0, NULL, set_data_generic }, -+ PROT_FIELD_SENTINEL, -+}; -+ -+static const struct protocol_buf ip_protocol_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_IP, -+ .payload_field = "data", -+ .protocol_fields = (struct protocol_field *)&ip_protocol_fields, -+ .has_protocol = &ip_has_protocol, -+ .get_field_changes = NULL, -+}; -+ -+void luaopen_protbuf_ip(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)&ip_protocol_buf, PACKET_IP); -+} -+ ---- /dev/null -+++ b/extensions/LUA/prot_buf_raw.c -@@ -0,0 +1,43 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include "controller.h" -+static int32_t raw_has_protocol(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int32_t protocol_type) -+{ -+ return 1; -+} -+ -+static const struct protocol_field raw_protocol_fields[] = { -+ /* field name offset length getter setter */ -+ { "data", 0, 0, NULL, NULL }, -+ PROT_FIELD_SENTINEL, -+}; -+ -+static const struct protocol_buf raw_protocol_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_RAW, -+ .payload_field = "data", -+ .protocol_fields = (struct protocol_field *)&raw_protocol_fields, -+ .has_protocol = &raw_has_protocol, -+ .get_field_changes = NULL, -+}; -+ -+void luaopen_protbuf_raw(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)&raw_protocol_buf, PACKET_RAW); -+} ---- /dev/null -+++ b/extensions/LUA/prot_buf_tcp.c -@@ -0,0 +1,188 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#if defined(__KERNEL__) -+ #include -+ #include -+#endif -+#include "controller.h" -+ -+ -+static int32_t tcp_has_protocol(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int32_t protocol_type) -+{ -+ return 1; -+} -+ -+static int32_t tcp_set_checksum(lua_State *L) -+{ -+ struct protocol_buf * prot_buf = (struct protocol_buf *)lua_topointer(L, lua_upvalueindex(1)); -+ lua_packet_segment * seg = checkpacketseg(L, 1, prot_buf->name); -+ -+#if defined(__KERNEL__) -+ uint8_t * check_seg = seg->start + seg->offset; -+ uint8_t * tcp_hdr = check_seg - 16; -+ uint8_t * saddr = tcp_hdr - 8; -+ uint8_t * daddr = saddr + 4; -+ uint32_t len = 20 + (seg->changes->field_length_changes[11] / 8) + (seg->changes->field_length_changes[10] / 8); -+ unsigned short checksum = tcp_v4_check(len, *(uint32_t *)saddr, *(uint32_t *)daddr, -+ csum_partial(tcp_hdr, len, 0)); -+ -+ memcpy(check_seg, &checksum, sizeof(unsigned short)); -+#endif -+ return 0; -+} -+ -+ -+static const struct protocol_field tcp_protocol_fields[] = { -+ /* field name offset length getter setter */ -+ { "sport", 0, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "dport", 16, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "seq", 32, 32, get_32_bit_generic, set_32_bit_generic }, -+ { "ack", 64, 32, get_32_bit_generic, set_32_bit_generic }, -+ { "data_off", 96, 4, get_lower_4_bit_generic, set_lower_4_bit_generic }, -+ { "reserved", 100, 4, get_upper_4_bit_generic, set_upper_4_bit_generic }, -+ { "flags", 104, 8, get_1_bit_generic, set_1_bit_generic }, -+ { "window_size", 112, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "check", 128, 16, get_16_bit_generic, tcp_set_checksum }, -+ { "urgent", 144, 16, NULL, NULL }, -+ { "options", 160, 0, NULL, set_data_generic }, -+ { "data", 160, 0, NULL, set_data_generic }, /* begin of data depends on options */ -+ PROT_FIELD_SENTINEL, -+}; -+ -+ -+static const struct protocol_field tcp_options_and_data[] = { -+ /* field name offset length getter setter */ -+ { "MSS", 0, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "WS", 0, 8, get_8_bit_generic, set_8_bit_generic }, -+ { "SACK", 0, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "TSVAL", 0, 32, get_32_bit_generic, set_32_bit_generic }, -+ { "TSER", 0, 32, get_32_bit_generic, set_32_bit_generic }, -+ PROT_FIELD_SENTINEL, -+}; -+ -+ -+static struct field_changes * tcp_get_field_changes(lua_State *L, lua_packet_segment * seg); -+ -+static const struct protocol_buf tcp_protocol_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_TCP, -+ .payload_field = "data", -+ .protocol_fields = (struct protocol_field *)&tcp_protocol_fields, -+ .has_protocol = &tcp_has_protocol, -+ .get_field_changes = &tcp_get_field_changes, -+}; -+ -+ -+static struct field_changes * tcp_options_get_field_changes(lua_State *L, lua_packet_segment * seg); -+ -+static const struct protocol_buf tcp_options_and_data_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_TCP_OPT, -+ .payload_field = NULL, -+ .protocol_fields = (struct protocol_field *)&tcp_options_and_data, -+ .has_protocol = NULL, -+ .get_field_changes = &tcp_options_get_field_changes, -+}; -+ -+struct field_changes * tcp_get_field_changes(lua_State *L, lua_packet_segment * seg) -+{ -+ /* depending on the value stored inside the 'data_off'-field, the length of -+ * the 'options' field has to be changed, as well as the length and offset -+ * of the 'data' field */ -+ uint8_t *tcp_hdr = seg->start + seg->offset; -+ -+ /* get the pointer to the 'data_off' field */ -+ uint8_t * data_off_field = tcp_hdr + 12; /* 12 bytes offset */ -+ /* extract the stored header length in bits */ -+ uint32_t tcp_hdr_len = ((*(uint8_t *)data_off_field) >> 4) * 32; -+ -+ /* get an allocated 'field_changes' structure */ -+ struct field_changes * changes = get_allocated_field_changes(L, 12); -+ -+ /* depending on the tcp header length, change the length of the options*/ -+ changes->field_length_changes[10] = tcp_hdr_len - 160; -+ /* depending on the options length, change the offset of the data */ -+ changes->field_offset_changes[11] = changes->field_length_changes[10]; -+ changes->field_length_changes[11] = (seg->length * 8) - tcp_hdr_len; -+ -+ return changes; -+ -+} -+ -+struct field_changes * tcp_options_get_field_changes(lua_State *L, lua_packet_segment * seg) -+{ -+ /* depending on the value stored inside the 'data_off'-field, the length of -+ * the 'options' field has to be changed, as well as the length and offset -+ * of the 'data' field */ -+ uint8_t *tcp_opt_hdr = seg->start + seg->offset; -+ -+ /* get an allocated 'field_changes' structure */ -+ struct field_changes * changes = get_allocated_field_changes(L, 5); -+ -+ int32_t MSS = 0, WS = 0, SACK = 0, TS = 0, i; -+ -+ uint8_t b1, b2; -+ -+ for (i = 0; i < seg->length; i++) { -+ b1 = tcp_opt_hdr[i]; -+ b2 = tcp_opt_hdr[i + 1]; -+ -+ if (b1 == 0x00) -+ break; -+ -+ /* test for MSS */ -+ if (!MSS && (b1 == 0x02 && b2 == 0x04)) { -+ changes->field_offset_changes[0] = (i + 2) * CHAR_BIT; -+ MSS = 1; -+ } -+ -+ /* test for WS --- yet buggy somehow */ -+ if (!WS && (b1 == 0x03 && b2 == 0x03)) { -+ changes->field_offset_changes[1] = (i + 2) * CHAR_BIT; -+ WS = 1; -+ } -+ -+ /* test for SACK*/ -+ if (!SACK && (b1 == 0x04 && b2 == 0x02)) { -+ changes->field_offset_changes[2] = i * CHAR_BIT; /* has no value */ -+ SACK = 1; -+ } -+ -+ /* test for TS */ -+ if (!TS && (b1 == 0x08 && b2 == 0x0A)) { -+ changes->field_offset_changes[3] = (i + 2) * CHAR_BIT; -+ changes->field_offset_changes[4] = (i + 2 + 4) * CHAR_BIT; -+ TS = 1; -+ } -+ } -+ -+ return changes; -+ -+} -+ -+void luaopen_protbuf_tcp(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)&tcp_protocol_buf, PACKET_TCP); -+} -+void luaopen_protbuf_tcp_options(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)&tcp_options_and_data_buf, PACKET_TCP_OPTIONS); -+} -+ -+ ---- /dev/null -+++ b/extensions/LUA/prot_buf_tftp.c -@@ -0,0 +1,87 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+#include "controller.h" -+ -+static const struct protocol_field tftp_protocol_fields[] = { -+ /* field name offset length getter setter */ -+ { "opcode", 0, 16, get_16_bit_generic, NULL}, -+ { "filename", 0, 0, get_string_generic, NULL}, -+ { "mode", 0, 0, get_string_generic, NULL}, -+ { "block_nr", 0, 16, get_16_bit_generic, NULL}, -+ { "data", 0, 0, NULL, NULL}, -+ PROT_FIELD_SENTINEL, -+}; -+ -+struct field_changes * tftp_get_field_changes(lua_State *L, lua_packet_segment * seg) -+{ -+ /* depending on the value stored inside the 'opcode'-field we have to change -+ * offsets and lengths */ -+ uint8_t *tftp_hdr = seg->start + seg->offset; -+ short opcode = ntohs(*((uint16_t *)tftp_hdr)); -+ /* get an allocated 'field_changes' structure */ -+ struct field_changes * changes = get_allocated_field_changes(L, 5); -+ switch (opcode) { -+ case 1: /* Read Request (RRQ) */ -+ /* setting offset and length of field 'filename' */ -+ changes->field_offset_changes[1] = sizeof(unsigned short) << 3; -+ changes->field_length_changes[1] = strlen((char *)tftp_hdr + sizeof(unsigned short)) << 3; -+ /* setting offset and length of field 'mode' */ -+ changes->field_offset_changes[2] = changes->field_offset_changes[1] + changes->field_length_changes[1]; -+ changes->field_length_changes[2] = strlen((char *)tftp_hdr + (changes->field_offset_changes[2] >> 3)); -+ break; -+ case 2: /* Write Request (WRQ) */ -+ /* setting offset and length of field 'filename' */ -+ changes->field_offset_changes[1] = sizeof(unsigned short) << 3; -+ changes->field_length_changes[1] = strlen((char *)tftp_hdr + sizeof(unsigned short)) << 3; -+ /* setting offset and length of field 'mode' */ -+ changes->field_offset_changes[2] = changes->field_offset_changes[1] + changes->field_length_changes[1]; -+ changes->field_length_changes[2] = strlen((char *)tftp_hdr + (changes->field_offset_changes[2] >> 3)); -+ break; -+ case 3: /* Data (DATA) */ -+ /* setting offset of field 'block_nr' */ -+ changes->field_offset_changes[3] = sizeof(unsigned short) << 3; -+ /* setting offset of field 'data' */ -+ changes->field_offset_changes[4] = changes->field_offset_changes[3] + (sizeof(unsigned short) << 3); -+ break; -+ case 4: /* Acknowledgment (ACK) */ -+ /* setting offset of field 'block_nr' */ -+ changes->field_offset_changes[3] = sizeof(unsigned short) << 3; -+ break; -+ case 5: /* Error (ERROR) */ -+ /* we don't care ... yet */ -+ break; -+ default: -+ break; -+ } -+ -+ return changes; -+} -+ -+static const struct protocol_buf tftp_protocol_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_TFTP, -+ .payload_field = NULL, -+ .protocol_fields = (struct protocol_field *)&tftp_protocol_fields, -+ .has_protocol = NULL, /* we don't need it, since we don't provide a payload field */ -+ .get_field_changes = tftp_get_field_changes, -+}; -+ -+void luaopen_protbuf_tftp(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)&tftp_protocol_buf, PACKET_TFTP); -+} ---- /dev/null -+++ b/extensions/LUA/prot_buf_udp.c -@@ -0,0 +1,53 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#if defined(__KERNEL__) -+ #include -+#endif -+ -+#include "controller.h" -+ -+ -+static int32_t udp_has_protocol(lua_State *L, struct protocol_buf * prot_buf, lua_packet_segment * seg, int32_t protocol_type) -+{ -+ return 1; -+} -+ -+static const struct protocol_field udp_protocol_fields[] = { -+ /* field name offset length getter setter */ -+ { "sport", 0, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "dport", 16, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "length", 32, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "check", 48, 16, get_16_bit_generic, set_16_bit_generic }, -+ { "data", 64, 0, NULL, NULL }, -+ PROT_FIELD_SENTINEL, -+}; -+ -+static const struct protocol_buf udp_protocol_buf = { -+ .is_dynamic = 0, -+ .name = LUA_PACKET_SEG_UDP, -+ .payload_field = "data", -+ .protocol_fields = (struct protocol_field *)&udp_protocol_fields, -+ .has_protocol = &udp_has_protocol, -+ .get_field_changes = NULL, -+}; -+ -+void luaopen_protbuf_udp(lua_State *L) -+{ -+ register_protbuf(L, (struct protocol_buf *)&udp_protocol_buf, PACKET_UDP); -+} ---- /dev/null -+++ b/extensions/LUA/xt_LUA.h -@@ -0,0 +1,36 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#ifndef XT_LUA_H_ -+#define XT_LUA_H_ -+ -+#define MAX_FILENAME_SIZE 256 -+#define MAX_FUNCTION_SIZE 256 -+#define MAX_SCRIPT_SIZE 32768 -+#define LUA_STATE_ARRAY_SIZE 128 -+ -+/* the targetsize is stored in a u16, so max size of the xt_lua_tginfo cannot exceed 64K*/ -+struct xt_lua_tginfo { -+ char buf[MAX_SCRIPT_SIZE]; -+ char filename[MAX_FILENAME_SIZE]; -+ char function[MAX_FUNCTION_SIZE]; -+ __u64 script_size; -+ __u32 state_id; -+}; -+ -+#endif /* XT_LUA_H_ */ ---- /dev/null -+++ b/extensions/LUA/xt_LUA_target.c -@@ -0,0 +1,286 @@ -+/* -+ * Copyright (C) 2010 University of Basel -+ * by Andre Graf -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see . -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "xt_LUA.h" -+ -+#include "controller.h" -+ -+/*::* -+ * lua_envs -+ * ---------- -+ * This array holds a defined number of `lua_envs`_ structures. -+ * The used array index is also used as the Lua state identifier. -+ * The size of the array is defined in `LUA_STATE_ARRAY_SIZE`_. -+ */ -+struct lua_env * lua_envs[LUA_STATE_ARRAY_SIZE]; -+ -+/*::* -+ * lua_state_refs -+ * -------------- -+ * This array holds the reference counts of the several `lua_nf_state`_s -+ * which are stored inside the array `lua_states`_. -+ */ -+uint32_t lua_state_refs[LUA_STATE_ARRAY_SIZE] = { 0 }; -+ -+/*::* -+ * lua_tg -+ * ------ -+ * This function is called whenever a packet matches all matching conditions -+ * inside a rule. It is the target. It extracts the state identifier comming -+ * inside the *xt_target_param* structure and uses it to access the proper -+ * Lua state inside the `lua_states`_ array. -+ * -+ * It then constructs a new Lua userdata of type *lua_packet_segment* and -+ * initializes it with the lowest network header available. This userdata -+ * is annotated with the Lua metatable `LUA_PACKET_SEG_RAW`_ which converts -+ * the userdata to a raw lua packet having all raw functions available. -+ * This raw packet is the single parameter to the Lua function *process_packet* -+ * which must be defined inside the Lua script provided by the user. So far -+ * hardcoded, may be later configured by Lua - subject to change. -+ * -+ * The process_packet function must return an integer value, the verdict. For -+ * convenience reasons xt_LUA exports the verdicts NF_ACCEPT, NF_DROP and -+ * XT_CONTINUE inside the *register_lua_packet_lib* function. -+ */ -+ -+spinlock_t lock = SPIN_LOCK_UNLOCKED; -+ -+static uint32_t -+lua_tg(struct sk_buff *pskb, const struct xt_target_param *par) -+{ -+ uint32_t verdict; -+ lua_packet_segment *p; -+ const struct xt_lua_tginfo *info = par->targinfo; -+ lua_State * L; -+ -+ /* START critical section on SMP, PacketScript is on the sequential trail at the moment TODO*/ -+ spin_lock_irq(&lock); -+ -+ L = lua_envs[info->state_id]->L; -+ -+ if (!skb_make_writable(pskb, pskb->len)) -+ return NF_DROP; -+ -+ /* call the function provided by --function parameter or the default 'process_packet' defined in Lua */ -+ lua_getglobal(L, info->function); -+ -+ /* push the lua_packet_segment as a parameter */ -+ p = (lua_packet_segment *)lua_newuserdata(L, sizeof(lua_packet_segment)); -+ if (pskb->mac_header) -+ p->start = pskb->mac_header; -+ else if (pskb->network_header) -+ p->start = pskb->network_header; -+ else if (pskb->transport_header) -+ p->start = pskb->transport_header; -+ p->offset = 0; -+ p->length = (unsigned long)pskb->tail - (unsigned long)p->start; -+ p->changes = NULL; -+ -+ /* marking userdata 'lua_packet_seg' with the corresponding metatable */ -+ luaL_getmetatable(L, LUA_PACKET_SEG_RAW); -+ lua_setmetatable(L, -2); -+ -+ /* push a reference to the skb as a parameter, needed at the moment for calculating TCP checksum, but I am not happy with it*/ -+ lua_pushlightuserdata(L, (void *)skb_get(pskb)); -+ -+ /* do the function call (2 argument, 1 result) */ -+ if (lua_pcall(L, 2, 1, 0) != 0) { -+ printk(KERN_ERR "LUA [%d]: pcall '%s' failed: %s\n", info->state_id, info->function, lua_tostring(L, -1)); -+ lua_pop(L, 1); -+ return NF_DROP; -+ } -+ -+ if (!lua_isnumber(L, -1)) { -+ printk(KERN_ERR "LUA [%d]: function '%s' must return a verdict\n", info->state_id, info->function); -+ lua_pop(L, 1); -+ return NF_DROP; -+ } -+ -+ verdict = lua_tonumber(L, -1); -+ lua_pop(L, 1); -+ -+ kfree_skb(pskb); -+ -+ /* END critical section on SMP */ -+ spin_unlock_irq(&lock); -+ -+ -+ return verdict; -+ -+} -+/* Helper for checkentry */ -+static bool load_script_into_state(uint32_t state_id, unsigned long script_size, char *script_buf) -+{ -+ char *buf = kmalloc(script_size, GFP_KERNEL); -+ int32_t ret; -+ struct lua_env * env = kmalloc(sizeof(struct lua_env), GFP_KERNEL); -+ -+ if (!script_size > 0) { -+ pr_debug("LUA [%d]: script_size %lu < 0\n", state_id, script_size); -+ return false; -+ } -+ -+ env->L = lua_open(); -+ luaopen_base(env->L); -+ luaopen_controller(env->L); -+ -+ lua_getglobal(env->L, "_G"); -+ lua_pushinteger(env->L, state_id); -+ lua_setfield(env->L, -2, "STATE_ID"); -+ lua_pop(env->L, 1); /* pop _G */ -+ -+ strncpy(buf, script_buf, script_size); -+ ret = luaL_loadbuffer(env->L, buf, script_size, "PacketScript, loadbuffer") || -+ lua_pcall(env->L, 0, 1, 0); -+ -+ if (ret != 0) { -+ printk(KERN_ERR "LUA [%d]: failure loading script, error %s \n", state_id, lua_tostring(env->L, -1)); -+ lua_pop(env->L, 1); -+ kfree(buf); -+ kfree(env); -+ return false; -+ } -+ -+ lua_envs[state_id] = env; -+ -+ kfree(buf); -+ -+ return true; -+} -+/*::* -+ * lua_tg_checkentry -+ * ----------------- -+ * This function is used as a kernel-side sanity check of the data comming -+ * from the iptables userspace program. Since this is the function which is -+ * called everytime a new rule (with -j xt_LUA) is injected, this function -+ * is used to do the bookkeeping work, such as counting the reference of -+ * several Lua states and the initialization of new states if needed. As an -+ * extra initialization step it loads the provided Lua script into the Lua -+ * state. -+ * -+ * Lua state initialization -+ * ~~~~~~~~~~~~~~~~~~~~~~~~ -+ * 1. If a new rule is inserted and there is no existing state for the given -+ * state identifier (default state identifier is 0) a new Lua state is -+ * initialized using *lua_open*. -+ * 2. The Lua base library is registered inside the newly initialized state. -+ * Have a look at *lua/lbaselib.c* to see what functions of the Lua base -+ * library are available inside Lua. -+ * 3. The Lua packet library is registered inside the Lua state using the -+ * function *register_lua_packet_lib*. So far this function only registers -+ * the Netfilter verdicts NF_ACCEPT, NF_DROP and XT_CONTINUE inside the -+ * global environment of the given Lua state. -+ * 4. All the protocol Buffers, and the functions for accessing the bytes are -+ * registered using *register_protocols*. -+ * -+ * Lua state reference counting -+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -+ * Bookkeeping of the Lua states inside the *lua_state_refs* array. The -+ * state identifier is mapped to the array index, which holds an integer -+ * counting the several initialized states. -+ * -+ * Loading the Lua script -+ * ~~~~~~~~~~~~~~~~~~~~~~ -+ * Copying the buffer which was initialized by the userspace program to a -+ * buffer with the proper size. The script is then loaded by the function -+ * xt_LUA_loadcode, which wrapps the *luaL_loadbuffer* function and does -+ * some workqueue initialization. So far this is done each time this function -+ * is called, subject to change. -+ */ -+static bool -+lua_tg_checkentry(const struct xt_tgchk_param *par) -+{ -+ const struct xt_lua_tginfo *info = par->targinfo; -+ -+ if (load_script_into_state(info->state_id, info->script_size, (char *)info->buf)) { -+ lua_state_refs[info->state_id]++; -+ return true; -+ } -+ return false; -+} -+ -+/*::* -+ * lua_tg_destroy -+ * -------------- -+ * This function is the counterpart of the `lua_tg_checkentry`_ function. It is -+ * responsible to free all the resources alocated inside the checkentry process. -+ * To be more specific it frees the Lua state using *lua_close* and kfree on all -+ * the dynamically allocated pointers to the registered dynamic protocol buffers. -+ * -+ * Additionally the function cares about decrementing the reference counters -+ * inside the array `lua_states`_. -+ */ -+static void -+lua_tg_destroy(const struct xt_tgdtor_param *par) -+{ -+ const struct xt_lua_tginfo *info = par->targinfo; -+ struct lua_env * env = lua_envs[info->state_id]; -+ -+ if (lua_state_refs[info->state_id] == 1) { -+ lua_close(env->L); -+ cleanup_dynamic_prot_bufs(); /* clean memory allocated by protocols defined in Lua */ -+ kfree(env); -+ pr_debug("LUA [%d]: Rule removed, close Lua state\n", info->state_id); -+ } else -+ pr_debug("LUA [%d]: Rule removed, Lua state stays open, referenced %d time(s)\n", -+ info->state_id, lua_state_refs[info->state_id] - 1); -+ -+ lua_state_refs[info->state_id]--; -+} -+ -+static struct xt_target lua_tg_reg __read_mostly = { -+ .name = "LUA", -+ .revision = 0, -+ .family = NFPROTO_UNSPEC, -+ .targetsize = XT_ALIGN(sizeof(struct xt_lua_tginfo)), -+ .target = lua_tg, -+ .checkentry = lua_tg_checkentry, -+ .destroy = lua_tg_destroy, -+ .me = THIS_MODULE, -+}; -+ -+ -+static int32_t lua_tg_init(void) -+{ -+ return xt_register_target(&lua_tg_reg); -+} -+ -+static void lua_tg_exit(void) -+{ -+ xt_unregister_target(&lua_tg_reg); -+} -+ -+module_init(lua_tg_init); -+module_exit(lua_tg_exit); -+ -+MODULE_AUTHOR("Andre Graf "); -+MODULE_DESCRIPTION("Xtables: Processing of matched packets using the Lua scripting environment"); -+MODULE_ALIAS("ipt_LUA"); -+MODULE_ALIAS("ipt6t_LUA"); -+MODULE_ALIAS("arpt_LUA"); -+MODULE_ALIAS("ebt_LUA"); -+MODULE_LICENSE("GPL"); -+ -+ -+ ---- a/extensions/Kbuild -+++ b/extensions/Kbuild -@@ -27,6 +27,7 @@ obj-${build_pknock} += pknock/ - obj-${build_psd} += xt_psd.o - obj-${build_quota2} += xt_quota2.o - obj-${build_rtsp} += rtsp/ -+obj-${build_LUA} += LUA/ - - -include ${M}/*.Kbuild - -include ${M}/Kbuild.* ---- a/extensions/Mbuild -+++ b/extensions/Mbuild -@@ -22,3 +22,4 @@ obj-${build_pknock} += pknock/ - obj-${build_psd} += libxt_psd.so - obj-${build_quota2} += libxt_quota2.so - obj-${build_gradm} += libxt_gradm.so -+obj-${build_LUA} += LUA/ ---- a/mconfig -+++ b/mconfig -@@ -23,3 +23,4 @@ build_pknock=m - build_psd=m - build_quota2=m - build_rtsp=m -+build_LUA=m diff --git a/package/network/utils/xtables-addons/patches/201-fix-lua-packetscript.patch b/package/network/utils/xtables-addons/patches/201-fix-lua-packetscript.patch deleted file mode 100644 index a9fb796d0..000000000 --- a/package/network/utils/xtables-addons/patches/201-fix-lua-packetscript.patch +++ /dev/null @@ -1,127 +0,0 @@ ---- a/extensions/LUA/xt_LUA_target.c -+++ b/extensions/LUA/xt_LUA_target.c -@@ -19,7 +19,7 @@ - #include - #include - #include --#include -+#include - #include - #include - #include "xt_LUA.h" -@@ -64,10 +64,10 @@ uint32_t lua_state_refs[LUA_STATE_ARRAY - * XT_CONTINUE inside the *register_lua_packet_lib* function. - */ - --spinlock_t lock = SPIN_LOCK_UNLOCKED; -+DEFINE_SPINLOCK(lock); - - static uint32_t --lua_tg(struct sk_buff *pskb, const struct xt_target_param *par) -+lua_tg(struct sk_buff *pskb, const struct xt_action_param *par) - { - uint32_t verdict; - lua_packet_segment *p; -@@ -88,11 +88,11 @@ lua_tg(struct sk_buff *pskb, const struc - /* push the lua_packet_segment as a parameter */ - p = (lua_packet_segment *)lua_newuserdata(L, sizeof(lua_packet_segment)); - if (pskb->mac_header) -- p->start = pskb->mac_header; -+ p->start = skb_mac_header(pskb); - else if (pskb->network_header) -- p->start = pskb->network_header; -+ p->start = skb_network_header(pskb); - else if (pskb->transport_header) -- p->start = pskb->transport_header; -+ p->start = skb_transport_header(pskb); - p->offset = 0; - p->length = (unsigned long)pskb->tail - (unsigned long)p->start; - p->changes = NULL; -@@ -208,16 +208,16 @@ static bool load_script_into_state(uint3 - * some workqueue initialization. So far this is done each time this function - * is called, subject to change. - */ --static bool -+static int - lua_tg_checkentry(const struct xt_tgchk_param *par) - { - const struct xt_lua_tginfo *info = par->targinfo; - - if (load_script_into_state(info->state_id, info->script_size, (char *)info->buf)) { - lua_state_refs[info->state_id]++; -- return true; -+ return 0; - } -- return false; -+ return -EINVAL; - } - - /*::* ---- a/extensions/LUA/lua/llimits.h -+++ b/extensions/LUA/lua/llimits.h -@@ -8,7 +8,6 @@ - #define llimits_h - - #include --#include - - #include "lua.h" - ---- a/extensions/LUA/lua/lapi.c -+++ b/extensions/LUA/lua/lapi.c -@@ -4,9 +4,6 @@ - ** See Copyright Notice in lua.h - */ - --#include --#include --#include - #include - - #define lapi_c ---- a/extensions/LUA/lua/ltable.c -+++ b/extensions/LUA/lua/ltable.c -@@ -18,7 +18,6 @@ - ** Hence even when the load factor reaches 100%, performance remains good. - */ - --#include - #include - - #define ltable_c ---- a/extensions/LUA/lua/luaconf.h -+++ b/extensions/LUA/lua/luaconf.h -@@ -13,8 +13,12 @@ - #if !defined(__KERNEL__) - #include - #else -+#include -+ -+#undef UCHAR_MAX -+#undef BUFSIZ -+#undef NO_FPU - #define UCHAR_MAX 255 --#define SHRT_MAX 32767 - #define BUFSIZ 8192 - #define NO_FPU - #endif -@@ -637,6 +641,8 @@ union luai_Cast { double l_d; long l_l; - */ - #if defined(__KERNEL__) - #undef LUA_USE_ULONGJMP -+#define setjmp __builtin_setjmp -+#define longjmp __builtin_longjmp - #endif - - #if defined(__cplusplus) ---- a/extensions/LUA/lua/llex.h -+++ b/extensions/LUA/lua/llex.h -@@ -10,6 +10,8 @@ - #include "lobject.h" - #include "lzio.h" - -+/* prevent conflict with definition from asm/current.h */ -+#undef current - - #define FIRST_RESERVED 257 - diff --git a/package/network/utils/xtables-addons/patches/300-geoip-endian-detection.patch b/package/network/utils/xtables-addons/patches/300-geoip-endian-detection.patch deleted file mode 100644 index 842e7afcc..000000000 --- a/package/network/utils/xtables-addons/patches/300-geoip-endian-detection.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/extensions/libxt_geoip.c -+++ b/extensions/libxt_geoip.c -@@ -59,13 +59,13 @@ geoip_get_subnets(const char *code, uint - - /* Use simple integer vector files */ - if (nfproto == NFPROTO_IPV6) { --#if __BYTE_ORDER == _BIG_ENDIAN -+#if BYTE_ORDER == BIG_ENDIAN - snprintf(buf, sizeof(buf), GEOIP_DB_DIR "/BE/%s.iv6", code); - #else - snprintf(buf, sizeof(buf), GEOIP_DB_DIR "/LE/%s.iv6", code); - #endif - } else { --#if __BYTE_ORDER == _BIG_ENDIAN -+#if BYTE_ORDER == BIG_ENDIAN - snprintf(buf, sizeof(buf), GEOIP_DB_DIR "/BE/%s.iv4", code); - #else - snprintf(buf, sizeof(buf), GEOIP_DB_DIR "/LE/%s.iv4", code); diff --git a/package/system/fstools/Makefile b/package/system/fstools/Makefile index e26e39b54..494f90d2e 100644 --- a/package/system/fstools/Makefile +++ b/package/system/fstools/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/fstools.git -PKG_SOURCE_DATE:=2018-01-13 -PKG_SOURCE_VERSION:=18090d97b61cc091ed3f49c3ec8ba42c761f1d15 -PKG_MIRROR_HASH:=165c1b19778138910905528ead080413fb741c5dfc191da72979c00d49df6e0d +PKG_SOURCE_DATE:=2018-04-16 +PKG_SOURCE_VERSION:=e24368361db166cf369a19cea773bd54f9d854b1 +PKG_MIRROR_HASH:=8b483e752578683224245a6d77b3d7172b7cf7a8c3b959e21c47ff18aefc2464 CMAKE_INSTALL:=1 PKG_LICENSE:=GPL-2.0 diff --git a/package/system/mtd/src/Makefile b/package/system/mtd/src/Makefile index 4e39a8931..daeadbcd3 100644 --- a/package/system/mtd/src/Makefile +++ b/package/system/mtd/src/Makefile @@ -4,13 +4,14 @@ LDFLAGS += -lubox obj = mtd.o jffs2.o crc32.o md5.o obj.seama = seama.o md5.o +obj.wrg = wrg.o md5.o obj.wrgg = wrgg.o md5.o obj.ar71xx = trx.o $(obj.seama) $(obj.wrgg) obj.brcm = trx.o obj.brcm47xx = $(obj.brcm) obj.bcm53xx = $(obj.brcm) $(obj.seama) obj.brcm63xx = imagetag.o -obj.ramips = $(obj.seama) +obj.ramips = $(obj.seama) $(obj.wrg) obj.mvebu = linksys_bootcount.o obj.kirkwood = linksys_bootcount.o obj.ipq806x = linksys_bootcount.o diff --git a/package/system/mtd/src/mtd.c b/package/system/mtd/src/mtd.c index e66e647c0..fa04c0f95 100644 --- a/package/system/mtd/src/mtd.c +++ b/package/system/mtd/src/mtd.c @@ -54,6 +54,7 @@ #define TRX_MAGIC 0x48445230 /* "HDR0" */ #define SEAMA_MAGIC 0x5ea3a417 +#define WRG_MAGIC 0x20040220 #define WRGG03_MAGIC 0x20080321 #if !defined(__BYTE_ORDER) @@ -76,6 +77,7 @@ enum mtd_image_format { MTD_IMAGE_FORMAT_UNKNOWN, MTD_IMAGE_FORMAT_TRX, MTD_IMAGE_FORMAT_SEAMA, + MTD_IMAGE_FORMAT_WRG, MTD_IMAGE_FORMAT_WRGG03, }; @@ -205,6 +207,8 @@ image_check(int imagefd, const char *mtd) imageformat = MTD_IMAGE_FORMAT_TRX; else if (be32_to_cpu(magic) == SEAMA_MAGIC) imageformat = MTD_IMAGE_FORMAT_SEAMA; + else if (le32_to_cpu(magic) == WRG_MAGIC) + imageformat = MTD_IMAGE_FORMAT_WRG; else if (le32_to_cpu(magic) == WRGG03_MAGIC) imageformat = MTD_IMAGE_FORMAT_WRGG03; @@ -214,7 +218,7 @@ image_check(int imagefd, const char *mtd) ret = trx_check(imagefd, mtd, buf, &buflen); break; case MTD_IMAGE_FORMAT_SEAMA: - break; + case MTD_IMAGE_FORMAT_WRG: case MTD_IMAGE_FORMAT_WRGG03: break; default: @@ -634,7 +638,7 @@ resume: continue; } - if (mtd_erase_block(fd, e) < 0) { + if (mtd_erase_block(fd, e + part_offset) < 0) { if (next) { if (w < e) { write(fd, buf + offset, e - w); @@ -685,6 +689,10 @@ resume: if (mtd_fixseama) mtd_fixseama(mtd, 0, 0); break; + case MTD_IMAGE_FORMAT_WRG: + if (mtd_fixwrg) + mtd_fixwrg(mtd, 0, 0); + break; case MTD_IMAGE_FORMAT_WRGG03: if (mtd_fixwrgg) mtd_fixwrgg(mtd, 0, 0); @@ -734,6 +742,10 @@ static void usage(void) fprintf(stderr, " fixseama fix the checksum in a seama header on first boot\n"); } + if (mtd_fixwrg) { + fprintf(stderr, + " fixwrg fix the checksum in a wrg header on first boot\n"); + } if (mtd_fixwrgg) { fprintf(stderr, " fixwrgg fix the checksum in a wrgg header on first boot\n"); @@ -755,9 +767,9 @@ static void usage(void) fprintf(stderr, " -o offset offset of the image header in the partition(for fixtrx)\n"); } - if (mtd_fixtrx || mtd_fixseama || mtd_fixwrgg) { + if (mtd_fixtrx || mtd_fixseama || mtd_fixwrg || mtd_fixwrgg) { fprintf(stderr, - " -c datasize amount of data to be used for checksum calculation (for fixtrx / fixseama / fixwrgg)\n"); + " -c datasize amount of data to be used for checksum calculation (for fixtrx / fixseama / fixwrg / fixwrgg)\n"); } fprintf(stderr, #ifdef FIS_SUPPORT @@ -798,6 +810,7 @@ int main (int argc, char **argv) CMD_JFFS2WRITE, CMD_FIXTRX, CMD_FIXSEAMA, + CMD_FIXWRG, CMD_FIXWRGG, CMD_VERIFY, CMD_DUMP, @@ -913,6 +926,9 @@ int main (int argc, char **argv) } else if (((strcmp(argv[0], "fixseama") == 0) && (argc == 2)) && mtd_fixseama) { cmd = CMD_FIXSEAMA; device = argv[1]; + } else if (((strcmp(argv[0], "fixwrg") == 0) && (argc == 2)) && mtd_fixwrg) { + cmd = CMD_FIXWRG; + device = argv[1]; } else if (((strcmp(argv[0], "fixwrgg") == 0) && (argc == 2)) && mtd_fixwrgg) { cmd = CMD_FIXWRGG; device = argv[1]; @@ -1012,6 +1028,10 @@ int main (int argc, char **argv) if (mtd_fixseama) mtd_fixseama(device, 0, data_size); break; + case CMD_FIXWRG: + if (mtd_fixwrg) + mtd_fixwrg(device, 0, data_size); + break; case CMD_FIXWRGG: if (mtd_fixwrgg) mtd_fixwrgg(device, 0, data_size); diff --git a/package/system/mtd/src/mtd.h b/package/system/mtd/src/mtd.h index 50a42da14..0250a90e0 100644 --- a/package/system/mtd/src/mtd.h +++ b/package/system/mtd/src/mtd.h @@ -27,6 +27,7 @@ extern int trx_fixup(int fd, const char *name) __attribute__ ((weak)); extern int trx_check(int imagefd, const char *mtd, char *buf, int *len) __attribute__ ((weak)); extern int mtd_fixtrx(const char *mtd, size_t offset, size_t data_size) __attribute__ ((weak)); extern int mtd_fixseama(const char *mtd, size_t offset, size_t data_size) __attribute__ ((weak)); +extern int mtd_fixwrg(const char *mtd, size_t offset, size_t data_size) __attribute__ ((weak)); extern int mtd_fixwrgg(const char *mtd, size_t offset, size_t data_size) __attribute__ ((weak)); extern int mtd_resetbc(const char *mtd) __attribute__ ((weak)); #endif /* __mtd_h */ diff --git a/package/system/mtd/src/wrg.c b/package/system/mtd/src/wrg.c new file mode 100644 index 000000000..879cf1bbe --- /dev/null +++ b/package/system/mtd/src/wrg.c @@ -0,0 +1,208 @@ +/* + * wrg.c + * + * Copyright (C) 2005 Mike Baker + * Copyright (C) 2008 Felix Fietkau + * Copyright (C) 2011-2012 Gabor Juhos + * Copyright (C) 2016 Stijn Tintel + * Copyright (C) 2017 George Hopkins + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include "mtd.h" +#include "md5.h" + +#if !defined(__BYTE_ORDER) +#error "Unknown byte order" +#endif + +#if __BYTE_ORDER == __BIG_ENDIAN +#define cpu_to_le32(x) bswap_32(x) +#define le32_to_cpu(x) bswap_32(x) +#elif __BYTE_ORDER == __LITTLE_ENDIAN +#define cpu_to_le32(x) (x) +#define le32_to_cpu(x) (x) +#else +#error "Unsupported endianness" +#endif + +#define WRG_MAGIC 0x20040220 + +struct wrg_header { + char signature[32]; + uint32_t magic1; + uint32_t magic2; + uint32_t size; + uint32_t offset; + char devname[32]; + char digest[16]; +} __attribute__ ((packed)); + +ssize_t pread(int fd, void *buf, size_t count, off_t offset); +ssize_t pwrite(int fd, const void *buf, size_t count, off_t offset); + +int +wrg_fix_md5(struct wrg_header *shdr, int fd, size_t data_offset, size_t data_size) +{ + char *buf; + ssize_t res; + MD5_CTX ctx; + unsigned char digest[16]; + int i; + int err = 0; + + buf = malloc(data_size); + if (!buf) { + err = -ENOMEM; + goto err_out; + } + + res = pread(fd, buf, data_size, data_offset); + if (res != data_size) { + perror("pread"); + err = -EIO; + goto err_free; + } + + MD5_Init(&ctx); + MD5_Update(&ctx, (char *)&shdr->offset, sizeof(shdr->offset)); + MD5_Update(&ctx, (char *)&shdr->devname, sizeof(shdr->devname)); + MD5_Update(&ctx, buf, data_size); + MD5_Final(digest, &ctx); + + if (!memcmp(digest, shdr->digest, sizeof(digest))) { + if (quiet < 2) + fprintf(stderr, "the header is fixed already\n"); + return -1; + } + + if (quiet < 2) { + fprintf(stderr, "new size: %u, new MD5: ", data_size); + for (i = 0; i < sizeof(digest); i++) + fprintf(stderr, "%02x", digest[i]); + + fprintf(stderr, "\n"); + } + + /* update the size in the image */ + shdr->size = cpu_to_le32(data_size); + + /* update the checksum in the image */ + memcpy(shdr->digest, digest, sizeof(digest)); + +err_free: + free(buf); +err_out: + return err; +} + +int +mtd_fixwrg(const char *mtd, size_t offset, size_t data_size) +{ + int fd; + char *first_block; + ssize_t res; + size_t block_offset; + size_t data_offset; + struct wrg_header *shdr; + + if (quiet < 2) + fprintf(stderr, "Trying to fix WRG header in %s at 0x%x...\n", + mtd, offset); + + block_offset = offset & ~(erasesize - 1); + offset -= block_offset; + + fd = mtd_check_open(mtd); + if(fd < 0) { + fprintf(stderr, "Could not open mtd device: %s\n", mtd); + exit(1); + } + + if (block_offset + erasesize > mtdsize) { + fprintf(stderr, "Offset too large, device size 0x%x\n", + mtdsize); + exit(1); + } + + first_block = malloc(erasesize); + if (!first_block) { + perror("malloc"); + exit(1); + } + + res = pread(fd, first_block, erasesize, block_offset); + if (res != erasesize) { + perror("pread"); + exit(1); + } + + shdr = (struct wrg_header *)(first_block + offset); + if (le32_to_cpu(shdr->magic1) != WRG_MAGIC) { + fprintf(stderr, "No WRG header found (%08x != %08x)\n", + le32_to_cpu(shdr->magic1), WRG_MAGIC); + exit(1); + } else if (!le32_to_cpu(shdr->size)) { + fprintf(stderr, "WRG entity with empty image\n"); + exit(1); + } + + data_offset = offset + sizeof(struct wrg_header); + if (!data_size) + data_size = mtdsize - data_offset; + if (data_size > le32_to_cpu(shdr->size)) + data_size = le32_to_cpu(shdr->size); + if (wrg_fix_md5(shdr, fd, data_offset, data_size)) + goto out; + + if (mtd_erase_block(fd, block_offset)) { + fprintf(stderr, "Can't erease block at 0x%x (%s)\n", + block_offset, strerror(errno)); + exit(1); + } + + if (quiet < 2) + fprintf(stderr, "Rewriting block at 0x%x\n", block_offset); + + if (pwrite(fd, first_block, erasesize, block_offset) != erasesize) { + fprintf(stderr, "Error writing block (%s)\n", strerror(errno)); + exit(1); + } + + if (quiet < 2) + fprintf(stderr, "Done.\n"); + +out: + close (fd); + sync(); + + return 0; +} diff --git a/package/system/procd/Makefile b/package/system/procd/Makefile index d615dd01d..5971e0293 100644 --- a/package/system/procd/Makefile +++ b/package/system/procd/Makefile @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=procd -PKG_RELEASE:=2 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git -PKG_SOURCE_DATE:=2018-12-02 -PKG_SOURCE_VERSION:=a5954cf302fe46d8e29770c818336763112b9a6e -PKG_MIRROR_HASH:=1afa1f0160dd8ffac310e75519601c1f9a6107d818f405bb3fe9ef3e7143c2e3 +PKG_SOURCE_DATE:=2018-03-28 +PKG_SOURCE_VERSION:=dfb68f8556df63878add145ad9c656381bc20656 +PKG_MIRROR_HASH:=8d2c70fb0264a6548e39acc5ab1c44cec50fc550c4f931760b0796f8893c9b7f CMAKE_INSTALL:=1 PKG_LICENSE:=GPL-2.0 diff --git a/package/system/procd/files/procd.sh b/package/system/procd/files/procd.sh index 3c81928bb..6f16b746f 100644 --- a/package/system/procd/files/procd.sh +++ b/package/system/procd/files/procd.sh @@ -33,7 +33,7 @@ # Send a signal to a service instance (or all instances) # -. $IPKG_INSTROOT/usr/share/libubox/jshn.sh +. "$IPKG_INSTROOT/usr/share/libubox/jshn.sh" PROCD_RELOAD_DELAY=1000 _PROCD_SERVICE= @@ -42,6 +42,14 @@ procd_lock() { local basescript=$(readlink "$initscript") local service_name="$(basename ${basescript:-$initscript})" + flock -n 1000 &> /dev/null + if [ "$?" != "0" ]; then + exec 1000>"$IPKG_INSTROOT/var/lock/procd_${service_name}.lock" + flock 1000 + if [ "$?" != "0" ]; then + logger "warning: procd flock for $service_name failed" + fi + fi } _procd_call() { diff --git a/package/system/rpcd/Makefile b/package/system/rpcd/Makefile index 2dc960e48..33e21ff02 100644 --- a/package/system/rpcd/Makefile +++ b/package/system/rpcd/Makefile @@ -12,10 +12,10 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/rpcd.git -PKG_SOURCE_DATE:=2017-12-07 -PKG_SOURCE_VERSION:=cfe1e75c91bc1bac82e6caab3e652b0ebee59524 +PKG_SOURCE_DATE:=2018-04-20 +PKG_SOURCE_VERSION:=66a9bad1a73bc33c4c5a9a00de8dc8ad35bdfaf1 PKG_MAINTAINER:=Jo-Philipp Wich -PKG_MIRROR_HASH:=4857497c88115defbf6add68a37975ed79e8f992e65d7d0df56cd29288dea379 +PKG_MIRROR_HASH:=fb8c511d64137b1e539815fdaebf7e5aa05611dfeab6d003823f40512ef90b3c PKG_LICENSE:=ISC PKG_LICENSE_FILES:= diff --git a/package/system/ubox/Makefile b/package/system/ubox/Makefile index 299872ed4..89cc6768f 100644 --- a/package/system/ubox/Makefile +++ b/package/system/ubox/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubox.git -PKG_SOURCE_DATE:=2017-11-06 -PKG_SOURCE_VERSION:=2c0d9cfe05e9712d44622c6bb4558e97359bfb76 -PKG_MIRROR_HASH:=e545a29959a310fd7243ee2e799bf9f759894ea4e872010a781c3a65290377b6 +PKG_SOURCE_DATE:=2018-02-14 +PKG_SOURCE_VERSION:=128bc35fa951ac3beff6e977bc3cced87c2e2600 +PKG_MIRROR_HASH:=f58dfb9a9bb69c6303cb69bbd850b14bd29ec59ea240bac4063fd74a7fce64aa CMAKE_INSTALL:=1 PKG_LICENSE:=GPL-2.0 diff --git a/package/system/ubox/files/log.init b/package/system/ubox/files/log.init index 722dc20e9..21e078712 100644 --- a/package/system/ubox/files/log.init +++ b/package/system/ubox/files/log.init @@ -39,7 +39,7 @@ start_service_daemon() procd_open_instance procd_set_param command "/sbin/logd" procd_append_param command -S "${log_buffer_size}" - procd_set_param respawn + procd_set_param respawn 5 1 -1 procd_close_instance } diff --git a/package/system/ubus/Makefile b/package/system/ubus/Makefile index 39854f48f..7dc3c92de 100644 --- a/package/system/ubus/Makefile +++ b/package/system/ubus/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubus.git -PKG_SOURCE_DATE:=2017-11-13 -PKG_SOURCE_VERSION:=5f87f5480ebf004d735dbf44259d08cf8affd305 -PKG_MIRROR_HASH:=a490348da86c6cdf0cbc8cc01b77fa6f708d86b94674fd312e0c822ca3d7eba0 +PKG_SOURCE_DATE:=2018-01-16 +PKG_SOURCE_VERSION:=5bae22eb5472c9c7cc30caa9a84004bba19940d3 +PKG_MIRROR_HASH:=6f46398279339dcc597965306275fe1272af384f8cb253ee8de2c68e366eed55 CMAKE_INSTALL:=1 PKG_LICENSE:=LGPL-2.1 diff --git a/package/system/uci/Makefile b/package/system/uci/Makefile index d5b4eac4a..eec45ae94 100644 --- a/package/system/uci/Makefile +++ b/package/system/uci/Makefile @@ -13,9 +13,9 @@ PKG_RELEASE:=1 PKG_SOURCE_URL=$(PROJECT_GIT)/project/uci.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE=2018-01-01 -PKG_SOURCE_VERSION:=5beb95da3dbec6db11a6bdfaab7807ee2daf41e6 -PKG_MIRROR_HASH:=123c5d3ed8f86db76ab52584e952c8e870891bca4dab682b753ca384d7d067bf +PKG_SOURCE_DATE=2018-03-24 +PKG_SOURCE_VERSION:=5d2bf09ec594d97eb9284b8c721dbfe10b81a6f6 +PKG_MIRROR_HASH:=61f8cf52950edae851892ed0914dea8e1ab796bcefc095aa5dab28f672dc3301 PKG_LICENSE:=LGPL-2.1 PKG_LICENSE_FILES:= diff --git a/package/utils/busybox/Config-defaults.in b/package/utils/busybox/Config-defaults.in index afb7d48f8..daba431d2 100644 --- a/package/utils/busybox/Config-defaults.in +++ b/package/utils/busybox/Config-defaults.in @@ -13,10 +13,7 @@ config BUSYBOX_DEFAULT_FEDORA_COMPAT config BUSYBOX_DEFAULT_INCLUDE_SUSv2 bool default y -config BUSYBOX_DEFAULT_USE_PORTABLE_CODE - bool - default n -config BUSYBOX_DEFAULT_PLATFORM_LINUX +config BUSYBOX_DEFAULT_LONG_OPTS bool default y config BUSYBOX_DEFAULT_SHOW_USAGE @@ -28,27 +25,15 @@ config BUSYBOX_DEFAULT_FEATURE_VERBOSE_USAGE config BUSYBOX_DEFAULT_FEATURE_COMPRESS_USAGE bool default y -config BUSYBOX_DEFAULT_BUSYBOX +config BUSYBOX_DEFAULT_LFS bool - default n -config BUSYBOX_DEFAULT_FEATURE_INSTALLER - bool - default n -config BUSYBOX_DEFAULT_INSTALL_NO_USR - bool - default n + default y config BUSYBOX_DEFAULT_PAM bool default n -config BUSYBOX_DEFAULT_LONG_OPTS - bool - default y config BUSYBOX_DEFAULT_FEATURE_DEVPTS bool default y -config BUSYBOX_DEFAULT_FEATURE_CLEAN_UP - bool - default n config BUSYBOX_DEFAULT_FEATURE_UTMP bool default n @@ -61,6 +46,15 @@ config BUSYBOX_DEFAULT_FEATURE_PIDFILE config BUSYBOX_DEFAULT_PID_FILE_PATH string default "/var/run" +config BUSYBOX_DEFAULT_BUSYBOX + bool + default n +config BUSYBOX_DEFAULT_FEATURE_INSTALLER + bool + default n +config BUSYBOX_DEFAULT_INSTALL_NO_USR + bool + default n config BUSYBOX_DEFAULT_FEATURE_SUID bool default y @@ -70,21 +64,24 @@ config BUSYBOX_DEFAULT_FEATURE_SUID_CONFIG config BUSYBOX_DEFAULT_FEATURE_SUID_CONFIG_QUIET bool default n -config BUSYBOX_DEFAULT_SELINUX - bool - default n config BUSYBOX_DEFAULT_FEATURE_PREFER_APPLETS bool default y config BUSYBOX_DEFAULT_BUSYBOX_EXEC_PATH string default "/proc/self/exe" +config BUSYBOX_DEFAULT_SELINUX + bool + default n +config BUSYBOX_DEFAULT_FEATURE_CLEAN_UP + bool + default n config BUSYBOX_DEFAULT_FEATURE_SYSLOG bool default y -config BUSYBOX_DEFAULT_FEATURE_HAVE_RPC +config BUSYBOX_DEFAULT_PLATFORM_LINUX bool - default n + default y config BUSYBOX_DEFAULT_STATIC bool default n @@ -97,15 +94,15 @@ config BUSYBOX_DEFAULT_NOMMU config BUSYBOX_DEFAULT_BUILD_LIBBUSYBOX bool default n +config BUSYBOX_DEFAULT_FEATURE_LIBBUSYBOX_STATIC + bool + default n config BUSYBOX_DEFAULT_FEATURE_INDIVIDUAL bool default n config BUSYBOX_DEFAULT_FEATURE_SHARED_BUSYBOX bool default n -config BUSYBOX_DEFAULT_LFS - bool - default y config BUSYBOX_DEFAULT_CROSS_COMPILER_PREFIX string default "" @@ -121,6 +118,9 @@ config BUSYBOX_DEFAULT_EXTRA_LDFLAGS config BUSYBOX_DEFAULT_EXTRA_LDLIBS string default "" +config BUSYBOX_DEFAULT_USE_PORTABLE_CODE + bool + default n config BUSYBOX_DEFAULT_INSTALL_APPLET_SYMLINKS bool default y @@ -340,9 +340,6 @@ config BUSYBOX_DEFAULT_LZCAT config BUSYBOX_DEFAULT_LZMA bool default n -config BUSYBOX_DEFAULT_FEATURE_LZMA_FAST - bool - default n config BUSYBOX_DEFAULT_UNXZ bool default n @@ -409,6 +406,9 @@ config BUSYBOX_DEFAULT_RPM2CPIO config BUSYBOX_DEFAULT_TAR bool default y +config BUSYBOX_DEFAULT_FEATURE_TAR_LONG_OPTIONS + bool + default n config BUSYBOX_DEFAULT_FEATURE_TAR_CREATE bool default y @@ -427,9 +427,6 @@ config BUSYBOX_DEFAULT_FEATURE_TAR_OLDSUN_COMPATIBILITY config BUSYBOX_DEFAULT_FEATURE_TAR_GNU_EXTENSIONS bool default y -config BUSYBOX_DEFAULT_FEATURE_TAR_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_FEATURE_TAR_TO_COMMAND bool default n @@ -457,12 +454,18 @@ config BUSYBOX_DEFAULT_FEATURE_UNZIP_LZMA config BUSYBOX_DEFAULT_FEATURE_UNZIP_XZ bool default n +config BUSYBOX_DEFAULT_FEATURE_LZMA_FAST + bool + default n config BUSYBOX_DEFAULT_BASENAME bool default y config BUSYBOX_DEFAULT_CAT bool default y +config BUSYBOX_DEFAULT_FEATURE_CATN + bool + default n config BUSYBOX_DEFAULT_FEATURE_CATV bool default n @@ -553,21 +556,12 @@ config BUSYBOX_DEFAULT_FEATURE_FANCY_ECHO config BUSYBOX_DEFAULT_ENV bool default y -config BUSYBOX_DEFAULT_FEATURE_ENV_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_EXPAND bool default n -config BUSYBOX_DEFAULT_FEATURE_EXPAND_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_UNEXPAND bool default n -config BUSYBOX_DEFAULT_FEATURE_UNEXPAND_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_EXPR bool default y @@ -667,21 +661,18 @@ config BUSYBOX_DEFAULT_FEATURE_MD5_SHA1_SUM_CHECK config BUSYBOX_DEFAULT_MKDIR bool default y -config BUSYBOX_DEFAULT_FEATURE_MKDIR_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_MKFIFO bool default y config BUSYBOX_DEFAULT_MKNOD bool default y +config BUSYBOX_DEFAULT_MKTEMP + bool + default y config BUSYBOX_DEFAULT_MV bool default y -config BUSYBOX_DEFAULT_FEATURE_MV_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_NICE bool default y @@ -724,9 +715,6 @@ config BUSYBOX_DEFAULT_RM config BUSYBOX_DEFAULT_RMDIR bool default y -config BUSYBOX_DEFAULT_FEATURE_RMDIR_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_SEQ bool default y @@ -805,6 +793,9 @@ config BUSYBOX_DEFAULT_TEST2 config BUSYBOX_DEFAULT_FEATURE_TEST_64 bool default y +config BUSYBOX_DEFAULT_TIMEOUT + bool + default n config BUSYBOX_DEFAULT_TOUCH bool default y @@ -838,6 +829,9 @@ config BUSYBOX_DEFAULT_UNAME config BUSYBOX_DEFAULT_UNAME_OSNAME string default "GNU/Linux" +config BUSYBOX_DEFAULT_BB_ARCH + bool + default n config BUSYBOX_DEFAULT_UNIQ bool default y @@ -952,9 +946,6 @@ config BUSYBOX_DEFAULT_SETLOGCONS config BUSYBOX_DEFAULT_SHOWKEY bool default n -config BUSYBOX_DEFAULT_MKTEMP - bool - default y config BUSYBOX_DEFAULT_PIPE_PROGRESS bool default n @@ -970,15 +961,27 @@ config BUSYBOX_DEFAULT_FEATURE_RUN_PARTS_FANCY config BUSYBOX_DEFAULT_START_STOP_DAEMON bool default y -config BUSYBOX_DEFAULT_FEATURE_START_STOP_DAEMON_FANCY +config BUSYBOX_DEFAULT_FEATURE_START_STOP_DAEMON_LONG_OPTIONS bool default n -config BUSYBOX_DEFAULT_FEATURE_START_STOP_DAEMON_LONG_OPTIONS +config BUSYBOX_DEFAULT_FEATURE_START_STOP_DAEMON_FANCY bool default n config BUSYBOX_DEFAULT_WHICH bool default y +config BUSYBOX_DEFAULT_MINIPS + bool + default n +config BUSYBOX_DEFAULT_NUKE + bool + default n +config BUSYBOX_DEFAULT_RESUME + bool + default n +config BUSYBOX_DEFAULT_RUN_INIT + bool + default n config BUSYBOX_DEFAULT_AWK bool default y @@ -1165,6 +1168,12 @@ config BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_ZERO_TERM config BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_REPL_STR bool default n +config BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_PARALLEL + bool + default n +config BUSYBOX_DEFAULT_FEATURE_XARGS_SUPPORT_ARGS_FILE + bool + default n config BUSYBOX_DEFAULT_BOOTCHARTD bool default n @@ -1222,12 +1231,6 @@ config BUSYBOX_DEFAULT_INIT_TERMINAL_TYPE config BUSYBOX_DEFAULT_FEATURE_INIT_MODIFY_CMDLINE bool default n -config BUSYBOX_DEFAULT_MESG - bool - default n -config BUSYBOX_DEFAULT_FEATURE_MESG_ENABLE_ONLY_GROUP - bool - default n config BUSYBOX_DEFAULT_FEATURE_SHADOWPASSWDS bool default y @@ -1252,18 +1255,12 @@ config BUSYBOX_DEFAULT_REMOVE_SHELL config BUSYBOX_DEFAULT_ADDGROUP bool default n -config BUSYBOX_DEFAULT_FEATURE_ADDGROUP_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_FEATURE_ADDUSER_TO_GROUP bool default n config BUSYBOX_DEFAULT_ADDUSER bool default n -config BUSYBOX_DEFAULT_FEATURE_ADDUSER_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_FEATURE_CHECK_NAMES bool default n @@ -1441,12 +1438,21 @@ config BUSYBOX_DEFAULT_BLOCKDEV config BUSYBOX_DEFAULT_CAL bool default n +config BUSYBOX_DEFAULT_CHRT + bool + default n config BUSYBOX_DEFAULT_DMESG bool default y config BUSYBOX_DEFAULT_FEATURE_DMESG_PRETTY bool default y +config BUSYBOX_DEFAULT_EJECT + bool + default n +config BUSYBOX_DEFAULT_FEATURE_EJECT_SCSI + bool + default n config BUSYBOX_DEFAULT_FALLOCATE bool default n @@ -1497,7 +1503,7 @@ config BUSYBOX_DEFAULT_FINDFS default n config BUSYBOX_DEFAULT_FLOCK bool - default n + default y config BUSYBOX_DEFAULT_FDFLUSH bool default n @@ -1534,10 +1540,10 @@ config BUSYBOX_DEFAULT_XXD config BUSYBOX_DEFAULT_HWCLOCK bool default y -config BUSYBOX_DEFAULT_FEATURE_HWCLOCK_LONG_OPTIONS +config BUSYBOX_DEFAULT_FEATURE_HWCLOCK_ADJTIME_FHS bool default n -config BUSYBOX_DEFAULT_FEATURE_HWCLOCK_ADJTIME_FHS +config BUSYBOX_DEFAULT_IONICE bool default n config BUSYBOX_DEFAULT_IPCRM @@ -1546,6 +1552,12 @@ config BUSYBOX_DEFAULT_IPCRM config BUSYBOX_DEFAULT_IPCS bool default n +config BUSYBOX_DEFAULT_LAST + bool + default n +config BUSYBOX_DEFAULT_FEATURE_LAST_FANCY + bool + default n config BUSYBOX_DEFAULT_LOSETUP bool default n @@ -1573,6 +1585,12 @@ config BUSYBOX_DEFAULT_FEATURE_MDEV_EXEC config BUSYBOX_DEFAULT_FEATURE_MDEV_LOAD_FIRMWARE bool default n +config BUSYBOX_DEFAULT_MESG + bool + default n +config BUSYBOX_DEFAULT_FEATURE_MESG_ENABLE_ONLY_GROUP + bool + default n config BUSYBOX_DEFAULT_MKE2FS bool default n @@ -1633,10 +1651,10 @@ config BUSYBOX_DEFAULT_FEATURE_MOUNT_FSTAB config BUSYBOX_DEFAULT_FEATURE_MOUNT_OTHERTAB bool default n -config BUSYBOX_DEFAULT_NSENTER +config BUSYBOX_DEFAULT_MOUNTPOINT bool default n -config BUSYBOX_DEFAULT_FEATURE_NSENTER_LONG_OPTS +config BUSYBOX_DEFAULT_NSENTER bool default n config BUSYBOX_DEFAULT_PIVOT_ROOT @@ -1651,6 +1669,9 @@ config BUSYBOX_DEFAULT_RDEV config BUSYBOX_DEFAULT_READPROFILE bool default n +config BUSYBOX_DEFAULT_RENICE + bool + default n config BUSYBOX_DEFAULT_REV bool default n @@ -1675,6 +1696,18 @@ config BUSYBOX_DEFAULT_LINUX64 config BUSYBOX_DEFAULT_SETPRIV bool default n +config BUSYBOX_DEFAULT_FEATURE_SETPRIV_DUMP + bool + default n +config BUSYBOX_DEFAULT_FEATURE_SETPRIV_CAPABILITIES + bool + default n +config BUSYBOX_DEFAULT_FEATURE_SETPRIV_CAPABILITY_NAMES + bool + default n +config BUSYBOX_DEFAULT_SETSID + bool + default n config BUSYBOX_DEFAULT_SWAPON bool default n @@ -1687,9 +1720,18 @@ config BUSYBOX_DEFAULT_FEATURE_SWAPON_PRI config BUSYBOX_DEFAULT_SWAPOFF bool default n +config BUSYBOX_DEFAULT_FEATURE_SWAPONOFF_LABEL + bool + default n config BUSYBOX_DEFAULT_SWITCH_ROOT bool default y +config BUSYBOX_DEFAULT_TASKSET + bool + default n +config BUSYBOX_DEFAULT_FEATURE_TASKSET_FANCY + bool + default n config BUSYBOX_DEFAULT_UEVENT bool default n @@ -1702,6 +1744,9 @@ config BUSYBOX_DEFAULT_FEATURE_UMOUNT_ALL config BUSYBOX_DEFAULT_UNSHARE bool default n +config BUSYBOX_DEFAULT_WALL + bool + default n config BUSYBOX_DEFAULT_FEATURE_MOUNT_LOOP bool default y @@ -1753,6 +1798,9 @@ config BUSYBOX_DEFAULT_FEATURE_VOLUMEID_LINUXSWAP config BUSYBOX_DEFAULT_FEATURE_VOLUMEID_LUKS bool default n +config BUSYBOX_DEFAULT_FEATURE_VOLUMEID_MINIX + bool + default n config BUSYBOX_DEFAULT_FEATURE_VOLUMEID_NILFS bool default n @@ -1825,9 +1873,6 @@ config BUSYBOX_DEFAULT_FEATURE_CHAT_VAR_ABORT_LEN config BUSYBOX_DEFAULT_FEATURE_CHAT_CLR_ABORT bool default n -config BUSYBOX_DEFAULT_CHRT - bool - default n config BUSYBOX_DEFAULT_CONSPY bool default n @@ -1840,6 +1885,9 @@ config BUSYBOX_DEFAULT_FEATURE_CROND_D config BUSYBOX_DEFAULT_FEATURE_CROND_CALL_SENDMAIL bool default n +config BUSYBOX_DEFAULT_FEATURE_CROND_SPECIAL_TIMES + bool + default n config BUSYBOX_DEFAULT_FEATURE_CROND_DIR string default "/etc" @@ -1870,12 +1918,6 @@ config BUSYBOX_DEFAULT_FEATURE_DEVFS config BUSYBOX_DEFAULT_DEVMEM bool default n -config BUSYBOX_DEFAULT_EJECT - bool - default n -config BUSYBOX_DEFAULT_FEATURE_EJECT_SCSI - bool - default n config BUSYBOX_DEFAULT_FBSPLASH bool default n @@ -1912,6 +1954,9 @@ config BUSYBOX_DEFAULT_FEATURE_HDPARM_HDIO_TRISTATE_HWIF config BUSYBOX_DEFAULT_FEATURE_HDPARM_HDIO_GETSET_DMA bool default n +config BUSYBOX_DEFAULT_HEXEDIT + bool + default n config BUSYBOX_DEFAULT_I2CGET bool default n @@ -1927,15 +1972,6 @@ config BUSYBOX_DEFAULT_I2CDETECT config BUSYBOX_DEFAULT_INOTIFYD bool default n -config BUSYBOX_DEFAULT_IONICE - bool - default n -config BUSYBOX_DEFAULT_LAST - bool - default n -config BUSYBOX_DEFAULT_FEATURE_LAST_FANCY - bool - default n config BUSYBOX_DEFAULT_LESS bool default y @@ -1990,9 +2026,6 @@ config BUSYBOX_DEFAULT_MAN config BUSYBOX_DEFAULT_MICROCOM bool default n -config BUSYBOX_DEFAULT_MOUNTPOINT - bool - default n config BUSYBOX_DEFAULT_MT bool default n @@ -2020,27 +2053,18 @@ config BUSYBOX_DEFAULT_RUNLEVEL config BUSYBOX_DEFAULT_RX bool default n -config BUSYBOX_DEFAULT_SETSERIAL +config BUSYBOX_DEFAULT_SETFATTR bool default n -config BUSYBOX_DEFAULT_SETSID +config BUSYBOX_DEFAULT_SETSERIAL bool default n config BUSYBOX_DEFAULT_STRINGS bool default y -config BUSYBOX_DEFAULT_TASKSET - bool - default n -config BUSYBOX_DEFAULT_FEATURE_TASKSET_FANCY - bool - default n config BUSYBOX_DEFAULT_TIME bool default y -config BUSYBOX_DEFAULT_TIMEOUT - bool - default n config BUSYBOX_DEFAULT_TTYSIZE bool default n @@ -2068,9 +2092,6 @@ config BUSYBOX_DEFAULT_UBIRENAME config BUSYBOX_DEFAULT_VOLNAME bool default n -config BUSYBOX_DEFAULT_WALL - bool - default n config BUSYBOX_DEFAULT_WATCHDOG bool default n @@ -2287,10 +2308,10 @@ config BUSYBOX_DEFAULT_FEATURE_IP_RARE_PROTOCOLS config BUSYBOX_DEFAULT_IPCALC bool default n -config BUSYBOX_DEFAULT_FEATURE_IPCALC_FANCY +config BUSYBOX_DEFAULT_FEATURE_IPCALC_LONG_OPTIONS bool default n -config BUSYBOX_DEFAULT_FEATURE_IPCALC_LONG_OPTIONS +config BUSYBOX_DEFAULT_FEATURE_IPCALC_FANCY bool default n config BUSYBOX_DEFAULT_FAKEIDENTD @@ -2308,6 +2329,9 @@ config BUSYBOX_DEFAULT_NBDCLIENT config BUSYBOX_DEFAULT_NC bool default y +config BUSYBOX_DEFAULT_NETCAT + bool + default n config BUSYBOX_DEFAULT_NC_SERVER bool default n @@ -2398,6 +2422,9 @@ config BUSYBOX_DEFAULT_FEATURE_TELNETD_INETD_WAIT config BUSYBOX_DEFAULT_TFTP bool default n +config BUSYBOX_DEFAULT_FEATURE_TFTP_PROGRESS_BAR + bool + default n config BUSYBOX_DEFAULT_TFTPD bool default n @@ -2410,9 +2437,6 @@ config BUSYBOX_DEFAULT_FEATURE_TFTP_PUT config BUSYBOX_DEFAULT_FEATURE_TFTP_BLOCKSIZE bool default n -config BUSYBOX_DEFAULT_FEATURE_TFTP_PROGRESS_BAR - bool - default n config BUSYBOX_DEFAULT_TFTP_DEBUG bool default n @@ -2443,15 +2467,15 @@ config BUSYBOX_DEFAULT_VCONFIG config BUSYBOX_DEFAULT_WGET bool default n +config BUSYBOX_DEFAULT_FEATURE_WGET_LONG_OPTIONS + bool + default n config BUSYBOX_DEFAULT_FEATURE_WGET_STATUSBAR bool default n config BUSYBOX_DEFAULT_FEATURE_WGET_AUTHENTICATION bool default n -config BUSYBOX_DEFAULT_FEATURE_WGET_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_FEATURE_WGET_TIMEOUT bool default n @@ -2467,25 +2491,13 @@ config BUSYBOX_DEFAULT_WHOIS config BUSYBOX_DEFAULT_ZCIP bool default n -config BUSYBOX_DEFAULT_UDHCPC6 - bool - default n -config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC3646 - bool - default n -config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC4704 - bool - default n -config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC4833 - bool - default n config BUSYBOX_DEFAULT_UDHCPD bool default n -config BUSYBOX_DEFAULT_FEATURE_UDHCPD_WRITE_LEASES_EARLY +config BUSYBOX_DEFAULT_FEATURE_UDHCPD_BASE_IP_ON_MAC bool default n -config BUSYBOX_DEFAULT_FEATURE_UDHCPD_BASE_IP_ON_MAC +config BUSYBOX_DEFAULT_FEATURE_UDHCPD_WRITE_LEASES_EARLY bool default n config BUSYBOX_DEFAULT_DHCPD_LEASES_FILE @@ -2506,24 +2518,36 @@ config BUSYBOX_DEFAULT_FEATURE_UDHCPC_ARPING config BUSYBOX_DEFAULT_FEATURE_UDHCPC_SANITIZEOPT bool default n +config BUSYBOX_DEFAULT_UDHCPC_DEFAULT_SCRIPT + string + default "/usr/share/udhcpc/default.script" +config BUSYBOX_DEFAULT_UDHCPC6 + bool + default n +config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC3646 + bool + default n +config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC4704 + bool + default n +config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC4833 + bool + default n config BUSYBOX_DEFAULT_FEATURE_UDHCP_PORT bool default n config BUSYBOX_DEFAULT_UDHCP_DEBUG int default 0 +config BUSYBOX_DEFAULT_UDHCPC_SLACK_FOR_BUGGY_SERVERS + int + default 80 config BUSYBOX_DEFAULT_FEATURE_UDHCP_RFC3397 bool default y config BUSYBOX_DEFAULT_FEATURE_UDHCP_8021Q bool default n -config BUSYBOX_DEFAULT_UDHCPC_DEFAULT_SCRIPT - string - default "/usr/share/udhcpc/default.script" -config BUSYBOX_DEFAULT_UDHCPC_SLACK_FOR_BUGGY_SERVERS - int - default 80 config BUSYBOX_DEFAULT_IFUPDOWN_UDHCPC_CMD_OPTIONS string default "" @@ -2620,10 +2644,10 @@ config BUSYBOX_DEFAULT_FEATURE_PS_LONG config BUSYBOX_DEFAULT_FEATURE_PS_TIME bool default n -config BUSYBOX_DEFAULT_FEATURE_PS_ADDITIONAL_COLUMNS +config BUSYBOX_DEFAULT_FEATURE_PS_UNUSUAL_SYSTEMS bool default n -config BUSYBOX_DEFAULT_FEATURE_PS_UNUSUAL_SYSTEMS +config BUSYBOX_DEFAULT_FEATURE_PS_ADDITIONAL_COLUMNS bool default n config BUSYBOX_DEFAULT_PSTREE @@ -2632,9 +2656,6 @@ config BUSYBOX_DEFAULT_PSTREE config BUSYBOX_DEFAULT_PWDX bool default n -config BUSYBOX_DEFAULT_RENICE - bool - default n config BUSYBOX_DEFAULT_SMEMCAP bool default n @@ -2716,9 +2737,6 @@ config BUSYBOX_DEFAULT_SVLOGD config BUSYBOX_DEFAULT_CHCON bool default n -config BUSYBOX_DEFAULT_FEATURE_CHCON_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_GETENFORCE bool default n @@ -2734,9 +2752,6 @@ config BUSYBOX_DEFAULT_MATCHPATHCON config BUSYBOX_DEFAULT_RUNCON bool default n -config BUSYBOX_DEFAULT_FEATURE_RUNCON_LONG_OPTIONS - bool - default n config BUSYBOX_DEFAULT_SELINUXENABLED bool default n @@ -2836,9 +2851,6 @@ config BUSYBOX_DEFAULT_HUSH_BASH_COMPAT config BUSYBOX_DEFAULT_HUSH_BRACE_EXPANSION bool default n -config BUSYBOX_DEFAULT_HUSH_HELP - bool - default n config BUSYBOX_DEFAULT_HUSH_INTERACTIVE bool default n @@ -2881,12 +2893,18 @@ config BUSYBOX_DEFAULT_HUSH_PRINTF config BUSYBOX_DEFAULT_HUSH_TEST bool default n +config BUSYBOX_DEFAULT_HUSH_HELP + bool + default n config BUSYBOX_DEFAULT_HUSH_EXPORT bool default n config BUSYBOX_DEFAULT_HUSH_EXPORT_N bool default n +config BUSYBOX_DEFAULT_HUSH_READONLY + bool + default n config BUSYBOX_DEFAULT_HUSH_KILL bool default n @@ -2899,6 +2917,9 @@ config BUSYBOX_DEFAULT_HUSH_TRAP config BUSYBOX_DEFAULT_HUSH_TYPE bool default n +config BUSYBOX_DEFAULT_HUSH_TIMES + bool + default n config BUSYBOX_DEFAULT_HUSH_READ bool default n @@ -2914,10 +2935,10 @@ config BUSYBOX_DEFAULT_HUSH_ULIMIT config BUSYBOX_DEFAULT_HUSH_UMASK bool default n -config BUSYBOX_DEFAULT_HUSH_MEMLEAK +config BUSYBOX_DEFAULT_HUSH_GETOPTS bool default n -config BUSYBOX_DEFAULT_MSH +config BUSYBOX_DEFAULT_HUSH_MEMLEAK bool default n config BUSYBOX_DEFAULT_FEATURE_SH_MATH @@ -2935,6 +2956,9 @@ config BUSYBOX_DEFAULT_FEATURE_SH_STANDALONE config BUSYBOX_DEFAULT_FEATURE_SH_NOFORK bool default y +config BUSYBOX_DEFAULT_FEATURE_SH_READ_FRAC + bool + default n config BUSYBOX_DEFAULT_FEATURE_SH_HISTFILESIZE bool default n diff --git a/package/utils/busybox/Makefile b/package/utils/busybox/Makefile index 8866756ae..155fc71d6 100644 --- a/package/utils/busybox/Makefile +++ b/package/utils/busybox/Makefile @@ -8,20 +8,23 @@ include $(TOPDIR)/rules.mk PKG_NAME:=busybox -PKG_VERSION:=1.27.2 -PKG_RELEASE:=3 +PKG_VERSION:=1.28.3 +PKG_RELEASE:=1 PKG_FLAGS:=essential PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=https://www.busybox.net/downloads \ http://sources.buildroot.net -PKG_HASH:=9d4be516b61e6480f156b11eb42577a13529f75d3383850bb75c50c285de63df +PKG_HASH:=ad0d22033f23e696f9a71a4c2f9210194dda39b024a79151f4ac278995332a6e PKG_BUILD_DEPENDS:=BUSYBOX_USE_LIBRPC:librpc BUSYBOX_CONFIG_PAM:libpam PKG_BUILD_PARALLEL:=1 PKG_CHECK_FORMAT_SECURITY:=0 PKG_INSTALL:=1 +#Busybox use it's own PIE config flag and LDFLAGS are used with ld, not gcc. +PKG_ASLR_PIE:=0 + PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:=LICENSE archival/libarchive/bz/LICENSE PKG_CPE_ID:=cpe:/a:busybox:busybox @@ -43,7 +46,6 @@ define Package/busybox URL:=http://busybox.net/ DEPENDS:=+BUSYBOX_USE_LIBRPC:librpc +BUSYBOX_CONFIG_PAM:libpam +BUSYBOX_CONFIG_NTPD:jsonfilter MENU:=1 - PROVIDES:=ip ALTERNATIVES:=\ $(call BUSYBOX_IF_ENABLED,KILL, 100:/bin/kill:/bin/busybox) \ $(call BUSYBOX_IF_ENABLED,PS, 100:/bin/ps:/bin/busybox) \ diff --git a/package/utils/busybox/config/Config.in b/package/utils/busybox/config/Config.in index c66aa08e7..68f140a9c 100644 --- a/package/utils/busybox/config/Config.in +++ b/package/utils/busybox/config/Config.in @@ -11,26 +11,30 @@ config BUSYBOX_CONFIG_HAVE_DOT_CONFIG menu "Busybox Settings" config BUSYBOX_CONFIG_DESKTOP - bool "Enable options for full-blown desktop systems" + bool "Enable compatibility for full-blown desktop systems" default BUSYBOX_DEFAULT_DESKTOP help - Enable options and features which are not essential. - Select this if you plan to use busybox on full-blown desktop machine - with common Linux distro, which needs higher level of command-line - compatibility. + Enable applet options and features which are not essential. + Many applet options have dedicated config options to (de)select them + under that applet; this options enables those options which have no + individual config item for them. - If you are preparing your build to be used on an embedded box - where you have tighter control over the entire set of userspace - tools, you can unselect this option for smaller code size. + Select this if you plan to use busybox on full-blown desktop machine + with common Linux distro, which needs higher level of command-line + compatibility. + + If you are preparing your build to be used on an embedded box + where you have tighter control over the entire set of userspace + tools, you can unselect this option for smaller code size. config BUSYBOX_CONFIG_EXTRA_COMPAT bool "Provide compatible behavior for rare corner cases (bigger code)" default BUSYBOX_DEFAULT_EXTRA_COMPAT help - This option makes grep, sed etc handle rare corner cases - (embedded NUL bytes and such). This makes code bigger and uses - some GNU extensions in libc. You probably only need this option - if you plan to run busybox on desktop. + This option makes grep, sed etc handle rare corner cases + (embedded NUL bytes and such). This makes code bigger and uses + some GNU extensions in libc. You probably only need this option + if you plan to run busybox on desktop. config BUSYBOX_CONFIG_FEDORA_COMPAT bool "Building for Fedora distribution" @@ -49,279 +53,285 @@ config BUSYBOX_CONFIG_INCLUDE_SUSv2 bool "Enable obsolete features removed before SUSv3" default BUSYBOX_DEFAULT_INCLUDE_SUSv2 help - This option will enable backwards compatibility with SuSv2, - specifically, old-style numeric options ('command -1 ') - will be supported in head, tail, and fold. (Note: should - affect renice too.) + This option will enable backwards compatibility with SuSv2, + specifically, old-style numeric options ('command -1 ') + will be supported in head, tail, and fold. (Note: should + affect renice too.) -config BUSYBOX_CONFIG_USE_PORTABLE_CODE - bool "Avoid using GCC-specific code constructs" - default BUSYBOX_DEFAULT_USE_PORTABLE_CODE +config BUSYBOX_CONFIG_LONG_OPTS + bool "Support --long-options" + default BUSYBOX_DEFAULT_LONG_OPTS help - Use this option if you are trying to compile busybox with - compiler other than gcc. - If you do use gcc, this option may needlessly increase code size. + Enable this if you want busybox applets to use the gnu --long-option + style, in addition to single character -a -b -c style options. config BUSYBOX_CONFIG_SHOW_USAGE bool "Show applet usage messages" default BUSYBOX_DEFAULT_SHOW_USAGE help - Enabling this option, BusyBox applets will show terse help messages - when invoked with wrong arguments. - If you do not want to show any (helpful) usage message when - issuing wrong command syntax, you can say 'N' here, - saving approximately 7k. + Enabling this option, applets will show terse help messages + when invoked with wrong arguments. + If you do not want to show any (helpful) usage message when + issuing wrong command syntax, you can say 'N' here, + saving approximately 7k. config BUSYBOX_CONFIG_FEATURE_VERBOSE_USAGE bool "Show verbose applet usage messages" default BUSYBOX_DEFAULT_FEATURE_VERBOSE_USAGE depends on BUSYBOX_CONFIG_SHOW_USAGE help - All BusyBox applets will show verbose help messages when - busybox is invoked with --help. This will add a lot of text to the - busybox binary. In the default configuration, this will add about - 13k, but it can add much more depending on your configuration. + All applets will show verbose help messages when invoked with --help. + This will add a lot of text to the binary. config BUSYBOX_CONFIG_FEATURE_COMPRESS_USAGE bool "Store applet usage messages in compressed form" default BUSYBOX_DEFAULT_FEATURE_COMPRESS_USAGE depends on BUSYBOX_CONFIG_SHOW_USAGE help - Store usage messages in .bz compressed form, uncompress them - on-the-fly when --help is called. + Store usage messages in .bz2 compressed form, uncompress them + on-the-fly when "APPLET --help" is run. - If you have a really tiny busybox with few applets enabled (and - bunzip2 isn't one of them), the overhead of the decompressor might - be noticeable. Also, if you run executables directly from ROM - and have very little memory, this might not be a win. Otherwise, - you probably want this. + If you have a really tiny busybox with few applets enabled (and + bunzip2 isn't one of them), the overhead of the decompressor might + be noticeable. Also, if you run executables directly from ROM + and have very little memory, this might not be a win. Otherwise, + you probably want this. -config BUSYBOX_CONFIG_BUSYBOX - bool "Include busybox applet" - default BUSYBOX_DEFAULT_BUSYBOX +config BUSYBOX_CONFIG_LFS + bool + default BUSYBOX_DEFAULT_LFS help - The busybox applet provides general help regarding busybox and - allows the included applets to be listed. It's also required - if applet links are to be installed at runtime. - - If you can live without these features disabling this will save - some space. - -config BUSYBOX_CONFIG_FEATURE_INSTALLER - bool "Support --install [-s] to install applet links at runtime" - default BUSYBOX_DEFAULT_FEATURE_INSTALLER - depends on BUSYBOX_CONFIG_BUSYBOX - help - Enable 'busybox --install [-s]' support. This will allow you to use - busybox at runtime to create hard links or symlinks for all the - applets that are compiled into busybox. - -config BUSYBOX_CONFIG_INSTALL_NO_USR - bool "Don't use /usr" - default BUSYBOX_DEFAULT_INSTALL_NO_USR - help - Disable use of /usr. busybox --install and "make install" - will install applets only to /bin and /sbin, - never to /usr/bin or /usr/sbin. + If you need to work with large files, enable this option. + This will have no effect if your kernel or your C + library lacks large file support for large files. Some of the + programs that can benefit from large file support include dd, gzip, + cp, mount, tar. config BUSYBOX_CONFIG_PAM bool "Support PAM (Pluggable Authentication Modules)" default BUSYBOX_DEFAULT_PAM help - Use PAM in some busybox applets (currently login and httpd) instead - of direct access to password database. - -config BUSYBOX_CONFIG_LONG_OPTS - bool "Support --long-options" - default BUSYBOX_DEFAULT_LONG_OPTS - help - Enable this if you want busybox applets to use the gnu --long-option - style, in addition to single character -a -b -c style options. + Use PAM in some applets (currently login and httpd) instead + of direct access to password database. config BUSYBOX_CONFIG_FEATURE_DEVPTS bool "Use the devpts filesystem for Unix98 PTYs" default BUSYBOX_DEFAULT_FEATURE_DEVPTS help - Enable if you want BusyBox to use Unix98 PTY support. If enabled, - busybox will use /dev/ptmx for the master side of the pseudoterminal - and /dev/pts/ for the slave side. Otherwise, BSD style - /dev/ttyp will be used. To use this option, you should have - devpts mounted. - -config BUSYBOX_CONFIG_FEATURE_CLEAN_UP - bool "Clean up all memory before exiting (usually not needed)" - default BUSYBOX_DEFAULT_FEATURE_CLEAN_UP - help - As a size optimization, busybox normally exits without explicitly - freeing dynamically allocated memory or closing files. This saves - space since the OS will clean up for us, but it can confuse debuggers - like valgrind, which report tons of memory and resource leaks. - - Don't enable this unless you have a really good reason to clean - things up manually. + Enable if you want to use Unix98 PTY support. If enabled, + busybox will use /dev/ptmx for the master side of the pseudoterminal + and /dev/pts/ for the slave side. Otherwise, BSD style + /dev/ttyp will be used. To use this option, you should have + devpts mounted. config BUSYBOX_CONFIG_FEATURE_UTMP bool "Support utmp file" default BUSYBOX_DEFAULT_FEATURE_UTMP help - The file /var/run/utmp is used to track who is currently logged in. - With this option on, certain applets (getty, login, telnetd etc) - will create and delete entries there. - "who" applet requires this option. + The file /var/run/utmp is used to track who is currently logged in. + With this option on, certain applets (getty, login, telnetd etc) + will create and delete entries there. + "who" applet requires this option. config BUSYBOX_CONFIG_FEATURE_WTMP bool "Support wtmp file" default BUSYBOX_DEFAULT_FEATURE_WTMP depends on BUSYBOX_CONFIG_FEATURE_UTMP help - The file /var/run/wtmp is used to track when users have logged into - and logged out of the system. - With this option on, certain applets (getty, login, telnetd etc) - will append new entries there. - "last" applet requires this option. + The file /var/run/wtmp is used to track when users have logged into + and logged out of the system. + With this option on, certain applets (getty, login, telnetd etc) + will append new entries there. + "last" applet requires this option. config BUSYBOX_CONFIG_FEATURE_PIDFILE bool "Support writing pidfiles" default BUSYBOX_DEFAULT_FEATURE_PIDFILE help - This option makes some applets (e.g. crond, syslogd, inetd) write - a pidfile at the configured PID_FILE_PATH. It has no effect - on applets which require pidfiles to run. + This option makes some applets (e.g. crond, syslogd, inetd) write + a pidfile at the configured PID_FILE_PATH. It has no effect + on applets which require pidfiles to run. config BUSYBOX_CONFIG_PID_FILE_PATH - string "Path to directory for pidfile" + string "Directory for pidfiles" default BUSYBOX_DEFAULT_PID_FILE_PATH depends on BUSYBOX_CONFIG_FEATURE_PIDFILE help - This is the default path where pidfiles are created. Applets which - allow you to set the pidfile path on the command line will override - this value. The option has no effect on applets that require you to - specify a pidfile path. + This is the default path where pidfiles are created. Applets which + allow you to set the pidfile path on the command line will override + this value. The option has no effect on applets that require you to + specify a pidfile path. + +config BUSYBOX_CONFIG_BUSYBOX + bool "Include busybox applet" + default BUSYBOX_DEFAULT_BUSYBOX + help + The busybox applet provides general help message and allows + the included applets to be listed. It also provides + optional --install command to create applet links. If you unselect + this option, running busybox without any arguments will give + just a cryptic error message: + + $ busybox + busybox: applet not found + + Running "busybox APPLET [ARGS...]" will still work, of course. + +config BUSYBOX_CONFIG_FEATURE_INSTALLER + bool "Support --install [-s] to install applet links at runtime" + default BUSYBOX_DEFAULT_FEATURE_INSTALLER + depends on BUSYBOX_CONFIG_BUSYBOX + help + Enable 'busybox --install [-s]' support. This will allow you to use + busybox at runtime to create hard links or symlinks for all the + applets that are compiled into busybox. + +config BUSYBOX_CONFIG_INSTALL_NO_USR + bool "Don't use /usr" + default BUSYBOX_DEFAULT_INSTALL_NO_USR + help + Disable use of /usr. "busybox --install" and "make install" + will install applets only to /bin and /sbin, + never to /usr/bin or /usr/sbin. config BUSYBOX_CONFIG_FEATURE_SUID - bool "Support SUID/SGID handling" + bool "Drop SUID state for most applets" default BUSYBOX_DEFAULT_FEATURE_SUID help - With this option you can install the busybox binary belonging - to root with the suid bit set, enabling some applets to perform - root-level operations even when run by ordinary users - (for example, mounting of user mounts in fstab needs this). + With this option you can install the busybox binary belonging + to root with the suid bit set, enabling some applets to perform + root-level operations even when run by ordinary users + (for example, mounting of user mounts in fstab needs this). - Busybox will automatically drop privileges for applets - that don't need root access. + With this option enabled, busybox drops privileges for applets + that don't need root access, before entering their main() function. - If you are really paranoid and don't want to do this, build two - busybox binaries with different applets in them (and the appropriate - symlinks pointing to each binary), and only set the suid bit on the - one that needs it. + If you are really paranoid and don't want even initial busybox code + to run under root for every applet, build two busybox binaries with + different applets in them (and the appropriate symlinks pointing + to each binary), and only set the suid bit on the one that needs it. - The applets which require root rights (need suid bit or - to be run by root) and will refuse to execute otherwise: - crontab, login, passwd, su, vlock, wall. + Some applets which require root rights (need suid bit on the binary + or to be run by root) and will refuse to execute otherwise: + crontab, login, passwd, su, vlock, wall. - The applets which will use root rights if they have them - (via suid bit, or because run by root), but would try to work - without root right nevertheless: - findfs, ping[6], traceroute[6], mount. + The applets which will use root rights if they have them + (via suid bit, or because run by root), but would try to work + without root right nevertheless: + findfs, ping[6], traceroute[6], mount. - Note that if you DONT select this option, but DO make busybox - suid root, ALL applets will run under root, which is a huge - security hole (think "cp /some/file /etc/passwd"). + Note that if you DO NOT select this option, but DO make busybox + suid root, ALL applets will run under root, which is a huge + security hole (think "cp /some/file /etc/passwd"). config BUSYBOX_CONFIG_FEATURE_SUID_CONFIG - bool "Runtime SUID/SGID configuration via /etc/busybox.conf" + bool "Enable SUID configuration via /etc/busybox.conf" default BUSYBOX_DEFAULT_FEATURE_SUID_CONFIG depends on BUSYBOX_CONFIG_FEATURE_SUID help - Allow the SUID / SGID state of an applet to be determined at runtime - by checking /etc/busybox.conf. (This is sort of a poor man's sudo.) - The format of this file is as follows: + Allow the SUID/SGID state of an applet to be determined at runtime + by checking /etc/busybox.conf. (This is sort of a poor man's sudo.) + The format of this file is as follows: - APPLET = [Ssx-][Ssx-][x-] [USER.GROUP] + APPLET = [Ssx-][Ssx-][x-] [USER.GROUP] - s: USER or GROUP is allowed to execute APPLET. - APPLET will run under USER or GROUP - (reagardless of who's running it). - S: USER or GROUP is NOT allowed to execute APPLET. - APPLET will run under USER or GROUP. - This option is not very sensical. - x: USER/GROUP/others are allowed to execute APPLET. - No UID/GID change will be done when it is run. - -: USER/GROUP/others are not allowed to execute APPLET. + s: USER or GROUP is allowed to execute APPLET. + APPLET will run under USER or GROUP + (regardless of who's running it). + S: USER or GROUP is NOT allowed to execute APPLET. + APPLET will run under USER or GROUP. + This option is not very sensical. + x: USER/GROUP/others are allowed to execute APPLET. + No UID/GID change will be done when it is run. + -: USER/GROUP/others are not allowed to execute APPLET. - An example might help: + An example might help: - [SUID] - su = ssx root.0 # applet su can be run by anyone and runs with - # euid=0/egid=0 - su = ssx # exactly the same + |[SUID] + |su = ssx root.0 # applet su can be run by anyone and runs with + | # euid=0,egid=0 + |su = ssx # exactly the same + | + |mount = sx- root.disk # applet mount can be run by root and members + | # of group disk (but not anyone else) + | # and runs with euid=0 (egid is not changed) + | + |cp = --- # disable applet cp for everyone - mount = sx- root.disk # applet mount can be run by root and members - # of group disk (but not anyone else) - # and runs with euid=0 (egid is not changed) + The file has to be owned by user root, group root and has to be + writeable only by root: + (chown 0.0 /etc/busybox.conf; chmod 600 /etc/busybox.conf) + The busybox executable has to be owned by user root, group + root and has to be setuid root for this to work: + (chown 0.0 /bin/busybox; chmod 4755 /bin/busybox) - cp = --- # disable applet cp for everyone - - The file has to be owned by user root, group root and has to be - writeable only by root: - (chown 0.0 /etc/busybox.conf; chmod 600 /etc/busybox.conf) - The busybox executable has to be owned by user root, group - root and has to be setuid root for this to work: - (chown 0.0 /bin/busybox; chmod 4755 /bin/busybox) - - Robert 'sandman' Griebl has more information here: - . + Robert 'sandman' Griebl has more information here: + . config BUSYBOX_CONFIG_FEATURE_SUID_CONFIG_QUIET bool "Suppress warning message if /etc/busybox.conf is not readable" default BUSYBOX_DEFAULT_FEATURE_SUID_CONFIG_QUIET depends on BUSYBOX_CONFIG_FEATURE_SUID_CONFIG help - /etc/busybox.conf should be readable by the user needing the SUID, - check this option to avoid users to be notified about missing - permissions. + /etc/busybox.conf should be readable by the user needing the SUID, + check this option to avoid users to be notified about missing + permissions. + +config BUSYBOX_CONFIG_FEATURE_PREFER_APPLETS + bool "exec prefers applets" + default BUSYBOX_DEFAULT_FEATURE_PREFER_APPLETS + help + This is an experimental option which directs applets about to + call 'exec' to try and find an applicable busybox applet before + searching the PATH. This is typically done by exec'ing + /proc/self/exe. + + This may affect shell, find -exec, xargs and similar applets. + They will use applets even if /bin/APPLET -> busybox link + is missing (or is not a link to busybox). However, this causes + problems in chroot jails without mounted /proc and with ps/top + (command name can be shown as 'exe' for applets started this way). + +config BUSYBOX_CONFIG_BUSYBOX_EXEC_PATH + string "Path to busybox executable" + default BUSYBOX_DEFAULT_BUSYBOX_EXEC_PATH + help + When applets need to run other applets, busybox + sometimes needs to exec() itself. When the /proc filesystem is + mounted, /proc/self/exe always points to the currently running + executable. If you haven't got /proc, set this to wherever you + want to run busybox from. config BUSYBOX_CONFIG_SELINUX bool "Support NSA Security Enhanced Linux" default BUSYBOX_DEFAULT_SELINUX select BUSYBOX_CONFIG_PLATFORM_LINUX help - Enable support for SELinux in applets ls, ps, and id. Also provide - the option of compiling in SELinux applets. + Enable support for SELinux in applets ls, ps, and id. Also provide + the option of compiling in SELinux applets. + + If you do not have a complete SELinux userland installed, this stuff + will not compile. Specifially, libselinux 1.28 or better is + directly required by busybox. If the installation is located in a + non-standard directory, provide it by invoking make as follows: - If you do not have a complete SELinux userland installed, this stuff - will not compile. Specifially, libselinux 1.28 or better is - directly required by busybox. If the installation is located in a - non-standard directory, provide it by invoking make as follows: CFLAGS=-I \ LDFLAGS=-L \ make - Most people will leave this set to 'N'. + Most people will leave this set to 'N'. -config BUSYBOX_CONFIG_FEATURE_PREFER_APPLETS - bool "exec prefers applets" - default BUSYBOX_DEFAULT_FEATURE_PREFER_APPLETS +config BUSYBOX_CONFIG_FEATURE_CLEAN_UP + bool "Clean up all memory before exiting (usually not needed)" + default BUSYBOX_DEFAULT_FEATURE_CLEAN_UP help - This is an experimental option which directs applets about to - call 'exec' to try and find an applicable busybox applet before - searching the PATH. This is typically done by exec'ing - /proc/self/exe. - This may affect shell, find -exec, xargs and similar applets. - They will use applets even if /bin/ -> busybox link - is missing (or is not a link to busybox). However, this causes - problems in chroot jails without mounted /proc and with ps/top - (command name can be shown as 'exe' for applets started this way). + As a size optimization, busybox normally exits without explicitly + freeing dynamically allocated memory or closing files. This saves + space since the OS will clean up for us, but it can confuse debuggers + like valgrind, which report tons of memory and resource leaks. -config BUSYBOX_CONFIG_BUSYBOX_EXEC_PATH - string "Path to BusyBox executable" - default BUSYBOX_DEFAULT_BUSYBOX_EXEC_PATH - help - When Busybox applets need to run other busybox applets, BusyBox - sometimes needs to exec() itself. When the /proc filesystem is - mounted, /proc/self/exe always points to the currently running - executable. If you haven't got /proc, set this to wherever you - want to run BusyBox from. + Don't enable this unless you have a really good reason to clean + things up manually. # These are auto-selected by other options @@ -329,64 +339,53 @@ config BUSYBOX_CONFIG_FEATURE_SYSLOG bool #No description makes it a hidden option default BUSYBOX_DEFAULT_FEATURE_SYSLOG #help - # This option is auto-selected when you select any applet which may - # send its output to syslog. You do not need to select it manually. - -config BUSYBOX_CONFIG_FEATURE_HAVE_RPC - bool #No description makes it a hidden option - default BUSYBOX_DEFAULT_FEATURE_HAVE_RPC - #help - # This is automatically selected if any of enabled applets need it. - # You do not need to select it manually. + #This option is auto-selected when you select any applet which may + #send its output to syslog. You do not need to select it manually. config BUSYBOX_CONFIG_PLATFORM_LINUX bool #No description makes it a hidden option default BUSYBOX_DEFAULT_PLATFORM_LINUX #help - # For the most part, busybox requires only POSIX compatibility - # from the target system, but some applets and features use - # Linux-specific interfaces. + #For the most part, busybox requires only POSIX compatibility + #from the target system, but some applets and features use + #Linux-specific interfaces. # - # This is automatically selected if any applet or feature requires - # Linux-specific interfaces. You do not need to select it manually. + #This is automatically selected if any applet or feature requires + #Linux-specific interfaces. You do not need to select it manually. comment 'Build Options' config BUSYBOX_CONFIG_STATIC - bool "Build BusyBox as a static binary (no shared libs)" + bool "Build static binary (no shared libs)" default BUSYBOX_DEFAULT_STATIC help - If you want to build a static BusyBox binary, which does not - use or require any shared libraries, then enable this option. - This can cause BusyBox to be considerably larger, so you should - leave this option false unless you have a good reason (i.e. - your target platform does not support shared libraries, or - you are building an initrd which doesn't need anything but - BusyBox, etc). - - Most people will leave this set to 'N'. + If you want to build a static binary, which does not use + or require any shared libraries, enable this option. + Static binaries are larger, but do not require functioning + dynamic libraries to be present, which is important if used + as a system rescue tool. config BUSYBOX_CONFIG_PIE - bool "Build BusyBox as a position independent executable" + bool "Build position independent executable" default BUSYBOX_DEFAULT_PIE depends on !BUSYBOX_CONFIG_STATIC help - Hardened code option. PIE binaries are loaded at a different - address at each invocation. This has some overhead, - particularly on x86-32 which is short on registers. + Hardened code option. PIE binaries are loaded at a different + address at each invocation. This has some overhead, + particularly on x86-32 which is short on registers. - Most people will leave this set to 'N'. + Most people will leave this set to 'N'. config BUSYBOX_CONFIG_NOMMU bool "Force NOMMU build" default BUSYBOX_DEFAULT_NOMMU help - Busybox tries to detect whether architecture it is being - built against supports MMU or not. If this detection fails, - or if you want to build NOMMU version of busybox for testing, - you may force NOMMU build here. + Busybox tries to detect whether architecture it is being + built against supports MMU or not. If this detection fails, + or if you want to build NOMMU version of busybox for testing, + you may force NOMMU build here. - Most people will leave this set to 'N'. + Most people will leave this set to 'N'. # PIE can be made to work with BUILD_LIBBUSYBOX, but currently # build system does not support that @@ -395,135 +394,128 @@ config BUSYBOX_CONFIG_BUILD_LIBBUSYBOX default BUSYBOX_DEFAULT_BUILD_LIBBUSYBOX depends on !BUSYBOX_CONFIG_FEATURE_PREFER_APPLETS && !BUSYBOX_CONFIG_PIE && !BUSYBOX_CONFIG_STATIC help - Build a shared library libbusybox.so.N.N.N which contains all - busybox code. + Build a shared library libbusybox.so.N.N.N which contains all + busybox code. - This feature allows every applet to be built as a tiny - separate executable. Enabling it for "one big busybox binary" - approach serves no purpose and increases code size. - You should almost certainly say "no" to this. + This feature allows every applet to be built as a really tiny + separate executable linked against the library: + |$ size 0_lib/l* + | text data bss dec hex filename + | 939 212 28 1179 49b 0_lib/last + | 939 212 28 1179 49b 0_lib/less + | 919138 8328 1556 929022 e2cfe 0_lib/libbusybox.so.1.N.M -### config FEATURE_FULL_LIBBUSYBOX -### bool "Feature-complete libbusybox" -### default n if !FEATURE_SHARED_BUSYBOX -### depends on BUILD_LIBBUSYBOX -### help -### Build a libbusybox with the complete feature-set, disregarding -### the actually selected config. -### -### Normally, libbusybox will only contain the features which are -### used by busybox itself. If you plan to write a separate -### standalone application which uses libbusybox say 'Y'. -### -### Note: libbusybox is GPL, not LGPL, and exports no stable API that -### might act as a copyright barrier. We can and will modify the -### exported function set between releases (even minor version number -### changes), and happily break out-of-tree features. -### -### Say 'N' if in doubt. + This is useful on NOMMU systems which are not capable + of sharing executables, but are capable of sharing code + in dynamic libraries. + +config BUSYBOX_CONFIG_FEATURE_LIBBUSYBOX_STATIC + bool "Pull in all external references into libbusybox" + default BUSYBOX_DEFAULT_FEATURE_LIBBUSYBOX_STATIC + depends on BUSYBOX_CONFIG_BUILD_LIBBUSYBOX + help + Make libbusybox library independent, not using or requiring + any other shared libraries. config BUSYBOX_CONFIG_FEATURE_INDIVIDUAL bool "Produce a binary for each applet, linked against libbusybox" default BUSYBOX_DEFAULT_FEATURE_INDIVIDUAL depends on BUSYBOX_CONFIG_BUILD_LIBBUSYBOX help - If your CPU architecture doesn't allow for sharing text/rodata - sections of running binaries, but allows for runtime dynamic - libraries, this option will allow you to reduce memory footprint - when you have many different applets running at once. + If your CPU architecture doesn't allow for sharing text/rodata + sections of running binaries, but allows for runtime dynamic + libraries, this option will allow you to reduce memory footprint + when you have many different applets running at once. - If your CPU architecture allows for sharing text/rodata, - having single binary is more optimal. + If your CPU architecture allows for sharing text/rodata, + having single binary is more optimal. - Each applet will be a tiny program, dynamically linked - against libbusybox.so.N.N.N. + Each applet will be a tiny program, dynamically linked + against libbusybox.so.N.N.N. - You need to have a working dynamic linker. + You need to have a working dynamic linker. config BUSYBOX_CONFIG_FEATURE_SHARED_BUSYBOX bool "Produce additional busybox binary linked against libbusybox" default BUSYBOX_DEFAULT_FEATURE_SHARED_BUSYBOX depends on BUSYBOX_CONFIG_BUILD_LIBBUSYBOX help - Build busybox, dynamically linked against libbusybox.so.N.N.N. + Build busybox, dynamically linked against libbusybox.so.N.N.N. - You need to have a working dynamic linker. + You need to have a working dynamic linker. ### config BUILD_AT_ONCE ### bool "Compile all sources at once" ### default n ### help -### Normally each source-file is compiled with one invocation of -### the compiler. -### If you set this option, all sources are compiled at once. -### This gives the compiler more opportunities to optimize which can -### result in smaller and/or faster binaries. +### Normally each source-file is compiled with one invocation of +### the compiler. +### If you set this option, all sources are compiled at once. +### This gives the compiler more opportunities to optimize which can +### result in smaller and/or faster binaries. ### -### Setting this option will consume alot of memory, e.g. if you -### enable all applets with all features, gcc uses more than 300MB -### RAM during compilation of busybox. +### Setting this option will consume alot of memory, e.g. if you +### enable all applets with all features, gcc uses more than 300MB +### RAM during compilation of busybox. ### -### This option is most likely only beneficial for newer compilers -### such as gcc-4.1 and above. +### This option is most likely only beneficial for newer compilers +### such as gcc-4.1 and above. ### -### Say 'N' unless you know what you are doing. - -config BUSYBOX_CONFIG_LFS - bool - default BUSYBOX_DEFAULT_LFS - help - If you want to build BusyBox with large file support, then enable - this option. This will have no effect if your kernel or your C - library lacks large file support for large files. Some of the - programs that can benefit from large file support include dd, gzip, - cp, mount, tar, and many others. If you want to access files larger - than 2 Gigabytes, enable this option. Otherwise, leave it set to 'N'. +### Say 'N' unless you know what you are doing. config BUSYBOX_CONFIG_CROSS_COMPILER_PREFIX - string "Cross Compiler prefix" + string "Cross compiler prefix" default BUSYBOX_DEFAULT_CROSS_COMPILER_PREFIX help - If you want to build BusyBox with a cross compiler, then you - will need to set this to the cross-compiler prefix, for example, - "i386-uclibc-". + If you want to build busybox with a cross compiler, then you + will need to set this to the cross-compiler prefix, for example, + "i386-uclibc-". - Note that CROSS_COMPILE environment variable or - "make CROSS_COMPILE=xxx ..." will override this selection. + Note that CROSS_COMPILE environment variable or + "make CROSS_COMPILE=xxx ..." will override this selection. - Native builds leave this empty. + Native builds leave this empty. config BUSYBOX_CONFIG_SYSROOT string "Path to sysroot" default BUSYBOX_DEFAULT_SYSROOT help - If you want to build BusyBox with a cross compiler, then you - might also need to specify where /usr/include and /usr/lib - will be found. + If you want to build busybox with a cross compiler, then you + might also need to specify where /usr/include and /usr/lib + will be found. - For example, BusyBox can be built against an installed - Android NDK, platform version 9, for ARM ABI with + For example, busybox can be built against an installed + Android NDK, platform version 9, for ARM ABI with - CONFIG_SYSROOT=/opt/android-ndk/platforms/android-9/arch-arm + CONFIG_SYSROOT=/opt/android-ndk/platforms/android-9/arch-arm - Native builds leave this empty. + Native builds leave this empty. config BUSYBOX_CONFIG_EXTRA_CFLAGS string "Additional CFLAGS" default BUSYBOX_DEFAULT_EXTRA_CFLAGS help - Additional CFLAGS to pass to the compiler verbatim. + Additional CFLAGS to pass to the compiler verbatim. config BUSYBOX_CONFIG_EXTRA_LDFLAGS string "Additional LDFLAGS" default BUSYBOX_DEFAULT_EXTRA_LDFLAGS help - Additional LDFLAGS to pass to the linker verbatim. + Additional LDFLAGS to pass to the linker verbatim. config BUSYBOX_CONFIG_EXTRA_LDLIBS string "Additional LDLIBS" default BUSYBOX_DEFAULT_EXTRA_LDLIBS help - Additional LDLIBS to pass to the linker with -l. + Additional LDLIBS to pass to the linker with -l. + +config BUSYBOX_CONFIG_USE_PORTABLE_CODE + bool "Avoid using GCC-specific code constructs" + default BUSYBOX_DEFAULT_USE_PORTABLE_CODE + help + Use this option if you are trying to compile busybox with + compiler other than gcc. + If you do use gcc, this option may needlessly increase code size. comment 'Installation Options ("make install" behavior)' @@ -531,32 +523,32 @@ choice prompt "What kind of applet links to install" default BUSYBOX_CONFIG_INSTALL_APPLET_SYMLINKS help - Choose what kind of links to applets are created by "make install". + Choose what kind of links to applets are created by "make install". config BUSYBOX_CONFIG_INSTALL_APPLET_SYMLINKS bool "as soft-links" help - Install applets as soft-links to the busybox binary. This needs some - free inodes on the filesystem, but might help with filesystem - generators that can't cope with hard-links. + Install applets as soft-links to the busybox binary. This needs some + free inodes on the filesystem, but might help with filesystem + generators that can't cope with hard-links. config BUSYBOX_CONFIG_INSTALL_APPLET_HARDLINKS bool "as hard-links" help - Install applets as hard-links to the busybox binary. This might - count on a filesystem with few inodes. + Install applets as hard-links to the busybox binary. This might + count on a filesystem with few inodes. config BUSYBOX_CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS bool "as script wrappers" help - Install applets as script wrappers that call the busybox binary. + Install applets as script wrappers that call the busybox binary. config BUSYBOX_CONFIG_INSTALL_APPLET_DONT bool "not installed" help - Do not install applet links. Useful when you plan to use - busybox --install for installing links, or plan to use - a standalone shell and thus don't need applet links. + Do not install applet links. Useful when you plan to use + busybox --install for installing links, or plan to use + a standalone shell and thus don't need applet links. endchoice @@ -565,113 +557,116 @@ choice default BUSYBOX_CONFIG_INSTALL_SH_APPLET_SYMLINK depends on BUSYBOX_CONFIG_INSTALL_APPLET_SCRIPT_WRAPPERS help - Choose how you install /bin/sh applet link. + Choose how you install /bin/sh applet link. config BUSYBOX_CONFIG_INSTALL_SH_APPLET_SYMLINK bool "as soft-link" help - Install /bin/sh applet as soft-link to the busybox binary. + Install /bin/sh applet as soft-link to the busybox binary. config BUSYBOX_CONFIG_INSTALL_SH_APPLET_HARDLINK bool "as hard-link" help - Install /bin/sh applet as hard-link to the busybox binary. + Install /bin/sh applet as hard-link to the busybox binary. config BUSYBOX_CONFIG_INSTALL_SH_APPLET_SCRIPT_WRAPPER bool "as script wrapper" help - Install /bin/sh applet as script wrapper that calls - the busybox binary. + Install /bin/sh applet as script wrapper that calls + the busybox binary. endchoice config BUSYBOX_CONFIG_PREFIX - string "BusyBox installation prefix" + string "Destination path for 'make install'" default BUSYBOX_DEFAULT_PREFIX help - Define your directory to install BusyBox files/subdirs in. + Where "make install" should install busybox binary and links. comment 'Debugging Options' config BUSYBOX_CONFIG_DEBUG - bool "Build BusyBox with extra Debugging symbols" + bool "Build with debug information" default BUSYBOX_DEFAULT_DEBUG help - Say Y here if you wish to examine BusyBox internals while applets are - running. This increases the size of the binary considerably, and - should only be used when doing development. If you are doing - development and want to debug BusyBox, answer Y. + Say Y here to compile with debug information. + This increases the size of the binary considerably, and + should only be used when doing development. - Most people should answer N. + This adds -g option to gcc command line. + + Most people should answer N. config BUSYBOX_CONFIG_DEBUG_PESSIMIZE bool "Disable compiler optimizations" default BUSYBOX_DEFAULT_DEBUG_PESSIMIZE depends on BUSYBOX_CONFIG_DEBUG help - The compiler's optimization of source code can eliminate and reorder - code, resulting in an executable that's hard to understand when - stepping through it with a debugger. This switches it off, resulting - in a much bigger executable that more closely matches the source - code. + The compiler's optimization of source code can eliminate and reorder + code, resulting in an executable that's hard to understand when + stepping through it with a debugger. This switches it off, resulting + in a much bigger executable that more closely matches the source + code. + + This replaces -Os/-O2 with -O0 in gcc command line. config BUSYBOX_CONFIG_DEBUG_SANITIZE bool "Enable runtime sanitizers (ASAN/LSAN/USAN/etc...)" default BUSYBOX_DEFAULT_DEBUG_SANITIZE help - Say Y here if you want to enable runtime sanitizers. These help - catch bad memory accesses (e.g. buffer overflows), but will make - the executable larger and slow down runtime a bit. + Say Y here if you want to enable runtime sanitizers. These help + catch bad memory accesses (e.g. buffer overflows), but will make + the executable larger and slow down runtime a bit. - This adds -fsanitize=foo options to gcc command line. + This adds -fsanitize=foo options to gcc command line. - If you aren't developing/testing busybox, say N here. + If you aren't developing/testing busybox, say N here. config BUSYBOX_CONFIG_UNIT_TEST bool "Build unit tests" default BUSYBOX_DEFAULT_UNIT_TEST help - Say Y here if you want to build unit tests (both the framework and - test cases) as a Busybox applet. This results in bigger code, so you - probably don't want this option in production builds. + Say Y here if you want to build unit tests (both the framework and + test cases) as an applet. This results in bigger code, so you + probably don't want this option in production builds. config BUSYBOX_CONFIG_WERROR bool "Abort compilation on any warning" default BUSYBOX_DEFAULT_WERROR help - This adds -Werror to gcc command line. + This adds -Werror to gcc command line. - Most people should answer N. + Most people should answer N. choice prompt "Additional debugging library" default BUSYBOX_CONFIG_NO_DEBUG_LIB help - Using an additional debugging library will make BusyBox become - considerable larger and will cause it to run more slowly. You - should always leave this option disabled for production use. + Using an additional debugging library will make busybox become + considerably larger and will cause it to run more slowly. You + should always leave this option disabled for production use. - dmalloc support: - ---------------- - This enables compiling with dmalloc ( http://dmalloc.com/ ) - which is an excellent public domain mem leak and malloc problem - detector. To enable dmalloc, before running busybox you will - want to properly set your environment, for example: - export DMALLOC_OPTIONS=debug=0x34f47d83,inter=100,log=logfile - The 'debug=' value is generated using the following command - dmalloc -p log-stats -p log-non-free -p log-bad-space \ - -p log-elapsed-time -p check-fence -p check-heap \ - -p check-lists -p check-blank -p check-funcs -p realloc-copy \ - -p allow-free-null + dmalloc support: + ---------------- + This enables compiling with dmalloc ( http://dmalloc.com/ ) + which is an excellent public domain mem leak and malloc problem + detector. To enable dmalloc, before running busybox you will + want to properly set your environment, for example: + export DMALLOC_OPTIONS=debug=0x34f47d83,inter=100,log=logfile + The 'debug=' value is generated using the following command + dmalloc -p log-stats -p log-non-free -p log-bad-space \ + -p log-elapsed-time -p check-fence -p check-heap \ + -p check-lists -p check-blank -p check-funcs -p realloc-copy \ + -p allow-free-null - Electric-fence support: - ----------------------- - This enables compiling with Electric-fence support. Electric - fence is another very useful malloc debugging library which uses - your computer's virtual memory hardware to detect illegal memory - accesses. This support will make BusyBox be considerable larger - and run slower, so you should leave this option disabled unless - you are hunting a hard to find memory problem. + Electric-fence support: + ----------------------- + This enables compiling with Electric-fence support. Electric + fence is another very useful malloc debugging library which uses + your computer's virtual memory hardware to detect illegal memory + accesses. This support will make busybox be considerably larger + and run slower, so you should leave this option disabled unless + you are hunting a hard to find memory problem. config BUSYBOX_CONFIG_NO_DEBUG_LIB diff --git a/package/utils/busybox/patches/111-i386_no_arch_flags.patch b/package/utils/busybox/patches/111-i386_no_arch_flags.patch new file mode 100644 index 000000000..456013687 --- /dev/null +++ b/package/utils/busybox/patches/111-i386_no_arch_flags.patch @@ -0,0 +1,10 @@ +--- a/arch/i386/Makefile ++++ /dev/null +@@ -1,7 +0,0 @@ +-# ========================================================================== +-# Build system +-# ========================================================================== +- +-# -mpreferred-stack-boundary=2 is essential in preventing gcc 4.2.x +-# from aligning stack to 16 bytes. (Which is gcc's way of supporting SSE). +-CFLAGS += $(call cc-option,-march=i386 -mpreferred-stack-boundary=2,) diff --git a/package/utils/busybox/patches/200-udhcpc_reduce_msgs.patch b/package/utils/busybox/patches/200-udhcpc_reduce_msgs.patch index 5f64c19d0..a47c4fcc1 100644 --- a/package/utils/busybox/patches/200-udhcpc_reduce_msgs.patch +++ b/package/utils/busybox/patches/200-udhcpc_reduce_msgs.patch @@ -1,6 +1,6 @@ --- a/networking/udhcp/dhcpc.c +++ b/networking/udhcp/dhcpc.c -@@ -706,6 +706,7 @@ static int bcast_or_ucast(struct dhcp_pa +@@ -711,6 +711,7 @@ static int bcast_or_ucast(struct dhcp_pa static NOINLINE int send_discover(uint32_t xid, uint32_t requested) { struct dhcp_packet packet; @@ -8,7 +8,7 @@ /* Fill in: op, htype, hlen, cookie, chaddr fields, * random xid field (we override it below), -@@ -723,6 +724,7 @@ static NOINLINE int send_discover(uint32 +@@ -728,6 +729,7 @@ static NOINLINE int send_discover(uint32 */ add_client_options(&packet); diff --git a/package/utils/busybox/patches/201-udhcpc_changed_ifindex.patch b/package/utils/busybox/patches/201-udhcpc_changed_ifindex.patch index 727f69409..51b15a73c 100644 --- a/package/utils/busybox/patches/201-udhcpc_changed_ifindex.patch +++ b/package/utils/busybox/patches/201-udhcpc_changed_ifindex.patch @@ -1,6 +1,6 @@ --- a/networking/udhcp/dhcpc.c +++ b/networking/udhcp/dhcpc.c -@@ -1442,6 +1442,12 @@ int udhcpc_main(int argc UNUSED_PARAM, c +@@ -1417,6 +1417,12 @@ int udhcpc_main(int argc UNUSED_PARAM, c /* silence "uninitialized!" warning */ unsigned timestamp_before_wait = timestamp_before_wait; diff --git a/package/utils/busybox/patches/203-udhcpc_renew_no_deconfig.patch b/package/utils/busybox/patches/203-udhcpc_renew_no_deconfig.patch index 7b77d2970..f8e664038 100644 --- a/package/utils/busybox/patches/203-udhcpc_renew_no_deconfig.patch +++ b/package/utils/busybox/patches/203-udhcpc_renew_no_deconfig.patch @@ -1,6 +1,6 @@ --- a/networking/udhcp/dhcpc.c +++ b/networking/udhcp/dhcpc.c -@@ -1112,7 +1112,6 @@ static void perform_renew(void) +@@ -1124,7 +1124,6 @@ static void perform_renew(void) state = RENEW_REQUESTED; break; case RENEW_REQUESTED: /* impatient are we? fine, square 1 */ diff --git a/package/utils/busybox/patches/230-add_nslookup_lede.patch b/package/utils/busybox/patches/230-add_nslookup_lede.patch index 14c0e87b3..f0ac4b51c 100644 --- a/package/utils/busybox/patches/230-add_nslookup_lede.patch +++ b/package/utils/busybox/patches/230-add_nslookup_lede.patch @@ -34,7 +34,7 @@ Signed-off-by: Jo-Philipp Wich # However, on *other platforms* it fails when some of those flags --- /dev/null +++ b/networking/nslookup_lede.c -@@ -0,0 +1,915 @@ +@@ -0,0 +1,914 @@ +/* + * nslookup_lede - musl compatible replacement for busybox nslookup + * @@ -752,18 +752,6 @@ Signed-off-by: Jo-Philipp Wich + return buf; +} + -+ -+#if ENABLE_FEATURE_NSLOOKUP_OPENWRT_LONG_OPTIONS -+static const char nslookup_longopts[] ALIGN1 = -+ "type\0" Required_argument "q" -+ "querytype\0" Required_argument "q" -+ "port\0" Required_argument "p" -+ "retry\0" Required_argument "r" -+ "timeout\0" Required_argument "t" -+ "stats\0" Required_argument "s" -+ ; -+#endif -+ +int nslookup_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE; +int nslookup_main(int argc, char **argv) +{ @@ -779,13 +767,24 @@ Signed-off-by: Jo-Philipp Wich + HEADER *header; + +#if ENABLE_FEATURE_NSLOOKUP_OPENWRT_LONG_OPTIONS -+ applet_long_options = nslookup_longopts; -+#endif ++ static const char nslookup_longopts[] ALIGN1 = ++ "type\0" Required_argument "q" ++ "querytype\0" Required_argument "q" ++ "port\0" Required_argument "p" ++ "retry\0" Required_argument "r" ++ "timeout\0" Required_argument "t" ++ "stats\0" No_argument "s" ++ ; + -+ opt_complementary = "q::"; -+ opts = getopt32(argv, "+q:*p:+r:+t:+s", ++ opts = getopt32long(argv, "^" "+q:*p:+r:+t:+s" "\0" "q::", ++ nslookup_longopts, + &type_strings, &default_port, + &default_retry, &default_timeout); ++#else ++ opts = getopt32(argv, "^" "+q:*p:+r:+t:+s" "\0" "q::", ++ &type_strings, &default_port, ++ &default_retry, &default_timeout); ++#endif + + while (type_strings) { + ptr = llist_pop(&type_strings); diff --git a/package/utils/busybox/patches/250-date-k-flag.patch b/package/utils/busybox/patches/250-date-k-flag.patch index 476440f62..3a85312e2 100644 --- a/package/utils/busybox/patches/250-date-k-flag.patch +++ b/package/utils/busybox/patches/250-date-k-flag.patch @@ -1,6 +1,6 @@ --- a/coreutils/date.c +++ b/coreutils/date.c -@@ -122,6 +122,7 @@ +@@ -123,6 +123,7 @@ //usage: IF_FEATURE_DATE_ISOFMT( //usage: "\n -D FMT Use FMT for -d TIME conversion" //usage: ) @@ -8,7 +8,7 @@ //usage: "\n" //usage: "\nRecognized TIME formats:" //usage: "\n hh:mm[:ss]" -@@ -138,9 +139,8 @@ +@@ -139,9 +140,8 @@ #include "libbb.h" #include "common_bufsiz.h" @@ -20,7 +20,7 @@ enum { OPT_RFC2822 = (1 << 0), /* R */ -@@ -148,8 +148,9 @@ enum { +@@ -149,8 +149,9 @@ enum { OPT_UTC = (1 << 2), /* u */ OPT_DATE = (1 << 3), /* d */ OPT_REFERENCE = (1 << 4), /* r */ @@ -31,8 +31,8 @@ + OPT_HINT = (1 << 7) * ENABLE_FEATURE_DATE_ISOFMT, /* D */ }; - static void maybe_set_utc(int opt) -@@ -167,12 +168,15 @@ static const char date_longopts[] ALIGN1 + #if ENABLE_LONG_OPTS +@@ -162,6 +163,7 @@ static const char date_longopts[] ALIGN1 /* "universal\0" No_argument "u" */ "date\0" Required_argument "d" "reference\0" Required_argument "r" @@ -40,6 +40,7 @@ ; #endif +@@ -181,6 +183,8 @@ static void maybe_set_utc(int opt) int date_main(int argc, char **argv) MAIN_EXTERNALLY_VISIBLE; int date_main(int argc UNUSED_PARAM, char **argv) { @@ -48,16 +49,16 @@ struct timespec ts; struct tm tm_time; char buf_fmt_dt2str[64]; -@@ -187,7 +191,7 @@ int date_main(int argc UNUSED_PARAM, cha - opt_complementary = "d--s:s--d" - IF_FEATURE_DATE_ISOFMT(":R--I:I--R"); - IF_LONG_OPTS(applet_long_options = date_longopts;) -- opt = getopt32(argv, "Rs:ud:r:" -+ opt = getopt32(argv, "Rs:ud:r:k" - IF_FEATURE_DATE_ISOFMT("I::D:"), - &date_str, &date_str, &filename - IF_FEATURE_DATE_ISOFMT(, &isofmt_arg, &fmt_str2dt)); -@@ -244,6 +248,31 @@ int date_main(int argc UNUSED_PARAM, cha +@@ -193,7 +197,7 @@ int date_main(int argc UNUSED_PARAM, cha + char *isofmt_arg = NULL; + + opt = getopt32long(argv, "^" +- "Rs:ud:r:" ++ "Rs:ud:r:k" + IF_FEATURE_DATE_ISOFMT("I::D:") + "\0" + "d--s:s--d" +@@ -256,6 +260,31 @@ int date_main(int argc UNUSED_PARAM, cha if (*argv) bb_show_usage(); diff --git a/package/utils/busybox/patches/510-move-passwd-applet-to-bin.patch b/package/utils/busybox/patches/510-move-passwd-applet-to-bin.patch index b19d1c9a3..7dc2cd3ff 100644 --- a/package/utils/busybox/patches/510-move-passwd-applet-to-bin.patch +++ b/package/utils/busybox/patches/510-move-passwd-applet-to-bin.patch @@ -1,7 +1,7 @@ --- a/loginutils/passwd.c +++ b/loginutils/passwd.c @@ -23,7 +23,7 @@ - //config: With this option passwd will refuse new passwords which are "weak". + //config: With this option passwd will refuse new passwords which are "weak". //applet:/* Needs to be run by root or be suid root - needs to change /etc/{passwd,shadow}: */ -//applet:IF_PASSWD(APPLET(passwd, BB_DIR_USR_BIN, BB_SUID_REQUIRE)) diff --git a/package/utils/busybox/patches/600-cve-2017-16544.patch b/package/utils/busybox/patches/600-cve-2017-16544.patch deleted file mode 100644 index 3b142bdd6..000000000 --- a/package/utils/busybox/patches/600-cve-2017-16544.patch +++ /dev/null @@ -1,35 +0,0 @@ -From c3797d40a1c57352192c6106cc0f435e7d9c11e8 Mon Sep 17 00:00:00 2001 -From: Denys Vlasenko -Date: Tue, 7 Nov 2017 18:09:29 +0100 -Subject: lineedit: do not tab-complete any strings which have control - characters - -function old new delta -add_match 41 68 +27 - -Signed-off-by: Denys Vlasenko ---- - libbb/lineedit.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - ---- a/libbb/lineedit.c -+++ b/libbb/lineedit.c -@@ -633,6 +633,18 @@ static void free_tab_completion_data(voi - - static void add_match(char *matched) - { -+ unsigned char *p = (unsigned char*)matched; -+ while (*p) { -+ /* ESC attack fix: drop any string with control chars */ -+ if (*p < ' ' -+ || (!ENABLE_UNICODE_SUPPORT && *p >= 0x7f) -+ || (ENABLE_UNICODE_SUPPORT && *p == 0x7f) -+ ) { -+ free(matched); -+ return; -+ } -+ p++; -+ } - matches = xrealloc_vector(matches, 4, num_matches); - matches[num_matches] = matched; - num_matches++; diff --git a/package/utils/e2fsprogs/Makefile b/package/utils/e2fsprogs/Makefile index 068ce3ede..3411bea74 100644 --- a/package/utils/e2fsprogs/Makefile +++ b/package/utils/e2fsprogs/Makefile @@ -8,8 +8,8 @@ include $(TOPDIR)/rules.mk PKG_NAME:=e2fsprogs -PKG_VERSION:=1.43.7 -PKG_HASH:=2a6367289047d68d9ba6a46cf89ab9a1efd0556cde02a51ebaf414ff51edded9 +PKG_VERSION:=1.44.1 +PKG_HASH:=0ca164c1c87724df904c918b2d7051ef989b51de725db66c67514dbe6dd2b9ef PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz @@ -17,23 +17,20 @@ PKG_SOURCE_URL:=@KERNEL/linux/kernel/people/tytso/e2fsprogs/v$(PKG_VERSION)/ PKG_LICENSE:=GPL-2.0 PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs -PKG_BUILD_DEPENDS:=util-linux +PKG_BUILD_DEPENDS:=util-linux e2fsprogs/host PKG_INSTALL:=1 PKG_BUILD_PARALLEL:=1 include $(INCLUDE_DIR)/package.mk - -define Package/e2fsprogs/Default - URL:=http://e2fsprogs.sourceforge.net/ - SUBMENU:=Filesystem -endef +include $(INCLUDE_DIR)/host-build.mk define Package/e2fsprogs -$(call Package/e2fsprogs/Default) SECTION:=utils CATEGORY:=Utilities + SUBMENU:=Filesystem TITLE:=Ext2/3/4 filesystem utilities + URL:=http://e2fsprogs.sourceforge.net/ DEPENDS:=+libuuid +libext2fs endef @@ -43,17 +40,43 @@ define Package/e2fsprogs/description endef define Package/libext2fs -$(call Package/e2fsprogs/Default) SECTION:=libs CATEGORY:=Libraries - DEPENDS:=+libuuid +libblkid TITLE:=ext2/3/4 filesystem library + URL:=http://e2fsprogs.sourceforge.net/ + DEPENDS:=+libuuid +libblkid +libss +libcomerr endef define Package/libext2fs/description libext2fs is a library which can access ext2, ext3 and ext4 filesystems. endef +define Package/libss + SECTION:=libs + CATEGORY:=Libraries + TITLE:=command-line interface parsing library + URL:=http://e2fsprogs.sourceforge.net/ + DEPENDS:=+libcomerr +endef + +define Package/libss/description + This pacakge contains libss, a command-line interface parsing library + bundled with e2fsprogs. +endef + +define Package/libcomerr + SECTION:=libs + CATEGORY:=Libraries + TITLE:=common error description library + URL:=http://e2fsprogs.sourceforge.net/ + DEPENDS:=+libuuid +endef + +define Package/libcomerr/description + This package contains libcom_err, the common error description library + bundled with e2fsprogs. +endef + define Package/tune2fs $(call Package/e2fsprogs) TITLE:=Ext2 Filesystem tune utility @@ -153,11 +176,36 @@ define Build/InstallDev $(INSTALL_DIR) $(1)/usr/lib $(CP) $(PKG_BUILD_DIR)/lib/libext2fs.{so,a}* $(1)/usr/lib $(CP) $(PKG_BUILD_DIR)/lib/libcom_err.{so,a}* $(1)/usr/lib + $(CP) $(PKG_BUILD_DIR)/lib/libss.{so,a}* $(1)/usr/lib $(INSTALL_DIR) $(1)/usr/include/ext2fs $(CP) $(PKG_BUILD_DIR)/lib/ext2fs/*.h $(1)/usr/include/ext2fs $(INSTALL_DIR) $(1)/usr/include/et - $(CP) $(PKG_BUILD_DIR)/lib/et/*.h $(1)/usr/include/et + $(INSTALL_BIN) $(PKG_BUILD_DIR)/lib/et/*.h $(1)/usr/include/et + # Apparently there is some confusion + echo "#include " > $(1)/usr/include/com_err.h + $(INSTALL_DIR) $(1)/usr/include/ss + $(CP) \ + $(PKG_BUILD_DIR)/lib/ss/ss.h \ + $(PKG_BUILD_DIR)/lib/ss/ss_err.h \ + $(1)/usr/include/ss/ +endef + +define Host/Compile + $(MAKE) $(PKG_JOBS) -C $(HOST_BUILD_DIR)/lib/ss mk_cmds + $(MAKE) $(PKG_JOBS) -C $(HOST_BUILD_DIR)/lib/et compile_et +endef + +define Host/Install + $(INSTALL_DIR) $(1)/share/et + $(CP) $(HOST_BUILD_DIR)/lib/et/et_[ch].awk $(1)/share/et/ + $(INSTALL_DIR) $(1)/share/ss + $(CP) $(HOST_BUILD_DIR)/lib/ss/ct_c.{sed,awk} $(1)/share/ss/ + $(INSTALL_DIR) $(1)/bin + $(CP) \ + $(HOST_BUILD_DIR)/lib/et/compile_et \ + $(HOST_BUILD_DIR)/lib/ss/mk_cmds \ + $(1)/bin/ endef define Package/e2fsprogs/conffiles @@ -182,15 +230,19 @@ define Package/e2fsprogs/install $(INSTALL_DATA) ./files/e2fsck.conf $(1)/etc/e2fsck.conf endef -define Package/libcom_err/install +define Package/libcomerr/install + $(INSTALL_DIR) $(1)/usr/lib + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libcom_err.so* $(1)/usr/lib/ +endef + +define Package/libss/install + $(INSTALL_DIR) $(1)/usr/lib + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libss.so* $(1)/usr/lib/ endef define Package/libext2fs/install $(INSTALL_DIR) $(1)/usr/lib - $(CP) \ - $(PKG_INSTALL_DIR)/usr/lib/libext2fs.so.* \ - $(PKG_INSTALL_DIR)/usr/lib/libcom_err.so.* \ - $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libext2fs.so.* $(1)/usr/lib/ endef define Package/libext2fs/install_lib @@ -233,7 +285,6 @@ define Package/debugfs/install $(INSTALL_DIR) $(1)/usr/sbin $(INSTALL_DIR) $(1)/usr/lib $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/debugfs $(1)/usr/sbin/ - $(CP) $(PKG_INSTALL_DIR)/usr/lib/libss.so.* $(1)/usr/lib/ endef define Package/chattr/install @@ -247,6 +298,8 @@ define Package/lsattr/install endef $(eval $(call BuildPackage,e2fsprogs)) +$(eval $(call BuildPackage,libcomerr)) +$(eval $(call BuildPackage,libss)) $(eval $(call BuildPackage,libext2fs)) $(eval $(call BuildPackage,tune2fs)) $(eval $(call BuildPackage,resize2fs)) @@ -257,3 +310,4 @@ $(eval $(call BuildPackage,filefrag)) $(eval $(call BuildPackage,debugfs)) $(eval $(call BuildPackage,chattr)) $(eval $(call BuildPackage,lsattr)) +$(eval $(call HostBuild)) diff --git a/package/utils/e2fsprogs/patches/000-relocatable.patch b/package/utils/e2fsprogs/patches/000-relocatable.patch new file mode 100644 index 000000000..017aca1b0 --- /dev/null +++ b/package/utils/e2fsprogs/patches/000-relocatable.patch @@ -0,0 +1,46 @@ +--- a/lib/et/compile_et.sh.in ++++ b/lib/et/compile_et.sh.in +@@ -2,9 +2,15 @@ + # + # + +-datarootdir=@datarootdir@ +-AWK=@AWK@ +-DIR=@datadir@/et ++if test "x$STAGING_DIR" = x ; then ++ datarootdir=@datarootdir@ ++ AWK=@AWK@ ++ DIR=@datadir@/et ++else ++ datarootdir="$STAGING_DIR/../hostpkg/share" ++ AWK=awk ++ DIR="$datarootdir/et" ++fi + + if test "$1" = "--build-tree" ; then + shift; +--- a/lib/ss/mk_cmds.sh.in ++++ b/lib/ss/mk_cmds.sh.in +@@ -1,11 +1,17 @@ + #!/bin/sh + # + # +- +-datarootdir=@datarootdir@ +-DIR=@datadir@/ss +-AWK=@AWK@ +-SED=@SED@ ++if test "x$STAGING_DIR" = x ; then ++ datarootdir=@datarootdir@ ++ DIR=@datadir@/ss ++ AWK=@AWK@ ++ SED=@SED@ ++else ++ datarootdir="$STAGING_DIR/../hostpkg/share" ++ DIR="$datarootdir/ss" ++ AWK=awk ++ SED=sed ++fi + + for as_var in \ + LANG LANGUAGE LC_ADDRESS LC_ALL LC_COLLATE LC_CTYPE LC_IDENTIFICATION \ diff --git a/package/utils/e2fsprogs/patches/002-fix-subst-host-build.patch b/package/utils/e2fsprogs/patches/002-fix-subst-host-build.patch index c92e2280e..5c28a59b8 100644 --- a/package/utils/e2fsprogs/patches/002-fix-subst-host-build.patch +++ b/package/utils/e2fsprogs/patches/002-fix-subst-host-build.patch @@ -1,8 +1,8 @@ --- a/util/subst.c +++ b/util/subst.c -@@ -9,6 +9,7 @@ - #include "config.h" +@@ -10,6 +10,7 @@ #else + #define HAVE_SYS_STAT_H #define HAVE_SYS_TIME_H +#define HAVE_SYS_STAT_H #endif diff --git a/package/utils/f2fs-tools/Makefile b/package/utils/f2fs-tools/Makefile index 3e8bf63f0..391eb61b8 100644 --- a/package/utils/f2fs-tools/Makefile +++ b/package/utils/f2fs-tools/Makefile @@ -8,14 +8,14 @@ include $(TOPDIR)/rules.mk PKG_NAME:=f2fs-tools -PKG_VERSION:=1.9.0 +PKG_VERSION:=1.10.0 PKG_RELEASE:=1 PKG_LICENSE:=GPLv2 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git/snapshot/ -PKG_HASH:=77217562ae7011a6d81b7b3c43c42623db1796a57596408d6c8037def70d6cc7 +PKG_HASH:=e841b086dbe02e3553b2c2ecb8c11a7990cfa9ca835c3d7aea6d600c6a543316 PKG_FIXUP:=autoreconf PKG_BUILD_PARALLEL:=1 diff --git a/package/utils/jboot-tools/Makefile b/package/utils/jboot-tools/Makefile new file mode 100644 index 000000000..ce9758ba3 --- /dev/null +++ b/package/utils/jboot-tools/Makefile @@ -0,0 +1,28 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=jboot-tools +PKG_RELEASE:=1 +CMAKE_INSTALL:=1 +PKG_FLAGS:=nonshared + +include $(INCLUDE_DIR)/package.mk +include $(INCLUDE_DIR)/cmake.mk + +define Package/jboot-tools + SECTION:=firmware + CATEGORY:=Firmware + DEPENDS:=@TARGET_ramips + TITLE:=Utilites for accessing JBOOT based D-Link devices Calibration data +endef + +define Package/jboot-tools/description + This package contains: + jboot_config_read.c: partially read the config partition of JBOOT based D-Link devices. +endef + +define Package/jboot-tools/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/jboot_config_read $(1)/usr/bin/ +endef + +$(eval $(call BuildPackage,jboot-tools)) diff --git a/package/utils/jboot-tools/README.md b/package/utils/jboot-tools/README.md new file mode 100644 index 000000000..0d1aeac9d --- /dev/null +++ b/package/utils/jboot-tools/README.md @@ -0,0 +1,46 @@ +Userspace utilties for jboot based devices config partition read + +## Building + +``` +mkdir build +cd build +cmake /path/to/jboot-tools +make +``` + +## Usage + +All command line parameters are documented: +``` +jboot_config_read -h +``` + +Show all stored MACs: +``` +jboot_config_read -m -i PATH_TO_CONFIG_PARTITIO +``` + +Extract wifi eeprom data: +``` +jboot_config_read -i PATH_TO_CONFIG_PARTITION -e OUTPUT_PATH +``` + + +## LICENSE + +See `LICENSE`: + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. diff --git a/package/utils/jboot-tools/src/CMakeLists.txt b/package/utils/jboot-tools/src/CMakeLists.txt new file mode 100644 index 000000000..98fbab38d --- /dev/null +++ b/package/utils/jboot-tools/src/CMakeLists.txt @@ -0,0 +1,11 @@ +cmake_minimum_required(VERSION 2.6) + +PROJECT(jboot-tools C) +ADD_DEFINITIONS(-Wall -Werror --std=gnu99 -Wmissing-declarations) + +SET(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "") + +ADD_EXECUTABLE(jboot_config_read jboot_config_read.c) +TARGET_LINK_LIBRARIES(jboot_config_read) + +INSTALL(TARGETS jboot_config_read RUNTIME DESTINATION bin) diff --git a/package/utils/jboot-tools/src/jboot_config_read.c b/package/utils/jboot-tools/src/jboot_config_read.c new file mode 100644 index 000000000..c65b0917a --- /dev/null +++ b/package/utils/jboot-tools/src/jboot_config_read.c @@ -0,0 +1,427 @@ +/* + * jboot_config_read + * + * Copyright (C) 2018 Paweł Dembicki + * + * This tool is based on mkdlinkfw. + * Copyright (C) 2018 Paweł Dembicki + * Copyright (C) 2009 Gabor Juhos + * Copyright (C) 2008,2009 Wang Jian + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +#include +#include +#include +#include +#include /* for unlink() */ +#include +#include /* for getopt() */ +#include +#include +#include +#include +#include + + + +#define ERR(fmt, ...) do { \ + fflush(0); \ + fprintf(stderr, "[%s] *** error: " fmt "\n", \ + progname, ## __VA_ARGS__); \ +} while (0) + +#define ERRS(fmt, ...) do { \ + int save = errno; \ + fflush(0); \ + fprintf(stderr, "[%s] *** error: " fmt ": %s\n", \ + progname, ## __VA_ARGS__, strerror(save)); \ +} while (0) + +#define VERBOSE(fmt, ...) do { \ + if (verbose) { \ + fprintf(stdout, "[%s] " fmt "\n", progname, ## __VA_ARGS__); \ + } \ +} while (0) + +#define STAG_SIZE 16 +#define STAG_MAGIC 0x2B24 +#define STAG_ID 0x02 + +#define CSXF_SIZE 16 +#define CSXF_MAGIC 0x5343 + +#define MAX_DATA_HEADER 128 +#define DATA_HEADER_UNKNOWN 0x8000 +#define DATA_HEADER_EEPROM 0xF5 +#define DATA_HEADER_CONFIG 0x42 +#define DATA_HEADER_SIZE 6 + +#define DATA_HEADER_ID_MAC 0x30 +#define DATA_HEADER_ID_CAL 0x0 + +/* ARM update header 2.0 + * used only in factory images to erase and flash selected area + */ +struct stag_header { /* used only of sch2 wrapped kernel data */ + uint8_t cmark; /* in factory 0xFF ,in sysuograde must be the same as id */ + uint8_t id; /* 0x04 */ + uint16_t magic; /* magic 0x2B24 */ + uint32_t time_stamp; /* timestamp calculated in jboot way */ + uint32_t image_length; /* lentgh of kernel + sch2 header */ + uint16_t image_checksum; /* negated jboot_checksum of sch2 + kernel */ + uint16_t tag_checksum; /* negated jboot_checksum of stag header data */ +}; + +struct csxf_header { + uint16_t magic; /* 0x5343, 'CS' in little endian */ + uint16_t checksum; /* checksum, include header & body */ + uint32_t body_length; /* length of body */ + uint8_t body_encoding; /* encoding method of body */ + uint8_t reserved[3]; + uint32_t raw_length; /* length of body before encoded */ +}; + +struct data_header { + uint8_t id; + uint8_t type; /* 0x42xx for config 0xF5xx for eeprom */ + uint16_t unknown; + uint16_t length; /* length of body */ + uint8_t data[]; /* encoding method of body */ +}; + +/* globals */ + +char *ofname; +char *ifname; +char *progname; + +uint8_t *buffer; +uint32_t config_size; + +uint32_t start_offset; +uint8_t mac_duplicate; +uint8_t mac_print; +uint8_t print_data; +uint8_t verbose; + +static void usage(int status) +{ + fprintf(stderr, "Usage: %s [OPTIONS...]\n", progname); + fprintf(stderr, + "\n" + "Options:\n" + " -i config partition file \n" + " -m print mac address\n" + " -e save eeprom calibration data image to the file \n" + " -o set start offset to \n" + " -p print config data\n" + " -v verbose\n" + " -h show this screen\n"); + + exit(status); +} + +static void print_data_header(struct data_header *printed_header) +{ + printf("id: 0x%02X " + "type: 0x%02X " + "unknown: 0x%04X " + "length: 0x%04X\n" + "data: ", + printed_header->id, + printed_header->type, + printed_header->unknown, printed_header->length); + + for (uint16_t i = 0; i < printed_header->length; i++) + printf("%02X ", printed_header->data[i]); + + printf("\n"); + +} + +static uint16_t jboot_checksum(uint16_t start_val, uint16_t *data, int size) +{ + uint32_t counter = start_val; + uint16_t *ptr = data; + + while (size > 1) { + counter += *ptr; + ++ptr; + while (counter >> 16) + counter = (uint16_t) counter + (counter >> 16); + size -= 2; + } + if (size > 0) { + counter += *(uint8_t *) ptr; + counter -= 0xFF; + } + while (counter >> 16) + counter = (uint16_t) counter + (counter >> 16); + return counter; +} + +static int find_header(uint8_t *buf, uint32_t buf_size, + struct data_header **data_table) +{ + uint8_t *tmp_buf = buf + start_offset; + uint8_t tmp_hdr[4] = { STAG_ID, STAG_ID, (STAG_MAGIC & 0xFF), (STAG_MAGIC >> 8) }; + struct csxf_header *tmp_csxf_header; + uint16_t tmp_checksum = 0; + uint16_t data_header_counter = 0; + int ret = EXIT_FAILURE; + + VERBOSE("Looking for STAG header!"); + + while ((uint32_t) tmp_buf - (uint32_t) buf <= buf_size) { + if (!memcmp(tmp_buf, tmp_hdr, 4)) { + if (((struct stag_header *)tmp_buf)->tag_checksum == + (uint16_t) ~jboot_checksum(0, (uint16_t *) tmp_buf, + STAG_SIZE - 2)) { + VERBOSE("Found proper STAG header at: 0x%X.", + tmp_buf - buf); + break; + } + } + tmp_buf++; + } + + tmp_csxf_header = (struct csxf_header *)(tmp_buf + STAG_SIZE); + if (tmp_csxf_header->magic != CSXF_MAGIC) { + ERR("CSXF magic incorrect! 0x%X != 0x%X", + tmp_csxf_header->magic, CSXF_MAGIC); + goto out; + } + VERBOSE("CSXF magic ok."); + tmp_checksum = tmp_csxf_header->checksum; + tmp_csxf_header->checksum = 0; + + tmp_csxf_header->checksum = + (uint16_t) ~jboot_checksum(0, (uint16_t *) (tmp_buf + STAG_SIZE), + tmp_csxf_header->raw_length + + CSXF_SIZE); + + if (tmp_checksum != tmp_csxf_header->checksum) { + ERR("CSXF checksum incorrect! Stored: 0x%X Calculated: 0x%X", + tmp_checksum, tmp_csxf_header->checksum); + goto out; + } + VERBOSE("CSXF image checksum ok."); + + tmp_buf = tmp_buf + STAG_SIZE + CSXF_SIZE; + + while ((uint32_t) tmp_buf - (uint32_t) buf <= buf_size) { + + struct data_header *tmp_data_header = + (struct data_header *)tmp_buf; + + if (tmp_data_header->unknown != DATA_HEADER_UNKNOWN) { + tmp_buf++; + continue; + } + if (tmp_data_header->type != DATA_HEADER_EEPROM + && tmp_data_header->type != DATA_HEADER_CONFIG) { + tmp_buf++; + continue; + } + + data_table[data_header_counter] = tmp_data_header; + tmp_buf += + DATA_HEADER_SIZE + data_table[data_header_counter]->length; + data_header_counter++; + + } + + ret = data_header_counter; + + out: + return ret; +} + +static int read_file(char *file_name) +{ + int ret = EXIT_FAILURE; + uint32_t file_size = 0; + FILE *fp; + + fp = fopen(file_name, "r"); + + if (!fp) { + ERR("Failed to open config input file %s", file_name); + goto out; + } + + fseek(fp, 0L, SEEK_END); + file_size = ftell(fp); + fseek(fp, 0L, SEEK_SET); + + buffer = malloc(file_size); + VERBOSE("Allocated %d bytes.", file_size); + + if (fread(buffer, 1, file_size, fp) != file_size) { + ERR("Failed to read config input file %s", file_name); + goto out_free_buf; + } + + VERBOSE("Read %d bytes of config input file %s", file_size, file_name); + config_size = file_size; + ret = EXIT_SUCCESS; + goto out; + + out_free_buf: + free(buffer); + fclose(fp); + out: + return ret; +} + +static int write_file(const char *ofname, const uint8_t *data, int len) +{ + FILE *f; + int ret = EXIT_FAILURE; + + f = fopen(ofname, "w"); + if (f == NULL) { + ERRS("could not open \"%s\" for writing", ofname); + goto out; + } + + errno = 0; + fwrite(data, len, 1, f); + if (errno) { + ERRS("unable to write output file"); + goto out_flush; + } + + VERBOSE("firmware file \"%s\" completed", ofname); + + ret = EXIT_SUCCESS; + + out_flush: + fflush(f); + fclose(f); + if (ret != EXIT_SUCCESS) + unlink(ofname); + out: + return ret; +} + +static void print_mac(struct data_header **data_table, int cnt) +{ + + for (int i = 0; i < cnt; i++) { + if (data_table[i]->type == DATA_HEADER_CONFIG + && data_table[i]->id == DATA_HEADER_ID_MAC) { + int j; + for (j = 0; j < 5; j++) + printf("%02x:", data_table[i]->data[j]); + printf("%02x\n", data_table[i]->data[j]); + } + + } + +} + +static int write_eeprom(struct data_header **data_table, int cnt) +{ + int ret = EXIT_FAILURE; + + for (int i = 0; i < cnt; i++) { + if (data_table[i]->type == DATA_HEADER_EEPROM + && data_table[i]->id == DATA_HEADER_ID_CAL) { + ret = + write_file(ofname, data_table[i]->data, + data_table[i]->length); + break; + } + + } + + return ret; +} + +int main(int argc, char *argv[]) +{ + int ret = EXIT_FAILURE; + int configs_counter = 0; + struct data_header *configs_table[MAX_DATA_HEADER]; + buffer = NULL; + config_size = 0; + + progname = basename(argv[0]); + start_offset = 0; + mac_print = 0; + print_data = 0; + verbose = 0; + ofname = NULL; + ifname = NULL; + + while (1) { + int c; + + c = getopt(argc, argv, "de:hi:mo:pv"); + if (c == -1) + break; + + switch (c) { + case 'm': + mac_print = 1; + break; + case 'i': + ifname = optarg; + break; + case 'e': + ofname = optarg; + break; + case 'o': + sscanf(optarg, "0x%x", &start_offset); + break; + case 'p': + print_data = 1; + break; + case 'v': + verbose = 1; + VERBOSE("Enable verbose!"); + break; + default: + usage(EXIT_FAILURE); + break; + } + } + + if (!ifname) + usage(EXIT_FAILURE); + + ret = read_file(ifname); + + if (ret || config_size <= 0) + goto out; + + configs_counter = find_header(buffer, config_size, configs_table); + + if (configs_counter <= 0) + goto out_free_buf; + + if (print_data || verbose) { + for (int i = 0; i < configs_counter; i++) + print_data_header(configs_table[i]); + } + + if (mac_print) + print_mac(configs_table, configs_counter); + + ret = EXIT_SUCCESS; + + if (ofname) + ret = write_eeprom(configs_table, configs_counter); + + out_free_buf: + free(buffer); + out: + return ret; + +} diff --git a/package/utils/jsonfilter/Makefile b/package/utils/jsonfilter/Makefile index 32be1adb9..6b7557b38 100644 --- a/package/utils/jsonfilter/Makefile +++ b/package/utils/jsonfilter/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/jsonpath.git -PKG_SOURCE_DATE:=2016-07-02 -PKG_SOURCE_VERSION:=dea067ad67d977c247c300c06676a06adf21e0c7 -PKG_MIRROR_HASH:=6c0e30da3f0c82527f9b5285d7c6ae61406732f2b0543b93131fe115ffc2987a +PKG_SOURCE_DATE:=2018-02-04 +PKG_SOURCE_VERSION:=c7e938d6582a436dddc938539e72dd1320625c54 +PKG_MIRROR_HASH:=0601b4d7aa5ee096e99388a57cb0701673ab58fccd6ed2984a2abbd4f846e045 CMAKE_INSTALL:=1 PKG_MAINTAINER:=Jo-Philipp Wich diff --git a/package/utils/lua/Makefile b/package/utils/lua/Makefile index 89b6a8711..97c18def6 100644 --- a/package/utils/lua/Makefile +++ b/package/utils/lua/Makefile @@ -13,8 +13,6 @@ PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=http://www.lua.org/ftp/ \ - http://ftp.gwdg.de/pub/languages/lua/ \ - http://mirrors.dotsrc.org/lua/ \ http://www.tecgraf.puc-rio.br/lua/ftp/ PKG_HASH:=2640fc56a795f29d28ef15e13c34a47e223960b0240e8cb0a82d9b0738695333 PKG_BUILD_PARALLEL:=1 diff --git a/package/utils/mtd-utils/Makefile b/package/utils/mtd-utils/Makefile index e36eb4d52..1e3c28115 100644 --- a/package/utils/mtd-utils/Makefile +++ b/package/utils/mtd-utils/Makefile @@ -47,7 +47,7 @@ endef define Package/nand-utils $(call Package/mtd-utils/Default) - TITLE:=Utilities for nand flash read/write/test + TITLE:=Utilities for nand flash erase/read/write/test endef define Package/nand-utils/description @@ -72,7 +72,7 @@ endef define Package/nand-utils/install $(INSTALL_DIR) $(1)/usr/sbin $(INSTALL_BIN) \ - $(PKG_INSTALL_DIR)/usr/sbin/{nanddump,nandwrite,nandtest,mtdinfo} $(1)/usr/sbin/ + $(PKG_INSTALL_DIR)/usr/sbin/{flash_erase,nanddump,nandwrite,nandtest,mtdinfo} $(1)/usr/sbin/ endef $(eval $(call BuildPackage,ubi-utils)) diff --git a/package/utils/mtd-utils/patches/010-fix-rpmatch.patch b/package/utils/mtd-utils/patches/010-fix-rpmatch.patch index 9d0de7f52..8374a26e9 100644 --- a/package/utils/mtd-utils/patches/010-fix-rpmatch.patch +++ b/package/utils/mtd-utils/patches/010-fix-rpmatch.patch @@ -1,6 +1,6 @@ --- a/include/common.h +++ b/include/common.h -@@ -137,10 +137,12 @@ static inline bool prompt(const char *ms +@@ -152,10 +152,12 @@ static inline bool prompt(const char *ms } if (strcmp("\n", line) != 0) { diff --git a/package/utils/mtd-utils/patches/130-lzma_jffs2.patch b/package/utils/mtd-utils/patches/130-lzma_jffs2.patch index 8c3794d76..c6454fed5 100644 --- a/package/utils/mtd-utils/patches/130-lzma_jffs2.patch +++ b/package/utils/mtd-utils/patches/130-lzma_jffs2.patch @@ -2,7 +2,7 @@ +++ b/Makefile @@ -3,7 +3,7 @@ - VERSION = 1.5.1 + VERSION = 1.5.2 -CPPFLAGS += -D_GNU_SOURCE -I./include -I$(BUILDDIR)/include -I./ubi-utils/include $(ZLIBCPPFLAGS) $(LZOCPPFLAGS) $(UUIDCPPFLAGS) +CPPFLAGS += -D_GNU_SOURCE -I./include -I$(BUILDDIR)/include -I./ubi-utils/include $(ZLIBCPPFLAGS) $(LZOCPPFLAGS) $(UUIDCPPFLAGS) -I./include/linux/lzma @@ -122,7 +122,7 @@ +} + +STATIC int jffs2_lzma_compress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t *sourcelen, uint32_t *dstlen, void *model) ++ uint32_t *sourcelen, uint32_t *dstlen) +{ + SizeT compress_size = (SizeT)(*dstlen); + int ret; @@ -147,7 +147,7 @@ +} + +STATIC int jffs2_lzma_decompress(unsigned char *data_in, unsigned char *cpage_out, -+ uint32_t srclen, uint32_t destlen, void *model) ++ uint32_t srclen, uint32_t destlen) +{ + int ret; + SizeT dl = (SizeT)destlen; @@ -244,7 +244,7 @@ + #define LZMA_FREE free + #define PRINT_ERROR(msg) fprintf(stderr, msg) + #define INIT -+ #define STATIC ++ #define STATIC static +#endif + +#include "lzma/LzmaDec.h" @@ -948,9 +948,9 @@ +} + +Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; } -+Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } ++static Byte MatchFinder_GetIndexByte(CMatchFinder *p, Int32 index) { return p->buffer[index]; } + -+UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } ++static UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos - p->pos; } + +void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue) +{ @@ -2356,7 +2356,7 @@ + p->needFlush = 0; +} + -+void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) ++static void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState) +{ + p->needFlush = 1; + p->remainLen = 0; @@ -2776,7 +2776,7 @@ +#define kNumLogBits (9 + (int)sizeof(size_t) / 2) +#define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7) + -+void LzmaEnc_FastPosInit(Byte *g_FastPos) ++static void LzmaEnc_FastPosInit(Byte *g_FastPos) +{ + int c = 2, slotFast; + g_FastPos[0] = 0; @@ -3030,7 +3030,7 @@ + CSaveState saveState; +} CLzmaEnc; + -+void LzmaEnc_SaveState(CLzmaEncHandle pp) ++static void LzmaEnc_SaveState(CLzmaEncHandle pp) +{ + CLzmaEnc *p = (CLzmaEnc *)pp; + CSaveState *dest = &p->saveState; @@ -3056,7 +3056,7 @@ + memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb)); +} + -+void LzmaEnc_RestoreState(CLzmaEncHandle pp) ++static void LzmaEnc_RestoreState(CLzmaEncHandle pp) +{ + CLzmaEnc *dest = (CLzmaEnc *)pp; + const CSaveState *p = &dest->saveState; @@ -3299,7 +3299,7 @@ + while (symbol < 0x10000); +} + -+void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) ++static void LzmaEnc_InitPriceTables(UInt32 *ProbPrices) +{ + UInt32 i; + for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits)) @@ -4425,7 +4425,7 @@ + p->matchPriceCount = 0; +} + -+void LzmaEnc_Construct(CLzmaEnc *p) ++static void LzmaEnc_Construct(CLzmaEnc *p) +{ + RangeEnc_Construct(&p->rc); + MatchFinder_Construct(&p->matchFinderBase); @@ -4458,7 +4458,7 @@ + return p; +} + -+void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) ++static void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc) +{ + alloc->Free(alloc, p->litProbs); + alloc->Free(alloc, p->saveState.litProbs); @@ -4466,7 +4466,7 @@ + p->saveState.litProbs = 0; +} + -+void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) ++static void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig) +{ + #ifdef COMPRESS_MF_MT + MatchFinderMt_Destruct(&p->matchFinderMt, allocBig); @@ -4697,7 +4697,7 @@ + return SZ_OK; +} + -+void LzmaEnc_Init(CLzmaEnc *p) ++static void LzmaEnc_Init(CLzmaEnc *p) +{ + UInt32 i; + p->state = 0; @@ -4756,7 +4756,7 @@ + p->lpMask = (1 << p->lp) - 1; +} + -+void LzmaEnc_InitPrices(CLzmaEnc *p) ++static void LzmaEnc_InitPrices(CLzmaEnc *p) +{ + if (!p->fastMode) + { @@ -4797,7 +4797,7 @@ + return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig); +} + -+SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, ++static SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, + ISeqInStream *inStream, UInt32 keepWindowSize, + ISzAlloc *alloc, ISzAlloc *allocBig) +{ @@ -4813,7 +4813,7 @@ + p->seqBufInStream.rem = srcLen; +} + -+SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, ++static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen, + UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig) +{ + CLzmaEnc *p = (CLzmaEnc *)pp; @@ -4822,7 +4822,7 @@ + return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig); +} + -+void LzmaEnc_Finish(CLzmaEncHandle pp) ++static void LzmaEnc_Finish(CLzmaEncHandle pp) +{ + #ifdef COMPRESS_MF_MT + CLzmaEnc *p = (CLzmaEnc *)pp; @@ -4854,19 +4854,19 @@ +} + + -+UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp) ++static UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp) +{ + const CLzmaEnc *p = (CLzmaEnc *)pp; + return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); +} + -+const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp) ++static const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp) +{ + const CLzmaEnc *p = (CLzmaEnc *)pp; + return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset; +} + -+SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit, ++static SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit, + Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize) +{ + CLzmaEnc *p = (CLzmaEnc *)pp; diff --git a/package/utils/px5g/Makefile b/package/utils/px5g/Makefile index 8d1f04d60..4ea495867 100644 --- a/package/utils/px5g/Makefile +++ b/package/utils/px5g/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=px5g -PKG_RELEASE:=4 +PKG_RELEASE:=5 PKG_LICENSE:=LGPL-2.1 PKG_BUILD_DIR:=$(BUILD_DIR)/px5g-$(BUILD_VARIANT) diff --git a/package/utils/util-linux/Makefile b/package/utils/util-linux/Makefile index 88cb31477..898659306 100644 --- a/package/utils/util-linux/Makefile +++ b/package/utils/util-linux/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2007-2015 OpenWrt.org +# Copyright (C) 2007-2018 OpenWrt.org # # This is free software, licensed under the GNU General Public License v2. # See /LICENSE for more information. @@ -8,17 +8,16 @@ include $(TOPDIR)/rules.mk PKG_NAME:=util-linux -PKG_VERSION:=2.30.2 +PKG_VERSION:=2.32 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.30 -PKG_HASH:=7b5be5489e9b5b7177832836467aba1c87bf0e9bcbcb5a6f35d76cd4782589dc +PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.32 +PKG_HASH:=6c7397abc764e32e8159c2e96042874a190303e77adceb4ac5bd502a272a4734 PKG_CPE_ID:=cpe:/a:kernel:util-linux PKG_LICENSE:=GPL-2.0 PKG_LICENSE_FILES:= COPYING \ - getopt/COPYING \ libblkid/COPYING \ libmount/COPYING \ Documentation/licenses/COPYING.GPLv2 \ @@ -205,6 +204,19 @@ define Package/flock/description manages flock locks from within shell scripts or the command line endef +define Package/fstrim +$(call Package/util-linux/Default) + TITLE:=discard unused blocks on a mounted filesystem + DEPENDS:= +libblkid +libuuid +libsmartcols +libmount + SUBMENU=Filesystem +endef + +define Package/fstrim/description + fstrim is used on a mounted filesystem to discard (or "trim") blocks + which are not in use by the filesystem. This is useful for solid- + state drives (SSDs) and thinly-provisioned storage. +endef + define Package/getopt $(call Package/util-linux/Default) TITLE:=parse command options (enhanced) @@ -265,6 +277,16 @@ define Package/lsblk/description lsblk lists information about all or the specified block devices endef +define Package/lscpu +$(call Package/util-linux/Default) + TITLE:=display information about the CPU architecture + DEPENDS:= +libsmartcols +endef + +define Package/lscpu/description + lscpu displays information about the CPU architecture +endef + define Package/mcookie $(call Package/util-linux/Default) TITLE:=generate magic cookies for xauth @@ -295,6 +317,15 @@ define Package/namei/description files, directories, and so forth) endef +define Package/nsenter +$(call Package/util-linux/Default) + TITLE:=enter a namespace +endef + +define Package/nsenter/description + run program with namespaces of other processes +endef + define Package/prlimit $(call Package/util-linux/Default) TITLE:=get and set process resource limits @@ -372,6 +403,15 @@ define Package/swap-utils/description contains: mkswap, swaplabel endef +define Package/unshare +$(call Package/util-linux/Default) + TITLE:=unshare userspace tool +endef + +define Package/unshare/description + run programs with some namespaces unshared from parent +endef + define Package/uuidd $(call Package/util-linux/Default) TITLE:=UUID generation daemon @@ -421,7 +461,7 @@ endef define Package/wipefs $(call Package/util-linux/Default) TITLE:=wipe a signature from a device - DEPENDS:= +libblkid + DEPENDS:= +libblkid +libsmartcols SUBMENU:=Disc endef @@ -432,14 +472,15 @@ define Package/wipefs/description endef CONFIGURE_ARGS += \ - --disable-use-tty-group \ - --disable-rpath \ - --disable-tls \ - --disable-sulogin \ - --without-python \ - --without-udev \ - --without-readline \ - --disable-more \ + --disable-use-tty-group \ + --disable-rpath \ + --disable-tls \ + --disable-sulogin \ + --disable-makeinstall-chown \ + --without-python \ + --without-udev \ + --without-readline \ + --disable-more \ --with-ncursesw TARGET_CFLAGS += $(FPIC) -std=gnu99 @@ -553,6 +594,11 @@ define Package/flock/install $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/flock $(1)/usr/bin/ endef +define Package/fstrim/install + $(INSTALL_DIR) $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/fstrim $(1)/usr/sbin/ +endef + define Package/getopt/install $(INSTALL_DIR) $(1)/usr/bin $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/getopt $(1)/usr/bin/ @@ -583,6 +629,11 @@ define Package/lsblk/install $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/lsblk $(1)/usr/bin/ endef +define Package/lscpu/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/lscpu $(1)/usr/bin/ +endef + define Package/mcookie/install $(INSTALL_DIR) $(1)/usr/bin $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/mcookie $(1)/usr/bin/ @@ -600,6 +651,11 @@ define Package/namei/install $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/namei $(1)/usr/bin/ endef +define Package/nsenter/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/nsenter $(1)/usr/bin/ +endef + define Package/prlimit/install $(INSTALL_DIR) $(1)/usr/bin $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/prlimit $(1)/usr/bin/ @@ -639,6 +695,11 @@ define Package/swap-utils/install $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/swaplabel $(1)/usr/sbin/ endef +define Package/unshare/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/unshare $(1)/usr/bin/ +endef + define Package/uuidd/install $(INSTALL_DIR) $(1)/usr/sbin $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin//uuidd $(1)/usr/sbin/ @@ -678,15 +739,18 @@ $(eval $(call BuildPackage,dmesg)) $(eval $(call BuildPackage,fdisk)) $(eval $(call BuildPackage,findfs)) $(eval $(call BuildPackage,flock)) +$(eval $(call BuildPackage,fstrim)) $(eval $(call BuildPackage,getopt)) $(eval $(call BuildPackage,hwclock)) $(eval $(call BuildPackage,logger)) $(eval $(call BuildPackage,look)) $(eval $(call BuildPackage,losetup)) $(eval $(call BuildPackage,lsblk)) +$(eval $(call BuildPackage,lscpu)) $(eval $(call BuildPackage,mcookie)) $(eval $(call BuildPackage,mount-utils)) $(eval $(call BuildPackage,namei)) +$(eval $(call BuildPackage,nsenter)) $(eval $(call BuildPackage,prlimit)) $(eval $(call BuildPackage,rename)) $(eval $(call BuildPackage,partx-utils)) @@ -694,6 +758,7 @@ $(eval $(call BuildPackage,script-utils)) $(eval $(call BuildPackage,setterm)) $(eval $(call BuildPackage,sfdisk)) $(eval $(call BuildPackage,swap-utils)) +$(eval $(call BuildPackage,unshare)) $(eval $(call BuildPackage,uuidd)) $(eval $(call BuildPackage,uuidgen)) $(eval $(call BuildPackage,wall)) diff --git a/package/utils/util-linux/patches/003-fix_pkgconfig_files.patch b/package/utils/util-linux/patches/003-fix_pkgconfig_files.patch index c79813b1b..0cf154695 100644 --- a/package/utils/util-linux/patches/003-fix_pkgconfig_files.patch +++ b/package/utils/util-linux/patches/003-fix_pkgconfig_files.patch @@ -10,7 +10,7 @@ endif # BUILD_LIBUUID --- a/configure.ac +++ b/configure.ac -@@ -2255,18 +2255,23 @@ AC_CONFIG_HEADERS([config.h]) +@@ -2351,18 +2351,23 @@ AC_CONFIG_HEADERS([config.h]) # AC_CONFIG_FILES([ Makefile @@ -42,7 +42,7 @@ pkgconfig_DATA += libblkid/blkid.pc -PATHFILES += libblkid/blkid.pc dist_man_MANS += libblkid/libblkid.3 - EXTRA_DIST += libblkid/libblkid.3 libblkid/COPYING + EXTRA_DIST += libblkid/COPYING --- a/libmount/Makemodule.am +++ b/libmount/Makemodule.am diff --git a/package/utils/xfsprogs/Makefile b/package/utils/xfsprogs/Makefile index 5cf1da240..50a5147b0 100644 --- a/package/utils/xfsprogs/Makefile +++ b/package/utils/xfsprogs/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=xfsprogs PKG_CPE_ID:=cpe:/a:sgi:xfsprogs -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_VERSION:=4.11.0 PKG_SOURCE_URL:=@KERNEL/linux/utils/fs/xfs/xfsprogs PKG_HASH:=c3a6d87b564d7738243c507df82276bed982265e345363a95f2c764e8a5f5bb2 @@ -28,6 +28,11 @@ define Package/xfsprogs/default URL:=http://oss.sgi.com/projects/xfs endef +define Package/xfs-admin +$(call Package/xfsprogs/default) + TITLE:=Utilities for changing parameters of an XFS filesystems +endef + define Package/xfs-mkfs $(call Package/xfsprogs/default) TITLE:=Utility for creating XFS filesystems @@ -65,6 +70,12 @@ define Build/Compile $(call Build/Compile/Default) endef +define Package/xfs-admin/install + mkdir -p $(1)/sbin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/xfs_db $(1)/sbin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/xfs_admin $(1)/sbin +endef + define Package/xfs-mkfs/install mkdir -p $(1)/usr/sbin $(INSTALL_BIN) $(PKG_INSTALL_DIR)/sbin/mkfs.xfs $(1)/usr/sbin @@ -81,6 +92,7 @@ define Package/xfs-growfs/install $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/xfs_growfs $(1)/usr/sbin endef +$(eval $(call BuildPackage,xfs-admin)) $(eval $(call BuildPackage,xfs-mkfs)) $(eval $(call BuildPackage,xfs-fsck)) $(eval $(call BuildPackage,xfs-growfs)) diff --git a/rules.mk b/rules.mk index 3558f2f02..a97b2d215 100644 --- a/rules.mk +++ b/rules.mk @@ -144,6 +144,7 @@ ifeq ($(or $(CONFIG_EXTERNAL_TOOLCHAIN),$(CONFIG_GCC_VERSION_4_8),$(CONFIG_TARGE endif PACKAGE_DIR:=$(BIN_DIR)/packages +PACKAGE_DIR_ALL:=$(TOPDIR)/staging_dir/packages/$(BOARD) BUILD_DIR:=$(BUILD_DIR_BASE)/$(TARGET_DIR_NAME) STAGING_DIR:=$(TOPDIR)/staging_dir/$(TARGET_DIR_NAME) BUILD_DIR_TOOLCHAIN:=$(BUILD_DIR_BASE)/$(TOOLCHAIN_DIR_NAME) @@ -244,9 +245,9 @@ export PKG_CONFIG HOSTCC:=gcc HOSTCXX:=g++ -HOST_CPPFLAGS:=-I$(STAGING_DIR_HOST)/include -I$(STAGING_DIR_HOST)/usr/include $(if $(IS_PACKAGE_BUILD),-I$(STAGING_DIR_HOSTPKG)/include -I$(STAGING_DIR)/host/include) +HOST_CPPFLAGS:=-I$(STAGING_DIR_HOST)/include $(if $(IS_PACKAGE_BUILD),-I$(STAGING_DIR_HOSTPKG)/include -I$(STAGING_DIR)/host/include) HOST_CFLAGS:=-O2 $(HOST_CPPFLAGS) -HOST_LDFLAGS:=-L$(STAGING_DIR_HOST)/lib -L$(STAGING_DIR_HOST)/usr/lib $(if $(IS_PACKAGE_BUILD),-L$(STAGING_DIR_HOSTPKG)/lib -L$(STAGING_DIR)/host/lib) +HOST_LDFLAGS:=-L$(STAGING_DIR_HOST)/lib $(if $(IS_PACKAGE_BUILD),-L$(STAGING_DIR_HOSTPKG)/lib -L$(STAGING_DIR)/host/lib) ifeq ($(CONFIG_EXTERNAL_TOOLCHAIN),) TARGET_AR:=$(TARGET_CROSS)gcc-ar @@ -355,10 +356,6 @@ define shexport export $(call shvar,$(1))=$$(call $(1)) endef -define include_mk -$(eval -include $(if $(DUMP),,$(STAGING_DIR)/mk/$(strip $(1)))) -endef - # Execute commands under flock # $(1) => The shell expression. # $(2) => The lock name. If not given, the global lock will be used. diff --git a/scripts/bundle-libraries.sh b/scripts/bundle-libraries.sh index f254d4da4..bfe681ad6 100755 --- a/scripts/bundle-libraries.sh +++ b/scripts/bundle-libraries.sh @@ -97,6 +97,18 @@ _runas_so() { } } +_patch_ldso() { + _cp "$1" "$1.patched" + sed -i -e 's,/\(usr\|lib\|etc\)/,/###/,g' "$1.patched" + + if "$1.patched" 2>&1 | grep -q -- --library-path; then + _mv "$1.patched" "$1" + else + echo "binary patched ${1##*/} not executable, using original" >&2 + rm -f "$1.patched" + fi +} + for LDD in ${PATH//://ldd }/ldd; do "$LDD" --version >/dev/null 2>/dev/null && break LDD="" @@ -135,6 +147,7 @@ for BIN in "$@"; do [ -f "$token" -a ! -f "$dest" ] && { _md "$ddir" _cp "$token" "$dest" + [ -n "$LDSO" ] && _patch_ldso "$dest" } ;; esac done diff --git a/scripts/config/Makefile b/scripts/config/Makefile index 962027320..745a5d0f8 100644 --- a/scripts/config/Makefile +++ b/scripts/config/Makefile @@ -33,7 +33,7 @@ lxdialog-objs := \ clean-files := zconf.tab.c lex.zconf.c zconf.hash.c # Remove qconf junk files -clean-files += $(qconf-cxxobjs) qconf.moc .tmp_qtcheck +clean-files += $(qconf-cxxobjs) qconf.moc .tmp_qtcheck qconf all: conf mconf diff --git a/scripts/download.pl b/scripts/download.pl index 64e29392a..f5c3f7105 100755 --- a/scripts/download.pl +++ b/scripts/download.pl @@ -233,7 +233,6 @@ foreach my $mirror (@ARGV) { push @extra, "$extra[0]/longterm/v$1"; } foreach my $dir (@extra) { - push @mirrors, "http://mirrors.ustc.edu.cn/kernel.org/$dir"; push @mirrors, "https://cdn.kernel.org/pub/$dir"; push @mirrors, "https://mirror.rackspace.com/kernel.org/$dir"; push @mirrors, "http://download.xs4all.nl/ftp.kernel.org/pub/$dir"; diff --git a/scripts/flashing/eva_ramboot.py b/scripts/flashing/eva_ramboot.py new file mode 100755 index 000000000..b825d2768 --- /dev/null +++ b/scripts/flashing/eva_ramboot.py @@ -0,0 +1,37 @@ +#!/usr/bin/python + +from ftplib import FTP +from sys import argv +from os import stat + +assert len(argv) == 3 +ip = argv[1] +image = argv[2] + +size = stat(image).st_size +# arbitrary size limit, to prevent the address calculations from overflows etc. +assert size < 0x2000000 + +# We need to align the address. A page boundary seems to be sufficient on 7362sl +# and 7412 +addr = ((0x8000000 - size) & ~0xfff) +haddr = 0x80000000 + addr +img = open(image, "rb") + +ftp = FTP(ip, 'adam2', 'adam2') + +def adam(cmd): + print("> %s"%(cmd)) + resp = ftp.sendcmd(cmd) + print("< %s"%(resp)) + assert resp[0:3] == "200" + +ftp.set_pasv(True) +# The following parameters allow booting the avm recovery system with this +# script. +adam('SETENV memsize 0x%08x'%(addr)) +adam('SETENV kernel_args_tmp mtdram1=0x%08x,0x88000000'%(haddr)) +adam('MEDIA SDRAM') +ftp.storbinary('STOR 0x%08x 0x88000000'%(haddr), img) +img.close() +ftp.close() diff --git a/scripts/metadata.pm b/scripts/metadata.pm index ea3873538..e05e40099 100644 --- a/scripts/metadata.pm +++ b/scripts/metadata.pm @@ -283,8 +283,10 @@ sub parse_package_metadata($) { for my $ugspec (@ugspecs) { my @ugspec = split /:/, $ugspec, 2; - parse_package_metadata_usergroup($src->{makefile}, "user", \%usernames, \%userids, $ugspec[0]) or return 0; - if (@ugspec > 1) { + if ($ugspec[0]) { + parse_package_metadata_usergroup($src->{makefile}, "user", \%usernames, \%userids, $ugspec[0]) or return 0; + } + if ($ugspec[1]) { parse_package_metadata_usergroup($src->{makefile}, "group", \%groupnames, \%groupids, $ugspec[1]) or return 0; } } diff --git a/scripts/mkits.sh b/scripts/mkits.sh index 8857996eb..5d836be8e 100755 --- a/scripts/mkits.sh +++ b/scripts/mkits.sh @@ -19,6 +19,7 @@ usage() { "-v version -k kernel [-D name -d dtb] -o its_file" echo -e "\t-A ==> set architecture to 'arch'" echo -e "\t-C ==> set compression type 'comp'" + echo -e "\t-c ==> set config name 'config'" echo -e "\t-a ==> set load address to 'addr' (hex)" echo -e "\t-e ==> set entry point to 'entry' (hex)" echo -e "\t-v ==> set kernel version to 'version'" @@ -29,11 +30,12 @@ usage() { exit 1 } -while getopts ":A:a:C:D:d:e:k:o:v:" OPTION +while getopts ":A:a:c:C:D:d:e:k:o:v:" OPTION do case $OPTION in A ) ARCH=$OPTARG;; a ) LOAD_ADDR=$OPTARG;; + c ) CONFIG=$OPTARG;; C ) COMPRESS=$OPTARG;; D ) DEVICE=$OPTARG;; d ) DTB=$OPTARG;; @@ -49,7 +51,7 @@ done # Make sure user entered all required parameters if [ -z "${ARCH}" ] || [ -z "${COMPRESS}" ] || [ -z "${LOAD_ADDR}" ] || \ [ -z "${ENTRY_ADDR}" ] || [ -z "${VERSION}" ] || [ -z "${KERNEL}" ] || \ - [ -z "${OUTPUT}" ]; then + [ -z "${OUTPUT}" ] || [ -z "${CONFIG}" ]; then usage fi @@ -104,8 +106,8 @@ ${FDT} }; configurations { - default = \"config@1\"; - config@1 { + default = \"${CONFIG}\"; + ${CONFIG} { description = \"OpenWrt\"; kernel = \"kernel@1\"; fdt = \"fdt@1\"; diff --git a/scripts/qemustart b/scripts/qemustart index 6c2254e3a..5af93b9ae 100755 --- a/scripts/qemustart +++ b/scripts/qemustart @@ -117,6 +117,7 @@ rand_mac() { } parse_args() { + o_qemu_extra=() while [ "$#" -gt 0 ]; do case "$1" in --kernel) o_kernel="$2"; shift 2 ;; @@ -131,7 +132,7 @@ parse_args() { elif [ -z "$o_subtarget" ]; then o_subtarget="$1" else - o_qemu_extra=("${o_qemu_extra[@]}" "$1") + o_qemu_extra+=("$1") fi shift ;; @@ -174,11 +175,10 @@ start_qemu_armvirt() { if [ ! -f "$rootfs" -a -s "$rootfs.gz" ]; then gunzip "$rootfs.gz" fi - o_qemu_extra=( \ + o_qemu_extra+=( \ "-drive" "file=$rootfs,format=raw,if=virtio" \ "-append" "root=/dev/vda rootwait" \ - "${o_qemu_extra[@]}" \ - ) + ) } "$qemu_exe" -machine virt -cpu "$cpu" -nographic \ diff --git a/target/imagebuilder/Makefile b/target/imagebuilder/Makefile index 6ce57f318..05c7cf331 100644 --- a/target/imagebuilder/Makefile +++ b/target/imagebuilder/Makefile @@ -1,4 +1,4 @@ -# +# # Copyright (C) 2006-2015 OpenWrt.org # # This is free software, licensed under the GNU General Public License v2. @@ -44,7 +44,7 @@ endif echo '## This is the local package repository, do not remove!' >> $(PKG_BUILD_DIR)/repositories.conf echo 'src imagebuilder file:packages' >> $(PKG_BUILD_DIR)/repositories.conf - $(VERSION_SED) $(PKG_BUILD_DIR)/repositories.conf + $(VERSION_SED_SCRIPT) $(PKG_BUILD_DIR)/repositories.conf ifeq ($(CONFIG_IB_STANDALONE),) (cd $(call FeedPackageDir,libc); $(FIND) -type f -name 'libc_*.ipk' -or -name 'kernel_*.ipk' -or -name 'kmod-*.ipk') | \ @@ -63,7 +63,8 @@ endif fi rm -rf \ $(PKG_BUILD_DIR)/target/linux/*/files{,-*} \ - $(PKG_BUILD_DIR)/target/linux/*/patches{,-*} + $(PKG_BUILD_DIR)/target/linux/*/patches{,-*} \ + $(PKG_BUILD_DIR)/target/linux/generic/{pending,backport,hack}{,-*} -cp $(KERNEL_BUILD_DIR)/* $(IB_KDIR)/ # don't copy subdirectories here -cp $(LINUX_DIR)/.config $(IB_LDIR)/ rm -f $(IB_KDIR)/root.* diff --git a/target/imagebuilder/files/Makefile b/target/imagebuilder/files/Makefile index 95f405b8f..95df8bf11 100644 --- a/target/imagebuilder/files/Makefile +++ b/target/imagebuilder/files/Makefile @@ -23,6 +23,7 @@ endif include rules.mk include $(INCLUDE_DIR)/debug.mk include $(INCLUDE_DIR)/depends.mk +include $(INCLUDE_DIR)/rootfs.mk include $(INCLUDE_DIR)/version.mk export REVISION @@ -54,20 +55,10 @@ help: FORCE # override variables from rules.mk PACKAGE_DIR:=$(TOPDIR)/packages LISTS_DIR:=$(subst $(space),/,$(patsubst %,..,$(subst /,$(space),$(TARGET_DIR))))$(DL_DIR) -OPKG:= \ - IPKG_NO_SCRIPT=1 \ - IPKG_INSTROOT="$(TARGET_DIR)" \ - $(STAGING_DIR_HOST)/bin/opkg \ +OPKG:=$(call opkg,$(TARGET_DIR)) \ -f $(TOPDIR)/repositories.conf \ - --force-depends \ - --force-overwrite \ - --force-postinstall \ --cache $(DL_DIR) \ - --lists-dir $(LISTS_DIR) \ - --offline-root $(TARGET_DIR) \ - --add-dest root:/ \ - --add-arch all:100 \ - --add-arch $(ARCH_PACKAGES):200 + --lists-dir $(LISTS_DIR) include $(INCLUDE_DIR)/target.mk -include .profiles.mk @@ -109,14 +100,11 @@ _call_image: staging_dir/host/.prereq-build echo 'Building images for $(BOARD)$(if $($(USER_PROFILE)_NAME), - $($(USER_PROFILE)_NAME))' echo 'Packages: $(BUILD_PACKAGES)' echo - rm -rf $(TARGET_DIR) + rm -rf $(TARGET_DIR) $(TARGET_DIR_ORIG) mkdir -p $(TARGET_DIR) $(BIN_DIR) $(TMP_DIR) $(DL_DIR) $(MAKE) package_reload $(MAKE) package_install -ifneq ($(USER_FILES),) - $(MAKE) copy_files -endif - $(MAKE) -s package_postinst + $(MAKE) -s prepare_rootfs $(MAKE) -s build_image $(MAKE) -s checksum @@ -148,28 +136,13 @@ package_install: FORCE $(OPKG) install $(firstword $(wildcard $(PACKAGE_DIR)/libc_*.ipk $(PACKAGE_DIR)/base/libc_*.ipk)) $(OPKG) install $(firstword $(wildcard $(PACKAGE_DIR)/kernel_*.ipk $(PACKAGE_DIR)/base/kernel_*.ipk)) $(OPKG) install $(BUILD_PACKAGES) - rm -f $(TARGET_DIR)/usr/lib/opkg/lists/* -copy_files: FORCE +prepare_rootfs: FORCE @echo - @echo Copying extra files - @$(call file_copy,$(USER_FILES)/*,$(TARGET_DIR)/) + @echo Finalizing root filesystem... -package_postinst: FORCE - @echo - @echo Cleaning up - @rm -f $(TARGET_DIR)/tmp/opkg.lock - @echo - @echo Activating init scripts - @mkdir -p $(TARGET_DIR)/etc/rc.d - @( \ - cd $(TARGET_DIR); \ - for script in ./usr/lib/opkg/info/*.postinst; do \ - IPKG_INSTROOT=$(TARGET_DIR) $$(which bash) $$script; \ - done || true \ - ) - rm -f $(TARGET_DIR)/usr/lib/opkg/info/*.postinst - $(if $(CONFIG_CLEAN_IPKG),rm -rf $(TARGET_DIR)/usr/lib/opkg) + $(CP) $(TARGET_DIR) $(TARGET_DIR_ORIG) + $(call prepare_rootfs,$(TARGET_DIR),$(USER_FILES)) build_image: FORCE @echo @@ -207,4 +180,3 @@ endif $(if $(BIN_DIR),BIN_DIR="$(BIN_DIR)")) .SILENT: help info image - diff --git a/target/linux/adm5120/base-files/lib/upgrade/platform.sh b/target/linux/adm5120/base-files/lib/upgrade/platform.sh index fab2b3d79..b874a5e99 100644 --- a/target/linux/adm5120/base-files/lib/upgrade/platform.sh +++ b/target/linux/adm5120/base-files/lib/upgrade/platform.sh @@ -33,12 +33,3 @@ platform_do_upgrade() { PART_NAME="$sys_mtd_part" default_do_upgrade "$ARGV" } - -disable_watchdog() { - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} -append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/apm821xx/base-files/lib/upgrade/platform.sh b/target/linux/apm821xx/base-files/lib/upgrade/platform.sh index 5d2eee4ca..ced8ce197 100755 --- a/target/linux/apm821xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/apm821xx/base-files/lib/upgrade/platform.sh @@ -18,21 +18,6 @@ platform_check_image() { esac } -platform_pre_upgrade() { - local board=$(board_name) - - case "$board" in - meraki,mr24|\ - meraki,mx60|\ - netgear,wndr4700) - nand_do_upgrade "$1" - ;; - - *) - ;; - esac -} - platform_do_upgrade() { local board=$(board_name) @@ -41,7 +26,11 @@ platform_do_upgrade() { wd,mybooklive-duo) mbl_do_upgrade "$ARGV" ;; - + meraki,mr24|\ + meraki,mx60|\ + netgear,wndr4700) + nand_do_upgrade "$1" + ;; *) default_do_upgrade "$ARGV" ;; @@ -61,13 +50,3 @@ platform_copy_config() { ;; esac } - -disable_watchdog() { - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} - -append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/apm821xx/dts/meraki-mx60.dts b/target/linux/apm821xx/dts/meraki-mx60.dts index 32e5c859e..cf20e2e9e 100644 --- a/target/linux/apm821xx/dts/meraki-mx60.dts +++ b/target/linux/apm821xx/dts/meraki-mx60.dts @@ -107,7 +107,7 @@ #address-cells = <1>; #size-cells = <0>; phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; + compatible = "ethernet-phy-id004d.d034"; reg = <0>; qca,ar8327-initvals = < 0x0010 0x40000000 diff --git a/target/linux/apm821xx/dts/netgear-wndr4700.dts b/target/linux/apm821xx/dts/netgear-wndr4700.dts index 96cf97c45..4a252cf0b 100644 --- a/target/linux/apm821xx/dts/netgear-wndr4700.dts +++ b/target/linux/apm821xx/dts/netgear-wndr4700.dts @@ -160,75 +160,79 @@ #address-cells = <1>; #size-cells = <1>; - partition0,0@0x00000000 { + partition0,0@0 { label = "NAND 128MiB 3,3V 8-bit"; reg = <0x00000000 0x08000000>; read-only; }; - partition0,1@0x00000000 { + partition0,1@0 { label = "uboot"; reg = <0x00000000 0x00180000>; read-only; }; - partition0,2@0x00180000 { + partition0,2@180000 { label = "device-tree"; reg = <0x00180000 0x00020000>; }; - partition0,3@0x001a0000 { + partition0,3@180000 { label = "kernel"; - reg = <0x001a0000 0x001e0000>; + reg = <0x00180000 0x00380000>; /* - * will also contain a fake/empty - * rootfs to fool Netgear's uboot - * rootfs integrety checks. + * device-tree is @ 0x00180000 - 0x001fffff + * kernel starts from 0x200000. + * this is coded into netgear's u-boot. + * + * this partition will also contain a + * fake/empty rootfs at the end to fool + * Netgear's uboot rootfs integrety checks. */ }; - partition0,4@0x00380000 { + partition0,4@500000 { label = "ubi"; - reg = <0x00380000 0x01660000>; + reg = <0x00500000 0x014e0000>; }; - partition0,5@0x019e0000 { + partition0,5@19e0000 { label = "config"; reg = <0x019e0000 0x00080000>; read-only; }; - partition0,6@0x01a60000 { + partition0,6@1a60000 { label = "pot"; reg = <0x01a60000 0x00080000>; read-only; }; - partition0,7@0x01ae0000 { + partition0,7@1ae0000 { label = "traffic_meter"; reg = <0x01ae0000 0x00300000>; read-only; }; - partition0,8@0x01de0000 { + partition0,8@1de0000 { label = "language"; reg = <0x01de0000 0x001c0000>; read-only; }; - partition0,9@0x01fa0000 { + partition0,9@1fa0000 { label = "ecos"; reg = <0x01fa0000 0x06020000>; read-only; }; - partition0,10@0x07fc0000 { + partition0,10@7fc0000 { label = "wifi_data"; reg = <0x07fc0000 0x00040000>; read-only; }; - partition0,11@0x00180000 { + partition0,11@180000 { label = "firmware"; reg = <0x00180000 0x01860000>; read-only; diff --git a/target/linux/apm821xx/image/Makefile b/target/linux/apm821xx/image/Makefile index c012906ea..094c9e47d 100644 --- a/target/linux/apm821xx/image/Makefile +++ b/target/linux/apm821xx/image/Makefile @@ -21,6 +21,11 @@ define Build/dtb $(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb,,--space $(DTB_SIZE)) endef +define Build/prepend-dtb + cat "$@.dtb.uimage" "$@" > "$@.new" + mv "$@.new" "$@" +endef + define Build/export-dtb cp $(IMAGE_KERNEL).dtb $@ endef @@ -75,13 +80,9 @@ define Device/meraki_mr24 BLOCKSIZE := 63k IMAGES := sysupgrade.tar DTB_SIZE := 64512 - KERNEL_SIZE := 1984k IMAGE_SIZE := 8191k KERNEL := kernel-bin | lzma | uImage lzma | MerakiAdd-dtb | MerakiNAND - KERNEL_INITRAMFS := copy-file $(KDIR)/vmlinux | lzma | uImage lzma | \ - check-size $$(KERNEL_SIZE) | \ - MerakiAdd-dtb | pad-to 2047k | MerakiAdd-initramfs | \ - MerakiNAND + KERNEL_INITRAMFS := kernel-bin | lzma | dtb | MuImage-initramfs lzma IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata UBINIZE_OPTS := -E 5 SUPPORTED_DEVICES += mr24 @@ -118,12 +119,11 @@ define Build/create-uImage-dtb # flat_dt target expect FIT image - which WNDR4700's uboot doesn't support -$(STAGING_DIR_HOST)/bin/mkimage -A $(LINUX_KARCH) \ -O linux -T kernel -C none \ - -n '$(call toupper,$(LINUX_KARCH)) OpenWrt Linux-$(LINUX_VERSION)' \ - -d $(IMAGE_KERNEL).dtb $@.new - @mv $@.new $@ + -n '$(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION)' \ + -d "$@.dtb" "$@.dtb.uimage" endef -define Build/wndr4700-specialImage +define Build/MuImage-initramfs rm -rf $@.fakerd $@.new dd if=/dev/zero of=$@.fakerd bs=32 count=1 conv=sync @@ -167,11 +167,13 @@ define Device/netgear_wndr4700 DTB_SIZE := 131008 IMAGE_SIZE := 24960k IMAGES := factory.img sysupgrade.tar kernel.dtb - KERNEL_SIZE := 1920k - KERNEL := dtb | kernel-bin | lzma | uImage lzma | pad-offset $$(BLOCKSIZE) 64 | \ - append-uImage-fakeroot-hdr - KERNEL_INITRAMFS := kernel-bin | gzip | dtb | wndr4700-specialImage gzip - IMAGE/factory.img := create-uImage-dtb | append-kernel | pad-to 2M | append-ubi | \ + KERNEL_SIZE := 3584k + # append a fake/empty rootfs to fool netgear's uboot + # CHECK_DNI_FIRMWARE_ROOTFS_INTEGRITY in do_chk_dniimg() + KERNEL := kernel-bin | lzma | uImage lzma | pad-offset $$(BLOCKSIZE) 64 | \ + append-uImage-fakehdr filesystem | dtb | create-uImage-dtb | prepend-dtb + KERNEL_INITRAMFS := kernel-bin | gzip | dtb | MuImage-initramfs gzip + IMAGE/factory.img := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | \ netgear-dni | check-size $$$$(IMAGE_SIZE) IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata IMAGE/kernel.dtb := export-dtb | uImage none diff --git a/target/linux/apm821xx/nand/config-default b/target/linux/apm821xx/nand/config-default index ca6af461c..7b66f27d3 100644 --- a/target/linux/apm821xx/nand/config-default +++ b/target/linux/apm821xx/nand/config-default @@ -39,7 +39,6 @@ CONFIG_MTD_UBI_BLOCK=y CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_UBIFS_FS=y # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_USB_PCI=y CONFIG_SENSORS_LM90=y CONFIG_SENSORS_TC654=y CONFIG_SWCONFIG=y diff --git a/target/linux/apm821xx/patches-4.14/010-crypto-gcm-add-GCM-IV-size-constant.patch b/target/linux/apm821xx/patches-4.14/010-crypto-gcm-add-GCM-IV-size-constant.patch deleted file mode 100644 index 6f0cc6015..000000000 --- a/target/linux/apm821xx/patches-4.14/010-crypto-gcm-add-GCM-IV-size-constant.patch +++ /dev/null @@ -1,27 +0,0 @@ -From ef780324592dd639e4bfbc5b9bf8934b234b7c99 Mon Sep 17 00:00:00 2001 -From: Corentin LABBE -Date: Tue, 22 Aug 2017 10:08:08 +0200 -Subject: [PATCH] crypto: gcm - add GCM IV size constant - -Many GCM users use directly GCM IV size instead of using some constant. - -This patch add all IV size constant used by GCM. - -Signed-off-by: Corentin Labbe -Signed-off-by: Herbert Xu ---- - include/crypto/gcm.h | 8 ++++++++ - 1 file changed, 8 insertions(+) - create mode 100644 include/crypto/gcm.h - ---- /dev/null -+++ b/include/crypto/gcm.h -@@ -0,0 +1,8 @@ -+#ifndef _CRYPTO_GCM_H -+#define _CRYPTO_GCM_H -+ -+#define GCM_AES_IV_SIZE 12 -+#define GCM_RFC4106_IV_SIZE 8 -+#define GCM_RFC4543_IV_SIZE 8 -+ -+#endif diff --git a/target/linux/apm821xx/patches-4.14/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch b/target/linux/apm821xx/patches-4.14/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch index 144a06970..49304ef87 100644 --- a/target/linux/apm821xx/patches-4.14/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch +++ b/target/linux/apm821xx/patches-4.14/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch @@ -44,7 +44,7 @@ Signed-off-by: Christian Lamparter #include "xhci.h" #include "xhci-trace.h" -@@ -238,6 +240,458 @@ static void xhci_pme_acpi_rtd3_enable(st +@@ -241,6 +243,458 @@ static void xhci_pme_acpi_rtd3_enable(st static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { } #endif /* CONFIG_ACPI */ @@ -503,7 +503,7 @@ Signed-off-by: Christian Lamparter /* called during probe() after chip reset completes */ static int xhci_pci_setup(struct usb_hcd *hcd) { -@@ -273,6 +727,22 @@ static int xhci_pci_probe(struct pci_dev +@@ -276,6 +730,22 @@ static int xhci_pci_probe(struct pci_dev struct hc_driver *driver; struct usb_hcd *hcd; @@ -526,7 +526,7 @@ Signed-off-by: Christian Lamparter driver = (struct hc_driver *)id->driver_data; /* For some HW implementation, a XHCI reset is just not enough... */ -@@ -337,6 +807,16 @@ static void xhci_pci_remove(struct pci_d +@@ -340,6 +810,16 @@ static void xhci_pci_remove(struct pci_d { struct xhci_hcd *xhci; diff --git a/target/linux/apm821xx/patches-4.14/802-usb-xhci-force-msi-renesas-xhci.patch b/target/linux/apm821xx/patches-4.14/802-usb-xhci-force-msi-renesas-xhci.patch index ec97f16e2..ae05d291f 100644 --- a/target/linux/apm821xx/patches-4.14/802-usb-xhci-force-msi-renesas-xhci.patch +++ b/target/linux/apm821xx/patches-4.14/802-usb-xhci-force-msi-renesas-xhci.patch @@ -13,7 +13,7 @@ produce a noisy warning. --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -196,7 +196,7 @@ static void xhci_pci_quirks(struct devic +@@ -199,7 +199,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_TRUST_TX_LENGTH; if (pdev->vendor == PCI_VENDOR_ID_RENESAS && pdev->device == 0x0015) @@ -44,7 +44,7 @@ produce a noisy warning. hcd->msi_enabled = 1; --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1848,6 +1848,7 @@ struct xhci_hcd { +@@ -1850,6 +1850,7 @@ struct xhci_hcd { /* support xHCI 0.96 spec USB2 software LPM */ unsigned sw_lpm_support:1; /* support xHCI 1.0 spec USB2 hardware LPM */ diff --git a/target/linux/ar7/Makefile b/target/linux/ar7/Makefile index c5a6035b5..1f789ca71 100644 --- a/target/linux/ar7/Makefile +++ b/target/linux/ar7/Makefile @@ -13,7 +13,7 @@ FEATURES:=squashfs atm low_mem MAINTAINER:=Florian Fainelli SUBTARGETS:=generic ac49x -KERNEL_PATCHVER:=3.18 +KERNEL_PATCHVER:=4.9 define Target/Description Build firmware images for TI AR7 based routers. diff --git a/target/linux/ar7/files/drivers/mtd/ac49xpart.c b/target/linux/ar7/files/drivers/mtd/ac49xpart.c index 7ac4a817f..4f8a9c1b8 100644 --- a/target/linux/ar7/files/drivers/mtd/ac49xpart.c +++ b/target/linux/ar7/files/drivers/mtd/ac49xpart.c @@ -123,7 +123,7 @@ void gen_partname(unsigned int type, } static int create_mtd_partitions(struct mtd_info *master, - struct mtd_partition **pparts, + const struct mtd_partition **pparts, struct mtd_part_parser_data *data) { unsigned int envpartnum = 0, linuxpartnum = 0; diff --git a/target/linux/ar7/patches-4.9/002-MIPS-AR7-ensure-the-port-type-s-FCR-value-is-used.patch b/target/linux/ar7/patches-4.9/002-MIPS-AR7-ensure-the-port-type-s-FCR-value-is-used.patch deleted file mode 100644 index cc1a541a3..000000000 --- a/target/linux/ar7/patches-4.9/002-MIPS-AR7-ensure-the-port-type-s-FCR-value-is-used.patch +++ /dev/null @@ -1,48 +0,0 @@ -From ee6c9d41de084b2cefd90e5e0c9f30a35f6d3967 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sun, 29 Oct 2017 15:50:42 +0100 -Subject: [PATCH RFC 3/3] MIPS: AR7: ensure the port type's FCR value is used - -Since commit aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt -trigger I/F of FIFO buffers"), the port's default FCR value isn't used -in serial8250_do_set_termios anymore, but copied over once in -serial8250_config_port and then modified as needed. - -Unfortunately, serial8250_config_port will never be called if the port -is shared between kernel and userspace, and the port's flag doesn't have -UPF_BOOT_AUTOCONF, which would trigger a serial8250_config_port as well. - -This causes garbled output from userspace: - -[ 5.220000] random: procd urandom read with 49 bits of entropy available -ers - [kee - -Fix this by forcing it to be configured on boot, resulting in the -expected output: - -[ 5.250000] random: procd urandom read with 50 bits of entropy available -Press the [f] key and hit [enter] to enter failsafe mode -Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level - -Fixes: aef9a7bd9b67 ("serial/uart/8250: Add tunable RX interrupt trigger I/F of FIFO buffers") -Signed-off-by: Jonas Gorski ---- -I'm not sure if this is just AR7's issue, or if this points to a general -issue for UARTs used as kernel console and login console with the "fixed" -commit. - - arch/mips/ar7/platform.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/ar7/platform.c -+++ b/arch/mips/ar7/platform.c -@@ -576,7 +576,7 @@ static int __init ar7_register_uarts(voi - uart_port.type = PORT_AR7; - uart_port.uartclk = clk_get_rate(bus_clk) / 2; - uart_port.iotype = UPIO_MEM32; -- uart_port.flags = UPF_FIXED_TYPE; -+ uart_port.flags = UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF; - uart_port.regshift = 2; - - uart_port.line = 0; diff --git a/target/linux/ar71xx/base-files/etc/board.d/01_leds b/target/linux/ar71xx/base-files/etc/board.d/01_leds index fac9dfa7a..cf24e465a 100755 --- a/target/linux/ar71xx/base-files/etc/board.d/01_leds +++ b/target/linux/ar71xx/base-files/etc/board.d/01_leds @@ -52,49 +52,6 @@ ap121f) ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth0" ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt" ;; -ap531b0|\ -gl-usb150|\ -sc1750|\ -sc450) - ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt" - ;; -archer-c25-v1|\ -archer-c7-v4) - ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth0" - ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan2g" "phy1tpt" - ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:green:wlan5g" "phy0tpt" - ucidef_set_led_switch "lan1" "LAN1" "$board:green:lan1" "switch0" "0x10" - ucidef_set_led_switch "lan2" "LAN2" "$board:green:lan2" "switch0" "0x08" - ucidef_set_led_switch "lan3" "LAN3" "$board:green:lan3" "switch0" "0x04" - ucidef_set_led_switch "lan4" "LAN4" "$board:green:lan4" "switch0" "0x02" - case "$board" in - archer-c7-v4) - ucidef_set_led_usbdev "usb1" "USB1" "$board:green:usb1" "1-1" - ucidef_set_led_usbdev "usb2" "USB2" "$board:green:usb2" "2-1" - ;; - esac - ;; -archer-c58-v1|\ -archer-c59-v1|\ -archer-c60-v1) - ucidef_set_led_switch "lan" "LAN" "$board:green:lan" "switch0" "0x1E" - ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth0" - ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan2g" "phy1tpt" - ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:green:wlan5g" "phy0tpt" - - case "$board" in - archer-c59-v1) - ucidef_set_led_usbdev "usb" "USB" "$board:green:usb" "1-1" - ;; - esac - ;; -arduino-yun) - ucidef_set_led_wlan "wlan" "WLAN" "arduino:blue:wlan" "phy0tpt" - ucidef_set_led_usbdev "usb" "USB" "arduino:white:usb" "1-1.1" - ;; -db120) - ucidef_set_led_usbdev "usb" "USB" "$board:green:usb" "1-1" - ;; ap147-010) ucidef_set_led_netdev "wan" "WAN" "ap147:green:wan" "eth1" ucidef_set_led_switch "lan1" "LAN1" "ap147:green:lan1" "switch0" "0x10" @@ -107,7 +64,9 @@ ap90q|\ cpe505n|\ cpe830|\ cpe870|\ -dr531) +dr531|\ +e600g-v2|\ +e600gac-v2) ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth0" ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth1" @@ -129,6 +88,12 @@ dr531) ;; esac ;; +ap531b0|\ +gl-usb150|\ +sc1750|\ +sc450) + ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt" + ;; ap91-5g|\ n5q) ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth0" @@ -145,6 +110,52 @@ n5q) ;; esac ;; +archer-c25-v1) + ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth0" + ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan2g" "phy1tpt" + ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:green:wlan5g" "phy0tpt" + ucidef_set_led_switch "lan1" "LAN1" "$board:green:lan1" "switch0" "0x10" + ucidef_set_led_switch "lan2" "LAN2" "$board:green:lan2" "switch0" "0x08" + ucidef_set_led_switch "lan3" "LAN3" "$board:green:lan3" "switch0" "0x04" + ucidef_set_led_switch "lan4" "LAN4" "$board:green:lan4" "switch0" "0x02" + ;; +archer-c5|\ +archer-c7) + ucidef_set_led_usbdev "usb1" "USB1" "tp-link:green:usb1" "1-1" + ucidef_set_led_usbdev "usb2" "USB2" "tp-link:green:usb2" "2-1" + ucidef_set_led_wlan "wlan2g" "WLAN2G" "tp-link:blue:wlan2g" "phy1tpt" + ucidef_set_led_wlan "wlan5g" "WLAN5G" "tp-link:blue:wlan5g" "phy0tpt" + ;; +archer-c58-v1|\ +archer-c59-v1|\ +archer-c60-v1|\ +archer-c60-v2) + ucidef_set_led_switch "lan" "LAN" "$board:green:lan" "switch0" "0x1E" + ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth0" + ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan2g" "phy1tpt" + ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:green:wlan5g" "phy0tpt" + + case "$board" in + archer-c59-v1) + ucidef_set_led_usbdev "usb" "USB" "$board:green:usb" "1-1" + ;; + esac + ;; +archer-c7-v4) + ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan2g" "phy1tpt" + ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:green:wlan5g" "phy0tpt" + ucidef_set_led_switch "wan" "WAN" "$board:green:wan" "switch0" "0x02" + ucidef_set_led_switch "lan1" "LAN1" "$board:green:lan4" "switch0" "0x04" + ucidef_set_led_switch "lan2" "LAN2" "$board:green:lan3" "switch0" "0x08" + ucidef_set_led_switch "lan3" "LAN3" "$board:green:lan2" "switch0" "0x10" + ucidef_set_led_switch "lan4" "LAN4" "$board:green:lan1" "switch0" "0x20" + ucidef_set_led_usbdev "usb1" "USB1" "$board:green:usb1" "1-1" + ucidef_set_led_usbdev "usb2" "USB2" "$board:green:usb2" "2-1" + ;; +arduino-yun) + ucidef_set_led_wlan "wlan" "WLAN" "arduino:blue:wlan" "phy0tpt" + ucidef_set_led_usbdev "usb" "USB" "arduino:white:usb" "1-1.1" + ;; bhr-4grv2) ucidef_set_led_default "power" "POWER" "buffalo:green:power" "1" ucidef_set_led_default "diag" "DIAG" "buffalo:red:diag" "0" @@ -163,14 +174,6 @@ rocket-m-xw) ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "ubnt:green:link3" "wlan0" "51" "100" "-50" "13" ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "ubnt:green:link4" "wlan0" "76" "100" "-75" "13" ;; -rocket-m-ti) - ucidef_set_led_rssi "rssiverylow" "RSSIVERYLOW" "ubnt:green:link1" "wlan0" "1" "100" "0" "13" - ucidef_set_led_rssi "rssilow" "RSSILOW" "ubnt:green:link2" "wlan0" "26" "100" "-25" "13" - ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "ubnt:green:link3" "wlan0" "51" "100" "-50" "13" - ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "ubnt:green:link4" "wlan0" "76" "100" "-75" "13" - ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "ubnt:green:link5" "wlan0" "76" "100" "-75" "13" - ucidef_set_led_rssi "rssiveryhigh" "RSSIVERYHIGH" "ubnt:green:link4" "wlan0" "76" "100" "-75" "13" - ;; bxu2000n-2-a1) ucidef_set_led_wlan "wlan" "WLAN" "bhu:green:wlan" "phy0tpt" ;; @@ -208,12 +211,24 @@ cf-e320n-v2) ucidef_set_led_netdev "wan" "WAN" "$board:red:wan" "eth1" ucidef_set_led_wlan "wlan" "WLAN" "$board:blue:wlan" "phy0tpt" ;; -cf-e355ac|\ +cf-e355ac-v1|\ +cf-e355ac-v2|\ +cf-e375ac|\ cf-e380ac-v1|\ -cf-e380ac-v2) - ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth0" +cf-e380ac-v2|\ +cf-e385ac) ucidef_set_led_wlan "wlan2g" "WLAN2G" "$board:blue:wlan2g" "phy1tpt" ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:red:wlan5g" "phy0tpt" + + case "$board" in + cf-e375ac|\ + cf-e385ac) + ucidef_set_led_switch "lan" "LAN" "$board:green:lan" "switch0" "0x04" + ;; + *) + ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth0" + ;; + esac ;; cf-e520n|\ cf-e530n) @@ -243,6 +258,9 @@ cr5000) ucidef_set_led_wlan "wlan" "WLAN" "pcs:blue:wlan" "phy0tpt" ucidef_set_led_usbdev "usb" "USB" "pcs:white:wps" "1-1" ;; +db120) + ucidef_set_led_usbdev "usb" "USB" "$board:green:usb" "1-1" + ;; dr344) ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth1" ;; @@ -281,75 +299,12 @@ fritz300e) ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$board:green:rssi3" "wlan0" "60" "100" ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$board:green:rssi4" "wlan0" "80" "100" ;; -rb-750) - ucidef_set_led_default "act" "act" "rb750:green:act" "1" - ucidef_set_led_netdev "port1" "port1" "rb750:green:port1" "eth1" - ucidef_set_led_switch "port2" "port2" "rb750:green:port2" "switch0" "0x10" - ucidef_set_led_switch "port3" "port3" "rb750:green:port3" "switch0" "0x08" - ucidef_set_led_switch "port4" "port4" "rb750:green:port4" "switch0" "0x04" - ucidef_set_led_switch "port5" "port5" "rb750:green:port5" "switch0" "0x02" - ;; -rb-750-r2|\ -rb-750p-pbr2|\ -rb-750up-r2) - ucidef_set_led_timer "user" "USER" "rb:green:user" "1000" "1000" - ucidef_set_led_netdev "port1" "port1" "rb:green:port1" "eth0" - ucidef_set_led_switch "port2" "port2" "rb:green:port2" "switch0" "0x10" - ucidef_set_led_switch "port3" "port2" "rb:green:port3" "switch0" "0x08" - ucidef_set_led_switch "port4" "port3" "rb:green:port4" "switch0" "0x04" - ucidef_set_led_switch "port5" "port5" "rb:green:port5" "switch0" "0x02" - ;; -rb-941-2nd) - ucidef_set_led_timer "user" "USR/ACT" "rb:green:user" "1000" "1000" - ;; -rb-951ui-2nd|\ -rb-952ui-5ac2nd) - ucidef_set_led_timer "user" "USER" "rb:green:user" "1000" "1000" - ucidef_set_led_netdev "port1" "port1" "rb:green:port1" "eth0" - ucidef_set_led_switch "port2" "port2" "rb:green:port2" "switch0" "0x10" - ucidef_set_led_switch "port3" "port2" "rb:green:port3" "switch0" "0x08" - ucidef_set_led_switch "port4" "port3" "rb:green:port4" "switch0" "0x04" - ucidef_set_led_switch "port5" "port5" "rb:green:port5" "switch0" "0x02" - ucidef_set_led_wlan "wlan" "WLAN" "rb:blue:wlan" "phy0tpt" - ;; -rb-962uigs-5hact2hnt) - ucidef_set_led_timer "user" "USER/SFP" "rb:green:user" "1000" "1000" - ;; -rb-2011il|\ -rb-2011l|\ -rb-2011uas|\ -rb-2011uas-2hnd|\ -rb-2011uias|\ -rb-2011uias-2hnd) - ucidef_set_led_switch "eth6" "ETH6" "rb:green:eth6" "switch1" "0x20" - ucidef_set_led_switch "eth7" "ETH7" "rb:green:eth7" "switch1" "0x10" - ucidef_set_led_switch "eth8" "ETH8" "rb:green:eth8" "switch1" "0x08" - ucidef_set_led_switch "eth9" "ETH9" "rb:green:eth9" "switch1" "0x04" - ucidef_set_led_switch "eth10" "ETH10" "rb:green:eth10" "switch1" "0x02" - ;; -rb-lhg-5nd) - ucidef_set_led_netdev "lan" "LAN" "rb:green:eth" "eth0" - ucidef_set_rssimon "wlan0" "200000" "1" - ucidef_set_led_rssi "rssilow" "RSSILOW" "rb:green:rssi0" "wlan0" "1" "100" "0" "13" - ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "rb:green:rssi1" "wlan0" "20" "100" "-19" "13" - ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "rb:green:rssi2" "wlan0" "40" "100" "-39" "13" - ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "rb:green:rssi3" "wlan0" "60" "100" "-59" "13" - ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "rb:green:rssi4" "wlan0" "80" "100" "-79" "13" - ;; -rb-map-2nd) - ucidef_set_led_switch "eth1" "WAN" "rb:green:eth1" "switch0" "0x02" - ucidef_set_led_switch "eth2" "LAN" "rb:green:eth2" "switch0" "0x04" - ucidef_set_led_gpio "poe" "POE" "rb:red:poe_out" "14" "0" - ucidef_set_led_wlan "wlan" "WLAN" "rb:green:wlan" "phy0tpt" - ;; -rb-mapl-2nd) - ucidef_set_led_default "power" "POWER" "rb:green:power" "1" - ucidef_set_led_netdev "lan" "LAN" "rb:green:eth" "eth0" - ucidef_set_led_wlan "wlan" "WLAN" "rb:green:wlan" "phy0tpt" - ;; -rb-wap-2nd) - ucidef_set_led_timer "user" "USER" "rb:green:user" "1000" "1000" - ucidef_set_led_wlan "wlan" "WLAN" "rb:green:wlan" "phy0tpt" +dap-1330-a1) + ucidef_set_rssimon "wlan0" "2000000" "2" + ucidef_set_led_rssi "wifi-low" "wifi-low" "d-link:red:wifi" "wlan0" "1" "29" + ucidef_set_led_rssi "wifi-medium" "wifi-medium" "d-link:green:wifi" "wlan0" "30" "100" + ucidef_set_led_rssi "wifi-high" "wifi-high" "d-link:green:signal1" "wlan0" "50" "100" + ucidef_set_led_rssi "wifi-max" "wifi-max" "d-link:green:signal2" "wlan0" "70" "100" ;; dap-2695-a1) ucidef_set_led_default "power" "POWER" "d-link:green:power" "1" @@ -404,6 +359,19 @@ dlan-pro-1200-ac) ucidef_set_led_gpio "plcw" "dLAN" "devolo:status:dlan" "17" "0" ucidef_set_led_gpio "plcr" "dLAN" "devolo:error:dlan" "16" "0" ;; +e1700ac-v2) + ucidef_set_led_usbdev "usb" "USB" "$board:green:usb" "1-1" + ucidef_set_led_wlan "wlan2g" "WLAN2G" "$board:green:wlan2g" "phy1tpt" + ;; +esr900) + ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "engenius:blue:wlan-2g" "phy0tpt" + ucidef_set_led_wlan "wlan5g" "WLAN 5 GHz" "engenius:blue:wlan-5g" "phy1tpt" + ;; +esr1750|\ +epg5000) + ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "$board:blue:wlan-2g" "phy1tpt" + ucidef_set_led_wlan "wlan5g" "WLAN 5 GHz" "$board:blue:wlan-5g" "phy0tpt" + ;; gl-ar300m) ucidef_set_led_wlan "wlan" "WLAN" "$board:red:wlan" "phy0tpt" ;; @@ -434,15 +402,6 @@ gl-inet) ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth1" ucidef_set_led_wlan "wlan" "WLAN" "$board:red:wlan" "phy0tpt" ;; -esr900) - ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "engenius:blue:wlan-2g" "phy0tpt" - ucidef_set_led_wlan "wlan5g" "WLAN 5 GHz" "engenius:blue:wlan-5g" "phy1tpt" - ;; -esr1750|\ -epg5000) - ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "$board:blue:wlan-2g" "phy1tpt" - ucidef_set_led_wlan "wlan5g" "WLAN 5 GHz" "$board:blue:wlan-5g" "phy0tpt" - ;; hiwifi-hc6361) ucidef_set_led_netdev "inet" "INET" "hiwifi:blue:internet" "eth1" ucidef_set_led_wlan "wlan" "WLAN" "hiwifi:blue:wlan-2p4" "phy0tpt" @@ -454,6 +413,13 @@ hornet-ub-x2) ucidef_set_led_wlan "wlan" "WLAN" "alfa:blue:wlan" "phy0tpt" ucidef_set_led_usbdev "usb" "USB" "alfa:blue:usb" "1-1" ;; +lan-turtle) + ucidef_set_led_netdev "wan" "WAN" "$board:orange:system" "eth1" + ;; +lbe-m5) + ucidef_set_led_netdev "lan" "LAN" "ubnt:green:lan" "eth0" + ucidef_set_led_wlan "wlan" "WLAN" "ubnt:green:wlan" "phy0tpt" + ;; mc-mac1200r) ucidef_set_led_wlan "wlan2g" "WLAN2G" "mercury:green:wlan2g" "phy1tpt" ucidef_set_led_wlan "wlan5g" "WLAN5G" "mercury:green:wlan5g" "phy0tpt" @@ -591,6 +557,7 @@ r36a) ucidef_set_led_wlan "wlan" "WLAN" "$board:blue:wlan" "phy0tpt" ;; r602n|\ +t830|\ zbt-we1526) ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth1" ucidef_set_led_switch "lan1" "LAN1" "$board:green:lan1" "switch0" "0x10" @@ -598,13 +565,113 @@ zbt-we1526) ucidef_set_led_switch "lan3" "LAN3" "$board:green:lan3" "switch0" "0x04" ucidef_set_led_switch "lan4" "LAN4" "$board:green:lan4" "switch0" "0x02" ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt" + + case "$board" in + t830) + ucidef_set_led_usbdev "usb" "USB" "$board:green:usb" "1-1" + ;; + esac ;; +r6100) + ucidef_set_led_netdev "wan" "WAN (green)" "netgear:green:wan" "eth0" + ucidef_set_led_usbdev "usb" "USB" "netgear:blue:usb" "1-1" + ucidef_set_led_wlan "wlan" "WLAN" "netgear:blue:wlan" "phy1tpt" + ;; +rb-750) + ucidef_set_led_default "act" "act" "rb750:green:act" "1" + ucidef_set_led_netdev "port1" "port1" "rb750:green:port1" "eth1" + ucidef_set_led_switch "port2" "port2" "rb750:green:port2" "switch0" "0x10" + ucidef_set_led_switch "port3" "port3" "rb750:green:port3" "switch0" "0x08" + ucidef_set_led_switch "port4" "port4" "rb750:green:port4" "switch0" "0x04" + ucidef_set_led_switch "port5" "port5" "rb750:green:port5" "switch0" "0x02" + ;; +rb-750-r2|\ +rb-750p-pbr2|\ +rb-750up-r2) + ucidef_set_led_timer "user" "USER" "rb:green:user" "1000" "1000" + ucidef_set_led_netdev "port1" "port1" "rb:green:port1" "eth0" + ucidef_set_led_switch "port2" "port2" "rb:green:port2" "switch0" "0x10" + ucidef_set_led_switch "port3" "port2" "rb:green:port3" "switch0" "0x08" + ucidef_set_led_switch "port4" "port3" "rb:green:port4" "switch0" "0x04" + ucidef_set_led_switch "port5" "port5" "rb:green:port5" "switch0" "0x02" + ;; +rb-911-2hn|\ +rb-911-5hn) + ucidef_set_led_netdev "eth" "ETH" "rb:green:eth" "eth0" + ;; +rb-941-2nd) + ucidef_set_led_timer "user" "USR/ACT" "rb:green:user" "1000" "1000" + ;; +rb-951ui-2nd|\ +rb-952ui-5ac2nd) + ucidef_set_led_timer "user" "USER" "rb:green:user" "1000" "1000" + ucidef_set_led_netdev "port1" "port1" "rb:green:port1" "eth0" + ucidef_set_led_switch "port2" "port2" "rb:green:port2" "switch0" "0x10" + ucidef_set_led_switch "port3" "port2" "rb:green:port3" "switch0" "0x08" + ucidef_set_led_switch "port4" "port3" "rb:green:port4" "switch0" "0x04" + ucidef_set_led_switch "port5" "port5" "rb:green:port5" "switch0" "0x02" + ucidef_set_led_wlan "wlan" "WLAN" "rb:blue:wlan" "phy0tpt" + ;; +rb-962uigs-5hact2hnt) + ucidef_set_led_timer "user" "USER/SFP" "rb:green:user" "1000" "1000" + ;; +rb-2011il|\ +rb-2011l|\ +rb-2011uas|\ +rb-2011uas-2hnd|\ +rb-2011uias|\ +rb-2011uias-2hnd) + ucidef_set_led_switch "eth6" "ETH6" "rb:green:eth6" "switch1" "0x20" + ucidef_set_led_switch "eth7" "ETH7" "rb:green:eth7" "switch1" "0x10" + ucidef_set_led_switch "eth8" "ETH8" "rb:green:eth8" "switch1" "0x08" + ucidef_set_led_switch "eth9" "ETH9" "rb:green:eth9" "switch1" "0x04" + ucidef_set_led_switch "eth10" "ETH10" "rb:green:eth10" "switch1" "0x02" + ;; +rb-lhg-5nd) + ucidef_set_led_netdev "lan" "LAN" "rb:green:eth" "eth0" + ucidef_set_rssimon "wlan0" "200000" "1" + ucidef_set_led_rssi "rssilow" "RSSILOW" "rb:green:rssi0" "wlan0" "1" "100" "0" "13" + ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "rb:green:rssi1" "wlan0" "20" "100" "-19" "13" + ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "rb:green:rssi2" "wlan0" "40" "100" "-39" "13" + ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "rb:green:rssi3" "wlan0" "60" "100" "-59" "13" + ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "rb:green:rssi4" "wlan0" "80" "100" "-79" "13" + ;; +rb-map-2nd) + ucidef_set_led_switch "eth1" "WAN" "rb:green:eth1" "switch0" "0x02" + ucidef_set_led_switch "eth2" "LAN" "rb:green:eth2" "switch0" "0x04" + ucidef_set_led_gpio "poe" "POE" "rb:red:poe_out" "14" "0" + ucidef_set_led_wlan "wlan" "WLAN" "rb:green:wlan" "phy0tpt" + ;; +rb-mapl-2nd) + ucidef_set_led_default "power" "POWER" "rb:green:power" "1" + ucidef_set_led_netdev "lan" "LAN" "rb:green:eth" "eth0" + ucidef_set_led_wlan "wlan" "WLAN" "rb:green:wlan" "phy0tpt" + ;; +rb-wap-2nd) + ucidef_set_led_timer "user" "USER" "rb:green:user" "1000" "1000" + ucidef_set_led_wlan "wlan" "WLAN" "rb:green:wlan" "phy0tpt" + ;; +re355|\ re450) ucidef_set_led_netdev "lan_data" "LAN Data" "$board:green:lan_data" "eth0" "tx rx" ucidef_set_led_netdev "lan_link" "LAN Link" "$board:green:lan_link" "eth0" "link" ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "$board:blue:wlan2g" "phy1tpt" ucidef_set_led_wlan "wlan5g" "WLAN 5 GHz" "$board:blue:wlan5g" "phy0tpt" ;; +rme-eg200) + ucidef_set_led_netdev "wan" "WAN" "eg200:red:eth0" "eth0" + ucidef_set_led_wlan "wlan" "WLAN" "eg200:red:wlan" "phy0tpt" + ucidef_set_led_oneshot "modbus" "Modbus" "eg200:red:modbus" "100" "33" + ucidef_set_led_default "etactica" "etactica" "eg200:red:etactica" "ignore" + ;; +rocket-m-ti) + ucidef_set_led_rssi "rssiverylow" "RSSIVERYLOW" "ubnt:green:link1" "wlan0" "1" "100" "0" "13" + ucidef_set_led_rssi "rssilow" "RSSILOW" "ubnt:green:link2" "wlan0" "26" "100" "-25" "13" + ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "ubnt:green:link3" "wlan0" "51" "100" "-50" "13" + ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "ubnt:green:link4" "wlan0" "76" "100" "-75" "13" + ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "ubnt:green:link5" "wlan0" "76" "100" "-75" "13" + ucidef_set_led_rssi "rssiveryhigh" "RSSIVERYHIGH" "ubnt:green:link4" "wlan0" "76" "100" "-75" "13" + ;; rut900) ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth1" ucidef_set_led_switch "lan1" "LAN1" "$board:green:lan1" "switch0" "0x10" @@ -775,13 +842,6 @@ tl-wr741nd) ucidef_set_led_switch "lan3" "LAN3" "tp-link:green:lan3" "switch0" "0x08" ucidef_set_led_switch "lan4" "LAN4" "tp-link:green:lan4" "switch0" "0x10" ;; -archer-c5|\ -archer-c7) - ucidef_set_led_usbdev "usb1" "USB1" "tp-link:green:usb1" "1-1" - ucidef_set_led_usbdev "usb2" "USB2" "tp-link:green:usb2" "2-1" - ucidef_set_led_wlan "wlan2g" "WLAN2G" "tp-link:blue:wlan2g" "phy1tpt" - ucidef_set_led_wlan "wlan5g" "WLAN5G" "tp-link:blue:wlan5g" "phy0tpt" - ;; tl-wpa8630) ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth0" ucidef_set_led_netdev "wlan" "WLAN" "$board:green:wlan" "wlan1" @@ -830,6 +890,9 @@ tl-wr840n-v3) ucidef_set_led_switch "lan" "LAN" "tp-link:green:lan" "switch0" "0x1E" ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt" ;; +tl-wr940n-v6) + ucidef_set_led_netdev "wan" "WAN" "tp-link:blue:wan" "eth0" + ;; tl-wr942n-v1) ucidef_set_led_switch "lan1" "LAN1" "$board:green:lan1" "switch0" "0x04" ucidef_set_led_switch "lan2" "LAN2" "$board:green:lan2" "switch0" "0x08" @@ -872,6 +935,10 @@ tube2h) ucidef_set_led_rssi "signal3" "SIGNAL3" "alfa:green:signal3" "wlan0" "51" "100" "-50" "13" ucidef_set_led_rssi "signal4" "SIGNAL4" "alfa:green:signal4" "wlan0" "76" "100" "-75" "13" ;; +wam250) + ucidef_set_led_netdev "lan" "LAN" "$board:white:lan" "eth0" + ucidef_set_led_wlan "wlan" "WLAN" "$board:white:wlan" "phy0tpt" + ;; wndap360) ucidef_set_led_power "power" "POWER GREEN" "netgear:green:power" "1" ;; @@ -879,11 +946,6 @@ wndr3700) ucidef_set_led_default "wan" "WAN LED (green)" "netgear:green:wan" "0" ucidef_set_led_usbdev "usb" "USB" "netgear:green:usb" "1-1" ;; -r6100) - ucidef_set_led_netdev "wan" "WAN (green)" "netgear:green:wan" "eth0" - ucidef_set_led_usbdev "usb" "USB" "netgear:blue:usb" "1-1" - ucidef_set_led_wlan "wlan" "WLAN" "netgear:blue:wlan" "phy1tpt" - ;; wi2a-ac200i) ucidef_set_led_default "power" "Power (green)" "nokia:green:power" "1" ucidef_set_led_default "wan" "Ethernet LED (green)" "nokia:green:wan" "1" @@ -907,6 +969,9 @@ whr-hp-gn) ucidef_set_led_switch "lan3" "LAN3" "buffalo:green:lan3" "switch0" "0x08" ucidef_set_led_switch "lan4" "LAN4" "buffalo:green:lan4" "switch0" "0x10" ;; +wifi-pineapple-nano) + ucidef_set_led_wlan "wlan0" "WLAN0" "$board:blue:system" "phy0tpt" + ;; wlae-ag300n) ucidef_set_led_netdev "wireless" "WIRELESS" "buffalo:green:wireless" "wlan0" ;; diff --git a/target/linux/ar71xx/base-files/etc/board.d/02_network b/target/linux/ar71xx/base-files/etc/board.d/02_network index 5a10a9f48..dfe97e813 100755 --- a/target/linux/ar71xx/base-files/etc/board.d/02_network +++ b/target/linux/ar71xx/base-files/etc/board.d/02_network @@ -28,12 +28,15 @@ ar71xx_setup_interfaces() mc-mac1200r|\ minibox-v1|\ mynet-n600|\ - oolite|\ + oolite-v1|\ + oolite-v5.2|\ + oolite-v5.2-dev|\ qihoo-c301|\ r602n|\ rb-750|\ rb-751|\ som9331|\ + t830|\ tew-632brp|\ tew-712br|\ tew-732br|\ @@ -79,6 +82,7 @@ ar71xx_setup_interfaces() fritz300e|\ gl-usb150|\ hiveap-121|\ + lbe-m5|\ loco-m-xw|\ mr12|\ mr16|\ @@ -93,6 +97,8 @@ ar71xx_setup_interfaces() pqi-air-pen|\ rb-411|\ rb-411u|\ + rb-911-2hn|\ + rb-911-5hn|\ rb-911g-2hpnd|\ rb-911g-5hpacd|\ rb-911g-5hpnd|\ @@ -105,6 +111,7 @@ ar71xx_setup_interfaces() rb-sxt5n|\ rb-wap-2nd|\ rb-wapg-5hact2hnd|\ + re355|\ re450|\ rocket-m-xw|\ sc300m |\ @@ -136,6 +143,7 @@ ar71xx_setup_interfaces() unifi|\ unifiac-lite|\ wi2a-ac200i|\ + wifi-pineapple-nano|\ wndap360|\ wp543) ucidef_set_interface_lan "eth0" @@ -240,7 +248,8 @@ ar71xx_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth1" "1:lan:1" "2:lan:4" "3:lan:3" "4:lan:2" ;; - archer-c60-v1) + archer-c60-v1|\ + archer-c60-v2) ucidef_set_interfaces_lan_wan "eth1.1" "eth0" ucidef_add_switch "switch0" \ "0@eth1" "1:lan:1" "2:lan:2" "3:lan:3" "4:lan:4" @@ -259,9 +268,20 @@ ar71xx_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "3:wan" "4:lan" ;; - cap324) + cap324|\ + rme-eg200) ucidef_set_interface_lan "eth0" "dhcp" ;; + cf-e375ac|\ + rb-map-2nd) + ucidef_add_switch "switch0" \ + "0@eth0" "1:wan" "2:lan" + ;; + cf-e385ac) + ucidef_set_interfaces_lan_wan "eth0.1" "eth1.2" + ucidef_add_switch "switch0" \ + "0@eth0" "2:lan" "1:wan" "6@eth1" + ;; cpe210|\ cpe510|\ wbs210|\ @@ -322,6 +342,7 @@ ar71xx_setup_interfaces() smart-300|\ tl-wdr6500-v2|\ tl-wr940n-v4|\ + tl-wr940n-v6|\ tl-wr941nd-v6|\ wnr1000-v2|\ wnr2000-v4|\ @@ -351,6 +372,12 @@ ar71xx_setup_interfaces() "0u@eth0" "2:lan" "3:lan" "4:lan" ucidef_add_switch_attr "switch0" "enable" "false" ;; + e1700ac-v2|\ + unifiac-pro|\ + xd3200) + ucidef_add_switch "switch0" \ + "0@eth0" "2:lan" "3:wan" + ;; ebr-2310-c1) ucidef_set_interfaces_lan_wan "eth0.1" "eth1" ucidef_add_switch "switch0" \ @@ -370,6 +397,11 @@ ar71xx_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "5:wan" ;; + ew-balin) + ucidef_set_interface_raw "usb2" "usb0" "static" + ucidef_add_switch "switch0" \ + "0@eth0" "5:lan:4" "4:lan:5" "3:wan" + ;; ew-dorin) ucidef_add_switch "switch0" \ "0@eth0" "1:lan" "2:lan" "3:wan" @@ -426,10 +458,6 @@ ar71xx_setup_interfaces() ucidef_add_switch "switch1" \ "0@eth1" "1:lan:4" "2:lan:1" "3:lan:3" "4:lan:2" "5:wan" ;; - rb-map-2nd) - ucidef_add_switch "switch0" \ - "0@eth0" "1:wan" "2:lan" - ;; rut900) ucidef_set_interfaces_lan_wan "eth0.1" "eth1" ucidef_add_switch "switch0" \ @@ -482,11 +510,6 @@ ar71xx_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "1:lan" "2:wan" ;; - unifiac-pro|\ - xd3200) - ucidef_add_switch "switch0" \ - "0@eth0" "2:lan" "3:wan" - ;; wndr3700|\ wndr3700v2|\ wndr3800|\ diff --git a/target/linux/ar71xx/base-files/etc/board.d/03_gpio_switches b/target/linux/ar71xx/base-files/etc/board.d/03_gpio_switches index 360a45f69..199a6ac08 100755 --- a/target/linux/ar71xx/base-files/etc/board.d/03_gpio_switches +++ b/target/linux/ar71xx/base-files/etc/board.d/03_gpio_switches @@ -10,18 +10,18 @@ board_config_update board=$(board_name) case "$board" in -nanostation-m) - ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "8" - ;; -nanostation-m-xw) - ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "2" - ;; cpe210|\ cpe510|\ wbs210|\ wbs510) ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "20" ;; +nanostation-m) + ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "8" + ;; +nanostation-m-xw) + ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "2" + ;; rb-912uag-2hpnd|\ rb-912uag-5hpnd) ucidef_add_gpio_switch "usb_power_switch" "USB Power Switch" "52" "1" diff --git a/target/linux/ar71xx/base-files/etc/diag.sh b/target/linux/ar71xx/base-files/etc/diag.sh index 2720288e3..797c30f8a 100644 --- a/target/linux/ar71xx/base-files/etc/diag.sh +++ b/target/linux/ar71xx/base-files/etc/diag.sh @@ -23,8 +23,11 @@ get_status_led() { antminer-s1|\ antminer-s3|\ antminer-r1|\ + e1700ac-v2|\ + e600gac-v2|\ eap120|\ minibox-v1|\ + packet-squirrel|\ som9331|\ sr3200|\ tl-wr802n-v2|\ @@ -61,6 +64,7 @@ get_status_led() { archer-c58-v1|\ archer-c59-v1|\ archer-c60-v1|\ + archer-c60-v2|\ archer-c7-v4|\ fritz300e|\ gl-usb150|\ @@ -73,6 +77,23 @@ get_status_led() { tl-wr902ac-v1) status_led="$board:green:power" ;; + archer-c5|\ + archer-c7|\ + tl-mr10u|\ + tl-mr12u|\ + tl-mr13u|\ + tl-wdr4300|\ + tl-wdr4900-v2|\ + tl-wr703n|\ + tl-wr710n|\ + tl-wr720n-v3|\ + tl-wr802n-v1|\ + tl-wr810n|\ + tl-wr810n-v2|\ + tl-wr940n-v4|\ + tl-wr941nd-v6) + status_led="tp-link:blue:system" + ;; ap90q|\ cpe830|\ cpe870|\ @@ -108,9 +129,6 @@ get_status_led() { rocket-m-xw) status_led="ubnt:green:link4" ;; - rocket-m-ti) - status_led="ubnt:green:link6" - ;; bxu2000n-2-a1) status_led="bhu:green:status" ;; @@ -132,8 +150,10 @@ get_status_led() { cf-e320n-v2) status_led="$board:blue:wlan" ;; + cf-e375ac|\ cf-e380ac-v1|\ - cf-e380ac-v2) + cf-e380ac-v2|\ + cf-e385ac) status_led="$board:blue:wlan2g" ;; cpe510) @@ -143,6 +163,7 @@ get_status_led() { cr5000) status_led="pcs:amber:power" ;; + dap-1330-a1|\ dgl-5500-a1|\ dhp-1565-a1|\ dir-505-a1|\ @@ -178,13 +199,18 @@ get_status_led() { status_led="$board:green:sig4" ;; dragino2|\ - oolite) + oolite-v1) status_led="$board:red:system" ;; dw33d|\ r36a) status_led="$board:blue:status" ;; + e600g-v2|\ + oolite-v5.2-dev|\ + wifi-pineapple-nano) + status_led="$board:blue:system" + ;; eap300v2) status_led="engenius:blue:power" ;; @@ -199,6 +225,9 @@ get_status_led() { el-mini) status_led="easylink:green:system" ;; + ew-balin) + status_led="balin:green:status" + ;; ew-dorin|\ ew-dorin-router) status_led="dorin:green:status" @@ -212,7 +241,8 @@ get_status_led() { ;; gl-ar750|\ hiveap-121|\ - nbg6716) + nbg6716|\ + wam250) status_led="$board:white:power" ;; hiwifi-hc6361) @@ -229,6 +259,12 @@ get_status_led() { jwap230) status_led="$board:green:led1" ;; + lan-turtle) + status_led="$board:orange:system" + ;; + lbe-m5) + status_led="ubnt:green:sys" + ;; ls-sr71) status_led="ubnt:green:d22" ;; @@ -319,6 +355,8 @@ get_status_led() { rb-750-r2|\ rb-750p-pbr2|\ rb-750up-r2|\ + rb-911-2hn|\ + rb-911-5hn|\ rb-911g-2hpnd|\ rb-911g-5hpacd|\ rb-911g-5hpnd|\ @@ -340,10 +378,14 @@ get_status_led() { rb-sxt5n) status_led="rb:green:power" ;; + re355|\ re450|\ sc300m) status_led="$board:blue:power" ;; + rocket-m-ti) + status_led="ubnt:green:link6" + ;; routerstation|\ routerstation-pro) status_led="ubnt:green:rf" @@ -357,6 +399,9 @@ get_status_led() { qihoo-c301) status_led="qihoo:green:status" ;; + t830) + status_led="$board:green:usb" + ;; tellstick-znet-lite) status_led="tellstick:white:system" ;; @@ -421,26 +466,12 @@ get_status_led() { tl-wr941nd-v5) status_led="tp-link:green:system" ;; - archer-c5|\ - archer-c7|\ - tl-mr10u|\ - tl-mr12u|\ - tl-mr13u|\ - tl-wdr4300|\ - tl-wdr4900-v2|\ - tl-wr703n|\ - tl-wr710n|\ - tl-wr720n-v3|\ - tl-wr802n-v1|\ - tl-wr810n|\ - tl-wr810n-v2|\ - tl-wr940n-v4|\ - tl-wr941nd-v6) - status_led="tp-link:blue:system" - ;; tl-wr841n-v9) status_led="tp-link:green:qss" ;; + tl-wr940n-v6) + status_led="tp-link:orange:diag" + ;; tl-wdr6500-v2) status_led="tp-link:white:system" ;; diff --git a/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata index ccb041028..5d01701aa 100644 --- a/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +++ b/target/linux/ar71xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata @@ -18,12 +18,18 @@ ath10kcal_extract() { local part=$1 local offset=$2 local count=$3 - local mtd + local mtd cal_size mtd=$(find_mtd_chardev $part) [ -n "$mtd" ] || \ ath10kcal_die "no mtd device found for partition $part" + # Check that the calibration data size in header equals the desired size + cal_size=$(dd if=$mtd bs=2 count=1 skip=$(( $offset / 2 )) conv=swab 2>/dev/null | hexdump -ve '1/2 "%d"') + + [ "$count" = "$cal_size" ] || \ + ath10kcal_die "no calibration data found in $part" + dd if=$mtd of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count 2>/dev/null || \ ath10kcal_die "failed to extract calibration data from $mtd" } @@ -63,10 +69,14 @@ case "$FIRMWARE" in ath10kcal_extract "art" 20480 2116 ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1) ;; - cf-e355ac|\ + cf-e355ac-v1|\ cf-e380ac-v1|\ cf-e380ac-v2|\ dlan-pro-1200-ac|\ + e1700ac-v2|\ + e600gac-v2|\ + oolite-v5.2|\ + oolite-v5.2-dev|\ sr3200|\ xd3200) ath10kcal_extract "art" 20480 2116 @@ -106,6 +116,7 @@ case "$FIRMWARE" in rb-wapg-5hact2hnd) ath10kcal_from_file "/sys/firmware/routerboot/ext_wlan_data" 20480 2116 ;; + re355|\ re450|\ tl-wr902ac-v1) ath10kcal_extract "art" 20480 2116 @@ -151,11 +162,17 @@ case "$FIRMWARE" in case $board in archer-c58-v1|\ archer-c59-v1|\ - archer-c60-v1) + archer-c60-v1|\ + archer-c60-v2|\ + cf-e355ac-v2|\ + cf-e375ac) ath10kcal_extract "art" 20480 12064 ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \ /lib/firmware/ath10k/QCA9888/hw2.0/board.bin ;; + cf-e385ac) + ath10kcal_extract "art" 20480 12064 + ;; esac ;; *) diff --git a/target/linux/ar71xx/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ar71xx/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index 0530d595a..a763938ec 100644 --- a/target/linux/ar71xx/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ar71xx/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -14,7 +14,8 @@ board=$(board_name) case "$board" in archer-c58-v1|\ archer-c59-v1|\ - archer-c60-v1) + archer-c60-v1|\ + archer-c60-v2) echo $(macaddr_add $(mtd_get_mac_binary mac 8) $(($PHYNBR - 1)) ) > /sys${DEVPATH}/macaddress ;; *) diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration b/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration index 05d806051..4dd224b54 100644 --- a/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration +++ b/target/linux/ar71xx/base-files/etc/uci-defaults/04_led_migration @@ -49,45 +49,30 @@ dir-825-c1|\ dir-835-a1) migrate_leds ":orange:=:amber:" ":wifi_bgn=:wlan2g" ;; - dr344) migrate_leds ":red:=:green:" ":yellow:=:green:" ;; - gl-ar150) migrate_leds "gl-ar150:wlan=gl-ar150:orange:wlan" "gl-ar150:lan=gl-ar150:green:lan" "gl-ar150:wan=gl-ar150:green:wan" ;; - -wndap360) - migrate_leds "wndap360:=netgear:" +oolite-v1) + migrate_leds "oolite:=${board}" ;; - -wndr3700) - migrate_leds "wndr3700:=netgear:" +wndap360|\ +wndr3700|\ +wnr2000|\ +wnr2200) + migrate_leds "${board}:=netgear:" ;; - -wndr3700v4 | \ +wndr3700v4|\ wndr4300) migrate_leds ":orange:=:amber:" ;; - -wnr2000) - migrate_leds "wnr2000:=netgear:" - ;; - -wnr2200) - migrate_leds "wnr2200:=netgear:" - ;; - -wnr612-v2) - migrate_leds "wnr612v2:=netgear:" - ;; - wnr1000-v2) migrate_leds "wnr1000v2:=netgear:" ;; - -*) +wnr612-v2) + migrate_leds "wnr612v2:=netgear:" ;; esac diff --git a/target/linux/ar71xx/base-files/lib/ar71xx.sh b/target/linux/ar71xx/base-files/lib/ar71xx.sh index b6642495d..7249cb615 100755 --- a/target/linux/ar71xx/base-files/lib/ar71xx.sh +++ b/target/linux/ar71xx/base-files/lib/ar71xx.sh @@ -98,6 +98,27 @@ ubnt_xm_board_detect() { [ -z "$model" ] || AR71XX_MODEL="${model}${magic:3:1}" } +ubnt_ac_lite_get_mtd_part_magic() { + ar71xx_get_mtd_offset_size_format EEPROM 12 2 %02x +} + +ubnt_ac_lite_board_detect() { + local model + local magic + + magic="$(ubnt_ac_lite_get_mtd_part_magic)" + case ${magic:0:4} in + "e517") + model="Ubiquiti UniFi-AC-LITE" + ;; + "e557") + model="Ubiquiti UniFi-AC-MESH" + ;; + esac + + [ -z "$model" ] || AR71XX_MODEL="${model}" +} + cybertan_get_hw_magic() { local part @@ -215,6 +236,9 @@ tplink_board_detect() { [ "$hwid" = '08020002' -a "$mid" = '00000002' ] && hwver=' v2' ;; + "081000"*) + model="TP-Link TL-WR810N" + ;; "083000"*) model="TP-Link TL-WA830RE" @@ -287,12 +311,6 @@ tplink_board_detect() { "360000"*) model="TP-Link TL-WDR3600" ;; - "3C0001"*) - model="OOLITE" - ;; - "3C0002"*) - model="MINIBOX_V1" - ;; "430000"*) model="TP-Link TL-WDR4300" ;; @@ -467,6 +485,9 @@ ar71xx_board_detect() { *"Archer C60 v1") name="archer-c60-v1" ;; + *"Archer C60 v2") + name="archer-c60-v2" + ;; *"Archer C7") name="archer-c7" ;; @@ -513,8 +534,14 @@ ar71xx_board_detect() { *"CF-E320N v2") name="cf-e320n-v2" ;; - *"CF-E355AC") - name="cf-e355ac" + *"CF-E355AC v1") + name="cf-e355ac-v1" + ;; + *"CF-E355AC v2") + name="cf-e355ac-v2" + ;; + *"CF-E375AC") + name="cf-e375ac" ;; *"CF-E380AC v1") name="cf-e380ac-v1" @@ -522,6 +549,9 @@ ar71xx_board_detect() { *"CF-E380AC v2") name="cf-e380ac-v2" ;; + *"CF-E385AC") + name="cf-e385ac" + ;; *"CF-E520N") name="cf-e520n" ;; @@ -551,6 +581,9 @@ ar71xx_board_detect() { *"CR5000") name="cr5000" ;; + *"DAP-1330 Rev. A1") + name="dap-1330-a1" + ;; *"DAP-2695 rev. A1") name="dap-2695-a1" ;; @@ -621,9 +654,18 @@ ar71xx_board_detect() { *"DW33D") name="dw33d" ;; + *"E1700AC v2") + name="e1700ac-v2" + ;; *"E2100L") name="e2100l" ;; + *"E600G v2") + name="e600g-v2" + ;; + *"E600GAC v2") + name="e600gac-v2" + ;; *"EAP120") name="eap120" tplink_pharos_board_detect @@ -643,6 +685,9 @@ ar71xx_board_detect() { *"EL-MINI") name="el-mini" ;; + *"EmbWir-Balin") + name="ew-balin" + ;; *"EmbWir-Dorin") name="ew-dorin" ;; @@ -661,13 +706,16 @@ ar71xx_board_detect() { *"ESR900") name="esr900" ;; + *"eTactica EG-200") + name="rme-eg200" + ;; *"FRITZ!WLAN Repeater 300E") name="fritz300e" ;; - *"GL AR150") + *"GL-AR150") name="gl-ar150" ;; - *"GL AR300") + *"GL-AR300") name="gl-ar300" ;; *"GL-AR300M") @@ -714,9 +762,15 @@ ar71xx_board_detect() { *"JWAP230") name="jwap230" ;; + *"LAN Turtle") + name="lan-turtle" + ;; *"Lima"*) name="lima" ;; + *"Litebeam M5"*) + name="lbe-m5" + ;; *"Loco M XW") name="loco-m-xw" ;; @@ -836,7 +890,16 @@ ar71xx_board_detect() { name="onion-omega" ;; *"Oolite V1.0") - name="oolite" + name="oolite-v1" + ;; + *"Packet Squirrel") + name="packet-squirrel" + ;; + *"Oolite V5.2") + name="oolite-v5.2" + ;; + *"Oolite V5.2-Dev") + name="oolite-v5.2-dev" ;; *"PB42") name="pb42" @@ -862,6 +925,9 @@ ar71xx_board_detect() { *"Rambutan"*) name="rambutan" ;; + *"RE355") + name="re355" + ;; *"RE450") name="re450" ;; @@ -941,6 +1007,12 @@ ar71xx_board_detect() { *"RouterBOARD 751G") name="rb-751g" ;; + *"RouterBOARD 911-2Hn") + name="rb-911-2hn" + ;; + *"RouterBOARD 911-5Hn") + name="rb-911-5hn" + ;; *"RouterBOARD 911G-2HPnD") name="rb-911g-2hpnd" ;; @@ -1028,6 +1100,9 @@ ar71xx_board_detect() { *"SR3200") name="sr3200" ;; + *"T830") + name="t830" + ;; *"TellStick ZNet Lite") name="tellstick-znet-lite" ;; @@ -1229,6 +1304,9 @@ ar71xx_board_detect() { *"TL-WR940N v4") name="tl-wr940n-v4" ;; + *"TL-WR940N v6") + name="tl-wr940n-v6" + ;; *"TL-WR941N/ND v5") name="tl-wr941nd-v5" ;; @@ -1252,6 +1330,7 @@ ar71xx_board_detect() { ;; *"UniFi-AC-LITE/MESH") name="unifiac-lite" + ubnt_ac_lite_board_detect ;; *"UniFi-AC-PRO") name="unifiac-pro" @@ -1262,6 +1341,9 @@ ar71xx_board_detect() { *"UniFiAP Outdoor+") name="unifi-outdoor-plus" ;; + *"WAM250") + name="wam250" + ;; *"WBS210") name="wbs210" tplink_pharos_board_detect @@ -1285,6 +1367,9 @@ ar71xx_board_detect() { *"WHR-HP-GN") name="whr-hp-gn" ;; + *"WiFi Pineapple NANO") + name="wifi-pineapple-nano" + ;; *"WLAE-AG300N") name="wlae-ag300n" ;; diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh index 3d7b1593e..376984a14 100755 --- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh @@ -93,6 +93,22 @@ tplink_get_image_boot_size() { get_image "$@" | dd bs=4 count=1 skip=37 2>/dev/null | hexdump -v -n 4 -e '1/1 "%02x"' } +tplink_pharos_check_support_list() { + local image="$1" + local offset="$2" + local model="$3" + + # Here $image is given to dd directly instead of using get_image; + # otherwise the skip will take almost a second (as dd can't seek) + dd if="$image" bs=1 skip=$offset count=1024 2>/dev/null | ( + while IFS= read -r line; do + [ "$line" = "$model" ] && exit 0 + done + + exit 1 + ) +} + tplink_pharos_check_image() { local magic_long="$(get_magic_long "$1")" [ "$magic_long" != "7f454c46" ] && { @@ -101,18 +117,10 @@ tplink_pharos_check_image() { } local model_string="$(tplink_pharos_get_model_string)" - local line - # Here $1 is given to dd directly instead of get_image as otherwise the skip - # will take almost a second (as dd can't seek then) - # - # This will fail if the image isn't local, but that's fine: as the - # read loop won't be executed at all, it will return true, so the image - # is accepted (loading the first 1.5M of a remote image for this check seems - # a bit extreme) - dd if="$1" bs=1 skip=1511432 count=1024 2>/dev/null | while read line; do - [ "$line" = "$model_string" ] && break - done || { + # New images have the support list at 7802888, old ones at 1511432 + tplink_pharos_check_support_list "$1" 7802888 "$model_string" || \ + tplink_pharos_check_support_list "$1" 1511432 "$model_string" || { echo "Unsupported image (model not in support-list)" return 1 } @@ -202,20 +210,25 @@ platform_check_image() { archer-c58-v1|\ archer-c59-v1|\ archer-c60-v1|\ + archer-c60-v2|\ archer-c7-v4|\ bullet-m|\ c-55|\ carambola2|\ cf-e316n-v2|\ cf-e320n-v2|\ - cf-e355ac|\ + cf-e355ac-v1|\ + cf-e355ac-v2|\ + cf-e375ac|\ cf-e380ac-v1|\ cf-e380ac-v2|\ + cf-e385ac|\ cf-e520n|\ cf-e530n|\ cpe505n|\ cpe830|\ cpe870|\ + dap-1330-a1|\ dgl-5500-a1|\ dhp-1565-a1|\ dir-505-a1|\ @@ -232,11 +245,15 @@ platform_check_image() { dr342|\ dr531|\ dragino2|\ + e1700ac-v2|\ + e600g-v2|\ + e600gac-v2|\ ebr-2310-c1|\ ens202ext|\ epg5000|\ esr1750|\ esr900|\ + ew-balin|\ ew-dorin|\ ew-dorin-router|\ gl-ar150|\ @@ -249,6 +266,7 @@ platform_check_image() { hiwifi-hc6361|\ hornet-ub-x2|\ jwap230|\ + lbe-m5|\ lima|\ loco-m-xw|\ mzk-w04nu|\ @@ -260,6 +278,7 @@ platform_check_image() { pqi-air-pen|\ r36a|\ r602n|\ + rme-eg200|\ rocket-m|\ rocket-m-ti|\ rocket-m-xw|\ @@ -268,6 +287,7 @@ platform_check_image() { sc300m|\ sc450|\ sr3200|\ + t830|\ tew-632brp|\ tew-712br|\ tew-732br|\ @@ -278,6 +298,7 @@ platform_check_image() { unifi-outdoor|\ unifiac-lite|\ unifiac-pro|\ + wam250|\ weio|\ whr-g301n|\ whr-hp-g300n|\ @@ -382,12 +403,17 @@ platform_check_image() { el-m150|\ el-mini|\ gl-inet|\ + lan-turtle|\ mc-mac1200r|\ minibox-v1|\ omy-g1|\ omy-x1|\ onion-omega|\ - oolite|\ + oolite-v1|\ + oolite-v5.2|\ + oolite-v5.2-dev|\ + packet-squirrel|\ + re355|\ re450|\ rut900|\ smart-300|\ @@ -453,9 +479,11 @@ platform_check_image() { tl-wr842n-v3|\ tl-wr902ac-v1|\ tl-wr940n-v4|\ + tl-wr940n-v6|\ tl-wr941nd|\ tl-wr941nd-v5|\ - tl-wr941nd-v6) + tl-wr941nd-v6|\ + wifi-pineapple-nano) local magic_ver="0100" case "$board" in @@ -660,6 +688,8 @@ platform_check_image() { rb-750-r2|\ rb-750p-pbr2|\ rb-750up-r2|\ + rb-911-2hn|\ + rb-911-5hn|\ rb-941-2nd|\ rb-951ui-2nd|\ rb-952ui-5ac2nd|\ @@ -681,48 +711,11 @@ platform_pre_upgrade() { local board=$(board_name) case "$board" in - c-60|\ - hiveap-121|\ - nbg6716|\ - r6100|\ - rambutan|\ - rb-411|\ - rb-411u|\ - rb-433|\ - rb-433u|\ - rb-435g|\ - rb-450|\ - rb-450g|\ - rb-493|\ - rb-493g|\ - rb-750|\ - rb-750gl|\ - rb-751|\ - rb-751g|\ - rb-911g-2hpnd|\ - rb-911g-5hpacd|\ - rb-911g-5hpnd|\ - rb-912uag-2hpnd|\ - rb-912uag-5hpnd|\ - rb-921gs-5hpacd-r2|\ - rb-951g-2hnd|\ - rb-951ui-2hnd|\ - rb-2011il|\ - rb-2011l|\ - rb-2011uas|\ - rb-2011uas-2hnd|\ - rb-2011uias|\ - rb-2011uias-2hnd|\ - rb-sxt2n|\ - rb-sxt5n|\ - wi2a-ac200i|\ - wndr3700v4|\ - wndr4300) - nand_do_upgrade "$1" - ;; rb-750-r2|\ rb-750p-pbr2|\ rb-750up-r2|\ + rb-911-2hn|\ + rb-911-5hn|\ rb-941-2nd|\ rb-951ui-2nd|\ rb-952ui-5ac2nd|\ @@ -735,10 +728,6 @@ platform_pre_upgrade() { # erase firmware if booted from initramfs [ -z "$(rootfs_type)" ] && mtd erase firmware ;; - mr18|\ - z1) - merakinand_do_upgrade "$1" - ;; esac } @@ -827,6 +816,49 @@ platform_do_upgrade() { om5p-an) platform_do_upgrade_openmesh "$ARGV" ;; + c-60|\ + hiveap-121|\ + nbg6716|\ + r6100|\ + rambutan|\ + rb-411|\ + rb-411u|\ + rb-433|\ + rb-433u|\ + rb-435g|\ + rb-450|\ + rb-450g|\ + rb-493|\ + rb-493g|\ + rb-750|\ + rb-750gl|\ + rb-751|\ + rb-751g|\ + rb-911g-2hpnd|\ + rb-911g-5hpacd|\ + rb-911g-5hpnd|\ + rb-912uag-2hpnd|\ + rb-912uag-5hpnd|\ + rb-921gs-5hpacd-r2|\ + rb-951g-2hnd|\ + rb-951ui-2hnd|\ + rb-2011il|\ + rb-2011l|\ + rb-2011uas|\ + rb-2011uas-2hnd|\ + rb-2011uias|\ + rb-2011uias-2hnd|\ + rb-sxt2n|\ + rb-sxt5n|\ + wi2a-ac200i|\ + wndr3700v4|\ + wndr4300) + nand_do_upgrade "$1" + ;; + mr18|\ + z1) + merakinand_do_upgrade "$1" + ;; uap-pro|\ unifi-outdoor-plus) MTD_CONFIG_ARGS="-s 0x180000" @@ -841,13 +873,3 @@ platform_do_upgrade() { ;; esac } - -disable_watchdog() { - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} - -append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/ar71xx/config-4.4 b/target/linux/ar71xx/config-4.4 deleted file mode 100644 index 8ecf7e135..000000000 --- a/target/linux/ar71xx/config-4.4 +++ /dev/null @@ -1,473 +0,0 @@ -CONFIG_AG71XX=y -CONFIG_AG71XX_AR8216_SUPPORT=y -# CONFIG_AG71XX_DEBUG is not set -# CONFIG_AG71XX_DEBUG_FS is not set -CONFIG_AR8216_PHY=y -CONFIG_AR8216_PHY_LEDS=y -CONFIG_ARCH_BINFMT_ELF_STATE=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -# CONFIG_ARCH_HAS_SG_CHAIN is not set -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_AT803X_PHY=y -CONFIG_ATH79=y -# CONFIG_ATH79_DEV_AP9X_PCI is not set -# CONFIG_ATH79_DEV_DSA is not set -# CONFIG_ATH79_DEV_ETH is not set -# CONFIG_ATH79_DEV_GPIO_BUTTONS is not set -# CONFIG_ATH79_DEV_LEDS_GPIO is not set -# CONFIG_ATH79_DEV_M25P80 is not set -# CONFIG_ATH79_DEV_SPI is not set -# CONFIG_ATH79_DEV_USB is not set -# CONFIG_ATH79_MACH_A60 is not set -# CONFIG_ATH79_MACH_ALFA_AP120C is not set -# CONFIG_ATH79_MACH_ALFA_AP96 is not set -# CONFIG_ATH79_MACH_ALFA_NX is not set -# CONFIG_ATH79_MACH_ALL0258N is not set -# CONFIG_ATH79_MACH_ALL0315N is not set -# CONFIG_ATH79_MACH_ANTMINER_S1 is not set -# CONFIG_ATH79_MACH_ANTMINER_S3 is not set -# CONFIG_ATH79_MACH_ANTROUTER_R1 is not set -# CONFIG_ATH79_MACH_AP121 is not set -# CONFIG_ATH79_MACH_AP121F is not set -# CONFIG_ATH79_MACH_AP132 is not set -# CONFIG_ATH79_MACH_AP136 is not set -# CONFIG_ATH79_MACH_AP143 is not set -# CONFIG_ATH79_MACH_AP147 is not set -# CONFIG_ATH79_MACH_AP152 is not set -# CONFIG_ATH79_MACH_AP531B0 is not set -# CONFIG_ATH79_MACH_AP81 is not set -# CONFIG_ATH79_MACH_AP90Q is not set -# CONFIG_ATH79_MACH_AP91_5G is not set -# CONFIG_ATH79_MACH_AP96 is not set -# CONFIG_ATH79_MACH_ARCHER_C25_V1 is not set -# CONFIG_ATH79_MACH_ARCHER_C58_V1 is not set -# CONFIG_ATH79_MACH_ARCHER_C59_V1 is not set -# CONFIG_ATH79_MACH_ARCHER_C60_V1 is not set -# CONFIG_ATH79_MACH_ARCHER_C7 is not set -# CONFIG_ATH79_MACH_ARDUINO_YUN is not set -# CONFIG_ATH79_MACH_AW_NR580 is not set -# CONFIG_ATH79_MACH_BHR_4GRV2 is not set -# CONFIG_ATH79_MACH_BHU_BXU2000N2_A is not set -# CONFIG_ATH79_MACH_BSB is not set -# CONFIG_ATH79_MACH_C55 is not set -# CONFIG_ATH79_MACH_C60 is not set -# CONFIG_ATH79_MACH_CAP324 is not set -# CONFIG_ATH79_MACH_CAP4200AG is not set -# CONFIG_ATH79_MACH_CARAMBOLA2 is not set -# CONFIG_ATH79_MACH_CF_E316N_V2 is not set -# CONFIG_ATH79_MACH_CF_E320N_V2 is not set -# CONFIG_ATH79_MACH_CF_E355AC is not set -# CONFIG_ATH79_MACH_CF_E380AC_V1 is not set -# CONFIG_ATH79_MACH_CF_E380AC_V2 is not set -# CONFIG_ATH79_MACH_CF_E520N is not set -# CONFIG_ATH79_MACH_CF_E530N is not set -# CONFIG_ATH79_MACH_CPE505N is not set -# CONFIG_ATH79_MACH_CPE510 is not set -# CONFIG_ATH79_MACH_CPE830 is not set -# CONFIG_ATH79_MACH_CPE870 is not set -# CONFIG_ATH79_MACH_CR3000 is not set -# CONFIG_ATH79_MACH_CR5000 is not set -# CONFIG_ATH79_MACH_DAP_2695_A1 is not set -# CONFIG_ATH79_MACH_DB120 is not set -# CONFIG_ATH79_MACH_DGL_5500_A1 is not set -# CONFIG_ATH79_MACH_DHP_1565_A1 is not set -# CONFIG_ATH79_MACH_DIR_505_A1 is not set -# CONFIG_ATH79_MACH_DIR_600_A1 is not set -# CONFIG_ATH79_MACH_DIR_615_C1 is not set -# CONFIG_ATH79_MACH_DIR_615_I1 is not set -# CONFIG_ATH79_MACH_DIR_825_B1 is not set -# CONFIG_ATH79_MACH_DIR_825_C1 is not set -# CONFIG_ATH79_MACH_DIR_869_A1 is not set -# CONFIG_ATH79_MACH_DLAN_HOTSPOT is not set -# CONFIG_ATH79_MACH_DLAN_PRO_1200_AC is not set -# CONFIG_ATH79_MACH_DLAN_PRO_500_WP is not set -# CONFIG_ATH79_MACH_DOMYWIFI_DW33D is not set -# CONFIG_ATH79_MACH_DR342 is not set -# CONFIG_ATH79_MACH_DR344 is not set -# CONFIG_ATH79_MACH_DR531 is not set -# CONFIG_ATH79_MACH_DRAGINO2 is not set -# CONFIG_ATH79_MACH_E2100L is not set -# CONFIG_ATH79_MACH_EAP120 is not set -# CONFIG_ATH79_MACH_EAP300V2 is not set -# CONFIG_ATH79_MACH_EAP7660D is not set -# CONFIG_ATH79_MACH_EL_M150 is not set -# CONFIG_ATH79_MACH_EL_MINI is not set -# CONFIG_ATH79_MACH_ENS202EXT is not set -# CONFIG_ATH79_MACH_EPG5000 is not set -# CONFIG_ATH79_MACH_ESR1750 is not set -# CONFIG_ATH79_MACH_ESR900 is not set -# CONFIG_ATH79_MACH_EW_DORIN is not set -# CONFIG_ATH79_MACH_F9K1115V2 is not set -# CONFIG_ATH79_MACH_FRITZ300E is not set -# CONFIG_ATH79_MACH_GL_AR150 is not set -# CONFIG_ATH79_MACH_GL_AR300 is not set -# CONFIG_ATH79_MACH_GL_AR300M is not set -# CONFIG_ATH79_MACH_GL_AR750 is not set -# CONFIG_ATH79_MACH_GL_DOMINO is not set -# CONFIG_ATH79_MACH_GL_INET is not set -# CONFIG_ATH79_MACH_GL_MIFI is not set -# CONFIG_ATH79_MACH_GL_USB150 is not set -# CONFIG_ATH79_MACH_GS_MINIBOX_V1 is not set -# CONFIG_ATH79_MACH_GS_OOLITE is not set -# CONFIG_ATH79_MACH_HIVEAP_121 is not set -# CONFIG_ATH79_MACH_HIWIFI_HC6361 is not set -# CONFIG_ATH79_MACH_HORNET_UB is not set -# CONFIG_ATH79_MACH_JA76PF is not set -# CONFIG_ATH79_MACH_JWAP003 is not set -# CONFIG_ATH79_MACH_JWAP230 is not set -# CONFIG_ATH79_MACH_LIMA is not set -# CONFIG_ATH79_MACH_MC_MAC1200R is not set -# CONFIG_ATH79_MACH_MR12 is not set -# CONFIG_ATH79_MACH_MR16 is not set -# CONFIG_ATH79_MACH_MR1750 is not set -# CONFIG_ATH79_MACH_MR18 is not set -# CONFIG_ATH79_MACH_MR600 is not set -# CONFIG_ATH79_MACH_MR900 is not set -# CONFIG_ATH79_MACH_MYNET_N600 is not set -# CONFIG_ATH79_MACH_MYNET_N750 is not set -# CONFIG_ATH79_MACH_MYNET_REXT is not set -# CONFIG_ATH79_MACH_MZK_W04NU is not set -# CONFIG_ATH79_MACH_MZK_W300NH is not set -# CONFIG_ATH79_MACH_N5Q is not set -# CONFIG_ATH79_MACH_NBG460N is not set -# CONFIG_ATH79_MACH_NBG6716 is not set -# CONFIG_ATH79_MACH_OM2P is not set -# CONFIG_ATH79_MACH_OM5P is not set -# CONFIG_ATH79_MACH_OM5P_AC is not set -# CONFIG_ATH79_MACH_OM5P_ACv2 is not set -# CONFIG_ATH79_MACH_OMY_G1 is not set -# CONFIG_ATH79_MACH_OMY_X1 is not set -# CONFIG_ATH79_MACH_ONION_OMEGA is not set -# CONFIG_ATH79_MACH_PB42 is not set -# CONFIG_ATH79_MACH_PB44 is not set -# CONFIG_ATH79_MACH_PQI_AIR_PEN is not set -# CONFIG_ATH79_MACH_QIHOO_C301 is not set -# CONFIG_ATH79_MACH_R36A is not set -# CONFIG_ATH79_MACH_R602N is not set -# CONFIG_ATH79_MACH_R6100 is not set -# CONFIG_ATH79_MACH_RAMBUTAN is not set -# CONFIG_ATH79_MACH_RB2011 is not set -# CONFIG_ATH79_MACH_RB4XX is not set -# CONFIG_ATH79_MACH_RB750 is not set -# CONFIG_ATH79_MACH_RB91X is not set -# CONFIG_ATH79_MACH_RB922 is not set -# CONFIG_ATH79_MACH_RB95X is not set -# CONFIG_ATH79_MACH_RBSPI is not set -# CONFIG_ATH79_MACH_RBSXTLITE is not set -# CONFIG_ATH79_MACH_RE450 is not set -# CONFIG_ATH79_MACH_RUT9XX is not set -# CONFIG_ATH79_MACH_RW2458N is not set -# CONFIG_ATH79_MACH_SC1750 is not set -# CONFIG_ATH79_MACH_SC300M is not set -# CONFIG_ATH79_MACH_SC450 is not set -# CONFIG_ATH79_MACH_SMART_300 is not set -# CONFIG_ATH79_MACH_SOM9331 is not set -# CONFIG_ATH79_MACH_SR3200 is not set -# CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE is not set -# CONFIG_ATH79_MACH_TEW_632BRP is not set -# CONFIG_ATH79_MACH_TEW_673GRU is not set -# CONFIG_ATH79_MACH_TEW_712BR is not set -# CONFIG_ATH79_MACH_TEW_732BR is not set -# CONFIG_ATH79_MACH_TEW_823DRU is not set -# CONFIG_ATH79_MACH_TL_MR11U is not set -# CONFIG_ATH79_MACH_TL_MR13U is not set -# CONFIG_ATH79_MACH_TL_MR3020 is not set -# CONFIG_ATH79_MACH_TL_MR3X20 is not set -# CONFIG_ATH79_MACH_TL_MR6400 is not set -# CONFIG_ATH79_MACH_TL_WA701ND_V2 is not set -# CONFIG_ATH79_MACH_TL_WA7210N_V2 is not set -# CONFIG_ATH79_MACH_TL_WA801ND_V3 is not set -# CONFIG_ATH79_MACH_TL_WA830RE_V2 is not set -# CONFIG_ATH79_MACH_TL_WA850RE_V2 is not set -# CONFIG_ATH79_MACH_TL_WA855RE_V1 is not set -# CONFIG_ATH79_MACH_TL_WA901ND is not set -# CONFIG_ATH79_MACH_TL_WA901ND_V2 is not set -# CONFIG_ATH79_MACH_TL_WA901ND_V4 is not set -# CONFIG_ATH79_MACH_TL_WAX50RE is not set -# CONFIG_ATH79_MACH_TL_WDR3320_V2 is not set -# CONFIG_ATH79_MACH_TL_WDR3500 is not set -# CONFIG_ATH79_MACH_TL_WDR4300 is not set -# CONFIG_ATH79_MACH_TL_WDR6500_V2 is not set -# CONFIG_ATH79_MACH_TL_WPA8630 is not set -# CONFIG_ATH79_MACH_TL_WR1041N_V2 is not set -# CONFIG_ATH79_MACH_TL_WR1043ND is not set -# CONFIG_ATH79_MACH_TL_WR1043ND_V2 is not set -# CONFIG_ATH79_MACH_TL_WR1043ND_V4 is not set -# CONFIG_ATH79_MACH_TL_WR1043N_V5 is not set -# CONFIG_ATH79_MACH_TL_WR2543N is not set -# CONFIG_ATH79_MACH_TL_WR703N is not set -# CONFIG_ATH79_MACH_TL_WR720N_V3 is not set -# CONFIG_ATH79_MACH_TL_WR741ND is not set -# CONFIG_ATH79_MACH_TL_WR741ND_V4 is not set -# CONFIG_ATH79_MACH_TL_WR802N_V1 is not set -# CONFIG_ATH79_MACH_TL_WR802N_V2 is not set -# CONFIG_ATH79_MACH_TL_WR810N is not set -# CONFIG_ATH79_MACH_TL_WR810N_V2 is not set -# CONFIG_ATH79_MACH_TL_WR840N_V2 is not set -# CONFIG_ATH79_MACH_TL_WR841N_V1 is not set -# CONFIG_ATH79_MACH_TL_WR841N_V8 is not set -# CONFIG_ATH79_MACH_TL_WR841N_V9 is not set -# CONFIG_ATH79_MACH_TL_WR902AC_V1 is not set -# CONFIG_ATH79_MACH_TL_WR940N_V4 is not set -# CONFIG_ATH79_MACH_TL_WR941ND is not set -# CONFIG_ATH79_MACH_TL_WR941ND_V6 is not set -# CONFIG_ATH79_MACH_TL_WR942N_V1 is not set -# CONFIG_ATH79_MACH_TUBE2H is not set -# CONFIG_ATH79_MACH_UBNT is not set -# CONFIG_ATH79_MACH_UBNT_UNIFIAC is not set -# CONFIG_ATH79_MACH_UBNT_XM is not set -# CONFIG_ATH79_MACH_WEIO is not set -# CONFIG_ATH79_MACH_WHR_HP_G300N is not set -# CONFIG_ATH79_MACH_WI2A_AC200I is not set -# CONFIG_ATH79_MACH_WLAE_AG300N is not set -# CONFIG_ATH79_MACH_WLR8100 is not set -# CONFIG_ATH79_MACH_WNDAP360 is not set -# CONFIG_ATH79_MACH_WNDR3700 is not set -# CONFIG_ATH79_MACH_WNDR4300 is not set -# CONFIG_ATH79_MACH_WNR2000 is not set -# CONFIG_ATH79_MACH_WNR2000_V3 is not set -# CONFIG_ATH79_MACH_WNR2000_V4 is not set -# CONFIG_ATH79_MACH_WNR2200 is not set -# CONFIG_ATH79_MACH_WP543 is not set -# CONFIG_ATH79_MACH_WPE72 is not set -# CONFIG_ATH79_MACH_WPJ342 is not set -# CONFIG_ATH79_MACH_WPJ344 is not set -# CONFIG_ATH79_MACH_WPJ531 is not set -# CONFIG_ATH79_MACH_WPJ558 is not set -# CONFIG_ATH79_MACH_WPJ563 is not set -# CONFIG_ATH79_MACH_WRT160NL is not set -# CONFIG_ATH79_MACH_WRT400N is not set -# CONFIG_ATH79_MACH_WRTNODE2Q is not set -# CONFIG_ATH79_MACH_WZR_450HP2 is not set -# CONFIG_ATH79_MACH_WZR_HP_AG300H is not set -# CONFIG_ATH79_MACH_WZR_HP_G300NH is not set -# CONFIG_ATH79_MACH_WZR_HP_G300NH2 is not set -# CONFIG_ATH79_MACH_WZR_HP_G450H is not set -# CONFIG_ATH79_MACH_XD3200 is not set -# CONFIG_ATH79_MACH_Z1 is not set -# CONFIG_ATH79_MACH_ZBT_WE1526 is not set -# CONFIG_ATH79_MACH_ZCN_1523H is not set -# CONFIG_ATH79_NVRAM is not set -# CONFIG_ATH79_PCI_ATH9K_FIXUP is not set -# CONFIG_ATH79_ROUTERBOOT is not set -CONFIG_ATH79_WDT=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CEVT_R4K=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs noinitrd" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -CONFIG_COMMON_CLK=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPSR2=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_R4K_FPU=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CPU_SUPPORTS_MSA=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_74X164=y -CONFIG_GPIO_DEVRES=y -# CONFIG_GPIO_LATCH is not set -CONFIG_GPIO_NXP_74HC153=y -CONFIG_GPIO_PCF857X=y -CONFIG_GPIO_SYSFS=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -# CONFIG_HAVE_ARCH_BITREVERSE is not set -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_BPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_GPIO=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_ROOT_GID=0 -CONFIG_INITRAMFS_ROOT_UID=0 -CONFIG_INITRAMFS_SOURCE="../../root" -CONFIG_IP17XX_PHY=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -CONFIG_LANTIQ_PHY=y -CONFIG_LEDS_GPIO=y -CONFIG_LIBFDT=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BOARDINFO=y -CONFIG_MDIO_GPIO=y -CONFIG_MICREL_PHY=y -CONFIG_MIPS=y -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set -CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y -# CONFIG_MIPS_CMDLINE_FROM_DTB is not set -# CONFIG_MIPS_ELF_APPENDED_DTB is not set -# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_MIPS_MACHINE=y -CONFIG_MIPS_NO_APPENDED_DTB=y -# CONFIG_MIPS_RAW_APPENDED_DTB is not set -CONFIG_MIPS_SPRAM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I2 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_CYBERTAN_PARTS=y -CONFIG_MTD_M25P80=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set -CONFIG_MTD_MYLOADER_PARTS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2 -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_EVA_FW=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_SPLIT_LZMA_FW=y -CONFIG_MTD_SPLIT_MINOR_FW=y -CONFIG_MTD_SPLIT_SEAMA_FW=y -CONFIG_MTD_SPLIT_TPLINK_FW=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_SPLIT_WRGG_FW=y -CONFIG_MTD_TPLINK_PARTS=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6060=y -CONFIG_NET_DSA_MV88E6063=y -CONFIG_NET_DSA_TAG_TRAILER=y -CONFIG_NET_SWITCHDEV=y -# CONFIG_NO_IOPORT_MAP is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_MDIO=y -CONFIG_OF_MTD=y -CONFIG_OF_NET=y -# CONFIG_PCI_AR724X is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_RATIONAL=y -# CONFIG_RCU_STALL_COMMON is not set -CONFIG_RTL8306_PHY=y -CONFIG_RTL8366RB_PHY=y -CONFIG_RTL8366S_PHY=y -CONFIG_RTL8366_SMI=y -CONFIG_RTL8367_PHY=y -# CONFIG_SCHED_INFO is not set -# CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250_FSL is not set -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -# CONFIG_SOC_AR71XX is not set -# CONFIG_SOC_AR724X is not set -# CONFIG_SOC_AR913X is not set -# CONFIG_SOC_AR933X is not set -# CONFIG_SOC_AR934X is not set -# CONFIG_SOC_QCA953X is not set -# CONFIG_SOC_QCA955X is not set -# CONFIG_SOC_QCA956X is not set -CONFIG_SPI=y -CONFIG_SPI_ATH79=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_MASTER=y -# CONFIG_SPI_RB4XX is not set -# CONFIG_SPI_VSC7385 is not set -CONFIG_SRCU=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R2=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_MIPS16=y -CONFIG_SYS_SUPPORTS_ZBOOT=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/ar71xx/config-4.9 b/target/linux/ar71xx/config-4.9 index 0e224ae1c..5cea1b7bd 100644 --- a/target/linux/ar71xx/config-4.9 +++ b/target/linux/ar71xx/config-4.9 @@ -53,6 +53,7 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_ARCHER_C58_V1 is not set # CONFIG_ATH79_MACH_ARCHER_C59_V1 is not set # CONFIG_ATH79_MACH_ARCHER_C60_V1 is not set +# CONFIG_ATH79_MACH_ARCHER_C60_V2 is not set # CONFIG_ATH79_MACH_ARCHER_C7 is not set # CONFIG_ATH79_MACH_ARDUINO_YUN is not set # CONFIG_ATH79_MACH_AW_NR580 is not set @@ -67,6 +68,7 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_CF_E316N_V2 is not set # CONFIG_ATH79_MACH_CF_E320N_V2 is not set # CONFIG_ATH79_MACH_CF_E355AC is not set +# CONFIG_ATH79_MACH_CF_E375AC is not set # CONFIG_ATH79_MACH_CF_E380AC_V1 is not set # CONFIG_ATH79_MACH_CF_E380AC_V2 is not set # CONFIG_ATH79_MACH_CF_E520N is not set @@ -77,6 +79,7 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_CPE870 is not set # CONFIG_ATH79_MACH_CR3000 is not set # CONFIG_ATH79_MACH_CR5000 is not set +# CONFIG_ATH79_MACH_DAP_1330_A1 is not set # CONFIG_ATH79_MACH_DAP_2695_A1 is not set # CONFIG_ATH79_MACH_DB120 is not set # CONFIG_ATH79_MACH_DGL_5500_A1 is not set @@ -96,7 +99,9 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_DR344 is not set # CONFIG_ATH79_MACH_DR531 is not set # CONFIG_ATH79_MACH_DRAGINO2 is not set +# CONFIG_ATH79_MACH_E1700AC_V2 is not set # CONFIG_ATH79_MACH_E2100L is not set +# CONFIG_ATH79_MACH_E600G_V2 is not set # CONFIG_ATH79_MACH_EAP120 is not set # CONFIG_ATH79_MACH_EAP300V2 is not set # CONFIG_ATH79_MACH_EAP7660D is not set @@ -106,6 +111,7 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_EPG5000 is not set # CONFIG_ATH79_MACH_ESR1750 is not set # CONFIG_ATH79_MACH_ESR900 is not set +# CONFIG_ATH79_MACH_EW_BALIN is not set # CONFIG_ATH79_MACH_EW_DORIN is not set # CONFIG_ATH79_MACH_F9K1115V2 is not set # CONFIG_ATH79_MACH_FRITZ300E is not set @@ -117,14 +123,15 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_GL_INET is not set # CONFIG_ATH79_MACH_GL_MIFI is not set # CONFIG_ATH79_MACH_GL_USB150 is not set -# CONFIG_ATH79_MACH_GS_MINIBOX_V1 is not set -# CONFIG_ATH79_MACH_GS_OOLITE is not set +# CONFIG_ATH79_MACH_GS_OOLITE_V1 is not set +# CONFIG_ATH79_MACH_GS_OOLITE_V5_2 is not set # CONFIG_ATH79_MACH_HIVEAP_121 is not set # CONFIG_ATH79_MACH_HIWIFI_HC6361 is not set # CONFIG_ATH79_MACH_HORNET_UB is not set # CONFIG_ATH79_MACH_JA76PF is not set # CONFIG_ATH79_MACH_JWAP003 is not set # CONFIG_ATH79_MACH_JWAP230 is not set +# CONFIG_ATH79_MACH_LAN_TURTLE is not set # CONFIG_ATH79_MACH_LIMA is not set # CONFIG_ATH79_MACH_MC_MAC1200R is not set # CONFIG_ATH79_MACH_MR12 is not set @@ -164,7 +171,9 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_RB95X is not set # CONFIG_ATH79_MACH_RBSPI is not set # CONFIG_ATH79_MACH_RBSXTLITE is not set +# CONFIG_ATH79_MACH_RE355 is not set # CONFIG_ATH79_MACH_RE450 is not set +# CONFIG_ATH79_MACH_RME_EG200 is not set # CONFIG_ATH79_MACH_RUT9XX is not set # CONFIG_ATH79_MACH_RW2458N is not set # CONFIG_ATH79_MACH_SC1750 is not set @@ -173,6 +182,7 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_SMART_300 is not set # CONFIG_ATH79_MACH_SOM9331 is not set # CONFIG_ATH79_MACH_SR3200 is not set +# CONFIG_ATH79_MACH_T830 is not set # CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE is not set # CONFIG_ATH79_MACH_TEW_632BRP is not set # CONFIG_ATH79_MACH_TEW_673GRU is not set @@ -226,9 +236,11 @@ CONFIG_ATH79=y # CONFIG_ATH79_MACH_UBNT is not set # CONFIG_ATH79_MACH_UBNT_UNIFIAC is not set # CONFIG_ATH79_MACH_UBNT_XM is not set +# CONFIG_ATH79_MACH_WAM250 is not set # CONFIG_ATH79_MACH_WEIO is not set # CONFIG_ATH79_MACH_WHR_HP_G300N is not set # CONFIG_ATH79_MACH_WI2A_AC200I is not set +# CONFIG_ATH79_MACH_WIFI_PINEAPPLE_NANO is not set # CONFIG_ATH79_MACH_WLAE_AG300N is not set # CONFIG_ATH79_MACH_WLR8100 is not set # CONFIG_ATH79_MACH_WNDAP360 is not set diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt index 3ca77550b..4a032f602 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt +++ b/target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt @@ -217,7 +217,7 @@ config ATH79_MACH_AP531B0 select ATH79_DEV_WMAC config ATH79_MACH_AP90Q - bool "YunCore AP90Q support" + bool "YunCore AP80Q/AP90Q support" select SOC_QCA953X select ATH79_DEV_ETH select ATH79_DEV_GPIO_BUTTONS @@ -451,7 +451,7 @@ config ATH79_MACH_WPE72 config ATH79_MACH_WPJ342 bool "Compex WPJ342 board support" - select SOC_AS934X + select SOC_AR934X select ATH79_DEV_ETH select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO @@ -461,7 +461,7 @@ config ATH79_MACH_WPJ342 config ATH79_MACH_WPJ344 bool "Compex WPJ344 board support" - select SOC_AS934X + select SOC_AR934X select ATH79_DEV_ETH select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO @@ -689,6 +689,17 @@ config ATH79_MACH_DRAGINO2 select ATH79_DEV_ETH select ATH79_DEV_USB +config ATH79_MACH_E1700AC_V2 + bool "Qxwlan E1700AC v2 support" + select SOC_QCA956X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_E2100L bool "Linksys E2100L board support" select SOC_AR913X @@ -700,6 +711,17 @@ config ATH79_MACH_E2100L select ATH79_DEV_WMAC select ATH79_NVRAM +config ATH79_MACH_E600G_V2 + bool "Qxwlan E600G/E600GAC v2 support" + select SOC_QCA953X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_ESR900 bool "EnGenius ESR900 board support" select SOC_QCA955X @@ -711,6 +733,17 @@ config ATH79_MACH_ESR900 select ATH79_DEV_WMAC select ATH79_NVRAM +config ATH79_MACH_EW_BALIN + bool "embedded wireless Balin Platform support" + select SOC_AR934X + select ATH79_DEV_M25P80 + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_WMAC + select ATH79_DEV_ETH + select ATH79_DEV_USB + select ATH79_DEV_AP9X_PCI if PCI + config ATH79_MACH_EW_DORIN bool "embedded wireless Dorin Platform support" select SOC_AR933X @@ -847,8 +880,8 @@ config ATH79_MACH_EAP300V2 select ATH79_DEV_M25P80 select ATH79_DEV_WMAC -config ATH79_MACH_GS_MINIBOX_V1 - bool "Gainstrong MiniBox V1.0 support" +config ATH79_MACH_GS_OOLITE_V1 + bool "GainStrong Oolite/Minibox V1.0 support" select SOC_AR933X select ARH79_DEV_ETH select ARH79_DEV_GPIO_BUTTONS @@ -857,11 +890,12 @@ config ATH79_MACH_GS_MINIBOX_V1 select ATH79_DEV_USB select ATH79_DEV_WMAC -config ATH79_MACH_GS_OOLITE - bool "GS Oolite V1 support" - select SOC_AR933X - select ARH79_DEV_ETH - select ARH79_DEV_GPIO_BUTTONS +config ATH79_MACH_GS_OOLITE_V5_2 + bool "GainStrong Oolite V5.2 support" + select SOC_QCA953X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS select ATH79_DEV_LEDS_GPIO select ATH79_DEV_M25P80 select ATH79_DEV_USB @@ -915,6 +949,26 @@ config ATH79_MACH_JWAP230 select ATH79_DEV_USB select ATH79_DEV_WMAC +config ATH79_MACH_WAM250 + bool "Samsung WAM250 support" + select SOC_AR934X + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + +config ATH79_MACH_WIFI_PINEAPPLE_NANO + bool "Hak5 WiFi Pineapple NANO support" + select SOC_AR933X + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_WRT160NL bool "Linksys WRT160NL board support" select SOC_AR913X @@ -1054,6 +1108,8 @@ config ATH79_MACH_RBSPI select ATH79_ROUTERBOOT help Say 'Y' here if you want your kernel to support the + MikroTik ROuterBOARD 911-2Hn (911 Lite2) + MikroTik ROuterBOARD 911-5Hn (911 Lite5) MikroTik RouterBOARD mAP MikroTik RouterBOARD mAP lite MikroTik RouterBOARD hAP lite @@ -1084,6 +1140,16 @@ config ATH79_MACH_SMART_300 select ATH79_DEV_M25P80 select ATH79_DEV_WMAC +config ATH79_MACH_T830 + bool "YunCore T830 support" + select SOC_QCA953X + select ARH79_DEV_ETH + select ARH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_TELLSTICK_ZNET_LITE bool "TellStick ZNet Lite" select SOC_AR933X @@ -1142,7 +1208,7 @@ config ATH79_MACH_WNR2000_V3 select ATH79_DEV_LEDS_GPIO select ATH79_DEV_M25P80 - config ATH79_MACH_WNR2200 +config ATH79_MACH_WNR2200 bool "NETGEAR WNR2200 board support" select SOC_AR724X select ATH79_DEV_AP9X_PCI if PCI @@ -1292,6 +1358,16 @@ config ATH79_MACH_MZK_W300NH select ATH79_DEV_M25P80 select ATH79_DEV_WMAC +config ATH79_MACH_RE355 + bool "TP-LINK RE355 board support" + select SOC_QCA955X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + config ATH79_MACH_RE450 bool "TP-LINK RE450 board support" select SOC_QCA955X @@ -1302,6 +1378,16 @@ config ATH79_MACH_RE450 select ATH79_DEV_M25P80 select ATH79_DEV_WMAC +config ATH79_MACH_RME_EG200 + bool "eTactica EG200 board supprt" + select SOC_AR933X + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + config ATH79_MACH_RUT9XX bool "Teltonika RUT900 series support" select SOC_AR934X @@ -1443,6 +1529,16 @@ config ATH79_MACH_ARCHER_C60_V1 select ATH79_DEV_M25P80 select ATH79_DEV_WMAC +config ATH79_MACH_ARCHER_C60_V2 + bool "TP-LINK Archer C60 v2 support" + select SOC_QCA956X + select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + config ATH79_MACH_ARCHER_C7 bool "TP-LINK Archer C5/C7/TL-WDR4900 v2 board support" select SOC_QCA955X @@ -2079,6 +2175,15 @@ config ATH79_MACH_CARAMBOLA2 select ATH79_DEV_USB select ATH79_DEV_WMAC +config ATH79_MACH_LAN_TURTLE + bool "Hak5 LAN Turtle and Packet Squirrel support" + select SOC_AR933X + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + config ATH79_MACH_LIMA bool "8devices Lima board" select SOC_QCA953X @@ -2121,11 +2226,25 @@ config ATH79_MACH_CF_E320N_V2 select ATH79_DEV_WMAC config ATH79_MACH_CF_E355AC - bool "COMFAST CF-E355AC support" + bool "COMFAST CF-E355AC v1/v2 support" select SOC_QCA953X + select ATH79_DEV_AP9X_PCI if PCI select ATH79_DEV_ETH select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB + select ATH79_DEV_WMAC + +config ATH79_MACH_CF_E375AC + bool "COMFAST CF-E375AC support" + select SOC_QCA956X select ATH79_DEV_AP9X_PCI if PCI + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_USB select ATH79_DEV_WMAC config ATH79_MACH_CF_E380AC_V1 @@ -2191,6 +2310,15 @@ config ATH79_MACH_QIHOO_C301 select ATH79_DEV_USB select ATH79_NVRAM +config ATH79_MACH_DAP_1330_A1 + bool "D-Link DAP-1330 rev. A1 support" + select SOC_QCA953X + select ATH79_DEV_ETH + select ATH79_DEV_GPIO_BUTTONS + select ATH79_DEV_LEDS_GPIO + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + config ATH79_MACH_DAP_2695_A1 bool "D-Link DAP-2695 rev. A1 support" select SOC_QCA955X diff --git a/target/linux/ar71xx/files/arch/mips/ath79/Makefile b/target/linux/ar71xx/files/arch/mips/ath79/Makefile index e9f4d9852..e606e2c3d 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/Makefile +++ b/target/linux/ar71xx/files/arch/mips/ath79/Makefile @@ -63,6 +63,7 @@ obj-$(CONFIG_ATH79_MACH_ARCHER_C25_V1) += mach-archer-c25-v1.o obj-$(CONFIG_ATH79_MACH_ARCHER_C58_V1) += mach-archer-c59-v1.o obj-$(CONFIG_ATH79_MACH_ARCHER_C59_V1) += mach-archer-c59-v1.o obj-$(CONFIG_ATH79_MACH_ARCHER_C60_V1) += mach-archer-c60-v1.o +obj-$(CONFIG_ATH79_MACH_ARCHER_C60_V2) += mach-archer-c60-v1.o obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7.o obj-$(CONFIG_ATH79_MACH_ARCHER_C7) += mach-archer-c7-v4.o obj-$(CONFIG_ATH79_MACH_ARDUINO_YUN) += mach-arduino-yun.o @@ -78,6 +79,7 @@ obj-$(CONFIG_ATH79_MACH_CARAMBOLA2) += mach-carambola2.o obj-$(CONFIG_ATH79_MACH_CF_E316N_V2) += mach-cf-e316n-v2.o obj-$(CONFIG_ATH79_MACH_CF_E320N_V2) += mach-cf-e316n-v2.o obj-$(CONFIG_ATH79_MACH_CF_E355AC) += mach-cf-e316n-v2.o +obj-$(CONFIG_ATH79_MACH_CF_E375AC) += mach-cf-e316n-v2.o obj-$(CONFIG_ATH79_MACH_CF_E380AC_V1) += mach-cf-e316n-v2.o obj-$(CONFIG_ATH79_MACH_CF_E380AC_V2) += mach-cf-e316n-v2.o obj-$(CONFIG_ATH79_MACH_CF_E520N) += mach-cf-e316n-v2.o @@ -88,6 +90,7 @@ obj-$(CONFIG_ATH79_MACH_CPE830) += mach-ap90q.o obj-$(CONFIG_ATH79_MACH_CPE870) += mach-cpe870.o obj-$(CONFIG_ATH79_MACH_CR3000) += mach-cr3000.o obj-$(CONFIG_ATH79_MACH_CR5000) += mach-cr5000.o +obj-$(CONFIG_ATH79_MACH_DAP_1330_A1) += mach-dap-1330-a1.o obj-$(CONFIG_ATH79_MACH_DAP_2695_A1) += mach-dap-2695-a1.o obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o obj-$(CONFIG_ATH79_MACH_DGL_5500_A1) += mach-dgl-5500-a1.o @@ -107,6 +110,8 @@ obj-$(CONFIG_ATH79_MACH_DR342) += mach-dr344.o obj-$(CONFIG_ATH79_MACH_DR344) += mach-dr344.o obj-$(CONFIG_ATH79_MACH_DR531) += mach-dr531.o obj-$(CONFIG_ATH79_MACH_DRAGINO2) += mach-dragino2.o +obj-$(CONFIG_ATH79_MACH_E1700AC_V2) += mach-e1700ac-v2.o +obj-$(CONFIG_ATH79_MACH_E600G_V2) += mach-e600g-v2.o obj-$(CONFIG_ATH79_MACH_EAP120) += mach-eap120.o obj-$(CONFIG_ATH79_MACH_EAP300V2) += mach-eap300v2.o obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o @@ -116,6 +121,7 @@ obj-$(CONFIG_ATH79_MACH_ENS202EXT) += mach-ens202ext.o obj-$(CONFIG_ATH79_MACH_EPG5000) += mach-epg5000.o obj-$(CONFIG_ATH79_MACH_ESR1750) += mach-esr1750.o obj-$(CONFIG_ATH79_MACH_ESR900) += mach-esr900.o +obj-$(CONFIG_ATH79_MACH_EW_BALIN) += mach-ew-balin.o obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o obj-$(CONFIG_ATH79_MACH_F9K1115V2) += mach-f9k1115v2.o obj-$(CONFIG_ATH79_MACH_FRITZ300E) += mach-fritz300e.o @@ -127,14 +133,15 @@ obj-$(CONFIG_ATH79_MACH_GL_DOMINO) += mach-gl-domino.o obj-$(CONFIG_ATH79_MACH_GL_INET) += mach-gl-inet.o obj-$(CONFIG_ATH79_MACH_GL_MIFI) += mach-gl-mifi.o obj-$(CONFIG_ATH79_MACH_GL_USB150) += mach-gl-usb150.o -obj-$(CONFIG_ATH79_MACH_GS_MINIBOX_V1) += mach-gs-minibox-v1.o -obj-$(CONFIG_ATH79_MACH_GS_OOLITE) += mach-gs-oolite.o +obj-$(CONFIG_ATH79_MACH_GS_OOLITE_V1) += mach-gs-oolite-v1.o +obj-$(CONFIG_ATH79_MACH_GS_OOLITE_V5_2) += mach-gs-oolite-v5-2.o obj-$(CONFIG_ATH79_MACH_HIVEAP_121) += mach-hiveap-121.o obj-$(CONFIG_ATH79_MACH_HIWIFI_HC6361) += mach-hiwifi-hc6361.o obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o obj-$(CONFIG_ATH79_MACH_JWAP230) += mach-jwap230.o +obj-$(CONFIG_ATH79_MACH_LAN_TURTLE) += mach-lan-turtle.o obj-$(CONFIG_ATH79_MACH_LIMA) += mach-lima.o obj-$(CONFIG_ATH79_MACH_MC_MAC1200R) += mach-mc-mac1200r.o obj-$(CONFIG_ATH79_MACH_MR12) += mach-mr12.o @@ -175,7 +182,9 @@ obj-$(CONFIG_ATH79_MACH_RB941) += mach-rb941.o obj-$(CONFIG_ATH79_MACH_RB95X) += mach-rb95x.o obj-$(CONFIG_ATH79_MACH_RBSPI) += mach-rbspi.o obj-$(CONFIG_ATH79_MACH_RBSXTLITE) += mach-rbsxtlite.o +obj-$(CONFIG_ATH79_MACH_RE355) += mach-re450.o obj-$(CONFIG_ATH79_MACH_RE450) += mach-re450.o +obj-$(CONFIG_ATH79_MACH_RME_EG200) += mach-rme-eg200.o obj-$(CONFIG_ATH79_MACH_RUT9XX) += mach-rut9xx.o obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o obj-$(CONFIG_ATH79_MACH_SC1750) += mach-sc1750.o @@ -184,6 +193,7 @@ obj-$(CONFIG_ATH79_MACH_SC450) += mach-sc450.o obj-$(CONFIG_ATH79_MACH_SMART_300) += mach-smart-300.o obj-$(CONFIG_ATH79_MACH_SOM9331) += mach-som9331.o obj-$(CONFIG_ATH79_MACH_SR3200) += mach-sr3200.o +obj-$(CONFIG_ATH79_MACH_T830) += mach-t830.o obj-$(CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE) += mach-tellstick-znet-lite.o obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o @@ -236,8 +246,10 @@ obj-$(CONFIG_ATH79_MACH_TUBE2H) += mach-tube2h.o obj-$(CONFIG_ATH79_MACH_UBNT) += mach-ubnt.o obj-$(CONFIG_ATH79_MACH_UBNT_UNIFIAC) += mach-ubnt-unifiac.o obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o +obj-$(CONFIG_ATH79_MACH_WAM250) += mach-wam250.o obj-$(CONFIG_ATH79_MACH_WEIO) += mach-weio.o obj-$(CONFIG_ATH79_MACH_WHR_HP_G300N) += mach-whr-hp-g300n.o +obj-$(CONFIG_ATH79_MACH_WIFI_PINEAPPLE_NANO) += mach-wifi-pineapple-nano.o obj-$(CONFIG_ATH79_MACH_WLAE_AG300N) += mach-wlae-ag300n.o obj-$(CONFIG_ATH79_MACH_WLR8100) += mach-wlr8100.o obj-$(CONFIG_ATH79_MACH_WNDAP360) += mach-wndap360.o diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c index 427de6a50..9e72c41a4 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -900,13 +900,6 @@ void __init ath79_register_eth(unsigned int id) } pdata->has_gbit = 1; pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; break; case ATH79_SOC_AR7241: @@ -936,13 +929,6 @@ void __init ath79_register_eth(unsigned int id) pdata->is_ar724x = 1; if (ath79_soc == ATH79_SOC_AR7240) pdata->is_ar7240 = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; break; case ATH79_SOC_AR9132: @@ -979,13 +965,6 @@ void __init ath79_register_eth(unsigned int id) } pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; break; case ATH79_SOC_AR9341: @@ -1016,13 +995,6 @@ void __init ath79_register_eth(unsigned int id) pdata->max_frame_len = SZ_16K - 1; pdata->desc_pktlen_mask = SZ_16K - 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; break; case ATH79_SOC_TP9343: @@ -1048,13 +1020,6 @@ void __init ath79_register_eth(unsigned int id) pdata->has_gbit = 1; pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; break; case ATH79_SOC_QCA9556: @@ -1082,13 +1047,6 @@ void __init ath79_register_eth(unsigned int id) */ pdata->max_frame_len = SZ_4K - 1; pdata->desc_pktlen_mask = SZ_16K - 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; break; case ATH79_SOC_QCA956X: @@ -1121,13 +1079,6 @@ void __init ath79_register_eth(unsigned int id) pdata->has_gbit = 1; pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; break; default: diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c index 2e9d34d65..99fceca3a 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap90q.c @@ -1,6 +1,6 @@ /* * Support for YunCore boards: - * - AP90Q + * - AP80Q/AP90Q * - CPE830 * * Copyright (C) 2016 Piotr Dymacz @@ -172,7 +172,7 @@ static void __init ap90q_setup(void) ap90q_leds_gpio); } -MIPS_MACHINE(ATH79_MACH_AP90Q, "AP90Q", "YunCore AP90Q", ap90q_setup); +MIPS_MACHINE(ATH79_MACH_AP90Q, "AP90Q", "YunCore AP80Q/AP90Q", ap90q_setup); static void __init cpe830_setup(void) { diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c index 4d83fa737..88f4f081a 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c60-v1.c @@ -1,7 +1,7 @@ /* * TP-Link Archer C60 v1 board support * - * Copyright (C) 2016 Henryk Heisig + * Copyright (C) 2017 Henryk Heisig * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published @@ -83,6 +83,44 @@ static struct gpio_led archer_c60_v1_leds_gpio[] __initdata = { }, }; +static struct gpio_led archer_c60_v2_leds_gpio[] __initdata = { + { + .name = "archer-c60-v2:green:power", + .gpio = ARCHER_C60_V1_GPIO_LED_POWER, + .active_low = 1, + }, + { + .name = "archer-c60-v2:green:wlan2g", + .gpio = ARCHER_C60_V1_GPIO_LED_WLAN2, + .active_low = 1, + }, + { + .name = "archer-c60-v2:green:wlan5g", + .gpio = ARCHER_C60_V1_GPIO_LED_WLAN5, + .active_low = 1, + }, + { + .name = "archer-c60-v2:green:lan", + .gpio = ARCHER_C60_V1_GPIO_LED_LAN, + .active_low = 1, + }, + { + .name = "archer-c60-v2:green:wan", + .gpio = ARCHER_C60_V1_GPIO_LED_WAN_GREEN, + .active_low = 1, + }, + { + .name = "archer-c60-v2:amber:wan", + .gpio = ARCHER_C60_V1_GPIO_LED_WAN_AMBER, + .active_low = 1, + }, + { + .name = "archer-c60-v2:green:wps", + .gpio = ARCHER_C60_V1_GPIO_LED_WPS, + .active_low = 1, + }, +}; + static struct gpio_keys_button archer_c60_v1_gpio_keys[] __initdata = { { .desc = "Reset button", @@ -143,3 +181,45 @@ static void __init archer_c60_v1_setup(void) MIPS_MACHINE(ATH79_MACH_ARCHER_C60_V1, "ARCHER-C60-V1", "TP-LINK Archer C60 v1", archer_c60_v1_setup); + +static void __init archer_c60_v2_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fb08); + u8 *art = (u8 *) KSEG1ADDR(0x1f7f0000); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c60_v2_leds_gpio), + archer_c60_v2_leds_gpio); + + ath79_register_gpio_keys_polled(-1, ARCHER_C60_V1_KEYS_POLL_INTERVAL, + ARRAY_SIZE(archer_c60_v1_gpio_keys), + archer_c60_v1_gpio_keys); + + ath79_register_mdio(0, 0x0); + ath79_register_mdio(1, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + + /* WAN port */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(4); + ath79_register_eth(0); + + /* LAN ports */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_switch_data.phy_poll_mask |= BIT(4); + ath79_switch_data.phy4_mii_en = 1; + ath79_register_eth(1); + + ath79_register_wmac(art + ARCHER_C60_V1_WMAC_CALDATA_OFFSET, mac); + ap91_pci_init(art + ARCHER_C60_V1_PCI_CALDATA_OFFSET, NULL); +} + +MIPS_MACHINE(ATH79_MACH_ARCHER_C60_V2, "ARCHER-C60-V2", + "TP-LINK Archer C60 v2", archer_c60_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cf-e316n-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cf-e316n-v2.c index 82fe83f01..587e66d22 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-cf-e316n-v2.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-cf-e316n-v2.c @@ -2,8 +2,11 @@ * Support for COMFAST boards: * - CF-E316N v2 (AR9341) * - CF-E320N v2 (QCA9531) - * - CF-E355AC (QCA9531) + * - CF-E355AC v1 (QCA9531 + QCA9882) + * - CF-E355AC v2 (QCA9531 + QCA9886) + * - CF-E375AC (QCA9563 + QCA9886 + QCA8337) * - CF-E380AC v1/v2 (QCA9558) + * - CF-E385AC (QCA9558 + QCA9984 + QCA8337) * - CF-E520N/CF-E530N (QCA9531) * * Copyright (C) 2016 Piotr Dymacz @@ -16,6 +19,7 @@ */ #include +#include #include #include #include @@ -32,6 +36,7 @@ #include "dev-wmac.h" #include "dev-usb.h" #include "machtypes.h" +#include "pci.h" #define CF_EXXXN_KEYS_POLL_INTERVAL 20 #define CF_EXXXN_KEYS_DEBOUNCE_INTERVAL (3 * CF_EXXXN_KEYS_POLL_INTERVAL) @@ -131,7 +136,7 @@ static struct gpio_keys_button cf_e320n_v2_gpio_keys[] __initdata = { }, }; -/* CF-E355AC */ +/* CF-E355AC v1/v2 */ #define CF_E355AC_GPIO_LED_LAN 3 #define CF_E355AC_GPIO_LED_WLAN2G 0 #define CF_E355AC_GPIO_LED_WLAN5G 2 @@ -140,17 +145,33 @@ static struct gpio_keys_button cf_e320n_v2_gpio_keys[] __initdata = { #define CF_E355AC_GPIO_BTN_RESET 17 -static struct gpio_led cf_e355ac_leds_gpio[] __initdata = { +static struct gpio_led cf_e355ac_v1_leds_gpio[] __initdata = { { - .name = "cf-e355ac:green:lan", + .name = "cf-e355ac-v1:green:lan", .gpio = CF_E355AC_GPIO_LED_LAN, .active_low = 0, }, { - .name = "cf-e355ac:blue:wlan2g", + .name = "cf-e355ac-v1:blue:wlan2g", .gpio = CF_E355AC_GPIO_LED_WLAN2G, .active_low = 0, }, { - .name = "cf-e355ac:red:wlan5g", + .name = "cf-e355ac-v1:red:wlan5g", + .gpio = CF_E355AC_GPIO_LED_WLAN5G, + .active_low = 0, + }, +}; + +static struct gpio_led cf_e355ac_v2_leds_gpio[] __initdata = { + { + .name = "cf-e355ac-v2:green:lan", + .gpio = CF_E355AC_GPIO_LED_LAN, + .active_low = 0, + }, { + .name = "cf-e355ac-v2:blue:wlan2g", + .gpio = CF_E355AC_GPIO_LED_WLAN2G, + .active_low = 0, + }, { + .name = "cf-e355ac-v2:red:wlan5g", .gpio = CF_E355AC_GPIO_LED_WLAN5G, .active_low = 0, }, @@ -167,27 +188,87 @@ static struct gpio_keys_button cf_e355ac_gpio_keys[] __initdata = { }, }; -/* CF-E380AC v1/v2 */ -#define CF_E380AC_V1V2_GPIO_LED_LAN 0 -#define CF_E380AC_V1V2_GPIO_LED_WLAN2G 2 -#define CF_E380AC_V1V2_GPIO_LED_WLAN5G 3 +/* CF-E375AC */ +#define CF_E375AC_GPIO_LED_LAN 17 +#define CF_E375AC_GPIO_LED_WLAN2G 16 +#define CF_E375AC_GPIO_LED_WLAN5G 15 -#define CF_E380AC_V1V2_GPIO_EXT_WDT 17 +#define CF_E375AC_GPIO_EXT_WDT 6 -#define CF_E380AC_V1V2_GPIO_BTN_RESET 19 +#define CF_E375AC_GPIO_BTN_RESET 2 + +static struct gpio_led cf_e375ac_leds_gpio[] __initdata = { + { + .name = "cf-e375ac:green:lan", + .gpio = CF_E375AC_GPIO_LED_LAN, + .active_low = 0, + }, { + .name = "cf-e375ac:red:wlan5g", + .gpio = CF_E375AC_GPIO_LED_WLAN5G, + .active_low = 0, + }, { + .name = "cf-e375ac:blue:wlan2g", + .gpio = CF_E375AC_GPIO_LED_WLAN2G, + .active_low = 0, + }, +}; + +static struct gpio_keys_button cf_e375ac_gpio_keys[] __initdata = { + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL, + .gpio = CF_E375AC_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static struct ar8327_pad_cfg cf_e375ac_ar8337_pad0_cfg = { + .mode = AR8327_PAD_MAC_SGMII, + .sgmii_delay_en = true, +}; + +static struct ar8327_platform_data cf_e375ac_ar8337_data = { + .pad0_cfg = &cf_e375ac_ar8337_pad0_cfg, + .port0_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, +}; + +static struct mdio_board_info cf_e375ac_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 0, + .platform_data = &cf_e375ac_ar8337_data, + }, +}; + +/* CF-E380AC v1/v2, CF-E385AC */ +#define CF_E38XAC_GPIO_LED_LAN 0 +#define CF_E38XAC_GPIO_LED_WLAN2G 2 +#define CF_E38XAC_GPIO_LED_WLAN5G 3 + +#define CF_E38XAC_GPIO_EXT_WDT 17 + +#define CF_E38XAC_GPIO_BTN_RESET 19 static struct gpio_led cf_e380ac_v1_leds_gpio[] __initdata = { { .name = "cf-e380ac-v1:green:lan", - .gpio = CF_E380AC_V1V2_GPIO_LED_LAN, + .gpio = CF_E38XAC_GPIO_LED_LAN, .active_low = 0, }, { .name = "cf-e380ac-v1:blue:wlan2g", - .gpio = CF_E380AC_V1V2_GPIO_LED_WLAN2G, + .gpio = CF_E38XAC_GPIO_LED_WLAN2G, .active_low = 0, }, { .name = "cf-e380ac-v1:red:wlan5g", - .gpio = CF_E380AC_V1V2_GPIO_LED_WLAN5G, + .gpio = CF_E38XAC_GPIO_LED_WLAN5G, .active_low = 0, }, }; @@ -195,26 +276,42 @@ static struct gpio_led cf_e380ac_v1_leds_gpio[] __initdata = { static struct gpio_led cf_e380ac_v2_leds_gpio[] __initdata = { { .name = "cf-e380ac-v2:green:lan", - .gpio = CF_E380AC_V1V2_GPIO_LED_LAN, + .gpio = CF_E38XAC_GPIO_LED_LAN, .active_low = 0, }, { .name = "cf-e380ac-v2:blue:wlan2g", - .gpio = CF_E380AC_V1V2_GPIO_LED_WLAN2G, + .gpio = CF_E38XAC_GPIO_LED_WLAN2G, .active_low = 0, }, { .name = "cf-e380ac-v2:red:wlan5g", - .gpio = CF_E380AC_V1V2_GPIO_LED_WLAN5G, + .gpio = CF_E38XAC_GPIO_LED_WLAN5G, .active_low = 0, }, }; -static struct gpio_keys_button cf_e380ac_v1v2_gpio_keys[] __initdata = { +static struct gpio_led cf_e385ac_leds_gpio[] __initdata = { + { + .name = "cf-e385ac:green:lan", + .gpio = CF_E38XAC_GPIO_LED_LAN, + .active_low = 0, + }, { + .name = "cf-e385ac:blue:wlan2g", + .gpio = CF_E38XAC_GPIO_LED_WLAN2G, + .active_low = 0, + }, { + .name = "cf-e385ac:red:wlan5g", + .gpio = CF_E38XAC_GPIO_LED_WLAN5G, + .active_low = 0, + }, +}; + +static struct gpio_keys_button cf_e38xac_gpio_keys[] __initdata = { { .desc = "Reset button", .type = EV_KEY, .code = KEY_RESTART, .debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL, - .gpio = CF_E380AC_V1V2_GPIO_BTN_RESET, + .gpio = CF_E38XAC_GPIO_BTN_RESET, .active_low = 1, }, }; @@ -409,22 +506,103 @@ static void __init cf_e355ac_setup(void) ap91_pci_init(art + 0x5000, NULL); - ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e355ac_leds_gpio), - cf_e355ac_leds_gpio); - ath79_register_gpio_keys_polled(1, CF_EXXXN_KEYS_POLL_INTERVAL, ARRAY_SIZE(cf_e355ac_gpio_keys), cf_e355ac_gpio_keys); } -MIPS_MACHINE(ATH79_MACH_CF_E355AC, "CF-E355AC", "COMFAST CF-E355AC", - cf_e355ac_setup); +static void __init cf_e355ac_v1_setup(void) +{ + cf_e355ac_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e355ac_v1_leds_gpio), + cf_e355ac_v1_leds_gpio); +} + +static void __init cf_e355ac_v2_setup(void) +{ + cf_e355ac_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e355ac_v2_leds_gpio), + cf_e355ac_v2_leds_gpio); +} + +MIPS_MACHINE(ATH79_MACH_CF_E355AC, "CF-E355AC-V1", "COMFAST CF-E355AC v1", + cf_e355ac_v1_setup); + +MIPS_MACHINE(ATH79_MACH_CF_E355AC_V2, "CF-E355AC-V2", "COMFAST CF-E355AC v2", + cf_e355ac_v2_setup); + +static void __init cf_e375ac_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f040000); + + /* Disable JTAG, enabling GPIOs 0-3 */ + ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, 0); + + cf_exxxn_common_setup(0x40000, CF_E375AC_GPIO_EXT_WDT); + + ath79_gpio_output_select(CF_E375AC_GPIO_LED_LAN, 0); + ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN2G, 0); + ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN5G, 0); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e375ac_leds_gpio), + cf_e375ac_leds_gpio); + + ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL, + ARRAY_SIZE(cf_e375ac_gpio_keys), + cf_e375ac_gpio_keys); + + platform_device_register(&ath79_mdio0_device); + + mdiobus_register_board_info(cf_e375ac_mdio0_info, + ARRAY_SIZE(cf_e375ac_mdio0_info)); + + /* GMAC0 is connected to an AR8337 switch */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_register_eth(0); + + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_CF_E375AC, "CF-E375AC", "COMFAST CF-E375AC", + cf_e375ac_setup); + +static void __init cf_e38xac_common_setup(unsigned long art_ofs) +{ + cf_exxxn_common_setup(art_ofs, CF_E38XAC_GPIO_EXT_WDT); + + ath79_register_pci(); + + /* Disable JTAG (enables GPIO0-3) */ + ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); + + ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_LAN, true); + ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_WLAN2G, true); + ath79_gpio_direction_select(CF_E38XAC_GPIO_LED_WLAN5G, true); + + ath79_gpio_output_select(CF_E38XAC_GPIO_LED_LAN, 0); + ath79_gpio_output_select(CF_E38XAC_GPIO_LED_WLAN2G, 0); + ath79_gpio_output_select(CF_E38XAC_GPIO_LED_WLAN5G, 0); + + /* For J7-4 */ + ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN); + + ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL, + ARRAY_SIZE(cf_e38xac_gpio_keys), + cf_e38xac_gpio_keys); +} static void __init cf_e380ac_v1v2_common_setup(unsigned long art_ofs) { u8 *mac = (u8 *) KSEG1ADDR(0x1f000000 + art_ofs); - cf_exxxn_common_setup(art_ofs, CF_E380AC_V1V2_GPIO_EXT_WDT); + cf_e38xac_common_setup(art_ofs); ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); @@ -441,26 +619,6 @@ static void __init cf_e380ac_v1v2_common_setup(unsigned long art_ofs) ath79_eth0_pll_data.pll_10 = 0xb0001313; ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); ath79_register_eth(0); - - ap91_pci_init(mac + 0x5000, NULL); - - /* Disable JTAG (enables GPIO0-3) */ - ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); - - ath79_gpio_direction_select(CF_E380AC_V1V2_GPIO_LED_LAN, true); - ath79_gpio_direction_select(CF_E380AC_V1V2_GPIO_LED_WLAN2G, true); - ath79_gpio_direction_select(CF_E380AC_V1V2_GPIO_LED_WLAN5G, true); - - ath79_gpio_output_select(CF_E380AC_V1V2_GPIO_LED_LAN, 0); - ath79_gpio_output_select(CF_E380AC_V1V2_GPIO_LED_WLAN2G, 0); - ath79_gpio_output_select(CF_E380AC_V1V2_GPIO_LED_WLAN5G, 0); - - /* For J7-4 */ - ath79_gpio_function_disable(AR934X_GPIO_FUNC_CLK_OBS4_EN); - - ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL, - ARRAY_SIZE(cf_e380ac_v1v2_gpio_keys), - cf_e380ac_v1v2_gpio_keys); } static void __init cf_e380ac_v1_setup(void) @@ -485,6 +643,86 @@ static void __init cf_e380ac_v2_setup(void) MIPS_MACHINE(ATH79_MACH_CF_E380AC_V2, "CF-E380AC-V2", "COMFAST CF-E380AC v2", cf_e380ac_v2_setup); +/* QCA8337 GMAC0 is connected with QCA9558 over RGMII */ +static struct ar8327_pad_cfg cf_e385ac_qca8337_pad0_cfg = { + .mode = AR8327_PAD_MAC_RGMII, + .txclk_delay_en = true, + .rxclk_delay_en = true, + .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, + .rxclk_delay_sel = AR8327_CLK_DELAY_SEL1, +}; + +/* QCA8337 GMAC6 is connected with QCA9558 over SGMII */ +static struct ar8327_pad_cfg cf_e385ac_qca8337_pad6_cfg = { + .mode = AR8327_PAD_MAC_SGMII, + .sgmii_delay_en = true, + .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, +}; + +static struct ar8327_platform_data cf_e385ac_qca8337_data = { + .pad0_cfg = &cf_e385ac_qca8337_pad0_cfg, + .pad6_cfg = &cf_e385ac_qca8337_pad6_cfg, + .port0_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, + .port6_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, +}; + +static struct mdio_board_info cf_e385ac_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 0, + .platform_data = &cf_e385ac_qca8337_data, + }, +}; + +static void __init cf_e385ac_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f040000); + + cf_e38xac_common_setup(0x40000); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e385ac_leds_gpio), + cf_e385ac_leds_gpio); + + mdiobus_register_board_info(cf_e385ac_mdio0_info, + ARRAY_SIZE(cf_e385ac_mdio0_info)); + ath79_register_mdio(0, 0x0); + + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); + + /* QCA9558 GMAC0 is connected to RMGII interface */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_eth0_pll_data.pll_1000 = 0x96000000; + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_register_eth(0); + + /* QCA9558 GMAC1 is connected to SGMII interface */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_pll_data.pll_1000 = 0x03000101; + + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + ath79_register_eth(1); +} + +MIPS_MACHINE(ATH79_MACH_CF_E385AC, "CF-E385AC", "COMFAST CF-E385AC", + cf_e385ac_setup); + static void __init cf_e5x0n_gpio_setup(void) { ath79_gpio_direction_select(CF_E5X0N_GPIO_LED_WAN, true); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dap-1330-a1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dap-1330-a1.c new file mode 100644 index 000000000..9c50bc7e9 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dap-1330-a1.c @@ -0,0 +1,146 @@ +/* + * D-Link DAP-1330 + * + * Copyright (c) 2013-2015 The Linux Foundation. All rights reserved. + * Copyright (c) 2017 Nicolò Veronese + * Copyright (c) 2017 Federico Cappon + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "nvram.h" + +#include +#include +#include +#include +#include + +#define DAP_1330_GPIO_LED_GREEN_POWER 13 +#define DAP_1330_GPIO_LED_RED_POWER 3 +#define DAP_1330_GPIO_LED_GREEN_WIFI 14 +#define DAP_1330_GPIO_LED_RED_WIFI 11 +#define DAP_1330_GPIO_LED_SIGNAL1 15 +#define DAP_1330_GPIO_LED_SIGNAL2 16 + +#define DAP_1330_GPIO_BTN_WPS 2 +#define DAP_1330_GPIO_BTN_RESET 17 + +#define DAP_1330_KEYS_POLL_INTERVAL 20 /* msecs */ +#define DAP_1330_KEYS_DEBOUNCE_INTERVAL (3 * DAP_1330_KEYS_POLL_INTERVAL) + +#define DAP1330_MAC_ADDR 0x1f020001 + +#define DAP1330_WMAC_CALDATA_ADDR 0x1f010000 +#define DAP_1330_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led dap_1330_leds_gpio[] __initdata = { + { + .name = "d-link:green:power", + .gpio = DAP_1330_GPIO_LED_GREEN_POWER, + .active_low = 1, + }, + { + .name = "d-link:red:power", + .gpio = DAP_1330_GPIO_LED_RED_POWER, + .active_low = 1, + }, + { + .name = "d-link:green:wifi", + .gpio = DAP_1330_GPIO_LED_GREEN_WIFI, + .active_low = 1, + }, + { + .name = "d-link:red:wifi", + .gpio = DAP_1330_GPIO_LED_RED_WIFI, + .active_low = 1, + }, + { + .name = "d-link:green:signal1", + .gpio = DAP_1330_GPIO_LED_SIGNAL1, + .active_low = 1, + }, + { + .name = "d-link:green:signal2", + .gpio = DAP_1330_GPIO_LED_SIGNAL2, + .active_low = 1, + } +}; + +static struct gpio_keys_button dap_1330_gpio_keys[] __initdata = { + { + .desc = "WPS button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = DAP_1330_KEYS_DEBOUNCE_INTERVAL, + .gpio = DAP_1330_GPIO_BTN_WPS, + .active_low = 1, + }, + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = DAP_1330_KEYS_DEBOUNCE_INTERVAL, + .gpio = DAP_1330_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static void __init dap_1330_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(DAP1330_WMAC_CALDATA_ADDR); + u8 *mac_ptr = (u8 *) KSEG1ADDR(DAP1330_MAC_ADDR); + u8 mac[ETH_ALEN]; + + ath79_parse_ascii_mac((char *) mac_ptr, mac); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(dap_1330_leds_gpio), + dap_1330_leds_gpio); + + ath79_register_gpio_keys_polled(-1, DAP_1330_KEYS_POLL_INTERVAL, + ARRAY_SIZE(dap_1330_gpio_keys), + dap_1330_gpio_keys); + + ath79_register_wmac(art + DAP_1330_WMAC_CALDATA_OFFSET, mac); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); + + /* LAN ports */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_switch_data.phy_poll_mask |= BIT(4); + ath79_switch_data.phy4_mii_en = 1; + ath79_register_eth(1); +} + +MIPS_MACHINE(ATH79_MACH_DAP_1330_A1, "DAP-1330-A1", + "D-Link DAP-1330 Rev. A1", dap_1330_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-e1700ac-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-e1700ac-v2.c new file mode 100644 index 000000000..90bff1f2f --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-e1700ac-v2.c @@ -0,0 +1,145 @@ +/* + * Qxwlan E1700AC v2 board support + * + * Copyright (C) 2017 Peng Zhang + * Copyright (C) 2018 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "pci.h" + +#define E1700AC_V2_GPIO_LED_SYS 1 +#define E1700AC_V2_GPIO_LED_USB 7 +#define E1700AC_V2_GPIO_LED_WLAN2G 19 + +#define E1700AC_V2_GPIO_BTN_SW1 2 +#define E1700AC_V2_GPIO_BTN_RESET 11 + +#define E1700AC_V2_KEYS_POLL_INTERVAL 20 /* msecs */ +#define E1700AC_V2_KEYS_DEBOUNCE_INTERVAL \ + (3 * E1700AC_V2_KEYS_POLL_INTERVAL) + +static struct gpio_led e1700ac_v2_leds_gpio[] __initdata = { + { + .name = "e1700ac-v2:green:system", + .gpio = E1700AC_V2_GPIO_LED_SYS, + .active_low = 1, + }, { + .name = "e1700ac-v2:green:usb", + .gpio = E1700AC_V2_GPIO_LED_USB, + .active_low = 1, + }, { + .name = "e1700ac-v2:green:wlan2g", + .gpio = E1700AC_V2_GPIO_LED_WLAN2G, + .active_low = 1, + }, +}; + +static struct gpio_keys_button e1700ac_v2_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = E1700AC_V2_KEYS_DEBOUNCE_INTERVAL, + .gpio = E1700AC_V2_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "sw1", + .type = EV_KEY, + .code = BTN_0, + .debounce_interval = E1700AC_V2_KEYS_DEBOUNCE_INTERVAL, + .gpio = E1700AC_V2_GPIO_BTN_SW1, + .active_low = 1, + }, +}; + +static const struct ar8327_led_info e1700ac_v2_leds_qca8334[] = { + AR8327_LED_INFO(PHY1_0, HW, "e1700ac-v2:green:lan"), + AR8327_LED_INFO(PHY2_0, HW, "e1700ac-v2:green:wan"), +}; + +/* Blink rate: 1 Gbps -> 8 hz, 100 Mbs -> 4 Hz, 10 Mbps -> 2 Hz */ +static struct ar8327_led_cfg e1700ac_v2_qca8334_led_cfg = { + .led_ctrl0 = 0xcf37cf37, + .led_ctrl1 = 0xcf37cf37, + .led_ctrl2 = 0xcf37cf37, + .led_ctrl3 = 0x0, + .open_drain = true, +}; + +static struct ar8327_pad_cfg e1700ac_v2_qca8334_pad0_cfg = { + .mode = AR8327_PAD_MAC_SGMII, + .sgmii_delay_en = true, +}; + +static struct ar8327_platform_data e1700ac_v2_qca8334_data = { + .pad0_cfg = &e1700ac_v2_qca8334_pad0_cfg, + .port0_cfg = { + .force_link = 1, + .speed = AR8327_PORT_SPEED_1000, + .duplex = 1, + .txpause = 1, + .rxpause = 1, + }, + .led_cfg = &e1700ac_v2_qca8334_led_cfg, + .leds = e1700ac_v2_leds_qca8334, + .num_leds = ARRAY_SIZE(e1700ac_v2_leds_qca8334), +}; + +static struct mdio_board_info e1700ac_v2_mdio0_info[] = { + { + .bus_id = "ag71xx-mdio.0", + .phy_addr = 0, + .platform_data = &e1700ac_v2_qca8334_data, + }, +}; + +static void __init e1700ac_v2_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f050400); + u8 *art = (u8 *) KSEG1ADDR(0x1f061000); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(e1700ac_v2_leds_gpio), + e1700ac_v2_leds_gpio); + + ath79_register_gpio_keys_polled(-1, E1700AC_V2_KEYS_POLL_INTERVAL, + ARRAY_SIZE(e1700ac_v2_gpio_keys), + e1700ac_v2_gpio_keys); + + ath79_register_mdio(0, 0x0); + mdiobus_register_board_info(e1700ac_v2_mdio0_info, + ARRAY_SIZE(e1700ac_v2_mdio0_info)); + + /* GMAC0 is connected to QCA8334 switch */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_pll_data.pll_1000 = 0x03000101; + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_register_eth(0); + + ath79_register_pci(); + ath79_register_usb(); + ath79_register_wmac(art, NULL); +} + +MIPS_MACHINE(ATH79_MACH_E1700AC_V2, "E1700AC-V2", "Qxwlan E1700AC v2", + e1700ac_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-e600g-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-e600g-v2.c new file mode 100644 index 000000000..29411dea8 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-e600g-v2.c @@ -0,0 +1,184 @@ +/* + * Qxwlan E600G/E600GAC v2 board support + * + * Copyright (C) 2017 Peng Zhang + * Copyright (C) 2018 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "pci.h" + +#define E600G_V2_GPIO_LED_LAN 16 +#define E600G_V2_GPIO_LED_SYS 13 +#define E600G_V2_GPIO_LED_WAN_B 4 +#define E600G_V2_GPIO_LED_WAN_G 15 + +#define E600GAC_V2_GPIO_LED_CTRL_B 14 +#define E600GAC_V2_GPIO_LED_CTRL_G 11 +#define E600GAC_V2_GPIO_LED_CTRL_R 12 +#define E600GAC_V2_GPIO_LED_LAN 16 +#define E600GAC_V2_GPIO_LED_SYS 13 +#define E600GAC_V2_GPIO_LED_WAN_G 15 +#define E600GAC_V2_GPIO_LED_WAN_O 4 + +#define E600G_V2_GPIO_BTN_RESET 17 +#define E600GAC_V2_GPIO_BTN_WPS 1 + +#define E600G_V2_KEYS_POLL_INTERVAL 20 /* msecs */ +#define E600G_V2_KEYS_DEBOUNCE_INTERVAL (3 * E600G_V2_KEYS_POLL_INTERVAL) + +static struct gpio_led e600g_v2_leds_gpio[] __initdata = { + { + .name = "e600g-v2:blue:system", + .gpio = E600G_V2_GPIO_LED_SYS, + .active_low = 1, + }, { + .name = "e600g-v2:blue:wan", + .gpio = E600G_V2_GPIO_LED_WAN_B, + .active_low = 1, + }, { + .name = "e600g-v2:green:lan", + .gpio = E600G_V2_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "e600g-v2:green:wan", + .gpio = E600G_V2_GPIO_LED_WAN_G, + .active_low = 1, + }, +}; + +static struct gpio_led e600gac_v2_leds_gpio[] __initdata = { + { + .name = "e600gac-v2:blue:control", + .gpio = E600GAC_V2_GPIO_LED_CTRL_B, + .active_low = 1, + }, { + .name = "e600gac-v2:green:control", + .gpio = E600GAC_V2_GPIO_LED_CTRL_G, + .active_low = 1, + }, { + .name = "e600gac-v2:red:control", + .gpio = E600GAC_V2_GPIO_LED_CTRL_R, + .active_low = 1, + }, { + .name = "e600gac-v2:green:system", + .gpio = E600GAC_V2_GPIO_LED_SYS, + .active_low = 1, + }, { + .name = "e600gac-v2:orange:wan", + .gpio = E600GAC_V2_GPIO_LED_WAN_O, + .active_low = 1, + }, { + .name = "e600gac-v2:green:lan", + .gpio = E600GAC_V2_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "e600gac-v2:green:wan", + .gpio = E600GAC_V2_GPIO_LED_WAN_G, + .active_low = 1, + }, +}; + +static struct gpio_keys_button e600g_v2_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = E600G_V2_KEYS_DEBOUNCE_INTERVAL, + .gpio = E600G_V2_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static struct gpio_keys_button e600gac_v2_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = E600G_V2_KEYS_DEBOUNCE_INTERVAL, + .gpio = E600G_V2_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = E600G_V2_KEYS_DEBOUNCE_INTERVAL, + .gpio = E600GAC_V2_GPIO_BTN_WPS, + .active_low = 1, + }, +}; + +static void __init e600g_v2_common_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f050400); + u8 *art = (u8 *) KSEG1ADDR(0x1f061000); + + ath79_register_m25p80(NULL); + + ath79_setup_ar933x_phy4_switch(false, false); + + ath79_register_mdio(0, 0x0); + + ath79_switch_data.phy4_mii_en = 1; + ath79_switch_data.phy_poll_mask = 0xfe; + + /* LAN */ + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = BIT(4); + ath79_eth0_data.speed = SPEED_100; + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_register_eth(0); + + /* WAN */ + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.phy_mask = BIT(0); + ath79_eth1_data.speed = SPEED_1000; + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); + ath79_register_eth(1); + + ath79_register_pci(); + ath79_register_usb(); + ath79_register_wmac(art, NULL); +} + +static void __init e600g_v2_setup(void) +{ + e600g_v2_common_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(e600g_v2_leds_gpio), + e600g_v2_leds_gpio); + + ath79_register_gpio_keys_polled(-1, E600G_V2_KEYS_POLL_INTERVAL, + ARRAY_SIZE(e600g_v2_gpio_keys), + e600g_v2_gpio_keys); +} + +static void __init e600gac_v2_setup(void) +{ + e600g_v2_common_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(e600gac_v2_leds_gpio), + e600gac_v2_leds_gpio); + + ath79_register_gpio_keys_polled(-1, E600G_V2_KEYS_POLL_INTERVAL, + ARRAY_SIZE(e600gac_v2_gpio_keys), + e600gac_v2_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_E600G_V2, "E600G-V2", "Qxwlan E600G v2", + e600g_v2_setup); + +MIPS_MACHINE(ATH79_MACH_E600GAC_V2, "E600GAC-V2", "Qxwlan E600GAC v2", + e600gac_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-balin.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-balin.c new file mode 100644 index 000000000..2e82ffdaa --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-balin.c @@ -0,0 +1,110 @@ +/* + * EW Balin board support + * (based on Atheros DB120 reference board support) + * + * Copyright (c) 2011 Qualcomm Atheros + * Copyright (c) 2011-2012 Gabor Juhos + * Copyright (C) 2017 Embedded Wireless GmbH www.80211.de + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include +#include +#include +#include +#include + +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-spi.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "pci.h" + +#define BALIN_GPIO_LED_STATUS 14 + +#define BALIN_GPIO_BTN_WPS 18 + +#define BALIN_KEYS_POLL_INTERVAL 20 /* msecs */ +#define BALIN_KEYS_DEBOUNCE_INTERVAL (3 * BALIN_KEYS_POLL_INTERVAL) + +#define BALIN_CALDATA_OFFSET 0x1000 +#define BALIN_WMAC_MAC_OFFSET (BALIN_CALDATA_OFFSET + 0x02) + +static struct gpio_led balin_leds_gpio[] __initdata = { + { + .name = "balin:green:status", + .gpio = BALIN_GPIO_LED_STATUS, + .active_low = 1, + }, +}; + +static struct gpio_keys_button balin_gpio_keys[] __initdata = { + { + .desc = "WPS button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = BALIN_KEYS_DEBOUNCE_INTERVAL, + .gpio = BALIN_GPIO_BTN_WPS, + .active_low = 0, + }, +}; + + +static void __init balin_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + static u8 mac[6]; + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(balin_leds_gpio), + balin_leds_gpio); + + ath79_register_gpio_keys_polled(-1, BALIN_KEYS_POLL_INTERVAL, + ARRAY_SIZE(balin_gpio_keys), + balin_gpio_keys); + + ath79_register_usb(); + + ath79_register_wmac(art + BALIN_CALDATA_OFFSET, NULL); + + ath79_register_pci(); + + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | + AR934X_ETH_CFG_SW_ONLY_MODE); + + ath79_register_mdio(1, 0x0); + + /* GMAC1 is connected to the internal switch */ + memcpy(mac, art + BALIN_WMAC_MAC_OFFSET, sizeof(mac)); + mac[3] |= 0x40; + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(1); +} + +MIPS_MACHINE(ATH79_MACH_EW_BALIN, "EW-BALIN", "EmbWir-Balin", + balin_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar150.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar150.c index df5278491..9febc7a83 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar150.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar150.c @@ -122,4 +122,4 @@ static void __init gl_ar150_setup(void) ath79_register_wmac(art + GL_AR150_CALDATA_OFFSET, art + GL_AR150_WMAC_MAC_OFFSET); } -MIPS_MACHINE(ATH79_MACH_GL_AR150, "GL-AR150", "GL AR150",gl_ar150_setup); +MIPS_MACHINE(ATH79_MACH_GL_AR150, "GL-AR150", "GL.iNet GL-AR150", gl_ar150_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300.c index 6f01b9e4d..1708d696b 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300.c @@ -100,4 +100,4 @@ static void __init gl_ar300_setup(void) ath79_register_wmac(art + GL_AR300_CALDATA_OFFSET, art + GL_AR300_WMAC_MAC_OFFSET); } -MIPS_MACHINE(ATH79_MACH_GL_AR300, "GL-AR300", "GL AR300",gl_ar300_setup); +MIPS_MACHINE(ATH79_MACH_GL_AR300, "GL-AR300", "GL.iNet GL-AR300", gl_ar300_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c index c4e537f86..2a2d2702b 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-ar300m.c @@ -162,5 +162,4 @@ static void __init gl_ar300m_setup(void) ath79_register_pci(); } -MIPS_MACHINE(ATH79_MACH_GL_AR300M, "GL-AR300M", "GL-AR300M", - gl_ar300m_setup); +MIPS_MACHINE(ATH79_MACH_GL_AR300M, "GL-AR300M", "GL.iNet GL-AR300M", gl_ar300m_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-mifi.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-mifi.c index 412c562fa..a5c68ed65 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-mifi.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-mifi.c @@ -41,7 +41,7 @@ static struct gpio_led gl_mifi_leds_gpio[] __initdata = { { - .name = "gl-mifi:greeen:wan", + .name = "gl-mifi:green:wan", .gpio = GL_MIFI_GPIO_LED_WAN, .active_low = 0, }, @@ -111,4 +111,4 @@ static void __init gl_mifi_setup(void) ath79_register_wmac(art + GL_MIFI_CALDATA_OFFSET, art + GL_MIFI_WMAC_MAC_OFFSET); } -MIPS_MACHINE(ATH79_MACH_GL_MIFI, "GL-MIFI", "GL-MIFI",gl_mifi_setup); +MIPS_MACHINE(ATH79_MACH_GL_MIFI, "GL-MIFI", "GL.iNet GL-MIFI", gl_mifi_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-minibox-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-minibox-v1.c deleted file mode 100644 index 47eeb65de..000000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-minibox-v1.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Gainstrong MiniBox V1.0 board support - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define GS_MINIBOX_V1_GPIO_BTN_RESET 11 - -#define GS_MINIBOX_V1_GPIO_LED_SYSTEM 1 - -#define GS_MINIBOX_V1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define GS_MINIBOX_V1_KEYS_DEBOUNCE_INTERVAL (3 * GS_MINIBOX_V1_KEYS_POLL_INTERVAL) - -static const char *gs_minibox_v1_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data gs_minibox_v1_flash_data = { - .part_probes = gs_minibox_v1_part_probes, -}; - -static struct gpio_led gs_minibox_v1_leds_gpio[] __initdata = { - { - .name = "minibox-v1:green:system", - .gpio = GS_MINIBOX_V1_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button gs_minibox_v1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = GS_MINIBOX_V1_KEYS_DEBOUNCE_INTERVAL, - .gpio = GS_MINIBOX_V1_GPIO_BTN_RESET, - .active_low = 0, - }, -}; - -static void __init gs_minibox_v1_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_minibox_v1_leds_gpio), - gs_minibox_v1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, GS_MINIBOX_V1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(gs_minibox_v1_gpio_keys), - gs_minibox_v1_gpio_keys); - - ath79_register_usb(); - - ath79_register_m25p80(&gs_minibox_v1_flash_data); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_GS_MINIBOX_V1, "MINIBOX-V1", - "MiniBox V1.0", gs_minibox_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v1.c new file mode 100644 index 000000000..d424e0f11 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v1.c @@ -0,0 +1,143 @@ +/* + * GainStrong Oolite/MiniBox V1.0 boards support + * + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "dev-usb.h" + +#define GS_MINIBOX_V1_GPIO_BTN_RESET 11 +#define GS_MINIBOX_V1_GPIO_LED_SYSTEM 1 + +#define GS_OOLITE_V1_GPIO_BTN6 6 +#define GS_OOLITE_V1_GPIO_BTN7 7 +#define GS_OOLITE_V1_GPIO_BTN_RESET 11 +#define GS_OOLITE_V1_GPIO_LED_SYSTEM 27 + +#define GS_KEYS_POLL_INTERVAL 20 /* msecs */ +#define GS_KEYS_DEBOUNCE_INTERVAL (3 * GS_KEYS_POLL_INTERVAL) + +static const char *gs_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data gs_flash_data = { + .part_probes = gs_part_probes, +}; + +static struct gpio_led gs_minibox_v1_leds_gpio[] __initdata = { + { + .name = "minibox-v1:green:system", + .gpio = GS_MINIBOX_V1_GPIO_LED_SYSTEM, + .active_low = 1, + }, +}; + +static struct gpio_led gs_oolite_v1_leds_gpio[] __initdata = { + { + .name = "oolite-v1:red:system", + .gpio = GS_OOLITE_V1_GPIO_LED_SYSTEM, + .active_low = 1, + }, +}; + +static struct gpio_keys_button gs_minibox_v1_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL, + .gpio = GS_MINIBOX_V1_GPIO_BTN_RESET, + .active_low = 0, + }, +}; + +static struct gpio_keys_button gs_oolite_v1_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL, + .gpio = GS_OOLITE_V1_GPIO_BTN_RESET, + .active_low = 0, + }, { + .desc = "BTN_6", + .type = EV_KEY, + .code = BTN_6, + .debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL, + .gpio = GS_OOLITE_V1_GPIO_BTN6, + .active_low = 0, + }, { + .desc = "BTN_7", + .type = EV_KEY, + .code = BTN_7, + .debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL, + .gpio = GS_OOLITE_V1_GPIO_BTN7, + .active_low = 0, + }, +}; + +static void __init gs_common_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff1000); + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + + ath79_register_usb(); + + ath79_register_m25p80(&gs_flash_data); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); + + ath79_register_mdio(0, 0x0); + ath79_register_eth(1); + ath79_register_eth(0); + + ath79_register_wmac(art, mac); +} + +static void __init gs_minibox_v1_setup(void) +{ + gs_common_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_minibox_v1_leds_gpio), + gs_minibox_v1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, GS_KEYS_POLL_INTERVAL, + ARRAY_SIZE(gs_minibox_v1_gpio_keys), + gs_minibox_v1_gpio_keys); +} + +static void __init gs_oolite_v1_setup(void) +{ + gs_common_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_v1_leds_gpio), + gs_oolite_v1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, GS_KEYS_POLL_INTERVAL, + ARRAY_SIZE(gs_oolite_v1_gpio_keys), + gs_oolite_v1_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_GS_MINIBOX_V1, "MINIBOX-V1", "GainStrong MiniBox V1.0", + gs_minibox_v1_setup); + +MIPS_MACHINE(ATH79_MACH_GS_OOLITE_V1, "OOLITE-V1", "GainStrong Oolite V1.0", + gs_oolite_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v5-2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v5-2.c new file mode 100644 index 000000000..64dc4f334 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite-v5-2.c @@ -0,0 +1,111 @@ +/* + * GainStrong Oolite V5.2 module and development board support + * + * Copyright (C) 2018 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "pci.h" + +#define GS_OOLITE_V5_2_DEV_GPIO_BTN_RESET 17 +#define GS_OOLITE_V5_2_DEV_GPIO_LED_SYSTEM 13 + +#define GS_KEYS_POLL_INTERVAL 20 /* msec */ +#define GS_KEYS_DEBOUNCE_INTERVAL (3 * GS_KEYS_POLL_INTERVAL) + +#define GS_OOLITE_V5_2_WMAC_CALDATA_OFFSET 0x1000 + +static const char *gs_oolite_v5_2_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data gs_oolite_v5_2_flash_data = { + .part_probes = gs_oolite_v5_2_part_probes, +}; + +static struct gpio_led gs_oolite_v5_2_dev_gpio_leds[] __initdata = { + { + .name = "oolite-v5.2-dev:blue:system", + .gpio = GS_OOLITE_V5_2_DEV_GPIO_LED_SYSTEM, + .active_low = 0, + }, +}; + +static struct gpio_keys_button gs_oolite_v5_2_dev_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = GS_KEYS_DEBOUNCE_INTERVAL, + .gpio = GS_OOLITE_V5_2_DEV_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static void __init gs_oolite_v5_2_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(&gs_oolite_v5_2_flash_data); + + ath79_setup_ar933x_phy4_switch(false, false); + + ath79_register_mdio(0, 0x0); + + ath79_switch_data.phy4_mii_en = 1; + ath79_switch_data.phy_poll_mask |= BIT(4); + + /* LAN */ + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_init_mac(ath79_eth1_data.mac_addr, art + 6, 0); + ath79_register_eth(1); + + /* WAN */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = BIT(4); + ath79_eth0_data.speed = SPEED_100; + ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); + ath79_register_eth(0); + + ath79_register_pci(); + ath79_register_usb(); + ath79_register_wmac(art + GS_OOLITE_V5_2_WMAC_CALDATA_OFFSET, NULL); +} + +static void __init gs_oolite_v5_2_dev_setup(void) +{ + gs_oolite_v5_2_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_v5_2_dev_gpio_leds), + gs_oolite_v5_2_dev_gpio_leds); + + ath79_register_gpio_keys_polled(-1, GS_KEYS_POLL_INTERVAL, + ARRAY_SIZE(gs_oolite_v5_2_dev_gpio_keys), + gs_oolite_v5_2_dev_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_GS_OOLITE_V5_2, "OOLITE-V5-2", + "GainStrong Oolite V5.2", gs_oolite_v5_2_setup); + +MIPS_MACHINE(ATH79_MACH_GS_OOLITE_V5_2_DEV, "OOLITE-V5-2-DEV", + "GainStrong Oolite V5.2-Dev", gs_oolite_v5_2_dev_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite.c deleted file mode 100644 index c6cb61c36..000000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Oolite board support - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "dev-usb.h" - -#define GS_OOLITE_GPIO_BTN6 6 -#define GS_OOLITE_GPIO_BTN7 7 -#define GS_OOLITE_GPIO_BTN_RESET 11 - -#define GS_OOLITE_GPIO_LED_SYSTEM 27 - -#define GS_OOLITE_KEYS_POLL_INTERVAL 20 /* msecs */ -#define GS_OOLITE_KEYS_DEBOUNCE_INTERVAL (3 * GS_OOLITE_KEYS_POLL_INTERVAL) - -static const char *gs_oolite_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data gs_oolite_flash_data = { - .part_probes = gs_oolite_part_probes, -}; - -static struct gpio_led gs_oolite_leds_gpio[] __initdata = { - { - .name = "oolite:red:system", - .gpio = GS_OOLITE_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button gs_oolite_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, - .gpio = GS_OOLITE_GPIO_BTN_RESET, - .active_low = 0, - }, - { - .desc = "BTN_6", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, - .gpio = GS_OOLITE_GPIO_BTN6, - .active_low = 0, - }, - { - .desc = "BTN_7", - .type = EV_KEY, - .code = BTN_7, - .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, - .gpio = GS_OOLITE_GPIO_BTN7, - .active_low = 0, - }, -}; - -static void __init gs_oolite_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_leds_gpio), - gs_oolite_leds_gpio); - - ath79_register_gpio_keys_polled(-1, GS_OOLITE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(gs_oolite_gpio_keys), - gs_oolite_gpio_keys); - - ath79_register_usb(); - - ath79_register_m25p80(&gs_oolite_flash_data); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_GS_OOLITE, "GS-OOLITE", - "Oolite V1.0", gs_oolite_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-lan-turtle.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-lan-turtle.c new file mode 100644 index 000000000..d2faa2c74 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-lan-turtle.c @@ -0,0 +1,178 @@ +/* + * Hak5 LAN Turtle and Packet Squirrel boards support + * + * Copyright (C) 2018 Sebastian Kinne + * Copyright (C) 2018 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define LAN_TURTLE_GPIO_BTN_RESET 11 +#define LAN_TURTLE_GPIO_LED_SYS 13 + +#define PACKET_SQUIRREL_GPIO_BTN_SW1 18 +#define PACKET_SQUIRREL_GPIO_BTN_SW2 20 +#define PACKET_SQUIRREL_GPIO_BTN_SW3 21 +#define PACKET_SQUIRREL_GPIO_BTN_SW4 24 +#define PACKET_SQUIRREL_GPIO_BTN_RESET 11 +#define PACKET_SQUIRREL_GPIO_LED_B 23 +#define PACKET_SQUIRREL_GPIO_LED_G 22 +#define PACKET_SQUIRREL_GPIO_LED_R 19 + +#define HAK5_KEYS_POLL_INTERVAL 20 /* msecs */ +#define HAK5_KEYS_DEBOUNCE_INTERVAL (3 * HAK5_KEYS_POLL_INTERVAL) + +static const char *hak5_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data hak5_flash_data = { + .part_probes = hak5_part_probes, +}; + +/* LAN Turtle */ +static struct gpio_led lan_turtle_leds_gpio[] __initdata = { + { + .name = "lan-turtle:orange:system", + .gpio = LAN_TURTLE_GPIO_LED_SYS, + .active_low = 1, + }, +}; + +static struct gpio_keys_button lan_turtle_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = HAK5_KEYS_DEBOUNCE_INTERVAL, + .gpio = LAN_TURTLE_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +/* Packet Squirrel */ +static struct gpio_led packet_squirrel_leds_gpio[] __initdata = { + { + .name = "packet-squirrel:blue:system", + .gpio = PACKET_SQUIRREL_GPIO_LED_B, + .active_low = 1, + }, { + .name = "packet-squirrel:green:system", + .gpio = PACKET_SQUIRREL_GPIO_LED_G, + .active_low = 1, + }, { + .name = "packet-squirrel:red:system", + .gpio = PACKET_SQUIRREL_GPIO_LED_R, + .active_low = 1, + }, +}; + +static struct gpio_keys_button packet_squirrel_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = HAK5_KEYS_DEBOUNCE_INTERVAL, + .gpio = PACKET_SQUIRREL_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "sw1", + .type = EV_KEY, + .code = BTN_0, + .debounce_interval = HAK5_KEYS_DEBOUNCE_INTERVAL, + .gpio = PACKET_SQUIRREL_GPIO_BTN_SW1, + .active_low = 1, + }, { + .desc = "sw2", + .type = EV_KEY, + .code = BTN_1, + .debounce_interval = HAK5_KEYS_DEBOUNCE_INTERVAL, + .gpio = PACKET_SQUIRREL_GPIO_BTN_SW2, + .active_low = 1, + }, { + .desc = "sw3", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = HAK5_KEYS_DEBOUNCE_INTERVAL, + .gpio = PACKET_SQUIRREL_GPIO_BTN_SW3, + .active_low = 1, + }, { + .desc = "sw4", + .type = EV_KEY, + .code = BTN_3, + .debounce_interval = HAK5_KEYS_DEBOUNCE_INTERVAL, + .gpio = PACKET_SQUIRREL_GPIO_BTN_SW4, + .active_low = 1, + }, +}; + +static void __init hak5_common_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + + ath79_register_m25p80(&hak5_flash_data); + + ath79_register_mdio(0, 0x0); + + ath79_switch_data.phy_poll_mask = 0xfe; + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_register_eth(0); + + ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); + ath79_register_eth(1); + + ath79_register_usb(); + + /* GPIO11/12 */ + ath79_gpio_function_disable(AR933X_GPIO_FUNC_UART_RTS_CTS_EN); +} + +static void __init lan_turtle_setup(void) +{ + hak5_common_setup(); + + /* GPIO13 */ + ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(lan_turtle_leds_gpio), + lan_turtle_leds_gpio); + + ath79_register_gpio_keys_polled(-1, HAK5_KEYS_POLL_INTERVAL, + ARRAY_SIZE(lan_turtle_gpio_keys), + lan_turtle_gpio_keys); +} + +static void __init packet_squirrel_setup(void) +{ + hak5_common_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(packet_squirrel_leds_gpio), + packet_squirrel_leds_gpio); + + ath79_register_gpio_keys_polled(-1, HAK5_KEYS_POLL_INTERVAL, + ARRAY_SIZE(packet_squirrel_gpio_keys), + packet_squirrel_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_LAN_TURTLE, "LAN-TURTLE", + "Hak5 LAN Turtle", lan_turtle_setup); + +MIPS_MACHINE(ATH79_MACH_PACKET_SQUIRREL, "PACKET-SQUIRREL", + "Hak5 Packet Squirrel", packet_squirrel_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c index a24cb3fce..2d2fb6e84 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c @@ -168,17 +168,6 @@ static int mr18_extract_sgmii_res_cal(void) return reversed_sgmii_value; } -#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x004c -#define QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT BIT(2) -#define QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK BIT(1) -#define QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL BIT(0) - -#define QCA955X_GMAC_REG_SGMII_SERDES 0x0018 -#define QCA955X_SGMII_SERDES_RES_CALIBRATION BIT(23) -#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf -#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 -#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) - static void mr18_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value) { void __iomem *ethbase, *pllbase; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pacv2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pacv2.c index 0480d01e2..1ab24f933 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pacv2.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5pacv2.c @@ -11,12 +11,6 @@ */ #include -#include -#if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,0) -#include -#else -#include -#endif #include #include #include diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c index 8d8dd40e8..f7f3b028f 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbspi.c @@ -3,6 +3,8 @@ * * - MikroTik RouterBOARD mAP 2nD * - MikroTik RouterBOARD mAP L-2nD + * - MikroTik RouterBOARD 911-2Hn (911 Lite2) + * - MikroTik RouterBOARD 911-5Hn (911 Lite5) * - MikroTik RouterBOARD 941L-2nD * - MikroTik RouterBOARD 951Ui-2nD * - MikroTik RouterBOARD 952Ui-5ac2nD @@ -137,40 +139,17 @@ static struct flash_platform_data rbspi_spi_flash_data = { .nr_parts = ARRAY_SIZE(rbspi_spi_partitions), }; -/* Several boards only have a single reset button, wired to GPIO 1, 16 or 20 */ -#define RBSPI_GPIO_BTN_RESET01 1 -#define RBSPI_GPIO_BTN_RESET16 16 -#define RBSPI_GPIO_BTN_RESET20 20 - -static struct gpio_keys_button rbspi_gpio_keys_reset01[] __initdata = { +/* + * Several boards only have a single reset button, use a common + * structure for that. + */ +static struct gpio_keys_button rbspi_gpio_keys_reset[] __initdata = { { .desc = "Reset button", .type = EV_KEY, .code = KEY_RESTART, .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL, - .gpio = RBSPI_GPIO_BTN_RESET01, - .active_low = 1, - }, -}; - -static struct gpio_keys_button rbspi_gpio_keys_reset16[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL, - .gpio = RBSPI_GPIO_BTN_RESET16, - .active_low = 1, - }, -}; - -static struct gpio_keys_button rbspi_gpio_keys_reset20[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL, - .gpio = RBSPI_GPIO_BTN_RESET20, + .gpio = -ENOENT, /* filled dynamically */ .active_low = 1, }, }; @@ -180,6 +159,7 @@ static struct gpio_keys_button rbspi_gpio_keys_reset20[] __initdata = { #define RBMAPL_GPIO_LED_USER 14 #define RBMAPL_GPIO_LED_ETH 4 #define RBMAPL_GPIO_LED_WLAN 11 +#define RBMAPL_GPIO_BTN_RESET 16 static struct gpio_led rbmapl_leds[] __initdata = { { @@ -204,6 +184,8 @@ static struct gpio_led rbmapl_leds[] __initdata = { /* RB 941L-2nD gpios */ #define RBHAPL_GPIO_LED_USER 14 +#define RBHAPL_GPIO_BTN_RESET 16 + static struct gpio_led rbhapl_leds[] __initdata = { { .name = "rb:green:user", @@ -228,6 +210,7 @@ static struct gpio_led rbhapl_leds[] __initdata = { #define RB952_GPIO_LED_USER 4 #define RB952_GPIO_POE_POWER 14 #define RB952_GPIO_POE_STATUS 12 +#define RB952_GPIO_BTN_RESET 16 #define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER) #define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1) #define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2) @@ -274,6 +257,7 @@ static struct gpio_led rb952_leds[] __initdata = { #define RB962_GPIO_POE_POWER 3 #define RB962_GPIO_LED_USER 12 #define RB962_GPIO_USB_POWER 13 +#define RB962_GPIO_BTN_RESET 20 static struct gpio_led rb962_leds_gpio[] __initdata = { { @@ -348,6 +332,7 @@ static struct mdio_board_info rb962_mdio0_info[] = { /* RB wAP-2nD gpios */ #define RBWAP_GPIO_LED_USER 14 #define RBWAP_GPIO_LED_WLAN 11 +#define RBWAP_GPIO_BTN_RESET 16 static struct gpio_led rbwap_leds[] __initdata = { { @@ -396,6 +381,7 @@ static struct gpio_led rbcap_leds[] __initdata = { #define RBMAP_SSR_BIT_LED_WLAN 4 #define RBMAP_SSR_BIT_USB_POWER 5 #define RBMAP_SSR_BIT_LED_APCAP 6 +#define RBMAP_GPIO_BTN_RESET 16 #define RBMAP_GPIO_SSR_CS 11 #define RBMAP_GPIO_LED_POWER 4 #define RBMAP_GPIO_POE_POWER 14 @@ -489,22 +475,12 @@ static struct gpio_led rblhg_leds[] __initdata = { }, }; -static struct gpio_keys_button rblhg_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RBSPI_KEYS_DEBOUNCE_INTERVAL, - .gpio = RBLHG_GPIO_BTN_RESET, - .active_low = 1, - }, -}; - /* RB w APG-5HacT2HnD (wAP AC) gpios*/ #define RBWAPGSC_LED1 1 #define RBWAPGSC_LED2 8 #define RBWAPGSC_LED3 9 #define RBWAPGSC_POWERLED 16 +#define RBWAPGSC_GPIO_BTN_RESET 1 #define RBWAPGSC_GPIO_MDIO_MDC 12 #define RBWAPGSC_GPIO_MDIO_DATA 11 #define RBWAPGSC_MDIO_PHYADDR 0 @@ -535,6 +511,56 @@ static struct platform_device rbwapgsc_phy_device = { }, }; +/* RB911L GPIOs */ +#define RB911L_GPIO_BTN_RESET 15 +#define RB911L_GPIO_LED_1 13 +#define RB911L_GPIO_LED_2 12 +#define RB911L_GPIO_LED_3 4 +#define RB911L_GPIO_LED_4 21 +#define RB911L_GPIO_LED_5 18 +#define RB911L_GPIO_LED_ETH 20 +#define RB911L_GPIO_LED_POWER 11 +#define RB911L_GPIO_LED_USER 3 +#define RB911L_GPIO_PIN_HOLE 14 /* for reference */ + +static struct gpio_led rb911l_leds[] __initdata = { + { + .name = "rb:green:eth", + .gpio = RB911L_GPIO_LED_ETH, + .active_low = 1, + }, { + .name = "rb:green:led1", + .gpio = RB911L_GPIO_LED_1, + .active_low = 1, + }, { + .name = "rb:green:led2", + .gpio = RB911L_GPIO_LED_2, + .active_low = 1, + }, { + .name = "rb:green:led3", + .gpio = RB911L_GPIO_LED_3, + .active_low = 1, + }, { + .name = "rb:green:led4", + .gpio = RB911L_GPIO_LED_4, + .active_low = 1, + }, { + .name = "rb:green:led5", + .gpio = RB911L_GPIO_LED_5, + .active_low = 1, + }, { + .name = "rb:green:power", + .gpio = RB911L_GPIO_LED_POWER, + .default_state = LEDS_GPIO_DEFSTATE_ON, + .open_drain = 1, + }, { + .name = "rb:green:user", + .gpio = RB911L_GPIO_LED_USER, + .active_low = 1, + .open_drain = 1, + }, +}; + static struct gen_74x164_chip_platform_data rbspi_ssr_data = { .base = RBSPI_SSR_GPIO_BASE, .num_registers = 1, @@ -590,7 +616,7 @@ void __init rbspi_wlan_init(u16 id, int wmac_offset) /* * Common platform init routine for all SPI NOR devices. */ -static int __init rbspi_platform_setup(void) +static __init const struct rb_info *rbspi_platform_setup(void) { const struct rb_info *info; char buf[RBSPI_MACH_BUFLEN] = "MikroTik "; @@ -599,7 +625,7 @@ static int __init rbspi_platform_setup(void) info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x20000); if (!info) - return -ENODEV; + return NULL; if (info->board_name) { str = "RouterBOARD "; @@ -617,7 +643,7 @@ static int __init rbspi_platform_setup(void) /* fix partitions based on flash parsing */ rbspi_init_partitions(info); - return 0; + return info; } /* @@ -690,6 +716,14 @@ static void __init rbspi_network_setup(u32 flags, int gmac1_offset, rbspi_wlan_init(1, wmac1_offset); } +static __init void rbspi_register_reset_button(int gpio) +{ + rbspi_gpio_keys_reset[0].gpio = gpio; + ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, + ARRAY_SIZE(rbspi_gpio_keys_reset), + rbspi_gpio_keys_reset); +} + /* * Init the mAP lite hardware (QCA953x). * The mAP L-2nD (mAP lite) has a single ethernet port, connected to PHY0. @@ -701,7 +735,7 @@ static void __init rbmapl_setup(void) { u32 flags = RBSPI_HAS_WLAN0; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); @@ -712,9 +746,7 @@ static void __init rbmapl_setup(void) ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmapl_leds), rbmapl_leds); /* mAP lite has a single reset button as gpio 16 */ - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbspi_gpio_keys_reset16), - rbspi_gpio_keys_reset16); + rbspi_register_reset_button(RBMAPL_GPIO_BTN_RESET); /* clear internal multiplexing */ ath79_gpio_output_select(RBMAPL_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO); @@ -732,7 +764,7 @@ static void __init rbhapl_setup(void) { u32 flags = RBSPI_HAS_WLAN0; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); @@ -743,9 +775,7 @@ static void __init rbhapl_setup(void) ath79_register_leds_gpio(-1, ARRAY_SIZE(rbhapl_leds), rbhapl_leds); /* hAP lite has a single reset button as gpio 16 */ - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbspi_gpio_keys_reset16), - rbspi_gpio_keys_reset16); + rbspi_register_reset_button(RBHAPL_GPIO_BTN_RESET); } /* @@ -777,9 +807,7 @@ static void __init rbspi_952_750r2_setup(u32 flags) ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds), rb952_leds); /* These devices have a single reset button as gpio 16 */ - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbspi_gpio_keys_reset16), - rbspi_gpio_keys_reset16); + rbspi_register_reset_button(RB952_GPIO_BTN_RESET); } /* @@ -798,7 +826,7 @@ static void __init rb952_setup(void) u32 flags = RBSPI_HAS_WAN4 | RBSPI_HAS_USB | RBSPI_HAS_SSR | RBSPI_HAS_POE; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; /* differentiate the hAP from the hAP ac lite */ @@ -821,7 +849,7 @@ static void __init rb750upr2_setup(void) { u32 flags = RBSPI_HAS_WAN4 | RBSPI_HAS_SSR; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; /* differentiate the hEX lite from the hEX PoE lite */ @@ -851,7 +879,7 @@ static void __init rb962_setup(void) { u32 flags = RBSPI_HAS_USB | RBSPI_HAS_POE | RBSPI_HAS_PCI; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); @@ -892,9 +920,7 @@ static void __init rb962_setup(void) rb962_leds_gpio); /* This device has a single reset button as gpio 20 */ - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbspi_gpio_keys_reset20), - rbspi_gpio_keys_reset20); + rbspi_register_reset_button(RB962_GPIO_BTN_RESET); } /* @@ -906,7 +932,7 @@ static void __init rblhg_setup(void) { u32 flags = RBSPI_HAS_WLAN1 | RBSPI_HAS_MDIO1; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); @@ -916,9 +942,7 @@ static void __init rblhg_setup(void) ath79_register_leds_gpio(-1, ARRAY_SIZE(rblhg_leds), rblhg_leds); - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rblhg_gpio_keys), - rblhg_gpio_keys); + rbspi_register_reset_button(RBLHG_GPIO_BTN_RESET); } /* @@ -929,7 +953,7 @@ static void __init rbwap_setup(void) { u32 flags = RBSPI_HAS_WLAN0; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); @@ -940,9 +964,7 @@ static void __init rbwap_setup(void) ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwap_leds), rbwap_leds); /* wAP has a single reset button as GPIO 16 */ - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbspi_gpio_keys_reset16), - rbspi_gpio_keys_reset16); + rbspi_register_reset_button(RBWAP_GPIO_BTN_RESET); } /* @@ -953,7 +975,7 @@ static void __init rbcap_setup(void) { u32 flags = RBSPI_HAS_WLAN0; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); @@ -978,7 +1000,7 @@ static void __init rbmap_setup(void) u32 flags = RBSPI_HAS_USB | RBSPI_HAS_WLAN0 | RBSPI_HAS_SSR | RBSPI_HAS_POE; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_spi_cs_gpios[1] = RBMAP_GPIO_SSR_CS; @@ -1002,9 +1024,7 @@ static void __init rbmap_setup(void) ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds); /* mAP 2nD has a single reset button as gpio 16 */ - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbspi_gpio_keys_reset16), - rbspi_gpio_keys_reset16); + rbspi_register_reset_button(RBMAP_GPIO_BTN_RESET); } /* @@ -1017,7 +1037,7 @@ static void __init rbwapgsc_setup(void) { u32 flags = RBSPI_HAS_PCI; - if (rbspi_platform_setup()) + if (!rbspi_platform_setup()) return; rbspi_peripherals_setup(flags); @@ -1037,9 +1057,7 @@ static void __init rbwapgsc_setup(void) rbspi_wlan_init(1, 2); - ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbspi_gpio_keys_reset01), - rbspi_gpio_keys_reset01); + rbspi_register_reset_button(RBWAPGSC_GPIO_BTN_RESET); ath79_gpio_function_enable(QCA955X_GPIO_FUNC_JTAG_DISABLE| QCA955X_GPIO_REG_OUT_FUNC4| @@ -1049,8 +1067,53 @@ static void __init rbwapgsc_setup(void) rbwapgsc_leds); } +/* + * Setup the 911L hardware (AR9344). + */ +static void __init rb911l_setup(void) +{ + const struct rb_info *info; + + info = rbspi_platform_setup(); + if (!info) + return; + + if (!rb_has_hw_option(info, RB_HW_OPT_NO_NAND)) { + /* + * Old hardware revisions might be equipped with a NAND flash + * chip instead of the 16MiB SPI NOR device. Those boards are + * not supported at the moment, so throw a warning and skip + * the peripheral setup to avoid messing up the data in the + * flash chip. + */ + WARN(1, "The NAND flash on this board is not supported.\n"); + } else { + rbspi_peripherals_setup(0); + } + + ath79_register_mdio(1, 0x0); + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(1); + + rbspi_wlan_init(0, 1); + + rbspi_register_reset_button(RB911L_GPIO_BTN_RESET); + + /* Make the eth LED controllable by software. */ + ath79_gpio_output_select(RB911L_GPIO_LED_ETH, AR934X_GPIO_OUT_GPIO); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rb911l_leds), rb911l_leds); +} + MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup); MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup); +MIPS_MACHINE_NONAME(ATH79_MACH_RB_911L, "911L", rb911l_setup); MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup); MIPS_MACHINE_NONAME(ATH79_MACH_RB_962, "962", rb962_setup); MIPS_MACHINE_NONAME(ATH79_MACH_RB_750UPR2, "750-hb", rb750upr2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-re450.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-re450.c index 25de6e729..991aa1c9a 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-re450.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-re450.c @@ -1,9 +1,10 @@ /* - * TP-LINK Archer RE450 board support + * TP-LINK RE355/RE450 board support * * Copyright (c) 2013 Gabor Juhos * Copyright (c) 2016 Tal Keren - * + * Copyright (c) 2018 Henryk Heisig + * * Based on the Qualcomm Atheros AP135/AP136 reference board support code * Copyright (c) 2012 Qualcomm Atheros * @@ -72,6 +73,42 @@ static struct flash_platform_data tl_re450_flash_data = { .part_probes = tl_re450_part_probes, }; +static struct gpio_led re355_leds_gpio[] __initdata = { + { + .name = "re355:blue:power", + .gpio = RE450_GPIO_LED_SYSTEM, + .active_low = 1, + }, + { + .name = "re355:blue:wlan2g", + .gpio = RE450_GPIO_LED_WLAN2G, + .active_low = 1, + }, + { + .name = "re355:blue:wlan5g", + .gpio = RE450_GPIO_LED_WLAN5G, + .active_low = 1, + }, + { + .name = "re355:blue:wps", + .gpio = RE450_GPIO_LED_JUMPSTART, + }, + { + .name = "re355:red:wps", + .gpio = RE450_GPIO_LED_JUMPSTART_RED, + }, + { + .name = "re355:green:lan_data", + .gpio = RE450_GPIO_LED_LAN_DATA, + .active_low = 1, + }, + { + .name = "re355:green:lan_link", + .gpio = RE450_GPIO_LED_LAN_LINK, + .active_low = 1, + }, +}; + static struct gpio_led re450_leds_gpio[] __initdata = { { .name = "re450:blue:power", @@ -149,15 +186,13 @@ static struct platform_device re450_phy_device = { }, }; -static void __init re450_setup(void) +static void __init rex5x_setup(void) { u8 *mac = (u8 *) KSEG1ADDR(0x1f610008); u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); u8 tmpmac[ETH_ALEN]; ath79_register_m25p80(&tl_re450_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(re450_leds_gpio), - re450_leds_gpio); ath79_register_gpio_keys_polled(-1, RE450_KEYS_POLL_INTERVAL, ARRAY_SIZE(re450_gpio_keys), re450_gpio_keys); @@ -183,5 +218,22 @@ static void __init re450_setup(void) ath79_register_eth(0); } +static void __init re355_setup(void) +{ + rex5x_setup(); + ath79_register_leds_gpio(-1, ARRAY_SIZE(re355_leds_gpio), + re355_leds_gpio); +} + +MIPS_MACHINE(ATH79_MACH_RE355, "RE355", "TP-LINK RE355", + re355_setup) + +static void __init re450_setup(void) +{ + rex5x_setup(); + ath79_register_leds_gpio(-1, ARRAY_SIZE(re450_leds_gpio), + re450_leds_gpio); +} + MIPS_MACHINE(ATH79_MACH_RE450, "RE450", "TP-LINK RE450", re450_setup) diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rme-eg200.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rme-eg200.c new file mode 100644 index 000000000..332b0780d --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rme-eg200.c @@ -0,0 +1,99 @@ +/* + * eTactica EG-200 board, based on 8devices Carambola2 module + * + * Copyright (C) 2015 Karl Palsson + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define RME_EG200_GPIO_LED_WLAN 0 +#define RME_EG200_GPIO_LED_ETH0 13 +#define RME_EG200_GPIO_LED_ETACTICA 15 +#define RME_EG200_GPIO_LED_MODBUS 16 + +#define RME_EG200_GPIO_BTN_RESTORE 11 + +#define RME_EG200_KEYS_POLL_INTERVAL 20 /* msecs */ +#define RME_EG200_KEYS_DEBOUNCE_INTERVAL (3 * RME_EG200_KEYS_POLL_INTERVAL) + +#define RME_EG200_MAC0_OFFSET 0x0000 +#define RME_EG200_CALDATA_OFFSET 0x1000 +#define RME_EG200_WMAC_MAC_OFFSET 0x1002 + +static struct gpio_led rme_eg200_leds_gpio[] __initdata = { + { + .name = "eg200:red:wlan", + .gpio = RME_EG200_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "eg200:red:eth0", + .gpio = RME_EG200_GPIO_LED_ETH0, + .active_low = 1, + }, { + .name = "eg200:red:etactica", + .gpio = RME_EG200_GPIO_LED_ETACTICA, + .active_low = 0, + }, { + .name = "eg200:red:modbus", + .gpio = RME_EG200_GPIO_LED_MODBUS, + .active_low = 0, + } +}; + +static struct gpio_keys_button rme_eg200_keys[] __initdata = { + { + .desc = "restore button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = RME_EG200_KEYS_DEBOUNCE_INTERVAL, + .gpio = RME_EG200_GPIO_BTN_RESTORE, + .active_low = 1, + }, +}; + +static void __init rme_eg200_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + ath79_register_wmac(art + RME_EG200_CALDATA_OFFSET, + art + RME_EG200_WMAC_MAC_OFFSET); + + ath79_setup_ar933x_phy4_switch(true, true); + + ath79_init_mac(ath79_eth0_data.mac_addr, art + RME_EG200_MAC0_OFFSET, 0); + + ath79_register_mdio(0, 0x0); + + /* WAN port */ + ath79_register_eth(0); + + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rme_eg200_leds_gpio), + rme_eg200_leds_gpio); + ath79_register_gpio_keys_polled(-1, RME_EG200_KEYS_POLL_INTERVAL, + ARRAY_SIZE(rme_eg200_keys), + rme_eg200_keys); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_RME_EG200, "RME-EG200", "eTactica EG-200", + rme_eg200_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-t830.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-t830.c new file mode 100644 index 000000000..ffdb2ca53 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-t830.c @@ -0,0 +1,127 @@ +/* + * YunCore T830 board support + * + * Copyright (C) 2018 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define T830_GPIO_LED_LAN1 16 +#define T830_GPIO_LED_LAN2 15 +#define T830_GPIO_LED_LAN3 14 +#define T830_GPIO_LED_LAN4 11 +#define T830_GPIO_LED_USB 13 +#define T830_GPIO_LED_WAN 4 +#define T830_GPIO_LED_WLAN 12 + +#define T830_GPIO_BTN_RESET 17 + +#define T830_KEYS_POLL_INTERVAL 20 /* msec */ +#define T830_KEYS_DEBOUNCE_INTERVAL (3 * T830_KEYS_POLL_INTERVAL) + +#define T830_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led t830_gpio_leds[] __initdata = { + { + .name = "t830:green:lan1", + .gpio = T830_GPIO_LED_LAN1, + .active_low = 1, + }, { + .name = "t830:green:lan2", + .gpio = T830_GPIO_LED_LAN2, + .active_low = 1, + }, { + .name = "t830:green:lan3", + .gpio = T830_GPIO_LED_LAN3, + .active_low = 1, + }, { + .name = "t830:green:lan4", + .gpio = T830_GPIO_LED_LAN4, + .active_low = 1, + }, { + .name = "t830:green:usb", + .gpio = T830_GPIO_LED_USB, + .active_low = 1, + .default_state = LEDS_GPIO_DEFSTATE_KEEP, + }, { + .name = "t830:green:wan", + .gpio = T830_GPIO_LED_WAN, + .active_low = 1, + }, { + .name = "t830:green:wlan", + .gpio = T830_GPIO_LED_WLAN, + .active_low = 1, + }, +}; + +static struct gpio_keys_button t830_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = T830_KEYS_DEBOUNCE_INTERVAL, + .gpio = T830_GPIO_BTN_RESET, + .active_low = 1, + }, +}; + +static void __init t830_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff1000); + u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + + ath79_setup_ar933x_phy4_switch(false, false); + + ath79_register_mdio(0, 0x0); + + ath79_switch_data.phy4_mii_en = 1; + ath79_switch_data.phy_poll_mask |= BIT(4); + + /* LAN */ + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_init_mac(ath79_eth1_data.mac_addr, mac + 6, 0); + ath79_register_eth(1); + + /* WAN */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = BIT(4); + ath79_eth0_data.speed = SPEED_100; + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_register_eth(0); + + ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, + AR934X_GPIO_FUNC_CLK_OBS4_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(t830_gpio_leds), + t830_gpio_leds); + + ath79_register_gpio_keys_polled(-1, T830_KEYS_POLL_INTERVAL, + ARRAY_SIZE(t830_gpio_keys), + t830_gpio_keys); + + ath79_register_usb(); + ath79_register_wmac(art, NULL); +} + +MIPS_MACHINE(ATH79_MACH_T830, "T830", "YunCore T830", t830_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr940n-v4.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr940n-v4.c index d693b947c..b530622d9 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr940n-v4.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr940n-v4.c @@ -1,5 +1,5 @@ /* - * TP-LINK TL-WR940N v4 board support + * TP-LINK TL-WR940N v4 and v6 board support * * Copyright (C) 2016 David Lutz * @@ -32,12 +32,15 @@ #define TL_WR940N_V4_GPIO_LED_LAN1 8 #define TL_WR940N_V4_GPIO_LED_WLAN 7 #define TL_WR940N_V4_GPIO_LED_SYSTEM 5 +/* WR940N v6 specific GPIO*/ +#define TL_WR940N_V6_GPIO_LED_DIAG_ORANGE 15 +#define TL_WR940N_V6_GPIO_LED_WAN_BLUE 14 #define TL_WR940N_V4_GPIO_BTN_RESET 1 #define TL_WR940N_V4_GPIO_BTN_RFKILL 2 -#define TL_WR940N_V4_KEYS_POLL_INTERVAL 20 -#define TL_WR940N_V4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR940N_V4_KEYS_POLL_INTERVAL) +#define TL_WR940N_KEYS_POLL_INTERVAL 20 +#define TL_WR940N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR940N_KEYS_POLL_INTERVAL) static struct gpio_led tl_wr940n_v4_leds_gpio[] __initdata = { @@ -93,43 +96,49 @@ static struct gpio_keys_button tl_wr940n_v4_gpio_keys[] __initdata = { .desc = "Reset button", .type = EV_KEY, .code = KEY_RESTART, - .debounce_interval = TL_WR940N_V4_KEYS_DEBOUNCE_INTERVAL, + .debounce_interval = TL_WR940N_KEYS_DEBOUNCE_INTERVAL, .gpio = TL_WR940N_V4_GPIO_BTN_RESET, .active_low = 1, }, { .desc = "RFKILL button", .type = EV_KEY, .code = KEY_RFKILL, - .debounce_interval = TL_WR940N_V4_KEYS_DEBOUNCE_INTERVAL, + .debounce_interval = TL_WR940N_KEYS_DEBOUNCE_INTERVAL, .gpio = TL_WR940N_V4_GPIO_BTN_RFKILL, .active_low = 1, } }; +static struct gpio_led tl_wr940n_v6_leds_gpio[] __initdata = { + { + .name = "tp-link:blue:wan", + .gpio = TL_WR940N_V6_GPIO_LED_WAN_BLUE, + .active_low = 1, + }, + { + .name = "tp-link:orange:diag", + .gpio = TL_WR940N_V6_GPIO_LED_DIAG_ORANGE, + .active_low = 0, + }, +}; -static const char *tl_wr940n_v4_part_probes[] = { + +static const char *tl_wr940n_part_probes[] = { "tp-link", NULL, }; -static struct flash_platform_data tl_wr940n_v4_flash_data = { - .part_probes = tl_wr940n_v4_part_probes, +static struct flash_platform_data tl_wr940n_flash_data = { + .part_probes = tl_wr940n_part_probes, }; -static void __init tl_wr940n_v4_setup(void) +static void __init tl_wr940n_setup(void) { u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - ath79_register_m25p80(&tl_wr940n_v4_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr940n_v4_leds_gpio), - tl_wr940n_v4_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WR940N_V4_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr940n_v4_gpio_keys), - tl_wr940n_v4_gpio_keys); + ath79_register_m25p80(&tl_wr940n_flash_data); ath79_register_mdio(0, 0x0); @@ -145,5 +154,31 @@ static void __init tl_wr940n_v4_setup(void) } +static void __init tl_wr940n_v4_setup(void) +{ + tl_wr940n_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr940n_v4_leds_gpio), + tl_wr940n_v4_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TL_WR940N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr940n_v4_gpio_keys), + tl_wr940n_v4_gpio_keys); +} + +static void __init tl_wr940n_v6_setup(void) +{ + tl_wr940n_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr940n_v6_leds_gpio), + tl_wr940n_v6_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TL_WR940N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr940n_v4_gpio_keys), + tl_wr940n_v4_gpio_keys); +} + MIPS_MACHINE(ATH79_MACH_TL_WR940N_V4, "TL-WR940N-v4", "TP-LINK TL-WR940N v4", tl_wr940n_v4_setup); +MIPS_MACHINE(ATH79_MACH_TL_WR940N_V6, "TL-WR940N-v6", "TP-LINK TL-WR940N v6", + tl_wr940n_v6_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c index 55cf52d19..8dc0be41a 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt-xm.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -96,7 +97,9 @@ static void __init ubnt_xm_init(void) ap91_pci_init(eeprom, NULL); ath79_register_mdio(0, ~UBNT_M_WAN_PHYMASK); + ath79_eth0_data.speed = SPEED_100; ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); + ath79_eth1_data.speed = SPEED_100; ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); ath79_register_eth(0); } @@ -503,6 +506,60 @@ static void __init ubnt_loco_m_xw_setup(void) ath79_register_eth(0); } +#define UBNT_LBE_M5_GPIO_LED_LAN 13 +#define UBNT_LBE_M5_GPIO_LED_WLAN 14 +#define UBNT_LBE_M5_GPIO_LED_SYS 16 + +static struct gpio_led ubnt_lbe_m5_leds_gpio[] __initdata = { + { + .name = "ubnt:green:lan", + .gpio = UBNT_LBE_M5_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "ubnt:green:wlan", + .gpio = UBNT_LBE_M5_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "ubnt:green:sys", + .gpio = UBNT_LBE_M5_GPIO_LED_SYS, + .active_low = 1, + }, +}; + +static void __init ubnt_lbe_m5_setup(void) +{ + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(NULL); + + ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL); + ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_lbe_m5_leds_gpio), + ubnt_lbe_m5_leds_gpio); + ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ubnt_xm_gpio_keys), + ubnt_xm_gpio_keys); + + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_MII_GMAC0 | + AR934X_ETH_CFG_MII_GMAC0_SLAVE); + ath79_init_mac(ath79_eth0_data.mac_addr, + eeprom + UAP_PRO_MAC0_OFFSET, 0); + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; + + gpio_request_one(0, GPIOF_OUT_INIT_LOW | GPIOF_ACTIVE_LOW | + GPIOF_EXPORT_DIR_FIXED, "SPI nWP"); + + mdiobus_register_board_info(ubnt_loco_m_xw_mdio_info, + ARRAY_SIZE(ubnt_loco_m_xw_mdio_info)); + + ath79_register_mdio(0, ~BIT(1)); + ath79_eth0_data.phy_mask = BIT(1); + ath79_register_eth(0); +} + static void __init ubnt_rocket_m_xw_setup(void) { u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000); @@ -590,6 +647,9 @@ static void __init ubnt_rocket_m_ti_setup(void) MIPS_MACHINE(ATH79_MACH_UBNT_NANO_M_XW, "UBNT-NM-XW", "Ubiquiti Nanostation M XW", ubnt_nano_m_xw_setup); +MIPS_MACHINE(ATH79_MACH_UBNT_LBE_M5, "UBNT-LBE-M5", "Ubiquiti Litebeam M5", + ubnt_lbe_m5_setup); + MIPS_MACHINE(ATH79_MACH_UBNT_LOCO_M_XW, "UBNT-LOCO-XW", "Ubiquiti Loco M XW", ubnt_loco_m_xw_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wam250.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wam250.c new file mode 100644 index 000000000..31817bddf --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wam250.c @@ -0,0 +1,122 @@ +/* + * Samsung WAM250 board support + * + * Copyright (C) 2018 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define WAM250_GPIO_LED_LAN 13 +#define WAM250_GPIO_LED_POWER 15 +#define WAM250_GPIO_LED_REPEATER 14 +#define WAM250_GPIO_LED_WLAN 12 + +#define WAM250_GPIO_BTN_RESET 17 +#define WAM250_GPIO_BTN_SPKADD 1 + +#define WAM250_GPIO_EXT_LNA 19 + +#define WAM250_MAC_OFFSET 2 + +#define WAM250_KEYS_POLL_INTERVAL 20 +#define WAM250_KEYS_DEBOUNCE_INTERVAL (3 * WAM250_KEYS_POLL_INTERVAL) + +static struct gpio_led wam250_leds_gpio[] __initdata = { + { + .name = "wam250:white:lan", + .gpio = WAM250_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "wam250:white:power", + .gpio = WAM250_GPIO_LED_POWER, + .default_state = LEDS_GPIO_DEFSTATE_KEEP, + .active_low = 1, + }, { + .name = "wam250:white:repeater", + .gpio = WAM250_GPIO_LED_REPEATER, + .active_low = 1, + }, { + .name = "wam250:white:wlan", + .gpio = WAM250_GPIO_LED_WLAN, + .active_low = 1, + }, +}; + +static struct gpio_keys_button wam250_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WAM250_KEYS_DEBOUNCE_INTERVAL, + .gpio = WAM250_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WAM250_KEYS_DEBOUNCE_INTERVAL, + .gpio = WAM250_GPIO_BTN_SPKADD, + .active_low = 1, + }, +}; + +static void __init wam250_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(NULL); + + ath79_register_mdio(1, 0x0); + + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); + + ath79_switch_data.phy4_mii_en = 1; + ath79_switch_data.phy_poll_mask = 0xfd; + + /* LAN */ + ath79_eth1_data.duplex = DUPLEX_FULL; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_eth1_data.phy_mask = BIT(1); + ath79_init_mac(ath79_eth1_data.mac_addr, art + WAM250_MAC_OFFSET, 0); + ath79_register_eth(1); + + /* WAN */ + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.speed = SPEED_100; + ath79_init_mac(ath79_eth0_data.mac_addr, art + WAM250_MAC_OFFSET, 1); + ath79_register_eth(0); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wam250_leds_gpio), + wam250_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WAM250_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wam250_gpio_keys), + wam250_gpio_keys); + + ath79_wmac_set_ext_lna_gpio(0, WAM250_GPIO_EXT_LNA); + + ath79_register_usb(); + ath79_register_wmac(art, NULL); +} + +MIPS_MACHINE(ATH79_MACH_WAM250, "WAM250", "Samsung WAM250", wam250_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wifi-pineapple-nano.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wifi-pineapple-nano.c new file mode 100644 index 000000000..645f367f6 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wifi-pineapple-nano.c @@ -0,0 +1,107 @@ +/* + * Hak5 WiFi Pineapple NANO board support + * + * Copyright (C) 2018 Sebastian Kinne + * Copyright (C) 2018 Piotr Dymacz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define WIFI_PINEAPPLE_NANO_GPIO_LED_SYSTEM 18 + +#define WIFI_PINEAPPLE_NANO_GPIO_BTN_RESET 12 +#define WIFI_PINEAPPLE_NANO_GPIO_SD_DET 19 +#define WIFI_PINEAPPLE_NANO_GPIO_USB_ALARM 20 +#define WIFI_PINEAPPLE_NANO_GPIO_USB_POWER 23 + +#define HAK5_KEYS_POLL_INTERVAL 20 /* msecs */ +#define HAK5_KEYS_DEBOUNCE_INTERVAL (3 * HAK5_KEYS_POLL_INTERVAL) + +#define WIFI_PINEAPPLE_NANO_MAC1_OFFSET 0x0006 +#define WIFI_PINEAPPLE_NANO_CALDATA_OFFSET 0x1000 + +static const char *hak5_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data hak5_flash_data = { + .part_probes = hak5_part_probes, +}; + +static struct gpio_led wifi_pineapple_nano_leds_gpio[] __initdata = { + { + .name = "wifi-pineapple-nano:blue:system", + .gpio = WIFI_PINEAPPLE_NANO_GPIO_LED_SYSTEM, + .active_low = 1, + }, +}; + +static struct gpio_keys_button wifi_pineapple_nano_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = HAK5_KEYS_DEBOUNCE_INTERVAL, + .gpio = WIFI_PINEAPPLE_NANO_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static void __init wifi_pineapple_nano_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(&hak5_flash_data); + + ath79_setup_ar933x_phy4_switch(false, false); + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, + art + WIFI_PINEAPPLE_NANO_MAC1_OFFSET, 0); + ath79_register_eth(0); + + /* GPIO11/12 */ + ath79_gpio_function_disable(AR933X_GPIO_FUNC_UART_RTS_CTS_EN); + + gpio_request_one(WIFI_PINEAPPLE_NANO_GPIO_SD_DET, + GPIOF_IN | GPIOF_EXPORT_DIR_FIXED | GPIOF_ACTIVE_LOW, + "SD card present"); + + gpio_request_one(WIFI_PINEAPPLE_NANO_GPIO_USB_ALARM, + GPIOF_IN | GPIOF_EXPORT_DIR_FIXED | GPIOF_ACTIVE_LOW, + "USB alarm"); + + gpio_request_one(WIFI_PINEAPPLE_NANO_GPIO_USB_POWER, + GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED | + GPIOF_ACTIVE_LOW, "USB power"); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wifi_pineapple_nano_leds_gpio), + wifi_pineapple_nano_leds_gpio); + + ath79_register_gpio_keys_polled(-1, HAK5_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wifi_pineapple_nano_gpio_keys), + wifi_pineapple_nano_gpio_keys); + + ath79_register_usb(); + ath79_register_wmac(art + WIFI_PINEAPPLE_NANO_CALDATA_OFFSET, NULL); +} + +MIPS_MACHINE(ATH79_MACH_WIFI_PINEAPPLE_NANO, "WIFI-PINEAPPLE-NANO", + "Hak5 WiFi Pineapple NANO", wifi_pineapple_nano_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h index a621fe2c9..b61ed7abc 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/machtypes.h @@ -40,7 +40,7 @@ enum ath79_mach_type { ATH79_MACH_AP147_010, /* Atheros AP147-010 reference board */ ATH79_MACH_AP152, /* Atheros AP152 reference board */ ATH79_MACH_AP531B0, /* Rockeetech AP531B0 */ - ATH79_MACH_AP90Q, /* YunCore AP90Q */ + ATH79_MACH_AP90Q, /* YunCore AP80Q/AP90Q */ ATH79_MACH_AP91_5G, /* ALFA Network AP91-5G */ ATH79_MACH_AP96, /* Atheros AP96 */ ATH79_MACH_ARCHER_C25_V1, /* TP-LINK Archer C25 V1 board */ @@ -48,6 +48,7 @@ enum ath79_mach_type { ATH79_MACH_ARCHER_C58_V1, /* TP-LINK Archer C58 V1 board */ ATH79_MACH_ARCHER_C59_V1, /* TP-LINK Archer C59 V1 board */ ATH79_MACH_ARCHER_C60_V1, /* TP-LINK Archer C60 V1 board */ + ATH79_MACH_ARCHER_C60_V2, /* TP-LINK Archer C60 V2 board */ ATH79_MACH_ARCHER_C7, /* TP-LINK Archer C7 board */ ATH79_MACH_ARCHER_C7_V2, /* TP-LINK Archer C7 V2 board */ ATH79_MACH_ARCHER_C7_V4, /* TP-LINK Archer C7 V4 board */ @@ -64,8 +65,11 @@ enum ath79_mach_type { ATH79_MACH_CF_E316N_V2, /* COMFAST CF-E316N v2 */ ATH79_MACH_CF_E320N_V2, /* COMFAST CF-E320N v2 */ ATH79_MACH_CF_E355AC, /* COMFAST CF-E355AC */ + ATH79_MACH_CF_E355AC_V2, /* COMFAST CF-E355AC v2*/ + ATH79_MACH_CF_E375AC, /* COMFAST CF-E375AC */ ATH79_MACH_CF_E380AC_V1, /* COMFAST CF-E380AC v1 */ ATH79_MACH_CF_E380AC_V2, /* COMFAST CF-E380AC v2 */ + ATH79_MACH_CF_E385AC, /* COMFAST CF-E385AC */ ATH79_MACH_CF_E520N, /* COMFAST CF-E520N */ ATH79_MACH_CF_E530N, /* COMFAST CF-E530N */ ATH79_MACH_CPE210, /* TP-LINK CPE210 */ @@ -75,6 +79,7 @@ enum ath79_mach_type { ATH79_MACH_CPE870, /* YunCore CPE870 */ ATH79_MACH_CR3000, /* PowerCloud CR3000 */ ATH79_MACH_CR5000, /* PowerCloud CR5000 */ + ATH79_MACH_DAP_1330_A1, /* D-Link DAP-1330 rev. A1 */ ATH79_MACH_DAP_2695_A1, /* D-Link DAP-2695 rev. A1 */ ATH79_MACH_DB120, /* Atheros DB120 reference board */ ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */ @@ -97,6 +102,9 @@ enum ath79_mach_type { ATH79_MACH_DR344, /* Wallys DR344 */ ATH79_MACH_DR531, /* Wallys DR531 */ ATH79_MACH_DRAGINO2, /* Dragino Version 2 */ + ATH79_MACH_E1700AC_V2, /* Qxwlan E1700AC v2 */ + ATH79_MACH_E600G_V2, /* Qxwlan E600G v2 */ + ATH79_MACH_E600GAC_V2, /* Qxwlan E600GAC v2 */ ATH79_MACH_EAP120, /* TP-LINK EAP120 */ ATH79_MACH_EAP300V2, /* EnGenius EAP300 v2 */ ATH79_MACH_EAP7660D, /* Senao EAP7660D */ @@ -107,6 +115,7 @@ enum ath79_mach_type { ATH79_MACH_EPG5000, /* EnGenius EPG5000 */ ATH79_MACH_ESR1750, /* EnGenius ESR1750 */ ATH79_MACH_ESR900, /* EnGenius ESR900 */ + ATH79_MACH_EW_BALIN, /* embedded wireless Balin Platform */ ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */ ATH79_MACH_EW_DORIN_ROUTER, /* embedded wireless Dorin Router Platform */ ATH79_MACH_F9K1115V2, /* Belkin AC1750DB */ @@ -119,8 +128,10 @@ enum ath79_mach_type { ATH79_MACH_GL_INET, /* GL-CONNECT GL-INET */ ATH79_MACH_GL_MIFI, /* GL-MIFI support */ ATH79_MACH_GL_USB150, /* GL.iNet GL-USB150 */ - ATH79_MACH_GS_MINIBOX_V1, /* Gainstrong MiniBox V1.0 */ - ATH79_MACH_GS_OOLITE, /* GS OOLITE V1.0 */ + ATH79_MACH_GS_MINIBOX_V1, /* GainStrong MiniBox V1.0 */ + ATH79_MACH_GS_OOLITE_V1, /* GainStrong Oolite V1.0 */ + ATH79_MACH_GS_OOLITE_V5_2, /* GainStrong Oolite V5.2 */ + ATH79_MACH_GS_OOLITE_V5_2_DEV, /* GainStrong Oolite V5.2-Dev */ ATH79_MACH_HIVEAP_121, /* Aerohive HiveAP-121*/ ATH79_MACH_HIWIFI_HC6361, /* HiWiFi HC6361 */ ATH79_MACH_HORNET_UB, /* ALFA Networks Hornet-UB */ @@ -128,6 +139,7 @@ enum ath79_mach_type { ATH79_MACH_JA76PF2, /* jjPlus JA76PF2 */ ATH79_MACH_JWAP003, /* jjPlus JWAP003 */ ATH79_MACH_JWAP230, /* jjPlus JWAP230 */ + ATH79_MACH_LAN_TURTLE, /* Hak5 LAN Turtle */ ATH79_MACH_LIMA, /* 8devices Lima */ ATH79_MACH_MC_MAC1200R, /* MERCURY MAC1200R */ ATH79_MACH_MR12, /* Cisco Meraki MR12 */ @@ -163,6 +175,7 @@ enum ath79_mach_type { ATH79_MACH_OMY_G1, /* OMYlink OMY-G1 */ ATH79_MACH_OMY_X1, /* OMYlink OMY-X1 */ ATH79_MACH_ONION_OMEGA, /* ONION OMEGA */ + ATH79_MACH_PACKET_SQUIRREL, /* Hak5 Packet Squirrel */ ATH79_MACH_PB42, /* Atheros PB42 */ ATH79_MACH_PB44, /* Atheros PB44 reference board */ ATH79_MACH_PQI_AIR_PEN, /* PQI Air Pen */ @@ -190,6 +203,7 @@ enum ath79_mach_type { ATH79_MACH_RB_750UPR2, /* MikroTik RouterBOARD 750UP r2 */ ATH79_MACH_RB_751, /* MikroTik RouterBOARD 751 */ ATH79_MACH_RB_751G, /* Mikrotik RouterBOARD 751G */ + ATH79_MACH_RB_911L, /* Mikrotik RouterBOARD 911-2Hn/911-5Hn boards */ ATH79_MACH_RB_922GS, /* Mikrotik RouterBOARD 911/922GS boards */ ATH79_MACH_RB_941, /* MikroTik RouterBOARD 941-2nD */ ATH79_MACH_RB_951G, /* Mikrotik RouterBOARD 951G */ @@ -204,7 +218,9 @@ enum ath79_mach_type { ATH79_MACH_RB_WAPAC, /* Mikrotik RouterBOARD wAPG-5HacT2HnD */ ATH79_MACH_RB_SXTLITE2ND, /* Mikrotik RouterBOARD SXT Lite 2nD */ ATH79_MACH_RB_SXTLITE5ND, /* Mikrotik RouterBOARD SXT Lite 5nD */ + ATH79_MACH_RE355, /* TP-LINK RE355 */ ATH79_MACH_RE450, /* TP-LINK RE450 */ + ATH79_MACH_RME_EG200, /* eTactica EG200 */ ATH79_MACH_RUT9XX, /* Teltonika RUT900 series */ ATH79_MACH_RW2458N, /* Redwave RW2458N */ ATH79_MACH_SC1750, /* Abicom SC1750 */ @@ -213,6 +229,7 @@ enum ath79_mach_type { ATH79_MACH_SMART_300, /* NC-LINK SMART-300 */ ATH79_MACH_SOM9331, /* OpenEmbed SOM9331 */ ATH79_MACH_SR3200, /* YunCore SR3200 */ + ATH79_MACH_T830, /* YunCore T830 */ ATH79_MACH_TELLSTICK_ZNET_LITE, /* TellStick ZNet Lite */ ATH79_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */ ATH79_MACH_TEW_673GRU, /* TRENDnet TEW-673GRU */ @@ -282,12 +299,14 @@ enum ath79_mach_type { ATH79_MACH_TL_WR941ND_V5, /* TP-LINK TL-WR941ND v5 */ ATH79_MACH_TL_WR941ND_V6, /* TP-LINK TL-WR941ND v6 */ ATH79_MACH_TL_WR940N_V4, /* TP-LINK TL-WR940N v4 */ + ATH79_MACH_TL_WR940N_V6, /* TP-LINK TL-WR940N v6 */ ATH79_MACH_TL_WR942N_V1, /* TP-LINK TL-WR942N v1 */ ATH79_MACH_TUBE2H, /* Alfa Network Tube2H */ ATH79_MACH_UBNT_AIRGW, /* Ubiquiti AirGateway */ ATH79_MACH_UBNT_AIRGWP, /* Ubiquiti AirGateway Pro */ ATH79_MACH_UBNT_AIRROUTER, /* Ubiquiti AirRouter */ ATH79_MACH_UBNT_BULLET_M, /* Ubiquiti Bullet M */ + ATH79_MACH_UBNT_LBE_M5, /* Ubiquiti Litebeam M5 */ ATH79_MACH_UBNT_LOCO_M_XW, /* Ubiquiti Loco M XW */ ATH79_MACH_UBNT_LSSR71, /* Ubiquiti LS-SR71 */ ATH79_MACH_UBNT_LSX, /* Ubiquiti LSX */ @@ -305,12 +324,14 @@ enum ath79_mach_type { ATH79_MACH_UBNT_UNIFI_OUTDOOR, /* Ubiquiti UnifiAP Outdoor */ ATH79_MACH_UBNT_UNIFI_OUTDOOR_PLUS, /* Ubiquiti UnifiAP Outdoor+ */ ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ + ATH79_MACH_WAM250, /* Samsung WAM250 */ ATH79_MACH_WBS210, /* TP-LINK WBS210 */ ATH79_MACH_WBS510, /* TP-LINK WBS510 */ ATH79_MACH_WEIO, /* WeIO board */ ATH79_MACH_WHR_G301N, /* Buffalo WHR-G301N */ ATH79_MACH_WHR_HP_G300N, /* Buffalo WHR-HP-G300N */ ATH79_MACH_WHR_HP_GN, /* Buffalo WHR-HP-GN */ + ATH79_MACH_WIFI_PINEAPPLE_NANO, /* Hak5 WiFi Pineapple NANO */ ATH79_MACH_WLAE_AG300N, /* Buffalo WLAE-AG300N */ ATH79_MACH_WLR8100, /* SITECOM WLR-8100 */ ATH79_MACH_WNDAP360, /* NETGEAR WNDAP360 */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/routerboot.h b/target/linux/ar71xx/files/arch/mips/ath79/routerboot.h index c1d7fb9ee..cf189362d 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/routerboot.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/routerboot.h @@ -21,6 +21,32 @@ struct rb_info { u32 hw_options; }; +/* Bit definitions for hardware options */ +#define RB_HW_OPT_UART_ABSENT BIT(0) +#define RB_HW_OPT_HAS_VOLTAGE BIT(1) +#define RB_HW_OPT_HAS_USB BIT(2) +#define RB_HW_OPT_HAS_ATTINY BIT(3) +#define RB_HW_OPT_NO_NAND BIT(14) +#define RB_HW_OPT_HAS_LCD BIT(15) +#define RB_HW_OPT_HAS_POE_OUT BIT(16) +#define RB_HW_OPT_HAS_uSD BIT(17) +#define RB_HW_OPT_HAS_SFP BIT(20) +#define RB_HW_OPT_HAS_WIFI BIT(21) +#define RB_HW_OPT_HAS_TS_FOR_ADC BIT(22) +#define RB_HW_OPT_HAS_PLC BIT(29) + +static inline bool +rb_hw_option_match(const struct rb_info *info, u32 mask, u32 val) +{ + return (info->hw_options & (val | mask)) == val; +} + +static inline bool +rb_has_hw_option(const struct rb_info *info, u32 mask) +{ + return rb_hw_option_match(info, mask, mask); +} + #ifdef CONFIG_ATH79_ROUTERBOOT const struct rb_info *rb_init_info(void *data, unsigned int size); void *rb_get_wlan_data(void); diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h index 5fdc59c7b..c4c3a6d44 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h @@ -45,10 +45,6 @@ struct ag71xx_platform_data { void (*set_speed)(int speed); void (*update_pll)(u32 pll_10, u32 pll_100, u32 pll_1000); - u32 fifo_cfg1; - u32 fifo_cfg2; - u32 fifo_cfg3; - unsigned int max_frame_len; unsigned int desc_pktlen_mask; }; diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index a71281291..77ee5b36e 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -100,9 +100,8 @@ struct ag71xx_buf { }; union { dma_addr_t dma_addr; - unsigned long timestamp; + unsigned int len; }; - unsigned int len; }; struct ag71xx_ring { @@ -117,7 +116,9 @@ struct ag71xx_ring { struct ag71xx_mdio { struct mii_bus *mii_bus; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) int mii_irq[PHY_MAX_ADDR]; +#endif void __iomem *mdio_base; struct ag71xx_mdio_platform_data *pdata; }; @@ -153,20 +154,31 @@ struct ag71xx_debug { }; struct ag71xx { - void __iomem *mac_base; + /* + * Critical data related to the per-packet data path are clustered + * early in this structure to help improve the D-cache footprint. + */ + struct ag71xx_ring rx_ring ____cacheline_aligned; + struct ag71xx_ring tx_ring ____cacheline_aligned; + + unsigned int max_frame_len; + unsigned int desc_pktlen_mask; + unsigned int rx_buf_size; - spinlock_t lock; - struct platform_device *pdev; struct net_device *dev; + struct platform_device *pdev; + spinlock_t lock; struct napi_struct napi; u32 msg_enable; + /* + * From this point onwards we're not looking at per-packet fields. + */ + void __iomem *mac_base; + struct ag71xx_desc *stop_desc; dma_addr_t stop_desc_dma; - struct ag71xx_ring rx_ring; - struct ag71xx_ring tx_ring; - struct mii_bus *mii_bus; struct phy_device *phy_dev; void *phy_priv; @@ -175,10 +187,6 @@ struct ag71xx { unsigned int speed; int duplex; - unsigned int max_frame_len; - unsigned int desc_pktlen_mask; - unsigned int rx_buf_size; - struct delayed_work restart_work; struct delayed_work link_work; struct timer_list oom_timer; diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c index c86803c9c..20cf1c15c 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c @@ -175,8 +175,8 @@ static ssize_t read_file_ring(struct file *file, char __user *user_buf, return -ENOMEM; len += snprintf(buf + len, buflen - len, - "Idx ... %-8s %-8s %-8s %-8s . %-10s\n", - "desc", "next", "data", "ctrl", "timestamp"); + "Idx ... %-8s %-8s %-8s %-8s .\n", + "desc", "next", "data", "ctrl"); spin_lock_irqsave(&ag->lock, flags); @@ -184,12 +184,11 @@ static ssize_t read_file_ring(struct file *file, char __user *user_buf, dirty = (ring->dirty & ring_mask); desc_hw = ag71xx_rr(ag, desc_reg); for (i = 0; i < ring_size; i++) { - struct ag71xx_buf *ab = &ring->buf[i]; struct ag71xx_desc *desc = ag71xx_ring_desc(ring, i); u32 desc_dma = ((u32) ring->descs_dma) + i * AG71XX_DESC_SIZE; len += snprintf(buf + len, buflen - len, - "%3d %c%c%c %08x %08x %08x %08x %c %10lu\n", + "%3d %c%c%c %08x %08x %08x %08x %c\n", i, (i == curr) ? 'C' : ' ', (i == dirty) ? 'D' : ' ', @@ -198,8 +197,7 @@ static ssize_t read_file_ring(struct file *file, char __user *user_buf, desc->next, desc->data, desc->ctrl, - (desc->ctrl & DESC_EMPTY) ? 'E' : '*', - ab->timestamp); + (desc->ctrl & DESC_EMPTY) ? 'E' : '*'); } spin_unlock_irqrestore(&ag->lock, flags); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 93f8c5305..54ec8e67b 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -90,41 +90,6 @@ static inline void ag71xx_dump_intr(struct ag71xx *ag, char *label, u32 intr) (intr & AG71XX_INT_RX_BE) ? "RXBE " : ""); } -static void ag71xx_ring_free(struct ag71xx_ring *ring) -{ - int ring_size = BIT(ring->order); - kfree(ring->buf); - - if (ring->descs_cpu) - dma_free_coherent(NULL, ring_size * AG71XX_DESC_SIZE, - ring->descs_cpu, ring->descs_dma); -} - -static int ag71xx_ring_alloc(struct ag71xx_ring *ring) -{ - int ring_size = BIT(ring->order); - int err; - - ring->descs_cpu = dma_alloc_coherent(NULL, ring_size * AG71XX_DESC_SIZE, - &ring->descs_dma, GFP_ATOMIC); - if (!ring->descs_cpu) { - err = -ENOMEM; - goto err; - } - - - ring->buf = kzalloc(ring_size * sizeof(*ring->buf), GFP_KERNEL); - if (!ring->buf) { - err = -ENOMEM; - goto err; - } - - return 0; - -err: - return err; -} - static void ag71xx_ring_tx_clean(struct ag71xx *ag) { struct ag71xx_ring *ring = &ag->tx_ring; @@ -315,30 +280,56 @@ static int ag71xx_ring_rx_refill(struct ag71xx *ag) static int ag71xx_rings_init(struct ag71xx *ag) { - int ret; + struct ag71xx_ring *tx = &ag->tx_ring; + struct ag71xx_ring *rx = &ag->rx_ring; + int ring_size = BIT(tx->order) + BIT(rx->order); + int tx_size = BIT(tx->order); - ret = ag71xx_ring_alloc(&ag->tx_ring); - if (ret) - return ret; + tx->buf = kzalloc(ring_size * sizeof(*tx->buf), GFP_KERNEL); + if (!tx->buf) + return -ENOMEM; + + tx->descs_cpu = dma_alloc_coherent(NULL, ring_size * AG71XX_DESC_SIZE, + &tx->descs_dma, GFP_ATOMIC); + if (!tx->descs_cpu) { + kfree(tx->buf); + tx->buf = NULL; + return -ENOMEM; + } + + rx->buf = &tx->buf[BIT(tx->order)]; + rx->descs_cpu = ((void *)tx->descs_cpu) + tx_size * AG71XX_DESC_SIZE; + rx->descs_dma = tx->descs_dma + tx_size * AG71XX_DESC_SIZE; ag71xx_ring_tx_init(ag); + return ag71xx_ring_rx_init(ag); +} - ret = ag71xx_ring_alloc(&ag->rx_ring); - if (ret) - return ret; +static void ag71xx_rings_free(struct ag71xx *ag) +{ + struct ag71xx_ring *tx = &ag->tx_ring; + struct ag71xx_ring *rx = &ag->rx_ring; + int ring_size = BIT(tx->order) + BIT(rx->order); - ret = ag71xx_ring_rx_init(ag); - return ret; + if (tx->descs_cpu) + dma_free_coherent(NULL, ring_size * AG71XX_DESC_SIZE, + tx->descs_cpu, tx->descs_dma); + + kfree(tx->buf); + + tx->descs_cpu = NULL; + rx->descs_cpu = NULL; + tx->buf = NULL; + rx->buf = NULL; } static void ag71xx_rings_cleanup(struct ag71xx *ag) { ag71xx_ring_rx_clean(ag); - ag71xx_ring_free(&ag->rx_ring); - ag71xx_ring_tx_clean(ag); + ag71xx_rings_free(ag); + netdev_reset_queue(ag->dev); - ag71xx_ring_free(&ag->tx_ring); } static unsigned char *ag71xx_speed_str(struct ag71xx *ag) @@ -462,8 +453,8 @@ static void ag71xx_hw_setup(struct ag71xx *ag) /* setup FIFO configuration registers */ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); if (pdata->is_ar724x) { - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2); + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0010ffff); + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x015500aa); } else { ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000); ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff); @@ -605,7 +596,7 @@ __ag71xx_link_adjust(struct ag71xx *ag, bool update) if (pdata->is_ar91xx) fifo3 = 0x00780fff; else if (pdata->is_ar724x) - fifo3 = pdata->fifo_cfg3; + fifo3 = 0x01f00140; else fifo3 = 0x008001ff; @@ -825,7 +816,6 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, i = (ring->curr + n - 1) & ring_mask; ring->buf[i].len = skb->len; ring->buf[i].skb = skb; - ring->buf[i].timestamp = jiffies; netdev_sent_queue(dev, skb->len); @@ -935,10 +925,12 @@ static void ag71xx_restart_work_func(struct work_struct *work) rtnl_unlock(); } -static bool ag71xx_check_dma_stuck(struct ag71xx *ag, unsigned long timestamp) +static bool ag71xx_check_dma_stuck(struct ag71xx *ag) { + unsigned long timestamp; u32 rx_sm, tx_sm, rx_fd; + timestamp = netdev_get_tx_queue(ag->dev, 0)->trans_start; if (likely(time_before(jiffies, timestamp + HZ/10))) return false; @@ -978,7 +970,7 @@ static int ag71xx_tx_packets(struct ag71xx *ag, bool flush) if (!flush && !ag71xx_desc_empty(desc)) { if (pdata->is_ar724x && - ag71xx_check_dma_stuck(ag, ring->buf[i].timestamp)) { + ag71xx_check_dma_stuck(ag)) { schedule_delayed_work(&ag->restart_work, HZ / 2); dma_stuck = true; } @@ -1008,12 +1000,12 @@ static int ag71xx_tx_packets(struct ag71xx *ag, bool flush) DBG("%s: %d packets sent out\n", ag->dev->name, sent); - ag->dev->stats.tx_bytes += bytes_compl; - ag->dev->stats.tx_packets += sent; - if (!sent) return 0; + ag->dev->stats.tx_bytes += bytes_compl; + ag->dev->stats.tx_packets += sent; + netdev_completed_queue(ag->dev, sent, bytes_compl); if ((ring->curr - ring->dirty) < (ring_size * 3) / 4) netif_wake_queue(ag->dev); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c index 291547656..cf41aa8a3 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c @@ -256,8 +256,6 @@ static int ag71xx_mdio_probe(struct platform_device *pdev) am->mii_bus->reset = ag71xx_mdio_reset; #if LINUX_VERSION_CODE < KERNEL_VERSION(4,5,0) am->mii_bus->irq = am->mii_irq; -#else - memcpy(am->mii_bus->irq, am->mii_irq, sizeof(am->mii_bus->irq)); #endif am->mii_bus->priv = am; am->mii_bus->parent = &pdev->dev; @@ -265,7 +263,7 @@ static int ag71xx_mdio_probe(struct platform_device *pdev) am->mii_bus->phy_mask = pdata->phy_mask; for (i = 0; i < PHY_MAX_ADDR; i++) - am->mii_irq[i] = PHY_POLL; + am->mii_bus->irq[i] = PHY_POLL; ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0); diff --git a/target/linux/ar71xx/generic/config-default b/target/linux/ar71xx/generic/config-default index cac1a27c3..6475d2281 100644 --- a/target/linux/ar71xx/generic/config-default +++ b/target/linux/ar71xx/generic/config-default @@ -31,6 +31,7 @@ CONFIG_ATH79_MACH_ARCHER_C25_V1=y CONFIG_ATH79_MACH_ARCHER_C58_V1=y CONFIG_ATH79_MACH_ARCHER_C59_V1=y CONFIG_ATH79_MACH_ARCHER_C60_V1=y +CONFIG_ATH79_MACH_ARCHER_C60_V2=y CONFIG_ATH79_MACH_ARCHER_C7=y CONFIG_ATH79_MACH_ARDUINO_YUN=y CONFIG_ATH79_MACH_AW_NR580=y @@ -44,6 +45,7 @@ CONFIG_ATH79_MACH_CARAMBOLA2=y CONFIG_ATH79_MACH_CF_E316N_V2=y CONFIG_ATH79_MACH_CF_E320N_V2=y CONFIG_ATH79_MACH_CF_E355AC=y +CONFIG_ATH79_MACH_CF_E375AC=y CONFIG_ATH79_MACH_CF_E380AC_V1=y CONFIG_ATH79_MACH_CF_E380AC_V2=y CONFIG_ATH79_MACH_CF_E520N=y @@ -54,6 +56,7 @@ CONFIG_ATH79_MACH_CPE830=y CONFIG_ATH79_MACH_CPE870=y CONFIG_ATH79_MACH_CR3000=y CONFIG_ATH79_MACH_CR5000=y +CONFIG_ATH79_MACH_DAP_1330_A1=y CONFIG_ATH79_MACH_DAP_2695_A1=y CONFIG_ATH79_MACH_DB120=y CONFIG_ATH79_MACH_DGL_5500_A1=y @@ -69,7 +72,9 @@ CONFIG_ATH79_MACH_DR342=y CONFIG_ATH79_MACH_DR344=y CONFIG_ATH79_MACH_DR531=y CONFIG_ATH79_MACH_DRAGINO2=y +CONFIG_ATH79_MACH_E1700AC_V2=y CONFIG_ATH79_MACH_E2100L=y +CONFIG_ATH79_MACH_E600G_V2=y CONFIG_ATH79_MACH_EAP120=y CONFIG_ATH79_MACH_EAP300V2=y CONFIG_ATH79_MACH_EAP7660D=y @@ -79,6 +84,7 @@ CONFIG_ATH79_MACH_ENS202EXT=y CONFIG_ATH79_MACH_EPG5000=y CONFIG_ATH79_MACH_ESR1750=y CONFIG_ATH79_MACH_ESR900=y +CONFIG_ATH79_MACH_EW_BALIN=y CONFIG_ATH79_MACH_EW_DORIN=y CONFIG_ATH79_MACH_F9K1115V2=y CONFIG_ATH79_MACH_FRITZ300E=y @@ -90,13 +96,14 @@ CONFIG_ATH79_MACH_GL_DOMINO=y CONFIG_ATH79_MACH_GL_INET=y CONFIG_ATH79_MACH_GL_MIFI=y CONFIG_ATH79_MACH_GL_USB150=y -CONFIG_ATH79_MACH_GS_MINIBOX_V1=y -CONFIG_ATH79_MACH_GS_OOLITE=y +CONFIG_ATH79_MACH_GS_OOLITE_V1=y +CONFIG_ATH79_MACH_GS_OOLITE_V5_2=y CONFIG_ATH79_MACH_HIWIFI_HC6361=y CONFIG_ATH79_MACH_HORNET_UB=y CONFIG_ATH79_MACH_JA76PF=y CONFIG_ATH79_MACH_JWAP003=y CONFIG_ATH79_MACH_JWAP230=y +CONFIG_ATH79_MACH_LAN_TURTLE=y CONFIG_ATH79_MACH_LIMA=y CONFIG_ATH79_MACH_MC_MAC1200R=y CONFIG_ATH79_MACH_MR12=y @@ -123,7 +130,9 @@ CONFIG_ATH79_MACH_PQI_AIR_PEN=y CONFIG_ATH79_MACH_QIHOO_C301=y CONFIG_ATH79_MACH_R36A=y CONFIG_ATH79_MACH_R602N=y +CONFIG_ATH79_MACH_RE355=y CONFIG_ATH79_MACH_RE450=y +CONFIG_ATH79_MACH_RME_EG200=y CONFIG_ATH79_MACH_RUT9XX=y CONFIG_ATH79_MACH_RW2458N=y CONFIG_ATH79_MACH_SC1750=y @@ -132,6 +141,7 @@ CONFIG_ATH79_MACH_SC450=y CONFIG_ATH79_MACH_SMART_300=y CONFIG_ATH79_MACH_SOM9331=y CONFIG_ATH79_MACH_SR3200=y +CONFIG_ATH79_MACH_T830=y CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE=y CONFIG_ATH79_MACH_TEW_673GRU=y CONFIG_ATH79_MACH_TEW_732BR=y @@ -151,6 +161,7 @@ CONFIG_ATH79_MACH_TL_WR703N=y CONFIG_ATH79_MACH_TL_WR720N_V3=y CONFIG_ATH79_MACH_TL_WR810N=y CONFIG_ATH79_MACH_TL_WR810N_V2=y +CONFIG_ATH79_MACH_TL_WR841N_V8=y CONFIG_ATH79_MACH_TL_WR841N_V9=y CONFIG_ATH79_MACH_TL_WR902AC_V1=y CONFIG_ATH79_MACH_TL_WR942N_V1=y @@ -158,8 +169,10 @@ CONFIG_ATH79_MACH_TUBE2H=y CONFIG_ATH79_MACH_UBNT=y CONFIG_ATH79_MACH_UBNT_UNIFIAC=y CONFIG_ATH79_MACH_UBNT_XM=y +CONFIG_ATH79_MACH_WAM250=y CONFIG_ATH79_MACH_WEIO=y CONFIG_ATH79_MACH_WHR_HP_G300N=y +CONFIG_ATH79_MACH_WIFI_PINEAPPLE_NANO=y CONFIG_ATH79_MACH_WLAE_AG300N=y CONFIG_ATH79_MACH_WLR8100=y CONFIG_ATH79_MACH_WNDAP360=y diff --git a/target/linux/ar71xx/image/generic-senao.mk b/target/linux/ar71xx/image/generic-senao.mk index dbb7b69f9..3a7f6776b 100644 --- a/target/linux/ar71xx/image/generic-senao.mk +++ b/target/linux/ar71xx/image/generic-senao.mk @@ -1,12 +1,9 @@ define Build/senao-factory-image - $(eval board=$(word 1,$(1))) - $(eval rootfs=$(word 2,$(1))) - mkdir -p $@.senao - touch $@.senao/FWINFO-OpenWrt-$(REVISION)-$(board) - $(CP) $(IMAGE_KERNEL) $@.senao/openwrt-senao-$(board)-uImage-lzma.bin - $(CP) $(rootfs) $@.senao/openwrt-senao-$(board)-root.squashfs + touch $@.senao/FWINFO-OpenWrt-$(REVISION)-$(1) + $(CP) $(IMAGE_KERNEL) $@.senao/openwrt-senao-$(1)-uImage-lzma.bin + $(CP) $@ $@.senao/openwrt-senao-$(1)-root.squashfs $(TAR) -c \ --numeric-owner --owner=0 --group=0 --sort=name \ @@ -25,7 +22,7 @@ define Device/ens202ext IMAGE_SIZE := 13632k IMAGES += factory.bin MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),320k(custom)ro,1536k(kernel),12096k(rootfs),2048k(failsafe)ro,64k(art)ro,13632k@0xa0000(firmware) - IMAGE/factory.bin/squashfs := append-rootfs | pad-rootfs | senao-factory-image ens202ext $$$$@ + IMAGE/factory.bin := append-rootfs | pad-rootfs | senao-factory-image ens202ext IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) endef TARGET_DEVICES += ens202ext diff --git a/target/linux/ar71xx/image/generic-tp-link.mk b/target/linux/ar71xx/image/generic-tp-link.mk index b0d99e259..b3b5fdf19 100644 --- a/target/linux/ar71xx/image/generic-tp-link.mk +++ b/target/linux/ar71xx/image/generic-tp-link.mk @@ -62,6 +62,18 @@ define Device/archer-c60-v1 endef TARGET_DEVICES += archer-c60-v1 +define Device/archer-c60-v2 + $(Device/archer-c60-v1) + DEVICE_TITLE := TP-LINK Archer C60 v2 + BOARDNAME := ARCHER-C60-V2 + TPLINK_BOARD_ID := ARCHER-C60-V2 + DEVICE_PROFILE := ARCHERC60V2 + IMAGE_SIZE := 7808k + MTDPARTS := spi0.0:192k(u-boot)ro,7808k(firmware),128k(tplink)ro,64k(art)ro + SUPPORTED_DEVICES := archer-c60-v2 +endef +TARGET_DEVICES += archer-c60-v2 + define Device/archer-c5-v1 $(Device/tplink-16mlzma) DEVICE_TITLE := TP-LINK Archer C5 v1 @@ -132,7 +144,7 @@ TARGET_DEVICES += archer-c7-v4 define Device/cpe510-520-v1 DEVICE_TITLE := TP-LINK CPE510/520 v1 DEVICE_PACKAGES := rssileds - MTDPARTS := spi0.0:128k(u-boot)ro,64k(partition-table)ro,64k(product-info)ro,1536k(kernel),6144k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware) + MTDPARTS := spi0.0:128k(u-boot)ro,64k(partition-table)ro,64k(product-info)ro,1792k(kernel),5888k(rootfs),192k(config)ro,64k(ART)ro,7680k@0x40000(firmware) IMAGE_SIZE := 7680k BOARDNAME := CPE510 TPLINK_BOARD_ID := CPE510 @@ -184,6 +196,25 @@ define Device/eap120-v1 endef TARGET_DEVICES += eap120-v1 +define Device/re355-v1 + DEVICE_TITLE := TP-LINK RE355 v1 + DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca988x + MTDPARTS := spi0.0:128k(u-boot)ro,6016k(firmware),64k(partition-table)ro,64k(product-info)ro,1856k(config)ro,64k(art)ro + IMAGE_SIZE := 7936k + BOARDNAME := RE355 + TPLINK_BOARD_ID := RE355 + DEVICE_PROFILE := RE355 + LOADER_TYPE := elf + TPLINK_HWID := 0x0 + TPLINK_HWREV := 0 + TPLINK_HEADER_VERSION := 1 + KERNEL := kernel-bin | patch-cmdline | lzma | tplink-v1-header + IMAGES := sysupgrade.bin factory.bin + IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade + IMAGE/factory.bin := append-rootfs | tplink-safeloader factory +endef +TARGET_DEVICES += re355-v1 + define Device/re450-v1 DEVICE_TITLE := TP-LINK RE450 v1 DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca988x diff --git a/target/linux/ar71xx/image/generic-ubnt.mk b/target/linux/ar71xx/image/generic-ubnt.mk index 2735c7491..d5e3aa586 100644 --- a/target/linux/ar71xx/image/generic-ubnt.mk +++ b/target/linux/ar71xx/image/generic-ubnt.mk @@ -113,7 +113,7 @@ define Device/ubnt-unifiac DEVICE_PACKAGES := kmod-usb-core kmod-usb2 DEVICE_PROFILE := UBNT IMAGE_SIZE := 7744k - MTDPARTS := spi0.0:384k(u-boot)ro,64k(u-boot-env)ro,7744k(firmware),7744k(ubnt-airos)ro,128k(bs)ro,256k(cfg)ro,64k(EEPROM)ro + MTDPARTS := spi0.0:384k(u-boot)ro,64k(u-boot-env)ro,7744k(firmware),7744k(ubnt-airos)ro,128k(bs),256k(cfg)ro,64k(EEPROM)ro IMAGES := sysupgrade.bin IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) endef @@ -157,6 +157,13 @@ define Device/ubnt-nano-m-xw endef TARGET_DEVICES += ubnt-nano-m-xw +define Device/ubnt-lbe-m5 + $(Device/ubnt-xw) + DEVICE_TITLE := Ubiquiti Litebeam M5 + BOARDNAME := UBNT-LBE-M5 +endef +TARGET_DEVICES += ubnt-lbe-m5 + define Device/ubnt-loco-m-xw $(Device/ubnt-xw) DEVICE_TITLE := Ubiquiti Loco XW @@ -251,9 +258,9 @@ TARGET_DEVICES += ubnt-ls-sr71 define Device/ubnt-uap-pro DEVICE_TITLE := Ubiquiti UAP Pro - KERNEL_SIZE := 1536k + KERNEL_SIZE := 1792k IMAGE_SIZE := 15744k - MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1536k(kernel),14208k(rootfs),256k(cfg)ro,64k(EEPROM)ro,15744k@0x50000(firmware) + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1792k(kernel),13952k(rootfs),256k(cfg)ro,64k(EEPROM)ro,15744k@0x50000(firmware) UBNT_TYPE := BZ UBNT_CHIP := ar934x BOARDNAME := UAP-PRO @@ -263,6 +270,7 @@ define Device/ubnt-uap-pro IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | mkubntimage2 endef +TARGET_DEVICES += ubnt-uap-pro define Device/ubnt-unifi-outdoor-plus $(Device/ubnt-uap-pro) @@ -271,3 +279,4 @@ define Device/ubnt-unifi-outdoor-plus BOARDNAME := UBNT-UOP DEVICE_PROFILE := UBNT endef +TARGET_DEVICES += ubnt-unifi-outdoor-plus diff --git a/target/linux/ar71xx/image/generic.mk b/target/linux/ar71xx/image/generic.mk index 88b9f930b..0d3aedb46 100644 --- a/target/linux/ar71xx/image/generic.mk +++ b/target/linux/ar71xx/image/generic.mk @@ -28,10 +28,20 @@ define Build/mkwrggimg $(STAGING_DIR_HOST)/bin/mkwrggimg -b \ -i $@ -o $@.imghdr -d /dev/mtdblock/1 \ -m $(BOARDNAME) -s $(DAP_SIGNATURE) \ - -v OpenWrt -B $(REVISION) + -v $(VERSION_DIST) -B $(REVISION) mv $@.imghdr $@ endef +define Build/mkdapimg2 + $(STAGING_DIR_HOST)/bin/mkdapimg2 \ + -i $@ -o $@.new \ + -s $(DAP_SIGNATURE) \ + -v $(VERSION_DIST)-$(firstword $(subst -, ,$(REVISION))) \ + -r Default \ + $(if $(1),-k $(1)) + mv $@.new $@ +endef + define Build/netgear-squashfs rm -rf $@.fs $@.squashfs mkdir -p $@.fs/image @@ -46,7 +56,7 @@ define Build/netgear-squashfs -A mips -O linux -T filesystem -C none \ -M $(NETGEAR_KERNEL_MAGIC) \ -a 0xbf070000 -e 0xbf070000 \ - -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \ + -n 'MIPS $(VERSION_DIST) Linux-$(LINUX_VERSION)' \ -d $@.squashfs $@ rm -rf $@.squashfs $@.fs endef @@ -93,7 +103,7 @@ define Build/uImageHiWiFi mkimage -A $(LINUX_KARCH) \ -O linux -T kernel \ -C $(1) -a $(KERNEL_LOADADDR) -e $(if $(KERNEL_ENTRY),$(KERNEL_ENTRY),$(KERNEL_LOADADDR)) \ - -n 'tw150v1 $(call toupper,$(LINUX_KARCH)) OpenWrt Linux-$(LINUX_VERSION)' -d $@ $@.new + -n 'tw150v1 $(call toupper,$(LINUX_KARCH)) $(VERSION_DIST) Linux-$(LINUX_VERSION)' -d $@ $@.new @mv $@.new $@ endef @@ -110,7 +120,7 @@ define Device/ap121f CONSOLE := ttyATH0,115200 MTDPARTS := spi0.0:192k(u-boot)ro,64k(u-boot-env),64k(art)ro,-(firmware) SUPPORTED_DEVICES := ap121f - IMAGE/sysupgrade.bin = append-kernel | pad-to $$$$(BLOCKSIZE) | \ + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \ append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) endef TARGET_DEVICES += ap121f @@ -125,7 +135,7 @@ endef TARGET_DEVICES += ap531b0 define Device/ap90q - DEVICE_TITLE := YunCore AP90Q + DEVICE_TITLE := YunCore AP80Q/AP90Q BOARDNAME := AP90Q IMAGE_SIZE := 16000k MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro @@ -153,7 +163,7 @@ define Device/arduino-yun DEVICE_PACKAGES := kmod-usb-core kmod-usb2 BOARDNAME := Yun IMAGE_SIZE := 15936k - CONSOLE = ttyATH0,250000 + CONSOLE := ttyATH0,250000 MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),15936k(firmware),64k(nvram),64k(art)ro endef TARGET_DEVICES += arduino-yun @@ -180,6 +190,7 @@ TARGET_DEVICES += carambola2 define Device/cf-e316n-v2 DEVICE_TITLE := COMFAST CF-E316N v2 + DEVICE_PACKAGES := -swconfig -uboot-envtools BOARDNAME := CF-E316N-V2 IMAGE_SIZE := 16192k MTDPARTS := spi0.0:64k(u-boot)ro,64k(art)ro,16192k(firmware),64k(art-backup)ro @@ -189,23 +200,44 @@ TARGET_DEVICES += cf-e316n-v2 define Device/cf-e320n-v2 $(Device/cf-e316n-v2) DEVICE_TITLE := COMFAST CF-E320N v2 - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 + DEVICE_PACKAGES += kmod-usb-core kmod-usb2 BOARDNAME := CF-E320N-V2 endef TARGET_DEVICES += cf-e320n-v2 -define Device/cf-e355ac - DEVICE_TITLE := COMFAST CF-E355AC - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k ath10k-firmware-qca988x - BOARDNAME := CF-E355AC +define Device/cf-e355ac-v1 + DEVICE_TITLE := COMFAST CF-E355AC v1 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k ath10k-firmware-qca988x \ + -swconfig -uboot-envtools + BOARDNAME := CF-E355AC-V1 IMAGE_SIZE := 16192k MTDPARTS := spi0.0:64k(u-boot)ro,64k(art)ro,16192k(firmware),64k(art-backup)ro endef -TARGET_DEVICES += cf-e355ac +TARGET_DEVICES += cf-e355ac-v1 + +define Device/cf-e355ac-v2 + $(Device/cf-e355ac-v1) + DEVICE_TITLE := COMFAST CF-E355AC v2 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k ath10k-firmware-qca9888 \ + -swconfig -uboot-envtools + BOARDNAME := CF-E355AC-V2 +endef +TARGET_DEVICES += cf-e355ac-v2 + +define Device/cf-e375ac + DEVICE_TITLE := COMFAST CF-E375AC + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k ath10k-firmware-qca9888 \ + -uboot-envtools + BOARDNAME := CF-E375AC + IMAGE_SIZE := 16000k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(art)ro,16000k(firmware),64k(art-backup)ro +endef +TARGET_DEVICES += cf-e375ac define Device/cf-e380ac-v1 DEVICE_TITLE := COMFAST CF-E380AC v1 - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k ath10k-firmware-qca988x + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k ath10k-firmware-qca988x \ + -swconfig -uboot-envtools BOARDNAME := CF-E380AC-V1 IMAGE_SIZE := 16128k MTDPARTS := spi0.0:128k(u-boot)ro,64k(art)ro,16128k(firmware),64k(art-backup)ro @@ -221,9 +253,19 @@ define Device/cf-e380ac-v2 endef TARGET_DEVICES += cf-e380ac-v2 +define Device/cf-e385ac + DEVICE_TITLE := COMFAST CF-E385AC + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k ath10k-firmware-qca9984 \ + -uboot-envtools + BOARDNAME := CF-E385AC + IMAGE_SIZE := 16000k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(art)ro,16000k(firmware),64k(art-backup)ro +endef +TARGET_DEVICES += cf-e385ac + define Device/cf-e520n DEVICE_TITLE := COMFAST CF-E520N - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 -swconfig -uboot-envtools BOARDNAME := CF-E520N IMAGE_SIZE := 8000k MTDPARTS := spi0.0:64k(u-boot)ro,64k(art)ro,8000k(firmware),64k(art-backup)ro @@ -272,26 +314,102 @@ define Device/dragino2 endef TARGET_DEVICES += dragino2 -define Device/ew-dorin - DEVICE_TITLE := Embedded Wireless Dorin Platform +define Device/e1700ac-v2-16M + DEVICE_TITLE := Qxwlan E1700AC v2 (16MB flash) + DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca988x kmod-usb-core \ + kmod-usb2 kmod-usb-ledtrig-usbport + BOARDNAME := E1700AC-V2 + SUPPORTED_DEVICES := e1700ac-v2 + IMAGE_SIZE := 15936k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(pri-data)ro,64k(art)ro,-(firmware) + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) |\ + append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) +endef +TARGET_DEVICES += e1700ac-v2-16M + +define Device/e1700ac-v2-8M + $(Device/e1700ac-v2-16M) + DEVICE_TITLE := Qxwlan E1700AC v2 (8MB flash) + IMAGE_SIZE := 7744k +endef +TARGET_DEVICES += e1700ac-v2-8M + +define Device/e600g-v2-16M + DEVICE_TITLE := Qxwlan E600G v2 (16MB flash) + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 -swconfig + BOARDNAME := E600G-V2 + SUPPORTED_DEVICES := e600g-v2 + IMAGE_SIZE := 15936k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(pri-data)ro,64k(art)ro,-(firmware) + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) |\ + append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) +endef +TARGET_DEVICES += e600g-v2-16M + +define Device/e600g-v2-8M + $(Device/e600g-v2-16M) + DEVICE_TITLE := Qxwlan E600G v2 (8MB flash) + IMAGE_SIZE := 7744k +endef +TARGET_DEVICES += e600g-v2-8M + +define Device/e600gac-v2-16M + DEVICE_TITLE := Qxwlan E600GAC v2 (16MB flash) + DEVICE_PACKAGES := kmod-ath10k ath10k-firmware-qca9887 kmod-usb-core \ + kmod-usb2 -swconfig + BOARDNAME := E600GAC-V2 + SUPPORTED_DEVICES := e600gac-v2 + IMAGE_SIZE := 15936k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),64k(pri-data)ro,64k(art)ro,-(firmware) + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) |\ + append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) +endef +TARGET_DEVICES += e600gac-v2-16M + +define Device/e600gac-v2-8M + $(Device/e600gac-v2-16M) + DEVICE_TITLE := Qxwlan E600GAC v2 (8MB flash) + IMAGE_SIZE := 7744k +endef +TARGET_DEVICES += e600gac-v2-8M + +define Device/ew-balin + DEVICE_TITLE := Embedded Wireless Balin Platform DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea - BOARDNAME = EW-DORIN + BOARDNAME := EW-BALIN + IMAGE_SIZE := 16000k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro +endef +TARGET_DEVICES += ew-balin + +define Device/ew-dorin + $(Device/ew-balin) + DEVICE_TITLE := Embedded Wireless Dorin Platform + BOARDNAME := EW-DORIN CONSOLE := ttyATH0,115200 - IMAGE_SIZE = 16000k - MTDPARTS = spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro endef TARGET_DEVICES += ew-dorin define Device/ew-dorin-router + $(Device/ew-dorin) DEVICE_TITLE := Embedded Wireless Dorin Router Platform - DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea - BOARDNAME = EW-DORIN-ROUTER - CONSOLE := ttyATH0,115200 - IMAGE_SIZE = 16000k - MTDPARTS = spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro + BOARDNAME := EW-DORIN-ROUTER endef TARGET_DEVICES += ew-dorin-router +define Device/rme-eg200 + DEVICE_TITLE := eTactica EG-200 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ledtrig-oneshot \ + kmod-usb-serial kmod-usb-serial-ftdi \ + kmod-usb-storage \ + kmod-fs-ext4 + BOARDNAME := RME-EG200 + IMAGE_SIZE := 16000k + CONSOLE := ttyATH0,115200 + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,16000k(firmware),64k(art)ro +endef +TARGET_DEVICES += rme-eg200 + define Device/weio DEVICE_TITLE := WeIO DEVICE_PACKAGES := kmod-usb-core kmod-usb2 @@ -371,11 +489,24 @@ define Device/gl-usb150 CONSOLE := ttyATH0,115200 MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,16000k(firmware),64k(art)ro SUPPORTED_DEVICES := gl-usb150 - IMAGE/sysupgrade.bin = append-kernel | pad-to $$$$(BLOCKSIZE) | \ + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \ append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) endef TARGET_DEVICES += gl-usb150 +define Device/lan-turtle + $(Device/tplink-16mlzma) + DEVICE_TITLE := Hak5 LAN Turtle + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-storage \ + -kmod-ath9k -swconfig -uboot-envtools -wpad-mini + BOARDNAME := LAN-TURTLE + DEVICE_PROFILE := LANTURTLE + TPLINK_HWID := 0x5348334c + CONSOLE := ttyATH0,115200 + IMAGES := sysupgrade.bin +endef +TARGET_DEVICES += lan-turtle + define Device/lima DEVICE_TITLE := 8devices Lima DEVICE_PACKAGES := kmod-usb-core kmod-usb2 @@ -548,6 +679,19 @@ define Device/cr5000-nocloud endef TARGET_DEVICES += cr5000-nocloud +define Device/packet-squirrel + $(Device/tplink-16mlzma) + DEVICE_TITLE := Hak5 Packet Squirrel + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 \ + -kmod-ath9k -swconfig -uboot-envtools -wpad-mini + BOARDNAME := PACKET-SQUIRREL + DEVICE_PROFILE := PACKETSQUIRREL + TPLINK_HWID := 0x5351524c + CONSOLE := ttyATH0,115200 + IMAGES := sysupgrade.bin +endef +TARGET_DEVICES += packet-squirrel + define Device/pqi-air-pen DEVICE_TITLE := PQI Air Pen DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-storage @@ -699,15 +843,44 @@ TARGET_DEVICES += mc-mac1200r define Device/minibox-v1 $(Device/tplink-16mlzma) - DEVICE_TITLE := Gainstrong MiniBox V1.0 - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport + DEVICE_TITLE := GainStrong MiniBox V1.0 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 BOARDNAME := MINIBOX-V1 DEVICE_PROFILE := MINIBOXV1 TPLINK_HWID := 0x3C000201 CONSOLE := ttyATH0,115200 + IMAGES := sysupgrade.bin endef TARGET_DEVICES += minibox-v1 +define Device/oolite-v1 + $(Device/minibox-v1) + DEVICE_TITLE := GainStrong Oolite V1.0 + BOARDNAME := OOLITE-V1 + DEVICE_PROFILE := OOLITEV1 + TPLINK_HWID := 0x3C000101 +endef +TARGET_DEVICES += oolite-v1 + +define Device/oolite-v5.2 + $(Device/tplink-16mlzma) + DEVICE_TITLE := GainStrong Oolite V5.2 + DEVICE_PACKAGES := ath10k-firmware-qca9887 kmod-ath10k kmod-usb-core kmod-usb2 + BOARDNAME := OOLITE-V5-2 + DEVICE_PROFILE := OOLITEV52 + TPLINK_HWID := 0x3C00010B + IMAGES := sysupgrade.bin +endef +TARGET_DEVICES += oolite-v5.2 + +define Device/oolite-v5.2-dev + $(Device/oolite-v5.2) + DEVICE_TITLE := GainStrong Oolite V5.2-Dev (development board) + BOARDNAME := OOLITE-V5-2-DEV + DEVICE_PROFILE := OOLITEV52DEV +endef +TARGET_DEVICES += oolite-v5.2-dev + define Device/omy-g1 $(Device/tplink-16mlzma) DEVICE_TITLE := OMYlink OMY-G1 @@ -802,6 +975,18 @@ define Device/xd3200 endef TARGET_DEVICES += xd3200 +define Device/t830 + DEVICE_TITLE := YunCore T830 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport + BOARDNAME := T830 + IMAGE_SIZE := 16000k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),16000k(firmware),64k(art)ro + SUPPORTED_DEVICES := t830 + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) |\ + append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) +endef +TARGET_DEVICES += t830 + define Device/tellstick-znet-lite $(Device/tplink-16mlzma) DEVICE_TITLE := TellStick ZNet Lite @@ -813,17 +998,6 @@ define Device/tellstick-znet-lite endef TARGET_DEVICES += tellstick-znet-lite -define Device/oolite - $(Device/tplink-16mlzma) - DEVICE_TITLE := Gainstrong OOLITE - DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport - BOARDNAME := GS-OOLITE - DEVICE_PROFILE := OOLITE - TPLINK_HWID := 0x3C000101 - CONSOLE := ttyATH0,115200 -endef -TARGET_DEVICES += oolite - define Device/n5q DEVICE_TITLE := ALFA Network N5Q DEVICE_PACKAGES := rssileds -swconfig @@ -965,6 +1139,18 @@ define Device/qihoo-c301 endef TARGET_DEVICES += qihoo-c301 +define Device/dap-1330-a1 + DEVICE_TITLE := D-Link DAP-1330 rev. A1 + DEVICE_PACKAGES := rssileds + BOARDNAME := DAP-1330-A1 + IMAGES := factory.img sysupgrade.bin + IMAGE_SIZE := 7936k + IMAGE/factory.img := append-kernel | pad-to $$$$(BLOCKSIZE) | append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | mkdapimg2 917504 + MTDPARTS := spi0.0:64k(u-boot)ro,64k(art)ro,64k(mp)ro,64k(config)ro,7936k(firmware) + DAP_SIGNATURE := HONEYBEE-FIRMWARE-DAP-1330 +endef +TARGET_DEVICES += dap-1330-a1 + define Device/dap-2695-a1 DEVICE_TITLE := D-Link DAP-2695 rev. A1 DEVICE_PACKAGES := ath10k-firmware-qca988x kmod-ath10k @@ -993,6 +1179,31 @@ define Device/bhr-4grv2 endef TARGET_DEVICES += bhr-4grv2 +define Device/wam250 + DEVICE_TITLE := Samsung WAM250 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 -swconfig + BOARDNAME := WAM250 + IMAGE_SIZE := 15872k + MTDPARTS := spi0.0:256k(u-boot)ro,64k(u-boot-env),128k(nvram)ro,15872k(firmware),64k(art)ro + SUPPORTED_DEVICES := wam250 + IMAGE/sysupgrade.bin := append-kernel | pad-to $$$$(BLOCKSIZE) |\ + append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) +endef +TARGET_DEVICES += wam250 + +define Device/wifi-pineapple-nano + $(Device/tplink-16mlzma) + DEVICE_TITLE := Hak5 WiFi Pineapple NANO + DEVICE_PACKAGES := kmod-ath9k-htc kmod-usb-core kmod-usb2 kmod-usb-storage \ + -swconfig -uboot-envtools + BOARDNAME := WIFI-PINEAPPLE-NANO + DEVICE_PROFILE := WIFIPINEAPPLENANO + TPLINK_HWID := 0x4e414e4f + CONSOLE := ttyATH0,115200 + IMAGES := sysupgrade.bin +endef +TARGET_DEVICES += wifi-pineapple-nano + define Device/wlr8100 DEVICE_TITLE := Sitecom WLR-8100 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-usb3 \ @@ -1078,6 +1289,7 @@ define Device/fritz300e SUPPORTED_DEVICES := fritz300e IMAGE_SIZE := 15232k KERNEL := kernel-bin | patch-cmdline | lzma | eva-image + KERNEL_INITRAMFS := $$(KERNEL) IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | \ append-squashfs-fakeroot-be | pad-to 256 | \ append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) diff --git a/target/linux/ar71xx/image/legacy.mk b/target/linux/ar71xx/image/legacy.mk index bd8ca2cef..cbc859dd0 100644 --- a/target/linux/ar71xx/image/legacy.mk +++ b/target/linux/ar71xx/image/legacy.mk @@ -87,7 +87,7 @@ ifneq ($(SUBTARGET),mikrotik) # $(4): output file. define MkuImage mkimage -A mips -O linux -T kernel -a 0x80060000 -C $(1) $(2) \ - -e 0x80060000 -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \ + -e 0x80060000 -n 'MIPS $(VERSION_DIST) Linux-$(LINUX_VERSION)' \ -d $(3) $(4) endef @@ -484,11 +484,11 @@ define Image/Build/Belkin $(eval rootsize=$(call mtdpartsize,rootfs,$(4))) $(call Sysupgrade/RKuImage,$(1),$(2),$(kernsize),$(rootsize)) if [ -e "$(call sysupname,$(1),$(2))" ]; then \ - edimax_fw_header -m $(5) -v "$(shell echo -n OpenWrt$(REVISION) | cut -c -13)" \ + edimax_fw_header -m $(5) -v "$(shell echo -n $(VERSION_DIST)$(REVISION) | cut -c -13)" \ -n "uImage" \ -i $(KDIR_TMP)/vmlinux-$(2).uImage \ -o $(KDIR_TMP)/$(2)-uImage; \ - edimax_fw_header -m $(5) -v "$(shell echo -n OpenWrt$(REVISION) | cut -c -13)" \ + edimax_fw_header -m $(5) -v "$(shell echo -n $(VERSION_DIST)$(REVISION) | cut -c -13)" \ -n "rootfs" \ -i $(KDIR)/root.$(1) \ -o $(KDIR_TMP)/$(2)-rootfs; \ @@ -661,7 +661,7 @@ define Image/Build/Netgear/buildkernel ) > $(KDIR_TMP)/vmlinux-$(2).uImage.squashfs.tmp2 mkimage -A mips -O linux -T filesystem -C none -M $(5) \ -a 0xbf070000 -e 0xbf070000 \ - -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \ + -n 'MIPS $(VERSION_DIST) Linux-$(LINUX_VERSION)' \ -d $(KDIR_TMP)/vmlinux-$(2).uImage.squashfs.tmp2 \ $(KDIR_TMP)/vmlinux-$(2).uImage.squashfs endef @@ -673,7 +673,7 @@ define Image/Build/Netgear for r in $(7) ; do \ [ -n "$$r" ] && dashr="-$$r" || dashr= ; \ $(STAGING_DIR_HOST)/bin/mkdniimg \ - -B $(6) -v OpenWrt.$(REVISION) -r "$$r" $(8) \ + -B $(6) -v $(VERSION_DIST).$(REVISION) -r "$$r" $(8) \ -i $(call sysupname,$(1),$(2)) \ -o $(call imgname,$(1),$(2))-factory$$dashr.img; \ done; \ @@ -714,7 +714,7 @@ define Image/Build/NetgearNAND/buildkernel dd if=/dev/zero of=$(KDIR_TMP)/fakeroot-$(2) bs=131072 count=1 mkimage -A mips -O linux -T filesystem -C none \ -a 0xbf070000 -e 0xbf070000 \ - -n 'MIPS OpenWrt fakeroot' \ + -n 'MIPS $(VERSION_DIST) fakeroot' \ -d $(KDIR_TMP)/fakeroot-$(2) \ -M $(5) \ $(KDIR_TMP)/fakeroot-$(2).uImage @@ -745,7 +745,7 @@ define Image/Build/NetgearNAND dd if=$(KDIR_TMP)/$(2)-root.ubi \ ) > $(imageraw) $(STAGING_DIR_HOST)/bin/mkdniimg \ - -B $(6) -v OpenWrt.$(REVISION) -r "$$r" $(8) \ + -B $(6) -v $(VERSION_DIST).$(REVISION) -r "$$r" $(8) \ -i $(imageraw) \ -o $(call imgname,ubi,$(2))-factory.img diff --git a/target/linux/ar71xx/image/mikrotik.mk b/target/linux/ar71xx/image/mikrotik.mk index 403bcb08b..b13bbdc18 100644 --- a/target/linux/ar71xx/image/mikrotik.mk +++ b/target/linux/ar71xx/image/mikrotik.mk @@ -40,7 +40,7 @@ define Device/rb-nor-flash-16M LOADER_TYPE := elf KERNEL_INSTALL := 1 KERNEL := kernel-bin | lzma | loader-kernel - SUPPORTED_DEVICES := rb-750-r2 rb-750up-r2 rb-750p-pbr2 rb-941-2nd rb-951ui-2nd rb-952ui-5ac2nd rb-962uigs-5hact2hnt rb-lhg-5nd rb-map-2nd rb-mapl-2nd rb-wap-2nd + SUPPORTED_DEVICES := rb-750-r2 rb-750up-r2 rb-750p-pbr2 rb-911-2hn rb-911-5hn rb-941-2nd rb-951ui-2nd rb-952ui-5ac2nd rb-962uigs-5hact2hnt rb-lhg-5nd rb-map-2nd rb-mapl-2nd rb-wap-2nd IMAGE/sysupgrade.bin := append-kernel | kernel2minor -s 1024 -e | pad-to $$$$(BLOCKSIZE) | \ append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) endef @@ -50,6 +50,6 @@ define Device/rb-nor-flash-16M-ac $(Device/rb-nor-flash-16M) DEVICE_TITLE := MikroTik RouterBoard (16 MB SPI NOR, 802.11ac) DEVICE_PACKAGES += kmod-ath10k ath10k-firmware-qca988x ath10k-firmware-qca9887 - SUPPORTED_DEVICES := rb-wapg-5hact2hnd + SUPPORTED_DEVICES += rb-wapg-5hact2hnd endef TARGET_DEVICES += rb-nor-flash-16M-ac diff --git a/target/linux/ar71xx/image/tiny-tp-link.mk b/target/linux/ar71xx/image/tiny-tp-link.mk index 092d8aa11..2891b9654 100644 --- a/target/linux/ar71xx/image/tiny-tp-link.mk +++ b/target/linux/ar71xx/image/tiny-tp-link.mk @@ -622,6 +622,14 @@ define Device/tl-wr940n-v4 endef TARGET_DEVICES += tl-wr940n-v4 +define Device/tl-wr940n-v6 + $(Device/tl-wr940n-v4) + DEVICE_TITLE := TP-LINK TL-WR940N v6 + BOARDNAME := TL-WR940N-v6 + TPLINK_HWID := 0x09400006 +endef +TARGET_DEVICES += tl-wr940n-v6 + define Device/tl-wr941nd-v2 $(Device/tplink-4m) DEVICE_TITLE := TP-LINK TL-WR941N/ND v2 diff --git a/target/linux/ar71xx/patches-4.4/001-spi-cs-gpio.patch b/target/linux/ar71xx/patches-4.4/001-spi-cs-gpio.patch deleted file mode 100644 index 7a0b669e4..000000000 --- a/target/linux/ar71xx/patches-4.4/001-spi-cs-gpio.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -+++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h -@@ -14,6 +14,7 @@ - struct ath79_spi_platform_data { - unsigned bus_num; - unsigned num_chipselect; -+ int *cs_gpios; - }; - - #endif /* _ATH79_SPI_PLATFORM_H */ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -231,6 +231,7 @@ static int ath79_spi_probe(struct platfo - if (pdata) { - master->bus_num = pdata->bus_num; - master->num_chipselect = pdata->num_chipselect; -+ master->cs_gpios = pdata->cs_gpios; - } - - sp->bitbang.master = master; diff --git a/target/linux/ar71xx/patches-4.4/002-add_back_gpio_function_select.patch b/target/linux/ar71xx/patches-4.4/002-add_back_gpio_function_select.patch deleted file mode 100644 index 73cfeb550..000000000 --- a/target/linux/ar71xx/patches-4.4/002-add_back_gpio_function_select.patch +++ /dev/null @@ -1,92 +0,0 @@ ---- /dev/null -+++ b/arch/mips/ath79/gpio.c -@@ -0,0 +1,59 @@ -+/* -+ * Atheros AR71XX/AR724X/AR913X GPIO API support -+ * -+ * Copyright (C) 2010-2011 Jaiganesh Narayanan -+ * Copyright (C) 2008-2011 Gabor Juhos -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "common.h" -+ -+void __iomem *ath79_gpio_base; -+EXPORT_SYMBOL_GPL(ath79_gpio_base); -+ -+static void __iomem *ath79_gpio_get_function_reg(void) -+{ -+ u32 reg = 0; -+ -+ if (soc_is_ar71xx() || -+ soc_is_ar724x() || -+ soc_is_ar913x() || -+ soc_is_ar933x()) -+ reg = AR71XX_GPIO_REG_FUNC; -+ else if (soc_is_ar934x()) -+ reg = AR934X_GPIO_REG_FUNC; -+ else -+ BUG(); -+ -+ return ath79_gpio_base + reg; -+} -+ -+void ath79_gpio_function_setup(u32 set, u32 clear) -+{ -+ void __iomem *reg = ath79_gpio_get_function_reg(); -+ -+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); -+ /* flush write */ -+ __raw_readl(reg); -+} -+ -+void ath79_gpio_function_enable(u32 mask) -+{ -+ ath79_gpio_function_setup(mask, 0); -+} -+ -+void ath79_gpio_function_disable(u32 mask) -+{ -+ ath79_gpio_function_setup(0, mask); -+} ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -117,6 +117,7 @@ static inline int soc_is_qca955x(void) - - void ath79_ddr_set_pci_windows(void); - -+extern void __iomem *ath79_gpio_base; - extern void __iomem *ath79_pll_base; - extern void __iomem *ath79_reset_base; - ---- a/arch/mips/ath79/dev-common.c -+++ b/arch/mips/ath79/dev-common.c -@@ -156,4 +156,5 @@ void __init ath79_gpio_init(void) - } - - platform_device_register(&ath79_gpio_device); -+ ath79_gpio_base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); - } ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -25,6 +25,9 @@ unsigned long ath79_get_sys_clk_rate(con - void ath79_ddr_ctrl_init(void); - void ath79_ddr_wb_flush(unsigned int reg); - -+void ath79_gpio_function_enable(u32 mask); -+void ath79_gpio_function_disable(u32 mask); -+void ath79_gpio_function_setup(u32 set, u32 clear); - void ath79_gpio_init(void); - - #endif /* __ATH79_COMMON_H */ diff --git a/target/linux/ar71xx/patches-4.4/004-register_gpio_driver_earlier.patch b/target/linux/ar71xx/patches-4.4/004-register_gpio_driver_earlier.patch deleted file mode 100644 index 0c07cb18c..000000000 --- a/target/linux/ar71xx/patches-4.4/004-register_gpio_driver_earlier.patch +++ /dev/null @@ -1,15 +0,0 @@ -HACK: register the GPIO driver earlier to ensure that gpio_request calls -from mach files succeed. - ---- a/drivers/gpio/gpio-ath79.c -+++ b/drivers/gpio/gpio-ath79.c -@@ -202,4 +202,8 @@ static struct platform_driver ath79_gpio - .probe = ath79_gpio_probe, - }; - --module_platform_driver(ath79_gpio_driver); -+static int __init ath79_gpio_init(void) -+{ -+ return platform_driver_register(&ath79_gpio_driver); -+} -+postcore_initcall(ath79_gpio_init); diff --git a/target/linux/ar71xx/patches-4.4/100-MIPS-ath79-Avoid-using-unitialized-reg-variable.patch b/target/linux/ar71xx/patches-4.4/100-MIPS-ath79-Avoid-using-unitialized-reg-variable.patch deleted file mode 100644 index 8d5b08998..000000000 --- a/target/linux/ar71xx/patches-4.4/100-MIPS-ath79-Avoid-using-unitialized-reg-variable.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 8b7a76e72fc819753878cd5684e243f33f847c79 Mon Sep 17 00:00:00 2001 -From: Markos Chandras -Date: Wed, 21 Aug 2013 11:47:22 +0100 -Subject: [PATCH] MIPS: ath79: Avoid using unitialized 'reg' variable - -Fixes the following build error: -arch/mips/include/asm/mach-ath79/ath79.h:139:20: error: 'reg' may be used -uninitialized in this function [-Werror=maybe-uninitialized] -arch/mips/ath79/common.c:62:6: note: 'reg' was declared here -In file included from arch/mips/ath79/common.c:20:0: -arch/mips/ath79/common.c: In function 'ath79_device_reset_clear': -arch/mips/include/asm/mach-ath79/ath79.h:139:20: -error: 'reg' may be used uninitialized in this function -[-Werror=maybe-uninitialized] -arch/mips/ath79/common.c:90:6: note: 'reg' was declared here - -Signed-off-by: Markos Chandras -Acked-by: Gabor Juhos ---- - arch/mips/ath79/common.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -106,7 +106,7 @@ void ath79_device_reset_set(u32 mask) - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; - else -- BUG(); -+ panic("Reset register not defined for this SOC"); - - spin_lock_irqsave(&ath79_device_reset_lock, flags); - t = ath79_reset_rr(reg); -@@ -134,7 +134,7 @@ void ath79_device_reset_clear(u32 mask) - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; - else -- BUG(); -+ panic("Reset register not defined for this SOC"); - - spin_lock_irqsave(&ath79_device_reset_lock, flags); - t = ath79_reset_rr(reg); diff --git a/target/linux/ar71xx/patches-4.4/101-MIPS-ath79-make-ath79_ddr_ctrl_init-compatible-for-n.patch b/target/linux/ar71xx/patches-4.4/101-MIPS-ath79-make-ath79_ddr_ctrl_init-compatible-for-n.patch deleted file mode 100644 index 09e6617b9..000000000 --- a/target/linux/ar71xx/patches-4.4/101-MIPS-ath79-make-ath79_ddr_ctrl_init-compatible-for-n.patch +++ /dev/null @@ -1,31 +0,0 @@ -From: Felix Fietkau -Date: Sat, 14 May 2016 20:20:04 +0200 -Subject: [PATCH] MIPS: ath79: make ath79_ddr_ctrl_init() compatible for newer - SoCs - -AR913x, AR724x and AR933x are the only SoCs where the -ath79_ddr_wb_flush_base starts at 0x7c, all newer SoCs use 0x9c -Invert the logic to make the code compatible with AR95xx - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -46,12 +46,12 @@ void ath79_ddr_ctrl_init(void) - { - ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE, - AR71XX_DDR_CTRL_SIZE); -- if (soc_is_ar71xx() || soc_is_ar934x()) { -- ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c; -- ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c; -- } else { -+ if (soc_is_ar913x() || soc_is_ar724x() || soc_is_ar933x()) { - ath79_ddr_wb_flush_base = ath79_ddr_base + 0x7c; - ath79_ddr_pci_win_base = 0; -+ } else { -+ ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c; -+ ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c; - } - } - EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); diff --git a/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch b/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch deleted file mode 100644 index 64fb545b2..000000000 --- a/target/linux/ar71xx/patches-4.4/103-MIPS-ath79-fix-register-address-in-ath79_ddr_wb_flus.patch +++ /dev/null @@ -1,23 +0,0 @@ -From: Felix Fietkau -Date: Wed, 18 May 2016 18:03:31 +0200 -Subject: [PATCH] MIPS: ath79: fix register address in ath79_ddr_wb_flush() - -ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets -need to be a multiple of 4. - -Cc: Alban Bedel -Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface") -Signed-off-by: Felix Fietkau ---- - ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); - - void ath79_ddr_wb_flush(u32 reg) - { -- void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg; -+ void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg * 4; - - /* Flush the DDR write buffer. */ - __raw_writel(0x1, flush_reg); diff --git a/target/linux/ar71xx/patches-4.4/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch b/target/linux/ar71xx/patches-4.4/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch deleted file mode 100644 index 3c355cd21..000000000 --- a/target/linux/ar71xx/patches-4.4/104-spi-spi-ath79-support-multiple-internal-chip-select-.patch +++ /dev/null @@ -1,70 +0,0 @@ -From: Felix Fietkau -Date: Fri, 9 Dec 2016 20:09:16 +0100 -Subject: [PATCH] spi: spi-ath79: support multiple internal chip select - lines - -Several devices with multiple flash chips use the internal chip select -lines. Don't assume that chip select 1 and above are GPIO lines. - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -78,14 +78,16 @@ static void ath79_spi_chipselect(struct - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); - } - -- if (spi->chip_select) { -+ if (gpio_is_valid(spi->cs_gpio)) { - /* SPI is normally active-low */ - gpio_set_value(spi->cs_gpio, cs_high); - } else { -+ u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); -+ - if (cs_high) -- sp->ioc_base |= AR71XX_SPI_IOC_CS0; -+ sp->ioc_base |= cs_bit; - else -- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; -+ sp->ioc_base &= ~cs_bit; - - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); - } -@@ -118,11 +120,8 @@ static int ath79_spi_setup_cs(struct spi - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - int status; - -- if (spi->chip_select && !gpio_is_valid(spi->cs_gpio)) -- return -EINVAL; -- - status = 0; -- if (spi->chip_select) { -+ if (gpio_is_valid(spi->cs_gpio)) { - unsigned long flags; - - flags = GPIOF_DIR_OUT; -@@ -134,10 +133,12 @@ static int ath79_spi_setup_cs(struct spi - status = gpio_request_one(spi->cs_gpio, flags, - dev_name(&spi->dev)); - } else { -+ u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); -+ - if (spi->mode & SPI_CS_HIGH) -- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; -+ sp->ioc_base &= ~cs_bit; - else -- sp->ioc_base |= AR71XX_SPI_IOC_CS0; -+ sp->ioc_base |= cs_bit; - - ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); - } -@@ -147,7 +148,7 @@ static int ath79_spi_setup_cs(struct spi - - static void ath79_spi_cleanup_cs(struct spi_device *spi) - { -- if (spi->chip_select) { -+ if (gpio_is_valid(spi->cs_gpio)) { - gpio_free(spi->cs_gpio); - } - } diff --git a/target/linux/ar71xx/patches-4.4/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch b/target/linux/ar71xx/patches-4.4/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch deleted file mode 100644 index 11b6a8310..000000000 --- a/target/linux/ar71xx/patches-4.4/105-spi-spi-ath79-use-gpio_set_value_cansleep-for-GPIO-c.patch +++ /dev/null @@ -1,19 +0,0 @@ -From: Felix Fietkau -Date: Fri, 9 Dec 2016 20:11:35 +0100 -Subject: [PATCH] spi: spi-ath79: use gpio_set_value_cansleep for GPIO chip - select - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -80,7 +80,7 @@ static void ath79_spi_chipselect(struct - - if (gpio_is_valid(spi->cs_gpio)) { - /* SPI is normally active-low */ -- gpio_set_value(spi->cs_gpio, cs_high); -+ gpio_set_value_cansleep(spi->cs_gpio, cs_high); - } else { - u32 cs_bit = AR71XX_SPI_IOC_CS(spi->chip_select); - diff --git a/target/linux/ar71xx/patches-4.4/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch b/target/linux/ar71xx/patches-4.4/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch deleted file mode 100644 index e785b30ef..000000000 --- a/target/linux/ar71xx/patches-4.4/106-01-MIPS-ath79-fix-AR724X_PLL_REG_PCIE_CONFIG-offset.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 0f15814bcdf59f10b708a3fba636acb089e9a4f1 Mon Sep 17 00:00:00 2001 -From: Mathias Kresin -Date: Thu, 30 Mar 2017 15:34:39 +0200 -Subject: [PATCH] MIPS: ath79: fix AR724X_PLL_REG_PCIE_CONFIG offset - -According to the QCA u-boot source the "PCIE Phase Lock Loop -Configuration (PCIE_PLL_CONFIG)" register is for all SoCs except the -QCA955X and QCA956X at offset 0x10. - -Since the PCIE PLL config register is only defined for the AR724x fix -only this value. The value is wrong since the day it was added and isn't -yet used by any driver. - -Signed-off-by: Mathias Kresin ---- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -167,7 +167,7 @@ - #define AR71XX_AHB_DIV_MASK 0x7 - - #define AR724X_PLL_REG_CPU_CONFIG 0x00 --#define AR724X_PLL_REG_PCIE_CONFIG 0x18 -+#define AR724X_PLL_REG_PCIE_CONFIG 0x10 - - #define AR724X_PLL_FB_SHIFT 0 - #define AR724X_PLL_FB_MASK 0x3ff diff --git a/target/linux/ar71xx/patches-4.4/106-02-MIPS-ath79-do-AR724x-PCIe-root-complex-init.patch b/target/linux/ar71xx/patches-4.4/106-02-MIPS-ath79-do-AR724x-PCIe-root-complex-init.patch deleted file mode 100644 index d3948b835..000000000 --- a/target/linux/ar71xx/patches-4.4/106-02-MIPS-ath79-do-AR724x-PCIe-root-complex-init.patch +++ /dev/null @@ -1,113 +0,0 @@ -From 460f382c278fe66059a773c41cbcd0db86d53983 Mon Sep 17 00:00:00 2001 -From: Mathias Kresin -Date: Thu, 13 Apr 2017 09:47:42 +0200 -Subject: [PATCH] MIPS: pci-ar724x: get PCIe controller out of reset - -The ar724x pci driver expects the PCIe controller to be brought out of -reset by the bootloader. - -At least the AVM Fritz 300E bootloader doesn't take care of releasing -the different PCIe controller related resets which causes an endless -hang as soon as either the PCIE Reset register (0x180f0018) or the PCI -Application Control register (0x180f0000) is read from. - -Do the full "PCIE Root Complex Initialization Sequence" if the PCIe -host controller is still in reset during probing. - -The QCA u-boot sleeps 10ms after the PCIE Application Control bit is -set to ready. It has been shown that 10ms might not be enough time if -PCIe should be used right after setting the bit. During my tests it -took up to 20ms till the link was up. Giving the link up to 100ms -should work for all cases. - -Signed-off-by: Mathias Kresin ---- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 ++ - arch/mips/pci/pci-ar724x.c | 42 ++++++++++++++++++++++++++ - 2 files changed, 45 insertions(+) - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -169,6 +169,9 @@ - #define AR724X_PLL_REG_CPU_CONFIG 0x00 - #define AR724X_PLL_REG_PCIE_CONFIG 0x10 - -+#define AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS BIT(16) -+#define AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET BIT(25) -+ - #define AR724X_PLL_FB_SHIFT 0 - #define AR724X_PLL_FB_MASK 0x3ff - #define AR724X_PLL_REF_DIV_SHIFT 10 ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -12,14 +12,18 @@ - #include - #include - #include -+#include - #include - #include - #include - -+#define AR724X_PCI_REG_APP 0x0 - #define AR724X_PCI_REG_RESET 0x18 - #define AR724X_PCI_REG_INT_STATUS 0x4c - #define AR724X_PCI_REG_INT_MASK 0x50 - -+#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0) -+ - #define AR724X_PCI_RESET_LINK_UP BIT(0) - - #define AR724X_PCI_INT_DEV0 BIT(14) -@@ -325,6 +329,37 @@ static void ar724x_pci_irq_init(struct a - apc); - } - -+static void ar724x_pci_hw_init(struct ar724x_pci_controller *apc) -+{ -+ u32 ppl, app; -+ int wait = 0; -+ -+ /* deassert PCIe host controller and PCIe PHY reset */ -+ ath79_device_reset_clear(AR724X_RESET_PCIE); -+ ath79_device_reset_clear(AR724X_RESET_PCIE_PHY); -+ -+ /* remove the reset of the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ -+ /* deassert bypass for the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ -+ /* set PCIE Application Control to ready */ -+ app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); -+ app |= AR724X_PCI_APP_LTSSM_ENABLE; -+ __raw_writel(app, apc->ctrl_base + AR724X_PCI_REG_APP); -+ -+ /* wait up to 100ms for PHY link up */ -+ do { -+ mdelay(10); -+ wait++; -+ } while (wait < 10 && !ar724x_pci_check_link(apc)); -+} -+ - static int ar724x_pci_probe(struct platform_device *pdev) - { - struct ar724x_pci_controller *apc; -@@ -383,6 +418,13 @@ static int ar724x_pci_probe(struct platf - apc->pci_controller.io_resource = &apc->io_res; - apc->pci_controller.mem_resource = &apc->mem_res; - -+ /* -+ * Do the full PCIE Root Complex Initialization Sequence if the PCIe -+ * host controller is in reset. -+ */ -+ if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE) -+ ar724x_pci_hw_init(apc); -+ - apc->link_up = ar724x_pci_check_link(apc); - if (!apc->link_up) - dev_warn(&pdev->dev, "PCIe link is down\n"); diff --git a/target/linux/ar71xx/patches-4.4/200-MIPS-ath79-fix-ar933x-wmac-reset.patch b/target/linux/ar71xx/patches-4.4/200-MIPS-ath79-fix-ar933x-wmac-reset.patch deleted file mode 100644 index b7ae0ce64..000000000 --- a/target/linux/ar71xx/patches-4.4/200-MIPS-ath79-fix-ar933x-wmac-reset.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -62,10 +62,26 @@ static void __init ar913x_wmac_setup(voi - - static int ar933x_wmac_reset(void) - { -+ int retries = 20; -+ - ath79_device_reset_set(AR933X_RESET_WMAC); - ath79_device_reset_clear(AR933X_RESET_WMAC); - -- return 0; -+ while (1) { -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); -+ if ((bootstrap & AR933X_BOOTSTRAP_EEPBUSY) == 0) -+ return 0; -+ -+ if (retries-- == 0) -+ break; -+ -+ udelay(10000); -+ } -+ -+ pr_err("ar933x: WMAC reset timed out"); -+ return -ETIMEDOUT; - } - - static int ar933x_r1_get_wmac_revision(void) diff --git a/target/linux/ar71xx/patches-4.4/201-ar913x_wmac_external_reset.patch b/target/linux/ar71xx/patches-4.4/201-ar913x_wmac_external_reset.patch deleted file mode 100644 index 9b704a3c4..000000000 --- a/target/linux/ar71xx/patches-4.4/201-ar913x_wmac_external_reset.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -44,7 +44,7 @@ static struct platform_device ath79_wmac - }, - }; - --static void __init ar913x_wmac_setup(void) -+static int ar913x_wmac_reset(void) - { - /* reset the WMAC */ - ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); -@@ -53,10 +53,19 @@ static void __init ar913x_wmac_setup(voi - ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); - mdelay(10); - -+ return 0; -+} -+ -+static void __init ar913x_wmac_setup(void) -+{ -+ ar913x_wmac_reset(); -+ - ath79_wmac_resources[0].start = AR913X_WMAC_BASE; - ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; - ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); - ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); -+ -+ ath79_wmac_data.external_reset = ar913x_wmac_reset; - } - - diff --git a/target/linux/ar71xx/patches-4.4/202-MIPS-ath79-ar934x-wmac-revision.patch b/target/linux/ar71xx/patches-4.4/202-MIPS-ath79-ar934x-wmac-revision.patch deleted file mode 100644 index 0f8016f84..000000000 --- a/target/linux/ar71xx/patches-4.4/202-MIPS-ath79-ar934x-wmac-revision.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -139,6 +139,8 @@ static void ar934x_wmac_setup(void) - ath79_wmac_data.is_clk_25mhz = false; - else - ath79_wmac_data.is_clk_25mhz = true; -+ -+ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; - } - - static void qca955x_wmac_setup(void) diff --git a/target/linux/ar71xx/patches-4.4/203-MIPS-ath79-fix-restart.patch b/target/linux/ar71xx/patches-4.4/203-MIPS-ath79-fix-restart.patch deleted file mode 100644 index 77773ea92..000000000 --- a/target/linux/ar71xx/patches-4.4/203-MIPS-ath79-fix-restart.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -44,6 +44,7 @@ static char ath79_sys_type[ATH79_SYS_TYP - - static void ath79_restart(char *command) - { -+ local_irq_disable(); - ath79_device_reset_set(AR71XX_RESET_FULL_CHIP); - for (;;) - if (cpu_wait) ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -134,6 +134,7 @@ static inline u32 ath79_pll_rr(unsigned - static inline void ath79_reset_wr(unsigned reg, u32 val) - { - __raw_writel(val, ath79_reset_base + reg); -+ (void) __raw_readl(ath79_reset_base + reg); /* flush */ - } - - static inline u32 ath79_reset_rr(unsigned reg) diff --git a/target/linux/ar71xx/patches-4.4/220-add_cpu_feature_overrides.patch b/target/linux/ar71xx/patches-4.4/220-add_cpu_feature_overrides.patch deleted file mode 100644 index d925f9262..000000000 --- a/target/linux/ar71xx/patches-4.4/220-add_cpu_feature_overrides.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h -+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h -@@ -36,6 +36,7 @@ - #define cpu_has_mdmx 0 - #define cpu_has_mips3d 0 - #define cpu_has_smartmips 0 -+#define cpu_has_rixi 0 - - #define cpu_has_mips32r1 1 - #define cpu_has_mips32r2 1 -@@ -43,6 +44,7 @@ - #define cpu_has_mips64r2 0 - - #define cpu_has_mipsmt 0 -+#define cpu_has_userlocal 0 - - #define cpu_has_64bits 0 - #define cpu_has_64bit_zero_reg 0 -@@ -51,5 +53,9 @@ - - #define cpu_dcache_line_size() 32 - #define cpu_icache_line_size() 32 -+#define cpu_has_vtag_icache 0 -+#define cpu_has_dc_aliases 1 -+#define cpu_has_ic_fills_f_dc 0 -+#define cpu_has_pindexed_dcache 0 - - #endif /* __ASM_MACH_ATH79_CPU_FEATURE_OVERRIDES_H */ diff --git a/target/linux/ar71xx/patches-4.4/300-MIPS-add-MIPS_MACHINE_NONAME-macro.patch b/target/linux/ar71xx/patches-4.4/300-MIPS-add-MIPS_MACHINE_NONAME-macro.patch deleted file mode 100644 index 0bc64b7a1..000000000 --- a/target/linux/ar71xx/patches-4.4/300-MIPS-add-MIPS_MACHINE_NONAME-macro.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/mips/include/asm/mips_machine.h -+++ b/arch/mips/include/asm/mips_machine.h -@@ -36,6 +36,18 @@ static struct mips_machine machine_##_ty - .mach_setup = _setup, \ - }; - -+#define MIPS_MACHINE_NONAME(_type, _id, _setup) \ -+static const char machine_id_##_type[] __initconst \ -+ __aligned(1) = _id; \ -+static struct mips_machine machine_##_type \ -+ __used __section(.mips.machines.init) = \ -+{ \ -+ .mach_type = _type, \ -+ .mach_id = machine_id_##_type, \ -+ .mach_name = NULL, \ -+ .mach_setup = _setup, \ -+}; -+ - extern long __mips_machines_start; - extern long __mips_machines_end; - diff --git a/target/linux/ar71xx/patches-4.4/310-lib-add-rle-decompression.patch b/target/linux/ar71xx/patches-4.4/310-lib-add-rle-decompression.patch deleted file mode 100644 index f5466db17..000000000 --- a/target/linux/ar71xx/patches-4.4/310-lib-add-rle-decompression.patch +++ /dev/null @@ -1,124 +0,0 @@ ---- a/lib/Kconfig -+++ b/lib/Kconfig -@@ -247,6 +247,9 @@ config LZMA_COMPRESS - config LZMA_DECOMPRESS - tristate - -+config RLE_DECOMPRESS -+ tristate -+ - # - # These all provide a common interface (hence the apparent duplication with - # ZLIB_INFLATE; DECOMPRESS_GZIP is just a wrapper.) ---- a/lib/Makefile -+++ b/lib/Makefile -@@ -110,6 +110,7 @@ obj-$(CONFIG_XZ_DEC) += xz/ - obj-$(CONFIG_RAID6_PQ) += raid6/ - obj-$(CONFIG_LZMA_COMPRESS) += lzma/ - obj-$(CONFIG_LZMA_DECOMPRESS) += lzma/ -+obj-$(CONFIG_RLE_DECOMPRESS) += rle.o - - lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o - lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o ---- /dev/null -+++ b/include/linux/rle.h -@@ -0,0 +1,18 @@ -+#ifndef _RLE_H_ -+#define _RLE_H_ -+ -+#ifdef CONFIG_RLE_DECOMPRESS -+int rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done); -+#else -+static inline int -+rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done) -+{ -+ return -ENOTSUPP; -+} -+#endif /* CONFIG_RLE_DECOMPRESS */ -+ -+#endif /* _RLE_H_ */ ---- /dev/null -+++ b/lib/rle.c -@@ -0,0 +1,78 @@ -+/* -+ * RLE decoding routine -+ * -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+ -+int rle_decode(const unsigned char *src, size_t srclen, -+ unsigned char *dst, size_t dstlen, -+ size_t *src_done, size_t *dst_done) -+{ -+ size_t srcpos, dstpos; -+ int ret; -+ -+ srcpos = 0; -+ dstpos = 0; -+ ret = -EINVAL; -+ -+ /* sanity checks */ -+ if (!src || !srclen || !dst || !dstlen) -+ goto out; -+ -+ while (1) { -+ char count; -+ -+ if (srcpos >= srclen) -+ break; -+ -+ count = (char) src[srcpos++]; -+ if (count == 0) { -+ ret = 0; -+ break; -+ } -+ -+ if (count > 0) { -+ unsigned char c; -+ -+ if (srcpos >= srclen) -+ break; -+ -+ c = src[srcpos++]; -+ -+ while (count--) { -+ if (dstpos >= dstlen) -+ break; -+ -+ dst[dstpos++] = c; -+ } -+ } else { -+ count *= -1; -+ -+ while (count--) { -+ if (srcpos >= srclen) -+ break; -+ if (dstpos >= dstlen) -+ break; -+ dst[dstpos++] = src[srcpos++]; -+ } -+ } -+ } -+ -+out: -+ if (src_done) -+ *src_done = srcpos; -+ if (dst_done) -+ *dst_done = dstpos; -+ -+ return ret; -+} -+ -+EXPORT_SYMBOL_GPL(rle_decode); diff --git a/target/linux/ar71xx/patches-4.4/401-mtd-physmap-add-lock-unlock.patch b/target/linux/ar71xx/patches-4.4/401-mtd-physmap-add-lock-unlock.patch deleted file mode 100644 index db7b3ca83..000000000 --- a/target/linux/ar71xx/patches-4.4/401-mtd-physmap-add-lock-unlock.patch +++ /dev/null @@ -1,94 +0,0 @@ ---- a/drivers/mtd/maps/physmap.c -+++ b/drivers/mtd/maps/physmap.c -@@ -31,6 +31,66 @@ struct physmap_flash_info { - int vpp_refcnt; - }; - -+static struct platform_device *physmap_map2pdev(struct map_info *map) -+{ -+ return (struct platform_device *) map->map_priv_1; -+} -+ -+static void physmap_lock(struct map_info *map) -+{ -+ struct platform_device *pdev; -+ struct physmap_flash_data *physmap_data; -+ -+ pdev = physmap_map2pdev(map); -+ physmap_data = pdev->dev.platform_data; -+ physmap_data->lock(pdev); -+} -+ -+static void physmap_unlock(struct map_info *map) -+{ -+ struct platform_device *pdev; -+ struct physmap_flash_data *physmap_data; -+ -+ pdev = physmap_map2pdev(map); -+ physmap_data = pdev->dev.platform_data; -+ physmap_data->unlock(pdev); -+} -+ -+static map_word physmap_flash_read_lock(struct map_info *map, unsigned long ofs) -+{ -+ map_word ret; -+ -+ physmap_lock(map); -+ ret = inline_map_read(map, ofs); -+ physmap_unlock(map); -+ -+ return ret; -+} -+ -+static void physmap_flash_write_lock(struct map_info *map, map_word d, -+ unsigned long ofs) -+{ -+ physmap_lock(map); -+ inline_map_write(map, d, ofs); -+ physmap_unlock(map); -+} -+ -+static void physmap_flash_copy_from_lock(struct map_info *map, void *to, -+ unsigned long from, ssize_t len) -+{ -+ physmap_lock(map); -+ inline_map_copy_from(map, to, from, len); -+ physmap_unlock(map); -+} -+ -+static void physmap_flash_copy_to_lock(struct map_info *map, unsigned long to, -+ const void *from, ssize_t len) -+{ -+ physmap_lock(map); -+ inline_map_copy_to(map, to, from, len); -+ physmap_unlock(map); -+} -+ - static int physmap_flash_remove(struct platform_device *dev) - { - struct physmap_flash_info *info; -@@ -153,6 +213,13 @@ static int physmap_flash_probe(struct pl - - simple_map_init(&info->map[i]); - -+ if (physmap_data->lock && physmap_data->unlock) { -+ info->map[i].read = physmap_flash_read_lock; -+ info->map[i].write = physmap_flash_write_lock; -+ info->map[i].copy_from = physmap_flash_copy_from_lock; -+ info->map[i].copy_to = physmap_flash_copy_to_lock; -+ } -+ - probe_type = rom_probe_types; - if (physmap_data->probe_type == NULL) { - for (; info->mtd[i] == NULL && *probe_type != NULL; probe_type++) ---- a/include/linux/mtd/physmap.h -+++ b/include/linux/mtd/physmap.h -@@ -25,6 +25,8 @@ struct physmap_flash_data { - unsigned int width; - int (*init)(struct platform_device *); - void (*exit)(struct platform_device *); -+ void (*lock)(struct platform_device *); -+ void (*unlock)(struct platform_device *); - void (*set_vpp)(struct platform_device *, int); - unsigned int nr_parts; - unsigned int pfow_base; diff --git a/target/linux/ar71xx/patches-4.4/402-mtd-SST39VF6401B-support.patch b/target/linux/ar71xx/patches-4.4/402-mtd-SST39VF6401B-support.patch deleted file mode 100644 index 0d483ab1a..000000000 --- a/target/linux/ar71xx/patches-4.4/402-mtd-SST39VF6401B-support.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/drivers/mtd/chips/jedec_probe.c -+++ b/drivers/mtd/chips/jedec_probe.c -@@ -148,6 +148,7 @@ - #define SST39LF160 0x2782 - #define SST39VF1601 0x234b - #define SST39VF3201 0x235b -+#define SST39VF6401B 0x236d - #define SST39WF1601 0x274b - #define SST39WF1602 0x274a - #define SST39LF512 0x00D4 -@@ -1569,6 +1570,18 @@ static const struct amd_flash_info jedec - ERASEINFO(0x10000,64), - } - }, { -+ .mfr_id = CFI_MFR_SST, -+ .dev_id = SST39VF6401B, -+ .name = "SST 39VF6401B", -+ .devtypes = CFI_DEVICETYPE_X16, -+ .uaddr = MTD_UADDR_0xAAAA_0x5555, -+ .dev_size = SIZE_8MiB, -+ .cmd_set = P_ID_AMD_STD, -+ .nr_regions = 1, -+ .regions = { -+ ERASEINFO(0x10000,128) -+ } -+ }, { - .mfr_id = CFI_MFR_ST, - .dev_id = M29F800AB, - .name = "ST M29F800AB", diff --git a/target/linux/ar71xx/patches-4.4/403-mtd_fix_cfi_cmdset_0002_status_check.patch b/target/linux/ar71xx/patches-4.4/403-mtd_fix_cfi_cmdset_0002_status_check.patch deleted file mode 100644 index 1ccce4ece..000000000 --- a/target/linux/ar71xx/patches-4.4/403-mtd_fix_cfi_cmdset_0002_status_check.patch +++ /dev/null @@ -1,69 +0,0 @@ ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -1632,8 +1632,8 @@ static int __xipram do_write_oneword(str - break; - } - -- if (chip_ready(map, adr)) -- break; -+ if (chip_good(map, adr, datum)) -+ goto enable_xip; - - /* Latency issues. Drop the lock, wait a while and retry */ - UDELAY(map, chip, adr, 1); -@@ -1649,6 +1649,8 @@ static int __xipram do_write_oneword(str - - ret = -EIO; - } -+ -+ enable_xip: - xip_enable(map, chip, adr); - op_done: - if (mode == FL_OTP_WRITE) -@@ -2227,7 +2229,6 @@ static int cfi_amdstd_panic_write(struct - return 0; - } - -- - /* - * Handle devices with one erase region, that only implement - * the chip erase command. -@@ -2291,8 +2292,8 @@ static int __xipram do_erase_chip(struct - chip->erase_suspended = 0; - } - -- if (chip_ready(map, adr)) -- break; -+ if (chip_good(map, adr, map_word_ff(map))) -+ goto op_done; - - if (time_after(jiffies, timeo)) { - printk(KERN_WARNING "MTD %s(): software timeout\n", -@@ -2312,6 +2313,7 @@ static int __xipram do_erase_chip(struct - ret = -EIO; - } - -+ op_done: - chip->state = FL_READY; - xip_enable(map, chip, adr); - DISABLE_VPP(map); -@@ -2380,9 +2382,9 @@ static int __xipram do_erase_oneblock(st - chip->erase_suspended = 0; - } - -- if (chip_ready(map, adr)) { -+ if (chip_good(map, adr, map_word_ff(map))) { - xip_enable(map, chip, adr); -- break; -+ goto op_done; - } - - if (time_after(jiffies, timeo)) { -@@ -2404,6 +2406,7 @@ static int __xipram do_erase_oneblock(st - ret = -EIO; - } - -+ op_done: - chip->state = FL_READY; - DISABLE_VPP(map); - put_chip(map, chip, adr); diff --git a/target/linux/ar71xx/patches-4.4/404-mtd-cybertan-trx-parser.patch b/target/linux/ar71xx/patches-4.4/404-mtd-cybertan-trx-parser.patch deleted file mode 100644 index 3f67c4c5d..000000000 --- a/target/linux/ar71xx/patches-4.4/404-mtd-cybertan-trx-parser.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -174,6 +174,12 @@ config MTD_BCM47XX_PARTS - This provides partitions parser for devices based on BCM47xx - boards. - -+config MTD_CYBERTAN_PARTS -+ tristate "Cybertan partitioning support" -+ depends on ATH79 -+ ---help--- -+ Cybertan partitioning support -+ - config MTD_MYLOADER_PARTS - tristate "MyLoader partition parsing" - depends on ADM5120 || ATH25 || ATH79 ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o - obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o - obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o -+obj-$(CONFIG_MTD_CYBERTAN_PARTS) += cybertan_part.o - - # 'Users' - code which presents functionality to userspace. - obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o diff --git a/target/linux/ar71xx/patches-4.4/405-mtd-tp-link-partition-parser.patch b/target/linux/ar71xx/patches-4.4/405-mtd-tp-link-partition-parser.patch deleted file mode 100644 index 9d0d1db16..000000000 --- a/target/linux/ar71xx/patches-4.4/405-mtd-tp-link-partition-parser.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -196,6 +196,12 @@ config MTD_MYLOADER_PARTS - You will still need the parsing functions to be called by the driver - for your particular device. It won't happen automatically. - -+config MTD_TPLINK_PARTS -+ tristate "TP-Link AR7XXX/AR9XXX partitioning support" -+ depends on ATH79 -+ ---help--- -+ TBD. -+ - comment "User Modules And Translation Layers" - - # ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o - obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o - obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o -+obj-$(CONFIG_MTD_TPLINK_PARTS) += tplinkpart.o - obj-$(CONFIG_MTD_CYBERTAN_PARTS) += cybertan_part.o - - # 'Users' - code which presents functionality to userspace. diff --git a/target/linux/ar71xx/patches-4.4/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch b/target/linux/ar71xx/patches-4.4/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch deleted file mode 100644 index 04acdb6d9..000000000 --- a/target/linux/ar71xx/patches-4.4/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -251,7 +251,9 @@ static int m25p_probe(struct spi_device - - ppdata.of_node = spi->dev.of_node; - -- return mtd_device_parse_register(&nor->mtd, NULL, &ppdata, -+ return mtd_device_parse_register(&nor->mtd, -+ data ? data->part_probes : NULL, -+ &ppdata, - data ? data->parts : NULL, - data ? data->nr_parts : 0); - } ---- a/include/linux/spi/flash.h -+++ b/include/linux/spi/flash.h -@@ -24,6 +24,7 @@ struct flash_platform_data { - unsigned int nr_parts; - - char *type; -+ const char **part_probes; - - /* we'll likely add more ... use JEDEC IDs, etc */ - }; diff --git a/target/linux/ar71xx/patches-4.4/408-mtd-redboot_partition_scan.patch b/target/linux/ar71xx/patches-4.4/408-mtd-redboot_partition_scan.patch deleted file mode 100644 index cd41e7ceb..000000000 --- a/target/linux/ar71xx/patches-4.4/408-mtd-redboot_partition_scan.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -76,12 +76,18 @@ static int parse_redboot_partitions(stru - static char nullstring[] = "unallocated"; - #endif - -+ buf = vmalloc(master->erasesize); -+ if (!buf) -+ return -ENOMEM; -+ -+ restart: - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; - while (mtd_block_isbad(master, offset)) { - if (!offset) { - nogood: - printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); -+ vfree(buf); - return -EIO; - } - offset -= master->erasesize; -@@ -94,10 +100,6 @@ static int parse_redboot_partitions(stru - goto nogood; - } - } -- buf = vmalloc(master->erasesize); -- -- if (!buf) -- return -ENOMEM; - - printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", - master->name, offset); -@@ -170,6 +172,11 @@ static int parse_redboot_partitions(stru - } - if (i == numslots) { - /* Didn't find it */ -+ if (offset + master->erasesize < master->size) { -+ /* not at the end of the flash yet, maybe next block :) */ -+ directory++; -+ goto restart; -+ } - printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", - master->name); - ret = 0; diff --git a/target/linux/ar71xx/patches-4.4/409-mtd-rb4xx_nand_driver.patch b/target/linux/ar71xx/patches-4.4/409-mtd-rb4xx_nand_driver.patch deleted file mode 100644 index 4039aa185..000000000 --- a/target/linux/ar71xx/patches-4.4/409-mtd-rb4xx_nand_driver.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -546,4 +546,8 @@ config MTD_NAND_HISI504 - help - Enables support for NAND controller on Hisilicon SoC Hip04. - -+config MTD_NAND_RB4XX -+ tristate "NAND flash driver for RouterBoard 4xx series" -+ depends on MTD_NAND && ATH79_MACH_RB4XX -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -33,6 +33,7 @@ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx27 - obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o - obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o - obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o -+obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o - obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o - obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o - obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o diff --git a/target/linux/ar71xx/patches-4.4/410-mtd-rb750-nand-driver.patch b/target/linux/ar71xx/patches-4.4/410-mtd-rb750-nand-driver.patch deleted file mode 100644 index c67d1776f..000000000 --- a/target/linux/ar71xx/patches-4.4/410-mtd-rb750-nand-driver.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -550,4 +550,8 @@ config MTD_NAND_RB4XX - tristate "NAND flash driver for RouterBoard 4xx series" - depends on MTD_NAND && ATH79_MACH_RB4XX - -+config MTD_NAND_RB750 -+ tristate "NAND flash driver for the RouterBoard 750" -+ depends on MTD_NAND && ATH79_MACH_RB750 -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -34,6 +34,7 @@ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx - obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o - obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o - obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o -+obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o - obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o - obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o - obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o diff --git a/target/linux/ar71xx/patches-4.4/411-mtd-cfi_cmdset_0002-force-word-write.patch b/target/linux/ar71xx/patches-4.4/411-mtd-cfi_cmdset_0002-force-word-write.patch deleted file mode 100644 index 39c547818..000000000 --- a/target/linux/ar71xx/patches-4.4/411-mtd-cfi_cmdset_0002-force-word-write.patch +++ /dev/null @@ -1,61 +0,0 @@ ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -40,7 +40,7 @@ - #include - - #define AMD_BOOTLOC_BUG --#define FORCE_WORD_WRITE 0 -+#define FORCE_WORD_WRITE 1 - - #define MAX_WORD_RETRIES 3 - -@@ -51,7 +51,9 @@ - - static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -+#if !FORCE_WORD_WRITE - static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -+#endif - static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *); - static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *); - static void cfi_amdstd_sync (struct mtd_info *); -@@ -202,6 +204,7 @@ static void fixup_amd_bootblock(struct m - } - #endif - -+#if !FORCE_WORD_WRITE - static void fixup_use_write_buffers(struct mtd_info *mtd) - { - struct map_info *map = mtd->priv; -@@ -211,6 +214,7 @@ static void fixup_use_write_buffers(stru - mtd->_write = cfi_amdstd_write_buffers; - } - } -+#endif /* !FORCE_WORD_WRITE */ - - /* Atmel chips don't use the same PRI format as AMD chips */ - static void fixup_convert_atmel_pri(struct mtd_info *mtd) -@@ -1791,6 +1795,7 @@ static int cfi_amdstd_write_words(struct - /* - * FIXME: interleaved mode not tested, and probably not supported! - */ -+#if !FORCE_WORD_WRITE - static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip, - unsigned long adr, const u_char *buf, - int len) -@@ -1919,7 +1924,6 @@ static int __xipram do_write_buffer(stru - return ret; - } - -- - static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) - { -@@ -1994,6 +1998,7 @@ static int cfi_amdstd_write_buffers(stru - - return 0; - } -+#endif /* !FORCE_WORD_WRITE */ - - /* - * Wait for the flash chip to become ready to write data diff --git a/target/linux/ar71xx/patches-4.4/412-mtd-m25p80-zero-partition-parser-data.patch b/target/linux/ar71xx/patches-4.4/412-mtd-m25p80-zero-partition-parser-data.patch deleted file mode 100644 index 866920a24..000000000 --- a/target/linux/ar71xx/patches-4.4/412-mtd-m25p80-zero-partition-parser-data.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -249,6 +249,7 @@ static int m25p_probe(struct spi_device - if (ret) - return ret; - -+ memset(&ppdata, '\0', sizeof(ppdata)); - ppdata.of_node = spi->dev.of_node; - - return mtd_device_parse_register(&nor->mtd, diff --git a/target/linux/ar71xx/patches-4.4/413-mtd-ar934x-nand-driver.patch b/target/linux/ar71xx/patches-4.4/413-mtd-ar934x-nand-driver.patch deleted file mode 100644 index cfcd07a19..000000000 --- a/target/linux/ar71xx/patches-4.4/413-mtd-ar934x-nand-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -554,4 +554,12 @@ config MTD_NAND_RB750 - tristate "NAND flash driver for the RouterBoard 750" - depends on MTD_NAND && ATH79_MACH_RB750 - -+config MTD_NAND_AR934X -+ tristate "NAND flash driver for the Qualcomm Atheros AR934x/QCA955x SoCs" -+ depends on (SOC_AR934X || SOC_QCA955X) -+ -+config MTD_NAND_AR934X_HW_ECC -+ bool "Hardware ECC support for the AR934X NAND Controller (EXPERIMENTAL)" -+ depends on MTD_NAND_AR934X -+ - endif # MTD_NAND ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -13,6 +13,7 @@ obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams- - obj-$(CONFIG_MTD_NAND_DENALI) += denali.o - obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o - obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o -+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nfc.o - obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o - obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o - obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o diff --git a/target/linux/ar71xx/patches-4.4/414-mtd-rb91x-nand-driver.patch b/target/linux/ar71xx/patches-4.4/414-mtd-rb91x-nand-driver.patch deleted file mode 100644 index 8b7582dce..000000000 --- a/target/linux/ar71xx/patches-4.4/414-mtd-rb91x-nand-driver.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/mtd/nand/Kconfig -+++ b/drivers/mtd/nand/Kconfig -@@ -554,6 +554,10 @@ config MTD_NAND_RB750 - tristate "NAND flash driver for the RouterBoard 750" - depends on MTD_NAND && ATH79_MACH_RB750 - -+config MTD_NAND_RB91X -+ tristate "NAND flash driver for the RouterBOARD 91x series" -+ depends on MTD_NAND && ATH79_MACH_RB91X -+ - config MTD_NAND_AR934X - tristate "NAND flash driver for the Qualcomm Atheros AR934x/QCA955x SoCs" - depends on (SOC_AR934X || SOC_QCA955X) ---- a/drivers/mtd/nand/Makefile -+++ b/drivers/mtd/nand/Makefile -@@ -36,6 +36,7 @@ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nan - obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o - obj-$(CONFIG_MTD_NAND_RB4XX) += rb4xx_nand.o - obj-$(CONFIG_MTD_NAND_RB750) += rb750_nand.o -+obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o - obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o - obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o - obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o diff --git a/target/linux/ar71xx/patches-4.4/420-net-ar71xx_mac_driver.patch b/target/linux/ar71xx/patches-4.4/420-net-ar71xx_mac_driver.patch deleted file mode 100644 index feb2e6a39..000000000 --- a/target/linux/ar71xx/patches-4.4/420-net-ar71xx_mac_driver.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/net/ethernet/atheros/Kconfig -+++ b/drivers/net/ethernet/atheros/Kconfig -@@ -5,7 +5,7 @@ - config NET_VENDOR_ATHEROS - bool "Atheros devices" - default y -- depends on PCI -+ depends on (PCI || ATH79) - ---help--- - If you have a network (Ethernet) card belonging to this class, say Y. - -@@ -78,4 +78,6 @@ config ALX - To compile this driver as a module, choose M here. The module - will be called alx. - -+source drivers/net/ethernet/atheros/ag71xx/Kconfig -+ - endif # NET_VENDOR_ATHEROS ---- a/drivers/net/ethernet/atheros/Makefile -+++ b/drivers/net/ethernet/atheros/Makefile -@@ -2,6 +2,7 @@ - # Makefile for the Atheros network device drivers. - # - -+obj-$(CONFIG_AG71XX) += ag71xx/ - obj-$(CONFIG_ATL1) += atlx/ - obj-$(CONFIG_ATL2) += atlx/ - obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ar71xx/patches-4.4/423-dsa-add-88e6063-driver.patch b/target/linux/ar71xx/patches-4.4/423-dsa-add-88e6063-driver.patch deleted file mode 100644 index c6b9cafad..000000000 --- a/target/linux/ar71xx/patches-4.4/423-dsa-add-88e6063-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/net/dsa/Kconfig -+++ b/drivers/net/dsa/Kconfig -@@ -13,6 +13,14 @@ config NET_DSA_MV88E6060 - This enables support for the Marvell 88E6060 ethernet switch - chip. - -+config NET_DSA_MV88E6063 -+ bool "Marvell 88E6063 ethernet switch chip support" -+ depends on NET_DSA -+ select NET_DSA_TAG_TRAILER -+ ---help--- -+ This enables support for the Marvell 88E6063 ethernet switch -+ chip -+ - config NET_DSA_MV88E6XXX_NEED_PPU - bool - default n ---- a/drivers/net/dsa/Makefile -+++ b/drivers/net/dsa/Makefile -@@ -1,4 +1,5 @@ - obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o -+obj-$(CONFIG_NET_DSA_MV88E6063) += mv88e6063.o - obj-$(CONFIG_NET_DSA_MV88E6XXX) += mv88e6xxx_drv.o - mv88e6xxx_drv-y += mv88e6xxx.o - ifdef CONFIG_NET_DSA_MV88E6123_61_65 diff --git a/target/linux/ar71xx/patches-4.4/430-drivers-link-spi-before-mtd.patch b/target/linux/ar71xx/patches-4.4/430-drivers-link-spi-before-mtd.patch deleted file mode 100644 index e1adfb018..000000000 --- a/target/linux/ar71xx/patches-4.4/430-drivers-link-spi-before-mtd.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -74,8 +74,8 @@ obj-$(CONFIG_SCSI) += scsi/ - obj-y += nvme/ - obj-$(CONFIG_ATA) += ata/ - obj-$(CONFIG_TARGET_CORE) += target/ --obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPI) += spi/ -+obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPMI) += spmi/ - obj-y += hsi/ - obj-y += net/ diff --git a/target/linux/ar71xx/patches-4.4/432-spi-rb4xx-spi-driver.patch b/target/linux/ar71xx/patches-4.4/432-spi-rb4xx-spi-driver.patch deleted file mode 100644 index 7d99c43b9..000000000 --- a/target/linux/ar71xx/patches-4.4/432-spi-rb4xx-spi-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -477,6 +477,12 @@ config SPI_QUP - This driver can also be built as a module. If so, the module - will be called spi_qup. - -+config SPI_RB4XX -+ tristate "Mikrotik RB4XX SPI master" -+ depends on SPI_MASTER && ATH79_MACH_RB4XX -+ help -+ SPI controller driver for the Mikrotik RB4xx series boards. -+ - config SPI_S3C24XX - tristate "Samsung S3C24XX series SPI" - depends on ARCH_S3C24XX ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -66,6 +66,7 @@ spi-pxa2xx-platform-objs := spi-pxa2xx. - spi-pxa2xx-platform-$(CONFIG_SPI_PXA2XX_DMA) += spi-pxa2xx-dma.o - obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o - obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o -+obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o - obj-$(CONFIG_SPI_QUP) += spi-qup.o - obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o - obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o diff --git a/target/linux/ar71xx/patches-4.4/433-spi-rb4xx-cpld-driver.patch b/target/linux/ar71xx/patches-4.4/433-spi-rb4xx-cpld-driver.patch deleted file mode 100644 index 0932c729f..000000000 --- a/target/linux/ar71xx/patches-4.4/433-spi-rb4xx-cpld-driver.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -713,6 +713,13 @@ config SPI_TLE62X0 - sysfs interface, with each line presented as a kind of GPIO - exposing both switch control and diagnostic feedback. - -+config SPI_RB4XX_CPLD -+ tristate "MikroTik RB4XX CPLD driver" -+ depends on ATH79_MACH_RB4XX -+ help -+ SPI driver for the Xilinx CPLD chip present on the -+ MikroTik RB4xx boards. -+ - # - # Add new SPI protocol masters in alphabetical order above this line - # ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -67,6 +67,7 @@ spi-pxa2xx-platform-$(CONFIG_SPI_PXA2XX_ - obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o - obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o - obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o -+obj-$(CONFIG_SPI_RB4XX_CPLD) += spi-rb4xx-cpld.o - obj-$(CONFIG_SPI_QUP) += spi-qup.o - obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o - obj-$(CONFIG_SPI_RB4XX) += spi-rb4xx.o diff --git a/target/linux/ar71xx/patches-4.4/435-spi-vsc7385_driver.patch b/target/linux/ar71xx/patches-4.4/435-spi-vsc7385_driver.patch deleted file mode 100644 index 880c088c5..000000000 --- a/target/linux/ar71xx/patches-4.4/435-spi-vsc7385_driver.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -720,6 +720,11 @@ config SPI_RB4XX_CPLD - SPI driver for the Xilinx CPLD chip present on the - MikroTik RB4xx boards. - -+config SPI_VSC7385 -+ tristate "Vitesse VSC7385 ethernet switch driver" -+ help -+ SPI driver for the Vitesse VSC7385 ethernet switch. -+ - # - # Add new SPI protocol masters in alphabetical order above this line - # ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -91,6 +91,7 @@ obj-$(CONFIG_SPI_TEGRA20_SLINK) += spi- - obj-$(CONFIG_SPI_TLE62X0) += spi-tle62x0.o - obj-$(CONFIG_SPI_TOPCLIFF_PCH) += spi-topcliff-pch.o - obj-$(CONFIG_SPI_TXX9) += spi-txx9.o -+obj-$(CONFIG_SPI_VSC7385) += spi-vsc7385.o - obj-$(CONFIG_SPI_XCOMM) += spi-xcomm.o - obj-$(CONFIG_SPI_XILINX) += spi-xilinx.o - obj-$(CONFIG_SPI_XLP) += spi-xlp.o diff --git a/target/linux/ar71xx/patches-4.4/440-leds-wndr3700-usb-led-driver.patch b/target/linux/ar71xx/patches-4.4/440-leds-wndr3700-usb-led-driver.patch deleted file mode 100644 index 3ef0d1b0d..000000000 --- a/target/linux/ar71xx/patches-4.4/440-leds-wndr3700-usb-led-driver.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -605,6 +605,13 @@ config LEDS_VERSATILE - This option enabled support for the LEDs on the ARM Versatile - and RealView boards. Say Y to enabled these. - -+config LEDS_WNDR3700_USB -+ tristate "NETGEAR WNDR3700 USB LED driver" -+ depends on LEDS_CLASS && ATH79_MACH_WNDR3700 -+ help -+ This option enables support for the USB LED found on the -+ NETGEAR WNDR3700 board. -+ - comment "LED Triggers" - source "drivers/leds/trigger/Kconfig" - ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -47,6 +47,7 @@ obj-$(CONFIG_LEDS_DA9052) += leds-da905 - obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o - obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o - obj-$(CONFIG_LEDS_PWM) += leds-pwm.o -+obj-${CONFIG_LEDS_WNDR3700_USB} += leds-wndr3700-usb.o - obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o - obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o - obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o diff --git a/target/linux/ar71xx/patches-4.4/441-leds-rb750-led-driver.patch b/target/linux/ar71xx/patches-4.4/441-leds-rb750-led-driver.patch deleted file mode 100644 index fc2d02b8f..000000000 --- a/target/linux/ar71xx/patches-4.4/441-leds-rb750-led-driver.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -612,6 +612,10 @@ config LEDS_WNDR3700_USB - This option enables support for the USB LED found on the - NETGEAR WNDR3700 board. - -+config LEDS_RB750 -+ tristate "LED driver for the Mikrotik RouterBOARD 750" -+ depends on LEDS_CLASS && ATH79_MACH_RB750 -+ - comment "LED Triggers" - source "drivers/leds/trigger/Kconfig" - ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -54,6 +54,7 @@ obj-$(CONFIG_LEDS_LT3593) += leds-lt359 - obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o - obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o - obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o -+obj-$(CONFIG_LEDS_RB750) += leds-rb750.o - obj-$(CONFIG_LEDS_NS2) += leds-ns2.o - obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o - obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o diff --git a/target/linux/ar71xx/patches-4.4/450-gpio-nxp-74hc153-gpio-chip-driver.patch b/target/linux/ar71xx/patches-4.4/450-gpio-nxp-74hc153-gpio-chip-driver.patch deleted file mode 100644 index 8bccd12fa..000000000 --- a/target/linux/ar71xx/patches-4.4/450-gpio-nxp-74hc153-gpio-chip-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -1040,4 +1040,12 @@ config GPIO_VIPERBOARD - - endmenu - -+comment "Other GPIO expanders" -+ -+config GPIO_NXP_74HC153 -+ tristate "NXP 74HC153 Dual 4-input multiplexer" -+ help -+ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This -+ provides a GPIO interface supporting input mode only. -+ - endif ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -69,6 +69,7 @@ obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o - obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o - obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o - obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o -+obj-$(CONFIG_GPIO_NXP_74HC153) += gpio-nxp-74hc153.o - obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o - obj-$(CONFIG_GPIO_OMAP) += gpio-omap.o - obj-$(CONFIG_GPIO_PCA953X) += gpio-pca953x.o diff --git a/target/linux/ar71xx/patches-4.4/451-gpio-74x164-improve-platform-device-support.patch b/target/linux/ar71xx/patches-4.4/451-gpio-74x164-improve-platform-device-support.patch deleted file mode 100644 index 0f7faf280..000000000 --- a/target/linux/ar71xx/patches-4.4/451-gpio-74x164-improve-platform-device-support.patch +++ /dev/null @@ -1,109 +0,0 @@ ---- a/drivers/gpio/gpio-74x164.c -+++ b/drivers/gpio/gpio-74x164.c -@@ -12,6 +12,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -107,8 +108,18 @@ static int gen_74x164_direction_output(s - static int gen_74x164_probe(struct spi_device *spi) - { - struct gen_74x164_chip *chip; -+ struct gen_74x164_chip_platform_data *pdata; -+ struct device_node *np; - int ret; - -+ pdata = spi->dev.platform_data; -+ np = spi->dev.of_node; -+ -+ if (!np && !pdata) { -+ dev_err(&spi->dev, "No configuration data available.\n"); -+ return -EINVAL; -+ } -+ - /* - * bits_per_word cannot be configured in platform data - */ -@@ -130,18 +141,28 @@ static int gen_74x164_probe(struct spi_d - chip->gpio_chip.set = gen_74x164_set_value; - chip->gpio_chip.base = -1; - -- if (of_property_read_u32(spi->dev.of_node, "registers-number", -- &chip->registers)) { -- dev_err(&spi->dev, -- "Missing registers-number property in the DT.\n"); -- return -EINVAL; -+ if (np) { -+ if (of_property_read_u32(spi->dev.of_node, "registers-number", &chip->registers)) { -+ dev_err(&spi->dev, "Missing registers-number property in the DT.\n"); -+ ret = -EINVAL; -+ goto exit_destroy; -+ } -+ } else if (pdata) { -+ chip->gpio_chip.base = pdata->base; -+ chip->registers = pdata->num_registers; - } - -+ if (!chip->registers) -+ chip->registers = 1; -+ - chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers; - chip->buffer = devm_kzalloc(&spi->dev, chip->registers, GFP_KERNEL); - if (!chip->buffer) - return -ENOMEM; - -+ if (pdata && pdata->init_data) -+ memcpy(chip->buffer, pdata->init_data, chip->registers); -+ - chip->gpio_chip.can_sleep = true; - chip->gpio_chip.dev = &spi->dev; - chip->gpio_chip.owner = THIS_MODULE; -@@ -174,16 +195,18 @@ static int gen_74x164_remove(struct spi_ - return 0; - } - -+#ifdef CONFIG_OF - static const struct of_device_id gen_74x164_dt_ids[] = { - { .compatible = "fairchild,74hc595" }, - {}, - }; - MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids); -+#endif - - static struct spi_driver gen_74x164_driver = { - .driver = { - .name = "74x164", -- .of_match_table = gen_74x164_dt_ids, -+ .of_match_table = of_match_ptr(gen_74x164_dt_ids), - }, - .probe = gen_74x164_probe, - .remove = gen_74x164_remove, ---- /dev/null -+++ b/include/linux/spi/74x164.h -@@ -0,0 +1,13 @@ -+#ifndef LINUX_SPI_74X164_H -+#define LINUX_SPI_74X164_H -+ -+struct gen_74x164_chip_platform_data { -+ /* number assigned to the first GPIO */ -+ unsigned base; -+ /* number of chained registers */ -+ unsigned num_registers; -+ /* address of a buffer containing initial data */ -+ u8 *init_data; -+}; -+ -+#endif ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -991,7 +991,6 @@ menu "SPI GPIO expanders" - - config GPIO_74X164 - tristate "74x164 serial-in/parallel-out 8-bits shift register" -- depends on OF - help - Driver for 74x164 compatible serial-in/parallel-out 8-outputs - shift registers. This driver can be used to provide access diff --git a/target/linux/ar71xx/patches-4.4/452-gpio-add-gpio-latch-driver.patch b/target/linux/ar71xx/patches-4.4/452-gpio-add-gpio-latch-driver.patch deleted file mode 100644 index c545252b3..000000000 --- a/target/linux/ar71xx/patches-4.4/452-gpio-add-gpio-latch-driver.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -1047,4 +1047,9 @@ config GPIO_NXP_74HC153 - Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This - provides a GPIO interface supporting input mode only. - -+config GPIO_LATCH -+ tristate "GPIO latch driver" -+ help -+ Say yes here to enable a GPIO latch driver. -+ - endif ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -47,6 +47,7 @@ obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz - obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o - obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o - obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o -+obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o - obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o - obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o - obj-$(CONFIG_GPIO_LPC18XX) += gpio-lpc18xx.o diff --git a/target/linux/ar71xx/patches-4.4/460-m25p80-spi-read-flash-check.patch b/target/linux/ar71xx/patches-4.4/460-m25p80-spi-read-flash-check.patch deleted file mode 100644 index a34b38398..000000000 --- a/target/linux/ar71xx/patches-4.4/460-m25p80-spi-read-flash-check.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -149,8 +149,10 @@ static int m25p80_read(struct spi_nor *n - msg.data_nbits = m25p80_rx_nbits(nor); - - ret = spi_flash_read(spi, &msg); -- *retlen = msg.retlen; -- return ret; -+ if (!ret) { -+ *retlen = msg.retlen; -+ return 0; -+ } - } - - spi_message_init(&m); diff --git a/target/linux/ar71xx/patches-4.4/461-spi-ath79-add-fast-flash-read.patch b/target/linux/ar71xx/patches-4.4/461-spi-ath79-add-fast-flash-read.patch deleted file mode 100644 index 0dc73a8b5..000000000 --- a/target/linux/ar71xx/patches-4.4/461-spi-ath79-add-fast-flash-read.patch +++ /dev/null @@ -1,54 +0,0 @@ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -102,9 +102,6 @@ static void ath79_spi_enable(struct ath7 - /* save CTRL register */ - sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL); - sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC); -- -- /* TODO: setup speed? */ -- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); - } - - static void ath79_spi_disable(struct ath79_spi *sp) -@@ -205,6 +202,33 @@ static u32 ath79_spi_txrx_mode0(struct s - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_spi_read_flash_data(struct spi_device *spi, -+ struct spi_flash_read_message *msg) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(spi); -+ -+ if (msg->addr_width > 3) -+ return -EOPNOTSUPP; -+ -+ if (spi->chip_select || gpio_is_valid(spi->cs_gpio)) -+ return -EOPNOTSUPP; -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(msg->buf, sp->base + msg->from, msg->len); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ msg->retlen = msg->len; -+ -+ return 0; -+} -+ - static int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -234,6 +258,7 @@ static int ath79_spi_probe(struct platfo - master->num_chipselect = pdata->num_chipselect; - master->cs_gpios = pdata->cs_gpios; - } -+ master->spi_flash_read = ath79_spi_read_flash_data; - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ar71xx/patches-4.4/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ar71xx/patches-4.4/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch deleted file mode 100644 index 520c65205..000000000 --- a/target/linux/ar71xx/patches-4.4/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch +++ /dev/null @@ -1,111 +0,0 @@ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ath79/mangle-port.h -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h -+ * Copyright (C) 2003, 2004 Ralf Baechle -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H -+#define __ASM_MACH_ATH79_MANGLE_PORT_H -+ -+#ifdef CONFIG_PCI -+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); -+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); -+#else -+#define ath79_pci_swizzle_b(port) (port) -+#define ath79_pci_swizzle_w(port) (port) -+#endif -+ -+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) -+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) -+#define __swizzle_addr_l(port) (port) -+#define __swizzle_addr_q(port) (port) -+ -+# define ioswabb(a, x) (x) -+# define __mem_ioswabb(a, x) (x) -+# define ioswabw(a, x) (x) -+# define __mem_ioswabw(a, x) cpu_to_le16(x) -+# define ioswabl(a, x) (x) -+# define __mem_ioswabl(a, x) cpu_to_le32(x) -+# define ioswabq(a, x) (x) -+# define __mem_ioswabq(a, x) cpu_to_le64(x) -+ -+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -13,6 +13,7 @@ - */ - - #include -+#include - #include - #include - #include -@@ -25,6 +26,9 @@ static int (*ath79_pci_plat_dev_init)(st - static const struct ath79_pci_irq *ath79_pci_irq_map __initdata; - static unsigned ath79_pci_nr_irqs __initdata; - -+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); -+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); -+ - static const struct ath79_pci_irq ar71xx_pci_irq_map[] __initconst = { - { - .slot = 17, -@@ -212,12 +216,50 @@ ath79_register_pci_ar724x(int id, - return pdev; - } - -+static inline bool ar71xx_is_pci_addr(unsigned long port) -+{ -+ unsigned long phys = CPHYSADDR(port); -+ -+ return (phys >= AR71XX_PCI_MEM_BASE && -+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); -+} -+ -+static unsigned long ar71xx_pci_swizzle_b(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; -+} -+ -+static unsigned long ar71xx_pci_swizzle_w(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; -+} -+ -+unsigned long ath79_pci_swizzle_b(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_b) -+ return __ath79_pci_swizzle_b(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_b); -+ -+unsigned long ath79_pci_swizzle_w(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_w) -+ return __ath79_pci_swizzle_w(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_w); -+ - int __init ath79_register_pci(void) - { - struct platform_device *pdev = NULL; - - if (soc_is_ar71xx()) { - pdev = ath79_register_pci_ar71xx(); -+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; -+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; - } else if (soc_is_ar724x()) { - pdev = ath79_register_pci_ar724x(-1, - AR724X_PCI_CFG_BASE, diff --git a/target/linux/ar71xx/patches-4.4/490-usb-ehci-add-quirks-for-qca-socs.patch b/target/linux/ar71xx/patches-4.4/490-usb-ehci-add-quirks-for-qca-socs.patch deleted file mode 100644 index d74ef1c83..000000000 --- a/target/linux/ar71xx/patches-4.4/490-usb-ehci-add-quirks-for-qca-socs.patch +++ /dev/null @@ -1,103 +0,0 @@ ---- a/drivers/usb/host/ehci-hcd.c -+++ b/drivers/usb/host/ehci-hcd.c -@@ -252,6 +252,37 @@ int ehci_reset(struct ehci_hcd *ehci) - command |= CMD_RESET; - dbg_cmd (ehci, "reset", command); - ehci_writel(ehci, command, &ehci->regs->command); -+ -+ if (ehci->qca_force_host_mode) { -+ u32 usbmode; -+ -+ udelay(1000); -+ -+ usbmode = ehci_readl(ehci, &ehci->regs->usbmode); -+ usbmode |= USBMODE_CM_HC | (1 << 4); -+ ehci_writel(ehci, usbmode, &ehci->regs->usbmode); -+ -+ ehci_dbg(ehci, "forced host mode, usbmode: %08x\n", -+ ehci_readl(ehci, &ehci->regs->usbmode)); -+ } -+ -+ if (ehci->qca_force_16bit_ptw) { -+ u32 port_status; -+ -+ udelay(1000); -+ -+ /* enable 16-bit UTMI interface */ -+ port_status = ehci_readl(ehci, &ehci->regs->port_status[0]); -+ port_status |= BIT(28); -+ ehci_writel(ehci, port_status, &ehci->regs->port_status[0]); -+ -+ ehci_dbg(ehci, "16-bit UTMI interface enabled, status: %08x\n", -+ ehci_readl(ehci, &ehci->regs->port_status[0])); -+ } -+ -+ if (ehci->reset_notifier) -+ ehci->reset_notifier(ehci_to_hcd(ehci)); -+ - ehci->rh_state = EHCI_RH_HALTED; - ehci->next_statechange = jiffies; - retval = ehci_handshake(ehci, &ehci->regs->command, ---- a/drivers/usb/host/ehci.h -+++ b/drivers/usb/host/ehci.h -@@ -228,6 +228,10 @@ struct ehci_hcd { /* one per controlle - unsigned need_oc_pp_cycle:1; /* MPC834X port power */ - unsigned imx28_write_fix:1; /* For Freescale i.MX28 */ - unsigned ignore_oc:1; -+ unsigned qca_force_host_mode:1; -+ unsigned qca_force_16bit_ptw:1; /* force 16 bit UTMI */ -+ -+ void (*reset_notifier)(struct usb_hcd *hcd); - - /* required for usb32 quirk */ - #define OHCI_CTRL_HCFS (3 << 6) ---- a/include/linux/usb/ehci_pdriver.h -+++ b/include/linux/usb/ehci_pdriver.h -@@ -50,6 +50,8 @@ struct usb_ehci_pdata { - unsigned reset_on_resume:1; - unsigned dma_mask_64:1; - unsigned ignore_oc:1; -+ unsigned qca_force_host_mode:1; -+ unsigned qca_force_16bit_ptw:1; - - /* Turn on all power and clocks */ - int (*power_on)(struct platform_device *pdev); -@@ -59,6 +61,7 @@ struct usb_ehci_pdata { - * turn off everything else */ - void (*power_suspend)(struct platform_device *pdev); - int (*pre_setup)(struct usb_hcd *hcd); -+ void (*reset_notifier)(struct platform_device *pdev); - }; - - #endif /* __USB_CORE_EHCI_PDRIVER_H */ ---- a/drivers/usb/host/ehci-platform.c -+++ b/drivers/usb/host/ehci-platform.c -@@ -51,6 +51,14 @@ struct ehci_platform_priv { - - static const char hcd_name[] = "ehci-platform"; - -+static void ehci_platform_reset_notifier(struct usb_hcd *hcd) -+{ -+ struct platform_device *pdev = to_platform_device(hcd->self.controller); -+ struct usb_ehci_pdata *pdata = pdev->dev.platform_data; -+ -+ pdata->reset_notifier(pdev); -+} -+ - static int ehci_platform_reset(struct usb_hcd *hcd) - { - struct platform_device *pdev = to_platform_device(hcd->self.controller); -@@ -256,6 +264,13 @@ static int ehci_platform_probe(struct pl - priv->reset_on_resume = true; - if (pdata->ignore_oc) - ehci->ignore_oc = 1; -+ if (pdata->qca_force_host_mode) -+ ehci->qca_force_host_mode = 1; -+ if (pdata->qca_force_16bit_ptw) -+ ehci->qca_force_16bit_ptw = 1; -+ -+ if (pdata->reset_notifier) -+ ehci->reset_notifier = ehci_platform_reset_notifier; - - #ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO - if (ehci->big_endian_mmio) { diff --git a/target/linux/ar71xx/patches-4.4/500-MIPS-fw-myloader.patch b/target/linux/ar71xx/patches-4.4/500-MIPS-fw-myloader.patch deleted file mode 100644 index 811a234a2..000000000 --- a/target/linux/ar71xx/patches-4.4/500-MIPS-fw-myloader.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -218,6 +218,7 @@ endif - # - libs-$(CONFIG_FW_ARC) += arch/mips/fw/arc/ - libs-$(CONFIG_FW_CFE) += arch/mips/fw/cfe/ -+libs-$(CONFIG_MYLOADER) += arch/mips/fw/myloader/ - libs-$(CONFIG_FW_SNIPROM) += arch/mips/fw/sni/ - libs-y += arch/mips/fw/lib/ - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -1118,6 +1118,9 @@ config MIPS_MSC - config MIPS_NILE4 - bool - -+config MYLOADER -+ bool -+ - config SYNC_R4K - bool - diff --git a/target/linux/ar71xx/patches-4.4/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch b/target/linux/ar71xx/patches-4.4/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch deleted file mode 100644 index 12ab3b50d..000000000 --- a/target/linux/ar71xx/patches-4.4/501-MIPS-ath79-add-mac-argument-to-ath79_register_wmac.patch +++ /dev/null @@ -1,70 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -22,6 +23,7 @@ - #include - #include "dev-wmac.h" - -+static u8 ath79_wmac_mac[ETH_ALEN]; - static struct ath9k_platform_data ath79_wmac_data; - - static struct resource ath79_wmac_resources[] = { -@@ -161,7 +163,7 @@ static void qca955x_wmac_setup(void) - ath79_wmac_data.is_clk_25mhz = true; - } - --void __init ath79_register_wmac(u8 *cal_data) -+void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) - ar913x_wmac_setup(); -@@ -178,5 +180,10 @@ void __init ath79_register_wmac(u8 *cal_ - memcpy(ath79_wmac_data.eeprom_data, cal_data, - sizeof(ath79_wmac_data.eeprom_data)); - -+ if (mac_addr) { -+ memcpy(ath79_wmac_mac, mac_addr, sizeof(ath79_wmac_mac)); -+ ath79_wmac_data.macaddr = ath79_wmac_mac; -+ } -+ - platform_device_register(&ath79_wmac_device); - } ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -12,6 +12,6 @@ - #ifndef _ATH79_DEV_WMAC_H - #define _ATH79_DEV_WMAC_H - --void ath79_register_wmac(u8 *cal_data); -+void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); - - #endif /* _ATH79_DEV_WMAC_H */ ---- a/arch/mips/ath79/mach-db120.c -+++ b/arch/mips/ath79/mach-db120.c -@@ -128,7 +128,7 @@ static void __init db120_setup(void) - ath79_register_spi(&db120_spi_data, db120_spi_info, - ARRAY_SIZE(db120_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); -+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); - db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); - } - ---- a/arch/mips/ath79/mach-ap121.c -+++ b/arch/mips/ath79/mach-ap121.c -@@ -85,7 +85,7 @@ static void __init ap121_setup(void) - ath79_register_spi(&ap121_spi_data, ap121_spi_info, - ARRAY_SIZE(ap121_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(cal_data); -+ ath79_register_wmac(cal_data, NULL); - } - - MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", diff --git a/target/linux/ar71xx/patches-4.4/504-MIPS-ath79-add-ath79_device_reset_get.patch b/target/linux/ar71xx/patches-4.4/504-MIPS-ath79-add-ath79_device_reset_get.patch deleted file mode 100644 index 4f79136ab..000000000 --- a/target/linux/ar71xx/patches-4.4/504-MIPS-ath79-add-ath79_device_reset_get.patch +++ /dev/null @@ -1,41 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -144,5 +144,6 @@ static inline u32 ath79_reset_rr(unsigne - - void ath79_device_reset_set(u32 mask); - void ath79_device_reset_clear(u32 mask); -+u32 ath79_device_reset_get(u32 mask); - - #endif /* __ASM_MACH_ATH79_H */ ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -142,3 +142,29 @@ void ath79_device_reset_clear(u32 mask) - spin_unlock_irqrestore(&ath79_device_reset_lock, flags); - } - EXPORT_SYMBOL_GPL(ath79_device_reset_clear); -+ -+u32 ath79_device_reset_get(u32 mask) -+{ -+ unsigned long flags; -+ u32 reg; -+ u32 ret; -+ -+ if (soc_is_ar71xx()) -+ reg = AR71XX_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar724x()) -+ reg = AR724X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar913x()) -+ reg = AR913X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar933x()) -+ reg = AR933X_RESET_REG_RESET_MODULE; -+ else if (soc_is_ar934x()) -+ reg = AR934X_RESET_REG_RESET_MODULE; -+ else -+ BUG(); -+ -+ spin_lock_irqsave(&ath79_device_reset_lock, flags); -+ ret = ath79_reset_rr(reg); -+ spin_unlock_irqrestore(&ath79_device_reset_lock, flags); -+ return ret; -+} -+EXPORT_SYMBOL_GPL(ath79_device_reset_get); diff --git a/target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch b/target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch deleted file mode 100644 index 3adb088d5..000000000 --- a/target/linux/ar71xx/patches-4.4/505-MIPS-ath79-add-ath79_gpio_function_select.patch +++ /dev/null @@ -1,39 +0,0 @@ ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -28,6 +28,7 @@ void ath79_ddr_wb_flush(unsigned int reg - void ath79_gpio_function_enable(u32 mask); - void ath79_gpio_function_disable(u32 mask); - void ath79_gpio_function_setup(u32 set, u32 clear); -+void ath79_gpio_output_select(unsigned gpio, u8 val); - void ath79_gpio_init(void); - - #endif /* __ATH79_COMMON_H */ ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -57,3 +57,26 @@ void ath79_gpio_function_disable(u32 mas - { - ath79_gpio_function_setup(0, mask); - } -+ -+void __init ath79_gpio_output_select(unsigned gpio, u8 val) -+{ -+ void __iomem *base = ath79_gpio_base; -+ unsigned int reg; -+ u32 t, s; -+ -+ BUG_ON(!soc_is_ar934x()); -+ -+ if (gpio >= AR934X_GPIO_COUNT) -+ return; -+ -+ reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); -+ s = 8 * (gpio % 4); -+ -+ t = __raw_readl(base + reg); -+ t &= ~(0xff << s); -+ t |= val << s; -+ __raw_writel(t, base + reg); -+ -+ /* flush write */ -+ (void) __raw_readl(base + reg); -+} diff --git a/target/linux/ar71xx/patches-4.4/506-MIPS-ath79-prom-parse-redboot-args.patch b/target/linux/ar71xx/patches-4.4/506-MIPS-ath79-prom-parse-redboot-args.patch deleted file mode 100644 index 46beeffee..000000000 --- a/target/linux/ar71xx/patches-4.4/506-MIPS-ath79-prom-parse-redboot-args.patch +++ /dev/null @@ -1,42 +0,0 @@ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -22,10 +22,39 @@ - - #include "common.h" - -+static char ath79_cmdline_buf[COMMAND_LINE_SIZE] __initdata; -+ -+static void __init ath79_prom_append_cmdline(const char *name, -+ const char *value) -+{ -+ snprintf(ath79_cmdline_buf, sizeof(ath79_cmdline_buf), -+ " %s=%s", name, value); -+ strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); -+} -+ - void __init prom_init(void) - { -+ const char *env; -+ - fw_init_cmdline(); - -+ env = fw_getenv("ethaddr"); -+ if (env) -+ ath79_prom_append_cmdline("ethaddr", env); -+ -+ env = fw_getenv("board"); -+ if (env) { -+ /* Workaround for buggy bootloaders */ -+ if (strcmp(env, "RouterStation") == 0 || -+ strcmp(env, "Ubiquiti AR71xx-based board") == 0) -+ env = "UBNT-RS"; -+ -+ if (strcmp(env, "RouterStation PRO") == 0) -+ env = "UBNT-RSPRO"; -+ -+ ath79_prom_append_cmdline("board", env); -+ } -+ - #ifdef CONFIG_BLK_DEV_INITRD - /* Read the initrd address from the firmware environment */ - initrd_start = fw_getenvl("initrd_start"); diff --git a/target/linux/ar71xx/patches-4.4/507-MIPS-ath79-prom-add-myloader-support.patch b/target/linux/ar71xx/patches-4.4/507-MIPS-ath79-prom-add-myloader-support.patch deleted file mode 100644 index 17a97335d..000000000 --- a/target/linux/ar71xx/patches-4.4/507-MIPS-ath79-prom-add-myloader-support.patch +++ /dev/null @@ -1,55 +0,0 @@ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -19,6 +19,7 @@ - #include - #include - #include -+#include - - #include "common.h" - -@@ -32,10 +33,44 @@ static void __init ath79_prom_append_cmd - strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); - } - -+static int __init ath79_prom_init_myloader(void) -+{ -+ struct myloader_info *mylo; -+ char mac_buf[32]; -+ unsigned char *mac; -+ -+ mylo = myloader_get_info(); -+ if (!mylo) -+ return 0; -+ -+ switch (mylo->did) { -+ case DEVID_COMPEX_WP543: -+ ath79_prom_append_cmdline("board", "WP543"); -+ break; -+ case DEVID_COMPEX_WPE72: -+ ath79_prom_append_cmdline("board", "WPE72"); -+ break; -+ default: -+ pr_warn("prom: unknown device id: %x\n", mylo->did); -+ return 0; -+ } -+ -+ mac = mylo->macs[0]; -+ snprintf(mac_buf, sizeof(mac_buf), "%02x:%02x:%02x:%02x:%02x:%02x", -+ mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); -+ -+ ath79_prom_append_cmdline("ethaddr", mac_buf); -+ -+ return 1; -+} -+ - void __init prom_init(void) - { - const char *env; - -+ if (ath79_prom_init_myloader()) -+ return; -+ - fw_init_cmdline(); - - env = fw_getenv("ethaddr"); diff --git a/target/linux/ar71xx/patches-4.4/508-MIPS-ath79-prom-image-command-line-hack.patch b/target/linux/ar71xx/patches-4.4/508-MIPS-ath79-prom-image-command-line-hack.patch deleted file mode 100644 index cfa5e72ee..000000000 --- a/target/linux/ar71xx/patches-4.4/508-MIPS-ath79-prom-image-command-line-hack.patch +++ /dev/null @@ -1,73 +0,0 @@ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -33,6 +33,41 @@ static void __init ath79_prom_append_cmd - strlcat(arcs_cmdline, ath79_cmdline_buf, sizeof(arcs_cmdline)); - } - -+#ifdef CONFIG_IMAGE_CMDLINE_HACK -+extern char __image_cmdline[]; -+ -+static int __init ath79_use_image_cmdline(void) -+{ -+ char *p = __image_cmdline; -+ int replace = 0; -+ -+ if (*p == '-') { -+ replace = 1; -+ p++; -+ } -+ -+ if (*p == '\0') -+ return 0; -+ -+ if (replace) { -+ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } else { -+ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); -+ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); -+ } -+ -+ /* Validate and setup environment pointer */ -+ if (fw_arg2 < CKSEG0) -+ _fw_envp = NULL; -+ else -+ _fw_envp = (int *)fw_arg2; -+ -+ return 1; -+} -+#else -+static inline int ath79_use_image_cmdline(void) { return 0; } -+#endif -+ - static int __init ath79_prom_init_myloader(void) - { - struct myloader_info *mylo; -@@ -61,6 +96,8 @@ static int __init ath79_prom_init_myload - - ath79_prom_append_cmdline("ethaddr", mac_buf); - -+ ath79_use_image_cmdline(); -+ - return 1; - } - -@@ -71,7 +108,8 @@ void __init prom_init(void) - if (ath79_prom_init_myloader()) - return; - -- fw_init_cmdline(); -+ if (!ath79_use_image_cmdline()) -+ fw_init_cmdline(); - - env = fw_getenv("ethaddr"); - if (env) ---- a/arch/mips/fw/lib/cmdline.c -+++ b/arch/mips/fw/lib/cmdline.c -@@ -35,6 +35,7 @@ void __init fw_init_cmdline(void) - else - _fw_envp = (int *)fw_arg2; - -+ arcs_cmdline[0] = '\0'; - for (i = 1; i < fw_argc; i++) { - strlcat(arcs_cmdline, fw_argv(i), COMMAND_LINE_SIZE); - if (i < (fw_argc - 1)) diff --git a/target/linux/ar71xx/patches-4.4/509-MIPS-ath79-process-board-kernel-option.patch b/target/linux/ar71xx/patches-4.4/509-MIPS-ath79-process-board-kernel-option.patch deleted file mode 100644 index 40bd8522a..000000000 --- a/target/linux/ar71xx/patches-4.4/509-MIPS-ath79-process-board-kernel-option.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -253,6 +253,8 @@ void __init plat_time_init(void) - mips_hpt_frequency = cpu_clk_rate / 2; - } - -+__setup("board=", mips_machtype_setup); -+ - static int __init ath79_setup(void) - { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); diff --git a/target/linux/ar71xx/patches-4.4/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch b/target/linux/ar71xx/patches-4.4/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch deleted file mode 100644 index 2d2235e29..000000000 --- a/target/linux/ar71xx/patches-4.4/510-MIPS-ath79-init-gpio-pin-of-wmac-device.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -24,7 +24,10 @@ - #include "dev-wmac.h" - - static u8 ath79_wmac_mac[ETH_ALEN]; --static struct ath9k_platform_data ath79_wmac_data; -+ -+static struct ath9k_platform_data ath79_wmac_data = { -+ .led_pin = -1, -+}; - - static struct resource ath79_wmac_resources[] = { - { diff --git a/target/linux/ar71xx/patches-4.4/520-MIPS-ath79-enable-UART-function.patch b/target/linux/ar71xx/patches-4.4/520-MIPS-ath79-enable-UART-function.patch deleted file mode 100644 index c8649b749..000000000 --- a/target/linux/ar71xx/patches-4.4/520-MIPS-ath79-enable-UART-function.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/arch/mips/ath79/dev-common.c -+++ b/arch/mips/ath79/dev-common.c -@@ -81,6 +81,15 @@ void __init ath79_register_uart(void) - - uart_clk_rate = ath79_get_sys_clk_rate("uart"); - -+ if (soc_is_ar71xx()) -+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar724x()) -+ ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar913x()) -+ ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN); -+ else if (soc_is_ar933x()) -+ ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN); -+ - if (soc_is_ar71xx() || - soc_is_ar724x() || - soc_is_ar913x() || diff --git a/target/linux/ar71xx/patches-4.4/521-MIPS-ath79-enable-UART-for-early_serial.patch b/target/linux/ar71xx/patches-4.4/521-MIPS-ath79-enable-UART-for-early_serial.patch deleted file mode 100644 index e546ff26f..000000000 --- a/target/linux/ar71xx/patches-4.4/521-MIPS-ath79-enable-UART-for-early_serial.patch +++ /dev/null @@ -1,61 +0,0 @@ ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -58,6 +58,46 @@ static void prom_putchar_dummy(unsigned - /* nothing to do */ - } - -+static void prom_enable_uart(u32 id) -+{ -+ void __iomem *gpio_base; -+ u32 uart_en; -+ u32 t; -+ -+ switch (id) { -+ case REV_ID_MAJOR_AR71XX: -+ uart_en = AR71XX_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR7240: -+ case REV_ID_MAJOR_AR7241: -+ case REV_ID_MAJOR_AR7242: -+ uart_en = AR724X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR913X: -+ uart_en = AR913X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR9330: -+ case REV_ID_MAJOR_AR9331: -+ uart_en = AR933X_GPIO_FUNC_UART_EN; -+ break; -+ -+ case REV_ID_MAJOR_AR9341: -+ case REV_ID_MAJOR_AR9342: -+ case REV_ID_MAJOR_AR9344: -+ /* TODO */ -+ default: -+ return; -+ } -+ -+ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE)); -+ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC); -+ t |= uart_en; -+ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC); -+} -+ - static void prom_putchar_init(void) - { - void __iomem *base; -@@ -88,8 +128,10 @@ static void prom_putchar_init(void) - - default: - _prom_putchar = prom_putchar_dummy; -- break; -+ return; - } -+ -+ prom_enable_uart(id); - } - - void prom_putchar(unsigned char ch) diff --git a/target/linux/ar71xx/patches-4.4/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch b/target/linux/ar71xx/patches-4.4/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch deleted file mode 100644 index 2d5559cb9..000000000 --- a/target/linux/ar71xx/patches-4.4/522-MIPS-ath79-add-ath79_wmac_register_simple-helper.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -190,3 +190,9 @@ void __init ath79_register_wmac(u8 *cal_ - - platform_device_register(&ath79_wmac_device); - } -+ -+void __init ath79_register_wmac_simple(void) -+{ -+ ath79_register_wmac(NULL, NULL); -+ ath79_wmac_data.eeprom_name = "soc_wmac.eeprom"; -+} ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -13,5 +13,6 @@ - #define _ATH79_DEV_WMAC_H - - void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); -+void ath79_register_wmac_simple(void); - - #endif /* _ATH79_DEV_WMAC_H */ diff --git a/target/linux/ar71xx/patches-4.4/523-MIPS-ath79-OTP-support.patch b/target/linux/ar71xx/patches-4.4/523-MIPS-ath79-OTP-support.patch deleted file mode 100644 index d11d418f1..000000000 --- a/target/linux/ar71xx/patches-4.4/523-MIPS-ath79-OTP-support.patch +++ /dev/null @@ -1,192 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -166,6 +166,149 @@ static void qca955x_wmac_setup(void) - ath79_wmac_data.is_clk_25mhz = true; - } - -+#define AR93XX_WMAC_SIZE \ -+ (soc_is_ar934x() ? AR934X_WMAC_SIZE : AR933X_WMAC_SIZE) -+#define AR93XX_WMAC_BASE \ -+ (soc_is_ar934x() ? AR934X_WMAC_BASE : AR933X_WMAC_BASE) -+ -+#define AR93XX_OTP_BASE \ -+ (soc_is_ar934x() ? AR934X_OTP_BASE : AR9300_OTP_BASE) -+#define AR93XX_OTP_STATUS \ -+ (soc_is_ar934x() ? AR934X_OTP_STATUS : AR9300_OTP_STATUS) -+#define AR93XX_OTP_READ_DATA \ -+ (soc_is_ar934x() ? AR934X_OTP_READ_DATA : AR9300_OTP_READ_DATA) -+ -+static bool __init -+ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) -+{ -+ int timeout = 1000; -+ u32 val; -+ -+ __raw_readl(base + AR93XX_OTP_BASE + (4 * addr)); -+ while (timeout--) { -+ val = __raw_readl(base + AR93XX_OTP_STATUS); -+ if ((val & AR9300_OTP_STATUS_TYPE) == AR9300_OTP_STATUS_VALID) -+ break; -+ -+ udelay(10); -+ } -+ -+ if (!timeout) -+ return false; -+ -+ *data = __raw_readl(base + AR93XX_OTP_READ_DATA); -+ return true; -+} -+ -+static bool __init -+ar93xx_wmac_otp_read(void __iomem *base, int addr, u8 *dest, int len) -+{ -+ u32 data; -+ int i; -+ -+ for (i = 0; i < len; i++) { -+ int offset = 8 * ((addr - i) % 4); -+ -+ if (!ar93xx_wmac_otp_read_word(base, (addr - i) / 4, &data)) -+ return false; -+ -+ dest[i] = (data >> offset) & 0xff; -+ } -+ -+ return true; -+} -+ -+static bool __init -+ar93xx_wmac_otp_uncompress(void __iomem *base, int addr, int len, u8 *dest, -+ int dest_start, int dest_len) -+{ -+ int dest_bytes = 0; -+ int offset = 0; -+ int end = addr - len; -+ u8 hdr[2]; -+ -+ while (addr > end) { -+ if (!ar93xx_wmac_otp_read(base, addr, hdr, 2)) -+ return false; -+ -+ addr -= 2; -+ offset += hdr[0]; -+ -+ if (offset <= dest_start + dest_len && -+ offset + len >= dest_start) { -+ int data_offset = 0; -+ int dest_offset = 0; -+ int copy_len; -+ -+ if (offset < dest_start) -+ data_offset = dest_start - offset; -+ else -+ dest_offset = offset - dest_start; -+ -+ copy_len = len - data_offset; -+ if (copy_len > dest_len - dest_offset) -+ copy_len = dest_len - dest_offset; -+ -+ ar93xx_wmac_otp_read(base, addr - data_offset, -+ dest + dest_offset, -+ copy_len); -+ -+ dest_bytes += copy_len; -+ } -+ addr -= hdr[1]; -+ } -+ return !!dest_bytes; -+} -+ -+bool __init ar93xx_wmac_read_mac_address(u8 *dest) -+{ -+ void __iomem *base; -+ bool ret = false; -+ int addr = 0x1ff; -+ unsigned int len; -+ u32 hdr_u32; -+ u8 *hdr = (u8 *) &hdr_u32; -+ u8 mac[6] = { 0x00, 0x02, 0x03, 0x04, 0x05, 0x06 }; -+ int mac_start = 2, mac_end = 8; -+ -+ BUG_ON(!soc_is_ar933x() && !soc_is_ar934x()); -+ base = ioremap_nocache(AR93XX_WMAC_BASE, AR93XX_WMAC_SIZE); -+ while (addr > sizeof(hdr_u32)) { -+ if (!ar93xx_wmac_otp_read(base, addr, hdr, sizeof(hdr_u32))) -+ break; -+ -+ if (hdr_u32 == 0 || hdr_u32 == ~0) -+ break; -+ -+ len = (hdr[1] << 4) | (hdr[2] >> 4); -+ addr -= 4; -+ -+ switch (hdr[0] >> 5) { -+ case 0: -+ if (len < mac_end) -+ break; -+ -+ ar93xx_wmac_otp_read(base, addr - mac_start, mac, 6); -+ ret = true; -+ break; -+ case 3: -+ ret |= ar93xx_wmac_otp_uncompress(base, addr, len, mac, -+ mac_start, 6); -+ break; -+ default: -+ break; -+ } -+ -+ addr -= len + 2; -+ } -+ -+ iounmap(base); -+ if (ret) -+ memcpy(dest, mac, 6); -+ -+ return ret; -+} -+ - void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -14,5 +14,6 @@ - - void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); - void ath79_register_wmac_simple(void); -+bool ar93xx_wmac_read_mac_address(u8 *dest); - - #endif /* _ATH79_DEV_WMAC_H */ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -112,6 +112,14 @@ - #define QCA955X_EHCI1_BASE 0x1b400000 - #define QCA955X_EHCI_SIZE 0x1000 - -+#define AR9300_OTP_BASE 0x14000 -+#define AR9300_OTP_STATUS 0x15f18 -+#define AR9300_OTP_STATUS_TYPE 0x7 -+#define AR9300_OTP_STATUS_VALID 0x4 -+#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2 -+#define AR9300_OTP_STATUS_SM_BUSY 0x1 -+#define AR9300_OTP_READ_DATA 0x15f1c -+ - /* - * DDR_CTRL block - */ -@@ -149,6 +157,13 @@ - #define AR934X_DDR_REG_FLUSH_PCIE 0xa8 - #define AR934X_DDR_REG_FLUSH_WMAC 0xac - -+#define AR934X_OTP_BASE 0x30000 -+#define AR934X_OTP_STATUS 0x31018 -+#define AR934X_OTP_READ_DATA 0x3101c -+#define AR934X_OTP_INTF2_ADDRESS 0x31008 -+#define AR934X_OTP_INTF3_ADDRESS 0x3100c -+#define AR934X_OTP_PGENB_SETUP_HOLD_TIME_ADDRESS 0x31034 -+ - /* - * PLL block - */ diff --git a/target/linux/ar71xx/patches-4.4/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch b/target/linux/ar71xx/patches-4.4/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch deleted file mode 100644 index 91e037e24..000000000 --- a/target/linux/ar71xx/patches-4.4/524-MIPS-ath79-add-ath79_wmac_disable_25ghz-helpers.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -309,6 +309,16 @@ bool __init ar93xx_wmac_read_mac_address - return ret; - } - -+void __init ath79_wmac_disable_2ghz(void) -+{ -+ ath79_wmac_data.disable_2ghz = true; -+} -+ -+void __init ath79_wmac_disable_5ghz(void) -+{ -+ ath79_wmac_data.disable_5ghz = true; -+} -+ - void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -14,6 +14,9 @@ - - void ath79_register_wmac(u8 *cal_data, u8 *mac_addr); - void ath79_register_wmac_simple(void); -+void ath79_wmac_disable_2ghz(void); -+void ath79_wmac_disable_5ghz(void); -+ - bool ar93xx_wmac_read_mac_address(u8 *dest); - - #endif /* _ATH79_DEV_WMAC_H */ diff --git a/target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch b/target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch deleted file mode 100644 index 0e33674ad..000000000 --- a/target/linux/ar71xx/patches-4.4/525-MIPS-ath79-enable-qca-usb-quirks.patch +++ /dev/null @@ -1,101 +0,0 @@ ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -37,6 +37,8 @@ static struct usb_ehci_pdata ath79_ehci_ - static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { - .caps_offset = 0x100, - .has_tt = 1, -+ .qca_force_host_mode = 1, -+ .qca_force_16bit_ptw = 1, - }; - - static void __init ath79_usb_register(const char *name, int id, -@@ -159,6 +161,9 @@ static void __init ar913x_usb_setup(void - ath79_device_reset_clear(AR913X_RESET_USB_PHY); - mdelay(10); - -+ ath79_ehci_pdata_v2.qca_force_host_mode = 0; -+ ath79_ehci_pdata_v2.qca_force_16bit_ptw = 0; -+ - ath79_usb_register("ehci-platform", -1, - AR913X_EHCI_BASE, AR913X_EHCI_SIZE, - ATH79_CPU_IRQ(3), -@@ -182,14 +187,34 @@ static void __init ar933x_usb_setup(void - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - --static void __init ar934x_usb_setup(void) -+static void enable_tx_tx_idp_violation_fix(unsigned base) - { -- u32 bootstrap; -+ void __iomem *phy_reg; -+ u32 t; -+ -+ phy_reg = ioremap(base, 4); -+ if (!phy_reg) -+ return; -+ -+ t = ioread32(phy_reg); -+ t &= ~0xff; -+ t |= 0x58; -+ iowrite32(t, phy_reg); -+ -+ iounmap(phy_reg); -+} - -- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); -- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) -+static void ar934x_usb_reset_notifier(struct platform_device *pdev) -+{ -+ if (pdev->id != -1) - return; - -+ enable_tx_tx_idp_violation_fix(0x18116c94); -+ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); -+} -+ -+static void __init ar934x_usb_setup(void) -+{ - ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); - udelay(1000); - -@@ -202,14 +227,40 @@ static void __init ar934x_usb_setup(void - ath79_device_reset_clear(AR934X_RESET_USB_HOST); - udelay(1000); - -+ if (ath79_soc_rev >= 3) -+ ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; -+ - ath79_usb_register("ehci-platform", -1, - AR934X_EHCI_BASE, AR934X_EHCI_SIZE, - ATH79_CPU_IRQ(3), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - -+static void qca955x_usb_reset_notifier(struct platform_device *pdev) -+{ -+ u32 base; -+ -+ switch (pdev->id) { -+ case 0: -+ base = 0x18116c94; -+ break; -+ -+ case 1: -+ base = 0x18116e54; -+ break; -+ -+ default: -+ return; -+ } -+ -+ enable_tx_tx_idp_violation_fix(base); -+ dev_info(&pdev->dev, "TX-TX IDP fix enabled\n"); -+} -+ - static void __init qca955x_usb_setup(void) - { -+ ath79_ehci_pdata_v2.reset_notifier = qca955x_usb_reset_notifier; -+ - ath79_usb_register("ehci-platform", 0, - QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, - ATH79_IP3_IRQ(0), diff --git a/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch deleted file mode 100644 index d0f5b7890..000000000 --- a/target/linux/ar71xx/patches-4.4/601-MIPS-ath79-add-more-register-defines.patch +++ /dev/null @@ -1,455 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -20,6 +20,10 @@ - #include - - #define AR71XX_APB_BASE 0x18000000 -+#define AR71XX_GE0_BASE 0x19000000 -+#define AR71XX_GE0_SIZE 0x10000 -+#define AR71XX_GE1_BASE 0x1a000000 -+#define AR71XX_GE1_SIZE 0x10000 - #define AR71XX_EHCI_BASE 0x1b000000 - #define AR71XX_EHCI_SIZE 0x1000 - #define AR71XX_OHCI_BASE 0x1c000000 -@@ -39,6 +43,8 @@ - #define AR71XX_PLL_SIZE 0x100 - #define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000) - #define AR71XX_RESET_SIZE 0x100 -+#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR71XX_MII_SIZE 0x100 - - #define AR71XX_PCI_MEM_BASE 0x10000000 - #define AR71XX_PCI_MEM_SIZE 0x07000000 -@@ -81,15 +87,21 @@ - - #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) - #define AR933X_UART_SIZE 0x14 -+#define AR933X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR933X_GMAC_SIZE 0x04 - #define AR933X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define AR933X_WMAC_SIZE 0x20000 - #define AR933X_EHCI_BASE 0x1b000000 - #define AR933X_EHCI_SIZE 0x1000 - -+#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define AR934X_GMAC_SIZE 0x14 - #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define AR934X_WMAC_SIZE 0x20000 - #define AR934X_EHCI_BASE 0x1b000000 - #define AR934X_EHCI_SIZE 0x200 -+#define AR934X_NFC_BASE 0x1b000200 -+#define AR934X_NFC_SIZE 0xb8 - #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) - #define AR934X_SRIF_SIZE 0x1000 - -@@ -106,11 +118,15 @@ - #define QCA955X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) - #define QCA955X_PCI_CTRL_SIZE 0x100 - -+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA955X_GMAC_SIZE 0x40 - #define QCA955X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) - #define QCA955X_WMAC_SIZE 0x20000 - #define QCA955X_EHCI0_BASE 0x1b000000 - #define QCA955X_EHCI1_BASE 0x1b400000 - #define QCA955X_EHCI_SIZE 0x1000 -+#define QCA955X_NFC_BASE 0x1b800200 -+#define QCA955X_NFC_SIZE 0xb8 - - #define AR9300_OTP_BASE 0x14000 - #define AR9300_OTP_STATUS 0x15f18 -@@ -181,6 +197,9 @@ - #define AR71XX_AHB_DIV_SHIFT 20 - #define AR71XX_AHB_DIV_MASK 0x7 - -+#define AR71XX_ETH0_PLL_SHIFT 17 -+#define AR71XX_ETH1_PLL_SHIFT 19 -+ - #define AR724X_PLL_REG_CPU_CONFIG 0x00 - #define AR724X_PLL_REG_PCIE_CONFIG 0x10 - -@@ -196,6 +215,8 @@ - #define AR724X_DDR_DIV_SHIFT 22 - #define AR724X_DDR_DIV_MASK 0x3 - -+#define AR7242_PLL_REG_ETH0_INT_CLOCK 0x2c -+ - #define AR913X_PLL_REG_CPU_CONFIG 0x00 - #define AR913X_PLL_REG_ETH_CONFIG 0x04 - #define AR913X_PLL_REG_ETH0_INT_CLOCK 0x14 -@@ -208,6 +229,9 @@ - #define AR913X_AHB_DIV_SHIFT 19 - #define AR913X_AHB_DIV_MASK 0x1 - -+#define AR913X_ETH0_PLL_SHIFT 20 -+#define AR913X_ETH1_PLL_SHIFT 22 -+ - #define AR933X_PLL_CPU_CONFIG_REG 0x00 - #define AR933X_PLL_CLOCK_CTRL_REG 0x08 - -@@ -229,6 +253,8 @@ - #define AR934X_PLL_CPU_CONFIG_REG 0x00 - #define AR934X_PLL_DDR_CONFIG_REG 0x04 - #define AR934X_PLL_CPU_DDR_CLK_CTRL_REG 0x08 -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 -+#define AR934X_PLL_ETH_XMII_CONTROL_REG 0x2c - - #define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 - #define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -@@ -261,9 +287,13 @@ - #define AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) - #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) -+ - #define QCA955X_PLL_CPU_CONFIG_REG 0x00 - #define QCA955X_PLL_DDR_CONFIG_REG 0x04 - #define QCA955X_PLL_CLK_CTRL_REG 0x08 -+#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 -+#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 - - #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 - #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -@@ -388,16 +418,83 @@ - #define AR913X_RESET_USB_HOST BIT(5) - #define AR913X_RESET_USB_PHY BIT(4) - -+#define AR933X_RESET_GE1_MDIO BIT(23) -+#define AR933X_RESET_GE0_MDIO BIT(22) -+#define AR933X_RESET_GE1_MAC BIT(13) - #define AR933X_RESET_WMAC BIT(11) -+#define AR933X_RESET_GE0_MAC BIT(9) - #define AR933X_RESET_USB_HOST BIT(5) - #define AR933X_RESET_USB_PHY BIT(4) - #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) - -+#define AR934X_RESET_HOST BIT(31) -+#define AR934X_RESET_SLIC BIT(30) -+#define AR934X_RESET_HDMA BIT(29) -+#define AR934X_RESET_EXTERNAL BIT(28) -+#define AR934X_RESET_RTC BIT(27) -+#define AR934X_RESET_PCIE_EP_INT BIT(26) -+#define AR934X_RESET_CHKSUM_ACC BIT(25) -+#define AR934X_RESET_FULL_CHIP BIT(24) -+#define AR934X_RESET_GE1_MDIO BIT(23) -+#define AR934X_RESET_GE0_MDIO BIT(22) -+#define AR934X_RESET_CPU_NMI BIT(21) -+#define AR934X_RESET_CPU_COLD BIT(20) -+#define AR934X_RESET_HOST_RESET_INT BIT(19) -+#define AR934X_RESET_PCIE_EP BIT(18) -+#define AR934X_RESET_UART1 BIT(17) -+#define AR934X_RESET_DDR BIT(16) -+#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -+#define AR934X_RESET_NANDF BIT(14) -+#define AR934X_RESET_GE1_MAC BIT(13) -+#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12) - #define AR934X_RESET_USB_PHY_ANALOG BIT(11) -+#define AR934X_RESET_HOST_DMA_INT BIT(10) -+#define AR934X_RESET_GE0_MAC BIT(9) -+#define AR934X_RESET_ETH_SWITCH BIT(8) -+#define AR934X_RESET_PCIE_PHY BIT(7) -+#define AR934X_RESET_PCIE BIT(6) - #define AR934X_RESET_USB_HOST BIT(5) - #define AR934X_RESET_USB_PHY BIT(4) - #define AR934X_RESET_USBSUS_OVERRIDE BIT(3) -+#define AR934X_RESET_LUT BIT(2) -+#define AR934X_RESET_MBOX BIT(1) -+#define AR934X_RESET_I2S BIT(0) -+ -+#define QCA955X_RESET_HOST BIT(31) -+#define QCA955X_RESET_SLIC BIT(30) -+#define QCA955X_RESET_HDMA BIT(29) -+#define QCA955X_RESET_EXTERNAL BIT(28) -+#define QCA955X_RESET_RTC BIT(27) -+#define QCA955X_RESET_PCIE_EP_INT BIT(26) -+#define QCA955X_RESET_CHKSUM_ACC BIT(25) -+#define QCA955X_RESET_FULL_CHIP BIT(24) -+#define QCA955X_RESET_GE1_MDIO BIT(23) -+#define QCA955X_RESET_GE0_MDIO BIT(22) -+#define QCA955X_RESET_CPU_NMI BIT(21) -+#define QCA955X_RESET_CPU_COLD BIT(20) -+#define QCA955X_RESET_HOST_RESET_INT BIT(19) -+#define QCA955X_RESET_PCIE_EP BIT(18) -+#define QCA955X_RESET_UART1 BIT(17) -+#define QCA955X_RESET_DDR BIT(16) -+#define QCA955X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -+#define QCA955X_RESET_NANDF BIT(14) -+#define QCA955X_RESET_GE1_MAC BIT(13) -+#define QCA955X_RESET_SGMII_ANALOG BIT(12) -+#define QCA955X_RESET_USB_PHY_ANALOG BIT(11) -+#define QCA955X_RESET_HOST_DMA_INT BIT(10) -+#define QCA955X_RESET_GE0_MAC BIT(9) -+#define QCA955X_RESET_SGMII BIT(8) -+#define QCA955X_RESET_PCIE_PHY BIT(7) -+#define QCA955X_RESET_PCIE BIT(6) -+#define QCA955X_RESET_USB_HOST BIT(5) -+#define QCA955X_RESET_USB_PHY BIT(4) -+#define QCA955X_RESET_USBSUS_OVERRIDE BIT(3) -+#define QCA955X_RESET_LUT BIT(2) -+#define QCA955X_RESET_MBOX BIT(1) -+#define QCA955X_RESET_I2S BIT(0) - -+#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) -+#define AR933X_BOOTSTRAP_EEPBUSY BIT(4) - #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) - - #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -@@ -539,8 +636,22 @@ - #define AR71XX_GPIO_REG_INT_ENABLE 0x24 - #define AR71XX_GPIO_REG_FUNC 0x28 - -+#define AR934X_GPIO_REG_OUT_FUNC0 0x2c -+#define AR934X_GPIO_REG_OUT_FUNC1 0x30 -+#define AR934X_GPIO_REG_OUT_FUNC2 0x34 -+#define AR934X_GPIO_REG_OUT_FUNC3 0x38 -+#define AR934X_GPIO_REG_OUT_FUNC4 0x3c -+#define AR934X_GPIO_REG_OUT_FUNC5 0x40 - #define AR934X_GPIO_REG_FUNC 0x6c - -+#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c -+#define QCA955X_GPIO_REG_OUT_FUNC1 0x30 -+#define QCA955X_GPIO_REG_OUT_FUNC2 0x34 -+#define QCA955X_GPIO_REG_OUT_FUNC3 0x38 -+#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c -+#define QCA955X_GPIO_REG_OUT_FUNC5 0x40 -+#define QCA955X_GPIO_REG_FUNC 0x6c -+ - #define AR71XX_GPIO_COUNT 16 - #define AR7240_GPIO_COUNT 18 - #define AR7241_GPIO_COUNT 20 -@@ -570,4 +681,235 @@ - #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 - #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 - -+#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) -+#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) -+#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) -+#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12) -+#define AR71XX_GPIO_FUNC_UART_EN BIT(8) -+#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4) -+#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0) -+ -+#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19) -+#define AR724X_GPIO_FUNC_SPI_EN BIT(18) -+#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -+#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -+#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12) -+#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11) -+#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10) -+#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9) -+#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -+#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -+#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -+#define AR724X_GPIO_FUNC_UART_EN BIT(1) -+#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) -+ -+#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22) -+#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) -+#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20) -+#define AR913X_GPIO_FUNC_I2S_MCKEN BIT(19) -+#define AR913X_GPIO_FUNC_I2S1_EN BIT(18) -+#define AR913X_GPIO_FUNC_I2S0_EN BIT(17) -+#define AR913X_GPIO_FUNC_SLIC_EN BIT(16) -+#define AR913X_GPIO_FUNC_UART_RTSCTS_EN BIT(9) -+#define AR913X_GPIO_FUNC_UART_EN BIT(8) -+#define AR913X_GPIO_FUNC_USB_CLK_EN BIT(4) -+ -+#define AR933X_GPIO_FUNC_SPDIF2TCK BIT(31) -+#define AR933X_GPIO_FUNC_SPDIF_EN BIT(30) -+#define AR933X_GPIO_FUNC_I2SO_22_18_EN BIT(29) -+#define AR933X_GPIO_FUNC_I2S_MCK_EN BIT(27) -+#define AR933X_GPIO_FUNC_I2SO_EN BIT(26) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_DUPL BIT(25) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_COLL BIT(24) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED_ACT BIT(23) -+#define AR933X_GPIO_FUNC_SPI_EN BIT(18) -+#define AR933X_GPIO_FUNC_SPI_CS_EN2 BIT(14) -+#define AR933X_GPIO_FUNC_SPI_CS_EN1 BIT(13) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4) -+#define AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3) -+#define AR933X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2) -+#define AR933X_GPIO_FUNC_UART_EN BIT(1) -+#define AR933X_GPIO_FUNC_JTAG_DISABLE BIT(0) -+ -+#define AR934X_GPIO_FUNC_CLK_OBS7_EN BIT(9) -+#define AR934X_GPIO_FUNC_CLK_OBS6_EN BIT(8) -+#define AR934X_GPIO_FUNC_CLK_OBS5_EN BIT(7) -+#define AR934X_GPIO_FUNC_CLK_OBS4_EN BIT(6) -+#define AR934X_GPIO_FUNC_CLK_OBS3_EN BIT(5) -+#define AR934X_GPIO_FUNC_CLK_OBS2_EN BIT(4) -+#define AR934X_GPIO_FUNC_CLK_OBS1_EN BIT(3) -+#define AR934X_GPIO_FUNC_CLK_OBS0_EN BIT(2) -+#define AR934X_GPIO_FUNC_JTAG_DISABLE BIT(1) -+ -+#define AR934X_GPIO_OUT_GPIO 0 -+#define AR934X_GPIO_OUT_SPI_CS1 7 -+#define AR934X_GPIO_OUT_LED_LINK0 41 -+#define AR934X_GPIO_OUT_LED_LINK1 42 -+#define AR934X_GPIO_OUT_LED_LINK2 43 -+#define AR934X_GPIO_OUT_LED_LINK3 44 -+#define AR934X_GPIO_OUT_LED_LINK4 45 -+#define AR934X_GPIO_OUT_EXT_LNA0 46 -+#define AR934X_GPIO_OUT_EXT_LNA1 47 -+ -+#define QCA955X_GPIO_FUNC_CLK_OBS7_EN BIT(9) -+#define QCA955X_GPIO_FUNC_CLK_OBS6_EN BIT(8) -+#define QCA955X_GPIO_FUNC_CLK_OBS5_EN BIT(7) -+#define QCA955X_GPIO_FUNC_CLK_OBS4_EN BIT(6) -+#define QCA955X_GPIO_FUNC_CLK_OBS3_EN BIT(5) -+#define QCA955X_GPIO_FUNC_CLK_OBS2_EN BIT(4) -+#define QCA955X_GPIO_FUNC_CLK_OBS1_EN BIT(3) -+#define QCA955X_GPIO_FUNC_JTAG_DISABLE BIT(1) -+ -+#define QCA955X_GPIO_OUT_GPIO 0 -+#define QCA955X_MII_EXT_MDI 1 -+#define QCA955X_SLIC_DATA_OUT 3 -+#define QCA955X_SLIC_PCM_FS 4 -+#define QCA955X_SLIC_PCM_CLK 5 -+#define QCA955X_SPI_CLK 8 -+#define QCA955X_SPI_CS_0 9 -+#define QCA955X_SPI_CS_1 10 -+#define QCA955X_SPI_CS_2 11 -+#define QCA955X_SPI_MISO 12 -+#define QCA955X_I2S_CLK 13 -+#define QCA955X_I2S_WS 14 -+#define QCA955X_I2S_SD 15 -+#define QCA955X_I2S_MCK 16 -+#define QCA955X_SPDIF_OUT 17 -+#define QCA955X_UART1_TD 18 -+#define QCA955X_UART1_RTS 19 -+#define QCA955X_UART1_RD 20 -+#define QCA955X_UART1_CTS 21 -+#define QCA955X_UART0_SOUT 22 -+#define QCA955X_SPDIF2_OUT 23 -+#define QCA955X_LED_SGMII_SPEED0 24 -+#define QCA955X_LED_SGMII_SPEED1 25 -+#define QCA955X_LED_SGMII_DUPLEX 26 -+#define QCA955X_LED_SGMII_LINK_UP 27 -+#define QCA955X_SGMII_SPEED0_INVERT 28 -+#define QCA955X_SGMII_SPEED1_INVERT 29 -+#define QCA955X_SGMII_DUPLEX_INVERT 30 -+#define QCA955X_SGMII_LINK_UP_INVERT 31 -+#define QCA955X_GE1_MII_MDO 32 -+#define QCA955X_GE1_MII_MDC 33 -+#define QCA955X_SWCOM2 38 -+#define QCA955X_SWCOM3 39 -+#define QCA955X_MAC2_GPIO 40 -+#define QCA955X_MAC3_GPIO 41 -+#define QCA955X_ATT_LED 42 -+#define QCA955X_PWR_LED 43 -+#define QCA955X_TX_FRAME 44 -+#define QCA955X_RX_CLEAR_EXTERNAL 45 -+#define QCA955X_LED_NETWORK_EN 46 -+#define QCA955X_LED_POWER_EN 47 -+#define QCA955X_WMAC_GLUE_WOW 68 -+#define QCA955X_RX_CLEAR_EXTENSION 70 -+#define QCA955X_CP_NAND_CS1 73 -+#define QCA955X_USB_SUSPEND 74 -+#define QCA955X_ETH_TX_ERR 75 -+#define QCA955X_DDR_DQ_OE 76 -+#define QCA955X_CLKREQ_N_EP 77 -+#define QCA955X_CLKREQ_N_RC 78 -+#define QCA955X_CLK_OBS0 79 -+#define QCA955X_CLK_OBS1 80 -+#define QCA955X_CLK_OBS2 81 -+#define QCA955X_CLK_OBS3 82 -+#define QCA955X_CLK_OBS4 83 -+#define QCA955X_CLK_OBS5 84 -+ -+/* -+ * MII_CTRL block -+ */ -+#define AR71XX_MII_REG_MII0_CTRL 0x00 -+#define AR71XX_MII_REG_MII1_CTRL 0x04 -+ -+#define AR71XX_MII_CTRL_IF_MASK 3 -+#define AR71XX_MII_CTRL_SPEED_SHIFT 4 -+#define AR71XX_MII_CTRL_SPEED_MASK 3 -+#define AR71XX_MII_CTRL_SPEED_10 0 -+#define AR71XX_MII_CTRL_SPEED_100 1 -+#define AR71XX_MII_CTRL_SPEED_1000 2 -+ -+#define AR71XX_MII0_CTRL_IF_GMII 0 -+#define AR71XX_MII0_CTRL_IF_MII 1 -+#define AR71XX_MII0_CTRL_IF_RGMII 2 -+#define AR71XX_MII0_CTRL_IF_RMII 3 -+ -+#define AR71XX_MII1_CTRL_IF_RGMII 0 -+#define AR71XX_MII1_CTRL_IF_RMII 1 -+ -+/* -+ * AR933X GMAC interface -+ */ -+#define AR933X_GMAC_REG_ETH_CFG 0x00 -+ -+#define AR933X_ETH_CFG_RGMII_GE0 BIT(0) -+#define AR933X_ETH_CFG_MII_GE0 BIT(1) -+#define AR933X_ETH_CFG_GMII_GE0 BIT(2) -+#define AR933X_ETH_CFG_MII_GE0_MASTER BIT(3) -+#define AR933X_ETH_CFG_MII_GE0_SLAVE BIT(4) -+#define AR933X_ETH_CFG_MII_GE0_ERR_EN BIT(5) -+#define AR933X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define AR933X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(8) -+#define AR933X_ETH_CFG_RMII_GE0 BIT(9) -+#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0 -+#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10) -+ -+/* -+ * AR934X GMAC Interface -+ */ -+#define AR934X_GMAC_REG_ETH_CFG 0x00 -+ -+#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0) -+#define AR934X_ETH_CFG_MII_GMAC0 BIT(1) -+#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2) -+#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3) -+#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4) -+#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5) -+#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6) -+#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9) -+#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10) -+#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11) -+#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12) -+#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) -+#define AR934X_ETH_CFG_RXD_DELAY BIT(14) -+#define AR934X_ETH_CFG_RXD_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_RXD_DELAY_SHIFT 14 -+#define AR934X_ETH_CFG_RDV_DELAY BIT(16) -+#define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 -+ -+/* -+ * QCA955X GMAC Interface -+ */ -+ -+#define QCA955X_GMAC_REG_ETH_CFG 0x00 -+ -+#define QCA955X_ETH_CFG_RGMII_EN BIT(0) -+#define QCA955X_ETH_CFG_MII_GE0 BIT(1) -+#define QCA955X_ETH_CFG_GMII_GE0 BIT(2) -+#define QCA955X_ETH_CFG_MII_GE0_MASTER BIT(3) -+#define QCA955X_ETH_CFG_MII_GE0_SLAVE BIT(4) -+#define QCA955X_ETH_CFG_GE0_ERR_EN BIT(5) -+#define QCA955X_ETH_CFG_GE0_SGMII BIT(6) -+#define QCA955X_ETH_CFG_RMII_GE0 BIT(10) -+#define QCA955X_ETH_CFG_MII_CNTL_SPEED BIT(11) -+#define QCA955X_ETH_CFG_RMII_GE0_MASTER BIT(12) -+#define QCA955X_ETH_CFG_RXD_DELAY_MASK 0x3 -+#define QCA955X_ETH_CFG_RXD_DELAY_SHIFT 14 -+#define QCA955X_ETH_CFG_RDV_DELAY BIT(16) -+#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3 -+#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16 -+#define QCA955X_ETH_CFG_TXD_DELAY_MASK 0x3 -+#define QCA955X_ETH_CFG_TXD_DELAY_SHIFT 18 -+#define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 -+#define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 -+ - #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-4.4/602-MIPS-ath79-add-openwrt-stuff.patch b/target/linux/ar71xx/patches-4.4/602-MIPS-ath79-add-openwrt-stuff.patch deleted file mode 100644 index 9959a3965..000000000 --- a/target/linux/ar71xx/patches-4.4/602-MIPS-ath79-add-openwrt-stuff.patch +++ /dev/null @@ -1,49 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -110,6 +110,20 @@ config SOC_QCA955X - select PCI_AR724X if PCI - def_bool n - -+config ATH79_DEV_M25P80 -+ select ATH79_DEV_SPI -+ def_bool n -+ -+config ATH79_DEV_AP9X_PCI -+ select ATH79_PCI_ATH9K_FIXUP -+ def_bool n -+ -+config ATH79_DEV_DSA -+ def_bool n -+ -+config ATH79_DEV_ETH -+ def_bool n -+ - config PCI_AR724X - def_bool n - -@@ -119,6 +133,10 @@ config ATH79_DEV_GPIO_BUTTONS - config ATH79_DEV_LEDS_GPIO - def_bool n - -+config ATH79_DEV_NFC -+ depends on (SOC_AR934X || SOC_QCA955X) -+ def_bool n -+ - config ATH79_DEV_SPI - def_bool n - -@@ -129,4 +147,14 @@ config ATH79_DEV_WMAC - depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) - def_bool n - -+config ATH79_NVRAM -+ def_bool n -+ -+config ATH79_PCI_ATH9K_FIXUP -+ def_bool n -+ -+config ATH79_ROUTERBOOT -+ select LZO_DECOMPRESS -+ def_bool n -+ - endif diff --git a/target/linux/ar71xx/patches-4.4/603-MIPS-ath79-ap121-fixes.patch b/target/linux/ar71xx/patches-4.4/603-MIPS-ath79-ap121-fixes.patch deleted file mode 100644 index 773a858ae..000000000 --- a/target/linux/ar71xx/patches-4.4/603-MIPS-ath79-ap121-fixes.patch +++ /dev/null @@ -1,149 +0,0 @@ ---- a/arch/mips/ath79/mach-ap121.c -+++ b/arch/mips/ath79/mach-ap121.c -@@ -1,19 +1,21 @@ - /* - * Atheros AP121 board support - * -- * Copyright (C) 2011 Gabor Juhos -+ * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - --#include "machtypes.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" -+#include "dev-m25p80.h" - #include "dev-spi.h" - #include "dev-usb.h" - #include "dev-wmac.h" -+#include "machtypes.h" - - #define AP121_GPIO_LED_WLAN 0 - #define AP121_GPIO_LED_USB 1 -@@ -24,7 +26,14 @@ - #define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ - #define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) - --#define AP121_CAL_DATA_ADDR 0x1fff1000 -+#define AP121_MAC0_OFFSET 0x0000 -+#define AP121_MAC1_OFFSET 0x0006 -+#define AP121_CALDATA_OFFSET 0x1000 -+#define AP121_WMAC_MAC_OFFSET 0x1002 -+ -+#define AP121_MINI_GPIO_LED_WLAN 0 -+#define AP121_MINI_GPIO_BTN_JUMPSTART 12 -+#define AP121_MINI_GPIO_BTN_RESET 11 - - static struct gpio_led ap121_leds_gpio[] __initdata = { - { -@@ -58,35 +67,78 @@ static struct gpio_keys_button ap121_gpi - } - }; - --static struct spi_board_info ap121_spi_info[] = { -+static struct gpio_led ap121_mini_leds_gpio[] __initdata = { - { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l1606e", -- } -+ .name = "ap121:green:wlan", -+ .gpio = AP121_MINI_GPIO_LED_WLAN, -+ .active_low = 0, -+ }, - }; - --static struct ath79_spi_platform_data ap121_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = { -+ { -+ .desc = "jumpstart button", -+ .type = EV_KEY, -+ .code = KEY_WPS_BUTTON, -+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP121_MINI_GPIO_BTN_JUMPSTART, -+ .active_low = 1, -+ }, -+ { -+ .desc = "reset button", -+ .type = EV_KEY, -+ .code = KEY_RESTART, -+ .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, -+ .gpio = AP121_MINI_GPIO_BTN_RESET, -+ .active_low = 1, -+ } - }; - -+static void __init ap121_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ ath79_register_wmac(art + AP121_CALDATA_OFFSET, -+ art + AP121_WMAC_MAC_OFFSET); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0); -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0); -+ -+ ath79_register_mdio(0, 0x0); -+ -+ /* LAN ports */ -+ ath79_register_eth(1); -+ -+ /* WAN port */ -+ ath79_register_eth(0); -+} -+ - static void __init ap121_setup(void) - { -- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR); -+ ap121_common_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), - ap121_leds_gpio); - ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap121_gpio_keys), - ap121_gpio_keys); -- -- ath79_register_spi(&ap121_spi_data, ap121_spi_info, -- ARRAY_SIZE(ap121_spi_info)); - ath79_register_usb(); -- ath79_register_wmac(cal_data, NULL); - } - - MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", - ap121_setup); -+ -+static void __init ap121_mini_setup(void) -+{ -+ ap121_common_setup(); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio), -+ ap121_mini_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap121_mini_gpio_keys), -+ ap121_mini_gpio_keys); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI", -+ ap121_mini_setup); ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -5,9 +5,10 @@ menu "Atheros AR71XX/AR724X/AR913X machi - config ATH79_MACH_AP121 - bool "Atheros AP121 reference board" - select SOC_AR933X -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - select ATH79_DEV_USB - select ATH79_DEV_WMAC - help diff --git a/target/linux/ar71xx/patches-4.4/605-MIPS-ath79-db120-fixes.patch b/target/linux/ar71xx/patches-4.4/605-MIPS-ath79-db120-fixes.patch deleted file mode 100644 index 1029d4366..000000000 --- a/target/linux/ar71xx/patches-4.4/605-MIPS-ath79-db120-fixes.patch +++ /dev/null @@ -1,204 +0,0 @@ ---- a/arch/mips/ath79/mach-db120.c -+++ b/arch/mips/ath79/mach-db120.c -@@ -2,7 +2,7 @@ - * Atheros DB120 reference board support - * - * Copyright (c) 2011 Qualcomm Atheros -- * Copyright (c) 2011 Gabor Juhos -+ * Copyright (c) 2011-2012 Gabor Juhos - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above -@@ -19,16 +19,26 @@ - */ - - #include -+#include -+#include - #include -+#include - --#include "machtypes.h" -+#include -+ -+#include "common.h" -+#include "dev-ap9x-pci.h" -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" - #include "dev-spi.h" - #include "dev-usb.h" - #include "dev-wmac.h" --#include "pci.h" -+#include "machtypes.h" - -+#define DB120_GPIO_LED_USB 11 - #define DB120_GPIO_LED_WLAN_5G 12 - #define DB120_GPIO_LED_WLAN_2G 13 - #define DB120_GPIO_LED_STATUS 14 -@@ -39,8 +49,10 @@ - #define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ - #define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) - --#define DB120_WMAC_CALDATA_OFFSET 0x1000 --#define DB120_PCIE_CALDATA_OFFSET 0x5000 -+#define DB120_MAC0_OFFSET 0 -+#define DB120_MAC1_OFFSET 6 -+#define DB120_WMAC_CALDATA_OFFSET 0x1000 -+#define DB120_PCIE_CALDATA_OFFSET 0x5000 - - static struct gpio_led db120_leds_gpio[] __initdata = { - { -@@ -63,6 +75,11 @@ static struct gpio_led db120_leds_gpio[] - .gpio = DB120_GPIO_LED_WLAN_2G, - .active_low = 1, - }, -+ { -+ .name = "db120:green:usb", -+ .gpio = DB120_GPIO_LED_USB, -+ .active_low = 1, -+ } - }; - - static struct gpio_keys_button db120_gpio_keys[] __initdata = { -@@ -76,60 +93,85 @@ static struct gpio_keys_button db120_gpi - }, - }; - --static struct spi_board_info db120_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "s25sl064a", -- } -+static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { -+ .mode = AR8327_PAD_MAC_RGMII, -+ .txclk_delay_en = true, -+ .rxclk_delay_en = true, -+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, -+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, - }; - --static struct ath79_spi_platform_data db120_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct ar8327_led_cfg db120_ar8327_led_cfg = { -+ .led_ctrl0 = 0x00000000, -+ .led_ctrl1 = 0xc737c737, -+ .led_ctrl2 = 0x00000000, -+ .led_ctrl3 = 0x00c30c00, -+ .open_drain = true, - }; - --#ifdef CONFIG_PCI --static struct ath9k_platform_data db120_ath9k_data; -- --static int db120_pci_plat_dev_init(struct pci_dev *dev) --{ -- switch (PCI_SLOT(dev->devfn)) { -- case 0: -- dev->dev.platform_data = &db120_ath9k_data; -- break; -- } -- -- return 0; --} -- --static void __init db120_pci_init(u8 *eeprom) --{ -- memcpy(db120_ath9k_data.eeprom_data, eeprom, -- sizeof(db120_ath9k_data.eeprom_data)); -+static struct ar8327_platform_data db120_ar8327_data = { -+ .pad0_cfg = &db120_ar8327_pad0_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .led_cfg = &db120_ar8327_led_cfg, -+}; - -- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); -- ath79_register_pci(); --} --#else --static inline void db120_pci_init(u8 *eeprom) {} --#endif /* CONFIG_PCI */ -+static struct mdio_board_info db120_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &db120_ar8327_data, -+ }, -+}; - - static void __init db120_setup(void) - { - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -+ ath79_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO); -+ ath79_register_m25p80(NULL); -+ - ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), - db120_leds_gpio); - ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, - ARRAY_SIZE(db120_gpio_keys), - db120_gpio_keys); -- ath79_register_spi(&db120_spi_data, db120_spi_info, -- ARRAY_SIZE(db120_spi_info)); - ath79_register_usb(); - ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL); -- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); -+ ap91_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | -+ AR934X_ETH_CFG_SW_ONLY_MODE); -+ -+ ath79_register_mdio(1, 0x0); -+ ath79_register_mdio(0, 0x0); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(db120_mdio0_info, -+ ARRAY_SIZE(db120_mdio0_info)); -+ -+ /* GMAC0 is connected to an AR8327 switch */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ ath79_eth0_pll_data.pll_1000 = 0x06000000; -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected to the internal switch */ -+ ath79_init_mac(ath79_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+ -+ ath79_register_nfc(); - } - - MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -42,9 +42,12 @@ config ATH79_MACH_AP81 - config ATH79_MACH_DB120 - bool "Atheros DB120 reference board" - select SOC_AR934X -+ select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 -+ select ATH79_DEV_NFC - select ATH79_DEV_USB - select ATH79_DEV_WMAC - help diff --git a/target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch b/target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch deleted file mode 100644 index f2943d083..000000000 --- a/target/linux/ar71xx/patches-4.4/606-MIPS-ath79-pb44-fixes.patch +++ /dev/null @@ -1,146 +0,0 @@ ---- a/arch/mips/ath79/mach-pb44.c -+++ b/arch/mips/ath79/mach-pb44.c -@@ -8,23 +8,48 @@ - * by the Free Software Foundation. - */ - -+#include - #include - #include - #include - #include - #include -+#include -+#include -+#include - --#include "machtypes.h" -+#include -+#include -+ -+#include "dev-eth.h" - #include "dev-gpio-buttons.h" - #include "dev-leds-gpio.h" - #include "dev-spi.h" - #include "dev-usb.h" -+#include "machtypes.h" - #include "pci.h" - - #define PB44_GPIO_I2C_SCL 0 - #define PB44_GPIO_I2C_SDA 1 - -+#define PB44_PCF8757_VSC7395_CS 0 -+#define PB44_PCF8757_STEREO_CS 1 -+#define PB44_PCF8757_SLIC_CS0 2 -+#define PB44_PCF8757_SLIC_TEST 3 -+#define PB44_PCF8757_SLIC_INT0 4 -+#define PB44_PCF8757_SLIC_INT1 5 -+#define PB44_PCF8757_SW_RESET 6 -+#define PB44_PCF8757_SW_JUMP 8 -+#define PB44_PCF8757_LED_JUMP1 9 -+#define PB44_PCF8757_LED_JUMP2 10 -+#define PB44_PCF8757_TP24 11 -+#define PB44_PCF8757_TP25 12 -+#define PB44_PCF8757_TP26 13 -+#define PB44_PCF8757_TP27 14 -+#define PB44_PCF8757_TP28 15 -+ - #define PB44_GPIO_EXP_BASE 16 -+#define PB44_GPIO_VSC7395_CS (PB44_GPIO_EXP_BASE + PB44_PCF8757_VSC7395_CS) - #define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) - #define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) - #define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) -@@ -87,20 +112,59 @@ static struct gpio_keys_button pb44_gpio - } - }; - -+static void pb44_vsc7395_reset(void) -+{ -+ ath79_device_reset_set(AR71XX_RESET_GE1_PHY); -+ udelay(10); -+ ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); -+ mdelay(50); -+} -+ -+static struct vsc7385_platform_data pb44_vsc7395_data = { -+ .reset = pb44_vsc7395_reset, -+ .ucode_name = "vsc7395_ucode_pb44.bin", -+ .mac_cfg = { -+ .tx_ipg = 6, -+ .bit2 = 1, -+ .clk_sel = 0, -+ }, -+}; -+ -+static const char *pb44_part_probes[] = { -+ "RedBoot", -+ NULL, -+}; -+ -+static struct flash_platform_data pb44_flash_data = { -+ .part_probes = pb44_part_probes, -+}; -+ - static struct spi_board_info pb44_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p64", -+ .platform_data = &pb44_flash_data, - }, -+ { -+ .bus_num = 0, -+ .chip_select = 1, -+ .max_speed_hz = 25000000, -+ .modalias = "spi-vsc7385", -+ .platform_data = &pb44_vsc7395_data, -+ } - }; - - static struct ath79_spi_platform_data pb44_spi_data = { - .bus_num = 0, -- .num_chipselect = 1, -+ .num_chipselect = 2, - }; - -+#define PB44_WAN_PHYMASK BIT(0) -+#define PB44_LAN_PHYMASK 0 -+#define PB44_MDIO_PHYMASK (PB44_LAN_PHYMASK | PB44_WAN_PHYMASK) -+ - static void __init pb44_init(void) - { - i2c_register_board_info(0, pb44_i2c_board_info, -@@ -116,6 +180,22 @@ static void __init pb44_init(void) - ARRAY_SIZE(pb44_spi_info)); - ath79_register_usb(); - ath79_register_pci(); -+ -+ ath79_register_mdio(0, ~PB44_MDIO_PHYMASK); -+ -+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = PB44_WAN_PHYMASK; -+ -+ ath79_register_eth(0); -+ -+ ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ ath79_eth1_pll_data.pll_1000 = 0x110000; -+ -+ ath79_register_eth(1); - } - - MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -57,6 +57,7 @@ config ATH79_MACH_DB120 - config ATH79_MACH_PB44 - bool "Atheros PB44 reference board" - select SOC_AR71XX -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO - select ATH79_DEV_SPI diff --git a/target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch b/target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch deleted file mode 100644 index d667215a1..000000000 --- a/target/linux/ar71xx/patches-4.4/607-MIPS-ath79-ubnt-xm-fixes.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -69,9 +69,10 @@ config ATH79_MACH_PB44 - config ATH79_MACH_UBNT_XM - bool "Ubiquiti Networks XM (rev 1.0) board" - select SOC_AR724X -+ select ATH79_DEV_AP9X_PCI if PCI - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -- select ATH79_DEV_SPI -+ select ATH79_DEV_M25P80 - help - Say 'Y' here if you want your kernel to support the - Ubiquiti Networks XM (rev 1.0) board. diff --git a/target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch b/target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch deleted file mode 100644 index 536c28d1c..000000000 --- a/target/linux/ar71xx/patches-4.4/608-MIPS-ath79-ubnt-xm-add-more-boards.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -67,12 +67,16 @@ config ATH79_MACH_PB44 - Atheros PB44 reference board. - - config ATH79_MACH_UBNT_XM -- bool "Ubiquiti Networks XM (rev 1.0) board" -+ bool "Ubiquiti Networks XM/UniFi boards" - select SOC_AR724X -+ select SOC_AR934X - select ATH79_DEV_AP9X_PCI if PCI -+ select ATH79_DEV_ETH - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO - select ATH79_DEV_M25P80 -+ select ATH79_DEV_USB -+ select ATH79_DEV_WMAC - help - Say 'Y' here if you want your kernel to support the - Ubiquiti Networks XM (rev 1.0) board. diff --git a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch deleted file mode 100644 index 4d7902e16..000000000 --- a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch +++ /dev/null @@ -1,300 +0,0 @@ ---- a/arch/mips/ath79/mach-ap136.c -+++ b/arch/mips/ath79/mach-ap136.c -@@ -18,23 +18,29 @@ - * - */ - --#include --#include -+#include -+#include - --#include "machtypes.h" -+#include -+ -+#include "common.h" -+#include "pci.h" -+#include "dev-ap9x-pci.h" - #include "dev-gpio-buttons.h" -+#include "dev-eth.h" - #include "dev-leds-gpio.h" --#include "dev-spi.h" -+#include "dev-m25p80.h" -+#include "dev-nfc.h" - #include "dev-usb.h" - #include "dev-wmac.h" --#include "pci.h" -+#include "machtypes.h" - --#define AP136_GPIO_LED_STATUS_RED 14 --#define AP136_GPIO_LED_STATUS_GREEN 19 - #define AP136_GPIO_LED_USB 4 --#define AP136_GPIO_LED_WLAN_2G 13 - #define AP136_GPIO_LED_WLAN_5G 12 -+#define AP136_GPIO_LED_WLAN_2G 13 -+#define AP136_GPIO_LED_STATUS_RED 14 - #define AP136_GPIO_LED_WPS_RED 15 -+#define AP136_GPIO_LED_STATUS_GREEN 19 - #define AP136_GPIO_LED_WPS_GREEN 20 - - #define AP136_GPIO_BTN_WPS 16 -@@ -43,37 +49,39 @@ - #define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ - #define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) - --#define AP136_WMAC_CALDATA_OFFSET 0x1000 --#define AP136_PCIE_CALDATA_OFFSET 0x5000 -+#define AP136_MAC0_OFFSET 0 -+#define AP136_MAC1_OFFSET 6 -+#define AP136_WMAC_CALDATA_OFFSET 0x1000 -+#define AP136_PCIE_CALDATA_OFFSET 0x5000 - - static struct gpio_led ap136_leds_gpio[] __initdata = { - { -- .name = "qca:green:status", -+ .name = "ap136:green:status", - .gpio = AP136_GPIO_LED_STATUS_GREEN, - .active_low = 1, - }, - { -- .name = "qca:red:status", -+ .name = "ap136:red:status", - .gpio = AP136_GPIO_LED_STATUS_RED, - .active_low = 1, - }, - { -- .name = "qca:green:wps", -+ .name = "ap136:green:wps", - .gpio = AP136_GPIO_LED_WPS_GREEN, - .active_low = 1, - }, - { -- .name = "qca:red:wps", -+ .name = "ap136:red:wps", - .gpio = AP136_GPIO_LED_WPS_RED, - .active_low = 1, - }, - { -- .name = "qca:red:wlan-2g", -+ .name = "ap136:red:wlan-2g", - .gpio = AP136_GPIO_LED_WLAN_2G, - .active_low = 1, - }, - { -- .name = "qca:red:usb", -+ .name = "ap136:red:usb", - .gpio = AP136_GPIO_LED_USB, - .active_low = 1, - } -@@ -98,59 +106,151 @@ static struct gpio_keys_button ap136_gpi - }, - }; - --static struct spi_board_info ap136_spi_info[] = { -- { -- .bus_num = 0, -- .chip_select = 0, -- .max_speed_hz = 25000000, -- .modalias = "mx25l6405d", -- } -+static struct ar8327_pad_cfg ap136_ar8327_pad0_cfg; -+static struct ar8327_pad_cfg ap136_ar8327_pad6_cfg; -+ -+static struct ar8327_platform_data ap136_ar8327_data = { -+ .pad0_cfg = &ap136_ar8327_pad0_cfg, -+ .pad6_cfg = &ap136_ar8327_pad6_cfg, -+ .port0_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, -+ .port6_cfg = { -+ .force_link = 1, -+ .speed = AR8327_PORT_SPEED_1000, -+ .duplex = 1, -+ .txpause = 1, -+ .rxpause = 1, -+ }, - }; - --static struct ath79_spi_platform_data ap136_spi_data = { -- .bus_num = 0, -- .num_chipselect = 1, -+static struct mdio_board_info ap136_mdio0_info[] = { -+ { -+ .bus_id = "ag71xx-mdio.0", -+ .phy_addr = 0, -+ .platform_data = &ap136_ar8327_data, -+ }, - }; - --#ifdef CONFIG_PCI --static struct ath9k_platform_data ap136_ath9k_data; -+static void __init ap136_common_setup(void) -+{ -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); -+ -+ ath79_register_m25p80(NULL); -+ -+ ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), -+ ap136_leds_gpio); -+ ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, -+ ARRAY_SIZE(ap136_gpio_keys), -+ ap136_gpio_keys); -+ -+ ath79_register_usb(); -+ ath79_register_nfc(); -+ -+ ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); -+ -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - --static int ap136_pci_plat_dev_init(struct pci_dev *dev) -+ ath79_register_mdio(0, 0x0); -+ ath79_init_mac(ath79_eth0_data.mac_addr, art + AP136_MAC0_OFFSET, 0); -+ -+ mdiobus_register_board_info(ap136_mdio0_info, -+ ARRAY_SIZE(ap136_mdio0_info)); -+ -+ /* GMAC0 is connected to the RMGII interface */ -+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; -+ ath79_eth0_data.phy_mask = BIT(0); -+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; -+ -+ ath79_register_eth(0); -+ -+ /* GMAC1 is connected tot eh SGMII interface */ -+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; -+ ath79_eth1_data.speed = SPEED_1000; -+ ath79_eth1_data.duplex = DUPLEX_FULL; -+ -+ ath79_register_eth(1); -+} -+ -+static void __init ap136_010_setup(void) - { -- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) -- dev->dev.platform_data = &ap136_ath9k_data; -+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -- return 0; -+ /* GMAC0 of the AR8327 switch is connected to GMAC0 via RGMII */ -+ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; -+ ap136_ar8327_pad0_cfg.txclk_delay_en = true; -+ ap136_ar8327_pad0_cfg.rxclk_delay_en = true; -+ ap136_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; -+ ap136_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; -+ -+ /* GMAC6 of the AR8327 switch is connected to GMAC1 via SGMII */ -+ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; -+ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; -+ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; -+ -+ ath79_eth0_pll_data.pll_1000 = 0xa6000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ap136_common_setup(); -+ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); - } - --static void __init ap136_pci_init(u8 *eeprom) -+MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", -+ "Atheros AP136-010 reference board", -+ ap136_010_setup); -+ -+static void __init ap136_020_common_setup(void) - { -- memcpy(ap136_ath9k_data.eeprom_data, eeprom, -- sizeof(ap136_ath9k_data.eeprom_data)); -+ /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ -+ ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; -+ ap136_ar8327_pad0_cfg.sgmii_delay_en = true; -+ -+ /* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */ -+ ap136_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_RGMII; -+ ap136_ar8327_pad6_cfg.txclk_delay_en = true; -+ ap136_ar8327_pad6_cfg.rxclk_delay_en = true; -+ ap136_ar8327_pad6_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; -+ ap136_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; - -- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); -- ath79_register_pci(); -+ ath79_eth0_pll_data.pll_1000 = 0x56000000; -+ ath79_eth1_pll_data.pll_1000 = 0x03000101; -+ -+ ap136_common_setup(); - } --#else --static inline void ap136_pci_init(u8 *eeprom) {} --#endif /* CONFIG_PCI */ - --static void __init ap136_setup(void) -+static void __init ap136_020_setup(void) - { - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - -- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), -- ap136_leds_gpio); -- ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, -- ARRAY_SIZE(ap136_gpio_keys), -- ap136_gpio_keys); -- ath79_register_spi(&ap136_spi_data, ap136_spi_info, -- ARRAY_SIZE(ap136_spi_info)); -- ath79_register_usb(); -- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); -- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); -+ ap136_020_common_setup(); -+ ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); - } - --MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", -- "Atheros AP136-010 reference board", -- ap136_setup); -+MIPS_MACHINE(ATH79_MACH_AP136_020, "AP136-020", -+ "Atheros AP136-020 reference board", -+ ap136_020_setup); -+ -+/* -+ * AP135-020 is similar to AP136-020, any future AP135 specific init -+ * code can be added here. -+ */ -+static void __init ap135_020_setup(void) -+{ -+ ap136_leds_gpio[0].name = "ap135:green:status"; -+ ap136_leds_gpio[1].name = "ap135:red:status"; -+ ap136_leds_gpio[2].name = "ap135:green:wps"; -+ ap136_leds_gpio[3].name = "ap135:red:wps"; -+ ap136_leds_gpio[4].name = "ap135:red:wlan-2g"; -+ ap136_leds_gpio[5].name = "ap135:red:usb"; -+ -+ ap136_020_common_setup(); -+ ath79_register_pci(); -+} -+ -+MIPS_MACHINE(ATH79_MACH_AP135_020, "AP135-020", -+ "Atheros AP135-020 reference board", -+ ap135_020_setup); ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -16,16 +16,17 @@ config ATH79_MACH_AP121 - Atheros AP121 reference board. - - config ATH79_MACH_AP136 -- bool "Atheros AP136 reference board" -+ bool "Atheros AP136/AP135 reference board" - select SOC_QCA955X - select ATH79_DEV_GPIO_BUTTONS - select ATH79_DEV_LEDS_GPIO -+ select ATH79_DEV_NFC - select ATH79_DEV_SPI - select ATH79_DEV_USB - select ATH79_DEV_WMAC - help - Say 'Y' here if you want your kernel to support the -- Atheros AP136 reference board. -+ Atheros AP136 or AP135 reference boards. - - config ATH79_MACH_AP81 - bool "Atheros AP81 reference board" diff --git a/target/linux/ar71xx/patches-4.4/611-MIPS-ath79-wdt-timeout.patch b/target/linux/ar71xx/patches-4.4/611-MIPS-ath79-wdt-timeout.patch deleted file mode 100644 index 7a70ac3f8..000000000 --- a/target/linux/ar71xx/patches-4.4/611-MIPS-ath79-wdt-timeout.patch +++ /dev/null @@ -1,25 +0,0 @@ -MIPS: ath79: fix maximum timeout - -If the userland tries to set a timeout higher than the max_timeout, then we should fallback to max_timeout. - -Signed-off-by: John Crispin - ---- a/drivers/watchdog/ath79_wdt.c -+++ b/drivers/watchdog/ath79_wdt.c -@@ -114,10 +114,14 @@ static inline void ath79_wdt_disable(voi - - static int ath79_wdt_set_timeout(int val) - { -- if (val < 1 || val > max_timeout) -+ if (val < 1) - return -EINVAL; - -- timeout = val; -+ if (val > max_timeout) -+ timeout = max_timeout; -+ else -+ timeout = val; -+ - ath79_wdt_keepalive(); - - return 0; diff --git a/target/linux/ar71xx/patches-4.4/612-MIPS-ath79-set-buffalo-txgain.patch b/target/linux/ar71xx/patches-4.4/612-MIPS-ath79-set-buffalo-txgain.patch deleted file mode 100644 index 3d100e054..000000000 --- a/target/linux/ar71xx/patches-4.4/612-MIPS-ath79-set-buffalo-txgain.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -319,6 +319,11 @@ void __init ath79_wmac_disable_5ghz(void - ath79_wmac_data.disable_5ghz = true; - } - -+void __init ath79_wmac_set_tx_gain_buffalo(void) -+{ -+ ath79_wmac_data.tx_gain_buffalo = true; -+} -+ - void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -16,6 +16,7 @@ void ath79_register_wmac(u8 *cal_data, u - void ath79_register_wmac_simple(void); - void ath79_wmac_disable_2ghz(void); - void ath79_wmac_disable_5ghz(void); -+void ath79_wmac_set_tx_gain_buffalo(void); - - bool ar93xx_wmac_read_mac_address(u8 *dest); - diff --git a/target/linux/ar71xx/patches-4.4/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch b/target/linux/ar71xx/patches-4.4/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch deleted file mode 100644 index 5c1205d59..000000000 --- a/target/linux/ar71xx/patches-4.4/613-MIPS-ath79-add-ath79_wmac_setup_ext_lna_gpio-helper.patch +++ /dev/null @@ -1,76 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -18,9 +18,11 @@ - #include - #include - #include -+#include - - #include - #include -+#include "common.h" - #include "dev-wmac.h" - - static u8 ath79_wmac_mac[ETH_ALEN]; -@@ -324,6 +326,51 @@ void __init ath79_wmac_set_tx_gain_buffa - ath79_wmac_data.tx_gain_buffalo = true; - } - -+static int ath79_request_ext_lna_gpio(unsigned chain, int gpio) -+{ -+ char *label; -+ int err; -+ -+ label = kasprintf(GFP_KERNEL, "external LNA%u", chain); -+ if (!label) -+ return -ENOMEM; -+ -+ err = gpio_request_one(gpio, GPIOF_DIR_OUT | GPIOF_INIT_LOW, label); -+ if (err) { -+ pr_err("unable to request GPIO%d for external LNA%u\n", -+ gpio, chain); -+ kfree(label); -+ } -+ -+ return err; -+} -+ -+static void ar934x_set_ext_lna_gpio(unsigned chain, int gpio) -+{ -+ unsigned int sel; -+ int err; -+ -+ if (WARN_ON(chain > 1)) -+ return; -+ -+ err = ath79_request_ext_lna_gpio(chain, gpio); -+ if (err) -+ return; -+ -+ if (chain == 0) -+ sel = AR934X_GPIO_OUT_EXT_LNA0; -+ else -+ sel = AR934X_GPIO_OUT_EXT_LNA1; -+ -+ ath79_gpio_output_select(gpio, sel); -+} -+ -+void __init ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio) -+{ -+ if (soc_is_ar934x()) -+ ar934x_set_ext_lna_gpio(chain, gpio); -+} -+ - void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -17,6 +17,7 @@ void ath79_register_wmac_simple(void); - void ath79_wmac_disable_2ghz(void); - void ath79_wmac_disable_5ghz(void); - void ath79_wmac_set_tx_gain_buffalo(void); -+void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio); - - bool ar93xx_wmac_read_mac_address(u8 *dest); - diff --git a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch deleted file mode 100644 index 5cfb4e78d..000000000 --- a/target/linux/ar71xx/patches-4.4/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ /dev/null @@ -1,705 +0,0 @@ -From 5300a7cd7ed2f88488ddba62947b9c6bb9663777 Mon Sep 17 00:00:00 2001 -Message-Id: <5300a7cd7ed2f88488ddba62947b9c6bb9663777.1396122227.git.mschiffer@universe-factory.net> -From: Matthias Schiffer -Date: Sat, 29 Mar 2014 20:26:08 +0100 -Subject: [PATCH 1/2] MIPS: ath79: add support for QCA953x SoC - -Note that the clock calculation looks very similar to the QCA955x, but the -meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. ---- - arch/mips/ath79/Kconfig | 6 +- - arch/mips/ath79/clock.c | 78 ++++++++++++++++++++++++++ - arch/mips/ath79/common.c | 4 ++ - arch/mips/ath79/dev-common.c | 1 + - arch/mips/ath79/dev-wmac.c | 20 +++++++ - arch/mips/ath79/early_printk.c | 1 + - arch/mips/ath79/gpio.c | 4 +- - arch/mips/ath79/irq.c | 4 ++ - arch/mips/ath79/setup.c | 8 ++- - arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 48 ++++++++++++++++ - arch/mips/include/asm/mach-ath79/ath79.h | 11 ++++ - 11 files changed, 182 insertions(+), 3 deletions(-) - ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -116,6 +116,10 @@ config SOC_AR934X - select PCI_AR724X if PCI - def_bool n - -+config SOC_QCA953X -+ select USB_ARCH_HAS_EHCI -+ def_bool n -+ - config SOC_QCA955X - select HW_HAS_PCI - select PCI_AR724X if PCI -@@ -155,7 +159,7 @@ config ATH79_DEV_USB - def_bool n - - config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) -+ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X) - def_bool n - - config ATH79_NVRAM ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -354,6 +354,91 @@ static void __init ar934x_clocks_init(vo - iounmap(dpll_base); - } - -+static void __init qca953x_clocks_init(void) -+{ -+ unsigned long ref_rate; -+ unsigned long cpu_rate; -+ unsigned long ddr_rate; -+ unsigned long ahb_rate; -+ u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; -+ u32 cpu_pll, ddr_pll; -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40) -+ ref_rate = 40 * 1000 * 1000; -+ else -+ ref_rate = 25 * 1000 * 1000; -+ -+ pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); -+ out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_REFDIV_MASK; -+ nint = (pll >> QCA953X_PLL_CPU_CONFIG_NINT_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_NINT_MASK; -+ frac = (pll >> QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT) & -+ QCA953X_PLL_CPU_CONFIG_NFRAC_MASK; -+ -+ cpu_pll = nint * ref_rate / ref_div; -+ cpu_pll += frac * (ref_rate >> 6) / ref_div; -+ cpu_pll /= (1 << out_div); -+ -+ pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); -+ out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_REFDIV_MASK; -+ nint = (pll >> QCA953X_PLL_DDR_CONFIG_NINT_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_NINT_MASK; -+ frac = (pll >> QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT) & -+ QCA953X_PLL_DDR_CONFIG_NFRAC_MASK; -+ -+ ddr_pll = nint * ref_rate / ref_div; -+ ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); -+ ddr_pll /= (1 << out_div); -+ -+ clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); -+ -+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & -+ QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS) -+ cpu_rate = ref_rate; -+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) -+ cpu_rate = cpu_pll / (postdiv + 1); -+ else -+ cpu_rate = ddr_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & -+ QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) -+ ddr_rate = ref_rate; -+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) -+ ddr_rate = ddr_pll / (postdiv + 1); -+ else -+ ddr_rate = cpu_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & -+ QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS) -+ ahb_rate = ref_rate; -+ else if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) -+ ahb_rate = ddr_pll / (postdiv + 1); -+ else -+ ahb_rate = cpu_pll / (postdiv + 1); -+ -+ ath79_add_sys_clkdev("ref", ref_rate); -+ ath79_add_sys_clkdev("cpu", cpu_rate); -+ ath79_add_sys_clkdev("ddr", ddr_rate); -+ ath79_add_sys_clkdev("ahb", ahb_rate); -+ -+ clk_add_alias("wdt", NULL, "ref", NULL); -+ clk_add_alias("uart", NULL, "ref", NULL); -+} -+ - static void __init qca955x_clocks_init(void) - { - unsigned long ref_rate; -@@ -451,6 +536,8 @@ void __init ath79_clocks_init(void) - ar933x_clocks_init(); - else if (soc_is_ar934x()) - ar934x_clocks_init(); -+ else if (soc_is_qca953x()) -+ qca953x_clocks_init(); - else if (soc_is_qca955x()) - qca955x_clocks_init(); - else ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -103,6 +103,8 @@ void ath79_device_reset_set(u32 mask) - reg = AR933X_RESET_REG_RESET_MODULE; - else if (soc_is_ar934x()) - reg = AR934X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca953x()) -+ reg = QCA953X_RESET_REG_RESET_MODULE; - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; - else -@@ -131,6 +133,8 @@ void ath79_device_reset_clear(u32 mask) - reg = AR933X_RESET_REG_RESET_MODULE; - else if (soc_is_ar934x()) - reg = AR934X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca953x()) -+ reg = QCA953X_RESET_REG_RESET_MODULE; - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; - else ---- a/arch/mips/ath79/dev-common.c -+++ b/arch/mips/ath79/dev-common.c -@@ -94,6 +94,7 @@ void __init ath79_register_uart(void) - soc_is_ar724x() || - soc_is_ar913x() || - soc_is_ar934x() || -+ soc_is_qca953x() || - soc_is_qca955x()) { - ath79_uart_data[0].uartclk = uart_clk_rate; - platform_device_register(&ath79_uart_device); -@@ -157,6 +158,9 @@ void __init ath79_gpio_init(void) - } else if (soc_is_ar934x()) { - ath79_gpio_pdata.ngpios = AR934X_GPIO_COUNT; - ath79_gpio_pdata.oe_inverted = 1; -+ } else if (soc_is_qca953x()) { -+ ath79_gpio_pdata.ngpios = QCA953X_GPIO_COUNT; -+ ath79_gpio_pdata.oe_inverted = 1; - } else if (soc_is_qca955x()) { - ath79_gpio_pdata.ngpios = QCA955X_GPIO_COUNT; - ath79_gpio_pdata.oe_inverted = 1; ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -236,6 +236,30 @@ static void __init ar934x_usb_setup(void - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - -+static void __init qca953x_usb_setup(void) -+{ -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ -+ ath79_device_reset_set(QCA953X_RESET_USBSUS_OVERRIDE); -+ udelay(1000); -+ -+ ath79_device_reset_clear(QCA953X_RESET_USB_PHY); -+ udelay(1000); -+ -+ ath79_device_reset_clear(QCA953X_RESET_USB_PHY_ANALOG); -+ udelay(1000); -+ -+ ath79_device_reset_clear(QCA953X_RESET_USB_HOST); -+ udelay(1000); -+ -+ ath79_usb_register("ehci-platform", -1, -+ QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE, -+ ATH79_CPU_IRQ(3), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+} -+ - static void qca955x_usb_reset_notifier(struct platform_device *pdev) - { - u32 base; -@@ -286,6 +310,8 @@ void __init ath79_register_usb(void) - ar933x_usb_setup(); - else if (soc_is_ar934x()) - ar934x_usb_setup(); -+ else if (soc_is_qca953x()) -+ qca953x_usb_setup(); - else if (soc_is_qca955x()) - qca955x_usb_setup(); - else ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -100,7 +100,7 @@ static int ar933x_wmac_reset(void) - return -ETIMEDOUT; - } - --static int ar933x_r1_get_wmac_revision(void) -+static int ar93xx_get_soc_revision(void) - { - return ath79_soc_rev; - } -@@ -125,7 +125,7 @@ static void __init ar933x_wmac_setup(voi - ath79_wmac_data.is_clk_25mhz = true; - - if (ath79_soc_rev == 1) -- ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision; -+ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; - - ath79_wmac_data.external_reset = ar933x_wmac_reset; - } -@@ -150,6 +150,26 @@ static void ar934x_wmac_setup(void) - ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; - } - -+static void qca953x_wmac_setup(void) -+{ -+ u32 t; -+ -+ ath79_wmac_device.name = "qca953x_wmac"; -+ -+ ath79_wmac_resources[0].start = QCA953X_WMAC_BASE; -+ ath79_wmac_resources[0].end = QCA953X_WMAC_BASE + QCA953X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); -+ -+ t = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ if (t & QCA953X_BOOTSTRAP_REF_CLK_40) -+ ath79_wmac_data.is_clk_25mhz = false; -+ else -+ ath79_wmac_data.is_clk_25mhz = true; -+ -+ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; -+} -+ - static void qca955x_wmac_setup(void) - { - u32 t; -@@ -379,6 +399,8 @@ void __init ath79_register_wmac(u8 *cal_ - ar933x_wmac_setup(); - else if (soc_is_ar934x()) - ar934x_wmac_setup(); -+ else if (soc_is_qca953x()) -+ qca953x_wmac_setup(); - else if (soc_is_qca955x()) - qca955x_wmac_setup(); - else ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -116,6 +116,8 @@ static void prom_putchar_init(void) - case REV_ID_MAJOR_AR9341: - case REV_ID_MAJOR_AR9342: - case REV_ID_MAJOR_AR9344: -+ case REV_ID_MAJOR_QCA9533: -+ case REV_ID_MAJOR_QCA9533_V2: - case REV_ID_MAJOR_QCA9556: - case REV_ID_MAJOR_QCA9558: - _prom_putchar = prom_putchar_ar71xx; ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -31,7 +31,7 @@ static void __iomem *ath79_gpio_get_func - soc_is_ar913x() || - soc_is_ar933x()) - reg = AR71XX_GPIO_REG_FUNC; -- else if (soc_is_ar934x()) -+ else if (soc_is_ar934x() || soc_is_qca953x()) - reg = AR934X_GPIO_REG_FUNC; - else - BUG(); -@@ -64,7 +64,7 @@ void __init ath79_gpio_output_select(uns - unsigned int reg; - u32 t, s; - -- BUG_ON(!soc_is_ar934x()); -+ BUG_ON(!soc_is_ar934x() && !soc_is_qca953x()); - - if (gpio >= AR934X_GPIO_COUNT) - return; ---- a/arch/mips/ath79/irq.c -+++ b/arch/mips/ath79/irq.c -@@ -105,6 +105,7 @@ static void __init ath79_misc_irq_init(v - else if (soc_is_ar724x() || - soc_is_ar933x() || - soc_is_ar934x() || -+ soc_is_qca953x() || - soc_is_qca955x()) - ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; - else -@@ -148,6 +149,34 @@ static void ar934x_ip2_irq_init(void) - irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); - } - -+static void qca953x_ip2_irq_dispatch(struct irq_desc *desc) -+{ -+ u32 status; -+ -+ status = ath79_reset_rr(QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS); -+ -+ if (status & QCA953X_PCIE_WMAC_INT_PCIE_ALL) { -+ ath79_ddr_wb_flush(3); -+ generic_handle_irq(ATH79_IP2_IRQ(0)); -+ } else if (status & QCA953X_PCIE_WMAC_INT_WMAC_ALL) { -+ ath79_ddr_wb_flush(4); -+ generic_handle_irq(ATH79_IP2_IRQ(1)); -+ } else { -+ spurious_interrupt(); -+ } -+} -+ -+static void qca953x_irq_init(void) -+{ -+ int i; -+ -+ for (i = ATH79_IP2_IRQ_BASE; -+ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); -+} -+ - static void qca955x_ip2_irq_dispatch(struct irq_desc *desc) - { - u32 status; -@@ -362,7 +391,7 @@ void __init arch_init_irq(void) - soc_is_ar913x() || soc_is_ar933x()) { - irq_wb_chan[2] = 3; - irq_wb_chan[3] = 2; -- } else if (soc_is_ar934x()) { -+ } else if (soc_is_ar934x() || soc_is_qca953x()) { - irq_wb_chan[3] = 2; - } - -@@ -371,6 +400,8 @@ void __init arch_init_irq(void) - - if (soc_is_ar934x()) - ar934x_ip2_irq_init(); -+ else if (soc_is_qca953x()) -+ qca953x_irq_init(); - else if (soc_is_qca955x()) - qca955x_irq_init(); - } ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -64,6 +64,7 @@ static void __init ath79_detect_sys_type - u32 major; - u32 minor; - u32 rev = 0; -+ u32 ver = 1; - - id = ath79_reset_rr(AR71XX_RESET_REG_REV_ID); - major = id & REV_ID_MAJOR_MASK; -@@ -156,6 +157,17 @@ static void __init ath79_detect_sys_type - rev = id & AR934X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_QCA9533_V2: -+ ver = 2; -+ ath79_soc_rev = 2; -+ /* drop through */ -+ -+ case REV_ID_MAJOR_QCA9533: -+ ath79_soc = ATH79_SOC_QCA9533; -+ chip = "9533"; -+ rev = id & QCA953X_REV_ID_REVISION_MASK; -+ break; -+ - case REV_ID_MAJOR_QCA9556: - ath79_soc = ATH79_SOC_QCA9556; - chip = "9556"; -@@ -172,11 +184,12 @@ static void __init ath79_detect_sys_type - panic("ath79: unknown SoC, id:0x%08x", id); - } - -- ath79_soc_rev = rev; -+ if (ver == 1) -+ ath79_soc_rev = rev; - -- if (soc_is_qca955x()) -- sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u", -- chip, rev); -+ if (soc_is_qca953x() || soc_is_qca955x()) -+ sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", -+ chip, ver, rev); - else - sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); - pr_info("SoC: %s\n", ath79_sys_type); ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -105,6 +105,21 @@ - #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) - #define AR934X_SRIF_SIZE 0x1000 - -+#define QCA953X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA953X_GMAC_SIZE 0x14 -+#define QCA953X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -+#define QCA953X_WMAC_SIZE 0x20000 -+#define QCA953X_EHCI_BASE 0x1b000000 -+#define QCA953X_EHCI_SIZE 0x200 -+#define QCA953X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) -+#define QCA953X_SRIF_SIZE 0x1000 -+ -+#define QCA953X_PCI_CFG_BASE0 0x14000000 -+#define QCA953X_PCI_CTRL_BASE0 (AR71XX_APB_BASE + 0x000f0000) -+#define QCA953X_PCI_CRP_BASE0 (AR71XX_APB_BASE + 0x000c0000) -+#define QCA953X_PCI_MEM_BASE0 0x10000000 -+#define QCA953X_PCI_MEM_SIZE 0x02000000 -+ - #define QCA955X_PCI_MEM_BASE0 0x10000000 - #define QCA955X_PCI_MEM_BASE1 0x12000000 - #define QCA955X_PCI_MEM_SIZE 0x02000000 -@@ -180,6 +195,12 @@ - #define AR934X_OTP_INTF3_ADDRESS 0x3100c - #define AR934X_OTP_PGENB_SETUP_HOLD_TIME_ADDRESS 0x31034 - -+#define QCA953X_DDR_REG_FLUSH_GE0 0x9c -+#define QCA953X_DDR_REG_FLUSH_GE1 0xa0 -+#define QCA953X_DDR_REG_FLUSH_USB 0xa4 -+#define QCA953X_DDR_REG_FLUSH_PCIE 0xa8 -+#define QCA953X_DDR_REG_FLUSH_WMAC 0xac -+ - /* - * PLL block - */ -@@ -289,6 +310,44 @@ - - #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) - -+#define QCA953X_PLL_CPU_CONFIG_REG 0x00 -+#define QCA953X_PLL_DDR_CONFIG_REG 0x04 -+#define QCA953X_PLL_CLK_CTRL_REG 0x08 -+#define QCA953X_PLL_SWITCH_CLOCK_CONTROL_REG 0x24 -+#define QCA953X_PLL_ETH_XMII_CONTROL_REG 0x2c -+#define QCA953X_PLL_ETH_SGMII_CONTROL_REG 0x48 -+ -+#define QCA953X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 -+#define QCA953X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f -+#define QCA953X_PLL_CPU_CONFIG_NINT_SHIFT 6 -+#define QCA953X_PLL_CPU_CONFIG_NINT_MASK 0x3f -+#define QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -+#define QCA953X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -+#define QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -+#define QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA953X_PLL_DDR_CONFIG_NFRAC_SHIFT 0 -+#define QCA953X_PLL_DDR_CONFIG_NFRAC_MASK 0x3ff -+#define QCA953X_PLL_DDR_CONFIG_NINT_SHIFT 10 -+#define QCA953X_PLL_DDR_CONFIG_NINT_MASK 0x3f -+#define QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -+#define QCA953X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -+#define QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -+#define QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -+#define QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -+#define QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -+#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -+#define QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -+#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -+#define QCA953X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -+#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -+#define QCA953X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -+#define QCA953X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL BIT(20) -+#define QCA953X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) -+#define QCA953X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) -+ - #define QCA955X_PLL_CPU_CONFIG_REG 0x00 - #define QCA955X_PLL_DDR_CONFIG_REG 0x04 - #define QCA955X_PLL_CLK_CTRL_REG 0x08 -@@ -365,6 +424,10 @@ - #define AR934X_RESET_REG_BOOTSTRAP 0xb0 - #define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac - -+#define QCA953X_RESET_REG_RESET_MODULE 0x1c -+#define QCA953X_RESET_REG_BOOTSTRAP 0xb0 -+#define QCA953X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac -+ - #define QCA955X_RESET_REG_RESET_MODULE 0x1c - #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 - #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac -@@ -460,6 +523,27 @@ - #define AR934X_RESET_MBOX BIT(1) - #define AR934X_RESET_I2S BIT(0) - -+#define QCA953X_RESET_USB_EXT_PWR BIT(29) -+#define QCA953X_RESET_EXTERNAL BIT(28) -+#define QCA953X_RESET_RTC BIT(27) -+#define QCA953X_RESET_FULL_CHIP BIT(24) -+#define QCA953X_RESET_GE1_MDIO BIT(23) -+#define QCA953X_RESET_GE0_MDIO BIT(22) -+#define QCA953X_RESET_CPU_NMI BIT(21) -+#define QCA953X_RESET_CPU_COLD BIT(20) -+#define QCA953X_RESET_DDR BIT(16) -+#define QCA953X_RESET_USB_PHY_PLL_PWD_EXT BIT(15) -+#define QCA953X_RESET_GE1_MAC BIT(13) -+#define QCA953X_RESET_ETH_SWITCH_ANALOG BIT(12) -+#define QCA953X_RESET_USB_PHY_ANALOG BIT(11) -+#define QCA953X_RESET_GE0_MAC BIT(9) -+#define QCA953X_RESET_ETH_SWITCH BIT(8) -+#define QCA953X_RESET_PCIE_PHY BIT(7) -+#define QCA953X_RESET_PCIE BIT(6) -+#define QCA953X_RESET_USB_HOST BIT(5) -+#define QCA953X_RESET_USB_PHY BIT(4) -+#define QCA953X_RESET_USBSUS_OVERRIDE BIT(3) -+ - #define QCA955X_RESET_HOST BIT(31) - #define QCA955X_RESET_SLIC BIT(30) - #define QCA955X_RESET_HDMA BIT(29) -@@ -513,6 +597,13 @@ - #define AR934X_BOOTSTRAP_SDRAM_DISABLED BIT(1) - #define AR934X_BOOTSTRAP_DDR1 BIT(0) - -+#define QCA953X_BOOTSTRAP_SW_OPTION2 BIT(12) -+#define QCA953X_BOOTSTRAP_SW_OPTION1 BIT(11) -+#define QCA953X_BOOTSTRAP_EJTAG_MODE BIT(5) -+#define QCA953X_BOOTSTRAP_REF_CLK_40 BIT(4) -+#define QCA953X_BOOTSTRAP_SDRAM_DISABLED BIT(1) -+#define QCA953X_BOOTSTRAP_DDR1 BIT(0) -+ - #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) - - #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) -@@ -533,6 +624,24 @@ - AR934X_PCIE_WMAC_INT_PCIE_RC1 | AR934X_PCIE_WMAC_INT_PCIE_RC2 | \ - AR934X_PCIE_WMAC_INT_PCIE_RC3) - -+#define QCA953X_PCIE_WMAC_INT_WMAC_MISC BIT(0) -+#define QCA953X_PCIE_WMAC_INT_WMAC_TX BIT(1) -+#define QCA953X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) -+#define QCA953X_PCIE_WMAC_INT_WMAC_RXHP BIT(3) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC BIT(4) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC0 BIT(5) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC1 BIT(6) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC2 BIT(7) -+#define QCA953X_PCIE_WMAC_INT_PCIE_RC3 BIT(8) -+#define QCA953X_PCIE_WMAC_INT_WMAC_ALL \ -+ (QCA953X_PCIE_WMAC_INT_WMAC_MISC | QCA953X_PCIE_WMAC_INT_WMAC_TX | \ -+ QCA953X_PCIE_WMAC_INT_WMAC_RXLP | QCA953X_PCIE_WMAC_INT_WMAC_RXHP) -+ -+#define QCA953X_PCIE_WMAC_INT_PCIE_ALL \ -+ (QCA953X_PCIE_WMAC_INT_PCIE_RC | QCA953X_PCIE_WMAC_INT_PCIE_RC0 | \ -+ QCA953X_PCIE_WMAC_INT_PCIE_RC1 | QCA953X_PCIE_WMAC_INT_PCIE_RC2 | \ -+ QCA953X_PCIE_WMAC_INT_PCIE_RC3) -+ - #define QCA955X_EXT_INT_WMAC_MISC BIT(0) - #define QCA955X_EXT_INT_WMAC_TX BIT(1) - #define QCA955X_EXT_INT_WMAC_RXLP BIT(2) -@@ -575,6 +684,8 @@ - #define REV_ID_MAJOR_AR9341 0x0120 - #define REV_ID_MAJOR_AR9342 0x1120 - #define REV_ID_MAJOR_AR9344 0x2120 -+#define REV_ID_MAJOR_QCA9533 0x0140 -+#define REV_ID_MAJOR_QCA9533_V2 0x0160 - #define REV_ID_MAJOR_QCA9556 0x0130 - #define REV_ID_MAJOR_QCA9558 0x1130 - -@@ -597,6 +708,8 @@ - - #define AR934X_REV_ID_REVISION_MASK 0xf - -+#define QCA953X_REV_ID_REVISION_MASK 0xf -+ - #define QCA955X_REV_ID_REVISION_MASK 0xf - - /* -@@ -644,6 +757,25 @@ - #define AR934X_GPIO_REG_OUT_FUNC5 0x40 - #define AR934X_GPIO_REG_FUNC 0x6c - -+#define QCA953X_GPIO_REG_OUT_FUNC0 0x2c -+#define QCA953X_GPIO_REG_OUT_FUNC1 0x30 -+#define QCA953X_GPIO_REG_OUT_FUNC2 0x34 -+#define QCA953X_GPIO_REG_OUT_FUNC3 0x38 -+#define QCA953X_GPIO_REG_OUT_FUNC4 0x3c -+#define QCA953X_GPIO_REG_IN_ENABLE0 0x44 -+#define QCA953X_GPIO_REG_FUNC 0x6c -+ -+#define QCA953X_GPIO_OUT_MUX_SPI_CS1 10 -+#define QCA953X_GPIO_OUT_MUX_SPI_CS2 11 -+#define QCA953X_GPIO_OUT_MUX_SPI_CS0 9 -+#define QCA953X_GPIO_OUT_MUX_SPI_CLK 8 -+#define QCA953X_GPIO_OUT_MUX_SPI_MOSI 12 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK1 41 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK2 42 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK3 43 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK4 44 -+#define QCA953X_GPIO_OUT_MUX_LED_LINK5 45 -+ - #define QCA955X_GPIO_REG_OUT_FUNC0 0x2c - #define QCA955X_GPIO_REG_OUT_FUNC1 0x30 - #define QCA955X_GPIO_REG_OUT_FUNC2 0x34 -@@ -658,6 +790,7 @@ - #define AR913X_GPIO_COUNT 22 - #define AR933X_GPIO_COUNT 30 - #define AR934X_GPIO_COUNT 23 -+#define QCA953X_GPIO_COUNT 18 - #define QCA955X_GPIO_COUNT 24 - - /* -@@ -681,6 +814,24 @@ - #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13 - #define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7 - -+#define QCA953X_SRIF_CPU_DPLL1_REG 0x1c0 -+#define QCA953X_SRIF_CPU_DPLL2_REG 0x1c4 -+#define QCA953X_SRIF_CPU_DPLL3_REG 0x1c8 -+ -+#define QCA953X_SRIF_DDR_DPLL1_REG 0x240 -+#define QCA953X_SRIF_DDR_DPLL2_REG 0x244 -+#define QCA953X_SRIF_DDR_DPLL3_REG 0x248 -+ -+#define QCA953X_SRIF_DPLL1_REFDIV_SHIFT 27 -+#define QCA953X_SRIF_DPLL1_REFDIV_MASK 0x1f -+#define QCA953X_SRIF_DPLL1_NINT_SHIFT 18 -+#define QCA953X_SRIF_DPLL1_NINT_MASK 0x1ff -+#define QCA953X_SRIF_DPLL1_NFRAC_MASK 0x0003ffff -+ -+#define QCA953X_SRIF_DPLL2_LOCAL_PLL BIT(30) -+#define QCA953X_SRIF_DPLL2_OUTDIV_SHIFT 13 -+#define QCA953X_SRIF_DPLL2_OUTDIV_MASK 0x7 -+ - #define AR71XX_GPIO_FUNC_STEREO_EN BIT(17) - #define AR71XX_GPIO_FUNC_SLIC_EN BIT(16) - #define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13) -@@ -887,6 +1038,16 @@ - #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 - - /* -+ * QCA953X GMAC Interface -+ */ -+#define QCA953X_GMAC_REG_ETH_CFG 0x00 -+ -+#define QCA953X_ETH_CFG_SW_ONLY_MODE BIT(6) -+#define QCA953X_ETH_CFG_SW_PHY_SWAP BIT(7) -+#define QCA953X_ETH_CFG_SW_APB_ACCESS BIT(9) -+#define QCA953X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) -+ -+/* - * QCA955X GMAC Interface - */ - ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -32,6 +32,7 @@ enum ath79_soc_type { - ATH79_SOC_AR9341, - ATH79_SOC_AR9342, - ATH79_SOC_AR9344, -+ ATH79_SOC_QCA9533, - ATH79_SOC_QCA9556, - ATH79_SOC_QCA9558, - }; -@@ -100,6 +101,16 @@ static inline int soc_is_ar934x(void) - return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); - } - -+static inline int soc_is_qca9533(void) -+{ -+ return ath79_soc == ATH79_SOC_QCA9533; -+} -+ -+static inline int soc_is_qca953x(void) -+{ -+ return soc_is_qca9533(); -+} -+ - static inline int soc_is_qca9556(void) - { - return ath79_soc == ATH79_SOC_QCA9556; diff --git a/target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch deleted file mode 100644 index a381851cc..000000000 --- a/target/linux/ar71xx/patches-4.4/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch +++ /dev/null @@ -1,717 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -125,6 +125,12 @@ config SOC_QCA955X - select PCI_AR724X if PCI - def_bool n - -+config SOC_QCA956X -+ select USB_ARCH_HAS_EHCI -+ select HW_HAS_PCI -+ select PCI_AR724X if PCI -+ def_bool n -+ - config ATH79_DEV_M25P80 - select ATH79_DEV_SPI - def_bool n -@@ -159,7 +165,7 @@ config ATH79_DEV_USB - def_bool n - - config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X) -+ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X || SOC_QCA956X) - def_bool n - - config ATH79_NVRAM ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -524,6 +524,100 @@ static void __init qca955x_clocks_init(v - clk_add_alias("uart", NULL, "ref", NULL); - } - -+static void __init qca956x_clocks_init(void) -+{ -+ unsigned long ref_rate; -+ unsigned long cpu_rate; -+ unsigned long ddr_rate; -+ unsigned long ahb_rate; -+ u32 pll, out_div, ref_div, nint, hfrac, lfrac, clk_ctrl, postdiv; -+ u32 cpu_pll, ddr_pll; -+ u32 bootstrap; -+ -+ bootstrap = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & QCA956X_BOOTSTRAP_REF_CLK_40) -+ ref_rate = 40 * 1000 * 1000; -+ else -+ ref_rate = 25 * 1000 * 1000; -+ -+ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG_REG); -+ out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG_REFDIV_MASK; -+ -+ pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG1_REG); -+ nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG1_NINT_MASK; -+ hfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK; -+ lfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT) & -+ QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK; -+ -+ cpu_pll = nint * ref_rate / ref_div; -+ cpu_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); -+ cpu_pll += (hfrac >> 13) * ref_rate / ref_div; -+ cpu_pll /= (1 << out_div); -+ -+ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG); -+ out_div = (pll >> QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK; -+ ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG_REFDIV_MASK; -+ pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG); -+ nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG1_NINT_MASK; -+ hfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK; -+ lfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT) & -+ QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK; -+ -+ ddr_pll = nint * ref_rate / ref_div; -+ ddr_pll += (lfrac * ref_rate) / ((ref_div * 25) << 13); -+ ddr_pll += (hfrac >> 13) * ref_rate / ref_div; -+ ddr_pll /= (1 << out_div); -+ -+ clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG); -+ -+ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & -+ QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS) -+ cpu_rate = ref_rate; -+ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL) -+ cpu_rate = ddr_pll / (postdiv + 1); -+ else -+ cpu_rate = cpu_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & -+ QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS) -+ ddr_rate = ref_rate; -+ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL) -+ ddr_rate = cpu_pll / (postdiv + 1); -+ else -+ ddr_rate = ddr_pll / (postdiv + 1); -+ -+ postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & -+ QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK; -+ -+ if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS) -+ ahb_rate = ref_rate; -+ else if (clk_ctrl & QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) -+ ahb_rate = ddr_pll / (postdiv + 1); -+ else -+ ahb_rate = cpu_pll / (postdiv + 1); -+ -+ ath79_add_sys_clkdev("ref", ref_rate); -+ ath79_add_sys_clkdev("cpu", cpu_rate); -+ ath79_add_sys_clkdev("ddr", ddr_rate); -+ ath79_add_sys_clkdev("ahb", ahb_rate); -+ -+ clk_add_alias("wdt", NULL, "ref", NULL); -+ clk_add_alias("uart", NULL, "ref", NULL); -+} -+ - void __init ath79_clocks_init(void) - { - if (soc_is_ar71xx()) -@@ -540,6 +634,8 @@ void __init ath79_clocks_init(void) - qca953x_clocks_init(); - else if (soc_is_qca955x()) - qca955x_clocks_init(); -+ else if (soc_is_qca956x() || soc_is_tp9343()) -+ qca956x_clocks_init(); - else - BUG(); - ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -107,6 +107,8 @@ void ath79_device_reset_set(u32 mask) - reg = QCA953X_RESET_REG_RESET_MODULE; - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca956x() || soc_is_tp9343()) -+ reg = QCA956X_RESET_REG_RESET_MODULE; - else - panic("Reset register not defined for this SOC"); - -@@ -137,6 +139,8 @@ void ath79_device_reset_clear(u32 mask) - reg = QCA953X_RESET_REG_RESET_MODULE; - else if (soc_is_qca955x()) - reg = QCA955X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca956x() || soc_is_tp9343()) -+ reg = QCA956X_RESET_REG_RESET_MODULE; - else - panic("Reset register not defined for this SOC"); - -@@ -163,6 +167,8 @@ u32 ath79_device_reset_get(u32 mask) - reg = AR933X_RESET_REG_RESET_MODULE; - else if (soc_is_ar934x()) - reg = AR934X_RESET_REG_RESET_MODULE; -+ else if (soc_is_qca956x() || soc_is_tp9343()) -+ reg = QCA956X_RESET_REG_RESET_MODULE; - else - BUG(); - ---- a/arch/mips/ath79/dev-common.c -+++ b/arch/mips/ath79/dev-common.c -@@ -95,7 +95,9 @@ void __init ath79_register_uart(void) - soc_is_ar913x() || - soc_is_ar934x() || - soc_is_qca953x() || -- soc_is_qca955x()) { -+ soc_is_qca955x() || -+ soc_is_qca956x() || -+ soc_is_tp9343()) { - ath79_uart_data[0].uartclk = uart_clk_rate; - platform_device_register(&ath79_uart_device); - } else if (soc_is_ar933x()) { -@@ -164,6 +166,9 @@ void __init ath79_gpio_init(void) - } else if (soc_is_qca955x()) { - ath79_gpio_pdata.ngpios = QCA955X_GPIO_COUNT; - ath79_gpio_pdata.oe_inverted = 1; -+ } else if (soc_is_qca956x() || soc_is_tp9343()) { -+ ath79_gpio_pdata.ngpios = QCA956X_GPIO_COUNT; -+ ath79_gpio_pdata.oe_inverted = 1; - } else { - BUG(); - } ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -296,6 +296,19 @@ static void __init qca955x_usb_setup(voi - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - -+static void __init qca956x_usb_setup(void) -+{ -+ ath79_usb_register("ehci-platform", 0, -+ QCA956X_EHCI0_BASE, QCA956X_EHCI_SIZE, -+ ATH79_IP3_IRQ(0), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ -+ ath79_usb_register("ehci-platform", 1, -+ QCA956X_EHCI1_BASE, QCA956X_EHCI_SIZE, -+ ATH79_IP3_IRQ(1), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+} -+ - void __init ath79_register_usb(void) - { - if (soc_is_ar71xx()) -@@ -314,6 +327,8 @@ void __init ath79_register_usb(void) - qca953x_usb_setup(); - else if (soc_is_qca955x()) - qca955x_usb_setup(); -+ else if (soc_is_qca956x()) -+ qca956x_usb_setup(); - else - BUG(); - } ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -200,6 +200,26 @@ static void qca955x_wmac_setup(void) - #define AR93XX_OTP_READ_DATA \ - (soc_is_ar934x() ? AR934X_OTP_READ_DATA : AR9300_OTP_READ_DATA) - -+static void qca956x_wmac_setup(void) -+{ -+ u32 t; -+ -+ ath79_wmac_device.name = "qca956x_wmac"; -+ -+ ath79_wmac_resources[0].start = QCA956X_WMAC_BASE; -+ ath79_wmac_resources[0].end = QCA956X_WMAC_BASE + QCA956X_WMAC_SIZE - 1; -+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); -+ ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); -+ -+ t = ath79_reset_rr(QCA956X_RESET_REG_BOOTSTRAP); -+ if (t & QCA956X_BOOTSTRAP_REF_CLK_40) -+ ath79_wmac_data.is_clk_25mhz = false; -+ else -+ ath79_wmac_data.is_clk_25mhz = true; -+ -+ ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; -+} -+ - static bool __init - ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) - { -@@ -403,6 +423,8 @@ void __init ath79_register_wmac(u8 *cal_ - qca953x_wmac_setup(); - else if (soc_is_qca955x()) - qca955x_wmac_setup(); -+ else if (soc_is_qca956x() || soc_is_tp9343()) -+ qca956x_wmac_setup(); - else - BUG(); - ---- a/arch/mips/ath79/early_printk.c -+++ b/arch/mips/ath79/early_printk.c -@@ -120,6 +120,8 @@ static void prom_putchar_init(void) - case REV_ID_MAJOR_QCA9533_V2: - case REV_ID_MAJOR_QCA9556: - case REV_ID_MAJOR_QCA9558: -+ case REV_ID_MAJOR_TP9343: -+ case REV_ID_MAJOR_QCA956X: - _prom_putchar = prom_putchar_ar71xx; - break; - ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -31,7 +31,10 @@ static void __iomem *ath79_gpio_get_func - soc_is_ar913x() || - soc_is_ar933x()) - reg = AR71XX_GPIO_REG_FUNC; -- else if (soc_is_ar934x() || soc_is_qca953x()) -+ else if (soc_is_ar934x() || -+ soc_is_qca953x() || -+ soc_is_qca956x() || -+ soc_is_tp9343()) - reg = AR934X_GPIO_REG_FUNC; - else - BUG(); -@@ -64,7 +67,7 @@ void __init ath79_gpio_output_select(uns - unsigned int reg; - u32 t, s; - -- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x()); -+ BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); - - if (gpio >= AR934X_GPIO_COUNT) - return; ---- a/arch/mips/ath79/irq.c -+++ b/arch/mips/ath79/irq.c -@@ -106,7 +106,9 @@ static void __init ath79_misc_irq_init(v - soc_is_ar933x() || - soc_is_ar934x() || - soc_is_qca953x() || -- soc_is_qca955x()) -+ soc_is_qca955x() || -+ soc_is_qca956x() || -+ soc_is_tp9343()) - ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack; - else - BUG(); -@@ -263,6 +265,87 @@ static unsigned irq_wb_chan[8] = { - -1, -1, -1, -1, -1, -1, -1, -1, - }; - -+static void qca956x_ip2_irq_dispatch(struct irq_desc *desc) -+{ -+ u32 status; -+ -+ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); -+ status &= QCA956X_EXT_INT_PCIE_RC1_ALL | QCA956X_EXT_INT_WMAC_ALL; -+ -+ if (status == 0) { -+ spurious_interrupt(); -+ return; -+ } -+ -+ if (status & QCA956X_EXT_INT_PCIE_RC1_ALL) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP2_IRQ(0)); -+ } -+ -+ if (status & QCA956X_EXT_INT_WMAC_ALL) { -+ /* TODO: flsuh DDR? */ -+ generic_handle_irq(ATH79_IP2_IRQ(1)); -+ } -+} -+ -+static void qca956x_ip3_irq_dispatch(struct irq_desc *desc) -+{ -+ u32 status; -+ -+ status = ath79_reset_rr(QCA956X_RESET_REG_EXT_INT_STATUS); -+ status &= QCA956X_EXT_INT_PCIE_RC2_ALL | -+ QCA956X_EXT_INT_USB1 | QCA956X_EXT_INT_USB2; -+ -+ if (status == 0) { -+ spurious_interrupt(); -+ return; -+ } -+ -+ if (status & QCA956X_EXT_INT_USB1) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(0)); -+ } -+ -+ if (status & QCA956X_EXT_INT_USB2) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(1)); -+ } -+ -+ if (status & QCA956X_EXT_INT_PCIE_RC2_ALL) { -+ /* TODO: flush DDR? */ -+ generic_handle_irq(ATH79_IP3_IRQ(2)); -+ } -+} -+ -+static void qca956x_enable_timer_cb(void) { -+ u32 misc; -+ -+ misc = ath79_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); -+ misc |= MISC_INT_MIPS_SI_TIMERINT_MASK; -+ ath79_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, misc); -+} -+ -+static void qca956x_irq_init(void) -+{ -+ int i; -+ -+ for (i = ATH79_IP2_IRQ_BASE; -+ i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch); -+ -+ for (i = ATH79_IP3_IRQ_BASE; -+ i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) -+ irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); -+ -+ irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); -+ -+ /* QCA956x timer init workaround has to be applied right before setting -+ * up the clock. Else, there will be no jiffies */ -+ late_time_init = &qca956x_enable_timer_cb; -+} -+ - asmlinkage void plat_irq_dispatch(void) - { - unsigned long pending; -@@ -404,4 +487,6 @@ void __init arch_init_irq(void) - qca953x_irq_init(); - else if (soc_is_qca955x()) - qca955x_irq_init(); -+ else if (soc_is_qca956x() || soc_is_tp9343()) -+ qca956x_irq_init(); - } ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -68,6 +68,21 @@ static const struct ath79_pci_irq qca955 - }, - }; - -+static const struct ath79_pci_irq qca956x_pci_irq_map[] __initconst = { -+ { -+ .bus = 0, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, -+ { -+ .bus = 1, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(1), -+ }, -+}; -+ - int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) - { - int irq = -1; -@@ -86,6 +101,9 @@ int __init pcibios_map_irq(const struct - } else if (soc_is_qca955x()) { - ath79_pci_irq_map = qca955x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); -+ } else if (soc_is_qca956x()) { -+ ath79_pci_irq_map = qca956x_pci_irq_map; -+ ath79_pci_nr_irqs = ARRAY_SIZE(qca956x_pci_irq_map); - } else { - pr_crit("pci %s: invalid irq map\n", - pci_name((struct pci_dev *) dev)); -@@ -303,6 +321,15 @@ int __init ath79_register_pci(void) - QCA955X_PCI_MEM_SIZE, - 1, - ATH79_IP3_IRQ(2)); -+ } else if (soc_is_qca956x()) { -+ pdev = ath79_register_pci_ar724x(0, -+ QCA956X_PCI_CFG_BASE1, -+ QCA956X_PCI_CTRL_BASE1, -+ QCA956X_PCI_CRP_BASE1, -+ QCA956X_PCI_MEM_BASE1, -+ QCA956X_PCI_MEM_SIZE, -+ 1, -+ ATH79_IP3_IRQ(2)); - } else { - /* No PCI support */ - return -ENODEV; ---- a/arch/mips/ath79/setup.c -+++ b/arch/mips/ath79/setup.c -@@ -180,6 +180,18 @@ static void __init ath79_detect_sys_type - rev = id & QCA955X_REV_ID_REVISION_MASK; - break; - -+ case REV_ID_MAJOR_QCA956X: -+ ath79_soc = ATH79_SOC_QCA956X; -+ chip = "956X"; -+ rev = id & QCA956X_REV_ID_REVISION_MASK; -+ break; -+ -+ case REV_ID_MAJOR_TP9343: -+ ath79_soc = ATH79_SOC_TP9343; -+ chip = "9343"; -+ rev = id & QCA956X_REV_ID_REVISION_MASK; -+ break; -+ - default: - panic("ath79: unknown SoC, id:0x%08x", id); - } -@@ -187,9 +199,12 @@ static void __init ath79_detect_sys_type - if (ver == 1) - ath79_soc_rev = rev; - -- if (soc_is_qca953x() || soc_is_qca955x()) -+ if (soc_is_qca953x() || soc_is_qca955x() || soc_is_qca956x()) - sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s ver %u rev %u", - chip, ver, rev); -+ else if (soc_is_tp9343()) -+ sprintf(ath79_sys_type, "Qualcomm Atheros TP%s rev %u", -+ chip, rev); - else - sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); - pr_info("SoC: %s\n", ath79_sys_type); ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -143,6 +143,23 @@ - #define QCA955X_NFC_BASE 0x1b800200 - #define QCA955X_NFC_SIZE 0xb8 - -+#define QCA956X_PCI_MEM_BASE1 0x12000000 -+#define QCA956X_PCI_MEM_SIZE 0x02000000 -+#define QCA956X_PCI_CFG_BASE1 0x16000000 -+#define QCA956X_PCI_CFG_SIZE 0x1000 -+#define QCA956X_PCI_CRP_BASE1 (AR71XX_APB_BASE + 0x00250000) -+#define QCA956X_PCI_CRP_SIZE 0x1000 -+#define QCA956X_PCI_CTRL_BASE1 (AR71XX_APB_BASE + 0x00280000) -+#define QCA956X_PCI_CTRL_SIZE 0x100 -+ -+#define QCA956X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) -+#define QCA956X_WMAC_SIZE 0x20000 -+#define QCA956X_EHCI0_BASE 0x1b000000 -+#define QCA956X_EHCI1_BASE 0x1b400000 -+#define QCA956X_EHCI_SIZE 0x200 -+#define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA956X_GMAC_SIZE 0x64 -+ - #define AR9300_OTP_BASE 0x14000 - #define AR9300_OTP_STATUS 0x15f18 - #define AR9300_OTP_STATUS_TYPE 0x7 -@@ -152,6 +169,13 @@ - #define AR9300_OTP_READ_DATA 0x15f1c - - /* -+ * Hidden Registers -+ */ -+#define QCA956X_DAM_RESET_OFFSET 0xb90001bc -+#define QCA956X_DAM_RESET_SIZE 0x4 -+#define QCA956X_INLINE_CHKSUM_ENG BIT(27) -+ -+/* - * DDR_CTRL block - */ - #define AR71XX_DDR_REG_PCI_WIN0 0x7c -@@ -385,6 +409,49 @@ - #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) - #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define QCA956X_PLL_CPU_CONFIG_REG 0x00 -+#define QCA956X_PLL_CPU_CONFIG1_REG 0x04 -+#define QCA956X_PLL_DDR_CONFIG_REG 0x08 -+#define QCA956X_PLL_DDR_CONFIG1_REG 0x0c -+#define QCA956X_PLL_CLK_CTRL_REG 0x10 -+ -+#define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 -+#define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -+#define QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT 19 -+#define QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_SHIFT 0 -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_L_MASK 0x1f -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT 5 -+#define QCA956X_PLL_CPU_CONFIG1_NFRAC_H_MASK 0x1fff -+#define QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT 18 -+#define QCA956X_PLL_CPU_CONFIG1_NINT_MASK 0x1ff -+ -+#define QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT 16 -+#define QCA956X_PLL_DDR_CONFIG_REFDIV_MASK 0x1f -+#define QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT 23 -+#define QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK 0x7 -+ -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_SHIFT 0 -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_L_MASK 0x1f -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT 5 -+#define QCA956X_PLL_DDR_CONFIG1_NFRAC_H_MASK 0x1fff -+#define QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT 18 -+#define QCA956X_PLL_DDR_CONFIG1_NINT_MASK 0x1ff -+ -+#define QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS BIT(2) -+#define QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS BIT(3) -+#define QCA956X_PLL_CLK_CTRL_AHB_PLL_BYPASS BIT(4) -+#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT 5 -+#define QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK 0x1f -+#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT 10 -+#define QCA956X_PLL_CLK_CTRL_DDR_POST_DIV_MASK 0x1f -+#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT 15 -+#define QCA956X_PLL_CLK_CTRL_AHB_POST_DIV_MASK 0x1f -+#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_DDRPLL BIT(20) -+#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) -+#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) -+ - /* - * USB_CONFIG block - */ -@@ -432,6 +499,11 @@ - #define QCA955X_RESET_REG_BOOTSTRAP 0xb0 - #define QCA955X_RESET_REG_EXT_INT_STATUS 0xac - -+#define QCA956X_RESET_REG_RESET_MODULE 0x1c -+#define QCA956X_RESET_REG_BOOTSTRAP 0xb0 -+#define QCA956X_RESET_REG_EXT_INT_STATUS 0xac -+ -+#define MISC_INT_MIPS_SI_TIMERINT_MASK BIT(28) - #define MISC_INT_ETHSW BIT(12) - #define MISC_INT_TIMER4 BIT(10) - #define MISC_INT_TIMER3 BIT(9) -@@ -606,6 +678,8 @@ - - #define QCA955X_BOOTSTRAP_REF_CLK_40 BIT(4) - -+#define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2) -+ - #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) - #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) - #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) -@@ -673,6 +747,37 @@ - QCA955X_EXT_INT_PCIE_RC2_INT1 | QCA955X_EXT_INT_PCIE_RC2_INT2 | \ - QCA955X_EXT_INT_PCIE_RC2_INT3) - -+#define QCA956X_EXT_INT_WMAC_MISC BIT(0) -+#define QCA956X_EXT_INT_WMAC_TX BIT(1) -+#define QCA956X_EXT_INT_WMAC_RXLP BIT(2) -+#define QCA956X_EXT_INT_WMAC_RXHP BIT(3) -+#define QCA956X_EXT_INT_PCIE_RC1 BIT(4) -+#define QCA956X_EXT_INT_PCIE_RC1_INT0 BIT(5) -+#define QCA956X_EXT_INT_PCIE_RC1_INT1 BIT(6) -+#define QCA956X_EXT_INT_PCIE_RC1_INT2 BIT(7) -+#define QCA956X_EXT_INT_PCIE_RC1_INT3 BIT(8) -+#define QCA956X_EXT_INT_PCIE_RC2 BIT(12) -+#define QCA956X_EXT_INT_PCIE_RC2_INT0 BIT(13) -+#define QCA956X_EXT_INT_PCIE_RC2_INT1 BIT(14) -+#define QCA956X_EXT_INT_PCIE_RC2_INT2 BIT(15) -+#define QCA956X_EXT_INT_PCIE_RC2_INT3 BIT(16) -+#define QCA956X_EXT_INT_USB1 BIT(24) -+#define QCA956X_EXT_INT_USB2 BIT(28) -+ -+#define QCA956X_EXT_INT_WMAC_ALL \ -+ (QCA956X_EXT_INT_WMAC_MISC | QCA956X_EXT_INT_WMAC_TX | \ -+ QCA956X_EXT_INT_WMAC_RXLP | QCA956X_EXT_INT_WMAC_RXHP) -+ -+#define QCA956X_EXT_INT_PCIE_RC1_ALL \ -+ (QCA956X_EXT_INT_PCIE_RC1 | QCA956X_EXT_INT_PCIE_RC1_INT0 | \ -+ QCA956X_EXT_INT_PCIE_RC1_INT1 | QCA956X_EXT_INT_PCIE_RC1_INT2 | \ -+ QCA956X_EXT_INT_PCIE_RC1_INT3) -+ -+#define QCA956X_EXT_INT_PCIE_RC2_ALL \ -+ (QCA956X_EXT_INT_PCIE_RC2 | QCA956X_EXT_INT_PCIE_RC2_INT0 | \ -+ QCA956X_EXT_INT_PCIE_RC2_INT1 | QCA956X_EXT_INT_PCIE_RC2_INT2 | \ -+ QCA956X_EXT_INT_PCIE_RC2_INT3) -+ - #define REV_ID_MAJOR_MASK 0xfff0 - #define REV_ID_MAJOR_AR71XX 0x00a0 - #define REV_ID_MAJOR_AR913X 0x00b0 -@@ -688,6 +793,8 @@ - #define REV_ID_MAJOR_QCA9533_V2 0x0160 - #define REV_ID_MAJOR_QCA9556 0x0130 - #define REV_ID_MAJOR_QCA9558 0x1130 -+#define REV_ID_MAJOR_TP9343 0x0150 -+#define REV_ID_MAJOR_QCA956X 0x1150 - - #define AR71XX_REV_ID_MINOR_MASK 0x3 - #define AR71XX_REV_ID_MINOR_AR7130 0x0 -@@ -712,6 +819,8 @@ - - #define QCA955X_REV_ID_REVISION_MASK 0xf - -+#define QCA956X_REV_ID_REVISION_MASK 0xf -+ - /* - * SPI block - */ -@@ -784,6 +893,19 @@ - #define QCA955X_GPIO_REG_OUT_FUNC5 0x40 - #define QCA955X_GPIO_REG_FUNC 0x6c - -+#define QCA956X_GPIO_REG_OUT_FUNC0 0x2c -+#define QCA956X_GPIO_REG_OUT_FUNC1 0x30 -+#define QCA956X_GPIO_REG_OUT_FUNC2 0x34 -+#define QCA956X_GPIO_REG_OUT_FUNC3 0x38 -+#define QCA956X_GPIO_REG_OUT_FUNC4 0x3c -+#define QCA956X_GPIO_REG_OUT_FUNC5 0x40 -+#define QCA956X_GPIO_REG_IN_ENABLE0 0x44 -+#define QCA956X_GPIO_REG_IN_ENABLE3 0x50 -+#define QCA956X_GPIO_REG_FUNC 0x6c -+ -+#define QCA956X_GPIO_OUT_MUX_GE0_MDO 32 -+#define QCA956X_GPIO_OUT_MUX_GE0_MDC 33 -+ - #define AR71XX_GPIO_COUNT 16 - #define AR7240_GPIO_COUNT 18 - #define AR7241_GPIO_COUNT 20 -@@ -792,6 +914,7 @@ - #define AR934X_GPIO_COUNT 23 - #define QCA953X_GPIO_COUNT 18 - #define QCA955X_GPIO_COUNT 24 -+#define QCA956X_GPIO_COUNT 23 - - /* - * SRIF block ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -35,6 +35,8 @@ enum ath79_soc_type { - ATH79_SOC_QCA9533, - ATH79_SOC_QCA9556, - ATH79_SOC_QCA9558, -+ ATH79_SOC_TP9343, -+ ATH79_SOC_QCA956X, - }; - - extern enum ath79_soc_type ath79_soc; -@@ -126,6 +128,26 @@ static inline int soc_is_qca955x(void) - return soc_is_qca9556() || soc_is_qca9558(); - } - -+static inline int soc_is_tp9343(void) -+{ -+ return ath79_soc == ATH79_SOC_TP9343; -+} -+ -+static inline int soc_is_qca9561(void) -+{ -+ return ath79_soc == ATH79_SOC_QCA956X; -+} -+ -+static inline int soc_is_qca9563(void) -+{ -+ return ath79_soc == ATH79_SOC_QCA956X; -+} -+ -+static inline int soc_is_qca956x(void) -+{ -+ return soc_is_qca9561() || soc_is_qca9563(); -+} -+ - void ath79_ddr_set_pci_windows(void); - - extern void __iomem *ath79_gpio_base; diff --git a/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch deleted file mode 100644 index cab2f6f9c..000000000 --- a/target/linux/ar71xx/patches-4.4/622-MIPS-ath79-add-more-register-defines-for-QCA956x-SoC.patch +++ /dev/null @@ -1,38 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -157,6 +157,10 @@ - #define QCA956X_EHCI0_BASE 0x1b000000 - #define QCA956X_EHCI1_BASE 0x1b400000 - #define QCA956X_EHCI_SIZE 0x200 -+#define QCA956X_GMAC_SGMII_BASE (AR71XX_APB_BASE + 0x00070000) -+#define QCA956X_GMAC_SGMII_SIZE 0x64 -+#define QCA956X_PLL_BASE (AR71XX_APB_BASE + 0x00050000) -+#define QCA956X_PLL_SIZE 0x50 - #define QCA956X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) - #define QCA956X_GMAC_SIZE 0x64 - -@@ -414,6 +418,7 @@ - #define QCA956X_PLL_DDR_CONFIG_REG 0x08 - #define QCA956X_PLL_DDR_CONFIG1_REG 0x0c - #define QCA956X_PLL_CLK_CTRL_REG 0x10 -+#define QCA956X_PLL_ETH_XMII_CONTROL_REG 0x30 - - #define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 - #define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f -@@ -1196,4 +1201,16 @@ - #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 - #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 - -+/* -+ * QCA956X GMAC Interface -+ */ -+ -+#define QCA956X_GMAC_REG_ETH_CFG 0x00 -+ -+#define QCA956X_ETH_CFG_SW_ONLY_MODE BIT(7) -+#define QCA956X_ETH_CFG_SW_PHY_SWAP BIT(8) -+#define QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(9) -+#define QCA956X_ETH_CFG_SW_APB_ACCESS BIT(10) -+#define QCA956X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) -+ - #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ar71xx/patches-4.4/630-MIPS-ath79-fix-chained-irq-disable.patch b/target/linux/ar71xx/patches-4.4/630-MIPS-ath79-fix-chained-irq-disable.patch deleted file mode 100644 index 63b91ddc0..000000000 --- a/target/linux/ar71xx/patches-4.4/630-MIPS-ath79-fix-chained-irq-disable.patch +++ /dev/null @@ -1,102 +0,0 @@ ---- a/arch/mips/ath79/irq.c -+++ b/arch/mips/ath79/irq.c -@@ -26,6 +26,9 @@ - #include "common.h" - #include "machtypes.h" - -+static struct irq_chip ip2_chip; -+static struct irq_chip ip3_chip; -+ - static void ath79_misc_irq_handler(struct irq_desc *desc) - { - void __iomem *base = ath79_reset_base; -@@ -145,8 +148,7 @@ static void ar934x_ip2_irq_init(void) - - for (i = ATH79_IP2_IRQ_BASE; - i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); - } -@@ -174,7 +176,7 @@ static void qca953x_irq_init(void) - - for (i = ATH79_IP2_IRQ_BASE; - i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(2), qca953x_ip2_irq_dispatch); - } -@@ -238,15 +240,13 @@ static void qca955x_irq_init(void) - - for (i = ATH79_IP2_IRQ_BASE; - i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch); - - for (i = ATH79_IP3_IRQ_BASE; - i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, -- handle_level_irq); -+ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); - } -@@ -331,13 +331,13 @@ static void qca956x_irq_init(void) - - for (i = ATH79_IP2_IRQ_BASE; - i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); -+ irq_set_chip_and_handler(i, &ip2_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(2), qca956x_ip2_irq_dispatch); - - for (i = ATH79_IP3_IRQ_BASE; - i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) -- irq_set_chip_and_handler(i, &dummy_irq_chip, handle_level_irq); -+ irq_set_chip_and_handler(i, &ip3_chip, handle_level_irq); - - irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch); - -@@ -463,8 +463,36 @@ IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar71 - - #endif - -+static void ath79_ip2_disable(struct irq_data *data) -+{ -+ disable_irq(ATH79_CPU_IRQ(2)); -+} -+ -+static void ath79_ip2_enable(struct irq_data *data) -+{ -+ enable_irq(ATH79_CPU_IRQ(2)); -+} -+ -+static void ath79_ip3_disable(struct irq_data *data) -+{ -+ disable_irq(ATH79_CPU_IRQ(3)); -+} -+ -+static void ath79_ip3_enable(struct irq_data *data) -+{ -+ enable_irq(ATH79_CPU_IRQ(3)); -+} -+ - void __init arch_init_irq(void) - { -+ ip2_chip = dummy_irq_chip; -+ ip2_chip.irq_disable = ath79_ip2_disable; -+ ip2_chip.irq_enable = ath79_ip2_enable; -+ -+ ip3_chip = dummy_irq_chip; -+ ip3_chip.irq_disable = ath79_ip3_disable; -+ ip3_chip.irq_enable = ath79_ip3_enable; -+ - if (mips_machtype == ATH79_MACH_GENERIC_OF) { - irqchip_init(); - return; diff --git a/target/linux/ar71xx/patches-4.4/631-MIPS-ath79-wmac-enable-set-led-pin.patch b/target/linux/ar71xx/patches-4.4/631-MIPS-ath79-wmac-enable-set-led-pin.patch deleted file mode 100644 index 29f7f3d0a..000000000 --- a/target/linux/ar71xx/patches-4.4/631-MIPS-ath79-wmac-enable-set-led-pin.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -411,6 +411,11 @@ void __init ath79_wmac_set_ext_lna_gpio( - ar934x_set_ext_lna_gpio(chain, gpio); - } - -+void __init ath79_wmac_set_led_pin(int gpio) -+{ -+ ath79_wmac_data.led_pin = gpio; -+} -+ - void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr) - { - if (soc_is_ar913x()) ---- a/arch/mips/ath79/dev-wmac.h -+++ b/arch/mips/ath79/dev-wmac.h -@@ -18,6 +18,7 @@ void ath79_wmac_disable_2ghz(void); - void ath79_wmac_disable_5ghz(void); - void ath79_wmac_set_tx_gain_buffalo(void); - void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio); -+void ath79_wmac_set_led_pin(int gpio); - - bool ar93xx_wmac_read_mac_address(u8 *dest); - diff --git a/target/linux/ar71xx/patches-4.4/632-MIPS-ath79-gpio-enable-set-direction.patch b/target/linux/ar71xx/patches-4.4/632-MIPS-ath79-gpio-enable-set-direction.patch deleted file mode 100644 index 0a6be7508..000000000 --- a/target/linux/ar71xx/patches-4.4/632-MIPS-ath79-gpio-enable-set-direction.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -29,6 +29,7 @@ void ath79_gpio_function_enable(u32 mask - void ath79_gpio_function_disable(u32 mask); - void ath79_gpio_function_setup(u32 set, u32 clear); - void ath79_gpio_output_select(unsigned gpio, u8 val); -+int ath79_gpio_direction_select(unsigned gpio, bool oe); - void ath79_gpio_init(void); - - #endif /* __ATH79_COMMON_H */ ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -83,3 +83,19 @@ void __init ath79_gpio_output_select(uns - /* flush write */ - (void) __raw_readl(base + reg); - } -+ -+int ath79_gpio_direction_select(unsigned gpio, bool oe) -+{ -+ void __iomem *base = ath79_gpio_base; -+ bool ieq_1 = (soc_is_ar934x() || -+ soc_is_qca953x()); -+ -+ if ((ieq_1 && oe) || (!ieq_1 && !oe)) -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio), -+ base + AR71XX_GPIO_REG_OE); -+ else -+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio), -+ base + AR71XX_GPIO_REG_OE); -+ -+ return 0; -+} diff --git a/target/linux/ar71xx/patches-4.4/634-MIPS-ath79-ar724x-clock-calculation-fixes.patch b/target/linux/ar71xx/patches-4.4/634-MIPS-ath79-ar724x-clock-calculation-fixes.patch deleted file mode 100644 index 90149ef18..000000000 --- a/target/linux/ar71xx/patches-4.4/634-MIPS-ath79-ar724x-clock-calculation-fixes.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -26,7 +26,7 @@ - #include "common.h" - - #define AR71XX_BASE_FREQ 40000000 --#define AR724X_BASE_FREQ 5000000 -+#define AR724X_BASE_FREQ 40000000 - #define AR913X_BASE_FREQ 5000000 - - static struct clk *clks[3]; -@@ -103,8 +103,8 @@ static void __init ar724x_clocks_init(vo - div = ((pll >> AR724X_PLL_FB_SHIFT) & AR724X_PLL_FB_MASK); - freq = div * ref_rate; - -- div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK); -- freq *= div; -+ div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK) * 2; -+ freq /= div; - - cpu_rate = freq; - diff --git a/target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch b/target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch deleted file mode 100644 index d7f4536ba..000000000 --- a/target/linux/ar71xx/patches-4.4/640-MIPS-ath79-add-QCA955x-wmac-reset.patch +++ /dev/null @@ -1,82 +0,0 @@ ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -38,7 +38,7 @@ unsigned int ath79_soc_rev; - void __iomem *ath79_pll_base; - void __iomem *ath79_reset_base; - EXPORT_SYMBOL_GPL(ath79_reset_base); --static void __iomem *ath79_ddr_base; -+void __iomem *ath79_ddr_base; - static void __iomem *ath79_ddr_wb_flush_base; - static void __iomem *ath79_ddr_pci_win_base; - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -32,7 +32,7 @@ - #define AR71XX_SPI_SIZE 0x01000000 - - #define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000) --#define AR71XX_DDR_CTRL_SIZE 0x100 -+#define AR71XX_DDR_CTRL_SIZE 0x200 - #define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000) - #define AR71XX_UART_SIZE 0x100 - #define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000) -@@ -229,6 +229,9 @@ - #define QCA953X_DDR_REG_FLUSH_PCIE 0xa8 - #define QCA953X_DDR_REG_FLUSH_WMAC 0xac - -+#define QCA955X_DDR_CTL_CONFIG 0x108 -+#define QCA955X_DDR_CTL_CONFIG_ACT_WMAC BIT(23) -+ - /* - * PLL block - */ ---- a/arch/mips/ath79/dev-wmac.c -+++ b/arch/mips/ath79/dev-wmac.c -@@ -170,6 +170,27 @@ static void qca953x_wmac_setup(void) - ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; - } - -+static int ar955x_wmac_reset(void) -+{ -+ int i; -+ -+ /* Try to wait for WMAC DDR activity to stop */ -+ for (i = 0; i < 10; i++) { -+ if (!(__raw_readl(ath79_ddr_base + QCA955X_DDR_CTL_CONFIG) & -+ QCA955X_DDR_CTL_CONFIG_ACT_WMAC)) -+ break; -+ -+ udelay(10); -+ } -+ -+ ath79_device_reset_set(QCA955X_RESET_RTC); -+ udelay(10); -+ ath79_device_reset_clear(QCA955X_RESET_RTC); -+ udelay(10); -+ -+ return 0; -+} -+ - static void qca955x_wmac_setup(void) - { - u32 t; -@@ -186,6 +207,8 @@ static void qca955x_wmac_setup(void) - ath79_wmac_data.is_clk_25mhz = false; - else - ath79_wmac_data.is_clk_25mhz = true; -+ -+ ath79_wmac_data.external_reset = ar955x_wmac_reset; - } - - #define AR93XX_WMAC_SIZE \ ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -19,6 +19,8 @@ - #define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024) - #define ATH79_MEM_SIZE_MAX (256 * 1024 * 1024) - -+extern void __iomem *ath79_ddr_base; -+ - void ath79_clocks_init(void); - unsigned long ath79_get_sys_clk_rate(const char *id); - diff --git a/target/linux/ar71xx/patches-4.4/700-MIPS-ath79-add-openwrt-Kconfig.patch b/target/linux/ar71xx/patches-4.4/700-MIPS-ath79-add-openwrt-Kconfig.patch deleted file mode 100644 index 23162053c..000000000 --- a/target/linux/ar71xx/patches-4.4/700-MIPS-ath79-add-openwrt-Kconfig.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -94,6 +94,8 @@ choice - select SOC_AR913X - endchoice - -+source "arch/mips/ath79/Kconfig.openwrt" -+ - endmenu - - config SOC_AR71XX diff --git a/target/linux/ar71xx/patches-4.4/701-MIPS-ath79-add-routerboard-detection.patch b/target/linux/ar71xx/patches-4.4/701-MIPS-ath79-add-routerboard-detection.patch deleted file mode 100644 index 1d9d761d7..000000000 --- a/target/linux/ar71xx/patches-4.4/701-MIPS-ath79-add-routerboard-detection.patch +++ /dev/null @@ -1,33 +0,0 @@ ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -136,6 +136,30 @@ void __init prom_init(void) - initrd_end = initrd_start + fw_getenvl("initrd_size"); - } - #endif -+ -+ if (strstr(arcs_cmdline, "board=750Gr3") || -+ strstr(arcs_cmdline, "board=750i") || -+ strstr(arcs_cmdline, "board=750-hb") || -+ strstr(arcs_cmdline, "board=411") || -+ strstr(arcs_cmdline, "board=433") || -+ strstr(arcs_cmdline, "board=435") || -+ strstr(arcs_cmdline, "board=450") || -+ strstr(arcs_cmdline, "board=493") || -+ strstr(arcs_cmdline, "board=951G") || -+ strstr(arcs_cmdline, "board=H951L") || -+ strstr(arcs_cmdline, "board=952-hb") || -+ strstr(arcs_cmdline, "board=953gs") || -+ strstr(arcs_cmdline, "board=962") || -+ strstr(arcs_cmdline, "board=lhg") || -+ strstr(arcs_cmdline, "board=map-hb") || -+ strstr(arcs_cmdline, "board=map2-hb") || -+ strstr(arcs_cmdline, "board=wap-hb") || -+ strstr(arcs_cmdline, "board=wapg-sc") || -+ strstr(arcs_cmdline, "board=2011L") || -+ strstr(arcs_cmdline, "board=2011r") || -+ strstr(arcs_cmdline, "board=711Gr100") || -+ strstr(arcs_cmdline, "board=922gs")) -+ ath79_prom_append_cmdline("console", "ttyS0,115200"); - } - - void __init prom_free_prom_memory(void) diff --git a/target/linux/ar71xx/patches-4.4/702-MIPS-ath79-fixup-routerboot-board-parameter.patch b/target/linux/ar71xx/patches-4.4/702-MIPS-ath79-fixup-routerboot-board-parameter.patch deleted file mode 100644 index b8715bba9..000000000 --- a/target/linux/ar71xx/patches-4.4/702-MIPS-ath79-fixup-routerboot-board-parameter.patch +++ /dev/null @@ -1,43 +0,0 @@ -From: Gabor Juhos -Date: Sat, 2 Dec 2017 19:15:29 +0100 -Subject: [PATCH] MIPS: ath79: fix board detection with newer RouterBOOT versions - -Recent RouterBOOT version (at least version 3.41 on RB911G-5HPacD) -use "Board=" kernel parameter instead of "board=" to pass the board -name to the kernel. Due to this change the board detection code is -not working on the devices shipped with the new RouterBOOT version. -Because the kernel is unable to identify these boards they become -unusable despite that they are supported by the current code. - -Update the prom_init code to convert the 'Board' kernel parameter to -'board'. After this change, the board detection works also with the -new RouterBOOT versions. - -Signed-off-by: Gabor Juhos ---- ---- a/arch/mips/ath79/prom.c -+++ b/arch/mips/ath79/prom.c -@@ -104,6 +104,7 @@ static int __init ath79_prom_init_myload - void __init prom_init(void) - { - const char *env; -+ char *c; - - if (ath79_prom_init_myloader()) - return; -@@ -137,6 +138,15 @@ void __init prom_init(void) - } - #endif - -+ /* -+ * RouterBOOT uses "Board" kernel parameter instead of "board" since -+ * version 3.41 (or so). Replace the first character of the parameter -+ * to keep board detection working. -+ */ -+ c = strstr(arcs_cmdline, "Board="); -+ if (c) -+ c[0] = 'b'; -+ - if (strstr(arcs_cmdline, "board=750Gr3") || - strstr(arcs_cmdline, "board=750i") || - strstr(arcs_cmdline, "board=750-hb") || diff --git a/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch deleted file mode 100644 index a65f7d993..000000000 --- a/target/linux/ar71xx/patches-4.4/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch +++ /dev/null @@ -1,38 +0,0 @@ ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -33,6 +33,7 @@ static void __iomem *ath79_gpio_get_func - reg = AR71XX_GPIO_REG_FUNC; - else if (soc_is_ar934x() || - soc_is_qca953x() || -+ soc_is_qca955x() || - soc_is_qca956x() || - soc_is_tp9343()) - reg = AR934X_GPIO_REG_FUNC; -@@ -64,15 +65,21 @@ void ath79_gpio_function_disable(u32 mas - void __init ath79_gpio_output_select(unsigned gpio, u8 val) - { - void __iomem *base = ath79_gpio_base; -- unsigned int reg; -+ unsigned int reg, reg_base; - u32 t, s; - -- BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x()); -- -- if (gpio >= AR934X_GPIO_COUNT) -- return; -+ if (soc_is_ar934x()) -+ reg_base = AR934X_GPIO_REG_OUT_FUNC0; -+ else if (soc_is_qca953x()) -+ reg_base = QCA953X_GPIO_REG_OUT_FUNC0; -+ else if (soc_is_qca955x()) -+ reg_base = QCA955X_GPIO_REG_OUT_FUNC0; -+ else if (soc_is_qca956x()) -+ reg_base = QCA956X_GPIO_REG_OUT_FUNC0; -+ else -+ BUG(); - -- reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4); -+ reg = reg_base + 4 * (gpio / 4); - s = 8 * (gpio % 4); - - t = __raw_readl(base + reg); diff --git a/target/linux/ar71xx/patches-4.4/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.4/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch deleted file mode 100644 index a57351efd..000000000 --- a/target/linux/ar71xx/patches-4.4/740-MIPS-ath79-add-PCI-for-QCA953x-SoC.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -53,6 +53,15 @@ static const struct ath79_pci_irq ar724x - } - }; - -+static const struct ath79_pci_irq qca953x_pci_irq_map[] __initconst = { -+ { -+ .bus = 0, -+ .slot = 0, -+ .pin = 1, -+ .irq = ATH79_PCI_IRQ(0), -+ }, -+}; -+ - static const struct ath79_pci_irq qca955x_pci_irq_map[] __initconst = { - { - .bus = 0, -@@ -98,6 +107,9 @@ int __init pcibios_map_irq(const struct - soc_is_ar9344()) { - ath79_pci_irq_map = ar724x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); -+ } else if (soc_is_qca953x()) { -+ ath79_pci_irq_map = qca953x_pci_irq_map; -+ ath79_pci_nr_irqs = ARRAY_SIZE(qca953x_pci_irq_map); - } else if (soc_is_qca955x()) { - ath79_pci_irq_map = qca955x_pci_irq_map; - ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); -@@ -303,6 +315,15 @@ int __init ath79_register_pci(void) - AR724X_PCI_MEM_SIZE, - 0, - ATH79_IP2_IRQ(0)); -+ } else if (soc_is_qca9533()) { -+ pdev = ath79_register_pci_ar724x(0, -+ QCA953X_PCI_CFG_BASE0, -+ QCA953X_PCI_CTRL_BASE0, -+ QCA953X_PCI_CRP_BASE0, -+ QCA953X_PCI_MEM_BASE0, -+ QCA953X_PCI_MEM_SIZE, -+ 0, -+ ATH79_IP2_IRQ(0)); - } else if (soc_is_qca9558()) { - pdev = ath79_register_pci_ar724x(0, - QCA955X_PCI_CFG_BASE0, diff --git a/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch b/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch deleted file mode 100644 index 3a6438ee8..000000000 --- a/target/linux/ar71xx/patches-4.4/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/arch/mips/ath79/pci.c -+++ b/arch/mips/ath79/pci.c -@@ -324,7 +324,8 @@ int __init ath79_register_pci(void) - QCA953X_PCI_MEM_SIZE, - 0, - ATH79_IP2_IRQ(0)); -- } else if (soc_is_qca9558()) { -+ } else if (soc_is_qca9558() || -+ soc_is_qca9556()) { - pdev = ath79_register_pci_ar724x(0, - QCA955X_PCI_CFG_BASE0, - QCA955X_PCI_CTRL_BASE0, diff --git a/target/linux/ar71xx/patches-4.4/818-MIPS-ath79-add-nu801-led-driver.patch b/target/linux/ar71xx/patches-4.4/818-MIPS-ath79-add-nu801-led-driver.patch deleted file mode 100644 index 420bbff18..000000000 --- a/target/linux/ar71xx/patches-4.4/818-MIPS-ath79-add-nu801-led-driver.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -568,6 +568,13 @@ config LEDS_SEAD3 - - comment "LED driver for blink(1) USB RGB LED is under Special HID drivers (HID_THINGM)" - -+config LEDS_NU801 -+ tristate "LED driver for NU801 RGB LED" -+ depends on LEDS_CLASS && (ATH79_MACH_MR18 || ATH79_MACH_Z1) -+ help -+ This option enables support for NU801 RGB LED driver chips -+ accessed via GPIO. -+ - config LEDS_BLINKM - tristate "LED support for the BlinkM I2C RGB LED" - depends on LEDS_CLASS ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -55,6 +55,7 @@ obj-$(CONFIG_LEDS_ADP5520) += leds-adp5 - obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o - obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o - obj-$(CONFIG_LEDS_RB750) += leds-rb750.o -+obj-$(CONFIG_LEDS_NU801) += leds-nu801.o - obj-$(CONFIG_LEDS_NS2) += leds-ns2.o - obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o - obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o diff --git a/target/linux/ar71xx/patches-4.4/820-MIPS-ath79-add_gpio_function2_setup.patch b/target/linux/ar71xx/patches-4.4/820-MIPS-ath79-add_gpio_function2_setup.patch deleted file mode 100644 index a773e57de..000000000 --- a/target/linux/ar71xx/patches-4.4/820-MIPS-ath79-add_gpio_function2_setup.patch +++ /dev/null @@ -1,67 +0,0 @@ -Add access to the function2 gpio register. This probably has to be -converted into a pimux driver later on. This is needed for some setup -functions on the Arduino Yun. - ---- a/arch/mips/ath79/common.h -+++ b/arch/mips/ath79/common.h -@@ -30,6 +30,7 @@ void ath79_ddr_wb_flush(unsigned int reg - void ath79_gpio_function_enable(u32 mask); - void ath79_gpio_function_disable(u32 mask); - void ath79_gpio_function_setup(u32 set, u32 clear); -+void ath79_gpio_function2_setup(u32 set, u32 clear); - void ath79_gpio_output_select(unsigned gpio, u8 val); - int ath79_gpio_direction_select(unsigned gpio, bool oe); - void ath79_gpio_init(void); ---- a/arch/mips/ath79/gpio.c -+++ b/arch/mips/ath79/gpio.c -@@ -43,6 +43,31 @@ static void __iomem *ath79_gpio_get_func - return ath79_gpio_base + reg; - } - -+static void __iomem *ath79_gpio_get_function2_reg(void) -+{ -+ u32 reg = 0; -+ -+ if (soc_is_ar71xx() || -+ soc_is_ar724x() || -+ soc_is_ar913x() || -+ soc_is_ar933x()) -+ reg = AR71XX_GPIO_REG_FUNC_2; -+ else -+ BUG(); -+ -+ return ath79_gpio_base + reg; -+} -+ -+ -+void ath79_gpio_function2_setup(u32 set, u32 clear) -+{ -+ void __iomem *reg = ath79_gpio_get_function2_reg(); -+ -+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg); -+ /* flush write */ -+ __raw_readl(reg); -+} -+ - void ath79_gpio_function_setup(u32 set, u32 clear) - { - void __iomem *reg = ath79_gpio_get_function_reg(); ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -865,6 +865,7 @@ - #define AR71XX_GPIO_REG_INT_PENDING 0x20 - #define AR71XX_GPIO_REG_INT_ENABLE 0x24 - #define AR71XX_GPIO_REG_FUNC 0x28 -+#define AR71XX_GPIO_REG_FUNC_2 0x30 - - #define AR934X_GPIO_REG_OUT_FUNC0 0x2c - #define AR934X_GPIO_REG_OUT_FUNC1 0x30 -@@ -989,6 +990,8 @@ - #define AR724X_GPIO_FUNC_UART_EN BIT(1) - #define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0) - -+#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9) -+ - #define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22) - #define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21) - #define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20) diff --git a/target/linux/ar71xx/patches-4.4/821-serial-core-add-support-for-boot-console-with-arbitr.patch b/target/linux/ar71xx/patches-4.4/821-serial-core-add-support-for-boot-console-with-arbitr.patch deleted file mode 100644 index 9d6e7bca0..000000000 --- a/target/linux/ar71xx/patches-4.4/821-serial-core-add-support-for-boot-console-with-arbitr.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 4d3c17975c7814884a721fe693b3adf5c426d759 Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Tue, 10 Nov 2015 22:18:39 +0100 -Subject: [RFC] serial: core: add support for boot console with arbitrary - baud rates - -The Arduino Yun uses a baud rate of 250000 by default. The serial is -going over the Atmel ATmega and is used to connect to this chip. -Without this patch Linux wants to switch the console to 230400 Baud. - -With this patch Linux will use the configured baud rate and not some -standard one which is near by. - -Signed-off-by: Hauke Mehrtens ---- - drivers/tty/serial/serial_core.c | 13 ++++++++++--- - include/linux/console.h | 1 + - 2 files changed, 11 insertions(+), 3 deletions(-) - ---- a/drivers/tty/serial/serial_core.c -+++ b/drivers/tty/serial/serial_core.c -@@ -164,6 +164,8 @@ static int uart_port_startup(struct tty_ - if (retval == 0) { - if (uart_console(uport) && uport->cons->cflag) { - tty->termios.c_cflag = uport->cons->cflag; -+ tty->termios.c_ospeed = uport->cons->baud; -+ tty->termios.c_ispeed = uport->cons->baud; - uport->cons->cflag = 0; - } - /* -@@ -1909,7 +1911,7 @@ static const struct baud_rates baud_rate - { 4800, B4800 }, - { 2400, B2400 }, - { 1200, B1200 }, -- { 0, B38400 } -+ { 0, BOTHER } - }; - - /** -@@ -1948,10 +1950,13 @@ uart_set_options(struct uart_port *port, - * Construct a cflag setting. - */ - for (i = 0; baud_rates[i].rate; i++) -- if (baud_rates[i].rate <= baud) -+ if (baud_rates[i].rate == baud) - break; - - termios.c_cflag |= baud_rates[i].cflag; -+ if (!baud_rates[i].rate) { -+ termios.c_ospeed = baud; -+ } - - if (bits == 7) - termios.c_cflag |= CS7; -@@ -1981,8 +1986,10 @@ uart_set_options(struct uart_port *port, - * Allow the setting of the UART parameters with a NULL console - * too: - */ -- if (co) -+ if (co) { - co->cflag = termios.c_cflag; -+ co->baud = baud; -+ } - - return 0; - } ---- a/include/linux/console.h -+++ b/include/linux/console.h -@@ -128,6 +128,7 @@ struct console { - short flags; - short index; - int cflag; -+ int baud; - void *data; - struct console *next; - }; diff --git a/target/linux/ar71xx/patches-4.4/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ar71xx/patches-4.4/900-mdio_bitbang_ignore_ta_value.patch deleted file mode 100644 index 8f8f349a6..000000000 --- a/target/linux/ar71xx/patches-4.4/900-mdio_bitbang_ignore_ta_value.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/drivers/net/phy/mdio-bitbang.c -+++ b/drivers/net/phy/mdio-bitbang.c -@@ -155,7 +155,7 @@ static int mdiobb_cmd_addr(struct mdiobb - static int mdiobb_read(struct mii_bus *bus, int phy, int reg) - { - struct mdiobb_ctrl *ctrl = bus->priv; -- int ret, i; -+ int ret; - - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); -@@ -165,19 +165,7 @@ static int mdiobb_read(struct mii_bus *b - - ctrl->ops->set_mdio_dir(ctrl, 0); - -- /* check the turnaround bit: the PHY should be driving it to zero, if this -- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that -- */ -- if (mdiobb_get_bit(ctrl) != 0 && -- !(bus->phy_ignore_ta_mask & (1 << phy))) { -- /* PHY didn't drive TA low -- flush any bits it -- * may be trying to send. -- */ -- for (i = 0; i < 32; i++) -- mdiobb_get_bit(ctrl); -- -- return 0xffff; -- } -+ mdiobb_get_bit(ctrl); - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); diff --git a/target/linux/ar71xx/patches-4.4/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ar71xx/patches-4.4/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch deleted file mode 100644 index a830346a3..000000000 --- a/target/linux/ar71xx/patches-4.4/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Tue, 16 Jun 2015 13:15:08 +0200 -Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command - -It seems some phys have some maximum timings for accessing the MDIO line, -resulting in bit errors under cpu stress. Prevent this from happening by -disabling interrupts when sending commands. - -Signed-off-by: Jonas Gorski ---- - drivers/net/phy/mdio-bitbang.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/drivers/net/phy/mdio-bitbang.c -+++ b/drivers/net/phy/mdio-bitbang.c -@@ -17,6 +17,7 @@ - * kind, whether express or implied. - */ - -+#include - #include - #include - #include -@@ -156,7 +157,9 @@ static int mdiobb_read(struct mii_bus *b - { - struct mdiobb_ctrl *ctrl = bus->priv; - int ret; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); -@@ -169,13 +172,17 @@ static int mdiobb_read(struct mii_bus *b - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return ret; - } - - static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) - { - struct mdiobb_ctrl *ctrl = bus->priv; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); -@@ -190,6 +197,8 @@ static int mdiobb_write(struct mii_bus * - - ctrl->ops->set_mdio_dir(ctrl, 0); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return 0; - } - diff --git a/target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch b/target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch deleted file mode 100644 index efc8502bc..000000000 --- a/target/linux/ar71xx/patches-4.4/902-at803x-add-reset-gpio-pdata.patch +++ /dev/null @@ -1,68 +0,0 @@ -Add support for configuring AT803x GPIO reset via platform data. -This is necessary, because ath79 is not converted to device tree yet. - -Signed-off-by: Felix Fietkau - ---- a/include/linux/platform_data/phy-at803x.h -+++ b/include/linux/platform_data/phy-at803x.h -@@ -6,6 +6,8 @@ struct at803x_platform_data { - int enable_rgmii_tx_delay:1; - int enable_rgmii_rx_delay:1; - int fixup_rgmii_tx_delay:1; -+ int has_reset_gpio:1; -+ int reset_gpio; - }; - - #endif /* _PHY_AT803X_PDATA_H */ ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -243,6 +243,7 @@ static int at803x_resume(struct phy_devi - - static int at803x_probe(struct phy_device *phydev) - { -+ struct at803x_platform_data *pdata; - struct device *dev = &phydev->dev; - struct at803x_priv *priv; - struct gpio_desc *gpiod_reset; -@@ -255,6 +256,12 @@ static int at803x_probe(struct phy_devic - phydev->drv->phy_id != ATH8032_PHY_ID) - goto does_not_require_reset_workaround; - -+ pdata = dev_get_platdata(&phydev->dev); -+ if (pdata && pdata->has_reset_gpio) { -+ devm_gpio_request(dev, pdata->reset_gpio, "reset"); -+ gpio_direction_output(pdata->reset_gpio, 1); -+ } -+ - gpiod_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(gpiod_reset)) - return PTR_ERR(gpiod_reset); -@@ -377,15 +384,23 @@ static void at803x_link_change_notify(st - * cannot recover from by software. - */ - if (phydev->state == PHY_NOLINK) { -- if (priv->gpiod_reset && !priv->phy_reset) { -+ if ((priv->gpiod_reset || (pdata && pdata->has_reset_gpio)) && -+ !priv->phy_reset) { - struct at803x_context context; - - at803x_context_save(phydev, &context); - -- gpiod_set_value(priv->gpiod_reset, 1); -- msleep(1); -- gpiod_set_value(priv->gpiod_reset, 0); -- msleep(1); -+ if (pdata && pdata->has_reset_gpio) { -+ gpio_set_value_cansleep(pdata->reset_gpio, 0); -+ msleep(1); -+ gpio_set_value_cansleep(pdata->reset_gpio, 1); -+ msleep(1); -+ } else { -+ gpiod_set_value(priv->gpiod_reset, 1); -+ msleep(1); -+ gpiod_set_value(priv->gpiod_reset, 0); -+ msleep(1); -+ } - - at803x_context_restore(phydev, &context); - diff --git a/target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch b/target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch deleted file mode 100644 index a8d8c15c3..000000000 --- a/target/linux/ar71xx/patches-4.4/910-unaligned_access_hacks.patch +++ /dev/null @@ -1,931 +0,0 @@ ---- a/arch/mips/include/asm/checksum.h -+++ b/arch/mips/include/asm/checksum.h -@@ -134,26 +134,30 @@ static inline __sum16 ip_fast_csum(const - const unsigned int *stop = word + ihl; - unsigned int csum; - int carry; -+ unsigned int w; - -- csum = word[0]; -- csum += word[1]; -- carry = (csum < word[1]); -+ csum = net_hdr_word(word++); -+ -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[2]; -- carry = (csum < word[2]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[3]; -- carry = (csum < word[3]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- word += 4; - do { -- csum += *word; -- carry = (csum < *word); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; -- word++; - } while (word != stop); - - return csum_fold(csum); -@@ -214,73 +218,6 @@ static inline __sum16 ip_compute_csum(co - return csum_fold(csum_partial(buff, len, 0)); - } - --#define _HAVE_ARCH_IPV6_CSUM --static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, -- const struct in6_addr *daddr, -- __u32 len, unsigned short proto, -- __wsum sum) --{ -- __wsum tmp; -- -- __asm__( -- " .set push # csum_ipv6_magic\n" -- " .set noreorder \n" -- " .set noat \n" -- " addu %0, %5 # proto (long in network byte order)\n" -- " sltu $1, %0, %5 \n" -- " addu %0, $1 \n" -- -- " addu %0, %6 # csum\n" -- " sltu $1, %0, %6 \n" -- " lw %1, 0(%2) # four words source address\n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 0(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " addu %0, $1 # Add final carry\n" -- " .set pop" -- : "=&r" (sum), "=&r" (tmp) -- : "r" (saddr), "r" (daddr), -- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); -- -- return csum_fold(sum); --} -- - #include - #endif /* CONFIG_GENERIC_CSUM */ - ---- a/include/uapi/linux/ip.h -+++ b/include/uapi/linux/ip.h -@@ -102,7 +102,7 @@ struct iphdr { - __be32 saddr; - __be32 daddr; - /*The options start here. */ --}; -+} __attribute__((packed, aligned(2))); - - - struct ip_auth_hdr { ---- a/include/uapi/linux/ipv6.h -+++ b/include/uapi/linux/ipv6.h -@@ -129,7 +129,7 @@ struct ipv6hdr { - - struct in6_addr saddr; - struct in6_addr daddr; --}; -+} __attribute__((packed, aligned(2))); - - - /* index values for the variables in ipv6_devconf */ ---- a/include/uapi/linux/tcp.h -+++ b/include/uapi/linux/tcp.h -@@ -54,7 +54,7 @@ struct tcphdr { - __be16 window; - __sum16 check; - __be16 urg_ptr; --}; -+} __attribute__((packed, aligned(2))); - - /* - * The union cast uses a gcc extension to avoid aliasing problems -@@ -64,7 +64,7 @@ struct tcphdr { - union tcp_word_hdr { - struct tcphdr hdr; - __be32 words[5]; --}; -+} __attribute__((packed, aligned(2))); - - #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) - ---- a/include/uapi/linux/udp.h -+++ b/include/uapi/linux/udp.h -@@ -24,7 +24,7 @@ struct udphdr { - __be16 dest; - __be16 len; - __sum16 check; --}; -+} __attribute__((packed, aligned(2))); - - /* UDP socket options */ - #define UDP_CORK 1 /* Never send partially complete segments */ ---- a/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c -+++ b/net/ipv4/netfilter/nf_conntrack_l3proto_ipv4.c -@@ -41,8 +41,8 @@ static bool ipv4_pkt_to_tuple(const stru - if (ap == NULL) - return false; - -- tuple->src.u3.ip = ap[0]; -- tuple->dst.u3.ip = ap[1]; -+ tuple->src.u3.ip = net_hdr_word(ap++); -+ tuple->dst.u3.ip = net_hdr_word(ap); - - return true; - } ---- a/include/uapi/linux/icmp.h -+++ b/include/uapi/linux/icmp.h -@@ -80,7 +80,7 @@ struct icmphdr { - __be16 mtu; - } frag; - } un; --}; -+} __attribute__((packed, aligned(2))); - - - /* ---- a/include/uapi/linux/in6.h -+++ b/include/uapi/linux/in6.h -@@ -42,7 +42,7 @@ struct in6_addr { - #define s6_addr16 in6_u.u6_addr16 - #define s6_addr32 in6_u.u6_addr32 - #endif --}; -+} __attribute__((packed, aligned(2))); - #endif /* __UAPI_DEF_IN6_ADDR */ - - #if __UAPI_DEF_SOCKADDR_IN6 ---- a/net/ipv6/tcp_ipv6.c -+++ b/net/ipv6/tcp_ipv6.c -@@ -39,6 +39,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -786,10 +787,10 @@ static void tcp_v6_send_response(const s - topt = (__be32 *)(t1 + 1); - - if (tsecr) { -- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); -- *topt++ = htonl(tsval); -- *topt++ = htonl(tsecr); -+ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); -+ put_unaligned_be32(tsval, topt++); -+ put_unaligned_be32(tsecr, topt++); - } - - #ifdef CONFIG_TCP_MD5SIG ---- a/include/linux/ipv6.h -+++ b/include/linux/ipv6.h -@@ -5,6 +5,7 @@ - - #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) - #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) -+ - /* - * This structure contains configuration options per IPv6 link. - */ ---- a/net/ipv6/datagram.c -+++ b/net/ipv6/datagram.c -@@ -433,7 +433,7 @@ int ipv6_recv_error(struct sock *sk, str - ipv6_iface_scope_id(&sin->sin6_addr, - IP6CB(skb)->iif); - } else { -- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), -+ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), - &sin->sin6_addr); - sin->sin6_scope_id = 0; - } -@@ -770,12 +770,12 @@ int ip6_datagram_send_ctl(struct net *ne - } - - if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { -- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { -+ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { - err = -EINVAL; - goto exit_f; - } - } -- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); -+ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); - break; - - case IPV6_2292HOPOPTS: ---- a/net/ipv6/ip6_gre.c -+++ b/net/ipv6/ip6_gre.c -@@ -395,7 +395,7 @@ static void ip6gre_err(struct sk_buff *s - return; - ipv6h = (const struct ipv6hdr *)skb->data; - greh = (const struct gre_base_hdr *)(skb->data + offset); -- key = key_off ? *(__be32 *)(skb->data + key_off) : 0; -+ key = key_off ? net_hdr_word((__be32 *)(skb->data + key_off)) : 0; - - t = ip6gre_tunnel_lookup(skb->dev, &ipv6h->daddr, &ipv6h->saddr, - key, greh->protocol); -@@ -482,11 +482,11 @@ static int ip6gre_rcv(struct sk_buff *sk - offset += 4; - } - if (flags&GRE_KEY) { -- key = *(__be32 *)(h + offset); -+ key = net_hdr_word(h + offset); - offset += 4; - } - if (flags&GRE_SEQ) { -- seqno = ntohl(*(__be32 *)(h + offset)); -+ seqno = ntohl(net_hdr_word(h + offset)); - offset += 4; - } - } -@@ -748,7 +748,7 @@ static netdev_tx_t ip6gre_xmit2(struct s - - if (tunnel->parms.o_flags&GRE_SEQ) { - ++tunnel->o_seqno; -- *ptr = htonl(tunnel->o_seqno); -+ net_hdr_word(ptr) = htonl(tunnel->o_seqno); - ptr--; - } - if (tunnel->parms.o_flags&GRE_KEY) { -@@ -844,7 +844,7 @@ static inline int ip6gre_xmit_ipv6(struc - - dsfield = ipv6_get_dsfield(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) -- fl6.flowlabel |= (*(__be32 *) ipv6h & IPV6_TCLASS_MASK); -+ fl6.flowlabel |= net_hdr_word(ipv6h) & IPV6_TCLASS_MASK; - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FLOWLABEL) - fl6.flowlabel |= ip6_flowlabel(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) ---- a/net/ipv6/ip6_tunnel.c -+++ b/net/ipv6/ip6_tunnel.c -@@ -1410,7 +1410,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str - - dsfield = ipv6_get_dsfield(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_TCLASS) -- fl6.flowlabel |= (*(__be32 *) ipv6h & IPV6_TCLASS_MASK); -+ fl6.flowlabel |= net_hdr_word(ipv6h) & IPV6_TCLASS_MASK; - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FLOWLABEL) - fl6.flowlabel |= ip6_flowlabel(ipv6h); - if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) ---- a/net/ipv6/exthdrs.c -+++ b/net/ipv6/exthdrs.c -@@ -573,7 +573,7 @@ static bool ipv6_hop_jumbo(struct sk_buf - goto drop; - } - -- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); -+ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); - if (pkt_len <= IPV6_MAXPLEN) { - IP6_INC_STATS_BH(net, ipv6_skb_idev(skb), - IPSTATS_MIB_INHDRERRORS); ---- a/include/linux/types.h -+++ b/include/linux/types.h -@@ -232,5 +232,11 @@ typedef void (*call_rcu_func_t)(struct r - /* clocksource cycle base type */ - typedef u64 cycle_t; - -+struct net_hdr_word { -+ u32 words[1]; -+} __attribute__((packed, aligned(2))); -+ -+#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) -+ - #endif /* __ASSEMBLY__ */ - #endif /* _LINUX_TYPES_H */ ---- a/net/ipv4/af_inet.c -+++ b/net/ipv4/af_inet.c -@@ -1321,8 +1321,8 @@ static struct sk_buff **inet_gro_receive - if (unlikely(ip_fast_csum((u8 *)iph, 5))) - goto out_unlock; - -- id = ntohl(*(__be32 *)&iph->id); -- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); -+ id = ntohl(net_hdr_word(&iph->id)); -+ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); - id >>= 16; - - for (p = *head; p; p = p->next) { ---- a/net/ipv4/route.c -+++ b/net/ipv4/route.c -@@ -458,7 +458,7 @@ static struct neighbour *ipv4_neigh_look - else if (skb) - pkey = &ip_hdr(skb)->daddr; - -- n = __ipv4_neigh_lookup(dev, *(__force u32 *)pkey); -+ n = __ipv4_neigh_lookup(dev, net_hdr_word(pkey)); - if (n) - return n; - return neigh_create(&arp_tbl, pkey, dev); ---- a/net/ipv4/tcp_output.c -+++ b/net/ipv4/tcp_output.c -@@ -451,48 +451,53 @@ static void tcp_options_write(__be32 *pt - u16 options = opts->options; /* mungable copy */ - - if (unlikely(OPTION_MD5 & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); - /* overload cookie hash location */ - opts->hash_location = (__u8 *)ptr; - ptr += 4; - } - - if (unlikely(opts->mss)) { -- *ptr++ = htonl((TCPOPT_MSS << 24) | -- (TCPOLEN_MSS << 16) | -- opts->mss); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | -+ opts->mss); - } - - if (likely(OPTION_TS & options)) { - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | -- (TCPOLEN_SACK_PERM << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_SACK_PERM << 24) | -+ (TCPOLEN_SACK_PERM << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - options &= ~OPTION_SACK_ADVERTISE; - } else { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - } -- *ptr++ = htonl(opts->tsval); -- *ptr++ = htonl(opts->tsecr); -+ net_hdr_word(ptr++) = htonl(opts->tsval); -+ net_hdr_word(ptr++) = htonl(opts->tsecr); - } - - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK_PERM << 8) | -- TCPOLEN_SACK_PERM); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK_PERM << 8) | -+ TCPOLEN_SACK_PERM); - } - - if (unlikely(OPTION_WSCALE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_WINDOW << 16) | -- (TCPOLEN_WINDOW << 8) | -- opts->ws); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_WINDOW << 16) | -+ (TCPOLEN_WINDOW << 8) | -+ opts->ws); - } - - if (unlikely(opts->num_sack_blocks)) { -@@ -500,16 +505,17 @@ static void tcp_options_write(__be32 *pt - tp->duplicate_sack : tp->selective_acks; - int this_sack; - -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK << 8) | -- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK << 8) | -+ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * - TCPOLEN_SACK_PERBLOCK))); - - for (this_sack = 0; this_sack < opts->num_sack_blocks; - ++this_sack) { -- *ptr++ = htonl(sp[this_sack].start_seq); -- *ptr++ = htonl(sp[this_sack].end_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); - } - - tp->rx_opt.dsack = 0; -@@ -522,13 +528,14 @@ static void tcp_options_write(__be32 *pt - - if (foc->exp) { - len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; -- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | -+ net_hdr_word(ptr) = -+ htonl((TCPOPT_EXP << 24) | (len << 16) | - TCPOPT_FASTOPEN_MAGIC); - p += TCPOLEN_EXP_FASTOPEN_BASE; - } else { - len = TCPOLEN_FASTOPEN_BASE + foc->len; -- *p++ = TCPOPT_FASTOPEN; -- *p++ = len; -+ net_hdr_word(p++) = TCPOPT_FASTOPEN; -+ net_hdr_word(p++) = len; - } - - memcpy(p, foc->val, foc->len); ---- a/net/ipv4/igmp.c -+++ b/net/ipv4/igmp.c -@@ -529,7 +529,7 @@ static struct sk_buff *add_grec(struct s - if (!skb) - return NULL; - psrc = (__be32 *)skb_put(skb, sizeof(__be32)); -- *psrc = psf->sf_inaddr; -+ net_hdr_word(psrc) = psf->sf_inaddr; - scount++; stotal++; - if ((type == IGMPV3_ALLOW_NEW_SOURCES || - type == IGMPV3_BLOCK_OLD_SOURCES) && psf->sf_crcount) { ---- a/include/uapi/linux/igmp.h -+++ b/include/uapi/linux/igmp.h -@@ -32,7 +32,7 @@ struct igmphdr { - __u8 code; /* For newer IGMP */ - __sum16 csum; - __be32 group; --}; -+} __attribute__((packed, aligned(2))); - - /* V3 group record types [grec_type] */ - #define IGMPV3_MODE_IS_INCLUDE 1 -@@ -48,7 +48,7 @@ struct igmpv3_grec { - __be16 grec_nsrcs; - __be32 grec_mca; - __be32 grec_src[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_report { - __u8 type; -@@ -57,7 +57,7 @@ struct igmpv3_report { - __be16 resv2; - __be16 ngrec; - struct igmpv3_grec grec[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_query { - __u8 type; -@@ -78,7 +78,7 @@ struct igmpv3_query { - __u8 qqic; - __be16 nsrcs; - __be32 srcs[0]; --}; -+} __attribute__((packed, aligned(2))); - - #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ - #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ ---- a/net/core/flow_dissector.c -+++ b/net/core/flow_dissector.c -@@ -95,7 +95,7 @@ __be32 __skb_flow_get_ports(const struct - ports = __skb_header_pointer(skb, thoff + poff, - sizeof(_ports), data, hlen, &_ports); - if (ports) -- return *ports; -+ return (__be32)net_hdr_word(ports); - } - - return 0; ---- a/include/uapi/linux/icmpv6.h -+++ b/include/uapi/linux/icmpv6.h -@@ -76,7 +76,7 @@ struct icmp6hdr { - #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other - #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime - #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref --}; -+} __attribute__((packed, aligned(2))); - - - #define ICMPV6_ROUTER_PREF_LOW 0x3 ---- a/include/net/ndisc.h -+++ b/include/net/ndisc.h -@@ -76,7 +76,7 @@ struct ra_msg { - struct icmp6hdr icmph; - __be32 reachable_time; - __be32 retrans_timer; --}; -+} __attribute__((packed, aligned(2))); - - struct rd_msg { - struct icmp6hdr icmph; -@@ -148,10 +148,10 @@ static inline u32 ndisc_hashfn(const voi - { - const u32 *p32 = pkey; - -- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + -- (p32[1] * hash_rnd[1]) + -- (p32[2] * hash_rnd[2]) + -- (p32[3] * hash_rnd[3])); -+ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + -+ (net_hdr_word(&p32[1]) * hash_rnd[1]) + -+ (net_hdr_word(&p32[2]) * hash_rnd[2]) + -+ (net_hdr_word(&p32[3]) * hash_rnd[3])); - } - - static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) ---- a/net/sched/cls_u32.c -+++ b/net/sched/cls_u32.c -@@ -151,7 +151,7 @@ next_knode: - data = skb_header_pointer(skb, toff, 4, &hdata); - if (!data) - goto out; -- if ((*data ^ key->val) & key->mask) { -+ if ((net_hdr_word(data) ^ key->val) & key->mask) { - n = rcu_dereference_bh(n->next); - goto next_knode; - } -@@ -204,8 +204,8 @@ check_terminal: - &hdata); - if (!data) - goto out; -- sel = ht->divisor & u32_hash_fold(*data, &n->sel, -- n->fshift); -+ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), -+ &n->sel, n->fshift); - } - if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) - goto next_ht; ---- a/net/ipv6/ip6_offload.c -+++ b/net/ipv6/ip6_offload.c -@@ -225,7 +225,7 @@ static struct sk_buff **ipv6_gro_receive - continue; - - iph2 = (struct ipv6hdr *)(p->data + off); -- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; -+ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); - - /* All fields must match except length and Traffic Class. - * XXX skbs on the gro_list have all been parsed and pulled ---- a/include/net/addrconf.h -+++ b/include/net/addrconf.h -@@ -45,7 +45,7 @@ struct prefix_info { - __be32 reserved2; - - struct in6_addr prefix; --}; -+} __attribute__((packed, aligned(2))); - - - #include ---- a/include/net/inet_ecn.h -+++ b/include/net/inet_ecn.h -@@ -124,9 +124,9 @@ static inline int IP6_ECN_set_ce(struct - if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) - return 0; - -- from = *(__be32 *)iph; -+ from = net_hdr_word(iph); - to = from | htonl(INET_ECN_CE << 20); -- *(__be32 *)iph = to; -+ net_hdr_word(iph) = to; - if (skb->ip_summed == CHECKSUM_COMPLETE) - skb->csum = csum_add(csum_sub(skb->csum, from), to); - return 1; -@@ -134,7 +134,7 @@ static inline int IP6_ECN_set_ce(struct - - static inline void IP6_ECN_clear(struct ipv6hdr *iph) - { -- *(__be32*)iph &= ~htonl(INET_ECN_MASK << 20); -+ net_hdr_word(iph) &= ~htonl(INET_ECN_MASK << 20); - } - - static inline void ipv6_copy_dscp(unsigned int dscp, struct ipv6hdr *inner) ---- a/include/net/ipv6.h -+++ b/include/net/ipv6.h -@@ -107,7 +107,7 @@ struct frag_hdr { - __u8 reserved; - __be16 frag_off; - __be32 identification; --}; -+} __attribute__((packed, aligned(2))); - - #define IP6_MF 0x0001 - #define IP6_OFFSET 0xFFF8 -@@ -417,8 +417,8 @@ static inline void __ipv6_addr_set_half( - } - #endif - #endif -- addr[0] = wh; -- addr[1] = wl; -+ net_hdr_word(&addr[0]) = wh; -+ net_hdr_word(&addr[1]) = wl; - } - - static inline void ipv6_addr_set(struct in6_addr *addr, -@@ -477,6 +477,8 @@ static inline bool ipv6_prefix_equal(con - const __be32 *a1 = addr1->s6_addr32; - const __be32 *a2 = addr2->s6_addr32; - unsigned int pdw, pbi; -+ /* Used for last <32-bit fraction of prefix */ -+ u32 pbia1, pbia2; - - /* check complete u32 in prefix */ - pdw = prefixlen >> 5; -@@ -485,7 +487,9 @@ static inline bool ipv6_prefix_equal(con - - /* check incomplete u32 in prefix */ - pbi = prefixlen & 0x1f; -- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) -+ pbia1 = net_hdr_word(&a1[pdw]); -+ pbia2 = net_hdr_word(&a2[pdw]); -+ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) - return false; - - return true; -@@ -629,13 +633,13 @@ static inline void ipv6_addr_set_v4mappe - */ - static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) - { -- const __be32 *a1 = token1, *a2 = token2; -+ const struct in6_addr *a1 = token1, *a2 = token2; - int i; - - addrlen >>= 2; - - for (i = 0; i < addrlen; i++) { -- __be32 xb = a1[i] ^ a2[i]; -+ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; - if (xb) - return i * 32 + 31 - __fls(ntohl(xb)); - } -@@ -804,17 +808,18 @@ static inline int ip6_default_np_autolab - static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, - __be32 flowlabel) - { -- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; -+ net_hdr_word((__be32 *)hdr) = -+ htonl(0x60000000 | (tclass << 20)) | flowlabel; - } - - static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; - } - - static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; - } - - static inline u8 ip6_tclass(__be32 flowinfo) ---- a/include/net/secure_seq.h -+++ b/include/net/secure_seq.h -@@ -2,6 +2,7 @@ - #define _NET_SECURE_SEQ - - #include -+#include - - u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); - u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, ---- a/include/uapi/linux/in.h -+++ b/include/uapi/linux/in.h -@@ -83,7 +83,7 @@ enum { - /* Internet address. */ - struct in_addr { - __be32 s_addr; --}; -+} __attribute__((packed, aligned(2))); - #endif - - #define IP_TOS 1 ---- a/net/core/secure_seq.c -+++ b/net/core/secure_seq.c -@@ -46,11 +46,12 @@ __u32 secure_tcpv6_sequence_number(const - u32 secret[MD5_MESSAGE_BYTES / 4]; - u32 hash[MD5_DIGEST_WORDS]; - u32 i; -+ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; - - net_secret_init(); - memcpy(hash, saddr, 16); - for (i = 0; i < 4; i++) -- secret[i] = net_secret[i] + (__force u32)daddr[i]; -+ secret[i] = net_secret[i] + (__force u32)daddr6->s6_addr32[i]; - secret[4] = net_secret[4] + - (((__force u16)sport << 16) + (__force u16)dport); - for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) -@@ -68,11 +69,12 @@ u32 secure_ipv6_port_ephemeral(const __b - u32 secret[MD5_MESSAGE_BYTES / 4]; - u32 hash[MD5_DIGEST_WORDS]; - u32 i; -+ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; - - net_secret_init(); - memcpy(hash, saddr, 16); - for (i = 0; i < 4; i++) -- secret[i] = net_secret[i] + (__force u32) daddr[i]; -+ secret[i] = net_secret[i] + (__force u32) daddr6->s6_addr32[i]; - secret[4] = net_secret[4] + (__force u32)dport; - for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) - secret[i] = net_secret[i]; -@@ -146,6 +148,7 @@ EXPORT_SYMBOL(secure_dccp_sequence_numbe - u64 secure_dccpv6_sequence_number(__be32 *saddr, __be32 *daddr, - __be16 sport, __be16 dport) - { -+ const struct in6_addr *daddr6 = (struct in6_addr *) daddr; - u32 secret[MD5_MESSAGE_BYTES / 4]; - u32 hash[MD5_DIGEST_WORDS]; - u64 seq; -@@ -154,7 +157,7 @@ u64 secure_dccpv6_sequence_number(__be32 - net_secret_init(); - memcpy(hash, saddr, 16); - for (i = 0; i < 4; i++) -- secret[i] = net_secret[i] + (__force u32)daddr[i]; -+ secret[i] = net_secret[i] + (__force u32)daddr6->s6_addr32[i]; - secret[4] = net_secret[4] + - (((__force u16)sport << 16) + (__force u16)dport); - for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++) ---- a/net/ipv6/ip6_fib.c -+++ b/net/ipv6/ip6_fib.c -@@ -138,7 +138,7 @@ static __be32 addr_bit_set(const void *t - * See include/asm-generic/bitops/le.h. - */ - return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & -- addr[fn_bit >> 5]; -+ net_hdr_word(&addr[fn_bit >> 5]); - } - - static struct fib6_node *node_alloc(void) ---- a/net/netfilter/nf_conntrack_proto_tcp.c -+++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -456,7 +456,7 @@ static void tcp_sack(const struct sk_buf - - /* Fast path for timestamp-only option */ - if (length == TCPOLEN_TSTAMP_ALIGNED -- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) -+ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) - | (TCPOPT_NOP << 16) - | (TCPOPT_TIMESTAMP << 8) - | TCPOLEN_TIMESTAMP)) ---- a/net/xfrm/xfrm_input.c -+++ b/net/xfrm/xfrm_input.c -@@ -154,8 +154,8 @@ int xfrm_parse_spi(struct sk_buff *skb, - if (!pskb_may_pull(skb, hlen)) - return -EINVAL; - -- *spi = *(__be32 *)(skb_transport_header(skb) + offset); -- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); -+ *spi = net_hdr_word(skb_transport_header(skb) + offset); -+ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); - return 0; - } - ---- a/net/ipv4/tcp_input.c -+++ b/net/ipv4/tcp_input.c -@@ -3818,14 +3818,16 @@ static bool tcp_parse_aligned_timestamp( - { - const __be32 *ptr = (const __be32 *)(th + 1); - -- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) -- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { -+ if (net_hdr_word(ptr) == -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { - tp->rx_opt.saw_tstamp = 1; - ++ptr; -- tp->rx_opt.rcv_tsval = ntohl(*ptr); -+ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); - ++ptr; -- if (*ptr) -- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; -+ if (net_hdr_word(ptr)) -+ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - -+ tp->tsoffset; - else - tp->rx_opt.rcv_tsecr = 0; - return true; ---- a/include/uapi/linux/if_pppox.h -+++ b/include/uapi/linux/if_pppox.h -@@ -47,6 +47,7 @@ struct pppoe_addr { - */ - struct pptp_addr { - __u16 call_id; -+ __u16 pad; - struct in_addr sin_addr; - }; - ---- a/net/ipv6/netfilter/nf_log_ipv6.c -+++ b/net/ipv6/netfilter/nf_log_ipv6.c -@@ -66,9 +66,9 @@ static void dump_ipv6_packet(struct nf_l - /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ - nf_log_buf_add(m, "LEN=%Zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", - ntohs(ih->payload_len) + sizeof(struct ipv6hdr), -- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, -+ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, - ih->hop_limit, -- (ntohl(*(__be32 *)ih) & 0x000fffff)); -+ (ntohl(net_hdr_word(ih)) & 0x000fffff)); - - fragment = 0; - ptr = ip6hoff + sizeof(struct ipv6hdr); ---- a/include/net/neighbour.h -+++ b/include/net/neighbour.h -@@ -263,8 +263,10 @@ static inline bool neigh_key_eq128(const - const u32 *n32 = (const u32 *)n->primary_key; - const u32 *p32 = pkey; - -- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | -- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; -+ return ((n32[0] ^ net_hdr_word(&p32[0])) | -+ (n32[1] ^ net_hdr_word(&p32[1])) | -+ (n32[2] ^ net_hdr_word(&p32[2])) | -+ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; - } - - static inline struct neighbour *___neigh_lookup_noref( ---- a/include/uapi/linux/netfilter_arp/arp_tables.h -+++ b/include/uapi/linux/netfilter_arp/arp_tables.h -@@ -68,7 +68,7 @@ struct arpt_arp { - __u8 flags; - /* Inverse flags */ - __u16 invflags; --}; -+} __attribute__((aligned(4))); - - /* Values for "flag" field in struct arpt_ip (general arp structure). - * No flags defined yet. ---- a/net/core/utils.c -+++ b/net/core/utils.c -@@ -321,8 +321,14 @@ void inet_proto_csum_replace16(__sum16 * - bool pseudohdr) - { - __be32 diff[] = { -- ~from[0], ~from[1], ~from[2], ~from[3], -- to[0], to[1], to[2], to[3], -+ ~net_hdr_word(&from[0]), -+ ~net_hdr_word(&from[1]), -+ ~net_hdr_word(&from[2]), -+ ~net_hdr_word(&from[3]), -+ net_hdr_word(&to[0]), -+ net_hdr_word(&to[1]), -+ net_hdr_word(&to[2]), -+ net_hdr_word(&to[3]), - }; - if (skb->ip_summed != CHECKSUM_PARTIAL) { - *sum = csum_fold(csum_partial(diff, sizeof(diff), diff --git a/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch b/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch deleted file mode 100644 index 740ffec4a..000000000 --- a/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch +++ /dev/null @@ -1,123 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -659,6 +659,7 @@ - - #define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) - #define AR933X_BOOTSTRAP_EEPBUSY BIT(4) -+#define AR933X_BOOTSTRAP_USB_MODE_HOST BIT(3) - #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) - - #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -@@ -688,6 +689,8 @@ - - #define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2) - -+#define AR933X_USB_CONFIG_HOST_ONLY BIT(8) -+ - #define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0) - #define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1) - #define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2) ---- a/arch/mips/ath79/dev-usb.c -+++ b/arch/mips/ath79/dev-usb.c -@@ -19,6 +19,9 @@ - #include - #include - #include -+#include -+#include -+#include - - #include - #include -@@ -170,6 +173,67 @@ static void __init ar913x_usb_setup(void - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); - } - -+static void __init ar933x_usb_setup_ctrl_config(void) -+{ -+ void __iomem *usb_ctrl_base, *usb_config_reg; -+ u32 usb_config; -+ -+ usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); -+ usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG; -+ usb_config = __raw_readl(usb_config_reg); -+ usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY; -+ __raw_writel(usb_config, usb_config_reg); -+ iounmap(usb_ctrl_base); -+} -+ -+static void __init ar9xxx_ci_usb_setup(void) -+{ -+ struct ci_hdrc_platform_data ci_pdata; -+ enum usb_dr_mode dr_mode; -+ bool host_mode = true; -+ -+ if (soc_is_ar933x()) -+ host_mode = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) & -+ AR933X_BOOTSTRAP_USB_MODE_HOST; -+ else if (soc_is_ar934x() || soc_is_qca955x()) -+ host_mode = !(ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP) & -+ AR934X_BOOTSTRAP_USB_MODE_DEVICE); -+ -+ if (host_mode) { -+ dr_mode = USB_DR_MODE_HOST; -+ } else { -+ dr_mode = USB_DR_MODE_PERIPHERAL; -+ if (soc_is_ar933x()) -+ ar933x_usb_setup_ctrl_config(); -+ } -+ -+ memset(&ci_pdata, 0, sizeof(ci_pdata)); -+ ci_pdata.name = "ci_hdrc_ar9xxx"; -+ ci_pdata.capoffset = DEF_CAPOFFSET; -+ ci_pdata.dr_mode = dr_mode; -+ ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP; -+ ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV); -+ ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV); -+ ci_pdata.itc_setting = 1; -+ -+ platform_device_register_simple("usb_phy_generic", -+ PLATFORM_DEVID_AUTO, NULL, 0); -+ -+ ath79_usb_register("ci_hdrc", -1, -+ AR933X_EHCI_BASE, AR933X_EHCI_SIZE, -+ ATH79_CPU_IRQ(3), -+ &ci_pdata, sizeof(ci_pdata)); -+ -+ if (!host_mode) -+ return; -+ -+ ath79_usb_register("ehci-platform", -1, -+ AR934X_EHCI_BASE, AR934X_EHCI_SIZE, -+ ATH79_CPU_IRQ(3), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ -+} -+ - static void __init ar933x_usb_setup(void) - { - ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); -@@ -181,10 +245,7 @@ static void __init ar933x_usb_setup(void - ath79_device_reset_clear(AR933X_RESET_USB_PHY); - mdelay(10); - -- ath79_usb_register("ehci-platform", -1, -- AR933X_EHCI_BASE, AR933X_EHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ar9xxx_ci_usb_setup(); - } - - static void enable_tx_tx_idp_violation_fix(unsigned base) -@@ -230,10 +291,7 @@ static void __init ar934x_usb_setup(void - if (ath79_soc_rev >= 3) - ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; - -- ath79_usb_register("ehci-platform", -1, -- AR934X_EHCI_BASE, AR934X_EHCI_SIZE, -- ATH79_CPU_IRQ(3), -- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ar9xxx_ci_usb_setup(); - } - - static void __init qca953x_usb_setup(void) diff --git a/target/linux/ar71xx/patches-4.4/930-chipidea-pullup.patch b/target/linux/ar71xx/patches-4.4/930-chipidea-pullup.patch deleted file mode 100644 index d43e8c7dc..000000000 --- a/target/linux/ar71xx/patches-4.4/930-chipidea-pullup.patch +++ /dev/null @@ -1,72 +0,0 @@ ---- a/drivers/usb/chipidea/ci.h -+++ b/drivers/usb/chipidea/ci.h -@@ -199,6 +199,7 @@ struct hw_bank { - * @in_lpm: if the core in low power mode - * @wakeup_int: if wakeup interrupt occur - * @rev: The revision number for controller -+ * @dp_always_pullup: keep dp always pullup at device mode - */ - struct ci_hdrc { - struct device *dev; -@@ -248,6 +249,7 @@ struct ci_hdrc { - bool in_lpm; - bool wakeup_int; - enum ci_revision rev; -+ bool dp_always_pullup; - }; - - static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci) ---- a/drivers/usb/chipidea/core.c -+++ b/drivers/usb/chipidea/core.c -@@ -851,7 +851,7 @@ static inline void ci_role_destroy(struc - { - ci_hdrc_gadget_destroy(ci); - ci_hdrc_host_destroy(ci); -- if (ci->is_otg) -+ if (!ci->dp_always_pullup && ci->roles[CI_ROLE_GADGET]) - ci_hdrc_otg_destroy(ci); - } - -@@ -902,6 +902,9 @@ static int ci_hdrc_probe(struct platform - ci->supports_runtime_pm = !!(ci->platdata->flags & - CI_HDRC_SUPPORTS_RUNTIME_PM); - -+ ci->dp_always_pullup = !!(ci->platdata->flags & -+ CI_HDRC_DP_ALWAYS_PULLUP); -+ - ret = hw_device_init(ci, base); - if (ret < 0) { - dev_err(dev, "can't initialize hardware\n"); -@@ -967,7 +970,7 @@ static int ci_hdrc_probe(struct platform - goto deinit_phy; - } - -- if (ci->is_otg && ci->roles[CI_ROLE_GADGET]) { -+ if (!ci->dp_always_pullup && ci->roles[CI_ROLE_GADGET]) { - ret = ci_hdrc_otg_init(ci); - if (ret) { - dev_err(dev, "init otg fails, ret = %d\n", ret); ---- a/drivers/usb/chipidea/otg.c -+++ b/drivers/usb/chipidea/otg.c -@@ -131,8 +131,10 @@ enum ci_role ci_otg_role(struct ci_hdrc - - void ci_handle_vbus_change(struct ci_hdrc *ci) - { -- if (!ci->is_otg) -+ if (ci->dp_always_pullup) { -+ usb_gadget_vbus_connect(&ci->gadget); - return; -+ } - - if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active) - usb_gadget_vbus_connect(&ci->gadget); ---- a/include/linux/usb/chipidea.h -+++ b/include/linux/usb/chipidea.h -@@ -57,6 +57,7 @@ struct ci_hdrc_platform_data { - #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9) - #define CI_HDRC_OVERRIDE_TX_BURST BIT(10) - #define CI_HDRC_OVERRIDE_RX_BURST BIT(11) -+#define CI_HDRC_DP_ALWAYS_PULLUP BIT(12) - enum usb_dr_mode dr_mode; - #define CI_HDRC_CONTROLLER_RESET_EVENT 0 - #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1 diff --git a/target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch b/target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch index e6e972b7e..cc30e2d91 100644 --- a/target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch +++ b/target/linux/ar71xx/patches-4.9/004-register_gpio_driver_earlier.patch @@ -3,7 +3,7 @@ from mach files succeed. --- a/drivers/gpio/gpio-ath79.c +++ b/drivers/gpio/gpio-ath79.c -@@ -322,4 +322,8 @@ static struct platform_driver ath79_gpio +@@ -322,7 +322,11 @@ static struct platform_driver ath79_gpio .remove = ath79_gpio_remove, }; @@ -13,3 +13,6 @@ from mach files succeed. + return platform_driver_register(&ath79_gpio_driver); +} +postcore_initcall(ath79_gpio_init); + + MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); + MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch b/target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch index 4fa957e70..418db2a2b 100644 --- a/target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch +++ b/target/linux/ar71xx/patches-4.9/407-mtd-m25p80-allow-to-pass-probe-types-via-platform-data.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c -@@ -192,6 +192,7 @@ static ssize_t m25p80_read(struct spi_no +@@ -194,6 +194,7 @@ static ssize_t m25p80_read(struct spi_no */ static int m25p_probe(struct spi_device *spi) { @@ -8,7 +8,7 @@ struct flash_platform_data *data; struct m25p *flash; struct spi_nor *nor; -@@ -244,8 +245,11 @@ static int m25p_probe(struct spi_device +@@ -246,8 +247,11 @@ static int m25p_probe(struct spi_device if (ret) return ret; diff --git a/target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch b/target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch index e896d0bdf..5428d3d1c 100644 --- a/target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch +++ b/target/linux/ar71xx/patches-4.9/432-spi-rb4xx-spi-driver.patch @@ -1,6 +1,6 @@ --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig -@@ -533,6 +533,12 @@ config SPI_QUP +@@ -534,6 +534,12 @@ config SPI_QUP This driver can also be built as a module. If so, the module will be called spi_qup. diff --git a/target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch b/target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch index c44acab32..b1cd6a545 100644 --- a/target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch +++ b/target/linux/ar71xx/patches-4.9/433-spi-rb4xx-cpld-driver.patch @@ -1,6 +1,6 @@ --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig -@@ -761,6 +761,13 @@ config SPI_TLE62X0 +@@ -762,6 +762,13 @@ config SPI_TLE62X0 sysfs interface, with each line presented as a kind of GPIO exposing both switch control and diagnostic feedback. diff --git a/target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch b/target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch index f9f1f7a1e..fe6acde70 100644 --- a/target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch +++ b/target/linux/ar71xx/patches-4.9/435-spi-vsc7385_driver.patch @@ -1,6 +1,6 @@ --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig -@@ -768,6 +768,11 @@ config SPI_RB4XX_CPLD +@@ -769,6 +769,11 @@ config SPI_RB4XX_CPLD SPI driver for the Xilinx CPLD chip present on the MikroTik RB4xx boards. diff --git a/target/linux/ar71xx/patches-4.9/442-leds-gpio-allow-to-use-OPEN_-DRAIN-SOURCE-flags-with.patch b/target/linux/ar71xx/patches-4.9/442-leds-gpio-allow-to-use-OPEN_-DRAIN-SOURCE-flags-with.patch new file mode 100644 index 000000000..26c8cb5df --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/442-leds-gpio-allow-to-use-OPEN_-DRAIN-SOURCE-flags-with.patch @@ -0,0 +1,45 @@ +From 183148e0789bee1cd5c46ba49afcb211f636f8a2 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos +Date: Mon, 15 Jan 2018 15:01:14 +0100 +Subject: [PATCH] leds: gpio: allow to use OPEN_{DRAIN,SOURCE} flags with + legacy GPIOs + +LEDs which are connected to open-source or open-drain type of GPIO lines +can be used only, if those are defined via devicetree. +Add two new fields to 'struct gpio_led' in order to make it possible to +specify this type of GPIO lines to the leds-gpio driver via platform data. +Also update the create_gpio_led() function to set the GPIOF_OPEN_DRAIN and +GPIOF_OPEN_SOURCE flags for the given GPIO line. + +Signed-off-by: Gabor Juhos +--- + drivers/leds/leds-gpio.c | 6 ++++++ + include/linux/leds.h | 2 ++ + 2 files changed, 8 insertions(+) + +--- a/drivers/leds/leds-gpio.c ++++ b/drivers/leds/leds-gpio.c +@@ -100,6 +100,12 @@ static int create_gpio_led(const struct + if (template->active_low) + flags |= GPIOF_ACTIVE_LOW; + ++ if (template->open_drain) ++ flags |= GPIOF_OPEN_DRAIN; ++ ++ if (template->open_source) ++ flags |= GPIOF_OPEN_SOURCE; ++ + ret = devm_gpio_request_one(parent, template->gpio, flags, + template->name); + if (ret < 0) +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -380,6 +380,8 @@ struct gpio_led { + unsigned panic_indicator : 1; + unsigned default_state : 2; + /* default_state should be one of LEDS_GPIO_DEFSTATE_(ON|OFF|KEEP) */ ++ unsigned open_drain : 1; ++ unsigned open_source : 1; + struct gpio_desc *gpiod; + }; + #define LEDS_GPIO_DEFSTATE_OFF 0 diff --git a/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch index 03ff6c6aa..ed887cc50 100644 --- a/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch +++ b/target/linux/ar71xx/patches-4.9/620-MIPS-ath79-add-support-for-QCA953x-SoC.patch @@ -44,7 +44,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. config ATH79_NVRAM --- a/arch/mips/ath79/clock.c +++ b/arch/mips/ath79/clock.c -@@ -358,6 +358,91 @@ static void __init ar934x_clocks_init(vo +@@ -358,6 +358,87 @@ static void __init ar934x_clocks_init(vo iounmap(dpll_base); } @@ -56,13 +56,9 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. + unsigned long ahb_rate; + u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; + u32 cpu_pll, ddr_pll; -+ u32 bootstrap; + -+ bootstrap = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ if (bootstrap & QCA953X_BOOTSTRAP_REF_CLK_40) -+ ref_rate = 40 * 1000 * 1000; -+ else -+ ref_rate = 25 * 1000 * 1000; ++ /* QCA953X only supports 25MHz ref_clk */ ++ ref_rate = 25 * 1000 * 1000; + + pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); + out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & @@ -136,7 +132,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. static void __init qca955x_clocks_init(void) { unsigned long ref_rate; -@@ -453,6 +538,8 @@ void __init ath79_clocks_init(void) +@@ -453,6 +534,8 @@ void __init ath79_clocks_init(void) ar933x_clocks_init(); else if (soc_is_ar934x()) ar934x_clocks_init(); @@ -247,14 +243,12 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. ath79_wmac_data.external_reset = ar933x_wmac_reset; } -@@ -150,6 +150,26 @@ static void ar934x_wmac_setup(void) +@@ -150,6 +150,21 @@ static void ar934x_wmac_setup(void) ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; } +static void qca953x_wmac_setup(void) +{ -+ u32 t; -+ + ath79_wmac_device.name = "qca953x_wmac"; + + ath79_wmac_resources[0].start = QCA953X_WMAC_BASE; @@ -262,11 +256,8 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. + ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); + ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); + -+ t = ath79_reset_rr(QCA953X_RESET_REG_BOOTSTRAP); -+ if (t & QCA953X_BOOTSTRAP_REF_CLK_40) -+ ath79_wmac_data.is_clk_25mhz = false; -+ else -+ ath79_wmac_data.is_clk_25mhz = true; ++ /* QCA953X only supports 25MHz ref_clk */ ++ ath79_wmac_data.is_clk_25mhz = true; + + ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; +} @@ -274,7 +265,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. static void qca955x_wmac_setup(void) { u32 t; -@@ -379,6 +399,8 @@ void __init ath79_register_wmac(u8 *cal_ +@@ -379,6 +394,8 @@ void __init ath79_register_wmac(u8 *cal_ ar933x_wmac_setup(); else if (soc_is_ar934x()) ar934x_wmac_setup(); @@ -550,7 +541,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed. +#define QCA953X_BOOTSTRAP_SW_OPTION2 BIT(12) +#define QCA953X_BOOTSTRAP_SW_OPTION1 BIT(11) +#define QCA953X_BOOTSTRAP_EJTAG_MODE BIT(5) -+#define QCA953X_BOOTSTRAP_REF_CLK_40 BIT(4) ++#define QCA953X_BOOTSTRAP_REF_CLK BIT(4) +#define QCA953X_BOOTSTRAP_SDRAM_DISABLED BIT(1) +#define QCA953X_BOOTSTRAP_DDR1 BIT(0) + diff --git a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch index e6eaa7123..03bb9c31f 100644 --- a/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch +++ b/target/linux/ar71xx/patches-4.9/621-MIPS-ath79-add-support-for-QCA956x-SoC.patch @@ -24,7 +24,7 @@ config ATH79_NVRAM --- a/arch/mips/ath79/clock.c +++ b/arch/mips/ath79/clock.c -@@ -528,6 +528,100 @@ static void __init qca955x_clocks_init(v +@@ -524,6 +524,100 @@ static void __init qca955x_clocks_init(v clk_add_alias("uart", NULL, "ref", NULL); } @@ -125,7 +125,7 @@ void __init ath79_clocks_init(void) { if (soc_is_ar71xx()) -@@ -542,6 +636,8 @@ void __init ath79_clocks_init(void) +@@ -538,6 +632,8 @@ void __init ath79_clocks_init(void) qca953x_clocks_init(); else if (soc_is_qca955x()) qca955x_clocks_init(); @@ -219,7 +219,7 @@ } --- a/arch/mips/ath79/dev-wmac.c +++ b/arch/mips/ath79/dev-wmac.c -@@ -200,6 +200,26 @@ static void qca955x_wmac_setup(void) +@@ -195,6 +195,26 @@ static void qca955x_wmac_setup(void) #define AR93XX_OTP_READ_DATA \ (soc_is_ar934x() ? AR934X_OTP_READ_DATA : AR9300_OTP_READ_DATA) @@ -246,7 +246,7 @@ static bool __init ar93xx_wmac_otp_read_word(void __iomem *base, int addr, u32 *data) { -@@ -403,6 +423,8 @@ void __init ath79_register_wmac(u8 *cal_ +@@ -398,6 +418,8 @@ void __init ath79_register_wmac(u8 *cal_ qca953x_wmac_setup(); else if (soc_is_qca955x()) qca955x_wmac_setup(); diff --git a/target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch b/target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch index 29f7f3d0a..a31221771 100644 --- a/target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch +++ b/target/linux/ar71xx/patches-4.9/631-MIPS-ath79-wmac-enable-set-led-pin.patch @@ -1,6 +1,6 @@ --- a/arch/mips/ath79/dev-wmac.c +++ b/arch/mips/ath79/dev-wmac.c -@@ -411,6 +411,11 @@ void __init ath79_wmac_set_ext_lna_gpio( +@@ -406,6 +406,11 @@ void __init ath79_wmac_set_ext_lna_gpio( ar934x_set_ext_lna_gpio(chain, gpio); } diff --git a/target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch b/target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch index d7f4536ba..bb315a1e6 100644 --- a/target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch +++ b/target/linux/ar71xx/patches-4.9/640-MIPS-ath79-add-QCA955x-wmac-reset.patch @@ -32,7 +32,7 @@ */ --- a/arch/mips/ath79/dev-wmac.c +++ b/arch/mips/ath79/dev-wmac.c -@@ -170,6 +170,27 @@ static void qca953x_wmac_setup(void) +@@ -165,6 +165,27 @@ static void qca953x_wmac_setup(void) ath79_wmac_data.get_mac_revision = ar93xx_get_soc_revision; } @@ -60,7 +60,7 @@ static void qca955x_wmac_setup(void) { u32 t; -@@ -186,6 +207,8 @@ static void qca955x_wmac_setup(void) +@@ -181,6 +202,8 @@ static void qca955x_wmac_setup(void) ath79_wmac_data.is_clk_25mhz = false; else ath79_wmac_data.is_clk_25mhz = true; diff --git a/target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch b/target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch index 1d9d761d7..64c7e881a 100644 --- a/target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch +++ b/target/linux/ar71xx/patches-4.9/701-MIPS-ath79-add-routerboard-detection.patch @@ -1,6 +1,6 @@ --- a/arch/mips/ath79/prom.c +++ b/arch/mips/ath79/prom.c -@@ -136,6 +136,30 @@ void __init prom_init(void) +@@ -136,6 +136,31 @@ void __init prom_init(void) initrd_end = initrd_start + fw_getenvl("initrd_size"); } #endif @@ -26,8 +26,9 @@ + strstr(arcs_cmdline, "board=2011L") || + strstr(arcs_cmdline, "board=2011r") || + strstr(arcs_cmdline, "board=711Gr100") || ++ strstr(arcs_cmdline, "board=911L") || + strstr(arcs_cmdline, "board=922gs")) + ath79_prom_append_cmdline("console", "ttyS0,115200"); } - + void __init prom_free_prom_memory(void) diff --git a/target/linux/ar71xx/patches-4.9/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch b/target/linux/ar71xx/patches-4.9/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch index 3a6438ee8..5ca078425 100644 --- a/target/linux/ar71xx/patches-4.9/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch +++ b/target/linux/ar71xx/patches-4.9/741-MIPS-ath79-add-PCI-for-QCA9556-SoC.patch @@ -1,12 +1,12 @@ --- a/arch/mips/ath79/pci.c +++ b/arch/mips/ath79/pci.c @@ -324,7 +324,8 @@ int __init ath79_register_pci(void) - QCA953X_PCI_MEM_SIZE, - 0, - ATH79_IP2_IRQ(0)); + QCA953X_PCI_MEM_SIZE, + 0, + ATH79_IP2_IRQ(0)); - } else if (soc_is_qca9558()) { + } else if (soc_is_qca9558() || + soc_is_qca9556()) { - pdev = ath79_register_pci_ar724x(0, - QCA955X_PCI_CFG_BASE0, - QCA955X_PCI_CTRL_BASE0, + pdev = ath79_register_pci_ar724x(0, + QCA955X_PCI_CFG_BASE0, + QCA955X_PCI_CTRL_BASE0, diff --git a/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch b/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch index 92f0a6765..464a930f3 100644 --- a/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch +++ b/target/linux/ar71xx/patches-4.9/910-unaligned_access_hacks.patch @@ -267,7 +267,7 @@ case IPV6_2292HOPOPTS: --- a/net/ipv6/ip6_gre.c +++ b/net/ipv6/ip6_gre.c -@@ -394,7 +394,7 @@ static void ip6gre_err(struct sk_buff *s +@@ -395,7 +395,7 @@ static void ip6gre_err(struct sk_buff *s return; ipv6h = (const struct ipv6hdr *)skb->data; greh = (const struct gre_base_hdr *)(skb->data + offset); @@ -316,7 +316,7 @@ for (p = *head; p; p = p->next) { --- a/net/ipv4/route.c +++ b/net/ipv4/route.c -@@ -458,7 +458,7 @@ static struct neighbour *ipv4_neigh_look +@@ -461,7 +461,7 @@ static struct neighbour *ipv4_neigh_look else if (skb) pkey = &ip_hdr(skb)->daddr; @@ -448,7 +448,7 @@ memcpy(p, foc->val, foc->len); --- a/net/ipv4/igmp.c +++ b/net/ipv4/igmp.c -@@ -533,7 +533,7 @@ static struct sk_buff *add_grec(struct s +@@ -537,7 +537,7 @@ static struct sk_buff *add_grec(struct s if (!skb) return NULL; psrc = (__be32 *)skb_put(skb, sizeof(__be32)); @@ -621,7 +621,7 @@ #define IP6_MF 0x0001 #define IP6_OFFSET 0xFFF8 -@@ -449,8 +449,8 @@ static inline void __ipv6_addr_set_half( +@@ -450,8 +450,8 @@ static inline void __ipv6_addr_set_half( } #endif #endif @@ -632,7 +632,7 @@ } static inline void ipv6_addr_set(struct in6_addr *addr, -@@ -509,6 +509,8 @@ static inline bool ipv6_prefix_equal(con +@@ -510,6 +510,8 @@ static inline bool ipv6_prefix_equal(con const __be32 *a1 = addr1->s6_addr32; const __be32 *a2 = addr2->s6_addr32; unsigned int pdw, pbi; @@ -641,7 +641,7 @@ /* check complete u32 in prefix */ pdw = prefixlen >> 5; -@@ -517,7 +519,9 @@ static inline bool ipv6_prefix_equal(con +@@ -518,7 +520,9 @@ static inline bool ipv6_prefix_equal(con /* check incomplete u32 in prefix */ pbi = prefixlen & 0x1f; @@ -652,7 +652,7 @@ return false; return true; -@@ -661,13 +665,13 @@ static inline void ipv6_addr_set_v4mappe +@@ -662,13 +666,13 @@ static inline void ipv6_addr_set_v4mappe */ static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) { @@ -668,7 +668,7 @@ if (xb) return i * 32 + 31 - __fls(ntohl(xb)); } -@@ -836,17 +840,18 @@ static inline int ip6_default_np_autolab +@@ -837,17 +841,18 @@ static inline int ip6_default_np_autolab static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, __be32 flowlabel) { @@ -886,3 +886,95 @@ }; if (skb->ip_summed != CHECKSUM_PARTIAL) { *sum = csum_fold(csum_partial(diff, sizeof(diff), +--- a/drivers/net/vxlan.c ++++ b/drivers/net/vxlan.c +@@ -1789,15 +1789,15 @@ static int vxlan_build_skb(struct sk_buf + goto out_free; + + vxh = (struct vxlanhdr *) __skb_push(skb, sizeof(*vxh)); +- vxh->vx_flags = VXLAN_HF_VNI; +- vxh->vx_vni = vxlan_vni_field(vni); ++ net_hdr_word(&vxh->vx_flags) = VXLAN_HF_VNI; ++ net_hdr_word(&vxh->vx_vni) = vxlan_vni_field(vni); + + if (type & SKB_GSO_TUNNEL_REMCSUM) { + unsigned int start; + + start = skb_checksum_start_offset(skb) - sizeof(struct vxlanhdr); +- vxh->vx_vni |= vxlan_compute_rco(start, skb->csum_offset); +- vxh->vx_flags |= VXLAN_HF_RCO; ++ net_hdr_word(&vxh->vx_vni) |= vxlan_compute_rco(start, skb->csum_offset); ++ net_hdr_word(&vxh->vx_flags) |= VXLAN_HF_RCO; + + if (!skb_is_gso(skb)) { + skb->ip_summed = CHECKSUM_NONE; +--- a/include/linux/etherdevice.h ++++ b/include/linux/etherdevice.h +@@ -435,7 +435,7 @@ static inline bool is_etherdev_addr(cons + * @b: Pointer to Ethernet header + * + * Compare two Ethernet headers, returns 0 if equal. +- * This assumes that the network header (i.e., IP header) is 4-byte ++ * This assumes that the network header (i.e., IP header) is 2-byte + * aligned OR the platform can handle unaligned access. This is the + * case for all packets coming into netif_receive_skb or similar + * entry points. +@@ -458,11 +458,12 @@ static inline unsigned long compare_ethe + fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); + return fold; + #else +- u32 *a32 = (u32 *)((u8 *)a + 2); +- u32 *b32 = (u32 *)((u8 *)b + 2); ++ const u16 *a16 = a; ++ const u16 *b16 = b; + +- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | +- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]); ++ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) | ++ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) | ++ (a16[6] ^ b16[6]); + #endif + } + +--- a/net/ipv4/tcp_offload.c ++++ b/net/ipv4/tcp_offload.c +@@ -218,7 +218,7 @@ struct sk_buff **tcp_gro_receive(struct + + th2 = tcp_hdr(p); + +- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) { ++ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) { + NAPI_GRO_CB(p)->same_flow = 0; + continue; + } +@@ -236,8 +236,8 @@ found: + ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); + flush |= (__force int)(th->ack_seq ^ th2->ack_seq); + for (i = sizeof(*th); i < thlen; i += 4) +- flush |= *(u32 *)((u8 *)th + i) ^ +- *(u32 *)((u8 *)th2 + i); ++ flush |= net_hdr_word((u8 *)th + i) ^ ++ net_hdr_word((u8 *)th2 + i); + + /* When we receive our second frame we can made a decision on if we + * continue this flow as an atomic flow with a fixed ID or if we use +--- a/net/ipv6/netfilter/ip6table_mangle.c ++++ b/net/ipv6/netfilter/ip6table_mangle.c +@@ -58,7 +58,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + hop_limit = ipv6_hdr(skb)->hop_limit; + + /* flowlabel and prio (includes version, which shouldn't change either */ +- flowlabel = *((u_int32_t *)ipv6_hdr(skb)); ++ flowlabel = net_hdr_word(ipv6_hdr(skb)); + + ret = ip6t_do_table(skb, state, state->net->ipv6.ip6table_mangle); + +@@ -67,7 +67,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || + skb->mark != mark || + ipv6_hdr(skb)->hop_limit != hop_limit || +- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) { ++ flowlabel != net_hdr_word(ipv6_hdr(skb)))) { + err = ip6_route_me_harder(state->net, skb); + if (err < 0) + ret = NF_DROP_ERR(err); diff --git a/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch index 740ffec4a..b0e69af9c 100644 --- a/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch +++ b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch @@ -29,48 +29,35 @@ #include #include -@@ -170,6 +173,67 @@ static void __init ar913x_usb_setup(void +@@ -170,6 +173,44 @@ static void __init ar913x_usb_setup(void &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); } -+static void __init ar933x_usb_setup_ctrl_config(void) -+{ -+ void __iomem *usb_ctrl_base, *usb_config_reg; -+ u32 usb_config; -+ -+ usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); -+ usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG; -+ usb_config = __raw_readl(usb_config_reg); -+ usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY; -+ __raw_writel(usb_config, usb_config_reg); -+ iounmap(usb_ctrl_base); -+} -+ -+static void __init ar9xxx_ci_usb_setup(void) ++static void __init ar9xxx_ci_usb_setup(int bus_id, int irq) +{ + struct ci_hdrc_platform_data ci_pdata; -+ enum usb_dr_mode dr_mode; + bool host_mode = true; + + if (soc_is_ar933x()) + host_mode = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) & + AR933X_BOOTSTRAP_USB_MODE_HOST; -+ else if (soc_is_ar934x() || soc_is_qca955x()) ++ else + host_mode = !(ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP) & + AR934X_BOOTSTRAP_USB_MODE_DEVICE); + + if (host_mode) { -+ dr_mode = USB_DR_MODE_HOST; -+ } else { -+ dr_mode = USB_DR_MODE_PERIPHERAL; -+ if (soc_is_ar933x()) -+ ar933x_usb_setup_ctrl_config(); ++ ath79_usb_register("ehci-platform", bus_id, ++ AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ++ irq, &ath79_ehci_pdata_v2, ++ sizeof(ath79_ehci_pdata_v2)); ++ ++ return; + } + + memset(&ci_pdata, 0, sizeof(ci_pdata)); + ci_pdata.name = "ci_hdrc_ar9xxx"; + ci_pdata.capoffset = DEF_CAPOFFSET; -+ ci_pdata.dr_mode = dr_mode; ++ ci_pdata.dr_mode = USB_DR_MODE_PERIPHERAL; + ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP; + ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV); + ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV); @@ -80,24 +67,14 @@ + PLATFORM_DEVID_AUTO, NULL, 0); + + ath79_usb_register("ci_hdrc", -1, -+ AR933X_EHCI_BASE, AR933X_EHCI_SIZE, -+ ATH79_CPU_IRQ(3), -+ &ci_pdata, sizeof(ci_pdata)); -+ -+ if (!host_mode) -+ return; -+ -+ ath79_usb_register("ehci-platform", -1, + AR934X_EHCI_BASE, AR934X_EHCI_SIZE, -+ ATH79_CPU_IRQ(3), -+ &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ++ irq, &ci_pdata, sizeof(ci_pdata)); +} + static void __init ar933x_usb_setup(void) { ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); -@@ -181,10 +245,7 @@ static void __init ar933x_usb_setup(void +@@ -181,10 +222,7 @@ static void __init ar933x_usb_setup(void ath79_device_reset_clear(AR933X_RESET_USB_PHY); mdelay(10); @@ -105,11 +82,11 @@ - AR933X_EHCI_BASE, AR933X_EHCI_SIZE, - ATH79_CPU_IRQ(3), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ar9xxx_ci_usb_setup(); ++ ar9xxx_ci_usb_setup(-1, ATH79_CPU_IRQ(3)); } static void enable_tx_tx_idp_violation_fix(unsigned base) -@@ -230,10 +291,7 @@ static void __init ar934x_usb_setup(void +@@ -230,10 +268,7 @@ static void __init ar934x_usb_setup(void if (ath79_soc_rev >= 3) ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; @@ -117,7 +94,31 @@ - AR934X_EHCI_BASE, AR934X_EHCI_SIZE, - ATH79_CPU_IRQ(3), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ar9xxx_ci_usb_setup(); ++ ar9xxx_ci_usb_setup(-1, ATH79_CPU_IRQ(3)); } static void __init qca953x_usb_setup(void) +@@ -254,10 +289,7 @@ static void __init qca953x_usb_setup(voi + ath79_device_reset_clear(QCA953X_RESET_USB_HOST); + udelay(1000); + +- ath79_usb_register("ehci-platform", -1, +- QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ar9xxx_ci_usb_setup(-1, ATH79_CPU_IRQ(3)); + } + + static void qca955x_usb_reset_notifier(struct platform_device *pdev) +@@ -285,10 +317,7 @@ static void __init qca955x_usb_setup(voi + { + ath79_ehci_pdata_v2.reset_notifier = qca955x_usb_reset_notifier; + +- ath79_usb_register("ehci-platform", 0, +- QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, +- ATH79_IP3_IRQ(0), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ar9xxx_ci_usb_setup(0, ATH79_IP3_IRQ(0)); + + ath79_usb_register("ehci-platform", 1, + QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE, diff --git a/target/linux/ar71xx/patches-4.9/921-MIPS-ath79-add-even-more-register-defines-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-4.9/921-MIPS-ath79-add-even-more-register-defines-for-QCA956x-SoC.patch new file mode 100644 index 000000000..a4608ea48 --- /dev/null +++ b/target/linux/ar71xx/patches-4.9/921-MIPS-ath79-add-even-more-register-defines-for-QCA956x-SoC.patch @@ -0,0 +1,194 @@ +Add more registers for QCA955x and QCA956x. + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -175,6 +175,35 @@ + /* + * Hidden Registers + */ ++#define QCA956X_MAC_CFG_BASE 0xb9000000 ++#define QCA956X_MAC_CFG_SIZE 0x64 ++ ++#define QCA956X_MAC_CFG1_REG 0x00 ++#define QCA956X_MAC_CFG1_SOFT_RST BIT(31) ++#define QCA956X_MAC_CFG1_RX_RST BIT(19) ++#define QCA956X_MAC_CFG1_TX_RST BIT(18) ++#define QCA956X_MAC_CFG1_LOOPBACK BIT(8) ++#define QCA956X_MAC_CFG1_RX_EN BIT(2) ++#define QCA956X_MAC_CFG1_TX_EN BIT(0) ++ ++#define QCA956X_MAC_CFG2_REG 0x04 ++#define QCA956X_MAC_CFG2_IF_1000 BIT(9) ++#define QCA956X_MAC_CFG2_IF_10_100 BIT(8) ++#define QCA956X_MAC_CFG2_HUGE_FRAME_EN BIT(5) ++#define QCA956X_MAC_CFG2_LEN_CHECK BIT(4) ++#define QCA956X_MAC_CFG2_PAD_CRC_EN BIT(2) ++#define QCA956X_MAC_CFG2_FDX BIT(0) ++ ++#define QCA956X_MAC_MII_MGMT_CFG_REG 0x20 ++#define QCA956X_MGMT_CFG_CLK_DIV_20 0x07 ++ ++#define QCA956X_MAC_FIFO_CFG0_REG 0x48 ++#define QCA956X_MAC_FIFO_CFG1_REG 0x4c ++#define QCA956X_MAC_FIFO_CFG2_REG 0x50 ++#define QCA956X_MAC_FIFO_CFG3_REG 0x54 ++#define QCA956X_MAC_FIFO_CFG4_REG 0x58 ++#define QCA956X_MAC_FIFO_CFG5_REG 0x5c ++ + #define QCA956X_DAM_RESET_OFFSET 0xb90001bc + #define QCA956X_DAM_RESET_SIZE 0x4 + #define QCA956X_INLINE_CHKSUM_ENG BIT(27) +@@ -384,6 +413,7 @@ + #define QCA955X_PLL_CLK_CTRL_REG 0x08 + #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 + #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 ++#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c + + #define QCA955X_PLL_CPU_CONFIG_NFRAC_SHIFT 0 + #define QCA955X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f +@@ -416,12 +446,18 @@ + #define QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL BIT(21) + #define QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT BIT(2) ++#define QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK BIT(1) ++#define QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL BIT(0) ++ + #define QCA956X_PLL_CPU_CONFIG_REG 0x00 + #define QCA956X_PLL_CPU_CONFIG1_REG 0x04 + #define QCA956X_PLL_DDR_CONFIG_REG 0x08 + #define QCA956X_PLL_DDR_CONFIG1_REG 0x0c + #define QCA956X_PLL_CLK_CTRL_REG 0x10 ++#define QCA956X_PLL_SWITCH_CLOCK_CONTROL_REG 0x28 + #define QCA956X_PLL_ETH_XMII_CONTROL_REG 0x30 ++#define QCA956X_PLL_ETH_SGMII_SERDES_REG 0x4c + + #define QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT 12 + #define QCA956X_PLL_CPU_CONFIG_REFDIV_MASK 0x1f +@@ -460,6 +496,31 @@ + #define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) + #define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) + ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_USB_REFCLK_FREQ_SEL_SHIFT 8 ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_USB_REFCLK_FREQ_SEL_MASK 0xf ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_EN_PLL_TOP BIT(12) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_2 BIT(13) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL1_1 BIT(14) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL1_2 BIT(15) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_SWITCH_FUNC_TST_MODE BIT(16) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_EEE_ENABLE BIT(17) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_OEN_CLK125M_PLL BIT(18) ++#define QCA956X_PLL_SWITCH_CLOCK_SPARE_SWITCHCLK_SEL BIT(19) ++ ++#define QCA956X_PLL_ETH_XMII_TX_INVERT BIT(1) ++#define QCA956X_PLL_ETH_XMII_GIGE BIT(25) ++#define QCA956X_PLL_ETH_XMII_RX_DELAY_SHIFT 28 ++#define QCA956X_PLL_ETH_XMII_RX_DELAY_MASK 0x3 ++#define QCA956X_PLL_ETH_XMII_TX_DELAY_SHIFT 26 ++#define QCA956X_PLL_ETH_XMII_TX_DELAY_MASK 3 ++ ++#define QCA956X_PLL_ETH_SGMII_SERDES_LOCK_DETECT BIT(2) ++#define QCA956X_PLL_ETH_SGMII_SERDES_PLL_REFCLK BIT(1) ++#define QCA956X_PLL_ETH_SGMII_SERDES_EN_PLL BIT(0) ++ + /* + * USB_CONFIG block + */ +@@ -657,6 +718,25 @@ + #define QCA955X_RESET_MBOX BIT(1) + #define QCA955X_RESET_I2S BIT(0) + ++#define QCA956X_RESET_EXTERNAL BIT(28) ++#define QCA956X_RESET_FULL_CHIP BIT(24) ++#define QCA956X_RESET_GE1_MDIO BIT(23) ++#define QCA956X_RESET_GE0_MDIO BIT(22) ++#define QCA956X_RESET_CPU_NMI BIT(21) ++#define QCA956X_RESET_CPU_COLD BIT(20) ++#define QCA956X_RESET_DMA BIT(19) ++#define QCA956X_RESET_DDR BIT(16) ++#define QCA956X_RESET_GE1_MAC BIT(13) ++#define QCA956X_RESET_SGMII_ANALOG BIT(12) ++#define QCA956X_RESET_USB_PHY_ANALOG BIT(11) ++#define QCA956X_RESET_GE0_MAC BIT(9) ++#define QCA956X_RESET_SGMII BIT(8) ++#define QCA956X_RESET_USB_HOST BIT(5) ++#define QCA956X_RESET_USB_PHY BIT(4) ++#define QCA956X_RESET_USBSUS_OVERRIDE BIT(3) ++#define QCA956X_RESET_SWITCH_ANALOG BIT(2) ++#define QCA956X_RESET_SWITCH BIT(0) ++ + #define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18) + #define AR933X_BOOTSTRAP_EEPBUSY BIT(4) + #define AR933X_BOOTSTRAP_USB_MODE_HOST BIT(3) +@@ -1189,6 +1269,7 @@ + */ + + #define QCA955X_GMAC_REG_ETH_CFG 0x00 ++#define QCA955X_GMAC_REG_SGMII_SERDES 0x18 + + #define QCA955X_ETH_CFG_RGMII_EN BIT(0) + #define QCA955X_ETH_CFG_MII_GE0 BIT(1) +@@ -1210,16 +1291,58 @@ + #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 + #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 + ++#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) ++#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 ++#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf + /* + * QCA956X GMAC Interface + */ + +-#define QCA956X_GMAC_REG_ETH_CFG 0x00 ++#define QCA956X_GMAC_REG_ETH_CFG 0x00 ++#define QCA956X_GMAC_REG_SGMII_RESET 0x14 ++#define QCA956X_GMAC_REG_SGMII_SERDES 0x18 ++#define QCA956X_GMAC_REG_MR_AN_CONTROL 0x1c ++#define QCA956X_GMAC_REG_SGMII_CONFIG 0x34 ++#define QCA956X_GMAC_REG_SGMII_DEBUG 0x58 + ++#define QCA956X_ETH_CFG_RGMII_EN BIT(0) ++#define QCA956X_ETH_CFG_GE0_SGMII BIT(6) + #define QCA956X_ETH_CFG_SW_ONLY_MODE BIT(7) +-#define QCA956X_ETH_CFG_SW_PHY_SWAP BIT(8) ++#define QCA956X_ETH_CFG_SW_PHY_SWAP BIT(8) + #define QCA956X_ETH_CFG_SW_PHY_ADDR_SWAP BIT(9) + #define QCA956X_ETH_CFG_SW_APB_ACCESS BIT(10) + #define QCA956X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13) ++#define QCA956X_ETH_CFG_RXD_DELAY_MASK 0x3 ++#define QCA956X_ETH_CFG_RXD_DELAY_SHIFT 14 ++#define QCA956X_ETH_CFG_RDV_DELAY_MASK 0x3 ++#define QCA956X_ETH_CFG_RDV_DELAY_SHIFT 16 ++ ++#define QCA956X_SGMII_RESET_RX_CLK_N_RESET 0x0 ++#define QCA956X_SGMII_RESET_RX_CLK_N BIT(0) ++#define QCA956X_SGMII_RESET_TX_CLK_N BIT(1) ++#define QCA956X_SGMII_RESET_RX_125M_N BIT(2) ++#define QCA956X_SGMII_RESET_TX_125M_N BIT(3) ++#define QCA956X_SGMII_RESET_HW_RX_125M_N BIT(4) ++ ++#define QCA956X_SGMII_SERDES_CDR_BW_MASK 0x3 ++#define QCA956X_SGMII_SERDES_CDR_BW_SHIFT 1 ++#define QCA956X_SGMII_SERDES_TX_DR_CTRL_MASK 0x7 ++#define QCA956X_SGMII_SERDES_TX_DR_CTRL_SHIFT 4 ++#define QCA956X_SGMII_SERDES_PLL_BW BIT(8) ++#define QCA956X_SGMII_SERDES_VCO_FAST BIT(9) ++#define QCA956X_SGMII_SERDES_VCO_SLOW BIT(10) ++#define QCA956X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) ++#define QCA956X_SGMII_SERDES_EN_SIGNAL_DETECT BIT(16) ++#define QCA956X_SGMII_SERDES_FIBER_SDO BIT(17) ++#define QCA956X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 ++#define QCA956X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf ++#define QCA956X_SGMII_SERDES_VCO_REG_SHIFT 27 ++#define QCA956X_SGMII_SERDES_VCO_REG_MASK 0xf ++ ++#define QCA956X_MR_AN_CONTROL_AN_ENABLE BIT(12) ++#define QCA956X_MR_AN_CONTROL_PHY_RESET BIT(15) ++ ++#define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 ++#define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 + + #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/archs38/Makefile b/target/linux/archs38/Makefile index ef1785217..be6be0472 100644 --- a/target/linux/archs38/Makefile +++ b/target/linux/archs38/Makefile @@ -13,7 +13,7 @@ BOARDNAME:=Synopsys DesignWare ARC HS38 MAINTAINER:=Alexey Brodkin SUBTARGETS:=generic -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 DEVICE_TYPE:=developerboard diff --git a/target/linux/archs38/base-files/etc/board.d/02_network b/target/linux/archs38/base-files/etc/board.d/02_network index d8bdd5067..60a260231 100755 --- a/target/linux/archs38/base-files/etc/board.d/02_network +++ b/target/linux/archs38/base-files/etc/board.d/02_network @@ -8,7 +8,7 @@ board_config_update case "$(board_name)" in -"arc-sdp"*) +"arc-sdp"*|"arc-hsdk"*) ucidef_set_interface_lan "eth0" "dhcp" ;; esac diff --git a/target/linux/archs38/base-files/lib/arc.sh b/target/linux/archs38/base-files/lib/arc.sh index 9ca1a2c09..50aaaa2d2 100644 --- a/target/linux/archs38/base-files/lib/arc.sh +++ b/target/linux/archs38/base-files/lib/arc.sh @@ -21,6 +21,9 @@ arc_board_detect() { "snps,axs103""snps,arc-sdp") board="arc-sdp"; ;; + "snps,hsdk") + board="arc-hsdk"; + ;; "snps,nsim_hs") board="arc-nsim"; ;; diff --git a/target/linux/archs38/config-4.9 b/target/linux/archs38/config-4.14 similarity index 84% rename from target/linux/archs38/config-4.9 rename to target/linux/archs38/config-4.14 index 997a3c233..9a04154a2 100644 --- a/target/linux/archs38/config-4.9 +++ b/target/linux/archs38/config-4.14 @@ -2,8 +2,13 @@ CONFIG_ARC=y # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set # CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set -# CONFIG_ARCH_HAS_SG_CHAIN is not set +CONFIG_ARCH_HAS_SG_CHAIN=y +# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set +# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARC_BUILTIN_DTB_NAME="" CONFIG_ARC_CACHE=y CONFIG_ARC_CACHE_LINE_SHIFT=6 @@ -14,11 +19,10 @@ CONFIG_ARC_CURR_IN_REG=y CONFIG_ARC_DBG=y # CONFIG_ARC_DBG_TLB_PARANOIA is not set CONFIG_ARC_DW2_UNWIND=y -CONFIG_ARC_HAS_COH_CACHES=y +# CONFIG_ARC_HAS_ACCL_REGS is not set CONFIG_ARC_HAS_DCACHE=y # CONFIG_ARC_HAS_DCCM is not set CONFIG_ARC_HAS_DIV_REM=y -CONFIG_ARC_HAS_GFRC=y CONFIG_ARC_HAS_ICACHE=y # CONFIG_ARC_HAS_ICCM is not set CONFIG_ARC_HAS_LL64=y @@ -29,20 +33,20 @@ CONFIG_ARC_KVADDR_SIZE=256 CONFIG_ARC_MCIP=y # CONFIG_ARC_METAWARE_HLINK is not set CONFIG_ARC_MMU_V4=y -CONFIG_ARC_NUMBER_OF_INTERRUPTS=32 # CONFIG_ARC_PAGE_SIZE_16K is not set # CONFIG_ARC_PAGE_SIZE_4K is not set CONFIG_ARC_PAGE_SIZE_8K=y CONFIG_ARC_PLAT_AXS10X=y # CONFIG_ARC_PLAT_EZNPS is not set -CONFIG_ARC_PLAT_SIM=y # CONFIG_ARC_PLAT_TB10X is not set # CONFIG_ARC_SMP_HALT_ON_RESET is not set +CONFIG_ARC_SOC_HSDK=y +CONFIG_ARC_TIMERS=y +CONFIG_ARC_TIMERS_64BIT=y CONFIG_ARC_UBOOT_SUPPORT=y CONFIG_AXS103=y CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y +CONFIG_CLK_HSDK=y CONFIG_CLONE_BACKWARDS=y CONFIG_COMMON_CLK=y # CONFIG_CPU_BIG_ENDIAN is not set @@ -58,13 +62,20 @@ CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set CONFIG_DTC=y +CONFIG_DWMAC_ANARION=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set CONFIG_DWMAC_GENERIC=y CONFIG_DW_APB_ICTL=y +CONFIG_EXPORTFS=y CONFIG_EXT4_FS=y # CONFIG_EZNPS_GIC is not set CONFIG_FIXED_PHY=y CONFIG_FS_MBCACHE=y +CONFIG_FUTEX_PI=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CSUM=y CONFIG_GENERIC_FIND_FIRST_BIT=y @@ -77,6 +88,7 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GPIOLIB=y CONFIG_GPIO_DWAPB=y CONFIG_GPIO_GENERIC=y +# CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y @@ -107,14 +119,12 @@ CONFIG_ISA_ARCV2=y CONFIG_JBD2=y CONFIG_KALLSYMS=y CONFIG_KERNEL_GZIP=y -# CONFIG_LEDS_TRIGGER_MTD is not set CONFIG_LIBFDT=y -CONFIG_LINUX_LINK_BASE=0x80000000 +CONFIG_LINUX_LINK_BASE=0x90000000 +CONFIG_LINUX_RAM_BASE=0x80000000 CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BOARDINFO=y -# CONFIG_MDIO_HISI_FEMAC is not set +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y CONFIG_MFD_SYSCON=y CONFIG_MIGHT_HAVE_PCI=y CONFIG_MMC=y @@ -126,7 +136,6 @@ CONFIG_MMC_DW_PLTFM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_NATIONAL_PHY=y # CONFIG_NET_CADENCE is not set @@ -144,6 +153,7 @@ CONFIG_NET_PTP_CLASSIFY=y # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_NLS=y CONFIG_NO_BOOTMEM=y CONFIG_NO_IOPORT_MAP=y CONFIG_NR_CPUS=4 @@ -157,7 +167,6 @@ CONFIG_OF_MDIO=y CONFIG_OF_NET=y CONFIG_OF_RESERVED_MEM=y CONFIG_PADATA=y -# CONFIG_PCI is not set # CONFIG_PCI_SYSCALL is not set CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 @@ -168,23 +177,14 @@ CONFIG_PREEMPT_COUNT=y # CONFIG_PREEMPT_NONE is not set CONFIG_PREEMPT_RCU=y CONFIG_PTP_1588_CLOCK=y -CONFIG_PWRSEQ_EMMC=y -CONFIG_PWRSEQ_SIMPLE=y CONFIG_RATIONAL=y # CONFIG_RCU_BOOST is not set +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y -# CONFIG_RESET_ATH79 is not set -# CONFIG_RESET_BERLIN is not set CONFIG_RESET_CONTROLLER=y -# CONFIG_RESET_LPC18XX is not set -# CONFIG_RESET_MESON is not set -# CONFIG_RESET_PISTACHIO is not set -# CONFIG_RESET_SOCFPGA is not set -# CONFIG_RESET_STM32 is not set -# CONFIG_RESET_SUNXI is not set -# CONFIG_RESET_ZYNQ is not set +CONFIG_RESET_HSDK=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y # CONFIG_SCHED_INFO is not set @@ -204,7 +204,12 @@ CONFIG_STACKTRACE=y CONFIG_STMMAC_ETH=y CONFIG_STMMAC_PLATFORM=y CONFIG_SWPHY=y +CONFIG_TASKS_RCU=y +CONFIG_THIN_ARCHIVES=y CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_SRCU=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_USB_SUPPORT=y CONFIG_XPS=y diff --git a/target/linux/archs38/generic/profiles/00-default.mk b/target/linux/archs38/generic/profiles/00-default.mk index fd8143a16..b27b5a4df 100644 --- a/target/linux/archs38/generic/profiles/00-default.mk +++ b/target/linux/archs38/generic/profiles/00-default.mk @@ -7,7 +7,7 @@ define Profile/Default NAME:=Default Profile (all drivers) - PACKAGES:= kmod-usb-core kmod-usb-ohci kmod-ath9k-htc wpad-mini + PACKAGES:= kmod-usb-core kmod-usb2 kmod-ath9k-htc wpad-mini endef define Profile/Default/Description diff --git a/target/linux/archs38/image/Makefile b/target/linux/archs38/image/Makefile index 5d941bc94..1e0d3e99f 100644 --- a/target/linux/archs38/image/Makefile +++ b/target/linux/archs38/image/Makefile @@ -33,8 +33,8 @@ TARGET_DEVICES += nsim_hs endif # Root FS on SD-card -KERNEL_LOADADDR := 0x80000000 -DEVICE_DTS_LIST:= axs103_idu nsim_hs_idu +KERNEL_LOADADDR := 0x90000000 +DEVICE_DTS_LIST:= axs103_idu nsim_hs_idu hsdk FAT32_BLOCK_SIZE=1024 FAT32_BLOCKS=$(shell echo $$(($(CONFIG_AXS10X_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE)))) @@ -49,9 +49,11 @@ define Image/Build/SDCard rm -f $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img mkfs.fat $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img -C $(FAT32_BLOCKS) mkimage -C none -A arc -T script -d uEnv.txt $(BIN_DIR)/uEnv.scr + mkenvimage -s 0x4000 -o $(BIN_DIR)/uboot.env ./uboot.env.txt mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uEnv.scr ::boot.scr mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(DTS_DIR)/*.dtb :: mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/$(IMG_PREFIX)-uImage ::uImage + mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uboot.env ::uboot.env ./gen_axs10x_sdcard_img.sh \ $(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE)-sdcard-vfat-$(1).img \ diff --git a/target/linux/archs38/image/uboot.env.txt b/target/linux/archs38/image/uboot.env.txt new file mode 100644 index 000000000..9ae7bd0c6 --- /dev/null +++ b/target/linux/archs38/image/uboot.env.txt @@ -0,0 +1,29 @@ +baudrate=115200 +bootargs=console=ttyS0,115200n8 root=/dev/mmcblk0p2 rootwait +bootcmd=fatload mmc 0:1 0x82000000 uImage && fatload mmc 0:1 0x81000000 hsdk.dtb && bootm 0x82000000 - 0x81000000 +bootdelay=2 +bootfile=uImage +loadaddr=0x82000000 +stderr=serial0@f0005000 +stdin=serial0@f0005000 +stdout=serial0@f0005000 +core_dccm_0=0x10 +core_dccm_1=0x6 +core_dccm_2=0x10 +core_dccm_3=0x6 +core_iccm_0=0x10 +core_iccm_1=0x6 +core_iccm_2=0x10 +core_iccm_3=0x6 +core_mask=0xF +dcache_ena=0x1 +icache_ena=0x1 +non_volatile_limit=0xE +hsdk_hs34=setenv core_mask 0x2; setenv icache_ena 0x0; setenv dcache_ena 0x0; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0x0; +hsdk_hs36=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; +hsdk_hs36_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE; +hsdk_hs38=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; +hsdk_hs38_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE; +hsdk_hs38x2=setenv core_mask 0x3; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; +hsdk_hs38x3=setenv core_mask 0x7; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; +hsdk_hs38x4=setenv core_mask 0xF; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; setenv core_iccm_3 0x6; setenv core_dccm_3 0x6; diff --git a/target/linux/archs38/patches-4.9/700-stmmac-Disable-frame-filtering-completely.patch b/target/linux/archs38/patches-4.14/700-stmmac-Disable-frame-filtering-completely.patch similarity index 98% rename from target/linux/archs38/patches-4.9/700-stmmac-Disable-frame-filtering-completely.patch rename to target/linux/archs38/patches-4.14/700-stmmac-Disable-frame-filtering-completely.patch index 58094ae96..e63c2e934 100644 --- a/target/linux/archs38/patches-4.9/700-stmmac-Disable-frame-filtering-completely.patch +++ b/target/linux/archs38/patches-4.14/700-stmmac-Disable-frame-filtering-completely.patch @@ -20,7 +20,7 @@ Signed-off-by: Alexey Brodkin --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h -@@ -49,7 +49,7 @@ +@@ -46,7 +46,7 @@ #define STMMAC_GET_ENTRY(x, size) ((x + 1) & (size - 1)) #undef FRAME_FILTER_DEBUG diff --git a/target/linux/at91/image/Makefile b/target/linux/at91/image/Makefile index 12607073e..ccaeebe7c 100644 --- a/target/linux/at91/image/Makefile +++ b/target/linux/at91/image/Makefile @@ -9,6 +9,10 @@ include $(INCLUDE_DIR)/image.mk KERNEL_LOADADDR := 0x20008000 +define Build/at91-install-zImage + $(CP) $(KDIR)/zImage $@ +endef + ifeq ($(SUBTARGET),legacy) include ./legacy.mk endif @@ -40,7 +44,7 @@ endef define Device/evaluation-zImage IMAGES += zImage - IMAGE/zImage := install-zImage + IMAGE/zImage := at91-install-zImage endef define Device/evaluation-dtb diff --git a/target/linux/at91/image/sama5.mk b/target/linux/at91/image/sama5.mk index b251d714d..e51a0bce2 100644 --- a/target/linux/at91/image/sama5.mk +++ b/target/linux/at91/image/sama5.mk @@ -16,24 +16,19 @@ define Build/at91-sdcard $(BIN_DIR)/u-boot-$(dts:at91-%=%)_mmc/u-boot.bin \ ::u-boot.bin; \ $(CP) $(BIN_DIR)/at91bootstrap-$(dts:at91-%=%)sd_uboot*/*.bin \ - $(BIN_DIR)/BOOT.bin; \ - mcopy -i $@.boot $(BIN_DIR)/BOOT.bin ::BOOT.bin;) + $@.BOOT.bin; \ + mcopy -i $@.boot $@.BOOT.bin ::BOOT.bin;) ./gen_at91_sdcard_img.sh \ - $(dir $@)$(IMG_PREFIX)-$(DEVICE_NAME)-sdcard.img \ + $@.img \ $@.boot \ $(KDIR)/root.ext4 \ $(AT91_SD_BOOT_PARTSIZE) \ $(CONFIG_TARGET_ROOTFS_PARTSIZE) - gzip -nc9 $(dir $@)$(IMG_PREFIX)-$(DEVICE_NAME)-sdcard.img \ - > $(dir $@)$(IMG_PREFIX)-$(DEVICE_NAME)-sdcard.img.gz + gzip -nc9 $@.img > $@ - $(CP) $(dir $@)$(IMG_PREFIX)-$(DEVICE_NAME)-sdcard.img.gz \ - $(BIN_DIR)/ - - rm -f $(BIN_DIR)/BOOT.bin - rm -f $@.boot + rm -f $@.img $@.boot $@.BOOT.bin endef define Device/evaluation-sdimage diff --git a/target/linux/ath25/image/Makefile b/target/linux/ath25/image/Makefile index 5144ed8a0..5a20bdb64 100644 --- a/target/linux/ath25/image/Makefile +++ b/target/linux/ath25/image/Makefile @@ -9,7 +9,7 @@ include $(INCLUDE_DIR)/image.mk define Build/mkfwimage $(STAGING_DIR_HOST)/bin/mkfwimage \ - -B $(1).OpenWrt.$(REVISION) \ + -B $(1).$(VERSION_DIST).$(REVISION) \ -k $(IMAGE_KERNEL) \ -r $(IMAGE_ROOTFS) \ -o $@.new && \ diff --git a/target/linux/au1000/base-files/lib/upgrade/platform.sh b/target/linux/au1000/base-files/lib/upgrade/platform.sh index 1a9d151c8..7beb4a0d0 100644 --- a/target/linux/au1000/base-files/lib/upgrade/platform.sh +++ b/target/linux/au1000/base-files/lib/upgrade/platform.sh @@ -24,13 +24,3 @@ platform_do_upgrade() { get_image "$1" | tar -Oxvf - $KERNEL_IMG | mtd write - "kernel" get_image "$1" | tar -Oxvf - $ROOTFS_IMG | mtd $conf write - "rootfs" } - -disable_watchdog() { - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} - -append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch b/target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch index dfa312bc3..152f9abc8 100644 --- a/target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch +++ b/target/linux/brcm2708/patches-4.9/950-0021-clk-bcm2835-Mark-GPIO-clocks-enabled-at-boot-as-crit.patch @@ -19,7 +19,7 @@ Signed-off-by: Eric Anholt --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1262,6 +1262,15 @@ static struct clk_hw *bcm2835_register_c +@@ -1266,6 +1266,15 @@ static struct clk_hw *bcm2835_register_c init.name = data->name; init.flags = data->flags | CLK_IGNORE_UNUSED; diff --git a/target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch b/target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch index 9b2a61323..be69c175f 100644 --- a/target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch +++ b/target/linux/brcm2708/patches-4.9/950-0026-Register-the-clocks-early-during-the-boot-process.patch @@ -13,7 +13,7 @@ Signed-off-by: Martin Sperl --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1903,8 +1903,15 @@ static int bcm2835_clk_probe(struct plat +@@ -1907,8 +1907,15 @@ static int bcm2835_clk_probe(struct plat if (ret) return ret; @@ -30,7 +30,7 @@ Signed-off-by: Martin Sperl } static const struct of_device_id bcm2835_clk_of_match[] = { -@@ -1921,7 +1928,11 @@ static struct platform_driver bcm2835_cl +@@ -1925,7 +1932,11 @@ static struct platform_driver bcm2835_cl .probe = bcm2835_clk_probe, }; diff --git a/target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch b/target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch index 8569e4a83..3006fefc2 100644 --- a/target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch +++ b/target/linux/brcm2708/patches-4.9/950-0031-Add-dwc_otg-driver.patch @@ -707,7 +707,7 @@ Signed-off-by: Noralf Trønnes msleep(100); /* Cool down */ --- a/drivers/usb/core/message.c +++ b/drivers/usb/core/message.c -@@ -1908,6 +1908,85 @@ free_interfaces: +@@ -1912,6 +1912,85 @@ free_interfaces: if (cp->string == NULL && !(dev->quirks & USB_QUIRK_CONFIG_INTF_STRINGS)) cp->string = usb_cache_string(dev, cp->desc.iConfiguration); @@ -4629,7 +4629,7 @@ Signed-off-by: Noralf Trønnes +module_exit(fsg_cleanup); --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig -@@ -762,6 +762,19 @@ config USB_HWA_HCD +@@ -754,6 +754,19 @@ config USB_HWA_HCD To compile this driver a module, choose M here: the module will be called "hwa-hc". diff --git a/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch b/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch index 40963de87..07944df1e 100644 --- a/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch +++ b/target/linux/brcm2708/patches-4.9/950-0087-amba_pl011-Don-t-use-DT-aliases-for-numbering.patch @@ -14,7 +14,7 @@ use the same logic. --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c -@@ -2441,7 +2441,12 @@ static int pl011_setup_port(struct devic +@@ -2446,7 +2446,12 @@ static int pl011_setup_port(struct devic if (IS_ERR(base)) return PTR_ERR(base); diff --git a/target/linux/brcm2708/patches-4.9/950-0094-Add-arm64-configuration-and-device-tree-differences.patch b/target/linux/brcm2708/patches-4.9/950-0094-Add-arm64-configuration-and-device-tree-differences.patch index 0cbb4d77f..d2bfb1695 100644 --- a/target/linux/brcm2708/patches-4.9/950-0094-Add-arm64-configuration-and-device-tree-differences.patch +++ b/target/linux/brcm2708/patches-4.9/950-0094-Add-arm64-configuration-and-device-tree-differences.patch @@ -51,7 +51,7 @@ Tested with raspbian-jessie 2016-09-23. + config ARCH_SUNXI bool "Allwinner sunxi 64-bit SoC Family" - select GENERIC_IRQ_CHIP + select ARCH_HAS_RESET_CONTROLLER --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -1,6 +1,7 @@ diff --git a/target/linux/brcm2708/patches-4.9/950-0121-ARM64-Make-it-work-again-on-4.9-1790.patch b/target/linux/brcm2708/patches-4.9/950-0121-ARM64-Make-it-work-again-on-4.9-1790.patch index 96b298dd1..346562246 100644 --- a/target/linux/brcm2708/patches-4.9/950-0121-ARM64-Make-it-work-again-on-4.9-1790.patch +++ b/target/linux/brcm2708/patches-4.9/950-0121-ARM64-Make-it-work-again-on-4.9-1790.patch @@ -16,8 +16,6 @@ Signed-off-by: Michael Zoran 4 files changed, 48 insertions(+), 111 deletions(-) create mode 120000 arch/arm64/boot/dts/overlays -diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms -index 7d213c2c..101794f 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -1,27 +1,5 @@ @@ -48,8 +46,6 @@ index 7d213c2c..101794f 100644 config ARCH_SUNXI bool "Allwinner sunxi 64-bit SoC Family" select GENERIC_IRQ_CHIP -diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile -index 2152448..7aa03be 100644 --- a/arch/arm64/boot/dts/broadcom/Makefile +++ b/arch/arm64/boot/dts/broadcom/Makefile @@ -1,7 +1,15 @@ @@ -77,8 +73,6 @@ index 0000000..ded0864 @@ -0,0 +1 @@ +../../../arm/boot/dts/overlays \ No newline at end of file -diff --git a/arch/arm64/configs/bcmrpi3_defconfig b/arch/arm64/configs/bcmrpi3_defconfig -index 53da5c7..c7e891d 100644 --- a/arch/arm64/configs/bcmrpi3_defconfig +++ b/arch/arm64/configs/bcmrpi3_defconfig @@ -1,52 +1,9 @@ @@ -405,6 +399,3 @@ index 53da5c7..c7e891d 100644 CONFIG_LIBCRC32C=y -CONFIG_BCM2708_VCHIQ=n -CONFIG_ARCH_BCM2835=y --- -2.1.4 - diff --git a/target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch b/target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch index 1ed31c2d2..50e1f47f6 100644 --- a/target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch +++ b/target/linux/brcm2708/patches-4.9/950-0139-usb-dwc2-Avoid-suspending-if-we-re-in-gadget-mode-18.patch @@ -39,7 +39,7 @@ Signed-off-by: Felipe Balbi --- a/drivers/usb/dwc2/hcd.c +++ b/drivers/usb/dwc2/hcd.c -@@ -4365,6 +4365,9 @@ static int _dwc2_hcd_suspend(struct usb_ +@@ -4366,6 +4366,9 @@ static int _dwc2_hcd_suspend(struct usb_ if (!HCD_HW_ACCESSIBLE(hcd)) goto unlock; diff --git a/target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch b/target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch index 448b0375b..d8617dd6d 100644 --- a/target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch +++ b/target/linux/brcm2708/patches-4.9/950-0152-clk-bcm-Support-rate-change-propagation-on-bcm2835-c.patch @@ -34,7 +34,7 @@ Signed-off-by: Stephen Boyd u32 ctl_reg; u32 div_reg; -@@ -1017,10 +1020,60 @@ bcm2835_clk_is_pllc(struct clk_hw *hw) +@@ -1021,10 +1024,60 @@ bcm2835_clk_is_pllc(struct clk_hw *hw) return strncmp(clk_hw_get_name(hw), "pllc", 4) == 0; } @@ -96,7 +96,7 @@ Signed-off-by: Stephen Boyd struct clk_hw *parent, *best_parent = NULL; bool current_parent_is_pllc; unsigned long rate, best_rate = 0; -@@ -1048,9 +1101,8 @@ static int bcm2835_clock_determine_rate( +@@ -1052,9 +1105,8 @@ static int bcm2835_clock_determine_rate( if (bcm2835_clk_is_pllc(parent) && !current_parent_is_pllc) continue; @@ -108,7 +108,7 @@ Signed-off-by: Stephen Boyd if (rate > best_rate && rate <= req->rate) { best_parent = parent; best_prate = prate; -@@ -1271,6 +1323,13 @@ static struct clk_hw *bcm2835_register_c +@@ -1275,6 +1327,13 @@ static struct clk_hw *bcm2835_register_c if ((cprman_read(cprman, data->ctl_reg) & CM_ENABLE) == 0) init.flags &= ~CLK_IS_CRITICAL; diff --git a/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch b/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch index ed082abaa..57517a9f0 100644 --- a/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch +++ b/target/linux/brcm2708/patches-4.9/950-0153-clk-bcm-Allow-rate-change-propagation-to-PLLH_AUX-on.patch @@ -19,7 +19,7 @@ Signed-off-by: Stephen Boyd --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1870,7 +1870,12 @@ static const struct bcm2835_clk_desc clk +@@ -1874,7 +1874,12 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_VECCTL, .div_reg = CM_VECDIV, .int_bits = 4, diff --git a/target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch b/target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch index 01e29775b..4ed991173 100644 --- a/target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch +++ b/target/linux/brcm2708/patches-4.9/950-0154-clk-bcm-Fix-maybe-uninitialized-warning-in-bcm2835_c.patch @@ -18,7 +18,7 @@ Signed-off-by: Stephen Boyd --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1029,7 +1029,7 @@ static unsigned long bcm2835_clock_choos +@@ -1033,7 +1033,7 @@ static unsigned long bcm2835_clock_choos struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); struct bcm2835_cprman *cprman = clock->cprman; const struct bcm2835_clock_data *data = clock->data; diff --git a/target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch b/target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch index 154e06115..138220424 100644 --- a/target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch +++ b/target/linux/brcm2708/patches-4.9/950-0155-clk-bcm2835-Don-t-rate-change-PLLs-on-behalf-of-DSI-.patch @@ -31,7 +31,7 @@ Signed-off-by: Stephen Boyd }; struct bcm2835_clock_data { -@@ -1252,7 +1253,7 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1256,7 +1257,7 @@ bcm2835_register_pll_divider(struct bcm2 init.num_parents = 1; init.name = divider_name; init.ops = &bcm2835_pll_divider_clk_ops; @@ -40,7 +40,7 @@ Signed-off-by: Stephen Boyd divider = devm_kzalloc(cprman->dev, sizeof(*divider), GFP_KERNEL); if (!divider) -@@ -1475,7 +1476,8 @@ static const struct bcm2835_clk_desc clk +@@ -1479,7 +1480,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_CORE, .load_mask = CM_PLLA_LOADCORE, .hold_mask = CM_PLLA_HOLDCORE, @@ -50,7 +50,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLA_PER] = REGISTER_PLL_DIV( .name = "plla_per", .source_pll = "plla", -@@ -1483,7 +1485,8 @@ static const struct bcm2835_clk_desc clk +@@ -1487,7 +1489,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_PER, .load_mask = CM_PLLA_LOADPER, .hold_mask = CM_PLLA_HOLDPER, @@ -60,7 +60,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( .name = "plla_dsi0", .source_pll = "plla", -@@ -1499,7 +1502,8 @@ static const struct bcm2835_clk_desc clk +@@ -1503,7 +1506,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLA_CCP2, .load_mask = CM_PLLA_LOADCCP2, .hold_mask = CM_PLLA_HOLDCCP2, @@ -70,7 +70,7 @@ Signed-off-by: Stephen Boyd /* PLLB is used for the ARM's clock. */ [BCM2835_PLLB] = REGISTER_PLL( -@@ -1523,7 +1527,8 @@ static const struct bcm2835_clk_desc clk +@@ -1527,7 +1531,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLB_ARM, .load_mask = CM_PLLB_LOADARM, .hold_mask = CM_PLLB_HOLDARM, @@ -80,7 +80,7 @@ Signed-off-by: Stephen Boyd /* * PLLC is the core PLL, used to drive the core VPU clock. -@@ -1552,7 +1557,8 @@ static const struct bcm2835_clk_desc clk +@@ -1556,7 +1561,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE0, .load_mask = CM_PLLC_LOADCORE0, .hold_mask = CM_PLLC_HOLDCORE0, @@ -90,7 +90,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLC_CORE1] = REGISTER_PLL_DIV( .name = "pllc_core1", .source_pll = "pllc", -@@ -1560,7 +1566,8 @@ static const struct bcm2835_clk_desc clk +@@ -1564,7 +1570,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE1, .load_mask = CM_PLLC_LOADCORE1, .hold_mask = CM_PLLC_HOLDCORE1, @@ -100,7 +100,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLC_CORE2] = REGISTER_PLL_DIV( .name = "pllc_core2", .source_pll = "pllc", -@@ -1568,7 +1575,8 @@ static const struct bcm2835_clk_desc clk +@@ -1572,7 +1579,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_CORE2, .load_mask = CM_PLLC_LOADCORE2, .hold_mask = CM_PLLC_HOLDCORE2, @@ -110,7 +110,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLC_PER] = REGISTER_PLL_DIV( .name = "pllc_per", .source_pll = "pllc", -@@ -1576,7 +1584,8 @@ static const struct bcm2835_clk_desc clk +@@ -1580,7 +1588,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLC_PER, .load_mask = CM_PLLC_LOADPER, .hold_mask = CM_PLLC_HOLDPER, @@ -120,7 +120,7 @@ Signed-off-by: Stephen Boyd /* * PLLD is the display PLL, used to drive DSI display panels. -@@ -1605,7 +1614,8 @@ static const struct bcm2835_clk_desc clk +@@ -1609,7 +1618,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLD_CORE, .load_mask = CM_PLLD_LOADCORE, .hold_mask = CM_PLLD_HOLDCORE, @@ -130,7 +130,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLD_PER] = REGISTER_PLL_DIV( .name = "plld_per", .source_pll = "plld", -@@ -1613,7 +1623,8 @@ static const struct bcm2835_clk_desc clk +@@ -1617,7 +1627,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLD_PER, .load_mask = CM_PLLD_LOADPER, .hold_mask = CM_PLLD_HOLDPER, @@ -140,7 +140,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLD_DSI0] = REGISTER_PLL_DIV( .name = "plld_dsi0", .source_pll = "plld", -@@ -1658,7 +1669,8 @@ static const struct bcm2835_clk_desc clk +@@ -1662,7 +1673,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_RCAL, .load_mask = CM_PLLH_LOADRCAL, .hold_mask = 0, @@ -150,7 +150,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLH_AUX] = REGISTER_PLL_DIV( .name = "pllh_aux", .source_pll = "pllh", -@@ -1666,7 +1678,8 @@ static const struct bcm2835_clk_desc clk +@@ -1670,7 +1682,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_AUX, .load_mask = CM_PLLH_LOADAUX, .hold_mask = 0, @@ -160,7 +160,7 @@ Signed-off-by: Stephen Boyd [BCM2835_PLLH_PIX] = REGISTER_PLL_DIV( .name = "pllh_pix", .source_pll = "pllh", -@@ -1674,7 +1687,8 @@ static const struct bcm2835_clk_desc clk +@@ -1678,7 +1691,8 @@ static const struct bcm2835_clk_desc clk .a2w_reg = A2W_PLLH_PIX, .load_mask = CM_PLLH_LOADPIX, .hold_mask = 0, diff --git a/target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch b/target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch index 24e8aedbd..61fae23cf 100644 --- a/target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch +++ b/target/linux/brcm2708/patches-4.9/950-0156-clk-bcm2835-Register-the-DSI0-DSI1-pixel-clocks.patch @@ -76,7 +76,7 @@ Signed-off-by: Stephen Boyd /* Must be last */ struct clk_hw_onecell_data onecell; -@@ -907,6 +928,9 @@ static long bcm2835_clock_rate_from_divi +@@ -911,6 +932,9 @@ static long bcm2835_clock_rate_from_divi const struct bcm2835_clock_data *data = clock->data; u64 temp; @@ -86,7 +86,7 @@ Signed-off-by: Stephen Boyd /* * The divisor is a 12.12 fixed point field, but only some of * the bits are populated in any given clock. -@@ -930,7 +954,12 @@ static unsigned long bcm2835_clock_get_r +@@ -934,7 +958,12 @@ static unsigned long bcm2835_clock_get_r struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); struct bcm2835_cprman *cprman = clock->cprman; const struct bcm2835_clock_data *data = clock->data; @@ -100,7 +100,7 @@ Signed-off-by: Stephen Boyd return bcm2835_clock_rate_from_divisor(clock, parent_rate, div); } -@@ -1209,7 +1238,7 @@ static struct clk_hw *bcm2835_register_p +@@ -1213,7 +1242,7 @@ static struct clk_hw *bcm2835_register_p memset(&init, 0, sizeof(init)); /* All of the PLLs derive from the external oscillator. */ @@ -109,7 +109,7 @@ Signed-off-by: Stephen Boyd init.num_parents = 1; init.name = data->name; init.ops = &bcm2835_pll_clk_ops; -@@ -1295,18 +1324,22 @@ static struct clk_hw *bcm2835_register_c +@@ -1299,18 +1328,22 @@ static struct clk_hw *bcm2835_register_c struct bcm2835_clock *clock; struct clk_init_data init; const char *parents[1 << CM_SRC_BITS]; @@ -139,7 +139,7 @@ Signed-off-by: Stephen Boyd } memset(&init, 0, sizeof(init)); -@@ -1442,6 +1475,47 @@ static const char *const bcm2835_clock_v +@@ -1446,6 +1479,47 @@ static const char *const bcm2835_clock_v __VA_ARGS__) /* @@ -187,7 +187,7 @@ Signed-off-by: Stephen Boyd * the real definition of all the pll, pll_dividers and clocks * these make use of the above REGISTER_* macros */ -@@ -1904,6 +1978,18 @@ static const struct bcm2835_clk_desc clk +@@ -1908,6 +1982,18 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_DSI1EDIV, .int_bits = 4, .frac_bits = 8), @@ -206,7 +206,7 @@ Signed-off-by: Stephen Boyd /* the gates */ -@@ -1962,8 +2048,19 @@ static int bcm2835_clk_probe(struct plat +@@ -1966,8 +2052,19 @@ static int bcm2835_clk_probe(struct plat if (IS_ERR(cprman->regs)) return PTR_ERR(cprman->regs); diff --git a/target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch b/target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch index 16c5ec5cb..f4190864c 100644 --- a/target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch +++ b/target/linux/brcm2708/patches-4.9/950-0157-clk-bcm2835-Add-leaf-clock-measurement-support-disab.patch @@ -107,7 +107,7 @@ Signed-off-by: Stephen Boyd }; struct bcm2835_gate_data { -@@ -1008,6 +1067,17 @@ static int bcm2835_clock_on(struct clk_h +@@ -1012,6 +1071,17 @@ static int bcm2835_clock_on(struct clk_h CM_GATE); spin_unlock(&cprman->regs_lock); @@ -125,7 +125,7 @@ Signed-off-by: Stephen Boyd return 0; } -@@ -1774,7 +1844,8 @@ static const struct bcm2835_clk_desc clk +@@ -1778,7 +1848,8 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_OTPCTL, .div_reg = CM_OTPDIV, .int_bits = 4, @@ -135,7 +135,7 @@ Signed-off-by: Stephen Boyd /* * Used for a 1Mhz clock for the system clocksource, and also used * bythe watchdog timer and the camera pulse generator. -@@ -1808,13 +1879,15 @@ static const struct bcm2835_clk_desc clk +@@ -1812,13 +1883,15 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_H264CTL, .div_reg = CM_H264DIV, .int_bits = 4, @@ -153,7 +153,7 @@ Signed-off-by: Stephen Boyd /* * Secondary SDRAM clock. Used for low-voltage modes when the PLL -@@ -1825,13 +1898,15 @@ static const struct bcm2835_clk_desc clk +@@ -1829,13 +1902,15 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_SDCCTL, .div_reg = CM_SDCDIV, .int_bits = 6, @@ -171,7 +171,7 @@ Signed-off-by: Stephen Boyd /* * VPU clock. This doesn't have an enable bit, since it drives * the bus for everything else, and is special so it doesn't need -@@ -1845,7 +1920,8 @@ static const struct bcm2835_clk_desc clk +@@ -1849,7 +1924,8 @@ static const struct bcm2835_clk_desc clk .int_bits = 12, .frac_bits = 8, .flags = CLK_IS_CRITICAL, @@ -181,7 +181,7 @@ Signed-off-by: Stephen Boyd /* clocks with per parent mux */ [BCM2835_CLOCK_AVEO] = REGISTER_PER_CLK( -@@ -1853,19 +1929,22 @@ static const struct bcm2835_clk_desc clk +@@ -1857,19 +1933,22 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_AVEOCTL, .div_reg = CM_AVEODIV, .int_bits = 4, @@ -207,7 +207,7 @@ Signed-off-by: Stephen Boyd [BCM2835_CLOCK_DFT] = REGISTER_PER_CLK( .name = "dft", .ctl_reg = CM_DFTCTL, -@@ -1877,7 +1956,8 @@ static const struct bcm2835_clk_desc clk +@@ -1881,7 +1960,8 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_DPICTL, .div_reg = CM_DPIDIV, .int_bits = 4, @@ -217,7 +217,7 @@ Signed-off-by: Stephen Boyd /* Arasan EMMC clock */ [BCM2835_CLOCK_EMMC] = REGISTER_PER_CLK( -@@ -1885,7 +1965,8 @@ static const struct bcm2835_clk_desc clk +@@ -1889,7 +1969,8 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_EMMCCTL, .div_reg = CM_EMMCDIV, .int_bits = 4, @@ -227,7 +227,7 @@ Signed-off-by: Stephen Boyd /* General purpose (GPIO) clocks */ [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK( -@@ -1894,7 +1975,8 @@ static const struct bcm2835_clk_desc clk +@@ -1898,7 +1979,8 @@ static const struct bcm2835_clk_desc clk .div_reg = CM_GP0DIV, .int_bits = 12, .frac_bits = 12, @@ -237,7 +237,7 @@ Signed-off-by: Stephen Boyd [BCM2835_CLOCK_GP1] = REGISTER_PER_CLK( .name = "gp1", .ctl_reg = CM_GP1CTL, -@@ -1902,7 +1984,8 @@ static const struct bcm2835_clk_desc clk +@@ -1906,7 +1988,8 @@ static const struct bcm2835_clk_desc clk .int_bits = 12, .frac_bits = 12, .flags = CLK_IS_CRITICAL, @@ -247,7 +247,7 @@ Signed-off-by: Stephen Boyd [BCM2835_CLOCK_GP2] = REGISTER_PER_CLK( .name = "gp2", .ctl_reg = CM_GP2CTL, -@@ -1917,40 +2000,46 @@ static const struct bcm2835_clk_desc clk +@@ -1921,40 +2004,46 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_HSMCTL, .div_reg = CM_HSMDIV, .int_bits = 4, @@ -300,7 +300,7 @@ Signed-off-by: Stephen Boyd /* TV encoder clock. Only operating frequency is 108Mhz. */ [BCM2835_CLOCK_VEC] = REGISTER_PER_CLK( -@@ -1963,7 +2052,8 @@ static const struct bcm2835_clk_desc clk +@@ -1967,7 +2056,8 @@ static const struct bcm2835_clk_desc clk * Allow rate change propagation only on PLLH_AUX which is * assigned index 7 in the parent array. */ @@ -310,7 +310,7 @@ Signed-off-by: Stephen Boyd /* dsi clocks */ [BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK( -@@ -1971,25 +2061,29 @@ static const struct bcm2835_clk_desc clk +@@ -1975,25 +2065,29 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_DSI0ECTL, .div_reg = CM_DSI0EDIV, .int_bits = 4, diff --git a/target/linux/brcm2708/patches-4.9/950-0182-drm-vc4-Verify-at-boot-that-CMA-doesn-t-cross-a-256M.patch b/target/linux/brcm2708/patches-4.9/950-0182-drm-vc4-Verify-at-boot-that-CMA-doesn-t-cross-a-256M.patch index 453d027ae..f17293ce7 100644 --- a/target/linux/brcm2708/patches-4.9/950-0182-drm-vc4-Verify-at-boot-that-CMA-doesn-t-cross-a-256M.patch +++ b/target/linux/brcm2708/patches-4.9/950-0182-drm-vc4-Verify-at-boot-that-CMA-doesn-t-cross-a-256M.patch @@ -37,7 +37,7 @@ Signed-off-by: Eric Anholt #include "linux/pm_runtime.h" #include "vc4_drv.h" #include "vc4_regs.h" -@@ -185,8 +188,23 @@ static int vc4_v3d_bind(struct device *d +@@ -188,8 +191,23 @@ static int vc4_v3d_bind(struct device *d struct drm_device *drm = dev_get_drvdata(master); struct vc4_dev *vc4 = to_vc4_dev(drm); struct vc4_v3d *v3d = NULL; @@ -76,4 +76,4 @@ Signed-off-by: Eric Anholt +EXPORT_SYMBOL(cma_get_size); static unsigned long cma_bitmap_aligned_mask(const struct cma *cma, - int align_order) + unsigned int align_order) diff --git a/target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch b/target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch index 13f6c11f5..c8e715100 100644 --- a/target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch +++ b/target/linux/brcm2708/patches-4.9/950-0185-clk-bcm2835-Mark-used-PLLs-and-dividers-CRITICAL.patch @@ -14,7 +14,7 @@ Signed-off-by: Phil Elwell --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1366,6 +1366,11 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1370,6 +1370,11 @@ bcm2835_register_pll_divider(struct bcm2 divider->div.hw.init = &init; divider->div.table = NULL; diff --git a/target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch b/target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch index 09dcfa7a6..09d449a8c 100644 --- a/target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch +++ b/target/linux/brcm2708/patches-4.9/950-0186-clk-bcm2835-Add-claim-clocks-property.patch @@ -48,7 +48,7 @@ Signed-off-by: Phil Elwell cma-192 = <0>,"-0+1-2-3-4"; --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1298,6 +1298,8 @@ static const struct clk_ops bcm2835_vpu_ +@@ -1302,6 +1302,8 @@ static const struct clk_ops bcm2835_vpu_ .debug_init = bcm2835_clock_debug_init, }; @@ -57,7 +57,7 @@ Signed-off-by: Phil Elwell static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman, const struct bcm2835_pll_data *data) { -@@ -1314,6 +1316,9 @@ static struct clk_hw *bcm2835_register_p +@@ -1318,6 +1320,9 @@ static struct clk_hw *bcm2835_register_p init.ops = &bcm2835_pll_clk_ops; init.flags = CLK_IGNORE_UNUSED; @@ -67,7 +67,7 @@ Signed-off-by: Phil Elwell pll = kzalloc(sizeof(*pll), GFP_KERNEL); if (!pll) return NULL; -@@ -1367,8 +1372,10 @@ bcm2835_register_pll_divider(struct bcm2 +@@ -1371,8 +1376,10 @@ bcm2835_register_pll_divider(struct bcm2 divider->div.table = NULL; if (!(cprman_read(cprman, data->cm_reg) & data->hold_mask)) { @@ -80,7 +80,7 @@ Signed-off-by: Phil Elwell } divider->cprman = cprman; -@@ -2104,6 +2111,8 @@ static const struct bcm2835_clk_desc clk +@@ -2108,6 +2115,8 @@ static const struct bcm2835_clk_desc clk .ctl_reg = CM_PERIICTL), }; @@ -89,7 +89,7 @@ Signed-off-by: Phil Elwell /* * Permanently take a reference on the parent of the SDRAM clock. * -@@ -2123,6 +2132,19 @@ static int bcm2835_mark_sdc_parent_criti +@@ -2127,6 +2136,19 @@ static int bcm2835_mark_sdc_parent_criti return clk_prepare_enable(parent); } @@ -109,7 +109,7 @@ Signed-off-by: Phil Elwell static int bcm2835_clk_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; -@@ -2132,6 +2154,7 @@ static int bcm2835_clk_probe(struct plat +@@ -2136,6 +2158,7 @@ static int bcm2835_clk_probe(struct plat const struct bcm2835_clk_desc *desc; const size_t asize = ARRAY_SIZE(clk_desc_array); size_t i; @@ -117,7 +117,7 @@ Signed-off-by: Phil Elwell int ret; cprman = devm_kzalloc(dev, sizeof(*cprman) + -@@ -2147,6 +2170,13 @@ static int bcm2835_clk_probe(struct plat +@@ -2151,6 +2174,13 @@ static int bcm2835_clk_probe(struct plat if (IS_ERR(cprman->regs)) return PTR_ERR(cprman->regs); diff --git a/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch b/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch index 2bd501d8d..11293c360 100644 --- a/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch +++ b/target/linux/brcm2708/patches-4.9/950-0195-amba_pl011-Round-input-clock-up.patch @@ -26,7 +26,7 @@ Signed-off-by: Phil Elwell --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c -@@ -1646,6 +1646,23 @@ static void pl011_put_poll_char(struct u +@@ -1651,6 +1651,23 @@ static void pl011_put_poll_char(struct u #endif /* CONFIG_CONSOLE_POLL */ @@ -50,7 +50,7 @@ Signed-off-by: Phil Elwell static int pl011_hwinit(struct uart_port *port) { struct uart_amba_port *uap = -@@ -1662,7 +1679,7 @@ static int pl011_hwinit(struct uart_port +@@ -1667,7 +1684,7 @@ static int pl011_hwinit(struct uart_port if (retval) return retval; @@ -59,7 +59,7 @@ Signed-off-by: Phil Elwell /* Clear pending error and receive interrupts */ pl011_write(UART011_OEIS | UART011_BEIS | UART011_PEIS | -@@ -2300,7 +2317,7 @@ static int __init pl011_console_setup(st +@@ -2305,7 +2322,7 @@ static int __init pl011_console_setup(st plat->init(); } @@ -68,7 +68,7 @@ Signed-off-by: Phil Elwell if (uap->vendor->fixed_options) { baud = uap->fixed_baud; -@@ -2372,6 +2389,7 @@ static struct uart_driver amba_reg = { +@@ -2377,6 +2394,7 @@ static struct uart_driver amba_reg = { .cons = AMBA_CONSOLE, }; @@ -76,7 +76,7 @@ Signed-off-by: Phil Elwell static int pl011_probe_dt_alias(int index, struct device *dev) { struct device_node *np; -@@ -2403,6 +2421,7 @@ static int pl011_probe_dt_alias(int inde +@@ -2408,6 +2426,7 @@ static int pl011_probe_dt_alias(int inde return ret; } diff --git a/target/linux/brcm47xx/config-4.14 b/target/linux/brcm47xx/config-4.14 new file mode 100644 index 000000000..9211d10e6 --- /dev/null +++ b/target/linux/brcm47xx/config-4.14 @@ -0,0 +1,222 @@ +CONFIG_ADM6996_PHY=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set +# CONFIG_ARCH_HAS_SG_CHAIN is not set +# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set +# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_BCM47XX=y +CONFIG_BCM47XX_BCMA=y +CONFIG_BCM47XX_NVRAM=y +CONFIG_BCM47XX_SPROM=y +CONFIG_BCM47XX_SSB=y +CONFIG_BCM47XX_WDT=y +CONFIG_BCMA=y +CONFIG_BCMA_BLOCKIO=y +CONFIG_BCMA_DEBUG=y +CONFIG_BCMA_DRIVER_GMAC_CMN=y +CONFIG_BCMA_DRIVER_GPIO=y +CONFIG_BCMA_DRIVER_MIPS=y +CONFIG_BCMA_DRIVER_PCI=y +CONFIG_BCMA_DRIVER_PCI_HOSTMODE=y +CONFIG_BCMA_HOST_PCI=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +CONFIG_BCMA_HOST_SOC=y +CONFIG_BCMA_NFLASH=y +CONFIG_BCMA_PFLASH=y +CONFIG_BCMA_SFLASH=y +# CONFIG_BGMAC_BCMA is not set +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="noinitrd console=ttyS0,115200" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +# CONFIG_CPU_BMIPS is not set +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +CONFIG_CPU_MIPSR1=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_R4K_FPU=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set +# CONFIG_EARLY_PRINTK is not set +CONFIG_EXPORTFS=y +CONFIG_FIXED_PHY=y +CONFIG_FUTEX_PI=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_WDT=y +# CONFIG_GRO_CELLS is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CBPF_JIT=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_COPY_THREAD_TLS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DEBUG_STACKOVERFLOW=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LEDS_GPIO_REGISTER=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y +# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_MACHINE is not set +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_BCM47XXSFLASH=y +CONFIG_MTD_BCM47XX_PARTS=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_BCM47XXNFLASH=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_PARSER_TRX=y +CONFIG_MTD_PHYSMAP=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +# CONFIG_NO_IOPORT_MAP is not set +# CONFIG_OF is not set +CONFIG_PCI=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +# CONFIG_RCU_NEED_SEGCBLIST is not set +# CONFIG_RCU_STALL_COMMON is not set +# CONFIG_SCHED_INFO is not set +# CONFIG_SCSI_DMA is not set +CONFIG_SERIAL_8250_EXTENDED=y +# CONFIG_SERIAL_8250_FSL is not set +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SRCU=y +CONFIG_SSB=y +CONFIG_SSB_B43_PCI_BRIDGE=y +CONFIG_SSB_BLOCKIO=y +CONFIG_SSB_DEBUG=y +CONFIG_SSB_DRIVER_EXTIF=y +CONFIG_SSB_DRIVER_GIGE=y +CONFIG_SSB_DRIVER_GPIO=y +CONFIG_SSB_DRIVER_MIPS=y +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_EMBEDDED=y +CONFIG_SSB_HOST_SOC=y +CONFIG_SSB_PCICORE_HOSTMODE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_SERIAL=y +CONFIG_SSB_SFLASH=y +CONFIG_SSB_SPROM=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_B53=y +# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set +CONFIG_SWCONFIG_B53_PHY_DRIVER=y +CONFIG_SWCONFIG_B53_PHY_FIXUP=y +# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_HIGHMEM=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_THIN_ARCHIVES=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y +CONFIG_WATCHDOG_CORE=y diff --git a/target/linux/brcm47xx/patches-4.14/031-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch b/target/linux/brcm47xx/patches-4.14/031-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch new file mode 100644 index 000000000..e8b426f86 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/031-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch @@ -0,0 +1,86 @@ +From 272641206100e89656038180da12eff4f03d79d1 Mon Sep 17 00:00:00 2001 +From: Dan Haab +Date: Tue, 27 Mar 2018 11:24:34 -0600 +Subject: [PATCH] MIPS: BCM47XX: Add Luxul XAP1500/XWR1750 WiFi LEDs + +Some Luxul devices use PCIe connected GPIO LEDs that are not available +until the PCI subsytem and its drivers load. Using the same array for +these LEDs would block registering any LEDs until all GPIOs become +available. This may be undesired behavior as some LEDs should be +available as early as possible (e.g. system status LED). This patch will +allow registering available LEDs while deferring these PCIe GPIO +connected 'extra' LEDs until they become available. + +Signed-off-by: Dan Haab +Cc: Ralf Baechle +Cc: Hauke Mehrtens +Cc: linux-mips@linux-mips.org +Patchwork: https://patchwork.linux-mips.org/patch/18952/ +Signed-off-by: James Hogan +--- + arch/mips/bcm47xx/leds.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/arch/mips/bcm47xx/leds.c ++++ b/arch/mips/bcm47xx/leds.c +@@ -409,6 +409,12 @@ bcm47xx_leds_luxul_xap_1500_v1[] __initc + }; + + static const struct gpio_led ++bcm47xx_leds_luxul_xap1500_v1_extra[] __initconst = { ++ BCM47XX_GPIO_LED(44, "green", "5ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++ BCM47XX_GPIO_LED(76, "green", "2ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ ++static const struct gpio_led + bcm47xx_leds_luxul_xbr_4400_v1[] __initconst = { + BCM47XX_GPIO_LED(12, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF), + BCM47XX_GPIO_LED_TRIGGER(15, "green", "status", 0, "timer"), +@@ -435,6 +441,11 @@ bcm47xx_leds_luxul_xwr_1750_v1[] __initc + BCM47XX_GPIO_LED(15, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF), + }; + ++static const struct gpio_led ++bcm47xx_leds_luxul_xwr1750_v1_extra[] __initconst = { ++ BCM47XX_GPIO_LED(76, "green", "2ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ + /* Microsoft */ + + static const struct gpio_led +@@ -528,6 +539,12 @@ static struct gpio_led_platform_data bcm + bcm47xx_leds_pdata.num_leds = ARRAY_SIZE(dev_leds); \ + } while (0) + ++static struct gpio_led_platform_data bcm47xx_leds_pdata_extra __initdata = {}; ++#define bcm47xx_set_pdata_extra(dev_leds) do { \ ++ bcm47xx_leds_pdata_extra.leds = dev_leds; \ ++ bcm47xx_leds_pdata_extra.num_leds = ARRAY_SIZE(dev_leds); \ ++} while (0) ++ + void __init bcm47xx_leds_register(void) + { + enum bcm47xx_board board = bcm47xx_board_get(); +@@ -705,6 +722,7 @@ void __init bcm47xx_leds_register(void) + break; + case BCM47XX_BOARD_LUXUL_XAP_1500_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xap_1500_v1); ++ bcm47xx_set_pdata_extra(bcm47xx_leds_luxul_xap1500_v1_extra); + break; + case BCM47XX_BOARD_LUXUL_XBR_4400_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xbr_4400_v1); +@@ -717,6 +735,7 @@ void __init bcm47xx_leds_register(void) + break; + case BCM47XX_BOARD_LUXUL_XWR_1750_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xwr_1750_v1); ++ bcm47xx_set_pdata_extra(bcm47xx_leds_luxul_xwr1750_v1_extra); + break; + + case BCM47XX_BOARD_MICROSOFT_MN700: +@@ -760,4 +779,6 @@ void __init bcm47xx_leds_register(void) + } + + gpio_led_register_device(-1, &bcm47xx_leds_pdata); ++ if (bcm47xx_leds_pdata_extra.num_leds) ++ gpio_led_register_device(0, &bcm47xx_leds_pdata_extra); + } diff --git a/target/linux/brcm47xx/patches-4.14/159-cpu_fixes.patch b/target/linux/brcm47xx/patches-4.14/159-cpu_fixes.patch new file mode 100644 index 000000000..32df8009e --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/159-cpu_fixes.patch @@ -0,0 +1,509 @@ +--- a/arch/mips/include/asm/r4kcache.h ++++ b/arch/mips/include/asm/r4kcache.h +@@ -25,6 +25,38 @@ + extern void (*r4k_blast_dcache)(void); + extern void (*r4k_blast_icache)(void); + ++#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2) ++#include ++#include ++#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg() ++ ++static inline unsigned long bcm4710_dummy_rreg(void) ++{ ++ return *(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE)); ++} ++ ++#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void *)(addr)) ++ ++static inline unsigned long bcm4710_fill_tlb(void *addr) ++{ ++ return *(unsigned long *)addr; ++} ++ ++#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void *)(addr)) ++ ++static inline void bcm4710_protected_fill_tlb(void *addr) ++{ ++ unsigned long x; ++ get_dbe(x, (unsigned long *)addr);; ++} ++ ++#else ++#define BCM4710_DUMMY_RREG() ++ ++#define BCM4710_FILL_TLB(addr) ++#define BCM4710_PROTECTED_FILL_TLB(addr) ++#endif ++ + /* + * This macro return a properly sign-extended address suitable as base address + * for indexed cache operations. Two issues here: +@@ -98,6 +130,7 @@ static inline void flush_icache_line_ind + static inline void flush_dcache_line_indexed(unsigned long addr) + { + __dflush_prologue ++ BCM4710_DUMMY_RREG(); + cache_op(Index_Writeback_Inv_D, addr); + __dflush_epilogue + } +@@ -125,6 +158,7 @@ static inline void flush_icache_line(uns + static inline void flush_dcache_line(unsigned long addr) + { + __dflush_prologue ++ BCM4710_DUMMY_RREG(); + cache_op(Hit_Writeback_Inv_D, addr); + __dflush_epilogue + } +@@ -132,6 +166,7 @@ static inline void flush_dcache_line(uns + static inline void invalidate_dcache_line(unsigned long addr) + { + __dflush_prologue ++ BCM4710_DUMMY_RREG(); + cache_op(Hit_Invalidate_D, addr); + __dflush_epilogue + } +@@ -205,6 +240,7 @@ static inline int protected_flush_icache + #ifdef CONFIG_EVA + return protected_cachee_op(Hit_Invalidate_I, addr); + #else ++ BCM4710_DUMMY_RREG(); + return protected_cache_op(Hit_Invalidate_I, addr); + #endif + } +@@ -218,6 +254,7 @@ static inline int protected_flush_icache + */ + static inline int protected_writeback_dcache_line(unsigned long addr) + { ++ BCM4710_DUMMY_RREG(); + #ifdef CONFIG_EVA + return protected_cachee_op(Hit_Writeback_Inv_D, addr); + #else +@@ -575,8 +612,51 @@ static inline void invalidate_tcache_pag + : "r" (base), \ + "i" (op)); + ++static inline void blast_dcache(void) ++{ ++ unsigned long start = KSEG0; ++ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways; ++ unsigned long end = (start + dcache_size); ++ ++ do { ++ BCM4710_DUMMY_RREG(); ++ cache_op(Index_Writeback_Inv_D, start); ++ start += current_cpu_data.dcache.linesz; ++ } while(start < end); ++} ++ ++static inline void blast_dcache_page(unsigned long page) ++{ ++ unsigned long start = page; ++ unsigned long end = start + PAGE_SIZE; ++ ++ BCM4710_FILL_TLB(start); ++ do { ++ BCM4710_DUMMY_RREG(); ++ cache_op(Hit_Writeback_Inv_D, start); ++ start += current_cpu_data.dcache.linesz; ++ } while(start < end); ++} ++ ++static inline void blast_dcache_page_indexed(unsigned long page) ++{ ++ unsigned long start = page; ++ unsigned long end = start + PAGE_SIZE; ++ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; ++ unsigned long ws_end = current_cpu_data.dcache.ways << ++ current_cpu_data.dcache.waybit; ++ unsigned long ws, addr; ++ for (ws = 0; ws < ws_end; ws += ws_inc) { ++ start = page + ws; ++ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) { ++ BCM4710_DUMMY_RREG(); ++ cache_op(Index_Writeback_Inv_D, addr); ++ } ++ } ++} ++ + /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */ +-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \ ++#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra, war) \ + static inline void extra##blast_##pfx##cache##lsize(void) \ + { \ + unsigned long start = INDEX_BASE; \ +@@ -588,6 +668,7 @@ static inline void extra##blast_##pfx##c + \ + __##pfx##flush_prologue \ + \ ++ war \ + for (ws = 0; ws < ws_end; ws += ws_inc) \ + for (addr = start; addr < end; addr += lsize * 32) \ + cache##lsize##_unroll32(addr|ws, indexop); \ +@@ -602,6 +683,7 @@ static inline void extra##blast_##pfx##c + \ + __##pfx##flush_prologue \ + \ ++ war \ + do { \ + cache##lsize##_unroll32(start, hitop); \ + start += lsize * 32; \ +@@ -620,6 +702,8 @@ static inline void extra##blast_##pfx##c + current_cpu_data.desc.waybit; \ + unsigned long ws, addr; \ + \ ++ war \ ++ \ + __##pfx##flush_prologue \ + \ + for (ws = 0; ws < ws_end; ws += ws_inc) \ +@@ -629,26 +713,26 @@ static inline void extra##blast_##pfx##c + __##pfx##flush_epilogue \ + } + +-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, ) +-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, ) +-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, ) +-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, ) +-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, ) +-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_) +-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, ) +-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, ) +-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, ) +-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, ) +-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, ) +-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, ) +-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, ) +- +-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, ) +-__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, ) +-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, ) +-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, ) +-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, ) +-__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, ) ++__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, , ) ++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, , BCM4710_FILL_TLB(start);) ++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, , ) ++__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, , ) ++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, , BCM4710_FILL_TLB(start);) ++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_, BCM4710_FILL_TLB(start);) ++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, , ) ++__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, , ) ++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, , BCM4710_FILL_TLB(start);) ++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, , ) ++__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, , ) ++__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, , ) ++__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, , ) ++ ++__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, , ) ++__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, , ) ++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, , ) ++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, , ) ++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, , ) ++__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, , ) + + #define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \ + static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \ +@@ -677,53 +761,23 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde + __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) + + /* build blast_xxx_range, protected_blast_xxx_range */ +-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \ ++#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra, war, war2) \ + static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, \ + unsigned long end) \ + { \ + unsigned long lsize = cpu_##desc##_line_size(); \ +- unsigned long lsize_2 = lsize * 2; \ +- unsigned long lsize_3 = lsize * 3; \ +- unsigned long lsize_4 = lsize * 4; \ +- unsigned long lsize_5 = lsize * 5; \ +- unsigned long lsize_6 = lsize * 6; \ +- unsigned long lsize_7 = lsize * 7; \ +- unsigned long lsize_8 = lsize * 8; \ + unsigned long addr = start & ~(lsize - 1); \ +- unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \ +- int lines = (aend - addr) / lsize; \ ++ unsigned long aend = (end - 1) & ~(lsize - 1); \ ++ war \ + \ + __##pfx##flush_prologue \ + \ +- while (lines >= 8) { \ +- prot##cache_op(hitop, addr); \ +- prot##cache_op(hitop, addr + lsize); \ +- prot##cache_op(hitop, addr + lsize_2); \ +- prot##cache_op(hitop, addr + lsize_3); \ +- prot##cache_op(hitop, addr + lsize_4); \ +- prot##cache_op(hitop, addr + lsize_5); \ +- prot##cache_op(hitop, addr + lsize_6); \ +- prot##cache_op(hitop, addr + lsize_7); \ +- addr += lsize_8; \ +- lines -= 8; \ +- } \ +- \ +- if (lines & 0x4) { \ +- prot##cache_op(hitop, addr); \ +- prot##cache_op(hitop, addr + lsize); \ +- prot##cache_op(hitop, addr + lsize_2); \ +- prot##cache_op(hitop, addr + lsize_3); \ +- addr += lsize_4; \ +- } \ +- \ +- if (lines & 0x2) { \ +- prot##cache_op(hitop, addr); \ +- prot##cache_op(hitop, addr + lsize); \ +- addr += lsize_2; \ +- } \ +- \ +- if (lines & 0x1) { \ ++ while (1) { \ ++ war2 \ + prot##cache_op(hitop, addr); \ ++ if (addr == aend) \ ++ break; \ ++ addr += lsize; \ + } \ + \ + __##pfx##flush_epilogue \ +@@ -731,8 +785,8 @@ static inline void prot##extra##blast_## + + #ifndef CONFIG_EVA + +-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, ) +-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, ) ++__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, , BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) ++__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, , , ) + + #else + +@@ -769,14 +823,14 @@ __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache + __BUILD_PROT_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I) + + #endif +-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, ) ++__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, , , ) + __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \ +- protected_, loongson2_) +-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , ) +-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , ) +-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , ) ++ protected_, loongson2_, , ) ++__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , , BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) ++__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, , , , ) ++__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , , , ) + /* blast_inv_dcache_range */ +-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , ) +-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , ) ++__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, , , , BCM4710_DUMMY_RREG();) ++__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, , , , ) + + #endif /* _ASM_R4KCACHE_H */ +--- a/arch/mips/include/asm/stackframe.h ++++ b/arch/mips/include/asm/stackframe.h +@@ -428,6 +428,10 @@ + eretnc + #else + .set arch=r4000 ++#ifdef CONFIG_BCM47XX ++ nop ++ nop ++#endif + eret + .set mips0 + #endif +--- a/arch/mips/kernel/genex.S ++++ b/arch/mips/kernel/genex.S +@@ -21,6 +21,19 @@ + #include + #include + ++#ifdef CONFIG_BCM47XX ++# ifdef eret ++# undef eret ++# endif ++# define eret \ ++ .set push; \ ++ .set noreorder; \ ++ nop; \ ++ nop; \ ++ eret; \ ++ .set pop; ++#endif ++ + __INIT + + /* +@@ -32,6 +45,9 @@ + NESTED(except_vec3_generic, 0, sp) + .set push + .set noat ++#ifdef CONFIG_BCM47XX ++ nop ++#endif + #if R5432_CP0_INTERRUPT_WAR + mfc0 k0, CP0_INDEX + #endif +@@ -55,6 +71,9 @@ NESTED(except_vec3_r4000, 0, sp) + .set push + .set arch=r4000 + .set noat ++#ifdef CONFIG_BCM47XX ++ nop ++#endif + mfc0 k1, CP0_CAUSE + li k0, 31<<2 + andi k1, k1, 0x7c +--- a/arch/mips/mm/c-r4k.c ++++ b/arch/mips/mm/c-r4k.c +@@ -39,6 +39,9 @@ + #include + #include + ++/* For enabling BCM4710 cache workarounds */ ++static int bcm4710 = 0; ++ + /* + * Bits describing what cache ops an SMP callback function may perform. + * +@@ -190,6 +193,9 @@ static void r4k_blast_dcache_user_page_s + { + unsigned long dc_lsize = cpu_dcache_line_size(); + ++ if (bcm4710) ++ r4k_blast_dcache_page = blast_dcache_page; ++ else + if (dc_lsize == 0) + r4k_blast_dcache_user_page = (void *)cache_noop; + else if (dc_lsize == 16) +@@ -208,6 +214,9 @@ static void r4k_blast_dcache_page_indexe + { + unsigned long dc_lsize = cpu_dcache_line_size(); + ++ if (bcm4710) ++ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed; ++ else + if (dc_lsize == 0) + r4k_blast_dcache_page_indexed = (void *)cache_noop; + else if (dc_lsize == 16) +@@ -227,6 +236,9 @@ static void r4k_blast_dcache_setup(void) + { + unsigned long dc_lsize = cpu_dcache_line_size(); + ++ if (bcm4710) ++ r4k_blast_dcache = blast_dcache; ++ else + if (dc_lsize == 0) + r4k_blast_dcache = (void *)cache_noop; + else if (dc_lsize == 16) +@@ -952,6 +964,8 @@ static void local_r4k_flush_cache_sigtra + } + + R4600_HIT_CACHEOP_WAR_IMPL; ++ BCM4710_PROTECTED_FILL_TLB(addr); ++ BCM4710_PROTECTED_FILL_TLB(addr + 4); + if (!cpu_has_ic_fills_f_dc) { + if (dc_lsize) + vaddr ? flush_dcache_line(addr & ~(dc_lsize - 1)) +@@ -1846,6 +1860,17 @@ static void coherency_setup(void) + * silly idea of putting something else there ... + */ + switch (current_cpu_type()) { ++ case CPU_BMIPS3300: ++ { ++ u32 cm; ++ cm = read_c0_diag(); ++ /* Enable icache */ ++ cm |= (1 << 31); ++ /* Enable dcache */ ++ cm |= (1 << 30); ++ write_c0_diag(cm); ++ } ++ break; + case CPU_R4000PC: + case CPU_R4000SC: + case CPU_R4000MC: +@@ -1892,6 +1917,15 @@ void r4k_cache_init(void) + extern void build_copy_page(void); + struct cpuinfo_mips *c = ¤t_cpu_data; + ++ /* Check if special workarounds are required */ ++#if defined(CONFIG_BCM47XX) && !defined(CONFIG_CPU_MIPS32_R2) ++ if (current_cpu_data.cputype == CPU_BMIPS32 && (current_cpu_data.processor_id & 0xff) == 0) { ++ printk("Enabling BCM4710A0 cache workarounds.\n"); ++ bcm4710 = 1; ++ } else ++#endif ++ bcm4710 = 0; ++ + probe_pcache(); + probe_vcache(); + setup_scache(); +@@ -1969,7 +2003,15 @@ void r4k_cache_init(void) + */ + local_r4k___flush_cache_all(NULL); + ++#ifdef CONFIG_BCM47XX ++ { ++ static void (*_coherency_setup)(void); ++ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup); ++ _coherency_setup(); ++ } ++#else + coherency_setup(); ++#endif + board_cache_error_setup = r4k_cache_error_setup; + + /* +--- a/arch/mips/mm/tlbex.c ++++ b/arch/mips/mm/tlbex.c +@@ -971,6 +971,9 @@ void build_get_pgde32(u32 **p, unsigned + uasm_i_srl(p, ptr, ptr, SMP_CPUID_PTRSHIFT); + uasm_i_addu(p, ptr, tmp, ptr); + #else ++#ifdef CONFIG_BCM47XX ++ uasm_i_nop(p); ++#endif + UASM_i_LA_mostly(p, ptr, pgdc); + #endif + uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */ +@@ -1331,6 +1334,9 @@ static void build_r4000_tlb_refill_handl + #ifdef CONFIG_64BIT + build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ + #else ++# ifdef CONFIG_BCM47XX ++ uasm_i_nop(&p); ++# endif + build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ + #endif + +@@ -1342,6 +1348,9 @@ static void build_r4000_tlb_refill_handl + build_update_entries(&p, K0, K1); + build_tlb_write_entry(&p, &l, &r, tlb_random); + uasm_l_leave(&l, p); ++#ifdef CONFIG_BCM47XX ++ uasm_i_nop(&p); ++#endif + uasm_i_eret(&p); /* return from trap */ + } + #ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT +@@ -2046,6 +2055,9 @@ build_r4000_tlbchange_handler_head(u32 * + #ifdef CONFIG_64BIT + build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */ + #else ++# ifdef CONFIG_BCM47XX ++ uasm_i_nop(p); ++# endif + build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */ + #endif + +@@ -2092,6 +2104,9 @@ build_r4000_tlbchange_handler_tail(u32 * + build_tlb_write_entry(p, l, r, tlb_indexed); + uasm_l_leave(l, *p); + build_restore_work_registers(p); ++#ifdef CONFIG_BCM47XX ++ uasm_i_nop(p); ++#endif + uasm_i_eret(p); /* return from trap */ + + #ifdef CONFIG_64BIT diff --git a/target/linux/brcm47xx/patches-4.14/160-kmap_coherent.patch b/target/linux/brcm47xx/patches-4.14/160-kmap_coherent.patch new file mode 100644 index 000000000..60484ddcb --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/160-kmap_coherent.patch @@ -0,0 +1,78 @@ +From: Jeff Hansen +Subject: [PATCH] kmap_coherent + +On ASUS WL-500gP there are some "Data bus error"s when executing simple +commands liks "ps" or "cat /proc/1/cmdline". + +This fixes OpenWrt ticket #1485: https://dev.openwrt.org/ticket/1485 +--- +--- a/arch/mips/include/asm/cpu-features.h ++++ b/arch/mips/include/asm/cpu-features.h +@@ -187,6 +187,9 @@ + #ifndef cpu_has_local_ebase + #define cpu_has_local_ebase 1 + #endif ++#ifndef cpu_use_kmap_coherent ++#define cpu_use_kmap_coherent 1 ++#endif + + /* + * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors +--- a/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h ++++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h +@@ -80,4 +80,6 @@ + #define cpu_scache_line_size() 0 + #define cpu_has_vz 0 + ++#define cpu_use_kmap_coherent 0 ++ + #endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */ +--- a/arch/mips/mm/c-r4k.c ++++ b/arch/mips/mm/c-r4k.c +@@ -672,7 +672,7 @@ static inline void local_r4k_flush_cache + map_coherent = (cpu_has_dc_aliases && + page_mapcount(page) && + !Page_dcache_dirty(page)); +- if (map_coherent) ++ if (map_coherent && cpu_use_kmap_coherent) + vaddr = kmap_coherent(page, addr); + else + vaddr = kmap_atomic(page); +@@ -697,7 +697,7 @@ static inline void local_r4k_flush_cache + } + + if (vaddr) { +- if (map_coherent) ++ if (map_coherent && cpu_use_kmap_coherent) + kunmap_coherent(); + else + kunmap_atomic(vaddr); +--- a/arch/mips/mm/init.c ++++ b/arch/mips/mm/init.c +@@ -170,7 +170,7 @@ void copy_user_highpage(struct page *to, + void *vfrom, *vto; + + vto = kmap_atomic(to); +- if (cpu_has_dc_aliases && ++ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && + page_mapcount(from) && !Page_dcache_dirty(from)) { + vfrom = kmap_coherent(from, vaddr); + copy_page(vto, vfrom); +@@ -192,7 +192,7 @@ void copy_to_user_page(struct vm_area_st + struct page *page, unsigned long vaddr, void *dst, const void *src, + unsigned long len) + { +- if (cpu_has_dc_aliases && ++ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && + page_mapcount(page) && !Page_dcache_dirty(page)) { + void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); + memcpy(vto, src, len); +@@ -210,7 +210,7 @@ void copy_from_user_page(struct vm_area_ + struct page *page, unsigned long vaddr, void *dst, const void *src, + unsigned long len) + { +- if (cpu_has_dc_aliases && ++ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && + page_mapcount(page) && !Page_dcache_dirty(page)) { + void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); + memcpy(dst, vfrom, len); diff --git a/target/linux/brcm47xx/patches-4.14/209-b44-register-adm-switch.patch b/target/linux/brcm47xx/patches-4.14/209-b44-register-adm-switch.patch new file mode 100644 index 000000000..6e655ac80 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/209-b44-register-adm-switch.patch @@ -0,0 +1,121 @@ +From b36f694256f41bc71571f467646d015dda128d14 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Sat, 9 Nov 2013 17:03:59 +0100 +Subject: [PATCH 210/210] b44: register adm switch + +--- + drivers/net/ethernet/broadcom/b44.c | 57 +++++++++++++++++++++++++++++++++++ + drivers/net/ethernet/broadcom/b44.h | 3 ++ + 2 files changed, 60 insertions(+) + +--- a/drivers/net/ethernet/broadcom/b44.c ++++ b/drivers/net/ethernet/broadcom/b44.c +@@ -31,6 +31,8 @@ + #include + #include + #include ++#include ++#include + + #include + #include +@@ -2248,6 +2250,69 @@ static void b44_adjust_link(struct net_d + } + } + ++#ifdef CONFIG_BCM47XX ++static int b44_register_adm_switch(struct b44 *bp) ++{ ++ int gpio; ++ struct platform_device *pdev; ++ struct adm6996_gpio_platform_data adm_data = {0}; ++ struct platform_device_info info = {0}; ++ ++ adm_data.model = ADM6996L; ++ gpio = bcm47xx_nvram_gpio_pin("adm_eecs"); ++ if (gpio >= 0) ++ adm_data.eecs = gpio; ++ else ++ adm_data.eecs = 2; ++ ++ gpio = bcm47xx_nvram_gpio_pin("adm_eesk"); ++ if (gpio >= 0) ++ adm_data.eesk = gpio; ++ else ++ adm_data.eesk = 3; ++ ++ gpio = bcm47xx_nvram_gpio_pin("adm_eedi"); ++ if (gpio >= 0) ++ adm_data.eedi = gpio; ++ else ++ adm_data.eedi = 4; ++ ++ /* ++ * We ignore the "adm_rc" GPIO here. The driver does not use it, ++ * and it conflicts with the Reset button GPIO on the Linksys WRT54GSv1. ++ */ ++ ++ info.parent = bp->sdev->dev; ++ info.name = "adm6996_gpio"; ++ info.id = -1; ++ info.data = &adm_data; ++ info.size_data = sizeof(adm_data); ++ ++ if (!bp->adm_switch) { ++ pdev = platform_device_register_full(&info); ++ if (IS_ERR(pdev)) ++ return PTR_ERR(pdev); ++ ++ bp->adm_switch = pdev; ++ } ++ return 0; ++} ++static void b44_unregister_adm_switch(struct b44 *bp) ++{ ++ if (bp->adm_switch) ++ platform_device_unregister(bp->adm_switch); ++} ++#else ++static int b44_register_adm_switch(struct b44 *bp) ++{ ++ return 0; ++} ++static void b44_unregister_adm_switch(struct b44 *bp) ++{ ++ ++} ++#endif /* CONFIG_BCM47XX */ ++ + static int b44_register_phy_one(struct b44 *bp) + { + struct mii_bus *mii_bus; +@@ -2283,6 +2348,9 @@ static int b44_register_phy_one(struct b + if (!mdiobus_is_registered_device(bp->mii_bus, bp->phy_addr) && + (sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) { + ++ if (sprom->boardflags_lo & B44_BOARDFLAG_ADM) ++ b44_register_adm_switch(bp); ++ + dev_info(sdev->dev, + "could not find PHY at %i, use fixed one\n", + bp->phy_addr); +@@ -2477,6 +2545,7 @@ static void b44_remove_one(struct ssb_de + unregister_netdev(dev); + if (bp->flags & B44_FLAG_EXTERNAL_PHY) + b44_unregister_phy_one(bp); ++ b44_unregister_adm_switch(bp); + ssb_device_disable(sdev, 0); + ssb_bus_may_powerdown(sdev->bus); + netif_napi_del(&bp->napi); +--- a/drivers/net/ethernet/broadcom/b44.h ++++ b/drivers/net/ethernet/broadcom/b44.h +@@ -408,6 +408,9 @@ struct b44 { + struct mii_bus *mii_bus; + int old_link; + struct mii_if_info mii_if; ++ ++ /* platform device for associated switch */ ++ struct platform_device *adm_switch; + }; + + #endif /* _B44_H */ diff --git a/target/linux/brcm47xx/patches-4.14/210-b44_phy_fix.patch b/target/linux/brcm47xx/patches-4.14/210-b44_phy_fix.patch new file mode 100644 index 000000000..5620d5cd5 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/210-b44_phy_fix.patch @@ -0,0 +1,54 @@ +--- a/drivers/net/ethernet/broadcom/b44.c ++++ b/drivers/net/ethernet/broadcom/b44.c +@@ -431,10 +431,34 @@ static void b44_wap54g10_workaround(stru + error: + pr_warn("PHY: cannot reset MII transceiver isolate bit\n"); + } ++ ++static void b44_bcm47xx_workarounds(struct b44 *bp) ++{ ++ char buf[20]; ++ struct ssb_device *sdev = bp->sdev; ++ ++ /* Toshiba WRC-1000, Siemens SE505 v1, Askey RT-210W, RT-220W */ ++ if (sdev->bus->sprom.board_num == 100) { ++ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY; ++ } else { ++ /* WL-HDD */ ++ if (bcm47xx_nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0 && ++ !strncmp(buf, "WL300-", strlen("WL300-"))) { ++ if (sdev->bus->sprom.et0phyaddr == 0 && ++ sdev->bus->sprom.et1phyaddr == 1) ++ bp->phy_addr = B44_PHY_ADDR_NO_LOCAL_PHY; ++ } ++ } ++ return; ++} + #else + static inline void b44_wap54g10_workaround(struct b44 *bp) + { + } ++ ++static inline void b44_bcm47xx_workarounds(struct b44 *bp) ++{ ++} + #endif + + static int b44_setup_phy(struct b44 *bp) +@@ -443,6 +467,7 @@ static int b44_setup_phy(struct b44 *bp) + int err; + + b44_wap54g10_workaround(bp); ++ b44_bcm47xx_workarounds(bp); + + if (bp->flags & B44_FLAG_EXTERNAL_PHY) + return 0; +@@ -2178,6 +2203,8 @@ static int b44_get_invariants(struct b44 + * valid PHY address. */ + bp->phy_addr &= 0x1F; + ++ b44_bcm47xx_workarounds(bp); ++ + memcpy(bp->dev->dev_addr, addr, ETH_ALEN); + + if (!is_valid_ether_addr(&bp->dev->dev_addr[0])){ diff --git a/target/linux/brcm47xx/patches-4.14/280-activate_ssb_support_in_usb.patch b/target/linux/brcm47xx/patches-4.14/280-activate_ssb_support_in_usb.patch new file mode 100644 index 000000000..0df8ec17f --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/280-activate_ssb_support_in_usb.patch @@ -0,0 +1,25 @@ +This prevents the options from being delete with make kernel_oldconfig. +--- + drivers/ssb/Kconfig | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/bcma/Kconfig ++++ b/drivers/bcma/Kconfig +@@ -31,6 +31,7 @@ config BCMA_HOST_PCI + config BCMA_HOST_SOC + bool "Support for BCMA in a SoC" + depends on BCMA ++ select USB_HCD_BCMA if USB_EHCI_HCD || USB_OHCI_HCD + help + Host interface for a Broadcom AIX bus directly mapped into + the memory. This only works with the Broadcom SoCs from the +--- a/drivers/ssb/Kconfig ++++ b/drivers/ssb/Kconfig +@@ -157,6 +157,7 @@ config SSB_SFLASH + config SSB_EMBEDDED + bool + depends on SSB_DRIVER_MIPS && SSB_PCICORE_HOSTMODE ++ select USB_HCD_SSB if USB_EHCI_HCD || USB_OHCI_HCD + default y + + config SSB_DRIVER_EXTIF diff --git a/target/linux/brcm47xx/patches-4.14/300-fork_cacheflush.patch b/target/linux/brcm47xx/patches-4.14/300-fork_cacheflush.patch new file mode 100644 index 000000000..b5efaaf03 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/300-fork_cacheflush.patch @@ -0,0 +1,21 @@ +From: Wolfram Joost +Subject: [PATCH] fork_cacheflush + +On ASUS WL-500gP there are many unexpected "Segmentation fault"s that +seem to be caused by a kernel. They can be avoided by: +1) Disabling highpage +2) Using flush_cache_mm in flush_cache_dup_mm + +For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035 +--- +--- a/arch/mips/include/asm/cacheflush.h ++++ b/arch/mips/include/asm/cacheflush.h +@@ -47,7 +47,7 @@ + extern void (*flush_cache_all)(void); + extern void (*__flush_cache_all)(void); + extern void (*flush_cache_mm)(struct mm_struct *mm); +-#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0) ++#define flush_cache_dup_mm(mm) flush_cache_mm(mm) + extern void (*flush_cache_range)(struct vm_area_struct *vma, + unsigned long start, unsigned long end); + extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); diff --git a/target/linux/brcm47xx/patches-4.14/310-no_highpage.patch b/target/linux/brcm47xx/patches-4.14/310-no_highpage.patch new file mode 100644 index 000000000..646f352e3 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/310-no_highpage.patch @@ -0,0 +1,74 @@ +From: Jeff Hansen +Subject: [PATCH] no highpage + +On ASUS WL-500gP there are many unexpected "Segmentation fault"s that +seem to be caused by a kernel. They can be avoided by: +1) Disabling highpage +2) Using flush_cache_mm in flush_cache_dup_mm + +For details see OpenWrt ticket #2035 https://dev.openwrt.org/ticket/2035 +--- +--- a/arch/mips/include/asm/page.h ++++ b/arch/mips/include/asm/page.h +@@ -71,6 +71,7 @@ static inline unsigned int page_size_ftl + #endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */ + + #include ++#include + + extern void build_clear_page(void); + extern void build_copy_page(void); +@@ -105,11 +106,16 @@ static inline void clear_user_page(void + flush_data_cache_page((unsigned long)addr); + } + +-struct vm_area_struct; +-extern void copy_user_highpage(struct page *to, struct page *from, +- unsigned long vaddr, struct vm_area_struct *vma); ++static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, ++ struct page *to) ++{ ++ extern void (*flush_data_cache_page)(unsigned long addr); + +-#define __HAVE_ARCH_COPY_USER_HIGHPAGE ++ copy_page(vto, vfrom); ++ if (!cpu_has_ic_fills_f_dc || ++ pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) ++ flush_data_cache_page((unsigned long)vto); ++} + + /* + * These are used to make use of C type-checking.. +--- a/arch/mips/mm/init.c ++++ b/arch/mips/mm/init.c +@@ -164,30 +164,6 @@ void kunmap_coherent(void) + preempt_enable(); + } + +-void copy_user_highpage(struct page *to, struct page *from, +- unsigned long vaddr, struct vm_area_struct *vma) +-{ +- void *vfrom, *vto; +- +- vto = kmap_atomic(to); +- if (cpu_has_dc_aliases && cpu_use_kmap_coherent && +- page_mapcount(from) && !Page_dcache_dirty(from)) { +- vfrom = kmap_coherent(from, vaddr); +- copy_page(vto, vfrom); +- kunmap_coherent(); +- } else { +- vfrom = kmap_atomic(from); +- copy_page(vto, vfrom); +- kunmap_atomic(vfrom); +- } +- if ((!cpu_has_ic_fills_f_dc) || +- pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) +- flush_data_cache_page((unsigned long)vto); +- kunmap_atomic(vto); +- /* Make sure this page is cleared on other CPU's too before using it */ +- smp_wmb(); +-} +- + void copy_to_user_page(struct vm_area_struct *vma, + struct page *page, unsigned long vaddr, void *dst, const void *src, + unsigned long len) diff --git a/target/linux/brcm47xx/patches-4.14/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch b/target/linux/brcm47xx/patches-4.14/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch new file mode 100644 index 000000000..f6b8d66bb --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch @@ -0,0 +1,223 @@ +--- a/arch/mips/bcm47xx/board.c ++++ b/arch/mips/bcm47xx/board.c +@@ -141,6 +141,7 @@ struct bcm47xx_board_type_list2 bcm47xx_ + {{BCM47XX_BOARD_LINKSYS_WRT300NV11, "Linksys WRT300N V1.1"}, "WRT300N", "1.1"}, + {{BCM47XX_BOARD_LINKSYS_WRT310NV1, "Linksys WRT310N V1"}, "WRT310N", "1.0"}, + {{BCM47XX_BOARD_LINKSYS_WRT310NV2, "Linksys WRT310N V2"}, "WRT310N", "2.0"}, ++ {{BCM47XX_BOARD_LINKSYS_WRT320N_V1, "Linksys WRT320N V1"}, "WRT320N", "1.0"}, + {{BCM47XX_BOARD_LINKSYS_WRT54G3GV2, "Linksys WRT54G3GV2-VF"}, "WRT54G3GV2-VF", "1.0"}, + {{BCM47XX_BOARD_LINKSYS_WRT610NV1, "Linksys WRT610N V1"}, "WRT610N", "1.0"}, + {{BCM47XX_BOARD_LINKSYS_WRT610NV2, "Linksys WRT610N V2"}, "WRT610N", "2.0"}, +@@ -160,9 +161,12 @@ struct bcm47xx_board_type_list1 bcm47xx_ + {{BCM47XX_BOARD_LUXUL_XVW_P30_V1, "Luxul XVW-P30 V1"}, "luxul_xvwp30_v1"}, + {{BCM47XX_BOARD_LUXUL_XWR_600_V1, "Luxul XWR-600 V1"}, "luxul_xwr600_v1"}, + {{BCM47XX_BOARD_LUXUL_XWR_1750_V1, "Luxul XWR-1750 V1"}, "luxul_xwr1750_v1"}, ++ {{BCM47XX_BOARD_NETGEAR_R6300_V1, "Netgear R6300 V1"}, "U12H218T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WGR614V8, "Netgear WGR614 V8"}, "U12H072T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WGR614V9, "Netgear WGR614 V9"}, "U12H094T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WGR614_V10, "Netgear WGR614 V10"}, "U12H139T01_NETGEAR"}, ++ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V1, "Netgear WN2500RP V1"}, "U12H197T00_NETGEAR"}, ++ {{BCM47XX_BOARD_NETGEAR_WN2500RP_V2, "Netgear WN2500RP V2"}, "U12H294T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNDR3300, "Netgear WNDR3300"}, "U12H093T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNDR3400V1, "Netgear WNDR3400 V1"}, "U12H155T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNDR3400V2, "Netgear WNDR3400 V2"}, "U12H187T00_NETGEAR"}, +@@ -172,6 +176,7 @@ struct bcm47xx_board_type_list1 bcm47xx_ + {{BCM47XX_BOARD_NETGEAR_WNDR4000, "Netgear WNDR4000"}, "U12H181T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNDR4500V1, "Netgear WNDR4500 V1"}, "U12H189T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNDR4500V2, "Netgear WNDR4500 V2"}, "U12H224T00_NETGEAR"}, ++ {{BCM47XX_BOARD_NETGEAR_WNR1000_V3, "Netgear WNR1000 V3"}, "U12H139T50_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNR2000, "Netgear WNR2000"}, "U12H114T00_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNR3500L, "Netgear WNR3500L"}, "U12H136T99_NETGEAR"}, + {{BCM47XX_BOARD_NETGEAR_WNR3500U, "Netgear WNR3500U"}, "U12H136T00_NETGEAR"}, +--- a/arch/mips/bcm47xx/buttons.c ++++ b/arch/mips/bcm47xx/buttons.c +@@ -27,6 +27,12 @@ + /* Asus */ + + static const struct gpio_keys_button ++bcm47xx_buttons_asus_rtn10u[] __initconst = { ++ BCM47XX_GPIO_KEY(20, KEY_WPS_BUTTON), ++ BCM47XX_GPIO_KEY(21, KEY_RESTART), ++}; ++ ++static const struct gpio_keys_button + bcm47xx_buttons_asus_rtn12[] __initconst = { + BCM47XX_GPIO_KEY(0, KEY_WPS_BUTTON), + BCM47XX_GPIO_KEY(1, KEY_RESTART), +@@ -277,6 +283,18 @@ bcm47xx_buttons_linksys_wrt310nv1[] __in + }; + + static const struct gpio_keys_button ++bcm47xx_buttons_linksys_wrt310n_v2[] __initconst = { ++ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON), ++ BCM47XX_GPIO_KEY(6, KEY_RESTART), ++}; ++ ++static const struct gpio_keys_button ++bcm47xx_buttons_linksys_wrt320n_v1[] __initconst = { ++ BCM47XX_GPIO_KEY(5, KEY_WPS_BUTTON), ++ BCM47XX_GPIO_KEY(8, KEY_RESTART), ++}; ++ ++static const struct gpio_keys_button + bcm47xx_buttons_linksys_wrt54g3gv2[] __initconst = { + BCM47XX_GPIO_KEY(5, KEY_WIMAX), + BCM47XX_GPIO_KEY(6, KEY_RESTART), +@@ -385,6 +403,17 @@ bcm47xx_buttons_motorola_wr850gv2v3[] __ + /* Netgear */ + + static const struct gpio_keys_button ++bcm47xx_buttons_netgear_r6300_v1[] __initconst = { ++ BCM47XX_GPIO_KEY(6, KEY_RESTART), ++}; ++ ++static const struct gpio_keys_button ++bcm47xx_buttons_netgear_wn2500rp_v1[] __initconst = { ++ BCM47XX_GPIO_KEY(12, KEY_RESTART), ++ BCM47XX_GPIO_KEY(31, KEY_WPS_BUTTON), ++}; ++ ++static const struct gpio_keys_button + bcm47xx_buttons_netgear_wndr3400v1[] __initconst = { + BCM47XX_GPIO_KEY(4, KEY_RESTART), + BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON), +@@ -412,6 +441,11 @@ bcm47xx_buttons_netgear_wndr4500v1[] __i + }; + + static const struct gpio_keys_button ++bcm47xx_buttons_netgear_wnr1000_v3[] __initconst = { ++ BCM47XX_GPIO_KEY(3, KEY_RESTART), ++}; ++ ++static const struct gpio_keys_button + bcm47xx_buttons_netgear_wnr3500lv1[] __initconst = { + BCM47XX_GPIO_KEY(4, KEY_RESTART), + BCM47XX_GPIO_KEY(6, KEY_WPS_BUTTON), +@@ -465,6 +499,9 @@ int __init bcm47xx_buttons_register(void + int err; + + switch (board) { ++ case BCM47XX_BOARD_ASUS_RTN10U: ++ err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn10u); ++ break; + case BCM47XX_BOARD_ASUS_RTN12: + err = bcm47xx_copy_bdata(bcm47xx_buttons_asus_rtn12); + break; +@@ -595,6 +632,12 @@ int __init bcm47xx_buttons_register(void + case BCM47XX_BOARD_LINKSYS_WRT310NV1: + err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310nv1); + break; ++ case BCM47XX_BOARD_LINKSYS_WRT310NV2: ++ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt310n_v2); ++ break; ++ case BCM47XX_BOARD_LINKSYS_WRT320N_V1: ++ err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt320n_v1); ++ break; + case BCM47XX_BOARD_LINKSYS_WRT54G3GV2: + err = bcm47xx_copy_bdata(bcm47xx_buttons_linksys_wrt54g3gv2); + break; +@@ -658,6 +701,12 @@ int __init bcm47xx_buttons_register(void + err = bcm47xx_copy_bdata(bcm47xx_buttons_motorola_wr850gv2v3); + break; + ++ case BCM47XX_BOARD_NETGEAR_R6300_V1: ++ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_r6300_v1); ++ break; ++ case BCM47XX_BOARD_NETGEAR_WN2500RP_V1: ++ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wn2500rp_v1); ++ break; + case BCM47XX_BOARD_NETGEAR_WNDR3400V1: + err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr3400v1); + break; +@@ -670,6 +719,9 @@ int __init bcm47xx_buttons_register(void + case BCM47XX_BOARD_NETGEAR_WNDR4500V1: + err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wndr4500v1); + break; ++ case BCM47XX_BOARD_NETGEAR_WNR1000_V3: ++ err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr1000_v3); ++ break; + case BCM47XX_BOARD_NETGEAR_WNR3500L: + err = bcm47xx_copy_bdata(bcm47xx_buttons_netgear_wnr3500lv1); + break; +--- a/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h ++++ b/arch/mips/include/asm/mach-bcm47xx/bcm47xx_board.h +@@ -72,6 +72,7 @@ enum bcm47xx_board { + BCM47XX_BOARD_LINKSYS_WRT300NV11, + BCM47XX_BOARD_LINKSYS_WRT310NV1, + BCM47XX_BOARD_LINKSYS_WRT310NV2, ++ BCM47XX_BOARD_LINKSYS_WRT320N_V1, + BCM47XX_BOARD_LINKSYS_WRT54G3GV2, + BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0101, + BCM47XX_BOARD_LINKSYS_WRT54G_TYPE_0467, +@@ -98,9 +99,12 @@ enum bcm47xx_board { + BCM47XX_BOARD_MOTOROLA_WR850GP, + BCM47XX_BOARD_MOTOROLA_WR850GV2V3, + ++ BCM47XX_BOARD_NETGEAR_R6300_V1, + BCM47XX_BOARD_NETGEAR_WGR614V8, + BCM47XX_BOARD_NETGEAR_WGR614V9, + BCM47XX_BOARD_NETGEAR_WGR614_V10, ++ BCM47XX_BOARD_NETGEAR_WN2500RP_V1, ++ BCM47XX_BOARD_NETGEAR_WN2500RP_V2, + BCM47XX_BOARD_NETGEAR_WNDR3300, + BCM47XX_BOARD_NETGEAR_WNDR3400V1, + BCM47XX_BOARD_NETGEAR_WNDR3400V2, +@@ -110,6 +114,7 @@ enum bcm47xx_board { + BCM47XX_BOARD_NETGEAR_WNDR4000, + BCM47XX_BOARD_NETGEAR_WNDR4500V1, + BCM47XX_BOARD_NETGEAR_WNDR4500V2, ++ BCM47XX_BOARD_NETGEAR_WNR1000_V3, + BCM47XX_BOARD_NETGEAR_WNR2000, + BCM47XX_BOARD_NETGEAR_WNR3500L, + BCM47XX_BOARD_NETGEAR_WNR3500U, +--- a/arch/mips/bcm47xx/leds.c ++++ b/arch/mips/bcm47xx/leds.c +@@ -30,6 +30,14 @@ + /* Asus */ + + static const struct gpio_led ++bcm47xx_leds_asus_rtn10u[] __initconst = { ++ BCM47XX_GPIO_LED(5, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), ++ BCM47XX_GPIO_LED(6, "green", "power", 1, LEDS_GPIO_DEFSTATE_ON), ++ BCM47XX_GPIO_LED(7, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF), ++ BCM47XX_GPIO_LED(8, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ ++static const struct gpio_led + bcm47xx_leds_asus_rtn12[] __initconst = { + BCM47XX_GPIO_LED(2, "unk", "power", 1, LEDS_GPIO_DEFSTATE_ON), + BCM47XX_GPIO_LED(7, "unk", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), +@@ -314,6 +322,13 @@ bcm47xx_leds_linksys_wrt310nv1[] __initc + }; + + static const struct gpio_led ++bcm47xx_leds_linksys_wrt320n_v1[] __initconst = { ++ BCM47XX_GPIO_LED(1, "blue", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF), ++ BCM47XX_GPIO_LED(2, "blue", "power", 0, LEDS_GPIO_DEFSTATE_ON), ++ BCM47XX_GPIO_LED(4, "amber", "wps", 1, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ ++static const struct gpio_led + bcm47xx_leds_linksys_wrt54g_generic[] __initconst = { + BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), + BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON), +@@ -550,6 +565,9 @@ void __init bcm47xx_leds_register(void) + enum bcm47xx_board board = bcm47xx_board_get(); + + switch (board) { ++ case BCM47XX_BOARD_ASUS_RTN10U: ++ bcm47xx_set_pdata(bcm47xx_leds_asus_rtn10u); ++ break; + case BCM47XX_BOARD_ASUS_RTN12: + bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12); + break; +@@ -683,6 +701,9 @@ void __init bcm47xx_leds_register(void) + case BCM47XX_BOARD_LINKSYS_WRT310NV1: + bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1); + break; ++ case BCM47XX_BOARD_LINKSYS_WRT320N_V1: ++ bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt320n_v1); ++ break; + case BCM47XX_BOARD_LINKSYS_WRT54G3GV2: + bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt54g3gv2); + break; diff --git a/target/linux/brcm47xx/patches-4.14/400-mtd-bcm47xxpart-get-nvram.patch b/target/linux/brcm47xx/patches-4.14/400-mtd-bcm47xxpart-get-nvram.patch new file mode 100644 index 000000000..df9d434c9 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/400-mtd-bcm47xxpart-get-nvram.patch @@ -0,0 +1,34 @@ +--- a/drivers/mtd/bcm47xxpart.c ++++ b/drivers/mtd/bcm47xxpart.c +@@ -102,6 +102,7 @@ static int bcm47xxpart_parse(struct mtd_ + int trx_num = 0; /* Number of found TRX partitions */ + int possible_nvram_sizes[] = { 0x8000, 0xF000, 0x10000, }; + int err; ++ bool found_nvram = false; + + /* + * Some really old flashes (like AT45DB*) had smaller erasesize-s, but +@@ -283,12 +284,23 @@ static int bcm47xxpart_parse(struct mtd_ + if (buf[0] == NVRAM_HEADER) { + bcm47xxpart_add_part(&parts[curr_part++], "nvram", + master->size - blocksize, 0); ++ found_nvram = true; + break; + } + } + + kfree(buf); + ++ if (!found_nvram) { ++ pr_err("can not find a nvram partition reserve last block\n"); ++ bcm47xxpart_add_part(&parts[curr_part++], "nvram_guess", ++ master->size - blocksize * 2, MTD_WRITEABLE); ++ for (i = 0; i < curr_part; i++) { ++ if (parts[i].size + parts[i].offset == master->size) ++ parts[i].offset -= blocksize * 2; ++ } ++ } ++ + /* + * Assume that partitions end at the beginning of the one they are + * followed by. diff --git a/target/linux/brcm47xx/patches-4.14/610-pci_ide_fix.patch b/target/linux/brcm47xx/patches-4.14/610-pci_ide_fix.patch new file mode 100644 index 000000000..ccae6a598 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/610-pci_ide_fix.patch @@ -0,0 +1,41 @@ +From: b.sander +Subject: [PATCH] pci: IDE fix + +These are standard probing messages when using pdc202xx_old: +pdc202xx_old 0000:00:01.0: IDE controller (0x105a:0x0d30 rev 0x02) +PCI: Enabling device 0000:00:01.0 (0004 -> 0007) +PCI: Fixing up device 0000:00:01.0 +0000:00:01.0: (U)DMA Burst Bit DISABLED Primary PCI Mode Secondary PCI Mode. +0000:00:01.0: FORCING BURST BIT 0x00->0x01 ACTIVE +pdc202xx_old 0000:00:01.0: 100% native mode on irq 6 + +With the default MAX_HWIFS value after above we get: + ide2: BM-DMA at 0x0400-0x0407 + ide3: BM-DMA at 0x0408-0x040f +Probing IDE interface ide2... +hde: CF500, CFA DISK drive + +As you can see it's ide2 + ide3 and hde. + +With this patch applied we get: + ide0: BM-DMA at 0x0400-0x0407 + ide1: BM-DMA at 0x0408-0x040f +Probing IDE interface ide0... +hda: CF500, CFA DISK drive + +This fixes OpenWrt ticket #7061: https://dev.openwrt.org/ticket/7061 +--- +--- a/include/linux/ide.h ++++ b/include/linux/ide.h +@@ -241,7 +241,11 @@ static inline void ide_std_init_ports(st + hw->io_ports.ctl_addr = ctl_addr; + } + ++#if defined CONFIG_BCM47XX ++# define MAX_HWIFS 2 ++#else + #define MAX_HWIFS 10 ++#endif + + /* + * Now for the data we need to maintain per-drive: ide_drive_t diff --git a/target/linux/brcm47xx/patches-4.14/791-tg3-no-pci-sleep.patch b/target/linux/brcm47xx/patches-4.14/791-tg3-no-pci-sleep.patch new file mode 100644 index 000000000..85bac98a2 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/791-tg3-no-pci-sleep.patch @@ -0,0 +1,17 @@ +When the Ethernet controller is powered down and someone wants to +access the mdio bus like the witch driver (b53) the system crashed if +PCI_D3hot was set before. This patch deactivates this power sawing mode +when a switch driver is in use. + +--- a/drivers/net/ethernet/broadcom/tg3.c ++++ b/drivers/net/ethernet/broadcom/tg3.c +@@ -4264,7 +4264,8 @@ static int tg3_power_down_prepare(struct + static void tg3_power_down(struct tg3 *tp) + { + pci_wake_from_d3(tp->pdev, tg3_flag(tp, WOL_ENABLE)); +- pci_set_power_state(tp->pdev, PCI_D3hot); ++ if (!tg3_flag(tp, ROBOSWITCH)) ++ pci_set_power_state(tp->pdev, PCI_D3hot); + } + + static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex) diff --git a/target/linux/brcm47xx/patches-4.14/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch b/target/linux/brcm47xx/patches-4.14/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch new file mode 100644 index 000000000..318dc5581 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/800-bcma-add-table-of-serial-flashes-with-smaller-blocks.patch @@ -0,0 +1,73 @@ +From 597715c61ae75a05ab3310a34ff3857a006f0f63 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 20 Nov 2014 21:32:42 +0100 +Subject: [PATCH] bcma: add table of serial flashes with smaller blocks +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Rafał Miłecki +--- + drivers/bcma/driver_chipcommon_sflash.c | 29 +++++++++++++++++++++++++++++ + 1 file changed, 29 insertions(+) + +--- a/drivers/bcma/driver_chipcommon_sflash.c ++++ b/drivers/bcma/driver_chipcommon_sflash.c +@@ -9,6 +9,7 @@ + + #include + #include ++#include + + static struct resource bcma_sflash_resource = { + .name = "bcma_sflash", +@@ -42,6 +43,13 @@ static const struct bcma_sflash_tbl_e bc + { NULL }, + }; + ++/* Some devices use smaller blocks (and have more of them) */ ++static const struct bcma_sflash_tbl_e bcma_sflash_st_shrink_tbl[] = { ++ { "M25P16", 0x14, 0x1000, 512, }, ++ { "M25P32", 0x15, 0x1000, 1024, }, ++ { NULL }, ++}; ++ + static const struct bcma_sflash_tbl_e bcma_sflash_sst_tbl[] = { + { "SST25WF512", 1, 0x1000, 16, }, + { "SST25VF512", 0x48, 0x1000, 16, }, +@@ -85,6 +93,24 @@ static void bcma_sflash_cmd(struct bcma_ + bcma_err(cc->core->bus, "SFLASH control command failed (timeout)!\n"); + } + ++const struct bcma_sflash_tbl_e *bcma_sflash_shrink_flash(u32 id) ++{ ++ enum bcm47xx_board board = bcm47xx_board_get(); ++ const struct bcma_sflash_tbl_e *e; ++ ++ switch (board) { ++ case BCM47XX_BOARD_NETGEAR_WGR614_V10: ++ case BCM47XX_BOARD_NETGEAR_WNR1000_V3: ++ for (e = bcma_sflash_st_shrink_tbl; e->name; e++) { ++ if (e->id == id) ++ return e; ++ } ++ return NULL; ++ default: ++ return NULL; ++ } ++} ++ + /* Initialize serial flash access */ + int bcma_sflash_init(struct bcma_drv_cc *cc) + { +@@ -115,6 +141,10 @@ int bcma_sflash_init(struct bcma_drv_cc + case 0x13: + return -ENOTSUPP; + default: ++ e = bcma_sflash_shrink_flash(id); ++ if (e) ++ break; ++ + for (e = bcma_sflash_st_tbl; e->name; e++) { + if (e->id == id) + break; diff --git a/target/linux/brcm47xx/patches-4.14/820-wgt634u-nvram-fix.patch b/target/linux/brcm47xx/patches-4.14/820-wgt634u-nvram-fix.patch new file mode 100644 index 000000000..4b726bb42 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/820-wgt634u-nvram-fix.patch @@ -0,0 +1,304 @@ +The Netgear wgt634u uses a different format for storing the +configuration. This patch is needed to read out the correct +configuration. The cfe_env.c file uses a different method way to read +out the configuration than the in kernel cfe config reader. + +--- a/drivers/firmware/broadcom/Makefile ++++ b/drivers/firmware/broadcom/Makefile +@@ -1,2 +1,2 @@ +-obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o ++obj-$(CONFIG_BCM47XX_NVRAM) += bcm47xx_nvram.o cfe_env.o + obj-$(CONFIG_BCM47XX_SPROM) += bcm47xx_sprom.o +--- /dev/null ++++ b/drivers/firmware/broadcom/cfe_env.c +@@ -0,0 +1,228 @@ ++/* ++ * CFE environment variable access ++ * ++ * Copyright 2001-2003, Broadcom Corporation ++ * Copyright 2006, Felix Fietkau ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NVRAM_SIZE (0x1ff0) ++static char _nvdata[NVRAM_SIZE]; ++static char _valuestr[256]; ++ ++/* ++ * TLV types. These codes are used in the "type-length-value" ++ * encoding of the items stored in the NVRAM device (flash or EEPROM) ++ * ++ * The layout of the flash/nvram is as follows: ++ * ++ * ++ * ++ * The type code of "ENV_TLV_TYPE_END" marks the end of the list. ++ * The "length" field marks the length of the data section, not ++ * including the type and length fields. ++ * ++ * Environment variables are stored as follows: ++ * ++ * = ++ * ++ * If bit 0 (low bit) is set, the length is an 8-bit value. ++ * If bit 0 (low bit) is clear, the length is a 16-bit value ++ * ++ * Bit 7 set indicates "user" TLVs. In this case, bit 0 still ++ * indicates the size of the length field. ++ * ++ * Flags are from the constants below: ++ * ++ */ ++#define ENV_LENGTH_16BITS 0x00 /* for low bit */ ++#define ENV_LENGTH_8BITS 0x01 ++ ++#define ENV_TYPE_USER 0x80 ++ ++#define ENV_CODE_SYS(n,l) (((n)<<1)|(l)) ++#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER) ++ ++/* ++ * The actual TLV types we support ++ */ ++ ++#define ENV_TLV_TYPE_END 0x00 ++#define ENV_TLV_TYPE_ENV ENV_CODE_SYS(0,ENV_LENGTH_8BITS) ++ ++/* ++ * Environment variable flags ++ */ ++ ++#define ENV_FLG_NORMAL 0x00 /* normal read/write */ ++#define ENV_FLG_BUILTIN 0x01 /* builtin - not stored in flash */ ++#define ENV_FLG_READONLY 0x02 /* read-only - cannot be changed */ ++ ++#define ENV_FLG_MASK 0xFF /* mask of attributes we keep */ ++#define ENV_FLG_ADMIN 0x100 /* lets us internally override permissions */ ++ ++ ++/* ********************************************************************* ++ * _nvram_read(buffer,offset,length) ++ * ++ * Read data from the NVRAM device ++ * ++ * Input parameters: ++ * buffer - destination buffer ++ * offset - offset of data to read ++ * length - number of bytes to read ++ * ++ * Return value: ++ * number of bytes read, or <0 if error occured ++ ********************************************************************* */ ++static int ++_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length) ++{ ++ int i; ++ if (offset > NVRAM_SIZE) ++ return -1; ++ ++ for ( i = 0; i < length; i++) { ++ buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i]; ++ } ++ return length; ++} ++ ++ ++static char* ++_strnchr(const char *dest,int c,size_t cnt) ++{ ++ while (*dest && (cnt > 0)) { ++ if (*dest == c) return (char *) dest; ++ dest++; ++ cnt--; ++ } ++ return NULL; ++} ++ ++ ++ ++/* ++ * Core support API: Externally visible. ++ */ ++ ++/* ++ * Get the value of an NVRAM variable ++ * @param name name of variable to get ++ * @return value of variable or NULL if undefined ++ */ ++ ++char *cfe_env_get(unsigned char *nv_buf, const char *name) ++{ ++ int size; ++ unsigned char *buffer; ++ unsigned char *ptr; ++ unsigned char *envval; ++ unsigned int reclen; ++ unsigned int rectype; ++ int offset; ++ int flg; ++ ++ if (!strcmp(name, "nvram_type")) ++ return "cfe"; ++ ++ size = NVRAM_SIZE; ++ buffer = &_nvdata[0]; ++ ++ ptr = buffer; ++ offset = 0; ++ ++ /* Read the record type and length */ ++ if (_nvram_read(nv_buf, ptr,offset,1) != 1) { ++ goto error; ++ } ++ ++ while ((*ptr != ENV_TLV_TYPE_END) && (size > 1)) { ++ ++ /* Adjust pointer for TLV type */ ++ rectype = *(ptr); ++ offset++; ++ size--; ++ ++ /* ++ * Read the length. It can be either 1 or 2 bytes ++ * depending on the code ++ */ ++ if (rectype & ENV_LENGTH_8BITS) { ++ /* Read the record type and length - 8 bits */ ++ if (_nvram_read(nv_buf, ptr,offset,1) != 1) { ++ goto error; ++ } ++ reclen = *(ptr); ++ size--; ++ offset++; ++ } ++ else { ++ /* Read the record type and length - 16 bits, MSB first */ ++ if (_nvram_read(nv_buf, ptr,offset,2) != 2) { ++ goto error; ++ } ++ reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1); ++ size -= 2; ++ offset += 2; ++ } ++ ++ if (reclen > size) ++ break; /* should not happen, bad NVRAM */ ++ ++ switch (rectype) { ++ case ENV_TLV_TYPE_ENV: ++ /* Read the TLV data */ ++ if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen) ++ goto error; ++ flg = *ptr++; ++ envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1)); ++ if (envval) { ++ *envval++ = '\0'; ++ memcpy(_valuestr,envval,(reclen-1)-(envval-ptr)); ++ _valuestr[(reclen-1)-(envval-ptr)] = '\0'; ++#if 0 ++ printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr); ++#endif ++ if(!strcmp(ptr, name)){ ++ return _valuestr; ++ } ++ if((strlen(ptr) > 1) && !strcmp(&ptr[1], name)) ++ return _valuestr; ++ } ++ break; ++ ++ default: ++ /* Unknown TLV type, skip it. */ ++ break; ++ } ++ ++ /* ++ * Advance to next TLV ++ */ ++ ++ size -= (int)reclen; ++ offset += reclen; ++ ++ /* Read the next record type */ ++ ptr = buffer; ++ if (_nvram_read(nv_buf, ptr,offset,1) != 1) ++ goto error; ++ } ++ ++error: ++ return NULL; ++ ++} ++ +--- a/drivers/firmware/broadcom/bcm47xx_nvram.c ++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c +@@ -37,6 +37,8 @@ struct nvram_header { + static char nvram_buf[NVRAM_SPACE]; + static size_t nvram_len; + static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000}; ++static int cfe_env; ++extern char *cfe_env_get(char *nv_buf, const char *name); + + static u32 find_nvram_size(void __iomem *end) + { +@@ -56,7 +58,9 @@ static u32 find_nvram_size(void __iomem + static int nvram_find_and_copy(void __iomem *iobase, u32 lim) + { + struct nvram_header __iomem *header; ++ int i; + u32 off; ++ u32 *src, *dst; + u32 size; + + if (nvram_len) { +@@ -64,6 +68,26 @@ static int nvram_find_and_copy(void __io + return -EEXIST; + } + ++ cfe_env = 0; ++ ++ /* XXX: hack for supporting the CFE environment stuff on WGT634U */ ++ if (lim >= 8 * 1024 * 1024) { ++ src = (u32 *)(iobase + 8 * 1024 * 1024 - 0x2000); ++ dst = (u32 *)nvram_buf; ++ ++ if ((*src & 0xff00ff) == 0x000001) { ++ printk("early_nvram_init: WGT634U NVRAM found.\n"); ++ ++ for (i = 0; i < 0x1ff0; i++) { ++ if (*src == 0xFFFFFFFF) ++ break; ++ *dst++ = *src++; ++ } ++ cfe_env = 1; ++ return 0; ++ } ++ } ++ + /* TODO: when nvram is on nand flash check for bad blocks first. */ + off = FLASH_MIN; + while (off <= lim) { +@@ -174,6 +198,13 @@ int bcm47xx_nvram_getenv(const char *nam + if (!name) + return -EINVAL; + ++ if (cfe_env) { ++ value = cfe_env_get(nvram_buf, name); ++ if (!value) ++ return -ENOENT; ++ return snprintf(val, val_len, "%s", value); ++ } ++ + if (!nvram_len) { + err = nvram_init(); + if (err) diff --git a/target/linux/brcm47xx/patches-4.14/830-huawei_e970_support.patch b/target/linux/brcm47xx/patches-4.14/830-huawei_e970_support.patch new file mode 100644 index 000000000..b6150ed8f --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/830-huawei_e970_support.patch @@ -0,0 +1,101 @@ +--- a/arch/mips/bcm47xx/setup.c ++++ b/arch/mips/bcm47xx/setup.c +@@ -37,6 +37,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -225,6 +226,33 @@ static struct fixed_phy_status bcm47xx_f + .duplex = DUPLEX_FULL, + }; + ++static struct gpio_wdt_platform_data gpio_wdt_data; ++ ++static struct platform_device gpio_wdt_device = { ++ .name = "gpio-wdt", ++ .id = 0, ++ .dev = { ++ .platform_data = &gpio_wdt_data, ++ }, ++}; ++ ++static int __init bcm47xx_register_gpio_watchdog(void) ++{ ++ enum bcm47xx_board board = bcm47xx_board_get(); ++ ++ switch (board) { ++ case BCM47XX_BOARD_HUAWEI_E970: ++ pr_info("bcm47xx: detected Huawei E970 or similar, starting early gpio_wdt timer\n"); ++ gpio_wdt_data.gpio = 7; ++ gpio_wdt_data.interval = HZ; ++ gpio_wdt_data.first_interval = HZ / 5; ++ return platform_device_register(&gpio_wdt_device); ++ default: ++ /* Nothing to do */ ++ return 0; ++ } ++} ++ + static int __init bcm47xx_register_bus_complete(void) + { + switch (bcm47xx_bus_type) { +@@ -244,6 +272,7 @@ static int __init bcm47xx_register_bus_c + bcm47xx_workarounds(); + + fixed_phy_add(PHY_POLL, 0, &bcm47xx_fixed_phy_status, -1); ++ bcm47xx_register_gpio_watchdog(); + return 0; + } + device_initcall(bcm47xx_register_bus_complete); +--- a/arch/mips/configs/bcm47xx_defconfig ++++ b/arch/mips/configs/bcm47xx_defconfig +@@ -66,6 +66,7 @@ CONFIG_HW_RANDOM=y + CONFIG_GPIO_SYSFS=y + CONFIG_WATCHDOG=y + CONFIG_BCM47XX_WDT=y ++CONFIG_GPIO_WDT=y + CONFIG_SSB_DEBUG=y + CONFIG_SSB_DRIVER_GIGE=y + CONFIG_BCMA_DRIVER_GMAC_CMN=y +--- a/drivers/ssb/embedded.c ++++ b/drivers/ssb/embedded.c +@@ -34,11 +34,36 @@ int ssb_watchdog_timer_set(struct ssb_bu + } + EXPORT_SYMBOL(ssb_watchdog_timer_set); + ++#ifdef CONFIG_BCM47XX ++#include ++ ++static bool ssb_watchdog_supported(void) ++{ ++ enum bcm47xx_board board = bcm47xx_board_get(); ++ ++ /* The Huawei E970 has a hardware watchdog using a GPIO */ ++ switch (board) { ++ case BCM47XX_BOARD_HUAWEI_E970: ++ return false; ++ default: ++ return true; ++ } ++} ++#else ++static bool ssb_watchdog_supported(void) ++{ ++ return true; ++} ++#endif ++ + int ssb_watchdog_register(struct ssb_bus *bus) + { + struct bcm47xx_wdt wdt = {}; + struct platform_device *pdev; + ++ if (!ssb_watchdog_supported()) ++ return 0; ++ + if (ssb_chipco_available(&bus->chipco)) { + wdt.driver_data = &bus->chipco; + wdt.timer_set = ssb_chipco_watchdog_timer_set_wdt; diff --git a/target/linux/brcm47xx/patches-4.14/831-old_gpio_wdt.patch b/target/linux/brcm47xx/patches-4.14/831-old_gpio_wdt.patch new file mode 100644 index 000000000..c8233226e --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/831-old_gpio_wdt.patch @@ -0,0 +1,360 @@ +This generic GPIO watchdog is used on Huawei E970 (brcm47xx) + +Signed-off-by: Mathias Adam + +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -1472,6 +1472,15 @@ config WDT_MTX1 + Hardware driver for the MTX-1 boards. This is a watchdog timer that + will reboot the machine after a 100 seconds timer expired. + ++config GPIO_WDT ++ tristate "GPIO Hardware Watchdog" ++ help ++ Hardware driver for GPIO-controlled watchdogs. GPIO pin and ++ toggle interval settings are platform-specific. The driver ++ will stop toggling the GPIO (i.e. machine reboots) after a ++ 100 second timer expired and no process has written to ++ /dev/watchdog during that time. ++ + config PNX833X_WDT + tristate "PNX833x Hardware Watchdog" + depends on SOC_PNX8335 +--- a/drivers/watchdog/Makefile ++++ b/drivers/watchdog/Makefile +@@ -163,6 +163,7 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt + obj-$(CONFIG_INDYDOG) += indydog.o + obj-$(CONFIG_JZ4740_WDT) += jz4740_wdt.o + obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o ++obj-$(CONFIG_GPIO_WDT) += old_gpio_wdt.o + obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o + obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o + obj-$(CONFIG_AR7_WDT) += ar7_wdt.o +--- /dev/null ++++ b/drivers/watchdog/old_gpio_wdt.c +@@ -0,0 +1,301 @@ ++/* ++ * Driver for GPIO-controlled Hardware Watchdogs. ++ * ++ * Copyright (C) 2013 Mathias Adam ++ * ++ * Replaces mtx1_wdt (driver for the MTX-1 Watchdog): ++ * ++ * (C) Copyright 2005 4G Systems , ++ * All Rights Reserved. ++ * http://www.4g-systems.biz ++ * ++ * (C) Copyright 2007 OpenWrt.org, Florian Fainelli ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ * ++ * Neither Michael Stickel nor 4G Systems admit liability nor provide ++ * warranty for any of this software. This material is provided ++ * "AS-IS" and at no charge. ++ * ++ * (c) Copyright 2005 4G Systems ++ * ++ * Release 0.01. ++ * Author: Michael Stickel michael.stickel@4g-systems.biz ++ * ++ * Release 0.02. ++ * Author: Florian Fainelli florian@openwrt.org ++ * use the Linux watchdog/timer APIs ++ * ++ * Release 0.03. ++ * Author: Mathias Adam ++ * make it a generic gpio watchdog driver ++ * ++ * The Watchdog is configured to reset the MTX-1 ++ * if it is not triggered for 100 seconds. ++ * It should not be triggered more often than 1.6 seconds. ++ * ++ * A timer triggers the watchdog every 5 seconds, until ++ * it is opened for the first time. After the first open ++ * it MUST be triggered every 2..95 seconds. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int ticks = 100 * HZ; ++ ++static struct { ++ struct completion stop; ++ spinlock_t lock; ++ int running; ++ struct timer_list timer; ++ int queue; ++ int default_ticks; ++ unsigned long inuse; ++ unsigned gpio; ++ unsigned int gstate; ++ int interval; ++ int first_interval; ++} gpio_wdt_device; ++ ++static void gpio_wdt_trigger(unsigned long unused) ++{ ++ spin_lock(&gpio_wdt_device.lock); ++ if (gpio_wdt_device.running && ticks > 0) ++ ticks -= gpio_wdt_device.interval; ++ ++ /* toggle wdt gpio */ ++ gpio_wdt_device.gstate = !gpio_wdt_device.gstate; ++ gpio_set_value(gpio_wdt_device.gpio, gpio_wdt_device.gstate); ++ ++ if (gpio_wdt_device.queue && ticks > 0) ++ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.interval); ++ else ++ complete(&gpio_wdt_device.stop); ++ spin_unlock(&gpio_wdt_device.lock); ++} ++ ++static void gpio_wdt_reset(void) ++{ ++ ticks = gpio_wdt_device.default_ticks; ++} ++ ++ ++static void gpio_wdt_start(void) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&gpio_wdt_device.lock, flags); ++ if (!gpio_wdt_device.queue) { ++ gpio_wdt_device.queue = 1; ++ gpio_wdt_device.gstate = 1; ++ gpio_set_value(gpio_wdt_device.gpio, 1); ++ mod_timer(&gpio_wdt_device.timer, jiffies + gpio_wdt_device.first_interval); ++ } ++ gpio_wdt_device.running++; ++ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags); ++} ++ ++static int gpio_wdt_stop(void) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&gpio_wdt_device.lock, flags); ++ if (gpio_wdt_device.queue) { ++ gpio_wdt_device.queue = 0; ++ gpio_wdt_device.gstate = 0; ++ gpio_set_value(gpio_wdt_device.gpio, 0); ++ } ++ ticks = gpio_wdt_device.default_ticks; ++ spin_unlock_irqrestore(&gpio_wdt_device.lock, flags); ++ return 0; ++} ++ ++/* Filesystem functions */ ++ ++static int gpio_wdt_open(struct inode *inode, struct file *file) ++{ ++ if (test_and_set_bit(0, &gpio_wdt_device.inuse)) ++ return -EBUSY; ++ return nonseekable_open(inode, file); ++} ++ ++ ++static int gpio_wdt_release(struct inode *inode, struct file *file) ++{ ++ clear_bit(0, &gpio_wdt_device.inuse); ++ return 0; ++} ++ ++static long gpio_wdt_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ void __user *argp = (void __user *)arg; ++ int __user *p = (int __user *)argp; ++ unsigned int value; ++ static const struct watchdog_info ident = { ++ .options = WDIOF_CARDRESET, ++ .identity = "GPIO WDT", ++ }; ++ ++ switch (cmd) { ++ case WDIOC_GETSUPPORT: ++ if (copy_to_user(argp, &ident, sizeof(ident))) ++ return -EFAULT; ++ break; ++ case WDIOC_GETSTATUS: ++ case WDIOC_GETBOOTSTATUS: ++ put_user(0, p); ++ break; ++ case WDIOC_SETOPTIONS: ++ if (get_user(value, p)) ++ return -EFAULT; ++ if (value & WDIOS_ENABLECARD) ++ gpio_wdt_start(); ++ else if (value & WDIOS_DISABLECARD) ++ gpio_wdt_stop(); ++ else ++ return -EINVAL; ++ return 0; ++ case WDIOC_KEEPALIVE: ++ gpio_wdt_reset(); ++ break; ++ default: ++ return -ENOTTY; ++ } ++ return 0; ++} ++ ++ ++static ssize_t gpio_wdt_write(struct file *file, const char *buf, ++ size_t count, loff_t *ppos) ++{ ++ if (!count) ++ return -EIO; ++ gpio_wdt_reset(); ++ return count; ++} ++ ++static const struct file_operations gpio_wdt_fops = { ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .unlocked_ioctl = gpio_wdt_ioctl, ++ .open = gpio_wdt_open, ++ .write = gpio_wdt_write, ++ .release = gpio_wdt_release, ++}; ++ ++ ++static struct miscdevice gpio_wdt_misc = { ++ .minor = WATCHDOG_MINOR, ++ .name = "watchdog", ++ .fops = &gpio_wdt_fops, ++}; ++ ++ ++static int gpio_wdt_probe(struct platform_device *pdev) ++{ ++ int ret; ++ struct gpio_wdt_platform_data *gpio_wdt_data = pdev->dev.platform_data; ++ ++ gpio_wdt_device.gpio = gpio_wdt_data->gpio; ++ gpio_wdt_device.interval = gpio_wdt_data->interval; ++ gpio_wdt_device.first_interval = gpio_wdt_data->first_interval; ++ if (gpio_wdt_device.first_interval <= 0) { ++ gpio_wdt_device.first_interval = gpio_wdt_device.interval; ++ } ++ ++ ret = gpio_request(gpio_wdt_device.gpio, "gpio-wdt"); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "failed to request gpio"); ++ return ret; ++ } ++ ++ spin_lock_init(&gpio_wdt_device.lock); ++ init_completion(&gpio_wdt_device.stop); ++ gpio_wdt_device.queue = 0; ++ clear_bit(0, &gpio_wdt_device.inuse); ++ setup_timer(&gpio_wdt_device.timer, gpio_wdt_trigger, 0L); ++ gpio_wdt_device.default_ticks = ticks; ++ ++ gpio_wdt_start(); ++ dev_info(&pdev->dev, "GPIO Hardware Watchdog driver (gpio=%i interval=%i/%i)\n", ++ gpio_wdt_data->gpio, gpio_wdt_data->first_interval, gpio_wdt_data->interval); ++ return 0; ++} ++ ++static int gpio_wdt_remove(struct platform_device *pdev) ++{ ++ /* FIXME: do we need to lock this test ? */ ++ if (gpio_wdt_device.queue) { ++ gpio_wdt_device.queue = 0; ++ wait_for_completion(&gpio_wdt_device.stop); ++ } ++ ++ gpio_free(gpio_wdt_device.gpio); ++ misc_deregister(&gpio_wdt_misc); ++ return 0; ++} ++ ++static struct platform_driver gpio_wdt_driver = { ++ .probe = gpio_wdt_probe, ++ .remove = gpio_wdt_remove, ++ .driver.name = "gpio-wdt", ++ .driver.owner = THIS_MODULE, ++}; ++ ++static int __init gpio_wdt_init(void) ++{ ++ return platform_driver_register(&gpio_wdt_driver); ++} ++arch_initcall(gpio_wdt_init); ++ ++/* ++ * We do wdt initialization in two steps: arch_initcall probes the wdt ++ * very early to start pinging the watchdog (misc devices are not yet ++ * available), and later module_init() just registers the misc device. ++ */ ++static int gpio_wdt_init_late(void) ++{ ++ int ret; ++ ++ ret = misc_register(&gpio_wdt_misc); ++ if (ret < 0) { ++ pr_err("GPIO_WDT: failed to register misc device\n"); ++ return ret; ++ } ++ return 0; ++} ++#ifndef MODULE ++module_init(gpio_wdt_init_late); ++#endif ++ ++static void __exit gpio_wdt_exit(void) ++{ ++ platform_driver_unregister(&gpio_wdt_driver); ++} ++module_exit(gpio_wdt_exit); ++ ++MODULE_AUTHOR("Michael Stickel, Florian Fainelli, Mathias Adam"); ++MODULE_DESCRIPTION("Driver for GPIO hardware watchdogs"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); ++MODULE_ALIAS("platform:gpio-wdt"); +--- /dev/null ++++ b/include/linux/old_gpio_wdt.h +@@ -0,0 +1,21 @@ ++/* ++ * Definitions for the GPIO watchdog driver ++ * ++ * Copyright (C) 2013 Mathias Adam ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#ifndef _GPIO_WDT_H_ ++#define _GPIO_WDT_H_ ++ ++struct gpio_wdt_platform_data { ++ int gpio; /* GPIO line number */ ++ int interval; /* watchdog reset interval in system ticks */ ++ int first_interval; /* first wd reset interval in system ticks */ ++}; ++ ++#endif /* _GPIO_WDT_H_ */ diff --git a/target/linux/brcm47xx/patches-4.14/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch b/target/linux/brcm47xx/patches-4.14/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch new file mode 100644 index 000000000..d7d2d7e59 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/900-ssb-reject-PCI-writes-setting-CardBus-bridge-resourc.patch @@ -0,0 +1,30 @@ +From 5c81397a0147ea59c778d1de14ef54e2268221f6 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 8 Apr 2015 06:58:11 +0200 +Subject: [PATCH] ssb: reject PCI writes setting CardBus bridge resources +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +If SoC has a CardBus we can set resources of device at slot 1 only. It's +impossigle to set bridge resources as it simply overwrites device 1 +configuration and usually results in Data bus error-s. + +Signed-off-by: Rafał Miłecki +--- + drivers/ssb/driver_pcicore.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/ssb/driver_pcicore.c ++++ b/drivers/ssb/driver_pcicore.c +@@ -164,6 +164,10 @@ static int ssb_extpci_write_config(struc + SSB_WARN_ON(!pc->hostmode); + if (unlikely(len != 1 && len != 2 && len != 4)) + goto out; ++ /* CardBus SoCs allow configuring dev 1 resources only */ ++ if (extpci_core->cardbusmode && dev != 1 && ++ off >= PCI_BASE_ADDRESS_0 && off <= PCI_BASE_ADDRESS_5) ++ goto out; + addr = get_cfgspace_addr(pc, bus, dev, func, off); + if (unlikely(!addr)) + goto out; diff --git a/target/linux/brcm47xx/patches-4.14/901-Revert-bcma-switch-GPIO-portions-to-use-GPIOLIB_IRQC.patch b/target/linux/brcm47xx/patches-4.14/901-Revert-bcma-switch-GPIO-portions-to-use-GPIOLIB_IRQC.patch new file mode 100644 index 000000000..f1cfcd3e1 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/901-Revert-bcma-switch-GPIO-portions-to-use-GPIOLIB_IRQC.patch @@ -0,0 +1,233 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 18 Dec 2015 07:51:08 +0100 +Subject: [PATCH] Revert "bcma: switch GPIO portions to use GPIOLIB_IRQCHIP" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This reverts commit 74f4e0cc61080f63f28e8d519bdf437957e64217. + +On BCM47XX (MIPS) bcma_bus_get_host_dev returns NULL which results in: +[ 0.157054] missing gpiochip .dev parent pointer +[ 0.157287] bcma: bus0: Error registering GPIO driver: -22 + +Signed-off-by: Rafał Miłecki +--- + drivers/bcma/Kconfig | 2 +- + drivers/bcma/driver_gpio.c | 92 +++++++++++++++++++---------- + include/linux/bcma/bcma_driver_chipcommon.h | 1 + + 3 files changed, 64 insertions(+), 31 deletions(-) + +--- a/drivers/bcma/Kconfig ++++ b/drivers/bcma/Kconfig +@@ -104,7 +104,7 @@ config BCMA_DRIVER_GMAC_CMN + config BCMA_DRIVER_GPIO + bool "BCMA GPIO driver" + depends on BCMA && GPIOLIB +- select GPIOLIB_IRQCHIP if BCMA_HOST_SOC ++ select IRQ_DOMAIN if BCMA_HOST_SOC + help + Driver to provide access to the GPIO pins of the bcma bus. + +--- a/drivers/bcma/driver_gpio.c ++++ b/drivers/bcma/driver_gpio.c +@@ -8,8 +8,10 @@ + * Licensed under the GNU/GPL. See COPYING for details. + */ + +-#include ++#include ++#include + #include ++#include + #include + #include + +@@ -72,11 +74,19 @@ static void bcma_gpio_free(struct gpio_c + } + + #if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X) ++static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ struct bcma_drv_cc *cc = gpiochip_get_data(chip); ++ ++ if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) ++ return irq_find_mapping(cc->irq_domain, gpio); ++ else ++ return -EINVAL; ++} + + static void bcma_gpio_irq_unmask(struct irq_data *d) + { +- struct gpio_chip *gc = irq_data_get_irq_chip_data(d); +- struct bcma_drv_cc *cc = gpiochip_get_data(gc); ++ struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d); + int gpio = irqd_to_hwirq(d); + u32 val = bcma_chipco_gpio_in(cc, BIT(gpio)); + +@@ -86,8 +96,7 @@ static void bcma_gpio_irq_unmask(struct + + static void bcma_gpio_irq_mask(struct irq_data *d) + { +- struct gpio_chip *gc = irq_data_get_irq_chip_data(d); +- struct bcma_drv_cc *cc = gpiochip_get_data(gc); ++ struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d); + int gpio = irqd_to_hwirq(d); + + bcma_chipco_gpio_intmask(cc, BIT(gpio), 0); +@@ -102,7 +111,6 @@ static struct irq_chip bcma_gpio_irq_chi + static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id) + { + struct bcma_drv_cc *cc = dev_id; +- struct gpio_chip *gc = &cc->gpio; + u32 val = bcma_cc_read32(cc, BCMA_CC_GPIOIN); + u32 mask = bcma_cc_read32(cc, BCMA_CC_GPIOIRQ); + u32 pol = bcma_cc_read32(cc, BCMA_CC_GPIOPOL); +@@ -112,58 +120,81 @@ static irqreturn_t bcma_gpio_irq_handler + if (!irqs) + return IRQ_NONE; + +- for_each_set_bit(gpio, &irqs, gc->ngpio) +- generic_handle_irq(irq_find_mapping(gc->irqdomain, gpio)); ++ for_each_set_bit(gpio, &irqs, cc->gpio.ngpio) ++ generic_handle_irq(bcma_gpio_to_irq(&cc->gpio, gpio)); + bcma_chipco_gpio_polarity(cc, irqs, val & irqs); + + return IRQ_HANDLED; + } + +-static int bcma_gpio_irq_init(struct bcma_drv_cc *cc) ++static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc) + { + struct gpio_chip *chip = &cc->gpio; +- int hwirq, err; ++ int gpio, hwirq, err; + + if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC) + return 0; + ++ cc->irq_domain = irq_domain_add_linear(NULL, chip->ngpio, ++ &irq_domain_simple_ops, cc); ++ if (!cc->irq_domain) { ++ err = -ENODEV; ++ goto err_irq_domain; ++ } ++ for (gpio = 0; gpio < chip->ngpio; gpio++) { ++ int irq = irq_create_mapping(cc->irq_domain, gpio); ++ ++ irq_set_chip_data(irq, cc); ++ irq_set_chip_and_handler(irq, &bcma_gpio_irq_chip, ++ handle_simple_irq); ++ } ++ + hwirq = bcma_core_irq(cc->core, 0); + err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio", + cc); + if (err) +- return err; ++ goto err_req_irq; + + bcma_chipco_gpio_intmask(cc, ~0, 0); + bcma_cc_set32(cc, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO); + +- err = gpiochip_irqchip_add(chip, +- &bcma_gpio_irq_chip, +- 0, +- handle_simple_irq, +- IRQ_TYPE_NONE); +- if (err) { +- free_irq(hwirq, cc); +- return err; +- } +- + return 0; ++ ++err_req_irq: ++ for (gpio = 0; gpio < chip->ngpio; gpio++) { ++ int irq = irq_find_mapping(cc->irq_domain, gpio); ++ ++ irq_dispose_mapping(irq); ++ } ++ irq_domain_remove(cc->irq_domain); ++err_irq_domain: ++ return err; + } + +-static void bcma_gpio_irq_exit(struct bcma_drv_cc *cc) ++static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc) + { ++ struct gpio_chip *chip = &cc->gpio; ++ int gpio; ++ + if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC) + return; + + bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO); + free_irq(bcma_core_irq(cc->core, 0), cc); ++ for (gpio = 0; gpio < chip->ngpio; gpio++) { ++ int irq = irq_find_mapping(cc->irq_domain, gpio); ++ ++ irq_dispose_mapping(irq); ++ } ++ irq_domain_remove(cc->irq_domain); + } + #else +-static int bcma_gpio_irq_init(struct bcma_drv_cc *cc) ++static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc) + { + return 0; + } + +-static void bcma_gpio_irq_exit(struct bcma_drv_cc *cc) ++static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc) + { + } + #endif +@@ -182,8 +213,9 @@ int bcma_gpio_init(struct bcma_drv_cc *c + chip->set = bcma_gpio_set_value; + chip->direction_input = bcma_gpio_direction_input; + chip->direction_output = bcma_gpio_direction_output; +- chip->owner = THIS_MODULE; +- chip->parent = bcma_bus_get_host_dev(bus); ++#if IS_BUILTIN(CONFIG_BCM47XX) || IS_BUILTIN(CONFIG_ARCH_BCM_5301X) ++ chip->to_irq = bcma_gpio_to_irq; ++#endif + #if IS_BUILTIN(CONFIG_OF) + chip->of_node = cc->core->dev.of_node; + #endif +@@ -212,13 +244,13 @@ int bcma_gpio_init(struct bcma_drv_cc *c + else + chip->base = -1; + +- err = gpiochip_add_data(chip, cc); ++ err = bcma_gpio_irq_domain_init(cc); + if (err) + return err; + +- err = bcma_gpio_irq_init(cc); ++ err = gpiochip_add_data(chip, cc); + if (err) { +- gpiochip_remove(chip); ++ bcma_gpio_irq_domain_exit(cc); + return err; + } + +@@ -227,7 +259,7 @@ int bcma_gpio_init(struct bcma_drv_cc *c + + int bcma_gpio_unregister(struct bcma_drv_cc *cc) + { +- bcma_gpio_irq_exit(cc); ++ bcma_gpio_irq_domain_exit(cc); + gpiochip_remove(&cc->gpio); + return 0; + } +--- a/include/linux/bcma/bcma_driver_chipcommon.h ++++ b/include/linux/bcma/bcma_driver_chipcommon.h +@@ -645,6 +645,7 @@ struct bcma_drv_cc { + spinlock_t gpio_lock; + #ifdef CONFIG_BCMA_DRIVER_GPIO + struct gpio_chip gpio; ++ struct irq_domain *irq_domain; + #endif + }; + diff --git a/target/linux/brcm47xx/patches-4.14/940-bcm47xx-yenta.patch b/target/linux/brcm47xx/patches-4.14/940-bcm47xx-yenta.patch new file mode 100644 index 000000000..00a44d631 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/940-bcm47xx-yenta.patch @@ -0,0 +1,46 @@ +--- a/drivers/pcmcia/yenta_socket.c ++++ b/drivers/pcmcia/yenta_socket.c +@@ -919,6 +919,8 @@ static unsigned int yenta_probe_irq(stru + * Probe for usable interrupts using the force + * register to generate bogus card status events. + */ ++#ifndef CONFIG_BCM47XX ++ /* WRT54G3G does not like this */ + cb_writel(socket, CB_SOCKET_EVENT, -1); + cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); + reg = exca_readb(socket, I365_CSCINT); +@@ -934,6 +936,7 @@ static unsigned int yenta_probe_irq(stru + } + cb_writel(socket, CB_SOCKET_MASK, 0); + exca_writeb(socket, I365_CSCINT, reg); ++#endif + + mask = probe_irq_mask(val) & 0xffff; + +@@ -1018,6 +1021,10 @@ static void yenta_get_socket_capabilitie + else + socket->socket.irq_mask = 0; + ++ /* irq mask probing is broken for the WRT54G3G */ ++ if (socket->socket.irq_mask == 0) ++ socket->socket.irq_mask = 0x6f8; ++ + dev_info(&socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n", + socket->socket.irq_mask, socket->cb_irq); + } +@@ -1250,6 +1257,15 @@ static int yenta_probe(struct pci_dev *d + dev_info(&dev->dev, "Socket status: %08x\n", + cb_readl(socket, CB_SOCKET_STATE)); + ++ /* Generate an interrupt on card insert/remove */ ++ config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK); ++ ++ /* Set up Multifunction Routing Status Register */ ++ config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */); ++ ++ /* Switch interrupts to parallelized */ ++ config_writeb(socket, 0x92, 0x64); ++ + yenta_fixup_parent_bridge(dev->subordinate); + + /* Register it with the pcmcia layer.. */ diff --git a/target/linux/brcm47xx/patches-4.14/976-ssb_increase_pci_delay.patch b/target/linux/brcm47xx/patches-4.14/976-ssb_increase_pci_delay.patch new file mode 100644 index 000000000..90bda515e --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/976-ssb_increase_pci_delay.patch @@ -0,0 +1,11 @@ +--- a/drivers/ssb/driver_pcicore.c ++++ b/drivers/ssb/driver_pcicore.c +@@ -389,7 +389,7 @@ static void ssb_pcicore_init_hostmode(st + set_io_port_base(ssb_pcicore_controller.io_map_base); + /* Give some time to the PCI controller to configure itself with the new + * values. Not waiting at this point causes crashes of the machine. */ +- mdelay(10); ++ mdelay(300); + register_pci_controller(&ssb_pcicore_controller); + } + diff --git a/target/linux/brcm47xx/patches-4.14/999-wl_exports.patch b/target/linux/brcm47xx/patches-4.14/999-wl_exports.patch new file mode 100644 index 000000000..60ea1ea40 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.14/999-wl_exports.patch @@ -0,0 +1,22 @@ +--- a/drivers/firmware/broadcom/bcm47xx_nvram.c ++++ b/drivers/firmware/broadcom/bcm47xx_nvram.c +@@ -34,7 +34,8 @@ struct nvram_header { + u32 config_ncdl; /* ncdl values for memc */ + }; + +-static char nvram_buf[NVRAM_SPACE]; ++char nvram_buf[NVRAM_SPACE]; ++EXPORT_SYMBOL(nvram_buf); + static size_t nvram_len; + static const u32 nvram_sizes[] = {0x8000, 0xF000, 0x10000}; + static int cfe_env; +--- a/arch/mips/mm/cache.c ++++ b/arch/mips/mm/cache.c +@@ -64,6 +64,7 @@ void (*_dma_cache_wback)(unsigned long s + void (*_dma_cache_inv)(unsigned long start, unsigned long size); + + EXPORT_SYMBOL(_dma_cache_wback_inv); ++EXPORT_SYMBOL(_dma_cache_inv); + + #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */ + diff --git a/target/linux/brcm47xx/patches-4.4/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch b/target/linux/brcm47xx/patches-4.4/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch new file mode 100644 index 000000000..d14719ba3 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.4/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch @@ -0,0 +1,86 @@ +From 272641206100e89656038180da12eff4f03d79d1 Mon Sep 17 00:00:00 2001 +From: Dan Haab +Date: Tue, 27 Mar 2018 11:24:34 -0600 +Subject: [PATCH] MIPS: BCM47XX: Add Luxul XAP1500/XWR1750 WiFi LEDs + +Some Luxul devices use PCIe connected GPIO LEDs that are not available +until the PCI subsytem and its drivers load. Using the same array for +these LEDs would block registering any LEDs until all GPIOs become +available. This may be undesired behavior as some LEDs should be +available as early as possible (e.g. system status LED). This patch will +allow registering available LEDs while deferring these PCIe GPIO +connected 'extra' LEDs until they become available. + +Signed-off-by: Dan Haab +Cc: Ralf Baechle +Cc: Hauke Mehrtens +Cc: linux-mips@linux-mips.org +Patchwork: https://patchwork.linux-mips.org/patch/18952/ +Signed-off-by: James Hogan +--- + arch/mips/bcm47xx/leds.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/arch/mips/bcm47xx/leds.c ++++ b/arch/mips/bcm47xx/leds.c +@@ -408,6 +408,12 @@ bcm47xx_leds_luxul_xap_1500_v1[] __initc + }; + + static const struct gpio_led ++bcm47xx_leds_luxul_xap1500_v1_extra[] __initconst = { ++ BCM47XX_GPIO_LED(44, "green", "5ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++ BCM47XX_GPIO_LED(76, "green", "2ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ ++static const struct gpio_led + bcm47xx_leds_luxul_xbr_4400_v1[] __initconst = { + BCM47XX_GPIO_LED(12, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF), + BCM47XX_GPIO_LED_TRIGGER(15, "green", "status", 0, "timer"), +@@ -434,6 +440,11 @@ bcm47xx_leds_luxul_xwr_1750_v1[] __initc + BCM47XX_GPIO_LED(15, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF), + }; + ++static const struct gpio_led ++bcm47xx_leds_luxul_xwr1750_v1_extra[] __initconst = { ++ BCM47XX_GPIO_LED(76, "green", "2ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ + /* Microsoft */ + + static const struct gpio_led +@@ -527,6 +538,12 @@ static struct gpio_led_platform_data bcm + bcm47xx_leds_pdata.num_leds = ARRAY_SIZE(dev_leds); \ + } while (0) + ++static struct gpio_led_platform_data bcm47xx_leds_pdata_extra __initdata = {}; ++#define bcm47xx_set_pdata_extra(dev_leds) do { \ ++ bcm47xx_leds_pdata_extra.leds = dev_leds; \ ++ bcm47xx_leds_pdata_extra.num_leds = ARRAY_SIZE(dev_leds); \ ++} while (0) ++ + void __init bcm47xx_leds_register(void) + { + enum bcm47xx_board board = bcm47xx_board_get(); +@@ -704,6 +721,7 @@ void __init bcm47xx_leds_register(void) + break; + case BCM47XX_BOARD_LUXUL_XAP_1500_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xap_1500_v1); ++ bcm47xx_set_pdata_extra(bcm47xx_leds_luxul_xap1500_v1_extra); + break; + case BCM47XX_BOARD_LUXUL_XBR_4400_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xbr_4400_v1); +@@ -716,6 +734,7 @@ void __init bcm47xx_leds_register(void) + break; + case BCM47XX_BOARD_LUXUL_XWR_1750_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xwr_1750_v1); ++ bcm47xx_set_pdata_extra(bcm47xx_leds_luxul_xwr1750_v1_extra); + break; + + case BCM47XX_BOARD_MICROSOFT_MN700: +@@ -759,4 +778,6 @@ void __init bcm47xx_leds_register(void) + } + + gpio_led_register_device(-1, &bcm47xx_leds_pdata); ++ if (bcm47xx_leds_pdata_extra.num_leds) ++ gpio_led_register_device(0, &bcm47xx_leds_pdata_extra); + } diff --git a/target/linux/brcm47xx/patches-4.4/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch b/target/linux/brcm47xx/patches-4.4/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch index 82303856b..c5f97ba49 100644 --- a/target/linux/brcm47xx/patches-4.4/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch +++ b/target/linux/brcm47xx/patches-4.4/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch @@ -201,7 +201,7 @@ bcm47xx_leds_linksys_wrt54g_generic[] __initconst = { BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON), -@@ -532,6 +547,9 @@ void __init bcm47xx_leds_register(void) +@@ -549,6 +564,9 @@ void __init bcm47xx_leds_register(void) enum bcm47xx_board board = bcm47xx_board_get(); switch (board) { @@ -211,7 +211,7 @@ case BCM47XX_BOARD_ASUS_RTN12: bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12); break; -@@ -665,6 +683,9 @@ void __init bcm47xx_leds_register(void) +@@ -682,6 +700,9 @@ void __init bcm47xx_leds_register(void) case BCM47XX_BOARD_LINKSYS_WRT310NV1: bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1); break; diff --git a/target/linux/brcm47xx/patches-4.9/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch b/target/linux/brcm47xx/patches-4.9/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch new file mode 100644 index 000000000..d14719ba3 --- /dev/null +++ b/target/linux/brcm47xx/patches-4.9/032-MIPS-BCM47XX-Add-Luxul-XAP1500-XWR1750-WiFi-LEDs.patch @@ -0,0 +1,86 @@ +From 272641206100e89656038180da12eff4f03d79d1 Mon Sep 17 00:00:00 2001 +From: Dan Haab +Date: Tue, 27 Mar 2018 11:24:34 -0600 +Subject: [PATCH] MIPS: BCM47XX: Add Luxul XAP1500/XWR1750 WiFi LEDs + +Some Luxul devices use PCIe connected GPIO LEDs that are not available +until the PCI subsytem and its drivers load. Using the same array for +these LEDs would block registering any LEDs until all GPIOs become +available. This may be undesired behavior as some LEDs should be +available as early as possible (e.g. system status LED). This patch will +allow registering available LEDs while deferring these PCIe GPIO +connected 'extra' LEDs until they become available. + +Signed-off-by: Dan Haab +Cc: Ralf Baechle +Cc: Hauke Mehrtens +Cc: linux-mips@linux-mips.org +Patchwork: https://patchwork.linux-mips.org/patch/18952/ +Signed-off-by: James Hogan +--- + arch/mips/bcm47xx/leds.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/arch/mips/bcm47xx/leds.c ++++ b/arch/mips/bcm47xx/leds.c +@@ -408,6 +408,12 @@ bcm47xx_leds_luxul_xap_1500_v1[] __initc + }; + + static const struct gpio_led ++bcm47xx_leds_luxul_xap1500_v1_extra[] __initconst = { ++ BCM47XX_GPIO_LED(44, "green", "5ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++ BCM47XX_GPIO_LED(76, "green", "2ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ ++static const struct gpio_led + bcm47xx_leds_luxul_xbr_4400_v1[] __initconst = { + BCM47XX_GPIO_LED(12, "green", "usb", 0, LEDS_GPIO_DEFSTATE_OFF), + BCM47XX_GPIO_LED_TRIGGER(15, "green", "status", 0, "timer"), +@@ -434,6 +440,11 @@ bcm47xx_leds_luxul_xwr_1750_v1[] __initc + BCM47XX_GPIO_LED(15, "green", "wps", 0, LEDS_GPIO_DEFSTATE_OFF), + }; + ++static const struct gpio_led ++bcm47xx_leds_luxul_xwr1750_v1_extra[] __initconst = { ++ BCM47XX_GPIO_LED(76, "green", "2ghz", 0, LEDS_GPIO_DEFSTATE_OFF), ++}; ++ + /* Microsoft */ + + static const struct gpio_led +@@ -527,6 +538,12 @@ static struct gpio_led_platform_data bcm + bcm47xx_leds_pdata.num_leds = ARRAY_SIZE(dev_leds); \ + } while (0) + ++static struct gpio_led_platform_data bcm47xx_leds_pdata_extra __initdata = {}; ++#define bcm47xx_set_pdata_extra(dev_leds) do { \ ++ bcm47xx_leds_pdata_extra.leds = dev_leds; \ ++ bcm47xx_leds_pdata_extra.num_leds = ARRAY_SIZE(dev_leds); \ ++} while (0) ++ + void __init bcm47xx_leds_register(void) + { + enum bcm47xx_board board = bcm47xx_board_get(); +@@ -704,6 +721,7 @@ void __init bcm47xx_leds_register(void) + break; + case BCM47XX_BOARD_LUXUL_XAP_1500_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xap_1500_v1); ++ bcm47xx_set_pdata_extra(bcm47xx_leds_luxul_xap1500_v1_extra); + break; + case BCM47XX_BOARD_LUXUL_XBR_4400_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xbr_4400_v1); +@@ -716,6 +734,7 @@ void __init bcm47xx_leds_register(void) + break; + case BCM47XX_BOARD_LUXUL_XWR_1750_V1: + bcm47xx_set_pdata(bcm47xx_leds_luxul_xwr_1750_v1); ++ bcm47xx_set_pdata_extra(bcm47xx_leds_luxul_xwr1750_v1_extra); + break; + + case BCM47XX_BOARD_MICROSOFT_MN700: +@@ -759,4 +778,6 @@ void __init bcm47xx_leds_register(void) + } + + gpio_led_register_device(-1, &bcm47xx_leds_pdata); ++ if (bcm47xx_leds_pdata_extra.num_leds) ++ gpio_led_register_device(0, &bcm47xx_leds_pdata_extra); + } diff --git a/target/linux/brcm47xx/patches-4.9/159-cpu_fixes.patch b/target/linux/brcm47xx/patches-4.9/159-cpu_fixes.patch index 36d39fa89..3102923a6 100644 --- a/target/linux/brcm47xx/patches-4.9/159-cpu_fixes.patch +++ b/target/linux/brcm47xx/patches-4.9/159-cpu_fixes.patch @@ -204,7 +204,7 @@ #define __BUILD_BLAST_USER_CACHE(pfx, desc, indexop, hitop, lsize) \ static inline void blast_##pfx##cache##lsize##_user_page(unsigned long page) \ -@@ -660,17 +744,19 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde +@@ -660,53 +744,23 @@ __BUILD_BLAST_USER_CACHE(d, dcache, Inde __BUILD_BLAST_USER_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) /* build blast_xxx_range, protected_blast_xxx_range */ @@ -214,18 +214,59 @@ unsigned long end) \ { \ unsigned long lsize = cpu_##desc##_line_size(); \ +- unsigned long lsize_2 = lsize * 2; \ +- unsigned long lsize_3 = lsize * 3; \ +- unsigned long lsize_4 = lsize * 4; \ +- unsigned long lsize_5 = lsize * 5; \ +- unsigned long lsize_6 = lsize * 6; \ +- unsigned long lsize_7 = lsize * 7; \ +- unsigned long lsize_8 = lsize * 8; \ unsigned long addr = start & ~(lsize - 1); \ - unsigned long aend = (end - 1) & ~(lsize - 1); \ +- unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \ +- int lines = (aend - addr) / lsize; \ ++ unsigned long aend = (end - 1) & ~(lsize - 1); \ + war \ \ __##pfx##flush_prologue \ \ - while (1) { \ +- while (lines >= 8) { \ +- prot##cache_op(hitop, addr); \ +- prot##cache_op(hitop, addr + lsize); \ +- prot##cache_op(hitop, addr + lsize_2); \ +- prot##cache_op(hitop, addr + lsize_3); \ +- prot##cache_op(hitop, addr + lsize_4); \ +- prot##cache_op(hitop, addr + lsize_5); \ +- prot##cache_op(hitop, addr + lsize_6); \ +- prot##cache_op(hitop, addr + lsize_7); \ +- addr += lsize_8; \ +- lines -= 8; \ +- } \ +- \ +- if (lines & 0x4) { \ +- prot##cache_op(hitop, addr); \ +- prot##cache_op(hitop, addr + lsize); \ +- prot##cache_op(hitop, addr + lsize_2); \ +- prot##cache_op(hitop, addr + lsize_3); \ +- addr += lsize_4; \ +- } \ +- \ +- if (lines & 0x2) { \ +- prot##cache_op(hitop, addr); \ +- prot##cache_op(hitop, addr + lsize); \ +- addr += lsize_2; \ +- } \ +- \ +- if (lines & 0x1) { \ ++ while (1) { \ + war2 \ prot##cache_op(hitop, addr); \ - if (addr == aend) \ - break; \ -@@ -682,8 +768,8 @@ static inline void prot##extra##blast_## ++ if (addr == aend) \ ++ break; \ ++ addr += lsize; \ + } \ + \ + __##pfx##flush_epilogue \ +@@ -714,8 +768,8 @@ static inline void prot##extra##blast_## #ifndef CONFIG_EVA @@ -236,7 +277,7 @@ #else -@@ -720,14 +806,14 @@ __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache +@@ -752,14 +806,14 @@ __BUILD_PROT_BLAST_CACHE_RANGE(d, dcache __BUILD_PROT_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I) #endif diff --git a/target/linux/brcm47xx/patches-4.9/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch b/target/linux/brcm47xx/patches-4.9/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch index 82303856b..c5f97ba49 100644 --- a/target/linux/brcm47xx/patches-4.9/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch +++ b/target/linux/brcm47xx/patches-4.9/320-MIPS-BCM47XX-Devices-database-update-for-4.x.patch @@ -201,7 +201,7 @@ bcm47xx_leds_linksys_wrt54g_generic[] __initconst = { BCM47XX_GPIO_LED(0, "unk", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), BCM47XX_GPIO_LED(1, "unk", "power", 0, LEDS_GPIO_DEFSTATE_ON), -@@ -532,6 +547,9 @@ void __init bcm47xx_leds_register(void) +@@ -549,6 +564,9 @@ void __init bcm47xx_leds_register(void) enum bcm47xx_board board = bcm47xx_board_get(); switch (board) { @@ -211,7 +211,7 @@ case BCM47XX_BOARD_ASUS_RTN12: bcm47xx_set_pdata(bcm47xx_leds_asus_rtn12); break; -@@ -665,6 +683,9 @@ void __init bcm47xx_leds_register(void) +@@ -682,6 +700,9 @@ void __init bcm47xx_leds_register(void) case BCM47XX_BOARD_LINKSYS_WRT310NV1: bcm47xx_set_pdata(bcm47xx_leds_linksys_wrt310nv1); break; diff --git a/target/linux/brcm63xx/Makefile b/target/linux/brcm63xx/Makefile index 84e9a8d44..1aed6b20e 100644 --- a/target/linux/brcm63xx/Makefile +++ b/target/linux/brcm63xx/Makefile @@ -12,7 +12,7 @@ BOARD:=brcm63xx BOARDNAME:=Broadcom BCM63xx SUBTARGETS:=generic smp FEATURES:=squashfs usb atm pci pcmcia usbgadget -KERNEL_PATCHVER:=4.4 +KERNEL_PATCHVER:=4.9 MAINTAINER:=Jonas Gorski define Target/Description diff --git a/target/linux/brcm63xx/config-4.14 b/target/linux/brcm63xx/config-4.14 new file mode 100644 index 000000000..87cfe2886 --- /dev/null +++ b/target/linux/brcm63xx/config-4.14 @@ -0,0 +1,288 @@ +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set +# CONFIG_ARCH_HAS_SG_CHAIN is not set +# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set +# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_PERIPH_IRQ=y +CONFIG_BCM63XX=y +CONFIG_BCM63XX_CPU_3368=y +CONFIG_BCM63XX_CPU_6318=y +CONFIG_BCM63XX_CPU_63268=y +CONFIG_BCM63XX_CPU_6328=y +CONFIG_BCM63XX_CPU_6338=y +CONFIG_BCM63XX_CPU_6345=y +CONFIG_BCM63XX_CPU_6348=y +CONFIG_BCM63XX_CPU_6358=y +CONFIG_BCM63XX_CPU_6362=y +CONFIG_BCM63XX_CPU_6368=y +CONFIG_BCM63XX_EHCI=y +CONFIG_BCM63XX_ENET=y +CONFIG_BCM63XX_OHCI=y +CONFIG_BCM63XX_PHY=y +CONFIG_BCM63XX_WDT=y +CONFIG_BCMA=y +CONFIG_BCMA_BLOCKIO=y +# CONFIG_BCMA_DEBUG is not set +# CONFIG_BCMA_DRIVER_GMAC_CMN is not set +# CONFIG_BCMA_DRIVER_MIPS is not set +CONFIG_BCMA_DRIVER_PCI=y +# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set +CONFIG_BCMA_HOST_PCI=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +# CONFIG_BCMA_HOST_SOC is not set +CONFIG_BCM_NET_PHYLIB=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOARD_BCM63XX_DT=y +CONFIG_BOARD_BCM963XX=y +CONFIG_BOARD_LIVEBOX=y +CONFIG_CEVT_R4K=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_R4K_FPU=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_CORE=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EXPORTFS=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_FIXED_PHY=y +CONFIG_FUTEX_PI=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_BCM63XX=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CBPF_JIT=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_COPY_THREAD_TLS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DEBUG_STACKOVERFLOW=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM63XX=y +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_KEXEC=y +CONFIG_KEXEC_CORE=y +CONFIG_LEDS_BCM6328=y +CONFIG_LEDS_BCM6358=y +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +# CONFIG_MIPS_ELF_APPENDED_DTB is not set +CONFIG_MIPS_EXTERNAL_TIMER=y +# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set +CONFIG_MIPS_L1_CACHE_SHIFT=4 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +# CONFIG_MIPS_MACHINE is not set +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MTD_BCM63XX_PARTS=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_PARSER_IMAGETAG=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +CONFIG_MTD_SPI_NOR=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +# CONFIG_NO_IOPORT_MAP is not set +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_PCI=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_BCM6318=y +CONFIG_PINCTRL_BCM63268=y +CONFIG_PINCTRL_BCM6328=y +CONFIG_PINCTRL_BCM6348=y +CONFIG_PINCTRL_BCM6358=y +CONFIG_PINCTRL_BCM6362=y +CONFIG_PINCTRL_BCM6368=y +CONFIG_PINCTRL_BCM63XX=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_RCU_NEED_SEGCBLIST is not set +# CONFIG_RCU_STALL_COMMON is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RTL8366_SMI=y +CONFIG_RTL8367_PHY=y +# CONFIG_SCHED_INFO is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SRCU=y +CONFIG_SSB=y +CONFIG_SSB_B43_PCI_BRIDGE=y +CONFIG_SSB_BLOCKIO=y +# CONFIG_SSB_DRIVER_MIPS is not set +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_SPROM=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_B53=y +CONFIG_SWCONFIG_B53_MMAP_DRIVER=y +CONFIG_SWCONFIG_B53_PHY_DRIVER=y +CONFIG_SWCONFIG_B53_PHY_FIXUP=y +CONFIG_SWCONFIG_B53_SPI_DRIVER=y +# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_THIN_ARCHIVES=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y diff --git a/target/linux/brcm63xx/config-4.9 b/target/linux/brcm63xx/config-4.9 new file mode 100644 index 000000000..f1c34715f --- /dev/null +++ b/target/linux/brcm63xx/config-4.9 @@ -0,0 +1,261 @@ +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set +# CONFIG_ARCH_HAS_SG_CHAIN is not set +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_PERIPH_IRQ=y +CONFIG_BCM63XX=y +CONFIG_BCM63XX_CPU_3368=y +CONFIG_BCM63XX_CPU_6318=y +CONFIG_BCM63XX_CPU_63268=y +CONFIG_BCM63XX_CPU_6328=y +CONFIG_BCM63XX_CPU_6338=y +CONFIG_BCM63XX_CPU_6345=y +CONFIG_BCM63XX_CPU_6348=y +CONFIG_BCM63XX_CPU_6358=y +CONFIG_BCM63XX_CPU_6362=y +CONFIG_BCM63XX_CPU_6368=y +CONFIG_BCM63XX_EHCI=y +CONFIG_BCM63XX_ENET=y +CONFIG_BCM63XX_OHCI=y +CONFIG_BCM63XX_PHY=y +CONFIG_BCM63XX_WDT=y +CONFIG_BCMA=y +CONFIG_BCMA_BLOCKIO=y +# CONFIG_BCMA_DEBUG is not set +# CONFIG_BCMA_DRIVER_GMAC_CMN is not set +# CONFIG_BCMA_DRIVER_MIPS is not set +CONFIG_BCMA_DRIVER_PCI=y +# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set +CONFIG_BCMA_HOST_PCI=y +CONFIG_BCMA_HOST_PCI_POSSIBLE=y +# CONFIG_BCMA_HOST_SOC is not set +CONFIG_BCM_NET_PHYLIB=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOARD_BCM63XX_DT=y +CONFIG_BOARD_BCM963XX=y +CONFIG_BOARD_LIVEBOX=y +CONFIG_CEVT_R4K=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_R4K_FPU=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_FIXED_PHY=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_BCM63XX=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_SYSFS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CBPF_JIT=y +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DEBUG_STACKOVERFLOW=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM63XX=y +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_KEXEC=y +CONFIG_KEXEC_CORE=y +CONFIG_LEDS_BCM6328=y +CONFIG_LEDS_BCM6358=y +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +CONFIG_MDIO_BOARDINFO=y +CONFIG_MFD_SYSCON=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +# CONFIG_MIPS_ELF_APPENDED_DTB is not set +# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set +CONFIG_MIPS_L1_CACHE_SHIFT=4 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +# CONFIG_MIPS_MACHINE is not set +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_MTD_BCM63XX_PARTS=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_PARSER_IMAGETAG=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y +CONFIG_MTD_SPI_NOR=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +# CONFIG_NO_IOPORT_MAP is not set +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_PCI=y +# CONFIG_PCIEAER is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_BCM6318=y +CONFIG_PINCTRL_BCM63268=y +CONFIG_PINCTRL_BCM6328=y +CONFIG_PINCTRL_BCM6348=y +CONFIG_PINCTRL_BCM6358=y +CONFIG_PINCTRL_BCM6362=y +CONFIG_PINCTRL_BCM6368=y +CONFIG_PINCTRL_BCM63XX=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +# CONFIG_RCU_STALL_COMMON is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RTL8366_SMI=y +CONFIG_RTL8367_PHY=y +# CONFIG_SCHED_INFO is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SQUASHFS_EMBEDDED=y +CONFIG_SRCU=y +CONFIG_SSB=y +CONFIG_SSB_B43_PCI_BRIDGE=y +CONFIG_SSB_BLOCKIO=y +# CONFIG_SSB_DRIVER_MIPS is not set +CONFIG_SSB_DRIVER_PCICORE=y +CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y +CONFIG_SSB_PCIHOST=y +CONFIG_SSB_PCIHOST_POSSIBLE=y +CONFIG_SSB_SPROM=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_B53=y +CONFIG_SWCONFIG_B53_MMAP_DRIVER=y +CONFIG_SWCONFIG_B53_PHY_DRIVER=y +CONFIG_SWCONFIG_B53_PHY_FIXUP=y +CONFIG_SWCONFIG_B53_SPI_DRIVER=y +# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y diff --git a/target/linux/brcm63xx/dts/a226g.dts b/target/linux/brcm63xx/dts/a226g.dts index 921e46c79..0023c296b 100644 --- a/target/linux/brcm63xx/dts/a226g.dts +++ b/target/linux/brcm63xx/dts/a226g.dts @@ -9,7 +9,7 @@ compatible = "pirelli,a226g", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -96,20 +96,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/a226m-fwb.dts b/target/linux/brcm63xx/dts/a226m-fwb.dts index c21d06ec5..5ae97d76b 100644 --- a/target/linux/brcm63xx/dts/a226m-fwb.dts +++ b/target/linux/brcm63xx/dts/a226m-fwb.dts @@ -9,7 +9,7 @@ compatible = "pirelli,a226m-fwb", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -96,20 +96,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xfc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0xfc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/a226m.dts b/target/linux/brcm63xx/dts/a226m.dts index 7c8bdabf7..26ea47c8a 100644 --- a/target/linux/brcm63xx/dts/a226m.dts +++ b/target/linux/brcm63xx/dts/a226m.dts @@ -9,7 +9,7 @@ compatible = "pirelli,a226m", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -96,20 +96,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/a4001n.dts b/target/linux/brcm63xx/dts/a4001n.dts index db835434d..8662c71c6 100644 --- a/target/linux/brcm63xx/dts/a4001n.dts +++ b/target/linux/brcm63xx/dts/a4001n.dts @@ -9,7 +9,7 @@ compatible = "adb,a4001n", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -69,25 +69,29 @@ spi-rx-bus-width = <2>; reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0x7e0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@7f0000 { - reg = <0x7f0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0x7e0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + reg = <0x7f0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/a4001n1.dts b/target/linux/brcm63xx/dts/a4001n1.dts index ad1590d7a..dece3c1de 100644 --- a/target/linux/brcm63xx/dts/a4001n1.dts +++ b/target/linux/brcm63xx/dts/a4001n1.dts @@ -9,7 +9,7 @@ compatible = "adb,a4001n1", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -102,20 +102,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0xfe0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@ff0000 { - reg = <0xff0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0xfe0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@ff0000 { + reg = <0xff0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/ad1018-nor.dts b/target/linux/brcm63xx/dts/ad1018-nor.dts index 7a630a185..93862c2fc 100644 --- a/target/linux/brcm63xx/dts/ad1018-nor.dts +++ b/target/linux/brcm63xx/dts/ad1018-nor.dts @@ -9,7 +9,7 @@ compatible = "sercomm,ad1018-nor", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -133,6 +133,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/agpf-s0.dts b/target/linux/brcm63xx/dts/agpf-s0.dts index 6ac3801c3..9678a7a47 100644 --- a/target/linux/brcm63xx/dts/agpf-s0.dts +++ b/target/linux/brcm63xx/dts/agpf-s0.dts @@ -9,7 +9,7 @@ compatible = "pirelli,agpf-s0", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -100,20 +100,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xfc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x020000 0xfc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/ar-5315u.dts b/target/linux/brcm63xx/dts/ar-5315u.dts index e359fe4eb..9457bb319 100644 --- a/target/linux/brcm63xx/dts/ar-5315u.dts +++ b/target/linux/brcm63xx/dts/ar-5315u.dts @@ -9,7 +9,7 @@ compatible = "comtrend,ar-5315u", "brcm,bcm6318"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -82,20 +82,28 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; - linux@10000 { - reg = <0x010000 0xfe0000>; - label = "linux"; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - nvram@ff0000 { - reg = <0xff0000 0x010000>; - label = "nvram"; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; + + linux@10000 { + reg = <0x010000 0xfe0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@ff0000 { + reg = <0xff0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/ar-5381u.dts b/target/linux/brcm63xx/dts/ar-5381u.dts index 9da5b7e3c..849c7b27d 100644 --- a/target/linux/brcm63xx/dts/ar-5381u.dts +++ b/target/linux/brcm63xx/dts/ar-5381u.dts @@ -9,7 +9,7 @@ compatible = "comtrend,ar-5381u", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -61,20 +61,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0xfe0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@ff0000 { - reg = <0xff0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0xfe0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@ff0000 { + reg = <0xff0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/ar-5387un.dts b/target/linux/brcm63xx/dts/ar-5387un.dts index 4dd71459f..3f2f54011 100644 --- a/target/linux/brcm63xx/dts/ar-5387un.dts +++ b/target/linux/brcm63xx/dts/ar-5387un.dts @@ -9,7 +9,7 @@ compatible = "comtrend,ar-5387un", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -69,20 +69,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0xfe0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@ff0000 { - reg = <0xff0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0xfe0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@ff0000 { + reg = <0xff0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/ar1004g.dts b/target/linux/brcm63xx/dts/ar1004g.dts index e7265f4d4..9357726af 100644 --- a/target/linux/brcm63xx/dts/ar1004g.dts +++ b/target/linux/brcm63xx/dts/ar1004g.dts @@ -9,7 +9,7 @@ compatible = "asmax,ar1004g", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -51,20 +51,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/av4202n.dts b/target/linux/brcm63xx/dts/av4202n.dts index ef6160788..2b0a15376 100644 --- a/target/linux/brcm63xx/dts/av4202n.dts +++ b/target/linux/brcm63xx/dts/av4202n.dts @@ -10,7 +10,7 @@ compatible = "adb,av4202n", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -73,20 +73,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xfc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x020000 0xfc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/bcm96318ref.dts b/target/linux/brcm63xx/dts/bcm96318ref.dts index e48c0bf46..26dda1cba 100644 --- a/target/linux/brcm63xx/dts/bcm96318ref.dts +++ b/target/linux/brcm63xx/dts/bcm96318ref.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96318ref", "brcm,bcm6318"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -67,6 +67,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/bcm96318ref_p300.dts b/target/linux/brcm63xx/dts/bcm96318ref_p300.dts index db9d5eccd..a26b3b3db 100644 --- a/target/linux/brcm63xx/dts/bcm96318ref_p300.dts +++ b/target/linux/brcm63xx/dts/bcm96318ref_p300.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96318ref_p300", "brcm,bcm6318"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -73,6 +73,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/bcm963268bu_p300.dts b/target/linux/brcm63xx/dts/bcm963268bu_p300.dts index 2bccb57a9..19d713c03 100644 --- a/target/linux/brcm63xx/dts/bcm963268bu_p300.dts +++ b/target/linux/brcm63xx/dts/bcm963268bu_p300.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm963268bu_p300", "brcm,bcm63268"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -48,6 +48,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/bcm963269bhr.dts b/target/linux/brcm63xx/dts/bcm963269bhr.dts index d3c709877..4caca94f7 100644 --- a/target/linux/brcm63xx/dts/bcm963269bhr.dts +++ b/target/linux/brcm63xx/dts/bcm963269bhr.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm963269bhr", "brcm,bcm63268"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -56,6 +56,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/bcm963281TAN.dts b/target/linux/brcm63xx/dts/bcm963281TAN.dts index d0d19a355..48f4c2c71 100644 --- a/target/linux/brcm63xx/dts/bcm963281TAN.dts +++ b/target/linux/brcm63xx/dts/bcm963281TAN.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm963281TAN", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -58,6 +58,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/bcm96328avng.dts b/target/linux/brcm63xx/dts/bcm96328avng.dts index d0d67880e..e9bee3464 100644 --- a/target/linux/brcm63xx/dts/bcm96328avng.dts +++ b/target/linux/brcm63xx/dts/bcm96328avng.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96328avng", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -58,6 +58,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/bcm96338GW.dts b/target/linux/brcm63xx/dts/bcm96338GW.dts index d6ff449d3..42e51f4d3 100644 --- a/target/linux/brcm63xx/dts/bcm96338GW.dts +++ b/target/linux/brcm63xx/dts/bcm96338GW.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96338gw", "brcm,bcm6338"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -44,6 +44,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &uart0 { diff --git a/target/linux/brcm63xx/dts/bcm96338W.dts b/target/linux/brcm63xx/dts/bcm96338W.dts index f91ca9a39..f5953e443 100644 --- a/target/linux/brcm63xx/dts/bcm96338W.dts +++ b/target/linux/brcm63xx/dts/bcm96338W.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96338w", "brcm,bcm6338"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -44,6 +44,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &uart0 { diff --git a/target/linux/brcm63xx/dts/bcm96345GW2.dts b/target/linux/brcm63xx/dts/bcm96345GW2.dts index a7b3fad13..a2a8203d1 100644 --- a/target/linux/brcm63xx/dts/bcm96345GW2.dts +++ b/target/linux/brcm63xx/dts/bcm96345GW2.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96345gw2", "brcm,bcm6345"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; }; @@ -18,6 +18,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &uart0 { diff --git a/target/linux/brcm63xx/dts/bcm96348GW-10.dts b/target/linux/brcm63xx/dts/bcm96348GW-10.dts index 59850b5a1..c751fcff4 100644 --- a/target/linux/brcm63xx/dts/bcm96348GW-10.dts +++ b/target/linux/brcm63xx/dts/bcm96348GW-10.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96348gw-10", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -58,6 +58,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &pinctrl { diff --git a/target/linux/brcm63xx/dts/bcm96348GW-11.dts b/target/linux/brcm63xx/dts/bcm96348GW-11.dts index 3caca0970..fca961251 100644 --- a/target/linux/brcm63xx/dts/bcm96348GW-11.dts +++ b/target/linux/brcm63xx/dts/bcm96348GW-11.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96348gw-11", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -58,6 +58,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &pinctrl { diff --git a/target/linux/brcm63xx/dts/bcm96348GW.dts b/target/linux/brcm63xx/dts/bcm96348GW.dts index c213ac7a1..e7662aa83 100644 --- a/target/linux/brcm63xx/dts/bcm96348GW.dts +++ b/target/linux/brcm63xx/dts/bcm96348GW.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96348gw", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -58,6 +58,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &pinctrl { diff --git a/target/linux/brcm63xx/dts/bcm96348R.dts b/target/linux/brcm63xx/dts/bcm96348R.dts index b56869b3e..946fcf340 100644 --- a/target/linux/brcm63xx/dts/bcm96348R.dts +++ b/target/linux/brcm63xx/dts/bcm96348R.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96348r", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -44,6 +44,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &pinctrl { diff --git a/target/linux/brcm63xx/dts/bcm96358VW.dts b/target/linux/brcm63xx/dts/bcm96358VW.dts index e097c0518..cc5d9f8e2 100644 --- a/target/linux/brcm63xx/dts/bcm96358VW.dts +++ b/target/linux/brcm63xx/dts/bcm96358VW.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96358vw", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -44,6 +44,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &uart0 { diff --git a/target/linux/brcm63xx/dts/bcm96358VW2.dts b/target/linux/brcm63xx/dts/bcm96358VW2.dts index 5c242c215..9e26aa7a3 100644 --- a/target/linux/brcm63xx/dts/bcm96358VW2.dts +++ b/target/linux/brcm63xx/dts/bcm96358VW2.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96358vw2", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -40,6 +40,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &uart0 { diff --git a/target/linux/brcm63xx/dts/bcm96368MVNgr.dts b/target/linux/brcm63xx/dts/bcm96368MVNgr.dts index 6c4ef091a..b18aa2c6e 100644 --- a/target/linux/brcm63xx/dts/bcm96368MVNgr.dts +++ b/target/linux/brcm63xx/dts/bcm96368MVNgr.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96368mvngr", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -44,6 +44,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &pinctrl { diff --git a/target/linux/brcm63xx/dts/bcm96368MVWG.dts b/target/linux/brcm63xx/dts/bcm96368MVWG.dts index ed1dd9016..29f7decbc 100644 --- a/target/linux/brcm63xx/dts/bcm96368MVWG.dts +++ b/target/linux/brcm63xx/dts/bcm96368MVWG.dts @@ -9,7 +9,7 @@ compatible = "brcm,bcm96368mvwg", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -44,6 +44,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &pinctrl { diff --git a/target/linux/brcm63xx/dts/cpva502plus.dts b/target/linux/brcm63xx/dts/cpva502plus.dts index 6d8455e91..9a7bf6707 100644 --- a/target/linux/brcm63xx/dts/cpva502plus.dts +++ b/target/linux/brcm63xx/dts/cpva502plus.dts @@ -9,7 +9,7 @@ compatible = "telsey,cpva502+", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -47,20 +47,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/cpva642.dts b/target/linux/brcm63xx/dts/cpva642.dts index 212bf6c32..ef66c38f5 100644 --- a/target/linux/brcm63xx/dts/cpva642.dts +++ b/target/linux/brcm63xx/dts/cpva642.dts @@ -9,7 +9,7 @@ compatible = "telsey,cpva642", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -84,20 +84,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/ct-5365.dts b/target/linux/brcm63xx/dts/ct-5365.dts index ac3b80954..0bcff5f05 100644 --- a/target/linux/brcm63xx/dts/ct-5365.dts +++ b/target/linux/brcm63xx/dts/ct-5365.dts @@ -9,7 +9,7 @@ compatible = "comtrend,ct-5365", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -61,20 +61,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/ct-6373.dts b/target/linux/brcm63xx/dts/ct-6373.dts index 579b514f9..a1be08b17 100644 --- a/target/linux/brcm63xx/dts/ct-6373.dts +++ b/target/linux/brcm63xx/dts/ct-6373.dts @@ -9,7 +9,7 @@ compatible = "comtrend,ct-6373", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -82,20 +82,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/ct536plus.dts b/target/linux/brcm63xx/dts/ct536plus.dts index f9bc7e136..2c023f5d3 100644 --- a/target/linux/brcm63xx/dts/ct536plus.dts +++ b/target/linux/brcm63xx/dts/ct536plus.dts @@ -9,7 +9,7 @@ compatible = "comtrend,ct-536+", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -47,20 +47,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/cvg834g.dts b/target/linux/brcm63xx/dts/cvg834g.dts index fa14c8bbd..ca635bb26 100644 --- a/target/linux/brcm63xx/dts/cvg834g.dts +++ b/target/linux/brcm63xx/dts/cvg834g.dts @@ -9,7 +9,7 @@ compatible = "netgear,cvg834g", "brcm,bcm3368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -29,20 +29,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dg834g_v4.dts b/target/linux/brcm63xx/dts/dg834g_v4.dts index 369a67c22..55f57dc56 100644 --- a/target/linux/brcm63xx/dts/dg834g_v4.dts +++ b/target/linux/brcm63xx/dts/dg834g_v4.dts @@ -9,7 +9,7 @@ compatible = "netgear,dg834g-v4", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -55,20 +55,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dg834gtpn.dts b/target/linux/brcm63xx/dts/dg834gtpn.dts index 794c701da..389532482 100644 --- a/target/linux/brcm63xx/dts/dg834gtpn.dts +++ b/target/linux/brcm63xx/dts/dg834gtpn.dts @@ -9,7 +9,7 @@ compatible = "netgear,dg834gtpn", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dgnd3700v1.dts b/target/linux/brcm63xx/dts/dgnd3700v1.dts index 2d23f19b7..cafa098f6 100644 --- a/target/linux/brcm63xx/dts/dgnd3700v1.dts +++ b/target/linux/brcm63xx/dts/dgnd3700v1.dts @@ -9,7 +9,7 @@ compatible = "netgear,dgnd3700v1", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -93,26 +93,33 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0x1e20000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - board_data@1e40000 { - label = "board_data"; - reg = <0x1e40000 0x1a0000>; - read-only; - }; + linux@20000 { + label = "linux"; + reg = <0x020000 0x1e20000>; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@1fe0000 { - label = "nvram"; - reg = <0x1fe0000 0x20000>; + board_data@1e40000 { + label = "board_data"; + reg = <0x1e40000 0x1a0000>; + read-only; + }; + + nvram@1fe0000 { + label = "nvram"; + reg = <0x1fe0000 0x20000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dsl-2640b-b.dts b/target/linux/brcm63xx/dts/dsl-2640b-b.dts index df7f4adc0..3c3ea07e8 100644 --- a/target/linux/brcm63xx/dts/dsl-2640b-b.dts +++ b/target/linux/brcm63xx/dts/dsl-2640b-b.dts @@ -9,7 +9,7 @@ compatible = "d-link,dsl-2640b-b", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -55,20 +55,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dsl-2640u.dts b/target/linux/brcm63xx/dts/dsl-2640u.dts index 8fea2acb2..dec25a7bc 100644 --- a/target/linux/brcm63xx/dts/dsl-2640u.dts +++ b/target/linux/brcm63xx/dts/dsl-2640u.dts @@ -9,7 +9,7 @@ compatible = "d-link,dsl-2640u", "brcm,bcm6338"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -39,20 +39,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dsl-2650u.dts b/target/linux/brcm63xx/dts/dsl-2650u.dts index c9b189b8b..f784f3364 100644 --- a/target/linux/brcm63xx/dts/dsl-2650u.dts +++ b/target/linux/brcm63xx/dts/dsl-2650u.dts @@ -9,7 +9,7 @@ compatible = "d-link,dsl-2650u", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -41,20 +41,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dsl-274xb-c.dts b/target/linux/brcm63xx/dts/dsl-274xb-c.dts index 3468dea8b..e8cebb337 100644 --- a/target/linux/brcm63xx/dts/dsl-274xb-c.dts +++ b/target/linux/brcm63xx/dts/dsl-274xb-c.dts @@ -9,7 +9,7 @@ compatible = "d-link,dsl-274xb-c2", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dsl-274xb-f.dts b/target/linux/brcm63xx/dts/dsl-274xb-f.dts index 00a5a9e99..8b9acaa77 100644 --- a/target/linux/brcm63xx/dts/dsl-274xb-f.dts +++ b/target/linux/brcm63xx/dts/dsl-274xb-f.dts @@ -9,7 +9,7 @@ compatible = "d-link,dsl-274xb-f", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -83,26 +83,33 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0x7c0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - cal_data@7d0000 { - reg = <0x7d0000 0x010000>; - label = "cal_data"; - read-only; - }; + linux@10000 { + reg = <0x010000 0x7c0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@7e0000 { - reg = <0x7e0000 0x020000>; - label = "nvram"; + cal_data@7d0000 { + reg = <0x7d0000 0x010000>; + label = "cal_data"; + read-only; + }; + + nvram@7e0000 { + reg = <0x7e0000 0x020000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/dsl-275xb-d.dts b/target/linux/brcm63xx/dts/dsl-275xb-d.dts index d8f8c08e1..a8022ddb2 100644 --- a/target/linux/brcm63xx/dts/dsl-275xb-d.dts +++ b/target/linux/brcm63xx/dts/dsl-275xb-d.dts @@ -9,7 +9,7 @@ compatible = "d-link,dsl-275xb-d", "brcm,bcm6318"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -96,20 +96,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0x7e0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@7f0000 { - reg = <0x7f0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0x7e0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + reg = <0x7f0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/dv-201amr.dts b/target/linux/brcm63xx/dts/dv-201amr.dts index 42a825f92..ae68de479 100644 --- a/target/linux/brcm63xx/dts/dv-201amr.dts +++ b/target/linux/brcm63xx/dts/dv-201amr.dts @@ -9,7 +9,7 @@ compatible = "davolink,dv-201amr", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; }; @@ -19,20 +19,27 @@ linux,part-probe = "bcm63xxpart"; - backup@0 { - label = "backup"; - reg = <0x000000 0x400000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - cfe@400000 { - label = "cfe"; - reg = <0x400000 0x010000>; - read-only; - }; + backup@0 { + label = "backup"; + reg = <0x000000 0x400000>; + }; - linux@410000 { - label = "linux"; - reg = <0x410000 0x3f0000>; + cfe@400000 { + label = "cfe"; + reg = <0x400000 0x010000>; + read-only; + }; + + linux@410000 { + label = "linux"; + reg = <0x410000 0x3f0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/dva-g3810bn_tl.dts b/target/linux/brcm63xx/dts/dva-g3810bn_tl.dts index 2945165ce..e9e042285 100644 --- a/target/linux/brcm63xx/dts/dva-g3810bn_tl.dts +++ b/target/linux/brcm63xx/dts/dva-g3810bn_tl.dts @@ -9,7 +9,7 @@ compatible = "d-link,dva-g3810bn/tl", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/evg2000.dts b/target/linux/brcm63xx/dts/evg2000.dts index 10e0ddcc9..8468393a4 100644 --- a/target/linux/brcm63xx/dts/evg2000.dts +++ b/target/linux/brcm63xx/dts/evg2000.dts @@ -9,7 +9,7 @@ compatible = "netgear,evg2000", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -84,26 +84,33 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x00000000 0x00020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x00020000 0x00f40000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x00000000 0x00020000>; + read-only; + }; - board_data@f60000 { - label = "board_data"; - reg = <0x00f60000 0x00080000>; - read-only; - }; + linux@20000 { + label = "linux"; + reg = <0x00020000 0x00f40000>; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0x00fe0000 0x00020000>; + board_data@f60000 { + label = "board_data"; + reg = <0x00f60000 0x00080000>; + read-only; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0x00fe0000 0x00020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/f5d7633.dts b/target/linux/brcm63xx/dts/f5d7633.dts index 89c646b92..57ab97aa8 100644 --- a/target/linux/brcm63xx/dts/f5d7633.dts +++ b/target/linux/brcm63xx/dts/f5d7633.dts @@ -9,7 +9,7 @@ compatible = "belkin,f5d7633", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0x3c0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - nvram@3e0000 { - label = "nvram"; - reg = <0x3e0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x020000 0x3c0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3e0000 { + label = "nvram"; + reg = <0x3e0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/fast2404.dts b/target/linux/brcm63xx/dts/fast2404.dts index c0a30a08e..9035b9d15 100644 --- a/target/linux/brcm63xx/dts/fast2404.dts +++ b/target/linux/brcm63xx/dts/fast2404.dts @@ -9,7 +9,7 @@ compatible = "sagem,f@st2404", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; }; @@ -19,20 +19,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/fast2504n.dts b/target/linux/brcm63xx/dts/fast2504n.dts index 8b644fb8f..86ac4b768 100644 --- a/target/linux/brcm63xx/dts/fast2504n.dts +++ b/target/linux/brcm63xx/dts/fast2504n.dts @@ -9,7 +9,7 @@ compatible = "sagem,f@st2504n", "brcm,bcm6362"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -78,20 +78,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0x7e0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@7f0000 { - reg = <0x7f0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0x7e0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + reg = <0x7f0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/fast2604.dts b/target/linux/brcm63xx/dts/fast2604.dts index 14339408b..4ac9d30c3 100644 --- a/target/linux/brcm63xx/dts/fast2604.dts +++ b/target/linux/brcm63xx/dts/fast2604.dts @@ -9,7 +9,7 @@ compatible = "sagem,f@st2604", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -55,20 +55,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/fast2704n.dts b/target/linux/brcm63xx/dts/fast2704n.dts index 217ef12d7..1d75b6cf5 100644 --- a/target/linux/brcm63xx/dts/fast2704n.dts +++ b/target/linux/brcm63xx/dts/fast2704n.dts @@ -9,7 +9,7 @@ compatible = "sagem,f@st2704n", "brcm,bcm6318"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -103,20 +103,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0x7e0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@7f0000 { - reg = <0x7f0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0x7e0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + reg = <0x7f0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/fast2704v2.dts b/target/linux/brcm63xx/dts/fast2704v2.dts index eeed6b1da..dfab31f4a 100644 --- a/target/linux/brcm63xx/dts/fast2704v2.dts +++ b/target/linux/brcm63xx/dts/fast2704v2.dts @@ -9,7 +9,7 @@ compatible = "sagem,f@st2704v2", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -87,20 +87,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0x7e0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@7f0000 { - reg = <0x7f0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0x7e0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + reg = <0x7f0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/gw6000.dts b/target/linux/brcm63xx/dts/gw6000.dts index 31555b3ad..ab7932e78 100644 --- a/target/linux/brcm63xx/dts/gw6000.dts +++ b/target/linux/brcm63xx/dts/gw6000.dts @@ -9,7 +9,7 @@ compatible = "tecom,gw6000", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -33,20 +33,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/gw6200.dts b/target/linux/brcm63xx/dts/gw6200.dts index acc100c74..a7d5d476c 100644 --- a/target/linux/brcm63xx/dts/gw6200.dts +++ b/target/linux/brcm63xx/dts/gw6200.dts @@ -9,7 +9,7 @@ compatible = "tecom,gw6200", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -54,20 +54,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/hg520v.dts b/target/linux/brcm63xx/dts/hg520v.dts index bfd30693c..d79b73d4c 100644 --- a/target/linux/brcm63xx/dts/hg520v.dts +++ b/target/linux/brcm63xx/dts/hg520v.dts @@ -9,7 +9,7 @@ compatible = "huawei,hg520v", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -42,20 +42,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/hg553.dts b/target/linux/brcm63xx/dts/hg553.dts index a459976c4..8d5c3db25 100644 --- a/target/linux/brcm63xx/dts/hg553.dts +++ b/target/linux/brcm63xx/dts/hg553.dts @@ -9,7 +9,7 @@ compatible = "huawei,hg553", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -81,20 +81,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xfc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x020000 0xfc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/hg556a-a.dts b/target/linux/brcm63xx/dts/hg556a-a.dts index 906ee611b..3abfc4b57 100644 --- a/target/linux/brcm63xx/dts/hg556a-a.dts +++ b/target/linux/brcm63xx/dts/hg556a-a.dts @@ -9,7 +9,7 @@ compatible = "huawei,hg556a-a", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -107,26 +107,33 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xec0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - cal_data@ee0000 { - label = "cal_data"; - reg = <0xee0000 0x100000>; - read-only; - }; + linux@20000 { + label = "linux"; + reg = <0x020000 0xec0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + cal_data@ee0000 { + label = "cal_data"; + reg = <0xee0000 0x100000>; + read-only; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/hg556a-b.dts b/target/linux/brcm63xx/dts/hg556a-b.dts index 4285e17bc..c88825f9e 100644 --- a/target/linux/brcm63xx/dts/hg556a-b.dts +++ b/target/linux/brcm63xx/dts/hg556a-b.dts @@ -9,7 +9,7 @@ compatible = "huawei,hg556a-b", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -107,26 +107,33 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xec0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - cal_data@ee0000 { - label = "cal_data"; - reg = <0xee0000 0x100000>; - read-only; - }; + linux@20000 { + label = "linux"; + reg = <0x020000 0xec0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + cal_data@ee0000 { + label = "cal_data"; + reg = <0xee0000 0x100000>; + read-only; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/hg556a-c.dts b/target/linux/brcm63xx/dts/hg556a-c.dts index 48c601e12..896ddf1c8 100644 --- a/target/linux/brcm63xx/dts/hg556a-c.dts +++ b/target/linux/brcm63xx/dts/hg556a-c.dts @@ -9,7 +9,7 @@ compatible = "huawei,hg556a-c", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -102,26 +102,33 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xec0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - cal_data@ee0000 { - label = "cal_data"; - reg = <0xee0000 0x100000>; - read-only; - }; + linux@20000 { + label = "linux"; + reg = <0x020000 0xec0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + cal_data@ee0000 { + label = "cal_data"; + reg = <0xee0000 0x100000>; + read-only; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/hg622.dts b/target/linux/brcm63xx/dts/hg622.dts index 419439d02..dc44dd36c 100644 --- a/target/linux/brcm63xx/dts/hg622.dts +++ b/target/linux/brcm63xx/dts/hg622.dts @@ -9,7 +9,7 @@ compatible = "huawei,hg622", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -56,26 +56,33 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xf80000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - cal_data@fa0000 { - label = "cal_data"; - reg = <0xfa0000 0x020000>; - read-only; - }; + linux@20000 { + label = "linux"; + reg = <0x020000 0xf80000>; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + cal_data@fa0000 { + label = "cal_data"; + reg = <0xfa0000 0x020000>; + read-only; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/hg655b.dts b/target/linux/brcm63xx/dts/hg655b.dts index 0336a633e..edaeb951f 100644 --- a/target/linux/brcm63xx/dts/hg655b.dts +++ b/target/linux/brcm63xx/dts/hg655b.dts @@ -9,7 +9,7 @@ compatible = "huawei,hg655b", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -74,30 +74,37 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0x770000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + }; - board_data@790000 { - label = "board_data"; - reg = <0x790000 0x030000>; - }; + linux@20000 { + label = "linux"; + reg = <0x020000 0x770000>; + }; - cal_data@7c0000 { - label = "cal_data"; - reg = <0x7c0000 0x020000>; - read-only; - }; + board_data@790000 { + label = "board_data"; + reg = <0x790000 0x030000>; + compatible = "brcm,bcm963xx-imagetag"; + }; - nvram@7d0000 { - label = "nvram"; - reg = <0x7e0000 0x020000>; + cal_data@7c0000 { + label = "cal_data"; + reg = <0x7c0000 0x020000>; + read-only; + }; + + nvram@7d0000 { + label = "nvram"; + reg = <0x7e0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/homehub2a.dts b/target/linux/brcm63xx/dts/homehub2a.dts index 1f55265bc..a16441af0 100644 --- a/target/linux/brcm63xx/dts/homehub2a.dts +++ b/target/linux/brcm63xx/dts/homehub2a.dts @@ -9,7 +9,7 @@ compatible = "thomson,homehub2a", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -141,19 +141,26 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xfc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x020000 0xfc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/livebox-blue-5g.dts b/target/linux/brcm63xx/dts/livebox-blue-5g.dts index 10a88669b..0bc503c94 100644 --- a/target/linux/brcm63xx/dts/livebox-blue-5g.dts +++ b/target/linux/brcm63xx/dts/livebox-blue-5g.dts @@ -9,7 +9,7 @@ compatible = "inventel,livebox-blue-5g", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; diff --git a/target/linux/brcm63xx/dts/magic.dts b/target/linux/brcm63xx/dts/magic.dts index c78b836df..f9331d453 100644 --- a/target/linux/brcm63xx/dts/magic.dts +++ b/target/linux/brcm63xx/dts/magic.dts @@ -9,7 +9,7 @@ compatible = "telsey,magic", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/nb4-fxc-r1.dts b/target/linux/brcm63xx/dts/nb4-fxc-r1.dts index 9d341ec1a..4874bc152 100644 --- a/target/linux/brcm63xx/dts/nb4-fxc-r1.dts +++ b/target/linux/brcm63xx/dts/nb4-fxc-r1.dts @@ -9,7 +9,7 @@ compatible = "sfr,nb4-fxc-r1", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -103,6 +103,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &uart0 { diff --git a/target/linux/brcm63xx/dts/nb4-ser-r0.dts b/target/linux/brcm63xx/dts/nb4-ser-r0.dts index e97d9f219..a6dc102c0 100644 --- a/target/linux/brcm63xx/dts/nb4-ser-r0.dts +++ b/target/linux/brcm63xx/dts/nb4-ser-r0.dts @@ -9,7 +9,7 @@ compatible = "sfr,nb4-ser-r0", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -103,6 +103,10 @@ status = "ok"; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; &uart0 { diff --git a/target/linux/brcm63xx/dts/nb6-ser-r0.dts b/target/linux/brcm63xx/dts/nb6-ser-r0.dts index 70d719e1e..2866afd2d 100644 --- a/target/linux/brcm63xx/dts/nb6-ser-r0.dts +++ b/target/linux/brcm63xx/dts/nb6-ser-r0.dts @@ -9,7 +9,7 @@ compatible = "sfr,nb6-ser-r0", "brcm,bcm6362"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -66,20 +66,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0xfe0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@ff0000 { - reg = <0xff0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0xfe0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@ff0000 { + reg = <0xff0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/p870hw-51a-v2.dts b/target/linux/brcm63xx/dts/p870hw-51a-v2.dts index d7e5d3e3f..02749ce6e 100644 --- a/target/linux/brcm63xx/dts/p870hw-51a-v2.dts +++ b/target/linux/brcm63xx/dts/p870hw-51a-v2.dts @@ -9,7 +9,7 @@ compatible = "zyxel,p870hw-51a-v2", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -64,20 +64,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/r1000h.dts b/target/linux/brcm63xx/dts/r1000h.dts index 299b520a6..3b3ac5792 100644 --- a/target/linux/brcm63xx/dts/r1000h.dts +++ b/target/linux/brcm63xx/dts/r1000h.dts @@ -9,7 +9,7 @@ compatible = "actiontec,r1000h", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -79,17 +79,24 @@ linux,part-probe = "bcm63xxpart"; - CFE@0 { - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - reg = <0x020000 0x1fc0000>; - }; + CFE@0 { + reg = <0x000000 0x020000>; + read-only; + }; - nvram@1fe0000 { - reg = <0x1fe0000 0x20000>; + linux@20000 { + reg = <0x020000 0x1fc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@1fe0000 { + reg = <0x1fe0000 0x20000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/r5010unv2.dts b/target/linux/brcm63xx/dts/r5010unv2.dts index c0b0a85c4..fd87bef70 100644 --- a/target/linux/brcm63xx/dts/r5010unv2.dts +++ b/target/linux/brcm63xx/dts/r5010unv2.dts @@ -9,7 +9,7 @@ compatible = "nucom,r5010unv2", "brcm,bcm6328"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -83,20 +83,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - reg = <0x000000 0x010000>; - label = "cfe"; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - reg = <0x010000 0x7e0000>; - label = "linux"; - }; + cfe@0 { + reg = <0x000000 0x010000>; + label = "cfe"; + read-only; + }; - nvram@7f0000 { - reg = <0x7f0000 0x010000>; - label = "nvram"; + linux@10000 { + reg = <0x010000 0x7e0000>; + label = "linux"; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + reg = <0x7f0000 0x010000>; + label = "nvram"; + }; }; }; }; diff --git a/target/linux/brcm63xx/dts/rg100a.dts b/target/linux/brcm63xx/dts/rg100a.dts index 871aada25..9ae128eb7 100644 --- a/target/linux/brcm63xx/dts/rg100a.dts +++ b/target/linux/brcm63xx/dts/rg100a.dts @@ -9,7 +9,7 @@ compatible = "alcatel,rg100a", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -41,20 +41,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0xfc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - nvram@fe0000 { - label = "nvram"; - reg = <0xfe0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x020000 0xfc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@fe0000 { + label = "nvram"; + reg = <0xfe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/rta1025w.dts b/target/linux/brcm63xx/dts/rta1025w.dts index e4de95dbe..f6f8a0892 100644 --- a/target/linux/brcm63xx/dts/rta1025w.dts +++ b/target/linux/brcm63xx/dts/rta1025w.dts @@ -9,7 +9,7 @@ compatible = "dynalink,rta1025w", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; }; @@ -19,20 +19,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/rta1320.dts b/target/linux/brcm63xx/dts/rta1320.dts index aedc9d30f..3783c8db0 100644 --- a/target/linux/brcm63xx/dts/rta1320.dts +++ b/target/linux/brcm63xx/dts/rta1320.dts @@ -9,7 +9,7 @@ compatible = "dynalink,rta1320", "brcm,bcm6338"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -41,20 +41,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/rta770bw.dts b/target/linux/brcm63xx/dts/rta770bw.dts index 0f7146758..d40cfd28d 100644 --- a/target/linux/brcm63xx/dts/rta770bw.dts +++ b/target/linux/brcm63xx/dts/rta770bw.dts @@ -9,7 +9,7 @@ compatible = "dynalink,rta770bw", "brcm,bcm6345"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -57,20 +57,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/rta770w.dts b/target/linux/brcm63xx/dts/rta770w.dts index ce9f0be37..034faaf39 100644 --- a/target/linux/brcm63xx/dts/rta770w.dts +++ b/target/linux/brcm63xx/dts/rta770w.dts @@ -9,7 +9,7 @@ compatible = "dynalink,rta770w", "brcm,bcm6345"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -57,20 +57,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/spw303v.dts b/target/linux/brcm63xx/dts/spw303v.dts index 7a0002023..3df982092 100644 --- a/target/linux/brcm63xx/dts/spw303v.dts +++ b/target/linux/brcm63xx/dts/spw303v.dts @@ -9,7 +9,7 @@ compatible = "t-com,spw303v", "brcm,bcm6358"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -68,20 +68,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/spw500v.dts b/target/linux/brcm63xx/dts/spw500v.dts index c7a4c7dfd..ceaa569b9 100644 --- a/target/linux/brcm63xx/dts/spw500v.dts +++ b/target/linux/brcm63xx/dts/spw500v.dts @@ -9,7 +9,7 @@ compatible = "t-com,spw500v", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/td-w8900gb.dts b/target/linux/brcm63xx/dts/td-w8900gb.dts index e5c02e63a..6b7eecec3 100644 --- a/target/linux/brcm63xx/dts/td-w8900gb.dts +++ b/target/linux/brcm63xx/dts/td-w8900gb.dts @@ -9,7 +9,7 @@ compatible = "tp-link,td-w8900gb", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x020000 0x3d0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x020000>; + read-only; + }; - nvram@3e0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@20000 { + label = "linux"; + reg = <0x020000 0x3d0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3e0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/usr9108.dts b/target/linux/brcm63xx/dts/usr9108.dts index 4852d65ad..5c9309334 100644 --- a/target/linux/brcm63xx/dts/usr9108.dts +++ b/target/linux/brcm63xx/dts/usr9108.dts @@ -9,7 +9,7 @@ compatible = "usr,9108", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -32,20 +32,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/v2110.dts b/target/linux/brcm63xx/dts/v2110.dts index 93a5d9443..3ae37453b 100644 --- a/target/linux/brcm63xx/dts/v2110.dts +++ b/target/linux/brcm63xx/dts/v2110.dts @@ -9,7 +9,7 @@ compatible = "bt,v2110", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -58,20 +58,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/v2500v-bb.dts b/target/linux/brcm63xx/dts/v2500v-bb.dts index d6b5964f8..243cffa77 100644 --- a/target/linux/brcm63xx/dts/v2500v-bb.dts +++ b/target/linux/brcm63xx/dts/v2500v-bb.dts @@ -9,7 +9,7 @@ compatible = "bt,v2500v-bb", "brcm,bcm6348"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -58,20 +58,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x3e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@3f0000 { - label = "nvram"; - reg = <0x3f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x3e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@3f0000 { + label = "nvram"; + reg = <0x3f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/vg50.dts b/target/linux/brcm63xx/dts/vg50.dts index f1d48ea3c..e7b5dbdbb 100644 --- a/target/linux/brcm63xx/dts/vg50.dts +++ b/target/linux/brcm63xx/dts/vg50.dts @@ -9,7 +9,7 @@ compatible = "inteno,vg50", "brcm,bcm63268"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -48,6 +48,10 @@ #size-cells = <1>; linux,part-probe = "bcm63xxpart"; + + partitions { + compatible = "brcm,bcm963xx-cfe-nor-partitions"; + }; }; }; diff --git a/target/linux/brcm63xx/dts/vh4032n.dts b/target/linux/brcm63xx/dts/vh4032n.dts index 78a708ac0..6dee87501 100644 --- a/target/linux/brcm63xx/dts/vh4032n.dts +++ b/target/linux/brcm63xx/dts/vh4032n.dts @@ -9,7 +9,7 @@ compatible = "observa,vh4032n", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -85,20 +85,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x0000000 0x0020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x0020000 0x1fc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x0000000 0x0020000>; + read-only; + }; - nvram@1fe0000 { - label = "nvram"; - reg = <0x1fe0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x0020000 0x1fc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@1fe0000 { + label = "nvram"; + reg = <0x1fe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/vr-3025u.dts b/target/linux/brcm63xx/dts/vr-3025u.dts index fd2a56769..6201718d7 100644 --- a/target/linux/brcm63xx/dts/vr-3025u.dts +++ b/target/linux/brcm63xx/dts/vr-3025u.dts @@ -9,7 +9,7 @@ compatible = "comtrend,vr-3025u", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x0000000 0x0020000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@20000 { - label = "linux"; - reg = <0x0020000 0x1fc0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x0000000 0x0020000>; + read-only; + }; - nvram@1fe0000 { - label = "nvram"; - reg = <0x1fe0000 0x020000>; + linux@20000 { + label = "linux"; + reg = <0x0020000 0x1fc0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@1fe0000 { + label = "nvram"; + reg = <0x1fe0000 0x020000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/vr-3025un.dts b/target/linux/brcm63xx/dts/vr-3025un.dts index 61e197251..a3d12a707 100644 --- a/target/linux/brcm63xx/dts/vr-3025un.dts +++ b/target/linux/brcm63xx/dts/vr-3025un.dts @@ -9,7 +9,7 @@ compatible = "comtrend,vr-3025un", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/vr-3026e.dts b/target/linux/brcm63xx/dts/vr-3026e.dts index 01cb98817..0ffbb7d82 100644 --- a/target/linux/brcm63xx/dts/vr-3026e.dts +++ b/target/linux/brcm63xx/dts/vr-3026e.dts @@ -9,7 +9,7 @@ compatible = "comtrend,vr-3026e", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -59,20 +59,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/dts/wap-5813n.dts b/target/linux/brcm63xx/dts/wap-5813n.dts index 1a71426ca..b50ff237e 100644 --- a/target/linux/brcm63xx/dts/wap-5813n.dts +++ b/target/linux/brcm63xx/dts/wap-5813n.dts @@ -9,7 +9,7 @@ compatible = "comtrend,wap-5813n", "brcm,bcm6368"; chosen { - bootargs = "root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; + bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"; stdout-path = "serial0:115200n8"; }; @@ -69,20 +69,27 @@ linux,part-probe = "bcm63xxpart"; - cfe@0 { - label = "CFE"; - reg = <0x000000 0x010000>; - read-only; - }; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - linux@10000 { - label = "linux"; - reg = <0x010000 0x7e0000>; - }; + cfe@0 { + label = "CFE"; + reg = <0x000000 0x010000>; + read-only; + }; - nvram@7f0000 { - label = "nvram"; - reg = <0x7f0000 0x010000>; + linux@10000 { + label = "linux"; + reg = <0x010000 0x7e0000>; + compatible = "brcm,bcm963xx-imagetag"; + }; + + nvram@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + }; }; }; diff --git a/target/linux/brcm63xx/image/bcm63xx.mk b/target/linux/brcm63xx/image/bcm63xx.mk index 918dfc798..b9ecd5406 100644 --- a/target/linux/brcm63xx/image/bcm63xx.mk +++ b/target/linux/brcm63xx/image/bcm63xx.mk @@ -990,7 +990,7 @@ define Device/NEUFBOX4-SER DEVICE_DTS := nb4-ser-r0 CFE_BOARD_ID := 96358VW CFE_CHIP_ID := 6358 - CFE_EXTRAS += --rsa-signature "OpenWrt-$(firstword $(subst -,$(space),$(REVISION)))" + CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))" DEVICE_PACKAGES := \ $(B43_PACKAGES) $(USB2_PACKAGES) endef @@ -1002,7 +1002,7 @@ define Device/NEUFBOX4-FXC DEVICE_DTS := nb4-fxc-r1 CFE_BOARD_ID := 96358VW CFE_CHIP_ID := 6358 - CFE_EXTRAS += --rsa-signature "OpenWrt-$(firstword $(subst -,$(space),$(REVISION)))" + CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))" DEVICE_PACKAGES := \ $(B43_PACKAGES) $(USB2_PACKAGES) endef @@ -1014,7 +1014,7 @@ define Device/NEUFBOX6 DEVICE_DTS := nb6-ser-r0 CFE_BOARD_ID := NB6-SER-r0 CFE_CHIP_ID := 6362 - CFE_EXTRAS += --rsa-signature "OpenWrt-$(firstword $(subst -,$(space),$(REVISION)))" + CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))" DEVICE_PACKAGES := \ $(B43_PACKAGES) $(USB2_PACKAGES) endef diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch new file mode 100644 index 000000000..68f64d17b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch @@ -0,0 +1,210 @@ +From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:23:47 +0200 +Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support + +Enable clkdev lookup support to allow us providing clocks under +different names to devices more easily, so we don't need to care +about clock name clashes anymore. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/Kconfig | 1 + + arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++----------- + 2 files changed, 116 insertions(+), 35 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -278,6 +278,7 @@ config BCM63XX + select GPIOLIB + select HAVE_CLK + select MIPS_L1_CACHE_SHIFT_4 ++ select CLKDEV_LOOKUP + help + Support for BCM63XX based boards + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -359,44 +360,103 @@ long clk_round_rate(struct clk *clk, uns + } + EXPORT_SYMBOL_GPL(clk_round_rate); + +-struct clk *clk_get(struct device *dev, const char *id) +-{ +- if (!strcmp(id, "enet0")) +- return &clk_enet0; +- if (!strcmp(id, "enet1")) +- return &clk_enet1; +- if (!strcmp(id, "enetsw")) +- return &clk_enetsw; +- if (!strcmp(id, "ephy")) +- return &clk_ephy; +- if (!strcmp(id, "usbh")) +- return &clk_usbh; +- if (!strcmp(id, "usbd")) +- return &clk_usbd; +- if (!strcmp(id, "spi")) +- return &clk_spi; +- if (!strcmp(id, "hsspi")) +- return &clk_hsspi; +- if (!strcmp(id, "xtm")) +- return &clk_xtm; +- if (!strcmp(id, "periph")) +- return &clk_periph; +- if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm")) +- return &clk_pcm; +- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec")) +- return &clk_ipsec; +- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie")) +- return &clk_pcie; +- return ERR_PTR(-ENOENT); +-} +- +-EXPORT_SYMBOL(clk_get); +- +-void clk_put(struct clk *clk) +-{ +-} +- +-EXPORT_SYMBOL(clk_put); ++static struct clk_lookup bcm3368_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++}; ++ ++static struct clk_lookup bcm6328_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++}; ++ ++static struct clk_lookup bcm6338_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++}; ++ ++static struct clk_lookup bcm6345_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++}; ++ ++static struct clk_lookup bcm6348_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++}; ++ ++static struct clk_lookup bcm6358_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++}; ++ ++static struct clk_lookup bcm6362_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), ++}; ++ ++static struct clk_lookup bcm6368_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "xtm", &clk_xtm), ++ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), ++}; + + #define HSSPI_PLL_HZ_6328 133333333 + #define HSSPI_PLL_HZ_6362 400000000 +@@ -404,11 +464,31 @@ EXPORT_SYMBOL(clk_put); + static int __init bcm63xx_clk_init(void) + { + switch (bcm63xx_get_cpu_id()) { ++ case BCM3368_CPU_ID: ++ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); ++ break; + case BCM6328_CPU_ID: + clk_hsspi.rate = HSSPI_PLL_HZ_6328; ++ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); ++ break; ++ case BCM6338_CPU_ID: ++ clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks)); ++ break; ++ case BCM6345_CPU_ID: ++ clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks)); ++ break; ++ case BCM6348_CPU_ID: ++ clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks)); ++ break; ++ case BCM6358_CPU_ID: ++ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); + break; + case BCM6362_CPU_ID: + clk_hsspi.rate = HSSPI_PLL_HZ_6362; ++ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); ++ break; ++ case BCM6368_CPU_ID: ++ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks)); + break; + } + diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch new file mode 100644 index 000000000..2be6f4c52 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch @@ -0,0 +1,84 @@ +From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:31:44 +0200 +Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart + +Add a lookup as "refclk" to describe its function for the uarts. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -363,6 +363,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate); + static struct clk_lookup bcm3368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -376,6 +378,8 @@ static struct clk_lookup bcm3368_clks[] + static struct clk_lookup bcm6328_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -387,6 +391,7 @@ static struct clk_lookup bcm6328_clks[] + static struct clk_lookup bcm6338_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -399,6 +404,7 @@ static struct clk_lookup bcm6338_clks[] + static struct clk_lookup bcm6345_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -411,6 +417,7 @@ static struct clk_lookup bcm6345_clks[] + static struct clk_lookup bcm6348_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -423,6 +430,8 @@ static struct clk_lookup bcm6348_clks[] + static struct clk_lookup bcm6358_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -436,6 +445,8 @@ static struct clk_lookup bcm6358_clks[] + static struct clk_lookup bcm6362_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -449,6 +460,8 @@ static struct clk_lookup bcm6362_clks[] + static struct clk_lookup bcm6368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch new file mode 100644 index 000000000..986732e0e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch @@ -0,0 +1,26 @@ +From 8124706e6040b1cf0d2dd3a05759df6cec4bddfb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:32:37 +0200 +Subject: [PATCH V2 3/8] tty/bcm63xx_uart: use refclk for the expected clock + name + +We now have the clock available under refclk, so use that. + +Acked-by: Greg Kroah-Hartman +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + drivers/tty/serial/bcm63xx_uart.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/tty/serial/bcm63xx_uart.c ++++ b/drivers/tty/serial/bcm63xx_uart.c +@@ -847,7 +847,7 @@ static int bcm_uart_probe(struct platfor + return -ENODEV; + + clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : +- clk_get(&pdev->dev, "periph"); ++ clk_get(&pdev->dev, "refclk"); + if (IS_ERR(clk)) + return -ENODEV; + diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch new file mode 100644 index 000000000..2f82830ae --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch @@ -0,0 +1,55 @@ +From 317f8659bba01b307cbe4e9902d4e3d333fd7164 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:39:17 +0200 +Subject: [PATCH V2 4/8] tty/bcm63xx_uart: allow naming clock in device tree + +Codify using a named clock for the refclk of the uart. This makes it +easier if we might need to add a gating clock (like present on the +BCM6345). + +Acked-by: Rob Herring +Acked-by: Greg Kroah-Hartman +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt | 6 ++++++ + drivers/tty/serial/bcm63xx_uart.c | 6 ++++-- + 2 files changed, 10 insertions(+), 2 deletions(-) + +--- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt ++++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt +@@ -11,6 +11,11 @@ Required properties: + - clocks: Clock driving the hardware; used to figure out the baud rate + divisor. + ++ ++Optional properties: ++ ++- clock-names: Should be "refclk". ++ + Example: + + uart0: serial@14e00520 { +@@ -19,6 +24,7 @@ Example: + interrupt-parent = <&periph_intc>; + interrupts = <2>; + clocks = <&periph_clk>; ++ clock-names = "refclk"; + }; + + clocks { +--- a/drivers/tty/serial/bcm63xx_uart.c ++++ b/drivers/tty/serial/bcm63xx_uart.c +@@ -846,8 +846,10 @@ static int bcm_uart_probe(struct platfor + if (!res_irq) + return -ENODEV; + +- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : +- clk_get(&pdev->dev, "refclk"); ++ clk = clk_get(&pdev->dev, "refclk"); ++ if (IS_ERR(clk) && pdev->dev.of_node) ++ clk = of_clk_get(pdev->dev.of_node, 0); ++ + if (IS_ERR(clk)) + return -ENODEV; + diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch new file mode 100644 index 000000000..a69998d66 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch @@ -0,0 +1,62 @@ +From cb86630379c8f3432c916d62045b5176f17f4123 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:57:21 +0200 +Subject: [PATCH V2 6/8] MIPS: BCM63XX: move the HSSPI PLL HZ into its own + clock + +Split up the HSSPL clock into rate and a gate clock, to more closely +match the actual hardware. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -248,6 +248,10 @@ static struct clk clk_hsspi = { + .set = hsspi_set, + }; + ++/* ++ * HSSPI PLL ++ */ ++static struct clk clk_hsspi_pll; + + /* + * XTM clock +@@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -447,6 +452,7 @@ static struct clk_lookup bcm6362_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -481,7 +487,7 @@ static int __init bcm63xx_clk_init(void) + clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); + break; + case BCM6328_CPU_ID: +- clk_hsspi.rate = HSSPI_PLL_HZ_6328; ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; + clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); + break; + case BCM6338_CPU_ID: +@@ -497,7 +503,7 @@ static int __init bcm63xx_clk_init(void) + clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); + break; + case BCM6362_CPU_ID: +- clk_hsspi.rate = HSSPI_PLL_HZ_6362; ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; + clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); + break; + case BCM6368_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch new file mode 100644 index 000000000..eb30b2daf --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch @@ -0,0 +1,60 @@ +From 6d43970a2eb1c7ee88caf7328d201f9c001262e9 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:48:41 +0200 +Subject: [PATCH V2 7/8] MIPS: BCM63XX: provide enet clocks as "enet" to the + ethernet devices + +Add lookups to provide the appropriate enetX clocks as just "enet" to +the ethernet devices. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -377,6 +377,8 @@ static struct clk_lookup bcm3368_clks[] + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), ++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; + + static struct clk_lookup bcm6328_clks[] = { +@@ -404,6 +406,7 @@ static struct clk_lookup bcm6338_clks[] + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), + }; + + static struct clk_lookup bcm6345_clks[] = { +@@ -417,6 +420,7 @@ static struct clk_lookup bcm6345_clks[] + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), + }; + + static struct clk_lookup bcm6348_clks[] = { +@@ -430,6 +434,8 @@ static struct clk_lookup bcm6348_clks[] + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), ++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc), + }; + + static struct clk_lookup bcm6358_clks[] = { +@@ -445,6 +451,8 @@ static struct clk_lookup bcm6358_clks[] + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), ++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; + + static struct clk_lookup bcm6362_clks[] = { diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch new file mode 100644 index 000000000..b5b36e51a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch @@ -0,0 +1,105 @@ +From b98027285bd1fa95da0645a4234a5fc1f1a83f92 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 26 Feb 2017 11:59:52 +0100 +Subject: [PATCH V2 8/8] MIPS: BCM63XX: split out swpkt_sar/usb clocks + +Make the secondary switch clocks their own clocks. This allows proper +enable reference counting between SAR/XTM and the main switch clocks, +and controlling them individually from drivers. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++-------- + 1 file changed, 51 insertions(+), 10 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -122,21 +122,56 @@ static struct clk clk_ephy = { + }; + + /* ++ * Ethernet switch SAR clock ++ */ ++static void swpkt_sar_set(struct clk *clk, int enable) ++{ ++ if (BCMCPU_IS_6368()) ++ bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable); ++ else ++ return; ++} ++ ++static struct clk clk_swpkt_sar = { ++ .set = swpkt_sar_set, ++}; ++ ++/* ++ * Ethernet switch USB clock ++ */ ++static void swpkt_usb_set(struct clk *clk, int enable) ++{ ++ if (BCMCPU_IS_6368()) ++ bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable); ++ else ++ return; ++} ++ ++static struct clk clk_swpkt_usb = { ++ .set = swpkt_usb_set, ++}; ++ ++/* + * Ethernet switch clock + */ + static void enetsw_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); +- else if (BCMCPU_IS_6362()) ++ } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); +- else if (BCMCPU_IS_6368()) +- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | +- CKCTL_6368_SWPKT_USB_EN | +- CKCTL_6368_SWPKT_SAR_EN, +- enable); +- else ++ } else if (BCMCPU_IS_6368()) { ++ if (enable) { ++ clk_enable_unlocked(&clk_swpkt_sar); ++ clk_enable_unlocked(&clk_swpkt_usb); ++ } else { ++ clk_disable_unlocked(&clk_swpkt_usb); ++ clk_disable_unlocked(&clk_swpkt_sar); ++ } ++ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable); ++ } else { + return; ++ } + + if (enable) { + /* reset switch core afer clock change */ +@@ -261,8 +296,12 @@ static void xtm_set(struct clk *clk, int + if (!BCMCPU_IS_6368()) + return; + +- bcm_hwclock_set(CKCTL_6368_SAR_EN | +- CKCTL_6368_SWPKT_SAR_EN, enable); ++ if (enable) ++ clk_enable_unlocked(&clk_swpkt_sar); ++ else ++ clk_disable_unlocked(&clk_swpkt_sar); ++ ++ bcm_hwclock_set(CKCTL_6368_SAR_EN, enable); + + if (enable) { + /* reset sar core afer clock change */ +@@ -451,6 +490,8 @@ static struct clk_lookup bcm6358_clks[] + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++ CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar), ++ CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb), + CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), + CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch new file mode 100644 index 000000000..bd66e72c9 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch @@ -0,0 +1,101 @@ +From d0423d3e4fa7ae305729cb50369427f075ccb279 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 25 Feb 2017 12:41:28 +0100 +Subject: [PATCH 1/6] bcm63xx_enet: correct clock usage + +Check the return code of prepare_enable and change one last instance of +enable only to prepare_enable. Also properly disable and release the +clock in error paths and on remove for enetsw. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 31 +++++++++++++++++++++------- + 1 file changed, 23 insertions(+), 8 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1773,7 +1773,9 @@ static int bcm_enet_probe(struct platfor + ret = PTR_ERR(priv->mac_clk); + goto out; + } +- clk_prepare_enable(priv->mac_clk); ++ ret = clk_prepare_enable(priv->mac_clk); ++ if (ret) ++ goto out_put_clk_mac; + + /* initialize default and fetch platform data */ + priv->rx_ring_size = BCMENET_DEF_RX_DESC; +@@ -1805,9 +1807,11 @@ static int bcm_enet_probe(struct platfor + if (IS_ERR(priv->phy_clk)) { + ret = PTR_ERR(priv->phy_clk); + priv->phy_clk = NULL; +- goto out_put_clk_mac; ++ goto out_disable_clk_mac; + } +- clk_prepare_enable(priv->phy_clk); ++ ret = clk_prepare_enable(priv->phy_clk); ++ if (ret) ++ goto out_put_clk_phy; + } + + /* do minimal hardware init to be able to probe mii bus */ +@@ -1901,13 +1905,16 @@ out_free_mdio: + out_uninit_hw: + /* turn off mdc clock */ + enet_writel(priv, 0, ENET_MIISC_REG); +- if (priv->phy_clk) { ++ if (priv->phy_clk) + clk_disable_unprepare(priv->phy_clk); ++ ++out_put_clk_phy: ++ if (priv->phy_clk) + clk_put(priv->phy_clk); +- } + +-out_put_clk_mac: ++out_disable_clk_mac: + clk_disable_unprepare(priv->mac_clk); ++out_put_clk_mac: + clk_put(priv->mac_clk); + out: + free_netdev(dev); +@@ -2752,7 +2759,9 @@ static int bcm_enetsw_probe(struct platf + ret = PTR_ERR(priv->mac_clk); + goto out_unmap; + } +- clk_enable(priv->mac_clk); ++ ret = clk_prepare_enable(priv->mac_clk); ++ if (ret) ++ goto out_put_clk; + + priv->rx_chan = 0; + priv->tx_chan = 1; +@@ -2773,7 +2782,7 @@ static int bcm_enetsw_probe(struct platf + + ret = register_netdev(dev); + if (ret) +- goto out_put_clk; ++ goto out_disable_clk; + + netif_carrier_off(dev); + platform_set_drvdata(pdev, dev); +@@ -2782,6 +2791,9 @@ static int bcm_enetsw_probe(struct platf + + return 0; + ++out_disable_clk: ++ clk_disable_unprepare(priv->mac_clk); ++ + out_put_clk: + clk_put(priv->mac_clk); + +@@ -2813,6 +2825,9 @@ static int bcm_enetsw_remove(struct plat + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(res->start, resource_size(res)); + ++ clk_disable_unprepare(priv->mac_clk); ++ clk_put(priv->mac_clk); ++ + free_netdev(dev); + return 0; + } diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch new file mode 100644 index 000000000..22b3a732f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch @@ -0,0 +1,29 @@ +From 23d94cb855b6f4f0ee1c01679224472104ac6440 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 30 Sep 2017 14:10:18 +0200 +Subject: [PATCH 2/6] bcm63xx_enet: do not write to random DMA channel on + BCM6345 + +The DMA controller regs actually point to DMA channel 0, so the write to +ENETDMA_CFG_REG will actually modify a random DMA channel. + +Since DMA controller registers do not exist on BCM6345, guard the write +with the usual check for dma_has_sram. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1062,7 +1062,8 @@ static int bcm_enet_open(struct net_devi + val = enet_readl(priv, ENET_CTL_REG); + val |= ENET_CTL_ENABLE_MASK; + enet_writel(priv, val, ENET_CTL_REG); +- enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); ++ if (priv->dma_has_sram) ++ enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); + enet_dmac_writel(priv, priv->dma_chan_en_mask, + ENETDMAC_CHANCFG, priv->rx_chan); + diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch new file mode 100644 index 000000000..fd3ced47b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch @@ -0,0 +1,41 @@ +From 71710bb6cbc82f411a4e5faafa0c3178e48e7137 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 30 May 2017 13:31:45 +0200 +Subject: [PATCH 3/6] bcm63xx_enet: do not rely on probe order + +Do not rely on the shared device being probed before the enet(sw) +devices. This makes it easier to eventually move out the shared +device as a dma controller driver (what it should be). + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 9 ++------- + 1 file changed, 2 insertions(+), 7 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1722,10 +1722,8 @@ static int bcm_enet_probe(struct platfor + const char *clk_name; + int i, ret; + +- /* stop if shared driver failed, assume driver->probe will be +- * called in the same order we register devices (correct ?) */ + if (!bcm_enet_shared_base[0]) +- return -ENODEV; ++ return -EPROBE_DEFER; + + res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1); +@@ -2700,11 +2698,8 @@ static int bcm_enetsw_probe(struct platf + struct resource *res_mem; + int ret, irq_rx, irq_tx; + +- /* stop if shared driver failed, assume driver->probe will be +- * called in the same order we register devices (correct ?) +- */ + if (!bcm_enet_shared_base[0]) +- return -ENODEV; ++ return -EPROBE_DEFER; + + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + irq_rx = platform_get_irq(pdev, 0); diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch new file mode 100644 index 000000000..f007750b3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch @@ -0,0 +1,150 @@ +From 179a445ae4ef36ec44f4aea18e5f42d21334d186 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 25 Feb 2017 12:39:25 +0100 +Subject: [PATCH 4/6] bcm63xx_enet: use managed functions for clock/ioremap + +Use managed functions where possible to reduce the amount of resource +handling on error and remove paths. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 54 +++++++--------------------- + 1 file changed, 12 insertions(+), 42 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1767,14 +1767,14 @@ static int bcm_enet_probe(struct platfor + clk_name = "enet1"; + } + +- priv->mac_clk = clk_get(&pdev->dev, clk_name); ++ priv->mac_clk = devm_clk_get(&pdev->dev, clk_name); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); + goto out; + } + ret = clk_prepare_enable(priv->mac_clk); + if (ret) +- goto out_put_clk_mac; ++ goto out; + + /* initialize default and fetch platform data */ + priv->rx_ring_size = BCMENET_DEF_RX_DESC; +@@ -1802,7 +1802,7 @@ static int bcm_enet_probe(struct platfor + + if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { + /* using internal PHY, enable clock */ +- priv->phy_clk = clk_get(&pdev->dev, "ephy"); ++ priv->phy_clk = devm_clk_get(&pdev->dev, "ephy"); + if (IS_ERR(priv->phy_clk)) { + ret = PTR_ERR(priv->phy_clk); + priv->phy_clk = NULL; +@@ -1810,7 +1810,7 @@ static int bcm_enet_probe(struct platfor + } + ret = clk_prepare_enable(priv->phy_clk); + if (ret) +- goto out_put_clk_phy; ++ goto out_disable_clk_mac; + } + + /* do minimal hardware init to be able to probe mii bus */ +@@ -1907,14 +1907,8 @@ out_uninit_hw: + if (priv->phy_clk) + clk_disable_unprepare(priv->phy_clk); + +-out_put_clk_phy: +- if (priv->phy_clk) +- clk_put(priv->phy_clk); +- + out_disable_clk_mac: + clk_disable_unprepare(priv->mac_clk); +-out_put_clk_mac: +- clk_put(priv->mac_clk); + out: + free_netdev(dev); + return ret; +@@ -1950,12 +1944,10 @@ static int bcm_enet_remove(struct platfo + } + + /* disable hw block clocks */ +- if (priv->phy_clk) { ++ if (priv->phy_clk) + clk_disable_unprepare(priv->phy_clk); +- clk_put(priv->phy_clk); +- } ++ + clk_disable_unprepare(priv->mac_clk); +- clk_put(priv->mac_clk); + + free_netdev(dev); + return 0; +@@ -2738,26 +2730,20 @@ static int bcm_enetsw_probe(struct platf + if (ret) + goto out; + +- if (!request_mem_region(res_mem->start, resource_size(res_mem), +- "bcm63xx_enetsw")) { +- ret = -EBUSY; ++ priv->base = devm_ioremap_resource(&pdev->dev, res_mem); ++ if (IS_ERR(priv->base)) { ++ ret = PTR_ERR(priv->base); + goto out; + } + +- priv->base = ioremap(res_mem->start, resource_size(res_mem)); +- if (priv->base == NULL) { +- ret = -ENOMEM; +- goto out_release_mem; +- } +- +- priv->mac_clk = clk_get(&pdev->dev, "enetsw"); ++ priv->mac_clk = devm_clk_get(&pdev->dev, "enetsw"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); +- goto out_unmap; ++ goto out; + } + ret = clk_prepare_enable(priv->mac_clk); + if (ret) +- goto out_put_clk; ++ goto out; + + priv->rx_chan = 0; + priv->tx_chan = 1; +@@ -2789,15 +2775,6 @@ static int bcm_enetsw_probe(struct platf + + out_disable_clk: + clk_disable_unprepare(priv->mac_clk); +- +-out_put_clk: +- clk_put(priv->mac_clk); +- +-out_unmap: +- iounmap(priv->base); +- +-out_release_mem: +- release_mem_region(res_mem->start, resource_size(res_mem)); + out: + free_netdev(dev); + return ret; +@@ -2809,20 +2786,13 @@ static int bcm_enetsw_remove(struct plat + { + struct bcm_enet_priv *priv; + struct net_device *dev; +- struct resource *res; + + /* stop netdevice */ + dev = platform_get_drvdata(pdev); + priv = netdev_priv(dev); + unregister_netdev(dev); + +- /* release device resources */ +- iounmap(priv->base); +- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- release_mem_region(res->start, resource_size(res)); +- + clk_disable_unprepare(priv->mac_clk); +- clk_put(priv->mac_clk); + + free_netdev(dev); + return 0; diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch new file mode 100644 index 000000000..d2784386a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch @@ -0,0 +1,36 @@ +From 555baec974ede81e616ca88ac6d3fca09239368f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 18 Jul 2017 13:18:01 +0200 +Subject: [PATCH 5/6] bcm63xx_enet: drop unneeded NULL phy_clk check + +clk_disable and clk_unprepare are NULL-safe, so need to duplicate the +NULL check of the functions. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1904,8 +1904,7 @@ out_free_mdio: + out_uninit_hw: + /* turn off mdc clock */ + enet_writel(priv, 0, ENET_MIISC_REG); +- if (priv->phy_clk) +- clk_disable_unprepare(priv->phy_clk); ++ clk_disable_unprepare(priv->phy_clk); + + out_disable_clk_mac: + clk_disable_unprepare(priv->mac_clk); +@@ -1944,9 +1943,7 @@ static int bcm_enet_remove(struct platfo + } + + /* disable hw block clocks */ +- if (priv->phy_clk) +- clk_disable_unprepare(priv->phy_clk); +- ++ clk_disable_unprepare(priv->phy_clk); + clk_disable_unprepare(priv->mac_clk); + + free_netdev(dev); diff --git a/target/linux/brcm63xx/patches-4.14/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch b/target/linux/brcm63xx/patches-4.14/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch new file mode 100644 index 000000000..41a6b57f5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch @@ -0,0 +1,22 @@ +From 77364ce98037972fb1c57d0ee0418eb1c2b26521 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 29 May 2017 13:11:14 +0200 +Subject: [PATCH 6/6] bcm63xx_enet: remove unneeded include + +We don't use anyhing from that file, so drop it. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.h | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -9,7 +9,6 @@ + #include + + #include +-#include + #include + #include + diff --git a/target/linux/brcm63xx/patches-4.14/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch b/target/linux/brcm63xx/patches-4.14/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch new file mode 100644 index 000000000..b3405e0eb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch @@ -0,0 +1,39 @@ +From 943b0832e0cf3afe5bd40ffb1885d06106122c5d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:49:49 +0200 +Subject: [PATCH 1/4] bcm63xx_enet: just use "enet" as the clock name + +Now that we have the individual clocks available as "enet" we +don't need to rely on the device id for them anymore. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1719,7 +1719,6 @@ static int bcm_enet_probe(struct platfor + struct bcm63xx_enet_platform_data *pd; + struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx; + struct mii_bus *bus; +- const char *clk_name; + int i, ret; + + if (!bcm_enet_shared_base[0]) +@@ -1760,14 +1759,12 @@ static int bcm_enet_probe(struct platfor + if (priv->mac_id == 0) { + priv->rx_chan = 0; + priv->tx_chan = 1; +- clk_name = "enet0"; + } else { + priv->rx_chan = 2; + priv->tx_chan = 3; +- clk_name = "enet1"; + } + +- priv->mac_clk = devm_clk_get(&pdev->dev, clk_name); ++ priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); + goto out; diff --git a/target/linux/brcm63xx/patches-4.14/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch b/target/linux/brcm63xx/patches-4.14/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch new file mode 100644 index 000000000..3a998e930 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch @@ -0,0 +1,72 @@ +From b7d1d1f345bb3b25c360c1df812d98866e2ee7fb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 30 Sep 2017 13:50:03 +0200 +Subject: [PATCH 2/4] bcm63xx_enet: use platform data for dma channel numbers + +To reduce the reliance on device ids, pass the dma channel numbers to +the enet devices as platform data. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-enet.c | 8 ++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 4 ++++ + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 11 ++--------- + 3 files changed, 14 insertions(+), 9 deletions(-) + +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -265,6 +265,14 @@ int __init bcm63xx_enet_register(int uni + dpd->dma_chan_width = ENETDMA_CHAN_WIDTH; + } + ++ if (unit == 0) { ++ dpd->rx_chan = 0; ++ dpd->tx_chan = 1; ++ } else { ++ dpd->rx_chan = 2; ++ dpd->tx_chan = 3; ++ } ++ + ret = platform_device_register(pdev); + if (ret) + return ret; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h +@@ -55,6 +55,10 @@ struct bcm63xx_enet_platform_data { + + /* DMA descriptor shift */ + unsigned int dma_desc_shift; ++ ++ /* dma channel ids */ ++ int rx_chan; ++ int tx_chan; + }; + + /* +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1755,15 +1755,6 @@ static int bcm_enet_probe(struct platfor + priv->irq_tx = res_irq_tx->start; + priv->mac_id = pdev->id; + +- /* get rx & tx dma channel id for this mac */ +- if (priv->mac_id == 0) { +- priv->rx_chan = 0; +- priv->tx_chan = 1; +- } else { +- priv->rx_chan = 2; +- priv->tx_chan = 3; +- } +- + priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); +@@ -1795,6 +1786,8 @@ static int bcm_enet_probe(struct platfor + priv->dma_chan_width = pd->dma_chan_width; + priv->dma_has_sram = pd->dma_has_sram; + priv->dma_desc_shift = pd->dma_desc_shift; ++ priv->rx_chan = pd->rx_chan; ++ priv->tx_chan = pd->tx_chan; + } + + if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { diff --git a/target/linux/brcm63xx/patches-4.14/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch b/target/linux/brcm63xx/patches-4.14/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch new file mode 100644 index 000000000..cead5c226 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch @@ -0,0 +1,25 @@ +From 8c61608e5dd2e15575c171ee9cd558ddc3b94962 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 17 Dec 2017 12:54:30 +0100 +Subject: [PATCH 3/4] bcm63xx_enet: remove pointless mac_id check + +Enabling the ephy clock for mac 1 is harmless, and the actual usage of +the ephy is not restricted to mac 0, so we might as well remove the +check. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1790,7 +1790,7 @@ static int bcm_enet_probe(struct platfor + priv->tx_chan = pd->tx_chan; + } + +- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { ++ if (priv->has_phy && !priv->use_external_mii) { + /* using internal PHY, enable clock */ + priv->phy_clk = devm_clk_get(&pdev->dev, "ephy"); + if (IS_ERR(priv->phy_clk)) { diff --git a/target/linux/brcm63xx/patches-4.14/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch b/target/linux/brcm63xx/patches-4.14/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch new file mode 100644 index 000000000..200178b35 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch @@ -0,0 +1,46 @@ +From faea89cd893a1a7af81185f026a64dad603ef72f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 17 Dec 2017 12:58:12 +0100 +Subject: [PATCH 4/4] bcm63xx_enet: use platform device id directly for miibus + name + +Directly use the platform device for generating the miibus name. This removes +the last user of bcm_enet_priv::mac_id and we can remove the field. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 +-- + drivers/net/ethernet/broadcom/bcm63xx_enet.h | 3 --- + 2 files changed, 1 insertion(+), 5 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1753,7 +1753,6 @@ static int bcm_enet_probe(struct platfor + dev->irq = priv->irq = res_irq->start; + priv->irq_rx = res_irq_rx->start; + priv->irq_tx = res_irq_tx->start; +- priv->mac_id = pdev->id; + + priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { +@@ -1821,7 +1820,7 @@ static int bcm_enet_probe(struct platfor + bus->priv = priv; + bus->read = bcm_enet_mdio_read_phylib; + bus->write = bcm_enet_mdio_write_phylib; +- sprintf(bus->id, "%s-%d", pdev->name, priv->mac_id); ++ sprintf(bus->id, "%s-%d", pdev->name, pdev->id); + + /* only probe bus where we think the PHY is, because + * the mdio read operation return 0 instead of 0xffff +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -193,9 +193,6 @@ struct bcm_enet_mib_counters { + + struct bcm_enet_priv { + +- /* mac id (from platform device id) */ +- int mac_id; +- + /* base remapped address of device */ + void __iomem *base; + diff --git a/target/linux/brcm63xx/patches-4.14/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch b/target/linux/brcm63xx/patches-4.14/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch new file mode 100644 index 000000000..3974b9bd3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch @@ -0,0 +1,28 @@ +From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:19 +0100 +Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay + +Knowledge of the clock setup delay should remain at the clock level (so +it can be clock specific and CPU specific). Add the 100 milliseconds +required clock delay for the USB host clock when it gets enabled. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/clk.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -214,6 +214,11 @@ static void usbh_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); ++ else ++ return; ++ ++ if (enable) ++ msleep(100); + } + + static struct clk clk_usbh = { diff --git a/target/linux/brcm63xx/patches-4.14/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch b/target/linux/brcm63xx/patches-4.14/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch new file mode 100644 index 000000000..a9651d089 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch @@ -0,0 +1,41 @@ +From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:20 +0100 +Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to + clock code + +This patch adds the required 10 micro seconds delay to the USB device +clock enable operation. Put this where the correct clock knowledege is, +which is in the clock code, and remove this delay from the bcm63xx_udc +gadget driver where it was before. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/clk.c | 5 +++++ + drivers/usb/gadget/bcm63xx_udc.c | 1 - + 2 files changed, 5 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -236,6 +236,11 @@ static void usbd_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); ++ else ++ return; ++ ++ if (enable) ++ udelay(10); + } + + static struct clk clk_usbd = { +--- a/drivers/usb/gadget/udc/bcm63xx_udc.c ++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c +@@ -410,7 +410,6 @@ static inline void set_clocks(struct bcm + if (is_enabled) { + clk_enable(udc->usbh_clk); + clk_enable(udc->usbd_clk); +- udelay(10); + } else { + clk_disable(udc->usbd_clk); + clk_disable(udc->usbh_clk); diff --git a/target/linux/brcm63xx/patches-4.14/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch b/target/linux/brcm63xx/patches-4.14/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch new file mode 100644 index 000000000..d7aee7c34 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch @@ -0,0 +1,151 @@ +From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:21 +0100 +Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private + register + +This patch moves the code touching the USB private register in the +bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in +preparation for adding support for OHCI and EHCI host controllers which +will also touch the USB private register. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++ + drivers/usb/gadget/bcm63xx_udc.c | 27 ++-------- + 4 files changed, 67 insertions(+), 24 deletions(-) + create mode 100644 arch/mips/bcm63xx/usb-common.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -2,7 +2,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-usbd.o ++ dev-wdt.o dev-usb-usbd.o usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -0,0 +1,53 @@ ++/* ++ * Broadcom BCM63xx common USB device configuration code ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2012 Kevin Cernekee ++ * Copyright (C) 2012 Broadcom Corporation ++ * ++ */ ++#include ++ ++#include ++#include ++#include ++#include ++ ++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) ++{ ++ u32 val; ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); ++ if (is_device) { ++ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); ++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ } else { ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ } ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ if (is_device) ++ val |= USBH_PRIV_SWAP_USBD_MASK; ++ else ++ val &= ~USBH_PRIV_SWAP_USBD_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++} ++EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); ++ ++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) ++{ ++ u32 val; ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); ++ if (is_on) ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ else ++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++} ++EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h +@@ -0,0 +1,9 @@ ++#ifndef BCM63XX_USB_PRIV_H_ ++#define BCM63XX_USB_PRIV_H_ ++ ++#include ++ ++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); ++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); ++ ++#endif /* BCM63XX_USB_PRIV_H_ */ +--- a/drivers/usb/gadget/udc/bcm63xx_udc.c ++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c +@@ -39,6 +39,7 @@ + #include + #include + #include ++#include + + #define DRV_MODULE_NAME "bcm63xx_udc" + +@@ -887,22 +888,7 @@ static void bcm63xx_select_phy_mode(stru + bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG); + } + +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); +- if (is_device) { +- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); +- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- } else { +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- } +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); +- +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); +- if (is_device) +- val |= USBH_PRIV_SWAP_USBD_MASK; +- else +- val &= ~USBH_PRIV_SWAP_USBD_MASK; +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++ bcm63xx_usb_priv_select_phy_mode(portmask, is_device); + } + + /** +@@ -916,14 +902,9 @@ static void bcm63xx_select_phy_mode(stru + */ + static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on) + { +- u32 val, portmask = BIT(udc->pd->port_no); ++ u32 portmask = BIT(udc->pd->port_no); + +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); +- if (is_on) +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- else +- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ bcm63xx_usb_priv_select_pullup(portmask, is_on); + } + + /** diff --git a/target/linux/brcm63xx/patches-4.14/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch b/target/linux/brcm63xx/patches-4.14/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch new file mode 100644 index 000000000..40bbe083a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch @@ -0,0 +1,169 @@ +From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:22 +0100 +Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to + common USB code + +This patch updates the common USB code touching the USB private +registers with the specific bits to properly enable OHCI and EHCI +controllers on BCM63xx SoCs. As a result we now need to protect access +to Read Modify Write sequences using a spinlock because we cannot +guarantee that any of the exposed helper will not be called +concurrently. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 + + 2 files changed, 99 insertions(+) + +--- a/arch/mips/bcm63xx/usb-common.c ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -5,10 +5,12 @@ + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * ++ * Copyright (C) 2008 Maxime Bizon + * Copyright (C) 2012 Kevin Cernekee + * Copyright (C) 2012 Broadcom Corporation + * + */ ++#include + #include + + #include +@@ -16,9 +18,14 @@ + #include + #include + ++static DEFINE_SPINLOCK(usb_priv_reg_lock); ++ + void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) + { + u32 val; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); + + val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); + if (is_device) { +@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3 + else + val &= ~USBH_PRIV_SWAP_USBD_MASK; + bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); + } + EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); + + void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) + { + u32 val; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); + + val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); + if (is_on) +@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32 + else + val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); + bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); + } + EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); ++ ++/* The following array represents the meaning of the DESC/DATA ++ * endian swapping with respect to the CPU configured endianness ++ * ++ * DATA ENDN mmio descriptor ++ * 0 0 BE invalid ++ * 0 1 BE LE ++ * 1 0 BE BE ++ * 1 1 BE invalid ++ * ++ * Since BCM63XX SoCs are configured to be in big-endian mode ++ * we want configuration at line 3. ++ */ ++void bcm63xx_usb_priv_ohci_cfg_set(void) ++{ ++ u32 reg; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); ++ ++ if (BCMCPU_IS_6348()) ++ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG); ++ else if (BCMCPU_IS_6358()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); ++ /* ++ * The magic value comes for the original vendor BSP ++ * and is needed for USB to work. Datasheet does not ++ * help, so the magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, ++ USBH_PRIV_TEST_6358_REG); ++ ++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); ++} ++ ++void bcm63xx_usb_priv_ehci_cfg_set(void) ++{ ++ u32 reg; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); ++ ++ if (BCMCPU_IS_6358()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); ++ ++ /* ++ * The magic value comes for the original vendor BSP ++ * and is needed for USB to work. Datasheet does not ++ * help, so the magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, ++ USBH_PRIV_TEST_6358_REG); ++ ++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h +@@ -5,5 +5,7 @@ + + void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); + void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); ++void bcm63xx_usb_priv_ohci_cfg_set(void); ++void bcm63xx_usb_priv_ehci_cfg_set(void); + + #endif /* BCM63XX_USB_PRIV_H_ */ diff --git a/target/linux/brcm63xx/patches-4.14/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-4.14/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch new file mode 100644 index 000000000..64ea4731a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch @@ -0,0 +1,62 @@ +From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:23 +0100 +Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration + symbol + +This configuration symbol can be used by CPUs supporting the on-chip +OHCI controller, and ensures that all relevant OHCI-related +configuration options are correctly selected. So far, OHCI support is +available for the 6328, 6348, 6358 and 6358 SoCs. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Kconfig | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -7,10 +7,17 @@ config BCM63XX_CPU_3368 + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + ++config BCM63XX_OHCI ++ bool ++ select USB_ARCH_HAS_OHCI ++ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD ++ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -25,21 +32,25 @@ config BCM63XX_CPU_6348 + bool "support 6348 CPU" + select SYS_HAS_CPU_BMIPS32_3300 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-4.14/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch b/target/linux/brcm63xx/patches-4.14/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch new file mode 100644 index 000000000..151caee4f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch @@ -0,0 +1,138 @@ +From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:24 +0100 +Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI + controller + +Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be +driven by the ohci-platform generic driver by using specific power +on/off/suspend callback to manage clocks and hardware specific +configuration. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++ + 3 files changed, 101 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -2,7 +2,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-usbd.o usb-common.o ++ dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ohci.c +@@ -0,0 +1,94 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2013 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ohci_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ohci_dmamask = DMA_BIT_MASK(32); ++ ++static struct clk *usb_host_clock; ++ ++static int bcm63xx_ohci_power_on(struct platform_device *pdev) ++{ ++ usb_host_clock = clk_get(&pdev->dev, "usbh"); ++ if (IS_ERR_OR_NULL(usb_host_clock)) ++ return -ENODEV; ++ ++ clk_prepare_enable(usb_host_clock); ++ ++ bcm63xx_usb_priv_ohci_cfg_set(); ++ ++ return 0; ++} ++ ++static void bcm63xx_ohci_power_off(struct platform_device *pdev) ++{ ++ if (!IS_ERR_OR_NULL(usb_host_clock)) { ++ clk_disable_unprepare(usb_host_clock); ++ clk_put(usb_host_clock); ++ } ++} ++ ++static struct usb_ohci_pdata bcm63xx_ohci_pdata = { ++ .big_endian_desc = 1, ++ .big_endian_mmio = 1, ++ .no_big_frame_no = 1, ++ .num_ports = 1, ++ .power_on = bcm63xx_ohci_power_on, ++ .power_off = bcm63xx_ohci_power_off, ++ .power_suspend = bcm63xx_ohci_power_off, ++}; ++ ++static struct platform_device bcm63xx_ohci_device = { ++ .name = "ohci-platform", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ohci_resources), ++ .resource = ohci_resources, ++ .dev = { ++ .platform_data = &bcm63xx_ohci_pdata, ++ .dma_mask = &ohci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++int __init bcm63xx_ohci_register(void) ++{ ++ if (BCMCPU_IS_6345() || BCMCPU_IS_6338()) ++ return -ENODEV; ++ ++ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); ++ ohci_resources[0].end = ohci_resources[0].start; ++ ohci_resources[0].end += RSET_OHCI_SIZE - 1; ++ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0); ++ ++ return platform_device_register(&bcm63xx_ohci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_OHCI_H_ ++#define BCM63XX_DEV_USB_OHCI_H_ ++ ++int bcm63xx_ohci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_OHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-4.14/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-4.14/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch new file mode 100644 index 000000000..253d7d5a3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch @@ -0,0 +1,36 @@ +From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:25 +0100 +Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board + enables it + +BCM63XX-based boards can control the registration of the OHCI controller +by setting their has_ohci0 flag to 1. Handle this in the generic +code dealing with board registration and call the actual helper to +register the OHCI controller. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -898,6 +899,9 @@ int __init board_register_devices(void) + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + ++ if (board.has_ohci0) ++ bcm63xx_ohci_register(); ++ + if (board.has_dsp) + bcm63xx_dsp_register(&board.dsp); + diff --git a/target/linux/brcm63xx/patches-4.14/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-4.14/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch new file mode 100644 index 000000000..f7311a8f8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch @@ -0,0 +1,62 @@ +From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:26 +0100 +Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration + symbol + +This configuration symbol can be used by CPUs supporting the on-chip +EHCI controller, and ensures that all relevant EHCI-related +configuration options are selected. So far BCM6328, BCM6358 and BCM6368 +have an EHCI controller and do select this symbol. Update +drivers/usb/host/Kconfig with BCM63XX to update direct unmet +dependencies. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Kconfig | 9 +++++++++ + drivers/usb/host/Kconfig | 5 +++-- + 2 files changed, 12 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -13,11 +13,18 @@ config BCM63XX_OHCI + select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD + select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD + ++config BCM63XX_EHCI ++ bool ++ select USB_ARCH_HAS_EHCI ++ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD ++ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -39,18 +46,21 @@ config BCM63XX_CPU_6358 + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-4.14/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch b/target/linux/brcm63xx/patches-4.14/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch new file mode 100644 index 000000000..215d17502 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch @@ -0,0 +1,137 @@ +From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:27 +0100 +Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI + controller + +Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be +driven by the generic ehci-platform driver by using specific power +on/off/suspend callbacks to manage clocks and hardware specific +configuration. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++ + 3 files changed, 99 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -2,7 +2,8 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o ++ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ ++ usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -0,0 +1,92 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2013 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ehci_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ehci_dmamask = DMA_BIT_MASK(32); ++ ++static struct clk *usb_host_clock; ++ ++static int bcm63xx_ehci_power_on(struct platform_device *pdev) ++{ ++ usb_host_clock = clk_get(&pdev->dev, "usbh"); ++ if (IS_ERR_OR_NULL(usb_host_clock)) ++ return -ENODEV; ++ ++ clk_prepare_enable(usb_host_clock); ++ ++ bcm63xx_usb_priv_ehci_cfg_set(); ++ ++ return 0; ++} ++ ++static void bcm63xx_ehci_power_off(struct platform_device *pdev) ++{ ++ if (!IS_ERR_OR_NULL(usb_host_clock)) { ++ clk_disable_unprepare(usb_host_clock); ++ clk_put(usb_host_clock); ++ } ++} ++ ++static struct usb_ehci_pdata bcm63xx_ehci_pdata = { ++ .big_endian_desc = 1, ++ .big_endian_mmio = 1, ++ .power_on = bcm63xx_ehci_power_on, ++ .power_off = bcm63xx_ehci_power_off, ++ .power_suspend = bcm63xx_ehci_power_off, ++}; ++ ++static struct platform_device bcm63xx_ehci_device = { ++ .name = "ehci-platform", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ehci_resources), ++ .resource = ehci_resources, ++ .dev = { ++ .platform_data = &bcm63xx_ehci_pdata, ++ .dma_mask = &ehci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++int __init bcm63xx_ehci_register(void) ++{ ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ return 0; ++ ++ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); ++ ehci_resources[0].end = ehci_resources[0].start; ++ ehci_resources[0].end += RSET_EHCI_SIZE - 1; ++ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0); ++ ++ return platform_device_register(&bcm63xx_ehci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_EHCI_H_ ++#define BCM63XX_DEV_USB_EHCI_H_ ++ ++int bcm63xx_ehci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_EHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-4.14/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-4.14/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch new file mode 100644 index 000000000..f1256727a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch @@ -0,0 +1,36 @@ +From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:28 +0100 +Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board + enables it + +BCM63XX-based board can control the registration of the EHCI controller +by setting their has_ehci0 flag to 1. Handle this in the generic +code dealing with board registration and call the actual helper to register +the EHCI controller. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -899,6 +900,9 @@ int __init board_register_devices(void) + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + ++ if (board.has_ehci0) ++ bcm63xx_ehci_register(); ++ + if (board.has_ohci0) + bcm63xx_ohci_register(); + diff --git a/target/linux/brcm63xx/patches-4.14/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch b/target/linux/brcm63xx/patches-4.14/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch new file mode 100644 index 000000000..6d9112993 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch @@ -0,0 +1,24 @@ +From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:30 +0100 +Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support + overcurrent + +This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it +does not support proper overcurrent reporting. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/dev-usb-ehci.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc + static struct usb_ehci_pdata bcm63xx_ehci_pdata = { + .big_endian_desc = 1, + .big_endian_mmio = 1, ++ .ignore_oc = 1, + .power_on = bcm63xx_ehci_power_on, + .power_off = bcm63xx_ehci_power_off, + .power_suspend = bcm63xx_ehci_power_off, diff --git a/target/linux/brcm63xx/patches-4.14/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch b/target/linux/brcm63xx/patches-4.14/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch new file mode 100644 index 000000000..2e663259d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch @@ -0,0 +1,79 @@ +From 53980645bb12bd8723ac226805ee171780b24196 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 26 Jun 2017 13:37:11 +0200 +Subject: [PATCH 1/4] mtd: add of_match_table parsing for partition parsers + +Allow partition parsers to be matched by attaching compatible strings to +partitions. + +This allows specifying the expected format of flash partitions for +matching partition parsers. + +Example: + +flash@foo { + ... + partitions { + compatible = "fixed-partitions"; + + cfe@0 { + reg = <0x0 0x10000>; + label = "cfe"; + read-only; + }; + + firmware@10000 { + reg = <0x10000 0x3e0000>; + label = "firmware"; + compatible = "brcm,bcm63xx-imagetag"; + }; + + nvram@3f0000 { + reg = <0x3e0000 0x10000>; + label = "nvram"; + }; + }; +}; + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/mtdpart.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/mtd/mtdpart.c ++++ b/drivers/mtd/mtdpart.c +@@ -961,8 +961,7 @@ int add_mtd_partitions(struct mtd_info * + add_mtd_device(&slave->mtd); + mtd_partition_split(master, slave); + mtd_add_partition_attrs(slave); +- if (parts[i].types) +- mtd_parse_part(slave, parts[i].types); ++ mtd_parse_part(slave, parts[i].types); + + cur_offset = slave->offset + slave->mtd.size; + } +@@ -1134,7 +1133,9 @@ static int mtd_part_of_parse(struct mtd_ + const char *fixed = "fixed-partitions"; + int ret, err = 0; + +- np = of_get_child_by_name(mtd_get_of_node(master), "partitions"); ++ np = mtd_get_of_node(master); ++ if (!mtd_is_partition(master)) ++ np = of_get_child_by_name(np, "partitions"); + of_property_for_each_string(np, "compatible", prop, compat) { + parser = mtd_part_get_compatible_parser(compat); + if (!parser) +@@ -1206,8 +1207,12 @@ int parse_mtd_partitions(struct mtd_info + types = types_of; + } + +- if (!types) ++ if (!types) { ++ if (mtd_is_partition(master)) ++ return -ENOENT; ++ + types = default_mtd_part_types; ++ } + + for ( ; *types; types++) { + /* diff --git a/target/linux/brcm63xx/patches-4.14/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch b/target/linux/brcm63xx/patches-4.14/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch new file mode 100644 index 000000000..6a714eb91 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch @@ -0,0 +1,481 @@ +From a2b8c7f648e168573905818dbb4cb90ca3957c65 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 28 Jun 2017 18:29:43 +0200 +Subject: [PATCH] mtd: bcm63xxpart: move imagetag parsing to its own parser + +Move the bcm963xx Image Tag parsing into its own partition parser. This +Allows reusing the parser with different full flash parsers. + +While moving it, rename it to bcm963* to better reflect it isn't chip +but board specific. + +Signed-off-by: Jonas Gorski +--- +I tried to keep the code as-is, to keep the changes as small as +possible. + +One side effect is that the partitions get renumbered, which means any +root=/dev/mtdblock* will now point to the wrong mtd device. But since +bcm963xx boards will require these hardcoded in the kernel commandline +anyway this should b a non issue, as it can be easily updated. + +There is no such thing in the mips/bcm63xx defconfig, so nothing to update +there. + + drivers/mtd/Kconfig | 1 + + drivers/mtd/bcm63xxpart.c | 155 ++---------------------- + drivers/mtd/parsers/Kconfig | 11 ++ + drivers/mtd/parsers/Makefile | 1 + + drivers/mtd/parsers/parser_imagetag.c | 214 ++++++++++++++++++++++++++++++++++ + 5 files changed, 235 insertions(+), 147 deletions(-) + create mode 100644 drivers/mtd/parsers/parser_imagetag.c + +--- a/drivers/mtd/Kconfig ++++ b/drivers/mtd/Kconfig +@@ -163,6 +163,7 @@ config MTD_BCM63XX_PARTS + tristate "BCM63XX CFE partitioning support" + depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST + select CRC32 ++ select MTD_PARSER_IMAGETAG + help + This provides partions parsing for BCM63xx devices with CFE + bootloaders. +--- a/drivers/mtd/bcm63xxpart.c ++++ b/drivers/mtd/bcm63xxpart.c +@@ -93,51 +93,19 @@ static int bcm63xx_read_nvram(struct mtd + return 0; + } + +-static int bcm63xx_read_image_tag(struct mtd_info *master, const char *name, +- loff_t tag_offset, struct bcm_tag *buf) +-{ +- int ret; +- size_t retlen; +- u32 computed_crc; +- +- ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf); +- if (ret) +- return ret; +- +- if (retlen != sizeof(*buf)) +- return -EIO; +- +- computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf, +- offsetof(struct bcm_tag, header_crc)); +- if (computed_crc == buf->header_crc) { +- STR_NULL_TERMINATE(buf->board_id); +- STR_NULL_TERMINATE(buf->tag_version); +- +- pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n", +- name, tag_offset, buf->tag_version, buf->board_id); +- +- return 0; +- } +- +- pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n", +- name, tag_offset, buf->header_crc, computed_crc); +- return 1; +-} ++static const char * const bcm63xx_cfe_part_types[] = { ++ "bcm963xx-imagetag", ++ NULL, ++}; + + static int bcm63xx_parse_cfe_nor_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, struct bcm963xx_nvram *nvram) + { +- /* CFE, NVRAM and global Linux are always present */ +- int nrparts = 3, curpart = 0; +- struct bcm_tag *buf = NULL; + struct mtd_partition *parts; +- int ret; +- unsigned int rootfsaddr, kerneladdr, spareaddr; +- unsigned int rootfslen, kernellen, sparelen, totallen; ++ int nrparts = 3, curpart = 0; + unsigned int cfelen, nvramlen; + unsigned int cfe_erasesize; + int i; +- bool rootfs_first = false; + + cfe_erasesize = max_t(uint32_t, master->erasesize, + BCM963XX_CFE_BLOCK_SIZE); +@@ -146,83 +114,9 @@ static int bcm63xx_parse_cfe_nor_partiti + nvramlen = nvram->psi_size * SZ_1K; + nvramlen = roundup(nvramlen, cfe_erasesize); + +- buf = vmalloc(sizeof(struct bcm_tag)); +- if (!buf) +- return -ENOMEM; +- +- /* Get the tag */ +- ret = bcm63xx_read_image_tag(master, "rootfs", cfelen, buf); +- if (!ret) { +- STR_NULL_TERMINATE(buf->flash_image_start); +- if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) || +- rootfsaddr < BCM963XX_EXTENDED_SIZE) { +- pr_err("invalid rootfs address: %*ph\n", +- (int)sizeof(buf->flash_image_start), +- buf->flash_image_start); +- goto invalid_tag; +- } +- +- STR_NULL_TERMINATE(buf->kernel_address); +- if (kstrtouint(buf->kernel_address, 10, &kerneladdr) || +- kerneladdr < BCM963XX_EXTENDED_SIZE) { +- pr_err("invalid kernel address: %*ph\n", +- (int)sizeof(buf->kernel_address), +- buf->kernel_address); +- goto invalid_tag; +- } +- +- STR_NULL_TERMINATE(buf->kernel_length); +- if (kstrtouint(buf->kernel_length, 10, &kernellen)) { +- pr_err("invalid kernel length: %*ph\n", +- (int)sizeof(buf->kernel_length), +- buf->kernel_length); +- goto invalid_tag; +- } +- +- STR_NULL_TERMINATE(buf->total_length); +- if (kstrtouint(buf->total_length, 10, &totallen)) { +- pr_err("invalid total length: %*ph\n", +- (int)sizeof(buf->total_length), +- buf->total_length); +- goto invalid_tag; +- } +- +- kerneladdr = kerneladdr - BCM963XX_EXTENDED_SIZE; +- rootfsaddr = rootfsaddr - BCM963XX_EXTENDED_SIZE; +- spareaddr = roundup(totallen, master->erasesize) + cfelen; +- +- if (rootfsaddr < kerneladdr) { +- /* default Broadcom layout */ +- rootfslen = kerneladdr - rootfsaddr; +- rootfs_first = true; +- } else { +- /* OpenWrt layout */ +- rootfsaddr = kerneladdr + kernellen; +- rootfslen = spareaddr - rootfsaddr; +- } +- } else if (ret > 0) { +-invalid_tag: +- kernellen = 0; +- rootfslen = 0; +- rootfsaddr = 0; +- spareaddr = cfelen; +- } else { +- goto out; +- } +- sparelen = master->size - spareaddr - nvramlen; +- +- /* Determine number of partitions */ +- if (rootfslen > 0) +- nrparts++; +- +- if (kernellen > 0) +- nrparts++; +- + parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); +- if (!parts) { +- ret = -ENOMEM; +- goto out; +- } ++ if (!parts) ++ return -ENOMEM; + + /* Start building partition list */ + parts[curpart].name = "CFE"; +@@ -230,30 +124,6 @@ invalid_tag: + parts[curpart].size = cfelen; + curpart++; + +- if (kernellen > 0) { +- int kernelpart = curpart; +- +- if (rootfslen > 0 && rootfs_first) +- kernelpart++; +- parts[kernelpart].name = "kernel"; +- parts[kernelpart].offset = kerneladdr; +- parts[kernelpart].size = kernellen; +- curpart++; +- } +- +- if (rootfslen > 0) { +- int rootfspart = curpart; +- +- if (kernellen > 0 && rootfs_first) +- rootfspart--; +- parts[rootfspart].name = "rootfs"; +- parts[rootfspart].offset = rootfsaddr; +- parts[rootfspart].size = rootfslen; +- if (sparelen > 0 && !rootfs_first) +- parts[rootfspart].size += sparelen; +- curpart++; +- } +- + parts[curpart].name = "nvram"; + parts[curpart].offset = master->size - nvramlen; + parts[curpart].size = nvramlen; +@@ -263,22 +133,13 @@ invalid_tag: + parts[curpart].name = "linux"; + parts[curpart].offset = cfelen; + parts[curpart].size = master->size - cfelen - nvramlen; ++ parts[curpart].types = bcm63xx_cfe_part_types; + + for (i = 0; i < nrparts; i++) + pr_info("Partition %d is %s offset %llx and length %llx\n", i, + parts[i].name, parts[i].offset, parts[i].size); + +- pr_info("Spare partition is offset %x and length %x\n", spareaddr, +- sparelen); +- + *pparts = parts; +- ret = 0; +- +-out: +- vfree(buf); +- +- if (ret) +- return ret; + + return nrparts; + } +--- a/drivers/mtd/parsers/Kconfig ++++ b/drivers/mtd/parsers/Kconfig +@@ -1,3 +1,14 @@ ++config MTD_PARSER_IMAGETAG ++ tristate "Parser for BCM963XX Image Tag format partitions" ++ depends on BCM63XX || BMIPS || COMPILE_TEST ++ select CRC32 ++ help ++ Image Tag is the firmware header used by broadcom on their xDSL line ++ of devices. It is used to describe the offsets and lengths of kernel ++ and rootfs partitions. ++ This driver adds support for parsing a partition with an Image Tag ++ header and creates up to two partitions, kernel and rootfs. ++ + config MTD_PARSER_TRX + tristate "Parser for TRX format partitions" + depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST) +--- a/drivers/mtd/parsers/Makefile ++++ b/drivers/mtd/parsers/Makefile +@@ -1 +1,2 @@ ++obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o + obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o +--- /dev/null ++++ b/drivers/mtd/parsers/parser_imagetag.c +@@ -0,0 +1,214 @@ ++/* ++ * BCM63XX CFE image tag parser ++ * ++ * Copyright © 2006-2008 Florian Fainelli ++ * Mike Albon ++ * Copyright © 2009-2010 Daniel Dickinson ++ * Copyright © 2011-2013 Jonas Gorski ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Ensure strings read from flash structs are null terminated */ ++#define STR_NULL_TERMINATE(x) \ ++ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0) ++ ++static int bcm963xx_read_imagetag(struct mtd_info *master, const char *name, ++ loff_t tag_offset, struct bcm_tag *buf) ++{ ++ int ret; ++ size_t retlen; ++ u32 computed_crc; ++ ++ ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf); ++ if (ret) ++ return ret; ++ ++ if (retlen != sizeof(*buf)) ++ return -EIO; ++ ++ computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf, ++ offsetof(struct bcm_tag, header_crc)); ++ if (computed_crc == buf->header_crc) { ++ STR_NULL_TERMINATE(buf->board_id); ++ STR_NULL_TERMINATE(buf->tag_version); ++ ++ pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n", ++ name, tag_offset, buf->tag_version, buf->board_id); ++ ++ return 0; ++ } ++ ++ pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n", ++ name, tag_offset, buf->header_crc, computed_crc); ++ return -EINVAL; ++} ++ ++static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master, ++ const struct mtd_partition **pparts, ++ struct mtd_part_parser_data *data) ++{ ++ /* CFE, NVRAM and global Linux are always present */ ++ int nrparts = 0, curpart = 0; ++ struct bcm_tag *buf = NULL; ++ struct mtd_partition *parts; ++ int ret; ++ unsigned int rootfsaddr, kerneladdr, spareaddr, offset; ++ unsigned int rootfslen, kernellen, sparelen, totallen; ++ int i; ++ bool rootfs_first = false; ++ ++ buf = vmalloc(sizeof(struct bcm_tag)); ++ if (!buf) ++ return -ENOMEM; ++ ++ /* Get the tag */ ++ ret = bcm963xx_read_imagetag(master, "rootfs", 0, buf); ++ if (!ret) { ++ STR_NULL_TERMINATE(buf->flash_image_start); ++ if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) || ++ rootfsaddr < BCM963XX_EXTENDED_SIZE) { ++ pr_err("invalid rootfs address: %*ph\n", ++ (int)sizeof(buf->flash_image_start), ++ buf->flash_image_start); ++ goto out; ++ } ++ ++ STR_NULL_TERMINATE(buf->kernel_address); ++ if (kstrtouint(buf->kernel_address, 10, &kerneladdr) || ++ kerneladdr < BCM963XX_EXTENDED_SIZE) { ++ pr_err("invalid kernel address: %*ph\n", ++ (int)sizeof(buf->kernel_address), ++ buf->kernel_address); ++ goto out; ++ } ++ ++ STR_NULL_TERMINATE(buf->kernel_length); ++ if (kstrtouint(buf->kernel_length, 10, &kernellen)) { ++ pr_err("invalid kernel length: %*ph\n", ++ (int)sizeof(buf->kernel_length), ++ buf->kernel_length); ++ goto out; ++ } ++ ++ STR_NULL_TERMINATE(buf->total_length); ++ if (kstrtouint(buf->total_length, 10, &totallen)) { ++ pr_err("invalid total length: %*ph\n", ++ (int)sizeof(buf->total_length), ++ buf->total_length); ++ goto out; ++ } ++ ++ /* ++ * Addresses are flash absolute, so convert to partition ++ * relative addresses. Assume either kernel or rootfs will ++ * directly follow the image tag. ++ */ ++ if (rootfsaddr < kerneladdr) ++ offset = rootfsaddr - sizeof(struct bcm_tag); ++ else ++ offset = kerneladdr - sizeof(struct bcm_tag); ++ ++ kerneladdr = kerneladdr - offset; ++ rootfsaddr = rootfsaddr - offset; ++ spareaddr = roundup(totallen, master->erasesize); ++ ++ if (rootfsaddr < kerneladdr) { ++ /* default Broadcom layout */ ++ rootfslen = kerneladdr - rootfsaddr; ++ rootfs_first = true; ++ } else { ++ /* OpenWrt layout */ ++ rootfsaddr = kerneladdr + kernellen; ++ rootfslen = spareaddr - rootfsaddr; ++ } ++ } else { ++ goto out; ++ } ++ sparelen = master->size - spareaddr; ++ ++ /* Determine number of partitions */ ++ if (rootfslen > 0) ++ nrparts++; ++ ++ if (kernellen > 0) ++ nrparts++; ++ ++ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); ++ if (!parts) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ /* Start building partition list */ ++ if (kernellen > 0) { ++ int kernelpart = curpart; ++ ++ if (rootfslen > 0 && rootfs_first) ++ kernelpart++; ++ parts[kernelpart].name = "kernel"; ++ parts[kernelpart].offset = kerneladdr; ++ parts[kernelpart].size = kernellen; ++ curpart++; ++ } ++ ++ if (rootfslen > 0) { ++ int rootfspart = curpart; ++ ++ if (kernellen > 0 && rootfs_first) ++ rootfspart--; ++ parts[rootfspart].name = "rootfs"; ++ parts[rootfspart].offset = rootfsaddr; ++ parts[rootfspart].size = rootfslen; ++ if (sparelen > 0 && !rootfs_first) ++ parts[rootfspart].size += sparelen; ++ curpart++; ++ } ++ ++ for (i = 0; i < nrparts; i++) ++ pr_info("Partition %d is %s offset %llx and length %llx\n", i, ++ parts[i].name, parts[i].offset, parts[i].size); ++ ++ pr_info("Spare partition is offset %x and length %x\n", spareaddr, ++ sparelen); ++ ++ *pparts = parts; ++ ret = 0; ++ ++out: ++ vfree(buf); ++ ++ if (ret) ++ return ret; ++ ++ return nrparts; ++} ++ ++static struct mtd_part_parser bcm963xx_imagetag_parser = { ++ .parse_fn = bcm963xx_parse_imagetag_partitions, ++ .name = "bcm963xx-imagetag", ++}; ++module_mtd_part_parser(bcm963xx_imagetag_parser); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Daniel Dickinson "); ++MODULE_AUTHOR("Florian Fainelli "); ++MODULE_AUTHOR("Mike Albon "); ++MODULE_AUTHOR("Jonas Gorski +Date: Wed, 28 Jun 2017 18:34:42 +0200 +Subject: [PATCH 1/2] mtd: bcm63xxpart: add of_match_table + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/bcm63xxpart.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/mtd/bcm63xxpart.c ++++ b/drivers/mtd/bcm63xxpart.c +@@ -34,6 +34,7 @@ + #include + #include + #include ++#include + + #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */ + +@@ -172,9 +173,16 @@ out: + return ret; + }; + ++static const struct of_device_id parse_bcm63xx_cfe_match_table[] = { ++ { .compatible = "brcm,bcm963xx-cfe-nor-partitions" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, parse_bcm63xx_cfe_match_table); ++ + static struct mtd_part_parser bcm63xx_cfe_parser = { + .parse_fn = bcm63xx_parse_cfe_partitions, + .name = "bcm63xxpart", ++ .of_match_table = parse_bcm63xx_cfe_match_table, + }; + module_mtd_part_parser(bcm63xx_cfe_parser); + diff --git a/target/linux/brcm63xx/patches-4.14/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch b/target/linux/brcm63xx/patches-4.14/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch new file mode 100644 index 000000000..04978b374 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch @@ -0,0 +1,37 @@ +From 3303dd9f5b197cc2efd9cbd7b9b45fc1e510a393 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 28 Jun 2017 18:37:12 +0200 +Subject: [PATCH 2/2] mtd: parser_bcm63xx_imagetag: add of_match_table support + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/parsers/parser_imagetag.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/mtd/parsers/parser_imagetag.c ++++ b/drivers/mtd/parsers/parser_imagetag.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + + /* Ensure strings read from flash structs are null terminated */ + #define STR_NULL_TERMINATE(x) \ +@@ -200,9 +201,16 @@ out: + return nrparts; + } + ++static const struct of_device_id parse_bcm963xx_imagetag_match_table[] = { ++ { .compatible = "brcm,bcm963xx-imagetag" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, parse_bcm963xx_imagetag_match_table); ++ + static struct mtd_part_parser bcm963xx_imagetag_parser = { + .parse_fn = bcm963xx_parse_imagetag_partitions, + .name = "bcm963xx-imagetag", ++ .of_match_table = parse_bcm963xx_imagetag_match_table, + }; + module_mtd_part_parser(bcm963xx_imagetag_parser); + diff --git a/target/linux/brcm63xx/patches-4.14/130-pinctrl-add-bcm63xx-base-code.patch b/target/linux/brcm63xx/patches-4.14/130-pinctrl-add-bcm63xx-base-code.patch new file mode 100644 index 000000000..53e89324c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/130-pinctrl-add-bcm63xx-base-code.patch @@ -0,0 +1,226 @@ +From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:07:42 +0200 +Subject: [PATCH 01/13] pinctrl: add bcm63xx base code + +Setup directory and add a helper for bcm63xx pinctrl support. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/Kconfig | 1 + + drivers/pinctrl/Makefile | 1 + + drivers/pinctrl/bcm63xx/Kconfig | 3 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++ + drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++ + 7 files changed, 163 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/Kconfig + create mode 100644 drivers/pinctrl/bcm63xx/Makefile + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h + +--- a/drivers/pinctrl/Kconfig ++++ b/drivers/pinctrl/Kconfig +@@ -351,6 +351,7 @@ config PINCTRL_RK805 + + source "drivers/pinctrl/aspeed/Kconfig" + source "drivers/pinctrl/bcm/Kconfig" ++source "drivers/pinctrl/bcm63xx/Kconfig" + source "drivers/pinctrl/berlin/Kconfig" + source "drivers/pinctrl/freescale/Kconfig" + source "drivers/pinctrl/intel/Kconfig" +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -48,6 +48,7 @@ obj-$(CONFIG_PINCTRL_RK805) += pinctrl-r + + obj-$(CONFIG_ARCH_ASPEED) += aspeed/ + obj-y += bcm/ ++obj-y += bcm63xx/ + obj-$(CONFIG_PINCTRL_BERLIN) += berlin/ + obj-y += freescale/ + obj-$(CONFIG_X86) += intel/ +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -0,0 +1,3 @@ ++config PINCTRL_BCM63XX ++ bool ++ select GPIO_GENERIC +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c +@@ -0,0 +1,155 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "pinctrl-bcm63xx.h" ++#include "../core.h" ++ ++#define BANK_SIZE sizeof(u32) ++#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE) ++ ++#ifdef CONFIG_OF ++static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc, ++ const struct of_phandle_args *gpiospec, ++ u32 *flags) ++{ ++ struct gpio_chip *base = gpiochip_get_data(gc); ++ int pin = gpiospec->args[0]; ++ ++ if (gc != &base[pin / PINS_PER_BANK]) ++ return -EINVAL; ++ ++ pin = pin % PINS_PER_BANK; ++ ++ if (pin >= gc->ngpio) ++ return -EINVAL; ++ ++ if (flags) ++ *flags = gpiospec->args[1]; ++ ++ return pin; ++} ++#endif ++ ++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ struct gpio_chip *base = gpiochip_get_data(chip); ++ char irq_name[7]; /* "gpioXX" */ ++ ++ /* FIXME: this is ugly */ ++ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base)); ++ return of_irq_get_byname(chip->of_node, irq_name); ++} ++ ++static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc, ++ void __iomem *dirout, void __iomem *data, ++ size_t sz, int ngpio) ++ ++{ ++ int banks, chips, i, ret = -EINVAL; ++ ++ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK); ++ banks = sz / BANK_SIZE; ++ ++ for (i = 0; i < chips; i++) { ++ int offset, pins; ++ int reg_offset; ++ char *label; ++ ++ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i); ++ if (!label) ++ return -ENOMEM; ++ ++ offset = i * PINS_PER_BANK; ++ pins = min_t(int, ngpio - offset, PINS_PER_BANK); ++ ++ /* the registers are treated like a huge big endian register */ ++ reg_offset = (banks - i - 1) * BANK_SIZE; ++ ++ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset, ++ NULL, NULL, dirout + reg_offset, NULL, ++ BGPIOF_BIG_ENDIAN_BYTE_ORDER); ++ if (ret) ++ return ret; ++ ++ gc[i].request = gpiochip_generic_request; ++ gc[i].free = gpiochip_generic_free; ++ ++ if (of_get_property(dev->of_node, "interrupt-names", NULL)) ++ gc[i].to_irq = bcm63xx_gpio_to_irq; ++ ++#ifdef CONFIG_OF ++ gc[i].of_gpio_n_cells = 2; ++ gc[i].of_xlate = bcm63xx_gpio_of_xlate; ++#endif ++ ++ gc[i].label = label; ++ gc[i].ngpio = pins; ++ ++ devm_gpiochip_add_data(dev, &gc[i], gc); ++ } ++ ++ return 0; ++} ++ ++static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name, ++ int ngpio) ++{ ++ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK); ++ ++ for (i = 0; i < chips; i++) { ++ int offset, pins; ++ ++ offset = i * PINS_PER_BANK; ++ pins = min_t(int, ngpio - offset, PINS_PER_BANK); ++ ++ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins); ++ } ++} ++ ++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev, ++ struct pinctrl_desc *desc, ++ void *priv, struct gpio_chip *gc, ++ int ngpio) ++{ ++ struct pinctrl_dev *pctldev; ++ struct resource *res; ++ void __iomem *dirout, *data; ++ size_t sz; ++ int ret; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout"); ++ dirout = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(dirout)) ++ return ERR_CAST(dirout); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); ++ data = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(data)) ++ return ERR_CAST(data); ++ ++ sz = resource_size(res); ++ ++ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio); ++ if (ret) ++ return ERR_PTR(ret); ++ ++ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv); ++ if (IS_ERR(pctldev)) ++ return pctldev; ++ ++ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio); ++ ++ dev_info(&pdev->dev, "registered at mmio %p\n", dirout); ++ ++ return pctldev; ++} +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h +@@ -0,0 +1,14 @@ ++#ifndef __PINCTRL_BCM63XX ++#define __PINCTRL_BCM63XX ++ ++#include ++#include ++#include ++#include ++ ++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev, ++ struct pinctrl_desc *desc, ++ void *priv, struct gpio_chip *gc, ++ int ngpio); ++ ++#endif diff --git a/target/linux/brcm63xx/patches-4.14/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.14/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch new file mode 100644 index 000000000..3a2a7811d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch @@ -0,0 +1,78 @@ +From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:33:56 +0200 +Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6328 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt | 61 ++++++++++++++++++++++ + 1 file changed, 61 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt +@@ -0,0 +1,61 @@ ++* Broadcom BCM6328 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6328-pinctrl". ++- reg: Register specifies of dirout, dat, mode, mux registers. ++- reg-names: Must be "dirout", "dat", "mode", "mux". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2> ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6328-pinctrl"; ++ reg = <0x10000080 0x8>, ++ <0x10000088 0x8>, ++ <0x10000098 0x4>, ++ <0x1000009c 0xc>; ++ reg-names = "dirout", "dat", "mode", "mux"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led ++gpio1 1 led ++gpio2 2 led ++gpio3 3 led ++gpio4 4 led ++gpio5 5 led ++gpio6 6 led, serial_led_data ++gpio7 7 led, serial_led_clk ++gpio8 8 led ++gpio9 9 led ++gpio10 10 led ++gpio11 11 led ++gpio12 12 led ++gpio13 13 led ++gpio14 14 led ++gpio15 15 led ++gpio16 16 led, pcie_clkreq ++gpio17 17 led ++gpio18 18 led ++gpio19 19 led ++gpio20 20 led ++gpio21 21 led ++gpio22 22 led ++gpio23 23 led ++gpio24 24 - ++gpio25 25 ephy0_act_led ++gpio26 26 ephy1_act_led ++gpio27 27 ephy2_act_led ++gpio28 28 ephy3_act_led ++gpio29 29 - ++gpio30 30 - ++gpio31 31 - ++hsspi_cs1 - hsspi_cs1 ++usb_port1 - usb_host_port, usb_device_port diff --git a/target/linux/brcm63xx/patches-4.14/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch b/target/linux/brcm63xx/patches-4.14/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch new file mode 100644 index 000000000..3c5f15b91 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch @@ -0,0 +1,495 @@ +From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:12:50 +0200 +Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328 + +Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as +GPIOs, as LEDs for the integrated LED controller, or various other +functions. Its pincontrol mux registers also control other aspects, like +switching the second USB port between host and device mode. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++ + 3 files changed, 464 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -1,3 +1,10 @@ + config PINCTRL_BCM63XX + bool + select GPIO_GENERIC ++ ++config PINCTRL_BCM6328 ++ bool "BCM6328 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1 +1,2 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o ++obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c +@@ -0,0 +1,456 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6328_MUX_LO_REG 0x4 ++#define BCM6328_MUX_HI_REG 0x0 ++#define BCM6328_MUX_OTHER_REG 0x8 ++ ++#define BCM6328_NGPIO 32 ++ ++struct bcm6328_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6328_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ unsigned mode_val:1; ++ unsigned mux_val:2; ++}; ++ ++struct bcm6328_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ void __iomem *mux[3]; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio; ++}; ++ ++static const struct pinctrl_pin_desc bcm6328_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ PINCTRL_PIN(8, "gpio8"), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ PINCTRL_PIN(12, "gpio12"), ++ PINCTRL_PIN(13, "gpio13"), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ PINCTRL_PIN(27, "gpio27"), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ PINCTRL_PIN(30, "gpio30"), ++ PINCTRL_PIN(31, "gpio31"), ++ ++ /* ++ * No idea where they really are; so let's put them according ++ * to their mux offsets. ++ */ ++ PINCTRL_PIN(36, "hsspi_cs1"), ++ PINCTRL_PIN(38, "usb_p2"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++ ++static unsigned hsspi_cs1_pins[] = { 36 }; ++static unsigned usb_port1_pins[] = { 38 }; ++ ++#define BCM6328_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6328_pingroup bcm6328_groups[] = { ++ BCM6328_GROUP(gpio0), ++ BCM6328_GROUP(gpio1), ++ BCM6328_GROUP(gpio2), ++ BCM6328_GROUP(gpio3), ++ BCM6328_GROUP(gpio4), ++ BCM6328_GROUP(gpio5), ++ BCM6328_GROUP(gpio6), ++ BCM6328_GROUP(gpio7), ++ BCM6328_GROUP(gpio8), ++ BCM6328_GROUP(gpio9), ++ BCM6328_GROUP(gpio10), ++ BCM6328_GROUP(gpio11), ++ BCM6328_GROUP(gpio12), ++ BCM6328_GROUP(gpio13), ++ BCM6328_GROUP(gpio14), ++ BCM6328_GROUP(gpio15), ++ BCM6328_GROUP(gpio16), ++ BCM6328_GROUP(gpio17), ++ BCM6328_GROUP(gpio18), ++ BCM6328_GROUP(gpio19), ++ BCM6328_GROUP(gpio20), ++ BCM6328_GROUP(gpio21), ++ BCM6328_GROUP(gpio22), ++ BCM6328_GROUP(gpio23), ++ BCM6328_GROUP(gpio24), ++ BCM6328_GROUP(gpio25), ++ BCM6328_GROUP(gpio26), ++ BCM6328_GROUP(gpio27), ++ BCM6328_GROUP(gpio28), ++ BCM6328_GROUP(gpio29), ++ BCM6328_GROUP(gpio30), ++ BCM6328_GROUP(gpio31), ++ ++ BCM6328_GROUP(hsspi_cs1), ++ BCM6328_GROUP(usb_port1), ++}; ++ ++/* GPIO_MODE */ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++/* PINMUX_SEL */ ++static const char * const serial_led_data_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const inet_act_led_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const pcie_clkreq_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const ephy0_act_led_groups[] = { ++ "gpio25", ++}; ++ ++static const char * const ephy1_act_led_groups[] = { ++ "gpio26", ++}; ++ ++static const char * const ephy2_act_led_groups[] = { ++ "gpio27", ++}; ++ ++static const char * const ephy3_act_led_groups[] = { ++ "gpio28", ++}; ++ ++static const char * const hsspi_cs1_groups[] = { ++ "hsspi_cs1" ++}; ++ ++static const char * const usb_host_port_groups[] = { ++ "usb_port1", ++}; ++ ++static const char * const usb_device_port_groups[] = { ++ "usb_port1", ++}; ++ ++#define BCM6328_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mode_val = 1, \ ++ } ++ ++#define BCM6328_MUX_FUN(n, mux) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mux_val = mux, \ ++ } ++ ++static const struct bcm6328_function bcm6328_funcs[] = { ++ BCM6328_MODE_FUN(led), ++ BCM6328_MUX_FUN(serial_led_data, 2), ++ BCM6328_MUX_FUN(serial_led_clk, 2), ++ BCM6328_MUX_FUN(inet_act_led, 1), ++ BCM6328_MUX_FUN(pcie_clkreq, 2), ++ BCM6328_MUX_FUN(ephy0_act_led, 1), ++ BCM6328_MUX_FUN(ephy1_act_led, 1), ++ BCM6328_MUX_FUN(ephy2_act_led, 1), ++ BCM6328_MUX_FUN(ephy3_act_led, 1), ++ BCM6328_MUX_FUN(hsspi_cs1, 2), ++ BCM6328_MUX_FUN(usb_host_port, 1), ++ BCM6328_MUX_FUN(usb_device_port, 2), ++}; ++ ++static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6328_groups); ++} ++ ++static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6328_groups[group].name; ++} ++ ++static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6328_groups[group].pins; ++ *num_pins = bcm6328_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6328_funcs); ++} ++ ++static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6328_funcs[selector].name; ++} ++ ++static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6328_funcs[selector].groups; ++ *num_groups = bcm6328_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin, ++ u32 mode, u32 mux) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ if (pin < 32) { ++ reg = __raw_readl(pctl->mode); ++ reg &= ~BIT(pin); ++ if (mode) ++ reg |= BIT(pin); ++ __raw_writel(reg, pctl->mode); ++ } ++ ++ reg = __raw_readl(pctl->mux[pin / 16]); ++ reg &= ~(3UL << ((pin % 16) * 2)); ++ reg |= mux << ((pin % 16) * 2); ++ __raw_writel(reg, pctl->mux[pin / 16]); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6328_pingroup *grp = &bcm6328_groups[group]; ++ const struct bcm6328_function *f = &bcm6328_funcs[selector]; ++ ++ bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val); ++ ++ return 0; ++} ++ ++static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ bcm6328_rmw_mux(pctl, offset, 0, 0); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6328_pctl_ops = { ++ .get_groups_count = bcm6328_pinctrl_get_group_count, ++ .get_group_name = bcm6328_pinctrl_get_group_name, ++ .get_group_pins = bcm6328_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6328_pmx_ops = { ++ .get_functions_count = bcm6328_pinctrl_get_func_count, ++ .get_function_name = bcm6328_pinctrl_get_func_name, ++ .get_function_groups = bcm6328_pinctrl_get_groups, ++ .set_mux = bcm6328_pinctrl_set_mux, ++ .gpio_request_enable = bcm6328_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6328_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6328_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode, *mux; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux"); ++ mux = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mux)) ++ return PTR_ERR(mux); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ pctl->mux[0] = mux + BCM6328_MUX_LO_REG; ++ pctl->mux[1] = mux + BCM6328_MUX_HI_REG; ++ pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG; ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6328_pctl_ops; ++ pctl->desc.pmxops = &bcm6328_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6328_pins); ++ pctl->desc.pins = bcm6328_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ &pctl->gpio, BCM6328_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6328_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6328-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6328_pinctrl_driver = { ++ .probe = bcm6328_pinctrl_probe, ++ .driver = { ++ .name = "bcm6328-pinctrl", ++ .of_match_table = bcm6328_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6328_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.14/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.14/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch new file mode 100644 index 000000000..6bac90373 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch @@ -0,0 +1,49 @@ +From 962c46bf7f43df730e2d3698930e77958cc6b191 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:35:45 +0200 +Subject: [PATCH 04/16] Documentation: add BCM6348 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6348 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt | 32 ++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt +@@ -0,0 +1,32 @@ ++* Broadcom BCM6348 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6348-pinctrl". ++- reg: register Specifiers of dirout, dat, mode registers. ++- reg-names: Must be "dirout", "dat", "mode". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@fffe0080 { ++ compatible = "brcm,bcm6348-pinctrl"; ++ reg = <0xfffe0080 0x8>, ++ <0xfffe0088 0x8>, ++ <0xfffe0098 0x4>; ++ reg-names = "dirout", "dat", "mode"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++group0 32-36 ext_mii, utopia, diag ++group1 22-31 ext_ephy, mii_snoop, mii_pccard, ++ spi_master_uart, utopia, diag ++group2 16-21 pci, diag ++group3 8-15 ext_mii, utopia ++group4 0-7 ext_ephy, mii_snoop, legacy_led, diag diff --git a/target/linux/brcm63xx/patches-4.14/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch b/target/linux/brcm63xx/patches-4.14/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch new file mode 100644 index 000000000..19b807586 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch @@ -0,0 +1,432 @@ +From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:14:13 +0200 +Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348 + +Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of +up to ten gpios into fourteen potential functions. It does not allow +muxing individual pins. Some functions require more than one group to be +muxed to the same function. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 392 ++++++++++++++++++++++++++++++ + 3 files changed, 400 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -8,3 +8,10 @@ config PINCTRL_BCM6328 + select PINCONF + select PINCTRL_BCM63XX + select GENERIC_PINCONF ++ ++config PINCTRL_BCM6348 ++ bool "BCM6348 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1,2 +1,3 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o ++obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c +@@ -0,0 +1,392 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6348_NGPIO 37 ++ ++#define MAX_GROUP 4 ++#define PINS_PER_GROUP 8 ++#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP)) ++#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4) ++#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin)) ++ ++struct bcm6348_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6348_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ unsigned int value; ++}; ++ ++struct bcm6348_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6348_PIN(a, b, group) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(group), \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6348_pins[] = { ++ BCM6348_PIN(0, "gpio0", 4), ++ BCM6348_PIN(1, "gpio1", 4), ++ BCM6348_PIN(2, "gpio2", 4), ++ BCM6348_PIN(3, "gpio3", 4), ++ BCM6348_PIN(4, "gpio4", 4), ++ BCM6348_PIN(5, "gpio5", 4), ++ BCM6348_PIN(6, "gpio6", 4), ++ BCM6348_PIN(7, "gpio7", 4), ++ BCM6348_PIN(8, "gpio8", 3), ++ BCM6348_PIN(9, "gpio9", 3), ++ BCM6348_PIN(10, "gpio10", 3), ++ BCM6348_PIN(11, "gpio11", 3), ++ BCM6348_PIN(12, "gpio12", 3), ++ BCM6348_PIN(13, "gpio13", 3), ++ BCM6348_PIN(14, "gpio14", 3), ++ BCM6348_PIN(15, "gpio15", 3), ++ BCM6348_PIN(16, "gpio16", 2), ++ BCM6348_PIN(17, "gpio17", 2), ++ BCM6348_PIN(18, "gpio18", 2), ++ BCM6348_PIN(19, "gpio19", 2), ++ BCM6348_PIN(20, "gpio20", 2), ++ BCM6348_PIN(21, "gpio21", 2), ++ BCM6348_PIN(22, "gpio22", 1), ++ BCM6348_PIN(23, "gpio23", 1), ++ BCM6348_PIN(24, "gpio24", 1), ++ BCM6348_PIN(25, "gpio25", 1), ++ BCM6348_PIN(26, "gpio26", 1), ++ BCM6348_PIN(27, "gpio27", 1), ++ BCM6348_PIN(28, "gpio28", 1), ++ BCM6348_PIN(29, "gpio29", 1), ++ BCM6348_PIN(30, "gpio30", 1), ++ BCM6348_PIN(31, "gpio31", 1), ++ BCM6348_PIN(32, "gpio32", 0), ++ BCM6348_PIN(33, "gpio33", 0), ++ BCM6348_PIN(34, "gpio34", 0), ++ BCM6348_PIN(35, "gpio35", 0), ++ BCM6348_PIN(36, "gpio36", 0), ++}; ++ ++enum bcm6348_muxes { ++ BCM6348_MUX_GPIO = 0, ++ BCM6348_MUX_EXT_EPHY, ++ BCM6348_MUX_MII_SNOOP, ++ BCM6348_MUX_LEGACY_LED, ++ BCM6348_MUX_MII_PCCARD, ++ BCM6348_MUX_PCI, ++ BCM6348_MUX_SPI_MASTER_UART, ++ BCM6348_MUX_EXT_MII, ++ BCM6348_MUX_UTOPIA, ++ BCM6348_MUX_DIAG, ++}; ++ ++static unsigned group0_pins[] = { ++ 32, 33, 34, 35, 36, ++}; ++ ++static unsigned group1_pins[] = { ++ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, ++}; ++ ++static unsigned group2_pins[] = { ++ 16, 17, 18, 19, 20, 21, ++}; ++ ++static unsigned group3_pins[] = { ++ 8, 9, 10, 11, 12, 13, 14, 15, ++}; ++ ++static unsigned group4_pins[] = { ++ 0, 1, 2, 3, 4, 5, 6, 7, ++}; ++ ++#define BCM6348_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } \ ++ ++static struct bcm6348_pingroup bcm6348_groups[] = { ++ BCM6348_GROUP(group0), ++ BCM6348_GROUP(group1), ++ BCM6348_GROUP(group2), ++ BCM6348_GROUP(group3), ++ BCM6348_GROUP(group4), ++}; ++ ++static const char * const ext_mii_groups[] = { ++ "group0", ++ "group3", ++}; ++ ++static const char * const ext_ephy_groups[] = { ++ "group1", ++ "group4" ++}; ++ ++static const char * const mii_snoop_groups[] = { ++ "group1", ++ "group4", ++}; ++ ++static const char * const legacy_led_groups[] = { ++ "group4", ++}; ++ ++static const char * const mii_pccard_groups[] = { ++ "group1", ++}; ++ ++static const char * const pci_groups[] = { ++ "group2", ++}; ++ ++static const char * const spi_master_uart_groups[] = { ++ "group1", ++}; ++ ++static const char * const utopia_groups[] = { ++ "group0", ++ "group1", ++ "group3", ++}; ++ ++static const char * const diag_groups[] = { ++ "group0", ++ "group1", ++ "group2", ++ "group4", ++}; ++ ++#define BCM6348_FUN(n, f) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .value = BCM6348_MUX_##f, \ ++ } ++ ++static const struct bcm6348_function bcm6348_funcs[] = { ++ BCM6348_FUN(ext_mii, EXT_MII), ++ BCM6348_FUN(ext_ephy, EXT_EPHY), ++ BCM6348_FUN(mii_snoop, MII_SNOOP), ++ BCM6348_FUN(legacy_led, LEGACY_LED), ++ BCM6348_FUN(mii_pccard, MII_PCCARD), ++ BCM6348_FUN(pci, PCI), ++ BCM6348_FUN(spi_master_uart, SPI_MASTER_UART), ++ BCM6348_FUN(utopia, UTOPIA), ++ BCM6348_FUN(diag, DIAG), ++}; ++ ++static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6348_groups); ++} ++ ++static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6348_groups[group].name; ++} ++ ++static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6348_groups[group].pins; ++ *num_pins = bcm6348_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6348_funcs); ++} ++ ++static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6348_funcs[selector].name; ++} ++ ++static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6348_funcs[selector].groups; ++ *num_groups = bcm6348_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ ++ reg = __raw_readl(pctl->mode); ++ reg &= ~mask; ++ reg |= val & mask; ++ __raw_writel(reg, pctl->mode); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6348_pingroup *grp = &bcm6348_groups[group]; ++ const struct bcm6348_function *f = &bcm6348_funcs[selector]; ++ u32 group_num, mask, val; ++ ++ /* ++ * pins n..(n+7) share the same group, so we only need to look at ++ * the first pin. ++ */ ++ group_num = (unsigned long)bcm6348_pins[grp->pins[0]].drv_data; ++ mask = GROUP_MASK(group_num); ++ val = f->value << GROUP_SHIFT(group_num); ++ ++ bcm6348_rmw_mux(pctl, mask, val); ++ ++ return 0; ++} ++ ++static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ struct pin_desc *desc; ++ u32 mask; ++ ++ /* don't reconfigure if already muxed */ ++ desc = pin_desc_get(pctldev, offset); ++ if (desc->mux_usecount) ++ return 0; ++ ++ mask = GROUP_MASK(offset); ++ ++ /* disable all functions using this pin */ ++ bcm6348_rmw_mux(pctl, mask, 0); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6348_pctl_ops = { ++ .get_groups_count = bcm6348_pinctrl_get_group_count, ++ .get_group_name = bcm6348_pinctrl_get_group_name, ++ .get_group_pins = bcm6348_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6348_pmx_ops = { ++ .get_functions_count = bcm6348_pinctrl_get_func_count, ++ .get_function_name = bcm6348_pinctrl_get_func_name, ++ .get_function_groups = bcm6348_pinctrl_get_groups, ++ .set_mux = bcm6348_pinctrl_set_mux, ++ .gpio_request_enable = bcm6348_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6348_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6348_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ ++ /* disable all muxes by default */ ++ __raw_writel(0, pctl->mode); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6348_pctl_ops; ++ pctl->desc.pmxops = &bcm6348_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6348_pins); ++ pctl->desc.pins = bcm6348_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6348_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6348_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6348-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6348_pinctrl_driver = { ++ .probe = bcm6348_pinctrl_probe, ++ .driver = { ++ .name = "bcm6348-pinctrl", ++ .of_match_table = bcm6348_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6348_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.14/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.14/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch new file mode 100644 index 000000000..e8a747991 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch @@ -0,0 +1,61 @@ +From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:36:00 +0200 +Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6358 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++ + 1 file changed, 44 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt +@@ -0,0 +1,44 @@ ++* Broadcom BCM6358 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6358-pinctrl". ++- reg: Register specifiers of dirout, dat registers. ++- reg-names: Must be "dirout", "dat". ++- brcm,gpiomode: Phandle to the shared gpiomode register. ++- gpio-controller: Identifies this node as a gpio-controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@fffe0080 { ++ compatible = "brcm,bcm6358-pinctrl"; ++ reg = <0xfffe0080 0x8>, ++ <0xfffe0088 0x8>, ++ <0xfffe0098 0x4>; ++ reg-names = "dirout", "dat"; ++ brcm,gpiomode = <&gpiomode>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++gpiomode: syscon@fffe0098 { ++ compatible = "brcm,bcm6358-gpiomode", "syscon"; ++ reg = <0xfffe0098 0x4>; ++ native-endian; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++ebi_cs_grp 30-31 ebi_cs ++uart1_grp 28-31 uart1 ++spi_cs_grp 32-33 spi_cs ++async_modem_grp 12-15 async_modem ++legacy_led_grp 9-15 legacy_led ++serial_led_grp 6-7 serial_led ++led_grp 0-3 led ++utopia_grp 12-15, 22-31 utopia ++pwm_syn_clk_grp 8 pwm_syn_clk ++sys_irq_grp 5 sys_irq diff --git a/target/linux/brcm63xx/patches-4.14/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch b/target/linux/brcm63xx/patches-4.14/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch new file mode 100644 index 000000000..87dc741e2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch @@ -0,0 +1,436 @@ +From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:16:01 +0200 +Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358 + +Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different +functions onto the GPIO pins. It does not support configuring individual +pins but only whole groups. These groups may overlap, and still require +the directions to be set correctly in the GPIO register. In addition the +functions register controls other, not directly mux related functions. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 8 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++ + 3 files changed, 402 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -15,3 +15,11 @@ config PINCTRL_BCM6348 + select PINCONF + select PINCTRL_BCM63XX + select GENERIC_PINCONF ++ ++config PINCTRL_BCM6358 ++ bool "BCM6358 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF ++ select MFD_SYSCON +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1,3 +1,4 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o ++obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c +@@ -0,0 +1,393 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++/* GPIO_MODE register */ ++#define BCM6358_MODE_MUX_NONE 0 ++ ++/* overlays on gpio pins */ ++#define BCM6358_MODE_MUX_EBI_CS BIT(5) ++#define BCM6358_MODE_MUX_UART1 BIT(6) ++#define BCM6358_MODE_MUX_SPI_CS BIT(7) ++#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8) ++#define BCM6358_MODE_MUX_LEGACY_LED BIT(9) ++#define BCM6358_MODE_MUX_SERIAL_LED BIT(10) ++#define BCM6358_MODE_MUX_LED BIT(11) ++#define BCM6358_MODE_MUX_UTOPIA BIT(12) ++#define BCM6358_MODE_MUX_CLKRST BIT(13) ++#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14) ++#define BCM6358_MODE_MUX_SYS_IRQ BIT(15) ++ ++#define BCM6358_NGPIO 40 ++ ++struct bcm6358_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++ ++ const u16 mode_val; ++ ++ /* non-GPIO function muxes require the gpio direction to be set */ ++ const u16 direction; ++}; ++ ++struct bcm6358_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++}; ++ ++struct bcm6358_pinctrl { ++ struct device *dev; ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ struct regmap_field *overlays; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \ ++ BCM6358_MODE_MUX_##bit2 | \ ++ BCM6358_MODE_MUX_##bit3), \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6358_pins[] = { ++ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE), ++ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE), ++ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE), ++ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE), ++ PINCTRL_PIN(4, "gpio4"), ++ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE), ++ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE), ++ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE), ++ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE), ++ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS), ++ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS), ++ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE), ++ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++}; ++ ++static unsigned ebi_cs_grp_pins[] = { 30, 31 }; ++ ++static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 }; ++ ++static unsigned spi_cs_grp_pins[] = { 32, 33 }; ++ ++static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 }; ++ ++static unsigned serial_led_grp_pins[] = { 6, 7 }; ++ ++static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 }; ++ ++static unsigned led_grp_pins[] = { 0, 1, 2, 3 }; ++ ++static unsigned utopia_grp_pins[] = { ++ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, ++}; ++ ++static unsigned pwm_syn_clk_grp_pins[] = { 8 }; ++ ++static unsigned sys_irq_grp_pins[] = { 5 }; ++ ++#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ .mode_val = BCM6358_MODE_MUX_##bit, \ ++ .direction = dir, \ ++ } ++ ++static const struct bcm6358_pingroup bcm6358_groups[] = { ++ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3), ++ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2), ++ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6), ++ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6), ++ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f), ++ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3), ++ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf), ++ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f), ++ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1), ++ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1), ++}; ++ ++static const char * const ebi_cs_groups[] = { ++ "ebi_cs_grp" ++}; ++ ++static const char * const uart1_groups[] = { ++ "uart1_grp" ++}; ++ ++static const char * const spi_cs_2_3_groups[] = { ++ "spi_cs_2_3_grp" ++}; ++ ++static const char * const async_modem_groups[] = { ++ "async_modem_grp" ++}; ++ ++static const char * const legacy_led_groups[] = { ++ "legacy_led_grp", ++}; ++ ++static const char * const serial_led_groups[] = { ++ "serial_led_grp", ++}; ++ ++static const char * const led_groups[] = { ++ "led_grp", ++}; ++ ++static const char * const clkrst_groups[] = { ++ "clkrst_grp", ++}; ++ ++static const char * const pwm_syn_clk_groups[] = { ++ "pwm_syn_clk_grp", ++}; ++ ++static const char * const sys_irq_groups[] = { ++ "sys_irq_grp", ++}; ++ ++#define BCM6358_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ } ++ ++static const struct bcm6358_function bcm6358_funcs[] = { ++ BCM6358_FUN(ebi_cs), ++ BCM6358_FUN(uart1), ++ BCM6358_FUN(spi_cs_2_3), ++ BCM6358_FUN(async_modem), ++ BCM6358_FUN(legacy_led), ++ BCM6358_FUN(serial_led), ++ BCM6358_FUN(led), ++ BCM6358_FUN(clkrst), ++ BCM6358_FUN(pwm_syn_clk), ++ BCM6358_FUN(sys_irq), ++}; ++ ++static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6358_groups); ++} ++ ++static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6358_groups[group].name; ++} ++ ++static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6358_groups[group].pins; ++ *num_pins = bcm6358_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6358_funcs); ++} ++ ++static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6358_funcs[selector].name; ++} ++ ++static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6358_funcs[selector].groups; ++ *num_groups = bcm6358_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6358_pingroup *grp = &bcm6358_groups[group]; ++ u32 val = grp->mode_val; ++ u32 mask = val; ++ unsigned pin; ++ ++ for (pin = 0; pin < grp->num_pins; pin++) ++ mask |= (unsigned long)bcm6358_pins[pin].drv_data; ++ ++ regmap_field_update_bits(pctl->overlays, mask, val); ++ ++ for (pin = 0; pin < grp->num_pins; pin++) { ++ int hw_gpio = bcm6358_pins[pin].number; ++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32]; ++ ++ if (grp->direction & BIT(pin)) ++ gc->direction_output(gc, hw_gpio % 32, 0); ++ else ++ gc->direction_input(gc, hw_gpio % 32); ++ } ++ ++ return 0; ++} ++ ++static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ u32 mask; ++ ++ mask = (unsigned long)bcm6358_pins[offset].drv_data; ++ if (!mask) ++ return 0; ++ ++ /* disable all functions using this pin */ ++ return regmap_field_update_bits(pctl->overlays, mask, 0); ++} ++ ++static struct pinctrl_ops bcm6358_pctl_ops = { ++ .get_groups_count = bcm6358_pinctrl_get_group_count, ++ .get_group_name = bcm6358_pinctrl_get_group_name, ++ .get_group_pins = bcm6358_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6358_pmx_ops = { ++ .get_functions_count = bcm6358_pinctrl_get_func_count, ++ .get_function_name = bcm6358_pinctrl_get_func_name, ++ .get_function_groups = bcm6358_pinctrl_get_groups, ++ .set_mux = bcm6358_pinctrl_set_mux, ++ .gpio_request_enable = bcm6358_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6358_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6358_pinctrl *pctl; ++ struct regmap *mode; ++ struct reg_field overlays = REG_FIELD(0, 0, 15); ++ ++ if (pdev->dev.of_node) ++ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, ++ "brcm,gpiomode"); ++ else ++ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098"); ++ ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays); ++ if (IS_ERR(pctl->overlays)) ++ return PTR_ERR(pctl->overlays); ++ ++ /* disable all muxes by default */ ++ regmap_field_write(pctl->overlays, 0); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6358_pctl_ops; ++ pctl->desc.pmxops = &bcm6358_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins); ++ pctl->desc.pins = bcm6358_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6358_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6358_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6358-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6358_pinctrl_driver = { ++ .probe = bcm6358_pinctrl_probe, ++ .driver = { ++ .name = "bcm6358-pinctrl", ++ .of_match_table = bcm6358_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6358_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.14/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.14/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch new file mode 100644 index 000000000..9fc424cb4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch @@ -0,0 +1,96 @@ +From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:36:18 +0200 +Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6362 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt | 79 ++++++++++++++++++++++ + 1 file changed, 79 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt +@@ -0,0 +1,79 @@ ++* Broadcom BCM6362 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6362-pinctrl" ++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers. ++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6362-pinctrl"; ++ reg = <0x10000080 0x8>, ++ <0x10000088 0x8>, ++ <0x10000090 0x4>, ++ <0x10000098 0x4>, ++ <0x1000009c 0x4>, ++ <0x100000b8 0x4>; ++ reg-names = "dirout", "dat", "led", ++ "mode", "ctrl", "basemode"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led, usb_device_led ++gpio1 1 led, sys_irq ++gpio2 2 led, serial_led_clk ++gpio3 3 led, serial_led_data ++gpio4 4 led, robosw_led_data ++gpio5 5 led, robosw_led_clk ++gpio6 6 led, robosw_led0 ++gpio7 7 led, robosw_led1 ++gpio8 8 led, inet_led ++gpio9 9 led, spi_cs2 ++gpio10 10 led, spi_cs3 ++gpio11 11 led, ntr_pulse ++gpio12 12 led, uart1_scts ++gpio13 13 led, uart1_srts ++gpio14 14 led, uart1_sdin ++gpio15 15 led, uart1_sdout ++gpio16 16 led, adsl_spi_miso ++gpio17 17 led, adsl_spi_mosi ++gpio18 18 led, adsl_spi_clk ++gpio19 19 led, adsl_spi_cs ++gpio20 20 led, ephy0_led ++gpio21 21 led, ephy1_led ++gpio22 22 led, ephy2_led ++gpio23 23 led, ephy3_led ++gpio24 24 ext_irq0 ++gpio25 25 ext_irq1 ++gpio26 26 ext_irq2 ++gpio27 27 ext_irq3 ++gpio28 28 - ++gpio29 29 - ++gpio30 30 - ++gpio31 31 - ++gpio32 32 wifi ++gpio33 33 wifi ++gpio34 34 wifi ++gpio35 35 wifi ++gpio36 36 wifi ++gpio37 37 wifi ++gpio38 38 wifi ++gpio39 39 wifi ++gpio40 40 wifi ++gpio41 41 wifi ++gpio42 42 wifi ++gpio43 43 wifi ++gpio44 44 wifi ++gpio45 45 wifi ++gpio46 46 wifi ++gpio47 47 wifi ++nand_grp 8, 12-23, 27 nand diff --git a/target/linux/brcm63xx/patches-4.14/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch b/target/linux/brcm63xx/patches-4.14/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch new file mode 100644 index 000000000..726a97f24 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch @@ -0,0 +1,733 @@ +From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:17:20 +0200 +Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362 + +Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual +GPIO pins to the LED controller, to be available by the integrated +wifi, or other functions. It also supports overlay groups, of which +only NAND is documented. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++ + 3 files changed, 700 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -23,3 +23,10 @@ config PINCTRL_BCM6358 + select PINCTRL_BCM63XX + select GENERIC_PINCONF + select MFD_SYSCON ++ ++config PINCTRL_BCM6362 ++ bool "BCM6362 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o ++obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c +@@ -0,0 +1,692 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6362_NGPIO 48 ++ ++/* GPIO_BASEMODE register */ ++#define BASEMODE_NAND BIT(2) ++ ++enum bcm6362_pinctrl_reg { ++ BCM6362_LEDCTRL, ++ BCM6362_MODE, ++ BCM6362_CTRL, ++ BCM6362_BASEMODE, ++}; ++ ++struct bcm6362_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6362_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ enum bcm6362_pinctrl_reg reg; ++ u32 basemode_mask; ++}; ++ ++struct bcm6362_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *led; ++ void __iomem *mode; ++ void __iomem *ctrl; ++ void __iomem *basemode; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6362_PIN(a, b, mask) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(mask), \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6362_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ BCM6362_PIN(8, "gpio8", BASEMODE_NAND), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ BCM6362_PIN(12, "gpio12", BASEMODE_NAND), ++ BCM6362_PIN(13, "gpio13", BASEMODE_NAND), ++ BCM6362_PIN(14, "gpio14", BASEMODE_NAND), ++ BCM6362_PIN(15, "gpio15", BASEMODE_NAND), ++ BCM6362_PIN(16, "gpio16", BASEMODE_NAND), ++ BCM6362_PIN(17, "gpio17", BASEMODE_NAND), ++ BCM6362_PIN(18, "gpio18", BASEMODE_NAND), ++ BCM6362_PIN(19, "gpio19", BASEMODE_NAND), ++ BCM6362_PIN(20, "gpio20", BASEMODE_NAND), ++ BCM6362_PIN(21, "gpio21", BASEMODE_NAND), ++ BCM6362_PIN(22, "gpio22", BASEMODE_NAND), ++ BCM6362_PIN(23, "gpio23", BASEMODE_NAND), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ BCM6362_PIN(27, "gpio27", BASEMODE_NAND), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ PINCTRL_PIN(30, "gpio30"), ++ PINCTRL_PIN(31, "gpio31"), ++ PINCTRL_PIN(32, "gpio32"), ++ PINCTRL_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++ PINCTRL_PIN(40, "gpio40"), ++ PINCTRL_PIN(41, "gpio41"), ++ PINCTRL_PIN(42, "gpio42"), ++ PINCTRL_PIN(43, "gpio43"), ++ PINCTRL_PIN(44, "gpio44"), ++ PINCTRL_PIN(45, "gpio45"), ++ PINCTRL_PIN(46, "gpio46"), ++ PINCTRL_PIN(47, "gpio47"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned gpio32_pins[] = { 32 }; ++static unsigned gpio33_pins[] = { 33 }; ++static unsigned gpio34_pins[] = { 34 }; ++static unsigned gpio35_pins[] = { 35 }; ++static unsigned gpio36_pins[] = { 36 }; ++static unsigned gpio37_pins[] = { 37 }; ++static unsigned gpio38_pins[] = { 38 }; ++static unsigned gpio39_pins[] = { 39 }; ++static unsigned gpio40_pins[] = { 40 }; ++static unsigned gpio41_pins[] = { 41 }; ++static unsigned gpio42_pins[] = { 42 }; ++static unsigned gpio43_pins[] = { 43 }; ++static unsigned gpio44_pins[] = { 44 }; ++static unsigned gpio45_pins[] = { 45 }; ++static unsigned gpio46_pins[] = { 46 }; ++static unsigned gpio47_pins[] = { 47 }; ++ ++static unsigned nand_grp_pins[] = { ++ 8, 12, 13, 14, 15, 16, 17, ++ 18, 19, 20, 21, 22, 23, 27, ++}; ++ ++#define BCM6362_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6362_pingroup bcm6362_groups[] = { ++ BCM6362_GROUP(gpio0), ++ BCM6362_GROUP(gpio1), ++ BCM6362_GROUP(gpio2), ++ BCM6362_GROUP(gpio3), ++ BCM6362_GROUP(gpio4), ++ BCM6362_GROUP(gpio5), ++ BCM6362_GROUP(gpio6), ++ BCM6362_GROUP(gpio7), ++ BCM6362_GROUP(gpio8), ++ BCM6362_GROUP(gpio9), ++ BCM6362_GROUP(gpio10), ++ BCM6362_GROUP(gpio11), ++ BCM6362_GROUP(gpio12), ++ BCM6362_GROUP(gpio13), ++ BCM6362_GROUP(gpio14), ++ BCM6362_GROUP(gpio15), ++ BCM6362_GROUP(gpio16), ++ BCM6362_GROUP(gpio17), ++ BCM6362_GROUP(gpio18), ++ BCM6362_GROUP(gpio19), ++ BCM6362_GROUP(gpio20), ++ BCM6362_GROUP(gpio21), ++ BCM6362_GROUP(gpio22), ++ BCM6362_GROUP(gpio23), ++ BCM6362_GROUP(gpio24), ++ BCM6362_GROUP(gpio25), ++ BCM6362_GROUP(gpio26), ++ BCM6362_GROUP(gpio27), ++ BCM6362_GROUP(gpio28), ++ BCM6362_GROUP(gpio29), ++ BCM6362_GROUP(gpio30), ++ BCM6362_GROUP(gpio31), ++ BCM6362_GROUP(gpio32), ++ BCM6362_GROUP(gpio33), ++ BCM6362_GROUP(gpio34), ++ BCM6362_GROUP(gpio35), ++ BCM6362_GROUP(gpio36), ++ BCM6362_GROUP(gpio37), ++ BCM6362_GROUP(gpio38), ++ BCM6362_GROUP(gpio39), ++ BCM6362_GROUP(gpio40), ++ BCM6362_GROUP(gpio41), ++ BCM6362_GROUP(gpio42), ++ BCM6362_GROUP(gpio43), ++ BCM6362_GROUP(gpio44), ++ BCM6362_GROUP(gpio45), ++ BCM6362_GROUP(gpio46), ++ BCM6362_GROUP(gpio47), ++ BCM6362_GROUP(nand_grp), ++}; ++ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++static const char * const usb_device_led_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const sys_irq_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio2", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio3", ++}; ++ ++static const char * const robosw_led_data_groups[] = { ++ "gpio4", ++}; ++ ++static const char * const robosw_led_clk_groups[] = { ++ "gpio5", ++}; ++ ++static const char * const robosw_led0_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const robosw_led1_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const inet_led_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const spi_cs2_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const spi_cs3_groups[] = { ++ "gpio10", ++}; ++ ++static const char * const ntr_pulse_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const uart1_scts_groups[] = { ++ "gpio12", ++}; ++ ++static const char * const uart1_srts_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const uart1_sdin_groups[] = { ++ "gpio14", ++}; ++ ++static const char * const uart1_sdout_groups[] = { ++ "gpio15", ++}; ++ ++static const char * const adsl_spi_miso_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const adsl_spi_mosi_groups[] = { ++ "gpio17", ++}; ++ ++static const char * const adsl_spi_clk_groups[] = { ++ "gpio18", ++}; ++ ++static const char * const adsl_spi_cs_groups[] = { ++ "gpio19", ++}; ++ ++static const char * const ephy0_led_groups[] = { ++ "gpio20", ++}; ++ ++static const char * const ephy1_led_groups[] = { ++ "gpio21", ++}; ++ ++static const char * const ephy2_led_groups[] = { ++ "gpio22", ++}; ++ ++static const char * const ephy3_led_groups[] = { ++ "gpio23", ++}; ++ ++static const char * const ext_irq0_groups[] = { ++ "gpio24", ++}; ++ ++static const char * const ext_irq1_groups[] = { ++ "gpio25", ++}; ++ ++static const char * const ext_irq2_groups[] = { ++ "gpio26", ++}; ++ ++static const char * const ext_irq3_groups[] = { ++ "gpio27", ++}; ++ ++static const char * const wifi_groups[] = { ++ "gpio32", ++ "gpio33", ++ "gpio34", ++ "gpio35", ++ "gpio36", ++ "gpio37", ++ "gpio38", ++ "gpio39", ++ "gpio40", ++ "gpio41", ++ "gpio42", ++ "gpio43", ++ "gpio44", ++ "gpio45", ++ "gpio46", ++ "gpio47", ++}; ++ ++static const char * const nand_groups[] = { ++ "nand_grp", ++}; ++ ++#define BCM6362_LED_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_LEDCTRL, \ ++ } ++ ++#define BCM6362_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_MODE, \ ++ } ++ ++#define BCM6362_CTRL_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_CTRL, \ ++ } ++ ++#define BCM6362_BASEMODE_FUN(n, mask) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_BASEMODE, \ ++ .basemode_mask = (mask), \ ++ } ++ ++static const struct bcm6362_function bcm6362_funcs[] = { ++ BCM6362_LED_FUN(led), ++ BCM6362_MODE_FUN(usb_device_led), ++ BCM6362_MODE_FUN(sys_irq), ++ BCM6362_MODE_FUN(serial_led_clk), ++ BCM6362_MODE_FUN(serial_led_data), ++ BCM6362_MODE_FUN(robosw_led_data), ++ BCM6362_MODE_FUN(robosw_led_clk), ++ BCM6362_MODE_FUN(robosw_led0), ++ BCM6362_MODE_FUN(robosw_led1), ++ BCM6362_MODE_FUN(inet_led), ++ BCM6362_MODE_FUN(spi_cs2), ++ BCM6362_MODE_FUN(spi_cs3), ++ BCM6362_MODE_FUN(ntr_pulse), ++ BCM6362_MODE_FUN(uart1_scts), ++ BCM6362_MODE_FUN(uart1_srts), ++ BCM6362_MODE_FUN(uart1_sdin), ++ BCM6362_MODE_FUN(uart1_sdout), ++ BCM6362_MODE_FUN(adsl_spi_miso), ++ BCM6362_MODE_FUN(adsl_spi_mosi), ++ BCM6362_MODE_FUN(adsl_spi_clk), ++ BCM6362_MODE_FUN(adsl_spi_cs), ++ BCM6362_MODE_FUN(ephy0_led), ++ BCM6362_MODE_FUN(ephy1_led), ++ BCM6362_MODE_FUN(ephy2_led), ++ BCM6362_MODE_FUN(ephy3_led), ++ BCM6362_MODE_FUN(ext_irq0), ++ BCM6362_MODE_FUN(ext_irq1), ++ BCM6362_MODE_FUN(ext_irq2), ++ BCM6362_MODE_FUN(ext_irq3), ++ BCM6362_CTRL_FUN(wifi), ++ BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND), ++}; ++ ++static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6362_groups); ++} ++ ++static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6362_groups[group].name; ++} ++ ++static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6362_groups[group].pins; ++ *num_pins = bcm6362_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6362_funcs); ++} ++ ++static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6362_funcs[selector].name; ++} ++ ++static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6362_funcs[selector].groups; ++ *num_groups = bcm6362_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg, ++ u32 mask, u32 val) ++{ ++ unsigned long flags; ++ u32 tmp; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ tmp = __raw_readl(reg); ++ tmp &= ~mask; ++ tmp |= val & mask; ++ __raw_writel(tmp, reg); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin) ++{ ++ const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin]; ++ u32 mask = BIT(pin % 32); ++ ++ if (desc->drv_data) ++ bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0); ++ ++ if (pin < 32) { ++ /* base mode 0 => gpio 1 => mux function */ ++ bcm6362_rmw_mux(pctl, pctl->mode, mask, 0); ++ ++ /* pins 0-23 might be muxed to led */ ++ if (pin < 24) ++ bcm6362_rmw_mux(pctl, pctl->led, mask, 0); ++ } else { ++ /* ctrl reg 0 => wifi function 1 => gpio */ ++ bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask); ++ } ++} ++ ++static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6362_pingroup *grp = &bcm6362_groups[group]; ++ const struct bcm6362_function *f = &bcm6362_funcs[selector]; ++ unsigned i; ++ void __iomem *reg; ++ u32 val, mask; ++ ++ for (i = 0; i < grp->num_pins; i++) ++ bcm6362_set_gpio(pctl, grp->pins[i]); ++ ++ switch (f->reg) { ++ case BCM6362_LEDCTRL: ++ reg = pctl->led; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM6362_MODE: ++ reg = pctl->ctrl; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM6362_CTRL: ++ reg = pctl->ctrl; ++ mask = BIT(grp->pins[0]); ++ val = 0; ++ break; ++ case BCM6362_BASEMODE: ++ reg = pctl->basemode; ++ mask = f->basemode_mask; ++ val = f->basemode_mask; ++ break; ++ default: ++ WARN_ON(1); ++ return -EINVAL; ++ } ++ ++ bcm6362_rmw_mux(pctl, reg, mask, val); ++ ++ return 0; ++} ++ ++static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ bcm6362_set_gpio(pctl, offset); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6362_pctl_ops = { ++ .get_groups_count = bcm6362_pinctrl_get_group_count, ++ .get_group_name = bcm6362_pinctrl_get_group_name, ++ .get_group_pins = bcm6362_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6362_pmx_ops = { ++ .get_functions_count = bcm6362_pinctrl_get_func_count, ++ .get_function_name = bcm6362_pinctrl_get_func_name, ++ .get_function_groups = bcm6362_pinctrl_get_groups, ++ .set_mux = bcm6362_pinctrl_set_mux, ++ .gpio_request_enable = bcm6362_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6362_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6362_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *led, *mode, *ctrl, *basemode; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led"); ++ led = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(led)) ++ return PTR_ERR(led); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl"); ++ ctrl = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(ctrl)) ++ return PTR_ERR(ctrl); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode"); ++ basemode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(basemode)) ++ return PTR_ERR(basemode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->led = led; ++ pctl->mode = mode; ++ pctl->ctrl = ctrl; ++ pctl->basemode = basemode; ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6362_pctl_ops; ++ pctl->desc.pmxops = &bcm6362_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6362_pins); ++ pctl->desc.pins = bcm6362_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6362_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6362_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6362-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6362_pinctrl_driver = { ++ .probe = bcm6362_pinctrl_probe, ++ .driver = { ++ .name = "bcm6362-pinctrl", ++ .of_match_table = bcm6362_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6362_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.14/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.14/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch new file mode 100644 index 000000000..e0a698fc1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch @@ -0,0 +1,84 @@ +From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:36:51 +0200 +Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6368 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++ + 1 file changed, 67 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt +@@ -0,0 +1,67 @@ ++* Broadcom BCM6368 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6368-pinctrl". ++- reg: Register specifiers of dirout, dat, mode registers. ++- reg-names: Must be "dirout", "dat", "mode". ++- brcm,gpiobasemode: Phandle to the gpio basemode register. ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6368-pinctrl"; ++ reg = <0x10000080 0x08>, ++ <0x10000088 0x08>, ++ <0x10000098 0x04>; ++ reg-names = "dirout", "dat", "mode"; ++ brcm,gpiobasemode = <&gpiobasemode>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++gpiobasemode: syscon@100000b8 { ++ compatible = "brcm,bcm6368-gpiobasemode", "syscon"; ++ reg = <0x100000b8 4>; ++ native-endian; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 analog_afe0 ++gpio1 1 analog_afe1 ++gpio2 2 sys_irq ++gpio3 3 serial_led_data ++gpio4 4 serial_led_clk ++gpio5 5 inet_led ++gpio6 6 ephy0_led ++gpio7 7 ephy1_led ++gpio8 8 ephy2_led ++gpio9 9 ephy3_led ++gpio10 10 robosw_led_data ++gpio11 11 robosw_led_clk ++gpio12 12 robosw_led0 ++gpio13 13 robosw_led1 ++gpio14 14 usb_device_led ++gpio15 15 - ++gpio16 16 pci_req1 ++gpio17 17 pci_gnt1 ++gpio18 18 pci_intb ++gpio19 19 pci_req0 ++gpio20 20 pci_gnt0 ++gpio21 21 - ++gpio22 22 pcmcia_cd1 ++gpio23 23 pcmcia_cd2 ++gpio24 24 pcmcia_vs1 ++gpio25 25 pcmcia_vs2 ++gpio26 26 ebi_cs2 ++gpio27 27 ebi_cs3 ++gpio28 28 spi_cs2 ++gpio29 29 spi_cs3 ++gpio30 30 spi_cs4 ++gpio31 31 spi_cs5 ++uart1_grp 30-33 uart1 diff --git a/target/linux/brcm63xx/patches-4.14/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch b/target/linux/brcm63xx/patches-4.14/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch new file mode 100644 index 000000000..6a9b9e080 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch @@ -0,0 +1,620 @@ +From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:18:25 +0200 +Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368 + +Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32 +GPIOs onto alternative functions. Not all are documented. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 15 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++ + 3 files changed, 589 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -30,3 +30,18 @@ config PINCTRL_BCM6362 + select PINCONF + select PINCTRL_BCM63XX + select GENERIC_PINCONF ++ ++config PINCTRL_BCM6368 ++ bool "BCM6368 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF ++ select MFD_SYSCON ++ ++config PINCTRL_BCM63268 ++ bool "BCM63268 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o + obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o ++obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c +@@ -0,0 +1,573 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6368_NGPIO 38 ++ ++#define BCM6368_BASEMODE_MASK 0x7 ++#define BCM6368_BASEMODE_GPIO 0x0 ++#define BCM6368_BASEMODE_UART1 0x1 ++ ++struct bcm6368_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6368_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ unsigned dir_out:16; ++ unsigned basemode:3; ++}; ++ ++struct bcm6368_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ struct regmap_field *overlay; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6368_BASEMODE_PIN(a, b) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)true \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6368_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ PINCTRL_PIN(8, "gpio8"), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ PINCTRL_PIN(12, "gpio12"), ++ PINCTRL_PIN(13, "gpio13"), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ PINCTRL_PIN(27, "gpio27"), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ BCM6368_BASEMODE_PIN(30, "gpio30"), ++ BCM6368_BASEMODE_PIN(31, "gpio31"), ++ BCM6368_BASEMODE_PIN(32, "gpio32"), ++ BCM6368_BASEMODE_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 }; ++ ++#define BCM6368_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6368_pingroup bcm6368_groups[] = { ++ BCM6368_GROUP(gpio0), ++ BCM6368_GROUP(gpio1), ++ BCM6368_GROUP(gpio2), ++ BCM6368_GROUP(gpio3), ++ BCM6368_GROUP(gpio4), ++ BCM6368_GROUP(gpio5), ++ BCM6368_GROUP(gpio6), ++ BCM6368_GROUP(gpio7), ++ BCM6368_GROUP(gpio8), ++ BCM6368_GROUP(gpio9), ++ BCM6368_GROUP(gpio10), ++ BCM6368_GROUP(gpio11), ++ BCM6368_GROUP(gpio12), ++ BCM6368_GROUP(gpio13), ++ BCM6368_GROUP(gpio14), ++ BCM6368_GROUP(gpio15), ++ BCM6368_GROUP(gpio16), ++ BCM6368_GROUP(gpio17), ++ BCM6368_GROUP(gpio18), ++ BCM6368_GROUP(gpio19), ++ BCM6368_GROUP(gpio20), ++ BCM6368_GROUP(gpio21), ++ BCM6368_GROUP(gpio22), ++ BCM6368_GROUP(gpio23), ++ BCM6368_GROUP(gpio24), ++ BCM6368_GROUP(gpio25), ++ BCM6368_GROUP(gpio26), ++ BCM6368_GROUP(gpio27), ++ BCM6368_GROUP(gpio28), ++ BCM6368_GROUP(gpio29), ++ BCM6368_GROUP(gpio30), ++ BCM6368_GROUP(gpio31), ++ BCM6368_GROUP(uart1_grp), ++}; ++ ++static const char * const analog_afe_0_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const analog_afe_1_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const sys_irq_groups[] = { ++ "gpio2", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio3", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio4", ++}; ++ ++static const char * const inet_led_groups[] = { ++ "gpio5", ++}; ++ ++static const char * const ephy0_led_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const ephy1_led_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const ephy2_led_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const ephy3_led_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const robosw_led_data_groups[] = { ++ "gpio10", ++}; ++ ++static const char * const robosw_led_clk_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const robosw_led0_groups[] = { ++ "gpio12", ++}; ++ ++static const char * const robosw_led1_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const usb_device_led_groups[] = { ++ "gpio14", ++}; ++ ++static const char * const pci_req1_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const pci_gnt1_groups[] = { ++ "gpio17", ++}; ++ ++static const char * const pci_intb_groups[] = { ++ "gpio18", ++}; ++ ++static const char * const pci_req0_groups[] = { ++ "gpio19", ++}; ++ ++static const char * const pci_gnt0_groups[] = { ++ "gpio20", ++}; ++ ++static const char * const pcmcia_cd1_groups[] = { ++ "gpio22", ++}; ++ ++static const char * const pcmcia_cd2_groups[] = { ++ "gpio23", ++}; ++ ++static const char * const pcmcia_vs1_groups[] = { ++ "gpio24", ++}; ++ ++static const char * const pcmcia_vs2_groups[] = { ++ "gpio25", ++}; ++ ++static const char * const ebi_cs2_groups[] = { ++ "gpio26", ++}; ++ ++static const char * const ebi_cs3_groups[] = { ++ "gpio27", ++}; ++ ++static const char * const spi_cs2_groups[] = { ++ "gpio28", ++}; ++ ++static const char * const spi_cs3_groups[] = { ++ "gpio29", ++}; ++ ++static const char * const spi_cs4_groups[] = { ++ "gpio30", ++}; ++ ++static const char * const spi_cs5_groups[] = { ++ "gpio31", ++}; ++ ++static const char * const uart1_groups[] = { ++ "uart1_grp", ++}; ++ ++#define BCM6368_FUN(n, out) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .dir_out = out, \ ++ } ++ ++#define BCM6368_BASEMODE_FUN(n, val, out) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .basemode = BCM6368_BASEMODE_##val, \ ++ .dir_out = out, \ ++ } ++ ++static const struct bcm6368_function bcm6368_funcs[] = { ++ BCM6368_FUN(analog_afe_0, 1), ++ BCM6368_FUN(analog_afe_1, 1), ++ BCM6368_FUN(sys_irq, 1), ++ BCM6368_FUN(serial_led_data, 1), ++ BCM6368_FUN(serial_led_clk, 1), ++ BCM6368_FUN(inet_led, 1), ++ BCM6368_FUN(ephy0_led, 1), ++ BCM6368_FUN(ephy1_led, 1), ++ BCM6368_FUN(ephy2_led, 1), ++ BCM6368_FUN(ephy3_led, 1), ++ BCM6368_FUN(robosw_led_data, 1), ++ BCM6368_FUN(robosw_led_clk, 1), ++ BCM6368_FUN(robosw_led0, 1), ++ BCM6368_FUN(robosw_led1, 1), ++ BCM6368_FUN(usb_device_led, 1), ++ BCM6368_FUN(pci_req1, 0), ++ BCM6368_FUN(pci_gnt1, 0), ++ BCM6368_FUN(pci_intb, 0), ++ BCM6368_FUN(pci_req0, 0), ++ BCM6368_FUN(pci_gnt0, 0), ++ BCM6368_FUN(pcmcia_cd1, 0), ++ BCM6368_FUN(pcmcia_cd2, 0), ++ BCM6368_FUN(pcmcia_vs1, 0), ++ BCM6368_FUN(pcmcia_vs2, 0), ++ BCM6368_FUN(ebi_cs2, 1), ++ BCM6368_FUN(ebi_cs3, 1), ++ BCM6368_FUN(spi_cs2, 1), ++ BCM6368_FUN(spi_cs3, 1), ++ BCM6368_FUN(spi_cs4, 1), ++ BCM6368_FUN(spi_cs5, 1), ++ BCM6368_BASEMODE_FUN(uart1, UART1, 0x6), ++}; ++ ++static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6368_groups); ++} ++ ++static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6368_groups[group].name; ++} ++ ++static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6368_groups[group].pins; ++ *num_pins = bcm6368_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6368_funcs); ++} ++ ++static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6368_funcs[selector].name; ++} ++ ++static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6368_funcs[selector].groups; ++ *num_groups = bcm6368_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg, ++ u32 mask, u32 val) ++{ ++ u32 tmp; ++ ++ tmp = __raw_readl(reg); ++ tmp &= ~mask; ++ tmp |= (val & mask); ++ __raw_writel(tmp, reg); ++} ++ ++static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6368_pingroup *grp = &bcm6368_groups[group]; ++ const struct bcm6368_function *fun = &bcm6368_funcs[selector]; ++ unsigned long flags; ++ int i, pin; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ if (fun->basemode) { ++ u32 mask = 0; ++ ++ for (i = 0; i < grp->num_pins; i++) { ++ pin = grp->pins[i]; ++ if (pin < 32) ++ mask |= BIT(pin); ++ } ++ ++ bcm6368_rmw_mux(pctl, pctl->mode, mask, 0); ++ regmap_field_write(pctl->overlay, fun->basemode); ++ } else { ++ pin = grp->pins[0]; ++ ++ if (bcm6368_pins[pin].drv_data) ++ regmap_field_write(pctl->overlay, ++ BCM6368_BASEMODE_GPIO); ++ ++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin)); ++ } ++ spin_unlock_irqrestore(&pctl->lock, flags); ++ ++ for (pin = 0; pin < grp->num_pins; pin++) { ++ int hw_gpio = bcm6368_pins[pin].number; ++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32]; ++ ++ if (fun->dir_out & BIT(pin)) ++ gc->direction_output(gc, hw_gpio % 32, 0); ++ else ++ gc->direction_input(gc, hw_gpio % 32); ++ } ++ ++ return 0; ++} ++ ++static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ unsigned long flags; ++ ++ if (offset >= 32 && !bcm6368_pins[offset].drv_data) ++ return 0; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ /* disable all functions using this pin */ ++ if (offset < 32) ++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0); ++ ++ if (bcm6368_pins[offset].drv_data) ++ regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6368_pctl_ops = { ++ .get_groups_count = bcm6368_pinctrl_get_group_count, ++ .get_group_name = bcm6368_pinctrl_get_group_name, ++ .get_group_pins = bcm6368_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6368_pmx_ops = { ++ .get_functions_count = bcm6368_pinctrl_get_func_count, ++ .get_function_name = bcm6368_pinctrl_get_func_name, ++ .get_function_groups = bcm6368_pinctrl_get_groups, ++ .set_mux = bcm6368_pinctrl_set_mux, ++ .gpio_request_enable = bcm6368_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6368_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6368_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode; ++ struct regmap *basemode; ++ struct reg_field overlay = REG_FIELD(0, 0, 3); ++ ++ if (pdev->dev.of_node) ++ basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, ++ "brcm,gpiobasemode"); ++ else ++ basemode = syscon_regmap_lookup_by_pdevname("syscon.b00000b8"); ++ ++ if (IS_ERR(basemode)) ++ return PTR_ERR(basemode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay); ++ if (IS_ERR(pctl->overlay)) ++ return PTR_ERR(pctl->overlay); ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ ++ /* disable all muxes by default */ ++ __raw_writel(0, pctl->mode); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6368_pctl_ops; ++ pctl->desc.pmxops = &bcm6368_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6368_pins); ++ pctl->desc.pins = bcm6368_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6368_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6368_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6368-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6368_pinctrl_driver = { ++ .probe = bcm6368_pinctrl_probe, ++ .driver = { ++ .name = "bcm6368-pinctrl", ++ .of_match_table = bcm6368_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6368_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.14/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch b/target/linux/brcm63xx/patches-4.14/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch new file mode 100644 index 000000000..ffe842fd7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch @@ -0,0 +1,106 @@ +From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:37:08 +0200 +Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in the BCM63268 +family SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++ + 1 file changed, 88 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt +@@ -0,0 +1,88 @@ ++* Broadcom BCM63268 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6362-pinctrl". ++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers. ++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@100000c0 { ++ compatible = "brcm,bcm63268-pinctrl"; ++ reg = <0x100000c0 0x8>, ++ <0x100000c8 0x8>, ++ <0x100000d0 0x4>, ++ <0x100000d8 0x4>, ++ <0x100000dc 0x4>, ++ <0x100000f8 0x4>; ++ reg-names = "dirout", "dat", "led", "mode", ++ "ctrl", "basemode"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led, serial_led_clk ++gpio1 1 led, serial_led_data ++gpio2 2 led, ++gpio3 3 led, ++gpio4 4 led, ++gpio5 5 led, ++gpio6 6 led, ++gpio7 7 led, ++gpio8 8 led, hsspi_cs6 ++gpio9 9 led, hsspi_cs7 ++gpio10 10 led, uart1_scts ++gpio11 11 led, uart1_srts ++gpio12 12 led, uart1_sdin ++gpio13 13 led, uart1_sdout ++gpio14 14 led, ntr_pulse_in ++gpio15 15 led, dsl_ntr_pulse_out ++gpio16 16 led, hsspi_cs4 ++gpio17 17 led, hsspi_cs5 ++gpio18 18 led, adsl_spi_miso ++gpio19 19 led, adsl_spi_mosi ++gpio20 20 led, ++gpio21 21 led, ++gpio22 22 led, vreg_clk ++gpio23 23 led, pcie_clkreq_b ++gpio24 24 uart1_scts ++gpio25 25 uart1_srts ++gpio26 26 uart1_sdin ++gpio27 27 uart1_sdout ++gpio28 28 ntr_pulse_in ++gpio29 29 dsl_ntr_pulse_out ++gpio30 30 switch_led_clk ++gpio31 31 switch_led_data ++gpio32 32 wifi ++gpio33 33 wifi ++gpio34 34 wifi ++gpio35 35 wifi ++gpio36 36 wifi ++gpio37 37 wifi ++gpio38 38 wifi ++gpio39 39 wifi ++gpio40 40 wifi ++gpio41 41 wifi ++gpio42 42 wifi ++gpio43 43 wifi ++gpio44 44 wifi ++gpio45 45 wifi ++gpio46 46 wifi ++gpio47 47 wifi ++gpio48 48 wifi ++gpio49 49 wifi ++gpio50 50 wifi ++gpio51 51 wifi ++nand_grp 2-7,24-31 nand ++dect_pd_grp 8-9 dect_pd ++vdsl_phy0_grp 10-11 vdsl_phy0 ++vdsl_phy1_grp 12-13 vdsl_phy1 ++vdsl_phy2_grp 24-25 vdsl_phy2 ++vdsl_phy3_grp 26-27 vdsl_phy3 diff --git a/target/linux/brcm63xx/patches-4.14/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.14/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch new file mode 100644 index 000000000..089d14e3e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch @@ -0,0 +1,736 @@ +From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:19:12 +0200 +Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268 + +Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs +to different functions. Depending on the mux, these are either single +pin configurations or whole pin groups. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++ + 2 files changed, 711 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c + +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o + obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o + obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o ++obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c +@@ -0,0 +1,710 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM63268_NGPIO 52 ++ ++/* GPIO_BASEMODE register */ ++#define BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */ ++#define BASEMODE_GPIO35 BIT(4) /* GPIO 35 */ ++#define BASEMODE_DECTPD BIT(5) /* GPIOs 8/9 */ ++#define BASEMODE_VDSL_PHY_0 BIT(6) /* GPIOs 10/11 */ ++#define BASEMODE_VDSL_PHY_1 BIT(7) /* GPIOs 12/13 */ ++#define BASEMODE_VDSL_PHY_2 BIT(8) /* GPIOs 24/25 */ ++#define BASEMODE_VDSL_PHY_3 BIT(9) /* GPIOs 26/27 */ ++ ++enum bcm63268_pinctrl_reg { ++ BCM63268_LEDCTRL, ++ BCM63268_MODE, ++ BCM63268_CTRL, ++ BCM63268_BASEMODE, ++}; ++ ++struct bcm63268_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm63268_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ enum bcm63268_pinctrl_reg reg; ++ u32 mask; ++}; ++ ++struct bcm63268_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *led; ++ void __iomem *mode; ++ void __iomem *ctrl; ++ void __iomem *basemode; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM63268_PIN(a, b, basemode) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(basemode) \ ++ } ++ ++static const struct pinctrl_pin_desc bcm63268_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ BCM63268_PIN(2, "gpio2", BASEMODE_NAND), ++ BCM63268_PIN(3, "gpio3", BASEMODE_NAND), ++ BCM63268_PIN(4, "gpio4", BASEMODE_NAND), ++ BCM63268_PIN(5, "gpio5", BASEMODE_NAND), ++ BCM63268_PIN(6, "gpio6", BASEMODE_NAND), ++ BCM63268_PIN(7, "gpio7", BASEMODE_NAND), ++ BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD), ++ BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD), ++ BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0), ++ BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0), ++ BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1), ++ BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2), ++ BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2), ++ BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3), ++ BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3), ++ BCM63268_PIN(28, "gpio28", BASEMODE_NAND), ++ BCM63268_PIN(29, "gpio29", BASEMODE_NAND), ++ BCM63268_PIN(30, "gpio30", BASEMODE_NAND), ++ BCM63268_PIN(31, "gpio31", BASEMODE_NAND), ++ PINCTRL_PIN(32, "gpio32"), ++ PINCTRL_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++ PINCTRL_PIN(40, "gpio40"), ++ PINCTRL_PIN(41, "gpio41"), ++ PINCTRL_PIN(42, "gpio42"), ++ PINCTRL_PIN(43, "gpio43"), ++ PINCTRL_PIN(44, "gpio44"), ++ PINCTRL_PIN(45, "gpio45"), ++ PINCTRL_PIN(46, "gpio46"), ++ PINCTRL_PIN(47, "gpio47"), ++ PINCTRL_PIN(48, "gpio48"), ++ PINCTRL_PIN(49, "gpio49"), ++ PINCTRL_PIN(50, "gpio50"), ++ PINCTRL_PIN(51, "gpio51"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned gpio32_pins[] = { 32 }; ++static unsigned gpio33_pins[] = { 33 }; ++static unsigned gpio34_pins[] = { 34 }; ++static unsigned gpio35_pins[] = { 35 }; ++static unsigned gpio36_pins[] = { 36 }; ++static unsigned gpio37_pins[] = { 37 }; ++static unsigned gpio38_pins[] = { 38 }; ++static unsigned gpio39_pins[] = { 39 }; ++static unsigned gpio40_pins[] = { 40 }; ++static unsigned gpio41_pins[] = { 41 }; ++static unsigned gpio42_pins[] = { 42 }; ++static unsigned gpio43_pins[] = { 43 }; ++static unsigned gpio44_pins[] = { 44 }; ++static unsigned gpio45_pins[] = { 45 }; ++static unsigned gpio46_pins[] = { 46 }; ++static unsigned gpio47_pins[] = { 47 }; ++static unsigned gpio48_pins[] = { 48 }; ++static unsigned gpio49_pins[] = { 49 }; ++static unsigned gpio50_pins[] = { 50 }; ++static unsigned gpio51_pins[] = { 51 }; ++ ++static unsigned nand_grp_pins[] = { ++ 2, 3, 4, 5, 6, 7, 24, ++ 25, 26, 27, 28, 29, 30, 31, ++}; ++ ++static unsigned dectpd_grp_pins[] = { 8, 9 }; ++static unsigned vdsl_phy0_grp_pins[] = { 10, 11 }; ++static unsigned vdsl_phy1_grp_pins[] = { 12, 13 }; ++static unsigned vdsl_phy2_grp_pins[] = { 24, 25 }; ++static unsigned vdsl_phy3_grp_pins[] = { 26, 27 }; ++ ++#define BCM63268_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm63268_pingroup bcm63268_groups[] = { ++ BCM63268_GROUP(gpio0), ++ BCM63268_GROUP(gpio1), ++ BCM63268_GROUP(gpio2), ++ BCM63268_GROUP(gpio3), ++ BCM63268_GROUP(gpio4), ++ BCM63268_GROUP(gpio5), ++ BCM63268_GROUP(gpio6), ++ BCM63268_GROUP(gpio7), ++ BCM63268_GROUP(gpio8), ++ BCM63268_GROUP(gpio9), ++ BCM63268_GROUP(gpio10), ++ BCM63268_GROUP(gpio11), ++ BCM63268_GROUP(gpio12), ++ BCM63268_GROUP(gpio13), ++ BCM63268_GROUP(gpio14), ++ BCM63268_GROUP(gpio15), ++ BCM63268_GROUP(gpio16), ++ BCM63268_GROUP(gpio17), ++ BCM63268_GROUP(gpio18), ++ BCM63268_GROUP(gpio19), ++ BCM63268_GROUP(gpio20), ++ BCM63268_GROUP(gpio21), ++ BCM63268_GROUP(gpio22), ++ BCM63268_GROUP(gpio23), ++ BCM63268_GROUP(gpio24), ++ BCM63268_GROUP(gpio25), ++ BCM63268_GROUP(gpio26), ++ BCM63268_GROUP(gpio27), ++ BCM63268_GROUP(gpio28), ++ BCM63268_GROUP(gpio29), ++ BCM63268_GROUP(gpio30), ++ BCM63268_GROUP(gpio31), ++ BCM63268_GROUP(gpio32), ++ BCM63268_GROUP(gpio33), ++ BCM63268_GROUP(gpio34), ++ BCM63268_GROUP(gpio35), ++ BCM63268_GROUP(gpio36), ++ BCM63268_GROUP(gpio37), ++ BCM63268_GROUP(gpio38), ++ BCM63268_GROUP(gpio39), ++ BCM63268_GROUP(gpio40), ++ BCM63268_GROUP(gpio41), ++ BCM63268_GROUP(gpio42), ++ BCM63268_GROUP(gpio43), ++ BCM63268_GROUP(gpio44), ++ BCM63268_GROUP(gpio45), ++ BCM63268_GROUP(gpio46), ++ BCM63268_GROUP(gpio47), ++ BCM63268_GROUP(gpio48), ++ BCM63268_GROUP(gpio49), ++ BCM63268_GROUP(gpio50), ++ BCM63268_GROUP(gpio51), ++ ++ /* multi pin groups */ ++ BCM63268_GROUP(nand_grp), ++ BCM63268_GROUP(dectpd_grp), ++ BCM63268_GROUP(vdsl_phy0_grp), ++ BCM63268_GROUP(vdsl_phy1_grp), ++ BCM63268_GROUP(vdsl_phy2_grp), ++ BCM63268_GROUP(vdsl_phy3_grp), ++}; ++ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const hsspi_cs4_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const hsspi_cs5_groups[] = { ++ "gpio17", ++}; ++ ++static const char * const hsspi_cs6_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const hsspi_cs7_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const uart1_scts_groups[] = { ++ "gpio10", ++ "gpio24", ++}; ++ ++static const char * const uart1_srts_groups[] = { ++ "gpio11", ++ "gpio25", ++}; ++ ++static const char * const uart1_sdin_groups[] = { ++ "gpio12", ++ "gpio26", ++}; ++ ++static const char * const uart1_sdout_groups[] = { ++ "gpio13", ++ "gpio27", ++}; ++ ++static const char * const ntr_pulse_in_groups[] = { ++ "gpio14", ++ "gpio28", ++}; ++ ++static const char * const dsl_ntr_pulse_out_groups[] = { ++ "gpio15", ++ "gpio29", ++}; ++ ++static const char * const adsl_spi_miso_groups[] = { ++ "gpio18", ++}; ++ ++static const char * const adsl_spi_mosi_groups[] = { ++ "gpio19", ++}; ++ ++static const char * const vreg_clk_groups[] = { ++ "gpio22", ++}; ++ ++static const char * const pcie_clkreq_b_groups[] = { ++ "gpio23", ++}; ++ ++static const char * const switch_led_clk_groups[] = { ++ "gpio30", ++}; ++ ++static const char * const switch_led_data_groups[] = { ++ "gpio31", ++}; ++ ++static const char * const wifi_groups[] = { ++ "gpio32", ++ "gpio33", ++ "gpio34", ++ "gpio35", ++ "gpio36", ++ "gpio37", ++ "gpio38", ++ "gpio39", ++ "gpio40", ++ "gpio41", ++ "gpio42", ++ "gpio43", ++ "gpio44", ++ "gpio45", ++ "gpio46", ++ "gpio47", ++ "gpio48", ++ "gpio49", ++ "gpio50", ++ "gpio51", ++}; ++ ++static const char * const nand_groups[] = { ++ "nand_grp", ++}; ++ ++static const char * const dectpd_groups[] = { ++ "dectpd_grp", ++}; ++ ++static const char * const vdsl_phy_override_0_groups[] = { ++ "vdsl_phy_override_0_grp", ++}; ++ ++static const char * const vdsl_phy_override_1_groups[] = { ++ "vdsl_phy_override_1_grp", ++}; ++ ++static const char * const vdsl_phy_override_2_groups[] = { ++ "vdsl_phy_override_2_grp", ++}; ++ ++static const char * const vdsl_phy_override_3_groups[] = { ++ "vdsl_phy_override_3_grp", ++}; ++ ++#define BCM63268_LED_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_LEDCTRL, \ ++ } ++ ++#define BCM63268_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_MODE, \ ++ } ++ ++#define BCM63268_CTRL_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_CTRL, \ ++ } ++ ++#define BCM63268_BASEMODE_FUN(n, val) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_BASEMODE, \ ++ .mask = val, \ ++ } ++ ++static const struct bcm63268_function bcm63268_funcs[] = { ++ BCM63268_LED_FUN(led), ++ BCM63268_MODE_FUN(serial_led_clk), ++ BCM63268_MODE_FUN(serial_led_data), ++ BCM63268_MODE_FUN(hsspi_cs6), ++ BCM63268_MODE_FUN(hsspi_cs7), ++ BCM63268_MODE_FUN(uart1_scts), ++ BCM63268_MODE_FUN(uart1_srts), ++ BCM63268_MODE_FUN(uart1_sdin), ++ BCM63268_MODE_FUN(uart1_sdout), ++ BCM63268_MODE_FUN(ntr_pulse_in), ++ BCM63268_MODE_FUN(dsl_ntr_pulse_out), ++ BCM63268_MODE_FUN(hsspi_cs4), ++ BCM63268_MODE_FUN(hsspi_cs5), ++ BCM63268_MODE_FUN(adsl_spi_miso), ++ BCM63268_MODE_FUN(adsl_spi_mosi), ++ BCM63268_MODE_FUN(vreg_clk), ++ BCM63268_MODE_FUN(pcie_clkreq_b), ++ BCM63268_MODE_FUN(switch_led_clk), ++ BCM63268_MODE_FUN(switch_led_data), ++ BCM63268_CTRL_FUN(wifi), ++ BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND), ++ BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3), ++}; ++ ++static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm63268_groups); ++} ++ ++static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm63268_groups[group].name; ++} ++ ++static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, ++ const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm63268_groups[group].pins; ++ *num_pins = bcm63268_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm63268_funcs); ++} ++ ++static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm63268_funcs[selector].name; ++} ++ ++static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm63268_funcs[selector].groups; ++ *num_groups = bcm63268_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg, ++ u32 mask, u32 val) ++{ ++ unsigned long flags; ++ u32 tmp; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ tmp = __raw_readl(reg); ++ tmp &= ~mask; ++ tmp |= val; ++ __raw_writel(tmp, reg); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin) ++{ ++ const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin]; ++ u32 basemode = (unsigned long)desc->drv_data; ++ u32 mask = BIT(pin % 32); ++ ++ if (basemode) ++ bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0); ++ ++ if (pin < 32) { ++ /* base mode: 0 => gpio, 1 => mux function */ ++ bcm63268_rmw_mux(pctl, pctl->mode, mask, 0); ++ ++ /* pins 0-23 might be muxed to led */ ++ if (pin < 24) ++ bcm63268_rmw_mux(pctl, pctl->led, mask, 0); ++ } else if (pin < 52) { ++ /* ctrl reg: 0 => wifi function, 1 => gpio */ ++ bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask); ++ } ++} ++ ++static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm63268_pingroup *grp = &bcm63268_groups[group]; ++ const struct bcm63268_function *f = &bcm63268_funcs[selector]; ++ unsigned i; ++ void __iomem *reg; ++ u32 val, mask; ++ ++ for (i = 0; i < grp->num_pins; i++) ++ bcm63268_set_gpio(pctl, grp->pins[i]); ++ ++ switch (f->reg) { ++ case BCM63268_LEDCTRL: ++ reg = pctl->led; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM63268_MODE: ++ reg = pctl->mode; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM63268_CTRL: ++ reg = pctl->ctrl; ++ mask = BIT(grp->pins[0]); ++ val = 0; ++ break; ++ case BCM63268_BASEMODE: ++ reg = pctl->basemode; ++ mask = f->mask; ++ val = f->mask; ++ break; ++ default: ++ WARN_ON(1); ++ return -EINVAL; ++ } ++ ++ bcm63268_rmw_mux(pctl, reg, mask, val); ++ ++ return 0; ++} ++ ++static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ bcm63268_set_gpio(pctl, offset); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm63268_pctl_ops = { ++ .get_groups_count = bcm63268_pinctrl_get_group_count, ++ .get_group_name = bcm63268_pinctrl_get_group_name, ++ .get_group_pins = bcm63268_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm63268_pmx_ops = { ++ .get_functions_count = bcm63268_pinctrl_get_func_count, ++ .get_function_name = bcm63268_pinctrl_get_func_name, ++ .get_function_groups = bcm63268_pinctrl_get_groups, ++ .set_mux = bcm63268_pinctrl_set_mux, ++ .gpio_request_enable = bcm63268_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm63268_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm63268_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *led, *mode, *ctrl, *basemode; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led"); ++ led = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(led)) ++ return PTR_ERR(led); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl"); ++ ctrl = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(ctrl)) ++ return PTR_ERR(ctrl); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode"); ++ basemode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(basemode)) ++ return PTR_ERR(basemode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->led = led; ++ pctl->mode = mode; ++ pctl->ctrl = ctrl; ++ pctl->basemode = basemode; ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm63268_pctl_ops; ++ pctl->desc.pmxops = &bcm63268_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm63268_pins); ++ pctl->desc.pins = bcm63268_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM63268_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm63268_pinctrl_match[] = { ++ { .compatible = "brcm,bcm63268-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm63268_pinctrl_driver = { ++ .probe = bcm63268_pinctrl_probe, ++ .driver = { ++ .name = "bcm63268-pinctrl", ++ .of_match_table = bcm63268_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm63268_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.14/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch b/target/linux/brcm63xx/patches-4.14/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch new file mode 100644 index 000000000..e7ebb0be1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch @@ -0,0 +1,66 @@ +From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 19 Jan 2014 12:18:03 +0100 +Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform + +In the same way as the ohci platform driver allows limiting ports, +enable the same for ehci. This prevents a mismatch in the available +ports between ehci/ohci on USB 2.0 controllers. + +This is needed if the USB host controller always reports the maximum +number of ports regardless of the number of available ports (because +one might be set to be usb device). + +Signed-off-by: Jonas Gorski +--- + drivers/usb/host/ehci-hcd.c | 4 ++++ + drivers/usb/host/ehci-platform.c | 2 ++ + drivers/usb/host/ehci.h | 1 + + include/linux/usb/ehci_pdriver.h | 1 + + 4 files changed, 8 insertions(+) + +--- a/drivers/usb/host/ehci-hcd.c ++++ b/drivers/usb/host/ehci-hcd.c +@@ -678,6 +678,10 @@ int ehci_setup(struct usb_hcd *hcd) + + /* cache this readonly data; minimize chip reads */ + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); ++ if (ehci->num_ports) { ++ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */ ++ ehci->hcs_params |= ehci->num_ports; ++ } + + ehci->sbrn = HCD_USB2; + +--- a/drivers/usb/host/ehci-platform.c ++++ b/drivers/usb/host/ehci-platform.c +@@ -62,6 +62,9 @@ static int ehci_platform_reset(struct us + + ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug; + ++ if (pdata->num_ports && pdata->num_ports <= 15) ++ ehci->num_ports = pdata->num_ports; ++ + if (pdata->pre_setup) { + retval = pdata->pre_setup(hcd); + if (retval < 0) +--- a/drivers/usb/host/ehci.h ++++ b/drivers/usb/host/ehci.h +@@ -216,6 +216,7 @@ struct ehci_hcd { /* one per controlle + u32 command; + + /* SILICON QUIRKS */ ++ unsigned int num_ports; + unsigned no_selective_suspend:1; + unsigned has_fsl_port_bug:1; /* FreeScale */ + unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */ +--- a/include/linux/usb/ehci_pdriver.h ++++ b/include/linux/usb/ehci_pdriver.h +@@ -42,6 +42,7 @@ struct usb_hcd; + */ + struct usb_ehci_pdata { + int caps_offset; ++ unsigned int num_ports; + unsigned has_tt:1; + unsigned has_synopsys_hc_bug:1; + unsigned big_endian_desc:1; diff --git a/target/linux/brcm63xx/patches-4.14/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch b/target/linux/brcm63xx/patches-4.14/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch new file mode 100644 index 000000000..f2b2847e6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch @@ -0,0 +1,492 @@ +From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 03:54:05 +0100 +Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its + own file + +Move device registration code into its own file to allow sharing it +between board implementations. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Makefile | 1 + + arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +------------------------- + arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++ + arch/mips/bcm63xx/boards/board_common.h | 8 ++ + 4 files changed, 223 insertions(+), 183 deletions(-) + create mode 100644 arch/mips/bcm63xx/boards/board_common.c + create mode 100644 arch/mips/bcm63xx/boards/board_common.h + +--- a/arch/mips/bcm63xx/boards/Makefile ++++ b/arch/mips/bcm63xx/boards/Makefile +@@ -1 +1,2 @@ ++obj-y += board_common.o + obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -12,34 +12,21 @@ + #include + #include + #include +-#include +-#include + #include + #include + #include +-#include + #include + #include + #include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include + #include + ++#include "board_common.h" ++ + #include + + + #define HCS_OFFSET_128K 0x20000 + +-static struct board_info board; +- + /* + * known 3368 boards + */ +@@ -712,52 +699,6 @@ static const struct board_info __initcon + }; + + /* +- * Register a sane SPROMv2 to make the on-board +- * bcm4318 WLAN work +- */ +-#ifdef CONFIG_SSB_PCIHOST +-static struct ssb_sprom bcm63xx_sprom = { +- .revision = 0x02, +- .board_rev = 0x17, +- .country_code = 0x0, +- .ant_available_bg = 0x3, +- .pa0b0 = 0x15ae, +- .pa0b1 = 0xfa85, +- .pa0b2 = 0xfe8d, +- .pa1b0 = 0xffff, +- .pa1b1 = 0xffff, +- .pa1b2 = 0xffff, +- .gpio0 = 0xff, +- .gpio1 = 0xff, +- .gpio2 = 0xff, +- .gpio3 = 0xff, +- .maxpwr_bg = 0x004c, +- .itssi_bg = 0x00, +- .boardflags_lo = 0x2848, +- .boardflags_hi = 0x0000, +-}; +- +-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) +-{ +- if (bus->bustype == SSB_BUSTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); +- return 0; +- } else { +- pr_err("unable to fill SPROM for given bustype\n"); +- return -EINVAL; +- } +-} +-#endif +- +-/* +- * return board name for /proc/cpuinfo +- */ +-const char *board_get_name(void) +-{ +- return board.name; +-} +- +-/* + * early init callback, read nvram data from flash and checksum it + */ + void __init board_prom_init(void) +@@ -802,140 +743,15 @@ void __init board_prom_init(void) + if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) + continue; + /* copy, board desc array is marked initdata */ +- memcpy(&board, bcm963xx_boards[i], sizeof(board)); ++ board_early_setup(bcm963xx_boards[i]); + break; + } + +- /* bail out if board is not found, will complain later */ +- if (!board.name[0]) { ++ /* warn if board is not found, will complain later */ ++ if (i == ARRAY_SIZE(bcm963xx_boards)) { + char name[17]; + memcpy(name, board_name, 16); + name[16] = 0; + pr_err("unknown bcm963xx board: %s\n", name); +- return; +- } +- +- /* setup pin multiplexing depending on board enabled device, +- * this has to be done this early since PCI init is done +- * inside arch_initcall */ +- val = 0; +- +-#ifdef CONFIG_PCI +- if (board.has_pci) { +- bcm63xx_pci_enabled = 1; +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G2_PCI; +- } +-#endif +- +- if (board.has_pccard) { +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G1_MII_PCCARD; +- } +- +- if (board.has_enet0 && !board.enet0.use_internal_phy) { +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G3_EXT_MII | +- GPIO_MODE_6348_G0_EXT_MII; +- } +- +- if (board.has_enet1 && !board.enet1.use_internal_phy) { +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G3_EXT_MII | +- GPIO_MODE_6348_G0_EXT_MII; +- } +- +- bcm_gpio_writel(val, GPIO_MODE_REG); +-} +- +-/* +- * second stage init callback, good time to panic if we couldn't +- * identify on which board we're running since early printk is working +- */ +-void __init board_setup(void) +-{ +- if (!board.name[0]) +- panic("unable to detect bcm963xx board"); +- pr_info("board name: %s\n", board.name); +- +- /* make sure we're running on expected cpu */ +- if (bcm63xx_get_cpu_id() != board.expected_cpu_id) +- panic("unexpected CPU for bcm963xx board"); +-} +- +-static struct gpio_led_platform_data bcm63xx_led_data; +- +-static struct platform_device bcm63xx_gpio_leds = { +- .name = "leds-gpio", +- .id = 0, +- .dev.platform_data = &bcm63xx_led_data, +-}; +- +-/* +- * third stage init callback, register all board devices. +- */ +-int __init board_register_devices(void) +-{ +- if (board.has_uart0) +- bcm63xx_uart_register(0); +- +- if (board.has_uart1) +- bcm63xx_uart_register(1); +- +- if (board.has_pccard) +- bcm63xx_pcmcia_register(); +- +- if (board.has_enet0 && +- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) +- bcm63xx_enet_register(0, &board.enet0); +- +- if (board.has_enet1 && +- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) +- bcm63xx_enet_register(1, &board.enet1); +- +- if (board.has_enetsw && +- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) +- bcm63xx_enetsw_register(&board.enetsw); +- +- if (board.has_usbd) +- bcm63xx_usbd_register(&board.usbd); +- +- if (board.has_ehci0) +- bcm63xx_ehci_register(); +- +- if (board.has_ohci0) +- bcm63xx_ohci_register(); +- +- if (board.has_dsp) +- bcm63xx_dsp_register(&board.dsp); +- +- /* Generate MAC address for WLAN and register our SPROM, +- * do this after registering enet devices +- */ +-#ifdef CONFIG_SSB_PCIHOST +- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { +- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- if (ssb_arch_register_fallback_sprom( +- &bcm63xx_get_fallback_sprom) < 0) +- pr_err("failed to register fallback SPROM\n"); + } +-#endif +- +- bcm63xx_spi_register(); +- +- bcm63xx_hsspi_register(); +- +- bcm63xx_flash_register(); +- +- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); +- bcm63xx_led_data.leds = board.leds; +- +- platform_device_register(&bcm63xx_gpio_leds); +- +- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) +- gpio_request_one(board.ephy_reset_gpio, +- board.ephy_reset_gpio_flags, "ephy-reset"); +- +- return 0; + } +--- /dev/null ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -0,0 +1,218 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2008 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PFX "board: " ++ ++static struct board_info board; ++ ++/* ++ * Register a sane SPROMv2 to make the on-board ++ * bcm4318 WLAN work ++ */ ++#ifdef CONFIG_SSB_PCIHOST ++static struct ssb_sprom bcm63xx_sprom = { ++ .revision = 0x02, ++ .board_rev = 0x17, ++ .country_code = 0x0, ++ .ant_available_bg = 0x3, ++ .pa0b0 = 0x15ae, ++ .pa0b1 = 0xfa85, ++ .pa0b2 = 0xfe8d, ++ .pa1b0 = 0xffff, ++ .pa1b1 = 0xffff, ++ .pa1b2 = 0xffff, ++ .gpio0 = 0xff, ++ .gpio1 = 0xff, ++ .gpio2 = 0xff, ++ .gpio3 = 0xff, ++ .maxpwr_bg = 0x004c, ++ .itssi_bg = 0x00, ++ .boardflags_lo = 0x2848, ++ .boardflags_hi = 0x0000, ++}; ++ ++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) ++{ ++ if (bus->bustype == SSB_BUSTYPE_PCI) { ++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ return 0; ++ } else { ++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); ++ return -EINVAL; ++ } ++} ++#endif ++ ++/* ++ * return board name for /proc/cpuinfo ++ */ ++const char *board_get_name(void) ++{ ++ return board.name; ++} ++ ++/* ++ * setup board for device registration ++ */ ++void __init board_early_setup(const struct board_info *target) ++{ ++ u32 val; ++ ++ memcpy(&board, target, sizeof(board)); ++ ++ /* setup pin multiplexing depending on board enabled device, ++ * this has to be done this early since PCI init is done ++ * inside arch_initcall */ ++ val = 0; ++ ++#ifdef CONFIG_PCI ++ if (board.has_pci) { ++ bcm63xx_pci_enabled = 1; ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G2_PCI; ++ } ++#endif ++ ++ if (board.has_pccard) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G1_MII_PCCARD; ++ } ++ ++ if (board.has_enet0 && !board.enet0.use_internal_phy) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G3_EXT_MII | ++ GPIO_MODE_6348_G0_EXT_MII; ++ } ++ ++ if (board.has_enet1 && !board.enet1.use_internal_phy) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G3_EXT_MII | ++ GPIO_MODE_6348_G0_EXT_MII; ++ } ++ ++ bcm_gpio_writel(val, GPIO_MODE_REG); ++} ++ ++ ++/* ++ * second stage init callback, good time to panic if we couldn't ++ * identify on which board we're running since early printk is working ++ */ ++void __init board_setup(void) ++{ ++ if (!board.name[0]) ++ panic("unable to detect bcm963xx board"); ++ printk(KERN_INFO PFX "board name: %s\n", board.name); ++ ++ /* make sure we're running on expected cpu */ ++ if (bcm63xx_get_cpu_id() != board.expected_cpu_id) ++ panic("unexpected CPU for bcm963xx board"); ++} ++ ++static struct gpio_led_platform_data bcm63xx_led_data; ++ ++static struct platform_device bcm63xx_gpio_leds = { ++ .name = "leds-gpio", ++ .id = 0, ++ .dev.platform_data = &bcm63xx_led_data, ++}; ++ ++/* ++ * third stage init callback, register all board devices. ++ */ ++int __init board_register_devices(void) ++{ ++ if (board.has_uart0) ++ bcm63xx_uart_register(0); ++ ++ if (board.has_uart1) ++ bcm63xx_uart_register(1); ++ ++ if (board.has_pccard) ++ bcm63xx_pcmcia_register(); ++ ++ if (board.has_enet0 && ++ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) ++ bcm63xx_enet_register(0, &board.enet0); ++ ++ if (board.has_enet1 && ++ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) ++ bcm63xx_enet_register(1, &board.enet1); ++ ++ if (board.has_enetsw && ++ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) ++ bcm63xx_enetsw_register(&board.enetsw); ++ ++ if (board.has_usbd) ++ bcm63xx_usbd_register(&board.usbd); ++ ++ if (board.has_ehci0) ++ bcm63xx_ehci_register(); ++ ++ if (board.has_ohci0) ++ bcm63xx_ohci_register(); ++ ++ if (board.has_dsp) ++ bcm63xx_dsp_register(&board.dsp); ++ ++ /* Generate MAC address for WLAN and register our SPROM, ++ * do this after registering enet devices ++ */ ++#ifdef CONFIG_SSB_PCIHOST ++ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { ++ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); ++ if (ssb_arch_register_fallback_sprom( ++ &bcm63xx_get_fallback_sprom) < 0) ++ pr_err(PFX "failed to register fallback SPROM\n"); ++ } ++#endif ++ ++ bcm63xx_spi_register(); ++ ++ bcm63xx_hsspi_register(); ++ ++ bcm63xx_flash_register(); ++ ++ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); ++ bcm63xx_led_data.leds = board.leds; ++ ++ platform_device_register(&bcm63xx_gpio_leds); ++ ++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) ++ gpio_request_one(board.ephy_reset_gpio, ++ board.ephy_reset_gpio_flags, "ephy-reset"); ++ ++ return 0; ++} +--- /dev/null ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -0,0 +1,8 @@ ++#ifndef __BOARD_COMMON_H ++#define __BOARD_COMMON_H ++ ++#include ++ ++void board_early_setup(const struct board_info *board); ++ ++#endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.14/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch b/target/linux/brcm63xx/patches-4.14/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch new file mode 100644 index 000000000..f94ce7029 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch @@ -0,0 +1,100 @@ +From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 04:08:06 +0100 +Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board + setup + +Pass a mac address allocator to board setup code to allow board +implementations to work with third party bootloaders not using nvram +for configuration storage. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++- + arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------ + arch/mips/bcm63xx/boards/board_common.h | 3 ++- + 3 files changed, 14 insertions(+), 8 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -743,7 +743,8 @@ void __init board_prom_init(void) + if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) + continue; + /* copy, board desc array is marked initdata */ +- board_early_setup(bcm963xx_boards[i]); ++ board_early_setup(bcm963xx_boards[i], ++ bcm63xx_nvram_get_mac_address); + break; + } + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -18,7 +18,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -82,15 +81,20 @@ const char *board_get_name(void) + return board.name; + } + ++static int (*board_get_mac_address)(u8 mac[ETH_ALEN]); ++ + /* + * setup board for device registration + */ +-void __init board_early_setup(const struct board_info *target) ++void __init board_early_setup(const struct board_info *target, ++ int (*get_mac_address)(u8 mac[ETH_ALEN])) + { + u32 val; + + memcpy(&board, target, sizeof(board)); + ++ board_get_mac_address = get_mac_address; ++ + /* setup pin multiplexing depending on board enabled device, + * this has to be done this early since PCI init is done + * inside arch_initcall */ +@@ -163,15 +167,15 @@ int __init board_register_devices(void) + bcm63xx_pcmcia_register(); + + if (board.has_enet0 && +- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) ++ !board_get_mac_address(board.enet0.mac_addr)) + bcm63xx_enet_register(0, &board.enet0); + + if (board.has_enet1 && +- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) ++ !board_get_mac_address(board.enet1.mac_addr)) + bcm63xx_enet_register(1, &board.enet1); + + if (board.has_enetsw && +- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) ++ !board_get_mac_address(board.enetsw.mac_addr)) + bcm63xx_enetsw_register(&board.enetsw); + + if (board.has_usbd) +@@ -190,7 +194,7 @@ int __init board_register_devices(void) + * do this after registering enet devices + */ + #ifdef CONFIG_SSB_PCIHOST +- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { ++ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { + memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); + if (ssb_arch_register_fallback_sprom( +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -3,6 +3,7 @@ + + #include + +-void board_early_setup(const struct board_info *board); ++void board_early_setup(const struct board_info *board, ++ int (*get_mac_address)(u8 mac[ETH_ALEN])); + + #endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.14/309-cfe_version_mod.patch b/target/linux/brcm63xx/patches-4.14/309-cfe_version_mod.patch new file mode 100644 index 000000000..3421ac3eb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/309-cfe_version_mod.patch @@ -0,0 +1,27 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -723,10 +723,20 @@ void __init board_prom_init(void) + + /* dump cfe version */ + cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; +- if (!memcmp(cfe, "cfe-v", 5)) +- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", +- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); +- else ++ if (strstarts(cfe, "cfe-")) { ++ if(cfe[4] == 'v') { ++ if(cfe[5] == 'd') ++ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]); ++ else if (cfe[10] > 0) ++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u", ++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]); ++ else ++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", ++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); ++ } else { ++ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]); ++ } ++ } else + strcpy(cfe_version, "unknown"); + pr_info("CFE version: %s\n", cfe_version); + diff --git a/target/linux/brcm63xx/patches-4.14/310-cfe_simplify_detection.patch b/target/linux/brcm63xx/patches-4.14/310-cfe_simplify_detection.patch new file mode 100644 index 000000000..0e4e759ab --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/310-cfe_simplify_detection.patch @@ -0,0 +1,20 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h +@@ -2,6 +2,8 @@ + #ifndef BCM63XX_BOARD_H_ + #define BCM63XX_BOARD_H_ + ++#include ++ + const char *board_get_name(void); + + void board_prom_init(void); +@@ -10,4 +12,8 @@ void board_setup(void); + + int board_register_devices(void); + ++static inline bool bcm63xx_is_cfe_present(void) { ++ return fw_arg3 == 0x43464531; ++} ++ + #endif /* ! BCM63XX_BOARD_H_ */ diff --git a/target/linux/brcm63xx/patches-4.14/311-bcm63xxpart_use_cfedetection.patch b/target/linux/brcm63xx/patches-4.14/311-bcm63xxpart_use_cfedetection.patch new file mode 100644 index 000000000..bca6adbf3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/311-bcm63xxpart_use_cfedetection.patch @@ -0,0 +1,51 @@ +--- a/drivers/mtd/bcm63xxpart.c ++++ b/drivers/mtd/bcm63xxpart.c +@@ -35,6 +35,8 @@ + #include + #include + #include ++ ++#include + + #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */ + +@@ -46,30 +48,6 @@ + #define STR_NULL_TERMINATE(x) \ + do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0) + +-static int bcm63xx_detect_cfe(struct mtd_info *master) +-{ +- char buf[9]; +- int ret; +- size_t retlen; +- +- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen, +- (void *)buf); +- buf[retlen] = 0; +- +- if (ret) +- return ret; +- +- if (strncmp("cfe-v", buf, 5) == 0) +- return 0; +- +- /* very old CFE's do not have the cfe-v string, so check for magic */ +- ret = mtd_read(master, BCM963XX_CFE_MAGIC_OFFSET, 8, &retlen, +- (void *)buf); +- buf[retlen] = 0; +- +- return strncmp("CFE1CFE1", buf, 8); +-} +- + static int bcm63xx_read_nvram(struct mtd_info *master, + struct bcm963xx_nvram *nvram) + { +@@ -152,7 +130,7 @@ static int bcm63xx_parse_cfe_partitions( + struct bcm963xx_nvram *nvram = NULL; + int ret; + +- if (bcm63xx_detect_cfe(master)) ++ if (!bcm63xx_is_cfe_present()) + return -EINVAL; + + nvram = vzalloc(sizeof(*nvram)); diff --git a/target/linux/brcm63xx/patches-4.14/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch b/target/linux/brcm63xx/patches-4.14/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch new file mode 100644 index 000000000..7235d1f96 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch @@ -0,0 +1,455 @@ +From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:53:12 +0100 +Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq + controller + +Signed-off-by: Jonas Gorski +--- + .../brcm,bcm6345-periph-intc.txt | 50 +++ + drivers/irqchip/Kconfig | 4 + + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-bcm6345-periph.c | 339 ++++++++++++++++++++ + include/linux/irqchip/irq-bcm6345-periph.h | 16 + + 5 files changed, 410 insertions(+) + create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt + create mode 100644 drivers/irqchip/irq-bcm6345-periph.c + create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h + +--- /dev/null ++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt +@@ -0,0 +1,50 @@ ++Broadcom BCM6345 Level 1 periphery interrupt controller ++ ++This block is a interrupt controller that is typically connected directly ++to one of the HW INT lines on each CPU. Every BCM63XX xDSL chip since ++BCM6345 has contained this hardware. ++ ++Key elements of the hardware design include: ++ ++- 32, 64, or 128 incoming level IRQ lines ++ ++- All onchip peripherals are wired directly to an L2 input ++ ++- A separate instance of the register set for each CPU, allowing individual ++ peripheral IRQs to be routed to any CPU ++ ++- No atomic mask/unmask operations ++ ++- No polarity/level/edge settings ++ ++- No FIFO or priority encoder logic; software is expected to read all ++ 1-4 status words to determine which IRQs are pending ++ ++Required properties: ++ ++- compatible: Should be "brcm,bcm6345-periph-intc". ++- reg: Specifies the base physical address and size of the registers. ++ Multiple register addresses may be specified, and must match the amount of ++ parent interrupts. ++- interrupt-controller: Identifies the node as an interrupt controller. ++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt ++ source, should be 1. ++- interrupt-parent: Specifies the phandle to the parent interrupt controller ++ this one is cascaded from. ++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller ++ node, valid values depend on the type of parent interrupt controller. ++ Multiple lines are used to route interrupts to different cpus, with the first ++ assumed to be for the boot CPU. ++ ++Example: ++ ++periph_intc: interrupt-controller@f0406800 { ++ compatible = "brcm,bcm6345-periph-intc"; ++ reg = <0x10000020 0x10>, <0x10000030 0x10>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-parent = <&cpu_intc>; ++ interrupts = <2>, <3>; ++}; +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -114,6 +114,10 @@ config BRCMSTB_L2_IRQ + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + ++config BCM6345_PERIPH_IRQ ++ bool ++ select IRQ_DOMAIN ++ + config DW_APB_ICTL + bool + select GENERIC_IRQ_CHIP +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o + obj-$(CONFIG_IRQ_MXS) += irq-mxs.o + obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o + obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o ++obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o + obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o + obj-$(CONFIG_METAG) += irq-metag-ext.o + obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o +--- /dev/null ++++ b/drivers/irqchip/irq-bcm6345-periph.c +@@ -0,0 +1,339 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_BCM63XX ++#include ++ ++#define VIRQ_BASE IRQ_INTERNAL_BASE ++#else ++#define VIRQ_BASE 0 ++#endif ++ ++#define MAX_WORDS 4 ++#define MAX_PARENT_IRQS 2 ++#define IRQS_PER_WORD 32 ++ ++struct intc_block { ++ int parent_irq; ++ void __iomem *base; ++ void __iomem *en_reg[MAX_WORDS]; ++ void __iomem *status_reg[MAX_WORDS]; ++ u32 mask_cache[MAX_WORDS]; ++}; ++ ++struct intc_data { ++ struct irq_chip chip; ++ struct intc_block block[MAX_PARENT_IRQS]; ++ ++ int num_words; ++ ++ struct irq_domain *domain; ++ raw_spinlock_t lock; ++}; ++ ++static void bcm6345_periph_irq_handle(struct irq_desc *desc) ++{ ++ struct intc_data *data = irq_desc_get_handler_data(desc); ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct intc_block *block; ++ unsigned int irq = irq_desc_get_irq(desc); ++ unsigned int idx; ++ ++ chained_irq_enter(chip, desc); ++ ++ for (idx = 0; idx < MAX_PARENT_IRQS; idx++) ++ if (irq == data->block[idx].parent_irq) ++ block = &data->block[idx]; ++ ++ for (idx = 0; idx < data->num_words; idx++) { ++ int base = idx * IRQS_PER_WORD; ++ unsigned long pending; ++ int hw_irq; ++ ++ raw_spin_lock(&data->lock); ++ pending = __raw_readl(block->en_reg[idx]) & ++ __raw_readl(block->status_reg[idx]); ++ raw_spin_unlock(&data->lock); ++ ++ for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) { ++ int virq; ++ ++ virq = irq_find_mapping(data->domain, base + hw_irq); ++ generic_handle_irq(virq); ++ } ++ } ++ ++ chained_irq_exit(chip, desc); ++} ++ ++static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit, ++ bool enable) ++{ ++ u32 val; ++ ++ val = __raw_readl(block->en_reg[reg]); ++ if (enable) ++ val |= BIT(bit); ++ else ++ val &= ~BIT(bit); ++ __raw_writel(val, block->en_reg[reg]); ++} ++ ++static void bcm6345_periph_irq_mask(struct irq_data *data) ++{ ++ unsigned int i, reg, bit; ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ ++ reg = hwirq / IRQS_PER_WORD; ++ bit = hwirq % IRQS_PER_WORD; ++ ++ raw_spin_lock(&priv->lock); ++ for (i = 0; i < MAX_PARENT_IRQS; i++) { ++ struct intc_block *block = &priv->block[i]; ++ ++ if (!block->parent_irq) ++ break; ++ ++ __bcm6345_periph_enable(block, reg, bit, false); ++ } ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_periph_irq_unmask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ unsigned int i, reg, bit; ++ ++ reg = hwirq / IRQS_PER_WORD; ++ bit = hwirq % IRQS_PER_WORD; ++ ++ raw_spin_lock(&priv->lock); ++ for (i = 0; i < MAX_PARENT_IRQS; i++) { ++ struct intc_block *block = &priv->block[i]; ++ ++ if (!block->parent_irq) ++ break; ++ ++ if (block->mask_cache[reg] & BIT(bit)) ++ __bcm6345_periph_enable(block, reg, bit, true); ++ else ++ __bcm6345_periph_enable(block, reg, bit, false); ++ } ++ raw_spin_unlock(&priv->lock); ++} ++ ++#ifdef CONFIG_SMP ++static int bcm6345_periph_set_affinity(struct irq_data *data, ++ const struct cpumask *mask, bool force) ++{ ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ struct intc_data *priv = data->domain->host_data; ++ unsigned int i, reg, bit; ++ unsigned long flags; ++ bool enabled; ++ int cpu; ++ ++ reg = hwirq / IRQS_PER_WORD; ++ bit = hwirq % IRQS_PER_WORD; ++ ++ /* we could route to more than one cpu, but performance ++ suffers, so fix it to one. ++ */ ++ cpu = cpumask_any_and(mask, cpu_online_mask); ++ if (cpu >= nr_cpu_ids) ++ return -EINVAL; ++ ++ if (cpu >= MAX_PARENT_IRQS) ++ return -EINVAL; ++ ++ if (!priv->block[cpu].parent_irq) ++ return -EINVAL; ++ ++ raw_spin_lock_irqsave(&priv->lock, flags); ++ enabled = !irqd_irq_masked(data); ++ for (i = 0; i < MAX_PARENT_IRQS; i++) { ++ struct intc_block *block = &priv->block[i]; ++ ++ if (!block->parent_irq) ++ break; ++ ++ if (i == cpu) { ++ block->mask_cache[reg] |= BIT(bit); ++ __bcm6345_periph_enable(block, reg, bit, enabled); ++ } else { ++ block->mask_cache[reg] &= ~BIT(bit); ++ __bcm6345_periph_enable(block, reg, bit, false); ++ } ++ } ++ raw_spin_unlock_irqrestore(&priv->lock, flags); ++ ++ return 0; ++} ++#endif ++ ++static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq, ++ irq_hw_number_t hw) ++{ ++ struct intc_data *priv = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops bcm6345_periph_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = bcm6345_periph_map, ++}; ++ ++static int __init __bcm6345_periph_intc_init(struct device_node *node, ++ int num_blocks, int *irq, ++ void __iomem **base, int num_words) ++{ ++ struct intc_data *data; ++ unsigned int i, w, status_offset; ++ ++ data = kzalloc(sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ raw_spin_lock_init(&data->lock); ++ ++ status_offset = num_words * sizeof(u32); ++ ++ for (i = 0; i < num_blocks; i++) { ++ struct intc_block *block = &data->block[i]; ++ ++ block->parent_irq = irq[i]; ++ block->base = base[i]; ++ ++ for (w = 0; w < num_words; w++) { ++ int word_offset = sizeof(u32) * ((num_words - w) - 1); ++ ++ block->en_reg[w] = base[i] + word_offset; ++ block->status_reg[w] = base[i] + status_offset; ++ block->status_reg[w] += word_offset; ++ ++ /* route all interrupts to line 0 by default */ ++ if (i == 0) ++ block->mask_cache[w] = 0xffffffff; ++ } ++ ++ irq_set_handler_data(block->parent_irq, data); ++ irq_set_chained_handler(block->parent_irq, ++ bcm6345_periph_irq_handle); ++ } ++ ++ data->num_words = num_words; ++ ++ data->chip.name = "bcm6345-periph-intc"; ++ data->chip.irq_mask = bcm6345_periph_irq_mask; ++ data->chip.irq_unmask = bcm6345_periph_irq_unmask; ++ ++#ifdef CONFIG_SMP ++ if (num_blocks > 1) ++ data->chip.irq_set_affinity = bcm6345_periph_set_affinity; ++#endif ++ ++ data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words, ++ VIRQ_BASE, ++ &bcm6345_periph_domain_ops, data); ++ if (!data->domain) { ++ kfree(data); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++void __init bcm6345_periph_intc_init(int num_blocks, int *irq, ++ void __iomem **base, int num_words) ++{ ++ __bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words); ++} ++ ++#ifdef CONFIG_OF ++static int __init bcm6345_periph_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ struct resource res; ++ int num_irqs, ret = -EINVAL; ++ int irqs[MAX_PARENT_IRQS] = { 0 }; ++ void __iomem *bases[MAX_PARENT_IRQS] = { NULL }; ++ int words = 0; ++ int i; ++ ++ num_irqs = of_irq_count(node); ++ ++ if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS) ++ return -EINVAL; ++ ++ for (i = 0; i < num_irqs; i++) { ++ resource_size_t size; ++ ++ irqs[i] = irq_of_parse_and_map(node, i); ++ if (!irqs[i]) ++ goto out_unmap; ++ ++ if (of_address_to_resource(node, i, &res)) ++ goto out_unmap; ++ ++ size = resource_size(&res); ++ switch (size) { ++ case 8: ++ case 16: ++ case 32: ++ size = size / 8; ++ break; ++ default: ++ goto out_unmap; ++ } ++ ++ if (words && words != size) { ++ ret = -EINVAL; ++ goto out_unmap; ++ } ++ words = size; ++ ++ bases[i] = of_iomap(node, i); ++ if (!bases[i]) { ++ ret = -ENOMEM; ++ goto out_unmap; ++ } ++ } ++ ++ ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words); ++ if (!ret) ++ return 0; ++ ++out_unmap: ++ for (i = 0; i < num_irqs; i++) { ++ iounmap(bases[i]); ++ irq_dispose_mapping(irqs[i]); ++ } ++ ++ return ret; ++} ++ ++IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-l1-intc", ++ bcm6345_periph_of_init); ++#endif +--- /dev/null ++++ b/include/linux/irqchip/irq-bcm6345-periph.h +@@ -0,0 +1,16 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2008 Nicolas Schichan ++ */ ++ ++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H ++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H ++ ++void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base, ++ int num_words); ++ ++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */ diff --git a/target/linux/brcm63xx/patches-4.14/321-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/brcm63xx/patches-4.14/321-irqchip-add-support-for-bcm6345-style-external-inter.patch new file mode 100644 index 000000000..b5df0351b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/321-irqchip-add-support-for-bcm6345-style-external-inter.patch @@ -0,0 +1,394 @@ +From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:54:27 +0100 +Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external + interrupt controller + +Signed-off-by: Jonas Gorski +--- + .../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++ + drivers/irqchip/Kconfig | 4 + + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++ + include/linux/irqchip/irq-bcm6345-ext.h | 14 + + 5 files changed, 335 insertions(+) + create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt + create mode 100644 drivers/irqchip/irq-bcm6345-ext.c + create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h + +--- /dev/null ++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt +@@ -0,0 +1,29 @@ ++Broadcom BCM6345-style external interrupt controller ++ ++Required properties: ++ ++- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc". ++- reg: Specifies the base physical addresses and size of the registers. ++- interrupt-controller: identifies the node as an interrupt controller. ++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt ++ source, Should be 2. ++- interrupt-parent: Specifies the phandle to the parent interrupt controller ++ this one is cascaded from. ++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller ++ node, valid values depend on the type of parent interrupt controller. ++ ++Optional properties: ++ ++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the ++ register. Defaults to 4. ++ ++Example: ++ ++ext_intc: interrupt-controller@10000018 { ++ compatible = "brcm,bcm6345-ext-intc"; ++ interrupt-parent = <&periph_intc>; ++ #interrupt-cells = <2>; ++ reg = <0x10000018 0x4>; ++ interrupt-controller; ++ interrupts = <24>, <25>, <26>, <27>; ++}; +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -114,6 +114,10 @@ config BRCMSTB_L2_IRQ + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + ++config BCM6345_EXT_IRQ ++ bool ++ select IRQ_DOMAIN ++ + config BCM6345_PERIPH_IRQ + bool + select IRQ_DOMAIN +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o + obj-$(CONFIG_IRQ_MXS) += irq-mxs.o + obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o + obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o ++obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o + obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o + obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o + obj-$(CONFIG_METAG) += irq-metag-ext.o +--- /dev/null ++++ b/drivers/irqchip/irq-bcm6345-ext.c +@@ -0,0 +1,301 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_BCM63XX ++#include ++ ++#define VIRQ_BASE IRQ_EXTERNAL_BASE ++#else ++#define VIRQ_BASE 0 ++#endif ++ ++#define MAX_IRQS 4 ++ ++#define EXTIRQ_CFG_SENSE 0 ++#define EXTIRQ_CFG_STAT 1 ++#define EXTIRQ_CFG_CLEAR 2 ++#define EXTIRQ_CFG_MASK 3 ++#define EXTIRQ_CFG_BOTHEDGE 4 ++#define EXTIRQ_CFG_LEVELSENSE 5 ++ ++struct intc_data { ++ struct irq_chip chip; ++ struct irq_domain *domain; ++ raw_spinlock_t lock; ++ ++ int parent_irq[MAX_IRQS]; ++ void __iomem *reg; ++ int shift; ++ unsigned int toggle_clear_on_ack:1; ++}; ++ ++static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc) ++{ ++ struct intc_data *data = irq_desc_get_handler_data(desc); ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ unsigned int irq = irq_desc_get_irq(desc); ++ unsigned int idx; ++ ++ chained_irq_enter(chip, desc); ++ ++ for (idx = 0; idx < MAX_IRQS; idx++) { ++ if (data->parent_irq[idx] != irq) ++ continue; ++ ++ generic_handle_irq(irq_find_mapping(data->domain, idx)); ++ } ++ ++ chained_irq_exit(chip, desc); ++} ++ ++static void bcm6345_ext_intc_irq_ack(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)), ++ priv->reg); ++ if (priv->toggle_clear_on_ack) ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_mask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift)); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static int bcm6345_ext_intc_set_type(struct irq_data *data, ++ unsigned int flow_type) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ bool levelsense = 0, sense = 0, bothedge = 0; ++ u32 reg; ++ ++ flow_type &= IRQ_TYPE_SENSE_MASK; ++ ++ if (flow_type == IRQ_TYPE_NONE) ++ flow_type = IRQ_TYPE_LEVEL_LOW; ++ ++ switch (flow_type) { ++ case IRQ_TYPE_EDGE_BOTH: ++ bothedge = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_RISING: ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_FALLING: ++ break; ++ ++ case IRQ_TYPE_LEVEL_HIGH: ++ levelsense = 1; ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_LEVEL_LOW: ++ levelsense = 1; ++ break; ++ ++ default: ++ pr_err("bogus flow type combination given!\n"); ++ return -EINVAL; ++ } ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ ++ if (levelsense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift)); ++ if (sense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift)); ++ if (bothedge) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift)); ++ ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++ ++ irqd_set_trigger_type(data, flow_type); ++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) ++ irq_set_handler_locked(data, handle_level_irq); ++ else ++ irq_set_handler_locked(data, handle_edge_irq); ++ ++ return 0; ++} ++ ++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq, ++ irq_hw_number_t hw) ++{ ++ struct intc_data *priv = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops bcm6345_ext_domain_ops = { ++ .xlate = irq_domain_xlate_twocell, ++ .map = bcm6345_ext_intc_map, ++}; ++ ++static int __init __bcm6345_ext_intc_init(struct device_node *node, ++ int num_irqs, int *irqs, ++ void __iomem *reg, int shift, ++ bool toggle_clear_on_ack) ++{ ++ struct intc_data *data; ++ unsigned int i; ++ int start = VIRQ_BASE; ++ ++ data = kzalloc(sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ raw_spin_lock_init(&data->lock); ++ ++ for (i = 0; i < num_irqs; i++) { ++ data->parent_irq[i] = irqs[i]; ++ ++ irq_set_handler_data(irqs[i], data); ++ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle); ++ } ++ ++ data->reg = reg; ++ data->shift = shift; ++ data->toggle_clear_on_ack = toggle_clear_on_ack; ++ ++ data->chip.name = "bcm6345-ext-intc"; ++ data->chip.irq_ack = bcm6345_ext_intc_irq_ack; ++ data->chip.irq_mask = bcm6345_ext_intc_irq_mask; ++ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask; ++ data->chip.irq_set_type = bcm6345_ext_intc_set_type; ++ ++ /* ++ * If we have less than 4 irqs, this is the second controller on ++ * bcm63xx. So increase the VIRQ start to not overlap with the first ++ * one, but only do so if we actually use a non-zero start. ++ * ++ * This can be removed when bcm63xx has no legacy users anymore. ++ */ ++ if (start && num_irqs < 4) ++ start += 4; ++ ++ data->domain = irq_domain_add_simple(node, num_irqs, start, ++ &bcm6345_ext_domain_ops, data); ++ if (!data->domain) { ++ kfree(data); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg, ++ int shift) ++{ ++ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false); ++} ++ ++#ifdef CONFIG_OF ++static int __init bcm6345_ext_intc_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ int num_irqs, ret = -EINVAL; ++ unsigned i; ++ void __iomem *base; ++ int irqs[MAX_IRQS] = { 0 }; ++ u32 shift; ++ bool toggle_clear_on_ack = false; ++ ++ num_irqs = of_irq_count(node); ++ ++ if (!num_irqs || num_irqs > MAX_IRQS) ++ return -EINVAL; ++ ++ if (of_property_read_u32(node, "brcm,field-width", &shift)) ++ shift = 4; ++ ++ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */ ++ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc")) ++ toggle_clear_on_ack = true; ++ ++ for (i = 0; i < num_irqs; i++) { ++ irqs[i] = irq_of_parse_and_map(node, i); ++ if (!irqs[i]) { ++ ret = -ENOMEM; ++ goto out_unmap; ++ } ++ } ++ ++ base = of_iomap(node, 0); ++ if (!base) ++ goto out_unmap; ++ ++ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift, ++ toggle_clear_on_ack); ++ if (!ret) ++ return 0; ++out_unmap: ++ iounmap(base); ++ ++ for (i = 0; i < num_irqs; i++) ++ irq_dispose_mapping(irqs[i]); ++ ++ return ret; ++} ++ ++IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc", ++ bcm6345_ext_intc_of_init); ++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc", ++ bcm6345_ext_intc_of_init); ++#endif +--- /dev/null ++++ b/include/linux/irqchip/irq-bcm6345-ext.h +@@ -0,0 +1,14 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++ ++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift); ++ ++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */ diff --git a/target/linux/brcm63xx/patches-4.14/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch b/target/linux/brcm63xx/patches-4.14/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch new file mode 100644 index 000000000..0e44117a3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch @@ -0,0 +1,695 @@ +From d2d2489e0a4b740abd980e9d1cad952d15bc2d9e Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:55:02 +0100 +Subject: [PATCH] MIPS: BCM63XX: switch to IRQ_DOMAIN + +Now that we have working IRQ_DOMAIN drivers for both interrupt controllers, +switch to using them. + +Signed-off-by: Jonas Gorski +--- + arch/mips/Kconfig | 3 + + arch/mips/bcm63xx/irq.c | 612 +++++++++--------------------------------------- + 2 files changed, 108 insertions(+), 507 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -271,6 +271,9 @@ config BCM63XX + select SYNC_R4K + select DMA_NONCOHERENT + select IRQ_MIPS_CPU ++ select BCM6345_EXT_IRQ ++ select BCM6345_PERIPH_IRQ ++ select IRQ_DOMAIN + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_HAS_EARLY_PRINTK +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -11,7 +11,9 @@ + #include + #include + #include +-#include ++#include ++#include ++#include + #include + #include + #include +@@ -19,544 +21,140 @@ + #include + #include + +- +-static DEFINE_SPINLOCK(ipic_lock); +-static DEFINE_SPINLOCK(epic_lock); +- +-static u32 irq_stat_addr[2]; +-static u32 irq_mask_addr[2]; +-static void (*dispatch_internal)(int cpu); +-static int is_ext_irq_cascaded; +-static unsigned int ext_irq_count; +-static unsigned int ext_irq_start, ext_irq_end; +-static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2; +-static void (*internal_irq_mask)(struct irq_data *d); +-static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m); +- +- +-static inline u32 get_ext_irq_perf_reg(int irq) +-{ +- if (irq < 4) +- return ext_irq_cfg_reg1; +- return ext_irq_cfg_reg2; +-} +- +-static inline void handle_internal(int intbit) +-{ +- if (is_ext_irq_cascaded && +- intbit >= ext_irq_start && intbit <= ext_irq_end) +- do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE); +- else +- do_IRQ(intbit + IRQ_INTERNAL_BASE); +-} +- +-static inline int enable_irq_for_cpu(int cpu, struct irq_data *d, +- const struct cpumask *m) +-{ +- bool enable = cpu_online(cpu); +- +-#ifdef CONFIG_SMP +- if (m) +- enable &= cpumask_test_cpu(cpu, m); +- else if (irqd_affinity_was_set(d)) +- enable &= cpumask_test_cpu(cpu, irq_data_get_affinity_mask(d)); +-#endif +- return enable; +-} +- +-/* +- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not +- * prioritize any interrupt relatively to another. the static counter +- * will resume the loop where it ended the last time we left this +- * function. +- */ +- +-#define BUILD_IPIC_INTERNAL(width) \ +-void __dispatch_internal_##width(int cpu) \ +-{ \ +- u32 pending[width / 32]; \ +- unsigned int src, tgt; \ +- bool irqs_pending = false; \ +- static unsigned int i[2]; \ +- unsigned int *next = &i[cpu]; \ +- unsigned long flags; \ +- \ +- /* read registers in reverse order */ \ +- spin_lock_irqsave(&ipic_lock, flags); \ +- for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \ +- u32 val; \ +- \ +- val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \ +- val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \ +- pending[--tgt] = val; \ +- \ +- if (val) \ +- irqs_pending = true; \ +- } \ +- spin_unlock_irqrestore(&ipic_lock, flags); \ +- \ +- if (!irqs_pending) \ +- return; \ +- \ +- while (1) { \ +- unsigned int to_call = *next; \ +- \ +- *next = (*next + 1) & (width - 1); \ +- if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \ +- handle_internal(to_call); \ +- break; \ +- } \ +- } \ +-} \ +- \ +-static void __internal_irq_mask_##width(struct irq_data *d) \ +-{ \ +- u32 val; \ +- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \ +- unsigned reg = (irq / 32) ^ (width/32 - 1); \ +- unsigned bit = irq & 0x1f; \ +- unsigned long flags; \ +- int cpu; \ +- \ +- spin_lock_irqsave(&ipic_lock, flags); \ +- for_each_present_cpu(cpu) { \ +- if (!irq_mask_addr[cpu]) \ +- break; \ +- \ +- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\ +- val &= ~(1 << bit); \ +- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\ +- } \ +- spin_unlock_irqrestore(&ipic_lock, flags); \ +-} \ +- \ +-static void __internal_irq_unmask_##width(struct irq_data *d, \ +- const struct cpumask *m) \ +-{ \ +- u32 val; \ +- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \ +- unsigned reg = (irq / 32) ^ (width/32 - 1); \ +- unsigned bit = irq & 0x1f; \ +- unsigned long flags; \ +- int cpu; \ +- \ +- spin_lock_irqsave(&ipic_lock, flags); \ +- for_each_present_cpu(cpu) { \ +- if (!irq_mask_addr[cpu]) \ +- break; \ +- \ +- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\ +- if (enable_irq_for_cpu(cpu, d, m)) \ +- val |= (1 << bit); \ +- else \ +- val &= ~(1 << bit); \ +- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\ +- } \ +- spin_unlock_irqrestore(&ipic_lock, flags); \ +-} +- +-BUILD_IPIC_INTERNAL(32); +-BUILD_IPIC_INTERNAL(64); +- +-asmlinkage void plat_irq_dispatch(void) +-{ +- u32 cause; +- +- do { +- cause = read_c0_cause() & read_c0_status() & ST0_IM; +- +- if (!cause) +- break; +- +- if (cause & CAUSEF_IP7) +- do_IRQ(7); +- if (cause & CAUSEF_IP0) +- do_IRQ(0); +- if (cause & CAUSEF_IP1) +- do_IRQ(1); +- if (cause & CAUSEF_IP2) +- dispatch_internal(0); +- if (is_ext_irq_cascaded) { +- if (cause & CAUSEF_IP3) +- dispatch_internal(1); +- } else { +- if (cause & CAUSEF_IP3) +- do_IRQ(IRQ_EXT_0); +- if (cause & CAUSEF_IP4) +- do_IRQ(IRQ_EXT_1); +- if (cause & CAUSEF_IP5) +- do_IRQ(IRQ_EXT_2); +- if (cause & CAUSEF_IP6) +- do_IRQ(IRQ_EXT_3); +- } +- } while (1); +-} +- +-/* +- * internal IRQs operations: only mask/unmask on PERF irq mask +- * register. +- */ +-static void bcm63xx_internal_irq_mask(struct irq_data *d) +-{ +- internal_irq_mask(d); +-} +- +-static void bcm63xx_internal_irq_unmask(struct irq_data *d) +-{ +- internal_irq_unmask(d, NULL); +-} +- +-/* +- * external IRQs operations: mask/unmask and clear on PERF external +- * irq control register. +- */ +-static void bcm63xx_external_irq_mask(struct irq_data *d) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- unsigned long flags; +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- +- if (BCMCPU_IS_6348()) +- reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4); +- else +- reg &= ~EXTIRQ_CFG_MASK(irq % 4); +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +- +- if (is_ext_irq_cascaded) +- internal_irq_mask(irq_get_irq_data(irq + ext_irq_start)); +-} +- +-static void bcm63xx_external_irq_unmask(struct irq_data *d) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- unsigned long flags; +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- +- if (BCMCPU_IS_6348()) +- reg |= EXTIRQ_CFG_MASK_6348(irq % 4); +- else +- reg |= EXTIRQ_CFG_MASK(irq % 4); +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +- +- if (is_ext_irq_cascaded) +- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start), +- NULL); +-} +- +-static void bcm63xx_external_irq_clear(struct irq_data *d) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- unsigned long flags; +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- +- if (BCMCPU_IS_6348()) +- reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4); +- else +- reg |= EXTIRQ_CFG_CLEAR(irq % 4); +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +-} +- +-static int bcm63xx_external_irq_set_type(struct irq_data *d, +- unsigned int flow_type) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- int levelsense, sense, bothedge; +- unsigned long flags; +- +- flow_type &= IRQ_TYPE_SENSE_MASK; +- +- if (flow_type == IRQ_TYPE_NONE) +- flow_type = IRQ_TYPE_LEVEL_LOW; +- +- levelsense = sense = bothedge = 0; +- switch (flow_type) { +- case IRQ_TYPE_EDGE_BOTH: +- bothedge = 1; +- break; +- +- case IRQ_TYPE_EDGE_RISING: +- sense = 1; +- break; +- +- case IRQ_TYPE_EDGE_FALLING: +- break; +- +- case IRQ_TYPE_LEVEL_HIGH: +- levelsense = 1; +- sense = 1; +- break; +- +- case IRQ_TYPE_LEVEL_LOW: +- levelsense = 1; +- break; +- +- default: +- pr_err("bogus flow type combination given !\n"); +- return -EINVAL; +- } +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- irq %= 4; +- +- switch (bcm63xx_get_cpu_id()) { +- case BCM6348_CPU_ID: +- if (levelsense) +- reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq); +- else +- reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq); +- if (sense) +- reg |= EXTIRQ_CFG_SENSE_6348(irq); +- else +- reg &= ~EXTIRQ_CFG_SENSE_6348(irq); +- if (bothedge) +- reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq); +- else +- reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); +- break; +- +- case BCM3368_CPU_ID: +- case BCM6328_CPU_ID: +- case BCM6338_CPU_ID: +- case BCM6345_CPU_ID: +- case BCM6358_CPU_ID: +- case BCM6362_CPU_ID: +- case BCM6368_CPU_ID: +- if (levelsense) +- reg |= EXTIRQ_CFG_LEVELSENSE(irq); +- else +- reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); +- if (sense) +- reg |= EXTIRQ_CFG_SENSE(irq); +- else +- reg &= ~EXTIRQ_CFG_SENSE(irq); +- if (bothedge) +- reg |= EXTIRQ_CFG_BOTHEDGE(irq); +- else +- reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); +- break; +- default: +- BUG(); +- } +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +- +- irqd_set_trigger_type(d, flow_type); +- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) +- irq_set_handler_locked(d, handle_level_irq); +- else +- irq_set_handler_locked(d, handle_edge_irq); +- +- return IRQ_SET_MASK_OK_NOCOPY; +-} +- +-#ifdef CONFIG_SMP +-static int bcm63xx_internal_set_affinity(struct irq_data *data, +- const struct cpumask *dest, +- bool force) +-{ +- if (!irqd_irq_disabled(data)) +- internal_irq_unmask(data, dest); +- +- return 0; +-} +-#endif +- +-static struct irq_chip bcm63xx_internal_irq_chip = { +- .name = "bcm63xx_ipic", +- .irq_mask = bcm63xx_internal_irq_mask, +- .irq_unmask = bcm63xx_internal_irq_unmask, +-}; +- +-static struct irq_chip bcm63xx_external_irq_chip = { +- .name = "bcm63xx_epic", +- .irq_ack = bcm63xx_external_irq_clear, +- +- .irq_mask = bcm63xx_external_irq_mask, +- .irq_unmask = bcm63xx_external_irq_unmask, +- +- .irq_set_type = bcm63xx_external_irq_set_type, +-}; +- +-static struct irqaction cpu_ip2_cascade_action = { +- .handler = no_action, +- .name = "cascade_ip2", +- .flags = IRQF_NO_THREAD, +-}; +- +-#ifdef CONFIG_SMP +-static struct irqaction cpu_ip3_cascade_action = { +- .handler = no_action, +- .name = "cascade_ip3", +- .flags = IRQF_NO_THREAD, +-}; +-#endif +- +-static struct irqaction cpu_ext_cascade_action = { +- .handler = no_action, +- .name = "cascade_extirq", +- .flags = IRQF_NO_THREAD, +-}; +- +-static void bcm63xx_init_irq(void) ++void __init arch_init_irq(void) + { +- int irq_bits; +- +- irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF); +- irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF); +- irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF); +- irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF); ++ void __iomem *periph_bases[2]; ++ void __iomem *ext_intc_bases[2]; ++ int periph_irq_count, periph_width, ext_irq_count, ext_shift; ++ int periph_irqs[2] = { 2, 3 }; ++ int ext_irqs[6]; ++ ++ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); ++ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); ++ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); ++ ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); + + switch (bcm63xx_get_cpu_id()) { + case BCM3368_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_3368_REG; +- irq_mask_addr[0] += PERF_IRQMASK_3368_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368; ++ periph_bases[0] += PERF_IRQMASK_3368_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_3368_EXT_IRQ0; ++ ext_irqs[1] = BCM_3368_EXT_IRQ1; ++ ext_irqs[2] = BCM_3368_EXT_IRQ2; ++ ext_irqs[3] = BCM_3368_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6328_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1); +- irq_bits = 64; +- ext_irq_count = 4; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328; ++ periph_bases[0] += PERF_IRQMASK_6328_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6328_REG(1); ++ periph_irq_count = 2; ++ periph_width = 2; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6328_EXT_IRQ0; ++ ext_irqs[1] = BCM_6328_EXT_IRQ1; ++ ext_irqs[2] = BCM_6328_EXT_IRQ2; ++ ext_irqs[3] = BCM_6328_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6338_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6338_REG; +- irq_mask_addr[0] += PERF_IRQMASK_6338_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338; ++ periph_bases[0] += PERF_IRQMASK_6338_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338; ++ ext_irq_count = 4; ++ ext_irqs[0] = 3; ++ ext_irqs[1] = 4; ++ ext_irqs[2] = 5; ++ ext_irqs[3] = 6; ++ ext_shift = 4; + break; + case BCM6345_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6345_REG; +- irq_mask_addr[0] += PERF_IRQMASK_6345_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345; ++ periph_bases[0] += PERF_IRQMASK_6345_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345; ++ ext_irq_count = 4; ++ ext_irqs[0] = 3; ++ ext_irqs[1] = 4; ++ ext_irqs[2] = 5; ++ ext_irqs[3] = 6; ++ ext_shift = 4; + break; + case BCM6348_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6348_REG; +- irq_mask_addr[0] += PERF_IRQMASK_6348_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348; ++ periph_bases[0] += PERF_IRQMASK_6348_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348; ++ ext_irq_count = 4; ++ ext_irqs[0] = 3; ++ ext_irqs[1] = 4; ++ ext_irqs[2] = 5; ++ ext_irqs[3] = 6; ++ ext_shift = 5; + break; + case BCM6358_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1); +- irq_bits = 32; +- ext_irq_count = 4; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358; ++ periph_bases[0] += PERF_IRQMASK_6358_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6358_REG(1); ++ periph_irq_count = 2; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6358_EXT_IRQ0; ++ ext_irqs[1] = BCM_6358_EXT_IRQ1; ++ ext_irqs[2] = BCM_6358_EXT_IRQ2; ++ ext_irqs[3] = BCM_6358_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6362_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1); +- irq_bits = 64; +- ext_irq_count = 4; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362; ++ periph_bases[0] += PERF_IRQMASK_6362_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6362_REG(1); ++ periph_irq_count = 2; ++ periph_width = 2; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6362_EXT_IRQ0; ++ ext_irqs[1] = BCM_6362_EXT_IRQ1; ++ ext_irqs[2] = BCM_6362_EXT_IRQ2; ++ ext_irqs[3] = BCM_6362_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6368_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1); +- irq_bits = 64; ++ periph_bases[0] += PERF_IRQMASK_6368_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6368_REG(1); ++ periph_irq_count = 2; ++ periph_width = 2; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368; ++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368; + ext_irq_count = 6; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368; +- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368; ++ ext_irqs[0] = BCM_6368_EXT_IRQ0; ++ ext_irqs[1] = BCM_6368_EXT_IRQ1; ++ ext_irqs[2] = BCM_6368_EXT_IRQ2; ++ ext_irqs[3] = BCM_6368_EXT_IRQ3; ++ ext_irqs[4] = BCM_6368_EXT_IRQ4; ++ ext_irqs[5] = BCM_6368_EXT_IRQ5; ++ ext_shift = 4; + break; + default: + BUG(); + } + +- if (irq_bits == 32) { +- dispatch_internal = __dispatch_internal_32; +- internal_irq_mask = __internal_irq_mask_32; +- internal_irq_unmask = __internal_irq_unmask_32; +- } else { +- dispatch_internal = __dispatch_internal_64; +- internal_irq_mask = __internal_irq_mask_64; +- internal_irq_unmask = __internal_irq_unmask_64; +- } +-} +- +-void __init arch_init_irq(void) +-{ +- int i; +- +- bcm63xx_init_irq(); + mips_cpu_irq_init(); +- for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) +- irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip, +- handle_level_irq); +- +- for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i) +- irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip, +- handle_edge_irq); +- +- if (!is_ext_irq_cascaded) { +- for (i = 3; i < 3 + ext_irq_count; ++i) +- setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action); +- } +- +- setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action); +-#ifdef CONFIG_SMP +- if (is_ext_irq_cascaded) { +- setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action); +- bcm63xx_internal_irq_chip.irq_set_affinity = +- bcm63xx_internal_set_affinity; +- +- cpumask_clear(irq_default_affinity); +- cpumask_set_cpu(smp_processor_id(), irq_default_affinity); +- } +-#endif ++ bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases, ++ periph_width); ++ bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift); ++ if (ext_irq_count > 4) ++ bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1], ++ ext_shift); + } diff --git a/target/linux/brcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch b/target/linux/brcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch new file mode 100644 index 000000000..e911f0ead --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch @@ -0,0 +1,57 @@ +From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 20:20:30 +0100 +Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4 + and 5 + +Due to the external interrupts being non consecutive, the previous +implementation did not support them. Now that we treat both registers +as separate irq controllers, there is no such limitation anymore and +we can expose them for drivers to use. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/irq.c | 5 ++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 + + 3 files changed, 7 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -108,11 +108,14 @@ void __init arch_init_irq(void) + periph_width = 1; + + ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358; +- ext_irq_count = 4; ++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358; ++ ext_irq_count = 6; + ext_irqs[0] = BCM_6358_EXT_IRQ0; + ext_irqs[1] = BCM_6358_EXT_IRQ1; + ext_irqs[2] = BCM_6358_EXT_IRQ2; + ext_irqs[3] = BCM_6358_EXT_IRQ3; ++ ext_irqs[4] = BCM_6358_EXT_IRQ4; ++ ext_irqs[5] = BCM_6358_EXT_IRQ5; + ext_shift = 4; + break; + case BCM6362_CPU_ID: +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -896,6 +896,8 @@ enum bcm63xx_irq { + #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26) + #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27) + #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28) ++#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20) ++#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21) + + /* + * 6362 irqs +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -244,6 +244,7 @@ + #define PERF_EXTIRQ_CFG_REG_6362 0x18 + #define PERF_EXTIRQ_CFG_REG_6368 0x18 + ++#define PERF_EXTIRQ_CFG_REG2_6358 0x1c + #define PERF_EXTIRQ_CFG_REG2_6368 0x1c + + /* for 6348 only */ diff --git a/target/linux/brcm63xx/patches-4.14/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch b/target/linux/brcm63xx/patches-4.14/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch new file mode 100644 index 000000000..07d3f9dbc --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch @@ -0,0 +1,77 @@ +From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:08:36 +0100 +Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper + +--- + arch/mips/bcm63xx/cpu.c | 10 ++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++ + 2 files changed, 28 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs); + u16 bcm63xx_cpu_id __read_mostly; + EXPORT_SYMBOL(bcm63xx_cpu_id); + ++static u32 bcm63xx_cpu_variant __read_mostly; ++ + static u8 bcm63xx_cpu_rev; + static unsigned int bcm63xx_cpu_freq; + static unsigned int bcm63xx_memory_size; +@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = { + + }; + ++u32 bcm63xx_get_cpu_variant(void) ++{ ++ return bcm63xx_cpu_variant; ++} ++ ++EXPORT_SYMBOL(bcm63xx_get_cpu_variant); ++ + u8 bcm63xx_get_cpu_rev(void) + { + return bcm63xx_cpu_rev; +@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void) + /* read out CPU type */ + tmp = bcm_readl(chipid_reg); + bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; ++ bcm63xx_cpu_variant = bcm63xx_cpu_id; + bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT; + + switch (bcm63xx_cpu_id) { +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -20,6 +20,7 @@ + #define BCM6368_CPU_ID 0x6368 + + void __init bcm63xx_cpu_init(void); ++u32 bcm63xx_get_cpu_variant(void); + u8 bcm63xx_get_cpu_rev(void); + unsigned int bcm63xx_get_cpu_freq(void); + +@@ -83,6 +84,23 @@ static inline u16 __pure bcm63xx_get_cpu + #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID) + #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID) + ++#define BCMCPU_VARIANT_IS_3368() \ ++ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6328() \ ++ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID) ++#define BCMCPU_VARIANT_IS_6338() \ ++ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID) ++#define BCMCPU_VARIANT_IS_6345() \ ++ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID) ++#define BCMCPU_VARIANT_IS_6348() \ ++ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID) ++#define BCMCPU_VARIANT_IS_6358() \ ++ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID) ++#define BCMCPU_VARIANT_IS_6362() \ ++ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) ++#define BCMCPU_VARIANT_IS_6368() \ ++ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) ++ + /* + * While registers sets are (mostly) the same across 63xx CPU, base + * address of these sets do change. diff --git a/target/linux/brcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch new file mode 100644 index 000000000..57af83685 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/331-MIPS-BCM63XX-define-variant-id-field.patch @@ -0,0 +1,23 @@ +From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:22:41 +0100 +Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field + +Some SoC have a variant id field in the chip id register. + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -10,6 +10,8 @@ + #define PERF_REV_REG 0x0 + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) ++#define REV_VARID_SHIFT 12 ++#define REV_VARID_MASK (0xf << REV_VARID_SHIFT) + #define REV_REVID_SHIFT 0 + #define REV_REVID_MASK (0xff << REV_REVID_SHIFT) + diff --git a/target/linux/brcm63xx/patches-4.14/332-MIPS-BCM63XX-detect-BCM6328-variants.patch b/target/linux/brcm63xx/patches-4.14/332-MIPS-BCM63XX-detect-BCM6328-variants.patch new file mode 100644 index 000000000..a05a4b3e2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/332-MIPS-BCM63XX-detect-BCM6328-variants.patch @@ -0,0 +1,68 @@ +From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:30:59 +0100 +Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/cpu.c | 10 ++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++-- + 2 files changed, 16 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void) + unsigned int tmp; + unsigned int cpu = smp_processor_id(); + u32 chipid_reg; ++ u8 __maybe_unused varid = 0; + + /* soc registers location depends on cpu type */ + chipid_reg = 0; +@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void) + bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; + bcm63xx_cpu_variant = bcm63xx_cpu_id; + bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT; ++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT; + + switch (bcm63xx_cpu_id) { + case BCM3368_CPU_ID: +@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void) + case BCM6328_CPU_ID: + bcm63xx_regs_base = bcm6328_regs_base; + bcm63xx_irqs = bcm6328_irqs; ++ ++ if (varid == 1) ++ bcm63xx_cpu_variant = BCM63281_CPU_ID; ++ else if (varid == 3) ++ bcm63xx_cpu_variant = BCM63283_CPU_ID; ++ else ++ pr_warn("unknown BCM6328 variant: %x\n", varid); ++ + break; + case BCM6338_CPU_ID: + bcm63xx_regs_base = bcm6338_regs_base; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -12,6 +12,8 @@ + */ + #define BCM3368_CPU_ID 0x3368 + #define BCM6328_CPU_ID 0x6328 ++#define BCM63281_CPU_ID 0x63281 ++#define BCM63283_CPU_ID 0x63283 + #define BCM6338_CPU_ID 0x6338 + #define BCM6345_CPU_ID 0x6345 + #define BCM6348_CPU_ID 0x6348 +@@ -86,8 +88,10 @@ static inline u16 __pure bcm63xx_get_cpu + + #define BCMCPU_VARIANT_IS_3368() \ + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) +-#define BCMCPU_VARIANT_IS_6328() \ +- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID) ++#define BCMCPU_VARIANT_IS_63281() \ ++ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID) ++#define BCMCPU_VARIANT_IS_63283() \ ++ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID) + #define BCMCPU_VARIANT_IS_6338() \ + (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID) + #define BCMCPU_VARIANT_IS_6345() \ diff --git a/target/linux/brcm63xx/patches-4.14/333-MIPS-BCM63XX-detect-BCM6362-variants.patch b/target/linux/brcm63xx/patches-4.14/333-MIPS-BCM63XX-detect-BCM6362-variants.patch new file mode 100644 index 000000000..2efbf36d3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/333-MIPS-BCM63XX-detect-BCM6362-variants.patch @@ -0,0 +1,46 @@ +From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:33:28 +0100 +Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants + +--- + arch/mips/bcm63xx/cpu.c | 8 ++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++ + 2 files changed, 11 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void) + case BCM6362_CPU_ID: + bcm63xx_regs_base = bcm6362_regs_base; + bcm63xx_irqs = bcm6362_irqs; ++ ++ if (varid == 1) ++ bcm63xx_cpu_variant = BCM6362_CPU_ID; ++ else if (varid == 2) ++ bcm63xx_cpu_variant = BCM6361_CPU_ID; ++ else ++ pr_warn("unknown BCM6362 variant: %x\n", varid); ++ + break; + case BCM6368_CPU_ID: + bcm63xx_regs_base = bcm6368_regs_base; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -18,6 +18,7 @@ + #define BCM6345_CPU_ID 0x6345 + #define BCM6348_CPU_ID 0x6348 + #define BCM6358_CPU_ID 0x6358 ++#define BCM6361_CPU_ID 0x6361 + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 + +@@ -100,6 +101,8 @@ static inline u16 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID) + #define BCMCPU_VARIANT_IS_6358() \ + (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID) ++#define BCMCPU_VARIANT_IS_6361() \ ++ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID) + #define BCMCPU_VARIANT_IS_6362() \ + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) + #define BCMCPU_VARIANT_IS_6368() \ diff --git a/target/linux/brcm63xx/patches-4.14/334-MIPS-BCM63XX-detect-BCM6368-variants.patch b/target/linux/brcm63xx/patches-4.14/334-MIPS-BCM63XX-detect-BCM6368-variants.patch new file mode 100644 index 000000000..64bcd8f19 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/334-MIPS-BCM63XX-detect-BCM6368-variants.patch @@ -0,0 +1,48 @@ +From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:36:56 +0100 +Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants + +The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart +from missing DSL, there is no difference to BCM6368, so treat it such. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/cpu.c | 4 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++ + 2 files changed, 7 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void) + + break; + case BCM6368_CPU_ID: ++ case BCM6369_CPU_ID: + bcm63xx_regs_base = bcm6368_regs_base; + bcm63xx_irqs = bcm6368_irqs; ++ ++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */ ++ bcm63xx_cpu_id = BCM6368_CPU_ID; + break; + default: + panic("unsupported broadcom CPU %x", bcm63xx_cpu_id); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -21,6 +21,7 @@ + #define BCM6361_CPU_ID 0x6361 + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 ++#define BCM6369_CPU_ID 0x6369 + + void __init bcm63xx_cpu_init(void); + u32 bcm63xx_get_cpu_variant(void); +@@ -107,6 +108,8 @@ static inline u16 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) + #define BCMCPU_VARIANT_IS_6368() \ + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6369() \ ++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID) + + /* + * While registers sets are (mostly) the same across 63xx CPU, base diff --git a/target/linux/brcm63xx/patches-4.14/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch b/target/linux/brcm63xx/patches-4.14/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch new file mode 100644 index 000000000..54900d72a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch @@ -0,0 +1,20 @@ +From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 03:05:54 +0100 +Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size + +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -42,7 +42,7 @@ + BCM_CB_MEM_SIZE - 1) + + #define BCM_PCIE_MEM_BASE_PA 0x10f00000 +-#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024) ++#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024) + #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \ + BCM_PCIE_MEM_SIZE - 1) + diff --git a/target/linux/brcm63xx/patches-4.14/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch b/target/linux/brcm63xx/patches-4.14/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch new file mode 100644 index 000000000..05142a8e4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch @@ -0,0 +1,70 @@ +From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 03:13:06 +0100 +Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows + +Different SoCs use different memory windows (and sizes), so don't +hardcode it. +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++---- + arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++----- + 2 files changed, 14 insertions(+), 9 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -41,10 +41,10 @@ + #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \ + BCM_CB_MEM_SIZE - 1) + +-#define BCM_PCIE_MEM_BASE_PA 0x10f00000 +-#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024) +-#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \ +- BCM_PCIE_MEM_SIZE - 1) ++#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000 ++#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024) ++#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \ ++ BCM_PCIE_MEM_SIZE_6328 - 1) + + /* + * Internal registers are accessed through KSEG3 +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control + + static struct resource bcm_pcie_mem_resource = { + .name = "bcm63xx PCIe memory space", +- .start = BCM_PCIE_MEM_BASE_PA, +- .end = BCM_PCIE_MEM_END_PA, ++ .start = 0, ++ .end = 0, + .flags = IORESOURCE_MEM, + }; + +@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie( + bcm_pcie_writel(val, PCIE_CONFIG2_REG); + + /* set bar0 to little endian */ +- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT; +- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT; ++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT; ++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT; + val |= BASEMASK_REMAP_EN; + bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG); + +- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT; ++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT; + bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG); + + register_pci_controller(&bcm63xx_pcie_controller); +@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void) + if (!bcm63xx_pci_enabled) + return -ENODEV; + ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { ++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328; ++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328; ++ } ++ + switch (bcm63xx_get_cpu_id()) { + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.14/337-MIPS-BCM63XX-widen-cpuid-field.patch b/target/linux/brcm63xx/patches-4.14/337-MIPS-BCM63XX-widen-cpuid-field.patch new file mode 100644 index 000000000..c38b43112 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/337-MIPS-BCM63XX-widen-cpuid-field.patch @@ -0,0 +1,56 @@ +From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:54:51 +0100 +Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field + +--- + arch/mips/bcm63xx/cpu.c | 2 +- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++---- + 2 files changed, 5 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base); + const int *bcm63xx_irqs; + EXPORT_SYMBOL(bcm63xx_irqs); + +-u16 bcm63xx_cpu_id __read_mostly; ++u32 bcm63xx_cpu_id __read_mostly; + EXPORT_SYMBOL(bcm63xx_cpu_id); + + static u32 bcm63xx_cpu_variant __read_mostly; +@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi + + static unsigned int detect_cpu_clock(void) + { +- u16 cpu_id = bcm63xx_get_cpu_id(); ++ u32 cpu_id = bcm63xx_get_cpu_id(); + + switch (cpu_id) { + case BCM3368_CPU_ID: +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -28,7 +28,7 @@ u32 bcm63xx_get_cpu_variant(void); + u8 bcm63xx_get_cpu_rev(void); + unsigned int bcm63xx_get_cpu_freq(void); + +-static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id) ++static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id) + { + switch (cpu_id) { + #ifdef CONFIG_BCM63XX_CPU_3368 +@@ -70,11 +70,11 @@ static inline u16 __pure __bcm63xx_get_c + return cpu_id; + } + +-extern u16 bcm63xx_cpu_id; ++extern u32 bcm63xx_cpu_id; + +-static inline u16 __pure bcm63xx_get_cpu_id(void) ++static inline u32 __pure bcm63xx_get_cpu_id(void) + { +- const u16 cpu_id = bcm63xx_cpu_id; ++ const u32 cpu_id = bcm63xx_cpu_id; + + return __bcm63xx_get_cpu_id(cpu_id); + } diff --git a/target/linux/brcm63xx/patches-4.14/338-MIPS-BCM63XX-increase-number-of-IRQs.patch b/target/linux/brcm63xx/patches-4.14/338-MIPS-BCM63XX-increase-number-of-IRQs.patch new file mode 100644 index 000000000..1809a3cac --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/338-MIPS-BCM63XX-increase-number-of-IRQs.patch @@ -0,0 +1,39 @@ +From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 15 Dec 2013 20:46:26 +0100 +Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs + +Newer SoCs have 128 bit wide irq registers, thus 128 available internal +interupts. +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++- + arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +- + 2 files changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h +@@ -2,10 +2,12 @@ + #ifndef BCM63XX_IRQ_H_ + #define BCM63XX_IRQ_H_ + ++#include + #include + + #define IRQ_INTERNAL_BASE 8 +-#define IRQ_EXTERNAL_BASE 100 ++#define NR_INTERNAL_IRQS 128 ++#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS) + #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0) + #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1) + #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2) +--- a/arch/mips/include/asm/mach-bcm63xx/irq.h ++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h +@@ -2,7 +2,7 @@ + #ifndef __ASM_MACH_BCM63XX_IRQ_H + #define __ASM_MACH_BCM63XX_IRQ_H + +-#define NR_IRQS 128 ++#define NR_IRQS 256 + #define MIPS_CPU_IRQ_BASE 0 + + #endif diff --git a/target/linux/brcm63xx/patches-4.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch new file mode 100644 index 000000000..7de4dd621 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/339-MIPS-BCM63XX-add-support-for-BCM63268.patch @@ -0,0 +1,737 @@ +From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 17:14:17 +0100 +Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268 + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/Kconfig | 5 + + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/clk.c | 25 ++++- + arch/mips/bcm63xx/cpu.c | 59 +++++++++- + arch/mips/bcm63xx/dev-flash.c | 6 + + arch/mips/bcm63xx/dev-spi.c | 4 +- + arch/mips/bcm63xx/irq.c | 20 +++- + arch/mips/bcm63xx/reset.c | 21 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 130 ++++++++++++++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 + + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 79 +++++++++++++ + arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 + + 12 files changed, 342 insertions(+), 12 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -61,6 +61,11 @@ config BCM63XX_CPU_6368 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ ++config BCM63XX_CPU_63268 ++ bool "support 63268 CPU" ++ select SYS_HAS_CPU_BMIPS4350 ++ select HW_HAS_PCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -713,7 +713,7 @@ void __init board_prom_init(void) + /* read base address of boot chip select (0) + * 6328/6362 do not have MPI but boot from a fixed address + */ +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { + val = 0x18000000; + } else { + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -169,6 +169,8 @@ static void enetsw_set(struct clk *clk, + clk_disable_unlocked(&clk_swpkt_sar); + } + bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable); ++ } else if (BCMCPU_IS_63268()) { ++ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable); + } else { + return; + } +@@ -214,6 +216,8 @@ static void usbh_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); ++ else if (BCMCPU_IS_63268()) ++ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable); + else + return; + +@@ -236,6 +240,8 @@ static void usbd_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); ++ else if (BCMCPU_IS_63268()) ++ bcm_hwclock_set(CKCTL_63268_USBD_EN, enable); + else + return; + +@@ -262,9 +268,13 @@ static void spi_set(struct clk *clk, int + mask = CKCTL_6358_SPI_EN; + else if (BCMCPU_IS_6362()) + mask = CKCTL_6362_SPI_EN; +- else +- /* BCMCPU_IS_6368 */ ++ else if (BCMCPU_IS_6368()) + mask = CKCTL_6368_SPI_EN; ++ else if (BCMCPU_IS_63268()) ++ mask = CKCTL_63268_SPI_EN; ++ else ++ return; ++ + bcm_hwclock_set(mask, enable); + } + +@@ -283,6 +293,8 @@ static void hsspi_set(struct clk *clk, i + mask = CKCTL_6328_HSSPI_EN; + else if (BCMCPU_IS_6362()) + mask = CKCTL_6362_HSSPI_EN; ++ else if (BCMCPU_IS_63268()) ++ mask = CKCTL_63268_HSSPI_EN; + else + return; + +@@ -352,6 +364,8 @@ static void pcie_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable); + else if (BCMCPU_IS_6362()) + bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable); ++ else if (BCMCPU_IS_63268()) ++ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable); + } + + static struct clk clk_pcie = { +@@ -536,6 +550,21 @@ static struct clk_lookup bcm6368_clks[] + CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), + }; + ++static struct clk_lookup bcm63268_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++}; ++ + #define HSSPI_PLL_HZ_6328 133333333 + #define HSSPI_PLL_HZ_6362 400000000 + +@@ -568,6 +597,10 @@ static int __init bcm63xx_clk_init(void) + case BCM6368_CPU_ID: + clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks)); + break; ++ case BCM63268_CPU_ID: ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; ++ clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks)); ++ break; + } + + return 0; +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = { + + }; + ++static const unsigned long bcm63268_regs_base[] = { ++ __GEN_CPU_REGS_TABLE(63268) ++}; ++ ++static const int bcm63268_irqs[] = { ++ __GEN_CPU_IRQ_TABLE(63268) ++ ++}; ++ + u32 bcm63xx_get_cpu_variant(void) + { + return bcm63xx_cpu_variant; +@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi + + return (((64 * 1000000) / p1) * p2 * ndiv) / m1; + } ++ case BCM63268_CPU_ID: ++ { ++ unsigned int tmp, mips_pll_fcvo; ++ ++ tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG); ++ mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >> ++ STRAPBUS_63268_FCVO_SHIFT; ++ switch (mips_pll_fcvo) { ++ case 0x3: ++ case 0xe: ++ return 320000000; ++ case 0xa: ++ return 333000000; ++ case 0x2: ++ case 0xb: ++ case 0xf: ++ return 400000000; ++ default: ++ return 0; ++ } ++ } + + default: + panic("Failed to detect clock for CPU with id=%04X\n", cpu_id); +@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v + unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; + u32 val; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) + return bcm_ddr_readl(DDR_CSEND_REG) << 24; + + if (BCMCPU_IS_6345()) { +@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void) + unsigned int tmp; + unsigned int cpu = smp_processor_id(); + u32 chipid_reg; ++ bool long_chipid = false; + u8 __maybe_unused varid = 0; + + /* soc registers location depends on cpu type */ +@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void) + case 0x10: + chipid_reg = BCM_6345_PERF_BASE; + break; ++ case 0x80: ++ long_chipid = true; ++ /* fall-through */ + default: + chipid_reg = BCM_6368_PERF_BASE; + break; +@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void) + break; + } + ++ + /* + * really early to panic, but delaying panic would not help since we + * will never get any working console +@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void) + + /* read out CPU type */ + tmp = bcm_readl(chipid_reg); +- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; +- bcm63xx_cpu_variant = bcm63xx_cpu_id; ++ ++ if (long_chipid) { ++ bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK; ++ bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT; ++ } else { ++ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; ++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT; ++ } ++ + bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT; +- varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT; ++ bcm63xx_cpu_variant = bcm63xx_cpu_id; + + switch (bcm63xx_cpu_id) { + case BCM3368_CPU_ID: +@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void) + /* BCM6369 is a BCM6368 without xDSL, so treat it the same */ + bcm63xx_cpu_id = BCM6368_CPU_ID; + break; ++ case BCM63168_CPU_ID: ++ case BCM63169_CPU_ID: ++ case BCM63268_CPU_ID: ++ case BCM63269_CPU_ID: ++ bcm63xx_regs_base = bcm63268_regs_base; ++ bcm63xx_irqs = bcm63268_irqs; ++ ++ bcm63xx_cpu_id = BCM63268_CPU_ID; ++ break; + default: + panic("unsupported broadcom CPU %x", bcm63xx_cpu_id); + break; +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t + case STRAPBUS_6368_BOOT_SEL_PARALLEL: + return BCM63XX_FLASH_TYPE_PARALLEL; + } ++ case BCM63268_CPU_ID: ++ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG); ++ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL) ++ return BCM63XX_FLASH_TYPE_SERIAL; ++ else ++ return BCM63XX_FLASH_TYPE_NAND; + default: + return -EINVAL; + } +--- a/arch/mips/bcm63xx/dev-spi.c ++++ b/arch/mips/bcm63xx/dev-spi.c +@@ -51,7 +51,7 @@ int __init bcm63xx_spi_register(void) + } + + if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() || +- BCMCPU_IS_6368()) { ++ BCMCPU_IS_6368() || BCMCPU_IS_63268()) { + bcm63xx_spi_device.name = "bcm6358-spi", + spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; + } +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -149,6 +149,20 @@ void __init arch_init_irq(void) + ext_irqs[5] = BCM_6368_EXT_IRQ5; + ext_shift = 4; + break; ++ case BCM63268_CPU_ID: ++ periph_bases[0] += PERF_IRQMASK_63268_REG(0); ++ periph_bases[1] += PERF_IRQMASK_63268_REG(1); ++ periph_irq_count = 2; ++ periph_width = 4; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_63268_EXT_IRQ0; ++ ext_irqs[1] = BCM_63268_EXT_IRQ1; ++ ext_irqs[2] = BCM_63268_EXT_IRQ2; ++ ext_irqs[3] = BCM_63268_EXT_IRQ3; ++ ext_shift = 4; ++ break; + default: + BUG(); + } +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -126,6 +126,20 @@ + #define BCM6368_RESET_PCIE 0 + #define BCM6368_RESET_PCIE_EXT 0 + ++#define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK ++#define BCM63268_RESET_ENET 0 ++#define BCM63268_RESET_USBH SOFTRESET_63268_USBH_MASK ++#define BCM63268_RESET_USBD SOFTRESET_63268_USBS_MASK ++#define BCM63268_RESET_DSL 0 ++#define BCM63268_RESET_SAR SOFTRESET_63268_SAR_MASK ++#define BCM63268_RESET_EPHY 0 ++#define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK ++#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK ++#define BCM63268_RESET_MPI 0 ++#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \ ++ SOFTRESET_63268_PCIE_CORE_MASK) ++#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK ++ + /* + * core reset bits + */ +@@ -157,6 +171,10 @@ static const u32 bcm6368_reset_bits[] = + __GEN_RESET_BITS_TABLE(6368) + }; + ++static const u32 bcm63268_reset_bits[] = { ++ __GEN_RESET_BITS_TABLE(63268) ++}; ++ + const u32 *bcm63xx_reset_bits; + static int reset_reg; + +@@ -183,6 +201,9 @@ static int __init bcm63xx_reset_bits_ini + } else if (BCMCPU_IS_6368()) { + reset_reg = PERF_SOFTRESET_6368_REG; + bcm63xx_reset_bits = bcm6368_reset_bits; ++ } else if (BCMCPU_IS_63268()) { ++ reset_reg = PERF_SOFTRESET_63268_REG; ++ bcm63xx_reset_bits = bcm63268_reset_bits; + } + + return 0; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -22,6 +22,10 @@ + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 + #define BCM6369_CPU_ID 0x6369 ++#define BCM63168_CPU_ID 0x63168 ++#define BCM63169_CPU_ID 0x63169 ++#define BCM63268_CPU_ID 0x63268 ++#define BCM63269_CPU_ID 0x63269 + + void __init bcm63xx_cpu_init(void); + u32 bcm63xx_get_cpu_variant(void); +@@ -62,6 +66,10 @@ static inline u32 __pure __bcm63xx_get_c + #ifdef CONFIG_BCM63XX_CPU_6368 + case BCM6368_CPU_ID: + #endif ++ ++#ifdef CONFIG_BCM63XX_CPU_63268 ++ case BCM63268_CPU_ID: ++#endif + break; + default: + unreachable(); +@@ -87,6 +95,7 @@ static inline u32 __pure bcm63xx_get_cpu + #define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID) + #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID) + #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID) ++#define BCMCPU_IS_63268() (bcm63xx_get_cpu_id() == BCM63268_CPU_ID) + + #define BCMCPU_VARIANT_IS_3368() \ + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) +@@ -110,6 +119,14 @@ static inline u32 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) + #define BCMCPU_VARIANT_IS_6369() \ + (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID) ++#define BCMCPU_VARIANT_IS_63168() \ ++ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID) ++#define BCMCPU_VARIANT_IS_63169() \ ++ (bcm63xx_get_cpu_variant() == BCM63169_CPU_ID) ++#define BCMCPU_VARIANT_IS_63268() \ ++ (bcm63xx_get_cpu_variant() == BCM63268_CPU_ID) ++#define BCMCPU_VARIANT_IS_63269() \ ++ (bcm63xx_get_cpu_variant() == BCM63269_CPU_ID) + + /* + * While registers sets are (mostly) the same across 63xx CPU, base +@@ -574,6 +591,52 @@ enum bcm63xx_regs_set { + #define BCM_6368_RNG_BASE (0xb0004180) + #define BCM_6368_MISC_BASE (0xdeadbeef) + ++/* ++ * 63268 register sets base address ++ */ ++#define BCM_63268_DSL_LMEM_BASE (0xdeadbeef) ++#define BCM_63268_PERF_BASE (0xb0000000) ++#define BCM_63268_TIMER_BASE (0xb0000080) ++#define BCM_63268_WDT_BASE (0xb000009c) ++#define BCM_63268_UART0_BASE (0xb0000180) ++#define BCM_63268_UART1_BASE (0xb00001a0) ++#define BCM_63268_GPIO_BASE (0xb00000c0) ++#define BCM_63268_SPI_BASE (0xb0000800) ++#define BCM_63268_HSSPI_BASE (0xb0001000) ++#define BCM_63268_UDC0_BASE (0xdeadbeef) ++#define BCM_63268_USBDMA_BASE (0xb000c800) ++#define BCM_63268_OHCI0_BASE (0xb0002600) ++#define BCM_63268_OHCI_PRIV_BASE (0xdeadbeef) ++#define BCM_63268_USBH_PRIV_BASE (0xb0002700) ++#define BCM_63268_USBD_BASE (0xb0002400) ++#define BCM_63268_MPI_BASE (0xdeadbeef) ++#define BCM_63268_PCMCIA_BASE (0xdeadbeef) ++#define BCM_63268_PCIE_BASE (0xb06e0000) ++#define BCM_63268_SDRAM_REGS_BASE (0xdeadbeef) ++#define BCM_63268_DSL_BASE (0xdeadbeef) ++#define BCM_63268_UBUS_BASE (0xdeadbeef) ++#define BCM_63268_ENET0_BASE (0xdeadbeef) ++#define BCM_63268_ENET1_BASE (0xdeadbeef) ++#define BCM_63268_ENETDMA_BASE (0xb000d800) ++#define BCM_63268_ENETDMAC_BASE (0xb000da00) ++#define BCM_63268_ENETDMAS_BASE (0xb000dc00) ++#define BCM_63268_ENETSW_BASE (0xb0700000) ++#define BCM_63268_EHCI0_BASE (0xb0002500) ++#define BCM_63268_SDRAM_BASE (0xdeadbeef) ++#define BCM_63268_MEMC_BASE (0xdeadbeef) ++#define BCM_63268_DDR_BASE (0xb0003000) ++#define BCM_63268_M2M_BASE (0xdeadbeef) ++#define BCM_63268_ATM_BASE (0xdeadbeef) ++#define BCM_63268_XTM_BASE (0xb0007000) ++#define BCM_63268_XTMDMA_BASE (0xb000b800) ++#define BCM_63268_XTMDMAC_BASE (0xdeadbeef) ++#define BCM_63268_XTMDMAS_BASE (0xdeadbeef) ++#define BCM_63268_PCM_BASE (0xb000b000) ++#define BCM_63268_PCMDMA_BASE (0xb000b800) ++#define BCM_63268_PCMDMAC_BASE (0xdeadbeef) ++#define BCM_63268_PCMDMAS_BASE (0xdeadbeef) ++#define BCM_63268_RNG_BASE (0xdeadbeef) ++#define BCM_63268_MISC_BASE (0xb0001800) + + extern const unsigned long *bcm63xx_regs_base; + +@@ -1042,6 +1105,73 @@ enum bcm63xx_irq { + #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24) + #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25) + ++/* ++ * 63268 irqs ++ */ ++#define BCM_63268_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32) ++#define BCM_63268_VERY_HIGH_IRQ_BASE (BCM_63268_HIGH_IRQ_BASE + 32) ++ ++#define BCM_63268_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) ++#define BCM_63268_SPI_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 16) ++#define BCM_63268_UART0_IRQ (IRQ_INTERNAL_BASE + 5) ++#define BCM_63268_UART1_IRQ (BCM_63268_HIGH_IRQ_BASE + 2) ++#define BCM_63268_DSL_IRQ (IRQ_INTERNAL_BASE + 23) ++#define BCM_63268_UDC0_IRQ 0 ++#define BCM_63268_ENET0_IRQ 0 ++#define BCM_63268_ENET1_IRQ 0 ++#define BCM_63268_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 13) ++#define BCM_63268_HSSPI_IRQ (IRQ_INTERNAL_BASE + 6) ++#define BCM_63268_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_63268_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) ++#define BCM_63268_USBD_IRQ (IRQ_INTERNAL_BASE + 11) ++#define BCM_63268_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 19) ++#define BCM_63268_USBD_TXDMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 4) ++#define BCM_63268_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 20) ++#define BCM_63268_USBD_TXDMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 5) ++#define BCM_63268_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 21) ++#define BCM_63268_USBD_TXDMA2_IRQ (BCM_63268_HIGH_IRQ_BASE + 6) ++#define BCM_63268_PCMCIA_IRQ 0 ++#define BCM_63268_ENET0_RXDMA_IRQ 0 ++#define BCM_63268_ENET0_TXDMA_IRQ 0 ++#define BCM_63268_ENET1_RXDMA_IRQ 0 ++#define BCM_63268_ENET1_TXDMA_IRQ 0 ++#define BCM_63268_PCI_IRQ (BCM_63268_HIGH_IRQ_BASE + 8) ++#define BCM_63268_ATM_IRQ 0 ++#define BCM_63268_ENETSW_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 1) ++#define BCM_63268_ENETSW_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 2) ++#define BCM_63268_ENETSW_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 3) ++#define BCM_63268_ENETSW_RXDMA3_IRQ (IRQ_INTERNAL_BASE + 4) ++#define BCM_63268_ENETSW_TXDMA0_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 0) ++#define BCM_63268_ENETSW_TXDMA1_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 1) ++#define BCM_63268_ENETSW_TXDMA2_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 2) ++#define BCM_63268_ENETSW_TXDMA3_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 3) ++#define BCM_63268_XTM_IRQ (BCM_63268_HIGH_IRQ_BASE + 17) ++#define BCM_63268_XTM_DMA0_IRQ (IRQ_INTERNAL_BASE + 26) ++ ++#define BCM_63268_RING_OSC_IRQ (BCM_63268_HIGH_IRQ_BASE + 20) ++#define BCM_63268_WLAN_GPIO_IRQ (BCM_63268_HIGH_IRQ_BASE + 3) ++#define BCM_63268_WLAN_IRQ (IRQ_INTERNAL_BASE + 7) ++#define BCM_63268_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8) ++#define BCM_63268_NAND_IRQ (BCM_63268_HIGH_IRQ_BASE + 18) ++#define BCM_63268_PCM_IRQ (IRQ_INTERNAL_BASE + 13) ++#define BCM_63268_DG_IRQ (IRQ_INTERNAL_BASE + 15) ++#define BCM_63268_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16) ++#define BCM_63268_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17) ++#define BCM_63268_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18) ++#define BCM_63268_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19) ++#define BCM_63268_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 22) ++#define BCM_63268_IPSEC_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 7) ++#define BCM_63268_FAP0_IRQ (IRQ_INTERNAL_BASE + 24) ++#define BCM_63268_FAP1_IRQ (IRQ_INTERNAL_BASE + 25) ++#define BCM_63268_PCM_DMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 10) ++#define BCM_63268_PCM_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 11) ++#define BCM_63268_DECT0_IRQ (BCM_63268_HIGH_IRQ_BASE + 0) ++#define BCM_63268_DECT1_IRQ (BCM_63268_HIGH_IRQ_BASE + 1) ++#define BCM_63268_EXT_IRQ0 (BCM_63268_HIGH_IRQ_BASE + 12) ++#define BCM_63268_EXT_IRQ1 (BCM_63268_HIGH_IRQ_BASE + 13) ++#define BCM_63268_EXT_IRQ2 (BCM_63268_HIGH_IRQ_BASE + 14) ++#define BCM_63268_EXT_IRQ3 (BCM_63268_HIGH_IRQ_BASE + 15) ++ + extern const int *bcm63xx_irqs; + + #define __GEN_CPU_IRQ_TABLE(__cpu) \ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +@@ -23,6 +23,8 @@ static inline unsigned long bcm63xx_gpio + return 48; + case BCM6368_CPU_ID: + return 38; ++ case BCM63268_CPU_ID: ++ return 52; + case BCM6348_CPU_ID: + default: + return 37; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -10,6 +10,8 @@ + #define PERF_REV_REG 0x0 + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) ++#define REV_LONG_CHIPID_SHIFT 12 ++#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT) + #define REV_VARID_SHIFT 12 + #define REV_VARID_MASK (0xf << REV_VARID_SHIFT) + #define REV_REVID_SHIFT 0 +@@ -212,6 +214,52 @@ + CKCTL_6368_NAND_EN | \ + CKCTL_6368_IPSEC_EN) + ++#define CKCTL_63268_DISABLE_GLESS (1 << 0) ++#define CKCTL_63268_VDSL_QPROC_EN (1 << 1) ++#define CKCTL_63268_VDSL_AFE_EN (1 << 2) ++#define CKCTL_63268_VDSL_EN (1 << 3) ++#define CKCTL_63268_MIPS_EN (1 << 4) ++#define CKCTL_63268_WLAN_OCP_EN (1 << 5) ++#define CKCTL_63268_DECT_EN (1 << 6) ++#define CKCTL_63268_FAP0_EN (1 << 7) ++#define CKCTL_63268_FAP1_EN (1 << 8) ++#define CKCTL_63268_SAR_EN (1 << 9) ++#define CKCTL_63268_ROBOSW_EN (1 << 10) ++#define CKCTL_63268_PCM_EN (1 << 11) ++#define CKCTL_63268_USBD_EN (1 << 12) ++#define CKCTL_63268_USBH_EN (1 << 13) ++#define CKCTL_63268_IPSEC_EN (1 << 14) ++#define CKCTL_63268_SPI_EN (1 << 15) ++#define CKCTL_63268_HSSPI_EN (1 << 16) ++#define CKCTL_63268_PCIE_EN (1 << 17) ++#define CKCTL_63268_PHYMIPS_EN (1 << 18) ++#define CKCTL_63268_GMAC_EN (1 << 19) ++#define CKCTL_63268_NAND_EN (1 << 20) ++#define CKCTL_63268_TBUS_EN (1 << 27) ++#define CKCTL_63268_ROBOSW250_EN (1 << 31) ++ ++#define CKCTL_63268_ALL_SAFE_EN (CKCTL_63268_VDSL_QPROC_EN | \ ++ CKCTL_63268_VDSL_AFE_EN | \ ++ CKCTL_63268_VDSL_EN | \ ++ CKCTL_63268_WLAN_OCP_EN | \ ++ CKCTL_63268_DECT_EN | \ ++ CKCTL_63268_FAP0_EN | \ ++ CKCTL_63268_FAP1_EN | \ ++ CKCTL_63268_SAR_EN | \ ++ CKCTL_63268_ROBOSW_EN | \ ++ CKCTL_63268_PCM_EN | \ ++ CKCTL_63268_USBD_EN | \ ++ CKCTL_63268_USBH_EN | \ ++ CKCTL_63268_IPSEC_EN | \ ++ CKCTL_63268_SPI_EN | \ ++ CKCTL_63268_HSSPI_EN | \ ++ CKCTL_63268_PCIE_EN | \ ++ CKCTL_63268_PHYMIPS_EN | \ ++ CKCTL_63268_GMAC_EN | \ ++ CKCTL_63268_NAND_EN | \ ++ CKCTL_63268_TBUS_EN | \ ++ CKCTL_63268_ROBOSW250_EN) ++ + /* System PLL Control register */ + #define PERF_SYS_PLL_CTL_REG 0x8 + #define SYS_PLL_SOFT_RESET 0x1 +@@ -225,6 +273,7 @@ + #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c) + #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10) + #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10) ++#define PERF_IRQMASK_63268_REG(x) (0x20 + (x) * 0x20) + + /* Interrupt Status register */ + #define PERF_IRQSTAT_3368_REG 0x10 +@@ -235,6 +284,7 @@ + #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c) + #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10) + #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10) ++#define PERF_IRQSTAT_63268_REG(x) (0x30 + (x) * 0x20) + + /* External Interrupt Configuration register */ + #define PERF_EXTIRQ_CFG_REG_3368 0x14 +@@ -245,6 +295,7 @@ + #define PERF_EXTIRQ_CFG_REG_6358 0x14 + #define PERF_EXTIRQ_CFG_REG_6362 0x18 + #define PERF_EXTIRQ_CFG_REG_6368 0x18 ++#define PERF_EXTIRQ_CFG_REG_63268 0x18 + + #define PERF_EXTIRQ_CFG_REG2_6358 0x1c + #define PERF_EXTIRQ_CFG_REG2_6368 0x1c +@@ -275,6 +326,7 @@ + #define PERF_SOFTRESET_6358_REG 0x34 + #define PERF_SOFTRESET_6362_REG 0x10 + #define PERF_SOFTRESET_6368_REG 0x10 ++#define PERF_SOFTRESET_63268_REG 0x10 + + #define SOFTRESET_3368_SPI_MASK (1 << 0) + #define SOFTRESET_3368_ENET_MASK (1 << 2) +@@ -368,6 +420,26 @@ + #define SOFTRESET_6368_USBH_MASK (1 << 12) + #define SOFTRESET_6368_PCM_MASK (1 << 13) + ++#define SOFTRESET_63268_SPI_MASK (1 << 0) ++#define SOFTRESET_63268_IPSEC_MASK (1 << 1) ++#define SOFTRESET_63268_EPHY_MASK (1 << 2) ++#define SOFTRESET_63268_SAR_MASK (1 << 3) ++#define SOFTRESET_63268_ENETSW_MASK (1 << 4) ++#define SOFTRESET_63268_USBS_MASK (1 << 5) ++#define SOFTRESET_63268_USBH_MASK (1 << 6) ++#define SOFTRESET_63268_PCM_MASK (1 << 7) ++#define SOFTRESET_63268_PCIE_CORE_MASK (1 << 8) ++#define SOFTRESET_63268_PCIE_MASK (1 << 9) ++#define SOFTRESET_63268_PCIE_EXT_MASK (1 << 10) ++#define SOFTRESET_63268_WLAN_SHIM_MASK (1 << 11) ++#define SOFTRESET_63268_DDR_PHY_MASK (1 << 12) ++#define SOFTRESET_63268_FAP0_MASK (1 << 13) ++#define SOFTRESET_63268_WLAN_UBUS_MASK (1 << 14) ++#define SOFTRESET_63268_DECT_MASK (1 << 15) ++#define SOFTRESET_63268_FAP1_MASK (1 << 16) ++#define SOFTRESET_63268_PCIE_HARD_MASK (1 << 17) ++#define SOFTRESET_63268_GPHY_MASK (1 << 18) ++ + /* MIPS PLL control register */ + #define PERF_MIPSPLLCTL_REG 0x34 + #define MIPSPLLCTL_N1_SHIFT 20 +@@ -1367,6 +1439,13 @@ + #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15) + #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15) + ++#define MISC_STRAPBUS_63268_REG 0x14 ++#define STRAPBUS_63268_HSSPI_CLK_FAST (1 << 9) ++#define STRAPBUS_63268_BOOT_SEL_SERIAL (1 << 11) ++#define STRAPBUS_63268_BOOT_SEL_NAND (0 << 11) ++#define STRAPBUS_63268_FCVO_SHIFT 21 ++#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT) ++ + #define MISC_STRAPBUS_6328_REG 0x240 + #define STRAPBUS_6328_FCVO_SHIFT 7 + #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) +--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h ++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h +@@ -26,6 +26,7 @@ static inline int is_bcm63xx_internal_re + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: + case BCM6368_CPU_ID: ++ case BCM63268_CPU_ID: + if (offset >= 0xb0000000 && offset < 0xb1000000) + return 1; + break; +--- a/arch/mips/bcm63xx/dev-hsspi.c ++++ b/arch/mips/bcm63xx/dev-hsspi.c +@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs + + int __init bcm63xx_hsspi_register(void) + { +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362()) ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268()) + return -ENODEV; + + spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -176,7 +176,8 @@ static int __init register_shared(void) + else + shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() || ++ BCMCPU_IS_63268()) + chan_count = 32; + else if (BCMCPU_IS_6345()) + chan_count = 8; +@@ -284,7 +285,8 @@ bcm63xx_enetsw_register(const struct bcm + { + int ret; + +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && ++ !BCMCPU_IS_63268()) + return -ENODEV; + + ret = register_shared(); +@@ -305,6 +307,8 @@ bcm63xx_enetsw_register(const struct bcm + enetsw_pd.num_ports = ENETSW_PORTS_6328; + else if (BCMCPU_IS_6362() || BCMCPU_IS_6368()) + enetsw_pd.num_ports = ENETSW_PORTS_6368; ++ else if (BCMCPU_IS_63268()) ++ enetsw_pd.num_ports = ENETSW_PORTS_63268; + + enetsw_pd.dma_has_sram = true; + enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h +@@ -67,6 +67,7 @@ struct bcm63xx_enet_platform_data { + #define ENETSW_MAX_PORT 8 + #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */ + #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */ ++#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */ + + #define ENETSW_RGMII_PORT0 4 + diff --git a/target/linux/brcm63xx/patches-4.14/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.14/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch new file mode 100644 index 000000000..e9f9e2b01 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch @@ -0,0 +1,55 @@ +From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 03:22:40 +0100 +Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268 + +--- + arch/mips/bcm63xx/reset.c | 3 ++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++ + arch/mips/pci/pci-bcm63xx.c | 4 ++++ + 3 files changed, 11 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -137,7 +137,8 @@ + #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK + #define BCM63268_RESET_MPI 0 + #define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \ +- SOFTRESET_63268_PCIE_CORE_MASK) ++ SOFTRESET_63268_PCIE_CORE_MASK | \ ++ SOFTRESET_63268_PCIE_HARD_MASK) + #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK + + /* +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -46,6 +46,11 @@ + #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \ + BCM_PCIE_MEM_SIZE_6328 - 1) + ++#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000 ++#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024) ++#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \ ++ BCM_PCIE_MEM_SIZE_63268 - 1) ++ + /* + * Internal registers are accessed through KSEG3 + */ +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void) + if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { + bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328; + bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328; ++ } else if (BCMCPU_IS_63268()) { ++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268; ++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268; + } + + switch (bcm63xx_get_cpu_id()) { + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: ++ case BCM63268_CPU_ID: + return bcm63xx_register_pcie(); + case BCM3368_CPU_ID: + case BCM6348_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.14/341-MIPS-BCM63XX-add-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.14/341-MIPS-BCM63XX-add-support-for-BCM6318.patch new file mode 100644 index 000000000..d82b560ec --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/341-MIPS-BCM63XX-add-support-for-BCM6318.patch @@ -0,0 +1,697 @@ +From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 01:24:09 +0100 +Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318 + +--- + arch/mips/bcm63xx/Kconfig | 5 + + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/clk.c | 8 +- + arch/mips/bcm63xx/cpu.c | 53 +++++++++++ + arch/mips/bcm63xx/dev-flash.c | 3 + + arch/mips/bcm63xx/dev-spi.c | 2 +- + arch/mips/bcm63xx/irq.c | 10 ++ + arch/mips/bcm63xx/prom.c | 2 +- + arch/mips/bcm63xx/reset.c | 24 +++++ + arch/mips/bcm63xx/setup.c | 5 +- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 107 ++++++++++++++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 75 ++++++++++++++- + arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 + + 13 files changed, 291 insertions(+), 6 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -19,6 +19,11 @@ config BCM63XX_EHCI + select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD + select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD + ++config BCM63XX_CPU_6318 ++ bool "support 6318 CPU" ++ select SYS_HAS_CPU_BMIPS32_3300 ++ select HW_HAS_PCI ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -713,7 +713,7 @@ void __init board_prom_init(void) + /* read base address of boot chip select (0) + * 6328/6362 do not have MPI but boot from a fixed address + */ +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { + val = 0x18000000; + } else { + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -289,7 +289,9 @@ static void hsspi_set(struct clk *clk, i + { + u32 mask; + +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318()) ++ mask = CKCTL_6318_HSSPI_EN; ++ else if (BCMCPU_IS_6328()) + mask = CKCTL_6328_HSSPI_EN; + else if (BCMCPU_IS_6362()) + mask = CKCTL_6362_HSSPI_EN; +@@ -444,6 +446,19 @@ static struct clk_lookup bcm3368_clks[] + CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; + ++static struct clk_lookup bcm6318_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbh), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++}; ++ + static struct clk_lookup bcm6328_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), +@@ -565,6 +580,7 @@ static struct clk_lookup bcm63268_clks[] + CLKDEV_INIT(NULL, "pcie", &clk_pcie), + }; + ++#define HSSPI_PLL_HZ_6318 250000000 + #define HSSPI_PLL_HZ_6328 133333333 + #define HSSPI_PLL_HZ_6362 400000000 + +@@ -574,6 +590,10 @@ static int __init bcm63xx_clk_init(void) + case BCM3368_CPU_ID: + clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); + break; ++ case BCM6318_CPU_ID: ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318; ++ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks)); ++ break; + case BCM6328_CPU_ID: + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; + clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = { + __GEN_CPU_IRQ_TABLE(3368) + }; + ++static const unsigned long bcm6318_regs_base[] = { ++ __GEN_CPU_REGS_TABLE(6318) ++}; ++ ++static const int bcm6318_irqs[] = { ++ __GEN_CPU_IRQ_TABLE(6318) ++}; ++ + static const unsigned long bcm6328_regs_base[] = { + __GEN_CPU_REGS_TABLE(6328) + }; +@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi + return bcm63xx_memory_size; + } + ++#define STRAP_OVERRIDE_BUS_REG 0x0 ++#define OVERRIDE_BUS_MIPS_FREQ_SHIFT 23 ++#define OVERRIDE_BUS_MIPS_FREQ_MASK (0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT) ++ + static unsigned int detect_cpu_clock(void) + { + u32 cpu_id = bcm63xx_get_cpu_id(); +@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi + case BCM3368_CPU_ID: + return 300000000; + ++ case BCM6318_CPU_ID: ++ { ++ unsigned int tmp, mips_pll_fcvo; ++ ++ tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG); ++ ++ pr_info("strap_override_bus = %08x\n", tmp); ++ ++ mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK) ++ >> OVERRIDE_BUS_MIPS_FREQ_SHIFT; ++ ++ switch (mips_pll_fcvo) { ++ case 0: ++ return 166000000; ++ case 1: ++ return 400000000; ++ case 2: ++ return 250000000; ++ case 3: ++ return 333000000; ++ }; ++ } + case BCM6328_CPU_ID: + { + unsigned int tmp, mips_pll_fcvo; +@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v + unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; + u32 val; + ++ if (BCMCPU_IS_6318()) { ++ val = bcm_sdram_readl(SDRAM_CFG_REG); ++ val = val & SDRAM_CFG_6318_SPACE_MASK; ++ val >>= SDRAM_CFG_6318_SPACE_SHIFT; ++ return 1 << (val + 20); ++ } ++ + if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) + return bcm_ddr_readl(DDR_CSEND_REG) << 24; + +@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void) + + switch (current_cpu_type()) { + case CPU_BMIPS3300: ++ if ((read_c0_prid() & 0xff) >= 0x33) { ++ /* BCM6318 */ ++ chipid_reg = BCM_6368_PERF_BASE; ++ break; ++ } ++ + if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT) + __cpu_name[cpu] = "Broadcom BCM6338"; + /* fall-through */ +@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void) + bcm63xx_cpu_variant = bcm63xx_cpu_id; + + switch (bcm63xx_cpu_id) { ++ case BCM6318_CPU_ID: ++ bcm63xx_regs_base = bcm6318_regs_base; ++ bcm63xx_irqs = bcm6318_irqs; ++ break; + case BCM3368_CPU_ID: + bcm63xx_regs_base = bcm3368_regs_base; + bcm63xx_irqs = bcm3368_irqs; +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t + u32 val; + + switch (bcm63xx_get_cpu_id()) { ++ case BCM6318_CPU_ID: ++ /* only support serial flash */ ++ return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6328_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_6328_REG); + if (val & STRAPBUS_6328_BOOT_SEL_SERIAL) +--- a/arch/mips/bcm63xx/dev-spi.c ++++ b/arch/mips/bcm63xx/dev-spi.c +@@ -38,7 +38,7 @@ static struct platform_device bcm63xx_sp + + int __init bcm63xx_spi_register(void) + { +- if (BCMCPU_IS_6328() || BCMCPU_IS_6345()) ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345()) + return -ENODEV; + + spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -48,6 +48,19 @@ void __init arch_init_irq(void) + ext_irqs[3] = BCM_3368_EXT_IRQ3; + ext_shift = 4; + break; ++ case BCM6318_CPU_ID: ++ periph_bases[0] += PERF_IRQMASK_6318_REG; ++ periph_irq_count = 1; ++ periph_width = 4; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6318_EXT_IRQ0; ++ ext_irqs[1] = BCM_6318_EXT_IRQ0; ++ ext_irqs[2] = BCM_6318_EXT_IRQ0; ++ ext_irqs[3] = BCM_6318_EXT_IRQ0; ++ ext_shift = 4; ++ break; + case BCM6328_CPU_ID: + periph_bases[0] += PERF_IRQMASK_6328_REG(0); + periph_bases[1] += PERF_IRQMASK_6328_REG(1); +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -68,7 +68,7 @@ void __init prom_init(void) + + if (reg & OTP_6328_REG3_TP1_DISABLED) + bmips_smp_enabled = 0; +- } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) { ++ } else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) { + bmips_smp_enabled = 0; + } + +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -44,6 +44,23 @@ + #define BCM3368_RESET_PCIE 0 + #define BCM3368_RESET_PCIE_EXT 0 + ++ ++#define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK ++#define BCM6318_RESET_ENET 0 ++#define BCM6318_RESET_USBH SOFTRESET_6318_USBH_MASK ++#define BCM6318_RESET_USBD SOFTRESET_6318_USBS_MASK ++#define BCM6318_RESET_DSL 0 ++#define BCM6318_RESET_SAR SOFTRESET_6318_SAR_MASK ++#define BCM6318_RESET_EPHY SOFTRESET_6318_EPHY_MASK ++#define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK ++#define BCM6318_RESET_PCM 0 ++#define BCM6318_RESET_MPI 0 ++#define BCM6318_RESET_PCIE \ ++ (SOFTRESET_6318_PCIE_MASK | \ ++ SOFTRESET_6318_PCIE_CORE_MASK | \ ++ SOFTRESET_6318_PCIE_HARD_MASK) ++#define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK ++ + #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK + #define BCM6328_RESET_ENET 0 + #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK +@@ -148,6 +165,10 @@ static const u32 bcm3368_reset_bits[] = + __GEN_RESET_BITS_TABLE(3368) + }; + ++static const u32 bcm6318_reset_bits[] = { ++ __GEN_RESET_BITS_TABLE(6318) ++}; ++ + static const u32 bcm6328_reset_bits[] = { + __GEN_RESET_BITS_TABLE(6328) + }; +@@ -184,6 +205,9 @@ static int __init bcm63xx_reset_bits_ini + if (BCMCPU_IS_3368()) { + reset_reg = PERF_SOFTRESET_6358_REG; + bcm63xx_reset_bits = bcm3368_reset_bits; ++ } else if (BCMCPU_IS_6318()) { ++ reset_reg = PERF_SOFTRESET_6318_REG; ++ bcm63xx_reset_bits = bcm6318_reset_bits; + } else if (BCMCPU_IS_6328()) { + reset_reg = PERF_SOFTRESET_6328_REG; + bcm63xx_reset_bits = bcm6328_reset_bits; +--- a/arch/mips/bcm63xx/setup.c ++++ b/arch/mips/bcm63xx/setup.c +@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void) + case BCM3368_CPU_ID: + perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368; + break; ++ case BCM6318_CPU_ID: ++ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318; ++ break; + case BCM6328_CPU_ID: + perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328; + break; +@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void) + bcm6348_a1_reboot(); + + pr_info("triggering watchdog soft-reset...\n"); +- if (BCMCPU_IS_6328()) { ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) { + bcm_wdt_writel(1, WDT_SOFTRESET_REG); + } else { + reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -11,6 +11,7 @@ + * arm mach-types) + */ + #define BCM3368_CPU_ID 0x3368 ++#define BCM6318_CPU_ID 0x6318 + #define BCM6328_CPU_ID 0x6328 + #define BCM63281_CPU_ID 0x63281 + #define BCM63283_CPU_ID 0x63283 +@@ -39,6 +40,10 @@ static inline u32 __pure __bcm63xx_get_c + case BCM3368_CPU_ID: + #endif + ++#ifdef CONFIG_BCM63XX_CPU_6318 ++ case BCM6318_CPU_ID: ++#endif ++ + #ifdef CONFIG_BCM63XX_CPU_6328 + case BCM6328_CPU_ID: + #endif +@@ -88,6 +93,7 @@ static inline u32 __pure bcm63xx_get_cpu + } + + #define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID) ++#define BCMCPU_IS_6318() (bcm63xx_get_cpu_id() == BCM6318_CPU_ID) + #define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID) + #define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID) + #define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID) +@@ -99,6 +105,8 @@ static inline u32 __pure bcm63xx_get_cpu + + #define BCMCPU_VARIANT_IS_3368() \ + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6318() \ ++ (bcm63xx_get_cpu_variant() == BCM6318_CPU_ID) + #define BCMCPU_VARIANT_IS_63281() \ + (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID) + #define BCMCPU_VARIANT_IS_63283() \ +@@ -253,6 +261,56 @@ enum bcm63xx_regs_set { + #define BCM_3368_MISC_BASE (0xdeadbeef) + + /* ++ * 6318 register sets base address ++ */ ++#define BCM_6318_DSL_LMEM_BASE (0xdeadbeef) ++#define BCM_6318_PERF_BASE (0xb0000000) ++#define BCM_6318_TIMER_BASE (0xb0000040) ++#define BCM_6318_WDT_BASE (0xb0000068) ++#define BCM_6318_UART0_BASE (0xb0000100) ++#define BCM_6318_UART1_BASE (0xdeadbeef) ++#define BCM_6318_GPIO_BASE (0xb0000080) ++#define BCM_6318_SPI_BASE (0xdeadbeef) ++#define BCM_6318_HSSPI_BASE (0xb0003000) ++#define BCM_6318_UDC0_BASE (0xdeadbeef) ++#define BCM_6318_USBDMA_BASE (0xb0006800) ++#define BCM_6318_OHCI0_BASE (0xb0005100) ++#define BCM_6318_OHCI_PRIV_BASE (0xdeadbeef) ++#define BCM_6318_USBH_PRIV_BASE (0xb0005200) ++#define BCM_6318_USBD_BASE (0xb0006000) ++#define BCM_6318_MPI_BASE (0xdeadbeef) ++#define BCM_6318_PCMCIA_BASE (0xdeadbeef) ++#define BCM_6318_PCIE_BASE (0xb0010000) ++#define BCM_6318_SDRAM_REGS_BASE (0xdeadbeef) ++#define BCM_6318_DSL_BASE (0xdeadbeef) ++#define BCM_6318_UBUS_BASE (0xdeadbeef) ++#define BCM_6318_ENET0_BASE (0xdeadbeef) ++#define BCM_6318_ENET1_BASE (0xdeadbeef) ++#define BCM_6318_ENETDMA_BASE (0xb0088000) ++#define BCM_6318_ENETDMAC_BASE (0xb0088200) ++#define BCM_6318_ENETDMAS_BASE (0xb0088400) ++#define BCM_6318_ENETSW_BASE (0xb0080000) ++#define BCM_6318_EHCI0_BASE (0xb0005000) ++#define BCM_6318_SDRAM_BASE (0xb0004000) ++#define BCM_6318_MEMC_BASE (0xdeadbeef) ++#define BCM_6318_DDR_BASE (0xdeadbeef) ++#define BCM_6318_M2M_BASE (0xdeadbeef) ++#define BCM_6318_ATM_BASE (0xdeadbeef) ++#define BCM_6318_XTM_BASE (0xdeadbeef) ++#define BCM_6318_XTMDMA_BASE (0xb000c000) ++#define BCM_6318_XTMDMAC_BASE (0xdeadbeef) ++#define BCM_6318_XTMDMAS_BASE (0xdeadbeef) ++#define BCM_6318_PCM_BASE (0xdeadbeef) ++#define BCM_6318_PCMDMA_BASE (0xdeadbeef) ++#define BCM_6318_PCMDMAC_BASE (0xdeadbeef) ++#define BCM_6318_PCMDMAS_BASE (0xdeadbeef) ++#define BCM_6318_RNG_BASE (0xdeadbeef) ++#define BCM_6318_MISC_BASE (0xb0000280) ++#define BCM_6318_OTP_BASE (0xdeadbeef) ++ ++#define BCM_6318_STRAP_BASE (0xb0000900) ++ ++/* + * 6328 register sets base address + */ + #define BCM_6328_DSL_LMEM_BASE (0xdeadbeef) +@@ -775,6 +833,55 @@ enum bcm63xx_irq { + #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27) + #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28) + ++/* ++ * 6318 irqs ++ */ ++#define BCM_6318_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32) ++#define BCM_6318_VERY_HIGH_IRQ_BASE (BCM_6318_HIGH_IRQ_BASE + 32) ++ ++#define BCM_6318_TIMER_IRQ (IRQ_INTERNAL_BASE + 31) ++#define BCM_6318_SPI_IRQ 0 ++#define BCM_6318_UART0_IRQ (IRQ_INTERNAL_BASE + 28) ++#define BCM_6318_UART1_IRQ 0 ++#define BCM_6318_DSL_IRQ (IRQ_INTERNAL_BASE + 21) ++#define BCM_6318_UDC0_IRQ 0 ++#define BCM_6318_ENET0_IRQ 0 ++#define BCM_6318_ENET1_IRQ 0 ++#define BCM_6318_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) ++#define BCM_6318_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29) ++#define BCM_6318_OHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 9) ++#define BCM_6318_EHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 10) ++#define BCM_6318_USBD_IRQ (IRQ_INTERNAL_BASE + 4) ++#define BCM_6318_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5) ++#define BCM_6318_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6) ++#define BCM_6318_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7) ++#define BCM_6318_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8) ++#define BCM_6318_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6318_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10) ++#define BCM_6318_PCMCIA_IRQ 0 ++#define BCM_6318_ENET0_RXDMA_IRQ 0 ++#define BCM_6318_ENET0_TXDMA_IRQ 0 ++#define BCM_6318_ENET1_RXDMA_IRQ 0 ++#define BCM_6318_ENET1_TXDMA_IRQ 0 ++#define BCM_6318_PCI_IRQ (IRQ_INTERNAL_BASE + 23) ++#define BCM_6318_ATM_IRQ 0 ++#define BCM_6318_ENETSW_RXDMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 0) ++#define BCM_6318_ENETSW_RXDMA1_IRQ (BCM_6318_HIGH_IRQ_BASE + 1) ++#define BCM_6318_ENETSW_RXDMA2_IRQ (BCM_6318_HIGH_IRQ_BASE + 2) ++#define BCM_6318_ENETSW_RXDMA3_IRQ (BCM_6318_HIGH_IRQ_BASE + 3) ++#define BCM_6318_ENETSW_TXDMA0_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 10) ++#define BCM_6318_ENETSW_TXDMA1_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 11) ++#define BCM_6318_ENETSW_TXDMA2_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 12) ++#define BCM_6318_ENETSW_TXDMA3_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 13) ++#define BCM_6318_XTM_IRQ (BCM_6318_HIGH_IRQ_BASE + 31) ++#define BCM_6318_XTM_DMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 11) ++ ++#define BCM_6318_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2) ++#define BCM_6318_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3) ++#define BCM_6318_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24) ++#define BCM_6318_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25) ++#define BCM_6318_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26) ++#define BCM_6318_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27) + + /* + * 6328 irqs +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -53,6 +53,39 @@ + CKCTL_3368_EMUSB_EN | \ + CKCTL_3368_USBU_EN) + ++#define CKCTL_6318_ADSL_ASB_EN (1 << 0) ++#define CKCTL_6318_USB_ASB_EN (1 << 1) ++#define CKCTL_6318_MIPS_ASB_EN (1 << 2) ++#define CKCTL_6318_PCIE_ASB_EN (1 << 3) ++#define CKCTL_6318_PHYMIPS_ASB_EN (1 << 4) ++#define CKCTL_6318_ROBOSW_ASB_EN (1 << 5) ++#define CKCTL_6318_SAR_ASB_EN (1 << 6) ++#define CKCTL_6318_SDR_ASB_EN (1 << 7) ++#define CKCTL_6318_SWREG_ASB_EN (1 << 8) ++#define CKCTL_6318_PERIPH_ASB_EN (1 << 9) ++#define CKCTL_6318_CPUBUS160_EN (1 << 10) ++#define CKCTL_6318_ADSL_EN (1 << 11) ++#define CKCTL_6318_SAR125_EN (1 << 12) ++#define CKCTL_6318_MIPS_EN (1 << 13) ++#define CKCTL_6318_PCIE_EN (1 << 14) ++#define CKCTL_6318_ROBOSW250_EN (1 << 16) ++#define CKCTL_6318_ROBOSW025_EN (1 << 17) ++#define CKCTL_6318_SDR_EN (1 << 19) ++#define CKCTL_6318_USB_EN (1 << 20) /* both device and host */ ++#define CKCTL_6318_HSSPI_EN (1 << 25) ++#define CKCTL_6318_PCIE25_EN (1 << 27) ++#define CKCTL_6318_PHYMIPS_EN (1 << 28) ++#define CKCTL_6318_ADSL_AFE_EN (1 << 29) ++#define CKCTL_6318_ADSL_QPROC_EN (1 << 30) ++ ++#define CKCTL_6318_ALL_SAFE_EN (CKCTL_6318_PHYMIPS_EN | \ ++ CKCTL_6318_ADSL_QPROC_EN | \ ++ CKCTL_6318_ADSL_AFE_EN | \ ++ CKCTL_6318_ADSL_EN | \ ++ CKCTL_6318_SAR_EN | \ ++ CKCTL_6318_USB_EN | \ ++ CKCTL_6318_PCIE_EN) ++ + #define CKCTL_6328_PHYMIPS_EN (1 << 0) + #define CKCTL_6328_ADSL_QPROC_EN (1 << 1) + #define CKCTL_6328_ADSL_AFE_EN (1 << 2) +@@ -260,12 +293,27 @@ + CKCTL_63268_TBUS_EN | \ + CKCTL_63268_ROBOSW250_EN) + ++/* UBUS Clock Control register */ ++#define PERF_UB_CKCTL_REG 0x10 ++ ++#define UB_CKCTL_6318_ADSL_EN (1 << 0) ++#define UB_CKCTL_6318_ARB_EN (1 << 1) ++#define UB_CKCTL_6318_MIPS_EN (1 << 2) ++#define UB_CKCTL_6318_PCIE_EN (1 << 3) ++#define UB_CKCTL_6318_PERIPH_EN (1 << 4) ++#define UB_CKCTL_6318_PHYMIPS_EN (1 << 5) ++#define UB_CKCTL_6318_ROBOSW_EN (1 << 6) ++#define UB_CKCTL_6318_SAR_EN (1 << 7) ++#define UB_CKCTL_6318_SDR_EN (1 << 8) ++#define UB_CKCTL_6318_USB_EN (1 << 9) ++ + /* System PLL Control register */ + #define PERF_SYS_PLL_CTL_REG 0x8 + #define SYS_PLL_SOFT_RESET 0x1 + + /* Interrupt Mask register */ + #define PERF_IRQMASK_3368_REG 0xc ++#define PERF_IRQMASK_6318_REG 0x20 + #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10) + #define PERF_IRQMASK_6338_REG 0xc + #define PERF_IRQMASK_6345_REG 0xc +@@ -277,6 +325,7 @@ + + /* Interrupt Status register */ + #define PERF_IRQSTAT_3368_REG 0x10 ++#define PERF_IRQSTAT_6318_REG 0x30 + #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10) + #define PERF_IRQSTAT_6338_REG 0x10 + #define PERF_IRQSTAT_6345_REG 0x10 +@@ -288,6 +337,7 @@ + + /* External Interrupt Configuration register */ + #define PERF_EXTIRQ_CFG_REG_3368 0x14 ++#define PERF_EXTIRQ_CFG_REG_6318 0x18 + #define PERF_EXTIRQ_CFG_REG_6328 0x18 + #define PERF_EXTIRQ_CFG_REG_6338 0x14 + #define PERF_EXTIRQ_CFG_REG_6345 0x14 +@@ -322,6 +372,7 @@ + + /* Soft Reset register */ + #define PERF_SOFTRESET_REG 0x28 ++#define PERF_SOFTRESET_6318_REG 0x10 + #define PERF_SOFTRESET_6328_REG 0x10 + #define PERF_SOFTRESET_6358_REG 0x34 + #define PERF_SOFTRESET_6362_REG 0x10 +@@ -335,6 +386,18 @@ + #define SOFTRESET_3368_USBS_MASK (1 << 11) + #define SOFTRESET_3368_PCM_MASK (1 << 13) + ++#define SOFTRESET_6318_SPI_MASK (1 << 0) ++#define SOFTRESET_6318_EPHY_MASK (1 << 1) ++#define SOFTRESET_6318_SAR_MASK (1 << 2) ++#define SOFTRESET_6318_ENETSW_MASK (1 << 3) ++#define SOFTRESET_6318_USBS_MASK (1 << 4) ++#define SOFTRESET_6318_USBH_MASK (1 << 5) ++#define SOFTRESET_6318_PCIE_CORE_MASK (1 << 6) ++#define SOFTRESET_6318_PCIE_MASK (1 << 7) ++#define SOFTRESET_6318_PCIE_EXT_MASK (1 << 8) ++#define SOFTRESET_6318_PCIE_HARD_MASK (1 << 9) ++#define SOFTRESET_6318_ADSL_MASK (1 << 10) ++ + #define SOFTRESET_6328_SPI_MASK (1 << 0) + #define SOFTRESET_6328_EPHY_MASK (1 << 1) + #define SOFTRESET_6328_SAR_MASK (1 << 2) +@@ -506,8 +569,17 @@ + #define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9) + #define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10) + ++#define TIMER_IRQMASK_6318_REG 0x0 ++#define TIMER_IRQSTAT_6318_REG 0x4 ++#define IRQSTATMASK_TIMER0 (1 << 0) ++#define IRQSTATMASK_TIMER1 (1 << 1) ++#define IRQSTATMASK_TIMER2 (1 << 2) ++#define IRQSTATMASK_TIMER3 (1 << 3) ++#define IRQSTATMASK_WDT (1 << 4) ++ + /* Timer control register */ + #define TIMER_CTLx_REG(x) (0x4 + (x * 4)) ++#define TIMER_CTRx_6318_REG(x) (0x8 + (x * 4)) + #define TIMER_CTL0_REG 0x4 + #define TIMER_CTL1_REG 0x8 + #define TIMER_CTL2_REG 0xC +@@ -1254,6 +1326,8 @@ + #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT) + #define SDRAM_CFG_BANK_SHIFT 13 + #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT) ++#define SDRAM_CFG_6318_SPACE_SHIFT 4 ++#define SDRAM_CFG_6318_SPACE_MASK (0xf << SDRAM_CFG_6318_SPACE_SHIFT) + + #define SDRAM_MBASE_REG 0xc + +--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h ++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h +@@ -23,6 +23,7 @@ static inline int is_bcm63xx_internal_re + if (offset >= 0xfff00000) + return 1; + break; ++ case BCM6318_CPU_ID: + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: + case BCM6368_CPU_ID: +--- a/arch/mips/bcm63xx/dev-hsspi.c ++++ b/arch/mips/bcm63xx/dev-hsspi.c +@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs + + int __init bcm63xx_hsspi_register(void) + { +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() && ++ !BCMCPU_IS_63268()) + return -ENODEV; + + spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); +--- a/arch/mips/bcm63xx/dev-usb-usbd.c ++++ b/arch/mips/bcm63xx/dev-usb-usbd.c +@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s + IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 }; + int i; + +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368()) + return 0; + + usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD); +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -176,8 +176,8 @@ static int __init register_shared(void) + else + shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() || +- BCMCPU_IS_63268()) ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || ++ BCMCPU_IS_6368() || BCMCPU_IS_63268()) + chan_count = 32; + else if (BCMCPU_IS_6345()) + chan_count = 8; +@@ -285,8 +285,8 @@ bcm63xx_enetsw_register(const struct bcm + { + int ret; + +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && +- !BCMCPU_IS_63268()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() && ++ !BCMCPU_IS_6368() && !BCMCPU_IS_63268()) + return -ENODEV; + + ret = register_shared(); +@@ -303,7 +303,7 @@ bcm63xx_enetsw_register(const struct bcm + + memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd)); + +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) + enetsw_pd.num_ports = ENETSW_PORTS_6328; + else if (BCMCPU_IS_6362() || BCMCPU_IS_6368()) + enetsw_pd.num_ports = ENETSW_PORTS_6368; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +@@ -10,6 +10,8 @@ int __init bcm63xx_gpio_init(void); + static inline unsigned long bcm63xx_gpio_count(void) + { + switch (bcm63xx_get_cpu_id()) { ++ case BCM6318_CPU_ID: ++ return 50; + case BCM6328_CPU_ID: + return 32; + case BCM3368_CPU_ID: +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh + + int __init bcm63xx_ehci_register(void) + { +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() && ++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) + return 0; + + ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); diff --git a/target/linux/brcm63xx/patches-4.14/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch b/target/linux/brcm63xx/patches-4.14/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch new file mode 100644 index 000000000..e35931175 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch @@ -0,0 +1,156 @@ +From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 14:17:50 +0100 +Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals + +--- + arch/mips/bcm63xx/reset.c | 39 ++++++++++++++-------- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++ + arch/mips/pci/pci-bcm63xx.c | 7 ++++ + 3 files changed, 34 insertions(+), 14 deletions(-) + +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -29,7 +29,9 @@ + [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \ + [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \ + [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \ +- [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, ++ [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \ ++ [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \ ++ [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD, + + #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK + #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK +@@ -43,6 +45,8 @@ + #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK + #define BCM3368_RESET_PCIE 0 + #define BCM3368_RESET_PCIE_EXT 0 ++#define BCM3368_RESET_PCIE_CORE 0 ++#define BCM3368_RESET_PCIE_HARD 0 + + + #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK +@@ -55,11 +59,10 @@ + #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK + #define BCM6318_RESET_PCM 0 + #define BCM6318_RESET_MPI 0 +-#define BCM6318_RESET_PCIE \ +- (SOFTRESET_6318_PCIE_MASK | \ +- SOFTRESET_6318_PCIE_CORE_MASK | \ +- SOFTRESET_6318_PCIE_HARD_MASK) ++#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK + #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK ++#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK ++#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK + + #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK + #define BCM6328_RESET_ENET 0 +@@ -71,11 +74,10 @@ + #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK + #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK + #define BCM6328_RESET_MPI 0 +-#define BCM6328_RESET_PCIE \ +- (SOFTRESET_6328_PCIE_MASK | \ +- SOFTRESET_6328_PCIE_CORE_MASK | \ +- SOFTRESET_6328_PCIE_HARD_MASK) ++#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK + #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK ++#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK ++#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK + + #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK + #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK +@@ -89,6 +91,8 @@ + #define BCM6338_RESET_MPI 0 + #define BCM6338_RESET_PCIE 0 + #define BCM6338_RESET_PCIE_EXT 0 ++#define BCM6338_RESET_PCIE_CORE 0 ++#define BCM6338_RESET_PCIE_HARD 0 + + #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK + #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK +@@ -102,6 +106,8 @@ + #define BCM6348_RESET_MPI 0 + #define BCM6348_RESET_PCIE 0 + #define BCM6348_RESET_PCIE_EXT 0 ++#define BCM6348_RESET_PCIE_CORE 0 ++#define BCM6348_RESET_PCIE_HARD 0 + + #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK + #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK +@@ -115,6 +121,8 @@ + #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK + #define BCM6358_RESET_PCIE 0 + #define BCM6358_RESET_PCIE_EXT 0 ++#define BCM6358_RESET_PCIE_CORE 0 ++#define BCM6358_RESET_PCIE_HARD 0 + + #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK + #define BCM6362_RESET_ENET 0 +@@ -126,9 +134,10 @@ + #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK + #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK + #define BCM6362_RESET_MPI 0 +-#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \ +- SOFTRESET_6362_PCIE_CORE_MASK) ++#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK + #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK ++#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK ++#define BCM6362_RESET_PCIE_HARD 0 + + #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK + #define BCM6368_RESET_ENET 0 +@@ -142,6 +151,8 @@ + #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK + #define BCM6368_RESET_PCIE 0 + #define BCM6368_RESET_PCIE_EXT 0 ++#define BCM6368_RESET_PCIE_CORE 0 ++#define BCM6368_RESET_PCIE_HARD 0 + + #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK + #define BCM63268_RESET_ENET 0 +@@ -153,10 +164,10 @@ + #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK + #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK + #define BCM63268_RESET_MPI 0 +-#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \ +- SOFTRESET_63268_PCIE_CORE_MASK | \ +- SOFTRESET_63268_PCIE_HARD_MASK) ++#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK + #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK ++#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK ++#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK + + /* + * core reset bits +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h +@@ -15,6 +15,8 @@ enum bcm63xx_core_reset { + BCM63XX_RESET_MPI, + BCM63XX_RESET_PCIE, + BCM63XX_RESET_PCIE_EXT, ++ BCM63XX_RESET_PCIE_CORE, ++ BCM63XX_RESET_PCIE_HARD, + }; + + void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset); +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo + + /* reset the PCIe core */ + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1); + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1); ++ if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) { ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0); ++ } + mdelay(10); + ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0); + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0); + mdelay(10); + diff --git a/target/linux/brcm63xx/patches-4.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch new file mode 100644 index 000000000..3d9835df2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch @@ -0,0 +1,333 @@ +From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 15 Dec 2013 20:47:34 +0100 +Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318 + +--- + arch/mips/bcm63xx/clk.c | 25 ++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 6 ++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 60 +++++++++++- + arch/mips/pci/ops-bcm63xx.c | 16 +++- + arch/mips/pci/pci-bcm63xx.c | 106 ++++++++++++++++++---- + 5 files changed, 184 insertions(+), 29 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -52,6 +52,18 @@ static void bcm_hwclock_set(u32 mask, in + bcm_perf_writel(reg, PERF_CKCTL_REG); + } + ++static void bcm_ub_hwclock_set(u32 mask, int enable) ++{ ++ u32 reg; ++ ++ reg = bcm_perf_readl(PERF_UB_CKCTL_REG); ++ if (enable) ++ reg |= mask; ++ else ++ reg &= ~mask; ++ bcm_perf_writel(reg, PERF_UB_CKCTL_REG); ++} ++ + /* + * Ethernet MAC "misc" clock: dma clocks and main clock on 6348 + */ +@@ -362,12 +374,17 @@ static struct clk clk_ipsec = { + + static void pcie_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318()) { ++ bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable); ++ bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable); ++ bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable); ++ } else if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable); +- else if (BCMCPU_IS_6362()) ++ } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable); +- else if (BCMCPU_IS_63268()) ++ } else if (BCMCPU_IS_63268()) { + bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable); ++ } + } + + static struct clk clk_pcie = { +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -41,6 +41,12 @@ + #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \ + BCM_CB_MEM_SIZE - 1) + ++#define BCM_PCIE_MEM_BASE_PA_6318 0x10200000 ++#define BCM_PCIE_MEM_SIZE_6318 (1 * 1024 * 1024) ++#define BCM_PCIE_MEM_END_PA_6318 (BCM_PCIE_MEM_BASE_PA_6318 + \ ++ BCM_PCIE_MEM_SIZE_6318 - 1) ++ ++ + #define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000 + #define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024) + #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -1530,6 +1530,17 @@ + * _REG relative to RSET_PCIE + *************************************************************************/ + ++#define PCIE_SPECIFIC_REG 0x188 ++#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT 0 ++#define SPECIFIC_ENDIAN_MODE_BAR1_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT) ++#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT 2 ++#define SPECIFIC_ENDIAN_MODE_BAR2_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT) ++#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT 4 ++#define SPECIFIC_ENDIAN_MODE_BAR3_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT) ++#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN 0 ++#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1 ++#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN 2 ++ + #define PCIE_CONFIG2_REG 0x408 + #define CONFIG2_BAR1_SIZE_EN 1 + #define CONFIG2_BAR1_SIZE_MASK 0xf +@@ -1575,7 +1586,54 @@ + #define PCIE_RC_INT_C (1 << 2) + #define PCIE_RC_INT_D (1 << 3) + +-#define PCIE_DEVICE_OFFSET 0x8000 ++#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG 0x400c ++#define C2P_MEM_WIN_ENDIAN_MODE_MASK 0x3 ++#define C2P_MEM_WIN_ENDIAN_NO_SWAP 0 ++#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1 ++#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2 ++#define C2P_MEM_WIN_BASE_ADDR_SHIFT 20 ++#define C2P_MEM_WIN_BASE_ADDR_MASK (0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT) ++ ++#define PCIE_RC_BAR1_CONFIG_LO_REG 0x402c ++#define RC_BAR_CFG_LO_SIZE_256MB 0xd ++#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT 20 ++#define RC_BAR_CFG_LO_MATCH_ADDR_MASK (0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT) ++ ++#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070 ++#define C2P_BASELIMIT_LIMIT_SHIFT 20 ++#define C2P_BASELIMIT_LIMIT_MASK (0xfff << C2P_BASELIMIT_LIMIT_SHIFT) ++#define C2P_BASELIMIT_BASE_SHIFT 4 ++#define C2P_BASELIMIT_BASE_MASK (0xfff << C2P_BASELIMIT_BASE_SHIFT) ++ ++#define PCIE_UBUS_BAR1_CFG_REMAP_REG 0x4088 ++#define BAR1_CFG_REMAP_OFFSET_SHIFT 20 ++#define BAR1_CFG_REMAP_OFFSET_MASK (0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT) ++#define BAR1_CFG_REMAP_ACCESS_EN 1 ++ ++#define PCIE_HARD_DEBUG_REG 0x4204 ++#define HARD_DEBUG_SERDES_IDDQ (1 << 23) ++ ++#define PCIE_CPU_INT1_MASK_CLEAR_REG 0x830c ++#define CPU_INT_PCIE_ERR_ATTN_CPU (1 << 0) ++#define CPU_INT_PCIE_INTA (1 << 1) ++#define CPU_INT_PCIE_INTB (1 << 2) ++#define CPU_INT_PCIE_INTC (1 << 3) ++#define CPU_INT_PCIE_INTD (1 << 4) ++#define CPU_INT_PCIE_INTR (1 << 5) ++#define CPU_INT_PCIE_NMI (1 << 6) ++#define CPU_INT_PCIE_UBUS (1 << 7) ++#define CPU_INT_IPI (1 << 8) ++ ++#define PCIE_EXT_CFG_INDEX_REG 0x8400 ++#define EXT_CFG_FUNC_NUM_SHIFT 12 ++#define EXT_CFG_FUNC_NUM_MASK (0x7 << EXT_CFG_FUNC_NUM_SHIFT) ++#define EXT_CFG_DEV_NUM_SHIFT 15 ++#define EXT_CFG_DEV_NUM_MASK (0xf << EXT_CFG_DEV_NUM_SHIFT) ++#define EXT_CFG_BUS_NUM_SHIFT 20 ++#define EXT_CFG_BUS_NUM_MASK (0xff << EXT_CFG_BUS_NUM_SHIFT) ++ ++#define PCIE_DEVICE_OFFSET_6318 0x9000 ++#define PCIE_DEVICE_OFFSET_6328 0x8000 + + /************************************************************************* + * _REG relative to RSET_OTP +--- a/arch/mips/pci/ops-bcm63xx.c ++++ b/arch/mips/pci/ops-bcm63xx.c +@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_ + if (!bcm63xx_pcie_can_access(bus, devfn)) + return PCIBIOS_DEVICE_NOT_FOUND; + +- if (bus->number == PCIE_BUS_DEVICE) +- reg += PCIE_DEVICE_OFFSET; ++ if (bus->number == PCIE_BUS_DEVICE) { ++ if (BCMCPU_IS_6318()) ++ reg += PCIE_DEVICE_OFFSET_6318; ++ else ++ reg += PCIE_DEVICE_OFFSET_6328; ++ } + + data = bcm_pcie_readl(reg); + +@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci + if (!bcm63xx_pcie_can_access(bus, devfn)) + return PCIBIOS_DEVICE_NOT_FOUND; + +- if (bus->number == PCIE_BUS_DEVICE) +- reg += PCIE_DEVICE_OFFSET; ++ if (bus->number == PCIE_BUS_DEVICE) { ++ if (BCMCPU_IS_6318()) ++ reg += PCIE_DEVICE_OFFSET_6318; ++ else ++ reg += PCIE_DEVICE_OFFSET_6328; ++ } + + + data = bcm_pcie_readl(reg); +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v + + void __iomem *pci_iospace_start; + +-static void __init bcm63xx_reset_pcie(void) ++static void __init bcm63xx_reset_pcie_gen1(void) + { + u32 val; + u32 reg; +@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo + mdelay(200); + } + +-static struct clk *pcie_clk; +- +-static int __init bcm63xx_register_pcie(void) ++static void __init bcm63xx_reset_pcie_gen2(void) + { + u32 val; + +- /* enable clock */ +- pcie_clk = clk_get(NULL, "pcie"); +- if (IS_ERR_OR_NULL(pcie_clk)) +- return -ENODEV; ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0); + +- clk_prepare_enable(pcie_clk); ++ /* reset the PCIe core */ ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0); ++ mdelay(10); ++ val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG); ++ val &= ~HARD_DEBUG_SERDES_IDDQ; ++ bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0); ++ mdelay(200); ++} + +- bcm63xx_reset_pcie(); ++static void __init bcm63xx_init_pcie_gen1(void) ++{ ++ u32 val; + + /* configure the PCIe bridge */ + val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG); +@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie( + val |= OPT2_CFG_TYPE1_BD_SEL; + bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG); + ++ /* set bar0 to little endian */ ++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT; ++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT; ++ val |= BASEMASK_REMAP_EN; ++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG); ++ ++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT; ++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG); ++} ++ ++static void __init bcm63xx_init_pcie_gen2(void) ++{ ++ u32 val; ++ ++ bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB | ++ CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD, ++ PCIE_CPU_INT1_MASK_CLEAR_REG); ++ ++ val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK; ++ val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) << ++ C2P_BASELIMIT_BASE_SHIFT; ++ ++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG); ++ ++ /* set bar0 to little endian */ ++ val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG); ++ val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK; ++ val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP; ++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG); ++ ++ bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG); ++ bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG); ++ bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG); ++ ++ bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT, ++ PCIE_EXT_CFG_INDEX_REG); ++} ++ ++static struct clk *pcie_clk; ++ ++static int __init bcm63xx_register_pcie(void) ++{ ++ u32 val; ++ ++ /* enable clock */ ++ pcie_clk = clk_get(NULL, "pcie"); ++ if (IS_ERR_OR_NULL(pcie_clk)) ++ return -ENODEV; ++ ++ clk_prepare_enable(pcie_clk); ++ ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { ++ bcm63xx_reset_pcie_gen1(); ++ bcm63xx_init_pcie_gen1(); ++ } else { ++ bcm63xx_reset_pcie_gen2(); ++ bcm63xx_init_pcie_gen2(); ++ } ++ + /* setup class code as bridge */ + val = bcm_pcie_readl(PCIE_IDVAL3_REG); + val &= ~IDVAL3_CLASS_CODE_MASK; +@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie( + val &= ~CONFIG2_BAR1_SIZE_MASK; + bcm_pcie_writel(val, PCIE_CONFIG2_REG); + +- /* set bar0 to little endian */ +- val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT; +- val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT; +- val |= BASEMASK_REMAP_EN; +- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG); +- +- val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT; +- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG); +- + register_pci_controller(&bcm63xx_pcie_controller); + + return 0; +@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void) + if (!bcm63xx_pci_enabled) + return -ENODEV; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { ++ if (BCMCPU_IS_6318()) { ++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318; ++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318; ++ } if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { + bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328; + bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328; + } else if (BCMCPU_IS_63268()) { +@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void) + } + + switch (bcm63xx_get_cpu_id()) { ++ case BCM6318_CPU_ID: + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: + case BCM63268_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.14/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch b/target/linux/brcm63xx/patches-4.14/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch new file mode 100644 index 000000000..298fffdfa --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch @@ -0,0 +1,74 @@ +From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 22 Dec 2013 12:26:57 +0100 +Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the + result + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 10 +++++++--- + arch/mips/bcm63xx/prom.c | 4 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++ + 3 files changed, 13 insertions(+), 3 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -22,6 +22,8 @@ + #include + #include + ++static int flash_type; ++ + static struct mtd_partition mtd_partitions[] = { + { + .name = "cfe", +@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t + } + } + ++void __init bcm63xx_flash_detect(void) ++{ ++ flash_type = bcm63xx_detect_flash_type(); ++} ++ + int __init bcm63xx_flash_register(void) + { +- int flash_type; + u32 val; + +- flash_type = bcm63xx_detect_flash_type(); +- + switch (flash_type) { + case BCM63XX_FLASH_TYPE_PARALLEL: + /* read base address of boot chip select (0) */ +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + + void __init prom_init(void) + { +@@ -52,6 +53,9 @@ void __init prom_init(void) + reg &= ~mask; + bcm_perf_writel(reg, PERF_CKCTL_REG); + ++ /* detect and setup flash access */ ++ bcm63xx_flash_detect(); ++ + /* do low level board init */ + board_prom_init(); + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h +@@ -8,6 +8,8 @@ enum { + BCM63XX_FLASH_TYPE_NAND, + }; + ++void bcm63xx_flash_detect(void); ++ + int __init bcm63xx_flash_register(void); + + #endif /* __BCM63XX_FLASH_H */ diff --git a/target/linux/brcm63xx/patches-4.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch b/target/linux/brcm63xx/patches-4.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch new file mode 100644 index 000000000..329a156fe --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch @@ -0,0 +1,84 @@ +From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 22 Dec 2013 13:25:25 +0100 +Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot + +Some bootloaders leave the flash access in an invalid state with dual +read enabled; fix it by disabling it and falling back to simple fast +reads. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 51 insertions(+) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t + } + } + ++#define HSSPI_FLASH_CTRL_REG 0x14 ++#define FLASH_CTRL_READ_OPCODE_MASK 0xff ++#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8) ++#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8) ++#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8) ++#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8) ++#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10 ++#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT) ++#define FLASH_CTRL_MB_EN (1 << 23) ++ + void __init bcm63xx_flash_detect(void) + { + flash_type = bcm63xx_detect_flash_type(); ++ ++ /* ensure flash mapping has sane values */ ++ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL && ++ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || ++ BCMCPU_IS_63268())) { ++ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG); ++ ++ if (val & FLASH_CTRL_MB_EN) { ++ /* cfe might configure non working dual-io mode */ ++ val &= ~FLASH_CTRL_MB_EN; ++ val &= ~FLASH_CTRL_READ_OPCODE_MASK; ++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK; ++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT; ++ ++ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) { ++ case FLASH_CTRL_ADDR_BYTES_3: ++ val |= SPINOR_OP_READ_FAST; ++ break; ++ case FLASH_CTRL_ADDR_BYTES_4: ++ val |= SPINOR_OP_READ_FAST_4B; ++ break; ++ case FLASH_CTRL_ADDR_BYTES_2: ++ default: ++ pr_warn("unsupported address byte mode (%x), not fixing up\n", ++ val & FLASH_CTRL_ADDR_BYTES_MASK); ++ return; ++ } ++ } else { ++ /* ensure dummy bytes is set to 1 for _FAST reads */ ++ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK; ++ ++ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ_FAST_4B) ++ return; ++ ++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK; ++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT; ++ } ++ ++ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG); ++ } + } + + int __init bcm63xx_flash_register(void) diff --git a/target/linux/brcm63xx/patches-4.14/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch b/target/linux/brcm63xx/patches-4.14/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch new file mode 100644 index 000000000..a8eea5b11 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -168,7 +168,11 @@ static struct clk clk_swpkt_usb = { + */ + static void enetsw_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) { ++ if (BCMCPU_IS_6318()) { ++ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN | ++ CKCTL_6318_ROBOSW025_EN, enable); ++ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable); ++ } else if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); + } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); +@@ -220,18 +224,22 @@ static struct clk clk_pcm = { + */ + static void usbh_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318()) { ++ bcm_hwclock_set(CKCTL_6318_USB_EN, enable); ++ bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable); ++ } else if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_USBH_EN, enable); +- else if (BCMCPU_IS_6348()) ++ } else if (BCMCPU_IS_6348()) { + bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); +- else if (BCMCPU_IS_6362()) ++ } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); +- else if (BCMCPU_IS_6368()) ++ } else if (BCMCPU_IS_6368()) { + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); +- else if (BCMCPU_IS_63268()) ++ } else if (BCMCPU_IS_63268()) { + bcm_hwclock_set(CKCTL_63268_USBH_EN, enable); +- else ++ } else { + return; ++ } + + if (enable) + msleep(100); diff --git a/target/linux/brcm63xx/patches-4.14/347-MIPS-BCM6318-USB-support.patch b/target/linux/brcm63xx/patches-4.14/347-MIPS-BCM6318-USB-support.patch new file mode 100644 index 000000000..bd21f5775 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/347-MIPS-BCM6318-USB-support.patch @@ -0,0 +1,124 @@ +--- a/arch/mips/bcm63xx/usb-common.c ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_6318()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); ++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG); + } + + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); +@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_6318()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); ++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG); + } + + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -682,6 +682,12 @@ + #define GPIO_MODE_6368_SPI_SSN4 (1 << 30) + #define GPIO_MODE_6368_SPI_SSN5 (1 << 31) + ++#define GPIO_PINMUX_SEL0_6318 0x1c ++#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26 ++#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) ++#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) ++#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) ++#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) + + #define GPIO_PINMUX_OTHR_REG 0x24 + #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12 +@@ -1000,6 +1006,7 @@ + + #define USBH_PRIV_SWAP_6358_REG 0x0 + #define USBH_PRIV_SWAP_6368_REG 0x1c ++#define USBH_PRIV_SWAP_6318_REG 0x0c + + #define USBH_PRIV_SWAP_USBD_SHIFT 6 + #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT) +@@ -1025,6 +1032,13 @@ + #define USBH_PRIV_SETUP_IOC_SHIFT 4 + #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT) + ++#define USBH_PRIV_SETUP_6318_REG 0x00 ++#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04 ++#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27) ++#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31) ++#define USBH_PRIV_SIM_CTRL_6318_REG 0x20 ++#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5) ++ + + /************************************************************************* + * _REG relative to RSET_USBD +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -126,6 +126,15 @@ void __init board_early_setup(const stru + } + + bcm_gpio_writel(val, GPIO_MODE_REG); ++ ++#if IS_ENABLED(CONFIG_USB) ++ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) { ++ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318); ++ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK; ++ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON; ++ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318); ++ } ++#endif + } + + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -23,6 +23,8 @@ config BCM63XX_CPU_6318 + bool "support 6318 CPU" + select SYS_HAS_CPU_BMIPS32_3300 + select HW_HAS_PCI ++ select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6328 + bool "support 6328 CPU" diff --git a/target/linux/brcm63xx/patches-4.14/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch b/target/linux/brcm63xx/patches-4.14/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch new file mode 100644 index 000000000..cdff8d5a4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -587,6 +587,9 @@ + #define TIMER_CTL_MONOTONIC_MASK (1 << 30) + #define TIMER_CTL_ENABLE_MASK (1 << 31) + ++/* Clock reset control (63268 only) */ ++#define TIMER_CLK_RST_CTL_REG 0x2c ++#define CLK_RST_CTL_USB_REF_CLK_EN (1 << 18) + + /************************************************************************* + * _REG relative to RSET_WDT +@@ -1534,6 +1537,11 @@ + #define STRAPBUS_63268_FCVO_SHIFT 21 + #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT) + ++#define MISC_IDDQ_CTRL_6328_REG 0x48 ++#define MISC_IDDQ_CTRL_63268_REG 0x4c ++ ++#define IDDQ_CTRL_63268_USBH (1 << 4) ++ + #define MISC_STRAPBUS_6328_REG 0x240 + #define STRAPBUS_6328_FCVO_SHIFT 7 + #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -64,6 +64,26 @@ static void bcm_ub_hwclock_set(u32 mask, + bcm_perf_writel(reg, PERF_UB_CKCTL_REG); + } + ++static void bcm_misc_iddq_set(u32 mask, int enable) ++{ ++ u32 offset; ++ u32 reg; ++ ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) ++ offset = MISC_IDDQ_CTRL_6328_REG; ++ else if (BCMCPU_IS_63268()) ++ offset = MISC_IDDQ_CTRL_63268_REG; ++ else ++ return; ++ ++ reg = bcm_misc_readl(offset); ++ if (enable) ++ reg &= ~mask; ++ else ++ reg |= mask; ++ bcm_misc_writel(reg, offset); ++} ++ + /* + * Ethernet MAC "misc" clock: dma clocks and main clock on 6348 + */ +@@ -236,7 +256,17 @@ static void usbh_set(struct clk *clk, in + } else if (BCMCPU_IS_6368()) { + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); + } else if (BCMCPU_IS_63268()) { ++ u32 reg; ++ + bcm_hwclock_set(CKCTL_63268_USBH_EN, enable); ++ bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable); ++ bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable); ++ reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG); ++ if (enable) ++ reg |= CLK_RST_CTL_USB_REF_CLK_EN; ++ else ++ reg &= ~CLK_RST_CTL_USB_REF_CLK_EN; ++ bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG); + } else { + return; + } diff --git a/target/linux/brcm63xx/patches-4.14/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch b/target/linux/brcm63xx/patches-4.14/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch new file mode 100644 index 000000000..41f48b93d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch @@ -0,0 +1,117 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -1034,11 +1034,18 @@ + #define USBH_PRIV_SETUP_6368_REG 0x28 + #define USBH_PRIV_SETUP_IOC_SHIFT 4 + #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT) ++#define USBH_PRIV_SETUP_IPP_SHIFT 5 ++#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT) + + #define USBH_PRIV_SETUP_6318_REG 0x00 ++#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18 + #define USBH_PRIV_PLL_CTRL1_6318_REG 0x04 +-#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27) +-#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31) ++ ++#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27) ++#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31) ++#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9) ++#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10) ++ + #define USBH_PRIV_SIM_CTRL_6318_REG 0x20 + #define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -73,6 +73,8 @@ config BCM63XX_CPU_63268 + bool "support 63268 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI ++ select BCM63XX_EHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh + int __init bcm63xx_ehci_register(void) + { + if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() && +- !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268()) + return 0; + + ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); +--- a/arch/mips/bcm63xx/usb-common.c ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_63268()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ reg &= ~USBH_PRIV_SETUP_IPP_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG); ++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN | ++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY); ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG); + } else if (BCMCPU_IS_6318()) { + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); +@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void) + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); +@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_63268()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ reg &= ~USBH_PRIV_SETUP_IPP_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG); ++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN | ++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY); ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG); + } else if (BCMCPU_IS_6318()) { + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); +@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void) + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); diff --git a/target/linux/brcm63xx/patches-4.14/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch b/target/linux/brcm63xx/patches-4.14/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch new file mode 100644 index 000000000..599e4f85e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch @@ -0,0 +1,108 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -42,6 +42,7 @@ struct board_info { + + /* USB config */ + struct bcm63xx_usbd_platform_data usbd; ++ unsigned int num_usbh_ports:2; + + /* DSP config */ + struct bcm63xx_dsp_platform_data dsp; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h +@@ -1,6 +1,6 @@ + #ifndef BCM63XX_DEV_USB_EHCI_H_ + #define BCM63XX_DEV_USB_EHCI_H_ + +-int bcm63xx_ehci_register(void); ++int bcm63xx_ehci_register(unsigned int num_ports); + + #endif /* BCM63XX_DEV_USB_EHCI_H_ */ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h +@@ -1,6 +1,6 @@ + #ifndef BCM63XX_DEV_USB_OHCI_H_ + #define BCM63XX_DEV_USB_OHCI_H_ + +-int bcm63xx_ohci_register(void); ++int bcm63xx_ohci_register(unsigned int num_ports); + + #endif /* BCM63XX_DEV_USB_OHCI_H_ */ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -166,6 +166,8 @@ static struct platform_device bcm63xx_gp + */ + int __init board_register_devices(void) + { ++ int usbh_ports = 0; ++ + if (board.has_uart0) + bcm63xx_uart_register(0); + +@@ -187,14 +189,21 @@ int __init board_register_devices(void) + !board_get_mac_address(board.enetsw.mac_addr)) + bcm63xx_enetsw_register(&board.enetsw); + ++ if ((board.has_ohci0 || board.has_ehci0)) { ++ usbh_ports = board.num_usbh_ports; ++ ++ if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd)) ++ usbh_ports = 1; ++ } ++ + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + + if (board.has_ehci0) +- bcm63xx_ehci_register(); ++ bcm63xx_ehci_register(usbh_ports); + + if (board.has_ohci0) +- bcm63xx_ohci_register(); ++ bcm63xx_ohci_register(usbh_ports); + + if (board.has_dsp) + bcm63xx_dsp_register(&board.dsp); +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh + }, + }; + +-int __init bcm63xx_ehci_register(void) ++int __init bcm63xx_ehci_register(unsigned int num_ports) + { + if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() && + !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268()) + return 0; + ++ bcm63xx_ehci_pdata.num_ports = num_ports; ++ + ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); + ehci_resources[0].end = ehci_resources[0].start; + ehci_resources[0].end += RSET_EHCI_SIZE - 1; +--- a/arch/mips/bcm63xx/dev-usb-ohci.c ++++ b/arch/mips/bcm63xx/dev-usb-ohci.c +@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc + .big_endian_desc = 1, + .big_endian_mmio = 1, + .no_big_frame_no = 1, +- .num_ports = 1, + .power_on = bcm63xx_ohci_power_on, + .power_off = bcm63xx_ohci_power_off, + .power_suspend = bcm63xx_ohci_power_off, +@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh + }, + }; + +-int __init bcm63xx_ohci_register(void) ++int __init bcm63xx_ohci_register(unsigned int num_ports) + { + if (BCMCPU_IS_6345() || BCMCPU_IS_6338()) + return -ENODEV; + ++ bcm63xx_ohci_pdata.num_ports = num_ports; ++ + ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); + ohci_resources[0].end = ohci_resources[0].start; + ohci_resources[0].end += RSET_OHCI_SIZE - 1; diff --git a/target/linux/brcm63xx/patches-4.14/351-set-board-usbh-ports.patch b/target/linux/brcm63xx/patches-4.14/351-set-board-usbh-ports.patch new file mode 100644 index 000000000..284475cc7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/351-set-board-usbh-ports.patch @@ -0,0 +1,10 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -592,6 +592,7 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_pccard = 1, + .has_ehci0 = 1, ++ .num_usbh_ports = 2, + + .leds = { + { diff --git a/target/linux/brcm63xx/patches-4.14/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch b/target/linux/brcm63xx/patches-4.14/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch new file mode 100644 index 000000000..4b18def4a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch @@ -0,0 +1,96 @@ +From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 21 Jun 2014 12:47:49 +0200 +Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one + board type + +Use the arguments passed to the kernel to detect being booted with +CFE as the indicator for bcm963xx board support, allowing the +non presence of CFE_EPTSEAL to assume a different board type. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Kconfig | 7 +++---- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/boards/board_common.c | 13 +++++++++++++ + arch/mips/bcm63xx/boards/board_common.h | 6 ++++++ + 4 files changed, 23 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -1,12 +1,11 @@ + # SPDX-License-Identifier: GPL-2.0 +-choice +- prompt "Board support" ++menu "Board support" + depends on BCM63XX +- default BOARD_BCM963XX + + config BOARD_BCM963XX + bool "Generic Broadcom 963xx boards" + select SSB ++ default y + help + +-endchoice ++endmenu +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -702,7 +702,7 @@ static const struct board_info __initcon + /* + * early init callback, read nvram data from flash and checksum it + */ +-void __init board_prom_init(void) ++void __init board_bcm963xx_init(void) + { + unsigned int i; + u8 *boot_addr, *cfe; +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -13,6 +13,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -31,6 +33,8 @@ + #include + #include + ++#include "board_common.h" ++ + #define PFX "board: " + + static struct board_info board; +@@ -81,6 +85,15 @@ const char *board_get_name(void) + return board.name; + } + ++void __init board_prom_init(void) ++{ ++ /* detect bootloader */ ++ if (fw_arg3 == CFE_EPTSEAL) ++ board_bcm963xx_init(); ++ else ++ panic("unsupported bootloader detected"); ++} ++ + static int (*board_get_mac_address)(u8 mac[ETH_ALEN]); + + /* +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -6,4 +6,10 @@ + void board_early_setup(const struct board_info *board, + int (*get_mac_address)(u8 mac[ETH_ALEN])); + ++#if defined(CONFIG_BOARD_BCM963XX) ++void board_bcm963xx_init(void); ++#else ++static inline void board_bcm963xx_init(void) { } ++#endif ++ + #endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.14/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch b/target/linux/brcm63xx/patches-4.14/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch new file mode 100644 index 000000000..846f0b81d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch @@ -0,0 +1,61 @@ +From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 04:28:14 +0100 +Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force + flash address + +Allow board implementations to force the physmap address. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++----- + .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++ + 2 files changed, 16 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -58,6 +58,12 @@ static struct platform_device mtd_dev = + }, + }; + ++void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end) ++{ ++ mtd_resources[0].start = start; ++ mtd_resources[0].end = end; ++} ++ + static int __init bcm63xx_detect_flash_type(void) + { + u32 val; +@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void) + + switch (flash_type) { + case BCM63XX_FLASH_TYPE_PARALLEL: +- /* read base address of boot chip select (0) */ +- val = bcm_mpi_readl(MPI_CSBASE_REG(0)); +- val &= MPI_CSBASE_BASE_MASK; + +- mtd_resources[0].start = val; +- mtd_resources[0].end = 0x1FFFFFFF; ++ if (!mtd_resources[0].start) { ++ /* read base address of boot chip select (0) */ ++ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ val &= MPI_CSBASE_BASE_MASK; ++ ++ mtd_resources[0].start = val; ++ mtd_resources[0].end = 0x1FFFFFFF; ++ } + + return platform_device_register(&mtd_dev); + case BCM63XX_FLASH_TYPE_SERIAL: +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h +@@ -10,6 +10,8 @@ enum { + + void bcm63xx_flash_detect(void); + ++void bcm63xx_flash_force_phys_base_address(u32 start, u32 end); ++ + int __init bcm63xx_flash_register(void); + + #endif /* __BCM63XX_FLASH_H */ diff --git a/target/linux/brcm63xx/patches-4.14/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch b/target/linux/brcm63xx/patches-4.14/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch new file mode 100644 index 000000000..3819a8f08 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch @@ -0,0 +1,188 @@ +From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:31:12 +0200 +Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own + unit + +In preparation for enhancing it, move it into its own file. Require a +mac address to be passed as the argument to always "reserve" the mac +regardless of the inclusion state of SSB. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/boards/board_common.c | 53 ++-------------- + arch/mips/bcm63xx/sprom.c | 70 ++++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 ++ + 4 files changed, 83 insertions(+), 48 deletions(-) + create mode 100644 arch/mips/bcm63xx/sprom.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ +- usb-common.o ++ usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -40,44 +40,6 @@ + static struct board_info board; + + /* +- * Register a sane SPROMv2 to make the on-board +- * bcm4318 WLAN work +- */ +-#ifdef CONFIG_SSB_PCIHOST +-static struct ssb_sprom bcm63xx_sprom = { +- .revision = 0x02, +- .board_rev = 0x17, +- .country_code = 0x0, +- .ant_available_bg = 0x3, +- .pa0b0 = 0x15ae, +- .pa0b1 = 0xfa85, +- .pa0b2 = 0xfe8d, +- .pa1b0 = 0xffff, +- .pa1b1 = 0xffff, +- .pa1b2 = 0xffff, +- .gpio0 = 0xff, +- .gpio1 = 0xff, +- .gpio2 = 0xff, +- .gpio3 = 0xff, +- .maxpwr_bg = 0x004c, +- .itssi_bg = 0x00, +- .boardflags_lo = 0x2848, +- .boardflags_hi = 0x0000, +-}; +- +-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) +-{ +- if (bus->bustype == SSB_BUSTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); +- return 0; +- } else { +- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); +- return -EINVAL; +- } +-} +-#endif +- +-/* + * return board name for /proc/cpuinfo + */ + const char *board_get_name(void) +@@ -180,6 +142,7 @@ static struct platform_device bcm63xx_gp + int __init board_register_devices(void) + { + int usbh_ports = 0; ++ u8 mac[ETH_ALEN]; + + if (board.has_uart0) + bcm63xx_uart_register(0); +@@ -224,15 +187,10 @@ int __init board_register_devices(void) + /* Generate MAC address for WLAN and register our SPROM, + * do this after registering enet devices + */ +-#ifdef CONFIG_SSB_PCIHOST +- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { +- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- if (ssb_arch_register_fallback_sprom( +- &bcm63xx_get_fallback_sprom) < 0) +- pr_err(PFX "failed to register fallback SPROM\n"); +- } +-#endif ++ ++ if (board_get_mac_address(mac) || ++ bcm63xx_register_fallback_sprom(mac)) ++ pr_err(PFX "failed to register fallback SPROM\n"); + + bcm63xx_spi_register(); + +--- /dev/null ++++ b/arch/mips/bcm63xx/sprom.c +@@ -0,0 +1,70 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2008 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PFX "sprom: " ++ ++/* ++ * Register a sane SPROMv2 to make the on-board ++ * bcm4318 WLAN work ++ */ ++#ifdef CONFIG_SSB_PCIHOST ++static struct ssb_sprom bcm63xx_sprom = { ++ .revision = 0x02, ++ .board_rev = 0x17, ++ .country_code = 0x0, ++ .ant_available_bg = 0x3, ++ .pa0b0 = 0x15ae, ++ .pa0b1 = 0xfa85, ++ .pa0b2 = 0xfe8d, ++ .pa1b0 = 0xffff, ++ .pa1b1 = 0xffff, ++ .pa1b2 = 0xffff, ++ .gpio0 = 0xff, ++ .gpio1 = 0xff, ++ .gpio2 = 0xff, ++ .gpio3 = 0xff, ++ .maxpwr_bg = 0x004c, ++ .itssi_bg = 0x00, ++ .boardflags_lo = 0x2848, ++ .boardflags_hi = 0x0000, ++}; ++ ++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) ++{ ++ if (bus->bustype == SSB_BUSTYPE_PCI) { ++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ return 0; ++ } else { ++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); ++ return -EINVAL; ++ } ++} ++#endif ++ ++int __init bcm63xx_register_fallback_sprom(u8 *mac) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_SSB_PCIHOST ++ memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN); ++ ++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom); ++#endif ++ return ret; ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -0,0 +1,6 @@ ++#ifndef __BCM63XX_FALLBACK_SPROM ++#define __BCM63XX_FALLBACK_SPROM ++ ++int bcm63xx_register_fallback_sprom(u8 *mac); ++ ++#endif diff --git a/target/linux/brcm63xx/patches-4.14/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch b/target/linux/brcm63xx/patches-4.14/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch new file mode 100644 index 000000000..ac94a0991 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch @@ -0,0 +1,95 @@ +From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:43:49 +0200 +Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom + +Similar to ethernet setup, use a platform data struct for passing +the mac. This eliminates the requirement to allocate an array on +stack for the mac passed. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_common.c | 6 ++---- + arch/mips/bcm63xx/sprom.c | 8 ++++---- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++- + arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 4 ++++ + 4 files changed, 17 insertions(+), 9 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -142,7 +142,6 @@ static struct platform_device bcm63xx_gp + int __init board_register_devices(void) + { + int usbh_ports = 0; +- u8 mac[ETH_ALEN]; + + if (board.has_uart0) + bcm63xx_uart_register(0); +@@ -188,8 +187,8 @@ int __init board_register_devices(void) + * do this after registering enet devices + */ + +- if (board_get_mac_address(mac) || +- bcm63xx_register_fallback_sprom(mac)) ++ if (board_get_mac_address(board.fallback_sprom.mac_addr) || ++ bcm63xx_register_fallback_sprom(&board.fallback_sprom)) + pr_err(PFX "failed to register fallback SPROM\n"); + + bcm63xx_spi_register(); +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss + } + #endif + +-int __init bcm63xx_register_fallback_sprom(u8 *mac) ++int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data) + { + int ret = 0; + + #ifdef CONFIG_SSB_PCIHOST +- memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); + + ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom); + #endif +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -1,6 +1,12 @@ + #ifndef __BCM63XX_FALLBACK_SPROM + #define __BCM63XX_FALLBACK_SPROM + +-int bcm63xx_register_fallback_sprom(u8 *mac); ++#include ++ ++struct fallback_sprom_data { ++ u8 mac_addr[ETH_ALEN]; ++}; ++ ++int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data); + + #endif +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + + /* + * flash mapping +@@ -55,6 +56,9 @@ struct board_info { + + /* External PHY reset GPIO flags from gpio.h */ + unsigned long ephy_reset_gpio_flags; ++ ++ /* fallback sprom config */ ++ struct fallback_sprom_data fallback_sprom; + }; + + #endif /* ! BOARD_BCM963XX_H_ */ diff --git a/target/linux/brcm63xx/patches-4.14/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch b/target/linux/brcm63xx/patches-4.14/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch new file mode 100644 index 000000000..1f1859e00 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch @@ -0,0 +1,140 @@ +From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:52:56 +0200 +Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional + +Some devices do not provide enough mac addresses to populate wifi in +addition to ethernet. + +Use having pci enabled as a rough heuristic which boards should have it +enabled. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 12 ++++++++++++ + arch/mips/bcm63xx/boards/board_common.c | 5 +++-- + arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 1 + + 3 files changed, 16 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -70,6 +70,7 @@ static struct board_info __initdata boar + .has_uart0 = 1, + .has_pci = 1, + .has_usbd = 0, ++ .use_fallback_sprom = 1, + + .usbd = { + .use_fullspeed = 0, +@@ -219,6 +220,7 @@ static struct board_info __initdata boar + .has_uart0 = 1, + .has_enet0 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -264,6 +266,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -324,6 +327,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -378,6 +382,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -436,6 +441,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -459,6 +465,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -477,6 +484,7 @@ static struct board_info __initdata boar + + .has_uart0 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + .has_ohci0 = 1, + + .has_enet0 = 1, +@@ -499,6 +507,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -525,6 +534,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -577,6 +587,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -648,6 +659,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -187,8 +187,9 @@ int __init board_register_devices(void) + * do this after registering enet devices + */ + +- if (board_get_mac_address(board.fallback_sprom.mac_addr) || +- bcm63xx_register_fallback_sprom(&board.fallback_sprom)) ++ if (board.use_fallback_sprom && ++ (board_get_mac_address(board.fallback_sprom.mac_addr) || ++ bcm63xx_register_fallback_sprom(&board.fallback_sprom))) + pr_err(PFX "failed to register fallback SPROM\n"); + + bcm63xx_spi_register(); +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -35,6 +35,7 @@ struct board_info { + unsigned int has_dsp:1; + unsigned int has_uart0:1; + unsigned int has_uart1:1; ++ unsigned int use_fallback_sprom:1; + + /* ethernet config */ + struct bcm63xx_enet_platform_data enet0; diff --git a/target/linux/brcm63xx/patches-4.14/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch b/target/linux/brcm63xx/patches-4.14/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch new file mode 100644 index 000000000..0c4a9be47 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch @@ -0,0 +1,66 @@ +From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:58:38 +0200 +Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom + +Different chips require different sprom contents, so prepare for +supplying the appropriate sprom type. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 13 ++++++++++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 5 +++++ + 2 files changed, 17 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -22,7 +22,7 @@ + * bcm4318 WLAN work + */ + #ifdef CONFIG_SSB_PCIHOST +-static struct ssb_sprom bcm63xx_sprom = { ++static __initconst struct ssb_sprom bcm63xx_default_sprom = { + .revision = 0x02, + .board_rev = 0x17, + .country_code = 0x0, +@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom = + .boardflags_hi = 0x0000, + }; + ++static struct ssb_sprom bcm63xx_sprom; ++ + int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) + { + if (bus->bustype == SSB_BUSTYPE_PCI) { +@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr + int ret = 0; + + #ifdef CONFIG_SSB_PCIHOST ++ switch (data->type) { ++ case SPROM_DEFAULT: ++ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, ++ sizeof(bcm63xx_sprom)); ++ break; ++ default: ++ return -EINVAL; ++ } ++ + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -3,8 +3,13 @@ + + #include + ++enum sprom_type { ++ SPROM_DEFAULT, /* default fallback sprom */ ++}; ++ + struct fallback_sprom_data { + u8 mac_addr[ETH_ALEN]; ++ enum sprom_type type; + }; + + int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data); diff --git a/target/linux/brcm63xx/patches-4.14/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch b/target/linux/brcm63xx/patches-4.14/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch new file mode 100644 index 000000000..42502eb06 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch @@ -0,0 +1,517 @@ +From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 22:16:36 +0200 +Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms + +Allow using raw sprom content as templates. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 482 insertions(+) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss + return -EINVAL; + } + } ++ ++/* FIXME: use lib_sprom after submission upstream */ ++ ++/* Get the word-offset for a SSB_SPROM_XXX define. */ ++#define SPOFF(offset) ((offset) / sizeof(u16)) ++/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */ ++#define SPEX16(_outvar, _offset, _mask, _shift) \ ++ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift)) ++#define SPEX32(_outvar, _offset, _mask, _shift) \ ++ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \ ++ in[SPOFF(_offset)]) & (_mask)) >> (_shift)) ++#define SPEX(_outvar, _offset, _mask, _shift) \ ++ SPEX16(_outvar, _offset, _mask, _shift) ++ ++#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ ++ do { \ ++ SPEX(_field[0], _offset + 0, _mask, _shift); \ ++ SPEX(_field[1], _offset + 2, _mask, _shift); \ ++ SPEX(_field[2], _offset + 4, _mask, _shift); \ ++ SPEX(_field[3], _offset + 6, _mask, _shift); \ ++ SPEX(_field[4], _offset + 8, _mask, _shift); \ ++ SPEX(_field[5], _offset + 10, _mask, _shift); \ ++ SPEX(_field[6], _offset + 12, _mask, _shift); \ ++ SPEX(_field[7], _offset + 14, _mask, _shift); \ ++ } while (0) ++ ++ ++static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in, ++ u16 mask, u16 shift) ++{ ++ u16 v; ++ u8 gain; ++ ++ v = in[SPOFF(SSB_SPROM1_AGAIN)]; ++ gain = (v & mask) >> shift; ++ if (gain == 0xFF) ++ gain = 2; /* If unset use 2dBm */ ++ if (sprom_revision == 1) { ++ /* Convert to Q5.2 */ ++ gain <<= 2; ++ } else { ++ /* Q5.2 Fractional part is stored in 0xC0 */ ++ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2); ++ } ++ ++ return (s8)gain; ++} ++ ++static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in) ++{ ++ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0); ++ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0); ++ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0); ++ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0); ++ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0); ++ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0); ++ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0); ++ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0); ++ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0); ++ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO, ++ SSB_SPROM2_MAXP_A_LO_SHIFT); ++} ++ ++static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in) ++{ ++ u16 loc[3]; ++ ++ if (out->revision == 3) /* rev 3 moved MAC */ ++ loc[0] = SSB_SPROM3_IL0MAC; ++ else { ++ loc[0] = SSB_SPROM1_IL0MAC; ++ loc[1] = SSB_SPROM1_ET0MAC; ++ loc[2] = SSB_SPROM1_ET1MAC; ++ } ++ ++ SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0); ++ SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A, ++ SSB_SPROM1_ETHPHY_ET1A_SHIFT); ++ SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14); ++ SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15); ++ SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0); ++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); ++ if (out->revision == 1) ++ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE, ++ SSB_SPROM1_BINF_CCODE_SHIFT); ++ SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA, ++ SSB_SPROM1_BINF_ANTA_SHIFT); ++ SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG, ++ SSB_SPROM1_BINF_ANTBG_SHIFT); ++ SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0); ++ SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0); ++ SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0); ++ SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0); ++ SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0); ++ SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0); ++ SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1, ++ SSB_SPROM1_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3, ++ SSB_SPROM1_GPIOB_P3_SHIFT); ++ SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A, ++ SSB_SPROM1_MAXPWR_A_SHIFT); ++ SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0); ++ SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A, ++ SSB_SPROM1_ITSSI_A_SHIFT); ++ SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0); ++ SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0); ++ ++ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0); ++ ++ /* Extract the antenna gain values. */ ++ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN_BG, ++ SSB_SPROM1_AGAIN_BG_SHIFT); ++ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN_A, ++ SSB_SPROM1_AGAIN_A_SHIFT); ++ if (out->revision >= 2) ++ sprom_extract_r23(out, in); ++} ++ ++/* Revs 4 5 and 8 have partially shared layout */ ++static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in) ++{ ++ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, ++ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT); ++ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01, ++ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT); ++ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23, ++ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT); ++ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23, ++ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT); ++ ++ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01, ++ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT); ++ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01, ++ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT); ++ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23, ++ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT); ++ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23, ++ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT); ++ ++ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01, ++ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT); ++ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01, ++ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT); ++ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23, ++ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT); ++ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23, ++ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT); ++ ++ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01, ++ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT); ++ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01, ++ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT); ++ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23, ++ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT); ++ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, ++ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT); ++} ++ ++static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in) ++{ ++ u16 il0mac_offset; ++ ++ if (out->revision == 4) ++ il0mac_offset = SSB_SPROM4_IL0MAC; ++ else ++ il0mac_offset = SSB_SPROM5_IL0MAC; ++ ++ SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0); ++ SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A, ++ SSB_SPROM4_ETHPHY_ET1A_SHIFT); ++ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0); ++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); ++ if (out->revision == 4) { ++ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0); ++ SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0); ++ SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0); ++ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0); ++ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0); ++ } else { ++ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0); ++ SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0); ++ SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0); ++ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0); ++ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0); ++ } ++ SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A, ++ SSB_SPROM4_ANTAVAIL_A_SHIFT); ++ SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG, ++ SSB_SPROM4_ANTAVAIL_BG_SHIFT); ++ SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0); ++ SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG, ++ SSB_SPROM4_ITSSI_BG_SHIFT); ++ SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0); ++ SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A, ++ SSB_SPROM4_ITSSI_A_SHIFT); ++ if (out->revision == 4) { ++ SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1, ++ SSB_SPROM4_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3, ++ SSB_SPROM4_GPIOB_P3_SHIFT); ++ } else { ++ SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1, ++ SSB_SPROM5_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3, ++ SSB_SPROM5_GPIOB_P3_SHIFT); ++ } ++ ++ /* Extract the antenna gain values. */ ++ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01, ++ SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT); ++ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01, ++ SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT); ++ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23, ++ SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT); ++ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23, ++ SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT); ++ ++ sprom_extract_r458(out, in); ++ ++ /* TODO - get remaining rev 4 stuff needed */ ++} ++ ++static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) ++{ ++ int i; ++ u16 o; ++ u16 pwr_info_offset[] = { ++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1, ++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3 ++ }; ++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != ++ ARRAY_SIZE(out->core_pwr_info)); ++ ++ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0); ++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); ++ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0); ++ SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0); ++ SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0); ++ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0); ++ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0); ++ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A, ++ SSB_SPROM8_ANTAVAIL_A_SHIFT); ++ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG, ++ SSB_SPROM8_ANTAVAIL_BG_SHIFT); ++ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0); ++ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG, ++ SSB_SPROM8_ITSSI_BG_SHIFT); ++ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0); ++ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A, ++ SSB_SPROM8_ITSSI_A_SHIFT); ++ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0); ++ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK, ++ SSB_SPROM8_MAXP_AL_SHIFT); ++ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1, ++ SSB_SPROM8_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3, ++ SSB_SPROM8_GPIOB_P3_SHIFT); ++ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0); ++ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G, ++ SSB_SPROM8_TRI5G_SHIFT); ++ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0); ++ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH, ++ SSB_SPROM8_TRI5GH_SHIFT); ++ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0); ++ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G, ++ SSB_SPROM8_RXPO5G_SHIFT); ++ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0); ++ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G, ++ SSB_SPROM8_RSSISMC2G_SHIFT); ++ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G, ++ SSB_SPROM8_RSSISAV2G_SHIFT); ++ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G, ++ SSB_SPROM8_BXA2G_SHIFT); ++ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0); ++ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G, ++ SSB_SPROM8_RSSISMC5G_SHIFT); ++ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G, ++ SSB_SPROM8_RSSISAV5G_SHIFT); ++ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G, ++ SSB_SPROM8_BXA5G_SHIFT); ++ SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0); ++ SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0); ++ SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0); ++ SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0); ++ SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0); ++ SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0); ++ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0); ++ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0); ++ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0); ++ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0); ++ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0); ++ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0); ++ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0); ++ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0); ++ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0); ++ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0); ++ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0); ++ ++ /* Extract the antenna gain values. */ ++ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01, ++ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); ++ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01, ++ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); ++ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23, ++ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); ++ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, ++ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); ++ ++ /* Extract cores power info info */ ++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { ++ o = pwr_info_offset[i]; ++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI, ++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI, ++ SSB_SPROM8_2G_MAXP, 0); ++ ++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0); ++ ++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI, ++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI, ++ SSB_SPROM8_5G_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP, ++ SSB_SPROM8_5GH_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP, ++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT); ++ ++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0); ++ } ++ ++ /* Extract FEM info */ ++ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); ++ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); ++ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); ++ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); ++ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); ++ ++ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); ++ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); ++ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); ++ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); ++ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); ++ ++ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON, ++ SSB_SPROM8_LEDDC_ON_SHIFT); ++ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF, ++ SSB_SPROM8_LEDDC_OFF_SHIFT); ++ ++ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN, ++ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT); ++ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN, ++ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT); ++ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH, ++ SSB_SPROM8_TXRXC_SWITCH_SHIFT); ++ ++ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0); ++ ++ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0); ++ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0); ++ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0); ++ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0); ++ ++ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP, ++ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT); ++ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER, ++ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT); ++ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX, ++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE, ++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT); ++ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX, ++ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT); ++ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX, ++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION, ++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT); ++ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP, ++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR, ++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT); ++ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP, ++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP, ++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT); ++ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL, ++ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT); ++ ++ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0); ++ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0); ++ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0); ++ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0); ++ ++ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH, ++ SSB_SPROM8_THERMAL_TRESH_SHIFT); ++ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET, ++ SSB_SPROM8_THERMAL_OFFSET_SHIFT); ++ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA, ++ SSB_SPROM8_TEMPDELTA_PHYCAL, ++ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT); ++ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD, ++ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT); ++ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA, ++ SSB_SPROM8_TEMPDELTA_HYSTERESIS, ++ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT); ++ sprom_extract_r458(out, in); ++ ++ /* TODO - get remaining rev 8 stuff needed */ ++} ++ ++static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size) ++{ ++ memset(out, 0, sizeof(*out)); ++ ++ out->revision = in[size - 1] & 0x00FF; ++ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ ++ memset(out->et1mac, 0xFF, 6); ++ ++ switch (out->revision) { ++ case 1: ++ case 2: ++ case 3: ++ sprom_extract_r123(out, in); ++ break; ++ case 4: ++ case 5: ++ sprom_extract_r45(out, in); ++ break; ++ case 8: ++ sprom_extract_r8(out, in); ++ break; ++ default: ++ pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n", ++ out->revision); ++ out->revision = 1; ++ sprom_extract_r123(out, in); ++ } ++ ++ if (out->boardflags_lo == 0xFFFF) ++ out->boardflags_lo = 0; /* per specs */ ++ if (out->boardflags_hi == 0xFFFF) ++ out->boardflags_hi = 0; /* per specs */ ++ ++ return 0; ++} ++ ++static __initdata u16 template_sprom[220]; + #endif + ++ + int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data) + { + int ret = 0; + + #ifdef CONFIG_SSB_PCIHOST ++ u16 size = 0; ++ + switch (data->type) { + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, +@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr + return -EINVAL; + } + ++ if (size > 0) ++ sprom_extract(&bcm63xx_sprom, template_sprom, size); ++ + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); diff --git a/target/linux/brcm63xx/patches-4.14/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch b/target/linux/brcm63xx/patches-4.14/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch new file mode 100644 index 000000000..65c00b519 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch @@ -0,0 +1,181 @@ +From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 22:33:38 +0200 +Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common + ssb cards + +Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 136 +++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 + + 2 files changed, 142 insertions(+) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6 + .boardflags_hi = 0x0000, + }; + ++ ++static __initconst u16 bcm4306_sprom[] = { ++ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002, ++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4, ++ 0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff, ++ 0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002, ++}; ++ ++static __initconst u16 bcm4318_sprom[] = { ++ 0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000, ++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7, ++ 0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff, ++ 0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002, ++}; ++ ++static __initconst u16 bcm4321_sprom[] = { ++ 0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000, ++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36, ++ 0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0004, ++}; ++ ++static __initconst u16 bcm4322_sprom[] = { ++ 0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000, ++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43222_sprom[] = { ++ 0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000, ++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ + static struct ssb_sprom bcm63xx_sprom; + + int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) +@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr + u16 size = 0; + + switch (data->type) { ++ case SPROM_BCM4306: ++ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom)); ++ size = ARRAY_SIZE(bcm4306_sprom); ++ break; ++ case SPROM_BCM4318: ++ memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom)); ++ size = ARRAY_SIZE(bcm4318_sprom); ++ break; ++ case SPROM_BCM4321: ++ memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom)); ++ size = ARRAY_SIZE(bcm4321_sprom); ++ break; ++ case SPROM_BCM4322: ++ memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom)); ++ size = ARRAY_SIZE(bcm4322_sprom); ++ break; ++ case SPROM_BCM43222: ++ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom)); ++ size = ARRAY_SIZE(bcm43222_sprom); ++ break; + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, + sizeof(bcm63xx_sprom)); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -5,6 +5,12 @@ + + enum sprom_type { + SPROM_DEFAULT, /* default fallback sprom */ ++ /* SSB based */ ++ SPROM_BCM4306, ++ SPROM_BCM4318, ++ SPROM_BCM4321, ++ SPROM_BCM4322, ++ SPROM_BCM43222, + }; + + struct fallback_sprom_data { diff --git a/target/linux/brcm63xx/patches-4.14/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch b/target/linux/brcm63xx/patches-4.14/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch new file mode 100644 index 000000000..416aa9dc4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch @@ -0,0 +1,128 @@ +From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 22:48:26 +0200 +Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma + +Similar to SSB, register a fallback sprom handler for BCMA. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Kconfig | 1 + + arch/mips/bcm63xx/sprom.c | 40 +++++++++++++++++++++++++++++++++++----- + 2 files changed, 36 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -5,6 +5,7 @@ menu "Board support" + config BOARD_BCM963XX + bool "Generic Broadcom 963xx boards" + select SSB ++ select BCMA + default y + help + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -21,7 +22,7 @@ + * Register a sane SPROMv2 to make the on-board + * bcm4318 WLAN work + */ +-#ifdef CONFIG_SSB_PCIHOST ++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) + static __initconst struct ssb_sprom bcm63xx_default_sprom = { + .revision = 0x02, + .board_rev = 0x17, +@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6 + .boardflags_hi = 0x0000, + }; + +- ++#if defined (CONFIG_SSB_PCIHOST) + static __initconst u16 bcm4306_sprom[] = { + 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002, + 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, +@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[] + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0x0008, + }; ++#endif /* CONFIG_SSB_PCIHOST */ + + static struct ssb_sprom bcm63xx_sprom; + +-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) ++#if defined(CONFIG_SSB_PCIHOST) ++int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out) + { + if (bus->bustype == SSB_BUSTYPE_PCI) { + memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); +@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss + return -EINVAL; + } + } ++#endif ++ ++#if defined(CONFIG_BCMA_HOST_PCI) ++int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out) ++{ ++ if (bus->hosttype == BCMA_HOSTTYPE_PCI) { ++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ return 0; ++ } else { ++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); ++ return -EINVAL; ++ } ++} ++#endif + + /* FIXME: use lib_sprom after submission upstream */ + +@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr + { + int ret = 0; + +-#ifdef CONFIG_SSB_PCIHOST ++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) + u16 size = 0; + + switch (data->type) { ++#if defined(CONFIG_SSB_PCIHOST) + case SPROM_BCM4306: + memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom)); + size = ARRAY_SIZE(bcm4306_sprom); +@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr + memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom)); + size = ARRAY_SIZE(bcm43222_sprom); + break; ++#endif + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, + sizeof(bcm63xx_sprom)); +@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); ++#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */ ++ ++#if defined(CONFIG_SSB_PCIHOST) ++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom); ++ if (ret) ++ return ret; ++ ++#endif + +- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom); ++#if defined(CONFIG_BCMA_HOST_PCI) ++ ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom); ++ if (ret) ++ return ret; + #endif + return ret; + } diff --git a/target/linux/brcm63xx/patches-4.14/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch b/target/linux/brcm63xx/patches-4.14/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch new file mode 100644 index 000000000..5c0abb90e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch @@ -0,0 +1,303 @@ +From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 30 Jul 2014 23:14:27 +0200 +Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates + +Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227, +BCM43228, and BCM4331. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 256 +++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 + + 2 files changed, 264 insertions(+) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[] + }; + #endif /* CONFIG_SSB_PCIHOST */ + ++#if defined(CONFIG_BCMA_HOST_PCI) ++static __initconst u16 bcm4313_sprom[] = { ++ 0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202, ++ 0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201, ++ 0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000, ++ 0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0008, ++}; ++ ++static __initconst u16 bcm43131_sprom[] = { ++ 0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202, ++ 0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415, ++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666, ++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43217_sprom[] = { ++ 0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202, ++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415, ++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666, ++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x7a08, ++}; ++ ++static __initconst u16 bcm43225_sprom[] = { ++ 0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325, ++ 0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, ++ 0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43227_sprom[] = { ++ 0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202, ++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415, ++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666, ++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43228_sprom[] = { ++ 0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215, ++ 0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c, ++ 0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000, ++ 0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446, ++ 0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888, ++ 0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xf008, ++}; ++ ++static __initconst u16 bcm4331_sprom[] = { ++ 0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202, ++ 0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325, ++ 0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657, ++ 0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000, ++ 0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d, ++ 0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000, ++ 0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4, ++ 0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0009, ++}; ++ ++#endif /* CONFIG_BCMA_HOST_PCI */ ++ + static struct ssb_sprom bcm63xx_sprom; + + #if defined(CONFIG_SSB_PCIHOST) +@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr + size = ARRAY_SIZE(bcm43222_sprom); + break; + #endif ++#if defined(CONFIG_BCMA_HOST_PCI) ++ case SPROM_BCM4313: ++ memcpy(&template_sprom, &bcm4313_sprom, ++ sizeof(bcm4313_sprom)); ++ size = ARRAY_SIZE(bcm4313_sprom); ++ break; ++ case SPROM_BCM43131: ++ memcpy(&template_sprom, &bcm43131_sprom, ++ sizeof(bcm43131_sprom)); ++ size = ARRAY_SIZE(bcm43131_sprom); ++ break; ++ case SPROM_BCM43217: ++ memcpy(&template_sprom, &bcm43217_sprom, ++ sizeof(bcm43217_sprom)); ++ size = ARRAY_SIZE(bcm43217_sprom); ++ break; ++ case SPROM_BCM43225: ++ memcpy(&template_sprom, &bcm43225_sprom, ++ sizeof(bcm43225_sprom)); ++ size = ARRAY_SIZE(bcm43225_sprom); ++ break; ++ case SPROM_BCM43227: ++ memcpy(&template_sprom, &bcm43227_sprom, ++ sizeof(bcm43227_sprom)); ++ size = ARRAY_SIZE(bcm43227_sprom); ++ break; ++ case SPROM_BCM43228: ++ memcpy(&template_sprom, &bcm43228_sprom, ++ sizeof(bcm43228_sprom)); ++ size = ARRAY_SIZE(bcm43228_sprom); ++ break; ++ case SPROM_BCM4331: ++ memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom)); ++ size = ARRAY_SIZE(bcm4331_sprom); ++ break; ++#endif + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, + sizeof(bcm63xx_sprom)); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -11,6 +11,14 @@ enum sprom_type { + SPROM_BCM4321, + SPROM_BCM4322, + SPROM_BCM43222, ++ /* BCMA based */ ++ SPROM_BCM4313, ++ SPROM_BCM43131, ++ SPROM_BCM43217, ++ SPROM_BCM43225, ++ SPROM_BCM43227, ++ SPROM_BCM43228, ++ SPROM_BCM4331, + }; + + struct fallback_sprom_data { diff --git a/target/linux/brcm63xx/patches-4.14/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch b/target/linux/brcm63xx/patches-4.14/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch new file mode 100644 index 000000000..74c2846d5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch @@ -0,0 +1,67 @@ +From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 31 Jul 2014 19:12:33 +0200 +Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom + fixups + +Allow board_info files to supply fixups for the base sproms to adapt +them to the actual used sprom contents in case they do not use the +default ones. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 14 +++++++++++++- + .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 ++++++++ + 2 files changed, 21 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro + return 0; + } + ++void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < n; i++) ++ sprom[fixups[i].offset] = fixups[i].value; ++} ++ + static __initdata u16 template_sprom[220]; + #endif + +@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr + return -EINVAL; + } + +- if (size > 0) ++ if (size > 0) { ++ sprom_apply_fixups(template_sprom, data->board_fixups, ++ data->num_board_fixups); ++ + sprom_extract(&bcm63xx_sprom, template_sprom, size); ++ } + + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -21,9 +21,17 @@ enum sprom_type { + SPROM_BCM4331, + }; + ++struct sprom_fixup { ++ u16 offset; ++ u16 value; ++}; ++ + struct fallback_sprom_data { + u8 mac_addr[ETH_ALEN]; + enum sprom_type type; ++ ++ struct sprom_fixup *board_fixups; ++ unsigned int num_board_fixups; + }; + + int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data); diff --git a/target/linux/brcm63xx/patches-4.14/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch b/target/linux/brcm63xx/patches-4.14/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch new file mode 100644 index 000000000..40591e5f2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch @@ -0,0 +1,102 @@ +From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 31 Jul 2014 20:39:44 +0200 +Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for + fallback sprom + +Warn if the set pci bus/slot does not match the actual request. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 31 ++++++++++++++++++---- + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 3 +++ + 2 files changed, 29 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] = + + #endif /* CONFIG_BCMA_HOST_PCI */ + +-static struct ssb_sprom bcm63xx_sprom; ++struct fallback_sprom_match { ++ u8 pci_bus; ++ u8 pci_dev; ++ struct ssb_sprom sprom; ++}; ++ ++static struct fallback_sprom_match fallback_sprom; + + #if defined(CONFIG_SSB_PCIHOST) + int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out) + { + if (bus->bustype == SSB_BUSTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus || ++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev) ++ pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n", ++ fallback_sprom.pci_bus, fallback_sprom.pci_dev, ++ bus->host_pci->bus->number, ++ PCI_SLOT(bus->host_pci->devfn)); ++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom)); + return 0; + } else { + printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); +@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc + int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out) + { + if (bus->hosttype == BCMA_HOSTTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus || ++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev) ++ pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n", ++ fallback_sprom.pci_bus, fallback_sprom.pci_dev, ++ bus->host_pci->bus->number, ++ PCI_SLOT(bus->host_pci->devfn)); ++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom)); + return 0; + } else { + printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); +@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr + break; + #endif + case SPROM_DEFAULT: +- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, +- sizeof(bcm63xx_sprom)); ++ memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom, ++ sizeof(bcm63xx_default_sprom)); + break; + default: + return -EINVAL; +@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr + sprom_apply_fixups(template_sprom, data->board_fixups, + data->num_board_fixups); + +- sprom_extract(&bcm63xx_sprom, template_sprom, size); ++ sprom_extract(&fallback_sprom.sprom, template_sprom, size); + } + +- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); +- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); ++ memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN); ++ memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN); ++ memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN); ++ ++ fallback_sprom.pci_bus = data->pci_bus; ++ fallback_sprom.pci_dev = data->pci_dev; + #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */ + + #if defined(CONFIG_SSB_PCIHOST) +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -30,6 +30,9 @@ struct fallback_sprom_data { + u8 mac_addr[ETH_ALEN]; + enum sprom_type type; + ++ u8 pci_bus; ++ u8 pci_dev; ++ + struct sprom_fixup *board_fixups; + unsigned int num_board_fixups; + }; diff --git a/target/linux/brcm63xx/patches-4.14/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch b/target/linux/brcm63xx/patches-4.14/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch new file mode 100644 index 000000000..f42b3d5e3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch @@ -0,0 +1,118 @@ +From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 24 Jun 2014 10:57:51 +0200 +Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Kconfig | 4 ++++ + arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++ + arch/mips/bcm63xx/prom.c | 6 ++++++ + 3 files changed, 44 insertions(+) + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -2,6 +2,10 @@ + menu "Board support" + depends on BCM63XX + ++config BOARD_BCM63XX_DT ++ bool "Device Tree boards (experimential)" ++ select USE_OF ++ + config BOARD_BCM963XX + bool "Generic Broadcom 963xx boards" + select SSB +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -10,11 +10,14 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -126,8 +129,23 @@ void __init board_setup(void) + /* make sure we're running on expected cpu */ + if (bcm63xx_get_cpu_id() != board.expected_cpu_id) + panic("unexpected CPU for bcm963xx board"); ++ ++#if CONFIG_OF ++ if (initial_boot_params) ++ __dt_setup_arch(initial_boot_params); ++#endif + } + ++#if CONFIG_OF ++void __init device_tree_init(void) ++{ ++ if (!initial_boot_params) ++ return; ++ ++ unflatten_and_copy_device_tree(); ++} ++#endif ++ + static struct gpio_led_platform_data bcm63xx_led_data; + + static struct platform_device bcm63xx_gpio_leds = { +@@ -136,6 +154,13 @@ static struct platform_device bcm63xx_gp + .dev.platform_data = &bcm63xx_led_data, + }; + ++#if CONFIG_OF ++static struct of_device_id of_ids[] = { ++ { /* filled at runtime */ }, ++ { .compatible = "simple-bus" }, ++ { }, ++}; ++#endif + /* + * third stage init callback, register all board devices. + */ +@@ -143,6 +168,15 @@ int __init board_register_devices(void) + { + int usbh_ports = 0; + ++#if CONFIG_OF ++ if (of_have_populated_dt()) { ++ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible), ++ "brcm,bcm%x", bcm63xx_get_cpu_id()); ++ ++ of_platform_populate(NULL, of_ids, NULL, NULL); ++ } ++#endif ++ + if (board.has_uart0) + bcm63xx_uart_register(0); + +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -8,6 +8,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -23,6 +24,11 @@ void __init prom_init(void) + { + u32 reg, mask; + ++#if CONFIG_OF ++ if (fw_passed_dtb) ++ early_init_dt_verify((void *)fw_passed_dtb); ++#endif ++ + bcm63xx_cpu_init(); + + /* stop any running watchdog */ diff --git a/target/linux/brcm63xx/patches-4.14/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch b/target/linux/brcm63xx/patches-4.14/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch new file mode 100644 index 000000000..1c3e5d12e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch @@ -0,0 +1,95 @@ +From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 26 Jun 2014 12:51:00 +0200 +Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info + by dtb + +Allow using the passed dtb's compatible property to match board_info +structs instead of nvram's boardname field, which is not unique anyway. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 +++++++++++++++ + arch/mips/bcm63xx/boards/board_common.c | 18 ++++++++++++++++++ + arch/mips/bcm63xx/boards/board_common.h | 3 +++ + 3 files changed, 36 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -711,6 +711,10 @@ static const struct board_info __initcon + #endif + }; + ++static struct of_device_id const bcm963xx_boards_dt[] = { ++ { }, ++}; ++ + /* + * early init callback, read nvram data from flash and checksum it + */ +@@ -722,6 +726,7 @@ void __init board_bcm963xx_init(void) + char *board_name = NULL; + u32 val; + struct bcm_hcs *hcs; ++ const struct of_device_id *board_match; + + /* read base address of boot chip select (0) + * 6328/6362 do not have MPI but boot from a fixed address +@@ -761,6 +766,16 @@ void __init board_bcm963xx_init(void) + } else { + board_name = bcm63xx_nvram_get_name(); + } ++ ++ /* find board by compat */ ++ board_match = bcm63xx_match_board(bcm963xx_boards_dt); ++ if (board_match) { ++ board_early_setup(board_match->data, ++ bcm63xx_nvram_get_mac_address); ++ ++ return; ++ } ++ + /* find board by name */ + for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) { + if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -243,3 +243,21 @@ int __init board_register_devices(void) + + return 0; + } ++ ++const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m) ++{ ++ const struct of_device_id *match; ++ unsigned long dt_root; ++ ++ if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params) ++ return NULL; ++ ++ dt_root = of_get_flat_dt_root(); ++ ++ for (match = m; match->compatible[0]; match++) { ++ if (of_flat_dt_is_compatible(dt_root, match->compatible)) ++ return match; ++ } ++ ++ return NULL; ++} +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -1,11 +1,14 @@ + #ifndef __BOARD_COMMON_H + #define __BOARD_COMMON_H + ++#include + #include + + void board_early_setup(const struct board_info *board, + int (*get_mac_address)(u8 mac[ETH_ALEN])); + ++const struct of_device_id *bcm63xx_match_board(const struct of_device_id *); ++ + #if defined(CONFIG_BOARD_BCM963XX) + void board_bcm963xx_init(void); + #else diff --git a/target/linux/brcm63xx/patches-4.14/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch b/target/linux/brcm63xx/patches-4.14/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch new file mode 100644 index 000000000..81c4e2364 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch @@ -0,0 +1,65 @@ +From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 21 Nov 2014 16:54:06 +0100 +Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info + list + +Populate the compatible to board_info list to allow dtbs to be used +for known boards. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 34 +++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -712,6 +712,48 @@ static const struct board_info __initcon + }; + + static struct of_device_id const bcm963xx_boards_dt[] = { ++#ifdef CONFIG_OF ++#ifdef CONFIG_BCM63XX_CPU_3368 ++ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6338 ++ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, ++ { .compatible = "brcm,bcm96338w", .data = &board_96338w, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6345 ++ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6348 ++ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, ++ { .compatible = "brcm,bcm96348r", .data = &board_96348r, }, ++ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, ++ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, ++ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, ++ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, ++ { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, ++ { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, ++ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, ++ { .compatible = "usr,9108", .data = &board_96348gw_a, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6358 ++ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, }, ++ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, }, ++ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, ++ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, ++ { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, ++ { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, ++ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, ++ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6368 ++#endif ++#ifdef CONFIG_BCM63XX_CPU_63268 ++#endif ++#endif /* CONFIG_OF */ + { }, + }; + diff --git a/target/linux/brcm63xx/patches-4.14/371_add_of_node_available_by_alias.patch b/target/linux/brcm63xx/patches-4.14/371_add_of_node_available_by_alias.patch new file mode 100644 index 000000000..dbe1a4148 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/371_add_of_node_available_by_alias.patch @@ -0,0 +1,37 @@ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -144,6 +144,18 @@ void __init device_tree_init(void) + + unflatten_and_copy_device_tree(); + } ++ ++int board_of_device_present(const char *alias) ++{ ++ bool present; ++ struct device_node *np; ++ ++ np = of_find_node_by_path(alias); ++ present = of_device_is_available(np); ++ of_node_put(np); ++ ++ return present; ++} + #endif + + static struct gpio_led_platform_data bcm63xx_led_data; +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -15,4 +15,13 @@ void board_bcm963xx_init(void); + static inline void board_bcm963xx_init(void) { } + #endif + ++#if defined(CONFIG_OF) ++int board_of_device_present(const char *alias); ++#else ++static inline void board_of_device_present(const char *alias) ++{ ++ return 0; ++} ++#endif ++ + #endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.14/372_dont_register_pflash_when_available_in_dtb.patch b/target/linux/brcm63xx/patches-4.14/372_dont_register_pflash_when_available_in_dtb.patch new file mode 100644 index 000000000..25384ebb6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/372_dont_register_pflash_when_available_in_dtb.patch @@ -0,0 +1,21 @@ +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -23,6 +23,8 @@ + #include + #include + ++#include "boards/board_common.h" ++ + static int flash_type; + + static struct mtd_partition mtd_partitions[] = { +@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void) + + switch (flash_type) { + case BCM63XX_FLASH_TYPE_PARALLEL: ++ /* don't register when already registered through from dtb */ ++ if (board_of_device_present("pflash")) ++ return 0; + + if (!mtd_resources[0].start) { + /* read base address of boot chip select (0) */ diff --git a/target/linux/brcm63xx/patches-4.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch b/target/linux/brcm63xx/patches-4.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch new file mode 100644 index 000000000..c5041a923 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch @@ -0,0 +1,45 @@ +From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 1 Dec 2014 00:20:07 +0100 +Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/irq.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -14,6 +14,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -21,6 +23,9 @@ + #include + #include + ++IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller", ++ mips_cpu_irq_of_init); ++ + void __init arch_init_irq(void) + { + void __iomem *periph_bases[2]; +@@ -29,6 +34,13 @@ void __init arch_init_irq(void) + int periph_irqs[2] = { 2, 3 }; + int ext_irqs[6]; + ++#ifdef CONFIG_OF ++ if (initial_boot_params) { ++ irqchip_init(); ++ return; ++ } ++#endif ++ + periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); + periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); + ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); diff --git a/target/linux/brcm63xx/patches-4.14/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch b/target/linux/brcm63xx/patches-4.14/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch new file mode 100644 index 000000000..e0fa4398d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch @@ -0,0 +1,178 @@ +From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 20 Feb 2015 19:55:32 +0100 +Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx + + +Signed-off-by: Jonas Gorski +--- + drivers/gpio/Kconfig | 8 +++ + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-bcm63xx.c | 135 +++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 131 insertions(+) + create mode 100644 drivers/gpio/gpio-bcm63xx.c + +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -134,6 +134,13 @@ config GPIO_BCM_KONA + help + Turn on GPIO support for Broadcom "Kona" chips. + ++config GPIO_BCM63XX ++ bool "Broadcom BCM63XX GPIO" ++ depends on MIPS || COMPILE_TEST ++ select GPIO_GENERIC ++ help ++ Turn on GPIO support for Broadcom BCM63XX xDSL chips. ++ + config GPIO_BRCMSTB + tristate "BRCMSTB GPIO support" + default y if (ARCH_BRCMSTB || BMIPS_GENERIC) +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -34,6 +34,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o + obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o + obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o + obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o ++obj-$(CONFIG_GPIO_BCM63XX) += gpio-bcm63xx.o + obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o + obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o + obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o +--- /dev/null ++++ b/drivers/gpio/gpio-bcm63xx.c +@@ -0,0 +1,135 @@ ++/* ++ * Driver for BCM63XX memory-mapped GPIO controllers, based on ++ * Generic driver for memory-mapped GPIO controllers. ++ * ++ * Copyright 2008 MontaVista Software, Inc. ++ * Copyright 2008,2010 Anton Vorontsov ++ * Copyright 2015 Jonas Gorski ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ char irq_name[7]; /* "gpioXX" */ ++ ++ sprintf(irq_name, "gpio%d", gpio); ++ return of_irq_get_byname(chip->of_node, irq_name); ++} ++ ++static int bcm63xx_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct resource *dat_r, *dirout_r; ++ void __iomem *dat; ++ void __iomem *dirout; ++ unsigned long sz; ++ int err; ++ struct gpio_chip *gc; ++ struct bgpio_pdata *pdata = dev_get_platdata(dev); ++ ++ dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!dat_r || !dirout_r) ++ return -EINVAL; ++ ++ if (resource_size(dat_r) != resource_size(dirout_r)) ++ return -EINVAL; ++ ++ sz = resource_size(dat_r); ++ ++ dat = devm_ioremap_resource(dev, dat_r); ++ if (IS_ERR(dat)) ++ return PTR_ERR(dat); ++ ++ dirout = devm_ioremap_resource(dev, dirout_r); ++ if (IS_ERR(dirout)) ++ return PTR_ERR(dirout); ++ ++ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); ++ if (!gc) ++ return -ENOMEM; ++ ++ err = bgpio_init(gc, dev, sz, dat, NULL, NULL, dirout, NULL, ++ BGPIOF_BIG_ENDIAN_BYTE_ORDER); ++ if (err) ++ return err; ++ ++ platform_set_drvdata(pdev, gc); ++ ++ if (dev->of_node) { ++ int id = of_alias_get_id(dev->of_node, "gpio"); ++ u32 ngpios; ++ ++ if (id >= 0) ++ gc->label = devm_kasprintf(dev, GFP_KERNEL, ++ "bcm63xx-gpio.%d", id); ++ ++ if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios)) ++ gc->ngpio = ngpios; ++ ++ if (of_get_property(dev->of_node, "interrupt-names", NULL)) ++ gc->to_irq = bcm63xx_gpio_to_irq; ++ ++ } else if (pdata) { ++ gc->base = pdata->base; ++ if (pdata->ngpio > 0) ++ gc->ngpio = pdata->ngpio; ++ } ++ ++ return gpiochip_add(gc); ++} ++ ++static int bcm63xx_gpio_remove(struct platform_device *pdev) ++{ ++ struct gpio_chip *gc = platform_get_drvdata(pdev); ++ ++ gpiochip_remove(gc); ++ return 0; ++} ++ ++#ifdef CONFIG_OF ++static struct of_device_id bcm63xx_gpio_of_match[] = { ++ { .compatible = "brcm,bcm6345-gpio" }, ++ { }, ++}; ++#endif ++ ++static struct platform_driver bcm63xx_gpio_driver = { ++ .probe = bcm63xx_gpio_probe, ++ .remove = bcm63xx_gpio_remove, ++ .driver = { ++ .name = "bcm63xx-gpio", ++ .of_match_table = of_match_ptr(bcm63xx_gpio_of_match), ++ }, ++}; ++ ++module_platform_driver(bcm63xx_gpio_driver); ++ ++MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers"); ++MODULE_AUTHOR("Jonas Gorski "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm63xx/patches-4.14/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch b/target/linux/brcm63xx/patches-4.14/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch new file mode 100644 index 000000000..1126da4aa --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch @@ -0,0 +1,215 @@ +From 302f69453721e5ee19f583339a3a646821d4a173 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 20 Feb 2015 23:58:54 +0100 +Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_common.c | 2 + + arch/mips/bcm63xx/gpio.c | 145 ++++++++++------------------------------------ + arch/mips/bcm63xx/setup.c | 3 - + 3 files changed, 32 insertions(+), 118 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -189,6 +189,8 @@ int __init board_register_devices(void) + } + #endif + ++ bcm63xx_gpio_init(); ++ + if (board.has_uart0) + bcm63xx_uart_register(0); + +--- a/arch/mips/bcm63xx/gpio.c ++++ b/arch/mips/bcm63xx/gpio.c +@@ -5,147 +5,62 @@ + * + * Copyright (C) 2008 Maxime Bizon + * Copyright (C) 2008-2011 Florian Fainelli ++ * Copyright (C) Jonas Gorski + */ + + #include + #include +-#include + #include + #include + + #include + #include +-#include + #include + +-static u32 gpio_out_low_reg; +- +-static void bcm63xx_gpio_out_low_reg_init(void) ++static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio) + { +- switch (bcm63xx_get_cpu_id()) { +- case BCM6345_CPU_ID: +- gpio_out_low_reg = GPIO_DATA_LO_REG_6345; +- break; +- default: +- gpio_out_low_reg = GPIO_DATA_LO_REG; +- break; +- } +-} +- +-static DEFINE_SPINLOCK(bcm63xx_gpio_lock); +-static u32 gpio_out_low, gpio_out_high; ++ struct resource res[2]; ++ struct bgpio_pdata pdata; + +-static void bcm63xx_gpio_set(struct gpio_chip *chip, +- unsigned gpio, int val) +-{ +- u32 reg; +- u32 mask; +- u32 *v; +- unsigned long flags; +- +- if (gpio >= chip->ngpio) +- BUG(); +- +- if (gpio < 32) { +- reg = gpio_out_low_reg; +- mask = 1 << gpio; +- v = &gpio_out_low; +- } else { +- reg = GPIO_DATA_HI_REG; +- mask = 1 << (gpio - 32); +- v = &gpio_out_high; +- } +- +- spin_lock_irqsave(&bcm63xx_gpio_lock, flags); +- if (val) +- *v |= mask; +- else +- *v &= ~mask; +- bcm_gpio_writel(*v, reg); +- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); +-} ++ memset(res, 0, sizeof(res)); ++ memset(&pdata, 0, sizeof(pdata)); + +-static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio) +-{ +- u32 reg; +- u32 mask; ++ res[0].flags = IORESOURCE_MEM; ++ res[0].start = bcm63xx_regset_address(RSET_GPIO); ++ res[0].start += dir; + +- if (gpio >= chip->ngpio) +- BUG(); ++ res[0].end = res[0].start + 3; + +- if (gpio < 32) { +- reg = gpio_out_low_reg; +- mask = 1 << gpio; +- } else { +- reg = GPIO_DATA_HI_REG; +- mask = 1 << (gpio - 32); +- } ++ res[1].flags = IORESOURCE_MEM; ++ res[1].start = bcm63xx_regset_address(RSET_GPIO); ++ res[1].start += data; + +- return !!(bcm_gpio_readl(reg) & mask); +-} ++ res[1].end = res[1].start + 3; + +-static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, +- unsigned gpio, int dir) +-{ +- u32 reg; +- u32 mask; +- u32 tmp; +- unsigned long flags; +- +- if (gpio >= chip->ngpio) +- BUG(); +- +- if (gpio < 32) { +- reg = GPIO_CTL_LO_REG; +- mask = 1 << gpio; +- } else { +- reg = GPIO_CTL_HI_REG; +- mask = 1 << (gpio - 32); +- } +- +- spin_lock_irqsave(&bcm63xx_gpio_lock, flags); +- tmp = bcm_gpio_readl(reg); +- if (dir == BCM63XX_GPIO_DIR_IN) +- tmp &= ~mask; +- else +- tmp |= mask; +- bcm_gpio_writel(tmp, reg); +- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); ++ pdata.base = id * 32; ++ pdata.ngpio = ngpio; + +- return 0; ++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2, ++ &pdata, sizeof(pdata)); + } + +-static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) ++int __init bcm63xx_gpio_init(void) + { +- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN); +-} ++ int ngpio = bcm63xx_gpio_count(); ++ int data_low_reg; + +-static int bcm63xx_gpio_direction_output(struct gpio_chip *chip, +- unsigned gpio, int value) +-{ +- bcm63xx_gpio_set(chip, gpio, value); +- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT); +-} ++ if (BCMCPU_IS_6345()) ++ data_low_reg = GPIO_DATA_LO_REG_6345; ++ else ++ data_low_reg = GPIO_DATA_LO_REG; + ++ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32)); + +-static struct gpio_chip bcm63xx_gpio_chip = { +- .label = "bcm63xx-gpio", +- .direction_input = bcm63xx_gpio_direction_input, +- .direction_output = bcm63xx_gpio_direction_output, +- .get = bcm63xx_gpio_get, +- .set = bcm63xx_gpio_set, +- .base = 0, +-}; ++ if (ngpio <= 32) ++ return 0; + +-int __init bcm63xx_gpio_init(void) +-{ +- bcm63xx_gpio_out_low_reg_init(); ++ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32); + +- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg); +- if (!BCMCPU_IS_6345()) +- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG); +- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count(); +- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio); ++ return 0; + +- return gpiochip_add_data(&bcm63xx_gpio_chip, NULL); + } +--- a/arch/mips/bcm63xx/setup.c ++++ b/arch/mips/bcm63xx/setup.c +@@ -164,9 +164,6 @@ void __init plat_mem_setup(void) + + int __init bcm63xx_register_devices(void) + { +- /* register gpiochip */ +- bcm63xx_gpio_init(); +- + return board_register_devices(); + } + diff --git a/target/linux/brcm63xx/patches-4.14/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch b/target/linux/brcm63xx/patches-4.14/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch new file mode 100644 index 000000000..3eaf79fac --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch @@ -0,0 +1,129 @@ +From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 21 Feb 2015 17:21:59 +0100 +Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio + + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/boards/board_common.c | 7 +++-- + arch/mips/bcm63xx/gpio.c | 32 ++++++++++++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 ++ + .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 5 +-- + 5 files changed, 42 insertions(+), 6 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -55,7 +55,7 @@ static struct board_info __initdata boar + }, + + .ephy_reset_gpio = 36, +- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH, ++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, + }; + #endif + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -251,9 +251,10 @@ int __init board_register_devices(void) + + platform_device_register(&bcm63xx_gpio_leds); + +- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) +- gpio_request_one(board.ephy_reset_gpio, +- board.ephy_reset_gpio_flags, "ephy-reset"); ++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) { ++ bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio, ++ board.ephy_reset_gpio_flags); ++ } + + return 0; + } +--- a/arch/mips/bcm63xx/gpio.c ++++ b/arch/mips/bcm63xx/gpio.c +@@ -8,15 +8,23 @@ + * Copyright (C) Jonas Gorski + */ + ++#include ++ + #include + #include + #include + #include ++#include + + #include + #include + #include + ++static const char * const gpio_chip_labels[] = { ++ "bcm63xx-gpio.0", ++ "bcm63xx-gpio.1", ++}; ++ + static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio) + { + struct resource res[2]; +@@ -64,3 +72,25 @@ int __init bcm63xx_gpio_init(void) + return 0; + + } ++ ++static struct gpiod_lookup_table ephy_reset = { ++ .dev_id = "bcm63xx_enet-0", ++ .table = { ++ { /* filled at runtime */ }, ++ { }, ++ }, ++}; ++ ++ ++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags) ++{ ++ if (ephy_reset.table[0].chip_label) ++ return; ++ ++ ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32]; ++ ephy_reset.table[0].chip_hwnum = hw_gpio % 32; ++ ephy_reset.table[0].con_id = "reset"; ++ ephy_reset.table[0].flags = flags; ++ ++ gpiod_add_lookup_table(&ephy_reset); ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +@@ -3,9 +3,11 @@ + #define BCM63XX_GPIO_H + + #include ++#include + #include + + int __init bcm63xx_gpio_init(void); ++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags); + + static inline unsigned long bcm63xx_gpio_count(void) + { +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -4,6 +4,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -55,8 +56,8 @@ struct board_info { + /* External PHY reset GPIO */ + unsigned int ephy_reset_gpio; + +- /* External PHY reset GPIO flags from gpio.h */ +- unsigned long ephy_reset_gpio_flags; ++ /* External PHY reset GPIO flags from gpio/machine.h */ ++ enum gpio_lookup_flags ephy_reset_gpio_flags; + + /* fallback sprom config */ + struct fallback_sprom_data fallback_sprom; diff --git a/target/linux/brcm63xx/patches-4.14/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch b/target/linux/brcm63xx/patches-4.14/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch new file mode 100644 index 000000000..6eb1bd028 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch @@ -0,0 +1,35 @@ +From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 21 Feb 2015 17:26:50 +0100 +Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if +present in dtb + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/gpio.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/gpio.c ++++ b/arch/mips/bcm63xx/gpio.c +@@ -20,6 +20,8 @@ + #include + #include + ++#include "boards/board_common.h" ++ + static const char * const gpio_chip_labels[] = { + "bcm63xx-gpio.0", + "bcm63xx-gpio.1", +@@ -48,8 +50,10 @@ static void __init bcm63xx_gpio_init_one + pdata.base = id * 32; + pdata.ngpio = ngpio; + +- platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2, +- &pdata, sizeof(pdata)); ++ if (!board_of_device_present("gpio0") && ++ !board_of_device_present("pinctrl")) ++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, ++ 2, &pdata, sizeof(pdata)); + } + + int __init bcm63xx_gpio_init(void) diff --git a/target/linux/brcm63xx/patches-4.14/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch b/target/linux/brcm63xx/patches-4.14/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch new file mode 100644 index 000000000..b5719990b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch @@ -0,0 +1,59 @@ +From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 25 Mar 2015 13:52:02 +0100 +Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia + ready gpio + +To prepare for a time when gpiobases don't need to be fixed anymore. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-pcmcia.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/mips/bcm63xx/dev-pcmcia.c ++++ b/arch/mips/bcm63xx/dev-pcmcia.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -101,6 +102,14 @@ static const struct { + }, + }; + ++static struct gpiod_lookup_table pcmcia_gpios_table = { ++ .dev_id = "bcm63xx_pcmcia.0", ++ .table = { ++ GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH), ++ { }, ++ }, ++}; ++ + int __init bcm63xx_pcmcia_register(void) + { + int ret, i; +@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void) + switch (bcm63xx_get_cpu_id()) { + case BCM6348_CPU_ID: + pd.ready_gpio = 22; ++ pcmcia_gpios_table.table[0].chip_hwnum = 22; + break; + + case BCM6358_CPU_ID: + pd.ready_gpio = 18; ++ pcmcia_gpios_table.table[0].chip_hwnum = 18; + break; + + default: + return -ENODEV; + } + ++ gpiod_add_lookup_table(&pcmcia_gpios_table); ++ + pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA); + pcmcia_resources[0].end = pcmcia_resources[0].start + + RSET_PCMCIA_SIZE - 1; diff --git a/target/linux/brcm63xx/patches-4.14/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch b/target/linux/brcm63xx/patches-4.14/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch new file mode 100644 index 000000000..253417153 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch @@ -0,0 +1,59 @@ +From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 25 Mar 2015 13:54:56 +0100 +Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio + +Use the new named gpio instead of relying on the hardware gpio numbers +matching the virtual gpio numbers. + +Signed-off-by: Jonas Gorski +--- + drivers/pcmcia/bcm63xx_pcmcia.c | 9 ++++++++- + drivers/pcmcia/bcm63xx_pcmcia.h | 4 ++++ + 2 files changed, 12 insertions(+), 1 deletion(-) + +--- a/drivers/pcmcia/bcm63xx_pcmcia.c ++++ b/drivers/pcmcia/bcm63xx_pcmcia.c +@@ -237,7 +237,7 @@ static unsigned int __get_socket_status( + stat |= SS_XVCARD; + stat |= SS_POWERON; + +- if (gpio_get_value(skt->pd->ready_gpio)) ++ if (gpiod_get_value(skt->ready_gpio)) + stat |= SS_READY; + + return stat; +@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru + goto err; + } + ++ /* get ready gpio */ ++ skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN); ++ if (IS_ERR(skt->ready_gpio)) { ++ ret = PTR_ERR(skt->ready_gpio); ++ goto err; ++ } ++ + /* resources are static */ + sock->resource_ops = &pccard_static_ops; + sock->ops = &bcm63xx_pcmcia_operations; +--- a/drivers/pcmcia/bcm63xx_pcmcia.h ++++ b/drivers/pcmcia/bcm63xx_pcmcia.h +@@ -4,6 +4,7 @@ + + #include + #include ++#include + #include + #include + +@@ -56,6 +57,9 @@ struct bcm63xx_pcmcia_socket { + + /* base address of io memory */ + void __iomem *io_base; ++ ++ /* ready gpio */ ++ struct gpio_desc *ready_gpio; + }; + + #endif /* BCM63XX_PCMCIA_H_ */ diff --git a/target/linux/brcm63xx/patches-4.14/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.14/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch new file mode 100644 index 000000000..5d4265f7f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch @@ -0,0 +1,96 @@ +From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:38:05 +0200 +Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6318 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt | 79 ++++++++++++++++++++++ + 1 file changed, 79 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt +@@ -0,0 +1,79 @@ ++* Broadcom BCM6318 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6318-pinctrl". ++- regs: Register specifiers of dirout, dat, mode, mux, and pad registers. ++- reg-names: Must be "dirout", "dat", "mode", "mux", "pad". ++- gpio-controller: Identifies this node as a gpio controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6318-pinctrl"; ++ reg = <0x10000080 0x08>, ++ <0x10000088 0x08>, ++ <0x10000098 0x04>, ++ <0x1000009c 0x0c>, ++ <0x100000d4 0x18>; ++ reg-names = "dirout", "dat", "mode", "mux", "pad"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led, ephy0_spd_led ++gpio1 1 led, ephy1_spd_led ++gpio2 2 led, ephy2_spd_led ++gpio3 3 led, ephy3_spd_led ++gpio4 4 led, ephy0_act_led ++gpio5 5 led, ephy1_act_led ++gpio6 6 led, ephy2_act_led, serial_led_data ++gpio7 7 led, ephy3_act_led, serial_led_clk ++gpio8 8 led, inet_act_led ++gpio9 9 led, inet_fail_led ++gpio10 10 led, dsl_led ++gpio11 11 led, post_fail_led ++gpio12 12 led, wlan_wps_led ++gpio13 13 led, usb_pwron, usb_device_led ++gpio14 14 led ++gpio15 15 led ++gpio16 16 led ++gpio17 17 led ++gpio18 18 led ++gpio19 19 led ++gpio20 20 led ++gpio21 21 led ++gpio22 22 led ++gpio23 23 led ++gpio24 24 - ++gpio25 25 - ++gpio26 26 - ++gpio27 27 - ++gpio28 28 - ++gpio29 29 - ++gpio30 30 - ++gpio31 31 - ++gpio32 32 - ++gpio33 33 - ++gpio34 34 - ++gpio35 35 - ++gpio36 36 - ++gpio37 37 - ++gpio38 38 - ++gpio39 39 - ++gpio40 40 usb_active ++gpio41 41 - ++gpio42 42 - ++gpio43 43 - ++gpio44 44 - ++gpio45 45 - ++gpio46 46 - ++gpio47 47 - ++gpio48 48 - ++gpio49 49 - diff --git a/target/linux/brcm63xx/patches-4.14/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.14/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch new file mode 100644 index 000000000..2a89dde3c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch @@ -0,0 +1,609 @@ +From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:20:39 +0200 +Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318 + +Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs +to different functions. BCM6318 is similar to BCM6328 with the addition +of a pad register, and the GPIO meaning of the mux register changes +based on the GPIO number. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++ + 3 files changed, 572 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX + bool + select GPIO_GENERIC + ++config PINCTRL_BCM6318 ++ bool "BCM6318 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF ++ + config PINCTRL_BCM6328 + bool "BCM6328 pincontrol driver" if COMPILE_TEST + select PINMUX +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1,4 +1,5 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o ++obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c +@@ -0,0 +1,564 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6318_NGPIO 50 ++ ++struct bcm6318_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6318_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ unsigned mode_val:1; ++ unsigned mux_val:2; ++}; ++ ++struct bcm6318_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ void __iomem *mux[3]; ++ void __iomem *pad[6]; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++static const struct pinctrl_pin_desc bcm6318_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ PINCTRL_PIN(8, "gpio8"), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ PINCTRL_PIN(12, "gpio12"), ++ PINCTRL_PIN(13, "gpio13"), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ PINCTRL_PIN(27, "gpio27"), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ PINCTRL_PIN(30, "gpio30"), ++ PINCTRL_PIN(31, "gpio31"), ++ PINCTRL_PIN(32, "gpio32"), ++ PINCTRL_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++ PINCTRL_PIN(40, "gpio40"), ++ PINCTRL_PIN(41, "gpio41"), ++ PINCTRL_PIN(42, "gpio42"), ++ PINCTRL_PIN(43, "gpio43"), ++ PINCTRL_PIN(44, "gpio44"), ++ PINCTRL_PIN(45, "gpio45"), ++ PINCTRL_PIN(46, "gpio46"), ++ PINCTRL_PIN(47, "gpio47"), ++ PINCTRL_PIN(48, "gpio48"), ++ PINCTRL_PIN(49, "gpio49"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned gpio32_pins[] = { 32 }; ++static unsigned gpio33_pins[] = { 33 }; ++static unsigned gpio34_pins[] = { 34 }; ++static unsigned gpio35_pins[] = { 35 }; ++static unsigned gpio36_pins[] = { 36 }; ++static unsigned gpio37_pins[] = { 37 }; ++static unsigned gpio38_pins[] = { 38 }; ++static unsigned gpio39_pins[] = { 39 }; ++static unsigned gpio40_pins[] = { 40 }; ++static unsigned gpio41_pins[] = { 41 }; ++static unsigned gpio42_pins[] = { 42 }; ++static unsigned gpio43_pins[] = { 43 }; ++static unsigned gpio44_pins[] = { 44 }; ++static unsigned gpio45_pins[] = { 45 }; ++static unsigned gpio46_pins[] = { 46 }; ++static unsigned gpio47_pins[] = { 47 }; ++static unsigned gpio48_pins[] = { 48 }; ++static unsigned gpio49_pins[] = { 49 }; ++ ++#define BCM6318_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6318_pingroup bcm6318_groups[] = { ++ BCM6318_GROUP(gpio0), ++ BCM6318_GROUP(gpio1), ++ BCM6318_GROUP(gpio2), ++ BCM6318_GROUP(gpio3), ++ BCM6318_GROUP(gpio4), ++ BCM6318_GROUP(gpio5), ++ BCM6318_GROUP(gpio6), ++ BCM6318_GROUP(gpio7), ++ BCM6318_GROUP(gpio8), ++ BCM6318_GROUP(gpio9), ++ BCM6318_GROUP(gpio10), ++ BCM6318_GROUP(gpio11), ++ BCM6318_GROUP(gpio12), ++ BCM6318_GROUP(gpio13), ++ BCM6318_GROUP(gpio14), ++ BCM6318_GROUP(gpio15), ++ BCM6318_GROUP(gpio16), ++ BCM6318_GROUP(gpio17), ++ BCM6318_GROUP(gpio18), ++ BCM6318_GROUP(gpio19), ++ BCM6318_GROUP(gpio20), ++ BCM6318_GROUP(gpio21), ++ BCM6318_GROUP(gpio22), ++ BCM6318_GROUP(gpio23), ++ BCM6318_GROUP(gpio24), ++ BCM6318_GROUP(gpio25), ++ BCM6318_GROUP(gpio26), ++ BCM6318_GROUP(gpio27), ++ BCM6318_GROUP(gpio28), ++ BCM6318_GROUP(gpio29), ++ BCM6318_GROUP(gpio30), ++ BCM6318_GROUP(gpio31), ++ BCM6318_GROUP(gpio32), ++ BCM6318_GROUP(gpio33), ++ BCM6318_GROUP(gpio34), ++ BCM6318_GROUP(gpio35), ++ BCM6318_GROUP(gpio36), ++ BCM6318_GROUP(gpio37), ++ BCM6318_GROUP(gpio38), ++ BCM6318_GROUP(gpio39), ++ BCM6318_GROUP(gpio40), ++ BCM6318_GROUP(gpio41), ++ BCM6318_GROUP(gpio42), ++ BCM6318_GROUP(gpio43), ++ BCM6318_GROUP(gpio44), ++ BCM6318_GROUP(gpio45), ++ BCM6318_GROUP(gpio46), ++ BCM6318_GROUP(gpio47), ++ BCM6318_GROUP(gpio48), ++ BCM6318_GROUP(gpio49), ++}; ++ ++/* GPIO_MODE */ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++/* PINMUX_SEL */ ++static const char * const ephy0_spd_led_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const ephy1_spd_led_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const ephy2_spd_led_groups[] = { ++ "gpio2", ++}; ++ ++static const char * const ephy3_spd_led_groups[] = { ++ "gpio3", ++}; ++ ++static const char * const ephy0_act_led_groups[] = { ++ "gpio4", ++}; ++ ++static const char * const ephy1_act_led_groups[] = { ++ "gpio5", ++}; ++ ++static const char * const ephy2_act_led_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const ephy3_act_led_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const inet_act_led_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const inet_fail_led_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const dsl_led_groups[] = { ++ "gpio10", ++}; ++ ++static const char * const post_fail_led_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const wlan_wps_led_groups[] = { ++ "gpio12", ++}; ++ ++static const char * const usb_pwron_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const usb_device_led_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const usb_active_groups[] = { ++ "gpio40", ++}; ++ ++#define BCM6318_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mode_val = 1, \ ++ } ++ ++#define BCM6318_MUX_FUN(n, mux) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mux_val = mux, \ ++ } ++ ++static const struct bcm6318_function bcm6318_funcs[] = { ++ BCM6318_MODE_FUN(led), ++ BCM6318_MUX_FUN(ephy0_spd_led, 1), ++ BCM6318_MUX_FUN(ephy1_spd_led, 1), ++ BCM6318_MUX_FUN(ephy2_spd_led, 1), ++ BCM6318_MUX_FUN(ephy3_spd_led, 1), ++ BCM6318_MUX_FUN(ephy0_act_led, 1), ++ BCM6318_MUX_FUN(ephy1_act_led, 1), ++ BCM6318_MUX_FUN(ephy2_act_led, 1), ++ BCM6318_MUX_FUN(ephy3_act_led, 1), ++ BCM6318_MUX_FUN(serial_led_data, 3), ++ BCM6318_MUX_FUN(serial_led_clk, 3), ++ BCM6318_MUX_FUN(inet_act_led, 1), ++ BCM6318_MUX_FUN(inet_fail_led, 1), ++ BCM6318_MUX_FUN(dsl_led, 1), ++ BCM6318_MUX_FUN(post_fail_led, 1), ++ BCM6318_MUX_FUN(wlan_wps_led, 1), ++ BCM6318_MUX_FUN(usb_pwron, 1), ++ BCM6318_MUX_FUN(usb_device_led, 2), ++ BCM6318_MUX_FUN(usb_active, 2), ++}; ++ ++static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6318_groups); ++} ++ ++static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6318_groups[group].name; ++} ++ ++static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6318_groups[group].pins; ++ *num_pins = bcm6318_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6318_funcs); ++} ++ ++static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6318_funcs[selector].name; ++} ++ ++static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6318_funcs[selector].groups; ++ *num_groups = bcm6318_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin, ++ u32 mode, u32 mux) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ if (pin < 32) { ++ reg = __raw_readl(pctl->mode); ++ reg &= ~BIT(pin); ++ if (mode) ++ reg |= BIT(pin); ++ __raw_writel(reg, pctl->mode); ++ } ++ ++ if (pin < 48) { ++ reg = __raw_readl(pctl->mux[pin / 16]); ++ reg &= ~(3UL << ((pin % 16) * 2)); ++ reg |= mux << ((pin % 16) * 2); ++ __raw_writel(reg, pctl->mux[pin / 16]); ++ } ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ reg = __raw_readl(pctl->pad[pin / 8]); ++ reg &= ~(0xfUL << ((pin % 8) * 4)); ++ reg |= val << ((pin % 8) * 4); ++ __raw_writel(reg, pctl->pad[pin / 8]); ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6318_pingroup *grp = &bcm6318_groups[group]; ++ const struct bcm6318_function *f = &bcm6318_funcs[selector]; ++ ++ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val); ++ ++ return 0; ++} ++ ++static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ if (offset < 13) { ++ /* GPIOs 0-12 use mux 0 as GPIO function */ ++ bcm6318_rmw_mux(pctl, offset, 0, 0); ++ } else if (offset < 42) { ++ /* GPIOs 13-41 use mux 3 as GPIO function */ ++ bcm6318_rmw_mux(pctl, offset, 0, 3); ++ ++ /* FIXME: revert to old value for non gpio? */ ++ bcm6318_set_pad(pctl, offset, 0); ++ } else { ++ /* no idea, really */ ++ } ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6318_pctl_ops = { ++ .get_groups_count = bcm6318_pinctrl_get_group_count, ++ .get_group_name = bcm6318_pinctrl_get_group_name, ++ .get_group_pins = bcm6318_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6318_pmx_ops = { ++ .get_functions_count = bcm6318_pinctrl_get_func_count, ++ .get_function_name = bcm6318_pinctrl_get_func_name, ++ .get_function_groups = bcm6318_pinctrl_get_groups, ++ .set_mux = bcm6318_pinctrl_set_mux, ++ .gpio_request_enable = bcm6318_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6318_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6318_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode, *mux, *pad; ++ unsigned i; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux"); ++ mux = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mux)) ++ return PTR_ERR(mux); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad"); ++ pad = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(pad)) ++ return PTR_ERR(pad); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ ++ for (i = 0; i < 3; i++) ++ pctl->mux[i] = mux + (i * 4); ++ ++ for (i = 0; i < 6; i++) ++ pctl->pad[i] = pad + (i * 4); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6318_pctl_ops; ++ pctl->desc.pmxops = &bcm6318_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins); ++ pctl->desc.pins = bcm6318_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6318_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6318_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6318-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6318_pinctrl_driver = { ++ .probe = bcm6318_pinctrl_probe, ++ .driver = { ++ .name = "bcm6318-pinctrl", ++ .of_match_table = bcm6318_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6318_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.14/383-bcm63xx_select_pinctrl.patch b/target/linux/brcm63xx/patches-4.14/383-bcm63xx_select_pinctrl.patch new file mode 100644 index 000000000..67c8cee22 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/383-bcm63xx_select_pinctrl.patch @@ -0,0 +1,65 @@ +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -25,6 +25,8 @@ config BCM63XX_CPU_6318 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6318 + + config BCM63XX_CPU_6328 + bool "support 6328 CPU" +@@ -32,6 +34,8 @@ config BCM63XX_CPU_6328 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6328 + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -47,6 +51,8 @@ config BCM63XX_CPU_6348 + select SYS_HAS_CPU_BMIPS32_3300 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select PINCTRL ++ select PINCTRL_BCM6348 + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" +@@ -54,6 +60,8 @@ config BCM63XX_CPU_6358 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6358 + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" +@@ -61,6 +69,8 @@ config BCM63XX_CPU_6362 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6362 + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" +@@ -68,6 +78,8 @@ config BCM63XX_CPU_6368 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6368 + + config BCM63XX_CPU_63268 + bool "support 63268 CPU" +@@ -75,6 +87,8 @@ config BCM63XX_CPU_63268 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM63268 + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-4.14/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch b/target/linux/brcm63xx/patches-4.14/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch new file mode 100644 index 000000000..fe4dbe3e1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch @@ -0,0 +1,105 @@ +From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 31 Jul 2017 20:10:36 +0200 +Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree + +--- + arch/mips/bcm63xx/clk.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -489,6 +489,8 @@ static struct clk_lookup bcm3368_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -505,7 +507,9 @@ static struct clk_lookup bcm6318_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -519,7 +523,10 @@ static struct clk_lookup bcm6328_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -532,6 +539,7 @@ static struct clk_lookup bcm6338_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -546,6 +554,7 @@ static struct clk_lookup bcm6345_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -560,6 +569,7 @@ static struct clk_lookup bcm6348_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -576,6 +586,8 @@ static struct clk_lookup bcm6358_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -595,7 +607,10 @@ static struct clk_lookup bcm6362_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -611,6 +626,8 @@ static struct clk_lookup bcm6368_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -625,7 +642,10 @@ static struct clk_lookup bcm63268_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), diff --git a/target/linux/brcm63xx/patches-4.14/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch b/target/linux/brcm63xx/patches-4.14/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch new file mode 100644 index 000000000..81c875ad2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch @@ -0,0 +1,172 @@ +From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 4 Feb 2017 12:58:50 +0100 +Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers + +We now register them through DT, so no need to keep them here. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 ------- + 1 file changed, 7 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -28,9 +28,7 @@ + #include + #include + #include +-#include + #include +-#include + #include + #include + #include +@@ -240,10 +238,6 @@ int __init board_register_devices(void) + bcm63xx_register_fallback_sprom(&board.fallback_sprom))) + pr_err(PFX "failed to register fallback SPROM\n"); + +- bcm63xx_spi_register(); +- +- bcm63xx_hsspi_register(); +- + bcm63xx_flash_register(); + + bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ +- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ ++ dev-pcmcia.o dev-rng.o dev-uart.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ + usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +--- a/arch/mips/bcm63xx/dev-hsspi.c ++++ /dev/null +@@ -1,48 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2012 Jonas Gorski +- */ +- +-#include +-#include +-#include +- +-#include +-#include +-#include +- +-static struct resource spi_resources[] = { +- { +- .start = -1, /* filled at runtime */ +- .end = -1, /* filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- .start = -1, /* filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device bcm63xx_hsspi_device = { +- .name = "bcm63xx-hsspi", +- .id = 0, +- .num_resources = ARRAY_SIZE(spi_resources), +- .resource = spi_resources, +-}; +- +-int __init bcm63xx_hsspi_register(void) +-{ +- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() && +- !BCMCPU_IS_63268()) +- return -ENODEV; +- +- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); +- spi_resources[0].end = spi_resources[0].start; +- spi_resources[0].end += RSET_HSSPI_SIZE - 1; +- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI); +- +- return platform_device_register(&bcm63xx_hsspi_device); +-} +--- a/arch/mips/bcm63xx/dev-spi.c ++++ /dev/null +@@ -1,60 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2009-2011 Florian Fainelli +- * Copyright (C) 2010 Tanguy Bouzeloc +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +- +-static struct resource spi_resources[] = { +- { +- .start = -1, /* filled at runtime */ +- .end = -1, /* filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- .start = -1, /* filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device bcm63xx_spi_device = { +- .id = -1, +- .num_resources = ARRAY_SIZE(spi_resources), +- .resource = spi_resources, +-}; +- +-int __init bcm63xx_spi_register(void) +-{ +- if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345()) +- return -ENODEV; +- +- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); +- spi_resources[0].end = spi_resources[0].start; +- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI); +- +- if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) { +- bcm63xx_spi_device.name = "bcm6348-spi", +- spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1; +- } +- +- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() || +- BCMCPU_IS_6368() || BCMCPU_IS_63268()) { +- bcm63xx_spi_device.name = "bcm6358-spi", +- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; +- } +- +- return platform_device_register(&bcm63xx_spi_device); +-} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h ++++ /dev/null +@@ -1,9 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef BCM63XX_DEV_HSSPI_H +-#define BCM63XX_DEV_HSSPI_H +- +-#include +- +-int bcm63xx_hsspi_register(void); +- +-#endif /* BCM63XX_DEV_HSSPI_H */ diff --git a/target/linux/brcm63xx/patches-4.14/391-MIPS-BCM63XX-do-not-register-uart.patch b/target/linux/brcm63xx/patches-4.14/391-MIPS-BCM63XX-do-not-register-uart.patch new file mode 100644 index 000000000..f317d3b95 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/391-MIPS-BCM63XX-do-not-register-uart.patch @@ -0,0 +1,259 @@ +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ +- dev-pcmcia.o dev-rng.o dev-uart.o \ ++ dev-pcmcia.o dev-rng.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ + usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +--- a/arch/mips/bcm63xx/dev-uart.c ++++ /dev/null +@@ -1,76 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2008 Maxime Bizon +- */ +- +-#include +-#include +-#include +-#include +- +-static struct resource uart0_resources[] = { +- { +- /* start & end filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- /* start filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct resource uart1_resources[] = { +- { +- /* start & end filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- /* start filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device bcm63xx_uart_devices[] = { +- { +- .name = "bcm63xx_uart", +- .id = 0, +- .num_resources = ARRAY_SIZE(uart0_resources), +- .resource = uart0_resources, +- }, +- +- { +- .name = "bcm63xx_uart", +- .id = 1, +- .num_resources = ARRAY_SIZE(uart1_resources), +- .resource = uart1_resources, +- } +-}; +- +-int __init bcm63xx_uart_register(unsigned int id) +-{ +- if (id >= ARRAY_SIZE(bcm63xx_uart_devices)) +- return -ENODEV; +- +- if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() && +- !BCMCPU_IS_6368())) +- return -ENODEV; +- +- if (id == 0) { +- uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0); +- uart0_resources[0].end = uart0_resources[0].start + +- RSET_UART_SIZE - 1; +- uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); +- } +- +- if (id == 1) { +- uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1); +- uart1_resources[0].end = uart1_resources[0].start + +- RSET_UART_SIZE - 1; +- uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1); +- } +- +- return platform_device_register(&bcm63xx_uart_devices[id]); +-} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h ++++ /dev/null +@@ -1,7 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef BCM63XX_DEV_UART_H_ +-#define BCM63XX_DEV_UART_H_ +- +-int bcm63xx_uart_register(unsigned int id); +- +-#endif /* BCM63XX_DEV_UART_H_ */ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -34,8 +34,6 @@ struct board_info { + unsigned int has_ehci0:1; + unsigned int has_usbd:1; + unsigned int has_dsp:1; +- unsigned int has_uart0:1; +- unsigned int has_uart1:1; + unsigned int use_fallback_sprom:1; + + /* ethernet config */ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -20,7 +20,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -189,12 +188,6 @@ int __init board_register_devices(void) + + bcm63xx_gpio_init(); + +- if (board.has_uart0) +- bcm63xx_uart_register(0); +- +- if (board.has_uart1) +- bcm63xx_uart_register(1); +- + if (board.has_pccard) + bcm63xx_pcmcia_register(); + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -35,9 +35,6 @@ static struct board_info __initdata boar + .name = "CVG834G_E15R3921", + .expected_cpu_id = 0x3368, + +- .has_uart0 = 1, +- .has_uart1 = 1, +- + .has_enet0 = 1, + .has_pci = 1, + +@@ -67,7 +64,6 @@ static struct board_info __initdata boar + .name = "96328avng", + .expected_cpu_id = 0x6328, + +- .has_uart0 = 1, + .has_pci = 1, + .has_usbd = 0, + .use_fallback_sprom = 1, +@@ -116,7 +112,6 @@ static struct board_info __initdata boar + .name = "96338GW", + .expected_cpu_id = 0x6338, + +- .has_uart0 = 1, + .has_enet0 = 1, + .enet0 = { + .force_speed_100 = 1, +@@ -159,7 +154,6 @@ static struct board_info __initdata boar + .name = "96338W", + .expected_cpu_id = 0x6338, + +- .has_uart0 = 1, + .has_enet0 = 1, + .enet0 = { + .force_speed_100 = 1, +@@ -204,8 +198,6 @@ static struct board_info __initdata boar + static struct board_info __initdata board_96345gw2 = { + .name = "96345GW2", + .expected_cpu_id = 0x6345, +- +- .has_uart0 = 1, + }; + #endif + +@@ -217,7 +209,6 @@ static struct board_info __initdata boar + .name = "96348R", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_pci = 1, + .use_fallback_sprom = 1, +@@ -262,7 +253,6 @@ static struct board_info __initdata boar + .name = "96348GW-10", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -323,7 +313,6 @@ static struct board_info __initdata boar + .name = "96348GW-11", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -378,7 +367,6 @@ static struct board_info __initdata boar + .name = "96348GW", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -437,7 +425,6 @@ static struct board_info __initdata boar + .name = "F@ST2404", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -482,7 +469,6 @@ static struct board_info __initdata boar + .name = "DV201AMR", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_pci = 1, + .use_fallback_sprom = 1, + .has_ohci0 = 1, +@@ -503,7 +489,6 @@ static struct board_info __initdata boar + .name = "96348GW-A", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -530,7 +515,6 @@ static struct board_info __initdata boar + .name = "96358VW", + .expected_cpu_id = 0x6358, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -583,7 +567,6 @@ static struct board_info __initdata boar + .name = "96358VW2", + .expected_cpu_id = 0x6358, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -633,7 +616,6 @@ static struct board_info __initdata boar + .name = "AGPF-S0", + .expected_cpu_id = 0x6358, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, diff --git a/target/linux/brcm63xx/patches-4.14/392-MIPS-BCM63XX-remove-leds-and-buttons.patch b/target/linux/brcm63xx/patches-4.14/392-MIPS-BCM63XX-remove-leds-and-buttons.patch new file mode 100644 index 000000000..1bbbf9144 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/392-MIPS-BCM63XX-remove-leds-and-buttons.patch @@ -0,0 +1,343 @@ +From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 22 Feb 2015 17:52:32 +0100 +Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 262 ----------------------------- + 1 file changed, 262 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -43,14 +43,6 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + +- .leds = { +- { +- .name = "CVG834G:green:power", +- .gpio = 37, +- .default_trigger= "default-on", +- }, +- }, +- + .ephy_reset_gpio = 36, + .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, + }; +@@ -72,35 +64,6 @@ static struct board_info __initdata boar + .use_fullspeed = 0, + .port_no = 0, + }, +- +- .leds = { +- { +- .name = "96328avng::ppp-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "96328avng::power", +- .gpio = 4, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "96328avng::power-fail", +- .gpio = 8, +- .active_low = 1, +- }, +- { +- .name = "96328avng::wps", +- .gpio = 9, +- .active_low = 1, +- }, +- { +- .name = "96328avng::ppp", +- .gpio = 11, +- .active_low = 1, +- }, +- }, + }; + #endif + +@@ -119,35 +82,6 @@ static struct board_info __initdata boar + }, + + .has_ohci0 = 1, +- +- .leds = { +- { +- .name = "adsl", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ses", +- .gpio = 5, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- } +- }, + }; + + static struct board_info __initdata board_96338w = { +@@ -159,35 +93,6 @@ static struct board_info __initdata boar + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +- +- .leds = { +- { +- .name = "adsl", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ses", +- .gpio = 5, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + #endif + +@@ -217,36 +122,6 @@ static struct board_info __initdata boar + .has_phy = 1, + .use_internal_phy = 1, + }, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_96348gw_10 = { +@@ -278,35 +153,6 @@ static struct board_info __initdata boar + .cs = 2, + .ext_irq = 2, + }, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_96348gw_11 = { +@@ -332,35 +178,6 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_pccard = 1, + .has_ehci0 = 1, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_96348gw = { +@@ -390,35 +207,6 @@ static struct board_info __initdata boar + .ext_irq = 2, + .cs = 2, + }, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_FAST2404 = { +@@ -534,33 +322,6 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_pccard = 1, + .has_ehci0 = 1, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 15, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 22, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 23, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 4, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 5, +- }, +- }, + }; + + static struct board_info __initdata board_96358vw2 = { +@@ -587,29 +348,6 @@ static struct board_info __initdata boar + .has_pccard = 1, + .has_ehci0 = 1, + .num_usbh_ports = 2, +- +- .leds = { +- { +- .name = "adsl", +- .gpio = 22, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 23, +- }, +- { +- .name = "power", +- .gpio = 5, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 4, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_AGPFS0 = { diff --git a/target/linux/brcm63xx/patches-4.14/400-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-4.14/400-bcm963xx_flashmap.patch new file mode 100644 index 000000000..c693ace36 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/400-bcm963xx_flashmap.patch @@ -0,0 +1,65 @@ +From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001 +From: Axel Gembe +Date: Mon, 12 May 2008 18:54:09 +0200 +Subject: [PATCH] bcm963xx: flashmap support + +Signed-off-by: Axel Gembe +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +---------------- + drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++---- + drivers/mtd/redboot.c | 13 +++++++++-- + 3 files changed, 38 insertions(+), 26 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio + } + }; + +-static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL }; ++static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL }; + + static struct physmap_flash_data flash_data = { + .width = 2, +--- a/drivers/mtd/redboot.c ++++ b/drivers/mtd/redboot.c +@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru + int nulllen = 0; + int numslots; + unsigned long offset; ++ unsigned long fis_origin = 0; + #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED + static char nullstring[] = "unallocated"; + #endif +@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru + goto out; + } + ++ if (data && data->origin) { ++ fis_origin = data->origin; ++ } else { ++ for (i = 0; i < numslots; i++) { ++ if (!strncmp(buf[i].name, "RedBoot", 8)) { ++ fis_origin = (buf[i].flash_base & (master->size << 1) - 1); ++ } ++ } ++ } ++ + for (i = 0; i < numslots; i++) { + struct fis_list *new_fl, **prev; + +@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru + goto out; + } + new_fl->img = &buf[i]; +- if (data && data->origin) +- buf[i].flash_base -= data->origin; +- else +- buf[i].flash_base &= master->size-1; ++ if (fis_origin) ++ buf[i].flash_base -= fis_origin; ++ ++ buf[i].flash_base &= (master->size << 1) - 1; + + /* I'm sure the JFFS2 code has done me permanent damage. + * I now think the following is _normal_ diff --git a/target/linux/brcm63xx/patches-4.14/401-bcm963xx_real_rootfs_length.patch b/target/linux/brcm63xx/patches-4.14/401-bcm963xx_real_rootfs_length.patch new file mode 100644 index 000000000..efefba41b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/401-bcm963xx_real_rootfs_length.patch @@ -0,0 +1,27 @@ +--- a/include/linux/bcm963xx_tag.h ++++ b/include/linux/bcm963xx_tag.h +@@ -92,8 +92,10 @@ struct bcm_tag { + __u32 rootfs_crc; + /* 224-227: CRC32 of kernel partition */ + __u32 kernel_crc; +- /* 228-235: Unused at present */ +- char reserved1[8]; ++ /* 228-231: Unused at present */ ++ char reserved1[4]; ++ /* 222-235: Openwrt: real rootfs length */ ++ __u32 real_rootfs_length; + /* 236-239: CRC32 of header excluding last 20 bytes */ + __u32 header_crc; + /* 240-255: Unused at present */ +--- a/drivers/mtd/parsers/parser_imagetag.c ++++ b/drivers/mtd/parsers/parser_imagetag.c +@@ -137,7 +137,8 @@ static int bcm963xx_parse_imagetag_parti + } else { + /* OpenWrt layout */ + rootfsaddr = kerneladdr + kernellen; +- rootfslen = spareaddr - rootfsaddr; ++ rootfslen = buf->real_rootfs_length; ++ spareaddr = rootfsaddr + rootfslen; + } + } else { + goto out; diff --git a/target/linux/brcm63xx/patches-4.14/402_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/brcm63xx/patches-4.14/402_bcm63xx_enet_vlan_incoming_fixed.patch new file mode 100644 index 000000000..627530697 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/402_bcm63xx_enet_vlan_incoming_fixed.patch @@ -0,0 +1,11 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1636,7 +1636,7 @@ static int bcm_enet_change_mtu(struct ne + return -EBUSY; + + /* add ethernet header + vlan tag size */ +- actual_mtu += VLAN_ETH_HLEN; ++ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN; + + /* + * setup maximum size before we get overflow mark in diff --git a/target/linux/brcm63xx/patches-4.14/403-6358-enet1-external-mii-clk.patch b/target/linux/brcm63xx/patches-4.14/403-6358-enet1-external-mii-clk.patch new file mode 100644 index 000000000..2605460a5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/403-6358-enet1-external-mii-clk.patch @@ -0,0 +1,22 @@ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -98,6 +98,8 @@ void __init board_early_setup(const stru + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G3_EXT_MII | + GPIO_MODE_6348_G0_EXT_MII; ++ else if (BCMCPU_IS_6358()) ++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV; + } + + bcm_gpio_writel(val, GPIO_MODE_REG); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -652,6 +652,8 @@ + #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7) + #define GPIO_MODE_6358_SERIAL_LED (1 << 10) + #define GPIO_MODE_6358_UTOPIA (1 << 12) ++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30) ++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31) + + #define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0) + #define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1) diff --git a/target/linux/brcm63xx/patches-4.14/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch b/target/linux/brcm63xx/patches-4.14/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch new file mode 100644 index 000000000..13eecaf0e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch @@ -0,0 +1,269 @@ +From 7fa63fdde703aaabaa7199ae879219737a98a3f3 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 6 Jan 2012 12:24:18 +0100 +Subject: [PATCH] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove + +Only connect/disconnect the phy during probe and remove, not during any +open/close. The phy seldom changes during the runtime, and disconnecting +the phy during close will prevent it from keeping any configuration over +a down/up cycle. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 158 +++++++++++++-------------- + 1 file changed, 78 insertions(+), 80 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -869,10 +869,8 @@ static int bcm_enet_open(struct net_devi + struct bcm_enet_priv *priv; + struct sockaddr addr; + struct device *kdev; +- struct phy_device *phydev; + int i, ret; + unsigned int size; +- char phy_id[MII_BUS_ID_SIZE + 3]; + void *p; + u32 val; + +@@ -880,40 +878,10 @@ static int bcm_enet_open(struct net_devi + kdev = &priv->pdev->dev; + + if (priv->has_phy) { +- /* connect to PHY */ +- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, +- priv->mii_bus->id, priv->phy_id); +- +- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link, +- PHY_INTERFACE_MODE_MII); +- +- if (IS_ERR(phydev)) { +- dev_err(kdev, "could not attach to PHY\n"); +- return PTR_ERR(phydev); +- } +- +- /* mask with MAC supported features */ +- phydev->supported &= (SUPPORTED_10baseT_Half | +- SUPPORTED_10baseT_Full | +- SUPPORTED_100baseT_Half | +- SUPPORTED_100baseT_Full | +- SUPPORTED_Autoneg | +- SUPPORTED_Pause | +- SUPPORTED_MII); +- phydev->advertising = phydev->supported; +- +- if (priv->pause_auto && priv->pause_rx && priv->pause_tx) +- phydev->advertising |= SUPPORTED_Pause; +- else +- phydev->advertising &= ~SUPPORTED_Pause; +- +- phy_attached_info(phydev); +- ++ /* Reset state */ + priv->old_link = 0; + priv->old_duplex = -1; + priv->old_pause = -1; +- } else { +- phydev = NULL; + } + + /* mask all interrupts and request them */ +@@ -923,7 +891,7 @@ static int bcm_enet_open(struct net_devi + + ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev); + if (ret) +- goto out_phy_disconnect; ++ return ret; + + ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0, + dev->name, dev); +@@ -1085,8 +1053,8 @@ static int bcm_enet_open(struct net_devi + enet_dmac_writel(priv, priv->dma_chan_int_mask, + ENETDMAC_IRMASK, priv->tx_chan); + +- if (phydev) +- phy_start(phydev); ++ if (priv->has_phy) ++ phy_start(dev->phydev); + else + bcm_enet_adjust_link(dev); + +@@ -1127,10 +1095,6 @@ out_freeirq_rx: + out_freeirq: + free_irq(dev->irq, dev); + +-out_phy_disconnect: +- if (phydev) +- phy_disconnect(phydev); +- + return ret; + } + +@@ -1235,10 +1199,6 @@ static int bcm_enet_stop(struct net_devi + free_irq(priv->irq_rx, dev); + free_irq(dev->irq, dev); + +- /* release phy */ +- if (priv->has_phy) +- phy_disconnect(dev->phydev); +- + return 0; + } + +@@ -1804,14 +1764,49 @@ static int bcm_enet_probe(struct platfor + + /* do minimal hardware init to be able to probe mii bus */ + bcm_enet_hw_preinit(priv); ++ spin_lock_init(&priv->rx_lock); ++ ++ /* init rx timeout (used for oom) */ ++ init_timer(&priv->rx_timeout); ++ priv->rx_timeout.function = bcm_enet_refill_rx_timer; ++ priv->rx_timeout.data = (unsigned long)dev; ++ ++ /* init the mib update lock&work */ ++ mutex_init(&priv->mib_update_lock); ++ INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer); ++ ++ /* zero mib counters */ ++ for (i = 0; i < ENET_MIB_REG_COUNT; i++) ++ enet_writel(priv, 0, ENET_MIB_REG(i)); ++ ++ /* register netdevice */ ++ dev->netdev_ops = &bcm_enet_ops; ++ netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); ++ ++ dev->ethtool_ops = &bcm_enet_ethtool_ops; ++ /* MTU range: 46 - 2028 */ ++ dev->min_mtu = ETH_ZLEN - ETH_HLEN; ++ dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN; ++ SET_NETDEV_DEV(dev, &pdev->dev); ++ ++ ret = register_netdev(dev); ++ if (ret) ++ goto out_uninit_hw; ++ ++ netif_carrier_off(dev); ++ platform_set_drvdata(pdev, dev); ++ priv->pdev = pdev; ++ priv->net_dev = dev; + + /* MII bus registration */ + if (priv->has_phy) { ++ struct phy_device *phydev; ++ char phy_id[MII_BUS_ID_SIZE + 3]; + + priv->mii_bus = mdiobus_alloc(); + if (!priv->mii_bus) { + ret = -ENOMEM; +- goto out_uninit_hw; ++ goto out_unregister_netdev; + } + + bus = priv->mii_bus; +@@ -1835,6 +1830,35 @@ static int bcm_enet_probe(struct platfor + dev_err(&pdev->dev, "unable to register mdio bus\n"); + goto out_free_mdio; + } ++ ++ /* connect to PHY */ ++ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, ++ priv->mii_bus->id, priv->phy_id); ++ ++ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link, ++ PHY_INTERFACE_MODE_MII); ++ ++ if (IS_ERR(phydev)) { ++ dev_err(&pdev->dev, "could not attach to PHY\n"); ++ goto out_unregister_mdio; ++ } ++ ++ /* mask with MAC supported features */ ++ phydev->supported &= (SUPPORTED_10baseT_Half | ++ SUPPORTED_10baseT_Full | ++ SUPPORTED_100baseT_Half | ++ SUPPORTED_100baseT_Full | ++ SUPPORTED_Autoneg | ++ SUPPORTED_Pause | ++ SUPPORTED_MII); ++ phydev->advertising = phydev->supported; ++ ++ if (priv->pause_auto && priv->pause_rx && priv->pause_tx) ++ phydev->advertising |= SUPPORTED_Pause; ++ else ++ phydev->advertising &= ~SUPPORTED_Pause; ++ ++ phy_attached_info(phydev); + } else { + + /* run platform code to initialize PHY device */ +@@ -1842,47 +1866,16 @@ static int bcm_enet_probe(struct platfor + pd->mii_config(dev, 1, bcm_enet_mdio_read_mii, + bcm_enet_mdio_write_mii)) { + dev_err(&pdev->dev, "unable to configure mdio bus\n"); +- goto out_uninit_hw; ++ goto out_unregister_netdev; + } + } + +- spin_lock_init(&priv->rx_lock); +- +- /* init rx timeout (used for oom) */ +- init_timer(&priv->rx_timeout); +- priv->rx_timeout.function = bcm_enet_refill_rx_timer; +- priv->rx_timeout.data = (unsigned long)dev; +- +- /* init the mib update lock&work */ +- mutex_init(&priv->mib_update_lock); +- INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer); +- +- /* zero mib counters */ +- for (i = 0; i < ENET_MIB_REG_COUNT; i++) +- enet_writel(priv, 0, ENET_MIB_REG(i)); +- +- /* register netdevice */ +- dev->netdev_ops = &bcm_enet_ops; +- netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); +- +- dev->ethtool_ops = &bcm_enet_ethtool_ops; +- /* MTU range: 46 - 2028 */ +- dev->min_mtu = ETH_ZLEN - ETH_HLEN; +- dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN; +- SET_NETDEV_DEV(dev, &pdev->dev); +- +- ret = register_netdev(dev); +- if (ret) +- goto out_unregister_mdio; +- +- netif_carrier_off(dev); +- platform_set_drvdata(pdev, dev); +- priv->pdev = pdev; +- priv->net_dev = dev; +- + return 0; + + out_unregister_mdio: ++ if (dev->phydev) ++ phy_disconnect(dev->phydev); ++ + if (priv->mii_bus) + mdiobus_unregister(priv->mii_bus); + +@@ -1890,6 +1883,9 @@ out_free_mdio: + if (priv->mii_bus) + mdiobus_free(priv->mii_bus); + ++out_unregister_netdev: ++ unregister_netdev(dev); ++ + out_uninit_hw: + /* turn off mdc clock */ + enet_writel(priv, 0, ENET_MIISC_REG); +@@ -1920,6 +1916,7 @@ static int bcm_enet_remove(struct platfo + enet_writel(priv, 0, ENET_MIISC_REG); + + if (priv->has_phy) { ++ phy_disconnect(dev->phydev); + mdiobus_unregister(priv->mii_bus); + mdiobus_free(priv->mii_bus); + } else { diff --git a/target/linux/brcm63xx/patches-4.14/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-4.14/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch new file mode 100644 index 000000000..7a1a56a00 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch @@ -0,0 +1,53 @@ +From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 15 Jul 2012 20:08:57 +0200 +Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports + +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++ + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++ + 2 files changed, 25 insertions(+), 0 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -968,6 +968,19 @@ + #define ENETSW_PORTOV_FDX_MASK (1 << 1) + #define ENETSW_PORTOV_LINKUP_MASK (1 << 0) + ++/* Port RGMII control register */ ++#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x)) ++#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7) ++#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6) ++#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4) ++#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4) ++#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4) ++#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4) ++#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0) ++ ++/* Port RGMII timing register */ ++#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x)) ++ + /* MDIO control register */ + #define ENETSW_MDIOC_REG (0xb0) + #define ENETSW_MDIOC_EXT_MASK (1 << 16) +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -2191,6 +2191,18 @@ static int bcm_enetsw_open(struct net_de + priv->sw_port_link[i] = 0; + } + ++ /* enable external ports */ ++ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) { ++ u8 rgmii_ctrl; ++ ++ if (!priv->used_ports[i].used) ++ continue; ++ ++ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); ++ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; ++ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); ++ } ++ + /* reset mib */ + val = enetsw_readb(priv, ENETSW_GMCR_REG); + val |= ENETSW_GMCR_RST_MIB_MASK; diff --git a/target/linux/brcm63xx/patches-4.14/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-4.14/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch new file mode 100644 index 000000000..a91494db4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -0,0 +1,157 @@ +From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 3 Jul 2011 15:00:38 +0200 +Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 + + 2 files changed, 33 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -17,6 +17,9 @@ + #include + #include + #include ++#include ++#include ++#include + + #include + #include +@@ -66,6 +69,41 @@ void __init bcm63xx_flash_force_phys_bas + mtd_resources[0].end = end; + } + ++static struct spi_board_info bcm63xx_spi_flash_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .mode = 0, ++ .max_speed_hz = 781000, ++ .modalias = "m25p80", ++ }, ++}; ++ ++static void bcm63xx_of_update_spi_flash_speed(struct device_node *np, ++ unsigned int new_hz) ++{ ++ struct property *max_hz; ++ __be32 *hz; ++ ++ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL); ++ if (!max_hz) ++ return; ++ ++ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL); ++ if (!max_hz->name) { ++ kfree(max_hz); ++ return; ++ } ++ ++ max_hz->value = max_hz + 1; ++ max_hz->length = sizeof(*hz); ++ ++ hz = max_hz->value; ++ *hz = cpu_to_be32(new_hz); ++ ++ of_update_property(np, max_hz); ++} ++ + static int __init bcm63xx_detect_flash_type(void) + { + u32 val; +@@ -73,9 +111,15 @@ static int __init bcm63xx_detect_flash_t + switch (bcm63xx_get_cpu_id()) { + case BCM6318_CPU_ID: + /* only support serial flash */ ++ bcm63xx_spi_flash_info[0].max_speed_hz = 62500000; + return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6328_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_6328_REG); ++ if (val & STRAPBUS_6328_HSSPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 33333334; ++ else ++ bcm63xx_spi_flash_info[0].max_speed_hz = 16666667; ++ + if (val & STRAPBUS_6328_BOOT_SEL_SERIAL) + return BCM63XX_FLASH_TYPE_SERIAL; + else +@@ -94,12 +138,20 @@ static int __init bcm63xx_detect_flash_t + return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6362_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_6362_REG); ++ if (val & STRAPBUS_6362_HSSPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000; ++ else ++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000; ++ + if (val & STRAPBUS_6362_BOOT_SEL_SERIAL) + return BCM63XX_FLASH_TYPE_SERIAL; + else + return BCM63XX_FLASH_TYPE_NAND; + case BCM6368_CPU_ID: + val = bcm_gpio_readl(GPIO_STRAPBUS_REG); ++ if (val & STRAPBUS_6368_SPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000; ++ + switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { + case STRAPBUS_6368_BOOT_SEL_NAND: + return BCM63XX_FLASH_TYPE_NAND; +@@ -110,6 +162,11 @@ static int __init bcm63xx_detect_flash_t + } + case BCM63268_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_63268_REG); ++ if (val & STRAPBUS_63268_HSSPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000; ++ else ++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000; ++ + if (val & STRAPBUS_63268_BOOT_SEL_SERIAL) + return BCM63XX_FLASH_TYPE_SERIAL; + else +@@ -176,6 +233,7 @@ void __init bcm63xx_flash_detect(void) + + int __init bcm63xx_flash_register(void) + { ++ struct device_node *np; + u32 val; + + switch (flash_type) { +@@ -195,8 +253,14 @@ int __init bcm63xx_flash_register(void) + + return platform_device_register(&mtd_dev); + case BCM63XX_FLASH_TYPE_SERIAL: +- pr_warn("unsupported serial flash detected\n"); +- return -ENODEV; ++ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor"); ++ if (np) { ++ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz); ++ of_node_put(np); ++ return 0; ++ } else { ++ return -ENODEV; ++ } + case BCM63XX_FLASH_TYPE_NAND: + pr_warn("unsupported NAND flash detected\n"); + return -ENODEV; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -709,6 +709,7 @@ + #define GPIO_STRAPBUS_REG 0x40 + #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1) + #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1) ++#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6) + #define STRAPBUS_6368_BOOT_SEL_MASK 0x3 + #define STRAPBUS_6368_BOOT_SEL_NAND 0 + #define STRAPBUS_6368_BOOT_SEL_SERIAL 1 +@@ -1565,6 +1566,7 @@ + #define IDDQ_CTRL_63268_USBH (1 << 4) + + #define MISC_STRAPBUS_6328_REG 0x240 ++#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4) + #define STRAPBUS_6328_FCVO_SHIFT 7 + #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) + #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28) diff --git a/target/linux/brcm63xx/patches-4.14/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch b/target/linux/brcm63xx/patches-4.14/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch new file mode 100644 index 000000000..91776306f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch @@ -0,0 +1,72 @@ +From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 3 May 2012 14:40:03 +0200 +Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 9 ++++++++- + arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 10 ++++++++++ + 2 files changed, 18 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + + #include "board_common.h" + +@@ -178,6 +179,7 @@ static struct of_device_id of_ids[] = { + int __init board_register_devices(void) + { + int usbh_ports = 0; ++ int i; + + #if CONFIG_OF + if (of_have_populated_dt()) { +@@ -245,6 +247,10 @@ int __init board_register_devices(void) + board.ephy_reset_gpio_flags); + } + ++ /* register any fixups */ ++ for (i = 0; i < board.has_caldata; i++) ++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset); ++ + return 0; + } + +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + + /* + * flash mapping +@@ -17,6 +18,11 @@ + #define BCM963XX_CFE_VERSION_OFFSET 0x570 + #define BCM963XX_NVRAM_OFFSET 0x580 + ++struct ath9k_caldata { ++ unsigned int slot; ++ u32 caldata_offset; ++}; ++ + /* + * board definition + */ +@@ -35,6 +41,10 @@ struct board_info { + unsigned int has_usbd:1; + unsigned int has_dsp:1; + unsigned int use_fallback_sprom:1; ++ unsigned int has_caldata:2; ++ ++ /* wifi calibration data config */ ++ struct ath9k_caldata caldata[2]; + + /* ethernet config */ + struct bcm63xx_enet_platform_data enet0; diff --git a/target/linux/brcm63xx/patches-4.14/415-MIPS-BCM63XX-export-the-attached-flash-type.patch b/target/linux/brcm63xx/patches-4.14/415-MIPS-BCM63XX-export-the-attached-flash-type.patch new file mode 100644 index 000000000..9fbfae4a0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/415-MIPS-BCM63XX-export-the-attached-flash-type.patch @@ -0,0 +1,31 @@ +From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 13 Jan 2014 12:12:30 +0100 +Subject: [PATCH] MIPS: BCM63XX: export the attached flash type + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 5 +++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++ + 2 files changed, 7 insertions(+) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -270,3 +270,8 @@ int __init bcm63xx_flash_register(void) + return -ENODEV; + } + } ++ ++int bcm63xx_flash_get_type(void) ++{ ++ return flash_type; ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h +@@ -14,4 +14,6 @@ void bcm63xx_flash_force_phys_base_addre + + int __init bcm63xx_flash_register(void); + ++int bcm63xx_flash_get_type(void); ++ + #endif /* __BCM63XX_FLASH_H */ diff --git a/target/linux/brcm63xx/patches-4.14/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch b/target/linux/brcm63xx/patches-4.14/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch new file mode 100644 index 000000000..208b8f19a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch @@ -0,0 +1,237 @@ +From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 3 May 2012 14:36:11 +0200 +Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices + +--- + arch/mips/bcm63xx/Makefile | 3 +- + arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 + + 3 files changed, 199 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ +- usb-common.o sprom.o ++ pci-ath9k-fixup.o usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c +@@ -0,0 +1,200 @@ ++/* ++ * Broadcom BCM63XX Ath9k EEPROM fixup helper. ++ * ++ * Copytight (C) 2012 Jonas Gorski ++ * ++ * Based on ++ * ++ * Atheros AP94 reference board PCI initialization ++ * ++ * Copyright (C) 2009-2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o)) ++ ++struct ath9k_fixup { ++ unsigned slot; ++ u8 mac[ETH_ALEN]; ++ struct ath9k_platform_data pdata; ++}; ++ ++static int ath9k_num_fixups; ++static struct ath9k_fixup ath9k_fixups[2] = { ++ { ++ .slot = 255, ++ .pdata = { ++ .led_pin = -1, ++ }, ++ }, ++ { ++ .slot = 255, ++ .pdata = { ++ .led_pin = -1, ++ }, ++ }, ++}; ++ ++static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset) ++{ ++ u32 addr; ++ ++ if (BCMCPU_IS_6328()) { ++ addr = 0x18000000; ++ } else { ++ addr = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ addr &= MPI_CSBASE_BASE_MASK; ++ } ++ ++ switch (bcm63xx_flash_get_type()) { ++ case BCM63XX_FLASH_TYPE_PARALLEL: ++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16)); ++ return eeprom; ++ case BCM63XX_FLASH_TYPE_SERIAL: ++ /* the first megabyte is memory mapped */ ++ if (offset < 0x100000) { ++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16)); ++ return eeprom; ++ } ++ ++ if (BCMCPU_IS_6328()) { ++ /* we can change the memory mapped megabyte */ ++ bcm_hsspi_writel(offset & 0xf00000, 0x18); ++ memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16)); ++ bcm_hsspi_writel(0, 0x18); ++ return eeprom; ++ } ++ /* can't do anything here without talking to the SPI controller. */ ++ case BCM63XX_FLASH_TYPE_NAND: ++ default: ++ return NULL; ++ } ++} ++ ++static void ath9k_pci_fixup(struct pci_dev *dev) ++{ ++ void __iomem *mem; ++ struct ath9k_platform_data *pdata = NULL; ++ struct pci_dev *bridge = pci_upstream_bridge(dev); ++ u16 *cal_data = NULL; ++ u16 cmd; ++ u32 bar0; ++ u32 val; ++ unsigned i; ++ ++ for (i = 0; i < ath9k_num_fixups; i++) { ++ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) ++ continue; ++ ++ cal_data = ath9k_fixups[i].pdata.eeprom_data; ++ pdata = &ath9k_fixups[i].pdata; ++ break; ++ } ++ ++ if (cal_data == NULL) ++ return; ++ ++ if (*cal_data != 0xa55a) { ++ pr_err("pci %s: invalid calibration data\n", pci_name(dev)); ++ return; ++ } ++ ++ pr_info("pci %s: fixup device configuration\n", pci_name(dev)); ++ ++ switch (bcm63xx_get_cpu_id()) { ++ case BCM6328_CPU_ID: ++ val = BCM_PCIE_MEM_BASE_PA_6328; ++ break; ++ case BCM6348_CPU_ID: ++ case BCM6358_CPU_ID: ++ case BCM6368_CPU_ID: ++ val = BCM_PCI_MEM_BASE_PA; ++ break; ++ default: ++ BUG(); ++ } ++ ++ mem = ioremap(val, 0x10000); ++ if (!mem) { ++ pr_err("pci %s: ioremap error\n", pci_name(dev)); ++ return; ++ } ++ ++ if (bridge) ++ pci_enable_device(bridge); ++ ++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); ++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val); ++ ++ pci_read_config_word(dev, PCI_COMMAND, &cmd); ++ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; ++ pci_write_config_word(dev, PCI_COMMAND, cmd); ++ ++ /* set offset to first reg address */ ++ cal_data += 3; ++ while(*cal_data != 0xffff) { ++ u32 reg; ++ reg = *cal_data++; ++ val = *cal_data++; ++ val |= (*cal_data++) << 16; ++ ++ writel(val, mem + reg); ++ udelay(100); ++ } ++ ++ pci_read_config_dword(dev, PCI_VENDOR_ID, &val); ++ dev->vendor = val & 0xffff; ++ dev->device = (val >> 16) & 0xffff; ++ ++ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); ++ dev->revision = val & 0xff; ++ dev->class = val >> 8; /* upper 3 bytes */ ++ ++ pci_read_config_word(dev, PCI_COMMAND, &cmd); ++ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); ++ pci_write_config_word(dev, PCI_COMMAND, cmd); ++ ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); ++ ++ if (bridge) ++ pci_disable_device(bridge); ++ ++ iounmap(mem); ++ ++ dev->dev.platform_data = pdata; ++} ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); ++ ++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset) ++{ ++ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) ++ return; ++ ++ ath9k_fixups[ath9k_num_fixups].slot = slot; ++ ++ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) ++ return; ++ ++ if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac)) ++ return; ++ ++ ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac; ++ ath9k_num_fixups++; ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h +@@ -0,0 +1,7 @@ ++#ifndef _PCI_ATH9K_FIXUP ++#define _PCI_ATH9K_FIXUP ++ ++ ++void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init; ++ ++#endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/brcm63xx/patches-4.14/420-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-4.14/420-BCM63XX-add-endian-check-for-ath9k.patch new file mode 100644 index 000000000..04aa7af0c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/420-BCM63XX-add-endian-check-for-ath9k.patch @@ -0,0 +1,51 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h +@@ -2,6 +2,7 @@ + #define _PCI_ATH9K_FIXUP + + +-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init; ++void pci_enable_ath9k_fixup(unsigned slot, u32 offset, ++ unsigned endian_check) __init; + + #endif /* _PCI_ATH9K_FIXUP */ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -21,6 +21,7 @@ + struct ath9k_caldata { + unsigned int slot; + u32 caldata_offset; ++ unsigned int endian_check:1; + }; + + /* +--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c ++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c +@@ -182,12 +182,14 @@ static void ath9k_pci_fixup(struct pci_d + } + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); + +-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset) ++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, ++ unsigned endian_check) + { + if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) + return; + + ath9k_fixups[ath9k_num_fixups].slot = slot; ++ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; + + if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) + return; +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -249,7 +249,8 @@ int __init board_register_devices(void) + + /* register any fixups */ + for (i = 0; i < board.has_caldata; i++) +- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset); ++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, ++ board.caldata[i].endian_check); + + return 0; + } diff --git a/target/linux/brcm63xx/patches-4.14/421-BCM63XX-add-led-pin-for-ath9k.patch b/target/linux/brcm63xx/patches-4.14/421-BCM63XX-add-led-pin-for-ath9k.patch new file mode 100644 index 000000000..18be66f0a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/421-BCM63XX-add-led-pin-for-ath9k.patch @@ -0,0 +1,51 @@ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -250,7 +250,7 @@ int __init board_register_devices(void) + /* register any fixups */ + for (i = 0; i < board.has_caldata; i++) + pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, +- board.caldata[i].endian_check); ++ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high); + + return 0; + } +--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c ++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c +@@ -183,13 +183,15 @@ static void ath9k_pci_fixup(struct pci_d + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); + + void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, +- unsigned endian_check) ++ unsigned endian_check, int led_pin, bool led_active_high) + { + if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) + return; + + ath9k_fixups[ath9k_num_fixups].slot = slot; + ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; ++ ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin; ++ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high; + + if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) + return; +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -22,6 +22,8 @@ struct ath9k_caldata { + unsigned int slot; + u32 caldata_offset; + unsigned int endian_check:1; ++ int led_pin; ++ bool led_active_high; + }; + + /* +--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h +@@ -3,6 +3,6 @@ + + + void pci_enable_ath9k_fixup(unsigned slot, u32 offset, +- unsigned endian_check) __init; ++ unsigned endian_check, int led_pin, bool led_active_high) __init; + + #endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/brcm63xx/patches-4.14/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch b/target/linux/brcm63xx/patches-4.14/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch new file mode 100644 index 000000000..3cc6dfb91 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch @@ -0,0 +1,185 @@ +From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 7 Jan 2013 17:45:39 +0100 +Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices + +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++- + arch/mips/bcm63xx/dev-flash.c | 2 +- + arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +- + .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++- + .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++ + 7 files changed, 104 insertions(+), 8 deletions(-) + create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ +- pci-ath9k-fixup.o usb-common.o sprom.o ++ pci-ath9k-fixup.o pci-rt2x00-fixup.o usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -33,6 +33,7 @@ + #include + #include + #include ++#include + + #include "board_common.h" + +@@ -248,9 +249,19 @@ int __init board_register_devices(void) + } + + /* register any fixups */ +- for (i = 0; i < board.has_caldata; i++) +- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, +- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high); ++ for (i = 0; i < board.has_caldata; i++) { ++ switch (board.caldata[i].vendor) { ++ case PCI_VENDOR_ID_ATHEROS: ++ pci_enable_ath9k_fixup(board.caldata[i].slot, ++ board.caldata[i].caldata_offset, board.caldata[i].endian_check, ++ board.caldata[i].led_pin, board.caldata[i].led_active_high); ++ break; ++ case PCI_VENDOR_ID_RALINK: ++ pci_enable_rt2x00_fixup(board.caldata[i].slot, ++ board.caldata[i].eeprom); ++ break; ++ } ++ } + + return 0; + } +--- /dev/null ++++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c +@@ -0,0 +1,72 @@ ++/* ++ * Broadcom BCM63XX RT2x00 EEPROM fixup helper. ++ * ++ * Copyright (C) 2012 Álvaro Fernández Rojas ++ * ++ * Based on ++ * ++ * Broadcom BCM63XX Ath9k EEPROM fixup helper. ++ * ++ * Copyright (C) 2012 Jonas Gorski ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct rt2x00_fixup { ++ unsigned slot; ++ u8 mac[ETH_ALEN]; ++ struct rt2x00_platform_data pdata; ++}; ++ ++static int rt2x00_num_fixups; ++static struct rt2x00_fixup rt2x00_fixups[2] = { ++ { ++ .slot = 255, ++ }, ++ { ++ .slot = 255, ++ }, ++}; ++ ++static void rt2x00_pci_fixup(struct pci_dev *dev) ++{ ++ unsigned i; ++ struct rt2x00_platform_data *pdata = NULL; ++ ++ for (i = 0; i < rt2x00_num_fixups; i++) { ++ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn)) ++ continue; ++ ++ pdata = &rt2x00_fixups[i].pdata; ++ break; ++ } ++ ++ dev->dev.platform_data = pdata; ++} ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup); ++ ++void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) ++{ ++ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups)) ++ return; ++ ++ rt2x00_fixups[rt2x00_num_fixups].slot = slot; ++ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL); ++ ++ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac)) ++ return; ++ ++ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac; ++ rt2x00_num_fixups++; ++} ++ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + + /* + * flash mapping +@@ -18,12 +19,16 @@ + #define BCM963XX_CFE_VERSION_OFFSET 0x570 + #define BCM963XX_NVRAM_OFFSET 0x580 + +-struct ath9k_caldata { ++struct bcm63xx_caldata { ++ unsigned int vendor; + unsigned int slot; + u32 caldata_offset; ++ /* Atheros */ + unsigned int endian_check:1; + int led_pin; + bool led_active_high; ++ /* Ralink */ ++ char* eeprom; + }; + + /* +@@ -47,7 +52,7 @@ struct board_info { + unsigned int has_caldata:2; + + /* wifi calibration data config */ +- struct ath9k_caldata caldata[2]; ++ struct bcm63xx_caldata caldata[2]; + + /* ethernet config */ + struct bcm63xx_enet_platform_data enet0; +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h +@@ -0,0 +1,9 @@ ++#ifndef _PCI_RT2X00_FIXUP ++#define _PCI_RT2X00_FIXUP ++ ++#define PCI_VENDOR_ID_RALINK 0x1814 ++ ++void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init; ++ ++#endif /* _PCI_RT2X00_FIXUP */ ++ diff --git a/target/linux/brcm63xx/patches-4.14/423-bcm63xx_enet_add_b53_support.patch b/target/linux/brcm63xx/patches-4.14/423-bcm63xx_enet_add_b53_support.patch new file mode 100644 index 000000000..ba2a8f93d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/423-bcm63xx_enet_add_b53_support.patch @@ -0,0 +1,169 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -332,6 +332,9 @@ struct bcm_enet_priv { + struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT]; + int sw_port_link[ENETSW_MAX_PORT]; + ++ /* platform device for associated switch */ ++ struct platform_device *b53_device; ++ + /* used to poll switch port state */ + struct timer_list swphy_poll; + spinlock_t enetsw_mdio_lock; +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + + #include + #include "bcm63xx_enet.h" +@@ -1936,7 +1937,8 @@ static int bcm_enet_remove(struct platfo + return 0; + } + +-struct platform_driver bcm63xx_enet_driver = { ++ ++static struct platform_driver bcm63xx_enet_driver = { + .probe = bcm_enet_probe, + .remove = bcm_enet_remove, + .driver = { +@@ -1945,6 +1947,42 @@ struct platform_driver bcm63xx_enet_driv + }, + }; + ++struct b53_platform_data bcm63xx_b53_pdata = { ++ .chip_id = 0x6300, ++ .big_endian = 1, ++}; ++ ++struct platform_device bcm63xx_b53_dev = { ++ .name = "b53-switch", ++ .id = -1, ++ .dev = { ++ .platform_data = &bcm63xx_b53_pdata, ++ }, ++}; ++ ++static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask) ++{ ++ int ret; ++ ++ bcm63xx_b53_pdata.regs = priv->base; ++ bcm63xx_b53_pdata.enabled_ports = port_mask; ++ bcm63xx_b53_pdata.alias = priv->net_dev->name; ++ ++ ret = platform_device_register(&bcm63xx_b53_dev); ++ if (!ret) ++ priv->b53_device = &bcm63xx_b53_dev; ++ ++ return ret; ++} ++ ++static void bcmenet_switch_unregister(struct bcm_enet_priv *priv) ++{ ++ if (priv->b53_device) ++ platform_device_unregister(&bcm63xx_b53_dev); ++ ++ priv->b53_device = NULL; ++} ++ + /* + * switch mii access callbacks + */ +@@ -2203,29 +2241,6 @@ static int bcm_enetsw_open(struct net_de + enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); + } + +- /* reset mib */ +- val = enetsw_readb(priv, ENETSW_GMCR_REG); +- val |= ENETSW_GMCR_RST_MIB_MASK; +- enetsw_writeb(priv, val, ENETSW_GMCR_REG); +- mdelay(1); +- val &= ~ENETSW_GMCR_RST_MIB_MASK; +- enetsw_writeb(priv, val, ENETSW_GMCR_REG); +- mdelay(1); +- +- /* force CPU port state */ +- val = enetsw_readb(priv, ENETSW_IMPOV_REG); +- val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK; +- enetsw_writeb(priv, val, ENETSW_IMPOV_REG); +- +- /* enable switch forward engine */ +- val = enetsw_readb(priv, ENETSW_SWMODE_REG); +- val |= ENETSW_SWMODE_FWD_EN_MASK; +- enetsw_writeb(priv, val, ENETSW_SWMODE_REG); +- +- /* enable jumbo on all ports */ +- enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG); +- enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG); +- + /* initialize flow control buffer allocation */ + enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, + ENETDMA_BUFALLOC_REG(priv->rx_chan)); +@@ -2684,6 +2699,9 @@ static int bcm_enetsw_probe(struct platf + struct bcm63xx_enetsw_platform_data *pd; + struct resource *res_mem; + int ret, irq_rx, irq_tx; ++ unsigned i, num_ports = 0; ++ u16 port_mask = BIT(8); ++ u8 val; + + if (!bcm_enet_shared_base[0]) + return -EPROBE_DEFER; +@@ -2766,6 +2784,43 @@ static int bcm_enetsw_probe(struct platf + priv->pdev = pdev; + priv->net_dev = dev; + ++ /* reset mib */ ++ val = enetsw_readb(priv, ENETSW_GMCR_REG); ++ val |= ENETSW_GMCR_RST_MIB_MASK; ++ enetsw_writeb(priv, val, ENETSW_GMCR_REG); ++ mdelay(1); ++ val &= ~ENETSW_GMCR_RST_MIB_MASK; ++ enetsw_writeb(priv, val, ENETSW_GMCR_REG); ++ mdelay(1); ++ ++ /* force CPU port state */ ++ val = enetsw_readb(priv, ENETSW_IMPOV_REG); ++ val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK; ++ enetsw_writeb(priv, val, ENETSW_IMPOV_REG); ++ ++ /* enable switch forward engine */ ++ val = enetsw_readb(priv, ENETSW_SWMODE_REG); ++ val |= ENETSW_SWMODE_FWD_EN_MASK; ++ enetsw_writeb(priv, val, ENETSW_SWMODE_REG); ++ ++ /* enable jumbo on all ports */ ++ enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG); ++ enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG); ++ ++ for (i = 0; i < priv->num_ports; i++) { ++ struct bcm63xx_enetsw_port *port = &priv->used_ports[i]; ++ ++ if (!port->used) ++ continue; ++ ++ num_ports++; ++ port_mask |= BIT(i); ++ } ++ ++ /* only register if there is more than one external port */ ++ if (num_ports > 1) ++ bcmenet_switch_register(priv, port_mask); ++ + return 0; + + out_disable_clk: +@@ -2787,6 +2842,9 @@ static int bcm_enetsw_remove(struct plat + priv = netdev_priv(dev); + unregister_netdev(dev); + ++ /* remove switch */ ++ bcmenet_switch_unregister(priv); ++ + clk_disable_unprepare(priv->mac_clk); + + free_netdev(dev); diff --git a/target/linux/brcm63xx/patches-4.14/424-bcm63xx_enet_no_request_mem_region.patch b/target/linux/brcm63xx/patches-4.14/424-bcm63xx_enet_no_request_mem_region.patch new file mode 100644 index 000000000..79f6b9a1d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/424-bcm63xx_enet_no_request_mem_region.patch @@ -0,0 +1,15 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -2743,9 +2743,9 @@ static int bcm_enetsw_probe(struct platf + if (ret) + goto out; + +- priv->base = devm_ioremap_resource(&pdev->dev, res_mem); +- if (IS_ERR(priv->base)) { +- ret = PTR_ERR(priv->base); ++ priv->base = devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem)); ++ if (priv->base == NULL) { ++ ret = -ENOMEM; + goto out; + } + diff --git a/target/linux/brcm63xx/patches-4.14/427-boards_probe_switch.patch b/target/linux/brcm63xx/patches-4.14/427-boards_probe_switch.patch new file mode 100644 index 000000000..ec03e4cee --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/427-boards_probe_switch.patch @@ -0,0 +1,119 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -77,6 +77,8 @@ static struct board_info __initdata boar + + .has_enet0 = 1, + .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -90,6 +92,8 @@ static struct board_info __initdata boar + + .has_enet0 = 1, + .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -138,6 +142,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -170,6 +176,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -194,6 +202,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -224,6 +234,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -247,6 +259,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -268,6 +282,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -287,6 +303,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -314,6 +332,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -339,6 +359,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -364,6 +386,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -387,6 +411,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, diff --git a/target/linux/brcm63xx/patches-4.14/499-allow_better_context_for_board_patches.patch b/target/linux/brcm63xx/patches-4.14/499-allow_better_context_for_board_patches.patch new file mode 100644 index 000000000..ad9c5b30e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/499-allow_better_context_for_board_patches.patch @@ -0,0 +1,56 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -46,7 +46,7 @@ static struct board_info __initdata boar + .ephy_reset_gpio = 36, + .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_3368 */ + + /* + * known 6328 boards +@@ -65,7 +65,7 @@ static struct board_info __initdata boar + .port_no = 0, + }, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* + * known 6338 boards +@@ -98,7 +98,7 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6338 */ + + /* + * known 6345 boards +@@ -108,7 +108,7 @@ static struct board_info __initdata boar + .name = "96345GW2", + .expected_cpu_id = 0x6345, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6345 */ + + /* + * known 6348 boards +@@ -311,7 +311,7 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* + * known 6358 boards +@@ -419,7 +419,7 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* + * all boards diff --git a/target/linux/brcm63xx/patches-4.14/500-board-D4PW.patch b/target/linux/brcm63xx/patches-4.14/500-board-D4PW.patch new file mode 100644 index 000000000..31757c464 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/500-board-D4PW.patch @@ -0,0 +1,40 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -311,6 +311,21 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; ++ ++static struct board_info __initdata board_96348_D4PW = { ++ .name = "D-4P-W", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -447,6 +462,7 @@ static const struct board_info __initcon + &board_DV201AMR, + &board_96348gw_a, + &board_rta1025w_16, ++ &board_96348_D4PW, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -478,6 +494,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.14/501-board-NB4.patch b/target/linux/brcm63xx/patches-4.14/501-board-NB4.patch new file mode 100644 index 000000000..fe228c6b0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/501-board-NB4.patch @@ -0,0 +1,81 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -434,6 +434,60 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; ++ ++static struct board_info __initdata board_nb4_ser_r0 = { ++ .name = "NB4-SER-r0", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++}; ++ ++static struct board_info __initdata board_nb4_fxc_r1 = { ++ .name = "NB4-FXC-r1", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -470,6 +524,8 @@ static const struct board_info __initcon + &board_96358vw2, + &board_AGPFS0, + &board_DWVS0, ++ &board_nb4_ser_r0, ++ &board_nb4_fxc_r1, + #endif + }; + +@@ -511,6 +567,8 @@ static struct of_device_id const bcm963x + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, + { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, ++ { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, }, ++ { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 + #endif diff --git a/target/linux/brcm63xx/patches-4.14/502-board-96338W2_E7T.patch b/target/linux/brcm63xx/patches-4.14/502-board-96338W2_E7T.patch new file mode 100644 index 000000000..64edf76e5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/502-board-96338W2_E7T.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -98,6 +98,20 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++static struct board_info __initdata board_96338w2_e7t = { ++ .name = "96338W2_E7T", ++ .expected_cpu_id = 0x6338, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6338 */ + + /* +@@ -503,6 +517,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, + &board_96338w, ++ &board_96338w2_e7t, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, +@@ -540,6 +555,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, + { .compatible = "brcm,bcm96338w", .data = &board_96338w, }, ++ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, diff --git a/target/linux/brcm63xx/patches-4.14/503-board-CPVA642.patch b/target/linux/brcm63xx/patches-4.14/503-board-CPVA642.patch new file mode 100644 index 000000000..2639aa6fd --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/503-board-CPVA642.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -401,6 +401,25 @@ static struct board_info __initdata boar + .num_usbh_ports = 2, + }; + ++static struct board_info __initdata board_CPVA642 = { ++ .name = "CPVA642", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++}; ++ ++ + static struct board_info __initdata board_AGPFS0 = { + .name = "AGPF-S0", + .expected_cpu_id = 0x6358, +@@ -538,6 +557,7 @@ static const struct board_info __initcon + &board_96358vw, + &board_96358vw2, + &board_AGPFS0, ++ &board_CPVA642, + &board_DWVS0, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, +@@ -585,6 +605,7 @@ static struct of_device_id const bcm963x + { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, + { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, }, + { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, ++ { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 + #endif diff --git a/target/linux/brcm63xx/patches-4.14/504-board_dsl_274xb_rev_c.patch b/target/linux/brcm63xx/patches-4.14/504-board_dsl_274xb_rev_c.patch new file mode 100644 index 000000000..c125b3e0a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/504-board_dsl_274xb_rev_c.patch @@ -0,0 +1,41 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -468,6 +468,22 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + }; + ++/* D-Link DSL-274xB revison C2/C3 */ ++static struct board_info __initdata board_dsl_274xb_rev_c = { ++ .name = "AW4139", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + static struct board_info __initdata board_nb4_ser_r0 = { + .name = "NB4-SER-r0", + .expected_cpu_id = 0x6358, +@@ -559,6 +575,7 @@ static const struct board_info __initcon + &board_AGPFS0, + &board_CPVA642, + &board_DWVS0, ++ &board_dsl_274xb_rev_c, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + #endif +@@ -598,6 +615,7 @@ static struct of_device_id const bcm963x + { .compatible = "alcatel,rg100a", .data = &board_96358vw2, }, + { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, }, + { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, ++ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.14/505-board_spw500v.patch b/target/linux/brcm63xx/patches-4.14/505-board_spw500v.patch new file mode 100644 index 000000000..c6bc4ec2d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/505-board_spw500v.patch @@ -0,0 +1,63 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -340,6 +340,44 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++static struct sprom_fixup __initdata spw500v_fixups[] = { ++ { .offset = 46, .value = 0x3046 }, ++ { .offset = 47, .value = 0x15a7 }, ++ { .offset = 48, .value = 0xfa89 }, ++ { .offset = 49, .value = 0xfe79 }, ++ { .offset = 57, .value = 0x6a49 }, ++}; ++ ++static struct board_info __initdata board_spw500v = { ++ .name = "SPW500V", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 6, ++ .gpio_int = 34, ++ .ext_irq = 2, ++ .cs = 2, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = spw500v_fixups, ++ .num_board_fixups = ARRAY_SIZE(spw500v_fixups), ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -567,6 +605,7 @@ static const struct board_info __initcon + &board_96348gw_a, + &board_rta1025w_16, + &board_96348_D4PW, ++ &board_spw500v, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -608,6 +647,7 @@ static struct of_device_id const bcm963x + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, ++ { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.14/506-board_gw6200_gw6000.patch b/target/linux/brcm63xx/patches-4.14/506-board_gw6200_gw6000.patch new file mode 100644 index 000000000..fb28302eb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/506-board_gw6200_gw6000.patch @@ -0,0 +1,85 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -233,6 +233,64 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_gw6200 = { ++ .name = "GW6200", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 8, /* FIXME: What is real GPIO here? */ ++ .gpio_int = 34, ++ .ext_irq = 2, ++ .cs = 2, ++ }, ++}; ++ ++static struct board_info __initdata board_gw6000 = { ++ .name = "GW6000", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 6, ++ .gpio_int = 34, ++ .ext_irq = 2, ++ .cs = 2, ++ }, ++}; ++ ++ ++ + static struct board_info __initdata board_FAST2404 = { + .name = "F@ST2404", + .expected_cpu_id = 0x6348, +@@ -598,6 +656,8 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6348 + &board_96348r, + &board_96348gw, ++ &board_gw6000, ++ &board_gw6200, + &board_96348gw_10, + &board_96348gw_11, + &board_FAST2404, +@@ -648,6 +708,8 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, ++ { .compatible = "tecom,gw6000", .data = &board_gw6000, }, ++ { .compatible = "tecom,gw6200", .data = &board_gw6200, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.14/507-board-MAGIC.patch b/target/linux/brcm63xx/patches-4.14/507-board-MAGIC.patch new file mode 100644 index 000000000..9ba7d8c23 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/507-board-MAGIC.patch @@ -0,0 +1,58 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -436,6 +436,39 @@ static struct board_info __initdata boar + .num_board_fixups = ARRAY_SIZE(spw500v_fixups), + }, + }; ++ ++static struct board_info __initdata board_96348sv = { ++ .name = "MAGIC", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ /* it has BP_ENET_EXTERNAL_PHY */ ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 25, ++ .gpio_int = 34, ++ .cs = 2, ++ .ext_irq = 2, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -666,6 +699,7 @@ static const struct board_info __initcon + &board_rta1025w_16, + &board_96348_D4PW, + &board_spw500v, ++ &board_96348sv, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -710,6 +744,7 @@ static struct of_device_id const bcm963x + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, + { .compatible = "tecom,gw6200", .data = &board_gw6200, }, ++ { .compatible = "telsey,magic", .data = &board_96348sv, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.14/508-board_hw553.patch b/target/linux/brcm63xx/patches-4.14/508-board_hw553.patch new file mode 100644 index 000000000..34800672c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/508-board_hw553.patch @@ -0,0 +1,51 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -666,6 +666,32 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + .num_usbh_ports = 2, + }; ++ ++static struct board_info __initdata board_HW553 = { ++ .name = "HW553", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -711,6 +737,7 @@ static const struct board_info __initcon + &board_dsl_274xb_rev_c, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, ++ &board_HW553, + #endif + }; + +@@ -754,6 +781,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, ++ { .compatible = "huawei,hg553", .data = &board_HW553, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.14/509-board_rta1320_16m.patch b/target/linux/brcm63xx/patches-4.14/509-board_rta1320_16m.patch new file mode 100644 index 000000000..f30dfbee1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/509-board_rta1320_16m.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -112,6 +112,20 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++static struct board_info __initdata board_rta1320_16m = { ++ .name = "RTA1320_16M", ++ .expected_cpu_id = 0x6338, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6338 */ + + /* +@@ -708,6 +722,7 @@ static const struct board_info __initcon + &board_96338gw, + &board_96338w, + &board_96338w2_e7t, ++ &board_rta1320_16m, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, +@@ -752,6 +767,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, + { .compatible = "brcm,bcm96338w", .data = &board_96338w, }, ++ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, }, + { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 diff --git a/target/linux/brcm63xx/patches-4.14/510-board_spw303v.patch b/target/linux/brcm63xx/patches-4.14/510-board_spw303v.patch new file mode 100644 index 000000000..30ef4e051 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/510-board_spw303v.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -706,6 +706,20 @@ static struct board_info __initdata boar + .pci_dev = 1, + }, + }; ++ ++ /* T-Home Speedport W 303V Typ B */ ++static struct board_info __initdata board_spw303v = { ++ .name = "96358-502V", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -753,6 +767,7 @@ static const struct board_info __initcon + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + &board_HW553, ++ &board_spw303v, + #endif + }; + +@@ -804,6 +819,7 @@ static struct of_device_id const bcm963x + { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, + { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, }, + { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, ++ { .compatible = "t-com,spw303v", .data = &board_spw303v, }, + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 diff --git a/target/linux/brcm63xx/patches-4.14/511-board_V2500V.patch b/target/linux/brcm63xx/patches-4.14/511-board_V2500V.patch new file mode 100644 index 000000000..46909b073 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/511-board_V2500V.patch @@ -0,0 +1,92 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -483,6 +483,26 @@ static struct board_info __initdata boar + .ext_irq = 2, + }, + }; ++ ++static struct board_info __initdata board_V2500V_BB = { ++ .name = "V2500V_BB", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -755,6 +775,7 @@ static const struct board_info __initcon + &board_96348_D4PW, + &board_spw500v, + &board_96348sv, ++ &board_V2500V_BB, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -794,6 +815,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, +@@ -853,6 +875,22 @@ void __init board_bcm963xx_init(void) + val &= MPI_CSBASE_BASE_MASK; + } + boot_addr = (u8 *)KSEG1ADDR(val); ++ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr); ++ ++ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */ ++ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/ ++ /* Loading firmware from the CFE Prompt always loads to Bank 0 */ ++ /* Do an early check of CFE and then select bank 0 */ ++ ++ if (boot_addr == (u8 *)0xbf800000) { ++ u8 *tmp_boot_addr = (u8*)0xbfc00000; ++ ++ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET); ++ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) { ++ pr_info("V2500V: nvram bank 0\n"); ++ boot_addr = tmp_boot_addr; ++ } ++ } + + /* dump cfe version */ + cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -21,6 +21,7 @@ + #include + #include + ++#include + #include + #include + #include +@@ -247,6 +248,13 @@ int __init bcm63xx_flash_register(void) + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); + val &= MPI_CSBASE_BASE_MASK; + ++ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */ ++ /* Loading from CFE always uses Bank 0 */ ++ if (!strcmp(board_get_name(), "V2500V_BB")) { ++ pr_info("V2500V: Start in Bank 0\n"); ++ val = val + 0x400000; // Select Bank 0 start address ++ } ++ + mtd_resources[0].start = val; + mtd_resources[0].end = 0x1FFFFFFF; + } diff --git a/target/linux/brcm63xx/patches-4.14/512-board_BTV2110.patch b/target/linux/brcm63xx/patches-4.14/512-board_BTV2110.patch new file mode 100644 index 000000000..f58e294eb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/512-board_BTV2110.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -216,6 +216,24 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++ ++/* BT Voyager 2110 */ ++static struct board_info __initdata board_V2110 = { ++ .name = "V2110", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ ++ + static struct board_info __initdata board_96348gw = { + .name = "96348GW", + .expected_cpu_id = 0x6348, +@@ -776,6 +794,7 @@ static const struct board_info __initcon + &board_spw500v, + &board_96348sv, + &board_V2500V_BB, ++ &board_V2110, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -815,6 +834,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "bt,v2110", .data = &board_V2110, }, + { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, diff --git a/target/linux/brcm63xx/patches-4.14/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch b/target/linux/brcm63xx/patches-4.14/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch new file mode 100644 index 000000000..71e30a15e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch @@ -0,0 +1,223 @@ +From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 04:55:52 +0100 +Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support + +--- + arch/mips/bcm63xx/boards/Kconfig | 6 + + arch/mips/bcm63xx/boards/Makefile | 1 + + arch/mips/bcm63xx/boards/board_common.c | 2 +- + arch/mips/bcm63xx/boards/board_common.h | 6 + + arch/mips/bcm63xx/boards/board_livebox.c | 215 ++++++++++++++++++++++++++++++ + 5 files changed, 229 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -13,4 +13,10 @@ config BOARD_BCM963XX + default y + help + ++config BOARD_LIVEBOX ++ bool "Inventel Livebox(es) boards" ++ select SSB ++ help ++ Inventel Livebox boards using the RedBoot bootloader. ++ + endmenu +--- a/arch/mips/bcm63xx/boards/Makefile ++++ b/arch/mips/bcm63xx/boards/Makefile +@@ -1,2 +1,3 @@ + obj-y += board_common.o + obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o ++obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -55,7 +55,7 @@ void __init board_prom_init(void) + if (fw_arg3 == CFE_EPTSEAL) + board_bcm963xx_init(); + else +- panic("unsupported bootloader detected"); ++ board_livebox_init(); + } + + static int (*board_get_mac_address)(u8 mac[ETH_ALEN]); +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -24,4 +24,10 @@ static inline void board_of_device_prese + } + #endif + ++#if defined(CONFIG_BOARD_LIVEBOX) ++void board_livebox_init(void); ++#else ++static inline void board_livebox_init(void) { } ++#endif ++ + #endif /* __BOARD_COMMON_H */ +--- /dev/null ++++ b/arch/mips/bcm63xx/boards/board_livebox.c +@@ -0,0 +1,163 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "board_common.h" ++ ++#define PFX "board_livebox: " ++ ++static unsigned int mac_addr_used = 0; ++ ++/* ++ * known 6348 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_6348 ++static struct board_info __initdata board_livebox_blue5g = { ++ .name = "Livebox-blue-5g", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 31, ++ }, ++ ++ .ephy_reset_gpio = 6, ++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ ++ .has_dsp = 0, /*TODO some Liveboxes have dsp*/ ++ .dsp = { ++ .gpio_rst = 6, ++ .gpio_int = 35, ++ .cs = 2, ++ .ext_irq = 2, ++ }, ++}; ++#endif ++ ++/* ++ * all boards ++ */ ++static const struct board_info __initdata *bcm963xx_boards[] = { ++#ifdef CONFIG_BCM63XX_CPU_6348 ++ &board_livebox_blue5g ++#endif ++}; ++ ++static struct of_device_id const livebox_boards_dt[] = { ++ { .compatible = "inventel,livebox-blue-5g", .data = &board_livebox_blue5g, }, ++ { } ++}; ++ ++/* ++ * register & return a new board mac address ++ */ ++static int livebox_get_mac_address(u8 *mac) ++{ ++ u8 *p; ++ int count; ++ ++ memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN); ++ ++ p = mac + ETH_ALEN - 1; ++ count = mac_addr_used; ++ ++ while (count--) { ++ do { ++ (*p)++; ++ if (*p != 0) ++ break; ++ p--; ++ } while (p != mac); ++ } ++ ++ if (p == mac) { ++ printk(KERN_ERR PFX "unable to fetch mac address\n"); ++ return -ENODEV; ++ } ++ mac_addr_used++; ++ ++ return 0; ++} ++ ++/* ++ * early init callback ++ */ ++#define LIVEBOX_GPIO_DETECT_MASK 0x000000ff ++#define LIVEBOX_BOOT_ADDR 0x1e400000 ++ ++#define LIVEBOX_HW_BLUE5G_9 0x90 ++ ++void __init board_livebox_init(void) ++{ ++ u32 val; ++ u8 hw_version; ++ const struct board_info *board; ++ const struct of_device_id *board_match; ++ ++ /* find board by compat */ ++ board_match = bcm63xx_match_board(livebox_boards_dt); ++ if (board_match) { ++ board = board_match->data; ++ } else { ++ /* Get hardware version */ ++ val = bcm_gpio_readl(GPIO_CTL_LO_REG); ++ val &= ~LIVEBOX_GPIO_DETECT_MASK; ++ bcm_gpio_writel(val, GPIO_CTL_LO_REG); ++ ++ hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG); ++ hw_version &= LIVEBOX_GPIO_DETECT_MASK; ++ ++ switch (hw_version) { ++ case LIVEBOX_HW_BLUE5G_9: ++ printk(KERN_INFO PFX "Livebox BLUE5G.9\n"); ++ board = bcm963xx_boards[0]; ++ break; ++ default: ++ printk(KERN_INFO PFX "Unknown livebox version: %02x\n", ++ hw_version); ++ /* use default livebox configuration */ ++ board = bcm963xx_boards[0]; ++ break; ++ } ++ } ++ ++ /* use default livebox configuration */ ++ board_early_setup(board, livebox_get_mac_address); ++ ++ /* read base address of boot chip select (0) */ ++ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ val &= MPI_CSBASE_BASE_MASK; ++ if (val != LIVEBOX_BOOT_ADDR) { ++ printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n", ++ val, LIVEBOX_BOOT_ADDR); ++ bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff); ++ } ++} diff --git a/target/linux/brcm63xx/patches-4.14/514-board_ct536_ct5621.patch b/target/linux/brcm63xx/patches-4.14/514-board_ct536_ct5621.patch new file mode 100644 index 000000000..d111d97d6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/514-board_ct536_ct5621.patch @@ -0,0 +1,53 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -234,6 +234,33 @@ static struct board_info __initdata boar + }; + + ++static struct board_info __initdata board_ct536_ct5621 = { ++ .name = "CT536_CT5621", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 0, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_96348gw = { + .name = "96348GW", + .expected_cpu_id = 0x6348, +@@ -795,6 +822,7 @@ static const struct board_info __initcon + &board_96348sv, + &board_V2500V_BB, + &board_V2110, ++ &board_ct536_ct5621, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -836,6 +864,8 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, + { .compatible = "bt,v2110", .data = &board_V2110, }, + { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, ++ { .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, }, ++ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, diff --git a/target/linux/brcm63xx/patches-4.14/515-board_DWV-S0_fixes.patch b/target/linux/brcm63xx/patches-4.14/515-board_DWV-S0_fixes.patch new file mode 100644 index 000000000..8e053b293 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/515-board_DWV-S0_fixes.patch @@ -0,0 +1,10 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -674,6 +674,7 @@ static struct board_info __initdata boar + }, + + .has_ohci0 = 1, ++ .has_ehci0 = 1, + }; + + /* D-Link DSL-274xB revison C2/C3 */ diff --git a/target/linux/brcm63xx/patches-4.14/516-board_96348A-122.patch b/target/linux/brcm63xx/patches-4.14/516-board_96348A-122.patch new file mode 100644 index 000000000..29dc2620d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/516-board_96348A-122.patch @@ -0,0 +1,49 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -261,6 +261,30 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_96348A_122 = { ++ .name = "96348A-122", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_96348gw = { + .name = "96348GW", + .expected_cpu_id = 0x6348, +@@ -824,6 +848,7 @@ static const struct board_info __initcon + &board_V2500V_BB, + &board_V2110, + &board_ct536_ct5621, ++ &board_96348A_122, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -866,6 +891,7 @@ static struct of_device_id const bcm963x + { .compatible = "bt,v2110", .data = &board_V2110, }, + { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, + { .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, }, ++ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, }, + { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, diff --git a/target/linux/brcm63xx/patches-4.14/519_board_CPVA502plus.patch b/target/linux/brcm63xx/patches-4.14/519_board_CPVA502plus.patch new file mode 100644 index 000000000..5af1060df --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/519_board_CPVA502plus.patch @@ -0,0 +1,52 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -233,6 +233,33 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_CPVA502plus = { ++ .name = "CPVA502+", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ }, ++ ++ .ephy_reset_gpio = 4, ++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; + + static struct board_info __initdata board_ct536_ct5621 = { + .name = "CT536_CT5621", +@@ -849,6 +876,7 @@ static const struct board_info __initcon + &board_V2110, + &board_ct536_ct5621, + &board_96348A_122, ++ &board_CPVA502plus, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -901,6 +929,7 @@ static struct of_device_id const bcm963x + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, + { .compatible = "tecom,gw6200", .data = &board_gw6200, }, ++ { .compatible = "telsey,cpva502+", .data = &board_CPVA502plus, }, + { .compatible = "telsey,magic", .data = &board_96348sv, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, diff --git a/target/linux/brcm63xx/patches-4.14/520-bcm63xx-add-support-for-96368MVWG-board.patch b/target/linux/brcm63xx/patches-4.14/520-bcm63xx-add-support-for-96368MVWG-board.patch new file mode 100644 index 000000000..31002842f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/520-bcm63xx-add-support-for-96368MVWG-board.patch @@ -0,0 +1,118 @@ +From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001 +From: Maxime Bizon +Date: Wed, 20 Jan 2010 16:21:30 +0100 +Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board. + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++ + .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 + + 2 files changed, 97 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -840,6 +840,58 @@ static struct board_info __initdata boar + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* ++ * known 6368 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_6368 ++static struct board_info __initdata board_96368mvwg = { ++ .name = "96368MVWG", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port1", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port2", ++ }, ++ ++ [4] = { ++ .used = 1, ++ .phy_id = 0x12, ++ .name = "port0", ++ }, ++ ++ [5] = { ++ .used = 1, ++ .phy_id = 0x11, ++ .name = "port3", ++ }, ++ }, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++}; ++#endif /* CONFIG_BCM63XX_CPU_6368 */ ++ ++/* + * all boards + */ + static const struct board_info __initconst *bcm963xx_boards[] = { +@@ -891,6 +943,10 @@ static const struct board_info __initcon + &board_HW553, + &board_spw303v, + #endif ++ ++#ifdef CONFIG_BCM63XX_CPU_6368 ++ &board_96368mvwg, ++#endif + }; + + static struct of_device_id const bcm963xx_boards_dt[] = { +@@ -951,6 +1007,7 @@ static struct of_device_id const bcm963x + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + #endif +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -82,12 +82,25 @@ void __init board_early_setup(const stru + bcm63xx_pci_enabled = 1; + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G2_PCI; ++ ++ if (BCMCPU_IS_6368()) ++ val |= GPIO_MODE_6368_PCI_REQ1 | ++ GPIO_MODE_6368_PCI_GNT1 | ++ GPIO_MODE_6368_PCI_INTB | ++ GPIO_MODE_6368_PCI_REQ0 | ++ GPIO_MODE_6368_PCI_GNT0; + } + #endif + + if (board.has_pccard) { + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G1_MII_PCCARD; ++ ++ if (BCMCPU_IS_6368()) ++ val |= GPIO_MODE_6368_PCMCIA_CD1 | ++ GPIO_MODE_6368_PCMCIA_CD2 | ++ GPIO_MODE_6368_PCMCIA_VS1 | ++ GPIO_MODE_6368_PCMCIA_VS2; + } + + if (board.has_enet0 && !board.enet0.use_internal_phy) { diff --git a/target/linux/brcm63xx/patches-4.14/521-bcm63xx-add-support-for-96368MVNgr-board.patch b/target/linux/brcm63xx/patches-4.14/521-bcm63xx-add-support-for-96368MVNgr-board.patch new file mode 100644 index 000000000..f719c2428 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/521-bcm63xx-add-support-for-96368MVNgr-board.patch @@ -0,0 +1,73 @@ +From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001 +From: Maxime Bizon +Date: Fri, 4 Nov 2011 12:33:48 +0100 +Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board. + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++ + 1 files changed, 67 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -889,6 +889,45 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_ehci0 = 1, + }; ++ ++static struct board_info __initdata board_96368mvngr = { ++ .name = "96368MVNgr", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++}; + #endif /* CONFIG_BCM63XX_CPU_6368 */ + + /* +@@ -946,6 +985,7 @@ static const struct board_info __initcon + + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, ++ &board_96368mvngr, + #endif + }; + +@@ -1007,6 +1047,7 @@ static struct of_device_id const bcm963x + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.14/522-MIPS-BCM63XX-add-96328avng-reference-board.patch b/target/linux/brcm63xx/patches-4.14/522-MIPS-BCM63XX-add-96328avng-reference-board.patch new file mode 100644 index 000000000..e482b2093 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/522-MIPS-BCM63XX-add-96328avng-reference-board.patch @@ -0,0 +1,45 @@ +From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 May 2012 10:52:25 +0200 +Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++ + 1 files changed, 77 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -64,6 +64,33 @@ static struct board_info __initdata boar + .use_fullspeed = 0, + .port_no = 0, + }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, + }; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + diff --git a/target/linux/brcm63xx/patches-4.14/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch b/target/linux/brcm63xx/patches-4.14/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch new file mode 100644 index 000000000..c0f235bee --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch @@ -0,0 +1,68 @@ +From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 May 2012 11:01:12 +0200 +Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++ + 1 files changed, 71 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -92,6 +92,40 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_963281TAN = { ++ .name = "963281TAN", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -966,6 +1000,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_963281TAN, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -1022,6 +1057,7 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 diff --git a/target/linux/brcm63xx/patches-4.14/524-board_dsl_274xb_rev_f.patch b/target/linux/brcm63xx/patches-4.14/524-board_dsl_274xb_rev_f.patch new file mode 100644 index 000000000..e3be8926d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/524-board_dsl_274xb_rev_f.patch @@ -0,0 +1,80 @@ +From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 30 Apr 2012 09:10:51 +0200 +Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link + DSL-274xB rev F1 + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++ + 1 files changed, 104 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -126,6 +126,51 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_dsl_274xb_f1 = { ++ .name = "AW4339U", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_ATHEROS, ++ .caldata_offset = 0x7d1000, ++ .slot = 0, ++ .led_pin = -1, ++ .led_active_high = 1, ++ }, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 4", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 1", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -1001,6 +1046,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, + &board_963281TAN, ++ &board_dsl_274xb_f1, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -1059,6 +1105,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++ { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, diff --git a/target/linux/brcm63xx/patches-4.14/525-board_96348w3.patch b/target/linux/brcm63xx/patches-4.14/525-board_96348w3.patch new file mode 100644 index 000000000..8fd0e85b6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/525-board_96348w3.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -600,6 +600,24 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + }; + ++/* NetGear DG834G v4 */ ++static struct board_info __initdata board_96348W3 = { ++ .name = "96348W3", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++}; ++ + static struct board_info __initdata board_96348_D4PW = { + .name = "D-4P-W", + .expected_cpu_id = 0x6348, +@@ -1076,6 +1094,7 @@ static const struct board_info __initcon + &board_ct536_ct5621, + &board_96348A_122, + &board_CPVA502plus, ++ &board_96348W3, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -1131,6 +1150,7 @@ static struct of_device_id const bcm963x + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, ++ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, diff --git a/target/linux/brcm63xx/patches-4.14/526-board_CT6373-1.patch b/target/linux/brcm63xx/patches-4.14/526-board_CT6373-1.patch new file mode 100644 index 000000000..f9257d29d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/526-board_CT6373-1.patch @@ -0,0 +1,49 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -922,6 +922,30 @@ static struct board_info __initdata boar + .num_usbh_ports = 2, + }; + ++static struct board_info __initdata board_ct6373_1 = { ++ .name = "CT6373-1", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_HW553 = { + .name = "HW553", + .expected_cpu_id = 0x6358, +@@ -1106,6 +1130,7 @@ static const struct board_info __initcon + &board_dsl_274xb_rev_c, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, ++ &board_ct6373_1, + &board_HW553, + &board_spw303v, + #endif +@@ -1164,6 +1189,7 @@ static struct of_device_id const bcm963x + { .compatible = "alcatel,rg100a", .data = &board_96358vw2, }, + { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, }, + { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, ++ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, }, + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, diff --git a/target/linux/brcm63xx/patches-4.14/527-board_dva-g3810bn-tl-1.patch b/target/linux/brcm63xx/patches-4.14/527-board_dva-g3810bn-tl-1.patch new file mode 100644 index 000000000..6936fa4d5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/527-board_dva-g3810bn-tl-1.patch @@ -0,0 +1,54 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -985,6 +985,35 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + }; ++ ++/* D-Link DVA-G3810BN/TL */ ++static struct board_info __initdata board_DVAG3810BN = { ++ .name = "DVAG3810BN", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 0, ++ .use_internal_phy = 1, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -1133,6 +1162,7 @@ static const struct board_info __initcon + &board_ct6373_1, + &board_HW553, + &board_spw303v, ++ &board_DVAG3810BN, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6368 +@@ -1192,6 +1222,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, }, + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, ++ { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.14/528-board_nb6.patch b/target/linux/brcm63xx/patches-4.14/528-board_nb6.patch new file mode 100644 index 000000000..55cc9ab86 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/528-board_nb6.patch @@ -0,0 +1,56 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1016,6 +1016,32 @@ static struct board_info __initdata boar + }; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + ++#ifdef CONFIG_BCM63XX_CPU_6362 ++static struct board_info __initdata board_nb6 = { ++ .name = "NB6", ++ .expected_cpu_id = 0x6362, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [4] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++}; ++#endif /* CONFIG_BCM63XX_CPU_6362 */ ++ + /* + * known 6368 boards + */ +@@ -1165,6 +1191,10 @@ static const struct board_info __initcon + &board_DVAG3810BN, + #endif + ++#ifdef CONFIG_BCM63XX_CPU_6362 ++ &board_nb6, ++#endif ++ + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, +@@ -1233,6 +1263,9 @@ static struct of_device_id const bcm963x + { .compatible = "t-com,spw303v", .data = &board_spw303v, }, + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif ++#ifdef CONFIG_BCM63XX_CPU_6362 ++ { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, ++#endif + #ifdef CONFIG_BCM63XX_CPU_6368 + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, diff --git a/target/linux/brcm63xx/patches-4.14/529-board_fast2604.patch b/target/linux/brcm63xx/patches-4.14/529-board_fast2604.patch new file mode 100644 index 000000000..2bca04aa8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/529-board_fast2604.patch @@ -0,0 +1,41 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -533,6 +533,22 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct board_info __initdata board_FAST2604 = { ++ .name = "F@ST2604", ++ .expected_cpu_id = 0x6348, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + static struct board_info __initdata board_rta1025w_16 = { + .name = "RTA1025W_16", + .expected_cpu_id = 0x6348, +@@ -1162,6 +1178,7 @@ static const struct board_info __initcon + &board_96348gw_10, + &board_96348gw_11, + &board_FAST2404, ++ &board_FAST2604, + &board_DV201AMR, + &board_96348gw_a, + &board_rta1025w_16, +@@ -1237,6 +1254,7 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, + { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, ++ { .compatible = "sagem,f@st2604", .data = &board_FAST2604, }, + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, + { .compatible = "tecom,gw6200", .data = &board_gw6200, }, diff --git a/target/linux/brcm63xx/patches-4.14/530-board_A4001N1.patch b/target/linux/brcm63xx/patches-4.14/530-board_A4001N1.patch new file mode 100644 index 000000000..ec0695cc0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/530-board_A4001N1.patch @@ -0,0 +1,68 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -127,6 +127,49 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_A4001N1 = { ++ .name = "963281T_TEF", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ + static struct board_info __initdata board_dsl_274xb_f1 = { + .name = "AW4339U", + .expected_cpu_id = 0x6328, +@@ -1159,6 +1202,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, + &board_963281TAN, ++ &board_A4001N1, + &board_dsl_274xb_f1, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 +@@ -1224,6 +1268,7 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, diff --git a/target/linux/brcm63xx/patches-4.14/531-board_AR-5387un.patch b/target/linux/brcm63xx/patches-4.14/531-board_AR-5387un.patch new file mode 100644 index 000000000..d38cb3bb1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/531-board_AR-5387un.patch @@ -0,0 +1,97 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -93,6 +93,78 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ar5387un_fixups[] = { ++ { .offset = 2, .value = 0x05bb }, ++ { .offset = 65, .value = 0x1204 }, ++ { .offset = 78, .value = 0x0303 }, ++ { .offset = 79, .value = 0x0202 }, ++ { .offset = 80, .value = 0xff02 }, ++ { .offset = 87, .value = 0x0315 }, ++ { .offset = 88, .value = 0x0315 }, ++ { .offset = 96, .value = 0x2048 }, ++ { .offset = 97, .value = 0xff11 }, ++ { .offset = 98, .value = 0x1567 }, ++ { .offset = 99, .value = 0xfb24 }, ++ { .offset = 100, .value = 0x3e3c }, ++ { .offset = 101, .value = 0x4038 }, ++ { .offset = 102, .value = 0xfe7f }, ++ { .offset = 103, .value = 0x1279 }, ++ { .offset = 112, .value = 0x2048 }, ++ { .offset = 113, .value = 0xff03 }, ++ { .offset = 114, .value = 0x154c }, ++ { .offset = 115, .value = 0xfb27 }, ++ { .offset = 116, .value = 0x3e3c }, ++ { .offset = 117, .value = 0x4038 }, ++ { .offset = 118, .value = 0xfe87 }, ++ { .offset = 119, .value = 0x1233 }, ++ { .offset = 203, .value = 0x2226 }, ++}; ++ ++static struct board_info __initdata board_AR5387un = { ++ .name = "96328A-1441N1", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5387un_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups), ++ }, ++}; ++ + static struct board_info __initdata board_963281TAN = { + .name = "963281TAN", + .expected_cpu_id = 0x6328, +@@ -1201,6 +1273,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_AR5387un, + &board_963281TAN, + &board_A4001N1, + &board_dsl_274xb_f1, +@@ -1271,6 +1344,7 @@ static struct of_device_id const bcm963x + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 diff --git a/target/linux/brcm63xx/patches-4.14/532-board_AR-5381u.patch b/target/linux/brcm63xx/patches-4.14/532-board_AR-5381u.patch new file mode 100644 index 000000000..07015caaa --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/532-board_AR-5381u.patch @@ -0,0 +1,79 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -93,6 +93,60 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ar5381u_fixups[] = { ++ { .offset = 97, .value = 0xfee5 }, ++ { .offset = 98, .value = 0x157c }, ++ { .offset = 99, .value = 0xfae7 }, ++ { .offset = 113, .value = 0xfefa }, ++ { .offset = 114, .value = 0x15d6 }, ++ { .offset = 115, .value = 0xfaf8 }, ++}; ++ ++static struct board_info __initdata board_AR5381u = { ++ .name = "96328A-1241N", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5381u_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata ar5387un_fixups[] = { + { .offset = 2, .value = 0x05bb }, + { .offset = 65, .value = 0x1204 }, +@@ -1273,6 +1327,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_AR5381u, + &board_AR5387un, + &board_963281TAN, + &board_A4001N1, +@@ -1344,6 +1399,7 @@ static struct of_device_id const bcm963x + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, }, + { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.14/533-board_rta770bw.patch b/target/linux/brcm63xx/patches-4.14/533-board_rta770bw.patch new file mode 100644 index 000000000..3ac6161bc --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/533-board_rta770bw.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -411,6 +411,20 @@ static struct board_info __initdata boar + .name = "96345GW2", + .expected_cpu_id = 0x6345, + }; ++ ++static struct board_info __initdata board_rta770bw = { ++ .name = "RTA770BW", ++ .expected_cpu_id = 0x6345, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6345 */ + + /* +@@ -1341,6 +1355,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, ++ &board_rta770bw, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + &board_96348r, +@@ -1411,6 +1426,7 @@ static struct of_device_id const bcm963x + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, ++ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.14/534-board_hw556.patch b/target/linux/brcm63xx/patches-4.14/534-board_hw556.patch new file mode 100644 index 000000000..604ffe7a3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/534-board_hw556.patch @@ -0,0 +1,123 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -1171,6 +1172,92 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HW556_C = { ++ .name = "HW556_C", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_RALINK, ++ .caldata_offset = 0xeffe00, ++ .slot = 1, ++ .eeprom = "rt2x00.eeprom", ++ }, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++static struct board_info __initdata board_HW556_A = { ++ .name = "HW556_A", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_ATHEROS, ++ .caldata_offset = 0xf7e000, ++ .slot = 1, ++ .endian_check = 1, ++ .led_pin = 2, ++ .led_active_high = 1, ++ }, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++static struct board_info __initdata board_HW556_B = { ++ .name = "HW556_B", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_ATHEROS, ++ .caldata_offset = 0xefe000, ++ .slot = 1, ++ .endian_check = 1, ++ .led_pin = 2, ++ .led_active_high = 1, ++ }, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + /* T-Home Speedport W 303V Typ B */ + static struct board_info __initdata board_spw303v = { + .name = "96358-502V", +@@ -1391,6 +1478,9 @@ static const struct board_info __initcon + &board_nb4_fxc_r1, + &board_ct6373_1, + &board_HW553, ++ &board_HW556_A, ++ &board_HW556_B, ++ &board_HW556_C, + &board_spw303v, + &board_DVAG3810BN, + #endif +@@ -1463,6 +1553,9 @@ static struct of_device_id const bcm963x + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, ++ { .compatible = "huawei,hg556a-a", .data = &board_HW556_A, }, ++ { .compatible = "huawei,hg556a-b", .data = &board_HW556_B, }, ++ { .compatible = "huawei,hg556a-c", .data = &board_HW556_C, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.14/535-board_rta770w.patch b/target/linux/brcm63xx/patches-4.14/535-board_rta770w.patch new file mode 100644 index 000000000..7149ed748 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/535-board_rta770w.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -426,6 +426,25 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++// Actually this board is the very same as the rta770bw, ++// where the additional 'b' within the name just ++// just indicates 'Annex B'. The ADSL Modem itself is able ++// to handle both Annex A as well as Annex B - ++// the loaded firmware makes the only difference ++static struct board_info __initdata board_rta770w = { ++ .name = "RTA770W", ++ .expected_cpu_id = 0x6345, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6345 */ + + /* +@@ -1443,6 +1462,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, + &board_rta770bw, ++ &board_rta770w, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + &board_96348r, +@@ -1517,6 +1537,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6345 + { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, + { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, }, ++ { .compatible = "dynalink,rta770w", .data = &board_rta770w, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.14/536-board_fast2704.patch b/target/linux/brcm63xx/patches-4.14/536-board_fast2704.patch new file mode 100644 index 000000000..888854a9c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/536-board_fast2704.patch @@ -0,0 +1,74 @@ +From: Marcin Jurkowski +Date: Thu, 31 Oct 2013 22:33:10 +0000 +Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL + router + +This adds kernel support support for Sagemcom F@st 2704 wireless ADSL +router. +It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+ +modem equipped with 64 MiB RAM and 8 MiB flash. + +Signed-off-by: Marcin Jurkowski +--- +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -341,6 +341,43 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_FAST2704V2 = { ++ .name = "F@ST2704V2", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .has_usbd = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -1452,6 +1489,7 @@ static const struct board_info __initcon + &board_963281TAN, + &board_A4001N1, + &board_dsl_274xb_f1, ++ &board_FAST2704V2, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -1527,6 +1565,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, }, + { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, ++ { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, diff --git a/target/linux/brcm63xx/patches-4.14/537-board_fast2504n.patch b/target/linux/brcm63xx/patches-4.14/537-board_fast2504n.patch new file mode 100644 index 000000000..3472d90e9 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/537-board_fast2504n.patch @@ -0,0 +1,66 @@ +From: Max Staudt +Date: Wed, 15 Jan 2014 18:51:13 +0000 +Subject: [PATCH] brcm63xx: F@ST2504n board support (Linux-3.10.26) + +Signed-off-by: Max Staudt +--- +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1382,6 +1382,41 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_fast2504n = { ++ .name = "F@ST2504n", ++ .expected_cpu_id = 0x6362, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6362 */ + + /* +@@ -1545,6 +1580,7 @@ static const struct board_info __initcon + + #ifdef CONFIG_BCM63XX_CPU_6362 + &board_nb6, ++ &board_fast2504n, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6368 +@@ -1626,6 +1662,7 @@ static struct of_device_id const bcm963x + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6362 ++ { .compatible = "sagem,f@st2504n", .data = &board_fast2504n, }, + { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 diff --git a/target/linux/brcm63xx/patches-4.14/555-board_96318ref.patch b/target/linux/brcm63xx/patches-4.14/555-board_96318ref.patch new file mode 100644 index 000000000..c7eadf1b8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/555-board_96318ref.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -50,6 +50,55 @@ static struct board_info __initdata boar + #endif /* CONFIG_BCM63XX_CPU_3368 */ + + /* ++ * known 6318 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_6318 ++static struct board_info __initdata board_96318ref = { ++ .name = "96318REF", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; ++#endif /* CONFIG_BCM63XX_CPU_6318 */ ++ ++/* + * known 6328 boards + */ + #ifdef CONFIG_BCM63XX_CPU_6328 +@@ -1517,6 +1566,9 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_3368 + &board_cvg834g, + #endif ++#ifdef CONFIG_BCM63XX_CPU_6318 ++ &board_96318ref, ++#endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, + &board_AR5381u, +@@ -1594,6 +1646,9 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_3368 + { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, + #endif ++#ifdef CONFIG_BCM63XX_CPU_6318 ++ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, ++#endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, diff --git a/target/linux/brcm63xx/patches-4.14/556-board_96318ref_p300.patch b/target/linux/brcm63xx/patches-4.14/556-board_96318ref_p300.patch new file mode 100644 index 000000000..162ecb7c3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/556-board_96318ref_p300.patch @@ -0,0 +1,69 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -96,6 +96,50 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_96318ref_p300 = { ++ .name = "96318REF_P300", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6318 */ + + /* +@@ -1568,6 +1612,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6318 + &board_96318ref, ++ &board_96318ref_p300, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, +@@ -1648,6 +1693,7 @@ static struct of_device_id const bcm963x + #endif + #ifdef CONFIG_BCM63XX_CPU_6318 + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, ++ { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, diff --git a/target/linux/brcm63xx/patches-4.14/557-board_bcm963269bhr.patch b/target/linux/brcm63xx/patches-4.14/557-board_bcm963269bhr.patch new file mode 100644 index 000000000..be0e7e783 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/557-board_bcm963269bhr.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1604,6 +1604,50 @@ static struct board_info __initdata boar + #endif /* CONFIG_BCM63XX_CPU_6368 */ + + /* ++ * known 63268/63269 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_63268 ++static struct board_info __initdata board_963269bhr = { ++ .name = "963269BHR", ++ .expected_cpu_id = 0x63268, ++ ++ .has_pci = 1, ++ ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++}; ++#endif /* CONFIG_BCM63XX_CPU_63268 */ ++ ++/* + * all boards + */ + static const struct board_info __initconst *bcm963xx_boards[] = { +@@ -1684,6 +1728,9 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + #endif ++#ifdef CONFIG_BCM63XX_CPU_63268 ++ &board_963269bhr, ++#endif + }; + + static struct of_device_id const bcm963xx_boards_dt[] = { +@@ -1771,6 +1818,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 ++ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, }, + #endif + #endif /* CONFIG_OF */ + { }, diff --git a/target/linux/brcm63xx/patches-4.14/558-board_AR1004G.patch b/target/linux/brcm63xx/patches-4.14/558-board_AR1004G.patch new file mode 100644 index 000000000..dc3c13ef4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/558-board_AR1004G.patch @@ -0,0 +1,48 @@ +From: "mexit@o2.pl" +Date: Sun, 24 Nov 2013 21:33:38 +0000 +Subject: [PATCH 4/5] brcm63xx: add support for Asmax AR 1004g router + +Support for Asmax AR 1004g router + +Signed-off-by: Adrian Feliks +--- +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -655,6 +655,21 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct board_info __initdata board_96348gw_10_AR1004G = { ++ .name = "AR1004G", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + + /* BT Voyager 2110 */ + static struct board_info __initdata board_V2110 = { +@@ -1699,6 +1714,7 @@ static const struct board_info __initcon + &board_96348A_122, + &board_CPVA502plus, + &board_96348W3, ++ &board_96348gw_10_AR1004G, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -1763,6 +1779,7 @@ static struct of_device_id const bcm963x + { .compatible = "dynalink,rta770w", .data = &board_rta770w, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 ++ { .compatible = "asmax,ar1004g", .data = &board_96348gw_10_AR1004G, }, + { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348r", .data = &board_96348r, }, + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.14/559-board_vw6339gu.patch b/target/linux/brcm63xx/patches-4.14/559-board_vw6339gu.patch new file mode 100644 index 000000000..dff30121b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/559-board_vw6339gu.patch @@ -0,0 +1,70 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1660,6 +1660,51 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_vw6339gu = { ++ .name = "VW6339GU", ++ .expected_cpu_id = 0x63268, ++ ++ .has_ehci0 = 1, ++ .has_ohci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "LAN2", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN4", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ ++ [4] = { ++ .used = 1, ++ .phy_id = 7, ++ .name = "WAN", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_63268 */ + + /* +@@ -1746,6 +1791,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + &board_963269bhr, ++ &board_vw6339gu, + #endif + }; + +@@ -1836,6 +1882,7 @@ static struct of_device_id const bcm963x + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, }, ++ { .compatible = "inteno,vg50", .data = &board_vw6339gu, }, + #endif + #endif /* CONFIG_OF */ + { }, diff --git a/target/linux/brcm63xx/patches-4.14/560-board_963268gu_p300.patch b/target/linux/brcm63xx/patches-4.14/560-board_963268gu_p300.patch new file mode 100644 index 000000000..4819fc545 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/560-board_963268gu_p300.patch @@ -0,0 +1,83 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1622,6 +1622,64 @@ static struct board_info __initdata boar + * known 63268/63269 boards + */ + #ifdef CONFIG_BCM63XX_CPU_63268 ++static struct board_info __initdata board_963268bu_p300 = { ++ .name = "963268BU_P300", ++ .expected_cpu_id = 0x63268, ++ ++ .has_ehci0 = 1, ++ .has_ohci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 17, ++ .name = "FE1", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "GbE2", ++ }, ++ ++ [4] = { ++ .used = 1, ++ .phy_id = 0, ++ .name = "GbE3", ++ }, ++ ++ [5] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "GbE1", ++ }, ++ ++ [6] = { ++ .used = 1, ++ .phy_id = 24, ++ .name = "GbE4", ++ }, ++ ++ [7] = { ++ .used = 1, ++ .phy_id = 25, ++ .name = "GbE5", ++ }, ++ }, ++ }, ++}; ++ + static struct board_info __initdata board_963269bhr = { + .name = "963269BHR", + .expected_cpu_id = 0x63268, +@@ -1790,6 +1848,7 @@ static const struct board_info __initcon + &board_96368mvngr, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 ++ &board_963268bu_p300, + &board_963269bhr, + &board_vw6339gu, + #endif +@@ -1881,6 +1940,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 ++ { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, }, + { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, }, + { .compatible = "inteno,vg50", .data = &board_vw6339gu, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.14/561-board_WAP-5813n.patch b/target/linux/brcm63xx/patches-4.14/561-board_WAP-5813n.patch new file mode 100644 index 000000000..675185035 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/561-board_WAP-5813n.patch @@ -0,0 +1,75 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -13,6 +13,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -1616,6 +1618,47 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_ehci0 = 1, + }; ++ ++static struct sprom_fixup __initdata wap5813n_fixups[] = { ++ { .offset = 97, .value = 0xfeed }, ++ { .offset = 98, .value = 0x15d1 }, ++ { .offset = 99, .value = 0xfb0d }, ++ { .offset = 113, .value = 0xfef7 }, ++ { .offset = 114, .value = 0x15f7 }, ++ { .offset = 115, .value = 0xfb1a }, ++}; ++ ++static struct board_info __initdata board_WAP5813n = { ++ .name = "96369R-1231N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [4] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = wap5813n_fixups, ++ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups), ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6368 */ + + /* +@@ -1846,6 +1889,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + &board_963268bu_p300, +@@ -1938,6 +1982,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6368 + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, ++ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, }, diff --git a/target/linux/brcm63xx/patches-4.14/562-board_VR-3025u.patch b/target/linux/brcm63xx/patches-4.14/562-board_VR-3025u.patch new file mode 100644 index 000000000..29413e947 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/562-board_VR-3025u.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1619,6 +1619,59 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct sprom_fixup __initdata vr3025u_fixups[] = { ++ { .offset = 97, .value = 0xfeb3 }, ++ { .offset = 98, .value = 0x1618 }, ++ { .offset = 99, .value = 0xfab0 }, ++ { .offset = 113, .value = 0xfed1 }, ++ { .offset = 114, .value = 0x1609 }, ++ { .offset = 115, .value = 0xfad9 }, ++}; ++ ++static struct board_info __initdata board_VR3025u = { ++ .name = "96368M-1541N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = vr3025u_fixups, ++ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -1889,6 +1942,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_VR3025u, + &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 +@@ -1982,6 +2036,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6368 + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, ++ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.14/563-board_VR-3025un.patch b/target/linux/brcm63xx/patches-4.14/563-board_VR-3025un.patch new file mode 100644 index 000000000..81ac7021c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/563-board_VR-3025un.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1672,6 +1672,59 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata vr3025un_fixups[] = { ++ { .offset = 97, .value = 0xfeb3 }, ++ { .offset = 98, .value = 0x1618 }, ++ { .offset = 99, .value = 0xfab0 }, ++ { .offset = 113, .value = 0xfed1 }, ++ { .offset = 114, .value = 0x1609 }, ++ { .offset = 115, .value = 0xfad9 }, ++}; ++ ++static struct board_info __initdata board_VR3025un = { ++ .name = "96368M-1341N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = vr3025un_fixups, ++ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -1943,6 +1996,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_VR3025u, ++ &board_VR3025un, + &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 +@@ -2037,6 +2091,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, ++ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.14/564-board_P870HW-51a_v2.patch b/target/linux/brcm63xx/patches-4.14/564-board_P870HW-51a_v2.patch new file mode 100644 index 000000000..cdab8de25 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/564-board_P870HW-51a_v2.patch @@ -0,0 +1,67 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1628,6 +1628,48 @@ static struct sprom_fixup __initdata vr3 + { .offset = 115, .value = 0xfad9 }, + }; + ++static struct board_info __initdata board_P870HW51A_V2 = { ++ .name = "P870HW-51a_v2", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_VR3025u = { + .name = "96368M-1541N", + .expected_cpu_id = 0x6368, +@@ -1995,6 +2037,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, + &board_WAP5813n, +@@ -2093,6 +2136,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, }, diff --git a/target/linux/brcm63xx/patches-4.14/565-board_hw520.patch b/target/linux/brcm63xx/patches-4.14/565-board_hw520.patch new file mode 100644 index 000000000..75b7ef96e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/565-board_hw520.patch @@ -0,0 +1,55 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1312,6 +1312,36 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HW520 = { ++ .name = "HW6358GW_B", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enet0 = 1, ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_HW553 = { + .name = "HW553", + .expected_cpu_id = 0x6358, +@@ -2021,6 +2051,7 @@ static const struct board_info __initcon + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + &board_ct6373_1, ++ &board_HW520, + &board_HW553, + &board_HW556_A, + &board_HW556_B, +@@ -2113,6 +2144,7 @@ static struct of_device_id const bcm963x + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, }, ++ { .compatible = "huawei,hg520v", .data = &board_HW520, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, + { .compatible = "huawei,hg556a-a", .data = &board_HW556_A, }, + { .compatible = "huawei,hg556a-b", .data = &board_HW556_B, }, diff --git a/target/linux/brcm63xx/patches-4.14/566-board_A4001N.patch b/target/linux/brcm63xx/patches-4.14/566-board_A4001N.patch new file mode 100644 index 000000000..2e194a54f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/566-board_A4001N.patch @@ -0,0 +1,68 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -349,6 +349,49 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_A4001N = { ++ .name = "96328dg2x2", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ + static struct board_info __initdata board_A4001N1 = { + .name = "963281T_TEF", + .expected_cpu_id = 0x6328, +@@ -2002,6 +2045,7 @@ static const struct board_info __initcon + &board_AR5381u, + &board_AR5387un, + &board_963281TAN, ++ &board_A4001N, + &board_A4001N1, + &board_dsl_274xb_f1, + &board_FAST2704V2, +@@ -2090,6 +2134,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "adb,a4001n", .data = &board_A4001N, }, + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, diff --git a/target/linux/brcm63xx/patches-4.14/567-board_dsl-2751b_e1.patch b/target/linux/brcm63xx/patches-4.14/567-board_dsl-2751b_e1.patch new file mode 100644 index 000000000..9852f3460 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/567-board_dsl-2751b_e1.patch @@ -0,0 +1,93 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -142,6 +142,74 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = { ++ { .offset = 96, .value = 0x2046 }, ++ { .offset = 97, .value = 0xfe9d }, ++ { .offset = 98, .value = 0x1854 }, ++ { .offset = 99, .value = 0xfa59 }, ++ { .offset = 112, .value = 0x2046 }, ++ { .offset = 113, .value = 0xfe79 }, ++ { .offset = 114, .value = 0x17f5 }, ++ { .offset = 115, .value = 0xfa47 }, ++ { .offset = 161, .value = 0x2222 }, ++ { .offset = 162, .value = 0x2222 }, ++ { .offset = 169, .value = 0x2222 }, ++ { .offset = 170, .value = 0x2222 }, ++ { .offset = 171, .value = 0x5555 }, ++ { .offset = 172, .value = 0x5555 }, ++ { .offset = 173, .value = 0x4444 }, ++ { .offset = 174, .value = 0x4444 }, ++ { .offset = 175, .value = 0x5555 }, ++ { .offset = 176, .value = 0x5555 }, ++}; ++ ++static struct board_info __initdata board_dsl_2751b_d1 = { ++ .name = "AW5200B", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_enetsw = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = dsl2751b_e1_fixups, ++ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups), ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6318 */ + + /* +@@ -2039,6 +2107,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6318 + &board_96318ref, + &board_96318ref_p300, ++ &board_dsl_2751b_d1, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, +@@ -2132,6 +2201,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6318 + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, ++ { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n", .data = &board_A4001N, }, diff --git a/target/linux/brcm63xx/patches-4.14/568-board_DGND3700v1_3800B.patch b/target/linux/brcm63xx/patches-4.14/568-board_DGND3700v1_3800B.patch new file mode 100644 index 000000000..cc31a8188 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/568-board_DGND3700v1_3800B.patch @@ -0,0 +1,49 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1760,6 +1760,30 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct board_info __initdata board_DGND3700v1_3800B = { ++ .name = "DGND3700v1_3800B", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [5] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++}; ++ + static struct sprom_fixup __initdata vr3025u_fixups[] = { + { .offset = 97, .value = 0xfeb3 }, + { .offset = 98, .value = 0x1618 }, +@@ -2181,6 +2205,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_DGND3700v1_3800B, + &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, +@@ -2283,6 +2308,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.14/569-board_homehub2a.patch b/target/linux/brcm63xx/patches-4.14/569-board_homehub2a.patch new file mode 100644 index 000000000..8dca58683 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/569-board_homehub2a.patch @@ -0,0 +1,50 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1423,6 +1423,31 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_homehub2a = { ++ .name = "HOMEHUB2A", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4322, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_HW520 = { + .name = "HW6358GW_B", + .expected_cpu_id = 0x6358, +@@ -2188,6 +2213,7 @@ static const struct board_info __initcon + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + &board_ct6373_1, ++ &board_homehub2a, + &board_HW520, + &board_HW553, + &board_HW556_A, +@@ -2297,6 +2323,7 @@ static struct of_device_id const bcm963x + { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, + { .compatible = "t-com,spw303v", .data = &board_spw303v, }, + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, ++ { .compatible = "thomson,homehub2a", .data = &board_homehub2a, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6362 + { .compatible = "sagem,f@st2504n", .data = &board_fast2504n, }, diff --git a/target/linux/brcm63xx/patches-4.14/570-board_HG655b.patch b/target/linux/brcm63xx/patches-4.14/570-board_HG655b.patch new file mode 100644 index 000000000..8fa9112b8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/570-board_HG655b.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1809,6 +1809,52 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HG655b = { ++ .name = "HW65x", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_RALINK, ++ .caldata_offset = 0x7c0000, ++ .slot = 1, ++ .eeprom = "rt2x00.eeprom", ++ }, ++ }, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++}; ++ + static struct sprom_fixup __initdata vr3025u_fixups[] = { + { .offset = 97, .value = 0xfeb3 }, + { .offset = 98, .value = 0x1618 }, +@@ -2232,6 +2278,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, ++ &board_HG655b, + &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, +@@ -2335,6 +2382,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.14/571-board_fast2704n.patch b/target/linux/brcm63xx/patches-4.14/571-board_fast2704n.patch new file mode 100644 index 000000000..bdae1a7e4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/571-board_fast2704n.patch @@ -0,0 +1,64 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -210,6 +210,45 @@ static struct board_info __initdata boar + .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups), + }, + }; ++ ++static struct board_info __initdata board_FAST2704N = { ++ .name = "F@ST2704N", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_enetsw = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6318 */ + + /* +@@ -2203,6 +2242,7 @@ static const struct board_info __initcon + &board_96318ref, + &board_96318ref_p300, + &board_dsl_2751b_d1, ++ &board_FAST2704N, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, +@@ -2300,6 +2340,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, + { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, }, ++ { .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n", .data = &board_A4001N, }, diff --git a/target/linux/brcm63xx/patches-4.14/572-board_VR-3026e.patch b/target/linux/brcm63xx/patches-4.14/572-board_VR-3026e.patch new file mode 100644 index 000000000..260424bee --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/572-board_VR-3026e.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -2042,6 +2042,59 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata vr3026e_fixups[] = { ++ { .offset = 97, .value = 0xfeb3 }, ++ { .offset = 98, .value = 0x1618 }, ++ { .offset = 99, .value = 0xfab0 }, ++ { .offset = 113, .value = 0xfed1 }, ++ { .offset = 114, .value = 0x1609 }, ++ { .offset = 115, .value = 0xfad9 }, ++}; ++ ++static struct board_info __initdata board_VR3026e = { ++ .name = "96368MT-1341N1", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = vr3026e_fixups, ++ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -2322,6 +2375,7 @@ static const struct board_info __initcon + &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, ++ &board_VR3026e, + &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 +@@ -2422,6 +2476,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, ++ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, diff --git a/target/linux/brcm63xx/patches-4.14/573-board_R5010UNv2.patch b/target/linux/brcm63xx/patches-4.14/573-board_R5010UNv2.patch new file mode 100644 index 000000000..2764846a0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/573-board_R5010UNv2.patch @@ -0,0 +1,69 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -623,6 +623,50 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_R5010UNV2 = { ++ .name = "96328ang", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -2306,6 +2350,7 @@ static const struct board_info __initcon + &board_A4001N1, + &board_dsl_274xb_f1, + &board_FAST2704V2, ++ &board_R5010UNV2, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -2404,6 +2449,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, }, + { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, ++ { .compatible = "nucom,r5010unv2", .data = &board_R5010UNV2, }, + { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 diff --git a/target/linux/brcm63xx/patches-4.14/574-board_HG622.patch b/target/linux/brcm63xx/patches-4.14/574-board_HG622.patch new file mode 100644 index 000000000..860c0e787 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/574-board_HG622.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1938,6 +1938,52 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HG622 = { ++ .name = "96368MVWG_hg622", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_RALINK, ++ .caldata_offset = 0xfa0000, ++ .slot = 1, ++ .eeprom = "rt2x00.eeprom", ++ }, ++ }, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++}; ++ + static struct sprom_fixup __initdata vr3025u_fixups[] = { + { .offset = 97, .value = 0xfeb3 }, + { .offset = 98, .value = 0x1618 }, +@@ -2416,6 +2462,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, ++ &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, + &board_VR3025u, +@@ -2524,6 +2571,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "huawei,hg622", .data = &board_HG622, }, + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, diff --git a/target/linux/brcm63xx/patches-4.14/575-board_EVG2000.patch b/target/linux/brcm63xx/patches-4.14/575-board_EVG2000.patch new file mode 100644 index 000000000..4c9d19ac6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/575-board_EVG2000.patch @@ -0,0 +1,61 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1892,6 +1892,42 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata EVG2000_fixups[] = { ++ { .offset = 219, .value = 0xec08 }, ++}; ++ ++static struct board_info __initdata board_EVG2000 = { ++ .name = "96369PVG", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [5] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM4322, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = EVG2000_fixups, ++ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups), ++ }, ++}; ++ + static struct board_info __initdata board_HG655b = { + .name = "HW65x", + .expected_cpu_id = 0x6368, +@@ -2462,6 +2498,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, ++ &board_EVG2000, + &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, +@@ -2574,6 +2611,7 @@ static struct of_device_id const bcm963x + { .compatible = "huawei,hg622", .data = &board_HG622, }, + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, ++ { .compatible = "netgear,evg2000", .data = &board_EVG2000, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.14/576-board_AV4202N.patch b/target/linux/brcm63xx/patches-4.14/576-board_AV4202N.patch new file mode 100644 index 000000000..927ce2735 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/576-board_AV4202N.patch @@ -0,0 +1,70 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1782,6 +1782,51 @@ static struct board_info __initdata boar + * known 6368 boards + */ + #ifdef CONFIG_BCM63XX_CPU_6368 ++static struct board_info __initdata board_AV4202N = { ++ .name = "96368_Swiss_S1", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++ ++}; ++ + static struct board_info __initdata board_96368mvwg = { + .name = "96368MVWG", + .expected_cpu_id = 0x6368, +@@ -2495,6 +2540,7 @@ static const struct board_info __initcon + #endif + + #ifdef CONFIG_BCM63XX_CPU_6368 ++ &board_AV4202N, + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, +@@ -2602,6 +2648,7 @@ static struct of_device_id const bcm963x + { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "adb,av4202n", .data = &board_AV4202N, }, + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, diff --git a/target/linux/brcm63xx/patches-4.14/577-board_VH4032N.patch b/target/linux/brcm63xx/patches-4.14/577-board_VH4032N.patch new file mode 100644 index 000000000..e9bf9a768 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/577-board_VH4032N.patch @@ -0,0 +1,63 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -2266,6 +2266,44 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_VH4032N = { ++ .name = "VH4032N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "LAN4", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -2548,6 +2586,7 @@ static const struct board_info __initcon + &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, ++ &board_VH4032N, + &board_VR3025u, + &board_VR3025un, + &board_VR3026e, +@@ -2659,6 +2698,7 @@ static struct of_device_id const bcm963x + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "netgear,evg2000", .data = &board_EVG2000, }, ++ { .compatible = "observa,vh4032n", .data = &board_VH4032N, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.14/578-board_R1000H.patch b/target/linux/brcm63xx/patches-4.14/578-board_R1000H.patch new file mode 100644 index 000000000..4b4b1a0de --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/578-board_R1000H.patch @@ -0,0 +1,48 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -2116,6 +2116,29 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_R1000H = { ++ .name = "R1000H", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [5] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++}; ++ + static struct board_info __initdata board_VR3025u = { + .name = "96368M-1541N", + .expected_cpu_id = 0x6368, +@@ -2586,6 +2609,7 @@ static const struct board_info __initcon + &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, ++ &board_R1000H, + &board_VH4032N, + &board_VR3025u, + &board_VR3025un, +@@ -2687,6 +2711,7 @@ static struct of_device_id const bcm963x + { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "actiontec,r1000h", .data = &board_R1000H, }, + { .compatible = "adb,av4202n", .data = &board_AV4202N, }, + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, diff --git a/target/linux/brcm63xx/patches-4.14/579-board_AR-5315u.patch b/target/linux/brcm63xx/patches-4.14/579-board_AR-5315u.patch new file mode 100644 index 000000000..1974ccd81 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/579-board_AR-5315u.patch @@ -0,0 +1,86 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -143,6 +143,67 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ar5315u_fixups[] = { ++ { .offset = 6, .value = 0x1c00 }, ++ { .offset = 65, .value = 0x1255 }, ++ { .offset = 97, .value = 0xfe55 }, ++ { .offset = 98, .value = 0x171d }, ++ { .offset = 99, .value = 0xfa42 }, ++ { .offset = 113, .value = 0xfeb7 }, ++ { .offset = 114, .value = 0x18cd }, ++ { .offset = 115, .value = 0xfa4f }, ++ { .offset = 162, .value = 0x6444 }, ++ { .offset = 170, .value = 0x6444 }, ++ { .offset = 172, .value = 0x6444 }, ++}; ++ ++static struct board_info __initdata board_AR5315u = { ++ .name = "96318A-1441N1", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_enetsw = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "LAN4", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5315u_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = { + { .offset = 96, .value = 0x2046 }, + { .offset = 97, .value = 0xfe9d }, +@@ -2526,6 +2587,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6318 + &board_96318ref, + &board_96318ref_p300, ++ &board_AR5315u, + &board_dsl_2751b_d1, + &board_FAST2704N, + #endif +@@ -2631,6 +2693,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6318 + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, ++ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, }, + { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, }, + { .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.14/580-board_AD1018.patch b/target/linux/brcm63xx/patches-4.14/580-board_AD1018.patch new file mode 100644 index 000000000..7b28a24e3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/580-board_AD1018.patch @@ -0,0 +1,92 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -357,6 +357,73 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ad1018_fixups[] = { ++ { .offset = 6, .value = 0x1c00 }, ++ { .offset = 65, .value = 0x1256 }, ++ { .offset = 96, .value = 0x2046 }, ++ { .offset = 97, .value = 0xfe69 }, ++ { .offset = 98, .value = 0x1726 }, ++ { .offset = 99, .value = 0xfa5c }, ++ { .offset = 112, .value = 0x2046 }, ++ { .offset = 113, .value = 0xfea8 }, ++ { .offset = 114, .value = 0x1978 }, ++ { .offset = 115, .value = 0xfa26 }, ++ { .offset = 161, .value = 0x2222 }, ++ { .offset = 169, .value = 0x2222 }, ++ { .offset = 171, .value = 0x2222 }, ++ { .offset = 173, .value = 0x2222 }, ++ { .offset = 174, .value = 0x4444 }, ++ { .offset = 175, .value = 0x2222 }, ++ { .offset = 176, .value = 0x4444 }, ++}; ++ ++static struct board_info __initdata board_AD1018 = { ++ .name = "96328avngr", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "FIBRE", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ad1018_fixups, ++ .num_board_fixups = ARRAY_SIZE(ad1018_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata ar5381u_fixups[] = { + { .offset = 97, .value = 0xfee5 }, + { .offset = 98, .value = 0x157c }, +@@ -2593,6 +2660,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_AD1018, + &board_AR5381u, + &board_AR5387un, + &board_963281TAN, +@@ -2707,6 +2775,7 @@ static struct of_device_id const bcm963x + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + { .compatible = "nucom,r5010unv2", .data = &board_R5010UNV2, }, + { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, }, ++ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, diff --git a/target/linux/brcm63xx/patches-4.14/800-wl_exports.patch b/target/linux/brcm63xx/patches-4.14/800-wl_exports.patch new file mode 100644 index 000000000..5f5b1c2e6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/800-wl_exports.patch @@ -0,0 +1,25 @@ +--- a/arch/mips/bcm63xx/nvram.c ++++ b/arch/mips/bcm63xx/nvram.c +@@ -24,6 +24,12 @@ + static struct bcm963xx_nvram nvram; + static int mac_addr_used; + ++/* ++ * Required export for WL ++ */ ++u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 }; ++EXPORT_SYMBOL(nvram_buf); ++ + void __init bcm63xx_nvram_init(void *addr) + { + u32 crc, expected_crc; +--- a/arch/mips/mm/cache.c ++++ b/arch/mips/mm/cache.c +@@ -64,6 +64,7 @@ void (*_dma_cache_wback)(unsigned long s + void (*_dma_cache_inv)(unsigned long start, unsigned long size); + + EXPORT_SYMBOL(_dma_cache_wback_inv); ++EXPORT_SYMBOL(_dma_cache_inv); + + #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */ + diff --git a/target/linux/brcm63xx/patches-4.14/801-ssb_export_fallback_sprom.patch b/target/linux/brcm63xx/patches-4.14/801-ssb_export_fallback_sprom.patch new file mode 100644 index 000000000..11a83536b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/801-ssb_export_fallback_sprom.patch @@ -0,0 +1,31 @@ +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -8,6 +8,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -387,7 +388,19 @@ struct fallback_sprom_match { + struct ssb_sprom sprom; + }; + +-static struct fallback_sprom_match fallback_sprom; ++struct fallback_sprom_match fallback_sprom; ++ ++int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out) ++{ ++ if (pci_bus != fallback_sprom.pci_bus || ++ pci_slot != fallback_sprom.pci_dev) ++ pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n", ++ fallback_sprom.pci_bus, fallback_sprom.pci_dev, ++ pci_bus, pci_slot); ++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom)); ++ return 0; ++} ++EXPORT_SYMBOL(bcm63xx_get_fallback_sprom); + + #if defined(CONFIG_SSB_PCIHOST) + int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out) diff --git a/target/linux/brcm63xx/patches-4.14/802-rtl8367r_fix_RGMII_support.patch b/target/linux/brcm63xx/patches-4.14/802-rtl8367r_fix_RGMII_support.patch new file mode 100644 index 000000000..2aca2f3f7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/802-rtl8367r_fix_RGMII_support.patch @@ -0,0 +1,30 @@ +From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001 +From: Miguel GAIO +Date: Fri, 6 Jul 2012 14:12:33 +0200 +Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support + +--- + drivers/net/phy/rtl8367.c | 5 +++++ + 1 files changed, 5 insertions(+), 0 deletions(-) + +--- a/drivers/net/phy/rtl8367.c ++++ b/drivers/net/phy/rtl8367.c +@@ -146,6 +146,10 @@ + #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1 + #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7 + ++#define RTL8367_PHY_AD_REG 0x130f ++#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5 ++#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0 ++ + #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x)) + #define RTL8367_DI_FORCE_MODE BIT(12) + #define RTL8367_DI_FORCE_NWAY BIT(7) +@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct + case RTL8367_EXTIF_MODE_RGMII_33V: + REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367); + REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777); ++ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0); + break; + + case RTL8367_EXTIF_MODE_TMII_MAC: diff --git a/target/linux/brcm63xx/patches-4.14/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch b/target/linux/brcm63xx/patches-4.14/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch new file mode 100644 index 000000000..7a3c2f01c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch @@ -0,0 +1,26 @@ +From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 6 Apr 2014 22:33:16 +0200 +Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp + +Unligned memcpy_fromio randomly fails with an unaligned dst. Work around +it by ensuring we are always doing aligned copies. + +Should fix filename corruption in jffs2 with SMP. + +Signed-off-by: Jonas Gorski +--- + fs/jffs2/nodelist.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/jffs2/nodelist.h ++++ b/fs/jffs2/nodelist.h +@@ -259,7 +259,7 @@ struct jffs2_full_dirent + uint32_t ino; /* == zero for unlink */ + unsigned int nhash; + unsigned char type; +- unsigned char name[0]; ++ unsigned char name[0] __attribute__((aligned((sizeof(long))))); + }; + + /* diff --git a/target/linux/brcm63xx/patches-4.14/804-bcm63xx_enet_63268_rgmii_ports.patch b/target/linux/brcm63xx/patches-4.14/804-bcm63xx_enet_63268_rgmii_ports.patch new file mode 100644 index 000000000..743b04b43 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.14/804-bcm63xx_enet_63268_rgmii_ports.patch @@ -0,0 +1,13 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -2238,6 +2238,10 @@ static int bcm_enetsw_open(struct net_de + + rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); + rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; ++ if (BCMCPU_IS_63268()) { ++ rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN; ++ rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN; ++ } + enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); + } + diff --git a/target/linux/brcm63xx/patches-4.4/000-4.5-03-mtd-nand-spi-nor-assign-MTD-of_node.patch b/target/linux/brcm63xx/patches-4.4/000-4.5-03-mtd-nand-spi-nor-assign-MTD-of_node.patch index 6b0a12132..e29aecda2 100644 --- a/target/linux/brcm63xx/patches-4.4/000-4.5-03-mtd-nand-spi-nor-assign-MTD-of_node.patch +++ b/target/linux/brcm63xx/patches-4.4/000-4.5-03-mtd-nand-spi-nor-assign-MTD-of_node.patch @@ -15,7 +15,7 @@ Reviewed-by: Boris Brezillon --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c -@@ -3992,6 +3992,9 @@ int nand_scan_ident(struct mtd_info *mtd +@@ -3995,6 +3995,9 @@ int nand_scan_ident(struct mtd_info *mtd int ret; if (chip->flash_node) { diff --git a/target/linux/brcm63xx/patches-4.4/000-4.5-04-mtd-nand-convert-to-nand_set_flash_node.patch b/target/linux/brcm63xx/patches-4.4/000-4.5-04-mtd-nand-convert-to-nand_set_flash_node.patch index ecfd8c44f..15a1ec37d 100644 --- a/target/linux/brcm63xx/patches-4.4/000-4.5-04-mtd-nand-convert-to-nand_set_flash_node.patch +++ b/target/linux/brcm63xx/patches-4.4/000-4.5-04-mtd-nand-convert-to-nand_set_flash_node.patch @@ -28,7 +28,7 @@ Reviewed-by: Boris Brezillon --- a/drivers/mtd/nand/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/brcmnand/brcmnand.c -@@ -1957,7 +1957,7 @@ static int brcmnand_init_cs(struct brcmn +@@ -1950,7 +1950,7 @@ static int brcmnand_init_cs(struct brcmn mtd = &host->mtd; chip = &host->chip; @@ -50,7 +50,7 @@ Reviewed-by: Boris Brezillon nand->options |= NAND_BUSWIDTH_16; --- a/drivers/mtd/nand/sunxi_nand.c +++ b/drivers/mtd/nand/sunxi_nand.c -@@ -1330,7 +1330,7 @@ static int sunxi_nand_chip_init(struct d +@@ -1336,7 +1336,7 @@ static int sunxi_nand_chip_init(struct d * in the DT. */ nand->ecc.mode = NAND_ECC_HW; diff --git a/target/linux/brcm63xx/patches-4.4/000-4.5-06-mtd-nand-drop-unnecessary-partition-parser-data.patch b/target/linux/brcm63xx/patches-4.4/000-4.5-06-mtd-nand-drop-unnecessary-partition-parser-data.patch index 8a031301b..3dc68f01d 100644 --- a/target/linux/brcm63xx/patches-4.4/000-4.5-06-mtd-nand-drop-unnecessary-partition-parser-data.patch +++ b/target/linux/brcm63xx/patches-4.4/000-4.5-06-mtd-nand-drop-unnecessary-partition-parser-data.patch @@ -83,7 +83,7 @@ Reviewed-by: Boris Brezillon --- a/drivers/mtd/nand/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/brcmnand/brcmnand.c -@@ -1946,7 +1946,6 @@ static int brcmnand_init_cs(struct brcmn +@@ -1939,7 +1939,6 @@ static int brcmnand_init_cs(struct brcmn struct nand_chip *chip; int ret; u16 cfg_offs; @@ -91,7 +91,7 @@ Reviewed-by: Boris Brezillon ret = of_property_read_u32(dn, "reg", &host->cs); if (ret) { -@@ -2025,7 +2024,7 @@ static int brcmnand_init_cs(struct brcmn +@@ -2018,7 +2017,7 @@ static int brcmnand_init_cs(struct brcmn if (nand_scan_tail(mtd)) return -ENXIO; @@ -610,7 +610,7 @@ Reviewed-by: Boris Brezillon flctl = devm_kzalloc(&pdev->dev, sizeof(struct sh_flctl), GFP_KERNEL); if (!flctl) -@@ -1123,6 +1122,7 @@ static int flctl_probe(struct platform_d +@@ -1124,6 +1123,7 @@ static int flctl_probe(struct platform_d platform_set_drvdata(pdev, flctl); flctl_mtd = &flctl->mtd; nand = &flctl->chip; @@ -618,7 +618,7 @@ Reviewed-by: Boris Brezillon flctl_mtd->priv = nand; flctl_mtd->dev.parent = &pdev->dev; flctl->pdev = pdev; -@@ -1163,9 +1163,7 @@ static int flctl_probe(struct platform_d +@@ -1164,9 +1164,7 @@ static int flctl_probe(struct platform_d if (ret) goto err_chip; @@ -662,7 +662,7 @@ Reviewed-by: Boris Brezillon --- a/drivers/mtd/nand/sunxi_nand.c +++ b/drivers/mtd/nand/sunxi_nand.c -@@ -1232,7 +1232,6 @@ static int sunxi_nand_chip_init(struct d +@@ -1238,7 +1238,6 @@ static int sunxi_nand_chip_init(struct d { const struct nand_sdr_timings *timings; struct sunxi_nand_chip *chip; @@ -670,7 +670,7 @@ Reviewed-by: Boris Brezillon struct mtd_info *mtd; struct nand_chip *nand; int nsels; -@@ -1366,8 +1365,7 @@ static int sunxi_nand_chip_init(struct d +@@ -1372,8 +1371,7 @@ static int sunxi_nand_chip_init(struct d return ret; } diff --git a/target/linux/brcm63xx/patches-4.4/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch b/target/linux/brcm63xx/patches-4.4/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch new file mode 100644 index 000000000..32ef2cb19 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.4/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch @@ -0,0 +1,39 @@ +From 943b0832e0cf3afe5bd40ffb1885d06106122c5d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:49:49 +0200 +Subject: [PATCH 1/4] bcm63xx_enet: just use "enet" as the clock name + +Now that we have the individual clocks available as "enet" we +don't need to rely on the device id for them anymore. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1733,7 +1733,6 @@ static int bcm_enet_probe(struct platfor + struct bcm63xx_enet_platform_data *pd; + struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx; + struct mii_bus *bus; +- const char *clk_name; + int i, ret; + + if (!bcm_enet_shared_base[0]) +@@ -1774,14 +1773,12 @@ static int bcm_enet_probe(struct platfor + if (priv->mac_id == 0) { + priv->rx_chan = 0; + priv->tx_chan = 1; +- clk_name = "enet0"; + } else { + priv->rx_chan = 2; + priv->tx_chan = 3; +- clk_name = "enet1"; + } + +- priv->mac_clk = devm_clk_get(&pdev->dev, clk_name); ++ priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); + goto out; diff --git a/target/linux/brcm63xx/patches-4.4/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch b/target/linux/brcm63xx/patches-4.4/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch new file mode 100644 index 000000000..51d105895 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.4/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch @@ -0,0 +1,72 @@ +From b7d1d1f345bb3b25c360c1df812d98866e2ee7fb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 30 Sep 2017 13:50:03 +0200 +Subject: [PATCH 2/4] bcm63xx_enet: use platform data for dma channel numbers + +To reduce the reliance on device ids, pass the dma channel numbers to +the enet devices as platform data. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-enet.c | 8 ++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 4 ++++ + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 11 ++--------- + 3 files changed, 14 insertions(+), 9 deletions(-) + +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -265,6 +265,14 @@ int __init bcm63xx_enet_register(int uni + dpd->dma_chan_width = ENETDMA_CHAN_WIDTH; + } + ++ if (unit == 0) { ++ dpd->rx_chan = 0; ++ dpd->tx_chan = 1; ++ } else { ++ dpd->rx_chan = 2; ++ dpd->tx_chan = 3; ++ } ++ + ret = platform_device_register(pdev); + if (ret) + return ret; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h +@@ -54,6 +54,10 @@ struct bcm63xx_enet_platform_data { + + /* DMA descriptor shift */ + unsigned int dma_desc_shift; ++ ++ /* dma channel ids */ ++ int rx_chan; ++ int tx_chan; + }; + + /* +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1769,15 +1769,6 @@ static int bcm_enet_probe(struct platfor + priv->irq_tx = res_irq_tx->start; + priv->mac_id = pdev->id; + +- /* get rx & tx dma channel id for this mac */ +- if (priv->mac_id == 0) { +- priv->rx_chan = 0; +- priv->tx_chan = 1; +- } else { +- priv->rx_chan = 2; +- priv->tx_chan = 3; +- } +- + priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); +@@ -1809,6 +1800,8 @@ static int bcm_enet_probe(struct platfor + priv->dma_chan_width = pd->dma_chan_width; + priv->dma_has_sram = pd->dma_has_sram; + priv->dma_desc_shift = pd->dma_desc_shift; ++ priv->rx_chan = pd->rx_chan; ++ priv->tx_chan = pd->tx_chan; + } + + if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { diff --git a/target/linux/brcm63xx/patches-4.4/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch b/target/linux/brcm63xx/patches-4.4/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch new file mode 100644 index 000000000..6e6f320b8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.4/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch @@ -0,0 +1,25 @@ +From 8c61608e5dd2e15575c171ee9cd558ddc3b94962 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 17 Dec 2017 12:54:30 +0100 +Subject: [PATCH 3/4] bcm63xx_enet: remove pointless mac_id check + +Enabling the ephy clock for mac 1 is harmless, and the actual usage of +the ephy is not restricted to mac 0, so we might as well remove the +check. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1804,7 +1804,7 @@ static int bcm_enet_probe(struct platfor + priv->tx_chan = pd->tx_chan; + } + +- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { ++ if (priv->has_phy && !priv->use_external_mii) { + /* using internal PHY, enable clock */ + priv->phy_clk = devm_clk_get(&pdev->dev, "ephy"); + if (IS_ERR(priv->phy_clk)) { diff --git a/target/linux/brcm63xx/patches-4.4/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch b/target/linux/brcm63xx/patches-4.4/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch new file mode 100644 index 000000000..2c8206ec9 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.4/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch @@ -0,0 +1,46 @@ +From faea89cd893a1a7af81185f026a64dad603ef72f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 17 Dec 2017 12:58:12 +0100 +Subject: [PATCH 4/4] bcm63xx_enet: use platform device id directly for miibus + name + +Directly use the platform device for generating the miibus name. This removes +the last user of bcm_enet_priv::mac_id and we can remove the field. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 +-- + drivers/net/ethernet/broadcom/bcm63xx_enet.h | 3 --- + 2 files changed, 1 insertion(+), 5 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1767,7 +1767,6 @@ static int bcm_enet_probe(struct platfor + dev->irq = priv->irq = res_irq->start; + priv->irq_rx = res_irq_rx->start; + priv->irq_tx = res_irq_tx->start; +- priv->mac_id = pdev->id; + + priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { +@@ -1835,7 +1834,7 @@ static int bcm_enet_probe(struct platfor + bus->priv = priv; + bus->read = bcm_enet_mdio_read_phylib; + bus->write = bcm_enet_mdio_write_phylib; +- sprintf(bus->id, "%s-%d", pdev->name, priv->mac_id); ++ sprintf(bus->id, "%s-%d", pdev->name, pdev->id); + + /* only probe bus where we think the PHY is, because + * the mdio read operation return 0 instead of 0xffff +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -192,9 +192,6 @@ struct bcm_enet_mib_counters { + + struct bcm_enet_priv { + +- /* mac id (from platform device id) */ +- int mac_id; +- + /* base remapped address of device */ + void __iomem *base; + diff --git a/target/linux/brcm63xx/patches-4.4/339-MIPS-BCM63XX-add-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.4/339-MIPS-BCM63XX-add-support-for-BCM63268.patch index 85abad4d3..05922bd58 100644 --- a/target/linux/brcm63xx/patches-4.4/339-MIPS-BCM63XX-add-support-for-BCM63268.patch +++ b/target/linux/brcm63xx/patches-4.4/339-MIPS-BCM63XX-add-support-for-BCM63268.patch @@ -706,7 +706,7 @@ Signed-off-by: Jonas Gorski chan_count = 32; else if (BCMCPU_IS_6345()) chan_count = 8; -@@ -276,7 +277,8 @@ bcm63xx_enetsw_register(const struct bcm +@@ -284,7 +285,8 @@ bcm63xx_enetsw_register(const struct bcm { int ret; @@ -716,7 +716,7 @@ Signed-off-by: Jonas Gorski return -ENODEV; ret = register_shared(); -@@ -297,6 +299,8 @@ bcm63xx_enetsw_register(const struct bcm +@@ -305,6 +307,8 @@ bcm63xx_enetsw_register(const struct bcm enetsw_pd.num_ports = ENETSW_PORTS_6328; else if (BCMCPU_IS_6362() || BCMCPU_IS_6368()) enetsw_pd.num_ports = ENETSW_PORTS_6368; @@ -727,7 +727,7 @@ Signed-off-by: Jonas Gorski enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH; --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h -@@ -62,6 +62,7 @@ struct bcm63xx_enet_platform_data { +@@ -66,6 +66,7 @@ struct bcm63xx_enet_platform_data { #define ENETSW_MAX_PORT 8 #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */ #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */ diff --git a/target/linux/brcm63xx/patches-4.4/341-MIPS-BCM63XX-add-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.4/341-MIPS-BCM63XX-add-support-for-BCM6318.patch index 3b5da024b..277f54dff 100644 --- a/target/linux/brcm63xx/patches-4.4/341-MIPS-BCM63XX-add-support-for-BCM6318.patch +++ b/target/linux/brcm63xx/patches-4.4/341-MIPS-BCM63XX-add-support-for-BCM6318.patch @@ -652,7 +652,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318 chan_count = 32; else if (BCMCPU_IS_6345()) chan_count = 8; -@@ -277,8 +277,8 @@ bcm63xx_enetsw_register(const struct bcm +@@ -285,8 +285,8 @@ bcm63xx_enetsw_register(const struct bcm { int ret; @@ -663,7 +663,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318 return -ENODEV; ret = register_shared(); -@@ -295,7 +295,7 @@ bcm63xx_enetsw_register(const struct bcm +@@ -303,7 +303,7 @@ bcm63xx_enetsw_register(const struct bcm memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd)); diff --git a/target/linux/brcm63xx/patches-4.4/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch b/target/linux/brcm63xx/patches-4.4/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch index 2259b024a..e277bea13 100644 --- a/target/linux/brcm63xx/patches-4.4/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch +++ b/target/linux/brcm63xx/patches-4.4/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch @@ -87,7 +87,7 @@ Signed-off-by: Jonas Gorski + + ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32]; + ephy_reset.table[0].chip_hwnum = hw_gpio % 32; -+ ephy_reset.table[0].con_id = "ephy-reset"; ++ ephy_reset.table[0].con_id = "reset"; + ephy_reset.table[0].flags = flags; + + gpiod_add_lookup_table(&ephy_reset); diff --git a/target/linux/brcm63xx/patches-4.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch b/target/linux/brcm63xx/patches-4.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch index 7c2b686a9..5b754ad96 100644 --- a/target/linux/brcm63xx/patches-4.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch +++ b/target/linux/brcm63xx/patches-4.4/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch @@ -100,7 +100,7 @@ Signed-off-by: Jonas Gorski return 0; } -@@ -1832,6 +1791,8 @@ static int bcm_enet_probe(struct platfor +@@ -1821,6 +1780,8 @@ static int bcm_enet_probe(struct platfor /* MII bus registration */ if (priv->has_phy) { @@ -109,7 +109,7 @@ Signed-off-by: Jonas Gorski priv->mii_bus = mdiobus_alloc(); if (!priv->mii_bus) { -@@ -1869,6 +1830,38 @@ static int bcm_enet_probe(struct platfor +@@ -1858,6 +1819,38 @@ static int bcm_enet_probe(struct platfor dev_err(&pdev->dev, "unable to register mdio bus\n"); goto out_free_mdio; } @@ -148,7 +148,7 @@ Signed-off-by: Jonas Gorski } else { /* run platform code to initialize PHY device */ -@@ -1914,6 +1907,9 @@ static int bcm_enet_probe(struct platfor +@@ -1903,6 +1896,9 @@ static int bcm_enet_probe(struct platfor return 0; out_unregister_mdio: @@ -158,7 +158,7 @@ Signed-off-by: Jonas Gorski if (priv->mii_bus) mdiobus_unregister(priv->mii_bus); -@@ -1951,6 +1947,8 @@ static int bcm_enet_remove(struct platfo +@@ -1940,6 +1936,8 @@ static int bcm_enet_remove(struct platfo enet_writel(priv, 0, ENET_MIISC_REG); if (priv->has_phy) { diff --git a/target/linux/brcm63xx/patches-4.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-4.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch index cf3715e4f..49b9c73e8 100644 --- a/target/linux/brcm63xx/patches-4.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch +++ b/target/linux/brcm63xx/patches-4.4/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch @@ -32,7 +32,7 @@ Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports #define ENETSW_MDIOC_EXT_MASK (1 << 16) --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2223,6 +2223,18 @@ static int bcm_enetsw_open(struct net_de +@@ -2212,6 +2212,18 @@ static int bcm_enetsw_open(struct net_de priv->sw_port_link[i] = 0; } diff --git a/target/linux/brcm63xx/patches-4.4/423-bcm63xx_enet_add_b53_support.patch b/target/linux/brcm63xx/patches-4.4/423-bcm63xx_enet_add_b53_support.patch index c905cb2d4..499928f70 100644 --- a/target/linux/brcm63xx/patches-4.4/423-bcm63xx_enet_add_b53_support.patch +++ b/target/linux/brcm63xx/patches-4.4/423-bcm63xx_enet_add_b53_support.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h -@@ -335,6 +335,9 @@ struct bcm_enet_priv { +@@ -332,6 +332,9 @@ struct bcm_enet_priv { struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT]; int sw_port_link[ENETSW_MAX_PORT]; @@ -20,7 +20,7 @@ #include #include "bcm63xx_enet.h" -@@ -1968,7 +1969,8 @@ static int bcm_enet_remove(struct platfo +@@ -1957,7 +1958,8 @@ static int bcm_enet_remove(struct platfo return 0; } @@ -30,7 +30,7 @@ .probe = bcm_enet_probe, .remove = bcm_enet_remove, .driver = { -@@ -1977,6 +1979,42 @@ struct platform_driver bcm63xx_enet_driv +@@ -1966,6 +1968,42 @@ struct platform_driver bcm63xx_enet_driv }, }; @@ -73,7 +73,7 @@ /* * switch mii access callbacks */ -@@ -2235,29 +2273,6 @@ static int bcm_enetsw_open(struct net_de +@@ -2224,29 +2262,6 @@ static int bcm_enetsw_open(struct net_de enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); } @@ -103,7 +103,7 @@ /* initialize flow control buffer allocation */ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, ENETDMA_BUFALLOC_REG(priv->rx_chan)); -@@ -2716,6 +2731,9 @@ static int bcm_enetsw_probe(struct platf +@@ -2705,6 +2720,9 @@ static int bcm_enetsw_probe(struct platf struct bcm63xx_enetsw_platform_data *pd; struct resource *res_mem; int ret, irq_rx, irq_tx; @@ -113,7 +113,7 @@ if (!bcm_enet_shared_base[0]) return -EPROBE_DEFER; -@@ -2798,6 +2816,43 @@ static int bcm_enetsw_probe(struct platf +@@ -2787,6 +2805,43 @@ static int bcm_enetsw_probe(struct platf priv->pdev = pdev; priv->net_dev = dev; @@ -157,7 +157,7 @@ return 0; out_disable_clk: -@@ -2819,6 +2874,9 @@ static int bcm_enetsw_remove(struct plat +@@ -2808,6 +2863,9 @@ static int bcm_enetsw_remove(struct plat priv = netdev_priv(dev); unregister_netdev(dev); diff --git a/target/linux/brcm63xx/patches-4.4/424-bcm63xx_enet_no_request_mem_region.patch b/target/linux/brcm63xx/patches-4.4/424-bcm63xx_enet_no_request_mem_region.patch index f1c7589c4..700fb0114 100644 --- a/target/linux/brcm63xx/patches-4.4/424-bcm63xx_enet_no_request_mem_region.patch +++ b/target/linux/brcm63xx/patches-4.4/424-bcm63xx_enet_no_request_mem_region.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2775,9 +2775,9 @@ static int bcm_enetsw_probe(struct platf +@@ -2764,9 +2764,9 @@ static int bcm_enetsw_probe(struct platf if (ret) goto out; diff --git a/target/linux/brcm63xx/patches-4.4/425-bcm63xxpart_parse_paritions_from_dt.patch b/target/linux/brcm63xx/patches-4.4/425-bcm63xxpart_parse_paritions_from_dt.patch index d64d42c9d..ea73690d8 100644 --- a/target/linux/brcm63xx/patches-4.4/425-bcm63xxpart_parse_paritions_from_dt.patch +++ b/target/linux/brcm63xx/patches-4.4/425-bcm63xxpart_parse_paritions_from_dt.patch @@ -89,7 +89,7 @@ } } else { pr_warn("CFE boot tag CRC invalid (expected %08x, actual %08x)\n", -@@ -119,23 +108,139 @@ static int bcm63xx_parse_cfe_partitions( +@@ -119,23 +108,145 @@ static int bcm63xx_parse_cfe_partitions( kernellen = 0; rootfslen = 0; rootfsaddr = 0; @@ -133,14 +133,18 @@ + struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +{ -+ struct device_node *dp = mtd_get_of_node(master); ++ struct device_node *dp, *mtd_node = mtd_get_of_node(master); + struct device_node *pp; + int i, nr_parts = 0; + const char *partname; + int len; + ++ dp = of_get_child_by_name(mtd_node, "partitions"); ++ if (!dp) ++ dp = mtd_node; ++ + for_each_child_of_node(dp, pp) { -+ if (node_has_compatible(pp)) ++ if (node_has_compatible(pp) && dp == mtd_node) + continue; + + if (!of_get_property(pp, "reg", &len)) @@ -150,7 +154,8 @@ + if (!partname) + partname = of_get_property(pp, "name", &len); + -+ if (!strcmp(partname, "linux")) ++ if (!strcmp(partname, "linux") || ++ of_device_is_compatible(pp, "brcm,bcm963xx-imagetag")) + nr_parts += 2; + + nr_parts++; @@ -166,7 +171,7 @@ + int a_cells, s_cells; + size_t size, offset; + -+ if (node_has_compatible(pp)) ++ if (node_has_compatible(pp) && dp == mtd_node) + continue; + + reg = of_get_property(pp, "reg", &len); @@ -181,7 +186,8 @@ + if (!partname) + partname = of_get_property(pp, "name", &len); + -+ if (!strcmp(partname, "linux")) ++ if (!strcmp(partname, "linux") || ++ of_device_is_compatible(pp, "brcm,bcm963xx-imagetag")) + i += parse_bcmtag(master, *pparts, i, offset, size); + + if (of_get_property(pp, "read-only", &len)) @@ -239,7 +245,7 @@ /* Start building partition list */ parts[curpart].name = "CFE"; -@@ -143,29 +248,7 @@ static int bcm63xx_parse_cfe_partitions( +@@ -143,29 +254,7 @@ static int bcm63xx_parse_cfe_partitions( parts[curpart].size = cfelen; curpart++; @@ -270,7 +276,7 @@ parts[curpart].name = "nvram"; parts[curpart].offset = master->size - nvramlen; -@@ -174,25 +257,33 @@ static int bcm63xx_parse_cfe_partitions( +@@ -174,25 +263,37 @@ static int bcm63xx_parse_cfe_partitions( /* Global partition "linux" to make easy firmware upgrade */ parts[curpart].name = "linux"; @@ -299,7 +305,11 @@ + struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +{ -+ if (mtd_get_of_node(master) && of_get_child_count(mtd_get_of_node(master))) ++ struct device_node *np, *mtd_node = mtd_get_of_node(master); ++ np = of_get_child_by_name(mtd_node, "partitions"); ++ ++ if ((np && of_device_is_compatible(np, "fixed-partitions")) || ++ (!np && of_get_child_count(mtd_node))) + return bcm63xx_parse_cfe_partitions_of(master, pparts, data); + else + return bcm63xx_parse_cfe_partitions(master, pparts, data); diff --git a/target/linux/brcm63xx/patches-4.4/804-bcm63xx_enet_63268_rgmii_ports.patch b/target/linux/brcm63xx/patches-4.4/804-bcm63xx_enet_63268_rgmii_ports.patch index a573d2166..5949f890e 100644 --- a/target/linux/brcm63xx/patches-4.4/804-bcm63xx_enet_63268_rgmii_ports.patch +++ b/target/linux/brcm63xx/patches-4.4/804-bcm63xx_enet_63268_rgmii_ports.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c -@@ -2270,6 +2270,10 @@ static int bcm_enetsw_open(struct net_de +@@ -2259,6 +2259,10 @@ static int bcm_enetsw_open(struct net_de rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.11-01-mtd-m25p80-consider-max-message-size-in-m25p80_read.patch b/target/linux/brcm63xx/patches-4.9/001-4.11-01-mtd-m25p80-consider-max-message-size-in-m25p80_read.patch new file mode 100644 index 000000000..9d41b3cce --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.11-01-mtd-m25p80-consider-max-message-size-in-m25p80_read.patch @@ -0,0 +1,30 @@ +From 80a79a889ce5df16c5261ab2f1e8e63b94b78102 Mon Sep 17 00:00:00 2001 +From: Heiner Kallweit +Date: Fri, 28 Oct 2016 07:58:46 +0200 +Subject: [PATCH 1/8] mtd: m25p80: consider max message size in m25p80_read + +Consider a message size limit when calculating the maximum amount +of data that can be read. + +The message size limit has been introduced with 4.9, so cc it +to stable. + +Signed-off-by: Heiner Kallweit +Cc: # 4.9.x +Signed-off-by: Cyrille Pitchen +--- + drivers/mtd/devices/m25p80.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/mtd/devices/m25p80.c ++++ b/drivers/mtd/devices/m25p80.c +@@ -174,7 +174,8 @@ static ssize_t m25p80_read(struct spi_no + + t[1].rx_buf = buf; + t[1].rx_nbits = m25p80_rx_nbits(nor); +- t[1].len = min(len, spi_max_transfer_size(spi)); ++ t[1].len = min3(len, spi_max_transfer_size(spi), ++ spi_max_message_size(spi) - t[0].len); + spi_message_add_tail(&t[1], &m); + + ret = spi_sync(spi, &m); diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-01-spi-bcm63xx-make-spi-subsystem-aware-of-message-size.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-01-spi-bcm63xx-make-spi-subsystem-aware-of-message-size.patch new file mode 100644 index 000000000..f049af0d8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-01-spi-bcm63xx-make-spi-subsystem-aware-of-message-size.patch @@ -0,0 +1,42 @@ +From 3fcc36962c32ad0af2d5904103e2b2b824b6b1aa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 4 Feb 2017 12:32:59 +0100 +Subject: [PATCH 2/8] spi/bcm63xx: make spi subsystem aware of message size + limits + +The bcm63xx LS SPI controller does not allow manual control of the CS +lines and will toggle it automatically before after sending data, so we +are limited to messages that fit in the FIFO buffer. Since the CS lines +aren't available as GPIOs either, we will need to make slave drivers +aware of this limitation and handle it accordingly. + +Signed-off-by: Jonas Gorski +--- + drivers/spi/spi-bcm63xx.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/spi/spi-bcm63xx.c ++++ b/drivers/spi/spi-bcm63xx.c +@@ -428,6 +428,13 @@ static irqreturn_t bcm63xx_spi_interrupt + return IRQ_HANDLED; + } + ++static size_t bcm63xx_spi_max_length(struct spi_device *spi) ++{ ++ struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); ++ ++ return bs->fifo_size; ++} ++ + static const unsigned long bcm6348_spi_reg_offsets[] = { + [SPI_CMD] = SPI_6348_CMD, + [SPI_INT_STATUS] = SPI_6348_INT_STATUS, +@@ -541,6 +548,8 @@ static int bcm63xx_spi_probe(struct plat + master->transfer_one_message = bcm63xx_spi_transfer_one; + master->mode_bits = MODEBITS; + master->bits_per_word_mask = SPI_BPW_MASK(8); ++ master->max_transfer_size = bcm63xx_spi_max_length; ++ master->max_message_size = bcm63xx_spi_max_length; + master->auto_runtime_pm = true; + bs->msg_type_shift = bs->reg_offsets[SPI_MSG_TYPE_SHIFT]; + bs->msg_ctl_width = bs->reg_offsets[SPI_MSG_CTL_WIDTH]; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-02-spi-bcm63xx-document-device-tree-bindings.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-02-spi-bcm63xx-document-device-tree-bindings.patch new file mode 100644 index 000000000..524c50e61 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-02-spi-bcm63xx-document-device-tree-bindings.patch @@ -0,0 +1,50 @@ +From 0a0c39044332a75eaf4a3c5654079df953b0d839 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 7 Sep 2015 21:00:38 +0200 +Subject: [PATCH 3/8] spi/bcm63xx: document device tree bindings + +Add documentation for the bindings of the low speed SPI controller found +on most bcm63xx SoCs. + +Signed-off-by: Jonas Gorski +--- + .../devicetree/bindings/spi/spi-bcm63xx.txt | 33 ++++++++++++++++++++++ + 1 file changed, 33 insertions(+) + create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx.txt +@@ -0,0 +1,33 @@ ++Binding for Broadcom BCM6348/BCM6358 SPI controller ++ ++Required properties: ++- compatible: must contain one of "brcm,bcm6348-spi", "brcm,bcm6358-spi". ++- reg: Base address and size of the controllers memory area. ++- interrupts: Interrupt for the SPI block. ++- clocks: phandle of the SPI clock. ++- clock-names: has to be "spi". ++- #address-cells: <1>, as required by generic SPI binding. ++- #size-cells: <0>, also as required by generic SPI binding. ++ ++Optional properties: ++- num-cs: some controllers have less than 8 cs signals. Defaults to 8 ++ if absent. ++ ++Child nodes as per the generic SPI binding. ++ ++Example: ++ ++ spi@10000800 { ++ compatible = "brcm,bcm6368-spi", "brcm,bcm6358-spi"; ++ reg = <0x10000800 0x70c>; ++ ++ interrupts = <1>; ++ ++ clocks = <&clkctl 9>; ++ clock-names = "spi"; ++ ++ num-cs = <5>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-03-spi-bcm63xx-add-support-for-probing-through-devicetr.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-03-spi-bcm63xx-add-support-for-probing-through-devicetr.patch new file mode 100644 index 000000000..97c596ae2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-03-spi-bcm63xx-add-support-for-probing-through-devicetr.patch @@ -0,0 +1,98 @@ +From 3353228a04a004ec67073871f40cf58dc4e209aa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 7 Sep 2015 21:01:38 +0200 +Subject: [PATCH 4/8] spi/bcm63xx: add support for probing through devicetree + +Add required binding support to probe through device tree. + +Use the compatible instead of the resource size for identifiying the +block type, and allow reducing the number of cs lines through OF. + +Signed-off-by: Jonas Gorski +--- + drivers/spi/spi-bcm63xx.c | 42 ++++++++++++++++++++++++++++++++++++------ + 1 file changed, 36 insertions(+), 6 deletions(-) + +--- a/drivers/spi/spi-bcm63xx.c ++++ b/drivers/spi/spi-bcm63xx.c +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + + /* BCM 6338/6348 SPI core */ + #define SPI_6348_RSET_SIZE 64 +@@ -484,21 +485,48 @@ static const struct platform_device_id b + }, + }; + ++static const struct of_device_id bcm63xx_spi_of_match[] = { ++ { .compatible = "brcm,bcm6348-spi", .data = &bcm6348_spi_reg_offsets }, ++ { .compatible = "brcm,bcm6358-spi", .data = &bcm6358_spi_reg_offsets }, ++ { }, ++}; ++ + static int bcm63xx_spi_probe(struct platform_device *pdev) + { + struct resource *r; + const unsigned long *bcm63xx_spireg; + struct device *dev = &pdev->dev; +- int irq; ++ int irq, bus_num; + struct spi_master *master; + struct clk *clk; + struct bcm63xx_spi *bs; + int ret; ++ u32 num_cs = BCM63XX_SPI_MAX_CS; + +- if (!pdev->id_entry->driver_data) +- return -EINVAL; ++ if (dev->of_node) { ++ const struct of_device_id *match; + +- bcm63xx_spireg = (const unsigned long *)pdev->id_entry->driver_data; ++ match = of_match_node(bcm63xx_spi_of_match, dev->of_node); ++ if (!match) ++ return -EINVAL; ++ bcm63xx_spireg = match->data; ++ ++ of_property_read_u32(dev->of_node, "num-cs", &num_cs); ++ if (num_cs > BCM63XX_SPI_MAX_CS) { ++ dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n", ++ num_cs); ++ num_cs = BCM63XX_SPI_MAX_CS; ++ } ++ ++ bus_num = -1; ++ } else if (pdev->id_entry->driver_data) { ++ const struct platform_device_id *match = pdev->id_entry; ++ ++ bcm63xx_spireg = (const unsigned long *)match->driver_data; ++ bus_num = BCM63XX_SPI_BUS_NUM; ++ } else { ++ return -EINVAL; ++ } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { +@@ -543,8 +571,9 @@ static int bcm63xx_spi_probe(struct plat + goto out_err; + } + +- master->bus_num = BCM63XX_SPI_BUS_NUM; +- master->num_chipselect = BCM63XX_SPI_MAX_CS; ++ master->dev.of_node = dev->of_node; ++ master->bus_num = bus_num; ++ master->num_chipselect = num_cs; + master->transfer_one_message = bcm63xx_spi_transfer_one; + master->mode_bits = MODEBITS; + master->bits_per_word_mask = SPI_BPW_MASK(8); +@@ -633,6 +662,7 @@ static struct platform_driver bcm63xx_sp + .driver = { + .name = "bcm63xx-spi", + .pm = &bcm63xx_spi_pm_ops, ++ .of_match_table = bcm63xx_spi_of_match, + }, + .id_table = bcm63xx_spi_dev_match, + .probe = bcm63xx_spi_probe, diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-04-spi-bcm63xx-hsspi-allow-providing-clock-rate-through.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-04-spi-bcm63xx-hsspi-allow-providing-clock-rate-through.patch new file mode 100644 index 000000000..30e673468 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-04-spi-bcm63xx-hsspi-allow-providing-clock-rate-through.patch @@ -0,0 +1,35 @@ +From d03f23df6ff47898d76f06b3aa5dadcfa1ec8f4f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 19 Feb 2017 23:40:22 +0100 +Subject: [PATCH 1/3] spi/bcm63xx-hsspi: allow providing clock rate through a + second clock + +Instead of requiring the hsspi clock to have a rate, allow using a second +clock for providing the Hz rate, which is probably more correct anyway. + +Signed-off-by: Jonas Gorski +--- + drivers/spi/spi-bcm63xx-hsspi.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +--- a/drivers/spi/spi-bcm63xx-hsspi.c ++++ b/drivers/spi/spi-bcm63xx-hsspi.c +@@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct pl + return PTR_ERR(clk); + + rate = clk_get_rate(clk); +- if (!rate) +- return -EINVAL; ++ if (!rate) { ++ struct clk *pll_clk = devm_clk_get(dev, "pll"); ++ ++ if (IS_ERR(pll_clk)) ++ return PTR_ERR(pll_clk); ++ ++ rate = clk_get_rate(pll_clk); ++ if (!rate) ++ return -EINVAL; ++ } + + ret = clk_prepare_enable(clk); + if (ret) diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-05-spi-bcm63xx-hsspi-document-device-tree-bindings.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-05-spi-bcm63xx-hsspi-document-device-tree-bindings.patch new file mode 100644 index 000000000..8f77f4eb2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-05-spi-bcm63xx-hsspi-document-device-tree-bindings.patch @@ -0,0 +1,51 @@ +From ff759cc25db31bbb3469abb16a0306f110c4c7fa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 10 Sep 2015 14:52:32 +0200 +Subject: [PATCH 2/3] dt-bindings: spi: document bcm63xx HS SPI devicetree + bindings + +Add documentation for the bindings of the high speed SPI controller found +on newer bcm63xx SoCs. + +Signed-off-by: Jonas Gorski +--- + .../devicetree/bindings/spi/spi-bcm63xx-hsspi.txt | 33 ++++++++++++++++++++++ + 1 file changed, 33 insertions(+) + create mode 100644 Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt +@@ -0,0 +1,33 @@ ++Binding for Broadcom BCM6328 High Speed SPI controller ++ ++Required properties: ++- compatible: must contain of "brcm,bcm6328-hsspi". ++- reg: Base address and size of the controllers memory area. ++- interrupts: Interrupt for the SPI block. ++- clocks: phandles of the SPI clock and the PLL clock. ++- clock-names: must be "hsspi", "pll". ++- #address-cells: <1>, as required by generic SPI binding. ++- #size-cells: <0>, also as required by generic SPI binding. ++ ++Optional properties: ++- num-cs: some controllers have less than 8 cs signals. Defaults to 8 ++ if absent. ++ ++Child nodes as per the generic SPI binding. ++ ++Example: ++ ++ spi@10001000 { ++ compatible = "brcm,bcm6328-hsspi"; ++ reg = <0x10001000 0x600>; ++ ++ interrupts = <29>; ++ ++ clocks = <&clkctl 9>, <&hsspi_pll>; ++ clock-names = "hsspi", "pll"; ++ ++ num-cs = <2>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-06-spi-bcm63xx-hsspi-add-support-for-probing-through-de.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-06-spi-bcm63xx-hsspi-add-support-for-probing-through-de.patch new file mode 100644 index 000000000..aaf4a59d1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-06-spi-bcm63xx-hsspi-add-support-for-probing-through-de.patch @@ -0,0 +1,76 @@ +From 776041498c2b285a7f745c924e10fc11ef720eae Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 10 Sep 2015 14:53:53 +0200 +Subject: [PATCH 3/3] spi/bcm63xx-hsspi: allow for probing through devicetree + +Add required binding support to probe through device tree. + +Signed-off-by: Jonas Gorski +--- + drivers/spi/spi-bcm63xx-hsspi.c | 23 ++++++++++++++++++++--- + 1 file changed, 20 insertions(+), 3 deletions(-) + +--- a/drivers/spi/spi-bcm63xx-hsspi.c ++++ b/drivers/spi/spi-bcm63xx-hsspi.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + #define HSSPI_GLOBAL_CTRL_REG 0x0 + #define GLOBAL_CTRL_CS_POLARITY_SHIFT 0 +@@ -91,6 +92,7 @@ + + #define HSSPI_MAX_SYNC_CLOCK 30000000 + ++#define HSSPI_SPI_MAX_CS 8 + #define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */ + + struct bcm63xx_hsspi { +@@ -332,7 +334,7 @@ static int bcm63xx_hsspi_probe(struct pl + struct device *dev = &pdev->dev; + struct clk *clk; + int irq, ret; +- u32 reg, rate; ++ u32 reg, rate, num_cs = HSSPI_SPI_MAX_CS; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { +@@ -382,8 +384,17 @@ static int bcm63xx_hsspi_probe(struct pl + mutex_init(&bs->bus_mutex); + init_completion(&bs->done); + +- master->bus_num = HSSPI_BUS_NUM; +- master->num_chipselect = 8; ++ master->dev.of_node = dev->of_node; ++ if (!dev->of_node) ++ master->bus_num = HSSPI_BUS_NUM; ++ ++ of_property_read_u32(dev->of_node, "num-cs", &num_cs); ++ if (num_cs > 8) { ++ dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n", ++ num_cs); ++ num_cs = HSSPI_SPI_MAX_CS; ++ } ++ master->num_chipselect = num_cs; + master->setup = bcm63xx_hsspi_setup; + master->transfer_one_message = bcm63xx_hsspi_transfer_one; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | +@@ -469,10 +480,16 @@ static int bcm63xx_hsspi_resume(struct d + static SIMPLE_DEV_PM_OPS(bcm63xx_hsspi_pm_ops, bcm63xx_hsspi_suspend, + bcm63xx_hsspi_resume); + ++static const struct of_device_id bcm63xx_hsspi_of_match[] = { ++ { .compatible = "brcm,bcm6328-hsspi", }, ++ { }, ++}; ++ + static struct platform_driver bcm63xx_hsspi_driver = { + .driver = { + .name = "bcm63xx-hsspi", + .pm = &bcm63xx_hsspi_pm_ops, ++ .of_match_table = bcm63xx_hsspi_of_match, + }, + .probe = bcm63xx_hsspi_probe, + .remove = bcm63xx_hsspi_remove, diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-07-mdio_bus-Issue-GPIO-RESET-to-PHYs.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-07-mdio_bus-Issue-GPIO-RESET-to-PHYs.patch new file mode 100644 index 000000000..a0d2d038c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-07-mdio_bus-Issue-GPIO-RESET-to-PHYs.patch @@ -0,0 +1,192 @@ +From 69226896ad636b94f6d2e55d75ff21a29c4de83b Mon Sep 17 00:00:00 2001 +From: Roger Quadros +Date: Fri, 21 Apr 2017 16:15:38 +0300 +Subject: [PATCH] mdio_bus: Issue GPIO RESET to PHYs. + +Some boards [1] leave the PHYs at an invalid state +during system power-up or reset thus causing unreliability +issues with the PHY which manifests as PHY not being detected +or link not functional. To fix this, these PHYs need to be RESET +via a GPIO connected to the PHY's RESET pin. + +Some boards have a single GPIO controlling the PHY RESET pin of all +PHYs on the bus whereas some others have separate GPIOs controlling +individual PHY RESETs. + +In both cases, the RESET de-assertion cannot be done in the PHY driver +as the PHY will not probe till its reset is de-asserted. +So do the RESET de-assertion in the MDIO bus driver. + +[1] - am572x-idk, am571x-idk, a437x-idk + +Signed-off-by: Roger Quadros +Signed-off-by: David S. Miller +--- + Documentation/devicetree/bindings/net/mdio.txt | 33 ++++++++++++++++++ + drivers/net/phy/mdio_bus.c | 47 ++++++++++++++++++++++++++ + drivers/of/of_mdio.c | 7 ++++ + include/linux/phy.h | 7 ++++ + 4 files changed, 94 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/mdio.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/mdio.txt +@@ -0,0 +1,33 @@ ++Common MDIO bus properties. ++ ++These are generic properties that can apply to any MDIO bus. ++ ++Optional properties: ++- reset-gpios: List of one or more GPIOs that control the RESET lines ++ of the PHYs on that MDIO bus. ++- reset-delay-us: RESET pulse width in microseconds as per PHY datasheet. ++ ++A list of child nodes, one per device on the bus is expected. These ++should follow the generic phy.txt, or a device specific binding document. ++ ++Example : ++This example shows these optional properties, plus other properties ++required for the TI Davinci MDIO driver. ++ ++ davinci_mdio: ethernet@0x5c030000 { ++ compatible = "ti,davinci_mdio"; ++ reg = <0x5c030000 0x1000>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; ++ reset-delay-us = <2>; /* PHY datasheet states 1us min */ ++ ++ ethphy0: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ ++ ethphy1: ethernet-phy@3 { ++ reg = <3>; ++ }; ++ }; +--- a/drivers/net/phy/mdio_bus.c ++++ b/drivers/net/phy/mdio_bus.c +@@ -22,8 +22,11 @@ + #include + #include + #include ++#include ++#include + #include + #include ++#include + #include + #include + #include +@@ -304,6 +307,7 @@ int __mdiobus_register(struct mii_bus *b + { + struct mdio_device *mdiodev; + int i, err; ++ struct gpio_desc *gpiod; + + if (NULL == bus || NULL == bus->name || + NULL == bus->read || NULL == bus->write) +@@ -330,6 +334,35 @@ int __mdiobus_register(struct mii_bus *b + if (bus->reset) + bus->reset(bus); + ++ /* de-assert bus level PHY GPIO resets */ ++ if (bus->num_reset_gpios > 0) { ++ bus->reset_gpiod = devm_kcalloc(&bus->dev, ++ bus->num_reset_gpios, ++ sizeof(struct gpio_desc *), ++ GFP_KERNEL); ++ if (!bus->reset_gpiod) ++ return -ENOMEM; ++ } ++ ++ for (i = 0; i < bus->num_reset_gpios; i++) { ++ gpiod = devm_gpiod_get_index(&bus->dev, "reset", i, ++ GPIOD_OUT_LOW); ++ if (IS_ERR(gpiod)) { ++ err = PTR_ERR(gpiod); ++ if (err != -ENOENT) { ++ dev_err(&bus->dev, ++ "mii_bus %s couldn't get reset GPIO\n", ++ bus->id); ++ return err; ++ } ++ } else { ++ bus->reset_gpiod[i] = gpiod; ++ gpiod_set_value_cansleep(gpiod, 1); ++ udelay(bus->reset_delay_us); ++ gpiod_set_value_cansleep(gpiod, 0); ++ } ++ } ++ + for (i = 0; i < PHY_MAX_ADDR; i++) { + if ((bus->phy_mask & (1 << i)) == 0) { + struct phy_device *phydev; +@@ -355,6 +388,13 @@ error: + mdiodev->device_remove(mdiodev); + mdiodev->device_free(mdiodev); + } ++ ++ /* Put PHYs in RESET to save power */ ++ for (i = 0; i < bus->num_reset_gpios; i++) { ++ if (bus->reset_gpiod[i]) ++ gpiod_set_value_cansleep(bus->reset_gpiod[i], 1); ++ } ++ + device_del(&bus->dev); + return err; + } +@@ -376,6 +416,13 @@ void mdiobus_unregister(struct mii_bus * + mdiodev->device_remove(mdiodev); + mdiodev->device_free(mdiodev); + } ++ ++ /* Put PHYs in RESET to save power */ ++ for (i = 0; i < bus->num_reset_gpios; i++) { ++ if (bus->reset_gpiod[i]) ++ gpiod_set_value_cansleep(bus->reset_gpiod[i], 1); ++ } ++ + device_del(&bus->dev); + } + EXPORT_SYMBOL(mdiobus_unregister); +--- a/drivers/of/of_mdio.c ++++ b/drivers/of/of_mdio.c +@@ -22,6 +22,8 @@ + #include + #include + ++#define DEFAULT_GPIO_RESET_DELAY 10 /* in microseconds */ ++ + MODULE_AUTHOR("Grant Likely "); + MODULE_LICENSE("GPL"); + +@@ -220,6 +222,11 @@ int of_mdiobus_register(struct mii_bus * + + mdio->dev.of_node = np; + ++ /* Get bus level PHY reset GPIO details */ ++ mdio->reset_delay_us = DEFAULT_GPIO_RESET_DELAY; ++ of_property_read_u32(np, "reset-delay-us", &mdio->reset_delay_us); ++ mdio->num_reset_gpios = of_gpio_named_count(np, "reset-gpios"); ++ + /* Register the MDIO bus */ + rc = mdiobus_register(mdio); + if (rc) +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -193,6 +193,13 @@ struct mii_bus { + * matching its address + */ + int irq[PHY_MAX_ADDR]; ++ ++ /* GPIO reset pulse width in microseconds */ ++ int reset_delay_us; ++ /* Number of reset GPIOs */ ++ int num_reset_gpios; ++ /* Array of RESET GPIO descriptors */ ++ struct gpio_desc **reset_gpiod; + }; + #define to_mii_bus(d) container_of(d, struct mii_bus, dev) + diff --git a/target/linux/brcm63xx/patches-4.9/001-4.12-08-net-phy-Call-bus-reset-after-releasing-PHYs-from-res.patch b/target/linux/brcm63xx/patches-4.9/001-4.12-08-net-phy-Call-bus-reset-after-releasing-PHYs-from-res.patch new file mode 100644 index 000000000..c6eb74a11 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.12-08-net-phy-Call-bus-reset-after-releasing-PHYs-from-res.patch @@ -0,0 +1,43 @@ +From df0c8d911abf6ba97b2c2fc3c5a12769e0b081a3 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Thu, 11 May 2017 11:24:16 -0700 +Subject: [PATCH] net: phy: Call bus->reset() after releasing PHYs from reset + +The API convention makes it that a given MDIO bus reset should be able +to access PHY devices in its reset() callback and perform additional +MDIO accesses in order to bring the bus and PHYs in a working state. + +Commit 69226896ad63 ("mdio_bus: Issue GPIO RESET to PHYs.") broke that +contract by first calling bus->reset() and then release all PHYs from +reset using their shared GPIO line, so restore the expected +functionality here. + +Fixes: 69226896ad63 ("mdio_bus: Issue GPIO RESET to PHYs.") +Signed-off-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/mdio_bus.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/net/phy/mdio_bus.c ++++ b/drivers/net/phy/mdio_bus.c +@@ -331,9 +331,6 @@ int __mdiobus_register(struct mii_bus *b + + mutex_init(&bus->mdio_lock); + +- if (bus->reset) +- bus->reset(bus); +- + /* de-assert bus level PHY GPIO resets */ + if (bus->num_reset_gpios > 0) { + bus->reset_gpiod = devm_kcalloc(&bus->dev, +@@ -363,6 +360,9 @@ int __mdiobus_register(struct mii_bus *b + } + } + ++ if (bus->reset) ++ bus->reset(bus); ++ + for (i = 0; i < PHY_MAX_ADDR; i++) { + if ((bus->phy_mask & (1 << i)) == 0) { + struct phy_device *phydev; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.13-01-leds-bcm6328-fix-signal-source-assignment-for-high-l.patch b/target/linux/brcm63xx/patches-4.9/001-4.13-01-leds-bcm6328-fix-signal-source-assignment-for-high-l.patch new file mode 100644 index 000000000..5280baff2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.13-01-leds-bcm6328-fix-signal-source-assignment-for-high-l.patch @@ -0,0 +1,34 @@ +From dc90895d776d7b8017bc3b14f588d569d8edbe1f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 11 May 2017 13:36:52 +0200 +Subject: [PATCH] leds: bcm6328: fix signal source assignment for high leds + +Each nibble represents 4 LEDs, and in case of the higher register, bit 0 +represents LED 4, so we need to use modulus for the LED number as well. + +Fixes: fd7b025a238d0a5440bfa26c585eb78097bf48dc ("leds: add BCM6328 LED driver") +Signed-off-by: Jonas Gorski +--- + drivers/leds/leds-bcm6328.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/leds/leds-bcm6328.c ++++ b/drivers/leds/leds-bcm6328.c +@@ -242,7 +242,7 @@ static int bcm6328_hwled(struct device * + + spin_lock_irqsave(lock, flags); + val = bcm6328_led_read(addr); +- val |= (BIT(reg) << (((sel % 4) * 4) + 16)); ++ val |= (BIT(reg % 4) << (((sel % 4) * 4) + 16)); + bcm6328_led_write(addr, val); + spin_unlock_irqrestore(lock, flags); + } +@@ -269,7 +269,7 @@ static int bcm6328_hwled(struct device * + + spin_lock_irqsave(lock, flags); + val = bcm6328_led_read(addr); +- val |= (BIT(reg) << ((sel % 4) * 4)); ++ val |= (BIT(reg % 4) << ((sel % 4) * 4)); + bcm6328_led_write(addr, val); + spin_unlock_irqrestore(lock, flags); + } diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch new file mode 100644 index 000000000..59e9933e5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-01-MIPS-BCM63XX-add-clkdev-lookup-support.patch @@ -0,0 +1,210 @@ +From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:23:47 +0200 +Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support + +Enable clkdev lookup support to allow us providing clocks under +different names to devices more easily, so we don't need to care +about clock name clashes anymore. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/Kconfig | 1 + + arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++----------- + 2 files changed, 116 insertions(+), 35 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -271,6 +271,7 @@ config BCM63XX + select GPIOLIB + select HAVE_CLK + select MIPS_L1_CACHE_SHIFT_4 ++ select CLKDEV_LOOKUP + help + Support for BCM63XX based boards + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -355,44 +356,103 @@ long clk_round_rate(struct clk *clk, uns + } + EXPORT_SYMBOL_GPL(clk_round_rate); + +-struct clk *clk_get(struct device *dev, const char *id) +-{ +- if (!strcmp(id, "enet0")) +- return &clk_enet0; +- if (!strcmp(id, "enet1")) +- return &clk_enet1; +- if (!strcmp(id, "enetsw")) +- return &clk_enetsw; +- if (!strcmp(id, "ephy")) +- return &clk_ephy; +- if (!strcmp(id, "usbh")) +- return &clk_usbh; +- if (!strcmp(id, "usbd")) +- return &clk_usbd; +- if (!strcmp(id, "spi")) +- return &clk_spi; +- if (!strcmp(id, "hsspi")) +- return &clk_hsspi; +- if (!strcmp(id, "xtm")) +- return &clk_xtm; +- if (!strcmp(id, "periph")) +- return &clk_periph; +- if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm")) +- return &clk_pcm; +- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec")) +- return &clk_ipsec; +- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie")) +- return &clk_pcie; +- return ERR_PTR(-ENOENT); +-} +- +-EXPORT_SYMBOL(clk_get); +- +-void clk_put(struct clk *clk) +-{ +-} +- +-EXPORT_SYMBOL(clk_put); ++static struct clk_lookup bcm3368_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++}; ++ ++static struct clk_lookup bcm6328_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++}; ++ ++static struct clk_lookup bcm6338_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++}; ++ ++static struct clk_lookup bcm6345_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++}; ++ ++static struct clk_lookup bcm6348_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++}; ++ ++static struct clk_lookup bcm6358_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enet0", &clk_enet0), ++ CLKDEV_INIT(NULL, "enet1", &clk_enet1), ++ CLKDEV_INIT(NULL, "ephy", &clk_ephy), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++}; ++ ++static struct clk_lookup bcm6362_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), ++}; ++ ++static struct clk_lookup bcm6368_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "xtm", &clk_xtm), ++ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), ++}; + + #define HSSPI_PLL_HZ_6328 133333333 + #define HSSPI_PLL_HZ_6362 400000000 +@@ -400,11 +460,31 @@ EXPORT_SYMBOL(clk_put); + static int __init bcm63xx_clk_init(void) + { + switch (bcm63xx_get_cpu_id()) { ++ case BCM3368_CPU_ID: ++ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); ++ break; + case BCM6328_CPU_ID: + clk_hsspi.rate = HSSPI_PLL_HZ_6328; ++ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); ++ break; ++ case BCM6338_CPU_ID: ++ clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks)); ++ break; ++ case BCM6345_CPU_ID: ++ clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks)); ++ break; ++ case BCM6348_CPU_ID: ++ clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks)); ++ break; ++ case BCM6358_CPU_ID: ++ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); + break; + case BCM6362_CPU_ID: + clk_hsspi.rate = HSSPI_PLL_HZ_6362; ++ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); ++ break; ++ case BCM6368_CPU_ID: ++ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks)); + break; + } + diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch new file mode 100644 index 000000000..5d4298d89 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-02-MIPS-BCM63XX-provide-periph-clock-as-refclk-for-uart.patch @@ -0,0 +1,84 @@ +From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:31:44 +0200 +Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart + +Add a lookup as "refclk" to describe its function for the uarts. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -359,6 +359,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate); + static struct clk_lookup bcm3368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -372,6 +374,8 @@ static struct clk_lookup bcm3368_clks[] + static struct clk_lookup bcm6328_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -383,6 +387,7 @@ static struct clk_lookup bcm6328_clks[] + static struct clk_lookup bcm6338_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -395,6 +400,7 @@ static struct clk_lookup bcm6338_clks[] + static struct clk_lookup bcm6345_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -407,6 +413,7 @@ static struct clk_lookup bcm6345_clks[] + static struct clk_lookup bcm6348_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -419,6 +426,8 @@ static struct clk_lookup bcm6348_clks[] + static struct clk_lookup bcm6358_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -432,6 +441,8 @@ static struct clk_lookup bcm6358_clks[] + static struct clk_lookup bcm6362_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -445,6 +456,8 @@ static struct clk_lookup bcm6362_clks[] + static struct clk_lookup bcm6368_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch new file mode 100644 index 000000000..5152fbe24 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-03-tty-bcm63xx_uart-use-refclk-for-the-expected-clock-n.patch @@ -0,0 +1,26 @@ +From 8124706e6040b1cf0d2dd3a05759df6cec4bddfb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:32:37 +0200 +Subject: [PATCH V2 3/8] tty/bcm63xx_uart: use refclk for the expected clock + name + +We now have the clock available under refclk, so use that. + +Acked-by: Greg Kroah-Hartman +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + drivers/tty/serial/bcm63xx_uart.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/tty/serial/bcm63xx_uart.c ++++ b/drivers/tty/serial/bcm63xx_uart.c +@@ -842,7 +842,7 @@ static int bcm_uart_probe(struct platfor + return -ENODEV; + + clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : +- clk_get(&pdev->dev, "periph"); ++ clk_get(&pdev->dev, "refclk"); + if (IS_ERR(clk)) + return -ENODEV; + diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch new file mode 100644 index 000000000..a8fd5afcb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-04-tty-bcm63xx_uart-allow-naming-clock-in-device-tree.patch @@ -0,0 +1,55 @@ +From 317f8659bba01b307cbe4e9902d4e3d333fd7164 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:39:17 +0200 +Subject: [PATCH V2 4/8] tty/bcm63xx_uart: allow naming clock in device tree + +Codify using a named clock for the refclk of the uart. This makes it +easier if we might need to add a gating clock (like present on the +BCM6345). + +Acked-by: Rob Herring +Acked-by: Greg Kroah-Hartman +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt | 6 ++++++ + drivers/tty/serial/bcm63xx_uart.c | 6 ++++-- + 2 files changed, 10 insertions(+), 2 deletions(-) + +--- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt ++++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt +@@ -11,6 +11,11 @@ Required properties: + - clocks: Clock driving the hardware; used to figure out the baud rate + divisor. + ++ ++Optional properties: ++ ++- clock-names: Should be "refclk". ++ + Example: + + uart0: serial@14e00520 { +@@ -19,6 +24,7 @@ Example: + interrupt-parent = <&periph_intc>; + interrupts = <2>; + clocks = <&periph_clk>; ++ clock-names = "refclk"; + }; + + clocks { +--- a/drivers/tty/serial/bcm63xx_uart.c ++++ b/drivers/tty/serial/bcm63xx_uart.c +@@ -841,8 +841,10 @@ static int bcm_uart_probe(struct platfor + if (!res_irq) + return -ENODEV; + +- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) : +- clk_get(&pdev->dev, "refclk"); ++ clk = clk_get(&pdev->dev, "refclk"); ++ if (IS_ERR(clk) && pdev->dev.of_node) ++ clk = of_clk_get(pdev->dev.of_node, 0); ++ + if (IS_ERR(clk)) + return -ENODEV; + diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch new file mode 100644 index 000000000..2f6951bc6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-05-MIPS-BCM63XX-move-the-HSSPI-PLL-HZ-into-its-own-cloc.patch @@ -0,0 +1,62 @@ +From cb86630379c8f3432c916d62045b5176f17f4123 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:57:21 +0200 +Subject: [PATCH V2 6/8] MIPS: BCM63XX: move the HSSPI PLL HZ into its own + clock + +Split up the HSSPL clock into rate and a gate clock, to more closely +match the actual hardware. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -247,6 +247,10 @@ static struct clk clk_hsspi = { + .set = hsspi_set, + }; + ++/* ++ * HSSPI PLL ++ */ ++static struct clk clk_hsspi_pll; + + /* + * XTM clock +@@ -376,6 +380,7 @@ static struct clk_lookup bcm6328_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -443,6 +448,7 @@ static struct clk_lookup bcm6362_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -477,7 +483,7 @@ static int __init bcm63xx_clk_init(void) + clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); + break; + case BCM6328_CPU_ID: +- clk_hsspi.rate = HSSPI_PLL_HZ_6328; ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; + clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); + break; + case BCM6338_CPU_ID: +@@ -493,7 +499,7 @@ static int __init bcm63xx_clk_init(void) + clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks)); + break; + case BCM6362_CPU_ID: +- clk_hsspi.rate = HSSPI_PLL_HZ_6362; ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; + clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks)); + break; + case BCM6368_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch new file mode 100644 index 000000000..d631013f1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-06-MIPS-BCM63XX-provide-enet-clocks-as-enet-to-the-ethe.patch @@ -0,0 +1,60 @@ +From 6d43970a2eb1c7ee88caf7328d201f9c001262e9 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:48:41 +0200 +Subject: [PATCH V2 7/8] MIPS: BCM63XX: provide enet clocks as "enet" to the + ethernet devices + +Add lookups to provide the appropriate enetX clocks as just "enet" to +the ethernet devices. + +Reviewed-by: Florian Fainelli +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -373,6 +373,8 @@ static struct clk_lookup bcm3368_clks[] + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), ++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; + + static struct clk_lookup bcm6328_clks[] = { +@@ -400,6 +402,7 @@ static struct clk_lookup bcm6338_clks[] + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), + }; + + static struct clk_lookup bcm6345_clks[] = { +@@ -413,6 +416,7 @@ static struct clk_lookup bcm6345_clks[] + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), + }; + + static struct clk_lookup bcm6348_clks[] = { +@@ -426,6 +430,8 @@ static struct clk_lookup bcm6348_clks[] + CLKDEV_INIT(NULL, "usbh", &clk_usbh), + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc), ++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc), + }; + + static struct clk_lookup bcm6358_clks[] = { +@@ -441,6 +447,8 @@ static struct clk_lookup bcm6358_clks[] + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), ++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; + + static struct clk_lookup bcm6362_clks[] = { diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch new file mode 100644 index 000000000..f9698c250 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-07-MIPS-BCM63XX-split-out-swpkt_sar-usb-clocks.patch @@ -0,0 +1,105 @@ +From b98027285bd1fa95da0645a4234a5fc1f1a83f92 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 26 Feb 2017 11:59:52 +0100 +Subject: [PATCH V2 8/8] MIPS: BCM63XX: split out swpkt_sar/usb clocks + +Make the secondary switch clocks their own clocks. This allows proper +enable reference counting between SAR/XTM and the main switch clocks, +and controlling them individually from drivers. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++-------- + 1 file changed, 51 insertions(+), 10 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -121,21 +121,56 @@ static struct clk clk_ephy = { + }; + + /* ++ * Ethernet switch SAR clock ++ */ ++static void swpkt_sar_set(struct clk *clk, int enable) ++{ ++ if (BCMCPU_IS_6368()) ++ bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable); ++ else ++ return; ++} ++ ++static struct clk clk_swpkt_sar = { ++ .set = swpkt_sar_set, ++}; ++ ++/* ++ * Ethernet switch USB clock ++ */ ++static void swpkt_usb_set(struct clk *clk, int enable) ++{ ++ if (BCMCPU_IS_6368()) ++ bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable); ++ else ++ return; ++} ++ ++static struct clk clk_swpkt_usb = { ++ .set = swpkt_usb_set, ++}; ++ ++/* + * Ethernet switch clock + */ + static void enetsw_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); +- else if (BCMCPU_IS_6362()) ++ } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); +- else if (BCMCPU_IS_6368()) +- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN | +- CKCTL_6368_SWPKT_USB_EN | +- CKCTL_6368_SWPKT_SAR_EN, +- enable); +- else ++ } else if (BCMCPU_IS_6368()) { ++ if (enable) { ++ clk_enable_unlocked(&clk_swpkt_sar); ++ clk_enable_unlocked(&clk_swpkt_usb); ++ } else { ++ clk_disable_unlocked(&clk_swpkt_usb); ++ clk_disable_unlocked(&clk_swpkt_sar); ++ } ++ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable); ++ } else { + return; ++ } + + if (enable) { + /* reset switch core afer clock change */ +@@ -260,8 +295,12 @@ static void xtm_set(struct clk *clk, int + if (!BCMCPU_IS_6368()) + return; + +- bcm_hwclock_set(CKCTL_6368_SAR_EN | +- CKCTL_6368_SWPKT_SAR_EN, enable); ++ if (enable) ++ clk_enable_unlocked(&clk_swpkt_sar); ++ else ++ clk_disable_unlocked(&clk_swpkt_sar); ++ ++ bcm_hwclock_set(CKCTL_6368_SAR_EN, enable); + + if (enable) { + /* reset sar core afer clock change */ +@@ -447,6 +486,8 @@ static struct clk_lookup bcm6358_clks[] + CLKDEV_INIT(NULL, "usbd", &clk_usbd), + CLKDEV_INIT(NULL, "spi", &clk_spi), + CLKDEV_INIT(NULL, "pcm", &clk_pcm), ++ CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar), ++ CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb), + CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0), + CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch new file mode 100644 index 000000000..d1d851678 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-08-bcm63xx_enet-correct-clock-usage.patch @@ -0,0 +1,101 @@ +From d0423d3e4fa7ae305729cb50369427f075ccb279 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 25 Feb 2017 12:41:28 +0100 +Subject: [PATCH 1/6] bcm63xx_enet: correct clock usage + +Check the return code of prepare_enable and change one last instance of +enable only to prepare_enable. Also properly disable and release the +clock in error paths and on remove for enetsw. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 31 +++++++++++++++++++++------- + 1 file changed, 23 insertions(+), 8 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1790,7 +1790,9 @@ static int bcm_enet_probe(struct platfor + ret = PTR_ERR(priv->mac_clk); + goto out; + } +- clk_prepare_enable(priv->mac_clk); ++ ret = clk_prepare_enable(priv->mac_clk); ++ if (ret) ++ goto out_put_clk_mac; + + /* initialize default and fetch platform data */ + priv->rx_ring_size = BCMENET_DEF_RX_DESC; +@@ -1822,9 +1824,11 @@ static int bcm_enet_probe(struct platfor + if (IS_ERR(priv->phy_clk)) { + ret = PTR_ERR(priv->phy_clk); + priv->phy_clk = NULL; +- goto out_put_clk_mac; ++ goto out_disable_clk_mac; + } +- clk_prepare_enable(priv->phy_clk); ++ ret = clk_prepare_enable(priv->phy_clk); ++ if (ret) ++ goto out_put_clk_phy; + } + + /* do minimal hardware init to be able to probe mii bus */ +@@ -1915,13 +1919,16 @@ out_free_mdio: + out_uninit_hw: + /* turn off mdc clock */ + enet_writel(priv, 0, ENET_MIISC_REG); +- if (priv->phy_clk) { ++ if (priv->phy_clk) + clk_disable_unprepare(priv->phy_clk); ++ ++out_put_clk_phy: ++ if (priv->phy_clk) + clk_put(priv->phy_clk); +- } + +-out_put_clk_mac: ++out_disable_clk_mac: + clk_disable_unprepare(priv->mac_clk); ++out_put_clk_mac: + clk_put(priv->mac_clk); + out: + free_netdev(dev); +@@ -2766,7 +2773,9 @@ static int bcm_enetsw_probe(struct platf + ret = PTR_ERR(priv->mac_clk); + goto out_unmap; + } +- clk_enable(priv->mac_clk); ++ ret = clk_prepare_enable(priv->mac_clk); ++ if (ret) ++ goto out_put_clk; + + priv->rx_chan = 0; + priv->tx_chan = 1; +@@ -2787,7 +2796,7 @@ static int bcm_enetsw_probe(struct platf + + ret = register_netdev(dev); + if (ret) +- goto out_put_clk; ++ goto out_disable_clk; + + netif_carrier_off(dev); + platform_set_drvdata(pdev, dev); +@@ -2796,6 +2805,9 @@ static int bcm_enetsw_probe(struct platf + + return 0; + ++out_disable_clk: ++ clk_disable_unprepare(priv->mac_clk); ++ + out_put_clk: + clk_put(priv->mac_clk); + +@@ -2827,6 +2839,9 @@ static int bcm_enetsw_remove(struct plat + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + release_mem_region(res->start, resource_size(res)); + ++ clk_disable_unprepare(priv->mac_clk); ++ clk_put(priv->mac_clk); ++ + free_netdev(dev); + return 0; + } diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch new file mode 100644 index 000000000..22c6d0187 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-09-bcm63xx_enet-do-not-write-to-random-DMA-channel-on-B.patch @@ -0,0 +1,29 @@ +From 23d94cb855b6f4f0ee1c01679224472104ac6440 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 30 Sep 2017 14:10:18 +0200 +Subject: [PATCH 2/6] bcm63xx_enet: do not write to random DMA channel on + BCM6345 + +The DMA controller regs actually point to DMA channel 0, so the write to +ENETDMA_CFG_REG will actually modify a random DMA channel. + +Since DMA controller registers do not exist on BCM6345, guard the write +with the usual check for dma_has_sram. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1063,7 +1063,8 @@ static int bcm_enet_open(struct net_devi + val = enet_readl(priv, ENET_CTL_REG); + val |= ENET_CTL_ENABLE_MASK; + enet_writel(priv, val, ENET_CTL_REG); +- enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); ++ if (priv->dma_has_sram) ++ enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); + enet_dmac_writel(priv, priv->dma_chan_en_mask, + ENETDMAC_CHANCFG, priv->rx_chan); + diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch new file mode 100644 index 000000000..e13b32e0f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-10-bcm63xx_enet-do-not-rely-on-probe-order.patch @@ -0,0 +1,41 @@ +From 71710bb6cbc82f411a4e5faafa0c3178e48e7137 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 30 May 2017 13:31:45 +0200 +Subject: [PATCH 3/6] bcm63xx_enet: do not rely on probe order + +Do not rely on the shared device being probed before the enet(sw) +devices. This makes it easier to eventually move out the shared +device as a dma controller driver (what it should be). + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 9 ++------- + 1 file changed, 2 insertions(+), 7 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1739,10 +1739,8 @@ static int bcm_enet_probe(struct platfor + const char *clk_name; + int i, ret; + +- /* stop if shared driver failed, assume driver->probe will be +- * called in the same order we register devices (correct ?) */ + if (!bcm_enet_shared_base[0]) +- return -ENODEV; ++ return -EPROBE_DEFER; + + res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1); +@@ -2714,11 +2712,8 @@ static int bcm_enetsw_probe(struct platf + struct resource *res_mem; + int ret, irq_rx, irq_tx; + +- /* stop if shared driver failed, assume driver->probe will be +- * called in the same order we register devices (correct ?) +- */ + if (!bcm_enet_shared_base[0]) +- return -ENODEV; ++ return -EPROBE_DEFER; + + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + irq_rx = platform_get_irq(pdev, 0); diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch new file mode 100644 index 000000000..7d7d18b06 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-11-bcm63xx_enet-use-managed-functions-for-clock-ioremap.patch @@ -0,0 +1,150 @@ +From 179a445ae4ef36ec44f4aea18e5f42d21334d186 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 25 Feb 2017 12:39:25 +0100 +Subject: [PATCH 4/6] bcm63xx_enet: use managed functions for clock/ioremap + +Use managed functions where possible to reduce the amount of resource +handling on error and remove paths. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 54 +++++++--------------------- + 1 file changed, 12 insertions(+), 42 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1784,14 +1784,14 @@ static int bcm_enet_probe(struct platfor + clk_name = "enet1"; + } + +- priv->mac_clk = clk_get(&pdev->dev, clk_name); ++ priv->mac_clk = devm_clk_get(&pdev->dev, clk_name); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); + goto out; + } + ret = clk_prepare_enable(priv->mac_clk); + if (ret) +- goto out_put_clk_mac; ++ goto out; + + /* initialize default and fetch platform data */ + priv->rx_ring_size = BCMENET_DEF_RX_DESC; +@@ -1819,7 +1819,7 @@ static int bcm_enet_probe(struct platfor + + if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { + /* using internal PHY, enable clock */ +- priv->phy_clk = clk_get(&pdev->dev, "ephy"); ++ priv->phy_clk = devm_clk_get(&pdev->dev, "ephy"); + if (IS_ERR(priv->phy_clk)) { + ret = PTR_ERR(priv->phy_clk); + priv->phy_clk = NULL; +@@ -1827,7 +1827,7 @@ static int bcm_enet_probe(struct platfor + } + ret = clk_prepare_enable(priv->phy_clk); + if (ret) +- goto out_put_clk_phy; ++ goto out_disable_clk_mac; + } + + /* do minimal hardware init to be able to probe mii bus */ +@@ -1921,14 +1921,8 @@ out_uninit_hw: + if (priv->phy_clk) + clk_disable_unprepare(priv->phy_clk); + +-out_put_clk_phy: +- if (priv->phy_clk) +- clk_put(priv->phy_clk); +- + out_disable_clk_mac: + clk_disable_unprepare(priv->mac_clk); +-out_put_clk_mac: +- clk_put(priv->mac_clk); + out: + free_netdev(dev); + return ret; +@@ -1964,12 +1958,10 @@ static int bcm_enet_remove(struct platfo + } + + /* disable hw block clocks */ +- if (priv->phy_clk) { ++ if (priv->phy_clk) + clk_disable_unprepare(priv->phy_clk); +- clk_put(priv->phy_clk); +- } ++ + clk_disable_unprepare(priv->mac_clk); +- clk_put(priv->mac_clk); + + free_netdev(dev); + return 0; +@@ -2752,26 +2744,20 @@ static int bcm_enetsw_probe(struct platf + if (ret) + goto out; + +- if (!request_mem_region(res_mem->start, resource_size(res_mem), +- "bcm63xx_enetsw")) { +- ret = -EBUSY; ++ priv->base = devm_ioremap_resource(&pdev->dev, res_mem); ++ if (IS_ERR(priv->base)) { ++ ret = PTR_ERR(priv->base); + goto out; + } + +- priv->base = ioremap(res_mem->start, resource_size(res_mem)); +- if (priv->base == NULL) { +- ret = -ENOMEM; +- goto out_release_mem; +- } +- +- priv->mac_clk = clk_get(&pdev->dev, "enetsw"); ++ priv->mac_clk = devm_clk_get(&pdev->dev, "enetsw"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); +- goto out_unmap; ++ goto out; + } + ret = clk_prepare_enable(priv->mac_clk); + if (ret) +- goto out_put_clk; ++ goto out; + + priv->rx_chan = 0; + priv->tx_chan = 1; +@@ -2803,15 +2789,6 @@ static int bcm_enetsw_probe(struct platf + + out_disable_clk: + clk_disable_unprepare(priv->mac_clk); +- +-out_put_clk: +- clk_put(priv->mac_clk); +- +-out_unmap: +- iounmap(priv->base); +- +-out_release_mem: +- release_mem_region(res_mem->start, resource_size(res_mem)); + out: + free_netdev(dev); + return ret; +@@ -2823,20 +2800,13 @@ static int bcm_enetsw_remove(struct plat + { + struct bcm_enet_priv *priv; + struct net_device *dev; +- struct resource *res; + + /* stop netdevice */ + dev = platform_get_drvdata(pdev); + priv = netdev_priv(dev); + unregister_netdev(dev); + +- /* release device resources */ +- iounmap(priv->base); +- res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- release_mem_region(res->start, resource_size(res)); +- + clk_disable_unprepare(priv->mac_clk); +- clk_put(priv->mac_clk); + + free_netdev(dev); + return 0; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch new file mode 100644 index 000000000..b81a94c8a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-12-bcm63xx_enet-drop-unneeded-NULL-phy_clk-check.patch @@ -0,0 +1,36 @@ +From 555baec974ede81e616ca88ac6d3fca09239368f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 18 Jul 2017 13:18:01 +0200 +Subject: [PATCH 5/6] bcm63xx_enet: drop unneeded NULL phy_clk check + +clk_disable and clk_unprepare are NULL-safe, so need to duplicate the +NULL check of the functions. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1918,8 +1918,7 @@ out_free_mdio: + out_uninit_hw: + /* turn off mdc clock */ + enet_writel(priv, 0, ENET_MIISC_REG); +- if (priv->phy_clk) +- clk_disable_unprepare(priv->phy_clk); ++ clk_disable_unprepare(priv->phy_clk); + + out_disable_clk_mac: + clk_disable_unprepare(priv->mac_clk); +@@ -1958,9 +1957,7 @@ static int bcm_enet_remove(struct platfo + } + + /* disable hw block clocks */ +- if (priv->phy_clk) +- clk_disable_unprepare(priv->phy_clk); +- ++ clk_disable_unprepare(priv->phy_clk); + clk_disable_unprepare(priv->mac_clk); + + free_netdev(dev); diff --git a/target/linux/brcm63xx/patches-4.9/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch b/target/linux/brcm63xx/patches-4.9/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch new file mode 100644 index 000000000..482bd5892 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.15-13-bcm63xx_enet-remove-unneeded-include.patch @@ -0,0 +1,22 @@ +From 77364ce98037972fb1c57d0ee0418eb1c2b26521 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 29 May 2017 13:11:14 +0200 +Subject: [PATCH 6/6] bcm63xx_enet: remove unneeded include + +We don't use anyhing from that file, so drop it. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.h | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -8,7 +8,6 @@ + #include + + #include +-#include + #include + #include + diff --git a/target/linux/brcm63xx/patches-4.9/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch b/target/linux/brcm63xx/patches-4.9/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch new file mode 100644 index 000000000..d453153d4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.16-01-bcm63xx_enet-just-use-enet-as-the-clock-name.patch @@ -0,0 +1,39 @@ +From 943b0832e0cf3afe5bd40ffb1885d06106122c5d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 16 Jul 2017 12:49:49 +0200 +Subject: [PATCH 1/4] bcm63xx_enet: just use "enet" as the clock name + +Now that we have the individual clocks available as "enet" we +don't need to rely on the device id for them anymore. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1736,7 +1736,6 @@ static int bcm_enet_probe(struct platfor + struct bcm63xx_enet_platform_data *pd; + struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx; + struct mii_bus *bus; +- const char *clk_name; + int i, ret; + + if (!bcm_enet_shared_base[0]) +@@ -1777,14 +1776,12 @@ static int bcm_enet_probe(struct platfor + if (priv->mac_id == 0) { + priv->rx_chan = 0; + priv->tx_chan = 1; +- clk_name = "enet0"; + } else { + priv->rx_chan = 2; + priv->tx_chan = 3; +- clk_name = "enet1"; + } + +- priv->mac_clk = devm_clk_get(&pdev->dev, clk_name); ++ priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); + goto out; diff --git a/target/linux/brcm63xx/patches-4.9/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch b/target/linux/brcm63xx/patches-4.9/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch new file mode 100644 index 000000000..d858b81f4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.16-02-bcm63xx_enet-use-platform-data-for-dma-channel-numbe.patch @@ -0,0 +1,72 @@ +From b7d1d1f345bb3b25c360c1df812d98866e2ee7fb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 30 Sep 2017 13:50:03 +0200 +Subject: [PATCH 2/4] bcm63xx_enet: use platform data for dma channel numbers + +To reduce the reliance on device ids, pass the dma channel numbers to +the enet devices as platform data. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-enet.c | 8 ++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 4 ++++ + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 11 ++--------- + 3 files changed, 14 insertions(+), 9 deletions(-) + +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -265,6 +265,14 @@ int __init bcm63xx_enet_register(int uni + dpd->dma_chan_width = ENETDMA_CHAN_WIDTH; + } + ++ if (unit == 0) { ++ dpd->rx_chan = 0; ++ dpd->tx_chan = 1; ++ } else { ++ dpd->rx_chan = 2; ++ dpd->tx_chan = 3; ++ } ++ + ret = platform_device_register(pdev); + if (ret) + return ret; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h +@@ -54,6 +54,10 @@ struct bcm63xx_enet_platform_data { + + /* DMA descriptor shift */ + unsigned int dma_desc_shift; ++ ++ /* dma channel ids */ ++ int rx_chan; ++ int tx_chan; + }; + + /* +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1772,15 +1772,6 @@ static int bcm_enet_probe(struct platfor + priv->irq_tx = res_irq_tx->start; + priv->mac_id = pdev->id; + +- /* get rx & tx dma channel id for this mac */ +- if (priv->mac_id == 0) { +- priv->rx_chan = 0; +- priv->tx_chan = 1; +- } else { +- priv->rx_chan = 2; +- priv->tx_chan = 3; +- } +- + priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { + ret = PTR_ERR(priv->mac_clk); +@@ -1812,6 +1803,8 @@ static int bcm_enet_probe(struct platfor + priv->dma_chan_width = pd->dma_chan_width; + priv->dma_has_sram = pd->dma_has_sram; + priv->dma_desc_shift = pd->dma_desc_shift; ++ priv->rx_chan = pd->rx_chan; ++ priv->tx_chan = pd->tx_chan; + } + + if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { diff --git a/target/linux/brcm63xx/patches-4.9/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch b/target/linux/brcm63xx/patches-4.9/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch new file mode 100644 index 000000000..85f2ca231 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.16-03-bcm63xx_enet-remove-pointless-mac_id-check.patch @@ -0,0 +1,25 @@ +From 8c61608e5dd2e15575c171ee9cd558ddc3b94962 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 17 Dec 2017 12:54:30 +0100 +Subject: [PATCH 3/4] bcm63xx_enet: remove pointless mac_id check + +Enabling the ephy clock for mac 1 is harmless, and the actual usage of +the ephy is not restricted to mac 0, so we might as well remove the +check. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1807,7 +1807,7 @@ static int bcm_enet_probe(struct platfor + priv->tx_chan = pd->tx_chan; + } + +- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { ++ if (priv->has_phy && !priv->use_external_mii) { + /* using internal PHY, enable clock */ + priv->phy_clk = devm_clk_get(&pdev->dev, "ephy"); + if (IS_ERR(priv->phy_clk)) { diff --git a/target/linux/brcm63xx/patches-4.9/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch b/target/linux/brcm63xx/patches-4.9/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch new file mode 100644 index 000000000..f6b7d7dcf --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/001-4.16-04-bcm63xx_enet-use-platform-device-id-directly-for-mii.patch @@ -0,0 +1,46 @@ +From faea89cd893a1a7af81185f026a64dad603ef72f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 17 Dec 2017 12:58:12 +0100 +Subject: [PATCH 4/4] bcm63xx_enet: use platform device id directly for miibus + name + +Directly use the platform device for generating the miibus name. This removes +the last user of bcm_enet_priv::mac_id and we can remove the field. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 +-- + drivers/net/ethernet/broadcom/bcm63xx_enet.h | 3 --- + 2 files changed, 1 insertion(+), 5 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1770,7 +1770,6 @@ static int bcm_enet_probe(struct platfor + dev->irq = priv->irq = res_irq->start; + priv->irq_rx = res_irq_rx->start; + priv->irq_tx = res_irq_tx->start; +- priv->mac_id = pdev->id; + + priv->mac_clk = devm_clk_get(&pdev->dev, "enet"); + if (IS_ERR(priv->mac_clk)) { +@@ -1838,7 +1837,7 @@ static int bcm_enet_probe(struct platfor + bus->priv = priv; + bus->read = bcm_enet_mdio_read_phylib; + bus->write = bcm_enet_mdio_write_phylib; +- sprintf(bus->id, "%s-%d", pdev->name, priv->mac_id); ++ sprintf(bus->id, "%s-%d", pdev->name, pdev->id); + + /* only probe bus where we think the PHY is, because + * the mdio read operation return 0 instead of 0xffff +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -192,9 +192,6 @@ struct bcm_enet_mib_counters { + + struct bcm_enet_priv { + +- /* mac id (from platform device id) */ +- int mac_id; +- + /* base remapped address of device */ + void __iomem *base; + diff --git a/target/linux/brcm63xx/patches-4.9/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch b/target/linux/brcm63xx/patches-4.9/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch new file mode 100644 index 000000000..67c5ef450 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch @@ -0,0 +1,28 @@ +From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:19 +0100 +Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay + +Knowledge of the clock setup delay should remain at the clock level (so +it can be clock specific and CPU specific). Add the 100 milliseconds +required clock delay for the USB host clock when it gets enabled. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/clk.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -213,6 +213,11 @@ static void usbh_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); ++ else ++ return; ++ ++ if (enable) ++ msleep(100); + } + + static struct clk clk_usbh = { diff --git a/target/linux/brcm63xx/patches-4.9/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch b/target/linux/brcm63xx/patches-4.9/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch new file mode 100644 index 000000000..1c6fa7c03 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch @@ -0,0 +1,41 @@ +From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:20 +0100 +Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to + clock code + +This patch adds the required 10 micro seconds delay to the USB device +clock enable operation. Put this where the correct clock knowledege is, +which is in the clock code, and remove this delay from the bcm63xx_udc +gadget driver where it was before. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/clk.c | 5 +++++ + drivers/usb/gadget/bcm63xx_udc.c | 1 - + 2 files changed, 5 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -235,6 +235,11 @@ static void usbd_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); ++ else ++ return; ++ ++ if (enable) ++ udelay(10); + } + + static struct clk clk_usbd = { +--- a/drivers/usb/gadget/udc/bcm63xx_udc.c ++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c +@@ -410,7 +410,6 @@ static inline void set_clocks(struct bcm + if (is_enabled) { + clk_enable(udc->usbh_clk); + clk_enable(udc->usbd_clk); +- udelay(10); + } else { + clk_disable(udc->usbd_clk); + clk_disable(udc->usbh_clk); diff --git a/target/linux/brcm63xx/patches-4.9/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch b/target/linux/brcm63xx/patches-4.9/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch new file mode 100644 index 000000000..8231436ce --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch @@ -0,0 +1,151 @@ +From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:21 +0100 +Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private + register + +This patch moves the code touching the USB private register in the +bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in +preparation for adding support for OHCI and EHCI host controllers which +will also touch the USB private register. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++ + drivers/usb/gadget/bcm63xx_udc.c | 27 ++-------- + 4 files changed, 67 insertions(+), 24 deletions(-) + create mode 100644 arch/mips/bcm63xx/usb-common.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-usbd.o ++ dev-wdt.o dev-usb-usbd.o usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -0,0 +1,53 @@ ++/* ++ * Broadcom BCM63xx common USB device configuration code ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2012 Kevin Cernekee ++ * Copyright (C) 2012 Broadcom Corporation ++ * ++ */ ++#include ++ ++#include ++#include ++#include ++#include ++ ++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) ++{ ++ u32 val; ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); ++ if (is_device) { ++ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); ++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ } else { ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ } ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ if (is_device) ++ val |= USBH_PRIV_SWAP_USBD_MASK; ++ else ++ val &= ~USBH_PRIV_SWAP_USBD_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++} ++EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); ++ ++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) ++{ ++ u32 val; ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); ++ if (is_on) ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ else ++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++} ++EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h +@@ -0,0 +1,9 @@ ++#ifndef BCM63XX_USB_PRIV_H_ ++#define BCM63XX_USB_PRIV_H_ ++ ++#include ++ ++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); ++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); ++ ++#endif /* BCM63XX_USB_PRIV_H_ */ +--- a/drivers/usb/gadget/udc/bcm63xx_udc.c ++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c +@@ -39,6 +39,7 @@ + #include + #include + #include ++#include + + #define DRV_MODULE_NAME "bcm63xx_udc" + +@@ -887,22 +888,7 @@ static void bcm63xx_select_phy_mode(stru + bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG); + } + +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); +- if (is_device) { +- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); +- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- } else { +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- } +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); +- +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); +- if (is_device) +- val |= USBH_PRIV_SWAP_USBD_MASK; +- else +- val &= ~USBH_PRIV_SWAP_USBD_MASK; +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++ bcm63xx_usb_priv_select_phy_mode(portmask, is_device); + } + + /** +@@ -916,14 +902,9 @@ static void bcm63xx_select_phy_mode(stru + */ + static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on) + { +- u32 val, portmask = BIT(udc->pd->port_no); ++ u32 portmask = BIT(udc->pd->port_no); + +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); +- if (is_on) +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- else +- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ bcm63xx_usb_priv_select_pullup(portmask, is_on); + } + + /** diff --git a/target/linux/brcm63xx/patches-4.9/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch b/target/linux/brcm63xx/patches-4.9/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch new file mode 100644 index 000000000..40bbe083a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch @@ -0,0 +1,169 @@ +From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:22 +0100 +Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to + common USB code + +This patch updates the common USB code touching the USB private +registers with the specific bits to properly enable OHCI and EHCI +controllers on BCM63xx SoCs. As a result we now need to protect access +to Read Modify Write sequences using a spinlock because we cannot +guarantee that any of the exposed helper will not be called +concurrently. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 + + 2 files changed, 99 insertions(+) + +--- a/arch/mips/bcm63xx/usb-common.c ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -5,10 +5,12 @@ + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * ++ * Copyright (C) 2008 Maxime Bizon + * Copyright (C) 2012 Kevin Cernekee + * Copyright (C) 2012 Broadcom Corporation + * + */ ++#include + #include + + #include +@@ -16,9 +18,14 @@ + #include + #include + ++static DEFINE_SPINLOCK(usb_priv_reg_lock); ++ + void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) + { + u32 val; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); + + val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); + if (is_device) { +@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3 + else + val &= ~USBH_PRIV_SWAP_USBD_MASK; + bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); + } + EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); + + void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) + { + u32 val; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); + + val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); + if (is_on) +@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32 + else + val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); + bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); + } + EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); ++ ++/* The following array represents the meaning of the DESC/DATA ++ * endian swapping with respect to the CPU configured endianness ++ * ++ * DATA ENDN mmio descriptor ++ * 0 0 BE invalid ++ * 0 1 BE LE ++ * 1 0 BE BE ++ * 1 1 BE invalid ++ * ++ * Since BCM63XX SoCs are configured to be in big-endian mode ++ * we want configuration at line 3. ++ */ ++void bcm63xx_usb_priv_ohci_cfg_set(void) ++{ ++ u32 reg; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); ++ ++ if (BCMCPU_IS_6348()) ++ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG); ++ else if (BCMCPU_IS_6358()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); ++ /* ++ * The magic value comes for the original vendor BSP ++ * and is needed for USB to work. Datasheet does not ++ * help, so the magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, ++ USBH_PRIV_TEST_6358_REG); ++ ++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); ++} ++ ++void bcm63xx_usb_priv_ehci_cfg_set(void) ++{ ++ u32 reg; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); ++ ++ if (BCMCPU_IS_6358()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); ++ ++ /* ++ * The magic value comes for the original vendor BSP ++ * and is needed for USB to work. Datasheet does not ++ * help, so the magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, ++ USBH_PRIV_TEST_6358_REG); ++ ++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h +@@ -5,5 +5,7 @@ + + void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); + void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); ++void bcm63xx_usb_priv_ohci_cfg_set(void); ++void bcm63xx_usb_priv_ehci_cfg_set(void); + + #endif /* BCM63XX_USB_PRIV_H_ */ diff --git a/target/linux/brcm63xx/patches-4.9/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-4.9/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch new file mode 100644 index 000000000..768dccac5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch @@ -0,0 +1,62 @@ +From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:23 +0100 +Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration + symbol + +This configuration symbol can be used by CPUs supporting the on-chip +OHCI controller, and ensures that all relevant OHCI-related +configuration options are correctly selected. So far, OHCI support is +available for the 6328, 6348, 6358 and 6358 SoCs. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Kconfig | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -6,10 +6,17 @@ config BCM63XX_CPU_3368 + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + ++config BCM63XX_OHCI ++ bool ++ select USB_ARCH_HAS_OHCI ++ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD ++ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -24,21 +31,25 @@ config BCM63XX_CPU_6348 + bool "support 6348 CPU" + select SYS_HAS_CPU_BMIPS32_3300 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-4.9/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch b/target/linux/brcm63xx/patches-4.9/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch new file mode 100644 index 000000000..111d481e5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch @@ -0,0 +1,138 @@ +From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:24 +0100 +Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI + controller + +Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be +driven by the ohci-platform generic driver by using specific power +on/off/suspend callback to manage clocks and hardware specific +configuration. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++ + 3 files changed, 101 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-usbd.o usb-common.o ++ dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ohci.c +@@ -0,0 +1,94 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2013 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ohci_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ohci_dmamask = DMA_BIT_MASK(32); ++ ++static struct clk *usb_host_clock; ++ ++static int bcm63xx_ohci_power_on(struct platform_device *pdev) ++{ ++ usb_host_clock = clk_get(&pdev->dev, "usbh"); ++ if (IS_ERR_OR_NULL(usb_host_clock)) ++ return -ENODEV; ++ ++ clk_prepare_enable(usb_host_clock); ++ ++ bcm63xx_usb_priv_ohci_cfg_set(); ++ ++ return 0; ++} ++ ++static void bcm63xx_ohci_power_off(struct platform_device *pdev) ++{ ++ if (!IS_ERR_OR_NULL(usb_host_clock)) { ++ clk_disable_unprepare(usb_host_clock); ++ clk_put(usb_host_clock); ++ } ++} ++ ++static struct usb_ohci_pdata bcm63xx_ohci_pdata = { ++ .big_endian_desc = 1, ++ .big_endian_mmio = 1, ++ .no_big_frame_no = 1, ++ .num_ports = 1, ++ .power_on = bcm63xx_ohci_power_on, ++ .power_off = bcm63xx_ohci_power_off, ++ .power_suspend = bcm63xx_ohci_power_off, ++}; ++ ++static struct platform_device bcm63xx_ohci_device = { ++ .name = "ohci-platform", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ohci_resources), ++ .resource = ohci_resources, ++ .dev = { ++ .platform_data = &bcm63xx_ohci_pdata, ++ .dma_mask = &ohci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++int __init bcm63xx_ohci_register(void) ++{ ++ if (BCMCPU_IS_6345() || BCMCPU_IS_6338()) ++ return -ENODEV; ++ ++ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); ++ ohci_resources[0].end = ohci_resources[0].start; ++ ohci_resources[0].end += RSET_OHCI_SIZE - 1; ++ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0); ++ ++ return platform_device_register(&bcm63xx_ohci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_OHCI_H_ ++#define BCM63XX_DEV_USB_OHCI_H_ ++ ++int bcm63xx_ohci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_OHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-4.9/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-4.9/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch new file mode 100644 index 000000000..253d7d5a3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch @@ -0,0 +1,36 @@ +From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:25 +0100 +Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board + enables it + +BCM63XX-based boards can control the registration of the OHCI controller +by setting their has_ohci0 flag to 1. Handle this in the generic +code dealing with board registration and call the actual helper to +register the OHCI controller. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -898,6 +899,9 @@ int __init board_register_devices(void) + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + ++ if (board.has_ohci0) ++ bcm63xx_ohci_register(); ++ + if (board.has_dsp) + bcm63xx_dsp_register(&board.dsp); + diff --git a/target/linux/brcm63xx/patches-4.9/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-4.9/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch new file mode 100644 index 000000000..bce91e373 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch @@ -0,0 +1,62 @@ +From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:26 +0100 +Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration + symbol + +This configuration symbol can be used by CPUs supporting the on-chip +EHCI controller, and ensures that all relevant EHCI-related +configuration options are selected. So far BCM6328, BCM6358 and BCM6368 +have an EHCI controller and do select this symbol. Update +drivers/usb/host/Kconfig with BCM63XX to update direct unmet +dependencies. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Kconfig | 9 +++++++++ + drivers/usb/host/Kconfig | 5 +++-- + 2 files changed, 12 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -12,11 +12,18 @@ config BCM63XX_OHCI + select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD + select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD + ++config BCM63XX_EHCI ++ bool ++ select USB_ARCH_HAS_EHCI ++ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD ++ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -38,18 +45,21 @@ config BCM63XX_CPU_6358 + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-4.9/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch b/target/linux/brcm63xx/patches-4.9/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch new file mode 100644 index 000000000..8b1f8d22b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch @@ -0,0 +1,137 @@ +From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:27 +0100 +Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI + controller + +Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be +driven by the generic ehci-platform driver by using specific power +on/off/suspend callbacks to manage clocks and hardware specific +configuration. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++ + 3 files changed, 99 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,8 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o ++ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ ++ usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -0,0 +1,92 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2013 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ehci_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ehci_dmamask = DMA_BIT_MASK(32); ++ ++static struct clk *usb_host_clock; ++ ++static int bcm63xx_ehci_power_on(struct platform_device *pdev) ++{ ++ usb_host_clock = clk_get(&pdev->dev, "usbh"); ++ if (IS_ERR_OR_NULL(usb_host_clock)) ++ return -ENODEV; ++ ++ clk_prepare_enable(usb_host_clock); ++ ++ bcm63xx_usb_priv_ehci_cfg_set(); ++ ++ return 0; ++} ++ ++static void bcm63xx_ehci_power_off(struct platform_device *pdev) ++{ ++ if (!IS_ERR_OR_NULL(usb_host_clock)) { ++ clk_disable_unprepare(usb_host_clock); ++ clk_put(usb_host_clock); ++ } ++} ++ ++static struct usb_ehci_pdata bcm63xx_ehci_pdata = { ++ .big_endian_desc = 1, ++ .big_endian_mmio = 1, ++ .power_on = bcm63xx_ehci_power_on, ++ .power_off = bcm63xx_ehci_power_off, ++ .power_suspend = bcm63xx_ehci_power_off, ++}; ++ ++static struct platform_device bcm63xx_ehci_device = { ++ .name = "ehci-platform", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ehci_resources), ++ .resource = ehci_resources, ++ .dev = { ++ .platform_data = &bcm63xx_ehci_pdata, ++ .dma_mask = &ehci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++int __init bcm63xx_ehci_register(void) ++{ ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ return 0; ++ ++ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); ++ ehci_resources[0].end = ehci_resources[0].start; ++ ehci_resources[0].end += RSET_EHCI_SIZE - 1; ++ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0); ++ ++ return platform_device_register(&bcm63xx_ehci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_EHCI_H_ ++#define BCM63XX_DEV_USB_EHCI_H_ ++ ++int bcm63xx_ehci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_EHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-4.9/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-4.9/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch new file mode 100644 index 000000000..f1256727a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch @@ -0,0 +1,36 @@ +From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:28 +0100 +Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board + enables it + +BCM63XX-based board can control the registration of the EHCI controller +by setting their has_ehci0 flag to 1. Handle this in the generic +code dealing with board registration and call the actual helper to register +the EHCI controller. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -899,6 +900,9 @@ int __init board_register_devices(void) + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + ++ if (board.has_ehci0) ++ bcm63xx_ehci_register(); ++ + if (board.has_ohci0) + bcm63xx_ohci_register(); + diff --git a/target/linux/brcm63xx/patches-4.9/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch b/target/linux/brcm63xx/patches-4.9/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch new file mode 100644 index 000000000..6d9112993 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch @@ -0,0 +1,24 @@ +From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:30 +0100 +Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support + overcurrent + +This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it +does not support proper overcurrent reporting. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/dev-usb-ehci.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc + static struct usb_ehci_pdata bcm63xx_ehci_pdata = { + .big_endian_desc = 1, + .big_endian_mmio = 1, ++ .ignore_oc = 1, + .power_on = bcm63xx_ehci_power_on, + .power_off = bcm63xx_ehci_power_off, + .power_suspend = bcm63xx_ehci_power_off, diff --git a/target/linux/brcm63xx/patches-4.9/111-MIPS-BCM63XX-allow-NULL-clock-for-clk_get_rate.patch b/target/linux/brcm63xx/patches-4.9/111-MIPS-BCM63XX-allow-NULL-clock-for-clk_get_rate.patch new file mode 100644 index 000000000..bc4394eb3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/111-MIPS-BCM63XX-allow-NULL-clock-for-clk_get_rate.patch @@ -0,0 +1,48 @@ +From patchwork Tue Jul 18 10:17:27 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [6/9] MIPS: BCM63XX: allow NULL clock for clk_get_rate +X-Patchwork-Submitter: Jonas Gorski +X-Patchwork-Id: 16776 +Message-Id: <20170718101730.2541-7-jonas.gorski@gmail.com> +To: unlisted-recipients:; (no To-header on input) +Cc: Ralf Baechle , + Florian Fainelli , + bcm-kernel-feedback-list@broadcom.com, + James Hogan , + linux-mips@linux-mips.org, linux-kernel@vger.kernel.org +Date: Tue, 18 Jul 2017 12:17:27 +0200 +From: Jonas Gorski +List-Id: linux-mips + +Make the behaviour of clk_get_rate consistent with common clk's +clk_get_rate by accepting NULL clocks as parameter. Some device +drivers rely on this, and will cause an OOPS otherwise. + +Fixes: e7300d04bd08 ("MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.") +Cc: Ralf Baechle +Cc: Florian Fainelli +Cc: bcm-kernel-feedback-list@broadcom.com +Cc: James Hogan +Cc: linux-mips@linux-mips.org +Cc: linux-kernel@vger.kernel.org +Reported-by: Mathias Kresin +Signed-off-by: Jonas Gorski +Reviewed-by: Florian Fainelli +--- + arch/mips/bcm63xx/clk.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -392,6 +392,9 @@ EXPORT_SYMBOL(clk_disable); + + unsigned long clk_get_rate(struct clk *clk) + { ++ if (!clk) ++ return 0; ++ + return clk->rate; + } + diff --git a/target/linux/brcm63xx/patches-4.9/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch b/target/linux/brcm63xx/patches-4.9/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch new file mode 100644 index 000000000..6a93398c7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/120-mtd-add-of_match_table-parsing-for-partition-parsers.patch @@ -0,0 +1,79 @@ +From 53980645bb12bd8723ac226805ee171780b24196 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 26 Jun 2017 13:37:11 +0200 +Subject: [PATCH 1/4] mtd: add of_match_table parsing for partition parsers + +Allow partition parsers to be matched by attaching compatible strings to +partitions. + +This allows specifying the expected format of flash partitions for +matching partition parsers. + +Example: + +flash@foo { + ... + partitions { + compatible = "fixed-partitions"; + + cfe@0 { + reg = <0x0 0x10000>; + label = "cfe"; + read-only; + }; + + firmware@10000 { + reg = <0x10000 0x3e0000>; + label = "firmware"; + compatible = "brcm,bcm63xx-imagetag"; + }; + + nvram@3f0000 { + reg = <0x3e0000 0x10000>; + label = "nvram"; + }; + }; +}; + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/mtdpart.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +--- a/drivers/mtd/mtdpart.c ++++ b/drivers/mtd/mtdpart.c +@@ -953,8 +953,7 @@ int add_mtd_partitions(struct mtd_info * + add_mtd_device(&slave->mtd); + mtd_partition_split(master, slave); + mtd_add_partition_attrs(slave); +- if (parts[i].types) +- mtd_parse_part(slave, parts[i].types); ++ mtd_parse_part(slave, parts[i].types); + + cur_offset = slave->offset + slave->mtd.size; + } +@@ -1136,7 +1135,9 @@ static int mtd_part_of_parse(struct mtd_ + const char *fixed = "fixed-partitions"; + int ret, err = 0; + +- np = of_get_child_by_name(mtd_get_of_node(master), "partitions"); ++ np = mtd_get_of_node(master); ++ if (!mtd_is_partition(master)) ++ np = of_get_child_by_name(np, "partitions"); + of_property_for_each_string(np, "compatible", prop, compat) { + parser = mtd_part_get_compatible_parser(compat); + if (!parser) +@@ -1208,8 +1209,12 @@ int parse_mtd_partitions(struct mtd_info + types = types_of; + } + +- if (!types) ++ if (!types) { ++ if (mtd_is_partition(master)) ++ return -ENOENT; ++ + types = default_mtd_part_types; ++ } + + for ( ; *types; types++) { + /* diff --git a/target/linux/brcm63xx/patches-4.9/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch b/target/linux/brcm63xx/patches-4.9/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch new file mode 100644 index 000000000..6a714eb91 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/121-mtd-bcm63xxpart-move-imagetag-parsing-to-its-own-par.patch @@ -0,0 +1,481 @@ +From a2b8c7f648e168573905818dbb4cb90ca3957c65 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 28 Jun 2017 18:29:43 +0200 +Subject: [PATCH] mtd: bcm63xxpart: move imagetag parsing to its own parser + +Move the bcm963xx Image Tag parsing into its own partition parser. This +Allows reusing the parser with different full flash parsers. + +While moving it, rename it to bcm963* to better reflect it isn't chip +but board specific. + +Signed-off-by: Jonas Gorski +--- +I tried to keep the code as-is, to keep the changes as small as +possible. + +One side effect is that the partitions get renumbered, which means any +root=/dev/mtdblock* will now point to the wrong mtd device. But since +bcm963xx boards will require these hardcoded in the kernel commandline +anyway this should b a non issue, as it can be easily updated. + +There is no such thing in the mips/bcm63xx defconfig, so nothing to update +there. + + drivers/mtd/Kconfig | 1 + + drivers/mtd/bcm63xxpart.c | 155 ++---------------------- + drivers/mtd/parsers/Kconfig | 11 ++ + drivers/mtd/parsers/Makefile | 1 + + drivers/mtd/parsers/parser_imagetag.c | 214 ++++++++++++++++++++++++++++++++++ + 5 files changed, 235 insertions(+), 147 deletions(-) + create mode 100644 drivers/mtd/parsers/parser_imagetag.c + +--- a/drivers/mtd/Kconfig ++++ b/drivers/mtd/Kconfig +@@ -163,6 +163,7 @@ config MTD_BCM63XX_PARTS + tristate "BCM63XX CFE partitioning support" + depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST + select CRC32 ++ select MTD_PARSER_IMAGETAG + help + This provides partions parsing for BCM63xx devices with CFE + bootloaders. +--- a/drivers/mtd/bcm63xxpart.c ++++ b/drivers/mtd/bcm63xxpart.c +@@ -93,51 +93,19 @@ static int bcm63xx_read_nvram(struct mtd + return 0; + } + +-static int bcm63xx_read_image_tag(struct mtd_info *master, const char *name, +- loff_t tag_offset, struct bcm_tag *buf) +-{ +- int ret; +- size_t retlen; +- u32 computed_crc; +- +- ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf); +- if (ret) +- return ret; +- +- if (retlen != sizeof(*buf)) +- return -EIO; +- +- computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf, +- offsetof(struct bcm_tag, header_crc)); +- if (computed_crc == buf->header_crc) { +- STR_NULL_TERMINATE(buf->board_id); +- STR_NULL_TERMINATE(buf->tag_version); +- +- pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n", +- name, tag_offset, buf->tag_version, buf->board_id); +- +- return 0; +- } +- +- pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n", +- name, tag_offset, buf->header_crc, computed_crc); +- return 1; +-} ++static const char * const bcm63xx_cfe_part_types[] = { ++ "bcm963xx-imagetag", ++ NULL, ++}; + + static int bcm63xx_parse_cfe_nor_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, struct bcm963xx_nvram *nvram) + { +- /* CFE, NVRAM and global Linux are always present */ +- int nrparts = 3, curpart = 0; +- struct bcm_tag *buf = NULL; + struct mtd_partition *parts; +- int ret; +- unsigned int rootfsaddr, kerneladdr, spareaddr; +- unsigned int rootfslen, kernellen, sparelen, totallen; ++ int nrparts = 3, curpart = 0; + unsigned int cfelen, nvramlen; + unsigned int cfe_erasesize; + int i; +- bool rootfs_first = false; + + cfe_erasesize = max_t(uint32_t, master->erasesize, + BCM963XX_CFE_BLOCK_SIZE); +@@ -146,83 +114,9 @@ static int bcm63xx_parse_cfe_nor_partiti + nvramlen = nvram->psi_size * SZ_1K; + nvramlen = roundup(nvramlen, cfe_erasesize); + +- buf = vmalloc(sizeof(struct bcm_tag)); +- if (!buf) +- return -ENOMEM; +- +- /* Get the tag */ +- ret = bcm63xx_read_image_tag(master, "rootfs", cfelen, buf); +- if (!ret) { +- STR_NULL_TERMINATE(buf->flash_image_start); +- if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) || +- rootfsaddr < BCM963XX_EXTENDED_SIZE) { +- pr_err("invalid rootfs address: %*ph\n", +- (int)sizeof(buf->flash_image_start), +- buf->flash_image_start); +- goto invalid_tag; +- } +- +- STR_NULL_TERMINATE(buf->kernel_address); +- if (kstrtouint(buf->kernel_address, 10, &kerneladdr) || +- kerneladdr < BCM963XX_EXTENDED_SIZE) { +- pr_err("invalid kernel address: %*ph\n", +- (int)sizeof(buf->kernel_address), +- buf->kernel_address); +- goto invalid_tag; +- } +- +- STR_NULL_TERMINATE(buf->kernel_length); +- if (kstrtouint(buf->kernel_length, 10, &kernellen)) { +- pr_err("invalid kernel length: %*ph\n", +- (int)sizeof(buf->kernel_length), +- buf->kernel_length); +- goto invalid_tag; +- } +- +- STR_NULL_TERMINATE(buf->total_length); +- if (kstrtouint(buf->total_length, 10, &totallen)) { +- pr_err("invalid total length: %*ph\n", +- (int)sizeof(buf->total_length), +- buf->total_length); +- goto invalid_tag; +- } +- +- kerneladdr = kerneladdr - BCM963XX_EXTENDED_SIZE; +- rootfsaddr = rootfsaddr - BCM963XX_EXTENDED_SIZE; +- spareaddr = roundup(totallen, master->erasesize) + cfelen; +- +- if (rootfsaddr < kerneladdr) { +- /* default Broadcom layout */ +- rootfslen = kerneladdr - rootfsaddr; +- rootfs_first = true; +- } else { +- /* OpenWrt layout */ +- rootfsaddr = kerneladdr + kernellen; +- rootfslen = spareaddr - rootfsaddr; +- } +- } else if (ret > 0) { +-invalid_tag: +- kernellen = 0; +- rootfslen = 0; +- rootfsaddr = 0; +- spareaddr = cfelen; +- } else { +- goto out; +- } +- sparelen = master->size - spareaddr - nvramlen; +- +- /* Determine number of partitions */ +- if (rootfslen > 0) +- nrparts++; +- +- if (kernellen > 0) +- nrparts++; +- + parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); +- if (!parts) { +- ret = -ENOMEM; +- goto out; +- } ++ if (!parts) ++ return -ENOMEM; + + /* Start building partition list */ + parts[curpart].name = "CFE"; +@@ -230,30 +124,6 @@ invalid_tag: + parts[curpart].size = cfelen; + curpart++; + +- if (kernellen > 0) { +- int kernelpart = curpart; +- +- if (rootfslen > 0 && rootfs_first) +- kernelpart++; +- parts[kernelpart].name = "kernel"; +- parts[kernelpart].offset = kerneladdr; +- parts[kernelpart].size = kernellen; +- curpart++; +- } +- +- if (rootfslen > 0) { +- int rootfspart = curpart; +- +- if (kernellen > 0 && rootfs_first) +- rootfspart--; +- parts[rootfspart].name = "rootfs"; +- parts[rootfspart].offset = rootfsaddr; +- parts[rootfspart].size = rootfslen; +- if (sparelen > 0 && !rootfs_first) +- parts[rootfspart].size += sparelen; +- curpart++; +- } +- + parts[curpart].name = "nvram"; + parts[curpart].offset = master->size - nvramlen; + parts[curpart].size = nvramlen; +@@ -263,22 +133,13 @@ invalid_tag: + parts[curpart].name = "linux"; + parts[curpart].offset = cfelen; + parts[curpart].size = master->size - cfelen - nvramlen; ++ parts[curpart].types = bcm63xx_cfe_part_types; + + for (i = 0; i < nrparts; i++) + pr_info("Partition %d is %s offset %llx and length %llx\n", i, + parts[i].name, parts[i].offset, parts[i].size); + +- pr_info("Spare partition is offset %x and length %x\n", spareaddr, +- sparelen); +- + *pparts = parts; +- ret = 0; +- +-out: +- vfree(buf); +- +- if (ret) +- return ret; + + return nrparts; + } +--- a/drivers/mtd/parsers/Kconfig ++++ b/drivers/mtd/parsers/Kconfig +@@ -1,3 +1,14 @@ ++config MTD_PARSER_IMAGETAG ++ tristate "Parser for BCM963XX Image Tag format partitions" ++ depends on BCM63XX || BMIPS || COMPILE_TEST ++ select CRC32 ++ help ++ Image Tag is the firmware header used by broadcom on their xDSL line ++ of devices. It is used to describe the offsets and lengths of kernel ++ and rootfs partitions. ++ This driver adds support for parsing a partition with an Image Tag ++ header and creates up to two partitions, kernel and rootfs. ++ + config MTD_PARSER_TRX + tristate "Parser for TRX format partitions" + depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST) +--- a/drivers/mtd/parsers/Makefile ++++ b/drivers/mtd/parsers/Makefile +@@ -1 +1,2 @@ ++obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o + obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o +--- /dev/null ++++ b/drivers/mtd/parsers/parser_imagetag.c +@@ -0,0 +1,214 @@ ++/* ++ * BCM63XX CFE image tag parser ++ * ++ * Copyright © 2006-2008 Florian Fainelli ++ * Mike Albon ++ * Copyright © 2009-2010 Daniel Dickinson ++ * Copyright © 2011-2013 Jonas Gorski ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Ensure strings read from flash structs are null terminated */ ++#define STR_NULL_TERMINATE(x) \ ++ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0) ++ ++static int bcm963xx_read_imagetag(struct mtd_info *master, const char *name, ++ loff_t tag_offset, struct bcm_tag *buf) ++{ ++ int ret; ++ size_t retlen; ++ u32 computed_crc; ++ ++ ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf); ++ if (ret) ++ return ret; ++ ++ if (retlen != sizeof(*buf)) ++ return -EIO; ++ ++ computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf, ++ offsetof(struct bcm_tag, header_crc)); ++ if (computed_crc == buf->header_crc) { ++ STR_NULL_TERMINATE(buf->board_id); ++ STR_NULL_TERMINATE(buf->tag_version); ++ ++ pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n", ++ name, tag_offset, buf->tag_version, buf->board_id); ++ ++ return 0; ++ } ++ ++ pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n", ++ name, tag_offset, buf->header_crc, computed_crc); ++ return -EINVAL; ++} ++ ++static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master, ++ const struct mtd_partition **pparts, ++ struct mtd_part_parser_data *data) ++{ ++ /* CFE, NVRAM and global Linux are always present */ ++ int nrparts = 0, curpart = 0; ++ struct bcm_tag *buf = NULL; ++ struct mtd_partition *parts; ++ int ret; ++ unsigned int rootfsaddr, kerneladdr, spareaddr, offset; ++ unsigned int rootfslen, kernellen, sparelen, totallen; ++ int i; ++ bool rootfs_first = false; ++ ++ buf = vmalloc(sizeof(struct bcm_tag)); ++ if (!buf) ++ return -ENOMEM; ++ ++ /* Get the tag */ ++ ret = bcm963xx_read_imagetag(master, "rootfs", 0, buf); ++ if (!ret) { ++ STR_NULL_TERMINATE(buf->flash_image_start); ++ if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) || ++ rootfsaddr < BCM963XX_EXTENDED_SIZE) { ++ pr_err("invalid rootfs address: %*ph\n", ++ (int)sizeof(buf->flash_image_start), ++ buf->flash_image_start); ++ goto out; ++ } ++ ++ STR_NULL_TERMINATE(buf->kernel_address); ++ if (kstrtouint(buf->kernel_address, 10, &kerneladdr) || ++ kerneladdr < BCM963XX_EXTENDED_SIZE) { ++ pr_err("invalid kernel address: %*ph\n", ++ (int)sizeof(buf->kernel_address), ++ buf->kernel_address); ++ goto out; ++ } ++ ++ STR_NULL_TERMINATE(buf->kernel_length); ++ if (kstrtouint(buf->kernel_length, 10, &kernellen)) { ++ pr_err("invalid kernel length: %*ph\n", ++ (int)sizeof(buf->kernel_length), ++ buf->kernel_length); ++ goto out; ++ } ++ ++ STR_NULL_TERMINATE(buf->total_length); ++ if (kstrtouint(buf->total_length, 10, &totallen)) { ++ pr_err("invalid total length: %*ph\n", ++ (int)sizeof(buf->total_length), ++ buf->total_length); ++ goto out; ++ } ++ ++ /* ++ * Addresses are flash absolute, so convert to partition ++ * relative addresses. Assume either kernel or rootfs will ++ * directly follow the image tag. ++ */ ++ if (rootfsaddr < kerneladdr) ++ offset = rootfsaddr - sizeof(struct bcm_tag); ++ else ++ offset = kerneladdr - sizeof(struct bcm_tag); ++ ++ kerneladdr = kerneladdr - offset; ++ rootfsaddr = rootfsaddr - offset; ++ spareaddr = roundup(totallen, master->erasesize); ++ ++ if (rootfsaddr < kerneladdr) { ++ /* default Broadcom layout */ ++ rootfslen = kerneladdr - rootfsaddr; ++ rootfs_first = true; ++ } else { ++ /* OpenWrt layout */ ++ rootfsaddr = kerneladdr + kernellen; ++ rootfslen = spareaddr - rootfsaddr; ++ } ++ } else { ++ goto out; ++ } ++ sparelen = master->size - spareaddr; ++ ++ /* Determine number of partitions */ ++ if (rootfslen > 0) ++ nrparts++; ++ ++ if (kernellen > 0) ++ nrparts++; ++ ++ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); ++ if (!parts) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ /* Start building partition list */ ++ if (kernellen > 0) { ++ int kernelpart = curpart; ++ ++ if (rootfslen > 0 && rootfs_first) ++ kernelpart++; ++ parts[kernelpart].name = "kernel"; ++ parts[kernelpart].offset = kerneladdr; ++ parts[kernelpart].size = kernellen; ++ curpart++; ++ } ++ ++ if (rootfslen > 0) { ++ int rootfspart = curpart; ++ ++ if (kernellen > 0 && rootfs_first) ++ rootfspart--; ++ parts[rootfspart].name = "rootfs"; ++ parts[rootfspart].offset = rootfsaddr; ++ parts[rootfspart].size = rootfslen; ++ if (sparelen > 0 && !rootfs_first) ++ parts[rootfspart].size += sparelen; ++ curpart++; ++ } ++ ++ for (i = 0; i < nrparts; i++) ++ pr_info("Partition %d is %s offset %llx and length %llx\n", i, ++ parts[i].name, parts[i].offset, parts[i].size); ++ ++ pr_info("Spare partition is offset %x and length %x\n", spareaddr, ++ sparelen); ++ ++ *pparts = parts; ++ ret = 0; ++ ++out: ++ vfree(buf); ++ ++ if (ret) ++ return ret; ++ ++ return nrparts; ++} ++ ++static struct mtd_part_parser bcm963xx_imagetag_parser = { ++ .parse_fn = bcm963xx_parse_imagetag_partitions, ++ .name = "bcm963xx-imagetag", ++}; ++module_mtd_part_parser(bcm963xx_imagetag_parser); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Daniel Dickinson "); ++MODULE_AUTHOR("Florian Fainelli "); ++MODULE_AUTHOR("Mike Albon "); ++MODULE_AUTHOR("Jonas Gorski +Date: Wed, 28 Jun 2017 18:34:42 +0200 +Subject: [PATCH 1/2] mtd: bcm63xxpart: add of_match_table + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/bcm63xxpart.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/mtd/bcm63xxpart.c ++++ b/drivers/mtd/bcm63xxpart.c +@@ -34,6 +34,7 @@ + #include + #include + #include ++#include + + #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */ + +@@ -172,9 +173,16 @@ out: + return ret; + }; + ++static const struct of_device_id parse_bcm63xx_cfe_match_table[] = { ++ { .compatible = "brcm,bcm963xx-cfe-nor-partitions" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, parse_bcm63xx_cfe_match_table); ++ + static struct mtd_part_parser bcm63xx_cfe_parser = { + .parse_fn = bcm63xx_parse_cfe_partitions, + .name = "bcm63xxpart", ++ .of_match_table = parse_bcm63xx_cfe_match_table, + }; + module_mtd_part_parser(bcm63xx_cfe_parser); + diff --git a/target/linux/brcm63xx/patches-4.9/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch b/target/linux/brcm63xx/patches-4.9/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch new file mode 100644 index 000000000..04978b374 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/123-mtd-parser_bcm63xx_imagetag-add-of_match_table-suppo.patch @@ -0,0 +1,37 @@ +From 3303dd9f5b197cc2efd9cbd7b9b45fc1e510a393 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 28 Jun 2017 18:37:12 +0200 +Subject: [PATCH 2/2] mtd: parser_bcm63xx_imagetag: add of_match_table support + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/parsers/parser_imagetag.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/mtd/parsers/parser_imagetag.c ++++ b/drivers/mtd/parsers/parser_imagetag.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + + /* Ensure strings read from flash structs are null terminated */ + #define STR_NULL_TERMINATE(x) \ +@@ -200,9 +201,16 @@ out: + return nrparts; + } + ++static const struct of_device_id parse_bcm963xx_imagetag_match_table[] = { ++ { .compatible = "brcm,bcm963xx-imagetag" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, parse_bcm963xx_imagetag_match_table); ++ + static struct mtd_part_parser bcm963xx_imagetag_parser = { + .parse_fn = bcm963xx_parse_imagetag_partitions, + .name = "bcm963xx-imagetag", ++ .of_match_table = parse_bcm963xx_imagetag_match_table, + }; + module_mtd_part_parser(bcm963xx_imagetag_parser); + diff --git a/target/linux/brcm63xx/patches-4.9/130-pinctrl-add-bcm63xx-base-code.patch b/target/linux/brcm63xx/patches-4.9/130-pinctrl-add-bcm63xx-base-code.patch new file mode 100644 index 000000000..cb90732b5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/130-pinctrl-add-bcm63xx-base-code.patch @@ -0,0 +1,226 @@ +From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:07:42 +0200 +Subject: [PATCH 01/13] pinctrl: add bcm63xx base code + +Setup directory and add a helper for bcm63xx pinctrl support. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/Kconfig | 1 + + drivers/pinctrl/Makefile | 1 + + drivers/pinctrl/bcm63xx/Kconfig | 3 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++ + drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++ + 7 files changed, 163 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/Kconfig + create mode 100644 drivers/pinctrl/bcm63xx/Makefile + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h + +--- a/drivers/pinctrl/Kconfig ++++ b/drivers/pinctrl/Kconfig +@@ -258,6 +258,7 @@ config PINCTRL_ZYNQ + + source "drivers/pinctrl/aspeed/Kconfig" + source "drivers/pinctrl/bcm/Kconfig" ++source "drivers/pinctrl/bcm63xx/Kconfig" + source "drivers/pinctrl/berlin/Kconfig" + source "drivers/pinctrl/freescale/Kconfig" + source "drivers/pinctrl/intel/Kconfig" +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -39,6 +39,7 @@ obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zy + + obj-$(CONFIG_ARCH_ASPEED) += aspeed/ + obj-y += bcm/ ++obj-y += bcm63xx/ + obj-$(CONFIG_PINCTRL_BERLIN) += berlin/ + obj-y += freescale/ + obj-$(CONFIG_X86) += intel/ +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -0,0 +1,3 @@ ++config PINCTRL_BCM63XX ++ bool ++ select GPIO_GENERIC +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c +@@ -0,0 +1,155 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include "pinctrl-bcm63xx.h" ++#include "../core.h" ++ ++#define BANK_SIZE sizeof(u32) ++#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE) ++ ++#ifdef CONFIG_OF ++static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc, ++ const struct of_phandle_args *gpiospec, ++ u32 *flags) ++{ ++ struct gpio_chip *base = gpiochip_get_data(gc); ++ int pin = gpiospec->args[0]; ++ ++ if (gc != &base[pin / PINS_PER_BANK]) ++ return -EINVAL; ++ ++ pin = pin % PINS_PER_BANK; ++ ++ if (pin >= gc->ngpio) ++ return -EINVAL; ++ ++ if (flags) ++ *flags = gpiospec->args[1]; ++ ++ return pin; ++} ++#endif ++ ++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ struct gpio_chip *base = gpiochip_get_data(chip); ++ char irq_name[7]; /* "gpioXX" */ ++ ++ /* FIXME: this is ugly */ ++ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base)); ++ return of_irq_get_byname(chip->of_node, irq_name); ++} ++ ++static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc, ++ void __iomem *dirout, void __iomem *data, ++ size_t sz, int ngpio) ++ ++{ ++ int banks, chips, i, ret = -EINVAL; ++ ++ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK); ++ banks = sz / BANK_SIZE; ++ ++ for (i = 0; i < chips; i++) { ++ int offset, pins; ++ int reg_offset; ++ char *label; ++ ++ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i); ++ if (!label) ++ return -ENOMEM; ++ ++ offset = i * PINS_PER_BANK; ++ pins = min_t(int, ngpio - offset, PINS_PER_BANK); ++ ++ /* the registers are treated like a huge big endian register */ ++ reg_offset = (banks - i - 1) * BANK_SIZE; ++ ++ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset, ++ NULL, NULL, dirout + reg_offset, NULL, ++ BGPIOF_BIG_ENDIAN_BYTE_ORDER); ++ if (ret) ++ return ret; ++ ++ gc[i].request = gpiochip_generic_request; ++ gc[i].free = gpiochip_generic_free; ++ ++ if (of_get_property(dev->of_node, "interrupt-names", NULL)) ++ gc[i].to_irq = bcm63xx_gpio_to_irq; ++ ++#ifdef CONFIG_OF ++ gc[i].of_gpio_n_cells = 2; ++ gc[i].of_xlate = bcm63xx_gpio_of_xlate; ++#endif ++ ++ gc[i].label = label; ++ gc[i].ngpio = pins; ++ ++ devm_gpiochip_add_data(dev, &gc[i], gc); ++ } ++ ++ return 0; ++} ++ ++static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name, ++ int ngpio) ++{ ++ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK); ++ ++ for (i = 0; i < chips; i++) { ++ int offset, pins; ++ ++ offset = i * PINS_PER_BANK; ++ pins = min_t(int, ngpio - offset, PINS_PER_BANK); ++ ++ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins); ++ } ++} ++ ++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev, ++ struct pinctrl_desc *desc, ++ void *priv, struct gpio_chip *gc, ++ int ngpio) ++{ ++ struct pinctrl_dev *pctldev; ++ struct resource *res; ++ void __iomem *dirout, *data; ++ size_t sz; ++ int ret; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout"); ++ dirout = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(dirout)) ++ return ERR_CAST(dirout); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); ++ data = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(data)) ++ return ERR_CAST(data); ++ ++ sz = resource_size(res); ++ ++ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio); ++ if (ret) ++ return ERR_PTR(ret); ++ ++ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv); ++ if (IS_ERR(pctldev)) ++ return pctldev; ++ ++ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio); ++ ++ dev_info(&pdev->dev, "registered at mmio %p\n", dirout); ++ ++ return pctldev; ++} +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h +@@ -0,0 +1,14 @@ ++#ifndef __PINCTRL_BCM63XX ++#define __PINCTRL_BCM63XX ++ ++#include ++#include ++#include ++#include ++ ++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev, ++ struct pinctrl_desc *desc, ++ void *priv, struct gpio_chip *gc, ++ int ngpio); ++ ++#endif diff --git a/target/linux/brcm63xx/patches-4.9/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.9/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch new file mode 100644 index 000000000..3a2a7811d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/131-Documentation-add-BCM6328-pincontroller-binding-docu.patch @@ -0,0 +1,78 @@ +From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:33:56 +0200 +Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6328 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt | 61 ++++++++++++++++++++++ + 1 file changed, 61 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt +@@ -0,0 +1,61 @@ ++* Broadcom BCM6328 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6328-pinctrl". ++- reg: Register specifies of dirout, dat, mode, mux registers. ++- reg-names: Must be "dirout", "dat", "mode", "mux". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2> ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6328-pinctrl"; ++ reg = <0x10000080 0x8>, ++ <0x10000088 0x8>, ++ <0x10000098 0x4>, ++ <0x1000009c 0xc>; ++ reg-names = "dirout", "dat", "mode", "mux"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led ++gpio1 1 led ++gpio2 2 led ++gpio3 3 led ++gpio4 4 led ++gpio5 5 led ++gpio6 6 led, serial_led_data ++gpio7 7 led, serial_led_clk ++gpio8 8 led ++gpio9 9 led ++gpio10 10 led ++gpio11 11 led ++gpio12 12 led ++gpio13 13 led ++gpio14 14 led ++gpio15 15 led ++gpio16 16 led, pcie_clkreq ++gpio17 17 led ++gpio18 18 led ++gpio19 19 led ++gpio20 20 led ++gpio21 21 led ++gpio22 22 led ++gpio23 23 led ++gpio24 24 - ++gpio25 25 ephy0_act_led ++gpio26 26 ephy1_act_led ++gpio27 27 ephy2_act_led ++gpio28 28 ephy3_act_led ++gpio29 29 - ++gpio30 30 - ++gpio31 31 - ++hsspi_cs1 - hsspi_cs1 ++usb_port1 - usb_host_port, usb_device_port diff --git a/target/linux/brcm63xx/patches-4.9/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch b/target/linux/brcm63xx/patches-4.9/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch new file mode 100644 index 000000000..3c5f15b91 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/132-pinctrl-add-a-pincontrol-driver-for-BCM6328.patch @@ -0,0 +1,495 @@ +From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:12:50 +0200 +Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328 + +Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as +GPIOs, as LEDs for the integrated LED controller, or various other +functions. Its pincontrol mux registers also control other aspects, like +switching the second USB port between host and device mode. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++ + 3 files changed, 464 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -1,3 +1,10 @@ + config PINCTRL_BCM63XX + bool + select GPIO_GENERIC ++ ++config PINCTRL_BCM6328 ++ bool "BCM6328 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1 +1,2 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o ++obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c +@@ -0,0 +1,456 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6328_MUX_LO_REG 0x4 ++#define BCM6328_MUX_HI_REG 0x0 ++#define BCM6328_MUX_OTHER_REG 0x8 ++ ++#define BCM6328_NGPIO 32 ++ ++struct bcm6328_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6328_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ unsigned mode_val:1; ++ unsigned mux_val:2; ++}; ++ ++struct bcm6328_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ void __iomem *mux[3]; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio; ++}; ++ ++static const struct pinctrl_pin_desc bcm6328_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ PINCTRL_PIN(8, "gpio8"), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ PINCTRL_PIN(12, "gpio12"), ++ PINCTRL_PIN(13, "gpio13"), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ PINCTRL_PIN(27, "gpio27"), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ PINCTRL_PIN(30, "gpio30"), ++ PINCTRL_PIN(31, "gpio31"), ++ ++ /* ++ * No idea where they really are; so let's put them according ++ * to their mux offsets. ++ */ ++ PINCTRL_PIN(36, "hsspi_cs1"), ++ PINCTRL_PIN(38, "usb_p2"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++ ++static unsigned hsspi_cs1_pins[] = { 36 }; ++static unsigned usb_port1_pins[] = { 38 }; ++ ++#define BCM6328_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6328_pingroup bcm6328_groups[] = { ++ BCM6328_GROUP(gpio0), ++ BCM6328_GROUP(gpio1), ++ BCM6328_GROUP(gpio2), ++ BCM6328_GROUP(gpio3), ++ BCM6328_GROUP(gpio4), ++ BCM6328_GROUP(gpio5), ++ BCM6328_GROUP(gpio6), ++ BCM6328_GROUP(gpio7), ++ BCM6328_GROUP(gpio8), ++ BCM6328_GROUP(gpio9), ++ BCM6328_GROUP(gpio10), ++ BCM6328_GROUP(gpio11), ++ BCM6328_GROUP(gpio12), ++ BCM6328_GROUP(gpio13), ++ BCM6328_GROUP(gpio14), ++ BCM6328_GROUP(gpio15), ++ BCM6328_GROUP(gpio16), ++ BCM6328_GROUP(gpio17), ++ BCM6328_GROUP(gpio18), ++ BCM6328_GROUP(gpio19), ++ BCM6328_GROUP(gpio20), ++ BCM6328_GROUP(gpio21), ++ BCM6328_GROUP(gpio22), ++ BCM6328_GROUP(gpio23), ++ BCM6328_GROUP(gpio24), ++ BCM6328_GROUP(gpio25), ++ BCM6328_GROUP(gpio26), ++ BCM6328_GROUP(gpio27), ++ BCM6328_GROUP(gpio28), ++ BCM6328_GROUP(gpio29), ++ BCM6328_GROUP(gpio30), ++ BCM6328_GROUP(gpio31), ++ ++ BCM6328_GROUP(hsspi_cs1), ++ BCM6328_GROUP(usb_port1), ++}; ++ ++/* GPIO_MODE */ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++/* PINMUX_SEL */ ++static const char * const serial_led_data_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const inet_act_led_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const pcie_clkreq_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const ephy0_act_led_groups[] = { ++ "gpio25", ++}; ++ ++static const char * const ephy1_act_led_groups[] = { ++ "gpio26", ++}; ++ ++static const char * const ephy2_act_led_groups[] = { ++ "gpio27", ++}; ++ ++static const char * const ephy3_act_led_groups[] = { ++ "gpio28", ++}; ++ ++static const char * const hsspi_cs1_groups[] = { ++ "hsspi_cs1" ++}; ++ ++static const char * const usb_host_port_groups[] = { ++ "usb_port1", ++}; ++ ++static const char * const usb_device_port_groups[] = { ++ "usb_port1", ++}; ++ ++#define BCM6328_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mode_val = 1, \ ++ } ++ ++#define BCM6328_MUX_FUN(n, mux) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mux_val = mux, \ ++ } ++ ++static const struct bcm6328_function bcm6328_funcs[] = { ++ BCM6328_MODE_FUN(led), ++ BCM6328_MUX_FUN(serial_led_data, 2), ++ BCM6328_MUX_FUN(serial_led_clk, 2), ++ BCM6328_MUX_FUN(inet_act_led, 1), ++ BCM6328_MUX_FUN(pcie_clkreq, 2), ++ BCM6328_MUX_FUN(ephy0_act_led, 1), ++ BCM6328_MUX_FUN(ephy1_act_led, 1), ++ BCM6328_MUX_FUN(ephy2_act_led, 1), ++ BCM6328_MUX_FUN(ephy3_act_led, 1), ++ BCM6328_MUX_FUN(hsspi_cs1, 2), ++ BCM6328_MUX_FUN(usb_host_port, 1), ++ BCM6328_MUX_FUN(usb_device_port, 2), ++}; ++ ++static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6328_groups); ++} ++ ++static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6328_groups[group].name; ++} ++ ++static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6328_groups[group].pins; ++ *num_pins = bcm6328_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6328_funcs); ++} ++ ++static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6328_funcs[selector].name; ++} ++ ++static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6328_funcs[selector].groups; ++ *num_groups = bcm6328_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin, ++ u32 mode, u32 mux) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ if (pin < 32) { ++ reg = __raw_readl(pctl->mode); ++ reg &= ~BIT(pin); ++ if (mode) ++ reg |= BIT(pin); ++ __raw_writel(reg, pctl->mode); ++ } ++ ++ reg = __raw_readl(pctl->mux[pin / 16]); ++ reg &= ~(3UL << ((pin % 16) * 2)); ++ reg |= mux << ((pin % 16) * 2); ++ __raw_writel(reg, pctl->mux[pin / 16]); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6328_pingroup *grp = &bcm6328_groups[group]; ++ const struct bcm6328_function *f = &bcm6328_funcs[selector]; ++ ++ bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val); ++ ++ return 0; ++} ++ ++static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ bcm6328_rmw_mux(pctl, offset, 0, 0); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6328_pctl_ops = { ++ .get_groups_count = bcm6328_pinctrl_get_group_count, ++ .get_group_name = bcm6328_pinctrl_get_group_name, ++ .get_group_pins = bcm6328_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6328_pmx_ops = { ++ .get_functions_count = bcm6328_pinctrl_get_func_count, ++ .get_function_name = bcm6328_pinctrl_get_func_name, ++ .get_function_groups = bcm6328_pinctrl_get_groups, ++ .set_mux = bcm6328_pinctrl_set_mux, ++ .gpio_request_enable = bcm6328_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6328_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6328_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode, *mux; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux"); ++ mux = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mux)) ++ return PTR_ERR(mux); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ pctl->mux[0] = mux + BCM6328_MUX_LO_REG; ++ pctl->mux[1] = mux + BCM6328_MUX_HI_REG; ++ pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG; ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6328_pctl_ops; ++ pctl->desc.pmxops = &bcm6328_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6328_pins); ++ pctl->desc.pins = bcm6328_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ &pctl->gpio, BCM6328_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6328_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6328-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6328_pinctrl_driver = { ++ .probe = bcm6328_pinctrl_probe, ++ .driver = { ++ .name = "bcm6328-pinctrl", ++ .of_match_table = bcm6328_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6328_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.9/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.9/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch new file mode 100644 index 000000000..6bac90373 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/133-Documentation-add-BCM6348-pincontroller-binding-docu.patch @@ -0,0 +1,49 @@ +From 962c46bf7f43df730e2d3698930e77958cc6b191 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:35:45 +0200 +Subject: [PATCH 04/16] Documentation: add BCM6348 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6348 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt | 32 ++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt +@@ -0,0 +1,32 @@ ++* Broadcom BCM6348 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6348-pinctrl". ++- reg: register Specifiers of dirout, dat, mode registers. ++- reg-names: Must be "dirout", "dat", "mode". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@fffe0080 { ++ compatible = "brcm,bcm6348-pinctrl"; ++ reg = <0xfffe0080 0x8>, ++ <0xfffe0088 0x8>, ++ <0xfffe0098 0x4>; ++ reg-names = "dirout", "dat", "mode"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++group0 32-36 ext_mii, utopia, diag ++group1 22-31 ext_ephy, mii_snoop, mii_pccard, ++ spi_master_uart, utopia, diag ++group2 16-21 pci, diag ++group3 8-15 ext_mii, utopia ++group4 0-7 ext_ephy, mii_snoop, legacy_led, diag diff --git a/target/linux/brcm63xx/patches-4.9/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch b/target/linux/brcm63xx/patches-4.9/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch new file mode 100644 index 000000000..19b807586 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/134-pinctrl-add-a-pincontrol-driver-for-BCM6348.patch @@ -0,0 +1,432 @@ +From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:14:13 +0200 +Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348 + +Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of +up to ten gpios into fourteen potential functions. It does not allow +muxing individual pins. Some functions require more than one group to be +muxed to the same function. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 392 ++++++++++++++++++++++++++++++ + 3 files changed, 400 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -8,3 +8,10 @@ config PINCTRL_BCM6328 + select PINCONF + select PINCTRL_BCM63XX + select GENERIC_PINCONF ++ ++config PINCTRL_BCM6348 ++ bool "BCM6348 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1,2 +1,3 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o ++obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c +@@ -0,0 +1,392 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6348_NGPIO 37 ++ ++#define MAX_GROUP 4 ++#define PINS_PER_GROUP 8 ++#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP)) ++#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4) ++#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin)) ++ ++struct bcm6348_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6348_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ unsigned int value; ++}; ++ ++struct bcm6348_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6348_PIN(a, b, group) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(group), \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6348_pins[] = { ++ BCM6348_PIN(0, "gpio0", 4), ++ BCM6348_PIN(1, "gpio1", 4), ++ BCM6348_PIN(2, "gpio2", 4), ++ BCM6348_PIN(3, "gpio3", 4), ++ BCM6348_PIN(4, "gpio4", 4), ++ BCM6348_PIN(5, "gpio5", 4), ++ BCM6348_PIN(6, "gpio6", 4), ++ BCM6348_PIN(7, "gpio7", 4), ++ BCM6348_PIN(8, "gpio8", 3), ++ BCM6348_PIN(9, "gpio9", 3), ++ BCM6348_PIN(10, "gpio10", 3), ++ BCM6348_PIN(11, "gpio11", 3), ++ BCM6348_PIN(12, "gpio12", 3), ++ BCM6348_PIN(13, "gpio13", 3), ++ BCM6348_PIN(14, "gpio14", 3), ++ BCM6348_PIN(15, "gpio15", 3), ++ BCM6348_PIN(16, "gpio16", 2), ++ BCM6348_PIN(17, "gpio17", 2), ++ BCM6348_PIN(18, "gpio18", 2), ++ BCM6348_PIN(19, "gpio19", 2), ++ BCM6348_PIN(20, "gpio20", 2), ++ BCM6348_PIN(21, "gpio21", 2), ++ BCM6348_PIN(22, "gpio22", 1), ++ BCM6348_PIN(23, "gpio23", 1), ++ BCM6348_PIN(24, "gpio24", 1), ++ BCM6348_PIN(25, "gpio25", 1), ++ BCM6348_PIN(26, "gpio26", 1), ++ BCM6348_PIN(27, "gpio27", 1), ++ BCM6348_PIN(28, "gpio28", 1), ++ BCM6348_PIN(29, "gpio29", 1), ++ BCM6348_PIN(30, "gpio30", 1), ++ BCM6348_PIN(31, "gpio31", 1), ++ BCM6348_PIN(32, "gpio32", 0), ++ BCM6348_PIN(33, "gpio33", 0), ++ BCM6348_PIN(34, "gpio34", 0), ++ BCM6348_PIN(35, "gpio35", 0), ++ BCM6348_PIN(36, "gpio36", 0), ++}; ++ ++enum bcm6348_muxes { ++ BCM6348_MUX_GPIO = 0, ++ BCM6348_MUX_EXT_EPHY, ++ BCM6348_MUX_MII_SNOOP, ++ BCM6348_MUX_LEGACY_LED, ++ BCM6348_MUX_MII_PCCARD, ++ BCM6348_MUX_PCI, ++ BCM6348_MUX_SPI_MASTER_UART, ++ BCM6348_MUX_EXT_MII, ++ BCM6348_MUX_UTOPIA, ++ BCM6348_MUX_DIAG, ++}; ++ ++static unsigned group0_pins[] = { ++ 32, 33, 34, 35, 36, ++}; ++ ++static unsigned group1_pins[] = { ++ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, ++}; ++ ++static unsigned group2_pins[] = { ++ 16, 17, 18, 19, 20, 21, ++}; ++ ++static unsigned group3_pins[] = { ++ 8, 9, 10, 11, 12, 13, 14, 15, ++}; ++ ++static unsigned group4_pins[] = { ++ 0, 1, 2, 3, 4, 5, 6, 7, ++}; ++ ++#define BCM6348_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } \ ++ ++static struct bcm6348_pingroup bcm6348_groups[] = { ++ BCM6348_GROUP(group0), ++ BCM6348_GROUP(group1), ++ BCM6348_GROUP(group2), ++ BCM6348_GROUP(group3), ++ BCM6348_GROUP(group4), ++}; ++ ++static const char * const ext_mii_groups[] = { ++ "group0", ++ "group3", ++}; ++ ++static const char * const ext_ephy_groups[] = { ++ "group1", ++ "group4" ++}; ++ ++static const char * const mii_snoop_groups[] = { ++ "group1", ++ "group4", ++}; ++ ++static const char * const legacy_led_groups[] = { ++ "group4", ++}; ++ ++static const char * const mii_pccard_groups[] = { ++ "group1", ++}; ++ ++static const char * const pci_groups[] = { ++ "group2", ++}; ++ ++static const char * const spi_master_uart_groups[] = { ++ "group1", ++}; ++ ++static const char * const utopia_groups[] = { ++ "group0", ++ "group1", ++ "group3", ++}; ++ ++static const char * const diag_groups[] = { ++ "group0", ++ "group1", ++ "group2", ++ "group4", ++}; ++ ++#define BCM6348_FUN(n, f) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .value = BCM6348_MUX_##f, \ ++ } ++ ++static const struct bcm6348_function bcm6348_funcs[] = { ++ BCM6348_FUN(ext_mii, EXT_MII), ++ BCM6348_FUN(ext_ephy, EXT_EPHY), ++ BCM6348_FUN(mii_snoop, MII_SNOOP), ++ BCM6348_FUN(legacy_led, LEGACY_LED), ++ BCM6348_FUN(mii_pccard, MII_PCCARD), ++ BCM6348_FUN(pci, PCI), ++ BCM6348_FUN(spi_master_uart, SPI_MASTER_UART), ++ BCM6348_FUN(utopia, UTOPIA), ++ BCM6348_FUN(diag, DIAG), ++}; ++ ++static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6348_groups); ++} ++ ++static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6348_groups[group].name; ++} ++ ++static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6348_groups[group].pins; ++ *num_pins = bcm6348_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6348_funcs); ++} ++ ++static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6348_funcs[selector].name; ++} ++ ++static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6348_funcs[selector].groups; ++ *num_groups = bcm6348_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ ++ reg = __raw_readl(pctl->mode); ++ reg &= ~mask; ++ reg |= val & mask; ++ __raw_writel(reg, pctl->mode); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6348_pingroup *grp = &bcm6348_groups[group]; ++ const struct bcm6348_function *f = &bcm6348_funcs[selector]; ++ u32 group_num, mask, val; ++ ++ /* ++ * pins n..(n+7) share the same group, so we only need to look at ++ * the first pin. ++ */ ++ group_num = (unsigned long)bcm6348_pins[grp->pins[0]].drv_data; ++ mask = GROUP_MASK(group_num); ++ val = f->value << GROUP_SHIFT(group_num); ++ ++ bcm6348_rmw_mux(pctl, mask, val); ++ ++ return 0; ++} ++ ++static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ struct pin_desc *desc; ++ u32 mask; ++ ++ /* don't reconfigure if already muxed */ ++ desc = pin_desc_get(pctldev, offset); ++ if (desc->mux_usecount) ++ return 0; ++ ++ mask = GROUP_MASK(offset); ++ ++ /* disable all functions using this pin */ ++ bcm6348_rmw_mux(pctl, mask, 0); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6348_pctl_ops = { ++ .get_groups_count = bcm6348_pinctrl_get_group_count, ++ .get_group_name = bcm6348_pinctrl_get_group_name, ++ .get_group_pins = bcm6348_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6348_pmx_ops = { ++ .get_functions_count = bcm6348_pinctrl_get_func_count, ++ .get_function_name = bcm6348_pinctrl_get_func_name, ++ .get_function_groups = bcm6348_pinctrl_get_groups, ++ .set_mux = bcm6348_pinctrl_set_mux, ++ .gpio_request_enable = bcm6348_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6348_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6348_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ ++ /* disable all muxes by default */ ++ __raw_writel(0, pctl->mode); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6348_pctl_ops; ++ pctl->desc.pmxops = &bcm6348_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6348_pins); ++ pctl->desc.pins = bcm6348_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6348_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6348_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6348-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6348_pinctrl_driver = { ++ .probe = bcm6348_pinctrl_probe, ++ .driver = { ++ .name = "bcm6348-pinctrl", ++ .of_match_table = bcm6348_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6348_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.9/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.9/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch new file mode 100644 index 000000000..e8a747991 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/135-Documentation-add-BCM6358-pincontroller-binding-docu.patch @@ -0,0 +1,61 @@ +From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:36:00 +0200 +Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6358 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++ + 1 file changed, 44 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt +@@ -0,0 +1,44 @@ ++* Broadcom BCM6358 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6358-pinctrl". ++- reg: Register specifiers of dirout, dat registers. ++- reg-names: Must be "dirout", "dat". ++- brcm,gpiomode: Phandle to the shared gpiomode register. ++- gpio-controller: Identifies this node as a gpio-controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@fffe0080 { ++ compatible = "brcm,bcm6358-pinctrl"; ++ reg = <0xfffe0080 0x8>, ++ <0xfffe0088 0x8>, ++ <0xfffe0098 0x4>; ++ reg-names = "dirout", "dat"; ++ brcm,gpiomode = <&gpiomode>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++gpiomode: syscon@fffe0098 { ++ compatible = "brcm,bcm6358-gpiomode", "syscon"; ++ reg = <0xfffe0098 0x4>; ++ native-endian; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++ebi_cs_grp 30-31 ebi_cs ++uart1_grp 28-31 uart1 ++spi_cs_grp 32-33 spi_cs ++async_modem_grp 12-15 async_modem ++legacy_led_grp 9-15 legacy_led ++serial_led_grp 6-7 serial_led ++led_grp 0-3 led ++utopia_grp 12-15, 22-31 utopia ++pwm_syn_clk_grp 8 pwm_syn_clk ++sys_irq_grp 5 sys_irq diff --git a/target/linux/brcm63xx/patches-4.9/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch b/target/linux/brcm63xx/patches-4.9/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch new file mode 100644 index 000000000..87dc741e2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/136-pinctrl-add-a-pincontrol-driver-for-BCM6358.patch @@ -0,0 +1,436 @@ +From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:16:01 +0200 +Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358 + +Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different +functions onto the GPIO pins. It does not support configuring individual +pins but only whole groups. These groups may overlap, and still require +the directions to be set correctly in the GPIO register. In addition the +functions register controls other, not directly mux related functions. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 8 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++ + 3 files changed, 402 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -15,3 +15,11 @@ config PINCTRL_BCM6348 + select PINCONF + select PINCTRL_BCM63XX + select GENERIC_PINCONF ++ ++config PINCTRL_BCM6358 ++ bool "BCM6358 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF ++ select MFD_SYSCON +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1,3 +1,4 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o ++obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c +@@ -0,0 +1,393 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++/* GPIO_MODE register */ ++#define BCM6358_MODE_MUX_NONE 0 ++ ++/* overlays on gpio pins */ ++#define BCM6358_MODE_MUX_EBI_CS BIT(5) ++#define BCM6358_MODE_MUX_UART1 BIT(6) ++#define BCM6358_MODE_MUX_SPI_CS BIT(7) ++#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8) ++#define BCM6358_MODE_MUX_LEGACY_LED BIT(9) ++#define BCM6358_MODE_MUX_SERIAL_LED BIT(10) ++#define BCM6358_MODE_MUX_LED BIT(11) ++#define BCM6358_MODE_MUX_UTOPIA BIT(12) ++#define BCM6358_MODE_MUX_CLKRST BIT(13) ++#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14) ++#define BCM6358_MODE_MUX_SYS_IRQ BIT(15) ++ ++#define BCM6358_NGPIO 40 ++ ++struct bcm6358_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++ ++ const u16 mode_val; ++ ++ /* non-GPIO function muxes require the gpio direction to be set */ ++ const u16 direction; ++}; ++ ++struct bcm6358_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++}; ++ ++struct bcm6358_pinctrl { ++ struct device *dev; ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ struct regmap_field *overlays; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \ ++ BCM6358_MODE_MUX_##bit2 | \ ++ BCM6358_MODE_MUX_##bit3), \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6358_pins[] = { ++ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE), ++ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE), ++ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE), ++ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE), ++ PINCTRL_PIN(4, "gpio4"), ++ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE), ++ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE), ++ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE), ++ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE), ++ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE), ++ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE), ++ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS), ++ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS), ++ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE), ++ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++}; ++ ++static unsigned ebi_cs_grp_pins[] = { 30, 31 }; ++ ++static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 }; ++ ++static unsigned spi_cs_grp_pins[] = { 32, 33 }; ++ ++static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 }; ++ ++static unsigned serial_led_grp_pins[] = { 6, 7 }; ++ ++static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 }; ++ ++static unsigned led_grp_pins[] = { 0, 1, 2, 3 }; ++ ++static unsigned utopia_grp_pins[] = { ++ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, ++}; ++ ++static unsigned pwm_syn_clk_grp_pins[] = { 8 }; ++ ++static unsigned sys_irq_grp_pins[] = { 5 }; ++ ++#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ .mode_val = BCM6358_MODE_MUX_##bit, \ ++ .direction = dir, \ ++ } ++ ++static const struct bcm6358_pingroup bcm6358_groups[] = { ++ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3), ++ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2), ++ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6), ++ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6), ++ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f), ++ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3), ++ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf), ++ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f), ++ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1), ++ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1), ++}; ++ ++static const char * const ebi_cs_groups[] = { ++ "ebi_cs_grp" ++}; ++ ++static const char * const uart1_groups[] = { ++ "uart1_grp" ++}; ++ ++static const char * const spi_cs_2_3_groups[] = { ++ "spi_cs_2_3_grp" ++}; ++ ++static const char * const async_modem_groups[] = { ++ "async_modem_grp" ++}; ++ ++static const char * const legacy_led_groups[] = { ++ "legacy_led_grp", ++}; ++ ++static const char * const serial_led_groups[] = { ++ "serial_led_grp", ++}; ++ ++static const char * const led_groups[] = { ++ "led_grp", ++}; ++ ++static const char * const clkrst_groups[] = { ++ "clkrst_grp", ++}; ++ ++static const char * const pwm_syn_clk_groups[] = { ++ "pwm_syn_clk_grp", ++}; ++ ++static const char * const sys_irq_groups[] = { ++ "sys_irq_grp", ++}; ++ ++#define BCM6358_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ } ++ ++static const struct bcm6358_function bcm6358_funcs[] = { ++ BCM6358_FUN(ebi_cs), ++ BCM6358_FUN(uart1), ++ BCM6358_FUN(spi_cs_2_3), ++ BCM6358_FUN(async_modem), ++ BCM6358_FUN(legacy_led), ++ BCM6358_FUN(serial_led), ++ BCM6358_FUN(led), ++ BCM6358_FUN(clkrst), ++ BCM6358_FUN(pwm_syn_clk), ++ BCM6358_FUN(sys_irq), ++}; ++ ++static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6358_groups); ++} ++ ++static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6358_groups[group].name; ++} ++ ++static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6358_groups[group].pins; ++ *num_pins = bcm6358_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6358_funcs); ++} ++ ++static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6358_funcs[selector].name; ++} ++ ++static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6358_funcs[selector].groups; ++ *num_groups = bcm6358_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6358_pingroup *grp = &bcm6358_groups[group]; ++ u32 val = grp->mode_val; ++ u32 mask = val; ++ unsigned pin; ++ ++ for (pin = 0; pin < grp->num_pins; pin++) ++ mask |= (unsigned long)bcm6358_pins[pin].drv_data; ++ ++ regmap_field_update_bits(pctl->overlays, mask, val); ++ ++ for (pin = 0; pin < grp->num_pins; pin++) { ++ int hw_gpio = bcm6358_pins[pin].number; ++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32]; ++ ++ if (grp->direction & BIT(pin)) ++ gc->direction_output(gc, hw_gpio % 32, 0); ++ else ++ gc->direction_input(gc, hw_gpio % 32); ++ } ++ ++ return 0; ++} ++ ++static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ u32 mask; ++ ++ mask = (unsigned long)bcm6358_pins[offset].drv_data; ++ if (!mask) ++ return 0; ++ ++ /* disable all functions using this pin */ ++ return regmap_field_update_bits(pctl->overlays, mask, 0); ++} ++ ++static struct pinctrl_ops bcm6358_pctl_ops = { ++ .get_groups_count = bcm6358_pinctrl_get_group_count, ++ .get_group_name = bcm6358_pinctrl_get_group_name, ++ .get_group_pins = bcm6358_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6358_pmx_ops = { ++ .get_functions_count = bcm6358_pinctrl_get_func_count, ++ .get_function_name = bcm6358_pinctrl_get_func_name, ++ .get_function_groups = bcm6358_pinctrl_get_groups, ++ .set_mux = bcm6358_pinctrl_set_mux, ++ .gpio_request_enable = bcm6358_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6358_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6358_pinctrl *pctl; ++ struct regmap *mode; ++ struct reg_field overlays = REG_FIELD(0, 0, 15); ++ ++ if (pdev->dev.of_node) ++ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, ++ "brcm,gpiomode"); ++ else ++ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098"); ++ ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays); ++ if (IS_ERR(pctl->overlays)) ++ return PTR_ERR(pctl->overlays); ++ ++ /* disable all muxes by default */ ++ regmap_field_write(pctl->overlays, 0); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6358_pctl_ops; ++ pctl->desc.pmxops = &bcm6358_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins); ++ pctl->desc.pins = bcm6358_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6358_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6358_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6358-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6358_pinctrl_driver = { ++ .probe = bcm6358_pinctrl_probe, ++ .driver = { ++ .name = "bcm6358-pinctrl", ++ .of_match_table = bcm6358_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6358_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.9/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.9/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch new file mode 100644 index 000000000..9fc424cb4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/137-Documentation-add-BCM6362-pincontroller-binding-docu.patch @@ -0,0 +1,96 @@ +From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:36:18 +0200 +Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6362 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt | 79 ++++++++++++++++++++++ + 1 file changed, 79 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt +@@ -0,0 +1,79 @@ ++* Broadcom BCM6362 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6362-pinctrl" ++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers. ++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6362-pinctrl"; ++ reg = <0x10000080 0x8>, ++ <0x10000088 0x8>, ++ <0x10000090 0x4>, ++ <0x10000098 0x4>, ++ <0x1000009c 0x4>, ++ <0x100000b8 0x4>; ++ reg-names = "dirout", "dat", "led", ++ "mode", "ctrl", "basemode"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led, usb_device_led ++gpio1 1 led, sys_irq ++gpio2 2 led, serial_led_clk ++gpio3 3 led, serial_led_data ++gpio4 4 led, robosw_led_data ++gpio5 5 led, robosw_led_clk ++gpio6 6 led, robosw_led0 ++gpio7 7 led, robosw_led1 ++gpio8 8 led, inet_led ++gpio9 9 led, spi_cs2 ++gpio10 10 led, spi_cs3 ++gpio11 11 led, ntr_pulse ++gpio12 12 led, uart1_scts ++gpio13 13 led, uart1_srts ++gpio14 14 led, uart1_sdin ++gpio15 15 led, uart1_sdout ++gpio16 16 led, adsl_spi_miso ++gpio17 17 led, adsl_spi_mosi ++gpio18 18 led, adsl_spi_clk ++gpio19 19 led, adsl_spi_cs ++gpio20 20 led, ephy0_led ++gpio21 21 led, ephy1_led ++gpio22 22 led, ephy2_led ++gpio23 23 led, ephy3_led ++gpio24 24 ext_irq0 ++gpio25 25 ext_irq1 ++gpio26 26 ext_irq2 ++gpio27 27 ext_irq3 ++gpio28 28 - ++gpio29 29 - ++gpio30 30 - ++gpio31 31 - ++gpio32 32 wifi ++gpio33 33 wifi ++gpio34 34 wifi ++gpio35 35 wifi ++gpio36 36 wifi ++gpio37 37 wifi ++gpio38 38 wifi ++gpio39 39 wifi ++gpio40 40 wifi ++gpio41 41 wifi ++gpio42 42 wifi ++gpio43 43 wifi ++gpio44 44 wifi ++gpio45 45 wifi ++gpio46 46 wifi ++gpio47 47 wifi ++nand_grp 8, 12-23, 27 nand diff --git a/target/linux/brcm63xx/patches-4.9/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch b/target/linux/brcm63xx/patches-4.9/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch new file mode 100644 index 000000000..726a97f24 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/138-pinctrl-add-a-pincontrol-driver-for-BCM6362.patch @@ -0,0 +1,733 @@ +From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:17:20 +0200 +Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362 + +Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual +GPIO pins to the LED controller, to be available by the integrated +wifi, or other functions. It also supports overlay groups, of which +only NAND is documented. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++ + 3 files changed, 700 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -23,3 +23,10 @@ config PINCTRL_BCM6358 + select PINCTRL_BCM63XX + select GENERIC_PINCONF + select MFD_SYSCON ++ ++config PINCTRL_BCM6362 ++ bool "BCM6362 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o ++obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c +@@ -0,0 +1,692 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6362_NGPIO 48 ++ ++/* GPIO_BASEMODE register */ ++#define BASEMODE_NAND BIT(2) ++ ++enum bcm6362_pinctrl_reg { ++ BCM6362_LEDCTRL, ++ BCM6362_MODE, ++ BCM6362_CTRL, ++ BCM6362_BASEMODE, ++}; ++ ++struct bcm6362_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6362_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ enum bcm6362_pinctrl_reg reg; ++ u32 basemode_mask; ++}; ++ ++struct bcm6362_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *led; ++ void __iomem *mode; ++ void __iomem *ctrl; ++ void __iomem *basemode; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6362_PIN(a, b, mask) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(mask), \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6362_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ BCM6362_PIN(8, "gpio8", BASEMODE_NAND), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ BCM6362_PIN(12, "gpio12", BASEMODE_NAND), ++ BCM6362_PIN(13, "gpio13", BASEMODE_NAND), ++ BCM6362_PIN(14, "gpio14", BASEMODE_NAND), ++ BCM6362_PIN(15, "gpio15", BASEMODE_NAND), ++ BCM6362_PIN(16, "gpio16", BASEMODE_NAND), ++ BCM6362_PIN(17, "gpio17", BASEMODE_NAND), ++ BCM6362_PIN(18, "gpio18", BASEMODE_NAND), ++ BCM6362_PIN(19, "gpio19", BASEMODE_NAND), ++ BCM6362_PIN(20, "gpio20", BASEMODE_NAND), ++ BCM6362_PIN(21, "gpio21", BASEMODE_NAND), ++ BCM6362_PIN(22, "gpio22", BASEMODE_NAND), ++ BCM6362_PIN(23, "gpio23", BASEMODE_NAND), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ BCM6362_PIN(27, "gpio27", BASEMODE_NAND), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ PINCTRL_PIN(30, "gpio30"), ++ PINCTRL_PIN(31, "gpio31"), ++ PINCTRL_PIN(32, "gpio32"), ++ PINCTRL_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++ PINCTRL_PIN(40, "gpio40"), ++ PINCTRL_PIN(41, "gpio41"), ++ PINCTRL_PIN(42, "gpio42"), ++ PINCTRL_PIN(43, "gpio43"), ++ PINCTRL_PIN(44, "gpio44"), ++ PINCTRL_PIN(45, "gpio45"), ++ PINCTRL_PIN(46, "gpio46"), ++ PINCTRL_PIN(47, "gpio47"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned gpio32_pins[] = { 32 }; ++static unsigned gpio33_pins[] = { 33 }; ++static unsigned gpio34_pins[] = { 34 }; ++static unsigned gpio35_pins[] = { 35 }; ++static unsigned gpio36_pins[] = { 36 }; ++static unsigned gpio37_pins[] = { 37 }; ++static unsigned gpio38_pins[] = { 38 }; ++static unsigned gpio39_pins[] = { 39 }; ++static unsigned gpio40_pins[] = { 40 }; ++static unsigned gpio41_pins[] = { 41 }; ++static unsigned gpio42_pins[] = { 42 }; ++static unsigned gpio43_pins[] = { 43 }; ++static unsigned gpio44_pins[] = { 44 }; ++static unsigned gpio45_pins[] = { 45 }; ++static unsigned gpio46_pins[] = { 46 }; ++static unsigned gpio47_pins[] = { 47 }; ++ ++static unsigned nand_grp_pins[] = { ++ 8, 12, 13, 14, 15, 16, 17, ++ 18, 19, 20, 21, 22, 23, 27, ++}; ++ ++#define BCM6362_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6362_pingroup bcm6362_groups[] = { ++ BCM6362_GROUP(gpio0), ++ BCM6362_GROUP(gpio1), ++ BCM6362_GROUP(gpio2), ++ BCM6362_GROUP(gpio3), ++ BCM6362_GROUP(gpio4), ++ BCM6362_GROUP(gpio5), ++ BCM6362_GROUP(gpio6), ++ BCM6362_GROUP(gpio7), ++ BCM6362_GROUP(gpio8), ++ BCM6362_GROUP(gpio9), ++ BCM6362_GROUP(gpio10), ++ BCM6362_GROUP(gpio11), ++ BCM6362_GROUP(gpio12), ++ BCM6362_GROUP(gpio13), ++ BCM6362_GROUP(gpio14), ++ BCM6362_GROUP(gpio15), ++ BCM6362_GROUP(gpio16), ++ BCM6362_GROUP(gpio17), ++ BCM6362_GROUP(gpio18), ++ BCM6362_GROUP(gpio19), ++ BCM6362_GROUP(gpio20), ++ BCM6362_GROUP(gpio21), ++ BCM6362_GROUP(gpio22), ++ BCM6362_GROUP(gpio23), ++ BCM6362_GROUP(gpio24), ++ BCM6362_GROUP(gpio25), ++ BCM6362_GROUP(gpio26), ++ BCM6362_GROUP(gpio27), ++ BCM6362_GROUP(gpio28), ++ BCM6362_GROUP(gpio29), ++ BCM6362_GROUP(gpio30), ++ BCM6362_GROUP(gpio31), ++ BCM6362_GROUP(gpio32), ++ BCM6362_GROUP(gpio33), ++ BCM6362_GROUP(gpio34), ++ BCM6362_GROUP(gpio35), ++ BCM6362_GROUP(gpio36), ++ BCM6362_GROUP(gpio37), ++ BCM6362_GROUP(gpio38), ++ BCM6362_GROUP(gpio39), ++ BCM6362_GROUP(gpio40), ++ BCM6362_GROUP(gpio41), ++ BCM6362_GROUP(gpio42), ++ BCM6362_GROUP(gpio43), ++ BCM6362_GROUP(gpio44), ++ BCM6362_GROUP(gpio45), ++ BCM6362_GROUP(gpio46), ++ BCM6362_GROUP(gpio47), ++ BCM6362_GROUP(nand_grp), ++}; ++ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++static const char * const usb_device_led_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const sys_irq_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio2", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio3", ++}; ++ ++static const char * const robosw_led_data_groups[] = { ++ "gpio4", ++}; ++ ++static const char * const robosw_led_clk_groups[] = { ++ "gpio5", ++}; ++ ++static const char * const robosw_led0_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const robosw_led1_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const inet_led_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const spi_cs2_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const spi_cs3_groups[] = { ++ "gpio10", ++}; ++ ++static const char * const ntr_pulse_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const uart1_scts_groups[] = { ++ "gpio12", ++}; ++ ++static const char * const uart1_srts_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const uart1_sdin_groups[] = { ++ "gpio14", ++}; ++ ++static const char * const uart1_sdout_groups[] = { ++ "gpio15", ++}; ++ ++static const char * const adsl_spi_miso_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const adsl_spi_mosi_groups[] = { ++ "gpio17", ++}; ++ ++static const char * const adsl_spi_clk_groups[] = { ++ "gpio18", ++}; ++ ++static const char * const adsl_spi_cs_groups[] = { ++ "gpio19", ++}; ++ ++static const char * const ephy0_led_groups[] = { ++ "gpio20", ++}; ++ ++static const char * const ephy1_led_groups[] = { ++ "gpio21", ++}; ++ ++static const char * const ephy2_led_groups[] = { ++ "gpio22", ++}; ++ ++static const char * const ephy3_led_groups[] = { ++ "gpio23", ++}; ++ ++static const char * const ext_irq0_groups[] = { ++ "gpio24", ++}; ++ ++static const char * const ext_irq1_groups[] = { ++ "gpio25", ++}; ++ ++static const char * const ext_irq2_groups[] = { ++ "gpio26", ++}; ++ ++static const char * const ext_irq3_groups[] = { ++ "gpio27", ++}; ++ ++static const char * const wifi_groups[] = { ++ "gpio32", ++ "gpio33", ++ "gpio34", ++ "gpio35", ++ "gpio36", ++ "gpio37", ++ "gpio38", ++ "gpio39", ++ "gpio40", ++ "gpio41", ++ "gpio42", ++ "gpio43", ++ "gpio44", ++ "gpio45", ++ "gpio46", ++ "gpio47", ++}; ++ ++static const char * const nand_groups[] = { ++ "nand_grp", ++}; ++ ++#define BCM6362_LED_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_LEDCTRL, \ ++ } ++ ++#define BCM6362_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_MODE, \ ++ } ++ ++#define BCM6362_CTRL_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_CTRL, \ ++ } ++ ++#define BCM6362_BASEMODE_FUN(n, mask) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM6362_BASEMODE, \ ++ .basemode_mask = (mask), \ ++ } ++ ++static const struct bcm6362_function bcm6362_funcs[] = { ++ BCM6362_LED_FUN(led), ++ BCM6362_MODE_FUN(usb_device_led), ++ BCM6362_MODE_FUN(sys_irq), ++ BCM6362_MODE_FUN(serial_led_clk), ++ BCM6362_MODE_FUN(serial_led_data), ++ BCM6362_MODE_FUN(robosw_led_data), ++ BCM6362_MODE_FUN(robosw_led_clk), ++ BCM6362_MODE_FUN(robosw_led0), ++ BCM6362_MODE_FUN(robosw_led1), ++ BCM6362_MODE_FUN(inet_led), ++ BCM6362_MODE_FUN(spi_cs2), ++ BCM6362_MODE_FUN(spi_cs3), ++ BCM6362_MODE_FUN(ntr_pulse), ++ BCM6362_MODE_FUN(uart1_scts), ++ BCM6362_MODE_FUN(uart1_srts), ++ BCM6362_MODE_FUN(uart1_sdin), ++ BCM6362_MODE_FUN(uart1_sdout), ++ BCM6362_MODE_FUN(adsl_spi_miso), ++ BCM6362_MODE_FUN(adsl_spi_mosi), ++ BCM6362_MODE_FUN(adsl_spi_clk), ++ BCM6362_MODE_FUN(adsl_spi_cs), ++ BCM6362_MODE_FUN(ephy0_led), ++ BCM6362_MODE_FUN(ephy1_led), ++ BCM6362_MODE_FUN(ephy2_led), ++ BCM6362_MODE_FUN(ephy3_led), ++ BCM6362_MODE_FUN(ext_irq0), ++ BCM6362_MODE_FUN(ext_irq1), ++ BCM6362_MODE_FUN(ext_irq2), ++ BCM6362_MODE_FUN(ext_irq3), ++ BCM6362_CTRL_FUN(wifi), ++ BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND), ++}; ++ ++static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6362_groups); ++} ++ ++static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6362_groups[group].name; ++} ++ ++static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6362_groups[group].pins; ++ *num_pins = bcm6362_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6362_funcs); ++} ++ ++static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6362_funcs[selector].name; ++} ++ ++static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6362_funcs[selector].groups; ++ *num_groups = bcm6362_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg, ++ u32 mask, u32 val) ++{ ++ unsigned long flags; ++ u32 tmp; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ tmp = __raw_readl(reg); ++ tmp &= ~mask; ++ tmp |= val & mask; ++ __raw_writel(tmp, reg); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin) ++{ ++ const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin]; ++ u32 mask = BIT(pin % 32); ++ ++ if (desc->drv_data) ++ bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0); ++ ++ if (pin < 32) { ++ /* base mode 0 => gpio 1 => mux function */ ++ bcm6362_rmw_mux(pctl, pctl->mode, mask, 0); ++ ++ /* pins 0-23 might be muxed to led */ ++ if (pin < 24) ++ bcm6362_rmw_mux(pctl, pctl->led, mask, 0); ++ } else { ++ /* ctrl reg 0 => wifi function 1 => gpio */ ++ bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask); ++ } ++} ++ ++static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6362_pingroup *grp = &bcm6362_groups[group]; ++ const struct bcm6362_function *f = &bcm6362_funcs[selector]; ++ unsigned i; ++ void __iomem *reg; ++ u32 val, mask; ++ ++ for (i = 0; i < grp->num_pins; i++) ++ bcm6362_set_gpio(pctl, grp->pins[i]); ++ ++ switch (f->reg) { ++ case BCM6362_LEDCTRL: ++ reg = pctl->led; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM6362_MODE: ++ reg = pctl->ctrl; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM6362_CTRL: ++ reg = pctl->ctrl; ++ mask = BIT(grp->pins[0]); ++ val = 0; ++ break; ++ case BCM6362_BASEMODE: ++ reg = pctl->basemode; ++ mask = f->basemode_mask; ++ val = f->basemode_mask; ++ break; ++ default: ++ WARN_ON(1); ++ return -EINVAL; ++ } ++ ++ bcm6362_rmw_mux(pctl, reg, mask, val); ++ ++ return 0; ++} ++ ++static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ bcm6362_set_gpio(pctl, offset); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6362_pctl_ops = { ++ .get_groups_count = bcm6362_pinctrl_get_group_count, ++ .get_group_name = bcm6362_pinctrl_get_group_name, ++ .get_group_pins = bcm6362_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6362_pmx_ops = { ++ .get_functions_count = bcm6362_pinctrl_get_func_count, ++ .get_function_name = bcm6362_pinctrl_get_func_name, ++ .get_function_groups = bcm6362_pinctrl_get_groups, ++ .set_mux = bcm6362_pinctrl_set_mux, ++ .gpio_request_enable = bcm6362_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6362_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6362_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *led, *mode, *ctrl, *basemode; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led"); ++ led = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(led)) ++ return PTR_ERR(led); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl"); ++ ctrl = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(ctrl)) ++ return PTR_ERR(ctrl); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode"); ++ basemode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(basemode)) ++ return PTR_ERR(basemode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->led = led; ++ pctl->mode = mode; ++ pctl->ctrl = ctrl; ++ pctl->basemode = basemode; ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6362_pctl_ops; ++ pctl->desc.pmxops = &bcm6362_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6362_pins); ++ pctl->desc.pins = bcm6362_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6362_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6362_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6362-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6362_pinctrl_driver = { ++ .probe = bcm6362_pinctrl_probe, ++ .driver = { ++ .name = "bcm6362-pinctrl", ++ .of_match_table = bcm6362_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6362_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.9/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.9/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch new file mode 100644 index 000000000..e0a698fc1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/139-Documentation-add-BCM6368-pincontroller-binding-docu.patch @@ -0,0 +1,84 @@ +From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:36:51 +0200 +Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6368 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++ + 1 file changed, 67 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt +@@ -0,0 +1,67 @@ ++* Broadcom BCM6368 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6368-pinctrl". ++- reg: Register specifiers of dirout, dat, mode registers. ++- reg-names: Must be "dirout", "dat", "mode". ++- brcm,gpiobasemode: Phandle to the gpio basemode register. ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6368-pinctrl"; ++ reg = <0x10000080 0x08>, ++ <0x10000088 0x08>, ++ <0x10000098 0x04>; ++ reg-names = "dirout", "dat", "mode"; ++ brcm,gpiobasemode = <&gpiobasemode>; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++gpiobasemode: syscon@100000b8 { ++ compatible = "brcm,bcm6368-gpiobasemode", "syscon"; ++ reg = <0x100000b8 4>; ++ native-endian; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 analog_afe0 ++gpio1 1 analog_afe1 ++gpio2 2 sys_irq ++gpio3 3 serial_led_data ++gpio4 4 serial_led_clk ++gpio5 5 inet_led ++gpio6 6 ephy0_led ++gpio7 7 ephy1_led ++gpio8 8 ephy2_led ++gpio9 9 ephy3_led ++gpio10 10 robosw_led_data ++gpio11 11 robosw_led_clk ++gpio12 12 robosw_led0 ++gpio13 13 robosw_led1 ++gpio14 14 usb_device_led ++gpio15 15 - ++gpio16 16 pci_req1 ++gpio17 17 pci_gnt1 ++gpio18 18 pci_intb ++gpio19 19 pci_req0 ++gpio20 20 pci_gnt0 ++gpio21 21 - ++gpio22 22 pcmcia_cd1 ++gpio23 23 pcmcia_cd2 ++gpio24 24 pcmcia_vs1 ++gpio25 25 pcmcia_vs2 ++gpio26 26 ebi_cs2 ++gpio27 27 ebi_cs3 ++gpio28 28 spi_cs2 ++gpio29 29 spi_cs3 ++gpio30 30 spi_cs4 ++gpio31 31 spi_cs5 ++uart1_grp 30-33 uart1 diff --git a/target/linux/brcm63xx/patches-4.9/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch b/target/linux/brcm63xx/patches-4.9/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch new file mode 100644 index 000000000..6a9b9e080 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/140-pinctrl-add-a-pincontrol-driver-for-BCM6368.patch @@ -0,0 +1,620 @@ +From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:18:25 +0200 +Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368 + +Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32 +GPIOs onto alternative functions. Not all are documented. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 15 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++ + 3 files changed, 589 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -30,3 +30,18 @@ config PINCTRL_BCM6362 + select PINCONF + select PINCTRL_BCM63XX + select GENERIC_PINCONF ++ ++config PINCTRL_BCM6368 ++ bool "BCM6368 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF ++ select MFD_SYSCON ++ ++config PINCTRL_BCM63268 ++ bool "BCM63268 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o + obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o ++obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c +@@ -0,0 +1,573 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6368_NGPIO 38 ++ ++#define BCM6368_BASEMODE_MASK 0x7 ++#define BCM6368_BASEMODE_GPIO 0x0 ++#define BCM6368_BASEMODE_UART1 0x1 ++ ++struct bcm6368_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6368_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ unsigned dir_out:16; ++ unsigned basemode:3; ++}; ++ ++struct bcm6368_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ struct regmap_field *overlay; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM6368_BASEMODE_PIN(a, b) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)true \ ++ } ++ ++static const struct pinctrl_pin_desc bcm6368_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ PINCTRL_PIN(8, "gpio8"), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ PINCTRL_PIN(12, "gpio12"), ++ PINCTRL_PIN(13, "gpio13"), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ PINCTRL_PIN(27, "gpio27"), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ BCM6368_BASEMODE_PIN(30, "gpio30"), ++ BCM6368_BASEMODE_PIN(31, "gpio31"), ++ BCM6368_BASEMODE_PIN(32, "gpio32"), ++ BCM6368_BASEMODE_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 }; ++ ++#define BCM6368_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6368_pingroup bcm6368_groups[] = { ++ BCM6368_GROUP(gpio0), ++ BCM6368_GROUP(gpio1), ++ BCM6368_GROUP(gpio2), ++ BCM6368_GROUP(gpio3), ++ BCM6368_GROUP(gpio4), ++ BCM6368_GROUP(gpio5), ++ BCM6368_GROUP(gpio6), ++ BCM6368_GROUP(gpio7), ++ BCM6368_GROUP(gpio8), ++ BCM6368_GROUP(gpio9), ++ BCM6368_GROUP(gpio10), ++ BCM6368_GROUP(gpio11), ++ BCM6368_GROUP(gpio12), ++ BCM6368_GROUP(gpio13), ++ BCM6368_GROUP(gpio14), ++ BCM6368_GROUP(gpio15), ++ BCM6368_GROUP(gpio16), ++ BCM6368_GROUP(gpio17), ++ BCM6368_GROUP(gpio18), ++ BCM6368_GROUP(gpio19), ++ BCM6368_GROUP(gpio20), ++ BCM6368_GROUP(gpio21), ++ BCM6368_GROUP(gpio22), ++ BCM6368_GROUP(gpio23), ++ BCM6368_GROUP(gpio24), ++ BCM6368_GROUP(gpio25), ++ BCM6368_GROUP(gpio26), ++ BCM6368_GROUP(gpio27), ++ BCM6368_GROUP(gpio28), ++ BCM6368_GROUP(gpio29), ++ BCM6368_GROUP(gpio30), ++ BCM6368_GROUP(gpio31), ++ BCM6368_GROUP(uart1_grp), ++}; ++ ++static const char * const analog_afe_0_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const analog_afe_1_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const sys_irq_groups[] = { ++ "gpio2", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio3", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio4", ++}; ++ ++static const char * const inet_led_groups[] = { ++ "gpio5", ++}; ++ ++static const char * const ephy0_led_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const ephy1_led_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const ephy2_led_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const ephy3_led_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const robosw_led_data_groups[] = { ++ "gpio10", ++}; ++ ++static const char * const robosw_led_clk_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const robosw_led0_groups[] = { ++ "gpio12", ++}; ++ ++static const char * const robosw_led1_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const usb_device_led_groups[] = { ++ "gpio14", ++}; ++ ++static const char * const pci_req1_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const pci_gnt1_groups[] = { ++ "gpio17", ++}; ++ ++static const char * const pci_intb_groups[] = { ++ "gpio18", ++}; ++ ++static const char * const pci_req0_groups[] = { ++ "gpio19", ++}; ++ ++static const char * const pci_gnt0_groups[] = { ++ "gpio20", ++}; ++ ++static const char * const pcmcia_cd1_groups[] = { ++ "gpio22", ++}; ++ ++static const char * const pcmcia_cd2_groups[] = { ++ "gpio23", ++}; ++ ++static const char * const pcmcia_vs1_groups[] = { ++ "gpio24", ++}; ++ ++static const char * const pcmcia_vs2_groups[] = { ++ "gpio25", ++}; ++ ++static const char * const ebi_cs2_groups[] = { ++ "gpio26", ++}; ++ ++static const char * const ebi_cs3_groups[] = { ++ "gpio27", ++}; ++ ++static const char * const spi_cs2_groups[] = { ++ "gpio28", ++}; ++ ++static const char * const spi_cs3_groups[] = { ++ "gpio29", ++}; ++ ++static const char * const spi_cs4_groups[] = { ++ "gpio30", ++}; ++ ++static const char * const spi_cs5_groups[] = { ++ "gpio31", ++}; ++ ++static const char * const uart1_groups[] = { ++ "uart1_grp", ++}; ++ ++#define BCM6368_FUN(n, out) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .dir_out = out, \ ++ } ++ ++#define BCM6368_BASEMODE_FUN(n, val, out) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .basemode = BCM6368_BASEMODE_##val, \ ++ .dir_out = out, \ ++ } ++ ++static const struct bcm6368_function bcm6368_funcs[] = { ++ BCM6368_FUN(analog_afe_0, 1), ++ BCM6368_FUN(analog_afe_1, 1), ++ BCM6368_FUN(sys_irq, 1), ++ BCM6368_FUN(serial_led_data, 1), ++ BCM6368_FUN(serial_led_clk, 1), ++ BCM6368_FUN(inet_led, 1), ++ BCM6368_FUN(ephy0_led, 1), ++ BCM6368_FUN(ephy1_led, 1), ++ BCM6368_FUN(ephy2_led, 1), ++ BCM6368_FUN(ephy3_led, 1), ++ BCM6368_FUN(robosw_led_data, 1), ++ BCM6368_FUN(robosw_led_clk, 1), ++ BCM6368_FUN(robosw_led0, 1), ++ BCM6368_FUN(robosw_led1, 1), ++ BCM6368_FUN(usb_device_led, 1), ++ BCM6368_FUN(pci_req1, 0), ++ BCM6368_FUN(pci_gnt1, 0), ++ BCM6368_FUN(pci_intb, 0), ++ BCM6368_FUN(pci_req0, 0), ++ BCM6368_FUN(pci_gnt0, 0), ++ BCM6368_FUN(pcmcia_cd1, 0), ++ BCM6368_FUN(pcmcia_cd2, 0), ++ BCM6368_FUN(pcmcia_vs1, 0), ++ BCM6368_FUN(pcmcia_vs2, 0), ++ BCM6368_FUN(ebi_cs2, 1), ++ BCM6368_FUN(ebi_cs3, 1), ++ BCM6368_FUN(spi_cs2, 1), ++ BCM6368_FUN(spi_cs3, 1), ++ BCM6368_FUN(spi_cs4, 1), ++ BCM6368_FUN(spi_cs5, 1), ++ BCM6368_BASEMODE_FUN(uart1, UART1, 0x6), ++}; ++ ++static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6368_groups); ++} ++ ++static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6368_groups[group].name; ++} ++ ++static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6368_groups[group].pins; ++ *num_pins = bcm6368_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6368_funcs); ++} ++ ++static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6368_funcs[selector].name; ++} ++ ++static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6368_funcs[selector].groups; ++ *num_groups = bcm6368_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg, ++ u32 mask, u32 val) ++{ ++ u32 tmp; ++ ++ tmp = __raw_readl(reg); ++ tmp &= ~mask; ++ tmp |= (val & mask); ++ __raw_writel(tmp, reg); ++} ++ ++static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6368_pingroup *grp = &bcm6368_groups[group]; ++ const struct bcm6368_function *fun = &bcm6368_funcs[selector]; ++ unsigned long flags; ++ int i, pin; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ if (fun->basemode) { ++ u32 mask = 0; ++ ++ for (i = 0; i < grp->num_pins; i++) { ++ pin = grp->pins[i]; ++ if (pin < 32) ++ mask |= BIT(pin); ++ } ++ ++ bcm6368_rmw_mux(pctl, pctl->mode, mask, 0); ++ regmap_field_write(pctl->overlay, fun->basemode); ++ } else { ++ pin = grp->pins[0]; ++ ++ if (bcm6368_pins[pin].drv_data) ++ regmap_field_write(pctl->overlay, ++ BCM6368_BASEMODE_GPIO); ++ ++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin)); ++ } ++ spin_unlock_irqrestore(&pctl->lock, flags); ++ ++ for (pin = 0; pin < grp->num_pins; pin++) { ++ int hw_gpio = bcm6368_pins[pin].number; ++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32]; ++ ++ if (fun->dir_out & BIT(pin)) ++ gc->direction_output(gc, hw_gpio % 32, 0); ++ else ++ gc->direction_input(gc, hw_gpio % 32); ++ } ++ ++ return 0; ++} ++ ++static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ unsigned long flags; ++ ++ if (offset >= 32 && !bcm6368_pins[offset].drv_data) ++ return 0; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ /* disable all functions using this pin */ ++ if (offset < 32) ++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0); ++ ++ if (bcm6368_pins[offset].drv_data) ++ regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6368_pctl_ops = { ++ .get_groups_count = bcm6368_pinctrl_get_group_count, ++ .get_group_name = bcm6368_pinctrl_get_group_name, ++ .get_group_pins = bcm6368_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6368_pmx_ops = { ++ .get_functions_count = bcm6368_pinctrl_get_func_count, ++ .get_function_name = bcm6368_pinctrl_get_func_name, ++ .get_function_groups = bcm6368_pinctrl_get_groups, ++ .set_mux = bcm6368_pinctrl_set_mux, ++ .gpio_request_enable = bcm6368_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6368_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6368_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode; ++ struct regmap *basemode; ++ struct reg_field overlay = REG_FIELD(0, 0, 3); ++ ++ if (pdev->dev.of_node) ++ basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, ++ "brcm,gpiobasemode"); ++ else ++ basemode = syscon_regmap_lookup_by_pdevname("syscon.b00000b8"); ++ ++ if (IS_ERR(basemode)) ++ return PTR_ERR(basemode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay); ++ if (IS_ERR(pctl->overlay)) ++ return PTR_ERR(pctl->overlay); ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ ++ /* disable all muxes by default */ ++ __raw_writel(0, pctl->mode); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6368_pctl_ops; ++ pctl->desc.pmxops = &bcm6368_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6368_pins); ++ pctl->desc.pins = bcm6368_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6368_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6368_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6368-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6368_pinctrl_driver = { ++ .probe = bcm6368_pinctrl_probe, ++ .driver = { ++ .name = "bcm6368-pinctrl", ++ .of_match_table = bcm6368_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6368_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.9/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch b/target/linux/brcm63xx/patches-4.9/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch new file mode 100644 index 000000000..ffe842fd7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/141-Documentation-add-BCM63268-pincontroller-binding-doc.patch @@ -0,0 +1,106 @@ +From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:37:08 +0200 +Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in the BCM63268 +family SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++ + 1 file changed, 88 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt +@@ -0,0 +1,88 @@ ++* Broadcom BCM63268 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6362-pinctrl". ++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers. ++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode". ++- gpio-controller: Identifies this node as a GPIO controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@100000c0 { ++ compatible = "brcm,bcm63268-pinctrl"; ++ reg = <0x100000c0 0x8>, ++ <0x100000c8 0x8>, ++ <0x100000d0 0x4>, ++ <0x100000d8 0x4>, ++ <0x100000dc 0x4>, ++ <0x100000f8 0x4>; ++ reg-names = "dirout", "dat", "led", "mode", ++ "ctrl", "basemode"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led, serial_led_clk ++gpio1 1 led, serial_led_data ++gpio2 2 led, ++gpio3 3 led, ++gpio4 4 led, ++gpio5 5 led, ++gpio6 6 led, ++gpio7 7 led, ++gpio8 8 led, hsspi_cs6 ++gpio9 9 led, hsspi_cs7 ++gpio10 10 led, uart1_scts ++gpio11 11 led, uart1_srts ++gpio12 12 led, uart1_sdin ++gpio13 13 led, uart1_sdout ++gpio14 14 led, ntr_pulse_in ++gpio15 15 led, dsl_ntr_pulse_out ++gpio16 16 led, hsspi_cs4 ++gpio17 17 led, hsspi_cs5 ++gpio18 18 led, adsl_spi_miso ++gpio19 19 led, adsl_spi_mosi ++gpio20 20 led, ++gpio21 21 led, ++gpio22 22 led, vreg_clk ++gpio23 23 led, pcie_clkreq_b ++gpio24 24 uart1_scts ++gpio25 25 uart1_srts ++gpio26 26 uart1_sdin ++gpio27 27 uart1_sdout ++gpio28 28 ntr_pulse_in ++gpio29 29 dsl_ntr_pulse_out ++gpio30 30 switch_led_clk ++gpio31 31 switch_led_data ++gpio32 32 wifi ++gpio33 33 wifi ++gpio34 34 wifi ++gpio35 35 wifi ++gpio36 36 wifi ++gpio37 37 wifi ++gpio38 38 wifi ++gpio39 39 wifi ++gpio40 40 wifi ++gpio41 41 wifi ++gpio42 42 wifi ++gpio43 43 wifi ++gpio44 44 wifi ++gpio45 45 wifi ++gpio46 46 wifi ++gpio47 47 wifi ++gpio48 48 wifi ++gpio49 49 wifi ++gpio50 50 wifi ++gpio51 51 wifi ++nand_grp 2-7,24-31 nand ++dect_pd_grp 8-9 dect_pd ++vdsl_phy0_grp 10-11 vdsl_phy0 ++vdsl_phy1_grp 12-13 vdsl_phy1 ++vdsl_phy2_grp 24-25 vdsl_phy2 ++vdsl_phy3_grp 26-27 vdsl_phy3 diff --git a/target/linux/brcm63xx/patches-4.9/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.9/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch new file mode 100644 index 000000000..089d14e3e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/142-pinctrl-add-a-pincontrol-driver-for-BCM63268.patch @@ -0,0 +1,736 @@ +From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:19:12 +0200 +Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268 + +Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs +to different functions. Depending on the mux, these are either single +pin configurations or whole pin groups. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++ + 2 files changed, 711 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c + +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o + obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o + obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o ++obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c +@@ -0,0 +1,710 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM63268_NGPIO 52 ++ ++/* GPIO_BASEMODE register */ ++#define BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */ ++#define BASEMODE_GPIO35 BIT(4) /* GPIO 35 */ ++#define BASEMODE_DECTPD BIT(5) /* GPIOs 8/9 */ ++#define BASEMODE_VDSL_PHY_0 BIT(6) /* GPIOs 10/11 */ ++#define BASEMODE_VDSL_PHY_1 BIT(7) /* GPIOs 12/13 */ ++#define BASEMODE_VDSL_PHY_2 BIT(8) /* GPIOs 24/25 */ ++#define BASEMODE_VDSL_PHY_3 BIT(9) /* GPIOs 26/27 */ ++ ++enum bcm63268_pinctrl_reg { ++ BCM63268_LEDCTRL, ++ BCM63268_MODE, ++ BCM63268_CTRL, ++ BCM63268_BASEMODE, ++}; ++ ++struct bcm63268_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm63268_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ enum bcm63268_pinctrl_reg reg; ++ u32 mask; ++}; ++ ++struct bcm63268_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *led; ++ void __iomem *mode; ++ void __iomem *ctrl; ++ void __iomem *basemode; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++#define BCM63268_PIN(a, b, basemode) \ ++ { \ ++ .number = a, \ ++ .name = b, \ ++ .drv_data = (void *)(basemode) \ ++ } ++ ++static const struct pinctrl_pin_desc bcm63268_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ BCM63268_PIN(2, "gpio2", BASEMODE_NAND), ++ BCM63268_PIN(3, "gpio3", BASEMODE_NAND), ++ BCM63268_PIN(4, "gpio4", BASEMODE_NAND), ++ BCM63268_PIN(5, "gpio5", BASEMODE_NAND), ++ BCM63268_PIN(6, "gpio6", BASEMODE_NAND), ++ BCM63268_PIN(7, "gpio7", BASEMODE_NAND), ++ BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD), ++ BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD), ++ BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0), ++ BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0), ++ BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1), ++ BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2), ++ BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2), ++ BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3), ++ BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3), ++ BCM63268_PIN(28, "gpio28", BASEMODE_NAND), ++ BCM63268_PIN(29, "gpio29", BASEMODE_NAND), ++ BCM63268_PIN(30, "gpio30", BASEMODE_NAND), ++ BCM63268_PIN(31, "gpio31", BASEMODE_NAND), ++ PINCTRL_PIN(32, "gpio32"), ++ PINCTRL_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++ PINCTRL_PIN(40, "gpio40"), ++ PINCTRL_PIN(41, "gpio41"), ++ PINCTRL_PIN(42, "gpio42"), ++ PINCTRL_PIN(43, "gpio43"), ++ PINCTRL_PIN(44, "gpio44"), ++ PINCTRL_PIN(45, "gpio45"), ++ PINCTRL_PIN(46, "gpio46"), ++ PINCTRL_PIN(47, "gpio47"), ++ PINCTRL_PIN(48, "gpio48"), ++ PINCTRL_PIN(49, "gpio49"), ++ PINCTRL_PIN(50, "gpio50"), ++ PINCTRL_PIN(51, "gpio51"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned gpio32_pins[] = { 32 }; ++static unsigned gpio33_pins[] = { 33 }; ++static unsigned gpio34_pins[] = { 34 }; ++static unsigned gpio35_pins[] = { 35 }; ++static unsigned gpio36_pins[] = { 36 }; ++static unsigned gpio37_pins[] = { 37 }; ++static unsigned gpio38_pins[] = { 38 }; ++static unsigned gpio39_pins[] = { 39 }; ++static unsigned gpio40_pins[] = { 40 }; ++static unsigned gpio41_pins[] = { 41 }; ++static unsigned gpio42_pins[] = { 42 }; ++static unsigned gpio43_pins[] = { 43 }; ++static unsigned gpio44_pins[] = { 44 }; ++static unsigned gpio45_pins[] = { 45 }; ++static unsigned gpio46_pins[] = { 46 }; ++static unsigned gpio47_pins[] = { 47 }; ++static unsigned gpio48_pins[] = { 48 }; ++static unsigned gpio49_pins[] = { 49 }; ++static unsigned gpio50_pins[] = { 50 }; ++static unsigned gpio51_pins[] = { 51 }; ++ ++static unsigned nand_grp_pins[] = { ++ 2, 3, 4, 5, 6, 7, 24, ++ 25, 26, 27, 28, 29, 30, 31, ++}; ++ ++static unsigned dectpd_grp_pins[] = { 8, 9 }; ++static unsigned vdsl_phy0_grp_pins[] = { 10, 11 }; ++static unsigned vdsl_phy1_grp_pins[] = { 12, 13 }; ++static unsigned vdsl_phy2_grp_pins[] = { 24, 25 }; ++static unsigned vdsl_phy3_grp_pins[] = { 26, 27 }; ++ ++#define BCM63268_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm63268_pingroup bcm63268_groups[] = { ++ BCM63268_GROUP(gpio0), ++ BCM63268_GROUP(gpio1), ++ BCM63268_GROUP(gpio2), ++ BCM63268_GROUP(gpio3), ++ BCM63268_GROUP(gpio4), ++ BCM63268_GROUP(gpio5), ++ BCM63268_GROUP(gpio6), ++ BCM63268_GROUP(gpio7), ++ BCM63268_GROUP(gpio8), ++ BCM63268_GROUP(gpio9), ++ BCM63268_GROUP(gpio10), ++ BCM63268_GROUP(gpio11), ++ BCM63268_GROUP(gpio12), ++ BCM63268_GROUP(gpio13), ++ BCM63268_GROUP(gpio14), ++ BCM63268_GROUP(gpio15), ++ BCM63268_GROUP(gpio16), ++ BCM63268_GROUP(gpio17), ++ BCM63268_GROUP(gpio18), ++ BCM63268_GROUP(gpio19), ++ BCM63268_GROUP(gpio20), ++ BCM63268_GROUP(gpio21), ++ BCM63268_GROUP(gpio22), ++ BCM63268_GROUP(gpio23), ++ BCM63268_GROUP(gpio24), ++ BCM63268_GROUP(gpio25), ++ BCM63268_GROUP(gpio26), ++ BCM63268_GROUP(gpio27), ++ BCM63268_GROUP(gpio28), ++ BCM63268_GROUP(gpio29), ++ BCM63268_GROUP(gpio30), ++ BCM63268_GROUP(gpio31), ++ BCM63268_GROUP(gpio32), ++ BCM63268_GROUP(gpio33), ++ BCM63268_GROUP(gpio34), ++ BCM63268_GROUP(gpio35), ++ BCM63268_GROUP(gpio36), ++ BCM63268_GROUP(gpio37), ++ BCM63268_GROUP(gpio38), ++ BCM63268_GROUP(gpio39), ++ BCM63268_GROUP(gpio40), ++ BCM63268_GROUP(gpio41), ++ BCM63268_GROUP(gpio42), ++ BCM63268_GROUP(gpio43), ++ BCM63268_GROUP(gpio44), ++ BCM63268_GROUP(gpio45), ++ BCM63268_GROUP(gpio46), ++ BCM63268_GROUP(gpio47), ++ BCM63268_GROUP(gpio48), ++ BCM63268_GROUP(gpio49), ++ BCM63268_GROUP(gpio50), ++ BCM63268_GROUP(gpio51), ++ ++ /* multi pin groups */ ++ BCM63268_GROUP(nand_grp), ++ BCM63268_GROUP(dectpd_grp), ++ BCM63268_GROUP(vdsl_phy0_grp), ++ BCM63268_GROUP(vdsl_phy1_grp), ++ BCM63268_GROUP(vdsl_phy2_grp), ++ BCM63268_GROUP(vdsl_phy3_grp), ++}; ++ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const hsspi_cs4_groups[] = { ++ "gpio16", ++}; ++ ++static const char * const hsspi_cs5_groups[] = { ++ "gpio17", ++}; ++ ++static const char * const hsspi_cs6_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const hsspi_cs7_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const uart1_scts_groups[] = { ++ "gpio10", ++ "gpio24", ++}; ++ ++static const char * const uart1_srts_groups[] = { ++ "gpio11", ++ "gpio25", ++}; ++ ++static const char * const uart1_sdin_groups[] = { ++ "gpio12", ++ "gpio26", ++}; ++ ++static const char * const uart1_sdout_groups[] = { ++ "gpio13", ++ "gpio27", ++}; ++ ++static const char * const ntr_pulse_in_groups[] = { ++ "gpio14", ++ "gpio28", ++}; ++ ++static const char * const dsl_ntr_pulse_out_groups[] = { ++ "gpio15", ++ "gpio29", ++}; ++ ++static const char * const adsl_spi_miso_groups[] = { ++ "gpio18", ++}; ++ ++static const char * const adsl_spi_mosi_groups[] = { ++ "gpio19", ++}; ++ ++static const char * const vreg_clk_groups[] = { ++ "gpio22", ++}; ++ ++static const char * const pcie_clkreq_b_groups[] = { ++ "gpio23", ++}; ++ ++static const char * const switch_led_clk_groups[] = { ++ "gpio30", ++}; ++ ++static const char * const switch_led_data_groups[] = { ++ "gpio31", ++}; ++ ++static const char * const wifi_groups[] = { ++ "gpio32", ++ "gpio33", ++ "gpio34", ++ "gpio35", ++ "gpio36", ++ "gpio37", ++ "gpio38", ++ "gpio39", ++ "gpio40", ++ "gpio41", ++ "gpio42", ++ "gpio43", ++ "gpio44", ++ "gpio45", ++ "gpio46", ++ "gpio47", ++ "gpio48", ++ "gpio49", ++ "gpio50", ++ "gpio51", ++}; ++ ++static const char * const nand_groups[] = { ++ "nand_grp", ++}; ++ ++static const char * const dectpd_groups[] = { ++ "dectpd_grp", ++}; ++ ++static const char * const vdsl_phy_override_0_groups[] = { ++ "vdsl_phy_override_0_grp", ++}; ++ ++static const char * const vdsl_phy_override_1_groups[] = { ++ "vdsl_phy_override_1_grp", ++}; ++ ++static const char * const vdsl_phy_override_2_groups[] = { ++ "vdsl_phy_override_2_grp", ++}; ++ ++static const char * const vdsl_phy_override_3_groups[] = { ++ "vdsl_phy_override_3_grp", ++}; ++ ++#define BCM63268_LED_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_LEDCTRL, \ ++ } ++ ++#define BCM63268_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_MODE, \ ++ } ++ ++#define BCM63268_CTRL_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_CTRL, \ ++ } ++ ++#define BCM63268_BASEMODE_FUN(n, val) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .reg = BCM63268_BASEMODE, \ ++ .mask = val, \ ++ } ++ ++static const struct bcm63268_function bcm63268_funcs[] = { ++ BCM63268_LED_FUN(led), ++ BCM63268_MODE_FUN(serial_led_clk), ++ BCM63268_MODE_FUN(serial_led_data), ++ BCM63268_MODE_FUN(hsspi_cs6), ++ BCM63268_MODE_FUN(hsspi_cs7), ++ BCM63268_MODE_FUN(uart1_scts), ++ BCM63268_MODE_FUN(uart1_srts), ++ BCM63268_MODE_FUN(uart1_sdin), ++ BCM63268_MODE_FUN(uart1_sdout), ++ BCM63268_MODE_FUN(ntr_pulse_in), ++ BCM63268_MODE_FUN(dsl_ntr_pulse_out), ++ BCM63268_MODE_FUN(hsspi_cs4), ++ BCM63268_MODE_FUN(hsspi_cs5), ++ BCM63268_MODE_FUN(adsl_spi_miso), ++ BCM63268_MODE_FUN(adsl_spi_mosi), ++ BCM63268_MODE_FUN(vreg_clk), ++ BCM63268_MODE_FUN(pcie_clkreq_b), ++ BCM63268_MODE_FUN(switch_led_clk), ++ BCM63268_MODE_FUN(switch_led_data), ++ BCM63268_CTRL_FUN(wifi), ++ BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND), ++ BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2), ++ BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3), ++}; ++ ++static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm63268_groups); ++} ++ ++static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm63268_groups[group].name; ++} ++ ++static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, ++ const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm63268_groups[group].pins; ++ *num_pins = bcm63268_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm63268_funcs); ++} ++ ++static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm63268_funcs[selector].name; ++} ++ ++static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm63268_funcs[selector].groups; ++ *num_groups = bcm63268_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg, ++ u32 mask, u32 val) ++{ ++ unsigned long flags; ++ u32 tmp; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ tmp = __raw_readl(reg); ++ tmp &= ~mask; ++ tmp |= val; ++ __raw_writel(tmp, reg); ++ ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin) ++{ ++ const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin]; ++ u32 basemode = (unsigned long)desc->drv_data; ++ u32 mask = BIT(pin % 32); ++ ++ if (basemode) ++ bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0); ++ ++ if (pin < 32) { ++ /* base mode: 0 => gpio, 1 => mux function */ ++ bcm63268_rmw_mux(pctl, pctl->mode, mask, 0); ++ ++ /* pins 0-23 might be muxed to led */ ++ if (pin < 24) ++ bcm63268_rmw_mux(pctl, pctl->led, mask, 0); ++ } else if (pin < 52) { ++ /* ctrl reg: 0 => wifi function, 1 => gpio */ ++ bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask); ++ } ++} ++ ++static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm63268_pingroup *grp = &bcm63268_groups[group]; ++ const struct bcm63268_function *f = &bcm63268_funcs[selector]; ++ unsigned i; ++ void __iomem *reg; ++ u32 val, mask; ++ ++ for (i = 0; i < grp->num_pins; i++) ++ bcm63268_set_gpio(pctl, grp->pins[i]); ++ ++ switch (f->reg) { ++ case BCM63268_LEDCTRL: ++ reg = pctl->led; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM63268_MODE: ++ reg = pctl->mode; ++ mask = BIT(grp->pins[0]); ++ val = BIT(grp->pins[0]); ++ break; ++ case BCM63268_CTRL: ++ reg = pctl->ctrl; ++ mask = BIT(grp->pins[0]); ++ val = 0; ++ break; ++ case BCM63268_BASEMODE: ++ reg = pctl->basemode; ++ mask = f->mask; ++ val = f->mask; ++ break; ++ default: ++ WARN_ON(1); ++ return -EINVAL; ++ } ++ ++ bcm63268_rmw_mux(pctl, reg, mask, val); ++ ++ return 0; ++} ++ ++static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ bcm63268_set_gpio(pctl, offset); ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm63268_pctl_ops = { ++ .get_groups_count = bcm63268_pinctrl_get_group_count, ++ .get_group_name = bcm63268_pinctrl_get_group_name, ++ .get_group_pins = bcm63268_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm63268_pmx_ops = { ++ .get_functions_count = bcm63268_pinctrl_get_func_count, ++ .get_function_name = bcm63268_pinctrl_get_func_name, ++ .get_function_groups = bcm63268_pinctrl_get_groups, ++ .set_mux = bcm63268_pinctrl_set_mux, ++ .gpio_request_enable = bcm63268_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm63268_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm63268_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *led, *mode, *ctrl, *basemode; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led"); ++ led = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(led)) ++ return PTR_ERR(led); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl"); ++ ctrl = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(ctrl)) ++ return PTR_ERR(ctrl); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode"); ++ basemode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(basemode)) ++ return PTR_ERR(basemode); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->led = led; ++ pctl->mode = mode; ++ pctl->ctrl = ctrl; ++ pctl->basemode = basemode; ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm63268_pctl_ops; ++ pctl->desc.pmxops = &bcm63268_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm63268_pins); ++ pctl->desc.pins = bcm63268_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM63268_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm63268_pinctrl_match[] = { ++ { .compatible = "brcm,bcm63268-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm63268_pinctrl_driver = { ++ .probe = bcm63268_pinctrl_probe, ++ .driver = { ++ .name = "bcm63268-pinctrl", ++ .of_match_table = bcm63268_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm63268_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.9/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch b/target/linux/brcm63xx/patches-4.9/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch new file mode 100644 index 000000000..29dd56e7b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/206-USB-EHCI-allow-limiting-ports-for-ehci-platform.patch @@ -0,0 +1,66 @@ +From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 19 Jan 2014 12:18:03 +0100 +Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform + +In the same way as the ohci platform driver allows limiting ports, +enable the same for ehci. This prevents a mismatch in the available +ports between ehci/ohci on USB 2.0 controllers. + +This is needed if the USB host controller always reports the maximum +number of ports regardless of the number of available ports (because +one might be set to be usb device). + +Signed-off-by: Jonas Gorski +--- + drivers/usb/host/ehci-hcd.c | 4 ++++ + drivers/usb/host/ehci-platform.c | 2 ++ + drivers/usb/host/ehci.h | 1 + + include/linux/usb/ehci_pdriver.h | 1 + + 4 files changed, 8 insertions(+) + +--- a/drivers/usb/host/ehci-hcd.c ++++ b/drivers/usb/host/ehci-hcd.c +@@ -678,6 +678,10 @@ int ehci_setup(struct usb_hcd *hcd) + + /* cache this readonly data; minimize chip reads */ + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); ++ if (ehci->num_ports) { ++ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */ ++ ehci->hcs_params |= ehci->num_ports; ++ } + + ehci->sbrn = HCD_USB2; + +--- a/drivers/usb/host/ehci-platform.c ++++ b/drivers/usb/host/ehci-platform.c +@@ -61,6 +61,9 @@ static int ehci_platform_reset(struct us + + ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug; + ++ if (pdata->num_ports && pdata->num_ports <= 15) ++ ehci->num_ports = pdata->num_ports; ++ + if (pdata->pre_setup) { + retval = pdata->pre_setup(hcd); + if (retval < 0) +--- a/drivers/usb/host/ehci.h ++++ b/drivers/usb/host/ehci.h +@@ -216,6 +216,7 @@ struct ehci_hcd { /* one per controlle + u32 command; + + /* SILICON QUIRKS */ ++ unsigned int num_ports; + unsigned no_selective_suspend:1; + unsigned has_fsl_port_bug:1; /* FreeScale */ + unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */ +--- a/include/linux/usb/ehci_pdriver.h ++++ b/include/linux/usb/ehci_pdriver.h +@@ -42,6 +42,7 @@ struct usb_hcd; + */ + struct usb_ehci_pdata { + int caps_offset; ++ unsigned int num_ports; + unsigned has_tt:1; + unsigned has_synopsys_hc_bug:1; + unsigned big_endian_desc:1; diff --git a/target/linux/brcm63xx/patches-4.9/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch b/target/linux/brcm63xx/patches-4.9/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch new file mode 100644 index 000000000..f2b2847e6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/207-MIPS-BCM63XX-move-device-registration-code-into-its-.patch @@ -0,0 +1,492 @@ +From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 03:54:05 +0100 +Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its + own file + +Move device registration code into its own file to allow sharing it +between board implementations. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Makefile | 1 + + arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +------------------------- + arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++ + arch/mips/bcm63xx/boards/board_common.h | 8 ++ + 4 files changed, 223 insertions(+), 183 deletions(-) + create mode 100644 arch/mips/bcm63xx/boards/board_common.c + create mode 100644 arch/mips/bcm63xx/boards/board_common.h + +--- a/arch/mips/bcm63xx/boards/Makefile ++++ b/arch/mips/bcm63xx/boards/Makefile +@@ -1 +1,2 @@ ++obj-y += board_common.o + obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -12,34 +12,21 @@ + #include + #include + #include +-#include +-#include + #include + #include + #include +-#include + #include + #include + #include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include + #include + ++#include "board_common.h" ++ + #include + + + #define HCS_OFFSET_128K 0x20000 + +-static struct board_info board; +- + /* + * known 3368 boards + */ +@@ -712,52 +699,6 @@ static const struct board_info __initcon + }; + + /* +- * Register a sane SPROMv2 to make the on-board +- * bcm4318 WLAN work +- */ +-#ifdef CONFIG_SSB_PCIHOST +-static struct ssb_sprom bcm63xx_sprom = { +- .revision = 0x02, +- .board_rev = 0x17, +- .country_code = 0x0, +- .ant_available_bg = 0x3, +- .pa0b0 = 0x15ae, +- .pa0b1 = 0xfa85, +- .pa0b2 = 0xfe8d, +- .pa1b0 = 0xffff, +- .pa1b1 = 0xffff, +- .pa1b2 = 0xffff, +- .gpio0 = 0xff, +- .gpio1 = 0xff, +- .gpio2 = 0xff, +- .gpio3 = 0xff, +- .maxpwr_bg = 0x004c, +- .itssi_bg = 0x00, +- .boardflags_lo = 0x2848, +- .boardflags_hi = 0x0000, +-}; +- +-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) +-{ +- if (bus->bustype == SSB_BUSTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); +- return 0; +- } else { +- pr_err("unable to fill SPROM for given bustype\n"); +- return -EINVAL; +- } +-} +-#endif +- +-/* +- * return board name for /proc/cpuinfo +- */ +-const char *board_get_name(void) +-{ +- return board.name; +-} +- +-/* + * early init callback, read nvram data from flash and checksum it + */ + void __init board_prom_init(void) +@@ -802,140 +743,15 @@ void __init board_prom_init(void) + if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) + continue; + /* copy, board desc array is marked initdata */ +- memcpy(&board, bcm963xx_boards[i], sizeof(board)); ++ board_early_setup(bcm963xx_boards[i]); + break; + } + +- /* bail out if board is not found, will complain later */ +- if (!board.name[0]) { ++ /* warn if board is not found, will complain later */ ++ if (i == ARRAY_SIZE(bcm963xx_boards)) { + char name[17]; + memcpy(name, board_name, 16); + name[16] = 0; + pr_err("unknown bcm963xx board: %s\n", name); +- return; +- } +- +- /* setup pin multiplexing depending on board enabled device, +- * this has to be done this early since PCI init is done +- * inside arch_initcall */ +- val = 0; +- +-#ifdef CONFIG_PCI +- if (board.has_pci) { +- bcm63xx_pci_enabled = 1; +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G2_PCI; +- } +-#endif +- +- if (board.has_pccard) { +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G1_MII_PCCARD; +- } +- +- if (board.has_enet0 && !board.enet0.use_internal_phy) { +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G3_EXT_MII | +- GPIO_MODE_6348_G0_EXT_MII; +- } +- +- if (board.has_enet1 && !board.enet1.use_internal_phy) { +- if (BCMCPU_IS_6348()) +- val |= GPIO_MODE_6348_G3_EXT_MII | +- GPIO_MODE_6348_G0_EXT_MII; +- } +- +- bcm_gpio_writel(val, GPIO_MODE_REG); +-} +- +-/* +- * second stage init callback, good time to panic if we couldn't +- * identify on which board we're running since early printk is working +- */ +-void __init board_setup(void) +-{ +- if (!board.name[0]) +- panic("unable to detect bcm963xx board"); +- pr_info("board name: %s\n", board.name); +- +- /* make sure we're running on expected cpu */ +- if (bcm63xx_get_cpu_id() != board.expected_cpu_id) +- panic("unexpected CPU for bcm963xx board"); +-} +- +-static struct gpio_led_platform_data bcm63xx_led_data; +- +-static struct platform_device bcm63xx_gpio_leds = { +- .name = "leds-gpio", +- .id = 0, +- .dev.platform_data = &bcm63xx_led_data, +-}; +- +-/* +- * third stage init callback, register all board devices. +- */ +-int __init board_register_devices(void) +-{ +- if (board.has_uart0) +- bcm63xx_uart_register(0); +- +- if (board.has_uart1) +- bcm63xx_uart_register(1); +- +- if (board.has_pccard) +- bcm63xx_pcmcia_register(); +- +- if (board.has_enet0 && +- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) +- bcm63xx_enet_register(0, &board.enet0); +- +- if (board.has_enet1 && +- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) +- bcm63xx_enet_register(1, &board.enet1); +- +- if (board.has_enetsw && +- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) +- bcm63xx_enetsw_register(&board.enetsw); +- +- if (board.has_usbd) +- bcm63xx_usbd_register(&board.usbd); +- +- if (board.has_ehci0) +- bcm63xx_ehci_register(); +- +- if (board.has_ohci0) +- bcm63xx_ohci_register(); +- +- if (board.has_dsp) +- bcm63xx_dsp_register(&board.dsp); +- +- /* Generate MAC address for WLAN and register our SPROM, +- * do this after registering enet devices +- */ +-#ifdef CONFIG_SSB_PCIHOST +- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { +- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- if (ssb_arch_register_fallback_sprom( +- &bcm63xx_get_fallback_sprom) < 0) +- pr_err("failed to register fallback SPROM\n"); + } +-#endif +- +- bcm63xx_spi_register(); +- +- bcm63xx_hsspi_register(); +- +- bcm63xx_flash_register(); +- +- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); +- bcm63xx_led_data.leds = board.leds; +- +- platform_device_register(&bcm63xx_gpio_leds); +- +- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) +- gpio_request_one(board.ephy_reset_gpio, +- board.ephy_reset_gpio_flags, "ephy-reset"); +- +- return 0; + } +--- /dev/null ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -0,0 +1,218 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2008 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PFX "board: " ++ ++static struct board_info board; ++ ++/* ++ * Register a sane SPROMv2 to make the on-board ++ * bcm4318 WLAN work ++ */ ++#ifdef CONFIG_SSB_PCIHOST ++static struct ssb_sprom bcm63xx_sprom = { ++ .revision = 0x02, ++ .board_rev = 0x17, ++ .country_code = 0x0, ++ .ant_available_bg = 0x3, ++ .pa0b0 = 0x15ae, ++ .pa0b1 = 0xfa85, ++ .pa0b2 = 0xfe8d, ++ .pa1b0 = 0xffff, ++ .pa1b1 = 0xffff, ++ .pa1b2 = 0xffff, ++ .gpio0 = 0xff, ++ .gpio1 = 0xff, ++ .gpio2 = 0xff, ++ .gpio3 = 0xff, ++ .maxpwr_bg = 0x004c, ++ .itssi_bg = 0x00, ++ .boardflags_lo = 0x2848, ++ .boardflags_hi = 0x0000, ++}; ++ ++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) ++{ ++ if (bus->bustype == SSB_BUSTYPE_PCI) { ++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ return 0; ++ } else { ++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); ++ return -EINVAL; ++ } ++} ++#endif ++ ++/* ++ * return board name for /proc/cpuinfo ++ */ ++const char *board_get_name(void) ++{ ++ return board.name; ++} ++ ++/* ++ * setup board for device registration ++ */ ++void __init board_early_setup(const struct board_info *target) ++{ ++ u32 val; ++ ++ memcpy(&board, target, sizeof(board)); ++ ++ /* setup pin multiplexing depending on board enabled device, ++ * this has to be done this early since PCI init is done ++ * inside arch_initcall */ ++ val = 0; ++ ++#ifdef CONFIG_PCI ++ if (board.has_pci) { ++ bcm63xx_pci_enabled = 1; ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G2_PCI; ++ } ++#endif ++ ++ if (board.has_pccard) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G1_MII_PCCARD; ++ } ++ ++ if (board.has_enet0 && !board.enet0.use_internal_phy) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G3_EXT_MII | ++ GPIO_MODE_6348_G0_EXT_MII; ++ } ++ ++ if (board.has_enet1 && !board.enet1.use_internal_phy) { ++ if (BCMCPU_IS_6348()) ++ val |= GPIO_MODE_6348_G3_EXT_MII | ++ GPIO_MODE_6348_G0_EXT_MII; ++ } ++ ++ bcm_gpio_writel(val, GPIO_MODE_REG); ++} ++ ++ ++/* ++ * second stage init callback, good time to panic if we couldn't ++ * identify on which board we're running since early printk is working ++ */ ++void __init board_setup(void) ++{ ++ if (!board.name[0]) ++ panic("unable to detect bcm963xx board"); ++ printk(KERN_INFO PFX "board name: %s\n", board.name); ++ ++ /* make sure we're running on expected cpu */ ++ if (bcm63xx_get_cpu_id() != board.expected_cpu_id) ++ panic("unexpected CPU for bcm963xx board"); ++} ++ ++static struct gpio_led_platform_data bcm63xx_led_data; ++ ++static struct platform_device bcm63xx_gpio_leds = { ++ .name = "leds-gpio", ++ .id = 0, ++ .dev.platform_data = &bcm63xx_led_data, ++}; ++ ++/* ++ * third stage init callback, register all board devices. ++ */ ++int __init board_register_devices(void) ++{ ++ if (board.has_uart0) ++ bcm63xx_uart_register(0); ++ ++ if (board.has_uart1) ++ bcm63xx_uart_register(1); ++ ++ if (board.has_pccard) ++ bcm63xx_pcmcia_register(); ++ ++ if (board.has_enet0 && ++ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) ++ bcm63xx_enet_register(0, &board.enet0); ++ ++ if (board.has_enet1 && ++ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) ++ bcm63xx_enet_register(1, &board.enet1); ++ ++ if (board.has_enetsw && ++ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) ++ bcm63xx_enetsw_register(&board.enetsw); ++ ++ if (board.has_usbd) ++ bcm63xx_usbd_register(&board.usbd); ++ ++ if (board.has_ehci0) ++ bcm63xx_ehci_register(); ++ ++ if (board.has_ohci0) ++ bcm63xx_ohci_register(); ++ ++ if (board.has_dsp) ++ bcm63xx_dsp_register(&board.dsp); ++ ++ /* Generate MAC address for WLAN and register our SPROM, ++ * do this after registering enet devices ++ */ ++#ifdef CONFIG_SSB_PCIHOST ++ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { ++ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); ++ if (ssb_arch_register_fallback_sprom( ++ &bcm63xx_get_fallback_sprom) < 0) ++ pr_err(PFX "failed to register fallback SPROM\n"); ++ } ++#endif ++ ++ bcm63xx_spi_register(); ++ ++ bcm63xx_hsspi_register(); ++ ++ bcm63xx_flash_register(); ++ ++ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); ++ bcm63xx_led_data.leds = board.leds; ++ ++ platform_device_register(&bcm63xx_gpio_leds); ++ ++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) ++ gpio_request_one(board.ephy_reset_gpio, ++ board.ephy_reset_gpio_flags, "ephy-reset"); ++ ++ return 0; ++} +--- /dev/null ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -0,0 +1,8 @@ ++#ifndef __BOARD_COMMON_H ++#define __BOARD_COMMON_H ++ ++#include ++ ++void board_early_setup(const struct board_info *board); ++ ++#endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.9/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch b/target/linux/brcm63xx/patches-4.9/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch new file mode 100644 index 000000000..f94ce7029 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/208-MIPS-BCM63XX-pass-a-mac-addresss-allocator-to-board-.patch @@ -0,0 +1,100 @@ +From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 04:08:06 +0100 +Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board + setup + +Pass a mac address allocator to board setup code to allow board +implementations to work with third party bootloaders not using nvram +for configuration storage. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++- + arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------ + arch/mips/bcm63xx/boards/board_common.h | 3 ++- + 3 files changed, 14 insertions(+), 8 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -743,7 +743,8 @@ void __init board_prom_init(void) + if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) + continue; + /* copy, board desc array is marked initdata */ +- board_early_setup(bcm963xx_boards[i]); ++ board_early_setup(bcm963xx_boards[i], ++ bcm63xx_nvram_get_mac_address); + break; + } + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -18,7 +18,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -82,15 +81,20 @@ const char *board_get_name(void) + return board.name; + } + ++static int (*board_get_mac_address)(u8 mac[ETH_ALEN]); ++ + /* + * setup board for device registration + */ +-void __init board_early_setup(const struct board_info *target) ++void __init board_early_setup(const struct board_info *target, ++ int (*get_mac_address)(u8 mac[ETH_ALEN])) + { + u32 val; + + memcpy(&board, target, sizeof(board)); + ++ board_get_mac_address = get_mac_address; ++ + /* setup pin multiplexing depending on board enabled device, + * this has to be done this early since PCI init is done + * inside arch_initcall */ +@@ -163,15 +167,15 @@ int __init board_register_devices(void) + bcm63xx_pcmcia_register(); + + if (board.has_enet0 && +- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr)) ++ !board_get_mac_address(board.enet0.mac_addr)) + bcm63xx_enet_register(0, &board.enet0); + + if (board.has_enet1 && +- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr)) ++ !board_get_mac_address(board.enet1.mac_addr)) + bcm63xx_enet_register(1, &board.enet1); + + if (board.has_enetsw && +- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr)) ++ !board_get_mac_address(board.enetsw.mac_addr)) + bcm63xx_enetsw_register(&board.enetsw); + + if (board.has_usbd) +@@ -190,7 +194,7 @@ int __init board_register_devices(void) + * do this after registering enet devices + */ + #ifdef CONFIG_SSB_PCIHOST +- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) { ++ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { + memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); + if (ssb_arch_register_fallback_sprom( +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -3,6 +3,7 @@ + + #include + +-void board_early_setup(const struct board_info *board); ++void board_early_setup(const struct board_info *board, ++ int (*get_mac_address)(u8 mac[ETH_ALEN])); + + #endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.9/309-cfe_version_mod.patch b/target/linux/brcm63xx/patches-4.9/309-cfe_version_mod.patch new file mode 100644 index 000000000..3421ac3eb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/309-cfe_version_mod.patch @@ -0,0 +1,27 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -723,10 +723,20 @@ void __init board_prom_init(void) + + /* dump cfe version */ + cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; +- if (!memcmp(cfe, "cfe-v", 5)) +- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", +- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); +- else ++ if (strstarts(cfe, "cfe-")) { ++ if(cfe[4] == 'v') { ++ if(cfe[5] == 'd') ++ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]); ++ else if (cfe[10] > 0) ++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u", ++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]); ++ else ++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", ++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); ++ } else { ++ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]); ++ } ++ } else + strcpy(cfe_version, "unknown"); + pr_info("CFE version: %s\n", cfe_version); + diff --git a/target/linux/brcm63xx/patches-4.9/310-cfe_simplify_detection.patch b/target/linux/brcm63xx/patches-4.9/310-cfe_simplify_detection.patch new file mode 100644 index 000000000..e05c91d93 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/310-cfe_simplify_detection.patch @@ -0,0 +1,20 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h +@@ -1,6 +1,8 @@ + #ifndef BCM63XX_BOARD_H_ + #define BCM63XX_BOARD_H_ + ++#include ++ + const char *board_get_name(void); + + void board_prom_init(void); +@@ -9,4 +11,8 @@ void board_setup(void); + + int board_register_devices(void); + ++static inline bool bcm63xx_is_cfe_present(void) { ++ return fw_arg3 == 0x43464531; ++} ++ + #endif /* ! BCM63XX_BOARD_H_ */ diff --git a/target/linux/brcm63xx/patches-4.9/311-bcm63xxpart_use_cfedetection.patch b/target/linux/brcm63xx/patches-4.9/311-bcm63xxpart_use_cfedetection.patch new file mode 100644 index 000000000..bca6adbf3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/311-bcm63xxpart_use_cfedetection.patch @@ -0,0 +1,51 @@ +--- a/drivers/mtd/bcm63xxpart.c ++++ b/drivers/mtd/bcm63xxpart.c +@@ -35,6 +35,8 @@ + #include + #include + #include ++ ++#include + + #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */ + +@@ -46,30 +48,6 @@ + #define STR_NULL_TERMINATE(x) \ + do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0) + +-static int bcm63xx_detect_cfe(struct mtd_info *master) +-{ +- char buf[9]; +- int ret; +- size_t retlen; +- +- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen, +- (void *)buf); +- buf[retlen] = 0; +- +- if (ret) +- return ret; +- +- if (strncmp("cfe-v", buf, 5) == 0) +- return 0; +- +- /* very old CFE's do not have the cfe-v string, so check for magic */ +- ret = mtd_read(master, BCM963XX_CFE_MAGIC_OFFSET, 8, &retlen, +- (void *)buf); +- buf[retlen] = 0; +- +- return strncmp("CFE1CFE1", buf, 8); +-} +- + static int bcm63xx_read_nvram(struct mtd_info *master, + struct bcm963xx_nvram *nvram) + { +@@ -152,7 +130,7 @@ static int bcm63xx_parse_cfe_partitions( + struct bcm963xx_nvram *nvram = NULL; + int ret; + +- if (bcm63xx_detect_cfe(master)) ++ if (!bcm63xx_is_cfe_present()) + return -EINVAL; + + nvram = vzalloc(sizeof(*nvram)); diff --git a/target/linux/brcm63xx/patches-4.9/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch b/target/linux/brcm63xx/patches-4.9/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch new file mode 100644 index 000000000..1d63e91a8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/320-irqchip-add-support-for-bcm6345-style-periphery-irq-.patch @@ -0,0 +1,455 @@ +From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:53:12 +0100 +Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq + controller + +Signed-off-by: Jonas Gorski +--- + .../brcm,bcm6345-periph-intc.txt | 50 +++ + drivers/irqchip/Kconfig | 4 + + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-bcm6345-periph.c | 339 ++++++++++++++++++++ + include/linux/irqchip/irq-bcm6345-periph.h | 16 + + 5 files changed, 410 insertions(+) + create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt + create mode 100644 drivers/irqchip/irq-bcm6345-periph.c + create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h + +--- /dev/null ++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt +@@ -0,0 +1,50 @@ ++Broadcom BCM6345 Level 1 periphery interrupt controller ++ ++This block is a interrupt controller that is typically connected directly ++to one of the HW INT lines on each CPU. Every BCM63XX xDSL chip since ++BCM6345 has contained this hardware. ++ ++Key elements of the hardware design include: ++ ++- 32, 64, or 128 incoming level IRQ lines ++ ++- All onchip peripherals are wired directly to an L2 input ++ ++- A separate instance of the register set for each CPU, allowing individual ++ peripheral IRQs to be routed to any CPU ++ ++- No atomic mask/unmask operations ++ ++- No polarity/level/edge settings ++ ++- No FIFO or priority encoder logic; software is expected to read all ++ 1-4 status words to determine which IRQs are pending ++ ++Required properties: ++ ++- compatible: Should be "brcm,bcm6345-periph-intc". ++- reg: Specifies the base physical address and size of the registers. ++ Multiple register addresses may be specified, and must match the amount of ++ parent interrupts. ++- interrupt-controller: Identifies the node as an interrupt controller. ++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt ++ source, should be 1. ++- interrupt-parent: Specifies the phandle to the parent interrupt controller ++ this one is cascaded from. ++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller ++ node, valid values depend on the type of parent interrupt controller. ++ Multiple lines are used to route interrupts to different cpus, with the first ++ assumed to be for the boot CPU. ++ ++Example: ++ ++periph_intc: interrupt-controller@f0406800 { ++ compatible = "brcm,bcm6345-periph-intc"; ++ reg = <0x10000020 0x10>, <0x10000030 0x10>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-parent = <&cpu_intc>; ++ interrupts = <2>, <3>; ++}; +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -110,6 +110,10 @@ config BRCMSTB_L2_IRQ + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + ++config BCM6345_PERIPH_IRQ ++ bool ++ select IRQ_DOMAIN ++ + config DW_APB_ICTL + bool + select GENERIC_IRQ_CHIP +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o + obj-$(CONFIG_IRQ_MXS) += irq-mxs.o + obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o + obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o ++obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o + obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o + obj-$(CONFIG_METAG) += irq-metag-ext.o + obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o +--- /dev/null ++++ b/drivers/irqchip/irq-bcm6345-periph.c +@@ -0,0 +1,339 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_BCM63XX ++#include ++ ++#define VIRQ_BASE IRQ_INTERNAL_BASE ++#else ++#define VIRQ_BASE 0 ++#endif ++ ++#define MAX_WORDS 4 ++#define MAX_PARENT_IRQS 2 ++#define IRQS_PER_WORD 32 ++ ++struct intc_block { ++ int parent_irq; ++ void __iomem *base; ++ void __iomem *en_reg[MAX_WORDS]; ++ void __iomem *status_reg[MAX_WORDS]; ++ u32 mask_cache[MAX_WORDS]; ++}; ++ ++struct intc_data { ++ struct irq_chip chip; ++ struct intc_block block[MAX_PARENT_IRQS]; ++ ++ int num_words; ++ ++ struct irq_domain *domain; ++ raw_spinlock_t lock; ++}; ++ ++static void bcm6345_periph_irq_handle(struct irq_desc *desc) ++{ ++ struct intc_data *data = irq_desc_get_handler_data(desc); ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct intc_block *block; ++ unsigned int irq = irq_desc_get_irq(desc); ++ unsigned int idx; ++ ++ chained_irq_enter(chip, desc); ++ ++ for (idx = 0; idx < MAX_PARENT_IRQS; idx++) ++ if (irq == data->block[idx].parent_irq) ++ block = &data->block[idx]; ++ ++ for (idx = 0; idx < data->num_words; idx++) { ++ int base = idx * IRQS_PER_WORD; ++ unsigned long pending; ++ int hw_irq; ++ ++ raw_spin_lock(&data->lock); ++ pending = __raw_readl(block->en_reg[idx]) & ++ __raw_readl(block->status_reg[idx]); ++ raw_spin_unlock(&data->lock); ++ ++ for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) { ++ int virq; ++ ++ virq = irq_find_mapping(data->domain, base + hw_irq); ++ generic_handle_irq(virq); ++ } ++ } ++ ++ chained_irq_exit(chip, desc); ++} ++ ++static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit, ++ bool enable) ++{ ++ u32 val; ++ ++ val = __raw_readl(block->en_reg[reg]); ++ if (enable) ++ val |= BIT(bit); ++ else ++ val &= ~BIT(bit); ++ __raw_writel(val, block->en_reg[reg]); ++} ++ ++static void bcm6345_periph_irq_mask(struct irq_data *data) ++{ ++ unsigned int i, reg, bit; ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ ++ reg = hwirq / IRQS_PER_WORD; ++ bit = hwirq % IRQS_PER_WORD; ++ ++ raw_spin_lock(&priv->lock); ++ for (i = 0; i < MAX_PARENT_IRQS; i++) { ++ struct intc_block *block = &priv->block[i]; ++ ++ if (!block->parent_irq) ++ break; ++ ++ __bcm6345_periph_enable(block, reg, bit, false); ++ } ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_periph_irq_unmask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ unsigned int i, reg, bit; ++ ++ reg = hwirq / IRQS_PER_WORD; ++ bit = hwirq % IRQS_PER_WORD; ++ ++ raw_spin_lock(&priv->lock); ++ for (i = 0; i < MAX_PARENT_IRQS; i++) { ++ struct intc_block *block = &priv->block[i]; ++ ++ if (!block->parent_irq) ++ break; ++ ++ if (block->mask_cache[reg] & BIT(bit)) ++ __bcm6345_periph_enable(block, reg, bit, true); ++ else ++ __bcm6345_periph_enable(block, reg, bit, false); ++ } ++ raw_spin_unlock(&priv->lock); ++} ++ ++#ifdef CONFIG_SMP ++static int bcm6345_periph_set_affinity(struct irq_data *data, ++ const struct cpumask *mask, bool force) ++{ ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ struct intc_data *priv = data->domain->host_data; ++ unsigned int i, reg, bit; ++ unsigned long flags; ++ bool enabled; ++ int cpu; ++ ++ reg = hwirq / IRQS_PER_WORD; ++ bit = hwirq % IRQS_PER_WORD; ++ ++ /* we could route to more than one cpu, but performance ++ suffers, so fix it to one. ++ */ ++ cpu = cpumask_any_and(mask, cpu_online_mask); ++ if (cpu >= nr_cpu_ids) ++ return -EINVAL; ++ ++ if (cpu >= MAX_PARENT_IRQS) ++ return -EINVAL; ++ ++ if (!priv->block[cpu].parent_irq) ++ return -EINVAL; ++ ++ raw_spin_lock_irqsave(&priv->lock, flags); ++ enabled = !irqd_irq_masked(data); ++ for (i = 0; i < MAX_PARENT_IRQS; i++) { ++ struct intc_block *block = &priv->block[i]; ++ ++ if (!block->parent_irq) ++ break; ++ ++ if (i == cpu) { ++ block->mask_cache[reg] |= BIT(bit); ++ __bcm6345_periph_enable(block, reg, bit, enabled); ++ } else { ++ block->mask_cache[reg] &= ~BIT(bit); ++ __bcm6345_periph_enable(block, reg, bit, false); ++ } ++ } ++ raw_spin_unlock_irqrestore(&priv->lock, flags); ++ ++ return 0; ++} ++#endif ++ ++static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq, ++ irq_hw_number_t hw) ++{ ++ struct intc_data *priv = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops bcm6345_periph_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = bcm6345_periph_map, ++}; ++ ++static int __init __bcm6345_periph_intc_init(struct device_node *node, ++ int num_blocks, int *irq, ++ void __iomem **base, int num_words) ++{ ++ struct intc_data *data; ++ unsigned int i, w, status_offset; ++ ++ data = kzalloc(sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ raw_spin_lock_init(&data->lock); ++ ++ status_offset = num_words * sizeof(u32); ++ ++ for (i = 0; i < num_blocks; i++) { ++ struct intc_block *block = &data->block[i]; ++ ++ block->parent_irq = irq[i]; ++ block->base = base[i]; ++ ++ for (w = 0; w < num_words; w++) { ++ int word_offset = sizeof(u32) * ((num_words - w) - 1); ++ ++ block->en_reg[w] = base[i] + word_offset; ++ block->status_reg[w] = base[i] + status_offset; ++ block->status_reg[w] += word_offset; ++ ++ /* route all interrupts to line 0 by default */ ++ if (i == 0) ++ block->mask_cache[w] = 0xffffffff; ++ } ++ ++ irq_set_handler_data(block->parent_irq, data); ++ irq_set_chained_handler(block->parent_irq, ++ bcm6345_periph_irq_handle); ++ } ++ ++ data->num_words = num_words; ++ ++ data->chip.name = "bcm6345-periph-intc"; ++ data->chip.irq_mask = bcm6345_periph_irq_mask; ++ data->chip.irq_unmask = bcm6345_periph_irq_unmask; ++ ++#ifdef CONFIG_SMP ++ if (num_blocks > 1) ++ data->chip.irq_set_affinity = bcm6345_periph_set_affinity; ++#endif ++ ++ data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words, ++ VIRQ_BASE, ++ &bcm6345_periph_domain_ops, data); ++ if (!data->domain) { ++ kfree(data); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++void __init bcm6345_periph_intc_init(int num_blocks, int *irq, ++ void __iomem **base, int num_words) ++{ ++ __bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words); ++} ++ ++#ifdef CONFIG_OF ++static int __init bcm6345_periph_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ struct resource res; ++ int num_irqs, ret = -EINVAL; ++ int irqs[MAX_PARENT_IRQS] = { 0 }; ++ void __iomem *bases[MAX_PARENT_IRQS] = { NULL }; ++ int words = 0; ++ int i; ++ ++ num_irqs = of_irq_count(node); ++ ++ if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS) ++ return -EINVAL; ++ ++ for (i = 0; i < num_irqs; i++) { ++ resource_size_t size; ++ ++ irqs[i] = irq_of_parse_and_map(node, i); ++ if (!irqs[i]) ++ goto out_unmap; ++ ++ if (of_address_to_resource(node, i, &res)) ++ goto out_unmap; ++ ++ size = resource_size(&res); ++ switch (size) { ++ case 8: ++ case 16: ++ case 32: ++ size = size / 8; ++ break; ++ default: ++ goto out_unmap; ++ } ++ ++ if (words && words != size) { ++ ret = -EINVAL; ++ goto out_unmap; ++ } ++ words = size; ++ ++ bases[i] = of_iomap(node, i); ++ if (!bases[i]) { ++ ret = -ENOMEM; ++ goto out_unmap; ++ } ++ } ++ ++ ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words); ++ if (!ret) ++ return 0; ++ ++out_unmap: ++ for (i = 0; i < num_irqs; i++) { ++ iounmap(bases[i]); ++ irq_dispose_mapping(irqs[i]); ++ } ++ ++ return ret; ++} ++ ++IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-l1-intc", ++ bcm6345_periph_of_init); ++#endif +--- /dev/null ++++ b/include/linux/irqchip/irq-bcm6345-periph.h +@@ -0,0 +1,16 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2008 Nicolas Schichan ++ */ ++ ++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H ++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H ++ ++void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base, ++ int num_words); ++ ++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */ diff --git a/target/linux/brcm63xx/patches-4.9/321-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/brcm63xx/patches-4.9/321-irqchip-add-support-for-bcm6345-style-external-inter.patch new file mode 100644 index 000000000..94952c64a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/321-irqchip-add-support-for-bcm6345-style-external-inter.patch @@ -0,0 +1,394 @@ +From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:54:27 +0100 +Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external + interrupt controller + +Signed-off-by: Jonas Gorski +--- + .../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++ + drivers/irqchip/Kconfig | 4 + + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++ + include/linux/irqchip/irq-bcm6345-ext.h | 14 + + 5 files changed, 335 insertions(+) + create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt + create mode 100644 drivers/irqchip/irq-bcm6345-ext.c + create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h + +--- /dev/null ++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt +@@ -0,0 +1,29 @@ ++Broadcom BCM6345-style external interrupt controller ++ ++Required properties: ++ ++- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc". ++- reg: Specifies the base physical addresses and size of the registers. ++- interrupt-controller: identifies the node as an interrupt controller. ++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt ++ source, Should be 2. ++- interrupt-parent: Specifies the phandle to the parent interrupt controller ++ this one is cascaded from. ++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller ++ node, valid values depend on the type of parent interrupt controller. ++ ++Optional properties: ++ ++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the ++ register. Defaults to 4. ++ ++Example: ++ ++ext_intc: interrupt-controller@10000018 { ++ compatible = "brcm,bcm6345-ext-intc"; ++ interrupt-parent = <&periph_intc>; ++ #interrupt-cells = <2>; ++ reg = <0x10000018 0x4>; ++ interrupt-controller; ++ interrupts = <24>, <25>, <26>, <27>; ++}; +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -110,6 +110,10 @@ config BRCMSTB_L2_IRQ + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + ++config BCM6345_EXT_IRQ ++ bool ++ select IRQ_DOMAIN ++ + config BCM6345_PERIPH_IRQ + bool + select IRQ_DOMAIN +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o + obj-$(CONFIG_IRQ_MXS) += irq-mxs.o + obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o + obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o ++obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o + obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o + obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o + obj-$(CONFIG_METAG) += irq-metag-ext.o +--- /dev/null ++++ b/drivers/irqchip/irq-bcm6345-ext.c +@@ -0,0 +1,301 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_BCM63XX ++#include ++ ++#define VIRQ_BASE IRQ_EXTERNAL_BASE ++#else ++#define VIRQ_BASE 0 ++#endif ++ ++#define MAX_IRQS 4 ++ ++#define EXTIRQ_CFG_SENSE 0 ++#define EXTIRQ_CFG_STAT 1 ++#define EXTIRQ_CFG_CLEAR 2 ++#define EXTIRQ_CFG_MASK 3 ++#define EXTIRQ_CFG_BOTHEDGE 4 ++#define EXTIRQ_CFG_LEVELSENSE 5 ++ ++struct intc_data { ++ struct irq_chip chip; ++ struct irq_domain *domain; ++ raw_spinlock_t lock; ++ ++ int parent_irq[MAX_IRQS]; ++ void __iomem *reg; ++ int shift; ++ unsigned int toggle_clear_on_ack:1; ++}; ++ ++static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc) ++{ ++ struct intc_data *data = irq_desc_get_handler_data(desc); ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ unsigned int irq = irq_desc_get_irq(desc); ++ unsigned int idx; ++ ++ chained_irq_enter(chip, desc); ++ ++ for (idx = 0; idx < MAX_IRQS; idx++) { ++ if (data->parent_irq[idx] != irq) ++ continue; ++ ++ generic_handle_irq(irq_find_mapping(data->domain, idx)); ++ } ++ ++ chained_irq_exit(chip, desc); ++} ++ ++static void bcm6345_ext_intc_irq_ack(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)), ++ priv->reg); ++ if (priv->toggle_clear_on_ack) ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_mask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift)); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static int bcm6345_ext_intc_set_type(struct irq_data *data, ++ unsigned int flow_type) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ bool levelsense = 0, sense = 0, bothedge = 0; ++ u32 reg; ++ ++ flow_type &= IRQ_TYPE_SENSE_MASK; ++ ++ if (flow_type == IRQ_TYPE_NONE) ++ flow_type = IRQ_TYPE_LEVEL_LOW; ++ ++ switch (flow_type) { ++ case IRQ_TYPE_EDGE_BOTH: ++ bothedge = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_RISING: ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_FALLING: ++ break; ++ ++ case IRQ_TYPE_LEVEL_HIGH: ++ levelsense = 1; ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_LEVEL_LOW: ++ levelsense = 1; ++ break; ++ ++ default: ++ pr_err("bogus flow type combination given!\n"); ++ return -EINVAL; ++ } ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ ++ if (levelsense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift)); ++ if (sense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift)); ++ if (bothedge) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift)); ++ ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++ ++ irqd_set_trigger_type(data, flow_type); ++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) ++ irq_set_handler_locked(data, handle_level_irq); ++ else ++ irq_set_handler_locked(data, handle_edge_irq); ++ ++ return 0; ++} ++ ++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq, ++ irq_hw_number_t hw) ++{ ++ struct intc_data *priv = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops bcm6345_ext_domain_ops = { ++ .xlate = irq_domain_xlate_twocell, ++ .map = bcm6345_ext_intc_map, ++}; ++ ++static int __init __bcm6345_ext_intc_init(struct device_node *node, ++ int num_irqs, int *irqs, ++ void __iomem *reg, int shift, ++ bool toggle_clear_on_ack) ++{ ++ struct intc_data *data; ++ unsigned int i; ++ int start = VIRQ_BASE; ++ ++ data = kzalloc(sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ raw_spin_lock_init(&data->lock); ++ ++ for (i = 0; i < num_irqs; i++) { ++ data->parent_irq[i] = irqs[i]; ++ ++ irq_set_handler_data(irqs[i], data); ++ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle); ++ } ++ ++ data->reg = reg; ++ data->shift = shift; ++ data->toggle_clear_on_ack = toggle_clear_on_ack; ++ ++ data->chip.name = "bcm6345-ext-intc"; ++ data->chip.irq_ack = bcm6345_ext_intc_irq_ack; ++ data->chip.irq_mask = bcm6345_ext_intc_irq_mask; ++ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask; ++ data->chip.irq_set_type = bcm6345_ext_intc_set_type; ++ ++ /* ++ * If we have less than 4 irqs, this is the second controller on ++ * bcm63xx. So increase the VIRQ start to not overlap with the first ++ * one, but only do so if we actually use a non-zero start. ++ * ++ * This can be removed when bcm63xx has no legacy users anymore. ++ */ ++ if (start && num_irqs < 4) ++ start += 4; ++ ++ data->domain = irq_domain_add_simple(node, num_irqs, start, ++ &bcm6345_ext_domain_ops, data); ++ if (!data->domain) { ++ kfree(data); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg, ++ int shift) ++{ ++ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false); ++} ++ ++#ifdef CONFIG_OF ++static int __init bcm6345_ext_intc_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ int num_irqs, ret = -EINVAL; ++ unsigned i; ++ void __iomem *base; ++ int irqs[MAX_IRQS] = { 0 }; ++ u32 shift; ++ bool toggle_clear_on_ack = false; ++ ++ num_irqs = of_irq_count(node); ++ ++ if (!num_irqs || num_irqs > MAX_IRQS) ++ return -EINVAL; ++ ++ if (of_property_read_u32(node, "brcm,field-width", &shift)) ++ shift = 4; ++ ++ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */ ++ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc")) ++ toggle_clear_on_ack = true; ++ ++ for (i = 0; i < num_irqs; i++) { ++ irqs[i] = irq_of_parse_and_map(node, i); ++ if (!irqs[i]) { ++ ret = -ENOMEM; ++ goto out_unmap; ++ } ++ } ++ ++ base = of_iomap(node, 0); ++ if (!base) ++ goto out_unmap; ++ ++ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift, ++ toggle_clear_on_ack); ++ if (!ret) ++ return 0; ++out_unmap: ++ iounmap(base); ++ ++ for (i = 0; i < num_irqs; i++) ++ irq_dispose_mapping(irqs[i]); ++ ++ return ret; ++} ++ ++IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc", ++ bcm6345_ext_intc_of_init); ++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc", ++ bcm6345_ext_intc_of_init); ++#endif +--- /dev/null ++++ b/include/linux/irqchip/irq-bcm6345-ext.h +@@ -0,0 +1,14 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++ ++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift); ++ ++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */ diff --git a/target/linux/brcm63xx/patches-4.9/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch b/target/linux/brcm63xx/patches-4.9/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch new file mode 100644 index 000000000..0c4d034c0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/322-MIPS-BCM63XX-switch-to-IRQ_DOMAIN.patch @@ -0,0 +1,695 @@ +From d2d2489e0a4b740abd980e9d1cad952d15bc2d9e Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:55:02 +0100 +Subject: [PATCH] MIPS: BCM63XX: switch to IRQ_DOMAIN + +Now that we have working IRQ_DOMAIN drivers for both interrupt controllers, +switch to using them. + +Signed-off-by: Jonas Gorski +--- + arch/mips/Kconfig | 3 + + arch/mips/bcm63xx/irq.c | 612 +++++++++--------------------------------------- + 2 files changed, 108 insertions(+), 507 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -264,6 +264,9 @@ config BCM63XX + select SYNC_R4K + select DMA_NONCOHERENT + select IRQ_MIPS_CPU ++ select BCM6345_EXT_IRQ ++ select BCM6345_PERIPH_IRQ ++ select IRQ_DOMAIN + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_HAS_EARLY_PRINTK +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -12,7 +12,9 @@ + #include + #include + #include +-#include ++#include ++#include ++#include + #include + #include + #include +@@ -20,544 +22,140 @@ + #include + #include + +- +-static DEFINE_SPINLOCK(ipic_lock); +-static DEFINE_SPINLOCK(epic_lock); +- +-static u32 irq_stat_addr[2]; +-static u32 irq_mask_addr[2]; +-static void (*dispatch_internal)(int cpu); +-static int is_ext_irq_cascaded; +-static unsigned int ext_irq_count; +-static unsigned int ext_irq_start, ext_irq_end; +-static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2; +-static void (*internal_irq_mask)(struct irq_data *d); +-static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m); +- +- +-static inline u32 get_ext_irq_perf_reg(int irq) +-{ +- if (irq < 4) +- return ext_irq_cfg_reg1; +- return ext_irq_cfg_reg2; +-} +- +-static inline void handle_internal(int intbit) +-{ +- if (is_ext_irq_cascaded && +- intbit >= ext_irq_start && intbit <= ext_irq_end) +- do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE); +- else +- do_IRQ(intbit + IRQ_INTERNAL_BASE); +-} +- +-static inline int enable_irq_for_cpu(int cpu, struct irq_data *d, +- const struct cpumask *m) +-{ +- bool enable = cpu_online(cpu); +- +-#ifdef CONFIG_SMP +- if (m) +- enable &= cpumask_test_cpu(cpu, m); +- else if (irqd_affinity_was_set(d)) +- enable &= cpumask_test_cpu(cpu, irq_data_get_affinity_mask(d)); +-#endif +- return enable; +-} +- +-/* +- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not +- * prioritize any interrupt relatively to another. the static counter +- * will resume the loop where it ended the last time we left this +- * function. +- */ +- +-#define BUILD_IPIC_INTERNAL(width) \ +-void __dispatch_internal_##width(int cpu) \ +-{ \ +- u32 pending[width / 32]; \ +- unsigned int src, tgt; \ +- bool irqs_pending = false; \ +- static unsigned int i[2]; \ +- unsigned int *next = &i[cpu]; \ +- unsigned long flags; \ +- \ +- /* read registers in reverse order */ \ +- spin_lock_irqsave(&ipic_lock, flags); \ +- for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \ +- u32 val; \ +- \ +- val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \ +- val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \ +- pending[--tgt] = val; \ +- \ +- if (val) \ +- irqs_pending = true; \ +- } \ +- spin_unlock_irqrestore(&ipic_lock, flags); \ +- \ +- if (!irqs_pending) \ +- return; \ +- \ +- while (1) { \ +- unsigned int to_call = *next; \ +- \ +- *next = (*next + 1) & (width - 1); \ +- if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \ +- handle_internal(to_call); \ +- break; \ +- } \ +- } \ +-} \ +- \ +-static void __internal_irq_mask_##width(struct irq_data *d) \ +-{ \ +- u32 val; \ +- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \ +- unsigned reg = (irq / 32) ^ (width/32 - 1); \ +- unsigned bit = irq & 0x1f; \ +- unsigned long flags; \ +- int cpu; \ +- \ +- spin_lock_irqsave(&ipic_lock, flags); \ +- for_each_present_cpu(cpu) { \ +- if (!irq_mask_addr[cpu]) \ +- break; \ +- \ +- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\ +- val &= ~(1 << bit); \ +- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\ +- } \ +- spin_unlock_irqrestore(&ipic_lock, flags); \ +-} \ +- \ +-static void __internal_irq_unmask_##width(struct irq_data *d, \ +- const struct cpumask *m) \ +-{ \ +- u32 val; \ +- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \ +- unsigned reg = (irq / 32) ^ (width/32 - 1); \ +- unsigned bit = irq & 0x1f; \ +- unsigned long flags; \ +- int cpu; \ +- \ +- spin_lock_irqsave(&ipic_lock, flags); \ +- for_each_present_cpu(cpu) { \ +- if (!irq_mask_addr[cpu]) \ +- break; \ +- \ +- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\ +- if (enable_irq_for_cpu(cpu, d, m)) \ +- val |= (1 << bit); \ +- else \ +- val &= ~(1 << bit); \ +- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\ +- } \ +- spin_unlock_irqrestore(&ipic_lock, flags); \ +-} +- +-BUILD_IPIC_INTERNAL(32); +-BUILD_IPIC_INTERNAL(64); +- +-asmlinkage void plat_irq_dispatch(void) +-{ +- u32 cause; +- +- do { +- cause = read_c0_cause() & read_c0_status() & ST0_IM; +- +- if (!cause) +- break; +- +- if (cause & CAUSEF_IP7) +- do_IRQ(7); +- if (cause & CAUSEF_IP0) +- do_IRQ(0); +- if (cause & CAUSEF_IP1) +- do_IRQ(1); +- if (cause & CAUSEF_IP2) +- dispatch_internal(0); +- if (is_ext_irq_cascaded) { +- if (cause & CAUSEF_IP3) +- dispatch_internal(1); +- } else { +- if (cause & CAUSEF_IP3) +- do_IRQ(IRQ_EXT_0); +- if (cause & CAUSEF_IP4) +- do_IRQ(IRQ_EXT_1); +- if (cause & CAUSEF_IP5) +- do_IRQ(IRQ_EXT_2); +- if (cause & CAUSEF_IP6) +- do_IRQ(IRQ_EXT_3); +- } +- } while (1); +-} +- +-/* +- * internal IRQs operations: only mask/unmask on PERF irq mask +- * register. +- */ +-static void bcm63xx_internal_irq_mask(struct irq_data *d) +-{ +- internal_irq_mask(d); +-} +- +-static void bcm63xx_internal_irq_unmask(struct irq_data *d) +-{ +- internal_irq_unmask(d, NULL); +-} +- +-/* +- * external IRQs operations: mask/unmask and clear on PERF external +- * irq control register. +- */ +-static void bcm63xx_external_irq_mask(struct irq_data *d) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- unsigned long flags; +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- +- if (BCMCPU_IS_6348()) +- reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4); +- else +- reg &= ~EXTIRQ_CFG_MASK(irq % 4); +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +- +- if (is_ext_irq_cascaded) +- internal_irq_mask(irq_get_irq_data(irq + ext_irq_start)); +-} +- +-static void bcm63xx_external_irq_unmask(struct irq_data *d) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- unsigned long flags; +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- +- if (BCMCPU_IS_6348()) +- reg |= EXTIRQ_CFG_MASK_6348(irq % 4); +- else +- reg |= EXTIRQ_CFG_MASK(irq % 4); +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +- +- if (is_ext_irq_cascaded) +- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start), +- NULL); +-} +- +-static void bcm63xx_external_irq_clear(struct irq_data *d) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- unsigned long flags; +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- +- if (BCMCPU_IS_6348()) +- reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4); +- else +- reg |= EXTIRQ_CFG_CLEAR(irq % 4); +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +-} +- +-static int bcm63xx_external_irq_set_type(struct irq_data *d, +- unsigned int flow_type) +-{ +- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; +- u32 reg, regaddr; +- int levelsense, sense, bothedge; +- unsigned long flags; +- +- flow_type &= IRQ_TYPE_SENSE_MASK; +- +- if (flow_type == IRQ_TYPE_NONE) +- flow_type = IRQ_TYPE_LEVEL_LOW; +- +- levelsense = sense = bothedge = 0; +- switch (flow_type) { +- case IRQ_TYPE_EDGE_BOTH: +- bothedge = 1; +- break; +- +- case IRQ_TYPE_EDGE_RISING: +- sense = 1; +- break; +- +- case IRQ_TYPE_EDGE_FALLING: +- break; +- +- case IRQ_TYPE_LEVEL_HIGH: +- levelsense = 1; +- sense = 1; +- break; +- +- case IRQ_TYPE_LEVEL_LOW: +- levelsense = 1; +- break; +- +- default: +- pr_err("bogus flow type combination given !\n"); +- return -EINVAL; +- } +- +- regaddr = get_ext_irq_perf_reg(irq); +- spin_lock_irqsave(&epic_lock, flags); +- reg = bcm_perf_readl(regaddr); +- irq %= 4; +- +- switch (bcm63xx_get_cpu_id()) { +- case BCM6348_CPU_ID: +- if (levelsense) +- reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq); +- else +- reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq); +- if (sense) +- reg |= EXTIRQ_CFG_SENSE_6348(irq); +- else +- reg &= ~EXTIRQ_CFG_SENSE_6348(irq); +- if (bothedge) +- reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq); +- else +- reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); +- break; +- +- case BCM3368_CPU_ID: +- case BCM6328_CPU_ID: +- case BCM6338_CPU_ID: +- case BCM6345_CPU_ID: +- case BCM6358_CPU_ID: +- case BCM6362_CPU_ID: +- case BCM6368_CPU_ID: +- if (levelsense) +- reg |= EXTIRQ_CFG_LEVELSENSE(irq); +- else +- reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); +- if (sense) +- reg |= EXTIRQ_CFG_SENSE(irq); +- else +- reg &= ~EXTIRQ_CFG_SENSE(irq); +- if (bothedge) +- reg |= EXTIRQ_CFG_BOTHEDGE(irq); +- else +- reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); +- break; +- default: +- BUG(); +- } +- +- bcm_perf_writel(reg, regaddr); +- spin_unlock_irqrestore(&epic_lock, flags); +- +- irqd_set_trigger_type(d, flow_type); +- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) +- irq_set_handler_locked(d, handle_level_irq); +- else +- irq_set_handler_locked(d, handle_edge_irq); +- +- return IRQ_SET_MASK_OK_NOCOPY; +-} +- +-#ifdef CONFIG_SMP +-static int bcm63xx_internal_set_affinity(struct irq_data *data, +- const struct cpumask *dest, +- bool force) +-{ +- if (!irqd_irq_disabled(data)) +- internal_irq_unmask(data, dest); +- +- return 0; +-} +-#endif +- +-static struct irq_chip bcm63xx_internal_irq_chip = { +- .name = "bcm63xx_ipic", +- .irq_mask = bcm63xx_internal_irq_mask, +- .irq_unmask = bcm63xx_internal_irq_unmask, +-}; +- +-static struct irq_chip bcm63xx_external_irq_chip = { +- .name = "bcm63xx_epic", +- .irq_ack = bcm63xx_external_irq_clear, +- +- .irq_mask = bcm63xx_external_irq_mask, +- .irq_unmask = bcm63xx_external_irq_unmask, +- +- .irq_set_type = bcm63xx_external_irq_set_type, +-}; +- +-static struct irqaction cpu_ip2_cascade_action = { +- .handler = no_action, +- .name = "cascade_ip2", +- .flags = IRQF_NO_THREAD, +-}; +- +-#ifdef CONFIG_SMP +-static struct irqaction cpu_ip3_cascade_action = { +- .handler = no_action, +- .name = "cascade_ip3", +- .flags = IRQF_NO_THREAD, +-}; +-#endif +- +-static struct irqaction cpu_ext_cascade_action = { +- .handler = no_action, +- .name = "cascade_extirq", +- .flags = IRQF_NO_THREAD, +-}; +- +-static void bcm63xx_init_irq(void) ++void __init arch_init_irq(void) + { +- int irq_bits; +- +- irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF); +- irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF); +- irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF); +- irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF); ++ void __iomem *periph_bases[2]; ++ void __iomem *ext_intc_bases[2]; ++ int periph_irq_count, periph_width, ext_irq_count, ext_shift; ++ int periph_irqs[2] = { 2, 3 }; ++ int ext_irqs[6]; ++ ++ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); ++ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); ++ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); ++ ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); + + switch (bcm63xx_get_cpu_id()) { + case BCM3368_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_3368_REG; +- irq_mask_addr[0] += PERF_IRQMASK_3368_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368; ++ periph_bases[0] += PERF_IRQMASK_3368_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_3368_EXT_IRQ0; ++ ext_irqs[1] = BCM_3368_EXT_IRQ1; ++ ext_irqs[2] = BCM_3368_EXT_IRQ2; ++ ext_irqs[3] = BCM_3368_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6328_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1); +- irq_bits = 64; +- ext_irq_count = 4; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328; ++ periph_bases[0] += PERF_IRQMASK_6328_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6328_REG(1); ++ periph_irq_count = 2; ++ periph_width = 2; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6328_EXT_IRQ0; ++ ext_irqs[1] = BCM_6328_EXT_IRQ1; ++ ext_irqs[2] = BCM_6328_EXT_IRQ2; ++ ext_irqs[3] = BCM_6328_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6338_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6338_REG; +- irq_mask_addr[0] += PERF_IRQMASK_6338_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338; ++ periph_bases[0] += PERF_IRQMASK_6338_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338; ++ ext_irq_count = 4; ++ ext_irqs[0] = 3; ++ ext_irqs[1] = 4; ++ ext_irqs[2] = 5; ++ ext_irqs[3] = 6; ++ ext_shift = 4; + break; + case BCM6345_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6345_REG; +- irq_mask_addr[0] += PERF_IRQMASK_6345_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345; ++ periph_bases[0] += PERF_IRQMASK_6345_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345; ++ ext_irq_count = 4; ++ ext_irqs[0] = 3; ++ ext_irqs[1] = 4; ++ ext_irqs[2] = 5; ++ ext_irqs[3] = 6; ++ ext_shift = 4; + break; + case BCM6348_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6348_REG; +- irq_mask_addr[0] += PERF_IRQMASK_6348_REG; +- irq_stat_addr[1] = 0; +- irq_mask_addr[1] = 0; +- irq_bits = 32; +- ext_irq_count = 4; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348; ++ periph_bases[0] += PERF_IRQMASK_6348_REG; ++ periph_irq_count = 1; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348; ++ ext_irq_count = 4; ++ ext_irqs[0] = 3; ++ ext_irqs[1] = 4; ++ ext_irqs[2] = 5; ++ ext_irqs[3] = 6; ++ ext_shift = 5; + break; + case BCM6358_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1); +- irq_bits = 32; +- ext_irq_count = 4; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358; ++ periph_bases[0] += PERF_IRQMASK_6358_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6358_REG(1); ++ periph_irq_count = 2; ++ periph_width = 1; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6358_EXT_IRQ0; ++ ext_irqs[1] = BCM_6358_EXT_IRQ1; ++ ext_irqs[2] = BCM_6358_EXT_IRQ2; ++ ext_irqs[3] = BCM_6358_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6362_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1); +- irq_bits = 64; +- ext_irq_count = 4; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362; ++ periph_bases[0] += PERF_IRQMASK_6362_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6362_REG(1); ++ periph_irq_count = 2; ++ periph_width = 2; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6362_EXT_IRQ0; ++ ext_irqs[1] = BCM_6362_EXT_IRQ1; ++ ext_irqs[2] = BCM_6362_EXT_IRQ2; ++ ext_irqs[3] = BCM_6362_EXT_IRQ3; ++ ext_shift = 4; + break; + case BCM6368_CPU_ID: +- irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0); +- irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0); +- irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1); +- irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1); +- irq_bits = 64; ++ periph_bases[0] += PERF_IRQMASK_6368_REG(0); ++ periph_bases[1] += PERF_IRQMASK_6368_REG(1); ++ periph_irq_count = 2; ++ periph_width = 2; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368; ++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368; + ext_irq_count = 6; +- is_ext_irq_cascaded = 1; +- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE; +- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE; +- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368; +- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368; ++ ext_irqs[0] = BCM_6368_EXT_IRQ0; ++ ext_irqs[1] = BCM_6368_EXT_IRQ1; ++ ext_irqs[2] = BCM_6368_EXT_IRQ2; ++ ext_irqs[3] = BCM_6368_EXT_IRQ3; ++ ext_irqs[4] = BCM_6368_EXT_IRQ4; ++ ext_irqs[5] = BCM_6368_EXT_IRQ5; ++ ext_shift = 4; + break; + default: + BUG(); + } + +- if (irq_bits == 32) { +- dispatch_internal = __dispatch_internal_32; +- internal_irq_mask = __internal_irq_mask_32; +- internal_irq_unmask = __internal_irq_unmask_32; +- } else { +- dispatch_internal = __dispatch_internal_64; +- internal_irq_mask = __internal_irq_mask_64; +- internal_irq_unmask = __internal_irq_unmask_64; +- } +-} +- +-void __init arch_init_irq(void) +-{ +- int i; +- +- bcm63xx_init_irq(); + mips_cpu_irq_init(); +- for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) +- irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip, +- handle_level_irq); +- +- for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i) +- irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip, +- handle_edge_irq); +- +- if (!is_ext_irq_cascaded) { +- for (i = 3; i < 3 + ext_irq_count; ++i) +- setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action); +- } +- +- setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action); +-#ifdef CONFIG_SMP +- if (is_ext_irq_cascaded) { +- setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action); +- bcm63xx_internal_irq_chip.irq_set_affinity = +- bcm63xx_internal_set_affinity; +- +- cpumask_clear(irq_default_affinity); +- cpumask_set_cpu(smp_processor_id(), irq_default_affinity); +- } +-#endif ++ bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases, ++ periph_width); ++ bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift); ++ if (ext_irq_count > 4) ++ bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1], ++ ext_shift); + } diff --git a/target/linux/brcm63xx/patches-4.9/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch b/target/linux/brcm63xx/patches-4.9/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch new file mode 100644 index 000000000..0796bb552 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch @@ -0,0 +1,57 @@ +From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 20:20:30 +0100 +Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4 + and 5 + +Due to the external interrupts being non consecutive, the previous +implementation did not support them. Now that we treat both registers +as separate irq controllers, there is no such limitation anymore and +we can expose them for drivers to use. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/irq.c | 5 ++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 + + 3 files changed, 7 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -109,11 +109,14 @@ void __init arch_init_irq(void) + periph_width = 1; + + ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358; +- ext_irq_count = 4; ++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358; ++ ext_irq_count = 6; + ext_irqs[0] = BCM_6358_EXT_IRQ0; + ext_irqs[1] = BCM_6358_EXT_IRQ1; + ext_irqs[2] = BCM_6358_EXT_IRQ2; + ext_irqs[3] = BCM_6358_EXT_IRQ3; ++ ext_irqs[4] = BCM_6358_EXT_IRQ4; ++ ext_irqs[5] = BCM_6358_EXT_IRQ5; + ext_shift = 4; + break; + case BCM6362_CPU_ID: +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -895,6 +895,8 @@ enum bcm63xx_irq { + #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26) + #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27) + #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28) ++#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20) ++#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21) + + /* + * 6362 irqs +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -243,6 +243,7 @@ + #define PERF_EXTIRQ_CFG_REG_6362 0x18 + #define PERF_EXTIRQ_CFG_REG_6368 0x18 + ++#define PERF_EXTIRQ_CFG_REG2_6358 0x1c + #define PERF_EXTIRQ_CFG_REG2_6368 0x1c + + /* for 6348 only */ diff --git a/target/linux/brcm63xx/patches-4.9/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch b/target/linux/brcm63xx/patches-4.9/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch new file mode 100644 index 000000000..661abf6d8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/330-MIPS-BCM63XX-add-a-new-cpu-variant-helper.patch @@ -0,0 +1,77 @@ +From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:08:36 +0100 +Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper + +--- + arch/mips/bcm63xx/cpu.c | 10 ++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++ + 2 files changed, 28 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs); + u16 bcm63xx_cpu_id __read_mostly; + EXPORT_SYMBOL(bcm63xx_cpu_id); + ++static u32 bcm63xx_cpu_variant __read_mostly; ++ + static u8 bcm63xx_cpu_rev; + static unsigned int bcm63xx_cpu_freq; + static unsigned int bcm63xx_memory_size; +@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = { + + }; + ++u32 bcm63xx_get_cpu_variant(void) ++{ ++ return bcm63xx_cpu_variant; ++} ++ ++EXPORT_SYMBOL(bcm63xx_get_cpu_variant); ++ + u8 bcm63xx_get_cpu_rev(void) + { + return bcm63xx_cpu_rev; +@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void) + /* read out CPU type */ + tmp = bcm_readl(chipid_reg); + bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; ++ bcm63xx_cpu_variant = bcm63xx_cpu_id; + bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT; + + switch (bcm63xx_cpu_id) { +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -19,6 +19,7 @@ + #define BCM6368_CPU_ID 0x6368 + + void __init bcm63xx_cpu_init(void); ++u32 bcm63xx_get_cpu_variant(void); + u8 bcm63xx_get_cpu_rev(void); + unsigned int bcm63xx_get_cpu_freq(void); + +@@ -82,6 +83,23 @@ static inline u16 __pure bcm63xx_get_cpu + #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID) + #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID) + ++#define BCMCPU_VARIANT_IS_3368() \ ++ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6328() \ ++ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID) ++#define BCMCPU_VARIANT_IS_6338() \ ++ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID) ++#define BCMCPU_VARIANT_IS_6345() \ ++ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID) ++#define BCMCPU_VARIANT_IS_6348() \ ++ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID) ++#define BCMCPU_VARIANT_IS_6358() \ ++ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID) ++#define BCMCPU_VARIANT_IS_6362() \ ++ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) ++#define BCMCPU_VARIANT_IS_6368() \ ++ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) ++ + /* + * While registers sets are (mostly) the same across 63xx CPU, base + * address of these sets do change. diff --git a/target/linux/brcm63xx/patches-4.9/331-MIPS-BCM63XX-define-variant-id-field.patch b/target/linux/brcm63xx/patches-4.9/331-MIPS-BCM63XX-define-variant-id-field.patch new file mode 100644 index 000000000..2e21c6500 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/331-MIPS-BCM63XX-define-variant-id-field.patch @@ -0,0 +1,23 @@ +From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:22:41 +0100 +Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field + +Some SoC have a variant id field in the chip id register. + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -9,6 +9,8 @@ + #define PERF_REV_REG 0x0 + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) ++#define REV_VARID_SHIFT 12 ++#define REV_VARID_MASK (0xf << REV_VARID_SHIFT) + #define REV_REVID_SHIFT 0 + #define REV_REVID_MASK (0xff << REV_REVID_SHIFT) + diff --git a/target/linux/brcm63xx/patches-4.9/332-MIPS-BCM63XX-detect-BCM6328-variants.patch b/target/linux/brcm63xx/patches-4.9/332-MIPS-BCM63XX-detect-BCM6328-variants.patch new file mode 100644 index 000000000..faa002e1e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/332-MIPS-BCM63XX-detect-BCM6328-variants.patch @@ -0,0 +1,68 @@ +From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:30:59 +0100 +Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/cpu.c | 10 ++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++-- + 2 files changed, 16 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void) + unsigned int tmp; + unsigned int cpu = smp_processor_id(); + u32 chipid_reg; ++ u8 __maybe_unused varid = 0; + + /* soc registers location depends on cpu type */ + chipid_reg = 0; +@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void) + bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; + bcm63xx_cpu_variant = bcm63xx_cpu_id; + bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT; ++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT; + + switch (bcm63xx_cpu_id) { + case BCM3368_CPU_ID: +@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void) + case BCM6328_CPU_ID: + bcm63xx_regs_base = bcm6328_regs_base; + bcm63xx_irqs = bcm6328_irqs; ++ ++ if (varid == 1) ++ bcm63xx_cpu_variant = BCM63281_CPU_ID; ++ else if (varid == 3) ++ bcm63xx_cpu_variant = BCM63283_CPU_ID; ++ else ++ pr_warn("unknown BCM6328 variant: %x\n", varid); ++ + break; + case BCM6338_CPU_ID: + bcm63xx_regs_base = bcm6338_regs_base; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -11,6 +11,8 @@ + */ + #define BCM3368_CPU_ID 0x3368 + #define BCM6328_CPU_ID 0x6328 ++#define BCM63281_CPU_ID 0x63281 ++#define BCM63283_CPU_ID 0x63283 + #define BCM6338_CPU_ID 0x6338 + #define BCM6345_CPU_ID 0x6345 + #define BCM6348_CPU_ID 0x6348 +@@ -85,8 +87,10 @@ static inline u16 __pure bcm63xx_get_cpu + + #define BCMCPU_VARIANT_IS_3368() \ + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) +-#define BCMCPU_VARIANT_IS_6328() \ +- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID) ++#define BCMCPU_VARIANT_IS_63281() \ ++ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID) ++#define BCMCPU_VARIANT_IS_63283() \ ++ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID) + #define BCMCPU_VARIANT_IS_6338() \ + (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID) + #define BCMCPU_VARIANT_IS_6345() \ diff --git a/target/linux/brcm63xx/patches-4.9/333-MIPS-BCM63XX-detect-BCM6362-variants.patch b/target/linux/brcm63xx/patches-4.9/333-MIPS-BCM63XX-detect-BCM6362-variants.patch new file mode 100644 index 000000000..62ce12eda --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/333-MIPS-BCM63XX-detect-BCM6362-variants.patch @@ -0,0 +1,46 @@ +From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:33:28 +0100 +Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants + +--- + arch/mips/bcm63xx/cpu.c | 8 ++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++ + 2 files changed, 11 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void) + case BCM6362_CPU_ID: + bcm63xx_regs_base = bcm6362_regs_base; + bcm63xx_irqs = bcm6362_irqs; ++ ++ if (varid == 1) ++ bcm63xx_cpu_variant = BCM6362_CPU_ID; ++ else if (varid == 2) ++ bcm63xx_cpu_variant = BCM6361_CPU_ID; ++ else ++ pr_warn("unknown BCM6362 variant: %x\n", varid); ++ + break; + case BCM6368_CPU_ID: + bcm63xx_regs_base = bcm6368_regs_base; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -17,6 +17,7 @@ + #define BCM6345_CPU_ID 0x6345 + #define BCM6348_CPU_ID 0x6348 + #define BCM6358_CPU_ID 0x6358 ++#define BCM6361_CPU_ID 0x6361 + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 + +@@ -99,6 +100,8 @@ static inline u16 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID) + #define BCMCPU_VARIANT_IS_6358() \ + (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID) ++#define BCMCPU_VARIANT_IS_6361() \ ++ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID) + #define BCMCPU_VARIANT_IS_6362() \ + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) + #define BCMCPU_VARIANT_IS_6368() \ diff --git a/target/linux/brcm63xx/patches-4.9/334-MIPS-BCM63XX-detect-BCM6368-variants.patch b/target/linux/brcm63xx/patches-4.9/334-MIPS-BCM63XX-detect-BCM6368-variants.patch new file mode 100644 index 000000000..a993e238e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/334-MIPS-BCM63XX-detect-BCM6368-variants.patch @@ -0,0 +1,48 @@ +From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:36:56 +0100 +Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants + +The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart +from missing DSL, there is no difference to BCM6368, so treat it such. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/cpu.c | 4 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++ + 2 files changed, 7 insertions(+) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void) + + break; + case BCM6368_CPU_ID: ++ case BCM6369_CPU_ID: + bcm63xx_regs_base = bcm6368_regs_base; + bcm63xx_irqs = bcm6368_irqs; ++ ++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */ ++ bcm63xx_cpu_id = BCM6368_CPU_ID; + break; + default: + panic("unsupported broadcom CPU %x", bcm63xx_cpu_id); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -20,6 +20,7 @@ + #define BCM6361_CPU_ID 0x6361 + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 ++#define BCM6369_CPU_ID 0x6369 + + void __init bcm63xx_cpu_init(void); + u32 bcm63xx_get_cpu_variant(void); +@@ -106,6 +107,8 @@ static inline u16 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID) + #define BCMCPU_VARIANT_IS_6368() \ + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6369() \ ++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID) + + /* + * While registers sets are (mostly) the same across 63xx CPU, base diff --git a/target/linux/brcm63xx/patches-4.9/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch b/target/linux/brcm63xx/patches-4.9/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch new file mode 100644 index 000000000..3230add27 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/335-MIPS-BCM63XX-fix-PCIe-memory-window-size.patch @@ -0,0 +1,20 @@ +From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 03:05:54 +0100 +Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size + +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -41,7 +41,7 @@ + BCM_CB_MEM_SIZE - 1) + + #define BCM_PCIE_MEM_BASE_PA 0x10f00000 +-#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024) ++#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024) + #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \ + BCM_PCIE_MEM_SIZE - 1) + diff --git a/target/linux/brcm63xx/patches-4.9/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch b/target/linux/brcm63xx/patches-4.9/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch new file mode 100644 index 000000000..d6eb54d2e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/336-MIPS-BCM63XX-dynamically-set-the-pcie-memory-windows.patch @@ -0,0 +1,70 @@ +From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 03:13:06 +0100 +Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows + +Different SoCs use different memory windows (and sizes), so don't +hardcode it. +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++---- + arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++----- + 2 files changed, 14 insertions(+), 9 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -40,10 +40,10 @@ + #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \ + BCM_CB_MEM_SIZE - 1) + +-#define BCM_PCIE_MEM_BASE_PA 0x10f00000 +-#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024) +-#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \ +- BCM_PCIE_MEM_SIZE - 1) ++#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000 ++#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024) ++#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \ ++ BCM_PCIE_MEM_SIZE_6328 - 1) + + /* + * Internal registers are accessed through KSEG3 +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control + + static struct resource bcm_pcie_mem_resource = { + .name = "bcm63xx PCIe memory space", +- .start = BCM_PCIE_MEM_BASE_PA, +- .end = BCM_PCIE_MEM_END_PA, ++ .start = 0, ++ .end = 0, + .flags = IORESOURCE_MEM, + }; + +@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie( + bcm_pcie_writel(val, PCIE_CONFIG2_REG); + + /* set bar0 to little endian */ +- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT; +- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT; ++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT; ++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT; + val |= BASEMASK_REMAP_EN; + bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG); + +- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT; ++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT; + bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG); + + register_pci_controller(&bcm63xx_pcie_controller); +@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void) + if (!bcm63xx_pci_enabled) + return -ENODEV; + ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { ++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328; ++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328; ++ } ++ + switch (bcm63xx_get_cpu_id()) { + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.9/337-MIPS-BCM63XX-widen-cpuid-field.patch b/target/linux/brcm63xx/patches-4.9/337-MIPS-BCM63XX-widen-cpuid-field.patch new file mode 100644 index 000000000..0ead82e86 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/337-MIPS-BCM63XX-widen-cpuid-field.patch @@ -0,0 +1,56 @@ +From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 14:54:51 +0100 +Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field + +--- + arch/mips/bcm63xx/cpu.c | 2 +- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++---- + 2 files changed, 5 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base); + const int *bcm63xx_irqs; + EXPORT_SYMBOL(bcm63xx_irqs); + +-u16 bcm63xx_cpu_id __read_mostly; ++u32 bcm63xx_cpu_id __read_mostly; + EXPORT_SYMBOL(bcm63xx_cpu_id); + + static u32 bcm63xx_cpu_variant __read_mostly; +@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi + + static unsigned int detect_cpu_clock(void) + { +- u16 cpu_id = bcm63xx_get_cpu_id(); ++ u32 cpu_id = bcm63xx_get_cpu_id(); + + switch (cpu_id) { + case BCM3368_CPU_ID: +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -27,7 +27,7 @@ u32 bcm63xx_get_cpu_variant(void); + u8 bcm63xx_get_cpu_rev(void); + unsigned int bcm63xx_get_cpu_freq(void); + +-static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id) ++static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id) + { + switch (cpu_id) { + #ifdef CONFIG_BCM63XX_CPU_3368 +@@ -69,11 +69,11 @@ static inline u16 __pure __bcm63xx_get_c + return cpu_id; + } + +-extern u16 bcm63xx_cpu_id; ++extern u32 bcm63xx_cpu_id; + +-static inline u16 __pure bcm63xx_get_cpu_id(void) ++static inline u32 __pure bcm63xx_get_cpu_id(void) + { +- const u16 cpu_id = bcm63xx_cpu_id; ++ const u32 cpu_id = bcm63xx_cpu_id; + + return __bcm63xx_get_cpu_id(cpu_id); + } diff --git a/target/linux/brcm63xx/patches-4.9/338-MIPS-BCM63XX-increase-number-of-IRQs.patch b/target/linux/brcm63xx/patches-4.9/338-MIPS-BCM63XX-increase-number-of-IRQs.patch new file mode 100644 index 000000000..9132e4231 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/338-MIPS-BCM63XX-increase-number-of-IRQs.patch @@ -0,0 +1,39 @@ +From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 15 Dec 2013 20:46:26 +0100 +Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs + +Newer SoCs have 128 bit wide irq registers, thus 128 available internal +interupts. +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++- + arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +- + 2 files changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h +@@ -1,10 +1,12 @@ + #ifndef BCM63XX_IRQ_H_ + #define BCM63XX_IRQ_H_ + ++#include + #include + + #define IRQ_INTERNAL_BASE 8 +-#define IRQ_EXTERNAL_BASE 100 ++#define NR_INTERNAL_IRQS 128 ++#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS) + #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0) + #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1) + #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2) +--- a/arch/mips/include/asm/mach-bcm63xx/irq.h ++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h +@@ -1,7 +1,7 @@ + #ifndef __ASM_MACH_BCM63XX_IRQ_H + #define __ASM_MACH_BCM63XX_IRQ_H + +-#define NR_IRQS 128 ++#define NR_IRQS 256 + #define MIPS_CPU_IRQ_BASE 0 + + #endif diff --git a/target/linux/brcm63xx/patches-4.9/339-MIPS-BCM63XX-add-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.9/339-MIPS-BCM63XX-add-support-for-BCM63268.patch new file mode 100644 index 000000000..e2c179d8b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/339-MIPS-BCM63XX-add-support-for-BCM63268.patch @@ -0,0 +1,737 @@ +From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 7 Dec 2013 17:14:17 +0100 +Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268 + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/Kconfig | 5 + + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/clk.c | 25 ++++- + arch/mips/bcm63xx/cpu.c | 59 +++++++++- + arch/mips/bcm63xx/dev-flash.c | 6 + + arch/mips/bcm63xx/dev-spi.c | 4 +- + arch/mips/bcm63xx/irq.c | 20 +++- + arch/mips/bcm63xx/reset.c | 21 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 130 ++++++++++++++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 + + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 79 +++++++++++++ + arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 + + 12 files changed, 342 insertions(+), 12 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -60,6 +60,11 @@ config BCM63XX_CPU_6368 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ ++config BCM63XX_CPU_63268 ++ bool "support 63268 CPU" ++ select SYS_HAS_CPU_BMIPS4350 ++ select HW_HAS_PCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -713,7 +713,7 @@ void __init board_prom_init(void) + /* read base address of boot chip select (0) + * 6328/6362 do not have MPI but boot from a fixed address + */ +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { + val = 0x18000000; + } else { + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -168,6 +168,8 @@ static void enetsw_set(struct clk *clk, + clk_disable_unlocked(&clk_swpkt_sar); + } + bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable); ++ } else if (BCMCPU_IS_63268()) { ++ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable); + } else { + return; + } +@@ -213,6 +215,8 @@ static void usbh_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); ++ else if (BCMCPU_IS_63268()) ++ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable); + else + return; + +@@ -235,6 +239,8 @@ static void usbd_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); ++ else if (BCMCPU_IS_63268()) ++ bcm_hwclock_set(CKCTL_63268_USBD_EN, enable); + else + return; + +@@ -261,9 +267,13 @@ static void spi_set(struct clk *clk, int + mask = CKCTL_6358_SPI_EN; + else if (BCMCPU_IS_6362()) + mask = CKCTL_6362_SPI_EN; +- else +- /* BCMCPU_IS_6368 */ ++ else if (BCMCPU_IS_6368()) + mask = CKCTL_6368_SPI_EN; ++ else if (BCMCPU_IS_63268()) ++ mask = CKCTL_63268_SPI_EN; ++ else ++ return; ++ + bcm_hwclock_set(mask, enable); + } + +@@ -282,6 +292,8 @@ static void hsspi_set(struct clk *clk, i + mask = CKCTL_6328_HSSPI_EN; + else if (BCMCPU_IS_6362()) + mask = CKCTL_6362_HSSPI_EN; ++ else if (BCMCPU_IS_63268()) ++ mask = CKCTL_63268_HSSPI_EN; + else + return; + +@@ -351,6 +363,8 @@ static void pcie_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable); + else if (BCMCPU_IS_6362()) + bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable); ++ else if (BCMCPU_IS_63268()) ++ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable); + } + + static struct clk clk_pcie = { +@@ -535,6 +549,21 @@ static struct clk_lookup bcm6368_clks[] + CLKDEV_INIT(NULL, "ipsec", &clk_ipsec), + }; + ++static struct clk_lookup bcm63268_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbd), ++ CLKDEV_INIT(NULL, "spi", &clk_spi), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++}; ++ + #define HSSPI_PLL_HZ_6328 133333333 + #define HSSPI_PLL_HZ_6362 400000000 + +@@ -567,6 +596,10 @@ static int __init bcm63xx_clk_init(void) + case BCM6368_CPU_ID: + clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks)); + break; ++ case BCM63268_CPU_ID: ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362; ++ clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks)); ++ break; + } + + return 0; +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = { + + }; + ++static const unsigned long bcm63268_regs_base[] = { ++ __GEN_CPU_REGS_TABLE(63268) ++}; ++ ++static const int bcm63268_irqs[] = { ++ __GEN_CPU_IRQ_TABLE(63268) ++ ++}; ++ + u32 bcm63xx_get_cpu_variant(void) + { + return bcm63xx_cpu_variant; +@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi + + return (((64 * 1000000) / p1) * p2 * ndiv) / m1; + } ++ case BCM63268_CPU_ID: ++ { ++ unsigned int tmp, mips_pll_fcvo; ++ ++ tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG); ++ mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >> ++ STRAPBUS_63268_FCVO_SHIFT; ++ switch (mips_pll_fcvo) { ++ case 0x3: ++ case 0xe: ++ return 320000000; ++ case 0xa: ++ return 333000000; ++ case 0x2: ++ case 0xb: ++ case 0xf: ++ return 400000000; ++ default: ++ return 0; ++ } ++ } + + default: + panic("Failed to detect clock for CPU with id=%04X\n", cpu_id); +@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v + unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; + u32 val; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) + return bcm_ddr_readl(DDR_CSEND_REG) << 24; + + if (BCMCPU_IS_6345()) { +@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void) + unsigned int tmp; + unsigned int cpu = smp_processor_id(); + u32 chipid_reg; ++ bool long_chipid = false; + u8 __maybe_unused varid = 0; + + /* soc registers location depends on cpu type */ +@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void) + case 0x10: + chipid_reg = BCM_6345_PERF_BASE; + break; ++ case 0x80: ++ long_chipid = true; ++ /* fall-through */ + default: + chipid_reg = BCM_6368_PERF_BASE; + break; +@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void) + break; + } + ++ + /* + * really early to panic, but delaying panic would not help since we + * will never get any working console +@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void) + + /* read out CPU type */ + tmp = bcm_readl(chipid_reg); +- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; +- bcm63xx_cpu_variant = bcm63xx_cpu_id; ++ ++ if (long_chipid) { ++ bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK; ++ bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT; ++ } else { ++ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; ++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT; ++ } ++ + bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT; +- varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT; ++ bcm63xx_cpu_variant = bcm63xx_cpu_id; + + switch (bcm63xx_cpu_id) { + case BCM3368_CPU_ID: +@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void) + /* BCM6369 is a BCM6368 without xDSL, so treat it the same */ + bcm63xx_cpu_id = BCM6368_CPU_ID; + break; ++ case BCM63168_CPU_ID: ++ case BCM63169_CPU_ID: ++ case BCM63268_CPU_ID: ++ case BCM63269_CPU_ID: ++ bcm63xx_regs_base = bcm63268_regs_base; ++ bcm63xx_irqs = bcm63268_irqs; ++ ++ bcm63xx_cpu_id = BCM63268_CPU_ID; ++ break; + default: + panic("unsupported broadcom CPU %x", bcm63xx_cpu_id); + break; +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t + case STRAPBUS_6368_BOOT_SEL_PARALLEL: + return BCM63XX_FLASH_TYPE_PARALLEL; + } ++ case BCM63268_CPU_ID: ++ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG); ++ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL) ++ return BCM63XX_FLASH_TYPE_SERIAL; ++ else ++ return BCM63XX_FLASH_TYPE_NAND; + default: + return -EINVAL; + } +--- a/arch/mips/bcm63xx/dev-spi.c ++++ b/arch/mips/bcm63xx/dev-spi.c +@@ -51,7 +51,7 @@ int __init bcm63xx_spi_register(void) + } + + if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() || +- BCMCPU_IS_6368()) { ++ BCMCPU_IS_6368() || BCMCPU_IS_63268()) { + bcm63xx_spi_device.name = "bcm6358-spi", + spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; + } +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -150,6 +150,20 @@ void __init arch_init_irq(void) + ext_irqs[5] = BCM_6368_EXT_IRQ5; + ext_shift = 4; + break; ++ case BCM63268_CPU_ID: ++ periph_bases[0] += PERF_IRQMASK_63268_REG(0); ++ periph_bases[1] += PERF_IRQMASK_63268_REG(1); ++ periph_irq_count = 2; ++ periph_width = 4; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_63268_EXT_IRQ0; ++ ext_irqs[1] = BCM_63268_EXT_IRQ1; ++ ext_irqs[2] = BCM_63268_EXT_IRQ2; ++ ext_irqs[3] = BCM_63268_EXT_IRQ3; ++ ext_shift = 4; ++ break; + default: + BUG(); + } +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -125,6 +125,20 @@ + #define BCM6368_RESET_PCIE 0 + #define BCM6368_RESET_PCIE_EXT 0 + ++#define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK ++#define BCM63268_RESET_ENET 0 ++#define BCM63268_RESET_USBH SOFTRESET_63268_USBH_MASK ++#define BCM63268_RESET_USBD SOFTRESET_63268_USBS_MASK ++#define BCM63268_RESET_DSL 0 ++#define BCM63268_RESET_SAR SOFTRESET_63268_SAR_MASK ++#define BCM63268_RESET_EPHY 0 ++#define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK ++#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK ++#define BCM63268_RESET_MPI 0 ++#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \ ++ SOFTRESET_63268_PCIE_CORE_MASK) ++#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK ++ + /* + * core reset bits + */ +@@ -156,6 +170,10 @@ static const u32 bcm6368_reset_bits[] = + __GEN_RESET_BITS_TABLE(6368) + }; + ++static const u32 bcm63268_reset_bits[] = { ++ __GEN_RESET_BITS_TABLE(63268) ++}; ++ + const u32 *bcm63xx_reset_bits; + static int reset_reg; + +@@ -182,6 +200,9 @@ static int __init bcm63xx_reset_bits_ini + } else if (BCMCPU_IS_6368()) { + reset_reg = PERF_SOFTRESET_6368_REG; + bcm63xx_reset_bits = bcm6368_reset_bits; ++ } else if (BCMCPU_IS_63268()) { ++ reset_reg = PERF_SOFTRESET_63268_REG; ++ bcm63xx_reset_bits = bcm63268_reset_bits; + } + + return 0; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -21,6 +21,10 @@ + #define BCM6362_CPU_ID 0x6362 + #define BCM6368_CPU_ID 0x6368 + #define BCM6369_CPU_ID 0x6369 ++#define BCM63168_CPU_ID 0x63168 ++#define BCM63169_CPU_ID 0x63169 ++#define BCM63268_CPU_ID 0x63268 ++#define BCM63269_CPU_ID 0x63269 + + void __init bcm63xx_cpu_init(void); + u32 bcm63xx_get_cpu_variant(void); +@@ -61,6 +65,10 @@ static inline u32 __pure __bcm63xx_get_c + #ifdef CONFIG_BCM63XX_CPU_6368 + case BCM6368_CPU_ID: + #endif ++ ++#ifdef CONFIG_BCM63XX_CPU_63268 ++ case BCM63268_CPU_ID: ++#endif + break; + default: + unreachable(); +@@ -86,6 +94,7 @@ static inline u32 __pure bcm63xx_get_cpu + #define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID) + #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID) + #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID) ++#define BCMCPU_IS_63268() (bcm63xx_get_cpu_id() == BCM63268_CPU_ID) + + #define BCMCPU_VARIANT_IS_3368() \ + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) +@@ -109,6 +118,14 @@ static inline u32 __pure bcm63xx_get_cpu + (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID) + #define BCMCPU_VARIANT_IS_6369() \ + (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID) ++#define BCMCPU_VARIANT_IS_63168() \ ++ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID) ++#define BCMCPU_VARIANT_IS_63169() \ ++ (bcm63xx_get_cpu_variant() == BCM63169_CPU_ID) ++#define BCMCPU_VARIANT_IS_63268() \ ++ (bcm63xx_get_cpu_variant() == BCM63268_CPU_ID) ++#define BCMCPU_VARIANT_IS_63269() \ ++ (bcm63xx_get_cpu_variant() == BCM63269_CPU_ID) + + /* + * While registers sets are (mostly) the same across 63xx CPU, base +@@ -573,6 +590,52 @@ enum bcm63xx_regs_set { + #define BCM_6368_RNG_BASE (0xb0004180) + #define BCM_6368_MISC_BASE (0xdeadbeef) + ++/* ++ * 63268 register sets base address ++ */ ++#define BCM_63268_DSL_LMEM_BASE (0xdeadbeef) ++#define BCM_63268_PERF_BASE (0xb0000000) ++#define BCM_63268_TIMER_BASE (0xb0000080) ++#define BCM_63268_WDT_BASE (0xb000009c) ++#define BCM_63268_UART0_BASE (0xb0000180) ++#define BCM_63268_UART1_BASE (0xb00001a0) ++#define BCM_63268_GPIO_BASE (0xb00000c0) ++#define BCM_63268_SPI_BASE (0xb0000800) ++#define BCM_63268_HSSPI_BASE (0xb0001000) ++#define BCM_63268_UDC0_BASE (0xdeadbeef) ++#define BCM_63268_USBDMA_BASE (0xb000c800) ++#define BCM_63268_OHCI0_BASE (0xb0002600) ++#define BCM_63268_OHCI_PRIV_BASE (0xdeadbeef) ++#define BCM_63268_USBH_PRIV_BASE (0xb0002700) ++#define BCM_63268_USBD_BASE (0xb0002400) ++#define BCM_63268_MPI_BASE (0xdeadbeef) ++#define BCM_63268_PCMCIA_BASE (0xdeadbeef) ++#define BCM_63268_PCIE_BASE (0xb06e0000) ++#define BCM_63268_SDRAM_REGS_BASE (0xdeadbeef) ++#define BCM_63268_DSL_BASE (0xdeadbeef) ++#define BCM_63268_UBUS_BASE (0xdeadbeef) ++#define BCM_63268_ENET0_BASE (0xdeadbeef) ++#define BCM_63268_ENET1_BASE (0xdeadbeef) ++#define BCM_63268_ENETDMA_BASE (0xb000d800) ++#define BCM_63268_ENETDMAC_BASE (0xb000da00) ++#define BCM_63268_ENETDMAS_BASE (0xb000dc00) ++#define BCM_63268_ENETSW_BASE (0xb0700000) ++#define BCM_63268_EHCI0_BASE (0xb0002500) ++#define BCM_63268_SDRAM_BASE (0xdeadbeef) ++#define BCM_63268_MEMC_BASE (0xdeadbeef) ++#define BCM_63268_DDR_BASE (0xb0003000) ++#define BCM_63268_M2M_BASE (0xdeadbeef) ++#define BCM_63268_ATM_BASE (0xdeadbeef) ++#define BCM_63268_XTM_BASE (0xb0007000) ++#define BCM_63268_XTMDMA_BASE (0xb000b800) ++#define BCM_63268_XTMDMAC_BASE (0xdeadbeef) ++#define BCM_63268_XTMDMAS_BASE (0xdeadbeef) ++#define BCM_63268_PCM_BASE (0xb000b000) ++#define BCM_63268_PCMDMA_BASE (0xb000b800) ++#define BCM_63268_PCMDMAC_BASE (0xdeadbeef) ++#define BCM_63268_PCMDMAS_BASE (0xdeadbeef) ++#define BCM_63268_RNG_BASE (0xdeadbeef) ++#define BCM_63268_MISC_BASE (0xb0001800) + + extern const unsigned long *bcm63xx_regs_base; + +@@ -1041,6 +1104,73 @@ enum bcm63xx_irq { + #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24) + #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25) + ++/* ++ * 63268 irqs ++ */ ++#define BCM_63268_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32) ++#define BCM_63268_VERY_HIGH_IRQ_BASE (BCM_63268_HIGH_IRQ_BASE + 32) ++ ++#define BCM_63268_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) ++#define BCM_63268_SPI_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 16) ++#define BCM_63268_UART0_IRQ (IRQ_INTERNAL_BASE + 5) ++#define BCM_63268_UART1_IRQ (BCM_63268_HIGH_IRQ_BASE + 2) ++#define BCM_63268_DSL_IRQ (IRQ_INTERNAL_BASE + 23) ++#define BCM_63268_UDC0_IRQ 0 ++#define BCM_63268_ENET0_IRQ 0 ++#define BCM_63268_ENET1_IRQ 0 ++#define BCM_63268_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 13) ++#define BCM_63268_HSSPI_IRQ (IRQ_INTERNAL_BASE + 6) ++#define BCM_63268_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_63268_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) ++#define BCM_63268_USBD_IRQ (IRQ_INTERNAL_BASE + 11) ++#define BCM_63268_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 19) ++#define BCM_63268_USBD_TXDMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 4) ++#define BCM_63268_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 20) ++#define BCM_63268_USBD_TXDMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 5) ++#define BCM_63268_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 21) ++#define BCM_63268_USBD_TXDMA2_IRQ (BCM_63268_HIGH_IRQ_BASE + 6) ++#define BCM_63268_PCMCIA_IRQ 0 ++#define BCM_63268_ENET0_RXDMA_IRQ 0 ++#define BCM_63268_ENET0_TXDMA_IRQ 0 ++#define BCM_63268_ENET1_RXDMA_IRQ 0 ++#define BCM_63268_ENET1_TXDMA_IRQ 0 ++#define BCM_63268_PCI_IRQ (BCM_63268_HIGH_IRQ_BASE + 8) ++#define BCM_63268_ATM_IRQ 0 ++#define BCM_63268_ENETSW_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 1) ++#define BCM_63268_ENETSW_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 2) ++#define BCM_63268_ENETSW_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 3) ++#define BCM_63268_ENETSW_RXDMA3_IRQ (IRQ_INTERNAL_BASE + 4) ++#define BCM_63268_ENETSW_TXDMA0_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 0) ++#define BCM_63268_ENETSW_TXDMA1_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 1) ++#define BCM_63268_ENETSW_TXDMA2_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 2) ++#define BCM_63268_ENETSW_TXDMA3_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 3) ++#define BCM_63268_XTM_IRQ (BCM_63268_HIGH_IRQ_BASE + 17) ++#define BCM_63268_XTM_DMA0_IRQ (IRQ_INTERNAL_BASE + 26) ++ ++#define BCM_63268_RING_OSC_IRQ (BCM_63268_HIGH_IRQ_BASE + 20) ++#define BCM_63268_WLAN_GPIO_IRQ (BCM_63268_HIGH_IRQ_BASE + 3) ++#define BCM_63268_WLAN_IRQ (IRQ_INTERNAL_BASE + 7) ++#define BCM_63268_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8) ++#define BCM_63268_NAND_IRQ (BCM_63268_HIGH_IRQ_BASE + 18) ++#define BCM_63268_PCM_IRQ (IRQ_INTERNAL_BASE + 13) ++#define BCM_63268_DG_IRQ (IRQ_INTERNAL_BASE + 15) ++#define BCM_63268_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16) ++#define BCM_63268_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17) ++#define BCM_63268_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18) ++#define BCM_63268_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19) ++#define BCM_63268_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 22) ++#define BCM_63268_IPSEC_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 7) ++#define BCM_63268_FAP0_IRQ (IRQ_INTERNAL_BASE + 24) ++#define BCM_63268_FAP1_IRQ (IRQ_INTERNAL_BASE + 25) ++#define BCM_63268_PCM_DMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 10) ++#define BCM_63268_PCM_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 11) ++#define BCM_63268_DECT0_IRQ (BCM_63268_HIGH_IRQ_BASE + 0) ++#define BCM_63268_DECT1_IRQ (BCM_63268_HIGH_IRQ_BASE + 1) ++#define BCM_63268_EXT_IRQ0 (BCM_63268_HIGH_IRQ_BASE + 12) ++#define BCM_63268_EXT_IRQ1 (BCM_63268_HIGH_IRQ_BASE + 13) ++#define BCM_63268_EXT_IRQ2 (BCM_63268_HIGH_IRQ_BASE + 14) ++#define BCM_63268_EXT_IRQ3 (BCM_63268_HIGH_IRQ_BASE + 15) ++ + extern const int *bcm63xx_irqs; + + #define __GEN_CPU_IRQ_TABLE(__cpu) \ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +@@ -22,6 +22,8 @@ static inline unsigned long bcm63xx_gpio + return 48; + case BCM6368_CPU_ID: + return 38; ++ case BCM63268_CPU_ID: ++ return 52; + case BCM6348_CPU_ID: + default: + return 37; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -9,6 +9,8 @@ + #define PERF_REV_REG 0x0 + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) ++#define REV_LONG_CHIPID_SHIFT 12 ++#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT) + #define REV_VARID_SHIFT 12 + #define REV_VARID_MASK (0xf << REV_VARID_SHIFT) + #define REV_REVID_SHIFT 0 +@@ -211,6 +213,52 @@ + CKCTL_6368_NAND_EN | \ + CKCTL_6368_IPSEC_EN) + ++#define CKCTL_63268_DISABLE_GLESS (1 << 0) ++#define CKCTL_63268_VDSL_QPROC_EN (1 << 1) ++#define CKCTL_63268_VDSL_AFE_EN (1 << 2) ++#define CKCTL_63268_VDSL_EN (1 << 3) ++#define CKCTL_63268_MIPS_EN (1 << 4) ++#define CKCTL_63268_WLAN_OCP_EN (1 << 5) ++#define CKCTL_63268_DECT_EN (1 << 6) ++#define CKCTL_63268_FAP0_EN (1 << 7) ++#define CKCTL_63268_FAP1_EN (1 << 8) ++#define CKCTL_63268_SAR_EN (1 << 9) ++#define CKCTL_63268_ROBOSW_EN (1 << 10) ++#define CKCTL_63268_PCM_EN (1 << 11) ++#define CKCTL_63268_USBD_EN (1 << 12) ++#define CKCTL_63268_USBH_EN (1 << 13) ++#define CKCTL_63268_IPSEC_EN (1 << 14) ++#define CKCTL_63268_SPI_EN (1 << 15) ++#define CKCTL_63268_HSSPI_EN (1 << 16) ++#define CKCTL_63268_PCIE_EN (1 << 17) ++#define CKCTL_63268_PHYMIPS_EN (1 << 18) ++#define CKCTL_63268_GMAC_EN (1 << 19) ++#define CKCTL_63268_NAND_EN (1 << 20) ++#define CKCTL_63268_TBUS_EN (1 << 27) ++#define CKCTL_63268_ROBOSW250_EN (1 << 31) ++ ++#define CKCTL_63268_ALL_SAFE_EN (CKCTL_63268_VDSL_QPROC_EN | \ ++ CKCTL_63268_VDSL_AFE_EN | \ ++ CKCTL_63268_VDSL_EN | \ ++ CKCTL_63268_WLAN_OCP_EN | \ ++ CKCTL_63268_DECT_EN | \ ++ CKCTL_63268_FAP0_EN | \ ++ CKCTL_63268_FAP1_EN | \ ++ CKCTL_63268_SAR_EN | \ ++ CKCTL_63268_ROBOSW_EN | \ ++ CKCTL_63268_PCM_EN | \ ++ CKCTL_63268_USBD_EN | \ ++ CKCTL_63268_USBH_EN | \ ++ CKCTL_63268_IPSEC_EN | \ ++ CKCTL_63268_SPI_EN | \ ++ CKCTL_63268_HSSPI_EN | \ ++ CKCTL_63268_PCIE_EN | \ ++ CKCTL_63268_PHYMIPS_EN | \ ++ CKCTL_63268_GMAC_EN | \ ++ CKCTL_63268_NAND_EN | \ ++ CKCTL_63268_TBUS_EN | \ ++ CKCTL_63268_ROBOSW250_EN) ++ + /* System PLL Control register */ + #define PERF_SYS_PLL_CTL_REG 0x8 + #define SYS_PLL_SOFT_RESET 0x1 +@@ -224,6 +272,7 @@ + #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c) + #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10) + #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10) ++#define PERF_IRQMASK_63268_REG(x) (0x20 + (x) * 0x20) + + /* Interrupt Status register */ + #define PERF_IRQSTAT_3368_REG 0x10 +@@ -234,6 +283,7 @@ + #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c) + #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10) + #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10) ++#define PERF_IRQSTAT_63268_REG(x) (0x30 + (x) * 0x20) + + /* External Interrupt Configuration register */ + #define PERF_EXTIRQ_CFG_REG_3368 0x14 +@@ -244,6 +294,7 @@ + #define PERF_EXTIRQ_CFG_REG_6358 0x14 + #define PERF_EXTIRQ_CFG_REG_6362 0x18 + #define PERF_EXTIRQ_CFG_REG_6368 0x18 ++#define PERF_EXTIRQ_CFG_REG_63268 0x18 + + #define PERF_EXTIRQ_CFG_REG2_6358 0x1c + #define PERF_EXTIRQ_CFG_REG2_6368 0x1c +@@ -274,6 +325,7 @@ + #define PERF_SOFTRESET_6358_REG 0x34 + #define PERF_SOFTRESET_6362_REG 0x10 + #define PERF_SOFTRESET_6368_REG 0x10 ++#define PERF_SOFTRESET_63268_REG 0x10 + + #define SOFTRESET_3368_SPI_MASK (1 << 0) + #define SOFTRESET_3368_ENET_MASK (1 << 2) +@@ -367,6 +419,26 @@ + #define SOFTRESET_6368_USBH_MASK (1 << 12) + #define SOFTRESET_6368_PCM_MASK (1 << 13) + ++#define SOFTRESET_63268_SPI_MASK (1 << 0) ++#define SOFTRESET_63268_IPSEC_MASK (1 << 1) ++#define SOFTRESET_63268_EPHY_MASK (1 << 2) ++#define SOFTRESET_63268_SAR_MASK (1 << 3) ++#define SOFTRESET_63268_ENETSW_MASK (1 << 4) ++#define SOFTRESET_63268_USBS_MASK (1 << 5) ++#define SOFTRESET_63268_USBH_MASK (1 << 6) ++#define SOFTRESET_63268_PCM_MASK (1 << 7) ++#define SOFTRESET_63268_PCIE_CORE_MASK (1 << 8) ++#define SOFTRESET_63268_PCIE_MASK (1 << 9) ++#define SOFTRESET_63268_PCIE_EXT_MASK (1 << 10) ++#define SOFTRESET_63268_WLAN_SHIM_MASK (1 << 11) ++#define SOFTRESET_63268_DDR_PHY_MASK (1 << 12) ++#define SOFTRESET_63268_FAP0_MASK (1 << 13) ++#define SOFTRESET_63268_WLAN_UBUS_MASK (1 << 14) ++#define SOFTRESET_63268_DECT_MASK (1 << 15) ++#define SOFTRESET_63268_FAP1_MASK (1 << 16) ++#define SOFTRESET_63268_PCIE_HARD_MASK (1 << 17) ++#define SOFTRESET_63268_GPHY_MASK (1 << 18) ++ + /* MIPS PLL control register */ + #define PERF_MIPSPLLCTL_REG 0x34 + #define MIPSPLLCTL_N1_SHIFT 20 +@@ -1366,6 +1438,13 @@ + #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15) + #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15) + ++#define MISC_STRAPBUS_63268_REG 0x14 ++#define STRAPBUS_63268_HSSPI_CLK_FAST (1 << 9) ++#define STRAPBUS_63268_BOOT_SEL_SERIAL (1 << 11) ++#define STRAPBUS_63268_BOOT_SEL_NAND (0 << 11) ++#define STRAPBUS_63268_FCVO_SHIFT 21 ++#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT) ++ + #define MISC_STRAPBUS_6328_REG 0x240 + #define STRAPBUS_6328_FCVO_SHIFT 7 + #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) +--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h ++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h +@@ -25,6 +25,7 @@ static inline int is_bcm63xx_internal_re + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: + case BCM6368_CPU_ID: ++ case BCM63268_CPU_ID: + if (offset >= 0xb0000000 && offset < 0xb1000000) + return 1; + break; +--- a/arch/mips/bcm63xx/dev-hsspi.c ++++ b/arch/mips/bcm63xx/dev-hsspi.c +@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs + + int __init bcm63xx_hsspi_register(void) + { +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362()) ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268()) + return -ENODEV; + + spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -176,7 +176,8 @@ static int __init register_shared(void) + else + shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() || ++ BCMCPU_IS_63268()) + chan_count = 32; + else if (BCMCPU_IS_6345()) + chan_count = 8; +@@ -284,7 +285,8 @@ bcm63xx_enetsw_register(const struct bcm + { + int ret; + +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && ++ !BCMCPU_IS_63268()) + return -ENODEV; + + ret = register_shared(); +@@ -305,6 +307,8 @@ bcm63xx_enetsw_register(const struct bcm + enetsw_pd.num_ports = ENETSW_PORTS_6328; + else if (BCMCPU_IS_6362() || BCMCPU_IS_6368()) + enetsw_pd.num_ports = ENETSW_PORTS_6368; ++ else if (BCMCPU_IS_63268()) ++ enetsw_pd.num_ports = ENETSW_PORTS_63268; + + enetsw_pd.dma_has_sram = true; + enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h +@@ -66,6 +66,7 @@ struct bcm63xx_enet_platform_data { + #define ENETSW_MAX_PORT 8 + #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */ + #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */ ++#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */ + + #define ENETSW_RGMII_PORT0 4 + diff --git a/target/linux/brcm63xx/patches-4.9/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch b/target/linux/brcm63xx/patches-4.9/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch new file mode 100644 index 000000000..4e8a09079 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/340-MIPS-BCM63XX-add-pcie-support-for-BCM63268.patch @@ -0,0 +1,55 @@ +From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 03:22:40 +0100 +Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268 + +--- + arch/mips/bcm63xx/reset.c | 3 ++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++ + arch/mips/pci/pci-bcm63xx.c | 4 ++++ + 3 files changed, 11 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -136,7 +136,8 @@ + #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK + #define BCM63268_RESET_MPI 0 + #define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \ +- SOFTRESET_63268_PCIE_CORE_MASK) ++ SOFTRESET_63268_PCIE_CORE_MASK | \ ++ SOFTRESET_63268_PCIE_HARD_MASK) + #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK + + /* +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -45,6 +45,11 @@ + #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \ + BCM_PCIE_MEM_SIZE_6328 - 1) + ++#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000 ++#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024) ++#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \ ++ BCM_PCIE_MEM_SIZE_63268 - 1) ++ + /* + * Internal registers are accessed through KSEG3 + */ +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void) + if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { + bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328; + bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328; ++ } else if (BCMCPU_IS_63268()) { ++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268; ++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268; + } + + switch (bcm63xx_get_cpu_id()) { + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: ++ case BCM63268_CPU_ID: + return bcm63xx_register_pcie(); + case BCM3368_CPU_ID: + case BCM6348_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.9/341-MIPS-BCM63XX-add-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.9/341-MIPS-BCM63XX-add-support-for-BCM6318.patch new file mode 100644 index 000000000..a4f9b3678 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/341-MIPS-BCM63XX-add-support-for-BCM6318.patch @@ -0,0 +1,697 @@ +From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 01:24:09 +0100 +Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318 + +--- + arch/mips/bcm63xx/Kconfig | 5 + + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/clk.c | 8 +- + arch/mips/bcm63xx/cpu.c | 53 +++++++++++ + arch/mips/bcm63xx/dev-flash.c | 3 + + arch/mips/bcm63xx/dev-spi.c | 2 +- + arch/mips/bcm63xx/irq.c | 10 ++ + arch/mips/bcm63xx/prom.c | 2 +- + arch/mips/bcm63xx/reset.c | 24 +++++ + arch/mips/bcm63xx/setup.c | 5 +- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 107 ++++++++++++++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 75 ++++++++++++++- + arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 + + 13 files changed, 291 insertions(+), 6 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -18,6 +18,11 @@ config BCM63XX_EHCI + select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD + select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD + ++config BCM63XX_CPU_6318 ++ bool "support 6318 CPU" ++ select SYS_HAS_CPU_BMIPS32_3300 ++ select HW_HAS_PCI ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -713,7 +713,7 @@ void __init board_prom_init(void) + /* read base address of boot chip select (0) + * 6328/6362 do not have MPI but boot from a fixed address + */ +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { + val = 0x18000000; + } else { + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -288,7 +288,9 @@ static void hsspi_set(struct clk *clk, i + { + u32 mask; + +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318()) ++ mask = CKCTL_6318_HSSPI_EN; ++ else if (BCMCPU_IS_6328()) + mask = CKCTL_6328_HSSPI_EN; + else if (BCMCPU_IS_6362()) + mask = CKCTL_6362_HSSPI_EN; +@@ -443,6 +445,19 @@ static struct clk_lookup bcm3368_clks[] + CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1), + }; + ++static struct clk_lookup bcm6318_clks[] = { ++ /* fixed rate clocks */ ++ CLKDEV_INIT(NULL, "periph", &clk_periph), ++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ /* gated clocks */ ++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), ++ CLKDEV_INIT(NULL, "usbh", &clk_usbh), ++ CLKDEV_INIT(NULL, "usbd", &clk_usbh), ++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi), ++ CLKDEV_INIT(NULL, "pcie", &clk_pcie), ++}; ++ + static struct clk_lookup bcm6328_clks[] = { + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), +@@ -564,6 +579,7 @@ static struct clk_lookup bcm63268_clks[] + CLKDEV_INIT(NULL, "pcie", &clk_pcie), + }; + ++#define HSSPI_PLL_HZ_6318 250000000 + #define HSSPI_PLL_HZ_6328 133333333 + #define HSSPI_PLL_HZ_6362 400000000 + +@@ -573,6 +589,10 @@ static int __init bcm63xx_clk_init(void) + case BCM3368_CPU_ID: + clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks)); + break; ++ case BCM6318_CPU_ID: ++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318; ++ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks)); ++ break; + case BCM6328_CPU_ID: + clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328; + clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks)); +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = { + __GEN_CPU_IRQ_TABLE(3368) + }; + ++static const unsigned long bcm6318_regs_base[] = { ++ __GEN_CPU_REGS_TABLE(6318) ++}; ++ ++static const int bcm6318_irqs[] = { ++ __GEN_CPU_IRQ_TABLE(6318) ++}; ++ + static const unsigned long bcm6328_regs_base[] = { + __GEN_CPU_REGS_TABLE(6328) + }; +@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi + return bcm63xx_memory_size; + } + ++#define STRAP_OVERRIDE_BUS_REG 0x0 ++#define OVERRIDE_BUS_MIPS_FREQ_SHIFT 23 ++#define OVERRIDE_BUS_MIPS_FREQ_MASK (0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT) ++ + static unsigned int detect_cpu_clock(void) + { + u32 cpu_id = bcm63xx_get_cpu_id(); +@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi + case BCM3368_CPU_ID: + return 300000000; + ++ case BCM6318_CPU_ID: ++ { ++ unsigned int tmp, mips_pll_fcvo; ++ ++ tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG); ++ ++ pr_info("strap_override_bus = %08x\n", tmp); ++ ++ mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK) ++ >> OVERRIDE_BUS_MIPS_FREQ_SHIFT; ++ ++ switch (mips_pll_fcvo) { ++ case 0: ++ return 166000000; ++ case 1: ++ return 400000000; ++ case 2: ++ return 250000000; ++ case 3: ++ return 333000000; ++ }; ++ } + case BCM6328_CPU_ID: + { + unsigned int tmp, mips_pll_fcvo; +@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v + unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; + u32 val; + ++ if (BCMCPU_IS_6318()) { ++ val = bcm_sdram_readl(SDRAM_CFG_REG); ++ val = val & SDRAM_CFG_6318_SPACE_MASK; ++ val >>= SDRAM_CFG_6318_SPACE_SHIFT; ++ return 1 << (val + 20); ++ } ++ + if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) + return bcm_ddr_readl(DDR_CSEND_REG) << 24; + +@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void) + + switch (current_cpu_type()) { + case CPU_BMIPS3300: ++ if ((read_c0_prid() & 0xff) >= 0x33) { ++ /* BCM6318 */ ++ chipid_reg = BCM_6368_PERF_BASE; ++ break; ++ } ++ + if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT) + __cpu_name[cpu] = "Broadcom BCM6338"; + /* fall-through */ +@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void) + bcm63xx_cpu_variant = bcm63xx_cpu_id; + + switch (bcm63xx_cpu_id) { ++ case BCM6318_CPU_ID: ++ bcm63xx_regs_base = bcm6318_regs_base; ++ bcm63xx_irqs = bcm6318_irqs; ++ break; + case BCM3368_CPU_ID: + bcm63xx_regs_base = bcm3368_regs_base; + bcm63xx_irqs = bcm3368_irqs; +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t + u32 val; + + switch (bcm63xx_get_cpu_id()) { ++ case BCM6318_CPU_ID: ++ /* only support serial flash */ ++ return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6328_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_6328_REG); + if (val & STRAPBUS_6328_BOOT_SEL_SERIAL) +--- a/arch/mips/bcm63xx/dev-spi.c ++++ b/arch/mips/bcm63xx/dev-spi.c +@@ -38,7 +38,7 @@ static struct platform_device bcm63xx_sp + + int __init bcm63xx_spi_register(void) + { +- if (BCMCPU_IS_6328() || BCMCPU_IS_6345()) ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345()) + return -ENODEV; + + spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -49,6 +49,19 @@ void __init arch_init_irq(void) + ext_irqs[3] = BCM_3368_EXT_IRQ3; + ext_shift = 4; + break; ++ case BCM6318_CPU_ID: ++ periph_bases[0] += PERF_IRQMASK_6318_REG; ++ periph_irq_count = 1; ++ periph_width = 4; ++ ++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318; ++ ext_irq_count = 4; ++ ext_irqs[0] = BCM_6318_EXT_IRQ0; ++ ext_irqs[1] = BCM_6318_EXT_IRQ0; ++ ext_irqs[2] = BCM_6318_EXT_IRQ0; ++ ext_irqs[3] = BCM_6318_EXT_IRQ0; ++ ext_shift = 4; ++ break; + case BCM6328_CPU_ID: + periph_bases[0] += PERF_IRQMASK_6328_REG(0); + periph_bases[1] += PERF_IRQMASK_6328_REG(1); +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -68,7 +68,7 @@ void __init prom_init(void) + + if (reg & OTP_6328_REG3_TP1_DISABLED) + bmips_smp_enabled = 0; +- } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) { ++ } else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) { + bmips_smp_enabled = 0; + } + +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -43,6 +43,23 @@ + #define BCM3368_RESET_PCIE 0 + #define BCM3368_RESET_PCIE_EXT 0 + ++ ++#define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK ++#define BCM6318_RESET_ENET 0 ++#define BCM6318_RESET_USBH SOFTRESET_6318_USBH_MASK ++#define BCM6318_RESET_USBD SOFTRESET_6318_USBS_MASK ++#define BCM6318_RESET_DSL 0 ++#define BCM6318_RESET_SAR SOFTRESET_6318_SAR_MASK ++#define BCM6318_RESET_EPHY SOFTRESET_6318_EPHY_MASK ++#define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK ++#define BCM6318_RESET_PCM 0 ++#define BCM6318_RESET_MPI 0 ++#define BCM6318_RESET_PCIE \ ++ (SOFTRESET_6318_PCIE_MASK | \ ++ SOFTRESET_6318_PCIE_CORE_MASK | \ ++ SOFTRESET_6318_PCIE_HARD_MASK) ++#define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK ++ + #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK + #define BCM6328_RESET_ENET 0 + #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK +@@ -147,6 +164,10 @@ static const u32 bcm3368_reset_bits[] = + __GEN_RESET_BITS_TABLE(3368) + }; + ++static const u32 bcm6318_reset_bits[] = { ++ __GEN_RESET_BITS_TABLE(6318) ++}; ++ + static const u32 bcm6328_reset_bits[] = { + __GEN_RESET_BITS_TABLE(6328) + }; +@@ -183,6 +204,9 @@ static int __init bcm63xx_reset_bits_ini + if (BCMCPU_IS_3368()) { + reset_reg = PERF_SOFTRESET_6358_REG; + bcm63xx_reset_bits = bcm3368_reset_bits; ++ } else if (BCMCPU_IS_6318()) { ++ reset_reg = PERF_SOFTRESET_6318_REG; ++ bcm63xx_reset_bits = bcm6318_reset_bits; + } else if (BCMCPU_IS_6328()) { + reset_reg = PERF_SOFTRESET_6328_REG; + bcm63xx_reset_bits = bcm6328_reset_bits; +--- a/arch/mips/bcm63xx/setup.c ++++ b/arch/mips/bcm63xx/setup.c +@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void) + case BCM3368_CPU_ID: + perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368; + break; ++ case BCM6318_CPU_ID: ++ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318; ++ break; + case BCM6328_CPU_ID: + perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328; + break; +@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void) + bcm6348_a1_reboot(); + + pr_info("triggering watchdog soft-reset...\n"); +- if (BCMCPU_IS_6328()) { ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) { + bcm_wdt_writel(1, WDT_SOFTRESET_REG); + } else { + reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -10,6 +10,7 @@ + * arm mach-types) + */ + #define BCM3368_CPU_ID 0x3368 ++#define BCM6318_CPU_ID 0x6318 + #define BCM6328_CPU_ID 0x6328 + #define BCM63281_CPU_ID 0x63281 + #define BCM63283_CPU_ID 0x63283 +@@ -38,6 +39,10 @@ static inline u32 __pure __bcm63xx_get_c + case BCM3368_CPU_ID: + #endif + ++#ifdef CONFIG_BCM63XX_CPU_6318 ++ case BCM6318_CPU_ID: ++#endif ++ + #ifdef CONFIG_BCM63XX_CPU_6328 + case BCM6328_CPU_ID: + #endif +@@ -87,6 +92,7 @@ static inline u32 __pure bcm63xx_get_cpu + } + + #define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID) ++#define BCMCPU_IS_6318() (bcm63xx_get_cpu_id() == BCM6318_CPU_ID) + #define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID) + #define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID) + #define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID) +@@ -98,6 +104,8 @@ static inline u32 __pure bcm63xx_get_cpu + + #define BCMCPU_VARIANT_IS_3368() \ + (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID) ++#define BCMCPU_VARIANT_IS_6318() \ ++ (bcm63xx_get_cpu_variant() == BCM6318_CPU_ID) + #define BCMCPU_VARIANT_IS_63281() \ + (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID) + #define BCMCPU_VARIANT_IS_63283() \ +@@ -252,6 +260,56 @@ enum bcm63xx_regs_set { + #define BCM_3368_MISC_BASE (0xdeadbeef) + + /* ++ * 6318 register sets base address ++ */ ++#define BCM_6318_DSL_LMEM_BASE (0xdeadbeef) ++#define BCM_6318_PERF_BASE (0xb0000000) ++#define BCM_6318_TIMER_BASE (0xb0000040) ++#define BCM_6318_WDT_BASE (0xb0000068) ++#define BCM_6318_UART0_BASE (0xb0000100) ++#define BCM_6318_UART1_BASE (0xdeadbeef) ++#define BCM_6318_GPIO_BASE (0xb0000080) ++#define BCM_6318_SPI_BASE (0xdeadbeef) ++#define BCM_6318_HSSPI_BASE (0xb0003000) ++#define BCM_6318_UDC0_BASE (0xdeadbeef) ++#define BCM_6318_USBDMA_BASE (0xb0006800) ++#define BCM_6318_OHCI0_BASE (0xb0005100) ++#define BCM_6318_OHCI_PRIV_BASE (0xdeadbeef) ++#define BCM_6318_USBH_PRIV_BASE (0xb0005200) ++#define BCM_6318_USBD_BASE (0xb0006000) ++#define BCM_6318_MPI_BASE (0xdeadbeef) ++#define BCM_6318_PCMCIA_BASE (0xdeadbeef) ++#define BCM_6318_PCIE_BASE (0xb0010000) ++#define BCM_6318_SDRAM_REGS_BASE (0xdeadbeef) ++#define BCM_6318_DSL_BASE (0xdeadbeef) ++#define BCM_6318_UBUS_BASE (0xdeadbeef) ++#define BCM_6318_ENET0_BASE (0xdeadbeef) ++#define BCM_6318_ENET1_BASE (0xdeadbeef) ++#define BCM_6318_ENETDMA_BASE (0xb0088000) ++#define BCM_6318_ENETDMAC_BASE (0xb0088200) ++#define BCM_6318_ENETDMAS_BASE (0xb0088400) ++#define BCM_6318_ENETSW_BASE (0xb0080000) ++#define BCM_6318_EHCI0_BASE (0xb0005000) ++#define BCM_6318_SDRAM_BASE (0xb0004000) ++#define BCM_6318_MEMC_BASE (0xdeadbeef) ++#define BCM_6318_DDR_BASE (0xdeadbeef) ++#define BCM_6318_M2M_BASE (0xdeadbeef) ++#define BCM_6318_ATM_BASE (0xdeadbeef) ++#define BCM_6318_XTM_BASE (0xdeadbeef) ++#define BCM_6318_XTMDMA_BASE (0xb000c000) ++#define BCM_6318_XTMDMAC_BASE (0xdeadbeef) ++#define BCM_6318_XTMDMAS_BASE (0xdeadbeef) ++#define BCM_6318_PCM_BASE (0xdeadbeef) ++#define BCM_6318_PCMDMA_BASE (0xdeadbeef) ++#define BCM_6318_PCMDMAC_BASE (0xdeadbeef) ++#define BCM_6318_PCMDMAS_BASE (0xdeadbeef) ++#define BCM_6318_RNG_BASE (0xdeadbeef) ++#define BCM_6318_MISC_BASE (0xb0000280) ++#define BCM_6318_OTP_BASE (0xdeadbeef) ++ ++#define BCM_6318_STRAP_BASE (0xb0000900) ++ ++/* + * 6328 register sets base address + */ + #define BCM_6328_DSL_LMEM_BASE (0xdeadbeef) +@@ -774,6 +832,55 @@ enum bcm63xx_irq { + #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27) + #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28) + ++/* ++ * 6318 irqs ++ */ ++#define BCM_6318_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32) ++#define BCM_6318_VERY_HIGH_IRQ_BASE (BCM_6318_HIGH_IRQ_BASE + 32) ++ ++#define BCM_6318_TIMER_IRQ (IRQ_INTERNAL_BASE + 31) ++#define BCM_6318_SPI_IRQ 0 ++#define BCM_6318_UART0_IRQ (IRQ_INTERNAL_BASE + 28) ++#define BCM_6318_UART1_IRQ 0 ++#define BCM_6318_DSL_IRQ (IRQ_INTERNAL_BASE + 21) ++#define BCM_6318_UDC0_IRQ 0 ++#define BCM_6318_ENET0_IRQ 0 ++#define BCM_6318_ENET1_IRQ 0 ++#define BCM_6318_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) ++#define BCM_6318_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29) ++#define BCM_6318_OHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 9) ++#define BCM_6318_EHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 10) ++#define BCM_6318_USBD_IRQ (IRQ_INTERNAL_BASE + 4) ++#define BCM_6318_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5) ++#define BCM_6318_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6) ++#define BCM_6318_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7) ++#define BCM_6318_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8) ++#define BCM_6318_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6318_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10) ++#define BCM_6318_PCMCIA_IRQ 0 ++#define BCM_6318_ENET0_RXDMA_IRQ 0 ++#define BCM_6318_ENET0_TXDMA_IRQ 0 ++#define BCM_6318_ENET1_RXDMA_IRQ 0 ++#define BCM_6318_ENET1_TXDMA_IRQ 0 ++#define BCM_6318_PCI_IRQ (IRQ_INTERNAL_BASE + 23) ++#define BCM_6318_ATM_IRQ 0 ++#define BCM_6318_ENETSW_RXDMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 0) ++#define BCM_6318_ENETSW_RXDMA1_IRQ (BCM_6318_HIGH_IRQ_BASE + 1) ++#define BCM_6318_ENETSW_RXDMA2_IRQ (BCM_6318_HIGH_IRQ_BASE + 2) ++#define BCM_6318_ENETSW_RXDMA3_IRQ (BCM_6318_HIGH_IRQ_BASE + 3) ++#define BCM_6318_ENETSW_TXDMA0_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 10) ++#define BCM_6318_ENETSW_TXDMA1_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 11) ++#define BCM_6318_ENETSW_TXDMA2_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 12) ++#define BCM_6318_ENETSW_TXDMA3_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 13) ++#define BCM_6318_XTM_IRQ (BCM_6318_HIGH_IRQ_BASE + 31) ++#define BCM_6318_XTM_DMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 11) ++ ++#define BCM_6318_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2) ++#define BCM_6318_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3) ++#define BCM_6318_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24) ++#define BCM_6318_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25) ++#define BCM_6318_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26) ++#define BCM_6318_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27) + + /* + * 6328 irqs +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -52,6 +52,39 @@ + CKCTL_3368_EMUSB_EN | \ + CKCTL_3368_USBU_EN) + ++#define CKCTL_6318_ADSL_ASB_EN (1 << 0) ++#define CKCTL_6318_USB_ASB_EN (1 << 1) ++#define CKCTL_6318_MIPS_ASB_EN (1 << 2) ++#define CKCTL_6318_PCIE_ASB_EN (1 << 3) ++#define CKCTL_6318_PHYMIPS_ASB_EN (1 << 4) ++#define CKCTL_6318_ROBOSW_ASB_EN (1 << 5) ++#define CKCTL_6318_SAR_ASB_EN (1 << 6) ++#define CKCTL_6318_SDR_ASB_EN (1 << 7) ++#define CKCTL_6318_SWREG_ASB_EN (1 << 8) ++#define CKCTL_6318_PERIPH_ASB_EN (1 << 9) ++#define CKCTL_6318_CPUBUS160_EN (1 << 10) ++#define CKCTL_6318_ADSL_EN (1 << 11) ++#define CKCTL_6318_SAR125_EN (1 << 12) ++#define CKCTL_6318_MIPS_EN (1 << 13) ++#define CKCTL_6318_PCIE_EN (1 << 14) ++#define CKCTL_6318_ROBOSW250_EN (1 << 16) ++#define CKCTL_6318_ROBOSW025_EN (1 << 17) ++#define CKCTL_6318_SDR_EN (1 << 19) ++#define CKCTL_6318_USB_EN (1 << 20) /* both device and host */ ++#define CKCTL_6318_HSSPI_EN (1 << 25) ++#define CKCTL_6318_PCIE25_EN (1 << 27) ++#define CKCTL_6318_PHYMIPS_EN (1 << 28) ++#define CKCTL_6318_ADSL_AFE_EN (1 << 29) ++#define CKCTL_6318_ADSL_QPROC_EN (1 << 30) ++ ++#define CKCTL_6318_ALL_SAFE_EN (CKCTL_6318_PHYMIPS_EN | \ ++ CKCTL_6318_ADSL_QPROC_EN | \ ++ CKCTL_6318_ADSL_AFE_EN | \ ++ CKCTL_6318_ADSL_EN | \ ++ CKCTL_6318_SAR_EN | \ ++ CKCTL_6318_USB_EN | \ ++ CKCTL_6318_PCIE_EN) ++ + #define CKCTL_6328_PHYMIPS_EN (1 << 0) + #define CKCTL_6328_ADSL_QPROC_EN (1 << 1) + #define CKCTL_6328_ADSL_AFE_EN (1 << 2) +@@ -259,12 +292,27 @@ + CKCTL_63268_TBUS_EN | \ + CKCTL_63268_ROBOSW250_EN) + ++/* UBUS Clock Control register */ ++#define PERF_UB_CKCTL_REG 0x10 ++ ++#define UB_CKCTL_6318_ADSL_EN (1 << 0) ++#define UB_CKCTL_6318_ARB_EN (1 << 1) ++#define UB_CKCTL_6318_MIPS_EN (1 << 2) ++#define UB_CKCTL_6318_PCIE_EN (1 << 3) ++#define UB_CKCTL_6318_PERIPH_EN (1 << 4) ++#define UB_CKCTL_6318_PHYMIPS_EN (1 << 5) ++#define UB_CKCTL_6318_ROBOSW_EN (1 << 6) ++#define UB_CKCTL_6318_SAR_EN (1 << 7) ++#define UB_CKCTL_6318_SDR_EN (1 << 8) ++#define UB_CKCTL_6318_USB_EN (1 << 9) ++ + /* System PLL Control register */ + #define PERF_SYS_PLL_CTL_REG 0x8 + #define SYS_PLL_SOFT_RESET 0x1 + + /* Interrupt Mask register */ + #define PERF_IRQMASK_3368_REG 0xc ++#define PERF_IRQMASK_6318_REG 0x20 + #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10) + #define PERF_IRQMASK_6338_REG 0xc + #define PERF_IRQMASK_6345_REG 0xc +@@ -276,6 +324,7 @@ + + /* Interrupt Status register */ + #define PERF_IRQSTAT_3368_REG 0x10 ++#define PERF_IRQSTAT_6318_REG 0x30 + #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10) + #define PERF_IRQSTAT_6338_REG 0x10 + #define PERF_IRQSTAT_6345_REG 0x10 +@@ -287,6 +336,7 @@ + + /* External Interrupt Configuration register */ + #define PERF_EXTIRQ_CFG_REG_3368 0x14 ++#define PERF_EXTIRQ_CFG_REG_6318 0x18 + #define PERF_EXTIRQ_CFG_REG_6328 0x18 + #define PERF_EXTIRQ_CFG_REG_6338 0x14 + #define PERF_EXTIRQ_CFG_REG_6345 0x14 +@@ -321,6 +371,7 @@ + + /* Soft Reset register */ + #define PERF_SOFTRESET_REG 0x28 ++#define PERF_SOFTRESET_6318_REG 0x10 + #define PERF_SOFTRESET_6328_REG 0x10 + #define PERF_SOFTRESET_6358_REG 0x34 + #define PERF_SOFTRESET_6362_REG 0x10 +@@ -334,6 +385,18 @@ + #define SOFTRESET_3368_USBS_MASK (1 << 11) + #define SOFTRESET_3368_PCM_MASK (1 << 13) + ++#define SOFTRESET_6318_SPI_MASK (1 << 0) ++#define SOFTRESET_6318_EPHY_MASK (1 << 1) ++#define SOFTRESET_6318_SAR_MASK (1 << 2) ++#define SOFTRESET_6318_ENETSW_MASK (1 << 3) ++#define SOFTRESET_6318_USBS_MASK (1 << 4) ++#define SOFTRESET_6318_USBH_MASK (1 << 5) ++#define SOFTRESET_6318_PCIE_CORE_MASK (1 << 6) ++#define SOFTRESET_6318_PCIE_MASK (1 << 7) ++#define SOFTRESET_6318_PCIE_EXT_MASK (1 << 8) ++#define SOFTRESET_6318_PCIE_HARD_MASK (1 << 9) ++#define SOFTRESET_6318_ADSL_MASK (1 << 10) ++ + #define SOFTRESET_6328_SPI_MASK (1 << 0) + #define SOFTRESET_6328_EPHY_MASK (1 << 1) + #define SOFTRESET_6328_SAR_MASK (1 << 2) +@@ -505,8 +568,17 @@ + #define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9) + #define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10) + ++#define TIMER_IRQMASK_6318_REG 0x0 ++#define TIMER_IRQSTAT_6318_REG 0x4 ++#define IRQSTATMASK_TIMER0 (1 << 0) ++#define IRQSTATMASK_TIMER1 (1 << 1) ++#define IRQSTATMASK_TIMER2 (1 << 2) ++#define IRQSTATMASK_TIMER3 (1 << 3) ++#define IRQSTATMASK_WDT (1 << 4) ++ + /* Timer control register */ + #define TIMER_CTLx_REG(x) (0x4 + (x * 4)) ++#define TIMER_CTRx_6318_REG(x) (0x8 + (x * 4)) + #define TIMER_CTL0_REG 0x4 + #define TIMER_CTL1_REG 0x8 + #define TIMER_CTL2_REG 0xC +@@ -1253,6 +1325,8 @@ + #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT) + #define SDRAM_CFG_BANK_SHIFT 13 + #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT) ++#define SDRAM_CFG_6318_SPACE_SHIFT 4 ++#define SDRAM_CFG_6318_SPACE_MASK (0xf << SDRAM_CFG_6318_SPACE_SHIFT) + + #define SDRAM_MBASE_REG 0xc + +--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h ++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h +@@ -22,6 +22,7 @@ static inline int is_bcm63xx_internal_re + if (offset >= 0xfff00000) + return 1; + break; ++ case BCM6318_CPU_ID: + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: + case BCM6368_CPU_ID: +--- a/arch/mips/bcm63xx/dev-hsspi.c ++++ b/arch/mips/bcm63xx/dev-hsspi.c +@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs + + int __init bcm63xx_hsspi_register(void) + { +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() && ++ !BCMCPU_IS_63268()) + return -ENODEV; + + spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); +--- a/arch/mips/bcm63xx/dev-usb-usbd.c ++++ b/arch/mips/bcm63xx/dev-usb-usbd.c +@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s + IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 }; + int i; + +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368()) + return 0; + + usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD); +--- a/arch/mips/bcm63xx/dev-enet.c ++++ b/arch/mips/bcm63xx/dev-enet.c +@@ -176,8 +176,8 @@ static int __init register_shared(void) + else + shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() || +- BCMCPU_IS_63268()) ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || ++ BCMCPU_IS_6368() || BCMCPU_IS_63268()) + chan_count = 32; + else if (BCMCPU_IS_6345()) + chan_count = 8; +@@ -285,8 +285,8 @@ bcm63xx_enetsw_register(const struct bcm + { + int ret; + +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && +- !BCMCPU_IS_63268()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() && ++ !BCMCPU_IS_6368() && !BCMCPU_IS_63268()) + return -ENODEV; + + ret = register_shared(); +@@ -303,7 +303,7 @@ bcm63xx_enetsw_register(const struct bcm + + memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd)); + +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) + enetsw_pd.num_ports = ENETSW_PORTS_6328; + else if (BCMCPU_IS_6362() || BCMCPU_IS_6368()) + enetsw_pd.num_ports = ENETSW_PORTS_6368; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +@@ -9,6 +9,8 @@ int __init bcm63xx_gpio_init(void); + static inline unsigned long bcm63xx_gpio_count(void) + { + switch (bcm63xx_get_cpu_id()) { ++ case BCM6318_CPU_ID: ++ return 50; + case BCM6328_CPU_ID: + return 32; + case BCM3368_CPU_ID: +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh + + int __init bcm63xx_ehci_register(void) + { +- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() && ++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) + return 0; + + ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); diff --git a/target/linux/brcm63xx/patches-4.9/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch b/target/linux/brcm63xx/patches-4.9/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch new file mode 100644 index 000000000..71044f846 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/342-MIPS-BCM63XX-split-PCIe-reset-signals.patch @@ -0,0 +1,156 @@ +From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 8 Dec 2013 14:17:50 +0100 +Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals + +--- + arch/mips/bcm63xx/reset.c | 39 ++++++++++++++-------- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++ + arch/mips/pci/pci-bcm63xx.c | 7 ++++ + 3 files changed, 34 insertions(+), 14 deletions(-) + +--- a/arch/mips/bcm63xx/reset.c ++++ b/arch/mips/bcm63xx/reset.c +@@ -28,7 +28,9 @@ + [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \ + [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \ + [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \ +- [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, ++ [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \ ++ [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \ ++ [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD, + + #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK + #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK +@@ -42,6 +44,8 @@ + #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK + #define BCM3368_RESET_PCIE 0 + #define BCM3368_RESET_PCIE_EXT 0 ++#define BCM3368_RESET_PCIE_CORE 0 ++#define BCM3368_RESET_PCIE_HARD 0 + + + #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK +@@ -54,11 +58,10 @@ + #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK + #define BCM6318_RESET_PCM 0 + #define BCM6318_RESET_MPI 0 +-#define BCM6318_RESET_PCIE \ +- (SOFTRESET_6318_PCIE_MASK | \ +- SOFTRESET_6318_PCIE_CORE_MASK | \ +- SOFTRESET_6318_PCIE_HARD_MASK) ++#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK + #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK ++#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK ++#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK + + #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK + #define BCM6328_RESET_ENET 0 +@@ -70,11 +73,10 @@ + #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK + #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK + #define BCM6328_RESET_MPI 0 +-#define BCM6328_RESET_PCIE \ +- (SOFTRESET_6328_PCIE_MASK | \ +- SOFTRESET_6328_PCIE_CORE_MASK | \ +- SOFTRESET_6328_PCIE_HARD_MASK) ++#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK + #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK ++#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK ++#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK + + #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK + #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK +@@ -88,6 +90,8 @@ + #define BCM6338_RESET_MPI 0 + #define BCM6338_RESET_PCIE 0 + #define BCM6338_RESET_PCIE_EXT 0 ++#define BCM6338_RESET_PCIE_CORE 0 ++#define BCM6338_RESET_PCIE_HARD 0 + + #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK + #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK +@@ -101,6 +105,8 @@ + #define BCM6348_RESET_MPI 0 + #define BCM6348_RESET_PCIE 0 + #define BCM6348_RESET_PCIE_EXT 0 ++#define BCM6348_RESET_PCIE_CORE 0 ++#define BCM6348_RESET_PCIE_HARD 0 + + #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK + #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK +@@ -114,6 +120,8 @@ + #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK + #define BCM6358_RESET_PCIE 0 + #define BCM6358_RESET_PCIE_EXT 0 ++#define BCM6358_RESET_PCIE_CORE 0 ++#define BCM6358_RESET_PCIE_HARD 0 + + #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK + #define BCM6362_RESET_ENET 0 +@@ -125,9 +133,10 @@ + #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK + #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK + #define BCM6362_RESET_MPI 0 +-#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \ +- SOFTRESET_6362_PCIE_CORE_MASK) ++#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK + #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK ++#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK ++#define BCM6362_RESET_PCIE_HARD 0 + + #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK + #define BCM6368_RESET_ENET 0 +@@ -141,6 +150,8 @@ + #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK + #define BCM6368_RESET_PCIE 0 + #define BCM6368_RESET_PCIE_EXT 0 ++#define BCM6368_RESET_PCIE_CORE 0 ++#define BCM6368_RESET_PCIE_HARD 0 + + #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK + #define BCM63268_RESET_ENET 0 +@@ -152,10 +163,10 @@ + #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK + #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK + #define BCM63268_RESET_MPI 0 +-#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \ +- SOFTRESET_63268_PCIE_CORE_MASK | \ +- SOFTRESET_63268_PCIE_HARD_MASK) ++#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK + #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK ++#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK ++#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK + + /* + * core reset bits +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h +@@ -14,6 +14,8 @@ enum bcm63xx_core_reset { + BCM63XX_RESET_MPI, + BCM63XX_RESET_PCIE, + BCM63XX_RESET_PCIE_EXT, ++ BCM63XX_RESET_PCIE_CORE, ++ BCM63XX_RESET_PCIE_HARD, + }; + + void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset); +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo + + /* reset the PCIe core */ + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1); + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1); ++ if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) { ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0); ++ } + mdelay(10); + ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0); + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0); + mdelay(10); + diff --git a/target/linux/brcm63xx/patches-4.9/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.9/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch new file mode 100644 index 000000000..cc2937c57 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/343-MIPS-BCM63XX-add-PCIe-support-for-BCM6318.patch @@ -0,0 +1,333 @@ +From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 15 Dec 2013 20:47:34 +0100 +Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318 + +--- + arch/mips/bcm63xx/clk.c | 25 ++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 6 ++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 60 +++++++++++- + arch/mips/pci/ops-bcm63xx.c | 16 +++- + arch/mips/pci/pci-bcm63xx.c | 106 ++++++++++++++++++---- + 5 files changed, 184 insertions(+), 29 deletions(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -51,6 +51,18 @@ static void bcm_hwclock_set(u32 mask, in + bcm_perf_writel(reg, PERF_CKCTL_REG); + } + ++static void bcm_ub_hwclock_set(u32 mask, int enable) ++{ ++ u32 reg; ++ ++ reg = bcm_perf_readl(PERF_UB_CKCTL_REG); ++ if (enable) ++ reg |= mask; ++ else ++ reg &= ~mask; ++ bcm_perf_writel(reg, PERF_UB_CKCTL_REG); ++} ++ + /* + * Ethernet MAC "misc" clock: dma clocks and main clock on 6348 + */ +@@ -361,12 +373,17 @@ static struct clk clk_ipsec = { + + static void pcie_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318()) { ++ bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable); ++ bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable); ++ bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable); ++ } else if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable); +- else if (BCMCPU_IS_6362()) ++ } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable); +- else if (BCMCPU_IS_63268()) ++ } else if (BCMCPU_IS_63268()) { + bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable); ++ } + } + + static struct clk clk_pcie = { +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +@@ -40,6 +40,12 @@ + #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \ + BCM_CB_MEM_SIZE - 1) + ++#define BCM_PCIE_MEM_BASE_PA_6318 0x10200000 ++#define BCM_PCIE_MEM_SIZE_6318 (1 * 1024 * 1024) ++#define BCM_PCIE_MEM_END_PA_6318 (BCM_PCIE_MEM_BASE_PA_6318 + \ ++ BCM_PCIE_MEM_SIZE_6318 - 1) ++ ++ + #define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000 + #define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024) + #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -1529,6 +1529,17 @@ + * _REG relative to RSET_PCIE + *************************************************************************/ + ++#define PCIE_SPECIFIC_REG 0x188 ++#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT 0 ++#define SPECIFIC_ENDIAN_MODE_BAR1_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT) ++#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT 2 ++#define SPECIFIC_ENDIAN_MODE_BAR2_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT) ++#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT 4 ++#define SPECIFIC_ENDIAN_MODE_BAR3_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT) ++#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN 0 ++#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1 ++#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN 2 ++ + #define PCIE_CONFIG2_REG 0x408 + #define CONFIG2_BAR1_SIZE_EN 1 + #define CONFIG2_BAR1_SIZE_MASK 0xf +@@ -1574,7 +1585,54 @@ + #define PCIE_RC_INT_C (1 << 2) + #define PCIE_RC_INT_D (1 << 3) + +-#define PCIE_DEVICE_OFFSET 0x8000 ++#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG 0x400c ++#define C2P_MEM_WIN_ENDIAN_MODE_MASK 0x3 ++#define C2P_MEM_WIN_ENDIAN_NO_SWAP 0 ++#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1 ++#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2 ++#define C2P_MEM_WIN_BASE_ADDR_SHIFT 20 ++#define C2P_MEM_WIN_BASE_ADDR_MASK (0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT) ++ ++#define PCIE_RC_BAR1_CONFIG_LO_REG 0x402c ++#define RC_BAR_CFG_LO_SIZE_256MB 0xd ++#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT 20 ++#define RC_BAR_CFG_LO_MATCH_ADDR_MASK (0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT) ++ ++#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070 ++#define C2P_BASELIMIT_LIMIT_SHIFT 20 ++#define C2P_BASELIMIT_LIMIT_MASK (0xfff << C2P_BASELIMIT_LIMIT_SHIFT) ++#define C2P_BASELIMIT_BASE_SHIFT 4 ++#define C2P_BASELIMIT_BASE_MASK (0xfff << C2P_BASELIMIT_BASE_SHIFT) ++ ++#define PCIE_UBUS_BAR1_CFG_REMAP_REG 0x4088 ++#define BAR1_CFG_REMAP_OFFSET_SHIFT 20 ++#define BAR1_CFG_REMAP_OFFSET_MASK (0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT) ++#define BAR1_CFG_REMAP_ACCESS_EN 1 ++ ++#define PCIE_HARD_DEBUG_REG 0x4204 ++#define HARD_DEBUG_SERDES_IDDQ (1 << 23) ++ ++#define PCIE_CPU_INT1_MASK_CLEAR_REG 0x830c ++#define CPU_INT_PCIE_ERR_ATTN_CPU (1 << 0) ++#define CPU_INT_PCIE_INTA (1 << 1) ++#define CPU_INT_PCIE_INTB (1 << 2) ++#define CPU_INT_PCIE_INTC (1 << 3) ++#define CPU_INT_PCIE_INTD (1 << 4) ++#define CPU_INT_PCIE_INTR (1 << 5) ++#define CPU_INT_PCIE_NMI (1 << 6) ++#define CPU_INT_PCIE_UBUS (1 << 7) ++#define CPU_INT_IPI (1 << 8) ++ ++#define PCIE_EXT_CFG_INDEX_REG 0x8400 ++#define EXT_CFG_FUNC_NUM_SHIFT 12 ++#define EXT_CFG_FUNC_NUM_MASK (0x7 << EXT_CFG_FUNC_NUM_SHIFT) ++#define EXT_CFG_DEV_NUM_SHIFT 15 ++#define EXT_CFG_DEV_NUM_MASK (0xf << EXT_CFG_DEV_NUM_SHIFT) ++#define EXT_CFG_BUS_NUM_SHIFT 20 ++#define EXT_CFG_BUS_NUM_MASK (0xff << EXT_CFG_BUS_NUM_SHIFT) ++ ++#define PCIE_DEVICE_OFFSET_6318 0x9000 ++#define PCIE_DEVICE_OFFSET_6328 0x8000 + + /************************************************************************* + * _REG relative to RSET_OTP +--- a/arch/mips/pci/ops-bcm63xx.c ++++ b/arch/mips/pci/ops-bcm63xx.c +@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_ + if (!bcm63xx_pcie_can_access(bus, devfn)) + return PCIBIOS_DEVICE_NOT_FOUND; + +- if (bus->number == PCIE_BUS_DEVICE) +- reg += PCIE_DEVICE_OFFSET; ++ if (bus->number == PCIE_BUS_DEVICE) { ++ if (BCMCPU_IS_6318()) ++ reg += PCIE_DEVICE_OFFSET_6318; ++ else ++ reg += PCIE_DEVICE_OFFSET_6328; ++ } + + data = bcm_pcie_readl(reg); + +@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci + if (!bcm63xx_pcie_can_access(bus, devfn)) + return PCIBIOS_DEVICE_NOT_FOUND; + +- if (bus->number == PCIE_BUS_DEVICE) +- reg += PCIE_DEVICE_OFFSET; ++ if (bus->number == PCIE_BUS_DEVICE) { ++ if (BCMCPU_IS_6318()) ++ reg += PCIE_DEVICE_OFFSET_6318; ++ else ++ reg += PCIE_DEVICE_OFFSET_6328; ++ } + + + data = bcm_pcie_readl(reg); +--- a/arch/mips/pci/pci-bcm63xx.c ++++ b/arch/mips/pci/pci-bcm63xx.c +@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v + + void __iomem *pci_iospace_start; + +-static void __init bcm63xx_reset_pcie(void) ++static void __init bcm63xx_reset_pcie_gen1(void) + { + u32 val; + u32 reg; +@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo + mdelay(200); + } + +-static struct clk *pcie_clk; +- +-static int __init bcm63xx_register_pcie(void) ++static void __init bcm63xx_reset_pcie_gen2(void) + { + u32 val; + +- /* enable clock */ +- pcie_clk = clk_get(NULL, "pcie"); +- if (IS_ERR_OR_NULL(pcie_clk)) +- return -ENODEV; ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0); + +- clk_prepare_enable(pcie_clk); ++ /* reset the PCIe core */ ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0); ++ mdelay(10); ++ val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG); ++ val &= ~HARD_DEBUG_SERDES_IDDQ; ++ bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG); ++ mdelay(10); ++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0); ++ mdelay(200); ++} + +- bcm63xx_reset_pcie(); ++static void __init bcm63xx_init_pcie_gen1(void) ++{ ++ u32 val; + + /* configure the PCIe bridge */ + val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG); +@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie( + val |= OPT2_CFG_TYPE1_BD_SEL; + bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG); + ++ /* set bar0 to little endian */ ++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT; ++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT; ++ val |= BASEMASK_REMAP_EN; ++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG); ++ ++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT; ++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG); ++} ++ ++static void __init bcm63xx_init_pcie_gen2(void) ++{ ++ u32 val; ++ ++ bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB | ++ CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD, ++ PCIE_CPU_INT1_MASK_CLEAR_REG); ++ ++ val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK; ++ val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) << ++ C2P_BASELIMIT_BASE_SHIFT; ++ ++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG); ++ ++ /* set bar0 to little endian */ ++ val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG); ++ val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK; ++ val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP; ++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG); ++ ++ bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG); ++ bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG); ++ bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG); ++ ++ bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT, ++ PCIE_EXT_CFG_INDEX_REG); ++} ++ ++static struct clk *pcie_clk; ++ ++static int __init bcm63xx_register_pcie(void) ++{ ++ u32 val; ++ ++ /* enable clock */ ++ pcie_clk = clk_get(NULL, "pcie"); ++ if (IS_ERR_OR_NULL(pcie_clk)) ++ return -ENODEV; ++ ++ clk_prepare_enable(pcie_clk); ++ ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) { ++ bcm63xx_reset_pcie_gen1(); ++ bcm63xx_init_pcie_gen1(); ++ } else { ++ bcm63xx_reset_pcie_gen2(); ++ bcm63xx_init_pcie_gen2(); ++ } ++ + /* setup class code as bridge */ + val = bcm_pcie_readl(PCIE_IDVAL3_REG); + val &= ~IDVAL3_CLASS_CODE_MASK; +@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie( + val &= ~CONFIG2_BAR1_SIZE_MASK; + bcm_pcie_writel(val, PCIE_CONFIG2_REG); + +- /* set bar0 to little endian */ +- val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT; +- val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT; +- val |= BASEMASK_REMAP_EN; +- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG); +- +- val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT; +- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG); +- + register_pci_controller(&bcm63xx_pcie_controller); + + return 0; +@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void) + if (!bcm63xx_pci_enabled) + return -ENODEV; + +- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { ++ if (BCMCPU_IS_6318()) { ++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318; ++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318; ++ } if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { + bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328; + bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328; + } else if (BCMCPU_IS_63268()) { +@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void) + } + + switch (bcm63xx_get_cpu_id()) { ++ case BCM6318_CPU_ID: + case BCM6328_CPU_ID: + case BCM6362_CPU_ID: + case BCM63268_CPU_ID: diff --git a/target/linux/brcm63xx/patches-4.9/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch b/target/linux/brcm63xx/patches-4.9/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch new file mode 100644 index 000000000..f5b0e7766 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/344-MIPS-BCM63XX-detect-flash-type-early-and-store-the-r.patch @@ -0,0 +1,74 @@ +From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 22 Dec 2013 12:26:57 +0100 +Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the + result + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 10 +++++++--- + arch/mips/bcm63xx/prom.c | 4 ++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++ + 3 files changed, 13 insertions(+), 3 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -22,6 +22,8 @@ + #include + #include + ++static int flash_type; ++ + static struct mtd_partition mtd_partitions[] = { + { + .name = "cfe", +@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t + } + } + ++void __init bcm63xx_flash_detect(void) ++{ ++ flash_type = bcm63xx_detect_flash_type(); ++} ++ + int __init bcm63xx_flash_register(void) + { +- int flash_type; + u32 val; + +- flash_type = bcm63xx_detect_flash_type(); +- + switch (flash_type) { + case BCM63XX_FLASH_TYPE_PARALLEL: + /* read base address of boot chip select (0) */ +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + + void __init prom_init(void) + { +@@ -52,6 +53,9 @@ void __init prom_init(void) + reg &= ~mask; + bcm_perf_writel(reg, PERF_CKCTL_REG); + ++ /* detect and setup flash access */ ++ bcm63xx_flash_detect(); ++ + /* do low level board init */ + board_prom_init(); + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h +@@ -7,6 +7,8 @@ enum { + BCM63XX_FLASH_TYPE_NAND, + }; + ++void bcm63xx_flash_detect(void); ++ + int __init bcm63xx_flash_register(void); + + #endif /* __BCM63XX_FLASH_H */ diff --git a/target/linux/brcm63xx/patches-4.9/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch b/target/linux/brcm63xx/patches-4.9/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch new file mode 100644 index 000000000..329a156fe --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/345-MIPS-BCM63XX-fixup-mapped-SPI-flash-access-on-boot.patch @@ -0,0 +1,84 @@ +From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 22 Dec 2013 13:25:25 +0100 +Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot + +Some bootloaders leave the flash access in an invalid state with dual +read enabled; fix it by disabling it and falling back to simple fast +reads. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 51 insertions(+) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t + } + } + ++#define HSSPI_FLASH_CTRL_REG 0x14 ++#define FLASH_CTRL_READ_OPCODE_MASK 0xff ++#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8) ++#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8) ++#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8) ++#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8) ++#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10 ++#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT) ++#define FLASH_CTRL_MB_EN (1 << 23) ++ + void __init bcm63xx_flash_detect(void) + { + flash_type = bcm63xx_detect_flash_type(); ++ ++ /* ensure flash mapping has sane values */ ++ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL && ++ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || ++ BCMCPU_IS_63268())) { ++ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG); ++ ++ if (val & FLASH_CTRL_MB_EN) { ++ /* cfe might configure non working dual-io mode */ ++ val &= ~FLASH_CTRL_MB_EN; ++ val &= ~FLASH_CTRL_READ_OPCODE_MASK; ++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK; ++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT; ++ ++ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) { ++ case FLASH_CTRL_ADDR_BYTES_3: ++ val |= SPINOR_OP_READ_FAST; ++ break; ++ case FLASH_CTRL_ADDR_BYTES_4: ++ val |= SPINOR_OP_READ_FAST_4B; ++ break; ++ case FLASH_CTRL_ADDR_BYTES_2: ++ default: ++ pr_warn("unsupported address byte mode (%x), not fixing up\n", ++ val & FLASH_CTRL_ADDR_BYTES_MASK); ++ return; ++ } ++ } else { ++ /* ensure dummy bytes is set to 1 for _FAST reads */ ++ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK; ++ ++ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ_FAST_4B) ++ return; ++ ++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK; ++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT; ++ } ++ ++ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG); ++ } + } + + int __init bcm63xx_flash_register(void) diff --git a/target/linux/brcm63xx/patches-4.9/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch b/target/linux/brcm63xx/patches-4.9/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch new file mode 100644 index 000000000..8e4efeb8d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/346-MIPS-BCM63XX-USB-ENETSW-6318-clocks.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -167,7 +167,11 @@ static struct clk clk_swpkt_usb = { + */ + static void enetsw_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) { ++ if (BCMCPU_IS_6318()) { ++ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN | ++ CKCTL_6318_ROBOSW025_EN, enable); ++ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable); ++ } else if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable); + } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable); +@@ -219,18 +223,22 @@ static struct clk clk_pcm = { + */ + static void usbh_set(struct clk *clk, int enable) + { +- if (BCMCPU_IS_6328()) ++ if (BCMCPU_IS_6318()) { ++ bcm_hwclock_set(CKCTL_6318_USB_EN, enable); ++ bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable); ++ } else if (BCMCPU_IS_6328()) { + bcm_hwclock_set(CKCTL_6328_USBH_EN, enable); +- else if (BCMCPU_IS_6348()) ++ } else if (BCMCPU_IS_6348()) { + bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); +- else if (BCMCPU_IS_6362()) ++ } else if (BCMCPU_IS_6362()) { + bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); +- else if (BCMCPU_IS_6368()) ++ } else if (BCMCPU_IS_6368()) { + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); +- else if (BCMCPU_IS_63268()) ++ } else if (BCMCPU_IS_63268()) { + bcm_hwclock_set(CKCTL_63268_USBH_EN, enable); +- else ++ } else { + return; ++ } + + if (enable) + msleep(100); diff --git a/target/linux/brcm63xx/patches-4.9/347-MIPS-BCM6318-USB-support.patch b/target/linux/brcm63xx/patches-4.9/347-MIPS-BCM6318-USB-support.patch new file mode 100644 index 000000000..db489f8b6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/347-MIPS-BCM6318-USB-support.patch @@ -0,0 +1,124 @@ +--- a/arch/mips/bcm63xx/usb-common.c ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_6318()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); ++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG); + } + + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); +@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_6318()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); ++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); ++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG); + } + + spin_unlock_irqrestore(&usb_priv_reg_lock, flags); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -681,6 +681,12 @@ + #define GPIO_MODE_6368_SPI_SSN4 (1 << 30) + #define GPIO_MODE_6368_SPI_SSN5 (1 << 31) + ++#define GPIO_PINMUX_SEL0_6318 0x1c ++#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26 ++#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) ++#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) ++#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) ++#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT) + + #define GPIO_PINMUX_OTHR_REG 0x24 + #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12 +@@ -999,6 +1005,7 @@ + + #define USBH_PRIV_SWAP_6358_REG 0x0 + #define USBH_PRIV_SWAP_6368_REG 0x1c ++#define USBH_PRIV_SWAP_6318_REG 0x0c + + #define USBH_PRIV_SWAP_USBD_SHIFT 6 + #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT) +@@ -1024,6 +1031,13 @@ + #define USBH_PRIV_SETUP_IOC_SHIFT 4 + #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT) + ++#define USBH_PRIV_SETUP_6318_REG 0x00 ++#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04 ++#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27) ++#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31) ++#define USBH_PRIV_SIM_CTRL_6318_REG 0x20 ++#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5) ++ + + /************************************************************************* + * _REG relative to RSET_USBD +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -126,6 +126,15 @@ void __init board_early_setup(const stru + } + + bcm_gpio_writel(val, GPIO_MODE_REG); ++ ++#if IS_ENABLED(CONFIG_USB) ++ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) { ++ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318); ++ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK; ++ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON; ++ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318); ++ } ++#endif + } + + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -22,6 +22,8 @@ config BCM63XX_CPU_6318 + bool "support 6318 CPU" + select SYS_HAS_CPU_BMIPS32_3300 + select HW_HAS_PCI ++ select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6328 + bool "support 6328 CPU" diff --git a/target/linux/brcm63xx/patches-4.9/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch b/target/linux/brcm63xx/patches-4.9/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch new file mode 100644 index 000000000..0b8a5a170 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -586,6 +586,9 @@ + #define TIMER_CTL_MONOTONIC_MASK (1 << 30) + #define TIMER_CTL_ENABLE_MASK (1 << 31) + ++/* Clock reset control (63268 only) */ ++#define TIMER_CLK_RST_CTL_REG 0x2c ++#define CLK_RST_CTL_USB_REF_CLK_EN (1 << 18) + + /************************************************************************* + * _REG relative to RSET_WDT +@@ -1533,6 +1536,11 @@ + #define STRAPBUS_63268_FCVO_SHIFT 21 + #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT) + ++#define MISC_IDDQ_CTRL_6328_REG 0x48 ++#define MISC_IDDQ_CTRL_63268_REG 0x4c ++ ++#define IDDQ_CTRL_63268_USBH (1 << 4) ++ + #define MISC_STRAPBUS_6328_REG 0x240 + #define STRAPBUS_6328_FCVO_SHIFT 7 + #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -63,6 +63,26 @@ static void bcm_ub_hwclock_set(u32 mask, + bcm_perf_writel(reg, PERF_UB_CKCTL_REG); + } + ++static void bcm_misc_iddq_set(u32 mask, int enable) ++{ ++ u32 offset; ++ u32 reg; ++ ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) ++ offset = MISC_IDDQ_CTRL_6328_REG; ++ else if (BCMCPU_IS_63268()) ++ offset = MISC_IDDQ_CTRL_63268_REG; ++ else ++ return; ++ ++ reg = bcm_misc_readl(offset); ++ if (enable) ++ reg &= ~mask; ++ else ++ reg |= mask; ++ bcm_misc_writel(reg, offset); ++} ++ + /* + * Ethernet MAC "misc" clock: dma clocks and main clock on 6348 + */ +@@ -235,7 +255,17 @@ static void usbh_set(struct clk *clk, in + } else if (BCMCPU_IS_6368()) { + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); + } else if (BCMCPU_IS_63268()) { ++ u32 reg; ++ + bcm_hwclock_set(CKCTL_63268_USBH_EN, enable); ++ bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable); ++ bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable); ++ reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG); ++ if (enable) ++ reg |= CLK_RST_CTL_USB_REF_CLK_EN; ++ else ++ reg &= ~CLK_RST_CTL_USB_REF_CLK_EN; ++ bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG); + } else { + return; + } diff --git a/target/linux/brcm63xx/patches-4.9/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch b/target/linux/brcm63xx/patches-4.9/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch new file mode 100644 index 000000000..0b709915a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/349-MIPS-BCM63XX-add-BCM63268-USB-support.patch @@ -0,0 +1,117 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -1033,11 +1033,18 @@ + #define USBH_PRIV_SETUP_6368_REG 0x28 + #define USBH_PRIV_SETUP_IOC_SHIFT 4 + #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT) ++#define USBH_PRIV_SETUP_IPP_SHIFT 5 ++#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT) + + #define USBH_PRIV_SETUP_6318_REG 0x00 ++#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18 + #define USBH_PRIV_PLL_CTRL1_6318_REG 0x04 +-#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27) +-#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31) ++ ++#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27) ++#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31) ++#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9) ++#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10) ++ + #define USBH_PRIV_SIM_CTRL_6318_REG 0x20 + #define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -72,6 +72,8 @@ config BCM63XX_CPU_63268 + bool "support 63268 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI ++ select BCM63XX_EHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh + int __init bcm63xx_ehci_register(void) + { + if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() && +- !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268()) + return 0; + + ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); +--- a/arch/mips/bcm63xx/usb-common.c ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_63268()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ reg &= ~USBH_PRIV_SETUP_IPP_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG); ++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN | ++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY); ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG); + } else if (BCMCPU_IS_6318()) { + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); +@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void) + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); +@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void) + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); + reg |= USBH_PRIV_SETUP_IOC_MASK; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } else if (BCMCPU_IS_63268()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ reg &= ~USBH_PRIV_SETUP_IPP_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG); ++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN | ++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY); ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG); + } else if (BCMCPU_IS_6318()) { + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN; ++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG); +@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void) + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG); +- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN; ++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN; + bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG); + + reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG); diff --git a/target/linux/brcm63xx/patches-4.9/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch b/target/linux/brcm63xx/patches-4.9/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch new file mode 100644 index 000000000..974c67f73 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/350-MIPS-BCM63XX-support-settings-num-usbh-ports.patch @@ -0,0 +1,108 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -41,6 +41,7 @@ struct board_info { + + /* USB config */ + struct bcm63xx_usbd_platform_data usbd; ++ unsigned int num_usbh_ports:2; + + /* DSP config */ + struct bcm63xx_dsp_platform_data dsp; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h +@@ -1,6 +1,6 @@ + #ifndef BCM63XX_DEV_USB_EHCI_H_ + #define BCM63XX_DEV_USB_EHCI_H_ + +-int bcm63xx_ehci_register(void); ++int bcm63xx_ehci_register(unsigned int num_ports); + + #endif /* BCM63XX_DEV_USB_EHCI_H_ */ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h +@@ -1,6 +1,6 @@ + #ifndef BCM63XX_DEV_USB_OHCI_H_ + #define BCM63XX_DEV_USB_OHCI_H_ + +-int bcm63xx_ohci_register(void); ++int bcm63xx_ohci_register(unsigned int num_ports); + + #endif /* BCM63XX_DEV_USB_OHCI_H_ */ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -166,6 +166,8 @@ static struct platform_device bcm63xx_gp + */ + int __init board_register_devices(void) + { ++ int usbh_ports = 0; ++ + if (board.has_uart0) + bcm63xx_uart_register(0); + +@@ -187,14 +189,21 @@ int __init board_register_devices(void) + !board_get_mac_address(board.enetsw.mac_addr)) + bcm63xx_enetsw_register(&board.enetsw); + ++ if ((board.has_ohci0 || board.has_ehci0)) { ++ usbh_ports = board.num_usbh_ports; ++ ++ if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd)) ++ usbh_ports = 1; ++ } ++ + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + + if (board.has_ehci0) +- bcm63xx_ehci_register(); ++ bcm63xx_ehci_register(usbh_ports); + + if (board.has_ohci0) +- bcm63xx_ohci_register(); ++ bcm63xx_ohci_register(usbh_ports); + + if (board.has_dsp) + bcm63xx_dsp_register(&board.dsp); +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh + }, + }; + +-int __init bcm63xx_ehci_register(void) ++int __init bcm63xx_ehci_register(unsigned int num_ports) + { + if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() && + !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268()) + return 0; + ++ bcm63xx_ehci_pdata.num_ports = num_ports; ++ + ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); + ehci_resources[0].end = ehci_resources[0].start; + ehci_resources[0].end += RSET_EHCI_SIZE - 1; +--- a/arch/mips/bcm63xx/dev-usb-ohci.c ++++ b/arch/mips/bcm63xx/dev-usb-ohci.c +@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc + .big_endian_desc = 1, + .big_endian_mmio = 1, + .no_big_frame_no = 1, +- .num_ports = 1, + .power_on = bcm63xx_ohci_power_on, + .power_off = bcm63xx_ohci_power_off, + .power_suspend = bcm63xx_ohci_power_off, +@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh + }, + }; + +-int __init bcm63xx_ohci_register(void) ++int __init bcm63xx_ohci_register(unsigned int num_ports) + { + if (BCMCPU_IS_6345() || BCMCPU_IS_6338()) + return -ENODEV; + ++ bcm63xx_ohci_pdata.num_ports = num_ports; ++ + ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); + ohci_resources[0].end = ohci_resources[0].start; + ohci_resources[0].end += RSET_OHCI_SIZE - 1; diff --git a/target/linux/brcm63xx/patches-4.9/351-set-board-usbh-ports.patch b/target/linux/brcm63xx/patches-4.9/351-set-board-usbh-ports.patch new file mode 100644 index 000000000..284475cc7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/351-set-board-usbh-ports.patch @@ -0,0 +1,10 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -592,6 +592,7 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_pccard = 1, + .has_ehci0 = 1, ++ .num_usbh_ports = 2, + + .leds = { + { diff --git a/target/linux/brcm63xx/patches-4.9/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch b/target/linux/brcm63xx/patches-4.9/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch new file mode 100644 index 000000000..bc37d97da --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/354-MIPS-BCM63XX-allow-building-support-for-more-than-on.patch @@ -0,0 +1,95 @@ +From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 21 Jun 2014 12:47:49 +0200 +Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one + board type + +Use the arguments passed to the kernel to detect being booted with +CFE as the indicator for bcm963xx board support, allowing the +non presence of CFE_EPTSEAL to assume a different board type. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Kconfig | 7 +++---- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/boards/board_common.c | 13 +++++++++++++ + arch/mips/bcm63xx/boards/board_common.h | 6 ++++++ + 4 files changed, 23 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -1,11 +1,10 @@ +-choice +- prompt "Board support" ++menu "Board support" + depends on BCM63XX +- default BOARD_BCM963XX + + config BOARD_BCM963XX + bool "Generic Broadcom 963xx boards" + select SSB ++ default y + help + +-endchoice ++endmenu +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -702,7 +702,7 @@ static const struct board_info __initcon + /* + * early init callback, read nvram data from flash and checksum it + */ +-void __init board_prom_init(void) ++void __init board_bcm963xx_init(void) + { + unsigned int i; + u8 *boot_addr, *cfe; +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -13,6 +13,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -31,6 +33,8 @@ + #include + #include + ++#include "board_common.h" ++ + #define PFX "board: " + + static struct board_info board; +@@ -81,6 +85,15 @@ const char *board_get_name(void) + return board.name; + } + ++void __init board_prom_init(void) ++{ ++ /* detect bootloader */ ++ if (fw_arg3 == CFE_EPTSEAL) ++ board_bcm963xx_init(); ++ else ++ panic("unsupported bootloader detected"); ++} ++ + static int (*board_get_mac_address)(u8 mac[ETH_ALEN]); + + /* +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -6,4 +6,10 @@ + void board_early_setup(const struct board_info *board, + int (*get_mac_address)(u8 mac[ETH_ALEN])); + ++#if defined(CONFIG_BOARD_BCM963XX) ++void board_bcm963xx_init(void); ++#else ++static inline void board_bcm963xx_init(void) { } ++#endif ++ + #endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.9/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch b/target/linux/brcm63xx/patches-4.9/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch new file mode 100644 index 000000000..bdbba036b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/355-MIPS-BCM63XX-allow-board-implementations-to-force-fl.patch @@ -0,0 +1,61 @@ +From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 04:28:14 +0100 +Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force + flash address + +Allow board implementations to force the physmap address. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++----- + .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++ + 2 files changed, 16 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -58,6 +58,12 @@ static struct platform_device mtd_dev = + }, + }; + ++void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end) ++{ ++ mtd_resources[0].start = start; ++ mtd_resources[0].end = end; ++} ++ + static int __init bcm63xx_detect_flash_type(void) + { + u32 val; +@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void) + + switch (flash_type) { + case BCM63XX_FLASH_TYPE_PARALLEL: +- /* read base address of boot chip select (0) */ +- val = bcm_mpi_readl(MPI_CSBASE_REG(0)); +- val &= MPI_CSBASE_BASE_MASK; + +- mtd_resources[0].start = val; +- mtd_resources[0].end = 0x1FFFFFFF; ++ if (!mtd_resources[0].start) { ++ /* read base address of boot chip select (0) */ ++ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ val &= MPI_CSBASE_BASE_MASK; ++ ++ mtd_resources[0].start = val; ++ mtd_resources[0].end = 0x1FFFFFFF; ++ } + + return platform_device_register(&mtd_dev); + case BCM63XX_FLASH_TYPE_SERIAL: +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h +@@ -9,6 +9,8 @@ enum { + + void bcm63xx_flash_detect(void); + ++void bcm63xx_flash_force_phys_base_address(u32 start, u32 end); ++ + int __init bcm63xx_flash_register(void); + + #endif /* __BCM63XX_FLASH_H */ diff --git a/target/linux/brcm63xx/patches-4.9/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch b/target/linux/brcm63xx/patches-4.9/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch new file mode 100644 index 000000000..cec6c7e1a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/356-MIPS-BCM63XX-move-fallback-sprom-support-into-its-ow.patch @@ -0,0 +1,188 @@ +From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:31:12 +0200 +Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own + unit + +In preparation for enhancing it, move it into its own file. Require a +mac address to be passed as the argument to always "reserve" the mac +regardless of the inclusion state of SSB. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/boards/board_common.c | 53 ++-------------- + arch/mips/bcm63xx/sprom.c | 70 ++++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 ++ + 4 files changed, 83 insertions(+), 48 deletions(-) + create mode 100644 arch/mips/bcm63xx/sprom.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ +- usb-common.o ++ usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -40,44 +40,6 @@ + static struct board_info board; + + /* +- * Register a sane SPROMv2 to make the on-board +- * bcm4318 WLAN work +- */ +-#ifdef CONFIG_SSB_PCIHOST +-static struct ssb_sprom bcm63xx_sprom = { +- .revision = 0x02, +- .board_rev = 0x17, +- .country_code = 0x0, +- .ant_available_bg = 0x3, +- .pa0b0 = 0x15ae, +- .pa0b1 = 0xfa85, +- .pa0b2 = 0xfe8d, +- .pa1b0 = 0xffff, +- .pa1b1 = 0xffff, +- .pa1b2 = 0xffff, +- .gpio0 = 0xff, +- .gpio1 = 0xff, +- .gpio2 = 0xff, +- .gpio3 = 0xff, +- .maxpwr_bg = 0x004c, +- .itssi_bg = 0x00, +- .boardflags_lo = 0x2848, +- .boardflags_hi = 0x0000, +-}; +- +-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) +-{ +- if (bus->bustype == SSB_BUSTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); +- return 0; +- } else { +- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); +- return -EINVAL; +- } +-} +-#endif +- +-/* + * return board name for /proc/cpuinfo + */ + const char *board_get_name(void) +@@ -180,6 +142,7 @@ static struct platform_device bcm63xx_gp + int __init board_register_devices(void) + { + int usbh_ports = 0; ++ u8 mac[ETH_ALEN]; + + if (board.has_uart0) + bcm63xx_uart_register(0); +@@ -224,15 +187,10 @@ int __init board_register_devices(void) + /* Generate MAC address for WLAN and register our SPROM, + * do this after registering enet devices + */ +-#ifdef CONFIG_SSB_PCIHOST +- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { +- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); +- if (ssb_arch_register_fallback_sprom( +- &bcm63xx_get_fallback_sprom) < 0) +- pr_err(PFX "failed to register fallback SPROM\n"); +- } +-#endif ++ ++ if (board_get_mac_address(mac) || ++ bcm63xx_register_fallback_sprom(mac)) ++ pr_err(PFX "failed to register fallback SPROM\n"); + + bcm63xx_spi_register(); + +--- /dev/null ++++ b/arch/mips/bcm63xx/sprom.c +@@ -0,0 +1,70 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2008 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PFX "sprom: " ++ ++/* ++ * Register a sane SPROMv2 to make the on-board ++ * bcm4318 WLAN work ++ */ ++#ifdef CONFIG_SSB_PCIHOST ++static struct ssb_sprom bcm63xx_sprom = { ++ .revision = 0x02, ++ .board_rev = 0x17, ++ .country_code = 0x0, ++ .ant_available_bg = 0x3, ++ .pa0b0 = 0x15ae, ++ .pa0b1 = 0xfa85, ++ .pa0b2 = 0xfe8d, ++ .pa1b0 = 0xffff, ++ .pa1b1 = 0xffff, ++ .pa1b2 = 0xffff, ++ .gpio0 = 0xff, ++ .gpio1 = 0xff, ++ .gpio2 = 0xff, ++ .gpio3 = 0xff, ++ .maxpwr_bg = 0x004c, ++ .itssi_bg = 0x00, ++ .boardflags_lo = 0x2848, ++ .boardflags_hi = 0x0000, ++}; ++ ++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) ++{ ++ if (bus->bustype == SSB_BUSTYPE_PCI) { ++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ return 0; ++ } else { ++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); ++ return -EINVAL; ++ } ++} ++#endif ++ ++int __init bcm63xx_register_fallback_sprom(u8 *mac) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_SSB_PCIHOST ++ memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN); ++ ++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom); ++#endif ++ return ret; ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -0,0 +1,6 @@ ++#ifndef __BCM63XX_FALLBACK_SPROM ++#define __BCM63XX_FALLBACK_SPROM ++ ++int bcm63xx_register_fallback_sprom(u8 *mac); ++ ++#endif diff --git a/target/linux/brcm63xx/patches-4.9/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch b/target/linux/brcm63xx/patches-4.9/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch new file mode 100644 index 000000000..011549cdc --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/357-MIPS-BCM63XX-use-platform-data-for-the-sprom.patch @@ -0,0 +1,95 @@ +From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:43:49 +0200 +Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom + +Similar to ethernet setup, use a platform data struct for passing +the mac. This eliminates the requirement to allocate an array on +stack for the mac passed. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_common.c | 6 ++---- + arch/mips/bcm63xx/sprom.c | 8 ++++---- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++- + arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 4 ++++ + 4 files changed, 17 insertions(+), 9 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -142,7 +142,6 @@ static struct platform_device bcm63xx_gp + int __init board_register_devices(void) + { + int usbh_ports = 0; +- u8 mac[ETH_ALEN]; + + if (board.has_uart0) + bcm63xx_uart_register(0); +@@ -188,8 +187,8 @@ int __init board_register_devices(void) + * do this after registering enet devices + */ + +- if (board_get_mac_address(mac) || +- bcm63xx_register_fallback_sprom(mac)) ++ if (board_get_mac_address(board.fallback_sprom.mac_addr) || ++ bcm63xx_register_fallback_sprom(&board.fallback_sprom)) + pr_err(PFX "failed to register fallback SPROM\n"); + + bcm63xx_spi_register(); +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss + } + #endif + +-int __init bcm63xx_register_fallback_sprom(u8 *mac) ++int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data) + { + int ret = 0; + + #ifdef CONFIG_SSB_PCIHOST +- memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN); ++ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); ++ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); + + ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom); + #endif +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -1,6 +1,12 @@ + #ifndef __BCM63XX_FALLBACK_SPROM + #define __BCM63XX_FALLBACK_SPROM + +-int bcm63xx_register_fallback_sprom(u8 *mac); ++#include ++ ++struct fallback_sprom_data { ++ u8 mac_addr[ETH_ALEN]; ++}; ++ ++int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data); + + #endif +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -7,6 +7,7 @@ + #include + #include + #include ++#include + + /* + * flash mapping +@@ -54,6 +55,9 @@ struct board_info { + + /* External PHY reset GPIO flags from gpio.h */ + unsigned long ephy_reset_gpio_flags; ++ ++ /* fallback sprom config */ ++ struct fallback_sprom_data fallback_sprom; + }; + + #endif /* ! BOARD_BCM963XX_H_ */ diff --git a/target/linux/brcm63xx/patches-4.9/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch b/target/linux/brcm63xx/patches-4.9/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch new file mode 100644 index 000000000..758fefda1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/358-MIPS-BCM63XX-make-fallback-sprom-optional.patch @@ -0,0 +1,140 @@ +From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:52:56 +0200 +Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional + +Some devices do not provide enough mac addresses to populate wifi in +addition to ethernet. + +Use having pci enabled as a rough heuristic which boards should have it +enabled. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 12 ++++++++++++ + arch/mips/bcm63xx/boards/board_common.c | 5 +++-- + arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 1 + + 3 files changed, 16 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -70,6 +70,7 @@ static struct board_info __initdata boar + .has_uart0 = 1, + .has_pci = 1, + .has_usbd = 0, ++ .use_fallback_sprom = 1, + + .usbd = { + .use_fullspeed = 0, +@@ -219,6 +220,7 @@ static struct board_info __initdata boar + .has_uart0 = 1, + .has_enet0 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -264,6 +266,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -324,6 +327,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -378,6 +382,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -436,6 +441,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -459,6 +465,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -477,6 +484,7 @@ static struct board_info __initdata boar + + .has_uart0 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + .has_ohci0 = 1, + + .has_enet0 = 1, +@@ -499,6 +507,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -525,6 +534,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -577,6 +587,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +@@ -648,6 +659,7 @@ static struct board_info __initdata boar + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, ++ .use_fallback_sprom = 1, + + .enet0 = { + .has_phy = 1, +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -187,8 +187,9 @@ int __init board_register_devices(void) + * do this after registering enet devices + */ + +- if (board_get_mac_address(board.fallback_sprom.mac_addr) || +- bcm63xx_register_fallback_sprom(&board.fallback_sprom)) ++ if (board.use_fallback_sprom && ++ (board_get_mac_address(board.fallback_sprom.mac_addr) || ++ bcm63xx_register_fallback_sprom(&board.fallback_sprom))) + pr_err(PFX "failed to register fallback SPROM\n"); + + bcm63xx_spi_register(); +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -34,6 +34,7 @@ struct board_info { + unsigned int has_dsp:1; + unsigned int has_uart0:1; + unsigned int has_uart1:1; ++ unsigned int use_fallback_sprom:1; + + /* ethernet config */ + struct bcm63xx_enet_platform_data enet0; diff --git a/target/linux/brcm63xx/patches-4.9/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch b/target/linux/brcm63xx/patches-4.9/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch new file mode 100644 index 000000000..0c4a9be47 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/359-MIPS-BCM63XX-allow-different-types-of-sprom.patch @@ -0,0 +1,66 @@ +From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 21:58:38 +0200 +Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom + +Different chips require different sprom contents, so prepare for +supplying the appropriate sprom type. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 13 ++++++++++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 5 +++++ + 2 files changed, 17 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -22,7 +22,7 @@ + * bcm4318 WLAN work + */ + #ifdef CONFIG_SSB_PCIHOST +-static struct ssb_sprom bcm63xx_sprom = { ++static __initconst struct ssb_sprom bcm63xx_default_sprom = { + .revision = 0x02, + .board_rev = 0x17, + .country_code = 0x0, +@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom = + .boardflags_hi = 0x0000, + }; + ++static struct ssb_sprom bcm63xx_sprom; ++ + int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) + { + if (bus->bustype == SSB_BUSTYPE_PCI) { +@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr + int ret = 0; + + #ifdef CONFIG_SSB_PCIHOST ++ switch (data->type) { ++ case SPROM_DEFAULT: ++ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, ++ sizeof(bcm63xx_sprom)); ++ break; ++ default: ++ return -EINVAL; ++ } ++ + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -3,8 +3,13 @@ + + #include + ++enum sprom_type { ++ SPROM_DEFAULT, /* default fallback sprom */ ++}; ++ + struct fallback_sprom_data { + u8 mac_addr[ETH_ALEN]; ++ enum sprom_type type; + }; + + int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data); diff --git a/target/linux/brcm63xx/patches-4.9/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch b/target/linux/brcm63xx/patches-4.9/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch new file mode 100644 index 000000000..42502eb06 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/360-MIPS-BCM63XX-add-support-for-raw-sproms.patch @@ -0,0 +1,517 @@ +From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 22:16:36 +0200 +Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms + +Allow using raw sprom content as templates. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 482 insertions(+) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss + return -EINVAL; + } + } ++ ++/* FIXME: use lib_sprom after submission upstream */ ++ ++/* Get the word-offset for a SSB_SPROM_XXX define. */ ++#define SPOFF(offset) ((offset) / sizeof(u16)) ++/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */ ++#define SPEX16(_outvar, _offset, _mask, _shift) \ ++ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift)) ++#define SPEX32(_outvar, _offset, _mask, _shift) \ ++ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \ ++ in[SPOFF(_offset)]) & (_mask)) >> (_shift)) ++#define SPEX(_outvar, _offset, _mask, _shift) \ ++ SPEX16(_outvar, _offset, _mask, _shift) ++ ++#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \ ++ do { \ ++ SPEX(_field[0], _offset + 0, _mask, _shift); \ ++ SPEX(_field[1], _offset + 2, _mask, _shift); \ ++ SPEX(_field[2], _offset + 4, _mask, _shift); \ ++ SPEX(_field[3], _offset + 6, _mask, _shift); \ ++ SPEX(_field[4], _offset + 8, _mask, _shift); \ ++ SPEX(_field[5], _offset + 10, _mask, _shift); \ ++ SPEX(_field[6], _offset + 12, _mask, _shift); \ ++ SPEX(_field[7], _offset + 14, _mask, _shift); \ ++ } while (0) ++ ++ ++static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in, ++ u16 mask, u16 shift) ++{ ++ u16 v; ++ u8 gain; ++ ++ v = in[SPOFF(SSB_SPROM1_AGAIN)]; ++ gain = (v & mask) >> shift; ++ if (gain == 0xFF) ++ gain = 2; /* If unset use 2dBm */ ++ if (sprom_revision == 1) { ++ /* Convert to Q5.2 */ ++ gain <<= 2; ++ } else { ++ /* Q5.2 Fractional part is stored in 0xC0 */ ++ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2); ++ } ++ ++ return (s8)gain; ++} ++ ++static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in) ++{ ++ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0); ++ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0); ++ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0); ++ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0); ++ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0); ++ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0); ++ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0); ++ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0); ++ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0); ++ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO, ++ SSB_SPROM2_MAXP_A_LO_SHIFT); ++} ++ ++static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in) ++{ ++ u16 loc[3]; ++ ++ if (out->revision == 3) /* rev 3 moved MAC */ ++ loc[0] = SSB_SPROM3_IL0MAC; ++ else { ++ loc[0] = SSB_SPROM1_IL0MAC; ++ loc[1] = SSB_SPROM1_ET0MAC; ++ loc[2] = SSB_SPROM1_ET1MAC; ++ } ++ ++ SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0); ++ SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A, ++ SSB_SPROM1_ETHPHY_ET1A_SHIFT); ++ SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14); ++ SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15); ++ SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0); ++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); ++ if (out->revision == 1) ++ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE, ++ SSB_SPROM1_BINF_CCODE_SHIFT); ++ SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA, ++ SSB_SPROM1_BINF_ANTA_SHIFT); ++ SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG, ++ SSB_SPROM1_BINF_ANTBG_SHIFT); ++ SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0); ++ SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0); ++ SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0); ++ SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0); ++ SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0); ++ SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0); ++ SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1, ++ SSB_SPROM1_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3, ++ SSB_SPROM1_GPIOB_P3_SHIFT); ++ SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A, ++ SSB_SPROM1_MAXPWR_A_SHIFT); ++ SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0); ++ SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A, ++ SSB_SPROM1_ITSSI_A_SHIFT); ++ SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0); ++ SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0); ++ ++ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0); ++ ++ /* Extract the antenna gain values. */ ++ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN_BG, ++ SSB_SPROM1_AGAIN_BG_SHIFT); ++ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in, ++ SSB_SPROM1_AGAIN_A, ++ SSB_SPROM1_AGAIN_A_SHIFT); ++ if (out->revision >= 2) ++ sprom_extract_r23(out, in); ++} ++ ++/* Revs 4 5 and 8 have partially shared layout */ ++static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in) ++{ ++ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, ++ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT); ++ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01, ++ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT); ++ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23, ++ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT); ++ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23, ++ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT); ++ ++ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01, ++ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT); ++ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01, ++ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT); ++ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23, ++ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT); ++ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23, ++ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT); ++ ++ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01, ++ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT); ++ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01, ++ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT); ++ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23, ++ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT); ++ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23, ++ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT); ++ ++ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01, ++ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT); ++ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01, ++ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT); ++ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23, ++ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT); ++ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, ++ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT); ++} ++ ++static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in) ++{ ++ u16 il0mac_offset; ++ ++ if (out->revision == 4) ++ il0mac_offset = SSB_SPROM4_IL0MAC; ++ else ++ il0mac_offset = SSB_SPROM5_IL0MAC; ++ ++ SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0); ++ SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A, ++ SSB_SPROM4_ETHPHY_ET1A_SHIFT); ++ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0); ++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); ++ if (out->revision == 4) { ++ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0); ++ SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0); ++ SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0); ++ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0); ++ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0); ++ } else { ++ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0); ++ SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0); ++ SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0); ++ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0); ++ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0); ++ } ++ SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A, ++ SSB_SPROM4_ANTAVAIL_A_SHIFT); ++ SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG, ++ SSB_SPROM4_ANTAVAIL_BG_SHIFT); ++ SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0); ++ SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG, ++ SSB_SPROM4_ITSSI_BG_SHIFT); ++ SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0); ++ SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A, ++ SSB_SPROM4_ITSSI_A_SHIFT); ++ if (out->revision == 4) { ++ SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1, ++ SSB_SPROM4_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3, ++ SSB_SPROM4_GPIOB_P3_SHIFT); ++ } else { ++ SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1, ++ SSB_SPROM5_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3, ++ SSB_SPROM5_GPIOB_P3_SHIFT); ++ } ++ ++ /* Extract the antenna gain values. */ ++ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01, ++ SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT); ++ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01, ++ SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT); ++ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23, ++ SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT); ++ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23, ++ SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT); ++ ++ sprom_extract_r458(out, in); ++ ++ /* TODO - get remaining rev 4 stuff needed */ ++} ++ ++static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) ++{ ++ int i; ++ u16 o; ++ u16 pwr_info_offset[] = { ++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1, ++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3 ++ }; ++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != ++ ARRAY_SIZE(out->core_pwr_info)); ++ ++ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0); ++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0); ++ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8); ++ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0); ++ SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0); ++ SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0); ++ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0); ++ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0); ++ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A, ++ SSB_SPROM8_ANTAVAIL_A_SHIFT); ++ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG, ++ SSB_SPROM8_ANTAVAIL_BG_SHIFT); ++ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0); ++ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG, ++ SSB_SPROM8_ITSSI_BG_SHIFT); ++ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0); ++ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A, ++ SSB_SPROM8_ITSSI_A_SHIFT); ++ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0); ++ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK, ++ SSB_SPROM8_MAXP_AL_SHIFT); ++ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0); ++ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1, ++ SSB_SPROM8_GPIOA_P1_SHIFT); ++ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0); ++ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3, ++ SSB_SPROM8_GPIOB_P3_SHIFT); ++ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0); ++ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G, ++ SSB_SPROM8_TRI5G_SHIFT); ++ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0); ++ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH, ++ SSB_SPROM8_TRI5GH_SHIFT); ++ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0); ++ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G, ++ SSB_SPROM8_RXPO5G_SHIFT); ++ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0); ++ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G, ++ SSB_SPROM8_RSSISMC2G_SHIFT); ++ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G, ++ SSB_SPROM8_RSSISAV2G_SHIFT); ++ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G, ++ SSB_SPROM8_BXA2G_SHIFT); ++ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0); ++ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G, ++ SSB_SPROM8_RSSISMC5G_SHIFT); ++ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G, ++ SSB_SPROM8_RSSISAV5G_SHIFT); ++ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G, ++ SSB_SPROM8_BXA5G_SHIFT); ++ SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0); ++ SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0); ++ SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0); ++ SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0); ++ SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0); ++ SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0); ++ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0); ++ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0); ++ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0); ++ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0); ++ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0); ++ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0); ++ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0); ++ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0); ++ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0); ++ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0); ++ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0); ++ ++ /* Extract the antenna gain values. */ ++ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01, ++ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT); ++ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01, ++ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT); ++ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23, ++ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT); ++ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23, ++ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT); ++ ++ /* Extract cores power info info */ ++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { ++ o = pwr_info_offset[i]; ++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI, ++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI, ++ SSB_SPROM8_2G_MAXP, 0); ++ ++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0); ++ ++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI, ++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI, ++ SSB_SPROM8_5G_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP, ++ SSB_SPROM8_5GH_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP, ++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT); ++ ++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0); ++ } ++ ++ /* Extract FEM info */ ++ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); ++ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); ++ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); ++ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); ++ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); ++ ++ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); ++ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); ++ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); ++ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); ++ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); ++ ++ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON, ++ SSB_SPROM8_LEDDC_ON_SHIFT); ++ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF, ++ SSB_SPROM8_LEDDC_OFF_SHIFT); ++ ++ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN, ++ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT); ++ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN, ++ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT); ++ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH, ++ SSB_SPROM8_TXRXC_SWITCH_SHIFT); ++ ++ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0); ++ ++ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0); ++ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0); ++ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0); ++ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0); ++ ++ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP, ++ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT); ++ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER, ++ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT); ++ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX, ++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE, ++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT); ++ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX, ++ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT); ++ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX, ++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION, ++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT); ++ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP, ++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR, ++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT); ++ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP, ++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP, ++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT); ++ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL, ++ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT); ++ ++ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0); ++ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0); ++ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0); ++ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0); ++ ++ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH, ++ SSB_SPROM8_THERMAL_TRESH_SHIFT); ++ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET, ++ SSB_SPROM8_THERMAL_OFFSET_SHIFT); ++ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA, ++ SSB_SPROM8_TEMPDELTA_PHYCAL, ++ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT); ++ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD, ++ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT); ++ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA, ++ SSB_SPROM8_TEMPDELTA_HYSTERESIS, ++ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT); ++ sprom_extract_r458(out, in); ++ ++ /* TODO - get remaining rev 8 stuff needed */ ++} ++ ++static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size) ++{ ++ memset(out, 0, sizeof(*out)); ++ ++ out->revision = in[size - 1] & 0x00FF; ++ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */ ++ memset(out->et1mac, 0xFF, 6); ++ ++ switch (out->revision) { ++ case 1: ++ case 2: ++ case 3: ++ sprom_extract_r123(out, in); ++ break; ++ case 4: ++ case 5: ++ sprom_extract_r45(out, in); ++ break; ++ case 8: ++ sprom_extract_r8(out, in); ++ break; ++ default: ++ pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n", ++ out->revision); ++ out->revision = 1; ++ sprom_extract_r123(out, in); ++ } ++ ++ if (out->boardflags_lo == 0xFFFF) ++ out->boardflags_lo = 0; /* per specs */ ++ if (out->boardflags_hi == 0xFFFF) ++ out->boardflags_hi = 0; /* per specs */ ++ ++ return 0; ++} ++ ++static __initdata u16 template_sprom[220]; + #endif + ++ + int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data) + { + int ret = 0; + + #ifdef CONFIG_SSB_PCIHOST ++ u16 size = 0; ++ + switch (data->type) { + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, +@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr + return -EINVAL; + } + ++ if (size > 0) ++ sprom_extract(&bcm63xx_sprom, template_sprom, size); ++ + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); diff --git a/target/linux/brcm63xx/patches-4.9/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch b/target/linux/brcm63xx/patches-4.9/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch new file mode 100644 index 000000000..65c00b519 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/361-MIPS-BCM63XX-add-raw-fallback-sproms-for-most-common.patch @@ -0,0 +1,181 @@ +From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 22:33:38 +0200 +Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common + ssb cards + +Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 136 +++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 + + 2 files changed, 142 insertions(+) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6 + .boardflags_hi = 0x0000, + }; + ++ ++static __initconst u16 bcm4306_sprom[] = { ++ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002, ++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4, ++ 0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff, ++ 0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002, ++}; ++ ++static __initconst u16 bcm4318_sprom[] = { ++ 0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000, ++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7, ++ 0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff, ++ 0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002, ++}; ++ ++static __initconst u16 bcm4321_sprom[] = { ++ 0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000, ++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36, ++ 0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0004, ++}; ++ ++static __initconst u16 bcm4322_sprom[] = { ++ 0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000, ++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43222_sprom[] = { ++ 0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000, ++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ + static struct ssb_sprom bcm63xx_sprom; + + int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) +@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr + u16 size = 0; + + switch (data->type) { ++ case SPROM_BCM4306: ++ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom)); ++ size = ARRAY_SIZE(bcm4306_sprom); ++ break; ++ case SPROM_BCM4318: ++ memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom)); ++ size = ARRAY_SIZE(bcm4318_sprom); ++ break; ++ case SPROM_BCM4321: ++ memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom)); ++ size = ARRAY_SIZE(bcm4321_sprom); ++ break; ++ case SPROM_BCM4322: ++ memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom)); ++ size = ARRAY_SIZE(bcm4322_sprom); ++ break; ++ case SPROM_BCM43222: ++ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom)); ++ size = ARRAY_SIZE(bcm43222_sprom); ++ break; + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, + sizeof(bcm63xx_sprom)); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -5,6 +5,12 @@ + + enum sprom_type { + SPROM_DEFAULT, /* default fallback sprom */ ++ /* SSB based */ ++ SPROM_BCM4306, ++ SPROM_BCM4318, ++ SPROM_BCM4321, ++ SPROM_BCM4322, ++ SPROM_BCM43222, + }; + + struct fallback_sprom_data { diff --git a/target/linux/brcm63xx/patches-4.9/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch b/target/linux/brcm63xx/patches-4.9/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch new file mode 100644 index 000000000..6475f9fa2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/362-MIPS-BCM63XX-also-register-a-fallback-sprom-for-bcma.patch @@ -0,0 +1,128 @@ +From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 Jul 2014 22:48:26 +0200 +Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma + +Similar to SSB, register a fallback sprom handler for BCMA. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Kconfig | 1 + + arch/mips/bcm63xx/sprom.c | 40 +++++++++++++++++++++++++++++++++++----- + 2 files changed, 36 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -4,6 +4,7 @@ menu "Board support" + config BOARD_BCM963XX + bool "Generic Broadcom 963xx boards" + select SSB ++ select BCMA + default y + help + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -21,7 +22,7 @@ + * Register a sane SPROMv2 to make the on-board + * bcm4318 WLAN work + */ +-#ifdef CONFIG_SSB_PCIHOST ++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) + static __initconst struct ssb_sprom bcm63xx_default_sprom = { + .revision = 0x02, + .board_rev = 0x17, +@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6 + .boardflags_hi = 0x0000, + }; + +- ++#if defined (CONFIG_SSB_PCIHOST) + static __initconst u16 bcm4306_sprom[] = { + 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002, + 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, +@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[] + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0x0008, + }; ++#endif /* CONFIG_SSB_PCIHOST */ + + static struct ssb_sprom bcm63xx_sprom; + +-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out) ++#if defined(CONFIG_SSB_PCIHOST) ++int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out) + { + if (bus->bustype == SSB_BUSTYPE_PCI) { + memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); +@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss + return -EINVAL; + } + } ++#endif ++ ++#if defined(CONFIG_BCMA_HOST_PCI) ++int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out) ++{ ++ if (bus->hosttype == BCMA_HOSTTYPE_PCI) { ++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ return 0; ++ } else { ++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); ++ return -EINVAL; ++ } ++} ++#endif + + /* FIXME: use lib_sprom after submission upstream */ + +@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr + { + int ret = 0; + +-#ifdef CONFIG_SSB_PCIHOST ++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) + u16 size = 0; + + switch (data->type) { ++#if defined(CONFIG_SSB_PCIHOST) + case SPROM_BCM4306: + memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom)); + size = ARRAY_SIZE(bcm4306_sprom); +@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr + memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom)); + size = ARRAY_SIZE(bcm43222_sprom); + break; ++#endif + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, + sizeof(bcm63xx_sprom)); +@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); ++#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */ ++ ++#if defined(CONFIG_SSB_PCIHOST) ++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom); ++ if (ret) ++ return ret; ++ ++#endif + +- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom); ++#if defined(CONFIG_BCMA_HOST_PCI) ++ ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom); ++ if (ret) ++ return ret; + #endif + return ret; + } diff --git a/target/linux/brcm63xx/patches-4.9/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch b/target/linux/brcm63xx/patches-4.9/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch new file mode 100644 index 000000000..5c0abb90e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/363-MIPS-BCM63XX-add-BCMA-based-sprom-templates.patch @@ -0,0 +1,303 @@ +From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 30 Jul 2014 23:14:27 +0200 +Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates + +Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227, +BCM43228, and BCM4331. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 256 +++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 + + 2 files changed, 264 insertions(+) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[] + }; + #endif /* CONFIG_SSB_PCIHOST */ + ++#if defined(CONFIG_BCMA_HOST_PCI) ++static __initconst u16 bcm4313_sprom[] = { ++ 0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202, ++ 0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201, ++ 0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000, ++ 0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0008, ++}; ++ ++static __initconst u16 bcm43131_sprom[] = { ++ 0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202, ++ 0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415, ++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666, ++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43217_sprom[] = { ++ 0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202, ++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415, ++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666, ++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x7a08, ++}; ++ ++static __initconst u16 bcm43225_sprom[] = { ++ 0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325, ++ 0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, ++ 0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43227_sprom[] = { ++ 0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202, ++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415, ++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666, ++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0008, ++}; ++ ++static __initconst u16 bcm43228_sprom[] = { ++ 0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202, ++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215, ++ 0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c, ++ 0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000, ++ 0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446, ++ 0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888, ++ 0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333, ++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xf008, ++}; ++ ++static __initconst u16 bcm4331_sprom[] = { ++ 0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4, ++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820, ++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100, ++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202, ++ 0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325, ++ 0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657, ++ 0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000, ++ 0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d, ++ 0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000, ++ 0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4, ++ 0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, ++ 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, ++ 0xffff, 0xffff, 0xffff, 0x0009, ++}; ++ ++#endif /* CONFIG_BCMA_HOST_PCI */ ++ + static struct ssb_sprom bcm63xx_sprom; + + #if defined(CONFIG_SSB_PCIHOST) +@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr + size = ARRAY_SIZE(bcm43222_sprom); + break; + #endif ++#if defined(CONFIG_BCMA_HOST_PCI) ++ case SPROM_BCM4313: ++ memcpy(&template_sprom, &bcm4313_sprom, ++ sizeof(bcm4313_sprom)); ++ size = ARRAY_SIZE(bcm4313_sprom); ++ break; ++ case SPROM_BCM43131: ++ memcpy(&template_sprom, &bcm43131_sprom, ++ sizeof(bcm43131_sprom)); ++ size = ARRAY_SIZE(bcm43131_sprom); ++ break; ++ case SPROM_BCM43217: ++ memcpy(&template_sprom, &bcm43217_sprom, ++ sizeof(bcm43217_sprom)); ++ size = ARRAY_SIZE(bcm43217_sprom); ++ break; ++ case SPROM_BCM43225: ++ memcpy(&template_sprom, &bcm43225_sprom, ++ sizeof(bcm43225_sprom)); ++ size = ARRAY_SIZE(bcm43225_sprom); ++ break; ++ case SPROM_BCM43227: ++ memcpy(&template_sprom, &bcm43227_sprom, ++ sizeof(bcm43227_sprom)); ++ size = ARRAY_SIZE(bcm43227_sprom); ++ break; ++ case SPROM_BCM43228: ++ memcpy(&template_sprom, &bcm43228_sprom, ++ sizeof(bcm43228_sprom)); ++ size = ARRAY_SIZE(bcm43228_sprom); ++ break; ++ case SPROM_BCM4331: ++ memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom)); ++ size = ARRAY_SIZE(bcm4331_sprom); ++ break; ++#endif + case SPROM_DEFAULT: + memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, + sizeof(bcm63xx_sprom)); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -11,6 +11,14 @@ enum sprom_type { + SPROM_BCM4321, + SPROM_BCM4322, + SPROM_BCM43222, ++ /* BCMA based */ ++ SPROM_BCM4313, ++ SPROM_BCM43131, ++ SPROM_BCM43217, ++ SPROM_BCM43225, ++ SPROM_BCM43227, ++ SPROM_BCM43228, ++ SPROM_BCM4331, + }; + + struct fallback_sprom_data { diff --git a/target/linux/brcm63xx/patches-4.9/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch b/target/linux/brcm63xx/patches-4.9/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch new file mode 100644 index 000000000..74c2846d5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/364-MIPS-BCM63XX-allow-board-files-to-provide-sprom-fixu.patch @@ -0,0 +1,67 @@ +From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 31 Jul 2014 19:12:33 +0200 +Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom + fixups + +Allow board_info files to supply fixups for the base sproms to adapt +them to the actual used sprom contents in case they do not use the +default ones. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 14 +++++++++++++- + .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 ++++++++ + 2 files changed, 21 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro + return 0; + } + ++void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < n; i++) ++ sprom[fixups[i].offset] = fixups[i].value; ++} ++ + static __initdata u16 template_sprom[220]; + #endif + +@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr + return -EINVAL; + } + +- if (size > 0) ++ if (size > 0) { ++ sprom_apply_fixups(template_sprom, data->board_fixups, ++ data->num_board_fixups); ++ + sprom_extract(&bcm63xx_sprom, template_sprom, size); ++ } + + memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); + memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -21,9 +21,17 @@ enum sprom_type { + SPROM_BCM4331, + }; + ++struct sprom_fixup { ++ u16 offset; ++ u16 value; ++}; ++ + struct fallback_sprom_data { + u8 mac_addr[ETH_ALEN]; + enum sprom_type type; ++ ++ struct sprom_fixup *board_fixups; ++ unsigned int num_board_fixups; + }; + + int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data); diff --git a/target/linux/brcm63xx/patches-4.9/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch b/target/linux/brcm63xx/patches-4.9/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch new file mode 100644 index 000000000..40591e5f2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/365-MIPS-BCM63XX-allow-setting-a-pci-bus-device-for-fall.patch @@ -0,0 +1,102 @@ +From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 31 Jul 2014 20:39:44 +0200 +Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for + fallback sprom + +Warn if the set pci bus/slot does not match the actual request. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/sprom.c | 31 ++++++++++++++++++---- + .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 3 +++ + 2 files changed, 29 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] = + + #endif /* CONFIG_BCMA_HOST_PCI */ + +-static struct ssb_sprom bcm63xx_sprom; ++struct fallback_sprom_match { ++ u8 pci_bus; ++ u8 pci_dev; ++ struct ssb_sprom sprom; ++}; ++ ++static struct fallback_sprom_match fallback_sprom; + + #if defined(CONFIG_SSB_PCIHOST) + int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out) + { + if (bus->bustype == SSB_BUSTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus || ++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev) ++ pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n", ++ fallback_sprom.pci_bus, fallback_sprom.pci_dev, ++ bus->host_pci->bus->number, ++ PCI_SLOT(bus->host_pci->devfn)); ++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom)); + return 0; + } else { + printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); +@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc + int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out) + { + if (bus->hosttype == BCMA_HOSTTYPE_PCI) { +- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom)); ++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus || ++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev) ++ pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n", ++ fallback_sprom.pci_bus, fallback_sprom.pci_dev, ++ bus->host_pci->bus->number, ++ PCI_SLOT(bus->host_pci->devfn)); ++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom)); + return 0; + } else { + printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n"); +@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr + break; + #endif + case SPROM_DEFAULT: +- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom, +- sizeof(bcm63xx_sprom)); ++ memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom, ++ sizeof(bcm63xx_default_sprom)); + break; + default: + return -EINVAL; +@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr + sprom_apply_fixups(template_sprom, data->board_fixups, + data->num_board_fixups); + +- sprom_extract(&bcm63xx_sprom, template_sprom, size); ++ sprom_extract(&fallback_sprom.sprom, template_sprom, size); + } + +- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN); +- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN); +- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN); ++ memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN); ++ memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN); ++ memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN); ++ ++ fallback_sprom.pci_bus = data->pci_bus; ++ fallback_sprom.pci_dev = data->pci_dev; + #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */ + + #if defined(CONFIG_SSB_PCIHOST) +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h +@@ -30,6 +30,9 @@ struct fallback_sprom_data { + u8 mac_addr[ETH_ALEN]; + enum sprom_type type; + ++ u8 pci_bus; ++ u8 pci_dev; ++ + struct sprom_fixup *board_fixups; + unsigned int num_board_fixups; + }; diff --git a/target/linux/brcm63xx/patches-4.9/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch b/target/linux/brcm63xx/patches-4.9/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch new file mode 100644 index 000000000..c90ba84b8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/367-MIPS-BCM63XX-add-support-for-loading-DTB.patch @@ -0,0 +1,118 @@ +From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 24 Jun 2014 10:57:51 +0200 +Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/Kconfig | 4 ++++ + arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++ + arch/mips/bcm63xx/prom.c | 6 ++++++ + 3 files changed, 44 insertions(+) + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -1,6 +1,10 @@ + menu "Board support" + depends on BCM63XX + ++config BOARD_BCM63XX_DT ++ bool "Device Tree boards (experimential)" ++ select USE_OF ++ + config BOARD_BCM963XX + bool "Generic Broadcom 963xx boards" + select SSB +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -10,11 +10,14 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -126,8 +129,23 @@ void __init board_setup(void) + /* make sure we're running on expected cpu */ + if (bcm63xx_get_cpu_id() != board.expected_cpu_id) + panic("unexpected CPU for bcm963xx board"); ++ ++#if CONFIG_OF ++ if (initial_boot_params) ++ __dt_setup_arch(initial_boot_params); ++#endif + } + ++#if CONFIG_OF ++void __init device_tree_init(void) ++{ ++ if (!initial_boot_params) ++ return; ++ ++ unflatten_and_copy_device_tree(); ++} ++#endif ++ + static struct gpio_led_platform_data bcm63xx_led_data; + + static struct platform_device bcm63xx_gpio_leds = { +@@ -136,6 +154,13 @@ static struct platform_device bcm63xx_gp + .dev.platform_data = &bcm63xx_led_data, + }; + ++#if CONFIG_OF ++static struct of_device_id of_ids[] = { ++ { /* filled at runtime */ }, ++ { .compatible = "simple-bus" }, ++ { }, ++}; ++#endif + /* + * third stage init callback, register all board devices. + */ +@@ -143,6 +168,15 @@ int __init board_register_devices(void) + { + int usbh_ports = 0; + ++#if CONFIG_OF ++ if (of_have_populated_dt()) { ++ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible), ++ "brcm,bcm%x", bcm63xx_get_cpu_id()); ++ ++ of_platform_populate(NULL, of_ids, NULL, NULL); ++ } ++#endif ++ + if (board.has_uart0) + bcm63xx_uart_register(0); + +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -8,6 +8,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -23,6 +24,11 @@ void __init prom_init(void) + { + u32 reg, mask; + ++#if CONFIG_OF ++ if (fw_passed_dtb) ++ early_init_dt_verify((void *)fw_passed_dtb); ++#endif ++ + bcm63xx_cpu_init(); + + /* stop any running watchdog */ diff --git a/target/linux/brcm63xx/patches-4.9/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch b/target/linux/brcm63xx/patches-4.9/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch new file mode 100644 index 000000000..1c3e5d12e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/368-MIPS-BCM63XX-add-support-for-matching-the-board_info.patch @@ -0,0 +1,95 @@ +From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 26 Jun 2014 12:51:00 +0200 +Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info + by dtb + +Allow using the passed dtb's compatible property to match board_info +structs instead of nvram's boardname field, which is not unique anyway. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 +++++++++++++++ + arch/mips/bcm63xx/boards/board_common.c | 18 ++++++++++++++++++ + arch/mips/bcm63xx/boards/board_common.h | 3 +++ + 3 files changed, 36 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -711,6 +711,10 @@ static const struct board_info __initcon + #endif + }; + ++static struct of_device_id const bcm963xx_boards_dt[] = { ++ { }, ++}; ++ + /* + * early init callback, read nvram data from flash and checksum it + */ +@@ -722,6 +726,7 @@ void __init board_bcm963xx_init(void) + char *board_name = NULL; + u32 val; + struct bcm_hcs *hcs; ++ const struct of_device_id *board_match; + + /* read base address of boot chip select (0) + * 6328/6362 do not have MPI but boot from a fixed address +@@ -761,6 +766,16 @@ void __init board_bcm963xx_init(void) + } else { + board_name = bcm63xx_nvram_get_name(); + } ++ ++ /* find board by compat */ ++ board_match = bcm63xx_match_board(bcm963xx_boards_dt); ++ if (board_match) { ++ board_early_setup(board_match->data, ++ bcm63xx_nvram_get_mac_address); ++ ++ return; ++ } ++ + /* find board by name */ + for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) { + if (strncmp(board_name, bcm963xx_boards[i]->name, 16)) +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -243,3 +243,21 @@ int __init board_register_devices(void) + + return 0; + } ++ ++const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m) ++{ ++ const struct of_device_id *match; ++ unsigned long dt_root; ++ ++ if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params) ++ return NULL; ++ ++ dt_root = of_get_flat_dt_root(); ++ ++ for (match = m; match->compatible[0]; match++) { ++ if (of_flat_dt_is_compatible(dt_root, match->compatible)) ++ return match; ++ } ++ ++ return NULL; ++} +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -1,11 +1,14 @@ + #ifndef __BOARD_COMMON_H + #define __BOARD_COMMON_H + ++#include + #include + + void board_early_setup(const struct board_info *board, + int (*get_mac_address)(u8 mac[ETH_ALEN])); + ++const struct of_device_id *bcm63xx_match_board(const struct of_device_id *); ++ + #if defined(CONFIG_BOARD_BCM963XX) + void board_bcm963xx_init(void); + #else diff --git a/target/linux/brcm63xx/patches-4.9/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch b/target/linux/brcm63xx/patches-4.9/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch new file mode 100644 index 000000000..81c4e2364 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/369-MIPS-BCM63XX-populate-the-compatible-to-board_info-l.patch @@ -0,0 +1,65 @@ +From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 21 Nov 2014 16:54:06 +0100 +Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info + list + +Populate the compatible to board_info list to allow dtbs to be used +for known boards. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 34 +++++++++++++++++++++++++++++ + 1 file changed, 34 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -712,6 +712,48 @@ static const struct board_info __initcon + }; + + static struct of_device_id const bcm963xx_boards_dt[] = { ++#ifdef CONFIG_OF ++#ifdef CONFIG_BCM63XX_CPU_3368 ++ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6338 ++ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, ++ { .compatible = "brcm,bcm96338w", .data = &board_96338w, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6345 ++ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6348 ++ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, ++ { .compatible = "brcm,bcm96348r", .data = &board_96348r, }, ++ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, ++ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, ++ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, ++ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, ++ { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, ++ { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, ++ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, ++ { .compatible = "usr,9108", .data = &board_96348gw_a, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6358 ++ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, }, ++ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, }, ++ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, ++ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, ++ { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, ++ { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, ++ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, ++ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, ++#endif ++#ifdef CONFIG_BCM63XX_CPU_6368 ++#endif ++#ifdef CONFIG_BCM63XX_CPU_63268 ++#endif ++#endif /* CONFIG_OF */ + { }, + }; + diff --git a/target/linux/brcm63xx/patches-4.9/371_add_of_node_available_by_alias.patch b/target/linux/brcm63xx/patches-4.9/371_add_of_node_available_by_alias.patch new file mode 100644 index 000000000..dbe1a4148 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/371_add_of_node_available_by_alias.patch @@ -0,0 +1,37 @@ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -144,6 +144,18 @@ void __init device_tree_init(void) + + unflatten_and_copy_device_tree(); + } ++ ++int board_of_device_present(const char *alias) ++{ ++ bool present; ++ struct device_node *np; ++ ++ np = of_find_node_by_path(alias); ++ present = of_device_is_available(np); ++ of_node_put(np); ++ ++ return present; ++} + #endif + + static struct gpio_led_platform_data bcm63xx_led_data; +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -15,4 +15,13 @@ void board_bcm963xx_init(void); + static inline void board_bcm963xx_init(void) { } + #endif + ++#if defined(CONFIG_OF) ++int board_of_device_present(const char *alias); ++#else ++static inline void board_of_device_present(const char *alias) ++{ ++ return 0; ++} ++#endif ++ + #endif /* __BOARD_COMMON_H */ diff --git a/target/linux/brcm63xx/patches-4.9/372_dont_register_pflash_when_available_in_dtb.patch b/target/linux/brcm63xx/patches-4.9/372_dont_register_pflash_when_available_in_dtb.patch new file mode 100644 index 000000000..25384ebb6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/372_dont_register_pflash_when_available_in_dtb.patch @@ -0,0 +1,21 @@ +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -23,6 +23,8 @@ + #include + #include + ++#include "boards/board_common.h" ++ + static int flash_type; + + static struct mtd_partition mtd_partitions[] = { +@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void) + + switch (flash_type) { + case BCM63XX_FLASH_TYPE_PARALLEL: ++ /* don't register when already registered through from dtb */ ++ if (board_of_device_present("pflash")) ++ return 0; + + if (!mtd_resources[0].start) { + /* read base address of boot chip select (0) */ diff --git a/target/linux/brcm63xx/patches-4.9/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch b/target/linux/brcm63xx/patches-4.9/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch new file mode 100644 index 000000000..555352ef1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/373-MIPS-BCM63XX-register-interrupt-controllers-through-.patch @@ -0,0 +1,45 @@ +From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 1 Dec 2014 00:20:07 +0100 +Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/irq.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/arch/mips/bcm63xx/irq.c ++++ b/arch/mips/bcm63xx/irq.c +@@ -15,6 +15,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -22,6 +24,9 @@ + #include + #include + ++IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller", ++ mips_cpu_irq_of_init); ++ + void __init arch_init_irq(void) + { + void __iomem *periph_bases[2]; +@@ -30,6 +35,13 @@ void __init arch_init_irq(void) + int periph_irqs[2] = { 2, 3 }; + int ext_irqs[6]; + ++#ifdef CONFIG_OF ++ if (initial_boot_params) { ++ irqchip_init(); ++ return; ++ } ++#endif ++ + periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); + periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); + ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF); diff --git a/target/linux/brcm63xx/patches-4.9/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch b/target/linux/brcm63xx/patches-4.9/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch new file mode 100644 index 000000000..2eaf0b6b5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/374-gpio-add-a-simple-GPIO-driver-for-bcm63xx.patch @@ -0,0 +1,178 @@ +From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 20 Feb 2015 19:55:32 +0100 +Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx + + +Signed-off-by: Jonas Gorski +--- + drivers/gpio/Kconfig | 8 +++ + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-bcm63xx.c | 135 +++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 131 insertions(+) + create mode 100644 drivers/gpio/gpio-bcm63xx.c + +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -134,6 +134,13 @@ config GPIO_BCM_KONA + help + Turn on GPIO support for Broadcom "Kona" chips. + ++config GPIO_BCM63XX ++ bool "Broadcom BCM63XX GPIO" ++ depends on MIPS || COMPILE_TEST ++ select GPIO_GENERIC ++ help ++ Turn on GPIO support for Broadcom BCM63XX xDSL chips. ++ + config GPIO_BRCMSTB + tristate "BRCMSTB GPIO support" + default y if (ARCH_BRCMSTB || BMIPS_GENERIC) +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -31,6 +31,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o + obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o + obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o + obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o ++obj-$(CONFIG_GPIO_BCM63XX) += gpio-bcm63xx.o + obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o + obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o + obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o +--- /dev/null ++++ b/drivers/gpio/gpio-bcm63xx.c +@@ -0,0 +1,135 @@ ++/* ++ * Driver for BCM63XX memory-mapped GPIO controllers, based on ++ * Generic driver for memory-mapped GPIO controllers. ++ * ++ * Copyright 2008 MontaVista Software, Inc. ++ * Copyright 2008,2010 Anton Vorontsov ++ * Copyright 2015 Jonas Gorski ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ char irq_name[7]; /* "gpioXX" */ ++ ++ sprintf(irq_name, "gpio%d", gpio); ++ return of_irq_get_byname(chip->of_node, irq_name); ++} ++ ++static int bcm63xx_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct resource *dat_r, *dirout_r; ++ void __iomem *dat; ++ void __iomem *dirout; ++ unsigned long sz; ++ int err; ++ struct gpio_chip *gc; ++ struct bgpio_pdata *pdata = dev_get_platdata(dev); ++ ++ dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!dat_r || !dirout_r) ++ return -EINVAL; ++ ++ if (resource_size(dat_r) != resource_size(dirout_r)) ++ return -EINVAL; ++ ++ sz = resource_size(dat_r); ++ ++ dat = devm_ioremap_resource(dev, dat_r); ++ if (IS_ERR(dat)) ++ return PTR_ERR(dat); ++ ++ dirout = devm_ioremap_resource(dev, dirout_r); ++ if (IS_ERR(dirout)) ++ return PTR_ERR(dirout); ++ ++ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); ++ if (!gc) ++ return -ENOMEM; ++ ++ err = bgpio_init(gc, dev, sz, dat, NULL, NULL, dirout, NULL, ++ BGPIOF_BIG_ENDIAN_BYTE_ORDER); ++ if (err) ++ return err; ++ ++ platform_set_drvdata(pdev, gc); ++ ++ if (dev->of_node) { ++ int id = of_alias_get_id(dev->of_node, "gpio"); ++ u32 ngpios; ++ ++ if (id >= 0) ++ gc->label = devm_kasprintf(dev, GFP_KERNEL, ++ "bcm63xx-gpio.%d", id); ++ ++ if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios)) ++ gc->ngpio = ngpios; ++ ++ if (of_get_property(dev->of_node, "interrupt-names", NULL)) ++ gc->to_irq = bcm63xx_gpio_to_irq; ++ ++ } else if (pdata) { ++ gc->base = pdata->base; ++ if (pdata->ngpio > 0) ++ gc->ngpio = pdata->ngpio; ++ } ++ ++ return gpiochip_add(gc); ++} ++ ++static int bcm63xx_gpio_remove(struct platform_device *pdev) ++{ ++ struct gpio_chip *gc = platform_get_drvdata(pdev); ++ ++ gpiochip_remove(gc); ++ return 0; ++} ++ ++#ifdef CONFIG_OF ++static struct of_device_id bcm63xx_gpio_of_match[] = { ++ { .compatible = "brcm,bcm6345-gpio" }, ++ { }, ++}; ++#endif ++ ++static struct platform_driver bcm63xx_gpio_driver = { ++ .probe = bcm63xx_gpio_probe, ++ .remove = bcm63xx_gpio_remove, ++ .driver = { ++ .name = "bcm63xx-gpio", ++ .of_match_table = of_match_ptr(bcm63xx_gpio_of_match), ++ }, ++}; ++ ++module_platform_driver(bcm63xx_gpio_driver); ++ ++MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers"); ++MODULE_AUTHOR("Jonas Gorski "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm63xx/patches-4.9/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch b/target/linux/brcm63xx/patches-4.9/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch new file mode 100644 index 000000000..d8c6907ae --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/375-MIPS-BCM63XX-switch-to-new-gpio-driver.patch @@ -0,0 +1,215 @@ +From cc99dca188bb63ba390008e2f7fa62d0300233e0 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 20 Feb 2015 23:58:54 +0100 +Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_common.c | 2 + + arch/mips/bcm63xx/gpio.c | 147 +++++++------------------------ + arch/mips/bcm63xx/setup.c | 3 - + 3 files changed, 33 insertions(+), 119 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -189,6 +189,8 @@ int __init board_register_devices(void) + } + #endif + ++ bcm63xx_gpio_init(); ++ + if (board.has_uart0) + bcm63xx_uart_register(0); + +--- a/arch/mips/bcm63xx/gpio.c ++++ b/arch/mips/bcm63xx/gpio.c +@@ -5,147 +5,61 @@ + * + * Copyright (C) 2008 Maxime Bizon + * Copyright (C) 2008-2011 Florian Fainelli ++ * Copyright (C) Jonas Gorski + */ + + #include +-#include +-#include + #include + #include + + #include + #include +-#include + #include + +-static u32 gpio_out_low_reg; +- +-static void bcm63xx_gpio_out_low_reg_init(void) ++static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio) + { +- switch (bcm63xx_get_cpu_id()) { +- case BCM6345_CPU_ID: +- gpio_out_low_reg = GPIO_DATA_LO_REG_6345; +- break; +- default: +- gpio_out_low_reg = GPIO_DATA_LO_REG; +- break; +- } +-} +- +-static DEFINE_SPINLOCK(bcm63xx_gpio_lock); +-static u32 gpio_out_low, gpio_out_high; ++ struct resource res[2]; ++ struct bgpio_pdata pdata; + +-static void bcm63xx_gpio_set(struct gpio_chip *chip, +- unsigned gpio, int val) +-{ +- u32 reg; +- u32 mask; +- u32 *v; +- unsigned long flags; +- +- if (gpio >= chip->ngpio) +- BUG(); +- +- if (gpio < 32) { +- reg = gpio_out_low_reg; +- mask = 1 << gpio; +- v = &gpio_out_low; +- } else { +- reg = GPIO_DATA_HI_REG; +- mask = 1 << (gpio - 32); +- v = &gpio_out_high; +- } +- +- spin_lock_irqsave(&bcm63xx_gpio_lock, flags); +- if (val) +- *v |= mask; +- else +- *v &= ~mask; +- bcm_gpio_writel(*v, reg); +- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); +-} ++ memset(res, 0, sizeof(res)); ++ memset(&pdata, 0, sizeof(pdata)); + +-static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio) +-{ +- u32 reg; +- u32 mask; ++ res[0].flags = IORESOURCE_MEM; ++ res[0].start = bcm63xx_regset_address(RSET_GPIO); ++ res[0].start += dir; + +- if (gpio >= chip->ngpio) +- BUG(); ++ res[0].end = res[0].start + 3; + +- if (gpio < 32) { +- reg = gpio_out_low_reg; +- mask = 1 << gpio; +- } else { +- reg = GPIO_DATA_HI_REG; +- mask = 1 << (gpio - 32); +- } ++ res[1].flags = IORESOURCE_MEM; ++ res[1].start = bcm63xx_regset_address(RSET_GPIO); ++ res[1].start += data; + +- return !!(bcm_gpio_readl(reg) & mask); +-} ++ res[1].end = res[1].start + 3; + +-static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, +- unsigned gpio, int dir) +-{ +- u32 reg; +- u32 mask; +- u32 tmp; +- unsigned long flags; +- +- if (gpio >= chip->ngpio) +- BUG(); +- +- if (gpio < 32) { +- reg = GPIO_CTL_LO_REG; +- mask = 1 << gpio; +- } else { +- reg = GPIO_CTL_HI_REG; +- mask = 1 << (gpio - 32); +- } +- +- spin_lock_irqsave(&bcm63xx_gpio_lock, flags); +- tmp = bcm_gpio_readl(reg); +- if (dir == BCM63XX_GPIO_DIR_IN) +- tmp &= ~mask; +- else +- tmp |= mask; +- bcm_gpio_writel(tmp, reg); +- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); ++ pdata.base = id * 32; ++ pdata.ngpio = ngpio; + +- return 0; ++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2, ++ &pdata, sizeof(pdata)); + } + +-static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) ++int __init bcm63xx_gpio_init(void) + { +- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN); +-} ++ int ngpio = bcm63xx_gpio_count(); ++ int data_low_reg; + +-static int bcm63xx_gpio_direction_output(struct gpio_chip *chip, +- unsigned gpio, int value) +-{ +- bcm63xx_gpio_set(chip, gpio, value); +- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT); +-} ++ if (BCMCPU_IS_6345()) ++ data_low_reg = GPIO_DATA_LO_REG_6345; ++ else ++ data_low_reg = GPIO_DATA_LO_REG; + ++ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32)); + +-static struct gpio_chip bcm63xx_gpio_chip = { +- .label = "bcm63xx-gpio", +- .direction_input = bcm63xx_gpio_direction_input, +- .direction_output = bcm63xx_gpio_direction_output, +- .get = bcm63xx_gpio_get, +- .set = bcm63xx_gpio_set, +- .base = 0, +-}; ++ if (ngpio <= 32) ++ return 0; + +-int __init bcm63xx_gpio_init(void) +-{ +- bcm63xx_gpio_out_low_reg_init(); ++ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32); + +- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg); +- if (!BCMCPU_IS_6345()) +- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG); +- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count(); +- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio); ++ return 0; + +- return gpiochip_add_data(&bcm63xx_gpio_chip, NULL); + } +--- a/arch/mips/bcm63xx/setup.c ++++ b/arch/mips/bcm63xx/setup.c +@@ -164,9 +164,6 @@ void __init plat_mem_setup(void) + + int __init bcm63xx_register_devices(void) + { +- /* register gpiochip */ +- bcm63xx_gpio_init(); +- + return board_register_devices(); + } + diff --git a/target/linux/brcm63xx/patches-4.9/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch b/target/linux/brcm63xx/patches-4.9/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch new file mode 100644 index 000000000..56ab16601 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/377-MIPS-BCM63XX-register-lookup-for-ephy-reset-gpio.patch @@ -0,0 +1,128 @@ +From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 21 Feb 2015 17:21:59 +0100 +Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio + + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +- + arch/mips/bcm63xx/boards/board_common.c | 7 +++-- + arch/mips/bcm63xx/gpio.c | 32 ++++++++++++++++++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 ++ + .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 5 +-- + 5 files changed, 42 insertions(+), 6 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -55,7 +55,7 @@ static struct board_info __initdata boar + }, + + .ephy_reset_gpio = 36, +- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH, ++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, + }; + #endif + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -251,9 +251,10 @@ int __init board_register_devices(void) + + platform_device_register(&bcm63xx_gpio_leds); + +- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) +- gpio_request_one(board.ephy_reset_gpio, +- board.ephy_reset_gpio_flags, "ephy-reset"); ++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) { ++ bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio, ++ board.ephy_reset_gpio_flags); ++ } + + return 0; + } +--- a/arch/mips/bcm63xx/gpio.c ++++ b/arch/mips/bcm63xx/gpio.c +@@ -8,14 +8,22 @@ + * Copyright (C) Jonas Gorski + */ + ++#include ++ + #include + #include + #include ++#include + + #include + #include + #include + ++static const char * const gpio_chip_labels[] = { ++ "bcm63xx-gpio.0", ++ "bcm63xx-gpio.1", ++}; ++ + static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio) + { + struct resource res[2]; +@@ -63,3 +71,25 @@ int __init bcm63xx_gpio_init(void) + return 0; + + } ++ ++static struct gpiod_lookup_table ephy_reset = { ++ .dev_id = "bcm63xx_enet-0", ++ .table = { ++ { /* filled at runtime */ }, ++ { }, ++ }, ++}; ++ ++ ++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags) ++{ ++ if (ephy_reset.table[0].chip_label) ++ return; ++ ++ ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32]; ++ ephy_reset.table[0].chip_hwnum = hw_gpio % 32; ++ ephy_reset.table[0].con_id = "reset"; ++ ephy_reset.table[0].flags = flags; ++ ++ gpiod_add_lookup_table(&ephy_reset); ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +@@ -2,9 +2,11 @@ + #define BCM63XX_GPIO_H + + #include ++#include + #include + + int __init bcm63xx_gpio_init(void); ++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags); + + static inline unsigned long bcm63xx_gpio_count(void) + { +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -3,6 +3,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -54,8 +55,8 @@ struct board_info { + /* External PHY reset GPIO */ + unsigned int ephy_reset_gpio; + +- /* External PHY reset GPIO flags from gpio.h */ +- unsigned long ephy_reset_gpio_flags; ++ /* External PHY reset GPIO flags from gpio/machine.h */ ++ enum gpio_lookup_flags ephy_reset_gpio_flags; + + /* fallback sprom config */ + struct fallback_sprom_data fallback_sprom; diff --git a/target/linux/brcm63xx/patches-4.9/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch b/target/linux/brcm63xx/patches-4.9/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch new file mode 100644 index 000000000..1db543f40 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/378-MIPS-BCM63XX-do-not-register-gpio-controller-if-pres.patch @@ -0,0 +1,35 @@ +From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 21 Feb 2015 17:26:50 +0100 +Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if +present in dtb + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/gpio.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/gpio.c ++++ b/arch/mips/bcm63xx/gpio.c +@@ -19,6 +19,8 @@ + #include + #include + ++#include "boards/board_common.h" ++ + static const char * const gpio_chip_labels[] = { + "bcm63xx-gpio.0", + "bcm63xx-gpio.1", +@@ -47,8 +49,10 @@ static void __init bcm63xx_gpio_init_one + pdata.base = id * 32; + pdata.ngpio = ngpio; + +- platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2, +- &pdata, sizeof(pdata)); ++ if (!board_of_device_present("gpio0") && ++ !board_of_device_present("pinctrl")) ++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, ++ 2, &pdata, sizeof(pdata)); + } + + int __init bcm63xx_gpio_init(void) diff --git a/target/linux/brcm63xx/patches-4.9/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch b/target/linux/brcm63xx/patches-4.9/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch new file mode 100644 index 000000000..b5719990b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/379-MIPS-BCM63XX-provide-a-gpio-lookup-for-the-pcmcia-re.patch @@ -0,0 +1,59 @@ +From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 25 Mar 2015 13:52:02 +0100 +Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia + ready gpio + +To prepare for a time when gpiobases don't need to be fixed anymore. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-pcmcia.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/mips/bcm63xx/dev-pcmcia.c ++++ b/arch/mips/bcm63xx/dev-pcmcia.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -101,6 +102,14 @@ static const struct { + }, + }; + ++static struct gpiod_lookup_table pcmcia_gpios_table = { ++ .dev_id = "bcm63xx_pcmcia.0", ++ .table = { ++ GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH), ++ { }, ++ }, ++}; ++ + int __init bcm63xx_pcmcia_register(void) + { + int ret, i; +@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void) + switch (bcm63xx_get_cpu_id()) { + case BCM6348_CPU_ID: + pd.ready_gpio = 22; ++ pcmcia_gpios_table.table[0].chip_hwnum = 22; + break; + + case BCM6358_CPU_ID: + pd.ready_gpio = 18; ++ pcmcia_gpios_table.table[0].chip_hwnum = 18; + break; + + default: + return -ENODEV; + } + ++ gpiod_add_lookup_table(&pcmcia_gpios_table); ++ + pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA); + pcmcia_resources[0].end = pcmcia_resources[0].start + + RSET_PCMCIA_SIZE - 1; diff --git a/target/linux/brcm63xx/patches-4.9/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch b/target/linux/brcm63xx/patches-4.9/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch new file mode 100644 index 000000000..524ca1aa0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/380-pcmcia-bcm63xx_pmcia-use-the-new-named-gpio.patch @@ -0,0 +1,59 @@ +From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 25 Mar 2015 13:54:56 +0100 +Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio + +Use the new named gpio instead of relying on the hardware gpio numbers +matching the virtual gpio numbers. + +Signed-off-by: Jonas Gorski +--- + drivers/pcmcia/bcm63xx_pcmcia.c | 9 ++++++++- + drivers/pcmcia/bcm63xx_pcmcia.h | 4 ++++ + 2 files changed, 12 insertions(+), 1 deletion(-) + +--- a/drivers/pcmcia/bcm63xx_pcmcia.c ++++ b/drivers/pcmcia/bcm63xx_pcmcia.c +@@ -237,7 +237,7 @@ static unsigned int __get_socket_status( + stat |= SS_XVCARD; + stat |= SS_POWERON; + +- if (gpio_get_value(skt->pd->ready_gpio)) ++ if (gpiod_get_value(skt->ready_gpio)) + stat |= SS_READY; + + return stat; +@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru + goto err; + } + ++ /* get ready gpio */ ++ skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN); ++ if (IS_ERR(skt->ready_gpio)) { ++ ret = PTR_ERR(skt->ready_gpio); ++ goto err; ++ } ++ + /* resources are static */ + sock->resource_ops = &pccard_static_ops; + sock->ops = &bcm63xx_pcmcia_operations; +--- a/drivers/pcmcia/bcm63xx_pcmcia.h ++++ b/drivers/pcmcia/bcm63xx_pcmcia.h +@@ -3,6 +3,7 @@ + + #include + #include ++#include + #include + #include + +@@ -55,6 +56,9 @@ struct bcm63xx_pcmcia_socket { + + /* base address of io memory */ + void __iomem *io_base; ++ ++ /* ready gpio */ ++ struct gpio_desc *ready_gpio; + }; + + #endif /* BCM63XX_PCMCIA_H_ */ diff --git a/target/linux/brcm63xx/patches-4.9/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch b/target/linux/brcm63xx/patches-4.9/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch new file mode 100644 index 000000000..5d4265f7f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/381-Documentation-add-BCM6318-pincontroller-binding-docu.patch @@ -0,0 +1,96 @@ +From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 27 Jul 2016 11:38:05 +0200 +Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding + documentation + +Add binding documentation for the pincontrol core found in BCM6318 SoCs. + +Signed-off-by: Jonas Gorski +--- + .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt | 79 ++++++++++++++++++++++ + 1 file changed, 79 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt +@@ -0,0 +1,79 @@ ++* Broadcom BCM6318 pin controller ++ ++Required properties: ++- compatible: Must be "brcm,bcm6318-pinctrl". ++- regs: Register specifiers of dirout, dat, mode, mux, and pad registers. ++- reg-names: Must be "dirout", "dat", "mode", "mux", "pad". ++- gpio-controller: Identifies this node as a gpio controller. ++- #gpio-cells: Must be <2>. ++ ++Example: ++ ++pinctrl: pin-controller@10000080 { ++ compatible = "brcm,bcm6318-pinctrl"; ++ reg = <0x10000080 0x08>, ++ <0x10000088 0x08>, ++ <0x10000098 0x04>, ++ <0x1000009c 0x0c>, ++ <0x100000d4 0x18>; ++ reg-names = "dirout", "dat", "mode", "mux", "pad"; ++ ++ gpio-controller; ++ #gpio-cells = <2>; ++}; ++ ++ ++Available pins/groups and functions: ++ ++name pins functions ++----------------------------------------------------------- ++gpio0 0 led, ephy0_spd_led ++gpio1 1 led, ephy1_spd_led ++gpio2 2 led, ephy2_spd_led ++gpio3 3 led, ephy3_spd_led ++gpio4 4 led, ephy0_act_led ++gpio5 5 led, ephy1_act_led ++gpio6 6 led, ephy2_act_led, serial_led_data ++gpio7 7 led, ephy3_act_led, serial_led_clk ++gpio8 8 led, inet_act_led ++gpio9 9 led, inet_fail_led ++gpio10 10 led, dsl_led ++gpio11 11 led, post_fail_led ++gpio12 12 led, wlan_wps_led ++gpio13 13 led, usb_pwron, usb_device_led ++gpio14 14 led ++gpio15 15 led ++gpio16 16 led ++gpio17 17 led ++gpio18 18 led ++gpio19 19 led ++gpio20 20 led ++gpio21 21 led ++gpio22 22 led ++gpio23 23 led ++gpio24 24 - ++gpio25 25 - ++gpio26 26 - ++gpio27 27 - ++gpio28 28 - ++gpio29 29 - ++gpio30 30 - ++gpio31 31 - ++gpio32 32 - ++gpio33 33 - ++gpio34 34 - ++gpio35 35 - ++gpio36 36 - ++gpio37 37 - ++gpio38 38 - ++gpio39 39 - ++gpio40 40 usb_active ++gpio41 41 - ++gpio42 42 - ++gpio43 43 - ++gpio44 44 - ++gpio45 45 - ++gpio46 46 - ++gpio47 47 - ++gpio48 48 - ++gpio49 49 - diff --git a/target/linux/brcm63xx/patches-4.9/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch b/target/linux/brcm63xx/patches-4.9/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch new file mode 100644 index 000000000..2a89dde3c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/382-pinctrl-add-a-pincontrol-driver-for-BCM6318.patch @@ -0,0 +1,609 @@ +From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 24 Jun 2016 22:20:39 +0200 +Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318 + +Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs +to different functions. BCM6318 is similar to BCM6328 with the addition +of a pad register, and the GPIO meaning of the mux register changes +based on the GPIO number. + +Signed-off-by: Jonas Gorski +--- + drivers/pinctrl/bcm63xx/Kconfig | 7 + + drivers/pinctrl/bcm63xx/Makefile | 1 + + drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++ + 3 files changed, 572 insertions(+) + create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c + +--- a/drivers/pinctrl/bcm63xx/Kconfig ++++ b/drivers/pinctrl/bcm63xx/Kconfig +@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX + bool + select GPIO_GENERIC + ++config PINCTRL_BCM6318 ++ bool "BCM6318 pincontrol driver" if COMPILE_TEST ++ select PINMUX ++ select PINCONF ++ select PINCTRL_BCM63XX ++ select GENERIC_PINCONF ++ + config PINCTRL_BCM6328 + bool "BCM6328 pincontrol driver" if COMPILE_TEST + select PINMUX +--- a/drivers/pinctrl/bcm63xx/Makefile ++++ b/drivers/pinctrl/bcm63xx/Makefile +@@ -1,4 +1,5 @@ + obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o ++obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o + obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o + obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o + obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o +--- /dev/null ++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c +@@ -0,0 +1,564 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2016 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "../core.h" ++#include "../pinctrl-utils.h" ++ ++#include "pinctrl-bcm63xx.h" ++ ++#define BCM6318_NGPIO 50 ++ ++struct bcm6318_pingroup { ++ const char *name; ++ const unsigned * const pins; ++ const unsigned num_pins; ++}; ++ ++struct bcm6318_function { ++ const char *name; ++ const char * const *groups; ++ const unsigned num_groups; ++ ++ unsigned mode_val:1; ++ unsigned mux_val:2; ++}; ++ ++struct bcm6318_pinctrl { ++ struct pinctrl_dev *pctldev; ++ struct pinctrl_desc desc; ++ ++ void __iomem *mode; ++ void __iomem *mux[3]; ++ void __iomem *pad[6]; ++ ++ /* register access lock */ ++ spinlock_t lock; ++ ++ struct gpio_chip gpio[2]; ++}; ++ ++static const struct pinctrl_pin_desc bcm6318_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ PINCTRL_PIN(8, "gpio8"), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ PINCTRL_PIN(12, "gpio12"), ++ PINCTRL_PIN(13, "gpio13"), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ PINCTRL_PIN(27, "gpio27"), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ PINCTRL_PIN(30, "gpio30"), ++ PINCTRL_PIN(31, "gpio31"), ++ PINCTRL_PIN(32, "gpio32"), ++ PINCTRL_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++ PINCTRL_PIN(40, "gpio40"), ++ PINCTRL_PIN(41, "gpio41"), ++ PINCTRL_PIN(42, "gpio42"), ++ PINCTRL_PIN(43, "gpio43"), ++ PINCTRL_PIN(44, "gpio44"), ++ PINCTRL_PIN(45, "gpio45"), ++ PINCTRL_PIN(46, "gpio46"), ++ PINCTRL_PIN(47, "gpio47"), ++ PINCTRL_PIN(48, "gpio48"), ++ PINCTRL_PIN(49, "gpio49"), ++}; ++ ++static unsigned gpio0_pins[] = { 0 }; ++static unsigned gpio1_pins[] = { 1 }; ++static unsigned gpio2_pins[] = { 2 }; ++static unsigned gpio3_pins[] = { 3 }; ++static unsigned gpio4_pins[] = { 4 }; ++static unsigned gpio5_pins[] = { 5 }; ++static unsigned gpio6_pins[] = { 6 }; ++static unsigned gpio7_pins[] = { 7 }; ++static unsigned gpio8_pins[] = { 8 }; ++static unsigned gpio9_pins[] = { 9 }; ++static unsigned gpio10_pins[] = { 10 }; ++static unsigned gpio11_pins[] = { 11 }; ++static unsigned gpio12_pins[] = { 12 }; ++static unsigned gpio13_pins[] = { 13 }; ++static unsigned gpio14_pins[] = { 14 }; ++static unsigned gpio15_pins[] = { 15 }; ++static unsigned gpio16_pins[] = { 16 }; ++static unsigned gpio17_pins[] = { 17 }; ++static unsigned gpio18_pins[] = { 18 }; ++static unsigned gpio19_pins[] = { 19 }; ++static unsigned gpio20_pins[] = { 20 }; ++static unsigned gpio21_pins[] = { 21 }; ++static unsigned gpio22_pins[] = { 22 }; ++static unsigned gpio23_pins[] = { 23 }; ++static unsigned gpio24_pins[] = { 24 }; ++static unsigned gpio25_pins[] = { 25 }; ++static unsigned gpio26_pins[] = { 26 }; ++static unsigned gpio27_pins[] = { 27 }; ++static unsigned gpio28_pins[] = { 28 }; ++static unsigned gpio29_pins[] = { 29 }; ++static unsigned gpio30_pins[] = { 30 }; ++static unsigned gpio31_pins[] = { 31 }; ++static unsigned gpio32_pins[] = { 32 }; ++static unsigned gpio33_pins[] = { 33 }; ++static unsigned gpio34_pins[] = { 34 }; ++static unsigned gpio35_pins[] = { 35 }; ++static unsigned gpio36_pins[] = { 36 }; ++static unsigned gpio37_pins[] = { 37 }; ++static unsigned gpio38_pins[] = { 38 }; ++static unsigned gpio39_pins[] = { 39 }; ++static unsigned gpio40_pins[] = { 40 }; ++static unsigned gpio41_pins[] = { 41 }; ++static unsigned gpio42_pins[] = { 42 }; ++static unsigned gpio43_pins[] = { 43 }; ++static unsigned gpio44_pins[] = { 44 }; ++static unsigned gpio45_pins[] = { 45 }; ++static unsigned gpio46_pins[] = { 46 }; ++static unsigned gpio47_pins[] = { 47 }; ++static unsigned gpio48_pins[] = { 48 }; ++static unsigned gpio49_pins[] = { 49 }; ++ ++#define BCM6318_GROUP(n) \ ++ { \ ++ .name = #n, \ ++ .pins = n##_pins, \ ++ .num_pins = ARRAY_SIZE(n##_pins), \ ++ } ++ ++static struct bcm6318_pingroup bcm6318_groups[] = { ++ BCM6318_GROUP(gpio0), ++ BCM6318_GROUP(gpio1), ++ BCM6318_GROUP(gpio2), ++ BCM6318_GROUP(gpio3), ++ BCM6318_GROUP(gpio4), ++ BCM6318_GROUP(gpio5), ++ BCM6318_GROUP(gpio6), ++ BCM6318_GROUP(gpio7), ++ BCM6318_GROUP(gpio8), ++ BCM6318_GROUP(gpio9), ++ BCM6318_GROUP(gpio10), ++ BCM6318_GROUP(gpio11), ++ BCM6318_GROUP(gpio12), ++ BCM6318_GROUP(gpio13), ++ BCM6318_GROUP(gpio14), ++ BCM6318_GROUP(gpio15), ++ BCM6318_GROUP(gpio16), ++ BCM6318_GROUP(gpio17), ++ BCM6318_GROUP(gpio18), ++ BCM6318_GROUP(gpio19), ++ BCM6318_GROUP(gpio20), ++ BCM6318_GROUP(gpio21), ++ BCM6318_GROUP(gpio22), ++ BCM6318_GROUP(gpio23), ++ BCM6318_GROUP(gpio24), ++ BCM6318_GROUP(gpio25), ++ BCM6318_GROUP(gpio26), ++ BCM6318_GROUP(gpio27), ++ BCM6318_GROUP(gpio28), ++ BCM6318_GROUP(gpio29), ++ BCM6318_GROUP(gpio30), ++ BCM6318_GROUP(gpio31), ++ BCM6318_GROUP(gpio32), ++ BCM6318_GROUP(gpio33), ++ BCM6318_GROUP(gpio34), ++ BCM6318_GROUP(gpio35), ++ BCM6318_GROUP(gpio36), ++ BCM6318_GROUP(gpio37), ++ BCM6318_GROUP(gpio38), ++ BCM6318_GROUP(gpio39), ++ BCM6318_GROUP(gpio40), ++ BCM6318_GROUP(gpio41), ++ BCM6318_GROUP(gpio42), ++ BCM6318_GROUP(gpio43), ++ BCM6318_GROUP(gpio44), ++ BCM6318_GROUP(gpio45), ++ BCM6318_GROUP(gpio46), ++ BCM6318_GROUP(gpio47), ++ BCM6318_GROUP(gpio48), ++ BCM6318_GROUP(gpio49), ++}; ++ ++/* GPIO_MODE */ ++static const char * const led_groups[] = { ++ "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3", ++ "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7", ++ "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11", ++ "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15", ++ "gpio16", ++ "gpio17", ++ "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21", ++ "gpio22", ++ "gpio23", ++}; ++ ++/* PINMUX_SEL */ ++static const char * const ephy0_spd_led_groups[] = { ++ "gpio0", ++}; ++ ++static const char * const ephy1_spd_led_groups[] = { ++ "gpio1", ++}; ++ ++static const char * const ephy2_spd_led_groups[] = { ++ "gpio2", ++}; ++ ++static const char * const ephy3_spd_led_groups[] = { ++ "gpio3", ++}; ++ ++static const char * const ephy0_act_led_groups[] = { ++ "gpio4", ++}; ++ ++static const char * const ephy1_act_led_groups[] = { ++ "gpio5", ++}; ++ ++static const char * const ephy2_act_led_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const ephy3_act_led_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const serial_led_data_groups[] = { ++ "gpio6", ++}; ++ ++static const char * const serial_led_clk_groups[] = { ++ "gpio7", ++}; ++ ++static const char * const inet_act_led_groups[] = { ++ "gpio8", ++}; ++ ++static const char * const inet_fail_led_groups[] = { ++ "gpio9", ++}; ++ ++static const char * const dsl_led_groups[] = { ++ "gpio10", ++}; ++ ++static const char * const post_fail_led_groups[] = { ++ "gpio11", ++}; ++ ++static const char * const wlan_wps_led_groups[] = { ++ "gpio12", ++}; ++ ++static const char * const usb_pwron_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const usb_device_led_groups[] = { ++ "gpio13", ++}; ++ ++static const char * const usb_active_groups[] = { ++ "gpio40", ++}; ++ ++#define BCM6318_MODE_FUN(n) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mode_val = 1, \ ++ } ++ ++#define BCM6318_MUX_FUN(n, mux) \ ++ { \ ++ .name = #n, \ ++ .groups = n##_groups, \ ++ .num_groups = ARRAY_SIZE(n##_groups), \ ++ .mux_val = mux, \ ++ } ++ ++static const struct bcm6318_function bcm6318_funcs[] = { ++ BCM6318_MODE_FUN(led), ++ BCM6318_MUX_FUN(ephy0_spd_led, 1), ++ BCM6318_MUX_FUN(ephy1_spd_led, 1), ++ BCM6318_MUX_FUN(ephy2_spd_led, 1), ++ BCM6318_MUX_FUN(ephy3_spd_led, 1), ++ BCM6318_MUX_FUN(ephy0_act_led, 1), ++ BCM6318_MUX_FUN(ephy1_act_led, 1), ++ BCM6318_MUX_FUN(ephy2_act_led, 1), ++ BCM6318_MUX_FUN(ephy3_act_led, 1), ++ BCM6318_MUX_FUN(serial_led_data, 3), ++ BCM6318_MUX_FUN(serial_led_clk, 3), ++ BCM6318_MUX_FUN(inet_act_led, 1), ++ BCM6318_MUX_FUN(inet_fail_led, 1), ++ BCM6318_MUX_FUN(dsl_led, 1), ++ BCM6318_MUX_FUN(post_fail_led, 1), ++ BCM6318_MUX_FUN(wlan_wps_led, 1), ++ BCM6318_MUX_FUN(usb_pwron, 1), ++ BCM6318_MUX_FUN(usb_device_led, 2), ++ BCM6318_MUX_FUN(usb_active, 2), ++}; ++ ++static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6318_groups); ++} ++ ++static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned group) ++{ ++ return bcm6318_groups[group].name; ++} ++ ++static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned group, const unsigned **pins, ++ unsigned *num_pins) ++{ ++ *pins = bcm6318_groups[group].pins; ++ *num_pins = bcm6318_groups[group].num_pins; ++ ++ return 0; ++} ++ ++static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(bcm6318_funcs); ++} ++ ++static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned selector) ++{ ++ return bcm6318_funcs[selector].name; ++} ++ ++static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev, ++ unsigned selector, ++ const char * const **groups, ++ unsigned * const num_groups) ++{ ++ *groups = bcm6318_funcs[selector].groups; ++ *num_groups = bcm6318_funcs[selector].num_groups; ++ ++ return 0; ++} ++ ++static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin, ++ u32 mode, u32 mux) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ if (pin < 32) { ++ reg = __raw_readl(pctl->mode); ++ reg &= ~BIT(pin); ++ if (mode) ++ reg |= BIT(pin); ++ __raw_writel(reg, pctl->mode); ++ } ++ ++ if (pin < 48) { ++ reg = __raw_readl(pctl->mux[pin / 16]); ++ reg &= ~(3UL << ((pin % 16) * 2)); ++ reg |= mux << ((pin % 16) * 2); ++ __raw_writel(reg, pctl->mux[pin / 16]); ++ } ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val) ++{ ++ unsigned long flags; ++ u32 reg; ++ ++ spin_lock_irqsave(&pctl->lock, flags); ++ reg = __raw_readl(pctl->pad[pin / 8]); ++ reg &= ~(0xfUL << ((pin % 8) * 4)); ++ reg |= val << ((pin % 8) * 4); ++ __raw_writel(reg, pctl->pad[pin / 8]); ++ spin_unlock_irqrestore(&pctl->lock, flags); ++} ++ ++static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev, ++ unsigned selector, unsigned group) ++{ ++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ const struct bcm6318_pingroup *grp = &bcm6318_groups[group]; ++ const struct bcm6318_function *f = &bcm6318_funcs[selector]; ++ ++ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val); ++ ++ return 0; ++} ++ ++static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned offset) ++{ ++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable all functions using this pin */ ++ if (offset < 13) { ++ /* GPIOs 0-12 use mux 0 as GPIO function */ ++ bcm6318_rmw_mux(pctl, offset, 0, 0); ++ } else if (offset < 42) { ++ /* GPIOs 13-41 use mux 3 as GPIO function */ ++ bcm6318_rmw_mux(pctl, offset, 0, 3); ++ ++ /* FIXME: revert to old value for non gpio? */ ++ bcm6318_set_pad(pctl, offset, 0); ++ } else { ++ /* no idea, really */ ++ } ++ ++ return 0; ++} ++ ++static struct pinctrl_ops bcm6318_pctl_ops = { ++ .get_groups_count = bcm6318_pinctrl_get_group_count, ++ .get_group_name = bcm6318_pinctrl_get_group_name, ++ .get_group_pins = bcm6318_pinctrl_get_group_pins, ++#ifdef CONFIG_OF ++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin, ++ .dt_free_map = pinctrl_utils_free_map, ++#endif ++}; ++ ++static struct pinmux_ops bcm6318_pmx_ops = { ++ .get_functions_count = bcm6318_pinctrl_get_func_count, ++ .get_function_name = bcm6318_pinctrl_get_func_name, ++ .get_function_groups = bcm6318_pinctrl_get_groups, ++ .set_mux = bcm6318_pinctrl_set_mux, ++ .gpio_request_enable = bcm6318_gpio_request_enable, ++ .strict = true, ++}; ++ ++static int bcm6318_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct bcm6318_pinctrl *pctl; ++ struct resource *res; ++ void __iomem *mode, *mux, *pad; ++ unsigned i; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode"); ++ mode = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mode)) ++ return PTR_ERR(mode); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux"); ++ mux = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(mux)) ++ return PTR_ERR(mux); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad"); ++ pad = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(pad)) ++ return PTR_ERR(pad); ++ ++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); ++ if (!pctl) ++ return -ENOMEM; ++ ++ spin_lock_init(&pctl->lock); ++ ++ pctl->mode = mode; ++ ++ for (i = 0; i < 3; i++) ++ pctl->mux[i] = mux + (i * 4); ++ ++ for (i = 0; i < 6; i++) ++ pctl->pad[i] = pad + (i * 4); ++ ++ pctl->desc.name = dev_name(&pdev->dev); ++ pctl->desc.owner = THIS_MODULE; ++ pctl->desc.pctlops = &bcm6318_pctl_ops; ++ pctl->desc.pmxops = &bcm6318_pmx_ops; ++ ++ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins); ++ pctl->desc.pins = bcm6318_pins; ++ ++ platform_set_drvdata(pdev, pctl); ++ ++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl, ++ pctl->gpio, BCM6318_NGPIO); ++ if (IS_ERR(pctl->pctldev)) ++ return PTR_ERR(pctl->pctldev); ++ ++ return 0; ++} ++ ++static const struct of_device_id bcm6318_pinctrl_match[] = { ++ { .compatible = "brcm,bcm6318-pinctrl", }, ++ { }, ++}; ++ ++static struct platform_driver bcm6318_pinctrl_driver = { ++ .probe = bcm6318_pinctrl_probe, ++ .driver = { ++ .name = "bcm6318-pinctrl", ++ .of_match_table = bcm6318_pinctrl_match, ++ }, ++}; ++ ++builtin_platform_driver(bcm6318_pinctrl_driver); diff --git a/target/linux/brcm63xx/patches-4.9/383-bcm63xx_select_pinctrl.patch b/target/linux/brcm63xx/patches-4.9/383-bcm63xx_select_pinctrl.patch new file mode 100644 index 000000000..52c240ff4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/383-bcm63xx_select_pinctrl.patch @@ -0,0 +1,65 @@ +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -24,6 +24,8 @@ config BCM63XX_CPU_6318 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6318 + + config BCM63XX_CPU_6328 + bool "support 6328 CPU" +@@ -31,6 +33,8 @@ config BCM63XX_CPU_6328 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6328 + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -46,6 +50,8 @@ config BCM63XX_CPU_6348 + select SYS_HAS_CPU_BMIPS32_3300 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select PINCTRL ++ select PINCTRL_BCM6348 + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" +@@ -53,6 +59,8 @@ config BCM63XX_CPU_6358 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6358 + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" +@@ -60,6 +68,8 @@ config BCM63XX_CPU_6362 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6362 + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" +@@ -67,6 +77,8 @@ config BCM63XX_CPU_6368 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM6368 + + config BCM63XX_CPU_63268 + bool "support 63268 CPU" +@@ -74,6 +86,8 @@ config BCM63XX_CPU_63268 + select HW_HAS_PCI + select BCM63XX_OHCI + select BCM63XX_EHCI ++ select PINCTRL ++ select PINCTRL_BCM63268 + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-4.9/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch b/target/linux/brcm63xx/patches-4.9/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch new file mode 100644 index 000000000..051c8fb88 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/389-MIPS-BCM63XX-add-clkdev-lookups-for-device-tree.patch @@ -0,0 +1,105 @@ +From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 31 Jul 2017 20:10:36 +0200 +Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree + +--- + arch/mips/bcm63xx/clk.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -488,6 +488,8 @@ static struct clk_lookup bcm3368_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -504,7 +506,9 @@ static struct clk_lookup bcm6318_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -518,7 +522,10 @@ static struct clk_lookup bcm6328_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -531,6 +538,7 @@ static struct clk_lookup bcm6338_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -545,6 +553,7 @@ static struct clk_lookup bcm6345_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -559,6 +568,7 @@ static struct clk_lookup bcm6348_clks[] + /* fixed rate clocks */ + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -575,6 +585,8 @@ static struct clk_lookup bcm6358_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enet0", &clk_enet0), + CLKDEV_INIT(NULL, "enet1", &clk_enet1), +@@ -594,7 +606,10 @@ static struct clk_lookup bcm6362_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -610,6 +625,8 @@ static struct clk_lookup bcm6368_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), +@@ -624,7 +641,10 @@ static struct clk_lookup bcm63268_clks[] + CLKDEV_INIT(NULL, "periph", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph), ++ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph), ++ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph), + CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll), ++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll), + /* gated clocks */ + CLKDEV_INIT(NULL, "enetsw", &clk_enetsw), + CLKDEV_INIT(NULL, "usbh", &clk_usbh), diff --git a/target/linux/brcm63xx/patches-4.9/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch b/target/linux/brcm63xx/patches-4.9/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch new file mode 100644 index 000000000..084ef9ee8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/390-MIPS-BCM63XX-do-not-register-SPI-controllers.patch @@ -0,0 +1,170 @@ +From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 4 Feb 2017 12:58:50 +0100 +Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers + +We now register them through DT, so no need to keep them here. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 ------- + 1 file changed, 7 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -28,9 +28,7 @@ + #include + #include + #include +-#include + #include +-#include + #include + #include + #include +@@ -240,10 +238,6 @@ int __init board_register_devices(void) + bcm63xx_register_fallback_sprom(&board.fallback_sprom))) + pr_err(PFX "failed to register fallback SPROM\n"); + +- bcm63xx_spi_register(); +- +- bcm63xx_hsspi_register(); +- + bcm63xx_flash_register(); + + bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,6 +1,6 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ +- dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ ++ dev-pcmcia.o dev-rng.o dev-uart.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ + usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +--- a/arch/mips/bcm63xx/dev-hsspi.c ++++ /dev/null +@@ -1,48 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2012 Jonas Gorski +- */ +- +-#include +-#include +-#include +- +-#include +-#include +-#include +- +-static struct resource spi_resources[] = { +- { +- .start = -1, /* filled at runtime */ +- .end = -1, /* filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- .start = -1, /* filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device bcm63xx_hsspi_device = { +- .name = "bcm63xx-hsspi", +- .id = 0, +- .num_resources = ARRAY_SIZE(spi_resources), +- .resource = spi_resources, +-}; +- +-int __init bcm63xx_hsspi_register(void) +-{ +- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() && +- !BCMCPU_IS_63268()) +- return -ENODEV; +- +- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); +- spi_resources[0].end = spi_resources[0].start; +- spi_resources[0].end += RSET_HSSPI_SIZE - 1; +- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI); +- +- return platform_device_register(&bcm63xx_hsspi_device); +-} +--- a/arch/mips/bcm63xx/dev-spi.c ++++ /dev/null +@@ -1,60 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2009-2011 Florian Fainelli +- * Copyright (C) 2010 Tanguy Bouzeloc +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +- +-static struct resource spi_resources[] = { +- { +- .start = -1, /* filled at runtime */ +- .end = -1, /* filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- .start = -1, /* filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device bcm63xx_spi_device = { +- .id = -1, +- .num_resources = ARRAY_SIZE(spi_resources), +- .resource = spi_resources, +-}; +- +-int __init bcm63xx_spi_register(void) +-{ +- if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345()) +- return -ENODEV; +- +- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); +- spi_resources[0].end = spi_resources[0].start; +- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI); +- +- if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) { +- bcm63xx_spi_device.name = "bcm6348-spi", +- spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1; +- } +- +- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() || +- BCMCPU_IS_6368() || BCMCPU_IS_63268()) { +- bcm63xx_spi_device.name = "bcm6358-spi", +- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1; +- } +- +- return platform_device_register(&bcm63xx_spi_device); +-} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h ++++ /dev/null +@@ -1,8 +0,0 @@ +-#ifndef BCM63XX_DEV_HSSPI_H +-#define BCM63XX_DEV_HSSPI_H +- +-#include +- +-int bcm63xx_hsspi_register(void); +- +-#endif /* BCM63XX_DEV_HSSPI_H */ diff --git a/target/linux/brcm63xx/patches-4.9/391-MIPS-BCM63XX-do-not-register-uart.patch b/target/linux/brcm63xx/patches-4.9/391-MIPS-BCM63XX-do-not-register-uart.patch new file mode 100644 index 000000000..e033ea3a4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/391-MIPS-BCM63XX-do-not-register-uart.patch @@ -0,0 +1,257 @@ +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,6 +1,6 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ +- dev-pcmcia.o dev-rng.o dev-uart.o \ ++ dev-pcmcia.o dev-rng.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ + usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +--- a/arch/mips/bcm63xx/dev-uart.c ++++ /dev/null +@@ -1,76 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2008 Maxime Bizon +- */ +- +-#include +-#include +-#include +-#include +- +-static struct resource uart0_resources[] = { +- { +- /* start & end filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- /* start filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct resource uart1_resources[] = { +- { +- /* start & end filled at runtime */ +- .flags = IORESOURCE_MEM, +- }, +- { +- /* start filled at runtime */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device bcm63xx_uart_devices[] = { +- { +- .name = "bcm63xx_uart", +- .id = 0, +- .num_resources = ARRAY_SIZE(uart0_resources), +- .resource = uart0_resources, +- }, +- +- { +- .name = "bcm63xx_uart", +- .id = 1, +- .num_resources = ARRAY_SIZE(uart1_resources), +- .resource = uart1_resources, +- } +-}; +- +-int __init bcm63xx_uart_register(unsigned int id) +-{ +- if (id >= ARRAY_SIZE(bcm63xx_uart_devices)) +- return -ENODEV; +- +- if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() && +- !BCMCPU_IS_6368())) +- return -ENODEV; +- +- if (id == 0) { +- uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0); +- uart0_resources[0].end = uart0_resources[0].start + +- RSET_UART_SIZE - 1; +- uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); +- } +- +- if (id == 1) { +- uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1); +- uart1_resources[0].end = uart1_resources[0].start + +- RSET_UART_SIZE - 1; +- uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1); +- } +- +- return platform_device_register(&bcm63xx_uart_devices[id]); +-} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h ++++ /dev/null +@@ -1,6 +0,0 @@ +-#ifndef BCM63XX_DEV_UART_H_ +-#define BCM63XX_DEV_UART_H_ +- +-int bcm63xx_uart_register(unsigned int id); +- +-#endif /* BCM63XX_DEV_UART_H_ */ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -33,8 +33,6 @@ struct board_info { + unsigned int has_ehci0:1; + unsigned int has_usbd:1; + unsigned int has_dsp:1; +- unsigned int has_uart0:1; +- unsigned int has_uart1:1; + unsigned int use_fallback_sprom:1; + + /* ethernet config */ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -20,7 +20,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -189,12 +188,6 @@ int __init board_register_devices(void) + + bcm63xx_gpio_init(); + +- if (board.has_uart0) +- bcm63xx_uart_register(0); +- +- if (board.has_uart1) +- bcm63xx_uart_register(1); +- + if (board.has_pccard) + bcm63xx_pcmcia_register(); + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -35,9 +35,6 @@ static struct board_info __initdata boar + .name = "CVG834G_E15R3921", + .expected_cpu_id = 0x3368, + +- .has_uart0 = 1, +- .has_uart1 = 1, +- + .has_enet0 = 1, + .has_pci = 1, + +@@ -67,7 +64,6 @@ static struct board_info __initdata boar + .name = "96328avng", + .expected_cpu_id = 0x6328, + +- .has_uart0 = 1, + .has_pci = 1, + .has_usbd = 0, + .use_fallback_sprom = 1, +@@ -116,7 +112,6 @@ static struct board_info __initdata boar + .name = "96338GW", + .expected_cpu_id = 0x6338, + +- .has_uart0 = 1, + .has_enet0 = 1, + .enet0 = { + .force_speed_100 = 1, +@@ -159,7 +154,6 @@ static struct board_info __initdata boar + .name = "96338W", + .expected_cpu_id = 0x6338, + +- .has_uart0 = 1, + .has_enet0 = 1, + .enet0 = { + .force_speed_100 = 1, +@@ -204,8 +198,6 @@ static struct board_info __initdata boar + static struct board_info __initdata board_96345gw2 = { + .name = "96345GW2", + .expected_cpu_id = 0x6345, +- +- .has_uart0 = 1, + }; + #endif + +@@ -217,7 +209,6 @@ static struct board_info __initdata boar + .name = "96348R", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_pci = 1, + .use_fallback_sprom = 1, +@@ -262,7 +253,6 @@ static struct board_info __initdata boar + .name = "96348GW-10", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -323,7 +313,6 @@ static struct board_info __initdata boar + .name = "96348GW-11", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -378,7 +367,6 @@ static struct board_info __initdata boar + .name = "96348GW", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -437,7 +425,6 @@ static struct board_info __initdata boar + .name = "F@ST2404", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -482,7 +469,6 @@ static struct board_info __initdata boar + .name = "DV201AMR", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_pci = 1, + .use_fallback_sprom = 1, + .has_ohci0 = 1, +@@ -503,7 +489,6 @@ static struct board_info __initdata boar + .name = "96348GW-A", + .expected_cpu_id = 0x6348, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -530,7 +515,6 @@ static struct board_info __initdata boar + .name = "96358VW", + .expected_cpu_id = 0x6358, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -583,7 +567,6 @@ static struct board_info __initdata boar + .name = "96358VW2", + .expected_cpu_id = 0x6358, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, +@@ -633,7 +616,6 @@ static struct board_info __initdata boar + .name = "AGPF-S0", + .expected_cpu_id = 0x6358, + +- .has_uart0 = 1, + .has_enet0 = 1, + .has_enet1 = 1, + .has_pci = 1, diff --git a/target/linux/brcm63xx/patches-4.9/392-MIPS-BCM63XX-remove-leds-and-buttons.patch b/target/linux/brcm63xx/patches-4.9/392-MIPS-BCM63XX-remove-leds-and-buttons.patch new file mode 100644 index 000000000..1bbbf9144 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/392-MIPS-BCM63XX-remove-leds-and-buttons.patch @@ -0,0 +1,343 @@ +From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 22 Feb 2015 17:52:32 +0100 +Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 262 ----------------------------- + 1 file changed, 262 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -43,14 +43,6 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + +- .leds = { +- { +- .name = "CVG834G:green:power", +- .gpio = 37, +- .default_trigger= "default-on", +- }, +- }, +- + .ephy_reset_gpio = 36, + .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, + }; +@@ -72,35 +64,6 @@ static struct board_info __initdata boar + .use_fullspeed = 0, + .port_no = 0, + }, +- +- .leds = { +- { +- .name = "96328avng::ppp-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "96328avng::power", +- .gpio = 4, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "96328avng::power-fail", +- .gpio = 8, +- .active_low = 1, +- }, +- { +- .name = "96328avng::wps", +- .gpio = 9, +- .active_low = 1, +- }, +- { +- .name = "96328avng::ppp", +- .gpio = 11, +- .active_low = 1, +- }, +- }, + }; + #endif + +@@ -119,35 +82,6 @@ static struct board_info __initdata boar + }, + + .has_ohci0 = 1, +- +- .leds = { +- { +- .name = "adsl", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ses", +- .gpio = 5, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- } +- }, + }; + + static struct board_info __initdata board_96338w = { +@@ -159,35 +93,6 @@ static struct board_info __initdata boar + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +- +- .leds = { +- { +- .name = "adsl", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ses", +- .gpio = 5, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + #endif + +@@ -217,36 +122,6 @@ static struct board_info __initdata boar + .has_phy = 1, + .use_internal_phy = 1, + }, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_96348gw_10 = { +@@ -278,35 +153,6 @@ static struct board_info __initdata boar + .cs = 2, + .ext_irq = 2, + }, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_96348gw_11 = { +@@ -332,35 +178,6 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_pccard = 1, + .has_ehci0 = 1, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_96348gw = { +@@ -390,35 +207,6 @@ static struct board_info __initdata boar + .ext_irq = 2, + .cs = 2, + }, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 2, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 3, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 4, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 0, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 1, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_FAST2404 = { +@@ -534,33 +322,6 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_pccard = 1, + .has_ehci0 = 1, +- +- .leds = { +- { +- .name = "adsl-fail", +- .gpio = 15, +- .active_low = 1, +- }, +- { +- .name = "ppp", +- .gpio = 22, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 23, +- .active_low = 1, +- }, +- { +- .name = "power", +- .gpio = 4, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 5, +- }, +- }, + }; + + static struct board_info __initdata board_96358vw2 = { +@@ -587,29 +348,6 @@ static struct board_info __initdata boar + .has_pccard = 1, + .has_ehci0 = 1, + .num_usbh_ports = 2, +- +- .leds = { +- { +- .name = "adsl", +- .gpio = 22, +- .active_low = 1, +- }, +- { +- .name = "ppp-fail", +- .gpio = 23, +- }, +- { +- .name = "power", +- .gpio = 5, +- .active_low = 1, +- .default_trigger = "default-on", +- }, +- { +- .name = "stop", +- .gpio = 4, +- .active_low = 1, +- }, +- }, + }; + + static struct board_info __initdata board_AGPFS0 = { diff --git a/target/linux/brcm63xx/patches-4.9/400-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-4.9/400-bcm963xx_flashmap.patch new file mode 100644 index 000000000..c693ace36 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/400-bcm963xx_flashmap.patch @@ -0,0 +1,65 @@ +From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001 +From: Axel Gembe +Date: Mon, 12 May 2008 18:54:09 +0200 +Subject: [PATCH] bcm963xx: flashmap support + +Signed-off-by: Axel Gembe +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +---------------- + drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++---- + drivers/mtd/redboot.c | 13 +++++++++-- + 3 files changed, 38 insertions(+), 26 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio + } + }; + +-static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL }; ++static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL }; + + static struct physmap_flash_data flash_data = { + .width = 2, +--- a/drivers/mtd/redboot.c ++++ b/drivers/mtd/redboot.c +@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru + int nulllen = 0; + int numslots; + unsigned long offset; ++ unsigned long fis_origin = 0; + #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED + static char nullstring[] = "unallocated"; + #endif +@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru + goto out; + } + ++ if (data && data->origin) { ++ fis_origin = data->origin; ++ } else { ++ for (i = 0; i < numslots; i++) { ++ if (!strncmp(buf[i].name, "RedBoot", 8)) { ++ fis_origin = (buf[i].flash_base & (master->size << 1) - 1); ++ } ++ } ++ } ++ + for (i = 0; i < numslots; i++) { + struct fis_list *new_fl, **prev; + +@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru + goto out; + } + new_fl->img = &buf[i]; +- if (data && data->origin) +- buf[i].flash_base -= data->origin; +- else +- buf[i].flash_base &= master->size-1; ++ if (fis_origin) ++ buf[i].flash_base -= fis_origin; ++ ++ buf[i].flash_base &= (master->size << 1) - 1; + + /* I'm sure the JFFS2 code has done me permanent damage. + * I now think the following is _normal_ diff --git a/target/linux/brcm63xx/patches-4.9/401-bcm963xx_real_rootfs_length.patch b/target/linux/brcm63xx/patches-4.9/401-bcm963xx_real_rootfs_length.patch new file mode 100644 index 000000000..2ac6160f2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/401-bcm963xx_real_rootfs_length.patch @@ -0,0 +1,27 @@ +--- a/include/linux/bcm963xx_tag.h ++++ b/include/linux/bcm963xx_tag.h +@@ -91,8 +91,10 @@ struct bcm_tag { + __u32 rootfs_crc; + /* 224-227: CRC32 of kernel partition */ + __u32 kernel_crc; +- /* 228-235: Unused at present */ +- char reserved1[8]; ++ /* 228-231: Unused at present */ ++ char reserved1[4]; ++ /* 222-235: Openwrt: real rootfs length */ ++ __u32 real_rootfs_length; + /* 236-239: CRC32 of header excluding last 20 bytes */ + __u32 header_crc; + /* 240-255: Unused at present */ +--- a/drivers/mtd/parsers/parser_imagetag.c ++++ b/drivers/mtd/parsers/parser_imagetag.c +@@ -137,7 +137,8 @@ static int bcm963xx_parse_imagetag_parti + } else { + /* OpenWrt layout */ + rootfsaddr = kerneladdr + kernellen; +- rootfslen = spareaddr - rootfsaddr; ++ rootfslen = buf->real_rootfs_length; ++ spareaddr = rootfsaddr + rootfslen; + } + } else { + goto out; diff --git a/target/linux/brcm63xx/patches-4.9/402_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/brcm63xx/patches-4.9/402_bcm63xx_enet_vlan_incoming_fixed.patch new file mode 100644 index 000000000..650ad11c7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/402_bcm63xx_enet_vlan_incoming_fixed.patch @@ -0,0 +1,11 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -1635,7 +1635,7 @@ static int compute_hw_mtu(struct bcm_ene + actual_mtu = mtu; + + /* add ethernet header + vlan tag size */ +- actual_mtu += VLAN_ETH_HLEN; ++ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN; + + if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU) + return -EINVAL; diff --git a/target/linux/brcm63xx/patches-4.9/403-6358-enet1-external-mii-clk.patch b/target/linux/brcm63xx/patches-4.9/403-6358-enet1-external-mii-clk.patch new file mode 100644 index 000000000..9227eb28a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/403-6358-enet1-external-mii-clk.patch @@ -0,0 +1,22 @@ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -98,6 +98,8 @@ void __init board_early_setup(const stru + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G3_EXT_MII | + GPIO_MODE_6348_G0_EXT_MII; ++ else if (BCMCPU_IS_6358()) ++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV; + } + + bcm_gpio_writel(val, GPIO_MODE_REG); +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -651,6 +651,8 @@ + #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7) + #define GPIO_MODE_6358_SERIAL_LED (1 << 10) + #define GPIO_MODE_6358_UTOPIA (1 << 12) ++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30) ++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31) + + #define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0) + #define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1) diff --git a/target/linux/brcm63xx/patches-4.9/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch b/target/linux/brcm63xx/patches-4.9/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch new file mode 100644 index 000000000..d0bd9218d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/404-NET-bcm63xx_enet-move-phy_-dis-connect-into-probe-re.patch @@ -0,0 +1,263 @@ +From 7fa63fdde703aaabaa7199ae879219737a98a3f3 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 6 Jan 2012 12:24:18 +0100 +Subject: [PATCH] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove + +Only connect/disconnect the phy during probe and remove, not during any +open/close. The phy seldom changes during the runtime, and disconnecting +the phy during close will prevent it from keeping any configuration over +a down/up cycle. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 158 +++++++++++++-------------- + 1 file changed, 78 insertions(+), 80 deletions(-) + +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -870,10 +870,8 @@ static int bcm_enet_open(struct net_devi + struct bcm_enet_priv *priv; + struct sockaddr addr; + struct device *kdev; +- struct phy_device *phydev; + int i, ret; + unsigned int size; +- char phy_id[MII_BUS_ID_SIZE + 3]; + void *p; + u32 val; + +@@ -881,40 +879,10 @@ static int bcm_enet_open(struct net_devi + kdev = &priv->pdev->dev; + + if (priv->has_phy) { +- /* connect to PHY */ +- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, +- priv->mii_bus->id, priv->phy_id); +- +- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link, +- PHY_INTERFACE_MODE_MII); +- +- if (IS_ERR(phydev)) { +- dev_err(kdev, "could not attach to PHY\n"); +- return PTR_ERR(phydev); +- } +- +- /* mask with MAC supported features */ +- phydev->supported &= (SUPPORTED_10baseT_Half | +- SUPPORTED_10baseT_Full | +- SUPPORTED_100baseT_Half | +- SUPPORTED_100baseT_Full | +- SUPPORTED_Autoneg | +- SUPPORTED_Pause | +- SUPPORTED_MII); +- phydev->advertising = phydev->supported; +- +- if (priv->pause_auto && priv->pause_rx && priv->pause_tx) +- phydev->advertising |= SUPPORTED_Pause; +- else +- phydev->advertising &= ~SUPPORTED_Pause; +- +- phy_attached_info(phydev); +- ++ /* Reset state */ + priv->old_link = 0; + priv->old_duplex = -1; + priv->old_pause = -1; +- } else { +- phydev = NULL; + } + + /* mask all interrupts and request them */ +@@ -924,7 +892,7 @@ static int bcm_enet_open(struct net_devi + + ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev); + if (ret) +- goto out_phy_disconnect; ++ return ret; + + ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0, + dev->name, dev); +@@ -1086,8 +1054,8 @@ static int bcm_enet_open(struct net_devi + enet_dmac_writel(priv, priv->dma_chan_int_mask, + ENETDMAC_IRMASK, priv->tx_chan); + +- if (phydev) +- phy_start(phydev); ++ if (priv->has_phy) ++ phy_start(dev->phydev); + else + bcm_enet_adjust_link(dev); + +@@ -1128,10 +1096,6 @@ out_freeirq_rx: + out_freeirq: + free_irq(dev->irq, dev); + +-out_phy_disconnect: +- if (phydev) +- phy_disconnect(phydev); +- + return ret; + } + +@@ -1236,10 +1200,6 @@ static int bcm_enet_stop(struct net_devi + free_irq(priv->irq_rx, dev); + free_irq(dev->irq, dev); + +- /* release phy */ +- if (priv->has_phy) +- phy_disconnect(dev->phydev); +- + return 0; + } + +@@ -1821,14 +1781,46 @@ static int bcm_enet_probe(struct platfor + + /* do minimal hardware init to be able to probe mii bus */ + bcm_enet_hw_preinit(priv); ++ spin_lock_init(&priv->rx_lock); ++ ++ /* init rx timeout (used for oom) */ ++ init_timer(&priv->rx_timeout); ++ priv->rx_timeout.function = bcm_enet_refill_rx_timer; ++ priv->rx_timeout.data = (unsigned long)dev; ++ ++ /* init the mib update lock&work */ ++ mutex_init(&priv->mib_update_lock); ++ INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer); ++ ++ /* zero mib counters */ ++ for (i = 0; i < ENET_MIB_REG_COUNT; i++) ++ enet_writel(priv, 0, ENET_MIB_REG(i)); ++ ++ /* register netdevice */ ++ dev->netdev_ops = &bcm_enet_ops; ++ netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); ++ ++ dev->ethtool_ops = &bcm_enet_ethtool_ops; ++ SET_NETDEV_DEV(dev, &pdev->dev); ++ ++ ret = register_netdev(dev); ++ if (ret) ++ goto out_uninit_hw; ++ ++ netif_carrier_off(dev); ++ platform_set_drvdata(pdev, dev); ++ priv->pdev = pdev; ++ priv->net_dev = dev; + + /* MII bus registration */ + if (priv->has_phy) { ++ struct phy_device *phydev; ++ char phy_id[MII_BUS_ID_SIZE + 3]; + + priv->mii_bus = mdiobus_alloc(); + if (!priv->mii_bus) { + ret = -ENOMEM; +- goto out_uninit_hw; ++ goto out_unregister_netdev; + } + + bus = priv->mii_bus; +@@ -1852,6 +1844,35 @@ static int bcm_enet_probe(struct platfor + dev_err(&pdev->dev, "unable to register mdio bus\n"); + goto out_free_mdio; + } ++ ++ /* connect to PHY */ ++ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, ++ priv->mii_bus->id, priv->phy_id); ++ ++ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link, ++ PHY_INTERFACE_MODE_MII); ++ ++ if (IS_ERR(phydev)) { ++ dev_err(&pdev->dev, "could not attach to PHY\n"); ++ goto out_unregister_mdio; ++ } ++ ++ /* mask with MAC supported features */ ++ phydev->supported &= (SUPPORTED_10baseT_Half | ++ SUPPORTED_10baseT_Full | ++ SUPPORTED_100baseT_Half | ++ SUPPORTED_100baseT_Full | ++ SUPPORTED_Autoneg | ++ SUPPORTED_Pause | ++ SUPPORTED_MII); ++ phydev->advertising = phydev->supported; ++ ++ if (priv->pause_auto && priv->pause_rx && priv->pause_tx) ++ phydev->advertising |= SUPPORTED_Pause; ++ else ++ phydev->advertising &= ~SUPPORTED_Pause; ++ ++ phy_attached_info(phydev); + } else { + + /* run platform code to initialize PHY device */ +@@ -1859,44 +1880,16 @@ static int bcm_enet_probe(struct platfor + pd->mii_config(dev, 1, bcm_enet_mdio_read_mii, + bcm_enet_mdio_write_mii)) { + dev_err(&pdev->dev, "unable to configure mdio bus\n"); +- goto out_uninit_hw; ++ goto out_unregister_netdev; + } + } + +- spin_lock_init(&priv->rx_lock); +- +- /* init rx timeout (used for oom) */ +- init_timer(&priv->rx_timeout); +- priv->rx_timeout.function = bcm_enet_refill_rx_timer; +- priv->rx_timeout.data = (unsigned long)dev; +- +- /* init the mib update lock&work */ +- mutex_init(&priv->mib_update_lock); +- INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer); +- +- /* zero mib counters */ +- for (i = 0; i < ENET_MIB_REG_COUNT; i++) +- enet_writel(priv, 0, ENET_MIB_REG(i)); +- +- /* register netdevice */ +- dev->netdev_ops = &bcm_enet_ops; +- netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); +- +- dev->ethtool_ops = &bcm_enet_ethtool_ops; +- SET_NETDEV_DEV(dev, &pdev->dev); +- +- ret = register_netdev(dev); +- if (ret) +- goto out_unregister_mdio; +- +- netif_carrier_off(dev); +- platform_set_drvdata(pdev, dev); +- priv->pdev = pdev; +- priv->net_dev = dev; +- + return 0; + + out_unregister_mdio: ++ if (dev->phydev) ++ phy_disconnect(dev->phydev); ++ + if (priv->mii_bus) + mdiobus_unregister(priv->mii_bus); + +@@ -1904,6 +1897,9 @@ out_free_mdio: + if (priv->mii_bus) + mdiobus_free(priv->mii_bus); + ++out_unregister_netdev: ++ unregister_netdev(dev); ++ + out_uninit_hw: + /* turn off mdc clock */ + enet_writel(priv, 0, ENET_MIISC_REG); +@@ -1934,6 +1930,7 @@ static int bcm_enet_remove(struct platfo + enet_writel(priv, 0, ENET_MIISC_REG); + + if (priv->has_phy) { ++ phy_disconnect(dev->phydev); + mdiobus_unregister(priv->mii_bus); + mdiobus_free(priv->mii_bus); + } else { diff --git a/target/linux/brcm63xx/patches-4.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-4.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch new file mode 100644 index 000000000..bfa1ad0a2 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch @@ -0,0 +1,53 @@ +From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 15 Jul 2012 20:08:57 +0200 +Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports + +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++ + drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++ + 2 files changed, 25 insertions(+), 0 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -967,6 +967,19 @@ + #define ENETSW_PORTOV_FDX_MASK (1 << 1) + #define ENETSW_PORTOV_LINKUP_MASK (1 << 0) + ++/* Port RGMII control register */ ++#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x)) ++#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7) ++#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6) ++#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4) ++#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4) ++#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4) ++#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4) ++#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0) ++ ++/* Port RGMII timing register */ ++#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x)) ++ + /* MDIO control register */ + #define ENETSW_MDIOC_REG (0xb0) + #define ENETSW_MDIOC_EXT_MASK (1 << 16) +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -2205,6 +2205,18 @@ static int bcm_enetsw_open(struct net_de + priv->sw_port_link[i] = 0; + } + ++ /* enable external ports */ ++ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) { ++ u8 rgmii_ctrl; ++ ++ if (!priv->used_ports[i].used) ++ continue; ++ ++ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); ++ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; ++ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); ++ } ++ + /* reset mib */ + val = enetsw_readb(priv, ENETSW_GMCR_REG); + val |= ENETSW_GMCR_RST_MIB_MASK; diff --git a/target/linux/brcm63xx/patches-4.9/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-4.9/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch new file mode 100644 index 000000000..608ad8e39 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -0,0 +1,157 @@ +From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 3 Jul 2011 15:00:38 +0200 +Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 + + 2 files changed, 33 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -17,6 +17,9 @@ + #include + #include + #include ++#include ++#include ++#include + + #include + #include +@@ -66,6 +69,41 @@ void __init bcm63xx_flash_force_phys_bas + mtd_resources[0].end = end; + } + ++static struct spi_board_info bcm63xx_spi_flash_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .mode = 0, ++ .max_speed_hz = 781000, ++ .modalias = "m25p80", ++ }, ++}; ++ ++static void bcm63xx_of_update_spi_flash_speed(struct device_node *np, ++ unsigned int new_hz) ++{ ++ struct property *max_hz; ++ __be32 *hz; ++ ++ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL); ++ if (!max_hz) ++ return; ++ ++ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL); ++ if (!max_hz->name) { ++ kfree(max_hz); ++ return; ++ } ++ ++ max_hz->value = max_hz + 1; ++ max_hz->length = sizeof(*hz); ++ ++ hz = max_hz->value; ++ *hz = cpu_to_be32(new_hz); ++ ++ of_update_property(np, max_hz); ++} ++ + static int __init bcm63xx_detect_flash_type(void) + { + u32 val; +@@ -73,9 +111,15 @@ static int __init bcm63xx_detect_flash_t + switch (bcm63xx_get_cpu_id()) { + case BCM6318_CPU_ID: + /* only support serial flash */ ++ bcm63xx_spi_flash_info[0].max_speed_hz = 62500000; + return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6328_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_6328_REG); ++ if (val & STRAPBUS_6328_HSSPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 33333334; ++ else ++ bcm63xx_spi_flash_info[0].max_speed_hz = 16666667; ++ + if (val & STRAPBUS_6328_BOOT_SEL_SERIAL) + return BCM63XX_FLASH_TYPE_SERIAL; + else +@@ -94,12 +138,20 @@ static int __init bcm63xx_detect_flash_t + return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6362_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_6362_REG); ++ if (val & STRAPBUS_6362_HSSPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000; ++ else ++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000; ++ + if (val & STRAPBUS_6362_BOOT_SEL_SERIAL) + return BCM63XX_FLASH_TYPE_SERIAL; + else + return BCM63XX_FLASH_TYPE_NAND; + case BCM6368_CPU_ID: + val = bcm_gpio_readl(GPIO_STRAPBUS_REG); ++ if (val & STRAPBUS_6368_SPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000; ++ + switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { + case STRAPBUS_6368_BOOT_SEL_NAND: + return BCM63XX_FLASH_TYPE_NAND; +@@ -110,6 +162,11 @@ static int __init bcm63xx_detect_flash_t + } + case BCM63268_CPU_ID: + val = bcm_misc_readl(MISC_STRAPBUS_63268_REG); ++ if (val & STRAPBUS_63268_HSSPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000; ++ else ++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000; ++ + if (val & STRAPBUS_63268_BOOT_SEL_SERIAL) + return BCM63XX_FLASH_TYPE_SERIAL; + else +@@ -176,6 +233,7 @@ void __init bcm63xx_flash_detect(void) + + int __init bcm63xx_flash_register(void) + { ++ struct device_node *np; + u32 val; + + switch (flash_type) { +@@ -195,8 +253,14 @@ int __init bcm63xx_flash_register(void) + + return platform_device_register(&mtd_dev); + case BCM63XX_FLASH_TYPE_SERIAL: +- pr_warn("unsupported serial flash detected\n"); +- return -ENODEV; ++ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor"); ++ if (np) { ++ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz); ++ of_node_put(np); ++ return 0; ++ } else { ++ return -ENODEV; ++ } + case BCM63XX_FLASH_TYPE_NAND: + pr_warn("unsupported NAND flash detected\n"); + return -ENODEV; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -708,6 +708,7 @@ + #define GPIO_STRAPBUS_REG 0x40 + #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1) + #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1) ++#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6) + #define STRAPBUS_6368_BOOT_SEL_MASK 0x3 + #define STRAPBUS_6368_BOOT_SEL_NAND 0 + #define STRAPBUS_6368_BOOT_SEL_SERIAL 1 +@@ -1564,6 +1565,7 @@ + #define IDDQ_CTRL_63268_USBH (1 << 4) + + #define MISC_STRAPBUS_6328_REG 0x240 ++#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4) + #define STRAPBUS_6328_FCVO_SHIFT 7 + #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT) + #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28) diff --git a/target/linux/brcm63xx/patches-4.9/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch b/target/linux/brcm63xx/patches-4.9/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch new file mode 100644 index 000000000..a0ad6e6ce --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch @@ -0,0 +1,72 @@ +From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 3 May 2012 14:40:03 +0200 +Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 9 ++++++++- + arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 10 ++++++++++ + 2 files changed, 18 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + + #include "board_common.h" + +@@ -178,6 +179,7 @@ static struct of_device_id of_ids[] = { + int __init board_register_devices(void) + { + int usbh_ports = 0; ++ int i; + + #if CONFIG_OF + if (of_have_populated_dt()) { +@@ -245,6 +247,10 @@ int __init board_register_devices(void) + board.ephy_reset_gpio_flags); + } + ++ /* register any fixups */ ++ for (i = 0; i < board.has_caldata; i++) ++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset); ++ + return 0; + } + +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + /* + * flash mapping +@@ -16,6 +17,11 @@ + #define BCM963XX_CFE_VERSION_OFFSET 0x570 + #define BCM963XX_NVRAM_OFFSET 0x580 + ++struct ath9k_caldata { ++ unsigned int slot; ++ u32 caldata_offset; ++}; ++ + /* + * board definition + */ +@@ -34,6 +40,10 @@ struct board_info { + unsigned int has_usbd:1; + unsigned int has_dsp:1; + unsigned int use_fallback_sprom:1; ++ unsigned int has_caldata:2; ++ ++ /* wifi calibration data config */ ++ struct ath9k_caldata caldata[2]; + + /* ethernet config */ + struct bcm63xx_enet_platform_data enet0; diff --git a/target/linux/brcm63xx/patches-4.9/415-MIPS-BCM63XX-export-the-attached-flash-type.patch b/target/linux/brcm63xx/patches-4.9/415-MIPS-BCM63XX-export-the-attached-flash-type.patch new file mode 100644 index 000000000..94c63c5e8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/415-MIPS-BCM63XX-export-the-attached-flash-type.patch @@ -0,0 +1,31 @@ +From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 13 Jan 2014 12:12:30 +0100 +Subject: [PATCH] MIPS: BCM63XX: export the attached flash type + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 5 +++++ + arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++ + 2 files changed, 7 insertions(+) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -270,3 +270,8 @@ int __init bcm63xx_flash_register(void) + return -ENODEV; + } + } ++ ++int bcm63xx_flash_get_type(void) ++{ ++ return flash_type; ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h +@@ -13,4 +13,6 @@ void bcm63xx_flash_force_phys_base_addre + + int __init bcm63xx_flash_register(void); + ++int bcm63xx_flash_get_type(void); ++ + #endif /* __BCM63XX_FLASH_H */ diff --git a/target/linux/brcm63xx/patches-4.9/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch b/target/linux/brcm63xx/patches-4.9/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch new file mode 100644 index 000000000..0f6706a6b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch @@ -0,0 +1,237 @@ +From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 3 May 2012 14:36:11 +0200 +Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices + +--- + arch/mips/bcm63xx/Makefile | 3 +- + arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 + + 3 files changed, 199 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ +- usb-common.o sprom.o ++ pci-ath9k-fixup.o usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c +@@ -0,0 +1,200 @@ ++/* ++ * Broadcom BCM63XX Ath9k EEPROM fixup helper. ++ * ++ * Copytight (C) 2012 Jonas Gorski ++ * ++ * Based on ++ * ++ * Atheros AP94 reference board PCI initialization ++ * ++ * Copyright (C) 2009-2010 Gabor Juhos ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o)) ++ ++struct ath9k_fixup { ++ unsigned slot; ++ u8 mac[ETH_ALEN]; ++ struct ath9k_platform_data pdata; ++}; ++ ++static int ath9k_num_fixups; ++static struct ath9k_fixup ath9k_fixups[2] = { ++ { ++ .slot = 255, ++ .pdata = { ++ .led_pin = -1, ++ }, ++ }, ++ { ++ .slot = 255, ++ .pdata = { ++ .led_pin = -1, ++ }, ++ }, ++}; ++ ++static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset) ++{ ++ u32 addr; ++ ++ if (BCMCPU_IS_6328()) { ++ addr = 0x18000000; ++ } else { ++ addr = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ addr &= MPI_CSBASE_BASE_MASK; ++ } ++ ++ switch (bcm63xx_flash_get_type()) { ++ case BCM63XX_FLASH_TYPE_PARALLEL: ++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16)); ++ return eeprom; ++ case BCM63XX_FLASH_TYPE_SERIAL: ++ /* the first megabyte is memory mapped */ ++ if (offset < 0x100000) { ++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16)); ++ return eeprom; ++ } ++ ++ if (BCMCPU_IS_6328()) { ++ /* we can change the memory mapped megabyte */ ++ bcm_hsspi_writel(offset & 0xf00000, 0x18); ++ memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16)); ++ bcm_hsspi_writel(0, 0x18); ++ return eeprom; ++ } ++ /* can't do anything here without talking to the SPI controller. */ ++ case BCM63XX_FLASH_TYPE_NAND: ++ default: ++ return NULL; ++ } ++} ++ ++static void ath9k_pci_fixup(struct pci_dev *dev) ++{ ++ void __iomem *mem; ++ struct ath9k_platform_data *pdata = NULL; ++ struct pci_dev *bridge = pci_upstream_bridge(dev); ++ u16 *cal_data = NULL; ++ u16 cmd; ++ u32 bar0; ++ u32 val; ++ unsigned i; ++ ++ for (i = 0; i < ath9k_num_fixups; i++) { ++ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) ++ continue; ++ ++ cal_data = ath9k_fixups[i].pdata.eeprom_data; ++ pdata = &ath9k_fixups[i].pdata; ++ break; ++ } ++ ++ if (cal_data == NULL) ++ return; ++ ++ if (*cal_data != 0xa55a) { ++ pr_err("pci %s: invalid calibration data\n", pci_name(dev)); ++ return; ++ } ++ ++ pr_info("pci %s: fixup device configuration\n", pci_name(dev)); ++ ++ switch (bcm63xx_get_cpu_id()) { ++ case BCM6328_CPU_ID: ++ val = BCM_PCIE_MEM_BASE_PA_6328; ++ break; ++ case BCM6348_CPU_ID: ++ case BCM6358_CPU_ID: ++ case BCM6368_CPU_ID: ++ val = BCM_PCI_MEM_BASE_PA; ++ break; ++ default: ++ BUG(); ++ } ++ ++ mem = ioremap(val, 0x10000); ++ if (!mem) { ++ pr_err("pci %s: ioremap error\n", pci_name(dev)); ++ return; ++ } ++ ++ if (bridge) ++ pci_enable_device(bridge); ++ ++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); ++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val); ++ ++ pci_read_config_word(dev, PCI_COMMAND, &cmd); ++ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; ++ pci_write_config_word(dev, PCI_COMMAND, cmd); ++ ++ /* set offset to first reg address */ ++ cal_data += 3; ++ while(*cal_data != 0xffff) { ++ u32 reg; ++ reg = *cal_data++; ++ val = *cal_data++; ++ val |= (*cal_data++) << 16; ++ ++ writel(val, mem + reg); ++ udelay(100); ++ } ++ ++ pci_read_config_dword(dev, PCI_VENDOR_ID, &val); ++ dev->vendor = val & 0xffff; ++ dev->device = (val >> 16) & 0xffff; ++ ++ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); ++ dev->revision = val & 0xff; ++ dev->class = val >> 8; /* upper 3 bytes */ ++ ++ pci_read_config_word(dev, PCI_COMMAND, &cmd); ++ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); ++ pci_write_config_word(dev, PCI_COMMAND, cmd); ++ ++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); ++ ++ if (bridge) ++ pci_disable_device(bridge); ++ ++ iounmap(mem); ++ ++ dev->dev.platform_data = pdata; ++} ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); ++ ++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset) ++{ ++ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) ++ return; ++ ++ ath9k_fixups[ath9k_num_fixups].slot = slot; ++ ++ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) ++ return; ++ ++ if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac)) ++ return; ++ ++ ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac; ++ ath9k_num_fixups++; ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h +@@ -0,0 +1,7 @@ ++#ifndef _PCI_ATH9K_FIXUP ++#define _PCI_ATH9K_FIXUP ++ ++ ++void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init; ++ ++#endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/brcm63xx/patches-4.9/420-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-4.9/420-BCM63XX-add-endian-check-for-ath9k.patch new file mode 100644 index 000000000..8921f2d9b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/420-BCM63XX-add-endian-check-for-ath9k.patch @@ -0,0 +1,51 @@ +--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h +@@ -2,6 +2,7 @@ + #define _PCI_ATH9K_FIXUP + + +-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init; ++void pci_enable_ath9k_fixup(unsigned slot, u32 offset, ++ unsigned endian_check) __init; + + #endif /* _PCI_ATH9K_FIXUP */ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -20,6 +20,7 @@ + struct ath9k_caldata { + unsigned int slot; + u32 caldata_offset; ++ unsigned int endian_check:1; + }; + + /* +--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c ++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c +@@ -182,12 +182,14 @@ static void ath9k_pci_fixup(struct pci_d + } + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); + +-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset) ++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, ++ unsigned endian_check) + { + if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) + return; + + ath9k_fixups[ath9k_num_fixups].slot = slot; ++ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; + + if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) + return; +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -249,7 +249,8 @@ int __init board_register_devices(void) + + /* register any fixups */ + for (i = 0; i < board.has_caldata; i++) +- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset); ++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, ++ board.caldata[i].endian_check); + + return 0; + } diff --git a/target/linux/brcm63xx/patches-4.9/421-BCM63XX-add-led-pin-for-ath9k.patch b/target/linux/brcm63xx/patches-4.9/421-BCM63XX-add-led-pin-for-ath9k.patch new file mode 100644 index 000000000..3ccf6dcdf --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/421-BCM63XX-add-led-pin-for-ath9k.patch @@ -0,0 +1,51 @@ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -250,7 +250,7 @@ int __init board_register_devices(void) + /* register any fixups */ + for (i = 0; i < board.has_caldata; i++) + pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, +- board.caldata[i].endian_check); ++ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high); + + return 0; + } +--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c ++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c +@@ -183,13 +183,15 @@ static void ath9k_pci_fixup(struct pci_d + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); + + void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, +- unsigned endian_check) ++ unsigned endian_check, int led_pin, bool led_active_high) + { + if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) + return; + + ath9k_fixups[ath9k_num_fixups].slot = slot; + ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check; ++ ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin; ++ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high; + + if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset)) + return; +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -21,6 +21,8 @@ struct ath9k_caldata { + unsigned int slot; + u32 caldata_offset; + unsigned int endian_check:1; ++ int led_pin; ++ bool led_active_high; + }; + + /* +--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h +@@ -3,6 +3,6 @@ + + + void pci_enable_ath9k_fixup(unsigned slot, u32 offset, +- unsigned endian_check) __init; ++ unsigned endian_check, int led_pin, bool led_active_high) __init; + + #endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/brcm63xx/patches-4.9/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch b/target/linux/brcm63xx/patches-4.9/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch new file mode 100644 index 000000000..d021b3690 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch @@ -0,0 +1,185 @@ +From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 7 Jan 2013 17:45:39 +0100 +Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices + +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++- + arch/mips/bcm63xx/dev-flash.c | 2 +- + arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +- + .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++- + .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++ + 7 files changed, 104 insertions(+), 8 deletions(-) + create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o \ + dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ +- pci-ath9k-fixup.o usb-common.o sprom.o ++ pci-ath9k-fixup.o pci-rt2x00-fixup.o usb-common.o sprom.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -33,6 +33,7 @@ + #include + #include + #include ++#include + + #include "board_common.h" + +@@ -248,9 +249,19 @@ int __init board_register_devices(void) + } + + /* register any fixups */ +- for (i = 0; i < board.has_caldata; i++) +- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, +- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high); ++ for (i = 0; i < board.has_caldata; i++) { ++ switch (board.caldata[i].vendor) { ++ case PCI_VENDOR_ID_ATHEROS: ++ pci_enable_ath9k_fixup(board.caldata[i].slot, ++ board.caldata[i].caldata_offset, board.caldata[i].endian_check, ++ board.caldata[i].led_pin, board.caldata[i].led_active_high); ++ break; ++ case PCI_VENDOR_ID_RALINK: ++ pci_enable_rt2x00_fixup(board.caldata[i].slot, ++ board.caldata[i].eeprom); ++ break; ++ } ++ } + + return 0; + } +--- /dev/null ++++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c +@@ -0,0 +1,72 @@ ++/* ++ * Broadcom BCM63XX RT2x00 EEPROM fixup helper. ++ * ++ * Copyright (C) 2012 Álvaro Fernández Rojas ++ * ++ * Based on ++ * ++ * Broadcom BCM63XX Ath9k EEPROM fixup helper. ++ * ++ * Copyright (C) 2012 Jonas Gorski ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct rt2x00_fixup { ++ unsigned slot; ++ u8 mac[ETH_ALEN]; ++ struct rt2x00_platform_data pdata; ++}; ++ ++static int rt2x00_num_fixups; ++static struct rt2x00_fixup rt2x00_fixups[2] = { ++ { ++ .slot = 255, ++ }, ++ { ++ .slot = 255, ++ }, ++}; ++ ++static void rt2x00_pci_fixup(struct pci_dev *dev) ++{ ++ unsigned i; ++ struct rt2x00_platform_data *pdata = NULL; ++ ++ for (i = 0; i < rt2x00_num_fixups; i++) { ++ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn)) ++ continue; ++ ++ pdata = &rt2x00_fixups[i].pdata; ++ break; ++ } ++ ++ dev->dev.platform_data = pdata; ++} ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup); ++ ++void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) ++{ ++ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups)) ++ return; ++ ++ rt2x00_fixups[rt2x00_num_fixups].slot = slot; ++ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL); ++ ++ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac)) ++ return; ++ ++ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac; ++ rt2x00_num_fixups++; ++} ++ +--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h ++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + + /* + * flash mapping +@@ -17,12 +18,16 @@ + #define BCM963XX_CFE_VERSION_OFFSET 0x570 + #define BCM963XX_NVRAM_OFFSET 0x580 + +-struct ath9k_caldata { ++struct bcm63xx_caldata { ++ unsigned int vendor; + unsigned int slot; + u32 caldata_offset; ++ /* Atheros */ + unsigned int endian_check:1; + int led_pin; + bool led_active_high; ++ /* Ralink */ ++ char* eeprom; + }; + + /* +@@ -46,7 +51,7 @@ struct board_info { + unsigned int has_caldata:2; + + /* wifi calibration data config */ +- struct ath9k_caldata caldata[2]; ++ struct bcm63xx_caldata caldata[2]; + + /* ethernet config */ + struct bcm63xx_enet_platform_data enet0; +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h +@@ -0,0 +1,9 @@ ++#ifndef _PCI_RT2X00_FIXUP ++#define _PCI_RT2X00_FIXUP ++ ++#define PCI_VENDOR_ID_RALINK 0x1814 ++ ++void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init; ++ ++#endif /* _PCI_RT2X00_FIXUP */ ++ diff --git a/target/linux/brcm63xx/patches-4.9/423-bcm63xx_enet_add_b53_support.patch b/target/linux/brcm63xx/patches-4.9/423-bcm63xx_enet_add_b53_support.patch new file mode 100644 index 000000000..eb7b9fff3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/423-bcm63xx_enet_add_b53_support.patch @@ -0,0 +1,169 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h +@@ -331,6 +331,9 @@ struct bcm_enet_priv { + struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT]; + int sw_port_link[ENETSW_MAX_PORT]; + ++ /* platform device for associated switch */ ++ struct platform_device *b53_device; ++ + /* used to poll switch port state */ + struct timer_list swphy_poll; + spinlock_t enetsw_mdio_lock; +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + + #include + #include "bcm63xx_enet.h" +@@ -1950,7 +1951,8 @@ static int bcm_enet_remove(struct platfo + return 0; + } + +-struct platform_driver bcm63xx_enet_driver = { ++ ++static struct platform_driver bcm63xx_enet_driver = { + .probe = bcm_enet_probe, + .remove = bcm_enet_remove, + .driver = { +@@ -1959,6 +1961,42 @@ struct platform_driver bcm63xx_enet_driv + }, + }; + ++struct b53_platform_data bcm63xx_b53_pdata = { ++ .chip_id = 0x6300, ++ .big_endian = 1, ++}; ++ ++struct platform_device bcm63xx_b53_dev = { ++ .name = "b53-switch", ++ .id = -1, ++ .dev = { ++ .platform_data = &bcm63xx_b53_pdata, ++ }, ++}; ++ ++static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask) ++{ ++ int ret; ++ ++ bcm63xx_b53_pdata.regs = priv->base; ++ bcm63xx_b53_pdata.enabled_ports = port_mask; ++ bcm63xx_b53_pdata.alias = priv->net_dev->name; ++ ++ ret = platform_device_register(&bcm63xx_b53_dev); ++ if (!ret) ++ priv->b53_device = &bcm63xx_b53_dev; ++ ++ return ret; ++} ++ ++static void bcmenet_switch_unregister(struct bcm_enet_priv *priv) ++{ ++ if (priv->b53_device) ++ platform_device_unregister(&bcm63xx_b53_dev); ++ ++ priv->b53_device = NULL; ++} ++ + /* + * switch mii access callbacks + */ +@@ -2217,29 +2255,6 @@ static int bcm_enetsw_open(struct net_de + enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); + } + +- /* reset mib */ +- val = enetsw_readb(priv, ENETSW_GMCR_REG); +- val |= ENETSW_GMCR_RST_MIB_MASK; +- enetsw_writeb(priv, val, ENETSW_GMCR_REG); +- mdelay(1); +- val &= ~ENETSW_GMCR_RST_MIB_MASK; +- enetsw_writeb(priv, val, ENETSW_GMCR_REG); +- mdelay(1); +- +- /* force CPU port state */ +- val = enetsw_readb(priv, ENETSW_IMPOV_REG); +- val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK; +- enetsw_writeb(priv, val, ENETSW_IMPOV_REG); +- +- /* enable switch forward engine */ +- val = enetsw_readb(priv, ENETSW_SWMODE_REG); +- val |= ENETSW_SWMODE_FWD_EN_MASK; +- enetsw_writeb(priv, val, ENETSW_SWMODE_REG); +- +- /* enable jumbo on all ports */ +- enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG); +- enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG); +- + /* initialize flow control buffer allocation */ + enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, + ENETDMA_BUFALLOC_REG(priv->rx_chan)); +@@ -2698,6 +2713,9 @@ static int bcm_enetsw_probe(struct platf + struct bcm63xx_enetsw_platform_data *pd; + struct resource *res_mem; + int ret, irq_rx, irq_tx; ++ unsigned i, num_ports = 0; ++ u16 port_mask = BIT(8); ++ u8 val; + + if (!bcm_enet_shared_base[0]) + return -EPROBE_DEFER; +@@ -2780,6 +2798,43 @@ static int bcm_enetsw_probe(struct platf + priv->pdev = pdev; + priv->net_dev = dev; + ++ /* reset mib */ ++ val = enetsw_readb(priv, ENETSW_GMCR_REG); ++ val |= ENETSW_GMCR_RST_MIB_MASK; ++ enetsw_writeb(priv, val, ENETSW_GMCR_REG); ++ mdelay(1); ++ val &= ~ENETSW_GMCR_RST_MIB_MASK; ++ enetsw_writeb(priv, val, ENETSW_GMCR_REG); ++ mdelay(1); ++ ++ /* force CPU port state */ ++ val = enetsw_readb(priv, ENETSW_IMPOV_REG); ++ val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK; ++ enetsw_writeb(priv, val, ENETSW_IMPOV_REG); ++ ++ /* enable switch forward engine */ ++ val = enetsw_readb(priv, ENETSW_SWMODE_REG); ++ val |= ENETSW_SWMODE_FWD_EN_MASK; ++ enetsw_writeb(priv, val, ENETSW_SWMODE_REG); ++ ++ /* enable jumbo on all ports */ ++ enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG); ++ enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG); ++ ++ for (i = 0; i < priv->num_ports; i++) { ++ struct bcm63xx_enetsw_port *port = &priv->used_ports[i]; ++ ++ if (!port->used) ++ continue; ++ ++ num_ports++; ++ port_mask |= BIT(i); ++ } ++ ++ /* only register if there is more than one external port */ ++ if (num_ports > 1) ++ bcmenet_switch_register(priv, port_mask); ++ + return 0; + + out_disable_clk: +@@ -2801,6 +2856,9 @@ static int bcm_enetsw_remove(struct plat + priv = netdev_priv(dev); + unregister_netdev(dev); + ++ /* remove switch */ ++ bcmenet_switch_unregister(priv); ++ + clk_disable_unprepare(priv->mac_clk); + + free_netdev(dev); diff --git a/target/linux/brcm63xx/patches-4.9/424-bcm63xx_enet_no_request_mem_region.patch b/target/linux/brcm63xx/patches-4.9/424-bcm63xx_enet_no_request_mem_region.patch new file mode 100644 index 000000000..6128780f5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/424-bcm63xx_enet_no_request_mem_region.patch @@ -0,0 +1,15 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -2757,9 +2757,9 @@ static int bcm_enetsw_probe(struct platf + if (ret) + goto out; + +- priv->base = devm_ioremap_resource(&pdev->dev, res_mem); +- if (IS_ERR(priv->base)) { +- ret = PTR_ERR(priv->base); ++ priv->base = devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem)); ++ if (priv->base == NULL) { ++ ret = -ENOMEM; + goto out; + } + diff --git a/target/linux/brcm63xx/patches-4.9/427-boards_probe_switch.patch b/target/linux/brcm63xx/patches-4.9/427-boards_probe_switch.patch new file mode 100644 index 000000000..ec03e4cee --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/427-boards_probe_switch.patch @@ -0,0 +1,119 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -77,6 +77,8 @@ static struct board_info __initdata boar + + .has_enet0 = 1, + .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -90,6 +92,8 @@ static struct board_info __initdata boar + + .has_enet0 = 1, + .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -138,6 +142,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -170,6 +176,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -194,6 +202,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -224,6 +234,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -247,6 +259,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -268,6 +282,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -287,6 +303,8 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -314,6 +332,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -339,6 +359,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -364,6 +386,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, +@@ -387,6 +411,8 @@ static struct board_info __initdata boar + }, + + .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, + .force_speed_100 = 1, + .force_duplex_full = 1, + }, diff --git a/target/linux/brcm63xx/patches-4.9/499-allow_better_context_for_board_patches.patch b/target/linux/brcm63xx/patches-4.9/499-allow_better_context_for_board_patches.patch new file mode 100644 index 000000000..ad9c5b30e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/499-allow_better_context_for_board_patches.patch @@ -0,0 +1,56 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -46,7 +46,7 @@ static struct board_info __initdata boar + .ephy_reset_gpio = 36, + .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_3368 */ + + /* + * known 6328 boards +@@ -65,7 +65,7 @@ static struct board_info __initdata boar + .port_no = 0, + }, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* + * known 6338 boards +@@ -98,7 +98,7 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6338 */ + + /* + * known 6345 boards +@@ -108,7 +108,7 @@ static struct board_info __initdata boar + .name = "96345GW2", + .expected_cpu_id = 0x6345, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6345 */ + + /* + * known 6348 boards +@@ -311,7 +311,7 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* + * known 6358 boards +@@ -419,7 +419,7 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; +-#endif ++#endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* + * all boards diff --git a/target/linux/brcm63xx/patches-4.9/500-board-D4PW.patch b/target/linux/brcm63xx/patches-4.9/500-board-D4PW.patch new file mode 100644 index 000000000..31757c464 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/500-board-D4PW.patch @@ -0,0 +1,40 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -311,6 +311,21 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; ++ ++static struct board_info __initdata board_96348_D4PW = { ++ .name = "D-4P-W", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -447,6 +462,7 @@ static const struct board_info __initcon + &board_DV201AMR, + &board_96348gw_a, + &board_rta1025w_16, ++ &board_96348_D4PW, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -478,6 +494,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.9/501-board-NB4.patch b/target/linux/brcm63xx/patches-4.9/501-board-NB4.patch new file mode 100644 index 000000000..fe228c6b0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/501-board-NB4.patch @@ -0,0 +1,81 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -434,6 +434,60 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; ++ ++static struct board_info __initdata board_nb4_ser_r0 = { ++ .name = "NB4-SER-r0", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++}; ++ ++static struct board_info __initdata board_nb4_fxc_r1 = { ++ .name = "NB4-FXC-r1", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -470,6 +524,8 @@ static const struct board_info __initcon + &board_96358vw2, + &board_AGPFS0, + &board_DWVS0, ++ &board_nb4_ser_r0, ++ &board_nb4_fxc_r1, + #endif + }; + +@@ -511,6 +567,8 @@ static struct of_device_id const bcm963x + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, + { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, ++ { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, }, ++ { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 + #endif diff --git a/target/linux/brcm63xx/patches-4.9/502-board-96338W2_E7T.patch b/target/linux/brcm63xx/patches-4.9/502-board-96338W2_E7T.patch new file mode 100644 index 000000000..64edf76e5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/502-board-96338W2_E7T.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -98,6 +98,20 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++static struct board_info __initdata board_96338w2_e7t = { ++ .name = "96338W2_E7T", ++ .expected_cpu_id = 0x6338, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6338 */ + + /* +@@ -503,6 +517,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, + &board_96338w, ++ &board_96338w2_e7t, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, +@@ -540,6 +555,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, + { .compatible = "brcm,bcm96338w", .data = &board_96338w, }, ++ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, diff --git a/target/linux/brcm63xx/patches-4.9/503-board-CPVA642.patch b/target/linux/brcm63xx/patches-4.9/503-board-CPVA642.patch new file mode 100644 index 000000000..2639aa6fd --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/503-board-CPVA642.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -401,6 +401,25 @@ static struct board_info __initdata boar + .num_usbh_ports = 2, + }; + ++static struct board_info __initdata board_CPVA642 = { ++ .name = "CPVA642", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++}; ++ ++ + static struct board_info __initdata board_AGPFS0 = { + .name = "AGPF-S0", + .expected_cpu_id = 0x6358, +@@ -538,6 +557,7 @@ static const struct board_info __initcon + &board_96358vw, + &board_96358vw2, + &board_AGPFS0, ++ &board_CPVA642, + &board_DWVS0, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, +@@ -585,6 +605,7 @@ static struct of_device_id const bcm963x + { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, + { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, }, + { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, ++ { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 + #endif diff --git a/target/linux/brcm63xx/patches-4.9/504-board_dsl_274xb_rev_c.patch b/target/linux/brcm63xx/patches-4.9/504-board_dsl_274xb_rev_c.patch new file mode 100644 index 000000000..c125b3e0a --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/504-board_dsl_274xb_rev_c.patch @@ -0,0 +1,41 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -468,6 +468,22 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + }; + ++/* D-Link DSL-274xB revison C2/C3 */ ++static struct board_info __initdata board_dsl_274xb_rev_c = { ++ .name = "AW4139", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + static struct board_info __initdata board_nb4_ser_r0 = { + .name = "NB4-SER-r0", + .expected_cpu_id = 0x6358, +@@ -559,6 +575,7 @@ static const struct board_info __initcon + &board_AGPFS0, + &board_CPVA642, + &board_DWVS0, ++ &board_dsl_274xb_rev_c, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + #endif +@@ -598,6 +615,7 @@ static struct of_device_id const bcm963x + { .compatible = "alcatel,rg100a", .data = &board_96358vw2, }, + { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, }, + { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, ++ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.9/505-board_spw500v.patch b/target/linux/brcm63xx/patches-4.9/505-board_spw500v.patch new file mode 100644 index 000000000..c6bc4ec2d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/505-board_spw500v.patch @@ -0,0 +1,63 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -340,6 +340,44 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++static struct sprom_fixup __initdata spw500v_fixups[] = { ++ { .offset = 46, .value = 0x3046 }, ++ { .offset = 47, .value = 0x15a7 }, ++ { .offset = 48, .value = 0xfa89 }, ++ { .offset = 49, .value = 0xfe79 }, ++ { .offset = 57, .value = 0x6a49 }, ++}; ++ ++static struct board_info __initdata board_spw500v = { ++ .name = "SPW500V", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 6, ++ .gpio_int = 34, ++ .ext_irq = 2, ++ .cs = 2, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = spw500v_fixups, ++ .num_board_fixups = ARRAY_SIZE(spw500v_fixups), ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -567,6 +605,7 @@ static const struct board_info __initcon + &board_96348gw_a, + &board_rta1025w_16, + &board_96348_D4PW, ++ &board_spw500v, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -608,6 +647,7 @@ static struct of_device_id const bcm963x + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, ++ { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.9/506-board_gw6200_gw6000.patch b/target/linux/brcm63xx/patches-4.9/506-board_gw6200_gw6000.patch new file mode 100644 index 000000000..fb28302eb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/506-board_gw6200_gw6000.patch @@ -0,0 +1,85 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -233,6 +233,64 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_gw6200 = { ++ .name = "GW6200", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 8, /* FIXME: What is real GPIO here? */ ++ .gpio_int = 34, ++ .ext_irq = 2, ++ .cs = 2, ++ }, ++}; ++ ++static struct board_info __initdata board_gw6000 = { ++ .name = "GW6000", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 6, ++ .gpio_int = 34, ++ .ext_irq = 2, ++ .cs = 2, ++ }, ++}; ++ ++ ++ + static struct board_info __initdata board_FAST2404 = { + .name = "F@ST2404", + .expected_cpu_id = 0x6348, +@@ -598,6 +656,8 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6348 + &board_96348r, + &board_96348gw, ++ &board_gw6000, ++ &board_gw6200, + &board_96348gw_10, + &board_96348gw_11, + &board_FAST2404, +@@ -648,6 +708,8 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, ++ { .compatible = "tecom,gw6000", .data = &board_gw6000, }, ++ { .compatible = "tecom,gw6200", .data = &board_gw6200, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.9/507-board-MAGIC.patch b/target/linux/brcm63xx/patches-4.9/507-board-MAGIC.patch new file mode 100644 index 000000000..9ba7d8c23 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/507-board-MAGIC.patch @@ -0,0 +1,58 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -436,6 +436,39 @@ static struct board_info __initdata boar + .num_board_fixups = ARRAY_SIZE(spw500v_fixups), + }, + }; ++ ++static struct board_info __initdata board_96348sv = { ++ .name = "MAGIC", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ /* it has BP_ENET_EXTERNAL_PHY */ ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .has_dsp = 1, ++ .dsp = { ++ .gpio_rst = 25, ++ .gpio_int = 34, ++ .cs = 2, ++ .ext_irq = 2, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -666,6 +699,7 @@ static const struct board_info __initcon + &board_rta1025w_16, + &board_96348_D4PW, + &board_spw500v, ++ &board_96348sv, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -710,6 +744,7 @@ static struct of_device_id const bcm963x + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, + { .compatible = "tecom,gw6200", .data = &board_gw6200, }, ++ { .compatible = "telsey,magic", .data = &board_96348sv, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.9/508-board_hw553.patch b/target/linux/brcm63xx/patches-4.9/508-board_hw553.patch new file mode 100644 index 000000000..34800672c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/508-board_hw553.patch @@ -0,0 +1,51 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -666,6 +666,32 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + .num_usbh_ports = 2, + }; ++ ++static struct board_info __initdata board_HW553 = { ++ .name = "HW553", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -711,6 +737,7 @@ static const struct board_info __initcon + &board_dsl_274xb_rev_c, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, ++ &board_HW553, + #endif + }; + +@@ -754,6 +781,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, ++ { .compatible = "huawei,hg553", .data = &board_HW553, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.9/509-board_rta1320_16m.patch b/target/linux/brcm63xx/patches-4.9/509-board_rta1320_16m.patch new file mode 100644 index 000000000..f30dfbee1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/509-board_rta1320_16m.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -112,6 +112,20 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++static struct board_info __initdata board_rta1320_16m = { ++ .name = "RTA1320_16M", ++ .expected_cpu_id = 0x6338, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6338 */ + + /* +@@ -708,6 +722,7 @@ static const struct board_info __initcon + &board_96338gw, + &board_96338w, + &board_96338w2_e7t, ++ &board_rta1320_16m, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, +@@ -752,6 +767,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, + { .compatible = "brcm,bcm96338w", .data = &board_96338w, }, ++ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, }, + { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 diff --git a/target/linux/brcm63xx/patches-4.9/510-board_spw303v.patch b/target/linux/brcm63xx/patches-4.9/510-board_spw303v.patch new file mode 100644 index 000000000..30ef4e051 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/510-board_spw303v.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -706,6 +706,20 @@ static struct board_info __initdata boar + .pci_dev = 1, + }, + }; ++ ++ /* T-Home Speedport W 303V Typ B */ ++static struct board_info __initdata board_spw303v = { ++ .name = "96358-502V", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -753,6 +767,7 @@ static const struct board_info __initcon + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + &board_HW553, ++ &board_spw303v, + #endif + }; + +@@ -804,6 +819,7 @@ static struct of_device_id const bcm963x + { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, }, + { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, }, + { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, ++ { .compatible = "t-com,spw303v", .data = &board_spw303v, }, + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 diff --git a/target/linux/brcm63xx/patches-4.9/511-board_V2500V.patch b/target/linux/brcm63xx/patches-4.9/511-board_V2500V.patch new file mode 100644 index 000000000..46909b073 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/511-board_V2500V.patch @@ -0,0 +1,92 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -483,6 +483,26 @@ static struct board_info __initdata boar + .ext_irq = 2, + }, + }; ++ ++static struct board_info __initdata board_V2500V_BB = { ++ .name = "V2500V_BB", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6348 */ + + /* +@@ -755,6 +775,7 @@ static const struct board_info __initcon + &board_96348_D4PW, + &board_spw500v, + &board_96348sv, ++ &board_V2500V_BB, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -794,6 +815,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, +@@ -853,6 +875,22 @@ void __init board_bcm963xx_init(void) + val &= MPI_CSBASE_BASE_MASK; + } + boot_addr = (u8 *)KSEG1ADDR(val); ++ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr); ++ ++ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */ ++ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/ ++ /* Loading firmware from the CFE Prompt always loads to Bank 0 */ ++ /* Do an early check of CFE and then select bank 0 */ ++ ++ if (boot_addr == (u8 *)0xbf800000) { ++ u8 *tmp_boot_addr = (u8*)0xbfc00000; ++ ++ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET); ++ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) { ++ pr_info("V2500V: nvram bank 0\n"); ++ boot_addr = tmp_boot_addr; ++ } ++ } + + /* dump cfe version */ + cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -21,6 +21,7 @@ + #include + #include + ++#include + #include + #include + #include +@@ -247,6 +248,13 @@ int __init bcm63xx_flash_register(void) + val = bcm_mpi_readl(MPI_CSBASE_REG(0)); + val &= MPI_CSBASE_BASE_MASK; + ++ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */ ++ /* Loading from CFE always uses Bank 0 */ ++ if (!strcmp(board_get_name(), "V2500V_BB")) { ++ pr_info("V2500V: Start in Bank 0\n"); ++ val = val + 0x400000; // Select Bank 0 start address ++ } ++ + mtd_resources[0].start = val; + mtd_resources[0].end = 0x1FFFFFFF; + } diff --git a/target/linux/brcm63xx/patches-4.9/512-board_BTV2110.patch b/target/linux/brcm63xx/patches-4.9/512-board_BTV2110.patch new file mode 100644 index 000000000..f58e294eb --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/512-board_BTV2110.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -216,6 +216,24 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++ ++/* BT Voyager 2110 */ ++static struct board_info __initdata board_V2110 = { ++ .name = "V2110", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ ++ + static struct board_info __initdata board_96348gw = { + .name = "96348GW", + .expected_cpu_id = 0x6348, +@@ -776,6 +794,7 @@ static const struct board_info __initcon + &board_spw500v, + &board_96348sv, + &board_V2500V_BB, ++ &board_V2110, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -815,6 +834,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, }, + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, ++ { .compatible = "bt,v2110", .data = &board_V2110, }, + { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, diff --git a/target/linux/brcm63xx/patches-4.9/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch b/target/linux/brcm63xx/patches-4.9/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch new file mode 100644 index 000000000..769be5a17 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/513-MIPS-BCM63XX-add-inventel-Livebox-support.patch @@ -0,0 +1,223 @@ +From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 9 Mar 2014 04:55:52 +0100 +Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support + +--- + arch/mips/bcm63xx/boards/Kconfig | 6 + + arch/mips/bcm63xx/boards/Makefile | 1 + + arch/mips/bcm63xx/boards/board_common.c | 2 +- + arch/mips/bcm63xx/boards/board_common.h | 6 + + arch/mips/bcm63xx/boards/board_livebox.c | 215 ++++++++++++++++++++++++++++++ + 5 files changed, 229 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c + +--- a/arch/mips/bcm63xx/boards/Kconfig ++++ b/arch/mips/bcm63xx/boards/Kconfig +@@ -12,4 +12,10 @@ config BOARD_BCM963XX + default y + help + ++config BOARD_LIVEBOX ++ bool "Inventel Livebox(es) boards" ++ select SSB ++ help ++ Inventel Livebox boards using the RedBoot bootloader. ++ + endmenu +--- a/arch/mips/bcm63xx/boards/Makefile ++++ b/arch/mips/bcm63xx/boards/Makefile +@@ -1,2 +1,3 @@ + obj-y += board_common.o + obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o ++obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -55,7 +55,7 @@ void __init board_prom_init(void) + if (fw_arg3 == CFE_EPTSEAL) + board_bcm963xx_init(); + else +- panic("unsupported bootloader detected"); ++ board_livebox_init(); + } + + static int (*board_get_mac_address)(u8 mac[ETH_ALEN]); +--- a/arch/mips/bcm63xx/boards/board_common.h ++++ b/arch/mips/bcm63xx/boards/board_common.h +@@ -24,4 +24,10 @@ static inline void board_of_device_prese + } + #endif + ++#if defined(CONFIG_BOARD_LIVEBOX) ++void board_livebox_init(void); ++#else ++static inline void board_livebox_init(void) { } ++#endif ++ + #endif /* __BOARD_COMMON_H */ +--- /dev/null ++++ b/arch/mips/bcm63xx/boards/board_livebox.c +@@ -0,0 +1,163 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "board_common.h" ++ ++#define PFX "board_livebox: " ++ ++static unsigned int mac_addr_used = 0; ++ ++/* ++ * known 6348 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_6348 ++static struct board_info __initdata board_livebox_blue5g = { ++ .name = "Livebox-blue-5g", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 31, ++ }, ++ ++ .ephy_reset_gpio = 6, ++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ ++ .has_dsp = 0, /*TODO some Liveboxes have dsp*/ ++ .dsp = { ++ .gpio_rst = 6, ++ .gpio_int = 35, ++ .cs = 2, ++ .ext_irq = 2, ++ }, ++}; ++#endif ++ ++/* ++ * all boards ++ */ ++static const struct board_info __initdata *bcm963xx_boards[] = { ++#ifdef CONFIG_BCM63XX_CPU_6348 ++ &board_livebox_blue5g ++#endif ++}; ++ ++static struct of_device_id const livebox_boards_dt[] = { ++ { .compatible = "inventel,livebox-blue-5g", .data = &board_livebox_blue5g, }, ++ { } ++}; ++ ++/* ++ * register & return a new board mac address ++ */ ++static int livebox_get_mac_address(u8 *mac) ++{ ++ u8 *p; ++ int count; ++ ++ memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN); ++ ++ p = mac + ETH_ALEN - 1; ++ count = mac_addr_used; ++ ++ while (count--) { ++ do { ++ (*p)++; ++ if (*p != 0) ++ break; ++ p--; ++ } while (p != mac); ++ } ++ ++ if (p == mac) { ++ printk(KERN_ERR PFX "unable to fetch mac address\n"); ++ return -ENODEV; ++ } ++ mac_addr_used++; ++ ++ return 0; ++} ++ ++/* ++ * early init callback ++ */ ++#define LIVEBOX_GPIO_DETECT_MASK 0x000000ff ++#define LIVEBOX_BOOT_ADDR 0x1e400000 ++ ++#define LIVEBOX_HW_BLUE5G_9 0x90 ++ ++void __init board_livebox_init(void) ++{ ++ u32 val; ++ u8 hw_version; ++ const struct board_info *board; ++ const struct of_device_id *board_match; ++ ++ /* find board by compat */ ++ board_match = bcm63xx_match_board(livebox_boards_dt); ++ if (board_match) { ++ board = board_match->data; ++ } else { ++ /* Get hardware version */ ++ val = bcm_gpio_readl(GPIO_CTL_LO_REG); ++ val &= ~LIVEBOX_GPIO_DETECT_MASK; ++ bcm_gpio_writel(val, GPIO_CTL_LO_REG); ++ ++ hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG); ++ hw_version &= LIVEBOX_GPIO_DETECT_MASK; ++ ++ switch (hw_version) { ++ case LIVEBOX_HW_BLUE5G_9: ++ printk(KERN_INFO PFX "Livebox BLUE5G.9\n"); ++ board = bcm963xx_boards[0]; ++ break; ++ default: ++ printk(KERN_INFO PFX "Unknown livebox version: %02x\n", ++ hw_version); ++ /* use default livebox configuration */ ++ board = bcm963xx_boards[0]; ++ break; ++ } ++ } ++ ++ /* use default livebox configuration */ ++ board_early_setup(board, livebox_get_mac_address); ++ ++ /* read base address of boot chip select (0) */ ++ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); ++ val &= MPI_CSBASE_BASE_MASK; ++ if (val != LIVEBOX_BOOT_ADDR) { ++ printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n", ++ val, LIVEBOX_BOOT_ADDR); ++ bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff); ++ } ++} diff --git a/target/linux/brcm63xx/patches-4.9/514-board_ct536_ct5621.patch b/target/linux/brcm63xx/patches-4.9/514-board_ct536_ct5621.patch new file mode 100644 index 000000000..d111d97d6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/514-board_ct536_ct5621.patch @@ -0,0 +1,53 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -234,6 +234,33 @@ static struct board_info __initdata boar + }; + + ++static struct board_info __initdata board_ct536_ct5621 = { ++ .name = "CT536_CT5621", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 0, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_96348gw = { + .name = "96348GW", + .expected_cpu_id = 0x6348, +@@ -795,6 +822,7 @@ static const struct board_info __initcon + &board_96348sv, + &board_V2500V_BB, + &board_V2110, ++ &board_ct536_ct5621, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -836,6 +864,8 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, }, + { .compatible = "bt,v2110", .data = &board_V2110, }, + { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, ++ { .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, }, ++ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, diff --git a/target/linux/brcm63xx/patches-4.9/515-board_DWV-S0_fixes.patch b/target/linux/brcm63xx/patches-4.9/515-board_DWV-S0_fixes.patch new file mode 100644 index 000000000..8e053b293 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/515-board_DWV-S0_fixes.patch @@ -0,0 +1,10 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -674,6 +674,7 @@ static struct board_info __initdata boar + }, + + .has_ohci0 = 1, ++ .has_ehci0 = 1, + }; + + /* D-Link DSL-274xB revison C2/C3 */ diff --git a/target/linux/brcm63xx/patches-4.9/516-board_96348A-122.patch b/target/linux/brcm63xx/patches-4.9/516-board_96348A-122.patch new file mode 100644 index 000000000..29dc2620d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/516-board_96348A-122.patch @@ -0,0 +1,49 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -261,6 +261,30 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_96348A_122 = { ++ .name = "96348A-122", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_96348gw = { + .name = "96348GW", + .expected_cpu_id = 0x6348, +@@ -824,6 +848,7 @@ static const struct board_info __initcon + &board_V2500V_BB, + &board_V2110, + &board_ct536_ct5621, ++ &board_96348A_122, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -866,6 +891,7 @@ static struct of_device_id const bcm963x + { .compatible = "bt,v2110", .data = &board_V2110, }, + { .compatible = "bt,v2500v-bb", .data = &board_V2500V_BB, }, + { .compatible = "comtrend,ct-536+", .data = &board_ct536_ct5621, }, ++ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, }, + { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, }, + { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, }, + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, diff --git a/target/linux/brcm63xx/patches-4.9/519_board_CPVA502plus.patch b/target/linux/brcm63xx/patches-4.9/519_board_CPVA502plus.patch new file mode 100644 index 000000000..5af1060df --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/519_board_CPVA502plus.patch @@ -0,0 +1,52 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -233,6 +233,33 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_CPVA502plus = { ++ .name = "CPVA502+", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ }, ++ ++ .ephy_reset_gpio = 4, ++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; + + static struct board_info __initdata board_ct536_ct5621 = { + .name = "CT536_CT5621", +@@ -849,6 +876,7 @@ static const struct board_info __initcon + &board_V2110, + &board_ct536_ct5621, + &board_96348A_122, ++ &board_CPVA502plus, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -901,6 +929,7 @@ static struct of_device_id const bcm963x + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, + { .compatible = "tecom,gw6200", .data = &board_gw6200, }, ++ { .compatible = "telsey,cpva502+", .data = &board_CPVA502plus, }, + { .compatible = "telsey,magic", .data = &board_96348sv, }, + { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, }, + { .compatible = "usr,9108", .data = &board_96348gw_a, }, diff --git a/target/linux/brcm63xx/patches-4.9/520-bcm63xx-add-support-for-96368MVWG-board.patch b/target/linux/brcm63xx/patches-4.9/520-bcm63xx-add-support-for-96368MVWG-board.patch new file mode 100644 index 000000000..31002842f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/520-bcm63xx-add-support-for-96368MVWG-board.patch @@ -0,0 +1,118 @@ +From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001 +From: Maxime Bizon +Date: Wed, 20 Jan 2010 16:21:30 +0100 +Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board. + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++ + .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 + + 2 files changed, 97 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -840,6 +840,58 @@ static struct board_info __initdata boar + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* ++ * known 6368 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_6368 ++static struct board_info __initdata board_96368mvwg = { ++ .name = "96368MVWG", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port1", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port2", ++ }, ++ ++ [4] = { ++ .used = 1, ++ .phy_id = 0x12, ++ .name = "port0", ++ }, ++ ++ [5] = { ++ .used = 1, ++ .phy_id = 0x11, ++ .name = "port3", ++ }, ++ }, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++}; ++#endif /* CONFIG_BCM63XX_CPU_6368 */ ++ ++/* + * all boards + */ + static const struct board_info __initconst *bcm963xx_boards[] = { +@@ -891,6 +943,10 @@ static const struct board_info __initcon + &board_HW553, + &board_spw303v, + #endif ++ ++#ifdef CONFIG_BCM63XX_CPU_6368 ++ &board_96368mvwg, ++#endif + }; + + static struct of_device_id const bcm963xx_boards_dt[] = { +@@ -951,6 +1007,7 @@ static struct of_device_id const bcm963x + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + #endif +--- a/arch/mips/bcm63xx/boards/board_common.c ++++ b/arch/mips/bcm63xx/boards/board_common.c +@@ -82,12 +82,25 @@ void __init board_early_setup(const stru + bcm63xx_pci_enabled = 1; + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G2_PCI; ++ ++ if (BCMCPU_IS_6368()) ++ val |= GPIO_MODE_6368_PCI_REQ1 | ++ GPIO_MODE_6368_PCI_GNT1 | ++ GPIO_MODE_6368_PCI_INTB | ++ GPIO_MODE_6368_PCI_REQ0 | ++ GPIO_MODE_6368_PCI_GNT0; + } + #endif + + if (board.has_pccard) { + if (BCMCPU_IS_6348()) + val |= GPIO_MODE_6348_G1_MII_PCCARD; ++ ++ if (BCMCPU_IS_6368()) ++ val |= GPIO_MODE_6368_PCMCIA_CD1 | ++ GPIO_MODE_6368_PCMCIA_CD2 | ++ GPIO_MODE_6368_PCMCIA_VS1 | ++ GPIO_MODE_6368_PCMCIA_VS2; + } + + if (board.has_enet0 && !board.enet0.use_internal_phy) { diff --git a/target/linux/brcm63xx/patches-4.9/521-bcm63xx-add-support-for-96368MVNgr-board.patch b/target/linux/brcm63xx/patches-4.9/521-bcm63xx-add-support-for-96368MVNgr-board.patch new file mode 100644 index 000000000..f719c2428 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/521-bcm63xx-add-support-for-96368MVNgr-board.patch @@ -0,0 +1,73 @@ +From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001 +From: Maxime Bizon +Date: Fri, 4 Nov 2011 12:33:48 +0100 +Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board. + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++ + 1 files changed, 67 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -889,6 +889,45 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_ehci0 = 1, + }; ++ ++static struct board_info __initdata board_96368mvngr = { ++ .name = "96368MVNgr", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++}; + #endif /* CONFIG_BCM63XX_CPU_6368 */ + + /* +@@ -946,6 +985,7 @@ static const struct board_info __initcon + + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, ++ &board_96368mvngr, + #endif + }; + +@@ -1007,6 +1047,7 @@ static struct of_device_id const bcm963x + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.9/522-MIPS-BCM63XX-add-96328avng-reference-board.patch b/target/linux/brcm63xx/patches-4.9/522-MIPS-BCM63XX-add-96328avng-reference-board.patch new file mode 100644 index 000000000..e482b2093 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/522-MIPS-BCM63XX-add-96328avng-reference-board.patch @@ -0,0 +1,45 @@ +From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 May 2012 10:52:25 +0200 +Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++ + 1 files changed, 77 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -64,6 +64,33 @@ static struct board_info __initdata boar + .use_fullspeed = 0, + .port_no = 0, + }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, + }; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + diff --git a/target/linux/brcm63xx/patches-4.9/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch b/target/linux/brcm63xx/patches-4.9/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch new file mode 100644 index 000000000..c0f235bee --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/523-MIPS-BCM63XX-add-963281TAN-reference-board.patch @@ -0,0 +1,68 @@ +From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 29 May 2012 11:01:12 +0200 +Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++ + 1 files changed, 71 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -92,6 +92,40 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_963281TAN = { ++ .name = "963281TAN", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -966,6 +1000,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_963281TAN, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -1022,6 +1057,7 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 diff --git a/target/linux/brcm63xx/patches-4.9/524-board_dsl_274xb_rev_f.patch b/target/linux/brcm63xx/patches-4.9/524-board_dsl_274xb_rev_f.patch new file mode 100644 index 000000000..e3be8926d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/524-board_dsl_274xb_rev_f.patch @@ -0,0 +1,80 @@ +From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 30 Apr 2012 09:10:51 +0200 +Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link + DSL-274xB rev F1 + +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++ + 1 files changed, 104 insertions(+), 0 deletions(-) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -126,6 +126,51 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_dsl_274xb_f1 = { ++ .name = "AW4339U", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_ATHEROS, ++ .caldata_offset = 0x7d1000, ++ .slot = 0, ++ .led_pin = -1, ++ .led_active_high = 1, ++ }, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 4", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 1", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -1001,6 +1046,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, + &board_963281TAN, ++ &board_dsl_274xb_f1, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -1059,6 +1105,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++ { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, diff --git a/target/linux/brcm63xx/patches-4.9/525-board_96348w3.patch b/target/linux/brcm63xx/patches-4.9/525-board_96348w3.patch new file mode 100644 index 000000000..8fd0e85b6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/525-board_96348w3.patch @@ -0,0 +1,43 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -600,6 +600,24 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + }; + ++/* NetGear DG834G v4 */ ++static struct board_info __initdata board_96348W3 = { ++ .name = "96348W3", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++}; ++ + static struct board_info __initdata board_96348_D4PW = { + .name = "D-4P-W", + .expected_cpu_id = 0x6348, +@@ -1076,6 +1094,7 @@ static const struct board_info __initcon + &board_ct536_ct5621, + &board_96348A_122, + &board_CPVA502plus, ++ &board_96348W3, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -1131,6 +1150,7 @@ static struct of_device_id const bcm963x + { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, }, + { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, }, + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, ++ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, diff --git a/target/linux/brcm63xx/patches-4.9/526-board_CT6373-1.patch b/target/linux/brcm63xx/patches-4.9/526-board_CT6373-1.patch new file mode 100644 index 000000000..f9257d29d --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/526-board_CT6373-1.patch @@ -0,0 +1,49 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -922,6 +922,30 @@ static struct board_info __initdata boar + .num_usbh_ports = 2, + }; + ++static struct board_info __initdata board_ct6373_1 = { ++ .name = "CT6373-1", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_HW553 = { + .name = "HW553", + .expected_cpu_id = 0x6358, +@@ -1106,6 +1130,7 @@ static const struct board_info __initcon + &board_dsl_274xb_rev_c, + &board_nb4_ser_r0, + &board_nb4_fxc_r1, ++ &board_ct6373_1, + &board_HW553, + &board_spw303v, + #endif +@@ -1164,6 +1189,7 @@ static struct of_device_id const bcm963x + { .compatible = "alcatel,rg100a", .data = &board_96358vw2, }, + { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, }, + { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, }, ++ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, }, + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, diff --git a/target/linux/brcm63xx/patches-4.9/527-board_dva-g3810bn-tl-1.patch b/target/linux/brcm63xx/patches-4.9/527-board_dva-g3810bn-tl-1.patch new file mode 100644 index 000000000..6936fa4d5 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/527-board_dva-g3810bn-tl-1.patch @@ -0,0 +1,54 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -985,6 +985,35 @@ static struct board_info __initdata boar + .use_internal_phy = 1, + }, + }; ++ ++/* D-Link DVA-G3810BN/TL */ ++static struct board_info __initdata board_DVAG3810BN = { ++ .name = "DVAG3810BN", ++ .expected_cpu_id = 0x6358, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 0, ++ .use_internal_phy = 1, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ ++ .has_ohci0 = 1, ++ .has_pccard = 1, ++ .has_ehci0 = 1, ++}; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + + /* +@@ -1133,6 +1162,7 @@ static const struct board_info __initcon + &board_ct6373_1, + &board_HW553, + &board_spw303v, ++ &board_DVAG3810BN, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6368 +@@ -1192,6 +1222,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, }, + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, ++ { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.9/528-board_nb6.patch b/target/linux/brcm63xx/patches-4.9/528-board_nb6.patch new file mode 100644 index 000000000..55cc9ab86 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/528-board_nb6.patch @@ -0,0 +1,56 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1016,6 +1016,32 @@ static struct board_info __initdata boar + }; + #endif /* CONFIG_BCM63XX_CPU_6358 */ + ++#ifdef CONFIG_BCM63XX_CPU_6362 ++static struct board_info __initdata board_nb6 = { ++ .name = "NB6", ++ .expected_cpu_id = 0x6362, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [4] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++}; ++#endif /* CONFIG_BCM63XX_CPU_6362 */ ++ + /* + * known 6368 boards + */ +@@ -1165,6 +1191,10 @@ static const struct board_info __initcon + &board_DVAG3810BN, + #endif + ++#ifdef CONFIG_BCM63XX_CPU_6362 ++ &board_nb6, ++#endif ++ + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, +@@ -1233,6 +1263,9 @@ static struct of_device_id const bcm963x + { .compatible = "t-com,spw303v", .data = &board_spw303v, }, + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif ++#ifdef CONFIG_BCM63XX_CPU_6362 ++ { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, ++#endif + #ifdef CONFIG_BCM63XX_CPU_6368 + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, diff --git a/target/linux/brcm63xx/patches-4.9/529-board_fast2604.patch b/target/linux/brcm63xx/patches-4.9/529-board_fast2604.patch new file mode 100644 index 000000000..2bca04aa8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/529-board_fast2604.patch @@ -0,0 +1,41 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -533,6 +533,22 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct board_info __initdata board_FAST2604 = { ++ .name = "F@ST2604", ++ .expected_cpu_id = 0x6348, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + static struct board_info __initdata board_rta1025w_16 = { + .name = "RTA1025W_16", + .expected_cpu_id = 0x6348, +@@ -1162,6 +1178,7 @@ static const struct board_info __initcon + &board_96348gw_10, + &board_96348gw_11, + &board_FAST2404, ++ &board_FAST2604, + &board_DV201AMR, + &board_96348gw_a, + &board_rta1025w_16, +@@ -1237,6 +1254,7 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,dg834gtpn", .data = &board_96348gw_10, }, + { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, }, + { .compatible = "sagem,f@st2404", .data = &board_FAST2404, }, ++ { .compatible = "sagem,f@st2604", .data = &board_FAST2604, }, + { .compatible = "t-com,spw500v", .data = &board_spw500v, }, + { .compatible = "tecom,gw6000", .data = &board_gw6000, }, + { .compatible = "tecom,gw6200", .data = &board_gw6200, }, diff --git a/target/linux/brcm63xx/patches-4.9/530-board_A4001N1.patch b/target/linux/brcm63xx/patches-4.9/530-board_A4001N1.patch new file mode 100644 index 000000000..ec0695cc0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/530-board_A4001N1.patch @@ -0,0 +1,68 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -127,6 +127,49 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_A4001N1 = { ++ .name = "963281T_TEF", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ + static struct board_info __initdata board_dsl_274xb_f1 = { + .name = "AW4339U", + .expected_cpu_id = 0x6328, +@@ -1159,6 +1202,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, + &board_963281TAN, ++ &board_A4001N1, + &board_dsl_274xb_f1, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 +@@ -1224,6 +1268,7 @@ static struct of_device_id const bcm963x + { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, diff --git a/target/linux/brcm63xx/patches-4.9/531-board_AR-5387un.patch b/target/linux/brcm63xx/patches-4.9/531-board_AR-5387un.patch new file mode 100644 index 000000000..d38cb3bb1 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/531-board_AR-5387un.patch @@ -0,0 +1,97 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -93,6 +93,78 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ar5387un_fixups[] = { ++ { .offset = 2, .value = 0x05bb }, ++ { .offset = 65, .value = 0x1204 }, ++ { .offset = 78, .value = 0x0303 }, ++ { .offset = 79, .value = 0x0202 }, ++ { .offset = 80, .value = 0xff02 }, ++ { .offset = 87, .value = 0x0315 }, ++ { .offset = 88, .value = 0x0315 }, ++ { .offset = 96, .value = 0x2048 }, ++ { .offset = 97, .value = 0xff11 }, ++ { .offset = 98, .value = 0x1567 }, ++ { .offset = 99, .value = 0xfb24 }, ++ { .offset = 100, .value = 0x3e3c }, ++ { .offset = 101, .value = 0x4038 }, ++ { .offset = 102, .value = 0xfe7f }, ++ { .offset = 103, .value = 0x1279 }, ++ { .offset = 112, .value = 0x2048 }, ++ { .offset = 113, .value = 0xff03 }, ++ { .offset = 114, .value = 0x154c }, ++ { .offset = 115, .value = 0xfb27 }, ++ { .offset = 116, .value = 0x3e3c }, ++ { .offset = 117, .value = 0x4038 }, ++ { .offset = 118, .value = 0xfe87 }, ++ { .offset = 119, .value = 0x1233 }, ++ { .offset = 203, .value = 0x2226 }, ++}; ++ ++static struct board_info __initdata board_AR5387un = { ++ .name = "96328A-1441N1", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5387un_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups), ++ }, ++}; ++ + static struct board_info __initdata board_963281TAN = { + .name = "963281TAN", + .expected_cpu_id = 0x6328, +@@ -1201,6 +1273,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_AR5387un, + &board_963281TAN, + &board_A4001N1, + &board_dsl_274xb_f1, +@@ -1271,6 +1344,7 @@ static struct of_device_id const bcm963x + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 diff --git a/target/linux/brcm63xx/patches-4.9/532-board_AR-5381u.patch b/target/linux/brcm63xx/patches-4.9/532-board_AR-5381u.patch new file mode 100644 index 000000000..07015caaa --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/532-board_AR-5381u.patch @@ -0,0 +1,79 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -93,6 +93,60 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ar5381u_fixups[] = { ++ { .offset = 97, .value = 0xfee5 }, ++ { .offset = 98, .value = 0x157c }, ++ { .offset = 99, .value = 0xfae7 }, ++ { .offset = 113, .value = 0xfefa }, ++ { .offset = 114, .value = 0x15d6 }, ++ { .offset = 115, .value = 0xfaf8 }, ++}; ++ ++static struct board_info __initdata board_AR5381u = { ++ .name = "96328A-1241N", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5381u_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata ar5387un_fixups[] = { + { .offset = 2, .value = 0x05bb }, + { .offset = 65, .value = 0x1204 }, +@@ -1273,6 +1327,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_AR5381u, + &board_AR5387un, + &board_963281TAN, + &board_A4001N1, +@@ -1344,6 +1399,7 @@ static struct of_device_id const bcm963x + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, ++ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, }, + { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.9/533-board_rta770bw.patch b/target/linux/brcm63xx/patches-4.9/533-board_rta770bw.patch new file mode 100644 index 000000000..3ac6161bc --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/533-board_rta770bw.patch @@ -0,0 +1,39 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -411,6 +411,20 @@ static struct board_info __initdata boar + .name = "96345GW2", + .expected_cpu_id = 0x6345, + }; ++ ++static struct board_info __initdata board_rta770bw = { ++ .name = "RTA770BW", ++ .expected_cpu_id = 0x6345, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6345 */ + + /* +@@ -1341,6 +1355,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, ++ &board_rta770bw, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + &board_96348r, +@@ -1411,6 +1426,7 @@ static struct of_device_id const bcm963x + #endif + #ifdef CONFIG_BCM63XX_CPU_6345 + { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, ++ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.9/534-board_hw556.patch b/target/linux/brcm63xx/patches-4.9/534-board_hw556.patch new file mode 100644 index 000000000..604ffe7a3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/534-board_hw556.patch @@ -0,0 +1,123 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -1171,6 +1172,92 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HW556_C = { ++ .name = "HW556_C", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_RALINK, ++ .caldata_offset = 0xeffe00, ++ .slot = 1, ++ .eeprom = "rt2x00.eeprom", ++ }, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++static struct board_info __initdata board_HW556_A = { ++ .name = "HW556_A", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_ATHEROS, ++ .caldata_offset = 0xf7e000, ++ .slot = 1, ++ .endian_check = 1, ++ .led_pin = 2, ++ .led_active_high = 1, ++ }, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++static struct board_info __initdata board_HW556_B = { ++ .name = "HW556_B", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_ATHEROS, ++ .caldata_offset = 0xefe000, ++ .slot = 1, ++ .endian_check = 1, ++ .led_pin = 2, ++ .led_active_high = 1, ++ }, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + /* T-Home Speedport W 303V Typ B */ + static struct board_info __initdata board_spw303v = { + .name = "96358-502V", +@@ -1391,6 +1478,9 @@ static const struct board_info __initcon + &board_nb4_fxc_r1, + &board_ct6373_1, + &board_HW553, ++ &board_HW556_A, ++ &board_HW556_B, ++ &board_HW556_C, + &board_spw303v, + &board_DVAG3810BN, + #endif +@@ -1463,6 +1553,9 @@ static struct of_device_id const bcm963x + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, ++ { .compatible = "huawei,hg556a-a", .data = &board_HW556_A, }, ++ { .compatible = "huawei,hg556a-b", .data = &board_HW556_B, }, ++ { .compatible = "huawei,hg556a-c", .data = &board_HW556_C, }, + { .compatible = "pirelli,a226g", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m", .data = &board_DWVS0, }, + { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, }, diff --git a/target/linux/brcm63xx/patches-4.9/535-board_rta770w.patch b/target/linux/brcm63xx/patches-4.9/535-board_rta770w.patch new file mode 100644 index 000000000..7149ed748 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/535-board_rta770w.patch @@ -0,0 +1,44 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -426,6 +426,25 @@ static struct board_info __initdata boar + .force_duplex_full = 1, + }, + }; ++ ++// Actually this board is the very same as the rta770bw, ++// where the additional 'b' within the name just ++// just indicates 'Annex B'. The ADSL Modem itself is able ++// to handle both Annex A as well as Annex B - ++// the loaded firmware makes the only difference ++static struct board_info __initdata board_rta770w = { ++ .name = "RTA770W", ++ .expected_cpu_id = 0x6345, ++ ++ .has_enet0 = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6345 */ + + /* +@@ -1443,6 +1462,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6345 + &board_96345gw2, + &board_rta770bw, ++ &board_rta770w, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + &board_96348r, +@@ -1517,6 +1537,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6345 + { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, }, + { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, }, ++ { .compatible = "dynalink,rta770w", .data = &board_rta770w, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 + { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.9/536-board_fast2704.patch b/target/linux/brcm63xx/patches-4.9/536-board_fast2704.patch new file mode 100644 index 000000000..888854a9c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/536-board_fast2704.patch @@ -0,0 +1,74 @@ +From: Marcin Jurkowski +Date: Thu, 31 Oct 2013 22:33:10 +0000 +Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL + router + +This adds kernel support support for Sagemcom F@st 2704 wireless ADSL +router. +It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+ +modem equipped with 64 MiB RAM and 8 MiB flash. + +Signed-off-by: Marcin Jurkowski +--- +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -341,6 +341,43 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_FAST2704V2 = { ++ .name = "F@ST2704V2", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .has_usbd = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -1452,6 +1489,7 @@ static const struct board_info __initcon + &board_963281TAN, + &board_A4001N1, + &board_dsl_274xb_f1, ++ &board_FAST2704V2, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -1527,6 +1565,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, }, + { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, ++ { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, diff --git a/target/linux/brcm63xx/patches-4.9/537-board_fast2504n.patch b/target/linux/brcm63xx/patches-4.9/537-board_fast2504n.patch new file mode 100644 index 000000000..3472d90e9 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/537-board_fast2504n.patch @@ -0,0 +1,66 @@ +From: Max Staudt +Date: Wed, 15 Jan 2014 18:51:13 +0000 +Subject: [PATCH] brcm63xx: F@ST2504n board support (Linux-3.10.26) + +Signed-off-by: Max Staudt +--- +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1382,6 +1382,41 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_fast2504n = { ++ .name = "F@ST2504n", ++ .expected_cpu_id = 0x6362, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6362 */ + + /* +@@ -1545,6 +1580,7 @@ static const struct board_info __initcon + + #ifdef CONFIG_BCM63XX_CPU_6362 + &board_nb6, ++ &board_fast2504n, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6368 +@@ -1626,6 +1662,7 @@ static struct of_device_id const bcm963x + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6362 ++ { .compatible = "sagem,f@st2504n", .data = &board_fast2504n, }, + { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 diff --git a/target/linux/brcm63xx/patches-4.9/555-board_96318ref.patch b/target/linux/brcm63xx/patches-4.9/555-board_96318ref.patch new file mode 100644 index 000000000..c7eadf1b8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/555-board_96318ref.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -50,6 +50,55 @@ static struct board_info __initdata boar + #endif /* CONFIG_BCM63XX_CPU_3368 */ + + /* ++ * known 6318 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_6318 ++static struct board_info __initdata board_96318ref = { ++ .name = "96318REF", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; ++#endif /* CONFIG_BCM63XX_CPU_6318 */ ++ ++/* + * known 6328 boards + */ + #ifdef CONFIG_BCM63XX_CPU_6328 +@@ -1517,6 +1566,9 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_3368 + &board_cvg834g, + #endif ++#ifdef CONFIG_BCM63XX_CPU_6318 ++ &board_96318ref, ++#endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, + &board_AR5381u, +@@ -1594,6 +1646,9 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_3368 + { .compatible = "netgear,cvg834g", .data = &board_cvg834g, }, + #endif ++#ifdef CONFIG_BCM63XX_CPU_6318 ++ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, ++#endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, diff --git a/target/linux/brcm63xx/patches-4.9/556-board_96318ref_p300.patch b/target/linux/brcm63xx/patches-4.9/556-board_96318ref_p300.patch new file mode 100644 index 000000000..162ecb7c3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/556-board_96318ref_p300.patch @@ -0,0 +1,69 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -96,6 +96,50 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_96318ref_p300 = { ++ .name = "96318REF_P300", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6318 */ + + /* +@@ -1568,6 +1612,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6318 + &board_96318ref, ++ &board_96318ref_p300, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, +@@ -1648,6 +1693,7 @@ static struct of_device_id const bcm963x + #endif + #ifdef CONFIG_BCM63XX_CPU_6318 + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, ++ { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, diff --git a/target/linux/brcm63xx/patches-4.9/557-board_bcm963269bhr.patch b/target/linux/brcm63xx/patches-4.9/557-board_bcm963269bhr.patch new file mode 100644 index 000000000..be0e7e783 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/557-board_bcm963269bhr.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1604,6 +1604,50 @@ static struct board_info __initdata boar + #endif /* CONFIG_BCM63XX_CPU_6368 */ + + /* ++ * known 63268/63269 boards ++ */ ++#ifdef CONFIG_BCM63XX_CPU_63268 ++static struct board_info __initdata board_963269bhr = { ++ .name = "963269BHR", ++ .expected_cpu_id = 0x63268, ++ ++ .has_pci = 1, ++ ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++}; ++#endif /* CONFIG_BCM63XX_CPU_63268 */ ++ ++/* + * all boards + */ + static const struct board_info __initconst *bcm963xx_boards[] = { +@@ -1684,6 +1728,9 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + #endif ++#ifdef CONFIG_BCM63XX_CPU_63268 ++ &board_963269bhr, ++#endif + }; + + static struct of_device_id const bcm963xx_boards_dt[] = { +@@ -1771,6 +1818,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 ++ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, }, + #endif + #endif /* CONFIG_OF */ + { }, diff --git a/target/linux/brcm63xx/patches-4.9/558-board_AR1004G.patch b/target/linux/brcm63xx/patches-4.9/558-board_AR1004G.patch new file mode 100644 index 000000000..dc3c13ef4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/558-board_AR1004G.patch @@ -0,0 +1,48 @@ +From: "mexit@o2.pl" +Date: Sun, 24 Nov 2013 21:33:38 +0000 +Subject: [PATCH 4/5] brcm63xx: add support for Asmax AR 1004g router + +Support for Asmax AR 1004g router + +Signed-off-by: Adrian Feliks +--- +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -655,6 +655,21 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct board_info __initdata board_96348gw_10_AR1004G = { ++ .name = "AR1004G", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++}; ++ + + /* BT Voyager 2110 */ + static struct board_info __initdata board_V2110 = { +@@ -1699,6 +1714,7 @@ static const struct board_info __initcon + &board_96348A_122, + &board_CPVA502plus, + &board_96348W3, ++ &board_96348gw_10_AR1004G, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 +@@ -1763,6 +1779,7 @@ static struct of_device_id const bcm963x + { .compatible = "dynalink,rta770w", .data = &board_rta770w, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6348 ++ { .compatible = "asmax,ar1004g", .data = &board_96348gw_10_AR1004G, }, + { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, }, + { .compatible = "brcm,bcm96348r", .data = &board_96348r, }, + { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, }, diff --git a/target/linux/brcm63xx/patches-4.9/559-board_vw6339gu.patch b/target/linux/brcm63xx/patches-4.9/559-board_vw6339gu.patch new file mode 100644 index 000000000..dff30121b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/559-board_vw6339gu.patch @@ -0,0 +1,70 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1660,6 +1660,51 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_vw6339gu = { ++ .name = "VW6339GU", ++ .expected_cpu_id = 0x63268, ++ ++ .has_ehci0 = 1, ++ .has_ohci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "LAN2", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN4", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ ++ [4] = { ++ .used = 1, ++ .phy_id = 7, ++ .name = "WAN", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_63268 */ + + /* +@@ -1746,6 +1791,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + &board_963269bhr, ++ &board_vw6339gu, + #endif + }; + +@@ -1836,6 +1882,7 @@ static struct of_device_id const bcm963x + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, }, ++ { .compatible = "inteno,vg50", .data = &board_vw6339gu, }, + #endif + #endif /* CONFIG_OF */ + { }, diff --git a/target/linux/brcm63xx/patches-4.9/560-board_963268gu_p300.patch b/target/linux/brcm63xx/patches-4.9/560-board_963268gu_p300.patch new file mode 100644 index 000000000..4819fc545 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/560-board_963268gu_p300.patch @@ -0,0 +1,83 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1622,6 +1622,64 @@ static struct board_info __initdata boar + * known 63268/63269 boards + */ + #ifdef CONFIG_BCM63XX_CPU_63268 ++static struct board_info __initdata board_963268bu_p300 = { ++ .name = "963268BU_P300", ++ .expected_cpu_id = 0x63268, ++ ++ .has_ehci0 = 1, ++ .has_ohci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_usbd = 1, ++ ++ .usbd = { ++ .use_fullspeed = 0, ++ .port_no = 0, ++ }, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 17, ++ .name = "FE1", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "GbE2", ++ }, ++ ++ [4] = { ++ .used = 1, ++ .phy_id = 0, ++ .name = "GbE3", ++ }, ++ ++ [5] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "GbE1", ++ }, ++ ++ [6] = { ++ .used = 1, ++ .phy_id = 24, ++ .name = "GbE4", ++ }, ++ ++ [7] = { ++ .used = 1, ++ .phy_id = 25, ++ .name = "GbE5", ++ }, ++ }, ++ }, ++}; ++ + static struct board_info __initdata board_963269bhr = { + .name = "963269BHR", + .expected_cpu_id = 0x63268, +@@ -1790,6 +1848,7 @@ static const struct board_info __initcon + &board_96368mvngr, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 ++ &board_963268bu_p300, + &board_963269bhr, + &board_vw6339gu, + #endif +@@ -1881,6 +1940,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 ++ { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, }, + { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, }, + { .compatible = "inteno,vg50", .data = &board_vw6339gu, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.9/561-board_WAP-5813n.patch b/target/linux/brcm63xx/patches-4.9/561-board_WAP-5813n.patch new file mode 100644 index 000000000..675185035 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/561-board_WAP-5813n.patch @@ -0,0 +1,75 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -13,6 +13,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -1616,6 +1618,47 @@ static struct board_info __initdata boar + .has_ohci0 = 1, + .has_ehci0 = 1, + }; ++ ++static struct sprom_fixup __initdata wap5813n_fixups[] = { ++ { .offset = 97, .value = 0xfeed }, ++ { .offset = 98, .value = 0x15d1 }, ++ { .offset = 99, .value = 0xfb0d }, ++ { .offset = 113, .value = 0xfef7 }, ++ { .offset = 114, .value = 0x15f7 }, ++ { .offset = 115, .value = 0xfb1a }, ++}; ++ ++static struct board_info __initdata board_WAP5813n = { ++ .name = "96369R-1231N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [4] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = wap5813n_fixups, ++ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups), ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6368 */ + + /* +@@ -1846,6 +1889,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + &board_963268bu_p300, +@@ -1938,6 +1982,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6368 + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, ++ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, }, diff --git a/target/linux/brcm63xx/patches-4.9/562-board_VR-3025u.patch b/target/linux/brcm63xx/patches-4.9/562-board_VR-3025u.patch new file mode 100644 index 000000000..29413e947 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/562-board_VR-3025u.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1619,6 +1619,59 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct sprom_fixup __initdata vr3025u_fixups[] = { ++ { .offset = 97, .value = 0xfeb3 }, ++ { .offset = 98, .value = 0x1618 }, ++ { .offset = 99, .value = 0xfab0 }, ++ { .offset = 113, .value = 0xfed1 }, ++ { .offset = 114, .value = 0x1609 }, ++ { .offset = 115, .value = 0xfad9 }, ++}; ++ ++static struct board_info __initdata board_VR3025u = { ++ .name = "96368M-1541N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = vr3025u_fixups, ++ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -1889,6 +1942,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_VR3025u, + &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 +@@ -1982,6 +2036,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6368 + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, ++ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.9/563-board_VR-3025un.patch b/target/linux/brcm63xx/patches-4.9/563-board_VR-3025un.patch new file mode 100644 index 000000000..81ac7021c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/563-board_VR-3025un.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1672,6 +1672,59 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata vr3025un_fixups[] = { ++ { .offset = 97, .value = 0xfeb3 }, ++ { .offset = 98, .value = 0x1618 }, ++ { .offset = 99, .value = 0xfab0 }, ++ { .offset = 113, .value = 0xfed1 }, ++ { .offset = 114, .value = 0x1609 }, ++ { .offset = 115, .value = 0xfad9 }, ++}; ++ ++static struct board_info __initdata board_VR3025un = { ++ .name = "96368M-1341N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = vr3025un_fixups, ++ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -1943,6 +1996,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_VR3025u, ++ &board_VR3025un, + &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 +@@ -2037,6 +2091,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, ++ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.9/564-board_P870HW-51a_v2.patch b/target/linux/brcm63xx/patches-4.9/564-board_P870HW-51a_v2.patch new file mode 100644 index 000000000..cdab8de25 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/564-board_P870HW-51a_v2.patch @@ -0,0 +1,67 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1628,6 +1628,48 @@ static struct sprom_fixup __initdata vr3 + { .offset = 115, .value = 0xfad9 }, + }; + ++static struct board_info __initdata board_P870HW51A_V2 = { ++ .name = "P870HW-51a_v2", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_VR3025u = { + .name = "96368M-1541N", + .expected_cpu_id = 0x6368, +@@ -1995,6 +2037,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, + &board_WAP5813n, +@@ -2093,6 +2136,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 + { .compatible = "brcm,bcm963268bu_p300", .data = &board_963268bu_p300, }, diff --git a/target/linux/brcm63xx/patches-4.9/565-board_hw520.patch b/target/linux/brcm63xx/patches-4.9/565-board_hw520.patch new file mode 100644 index 000000000..75b7ef96e --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/565-board_hw520.patch @@ -0,0 +1,55 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1312,6 +1312,36 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HW520 = { ++ .name = "HW6358GW_B", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enet0 = 1, ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4318, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_HW553 = { + .name = "HW553", + .expected_cpu_id = 0x6358, +@@ -2021,6 +2051,7 @@ static const struct board_info __initcon + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + &board_ct6373_1, ++ &board_HW520, + &board_HW553, + &board_HW556_A, + &board_HW556_B, +@@ -2113,6 +2144,7 @@ static struct of_device_id const bcm963x + { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, }, + { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, }, + { .compatible = "d-link,dva-g3810bn/tl", .data = &board_DVAG3810BN, }, ++ { .compatible = "huawei,hg520v", .data = &board_HW520, }, + { .compatible = "huawei,hg553", .data = &board_HW553, }, + { .compatible = "huawei,hg556a-a", .data = &board_HW556_A, }, + { .compatible = "huawei,hg556a-b", .data = &board_HW556_B, }, diff --git a/target/linux/brcm63xx/patches-4.9/566-board_A4001N.patch b/target/linux/brcm63xx/patches-4.9/566-board_A4001N.patch new file mode 100644 index 000000000..2e194a54f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/566-board_A4001N.patch @@ -0,0 +1,68 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -349,6 +349,49 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_A4001N = { ++ .name = "96328dg2x2", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43225, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ + static struct board_info __initdata board_A4001N1 = { + .name = "963281T_TEF", + .expected_cpu_id = 0x6328, +@@ -2002,6 +2045,7 @@ static const struct board_info __initcon + &board_AR5381u, + &board_AR5387un, + &board_963281TAN, ++ &board_A4001N, + &board_A4001N1, + &board_dsl_274xb_f1, + &board_FAST2704V2, +@@ -2090,6 +2134,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 ++ { .compatible = "adb,a4001n", .data = &board_A4001N, }, + { .compatible = "adb,a4001n1", .data = &board_A4001N1, }, + { .compatible = "brcm,bcm963281TAN", .data = &board_963281TAN, }, + { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, }, diff --git a/target/linux/brcm63xx/patches-4.9/567-board_dsl-2751b_e1.patch b/target/linux/brcm63xx/patches-4.9/567-board_dsl-2751b_e1.patch new file mode 100644 index 000000000..9852f3460 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/567-board_dsl-2751b_e1.patch @@ -0,0 +1,93 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -142,6 +142,74 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = { ++ { .offset = 96, .value = 0x2046 }, ++ { .offset = 97, .value = 0xfe9d }, ++ { .offset = 98, .value = 0x1854 }, ++ { .offset = 99, .value = 0xfa59 }, ++ { .offset = 112, .value = 0x2046 }, ++ { .offset = 113, .value = 0xfe79 }, ++ { .offset = 114, .value = 0x17f5 }, ++ { .offset = 115, .value = 0xfa47 }, ++ { .offset = 161, .value = 0x2222 }, ++ { .offset = 162, .value = 0x2222 }, ++ { .offset = 169, .value = 0x2222 }, ++ { .offset = 170, .value = 0x2222 }, ++ { .offset = 171, .value = 0x5555 }, ++ { .offset = 172, .value = 0x5555 }, ++ { .offset = 173, .value = 0x4444 }, ++ { .offset = 174, .value = 0x4444 }, ++ { .offset = 175, .value = 0x5555 }, ++ { .offset = 176, .value = 0x5555 }, ++}; ++ ++static struct board_info __initdata board_dsl_2751b_d1 = { ++ .name = "AW5200B", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_enetsw = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = dsl2751b_e1_fixups, ++ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups), ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6318 */ + + /* +@@ -2039,6 +2107,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6318 + &board_96318ref, + &board_96318ref_p300, ++ &board_dsl_2751b_d1, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, +@@ -2132,6 +2201,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6318 + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, ++ { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n", .data = &board_A4001N, }, diff --git a/target/linux/brcm63xx/patches-4.9/568-board_DGND3700v1_3800B.patch b/target/linux/brcm63xx/patches-4.9/568-board_DGND3700v1_3800B.patch new file mode 100644 index 000000000..cc31a8188 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/568-board_DGND3700v1_3800B.patch @@ -0,0 +1,49 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1760,6 +1760,30 @@ static struct board_info __initdata boar + .has_ehci0 = 1, + }; + ++static struct board_info __initdata board_DGND3700v1_3800B = { ++ .name = "DGND3700v1_3800B", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [5] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++}; ++ + static struct sprom_fixup __initdata vr3025u_fixups[] = { + { .offset = 97, .value = 0xfeb3 }, + { .offset = 98, .value = 0x1618 }, +@@ -2181,6 +2205,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6368 + &board_96368mvwg, + &board_96368mvngr, ++ &board_DGND3700v1_3800B, + &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, +@@ -2283,6 +2308,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.9/569-board_homehub2a.patch b/target/linux/brcm63xx/patches-4.9/569-board_homehub2a.patch new file mode 100644 index 000000000..8dca58683 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/569-board_homehub2a.patch @@ -0,0 +1,50 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1423,6 +1423,31 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_homehub2a = { ++ .name = "HOMEHUB2A", ++ .expected_cpu_id = 0x6358, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enet1 = 1, ++ .enet1 = { ++ .has_phy = 1, ++ .phy_id = 0, ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM4322, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++}; ++ + static struct board_info __initdata board_HW520 = { + .name = "HW6358GW_B", + .expected_cpu_id = 0x6358, +@@ -2188,6 +2213,7 @@ static const struct board_info __initcon + &board_nb4_ser_r0, + &board_nb4_fxc_r1, + &board_ct6373_1, ++ &board_homehub2a, + &board_HW520, + &board_HW553, + &board_HW556_A, +@@ -2297,6 +2323,7 @@ static struct of_device_id const bcm963x + { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, }, + { .compatible = "t-com,spw303v", .data = &board_spw303v, }, + { .compatible = "telsey,cpva642", .data = &board_CPVA642, }, ++ { .compatible = "thomson,homehub2a", .data = &board_homehub2a, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6362 + { .compatible = "sagem,f@st2504n", .data = &board_fast2504n, }, diff --git a/target/linux/brcm63xx/patches-4.9/570-board_HG655b.patch b/target/linux/brcm63xx/patches-4.9/570-board_HG655b.patch new file mode 100644 index 000000000..8fa9112b8 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/570-board_HG655b.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1809,6 +1809,52 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HG655b = { ++ .name = "HW65x", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_RALINK, ++ .caldata_offset = 0x7c0000, ++ .slot = 1, ++ .eeprom = "rt2x00.eeprom", ++ }, ++ }, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++}; ++ + static struct sprom_fixup __initdata vr3025u_fixups[] = { + { .offset = 97, .value = 0xfeb3 }, + { .offset = 98, .value = 0x1618 }, +@@ -2232,6 +2278,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, ++ &board_HG655b, + &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, +@@ -2335,6 +2382,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.9/571-board_fast2704n.patch b/target/linux/brcm63xx/patches-4.9/571-board_fast2704n.patch new file mode 100644 index 000000000..bdae1a7e4 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/571-board_fast2704n.patch @@ -0,0 +1,64 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -210,6 +210,45 @@ static struct board_info __initdata boar + .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups), + }, + }; ++ ++static struct board_info __initdata board_FAST2704N = { ++ .name = "F@ST2704N", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_enetsw = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++}; + #endif /* CONFIG_BCM63XX_CPU_6318 */ + + /* +@@ -2203,6 +2242,7 @@ static const struct board_info __initcon + &board_96318ref, + &board_96318ref_p300, + &board_dsl_2751b_d1, ++ &board_FAST2704N, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, +@@ -2300,6 +2340,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, + { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, }, ++ { .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + { .compatible = "adb,a4001n", .data = &board_A4001N, }, diff --git a/target/linux/brcm63xx/patches-4.9/572-board_VR-3026e.patch b/target/linux/brcm63xx/patches-4.9/572-board_VR-3026e.patch new file mode 100644 index 000000000..260424bee --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/572-board_VR-3026e.patch @@ -0,0 +1,78 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -2042,6 +2042,59 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata vr3026e_fixups[] = { ++ { .offset = 97, .value = 0xfeb3 }, ++ { .offset = 98, .value = 0x1618 }, ++ { .offset = 99, .value = 0xfab0 }, ++ { .offset = 113, .value = 0xfed1 }, ++ { .offset = 114, .value = 0x1609 }, ++ { .offset = 115, .value = 0xfad9 }, ++}; ++ ++static struct board_info __initdata board_VR3026e = { ++ .name = "96368MT-1341N1", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43222, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = vr3026e_fixups, ++ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -2322,6 +2375,7 @@ static const struct board_info __initcon + &board_P870HW51A_V2, + &board_VR3025u, + &board_VR3025un, ++ &board_VR3026e, + &board_WAP5813n, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 +@@ -2422,6 +2476,7 @@ static struct of_device_id const bcm963x + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, ++ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, diff --git a/target/linux/brcm63xx/patches-4.9/573-board_R5010UNv2.patch b/target/linux/brcm63xx/patches-4.9/573-board_R5010UNv2.patch new file mode 100644 index 000000000..2764846a0 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/573-board_R5010UNv2.patch @@ -0,0 +1,69 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -623,6 +623,50 @@ static struct board_info __initdata boar + }, + }, + }; ++ ++static struct board_info __initdata board_R5010UNV2 = { ++ .name = "96328ang", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "Port 1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "Port 2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "Port 3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "Port 4", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ }, ++}; ++ + #endif /* CONFIG_BCM63XX_CPU_6328 */ + + /* +@@ -2306,6 +2350,7 @@ static const struct board_info __initcon + &board_A4001N1, + &board_dsl_274xb_f1, + &board_FAST2704V2, ++ &board_R5010UNV2, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + &board_96338gw, +@@ -2404,6 +2449,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, }, + { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, }, + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, ++ { .compatible = "nucom,r5010unv2", .data = &board_R5010UNV2, }, + { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 diff --git a/target/linux/brcm63xx/patches-4.9/574-board_HG622.patch b/target/linux/brcm63xx/patches-4.9/574-board_HG622.patch new file mode 100644 index 000000000..860c0e787 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/574-board_HG622.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1938,6 +1938,52 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_HG622 = { ++ .name = "96368MVWG_hg622", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_caldata = 1, ++ .caldata = { ++ { ++ .vendor = PCI_VENDOR_ID_RALINK, ++ .caldata_offset = 0xfa0000, ++ .slot = 1, ++ .eeprom = "rt2x00.eeprom", ++ }, ++ }, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++}; ++ + static struct sprom_fixup __initdata vr3025u_fixups[] = { + { .offset = 97, .value = 0xfeb3 }, + { .offset = 98, .value = 0x1618 }, +@@ -2416,6 +2462,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, ++ &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, + &board_VR3025u, +@@ -2524,6 +2571,7 @@ static struct of_device_id const bcm963x + { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, }, + { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, }, + { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, }, ++ { .compatible = "huawei,hg622", .data = &board_HG622, }, + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, diff --git a/target/linux/brcm63xx/patches-4.9/575-board_EVG2000.patch b/target/linux/brcm63xx/patches-4.9/575-board_EVG2000.patch new file mode 100644 index 000000000..4c9d19ac6 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/575-board_EVG2000.patch @@ -0,0 +1,61 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1892,6 +1892,42 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata EVG2000_fixups[] = { ++ { .offset = 219, .value = 0xec08 }, ++}; ++ ++static struct board_info __initdata board_EVG2000 = { ++ .name = "96369PVG", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [5] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .type = SPROM_BCM4322, ++ .pci_bus = 0, ++ .pci_dev = 1, ++ .board_fixups = EVG2000_fixups, ++ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups), ++ }, ++}; ++ + static struct board_info __initdata board_HG655b = { + .name = "HW65x", + .expected_cpu_id = 0x6368, +@@ -2462,6 +2498,7 @@ static const struct board_info __initcon + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, ++ &board_EVG2000, + &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, +@@ -2574,6 +2611,7 @@ static struct of_device_id const bcm963x + { .compatible = "huawei,hg622", .data = &board_HG622, }, + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, ++ { .compatible = "netgear,evg2000", .data = &board_EVG2000, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.9/576-board_AV4202N.patch b/target/linux/brcm63xx/patches-4.9/576-board_AV4202N.patch new file mode 100644 index 000000000..927ce2735 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/576-board_AV4202N.patch @@ -0,0 +1,70 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -1782,6 +1782,51 @@ static struct board_info __initdata boar + * known 6368 boards + */ + #ifdef CONFIG_BCM63XX_CPU_6368 ++static struct board_info __initdata board_AV4202N = { ++ .name = "96368_Swiss_S1", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "port1", ++ }, ++ ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "port2", ++ }, ++ ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "port3", ++ }, ++ ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "port4", ++ }, ++ }, ++ }, ++ .use_fallback_sprom = 1, ++ .fallback_sprom = { ++ .pci_bus = 0, ++ .pci_dev = 1, ++ }, ++ ++}; ++ + static struct board_info __initdata board_96368mvwg = { + .name = "96368MVWG", + .expected_cpu_id = 0x6368, +@@ -2495,6 +2540,7 @@ static const struct board_info __initcon + #endif + + #ifdef CONFIG_BCM63XX_CPU_6368 ++ &board_AV4202N, + &board_96368mvwg, + &board_96368mvngr, + &board_DGND3700v1_3800B, +@@ -2602,6 +2648,7 @@ static struct of_device_id const bcm963x + { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "adb,av4202n", .data = &board_AV4202N, }, + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, + { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, }, diff --git a/target/linux/brcm63xx/patches-4.9/577-board_VH4032N.patch b/target/linux/brcm63xx/patches-4.9/577-board_VH4032N.patch new file mode 100644 index 000000000..e9bf9a768 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/577-board_VH4032N.patch @@ -0,0 +1,63 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -2266,6 +2266,44 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_VH4032N = { ++ .name = "VH4032N", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 2, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "LAN4", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ }, ++ }, ++ ++ .use_fallback_sprom = 1, ++}; ++ + static struct sprom_fixup __initdata wap5813n_fixups[] = { + { .offset = 97, .value = 0xfeed }, + { .offset = 98, .value = 0x15d1 }, +@@ -2548,6 +2586,7 @@ static const struct board_info __initcon + &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, ++ &board_VH4032N, + &board_VR3025u, + &board_VR3025un, + &board_VR3026e, +@@ -2659,6 +2698,7 @@ static struct of_device_id const bcm963x + { .compatible = "huawei,hg655b", .data = &board_HG655b, }, + { .compatible = "netgear,dgnd3700v1", .data = &board_DGND3700v1_3800B, }, + { .compatible = "netgear,evg2000", .data = &board_EVG2000, }, ++ { .compatible = "observa,vh4032n", .data = &board_VH4032N, }, + { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_63268 diff --git a/target/linux/brcm63xx/patches-4.9/578-board_R1000H.patch b/target/linux/brcm63xx/patches-4.9/578-board_R1000H.patch new file mode 100644 index 000000000..4b4b1a0de --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/578-board_R1000H.patch @@ -0,0 +1,48 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -2116,6 +2116,29 @@ static struct board_info __initdata boar + }, + }; + ++static struct board_info __initdata board_R1000H = { ++ .name = "R1000H", ++ .expected_cpu_id = 0x6368, ++ ++ .has_pci = 1, ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .has_enetsw = 1, ++ .enetsw = { ++ .used_ports = { ++ [5] = { ++ .used = 1, ++ .phy_id = 0xff, ++ .bypass_link = 1, ++ .force_speed = 1000, ++ .force_duplex_full = 1, ++ .name = "RGMII", ++ }, ++ }, ++ }, ++}; ++ + static struct board_info __initdata board_VR3025u = { + .name = "96368M-1541N", + .expected_cpu_id = 0x6368, +@@ -2586,6 +2609,7 @@ static const struct board_info __initcon + &board_HG622, + &board_HG655b, + &board_P870HW51A_V2, ++ &board_R1000H, + &board_VH4032N, + &board_VR3025u, + &board_VR3025un, +@@ -2687,6 +2711,7 @@ static struct of_device_id const bcm963x + { .compatible = "sfr,nb6-ser-r0", .data = &board_nb6, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6368 ++ { .compatible = "actiontec,r1000h", .data = &board_R1000H, }, + { .compatible = "adb,av4202n", .data = &board_AV4202N, }, + { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, }, + { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, }, diff --git a/target/linux/brcm63xx/patches-4.9/579-board_AR-5315u.patch b/target/linux/brcm63xx/patches-4.9/579-board_AR-5315u.patch new file mode 100644 index 000000000..1974ccd81 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/579-board_AR-5315u.patch @@ -0,0 +1,86 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -143,6 +143,67 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ar5315u_fixups[] = { ++ { .offset = 6, .value = 0x1c00 }, ++ { .offset = 65, .value = 0x1255 }, ++ { .offset = 97, .value = 0xfe55 }, ++ { .offset = 98, .value = 0x171d }, ++ { .offset = 99, .value = 0xfa42 }, ++ { .offset = 113, .value = 0xfeb7 }, ++ { .offset = 114, .value = 0x18cd }, ++ { .offset = 115, .value = 0xfa4f }, ++ { .offset = 162, .value = 0x6444 }, ++ { .offset = 170, .value = 0x6444 }, ++ { .offset = 172, .value = 0x6444 }, ++}; ++ ++static struct board_info __initdata board_AR5315u = { ++ .name = "96318A-1441N1", ++ .expected_cpu_id = 0x6318, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_enetsw = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "LAN4", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ar5315u_fixups, ++ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = { + { .offset = 96, .value = 0x2046 }, + { .offset = 97, .value = 0xfe9d }, +@@ -2526,6 +2587,7 @@ static const struct board_info __initcon + #ifdef CONFIG_BCM63XX_CPU_6318 + &board_96318ref, + &board_96318ref_p300, ++ &board_AR5315u, + &board_dsl_2751b_d1, + &board_FAST2704N, + #endif +@@ -2631,6 +2693,7 @@ static struct of_device_id const bcm963x + #ifdef CONFIG_BCM63XX_CPU_6318 + { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, }, + { .compatible = "brcm,bcm96318ref_p300", .data = &board_96318ref_p300, }, ++ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, }, + { .compatible = "d-link,dsl-275xb-d", .data = &board_dsl_2751b_d1, }, + { .compatible = "sagem,f@st2704n", .data = &board_FAST2704N, }, + #endif diff --git a/target/linux/brcm63xx/patches-4.9/580-board_AD1018.patch b/target/linux/brcm63xx/patches-4.9/580-board_AD1018.patch new file mode 100644 index 000000000..7b28a24e3 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/580-board_AD1018.patch @@ -0,0 +1,92 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -357,6 +357,73 @@ static struct board_info __initdata boar + }, + }; + ++static struct sprom_fixup __initdata ad1018_fixups[] = { ++ { .offset = 6, .value = 0x1c00 }, ++ { .offset = 65, .value = 0x1256 }, ++ { .offset = 96, .value = 0x2046 }, ++ { .offset = 97, .value = 0xfe69 }, ++ { .offset = 98, .value = 0x1726 }, ++ { .offset = 99, .value = 0xfa5c }, ++ { .offset = 112, .value = 0x2046 }, ++ { .offset = 113, .value = 0xfea8 }, ++ { .offset = 114, .value = 0x1978 }, ++ { .offset = 115, .value = 0xfa26 }, ++ { .offset = 161, .value = 0x2222 }, ++ { .offset = 169, .value = 0x2222 }, ++ { .offset = 171, .value = 0x2222 }, ++ { .offset = 173, .value = 0x2222 }, ++ { .offset = 174, .value = 0x4444 }, ++ { .offset = 175, .value = 0x2222 }, ++ { .offset = 176, .value = 0x4444 }, ++}; ++ ++static struct board_info __initdata board_AD1018 = { ++ .name = "96328avngr", ++ .expected_cpu_id = 0x6328, ++ ++ .has_pci = 1, ++ .use_fallback_sprom = 1, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ .num_usbh_ports = 1, ++ ++ .has_enetsw = 1, ++ ++ .enetsw = { ++ .used_ports = { ++ [0] = { ++ .used = 1, ++ .phy_id = 1, ++ .name = "FIBRE", ++ }, ++ [1] = { ++ .used = 1, ++ .phy_id = 2, ++ .name = "LAN3", ++ }, ++ [2] = { ++ .used = 1, ++ .phy_id = 3, ++ .name = "LAN2", ++ }, ++ [3] = { ++ .used = 1, ++ .phy_id = 4, ++ .name = "LAN1", ++ }, ++ }, ++ }, ++ ++ .fallback_sprom = { ++ .type = SPROM_BCM43217, ++ .pci_bus = 1, ++ .pci_dev = 0, ++ .board_fixups = ad1018_fixups, ++ .num_board_fixups = ARRAY_SIZE(ad1018_fixups), ++ }, ++}; ++ + static struct sprom_fixup __initdata ar5381u_fixups[] = { + { .offset = 97, .value = 0xfee5 }, + { .offset = 98, .value = 0x157c }, +@@ -2593,6 +2660,7 @@ static const struct board_info __initcon + #endif + #ifdef CONFIG_BCM63XX_CPU_6328 + &board_96328avng, ++ &board_AD1018, + &board_AR5381u, + &board_AR5387un, + &board_963281TAN, +@@ -2707,6 +2775,7 @@ static struct of_device_id const bcm963x + { .compatible = "d-link,dsl-274xb-f", .data = &board_dsl_274xb_f1, }, + { .compatible = "nucom,r5010unv2", .data = &board_R5010UNV2, }, + { .compatible = "sagem,f@st2704v2", .data = &board_FAST2704V2, }, ++ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, }, + #endif + #ifdef CONFIG_BCM63XX_CPU_6338 + { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, }, diff --git a/target/linux/brcm63xx/patches-4.9/800-wl_exports.patch b/target/linux/brcm63xx/patches-4.9/800-wl_exports.patch new file mode 100644 index 000000000..7460c8a3f --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/800-wl_exports.patch @@ -0,0 +1,25 @@ +--- a/arch/mips/bcm63xx/nvram.c ++++ b/arch/mips/bcm63xx/nvram.c +@@ -24,6 +24,12 @@ + static struct bcm963xx_nvram nvram; + static int mac_addr_used; + ++/* ++ * Required export for WL ++ */ ++u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 }; ++EXPORT_SYMBOL(nvram_buf); ++ + void __init bcm63xx_nvram_init(void *addr) + { + u32 crc, expected_crc; +--- a/arch/mips/mm/cache.c ++++ b/arch/mips/mm/cache.c +@@ -63,6 +63,7 @@ void (*_dma_cache_wback)(unsigned long s + void (*_dma_cache_inv)(unsigned long start, unsigned long size); + + EXPORT_SYMBOL(_dma_cache_wback_inv); ++EXPORT_SYMBOL(_dma_cache_inv); + + #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */ + diff --git a/target/linux/brcm63xx/patches-4.9/801-ssb_export_fallback_sprom.patch b/target/linux/brcm63xx/patches-4.9/801-ssb_export_fallback_sprom.patch new file mode 100644 index 000000000..11a83536b --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/801-ssb_export_fallback_sprom.patch @@ -0,0 +1,31 @@ +--- a/arch/mips/bcm63xx/sprom.c ++++ b/arch/mips/bcm63xx/sprom.c +@@ -8,6 +8,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -387,7 +388,19 @@ struct fallback_sprom_match { + struct ssb_sprom sprom; + }; + +-static struct fallback_sprom_match fallback_sprom; ++struct fallback_sprom_match fallback_sprom; ++ ++int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out) ++{ ++ if (pci_bus != fallback_sprom.pci_bus || ++ pci_slot != fallback_sprom.pci_dev) ++ pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n", ++ fallback_sprom.pci_bus, fallback_sprom.pci_dev, ++ pci_bus, pci_slot); ++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom)); ++ return 0; ++} ++EXPORT_SYMBOL(bcm63xx_get_fallback_sprom); + + #if defined(CONFIG_SSB_PCIHOST) + int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out) diff --git a/target/linux/brcm63xx/patches-4.9/802-rtl8367r_fix_RGMII_support.patch b/target/linux/brcm63xx/patches-4.9/802-rtl8367r_fix_RGMII_support.patch new file mode 100644 index 000000000..2aca2f3f7 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/802-rtl8367r_fix_RGMII_support.patch @@ -0,0 +1,30 @@ +From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001 +From: Miguel GAIO +Date: Fri, 6 Jul 2012 14:12:33 +0200 +Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support + +--- + drivers/net/phy/rtl8367.c | 5 +++++ + 1 files changed, 5 insertions(+), 0 deletions(-) + +--- a/drivers/net/phy/rtl8367.c ++++ b/drivers/net/phy/rtl8367.c +@@ -146,6 +146,10 @@ + #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1 + #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7 + ++#define RTL8367_PHY_AD_REG 0x130f ++#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5 ++#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0 ++ + #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x)) + #define RTL8367_DI_FORCE_MODE BIT(12) + #define RTL8367_DI_FORCE_NWAY BIT(7) +@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct + case RTL8367_EXTIF_MODE_RGMII_33V: + REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367); + REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777); ++ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0); + break; + + case RTL8367_EXTIF_MODE_TMII_MAC: diff --git a/target/linux/brcm63xx/patches-4.9/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch b/target/linux/brcm63xx/patches-4.9/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch new file mode 100644 index 000000000..7a3c2f01c --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/803-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch @@ -0,0 +1,26 @@ +From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 6 Apr 2014 22:33:16 +0200 +Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp + +Unligned memcpy_fromio randomly fails with an unaligned dst. Work around +it by ensuring we are always doing aligned copies. + +Should fix filename corruption in jffs2 with SMP. + +Signed-off-by: Jonas Gorski +--- + fs/jffs2/nodelist.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/jffs2/nodelist.h ++++ b/fs/jffs2/nodelist.h +@@ -259,7 +259,7 @@ struct jffs2_full_dirent + uint32_t ino; /* == zero for unlink */ + unsigned int nhash; + unsigned char type; +- unsigned char name[0]; ++ unsigned char name[0] __attribute__((aligned((sizeof(long))))); + }; + + /* diff --git a/target/linux/brcm63xx/patches-4.9/804-bcm63xx_enet_63268_rgmii_ports.patch b/target/linux/brcm63xx/patches-4.9/804-bcm63xx_enet_63268_rgmii_ports.patch new file mode 100644 index 000000000..42c52ef12 --- /dev/null +++ b/target/linux/brcm63xx/patches-4.9/804-bcm63xx_enet_63268_rgmii_ports.patch @@ -0,0 +1,13 @@ +--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c ++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c +@@ -2252,6 +2252,10 @@ static int bcm_enetsw_open(struct net_de + + rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i)); + rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN; ++ if (BCMCPU_IS_63268()) { ++ rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN; ++ rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN; ++ } + enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i)); + } + diff --git a/target/linux/cns3xxx/Makefile b/target/linux/cns3xxx/Makefile index 817bb317e..93b8d7da4 100644 --- a/target/linux/cns3xxx/Makefile +++ b/target/linux/cns3xxx/Makefile @@ -14,7 +14,7 @@ CPU_TYPE:=mpcore CPU_SUBTYPE:=vfp MAINTAINER:=Felix Fietkau -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 define Target/Description Build images for Cavium Networks Econa CNS3xxx based boards, diff --git a/target/linux/cns3xxx/base-files/lib/upgrade/platform.sh b/target/linux/cns3xxx/base-files/lib/upgrade/platform.sh index 4efa47dee..aa98b4724 100644 --- a/target/linux/cns3xxx/base-files/lib/upgrade/platform.sh +++ b/target/linux/cns3xxx/base-files/lib/upgrade/platform.sh @@ -17,15 +17,3 @@ platform_check_image() { platform_do_upgrade() { default_do_upgrade "$ARGV" } - -disable_watchdog() { - v "killing watchdog" - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} - -# CONFIG_WATCHDOG_NOWAYOUT=y - can't kill watchdog unless kernel cmdline has a mpcore_wdt.nowayout=0 -#append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/cns3xxx/config-4.9 b/target/linux/cns3xxx/config-4.14 similarity index 73% rename from target/linux/cns3xxx/config-4.9 rename to target/linux/cns3xxx/config-4.14 index 36b4857c2..5a1aab95f 100644 --- a/target/linux/cns3xxx/config-4.9 +++ b/target/linux/cns3xxx/config-4.14 @@ -1,9 +1,14 @@ +# CONFIG_AIO is not set CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_ARCH_CNS3XXX=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAS_TICK_BROADCAST=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y @@ -13,6 +18,8 @@ CONFIG_ARCH_MULTIPLATFORM=y CONFIG_ARCH_MULTI_V6=y CONFIG_ARCH_MULTI_V6_V7=y CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y @@ -20,6 +27,7 @@ CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_ARM=y @@ -38,16 +46,19 @@ CONFIG_AUTO_ZRELADDR=y CONFIG_BCM_NET_PHYLIB=y CONFIG_BLK_DEV_SD=y CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_SCSI_REQUEST=y CONFIG_BROADCOM_PHY=y CONFIG_CACHE_L2X0=y +CONFIG_CC_STACKPROTECTOR=y +# CONFIG_CC_STACKPROTECTOR_NONE is not set +CONFIG_CC_STACKPROTECTOR_REGULAR=y CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMDLINE="console=ttyS0,115200" CONFIG_CMDLINE_FORCE=y CONFIG_CNS3XXX_ETH=y CONFIG_COMMON_CLK=y +CONFIG_COREDUMP=y CONFIG_CPU_32v6=y CONFIG_CPU_32v6K=y CONFIG_CPU_ABRT_EV6=y @@ -62,8 +73,11 @@ CONFIG_CPU_HAS_ASID=y CONFIG_CPU_PABRT_V6=y CONFIG_CPU_RMAP=y # CONFIG_CPU_SW_DOMAIN_PAN is not set +CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V6=y CONFIG_CPU_V6K=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC_CCITT=m CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_HASH2=y @@ -73,27 +87,37 @@ CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_WORKQUEUE=y CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_ALIGN_RODATA=y CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_INFO=y CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" # CONFIG_DEBUG_UART_8250 is not set # CONFIG_DEBUG_USER is not set CONFIG_DMA_CACHE_FIQ_BROADCAST=y +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set CONFIG_DTC=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_EEPROM_AT24=y +CONFIG_ELF_CORE=y +CONFIG_EXPORTFS=y CONFIG_FIQ=y CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_FRAME_POINTER=y +CONFIG_FUTEX_PI=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IO=y CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y CONFIG_GENERIC_PCI_IOMAP=y @@ -107,6 +131,7 @@ CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y @@ -123,7 +148,6 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARM_SCU=y CONFIG_HAVE_ARM_TWD=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y @@ -133,6 +157,8 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y @@ -154,6 +180,7 @@ CONFIG_HAVE_SMP=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_UID16=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +# CONFIG_HNS3 is not set CONFIG_HWMON=y CONFIG_HZ_FIXED=0 CONFIG_HZ_PERIODIC=y @@ -161,20 +188,41 @@ CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_CNS3XXX=y +# CONFIG_INITRAMFS_FORCE is not set CONFIG_INITRAMFS_SOURCE="" CONFIG_IOMMU_HELPER=y +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IPV6=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MULTIPLE_TABLES=y +# CONFIG_IPV6_PIMSM_V2 is not set +CONFIG_IPV6_SUBTREES=y +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_TARGET_REJECT=m CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_WORK=y +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_UNCOMPRESSED=y CONFIG_LEDS_GPIO=y # CONFIG_LEDS_TRIGGER_NETDEV is not set CONFIG_LIBFDT=y CONFIG_LOCK_SPIN_ON_OWNER=y # CONFIG_MACH_CNS3420VB is not set CONFIG_MACH_GW2388=y -CONFIG_MDIO_BOARDINFO=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y CONFIG_MIGHT_HAVE_CACHE_L2X0=y CONFIG_MIGHT_HAVE_PCI=y CONFIG_MMC=y @@ -196,7 +244,38 @@ CONFIG_MTD_SPLIT_UIMAGE_FW=y CONFIG_MULTI_IRQ_HANDLER=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NETFILTER=y +CONFIG_NETFILTER_ADVANCED=y +CONFIG_NETFILTER_XTABLES=m +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_NAT=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_REDIRECT=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m CONFIG_NET_FLOW_LIMIT=y +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_IPV4=m +CONFIG_NF_CONNTRACK_IPV6=m +CONFIG_NF_CONNTRACK_RTCACHE=m +CONFIG_NF_DEFRAG_IPV4=m +CONFIG_NF_DEFRAG_IPV6=m +CONFIG_NF_LOG_COMMON=m +CONFIG_NF_LOG_IPV4=m +CONFIG_NF_LOG_IPV6=m +CONFIG_NF_NAT=m +CONFIG_NF_NAT_IPV4=m +CONFIG_NF_NAT_MASQUERADE_IPV4=m +CONFIG_NF_NAT_NEEDED=y +CONFIG_NF_NAT_REDIRECT=m +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_REJECT_IPV6=m CONFIG_NLS=y CONFIG_NO_BOOTMEM=y CONFIG_NR_CPUS=2 @@ -224,6 +303,7 @@ CONFIG_PCI=y CONFIG_PCI_DISABLE_COMMON_QUIRKS=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y +# CONFIG_PCI_FTPCI100 is not set CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y @@ -231,14 +311,22 @@ CONFIG_PL310_ERRATA_588369=y CONFIG_PL310_ERRATA_727915=y CONFIG_PL310_ERRATA_753970=y CONFIG_PL310_ERRATA_769419=y +CONFIG_PPP=m +CONFIG_PPPOE=m +CONFIG_PPP_ASYNC=m CONFIG_PPS=y CONFIG_PPS_CLIENT_GPIO=y +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 +CONFIG_PRINTK_TIME=y +CONFIG_PROC_VMCORE=y CONFIG_RAID_ATTRS=y CONFIG_RATIONAL=y +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y CONFIG_REGMAP_SPI=y +CONFIG_RELAY=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y CONFIG_RTC_CLASS=y @@ -256,6 +344,7 @@ CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_NR_UARTS=3 CONFIG_SERIAL_8250_RUNTIME_UARTS=3 CONFIG_SG_POOL=y +CONFIG_SLHC=m CONFIG_SMP=y CONFIG_SMP_ON_UP=y CONFIG_SPARSE_IRQ=y @@ -268,8 +357,12 @@ CONFIG_SRCU=y CONFIG_SWIOTLB=y CONFIG_SWPHY=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THIN_ARCHIVES=y CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" CONFIG_USB=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y @@ -278,16 +371,13 @@ CONFIG_USB_CNS3XXX_OHCI=y CONFIG_USB_COMMON=y CONFIG_USB_DWC2=y CONFIG_USB_DWC2_HOST=y -# CONFIG_USB_DWC2_PCI is not set # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_EHCI_PCI=y CONFIG_USB_GADGET=y CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set CONFIG_USE_OF=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_VFP=y diff --git a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c index f98eebccd..eade8f683 100644 --- a/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c +++ b/target/linux/cns3xxx/files/arch/arm/mach-cns3xxx/laguna.c @@ -389,7 +389,7 @@ static struct plat_serial8250_port laguna_uart_data[] = { .mapbase = (CNS3XXX_UART0_BASE), .irq = IRQ_CNS3XXX_UART0, .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST | UPF_IOREMAP, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_IOREMAP, .regshift = 2, .uartclk = 24000000, .type = PORT_16550A, @@ -397,7 +397,7 @@ static struct plat_serial8250_port laguna_uart_data[] = { .mapbase = (CNS3XXX_UART1_BASE), .irq = IRQ_CNS3XXX_UART1, .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST | UPF_IOREMAP, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_IOREMAP, .regshift = 2, .uartclk = 24000000, .type = PORT_16550A, @@ -405,7 +405,7 @@ static struct plat_serial8250_port laguna_uart_data[] = { .mapbase = (CNS3XXX_UART2_BASE), .irq = IRQ_CNS3XXX_UART2, .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_NO_TXEN_TEST | UPF_IOREMAP, + .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE | UPF_IOREMAP, .regshift = 2, .uartclk = 24000000, .type = PORT_16550A, diff --git a/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c b/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c index 51b01876e..07c9dbc04 100644 --- a/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c +++ b/target/linux/cns3xxx/files/drivers/net/ethernet/cavium/cns3xxx_eth.c @@ -712,26 +712,20 @@ static int eth_poll(struct napi_struct *napi, int budget) } rx_ring->cur_index = i; - if (!received) { - napi_complete(napi); - enable_irq(sw->rx_irq); - budget = 0; - /* If 1 or more frames came in during IRQ enable, re-schedule */ - if (rx_ring->desc[i].cown) - eth_schedule_poll(sw); + cns3xxx_alloc_rx_buf(sw, received); + wmb(); + enable_rx_dma(sw); + + if (received < budget && napi_complete_done(napi, received)) { + enable_irq(sw->rx_irq); } spin_lock_bh(&tx_lock); eth_complete_tx(sw); spin_unlock_bh(&tx_lock); - cns3xxx_alloc_rx_buf(sw, received); - - wmb(); - enable_rx_dma(sw); - - return budget; + return received; } static void eth_set_desc(struct sw *sw, struct _tx_ring *tx_ring, int index, @@ -856,18 +850,6 @@ static void cns3xxx_get_drvinfo(struct net_device *dev, strcpy(info->bus_info, "internal"); } -static int cns3xxx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct port *port = netdev_priv(dev); - return phy_ethtool_gset(port->phydev, cmd); -} - -static int cns3xxx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct port *port = netdev_priv(dev); - return phy_ethtool_sset(port->phydev, cmd); -} - static int cns3xxx_nway_reset(struct net_device *dev) { struct port *port = netdev_priv(dev); @@ -876,8 +858,8 @@ static int cns3xxx_nway_reset(struct net_device *dev) static struct ethtool_ops cns3xxx_ethtool_ops = { .get_drvinfo = cns3xxx_get_drvinfo, - .get_settings = cns3xxx_get_settings, - .set_settings = cns3xxx_set_settings, + .get_link_ksettings = phy_ethtool_get_link_ksettings, + .set_link_ksettings = phy_ethtool_set_link_ksettings, .nway_reset = cns3xxx_nway_reset, .get_link = ethtool_op_get_link, }; @@ -1177,7 +1159,7 @@ static int eth_init_one(struct platform_device *pdev) goto err_remove_mdio; } - strcpy(napi_dev->name, "switch%d"); + strcpy(napi_dev->name, "cns3xxx_eth"); napi_dev->features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_FRAGLIST; SET_NETDEV_DEV(napi_dev, &pdev->dev); diff --git a/target/linux/cns3xxx/image/Makefile b/target/linux/cns3xxx/image/Makefile index 99bb7f1a2..d095ce11f 100644 --- a/target/linux/cns3xxx/image/Makefile +++ b/target/linux/cns3xxx/image/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/image.mk define Image/Prepare - mkimage -A arm -O linux -T kernel -C none -a 0x20008000 -e 0x20008000 -n 'OpenWrt Linux-$(LINUX_VERSION)' -d $(KDIR)/zImage $(KDIR)/uImage + mkimage -A arm -O linux -T kernel -C none -a 0x20008000 -e 0x20008000 -n '$(VERSION_DIST) Linux-$(LINUX_VERSION)' -d $(KDIR)/zImage $(KDIR)/uImage endef LEGACY_NOR_KERNEL_SIZE = 2048k @@ -27,7 +27,7 @@ define BuildFirmware/Legacy endef define Image/BuildKernel/Initramfs - mkimage -A arm -O linux -T kernel -C none -a 0x20008000 -e 0x20008000 -n 'OpenWrt Linux-$(LINUX_VERSION)' -d $(KDIR)/zImage-initramfs $(BIN_DIR)/$(IMG_PREFIX)-initramfs-uImage + mkimage -A arm -O linux -T kernel -C none -a 0x20008000 -e 0x20008000 -n '$(VERSION_DIST) Linux-$(LINUX_VERSION)' -d $(KDIR)/zImage-initramfs $(BIN_DIR)/$(IMG_PREFIX)-initramfs-uImage endef define Image/Build diff --git a/target/linux/cns3xxx/patches-4.9/000-cns3xxx_arch_include.patch b/target/linux/cns3xxx/patches-4.14/000-cns3xxx_arch_include.patch similarity index 83% rename from target/linux/cns3xxx/patches-4.9/000-cns3xxx_arch_include.patch rename to target/linux/cns3xxx/patches-4.14/000-cns3xxx_arch_include.patch index f98fe0c2b..3ae759021 100644 --- a/target/linux/cns3xxx/patches-4.9/000-cns3xxx_arch_include.patch +++ b/target/linux/cns3xxx/patches-4.14/000-cns3xxx_arch_include.patch @@ -1,6 +1,7 @@ --- a/arch/arm/mach-cns3xxx/Makefile +++ b/arch/arm/mach-cns3xxx/Makefile -@@ -1,3 +1,5 @@ +@@ -1,4 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include + obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o diff --git a/target/linux/cns3xxx/patches-4.14/001-arm_openwrt_machtypes.patch b/target/linux/cns3xxx/patches-4.14/001-arm_openwrt_machtypes.patch new file mode 100644 index 000000000..17a83ea7a --- /dev/null +++ b/target/linux/cns3xxx/patches-4.14/001-arm_openwrt_machtypes.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/tools/mach-types ++++ b/arch/arm/tools/mach-types +@@ -448,6 +448,7 @@ gplugd MACH_GPLUGD GPLUGD 2625 + qsd8x50a_st1_5 MACH_QSD8X50A_ST1_5 QSD8X50A_ST1_5 2627 + mx23evk MACH_MX23EVK MX23EVK 2629 + ap4evb MACH_AP4EVB AP4EVB 2630 ++gw2388 MACH_GW2388 GW2388 2635 + mityomapl138 MACH_MITYOMAPL138 MITYOMAPL138 2650 + guruplug MACH_GURUPLUG GURUPLUG 2659 + spear310 MACH_SPEAR310 SPEAR310 2660 diff --git a/target/linux/cns3xxx/patches-4.9/010-arm_introduce-dma-fiq-irq-broadcast.patch b/target/linux/cns3xxx/patches-4.14/010-arm_introduce-dma-fiq-irq-broadcast.patch similarity index 95% rename from target/linux/cns3xxx/patches-4.9/010-arm_introduce-dma-fiq-irq-broadcast.patch rename to target/linux/cns3xxx/patches-4.14/010-arm_introduce-dma-fiq-irq-broadcast.patch index b2b6f509d..ca7148b30 100644 --- a/target/linux/cns3xxx/patches-4.9/010-arm_introduce-dma-fiq-irq-broadcast.patch +++ b/target/linux/cns3xxx/patches-4.14/010-arm_introduce-dma-fiq-irq-broadcast.patch @@ -20,7 +20,7 @@ #endif --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig -@@ -873,6 +873,17 @@ config DMA_CACHE_RWFO +@@ -899,6 +899,17 @@ config DMA_CACHE_RWFO in hardware, other workarounds are needed (e.g. cache maintenance broadcasting in software via FIQ). @@ -48,7 +48,7 @@ /* * The zero page is never written to, so never has any dirty -@@ -329,7 +330,10 @@ void flush_dcache_page(struct page *page +@@ -335,7 +336,10 @@ void flush_dcache_page(struct page *page mapping = page_mapping(page); @@ -62,7 +62,7 @@ else { --- a/arch/arm/mm/dma.h +++ b/arch/arm/mm/dma.h -@@ -4,8 +4,13 @@ +@@ -5,8 +5,13 @@ #include #ifndef MULTI_CACHE diff --git a/target/linux/cns3xxx/patches-4.9/020-watchdog_support.patch b/target/linux/cns3xxx/patches-4.14/020-watchdog_support.patch similarity index 95% rename from target/linux/cns3xxx/patches-4.9/020-watchdog_support.patch rename to target/linux/cns3xxx/patches-4.14/020-watchdog_support.patch index 4f9f3e646..6dd0ef0fe 100644 --- a/target/linux/cns3xxx/patches-4.9/020-watchdog_support.patch +++ b/target/linux/cns3xxx/patches-4.14/020-watchdog_support.patch @@ -4,7 +4,7 @@ Signed-off-by: Felix Fietkau --- --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig -@@ -324,6 +324,13 @@ config KS8695_WATCHDOG +@@ -355,6 +355,13 @@ config KS8695_WATCHDOG Watchdog timer embedded into KS8695 processor. This will reboot your system when the timeout is reached. @@ -20,8 +20,8 @@ Signed-off-by: Felix Fietkau help --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile -@@ -47,6 +47,7 @@ obj-$(CONFIG_21285_WATCHDOG) += wdt285.o - obj-$(CONFIG_977_WATCHDOG) += wdt977.o +@@ -49,6 +49,7 @@ obj-$(CONFIG_977_WATCHDOG) += wdt977.o + obj-$(CONFIG_GEMINI_WATCHDOG) += gemini_wdt.o obj-$(CONFIG_IXP4XX_WATCHDOG) += ixp4xx_wdt.o obj-$(CONFIG_KS8695_WATCHDOG) += ks8695_wdt.o +obj-$(CONFIG_MPCORE_WATCHDOG) += mpcore_wdt.o @@ -151,7 +151,7 @@ Signed-off-by: Felix Fietkau +MODULE_LICENSE("GPL"); --- a/arch/arm/include/asm/smp_twd.h +++ b/arch/arm/include/asm/smp_twd.h -@@ -33,5 +33,6 @@ struct twd_local_timer name __initdata = +@@ -34,5 +34,6 @@ struct twd_local_timer name __initdata = }; int twd_local_timer_register(struct twd_local_timer *); diff --git a/target/linux/cns3xxx/patches-4.9/025-smp_support.patch b/target/linux/cns3xxx/patches-4.14/025-smp_support.patch similarity index 90% rename from target/linux/cns3xxx/patches-4.9/025-smp_support.patch rename to target/linux/cns3xxx/patches-4.14/025-smp_support.patch index 7c2624a3a..dc8e4b03c 100644 --- a/target/linux/cns3xxx/patches-4.9/025-smp_support.patch +++ b/target/linux/cns3xxx/patches-4.14/025-smp_support.patch @@ -1,6 +1,6 @@ --- a/arch/arm/mach-cns3xxx/Makefile +++ b/arch/arm/mach-cns3xxx/Makefile -@@ -5,3 +5,5 @@ cns3xxx-y += core.o pm.o +@@ -6,3 +6,5 @@ cns3xxx-y += core.o pm.o cns3xxx-$(CONFIG_ATAGS) += devices.o cns3xxx-$(CONFIG_PCI) += pcie.o cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o @@ -8,7 +8,7 @@ +cns3xxx-$(CONFIG_HOTPLUG_CPU) += hotplug.o --- a/arch/arm/mach-cns3xxx/Kconfig +++ b/arch/arm/mach-cns3xxx/Kconfig -@@ -2,6 +2,9 @@ menuconfig ARCH_CNS3XXX +@@ -3,6 +3,9 @@ menuconfig ARCH_CNS3XXX bool "Cavium Networks CNS3XXX family" depends on ARCH_MULTI_V6 select ARM_GIC diff --git a/target/linux/cns3xxx/patches-4.9/030-pcie_clock.patch b/target/linux/cns3xxx/patches-4.14/030-pcie_clock.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/030-pcie_clock.patch rename to target/linux/cns3xxx/patches-4.14/030-pcie_clock.patch diff --git a/target/linux/cns3xxx/patches-4.9/040-fiq_support.patch b/target/linux/cns3xxx/patches-4.14/040-fiq_support.patch similarity index 91% rename from target/linux/cns3xxx/patches-4.9/040-fiq_support.patch rename to target/linux/cns3xxx/patches-4.14/040-fiq_support.patch index b391eb92d..a52c55450 100644 --- a/target/linux/cns3xxx/patches-4.9/040-fiq_support.patch +++ b/target/linux/cns3xxx/patches-4.14/040-fiq_support.patch @@ -1,6 +1,6 @@ --- a/arch/arm/mach-cns3xxx/Kconfig +++ b/arch/arm/mach-cns3xxx/Kconfig -@@ -5,6 +5,7 @@ menuconfig ARCH_CNS3XXX +@@ -6,6 +6,7 @@ menuconfig ARCH_CNS3XXX select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD select HAVE_SMP @@ -10,7 +10,7 @@ --- a/arch/arm/mach-cns3xxx/Makefile +++ b/arch/arm/mach-cns3xxx/Makefile -@@ -5,5 +5,5 @@ cns3xxx-y += core.o pm.o +@@ -6,5 +6,5 @@ cns3xxx-y += core.o pm.o cns3xxx-$(CONFIG_ATAGS) += devices.o cns3xxx-$(CONFIG_PCI) += pcie.o cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o @@ -29,7 +29,7 @@ */ --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig -@@ -856,7 +856,7 @@ config VDSO +@@ -882,7 +882,7 @@ config VDSO config DMA_CACHE_RWFO bool "Enable read/write for ownership DMA cache maintenance" diff --git a/target/linux/cns3xxx/patches-4.9/045-twd_base.patch b/target/linux/cns3xxx/patches-4.14/045-twd_base.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/045-twd_base.patch rename to target/linux/cns3xxx/patches-4.14/045-twd_base.patch diff --git a/target/linux/cns3xxx/patches-4.9/055-pcie_io.patch b/target/linux/cns3xxx/patches-4.14/055-pcie_io.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/055-pcie_io.patch rename to target/linux/cns3xxx/patches-4.14/055-pcie_io.patch diff --git a/target/linux/cns3xxx/patches-4.9/060-pcie_abort.patch b/target/linux/cns3xxx/patches-4.14/060-pcie_abort.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/060-pcie_abort.patch rename to target/linux/cns3xxx/patches-4.14/060-pcie_abort.patch diff --git a/target/linux/cns3xxx/patches-4.9/065-pcie_skip_inactive.patch b/target/linux/cns3xxx/patches-4.14/065-pcie_skip_inactive.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/065-pcie_skip_inactive.patch rename to target/linux/cns3xxx/patches-4.14/065-pcie_skip_inactive.patch diff --git a/target/linux/cns3xxx/patches-4.9/070-i2c_support.patch b/target/linux/cns3xxx/patches-4.14/070-i2c_support.patch similarity index 86% rename from target/linux/cns3xxx/patches-4.9/070-i2c_support.patch rename to target/linux/cns3xxx/patches-4.14/070-i2c_support.patch index dc64da1e0..bacec3608 100644 --- a/target/linux/cns3xxx/patches-4.9/070-i2c_support.patch +++ b/target/linux/cns3xxx/patches-4.14/070-i2c_support.patch @@ -1,6 +1,6 @@ --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig -@@ -441,6 +441,18 @@ config I2C_CBUS_GPIO +@@ -473,6 +473,18 @@ config I2C_CBUS_GPIO This driver can also be built as a module. If so, the module will be called i2c-cbus-gpio. @@ -21,11 +21,11 @@ depends on CPM1 || CPM2 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile -@@ -114,6 +114,7 @@ obj-$(CONFIG_I2C_VIPERBOARD) += i2c-vipe +@@ -128,6 +128,7 @@ obj-$(CONFIG_I2C_VIPERBOARD) += i2c-vipe obj-$(CONFIG_I2C_ACORN) += i2c-acorn.o obj-$(CONFIG_I2C_BCM_KONA) += i2c-bcm-kona.o obj-$(CONFIG_I2C_BRCMSTB) += i2c-brcmstb.o +obj-$(CONFIG_I2C_CNS3XXX) += i2c-cns3xxx.o obj-$(CONFIG_I2C_CROS_EC_TUNNEL) += i2c-cros-ec-tunnel.o obj-$(CONFIG_I2C_ELEKTOR) += i2c-elektor.o - obj-$(CONFIG_I2C_OPAL) += i2c-opal.o + obj-$(CONFIG_I2C_MLXCPLD) += i2c-mlxcpld.o diff --git a/target/linux/cns3xxx/patches-4.9/075-spi_support.patch b/target/linux/cns3xxx/patches-4.14/075-spi_support.patch similarity index 80% rename from target/linux/cns3xxx/patches-4.9/075-spi_support.patch rename to target/linux/cns3xxx/patches-4.14/075-spi_support.patch index aeda7a326..8a51eb396 100644 --- a/target/linux/cns3xxx/patches-4.9/075-spi_support.patch +++ b/target/linux/cns3xxx/patches-4.14/075-spi_support.patch @@ -1,6 +1,6 @@ --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig -@@ -199,6 +199,13 @@ config SPI_CLPS711X +@@ -206,6 +206,13 @@ config SPI_CLPS711X This enables dedicated general purpose SPI/Microwire1-compatible master mode interface (SSI1) for CLPS711X-based CPUs. @@ -16,7 +16,7 @@ depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x) --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile -@@ -29,6 +29,7 @@ obj-$(CONFIG_SPI_BITBANG) += spi-bitban +@@ -31,6 +31,7 @@ obj-$(CONFIG_SPI_BITBANG) += spi-bitban obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o obj-$(CONFIG_SPI_CADENCE) += spi-cadence.o obj-$(CONFIG_SPI_CLPS711X) += spi-clps711x.o @@ -26,7 +26,7 @@ obj-$(CONFIG_SPI_DLN2) += spi-dln2.o --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h -@@ -763,6 +763,10 @@ struct spi_transfer { +@@ -799,6 +799,10 @@ struct spi_transfer { u32 speed_hz; struct list_head transfer_list; @@ -39,13 +39,13 @@ /** --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c -@@ -985,6 +985,9 @@ static int spi_transfer_one_message(stru +@@ -1021,6 +1021,9 @@ static int spi_transfer_one_message(stru list_for_each_entry(xfer, &msg->transfers, transfer_list) { trace_spi_transfer_start(msg, xfer); + xfer->last_in_message_list = + list_is_last(&xfer->transfer_list, &msg->transfers); + - spi_statistics_add_transfer_stats(statm, xfer, master); - spi_statistics_add_transfer_stats(stats, xfer, master); + spi_statistics_add_transfer_stats(statm, xfer, ctlr); + spi_statistics_add_transfer_stats(stats, xfer, ctlr); diff --git a/target/linux/cns3xxx/patches-4.9/080-sata_support.patch b/target/linux/cns3xxx/patches-4.14/080-sata_support.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/080-sata_support.patch rename to target/linux/cns3xxx/patches-4.14/080-sata_support.patch diff --git a/target/linux/cns3xxx/patches-4.9/090-timers.patch b/target/linux/cns3xxx/patches-4.14/090-timers.patch similarity index 98% rename from target/linux/cns3xxx/patches-4.9/090-timers.patch rename to target/linux/cns3xxx/patches-4.14/090-timers.patch index 6f7713f20..34a4934d6 100644 --- a/target/linux/cns3xxx/patches-4.9/090-timers.patch +++ b/target/linux/cns3xxx/patches-4.14/090-timers.patch @@ -30,7 +30,7 @@ twd_local_timer_register(&cns3xx_twd_local_timer); } -+static cycle_t cns3xxx_get_cycles(struct clocksource *cs) ++static u64 cns3xxx_get_cycles(struct clocksource *cs) +{ + u64 val; + diff --git a/target/linux/cns3xxx/patches-4.9/093-add-virt-pci-io-mapping.patch b/target/linux/cns3xxx/patches-4.14/093-add-virt-pci-io-mapping.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/093-add-virt-pci-io-mapping.patch rename to target/linux/cns3xxx/patches-4.14/093-add-virt-pci-io-mapping.patch diff --git a/target/linux/cns3xxx/patches-4.9/095-gpio_support.patch b/target/linux/cns3xxx/patches-4.14/095-gpio_support.patch similarity index 97% rename from target/linux/cns3xxx/patches-4.9/095-gpio_support.patch rename to target/linux/cns3xxx/patches-4.14/095-gpio_support.patch index 76eb7f64c..8345f2f14 100644 --- a/target/linux/cns3xxx/patches-4.9/095-gpio_support.patch +++ b/target/linux/cns3xxx/patches-4.14/095-gpio_support.patch @@ -13,7 +13,7 @@ } --- a/arch/arm/mach-cns3xxx/Kconfig +++ b/arch/arm/mach-cns3xxx/Kconfig -@@ -2,6 +2,8 @@ menuconfig ARCH_CNS3XXX +@@ -3,6 +3,8 @@ menuconfig ARCH_CNS3XXX bool "Cavium Networks CNS3XXX family" depends on ARCH_MULTI_V6 select ARM_GIC @@ -24,7 +24,7 @@ select HAVE_SMP --- a/arch/arm/mach-cns3xxx/Makefile +++ b/arch/arm/mach-cns3xxx/Makefile -@@ -1,7 +1,7 @@ +@@ -2,7 +2,7 @@ ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o diff --git a/target/linux/cns3xxx/patches-4.9/097-l2x0_cmdline_disable.patch b/target/linux/cns3xxx/patches-4.14/097-l2x0_cmdline_disable.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/097-l2x0_cmdline_disable.patch rename to target/linux/cns3xxx/patches-4.14/097-l2x0_cmdline_disable.patch diff --git a/target/linux/cns3xxx/patches-4.9/100-laguna_support.patch b/target/linux/cns3xxx/patches-4.14/100-laguna_support.patch similarity index 93% rename from target/linux/cns3xxx/patches-4.9/100-laguna_support.patch rename to target/linux/cns3xxx/patches-4.14/100-laguna_support.patch index 3c0bba431..c0160d8f1 100644 --- a/target/linux/cns3xxx/patches-4.9/100-laguna_support.patch +++ b/target/linux/cns3xxx/patches-4.14/100-laguna_support.patch @@ -1,6 +1,6 @@ --- a/arch/arm/mach-cns3xxx/Kconfig +++ b/arch/arm/mach-cns3xxx/Kconfig -@@ -22,4 +22,12 @@ config MACH_CNS3420VB +@@ -23,4 +23,12 @@ config MACH_CNS3420VB This is a platform with an on-board ARM11 MPCore and has support for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc. @@ -15,7 +15,7 @@ endif --- a/arch/arm/mach-cns3xxx/Makefile +++ b/arch/arm/mach-cns3xxx/Makefile -@@ -7,3 +7,5 @@ cns3xxx-$(CONFIG_PCI) += pcie.o +@@ -8,3 +8,5 @@ cns3xxx-$(CONFIG_PCI) += pcie.o cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o cns3xxx-$(CONFIG_SMP) += platsmp.o headsmp.o cns3xxx_fiq.o cns3xxx-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/target/linux/cns3xxx/patches-4.9/101-laguna_sdhci_card_detect.patch b/target/linux/cns3xxx/patches-4.14/101-laguna_sdhci_card_detect.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/101-laguna_sdhci_card_detect.patch rename to target/linux/cns3xxx/patches-4.14/101-laguna_sdhci_card_detect.patch diff --git a/target/linux/cns3xxx/patches-4.9/110-pci_isolated_interrupts.patch b/target/linux/cns3xxx/patches-4.14/110-pci_isolated_interrupts.patch similarity index 100% rename from target/linux/cns3xxx/patches-4.9/110-pci_isolated_interrupts.patch rename to target/linux/cns3xxx/patches-4.14/110-pci_isolated_interrupts.patch diff --git a/target/linux/cns3xxx/patches-4.9/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch b/target/linux/cns3xxx/patches-4.14/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch similarity index 88% rename from target/linux/cns3xxx/patches-4.9/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch rename to target/linux/cns3xxx/patches-4.14/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch index 2e30fe500..42430ead4 100644 --- a/target/linux/cns3xxx/patches-4.9/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch +++ b/target/linux/cns3xxx/patches-4.14/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch @@ -1,6 +1,6 @@ --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c -@@ -2015,7 +2015,8 @@ static void pcie_write_mrrs(struct pci_d +@@ -2303,7 +2303,8 @@ static void pcie_write_mrrs(struct pci_d /* In the "safe" case, do not configure the MRRS. There appear to be * issues with setting MRRS to 0 on a number of devices. */ @@ -12,7 +12,7 @@ /* For Max performance, the MRRS must be set to the largest supported --- a/include/linux/pci.h +++ b/include/linux/pci.h -@@ -783,7 +783,7 @@ enum pcie_bus_config_types { +@@ -845,7 +845,7 @@ enum pcie_bus_config_types { PCIE_BUS_DEFAULT, /* ensure MPS matches upstream bridge */ PCIE_BUS_SAFE, /* use largest MPS boot-time devices support */ PCIE_BUS_PERFORMANCE, /* use MPS and MRRS for best performance */ diff --git a/target/linux/cns3xxx/patches-4.14/200-broadcom_phy_reinit.patch b/target/linux/cns3xxx/patches-4.14/200-broadcom_phy_reinit.patch new file mode 100644 index 000000000..6880533a0 --- /dev/null +++ b/target/linux/cns3xxx/patches-4.14/200-broadcom_phy_reinit.patch @@ -0,0 +1,15 @@ +--- a/drivers/net/phy/broadcom.c ++++ b/drivers/net/phy/broadcom.c +@@ -417,7 +417,11 @@ static int bcm5481_config_aneg(struct ph + ret = genphy_config_aneg(phydev); + + /* Then we can set up the delay. */ +- bcm5481x_config(phydev); ++ //bcm5481x_config(phydev); ++ ++ phy_write(phydev, 0x18, 0xf1e7); ++ phy_write(phydev, 0x1c, 0x8e00); ++ phy_write(phydev, 0x1c, 0xa41f); + + if (of_property_read_bool(np, "enet-phy-lane-swap")) { + /* Lane Swap - Undocumented register...magic! */ diff --git a/target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch b/target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch new file mode 100644 index 000000000..67f152f43 --- /dev/null +++ b/target/linux/cns3xxx/patches-4.14/210-dwc2_defaults.patch @@ -0,0 +1,63 @@ +--- a/drivers/usb/dwc2/params.c ++++ b/drivers/usb/dwc2/params.c +@@ -136,6 +136,36 @@ static void dwc2_set_stm32f4x9_fsotg_par + p->activate_stm_fs_transceiver = true; + } + ++static void dwc2_set_cns3xxx_params(struct dwc2_hsotg *hsotg) ++{ ++ struct dwc2_core_params *p = &hsotg->params; ++ ++ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; /* non-HNP/non-SRP capable */ ++ p->host_dma = 1; ++ p->dma_desc_enable = 0; ++ p->speed = DWC2_SPEED_PARAM_HIGH; /* High Speed */ ++ p->enable_dynamic_fifo = 1; ++ p->en_multiple_tx_fifo = 1; ++ p->host_rx_fifo_size = 658; /* 774 DWORDs */ ++ p->host_nperio_tx_fifo_size = 128; /* 256 DWORDs */ ++ p->host_perio_tx_fifo_size = 658; /* 512 DWORDs */ ++ p->max_transfer_size = 65535, ++ p->max_packet_count = 511; ++ p->host_channels = 16; ++ p->phy_type = DWC2_PHY_TYPE_PARAM_UTMI; /* UTMI */ ++ p->phy_utmi_width = 16; /* 8 bits */ ++ p->phy_ulpi_ddr = 0; /* Single */ ++ p->phy_ulpi_ext_vbus = 0; ++ p->i2c_enable = 0; ++ p->ulpi_fs_ls = 0; ++ p->host_support_fs_ls_low_power = 0; ++ p->host_ls_low_power_phy_clk = 0; /* 48 MHz */ ++ p->ts_dline = 0; ++ p->reload_ctl = 0; ++ p->ahbcfg = 0x10; ++ p->uframe_sched = false; ++} ++ + const struct of_device_id dwc2_of_match_table[] = { + { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params }, + { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params }, +@@ -710,17 +740,23 @@ int dwc2_get_hwparams(struct dwc2_hsotg + + int dwc2_init_params(struct dwc2_hsotg *hsotg) + { ++ /* + const struct of_device_id *match; + void (*set_params)(void *data); ++ */ + + dwc2_set_default_params(hsotg); + dwc2_get_device_properties(hsotg); + ++ /* + match = of_match_device(dwc2_of_match_table, hsotg->dev); + if (match && match->data) { + set_params = match->data; + set_params(hsotg); + } ++ */ ++ ++ dwc2_set_cns3xxx_params(hsotg); + + dwc2_check_params(hsotg); + diff --git a/target/linux/cns3xxx/patches-4.9/001-arm_openwrt_machtypes.patch b/target/linux/cns3xxx/patches-4.9/001-arm_openwrt_machtypes.patch deleted file mode 100644 index 32f977faf..000000000 --- a/target/linux/cns3xxx/patches-4.9/001-arm_openwrt_machtypes.patch +++ /dev/null @@ -1,7 +0,0 @@ ---- a/arch/arm/tools/mach-types -+++ b/arch/arm/tools/mach-types -@@ -1006,3 +1006,4 @@ eco5_bx2 MACH_ECO5_BX2 ECO5_BX2 4572 - eukrea_cpuimx28sd MACH_EUKREA_CPUIMX28SD EUKREA_CPUIMX28SD 4573 - domotab MACH_DOMOTAB DOMOTAB 4574 - pfla03 MACH_PFLA03 PFLA03 4575 -+gw2388 MACH_GW2388 GW2388 2635 diff --git a/target/linux/cns3xxx/patches-4.9/200-broadcom_phy_reinit.patch b/target/linux/cns3xxx/patches-4.9/200-broadcom_phy_reinit.patch deleted file mode 100644 index 0352a89f9..000000000 --- a/target/linux/cns3xxx/patches-4.9/200-broadcom_phy_reinit.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/drivers/net/phy/broadcom.c -+++ b/drivers/net/phy/broadcom.c -@@ -420,6 +420,11 @@ static int bcm5481_config_aneg(struct ph - /* Write bits 14:0. */ - reg |= (1 << 15); - phy_write(phydev, 0x18, reg); -+ } else { -+ phy_write(phydev, 0x18, 0xf1e7); -+ phy_write(phydev, 0x1c, 0x8e00); -+ -+ phy_write(phydev, 0x1c, 0xa41f); - } - - if (of_property_read_bool(np, "enet-phy-lane-swap")) { diff --git a/target/linux/cns3xxx/patches-4.9/210-dwc2_defaults.patch b/target/linux/cns3xxx/patches-4.9/210-dwc2_defaults.patch deleted file mode 100644 index 9cd05eac6..000000000 --- a/target/linux/cns3xxx/patches-4.9/210-dwc2_defaults.patch +++ /dev/null @@ -1,47 +0,0 @@ ---- a/drivers/usb/dwc2/platform.c -+++ b/drivers/usb/dwc2/platform.c -@@ -308,6 +308,34 @@ static int __dwc2_lowlevel_hw_enable(str - return ret; - } - -+static const struct dwc2_core_params params_cns3xxx = { -+ .otg_cap = 2, /* non-HNP/non-SRP capable */ -+ .otg_ver = 0, /* 1.3 */ -+ .dma_enable = 1, -+ .dma_desc_enable = 0, -+ .speed = 0, /* High Speed */ -+ .enable_dynamic_fifo = 1, -+ .en_multiple_tx_fifo = 1, -+ .host_rx_fifo_size = 658, /* 774 DWORDs */ -+ .host_nperio_tx_fifo_size = 128, /* 256 DWORDs */ -+ .host_perio_tx_fifo_size = 658, /* 512 DWORDs */ -+ .max_transfer_size = 65535, -+ .max_packet_count = 511, -+ .host_channels = 16, -+ .phy_type = 1, /* UTMI */ -+ .phy_utmi_width = 16, /* 8 bits */ -+ .phy_ulpi_ddr = 0, /* Single */ -+ .phy_ulpi_ext_vbus = 0, -+ .i2c_enable = 0, -+ .ulpi_fs_ls = 0, -+ .host_support_fs_ls_low_power = 0, -+ .host_ls_low_power_phy_clk = 0, /* 48 MHz */ -+ .ts_dline = 0, -+ .reload_ctl = 0, -+ .ahbcfg = 0x10, -+ .uframe_sched = 0, -+}; -+ - /** - * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources - * @hsotg: The driver state -@@ -552,6 +580,9 @@ static int dwc2_driver_probe(struct plat - /* Default all params to autodetect */ - dwc2_set_all_params(&defparams, -1); - params = &defparams; -+#ifdef CONFIG_ARCH_CNS3XXX -+ params = ¶ms_cns3xxx; -+#endif - - /* - * Disable descriptor dma mode by default as the HW can support diff --git a/target/linux/generic/pending-4.14/160-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch b/target/linux/generic/backport-4.14/041-v4.17-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch similarity index 92% rename from target/linux/generic/pending-4.14/160-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch rename to target/linux/generic/backport-4.14/041-v4.17-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch index 3334203d8..bd39a2625 100644 --- a/target/linux/generic/pending-4.14/160-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch +++ b/target/linux/generic/backport-4.14/041-v4.17-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch @@ -1,7 +1,8 @@ +From 5b644aa012f67fd211138a067b9f351f30bdcc60 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Tue, 30 Jan 2018 11:55:16 +0100 -Subject: [PATCH V10 1/3] mtd: partitions: add of_match_table parser matching - for the "ofpart" type +Date: Wed, 14 Mar 2018 13:10:42 +0100 +Subject: [PATCH] mtd: partitions: add of_match_table parser matching for the + "ofpart" type MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -37,7 +38,12 @@ though as compiling parsers as modules isn't a common choice. Signed-off-by: Brian Norris Signed-off-by: Rafał Miłecki Tested-by: Peter Rosin +Reviewed-by: Richard Weinberger +Signed-off-by: Boris Brezillon --- + drivers/mtd/mtdpart.c | 116 +++++++++++++++++++++++++++++++++++++---- + include/linux/mtd/partitions.h | 1 + + 2 files changed, 108 insertions(+), 9 deletions(-) --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c diff --git a/target/linux/generic/pending-4.14/160-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch b/target/linux/generic/backport-4.14/041-v4.17-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch similarity index 83% rename from target/linux/generic/pending-4.14/160-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch rename to target/linux/generic/backport-4.14/041-v4.17-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch index c38065563..66b67d767 100644 --- a/target/linux/generic/pending-4.14/160-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch +++ b/target/linux/generic/backport-4.14/041-v4.17-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch @@ -1,7 +1,8 @@ +From c0faf43482e7f7dfb6d61847cb93d17748560b24 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Tue, 30 Jan 2018 12:09:58 +0100 -Subject: [PATCH V10 2/3] mtd: rename "ofpart" parser to "fixed-partitions" as - it fits it better +Date: Wed, 14 Mar 2018 13:10:43 +0100 +Subject: [PATCH] mtd: rename "ofpart" parser to "fixed-partitions" as it fits + it better MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -12,7 +13,12 @@ lead to less confusion especially when parsers for new compatibility strings start to appear. Signed-off-by: Rafał Miłecki +Reviewed-by: Richard Weinberger +Signed-off-by: Boris Brezillon --- + drivers/mtd/mtdpart.c | 4 ++-- + drivers/mtd/ofpart.c | 11 ++++++----- + 2 files changed, 8 insertions(+), 7 deletions(-) --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c diff --git a/target/linux/generic/backport-4.9/066-v4.16-0002-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch b/target/linux/generic/backport-4.14/041-v4.17-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch similarity index 82% rename from target/linux/generic/backport-4.9/066-v4.16-0002-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch rename to target/linux/generic/backport-4.14/041-v4.17-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch index 2092cc28f..d6958c3ea 100644 --- a/target/linux/generic/backport-4.9/066-v4.16-0002-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch +++ b/target/linux/generic/backport-4.14/041-v4.17-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch @@ -1,6 +1,6 @@ -From 4ac9222778478a00c7fc9d347b7ed1e0e595120d Mon Sep 17 00:00:00 2001 +From 97b0c7c0df3efd7048ed39d7e2dee34cafd55887 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 4 Jan 2018 08:05:34 +0100 +Date: Wed, 14 Mar 2018 13:10:44 +0100 Subject: [PATCH] mtd: ofpart: add of_match_table with "fixed-partitions" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 @@ -17,7 +17,8 @@ This matches existing bindings documentation. Signed-off-by: Rafał Miłecki Reviewed-by: Brian Norris Tested-by: Brian Norris -Signed-off-by: Boris Brezillon +Reviewed-by: Richard Weinberger +Signed-off-by: Boris Brezillon --- drivers/mtd/ofpart.c | 7 +++++++ 1 file changed, 7 insertions(+) @@ -35,8 +36,8 @@ Signed-off-by: Boris Brezillon +MODULE_DEVICE_TABLE(of, parse_ofpart_match_table); + static struct mtd_part_parser ofpart_parser = { - .parse_fn = parse_ofpart_partitions, - .name = "ofpart", + .parse_fn = parse_fixed_partitions, + .name = "fixed-partitions", + .of_match_table = parse_ofpart_match_table, }; diff --git a/target/linux/generic/backport-4.14/313-netfilter-remove-defensive-check-on-malformed-packet.patch b/target/linux/generic/backport-4.14/313-netfilter-remove-defensive-check-on-malformed-packet.patch index 30b0bc70d..5e56d0dc4 100644 --- a/target/linux/generic/backport-4.14/313-netfilter-remove-defensive-check-on-malformed-packet.patch +++ b/target/linux/generic/backport-4.14/313-netfilter-remove-defensive-check-on-malformed-packet.patch @@ -87,9 +87,9 @@ Signed-off-by: Pablo Neira Ayuso - ip_hdrlen(skb) < sizeof(struct iphdr)) - return NF_ACCEPT; - - if (ip_is_fragment(ip_hdr(skb))) /* IP_NODEFRAG setsockopt set */ - return NF_ACCEPT; - + if (ip_is_fragment(ip_hdr(skb))) { /* IP_NODEFRAG setsockopt set */ + enum ip_conntrack_info ctinfo; + struct nf_conn *tmpl; --- a/net/ipv4/netfilter/nf_nat_l3proto_ipv4.c +++ b/net/ipv4/netfilter/nf_nat_l3proto_ipv4.c @@ -355,11 +355,6 @@ nf_nat_ipv4_out(void *priv, struct sk_bu diff --git a/target/linux/generic/backport-4.14/324-netfilter-flow-table-support-for-IPv6.patch b/target/linux/generic/backport-4.14/324-netfilter-flow-table-support-for-IPv6.patch index a5bbac44f..abe7ef009 100644 --- a/target/linux/generic/backport-4.14/324-netfilter-flow-table-support-for-IPv6.patch +++ b/target/linux/generic/backport-4.14/324-netfilter-flow-table-support-for-IPv6.patch @@ -26,7 +26,7 @@ Signed-off-by: Pablo Neira Ayuso struct dst_entry *ip6_dst_lookup_flow(const struct sock *sk, struct flowi6 *fl6, --- a/net/ipv6/ip6_output.c +++ b/net/ipv6/ip6_output.c -@@ -370,7 +370,7 @@ static inline int ip6_forward_finish(str +@@ -383,7 +383,7 @@ static inline int ip6_forward_finish(str return dst_output(net, sk, skb); } @@ -35,7 +35,7 @@ Signed-off-by: Pablo Neira Ayuso { unsigned int mtu; struct inet6_dev *idev; -@@ -390,6 +390,7 @@ static unsigned int ip6_dst_mtu_forward( +@@ -403,6 +403,7 @@ static unsigned int ip6_dst_mtu_forward( return mtu; } diff --git a/target/linux/generic/backport-4.14/336-netfilter-exit_net-cleanup-check-added.patch b/target/linux/generic/backport-4.14/336-netfilter-exit_net-cleanup-check-added.patch index 8a2dbd8d5..92d7942d8 100644 --- a/target/linux/generic/backport-4.14/336-netfilter-exit_net-cleanup-check-added.patch +++ b/target/linux/generic/backport-4.14/336-netfilter-exit_net-cleanup-check-added.patch @@ -80,7 +80,7 @@ Signed-off-by: Pablo Neira Ayuso static void nfnl_queue_net_exit_batch(struct list_head *net_exit_list) --- a/net/netfilter/x_tables.c +++ b/net/netfilter/x_tables.c -@@ -1719,8 +1719,17 @@ static int __net_init xt_net_init(struct +@@ -1754,8 +1754,17 @@ static int __net_init xt_net_init(struct return 0; } diff --git a/target/linux/generic/backport-4.14/350-ipv6-make-ip6_dst_mtu_forward-inline.patch b/target/linux/generic/backport-4.14/350-ipv6-make-ip6_dst_mtu_forward-inline.patch index 3a0275bd3..e16f13ac4 100644 --- a/target/linux/generic/backport-4.14/350-ipv6-make-ip6_dst_mtu_forward-inline.patch +++ b/target/linux/generic/backport-4.14/350-ipv6-make-ip6_dst_mtu_forward-inline.patch @@ -49,7 +49,7 @@ Signed-off-by: Felix Fietkau struct dst_entry *ip6_dst_lookup_flow(const struct sock *sk, struct flowi6 *fl6, --- a/net/ipv6/ip6_output.c +++ b/net/ipv6/ip6_output.c -@@ -370,28 +370,6 @@ static inline int ip6_forward_finish(str +@@ -383,28 +383,6 @@ static inline int ip6_forward_finish(str return dst_output(net, sk, skb); } diff --git a/target/linux/generic/backport-4.9/011-kbuild-export-SUBARCH.patch b/target/linux/generic/backport-4.9/011-kbuild-export-SUBARCH.patch index a191f9b2c..d937c83f3 100644 --- a/target/linux/generic/backport-4.9/011-kbuild-export-SUBARCH.patch +++ b/target/linux/generic/backport-4.9/011-kbuild-export-SUBARCH.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/Makefile +++ b/Makefile -@@ -409,8 +409,8 @@ KERNELRELEASE = $(shell cat include/conf +@@ -411,8 +411,8 @@ KERNELRELEASE = $(shell cat include/conf KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION diff --git a/target/linux/generic/backport-4.9/024-3-tcp-tsq-add-shortcut-in-tcp_tasklet_func.patch b/target/linux/generic/backport-4.9/024-3-tcp-tsq-add-shortcut-in-tcp_tasklet_func.patch index 249a2ce27..f5004d3ff 100644 --- a/target/linux/generic/backport-4.9/024-3-tcp-tsq-add-shortcut-in-tcp_tasklet_func.patch +++ b/target/linux/generic/backport-4.9/024-3-tcp-tsq-add-shortcut-in-tcp_tasklet_func.patch @@ -60,7 +60,7 @@ Signed-off-by: David S. Miller nval = cmpxchg(&tp->tsq_flags, oval, nval); if (nval != oval) continue; -@@ -2183,6 +2183,8 @@ static bool tcp_write_xmit(struct sock * +@@ -2210,6 +2210,8 @@ static bool tcp_write_xmit(struct sock * unlikely(tso_fragment(sk, skb, limit, mss_now, gfp))) break; diff --git a/target/linux/generic/backport-4.9/024-5-tcp-tsq-add-a-shortcut-in-tcp_small_queue_check.patch b/target/linux/generic/backport-4.9/024-5-tcp-tsq-add-a-shortcut-in-tcp_small_queue_check.patch index 463b95534..65013b6aa 100644 --- a/target/linux/generic/backport-4.9/024-5-tcp-tsq-add-a-shortcut-in-tcp_small_queue_check.patch +++ b/target/linux/generic/backport-4.9/024-5-tcp-tsq-add-a-shortcut-in-tcp_small_queue_check.patch @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c -@@ -2088,6 +2088,15 @@ static bool tcp_small_queue_check(struct +@@ -2115,6 +2115,15 @@ static bool tcp_small_queue_check(struct limit <<= factor; if (atomic_read(&sk->sk_wmem_alloc) > limit) { diff --git a/target/linux/generic/backport-4.9/024-6-tcp-tcp_mtu_probe-is-likely-to-exit-early.patch b/target/linux/generic/backport-4.9/024-6-tcp-tcp_mtu_probe-is-likely-to-exit-early.patch index c5bb42d44..6f2d19668 100644 --- a/target/linux/generic/backport-4.9/024-6-tcp-tcp_mtu_probe-is-likely-to-exit-early.patch +++ b/target/linux/generic/backport-4.9/024-6-tcp-tcp_mtu_probe-is-likely-to-exit-early.patch @@ -17,7 +17,7 @@ Signed-off-by: David S. Miller --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c -@@ -1928,26 +1928,26 @@ static inline void tcp_mtu_check_reprobe +@@ -1948,26 +1948,26 @@ static bool tcp_can_coalesce_send_queue_ */ static int tcp_mtu_probe(struct sock *sk) { diff --git a/target/linux/generic/backport-4.9/024-8-tcp-tsq-move-tsq_flags-close-to-sk_wmem_alloc.patch b/target/linux/generic/backport-4.9/024-8-tcp-tsq-move-tsq_flags-close-to-sk_wmem_alloc.patch index 0acd00817..407d508f9 100644 --- a/target/linux/generic/backport-4.9/024-8-tcp-tsq-move-tsq_flags-close-to-sk_wmem_alloc.patch +++ b/target/linux/generic/backport-4.9/024-8-tcp-tsq-move-tsq_flags-close-to-sk_wmem_alloc.patch @@ -114,7 +114,7 @@ Signed-off-by: David S. Miller if (nval != oval) continue; -@@ -2097,7 +2097,7 @@ static bool tcp_small_queue_check(struct +@@ -2124,7 +2124,7 @@ static bool tcp_small_queue_check(struct skb->prev == sk->sk_write_queue.next) return false; @@ -123,7 +123,7 @@ Signed-off-by: David S. Miller /* It is possible TX completion already happened * before we set TSQ_THROTTLED, so we must * test again the condition. -@@ -2195,8 +2195,8 @@ static bool tcp_write_xmit(struct sock * +@@ -2222,8 +2222,8 @@ static bool tcp_write_xmit(struct sock * unlikely(tso_fragment(sk, skb, limit, mss_now, gfp))) break; @@ -134,7 +134,7 @@ Signed-off-by: David S. Miller if (tcp_small_queue_check(sk, skb, 0)) break; -@@ -3504,8 +3504,6 @@ void tcp_send_ack(struct sock *sk) +@@ -3531,8 +3531,6 @@ void tcp_send_ack(struct sock *sk) /* We do not want pure acks influencing TCP Small Queues or fq/pacing * too much. * SKB_TRUESIZE(max(1 .. 66, MAX_TCP_HEADER)) is unfortunately ~784 @@ -145,7 +145,7 @@ Signed-off-by: David S. Miller --- a/net/ipv4/tcp_timer.c +++ b/net/ipv4/tcp_timer.c -@@ -311,7 +311,7 @@ static void tcp_delack_timer(unsigned lo +@@ -326,7 +326,7 @@ static void tcp_delack_timer(unsigned lo inet_csk(sk)->icsk_ack.blocked = 1; __NET_INC_STATS(sock_net(sk), LINUX_MIB_DELAYEDACKLOCKED); /* deleguate our work to tcp_release_cb() */ @@ -154,7 +154,7 @@ Signed-off-by: David S. Miller sock_hold(sk); } bh_unlock_sock(sk); -@@ -594,7 +594,7 @@ static void tcp_write_timer(unsigned lon +@@ -609,7 +609,7 @@ static void tcp_write_timer(unsigned lon tcp_write_timer_handler(sk); } else { /* delegate our work to tcp_release_cb() */ diff --git a/target/linux/generic/backport-4.9/025-tcp-allow-drivers-to-tweak-TSQ-logic.patch b/target/linux/generic/backport-4.9/025-tcp-allow-drivers-to-tweak-TSQ-logic.patch index d92ce0747..33593194d 100644 --- a/target/linux/generic/backport-4.9/025-tcp-allow-drivers-to-tweak-TSQ-logic.patch +++ b/target/linux/generic/backport-4.9/025-tcp-allow-drivers-to-tweak-TSQ-logic.patch @@ -74,7 +74,7 @@ Cc: Kir Kolyshkin sk->sk_gso_max_size - 1 - MAX_TCP_HEADER); /* Goal is to send at least one packet per ms, -@@ -2084,7 +2084,7 @@ static bool tcp_small_queue_check(struct +@@ -2111,7 +2111,7 @@ static bool tcp_small_queue_check(struct { unsigned int limit; diff --git a/target/linux/generic/backport-4.9/040-crypto-fix-typo-in-KPP-dependency-of-CRYPTO_ECDH.patch b/target/linux/generic/backport-4.9/040-crypto-fix-typo-in-KPP-dependency-of-CRYPTO_ECDH.patch deleted file mode 100644 index eaef5ca0e..000000000 --- a/target/linux/generic/backport-4.9/040-crypto-fix-typo-in-KPP-dependency-of-CRYPTO_ECDH.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 4b05f09db650d215632da97f2c25ceba8235102a Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Sun, 26 Nov 2017 00:09:45 +0100 -Subject: [PATCH] crypto: fix typo in KPP dependency of CRYPTO_ECDH - -This fixes a typo in the CRYPTO_KPP dependency of CRYPTO_ECDH. - -Fixes: 3c4b23901a0c ("crypto: ecdh - Add ECDH software support") -Cc: # v4.8+ -Signed-off-by: Hauke Mehrtens ---- - crypto/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/crypto/Kconfig -+++ b/crypto/Kconfig -@@ -120,7 +120,7 @@ config CRYPTO_DH - - config CRYPTO_ECDH - tristate "ECDH algorithm" -- select CRYTPO_KPP -+ select CRYPTO_KPP - help - Generic implementation of the ECDH algorithm - diff --git a/target/linux/generic/backport-4.9/050-usb-dwc2-Remove-unnecessary-kfree.patch b/target/linux/generic/backport-4.9/050-usb-dwc2-Remove-unnecessary-kfree.patch index df3656dd5..01bf7983f 100644 --- a/target/linux/generic/backport-4.9/050-usb-dwc2-Remove-unnecessary-kfree.patch +++ b/target/linux/generic/backport-4.9/050-usb-dwc2-Remove-unnecessary-kfree.patch @@ -14,7 +14,7 @@ Signed-off-by: Felipe Balbi --- a/drivers/usb/dwc2/hcd.c +++ b/drivers/usb/dwc2/hcd.c -@@ -5184,7 +5184,6 @@ error3: +@@ -5185,7 +5185,6 @@ error3: error2: usb_put_hcd(hcd); error1: diff --git a/target/linux/generic/backport-4.9/067-v4.11-mtd-nand-Add-Winbond-manufacturer-id.patch b/target/linux/generic/backport-4.9/063-v4.11-0001-mtd-nand-Add-Winbond-manufacturer-id.patch similarity index 100% rename from target/linux/generic/backport-4.9/067-v4.11-mtd-nand-Add-Winbond-manufacturer-id.patch rename to target/linux/generic/backport-4.9/063-v4.11-0001-mtd-nand-Add-Winbond-manufacturer-id.patch diff --git a/target/linux/generic/backport-4.9/064-v4.11-0001-mtd-introduce-function-max_bad_blocks.patch b/target/linux/generic/backport-4.9/063-v4.11-0002-mtd-introduce-function-max_bad_blocks.patch similarity index 100% rename from target/linux/generic/backport-4.9/064-v4.11-0001-mtd-introduce-function-max_bad_blocks.patch rename to target/linux/generic/backport-4.9/063-v4.11-0002-mtd-introduce-function-max_bad_blocks.patch diff --git a/target/linux/generic/backport-4.9/064-v4.11-0002-mtd-Add-partition-device-node-to-mtd-partition-devic.patch b/target/linux/generic/backport-4.9/063-v4.11-0003-mtd-Add-partition-device-node-to-mtd-partition-devic.patch similarity index 100% rename from target/linux/generic/backport-4.9/064-v4.11-0002-mtd-Add-partition-device-node-to-mtd-partition-devic.patch rename to target/linux/generic/backport-4.9/063-v4.11-0003-mtd-Add-partition-device-node-to-mtd-partition-devic.patch diff --git a/target/linux/generic/backport-4.9/063-mtd-spi-nor-enable-stateless-4b-op-codes-for-mx25u25.patch b/target/linux/generic/backport-4.9/064-v4.12-mtd-spi-nor-enable-stateless-4b-op-codes-for-mx25u25.patch similarity index 100% rename from target/linux/generic/backport-4.9/063-mtd-spi-nor-enable-stateless-4b-op-codes-for-mx25u25.patch rename to target/linux/generic/backport-4.9/064-v4.12-mtd-spi-nor-enable-stateless-4b-op-codes-for-mx25u25.patch diff --git a/target/linux/generic/backport-4.9/066-v4.16-0001-mtd-partitions-add-of_match_table-parser-matching.patch b/target/linux/generic/backport-4.9/066-v4.16-0001-mtd-partitions-add-of_match_table-parser-matching.patch deleted file mode 100644 index 06931ce2a..000000000 --- a/target/linux/generic/backport-4.9/066-v4.16-0001-mtd-partitions-add-of_match_table-parser-matching.patch +++ /dev/null @@ -1,121 +0,0 @@ -From bb2192123ec70470d6ea33f138846b175403a968 Mon Sep 17 00:00:00 2001 -From: Brian Norris -Date: Thu, 4 Jan 2018 08:05:33 +0100 -Subject: [PATCH] mtd: partitions: add of_match_table parser matching -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Partition parsers can now provide an of_match_table to enable -flash<-->parser matching via device tree as documented in the -mtd/partition.txt. - -It works by looking for a matching parser for every string in the -"compatibility" property (starting with the most specific one). - -This support is currently limited to built-in parsers as it uses -request_module() and friends. This should be sufficient for most cases -though as compiling parsers as modules isn't a common choice. - -Signed-off-by: Brian Norris -Signed-off-by: Rafał Miłecki -Signed-off-by: Boris Brezillon ---- - drivers/mtd/mtdpart.c | 59 ++++++++++++++++++++++++++++++++++++++++++ - include/linux/mtd/partitions.h | 1 + - 2 files changed, 60 insertions(+) - ---- a/drivers/mtd/mtdpart.c -+++ b/drivers/mtd/mtdpart.c -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - - #include "mtdcore.h" - -@@ -886,6 +887,45 @@ static int mtd_part_do_parse(struct mtd_ - } - - /** -+ * mtd_part_get_compatible_parser - find MTD parser by a compatible string -+ * -+ * @compat: compatible string describing partitions in a device tree -+ * -+ * MTD parsers can specify supported partitions by providing a table of -+ * compatibility strings. This function finds a parser that advertises support -+ * for a passed value of "compatible". -+ */ -+static struct mtd_part_parser *mtd_part_get_compatible_parser(const char *compat) -+{ -+ struct mtd_part_parser *p, *ret = NULL; -+ -+ spin_lock(&part_parser_lock); -+ -+ list_for_each_entry(p, &part_parsers, list) { -+ const struct of_device_id *matches; -+ -+ matches = p->of_match_table; -+ if (!matches) -+ continue; -+ -+ for (; matches->compatible[0]; matches++) { -+ if (!strcmp(matches->compatible, compat) && -+ try_module_get(p->owner)) { -+ ret = p; -+ break; -+ } -+ } -+ -+ if (ret) -+ break; -+ } -+ -+ spin_unlock(&part_parser_lock); -+ -+ return ret; -+} -+ -+/** - * parse_mtd_partitions - parse MTD partitions - * @master: the master partition (describes whole MTD device) - * @types: names of partition parsers to try or %NULL -@@ -911,8 +951,27 @@ int parse_mtd_partitions(struct mtd_info - struct mtd_part_parser_data *data) - { - struct mtd_part_parser *parser; -+ struct device_node *np; -+ struct property *prop; -+ const char *compat; - int ret, err = 0; - -+ np = of_get_child_by_name(mtd_get_of_node(master), "partitions"); -+ of_property_for_each_string(np, "compatible", prop, compat) { -+ parser = mtd_part_get_compatible_parser(compat); -+ if (!parser) -+ continue; -+ ret = mtd_part_do_parse(parser, master, pparts, data); -+ if (ret > 0) { -+ of_node_put(np); -+ return 0; -+ } -+ mtd_part_parser_put(parser); -+ if (ret < 0 && !err) -+ err = ret; -+ } -+ of_node_put(np); -+ - if (!types) - types = default_mtd_part_types; - ---- a/include/linux/mtd/partitions.h -+++ b/include/linux/mtd/partitions.h -@@ -77,6 +77,7 @@ struct mtd_part_parser { - struct list_head list; - struct module *owner; - const char *name; -+ const struct of_device_id *of_match_table; - int (*parse_fn)(struct mtd_info *, const struct mtd_partition **, - struct mtd_part_parser_data *); - void (*cleanup)(const struct mtd_partition *pparts, int nr_parts); diff --git a/target/linux/generic/backport-4.9/066-v4.17-0001-mtd-move-code-adding-master-MTD-out-of-mtd_add_devic.patch b/target/linux/generic/backport-4.9/066-v4.17-0001-mtd-move-code-adding-master-MTD-out-of-mtd_add_devic.patch new file mode 100644 index 000000000..07a456d4c --- /dev/null +++ b/target/linux/generic/backport-4.9/066-v4.17-0001-mtd-move-code-adding-master-MTD-out-of-mtd_add_devic.patch @@ -0,0 +1,74 @@ +From 2c77c57d22adb05b21cdb333a0c42bdfa0e19835 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 16 Jan 2018 16:45:41 +0100 +Subject: [PATCH] mtd: move code adding master MTD out of + mtd_add_device_partitions() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This change is a small cleanup of mtd_device_parse_register(). When +using MTD_PARTITIONED_MASTER it makes sure a master MTD is registered +before dealing with partitions. The advantage of this is not mixing +code handling master MTD with code handling partitions. + +This commit doesn't change any behavior except from a slightly different +failure code path. The new code may need to call del_mtd_device when +something goes wrong. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Boris Brezillon +--- + drivers/mtd/mtdcore.c | 25 +++++++++++++------------ + 1 file changed, 13 insertions(+), 12 deletions(-) + +--- a/drivers/mtd/mtdcore.c ++++ b/drivers/mtd/mtdcore.c +@@ -631,20 +631,12 @@ static int mtd_add_device_partitions(str + { + const struct mtd_partition *real_parts = parts->parts; + int nbparts = parts->nr_parts; +- int ret; + +- if (nbparts == 0 || IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER)) { +- ret = add_mtd_device(mtd); +- if (ret) +- return ret; +- } ++ if (!nbparts && !device_is_registered(&mtd->dev)) ++ return add_mtd_device(mtd); + +- if (nbparts > 0) { +- ret = add_mtd_partitions(mtd, real_parts, nbparts); +- if (ret && IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER)) +- del_mtd_device(mtd); +- return ret; +- } ++ if (nbparts > 0) ++ return add_mtd_partitions(mtd, real_parts, nbparts); + + return 0; + } +@@ -704,6 +696,12 @@ int mtd_device_parse_register(struct mtd + + mtd_set_dev_defaults(mtd); + ++ if (IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER)) { ++ ret = add_mtd_device(mtd); ++ if (ret) ++ return ret; ++ } ++ + memset(&parsed, 0, sizeof(parsed)); + + ret = parse_mtd_partitions(mtd, types, &parsed, parser_data); +@@ -743,6 +741,9 @@ int mtd_device_parse_register(struct mtd + out: + /* Cleanup any parsed partitions */ + mtd_part_parser_cleanup(&parsed); ++ if (ret && device_is_registered(&mtd->dev)) ++ del_mtd_device(mtd); ++ + return ret; + } + EXPORT_SYMBOL_GPL(mtd_device_parse_register); diff --git a/target/linux/generic/backport-4.9/066-v4.17-0002-mtd-get-rid-of-the-mtd_add_device_partitions.patch b/target/linux/generic/backport-4.9/066-v4.17-0002-mtd-get-rid-of-the-mtd_add_device_partitions.patch new file mode 100644 index 000000000..b629d430a --- /dev/null +++ b/target/linux/generic/backport-4.9/066-v4.17-0002-mtd-get-rid-of-the-mtd_add_device_partitions.patch @@ -0,0 +1,93 @@ +From 0dbe4ea78d69756efeb0bba0764f6bd4a9ee9567 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 16 Jan 2018 16:45:42 +0100 +Subject: [PATCH] mtd: get rid of the mtd_add_device_partitions() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This simplifies code a bit by: +1) Avoiding an extra (tiny) function +2) Checking for amount of parsed (found) partitions just once +3) Avoiding clearing/filling struct mtd_partitions manually + +With this commit proper functions are called directly from the +mtd_device_parse_register(). It doesn't need to use minor tricks like +memsetting struct to 0 to trigger an expected +mtd_add_device_partitions() behavior. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Boris Brezillon +--- + drivers/mtd/mtdcore.c | 43 ++++++++++++------------------------------- + 1 file changed, 12 insertions(+), 31 deletions(-) + +--- a/drivers/mtd/mtdcore.c ++++ b/drivers/mtd/mtdcore.c +@@ -626,21 +626,6 @@ out_error: + return ret; + } + +-static int mtd_add_device_partitions(struct mtd_info *mtd, +- struct mtd_partitions *parts) +-{ +- const struct mtd_partition *real_parts = parts->parts; +- int nbparts = parts->nr_parts; +- +- if (!nbparts && !device_is_registered(&mtd->dev)) +- return add_mtd_device(mtd); +- +- if (nbparts > 0) +- return add_mtd_partitions(mtd, real_parts, nbparts); +- +- return 0; +-} +- + /* + * Set a few defaults based on the parent devices, if not provided by the + * driver +@@ -691,7 +676,7 @@ int mtd_device_parse_register(struct mtd + const struct mtd_partition *parts, + int nr_parts) + { +- struct mtd_partitions parsed; ++ struct mtd_partitions parsed = { }; + int ret; + + mtd_set_dev_defaults(mtd); +@@ -702,24 +687,20 @@ int mtd_device_parse_register(struct mtd + return ret; + } + +- memset(&parsed, 0, sizeof(parsed)); +- ++ /* Prefer parsed partitions over driver-provided fallback */ + ret = parse_mtd_partitions(mtd, types, &parsed, parser_data); +- if ((ret < 0 || parsed.nr_parts == 0) && parts && nr_parts) { +- /* Fall back to driver-provided partitions */ +- parsed = (struct mtd_partitions){ +- .parts = parts, +- .nr_parts = nr_parts, +- }; +- } else if (ret < 0) { +- /* Didn't come up with parsed OR fallback partitions */ +- pr_info("mtd: failed to find partitions; one or more parsers reports errors (%d)\n", +- ret); +- /* Don't abort on errors; we can still use unpartitioned MTD */ +- memset(&parsed, 0, sizeof(parsed)); ++ if (!ret && parsed.nr_parts) { ++ parts = parsed.parts; ++ nr_parts = parsed.nr_parts; + } + +- ret = mtd_add_device_partitions(mtd, &parsed); ++ if (nr_parts) ++ ret = add_mtd_partitions(mtd, parts, nr_parts); ++ else if (!device_is_registered(&mtd->dev)) ++ ret = add_mtd_device(mtd); ++ else ++ ret = 0; ++ + if (ret) + goto out; + diff --git a/target/linux/generic/backport-4.9/067-v4.17-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch b/target/linux/generic/backport-4.9/067-v4.17-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch new file mode 100644 index 000000000..60eace2a3 --- /dev/null +++ b/target/linux/generic/backport-4.9/067-v4.17-0001-mtd-partitions-add-of_match_table-parser-matching-fo.patch @@ -0,0 +1,200 @@ +From 5b644aa012f67fd211138a067b9f351f30bdcc60 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 14 Mar 2018 13:10:42 +0100 +Subject: [PATCH] mtd: partitions: add of_match_table parser matching for the + "ofpart" type +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +In order to properly support compatibility strings as described in the +bindings/mtd/partition.txt "ofpart" type should be treated as an +indication for looking into OF. MTD should check "compatible" property +and search for a matching parser rather than blindly trying the one +supporting "fixed-partitions". + +It also means that existing "fixed-partitions" parser should get renamed +to use a more meaningful name. + +This commit achievies that aim by introducing a new mtd_part_of_parse(). +It works by looking for a matching parser for every string in the +"compatibility" property (starting with the most specific one). + +Please note that driver-specified parsers still take a precedence. It's +assumed that driver providing a parser type has a good reason for that +(e.g. having platform data with device-specific info). Also doing +otherwise could break existing setups. The same applies to using default +parsers (including "cmdlinepart") as some overwrite DT data with cmdline +argument. + +Partition parsers can now provide an of_match_table to enable +flash<-->parser matching via device tree as documented in the +mtd/partition.txt. + +This support is currently limited to built-in parsers as it uses +request_module() and friends. This should be sufficient for most cases +though as compiling parsers as modules isn't a common choice. + +Signed-off-by: Brian Norris +Signed-off-by: Rafał Miłecki +Tested-by: Peter Rosin +Reviewed-by: Richard Weinberger +Signed-off-by: Boris Brezillon +--- + drivers/mtd/mtdpart.c | 116 +++++++++++++++++++++++++++++++++++++---- + include/linux/mtd/partitions.h | 1 + + 2 files changed, 108 insertions(+), 9 deletions(-) + +--- a/drivers/mtd/mtdpart.c ++++ b/drivers/mtd/mtdpart.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + + #include "mtdcore.h" + +@@ -886,6 +887,92 @@ static int mtd_part_do_parse(struct mtd_ + } + + /** ++ * mtd_part_get_compatible_parser - find MTD parser by a compatible string ++ * ++ * @compat: compatible string describing partitions in a device tree ++ * ++ * MTD parsers can specify supported partitions by providing a table of ++ * compatibility strings. This function finds a parser that advertises support ++ * for a passed value of "compatible". ++ */ ++static struct mtd_part_parser *mtd_part_get_compatible_parser(const char *compat) ++{ ++ struct mtd_part_parser *p, *ret = NULL; ++ ++ spin_lock(&part_parser_lock); ++ ++ list_for_each_entry(p, &part_parsers, list) { ++ const struct of_device_id *matches; ++ ++ matches = p->of_match_table; ++ if (!matches) ++ continue; ++ ++ for (; matches->compatible[0]; matches++) { ++ if (!strcmp(matches->compatible, compat) && ++ try_module_get(p->owner)) { ++ ret = p; ++ break; ++ } ++ } ++ ++ if (ret) ++ break; ++ } ++ ++ spin_unlock(&part_parser_lock); ++ ++ return ret; ++} ++ ++static int mtd_part_of_parse(struct mtd_info *master, ++ struct mtd_partitions *pparts) ++{ ++ struct mtd_part_parser *parser; ++ struct device_node *np; ++ struct property *prop; ++ const char *compat; ++ const char *fixed = "ofpart"; ++ int ret, err = 0; ++ ++ np = of_get_child_by_name(mtd_get_of_node(master), "partitions"); ++ of_property_for_each_string(np, "compatible", prop, compat) { ++ parser = mtd_part_get_compatible_parser(compat); ++ if (!parser) ++ continue; ++ ret = mtd_part_do_parse(parser, master, pparts, NULL); ++ if (ret > 0) { ++ of_node_put(np); ++ return ret; ++ } ++ mtd_part_parser_put(parser); ++ if (ret < 0 && !err) ++ err = ret; ++ } ++ of_node_put(np); ++ ++ /* ++ * For backward compatibility we have to try the "ofpart" ++ * parser. It supports old DT format with partitions specified as a ++ * direct subnodes of a flash device DT node without any compatibility ++ * specified we could match. ++ */ ++ parser = mtd_part_parser_get(fixed); ++ if (!parser && !request_module("%s", fixed)) ++ parser = mtd_part_parser_get(fixed); ++ if (parser) { ++ ret = mtd_part_do_parse(parser, master, pparts, NULL); ++ if (ret > 0) ++ return ret; ++ mtd_part_parser_put(parser); ++ if (ret < 0 && !err) ++ err = ret; ++ } ++ ++ return err; ++} ++ ++/** + * parse_mtd_partitions - parse MTD partitions + * @master: the master partition (describes whole MTD device) + * @types: names of partition parsers to try or %NULL +@@ -917,19 +1004,30 @@ int parse_mtd_partitions(struct mtd_info + types = default_mtd_part_types; + + for ( ; *types; types++) { +- pr_debug("%s: parsing partitions %s\n", master->name, *types); +- parser = mtd_part_parser_get(*types); +- if (!parser && !request_module("%s", *types)) ++ /* ++ * ofpart is a special type that means OF partitioning info ++ * should be used. It requires a bit different logic so it is ++ * handled in a separated function. ++ */ ++ if (!strcmp(*types, "ofpart")) { ++ ret = mtd_part_of_parse(master, pparts); ++ } else { ++ pr_debug("%s: parsing partitions %s\n", master->name, ++ *types); + parser = mtd_part_parser_get(*types); +- pr_debug("%s: got parser %s\n", master->name, +- parser ? parser->name : NULL); +- if (!parser) +- continue; +- ret = mtd_part_do_parse(parser, master, pparts, data); ++ if (!parser && !request_module("%s", *types)) ++ parser = mtd_part_parser_get(*types); ++ pr_debug("%s: got parser %s\n", master->name, ++ parser ? parser->name : NULL); ++ if (!parser) ++ continue; ++ ret = mtd_part_do_parse(parser, master, pparts, data); ++ if (ret <= 0) ++ mtd_part_parser_put(parser); ++ } + /* Found partitions! */ + if (ret > 0) + return 0; +- mtd_part_parser_put(parser); + /* + * Stash the first error we see; only report it if no parser + * succeeds +--- a/include/linux/mtd/partitions.h ++++ b/include/linux/mtd/partitions.h +@@ -77,6 +77,7 @@ struct mtd_part_parser { + struct list_head list; + struct module *owner; + const char *name; ++ const struct of_device_id *of_match_table; + int (*parse_fn)(struct mtd_info *, const struct mtd_partition **, + struct mtd_part_parser_data *); + void (*cleanup)(const struct mtd_partition *pparts, int nr_parts); diff --git a/target/linux/generic/backport-4.9/067-v4.17-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch b/target/linux/generic/backport-4.9/067-v4.17-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch new file mode 100644 index 000000000..59f53df10 --- /dev/null +++ b/target/linux/generic/backport-4.9/067-v4.17-0002-mtd-rename-ofpart-parser-to-fixed-partitions-as-it-f.patch @@ -0,0 +1,74 @@ +From c0faf43482e7f7dfb6d61847cb93d17748560b24 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 14 Mar 2018 13:10:43 +0100 +Subject: [PATCH] mtd: rename "ofpart" parser to "fixed-partitions" as it fits + it better +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Type "ofpart" means that OF should be used to get partitioning info and +this driver supports "fixed-partitions" binding only. Renaming it should +lead to less confusion especially when parsers for new compatibility +strings start to appear. + +Signed-off-by: Rafał Miłecki +Reviewed-by: Richard Weinberger +Signed-off-by: Boris Brezillon +--- + drivers/mtd/mtdpart.c | 4 ++-- + drivers/mtd/ofpart.c | 11 ++++++----- + 2 files changed, 8 insertions(+), 7 deletions(-) + +--- a/drivers/mtd/mtdpart.c ++++ b/drivers/mtd/mtdpart.c +@@ -932,7 +932,7 @@ static int mtd_part_of_parse(struct mtd_ + struct device_node *np; + struct property *prop; + const char *compat; +- const char *fixed = "ofpart"; ++ const char *fixed = "fixed-partitions"; + int ret, err = 0; + + np = of_get_child_by_name(mtd_get_of_node(master), "partitions"); +@@ -952,7 +952,7 @@ static int mtd_part_of_parse(struct mtd_ + of_node_put(np); + + /* +- * For backward compatibility we have to try the "ofpart" ++ * For backward compatibility we have to try the "fixed-partitions" + * parser. It supports old DT format with partitions specified as a + * direct subnodes of a flash device DT node without any compatibility + * specified we could match. +--- a/drivers/mtd/ofpart.c ++++ b/drivers/mtd/ofpart.c +@@ -25,9 +25,9 @@ static bool node_has_compatible(struct d + return of_get_property(pp, "compatible", NULL); + } + +-static int parse_ofpart_partitions(struct mtd_info *master, +- const struct mtd_partition **pparts, +- struct mtd_part_parser_data *data) ++static int parse_fixed_partitions(struct mtd_info *master, ++ const struct mtd_partition **pparts, ++ struct mtd_part_parser_data *data) + { + struct mtd_partition *parts; + struct device_node *mtd_node; +@@ -141,8 +141,8 @@ ofpart_none: + } + + static struct mtd_part_parser ofpart_parser = { +- .parse_fn = parse_ofpart_partitions, +- .name = "ofpart", ++ .parse_fn = parse_fixed_partitions, ++ .name = "fixed-partitions", + }; + + static int parse_ofoldpart_partitions(struct mtd_info *master, +@@ -230,4 +230,5 @@ MODULE_AUTHOR("Vitaly Wool, David Gibson + * with the same name. Since we provide the ofoldpart parser, we should have + * the corresponding alias. + */ ++MODULE_ALIAS("fixed-partitions"); + MODULE_ALIAS("ofoldpart"); diff --git a/target/linux/generic/pending-4.14/160-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch b/target/linux/generic/backport-4.9/067-v4.17-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch similarity index 76% rename from target/linux/generic/pending-4.14/160-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch rename to target/linux/generic/backport-4.9/067-v4.17-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch index 08f048f42..d6958c3ea 100644 --- a/target/linux/generic/pending-4.14/160-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch +++ b/target/linux/generic/backport-4.9/067-v4.17-0003-mtd-ofpart-add-of_match_table-with-fixed-partitions.patch @@ -1,7 +1,7 @@ +From 97b0c7c0df3efd7048ed39d7e2dee34cafd55887 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Thu, 4 Jan 2018 08:05:34 +0100 -Subject: [PATCH V10 3/3] mtd: ofpart: add of_match_table with - "fixed-partitions" +Date: Wed, 14 Mar 2018 13:10:44 +0100 +Subject: [PATCH] mtd: ofpart: add of_match_table with "fixed-partitions" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit @@ -17,7 +17,11 @@ This matches existing bindings documentation. Signed-off-by: Rafał Miłecki Reviewed-by: Brian Norris Tested-by: Brian Norris +Reviewed-by: Richard Weinberger +Signed-off-by: Boris Brezillon --- + drivers/mtd/ofpart.c | 7 +++++++ + 1 file changed, 7 insertions(+) --- a/drivers/mtd/ofpart.c +++ b/drivers/mtd/ofpart.c diff --git a/target/linux/generic/backport-4.9/071-v4.10-0001-net-bgmac-allocate-struct-bgmac-just-once-don-t-copy.patch b/target/linux/generic/backport-4.9/071-v4.10-0001-net-bgmac-allocate-struct-bgmac-just-once-don-t-copy.patch index 37639faf1..d16948668 100644 --- a/target/linux/generic/backport-4.9/071-v4.10-0001-net-bgmac-allocate-struct-bgmac-just-once-don-t-copy.patch +++ b/target/linux/generic/backport-4.9/071-v4.10-0001-net-bgmac-allocate-struct-bgmac-just-once-don-t-copy.patch @@ -33,8 +33,8 @@ Signed-off-by: David S. Miller --- a/drivers/net/ethernet/broadcom/bgmac-bcma.c +++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -99,12 +99,11 @@ static int bgmac_probe(struct bcma_devic - u8 *mac; +@@ -100,12 +100,11 @@ static int bgmac_probe(struct bcma_devic + const u8 *mac = NULL; int err; - bgmac = kzalloc(sizeof(*bgmac), GFP_KERNEL); @@ -47,7 +47,7 @@ Signed-off-by: David S. Miller bgmac->dma_dev = core->dma_dev; bgmac->irq = core->irq; -@@ -285,7 +284,6 @@ static int bgmac_probe(struct bcma_devic +@@ -292,7 +291,6 @@ static int bgmac_probe(struct bcma_devic err1: bcma_mdio_mii_unregister(bgmac->mii_bus); err: diff --git a/target/linux/generic/backport-4.9/071-v4.10-0002-net-bgmac-drop-struct-bcma_mdio-we-don-t-need-anymor.patch b/target/linux/generic/backport-4.9/071-v4.10-0002-net-bgmac-drop-struct-bcma_mdio-we-don-t-need-anymor.patch index 7a6f3454d..5e3d33375 100644 --- a/target/linux/generic/backport-4.9/071-v4.10-0002-net-bgmac-drop-struct-bcma_mdio-we-don-t-need-anymor.patch +++ b/target/linux/generic/backport-4.9/071-v4.10-0002-net-bgmac-drop-struct-bcma_mdio-we-don-t-need-anymor.patch @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/ethernet/broadcom/bgmac-bcma.c +++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -159,7 +159,7 @@ static int bgmac_probe(struct bcma_devic +@@ -166,7 +166,7 @@ static int bgmac_probe(struct bcma_devic if (!bgmac_is_bcm4707_family(core) && !(ci->id == BCMA_CHIP_ID_BCM53573 && core->core_unit == 1)) { diff --git a/target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch b/target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch index c371e6355..772ee61c0 100644 --- a/target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch +++ b/target/linux/generic/backport-4.9/071-v4.15-0001-net-bgmac-enable-master-mode-for-BCM54210E-and-B5021.patch @@ -27,7 +27,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/ethernet/broadcom/bgmac-bcma.c +++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -159,13 +159,19 @@ static int bgmac_probe(struct bcma_devic +@@ -166,13 +166,19 @@ static int bgmac_probe(struct bcma_devic if (!bgmac_is_bcm4707_family(core) && !(ci->id == BCMA_CHIP_ID_BCM53573 && core->core_unit == 1)) { diff --git a/target/linux/generic/backport-4.9/090-net-generalize-napi_complete_done.patch b/target/linux/generic/backport-4.9/090-net-generalize-napi_complete_done.patch index 5c6e334b1..477c498b2 100644 --- a/target/linux/generic/backport-4.9/090-net-generalize-napi_complete_done.patch +++ b/target/linux/generic/backport-4.9/090-net-generalize-napi_complete_done.patch @@ -159,7 +159,7 @@ Signed-off-by: David S. Miller flexcan_write(priv->reg_ctrl_default, ®s->ctrl); --- a/drivers/net/can/ifi_canfd/ifi_canfd.c +++ b/drivers/net/can/ifi_canfd/ifi_canfd.c -@@ -578,7 +578,7 @@ static int ifi_canfd_poll(struct napi_st +@@ -589,7 +589,7 @@ static int ifi_canfd_poll(struct napi_st work_done += ifi_canfd_do_rx_poll(ndev, quota - work_done); if (work_done < quota) { @@ -269,7 +269,7 @@ Signed-off-by: David S. Miller "NAPI Complete, did %d packets with budget %d\n", --- a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c +++ b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c -@@ -651,7 +651,7 @@ static int xgene_enet_napi(struct napi_s +@@ -658,7 +658,7 @@ static int xgene_enet_napi(struct napi_s processed = xgene_enet_process_ring(ring, budget); if (processed != budget) { @@ -280,7 +280,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/ethernet/arc/emac_main.c +++ b/drivers/net/ethernet/arc/emac_main.c -@@ -275,7 +275,7 @@ static int arc_emac_poll(struct napi_str +@@ -284,7 +284,7 @@ static int arc_emac_poll(struct napi_str work_done = arc_emac_rx(ndev, budget); if (work_done < budget) { @@ -388,7 +388,7 @@ Signed-off-by: David S. Miller BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c -@@ -3229,7 +3229,7 @@ static int bnx2x_poll(struct napi_struct +@@ -3230,7 +3230,7 @@ static int bnx2x_poll(struct napi_struct * has been updated when NAPI was scheduled. */ if (IS_FCOE_FP(fp)) { @@ -399,7 +399,7 @@ Signed-off-by: David S. Miller /* bnx2x_has_rx_work() reads the status block, --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c -@@ -1774,7 +1774,7 @@ static int bnxt_poll_nitroa0(struct napi +@@ -1778,7 +1778,7 @@ static int bnxt_poll_nitroa0(struct napi } if (!bnxt_has_work(bp, cpr) && rx_pkts < budget) { @@ -637,7 +637,7 @@ Signed-off-by: David S. Miller return received; --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c -@@ -3186,7 +3186,7 @@ static int gfar_poll_rx_sq(struct napi_s +@@ -3193,7 +3193,7 @@ static int gfar_poll_rx_sq(struct napi_s if (work_done < budget) { u32 imask; @@ -646,7 +646,7 @@ Signed-off-by: David S. Miller /* Clear the halt bit in RSTAT */ gfar_write(®s->rstat, gfargrp->rstat); -@@ -3275,7 +3275,7 @@ static int gfar_poll_rx(struct napi_stru +@@ -3282,7 +3282,7 @@ static int gfar_poll_rx(struct napi_stru if (!num_act_queues) { u32 imask; @@ -657,7 +657,7 @@ Signed-off-by: David S. Miller gfar_write(®s->rstat, gfargrp->rstat); --- a/drivers/net/ethernet/freescale/ucc_geth.c +++ b/drivers/net/ethernet/freescale/ucc_geth.c -@@ -3303,7 +3303,7 @@ static int ucc_geth_poll(struct napi_str +@@ -3301,7 +3301,7 @@ static int ucc_geth_poll(struct napi_str howmany += ucc_geth_rx(ugeth, i, budget - howmany); if (howmany < budget) { @@ -712,7 +712,7 @@ Signed-off-by: David S. Miller * then check once more to make sure we are done. --- a/drivers/net/ethernet/ibm/ibmvnic.c +++ b/drivers/net/ethernet/ibm/ibmvnic.c -@@ -1009,7 +1009,7 @@ restart_poll: +@@ -1027,7 +1027,7 @@ restart_poll: if (frames_processed < budget) { enable_scrq_irq(adapter, adapter->rx_scrq[scrq_num]); @@ -1040,7 +1040,7 @@ Signed-off-by: David S. Miller writel(irq->mask, adpt->base + EMAC_INT_MASK); --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c -@@ -7579,7 +7579,7 @@ static int rtl8169_poll(struct napi_stru +@@ -7574,7 +7574,7 @@ static int rtl8169_poll(struct napi_stru } if (work_done < budget) { @@ -1379,7 +1379,7 @@ Signed-off-by: David S. Miller */ --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c -@@ -1059,7 +1059,7 @@ err: +@@ -1061,7 +1061,7 @@ err: if (work_done < budget) { int more_to_do = 0; diff --git a/target/linux/generic/backport-4.9/092-netfilter-nf_tables-fix-mismatch-in-big-endian-syste.patch b/target/linux/generic/backport-4.9/092-netfilter-nf_tables-fix-mismatch-in-big-endian-syste.patch new file mode 100644 index 000000000..024983142 --- /dev/null +++ b/target/linux/generic/backport-4.9/092-netfilter-nf_tables-fix-mismatch-in-big-endian-syste.patch @@ -0,0 +1,323 @@ +From 0bc01df3df7a88258148518eb9ce7f88c16a6106 Mon Sep 17 00:00:00 2001 +From: Liping Zhang +Date: Wed, 8 Mar 2017 22:54:18 +0800 +Subject: netfilter: nf_tables: fix mismatch in big-endian system + +Currently, there are two different methods to store an u16 integer to +the u32 data register. For example: + u32 *dest = ®s->data[priv->dreg]; + 1. *dest = 0; *(u16 *) dest = val_u16; + 2. *dest = val_u16; + +For method 1, the u16 value will be stored like this, either in +big-endian or little-endian system: + 0 15 31 + +-+-+-+-+-+-+-+-+-+-+-+-+ + | Value | 0 | + +-+-+-+-+-+-+-+-+-+-+-+-+ + +For method 2, in little-endian system, the u16 value will be the same +as listed above. But in big-endian system, the u16 value will be stored +like this: + 0 15 31 + +-+-+-+-+-+-+-+-+-+-+-+-+ + | 0 | Value | + +-+-+-+-+-+-+-+-+-+-+-+-+ + +So later we use "memcmp(®s->data[priv->sreg], data, 2);" to do +compare in nft_cmp, nft_lookup expr ..., method 2 will get the wrong +result in big-endian system, as 0~15 bits will always be zero. + +For the similar reason, when loading an u16 value from the u32 data +register, we should use "*(u16 *) sreg;" instead of "(u16)*sreg;", +the 2nd method will get the wrong value in the big-endian system. + +So introduce some wrapper functions to store/load an u8 or u16 +integer to/from the u32 data register, and use them in the right +place. + +Signed-off-by: Liping Zhang +Signed-off-by: Pablo Neira Ayuso +--- + include/net/netfilter/nf_tables.h | 29 +++++++++++++++++++++++++ + net/ipv4/netfilter/nft_masq_ipv4.c | 8 +++---- + net/ipv4/netfilter/nft_redir_ipv4.c | 8 +++---- + net/ipv6/netfilter/nft_masq_ipv6.c | 8 +++---- + net/ipv6/netfilter/nft_redir_ipv6.c | 8 +++---- + net/netfilter/nft_ct.c | 10 ++++----- + net/netfilter/nft_meta.c | 42 +++++++++++++++++++------------------ + net/netfilter/nft_nat.c | 8 +++---- + 8 files changed, 76 insertions(+), 45 deletions(-) + +--- a/include/net/netfilter/nf_tables.h ++++ b/include/net/netfilter/nf_tables.h +@@ -87,6 +87,35 @@ struct nft_regs { + }; + }; + ++/* Store/load an u16 or u8 integer to/from the u32 data register. ++ * ++ * Note, when using concatenations, register allocation happens at 32-bit ++ * level. So for store instruction, pad the rest part with zero to avoid ++ * garbage values. ++ */ ++ ++static inline void nft_reg_store16(u32 *dreg, u16 val) ++{ ++ *dreg = 0; ++ *(u16 *)dreg = val; ++} ++ ++static inline void nft_reg_store8(u32 *dreg, u8 val) ++{ ++ *dreg = 0; ++ *(u8 *)dreg = val; ++} ++ ++static inline u16 nft_reg_load16(u32 *sreg) ++{ ++ return *(u16 *)sreg; ++} ++ ++static inline u8 nft_reg_load8(u32 *sreg) ++{ ++ return *(u8 *)sreg; ++} ++ + static inline void nft_data_copy(u32 *dst, const struct nft_data *src, + unsigned int len) + { +--- a/net/ipv4/netfilter/nft_masq_ipv4.c ++++ b/net/ipv4/netfilter/nft_masq_ipv4.c +@@ -26,10 +26,10 @@ static void nft_masq_ipv4_eval(const str + memset(&range, 0, sizeof(range)); + range.flags = priv->flags; + if (priv->sreg_proto_min) { +- range.min_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_min]; +- range.max_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_max]; ++ range.min_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_min]); ++ range.max_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_max]); + } + regs->verdict.code = nf_nat_masquerade_ipv4(pkt->skb, pkt->hook, + &range, pkt->out); +--- a/net/ipv4/netfilter/nft_redir_ipv4.c ++++ b/net/ipv4/netfilter/nft_redir_ipv4.c +@@ -26,10 +26,10 @@ static void nft_redir_ipv4_eval(const st + + memset(&mr, 0, sizeof(mr)); + if (priv->sreg_proto_min) { +- mr.range[0].min.all = +- *(__be16 *)®s->data[priv->sreg_proto_min]; +- mr.range[0].max.all = +- *(__be16 *)®s->data[priv->sreg_proto_max]; ++ mr.range[0].min.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_min]); ++ mr.range[0].max.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_max]); + mr.range[0].flags |= NF_NAT_RANGE_PROTO_SPECIFIED; + } + +--- a/net/ipv6/netfilter/nft_masq_ipv6.c ++++ b/net/ipv6/netfilter/nft_masq_ipv6.c +@@ -27,10 +27,10 @@ static void nft_masq_ipv6_eval(const str + memset(&range, 0, sizeof(range)); + range.flags = priv->flags; + if (priv->sreg_proto_min) { +- range.min_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_min]; +- range.max_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_max]; ++ range.min_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_min]); ++ range.max_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_max]); + } + regs->verdict.code = nf_nat_masquerade_ipv6(pkt->skb, &range, pkt->out); + } +--- a/net/ipv6/netfilter/nft_redir_ipv6.c ++++ b/net/ipv6/netfilter/nft_redir_ipv6.c +@@ -26,10 +26,10 @@ static void nft_redir_ipv6_eval(const st + + memset(&range, 0, sizeof(range)); + if (priv->sreg_proto_min) { +- range.min_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_min], +- range.max_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_max], ++ range.min_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_min]); ++ range.max_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_max]); + range.flags |= NF_NAT_RANGE_PROTO_SPECIFIED; + } + +--- a/net/netfilter/nft_ct.c ++++ b/net/netfilter/nft_ct.c +@@ -77,7 +77,7 @@ static void nft_ct_get_eval(const struct + + switch (priv->key) { + case NFT_CT_DIRECTION: +- *dest = CTINFO2DIR(ctinfo); ++ nft_reg_store8(dest, CTINFO2DIR(ctinfo)); + return; + case NFT_CT_STATUS: + *dest = ct->status; +@@ -129,10 +129,10 @@ static void nft_ct_get_eval(const struct + return; + } + case NFT_CT_L3PROTOCOL: +- *dest = nf_ct_l3num(ct); ++ nft_reg_store8(dest, nf_ct_l3num(ct)); + return; + case NFT_CT_PROTOCOL: +- *dest = nf_ct_protonum(ct); ++ nft_reg_store8(dest, nf_ct_protonum(ct)); + return; + default: + break; +@@ -149,10 +149,10 @@ static void nft_ct_get_eval(const struct + nf_ct_l3num(ct) == NFPROTO_IPV4 ? 4 : 16); + return; + case NFT_CT_PROTO_SRC: +- *dest = (__force __u16)tuple->src.u.all; ++ nft_reg_store16(dest, (__force u16)tuple->src.u.all); + return; + case NFT_CT_PROTO_DST: +- *dest = (__force __u16)tuple->dst.u.all; ++ nft_reg_store16(dest, (__force u16)tuple->dst.u.all); + return; + default: + break; +--- a/net/netfilter/nft_meta.c ++++ b/net/netfilter/nft_meta.c +@@ -45,16 +45,15 @@ void nft_meta_get_eval(const struct nft_ + *dest = skb->len; + break; + case NFT_META_PROTOCOL: +- *dest = 0; +- *(__be16 *)dest = skb->protocol; ++ nft_reg_store16(dest, (__force u16)skb->protocol); + break; + case NFT_META_NFPROTO: +- *dest = pkt->pf; ++ nft_reg_store8(dest, pkt->pf); + break; + case NFT_META_L4PROTO: + if (!pkt->tprot_set) + goto err; +- *dest = pkt->tprot; ++ nft_reg_store8(dest, pkt->tprot); + break; + case NFT_META_PRIORITY: + *dest = skb->priority; +@@ -85,14 +84,12 @@ void nft_meta_get_eval(const struct nft_ + case NFT_META_IIFTYPE: + if (in == NULL) + goto err; +- *dest = 0; +- *(u16 *)dest = in->type; ++ nft_reg_store16(dest, in->type); + break; + case NFT_META_OIFTYPE: + if (out == NULL) + goto err; +- *dest = 0; +- *(u16 *)dest = out->type; ++ nft_reg_store16(dest, out->type); + break; + case NFT_META_SKUID: + sk = skb_to_full_sk(skb); +@@ -142,22 +139,22 @@ void nft_meta_get_eval(const struct nft_ + #endif + case NFT_META_PKTTYPE: + if (skb->pkt_type != PACKET_LOOPBACK) { +- *dest = skb->pkt_type; ++ nft_reg_store8(dest, skb->pkt_type); + break; + } + + switch (pkt->pf) { + case NFPROTO_IPV4: + if (ipv4_is_multicast(ip_hdr(skb)->daddr)) +- *dest = PACKET_MULTICAST; ++ nft_reg_store8(dest, PACKET_MULTICAST); + else +- *dest = PACKET_BROADCAST; ++ nft_reg_store8(dest, PACKET_BROADCAST); + break; + case NFPROTO_IPV6: + if (ipv6_hdr(skb)->daddr.s6_addr[0] == 0xFF) +- *dest = PACKET_MULTICAST; ++ nft_reg_store8(dest, PACKET_MULTICAST); + else +- *dest = PACKET_BROADCAST; ++ nft_reg_store8(dest, PACKET_BROADCAST); + break; + case NFPROTO_NETDEV: + switch (skb->protocol) { +@@ -171,14 +168,14 @@ void nft_meta_get_eval(const struct nft_ + goto err; + + if (ipv4_is_multicast(iph->daddr)) +- *dest = PACKET_MULTICAST; ++ nft_reg_store8(dest, PACKET_MULTICAST); + else +- *dest = PACKET_BROADCAST; ++ nft_reg_store8(dest, PACKET_BROADCAST); + + break; + } + case htons(ETH_P_IPV6): +- *dest = PACKET_MULTICAST; ++ nft_reg_store8(dest, PACKET_MULTICAST); + break; + default: + WARN_ON_ONCE(1); +@@ -233,7 +230,9 @@ void nft_meta_set_eval(const struct nft_ + { + const struct nft_meta *meta = nft_expr_priv(expr); + struct sk_buff *skb = pkt->skb; +- u32 value = regs->data[meta->sreg]; ++ u32 *sreg = ®s->data[meta->sreg]; ++ u32 value = *sreg; ++ u8 pkt_type; + + switch (meta->key) { + case NFT_META_MARK: +@@ -243,9 +242,12 @@ void nft_meta_set_eval(const struct nft_ + skb->priority = value; + break; + case NFT_META_PKTTYPE: +- if (skb->pkt_type != value && +- skb_pkt_type_ok(value) && skb_pkt_type_ok(skb->pkt_type)) +- skb->pkt_type = value; ++ pkt_type = nft_reg_load8(sreg); ++ ++ if (skb->pkt_type != pkt_type && ++ skb_pkt_type_ok(pkt_type) && ++ skb_pkt_type_ok(skb->pkt_type)) ++ skb->pkt_type = pkt_type; + break; + case NFT_META_NFTRACE: + skb->nf_trace = !!value; +--- a/net/netfilter/nft_nat.c ++++ b/net/netfilter/nft_nat.c +@@ -65,10 +65,10 @@ static void nft_nat_eval(const struct nf + } + + if (priv->sreg_proto_min) { +- range.min_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_min]; +- range.max_proto.all = +- *(__be16 *)®s->data[priv->sreg_proto_max]; ++ range.min_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_min]); ++ range.max_proto.all = (__force __be16)nft_reg_load16( ++ ®s->data[priv->sreg_proto_max]); + range.flags |= NF_NAT_RANGE_PROTO_SPECIFIED; + } + diff --git a/target/linux/generic/pending-4.9/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch b/target/linux/generic/backport-4.9/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch similarity index 50% rename from target/linux/generic/pending-4.9/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch rename to target/linux/generic/backport-4.9/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch index 7b7b403ed..38697021d 100644 --- a/target/linux/generic/pending-4.9/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch +++ b/target/linux/generic/backport-4.9/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch @@ -1,16 +1,20 @@ -From: David Heidelberger +From 649affd04813c43e0a72886517fcfccd63230981 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Mon, 29 Jun 2015 16:53:03 +0200 Subject: uapi/if_ether.h: prevent redefinition of struct ethhdr Musl provides its own ethhdr struct definition. Add a guard to prevent its definition of the appropriate musl header has already been included. -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski +glibc does not implement this header, but when glibc will implement this +they can just define __UAPI_DEF_ETHHDR 0 to make it work with the +kernel. + +Signed-off-by: Hauke Mehrtens --- - include/uapi/linux/if_ether.h | 3 +++ - include/uapi/linux/libc-compat.h | 11 +++++++++++ - 2 files changed, 14 insertions(+) + include/uapi/linux/if_ether.h | 3 +++ + include/uapi/linux/libc-compat.h | 6 ++++++ + 2 files changed, 9 insertions(+) --- a/include/uapi/linux/if_ether.h +++ b/include/uapi/linux/if_ether.h @@ -38,28 +42,14 @@ Signed-off-by: Jonas Gorski #endif /* _UAPI_LINUX_IF_ETHER_H */ --- a/include/uapi/linux/libc-compat.h +++ b/include/uapi/linux/libc-compat.h -@@ -89,6 +89,14 @@ +@@ -263,4 +263,10 @@ - #endif /* _NET_IF_H */ + #endif /* __GLIBC__ */ -+/* musl defines the ethhdr struct itself in its netinet/if_ether.h. -+ * Glibc just includes the kernel header and uses a different guard. */ -+#if defined(_NETINET_IF_ETHER_H) -+#define __UAPI_DEF_ETHHDR 0 -+#else ++/* Definitions for if_ether.h */ ++/* allow libcs like musl to deactivate this, glibc does not implement this. */ ++#ifndef __UAPI_DEF_ETHHDR +#define __UAPI_DEF_ETHHDR 1 +#endif + - /* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - -@@ -184,6 +192,9 @@ - /* For the future if glibc adds IFF_LOWER_UP, IFF_DORMANT and IFF_ECHO */ - #define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 1 - -+/* Definitions for if_ether.h */ -+#define __UAPI_DEF_ETHHDR 1 -+ - /* Definitions for in.h */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 + #endif /* _UAPI_LIBC_COMPAT_H */ diff --git a/target/linux/generic/config-3.18 b/target/linux/generic/config-3.18 index 7df43be97..04245531f 100644 --- a/target/linux/generic/config-3.18 +++ b/target/linux/generic/config-3.18 @@ -2272,6 +2272,7 @@ CONFIG_MTD_SPLIT=y # CONFIG_MTD_SPLIT_FIRMWARE is not set CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware" # CONFIG_MTD_SPLIT_FIT_FW is not set +# CONFIG_MTD_SPLIT_JIMAGE_FW is not set # CONFIG_MTD_SPLIT_LZMA_FW is not set # CONFIG_MTD_SPLIT_MINOR_FW is not set # CONFIG_MTD_SPLIT_SEAMA_FW is not set diff --git a/target/linux/generic/config-4.4 b/target/linux/generic/config-4.4 index 050756933..3285000eb 100644 --- a/target/linux/generic/config-4.4 +++ b/target/linux/generic/config-4.4 @@ -2378,6 +2378,7 @@ CONFIG_MTD_SPLIT=y # CONFIG_MTD_SPLIT_FIRMWARE is not set CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware" # CONFIG_MTD_SPLIT_FIT_FW is not set +# CONFIG_MTD_SPLIT_JIMAGE_FW is not set # CONFIG_MTD_SPLIT_LZMA_FW is not set # CONFIG_MTD_SPLIT_MINOR_FW is not set # CONFIG_MTD_SPLIT_SEAMA_FW is not set diff --git a/target/linux/generic/config-4.9 b/target/linux/generic/config-4.9 index 4ebcfb636..3f050c205 100644 --- a/target/linux/generic/config-4.9 +++ b/target/linux/generic/config-4.9 @@ -693,6 +693,7 @@ CONFIG_CC_STACKPROTECTOR_NONE=y # CONFIG_CGROUPS is not set # CONFIG_CGROUP_DEBUG is not set # CONFIG_CGROUP_NET_PRIO is not set +# CONFIG_CGROUP_NET_CLASSID is not set # CONFIG_CHARGER_BQ2415X is not set # CONFIG_CHARGER_BQ24190 is not set # CONFIG_CHARGER_BQ24257 is not set @@ -1193,6 +1194,7 @@ CONFIG_EXPERT=y CONFIG_EXT4_USE_FOR_EXT2=y # CONFIG_EXTCON is not set # CONFIG_EXTCON_ADC_JACK is not set +# CONFIG_EXTCON_AXP288 is not set # CONFIG_EXTCON_GPIO is not set # CONFIG_EXTCON_MAX3355 is not set # CONFIG_EXTCON_QCOM_SPMI_MISC is not set @@ -2648,6 +2650,7 @@ CONFIG_MTD_SPLIT=y # CONFIG_MTD_SPLIT_FIRMWARE is not set CONFIG_MTD_SPLIT_FIRMWARE_NAME="firmware" # CONFIG_MTD_SPLIT_FIT_FW is not set +# CONFIG_MTD_SPLIT_JIMAGE_FW is not set # CONFIG_MTD_SPLIT_LZMA_FW is not set # CONFIG_MTD_SPLIT_MINOR_FW is not set # CONFIG_MTD_SPLIT_SEAMA_FW is not set diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig b/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig index 4a15d4879..81ece43db 100644 --- a/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig +++ b/target/linux/generic/files/drivers/mtd/mtdsplit/Kconfig @@ -69,3 +69,8 @@ config MTD_SPLIT_MINOR_FW bool "Mikrotik NOR image based firmware partition parser" depends on MTD_SPLIT_SUPPORT select MTD_SPLIT + +config MTD_SPLIT_JIMAGE_FW + bool "JBOOT Image based firmware partition parser" + depends on MTD_SPLIT_SUPPORT + select MTD_SPLIT diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile b/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile index fab85caa7..206e754a1 100644 --- a/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile +++ b/target/linux/generic/files/drivers/mtd/mtdsplit/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_MTD_SPLIT_BRNIMAGE_FW) += mtdsplit_brnimage.o obj-$(CONFIG_MTD_SPLIT_EVA_FW) += mtdsplit_eva.o obj-$(CONFIG_MTD_SPLIT_WRGG_FW) += mtdsplit_wrgg.o obj-$(CONFIG_MTD_SPLIT_MINOR_FW) += mtdsplit_minor.o +obj-$(CONFIG_MTD_SPLIT_JIMAGE_FW) += mtdsplit_jimage.o diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_jimage.c b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_jimage.c new file mode 100644 index 000000000..51544a794 --- /dev/null +++ b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_jimage.c @@ -0,0 +1,277 @@ +/* + * Copyright (C) 2018 Paweł Dembicki + * + * Based on: mtdsplit_uimage.c + * Copyright (C) 2013 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mtdsplit.h" + +#define MAX_HEADER_LEN ( STAG_SIZE + SCH2_SIZE ) + +#define STAG_SIZE 16 +#define STAG_ID 0x04 +#define STAG_MAGIC 0x2B24 + +#define SCH2_SIZE 40 +#define SCH2_MAGIC 0x2124 +#define SCH2_VER 0x02 + +/* + * Jboot image header, + * all data in little endian. + */ + +struct jimage_header //stag + sch2 jboot joined headers +{ + uint8_t stag_cmark; // in factory 0xFF , in sysupgrade must be the same as stag_id + uint8_t stag_id; // 0x04 + uint16_t stag_magic; //magic 0x2B24 + uint32_t stag_time_stamp; // timestamp calculated in jboot way + uint32_t stag_image_length; // lentgh of kernel + sch2 header + uint16_t stag_image_checksum; // negated jboot_checksum of sch2 + kernel + uint16_t stag_tag_checksum; // negated jboot_checksum of stag header data + uint16_t sch2_magic; // magic 0x2124 + uint8_t sch2_cp_type; // 0x00 for flat, 0x01 for jz, 0x02 for gzip, 0x03 for lzma + uint8_t sch2_version; // 0x02 for sch2 + uint32_t sch2_ram_addr; // ram entry address + uint32_t sch2_image_len; // kernel image length + uint32_t sch2_image_crc32; // kernel image crc + uint32_t sch2_start_addr; // ram start address + uint32_t sch2_rootfs_addr; // rootfs flash address + uint32_t sch2_rootfs_len; // rootfls length + uint32_t sch2_rootfs_crc32; // rootfs crc32 + uint32_t sch2_header_crc32; // sch2 header crc32, durring calculation this area is replaced by zero + uint16_t sch2_header_length; // sch2 header length: 0x28 + uint16_t sch2_cmd_line_length; // cmd line length, known zeros +}; + +static int +read_jimage_header(struct mtd_info *mtd, size_t offset, u_char *buf, + size_t header_len) +{ + size_t retlen; + int ret; + + ret = mtd_read(mtd, offset, header_len, &retlen, buf); + if (ret) { + pr_debug("read error in \"%s\"\n", mtd->name); + return ret; + } + + if (retlen != header_len) { + pr_debug("short read in \"%s\"\n", mtd->name); + return -EIO; + } + + return 0; +} + +/** + * __mtdsplit_parse_jimage - scan partition and create kernel + rootfs parts + * + * @find_header: function to call for a block of data that will return offset + * of a valid jImage header if found + */ +static int __mtdsplit_parse_jimage(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data, + ssize_t (*find_header)(u_char *buf, size_t len)) +{ + struct mtd_partition *parts; + u_char *buf; + int nr_parts; + size_t offset; + size_t jimage_offset; + size_t jimage_size = 0; + size_t rootfs_offset; + size_t rootfs_size = 0; + int jimage_part, rf_part; + int ret; + enum mtdsplit_part_type type; + + nr_parts = 2; + parts = kzalloc(nr_parts * sizeof(*parts), GFP_KERNEL); + if (!parts) + return -ENOMEM; + + buf = vmalloc(MAX_HEADER_LEN); + if (!buf) { + ret = -ENOMEM; + goto err_free_parts; + } + + /* find jImage on erase block boundaries */ + for (offset = 0; offset < master->size; offset += master->erasesize) { + struct jimage_header *header; + + jimage_size = 0; + + ret = read_jimage_header(master, offset, buf, MAX_HEADER_LEN); + if (ret) + continue; + + ret = find_header(buf, MAX_HEADER_LEN); + if (ret < 0) { + pr_debug("no valid jImage found in \"%s\" at offset %llx\n", + master->name, (unsigned long long) offset); + continue; + } + header = (struct jimage_header *)(buf + ret); + + jimage_size = sizeof(*header) + header->sch2_image_len + ret; + if ((offset + jimage_size) > master->size) { + pr_debug("jImage exceeds MTD device \"%s\"\n", + master->name); + continue; + } + break; + } + + if (jimage_size == 0) { + pr_debug("no jImage found in \"%s\"\n", master->name); + ret = -ENODEV; + goto err_free_buf; + } + + jimage_offset = offset; + + if (jimage_offset == 0) { + jimage_part = 0; + rf_part = 1; + + /* find the roots after the jImage */ + ret = mtd_find_rootfs_from(master, jimage_offset + jimage_size, + master->size, &rootfs_offset, &type); + if (ret) { + pr_debug("no rootfs after jImage in \"%s\"\n", + master->name); + goto err_free_buf; + } + + rootfs_size = master->size - rootfs_offset; + jimage_size = rootfs_offset - jimage_offset; + } else { + rf_part = 0; + jimage_part = 1; + + /* check rootfs presence at offset 0 */ + ret = mtd_check_rootfs_magic(master, 0, &type); + if (ret) { + pr_debug("no rootfs before jImage in \"%s\"\n", + master->name); + goto err_free_buf; + } + + rootfs_offset = 0; + rootfs_size = jimage_offset; + } + + if (rootfs_size == 0) { + pr_debug("no rootfs found in \"%s\"\n", master->name); + ret = -ENODEV; + goto err_free_buf; + } + + parts[jimage_part].name = KERNEL_PART_NAME; + parts[jimage_part].offset = jimage_offset; + parts[jimage_part].size = jimage_size; + + if (type == MTDSPLIT_PART_TYPE_UBI) + parts[rf_part].name = UBI_PART_NAME; + else + parts[rf_part].name = ROOTFS_PART_NAME; + parts[rf_part].offset = rootfs_offset; + parts[rf_part].size = rootfs_size; + + vfree(buf); + + *pparts = parts; + return nr_parts; + +err_free_buf: + vfree(buf); + +err_free_parts: + kfree(parts); + return ret; +} + +static ssize_t jimage_verify_default(u_char *buf, size_t len) +{ + struct jimage_header *header = (struct jimage_header *)buf; + + /* default sanity checks */ + if (header->stag_magic != STAG_MAGIC) { + pr_debug("invalid jImage stag header magic: %04x\n", + header->stag_magic); + return -EINVAL; + } + if (header->sch2_magic != SCH2_MAGIC) { + pr_debug("invalid jImage sch2 header magic: %04x\n", + header->stag_magic); + return -EINVAL; + } + if (header->stag_cmark != header->stag_id) { + pr_debug("invalid jImage stag header cmark: %02x\n", + header->stag_magic); + return -EINVAL; + } + if (header->stag_id != STAG_ID) { + pr_debug("invalid jImage stag header id: %02x\n", + header->stag_magic); + return -EINVAL; + } + if (header->sch2_version != SCH2_VER) { + pr_debug("invalid jImage sch2 header version: %02x\n", + header->stag_magic); + return -EINVAL; + } + + return 0; +} + +static int +mtdsplit_jimage_parse_generic(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +{ + return __mtdsplit_parse_jimage(master, pparts, data, + jimage_verify_default); +} + +static struct mtd_part_parser jimage_generic_parser = { + .owner = THIS_MODULE, + .name = "jimage-fw", + .parse_fn = mtdsplit_jimage_parse_generic, + .type = MTD_PARSER_TYPE_FIRMWARE, +}; + +/************************************************** + * Init + **************************************************/ + +static int __init mtdsplit_jimage_init(void) +{ + register_mtd_parser(&jimage_generic_parser); + + return 0; +} + +module_init(mtdsplit_jimage_init); diff --git a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c index c0e897777..16ebd5134 100644 --- a/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c +++ b/target/linux/generic/files/drivers/mtd/mtdsplit/mtdsplit_wrgg.c @@ -22,6 +22,7 @@ #define WRGG_NR_PARTS 2 #define WRGG_MIN_ROOTFS_OFFS 0x80000 /* 512KiB */ #define WRGG03_MAGIC 0x20080321 +#define WRG_MAGIC 0x20040220 struct wrgg03_header { char signature[32]; @@ -38,6 +39,16 @@ struct wrgg03_header { char digest[16]; } __attribute__ ((packed)); +struct wrg_header { + char signature[32]; + uint32_t magic1; + uint32_t magic2; + uint32_t size; + uint32_t offset; + char devname[32]; + char digest[16]; +} __attribute__ ((packed)); + static int mtdsplit_parse_wrgg(struct mtd_info *master, const struct mtd_partition **pparts, @@ -59,10 +70,14 @@ static int mtdsplit_parse_wrgg(struct mtd_info *master, return -EIO; /* sanity checks */ - if (le32_to_cpu(hdr.magic1) != WRGG03_MAGIC) + if (le32_to_cpu(hdr.magic1) == WRGG03_MAGIC) { + kernel_ent_size = hdr_len + be32_to_cpu(hdr.size); + } else if (le32_to_cpu(hdr.magic1) == WRG_MAGIC) { + kernel_ent_size = sizeof(struct wrg_header) + le32_to_cpu( + ((struct wrg_header*)&hdr)->size); + } else { return -EINVAL; - - kernel_ent_size = hdr_len + be32_to_cpu(hdr.size); + } if (kernel_ent_size > master->size) return -EINVAL; diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c index 61811370d..7512ee1b4 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8216.c +++ b/target/linux/generic/files/drivers/net/phy/ar8216.c @@ -355,6 +355,7 @@ ar8xxx_reg_wait(struct ar8xxx_priv *priv, u32 reg, u32 mask, u32 val, return 0; usleep_range(1000, 2000); + cond_resched(); } return -ETIMEDOUT; @@ -426,6 +427,7 @@ ar8xxx_mib_fetch_port_stat(struct ar8xxx_priv *priv, int port, bool flush) mib_stats[i] = 0; else mib_stats[i] += t; + cond_resched(); } } @@ -565,6 +567,7 @@ ar8216_wait_bit(struct ar8xxx_priv *priv, int reg, u32 mask, u32 val) break; udelay(10); + cond_resched(); } pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n", @@ -730,8 +733,10 @@ ar8216_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1) { int timeout = 20; - while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout) - udelay(10); + while (ar8xxx_mii_read32(priv, r2, r1) & AR8216_ATU_ACTIVE && --timeout) { + udelay(10); + cond_resched(); + } if (!timeout) pr_err("ar8216: timeout waiting for atu to become ready\n"); diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h index d9508b9ff..ba0e0ddcc 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8216.h +++ b/target/linux/generic/files/drivers/net/phy/ar8216.h @@ -462,6 +462,7 @@ struct ar8xxx_priv { bool mirror_tx; int source_port; int monitor_port; + u8 port_vlan_prio[AR8X16_MAX_PORTS]; }; u32 diff --git a/target/linux/generic/files/drivers/net/phy/ar8327.c b/target/linux/generic/files/drivers/net/phy/ar8327.c index 6ebd2e8ae..7bfc18750 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8327.c +++ b/target/linux/generic/files/drivers/net/phy/ar8327.c @@ -926,10 +926,19 @@ ar8327_setup_port(struct ar8xxx_priv *priv, int port, u32 members) t = pvid << AR8327_PORT_VLAN0_DEF_SVID_S; t |= pvid << AR8327_PORT_VLAN0_DEF_CVID_S; + if (priv->vlan && priv->port_vlan_prio[port]) { + u32 prio = priv->port_vlan_prio[port]; + + t |= prio << AR8327_PORT_VLAN0_DEF_SPRI_S; + t |= prio << AR8327_PORT_VLAN0_DEF_CPRI_S; + } ar8xxx_write(priv, AR8327_REG_PORT_VLAN0(port), t); t = AR8327_PORT_VLAN1_PORT_VLAN_PROP; t |= egress << AR8327_PORT_VLAN1_OUT_MODE_S; + if (priv->vlan && priv->port_vlan_prio[port]) + t |= AR8327_PORT_VLAN1_VLAN_PRI_PROP; + ar8xxx_write(priv, AR8327_REG_PORT_VLAN1(port), t); t = members; @@ -1074,8 +1083,10 @@ ar8327_wait_atu_ready(struct ar8xxx_priv *priv, u16 r2, u16 r1) { int timeout = 20; - while (ar8xxx_mii_read32(priv, r2, r1) & AR8327_ATU_FUNC_BUSY && --timeout) - udelay(10); + while (ar8xxx_mii_read32(priv, r2, r1) & AR8327_ATU_FUNC_BUSY && --timeout) { + udelay(10); + cond_resched(); + } if (!timeout) pr_err("ar8327: timeout waiting for atu to become ready\n"); @@ -1268,6 +1279,37 @@ ar8327_sw_set_igmp_v3(struct switch_dev *dev, return 0; } +static int +ar8327_sw_set_port_vlan_prio(struct switch_dev *dev, const struct switch_attr *attr, + struct switch_val *val) +{ + struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev); + int port = val->port_vlan; + + if (port >= dev->ports) + return -EINVAL; + if (port == 0 || port == 6) + return -EOPNOTSUPP; + if (val->value.i < 0 || val->value.i > 7) + return -EINVAL; + + priv->port_vlan_prio[port] = val->value.i; + + return 0; +} + +static int +ar8327_sw_get_port_vlan_prio(struct switch_dev *dev, const struct switch_attr *attr, + struct switch_val *val) +{ + struct ar8xxx_priv *priv = swdev_to_ar8xxx(dev); + int port = val->port_vlan; + + val->value.i = priv->port_vlan_prio[port]; + + return 0; +} + static const struct switch_attr ar8327_sw_attr_globals[] = { { .type = SWITCH_TYPE_INT, @@ -1314,7 +1356,7 @@ static const struct switch_attr ar8327_sw_attr_globals[] = { .set = ar8xxx_sw_set_mirror_source_port, .get = ar8xxx_sw_get_mirror_source_port, .max = AR8327_NUM_PORTS - 1 - }, + }, { .type = SWITCH_TYPE_INT, .name = "arl_age_time", @@ -1389,6 +1431,14 @@ static const struct switch_attr ar8327_sw_attr_port[] = { .get = ar8327_sw_get_port_igmp_snooping, .max = 1 }, + { + .type = SWITCH_TYPE_INT, + .name = "vlan_prio", + .description = "Port VLAN default priority (VLAN PCP) (0-7)", + .set = ar8327_sw_set_port_vlan_prio, + .get = ar8327_sw_get_port_vlan_prio, + .max = 7, + }, }; static const struct switch_dev_ops ar8327_sw_ops = { diff --git a/target/linux/generic/files/drivers/net/phy/ar8327.h b/target/linux/generic/files/drivers/net/phy/ar8327.h index 828dd28f3..2309e5289 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8327.h +++ b/target/linux/generic/files/drivers/net/phy/ar8327.h @@ -164,12 +164,18 @@ #define AR8327_FRAME_ACK_CTRL_S(_i) (((_i) % 4) * 8) #define AR8327_REG_PORT_VLAN0(_i) (0x420 + (_i) * 0x8) +#define AR8327_PORT_VLAN0_DEF_PRI_MASK BITS(0, 3) #define AR8327_PORT_VLAN0_DEF_SVID BITS(0, 12) #define AR8327_PORT_VLAN0_DEF_SVID_S 0 +#define AR8327_PORT_VLAN0_DEF_SPRI BITS(13, 3) +#define AR8327_PORT_VLAN0_DEF_SPRI_S 13 #define AR8327_PORT_VLAN0_DEF_CVID BITS(16, 12) #define AR8327_PORT_VLAN0_DEF_CVID_S 16 +#define AR8327_PORT_VLAN0_DEF_CPRI BITS(29, 3) +#define AR8327_PORT_VLAN0_DEF_CPRI_S 29 #define AR8327_REG_PORT_VLAN1(_i) (0x424 + (_i) * 0x8) +#define AR8327_PORT_VLAN1_VLAN_PRI_PROP BIT(4) #define AR8327_PORT_VLAN1_PORT_VLAN_PROP BIT(6) #define AR8327_PORT_VLAN1_OUT_MODE BITS(12, 2) #define AR8327_PORT_VLAN1_OUT_MODE_S 12 diff --git a/target/linux/generic/files/drivers/net/phy/b53/b53_priv.h b/target/linux/generic/files/drivers/net/phy/b53/b53_priv.h index 277c75d36..a9296c942 100644 --- a/target/linux/generic/files/drivers/net/phy/b53/b53_priv.h +++ b/target/linux/generic/files/drivers/net/phy/b53/b53_priv.h @@ -310,16 +310,16 @@ static inline int b53_write64(struct b53_device *dev, u8 page, u8 reg, } #ifdef CONFIG_BCM47XX +#include +#endif #include #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) #include -#else -#include #endif -#include static inline int b53_switch_get_reset_gpio(struct b53_device *dev) { +#ifdef CONFIG_BCM47XX enum bcm47xx_board board = bcm47xx_board_get(); switch (board) { @@ -327,13 +327,15 @@ static inline int b53_switch_get_reset_gpio(struct b53_device *dev) case BCM47XX_BOARD_LINKSYS_WRT310NV1: return 8; default: - return bcm47xx_nvram_gpio_pin("robo_reset"); + break; } -} +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) + return bcm47xx_nvram_gpio_pin("robo_reset"); #else -static inline int b53_switch_get_reset_gpio(struct b53_device *dev) -{ return -ENOENT; +#endif } -#endif + #endif diff --git a/target/linux/generic/files/drivers/net/phy/swconfig.c b/target/linux/generic/files/drivers/net/phy/swconfig.c index 78569a930..e8a684742 100644 --- a/target/linux/generic/files/drivers/net/phy/swconfig.c +++ b/target/linux/generic/files/drivers/net/phy/swconfig.c @@ -36,7 +36,7 @@ MODULE_LICENSE("GPL"); static int swdev_id; static struct list_head swdevs; -static DEFINE_SPINLOCK(swdevs_lock); +static DEFINE_MUTEX(swdevs_lock); struct swconfig_callback; struct swconfig_callback { @@ -296,13 +296,13 @@ static struct nla_policy link_policy[SWITCH_LINK_ATTR_MAX] = { static inline void swconfig_lock(void) { - spin_lock(&swdevs_lock); + mutex_lock(&swdevs_lock); } static inline void swconfig_unlock(void) { - spin_unlock(&swdevs_lock); + mutex_unlock(&swdevs_lock); } static struct switch_dev * diff --git a/target/linux/generic/files/drivers/net/phy/swconfig_leds.c b/target/linux/generic/files/drivers/net/phy/swconfig_leds.c index 20b9a12a5..91824b7cf 100644 --- a/target/linux/generic/files/drivers/net/phy/swconfig_leds.c +++ b/target/linux/generic/files/drivers/net/phy/swconfig_leds.c @@ -29,6 +29,15 @@ SWCONFIG_LED_PORT_SPEED_100 | \ SWCONFIG_LED_PORT_SPEED_1000) +#define SWCONFIG_LED_MODE_LINK 0x01 +#define SWCONFIG_LED_MODE_TX 0x02 +#define SWCONFIG_LED_MODE_RX 0x04 +#define SWCONFIG_LED_MODE_TXRX (SWCONFIG_LED_MODE_TX | \ + SWCONFIG_LED_MODE_RX) +#define SWCONFIG_LED_MODE_ALL (SWCONFIG_LED_MODE_LINK | \ + SWCONFIG_LED_MODE_TX | \ + SWCONFIG_LED_MODE_RX) + struct switch_led_trigger { struct led_trigger trig; struct switch_dev *swdev; @@ -36,7 +45,8 @@ struct switch_led_trigger { struct delayed_work sw_led_work; u32 port_mask; u32 port_link; - unsigned long long port_traffic[SWCONFIG_LED_NUM_PORTS]; + unsigned long long port_tx_traffic[SWCONFIG_LED_NUM_PORTS]; + unsigned long long port_rx_traffic[SWCONFIG_LED_NUM_PORTS]; u8 link_speed[SWCONFIG_LED_NUM_PORTS]; }; @@ -50,6 +60,7 @@ struct swconfig_trig_data { bool prev_link; unsigned long prev_traffic; enum led_brightness prev_brightness; + u8 mode; u8 speed_mask; }; @@ -113,18 +124,16 @@ swconfig_trig_port_mask_store(struct device *dev, struct device_attribute *attr, return ret; write_lock(&trig_data->lock); - changed = (trig_data->port_mask != port_mask); - if (changed) { - trig_data->port_mask = port_mask; - if (port_mask == 0) - swconfig_trig_set_brightness(trig_data, LED_OFF); - } - + trig_data->port_mask = port_mask; write_unlock(&trig_data->lock); - if (changed) + if (changed) { + if (port_mask == 0) + swconfig_trig_set_brightness(trig_data, LED_OFF); + swconfig_trig_update_port_mask(led_cdev->trigger); + } return size; } @@ -135,11 +144,14 @@ swconfig_trig_port_mask_show(struct device *dev, struct device_attribute *attr, { struct led_classdev *led_cdev = dev_get_drvdata(dev); struct swconfig_trig_data *trig_data = led_cdev->trigger_data; + u32 port_mask; read_lock(&trig_data->lock); - sprintf(buf, "%#x\n", trig_data->port_mask); + port_mask = trig_data->port_mask; read_unlock(&trig_data->lock); + sprintf(buf, "%#x\n", port_mask); + return strlen(buf) + 1; } @@ -153,11 +165,14 @@ static ssize_t swconfig_trig_speed_mask_show(struct device *dev, { struct led_classdev *led_cdev = dev_get_drvdata(dev); struct swconfig_trig_data *trig_data = led_cdev->trigger_data; + u8 speed_mask; read_lock(&trig_data->lock); - sprintf(buf, "%#x\n", trig_data->speed_mask); + speed_mask = trig_data->speed_mask; read_unlock(&trig_data->lock); + sprintf(buf, "%#x\n", speed_mask); + return strlen(buf) + 1; } @@ -186,6 +201,79 @@ static ssize_t swconfig_trig_speed_mask_store(struct device *dev, static DEVICE_ATTR(speed_mask, 0644, swconfig_trig_speed_mask_show, swconfig_trig_speed_mask_store); +static ssize_t swconfig_trig_mode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct swconfig_trig_data *trig_data = led_cdev->trigger_data; + u8 mode; + + read_lock(&trig_data->lock); + mode = trig_data->mode; + read_unlock(&trig_data->lock); + + if (mode == 0) { + strcpy(buf, "none\n"); + } else { + if (mode & SWCONFIG_LED_MODE_LINK) + strcat(buf, "link "); + if (mode & SWCONFIG_LED_MODE_TX) + strcat(buf, "tx "); + if (mode & SWCONFIG_LED_MODE_RX) + strcat(buf, "rx "); + strcat(buf, "\n"); + } + + return strlen(buf)+1; +} + +static ssize_t swconfig_trig_mode_store(struct device *dev, + struct device_attribute *attr, const char *buf, size_t size) +{ + struct led_classdev *led_cdev = dev_get_drvdata(dev); + struct swconfig_trig_data *trig_data = led_cdev->trigger_data; + char copybuf[128]; + int new_mode = -1; + char *p, *token; + + /* take a copy since we don't want to trash the inbound buffer when using strsep */ + strncpy(copybuf, buf, sizeof(copybuf)); + copybuf[sizeof(copybuf) - 1] = 0; + p = copybuf; + + while ((token = strsep(&p, " \t\n")) != NULL) { + if (!*token) + continue; + + if (new_mode < 0) + new_mode = 0; + + if (!strcmp(token, "none")) + new_mode = 0; + else if (!strcmp(token, "tx")) + new_mode |= SWCONFIG_LED_MODE_TX; + else if (!strcmp(token, "rx")) + new_mode |= SWCONFIG_LED_MODE_RX; + else if (!strcmp(token, "link")) + new_mode |= SWCONFIG_LED_MODE_LINK; + else + return -EINVAL; + } + + if (new_mode < 0) + return -EINVAL; + + write_lock(&trig_data->lock); + trig_data->mode = (u8)new_mode; + write_unlock(&trig_data->lock); + + return size; +} + +/* mode special file */ +static DEVICE_ATTR(mode, 0644, swconfig_trig_mode_show, + swconfig_trig_mode_store); + static void swconfig_trig_activate(struct led_classdev *led_cdev) { @@ -206,6 +294,7 @@ swconfig_trig_activate(struct led_classdev *led_cdev) trig_data->led_cdev = led_cdev; trig_data->swdev = sw_trig->swdev; trig_data->speed_mask = SWCONFIG_LED_PORT_SPEED_ALL; + trig_data->mode = SWCONFIG_LED_MODE_ALL; led_cdev->trigger_data = trig_data; err = device_create_file(led_cdev->dev, &dev_attr_port_mask); @@ -216,8 +305,15 @@ swconfig_trig_activate(struct led_classdev *led_cdev) if (err) goto err_dev_free; + err = device_create_file(led_cdev->dev, &dev_attr_mode); + if (err) + goto err_mode_free; + return; +err_mode_free: + device_remove_file(led_cdev->dev, &dev_attr_speed_mask); + err_dev_free: device_remove_file(led_cdev->dev, &dev_attr_port_mask); @@ -237,10 +333,17 @@ swconfig_trig_deactivate(struct led_classdev *led_cdev) if (trig_data) { device_remove_file(led_cdev->dev, &dev_attr_port_mask); device_remove_file(led_cdev->dev, &dev_attr_speed_mask); + device_remove_file(led_cdev->dev, &dev_attr_mode); kfree(trig_data); } } +/* + * link off -> led off (can't be any other reason to turn it on) + * link on: + * mode link: led on by default only if speed matches, else off + * mode txrx: blink only if speed matches, else off + */ static void swconfig_trig_led_event(struct switch_led_trigger *sw_trig, struct led_classdev *led_cdev) @@ -248,7 +351,8 @@ swconfig_trig_led_event(struct switch_led_trigger *sw_trig, struct swconfig_trig_data *trig_data; u32 port_mask; bool link; - u8 speed_mask; + u8 speed_mask, mode; + enum led_brightness led_base, led_blink; trig_data = led_cdev->trigger_data; if (!trig_data) @@ -257,35 +361,48 @@ swconfig_trig_led_event(struct switch_led_trigger *sw_trig, read_lock(&trig_data->lock); port_mask = trig_data->port_mask; speed_mask = trig_data->speed_mask; + mode = trig_data->mode; read_unlock(&trig_data->lock); link = !!(sw_trig->port_link & port_mask); if (!link) { - if (link != trig_data->prev_link) - swconfig_trig_set_brightness(trig_data, LED_OFF); - } else { + if (trig_data->prev_brightness != LED_OFF) + swconfig_trig_set_brightness(trig_data, LED_OFF); /* and stop */ + } + else { unsigned long traffic; int speedok; /* link speed flag */ int i; + led_base = LED_FULL; + led_blink = LED_OFF; traffic = 0; speedok = 0; for (i = 0; i < SWCONFIG_LED_NUM_PORTS; i++) { - if (port_mask & (1 << i)) + if (port_mask & (1 << i)) { if (sw_trig->link_speed[i] & speed_mask) { - traffic += sw_trig->port_traffic[i]; + traffic += ((mode & SWCONFIG_LED_MODE_TX) ? + sw_trig->port_tx_traffic[i] : 0) + + ((mode & SWCONFIG_LED_MODE_RX) ? + sw_trig->port_rx_traffic[i] : 0); speedok = 1; } + } } if (speedok) { /* At least one port speed matches speed_mask */ - if (trig_data->prev_brightness != LED_FULL) + if (!(mode & SWCONFIG_LED_MODE_LINK)) { + led_base = LED_OFF; + led_blink = LED_FULL; + } + + if (trig_data->prev_brightness != led_base) swconfig_trig_set_brightness(trig_data, - LED_FULL); + led_base); else if (traffic != trig_data->prev_traffic) swconfig_trig_set_brightness(trig_data, - LED_OFF); + led_blink); } else if (trig_data->prev_brightness != LED_OFF) swconfig_trig_set_brightness(trig_data, LED_OFF); @@ -371,8 +488,8 @@ swconfig_led_work_func(struct work_struct *work) memset(&port_stats, '\0', sizeof(port_stats)); swdev->ops->get_port_stats(swdev, i, &port_stats); - sw_trig->port_traffic[i] = port_stats.tx_bytes + - port_stats.rx_bytes; + sw_trig->port_tx_traffic[i] = port_stats.tx_bytes; + sw_trig->port_rx_traffic[i] = port_stats.rx_bytes; } } diff --git a/target/linux/generic/hack-4.14/250-netfilter_depends.patch b/target/linux/generic/hack-4.14/250-netfilter_depends.patch index 6f6e1be5e..264d7661c 100644 --- a/target/linux/generic/hack-4.14/250-netfilter_depends.patch +++ b/target/linux/generic/hack-4.14/250-netfilter_depends.patch @@ -17,7 +17,7 @@ Signed-off-by: Felix Fietkau depends on NETFILTER_ADVANCED help H.323 is a VoIP signalling protocol from ITU-T. As one of the most -@@ -1037,7 +1036,6 @@ config NETFILTER_XT_TARGET_SECMARK +@@ -1046,7 +1045,6 @@ config NETFILTER_XT_TARGET_SECMARK config NETFILTER_XT_TARGET_TCPMSS tristate '"TCPMSS" target support' diff --git a/target/linux/generic/hack-4.14/721-phy_packets.patch b/target/linux/generic/hack-4.14/721-phy_packets.patch index 62d029517..86ff0fe12 100644 --- a/target/linux/generic/hack-4.14/721-phy_packets.patch +++ b/target/linux/generic/hack-4.14/721-phy_packets.patch @@ -15,7 +15,7 @@ Signed-off-by: Felix Fietkau --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h -@@ -1386,6 +1386,7 @@ enum netdev_priv_flags { +@@ -1410,6 +1410,7 @@ enum netdev_priv_flags { IFF_RXFH_CONFIGURED = 1<<25, IFF_PHONY_HEADROOM = 1<<26, IFF_MACSEC = 1<<27, @@ -23,7 +23,7 @@ Signed-off-by: Felix Fietkau }; #define IFF_802_1Q_VLAN IFF_802_1Q_VLAN -@@ -1415,6 +1416,7 @@ enum netdev_priv_flags { +@@ -1439,6 +1440,7 @@ enum netdev_priv_flags { #define IFF_TEAM IFF_TEAM #define IFF_RXFH_CONFIGURED IFF_RXFH_CONFIGURED #define IFF_MACSEC IFF_MACSEC @@ -31,7 +31,7 @@ Signed-off-by: Felix Fietkau /** * struct net_device - The DEVICE structure. -@@ -1701,6 +1703,11 @@ struct net_device { +@@ -1725,6 +1727,11 @@ struct net_device { const struct xfrmdev_ops *xfrmdev_ops; #endif @@ -43,7 +43,7 @@ Signed-off-by: Felix Fietkau const struct header_ops *header_ops; unsigned int flags; -@@ -1770,6 +1777,10 @@ struct net_device { +@@ -1794,6 +1801,10 @@ struct net_device { struct mpls_dev __rcu *mpls_ptr; #endif diff --git a/target/linux/generic/hack-4.9/202-reduce_module_size.patch b/target/linux/generic/hack-4.9/202-reduce_module_size.patch index 6e5fc9cd4..f744b945f 100644 --- a/target/linux/generic/hack-4.9/202-reduce_module_size.patch +++ b/target/linux/generic/hack-4.9/202-reduce_module_size.patch @@ -13,7 +13,7 @@ Signed-off-by: Felix Fietkau --- a/Makefile +++ b/Makefile -@@ -401,7 +401,7 @@ KBUILD_AFLAGS_KERNEL := +@@ -403,7 +403,7 @@ KBUILD_AFLAGS_KERNEL := KBUILD_CFLAGS_KERNEL := KBUILD_AFLAGS_MODULE := -DMODULE KBUILD_CFLAGS_MODULE := -DMODULE diff --git a/target/linux/generic/hack-4.9/204-module_strip.patch b/target/linux/generic/hack-4.9/204-module_strip.patch index e36846adb..3dc0c88db 100644 --- a/target/linux/generic/hack-4.9/204-module_strip.patch +++ b/target/linux/generic/hack-4.9/204-module_strip.patch @@ -98,7 +98,7 @@ Signed-off-by: Felix Fietkau --- a/init/Kconfig +++ b/init/Kconfig -@@ -2115,6 +2115,13 @@ config TRIM_UNUSED_KSYMS +@@ -2122,6 +2122,13 @@ config TRIM_UNUSED_KSYMS If unsure, or if you need to build out-of-tree modules, say N. @@ -114,7 +114,7 @@ Signed-off-by: Felix Fietkau config MODULES_TREE_LOOKUP --- a/kernel/module.c +++ b/kernel/module.c -@@ -2945,9 +2945,11 @@ static struct module *setup_load_info(st +@@ -2954,9 +2954,11 @@ static struct module *setup_load_info(st static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -127,14 +127,14 @@ Signed-off-by: Felix Fietkau if (flags & MODULE_INIT_IGNORE_VERMAGIC) modmagic = NULL; -@@ -2968,6 +2970,7 @@ static int check_modinfo(struct module * +@@ -2977,6 +2979,7 @@ static int check_modinfo(struct module * mod->name); add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK); } +#endif - if (get_modinfo(info, "staging")) { - add_taint_module(mod, TAINT_CRAP, LOCKDEP_STILL_OK); + check_modinfo_retpoline(mod, info); + --- a/scripts/mod/modpost.c +++ b/scripts/mod/modpost.c @@ -1965,7 +1965,9 @@ static void read_symbols(char *modname) @@ -157,7 +157,7 @@ Signed-off-by: Felix Fietkau buf_printf(b, "\n"); buf_printf(b, "__visible struct module __this_module\n"); buf_printf(b, "__attribute__((section(\".gnu.linkonce.this_module\"))) = {\n"); -@@ -2126,16 +2130,20 @@ static void add_header(struct buffer *b, +@@ -2126,24 +2130,30 @@ static void add_header(struct buffer *b, static void add_intree_flag(struct buffer *b, int is_intree) { @@ -167,6 +167,16 @@ Signed-off-by: Felix Fietkau +#endif } + /* Cannot check for assembler */ + static void add_retpoline(struct buffer *b) + { ++#ifndef CONFIG_MODULE_STRIPPED + buf_printf(b, "\n#ifdef RETPOLINE\n"); + buf_printf(b, "MODULE_INFO(retpoline, \"Y\");\n"); + buf_printf(b, "#endif\n"); ++#endif + } + static void add_staging_flag(struct buffer *b, const char *name) { +#ifndef CONFIG_MODULE_STRIPPED @@ -178,7 +188,7 @@ Signed-off-by: Felix Fietkau } /* In kernel, this size is defined in linux/module.h; -@@ -2239,11 +2247,13 @@ static void add_depends(struct buffer *b +@@ -2247,11 +2257,13 @@ static void add_depends(struct buffer *b static void add_srcversion(struct buffer *b, struct module *mod) { @@ -192,7 +202,7 @@ Signed-off-by: Felix Fietkau } static void write_if_changed(struct buffer *b, const char *fname) -@@ -2477,7 +2487,9 @@ int main(int argc, char **argv) +@@ -2486,7 +2498,9 @@ int main(int argc, char **argv) add_staging_flag(&buf, mod->name); err |= add_versions(&buf, mod); add_depends(&buf, mod, modules); diff --git a/target/linux/generic/hack-4.9/207-disable-modorder.patch b/target/linux/generic/hack-4.9/207-disable-modorder.patch index d52ca36c1..f9b3ac4dc 100644 --- a/target/linux/generic/hack-4.9/207-disable-modorder.patch +++ b/target/linux/generic/hack-4.9/207-disable-modorder.patch @@ -15,7 +15,7 @@ Signed-off-by: Felix Fietkau --- a/Makefile +++ b/Makefile -@@ -1200,7 +1200,6 @@ all: modules +@@ -1211,7 +1211,6 @@ all: modules PHONY += modules modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) modules.builtin @@ -23,7 +23,7 @@ Signed-off-by: Felix Fietkau @$(kecho) ' Building modules, stage 2.'; $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild -@@ -1230,7 +1229,6 @@ _modinst_: +@@ -1241,7 +1240,6 @@ _modinst_: rm -f $(MODLIB)/build ; \ ln -s $(CURDIR) $(MODLIB)/build ; \ fi diff --git a/target/linux/generic/hack-4.9/220-gc_sections.patch b/target/linux/generic/hack-4.9/220-gc_sections.patch index e39f0f5f4..02e36b664 100644 --- a/target/linux/generic/hack-4.9/220-gc_sections.patch +++ b/target/linux/generic/hack-4.9/220-gc_sections.patch @@ -21,7 +21,7 @@ Signed-off-by: Gabor Juhos --- a/Makefile +++ b/Makefile -@@ -404,6 +404,11 @@ KBUILD_CFLAGS_MODULE := -DMODULE +@@ -406,6 +406,11 @@ KBUILD_CFLAGS_MODULE := -DMODULE KBUILD_LDFLAGS_MODULE = -T $(srctree)/scripts/module-common.lds $(if $(CONFIG_PROFILING),,-s) GCC_PLUGINS_CFLAGS := @@ -33,7 +33,7 @@ Signed-off-by: Gabor Juhos # Read KERNELRELEASE from include/config/kernel.release (if it exists) KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null) KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) -@@ -634,11 +639,6 @@ KBUILD_CFLAGS += $(call cc-disable-warni +@@ -636,11 +641,6 @@ KBUILD_CFLAGS += $(call cc-disable-warni KBUILD_CFLAGS += $(call cc-disable-warning, format-overflow) KBUILD_CFLAGS += $(call cc-disable-warning, int-in-bool-context) diff --git a/target/linux/generic/hack-4.9/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch b/target/linux/generic/hack-4.9/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch new file mode 100644 index 000000000..690b30ee9 --- /dev/null +++ b/target/linux/generic/hack-4.9/300-MIPS-r4k_cache-use-more-efficient-cache-blast.patch @@ -0,0 +1,66 @@ +From: Ben Menchaca +Date: Fri, 7 Jun 2013 18:35:22 -0500 +Subject: MIPS: r4k_cache: use more efficient cache blast + +Optimize the compiler output for larger cache blast cases that are +common for DMA-based networking. + +Signed-off-by: Ben Menchaca +Signed-off-by: Felix Fietkau +--- +--- a/arch/mips/include/asm/r4kcache.h ++++ b/arch/mips/include/asm/r4kcache.h +@@ -665,16 +665,48 @@ static inline void prot##extra##blast_## + unsigned long end) \ + { \ + unsigned long lsize = cpu_##desc##_line_size(); \ ++ unsigned long lsize_2 = lsize * 2; \ ++ unsigned long lsize_3 = lsize * 3; \ ++ unsigned long lsize_4 = lsize * 4; \ ++ unsigned long lsize_5 = lsize * 5; \ ++ unsigned long lsize_6 = lsize * 6; \ ++ unsigned long lsize_7 = lsize * 7; \ ++ unsigned long lsize_8 = lsize * 8; \ + unsigned long addr = start & ~(lsize - 1); \ +- unsigned long aend = (end - 1) & ~(lsize - 1); \ ++ unsigned long aend = (end + lsize - 1) & ~(lsize - 1); \ ++ int lines = (aend - addr) / lsize; \ + \ + __##pfx##flush_prologue \ + \ +- while (1) { \ ++ while (lines >= 8) { \ ++ prot##cache_op(hitop, addr); \ ++ prot##cache_op(hitop, addr + lsize); \ ++ prot##cache_op(hitop, addr + lsize_2); \ ++ prot##cache_op(hitop, addr + lsize_3); \ ++ prot##cache_op(hitop, addr + lsize_4); \ ++ prot##cache_op(hitop, addr + lsize_5); \ ++ prot##cache_op(hitop, addr + lsize_6); \ ++ prot##cache_op(hitop, addr + lsize_7); \ ++ addr += lsize_8; \ ++ lines -= 8; \ ++ } \ ++ \ ++ if (lines & 0x4) { \ ++ prot##cache_op(hitop, addr); \ ++ prot##cache_op(hitop, addr + lsize); \ ++ prot##cache_op(hitop, addr + lsize_2); \ ++ prot##cache_op(hitop, addr + lsize_3); \ ++ addr += lsize_4; \ ++ } \ ++ \ ++ if (lines & 0x2) { \ ++ prot##cache_op(hitop, addr); \ ++ prot##cache_op(hitop, addr + lsize); \ ++ addr += lsize_2; \ ++ } \ ++ \ ++ if (lines & 0x1) { \ + prot##cache_op(hitop, addr); \ +- if (addr == aend) \ +- break; \ +- addr += lsize; \ + } \ + \ + __##pfx##flush_epilogue \ diff --git a/target/linux/generic/hack-4.9/641-bridge_port_isolate.patch b/target/linux/generic/hack-4.9/641-bridge_port_isolate.patch index 56259329d..0d0b2c73f 100644 --- a/target/linux/generic/hack-4.9/641-bridge_port_isolate.patch +++ b/target/linux/generic/hack-4.9/641-bridge_port_isolate.patch @@ -29,7 +29,7 @@ Signed-off-by: Felix Fietkau void br_forward(const struct net_bridge_port *to, struct sk_buff *skb, bool local_rcv, bool local_orig) { -+ if (to->flags & BR_ISOLATE_MODE) ++ if (to->flags & BR_ISOLATE_MODE && !local_orig) + to = NULL; + if (to && should_deliver(to, skb)) { diff --git a/target/linux/generic/hack-4.9/660-fq_codel_defaults.patch b/target/linux/generic/hack-4.9/660-fq_codel_defaults.patch index 3e6473056..ea461e189 100644 --- a/target/linux/generic/hack-4.9/660-fq_codel_defaults.patch +++ b/target/linux/generic/hack-4.9/660-fq_codel_defaults.patch @@ -13,7 +13,7 @@ Signed-off-by: Felix Fietkau --- a/net/sched/sch_fq_codel.c +++ b/net/sched/sch_fq_codel.c -@@ -479,7 +479,11 @@ static int fq_codel_init(struct Qdisc *s +@@ -485,7 +485,11 @@ static int fq_codel_init(struct Qdisc *s sch->limit = 10*1024; q->flows_cnt = 1024; diff --git a/target/linux/generic/hack-4.9/661-use_fq_codel_by_default.patch b/target/linux/generic/hack-4.9/661-use_fq_codel_by_default.patch index 7a249e37f..981170cbb 100644 --- a/target/linux/generic/hack-4.9/661-use_fq_codel_by_default.patch +++ b/target/linux/generic/hack-4.9/661-use_fq_codel_by_default.patch @@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau register_qdisc(&pfifo_head_drop_qdisc_ops); --- a/net/sched/sch_fq_codel.c +++ b/net/sched/sch_fq_codel.c -@@ -709,7 +709,7 @@ static const struct Qdisc_class_ops fq_c +@@ -715,7 +715,7 @@ static const struct Qdisc_class_ops fq_c .walk = fq_codel_walk, }; @@ -64,7 +64,7 @@ Signed-off-by: Felix Fietkau .cl_ops = &fq_codel_class_ops, .id = "fq_codel", .priv_size = sizeof(struct fq_codel_sched_data), -@@ -724,6 +724,7 @@ static struct Qdisc_ops fq_codel_qdisc_o +@@ -730,6 +730,7 @@ static struct Qdisc_ops fq_codel_qdisc_o .dump_stats = fq_codel_dump_stats, .owner = THIS_MODULE, }; diff --git a/target/linux/generic/hack-4.9/721-phy_packets.patch b/target/linux/generic/hack-4.9/721-phy_packets.patch index b312ac7d4..fbf3c70ca 100644 --- a/target/linux/generic/hack-4.9/721-phy_packets.patch +++ b/target/linux/generic/hack-4.9/721-phy_packets.patch @@ -101,7 +101,7 @@ Signed-off-by: Felix Fietkau help --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -2943,10 +2943,20 @@ static int xmit_one(struct sk_buff *skb, +@@ -2950,10 +2950,20 @@ static int xmit_one(struct sk_buff *skb, if (!list_empty(&ptype_all) || !list_empty(&dev->ptype_all)) dev_queue_xmit_nit(skb, dev); diff --git a/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch b/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch index e6ad0a51d..88e60e587 100644 --- a/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch +++ b/target/linux/generic/hack-4.9/773-bgmac-add-srab-switch.patch @@ -14,7 +14,7 @@ Signed-off-by: Hauke Mehrtens --- a/drivers/net/ethernet/broadcom/bgmac-bcma.c +++ b/drivers/net/ethernet/broadcom/bgmac-bcma.c -@@ -236,6 +236,7 @@ static int bgmac_probe(struct bcma_devic +@@ -243,6 +243,7 @@ static int bgmac_probe(struct bcma_devic bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST; bgmac->feature_flags |= BGMAC_FEAT_NO_RESET; bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500; diff --git a/target/linux/generic/hack-4.9/902-debloat_proc.patch b/target/linux/generic/hack-4.9/902-debloat_proc.patch index 6216c2d4f..01c67c229 100644 --- a/target/linux/generic/hack-4.9/902-debloat_proc.patch +++ b/target/linux/generic/hack-4.9/902-debloat_proc.patch @@ -132,7 +132,7 @@ Signed-off-by: Felix Fietkau do { \ --- a/ipc/msg.c +++ b/ipc/msg.c -@@ -1058,6 +1058,9 @@ void __init msg_init(void) +@@ -1061,6 +1061,9 @@ void __init msg_init(void) { msg_init_ns(&init_ipc_ns); @@ -221,7 +221,7 @@ Signed-off-by: Felix Fietkau if (!root_irq_dir) --- a/kernel/time/timer_list.c +++ b/kernel/time/timer_list.c -@@ -393,6 +393,8 @@ static int __init init_timer_list_procfs +@@ -399,6 +399,8 @@ static int __init init_timer_list_procfs { struct proc_dir_entry *pe; @@ -243,7 +243,7 @@ Signed-off-by: Felix Fietkau } --- a/mm/vmstat.c +++ b/mm/vmstat.c -@@ -1792,10 +1792,12 @@ static int __init setup_vmstat(void) +@@ -1798,10 +1798,12 @@ static int __init setup_vmstat(void) cpu_notifier_register_done(); #endif #ifdef CONFIG_PROC_FS @@ -393,7 +393,7 @@ Signed-off-by: Felix Fietkau --- a/net/ipv4/route.c +++ b/net/ipv4/route.c -@@ -420,6 +420,9 @@ static struct pernet_operations ip_rt_pr +@@ -423,6 +423,9 @@ static struct pernet_operations ip_rt_pr static int __init ip_rt_proc_init(void) { diff --git a/target/linux/generic/hack-4.9/904-debloat_dma_buf.patch b/target/linux/generic/hack-4.9/904-debloat_dma_buf.patch index 81db6dcb3..da69b7e78 100644 --- a/target/linux/generic/hack-4.9/904-debloat_dma_buf.patch +++ b/target/linux/generic/hack-4.9/904-debloat_dma_buf.patch @@ -54,7 +54,7 @@ Signed-off-by: Felix Fietkau +MODULE_LICENSE("GPL"); --- a/kernel/sched/core.c +++ b/kernel/sched/core.c -@@ -2170,6 +2170,7 @@ int wake_up_state(struct task_struct *p, +@@ -2171,6 +2171,7 @@ int wake_up_state(struct task_struct *p, { return try_to_wake_up(p, state, 0); } diff --git a/target/linux/generic/pending-3.18/002-phy_drivers_backport.patch b/target/linux/generic/pending-3.18/002-phy_drivers_backport.patch index 63071c999..504d772de 100644 --- a/target/linux/generic/pending-3.18/002-phy_drivers_backport.patch +++ b/target/linux/generic/pending-3.18/002-phy_drivers_backport.patch @@ -464,7 +464,7 @@ module_init(psb6970_init); --- a/drivers/net/phy/rtl8306.c +++ b/drivers/net/phy/rtl8306.c -@@ -876,7 +876,7 @@ rtl8306_config_init(struct phy_device *p +@@ -877,7 +877,7 @@ rtl8306_config_init(struct phy_device *p int err; /* Only init the switch for the primary PHY */ @@ -473,7 +473,7 @@ return 0; val.value.i = 1; -@@ -886,7 +886,7 @@ rtl8306_config_init(struct phy_device *p +@@ -887,7 +887,7 @@ rtl8306_config_init(struct phy_device *p priv->dev.ops = &rtl8306_ops; priv->do_cpu = 0; priv->page = -1; @@ -482,7 +482,7 @@ chipid = rtl_get(dev, RTL_REG_CHIPID); chipver = rtl_get(dev, RTL_REG_CHIPVER); -@@ -932,13 +932,13 @@ rtl8306_fixup(struct phy_device *pdev) +@@ -933,13 +933,13 @@ rtl8306_fixup(struct phy_device *pdev) u16 chipid; /* Attach to primary LAN port and WAN port */ @@ -498,7 +498,7 @@ chipid = rtl_get(&priv.dev, RTL_REG_CHIPID); if (chipid == 0x5988) pdev->phy_id = RTL8306_MAGIC; -@@ -956,14 +956,14 @@ rtl8306_probe(struct phy_device *pdev) +@@ -957,14 +957,14 @@ rtl8306_probe(struct phy_device *pdev) * share one rtl_priv instance between virtual phy * devices on the same bus */ @@ -515,7 +515,7 @@ found: pdev->priv = priv; -@@ -984,7 +984,7 @@ rtl8306_config_aneg(struct phy_device *p +@@ -985,7 +985,7 @@ rtl8306_config_aneg(struct phy_device *p struct rtl_priv *priv = pdev->priv; /* Only for WAN */ @@ -524,7 +524,7 @@ return 0; /* Restart autonegotiation */ -@@ -1000,7 +1000,7 @@ rtl8306_read_status(struct phy_device *p +@@ -1001,7 +1001,7 @@ rtl8306_read_status(struct phy_device *p struct rtl_priv *priv = pdev->priv; struct switch_dev *dev = &priv->dev; @@ -533,7 +533,7 @@ /* WAN */ pdev->speed = rtl_get(dev, RTL_PORT_REG(4, SPEED)) ? SPEED_100 : SPEED_10; pdev->duplex = rtl_get(dev, RTL_PORT_REG(4, DUPLEX)) ? DUPLEX_FULL : DUPLEX_HALF; -@@ -1041,6 +1041,7 @@ static struct phy_driver rtl8306_driver +@@ -1044,6 +1044,7 @@ static struct phy_driver rtl8306_driver .config_init = &rtl8306_config_init, .config_aneg = &rtl8306_config_aneg, .read_status = &rtl8306_read_status, @@ -541,7 +541,7 @@ }; -@@ -1048,7 +1049,7 @@ static int __init +@@ -1051,7 +1052,7 @@ static int __init rtl_init(void) { phy_register_fixup_for_id(PHY_ANY_ID, rtl8306_fixup); diff --git a/target/linux/generic/pending-3.18/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch b/target/linux/generic/pending-3.18/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch deleted file mode 100644 index 762f4989b..000000000 --- a/target/linux/generic/pending-3.18/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 8b05e325824d3b38e52a7748b3b5dc34dc1c0f6d Mon Sep 17 00:00:00 2001 -From: David Heidelberger -Date: Mon, 29 Jun 2015 14:37:54 +0200 -Subject: [PATCH 1/3] uapi/kernel.h: glibc specific inclusion of sysinfo.h - -including sysinfo.h from kernel.h makes no sense whatsoever, -but removing it breaks glibc's userspace header, -which includes kernel.h instead of sysinfo.h from their sys/sysinfo.h. -this seems to be a historical mistake. -on musl, including any header that uses kernel.h directly or indirectly -plus sys/sysinfo.h will produce a compile error due to redefinition of -struct sysinfo from sys/sysinfo.h. -so for now, only include it on glibc or when including from kernel -in order not to break their headers. - -Signed-off-by: John Spencer -Signed-off-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/kernel.h | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/include/uapi/linux/kernel.h -+++ b/include/uapi/linux/kernel.h -@@ -1,7 +1,9 @@ - #ifndef _UAPI_LINUX_KERNEL_H - #define _UAPI_LINUX_KERNEL_H - -+#if defined(__KERNEL__) || defined( __GLIBC__) - #include -+#endif - - /* - * 'kernel.h' contains some often-used function prototypes etc diff --git a/target/linux/generic/pending-3.18/270-uapi-libc-compat-add-fallback-for-unsupported-libcs.patch b/target/linux/generic/pending-3.18/270-uapi-libc-compat-add-fallback-for-unsupported-libcs.patch new file mode 100644 index 000000000..67895995b --- /dev/null +++ b/target/linux/generic/pending-3.18/270-uapi-libc-compat-add-fallback-for-unsupported-libcs.patch @@ -0,0 +1,102 @@ +From c6bdd0d302119819de72439972d0462c26ef9eda Mon Sep 17 00:00:00 2001 +From: Felix Janda +Date: Sun, 12 Nov 2017 13:30:17 -0500 +Subject: uapi libc compat: add fallback for unsupported libcs + +libc-compat.h aims to prevent symbol collisions between uapi and libc +headers for each supported libc. This requires continuous coordination +between them. + +The goal of this commit is to improve the situation for libcs (such as +musl) which are not yet supported and/or do not wish to be explicitly +supported, while not affecting supported libcs. More precisely, with +this commit, unsupported libcs can request the suppression of any +specific uapi definition by defining the correspondings _UAPI_DEF_* +macro as 0. This can fix symbol collisions for them, as long as the +libc headers are included before the uapi headers. Inclusion in the +other order is outside the scope of this commit. + +All infrastructure in order to enable this fallback for unsupported +libcs is already in place, except that libc-compat.h unconditionally +defines all _UAPI_DEF_* macros to 1 for all unsupported libcs so that +any previous definitions are ignored. In order to fix this, this commit +merely makes these definitions conditional. + +This commit together with the musl libc commit + +http://git.musl-libc.org/cgit/musl/commit/?id=04983f2272382af92eb8f8838964ff944fbb8258 + +fixes for example the following compiler errors when is +included after musl's : + +./linux/in6.h:32:8: error: redefinition of 'struct in6_addr' +./linux/in6.h:49:8: error: redefinition of 'struct sockaddr_in6' +./linux/in6.h:59:8: error: redefinition of 'struct ipv6_mreq' + +The comments referencing glibc are still correct, but this file is not +only used for glibc any more. + +Signed-off-by: Felix Janda +Reviewed-by: Hauke Mehrtens +--- + include/uapi/linux/libc-compat.h | 55 +++++++++++++++++++++++++++++++++++++++- + 1 file changed, 54 insertions(+), 1 deletion(-) + +--- a/include/uapi/linux/libc-compat.h ++++ b/include/uapi/linux/libc-compat.h +@@ -110,27 +110,54 @@ + + /* If we did not see any headers from any supported C libraries, + * or we are being included in the kernel, then define everything +- * that we need. */ ++ * that we need. Check for previous __UAPI_* definitions to give ++ * unsupported C libraries a way to opt out of any kernel definition. */ + #else /* !defined(__GLIBC__) */ + + /* Definitions for in.h */ ++#ifndef __UAPI_DEF_IN_ADDR + #define __UAPI_DEF_IN_ADDR 1 ++#endif ++#ifndef __UAPI_DEF_IN_IPPROTO + #define __UAPI_DEF_IN_IPPROTO 1 ++#endif ++#ifndef __UAPI_DEF_IN_PKTINFO + #define __UAPI_DEF_IN_PKTINFO 1 ++#endif ++#ifndef __UAPI_DEF_IP_MREQ + #define __UAPI_DEF_IP_MREQ 1 ++#endif ++#ifndef __UAPI_DEF_SOCKADDR_IN + #define __UAPI_DEF_SOCKADDR_IN 1 ++#endif ++#ifndef __UAPI_DEF_IN_CLASS + #define __UAPI_DEF_IN_CLASS 1 ++#endif + + /* Definitions for in6.h */ ++#ifndef __UAPI_DEF_IN6_ADDR + #define __UAPI_DEF_IN6_ADDR 1 ++#endif ++#ifndef __UAPI_DEF_IN6_ADDR_ALT + #define __UAPI_DEF_IN6_ADDR_ALT 1 ++#endif ++#ifndef __UAPI_DEF_SOCKADDR_IN6 + #define __UAPI_DEF_SOCKADDR_IN6 1 ++#endif ++#ifndef __UAPI_DEF_IPV6_MREQ + #define __UAPI_DEF_IPV6_MREQ 1 ++#endif ++#ifndef __UAPI_DEF_IPPROTO_V6 + #define __UAPI_DEF_IPPROTO_V6 1 ++#endif ++#ifndef __UAPI_DEF_IPV6_OPTIONS + #define __UAPI_DEF_IPV6_OPTIONS 1 ++#endif + + /* Definitions for xattr.h */ ++#ifndef __UAPI_DEF_XATTR + #define __UAPI_DEF_XATTR 1 ++#endif + + #endif /* __GLIBC__ */ + diff --git a/target/linux/generic/pending-3.18/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch b/target/linux/generic/pending-3.18/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch deleted file mode 100644 index 891299ead..000000000 --- a/target/linux/generic/pending-3.18/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch +++ /dev/null @@ -1,81 +0,0 @@ -From f972afc2509eebcb00d370256c55b112a3b5ffca Mon Sep 17 00:00:00 2001 -From: David Heidelberger -Date: Mon, 29 Jun 2015 16:50:40 +0200 -Subject: [PATCH 2/3] uapi/libc-compat.h: do not rely on __GLIBC__ - -Musl provides the same structs as glibc, but does not provide a define to -allow its detection. Since the absence of __GLIBC__ also can mean that it -is included from the kernel, change the __GLIBC__ detection to -!__KERNEL__, which should always be true when included from userspace. - -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/libc-compat.h | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - ---- a/include/uapi/linux/libc-compat.h -+++ b/include/uapi/linux/libc-compat.h -@@ -48,13 +48,13 @@ - #ifndef _UAPI_LIBC_COMPAT_H - #define _UAPI_LIBC_COMPAT_H - --/* We have included glibc headers... */ --#if defined(__GLIBC__) -+/* We have included libc headers... */ -+#if !defined(__KERNEL__) - --/* Coordinate with glibc netinet/in.h header. */ -+/* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - --/* GLIBC headers included first so don't define anything -+/* LIBC headers included first so don't define anything - * that would already be defined. */ - #define __UAPI_DEF_IN_ADDR 0 - #define __UAPI_DEF_IN_IPPROTO 0 -@@ -68,7 +68,7 @@ - * if the glibc code didn't define them. This guard matches - * the guard in glibc/inet/netinet/in.h which defines the - * additional in6_addr macros e.g. s6_addr16, and s6_addr32. */ --#if defined(__USE_MISC) || defined (__USE_GNU) -+#if !defined(__GLIBC__) || defined(__USE_MISC) || defined (__USE_GNU) - #define __UAPI_DEF_IN6_ADDR_ALT 0 - #else - #define __UAPI_DEF_IN6_ADDR_ALT 1 -@@ -81,7 +81,7 @@ - #else - - /* Linux headers included first, and we must define everything -- * we need. The expectation is that glibc will check the -+ * we need. The expectation is that the libc will check the - * __UAPI_DEF_* defines and adjust appropriately. */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 -@@ -91,7 +91,7 @@ - #define __UAPI_DEF_IN_CLASS 1 - - #define __UAPI_DEF_IN6_ADDR 1 --/* We unconditionally define the in6_addr macros and glibc must -+/* We unconditionally define the in6_addr macros and the libc must - * coordinate. */ - #define __UAPI_DEF_IN6_ADDR_ALT 1 - #define __UAPI_DEF_SOCKADDR_IN6 1 -@@ -111,7 +111,7 @@ - /* If we did not see any headers from any supported C libraries, - * or we are being included in the kernel, then define everything - * that we need. */ --#else /* !defined(__GLIBC__) */ -+#else /* defined(__KERNEL__) */ - - /* Definitions for in.h */ - #define __UAPI_DEF_IN_ADDR 1 -@@ -132,6 +132,6 @@ - /* Definitions for xattr.h */ - #define __UAPI_DEF_XATTR 1 - --#endif /* __GLIBC__ */ -+#endif /* __KERNEL__ */ - - #endif /* _UAPI_LIBC_COMPAT_H */ diff --git a/target/linux/generic/pending-3.18/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch b/target/linux/generic/pending-3.18/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch index feea4c31c..10d698f96 100644 --- a/target/linux/generic/pending-3.18/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch +++ b/target/linux/generic/pending-3.18/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch @@ -1,18 +1,20 @@ -From fcbb6fed85ea9ff4feb4f1ebd4f0f235fdaf06b6 Mon Sep 17 00:00:00 2001 -From: David Heidelberger +From 649affd04813c43e0a72886517fcfccd63230981 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens Date: Mon, 29 Jun 2015 16:53:03 +0200 -Subject: [PATCH 3/3] uapi/if_ether.h: prevent redefinition of struct ethhdr +Subject: uapi/if_ether.h: prevent redefinition of struct ethhdr Musl provides its own ethhdr struct definition. Add a guard to prevent its definition of the appropriate musl header has already been included. -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski +glibc does not implement this header, but when glibc will implement this +they can just define __UAPI_DEF_ETHHDR 0 to make it work with the +kernel. + +Signed-off-by: Hauke Mehrtens --- - include/uapi/linux/if_ether.h | 3 +++ - include/uapi/linux/libc-compat.h | 11 +++++++++++ - 2 files changed, 14 insertions(+) + include/uapi/linux/if_ether.h | 3 +++ + include/uapi/linux/libc-compat.h | 6 ++++++ + 2 files changed, 9 insertions(+) --- a/include/uapi/linux/if_ether.h +++ b/include/uapi/linux/if_ether.h @@ -40,28 +42,14 @@ Signed-off-by: Jonas Gorski #endif /* _UAPI_LINUX_IF_ETHER_H */ --- a/include/uapi/linux/libc-compat.h +++ b/include/uapi/linux/libc-compat.h -@@ -51,6 +51,14 @@ - /* We have included libc headers... */ - #if !defined(__KERNEL__) +@@ -161,4 +161,10 @@ -+/* musl defines the ethhdr struct itself in its netinet/if_ether.h. -+ * Glibc just includes the kernel header and uses a different guard. */ -+#if defined(_NETINET_IF_ETHER_H) -+#define __UAPI_DEF_ETHHDR 0 -+#else + #endif /* __GLIBC__ */ + ++/* Definitions for if_ether.h */ ++/* allow libcs like musl to deactivate this, glibc does not implement this. */ ++#ifndef __UAPI_DEF_ETHHDR +#define __UAPI_DEF_ETHHDR 1 +#endif + - /* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - -@@ -113,6 +121,9 @@ - * that we need. */ - #else /* defined(__KERNEL__) */ - -+/* Definitions for if_ether.h */ -+#define __UAPI_DEF_ETHHDR 1 -+ - /* Definitions for in.h */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 + #endif /* _UAPI_LIBC_COMPAT_H */ diff --git a/target/linux/generic/pending-4.14/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch b/target/linux/generic/pending-4.14/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch new file mode 100644 index 000000000..cc1705312 --- /dev/null +++ b/target/linux/generic/pending-4.14/102-MIPS-only-process-negative-stack-offsets-on-stack-tr.patch @@ -0,0 +1,57 @@ +From: Felix Fietkau +Date: Wed, 18 Apr 2018 10:50:05 +0200 +Subject: [PATCH] MIPS: only process negative stack offsets on stack traces + +Fixes endless back traces in cases where the compiler emits a stack +pointer increase in a branch delay slot (probably for some form of +function return). + +[ 3.475442] BUG: MAX_STACK_TRACE_ENTRIES too low! +[ 3.480070] turning off the locking correctness validator. +[ 3.485521] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.34 #0 +[ 3.491475] Stack : 00000000 00000000 00000000 00000000 80e0fce2 00000034 00000000 00000000 +[ 3.499764] 87c3838c 80696377 8061047c 00000000 00000001 00000001 87c2d850 6534689f +[ 3.508059] 00000000 00000000 80e10000 00000000 00000000 000000cf 0000000f 00000000 +[ 3.516353] 00000000 806a0000 00076891 00000000 00000000 00000000 ffffffff 00000000 +[ 3.524648] 806c0000 00000004 80e10000 806a0000 00000003 80690000 00000000 80700000 +[ 3.532942] ... +[ 3.535362] Call Trace: +[ 3.537818] [<80010a48>] show_stack+0x58/0x100 +[ 3.542207] [<804c2f78>] dump_stack+0xe8/0x170 +[ 3.546613] [<80079f90>] save_trace+0xf0/0x110 +[ 3.551010] [<8007b1ec>] mark_lock+0x33c/0x78c +[ 3.555413] [<8007bf48>] __lock_acquire+0x2ac/0x1a08 +[ 3.560337] [<8007de60>] lock_acquire+0x64/0x8c +[ 3.564846] [<804e1570>] _raw_spin_lock_irqsave+0x54/0x78 +[ 3.570186] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.574770] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.579257] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.583839] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.588329] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.592911] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.597401] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.601983] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.606473] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.611055] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.615545] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.620125] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.624619] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.629197] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.633691] [<801b618c>] kernfs_notify+0x94/0xac +[ 3.638269] [<801b7b10>] sysfs_notify+0x74/0xa0 +[ 3.642763] [<801b618c>] kernfs_notify+0x94/0xac + +Signed-off-by: Felix Fietkau +--- + +--- a/arch/mips/kernel/process.c ++++ b/arch/mips/kernel/process.c +@@ -357,6 +357,8 @@ static inline int is_sp_move_ins(union m + + if (ip->i_format.opcode == addiu_op || + ip->i_format.opcode == daddiu_op) { ++ if (ip->i_format.simmediate > 0) ++ return 0; + *frame_size = -ip->i_format.simmediate; + return 1; + } diff --git a/target/linux/generic/pending-4.14/142-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch b/target/linux/generic/pending-4.14/142-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch new file mode 100644 index 000000000..60c8ecbdc --- /dev/null +++ b/target/linux/generic/pending-4.14/142-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch @@ -0,0 +1,65 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Subject: [PATCH] mtd: bcm47xxpart: improve handling TRX partition size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When bcm47xxpart finds a TRX partition (container) it's supposed to jump +to the end of it and keep looking for more partitions. TRX and its +subpartitions are handled be a separated parser. + +The problem with old code was relying on the length specified in a TRX +header. That isn't reliable as TRX is commonly modified to have checksum +cover only non-changing subpartitions. Otherwise modifying e.g. a rootfs +would result in CRC32 mismatch and bootloader refusing to boot a +firmware. + +Fix it by trying better to figure out a real TRX size. We can securely +assume that TRX has to cover all subpartitions and the last one is at +least of a block size in size. Then compare it with a length field. + +This makes code more optimal & reliable thanks to skipping data that +shouldn't be parsed. + +Signed-off-by: Rafał Miłecki +--- + +--- a/drivers/mtd/bcm47xxpart.c ++++ b/drivers/mtd/bcm47xxpart.c +@@ -186,6 +186,8 @@ static int bcm47xxpart_parse(struct mtd_ + /* TRX */ + if (buf[0x000 / 4] == TRX_MAGIC) { + struct trx_header *trx; ++ uint32_t last_subpart; ++ uint32_t trx_size; + + if (trx_num >= ARRAY_SIZE(trx_parts)) + pr_warn("No enough space to store another TRX found at 0x%X\n", +@@ -195,11 +197,23 @@ static int bcm47xxpart_parse(struct mtd_ + bcm47xxpart_add_part(&parts[curr_part++], "firmware", + offset, 0); + +- /* Jump to the end of TRX */ ++ /* ++ * Try to find TRX size. The "length" field isn't fully ++ * reliable as it could be decreased to make CRC32 cover ++ * only part of TRX data. It's commonly used as checksum ++ * can't cover e.g. ever-changing rootfs partition. ++ * Use offsets as helpers for assuming min TRX size. ++ */ + trx = (struct trx_header *)buf; +- offset = roundup(offset + trx->length, blocksize); +- /* Next loop iteration will increase the offset */ +- offset -= blocksize; ++ last_subpart = max3(trx->offset[0], trx->offset[1], ++ trx->offset[2]); ++ trx_size = max(trx->length, last_subpart + blocksize); ++ ++ /* ++ * Skip the TRX data. Decrease offset by block size as ++ * the next loop iteration will increase it. ++ */ ++ offset += roundup(trx_size, blocksize) - blocksize; + continue; + } + diff --git a/target/linux/generic/pending-4.14/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch b/target/linux/generic/pending-4.14/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch index 58359731f..931172534 100644 --- a/target/linux/generic/pending-4.14/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch +++ b/target/linux/generic/pending-4.14/641-netfilter-nf_flow_table-support-hw-offload-through-v.patch @@ -103,75 +103,76 @@ Signed-off-by: Felix Fietkau - indev = dev_get_by_index(net, ifindex); - if (WARN_ON(!indev)) - return 0; -+ if (dev->type != ARPHRD_ETHER) -+ return; - +- - mutex_lock(&nf_flow_offload_hw_mutex); - ret = indev->netdev_ops->ndo_flow_offload(type, flow); - mutex_unlock(&nf_flow_offload_hw_mutex); ++ if (dev->type != ARPHRD_ETHER) ++ return; + +- dev_put(indev); + memcpy(path->eth_src, path->dev->dev_addr, ETH_ALEN); + n = dst_neigh_lookup(tuple->dst_cache, &tuple->src_v4); + if (!n) + return; -- dev_put(indev); +- return ret; + memcpy(path->eth_dest, n->ha, ETH_ALEN); + path->flags |= FLOW_OFFLOAD_PATH_ETHERNET; + neigh_release(n); -+} + } -- return ret; +-static void flow_offload_hw_work_add(struct flow_offload_hw *offload) +static int flow_offload_check_path(struct net *net, + struct flow_offload_tuple *tuple, + struct flow_offload_hw_path *path) -+{ + { +- struct net *net; +- int ret; + struct net_device *dev; -+ + +- if (nf_ct_is_dying(offload->ct)) +- return; + dev = dev_get_by_index_rcu(net, tuple->iifidx); + if (!dev) + return -ENOENT; + + path->dev = dev; + flow_offload_check_ethernet(tuple, path); -+ + +- net = read_pnet(&offload->flow_hw_net); +- ret = do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_ADD); +- if (ret >= 0) +- offload->flow->flags |= FLOW_OFFLOAD_HW; + if (dev->netdev_ops->ndo_flow_offload_check) + return dev->netdev_ops->ndo_flow_offload_check(path); + + return 0; } --static void flow_offload_hw_work_add(struct flow_offload_hw *offload) +-static void flow_offload_hw_work_del(struct flow_offload_hw *offload) +static int do_flow_offload_hw(struct flow_offload_hw *offload) { -- struct net *net; +- struct net *net = read_pnet(&offload->flow_hw_net); + struct net_device *src_dev = offload->src.dev; + struct net_device *dest_dev = offload->dest.dev; - int ret; - -- if (nf_ct_is_dying(offload->ct)) -- return; ++ int ret; ++ + ret = src_dev->netdev_ops->ndo_flow_offload(offload->type, + offload->flow, + &offload->src, + &offload->dest); - -- net = read_pnet(&offload->flow_hw_net); -- ret = do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_ADD); -- if (ret >= 0) -- offload->flow->flags |= FLOW_OFFLOAD_HW; ++ + /* restore devices in case the driver mangled them */ + offload->src.dev = src_dev; + offload->dest.dev = dest_dev; + + return ret; - } ++} --static void flow_offload_hw_work_del(struct flow_offload_hw *offload) -+static void flow_offload_hw_free(struct flow_offload_hw *offload) - { -- struct net *net = read_pnet(&offload->flow_hw_net); -- - do_flow_offload_hw(net, offload->flow, FLOW_OFFLOAD_DEL); ++static void flow_offload_hw_free(struct flow_offload_hw *offload) ++{ + dev_put(offload->src.dev); + dev_put(offload->dest.dev); + if (offload->ct) diff --git a/target/linux/generic/pending-4.14/642-net-8021q-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-4.14/642-net-8021q-support-hardware-flow-table-offload.patch index cda2e0ffd..ca340fc8e 100644 --- a/target/linux/generic/pending-4.14/642-net-8021q-support-hardware-flow-table-offload.patch +++ b/target/linux/generic/pending-4.14/642-net-8021q-support-hardware-flow-table-offload.patch @@ -9,18 +9,19 @@ Signed-off-by: Felix Fietkau --- a/net/8021q/vlan_dev.c +++ b/net/8021q/vlan_dev.c -@@ -29,8 +29,10 @@ +@@ -29,9 +29,11 @@ #include #include #include +#include + #include #include #include +#include #include "vlan.h" #include "vlanproc.h" -@@ -762,6 +764,25 @@ static int vlan_dev_get_iflink(const str +@@ -766,6 +768,25 @@ static int vlan_dev_get_iflink(const str return real_dev->ifindex; } @@ -46,7 +47,7 @@ Signed-off-by: Felix Fietkau static const struct ethtool_ops vlan_ethtool_ops = { .get_link_ksettings = vlan_ethtool_get_link_ksettings, .get_drvinfo = vlan_ethtool_get_drvinfo, -@@ -799,6 +820,7 @@ static const struct net_device_ops vlan_ +@@ -803,6 +824,7 @@ static const struct net_device_ops vlan_ .ndo_fix_features = vlan_dev_fix_features, .ndo_get_lock_subclass = vlan_dev_get_lock_subclass, .ndo_get_iflink = vlan_dev_get_iflink, diff --git a/target/linux/generic/pending-4.14/644-net-pppoe-support-hardware-flow-table-offload.patch b/target/linux/generic/pending-4.14/644-net-pppoe-support-hardware-flow-table-offload.patch index 9259fe8df..9565412c0 100644 --- a/target/linux/generic/pending-4.14/644-net-pppoe-support-hardware-flow-table-offload.patch +++ b/target/linux/generic/pending-4.14/644-net-pppoe-support-hardware-flow-table-offload.patch @@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau #define PPP_VERSION "2.4.2" /* -@@ -1383,12 +1386,33 @@ static void ppp_dev_priv_destructor(stru +@@ -1382,12 +1385,33 @@ static void ppp_dev_priv_destructor(stru ppp_destroy_interface(ppp); } diff --git a/target/linux/generic/pending-4.14/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-4.14/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch index c544f7af1..4a76db0ff 100644 --- a/target/linux/generic/pending-4.14/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch +++ b/target/linux/generic/pending-4.14/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch @@ -143,7 +143,7 @@ Signed-off-by: Steven Barth } return &ip6n->tnls[prio][h]; } -@@ -380,6 +391,12 @@ ip6_tnl_dev_uninit(struct net_device *de +@@ -383,6 +394,12 @@ ip6_tnl_dev_uninit(struct net_device *de struct net *net = t->net; struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); @@ -156,7 +156,7 @@ Signed-off-by: Steven Barth if (dev == ip6n->fb_tnl_dev) RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL); else -@@ -776,6 +793,107 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t, +@@ -779,6 +796,107 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t, } EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl); @@ -264,7 +264,7 @@ Signed-off-by: Steven Barth static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb, const struct tnl_ptk_info *tpi, struct metadata_dst *tun_dst, -@@ -828,6 +946,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl +@@ -831,6 +949,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl skb_reset_network_header(skb); memset(skb->cb, 0, sizeof(struct inet6_skb_parm)); @@ -292,7 +292,7 @@ Signed-off-by: Steven Barth __skb_tunnel_rx(skb, tunnel->dev, tunnel->net); err = dscp_ecn_decapsulate(tunnel, ipv6h, skb); -@@ -959,6 +1098,7 @@ static void init_tel_txopt(struct ipv6_t +@@ -962,6 +1101,7 @@ static void init_tel_txopt(struct ipv6_t opt->ops.opt_nflen = 8; } @@ -300,7 +300,7 @@ Signed-off-by: Steven Barth /** * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own * @t: the outgoing tunnel device -@@ -1301,6 +1441,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str +@@ -1304,6 +1444,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str { struct ip6_tnl *t = netdev_priv(dev); struct ipv6hdr *ipv6h = ipv6_hdr(skb); @@ -308,7 +308,7 @@ Signed-off-by: Steven Barth int encap_limit = -1; __u16 offset; struct flowi6 fl6; -@@ -1363,6 +1504,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str +@@ -1366,6 +1507,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL); @@ -327,7 +327,7 @@ Signed-off-by: Steven Barth if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6)) return -1; -@@ -1491,6 +1644,14 @@ ip6_tnl_change(struct ip6_tnl *t, const +@@ -1494,6 +1647,14 @@ ip6_tnl_change(struct ip6_tnl *t, const t->parms.link = p->link; t->parms.proto = p->proto; t->parms.fwmark = p->fwmark; @@ -342,7 +342,7 @@ Signed-off-by: Steven Barth dst_cache_reset(&t->dst_cache); ip6_tnl_link_config(t); return 0; -@@ -1529,6 +1690,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ +@@ -1532,6 +1693,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ p->flowinfo = u->flowinfo; p->link = u->link; p->proto = u->proto; @@ -350,7 +350,7 @@ Signed-off-by: Steven Barth memcpy(p->name, u->name, sizeof(u->name)); } -@@ -1910,6 +2072,15 @@ static int ip6_tnl_validate(struct nlatt +@@ -1913,6 +2075,15 @@ static int ip6_tnl_validate(struct nlatt return 0; } @@ -366,7 +366,7 @@ Signed-off-by: Steven Barth static void ip6_tnl_netlink_parms(struct nlattr *data[], struct __ip6_tnl_parm *parms) { -@@ -1947,6 +2118,46 @@ static void ip6_tnl_netlink_parms(struct +@@ -1950,6 +2121,46 @@ static void ip6_tnl_netlink_parms(struct if (data[IFLA_IPTUN_FWMARK]) parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]); @@ -413,7 +413,7 @@ Signed-off-by: Steven Barth } static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[], -@@ -2058,6 +2269,12 @@ static void ip6_tnl_dellink(struct net_d +@@ -2061,6 +2272,12 @@ static void ip6_tnl_dellink(struct net_d static size_t ip6_tnl_get_size(const struct net_device *dev) { @@ -426,7 +426,7 @@ Signed-off-by: Steven Barth return /* IFLA_IPTUN_LINK */ nla_total_size(4) + -@@ -2087,6 +2304,24 @@ static size_t ip6_tnl_get_size(const str +@@ -2090,6 +2307,24 @@ static size_t ip6_tnl_get_size(const str nla_total_size(0) + /* IFLA_IPTUN_FWMARK */ nla_total_size(4) + @@ -451,7 +451,7 @@ Signed-off-by: Steven Barth 0; } -@@ -2094,6 +2329,9 @@ static int ip6_tnl_fill_info(struct sk_b +@@ -2097,6 +2332,9 @@ static int ip6_tnl_fill_info(struct sk_b { struct ip6_tnl *tunnel = netdev_priv(dev); struct __ip6_tnl_parm *parm = &tunnel->parms; @@ -461,7 +461,7 @@ Signed-off-by: Steven Barth if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) || nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) || -@@ -2103,9 +2341,27 @@ static int ip6_tnl_fill_info(struct sk_b +@@ -2106,9 +2344,27 @@ static int ip6_tnl_fill_info(struct sk_b nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) || nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) || nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) || @@ -490,7 +490,7 @@ Signed-off-by: Steven Barth if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) || nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) || nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) || -@@ -2145,6 +2401,7 @@ static const struct nla_policy ip6_tnl_p +@@ -2148,6 +2404,7 @@ static const struct nla_policy ip6_tnl_p [IFLA_IPTUN_ENCAP_DPORT] = { .type = NLA_U16 }, [IFLA_IPTUN_COLLECT_METADATA] = { .type = NLA_FLAG }, [IFLA_IPTUN_FWMARK] = { .type = NLA_U32 }, diff --git a/target/linux/generic/pending-4.14/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-4.14/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index 39346886e..1ac009b65 100644 --- a/target/linux/generic/pending-4.14/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-4.14/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -141,7 +141,7 @@ Signed-off-by: Jonas Gorski static const struct rt6_info ip6_blk_hole_entry_template = { .dst = { .__refcnt = ATOMIC_INIT(1), -@@ -2038,6 +2055,11 @@ static struct rt6_info *ip6_route_info_c +@@ -2041,6 +2058,11 @@ static struct rt6_info *ip6_route_info_c rt->dst.output = ip6_pkt_prohibit_out; rt->dst.input = ip6_pkt_prohibit; break; @@ -153,7 +153,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -2763,6 +2785,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -2766,6 +2788,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -171,7 +171,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -2997,7 +3030,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -3000,7 +3033,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -181,7 +181,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -3487,6 +3521,9 @@ static int rt6_fill_node(struct net *net +@@ -3490,6 +3524,9 @@ static int rt6_fill_node(struct net *net case -EACCES: rtm->rtm_type = RTN_PROHIBIT; break; @@ -191,7 +191,7 @@ Signed-off-by: Jonas Gorski case -EAGAIN: rtm->rtm_type = RTN_THROW; break; -@@ -3805,6 +3842,8 @@ static int ip6_route_dev_notify(struct n +@@ -3808,6 +3845,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -200,7 +200,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -4032,6 +4071,17 @@ static int __net_init ip6_route_net_init +@@ -4035,6 +4074,17 @@ static int __net_init ip6_route_net_init net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); @@ -218,7 +218,7 @@ Signed-off-by: Jonas Gorski #endif net->ipv6.sysctl.flush_delay = 0; -@@ -4050,6 +4100,8 @@ out: +@@ -4053,6 +4103,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -227,7 +227,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -4067,6 +4119,7 @@ static void __net_exit ip6_route_net_exi +@@ -4070,6 +4122,7 @@ static void __net_exit ip6_route_net_exi #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); kfree(net->ipv6.ip6_blk_hole_entry); @@ -235,7 +235,7 @@ Signed-off-by: Jonas Gorski #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); } -@@ -4140,6 +4193,9 @@ void __init ip6_route_init_special_entri +@@ -4143,6 +4196,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-4.14/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-4.14/680-NET-skip-GRO-for-foreign-MAC-addresses.patch index 9ac505e85..9de77dfcc 100644 --- a/target/linux/generic/pending-4.14/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ b/target/linux/generic/pending-4.14/680-NET-skip-GRO-for-foreign-MAC-addresses.patch @@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h -@@ -1739,6 +1739,8 @@ struct net_device { +@@ -1763,6 +1763,8 @@ struct net_device { struct netdev_hw_addr_list mc; struct netdev_hw_addr_list dev_addrs; diff --git a/target/linux/generic/pending-4.4/001-mtdsplit_backport.patch b/target/linux/generic/pending-4.4/001-mtdsplit_backport.patch index f0839b6b9..b5c485fe1 100644 --- a/target/linux/generic/pending-4.4/001-mtdsplit_backport.patch +++ b/target/linux/generic/pending-4.4/001-mtdsplit_backport.patch @@ -129,7 +129,7 @@ return __mtdsplit_parse_uimage(master, pparts, data, --- a/drivers/mtd/mtdsplit/mtdsplit_wrgg.c +++ b/drivers/mtd/mtdsplit/mtdsplit_wrgg.c -@@ -40,8 +40,8 @@ struct wrgg03_header { +@@ -51,8 +51,8 @@ struct wrg_header { static int mtdsplit_parse_wrgg(struct mtd_info *master, diff --git a/target/linux/generic/pending-4.4/051-0005-ovl-proper-cleanup-of-workdir.patch b/target/linux/generic/pending-4.4/051-0005-ovl-proper-cleanup-of-workdir.patch index eb095b7a2..7225fc8cd 100644 --- a/target/linux/generic/pending-4.4/051-0005-ovl-proper-cleanup-of-workdir.patch +++ b/target/linux/generic/pending-4.4/051-0005-ovl-proper-cleanup-of-workdir.patch @@ -53,7 +53,7 @@ Cc: err = ovl_check_whiteouts(realpath->dentry, rdd); fput(realfile); -@@ -569,3 +569,64 @@ void ovl_cleanup_whiteouts(struct dentry +@@ -573,3 +573,64 @@ void ovl_cleanup_whiteouts(struct dentry } mutex_unlock(&upper->d_inode->i_mutex); } diff --git a/target/linux/generic/pending-4.4/141-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch b/target/linux/generic/pending-4.4/141-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch new file mode 100644 index 000000000..31acebf50 --- /dev/null +++ b/target/linux/generic/pending-4.4/141-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch @@ -0,0 +1,65 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Subject: [PATCH] mtd: bcm47xxpart: improve handling TRX partition size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When bcm47xxpart finds a TRX partition (container) it's supposed to jump +to the end of it and keep looking for more partitions. TRX and its +subpartitions are handled be a separated parser. + +The problem with old code was relying on the length specified in a TRX +header. That isn't reliable as TRX is commonly modified to have checksum +cover only non-changing subpartitions. Otherwise modifying e.g. a rootfs +would result in CRC32 mismatch and bootloader refusing to boot a +firmware. + +Fix it by trying better to figure out a real TRX size. We can securely +assume that TRX has to cover all subpartitions and the last one is at +least of a block size in size. Then compare it with a length field. + +This makes code more optimal & reliable thanks to skipping data that +shouldn't be parsed. + +Signed-off-by: Rafał Miłecki +--- + +--- a/drivers/mtd/bcm47xxpart.c ++++ b/drivers/mtd/bcm47xxpart.c +@@ -268,6 +268,8 @@ static int bcm47xxpart_parse(struct mtd_ + /* TRX */ + if (buf[0x000 / 4] == TRX_MAGIC) { + struct trx_header *trx; ++ uint32_t last_subpart; ++ uint32_t trx_size; + + if (trx_num >= ARRAY_SIZE(trx_parts)) + pr_warn("No enough space to store another TRX found at 0x%X\n", +@@ -277,11 +279,23 @@ static int bcm47xxpart_parse(struct mtd_ + bcm47xxpart_add_part(&parts[curr_part++], "firmware", + offset, 0); + +- /* Jump to the end of TRX */ ++ /* ++ * Try to find TRX size. The "length" field isn't fully ++ * reliable as it could be decreased to make CRC32 cover ++ * only part of TRX data. It's commonly used as checksum ++ * can't cover e.g. ever-changing rootfs partition. ++ * Use offsets as helpers for assuming min TRX size. ++ */ + trx = (struct trx_header *)buf; +- offset = roundup(offset + trx->length, blocksize); +- /* Next loop iteration will increase the offset */ +- offset -= blocksize; ++ last_subpart = max3(trx->offset[0], trx->offset[1], ++ trx->offset[2]); ++ trx_size = max(trx->length, last_subpart + blocksize); ++ ++ /* ++ * Skip the TRX data. Decrease offset by block size as ++ * the next loop iteration will increase it. ++ */ ++ offset += roundup(trx_size, blocksize) - blocksize; + continue; + } + diff --git a/target/linux/generic/pending-4.4/201-extra_optimization.patch b/target/linux/generic/pending-4.4/201-extra_optimization.patch index 2f834422c..b4235a11d 100644 --- a/target/linux/generic/pending-4.4/201-extra_optimization.patch +++ b/target/linux/generic/pending-4.4/201-extra_optimization.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -624,12 +624,12 @@ KBUILD_CFLAGS += $(call cc-disable-warni +@@ -626,12 +626,12 @@ KBUILD_CFLAGS += $(call cc-disable-warni KBUILD_CFLAGS += $(call cc-disable-warning, int-in-bool-context) ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE diff --git a/target/linux/generic/pending-4.4/202-reduce_module_size.patch b/target/linux/generic/pending-4.4/202-reduce_module_size.patch index d68c46364..1aabf3e72 100644 --- a/target/linux/generic/pending-4.4/202-reduce_module_size.patch +++ b/target/linux/generic/pending-4.4/202-reduce_module_size.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -403,7 +403,7 @@ KBUILD_CFLAGS_KERNEL := +@@ -405,7 +405,7 @@ KBUILD_CFLAGS_KERNEL := KBUILD_AFLAGS := -D__ASSEMBLY__ $(call cc-option,-fno-PIE) KBUILD_AFLAGS_MODULE := -DMODULE KBUILD_CFLAGS_MODULE := -DMODULE diff --git a/target/linux/generic/pending-4.4/204-module_strip.patch b/target/linux/generic/pending-4.4/204-module_strip.patch index d4c8039f7..a661f98c6 100644 --- a/target/linux/generic/pending-4.4/204-module_strip.patch +++ b/target/linux/generic/pending-4.4/204-module_strip.patch @@ -89,7 +89,7 @@ Signed-off-by: Felix Fietkau --- a/init/Kconfig +++ b/init/Kconfig -@@ -2026,6 +2026,13 @@ config MODULE_COMPRESS_XZ +@@ -2033,6 +2033,13 @@ config MODULE_COMPRESS_XZ endchoice @@ -105,7 +105,7 @@ Signed-off-by: Felix Fietkau config MODULES_TREE_LOOKUP --- a/kernel/module.c +++ b/kernel/module.c -@@ -2871,6 +2871,7 @@ static struct module *setup_load_info(st +@@ -2880,6 +2880,7 @@ static void check_modinfo_retpoline(stru static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -113,7 +113,7 @@ Signed-off-by: Felix Fietkau const char *modmagic = get_modinfo(info, "vermagic"); int err; -@@ -2900,6 +2901,7 @@ static int check_modinfo(struct module * +@@ -2911,6 +2912,7 @@ static int check_modinfo(struct module * pr_warn("%s: module is from the staging directory, the quality " "is unknown, you have been warned.\n", mod->name); } @@ -123,7 +123,7 @@ Signed-off-by: Felix Fietkau set_license(mod, get_modinfo(info, "license")); --- a/scripts/mod/modpost.c +++ b/scripts/mod/modpost.c -@@ -1963,7 +1963,9 @@ static void read_symbols(char *modname) +@@ -1964,7 +1964,9 @@ static void read_symbols(char *modname) symname = remove_dot(info.strtab + sym->st_name); handle_modversions(mod, &info, sym, symname); @@ -133,7 +133,7 @@ Signed-off-by: Felix Fietkau } if (!is_vmlinux(modname) || (is_vmlinux(modname) && vmlinux_section_warnings)) -@@ -2107,7 +2109,9 @@ static void add_header(struct buffer *b, +@@ -2108,7 +2110,9 @@ static void add_header(struct buffer *b, buf_printf(b, "#include \n"); buf_printf(b, "#include \n"); buf_printf(b, "\n"); @@ -143,7 +143,7 @@ Signed-off-by: Felix Fietkau buf_printf(b, "\n"); buf_printf(b, "__visible struct module __this_module\n"); buf_printf(b, "__attribute__((section(\".gnu.linkonce.this_module\"))) = {\n"); -@@ -2124,16 +2128,20 @@ static void add_header(struct buffer *b, +@@ -2125,8 +2129,10 @@ static void add_header(struct buffer *b, static void add_intree_flag(struct buffer *b, int is_intree) { @@ -153,6 +153,9 @@ Signed-off-by: Felix Fietkau +#endif } + /* Cannot check for assembler */ +@@ -2139,10 +2145,12 @@ static void add_retpoline(struct buffer + static void add_staging_flag(struct buffer *b, const char *name) { +#ifndef CONFIG_MODULE_STRIPPED @@ -164,7 +167,7 @@ Signed-off-by: Felix Fietkau } /* In kernel, this size is defined in linux/module.h; -@@ -2237,11 +2245,13 @@ static void add_depends(struct buffer *b +@@ -2246,11 +2254,13 @@ static void add_depends(struct buffer *b static void add_srcversion(struct buffer *b, struct module *mod) { @@ -178,7 +181,7 @@ Signed-off-by: Felix Fietkau } static void write_if_changed(struct buffer *b, const char *fname) -@@ -2475,7 +2485,9 @@ int main(int argc, char **argv) +@@ -2485,7 +2495,9 @@ int main(int argc, char **argv) add_staging_flag(&buf, mod->name); err |= add_versions(&buf, mod); add_depends(&buf, mod, modules); diff --git a/target/linux/generic/pending-4.4/208-disable-modorder.patch b/target/linux/generic/pending-4.4/208-disable-modorder.patch index 00d6e4195..1707d520b 100644 --- a/target/linux/generic/pending-4.4/208-disable-modorder.patch +++ b/target/linux/generic/pending-4.4/208-disable-modorder.patch @@ -5,7 +5,7 @@ Signed-off-by: Felix Fietkau --- --- a/Makefile +++ b/Makefile -@@ -1121,7 +1121,6 @@ all: modules +@@ -1123,7 +1123,6 @@ all: modules PHONY += modules modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) modules.builtin @@ -13,7 +13,7 @@ Signed-off-by: Felix Fietkau @$(kecho) ' Building modules, stage 2.'; $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild -@@ -1151,7 +1150,6 @@ _modinst_: +@@ -1153,7 +1152,6 @@ _modinst_: rm -f $(MODLIB)/build ; \ ln -s $(CURDIR) $(MODLIB)/build ; \ fi diff --git a/target/linux/generic/pending-4.4/221-module_exports.patch b/target/linux/generic/pending-4.4/221-module_exports.patch index 510a86c46..44c0a6dec 100644 --- a/target/linux/generic/pending-4.4/221-module_exports.patch +++ b/target/linux/generic/pending-4.4/221-module_exports.patch @@ -54,7 +54,7 @@ } --- a/scripts/Makefile.build +++ b/scripts/Makefile.build -@@ -299,7 +299,7 @@ targets += $(extra-y) $(MAKECMDGOALS) $( +@@ -372,7 +372,7 @@ targets += $(extra-y) $(MAKECMDGOALS) $( # Linker scripts preprocessor (.lds.S -> .lds) # --------------------------------------------------------------------------- quiet_cmd_cpp_lds_S = LDS $@ diff --git a/target/linux/generic/pending-4.4/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch b/target/linux/generic/pending-4.4/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch deleted file mode 100644 index 762f4989b..000000000 --- a/target/linux/generic/pending-4.4/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 8b05e325824d3b38e52a7748b3b5dc34dc1c0f6d Mon Sep 17 00:00:00 2001 -From: David Heidelberger -Date: Mon, 29 Jun 2015 14:37:54 +0200 -Subject: [PATCH 1/3] uapi/kernel.h: glibc specific inclusion of sysinfo.h - -including sysinfo.h from kernel.h makes no sense whatsoever, -but removing it breaks glibc's userspace header, -which includes kernel.h instead of sysinfo.h from their sys/sysinfo.h. -this seems to be a historical mistake. -on musl, including any header that uses kernel.h directly or indirectly -plus sys/sysinfo.h will produce a compile error due to redefinition of -struct sysinfo from sys/sysinfo.h. -so for now, only include it on glibc or when including from kernel -in order not to break their headers. - -Signed-off-by: John Spencer -Signed-off-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/kernel.h | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/include/uapi/linux/kernel.h -+++ b/include/uapi/linux/kernel.h -@@ -1,7 +1,9 @@ - #ifndef _UAPI_LINUX_KERNEL_H - #define _UAPI_LINUX_KERNEL_H - -+#if defined(__KERNEL__) || defined( __GLIBC__) - #include -+#endif - - /* - * 'kernel.h' contains some often-used function prototypes etc diff --git a/target/linux/generic/pending-4.4/270-uapi-libc-compat-add-fallback-for-unsupported-libcs.patch b/target/linux/generic/pending-4.4/270-uapi-libc-compat-add-fallback-for-unsupported-libcs.patch new file mode 100644 index 000000000..06ad9bba9 --- /dev/null +++ b/target/linux/generic/pending-4.4/270-uapi-libc-compat-add-fallback-for-unsupported-libcs.patch @@ -0,0 +1,130 @@ +From c6bdd0d302119819de72439972d0462c26ef9eda Mon Sep 17 00:00:00 2001 +From: Felix Janda +Date: Sun, 12 Nov 2017 13:30:17 -0500 +Subject: uapi libc compat: add fallback for unsupported libcs + +libc-compat.h aims to prevent symbol collisions between uapi and libc +headers for each supported libc. This requires continuous coordination +between them. + +The goal of this commit is to improve the situation for libcs (such as +musl) which are not yet supported and/or do not wish to be explicitly +supported, while not affecting supported libcs. More precisely, with +this commit, unsupported libcs can request the suppression of any +specific uapi definition by defining the correspondings _UAPI_DEF_* +macro as 0. This can fix symbol collisions for them, as long as the +libc headers are included before the uapi headers. Inclusion in the +other order is outside the scope of this commit. + +All infrastructure in order to enable this fallback for unsupported +libcs is already in place, except that libc-compat.h unconditionally +defines all _UAPI_DEF_* macros to 1 for all unsupported libcs so that +any previous definitions are ignored. In order to fix this, this commit +merely makes these definitions conditional. + +This commit together with the musl libc commit + +http://git.musl-libc.org/cgit/musl/commit/?id=04983f2272382af92eb8f8838964ff944fbb8258 + +fixes for example the following compiler errors when is +included after musl's : + +./linux/in6.h:32:8: error: redefinition of 'struct in6_addr' +./linux/in6.h:49:8: error: redefinition of 'struct sockaddr_in6' +./linux/in6.h:59:8: error: redefinition of 'struct ipv6_mreq' + +The comments referencing glibc are still correct, but this file is not +only used for glibc any more. + +Signed-off-by: Felix Janda +Reviewed-by: Hauke Mehrtens +--- + include/uapi/linux/libc-compat.h | 55 +++++++++++++++++++++++++++++++++++++++- + 1 file changed, 54 insertions(+), 1 deletion(-) + +--- a/include/uapi/linux/libc-compat.h ++++ b/include/uapi/linux/libc-compat.h +@@ -148,39 +148,82 @@ + + /* If we did not see any headers from any supported C libraries, + * or we are being included in the kernel, then define everything +- * that we need. */ ++ * that we need. Check for previous __UAPI_* definitions to give ++ * unsupported C libraries a way to opt out of any kernel definition. */ + #else /* !defined(__GLIBC__) */ + + /* Definitions for if.h */ ++#ifndef __UAPI_DEF_IF_IFCONF + #define __UAPI_DEF_IF_IFCONF 1 ++#endif ++#ifndef __UAPI_DEF_IF_IFMAP + #define __UAPI_DEF_IF_IFMAP 1 ++#endif ++#ifndef __UAPI_DEF_IF_IFNAMSIZ + #define __UAPI_DEF_IF_IFNAMSIZ 1 ++#endif ++#ifndef __UAPI_DEF_IF_IFREQ + #define __UAPI_DEF_IF_IFREQ 1 ++#endif + /* Everything up to IFF_DYNAMIC, matches net/if.h until glibc 2.23 */ ++#ifndef __UAPI_DEF_IF_NET_DEVICE_FLAGS + #define __UAPI_DEF_IF_NET_DEVICE_FLAGS 1 ++#endif + /* For the future if glibc adds IFF_LOWER_UP, IFF_DORMANT and IFF_ECHO */ ++#ifndef __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO + #define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 1 ++#endif + + /* Definitions for in.h */ ++#ifndef __UAPI_DEF_IN_ADDR + #define __UAPI_DEF_IN_ADDR 1 ++#endif ++#ifndef __UAPI_DEF_IN_IPPROTO + #define __UAPI_DEF_IN_IPPROTO 1 ++#endif ++#ifndef __UAPI_DEF_IN_PKTINFO + #define __UAPI_DEF_IN_PKTINFO 1 ++#endif ++#ifndef __UAPI_DEF_IP_MREQ + #define __UAPI_DEF_IP_MREQ 1 ++#endif ++#ifndef __UAPI_DEF_SOCKADDR_IN + #define __UAPI_DEF_SOCKADDR_IN 1 ++#endif ++#ifndef __UAPI_DEF_IN_CLASS + #define __UAPI_DEF_IN_CLASS 1 ++#endif + + /* Definitions for in6.h */ ++#ifndef __UAPI_DEF_IN6_ADDR + #define __UAPI_DEF_IN6_ADDR 1 ++#endif ++#ifndef __UAPI_DEF_IN6_ADDR_ALT + #define __UAPI_DEF_IN6_ADDR_ALT 1 ++#endif ++#ifndef __UAPI_DEF_SOCKADDR_IN6 + #define __UAPI_DEF_SOCKADDR_IN6 1 ++#endif ++#ifndef __UAPI_DEF_IPV6_MREQ + #define __UAPI_DEF_IPV6_MREQ 1 ++#endif ++#ifndef __UAPI_DEF_IPPROTO_V6 + #define __UAPI_DEF_IPPROTO_V6 1 ++#endif ++#ifndef __UAPI_DEF_IPV6_OPTIONS + #define __UAPI_DEF_IPV6_OPTIONS 1 ++#endif ++#ifndef __UAPI_DEF_IN6_PKTINFO + #define __UAPI_DEF_IN6_PKTINFO 1 ++#endif ++#ifndef __UAPI_DEF_IP6_MTUINFO + #define __UAPI_DEF_IP6_MTUINFO 1 ++#endif + + /* Definitions for xattr.h */ ++#ifndef __UAPI_DEF_XATTR + #define __UAPI_DEF_XATTR 1 ++#endif + + #endif /* __GLIBC__ */ + diff --git a/target/linux/generic/pending-4.4/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch b/target/linux/generic/pending-4.4/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch deleted file mode 100644 index 2a29535ee..000000000 --- a/target/linux/generic/pending-4.4/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch +++ /dev/null @@ -1,94 +0,0 @@ -From f972afc2509eebcb00d370256c55b112a3b5ffca Mon Sep 17 00:00:00 2001 -From: David Heidelberger -Date: Mon, 29 Jun 2015 16:50:40 +0200 -Subject: [PATCH 2/3] uapi/libc-compat.h: do not rely on __GLIBC__ - -Musl provides the same structs as glibc, but does not provide a define to -allow its detection. Since the absence of __GLIBC__ also can mean that it -is included from the kernel, change the __GLIBC__ detection to -!__KERNEL__, which should always be true when included from userspace. - -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/libc-compat.h | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - ---- a/include/uapi/linux/libc-compat.h -+++ b/include/uapi/linux/libc-compat.h -@@ -48,13 +48,13 @@ - #ifndef _UAPI_LIBC_COMPAT_H - #define _UAPI_LIBC_COMPAT_H - --/* We have included glibc headers... */ --#if defined(__GLIBC__) -+/* We have included libc headers... */ -+#if !defined(__KERNEL__) - --/* Coordinate with glibc net/if.h header. */ -+/* Coordinate with libc net/if.h header. */ - #if defined(_NET_IF_H) && defined(__USE_MISC) - --/* GLIBC headers included first so don't define anything -+/* LIBC headers included first so don't define anything - * that would already be defined. */ - - #define __UAPI_DEF_IF_IFCONF 0 -@@ -85,10 +85,10 @@ - - #endif /* _NET_IF_H */ - --/* Coordinate with glibc netinet/in.h header. */ -+/* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - --/* GLIBC headers included first so don't define anything -+/* LIBC headers included first so don't define anything - * that would already be defined. */ - #define __UAPI_DEF_IN_ADDR 0 - #define __UAPI_DEF_IN_IPPROTO 0 -@@ -102,7 +102,7 @@ - * if the glibc code didn't define them. This guard matches - * the guard in glibc/inet/netinet/in.h which defines the - * additional in6_addr macros e.g. s6_addr16, and s6_addr32. */ --#if defined(__USE_MISC) || defined (__USE_GNU) -+#if !defined(__GLIBC__) || defined(__USE_MISC) || defined (__USE_GNU) - #define __UAPI_DEF_IN6_ADDR_ALT 0 - #else - #define __UAPI_DEF_IN6_ADDR_ALT 1 -@@ -117,7 +117,7 @@ - #else - - /* Linux headers included first, and we must define everything -- * we need. The expectation is that glibc will check the -+ * we need. The expectation is that the libc will check the - * __UAPI_DEF_* defines and adjust appropriately. */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 -@@ -127,7 +127,7 @@ - #define __UAPI_DEF_IN_CLASS 1 - - #define __UAPI_DEF_IN6_ADDR 1 --/* We unconditionally define the in6_addr macros and glibc must -+/* We unconditionally define the in6_addr macros and the libc must - * coordinate. */ - #define __UAPI_DEF_IN6_ADDR_ALT 1 - #define __UAPI_DEF_SOCKADDR_IN6 1 -@@ -149,7 +149,7 @@ - /* If we did not see any headers from any supported C libraries, - * or we are being included in the kernel, then define everything - * that we need. */ --#else /* !defined(__GLIBC__) */ -+#else /* defined(__KERNEL__) */ - - /* Definitions for if.h */ - #define __UAPI_DEF_IF_IFCONF 1 -@@ -182,6 +182,6 @@ - /* Definitions for xattr.h */ - #define __UAPI_DEF_XATTR 1 - --#endif /* __GLIBC__ */ -+#endif /* __KERNEL__ */ - - #endif /* _UAPI_LIBC_COMPAT_H */ diff --git a/target/linux/generic/pending-4.4/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch b/target/linux/generic/pending-4.4/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch index 906536904..21494b925 100644 --- a/target/linux/generic/pending-4.4/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch +++ b/target/linux/generic/pending-4.4/272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch @@ -1,18 +1,20 @@ -From fcbb6fed85ea9ff4feb4f1ebd4f0f235fdaf06b6 Mon Sep 17 00:00:00 2001 -From: David Heidelberger +From 649affd04813c43e0a72886517fcfccd63230981 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens Date: Mon, 29 Jun 2015 16:53:03 +0200 -Subject: [PATCH 3/3] uapi/if_ether.h: prevent redefinition of struct ethhdr +Subject: uapi/if_ether.h: prevent redefinition of struct ethhdr Musl provides its own ethhdr struct definition. Add a guard to prevent its definition of the appropriate musl header has already been included. -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski +glibc does not implement this header, but when glibc will implement this +they can just define __UAPI_DEF_ETHHDR 0 to make it work with the +kernel. + +Signed-off-by: Hauke Mehrtens --- - include/uapi/linux/if_ether.h | 3 +++ - include/uapi/linux/libc-compat.h | 11 +++++++++++ - 2 files changed, 14 insertions(+) + include/uapi/linux/if_ether.h | 3 +++ + include/uapi/linux/libc-compat.h | 6 ++++++ + 2 files changed, 9 insertions(+) --- a/include/uapi/linux/if_ether.h +++ b/include/uapi/linux/if_ether.h @@ -40,28 +42,14 @@ Signed-off-by: Jonas Gorski #endif /* _UAPI_LINUX_IF_ETHER_H */ --- a/include/uapi/linux/libc-compat.h +++ b/include/uapi/linux/libc-compat.h -@@ -85,6 +85,14 @@ +@@ -227,4 +227,10 @@ - #endif /* _NET_IF_H */ + #endif /* __GLIBC__ */ -+/* musl defines the ethhdr struct itself in its netinet/if_ether.h. -+ * Glibc just includes the kernel header and uses a different guard. */ -+#if defined(_NETINET_IF_ETHER_H) -+#define __UAPI_DEF_ETHHDR 0 -+#else ++/* Definitions for if_ether.h */ ++/* allow libcs like musl to deactivate this, glibc does not implement this. */ ++#ifndef __UAPI_DEF_ETHHDR +#define __UAPI_DEF_ETHHDR 1 +#endif + - /* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - -@@ -161,6 +169,9 @@ - /* For the future if glibc adds IFF_LOWER_UP, IFF_DORMANT and IFF_ECHO */ - #define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 1 - -+/* Definitions for if_ether.h */ -+#define __UAPI_DEF_ETHHDR 1 -+ - /* Definitions for in.h */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 + #endif /* _UAPI_LIBC_COMPAT_H */ diff --git a/target/linux/generic/pending-4.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-4.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch index da3111266..462f7f42c 100644 --- a/target/linux/generic/pending-4.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch +++ b/target/linux/generic/pending-4.4/491-ubi-auto-create-ubiblock-device-for-rootfs.patch @@ -11,7 +11,7 @@ Signed-off-by: Daniel Golle --- a/drivers/mtd/ubi/block.c +++ b/drivers/mtd/ubi/block.c -@@ -628,6 +628,44 @@ static void __init ubiblock_create_from_ +@@ -636,6 +636,44 @@ static void __init ubiblock_create_from_ } } @@ -56,7 +56,7 @@ Signed-off-by: Daniel Golle static void ubiblock_remove_all(void) { struct ubiblock *next; -@@ -658,6 +696,10 @@ int __init ubiblock_init(void) +@@ -668,6 +706,10 @@ int __init ubiblock_init(void) */ ubiblock_create_from_param(); diff --git a/target/linux/generic/pending-4.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch b/target/linux/generic/pending-4.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch index f55e8e3a4..9fbfc7992 100644 --- a/target/linux/generic/pending-4.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch +++ b/target/linux/generic/pending-4.4/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch @@ -19,7 +19,7 @@ Signed-off-by: Daniel Golle #include "ubi-media.h" #include "ubi.h" -@@ -448,6 +449,15 @@ int ubiblock_create(struct ubi_volume_in +@@ -447,6 +448,15 @@ int ubiblock_create(struct ubi_volume_in add_disk(dev->gd); dev_info(disk_to_dev(dev->gd), "created from ubi%d:%d(%s)", dev->ubi_num, dev->vol_id, vi->name); @@ -32,6 +32,6 @@ Signed-off-by: Daniel Golle + ROOT_DEV = MKDEV(gd->major, gd->first_minor); + } + + mutex_unlock(&devices_mutex); return 0; - out_free_queue: diff --git a/target/linux/generic/pending-4.4/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-4.4/610-netfilter_match_bypass_default_checks.patch index 8b96639c7..dce8020c9 100644 --- a/target/linux/generic/pending-4.4/610-netfilter_match_bypass_default_checks.patch +++ b/target/linux/generic/pending-4.4/610-netfilter_match_bypass_default_checks.patch @@ -50,16 +50,16 @@ static bool ip_checkentry(const struct ipt_ip *ip) { -@@ -664,6 +690,8 @@ find_check_entry(struct ipt_entry *e, st - struct xt_mtchk_param mtpar; +@@ -655,6 +681,8 @@ find_check_entry(struct ipt_entry *e, st struct xt_entry_match *ematch; + unsigned long pcnt; + ip_checkdefault(&e->ip); + - e->counters.pcnt = xt_percpu_counter_alloc(); - if (IS_ERR_VALUE(e->counters.pcnt)) + pcnt = xt_percpu_counter_alloc(); + if (IS_ERR_VALUE(pcnt)) return -ENOMEM; -@@ -948,6 +976,7 @@ copy_entries_to_user(unsigned int total_ +@@ -953,6 +981,7 @@ copy_entries_to_user(unsigned int total_ const struct xt_table_info *private = table->private; int ret = 0; const void *loc_cpu_entry; @@ -67,7 +67,7 @@ counters = alloc_counters(table); if (IS_ERR(counters)) -@@ -975,6 +1004,14 @@ copy_entries_to_user(unsigned int total_ +@@ -980,6 +1009,14 @@ copy_entries_to_user(unsigned int total_ goto free_counters; } @@ -82,7 +82,7 @@ for (i = sizeof(struct ipt_entry); i < e->target_offset; i += m->u.match_size) { -@@ -1380,12 +1417,15 @@ compat_copy_entry_to_user(struct ipt_ent +@@ -1385,12 +1422,15 @@ compat_copy_entry_to_user(struct ipt_ent compat_uint_t origsize; const struct xt_entry_match *ematch; int ret = 0; diff --git a/target/linux/generic/pending-4.4/620-net_sched-codel-do-not-defer-queue-length-update.patch b/target/linux/generic/pending-4.4/620-net_sched-codel-do-not-defer-queue-length-update.patch new file mode 100644 index 000000000..2ec9c7a9e --- /dev/null +++ b/target/linux/generic/pending-4.4/620-net_sched-codel-do-not-defer-queue-length-update.patch @@ -0,0 +1,86 @@ +From: Konstantin Khlebnikov +Date: Mon, 21 Aug 2017 11:14:14 +0300 +Subject: [PATCH] net_sched/codel: do not defer queue length update + +When codel wants to drop last packet in ->dequeue() it cannot call +qdisc_tree_reduce_backlog() right away - it will notify parent qdisc +about zero qlen and HTB/HFSC will deactivate class. The same class will +be deactivated second time by caller of ->dequeue(). Currently codel and +fq_codel defer update. This triggers warning in HFSC when it's qlen != 0 +but there is no active classes. + +This patch update parent queue length immediately: just temporary increase +qlen around qdisc_tree_reduce_backlog() to prevent first class deactivation +if we have skb to return. + +This might open another problem in HFSC - now operation peek could fail and +deactivate parent class. + +Signed-off-by: Konstantin Khlebnikov +Link: https://bugzilla.kernel.org/show_bug.cgi?id=109581 +--- + +--- a/net/sched/sch_codel.c ++++ b/net/sched/sch_codel.c +@@ -79,11 +79,17 @@ static struct sk_buff *codel_qdisc_deque + + skb = codel_dequeue(sch, &q->params, &q->vars, &q->stats, dequeue); + +- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, +- * or HTB crashes. Defer it for next round. ++ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate ++ * parent class, dequeue in parent qdisc will do the same if we ++ * return skb. Temporary increment qlen if we have skb. + */ +- if (q->stats.drop_count && sch->q.qlen) { +- qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len); ++ if (q->stats.drop_count) { ++ if (skb) ++ sch->q.qlen++; ++ qdisc_tree_reduce_backlog(sch, q->stats.drop_count, ++ q->stats.drop_len); ++ if (skb) ++ sch->q.qlen--; + q->stats.drop_count = 0; + q->stats.drop_len = 0; + } +--- a/net/sched/sch_fq_codel.c ++++ b/net/sched/sch_fq_codel.c +@@ -311,6 +311,21 @@ begin: + flow->dropped += q->cstats.drop_count - prev_drop_count; + flow->dropped += q->cstats.ecn_mark - prev_ecn_mark; + ++ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate ++ * parent class, dequeue in parent qdisc will do the same if we ++ * return skb. Temporary increment qlen if we have skb. ++ */ ++ if (q->cstats.drop_count) { ++ if (skb) ++ sch->q.qlen++; ++ qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, ++ q->cstats.drop_len); ++ if (skb) ++ sch->q.qlen--; ++ q->cstats.drop_count = 0; ++ q->cstats.drop_len = 0; ++ } ++ + if (!skb) { + /* force a pass through old_flows to prevent starvation */ + if ((head == &q->new_flows) && !list_empty(&q->old_flows)) +@@ -321,15 +336,6 @@ begin: + } + qdisc_bstats_update(sch, skb); + flow->deficit -= qdisc_pkt_len(skb); +- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, +- * or HTB crashes. Defer it for next round. +- */ +- if (q->cstats.drop_count && sch->q.qlen) { +- qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, +- q->cstats.drop_len); +- q->cstats.drop_count = 0; +- q->cstats.drop_len = 0; +- } + return skb; + } + diff --git a/target/linux/generic/pending-4.4/650-pppoe_header_pad.patch b/target/linux/generic/pending-4.4/650-pppoe_header_pad.patch deleted file mode 100644 index 409de58c2..000000000 --- a/target/linux/generic/pending-4.4/650-pppoe_header_pad.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/drivers/net/ppp/pppoe.c -+++ b/drivers/net/ppp/pppoe.c -@@ -879,7 +879,7 @@ static int pppoe_sendmsg(struct socket * - goto end; - - -- skb = sock_wmalloc(sk, total_len + dev->hard_header_len + 32, -+ skb = sock_wmalloc(sk, total_len + dev->hard_header_len + 32 + NET_SKB_PAD, - 0, GFP_KERNEL); - if (!skb) { - error = -ENOMEM; -@@ -887,7 +887,7 @@ static int pppoe_sendmsg(struct socket * - } - - /* Reserve space for headers. */ -- skb_reserve(skb, dev->hard_header_len); -+ skb_reserve(skb, dev->hard_header_len + NET_SKB_PAD); - skb_reset_network_header(skb); - - skb->dev = dev; diff --git a/target/linux/generic/pending-4.4/660-fq_codel_defaults.patch b/target/linux/generic/pending-4.4/660-fq_codel_defaults.patch index 46fceffcf..fbe900891 100644 --- a/target/linux/generic/pending-4.4/660-fq_codel_defaults.patch +++ b/target/linux/generic/pending-4.4/660-fq_codel_defaults.patch @@ -1,6 +1,6 @@ --- a/net/sched/sch_fq_codel.c +++ b/net/sched/sch_fq_codel.c -@@ -471,7 +471,7 @@ static int fq_codel_init(struct Qdisc *s +@@ -477,7 +477,7 @@ static int fq_codel_init(struct Qdisc *s sch->limit = 10*1024; q->flows_cnt = 1024; diff --git a/target/linux/generic/pending-4.4/662-use_fq_codel_by_default.patch b/target/linux/generic/pending-4.4/662-use_fq_codel_by_default.patch index 9d1962caa..8d70b8235 100644 --- a/target/linux/generic/pending-4.4/662-use_fq_codel_by_default.patch +++ b/target/linux/generic/pending-4.4/662-use_fq_codel_by_default.patch @@ -13,7 +13,7 @@ device, it has to decide which ones to send first, which ones to --- a/net/sched/sch_fq_codel.c +++ b/net/sched/sch_fq_codel.c -@@ -688,7 +688,7 @@ static const struct Qdisc_class_ops fq_c +@@ -694,7 +694,7 @@ static const struct Qdisc_class_ops fq_c .walk = fq_codel_walk, }; @@ -22,7 +22,7 @@ .cl_ops = &fq_codel_class_ops, .id = "fq_codel", .priv_size = sizeof(struct fq_codel_sched_data), -@@ -704,6 +704,7 @@ static struct Qdisc_ops fq_codel_qdisc_o +@@ -710,6 +710,7 @@ static struct Qdisc_ops fq_codel_qdisc_o .dump_stats = fq_codel_dump_stats, .owner = THIS_MODULE, }; diff --git a/target/linux/generic/pending-4.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-4.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch index 303d83121..fe599798c 100644 --- a/target/linux/generic/pending-4.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch +++ b/target/linux/generic/pending-4.4/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch @@ -16,7 +16,7 @@ Signed-off-by: Steven Barth --- a/include/net/ip6_tunnel.h +++ b/include/net/ip6_tunnel.h -@@ -15,6 +15,18 @@ +@@ -17,6 +17,18 @@ /* determine capability on a per-packet basis */ #define IP6_TNL_F_CAP_PER_PACKET 0x40000 @@ -35,7 +35,7 @@ Signed-off-by: Steven Barth struct __ip6_tnl_parm { char name[IFNAMSIZ]; /* name of tunnel device */ int link; /* ifindex of underlying L2 interface */ -@@ -25,6 +37,7 @@ struct __ip6_tnl_parm { +@@ -27,6 +39,7 @@ struct __ip6_tnl_parm { __u32 flags; /* tunnel flags */ struct in6_addr laddr; /* local tunnel end-point address */ struct in6_addr raddr; /* remote tunnel end-point address */ @@ -94,7 +94,7 @@ Signed-off-by: Steven Barth } static int ip6_tnl_dev_init(struct net_device *dev); -@@ -230,20 +230,29 @@ EXPORT_SYMBOL_GPL(ip6_tnl_dst_init); +@@ -139,20 +139,29 @@ static struct net_device_stats *ip6_get_ static struct ip6_tnl * ip6_tnl_lookup(struct net *net, const struct in6_addr *remote, const struct in6_addr *local) { @@ -129,7 +129,7 @@ Signed-off-by: Steven Barth for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { if (ipv6_addr_equal(local, &t->parms.laddr) && ipv6_addr_any(&t->parms.raddr) && -@@ -251,7 +260,7 @@ ip6_tnl_lookup(struct net *net, const st +@@ -160,7 +169,7 @@ ip6_tnl_lookup(struct net *net, const st return t; } @@ -138,7 +138,7 @@ Signed-off-by: Steven Barth for_each_ip6_tunnel_rcu(ip6n->tnls_r_l[hash]) { if (ipv6_addr_equal(remote, &t->parms.raddr) && ipv6_addr_any(&t->parms.laddr) && -@@ -287,7 +296,7 @@ ip6_tnl_bucket(struct ip6_tnl_net *ip6n, +@@ -196,7 +205,7 @@ ip6_tnl_bucket(struct ip6_tnl_net *ip6n, if (!ipv6_addr_any(remote) || !ipv6_addr_any(local)) { prio = 1; @@ -147,7 +147,7 @@ Signed-off-by: Steven Barth } return &ip6n->tnls[prio][h]; } -@@ -460,6 +469,12 @@ ip6_tnl_dev_uninit(struct net_device *de +@@ -369,6 +378,12 @@ ip6_tnl_dev_uninit(struct net_device *de struct net *net = t->net; struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); @@ -160,7 +160,7 @@ Signed-off-by: Steven Barth if (dev == ip6n->fb_tnl_dev) RCU_INIT_POINTER(ip6n->tnls_wc[0], NULL); else -@@ -856,6 +871,108 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t, +@@ -765,6 +780,108 @@ int ip6_tnl_rcv_ctl(struct ip6_tnl *t, } EXPORT_SYMBOL_GPL(ip6_tnl_rcv_ctl); @@ -269,7 +269,7 @@ Signed-off-by: Steven Barth /** * ip6_tnl_rcv - decapsulate IPv6 packet and retransmit it locally * @skb: received socket buffer -@@ -901,6 +1018,26 @@ static int ip6_tnl_rcv(struct sk_buff *s +@@ -810,6 +927,26 @@ static int ip6_tnl_rcv(struct sk_buff *s skb_reset_network_header(skb); skb->protocol = htons(protocol); memset(skb->cb, 0, sizeof(struct inet6_skb_parm)); @@ -296,7 +296,7 @@ Signed-off-by: Steven Barth __skb_tunnel_rx(skb, t->dev, t->net); -@@ -1248,6 +1385,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str +@@ -1145,6 +1282,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str __u32 mtu; u8 tproto; int err; @@ -304,7 +304,7 @@ Signed-off-by: Steven Barth tproto = ACCESS_ONCE(t->parms.proto); if ((tproto != IPPROTO_IPV6 && tproto != 0) || -@@ -1278,6 +1416,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str +@@ -1175,6 +1313,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str if (t->parms.flags & IP6_TNL_F_USE_ORIG_FWMARK) fl6.flowi6_mark = skb->mark; @@ -323,7 +323,7 @@ Signed-off-by: Steven Barth err = ip6_tnl_xmit2(skb, dev, dsfield, &fl6, encap_limit, &mtu); if (err != 0) { if (err == -EMSGSIZE) -@@ -1392,6 +1542,14 @@ ip6_tnl_change(struct ip6_tnl *t, const +@@ -1289,6 +1439,14 @@ ip6_tnl_change(struct ip6_tnl *t, const t->parms.flowinfo = p->flowinfo; t->parms.link = p->link; t->parms.proto = p->proto; @@ -335,10 +335,10 @@ Signed-off-by: Steven Barth + } + t->parms.fmrs = p->fmrs; + - ip6_tnl_dst_reset(t); + dst_cache_reset(&t->dst_cache); ip6_tnl_link_config(t); return 0; -@@ -1430,6 +1588,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ +@@ -1327,6 +1485,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ p->flowinfo = u->flowinfo; p->link = u->link; p->proto = u->proto; @@ -346,7 +346,7 @@ Signed-off-by: Steven Barth memcpy(p->name, u->name, sizeof(u->name)); } -@@ -1725,6 +1884,15 @@ static int ip6_tnl_validate(struct nlatt +@@ -1622,6 +1781,15 @@ static int ip6_tnl_validate(struct nlatt return 0; } @@ -362,7 +362,7 @@ Signed-off-by: Steven Barth static void ip6_tnl_netlink_parms(struct nlattr *data[], struct __ip6_tnl_parm *parms) { -@@ -1756,6 +1924,46 @@ static void ip6_tnl_netlink_parms(struct +@@ -1653,6 +1821,46 @@ static void ip6_tnl_netlink_parms(struct if (data[IFLA_IPTUN_PROTO]) parms->proto = nla_get_u8(data[IFLA_IPTUN_PROTO]); @@ -409,7 +409,7 @@ Signed-off-by: Steven Barth } static int ip6_tnl_newlink(struct net *src_net, struct net_device *dev, -@@ -1808,6 +2016,12 @@ static void ip6_tnl_dellink(struct net_d +@@ -1705,6 +1913,12 @@ static void ip6_tnl_dellink(struct net_d static size_t ip6_tnl_get_size(const struct net_device *dev) { @@ -422,7 +422,7 @@ Signed-off-by: Steven Barth return /* IFLA_IPTUN_LINK */ nla_total_size(4) + -@@ -1825,6 +2039,24 @@ static size_t ip6_tnl_get_size(const str +@@ -1722,6 +1936,24 @@ static size_t ip6_tnl_get_size(const str nla_total_size(4) + /* IFLA_IPTUN_PROTO */ nla_total_size(1) + @@ -447,7 +447,7 @@ Signed-off-by: Steven Barth 0; } -@@ -1832,6 +2064,9 @@ static int ip6_tnl_fill_info(struct sk_b +@@ -1729,6 +1961,9 @@ static int ip6_tnl_fill_info(struct sk_b { struct ip6_tnl *tunnel = netdev_priv(dev); struct __ip6_tnl_parm *parm = &tunnel->parms; @@ -457,7 +457,7 @@ Signed-off-by: Steven Barth if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) || nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) || -@@ -1840,8 +2075,27 @@ static int ip6_tnl_fill_info(struct sk_b +@@ -1737,8 +1972,27 @@ static int ip6_tnl_fill_info(struct sk_b nla_put_u8(skb, IFLA_IPTUN_ENCAP_LIMIT, parm->encap_limit) || nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) || nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) || @@ -486,7 +486,7 @@ Signed-off-by: Steven Barth return 0; nla_put_failure: -@@ -1865,6 +2119,7 @@ static const struct nla_policy ip6_tnl_p +@@ -1762,6 +2016,7 @@ static const struct nla_policy ip6_tnl_p [IFLA_IPTUN_FLOWINFO] = { .type = NLA_U32 }, [IFLA_IPTUN_FLAGS] = { .type = NLA_U32 }, [IFLA_IPTUN_PROTO] = { .type = NLA_U8 }, diff --git a/target/linux/generic/pending-4.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-4.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index 4bf34c128..c921a079a 100644 --- a/target/linux/generic/pending-4.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-4.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -143,7 +143,7 @@ Signed-off-by: Jonas Gorski static const struct rt6_info ip6_blk_hole_entry_template = { .dst = { .__refcnt = ATOMIC_INIT(1), -@@ -1898,6 +1915,11 @@ static struct rt6_info *ip6_route_info_c +@@ -1899,6 +1916,11 @@ static struct rt6_info *ip6_route_info_c rt->dst.output = ip6_pkt_prohibit_out; rt->dst.input = ip6_pkt_prohibit; break; @@ -155,7 +155,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -2501,6 +2523,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -2502,6 +2524,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -173,7 +173,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -2743,7 +2776,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -2744,7 +2777,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -183,7 +183,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -3096,6 +3130,9 @@ static int rt6_fill_node(struct net *net +@@ -3097,6 +3131,9 @@ static int rt6_fill_node(struct net *net case -EACCES: rtm->rtm_type = RTN_PROHIBIT; break; @@ -193,7 +193,7 @@ Signed-off-by: Jonas Gorski case -EAGAIN: rtm->rtm_type = RTN_THROW; break; -@@ -3375,6 +3412,8 @@ static int ip6_route_dev_notify(struct n +@@ -3376,6 +3413,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -3601,6 +3640,17 @@ static int __net_init ip6_route_net_init +@@ -3602,6 +3641,17 @@ static int __net_init ip6_route_net_init net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); @@ -220,7 +220,7 @@ Signed-off-by: Jonas Gorski #endif net->ipv6.sysctl.flush_delay = 0; -@@ -3619,6 +3669,8 @@ out: +@@ -3620,6 +3670,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -229,7 +229,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -3636,6 +3688,7 @@ static void __net_exit ip6_route_net_exi +@@ -3637,6 +3689,7 @@ static void __net_exit ip6_route_net_exi #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); kfree(net->ipv6.ip6_blk_hole_entry); @@ -237,7 +237,7 @@ Signed-off-by: Jonas Gorski #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); } -@@ -3709,6 +3762,9 @@ void __init ip6_route_init_special_entri +@@ -3710,6 +3763,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-4.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-4.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch index d91db1fe7..bfe76dbc1 100644 --- a/target/linux/generic/pending-4.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ b/target/linux/generic/pending-4.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch @@ -17,7 +17,7 @@ Signed-off-by: Felix Fietkau --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -4260,6 +4260,9 @@ static enum gro_result dev_gro_receive(s +@@ -4278,6 +4278,9 @@ static enum gro_result dev_gro_receive(s enum gro_result ret; int grow; @@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau if (!(skb->dev->features & NETIF_F_GRO)) goto normal; -@@ -5426,6 +5429,48 @@ static void __netdev_adjacent_dev_unlink +@@ -5444,6 +5447,48 @@ static void __netdev_adjacent_dev_unlink &upper_dev->adj_list.lower); } @@ -76,7 +76,7 @@ Signed-off-by: Felix Fietkau static int __netdev_upper_dev_link(struct net_device *dev, struct net_device *upper_dev, bool master, void *private) -@@ -5497,6 +5542,7 @@ static int __netdev_upper_dev_link(struc +@@ -5515,6 +5560,7 @@ static int __netdev_upper_dev_link(struc goto rollback_lower_mesh; } @@ -84,7 +84,7 @@ Signed-off-by: Felix Fietkau call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, dev, &changeupper_info.info); return 0; -@@ -5623,6 +5669,7 @@ void netdev_upper_dev_unlink(struct net_ +@@ -5641,6 +5687,7 @@ void netdev_upper_dev_unlink(struct net_ list_for_each_entry(i, &upper_dev->all_adj_list.upper, list) __netdev_adjacent_dev_unlink(dev, i->dev, i->ref_nr); @@ -92,7 +92,7 @@ Signed-off-by: Felix Fietkau call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, dev, &changeupper_info.info); } -@@ -6163,6 +6210,7 @@ int dev_set_mac_address(struct net_devic +@@ -6181,6 +6228,7 @@ int dev_set_mac_address(struct net_devic if (err) return err; dev->addr_assign_type = NET_ADDR_SET; diff --git a/target/linux/generic/pending-4.4/721-phy_packets.patch b/target/linux/generic/pending-4.4/721-phy_packets.patch index 716c1a027..39dc5ccbf 100644 --- a/target/linux/generic/pending-4.4/721-phy_packets.patch +++ b/target/linux/generic/pending-4.4/721-phy_packets.patch @@ -86,7 +86,7 @@ help --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -2747,10 +2747,20 @@ static int xmit_one(struct sk_buff *skb, +@@ -2754,10 +2754,20 @@ static int xmit_one(struct sk_buff *skb, if (!list_empty(&ptype_all) || !list_empty(&dev->ptype_all)) dev_queue_xmit_nit(skb, dev); diff --git a/target/linux/generic/pending-4.4/834-ledtrig-libata.patch b/target/linux/generic/pending-4.4/834-ledtrig-libata.patch index c3d187a09..ad6363447 100644 --- a/target/linux/generic/pending-4.4/834-ledtrig-libata.patch +++ b/target/linux/generic/pending-4.4/834-ledtrig-libata.patch @@ -69,7 +69,7 @@ Signed-off-by: Daniel Golle /** * ata_build_rw_tf - Build ATA taskfile for given read/write request * @tf: Target ATA taskfile -@@ -4780,6 +4793,9 @@ struct ata_queued_cmd *ata_qc_new_init(s +@@ -4781,6 +4794,9 @@ struct ata_queued_cmd *ata_qc_new_init(s if (tag < 0) return NULL; } @@ -79,7 +79,7 @@ Signed-off-by: Daniel Golle qc = __ata_qc_from_tag(ap, tag); qc->tag = tag; -@@ -5677,6 +5693,9 @@ struct ata_port *ata_port_alloc(struct a +@@ -5678,6 +5694,9 @@ struct ata_port *ata_port_alloc(struct a ap->stats.unhandled_irq = 1; ap->stats.idle_irq = 1; #endif @@ -89,7 +89,7 @@ Signed-off-by: Daniel Golle ata_sff_port_init(ap); return ap; -@@ -5698,6 +5717,12 @@ static void ata_host_release(struct devi +@@ -5699,6 +5718,12 @@ static void ata_host_release(struct devi kfree(ap->pmp_link); kfree(ap->slave_link); @@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle kfree(ap); host->ports[i] = NULL; } -@@ -6144,7 +6169,23 @@ int ata_host_register(struct ata_host *h +@@ -6145,7 +6170,23 @@ int ata_host_register(struct ata_host *h host->ports[i]->print_id = atomic_inc_return(&ata_print_id); host->ports[i]->local_port_no = i + 1; } diff --git a/target/linux/generic/pending-4.4/901-debloat_sock_diag.patch b/target/linux/generic/pending-4.4/901-debloat_sock_diag.patch index fa9f37b71..4733d1b79 100644 --- a/target/linux/generic/pending-4.4/901-debloat_sock_diag.patch +++ b/target/linux/generic/pending-4.4/901-debloat_sock_diag.patch @@ -39,7 +39,7 @@ --- a/net/ipv4/Kconfig +++ b/net/ipv4/Kconfig -@@ -414,6 +414,7 @@ config INET_LRO +@@ -415,6 +415,7 @@ config INET_LRO config INET_DIAG tristate "INET: socket monitoring interface" diff --git a/target/linux/generic/pending-4.4/902-debloat_proc.patch b/target/linux/generic/pending-4.4/902-debloat_proc.patch index 4f874e598..2fe048944 100644 --- a/target/linux/generic/pending-4.4/902-debloat_proc.patch +++ b/target/linux/generic/pending-4.4/902-debloat_proc.patch @@ -239,7 +239,7 @@ --- a/net/ipv4/route.c +++ b/net/ipv4/route.c -@@ -420,6 +420,9 @@ static struct pernet_operations ip_rt_pr +@@ -423,6 +423,9 @@ static struct pernet_operations ip_rt_pr static int __init ip_rt_proc_init(void) { @@ -251,7 +251,7 @@ --- a/ipc/msg.c +++ b/ipc/msg.c -@@ -1068,6 +1068,9 @@ void __init msg_init(void) +@@ -1071,6 +1071,9 @@ void __init msg_init(void) { msg_init_ns(&init_ipc_ns); diff --git a/target/linux/generic/pending-4.4/995-mangle_bootargs.patch b/target/linux/generic/pending-4.4/995-mangle_bootargs.patch index e008dd909..821370350 100644 --- a/target/linux/generic/pending-4.4/995-mangle_bootargs.patch +++ b/target/linux/generic/pending-4.4/995-mangle_bootargs.patch @@ -40,7 +40,7 @@ setup_per_cpu_areas(); --- a/init/Kconfig +++ b/init/Kconfig -@@ -1648,6 +1648,15 @@ config EMBEDDED +@@ -1655,6 +1655,15 @@ config EMBEDDED an embedded system so certain expert options are available for configuration. diff --git a/target/linux/generic/pending-4.9/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-4.9/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch index 794280eec..adae2e049 100644 --- a/target/linux/generic/pending-4.9/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch +++ b/target/linux/generic/pending-4.9/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch @@ -71,7 +71,7 @@ Signed-off-by: Tobias Wolf --- a/mm/page_alloc.c +++ b/mm/page_alloc.c -@@ -5923,7 +5923,7 @@ static void __ref alloc_node_mem_map(str +@@ -5918,7 +5918,7 @@ static void __ref alloc_node_mem_map(str mem_map = NODE_DATA(0)->node_mem_map; #if defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP) || defined(CONFIG_FLATMEM) if (page_to_pfn(mem_map) != pgdat->node_start_pfn) diff --git a/target/linux/generic/pending-4.9/142-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch b/target/linux/generic/pending-4.9/142-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch new file mode 100644 index 000000000..60c8ecbdc --- /dev/null +++ b/target/linux/generic/pending-4.9/142-mtd-bcm47xxpart-improve-handling-TRX-partition-size.patch @@ -0,0 +1,65 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Subject: [PATCH] mtd: bcm47xxpart: improve handling TRX partition size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +When bcm47xxpart finds a TRX partition (container) it's supposed to jump +to the end of it and keep looking for more partitions. TRX and its +subpartitions are handled be a separated parser. + +The problem with old code was relying on the length specified in a TRX +header. That isn't reliable as TRX is commonly modified to have checksum +cover only non-changing subpartitions. Otherwise modifying e.g. a rootfs +would result in CRC32 mismatch and bootloader refusing to boot a +firmware. + +Fix it by trying better to figure out a real TRX size. We can securely +assume that TRX has to cover all subpartitions and the last one is at +least of a block size in size. Then compare it with a length field. + +This makes code more optimal & reliable thanks to skipping data that +shouldn't be parsed. + +Signed-off-by: Rafał Miłecki +--- + +--- a/drivers/mtd/bcm47xxpart.c ++++ b/drivers/mtd/bcm47xxpart.c +@@ -186,6 +186,8 @@ static int bcm47xxpart_parse(struct mtd_ + /* TRX */ + if (buf[0x000 / 4] == TRX_MAGIC) { + struct trx_header *trx; ++ uint32_t last_subpart; ++ uint32_t trx_size; + + if (trx_num >= ARRAY_SIZE(trx_parts)) + pr_warn("No enough space to store another TRX found at 0x%X\n", +@@ -195,11 +197,23 @@ static int bcm47xxpart_parse(struct mtd_ + bcm47xxpart_add_part(&parts[curr_part++], "firmware", + offset, 0); + +- /* Jump to the end of TRX */ ++ /* ++ * Try to find TRX size. The "length" field isn't fully ++ * reliable as it could be decreased to make CRC32 cover ++ * only part of TRX data. It's commonly used as checksum ++ * can't cover e.g. ever-changing rootfs partition. ++ * Use offsets as helpers for assuming min TRX size. ++ */ + trx = (struct trx_header *)buf; +- offset = roundup(offset + trx->length, blocksize); +- /* Next loop iteration will increase the offset */ +- offset -= blocksize; ++ last_subpart = max3(trx->offset[0], trx->offset[1], ++ trx->offset[2]); ++ trx_size = max(trx->length, last_subpart + blocksize); ++ ++ /* ++ * Skip the TRX data. Decrease offset by block size as ++ * the next loop iteration will increase it. ++ */ ++ offset += roundup(trx_size, blocksize) - blocksize; + continue; + } + diff --git a/target/linux/generic/pending-4.9/160-mtd-part-add-generic-parsing-of-linux-part-probe.patch b/target/linux/generic/pending-4.9/161-mtd-part-add-generic-parsing-of-linux-part-probe.patch similarity index 94% rename from target/linux/generic/pending-4.9/160-mtd-part-add-generic-parsing-of-linux-part-probe.patch rename to target/linux/generic/pending-4.9/161-mtd-part-add-generic-parsing-of-linux-part-probe.patch index 6c2e2602e..5f0fa3a41 100644 --- a/target/linux/generic/pending-4.9/160-mtd-part-add-generic-parsing-of-linux-part-probe.patch +++ b/target/linux/generic/pending-4.9/161-mtd-part-add-generic-parsing-of-linux-part-probe.patch @@ -157,9 +157,9 @@ Signed-off-by: Hauke Mehrtens * Do not forget to update 'parse_mtd_partitions()' kerneldoc comment if you * are changing this array! */ -@@ -955,6 +992,13 @@ int parse_mtd_partitions(struct mtd_info - struct property *prop; - const char *compat; +@@ -999,6 +1036,13 @@ int parse_mtd_partitions(struct mtd_info + { + struct mtd_part_parser *parser; int ret, err = 0; + const char *const *types_of = NULL; + @@ -169,9 +169,9 @@ Signed-off-by: Hauke Mehrtens + types = types_of; + } - np = of_get_child_by_name(mtd_get_of_node(master), "partitions"); - of_property_for_each_string(np, "compatible", prop, compat) { -@@ -996,6 +1040,7 @@ int parse_mtd_partitions(struct mtd_info + if (!types) + types = default_mtd_part_types; +@@ -1035,6 +1079,7 @@ int parse_mtd_partitions(struct mtd_info if (ret < 0 && !err) err = ret; } diff --git a/target/linux/generic/pending-4.9/181-net-usb-add-lte-modem-wistron-neweb-d18q1.patch b/target/linux/generic/pending-4.9/181-net-usb-add-lte-modem-wistron-neweb-d18q1.patch new file mode 100644 index 000000000..3ec5d7518 --- /dev/null +++ b/target/linux/generic/pending-4.9/181-net-usb-add-lte-modem-wistron-neweb-d18q1.patch @@ -0,0 +1,61 @@ +From d4c4bc11353f3bea6754f7d21e3612c9f32d1d64 Mon Sep 17 00:00:00 2001 +From: Giuseppe Lippolis +Date: Mon, 26 Mar 2018 16:34:39 +0200 +Subject: [PATCH] net-usb: add qmi_wwan if on lte modem wistron neweb d18q1 + +This modem is embedded on dlink dwr-921 router. + The oem configuration states: + + T: Bus=02 Lev=01 Prnt=01 Port=00 Cnt=01 Dev#= 2 Spd=480 MxCh= 0 + D: Ver= 2.00 Cls=00(>ifc ) Sub=00 Prot=00 MxPS=64 #Cfgs= 1 + P: Vendor=1435 ProdID=0918 Rev= 2.32 + S: Manufacturer=Android + S: Product=Android + S: SerialNumber=0123456789ABCDEF + C:* #Ifs= 7 Cfg#= 1 Atr=80 MxPwr=500mA + I:* If#= 0 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=option + E: Ad=81(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms + E: Ad=01(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms + I:* If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=42 Prot=01 Driver=(none) + E: Ad=82(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms + E: Ad=02(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms + I:* If#= 2 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=00 Prot=00 Driver=option + E: Ad=84(I) Atr=03(Int.) MxPS= 64 Ivl=32ms + E: Ad=83(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms + E: Ad=03(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms + I:* If#= 3 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan + E: Ad=86(I) Atr=03(Int.) MxPS= 64 Ivl=32ms + E: Ad=85(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms + E: Ad=04(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms + I:* If#= 4 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan + E: Ad=88(I) Atr=03(Int.) MxPS= 64 Ivl=32ms + E: Ad=87(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms + E: Ad=05(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms + I:* If#= 5 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=ff Prot=ff Driver=qmi_wwan + E: Ad=8a(I) Atr=03(Int.) MxPS= 64 Ivl=32ms + E: Ad=89(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms + E: Ad=06(O) Atr=02(Bulk) MxPS= 512 Ivl=0ms + I:* If#= 6 Alt= 0 #EPs= 2 Cls=08(stor.) Sub=06 Prot=50 Driver=(none) + E: Ad=8b(I) Atr=02(Bulk) MxPS= 512 Ivl=0ms + E: Ad=07(O) Atr=02(Bulk) MxPS= 512 Ivl=125us + +Tested on openwrt distribution + +Signed-off-by: Giuseppe Lippolis +Signed-off-by: David S. Miller +--- + drivers/net/usb/qmi_wwan.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/net/usb/qmi_wwan.c ++++ b/drivers/net/usb/qmi_wwan.c +@@ -809,6 +809,9 @@ static const struct usb_device_id produc + {QMI_FIXED_INTF(0x0846, 0x68a2, 8)}, + {QMI_FIXED_INTF(0x12d1, 0x140c, 1)}, /* Huawei E173 */ + {QMI_FIXED_INTF(0x12d1, 0x14ac, 1)}, /* Huawei E1820 */ ++ {QMI_FIXED_INTF(0x1435, 0xd181, 3)}, /* Wistron NeWeb D18Q1 */ ++ {QMI_FIXED_INTF(0x1435, 0xd181, 4)}, /* Wistron NeWeb D18Q1 */ ++ {QMI_FIXED_INTF(0x1435, 0xd181, 5)}, /* Wistron NeWeb D18Q1 */ + {QMI_FIXED_INTF(0x16d8, 0x6003, 0)}, /* CMOTech 6003 */ + {QMI_FIXED_INTF(0x16d8, 0x6007, 0)}, /* CMOTech CHE-628S */ + {QMI_FIXED_INTF(0x16d8, 0x6008, 0)}, /* CMOTech CMU-301 */ diff --git a/target/linux/generic/pending-4.9/182-net-qmi_wwan-add-BroadMobi-BM806U-2020-2033.patch b/target/linux/generic/pending-4.9/182-net-qmi_wwan-add-BroadMobi-BM806U-2020-2033.patch new file mode 100644 index 000000000..9d9bb4ce1 --- /dev/null +++ b/target/linux/generic/pending-4.9/182-net-qmi_wwan-add-BroadMobi-BM806U-2020-2033.patch @@ -0,0 +1,28 @@ +From 743989254ea9f132517806d8893ca9b6cf9dc86b Mon Sep 17 00:00:00 2001 +From: Pawel Dembicki +Date: Sat, 24 Mar 2018 22:08:14 +0100 +Subject: [PATCH] net: qmi_wwan: add BroadMobi BM806U 2020:2033 + +BroadMobi BM806U is an Qualcomm MDM9225 based 3G/4G modem. +Tested hardware BM806U is mounted on D-Link DWR-921-C3 router. +The USB id is added to qmi_wwan.c to allow QMI communication with +the BM806U. + +Tested on 4.14 kernel and OpenWRT. + +Signed-off-by: Pawel Dembicki +Signed-off-by: David S. Miller +--- + drivers/net/usb/qmi_wwan.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/usb/qmi_wwan.c ++++ b/drivers/net/usb/qmi_wwan.c +@@ -888,6 +888,7 @@ static const struct usb_device_id produc + {QMI_FIXED_INTF(0x19d2, 0x2002, 4)}, /* ZTE (Vodafone) K3765-Z */ + {QMI_FIXED_INTF(0x2001, 0x7e19, 4)}, /* D-Link DWM-221 B1 */ + {QMI_FIXED_INTF(0x2001, 0x7e35, 4)}, /* D-Link DWM-222 */ ++ {QMI_FIXED_INTF(0x2020, 0x2033, 4)}, /* BroadMobi BM806U */ + {QMI_FIXED_INTF(0x0f3d, 0x68a2, 8)}, /* Sierra Wireless MC7700 */ + {QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */ + {QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */ diff --git a/target/linux/generic/pending-4.9/190-2-5-e1000e-Fix-wrong-comment-related-to-link-detection.patch b/target/linux/generic/pending-4.9/190-2-5-e1000e-Fix-wrong-comment-related-to-link-detection.patch index f980bb080..c8258e5cb 100644 --- a/target/linux/generic/pending-4.9/190-2-5-e1000e-Fix-wrong-comment-related-to-link-detection.patch +++ b/target/linux/generic/pending-4.9/190-2-5-e1000e-Fix-wrong-comment-related-to-link-detection.patch @@ -23,7 +23,7 @@ Tested-by: Aaron Brown --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c -@@ -5066,7 +5066,7 @@ static bool e1000e_has_link(struct e1000 +@@ -5072,7 +5072,7 @@ static bool e1000e_has_link(struct e1000 /* get_link_status is set on LSC (link status) interrupt or * Rx sequence error interrupt. get_link_status will stay @@ -32,7 +32,7 @@ Tested-by: Aaron Brown * for copper adapters ONLY */ switch (hw->phy.media_type) { -@@ -5084,7 +5084,7 @@ static bool e1000e_has_link(struct e1000 +@@ -5090,7 +5090,7 @@ static bool e1000e_has_link(struct e1000 break; case e1000_media_type_internal_serdes: ret_val = hw->mac.ops.check_for_link(hw); diff --git a/target/linux/generic/pending-4.9/201-extra_optimization.patch b/target/linux/generic/pending-4.9/201-extra_optimization.patch index 6a8467a8b..2da816e4e 100644 --- a/target/linux/generic/pending-4.9/201-extra_optimization.patch +++ b/target/linux/generic/pending-4.9/201-extra_optimization.patch @@ -14,7 +14,7 @@ Signed-off-by: Felix Fietkau --- a/Makefile +++ b/Makefile -@@ -640,12 +640,12 @@ KBUILD_CFLAGS += $(call cc-option,-fdata +@@ -642,12 +642,12 @@ KBUILD_CFLAGS += $(call cc-option,-fdata endif ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE diff --git a/target/linux/generic/pending-4.9/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch b/target/linux/generic/pending-4.9/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch deleted file mode 100644 index 9c30fa81b..000000000 --- a/target/linux/generic/pending-4.9/270-uapi-kernel.h-glibc-specific-inclusion-of-sysinfo.h.patch +++ /dev/null @@ -1,32 +0,0 @@ -From: David Heidelberger -Subject: uapi/kernel.h: glibc specific inclusion of sysinfo.h - -including sysinfo.h from kernel.h makes no sense whatsoever, -but removing it breaks glibc's userspace header, -which includes kernel.h instead of sysinfo.h from their sys/sysinfo.h. -this seems to be a historical mistake. -on musl, including any header that uses kernel.h directly or indirectly -plus sys/sysinfo.h will produce a compile error due to redefinition of -struct sysinfo from sys/sysinfo.h. -so for now, only include it on glibc or when including from kernel -in order not to break their headers. - -Signed-off-by: John Spencer -Signed-off-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/kernel.h | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/include/uapi/linux/kernel.h -+++ b/include/uapi/linux/kernel.h -@@ -1,7 +1,9 @@ - #ifndef _UAPI_LINUX_KERNEL_H - #define _UAPI_LINUX_KERNEL_H - -+#if defined(__KERNEL__) || defined( __GLIBC__) - #include -+#endif - - /* - * 'kernel.h' contains some often-used function prototypes etc diff --git a/target/linux/generic/pending-4.9/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch b/target/linux/generic/pending-4.9/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch deleted file mode 100644 index a4aa1567e..000000000 --- a/target/linux/generic/pending-4.9/271-uapi-libc-compat.h-do-not-rely-on-__GLIBC__.patch +++ /dev/null @@ -1,105 +0,0 @@ -From: David Heidelberger -Subject: uapi/libc-compat.h: do not rely on __GLIBC__ - -Musl provides the same structs as glibc, but does not provide a define to -allow its detection. Since the absence of __GLIBC__ also can mean that it -is included from the kernel, change the __GLIBC__ detection to -!__KERNEL__, which should always be true when included from userspace. - -Signed-off-by: John Spencer -Tested-by: David Heidelberger -Signed-off-by: Jonas Gorski ---- - include/uapi/linux/libc-compat.h | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - ---- a/include/uapi/linux/libc-compat.h -+++ b/include/uapi/linux/libc-compat.h -@@ -48,13 +48,13 @@ - #ifndef _UAPI_LIBC_COMPAT_H - #define _UAPI_LIBC_COMPAT_H - --/* We have included glibc headers... */ --#if defined(__GLIBC__) -+/* We have included libc headers... */ -+#if !defined(__KERNEL__) - --/* Coordinate with glibc net/if.h header. */ --#if defined(_NET_IF_H) && defined(__USE_MISC) -+/* Coordinate with libc net/if.h header. */ -+#if defined(_NET_IF_H) && (!defined(__GLIBC__) || defined(__USE_MISC)) - --/* GLIBC headers included first so don't define anything -+/* LIBC headers included first so don't define anything - * that would already be defined. */ - - #define __UAPI_DEF_IF_IFCONF 0 -@@ -65,7 +65,11 @@ - #define __UAPI_DEF_IF_NET_DEVICE_FLAGS 0 - /* For the future if glibc adds IFF_LOWER_UP, IFF_DORMANT and IFF_ECHO */ - #ifndef __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO -+#ifdef __GLIBC__ - #define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 1 -+#else -+#define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 0 -+#endif - #endif /* __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO */ - - #else /* _NET_IF_H */ -@@ -85,10 +89,10 @@ - - #endif /* _NET_IF_H */ - --/* Coordinate with glibc netinet/in.h header. */ -+/* Coordinate with libc netinet/in.h header. */ - #if defined(_NETINET_IN_H) - --/* GLIBC headers included first so don't define anything -+/* LIBC headers included first so don't define anything - * that would already be defined. */ - #define __UAPI_DEF_IN_ADDR 0 - #define __UAPI_DEF_IN_IPPROTO 0 -@@ -102,7 +106,7 @@ - * if the glibc code didn't define them. This guard matches - * the guard in glibc/inet/netinet/in.h which defines the - * additional in6_addr macros e.g. s6_addr16, and s6_addr32. */ --#if defined(__USE_MISC) || defined (__USE_GNU) -+#if !defined(__GLIBC__) || defined(__USE_MISC) || defined (__USE_GNU) - #define __UAPI_DEF_IN6_ADDR_ALT 0 - #else - #define __UAPI_DEF_IN6_ADDR_ALT 1 -@@ -117,7 +121,7 @@ - #else - - /* Linux headers included first, and we must define everything -- * we need. The expectation is that glibc will check the -+ * we need. The expectation is that the libc will check the - * __UAPI_DEF_* defines and adjust appropriately. */ - #define __UAPI_DEF_IN_ADDR 1 - #define __UAPI_DEF_IN_IPPROTO 1 -@@ -127,7 +131,7 @@ - #define __UAPI_DEF_IN_CLASS 1 - - #define __UAPI_DEF_IN6_ADDR 1 --/* We unconditionally define the in6_addr macros and glibc must -+/* We unconditionally define the in6_addr macros and the libc must - * coordinate. */ - #define __UAPI_DEF_IN6_ADDR_ALT 1 - #define __UAPI_DEF_SOCKADDR_IN6 1 -@@ -168,7 +172,7 @@ - /* If we did not see any headers from any supported C libraries, - * or we are being included in the kernel, then define everything - * that we need. */ --#else /* !defined(__GLIBC__) */ -+#else /* defined(__KERNEL__) */ - - /* Definitions for if.h */ - #define __UAPI_DEF_IF_IFCONF 1 -@@ -208,6 +212,6 @@ - /* Definitions for xattr.h */ - #define __UAPI_DEF_XATTR 1 - --#endif /* __GLIBC__ */ -+#endif /* __KERNEL__ */ - - #endif /* _UAPI_LIBC_COMPAT_H */ diff --git a/target/linux/generic/pending-4.9/401-mtd-add-support-for-different-partition-parser-types.patch b/target/linux/generic/pending-4.9/401-mtd-add-support-for-different-partition-parser-types.patch index 66c499d3e..54cfcb0c3 100644 --- a/target/linux/generic/pending-4.9/401-mtd-add-support-for-different-partition-parser-types.patch +++ b/target/linux/generic/pending-4.9/401-mtd-add-support-for-different-partition-parser-types.patch @@ -9,7 +9,7 @@ Signed-off-by: Gabor Juhos --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c -@@ -1095,6 +1095,62 @@ void mtd_part_parser_cleanup(struct mtd_ +@@ -1134,6 +1134,62 @@ void mtd_part_parser_cleanup(struct mtd_ } } diff --git a/target/linux/generic/pending-4.9/404-mtd-add-more-helper-functions.patch b/target/linux/generic/pending-4.9/404-mtd-add-more-helper-functions.patch index 0ec5540d0..a08f46c31 100644 --- a/target/linux/generic/pending-4.9/404-mtd-add-more-helper-functions.patch +++ b/target/linux/generic/pending-4.9/404-mtd-add-more-helper-functions.patch @@ -29,7 +29,7 @@ Signed-off-by: Gabor Juhos #ifdef CONFIG_MTD_SPLIT_FIRMWARE_NAME #define SPLIT_FIRMWARE_NAME CONFIG_MTD_SPLIT_FIRMWARE_NAME #else -@@ -1205,6 +1216,24 @@ int mtd_is_partition(const struct mtd_in +@@ -1244,6 +1255,24 @@ int mtd_is_partition(const struct mtd_in } EXPORT_SYMBOL_GPL(mtd_is_partition); diff --git a/target/linux/generic/pending-4.9/450-mtd-m25p80-allow-fallback-from-spi_flash_read-to-reg.patch b/target/linux/generic/pending-4.9/450-mtd-m25p80-allow-fallback-from-spi_flash_read-to-reg.patch new file mode 100644 index 000000000..feaf8cb25 --- /dev/null +++ b/target/linux/generic/pending-4.9/450-mtd-m25p80-allow-fallback-from-spi_flash_read-to-reg.patch @@ -0,0 +1,36 @@ +From: Felix Fietkau +Date: Fri, 23 Feb 2018 17:12:16 +0100 +Subject: [PATCH] mtd: m25p80: allow fallback from spi_flash_read to regular + SPI transfer + +Some flash controllers, e.g. on the ath79 platform can support a fast +flash read via memory mapping, but only if the flash chip is in +3-byte address mode. + +Since spi_flash_read_supported does not have access to the same data as +spi_flash_read, the driver can't detect an unsupported call until m25p80 +has decided to use spi_flash_read. + +Allow the driver to indicate a fallback to a regular SPI transfer by +returning -EOPNOTSUPP + +Signed-off-by: Felix Fietkau +--- + +--- a/drivers/mtd/devices/m25p80.c ++++ b/drivers/mtd/devices/m25p80.c +@@ -155,9 +155,11 @@ static ssize_t m25p80_read(struct spi_no + msg.data_nbits = m25p80_rx_nbits(nor); + + ret = spi_flash_read(spi, &msg); +- if (ret < 0) +- return ret; +- return msg.retlen; ++ if (ret != -EOPNOTSUPP) { ++ if (ret < 0) ++ return ret; ++ return msg.retlen; ++ } + } + + spi_message_init(&m); diff --git a/target/linux/generic/pending-4.9/478-mtd-spi-nor-Add-support-for-XM25QH64A-and-XM25QH128A.patch b/target/linux/generic/pending-4.9/478-mtd-spi-nor-Add-support-for-XM25QH64A-and-XM25QH128A.patch new file mode 100644 index 000000000..585d67881 --- /dev/null +++ b/target/linux/generic/pending-4.9/478-mtd-spi-nor-Add-support-for-XM25QH64A-and-XM25QH128A.patch @@ -0,0 +1,30 @@ +From b02f3405c935a28200db26b63e42086057565cf4 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Sat, 31 Mar 2018 20:09:54 +0200 +Subject: [PATCH] mtd: spi-nor: Add support for XM25QH64A and XM25QH128A + +These devices are produced by Wuhan Xinxin Semiconductor Manufacturing +Corp. (XMC) and found on some routers from Chinese manufactures. + +The data sheets can be found here: +http://www.xmcwh.com/Uploads/2018-03-01/5a9799e4cb355.pdf +http://www.xmcwh.com/Uploads/2018-02-05/5a77e6dbe968b.pdf + +Signed-off-by: Hauke Mehrtens +--- + drivers/mtd/spi-nor/spi-nor.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/mtd/spi-nor/spi-nor.c ++++ b/drivers/mtd/spi-nor/spi-nor.c +@@ -1166,6 +1166,10 @@ static const struct flash_info spi_nor_i + { "3S400AN", S3AN_INFO(0x1f2400, 256, 264) }, + { "3S700AN", S3AN_INFO(0x1f2500, 512, 264) }, + { "3S1400AN", S3AN_INFO(0x1f2600, 512, 528) }, ++ ++ /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ ++ { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++ { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { }, + }; + diff --git a/target/linux/generic/pending-4.9/491-ubi-auto-create-ubiblock-device-for-rootfs.patch b/target/linux/generic/pending-4.9/491-ubi-auto-create-ubiblock-device-for-rootfs.patch index 2e7933ba2..adc653ddc 100644 --- a/target/linux/generic/pending-4.9/491-ubi-auto-create-ubiblock-device-for-rootfs.patch +++ b/target/linux/generic/pending-4.9/491-ubi-auto-create-ubiblock-device-for-rootfs.patch @@ -8,7 +8,7 @@ Signed-off-by: Daniel Golle --- a/drivers/mtd/ubi/block.c +++ b/drivers/mtd/ubi/block.c -@@ -627,6 +627,44 @@ static void __init ubiblock_create_from_ +@@ -635,6 +635,44 @@ static void __init ubiblock_create_from_ } } @@ -53,7 +53,7 @@ Signed-off-by: Daniel Golle static void ubiblock_remove_all(void) { struct ubiblock *next; -@@ -657,6 +695,10 @@ int __init ubiblock_init(void) +@@ -667,6 +705,10 @@ int __init ubiblock_init(void) */ ubiblock_create_from_param(); diff --git a/target/linux/generic/pending-4.9/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch b/target/linux/generic/pending-4.9/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch index e41dca6c9..8b8bef264 100644 --- a/target/linux/generic/pending-4.9/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch +++ b/target/linux/generic/pending-4.9/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch @@ -17,9 +17,9 @@ Signed-off-by: Daniel Golle #include "ubi-media.h" #include "ubi.h" @@ -447,6 +448,15 @@ int ubiblock_create(struct ubi_volume_in - add_disk(dev->gd); dev_info(disk_to_dev(dev->gd), "created from ubi%d:%d(%s)", dev->ubi_num, dev->vol_id, vi->name); + mutex_unlock(&devices_mutex); + + if (!strcmp(vi->name, "rootfs") && + IS_ENABLED(CONFIG_MTD_ROOTFS_ROOT_DEV) && diff --git a/target/linux/generic/pending-4.9/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-4.9/610-netfilter_match_bypass_default_checks.patch index 6e653ef88..217d20ec5 100644 --- a/target/linux/generic/pending-4.9/610-netfilter_match_bypass_default_checks.patch +++ b/target/linux/generic/pending-4.9/610-netfilter_match_bypass_default_checks.patch @@ -59,16 +59,16 @@ Signed-off-by: Felix Fietkau static bool ip_checkentry(const struct ipt_ip *ip) { -@@ -545,6 +571,8 @@ find_check_entry(struct ipt_entry *e, st +@@ -550,6 +576,8 @@ find_check_entry(struct ipt_entry *e, st + struct xt_mtchk_param mtpar; struct xt_entry_match *ematch; - unsigned long pcnt; + ip_checkdefault(&e->ip); + - pcnt = xt_percpu_counter_alloc(); - if (IS_ERR_VALUE(pcnt)) + if (!xt_percpu_counter_alloc(alloc_state, &e->counters)) return -ENOMEM; -@@ -824,6 +852,7 @@ copy_entries_to_user(unsigned int total_ + +@@ -829,6 +857,7 @@ copy_entries_to_user(unsigned int total_ const struct xt_table_info *private = table->private; int ret = 0; const void *loc_cpu_entry; @@ -76,7 +76,7 @@ Signed-off-by: Felix Fietkau counters = alloc_counters(table); if (IS_ERR(counters)) -@@ -851,6 +880,14 @@ copy_entries_to_user(unsigned int total_ +@@ -856,6 +885,14 @@ copy_entries_to_user(unsigned int total_ goto free_counters; } @@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau for (i = sizeof(struct ipt_entry); i < e->target_offset; i += m->u.match_size) { -@@ -1240,12 +1277,15 @@ compat_copy_entry_to_user(struct ipt_ent +@@ -1245,12 +1282,15 @@ compat_copy_entry_to_user(struct ipt_ent compat_uint_t origsize; const struct xt_entry_match *ematch; int ret = 0; diff --git a/target/linux/generic/pending-4.9/620-net_sched-codel-do-not-defer-queue-length-update.patch b/target/linux/generic/pending-4.9/620-net_sched-codel-do-not-defer-queue-length-update.patch new file mode 100644 index 000000000..6fe863a9e --- /dev/null +++ b/target/linux/generic/pending-4.9/620-net_sched-codel-do-not-defer-queue-length-update.patch @@ -0,0 +1,86 @@ +From: Konstantin Khlebnikov +Date: Mon, 21 Aug 2017 11:14:14 +0300 +Subject: [PATCH] net_sched/codel: do not defer queue length update + +When codel wants to drop last packet in ->dequeue() it cannot call +qdisc_tree_reduce_backlog() right away - it will notify parent qdisc +about zero qlen and HTB/HFSC will deactivate class. The same class will +be deactivated second time by caller of ->dequeue(). Currently codel and +fq_codel defer update. This triggers warning in HFSC when it's qlen != 0 +but there is no active classes. + +This patch update parent queue length immediately: just temporary increase +qlen around qdisc_tree_reduce_backlog() to prevent first class deactivation +if we have skb to return. + +This might open another problem in HFSC - now operation peek could fail and +deactivate parent class. + +Signed-off-by: Konstantin Khlebnikov +Link: https://bugzilla.kernel.org/show_bug.cgi?id=109581 +--- + +--- a/net/sched/sch_codel.c ++++ b/net/sched/sch_codel.c +@@ -95,11 +95,17 @@ static struct sk_buff *codel_qdisc_deque + &q->stats, qdisc_pkt_len, codel_get_enqueue_time, + drop_func, dequeue_func); + +- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, +- * or HTB crashes. Defer it for next round. ++ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate ++ * parent class, dequeue in parent qdisc will do the same if we ++ * return skb. Temporary increment qlen if we have skb. + */ +- if (q->stats.drop_count && sch->q.qlen) { +- qdisc_tree_reduce_backlog(sch, q->stats.drop_count, q->stats.drop_len); ++ if (q->stats.drop_count) { ++ if (skb) ++ sch->q.qlen++; ++ qdisc_tree_reduce_backlog(sch, q->stats.drop_count, ++ q->stats.drop_len); ++ if (skb) ++ sch->q.qlen--; + q->stats.drop_count = 0; + q->stats.drop_len = 0; + } +--- a/net/sched/sch_fq_codel.c ++++ b/net/sched/sch_fq_codel.c +@@ -318,6 +318,21 @@ begin: + flow->dropped += q->cstats.drop_count - prev_drop_count; + flow->dropped += q->cstats.ecn_mark - prev_ecn_mark; + ++ /* If our qlen is 0 qdisc_tree_reduce_backlog() will deactivate ++ * parent class, dequeue in parent qdisc will do the same if we ++ * return skb. Temporary increment qlen if we have skb. ++ */ ++ if (q->cstats.drop_count) { ++ if (skb) ++ sch->q.qlen++; ++ qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, ++ q->cstats.drop_len); ++ if (skb) ++ sch->q.qlen--; ++ q->cstats.drop_count = 0; ++ q->cstats.drop_len = 0; ++ } ++ + if (!skb) { + /* force a pass through old_flows to prevent starvation */ + if ((head == &q->new_flows) && !list_empty(&q->old_flows)) +@@ -328,15 +343,6 @@ begin: + } + qdisc_bstats_update(sch, skb); + flow->deficit -= qdisc_pkt_len(skb); +- /* We cant call qdisc_tree_reduce_backlog() if our qlen is 0, +- * or HTB crashes. Defer it for next round. +- */ +- if (q->cstats.drop_count && sch->q.qlen) { +- qdisc_tree_reduce_backlog(sch, q->cstats.drop_count, +- q->cstats.drop_len); +- q->cstats.drop_count = 0; +- q->cstats.drop_len = 0; +- } + return skb; + } + diff --git a/target/linux/generic/pending-4.9/650-pppoe_header_pad.patch b/target/linux/generic/pending-4.9/650-pppoe_header_pad.patch deleted file mode 100644 index 3115073b5..000000000 --- a/target/linux/generic/pending-4.9/650-pppoe_header_pad.patch +++ /dev/null @@ -1,29 +0,0 @@ -From: Felix Fietkau -Subject: pppoe: add extra padding for the header (useful for drivers that need headroom) - -lede-commit 6517a757ec711fc3354b857e273e2621042f3c7a -Signed-off-by: Felix Fietkau ---- - drivers/net/ppp/pppoe.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/ppp/pppoe.c -+++ b/drivers/net/ppp/pppoe.c -@@ -861,7 +861,7 @@ static int pppoe_sendmsg(struct socket * - goto end; - - -- skb = sock_wmalloc(sk, total_len + dev->hard_header_len + 32, -+ skb = sock_wmalloc(sk, total_len + dev->hard_header_len + 32 + NET_SKB_PAD, - 0, GFP_KERNEL); - if (!skb) { - error = -ENOMEM; -@@ -869,7 +869,7 @@ static int pppoe_sendmsg(struct socket * - } - - /* Reserve space for headers. */ -- skb_reserve(skb, dev->hard_header_len); -+ skb_reserve(skb, dev->hard_header_len + NET_SKB_PAD); - skb_reset_network_header(skb); - - skb->dev = dev; diff --git a/target/linux/generic/pending-4.9/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch b/target/linux/generic/pending-4.9/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch index 0941b79b6..aeefcaf39 100644 --- a/target/linux/generic/pending-4.9/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch +++ b/target/linux/generic/pending-4.9/666-Add-support-for-MAP-E-FMRs-mesh-mode.patch @@ -300,7 +300,7 @@ Signed-off-by: Steven Barth /** * ip6_tnl_addr_conflict - compare packet addresses to tunnel's own * @t: the outgoing tunnel device -@@ -1287,6 +1427,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str +@@ -1292,6 +1432,7 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str { struct ip6_tnl *t = netdev_priv(dev); struct ipv6hdr *ipv6h = ipv6_hdr(skb); @@ -308,7 +308,7 @@ Signed-off-by: Steven Barth int encap_limit = -1; __u16 offset; struct flowi6 fl6; -@@ -1345,6 +1486,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str +@@ -1350,6 +1491,18 @@ ip6ip6_tnl_xmit(struct sk_buff *skb, str fl6.flowi6_mark = skb->mark; } @@ -327,7 +327,7 @@ Signed-off-by: Steven Barth if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6)) return -1; -@@ -1472,6 +1625,14 @@ ip6_tnl_change(struct ip6_tnl *t, const +@@ -1477,6 +1630,14 @@ ip6_tnl_change(struct ip6_tnl *t, const t->parms.flowinfo = p->flowinfo; t->parms.link = p->link; t->parms.proto = p->proto; @@ -342,7 +342,7 @@ Signed-off-by: Steven Barth dst_cache_reset(&t->dst_cache); ip6_tnl_link_config(t); return 0; -@@ -1510,6 +1671,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ +@@ -1515,6 +1676,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_ p->flowinfo = u->flowinfo; p->link = u->link; p->proto = u->proto; @@ -350,7 +350,7 @@ Signed-off-by: Steven Barth memcpy(p->name, u->name, sizeof(u->name)); } -@@ -1887,6 +2049,15 @@ static int ip6_tnl_validate(struct nlatt +@@ -1892,6 +2054,15 @@ static int ip6_tnl_validate(struct nlatt return 0; } @@ -366,7 +366,7 @@ Signed-off-by: Steven Barth static void ip6_tnl_netlink_parms(struct nlattr *data[], struct __ip6_tnl_parm *parms) { -@@ -1921,6 +2092,46 @@ static void ip6_tnl_netlink_parms(struct +@@ -1926,6 +2097,46 @@ static void ip6_tnl_netlink_parms(struct if (data[IFLA_IPTUN_COLLECT_METADATA]) parms->collect_md = true; @@ -413,7 +413,7 @@ Signed-off-by: Steven Barth } static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[], -@@ -2030,6 +2241,12 @@ static void ip6_tnl_dellink(struct net_d +@@ -2035,6 +2246,12 @@ static void ip6_tnl_dellink(struct net_d static size_t ip6_tnl_get_size(const struct net_device *dev) { @@ -426,7 +426,7 @@ Signed-off-by: Steven Barth return /* IFLA_IPTUN_LINK */ nla_total_size(4) + -@@ -2057,6 +2274,24 @@ static size_t ip6_tnl_get_size(const str +@@ -2062,6 +2279,24 @@ static size_t ip6_tnl_get_size(const str nla_total_size(2) + /* IFLA_IPTUN_COLLECT_METADATA */ nla_total_size(0) + @@ -451,7 +451,7 @@ Signed-off-by: Steven Barth 0; } -@@ -2064,6 +2299,9 @@ static int ip6_tnl_fill_info(struct sk_b +@@ -2069,6 +2304,9 @@ static int ip6_tnl_fill_info(struct sk_b { struct ip6_tnl *tunnel = netdev_priv(dev); struct __ip6_tnl_parm *parm = &tunnel->parms; @@ -461,7 +461,7 @@ Signed-off-by: Steven Barth if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) || nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) || -@@ -2072,9 +2310,27 @@ static int ip6_tnl_fill_info(struct sk_b +@@ -2077,9 +2315,27 @@ static int ip6_tnl_fill_info(struct sk_b nla_put_u8(skb, IFLA_IPTUN_ENCAP_LIMIT, parm->encap_limit) || nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) || nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) || @@ -490,7 +490,7 @@ Signed-off-by: Steven Barth if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) || nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) || nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) || -@@ -2112,6 +2368,7 @@ static const struct nla_policy ip6_tnl_p +@@ -2117,6 +2373,7 @@ static const struct nla_policy ip6_tnl_p [IFLA_IPTUN_ENCAP_SPORT] = { .type = NLA_U16 }, [IFLA_IPTUN_ENCAP_DPORT] = { .type = NLA_U16 }, [IFLA_IPTUN_COLLECT_METADATA] = { .type = NLA_FLAG }, diff --git a/target/linux/generic/pending-4.9/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-4.9/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index e9c247fad..85293a2da 100644 --- a/target/linux/generic/pending-4.9/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-4.9/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -141,7 +141,7 @@ Signed-off-by: Jonas Gorski static const struct rt6_info ip6_blk_hole_entry_template = { .dst = { .__refcnt = ATOMIC_INIT(1), -@@ -1966,6 +1983,11 @@ static struct rt6_info *ip6_route_info_c +@@ -1967,6 +1984,11 @@ static struct rt6_info *ip6_route_info_c rt->dst.output = ip6_pkt_prohibit_out; rt->dst.input = ip6_pkt_prohibit; break; @@ -153,7 +153,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -2609,6 +2631,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -2610,6 +2632,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -171,7 +171,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -2844,7 +2877,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -2845,7 +2878,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -181,7 +181,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -3216,6 +3250,9 @@ static int rt6_fill_node(struct net *net +@@ -3217,6 +3251,9 @@ static int rt6_fill_node(struct net *net case -EACCES: rtm->rtm_type = RTN_PROHIBIT; break; @@ -191,7 +191,7 @@ Signed-off-by: Jonas Gorski case -EAGAIN: rtm->rtm_type = RTN_THROW; break; -@@ -3492,6 +3529,8 @@ static int ip6_route_dev_notify(struct n +@@ -3493,6 +3530,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -200,7 +200,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -3718,6 +3757,17 @@ static int __net_init ip6_route_net_init +@@ -3719,6 +3758,17 @@ static int __net_init ip6_route_net_init net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); @@ -218,7 +218,7 @@ Signed-off-by: Jonas Gorski #endif net->ipv6.sysctl.flush_delay = 0; -@@ -3736,6 +3786,8 @@ out: +@@ -3737,6 +3787,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -227,7 +227,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -3753,6 +3805,7 @@ static void __net_exit ip6_route_net_exi +@@ -3754,6 +3806,7 @@ static void __net_exit ip6_route_net_exi #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); kfree(net->ipv6.ip6_blk_hole_entry); @@ -235,7 +235,7 @@ Signed-off-by: Jonas Gorski #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); } -@@ -3826,6 +3879,9 @@ void __init ip6_route_init_special_entri +@@ -3827,6 +3880,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-4.9/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-4.9/680-NET-skip-GRO-for-foreign-MAC-addresses.patch index bd2ffe34e..86a64d842 100644 --- a/target/linux/generic/pending-4.9/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ b/target/linux/generic/pending-4.9/680-NET-skip-GRO-for-foreign-MAC-addresses.patch @@ -34,7 +34,7 @@ Signed-off-by: Felix Fietkau __u16 tc_index; /* traffic control index */ --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -4524,6 +4524,9 @@ static enum gro_result dev_gro_receive(s +@@ -4542,6 +4542,9 @@ static enum gro_result dev_gro_receive(s enum gro_result ret; int grow; @@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau if (!(skb->dev->features & NETIF_F_GRO)) goto normal; -@@ -5812,6 +5815,48 @@ static void __netdev_adjacent_dev_unlink +@@ -5830,6 +5833,48 @@ static void __netdev_adjacent_dev_unlink &upper_dev->adj_list.lower); } @@ -93,16 +93,23 @@ Signed-off-by: Felix Fietkau static int __netdev_upper_dev_link(struct net_device *dev, struct net_device *upper_dev, bool master, void *upper_priv, void *upper_info) -@@ -6010,6 +6055,8 @@ void netdev_upper_dev_unlink(struct net_ +@@ -5902,6 +5947,7 @@ static int __netdev_upper_dev_link(struc + goto rollback_lower_mesh; + } + ++ netdev_update_addr_mask(dev); + ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, dev, + &changeupper_info.info); + ret = notifier_to_errno(ret); +@@ -6028,6 +6074,7 @@ void netdev_upper_dev_unlink(struct net_ list_for_each_entry(i, &upper_dev->all_adj_list.upper, list) __netdev_adjacent_dev_unlink(dev, i->dev, i->ref_nr); -+ netdev_update_addr_mask(dev); + netdev_update_addr_mask(dev); call_netdevice_notifiers_info(NETDEV_CHANGEUPPER, dev, &changeupper_info.info); } -@@ -6610,6 +6657,7 @@ int dev_set_mac_address(struct net_devic +@@ -6628,6 +6675,7 @@ int dev_set_mac_address(struct net_devic if (err) return err; dev->addr_assign_type = NET_ADDR_SET; diff --git a/target/linux/generic/pending-4.9/834-ledtrig-libata.patch b/target/linux/generic/pending-4.9/834-ledtrig-libata.patch index 44ee23fb9..197e01a27 100644 --- a/target/linux/generic/pending-4.9/834-ledtrig-libata.patch +++ b/target/linux/generic/pending-4.9/834-ledtrig-libata.patch @@ -65,7 +65,7 @@ Signed-off-by: Daniel Golle /** * ata_build_rw_tf - Build ATA taskfile for given read/write request * @tf: Target ATA taskfile -@@ -4963,6 +4976,9 @@ struct ata_queued_cmd *ata_qc_new_init(s +@@ -4985,6 +4998,9 @@ struct ata_queued_cmd *ata_qc_new_init(s if (tag < 0) return NULL; } @@ -75,7 +75,7 @@ Signed-off-by: Daniel Golle qc = __ata_qc_from_tag(ap, tag); qc->tag = tag; -@@ -5865,6 +5881,9 @@ struct ata_port *ata_port_alloc(struct a +@@ -5886,6 +5902,9 @@ struct ata_port *ata_port_alloc(struct a ap->stats.unhandled_irq = 1; ap->stats.idle_irq = 1; #endif @@ -85,7 +85,7 @@ Signed-off-by: Daniel Golle ata_sff_port_init(ap); return ap; -@@ -5886,6 +5905,12 @@ static void ata_host_release(struct devi +@@ -5907,6 +5926,12 @@ static void ata_host_release(struct devi kfree(ap->pmp_link); kfree(ap->slave_link); @@ -98,7 +98,7 @@ Signed-off-by: Daniel Golle kfree(ap); host->ports[i] = NULL; } -@@ -6332,7 +6357,23 @@ int ata_host_register(struct ata_host *h +@@ -6353,7 +6378,23 @@ int ata_host_register(struct ata_host *h host->ports[i]->print_id = atomic_inc_return(&ata_print_id); host->ports[i]->local_port_no = i + 1; } diff --git a/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch b/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch index a69227b77..e3a1c8a7e 100644 --- a/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch +++ b/target/linux/generic/pending-4.9/890-uart_optional_sysrq.patch @@ -26,7 +26,7 @@ Signed-off-by: Felix Fietkau { --- a/lib/Kconfig.debug +++ b/lib/Kconfig.debug -@@ -397,6 +397,11 @@ config MAGIC_SYSRQ_DEFAULT_ENABLE +@@ -396,6 +396,11 @@ config MAGIC_SYSRQ_DEFAULT_ENABLE This may be set to 1 or 0 to enable or disable them all, or to a bitmask as described in Documentation/sysrq.txt. diff --git a/target/linux/generic/pending-4.9/920-mangle_bootargs.patch b/target/linux/generic/pending-4.9/920-mangle_bootargs.patch index bdf8c0d38..ec2f34009 100644 --- a/target/linux/generic/pending-4.9/920-mangle_bootargs.patch +++ b/target/linux/generic/pending-4.9/920-mangle_bootargs.patch @@ -13,7 +13,7 @@ Signed-off-by: Imre Kaloz --- a/init/Kconfig +++ b/init/Kconfig -@@ -1687,6 +1687,15 @@ config EMBEDDED +@@ -1694,6 +1694,15 @@ config EMBEDDED an embedded system so certain expert options are available for configuration. diff --git a/target/linux/imx6/Makefile b/target/linux/imx6/Makefile index ae6a9b0d5..152a58e8b 100644 --- a/target/linux/imx6/Makefile +++ b/target/linux/imx6/Makefile @@ -14,7 +14,7 @@ CPU_TYPE:=cortex-a9 CPU_SUBTYPE:=neon MAINTAINER:=Luka Perkov -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/imx6/base-files/lib/upgrade/platform.sh b/target/linux/imx6/base-files/lib/upgrade/platform.sh index a9ca5ee87..ab5229110 100755 --- a/target/linux/imx6/base-files/lib/upgrade/platform.sh +++ b/target/linux/imx6/base-files/lib/upgrade/platform.sh @@ -16,7 +16,7 @@ platform_check_image() { return 1 } -platform_pre_upgrade() { +platform_do_upgrade() { local board=$(board_name) case "$board" in diff --git a/target/linux/imx6/config-4.9 b/target/linux/imx6/config-4.14 similarity index 90% rename from target/linux/imx6/config-4.9 rename to target/linux/imx6/config-4.14 index e4f262b38..fc32dbf7b 100644 --- a/target/linux/imx6/config-4.9 +++ b/target/linux/imx6/config-4.14 @@ -1,10 +1,14 @@ CONFIG_AHCI_IMX=y CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAS_TICK_BROADCAST=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y @@ -16,6 +20,8 @@ CONFIG_ARCH_MULTI_V6_V7=y CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_MXC=y CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y @@ -24,6 +30,7 @@ CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_ARM=y @@ -50,12 +57,11 @@ CONFIG_ATA=y CONFIG_ATAGS=y CONFIG_AUTO_ZRELADDR=y CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_SCSI_REQUEST=y CONFIG_CACHE_L2X0=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_IMX_GPT=y CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_CLZ_TAB=y CONFIG_COMMON_CLK=y @@ -82,17 +88,17 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y CONFIG_CPU_HAS_ASID=y # CONFIG_CPU_ICACHE_DISABLE is not set CONFIG_CPU_PABRT_V7=y CONFIG_CPU_RMAP=y CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V7=y CONFIG_CPU_V7=y # CONFIG_CRASHLOG is not set CONFIG_CRC16=y -CONFIG_CRYPTO_ABLK_HELPER=y +CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_AES_ARM=y @@ -102,7 +108,9 @@ CONFIG_CRYPTO_AKCIPHER=y CONFIG_CRYPTO_AKCIPHER2=y CONFIG_CRYPTO_AUTHENC=y CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CHACHA20_NEON is not set CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32_ARM_CE is not set CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_CTS=y @@ -110,8 +118,8 @@ CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_DEV_FSL_CAAM=y CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y # CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set -CONFIG_CRYPTO_DEV_FSL_CAAM_IMX=y # CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y @@ -145,6 +153,7 @@ CONFIG_CRYPTO_SHA256=y # CONFIG_CRYPTO_SHA256_ARM is not set # CONFIG_CRYPTO_SHA2_ARM_CE is not set # CONFIG_CRYPTO_SHA512_ARM is not set +CONFIG_CRYPTO_SIMD=y CONFIG_CRYPTO_WORKQUEUE=y CONFIG_CRYPTO_XTS=y CONFIG_DCACHE_WORD_ACCESS=y @@ -158,19 +167,16 @@ CONFIG_DECOMPRESS_LZO=y CONFIG_DECOMPRESS_XZ=y CONFIG_DMADEVICES=y CONFIG_DMA_ENGINE=y +# CONFIG_DMA_NOOP_OPS is not set CONFIG_DMA_OF=y +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set CONFIG_DTC=y +CONFIG_E1000E=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y -# CONFIG_ENABLE_DEFAULT_TRACERS is not set CONFIG_ENCRYPTED_KEYS=y -CONFIG_EXT2_FS=y -CONFIG_EXT2_FS_POSIX_ACL=y -CONFIG_EXT2_FS_SECURITY=y -CONFIG_EXT2_FS_XATTR=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y +CONFIG_EXPORTFS=y CONFIG_EXT4_ENCRYPTION=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_ENCRYPTION=y @@ -181,23 +187,28 @@ CONFIG_FEC=y CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_FRAME_POINTER=y +CONFIG_FSL_GUTS=y CONFIG_FS_ENCRYPTION=y CONFIG_FS_MBCACHE=y CONFIG_FS_POSIX_ACL=y -CONFIG_FTRACE=y -# CONFIG_FTRACE_SYSCALLS is not set +CONFIG_FUTEX_PI=y CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IO=y CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y @@ -211,6 +222,7 @@ CONFIG_GPIO_MXC=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y @@ -228,7 +240,6 @@ CONFIG_HAVE_ARM_SCU=y CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_TWD=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y @@ -238,6 +249,8 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y @@ -265,12 +278,14 @@ CONFIG_HAVE_UID16=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HWMON=y CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_IMX_RNGC=y CONFIG_HZ_FIXED=0 CONFIG_HZ_PERIODIC=y CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_IMX=y +# CONFIG_I2C_IMX_LPI2C is not set CONFIG_IMX2_WDT=y CONFIG_IMX_DMA=y CONFIG_IMX_SDMA=y @@ -291,7 +306,8 @@ CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BOARDINFO=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y CONFIG_MFD_SYSCON=y CONFIG_MICREL_PHY=y CONFIG_MIGHT_HAVE_CACHE_L2X0=y @@ -324,7 +340,6 @@ CONFIG_MXS_DMA=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEON=y CONFIG_NET_DSA=y -CONFIG_NET_DSA_HWMON=y CONFIG_NET_DSA_MV88E6XXX=y CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y CONFIG_NET_DSA_TAG_DSA=y @@ -337,6 +352,7 @@ CONFIG_NLS_CODEPAGE_437=y CONFIG_NO_BOOTMEM=y CONFIG_NR_CPUS=4 CONFIG_NVMEM=y +# CONFIG_NVMEM_IMX_IIM is not set CONFIG_NVMEM_IMX_OCOTP=y CONFIG_OF=y CONFIG_OF_ADDRESS=y @@ -360,6 +376,7 @@ CONFIG_PCI=y CONFIG_PCIEAER=y CONFIG_PCIEPORTBUS=y CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y CONFIG_PCIE_PME=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -384,13 +401,13 @@ CONFIG_PM_GENERIC_DOMAINS=y CONFIG_PM_GENERIC_DOMAINS_OF=y CONFIG_PM_OPP=y CONFIG_PPS=y -# CONFIG_PROBE_EVENTS is not set CONFIG_PTP_1588_CLOCK=y CONFIG_PWM=y CONFIG_PWM_IMX=y CONFIG_PWM_SYSFS=y CONFIG_RAS=y CONFIG_RATIONAL=y +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y CONFIG_RD_BZIP2=y CONFIG_RD_GZIP=y @@ -405,6 +422,7 @@ CONFIG_REGULATOR_ANATOP=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_LTC3676=y CONFIG_REGULATOR_PFUZE100=y +CONFIG_RESET_CONTROLLER=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y CONFIG_RTC_CLASS=y @@ -441,9 +459,11 @@ CONFIG_SOC_IMX6UL=y CONFIG_SPARSE_IRQ=y CONFIG_SPI=y CONFIG_SPI_BITBANG=y +# CONFIG_SPI_FSL_LPSPI is not set CONFIG_SPI_IMX=y CONFIG_SPI_MASTER=y CONFIG_SRAM=y +CONFIG_SRAM_EXEC=y CONFIG_SRCU=y CONFIG_STMP_DEVICE=y CONFIG_SWIOTLB=y @@ -452,11 +472,16 @@ CONFIG_SWP_EMULATE=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_THERMAL=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_OF=y +CONFIG_THIN_ARCHIVES=y # CONFIG_THUMB2_KERNEL is not set CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y CONFIG_UBIFS_FS=y CONFIG_UBIFS_FS_ADVANCED_COMPR=y CONFIG_UBIFS_FS_LZO=y @@ -471,14 +496,12 @@ CONFIG_USB_COMMON=y CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_EHCI_MXC is not set -CONFIG_USB_EHCI_PCI=y CONFIG_USB_GADGET=y # CONFIG_USB_IMX21_HCD is not set CONFIG_USB_MXS_PHY=y CONFIG_USB_OTG=y CONFIG_USB_PHY=y CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set CONFIG_USE_OF=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_VFP=y diff --git a/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6dl-gw5904.dts b/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6dl-gw5904.dts deleted file mode 100644 index 2318a55cf..000000000 --- a/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6dl-gw5904.dts +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Copyright 2017 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6dl.dtsi" -#include "imx6qdl-gw5904.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 DualLite/Solo GW5904"; - compatible = "gw,imx6dl-gw5904", "gw,ventana", "fsl,imx6dl"; -}; diff --git a/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6q-gw5904.dts b/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6q-gw5904.dts deleted file mode 100644 index 357dd7e06..000000000 --- a/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6q-gw5904.dts +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright 2017 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx6q.dtsi" -#include "imx6qdl-gw5904.dtsi" - -/ { - model = "Gateworks Ventana i.MX6 Dual/Quad GW5904"; - compatible = "gw,imx6q-gw5904", "gw,ventana", "fsl,imx6q"; -}; - -&sata { - status = "okay"; -}; diff --git a/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6qdl-gw5904.dtsi b/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6qdl-gw5904.dtsi deleted file mode 100644 index 4503f2c3f..000000000 --- a/target/linux/imx6/files-4.9/arch/arm/boot/dts/imx6qdl-gw5904.dtsi +++ /dev/null @@ -1,629 +0,0 @@ -/* - * Copyright 2017 Gateworks Corporation - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include - -/ { - /* these are used by bootloader for disabling nodes */ - aliases { - led0 = &led0; - led1 = &led1; - led2 = &led2; - usb0 = &usbh1; - usb1 = &usbotg; - }; - - chosen { - bootargs = "console=ttymxc1,115200"; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <7>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpio_leds>; - - led0: user1 { - label = "user1"; - gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ - default-state = "on"; - linux,default-trigger = "heartbeat"; - }; - - led1: user2 { - label = "user2"; - gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ - default-state = "off"; - }; - - led2: user3 { - label = "user3"; - gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ - default-state = "off"; - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - - user_pb { - label = "user_pb"; - - gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; - linux,code = <256>; - }; - }; - - memory { - reg = <0x10000000 0x40000000>; - }; - - pps { - compatible = "pps-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pps>; - gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - reg_1p0v: regulator-1p0v { - compatible = "regulator-fixed"; - regulator-name = "1P0V"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_usb_h1_vbus: regulator-usb-h1-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_h1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - - reg_usb_otg_vbus: regulator-usb-otg-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb_otg_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - dsa { - compatible = "marvell,dsa"; - #address-cells = <2>; - #size-cells = <0>; - - dsa,ethernet = <&fec>; - dsa,mii-bus = <&mdio>; - - switch@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0>; /* MDIO address 0, switch 0 in tree */ - - port@0 { - reg = <0>; - label = "lan4"; - }; - - port@1 { - reg = <1>; - label = "lan3"; - }; - - port@2 { - reg = <2>; - label = "lan2"; - }; - - port@3 { - reg = <3>; - label = "lan1"; - }; - - port@5 { - reg = <5>; - label = "cpu"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; -}; - -&clks { - assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, - <&clks IMX6QDL_CLK_LDB_DI1_SEL>; - assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, - <&clks IMX6QDL_CLK_PLL3_USB_OTG>; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii-id"; - status = "okay"; - - mdio: mdio { - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - eeprom1: eeprom@50 { - compatible = "atmel,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - - eeprom2: eeprom@51 { - compatible = "atmel,24c02"; - reg = <0x51>; - pagesize = <16>; - }; - - eeprom3: eeprom@52 { - compatible = "atmel,24c02"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom4: eeprom@53 { - compatible = "atmel,24c02"; - reg = <0x53>; - pagesize = <16>; - }; - - gsc: gsc@20 { - compatible = "gw,gsc"; - reg = <0x20>; - interrupt-parent = <&gpio1>; - interrupts = <4 1>; - interrupt-controller; - #interrupt-cells = <1>; - - /* GSC watchdog */ - watchdog { - compatible = "gw,gsc_wdt"; - status = "okay"; - }; - - /* Linux input events from GSC interrupt events */ - input { - compatible = "gw,gsc_input"; - interrupt-parent = <&gsc>; - interrupts = <0 1 2 5 7>; - interrupt-names = "button", "key-erased", "eeprom-wp", "tamper", "button-held"; - status = "okay"; - }; - }; - - gsc_gpio: pca9555@23 { - compatible = "nxp,pca9555"; - reg = <0x23>; - gpio-controller; - #gpio-cells = <2>; - interrupt-parent = <&gsc>; - interrupts = <4>; - }; - - gsc_hwmon: hwmon@29 { - compatible = "gw,gsc_hwmon"; - reg = <0x29>; - }; - - gsc_rtc: ds1672@68 { - compatible = "dallas,ds1672"; - reg = <0x68>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - - /* LSM9DS1 magnetic sensor */ - lsm9ds1-m@0x1c { - compatible = "st,lsm9ds1-mag"; - reg = <0x1C>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_imu_mag>; - gpios = <&gpio5 17 GPIO_ACTIVE_LOW>; /* IRQ */ - rot-matrix = /bits/ 16 <(1) (0) (0) - (0) (1) (0) - (0) (0) (1)>; - poll-interval = <100>; - min-interval = <13>; - fs-range = <0>; - }; - - /* LSM9DS1 accelerometer/gyroscope sensor */ - lsm9ds1-ag@0x6a { - compatible = "st,lsm9ds1-acc-gyr"; - reg = <0x6A>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_imu_acc>; - gpios = <&gpio4 18 GPIO_ACTIVE_LOW>, /* INT1 */ - <&gpio4 19 GPIO_ACTIVE_LOW>; /* INT2 */ - rot-matrix = /bits/ 16 <(1) (0) (0) - (0) (1) (0) - (0) (0) (1)>; - g-poll-interval = <100>; - g-min-interval = <2>; - g-fs-range = <0>; - x-poll-interval = <100>; - x-min-interval = <1>; - x-fs-range = <0>; - aa-filter-bw = <0>; - }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - status = "okay"; - - touchscreen: egalax_ts@04 { - compatible = "eeti,egalax_ts"; - reg = <0x04>; - interrupt-parent = <&gpio1>; - interrupts = <11 IRQ_TYPE_EDGE_FALLING>; - wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; - }; -}; - -&ldb { - status = "okay"; - - lvds-channel@0 { - fsl,data-mapping = "spwg"; - fsl,data-width = <18>; - status = "okay"; - - display-timings { - native-mode = <&timing0>; - timing0: hsd100pxn1 { - clock-frequency = <65000000>; - hactive = <1024>; - vactive = <768>; - hback-porch = <220>; - hfront-porch = <40>; - vback-porch = <21>; - vfront-porch = <7>; - hsync-len = <60>; - vsync-len = <10>; - }; - }; - }; -}; - -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie>; - reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&pwm2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ - status = "disabled"; -}; - -&pwm3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ - status = "disabled"; -}; - -&pwm4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm4>; - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - fsl,uart-has-rtscts; - status = "okay"; -}; - -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4>; - fsl,uart-has-rtscts; - status = "okay"; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5>; - status = "okay"; -}; - -&usbotg { - vbus-supply = <®_usb_otg_vbus>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg>; - disable-over-current; - status = "okay"; -}; - -&usbh1 { - vbus-supply = <®_usb_h1_vbus>; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc3>; - pinctrl-1 = <&pinctrl_usdhc3_100mhz>; - pinctrl-2 = <&pinctrl_usdhc3_200mhz>; - non-removable; - vmmc-supply = <®_3p3v>; - keep-power-in-suspend; - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; -}; - -&iomuxc { - imx6qdl-gw5904 { - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 - MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */ - >; - }; - - pinctrl_gpio_leds: gpioledsgrp { - fsl,pins = < - MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 - MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 - MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 - MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 - >; - }; - - pinctrl_imu_acc: gpioimxaccgrp { - fsl,pins = < - MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 /* INT1 */ - MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 /* INT2 */ - >; - }; - - pinctrl_imu_mag: gpioimxmaggrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 /* IRQ */ - MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 /* data ready */ - >; - }; - - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ - >; - }; - - pinctrl_pmic: pmicgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */ - >; - }; - - pinctrl_pps: ppsgrp { - fsl,pins = < - MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 - >; - }; - - pinctrl_pwm2: pwm2grp { - fsl,pins = < - MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 - >; - }; - - pinctrl_pwm3: pwm3grp { - fsl,pins = < - MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 - >; - }; - - pinctrl_pwm4: pwm4grp { - fsl,pins = < - MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 - >; - }; - - pinctrl_uart4: uart4grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 - MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 - >; - }; - - pinctrl_uart5: uart5grp { - fsl,pins = < - MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 - MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_usbotg: usbotggrp { - fsl,pins = < - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */ - MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */ - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 - >; - }; - - pinctrl_usdhc3_100mhz: usdhc3grp100mhz { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 - MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9 - >; - }; - - pinctrl_usdhc3_200mhz: usdhc3grp200mhz { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 - MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9 - >; - }; - - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 - >; - }; - }; -}; diff --git a/target/linux/imx6/image/Makefile b/target/linux/imx6/image/Makefile index 7f35c56b7..cef08f227 100644 --- a/target/linux/imx6/image/Makefile +++ b/target/linux/imx6/image/Makefile @@ -22,7 +22,7 @@ define Build/boot-overlay $(foreach dts,$(DEVICE_DTS), \ $(CP) \ - $(LINUX_DIR)/arch/$(ARCH)/boot/dts/$(dts).dtb \ + $(DTS_DIR)/$(dts).dtb \ $@.boot/$(IMG_PREFIX)-$(dts).dtb; \ ln -sf \ $(IMG_PREFIX)-$(dts).dtb \ diff --git a/target/linux/imx6/patches-4.9/100-bootargs.patch b/target/linux/imx6/patches-4.14/100-bootargs.patch similarity index 100% rename from target/linux/imx6/patches-4.9/100-bootargs.patch rename to target/linux/imx6/patches-4.14/100-bootargs.patch diff --git a/target/linux/imx6/patches-4.14/200-disable-msi.patch b/target/linux/imx6/patches-4.14/200-disable-msi.patch new file mode 100644 index 000000000..9de7eeee4 --- /dev/null +++ b/target/linux/imx6/patches-4.14/200-disable-msi.patch @@ -0,0 +1,18 @@ +--- a/drivers/pci/dwc/Kconfig ++++ b/drivers/pci/dwc/Kconfig +@@ -6,7 +6,6 @@ config PCIE_DW + config PCIE_DW_HOST + bool + depends on PCI +- depends on PCI_MSI_IRQ_DOMAIN + select PCIE_DW + + config PCIE_DW_EP +@@ -74,7 +73,6 @@ config PCI_IMX6 + bool "Freescale i.MX6 PCIe controller" + depends on PCI + depends on SOC_IMX6Q +- depends on PCI_MSI_IRQ_DOMAIN + select PCIEPORTBUS + select PCIE_DW_HOST + diff --git a/target/linux/imx6/patches-4.9/210-disable-uart-dma.patch b/target/linux/imx6/patches-4.14/210-disable-uart-dma.patch similarity index 100% rename from target/linux/imx6/patches-4.9/210-disable-uart-dma.patch rename to target/linux/imx6/patches-4.14/210-disable-uart-dma.patch diff --git a/target/linux/imx6/patches-4.9/0001-arm-dts-imx-add-gateworks-ventana-gw5904-support.patch b/target/linux/imx6/patches-4.9/0001-arm-dts-imx-add-gateworks-ventana-gw5904-support.patch deleted file mode 100644 index 1bfbf99ca..000000000 --- a/target/linux/imx6/patches-4.9/0001-arm-dts-imx-add-gateworks-ventana-gw5904-support.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -339,6 +339,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw551x.dtb \ - imx6dl-gw552x.dtb \ - imx6dl-gw553x.dtb \ -+ imx6dl-gw5904.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-nit6xlite.dtb \ - imx6dl-nitrogen6x.dtb \ -@@ -379,6 +380,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw551x.dtb \ - imx6q-gw552x.dtb \ - imx6q-gw553x.dtb \ -+ imx6q-gw5904.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-icore-rqs.dtb \ diff --git a/target/linux/imx6/patches-4.9/200-disable-msi.patch b/target/linux/imx6/patches-4.9/200-disable-msi.patch deleted file mode 100644 index 290147c94..000000000 --- a/target/linux/imx6/patches-4.9/200-disable-msi.patch +++ /dev/null @@ -1,22 +0,0 @@ -The IMX6 PCIe host controller does not fire legacy interrupts when MSI is -enabled. A patch is being worked on upstream to only enable MSI at runtime -when needed, but until that is ready we will allow MSI to be disabled. - ---- a/drivers/pci/host/Kconfig -+++ b/drivers/pci/host/Kconfig -@@ -51,7 +51,6 @@ config PCIE_DW_PLAT - - config PCIE_DW - bool -- depends on PCI_MSI_IRQ_DOMAIN - - config PCI_EXYNOS - bool "Samsung Exynos PCIe controller" -@@ -63,7 +62,6 @@ config PCI_EXYNOS - config PCI_IMX6 - bool "Freescale i.MX6 PCIe controller" - depends on SOC_IMX6Q -- depends on PCI_MSI_IRQ_DOMAIN - select PCIEPORTBUS - select PCIE_DW - diff --git a/target/linux/ipq40xx/Makefile b/target/linux/ipq40xx/Makefile index e5bbdf40c..ef7c0f56c 100644 --- a/target/linux/ipq40xx/Makefile +++ b/target/linux/ipq40xx/Makefile @@ -17,5 +17,6 @@ DEFAULT_PACKAGES += \ kmod-leds-gpio kmod-gpio-button-hotplug swconfig \ kmod-ath10k wpad-mini \ kmod-usb3 kmod-usb-dwc3-of-simple kmod-usb-phy-qcom-dwc3 \ + ath10k-firmware-qca4019 $(eval $(call BuildTarget)) diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds index 9771fa391..81bed9244 100755 --- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds +++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds @@ -36,6 +36,11 @@ avm,fritzbox-4040) glinet,gl-b1300) ucidef_set_led_wlan "wlan" "WLAN" "${boardname}:green:wlan" "phy0tpt" ;; +netgear,ex6100v2 |\ +netgear,ex6150v2) + ucidef_set_led_wlan "wlan2g" "WLAN2G" "ex61x0v2:green:router" "phy0tpt" + ucidef_set_led_wlan "wlan5g" "WLAN5G" "ex61x0v2:green:client" "phy1tpt" + ;; meraki,mr33) ucidef_set_interface_lan "eth0" ;; diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network index 081681efe..26d70673b 100755 --- a/target/linux/ipq40xx/base-files/etc/board.d/02_network +++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network @@ -34,17 +34,22 @@ avm,fritzbox-4040) ucidef_add_switch "switch0" \ "0t@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan" ;; +compex,wpj428) + ucidef_add_switch "switch0" \ + "0t@eth0" "4:wan" "5:lan" + ;; glinet,gl-b1300) ucidef_add_switch "switch0" \ "0t@eth0" "3:lan" "4:lan" "5:wan" ;; -compex,wpj428|\ +8dev,jalapeno |\ openmesh,a42) ucidef_add_switch "switch0" \ "0t@eth0" "4:lan" "5:wan" ;; - -meraki,mr33) +meraki,mr33 |\ +netgear,ex6100v2 |\ +netgear,ex6150v2) ucidef_set_interface_lan "eth0" ;; *) diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata index b4640c91b..6541f6961 100644 --- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata @@ -112,6 +112,11 @@ case "$FIRMWARE" in ;; "ath10k/pre-cal-ahb-a000000.wifi.bin") case "$board" in + 8dev,jalapeno |\ + glinet,gl-b1300 |\ + qcom,ap-dk01.1-c1) + ath10kcal_extract "ART" 4096 12064 + ;; asus,rt-acrh17|\ asus,rt-ac58u) CI_UBIPART=UBI_DEV @@ -120,15 +125,16 @@ case "$FIRMWARE" in avm,fritzbox-4040) /usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config") ;; - glinet,gl-b1300 |\ - qcom,ap-dk01.1-c1) - ath10kcal_extract "ART" 4096 12064 - ;; meraki,mr33) ath10kcal_ubi_extract "ART" 4096 12064 ath10kcal_is_caldata_valid "202f" || ath10kcal_extract "ART" 4096 12064 ath10kcal_patch_mac_crc $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 102) +2) ;; + netgear,ex6100v2 |\ + netgear,ex6150v2) + ath10kcal_extract "ART" 4096 12064 + ath10kcal_patch_mac_crc $(mtd_get_mac_binary dnidata 0) + ;; compex,wpj428 |\ openmesh,a42) ath10kcal_extract "0:ART" 4096 12064 @@ -137,6 +143,11 @@ case "$FIRMWARE" in ;; "ath10k/pre-cal-ahb-a800000.wifi.bin") case "$board" in + 8dev,jalapeno |\ + glinet,gl-b1300 |\ + qcom,ap-dk01.1-c1) + ath10kcal_extract "ART" 20480 12064 + ;; asus,rt-ac58u) CI_UBIPART=UBI_DEV ath10kcal_ubi_extract "Factory" 20480 12064 @@ -144,15 +155,16 @@ case "$FIRMWARE" in avm,fritzbox-4040) /usr/bin/fritz_cal_extract -i 1 -s 0x400 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader_config") ;; - glinet,gl-b1300 |\ - qcom,ap-dk01.1-c1) - ath10kcal_extract "ART" 20480 12064 - ;; meraki,mr33) ath10kcal_ubi_extract "ART" 20480 12064 ath10kcal_is_caldata_valid "202f" || ath10kcal_extract "ART" 20480 12064 ath10kcal_patch_mac_crc $(macaddr_add $(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 102) +3) ;; + netgear,ex6100v2 |\ + netgear,ex6150v2) + ath10kcal_extract "ART" 20480 12064 + ath10kcal_patch_mac_crc $(mtd_get_mac_binary dnidata 12) + ;; compex,wpj428 |\ openmesh,a42) ath10kcal_extract "0:ART" 20480 12064 diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh index 80efb3514..5a3ad2876 100644 --- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh @@ -144,6 +144,9 @@ platform_check_image() { platform_do_upgrade() { case "$(board_name)" in + 8dev,jalapeno) + nand_do_upgrade "$ARGV" + ;; asus,rt-acrh17|\ asus,rt-ac58u) local magic=$(get_magic_long "$1") diff --git a/target/linux/ipq40xx/config-4.14 b/target/linux/ipq40xx/config-4.14 index 1bba06176..18a8bafd5 100644 --- a/target/linux/ipq40xx/config-4.14 +++ b/target/linux/ipq40xx/config-4.14 @@ -191,6 +191,7 @@ CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_74X164=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_WATCHDOG=y # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set @@ -438,6 +439,7 @@ CONFIG_SMP_ON_UP=y CONFIG_SPARSE_IRQ=y CONFIG_SPI=y CONFIG_SPI_MASTER=y +CONFIG_SPI_GPIO=y CONFIG_SPI_QUP=y CONFIG_SPMI=y CONFIG_SPMI_MSM_PMIC_ARB=y diff --git a/target/linux/ipq40xx/config-4.9 b/target/linux/ipq40xx/config-4.9 deleted file mode 100644 index 376ffb85c..000000000 --- a/target/linux/ipq40xx/config-4.9 +++ /dev/null @@ -1,497 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_AMBA_PL08X is not set -CONFIG_APQ_GCC_8084=y -CONFIG_APQ_MMCC_8084=y -CONFIG_AR40XX_PHY=y -CONFIG_AR8216_PHY=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_IPQ40XX=y -# CONFIG_ARCH_MDM9615 is not set -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MSM8960=y -CONFIG_ARCH_MSM8974=y -CONFIG_ARCH_MSM8X60=y -CONFIG_ARCH_MULTIPLATFORM=y -# CONFIG_ARCH_MULTI_CPU_AUTO is not set -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_QCOM=y -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARM_AMBA=y -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ATAG_DTB_COMPAT=y -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE=y -CONFIG_ARM_CPUIDLE=y -CONFIG_ARM_CPU_SUSPEND=y -# CONFIG_ARM_CPU_TOPOLOGY is not set -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_QCOM_CPUFREQ=y -CONFIG_ARM_QCOM_CPUIDLE=y -# CONFIG_ARM_SMMU is not set -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_AT803X_PHY=y -# CONFIG_BINFMT_FLAT is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_BOUNCE=y -CONFIG_BUS_TOPOLOGY_ADHOC=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y -CONFIG_CLKSRC_QCOM=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_QCOM=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_QCE=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CRYPTO_XTS=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_GPIO=y -CONFIG_DEBUG_UNCOMPRESS=y -# CONFIG_DEBUG_USER is not set -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DTC=y -CONFIG_DT_IDLE_STATES=y -# CONFIG_DWMAC_GENERIC is not set -CONFIG_DWMAC_IPQ806X=y -CONFIG_DYNAMIC_DEBUG=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ESSEDMA=y -CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_SYSFS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_SMCCC=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HWMON=y -CONFIG_HWSPINLOCK=y -CONFIG_HWSPINLOCK_QCOM=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_MSM=y -CONFIG_HZ_FIXED=0 -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_QUP=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IOMMU_HELPER=y -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set -CONFIG_IOMMU_SUPPORT=y -CONFIG_IPQ_GCC_4019=y -CONFIG_IPQ_GCC_806X=y -# CONFIG_IPQ_LCC_806X is not set -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_KPSS_XCC=y -CONFIG_KRAITCC=y -CONFIG_KRAIT_CLOCKS=y -CONFIG_KRAIT_L2_ACCESSORS=y -CONFIG_LIBFDT=y -CONFIG_LOCKUP_DETECTOR=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BOARDINFO=y -CONFIG_MDIO_GPIO=y -CONFIG_MDIO_IPQ40XX=y -# CONFIG_MDM_GCC_9615 is not set -# CONFIG_MDM_LCC_9615 is not set -# CONFIG_MFD_MAX77620 is not set -CONFIG_MFD_QCOM_RPM=y -# CONFIG_MFD_SPMI_PMIC is not set -CONFIG_MFD_SYSCON=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MMC=y -CONFIG_MMC_ARMMMCI=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=16 -CONFIG_MMC_QCOM_DML=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_MSM=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MSM_BUS_SCALING=y -CONFIG_MSM_GCC_8660=y -# CONFIG_MSM_GCC_8916 is not set -CONFIG_MSM_GCC_8960=y -CONFIG_MSM_GCC_8974=y -# CONFIG_MSM_GCC_8996 is not set -# CONFIG_MSM_IOMMU is not set -# CONFIG_MSM_LCC_8960 is not set -CONFIG_MSM_MMCC_8960=y -CONFIG_MSM_MMCC_8974=y -# CONFIG_MSM_MMCC_8996 is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_QCOM=y -# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set -CONFIG_MTD_QCOM_SMEM_PARTS=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPINAND_MT29F=y -CONFIG_MTD_SPINAND_ONDIEECC=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_SPLIT_FIT_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MULTI_IRQ_HANDLER=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_HWMON=y -CONFIG_NET_DSA_QCA8K=y -CONFIG_NET_DSA_TAG_QCA=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NO_BOOTMEM=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_ADDRESS_PCI=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_PCI=y -CONFIG_OF_PCI_IRQ=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_QCOM=y -CONFIG_PCI_DEBUG=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -# CONFIG_PHY_QCOM_APQ8064_SATA is not set -CONFIG_PHY_QCOM_IPQ806X_SATA=y -# CONFIG_PHY_QCOM_UFS is not set -CONFIG_PINCTRL=y -CONFIG_PINCTRL_APQ8064=y -# CONFIG_PINCTRL_APQ8084 is not set -CONFIG_PINCTRL_IPQ4019=y -CONFIG_PINCTRL_IPQ8064=y -# CONFIG_PINCTRL_MDM9615 is not set -CONFIG_PINCTRL_MSM=y -# CONFIG_PINCTRL_MSM8660 is not set -# CONFIG_PINCTRL_MSM8916 is not set -# CONFIG_PINCTRL_MSM8960 is not set -# CONFIG_PINCTRL_MSM8996 is not set -CONFIG_PINCTRL_MSM8X74=y -# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set -# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set -# CONFIG_PL330_DMA is not set -CONFIG_PM_OPP=y -CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_BRCMKONA is not set -CONFIG_POWER_RESET_MSM=y -CONFIG_POWER_SUPPLY=y -CONFIG_PPS=y -CONFIG_PRINTK_TIME=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_QCOM_ADM=y -CONFIG_QCOM_BAM_DMA=y -CONFIG_QCOM_CLK_RPM=y -# CONFIG_QCOM_EBI2 is not set -CONFIG_QCOM_GDSC=y -CONFIG_QCOM_GSBI=y -CONFIG_QCOM_HFPLL=y -CONFIG_QCOM_PM=y -# CONFIG_QCOM_Q6V5_PIL is not set -CONFIG_QCOM_QFPROM=y -CONFIG_QCOM_RPMCC=y -CONFIG_QCOM_SCM=y -CONFIG_QCOM_SCM_32=y -# CONFIG_QCOM_SMD is not set -CONFIG_QCOM_SMEM=y -# CONFIG_QCOM_SMP2P is not set -# CONFIG_QCOM_SMSM is not set -CONFIG_QCOM_TCSR=y -CONFIG_QCOM_TSENS=y -# CONFIG_QCOM_WCNSS_PIL is not set -CONFIG_QCOM_WDT=y -# CONFIG_QRTR is not set -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RCU_CPU_STALL_TIMEOUT=21 -CONFIG_RCU_STALL_COMMON=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_QCOM_RPM=y -# CONFIG_REGULATOR_QCOM_SPMI is not set -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -# CONFIG_RPMSG_QCOM_SMD is not set -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCHED_INFO is not set -# CONFIG_SCSI_DMA is not set -CONFIG_SERIAL_8250_FSL=y -# CONFIG_SERIAL_AMBA_PL010 is not set -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIAL_MSM=y -CONFIG_SERIAL_MSM_CONSOLE=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -# CONFIG_SPI_CADENCE_QUADSPI is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_QUP=y -CONFIG_SPMI=y -CONFIG_SPMI_MSM_PMIC_ARB=y -CONFIG_SRCU=y -CONFIG_STMMAC_ETH=y -CONFIG_STMMAC_PLATFORM=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TREE_RCU=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UEVENT_HELPER_PATH="" -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_COMMON=y -# CONFIG_USB_EHCI_HCD is not set -CONFIG_USB_IPQ4019_PHY=y -CONFIG_USB_PHY=y -CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USE_OF=y -CONFIG_VDSO=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_MSM_PCIE=y \ No newline at end of file diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-a42.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-a42.dts index 8c01d4118..4a7fe865f 100644 --- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-a42.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-a42.dts @@ -25,27 +25,6 @@ model = "OpenMesh A42"; compatible = "openmesh,a42", "qcom,ipq4019"; - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - tz_apps@87b80000 { - reg = <0x87b80000 0x280000>; - no-map; - }; - - smem@87e00000 { - reg = <0x87e00000 0x080000>; - no-map; - }; - - tz@87e80000 { - reg = <0x87e80000 0x180000>; - no-map; - }; - }; - soc { mdio@90000 { status = "okay"; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts new file mode 100644 index 000000000..a0abe4151 --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex6100v2.dts @@ -0,0 +1,33 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, David Bauer + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4018-ex61x0v2.dtsi" +#include +#include + +/ { + model = "Netgear EX6100v2"; + compatible = "netgear,ex6100v2", "qcom,ipq4019"; +}; + +&wifi0 { + qcom,ath10k-calibration-variant = "Netgear-EX6100v2"; +}; + +&wifi1 { + qcom,ath10k-calibration-variant = "Netgear-EX6100v2"; +}; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts new file mode 100644 index 000000000..e0b5c38b3 --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex6150v2.dts @@ -0,0 +1,33 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, David Bauer + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4018-ex61x0v2.dtsi" +#include +#include + +/ { + model = "Netgear EX6150v2"; + compatible = "netgear,ex6150v2", "qcom,ipq4019"; +}; + +&wifi0 { + qcom,ath10k-calibration-variant = "Netgear-EX6150v2"; +}; + +&wifi1 { + qcom,ath10k-calibration-variant = "Netgear-EX6150v2"; +}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-fritz4040.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi similarity index 57% rename from target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-fritz4040.dts rename to target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi index f5ca3d5c5..e5f1c0737 100644 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-fritz4040.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi @@ -1,4 +1,5 @@ /* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, David Bauer * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -21,36 +22,8 @@ #include / { - model = "AVM FRITZ!Box 4040"; - compatible = "avm,fritzbox-4040", "qcom,ipq4019"; - - aliases { - led-boot = &power; - led-failsafe = &flash; - led-running = &power; - led-upgrade = &flash; - }; - - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - tz_apps@87b80000 { - reg = <0x87b80000 0x280000>; - reusable; - }; - - smem@87e00000 { - reg = <0x87e00000 0x080000>; - no-map; - }; - - tz@87e80000 { - reg = <0x87e80000 0x180000>; - no-map; - }; - }; + model = "Netgear EX61X0v2"; + compatible = "netgear,ex61x0v2", "qcom,ipq4019"; soc { mdio@90000 { @@ -67,12 +40,6 @@ qcom,wifi_glb_cfg = ; }; - tcsr@194b000 { - compatible = "qcom,tcsr"; - reg = <0x194b000 0x100>; - qcom,usb-hsphy-mode-select = ; - }; - ess_tcsr@1953000 { compatible = "qcom,tcsr"; reg = <0x1953000 0x1000>; @@ -85,103 +52,118 @@ qcom,wifi_noc_memtype_m0_m2 = ; }; - usb2@60f8800 { - status = "ok"; - }; - serial@78af000 { pinctrl-0 = <&serial_pins>; pinctrl-names = "default"; - status = "ok"; - }; - - usb3@8af8800 { - status = "ok"; - }; - - crypto@8e3a000 { - status = "ok"; - }; - - wifi@a000000 { status = "okay"; }; - wifi@a800000 { + crypto@8e3a000 { status = "okay"; }; watchdog@b017000 { - status = "ok"; + status = "okay"; }; - qca8075: ess-switch@c000000 { + ess-switch@c000000 { status = "okay"; - - #gpio-cells = <2>; - gpio-controller; - - enable-usb-power { - gpio-hog; - line-name = "enable USB3 power"; - gpios = <7 GPIO_ACTIVE_HIGH>; - output-high; - }; }; edma@c080000 { status = "okay"; + qcom,num_gmac = <1>; }; }; + aliases { + led-boot = &power_amber; + led-failsafe = &power_amber; + led-running = &power_green; + led-upgrade = &power_amber; + }; + gpio-keys { compatible = "gpio-keys"; - wlan { - label = "wlan"; - gpios = <&tlmm 58 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - wps { label = "wps"; - gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + gpios = <&tlmm 0 GPIO_ACTIVE_LOW>; linux,code = ; }; + + reset { + label = "reset"; + gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + ranges; + + gpio-sck = <&tlmm 5 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&tlmm 4 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + + led_gpio: led_gpio@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + spi-max-frequency = <1000000>; + }; }; gpio-leds { compatible = "gpio-leds"; - wlan { - label = "fritz4040:green:wlan"; - gpios = <&qca8075 1 GPIO_ACTIVE_HIGH>; + power_amber: power_amber { + label = "ex61x0v2:amber:power"; + gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>; }; - panic: info_red { - label = "fritz4040:red:info"; - gpios = <&qca8075 3 GPIO_ACTIVE_HIGH>; - panic-indicator; + power_green: power_green { + label = "ex61x0v2:green:power"; + gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>; }; - wan { - label = "fritz4040:green:wan"; - gpios = <&qca8075 5 GPIO_ACTIVE_HIGH>; + right { + label = "ex61x0v2:blue:right"; + gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>; }; - power: power { - label = "fritz4040:green:power"; - gpios = <&qca8075 11 GPIO_ACTIVE_HIGH>; + left { + label = "ex61x0v2:blue:left"; + gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>; }; - lan { - label = "fritz4040:green:lan"; - gpios = <&qca8075 13 GPIO_ACTIVE_HIGH>; + client_green { + label = "ex61x0v2:green:client"; + gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>; }; - flash: info_amber { - label = "fritz4040:amber:info"; - gpios = <&qca8075 15 GPIO_ACTIVE_HIGH>; + client_red { + label = "ex61x0v2:red:client"; + gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>; + }; + + router_green { + label = "ex61x0v2:green:router"; + gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>; + }; + + router_red { + label = "ex61x0v2:red:router"; + gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "ex61x0v2:green:wps"; + gpios = <&tlmm 1 GPIO_ACTIVE_LOW>; }; }; }; @@ -196,14 +178,13 @@ }; spi_0_pins: spi_0_pinmux { - mux { + pin { function = "blsp_spi0"; pins = "gpio55", "gpio56", "gpio57"; drive-strength = <12>; bias-disable; }; - - mux_cs { + pin_cs { function = "gpio"; pins = "gpio54"; drive-strength = <2>; @@ -213,28 +194,16 @@ }; }; -&cryptobam { - status = "ok"; -}; - -&blsp_dma { - status = "ok"; -}; - -&spi_0 { /* BLSP1 QUP1 */ +&spi_0 { pinctrl-0 = <&spi_0_pins>; pinctrl-names = "default"; - status = "ok"; - cs-gpios = <&tlmm 54 0>; + status = "okay"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; - mx25l25635f@0 { + mx25l12805d@0 { compatible = "jedec,spi-nor"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; spi-max-frequency = <24000000>; - status = "ok"; - m25p,fast-read; partitions { compatible = "fixed-partitions"; @@ -246,77 +215,93 @@ reg = <0x00000000 0x00040000>; read-only; }; + partition1@40000 { label = "MIBIB"; reg = <0x00040000 0x00020000>; read-only; }; + partition2@60000 { label = "QSEE"; reg = <0x00060000 0x00060000>; read-only; }; + partition3@c0000 { label = "CDT"; reg = <0x000c0000 0x00010000>; read-only; }; + partition4@d0000 { label = "DDRPARAMS"; reg = <0x000d0000 0x00010000>; read-only; }; - partition5@e0000 { - label = "APPSBLENV"; /* uboot env - empty */ + + partition5@E0000 { + label = "APPSBLENV"; reg = <0x000e0000 0x00010000>; read-only; }; - partition6@f0000 { - label = "urlader"; /* APPSBL */ - reg = <0x000f0000 0x0002dc000>; + + partition6@F0000 { + label = "APPSBL"; + reg = <0x000f0000 0x00080000>; read-only; }; - partition7@11dc00 { - /* make a backup of this partition! */ - label = "urlader_config"; - reg = <0x0011dc00 0x00002400>; + + partition7@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; read-only; }; - partition8@120000 { - label = "tffs1"; - reg = <0x00120000 0x00080000>; + + partition8@180000 { + label = "config"; + reg = <0x00180000 0x00010000>; read-only; }; - partition9@1a0000 { - label = "tffs2"; - reg = <0x001a0000 0x00080000>; + + partition9@190000 { + label = "pot"; + reg = <0x00190000 0x00010000>; read-only; }; - partition10@220000 { - label = "uboot"; - reg = <0x00220000 0x00080000>; + + partition10@1a0000 { + label = "dnidata"; + reg = <0x001a0000 0x00010000>; read-only; }; - partition11@2A0000 { + + partition11@1b0000 { label = "firmware"; - reg = <0x002a0000 0x01c60000>; + reg = <0x001b0000 0x00e10000>; }; - partition12@1f00000 { - label = "jffs2"; - reg = <0x01f00000 0x00100000>; + + partition12@fc0000 { + label = "language"; + reg = <0x00fc0000 0x00040000>; + read-only; }; }; }; }; -&usb3_ss_phy { - status = "ok"; +&blsp_dma { + status = "okay"; }; -&usb3_hs_phy { - status = "ok"; +&cryptobam { + status = "okay"; }; -&usb2_hs_phy { - status = "ok"; +&wifi0 { + status = "okay"; +}; + +&wifi1 { + status = "okay"; }; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-fritz4040.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-fritz4040.dts index 4b5cbcac3..3768cd87b 100644 --- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-fritz4040.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-fritz4040.dts @@ -31,27 +31,6 @@ led-upgrade = &flash; }; - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - tz_apps@87b80000 { - reg = <0x87b80000 0x280000>; - reusable; - }; - - smem@87e00000 { - reg = <0x87e00000 0x080000>; - no-map; - }; - - tz@87e80000 { - reg = <0x87e80000 0x180000>; - no-map; - }; - }; - soc { mdio@90000 { status = "okay"; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts new file mode 100644 index 000000000..e12a857f9 --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts @@ -0,0 +1,257 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2018, Robert Marko + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include "qcom-ipq4019.dtsi" +#include "qcom-ipq4019-bus.dtsi" +#include +#include +#include + +/ { + model = "8devices Jalapeno"; + compatible = "8dev,jalapeno", "qcom,ipq4019"; + + soc { + mdio@90000 { + status = "okay"; + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + counter@4a1000 { + compatible = "qcom,qca-gcnt"; + reg = <0x4a1000 0x4>; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + /* select hostmode */ + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + status = "okay"; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb2: usb2@60f8800 { + status = "okay"; + }; + + serial@78af000 { + pinctrl-0 = <&serial_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + usb3: usb3@8af8800 { + status = "okay"; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + ess-switch@c000000 { + status = "okay"; + switch_lan_bmp = <0x10>; /* lan port bitmap */ + }; + + edma@c080000 { + status = "okay"; + }; + }; +}; + +&tlmm { + mdio_pins: mdio_pinmux { + pinmux_1 { + pins = "gpio53"; + function = "mdio"; + }; + pinmux_2 { + pins = "gpio52"; + function = "mdc"; + }; + pinconf { + pins = "gpio52", "gpio53"; + bias-pull-up; + }; + }; + + serial_pins: serial_pinmux { + mux { + pins = "gpio60", "gpio61"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + spi_0_pins: spi_0_pinmux { + pin { + function = "blsp_spi0"; + pins = "gpio55", "gpio56", "gpio57"; + drive-strength = <2>; + bias-disable; + }; + pin_cs { + function = "gpio"; + pins = "gpio54", "gpio59"; + drive-strength = <2>; + bias-disable; + output-high; + }; + }; +}; + +&blsp_dma { + status = "okay"; +}; + +&spi_0 { + pinctrl-0 = <&spi_0_pins>; + pinctrl-names = "default"; + cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <24000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "SBL1"; + reg = <0x00000000 0x00040000>; + read-only; + }; + partition1@40000 { + label = "MIBIB"; + reg = <0x00040000 0x00020000>; + read-only; + }; + partition2@60000 { + label = "QSEE"; + reg = <0x00060000 0x00060000>; + read-only; + }; + partition3@c0000 { + label = "CDT"; + reg = <0x000c0000 0x00010000>; + read-only; + }; + partition4@d0000 { + label = "DDRPARAMS"; + reg = <0x000d0000 0x00010000>; + read-only; + }; + partition5@e0000 { + label = "APPSBLENV"; /* uboot env*/ + reg = <0x000e0000 0x00010000>; + read-only; + }; + partition5@f0000 { + label = "APPSBL"; /* uboot */ + reg = <0x000f0000 0x00080000>; + read-only; + }; + partition5@170000 { + label = "ART"; + reg = <0x00170000 0x00010000>; + read-only; + }; + }; + }; + + mt29f@1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + compatible = "spinand,mt29f", "w25n01gv"; + reg = <1>; + spi-max-frequency = <24000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition0@0 { + label = "ubi"; + reg = <0x00000000 0x08000000>; + }; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&gmac0 { + vlan_tag = <1 0x31>; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; +}; + +&wifi1 { + status = "okay"; + qcom,ath10k-calibration-variant = "8devices-Jalapeno"; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&usb2_hs_phy { + status = "okay"; +}; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts index 446da0451..e0bb968f5 100644 --- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts @@ -36,22 +36,6 @@ led-upgrade = &power; }; - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - smem@87e00000 { - reg = <0x87e00000 0x080000>; - no-map; - }; - - tz@87e80000 { - reg = <0x87e80000 0x180000>; - no-map; - }; - }; - soc { mdio@90000 { status = "okay"; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts index 6ee749942..db6ff7d73 100644 --- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts @@ -36,17 +36,6 @@ led-upgrade = &power; }; - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - rsvd1@87E00000 { - reg = <0x87e00000 0x200000>; - no-map; - }; - }; - soc { spi_0: spi@78b5000 { status = "disabled"; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts index 00fc24dba..a99a3d1e8 100644 --- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts @@ -26,27 +26,6 @@ model = "Compex WPJ428"; compatible = "compex,wpj428", "qcom,ipq4019"; - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - tz_apps@87b80000 { - reg = <0x87b80000 0x280000>; - no-map; - }; - - smem@87e00000 { - reg = <0x87e00000 0x080000>; - no-map; - }; - - tz@87e80000 { - reg = <0x87e80000 0x180000>; - no-map; - }; - }; - soc { mdio@90000 { status = "okay"; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts index 401a133b8..cbbc1e140 100644 --- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts @@ -35,47 +35,6 @@ reg = <0x80000000 0x10000000>; }; - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - apps_bl@87000000 { - reg = <0x87000000 0x400000>; - no-map; - }; - - sbl@87400000 { - reg = <0x87400000 0x100000>; - no-map; - }; - - cnss_debug@87500000 { - reg = <0x87500000 0x600000>; - no-map; - }; - - cpu_context_dump@87b00000 { - reg = <0x87b00000 0x080000>; - no-map; - }; - - tz_apps@87b80000 { - reg = <0x87b80000 0x280000>; - no-map; - }; - - smem@87e00000 { - reg = <0x87e00000 0x080000>; - no-map; - }; - - tz@87e80000 { - reg = <0x87e80000 0x180000>; - no-map; - }; - }; - soc { mdio@90000 { status = "okay"; diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts index a709ae96b..8bbfb0ba0 100644 --- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts @@ -34,27 +34,6 @@ reg = <0x80000000 0x10000000>; }; - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - tz_apps@87b80000 { - reg = <0x87b80000 0x280000>; - reusable; - }; - - smem@87e00000 { - reg = <0x87e00000 0x080000>; - no-map; - }; - - tz@87e80000 { - reg = <0x87e80000 0x180000>; - no-map; - }; - }; - soc { mdio@90000 { status = "okay"; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-a42.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-a42.dts deleted file mode 100644 index 887be993e..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-a42.dts +++ /dev/null @@ -1,244 +0,0 @@ -/* Copyright (c) 2015, The Linux Foundation. All rights reserved. - * Copyright (c) 2017, Sven Eckelmann - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include "qcom-ipq4019.dtsi" -#include "qcom-ipq4019-bus.dtsi" -#include -#include -#include - -/ { - model = "OpenMesh A42"; - compatible = "openmesh,a42", "qcom,ipq4019"; - - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - rsvd1@87000000 { - reg = <0x87000000 0x500000>; - no-map; - }; - - wifi_dump@87500000 { - reg = <0x87500000 0x600000>; - no-map; - }; - - rsvd2@87B00000 { - reg = <0x87b00000 0x500000>; - no-map; - }; - }; - - soc { - tcsr@194b000 { - /* select hostmode */ - compatible = "qcom,tcsr"; - reg = <0x194b000 0x100>; - qcom,usb-hsphy-mode-select = ; - status = "ok"; - }; - - ess_tcsr@1953000 { - compatible = "qcom,tcsr"; - reg = <0x1953000 0x1000>; - qcom,ess-interface-select = ; - }; - - tcsr@1949000 { - compatible = "qcom,tcsr"; - reg = <0x1949000 0x100>; - qcom,wifi_glb_cfg = ; - }; - - tcsr@1957000 { - compatible = "qcom,tcsr"; - reg = <0x1957000 0x100>; - qcom,wifi_noc_memtype_m0_m2 = ; - }; - - pinctrl@1000000 { - serial_pins: serial_pinmux { - mux { - pins = "gpio60", "gpio61"; - function = "blsp_uart0"; - bias-disable; - }; - }; - - spi_0_pins: spi_0_pinmux { - pinmux { - function = "blsp_spi0"; - pins = "gpio55", "gpio56", "gpio57"; - }; - pinmux_cs { - function = "gpio"; - pins = "gpio54"; - }; - pinconf { - pins = "gpio55", "gpio56", "gpio57"; - drive-strength = <12>; - bias-disable; - }; - pinconf_cs { - pins = "gpio54"; - drive-strength = <2>; - bias-disable; - output-high; - }; - }; - }; - - blsp_dma: dma@7884000 { - status = "ok"; - }; - - spi_0: spi@78b5000 { - pinctrl-0 = <&spi_0_pins>; - pinctrl-names = "default"; - status = "ok"; - cs-gpios = <&tlmm 54 0>; - - m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <24000000>; - - /* partitions are passed via bootloader */ - }; - }; - - serial@78af000 { - pinctrl-0 = <&serial_pins>; - pinctrl-names = "default"; - status = "ok"; - }; - - cryptobam: dma@8e04000 { - status = "ok"; - }; - - crypto@8e3a000 { - status = "ok"; - }; - - watchdog@b017000 { - status = "ok"; - }; - - usb2_hs_phy: hsphy@a8000 { - status = "ok"; - }; - - usb2: usb2@60f8800 { - status = "ok"; - }; - - mdio@90000 { - status = "okay"; - }; - - ess-switch@c000000 { - status = "okay"; - }; - - ess-psgmii@98000 { - status = "okay"; - }; - - edma@c080000 { - status = "okay"; - }; - - wifi@a000000 { - status = "okay"; - qcom,ath10k-calibration-variant = "OM-A42"; - }; - - wifi@a800000 { - status = "okay"; - qcom,ath10k-calibration-variant = "OM-A42"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - gpios = <&tlmm 59 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - aliases { - led-boot = &power; - led-failsafe = &power; - led-running = &power; - led-upgrade = &power; - }; - - gpio-leds { - compatible = "gpio-leds"; - - red { - label = "a42:red:status"; - gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "default-off"; - }; - - power: green { - label = "a42:green:status"; - gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; - }; - - blue { - label = "a42:blue:status"; - gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "default-off"; - }; - }; - - watchdog { - compatible = "linux,wdt-gpio"; - gpios = <&tlmm 5 GPIO_ACTIVE_LOW>; - hw_algo = "toggle"; - /* hw_margin_ms is actually 300s but driver limits it to 60s */ - hw_margin_ms = <60000>; - always-running; - }; -}; - -&gmac0 { - qcom,phy_mdio_addr = <4>; - qcom,poll_required = <1>; - qcom,forced_speed = <1000>; - qcom,forced_duplex = <1>; - vlan_tag = <2 0x20>; -}; - -&gmac1 { - qcom,phy_mdio_addr = <3>; - qcom,poll_required = <1>; - qcom,forced_speed = <1000>; - qcom,forced_duplex = <1>; - vlan_tag = <1 0x10>; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi deleted file mode 100644 index 169505973..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi +++ /dev/null @@ -1,1142 +0,0 @@ -/* Copyright (c) 2015, The Linux Foundation. All rights reserved. - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include - -/ { - -soc { - ad_hoc_bus: ad-hoc-bus { - compatible = "qcom,msm-bus-device"; - reg = <0x580000 0x14000>, - <0x500000 0x11000>; - reg-names = "snoc-base", "pcnoc-base"; - - /*Buses*/ - - fab_pcnoc: fab-pcnoc { - cell-id = ; - label = "fab-pcnoc"; - qcom,fab-dev; - qcom,base-name = "pcnoc-base"; - qcom,bypass-qos-prg; - qcom,bus-type = <1>; - qcom,qos-off = <0x1000>; - qcom,base-offset = <0x0>; - clocks = <>; - }; - - fab_snoc: fab-snoc { - cell-id = ; - label = "fab-snoc"; - qcom,fab-dev; - qcom,base-name = "snoc-base"; - qcom,bypass-qos-prg; - qcom,bus-type = <1>; - qcom,qos-off = <0x80>; - qcom,base-offset = <0x0>; - clocks = <>; - }; - - /*Masters*/ - - mas_blsp_bam: mas-blsp-bam { - cell-id = ; - label = "mas-blsp-bam"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_m_0>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_usb2_bam: mas-usb2-bam { - cell-id = ; - label = "mas-usb2-bam"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,qport = <15>; - qcom,qos-mode = "fixed"; - qcom,connections = <&slv_pcnoc_snoc>; - qcom,prio1 = <1>; - qcom,prio0 = <1>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_adss_dma0: mas-adss-dma0 { - cell-id = ; - label = "mas-adss-dma0"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_m_1>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_adss_dma1: mas-adss-dma1 { - cell-id = ; - label = "mas-adss-dma1"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_m_1>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_adss_dma2: mas-adss-dma2 { - cell-id = ; - label = "mas-adss-dma2"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_m_1>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_adss_dma3: mas-adss-dma3 { - cell-id = ; - label = "mas-adss-dma3"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_m_1>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_qpic_bam: mas-qpic-bam { - cell-id = ; - label = "mas-qpic-bam"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_m_0>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_spdm: mas-spdm { - cell-id = ; - label = "mas-spdm"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_m_0>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_pcnoc_cfg: mas-pcnoc-cfg { - cell-id = ; - label = "mas-pcnoc-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&slv_srvc_pcnoc>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - }; - - mas_tic: mas-tic { - cell-id = ; - label = "mas-tic"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_int_0 &slv_pcnoc_snoc>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - }; - - mas_sdcc_bam: mas-sdcc-bam { - cell-id = ; - label = "mas-sdcc-bam"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,qport = <14>; - qcom,qos-mode = "fixed"; - qcom,connections = <&slv_pcnoc_snoc>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg - &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg - &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg - &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg - &slv_srif &slv_prng &slv_qdss_cfg - &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt - &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg - &slv_boot_rom &slv_security &slv_spdm - &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg - &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl - &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg - &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg - &slv_sdcc_cfg &slv_snoc_cfg>; - }; - - mas_snoc_pcnoc: mas-snoc-pcnoc { - cell-id = ; - label = "mas-snoc-pcnoc"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,qport = <16>; - qcom,qos-mode = "fixed"; - qcom,connections = <&pcnoc_int_0>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - }; - - mas_qdss_dap: mas-qdss-dap { - cell-id = ; - label = "mas-qdss-dap"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&pcnoc_int_0 &slv_pcnoc_snoc>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - }; - - mas_ddrc_snoc: mas-ddrc-snoc { - cell-id = ; - label = "mas-ddrc-snoc"; - qcom,buswidth = <16>; - qcom,ap-owned; - qcom,connections = <&snoc_int_0 &snoc_int_1 - &slv_pcie>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_snoc_ddrc_m1 &slv_srvc_snoc>; - }; - - mas_wss_0: mas-wss-0 { - cell-id = ; - label = "mas-wss-0"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,qport = <26>; - qcom,qos-mode = "fixed"; - qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie - &slv_wss1_cfg &slv_wss0_cfg &slv_crypto_cfg - &slv_srvc_snoc>; - }; - - mas_wss_1: mas-wss-1 { - cell-id = ; - label = "mas-wss-1"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,qport = <27>; - qcom,qos-mode = "fixed"; - qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie - &slv_wss1_cfg &slv_wss0_cfg &slv_crypto_cfg - &slv_srvc_snoc>; - }; - - mas_crypto: mas-crypto { - cell-id = ; - label = "mas-crypto"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,qport = <5>; - qcom,qos-mode = "fixed"; - qcom,connections = <&snoc_int_0 &snoc_int_1 - &slv_snoc_ddrc_m1>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss - &slv_pcie &slv_qdss_stm &slv_crypto_cfg - &slv_srvc_snoc>; - }; - - mas_ess: mas-ess { - cell-id = ; - label = "mas-ess"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,qport = <44>; - qcom,qos-mode = "fixed"; - qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss - &slv_pcie &slv_qdss_stm &slv_wss1_cfg - &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; - }; - - mas_pcie: mas-pcie { - cell-id = ; - label = "mas-pcie"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,qport = <6>; - qcom,qos-mode = "fixed"; - qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie - &slv_qdss_stm &slv_wss1_cfg &slv_wss0_cfg - &slv_crypto_cfg &slv_srvc_snoc>; - }; - - mas_usb3: mas-usb3 { - cell-id = ; - label = "mas-usb3"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,qport = <7>; - qcom,qos-mode = "fixed"; - qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss - &slv_pcie &slv_qdss_stm &slv_wss1_cfg - &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; - }; - - mas_qdss_etr: mas-qdss-etr { - cell-id = ; - label = "mas-qdss-etr"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,qport = <544>; - qcom,qos-mode = "fixed"; - qcom,connections = <&qdss_int>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss - &slv_pcie &slv_qdss_stm &slv_wss1_cfg - &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; - }; - - mas_qdss_bamndp: mas-qdss-bamndp { - cell-id = ; - label = "mas-qdss-bamndp"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,qport = <576>; - qcom,qos-mode = "fixed"; - qcom,connections = <&qdss_int>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss - &slv_pcie &slv_qdss_stm &slv_wss1_cfg - &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; - }; - - mas_pcnoc_snoc: mas-pcnoc-snoc { - cell-id = ; - label = "mas-pcnoc-snoc"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,qport = <384>; - qcom,qos-mode = "fixed"; - qcom,connections = <&snoc_int_0 &snoc_int_1 - &slv_snoc_ddrc_m1>; - qcom,prio1 = <0>; - qcom,prio0 = <0>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,blacklist = <&slv_srvc_snoc>; - }; - - mas_snoc_cfg: mas-snoc-cfg { - cell-id = ; - label = "mas-snoc-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&slv_srvc_snoc>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - }; - - /*Internal nodes*/ - - - pcnoc_m_0: pcnoc-m-0 { - cell-id = ; - label = "pcnoc-m-0"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,qport = <12>; - qcom,qos-mode = "fixed"; - qcom,connections = <&slv_pcnoc_snoc>; - qcom,prio1 = <1>; - qcom,prio0 = <1>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_m_1: pcnoc-m-1 { - cell-id = ; - label = "pcnoc-m-1"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,qport = <13>; - qcom,qos-mode = "fixed"; - qcom,connections = <&slv_pcnoc_snoc>; - qcom,prio1 = <1>; - qcom,prio0 = <1>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_int_0: pcnoc-int-0 { - cell-id = ; - label = "pcnoc-int-0"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,connections = < &pcnoc_s_1 &pcnoc_s_2 &pcnoc_s_0 - &pcnoc_s_4 &pcnoc_s_5 - &pcnoc_s_6 &pcnoc_s_7 - &pcnoc_s_8 &pcnoc_s_9 - &pcnoc_s_3>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_0: pcnoc-s-0 { - cell-id = ; - label = "pcnoc-s-0"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&slv_clk_ctl &slv_tcsr &slv_security - &slv_tlmm>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_1: pcnoc-s-1 { - cell-id = ; - label = "pcnoc-s-1"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = < &slv_prng_apu_cfg &slv_prng&slv_imem_cfg>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_2: pcnoc-s-2 { - cell-id = ; - label = "pcnoc-s-2"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = < &slv_spdm &slv_pcnoc_mpu_cfg &slv_pcnoc_cfg - &slv_boot_rom>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_3: pcnoc-s-3 { - cell-id = ; - label = "pcnoc-s-3"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = < &slv_qdss_cfg&slv_gcnt &slv_snoc_cfg - &slv_snoc_mpu_cfg>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_4: pcnoc-s-4 { - cell-id = ; - label = "pcnoc-s-4"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&slv_adss_cfg &slv_adss_vmidmt_cfg &slv_adss_apu>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_5: pcnoc-s-5 { - cell-id = ; - label = "pcnoc-s-5"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = <&slv_qhss_apu_cfg &slv_fephy_cfg &slv_mdio - &slv_srif>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_6: pcnoc-s-6 { - cell-id = ; - label = "pcnoc-s-6"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = < &slv_ddrc_mpu0_cfg &slv_ddrc_apu_cfg &slv_ddrc_mpu2_cfg - &slv_ddrc_cfg &slv_ddrc_mpu1_cfg>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_7: pcnoc-s-7 { - cell-id = ; - label = "pcnoc-s-7"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = < &slv_ess_apu_cfg &slv_usb2_cfg&slv_ess_vmidmt_cfg>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_8: pcnoc-s-8 { - cell-id = ; - label = "pcnoc-s-8"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = < &slv_sdcc_cfg &slv_qpic_cfg&slv_blsp_cfg>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - pcnoc_s_9: pcnoc-s-9 { - cell-id = ; - label = "pcnoc-s-9"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,connections = < &slv_wss1_apu_cfg &slv_wss1_vmidmt_cfg&slv_wss0_vmidmt_cfg - &slv_wss0_apu_cfg>; - qcom,bus-dev = <&fab_pcnoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - snoc_int_0: snoc-int-0 { - cell-id = ; - label = "snoc-int-0"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,connections = < &slv_ocimem&slv_qdss_stm>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - snoc_int_1: snoc-int-1 { - cell-id = ; - label = "snoc-int-1"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,connections = < &slv_crypto_cfg &slv_a7ss &slv_ess_cfg - &slv_usb3_cfg &slv_wss1_cfg - &slv_wss0_cfg>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - - qdss_int: qdss-int { - cell-id = ; - label = "qdss-int"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; - qcom,bus-dev = <&fab_snoc>; - qcom,mas-rpm-id = ; - qcom,slv-rpm-id = ; - }; - /*Slaves*/ - - slv_clk_ctl:slv-clk-ctl { - cell-id = ; - label = "slv-clk-ctl"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_security:slv-security { - cell-id = ; - label = "slv-security"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_tcsr:slv-tcsr { - cell-id = ; - label = "slv-tcsr"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_tlmm:slv-tlmm { - cell-id = ; - label = "slv-tlmm"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_imem_cfg:slv-imem-cfg { - cell-id = ; - label = "slv-imem-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_prng:slv-prng { - cell-id = ; - label = "slv-prng"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_prng_apu_cfg:slv-prng-apu-cfg { - cell-id = ; - label = "slv-prng-apu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_boot_rom:slv-boot-rom { - cell-id = ; - label = "slv-boot-rom"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_spdm:slv-spdm { - cell-id = ; - label = "slv-spdm"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_pcnoc_cfg:slv-pcnoc-cfg { - cell-id = ; - label = "slv-pcnoc-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_pcnoc_mpu_cfg:slv-pcnoc-mpu-cfg { - cell-id = ; - label = "slv-pcnoc-mpu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_gcnt:slv-gcnt { - cell-id = ; - label = "slv-gcnt"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_qdss_cfg:slv-qdss-cfg { - cell-id = ; - label = "slv-qdss-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_snoc_cfg:slv-snoc-cfg { - cell-id = ; - label = "slv-snoc-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_snoc_mpu_cfg:slv-snoc-mpu-cfg { - cell-id = ; - label = "slv-snoc-mpu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_adss_cfg:slv-adss-cfg { - cell-id = ; - label = "slv-adss-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_adss_apu:slv-adss-apu { - cell-id = ; - label = "slv-adss-apu"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_adss_vmidmt_cfg:slv-adss-vmidmt-cfg { - cell-id = ; - label = "slv-adss-vmidmt-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_qhss_apu_cfg:slv-qhss-apu-cfg { - cell-id = ; - label = "slv-qhss-apu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_mdio:slv-mdio { - cell-id = ; - label = "slv-mdio"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_fephy_cfg:slv-fephy-cfg { - cell-id = ; - label = "slv-fephy-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_srif:slv-srif { - cell-id = ; - label = "slv-srif"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_ddrc_cfg:slv-ddrc-cfg { - cell-id = ; - label = "slv-ddrc-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_ddrc_apu_cfg:slv-ddrc-apu-cfg { - cell-id = ; - label = "slv-ddrc-apu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_ddrc_mpu0_cfg:slv-ddrc-mpu0-cfg { - cell-id = ; - label = "slv-ddrc-mpu0-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_ddrc_mpu1_cfg:slv-ddrc-mpu1-cfg { - cell-id = ; - label = "slv-ddrc-mpu1-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_ddrc_mpu2_cfg:slv-ddrc-mpu2-cfg { - cell-id = ; - label = "slv-ddrc-mpu2-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_ess_vmidmt_cfg:slv-ess-vmidmt-cfg { - cell-id = ; - label = "slv-ess-vmidmt-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_ess_apu_cfg:slv-ess-apu-cfg { - cell-id = ; - label = "slv-ess-apu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_usb2_cfg:slv-usb2-cfg { - cell-id = ; - label = "slv-usb2-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_blsp_cfg:slv-blsp-cfg { - cell-id = ; - label = "slv-blsp-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_qpic_cfg:slv-qpic-cfg { - cell-id = ; - label = "slv-qpic-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_sdcc_cfg:slv-sdcc-cfg { - cell-id = ; - label = "slv-sdcc-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_wss0_vmidmt_cfg:slv-wss0-vmidmt-cfg { - cell-id = ; - label = "slv-wss0-vmidmt-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_wss0_apu_cfg:slv-wss0-apu-cfg { - cell-id = ; - label = "slv-wss0-apu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_wss1_vmidmt_cfg:slv-wss1-vmidmt-cfg { - cell-id = ; - label = "slv-wss1-vmidmt-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_wss1_apu_cfg:slv-wss1-apu-cfg { - cell-id = ; - label = "slv-wss1-apu-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_pcnoc_snoc:slv-pcnoc-snoc { - cell-id = ; - label = "slv-pcnoc-snoc"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_srvc_pcnoc:slv-srvc-pcnoc { - cell-id = ; - label = "slv-srvc-pcnoc"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_pcnoc>; - qcom,slv-rpm-id = ; - }; - - slv_snoc_ddrc_m1:slv-snoc-ddrc-m1 { - cell-id = ; - label = "slv-snoc-ddrc-m1"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_a7ss:slv-a7ss { - cell-id = ; - label = "slv-a7ss"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_ocimem:slv-ocimem { - cell-id = ; - label = "slv-ocimem"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_wss0_cfg:slv-wss0-cfg { - cell-id = ; - label = "slv-wss0-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_wss1_cfg:slv-wss1-cfg { - cell-id = ; - label = "slv-wss1-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_pcie:slv-pcie { - cell-id = ; - label = "slv-pcie"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_usb3_cfg:slv-usb3-cfg { - cell-id = ; - label = "slv-usb3-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_crypto_cfg:slv-crypto-cfg { - cell-id = ; - label = "slv-crypto-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_ess_cfg:slv-ess-cfg { - cell-id = ; - label = "slv-ess-cfg"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_qdss_stm:slv-qdss-stm { - cell-id = ; - label = "slv-qdss-stm"; - qcom,buswidth = <4>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - - slv_srvc_snoc:slv-srvc-snoc { - cell-id = ; - label = "slv-srvc-snoc"; - qcom,buswidth = <8>; - qcom,ap-owned; - qcom,bus-dev = <&fab_snoc>; - qcom,slv-rpm-id = ; - }; - }; -}; - -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-rt-ac58u.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-rt-ac58u.dts deleted file mode 100644 index 04f48ae9d..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-rt-ac58u.dts +++ /dev/null @@ -1,197 +0,0 @@ -/* Copyright (c) 2015, The Linux Foundation. All rights reserved. - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include "qcom-ipq4019-ap.dk01.1.dtsi" -#include "qcom-ipq4019-bus.dtsi" -#include -#include - -/ { - model = "ASUS RT-AC58U"; - compatible = "asus,rt-ac58u", "qcom,ipq4019"; - - memory { - device_type = "memory"; - reg = <0x80000000 0x8000000>; - }; - - aliases { - led-boot = &power; - led-failsafe = &power; - led-running = &power; - led-upgrade = &power; - }; - - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - rsvd1@87E00000 { - reg = <0x87e00000 0x200000>; - no-map; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - power: status { - label = "rt-ac58u:blue:status"; - gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; - }; - - wan { - label = "rt-ac58u:blue:wan"; - gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>; - }; - - wlan2G { - label = "rt-ac58u:blue:wlan2G"; - gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; - }; - - wan5G { - label = "rt-ac58u:blue:wlan5G"; - gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; - }; - - usb { - label = "rt-ac58u:blue:usb"; - gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; - }; - - lan { - label = "rt-ac58u:blue:lan"; - gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&spi_0_pins { - pinmux_cs { - function = "gpio"; - pins = "gpio54", "gpio59"; - }; - pinconf_cs { - pins = "gpio54", "gpio59"; - drive-strength = <2>; - bias-disable; - output-high; - }; -}; - -&spi_0 { /* BLSP1 QUP1 */ - cs-gpios = <&tlmm 54 0>, - <&tlmm 59 0>; - - m25p80@0 { - #address-cells = <1>; - #size-cells = <0>; - /* - * U-boot looks for "n25q128a11" node, - * if we don't have it, it will spit out the following warning: - * "ipq: fdt fixup unable to find compatible node". - */ - compatible = "mx25l1606e", "n25q128a11", "jedec,spi-nor"; - reg = <0>; - linux,modalias = "m25p80", "mx25l1606e", "n25q128a11"; - spi-max-frequency = <24000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition0@0 { - label = "SBL1"; - reg = <0x00000000 0x00040000>; - read-only; - }; - partition1@40000 { - label = "MIBIB"; - reg = <0x00040000 0x00020000>; - read-only; - }; - partition2@60000 { - label = "QSEE"; - reg = <0x00060000 0x00060000>; - read-only; - }; - partition3@c0000 { - label = "CDT"; - reg = <0x000c0000 0x00010000>; - read-only; - }; - partition4@d0000 { - label = "DDRPARAMS"; - reg = <0x000d0000 0x00010000>; - read-only; - }; - partition5@e0000 { - label = "APPSBLENV"; /* uboot env*/ - reg = <0x000e0000 0x00010000>; - read-only; - }; - partition5@f0000 { - label = "APPSBL"; /* uboot */ - reg = <0x000f0000 0x00080000>; - read-only; - }; - partition5@170000 { - label = "ART"; - reg = <0x00170000 0x00010000>; - read-only; - }; - /* 0x00180000 - 0x00200000 unused */ - }; - }; - - mt29f@1 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "spinand,mt29f", "w25n01gv"; - reg = <1>; - spi-max-frequency = <24000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition0@0 { - label = "ubi"; - reg = <0x00000000 0x08000000>; - }; - }; - }; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts deleted file mode 100644 index beace8ecf..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts +++ /dev/null @@ -1,291 +0,0 @@ -/* Copyright (c) 2015, The Linux Foundation. All rights reserved. - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include "qcom-ipq4019-ap.dk04.1.dtsi" -#include "qcom-ipq4019-bus.dtsi" -#include -#include -#include - -/ { - model = "ASUS RT-ACRH17"; - compatible = "asus,rt-acrh17", "qcom,ipq4019"; - - memory { - device_type = "memory"; - reg = <0x80000000 0x10000000>; - }; - - aliases { - led-boot = &power; - led-failsafe = &power; - led-running = &power; - led-upgrade = &power; - }; - - reserved-memory { - #address-cells = <0x1>; - #size-cells = <0x1>; - ranges; - - rsvd1@87E00000 { - reg = <0x87e00000 0x200000>; - no-map; - }; - }; - - soc { - spi_0: spi@78b5000 { - status = "disabled"; - }; - - pcie0: qcom,pcie@80000 { - compatible = "qcom,msm_pcie"; - cell-index = <0>; - qcom,ctrl-amt = <1>; - - reg = <0x80000 0x2000>, - <0x99000 0x800>, - <0x40000000 0xf1d>, - <0x40000f20 0xa8>, - <0x40100000 0x1000>, - <0x40200000 0x100000>, - <0x40300000 0xd00000>; - reg-names = "parf", "phy", "dm_core", "elbi", - "conf", "io", "bars"; - - #address-cells = <0>; - interrupt-parent = <&pcie0>; - interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12>; - #interrupt-cells = <1>; - interrupt-map-mask = <0xffffffff>; - interrupt-map = <0 &intc 0 141 0 - 1 &intc 0 142 0 - 2 &intc 0 143 0 - 3 &intc 0 144 0 - 4 &intc 0 145 0 - 5 &intc 0 146 0 - 6 &intc 0 147 0 - 7 &intc 0 148 0 - 8 &intc 0 149 0 - 9 &intc 0 150 0 - 10 &intc 0 151 0 - 11 &intc 0 152 0 >; - - interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d", - "int_pls_pme", "int_pme_legacy", "int_pls_err", - "int_aer_legacy", "int_pls_link_up", - "int_pls_link_down", "int_bridge_flush_n","int_wake"; - - qcom,ep-latency = <10>; - - clocks = <&gcc GCC_PCIE_AHB_CLK>, - <&gcc GCC_PCIE_AXI_M_CLK>, - <&gcc GCC_PCIE_AXI_S_CLK>; - - clock-names = "pcie_0_cfg_ahb_clk", - "pcie_0_mstr_axi_clk", - "pcie_0_slv_axi_clk"; - - max-clock-frequency-hz = <0>, <0>, <0>; - - resets = <&gcc PCIE_AXI_M_ARES>, - <&gcc PCIE_AXI_S_ARES>, - <&gcc PCIE_PIPE_ARES>, - <&gcc PCIE_AXI_M_VMIDMT_ARES>, - <&gcc PCIE_AXI_S_XPU_ARES>, - <&gcc PCIE_PARF_XPU_ARES>, - <&gcc PCIE_PHY_ARES>, - <&gcc PCIE_AXI_M_STICKY_ARES>, - <&gcc PCIE_PIPE_STICKY_ARES>, - <&gcc PCIE_PWR_ARES>, - <&gcc PCIE_AHB_ARES>, - <&gcc PCIE_PHY_AHB_ARES>; - - reset-names = "pcie_rst_axi_m_ares", - "pcie_rst_axi_s_ares", - "pcie_rst_pipe_ares", - "pcie_rst_axi_m_vmidmt_ares", - "pcie_rst_axi_s_xpu_ares", - "pcie_rst_parf_xpu_ares", - "pcie_rst_phy_ares", - "pcie_rst_axi_m_sticky_ares", - "pcie_rst_pipe_sticky_ares", - "pcie_rst_pwr_ares", - "pcie_rst_ahb_res", - "pcie_rst_phy_ahb_ares"; - - status = "ok"; - perst-gpio = <&tlmm 38 0>; - wake-gpio = <&tlmm 50 0>; - clkreq-gpio = <&tlmm 39 0>; - }; - - tcsr@194b000 { - /* select hostmode */ - compatible = "qcom,tcsr"; - reg = <0x194b000 0x100>; - qcom,usb-hsphy-mode-select = ; - status = "ok"; - }; - - ess_tcsr@1953000 { - compatible = "qcom,tcsr"; - reg = <0x1953000 0x1000>; - qcom,ess-interface-select = ; - }; - - tcsr@1949000 { - compatible = "qcom,tcsr"; - reg = <0x1949000 0x100>; - qcom,wifi_glb_cfg = ; - }; - - tcsr@1957000 { - compatible = "qcom,tcsr"; - reg = <0x1957000 0x100>; - qcom,wifi_noc_memtype_m0_m2 = ; - }; - - mdio@90000 { - status = "okay"; - }; - - ess-switch@c000000 { - status = "okay"; - }; - - ess-psgmii@98000 { - status = "okay"; - }; - - edma@c080000 { - status = "okay"; - }; - - wifi0: wifi@a000000 { - status = "ok"; - core-id = <0x0>; - qca,msi_addr = <0x0b006040>; - qca,msi_base = <0x40>; - wifi_led_num = <2>; /* Wifi 2G */ - wifi_led_source = <0>; /* source id 0 */ - qcom,mtd-name = "0:ART"; - qcom,cal-offset = <0x1000>; - qcom,cal-len = <12064>; - }; - - wifi1: wifi@a800000 { - status = "disabled"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - power: status { - label = "rt-acrh17:blue:status"; - gpios = <&tlmm 40 GPIO_ACTIVE_LOW>; - }; - - lan1 { - label = "rt-acrh17:blue:lan1"; - gpios = <&tlmm 45 GPIO_ACTIVE_LOW>; - }; - - lan2 { - label = "rt-acrh17:blue:lan2"; - gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; - }; - - lan3 { - label = "rt-acrh17:blue:lan3"; - gpios = <&tlmm 42 GPIO_ACTIVE_LOW>; - }; - - lan4 { - label = "rt-acrh17:blue:lan4"; - gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; - }; - - wan_blue { - label = "rt-acrh17:blue:wan"; - gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>; - }; - - wan_red { - label = "rt-acrh17:red:wan"; - gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>; - }; - - wlan2g { - label = "rt-acrh17:blue:wlan2g"; - gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; - }; - - wlan5g { - label = "rt-acrh17:blue:wlan5g"; - gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&nand_pins { - pullups { - pins = "gpio53", "gpio58", - "gpio59"; - function = "qpic"; - bias-pull-up; - }; - - pulldowns { - pins = "gpio55", "gpio56", - "gpio57", "gpio60", - "gpio62", "gpio63", "gpio64", - "gpio65", "gpio66", "gpio67", - "gpio69"; - function = "qpic"; - bias-pull-down; - }; -}; - -&i2c_0_pins { - pinmux { - function = "blsp_i2c0"; - pins = "gpio10"; - }; - pinconf { - pins = "gpio10"; - drive-strength = <16>; - bias-disable; - }; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts deleted file mode 100644 index 39a0d9656..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ap148.dts +++ /dev/null @@ -1,246 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -/ { - model = "Qualcomm IPQ8064/AP148"; - compatible = "qcom,ipq8064-ap148", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - }; - - chosen { - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - i2c4_pins: i2c4_pinmux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - bias-disable; - }; - - spi_pins: spi_pins { - mux { - pins = "gpio18", "gpio19", "gpio21"; - function = "gsbi5"; - drive-strength = <10>; - bias-none; - }; - }; - nand_pins: nand_pins { - mux { - pins = "gpio34", "gpio35", "gpio36", - "gpio37", "gpio38", "gpio39", - "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - function = "nand"; - drive-strength = <10>; - bias-disable; - }; - pullups { - pins = "gpio39"; - bias-pull-up; - }; - hold { - pins = "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - bias-bus-hold; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - gsbi5: gsbi@1a200000 { - qcom,mode = ; - status = "ok"; - - spi4: spi@1a280000 { - status = "ok"; - spi-max-frequency = <50000000>; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 0>; - - flash: m25p80@0 { - compatible = "s25fl256s1"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - - linux,part-probe = "qcom-smem"; - }; - }; - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - status = "ok"; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - }; - - usb30@1 { - status = "ok"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - force_gen1 = <1>; - }; - - nand@1ac00000 { - status = "ok"; - - pinctrl-0 = <&nand_pins>; - pinctrl-names = "default"; - - cs0 { - reg = <0>; - compatible = "qcom,nandcs"; - - nand-ecc-strength = <4>; - nand-bus-width = <8>; - nand-ecc-step-size = <512>; - - linux,part-probe = "qcom-smem"; - }; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts deleted file mode 100644 index a4fd13429..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-c2600.dts +++ /dev/null @@ -1,500 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -#include - -/ { - model = "TP-Link Archer C2600"; - compatible = "tplink,c2600", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - - led-boot = &power; - led-failsafe = &general; - led-running = &power; - led-upgrade = &general; - }; - - chosen { - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - button_pins: button_pins { - mux { - pins = "gpio16", "gpio54", "gpio65"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - led_pins: led_pins { - mux { - pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio26", "gpio33", - "gpio53", "gpio66"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - spi_pins: spi_pins { - mux { - pins = "gpio18", "gpio19", "gpio21"; - function = "gsbi5"; - bias-pull-down; - }; - - data { - pins = "gpio18", "gpio19"; - drive-strength = <10>; - }; - - cs { - pins = "gpio20"; - function = "gpio"; - drive-strength = <10>; - bias-pull-up; - }; - - clk { - pins = "gpio21"; - drive-strength = <12>; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - }; - - usb0_pwr_en_pin: usb0_pwr_en_pin { - mux { - pins = "gpio25"; - function = "gpio"; - drive-strength = <10>; - bias-pull-up; - output-high; - }; - }; - - usb1_pwr_en_pin: usb1_pwr_en_pin { - mux { - pins = "gpio23"; - function = "gpio"; - drive-strength = <10>; - bias-pull-up; - output-high; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - gsbi5: gsbi@1a200000 { - qcom,mode = ; - status = "ok"; - - spi5: spi@1a280000 { - status = "ok"; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; - - flash: m25p80@0 { - compatible = "jedec,spi-nor"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - - SBL1@0 { - label = "SBL1"; - reg = <0x0 0x20000>; - read-only; - }; - - MIBIB@20000 { - label = "MIBIB"; - reg = <0x20000 0x20000>; - read-only; - }; - - SBL2@40000 { - label = "SBL2"; - reg = <0x40000 0x20000>; - read-only; - }; - - SBL3@60000 { - label = "SBL3"; - reg = <0x60000 0x30000>; - read-only; - }; - - DDRCONFIG@90000 { - label = "DDRCONFIG"; - reg = <0x90000 0x10000>; - read-only; - }; - - SSD@a0000 { - label = "SSD"; - reg = <0xa0000 0x10000>; - read-only; - }; - - TZ@b0000 { - label = "TZ"; - reg = <0xb0000 0x30000>; - read-only; - }; - - RPM@e0000 { - label = "RPM"; - reg = <0xe0000 0x20000>; - read-only; - }; - - fs-uboot@100000 { - label = "fs-uboot"; - reg = <0x100000 0x70000>; - read-only; - }; - - uboot-env@170000 { - label = "uboot-env"; - reg = <0x170000 0x40000>; - read-only; - }; - - radio@1b0000 { - label = "radio"; - reg = <0x1b0000 0x40000>; - read-only; - }; - - os-image@1f0000 { - label = "os-image"; - reg = <0x1f0000 0x200000>; - }; - - rootfs@3f0000 { - label = "rootfs"; - reg = <0x3f0000 0x1b00000>; - }; - - defaultmac: default-mac@1ef0000 { - label = "default-mac"; - reg = <0x1ef0000 0x00200>; - read-only; - }; - - pin@1ef0200 { - label = "pin"; - reg = <0x1ef0200 0x00200>; - read-only; - }; - - product-info@1ef0400 { - label = "product-info"; - reg = <0x1ef0400 0x0fc00>; - read-only; - }; - - partition-table@1f00000 { - label = "partition-table"; - reg = <0x1f00000 0x10000>; - read-only; - }; - - soft-version@1f10000 { - label = "soft-version"; - reg = <0x1f10000 0x10000>; - read-only; - }; - - support-list@1f20000 { - label = "support-list"; - reg = <0x1f20000 0x10000>; - read-only; - }; - - profile@1f30000 { - label = "profile"; - reg = <0x1f30000 0x10000>; - read-only; - }; - - default-config@1f40000 { - label = "default-config"; - reg = <0x1f40000 0x10000>; - read-only; - }; - - user-config@1f50000 { - label = "user-config"; - reg = <0x1f50000 0x40000>; - read-only; - }; - - qos-db@1f90000 { - label = "qos-db"; - reg = <0x1f90000 0x40000>; - read-only; - }; - - usb-config@1fd0000 { - label = "usb-config"; - reg = <0x1fd0000 0x10000>; - read-only; - }; - - log@1fe0000 { - label = "log"; - reg = <0x1fe0000 0x20000>; - read-only; - }; - }; - }; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - - pinctrl-0 = <&usb0_pwr_en_pin>; - pinctrl-names = "default"; - }; - - usb30@1 { - status = "ok"; - - pinctrl-0 = <&usb1_pwr_en_pin>; - pinctrl-names = "default"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - force_gen1 = <1>; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - mtd-mac-address = <&defaultmac 0x8>; - mtd-mac-address-increment = <1>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - - mtd-mac-address = <&defaultmac 0x8>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 49 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - ledswitch { - label = "ledswitch"; - gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - lan { - label = "c2600:white:lan"; - gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>; - }; - - usb4 { - label = "c2600:white:usb_4"; - gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; - }; - - usb2 { - label = "c2600:white:usb_2"; - gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "c2600:white:wps"; - gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; - }; - - wan_amber { - label = "c2600:amber:wan"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>; - }; - - wan_white { - label = "c2600:white:wan"; - gpios = <&qcom_pinmux 33 GPIO_ACTIVE_LOW>; - }; - - power: power { - label = "c2600:white:power"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - general: general { - label = "c2600:white:general"; - gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts deleted file mode 100644 index b7c49cc81..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ /dev/null @@ -1,419 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -#include - -/ { - model = "Netgear Nighthawk X4 D7800"; - compatible = "netgear,d7800", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0xe000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - - led-boot = &power_white; - led-failsafe = &power_amber; - led-running = &power_white; - led-upgrade = &power_amber; - }; - - chosen { - bootargs = "rootfstype=squashfs noinitrd"; - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - button_pins: button_pins { - mux { - pins = "gpio6", "gpio54", "gpio65"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - led_pins: led_pins { - mux { - pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23", - "gpio24","gpio26", "gpio53", "gpio64"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - nand_pins: nand_pins { - mux { - pins = "gpio34", "gpio35", "gpio36", - "gpio37", "gpio38", "gpio39", - "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - function = "nand"; - drive-strength = <10>; - bias-disable; - }; - pullups { - pins = "gpio39"; - bias-pull-up; - }; - hold { - pins = "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - bias-bus-hold; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - }; - - usb0_pwr_en_pins: usb0_pwr_en_pins { - mux { - pins = "gpio15"; - function = "gpio"; - drive-strength = <12>; - bias-pull-down; - output-high; - }; - }; - - usb1_pwr_en_pins: usb1_pwr_en_pins { - mux { - pins = "gpio16", "gpio68"; - function = "gpio"; - drive-strength = <12>; - bias-pull-down; - output-high; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - status = "ok"; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - - pinctrl-0 = <&usb0_pwr_en_pins>; - pinctrl-names = "default"; - }; - - usb30@1 { - status = "ok"; - - pinctrl-0 = <&usb1_pwr_en_pins>; - pinctrl-names = "default"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&pcie0_pins>; - pinctrl-names = "default"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&pcie1_pins>; - pinctrl-names = "default"; - force_gen1 = <1>; - }; - - nand@1ac00000 { - status = "ok"; - - pinctrl-0 = <&nand_pins>; - pinctrl-names = "default"; - - #address-cells = <1>; - #size-cells = <1>; - - cs0 { - reg = <0>; - compatible = "qcom,nandcs"; - - nand-ecc-strength = <4>; - nand-bus-width = <8>; - nand-ecc-step-size = <512>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - qcadata@0 { - label = "qcadata"; - reg = <0x0000000 0x0c80000>; - read-only; - }; - - APPSBL@c80000 { - label = "APPSBL"; - reg = <0x0c80000 0x0500000>; - read-only; - }; - - APPSBLENV@1180000 { - label = "APPSBLENV"; - reg = <0x1180000 0x0080000>; - read-only; - }; - - art: art@1200000 { - label = "art"; - reg = <0x1200000 0x0140000>; - read-only; - }; - - artbak: art@1340000 { - label = "artbak"; - reg = <0x1340000 0x0140000>; - read-only; - }; - - kernel@1480000 { - label = "kernel"; - reg = <0x1480000 0x0200000>; - }; - - ubi@1680000 { - label = "ubi"; - reg = <0x1680000 0x1E00000>; - }; - - netgear@3480000 { - label = "netgear"; - reg = <0x3480000 0x4480000>; - read-only; - }; - - reserve@7900000 { - label = "reserve"; - reg = <0x7900000 0x0700000>; - read-only; - }; - - firmware@1480000 { - label = "firmware"; - reg = <0x1480000 0x2000000>; - }; - }; - }; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - phy-handle = <&phy4>; - qcom,id = <1>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - mtd-mac-address = <&art 6>; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - - mtd-mac-address = <&art 0>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - usb1 { - label = "d7800:white:usb1"; - gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; - }; - - usb2 { - label = "d7800:white:usb2"; - gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; - }; - - power_amber: power_amber { - label = "d7800:amber:power"; - gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; - }; - - wan_white { - label = "d7800:white:wan"; - gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; - }; - - wan_amber { - label = "d7800:amber:wan"; - gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "d7800:white:wps"; - gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; - }; - - esata { - label = "d7800:white:esata"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; - }; - - power_white: power_white { - label = "d7800:white:power"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - wifi { - label = "d7800:white:wifi"; - gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-db149.dts deleted file mode 100644 index 4c5686607..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-db149.dts +++ /dev/null @@ -1,236 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -/ { - model = "Qualcomm IPQ8064/DB149"; - compatible = "qcom,ipq8064-db149", "qcom,ipq8064"; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - alias { - serial0 = &uart2; - mdio-gpio0 = &mdio0; - }; - - chosen { - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - i2c4_pins: i2c4_pinmux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - bias-disable; - }; - - spi_pins: spi_pins { - mux { - pins = "gpio18", "gpio19", "gpio21"; - function = "gsbi5"; - drive-strength = <10>; - bias-none; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - rgmii0_pins: rgmii0_pins { - mux { - pins = "gpio2", "gpio66"; - drive-strength = <8>; - bias-disable; - }; - }; - }; - - gsbi2: gsbi@12480000 { - qcom,mode = ; - status = "ok"; - uart2: serial@12490000 { - status = "ok"; - }; - }; - - gsbi5: gsbi@1a200000 { - qcom,mode = ; - status = "ok"; - - spi4: spi@1a280000 { - status = "ok"; - spi-max-frequency = <50000000>; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 0>; - - flash: m25p80@0 { - compatible = "s25fl256s1"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - m25p,fast-read; - - partition@0 { - label = "lowlevel_init"; - reg = <0x0 0x1b0000>; - }; - - partition@1 { - label = "u-boot"; - reg = <0x1b0000 0x80000>; - }; - - partition@2 { - label = "u-boot-env"; - reg = <0x230000 0x40000>; - }; - - partition@3 { - label = "caldata"; - reg = <0x270000 0x40000>; - }; - - partition@4 { - label = "firmware"; - reg = <0x2b0000 0x1d50000>; - }; - }; - }; - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - status = "ok"; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - }; - - usb30@1 { - status = "ok"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - }; - - pcie2: pci@1b900000 { - status = "ok"; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; - - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - - phy6: ethernet-phy@6 { - device_type = "ethernet-phy"; - reg = <6>; - }; - - phy7: ethernet-phy@7 { - device_type = "ethernet-phy"; - reg = <7>; - }; - }; - - gmac0: ethernet@37000000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <0>; - phy-handle = <&phy4>; - - pinctrl-0 = <&rgmii0_pins>; - pinctrl-names = "default"; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <1>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - phy-handle = <&phy6>; - }; - - gmac3: ethernet@37600000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <3>; - phy-handle = <&phy7>; - }; - }; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts deleted file mode 100644 index a8628ff93..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts +++ /dev/null @@ -1,406 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -#include - -/ { - model = "Linksys EA8500 WiFi Router"; - compatible = "linksys,ea8500", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - - led-boot = &power; - led-failsafe = &power; - led-running = &power; - led-upgrade = &power; - }; - - chosen { - bootargs = "console=ttyMSM0,115200n8"; - linux,stdout-path = "serial0:115200n8"; - append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */ - }; - - soc { - pinmux@800000 { - button_pins: button_pins { - mux { - pins = "gpio65", "gpio67", "gpio68"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - led_pins: led_pins { - mux { - pins = "gpio6", "gpio53", "gpio54"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - nand_pins: nand_pins { - mux { - pins = "gpio34", "gpio35", "gpio36", - "gpio37", "gpio38", "gpio39", - "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - function = "nand"; - drive-strength = <10>; - bias-disable; - }; - pullups { - pins = "gpio39"; - bias-pull-up; - }; - hold { - pins = "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - bias-bus-hold; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - status = "ok"; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - }; - - usb30@1 { - status = "ok"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - force_gen1 = <1>; - }; - - pcie1: pci@1b700000 { - status = "ok"; - }; - - pcie2: pci@1b900000 { - status = "ok"; - }; - - nand@1ac00000 { - status = "ok"; - - pinctrl-0 = <&nand_pins>; - pinctrl-names = "default"; - - cs0 { - reg = <0>; - compatible = "qcom,nandcs"; - - nand-ecc-strength = <4>; - nand-bus-width = <8>; - nand-ecc-step-size = <512>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - SBL1@0 { - label = "SBL1"; - reg = <0x0000000 0x0040000>; - read-only; - }; - - MIBIB@40000 { - label = "MIBIB"; - reg = <0x0040000 0x0140000>; - read-only; - }; - - SBL2@180000 { - label = "SBL2"; - reg = <0x0180000 0x0140000>; - read-only; - }; - - SBL3@2c0000 { - label = "SBL3"; - reg = <0x02c0000 0x0280000>; - read-only; - }; - - DDRCONFIG@540000 { - label = "DDRCONFIG"; - reg = <0x0540000 0x0120000>; - read-only; - }; - - SSD@660000 { - label = "SSD"; - reg = <0x0660000 0x0120000>; - read-only; - }; - - TZ@780000 { - label = "TZ"; - reg = <0x0780000 0x0280000>; - read-only; - }; - - RPM@a00000 { - label = "RPM"; - reg = <0x0a00000 0x0280000>; - read-only; - }; - - art: art@c80000 { - label = "art"; - reg = <0x0c80000 0x0140000>; - read-only; - }; - - APPSBL@dc0000 { - label = "APPSBL"; - reg = <0x0dc0000 0x0100000>; - read-only; - }; - - u_env@ec0000 { - label = "u_env"; - reg = <0x0ec0000 0x0040000>; - }; - - s_env@f00000 { - label = "s_env"; - reg = <0x0f00000 0x0040000>; - }; - - devinfo@f40000 { - label = "devinfo"; - reg = <0x0f40000 0x0040000>; - }; - - linux@f80000 { - label = "kernel1"; - reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs*/ - }; - - rootfs@1280000 { - label = "rootfs1"; - reg = <0x1280000 0x2500000>; - }; - - linux2@3780000 { - label = "kernel2"; - reg = <0x3780000 0x2800000>; - }; - - rootfs2@3a80000 { - label = "rootfs2"; - reg = <0x3a80000 0x2500000>; - }; - - syscfg@5f80000 { - label = "syscfg"; - reg = <0x5f80000 0x2080000>; - }; - }; - }; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - qcom,phy_mdio_addr = <4>; - qcom,poll_required = <1>; - qcom,rgmii_delay = <0>; - qcom,emulation = <0>; - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - //lan - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - qcom,phy_mdio_addr = <0>; /* none */ - qcom,poll_required = <0>; /* no polling */ - qcom,rgmii_delay = <0>; - qcom,emulation = <0>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - - adm_dma: dma@18300000 { - status = "ok"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - wps { - label = "ea8500:green:wps"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - }; - - power: power { - label = "ea8500:white:power"; - gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; - default-state = "keep"; - }; - - wifi { - label = "ea8500:green:wifi"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; - }; - }; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts deleted file mode 100644 index 3445a7925..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500.dts +++ /dev/null @@ -1,394 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -#include -#include - -/ { - model = "Netgear Nighthawk X4 R7500"; - compatible = "netgear,r7500", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0xe000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - - led-boot = &power_white; - led-failsafe = &power_amber; - led-running = &power_white; - led-upgrade = &power_amber; - }; - - chosen { - bootargs = "rootfstype=squashfs noinitrd"; - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - button_pins: button_pins { - mux { - pins = "gpio6", "gpio54", "gpio65"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - led_pins: led_pins { - mux { - pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23", - "gpio24","gpio26", "gpio53", "gpio64"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - nand_pins: nand_pins { - mux { - pins = "gpio34", "gpio35", "gpio36", - "gpio37", "gpio38", "gpio39", - "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - function = "nand"; - drive-strength = <10>; - bias-disable; - }; - pullups { - pins = "gpio39"; - bias-pull-up; - }; - hold { - pins = "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - bias-bus-hold; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - status = "ok"; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - clocks = <&gcc USB30_0_UTMI_CLK>; - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - clocks = <&gcc USB30_0_MASTER_CLK>; - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - clocks = <&gcc USB30_1_UTMI_CLK>; - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - clocks = <&gcc USB30_1_MASTER_CLK>; - status = "ok"; - }; - - usb30@0 { - clocks = <&gcc USB30_1_MASTER_CLK>; - status = "ok"; - }; - - usb30@1 { - clocks = <&gcc USB30_0_MASTER_CLK>; - status = "ok"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - force_gen1 = <1>; - }; - - nand@1ac00000 { - status = "ok"; - - pinctrl-0 = <&nand_pins>; - pinctrl-names = "default"; - - cs0 { - reg = <0>; - compatible = "qcom,nandcs"; - - nand-ecc-strength = <4>; - nand-bus-width = <8>; - nand-ecc-step-size = <512>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - qcadata@0 { - label = "qcadata"; - reg = <0x0000000 0x0c80000>; - read-only; - }; - - APPSBL@c80000 { - label = "APPSBL"; - reg = <0x0c80000 0x0500000>; - read-only; - }; - - APPSBLENV@1180000 { - label = "APPSBLENV"; - reg = <0x1180000 0x0080000>; - read-only; - }; - - art: art@1200000 { - label = "art"; - reg = <0x1200000 0x0140000>; - read-only; - }; - - kernel@1340000 { - label = "kernel"; - reg = <0x1340000 0x0200000>; - }; - - ubi@1540000 { - label = "ubi"; - reg = <0x1540000 0x1800000>; - }; - - netgear@2d40000 { - label = "netgear"; - reg = <0x2d40000 0x0c00000>; - read-only; - }; - - reserve@3940000 { - label = "reserve"; - reg = <0x3940000 0x46c0000>; - read-only; - }; - - firmware@1340000 { - label = "firmware"; - reg = <0x1340000 0x1a00000>; - }; - }; - }; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - mtd-mac-address = <&art 6>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - - mtd-mac-address = <&art 0>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - usb1 { - label = "r7500:white:usb1"; - gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; - }; - - usb2 { - label = "r7500:white:usb2"; - gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; - }; - - power_amber: power_amber { - label = "r7500:amber:power"; - gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; - }; - - wan_white { - label = "r7500:white:wan"; - gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; - }; - - wan_amber { - label = "r7500:amber:wan"; - gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "r7500:white:wps"; - gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; - }; - - esata { - label = "r7500:white:esata"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; - }; - - power_white: power_white { - label = "r7500:white:power"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - wifi { - label = "r7500:white:wifi"; - gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&tcsr { - qcom,usb-ctrl-select = ; - compatible = "qcom,tcsr"; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts deleted file mode 100644 index c4b0c4b5a..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts +++ /dev/null @@ -1,425 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -#include - -/ { - model = "Netgear Nighthawk X4 R7500v2"; - compatible = "netgear,r7500v2", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - - rsvd@5fe00000 { - reg = <0x5fe00000 0x200000>; - reusable; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - - led-boot = &power; - led-failsafe = &power; - led-running = &power; - led-upgrade = &power; - }; - - chosen { - bootargs = "rootfstype=squashfs noinitrd"; - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - button_pins: button_pins { - mux { - pins = "gpio6", "gpio54", "gpio65"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - led_pins: led_pins { - mux { - pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23", - "gpio24","gpio26", "gpio53", "gpio64"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - nand_pins: nand_pins { - mux { - pins = "gpio34", "gpio35", "gpio36", - "gpio37", "gpio38", "gpio39", - "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - function = "nand"; - drive-strength = <10>; - bias-disable; - }; - pullups { - pins = "gpio39"; - bias-pull-up; - }; - hold { - pins = "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - bias-bus-hold; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - }; - - usb0_pwr_en_pins: usb0_pwr_en_pins { - mux { - pins = "gpio15"; - function = "gpio"; - drive-strength = <12>; - bias-pull-down; - output-high; - }; - }; - - usb1_pwr_en_pins: usb1_pwr_en_pins { - mux { - pins = "gpio16", "gpio68"; - function = "gpio"; - drive-strength = <12>; - bias-pull-down; - output-high; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - status = "ok"; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - - pinctrl-0 = <&usb0_pwr_en_pins>; - pinctrl-names = "default"; - }; - - usb30@1 { - status = "ok"; - - pinctrl-0 = <&usb1_pwr_en_pins>; - pinctrl-names = "default"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&pcie0_pins>; - pinctrl-names = "default"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&pcie1_pins>; - pinctrl-names = "default"; - force_gen1 = <1>; - }; - - nand@1ac00000 { - status = "ok"; - - pinctrl-0 = <&nand_pins>; - pinctrl-names = "default"; - - cs0 { - reg = <0>; - compatible = "qcom,nandcs"; - - nand-ecc-strength = <4>; - nand-bus-width = <8>; - nand-ecc-step-size = <512>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - qcadata@0 { - label = "qcadata"; - reg = <0x0000000 0x0c80000>; - read-only; - }; - - APPSBL@c80000 { - label = "APPSBL"; - reg = <0x0c80000 0x0500000>; - read-only; - }; - - APPSBLENV@1180000 { - label = "APPSBLENV"; - reg = <0x1180000 0x0080000>; - read-only; - }; - - art: art@1200000 { - label = "art"; - reg = <0x1200000 0x0140000>; - read-only; - }; - - artbak: art@1340000 { - label = "artbak"; - reg = <0x1340000 0x0140000>; - read-only; - }; - - kernel@1480000 { - label = "kernel"; - reg = <0x1480000 0x0200000>; - }; - - ubi@1680000 { - label = "ubi"; - reg = <0x1680000 0x1E00000>; - }; - - netgear@3480000 { - label = "netgear"; - reg = <0x3480000 0x4480000>; - read-only; - }; - - reserve@7900000 { - label = "reserve"; - reg = <0x7900000 0x0700000>; - read-only; - }; - - firmware@1480000 { - label = "firmware"; - reg = <0x1480000 0x2000000>; - }; - }; - }; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - mtd-mac-address = <&art 6>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - - mtd-mac-address = <&art 0>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - usb1 { - label = "r7500v2:amber:usb1"; - gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; - }; - - usb3 { - label = "r7500v2:amber:usb3"; - gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; - }; - - status { - label = "r7500v2:amber:status"; - gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; - }; - - internet { - label = "r7500v2:white:internet"; - gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; - }; - - wan { - label = "r7500v2:white:wan"; - gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "r7500v2:white:wps"; - gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; - }; - - esata { - label = "r7500v2:white:esata"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; - }; - - power: power { - label = "r7500v2:white:power"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - wifi { - label = "r7500v2:white:wifi"; - gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts deleted file mode 100644 index 561c49aaa..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts +++ /dev/null @@ -1,424 +0,0 @@ -#include "qcom-ipq8064-v1.0.dtsi" - -#include - -/ { - model = "TP-Link Archer VR2600v"; - compatible = "tplink,vr2600v", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - - led-boot = &power; - led-failsafe = &general; - led-running = &power; - led-upgrade = &general; - }; - - chosen { - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - led_pins: led_pins { - mux { - pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17", - "gpio26", "gpio53", "gpio56", "gpio66"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - button_pins: button_pins { - mux { - pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - spi_pins: spi_pins { - mux { - pins = "gpio18", "gpio19", "gpio21"; - function = "gsbi5"; - bias-pull-down; - }; - - data { - pins = "gpio18", "gpio19"; - drive-strength = <10>; - }; - - cs { - pins = "gpio20"; - drive-strength = <10>; - bias-pull-up; - }; - - clk { - pins = "gpio21"; - drive-strength = <12>; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - gsbi5: gsbi@1a200000 { - qcom,mode = ; - status = "ok"; - - spi4: spi@1a280000 { - status = "ok"; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; - - flash: W25Q128@0 { - compatible = "jedec,spi-nor"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - - SBL1@0 { - label = "SBL1"; - reg = <0x0 0x20000>; - read-only; - }; - - MIBIB@20000 { - label = "MIBIB"; - reg = <0x20000 0x20000>; - read-only; - }; - - SBL2@40000 { - label = "SBL2"; - reg = <0x40000 0x40000>; - read-only; - }; - - SBL3@80000 { - label = "SBL3"; - reg = <0x80000 0x80000>; - read-only; - }; - - DDRCONFIG@100000 { - label = "DDRCONFIG"; - reg = <0x100000 0x10000>; - read-only; - }; - - SSD@110000 { - label = "SSD"; - reg = <0x110000 0x10000>; - read-only; - }; - - TZ@120000 { - label = "TZ"; - reg = <0x120000 0x80000>; - read-only; - }; - - RPM@1a0000 { - label = "RPM"; - reg = <0x1a0000 0x80000>; - read-only; - }; - - APPSBL@220000 { - label = "APPSBL"; - reg = <0x220000 0x80000>; - read-only; - }; - - APPSBLENV@2a0000 { - label = "APPSBLENV"; - reg = <0x2a0000 0x40000>; - read-only; - }; - - OLDART@2e0000 { - label = "OLDART"; - reg = <0x2e0000 0x40000>; - read-only; - }; - - kernel@320000 { - label = "kernel"; - reg = <0x320000 0x200000>; - }; - - rootfs@520000 { - label = "rootfs"; - reg = <0x520000 0xa60000>; - }; - - defaultmac: default-mac@0xfaf100 { - label = "default-mac"; - reg = <0xfaf100 0x00200>; - read-only; - }; - - ART@fc0000 { - label = "ART"; - reg = <0xfc0000 0x40000>; - read-only; - }; - }; - }; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - }; - - usb30@1 { - status = "ok"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - force_gen1 = <1>; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - mtd-mac-address = <&defaultmac 0>; - mtd-mac-address-increment = <1>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - - mtd-mac-address = <&defaultmac 0>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - dect { - label = "dect"; - gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - ledswitch { - label = "ledswitch"; - gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - dsl { - label = "vr2600v:white:dsl"; - gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; - }; - - usb { - label = "vr2600v:white:usb"; - gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; - }; - - lan { - label = "vr2600v:white:lan"; - gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; - }; - - wlan2g { - label = "vr2600v:white:wlan2g"; - gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>; - }; - - wlan5g { - label = "vr2600v:white:wlan5g"; - gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>; - }; - - power: power { - label = "vr2600v:white:power"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - phone { - label = "vr2600v:white:phone"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - }; - - wan { - label = "vr2600v:white:wan"; - gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>; - }; - - general: general { - label = "vr2600v:white:general"; - gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi deleted file mode 100644 index 90f7a1018..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ /dev/null @@ -1,1333 +0,0 @@ -/dts-v1/; - -#include "skeleton.dtsi" -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - model = "Qualcomm IPQ8064"; - compatible = "qcom,ipq8064"; - interrupt-parent = <&intc>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - compatible = "qcom,krait"; - enable-method = "qcom,kpss-acc-v1"; - device_type = "cpu"; - reg = <0>; - next-level-cache = <&L2>; - qcom,acc = <&acc0>; - qcom,saw = <&saw0>; - clocks = <&kraitcc 0>, <&kraitcc 4>; - clock-names = "cpu", "l2"; - clock-latency = <100000>; - cpu-supply = <&smb208_s2a>; - voltage-tolerance = <5>; - cooling-min-state = <0>; - cooling-max-state = <10>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SPC>; - }; - - cpu1: cpu@1 { - compatible = "qcom,krait"; - enable-method = "qcom,kpss-acc-v1"; - device_type = "cpu"; - reg = <1>; - next-level-cache = <&L2>; - qcom,acc = <&acc1>; - qcom,saw = <&saw1>; - clocks = <&kraitcc 1>, <&kraitcc 4>; - clock-names = "cpu", "l2"; - clock-latency = <100000>; - cpu-supply = <&smb208_s2b>; - cooling-min-state = <0>; - cooling-max-state = <10>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SPC>; - }; - - L2: l2-cache { - compatible = "cache"; - cache-level = <2>; - qcom,saw = <&saw_l2>; - }; - - qcom,l2 { - qcom,l2-rates = <384000000 1000000000 1200000000>; - }; - - idle-states { - CPU_SPC: spc { - compatible = "qcom,idle-state-spc", - "arm,idle-state"; - entry-latency-us = <400>; - exit-latency-us = <900>; - min-residency-us = <3000>; - }; - }; - }; - - thermal-zones { - tsens_tz_sensor0 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 0>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor1 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 1>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor2 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 2>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor3 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 3>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor4 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 4>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor5 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 5>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor6 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 6>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor7 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 7>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor8 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 8>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor9 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 9>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - - tsens_tz_sensor10 { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&tsens 10>; - - trips { - cpu-critical-hi { - temperature = <125000>; - hysteresis = <2000>; - type = "critical_high"; - }; - - cpu-config-hi { - temperature = <105000>; - hysteresis = <2000>; - type = "configurable_hi"; - }; - - cpu-config-lo { - temperature = <95000>; - hysteresis = <2000>; - type = "configurable_lo"; - }; - - cpu-critical-low { - temperature = <0>; - hysteresis = <2000>; - type = "critical_low"; - }; - }; - }; - }; - - cpu-pmu { - compatible = "qcom,krait-pmu"; - interrupts = <1 10 0x304>; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - nss@40000000 { - reg = <0x40000000 0x1000000>; - no-map; - }; - - smem: smem@41000000 { - reg = <0x41000000 0x200000>; - no-map; - }; - }; - - clocks { - cxo_board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - pxo_board { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - }; - - sleep_clk: sleep_clk { - compatible = "fixed-clock"; - clock-frequency = <32768>; - #clock-cells = <0>; - }; - }; - - firmware { - scm { - compatible = "qcom,scm-ipq806x"; - }; - }; - - kraitcc: clock-controller { - compatible = "qcom,krait-cc-v1"; - #clock-cells = <1>; - }; - - qcom,pvs { - qcom,pvs-format-a; - qcom,speed0-pvs0-bin-v0 = - < 1400000000 1250000 >, - < 1200000000 1200000 >, - < 1000000000 1150000 >, - < 800000000 1100000 >, - < 600000000 1050000 >, - < 384000000 1000000 >; - - qcom,speed0-pvs1-bin-v0 = - < 1400000000 1175000 >, - < 1200000000 1125000 >, - < 1000000000 1075000 >, - < 800000000 1025000 >, - < 600000000 975000 >, - < 384000000 925000 >; - - qcom,speed0-pvs2-bin-v0 = - < 1400000000 1125000 >, - < 1200000000 1075000 >, - < 1000000000 1025000 >, - < 800000000 995000 >, - < 600000000 925000 >, - < 384000000 875000 >; - - qcom,speed0-pvs3-bin-v0 = - < 1400000000 1050000 >, - < 1200000000 1000000 >, - < 1000000000 950000 >, - < 800000000 900000 >, - < 600000000 850000 >, - < 384000000 800000 >; - }; - - soc: soc { - #address-cells = <1>; - #size-cells = <1>; - ranges; - compatible = "simple-bus"; - - lpass@28100000 { - compatible = "qcom,lpass-cpu"; - status = "disabled"; - clocks = <&lcc AHBIX_CLK>, - <&lcc MI2S_OSR_CLK>, - <&lcc MI2S_BIT_CLK>; - clock-names = "ahbix-clk", - "mi2s-osr-clk", - "mi2s-bit-clk"; - interrupts = <0 85 1>; - interrupt-names = "lpass-irq-lpaif"; - reg = <0x28100000 0x10000>; - reg-names = "lpass-lpaif"; - }; - - qfprom: qfprom@700000 { - compatible = "qcom,qfprom", "syscon"; - reg = <0x700000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - status = "okay"; - tsens_calib: calib@400 { - reg = <0x400 0x10>; - }; - tsens_backup: backup@410 { - reg = <0x410 0x10>; - }; - }; - - rpm@108000 { - compatible = "qcom,rpm-ipq8064"; - reg = <0x108000 0x1000>; - qcom,ipc = <&l2cc 0x8 2>; - - interrupts = <0 19 0>, - <0 21 0>, - <0 22 0>; - interrupt-names = "ack", - "err", - "wakeup"; - - clocks = <&gcc RPM_MSG_RAM_H_CLK>; - clock-names = "ram"; - - #address-cells = <1>; - #size-cells = <0>; - - rpmcc: clock-controller { - compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc"; - #clock-cells = <1>; - }; - - regulators { - compatible = "qcom,rpm-smb208-regulators"; - - smb208_s1a: s1a { - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1150000>; - - qcom,switch-mode-frequency = <1200000>; - - }; - - smb208_s1b: s1b { - regulator-min-microvolt = <1050000>; - regulator-max-microvolt = <1150000>; - - qcom,switch-mode-frequency = <1200000>; - }; - - smb208_s2a: s2a { - regulator-min-microvolt = < 800000>; - regulator-max-microvolt = <1250000>; - - qcom,switch-mode-frequency = <1200000>; - }; - - smb208_s2b: s2b { - regulator-min-microvolt = < 800000>; - regulator-max-microvolt = <1250000>; - - qcom,switch-mode-frequency = <1200000>; - }; - }; - }; - - rng@1a500000 { - compatible = "qcom,prng"; - reg = <0x1a500000 0x200>; - clocks = <&gcc PRNG_CLK>; - clock-names = "core"; - }; - - qcom_pinmux: pinmux@800000 { - compatible = "qcom,ipq8064-pinctrl"; - reg = <0x800000 0x4000>; - - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <0 16 0x4>; - - pcie0_pins: pcie0_pinmux { - mux { - pins = "gpio3"; - function = "pcie1_rst"; - drive-strength = <2>; - bias-disable; - }; - }; - - pcie1_pins: pcie1_pinmux { - mux { - pins = "gpio48"; - function = "pcie2_rst"; - drive-strength = <2>; - bias-disable; - }; - }; - - pcie2_pins: pcie2_pinmux { - mux { - pins = "gpio63"; - function = "pcie3_rst"; - drive-strength = <2>; - bias-disable; - output-low; - }; - }; - }; - - intc: interrupt-controller@2000000 { - compatible = "qcom,msm-qgic2"; - interrupt-controller; - #interrupt-cells = <3>; - reg = <0x02000000 0x1000>, - <0x02002000 0x1000>; - }; - - timer@200a000 { - compatible = "qcom,kpss-timer", "qcom,msm-timer"; - interrupts = <1 1 0x301>, - <1 2 0x301>, - <1 3 0x301>, - <1 4 0x301>, - <1 5 0x301>; - reg = <0x0200a000 0x100>; - clock-frequency = <25000000>, - <32768>; - clocks = <&sleep_clk>; - clock-names = "sleep"; - cpu-offset = <0x80000>; - }; - - acc0: clock-controller@2088000 { - compatible = "qcom,kpss-acc-v1"; - reg = <0x02088000 0x1000>, <0x02008000 0x1000>; - clock-output-names = "acpu0_aux"; - }; - - acc1: clock-controller@2098000 { - compatible = "qcom,kpss-acc-v1"; - reg = <0x02098000 0x1000>, <0x02008000 0x1000>; - clock-output-names = "acpu1_aux"; - }; - - l2cc: clock-controller@2011000 { - compatible = "qcom,kpss-gcc", "syscon"; - reg = <0x2011000 0x1000>; - clock-output-names = "acpu_l2_aux"; - }; - - saw0: regulator@2089000 { - compatible = "qcom,saw2", "syscon"; - reg = <0x02089000 0x1000>, <0x02009000 0x1000>; - regulator; - }; - - saw1: regulator@2099000 { - compatible = "qcom,saw2", "syscon"; - reg = <0x02099000 0x1000>, <0x02009000 0x1000>; - regulator; - }; - - saw_l2: regulator@02012000 { - compatible = "qcom,saw2", "syscon"; - reg = <0x02012000 0x1000>; - regulator; - }; - - sic_non_secure: sic-non-secure@12100000 { - compatible = "syscon"; - reg = <0x12100000 0x10000>; - }; - - gsbi2: gsbi@12480000 { - compatible = "qcom,gsbi-v1.0.0"; - cell-index = <2>; - reg = <0x12480000 0x100>; - clocks = <&gcc GSBI2_H_CLK>; - clock-names = "iface"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - status = "disabled"; - - syscon-tcsr = <&tcsr>; - - uart2: serial@12490000 { - compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; - reg = <0x12490000 0x1000>, - <0x12480000 0x1000>; - interrupts = <0 195 0x0>; - clocks = <&gcc GSBI2_UART_CLK>, <&gcc GSBI2_H_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - - i2c@124a0000 { - compatible = "qcom,i2c-qup-v1.1.1"; - reg = <0x124a0000 0x1000>; - interrupts = <0 196 0>; - - clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - }; - - }; - - gsbi4: gsbi@16300000 { - compatible = "qcom,gsbi-v1.0.0"; - cell-index = <4>; - reg = <0x16300000 0x100>; - clocks = <&gcc GSBI4_H_CLK>; - clock-names = "iface"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - status = "disabled"; - - syscon-tcsr = <&tcsr>; - - gsbi4_serial: serial@16340000 { - compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; - reg = <0x16340000 0x1000>, - <0x16300000 0x1000>; - interrupts = <0 152 0x0>; - clocks = <&gcc GSBI4_UART_CLK>, <&gcc GSBI4_H_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - - i2c@16380000 { - compatible = "qcom,i2c-qup-v1.1.1"; - reg = <0x16380000 0x1000>; - interrupts = <0 153 0>; - - clocks = <&gcc GSBI4_QUP_CLK>, <&gcc GSBI4_H_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - gsbi5: gsbi@1a200000 { - compatible = "qcom,gsbi-v1.0.0"; - cell-index = <5>; - reg = <0x1a200000 0x100>; - clocks = <&gcc GSBI5_H_CLK>; - clock-names = "iface"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - status = "disabled"; - - syscon-tcsr = <&tcsr>; - - uart5: serial@1a240000 { - compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; - reg = <0x1a240000 0x1000>, - <0x1a200000 0x1000>; - interrupts = <0 154 0x0>; - clocks = <&gcc GSBI5_UART_CLK>, <&gcc GSBI5_H_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - }; - - i2c@1a280000 { - compatible = "qcom,i2c-qup-v1.1.1"; - reg = <0x1a280000 0x1000>; - interrupts = <0 155 0>; - - clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - }; - - spi@1a280000 { - compatible = "qcom,spi-qup-v1.1.1"; - reg = <0x1a280000 0x1000>; - interrupts = <0 155 0>; - - clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>; - clock-names = "core", "iface"; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - sata_phy: sata-phy@1b400000 { - compatible = "qcom,ipq806x-sata-phy"; - reg = <0x1b400000 0x200>; - - clocks = <&gcc SATA_PHY_CFG_CLK>; - clock-names = "cfg"; - - #phy-cells = <0>; - status = "disabled"; - }; - - sata@29000000 { - compatible = "qcom,ipq806x-ahci", "generic-ahci"; - reg = <0x29000000 0x180>; - - interrupts = <0 209 0x0>; - - clocks = <&gcc SFAB_SATA_S_H_CLK>, - <&gcc SATA_H_CLK>, - <&gcc SATA_A_CLK>, - <&gcc SATA_RXOOB_CLK>, - <&gcc SATA_PMALIVE_CLK>; - clock-names = "slave_face", "iface", "core", - "rxoob", "pmalive"; - - assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>; - assigned-clock-rates = <100000000>, <100000000>; - - phys = <&sata_phy>; - phy-names = "sata-phy"; - status = "disabled"; - }; - - qcom,ssbi@500000 { - compatible = "qcom,ssbi"; - reg = <0x00500000 0x1000>; - qcom,controller-type = "pmic-arbiter"; - }; - - gcc: clock-controller@900000 { - compatible = "qcom,gcc-ipq8064"; - reg = <0x00900000 0x4000>; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - }; - - tsens: thermal-sensor@900000 { - compatible = "qcom,ipq8064-tsens"; - reg = <0x900000 0x3680>; - nvmem-cells = <&tsens_calib>, <&tsens_backup>; - nvmem-cell-names = "calib", "calib_backup"; - interrupts = <0 178 0>; - #thermal-sensor-cells = <1>; - }; - - tcsr: syscon@1a400000 { - compatible = "qcom,tcsr-ipq8064", "syscon"; - reg = <0x1a400000 0x100>; - }; - - lcc: clock-controller@28000000 { - compatible = "qcom,lcc-ipq8064"; - reg = <0x28000000 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - sfpb_mutex_block: syscon@1200600 { - compatible = "syscon"; - reg = <0x01200600 0x100>; - }; - - hs_phy_1: phy@100f8800 { - compatible = "qcom,dwc3-hs-usb-phy"; - reg = <0x100f8800 0x30>; - clocks = <&gcc USB30_1_UTMI_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - status = "disabled"; - }; - - ss_phy_1: phy@100f8830 { - compatible = "qcom,dwc3-ss-usb-phy"; - reg = <0x100f8830 0x30>; - clocks = <&gcc USB30_1_MASTER_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - status = "disabled"; - }; - - hs_phy_0: phy@110f8800 { - compatible = "qcom,dwc3-hs-usb-phy"; - reg = <0x110f8800 0x30>; - clocks = <&gcc USB30_0_UTMI_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - status = "disabled"; - }; - - ss_phy_0: phy@110f8830 { - compatible = "qcom,dwc3-ss-usb-phy"; - reg = <0x110f8830 0x30>; - clocks = <&gcc USB30_0_MASTER_CLK>; - clock-names = "ref"; - #phy-cells = <0>; - - status = "disabled"; - }; - - usb3_0: usb30@0 { - compatible = "qcom,dwc3"; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&gcc USB30_0_MASTER_CLK>; - clock-names = "core"; - - ranges; - - resets = <&gcc USB30_0_MASTER_RESET>; - reset-names = "usb30_0_mstr_rst"; - - status = "disabled"; - - dwc3@11000000 { - compatible = "snps,dwc3"; - reg = <0x11000000 0xcd00>; - interrupts = <0 110 0x4>; - phys = <&hs_phy_0>, <&ss_phy_0>; - phy-names = "usb2-phy", "usb3-phy"; - dr_mode = "host"; - snps,dis_u3_susphy_quirk; - }; - }; - - usb3_1: usb30@1 { - compatible = "qcom,dwc3"; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&gcc USB30_1_MASTER_CLK>; - clock-names = "core"; - - ranges; - - resets = <&gcc USB30_1_MASTER_RESET>; - reset-names = "usb30_1_mstr_rst"; - - status = "disabled"; - - dwc3@10000000 { - compatible = "snps,dwc3"; - reg = <0x10000000 0xcd00>; - interrupts = <0 205 0x4>; - phys = <&hs_phy_1>, <&ss_phy_1>; - phy-names = "usb2-phy", "usb3-phy"; - dr_mode = "host"; - snps,dis_u3_susphy_quirk; - }; - }; - - pcie0: pci@1b500000 { - compatible = "qcom,pcie-ipq8064"; - reg = <0x1b500000 0x1000 - 0x1b502000 0x80 - 0x1b600000 0x100 - 0x0ff00000 0x100000>; - reg-names = "dbi", "elbi", "parf", "config"; - device_type = "pci"; - linux,pci-domain = <0>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - #address-cells = <3>; - #size-cells = <2>; - - ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */ - 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */ - - interrupts = ; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - clocks = <&gcc PCIE_A_CLK>, - <&gcc PCIE_H_CLK>, - <&gcc PCIE_PHY_CLK>, - <&gcc PCIE_AUX_CLK>, - <&gcc PCIE_ALT_REF_CLK>; - clock-names = "core", "iface", "phy", "aux", "ref"; - - assigned-clocks = <&gcc PCIE_ALT_REF_CLK>; - assigned-clock-rates = <100000000>; - - resets = <&gcc PCIE_ACLK_RESET>, - <&gcc PCIE_HCLK_RESET>, - <&gcc PCIE_POR_RESET>, - <&gcc PCIE_PCI_RESET>, - <&gcc PCIE_PHY_RESET>, - <&gcc PCIE_EXT_RESET>; - reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; - - pinctrl-0 = <&pcie0_pins>; - pinctrl-names = "default"; - - perst-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; - - phy-tx0-term-offset = <7>; - - status = "disabled"; - }; - - pcie1: pci@1b700000 { - compatible = "qcom,pcie-ipq8064"; - reg = <0x1b700000 0x1000 - 0x1b702000 0x80 - 0x1b800000 0x100 - 0x31f00000 0x100000>; - reg-names = "dbi", "elbi", "parf", "config"; - device_type = "pci"; - linux,pci-domain = <1>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - #address-cells = <3>; - #size-cells = <2>; - - ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */ - 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */ - - interrupts = ; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 58 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 59 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 60 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 61 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - clocks = <&gcc PCIE_1_A_CLK>, - <&gcc PCIE_1_H_CLK>, - <&gcc PCIE_1_PHY_CLK>, - <&gcc PCIE_1_AUX_CLK>, - <&gcc PCIE_1_ALT_REF_CLK>; - clock-names = "core", "iface", "phy", "aux", "ref"; - - assigned-clocks = <&gcc PCIE_1_ALT_REF_CLK>; - assigned-clock-rates = <100000000>; - - resets = <&gcc PCIE_1_ACLK_RESET>, - <&gcc PCIE_1_HCLK_RESET>, - <&gcc PCIE_1_POR_RESET>, - <&gcc PCIE_1_PCI_RESET>, - <&gcc PCIE_1_PHY_RESET>, - <&gcc PCIE_1_EXT_RESET>; - reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; - - pinctrl-0 = <&pcie1_pins>; - pinctrl-names = "default"; - - perst-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; - - phy-tx0-term-offset = <7>; - - status = "disabled"; - }; - - pcie2: pci@1b900000 { - compatible = "qcom,pcie-ipq8064"; - reg = <0x1b900000 0x1000 - 0x1b902000 0x80 - 0x1ba00000 0x100 - 0x35f00000 0x100000>; - reg-names = "dbi", "elbi", "parf", "config"; - device_type = "pci"; - linux,pci-domain = <2>; - bus-range = <0x00 0xff>; - num-lanes = <1>; - #address-cells = <3>; - #size-cells = <2>; - - ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */ - 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */ - - interrupts = ; - interrupt-names = "msi"; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; - interrupt-map = <0 0 0 1 &intc 0 72 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ - <0 0 0 2 &intc 0 73 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ - <0 0 0 3 &intc 0 74 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ - <0 0 0 4 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - clocks = <&gcc PCIE_2_A_CLK>, - <&gcc PCIE_2_H_CLK>, - <&gcc PCIE_2_PHY_CLK>, - <&gcc PCIE_2_AUX_CLK>, - <&gcc PCIE_2_ALT_REF_CLK>; - clock-names = "core", "iface", "phy", "aux", "ref"; - - assigned-clocks = <&gcc PCIE_2_ALT_REF_CLK>; - assigned-clock-rates = <100000000>; - - resets = <&gcc PCIE_2_ACLK_RESET>, - <&gcc PCIE_2_HCLK_RESET>, - <&gcc PCIE_2_POR_RESET>, - <&gcc PCIE_2_PCI_RESET>, - <&gcc PCIE_2_PHY_RESET>, - <&gcc PCIE_2_EXT_RESET>; - reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; - - pinctrl-0 = <&pcie2_pins>; - pinctrl-names = "default"; - - perst-gpios = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>; - - phy-tx0-term-offset = <7>; - - status = "disabled"; - }; - - adm_dma: dma@18300000 { - compatible = "qcom,adm"; - reg = <0x18300000 0x100000>; - interrupts = <0 170 0>; - #dma-cells = <1>; - - clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; - clock-names = "core", "iface"; - - resets = <&gcc ADM0_RESET>, - <&gcc ADM0_PBUS_RESET>, - <&gcc ADM0_C0_RESET>, - <&gcc ADM0_C1_RESET>, - <&gcc ADM0_C2_RESET>; - reset-names = "clk", "pbus", "c0", "c1", "c2"; - qcom,ee = <0>; - - status = "disabled"; - }; - - nand@1ac00000 { - compatible = "qcom,ipq806x-nand"; - reg = <0x1ac00000 0x800>; - - clocks = <&gcc EBI2_CLK>, - <&gcc EBI2_AON_CLK>; - clock-names = "core", "aon"; - - dmas = <&adm_dma 3>; - dma-names = "rxtx"; - qcom,cmd-crci = <15>; - qcom,data-crci = <3>; - - status = "disabled"; - - #address-cells = <1>; - #size-cells = <0>; - }; - - nss_common: syscon@03000000 { - compatible = "syscon"; - reg = <0x03000000 0x0000FFFF>; - }; - - qsgmii_csr: syscon@1bb00000 { - compatible = "syscon"; - reg = <0x1bb00000 0x000001FF>; - }; - - stmmac_axi_setup: stmmac-axi-config { - snps,wr_osr_lmt = <7>; - snps,rd_osr_lmt = <7>; - snps,blen = <16 0 0 0 0 0 0>; - }; - - gmac0: ethernet@37000000 { - device_type = "network"; - compatible = "qcom,ipq806x-gmac"; - reg = <0x37000000 0x200000>; - interrupts = ; - interrupt-names = "macirq"; - - snps,axi-config = <&stmmac_axi_setup>; - snps,pbl = <32>; - snps,aal = <1>; - - qcom,nss-common = <&nss_common>; - qcom,qsgmii-csr = <&qsgmii_csr>; - - clocks = <&gcc GMAC_CORE1_CLK>; - clock-names = "stmmaceth"; - - resets = <&gcc GMAC_CORE1_RESET>; - reset-names = "stmmaceth"; - - status = "disabled"; - }; - - gmac1: ethernet@37200000 { - device_type = "network"; - compatible = "qcom,ipq806x-gmac"; - reg = <0x37200000 0x200000>; - interrupts = ; - interrupt-names = "macirq"; - - snps,axi-config = <&stmmac_axi_setup>; - snps,pbl = <32>; - snps,aal = <1>; - - qcom,nss-common = <&nss_common>; - qcom,qsgmii-csr = <&qsgmii_csr>; - - clocks = <&gcc GMAC_CORE2_CLK>; - clock-names = "stmmaceth"; - - resets = <&gcc GMAC_CORE2_RESET>; - reset-names = "stmmaceth"; - - status = "disabled"; - }; - - gmac2: ethernet@37400000 { - device_type = "network"; - compatible = "qcom,ipq806x-gmac"; - reg = <0x37400000 0x200000>; - interrupts = ; - interrupt-names = "macirq"; - - snps,axi-config = <&stmmac_axi_setup>; - snps,pbl = <32>; - snps,aal = <1>; - - qcom,nss-common = <&nss_common>; - qcom,qsgmii-csr = <&qsgmii_csr>; - - clocks = <&gcc GMAC_CORE3_CLK>; - clock-names = "stmmaceth"; - - resets = <&gcc GMAC_CORE3_RESET>; - reset-names = "stmmaceth"; - - status = "disabled"; - }; - - gmac3: ethernet@37600000 { - device_type = "network"; - compatible = "qcom,ipq806x-gmac"; - reg = <0x37600000 0x200000>; - interrupts = ; - interrupt-names = "macirq"; - - snps,axi-config = <&stmmac_axi_setup>; - snps,pbl = <32>; - snps,aal = <1>; - - qcom,nss-common = <&nss_common>; - qcom,qsgmii-csr = <&qsgmii_csr>; - - clocks = <&gcc GMAC_CORE4_CLK>; - clock-names = "stmmaceth"; - - resets = <&gcc GMAC_CORE4_RESET>; - reset-names = "stmmaceth"; - - status = "disabled"; - }; - }; - - sfpb_mutex: sfpb-mutex { - compatible = "qcom,sfpb-mutex"; - syscon = <&sfpb_mutex_block 4 4>; - - #hwlock-cells = <1>; - }; - - smem { - compatible = "qcom,smem"; - memory-region = <&smem>; - hwlocks = <&sfpb_mutex 3>; - }; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts deleted file mode 100644 index 987ee852c..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts +++ /dev/null @@ -1,391 +0,0 @@ -#include "qcom-ipq8065-v1.0.dtsi" - -#include - -/ { - model = "ZyXEL NBG6817"; - compatible = "zyxel,nbg6817", "qcom,ipq8065"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - sdcc1 = &sdcc1; - - led-boot = &power; - led-failsafe = &power; - led-running = &power; - led-upgrade = &power; - }; - - chosen { - bootargs = "rootfstype=squashfs,ext4 rootwait noinitrd"; - linux,stdout-path = "serial0:115200n8"; - append-rootblock = "root=/dev/mmcblk0p"; - }; - - soc { - pinmux@800000 { - button_pins: button_pins { - mux { - pins = "gpio53", "gpio54", "gpio65"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - led_pins: led_pins { - mux { - pins = "gpio9", "gpio26", "gpio33", "gpio64"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - - clk { - pins = "gpio1"; - input-disable; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - - tx { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ; - input-disable; - }; - }; - - spi_pins: spi_pins { - mux { - pins = "gpio18", "gpio19", "gpio21"; - function = "gsbi5"; - drive-strength = <10>; - bias-none; - }; - - cs { - pins = "gpio20"; - drive-strength = <12>; - }; - }; - - usb0_pwr_en_pins: usb0_pwr_en_pins { - mux { - pins = "gpio16", "gpio17"; - function = "gpio"; - drive-strength = <12>; - }; - - pwr { - pins = "gpio17"; - bias-pull-down; - output-high; - }; - - ovc { - pins = "gpio16"; - bias-pull-up; - }; - }; - - usb1_pwr_en_pins: usb1_pwr_en_pins { - mux { - pins = "gpio14", "gpio15"; - function = "gpio"; - drive-strength = <12>; - }; - - pwr { - pins = "gpio14"; - bias-pull-down; - output-high; - }; - - ovc { - pins = "gpio15"; - bias-pull-up; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - gsbi5: gsbi@1a200000 { - qcom,mode = ; - status = "ok"; - - spi4: spi@1a280000 { - status = "ok"; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; - - flash: m25p80@0 { - compatible = "jedec,spi-nor"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <51200000>; - reg = <0>; - - linux,part-probe = "qcom-smem"; - }; - }; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - - pinctrl-0 = <&usb0_pwr_en_pins>; - pinctrl-names = "default"; - }; - - usb30@1 { - status = "ok"; - - pinctrl-0 = <&usb1_pwr_en_pins>; - pinctrl-names = "default"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&pcie0_pins>; - pinctrl-names = "default"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&pcie1_pins>; - pinctrl-names = "default"; - force_gen1 = <1>; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */ - 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */ - 0x00978 0x19008643 /* QM_PORT1_CTRL0 */ - 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */ - 0x00980 0x19008643 /* QM_PORT2_CTRL0 */ - 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */ - 0x00988 0x19008643 /* QM_PORT3_CTRL0 */ - 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */ - 0x00990 0x19008643 /* QM_PORT4_CTRL0 */ - 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */ - 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */ - 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */ - 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */ - 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - qca,ar8327-initvals = < - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x0000c 0x80 /* PAD6_MODE */ - >; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - qcom,phy_mdio_addr = <4>; - qcom,poll_required = <0>; - qcom,rgmii_delay = <1>; - qcom,phy_mii_type = <0>; - qcom,emulation = <0>; - qcom,irq = <255>; - mdiobus = <&mdio0>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - qcom,phy_mdio_addr = <0>; /* none */ - qcom,poll_required = <0>; /* no polling */ - qcom,rgmii_delay = <0>; - qcom,phy_mii_type = <1>; - qcom,emulation = <0>; - qcom,irq = <258>; - mdiobus = <&mdio0>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - - amba { - sdcc1: sdcc@12400000 { - status = "okay"; - }; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - internet { - label = "nbg6817:white:internet"; - gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; - }; - - power: power { - label = "nbg6817:white:power"; - gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - wifi2g { - label = "nbg6817:amber:wifi2g"; - gpios = <&qcom_pinmux 33 GPIO_ACTIVE_HIGH>; - }; - - /* wifi2g amber from the manual is missing */ - - wifi5g { - label = "nbg6817:amber:wifi5g"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; - }; - - /* wifi5g amber from the manual is missing */ - }; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts deleted file mode 100644 index 4c89dcf76..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-r7800.dts +++ /dev/null @@ -1,573 +0,0 @@ -#include "qcom-ipq8065-v1.0.dtsi" - -#include - -/ { - model = "Netgear Nighthawk X4S R7800"; - compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064"; - - memory@0 { - reg = <0x42000000 0x1e000000>; - device_type = "memory"; - }; - - reserved-memory { - #address-cells = <1>; - #size-cells = <1>; - ranges; - rsvd@41200000 { - reg = <0x41200000 0x300000>; - no-map; - }; - - rsvd@5fe00000 { - reg = <0x5fe00000 0x200000>; - reusable; - }; - }; - - aliases { - serial0 = &gsbi4_serial; - mdio-gpio0 = &mdio0; - - led-boot = &power_white; - led-failsafe = &power_amber; - led-running = &power_white; - led-upgrade = &power_amber; - }; - - chosen { - linux,stdout-path = "serial0:115200n8"; - }; - - soc { - pinmux@800000 { - button_pins: button_pins { - mux { - pins = "gpio6", "gpio54", "gpio65"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; - }; - - i2c4_pins: i2c4_pinmux { - mux { - pins = "gpio12", "gpio13"; - function = "gsbi4"; - drive-strength = <12>; - bias-disable; - }; - }; - - led_pins: led_pins { - pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23", - "gpio24","gpio26", "gpio53", "gpio64"; - function = "gpio"; - drive-strength = <2>; - bias-pull-down; - }; - - nand_pins: nand_pins { - mux { - pins = "gpio34", "gpio35", "gpio36", - "gpio37", "gpio38", "gpio39", - "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - function = "nand"; - drive-strength = <10>; - bias-disable; - }; - pullups { - pins = "gpio39"; - bias-pull-up; - }; - hold { - pins = "gpio40", "gpio41", "gpio42", - "gpio43", "gpio44", "gpio45", - "gpio46", "gpio47"; - bias-bus-hold; - }; - }; - - mdio0_pins: mdio0_pins { - mux { - pins = "gpio0", "gpio1"; - function = "gpio"; - drive-strength = <8>; - bias-disable; - }; - - clk { - pins = "gpio1"; - input-disable; - }; - }; - - rgmii2_pins: rgmii2_pins { - mux { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", - "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; - function = "rgmii2"; - drive-strength = <8>; - bias-disable; - }; - - tx { - pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ; - input-disable; - }; - }; - - spi_pins: spi_pins { - mux { - pins = "gpio18", "gpio19", "gpio21"; - function = "gsbi5"; - bias-pull-down; - }; - - data { - pins = "gpio18", "gpio19"; - drive-strength = <10>; - }; - - cs { - pins = "gpio20"; - drive-strength = <10>; - bias-pull-up; - }; - - clk { - pins = "gpio21"; - drive-strength = <12>; - }; - }; - - spi6_pins: spi6_pins { - mux { - pins = "gpio55", "gpio56", "gpio58"; - function = "gsbi6"; - bias-pull-down; - }; - - mosi { - pins = "gpio55"; - drive-strength = <12>; - }; - - miso { - pins = "gpio56"; - drive-strength = <14>; - }; - - cs { - pins = "gpio57"; - drive-strength = <12>; - bias-pull-up; - }; - - clk { - pins = "gpio58"; - drive-strength = <12>; - }; - - reset { - pins = "gpio33"; - drive-strength = <10>; - bias-pull-down; - output-high; - }; - }; - - usb0_pwr_en_pins: usb0_pwr_en_pins { - mux { - pins = "gpio15"; - function = "gpio"; - drive-strength = <12>; - bias-pull-down; - output-high; - }; - }; - - usb1_pwr_en_pins: usb1_pwr_en_pins { - mux { - pins = "gpio16", "gpio68"; - function = "gpio"; - drive-strength = <12>; - bias-pull-down; - output-high; - }; - }; - }; - - gsbi@16300000 { - qcom,mode = ; - status = "ok"; - serial@16340000 { - status = "ok"; - }; - /* - * The i2c device on gsbi4 should not be enabled. - * On ipq806x designs gsbi4 i2c is meant for exclusive - * RPM usage. Turning this on in kernel manifests as - * i2c failure for the RPM. - */ - }; - - gsbi5: gsbi@1a200000 { - qcom,mode = ; - status = "ok"; - - spi5: spi@1a280000 { - status = "ok"; - - pinctrl-0 = <&spi_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>; - - flash: m25p80@0 { - compatible = "jedec,spi-nor"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <50000000>; - reg = <0>; - - linux,part-probe = "qcom-smem"; - }; - }; - }; - - gsbi6: gsbi@16500000 { - qcom,mode = ; - status = "ok"; - spi6: spi@16580000 { - status = "ok"; - - pinctrl-0 = <&spi6_pins>; - pinctrl-names = "default"; - - cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>; - - spi-nor@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <6000000>; - }; - }; - }; - - sata-phy@1b400000 { - status = "ok"; - }; - - sata@29000000 { - ports-implemented = <0x1>; - status = "ok"; - }; - - phy@100f8800 { /* USB3 port 1 HS phy */ - status = "ok"; - }; - - phy@100f8830 { /* USB3 port 1 SS phy */ - status = "ok"; - }; - - phy@110f8800 { /* USB3 port 0 HS phy */ - status = "ok"; - }; - - phy@110f8830 { /* USB3 port 0 SS phy */ - status = "ok"; - }; - - usb30@0 { - status = "ok"; - - pinctrl-0 = <&usb0_pwr_en_pins>; - pinctrl-names = "default"; - }; - - usb30@1 { - status = "ok"; - - pinctrl-0 = <&usb1_pwr_en_pins>; - pinctrl-names = "default"; - }; - - pcie0: pci@1b500000 { - status = "ok"; - }; - - pcie1: pci@1b700000 { - status = "ok"; - force_gen1 = <1>; - }; - - nand@1ac00000 { - status = "ok"; - - pinctrl-0 = <&nand_pins>; - pinctrl-names = "default"; - - cs0 { - reg = <0>; - compatible = "qcom,nandcs"; - - nand-ecc-strength = <4>; - nand-bus-width = <8>; - nand-ecc-step-size = <512>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - qcadata@0 { - label = "qcadata"; - reg = <0x0000000 0x0c80000>; - read-only; - }; - - APPSBL@c80000 { - label = "APPSBL"; - reg = <0x0c80000 0x0500000>; - read-only; - }; - - APPSBLENV@1180000 { - label = "APPSBLENV"; - reg = <0x1180000 0x0080000>; - read-only; - }; - - art: art@1200000 { - label = "art"; - reg = <0x1200000 0x0140000>; - read-only; - }; - - artbak: art@1340000 { - label = "artbak"; - reg = <0x1340000 0x0140000>; - read-only; - }; - - kernel@1480000 { - label = "kernel"; - reg = <0x1480000 0x0200000>; - }; - - ubi@1680000 { - label = "ubi"; - reg = <0x1680000 0x1E00000>; - }; - - netgear@3480000 { - label = "netgear"; - reg = <0x3480000 0x4480000>; - read-only; - }; - - reserve@7900000 { - label = "reserve"; - reg = <0x7900000 0x0700000>; - read-only; - }; - - firmware@1480000 { - label = "firmware"; - reg = <0x1480000 0x2000000>; - }; - }; - }; - }; - - mdio0: mdio { - compatible = "virtual,mdio-gpio"; - #address-cells = <1>; - #size-cells = <0>; - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&mdio0_pins>; - pinctrl-names = "default"; - - - phy0: ethernet-phy@0 { - device_type = "ethernet-phy"; - reg = <0>; - qca,ar8327-initvals = < - 0x00004 0x7600000 /* PAD0_MODE */ - 0x00008 0x1000000 /* PAD5_MODE */ - 0x0000c 0x80 /* PAD6_MODE */ - 0x000e4 0xaa545 /* MAC_POWER_SEL */ - 0x000e0 0xc74164de /* SGMII_CTRL */ - 0x0007c 0x4e /* PORT0_STATUS */ - 0x00094 0x4e /* PORT6_STATUS */ - 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */ - 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */ - 0x00978 0x19008643 /* QM_PORT1_CTRL0 */ - 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */ - 0x00980 0x19008643 /* QM_PORT2_CTRL0 */ - 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */ - 0x00988 0x19008643 /* QM_PORT3_CTRL0 */ - 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */ - 0x00990 0x19008643 /* QM_PORT4_CTRL0 */ - 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */ - 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */ - 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */ - 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */ - 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */ - >; - qca,ar8327-vlans = < - 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */ - 0x2 0x21 /* VLAN2 Ports 0/5 */ - >; - }; - - phy4: ethernet-phy@4 { - device_type = "ethernet-phy"; - reg = <4>; - qca,ar8327-initvals = < - 0x000e4 0x6a545 /* MAC_POWER_SEL */ - 0x0000c 0x80 /* PAD6_MODE */ - >; - }; - }; - - gmac1: ethernet@37200000 { - status = "ok"; - phy-mode = "rgmii"; - qcom,id = <1>; - qcom,phy_mdio_addr = <4>; - qcom,poll_required = <0>; - qcom,rgmii_delay = <1>; - qcom,phy_mii_type = <0>; - qcom,emulation = <0>; - qcom,irq = <255>; - mdiobus = <&mdio0>; - - pinctrl-0 = <&rgmii2_pins>; - pinctrl-names = "default"; - - mtd-mac-address = <&art 6>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - gmac2: ethernet@37400000 { - status = "ok"; - phy-mode = "sgmii"; - qcom,id = <2>; - qcom,phy_mdio_addr = <0>; /* none */ - qcom,poll_required = <0>; /* no polling */ - qcom,rgmii_delay = <0>; - qcom,phy_mii_type = <1>; - qcom,emulation = <0>; - qcom,irq = <258>; - mdiobus = <&mdio0>; - - mtd-mac-address = <&art 0>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - rpm@108000 { - pinctrl-0 = <&i2c4_pins>; - pinctrl-names = "default"; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&button_pins>; - pinctrl-names = "default"; - - wifi { - label = "wifi"; - gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <60>; - wakeup-source; - }; - - reset { - label = "reset"; - gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <60>; - wakeup-source; - }; - - wps { - label = "wps"; - gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <60>; - wakeup-source; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pins>; - pinctrl-names = "default"; - - power_white: power_white { - label = "r7800:white:power"; - gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>; - default-state = "keep"; - }; - - power_amber: power_amber { - label = "r7800:amber:power"; - gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>; - }; - - wan_white { - label = "r7800:white:wan"; - gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>; - }; - - wan_amber { - label = "r7800:amber:wan"; - gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>; - }; - - usb1 { - label = "r7800:white:usb1"; - gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>; - }; - - usb2 { - label = "r7800:white:usb2"; - gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>; - }; - - esata { - label = "r7800:white:esata"; - gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>; - }; - - wifi { - label = "r7800:white:wifi"; - gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "r7800:white:wps"; - gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>; - }; - }; -}; - -&adm_dma { - status = "ok"; -}; diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-v1.0.dtsi b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-v1.0.dtsi deleted file mode 100644 index 22b5338cc..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065-v1.0.dtsi +++ /dev/null @@ -1 +0,0 @@ -#include "qcom-ipq8065.dtsi" diff --git a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi deleted file mode 100644 index 15f3b95f8..000000000 --- a/target/linux/ipq40xx/files-4.9/arch/arm/boot/dts/qcom-ipq8065.dtsi +++ /dev/null @@ -1,164 +0,0 @@ -#include "qcom-ipq8064.dtsi" - -/ { - model = "Qualcomm IPQ8065"; - compatible = "qcom,ipq8065", "qcom,ipq8064"; - - qcom,pvs { - qcom,pvs-format-a; - qcom,speed0-pvs0-bin-v0 = - < 1725000000 1262500 >, - < 1400000000 1175000 >, - < 1000000000 1100000 >, - < 800000000 1050000 >, - < 600000000 1000000 >, - < 384000000 975000 >; - qcom,speed0-pvs1-bin-v0 = - < 1725000000 1225000 >, - < 1400000000 1150000 >, - < 1000000000 1075000 >, - < 800000000 1025000 >, - < 600000000 975000 >, - < 384000000 950000 >; - qcom,speed0-pvs2-bin-v0 = - < 1725000000 1200000 >, - < 1400000000 1125000 >, - < 1000000000 1050000 >, - < 800000000 1000000 >, - < 600000000 950000 >, - < 384000000 925000 >; - qcom,speed0-pvs3-bin-v0 = - < 1725000000 1175000 >, - < 1400000000 1100000 >, - < 1000000000 1025000 >, - < 800000000 975000 >, - < 600000000 925000 >, - < 384000000 900000 >; - qcom,speed0-pvs4-bin-v0 = - < 1725000000 1150000 >, - < 1400000000 1075000 >, - < 1000000000 1000000 >, - < 800000000 950000 >, - < 600000000 900000 >, - < 384000000 875000 >; - qcom,speed0-pvs5-bin-v0 = - < 1725000000 1100000 >, - < 1400000000 1025000 >, - < 1000000000 950000 >, - < 800000000 900000 >, - < 600000000 850000 >, - < 384000000 825000 >; - qcom,speed0-pvs6-bin-v0 = - < 1725000000 1050000 >, - < 1400000000 975000 >, - < 1000000000 900000 >, - < 800000000 850000 >, - < 600000000 800000 >, - < 384000000 775000 >; - }; - - soc: soc { - - rpm@108000 { - - regulators { - - smb208_s2a: s2a { - regulator-min-microvolt = <775000>; - regulator-max-microvolt = <1275000>; - }; - - smb208_s2b: s2b { - regulator-min-microvolt = <775000>; - regulator-max-microvolt = <1275000>; - }; - }; - }; - - ss_phy_0: phy@110f8830 { - rx_eq = <2>; - tx_deamp_3_5db = <32>; - mpll = <0xa0>; - }; - ss_phy_1: phy@100f8830 { - rx_eq = <2>; - tx_deamp_3_5db = <32>; - mpll = <0xa0>; - }; - - /* Temporary fixed regulator */ - vsdcc_fixed: vsdcc-regulator { - compatible = "regulator-fixed"; - regulator-name = "SDCC Power"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - sdcc1bam:dma@12402000 { - compatible = "qcom,bam-v1.3.0"; - reg = <0x12402000 0x8000>; - interrupts = <0 98 0>; - clocks = <&gcc SDC1_H_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - }; - - sdcc3bam:dma@12182000 { - compatible = "qcom,bam-v1.3.0"; - reg = <0x12182000 0x8000>; - interrupts = <0 96 0>; - clocks = <&gcc SDC3_H_CLK>; - clock-names = "bam_clk"; - #dma-cells = <1>; - qcom,ee = <0>; - }; - - amba { - compatible = "arm,amba-bus"; - #address-cells = <1>; - #size-cells = <1>; - ranges; - sdcc1: sdcc@12400000 { - status = "disabled"; - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - reg = <0x12400000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC1_CLK>, <&gcc SDC1_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - max-frequency = <96000000>; - non-removable; - cap-sd-highspeed; - cap-mmc-highspeed; - vmmc-supply = <&vsdcc_fixed>; - dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; - dma-names = "tx", "rx"; - }; - - sdcc3: sdcc@12180000 { - compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x00051180>; - status = "disabled"; - reg = <0x12180000 0x2000>; - interrupts = ; - interrupt-names = "cmd_irq"; - clocks = <&gcc SDC3_CLK>, <&gcc SDC3_H_CLK>; - clock-names = "mclk", "apb_pclk"; - bus-width = <8>; - cap-sd-highspeed; - cap-mmc-highspeed; - max-frequency = <192000000>; - #mmc-ddr-1_8v; - sd-uhs-sdr104; - sd-uhs-ddr50; - vqmmc-supply = <&vsdcc_fixed>; - dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; - dma-names = "tx", "rx"; - }; - }; - }; -}; diff --git a/target/linux/ipq40xx/image/Makefile b/target/linux/ipq40xx/image/Makefile index 8b7d46e55..e3da49679 100644 --- a/target/linux/ipq40xx/image/Makefile +++ b/target/linux/ipq40xx/image/Makefile @@ -31,6 +31,29 @@ define Device/UbiFit IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata endef +define Device/DniImage + KERNEL_SUFFIX := -fit-uImage.itb + KERNEL = kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb + KERNEL_NAME := Image + NETGEAR_BOARD_ID := + NETGEAR_HW_ID := + IMAGES := factory.img sysupgrade.bin + IMAGE/factory.img := append-kernel | pad-offset 64k 64 | append-uImage-fakehdr filesystem | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | netgear-dni + IMAGE/sysupgrade.bin := append-kernel | pad-offset 64k 64 | append-uImage-fakehdr filesystem | pad-to $$$$(KERNEL_SIZE) | append-rootfs | pad-rootfs | append-metadata +endef +DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID + + +define Device/8dev_jalapeno + $(call Device/FitImage) + $(call Device/UbiFit) + DEVICE_DTS := qcom-ipq4018-jalapeno + BLOCKSIZE := 128k + PAGESIZE := 2048 + DEVICE_TITLE := 8devices Jalapeno + DEVICE_PACKAGES := ipq-wifi-8dev_jalapeno +endef +TARGET_DEVICES += 8dev_jalapeno define Device/asus_rt-ac58u $(call Device/FitImageLzma) @@ -93,7 +116,7 @@ define Device/compex_wpj428 KERNEL_SIZE := 4096k IMAGES = sysupgrade.bin IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata - DEVICE_PACKAGES := ath10k-firmware-qca4019 kmod-gpio-beeper + DEVICE_PACKAGES := kmod-gpio-beeper endef TARGET_DEVICES += compex_wpj428 @@ -121,6 +144,29 @@ define Device/meraki_mr33 endef TARGET_DEVICES += meraki_mr33 +define Device/netgear_ex61x0v2 + $(call Device/DniImage) + KERNEL_SIZE := 3080192 + DEVICE_DTS_CONFIG := config@4 + DEVICE_PACKAGES := ipq-wifi-netgear_ex61x0v2 + NETGEAR_BOARD_ID := EX6150v2series + NETGEAR_HW_ID := 29765285+16+0+128+2x2 +endef + +define Device/netgear_ex6100v2 + $(call Device/netgear_ex61x0v2) + DEVICE_DTS := qcom-ipq4018-ex6100v2 + DEVICE_TITLE := Netgear EX6100v2 +endef +TARGET_DEVICES += netgear_ex6100v2 + +define Device/netgear_ex6150v2 + $(call Device/netgear_ex61x0v2) + DEVICE_DTS := qcom-ipq4018-ex6150v2 + DEVICE_TITLE := Netgear EX6150v2 +endef +TARGET_DEVICES += netgear_ex6150v2 + define Device/openmesh_a42 $(call Device/FitImageLzma) DEVICE_DTS := qcom-ipq4018-a42 @@ -132,7 +178,7 @@ define Device/openmesh_a42 IMAGES = factory.bin sysupgrade.bin IMAGE/factory.bin := append-rootfs | pad-rootfs | openmesh-image ce_type=A42 IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | sysupgrade-tar rootfs=$$$$@ | append-metadata - DEVICE_PACKAGES := ath10k-firmware-qca4019 uboot-envtools + DEVICE_PACKAGES := uboot-envtools endef TARGET_DEVICES += openmesh_a42 @@ -146,7 +192,6 @@ define Device/qcom_ap-dk01.1-c1 $(call Device/FitImage) IMAGES := sysupgrade.bin IMAGE/sysupgrade.bin := append-kernel | pad-to $$$${KERNEL_SIZE} | append-rootfs | pad-rootfs | append-metadata - DEVICE_PACKAGES := ath10k-firmware-qca4019 endef TARGET_DEVICES += qcom_ap-dk01.1-c1 diff --git a/target/linux/ipq40xx/patches-4.14/069-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-4.14/069-arm-boot-add-dts-files.patch index 134197fe0..caf82fd0a 100644 --- a/target/linux/ipq40xx/patches-4.14/069-arm-boot-add-dts-files.patch +++ b/target/linux/ipq40xx/patches-4.14/069-arm-boot-add-dts-files.patch @@ -10,12 +10,15 @@ Signed-off-by: John Crispin --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -697,7 +697,15 @@ dtb-$(CONFIG_ARCH_QCOM) += \ +@@ -697,7 +697,18 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8074-dragonboard.dtb \ qcom-apq8084-ifc6540.dtb \ qcom-apq8084-mtp.dtb \ + qcom-ipq4018-a42.dtb \ ++ qcom-ipq4018-ex6100v2.dtb \ ++ qcom-ipq4018-ex6150v2.dtb \ + qcom-ipq4018-fritz4040.dtb \ ++ qcom-ipq4018-jalapeno.dtb \ + qcom-ipq4018-rt-ac58u.dtb \ qcom-ipq4019-ap.dk01.1-c1.dtb \ + qcom-ipq4019-ap.dk04.1-c1.dtb \ diff --git a/target/linux/ipq40xx/patches-4.14/605-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch b/target/linux/ipq40xx/patches-4.14/605-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch index a52fe2832..2ef42212e 100644 --- a/target/linux/ipq40xx/patches-4.14/605-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch +++ b/target/linux/ipq40xx/patches-4.14/605-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch @@ -41,7 +41,7 @@ Reviewed-by: Grant Grundler /* * This structure holds all XPS maps for device. Maps are indexed by CPU. */ -@@ -1239,6 +1249,9 @@ struct net_device_ops { +@@ -1258,6 +1268,9 @@ struct net_device_ops { const struct sk_buff *skb, u16 rxq_index, u32 flow_id); diff --git a/target/linux/ipq40xx/patches-4.14/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch b/target/linux/ipq40xx/patches-4.14/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch index e9d262069..a358a56ea 100644 --- a/target/linux/ipq40xx/patches-4.14/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch +++ b/target/linux/ipq40xx/patches-4.14/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch @@ -1,6 +1,6 @@ --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts -@@ -19,4 +19,112 @@ +@@ -19,4 +19,71 @@ / { model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1"; @@ -8,47 +8,6 @@ + device_type = "memory"; + reg = <0x80000000 0x10000000>; + }; -+ -+ reserved-memory { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ ranges; -+ -+ apps_bl@87000000 { -+ reg = <0x87000000 0x400000>; -+ no-map; -+ }; -+ -+ sbl@87400000 { -+ reg = <0x87400000 0x100000>; -+ no-map; -+ }; -+ -+ cnss_debug@87500000 { -+ reg = <0x87500000 0x600000>; -+ no-map; -+ }; -+ -+ cpu_context_dump@87b00000 { -+ reg = <0x87b00000 0x080000>; -+ no-map; -+ }; -+ -+ tz_apps@87b80000 { -+ reg = <0x87b80000 0x280000>; -+ no-map; -+ }; -+ -+ smem@87e00000 { -+ reg = <0x87e00000 0x080000>; -+ no-map; -+ }; -+ -+ tz@87e80000 { -+ reg = <0x87e80000 0x180000>; -+ no-map; -+ }; -+ }; +}; + +&spi_0 { diff --git a/target/linux/ipq40xx/patches-4.14/865-ARM-dts-ipq4019-Add-TZ-and-SMEM-reserved-regions.patch b/target/linux/ipq40xx/patches-4.14/865-ARM-dts-ipq4019-Add-TZ-and-SMEM-reserved-regions.patch new file mode 100644 index 000000000..56ae66b08 --- /dev/null +++ b/target/linux/ipq40xx/patches-4.14/865-ARM-dts-ipq4019-Add-TZ-and-SMEM-reserved-regions.patch @@ -0,0 +1,88 @@ +From fc566294610fa49e9d8c31c4ecc9c82f49b11f59 Mon Sep 17 00:00:00 2001 +From: Sven Eckelmann +Date: Wed, 18 Apr 2018 09:10:44 +0200 +Subject: [PATCH] ARM: dts: ipq4019: Add TZ and SMEM reserved regions + +The QSEE (trustzone) is started on IPQ4019 before Linux is started. +According to QCA, it is placed in in the the memory region +0x87e80000-0x88000000 and must not be accessed directly. There is an +additional memory region 0x87e00000-0x87E80000 smem which which can be used +for communication with the TZ. The driver for the latter is not yet ready +but it is still not allowed to use this memory region like any other +memory region. + +Not reserving this memory region either leads to kernel crashes, kernel +hangs (often during the boot) or bus errors for userspace programs. The +latter happens when a program is using a memory region which is mapped to +these physical memory regions. + + [ 571.758058] Unhandled fault: imprecise external abort (0xc06) at 0x01715ff8 + [ 571.758099] pgd = cebec000 + [ 571.763826] [01715ff8] *pgd=8e7fa835, *pte=87e7f75f, *ppte=87e7fc7f + Bus error + +Signed-off-by: Sven Eckelmann + +Forwarded: https://patchwork.kernel.org/patch/10347459/ +--- +Cc: Sricharan Ramabadhran +Cc: Senthilkumar N L + +There are additional memory regions which have to be initialized first by +Linux. So they are currently not used. We were told by QCA that the +features QSDK uses them for are: + +* crash dump feature + - a couple of regions used when 'qca,scm_restart_reason' dt node has the + value 'dload_status' not set to 1 + + apps_bl <0x87000000 0x400000> + + sbl <0x87400000 0x100000> + + cnss_debug <0x87400000 0x100000> + + cpu_context_dump <0x87b00000 0x080000> + - required driver not available in Linux + - safe to remove +* QSEE app execution + - region tz_apps <0x87b80000 0x280000> + - required driver not available in Linux + - safe to remove +* communication with TZ/QSEE + - region smem <0x87b80000 0x280000> + - driver changes not yet upstreamed + - must not be removed because any access can crash kernel/program +* trustzone (QSEE) private memory + - region tz <0x87e80000 0x180000> + - must not be removed because any access can crash kernel/program + +The problem with the missing regions was reported in 2016 [1]. So maybe +this change qualifies for a stable@vger.kernel.org submission. + +[1] https://www.spinics.net/lists/linux-arm-msm/msg21536.html +--- + arch/arm/boot/dts/qcom-ipq4019.dtsi | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi +@@ -23,6 +23,22 @@ + compatible = "qcom,ipq4019"; + interrupt-parent = <&intc>; + ++ reserved-memory { ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ ranges; ++ ++ smem_region: smem@87e00000 { ++ reg = <0x87e00000 0x080000>; ++ no-map; ++ }; ++ ++ tz@87e80000 { ++ reg = <0x87e80000 0x180000>; ++ no-map; ++ }; ++ }; ++ + aliases { + spi0 = &spi_0; + spi1 = &spi_1; diff --git a/target/linux/ipq40xx/patches-4.9/0001-dtbindings-qcom_adm-Fix-channel-specifiers.patch b/target/linux/ipq40xx/patches-4.9/0001-dtbindings-qcom_adm-Fix-channel-specifiers.patch deleted file mode 100644 index 2a36a85b8..000000000 --- a/target/linux/ipq40xx/patches-4.9/0001-dtbindings-qcom_adm-Fix-channel-specifiers.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 28d0ed88f536dd639adf1b0c7c08e04be3c8f294 Mon Sep 17 00:00:00 2001 -From: Thomas Pedersen -Date: Mon, 16 May 2016 17:58:50 -0700 -Subject: [PATCH 01/69] dtbindings: qcom_adm: Fix channel specifiers - -Original patch from Andy Gross. - -This patch removes the crci information from the dma -channel property. At least one client device requires -using more than one CRCI value for a channel. This does -not match the current binding and the crci information -needs to be removed. - -Instead, the client device will provide this information -via other means. - -Signed-off-by: Andy Gross -Signed-off-by: Thomas Pedersen ---- - Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++---------- - 1 file changed, 6 insertions(+), 10 deletions(-) - ---- a/Documentation/devicetree/bindings/dma/qcom_adm.txt -+++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt -@@ -4,8 +4,7 @@ Required properties: - - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960 - - reg: Address range for DMA registers - - interrupts: Should contain one interrupt shared by all channels --- #dma-cells: must be <2>. First cell denotes the channel number. Second cell -- denotes CRCI (client rate control interface) flow control assignment. -+- #dma-cells: must be <1>. First cell denotes the channel number. - - clocks: Should contain the core clock and interface clock. - - clock-names: Must contain "core" for the core clock and "iface" for the - interface clock. -@@ -22,7 +21,7 @@ Example: - compatible = "qcom,adm"; - reg = <0x18300000 0x100000>; - interrupts = <0 170 0>; -- #dma-cells = <2>; -+ #dma-cells = <1>; - - clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>; - clock-names = "core", "iface"; -@@ -35,15 +34,12 @@ Example: - qcom,ee = <0>; - }; - --DMA clients must use the format descripted in the dma.txt file, using a three -+DMA clients must use the format descripted in the dma.txt file, using a two - cell specifier for each channel. - --Each dmas request consists of 3 cells: -+Each dmas request consists of two cells: - 1. phandle pointing to the DMA controller - 2. channel number -- 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0. -- The CRCI is used for flow control. It identifies the peripheral device that -- is the source/destination for the transferred data. - - Example: - -@@ -56,7 +52,7 @@ Example: - - cs-gpios = <&qcom_pinmux 20 0>; - -- dmas = <&adm_dma 6 9>, -- <&adm_dma 5 10>; -+ dmas = <&adm_dma 6>, -+ <&adm_dma 5>; - dma-names = "rx", "tx"; - }; diff --git a/target/linux/ipq40xx/patches-4.9/0002-dmaengine-Add-ADM-driver.patch b/target/linux/ipq40xx/patches-4.9/0002-dmaengine-Add-ADM-driver.patch deleted file mode 100644 index 4ad025c9c..000000000 --- a/target/linux/ipq40xx/patches-4.9/0002-dmaengine-Add-ADM-driver.patch +++ /dev/null @@ -1,966 +0,0 @@ -From 563fa24db4e529c5a3311928d73a8a90531ee527 Mon Sep 17 00:00:00 2001 -From: Thomas Pedersen -Date: Mon, 16 May 2016 17:58:51 -0700 -Subject: [PATCH 02/69] dmaengine: Add ADM driver - -Original patch by Andy Gross. - -Add the DMA engine driver for the QCOM Application Data Mover (ADM) DMA -controller found in the MSM8x60 and IPQ/APQ8064 platforms. - -The ADM supports both memory to memory transactions and memory -to/from peripheral device transactions. The controller also provides flow -control capabilities for transactions to/from peripheral devices. - -The initial release of this driver supports slave transfers to/from peripherals -and also incorporates CRCI (client rate control interface) flow control. - -Signed-off-by: Andy Gross -Signed-off-by: Thomas Pedersen ---- - drivers/dma/qcom/Kconfig | 10 + - drivers/dma/qcom/Makefile | 1 + - drivers/dma/qcom/qcom_adm.c | 900 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 911 insertions(+) - create mode 100644 drivers/dma/qcom/qcom_adm.c - ---- a/drivers/dma/qcom/Kconfig -+++ b/drivers/dma/qcom/Kconfig -@@ -27,3 +27,13 @@ config QCOM_HIDMA - (user to kernel, kernel to kernel, etc.). It only supports - memcpy interface. The core is not intended for general - purpose slave DMA. -+ -+config QCOM_ADM -+ tristate "Qualcomm ADM support" -+ depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) -+ select DMA_ENGINE -+ select DMA_VIRTUAL_CHANNELS -+ ---help--- -+ Enable support for the Qualcomm ADM DMA controller. This controller -+ provides DMA capabilities for both general purpose and on-chip -+ peripheral devices. ---- a/drivers/dma/qcom/Makefile -+++ b/drivers/dma/qcom/Makefile -@@ -3,3 +3,4 @@ obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mg - hdma_mgmt-objs := hidma_mgmt.o hidma_mgmt_sys.o - obj-$(CONFIG_QCOM_HIDMA) += hdma.o - hdma-objs := hidma_ll.o hidma.o hidma_dbg.o -+obj-$(CONFIG_QCOM_ADM) += qcom_adm.o ---- /dev/null -+++ b/drivers/dma/qcom/qcom_adm.c -@@ -0,0 +1,914 @@ -+/* -+ * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../dmaengine.h" -+#include "../virt-dma.h" -+ -+/* ADM registers - calculated from channel number and security domain */ -+#define ADM_CHAN_MULTI 0x4 -+#define ADM_CI_MULTI 0x4 -+#define ADM_CRCI_MULTI 0x4 -+#define ADM_EE_MULTI 0x800 -+#define ADM_CHAN_OFFS(chan) (ADM_CHAN_MULTI * chan) -+#define ADM_EE_OFFS(ee) (ADM_EE_MULTI * ee) -+#define ADM_CHAN_EE_OFFS(chan, ee) (ADM_CHAN_OFFS(chan) + ADM_EE_OFFS(ee)) -+#define ADM_CHAN_OFFS(chan) (ADM_CHAN_MULTI * chan) -+#define ADM_CI_OFFS(ci) (ADM_CHAN_OFF(ci)) -+#define ADM_CH_CMD_PTR(chan, ee) (ADM_CHAN_EE_OFFS(chan, ee)) -+#define ADM_CH_RSLT(chan, ee) (0x40 + ADM_CHAN_EE_OFFS(chan, ee)) -+#define ADM_CH_FLUSH_STATE0(chan, ee) (0x80 + ADM_CHAN_EE_OFFS(chan, ee)) -+#define ADM_CH_STATUS_SD(chan, ee) (0x200 + ADM_CHAN_EE_OFFS(chan, ee)) -+#define ADM_CH_CONF(chan) (0x240 + ADM_CHAN_OFFS(chan)) -+#define ADM_CH_RSLT_CONF(chan, ee) (0x300 + ADM_CHAN_EE_OFFS(chan, ee)) -+#define ADM_SEC_DOMAIN_IRQ_STATUS(ee) (0x380 + ADM_EE_OFFS(ee)) -+#define ADM_CI_CONF(ci) (0x390 + ci * ADM_CI_MULTI) -+#define ADM_GP_CTL 0x3d8 -+#define ADM_CRCI_CTL(crci, ee) (0x400 + crci * ADM_CRCI_MULTI + \ -+ ADM_EE_OFFS(ee)) -+ -+/* channel status */ -+#define ADM_CH_STATUS_VALID BIT(1) -+ -+/* channel result */ -+#define ADM_CH_RSLT_VALID BIT(31) -+#define ADM_CH_RSLT_ERR BIT(3) -+#define ADM_CH_RSLT_FLUSH BIT(2) -+#define ADM_CH_RSLT_TPD BIT(1) -+ -+/* channel conf */ -+#define ADM_CH_CONF_SHADOW_EN BIT(12) -+#define ADM_CH_CONF_MPU_DISABLE BIT(11) -+#define ADM_CH_CONF_PERM_MPU_CONF BIT(9) -+#define ADM_CH_CONF_FORCE_RSLT_EN BIT(7) -+#define ADM_CH_CONF_SEC_DOMAIN(ee) (((ee & 0x3) << 4) | ((ee & 0x4) << 11)) -+ -+/* channel result conf */ -+#define ADM_CH_RSLT_CONF_FLUSH_EN BIT(1) -+#define ADM_CH_RSLT_CONF_IRQ_EN BIT(0) -+ -+/* CRCI CTL */ -+#define ADM_CRCI_CTL_MUX_SEL BIT(18) -+#define ADM_CRCI_CTL_RST BIT(17) -+ -+/* CI configuration */ -+#define ADM_CI_RANGE_END(x) (x << 24) -+#define ADM_CI_RANGE_START(x) (x << 16) -+#define ADM_CI_BURST_4_WORDS BIT(2) -+#define ADM_CI_BURST_8_WORDS BIT(3) -+ -+/* GP CTL */ -+#define ADM_GP_CTL_LP_EN BIT(12) -+#define ADM_GP_CTL_LP_CNT(x) (x << 8) -+ -+/* Command pointer list entry */ -+#define ADM_CPLE_LP BIT(31) -+#define ADM_CPLE_CMD_PTR_LIST BIT(29) -+ -+/* Command list entry */ -+#define ADM_CMD_LC BIT(31) -+#define ADM_CMD_DST_CRCI(n) (((n) & 0xf) << 7) -+#define ADM_CMD_SRC_CRCI(n) (((n) & 0xf) << 3) -+ -+#define ADM_CMD_TYPE_SINGLE 0x0 -+#define ADM_CMD_TYPE_BOX 0x3 -+ -+#define ADM_CRCI_MUX_SEL BIT(4) -+#define ADM_DESC_ALIGN 8 -+#define ADM_MAX_XFER (SZ_64K-1) -+#define ADM_MAX_ROWS (SZ_64K-1) -+#define ADM_MAX_CHANNELS 16 -+ -+struct adm_desc_hw_box { -+ u32 cmd; -+ u32 src_addr; -+ u32 dst_addr; -+ u32 row_len; -+ u32 num_rows; -+ u32 row_offset; -+}; -+ -+struct adm_desc_hw_single { -+ u32 cmd; -+ u32 src_addr; -+ u32 dst_addr; -+ u32 len; -+}; -+ -+struct adm_async_desc { -+ struct virt_dma_desc vd; -+ struct adm_device *adev; -+ -+ size_t length; -+ enum dma_transfer_direction dir; -+ dma_addr_t dma_addr; -+ size_t dma_len; -+ -+ void *cpl; -+ dma_addr_t cp_addr; -+ u32 crci; -+ u32 mux; -+ u32 blk_size; -+}; -+ -+struct adm_chan { -+ struct virt_dma_chan vc; -+ struct adm_device *adev; -+ -+ /* parsed from DT */ -+ u32 id; /* channel id */ -+ -+ struct adm_async_desc *curr_txd; -+ struct dma_slave_config slave; -+ struct list_head node; -+ -+ int error; -+ int initialized; -+}; -+ -+static inline struct adm_chan *to_adm_chan(struct dma_chan *common) -+{ -+ return container_of(common, struct adm_chan, vc.chan); -+} -+ -+struct adm_device { -+ void __iomem *regs; -+ struct device *dev; -+ struct dma_device common; -+ struct device_dma_parameters dma_parms; -+ struct adm_chan *channels; -+ -+ u32 ee; -+ -+ struct clk *core_clk; -+ struct clk *iface_clk; -+ -+ struct reset_control *clk_reset; -+ struct reset_control *c0_reset; -+ struct reset_control *c1_reset; -+ struct reset_control *c2_reset; -+ int irq; -+}; -+ -+/** -+ * adm_free_chan - Frees dma resources associated with the specific channel -+ * -+ * Free all allocated descriptors associated with this channel -+ * -+ */ -+static void adm_free_chan(struct dma_chan *chan) -+{ -+ /* free all queued descriptors */ -+ vchan_free_chan_resources(to_virt_chan(chan)); -+} -+ -+/** -+ * adm_get_blksize - Get block size from burst value -+ * -+ */ -+static int adm_get_blksize(unsigned int burst) -+{ -+ int ret; -+ -+ switch (burst) { -+ case 16: -+ case 32: -+ case 64: -+ case 128: -+ ret = ffs(burst>>4) - 1; -+ break; -+ case 192: -+ ret = 4; -+ break; -+ case 256: -+ ret = 5; -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ -+ return ret; -+} -+ -+/** -+ * adm_process_fc_descriptors - Process descriptors for flow controlled xfers -+ * -+ * @achan: ADM channel -+ * @desc: Descriptor memory pointer -+ * @sg: Scatterlist entry -+ * @crci: CRCI value -+ * @burst: Burst size of transaction -+ * @direction: DMA transfer direction -+ */ -+static void *adm_process_fc_descriptors(struct adm_chan *achan, -+ void *desc, struct scatterlist *sg, u32 crci, u32 burst, -+ enum dma_transfer_direction direction) -+{ -+ struct adm_desc_hw_box *box_desc = NULL; -+ struct adm_desc_hw_single *single_desc; -+ u32 remainder = sg_dma_len(sg); -+ u32 rows, row_offset, crci_cmd; -+ u32 mem_addr = sg_dma_address(sg); -+ u32 *incr_addr = &mem_addr; -+ u32 *src, *dst; -+ -+ if (direction == DMA_DEV_TO_MEM) { -+ crci_cmd = ADM_CMD_SRC_CRCI(crci); -+ row_offset = burst; -+ src = &achan->slave.src_addr; -+ dst = &mem_addr; -+ } else { -+ crci_cmd = ADM_CMD_DST_CRCI(crci); -+ row_offset = burst << 16; -+ src = &mem_addr; -+ dst = &achan->slave.dst_addr; -+ } -+ -+ while (remainder >= burst) { -+ box_desc = desc; -+ box_desc->cmd = ADM_CMD_TYPE_BOX | crci_cmd; -+ box_desc->row_offset = row_offset; -+ box_desc->src_addr = *src; -+ box_desc->dst_addr = *dst; -+ -+ rows = remainder / burst; -+ rows = min_t(u32, rows, ADM_MAX_ROWS); -+ box_desc->num_rows = rows << 16 | rows; -+ box_desc->row_len = burst << 16 | burst; -+ -+ *incr_addr += burst * rows; -+ remainder -= burst * rows; -+ desc += sizeof(*box_desc); -+ } -+ -+ /* if leftover bytes, do one single descriptor */ -+ if (remainder) { -+ single_desc = desc; -+ single_desc->cmd = ADM_CMD_TYPE_SINGLE | crci_cmd; -+ single_desc->len = remainder; -+ single_desc->src_addr = *src; -+ single_desc->dst_addr = *dst; -+ desc += sizeof(*single_desc); -+ -+ if (sg_is_last(sg)) -+ single_desc->cmd |= ADM_CMD_LC; -+ } else { -+ if (box_desc && sg_is_last(sg)) -+ box_desc->cmd |= ADM_CMD_LC; -+ } -+ -+ return desc; -+} -+ -+/** -+ * adm_process_non_fc_descriptors - Process descriptors for non-fc xfers -+ * -+ * @achan: ADM channel -+ * @desc: Descriptor memory pointer -+ * @sg: Scatterlist entry -+ * @direction: DMA transfer direction -+ */ -+static void *adm_process_non_fc_descriptors(struct adm_chan *achan, -+ void *desc, struct scatterlist *sg, -+ enum dma_transfer_direction direction) -+{ -+ struct adm_desc_hw_single *single_desc; -+ u32 remainder = sg_dma_len(sg); -+ u32 mem_addr = sg_dma_address(sg); -+ u32 *incr_addr = &mem_addr; -+ u32 *src, *dst; -+ -+ if (direction == DMA_DEV_TO_MEM) { -+ src = &achan->slave.src_addr; -+ dst = &mem_addr; -+ } else { -+ src = &mem_addr; -+ dst = &achan->slave.dst_addr; -+ } -+ -+ do { -+ single_desc = desc; -+ single_desc->cmd = ADM_CMD_TYPE_SINGLE; -+ single_desc->src_addr = *src; -+ single_desc->dst_addr = *dst; -+ single_desc->len = (remainder > ADM_MAX_XFER) ? -+ ADM_MAX_XFER : remainder; -+ -+ remainder -= single_desc->len; -+ *incr_addr += single_desc->len; -+ desc += sizeof(*single_desc); -+ } while (remainder); -+ -+ /* set last command if this is the end of the whole transaction */ -+ if (sg_is_last(sg)) -+ single_desc->cmd |= ADM_CMD_LC; -+ -+ return desc; -+} -+ -+/** -+ * adm_prep_slave_sg - Prep slave sg transaction -+ * -+ * @chan: dma channel -+ * @sgl: scatter gather list -+ * @sg_len: length of sg -+ * @direction: DMA transfer direction -+ * @flags: DMA flags -+ * @context: transfer context (unused) -+ */ -+static struct dma_async_tx_descriptor *adm_prep_slave_sg(struct dma_chan *chan, -+ struct scatterlist *sgl, unsigned int sg_len, -+ enum dma_transfer_direction direction, unsigned long flags, -+ void *context) -+{ -+ struct adm_chan *achan = to_adm_chan(chan); -+ struct adm_device *adev = achan->adev; -+ struct adm_async_desc *async_desc; -+ struct scatterlist *sg; -+ dma_addr_t cple_addr; -+ u32 i, burst; -+ u32 single_count = 0, box_count = 0, crci = 0; -+ void *desc; -+ u32 *cple; -+ int blk_size = 0; -+ -+ if (!is_slave_direction(direction)) { -+ dev_err(adev->dev, "invalid dma direction\n"); -+ return NULL; -+ } -+ -+ /* -+ * get burst value from slave configuration -+ */ -+ burst = (direction == DMA_MEM_TO_DEV) ? -+ achan->slave.dst_maxburst : -+ achan->slave.src_maxburst; -+ -+ /* if using flow control, validate burst and crci values */ -+ if (achan->slave.device_fc) { -+ -+ blk_size = adm_get_blksize(burst); -+ if (blk_size < 0) { -+ dev_err(adev->dev, "invalid burst value: %d\n", -+ burst); -+ return ERR_PTR(-EINVAL); -+ } -+ -+ crci = achan->slave.slave_id & 0xf; -+ if (!crci || achan->slave.slave_id > 0x1f) { -+ dev_err(adev->dev, "invalid crci value\n"); -+ return ERR_PTR(-EINVAL); -+ } -+ } -+ -+ /* iterate through sgs and compute allocation size of structures */ -+ for_each_sg(sgl, sg, sg_len, i) { -+ if (achan->slave.device_fc) { -+ box_count += DIV_ROUND_UP(sg_dma_len(sg) / burst, -+ ADM_MAX_ROWS); -+ if (sg_dma_len(sg) % burst) -+ single_count++; -+ } else { -+ single_count += DIV_ROUND_UP(sg_dma_len(sg), -+ ADM_MAX_XFER); -+ } -+ } -+ -+ async_desc = kzalloc(sizeof(*async_desc), GFP_ATOMIC); -+ if (!async_desc) -+ return ERR_PTR(-ENOMEM); -+ -+ if (crci) -+ async_desc->mux = achan->slave.slave_id & ADM_CRCI_MUX_SEL ? -+ ADM_CRCI_CTL_MUX_SEL : 0; -+ async_desc->crci = crci; -+ async_desc->blk_size = blk_size; -+ async_desc->dma_len = single_count * sizeof(struct adm_desc_hw_single) + -+ box_count * sizeof(struct adm_desc_hw_box) + -+ sizeof(*cple) + 2 * ADM_DESC_ALIGN; -+ -+ async_desc->cpl = kzalloc(async_desc->dma_len, GFP_ATOMIC); -+ if (!async_desc->cpl) -+ goto free; -+ -+ async_desc->adev = adev; -+ -+ /* both command list entry and descriptors must be 8 byte aligned */ -+ cple = PTR_ALIGN(async_desc->cpl, ADM_DESC_ALIGN); -+ desc = PTR_ALIGN(cple + 1, ADM_DESC_ALIGN); -+ -+ for_each_sg(sgl, sg, sg_len, i) { -+ async_desc->length += sg_dma_len(sg); -+ -+ if (achan->slave.device_fc) -+ desc = adm_process_fc_descriptors(achan, desc, sg, crci, -+ burst, direction); -+ else -+ desc = adm_process_non_fc_descriptors(achan, desc, sg, -+ direction); -+ } -+ -+ async_desc->dma_addr = dma_map_single(adev->dev, async_desc->cpl, -+ async_desc->dma_len, -+ DMA_TO_DEVICE); -+ if (dma_mapping_error(adev->dev, async_desc->dma_addr)) -+ goto free; -+ -+ cple_addr = async_desc->dma_addr + ((void *)cple - async_desc->cpl); -+ -+ /* init cmd list */ -+ dma_sync_single_for_cpu(adev->dev, cple_addr, sizeof(*cple), -+ DMA_TO_DEVICE); -+ *cple = ADM_CPLE_LP; -+ *cple |= (async_desc->dma_addr + ADM_DESC_ALIGN) >> 3; -+ dma_sync_single_for_device(adev->dev, cple_addr, sizeof(*cple), -+ DMA_TO_DEVICE); -+ -+ return vchan_tx_prep(&achan->vc, &async_desc->vd, flags); -+ -+free: -+ kfree(async_desc); -+ return ERR_PTR(-ENOMEM); -+} -+ -+/** -+ * adm_terminate_all - terminate all transactions on a channel -+ * @achan: adm dma channel -+ * -+ * Dequeues and frees all transactions, aborts current transaction -+ * No callbacks are done -+ * -+ */ -+static int adm_terminate_all(struct dma_chan *chan) -+{ -+ struct adm_chan *achan = to_adm_chan(chan); -+ struct adm_device *adev = achan->adev; -+ unsigned long flags; -+ LIST_HEAD(head); -+ -+ spin_lock_irqsave(&achan->vc.lock, flags); -+ vchan_get_all_descriptors(&achan->vc, &head); -+ -+ /* send flush command to terminate current transaction */ -+ writel_relaxed(0x0, -+ adev->regs + ADM_CH_FLUSH_STATE0(achan->id, adev->ee)); -+ -+ spin_unlock_irqrestore(&achan->vc.lock, flags); -+ -+ vchan_dma_desc_free_list(&achan->vc, &head); -+ -+ return 0; -+} -+ -+static int adm_slave_config(struct dma_chan *chan, struct dma_slave_config *cfg) -+{ -+ struct adm_chan *achan = to_adm_chan(chan); -+ unsigned long flag; -+ -+ spin_lock_irqsave(&achan->vc.lock, flag); -+ memcpy(&achan->slave, cfg, sizeof(struct dma_slave_config)); -+ spin_unlock_irqrestore(&achan->vc.lock, flag); -+ -+ return 0; -+} -+ -+/** -+ * adm_start_dma - start next transaction -+ * @achan - ADM dma channel -+ */ -+static void adm_start_dma(struct adm_chan *achan) -+{ -+ struct virt_dma_desc *vd = vchan_next_desc(&achan->vc); -+ struct adm_device *adev = achan->adev; -+ struct adm_async_desc *async_desc; -+ -+ lockdep_assert_held(&achan->vc.lock); -+ -+ if (!vd) -+ return; -+ -+ list_del(&vd->node); -+ -+ /* write next command list out to the CMD FIFO */ -+ async_desc = container_of(vd, struct adm_async_desc, vd); -+ achan->curr_txd = async_desc; -+ -+ /* reset channel error */ -+ achan->error = 0; -+ -+ if (!achan->initialized) { -+ /* enable interrupts */ -+ writel(ADM_CH_CONF_SHADOW_EN | -+ ADM_CH_CONF_PERM_MPU_CONF | -+ ADM_CH_CONF_MPU_DISABLE | -+ ADM_CH_CONF_SEC_DOMAIN(adev->ee), -+ adev->regs + ADM_CH_CONF(achan->id)); -+ -+ writel(ADM_CH_RSLT_CONF_IRQ_EN | ADM_CH_RSLT_CONF_FLUSH_EN, -+ adev->regs + ADM_CH_RSLT_CONF(achan->id, adev->ee)); -+ -+ achan->initialized = 1; -+ } -+ -+ /* set the crci block size if this transaction requires CRCI */ -+ if (async_desc->crci) { -+ writel(async_desc->mux | async_desc->blk_size, -+ adev->regs + ADM_CRCI_CTL(async_desc->crci, adev->ee)); -+ } -+ -+ /* make sure IRQ enable doesn't get reordered */ -+ wmb(); -+ -+ /* write next command list out to the CMD FIFO */ -+ writel(ALIGN(async_desc->dma_addr, ADM_DESC_ALIGN) >> 3, -+ adev->regs + ADM_CH_CMD_PTR(achan->id, adev->ee)); -+} -+ -+/** -+ * adm_dma_irq - irq handler for ADM controller -+ * @irq: IRQ of interrupt -+ * @data: callback data -+ * -+ * IRQ handler for the bam controller -+ */ -+static irqreturn_t adm_dma_irq(int irq, void *data) -+{ -+ struct adm_device *adev = data; -+ u32 srcs, i; -+ struct adm_async_desc *async_desc; -+ unsigned long flags; -+ -+ srcs = readl_relaxed(adev->regs + -+ ADM_SEC_DOMAIN_IRQ_STATUS(adev->ee)); -+ -+ for (i = 0; i < ADM_MAX_CHANNELS; i++) { -+ struct adm_chan *achan = &adev->channels[i]; -+ u32 status, result; -+ -+ if (srcs & BIT(i)) { -+ status = readl_relaxed(adev->regs + -+ ADM_CH_STATUS_SD(i, adev->ee)); -+ -+ /* if no result present, skip */ -+ if (!(status & ADM_CH_STATUS_VALID)) -+ continue; -+ -+ result = readl_relaxed(adev->regs + -+ ADM_CH_RSLT(i, adev->ee)); -+ -+ /* no valid results, skip */ -+ if (!(result & ADM_CH_RSLT_VALID)) -+ continue; -+ -+ /* flag error if transaction was flushed or failed */ -+ if (result & (ADM_CH_RSLT_ERR | ADM_CH_RSLT_FLUSH)) -+ achan->error = 1; -+ -+ spin_lock_irqsave(&achan->vc.lock, flags); -+ async_desc = achan->curr_txd; -+ -+ achan->curr_txd = NULL; -+ -+ if (async_desc) { -+ vchan_cookie_complete(&async_desc->vd); -+ -+ /* kick off next DMA */ -+ adm_start_dma(achan); -+ } -+ -+ spin_unlock_irqrestore(&achan->vc.lock, flags); -+ } -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+/** -+ * adm_tx_status - returns status of transaction -+ * @chan: dma channel -+ * @cookie: transaction cookie -+ * @txstate: DMA transaction state -+ * -+ * Return status of dma transaction -+ */ -+static enum dma_status adm_tx_status(struct dma_chan *chan, dma_cookie_t cookie, -+ struct dma_tx_state *txstate) -+{ -+ struct adm_chan *achan = to_adm_chan(chan); -+ struct virt_dma_desc *vd; -+ enum dma_status ret; -+ unsigned long flags; -+ size_t residue = 0; -+ -+ ret = dma_cookie_status(chan, cookie, txstate); -+ if (ret == DMA_COMPLETE || !txstate) -+ return ret; -+ -+ spin_lock_irqsave(&achan->vc.lock, flags); -+ -+ vd = vchan_find_desc(&achan->vc, cookie); -+ if (vd) -+ residue = container_of(vd, struct adm_async_desc, vd)->length; -+ -+ spin_unlock_irqrestore(&achan->vc.lock, flags); -+ -+ /* -+ * residue is either the full length if it is in the issued list, or 0 -+ * if it is in progress. We have no reliable way of determining -+ * anything inbetween -+ */ -+ dma_set_residue(txstate, residue); -+ -+ if (achan->error) -+ return DMA_ERROR; -+ -+ return ret; -+} -+ -+/** -+ * adm_issue_pending - starts pending transactions -+ * @chan: dma channel -+ * -+ * Issues all pending transactions and starts DMA -+ */ -+static void adm_issue_pending(struct dma_chan *chan) -+{ -+ struct adm_chan *achan = to_adm_chan(chan); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&achan->vc.lock, flags); -+ -+ if (vchan_issue_pending(&achan->vc) && !achan->curr_txd) -+ adm_start_dma(achan); -+ spin_unlock_irqrestore(&achan->vc.lock, flags); -+} -+ -+/** -+ * adm_dma_free_desc - free descriptor memory -+ * @vd: virtual descriptor -+ * -+ */ -+static void adm_dma_free_desc(struct virt_dma_desc *vd) -+{ -+ struct adm_async_desc *async_desc = container_of(vd, -+ struct adm_async_desc, vd); -+ -+ dma_unmap_single(async_desc->adev->dev, async_desc->dma_addr, -+ async_desc->dma_len, DMA_TO_DEVICE); -+ kfree(async_desc->cpl); -+ kfree(async_desc); -+} -+ -+static void adm_channel_init(struct adm_device *adev, struct adm_chan *achan, -+ u32 index) -+{ -+ achan->id = index; -+ achan->adev = adev; -+ -+ vchan_init(&achan->vc, &adev->common); -+ achan->vc.desc_free = adm_dma_free_desc; -+} -+ -+static int adm_dma_probe(struct platform_device *pdev) -+{ -+ struct adm_device *adev; -+ struct resource *iores; -+ int ret; -+ u32 i; -+ -+ adev = devm_kzalloc(&pdev->dev, sizeof(*adev), GFP_KERNEL); -+ if (!adev) -+ return -ENOMEM; -+ -+ adev->dev = &pdev->dev; -+ -+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ adev->regs = devm_ioremap_resource(&pdev->dev, iores); -+ if (IS_ERR(adev->regs)) -+ return PTR_ERR(adev->regs); -+ -+ adev->irq = platform_get_irq(pdev, 0); -+ if (adev->irq < 0) -+ return adev->irq; -+ -+ ret = of_property_read_u32(pdev->dev.of_node, "qcom,ee", &adev->ee); -+ if (ret) { -+ dev_err(adev->dev, "Execution environment unspecified\n"); -+ return ret; -+ } -+ -+ adev->core_clk = devm_clk_get(adev->dev, "core"); -+ if (IS_ERR(adev->core_clk)) -+ return PTR_ERR(adev->core_clk); -+ -+ ret = clk_prepare_enable(adev->core_clk); -+ if (ret) { -+ dev_err(adev->dev, "failed to prepare/enable core clock\n"); -+ return ret; -+ } -+ -+ adev->iface_clk = devm_clk_get(adev->dev, "iface"); -+ if (IS_ERR(adev->iface_clk)) { -+ ret = PTR_ERR(adev->iface_clk); -+ goto err_disable_core_clk; -+ } -+ -+ ret = clk_prepare_enable(adev->iface_clk); -+ if (ret) { -+ dev_err(adev->dev, "failed to prepare/enable iface clock\n"); -+ goto err_disable_core_clk; -+ } -+ -+ adev->clk_reset = devm_reset_control_get(&pdev->dev, "clk"); -+ if (IS_ERR(adev->clk_reset)) { -+ dev_err(adev->dev, "failed to get ADM0 reset\n"); -+ ret = PTR_ERR(adev->clk_reset); -+ goto err_disable_clks; -+ } -+ -+ adev->c0_reset = devm_reset_control_get(&pdev->dev, "c0"); -+ if (IS_ERR(adev->c0_reset)) { -+ dev_err(adev->dev, "failed to get ADM0 C0 reset\n"); -+ ret = PTR_ERR(adev->c0_reset); -+ goto err_disable_clks; -+ } -+ -+ adev->c1_reset = devm_reset_control_get(&pdev->dev, "c1"); -+ if (IS_ERR(adev->c1_reset)) { -+ dev_err(adev->dev, "failed to get ADM0 C1 reset\n"); -+ ret = PTR_ERR(adev->c1_reset); -+ goto err_disable_clks; -+ } -+ -+ adev->c2_reset = devm_reset_control_get(&pdev->dev, "c2"); -+ if (IS_ERR(adev->c2_reset)) { -+ dev_err(adev->dev, "failed to get ADM0 C2 reset\n"); -+ ret = PTR_ERR(adev->c2_reset); -+ goto err_disable_clks; -+ } -+ -+ reset_control_assert(adev->clk_reset); -+ reset_control_assert(adev->c0_reset); -+ reset_control_assert(adev->c1_reset); -+ reset_control_assert(adev->c2_reset); -+ -+ reset_control_deassert(adev->clk_reset); -+ reset_control_deassert(adev->c0_reset); -+ reset_control_deassert(adev->c1_reset); -+ reset_control_deassert(adev->c2_reset); -+ -+ adev->channels = devm_kcalloc(adev->dev, ADM_MAX_CHANNELS, -+ sizeof(*adev->channels), GFP_KERNEL); -+ -+ if (!adev->channels) { -+ ret = -ENOMEM; -+ goto err_disable_clks; -+ } -+ -+ /* allocate and initialize channels */ -+ INIT_LIST_HEAD(&adev->common.channels); -+ -+ for (i = 0; i < ADM_MAX_CHANNELS; i++) -+ adm_channel_init(adev, &adev->channels[i], i); -+ -+ /* reset CRCIs */ -+ for (i = 0; i < 16; i++) -+ writel(ADM_CRCI_CTL_RST, adev->regs + -+ ADM_CRCI_CTL(i, adev->ee)); -+ -+ /* configure client interfaces */ -+ writel(ADM_CI_RANGE_START(0x40) | ADM_CI_RANGE_END(0xb0) | -+ ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(0)); -+ writel(ADM_CI_RANGE_START(0x2a) | ADM_CI_RANGE_END(0x2c) | -+ ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(1)); -+ writel(ADM_CI_RANGE_START(0x12) | ADM_CI_RANGE_END(0x28) | -+ ADM_CI_BURST_8_WORDS, adev->regs + ADM_CI_CONF(2)); -+ writel(ADM_GP_CTL_LP_EN | ADM_GP_CTL_LP_CNT(0xf), -+ adev->regs + ADM_GP_CTL); -+ -+ ret = devm_request_irq(adev->dev, adev->irq, adm_dma_irq, -+ 0, "adm_dma", adev); -+ if (ret) -+ goto err_disable_clks; -+ -+ platform_set_drvdata(pdev, adev); -+ -+ adev->common.dev = adev->dev; -+ adev->common.dev->dma_parms = &adev->dma_parms; -+ -+ /* set capabilities */ -+ dma_cap_zero(adev->common.cap_mask); -+ dma_cap_set(DMA_SLAVE, adev->common.cap_mask); -+ dma_cap_set(DMA_PRIVATE, adev->common.cap_mask); -+ -+ /* initialize dmaengine apis */ -+ adev->common.directions = BIT(DMA_DEV_TO_MEM | DMA_MEM_TO_DEV); -+ adev->common.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR; -+ adev->common.src_addr_widths = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ adev->common.dst_addr_widths = DMA_SLAVE_BUSWIDTH_4_BYTES; -+ adev->common.device_free_chan_resources = adm_free_chan; -+ adev->common.device_prep_slave_sg = adm_prep_slave_sg; -+ adev->common.device_issue_pending = adm_issue_pending; -+ adev->common.device_tx_status = adm_tx_status; -+ adev->common.device_terminate_all = adm_terminate_all; -+ adev->common.device_config = adm_slave_config; -+ -+ ret = dma_async_device_register(&adev->common); -+ if (ret) { -+ dev_err(adev->dev, "failed to register dma async device\n"); -+ goto err_disable_clks; -+ } -+ -+ ret = of_dma_controller_register(pdev->dev.of_node, -+ of_dma_xlate_by_chan_id, -+ &adev->common); -+ if (ret) -+ goto err_unregister_dma; -+ -+ return 0; -+ -+err_unregister_dma: -+ dma_async_device_unregister(&adev->common); -+err_disable_clks: -+ clk_disable_unprepare(adev->iface_clk); -+err_disable_core_clk: -+ clk_disable_unprepare(adev->core_clk); -+ -+ return ret; -+} -+ -+static int adm_dma_remove(struct platform_device *pdev) -+{ -+ struct adm_device *adev = platform_get_drvdata(pdev); -+ struct adm_chan *achan; -+ u32 i; -+ -+ of_dma_controller_free(pdev->dev.of_node); -+ dma_async_device_unregister(&adev->common); -+ -+ for (i = 0; i < ADM_MAX_CHANNELS; i++) { -+ achan = &adev->channels[i]; -+ -+ /* mask IRQs for this channel/EE pair */ -+ writel(0, adev->regs + ADM_CH_RSLT_CONF(achan->id, adev->ee)); -+ -+ adm_terminate_all(&adev->channels[i].vc.chan); -+ } -+ -+ devm_free_irq(adev->dev, adev->irq, adev); -+ -+ clk_disable_unprepare(adev->core_clk); -+ clk_disable_unprepare(adev->iface_clk); -+ -+ return 0; -+} -+ -+static const struct of_device_id adm_of_match[] = { -+ { .compatible = "qcom,adm", }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, adm_of_match); -+ -+static struct platform_driver adm_dma_driver = { -+ .probe = adm_dma_probe, -+ .remove = adm_dma_remove, -+ .driver = { -+ .name = "adm-dma-engine", -+ .of_match_table = adm_of_match, -+ }, -+}; -+ -+module_platform_driver(adm_dma_driver); -+ -+MODULE_AUTHOR("Andy Gross "); -+MODULE_DESCRIPTION("QCOM ADM DMA engine driver"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ipq40xx/patches-4.9/0003-spi-qup-Make-sure-mode-is-only-determined-once.patch b/target/linux/ipq40xx/patches-4.9/0003-spi-qup-Make-sure-mode-is-only-determined-once.patch deleted file mode 100644 index fd9df4448..000000000 --- a/target/linux/ipq40xx/patches-4.9/0003-spi-qup-Make-sure-mode-is-only-determined-once.patch +++ /dev/null @@ -1,208 +0,0 @@ -From 57c4d2626bcb990a2e677b4f769a88c3d8e0911d Mon Sep 17 00:00:00 2001 -From: Andy Gross -Date: Tue, 12 Apr 2016 09:11:47 -0500 -Subject: [PATCH 03/69] spi: qup: Make sure mode is only determined once - -This patch calculates the mode once. All decisions on the current -transaction -is made using the mode instead of use_dma - -Signed-off-by: Andy Gross ---- - drivers/spi/spi-qup.c | 87 ++++++++++++++++++++++----------------------------- - 1 file changed, 37 insertions(+), 50 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -149,12 +149,20 @@ struct spi_qup { - int rx_bytes; - int qup_v1; - -- int use_dma; -+ int mode; - struct dma_slave_config rx_conf; - struct dma_slave_config tx_conf; - }; - - -+static inline bool spi_qup_is_dma_xfer(int mode) -+{ -+ if (mode == QUP_IO_M_MODE_DMOV || mode == QUP_IO_M_MODE_BAM) -+ return true; -+ -+ return false; -+} -+ - static inline bool spi_qup_is_valid_state(struct spi_qup *controller) - { - u32 opstate = readl_relaxed(controller->base + QUP_STATE); -@@ -424,7 +432,7 @@ static irqreturn_t spi_qup_qup_irq(int i - error = -EIO; - } - -- if (!controller->use_dma) { -+ if (!spi_qup_is_dma_xfer(controller->mode)) { - if (opflags & QUP_OP_IN_SERVICE_FLAG) - spi_qup_fifo_read(controller, xfer); - -@@ -443,34 +451,11 @@ static irqreturn_t spi_qup_qup_irq(int i - return IRQ_HANDLED; - } - --static u32 --spi_qup_get_mode(struct spi_master *master, struct spi_transfer *xfer) --{ -- struct spi_qup *qup = spi_master_get_devdata(master); -- u32 mode; -- -- qup->w_size = 4; -- -- if (xfer->bits_per_word <= 8) -- qup->w_size = 1; -- else if (xfer->bits_per_word <= 16) -- qup->w_size = 2; -- -- qup->n_words = xfer->len / qup->w_size; -- -- if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32))) -- mode = QUP_IO_M_MODE_FIFO; -- else -- mode = QUP_IO_M_MODE_BLOCK; -- -- return mode; --} -- - /* set clock freq ... bits per word */ - static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) - { - struct spi_qup *controller = spi_master_get_devdata(spi->master); -- u32 config, iomode, mode, control; -+ u32 config, iomode, control; - int ret, n_words; - - if (spi->mode & SPI_LOOP && xfer->len > controller->in_fifo_sz) { -@@ -491,23 +476,22 @@ static int spi_qup_io_config(struct spi_ - return -EIO; - } - -- mode = spi_qup_get_mode(spi->master, xfer); -+ controller->w_size = DIV_ROUND_UP(xfer->bits_per_word, 8); -+ controller->n_words = xfer->len / controller->w_size; - n_words = controller->n_words; - -- if (mode == QUP_IO_M_MODE_FIFO) { -+ if (n_words <= (controller->in_fifo_sz / sizeof(u32))) { -+ controller->mode = QUP_IO_M_MODE_FIFO; - writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT); - writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT); - /* must be zero for FIFO */ - writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT); - writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -- } else if (!controller->use_dma) { -- writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT); -- writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT); -- /* must be zero for BLOCK and BAM */ -- writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -- } else { -- mode = QUP_IO_M_MODE_BAM; -+ -+ } else if (spi->master->can_dma && -+ spi->master->can_dma(spi->master, spi, xfer) && -+ spi->master->cur_msg_mapped) { -+ controller->mode = QUP_IO_M_MODE_BAM; - writel_relaxed(0, controller->base + QUP_MX_READ_CNT); - writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); - -@@ -528,19 +512,26 @@ static int spi_qup_io_config(struct spi_ - - writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); - } -+ } else { -+ controller->mode = QUP_IO_M_MODE_BLOCK; -+ writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT); -+ writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT); -+ /* must be zero for BLOCK and BAM */ -+ writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -+ writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); - } - - iomode = readl_relaxed(controller->base + QUP_IO_M_MODES); - /* Set input and output transfer mode */ - iomode &= ~(QUP_IO_M_INPUT_MODE_MASK | QUP_IO_M_OUTPUT_MODE_MASK); - -- if (!controller->use_dma) -+ if (!spi_qup_is_dma_xfer(controller->mode)) - iomode &= ~(QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN); - else - iomode |= QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN; - -- iomode |= (mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT); -- iomode |= (mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT); -+ iomode |= (controller->mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT); -+ iomode |= (controller->mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT); - - writel_relaxed(iomode, controller->base + QUP_IO_M_MODES); - -@@ -581,7 +572,7 @@ static int spi_qup_io_config(struct spi_ - config |= xfer->bits_per_word - 1; - config |= QUP_CONFIG_SPI_MODE; - -- if (controller->use_dma) { -+ if (spi_qup_is_dma_xfer(controller->mode)) { - if (!xfer->tx_buf) - config |= QUP_CONFIG_NO_OUTPUT; - if (!xfer->rx_buf) -@@ -599,7 +590,7 @@ static int spi_qup_io_config(struct spi_ - * status change in BAM mode - */ - -- if (mode == QUP_IO_M_MODE_BAM) -+ if (spi_qup_is_dma_xfer(controller->mode)) - mask = QUP_OP_IN_SERVICE_FLAG | QUP_OP_OUT_SERVICE_FLAG; - - writel_relaxed(mask, controller->base + QUP_OPERATIONAL_MASK); -@@ -633,7 +624,7 @@ static int spi_qup_transfer_one(struct s - controller->tx_bytes = 0; - spin_unlock_irqrestore(&controller->lock, flags); - -- if (controller->use_dma) -+ if (spi_qup_is_dma_xfer(controller->mode)) - ret = spi_qup_do_dma(master, xfer); - else - ret = spi_qup_do_pio(master, xfer); -@@ -657,7 +648,7 @@ exit: - ret = controller->error; - spin_unlock_irqrestore(&controller->lock, flags); - -- if (ret && controller->use_dma) -+ if (ret && spi_qup_is_dma_xfer(controller->mode)) - spi_qup_dma_terminate(master, xfer); - - return ret; -@@ -668,9 +659,7 @@ static bool spi_qup_can_dma(struct spi_m - { - struct spi_qup *qup = spi_master_get_devdata(master); - size_t dma_align = dma_get_cache_alignment(); -- u32 mode; -- -- qup->use_dma = 0; -+ int n_words; - - if (xfer->rx_buf && (xfer->len % qup->in_blk_sz || - IS_ERR_OR_NULL(master->dma_rx) || -@@ -682,12 +671,10 @@ static bool spi_qup_can_dma(struct spi_m - !IS_ALIGNED((size_t)xfer->tx_buf, dma_align))) - return false; - -- mode = spi_qup_get_mode(master, xfer); -- if (mode == QUP_IO_M_MODE_FIFO) -+ n_words = xfer->len / DIV_ROUND_UP(xfer->bits_per_word, 8); -+ if (n_words <= (qup->in_fifo_sz / sizeof(u32))) - return false; - -- qup->use_dma = 1; -- - return true; - } - diff --git a/target/linux/ipq40xx/patches-4.9/0004-spi-qup-Fix-transaction-done-signaling.patch b/target/linux/ipq40xx/patches-4.9/0004-spi-qup-Fix-transaction-done-signaling.patch deleted file mode 100644 index 5881ffa8b..000000000 --- a/target/linux/ipq40xx/patches-4.9/0004-spi-qup-Fix-transaction-done-signaling.patch +++ /dev/null @@ -1,29 +0,0 @@ -From fbdf80d138f8c7fda8e598287109fb90446d557d Mon Sep 17 00:00:00 2001 -From: Andy Gross -Date: Fri, 29 Jan 2016 22:06:50 -0600 -Subject: [PATCH 04/69] spi: qup: Fix transaction done signaling - -Wait to signal done until we get all of the interrupts we are expecting -to get for a transaction. If we don't wait for the input done flag, we -can be inbetween transactions when the done flag comes in and this can -mess up the next transaction. - -CC: Grant Grundler -CC: Sarthak Kukreti -Signed-off-by: Andy Gross ---- - drivers/spi/spi-qup.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -445,7 +445,8 @@ static irqreturn_t spi_qup_qup_irq(int i - controller->xfer = xfer; - spin_unlock_irqrestore(&controller->lock, flags); - -- if (controller->rx_bytes == xfer->len || error) -+ if ((controller->rx_bytes == xfer->len && -+ (opflags & QUP_OP_MAX_INPUT_DONE_FLAG)) || error) - complete(&controller->done); - - return IRQ_HANDLED; diff --git a/target/linux/ipq40xx/patches-4.9/0005-spi-qup-Fix-DMA-mode-to-work-correctly.patch b/target/linux/ipq40xx/patches-4.9/0005-spi-qup-Fix-DMA-mode-to-work-correctly.patch deleted file mode 100644 index 20ab5c180..000000000 --- a/target/linux/ipq40xx/patches-4.9/0005-spi-qup-Fix-DMA-mode-to-work-correctly.patch +++ /dev/null @@ -1,219 +0,0 @@ -From 1204ea49f3f7ded898d1ee202776093715a9ecf6 Mon Sep 17 00:00:00 2001 -From: Andy Gross -Date: Tue, 2 Feb 2016 17:00:53 -0600 -Subject: [PATCH 05/69] spi: qup: Fix DMA mode to work correctly - -This patch fixes a few issues with the DMA mode. The QUP needs to be -placed in the run mode before the DMA transactions are executed. The -conditions for being able to DMA vary between revisions of the QUP. -This is due to v1.1.1 using ADM DMA and later revisions using BAM. - -Signed-off-by: Andy Gross ---- - drivers/spi/spi-qup.c | 94 +++++++++++++++++++++++++++++++++------------------ - 1 file changed, 62 insertions(+), 32 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -142,6 +142,7 @@ struct spi_qup { - - struct spi_transfer *xfer; - struct completion done; -+ struct completion dma_tx_done; - int error; - int w_size; /* bytes per SPI word */ - int n_words; -@@ -284,16 +285,16 @@ static void spi_qup_fifo_write(struct sp - - static void spi_qup_dma_done(void *data) - { -- struct spi_qup *qup = data; -+ struct completion *done = data; - -- complete(&qup->done); -+ complete(done); - } - - static int spi_qup_prep_sg(struct spi_master *master, struct spi_transfer *xfer, - enum dma_transfer_direction dir, -- dma_async_tx_callback callback) -+ dma_async_tx_callback callback, -+ void *data) - { -- struct spi_qup *qup = spi_master_get_devdata(master); - unsigned long flags = DMA_PREP_INTERRUPT | DMA_PREP_FENCE; - struct dma_async_tx_descriptor *desc; - struct scatterlist *sgl; -@@ -312,11 +313,11 @@ static int spi_qup_prep_sg(struct spi_ma - } - - desc = dmaengine_prep_slave_sg(chan, sgl, nents, dir, flags); -- if (!desc) -- return -EINVAL; -+ if (IS_ERR_OR_NULL(desc)) -+ return desc ? PTR_ERR(desc) : -EINVAL; - - desc->callback = callback; -- desc->callback_param = qup; -+ desc->callback_param = data; - - cookie = dmaengine_submit(desc); - -@@ -332,18 +333,29 @@ static void spi_qup_dma_terminate(struct - dmaengine_terminate_all(master->dma_rx); - } - --static int spi_qup_do_dma(struct spi_master *master, struct spi_transfer *xfer) -+static int spi_qup_do_dma(struct spi_master *master, struct spi_transfer *xfer, -+unsigned long timeout) - { -+ struct spi_qup *qup = spi_master_get_devdata(master); - dma_async_tx_callback rx_done = NULL, tx_done = NULL; - int ret; - -+ /* before issuing the descriptors, set the QUP to run */ -+ ret = spi_qup_set_state(qup, QUP_STATE_RUN); -+ if (ret) { -+ dev_warn(qup->dev, "cannot set RUN state\n"); -+ return ret; -+ } -+ - if (xfer->rx_buf) - rx_done = spi_qup_dma_done; -- else if (xfer->tx_buf) -+ -+ if (xfer->tx_buf) - tx_done = spi_qup_dma_done; - - if (xfer->rx_buf) { -- ret = spi_qup_prep_sg(master, xfer, DMA_DEV_TO_MEM, rx_done); -+ ret = spi_qup_prep_sg(master, xfer, DMA_DEV_TO_MEM, rx_done, -+ &qup->done); - if (ret) - return ret; - -@@ -351,17 +363,25 @@ static int spi_qup_do_dma(struct spi_mas - } - - if (xfer->tx_buf) { -- ret = spi_qup_prep_sg(master, xfer, DMA_MEM_TO_DEV, tx_done); -+ ret = spi_qup_prep_sg(master, xfer, DMA_MEM_TO_DEV, tx_done, -+ &qup->dma_tx_done); - if (ret) - return ret; - - dma_async_issue_pending(master->dma_tx); - } - -- return 0; -+ if (xfer->rx_buf && !wait_for_completion_timeout(&qup->done, timeout)) -+ return -ETIMEDOUT; -+ -+ if (xfer->tx_buf && !wait_for_completion_timeout(&qup->dma_tx_done, timeout)) -+ ret = -ETIMEDOUT; -+ -+ return ret; - } - --static int spi_qup_do_pio(struct spi_master *master, struct spi_transfer *xfer) -+static int spi_qup_do_pio(struct spi_master *master, struct spi_transfer *xfer, -+ unsigned long timeout) - { - struct spi_qup *qup = spi_master_get_devdata(master); - int ret; -@@ -380,6 +400,15 @@ static int spi_qup_do_pio(struct spi_mas - - spi_qup_fifo_write(qup, xfer); - -+ ret = spi_qup_set_state(qup, QUP_STATE_RUN); -+ if (ret) { -+ dev_warn(qup->dev, "cannot set RUN state\n"); -+ return ret; -+ } -+ -+ if (!wait_for_completion_timeout(&qup->done, timeout)) -+ return -ETIMEDOUT; -+ - return 0; - } - -@@ -428,7 +457,6 @@ static irqreturn_t spi_qup_qup_irq(int i - dev_warn(controller->dev, "CLK_OVER_RUN\n"); - if (spi_err & SPI_ERROR_CLK_UNDER_RUN) - dev_warn(controller->dev, "CLK_UNDER_RUN\n"); -- - error = -EIO; - } - -@@ -617,6 +645,7 @@ static int spi_qup_transfer_one(struct s - timeout = 100 * msecs_to_jiffies(timeout); - - reinit_completion(&controller->done); -+ reinit_completion(&controller->dma_tx_done); - - spin_lock_irqsave(&controller->lock, flags); - controller->xfer = xfer; -@@ -626,21 +655,13 @@ static int spi_qup_transfer_one(struct s - spin_unlock_irqrestore(&controller->lock, flags); - - if (spi_qup_is_dma_xfer(controller->mode)) -- ret = spi_qup_do_dma(master, xfer); -+ ret = spi_qup_do_dma(master, xfer, timeout); - else -- ret = spi_qup_do_pio(master, xfer); -+ ret = spi_qup_do_pio(master, xfer, timeout); - - if (ret) - goto exit; - -- if (spi_qup_set_state(controller, QUP_STATE_RUN)) { -- dev_warn(controller->dev, "cannot set EXECUTE state\n"); -- goto exit; -- } -- -- if (!wait_for_completion_timeout(&controller->done, timeout)) -- ret = -ETIMEDOUT; -- - exit: - spi_qup_set_state(controller, QUP_STATE_RESET); - spin_lock_irqsave(&controller->lock, flags); -@@ -662,15 +683,23 @@ static bool spi_qup_can_dma(struct spi_m - size_t dma_align = dma_get_cache_alignment(); - int n_words; - -- if (xfer->rx_buf && (xfer->len % qup->in_blk_sz || -- IS_ERR_OR_NULL(master->dma_rx) || -- !IS_ALIGNED((size_t)xfer->rx_buf, dma_align))) -- return false; -+ if (xfer->rx_buf) { -+ if (!IS_ALIGNED((size_t)xfer->rx_buf, dma_align) || -+ IS_ERR_OR_NULL(master->dma_rx)) -+ return false; - -- if (xfer->tx_buf && (xfer->len % qup->out_blk_sz || -- IS_ERR_OR_NULL(master->dma_tx) || -- !IS_ALIGNED((size_t)xfer->tx_buf, dma_align))) -- return false; -+ if (qup->qup_v1 && (xfer->len % qup->in_blk_sz)) -+ return false; -+ } -+ -+ if (xfer->tx_buf) { -+ if (!IS_ALIGNED((size_t)xfer->tx_buf, dma_align) || -+ IS_ERR_OR_NULL(master->dma_tx)) -+ return false; -+ -+ if (qup->qup_v1 && (xfer->len % qup->out_blk_sz)) -+ return false; -+ } - - n_words = xfer->len / DIV_ROUND_UP(xfer->bits_per_word, 8); - if (n_words <= (qup->in_fifo_sz / sizeof(u32))) -@@ -836,6 +865,7 @@ static int spi_qup_probe(struct platform - - spin_lock_init(&controller->lock); - init_completion(&controller->done); -+ init_completion(&controller->dma_tx_done); - - iomode = readl_relaxed(base + QUP_IO_M_MODES); - diff --git a/target/linux/ipq40xx/patches-4.9/0006-spi-qup-Fix-block-mode-to-work-correctly.patch b/target/linux/ipq40xx/patches-4.9/0006-spi-qup-Fix-block-mode-to-work-correctly.patch deleted file mode 100644 index e7d0d656b..000000000 --- a/target/linux/ipq40xx/patches-4.9/0006-spi-qup-Fix-block-mode-to-work-correctly.patch +++ /dev/null @@ -1,310 +0,0 @@ -From b56c1e35cc550fd014fa601ca56b964d88fd44a9 Mon Sep 17 00:00:00 2001 -From: Andy Gross -Date: Sun, 31 Jan 2016 21:28:13 -0600 -Subject: [PATCH 06/69] spi: qup: Fix block mode to work correctly - -This patch corrects the behavior of the BLOCK transactions. During block -transactions, the controller must be read/written to in block size transactions. - -Signed-off-by: Andy Gross ---- - drivers/spi/spi-qup.c | 182 +++++++++++++++++++++++++++++++++++++++----------- - 1 file changed, 142 insertions(+), 40 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -82,6 +82,8 @@ - #define QUP_IO_M_MODE_BAM 3 - - /* QUP_OPERATIONAL fields */ -+#define QUP_OP_IN_BLOCK_READ_REQ BIT(13) -+#define QUP_OP_OUT_BLOCK_WRITE_REQ BIT(12) - #define QUP_OP_MAX_INPUT_DONE_FLAG BIT(11) - #define QUP_OP_MAX_OUTPUT_DONE_FLAG BIT(10) - #define QUP_OP_IN_SERVICE_FLAG BIT(9) -@@ -155,6 +157,12 @@ struct spi_qup { - struct dma_slave_config tx_conf; - }; - -+static inline bool spi_qup_is_flag_set(struct spi_qup *controller, u32 flag) -+{ -+ u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); -+ -+ return opflag & flag; -+} - - static inline bool spi_qup_is_dma_xfer(int mode) - { -@@ -216,29 +224,26 @@ static int spi_qup_set_state(struct spi_ - return 0; - } - --static void spi_qup_fifo_read(struct spi_qup *controller, -- struct spi_transfer *xfer) -+static void spi_qup_read_from_fifo(struct spi_qup *controller, -+ struct spi_transfer *xfer, u32 num_words) - { - u8 *rx_buf = xfer->rx_buf; -- u32 word, state; -- int idx, shift, w_size; -- -- w_size = controller->w_size; -+ int i, shift, num_bytes; -+ u32 word; - -- while (controller->rx_bytes < xfer->len) { -- -- state = readl_relaxed(controller->base + QUP_OPERATIONAL); -- if (0 == (state & QUP_OP_IN_FIFO_NOT_EMPTY)) -- break; -+ for (; num_words; num_words--) { - - word = readl_relaxed(controller->base + QUP_INPUT_FIFO); - -+ num_bytes = min_t(int, xfer->len - controller->rx_bytes, -+ controller->w_size); -+ - if (!rx_buf) { -- controller->rx_bytes += w_size; -+ controller->rx_bytes += num_bytes; - continue; - } - -- for (idx = 0; idx < w_size; idx++, controller->rx_bytes++) { -+ for (i = 0; i < num_bytes; i++, controller->rx_bytes++) { - /* - * The data format depends on bytes per SPI word: - * 4 bytes: 0x12345678 -@@ -246,38 +251,80 @@ static void spi_qup_fifo_read(struct spi - * 1 byte : 0x00000012 - */ - shift = BITS_PER_BYTE; -- shift *= (w_size - idx - 1); -+ shift *= (controller->w_size - i - 1); - rx_buf[controller->rx_bytes] = word >> shift; - } - } - } - --static void spi_qup_fifo_write(struct spi_qup *controller, -+static void spi_qup_read(struct spi_qup *controller, - struct spi_transfer *xfer) - { -- const u8 *tx_buf = xfer->tx_buf; -- u32 word, state, data; -- int idx, w_size; -+ u32 remainder, words_per_block, num_words; -+ bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; -+ -+ remainder = DIV_ROUND_UP(xfer->len - controller->rx_bytes, -+ controller->w_size); -+ words_per_block = controller->in_blk_sz >> 2; -+ -+ do { -+ /* ACK by clearing service flag */ -+ writel_relaxed(QUP_OP_IN_SERVICE_FLAG, -+ controller->base + QUP_OPERATIONAL); -+ -+ if (is_block_mode) { -+ num_words = (remainder > words_per_block) ? -+ words_per_block : remainder; -+ } else { -+ if (!spi_qup_is_flag_set(controller, -+ QUP_OP_IN_FIFO_NOT_EMPTY)) -+ break; - -- w_size = controller->w_size; -+ num_words = 1; -+ } -+ -+ /* read up to the maximum transfer size available */ -+ spi_qup_read_from_fifo(controller, xfer, num_words); - -- while (controller->tx_bytes < xfer->len) { -+ remainder -= num_words; - -- state = readl_relaxed(controller->base + QUP_OPERATIONAL); -- if (state & QUP_OP_OUT_FIFO_FULL) -+ /* if block mode, check to see if next block is available */ -+ if (is_block_mode && !spi_qup_is_flag_set(controller, -+ QUP_OP_IN_BLOCK_READ_REQ)) - break; - -+ } while (remainder); -+ -+ /* -+ * Due to extra stickiness of the QUP_OP_IN_SERVICE_FLAG during block -+ * mode reads, it has to be cleared again at the very end -+ */ -+ if (is_block_mode && spi_qup_is_flag_set(controller, -+ QUP_OP_MAX_INPUT_DONE_FLAG)) -+ writel_relaxed(QUP_OP_IN_SERVICE_FLAG, -+ controller->base + QUP_OPERATIONAL); -+ -+} -+ -+static void spi_qup_write_to_fifo(struct spi_qup *controller, -+ struct spi_transfer *xfer, u32 num_words) -+{ -+ const u8 *tx_buf = xfer->tx_buf; -+ int i, num_bytes; -+ u32 word, data; -+ -+ for (; num_words; num_words--) { - word = 0; -- for (idx = 0; idx < w_size; idx++, controller->tx_bytes++) { - -- if (!tx_buf) { -- controller->tx_bytes += w_size; -- break; -+ num_bytes = min_t(int, xfer->len - controller->tx_bytes, -+ controller->w_size); -+ if (tx_buf) -+ for (i = 0; i < num_bytes; i++) { -+ data = tx_buf[controller->tx_bytes + i]; -+ word |= data << (BITS_PER_BYTE * (3 - i)); - } - -- data = tx_buf[controller->tx_bytes]; -- word |= data << (BITS_PER_BYTE * (3 - idx)); -- } -+ controller->tx_bytes += num_bytes; - - writel_relaxed(word, controller->base + QUP_OUTPUT_FIFO); - } -@@ -290,6 +337,44 @@ static void spi_qup_dma_done(void *data) - complete(done); - } - -+static void spi_qup_write(struct spi_qup *controller, -+ struct spi_transfer *xfer) -+{ -+ bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; -+ u32 remainder, words_per_block, num_words; -+ -+ remainder = DIV_ROUND_UP(xfer->len - controller->tx_bytes, -+ controller->w_size); -+ words_per_block = controller->out_blk_sz >> 2; -+ -+ do { -+ /* ACK by clearing service flag */ -+ writel_relaxed(QUP_OP_OUT_SERVICE_FLAG, -+ controller->base + QUP_OPERATIONAL); -+ -+ if (is_block_mode) { -+ num_words = (remainder > words_per_block) ? -+ words_per_block : remainder; -+ } else { -+ if (spi_qup_is_flag_set(controller, -+ QUP_OP_OUT_FIFO_FULL)) -+ break; -+ -+ num_words = 1; -+ } -+ -+ spi_qup_write_to_fifo(controller, xfer, num_words); -+ -+ remainder -= num_words; -+ -+ /* if block mode, check to see if next block is available */ -+ if (is_block_mode && !spi_qup_is_flag_set(controller, -+ QUP_OP_OUT_BLOCK_WRITE_REQ)) -+ break; -+ -+ } while (remainder); -+} -+ - static int spi_qup_prep_sg(struct spi_master *master, struct spi_transfer *xfer, - enum dma_transfer_direction dir, - dma_async_tx_callback callback, -@@ -347,11 +432,13 @@ unsigned long timeout) - return ret; - } - -- if (xfer->rx_buf) -- rx_done = spi_qup_dma_done; -+ if (!qup->qup_v1) { -+ if (xfer->rx_buf) -+ rx_done = spi_qup_dma_done; - -- if (xfer->tx_buf) -- tx_done = spi_qup_dma_done; -+ if (xfer->tx_buf) -+ tx_done = spi_qup_dma_done; -+ } - - if (xfer->rx_buf) { - ret = spi_qup_prep_sg(master, xfer, DMA_DEV_TO_MEM, rx_done, -@@ -398,7 +485,8 @@ static int spi_qup_do_pio(struct spi_mas - return ret; - } - -- spi_qup_fifo_write(qup, xfer); -+ if (qup->mode == QUP_IO_M_MODE_FIFO) -+ spi_qup_write(qup, xfer); - - ret = spi_qup_set_state(qup, QUP_STATE_RUN); - if (ret) { -@@ -431,10 +519,11 @@ static irqreturn_t spi_qup_qup_irq(int i - - writel_relaxed(qup_err, controller->base + QUP_ERROR_FLAGS); - writel_relaxed(spi_err, controller->base + SPI_ERROR_FLAGS); -- writel_relaxed(opflags, controller->base + QUP_OPERATIONAL); - - if (!xfer) { -- dev_err_ratelimited(controller->dev, "unexpected irq %08x %08x %08x\n", -+ writel_relaxed(opflags, controller->base + QUP_OPERATIONAL); -+ dev_err_ratelimited(controller->dev, -+ "unexpected irq %08x %08x %08x\n", - qup_err, spi_err, opflags); - return IRQ_HANDLED; - } -@@ -460,12 +549,20 @@ static irqreturn_t spi_qup_qup_irq(int i - error = -EIO; - } - -- if (!spi_qup_is_dma_xfer(controller->mode)) { -+ if (spi_qup_is_dma_xfer(controller->mode)) { -+ writel_relaxed(opflags, controller->base + QUP_OPERATIONAL); -+ if (opflags & QUP_OP_IN_SERVICE_FLAG && -+ opflags & QUP_OP_MAX_INPUT_DONE_FLAG) -+ complete(&controller->done); -+ if (opflags & QUP_OP_OUT_SERVICE_FLAG && -+ opflags & QUP_OP_MAX_OUTPUT_DONE_FLAG) -+ complete(&controller->dma_tx_done); -+ } else { - if (opflags & QUP_OP_IN_SERVICE_FLAG) -- spi_qup_fifo_read(controller, xfer); -+ spi_qup_read(controller, xfer); - - if (opflags & QUP_OP_OUT_SERVICE_FLAG) -- spi_qup_fifo_write(controller, xfer); -+ spi_qup_write(controller, xfer); - } - - spin_lock_irqsave(&controller->lock, flags); -@@ -473,6 +570,9 @@ static irqreturn_t spi_qup_qup_irq(int i - controller->xfer = xfer; - spin_unlock_irqrestore(&controller->lock, flags); - -+ /* re-read opflags as flags may have changed due to actions above */ -+ opflags = readl_relaxed(controller->base + QUP_OPERATIONAL); -+ - if ((controller->rx_bytes == xfer->len && - (opflags & QUP_OP_MAX_INPUT_DONE_FLAG)) || error) - complete(&controller->done); -@@ -516,11 +616,13 @@ static int spi_qup_io_config(struct spi_ - /* must be zero for FIFO */ - writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT); - writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -- - } else if (spi->master->can_dma && - spi->master->can_dma(spi->master, spi, xfer) && - spi->master->cur_msg_mapped) { - controller->mode = QUP_IO_M_MODE_BAM; -+ writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT); -+ writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT); -+ /* must be zero for BLOCK and BAM */ - writel_relaxed(0, controller->base + QUP_MX_READ_CNT); - writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); - diff --git a/target/linux/ipq40xx/patches-4.9/0007-spi-qup-properly-detect-extra-interrupts.patch b/target/linux/ipq40xx/patches-4.9/0007-spi-qup-properly-detect-extra-interrupts.patch deleted file mode 100644 index 8a3b02744..000000000 --- a/target/linux/ipq40xx/patches-4.9/0007-spi-qup-properly-detect-extra-interrupts.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 0f32f976ebaa7d8643fcd9419f12bc801ba14407 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Thu, 10 Mar 2016 16:44:55 -0600 -Subject: [PATCH 07/69] spi: qup: properly detect extra interrupts - -It's possible for a SPI transaction to complete and get another -interrupt and have it processed on the same spi_transfer before the -transfer_one can set it to NULL. - -This masks unexpected interrupts, so let's set the spi_transfer to -NULL in the interrupt once the transaction is done. So we can -properly detect these bad interrupts and print warning messages. - -Signed-off-by: Matthew McClintock ---- - drivers/spi/spi-qup.c | 15 +++++++++------ - 1 file changed, 9 insertions(+), 6 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -507,6 +507,7 @@ static irqreturn_t spi_qup_qup_irq(int i - u32 opflags, qup_err, spi_err; - unsigned long flags; - int error = 0; -+ bool done = 0; - - spin_lock_irqsave(&controller->lock, flags); - xfer = controller->xfer; -@@ -565,16 +566,19 @@ static irqreturn_t spi_qup_qup_irq(int i - spi_qup_write(controller, xfer); - } - -- spin_lock_irqsave(&controller->lock, flags); -- controller->error = error; -- controller->xfer = xfer; -- spin_unlock_irqrestore(&controller->lock, flags); -- - /* re-read opflags as flags may have changed due to actions above */ - opflags = readl_relaxed(controller->base + QUP_OPERATIONAL); - - if ((controller->rx_bytes == xfer->len && - (opflags & QUP_OP_MAX_INPUT_DONE_FLAG)) || error) -+ done = true; -+ -+ spin_lock_irqsave(&controller->lock, flags); -+ controller->error = error; -+ controller->xfer = done ? NULL : xfer; -+ spin_unlock_irqrestore(&controller->lock, flags); -+ -+ if (done) - complete(&controller->done); - - return IRQ_HANDLED; -@@ -767,7 +771,6 @@ static int spi_qup_transfer_one(struct s - exit: - spi_qup_set_state(controller, QUP_STATE_RESET); - spin_lock_irqsave(&controller->lock, flags); -- controller->xfer = NULL; - if (!ret) - ret = controller->error; - spin_unlock_irqrestore(&controller->lock, flags); diff --git a/target/linux/ipq40xx/patches-4.9/0008-spi-qup-don-t-re-read-opflags-to-see-if-transaction-.patch b/target/linux/ipq40xx/patches-4.9/0008-spi-qup-don-t-re-read-opflags-to-see-if-transaction-.patch deleted file mode 100644 index 989359698..000000000 --- a/target/linux/ipq40xx/patches-4.9/0008-spi-qup-don-t-re-read-opflags-to-see-if-transaction-.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 9864f39695aefe0831b3c6e86c0dff30489ad580 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Thu, 10 Mar 2016 16:48:27 -0600 -Subject: [PATCH 08/69] spi: qup: don't re-read opflags to see if transaction - is done for reads - -For reads, we will get another interrupt so we need to handle things -then. For writes, we can finish up now. - -Signed-off-by: Matthew McClintock ---- - drivers/spi/spi-qup.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -567,7 +567,8 @@ static irqreturn_t spi_qup_qup_irq(int i - } - - /* re-read opflags as flags may have changed due to actions above */ -- opflags = readl_relaxed(controller->base + QUP_OPERATIONAL); -+ if (opflags & QUP_OP_OUT_SERVICE_FLAG) -+ opflags = readl_relaxed(controller->base + QUP_OPERATIONAL); - - if ((controller->rx_bytes == xfer->len && - (opflags & QUP_OP_MAX_INPUT_DONE_FLAG)) || error) diff --git a/target/linux/ipq40xx/patches-4.9/0009-spi-qup-refactor-spi_qup_io_config-in-two-functions.patch b/target/linux/ipq40xx/patches-4.9/0009-spi-qup-refactor-spi_qup_io_config-in-two-functions.patch deleted file mode 100644 index 36c225bad..000000000 --- a/target/linux/ipq40xx/patches-4.9/0009-spi-qup-refactor-spi_qup_io_config-in-two-functions.patch +++ /dev/null @@ -1,202 +0,0 @@ -From e06f04d55752e460d8f332f28317aebc27ab1b17 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Tue, 26 Apr 2016 12:57:46 -0500 -Subject: [PATCH 09/69] spi: qup: refactor spi_qup_io_config in two functions - -This is preparation for handling transactions larger than 64K-1 bytes in -block mode which is currently unsupported quietly fails. - -We need to break these into two functions 1) prep is called once per -spi_message and 2) io_config is calle once per spi-qup bus transaction - -This is just refactoring, there should be no functional change - -Signed-off-by: Matthew McClintock ---- - drivers/spi/spi-qup.c | 141 ++++++++++++++++++++++++++++++-------------------- - 1 file changed, 86 insertions(+), 55 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -585,12 +585,11 @@ static irqreturn_t spi_qup_qup_irq(int i - return IRQ_HANDLED; - } - --/* set clock freq ... bits per word */ --static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) -+/* set clock freq ... bits per word, determine mode */ -+static int spi_qup_io_prep(struct spi_device *spi, struct spi_transfer *xfer) - { - struct spi_qup *controller = spi_master_get_devdata(spi->master); -- u32 config, iomode, control; -- int ret, n_words; -+ int ret; - - if (spi->mode & SPI_LOOP && xfer->len > controller->in_fifo_sz) { - dev_err(controller->dev, "too big size for loopback %d > %d\n", -@@ -605,56 +604,94 @@ static int spi_qup_io_config(struct spi_ - return -EIO; - } - -- if (spi_qup_set_state(controller, QUP_STATE_RESET)) { -- dev_err(controller->dev, "cannot set RESET state\n"); -- return -EIO; -- } -- - controller->w_size = DIV_ROUND_UP(xfer->bits_per_word, 8); - controller->n_words = xfer->len / controller->w_size; -- n_words = controller->n_words; - -- if (n_words <= (controller->in_fifo_sz / sizeof(u32))) { -+ if (controller->n_words <= (controller->in_fifo_sz / sizeof(u32))) - controller->mode = QUP_IO_M_MODE_FIFO; -- writel_relaxed(n_words, controller->base + QUP_MX_READ_CNT); -- writel_relaxed(n_words, controller->base + QUP_MX_WRITE_CNT); -- /* must be zero for FIFO */ -- writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT); -- writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -- } else if (spi->master->can_dma && -- spi->master->can_dma(spi->master, spi, xfer) && -- spi->master->cur_msg_mapped) { -+ else if (spi->master->can_dma && -+ spi->master->can_dma(spi->master, spi, xfer) && -+ spi->master->cur_msg_mapped) - controller->mode = QUP_IO_M_MODE_BAM; -- writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT); -- writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT); -- /* must be zero for BLOCK and BAM */ -- writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -- -- if (!controller->qup_v1) { -- void __iomem *input_cnt; -- -- input_cnt = controller->base + QUP_MX_INPUT_CNT; -- /* -- * for DMA transfers, both QUP_MX_INPUT_CNT and -- * QUP_MX_OUTPUT_CNT must be zero to all cases but one. -- * That case is a non-balanced transfer when there is -- * only a rx_buf. -- */ -- if (xfer->tx_buf) -- writel_relaxed(0, input_cnt); -- else -- writel_relaxed(n_words, input_cnt); -+ else -+ controller->mode = QUP_IO_M_MODE_BLOCK; -+ -+ return 0; -+} - -+/* prep qup for another spi transaction of specific type */ -+static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) -+{ -+ struct spi_qup *controller = spi_master_get_devdata(spi->master); -+ u32 config, iomode, control; -+ unsigned long flags; -+ -+ reinit_completion(&controller->done); -+ reinit_completion(&controller->dma_tx_done); -+ -+ spin_lock_irqsave(&controller->lock, flags); -+ controller->xfer = xfer; -+ controller->error = 0; -+ controller->rx_bytes = 0; -+ controller->tx_bytes = 0; -+ spin_unlock_irqrestore(&controller->lock, flags); -+ -+ -+ if (spi_qup_set_state(controller, QUP_STATE_RESET)) { -+ dev_err(controller->dev, "cannot set RESET state\n"); -+ return -EIO; -+ } -+ -+ switch (controller->mode) { -+ case QUP_IO_M_MODE_FIFO: -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_READ_CNT); -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_WRITE_CNT); -+ /* must be zero for FIFO */ -+ writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT); - writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -- } -- } else { -- controller->mode = QUP_IO_M_MODE_BLOCK; -- writel_relaxed(n_words, controller->base + QUP_MX_INPUT_CNT); -- writel_relaxed(n_words, controller->base + QUP_MX_OUTPUT_CNT); -- /* must be zero for BLOCK and BAM */ -- writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -+ break; -+ case QUP_IO_M_MODE_BAM: -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_INPUT_CNT); -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_OUTPUT_CNT); -+ /* must be zero for BLOCK and BAM */ -+ writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -+ writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -+ if (!controller->qup_v1) { -+ void __iomem *input_cnt; -+ -+ input_cnt = controller->base + QUP_MX_INPUT_CNT; -+ /* -+ * for DMA transfers, both QUP_MX_INPUT_CNT and -+ * QUP_MX_OUTPUT_CNT must be zero to all cases -+ * but one. That case is a non-balanced -+ * transfer when there is only a rx_buf. -+ */ -+ if (xfer->tx_buf) -+ writel_relaxed(0, input_cnt); -+ else -+ writel_relaxed(controller->n_words, -+ input_cnt); -+ -+ writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -+ } -+ break; -+ case QUP_IO_M_MODE_BLOCK: -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_INPUT_CNT); -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_OUTPUT_CNT); -+ /* must be zero for BLOCK and BAM */ -+ writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -+ writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -+ break; -+ default: -+ dev_err(controller->dev, "unknown mode = %d\n", -+ controller->mode); -+ return -EIO; - } - - iomode = readl_relaxed(controller->base + QUP_IO_M_MODES); -@@ -743,6 +780,10 @@ static int spi_qup_transfer_one(struct s - unsigned long timeout, flags; - int ret = -EIO; - -+ ret = spi_qup_io_prep(spi, xfer); -+ if (ret) -+ return ret; -+ - ret = spi_qup_io_config(spi, xfer); - if (ret) - return ret; -@@ -751,16 +792,6 @@ static int spi_qup_transfer_one(struct s - timeout = DIV_ROUND_UP(xfer->len * 8, timeout); - timeout = 100 * msecs_to_jiffies(timeout); - -- reinit_completion(&controller->done); -- reinit_completion(&controller->dma_tx_done); -- -- spin_lock_irqsave(&controller->lock, flags); -- controller->xfer = xfer; -- controller->error = 0; -- controller->rx_bytes = 0; -- controller->tx_bytes = 0; -- spin_unlock_irqrestore(&controller->lock, flags); -- - if (spi_qup_is_dma_xfer(controller->mode)) - ret = spi_qup_do_dma(master, xfer, timeout); - else diff --git a/target/linux/ipq40xx/patches-4.9/0010-spi-qup-call-io_config-in-mode-specific-function.patch b/target/linux/ipq40xx/patches-4.9/0010-spi-qup-call-io_config-in-mode-specific-function.patch deleted file mode 100644 index dfbed620f..000000000 --- a/target/linux/ipq40xx/patches-4.9/0010-spi-qup-call-io_config-in-mode-specific-function.patch +++ /dev/null @@ -1,391 +0,0 @@ -From afe108e638a2dd441b11cd2c7b1e0658bb47b5e8 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Tue, 26 Apr 2016 13:14:45 -0500 -Subject: [PATCH 10/69] spi: qup: call io_config in mode specific function - -DMA transactions should only only need to call io_config only once, but -block mode might call it several times to setup several transactions so -it can handle reads/writes larger than the max size per transaction, so -we move the call to the do_ functions. - -This is just refactoring, there should be no functional change - -Signed-off-by: Matthew McClintock ---- - drivers/spi/spi-qup.c | 327 +++++++++++++++++++++++++------------------------- - 1 file changed, 166 insertions(+), 161 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -418,13 +418,170 @@ static void spi_qup_dma_terminate(struct - dmaengine_terminate_all(master->dma_rx); - } - --static int spi_qup_do_dma(struct spi_master *master, struct spi_transfer *xfer, -+/* prep qup for another spi transaction of specific type */ -+static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) -+{ -+ struct spi_qup *controller = spi_master_get_devdata(spi->master); -+ u32 config, iomode, control; -+ unsigned long flags; -+ -+ reinit_completion(&controller->done); -+ reinit_completion(&controller->dma_tx_done); -+ -+ spin_lock_irqsave(&controller->lock, flags); -+ controller->xfer = xfer; -+ controller->error = 0; -+ controller->rx_bytes = 0; -+ controller->tx_bytes = 0; -+ spin_unlock_irqrestore(&controller->lock, flags); -+ -+ if (spi_qup_set_state(controller, QUP_STATE_RESET)) { -+ dev_err(controller->dev, "cannot set RESET state\n"); -+ return -EIO; -+ } -+ -+ switch (controller->mode) { -+ case QUP_IO_M_MODE_FIFO: -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_READ_CNT); -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_WRITE_CNT); -+ /* must be zero for FIFO */ -+ writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT); -+ writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -+ break; -+ case QUP_IO_M_MODE_BAM: -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_INPUT_CNT); -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_OUTPUT_CNT); -+ /* must be zero for BLOCK and BAM */ -+ writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -+ writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -+ if (!controller->qup_v1) { -+ void __iomem *input_cnt; -+ -+ input_cnt = controller->base + QUP_MX_INPUT_CNT; -+ /* -+ * for DMA transfers, both QUP_MX_INPUT_CNT and -+ * QUP_MX_OUTPUT_CNT must be zero to all cases -+ * but one. That case is a non-balanced -+ * transfer when there is only a rx_buf. -+ */ -+ if (xfer->tx_buf) -+ writel_relaxed(0, input_cnt); -+ else -+ writel_relaxed(controller->n_words, -+ input_cnt); -+ -+ writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -+ } -+ break; -+ case QUP_IO_M_MODE_BLOCK: -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_INPUT_CNT); -+ writel_relaxed(controller->n_words, -+ controller->base + QUP_MX_OUTPUT_CNT); -+ /* must be zero for BLOCK and BAM */ -+ writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -+ writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -+ break; -+ default: -+ dev_err(controller->dev, "unknown mode = %d\n", -+ controller->mode); -+ return -EIO; -+ } -+ -+ iomode = readl_relaxed(controller->base + QUP_IO_M_MODES); -+ /* Set input and output transfer mode */ -+ iomode &= ~(QUP_IO_M_INPUT_MODE_MASK | QUP_IO_M_OUTPUT_MODE_MASK); -+ -+ if (!spi_qup_is_dma_xfer(controller->mode)) -+ iomode &= ~(QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN); -+ else -+ iomode |= QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN; -+ -+ iomode |= (controller->mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT); -+ iomode |= (controller->mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT); -+ -+ writel_relaxed(iomode, controller->base + QUP_IO_M_MODES); -+ -+ control = readl_relaxed(controller->base + SPI_IO_CONTROL); -+ -+ if (spi->mode & SPI_CPOL) -+ control |= SPI_IO_C_CLK_IDLE_HIGH; -+ else -+ control &= ~SPI_IO_C_CLK_IDLE_HIGH; -+ -+ writel_relaxed(control, controller->base + SPI_IO_CONTROL); -+ -+ config = readl_relaxed(controller->base + SPI_CONFIG); -+ -+ if (spi->mode & SPI_LOOP) -+ config |= SPI_CONFIG_LOOPBACK; -+ else -+ config &= ~SPI_CONFIG_LOOPBACK; -+ -+ if (spi->mode & SPI_CPHA) -+ config &= ~SPI_CONFIG_INPUT_FIRST; -+ else -+ config |= SPI_CONFIG_INPUT_FIRST; -+ -+ /* -+ * HS_MODE improves signal stability for spi-clk high rates, -+ * but is invalid in loop back mode. -+ */ -+ if ((xfer->speed_hz >= SPI_HS_MIN_RATE) && !(spi->mode & SPI_LOOP)) -+ config |= SPI_CONFIG_HS_MODE; -+ else -+ config &= ~SPI_CONFIG_HS_MODE; -+ -+ writel_relaxed(config, controller->base + SPI_CONFIG); -+ -+ config = readl_relaxed(controller->base + QUP_CONFIG); -+ config &= ~(QUP_CONFIG_NO_INPUT | QUP_CONFIG_NO_OUTPUT | QUP_CONFIG_N); -+ config |= xfer->bits_per_word - 1; -+ config |= QUP_CONFIG_SPI_MODE; -+ -+ if (spi_qup_is_dma_xfer(controller->mode)) { -+ if (!xfer->tx_buf) -+ config |= QUP_CONFIG_NO_OUTPUT; -+ if (!xfer->rx_buf) -+ config |= QUP_CONFIG_NO_INPUT; -+ } -+ -+ writel_relaxed(config, controller->base + QUP_CONFIG); -+ -+ /* only write to OPERATIONAL_MASK when register is present */ -+ if (!controller->qup_v1) { -+ u32 mask = 0; -+ -+ /* -+ * mask INPUT and OUTPUT service flags to prevent IRQs on FIFO -+ * status change in BAM mode -+ */ -+ -+ if (spi_qup_is_dma_xfer(controller->mode)) -+ mask = QUP_OP_IN_SERVICE_FLAG | QUP_OP_OUT_SERVICE_FLAG; -+ -+ writel_relaxed(mask, controller->base + QUP_OPERATIONAL_MASK); -+ } -+ -+ return 0; -+} -+ -+static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer, - unsigned long timeout) - { -+ struct spi_master *master = spi->master; - struct spi_qup *qup = spi_master_get_devdata(master); - dma_async_tx_callback rx_done = NULL, tx_done = NULL; - int ret; - -+ ret = spi_qup_io_config(spi, xfer); -+ if (ret) -+ return ret; -+ - /* before issuing the descriptors, set the QUP to run */ - ret = spi_qup_set_state(qup, QUP_STATE_RUN); - if (ret) { -@@ -467,12 +624,17 @@ unsigned long timeout) - return ret; - } - --static int spi_qup_do_pio(struct spi_master *master, struct spi_transfer *xfer, -+static int spi_qup_do_pio(struct spi_device *spi, struct spi_transfer *xfer, - unsigned long timeout) - { -+ struct spi_master *master = spi->master; - struct spi_qup *qup = spi_master_get_devdata(master); - int ret; - -+ ret = spi_qup_io_config(spi, xfer); -+ if (ret) -+ return ret; -+ - ret = spi_qup_set_state(qup, QUP_STATE_RUN); - if (ret) { - dev_warn(qup->dev, "cannot set RUN state\n"); -@@ -619,159 +781,6 @@ static int spi_qup_io_prep(struct spi_de - return 0; - } - --/* prep qup for another spi transaction of specific type */ --static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) --{ -- struct spi_qup *controller = spi_master_get_devdata(spi->master); -- u32 config, iomode, control; -- unsigned long flags; -- -- reinit_completion(&controller->done); -- reinit_completion(&controller->dma_tx_done); -- -- spin_lock_irqsave(&controller->lock, flags); -- controller->xfer = xfer; -- controller->error = 0; -- controller->rx_bytes = 0; -- controller->tx_bytes = 0; -- spin_unlock_irqrestore(&controller->lock, flags); -- -- -- if (spi_qup_set_state(controller, QUP_STATE_RESET)) { -- dev_err(controller->dev, "cannot set RESET state\n"); -- return -EIO; -- } -- -- switch (controller->mode) { -- case QUP_IO_M_MODE_FIFO: -- writel_relaxed(controller->n_words, -- controller->base + QUP_MX_READ_CNT); -- writel_relaxed(controller->n_words, -- controller->base + QUP_MX_WRITE_CNT); -- /* must be zero for FIFO */ -- writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT); -- writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -- break; -- case QUP_IO_M_MODE_BAM: -- writel_relaxed(controller->n_words, -- controller->base + QUP_MX_INPUT_CNT); -- writel_relaxed(controller->n_words, -- controller->base + QUP_MX_OUTPUT_CNT); -- /* must be zero for BLOCK and BAM */ -- writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -- if (!controller->qup_v1) { -- void __iomem *input_cnt; -- -- input_cnt = controller->base + QUP_MX_INPUT_CNT; -- /* -- * for DMA transfers, both QUP_MX_INPUT_CNT and -- * QUP_MX_OUTPUT_CNT must be zero to all cases -- * but one. That case is a non-balanced -- * transfer when there is only a rx_buf. -- */ -- if (xfer->tx_buf) -- writel_relaxed(0, input_cnt); -- else -- writel_relaxed(controller->n_words, -- input_cnt); -- -- writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT); -- } -- break; -- case QUP_IO_M_MODE_BLOCK: -- writel_relaxed(controller->n_words, -- controller->base + QUP_MX_INPUT_CNT); -- writel_relaxed(controller->n_words, -- controller->base + QUP_MX_OUTPUT_CNT); -- /* must be zero for BLOCK and BAM */ -- writel_relaxed(0, controller->base + QUP_MX_READ_CNT); -- writel_relaxed(0, controller->base + QUP_MX_WRITE_CNT); -- break; -- default: -- dev_err(controller->dev, "unknown mode = %d\n", -- controller->mode); -- return -EIO; -- } -- -- iomode = readl_relaxed(controller->base + QUP_IO_M_MODES); -- /* Set input and output transfer mode */ -- iomode &= ~(QUP_IO_M_INPUT_MODE_MASK | QUP_IO_M_OUTPUT_MODE_MASK); -- -- if (!spi_qup_is_dma_xfer(controller->mode)) -- iomode &= ~(QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN); -- else -- iomode |= QUP_IO_M_PACK_EN | QUP_IO_M_UNPACK_EN; -- -- iomode |= (controller->mode << QUP_IO_M_OUTPUT_MODE_MASK_SHIFT); -- iomode |= (controller->mode << QUP_IO_M_INPUT_MODE_MASK_SHIFT); -- -- writel_relaxed(iomode, controller->base + QUP_IO_M_MODES); -- -- control = readl_relaxed(controller->base + SPI_IO_CONTROL); -- -- if (spi->mode & SPI_CPOL) -- control |= SPI_IO_C_CLK_IDLE_HIGH; -- else -- control &= ~SPI_IO_C_CLK_IDLE_HIGH; -- -- writel_relaxed(control, controller->base + SPI_IO_CONTROL); -- -- config = readl_relaxed(controller->base + SPI_CONFIG); -- -- if (spi->mode & SPI_LOOP) -- config |= SPI_CONFIG_LOOPBACK; -- else -- config &= ~SPI_CONFIG_LOOPBACK; -- -- if (spi->mode & SPI_CPHA) -- config &= ~SPI_CONFIG_INPUT_FIRST; -- else -- config |= SPI_CONFIG_INPUT_FIRST; -- -- /* -- * HS_MODE improves signal stability for spi-clk high rates, -- * but is invalid in loop back mode. -- */ -- if ((xfer->speed_hz >= SPI_HS_MIN_RATE) && !(spi->mode & SPI_LOOP)) -- config |= SPI_CONFIG_HS_MODE; -- else -- config &= ~SPI_CONFIG_HS_MODE; -- -- writel_relaxed(config, controller->base + SPI_CONFIG); -- -- config = readl_relaxed(controller->base + QUP_CONFIG); -- config &= ~(QUP_CONFIG_NO_INPUT | QUP_CONFIG_NO_OUTPUT | QUP_CONFIG_N); -- config |= xfer->bits_per_word - 1; -- config |= QUP_CONFIG_SPI_MODE; -- -- if (spi_qup_is_dma_xfer(controller->mode)) { -- if (!xfer->tx_buf) -- config |= QUP_CONFIG_NO_OUTPUT; -- if (!xfer->rx_buf) -- config |= QUP_CONFIG_NO_INPUT; -- } -- -- writel_relaxed(config, controller->base + QUP_CONFIG); -- -- /* only write to OPERATIONAL_MASK when register is present */ -- if (!controller->qup_v1) { -- u32 mask = 0; -- -- /* -- * mask INPUT and OUTPUT service flags to prevent IRQs on FIFO -- * status change in BAM mode -- */ -- -- if (spi_qup_is_dma_xfer(controller->mode)) -- mask = QUP_OP_IN_SERVICE_FLAG | QUP_OP_OUT_SERVICE_FLAG; -- -- writel_relaxed(mask, controller->base + QUP_OPERATIONAL_MASK); -- } -- -- return 0; --} -- - static int spi_qup_transfer_one(struct spi_master *master, - struct spi_device *spi, - struct spi_transfer *xfer) -@@ -784,18 +793,14 @@ static int spi_qup_transfer_one(struct s - if (ret) - return ret; - -- ret = spi_qup_io_config(spi, xfer); -- if (ret) -- return ret; -- - timeout = DIV_ROUND_UP(xfer->speed_hz, MSEC_PER_SEC); - timeout = DIV_ROUND_UP(xfer->len * 8, timeout); - timeout = 100 * msecs_to_jiffies(timeout); - - if (spi_qup_is_dma_xfer(controller->mode)) -- ret = spi_qup_do_dma(master, xfer, timeout); -+ ret = spi_qup_do_dma(spi, xfer, timeout); - else -- ret = spi_qup_do_pio(master, xfer, timeout); -+ ret = spi_qup_do_pio(spi, xfer, timeout); - - if (ret) - goto exit; diff --git a/target/linux/ipq40xx/patches-4.9/0011-spi-qup-allow-block-mode-to-generate-multiple-transa.patch b/target/linux/ipq40xx/patches-4.9/0011-spi-qup-allow-block-mode-to-generate-multiple-transa.patch deleted file mode 100644 index 39a1aecab..000000000 --- a/target/linux/ipq40xx/patches-4.9/0011-spi-qup-allow-block-mode-to-generate-multiple-transa.patch +++ /dev/null @@ -1,268 +0,0 @@ -From 6858a6a75f1ed364764afba938d77bbb57f80559 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Tue, 26 Apr 2016 15:46:24 -0500 -Subject: [PATCH 11/69] spi: qup: allow block mode to generate multiple - transactions - -This let's you write more to the SPI bus than 64K-1 which is important -if the block size of a SPI device is >= 64K or some other device wants -to something larger. - -This has the benefit of completly removing spi_message from the spi-qup -transactions - -Signed-off-by: Matthew McClintock ---- - drivers/spi/spi-qup.c | 120 +++++++++++++++++++++++++++++++------------------- - 1 file changed, 75 insertions(+), 45 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -120,7 +120,7 @@ - - #define SPI_NUM_CHIPSELECTS 4 - --#define SPI_MAX_DMA_XFER (SZ_64K - 64) -+#define SPI_MAX_XFER (SZ_64K - 64) - - /* high speed mode is when bus rate is greater then 26MHz */ - #define SPI_HS_MIN_RATE 26000000 -@@ -150,6 +150,8 @@ struct spi_qup { - int n_words; - int tx_bytes; - int rx_bytes; -+ const u8 *tx_buf; -+ u8 *rx_buf; - int qup_v1; - - int mode; -@@ -172,6 +174,12 @@ static inline bool spi_qup_is_dma_xfer(i - return false; - } - -+/* get's the transaction size length */ -+static inline unsigned spi_qup_len(struct spi_qup *controller) -+{ -+ return controller->n_words * controller->w_size; -+} -+ - static inline bool spi_qup_is_valid_state(struct spi_qup *controller) - { - u32 opstate = readl_relaxed(controller->base + QUP_STATE); -@@ -224,10 +232,9 @@ static int spi_qup_set_state(struct spi_ - return 0; - } - --static void spi_qup_read_from_fifo(struct spi_qup *controller, -- struct spi_transfer *xfer, u32 num_words) -+static void spi_qup_read_from_fifo(struct spi_qup *controller, u32 num_words) - { -- u8 *rx_buf = xfer->rx_buf; -+ u8 *rx_buf = controller->rx_buf; - int i, shift, num_bytes; - u32 word; - -@@ -235,7 +242,7 @@ static void spi_qup_read_from_fifo(struc - - word = readl_relaxed(controller->base + QUP_INPUT_FIFO); - -- num_bytes = min_t(int, xfer->len - controller->rx_bytes, -+ num_bytes = min_t(int, spi_qup_len(controller) - controller->rx_bytes, - controller->w_size); - - if (!rx_buf) { -@@ -257,13 +264,12 @@ static void spi_qup_read_from_fifo(struc - } - } - --static void spi_qup_read(struct spi_qup *controller, -- struct spi_transfer *xfer) -+static void spi_qup_read(struct spi_qup *controller) - { - u32 remainder, words_per_block, num_words; - bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; - -- remainder = DIV_ROUND_UP(xfer->len - controller->rx_bytes, -+ remainder = DIV_ROUND_UP(spi_qup_len(controller) - controller->rx_bytes, - controller->w_size); - words_per_block = controller->in_blk_sz >> 2; - -@@ -284,7 +290,7 @@ static void spi_qup_read(struct spi_qup - } - - /* read up to the maximum transfer size available */ -- spi_qup_read_from_fifo(controller, xfer, num_words); -+ spi_qup_read_from_fifo(controller, num_words); - - remainder -= num_words; - -@@ -306,17 +312,16 @@ static void spi_qup_read(struct spi_qup - - } - --static void spi_qup_write_to_fifo(struct spi_qup *controller, -- struct spi_transfer *xfer, u32 num_words) -+static void spi_qup_write_to_fifo(struct spi_qup *controller, u32 num_words) - { -- const u8 *tx_buf = xfer->tx_buf; -+ const u8 *tx_buf = controller->tx_buf; - int i, num_bytes; - u32 word, data; - - for (; num_words; num_words--) { - word = 0; - -- num_bytes = min_t(int, xfer->len - controller->tx_bytes, -+ num_bytes = min_t(int, spi_qup_len(controller) - controller->tx_bytes, - controller->w_size); - if (tx_buf) - for (i = 0; i < num_bytes; i++) { -@@ -337,13 +342,12 @@ static void spi_qup_dma_done(void *data) - complete(done); - } - --static void spi_qup_write(struct spi_qup *controller, -- struct spi_transfer *xfer) -+static void spi_qup_write(struct spi_qup *controller) - { - bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; - u32 remainder, words_per_block, num_words; - -- remainder = DIV_ROUND_UP(xfer->len - controller->tx_bytes, -+ remainder = DIV_ROUND_UP(spi_qup_len(controller) - controller->tx_bytes, - controller->w_size); - words_per_block = controller->out_blk_sz >> 2; - -@@ -363,7 +367,7 @@ static void spi_qup_write(struct spi_qup - num_words = 1; - } - -- spi_qup_write_to_fifo(controller, xfer, num_words); -+ spi_qup_write_to_fifo(controller, num_words); - - remainder -= num_words; - -@@ -629,35 +633,61 @@ static int spi_qup_do_pio(struct spi_dev - { - struct spi_master *master = spi->master; - struct spi_qup *qup = spi_master_get_devdata(master); -- int ret; -+ int ret, n_words, iterations, offset = 0; - -- ret = spi_qup_io_config(spi, xfer); -- if (ret) -- return ret; -+ n_words = qup->n_words; -+ iterations = n_words / SPI_MAX_XFER; /* round down */ - -- ret = spi_qup_set_state(qup, QUP_STATE_RUN); -- if (ret) { -- dev_warn(qup->dev, "cannot set RUN state\n"); -- return ret; -- } -+ qup->rx_buf = xfer->rx_buf; -+ qup->tx_buf = xfer->tx_buf; - -- ret = spi_qup_set_state(qup, QUP_STATE_PAUSE); -- if (ret) { -- dev_warn(qup->dev, "cannot set PAUSE state\n"); -- return ret; -- } -+ do { -+ if (iterations) -+ qup->n_words = SPI_MAX_XFER; -+ else -+ qup->n_words = n_words % SPI_MAX_XFER; -+ -+ if (qup->tx_buf && offset) -+ qup->tx_buf = xfer->tx_buf + offset * SPI_MAX_XFER; -+ -+ if (qup->rx_buf && offset) -+ qup->rx_buf = xfer->rx_buf + offset * SPI_MAX_XFER; -+ -+ /* if the transaction is small enough, we need -+ * to fallback to FIFO mode */ -+ if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32))) -+ qup->mode = QUP_IO_M_MODE_FIFO; - -- if (qup->mode == QUP_IO_M_MODE_FIFO) -- spi_qup_write(qup, xfer); -+ ret = spi_qup_io_config(spi, xfer); -+ if (ret) -+ return ret; - -- ret = spi_qup_set_state(qup, QUP_STATE_RUN); -- if (ret) { -- dev_warn(qup->dev, "cannot set RUN state\n"); -- return ret; -- } -+ ret = spi_qup_set_state(qup, QUP_STATE_RUN); -+ if (ret) { -+ dev_warn(qup->dev, "cannot set RUN state\n"); -+ return ret; -+ } - -- if (!wait_for_completion_timeout(&qup->done, timeout)) -- return -ETIMEDOUT; -+ ret = spi_qup_set_state(qup, QUP_STATE_PAUSE); -+ if (ret) { -+ dev_warn(qup->dev, "cannot set PAUSE state\n"); -+ return ret; -+ } -+ -+ if (qup->mode == QUP_IO_M_MODE_FIFO) -+ spi_qup_write(qup); -+ -+ ret = spi_qup_set_state(qup, QUP_STATE_RUN); -+ if (ret) { -+ dev_warn(qup->dev, "cannot set RUN state\n"); -+ return ret; -+ } -+ -+ if (!wait_for_completion_timeout(&qup->done, timeout)) -+ return -ETIMEDOUT; -+ -+ offset++; -+ } while (iterations--); - - return 0; - } -@@ -722,17 +752,17 @@ static irqreturn_t spi_qup_qup_irq(int i - complete(&controller->dma_tx_done); - } else { - if (opflags & QUP_OP_IN_SERVICE_FLAG) -- spi_qup_read(controller, xfer); -+ spi_qup_read(controller); - - if (opflags & QUP_OP_OUT_SERVICE_FLAG) -- spi_qup_write(controller, xfer); -+ spi_qup_write(controller); - } - - /* re-read opflags as flags may have changed due to actions above */ - if (opflags & QUP_OP_OUT_SERVICE_FLAG) - opflags = readl_relaxed(controller->base + QUP_OPERATIONAL); - -- if ((controller->rx_bytes == xfer->len && -+ if ((controller->rx_bytes == spi_qup_len(controller) && - (opflags & QUP_OP_MAX_INPUT_DONE_FLAG)) || error) - done = true; - -@@ -794,7 +824,7 @@ static int spi_qup_transfer_one(struct s - return ret; - - timeout = DIV_ROUND_UP(xfer->speed_hz, MSEC_PER_SEC); -- timeout = DIV_ROUND_UP(xfer->len * 8, timeout); -+ timeout = DIV_ROUND_UP(min_t(unsigned long, SPI_MAX_XFER, xfer->len) * 8, timeout); - timeout = 100 * msecs_to_jiffies(timeout); - - if (spi_qup_is_dma_xfer(controller->mode)) -@@ -983,7 +1013,7 @@ static int spi_qup_probe(struct platform - master->dev.of_node = pdev->dev.of_node; - master->auto_runtime_pm = true; - master->dma_alignment = dma_get_cache_alignment(); -- master->max_dma_len = SPI_MAX_DMA_XFER; -+ master->max_dma_len = SPI_MAX_XFER; - - platform_set_drvdata(pdev, master); - diff --git a/target/linux/ipq40xx/patches-4.9/0012-spi-qup-refactor-spi_qup_prep_sg-to-be-more-take-spe.patch b/target/linux/ipq40xx/patches-4.9/0012-spi-qup-refactor-spi_qup_prep_sg-to-be-more-take-spe.patch deleted file mode 100644 index 990cccd8a..000000000 --- a/target/linux/ipq40xx/patches-4.9/0012-spi-qup-refactor-spi_qup_prep_sg-to-be-more-take-spe.patch +++ /dev/null @@ -1,73 +0,0 @@ -From fca27bd516d30e33b9373a8c61ca4431077e479e Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Wed, 4 May 2016 16:33:42 -0500 -Subject: [PATCH 12/69] spi: qup: refactor spi_qup_prep_sg to be more take - specific sgl and nent - -This is in preparation for splitting DMA into multiple transacations, -this contains no code changes just refactoring. - -Signed-off-by: Matthew McClintock ---- - drivers/spi/spi-qup.c | 28 +++++++++++----------------- - 1 file changed, 11 insertions(+), 17 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -379,27 +379,19 @@ static void spi_qup_write(struct spi_qup - } while (remainder); - } - --static int spi_qup_prep_sg(struct spi_master *master, struct spi_transfer *xfer, -- enum dma_transfer_direction dir, -- dma_async_tx_callback callback, -- void *data) -+static int spi_qup_prep_sg(struct spi_master *master, struct scatterlist *sgl, -+ unsigned int nents, enum dma_transfer_direction dir, -+ dma_async_tx_callback callback, void *data) - { - unsigned long flags = DMA_PREP_INTERRUPT | DMA_PREP_FENCE; - struct dma_async_tx_descriptor *desc; -- struct scatterlist *sgl; - struct dma_chan *chan; - dma_cookie_t cookie; -- unsigned int nents; - -- if (dir == DMA_MEM_TO_DEV) { -+ if (dir == DMA_MEM_TO_DEV) - chan = master->dma_tx; -- nents = xfer->tx_sg.nents; -- sgl = xfer->tx_sg.sgl; -- } else { -+ else - chan = master->dma_rx; -- nents = xfer->rx_sg.nents; -- sgl = xfer->rx_sg.sgl; -- } - - desc = dmaengine_prep_slave_sg(chan, sgl, nents, dir, flags); - if (IS_ERR_OR_NULL(desc)) -@@ -602,8 +594,9 @@ unsigned long timeout) - } - - if (xfer->rx_buf) { -- ret = spi_qup_prep_sg(master, xfer, DMA_DEV_TO_MEM, rx_done, -- &qup->done); -+ ret = spi_qup_prep_sg(master, xfer->rx_sg.sgl, -+ xfer->rx_sg.nents, DMA_DEV_TO_MEM, -+ rx_done, &qup->done); - if (ret) - return ret; - -@@ -611,8 +604,9 @@ unsigned long timeout) - } - - if (xfer->tx_buf) { -- ret = spi_qup_prep_sg(master, xfer, DMA_MEM_TO_DEV, tx_done, -- &qup->dma_tx_done); -+ ret = spi_qup_prep_sg(master, xfer->tx_sg.sgl, -+ xfer->tx_sg.nents, DMA_MEM_TO_DEV, -+ tx_done, &qup->dma_tx_done); - if (ret) - return ret; - diff --git a/target/linux/ipq40xx/patches-4.9/0013-spi-qup-allow-mulitple-DMA-transactions-per-spi-xfer.patch b/target/linux/ipq40xx/patches-4.9/0013-spi-qup-allow-mulitple-DMA-transactions-per-spi-xfer.patch deleted file mode 100644 index 13e199c52..000000000 --- a/target/linux/ipq40xx/patches-4.9/0013-spi-qup-allow-mulitple-DMA-transactions-per-spi-xfer.patch +++ /dev/null @@ -1,166 +0,0 @@ -From 028f915b20ec343dda88f1bcc99f07f6b428b4aa Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Thu, 5 May 2016 10:07:11 -0500 -Subject: [PATCH 13/69] spi: qup: allow mulitple DMA transactions per spi xfer - -Much like the block mode changes, we are breaking up DMA transactions -into 64K chunks so we can reset the QUP engine. - -Signed-off-by: Matthew McClintock ---- - drivers/spi/spi-qup.c | 120 ++++++++++++++++++++++++++++++++++++-------------- - 1 file changed, 86 insertions(+), 34 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -566,6 +566,21 @@ static int spi_qup_io_config(struct spi_ - return 0; - } - -+static unsigned int spi_qup_sgl_get_size(struct scatterlist *sgl, unsigned int nents) -+{ -+ struct scatterlist *sg; -+ int i; -+ unsigned int length = 0; -+ -+ if (!nents) -+ return 0; -+ -+ for_each_sg(sgl, sg, nents, i) -+ length += sg_dma_len(sg); -+ -+ return length; -+} -+ - static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer, - unsigned long timeout) - { -@@ -573,53 +588,90 @@ unsigned long timeout) - struct spi_qup *qup = spi_master_get_devdata(master); - dma_async_tx_callback rx_done = NULL, tx_done = NULL; - int ret; -+ struct scatterlist *tx_sgl, *rx_sgl; - -- ret = spi_qup_io_config(spi, xfer); -- if (ret) -- return ret; -- -- /* before issuing the descriptors, set the QUP to run */ -- ret = spi_qup_set_state(qup, QUP_STATE_RUN); -- if (ret) { -- dev_warn(qup->dev, "cannot set RUN state\n"); -- return ret; -- } -- -- if (!qup->qup_v1) { -- if (xfer->rx_buf) -- rx_done = spi_qup_dma_done; -- -- if (xfer->tx_buf) -- tx_done = spi_qup_dma_done; -- } -- -- if (xfer->rx_buf) { -- ret = spi_qup_prep_sg(master, xfer->rx_sg.sgl, -- xfer->rx_sg.nents, DMA_DEV_TO_MEM, -- rx_done, &qup->done); -- if (ret) -- return ret; -+ rx_sgl = xfer->rx_sg.sgl; -+ tx_sgl = xfer->tx_sg.sgl; - -- dma_async_issue_pending(master->dma_rx); -- } -+ do { -+ int rx_nents = 0, tx_nents = 0; - -- if (xfer->tx_buf) { -- ret = spi_qup_prep_sg(master, xfer->tx_sg.sgl, -- xfer->tx_sg.nents, DMA_MEM_TO_DEV, -- tx_done, &qup->dma_tx_done); -+ if (rx_sgl) { -+ rx_nents = sg_nents_for_len(rx_sgl, SPI_MAX_XFER); -+ if (rx_nents < 0) -+ rx_nents = sg_nents(rx_sgl); -+ -+ qup->n_words = spi_qup_sgl_get_size(rx_sgl, rx_nents) / -+ qup->w_size; -+ } -+ -+ if (tx_sgl) { -+ tx_nents = sg_nents_for_len(tx_sgl, SPI_MAX_XFER); -+ if (tx_nents < 0) -+ tx_nents = sg_nents(tx_sgl); -+ -+ qup->n_words = spi_qup_sgl_get_size(tx_sgl, tx_nents) / -+ qup->w_size; -+ } -+ -+ -+ ret = spi_qup_io_config(spi, xfer); - if (ret) - return ret; - -- dma_async_issue_pending(master->dma_tx); -- } -+ /* before issuing the descriptors, set the QUP to run */ -+ ret = spi_qup_set_state(qup, QUP_STATE_RUN); -+ if (ret) { -+ dev_warn(qup->dev, "cannot set RUN state\n"); -+ return ret; -+ } -+ -+ if (!qup->qup_v1) { -+ if (rx_sgl) { -+ rx_done = spi_qup_dma_done; -+ } -+ -+ if (tx_sgl) { -+ tx_done = spi_qup_dma_done; -+ } -+ } -+ -+ if (rx_sgl) { -+ ret = spi_qup_prep_sg(master, rx_sgl, rx_nents, -+ DMA_DEV_TO_MEM, rx_done, -+ &qup->done); -+ if (ret) -+ return ret; -+ -+ dma_async_issue_pending(master->dma_rx); -+ } -+ -+ if (tx_sgl) { -+ ret = spi_qup_prep_sg(master, tx_sgl, tx_nents, -+ DMA_MEM_TO_DEV, tx_done, -+ &qup->dma_tx_done); -+ if (ret) -+ return ret; -+ -+ dma_async_issue_pending(master->dma_tx); -+ } -+ -+ if (rx_sgl && !wait_for_completion_timeout(&qup->done, timeout)) { -+ pr_emerg(" rx timed out"); -+ return -ETIMEDOUT; -+ } -+ -+ if (tx_sgl && !wait_for_completion_timeout(&qup->dma_tx_done, timeout)) { -+ pr_emerg(" tx timed out\n"); -+ return -ETIMEDOUT; -+ } - -- if (xfer->rx_buf && !wait_for_completion_timeout(&qup->done, timeout)) -- return -ETIMEDOUT; -+ for (; rx_sgl && rx_nents--; rx_sgl = sg_next(rx_sgl)); -+ for (; tx_sgl && tx_nents--; tx_sgl = sg_next(tx_sgl)); - -- if (xfer->tx_buf && !wait_for_completion_timeout(&qup->dma_tx_done, timeout)) -- ret = -ETIMEDOUT; -+ } while (rx_sgl || tx_sgl); - -- return ret; -+ return 0; - } - - static int spi_qup_do_pio(struct spi_device *spi, struct spi_transfer *xfer, diff --git a/target/linux/ipq40xx/patches-4.9/0014-spi-qup-Fix-sg-nents-calculation.patch b/target/linux/ipq40xx/patches-4.9/0014-spi-qup-Fix-sg-nents-calculation.patch deleted file mode 100644 index 2d321f1d2..000000000 --- a/target/linux/ipq40xx/patches-4.9/0014-spi-qup-Fix-sg-nents-calculation.patch +++ /dev/null @@ -1,86 +0,0 @@ -From f5913e137c3dac4972ac0ddd5f248924d02d3dcb Mon Sep 17 00:00:00 2001 -From: Varadarajan Narayanan -Date: Wed, 25 May 2016 13:40:03 +0530 -Subject: [PATCH 14/69] spi: qup: Fix sg nents calculation - -lib/scatterlist.c:sg_nents_for_len() returns the number of SG -entries that total up to greater than or equal to the given -length. However, the spi-qup driver assumed that the returned -nents is for a total less than or equal to the given length. The -spi-qup driver requests nents for SPI_MAX_XFER, however the API -returns nents for SPI_MAX_XFER+delta (actually SZ_64K). - -Based on this, spi_qup_do_dma() calculates n_words and programs -that into QUP_MX_{IN|OUT}PUT_CNT register. The calculated -n_words value is more than the maximum value that can fit in the -the 16-bit COUNT field of the QUP_MX_{IN|OUT}PUT_CNT register. -And, the field gets programmed to zero. Since the COUNT field is -zero, the i/o doesn't start eventually resulting in the i/o -timing out. - -Signed-off-by: Varadarajan Narayanan ---- - drivers/spi/spi-qup.c | 38 ++++++++++++++++++++++++++++++++++++-- - 1 file changed, 36 insertions(+), 2 deletions(-) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -581,6 +581,38 @@ static unsigned int spi_qup_sgl_get_size - return length; - } - -+/** -+ * spi_qup_sg_nents_for_len - return total count of entries in scatterlist -+ * needed to satisfy the supplied length -+ * @sg: The scatterlist -+ * @len: The total required length -+ * -+ * Description: -+ * Determines the number of entries in sg that sum upto a maximum of -+ * the supplied length, taking into acount chaining as well -+ * -+ * Returns: -+ * the number of sg entries needed, negative error on failure -+ * -+ **/ -+int spi_qup_sg_nents_for_len(struct scatterlist *sg, u64 len) -+{ -+ int nents; -+ u64 total; -+ -+ if (!len) -+ return 0; -+ -+ for (nents = 0, total = 0; sg; sg = sg_next(sg)) { -+ nents++; -+ total += sg_dma_len(sg); -+ if (total > len) -+ return (nents - 1); -+ } -+ -+ return -EINVAL; -+} -+ - static int spi_qup_do_dma(struct spi_device *spi, struct spi_transfer *xfer, - unsigned long timeout) - { -@@ -597,7 +629,8 @@ unsigned long timeout) - int rx_nents = 0, tx_nents = 0; - - if (rx_sgl) { -- rx_nents = sg_nents_for_len(rx_sgl, SPI_MAX_XFER); -+ rx_nents = spi_qup_sg_nents_for_len(rx_sgl, -+ SPI_MAX_XFER); - if (rx_nents < 0) - rx_nents = sg_nents(rx_sgl); - -@@ -606,7 +639,8 @@ unsigned long timeout) - } - - if (tx_sgl) { -- tx_nents = sg_nents_for_len(tx_sgl, SPI_MAX_XFER); -+ tx_nents = spi_qup_sg_nents_for_len(tx_sgl, -+ SPI_MAX_XFER); - if (tx_nents < 0) - tx_nents = sg_nents(tx_sgl); - diff --git a/target/linux/ipq40xx/patches-4.9/0015-cpufreq-dt-qcom-ipq4019-Add-compat-for-qcom-ipq4019.patch b/target/linux/ipq40xx/patches-4.9/0015-cpufreq-dt-qcom-ipq4019-Add-compat-for-qcom-ipq4019.patch deleted file mode 100644 index 06b61a07e..000000000 --- a/target/linux/ipq40xx/patches-4.9/0015-cpufreq-dt-qcom-ipq4019-Add-compat-for-qcom-ipq4019.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 5543e93f51d5e23f9b3a7fe11a722c91fc410485 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Wed, 13 Apr 2016 14:03:14 -0500 -Subject: [PATCH 15/69] cpufreq: dt: qcom: ipq4019: Add compat for qcom ipq4019 - -Instantiate cpufreq-dt-platdev driver for ipq4019 to support changing -CPU frequencies. - -This depends on Viresh Kumar's patches in this series: -http://comments.gmane.org/gmane.linux.power-management.general/73887 - -Signed-off-by: Matthew McClintock ---- - drivers/cpufreq/cpufreq-dt-platdev.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/cpufreq/cpufreq-dt-platdev.c -+++ b/drivers/cpufreq/cpufreq-dt-platdev.c -@@ -35,6 +35,8 @@ static const struct of_device_id machine - - { .compatible = "marvell,berlin", }, - -+ { .compatible = "qcom,ipq4019", }, -+ - { .compatible = "samsung,exynos3250", }, - { .compatible = "samsung,exynos4210", }, - { .compatible = "samsung,exynos4212", }, diff --git a/target/linux/ipq40xx/patches-4.9/0016-clk-ipq4019-report-accurate-fixed-clock-rates.patch b/target/linux/ipq40xx/patches-4.9/0016-clk-ipq4019-report-accurate-fixed-clock-rates.patch deleted file mode 100644 index be9c4eb1b..000000000 --- a/target/linux/ipq40xx/patches-4.9/0016-clk-ipq4019-report-accurate-fixed-clock-rates.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 5e2df5f44e35d79fff2ab8bbb8a726ad5de78a3e Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Thu, 28 Apr 2016 12:55:08 -0500 -Subject: [PATCH 16/69] clk: ipq4019: report accurate fixed clock rates - -This looks like a copy-and-paste gone wrong, but update all -the fixed clock rates to report the correct values. - -Signed-off-by: Matthew McClintock ---- - drivers/clk/qcom/gcc-ipq4019.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - ---- a/drivers/clk/qcom/gcc-ipq4019.c -+++ b/drivers/clk/qcom/gcc-ipq4019.c -@@ -1327,12 +1327,12 @@ static int gcc_ipq4019_probe(struct plat - { - struct device *dev = &pdev->dev; - -- clk_register_fixed_rate(dev, "fepll125", "xo", 0, 200000000); -- clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 200000000); -- clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 200000000); -- clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 200000000); -+ clk_register_fixed_rate(dev, "fepll125", "xo", 0, 125000000); -+ clk_register_fixed_rate(dev, "fepll125dly", "xo", 0, 125000000); -+ clk_register_fixed_rate(dev, "fepllwcss2g", "xo", 0, 250000000); -+ clk_register_fixed_rate(dev, "fepllwcss5g", "xo", 0, 250000000); - clk_register_fixed_rate(dev, "fepll200", "xo", 0, 200000000); -- clk_register_fixed_rate(dev, "fepll500", "xo", 0, 200000000); -+ clk_register_fixed_rate(dev, "fepll500", "xo", 0, 500000000); - clk_register_fixed_rate(dev, "ddrpllapss", "xo", 0, 666000000); - - return qcom_cc_probe(pdev, &gcc_ipq4019_desc); diff --git a/target/linux/ipq40xx/patches-4.9/0017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch b/target/linux/ipq40xx/patches-4.9/0017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch deleted file mode 100644 index 7cbd6a455..000000000 --- a/target/linux/ipq40xx/patches-4.9/0017-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 18c3b42575a154343831aec0637aab00e19440e1 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Thu, 17 Mar 2016 15:01:09 -0500 -Subject: [PATCH 17/69] qcom: ipq4019: add cpu operating points for cpufreq - support - -This adds some operating points for cpu frequeny scaling - -Signed-off-by: Matthew McClintock ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 34 ++++++++++++++++++++++++++-------- - 1 file changed, 26 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -40,14 +40,7 @@ - reg = <0x0>; - clocks = <&gcc GCC_APPS_CLK_SRC>; - clock-frequency = <0>; -- operating-points = < -- /* kHz uV (fixed) */ -- 48000 1100000 -- 200000 1100000 -- 500000 1100000 -- 666000 1100000 -- >; -- clock-latency = <256000>; -+ operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu@1 { -@@ -59,6 +52,7 @@ - reg = <0x1>; - clocks = <&gcc GCC_APPS_CLK_SRC>; - clock-frequency = <0>; -+ operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu@2 { -@@ -70,6 +64,7 @@ - reg = <0x2>; - clocks = <&gcc GCC_APPS_CLK_SRC>; - clock-frequency = <0>; -+ operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu@3 { -@@ -81,6 +76,29 @@ - reg = <0x3>; - clocks = <&gcc GCC_APPS_CLK_SRC>; - clock-frequency = <0>; -+ operating-points-v2 = <&cpu0_opp_table>; -+ }; -+ }; -+ -+ cpu0_opp_table: opp_table0 { -+ compatible = "operating-points-v2"; -+ opp-shared; -+ -+ opp@48000000 { -+ opp-hz = /bits/ 64 <48000000>; -+ clock-latency-ns = <256000>; -+ }; -+ opp@200000000 { -+ opp-hz = /bits/ 64 <200000000>; -+ clock-latency-ns = <256000>; -+ }; -+ opp@500000000 { -+ opp-hz = /bits/ 64 <500000000>; -+ clock-latency-ns = <256000>; -+ }; -+ opp@666000000 { -+ opp-hz = /bits/ 64 <666000000>; -+ clock-latency-ns = <256000>; - }; - }; - diff --git a/target/linux/ipq40xx/patches-4.9/0018-qcom-ipq4019-turn-on-DMA-for-i2c.patch b/target/linux/ipq40xx/patches-4.9/0018-qcom-ipq4019-turn-on-DMA-for-i2c.patch deleted file mode 100644 index 42bb4a6e3..000000000 --- a/target/linux/ipq40xx/patches-4.9/0018-qcom-ipq4019-turn-on-DMA-for-i2c.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 71f82049dca86bc89b9da07e051e4ed492820233 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Mon, 28 Mar 2016 11:16:51 -0500 -Subject: [PATCH 18/69] qcom: ipq4019: turn on DMA for i2c - -These are the required nodes for i2c-qup to use DMA - -Signed-off-by: Matthew McClintock ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -179,6 +179,8 @@ - clock-names = "iface", "core"; - #address-cells = <1>; - #size-cells = <0>; -+ dmas = <&blsp_dma 9>, <&blsp_dma 8>; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - diff --git a/target/linux/ipq40xx/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch b/target/linux/ipq40xx/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch deleted file mode 100644 index 54ee571cb..000000000 --- a/target/linux/ipq40xx/patches-4.9/0019-qcom-ipq4019-use-correct-clock-for-i2c-bus-0.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 7292bf171cdf2fb48607058f12ddd0d812a87428 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Fri, 29 Apr 2016 12:48:02 -0500 -Subject: [PATCH 19/69] qcom: ipq4019: use correct clock for i2c bus 0 - -For the record the mapping is as follows: - -QUP0 = SPI QUP1 -QUP1 = SPI QUP2 -QUP2 = I2C QUP1 -QUP3 = I2C QUP2 - -Signed-off-by: Matthew McClintock ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -175,7 +175,7 @@ - reg = <0x78b7000 0x6000>; - interrupts = ; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, -- <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; -+ <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; - clock-names = "iface", "core"; - #address-cells = <1>; - #size-cells = <0>; diff --git a/target/linux/ipq40xx/patches-4.9/0020-qcom-ipq4019-enable-DMA-for-spi.patch b/target/linux/ipq40xx/patches-4.9/0020-qcom-ipq4019-enable-DMA-for-spi.patch deleted file mode 100644 index c1fa5c729..000000000 --- a/target/linux/ipq40xx/patches-4.9/0020-qcom-ipq4019-enable-DMA-for-spi.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 4593e768393b9589f0a8987eaf57316c214865fe Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Mon, 11 Apr 2016 14:49:12 -0500 -Subject: [PATCH 20/69] qcom: ipq4019: enable DMA for spi - -These are the required nodes for spi-qup to use DMA - -Signed-off-by: Matthew McClintock ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -167,6 +167,8 @@ - clock-names = "core", "iface"; - #address-cells = <1>; - #size-cells = <0>; -+ dmas = <&blsp_dma 5>, <&blsp_dma 4>; -+ dma-names = "rx", "tx"; - status = "disabled"; - }; - diff --git a/target/linux/ipq40xx/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch b/target/linux/ipq40xx/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch deleted file mode 100644 index 8cd3e205d..000000000 --- a/target/linux/ipq40xx/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch +++ /dev/null @@ -1,225 +0,0 @@ -From ec3e465ecf3f7dd26f2e22170e4c5f4b9979df5d Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Mon, 21 Mar 2016 15:55:21 -0500 -Subject: [PATCH 26/69] dts: ipq4019: Add support for IPQ4019 DK04 board - -This is pretty similiar to a DK01 but has a bit more IO. Some notable -differences are listed below however they are not in the device tree yet -as we continue adding more support - -- second serial port -- PCIe -- NAND -- SD/EMMC - -Signed-off-by: Matthew McClintock ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 12 +- - arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 21 +++ - arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 163 ++++++++++++++++++++++++ - 4 files changed, 189 insertions(+), 8 deletions(-) - create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts - create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ - qcom-apq8084-ifc6540.dtb \ - qcom-apq8084-mtp.dtb \ - qcom-ipq4019-ap.dk01.1-c1.dtb \ -+ qcom-ipq4019-ap.dk04.1-c1.dtb \ - qcom-ipq8064-ap148.dtb \ - qcom-msm8660-surf.dtb \ - qcom-msm8960-cdp.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts -@@ -0,0 +1,22 @@ -+/* Copyright (c) 2015, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include "qcom-ipq4019-ap.dk04.1.dtsi" -+ -+/ { -+ model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1"; -+ compatible = "qcom,ap-dk04.1-c1", "qcom,ipq4019"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi -@@ -0,0 +1,163 @@ -+/* Copyright (c) 2015, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include "qcom-ipq4019.dtsi" -+ -+/ { -+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1"; -+ compatible = "qcom,ipq4019"; -+ -+ clocks { -+ xo: xo { -+ compatible = "fixed-clock"; -+ clock-frequency = <48000000>; -+ #clock-cells = <0>; -+ }; -+ }; -+ -+ soc { -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = <1 2 0xf08>, -+ <1 3 0xf08>, -+ <1 4 0xf08>, -+ <1 1 0xf08>; -+ clock-frequency = <48000000>; -+ }; -+ -+ pinctrl@0x01000000 { -+ serial_0_pins: serial_pinmux { -+ mux { -+ pins = "gpio16", "gpio17"; -+ function = "blsp_uart0"; -+ bias-disable; -+ }; -+ }; -+ -+ serial_1_pins: serial1_pinmux { -+ mux { -+ pins = "gpio8", "gpio9"; -+ function = "blsp_uart1"; -+ bias-disable; -+ }; -+ }; -+ -+ spi_0_pins: spi_0_pinmux { -+ pinmux { -+ function = "blsp_spi0"; -+ pins = "gpio13", "gpio14", "gpio15"; -+ }; -+ pinmux_cs { -+ function = "gpio"; -+ pins = "gpio12"; -+ }; -+ pinconf { -+ pins = "gpio13", "gpio14", "gpio15"; -+ drive-strength = <12>; -+ bias-disable; -+ }; -+ pinconf_cs { -+ pins = "gpio12"; -+ drive-strength = <2>; -+ bias-disable; -+ output-high; -+ }; -+ }; -+ -+ i2c_0_pins: i2c_0_pinmux { -+ pinmux { -+ function = "blsp_i2c0"; -+ pins = "gpio10", "gpio11"; -+ }; -+ pinconf { -+ pins = "gpio10", "gpio11"; -+ drive-strength = <16>; -+ bias-disable; -+ }; -+ }; -+ }; -+ -+ blsp_dma: dma@7884000 { -+ status = "ok"; -+ }; -+ -+ spi_0: spi@78b5000 { -+ pinctrl-0 = <&spi_0_pins>; -+ pinctrl-names = "default"; -+ status = "ok"; -+ cs-gpios = <&tlmm 12 0>; -+ -+ mx25l25635e@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ reg = <0>; -+ compatible = "mx25l25635e"; -+ spi-max-frequency = <24000000>; -+ }; -+ }; -+ -+ i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */ -+ pinctrl-0 = <&i2c_0_pins>; -+ pinctrl-names = "default"; -+ -+ status = "ok"; -+ }; -+ -+ serial@78af000 { -+ pinctrl-0 = <&serial_0_pins>; -+ pinctrl-names = "default"; -+ status = "ok"; -+ }; -+ -+ serial@78b0000 { -+ pinctrl-0 = <&serial_1_pins>; -+ pinctrl-names = "default"; -+ status = "ok"; -+ }; -+ -+ usb3_ss_phy: ssphy@9a000 { -+ status = "ok"; -+ }; -+ -+ usb3_hs_phy: hsphy@a6000 { -+ status = "ok"; -+ }; -+ -+ usb3: usb3@8af8800 { -+ status = "ok"; -+ }; -+ -+ usb2_hs_phy: hsphy@a8000 { -+ status = "ok"; -+ }; -+ -+ usb2: usb2@60f8800 { -+ status = "ok"; -+ }; -+ -+ cryptobam: dma@8e04000 { -+ status = "ok"; -+ }; -+ -+ crypto@8e3a000 { -+ status = "ok"; -+ }; -+ -+ watchdog@b017000 { -+ status = "ok"; -+ }; -+ }; -+}; diff --git a/target/linux/ipq40xx/patches-4.9/0027-clk-qcom-Add-support-for-SMD-RPM-Clocks.patch b/target/linux/ipq40xx/patches-4.9/0027-clk-qcom-Add-support-for-SMD-RPM-Clocks.patch deleted file mode 100644 index f7ff1da8d..000000000 --- a/target/linux/ipq40xx/patches-4.9/0027-clk-qcom-Add-support-for-SMD-RPM-Clocks.patch +++ /dev/null @@ -1,731 +0,0 @@ -From 41ee71bae788e1858c0a387d010c342e6bb3f4b0 Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Wed, 2 Nov 2016 17:56:56 +0200 -Subject: [PATCH 27/69] clk: qcom: Add support for SMD-RPM Clocks - -This adds initial support for clocks controlled by the Resource -Power Manager (RPM) processor on some Qualcomm SoCs, which use -the qcom_smd_rpm driver to communicate with RPM. -Such platforms are msm8916, apq8084 and msm8974. - -The RPM is a dedicated hardware engine for managing the shared -SoC resources in order to keep the lowest power profile. It -communicates with other hardware subsystems via shared memory -and accepts clock requests, aggregates the requests and turns -the clocks on/off or scales them on demand. - -This driver is based on the codeaurora.org driver: -https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c - -Signed-off-by: Georgi Djakov ---- - .../devicetree/bindings/clock/qcom,rpmcc.txt | 36 ++ - drivers/clk/qcom/Kconfig | 16 + - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/clk-smd-rpm.c | 571 +++++++++++++++++++++ - include/dt-bindings/clock/qcom,rpmcc.h | 45 ++ - 5 files changed, 669 insertions(+) - create mode 100644 Documentation/devicetree/bindings/clock/qcom,rpmcc.txt - create mode 100644 drivers/clk/qcom/clk-smd-rpm.c - create mode 100644 include/dt-bindings/clock/qcom,rpmcc.h - ---- /dev/null -+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt -@@ -0,0 +1,36 @@ -+Qualcomm RPM Clock Controller Binding -+------------------------------------------------ -+The RPM is a dedicated hardware engine for managing the shared -+SoC resources in order to keep the lowest power profile. It -+communicates with other hardware subsystems via shared memory -+and accepts clock requests, aggregates the requests and turns -+the clocks on/off or scales them on demand. -+ -+Required properties : -+- compatible : shall contain only one of the following. The generic -+ compatible "qcom,rpmcc" should be also included. -+ -+ "qcom,rpmcc-msm8916", "qcom,rpmcc" -+ -+- #clock-cells : shall contain 1 -+ -+Example: -+ smd { -+ compatible = "qcom,smd"; -+ -+ rpm { -+ interrupts = <0 168 1>; -+ qcom,ipc = <&apcs 8 0>; -+ qcom,smd-edge = <15>; -+ -+ rpm_requests { -+ compatible = "qcom,rpm-msm8916"; -+ qcom,smd-channels = "rpm_requests"; -+ -+ rpmcc: clock-controller { -+ compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc"; -+ #clock-cells = <1>; -+ }; -+ }; -+ }; -+ }; ---- a/drivers/clk/qcom/Kconfig -+++ b/drivers/clk/qcom/Kconfig -@@ -2,6 +2,9 @@ config QCOM_GDSC - bool - select PM_GENERIC_DOMAINS if PM - -+config QCOM_RPMCC -+ bool -+ - config COMMON_CLK_QCOM - tristate "Support for Qualcomm's clock controllers" - depends on OF -@@ -9,6 +12,19 @@ config COMMON_CLK_QCOM - select REGMAP_MMIO - select RESET_CONTROLLER - -+config QCOM_CLK_SMD_RPM -+ tristate "RPM over SMD based Clock Controller" -+ depends on COMMON_CLK_QCOM && QCOM_SMD_RPM -+ select QCOM_RPMCC -+ help -+ The RPM (Resource Power Manager) is a dedicated hardware engine for -+ managing the shared SoC resources in order to keep the lowest power -+ profile. It communicates with other hardware subsystems via shared -+ memory and accepts clock requests, aggregates the requests and turns -+ the clocks on/off or scales them on demand. -+ Say Y if you want to support the clocks exposed by the RPM on -+ platforms such as apq8016, apq8084, msm8974 etc. -+ - config APQ_GCC_8084 - tristate "APQ8084 Global Clock Controller" - select QCOM_GDSC ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -29,3 +29,4 @@ obj-$(CONFIG_MSM_LCC_8960) += lcc-msm896 - obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o - obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o - obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o -+obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o ---- /dev/null -+++ b/drivers/clk/qcom/clk-smd-rpm.c -@@ -0,0 +1,571 @@ -+/* -+ * Copyright (c) 2016, Linaro Limited -+ * Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This software is licensed under the terms of the GNU General Public -+ * License version 2, as published by the Free Software Foundation, and -+ * may be copied, distributed, and modified under those terms. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define QCOM_RPM_KEY_SOFTWARE_ENABLE 0x6e657773 -+#define QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY 0x62636370 -+#define QCOM_RPM_SMD_KEY_RATE 0x007a484b -+#define QCOM_RPM_SMD_KEY_ENABLE 0x62616e45 -+#define QCOM_RPM_SMD_KEY_STATE 0x54415453 -+#define QCOM_RPM_SCALING_ENABLE_ID 0x2 -+ -+#define __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, stat_id, \ -+ key) \ -+ static struct clk_smd_rpm _platform##_##_active; \ -+ static struct clk_smd_rpm _platform##_##_name = { \ -+ .rpm_res_type = (type), \ -+ .rpm_clk_id = (r_id), \ -+ .rpm_status_id = (stat_id), \ -+ .rpm_key = (key), \ -+ .peer = &_platform##_##_active, \ -+ .rate = INT_MAX, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_smd_rpm_ops, \ -+ .name = #_name, \ -+ .parent_names = (const char *[]){ "xo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ }; \ -+ static struct clk_smd_rpm _platform##_##_active = { \ -+ .rpm_res_type = (type), \ -+ .rpm_clk_id = (r_id), \ -+ .rpm_status_id = (stat_id), \ -+ .active_only = true, \ -+ .rpm_key = (key), \ -+ .peer = &_platform##_##_name, \ -+ .rate = INT_MAX, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_smd_rpm_ops, \ -+ .name = #_active, \ -+ .parent_names = (const char *[]){ "xo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ } -+ -+#define __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, type, r_id, \ -+ stat_id, r, key) \ -+ static struct clk_smd_rpm _platform##_##_active; \ -+ static struct clk_smd_rpm _platform##_##_name = { \ -+ .rpm_res_type = (type), \ -+ .rpm_clk_id = (r_id), \ -+ .rpm_status_id = (stat_id), \ -+ .rpm_key = (key), \ -+ .branch = true, \ -+ .peer = &_platform##_##_active, \ -+ .rate = (r), \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_smd_rpm_branch_ops, \ -+ .name = #_name, \ -+ .parent_names = (const char *[]){ "xo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ }; \ -+ static struct clk_smd_rpm _platform##_##_active = { \ -+ .rpm_res_type = (type), \ -+ .rpm_clk_id = (r_id), \ -+ .rpm_status_id = (stat_id), \ -+ .active_only = true, \ -+ .rpm_key = (key), \ -+ .branch = true, \ -+ .peer = &_platform##_##_name, \ -+ .rate = (r), \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_smd_rpm_branch_ops, \ -+ .name = #_active, \ -+ .parent_names = (const char *[]){ "xo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ } -+ -+#define DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id) \ -+ __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, \ -+ 0, QCOM_RPM_SMD_KEY_RATE) -+ -+#define DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, type, r_id, r) \ -+ __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, type, \ -+ r_id, 0, r, QCOM_RPM_SMD_KEY_ENABLE) -+ -+#define DEFINE_CLK_SMD_RPM_QDSS(_platform, _name, _active, type, r_id) \ -+ __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, \ -+ 0, QCOM_RPM_SMD_KEY_STATE) -+ -+#define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, _active, r_id) \ -+ __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, \ -+ QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, 1000, \ -+ QCOM_RPM_KEY_SOFTWARE_ENABLE) -+ -+#define DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(_platform, _name, _active, r_id) \ -+ __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, \ -+ QCOM_SMD_RPM_CLK_BUF_A, r_id, 0, 1000, \ -+ QCOM_RPM_KEY_PIN_CTRL_CLK_BUFFER_ENABLE_KEY) -+ -+#define to_clk_smd_rpm(_hw) container_of(_hw, struct clk_smd_rpm, hw) -+ -+struct clk_smd_rpm { -+ const int rpm_res_type; -+ const int rpm_key; -+ const int rpm_clk_id; -+ const int rpm_status_id; -+ const bool active_only; -+ bool enabled; -+ bool branch; -+ struct clk_smd_rpm *peer; -+ struct clk_hw hw; -+ unsigned long rate; -+ struct qcom_smd_rpm *rpm; -+}; -+ -+struct clk_smd_rpm_req { -+ __le32 key; -+ __le32 nbytes; -+ __le32 value; -+}; -+ -+struct rpm_cc { -+ struct qcom_rpm *rpm; -+ struct clk_hw_onecell_data data; -+ struct clk_hw *hws[]; -+}; -+ -+struct rpm_smd_clk_desc { -+ struct clk_smd_rpm **clks; -+ size_t num_clks; -+}; -+ -+static DEFINE_MUTEX(rpm_smd_clk_lock); -+ -+static int clk_smd_rpm_handoff(struct clk_smd_rpm *r) -+{ -+ int ret; -+ struct clk_smd_rpm_req req = { -+ .key = cpu_to_le32(r->rpm_key), -+ .nbytes = cpu_to_le32(sizeof(u32)), -+ .value = cpu_to_le32(INT_MAX), -+ }; -+ -+ ret = qcom_rpm_smd_write(r->rpm, QCOM_SMD_RPM_ACTIVE_STATE, -+ r->rpm_res_type, r->rpm_clk_id, &req, -+ sizeof(req)); -+ if (ret) -+ return ret; -+ ret = qcom_rpm_smd_write(r->rpm, QCOM_SMD_RPM_SLEEP_STATE, -+ r->rpm_res_type, r->rpm_clk_id, &req, -+ sizeof(req)); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int clk_smd_rpm_set_rate_active(struct clk_smd_rpm *r, -+ unsigned long rate) -+{ -+ struct clk_smd_rpm_req req = { -+ .key = cpu_to_le32(r->rpm_key), -+ .nbytes = cpu_to_le32(sizeof(u32)), -+ .value = cpu_to_le32(DIV_ROUND_UP(rate, 1000)), /* to kHz */ -+ }; -+ -+ return qcom_rpm_smd_write(r->rpm, QCOM_SMD_RPM_ACTIVE_STATE, -+ r->rpm_res_type, r->rpm_clk_id, &req, -+ sizeof(req)); -+} -+ -+static int clk_smd_rpm_set_rate_sleep(struct clk_smd_rpm *r, -+ unsigned long rate) -+{ -+ struct clk_smd_rpm_req req = { -+ .key = cpu_to_le32(r->rpm_key), -+ .nbytes = cpu_to_le32(sizeof(u32)), -+ .value = cpu_to_le32(DIV_ROUND_UP(rate, 1000)), /* to kHz */ -+ }; -+ -+ return qcom_rpm_smd_write(r->rpm, QCOM_SMD_RPM_SLEEP_STATE, -+ r->rpm_res_type, r->rpm_clk_id, &req, -+ sizeof(req)); -+} -+ -+static void to_active_sleep(struct clk_smd_rpm *r, unsigned long rate, -+ unsigned long *active, unsigned long *sleep) -+{ -+ *active = rate; -+ -+ /* -+ * Active-only clocks don't care what the rate is during sleep. So, -+ * they vote for zero. -+ */ -+ if (r->active_only) -+ *sleep = 0; -+ else -+ *sleep = *active; -+} -+ -+static int clk_smd_rpm_prepare(struct clk_hw *hw) -+{ -+ struct clk_smd_rpm *r = to_clk_smd_rpm(hw); -+ struct clk_smd_rpm *peer = r->peer; -+ unsigned long this_rate = 0, this_sleep_rate = 0; -+ unsigned long peer_rate = 0, peer_sleep_rate = 0; -+ unsigned long active_rate, sleep_rate; -+ int ret = 0; -+ -+ mutex_lock(&rpm_smd_clk_lock); -+ -+ /* Don't send requests to the RPM if the rate has not been set. */ -+ if (!r->rate) -+ goto out; -+ -+ to_active_sleep(r, r->rate, &this_rate, &this_sleep_rate); -+ -+ /* Take peer clock's rate into account only if it's enabled. */ -+ if (peer->enabled) -+ to_active_sleep(peer, peer->rate, -+ &peer_rate, &peer_sleep_rate); -+ -+ active_rate = max(this_rate, peer_rate); -+ -+ if (r->branch) -+ active_rate = !!active_rate; -+ -+ ret = clk_smd_rpm_set_rate_active(r, active_rate); -+ if (ret) -+ goto out; -+ -+ sleep_rate = max(this_sleep_rate, peer_sleep_rate); -+ if (r->branch) -+ sleep_rate = !!sleep_rate; -+ -+ ret = clk_smd_rpm_set_rate_sleep(r, sleep_rate); -+ if (ret) -+ /* Undo the active set vote and restore it */ -+ ret = clk_smd_rpm_set_rate_active(r, peer_rate); -+ -+out: -+ if (!ret) -+ r->enabled = true; -+ -+ mutex_unlock(&rpm_smd_clk_lock); -+ -+ return ret; -+} -+ -+static void clk_smd_rpm_unprepare(struct clk_hw *hw) -+{ -+ struct clk_smd_rpm *r = to_clk_smd_rpm(hw); -+ struct clk_smd_rpm *peer = r->peer; -+ unsigned long peer_rate = 0, peer_sleep_rate = 0; -+ unsigned long active_rate, sleep_rate; -+ int ret; -+ -+ mutex_lock(&rpm_smd_clk_lock); -+ -+ if (!r->rate) -+ goto out; -+ -+ /* Take peer clock's rate into account only if it's enabled. */ -+ if (peer->enabled) -+ to_active_sleep(peer, peer->rate, &peer_rate, -+ &peer_sleep_rate); -+ -+ active_rate = r->branch ? !!peer_rate : peer_rate; -+ ret = clk_smd_rpm_set_rate_active(r, active_rate); -+ if (ret) -+ goto out; -+ -+ sleep_rate = r->branch ? !!peer_sleep_rate : peer_sleep_rate; -+ ret = clk_smd_rpm_set_rate_sleep(r, sleep_rate); -+ if (ret) -+ goto out; -+ -+ r->enabled = false; -+ -+out: -+ mutex_unlock(&rpm_smd_clk_lock); -+} -+ -+static int clk_smd_rpm_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ struct clk_smd_rpm *r = to_clk_smd_rpm(hw); -+ struct clk_smd_rpm *peer = r->peer; -+ unsigned long active_rate, sleep_rate; -+ unsigned long this_rate = 0, this_sleep_rate = 0; -+ unsigned long peer_rate = 0, peer_sleep_rate = 0; -+ int ret = 0; -+ -+ mutex_lock(&rpm_smd_clk_lock); -+ -+ if (!r->enabled) -+ goto out; -+ -+ to_active_sleep(r, rate, &this_rate, &this_sleep_rate); -+ -+ /* Take peer clock's rate into account only if it's enabled. */ -+ if (peer->enabled) -+ to_active_sleep(peer, peer->rate, -+ &peer_rate, &peer_sleep_rate); -+ -+ active_rate = max(this_rate, peer_rate); -+ ret = clk_smd_rpm_set_rate_active(r, active_rate); -+ if (ret) -+ goto out; -+ -+ sleep_rate = max(this_sleep_rate, peer_sleep_rate); -+ ret = clk_smd_rpm_set_rate_sleep(r, sleep_rate); -+ if (ret) -+ goto out; -+ -+ r->rate = rate; -+ -+out: -+ mutex_unlock(&rpm_smd_clk_lock); -+ -+ return ret; -+} -+ -+static long clk_smd_rpm_round_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long *parent_rate) -+{ -+ /* -+ * RPM handles rate rounding and we don't have a way to -+ * know what the rate will be, so just return whatever -+ * rate is requested. -+ */ -+ return rate; -+} -+ -+static unsigned long clk_smd_rpm_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct clk_smd_rpm *r = to_clk_smd_rpm(hw); -+ -+ /* -+ * RPM handles rate rounding and we don't have a way to -+ * know what the rate will be, so just return whatever -+ * rate was set. -+ */ -+ return r->rate; -+} -+ -+static int clk_smd_rpm_enable_scaling(struct qcom_smd_rpm *rpm) -+{ -+ int ret; -+ struct clk_smd_rpm_req req = { -+ .key = cpu_to_le32(QCOM_RPM_SMD_KEY_ENABLE), -+ .nbytes = cpu_to_le32(sizeof(u32)), -+ .value = cpu_to_le32(1), -+ }; -+ -+ ret = qcom_rpm_smd_write(rpm, QCOM_SMD_RPM_SLEEP_STATE, -+ QCOM_SMD_RPM_MISC_CLK, -+ QCOM_RPM_SCALING_ENABLE_ID, &req, sizeof(req)); -+ if (ret) { -+ pr_err("RPM clock scaling (sleep set) not enabled!\n"); -+ return ret; -+ } -+ -+ ret = qcom_rpm_smd_write(rpm, QCOM_SMD_RPM_ACTIVE_STATE, -+ QCOM_SMD_RPM_MISC_CLK, -+ QCOM_RPM_SCALING_ENABLE_ID, &req, sizeof(req)); -+ if (ret) { -+ pr_err("RPM clock scaling (active set) not enabled!\n"); -+ return ret; -+ } -+ -+ pr_debug("%s: RPM clock scaling is enabled\n", __func__); -+ return 0; -+} -+ -+static const struct clk_ops clk_smd_rpm_ops = { -+ .prepare = clk_smd_rpm_prepare, -+ .unprepare = clk_smd_rpm_unprepare, -+ .set_rate = clk_smd_rpm_set_rate, -+ .round_rate = clk_smd_rpm_round_rate, -+ .recalc_rate = clk_smd_rpm_recalc_rate, -+}; -+ -+static const struct clk_ops clk_smd_rpm_branch_ops = { -+ .prepare = clk_smd_rpm_prepare, -+ .unprepare = clk_smd_rpm_unprepare, -+ .round_rate = clk_smd_rpm_round_rate, -+ .recalc_rate = clk_smd_rpm_recalc_rate, -+}; -+ -+/* msm8916 */ -+DEFINE_CLK_SMD_RPM(msm8916, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0); -+DEFINE_CLK_SMD_RPM(msm8916, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1); -+DEFINE_CLK_SMD_RPM(msm8916, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0); -+DEFINE_CLK_SMD_RPM_QDSS(msm8916, qdss_clk, qdss_a_clk, QCOM_SMD_RPM_MISC_CLK, 1); -+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, bb_clk1, bb_clk1_a, 1); -+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, bb_clk2, bb_clk2_a, 2); -+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, rf_clk1, rf_clk1_a, 4); -+DEFINE_CLK_SMD_RPM_XO_BUFFER(msm8916, rf_clk2, rf_clk2_a, 5); -+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1_pin, bb_clk1_a_pin, 1); -+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2_pin, bb_clk2_a_pin, 2); -+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk1_pin, rf_clk1_a_pin, 4); -+DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, rf_clk2_pin, rf_clk2_a_pin, 5); -+ -+static struct clk_smd_rpm *msm8916_clks[] = { -+ [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk, -+ [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk, -+ [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk, -+ [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk, -+ [RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk, -+ [RPM_SMD_BIMC_A_CLK] = &msm8916_bimc_a_clk, -+ [RPM_SMD_QDSS_CLK] = &msm8916_qdss_clk, -+ [RPM_SMD_QDSS_A_CLK] = &msm8916_qdss_a_clk, -+ [RPM_SMD_BB_CLK1] = &msm8916_bb_clk1, -+ [RPM_SMD_BB_CLK1_A] = &msm8916_bb_clk1_a, -+ [RPM_SMD_BB_CLK2] = &msm8916_bb_clk2, -+ [RPM_SMD_BB_CLK2_A] = &msm8916_bb_clk2_a, -+ [RPM_SMD_RF_CLK1] = &msm8916_rf_clk1, -+ [RPM_SMD_RF_CLK1_A] = &msm8916_rf_clk1_a, -+ [RPM_SMD_RF_CLK2] = &msm8916_rf_clk2, -+ [RPM_SMD_RF_CLK2_A] = &msm8916_rf_clk2_a, -+ [RPM_SMD_BB_CLK1_PIN] = &msm8916_bb_clk1_pin, -+ [RPM_SMD_BB_CLK1_A_PIN] = &msm8916_bb_clk1_a_pin, -+ [RPM_SMD_BB_CLK2_PIN] = &msm8916_bb_clk2_pin, -+ [RPM_SMD_BB_CLK2_A_PIN] = &msm8916_bb_clk2_a_pin, -+ [RPM_SMD_RF_CLK1_PIN] = &msm8916_rf_clk1_pin, -+ [RPM_SMD_RF_CLK1_A_PIN] = &msm8916_rf_clk1_a_pin, -+ [RPM_SMD_RF_CLK2_PIN] = &msm8916_rf_clk2_pin, -+ [RPM_SMD_RF_CLK2_A_PIN] = &msm8916_rf_clk2_a_pin, -+}; -+ -+static const struct rpm_smd_clk_desc rpm_clk_msm8916 = { -+ .clks = msm8916_clks, -+ .num_clks = ARRAY_SIZE(msm8916_clks), -+}; -+ -+static const struct of_device_id rpm_smd_clk_match_table[] = { -+ { .compatible = "qcom,rpmcc-msm8916", .data = &rpm_clk_msm8916 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, rpm_smd_clk_match_table); -+ -+static int rpm_smd_clk_probe(struct platform_device *pdev) -+{ -+ struct clk_hw **hws; -+ struct rpm_cc *rcc; -+ struct clk_hw_onecell_data *data; -+ int ret; -+ size_t num_clks, i; -+ struct qcom_smd_rpm *rpm; -+ struct clk_smd_rpm **rpm_smd_clks; -+ const struct rpm_smd_clk_desc *desc; -+ -+ rpm = dev_get_drvdata(pdev->dev.parent); -+ if (!rpm) { -+ dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n"); -+ return -ENODEV; -+ } -+ -+ desc = of_device_get_match_data(&pdev->dev); -+ if (!desc) -+ return -EINVAL; -+ -+ rpm_smd_clks = desc->clks; -+ num_clks = desc->num_clks; -+ -+ rcc = devm_kzalloc(&pdev->dev, sizeof(*rcc) + sizeof(*hws) * num_clks, -+ GFP_KERNEL); -+ if (!rcc) -+ return -ENOMEM; -+ -+ hws = rcc->hws; -+ data = &rcc->data; -+ data->num = num_clks; -+ -+ for (i = 0; i < num_clks; i++) { -+ if (!rpm_smd_clks[i]) { -+ continue; -+ } -+ -+ rpm_smd_clks[i]->rpm = rpm; -+ -+ ret = clk_smd_rpm_handoff(rpm_smd_clks[i]); -+ if (ret) -+ goto err; -+ } -+ -+ ret = clk_smd_rpm_enable_scaling(rpm); -+ if (ret) -+ goto err; -+ -+ for (i = 0; i < num_clks; i++) { -+ if (!rpm_smd_clks[i]) { -+ data->hws[i] = ERR_PTR(-ENOENT); -+ continue; -+ } -+ -+ ret = devm_clk_hw_register(&pdev->dev, &rpm_smd_clks[i]->hw); -+ if (ret) -+ goto err; -+ } -+ -+ ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, -+ data); -+ if (ret) -+ goto err; -+ -+ return 0; -+err: -+ dev_err(&pdev->dev, "Error registering SMD clock driver (%d)\n", ret); -+ return ret; -+} -+ -+static int rpm_smd_clk_remove(struct platform_device *pdev) -+{ -+ of_clk_del_provider(pdev->dev.of_node); -+ return 0; -+} -+ -+static struct platform_driver rpm_smd_clk_driver = { -+ .driver = { -+ .name = "qcom-clk-smd-rpm", -+ .of_match_table = rpm_smd_clk_match_table, -+ }, -+ .probe = rpm_smd_clk_probe, -+ .remove = rpm_smd_clk_remove, -+}; -+ -+static int __init rpm_smd_clk_init(void) -+{ -+ return platform_driver_register(&rpm_smd_clk_driver); -+} -+core_initcall(rpm_smd_clk_init); -+ -+static void __exit rpm_smd_clk_exit(void) -+{ -+ platform_driver_unregister(&rpm_smd_clk_driver); -+} -+module_exit(rpm_smd_clk_exit); -+ -+MODULE_DESCRIPTION("Qualcomm RPM over SMD Clock Controller Driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:qcom-clk-smd-rpm"); ---- /dev/null -+++ b/include/dt-bindings/clock/qcom,rpmcc.h -@@ -0,0 +1,45 @@ -+/* -+ * Copyright 2015 Linaro Limited -+ * -+ * This software is licensed under the terms of the GNU General Public -+ * License version 2, as published by the Free Software Foundation, and -+ * may be copied, distributed, and modified under those terms. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H -+#define _DT_BINDINGS_CLK_MSM_RPMCC_H -+ -+/* msm8916 */ -+#define RPM_SMD_XO_CLK_SRC 0 -+#define RPM_SMD_XO_A_CLK_SRC 1 -+#define RPM_SMD_PCNOC_CLK 2 -+#define RPM_SMD_PCNOC_A_CLK 3 -+#define RPM_SMD_SNOC_CLK 4 -+#define RPM_SMD_SNOC_A_CLK 5 -+#define RPM_SMD_BIMC_CLK 6 -+#define RPM_SMD_BIMC_A_CLK 7 -+#define RPM_SMD_QDSS_CLK 8 -+#define RPM_SMD_QDSS_A_CLK 9 -+#define RPM_SMD_BB_CLK1 10 -+#define RPM_SMD_BB_CLK1_A 11 -+#define RPM_SMD_BB_CLK2 12 -+#define RPM_SMD_BB_CLK2_A 13 -+#define RPM_SMD_RF_CLK1 14 -+#define RPM_SMD_RF_CLK1_A 15 -+#define RPM_SMD_RF_CLK2 16 -+#define RPM_SMD_RF_CLK2_A 17 -+#define RPM_SMD_BB_CLK1_PIN 18 -+#define RPM_SMD_BB_CLK1_A_PIN 19 -+#define RPM_SMD_BB_CLK2_PIN 20 -+#define RPM_SMD_BB_CLK2_A_PIN 21 -+#define RPM_SMD_RF_CLK1_PIN 22 -+#define RPM_SMD_RF_CLK1_A_PIN 23 -+#define RPM_SMD_RF_CLK2_PIN 24 -+#define RPM_SMD_RF_CLK2_A_PIN 25 -+ -+#endif diff --git a/target/linux/ipq40xx/patches-4.9/0028-clk-qcom-Add-support-for-RPM-Clocks.patch b/target/linux/ipq40xx/patches-4.9/0028-clk-qcom-Add-support-for-RPM-Clocks.patch deleted file mode 100644 index 72b392dc1..000000000 --- a/target/linux/ipq40xx/patches-4.9/0028-clk-qcom-Add-support-for-RPM-Clocks.patch +++ /dev/null @@ -1,587 +0,0 @@ -From 21e7116c9d639f3283d4cec286fed1e703832b43 Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Wed, 2 Nov 2016 17:56:57 +0200 -Subject: [PATCH 28/69] clk: qcom: Add support for RPM Clocks - -This adds initial support for clocks controlled by the Resource -Power Manager (RPM) processor on some Qualcomm SoCs, which use -the qcom_rpm driver to communicate with RPM. -Such platforms are apq8064 and msm8960. - -Signed-off-by: Georgi Djakov -Acked-by: Rob Herring -Signed-off-by: Stephen Boyd ---- - .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + - drivers/clk/qcom/Kconfig | 13 + - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/clk-rpm.c | 489 +++++++++++++++++++++ - include/dt-bindings/clock/qcom,rpmcc.h | 24 + - 5 files changed, 528 insertions(+) - create mode 100644 drivers/clk/qcom/clk-rpm.c - ---- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt -+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt -@@ -11,6 +11,7 @@ Required properties : - compatible "qcom,rpmcc" should be also included. - - "qcom,rpmcc-msm8916", "qcom,rpmcc" -+ "qcom,rpmcc-apq8064", "qcom,rpmcc" - - - #clock-cells : shall contain 1 - ---- a/drivers/clk/qcom/Kconfig -+++ b/drivers/clk/qcom/Kconfig -@@ -12,6 +12,19 @@ config COMMON_CLK_QCOM - select REGMAP_MMIO - select RESET_CONTROLLER - -+config QCOM_CLK_RPM -+ tristate "RPM based Clock Controller" -+ depends on COMMON_CLK_QCOM && MFD_QCOM_RPM -+ select QCOM_RPMCC -+ help -+ The RPM (Resource Power Manager) is a dedicated hardware engine for -+ managing the shared SoC resources in order to keep the lowest power -+ profile. It communicates with other hardware subsystems via shared -+ memory and accepts clock requests, aggregates the requests and turns -+ the clocks on/off or scales them on demand. -+ Say Y if you want to support the clocks exposed by the RPM on -+ platforms such as ipq806x, msm8660, msm8960 etc. -+ - config QCOM_CLK_SMD_RPM - tristate "RPM over SMD based Clock Controller" - depends on COMMON_CLK_QCOM && QCOM_SMD_RPM ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -29,4 +29,5 @@ obj-$(CONFIG_MSM_LCC_8960) += lcc-msm896 - obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o - obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o - obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o -+obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o - obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o ---- /dev/null -+++ b/drivers/clk/qcom/clk-rpm.c -@@ -0,0 +1,489 @@ -+/* -+ * Copyright (c) 2016, Linaro Limited -+ * Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This software is licensed under the terms of the GNU General Public -+ * License version 2, as published by the Free Software Foundation, and -+ * may be copied, distributed, and modified under those terms. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define QCOM_RPM_MISC_CLK_TYPE 0x306b6c63 -+#define QCOM_RPM_SCALING_ENABLE_ID 0x2 -+ -+#define DEFINE_CLK_RPM(_platform, _name, _active, r_id) \ -+ static struct clk_rpm _platform##_##_active; \ -+ static struct clk_rpm _platform##_##_name = { \ -+ .rpm_clk_id = (r_id), \ -+ .peer = &_platform##_##_active, \ -+ .rate = INT_MAX, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_rpm_ops, \ -+ .name = #_name, \ -+ .parent_names = (const char *[]){ "pxo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ }; \ -+ static struct clk_rpm _platform##_##_active = { \ -+ .rpm_clk_id = (r_id), \ -+ .peer = &_platform##_##_name, \ -+ .active_only = true, \ -+ .rate = INT_MAX, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_rpm_ops, \ -+ .name = #_active, \ -+ .parent_names = (const char *[]){ "pxo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ } -+ -+#define DEFINE_CLK_RPM_PXO_BRANCH(_platform, _name, _active, r_id, r) \ -+ static struct clk_rpm _platform##_##_active; \ -+ static struct clk_rpm _platform##_##_name = { \ -+ .rpm_clk_id = (r_id), \ -+ .active_only = true, \ -+ .peer = &_platform##_##_active, \ -+ .rate = (r), \ -+ .branch = true, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_rpm_branch_ops, \ -+ .name = #_name, \ -+ .parent_names = (const char *[]){ "pxo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ }; \ -+ static struct clk_rpm _platform##_##_active = { \ -+ .rpm_clk_id = (r_id), \ -+ .peer = &_platform##_##_name, \ -+ .rate = (r), \ -+ .branch = true, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_rpm_branch_ops, \ -+ .name = #_active, \ -+ .parent_names = (const char *[]){ "pxo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ } -+ -+#define DEFINE_CLK_RPM_CXO_BRANCH(_platform, _name, _active, r_id, r) \ -+ static struct clk_rpm _platform##_##_active; \ -+ static struct clk_rpm _platform##_##_name = { \ -+ .rpm_clk_id = (r_id), \ -+ .peer = &_platform##_##_active, \ -+ .rate = (r), \ -+ .branch = true, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_rpm_branch_ops, \ -+ .name = #_name, \ -+ .parent_names = (const char *[]){ "cxo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ }; \ -+ static struct clk_rpm _platform##_##_active = { \ -+ .rpm_clk_id = (r_id), \ -+ .active_only = true, \ -+ .peer = &_platform##_##_name, \ -+ .rate = (r), \ -+ .branch = true, \ -+ .hw.init = &(struct clk_init_data){ \ -+ .ops = &clk_rpm_branch_ops, \ -+ .name = #_active, \ -+ .parent_names = (const char *[]){ "cxo_board" }, \ -+ .num_parents = 1, \ -+ }, \ -+ } -+ -+#define to_clk_rpm(_hw) container_of(_hw, struct clk_rpm, hw) -+ -+struct clk_rpm { -+ const int rpm_clk_id; -+ const bool active_only; -+ unsigned long rate; -+ bool enabled; -+ bool branch; -+ struct clk_rpm *peer; -+ struct clk_hw hw; -+ struct qcom_rpm *rpm; -+}; -+ -+struct rpm_cc { -+ struct qcom_rpm *rpm; -+ struct clk_hw_onecell_data data; -+ struct clk_hw *hws[]; -+}; -+ -+struct rpm_clk_desc { -+ struct clk_rpm **clks; -+ size_t num_clks; -+}; -+ -+static DEFINE_MUTEX(rpm_clk_lock); -+ -+static int clk_rpm_handoff(struct clk_rpm *r) -+{ -+ int ret; -+ u32 value = INT_MAX; -+ -+ ret = qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, -+ r->rpm_clk_id, &value, 1); -+ if (ret) -+ return ret; -+ ret = qcom_rpm_write(r->rpm, QCOM_RPM_SLEEP_STATE, -+ r->rpm_clk_id, &value, 1); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int clk_rpm_set_rate_active(struct clk_rpm *r, unsigned long rate) -+{ -+ u32 value = DIV_ROUND_UP(rate, 1000); /* to kHz */ -+ -+ return qcom_rpm_write(r->rpm, QCOM_RPM_ACTIVE_STATE, -+ r->rpm_clk_id, &value, 1); -+} -+ -+static int clk_rpm_set_rate_sleep(struct clk_rpm *r, unsigned long rate) -+{ -+ u32 value = DIV_ROUND_UP(rate, 1000); /* to kHz */ -+ -+ return qcom_rpm_write(r->rpm, QCOM_RPM_SLEEP_STATE, -+ r->rpm_clk_id, &value, 1); -+} -+ -+static void to_active_sleep(struct clk_rpm *r, unsigned long rate, -+ unsigned long *active, unsigned long *sleep) -+{ -+ *active = rate; -+ -+ /* -+ * Active-only clocks don't care what the rate is during sleep. So, -+ * they vote for zero. -+ */ -+ if (r->active_only) -+ *sleep = 0; -+ else -+ *sleep = *active; -+} -+ -+static int clk_rpm_prepare(struct clk_hw *hw) -+{ -+ struct clk_rpm *r = to_clk_rpm(hw); -+ struct clk_rpm *peer = r->peer; -+ unsigned long this_rate = 0, this_sleep_rate = 0; -+ unsigned long peer_rate = 0, peer_sleep_rate = 0; -+ unsigned long active_rate, sleep_rate; -+ int ret = 0; -+ -+ mutex_lock(&rpm_clk_lock); -+ -+ /* Don't send requests to the RPM if the rate has not been set. */ -+ if (!r->rate) -+ goto out; -+ -+ to_active_sleep(r, r->rate, &this_rate, &this_sleep_rate); -+ -+ /* Take peer clock's rate into account only if it's enabled. */ -+ if (peer->enabled) -+ to_active_sleep(peer, peer->rate, -+ &peer_rate, &peer_sleep_rate); -+ -+ active_rate = max(this_rate, peer_rate); -+ -+ if (r->branch) -+ active_rate = !!active_rate; -+ -+ ret = clk_rpm_set_rate_active(r, active_rate); -+ if (ret) -+ goto out; -+ -+ sleep_rate = max(this_sleep_rate, peer_sleep_rate); -+ if (r->branch) -+ sleep_rate = !!sleep_rate; -+ -+ ret = clk_rpm_set_rate_sleep(r, sleep_rate); -+ if (ret) -+ /* Undo the active set vote and restore it */ -+ ret = clk_rpm_set_rate_active(r, peer_rate); -+ -+out: -+ if (!ret) -+ r->enabled = true; -+ -+ mutex_unlock(&rpm_clk_lock); -+ -+ return ret; -+} -+ -+static void clk_rpm_unprepare(struct clk_hw *hw) -+{ -+ struct clk_rpm *r = to_clk_rpm(hw); -+ struct clk_rpm *peer = r->peer; -+ unsigned long peer_rate = 0, peer_sleep_rate = 0; -+ unsigned long active_rate, sleep_rate; -+ int ret; -+ -+ mutex_lock(&rpm_clk_lock); -+ -+ if (!r->rate) -+ goto out; -+ -+ /* Take peer clock's rate into account only if it's enabled. */ -+ if (peer->enabled) -+ to_active_sleep(peer, peer->rate, &peer_rate, -+ &peer_sleep_rate); -+ -+ active_rate = r->branch ? !!peer_rate : peer_rate; -+ ret = clk_rpm_set_rate_active(r, active_rate); -+ if (ret) -+ goto out; -+ -+ sleep_rate = r->branch ? !!peer_sleep_rate : peer_sleep_rate; -+ ret = clk_rpm_set_rate_sleep(r, sleep_rate); -+ if (ret) -+ goto out; -+ -+ r->enabled = false; -+ -+out: -+ mutex_unlock(&rpm_clk_lock); -+} -+ -+static int clk_rpm_set_rate(struct clk_hw *hw, -+ unsigned long rate, unsigned long parent_rate) -+{ -+ struct clk_rpm *r = to_clk_rpm(hw); -+ struct clk_rpm *peer = r->peer; -+ unsigned long active_rate, sleep_rate; -+ unsigned long this_rate = 0, this_sleep_rate = 0; -+ unsigned long peer_rate = 0, peer_sleep_rate = 0; -+ int ret = 0; -+ -+ mutex_lock(&rpm_clk_lock); -+ -+ if (!r->enabled) -+ goto out; -+ -+ to_active_sleep(r, rate, &this_rate, &this_sleep_rate); -+ -+ /* Take peer clock's rate into account only if it's enabled. */ -+ if (peer->enabled) -+ to_active_sleep(peer, peer->rate, -+ &peer_rate, &peer_sleep_rate); -+ -+ active_rate = max(this_rate, peer_rate); -+ ret = clk_rpm_set_rate_active(r, active_rate); -+ if (ret) -+ goto out; -+ -+ sleep_rate = max(this_sleep_rate, peer_sleep_rate); -+ ret = clk_rpm_set_rate_sleep(r, sleep_rate); -+ if (ret) -+ goto out; -+ -+ r->rate = rate; -+ -+out: -+ mutex_unlock(&rpm_clk_lock); -+ -+ return ret; -+} -+ -+static long clk_rpm_round_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long *parent_rate) -+{ -+ /* -+ * RPM handles rate rounding and we don't have a way to -+ * know what the rate will be, so just return whatever -+ * rate is requested. -+ */ -+ return rate; -+} -+ -+static unsigned long clk_rpm_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct clk_rpm *r = to_clk_rpm(hw); -+ -+ /* -+ * RPM handles rate rounding and we don't have a way to -+ * know what the rate will be, so just return whatever -+ * rate was set. -+ */ -+ return r->rate; -+} -+ -+static const struct clk_ops clk_rpm_ops = { -+ .prepare = clk_rpm_prepare, -+ .unprepare = clk_rpm_unprepare, -+ .set_rate = clk_rpm_set_rate, -+ .round_rate = clk_rpm_round_rate, -+ .recalc_rate = clk_rpm_recalc_rate, -+}; -+ -+static const struct clk_ops clk_rpm_branch_ops = { -+ .prepare = clk_rpm_prepare, -+ .unprepare = clk_rpm_unprepare, -+ .round_rate = clk_rpm_round_rate, -+ .recalc_rate = clk_rpm_recalc_rate, -+}; -+ -+/* apq8064 */ -+DEFINE_CLK_RPM(apq8064, afab_clk, afab_a_clk, QCOM_RPM_APPS_FABRIC_CLK); -+DEFINE_CLK_RPM(apq8064, cfpb_clk, cfpb_a_clk, QCOM_RPM_CFPB_CLK); -+DEFINE_CLK_RPM(apq8064, daytona_clk, daytona_a_clk, QCOM_RPM_DAYTONA_FABRIC_CLK); -+DEFINE_CLK_RPM(apq8064, ebi1_clk, ebi1_a_clk, QCOM_RPM_EBI1_CLK); -+DEFINE_CLK_RPM(apq8064, mmfab_clk, mmfab_a_clk, QCOM_RPM_MM_FABRIC_CLK); -+DEFINE_CLK_RPM(apq8064, mmfpb_clk, mmfpb_a_clk, QCOM_RPM_MMFPB_CLK); -+DEFINE_CLK_RPM(apq8064, sfab_clk, sfab_a_clk, QCOM_RPM_SYS_FABRIC_CLK); -+DEFINE_CLK_RPM(apq8064, sfpb_clk, sfpb_a_clk, QCOM_RPM_SFPB_CLK); -+DEFINE_CLK_RPM(apq8064, qdss_clk, qdss_a_clk, QCOM_RPM_QDSS_CLK); -+ -+static struct clk_rpm *apq8064_clks[] = { -+ [RPM_APPS_FABRIC_CLK] = &apq8064_afab_clk, -+ [RPM_APPS_FABRIC_A_CLK] = &apq8064_afab_a_clk, -+ [RPM_CFPB_CLK] = &apq8064_cfpb_clk, -+ [RPM_CFPB_A_CLK] = &apq8064_cfpb_a_clk, -+ [RPM_DAYTONA_FABRIC_CLK] = &apq8064_daytona_clk, -+ [RPM_DAYTONA_FABRIC_A_CLK] = &apq8064_daytona_a_clk, -+ [RPM_EBI1_CLK] = &apq8064_ebi1_clk, -+ [RPM_EBI1_A_CLK] = &apq8064_ebi1_a_clk, -+ [RPM_MM_FABRIC_CLK] = &apq8064_mmfab_clk, -+ [RPM_MM_FABRIC_A_CLK] = &apq8064_mmfab_a_clk, -+ [RPM_MMFPB_CLK] = &apq8064_mmfpb_clk, -+ [RPM_MMFPB_A_CLK] = &apq8064_mmfpb_a_clk, -+ [RPM_SYS_FABRIC_CLK] = &apq8064_sfab_clk, -+ [RPM_SYS_FABRIC_A_CLK] = &apq8064_sfab_a_clk, -+ [RPM_SFPB_CLK] = &apq8064_sfpb_clk, -+ [RPM_SFPB_A_CLK] = &apq8064_sfpb_a_clk, -+ [RPM_QDSS_CLK] = &apq8064_qdss_clk, -+ [RPM_QDSS_A_CLK] = &apq8064_qdss_a_clk, -+}; -+ -+static const struct rpm_clk_desc rpm_clk_apq8064 = { -+ .clks = apq8064_clks, -+ .num_clks = ARRAY_SIZE(apq8064_clks), -+}; -+ -+static const struct of_device_id rpm_clk_match_table[] = { -+ { .compatible = "qcom,rpmcc-apq8064", .data = &rpm_clk_apq8064 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, rpm_clk_match_table); -+ -+static int rpm_clk_probe(struct platform_device *pdev) -+{ -+ struct clk_hw **hws; -+ struct rpm_cc *rcc; -+ struct clk_hw_onecell_data *data; -+ int ret; -+ size_t num_clks, i; -+ struct qcom_rpm *rpm; -+ struct clk_rpm **rpm_clks; -+ const struct rpm_clk_desc *desc; -+ -+ rpm = dev_get_drvdata(pdev->dev.parent); -+ if (!rpm) { -+ dev_err(&pdev->dev, "Unable to retrieve handle to RPM\n"); -+ return -ENODEV; -+ } -+ -+ desc = of_device_get_match_data(&pdev->dev); -+ if (!desc) -+ return -EINVAL; -+ -+ rpm_clks = desc->clks; -+ num_clks = desc->num_clks; -+ -+ rcc = devm_kzalloc(&pdev->dev, sizeof(*rcc) + sizeof(*hws) * num_clks, -+ GFP_KERNEL); -+ if (!rcc) -+ return -ENOMEM; -+ -+ hws = rcc->hws; -+ data = &rcc->data; -+ data->num = num_clks; -+ -+ for (i = 0; i < num_clks; i++) { -+ if (!rpm_clks[i]) -+ continue; -+ -+ rpm_clks[i]->rpm = rpm; -+ -+ ret = clk_rpm_handoff(rpm_clks[i]); -+ if (ret) -+ goto err; -+ } -+ -+ for (i = 0; i < num_clks; i++) { -+ if (!rpm_clks[i]) { -+ data->hws[i] = ERR_PTR(-ENOENT); -+ continue; -+ } -+ -+ ret = devm_clk_hw_register(&pdev->dev, &rpm_clks[i]->hw); -+ if (ret) -+ goto err; -+ } -+ -+ ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, -+ data); -+ if (ret) -+ goto err; -+ -+ return 0; -+err: -+ dev_err(&pdev->dev, "Error registering RPM Clock driver (%d)\n", ret); -+ return ret; -+} -+ -+static int rpm_clk_remove(struct platform_device *pdev) -+{ -+ of_clk_del_provider(pdev->dev.of_node); -+ return 0; -+} -+ -+static struct platform_driver rpm_clk_driver = { -+ .driver = { -+ .name = "qcom-clk-rpm", -+ .of_match_table = rpm_clk_match_table, -+ }, -+ .probe = rpm_clk_probe, -+ .remove = rpm_clk_remove, -+}; -+ -+static int __init rpm_clk_init(void) -+{ -+ return platform_driver_register(&rpm_clk_driver); -+} -+core_initcall(rpm_clk_init); -+ -+static void __exit rpm_clk_exit(void) -+{ -+ platform_driver_unregister(&rpm_clk_driver); -+} -+module_exit(rpm_clk_exit); -+ -+MODULE_DESCRIPTION("Qualcomm RPM Clock Controller Driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:qcom-clk-rpm"); ---- a/include/dt-bindings/clock/qcom,rpmcc.h -+++ b/include/dt-bindings/clock/qcom,rpmcc.h -@@ -14,6 +14,30 @@ - #ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H - #define _DT_BINDINGS_CLK_MSM_RPMCC_H - -+/* apq8064 */ -+#define RPM_PXO_CLK 0 -+#define RPM_PXO_A_CLK 1 -+#define RPM_CXO_CLK 2 -+#define RPM_CXO_A_CLK 3 -+#define RPM_APPS_FABRIC_CLK 4 -+#define RPM_APPS_FABRIC_A_CLK 5 -+#define RPM_CFPB_CLK 6 -+#define RPM_CFPB_A_CLK 7 -+#define RPM_QDSS_CLK 8 -+#define RPM_QDSS_A_CLK 9 -+#define RPM_DAYTONA_FABRIC_CLK 10 -+#define RPM_DAYTONA_FABRIC_A_CLK 11 -+#define RPM_EBI1_CLK 12 -+#define RPM_EBI1_A_CLK 13 -+#define RPM_MM_FABRIC_CLK 14 -+#define RPM_MM_FABRIC_A_CLK 15 -+#define RPM_MMFPB_CLK 16 -+#define RPM_MMFPB_A_CLK 17 -+#define RPM_SYS_FABRIC_CLK 18 -+#define RPM_SYS_FABRIC_A_CLK 19 -+#define RPM_SFPB_CLK 20 -+#define RPM_SFPB_A_CLK 21 -+ - /* msm8916 */ - #define RPM_SMD_XO_CLK_SRC 0 - #define RPM_SMD_XO_A_CLK_SRC 1 diff --git a/target/linux/ipq40xx/patches-4.9/0029-clk-qcom-clk-rpm-Fix-clk_hw-references.patch b/target/linux/ipq40xx/patches-4.9/0029-clk-qcom-clk-rpm-Fix-clk_hw-references.patch deleted file mode 100644 index 1b1b558dd..000000000 --- a/target/linux/ipq40xx/patches-4.9/0029-clk-qcom-clk-rpm-Fix-clk_hw-references.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 7028c21deb2c6205bb896cc3719414de3d6d6a6e Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Wed, 23 Nov 2016 16:52:49 +0200 -Subject: [PATCH 29/69] clk: qcom: clk-rpm: Fix clk_hw references - -Fix the clk_hw references to the actual clocks and add a xlate function -to return the hw pointers from the already existing static array. - -Reported-by: Michael Scott -Signed-off-by: Georgi Djakov -Signed-off-by: Stephen Boyd ---- - drivers/clk/qcom/clk-rpm.c | 36 ++++++++++++++++++++++-------------- - 1 file changed, 22 insertions(+), 14 deletions(-) - ---- a/drivers/clk/qcom/clk-rpm.c -+++ b/drivers/clk/qcom/clk-rpm.c -@@ -127,8 +127,8 @@ struct clk_rpm { - - struct rpm_cc { - struct qcom_rpm *rpm; -- struct clk_hw_onecell_data data; -- struct clk_hw *hws[]; -+ struct clk_rpm **clks; -+ size_t num_clks; - }; - - struct rpm_clk_desc { -@@ -391,11 +391,23 @@ static const struct of_device_id rpm_clk - }; - MODULE_DEVICE_TABLE(of, rpm_clk_match_table); - -+static struct clk_hw *qcom_rpm_clk_hw_get(struct of_phandle_args *clkspec, -+ void *data) -+{ -+ struct rpm_cc *rcc = data; -+ unsigned int idx = clkspec->args[0]; -+ -+ if (idx >= rcc->num_clks) { -+ pr_err("%s: invalid index %u\n", __func__, idx); -+ return ERR_PTR(-EINVAL); -+ } -+ -+ return rcc->clks[idx] ? &rcc->clks[idx]->hw : ERR_PTR(-ENOENT); -+} -+ - static int rpm_clk_probe(struct platform_device *pdev) - { -- struct clk_hw **hws; - struct rpm_cc *rcc; -- struct clk_hw_onecell_data *data; - int ret; - size_t num_clks, i; - struct qcom_rpm *rpm; -@@ -415,14 +427,12 @@ static int rpm_clk_probe(struct platform - rpm_clks = desc->clks; - num_clks = desc->num_clks; - -- rcc = devm_kzalloc(&pdev->dev, sizeof(*rcc) + sizeof(*hws) * num_clks, -- GFP_KERNEL); -+ rcc = devm_kzalloc(&pdev->dev, sizeof(*rcc), GFP_KERNEL); - if (!rcc) - return -ENOMEM; - -- hws = rcc->hws; -- data = &rcc->data; -- data->num = num_clks; -+ rcc->clks = rpm_clks; -+ rcc->num_clks = num_clks; - - for (i = 0; i < num_clks; i++) { - if (!rpm_clks[i]) -@@ -436,18 +446,16 @@ static int rpm_clk_probe(struct platform - } - - for (i = 0; i < num_clks; i++) { -- if (!rpm_clks[i]) { -- data->hws[i] = ERR_PTR(-ENOENT); -+ if (!rpm_clks[i]) - continue; -- } - - ret = devm_clk_hw_register(&pdev->dev, &rpm_clks[i]->hw); - if (ret) - goto err; - } - -- ret = of_clk_add_hw_provider(pdev->dev.of_node, of_clk_hw_onecell_get, -- data); -+ ret = of_clk_add_hw_provider(pdev->dev.of_node, qcom_rpm_clk_hw_get, -+ rcc); - if (ret) - goto err; - diff --git a/target/linux/ipq40xx/patches-4.9/0030-clk-Disable-i2c-device-on-gsbi4.patch b/target/linux/ipq40xx/patches-4.9/0030-clk-Disable-i2c-device-on-gsbi4.patch deleted file mode 100644 index b2a6afe0d..000000000 --- a/target/linux/ipq40xx/patches-4.9/0030-clk-Disable-i2c-device-on-gsbi4.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 0c974b87829e007dc4fae94e20d488204e20e662 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 9 Mar 2017 08:16:10 +0100 -Subject: [PATCH 30/69] clk: Disable i2c device on gsbi4 - -This patch was not annotated and comes from the v4.4 tree. - -Signed-off-by: John Crispin ---- - drivers/clk/qcom/gcc-ipq806x.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - ---- a/drivers/clk/qcom/gcc-ipq806x.c -+++ b/drivers/clk/qcom/gcc-ipq806x.c -@@ -294,7 +294,7 @@ static struct clk_rcg gsbi1_uart_src = { - .parent_names = gcc_pxo_pll8, - .num_parents = 2, - .ops = &clk_rcg_ops, -- .flags = CLK_SET_PARENT_GATE, -+ .flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED, - }, - }, - }; -@@ -312,7 +312,7 @@ static struct clk_branch gsbi1_uart_clk - }, - .num_parents = 1, - .ops = &clk_branch_ops, -- .flags = CLK_SET_RATE_PARENT, -+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, - }, - }, - }; -@@ -890,6 +890,7 @@ static struct clk_branch gsbi1_h_clk = { - .hw.init = &(struct clk_init_data){ - .name = "gsbi1_h_clk", - .ops = &clk_branch_ops, -+ .flags = CLK_IGNORE_UNUSED, - }, - }, - }; diff --git a/target/linux/ipq40xx/patches-4.9/0031-mtd-add-SMEM-parser-for-QCOM-platforms.patch b/target/linux/ipq40xx/patches-4.9/0031-mtd-add-SMEM-parser-for-QCOM-platforms.patch deleted file mode 100644 index ad0b09b11..000000000 --- a/target/linux/ipq40xx/patches-4.9/0031-mtd-add-SMEM-parser-for-QCOM-platforms.patch +++ /dev/null @@ -1,275 +0,0 @@ -From d8eeb4de90e968ba32d956728c866f20752cf2c3 Mon Sep 17 00:00:00 2001 -From: Mathieu Olivari -Date: Thu, 9 Mar 2017 08:18:08 +0100 -Subject: [PATCH 31/69] mtd: add SMEM parser for QCOM platforms - -On QCOM platforms using MTD devices storage (such as IPQ806x), SMEM is -used to store partition layout. This new parser can now be used to read -SMEM and use it to register an MTD layout according to its content. - -Signed-off-by: Mathieu Olivari -Signed-off-by: Ram Chandra Jangir ---- - drivers/mtd/Kconfig | 7 ++ - drivers/mtd/Makefile | 1 + - drivers/mtd/qcom_smem_part.c | 228 +++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 236 insertions(+) - create mode 100644 drivers/mtd/qcom_smem_part.c - ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -194,6 +194,13 @@ config MTD_MYLOADER_PARTS - You will still need the parsing functions to be called by the driver - for your particular device. It won't happen automatically. - -+config MTD_QCOM_SMEM_PARTS -+ tristate "QCOM SMEM partitioning support" -+ depends on QCOM_SMEM -+ help -+ This provides partitions parser for QCOM devices using SMEM -+ such as IPQ806x. -+ - comment "User Modules And Translation Layers" - - # ---- /dev/null -+++ b/drivers/mtd/qcom_smem_part.c -@@ -0,0 +1,228 @@ -+/* -+ * Copyright (c) 2015, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+/* Processor/host identifier for the application processor */ -+#define SMEM_HOST_APPS 0 -+ -+/* SMEM items index */ -+#define SMEM_AARM_PARTITION_TABLE 9 -+#define SMEM_BOOT_FLASH_TYPE 421 -+#define SMEM_BOOT_FLASH_BLOCK_SIZE 424 -+ -+/* SMEM Flash types */ -+#define SMEM_FLASH_NAND 2 -+#define SMEM_FLASH_SPI 6 -+ -+#define SMEM_PART_NAME_SZ 16 -+#define SMEM_PARTS_MAX 32 -+ -+struct smem_partition { -+ char name[SMEM_PART_NAME_SZ]; -+ __le32 start; -+ __le32 size; -+ __le32 attr; -+}; -+ -+struct smem_partition_table { -+ u8 magic[8]; -+ __le32 version; -+ __le32 len; -+ struct smem_partition parts[SMEM_PARTS_MAX]; -+}; -+ -+/* SMEM Magic values in partition table */ -+static const u8 SMEM_PTABLE_MAGIC[] = { -+ 0xaa, 0x73, 0xee, 0x55, -+ 0xdb, 0xbd, 0x5e, 0xe3, -+}; -+ -+static int qcom_smem_get_flash_blksz(u64 **smem_blksz) -+{ -+ size_t size; -+ -+ *smem_blksz = qcom_smem_get(SMEM_HOST_APPS, SMEM_BOOT_FLASH_BLOCK_SIZE, -+ &size); -+ -+ if (IS_ERR(*smem_blksz)) { -+ pr_err("Unable to read flash blksz from SMEM\n"); -+ return -ENOENT; -+ } -+ -+ if (size != sizeof(**smem_blksz)) { -+ pr_err("Invalid flash blksz size in SMEM\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int qcom_smem_get_flash_type(u64 **smem_flash_type) -+{ -+ size_t size; -+ -+ *smem_flash_type = qcom_smem_get(SMEM_HOST_APPS, SMEM_BOOT_FLASH_TYPE, -+ &size); -+ -+ if (IS_ERR(*smem_flash_type)) { -+ pr_err("Unable to read flash type from SMEM\n"); -+ return -ENOENT; -+ } -+ -+ if (size != sizeof(**smem_flash_type)) { -+ pr_err("Invalid flash type size in SMEM\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int qcom_smem_get_flash_partitions(struct smem_partition_table **pparts) -+{ -+ size_t size; -+ -+ *pparts = qcom_smem_get(SMEM_HOST_APPS, SMEM_AARM_PARTITION_TABLE, -+ &size); -+ -+ if (IS_ERR(*pparts)) { -+ pr_err("Unable to read partition table from SMEM\n"); -+ return -ENOENT; -+ } -+ -+ return 0; -+} -+ -+static int of_dev_node_match(struct device *dev, void *data) -+{ -+ return dev->of_node == data; -+} -+ -+static bool is_spi_device(struct device_node *np) -+{ -+ struct device *dev; -+ -+ dev = bus_find_device(&spi_bus_type, NULL, np, of_dev_node_match); -+ if (!dev) -+ return false; -+ -+ put_device(dev); -+ return true; -+} -+ -+static int parse_qcom_smem_partitions(struct mtd_info *master, -+ const struct mtd_partition **pparts, -+ struct mtd_part_parser_data *data) -+{ -+ struct smem_partition_table *smem_parts; -+ u64 *smem_flash_type, *smem_blksz; -+ struct mtd_partition *mtd_parts; -+ struct device_node *of_node = master->dev.of_node; -+ int i, ret; -+ -+ /* -+ * SMEM will only store the partition table of the boot device. -+ * If this is not the boot device, do not return any partition. -+ */ -+ ret = qcom_smem_get_flash_type(&smem_flash_type); -+ if (ret < 0) -+ return ret; -+ -+ if ((*smem_flash_type == SMEM_FLASH_NAND && !mtd_type_is_nand(master)) -+ || (*smem_flash_type == SMEM_FLASH_SPI && !is_spi_device(of_node))) -+ return 0; -+ -+ /* -+ * Just for sanity purpose, make sure the block size in SMEM matches the -+ * block size of the MTD device -+ */ -+ ret = qcom_smem_get_flash_blksz(&smem_blksz); -+ if (ret < 0) -+ return ret; -+ -+ if (*smem_blksz != master->erasesize) { -+ pr_err("SMEM block size differs from MTD block size\n"); -+ return -EINVAL; -+ } -+ -+ /* Get partition pointer from SMEM */ -+ ret = qcom_smem_get_flash_partitions(&smem_parts); -+ if (ret < 0) -+ return ret; -+ -+ if (memcmp(SMEM_PTABLE_MAGIC, smem_parts->magic, -+ sizeof(SMEM_PTABLE_MAGIC))) { -+ pr_err("SMEM partition magic invalid\n"); -+ return -EINVAL; -+ } -+ -+ /* Allocate and populate the mtd structures */ -+ mtd_parts = kcalloc(le32_to_cpu(smem_parts->len), sizeof(*mtd_parts), -+ GFP_KERNEL); -+ if (!mtd_parts) -+ return -ENOMEM; -+ -+ for (i = 0; i < smem_parts->len; i++) { -+ struct smem_partition *s_part = &smem_parts->parts[i]; -+ struct mtd_partition *m_part = &mtd_parts[i]; -+ -+ m_part->name = s_part->name; -+ m_part->size = le32_to_cpu(s_part->size) * (*smem_blksz); -+ m_part->offset = le32_to_cpu(s_part->start) * (*smem_blksz); -+ -+ /* -+ * The last SMEM partition may have its size marked as -+ * something like 0xffffffff, which means "until the end of the -+ * flash device". In this case, truncate it. -+ */ -+ if (m_part->offset + m_part->size > master->size) -+ m_part->size = master->size - m_part->offset; -+ } -+ -+ *pparts = mtd_parts; -+ -+ return smem_parts->len; -+} -+ -+static struct mtd_part_parser qcom_smem_parser = { -+ .owner = THIS_MODULE, -+ .parse_fn = parse_qcom_smem_partitions, -+ .name = "qcom-smem", -+}; -+ -+static int __init qcom_smem_parser_init(void) -+{ -+ register_mtd_parser(&qcom_smem_parser); -+ return 0; -+} -+ -+static void __exit qcom_smem_parser_exit(void) -+{ -+ deregister_mtd_parser(&qcom_smem_parser); -+} -+ -+module_init(qcom_smem_parser_init); -+module_exit(qcom_smem_parser_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Mathieu Olivari "); -+MODULE_DESCRIPTION("Parsing code for SMEM based partition tables"); ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o - obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63xxpart.o - obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o - obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o -+obj-$(CONFIG_MTD_QCOM_SMEM_PARTS) += qcom_smem_part.o - obj-y += parsers/ - - # 'Users' - code which presents functionality to userspace. diff --git a/target/linux/ipq40xx/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch b/target/linux/ipq40xx/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch deleted file mode 100644 index bd777858e..000000000 --- a/target/linux/ipq40xx/patches-4.9/0032-phy-add-qcom-dwc3-phy.patch +++ /dev/null @@ -1,617 +0,0 @@ -From b9004f4fd23e4c614d71c972f3a9311665480e29 Mon Sep 17 00:00:00 2001 -From: Andy Gross -Date: Thu, 9 Mar 2017 08:19:18 +0100 -Subject: [PATCH 32/69] phy: add qcom dwc3 phy - -Signed-off-by: Andy Gross ---- - drivers/phy/Kconfig | 12 + - drivers/phy/Makefile | 1 + - drivers/phy/phy-qcom-dwc3.c | 575 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 588 insertions(+) - create mode 100644 drivers/phy/phy-qcom-dwc3.c - ---- a/drivers/phy/Kconfig -+++ b/drivers/phy/Kconfig -@@ -490,4 +490,16 @@ config PHY_NS2_PCIE - help - Enable this to support the Broadcom Northstar2 PCIe PHY. - If unsure, say N. -+ -+config PHY_QCOM_DWC3 -+ tristate "QCOM DWC3 USB PHY support" -+ depends on ARCH_QCOM -+ depends on HAS_IOMEM -+ depends on OF -+ select GENERIC_PHY -+ help -+ This option enables support for the Synopsis PHYs present inside the -+ Qualcomm USB3.0 DWC3 controller. This driver supports both HS and SS -+ PHY controllers. -+ - endmenu ---- a/drivers/phy/Makefile -+++ b/drivers/phy/Makefile -@@ -60,3 +60,4 @@ obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o - obj-$(CONFIG_PHY_CYGNUS_PCIE) += phy-bcm-cygnus-pcie.o - obj-$(CONFIG_ARCH_TEGRA) += tegra/ - obj-$(CONFIG_PHY_NS2_PCIE) += phy-bcm-ns2-pcie.o -+obj-$(CONFIG_PHY_QCOM_DWC3) += phy-qcom-dwc3.o ---- /dev/null -+++ b/drivers/phy/phy-qcom-dwc3.c -@@ -0,0 +1,575 @@ -+/* Copyright (c) 2014-2015, Code Aurora Forum. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+* This program is distributed in the hope that it will be useful, -+* but WITHOUT ANY WARRANTY; without even the implied warranty of -+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+* GNU General Public License for more details. -+*/ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/** -+ * USB QSCRATCH Hardware registers -+ */ -+#define QSCRATCH_GENERAL_CFG (0x08) -+#define HSUSB_PHY_CTRL_REG (0x10) -+ -+/* PHY_CTRL_REG */ -+#define HSUSB_CTRL_DMSEHV_CLAMP BIT(24) -+#define HSUSB_CTRL_USB2_SUSPEND BIT(23) -+#define HSUSB_CTRL_UTMI_CLK_EN BIT(21) -+#define HSUSB_CTRL_UTMI_OTG_VBUS_VALID BIT(20) -+#define HSUSB_CTRL_USE_CLKCORE BIT(18) -+#define HSUSB_CTRL_DPSEHV_CLAMP BIT(17) -+#define HSUSB_CTRL_COMMONONN BIT(11) -+#define HSUSB_CTRL_ID_HV_CLAMP BIT(9) -+#define HSUSB_CTRL_OTGSESSVLD_CLAMP BIT(8) -+#define HSUSB_CTRL_CLAMP_EN BIT(7) -+#define HSUSB_CTRL_RETENABLEN BIT(1) -+#define HSUSB_CTRL_POR BIT(0) -+ -+/* QSCRATCH_GENERAL_CFG */ -+#define HSUSB_GCFG_XHCI_REV BIT(2) -+ -+/** -+ * USB QSCRATCH Hardware registers -+ */ -+#define SSUSB_PHY_CTRL_REG (0x00) -+#define SSUSB_PHY_PARAM_CTRL_1 (0x04) -+#define SSUSB_PHY_PARAM_CTRL_2 (0x08) -+#define CR_PROTOCOL_DATA_IN_REG (0x0c) -+#define CR_PROTOCOL_DATA_OUT_REG (0x10) -+#define CR_PROTOCOL_CAP_ADDR_REG (0x14) -+#define CR_PROTOCOL_CAP_DATA_REG (0x18) -+#define CR_PROTOCOL_READ_REG (0x1c) -+#define CR_PROTOCOL_WRITE_REG (0x20) -+ -+/* PHY_CTRL_REG */ -+#define SSUSB_CTRL_REF_USE_PAD BIT(28) -+#define SSUSB_CTRL_TEST_POWERDOWN BIT(27) -+#define SSUSB_CTRL_LANE0_PWR_PRESENT BIT(24) -+#define SSUSB_CTRL_SS_PHY_EN BIT(8) -+#define SSUSB_CTRL_SS_PHY_RESET BIT(7) -+ -+/* SSPHY control registers */ -+#define SSPHY_CTRL_RX_OVRD_IN_HI(lane) (0x1006 + 0x100 * lane) -+#define SSPHY_CTRL_TX_OVRD_DRV_LO(lane) (0x1002 + 0x100 * lane) -+ -+/* SSPHY SoC version specific values */ -+#define SSPHY_RX_EQ_VALUE 4 /* Override value for rx_eq */ -+#define SSPHY_TX_DEEMPH_3_5DB 23 /* Override value for transmit -+ preemphasis */ -+#define SSPHY_MPLL_VALUE 0 /* Override value for mpll */ -+ -+/* QSCRATCH PHY_PARAM_CTRL1 fields */ -+#define PHY_PARAM_CTRL1_TX_FULL_SWING_MASK 0x07f00000u -+#define PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK 0x000fc000u -+#define PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK 0x00003f00u -+#define PHY_PARAM_CTRL1_LOS_BIAS_MASK 0x000000f8u -+ -+#define PHY_PARAM_CTRL1_MASK \ -+ (PHY_PARAM_CTRL1_TX_FULL_SWING_MASK | \ -+ PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK | \ -+ PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK | \ -+ PHY_PARAM_CTRL1_LOS_BIAS_MASK) -+ -+#define PHY_PARAM_CTRL1_TX_FULL_SWING(x) \ -+ (((x) << 20) & PHY_PARAM_CTRL1_TX_FULL_SWING_MASK) -+#define PHY_PARAM_CTRL1_TX_DEEMPH_6DB(x) \ -+ (((x) << 14) & PHY_PARAM_CTRL1_TX_DEEMPH_6DB_MASK) -+#define PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB(x) \ -+ (((x) << 8) & PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB_MASK) -+#define PHY_PARAM_CTRL1_LOS_BIAS(x) \ -+ (((x) << 3) & PHY_PARAM_CTRL1_LOS_BIAS_MASK) -+ -+/* RX OVRD IN HI bits */ -+#define RX_OVRD_IN_HI_RX_RESET_OVRD BIT(13) -+#define RX_OVRD_IN_HI_RX_RX_RESET BIT(12) -+#define RX_OVRD_IN_HI_RX_EQ_OVRD BIT(11) -+#define RX_OVRD_IN_HI_RX_EQ_MASK 0x0700 -+#define RX_OVRD_IN_HI_RX_EQ_SHIFT 8 -+#define RX_OVRD_IN_HI_RX_EQ_EN_OVRD BIT(7) -+#define RX_OVRD_IN_HI_RX_EQ_EN BIT(6) -+#define RX_OVRD_IN_HI_RX_LOS_FILTER_OVRD BIT(5) -+#define RX_OVRD_IN_HI_RX_LOS_FILTER_MASK 0x0018 -+#define RX_OVRD_IN_HI_RX_RATE_OVRD BIT(2) -+#define RX_OVRD_IN_HI_RX_RATE_MASK 0x0003 -+ -+/* TX OVRD DRV LO register bits */ -+#define TX_OVRD_DRV_LO_AMPLITUDE_MASK 0x007F -+#define TX_OVRD_DRV_LO_PREEMPH_MASK 0x3F80 -+#define TX_OVRD_DRV_LO_PREEMPH_SHIFT 7 -+#define TX_OVRD_DRV_LO_EN BIT(14) -+ -+/* SS CAP register bits */ -+#define SS_CR_CAP_ADDR_REG BIT(0) -+#define SS_CR_CAP_DATA_REG BIT(0) -+#define SS_CR_READ_REG BIT(0) -+#define SS_CR_WRITE_REG BIT(0) -+ -+struct qcom_dwc3_usb_phy { -+ void __iomem *base; -+ struct device *dev; -+ struct clk *xo_clk; -+ struct clk *ref_clk; -+ u32 rx_eq; -+ u32 tx_deamp_3_5db; -+ u32 mpll; -+}; -+ -+struct qcom_dwc3_phy_drvdata { -+ struct phy_ops ops; -+ u32 clk_rate; -+}; -+ -+/** -+ * Write register and read back masked value to confirm it is written -+ * -+ * @base - QCOM DWC3 PHY base virtual address. -+ * @offset - register offset. -+ * @mask - register bitmask specifying what should be updated -+ * @val - value to write. -+ */ -+static inline void qcom_dwc3_phy_write_readback( -+ struct qcom_dwc3_usb_phy *phy_dwc3, u32 offset, -+ const u32 mask, u32 val) -+{ -+ u32 write_val, tmp = readl(phy_dwc3->base + offset); -+ -+ tmp &= ~mask; /* retain other bits */ -+ write_val = tmp | val; -+ -+ writel(write_val, phy_dwc3->base + offset); -+ -+ /* Read back to see if val was written */ -+ tmp = readl(phy_dwc3->base + offset); -+ tmp &= mask; /* clear other bits */ -+ -+ if (tmp != val) -+ dev_err(phy_dwc3->dev, "write: %x to QSCRATCH: %x FAILED\n", -+ val, offset); -+} -+ -+static int wait_for_latch(void __iomem *addr) -+{ -+ u32 retry = 10; -+ -+ while (true) { -+ if (!readl(addr)) -+ break; -+ -+ if (--retry == 0) -+ return -ETIMEDOUT; -+ -+ usleep_range(10, 20); -+ } -+ -+ return 0; -+} -+ -+/** -+ * Write SSPHY register -+ * -+ * @base - QCOM DWC3 PHY base virtual address. -+ * @addr - SSPHY address to write. -+ * @val - value to write. -+ */ -+static int qcom_dwc3_ss_write_phycreg(struct qcom_dwc3_usb_phy *phy_dwc3, -+ u32 addr, u32 val) -+{ -+ int ret; -+ -+ writel(addr, phy_dwc3->base + CR_PROTOCOL_DATA_IN_REG); -+ writel(SS_CR_CAP_ADDR_REG, phy_dwc3->base + CR_PROTOCOL_CAP_ADDR_REG); -+ -+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_CAP_ADDR_REG); -+ if (ret) -+ goto err_wait; -+ -+ writel(val, phy_dwc3->base + CR_PROTOCOL_DATA_IN_REG); -+ writel(SS_CR_CAP_DATA_REG, phy_dwc3->base + CR_PROTOCOL_CAP_DATA_REG); -+ -+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_CAP_DATA_REG); -+ if (ret) -+ goto err_wait; -+ -+ writel(SS_CR_WRITE_REG, phy_dwc3->base + CR_PROTOCOL_WRITE_REG); -+ -+ ret = wait_for_latch(phy_dwc3->base + CR_PROTOCOL_WRITE_REG); -+ -+err_wait: -+ if (ret) -+ dev_err(phy_dwc3->dev, "timeout waiting for latch\n"); -+ return ret; -+} -+ -+/** -+ * Read SSPHY register. -+ * -+ * @base - QCOM DWC3 PHY base virtual address. -+ * @addr - SSPHY address to read. -+ */ -+static int qcom_dwc3_ss_read_phycreg(void __iomem *base, u32 addr, u32 *val) -+{ -+ int ret; -+ -+ writel(addr, base + CR_PROTOCOL_DATA_IN_REG); -+ writel(SS_CR_CAP_ADDR_REG, base + CR_PROTOCOL_CAP_ADDR_REG); -+ -+ ret = wait_for_latch(base + CR_PROTOCOL_CAP_ADDR_REG); -+ if (ret) -+ goto err_wait; -+ -+ /* -+ * Due to hardware bug, first read of SSPHY register might be -+ * incorrect. Hence as workaround, SW should perform SSPHY register -+ * read twice, but use only second read and ignore first read. -+ */ -+ writel(SS_CR_READ_REG, base + CR_PROTOCOL_READ_REG); -+ -+ ret = wait_for_latch(base + CR_PROTOCOL_READ_REG); -+ if (ret) -+ goto err_wait; -+ -+ /* throwaway read */ -+ readl(base + CR_PROTOCOL_DATA_OUT_REG); -+ -+ writel(SS_CR_READ_REG, base + CR_PROTOCOL_READ_REG); -+ -+ ret = wait_for_latch(base + CR_PROTOCOL_READ_REG); -+ if (ret) -+ goto err_wait; -+ -+ *val = readl(base + CR_PROTOCOL_DATA_OUT_REG); -+ -+err_wait: -+ return ret; -+} -+ -+static int qcom_dwc3_hs_phy_init(struct phy *phy) -+{ -+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy); -+ int ret; -+ u32 val; -+ -+ ret = clk_prepare_enable(phy_dwc3->xo_clk); -+ if (ret) -+ return ret; -+ -+ ret = clk_prepare_enable(phy_dwc3->ref_clk); -+ if (ret) { -+ clk_disable_unprepare(phy_dwc3->xo_clk); -+ return ret; -+ } -+ -+ /* -+ * HSPHY Initialization: Enable UTMI clock, select 19.2MHz fsel -+ * enable clamping, and disable RETENTION (power-on default is ENABLED) -+ */ -+ val = HSUSB_CTRL_DPSEHV_CLAMP | HSUSB_CTRL_DMSEHV_CLAMP | -+ HSUSB_CTRL_RETENABLEN | HSUSB_CTRL_COMMONONN | -+ HSUSB_CTRL_OTGSESSVLD_CLAMP | HSUSB_CTRL_ID_HV_CLAMP | -+ HSUSB_CTRL_DPSEHV_CLAMP | HSUSB_CTRL_UTMI_OTG_VBUS_VALID | -+ HSUSB_CTRL_UTMI_CLK_EN | HSUSB_CTRL_CLAMP_EN | 0x70; -+ -+ /* use core clock if external reference is not present */ -+ if (!phy_dwc3->xo_clk) -+ val |= HSUSB_CTRL_USE_CLKCORE; -+ -+ writel(val, phy_dwc3->base + HSUSB_PHY_CTRL_REG); -+ usleep_range(2000, 2200); -+ -+ /* Disable (bypass) VBUS and ID filters */ -+ writel(HSUSB_GCFG_XHCI_REV, phy_dwc3->base + QSCRATCH_GENERAL_CFG); -+ -+ return 0; -+} -+ -+static int qcom_dwc3_hs_phy_exit(struct phy *phy) -+{ -+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy); -+ -+ clk_disable_unprepare(phy_dwc3->ref_clk); -+ clk_disable_unprepare(phy_dwc3->xo_clk); -+ -+ return 0; -+} -+ -+static int qcom_dwc3_ss_phy_init(struct phy *phy) -+{ -+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy); -+ int ret; -+ u32 data = 0; -+ -+ ret = clk_prepare_enable(phy_dwc3->xo_clk); -+ if (ret) -+ return ret; -+ -+ ret = clk_prepare_enable(phy_dwc3->ref_clk); -+ if (ret) { -+ clk_disable_unprepare(phy_dwc3->xo_clk); -+ return ret; -+ } -+ -+ /* reset phy */ -+ data = readl(phy_dwc3->base + SSUSB_PHY_CTRL_REG); -+ writel(data | SSUSB_CTRL_SS_PHY_RESET, -+ phy_dwc3->base + SSUSB_PHY_CTRL_REG); -+ usleep_range(2000, 2200); -+ writel(data, phy_dwc3->base + SSUSB_PHY_CTRL_REG); -+ -+ /* clear REF_PAD if we don't have XO clk */ -+ if (!phy_dwc3->xo_clk) -+ data &= ~SSUSB_CTRL_REF_USE_PAD; -+ else -+ data |= SSUSB_CTRL_REF_USE_PAD; -+ -+ writel(data, phy_dwc3->base + SSUSB_PHY_CTRL_REG); -+ -+ /* wait for ref clk to become stable, this can take up to 30ms */ -+ msleep(30); -+ -+ data |= SSUSB_CTRL_SS_PHY_EN | SSUSB_CTRL_LANE0_PWR_PRESENT; -+ writel(data, phy_dwc3->base + SSUSB_PHY_CTRL_REG); -+ -+ /* -+ * WORKAROUND: There is SSPHY suspend bug due to which USB enumerates -+ * in HS mode instead of SS mode. Workaround it by asserting -+ * LANE0.TX_ALT_BLOCK.EN_ALT_BUS to enable TX to use alt bus mode -+ */ -+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base, 0x102D, &data); -+ if (ret) -+ goto err_phy_trans; -+ -+ data |= (1 << 7); -+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3, 0x102D, data); -+ if (ret) -+ goto err_phy_trans; -+ -+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base, 0x1010, &data); -+ if (ret) -+ goto err_phy_trans; -+ -+ data &= ~0xff0; -+ data |= 0x20; -+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3, 0x1010, data); -+ if (ret) -+ goto err_phy_trans; -+ -+ /* -+ * Fix RX Equalization setting as follows -+ * LANE0.RX_OVRD_IN_HI. RX_EQ_EN set to 0 -+ * LANE0.RX_OVRD_IN_HI.RX_EQ_EN_OVRD set to 1 -+ * LANE0.RX_OVRD_IN_HI.RX_EQ set based on SoC version -+ * LANE0.RX_OVRD_IN_HI.RX_EQ_OVRD set to 1 -+ */ -+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base, -+ SSPHY_CTRL_RX_OVRD_IN_HI(0), &data); -+ if (ret) -+ goto err_phy_trans; -+ -+ data &= ~RX_OVRD_IN_HI_RX_EQ_EN; -+ data |= RX_OVRD_IN_HI_RX_EQ_EN_OVRD; -+ data &= ~RX_OVRD_IN_HI_RX_EQ_MASK; -+ data |= phy_dwc3->rx_eq << RX_OVRD_IN_HI_RX_EQ_SHIFT; -+ data |= RX_OVRD_IN_HI_RX_EQ_OVRD; -+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3, -+ SSPHY_CTRL_RX_OVRD_IN_HI(0), data); -+ if (ret) -+ goto err_phy_trans; -+ -+ /* -+ * Set EQ and TX launch amplitudes as follows -+ * LANE0.TX_OVRD_DRV_LO.PREEMPH set based on SoC version -+ * LANE0.TX_OVRD_DRV_LO.AMPLITUDE set to 110 -+ * LANE0.TX_OVRD_DRV_LO.EN set to 1. -+ */ -+ ret = qcom_dwc3_ss_read_phycreg(phy_dwc3->base, -+ SSPHY_CTRL_TX_OVRD_DRV_LO(0), &data); -+ if (ret) -+ goto err_phy_trans; -+ -+ data &= ~TX_OVRD_DRV_LO_PREEMPH_MASK; -+ data |= phy_dwc3->tx_deamp_3_5db << TX_OVRD_DRV_LO_PREEMPH_SHIFT; -+ data &= ~TX_OVRD_DRV_LO_AMPLITUDE_MASK; -+ data |= 0x6E; -+ data |= TX_OVRD_DRV_LO_EN; -+ ret = qcom_dwc3_ss_write_phycreg(phy_dwc3, -+ SSPHY_CTRL_TX_OVRD_DRV_LO(0), data); -+ if (ret) -+ goto err_phy_trans; -+ -+ qcom_dwc3_ss_write_phycreg(phy_dwc3, 0x30, phy_dwc3->mpll); -+ -+ /* -+ * Set the QSCRATCH PHY_PARAM_CTRL1 parameters as follows -+ * TX_FULL_SWING [26:20] amplitude to 110 -+ * TX_DEEMPH_6DB [19:14] to 32 -+ * TX_DEEMPH_3_5DB [13:8] set based on SoC version -+ * LOS_BIAS [7:3] to 9 -+ */ -+ data = readl(phy_dwc3->base + SSUSB_PHY_PARAM_CTRL_1); -+ -+ data &= ~PHY_PARAM_CTRL1_MASK; -+ -+ data |= PHY_PARAM_CTRL1_TX_FULL_SWING(0x6e) | -+ PHY_PARAM_CTRL1_TX_DEEMPH_6DB(0x20) | -+ PHY_PARAM_CTRL1_TX_DEEMPH_3_5DB(phy_dwc3->tx_deamp_3_5db) | -+ PHY_PARAM_CTRL1_LOS_BIAS(0x9); -+ -+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_PARAM_CTRL_1, -+ PHY_PARAM_CTRL1_MASK, data); -+ -+err_phy_trans: -+ return ret; -+} -+ -+static int qcom_dwc3_ss_phy_exit(struct phy *phy) -+{ -+ struct qcom_dwc3_usb_phy *phy_dwc3 = phy_get_drvdata(phy); -+ -+ /* Sequence to put SSPHY in low power state: -+ * 1. Clear REF_PHY_EN in PHY_CTRL_REG -+ * 2. Clear REF_USE_PAD in PHY_CTRL_REG -+ * 3. Set TEST_POWERED_DOWN in PHY_CTRL_REG to enable PHY retention -+ */ -+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG, -+ SSUSB_CTRL_SS_PHY_EN, 0x0); -+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG, -+ SSUSB_CTRL_REF_USE_PAD, 0x0); -+ qcom_dwc3_phy_write_readback(phy_dwc3, SSUSB_PHY_CTRL_REG, -+ SSUSB_CTRL_TEST_POWERDOWN, 0x0); -+ -+ clk_disable_unprepare(phy_dwc3->ref_clk); -+ clk_disable_unprepare(phy_dwc3->xo_clk); -+ -+ return 0; -+} -+ -+static const struct qcom_dwc3_phy_drvdata qcom_dwc3_hs_drvdata = { -+ .ops = { -+ .init = qcom_dwc3_hs_phy_init, -+ .exit = qcom_dwc3_hs_phy_exit, -+ .owner = THIS_MODULE, -+ }, -+ .clk_rate = 60000000, -+}; -+ -+static const struct qcom_dwc3_phy_drvdata qcom_dwc3_ss_drvdata = { -+ .ops = { -+ .init = qcom_dwc3_ss_phy_init, -+ .exit = qcom_dwc3_ss_phy_exit, -+ .owner = THIS_MODULE, -+ }, -+ .clk_rate = 125000000, -+}; -+ -+static const struct of_device_id qcom_dwc3_phy_table[] = { -+ { .compatible = "qcom,dwc3-hs-usb-phy", .data = &qcom_dwc3_hs_drvdata }, -+ { .compatible = "qcom,dwc3-ss-usb-phy", .data = &qcom_dwc3_ss_drvdata }, -+ { /* Sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, qcom_dwc3_phy_table); -+ -+static int qcom_dwc3_phy_probe(struct platform_device *pdev) -+{ -+ struct qcom_dwc3_usb_phy *phy_dwc3; -+ struct phy_provider *phy_provider; -+ struct phy *generic_phy; -+ struct resource *res; -+ const struct of_device_id *match; -+ const struct qcom_dwc3_phy_drvdata *data; -+ struct device_node *np; -+ -+ phy_dwc3 = devm_kzalloc(&pdev->dev, sizeof(*phy_dwc3), GFP_KERNEL); -+ if (!phy_dwc3) -+ return -ENOMEM; -+ -+ match = of_match_node(qcom_dwc3_phy_table, pdev->dev.of_node); -+ data = match->data; -+ -+ phy_dwc3->dev = &pdev->dev; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ phy_dwc3->base = devm_ioremap_resource(phy_dwc3->dev, res); -+ if (IS_ERR(phy_dwc3->base)) -+ return PTR_ERR(phy_dwc3->base); -+ -+ phy_dwc3->ref_clk = devm_clk_get(phy_dwc3->dev, "ref"); -+ if (IS_ERR(phy_dwc3->ref_clk)) { -+ dev_dbg(phy_dwc3->dev, "cannot get reference clock\n"); -+ return PTR_ERR(phy_dwc3->ref_clk); -+ } -+ -+ clk_set_rate(phy_dwc3->ref_clk, data->clk_rate); -+ -+ phy_dwc3->xo_clk = devm_clk_get(phy_dwc3->dev, "xo"); -+ if (IS_ERR(phy_dwc3->xo_clk)) { -+ dev_dbg(phy_dwc3->dev, "cannot get TCXO clock\n"); -+ phy_dwc3->xo_clk = NULL; -+ } -+ -+ /* Parse device node to probe HSIO settings */ -+ np = of_node_get(pdev->dev.of_node); -+ if (!of_compat_cmp(match->compatible, "qcom,dwc3-ss-usb-phy", -+ strlen(match->compatible))) { -+ -+ if (of_property_read_u32(np, "rx_eq", &phy_dwc3->rx_eq) || -+ of_property_read_u32(np, "tx_deamp_3_5db", -+ &phy_dwc3->tx_deamp_3_5db) || -+ of_property_read_u32(np, "mpll", &phy_dwc3->mpll)) { -+ -+ dev_err(phy_dwc3->dev, "cannot get HSIO settings from device node, using default values\n"); -+ -+ /* Default HSIO settings */ -+ phy_dwc3->rx_eq = SSPHY_RX_EQ_VALUE; -+ phy_dwc3->tx_deamp_3_5db = SSPHY_TX_DEEMPH_3_5DB; -+ phy_dwc3->mpll = SSPHY_MPLL_VALUE; -+ } -+ } -+ -+ generic_phy = devm_phy_create(phy_dwc3->dev, pdev->dev.of_node, -+ &data->ops); -+ -+ if (IS_ERR(generic_phy)) -+ return PTR_ERR(generic_phy); -+ -+ phy_set_drvdata(generic_phy, phy_dwc3); -+ platform_set_drvdata(pdev, phy_dwc3); -+ -+ phy_provider = devm_of_phy_provider_register(phy_dwc3->dev, -+ of_phy_simple_xlate); -+ -+ if (IS_ERR(phy_provider)) -+ return PTR_ERR(phy_provider); -+ -+ return 0; -+} -+ -+static struct platform_driver qcom_dwc3_phy_driver = { -+ .probe = qcom_dwc3_phy_probe, -+ .driver = { -+ .name = "qcom-dwc3-usb-phy", -+ .owner = THIS_MODULE, -+ .of_match_table = qcom_dwc3_phy_table, -+ }, -+}; -+ -+module_platform_driver(qcom_dwc3_phy_driver); -+ -+MODULE_ALIAS("platform:phy-qcom-dwc3"); -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Andy Gross "); -+MODULE_AUTHOR("Ivan T. Ivanov "); -+MODULE_DESCRIPTION("DesignWare USB3 QCOM PHY driver"); diff --git a/target/linux/ipq40xx/patches-4.9/0033-ARM-qcom-automatically-select-PCI_DOMAINS-if-PCI-is-.patch b/target/linux/ipq40xx/patches-4.9/0033-ARM-qcom-automatically-select-PCI_DOMAINS-if-PCI-is-.patch deleted file mode 100644 index a6c7953aa..000000000 --- a/target/linux/ipq40xx/patches-4.9/0033-ARM-qcom-automatically-select-PCI_DOMAINS-if-PCI-is-.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 48051ece78136e4235a2415a52797db56f8a4478 Mon Sep 17 00:00:00 2001 -From: Mathieu Olivari -Date: Tue, 21 Apr 2015 19:09:07 -0700 -Subject: [PATCH 33/69] ARM: qcom: automatically select PCI_DOMAINS if PCI is - enabled - -If multiple PCIe devices are present in the system, the kernel will -panic at boot time when trying to scan the PCI buses. This happens on -IPQ806x based platforms, which has 3 PCIe ports. - -Enabling this option allows the kernel to assign the pci-domains -according to the device-tree content. This allows multiple PCIe -controllers to coexist in the system. - -Signed-off-by: Mathieu Olivari ---- - arch/arm/mach-qcom/Kconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/mach-qcom/Kconfig -+++ b/arch/arm/mach-qcom/Kconfig -@@ -6,6 +6,7 @@ menuconfig ARCH_QCOM - select ARM_AMBA - select PINCTRL - select QCOM_SCM if SMP -+ select PCI_DOMAINS if PCI - help - Support for Qualcomm's devicetree based systems. - diff --git a/target/linux/ipq40xx/patches-4.9/0034-ARM-Add-Krait-L2-register-accessor-functions.patch b/target/linux/ipq40xx/patches-4.9/0034-ARM-Add-Krait-L2-register-accessor-functions.patch deleted file mode 100644 index 019170b6d..000000000 --- a/target/linux/ipq40xx/patches-4.9/0034-ARM-Add-Krait-L2-register-accessor-functions.patch +++ /dev/null @@ -1,147 +0,0 @@ -From patchwork Fri Dec 8 09:42:19 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,01/12] ARM: Add Krait L2 register accessor functions -From: Sricharan R -X-Patchwork-Id: 10102101 -Message-Id: <1512726150-7204-2-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org, Mark Rutland , - Russell King , - Courtney Cavin -Date: Fri, 8 Dec 2017 15:12:19 +0530 - -From: Stephen Boyd - -Krait CPUs have a handful of L2 cache controller registers that -live behind a cp15 based indirection register. First you program -the indirection register (l2cpselr) to point the L2 'window' -register (l2cpdr) at what you want to read/write. Then you -read/write the 'window' register to do what you want. The -l2cpselr register is not banked per-cpu so we must lock around -accesses to it to prevent other CPUs from re-pointing l2cpdr -underneath us. - -Cc: Mark Rutland -Cc: Russell King -Cc: Courtney Cavin -Signed-off-by: Stephen Boyd ---- - arch/arm/common/Kconfig | 3 ++ - arch/arm/common/Makefile | 1 + - arch/arm/common/krait-l2-accessors.c | 58 +++++++++++++++++++++++++++++++ - arch/arm/include/asm/krait-l2-accessors.h | 20 +++++++++++ - 4 files changed, 82 insertions(+) - create mode 100644 arch/arm/common/krait-l2-accessors.c - create mode 100644 arch/arm/include/asm/krait-l2-accessors.h - ---- a/arch/arm/common/Kconfig -+++ b/arch/arm/common/Kconfig -@@ -9,6 +9,9 @@ config DMABOUNCE - bool - select ZONE_DMA - -+config KRAIT_L2_ACCESSORS -+ bool -+ - config SHARP_LOCOMO - bool - ---- a/arch/arm/common/Makefile -+++ b/arch/arm/common/Makefile -@@ -7,6 +7,7 @@ obj-y += firmware.o - obj-$(CONFIG_ICST) += icst.o - obj-$(CONFIG_SA1111) += sa1111.o - obj-$(CONFIG_DMABOUNCE) += dmabounce.o -+obj-$(CONFIG_KRAIT_L2_ACCESSORS) += krait-l2-accessors.o - obj-$(CONFIG_SHARP_LOCOMO) += locomo.o - obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o - obj-$(CONFIG_SHARP_SCOOP) += scoop.o ---- /dev/null -+++ b/arch/arm/common/krait-l2-accessors.c -@@ -0,0 +1,58 @@ -+/* -+ * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+ -+static DEFINE_RAW_SPINLOCK(krait_l2_lock); -+ -+void krait_set_l2_indirect_reg(u32 addr, u32 val) -+{ -+ unsigned long flags; -+ -+ raw_spin_lock_irqsave(&krait_l2_lock, flags); -+ /* -+ * Select the L2 window by poking l2cpselr, then write to the window -+ * via l2cpdr. -+ */ -+ asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr)); -+ isb(); -+ asm volatile ("mcr p15, 3, %0, c15, c0, 7 @ l2cpdr" : : "r" (val)); -+ isb(); -+ -+ raw_spin_unlock_irqrestore(&krait_l2_lock, flags); -+} -+EXPORT_SYMBOL(krait_set_l2_indirect_reg); -+ -+u32 krait_get_l2_indirect_reg(u32 addr) -+{ -+ u32 val; -+ unsigned long flags; -+ -+ raw_spin_lock_irqsave(&krait_l2_lock, flags); -+ /* -+ * Select the L2 window by poking l2cpselr, then read from the window -+ * via l2cpdr. -+ */ -+ asm volatile ("mcr p15, 3, %0, c15, c0, 6 @ l2cpselr" : : "r" (addr)); -+ isb(); -+ asm volatile ("mrc p15, 3, %0, c15, c0, 7 @ l2cpdr" : "=r" (val)); -+ -+ raw_spin_unlock_irqrestore(&krait_l2_lock, flags); -+ -+ return val; -+} -+EXPORT_SYMBOL(krait_get_l2_indirect_reg); ---- /dev/null -+++ b/arch/arm/include/asm/krait-l2-accessors.h -@@ -0,0 +1,20 @@ -+/* -+ * Copyright (c) 2011-2013, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __ASMARM_KRAIT_L2_ACCESSORS_H -+#define __ASMARM_KRAIT_L2_ACCESSORS_H -+ -+extern void krait_set_l2_indirect_reg(u32 addr, u32 val); -+extern u32 krait_get_l2_indirect_reg(u32 addr); -+ -+#endif diff --git a/target/linux/ipq40xx/patches-4.9/0035-clk-mux-Split-out-register-accessors-for-reuse.patch b/target/linux/ipq40xx/patches-4.9/0035-clk-mux-Split-out-register-accessors-for-reuse.patch deleted file mode 100644 index 5a64e6c56..000000000 --- a/target/linux/ipq40xx/patches-4.9/0035-clk-mux-Split-out-register-accessors-for-reuse.patch +++ /dev/null @@ -1,195 +0,0 @@ -From patchwork Fri Dec 8 09:42:20 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,02/12] clk: mux: Split out register accessors for reuse -From: Sricharan R -X-Patchwork-Id: 10102103 -Message-Id: <1512726150-7204-3-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:20 +0530 - -From: Stephen Boyd - -We want to reuse the logic in clk-mux.c for other clock drivers -that don't use readl as register accessors. Fortunately, there -really isn't much to the mux code besides the table indirection -and quirk flags if you assume any bit shifting and masking has -been done already. Pull that logic out into reusable functions -that operate on an optional table and some flags so that other -drivers can use the same logic. - -Signed-off-by: Stephen Boyd ---- - drivers/clk/clk-mux.c | 75 +++++++++++++++++++++++++++----------------- - include/linux/clk-provider.h | 9 ++++-- - 2 files changed, 54 insertions(+), 30 deletions(-) - ---- a/drivers/clk/clk-mux.c -+++ b/drivers/clk/clk-mux.c -@@ -26,35 +26,24 @@ - * parent - parent is adjustable through clk_set_parent - */ - --static u8 clk_mux_get_parent(struct clk_hw *hw) -+unsigned int clk_mux_get_parent(struct clk_hw *hw, unsigned int val, -+ unsigned int *table, unsigned long flags) - { -- struct clk_mux *mux = to_clk_mux(hw); - int num_parents = clk_hw_get_num_parents(hw); -- u32 val; -- -- /* -- * FIXME need a mux-specific flag to determine if val is bitwise or numeric -- * e.g. sys_clkin_ck's clksel field is 3 bits wide, but ranges from 0x1 -- * to 0x7 (index starts at one) -- * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so -- * val = 0x4 really means "bit 2, index starts at bit 0" -- */ -- val = clk_readl(mux->reg) >> mux->shift; -- val &= mux->mask; - -- if (mux->table) { -+ if (table) { - int i; - - for (i = 0; i < num_parents; i++) -- if (mux->table[i] == val) -+ if (table[i] == val) - return i; - return -EINVAL; - } - -- if (val && (mux->flags & CLK_MUX_INDEX_BIT)) -+ if (val && (flags & CLK_MUX_INDEX_BIT)) - val = ffs(val) - 1; - -- if (val && (mux->flags & CLK_MUX_INDEX_ONE)) -+ if (val && (flags & CLK_MUX_INDEX_ONE)) - val--; - - if (val >= num_parents) -@@ -62,23 +51,53 @@ static u8 clk_mux_get_parent(struct clk_ - - return val; - } -+EXPORT_SYMBOL_GPL(clk_mux_get_parent); - --static int clk_mux_set_parent(struct clk_hw *hw, u8 index) -+static u8 _clk_mux_get_parent(struct clk_hw *hw) - { - struct clk_mux *mux = to_clk_mux(hw); - u32 val; -- unsigned long flags = 0; - -- if (mux->table) { -- index = mux->table[index]; -+ /* -+ * FIXME need a mux-specific flag to determine if val is bitwise or -+ * numeric e.g. sys_clkin_ck's clksel field is 3 bits wide, -+ * but ranges from 0x1 to 0x7 (index starts at one) -+ * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so -+ * val = 0x4 really means "bit 2, index starts at bit 0" -+ */ -+ val = clk_readl(mux->reg) >> mux->shift; -+ val &= mux->mask; -+ -+ return clk_mux_get_parent(hw, val, mux->table, mux->flags); -+} -+ -+unsigned int clk_mux_reindex(u8 index, unsigned int *table, -+ unsigned long flags) -+{ -+ unsigned int val = index; -+ -+ if (table) { -+ val = table[val]; - } else { -- if (mux->flags & CLK_MUX_INDEX_BIT) -- index = 1 << index; -+ if (flags & CLK_MUX_INDEX_BIT) -+ val = 1 << index; - -- if (mux->flags & CLK_MUX_INDEX_ONE) -- index++; -+ if (flags & CLK_MUX_INDEX_ONE) -+ val++; - } - -+ return val; -+} -+EXPORT_SYMBOL_GPL(clk_mux_reindex); -+ -+static int clk_mux_set_parent(struct clk_hw *hw, u8 index) -+{ -+ struct clk_mux *mux = to_clk_mux(hw); -+ u32 val; -+ unsigned long flags = 0; -+ -+ index = clk_mux_reindex(index, mux->table, mux->flags); -+ - if (mux->lock) - spin_lock_irqsave(mux->lock, flags); - else -@@ -102,14 +121,14 @@ static int clk_mux_set_parent(struct clk - } - - const struct clk_ops clk_mux_ops = { -- .get_parent = clk_mux_get_parent, -+ .get_parent = _clk_mux_get_parent, - .set_parent = clk_mux_set_parent, - .determine_rate = __clk_mux_determine_rate, - }; - EXPORT_SYMBOL_GPL(clk_mux_ops); - - const struct clk_ops clk_mux_ro_ops = { -- .get_parent = clk_mux_get_parent, -+ .get_parent = _clk_mux_get_parent, - }; - EXPORT_SYMBOL_GPL(clk_mux_ro_ops); - -@@ -117,7 +136,7 @@ struct clk_hw *clk_hw_register_mux_table - const char * const *parent_names, u8 num_parents, - unsigned long flags, - void __iomem *reg, u8 shift, u32 mask, -- u8 clk_mux_flags, u32 *table, spinlock_t *lock) -+ u8 clk_mux_flags, unsigned int *table, spinlock_t *lock) - { - struct clk_mux *mux; - struct clk_hw *hw; ---- a/include/linux/clk-provider.h -+++ b/include/linux/clk-provider.h -@@ -466,7 +466,7 @@ void clk_hw_unregister_divider(struct cl - struct clk_mux { - struct clk_hw hw; - void __iomem *reg; -- u32 *table; -+ unsigned int *table; - u32 mask; - u8 shift; - u8 flags; -@@ -484,6 +484,11 @@ struct clk_mux { - extern const struct clk_ops clk_mux_ops; - extern const struct clk_ops clk_mux_ro_ops; - -+unsigned int clk_mux_get_parent(struct clk_hw *hw, unsigned int val, -+ unsigned int *table, unsigned long flags); -+unsigned int clk_mux_reindex(u8 index, unsigned int *table, -+ unsigned long flags); -+ - struct clk *clk_register_mux(struct device *dev, const char *name, - const char * const *parent_names, u8 num_parents, - unsigned long flags, -@@ -504,7 +509,7 @@ struct clk_hw *clk_hw_register_mux_table - const char * const *parent_names, u8 num_parents, - unsigned long flags, - void __iomem *reg, u8 shift, u32 mask, -- u8 clk_mux_flags, u32 *table, spinlock_t *lock); -+ u8 clk_mux_flags, unsigned int *table, spinlock_t *lock); - - void clk_unregister_mux(struct clk *clk); - void clk_hw_unregister_mux(struct clk_hw *hw); diff --git a/target/linux/ipq40xx/patches-4.9/0038-clk-qcom-Add-support-for-High-Frequency-PLLs-HFPLLs.patch b/target/linux/ipq40xx/patches-4.9/0038-clk-qcom-Add-support-for-High-Frequency-PLLs-HFPLLs.patch deleted file mode 100644 index 70926143e..000000000 --- a/target/linux/ipq40xx/patches-4.9/0038-clk-qcom-Add-support-for-High-Frequency-PLLs-HFPLLs.patch +++ /dev/null @@ -1,352 +0,0 @@ -From patchwork Fri Dec 8 09:42:21 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,03/12] clk: qcom: Add support for High-Frequency PLLs (HFPLLs) -From: Sricharan R -X-Patchwork-Id: 10102083 -Message-Id: <1512726150-7204-4-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:21 +0530 - -From: Stephen Boyd - -HFPLLs are the main frequency source for Krait CPU clocks. Add -support for changing the rate of these PLLs. - -Signed-off-by: Stephen Boyd ---- - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/clk-hfpll.c | 253 +++++++++++++++++++++++++++++++++++++++++++ - drivers/clk/qcom/clk-hfpll.h | 54 +++++++++ - 3 files changed, 308 insertions(+) - create mode 100644 drivers/clk/qcom/clk-hfpll.c - create mode 100644 drivers/clk/qcom/clk-hfpll.h - ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -9,6 +9,7 @@ clk-qcom-y += clk-rcg2.o - clk-qcom-y += clk-branch.o - clk-qcom-y += clk-regmap-divider.o - clk-qcom-y += clk-regmap-mux.o -+clk-qcom-y += clk-hfpll.o - clk-qcom-y += reset.o - clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o - ---- /dev/null -+++ b/drivers/clk/qcom/clk-hfpll.c -@@ -0,0 +1,253 @@ -+/* -+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "clk-regmap.h" -+#include "clk-hfpll.h" -+ -+#define PLL_OUTCTRL BIT(0) -+#define PLL_BYPASSNL BIT(1) -+#define PLL_RESET_N BIT(2) -+ -+/* Initialize a HFPLL at a given rate and enable it. */ -+static void __clk_hfpll_init_once(struct clk_hw *hw) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ -+ if (likely(h->init_done)) -+ return; -+ -+ /* Configure PLL parameters for integer mode. */ -+ if (hd->config_val) -+ regmap_write(regmap, hd->config_reg, hd->config_val); -+ regmap_write(regmap, hd->m_reg, 0); -+ regmap_write(regmap, hd->n_reg, 1); -+ -+ if (hd->user_reg) { -+ u32 regval = hd->user_val; -+ unsigned long rate; -+ -+ rate = clk_hw_get_rate(hw); -+ -+ /* Pick the right VCO. */ -+ if (hd->user_vco_mask && rate > hd->low_vco_max_rate) -+ regval |= hd->user_vco_mask; -+ regmap_write(regmap, hd->user_reg, regval); -+ } -+ -+ if (hd->droop_reg) -+ regmap_write(regmap, hd->droop_reg, hd->droop_val); -+ -+ h->init_done = true; -+} -+ -+static void __clk_hfpll_enable(struct clk_hw *hw) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ u32 val; -+ -+ __clk_hfpll_init_once(hw); -+ -+ /* Disable PLL bypass mode. */ -+ regmap_update_bits(regmap, hd->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL); -+ -+ /* -+ * H/W requires a 5us delay between disabling the bypass and -+ * de-asserting the reset. Delay 10us just to be safe. -+ */ -+ usleep_range(10, 100); -+ -+ /* De-assert active-low PLL reset. */ -+ regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N); -+ -+ /* Wait for PLL to lock. */ -+ if (hd->status_reg) { -+ do { -+ regmap_read(regmap, hd->status_reg, &val); -+ } while (!(val & BIT(hd->lock_bit))); -+ } else { -+ usleep_range(60, 100); -+ } -+ -+ /* Enable PLL output. */ -+ regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL); -+} -+ -+/* Enable an already-configured HFPLL. */ -+static int clk_hfpll_enable(struct clk_hw *hw) -+{ -+ unsigned long flags; -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ u32 mode; -+ -+ spin_lock_irqsave(&h->lock, flags); -+ regmap_read(regmap, hd->mode_reg, &mode); -+ if (!(mode & (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL))) -+ __clk_hfpll_enable(hw); -+ spin_unlock_irqrestore(&h->lock, flags); -+ -+ return 0; -+} -+ -+static void __clk_hfpll_disable(struct clk_hfpll *h) -+{ -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ -+ /* -+ * Disable the PLL output, disable test mode, enable the bypass mode, -+ * and assert the reset. -+ */ -+ regmap_update_bits(regmap, hd->mode_reg, -+ PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL, 0); -+} -+ -+static void clk_hfpll_disable(struct clk_hw *hw) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&h->lock, flags); -+ __clk_hfpll_disable(h); -+ spin_unlock_irqrestore(&h->lock, flags); -+} -+ -+static long clk_hfpll_round_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long *parent_rate) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ unsigned long rrate; -+ -+ rate = clamp(rate, hd->min_rate, hd->max_rate); -+ -+ rrate = DIV_ROUND_UP(rate, *parent_rate) * *parent_rate; -+ if (rrate > hd->max_rate) -+ rrate -= *parent_rate; -+ -+ return rrate; -+} -+ -+/* -+ * For optimization reasons, assumes no downstream clocks are actively using -+ * it. -+ */ -+static int clk_hfpll_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ unsigned long flags; -+ u32 l_val, val; -+ bool enabled; -+ -+ l_val = rate / parent_rate; -+ -+ spin_lock_irqsave(&h->lock, flags); -+ -+ enabled = __clk_is_enabled(hw->clk); -+ if (enabled) -+ __clk_hfpll_disable(h); -+ -+ /* Pick the right VCO. */ -+ if (hd->user_reg && hd->user_vco_mask) { -+ regmap_read(regmap, hd->user_reg, &val); -+ if (rate <= hd->low_vco_max_rate) -+ val &= ~hd->user_vco_mask; -+ else -+ val |= hd->user_vco_mask; -+ regmap_write(regmap, hd->user_reg, val); -+ } -+ -+ regmap_write(regmap, hd->l_reg, l_val); -+ -+ if (enabled) -+ __clk_hfpll_enable(hw); -+ -+ spin_unlock_irqrestore(&h->lock, flags); -+ -+ return 0; -+} -+ -+static unsigned long clk_hfpll_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ u32 l_val; -+ -+ regmap_read(regmap, hd->l_reg, &l_val); -+ -+ return l_val * parent_rate; -+} -+ -+static void clk_hfpll_init(struct clk_hw *hw) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ u32 mode, status; -+ -+ regmap_read(regmap, hd->mode_reg, &mode); -+ if (mode != (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL)) { -+ __clk_hfpll_init_once(hw); -+ return; -+ } -+ -+ if (hd->status_reg) { -+ regmap_read(regmap, hd->status_reg, &status); -+ if (!(status & BIT(hd->lock_bit))) { -+ WARN(1, "HFPLL %s is ON, but not locked!\n", -+ __clk_get_name(hw->clk)); -+ clk_hfpll_disable(hw); -+ __clk_hfpll_init_once(hw); -+ } -+ } -+} -+ -+static int hfpll_is_enabled(struct clk_hw *hw) -+{ -+ struct clk_hfpll *h = to_clk_hfpll(hw); -+ struct hfpll_data const *hd = h->d; -+ struct regmap *regmap = h->clkr.regmap; -+ u32 mode; -+ -+ regmap_read(regmap, hd->mode_reg, &mode); -+ mode &= 0x7; -+ return mode == (PLL_BYPASSNL | PLL_RESET_N | PLL_OUTCTRL); -+} -+ -+const struct clk_ops clk_ops_hfpll = { -+ .enable = clk_hfpll_enable, -+ .disable = clk_hfpll_disable, -+ .is_enabled = hfpll_is_enabled, -+ .round_rate = clk_hfpll_round_rate, -+ .set_rate = clk_hfpll_set_rate, -+ .recalc_rate = clk_hfpll_recalc_rate, -+ .init = clk_hfpll_init, -+}; -+EXPORT_SYMBOL_GPL(clk_ops_hfpll); ---- /dev/null -+++ b/drivers/clk/qcom/clk-hfpll.h -@@ -0,0 +1,54 @@ -+/* -+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#ifndef __QCOM_CLK_HFPLL_H__ -+#define __QCOM_CLK_HFPLL_H__ -+ -+#include -+#include -+#include "clk-regmap.h" -+ -+struct hfpll_data { -+ u32 mode_reg; -+ u32 l_reg; -+ u32 m_reg; -+ u32 n_reg; -+ u32 user_reg; -+ u32 droop_reg; -+ u32 config_reg; -+ u32 status_reg; -+ u8 lock_bit; -+ -+ u32 droop_val; -+ u32 config_val; -+ u32 user_val; -+ u32 user_vco_mask; -+ unsigned long low_vco_max_rate; -+ -+ unsigned long min_rate; -+ unsigned long max_rate; -+}; -+ -+struct clk_hfpll { -+ struct hfpll_data const *d; -+ int init_done; -+ -+ struct clk_regmap clkr; -+ spinlock_t lock; -+}; -+ -+#define to_clk_hfpll(_hw) \ -+ container_of(to_clk_regmap(_hw), struct clk_hfpll, clkr) -+ -+extern const struct clk_ops clk_ops_hfpll; -+ -+#endif diff --git a/target/linux/ipq40xx/patches-4.9/0039-clk-qcom-Add-HFPLL-driver.patch b/target/linux/ipq40xx/patches-4.9/0039-clk-qcom-Add-HFPLL-driver.patch deleted file mode 100644 index d9ad391d0..000000000 --- a/target/linux/ipq40xx/patches-4.9/0039-clk-qcom-Add-HFPLL-driver.patch +++ /dev/null @@ -1,206 +0,0 @@ -From patchwork Fri Dec 8 09:42:22 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,04/12] clk: qcom: Add HFPLL driver -From: Sricharan R -X-Patchwork-Id: 10102079 -Message-Id: <1512726150-7204-5-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:22 +0530 - -From: Stephen Boyd - -On some devices (MSM8974 for example), the HFPLLs are -instantiated within the Krait processor subsystem as separate -register regions. Add a driver for these PLLs so that we can -provide HFPLL clocks for use by the system. - -Cc: -Signed-off-by: Stephen Boyd ---- - .../devicetree/bindings/clock/qcom,hfpll.txt | 40 ++++++++ - drivers/clk/qcom/Kconfig | 8 ++ - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/hfpll.c | 106 +++++++++++++++++++++ - 4 files changed, 155 insertions(+) - create mode 100644 Documentation/devicetree/bindings/clock/qcom,hfpll.txt - create mode 100644 drivers/clk/qcom/hfpll.c - ---- /dev/null -+++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt -@@ -0,0 +1,40 @@ -+High-Frequency PLL (HFPLL) -+ -+PROPERTIES -+ -+- compatible: -+ Usage: required -+ Value type: -+ Definition: must be "qcom,hfpll" -+ -+- reg: -+ Usage: required -+ Value type: -+ Definition: address and size of HPLL registers. An optional second -+ element specifies the address and size of the alias -+ register region. -+ -+- clock-output-names: -+ Usage: required -+ Value type: -+ Definition: Name of the PLL. Typically hfpllX where X is a CPU number -+ starting at 0. Otherwise hfpll_Y where Y is more specific -+ such as "l2". -+ -+Example: -+ -+1) An HFPLL for the L2 cache. -+ -+ clock-controller@f9016000 { -+ compatible = "qcom,hfpll"; -+ reg = <0xf9016000 0x30>; -+ clock-output-names = "hfpll_l2"; -+ }; -+ -+2) An HFPLL for CPU0. This HFPLL has the alias register region. -+ -+ clock-controller@f908a000 { -+ compatible = "qcom,hfpll"; -+ reg = <0xf908a000 0x30>, <0xf900a000 0x30>; -+ clock-output-names = "hfpll0"; -+ }; ---- a/drivers/clk/qcom/Kconfig -+++ b/drivers/clk/qcom/Kconfig -@@ -179,3 +179,11 @@ config MSM_MMCC_8996 - Support for the multimedia clock controller on msm8996 devices. - Say Y if you want to support multimedia devices such as display, - graphics, video encode/decode, camera, etc. -+ -+config QCOM_HFPLL -+ tristate "High-Frequency PLL (HFPLL) Clock Controller" -+ depends on COMMON_CLK_QCOM -+ help -+ Support for the high-frequency PLLs present on Qualcomm devices. -+ Say Y if you want to support CPU frequency scaling on devices -+ such as MSM8974, APQ8084, etc. ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -32,3 +32,4 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8 - obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o - obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o - obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o -+obj-$(CONFIG_QCOM_HFPLL) += hfpll.o ---- /dev/null -+++ b/drivers/clk/qcom/hfpll.c -@@ -0,0 +1,106 @@ -+/* -+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "clk-regmap.h" -+#include "clk-hfpll.h" -+ -+static const struct hfpll_data hdata = { -+ .mode_reg = 0x00, -+ .l_reg = 0x04, -+ .m_reg = 0x08, -+ .n_reg = 0x0c, -+ .user_reg = 0x10, -+ .config_reg = 0x14, -+ .config_val = 0x430405d, -+ .status_reg = 0x1c, -+ .lock_bit = 16, -+ -+ .user_val = 0x8, -+ .user_vco_mask = 0x100000, -+ .low_vco_max_rate = 1248000000, -+ .min_rate = 537600000UL, -+ .max_rate = 2900000000UL, -+}; -+ -+static const struct of_device_id qcom_hfpll_match_table[] = { -+ { .compatible = "qcom,hfpll" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, qcom_hfpll_match_table); -+ -+static const struct regmap_config hfpll_regmap_config = { -+ .reg_bits = 32, -+ .reg_stride = 4, -+ .val_bits = 32, -+ .max_register = 0x30, -+ .fast_io = true, -+}; -+ -+static int qcom_hfpll_probe(struct platform_device *pdev) -+{ -+ struct resource *res; -+ struct device *dev = &pdev->dev; -+ void __iomem *base; -+ struct regmap *regmap; -+ struct clk_hfpll *h; -+ struct clk_init_data init = { -+ .parent_names = (const char *[]){ "xo" }, -+ .num_parents = 1, -+ .ops = &clk_ops_hfpll, -+ }; -+ -+ h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); -+ if (!h) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ base = devm_ioremap_resource(dev, res); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ regmap = devm_regmap_init_mmio(&pdev->dev, base, &hfpll_regmap_config); -+ if (IS_ERR(regmap)) -+ return PTR_ERR(regmap); -+ -+ if (of_property_read_string_index(dev->of_node, "clock-output-names", -+ 0, &init.name)) -+ return -ENODEV; -+ -+ h->d = &hdata; -+ h->clkr.hw.init = &init; -+ spin_lock_init(&h->lock); -+ -+ return devm_clk_register_regmap(&pdev->dev, &h->clkr); -+} -+ -+static struct platform_driver qcom_hfpll_driver = { -+ .probe = qcom_hfpll_probe, -+ .driver = { -+ .name = "qcom-hfpll", -+ .of_match_table = qcom_hfpll_match_table, -+ }, -+}; -+module_platform_driver(qcom_hfpll_driver); -+ -+MODULE_DESCRIPTION("QCOM HFPLL Clock Driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:qcom-hfpll"); diff --git a/target/linux/ipq40xx/patches-4.9/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch b/target/linux/ipq40xx/patches-4.9/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch deleted file mode 100644 index c3af0fa55..000000000 --- a/target/linux/ipq40xx/patches-4.9/0040-clk-qcom-Add-IPQ806X-s-HFPLLs.patch +++ /dev/null @@ -1,129 +0,0 @@ -From patchwork Fri Dec 8 09:42:24 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,06/12] clk: qcom: Add IPQ806X's HFPLLs -From: Sricharan R -X-Patchwork-Id: 10102047 -Message-Id: <1512726150-7204-7-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:24 +0530 - -From: Stephen Boyd - -Describe the HFPLLs present on IPQ806X devices. - -Signed-off-by: Stephen Boyd ---- - drivers/clk/qcom/gcc-ipq806x.c | 82 ++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 82 insertions(+) - ---- a/drivers/clk/qcom/gcc-ipq806x.c -+++ b/drivers/clk/qcom/gcc-ipq806x.c -@@ -30,6 +30,7 @@ - #include "clk-pll.h" - #include "clk-rcg.h" - #include "clk-branch.h" -+#include "clk-hfpll.h" - #include "reset.h" - - static struct clk_pll pll0 = { -@@ -113,6 +114,84 @@ static struct clk_regmap pll8_vote = { - }, - }; - -+static struct hfpll_data hfpll0_data = { -+ .mode_reg = 0x3200, -+ .l_reg = 0x3208, -+ .m_reg = 0x320c, -+ .n_reg = 0x3210, -+ .config_reg = 0x3204, -+ .status_reg = 0x321c, -+ .config_val = 0x7845c665, -+ .droop_reg = 0x3214, -+ .droop_val = 0x0108c000, -+ .min_rate = 600000000UL, -+ .max_rate = 1800000000UL, -+}; -+ -+static struct clk_hfpll hfpll0 = { -+ .d = &hfpll0_data, -+ .clkr.hw.init = &(struct clk_init_data){ -+ .parent_names = (const char *[]){ "pxo" }, -+ .num_parents = 1, -+ .name = "hfpll0", -+ .ops = &clk_ops_hfpll, -+ .flags = CLK_IGNORE_UNUSED, -+ }, -+ .lock = __SPIN_LOCK_UNLOCKED(hfpll0.lock), -+}; -+ -+static struct hfpll_data hfpll1_data = { -+ .mode_reg = 0x3240, -+ .l_reg = 0x3248, -+ .m_reg = 0x324c, -+ .n_reg = 0x3250, -+ .config_reg = 0x3244, -+ .status_reg = 0x325c, -+ .config_val = 0x7845c665, -+ .droop_reg = 0x3314, -+ .droop_val = 0x0108c000, -+ .min_rate = 600000000UL, -+ .max_rate = 1800000000UL, -+}; -+ -+static struct clk_hfpll hfpll1 = { -+ .d = &hfpll1_data, -+ .clkr.hw.init = &(struct clk_init_data){ -+ .parent_names = (const char *[]){ "pxo" }, -+ .num_parents = 1, -+ .name = "hfpll1", -+ .ops = &clk_ops_hfpll, -+ .flags = CLK_IGNORE_UNUSED, -+ }, -+ .lock = __SPIN_LOCK_UNLOCKED(hfpll1.lock), -+}; -+ -+static struct hfpll_data hfpll_l2_data = { -+ .mode_reg = 0x3300, -+ .l_reg = 0x3308, -+ .m_reg = 0x330c, -+ .n_reg = 0x3310, -+ .config_reg = 0x3304, -+ .status_reg = 0x331c, -+ .config_val = 0x7845c665, -+ .droop_reg = 0x3314, -+ .droop_val = 0x0108c000, -+ .min_rate = 600000000UL, -+ .max_rate = 1800000000UL, -+}; -+ -+static struct clk_hfpll hfpll_l2 = { -+ .d = &hfpll_l2_data, -+ .clkr.hw.init = &(struct clk_init_data){ -+ .parent_names = (const char *[]){ "pxo" }, -+ .num_parents = 1, -+ .name = "hfpll_l2", -+ .ops = &clk_ops_hfpll, -+ .flags = CLK_IGNORE_UNUSED, -+ }, -+ .lock = __SPIN_LOCK_UNLOCKED(hfpll_l2.lock), -+}; -+ - static struct clk_pll pll14 = { - .l_reg = 0x31c4, - .m_reg = 0x31c8, -@@ -2801,6 +2880,9 @@ static struct clk_regmap *gcc_ipq806x_cl - [UBI32_CORE2_CLK_SRC] = &ubi32_core2_src_clk.clkr, - [NSSTCM_CLK_SRC] = &nss_tcm_src.clkr, - [NSSTCM_CLK] = &nss_tcm_clk.clkr, -+ [PLL9] = &hfpll0.clkr, -+ [PLL10] = &hfpll1.clkr, -+ [PLL12] = &hfpll_l2.clkr, - }; - - static const struct qcom_reset_map gcc_ipq806x_resets[] = { diff --git a/target/linux/ipq40xx/patches-4.9/0041-clk-qcom-Add-support-for-Krait-clocks.patch b/target/linux/ipq40xx/patches-4.9/0041-clk-qcom-Add-support-for-Krait-clocks.patch deleted file mode 100644 index a6d0f0d7a..000000000 --- a/target/linux/ipq40xx/patches-4.9/0041-clk-qcom-Add-support-for-Krait-clocks.patch +++ /dev/null @@ -1,241 +0,0 @@ -From patchwork Fri Dec 8 09:42:25 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,07/12] clk: qcom: Add support for Krait clocks -From: Sricharan R -X-Patchwork-Id: 10102051 -Message-Id: <1512726150-7204-8-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:25 +0530 - -From: Stephen Boyd - -The Krait clocks are made up of a series of muxes and a divider -that choose between a fixed rate clock and dedicated HFPLLs for -each CPU. Instead of using mmio accesses to remux parents, the -Krait implementation exposes the remux control via cp15 -registers. Support these clocks. - -Signed-off-by: Stephen Boyd ---- - drivers/clk/qcom/Kconfig | 4 ++ - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/clk-krait.c | 134 +++++++++++++++++++++++++++++++++++++++++++ - drivers/clk/qcom/clk-krait.h | 48 ++++++++++++++++ - 4 files changed, 187 insertions(+) - create mode 100644 drivers/clk/qcom/clk-krait.c - create mode 100644 drivers/clk/qcom/clk-krait.h - ---- a/drivers/clk/qcom/Kconfig -+++ b/drivers/clk/qcom/Kconfig -@@ -187,3 +187,7 @@ config QCOM_HFPLL - Support for the high-frequency PLLs present on Qualcomm devices. - Say Y if you want to support CPU frequency scaling on devices - such as MSM8974, APQ8084, etc. -+ -+config KRAIT_CLOCKS -+ bool -+ select KRAIT_L2_ACCESSORS ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -9,6 +9,7 @@ clk-qcom-y += clk-rcg2.o - clk-qcom-y += clk-branch.o - clk-qcom-y += clk-regmap-divider.o - clk-qcom-y += clk-regmap-mux.o -+clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-krait.o - clk-qcom-y += clk-hfpll.o - clk-qcom-y += reset.o - clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o ---- /dev/null -+++ b/drivers/clk/qcom/clk-krait.c -@@ -0,0 +1,134 @@ -+/* -+ * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "clk-krait.h" -+ -+/* Secondary and primary muxes share the same cp15 register */ -+static DEFINE_SPINLOCK(krait_clock_reg_lock); -+ -+#define LPL_SHIFT 8 -+static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) -+{ -+ unsigned long flags; -+ u32 regval; -+ -+ spin_lock_irqsave(&krait_clock_reg_lock, flags); -+ regval = krait_get_l2_indirect_reg(mux->offset); -+ regval &= ~(mux->mask << mux->shift); -+ regval |= (sel & mux->mask) << mux->shift; -+ if (mux->lpl) { -+ regval &= ~(mux->mask << (mux->shift + LPL_SHIFT)); -+ regval |= (sel & mux->mask) << (mux->shift + LPL_SHIFT); -+ } -+ krait_set_l2_indirect_reg(mux->offset, regval); -+ spin_unlock_irqrestore(&krait_clock_reg_lock, flags); -+ -+ /* Wait for switch to complete. */ -+ mb(); -+ udelay(1); -+} -+ -+static int krait_mux_set_parent(struct clk_hw *hw, u8 index) -+{ -+ struct krait_mux_clk *mux = to_krait_mux_clk(hw); -+ u32 sel; -+ -+ sel = clk_mux_reindex(index, mux->parent_map, 0); -+ mux->en_mask = sel; -+ /* Don't touch mux if CPU is off as it won't work */ -+ if (__clk_is_enabled(hw->clk)) -+ __krait_mux_set_sel(mux, sel); -+ -+ return 0; -+} -+ -+static u8 krait_mux_get_parent(struct clk_hw *hw) -+{ -+ struct krait_mux_clk *mux = to_krait_mux_clk(hw); -+ u32 sel; -+ -+ sel = krait_get_l2_indirect_reg(mux->offset); -+ sel >>= mux->shift; -+ sel &= mux->mask; -+ mux->en_mask = sel; -+ -+ return clk_mux_get_parent(hw, sel, mux->parent_map, 0); -+} -+ -+const struct clk_ops krait_mux_clk_ops = { -+ .set_parent = krait_mux_set_parent, -+ .get_parent = krait_mux_get_parent, -+ .determine_rate = __clk_mux_determine_rate_closest, -+}; -+EXPORT_SYMBOL_GPL(krait_mux_clk_ops); -+ -+/* The divider can divide by 2, 4, 6 and 8. But we only really need div-2. */ -+static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long *parent_rate) -+{ -+ *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2); -+ return DIV_ROUND_UP(*parent_rate, 2); -+} -+ -+static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ struct krait_div2_clk *d = to_krait_div2_clk(hw); -+ unsigned long flags; -+ u32 val; -+ u32 mask = BIT(d->width) - 1; -+ -+ if (d->lpl) -+ mask = mask << (d->shift + LPL_SHIFT) | mask << d->shift; -+ -+ spin_lock_irqsave(&krait_clock_reg_lock, flags); -+ val = krait_get_l2_indirect_reg(d->offset); -+ val &= ~mask; -+ krait_set_l2_indirect_reg(d->offset, val); -+ spin_unlock_irqrestore(&krait_clock_reg_lock, flags); -+ -+ return 0; -+} -+ -+static unsigned long -+krait_div2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) -+{ -+ struct krait_div2_clk *d = to_krait_div2_clk(hw); -+ u32 mask = BIT(d->width) - 1; -+ u32 div; -+ -+ div = krait_get_l2_indirect_reg(d->offset); -+ div >>= d->shift; -+ div &= mask; -+ div = (div + 1) * 2; -+ -+ return DIV_ROUND_UP(parent_rate, div); -+} -+ -+const struct clk_ops krait_div2_clk_ops = { -+ .round_rate = krait_div2_round_rate, -+ .set_rate = krait_div2_set_rate, -+ .recalc_rate = krait_div2_recalc_rate, -+}; -+EXPORT_SYMBOL_GPL(krait_div2_clk_ops); ---- /dev/null -+++ b/drivers/clk/qcom/clk-krait.h -@@ -0,0 +1,48 @@ -+/* -+ * Copyright (c) 2013, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __QCOM_CLK_KRAIT_H -+#define __QCOM_CLK_KRAIT_H -+ -+#include -+ -+struct krait_mux_clk { -+ unsigned int *parent_map; -+ u32 offset; -+ u32 mask; -+ u32 shift; -+ u32 en_mask; -+ bool lpl; -+ -+ struct clk_hw hw; -+ struct notifier_block clk_nb; -+}; -+ -+#define to_krait_mux_clk(_hw) container_of(_hw, struct krait_mux_clk, hw) -+ -+extern const struct clk_ops krait_mux_clk_ops; -+ -+struct krait_div2_clk { -+ u32 offset; -+ u8 width; -+ u32 shift; -+ bool lpl; -+ -+ struct clk_hw hw; -+}; -+ -+#define to_krait_div2_clk(_hw) container_of(_hw, struct krait_div2_clk, hw) -+ -+extern const struct clk_ops krait_div2_clk_ops; -+ -+#endif diff --git a/target/linux/ipq40xx/patches-4.9/0042-clk-qcom-Add-KPSS-ACC-GCC-driver.patch b/target/linux/ipq40xx/patches-4.9/0042-clk-qcom-Add-KPSS-ACC-GCC-driver.patch deleted file mode 100644 index 5a76fbc8b..000000000 --- a/target/linux/ipq40xx/patches-4.9/0042-clk-qcom-Add-KPSS-ACC-GCC-driver.patch +++ /dev/null @@ -1,209 +0,0 @@ -From patchwork Fri Dec 8 09:42:26 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,08/12] clk: qcom: Add KPSS ACC/GCC driver -From: Sricharan R -X-Patchwork-Id: 10102023 -Message-Id: <1512726150-7204-9-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:26 +0530 - -From: Stephen Boyd - -The ACC and GCC regions present in KPSSv1 contain registers to -control clocks and power to each Krait CPU and L2. For CPUfreq -purposes probe these devices and expose a mux clock that chooses -between PXO and PLL8. - -Cc: -Signed-off-by: Stephen Boyd ---- - .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt | 7 ++ - .../devicetree/bindings/arm/msm/qcom,kpss-gcc.txt | 28 +++++++ - drivers/clk/qcom/Kconfig | 8 ++ - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/kpss-xcc.c | 96 ++++++++++++++++++++++ - 5 files changed, 140 insertions(+) - create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt - create mode 100644 drivers/clk/qcom/kpss-xcc.c - ---- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt -+++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt -@@ -21,10 +21,17 @@ PROPERTIES - the register region. An optional second element specifies - the base address and size of the alias register region. - -+- clock-output-names: -+ Usage: optional -+ Value type: -+ Definition: Name of the output clock. Typically acpuX_aux where X is a -+ CPU number starting at 0. -+ - Example: - - clock-controller@2088000 { - compatible = "qcom,kpss-acc-v2"; - reg = <0x02088000 0x1000>, - <0x02008000 0x1000>; -+ clock-output-names = "acpu0_aux"; - }; ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt -@@ -0,0 +1,28 @@ -+Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) -+ -+PROPERTIES -+ -+- compatible: -+ Usage: required -+ Value type: -+ Definition: should be one of: -+ "qcom,kpss-gcc" -+ -+- reg: -+ Usage: required -+ Value type: -+ Definition: base address and size of the register region -+ -+- clock-output-names: -+ Usage: required -+ Value type: -+ Definition: Name of the output clock. Typically acpu_l2_aux indicating -+ an L2 cache auxiliary clock. -+ -+Example: -+ -+ l2cc: clock-controller@2011000 { -+ compatible = "qcom,kpss-gcc"; -+ reg = <0x2011000 0x1000>; -+ clock-output-names = "acpu_l2_aux"; -+ }; ---- a/drivers/clk/qcom/Kconfig -+++ b/drivers/clk/qcom/Kconfig -@@ -188,6 +188,14 @@ config QCOM_HFPLL - Say Y if you want to support CPU frequency scaling on devices - such as MSM8974, APQ8084, etc. - -+config KPSS_XCC -+ tristate "KPSS Clock Controller" -+ depends on COMMON_CLK_QCOM -+ help -+ Support for the Krait ACC and GCC clock controllers. Say Y -+ if you want to support CPU frequency scaling on devices such -+ as MSM8960, APQ8064, etc. -+ - config KRAIT_CLOCKS - bool - select KRAIT_L2_ACCESSORS ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -33,4 +33,5 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8 - obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o - obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o - obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o -+obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o - obj-$(CONFIG_QCOM_HFPLL) += hfpll.o ---- /dev/null -+++ b/drivers/clk/qcom/kpss-xcc.c -@@ -0,0 +1,96 @@ -+/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static const char *aux_parents[] = { -+ "pll8_vote", -+ "pxo", -+}; -+ -+static unsigned int aux_parent_map[] = { -+ 3, -+ 0, -+}; -+ -+static const struct of_device_id kpss_xcc_match_table[] = { -+ { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL }, -+ { .compatible = "qcom,kpss-gcc" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, kpss_xcc_match_table); -+ -+static int kpss_xcc_driver_probe(struct platform_device *pdev) -+{ -+ const struct of_device_id *id; -+ struct clk *clk; -+ struct resource *res; -+ void __iomem *base; -+ const char *name; -+ -+ id = of_match_device(kpss_xcc_match_table, &pdev->dev); -+ if (!id) -+ return -ENODEV; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ if (id->data) { -+ if (of_property_read_string_index(pdev->dev.of_node, -+ "clock-output-names", -+ 0, &name)) -+ return -ENODEV; -+ base += 0x14; -+ } else { -+ name = "acpu_l2_aux"; -+ base += 0x28; -+ } -+ -+ clk = clk_register_mux_table(&pdev->dev, name, aux_parents, -+ ARRAY_SIZE(aux_parents), 0, base, 0, 0x3, -+ 0, aux_parent_map, NULL); -+ -+ platform_set_drvdata(pdev, clk); -+ -+ return PTR_ERR_OR_ZERO(clk); -+} -+ -+static int kpss_xcc_driver_remove(struct platform_device *pdev) -+{ -+ clk_unregister_mux(platform_get_drvdata(pdev)); -+ return 0; -+} -+ -+static struct platform_driver kpss_xcc_driver = { -+ .probe = kpss_xcc_driver_probe, -+ .remove = kpss_xcc_driver_remove, -+ .driver = { -+ .name = "kpss-xcc", -+ .of_match_table = kpss_xcc_match_table, -+ }, -+}; -+module_platform_driver(kpss_xcc_driver); -+ -+MODULE_DESCRIPTION("Krait Processor Sub System (KPSS) Clock Driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:kpss-xcc"); diff --git a/target/linux/ipq40xx/patches-4.9/0043-clk-qcom-Add-Krait-clock-controller-driver.patch b/target/linux/ipq40xx/patches-4.9/0043-clk-qcom-Add-Krait-clock-controller-driver.patch deleted file mode 100644 index 1d32b2b05..000000000 --- a/target/linux/ipq40xx/patches-4.9/0043-clk-qcom-Add-Krait-clock-controller-driver.patch +++ /dev/null @@ -1,436 +0,0 @@ -From patchwork Fri Dec 8 09:42:27 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,09/12] clk: qcom: Add Krait clock controller driver -From: Sricharan R -X-Patchwork-Id: 10102061 -Message-Id: <1512726150-7204-10-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:27 +0530 - -From: Stephen Boyd - -The Krait CPU clocks are made up of a primary mux and secondary -mux for each CPU and the L2, controlled via cp15 accessors. For -Kraits within KPSSv1 each secondary mux accepts a different aux -source, but on KPSSv2 each secondary mux accepts the same aux -source. - -Cc: -Signed-off-by: Stephen Boyd ---- - .../devicetree/bindings/clock/qcom,krait-cc.txt | 22 ++ - drivers/clk/qcom/Kconfig | 8 + - drivers/clk/qcom/Makefile | 1 + - drivers/clk/qcom/krait-cc.c | 350 +++++++++++++++++++++ - 4 files changed, 381 insertions(+) - create mode 100644 Documentation/devicetree/bindings/clock/qcom,krait-cc.txt - create mode 100644 drivers/clk/qcom/krait-cc.c - ---- /dev/null -+++ b/Documentation/devicetree/bindings/clock/qcom,krait-cc.txt -@@ -0,0 +1,22 @@ -+Krait Clock Controller -+ -+PROPERTIES -+ -+- compatible: -+ Usage: required -+ Value type: -+ Definition: must be one of: -+ "qcom,krait-cc-v1" -+ "qcom,krait-cc-v2" -+ -+- #clock-cells: -+ Usage: required -+ Value type: -+ Definition: must be 1 -+ -+Example: -+ -+ kraitcc: clock-controller { -+ compatible = "qcom,krait-cc-v1"; -+ #clock-cells = <1>; -+ }; ---- a/drivers/clk/qcom/Kconfig -+++ b/drivers/clk/qcom/Kconfig -@@ -196,6 +196,14 @@ config KPSS_XCC - if you want to support CPU frequency scaling on devices such - as MSM8960, APQ8064, etc. - -+config KRAITCC -+ tristate "Krait Clock Controller" -+ depends on COMMON_CLK_QCOM && ARM -+ select KRAIT_CLOCKS -+ help -+ Support for the Krait CPU clocks on Qualcomm devices. -+ Say Y if you want to support CPU frequency scaling. -+ - config KRAIT_CLOCKS - bool - select KRAIT_L2_ACCESSORS ---- a/drivers/clk/qcom/Makefile -+++ b/drivers/clk/qcom/Makefile -@@ -35,3 +35,4 @@ obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o - obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o - obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o - obj-$(CONFIG_QCOM_HFPLL) += hfpll.o -+obj-$(CONFIG_KRAITCC) += krait-cc.o ---- /dev/null -+++ b/drivers/clk/qcom/krait-cc.c -@@ -0,0 +1,350 @@ -+/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "clk-krait.h" -+ -+static unsigned int sec_mux_map[] = { -+ 2, -+ 0, -+}; -+ -+static unsigned int pri_mux_map[] = { -+ 1, -+ 2, -+ 0, -+}; -+ -+static int -+krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) -+{ -+ struct krait_div2_clk *div; -+ struct clk_init_data init = { -+ .num_parents = 1, -+ .ops = &krait_div2_clk_ops, -+ .flags = CLK_SET_RATE_PARENT, -+ }; -+ const char *p_names[1]; -+ struct clk *clk; -+ -+ div = devm_kzalloc(dev, sizeof(*div), GFP_KERNEL); -+ if (!div) -+ return -ENOMEM; -+ -+ div->width = 2; -+ div->shift = 6; -+ div->lpl = id >= 0; -+ div->offset = offset; -+ div->hw.init = &init; -+ -+ init.name = kasprintf(GFP_KERNEL, "hfpll%s_div", s); -+ if (!init.name) -+ return -ENOMEM; -+ -+ init.parent_names = p_names; -+ p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); -+ if (!p_names[0]) { -+ kfree(init.name); -+ return -ENOMEM; -+ } -+ -+ clk = devm_clk_register(dev, &div->hw); -+ kfree(p_names[0]); -+ kfree(init.name); -+ -+ return PTR_ERR_OR_ZERO(clk); -+} -+ -+static int -+krait_add_sec_mux(struct device *dev, int id, const char *s, -+ unsigned int offset, bool unique_aux) -+{ -+ struct krait_mux_clk *mux; -+ static const char *sec_mux_list[] = { -+ "acpu_aux", -+ "qsb", -+ }; -+ struct clk_init_data init = { -+ .parent_names = sec_mux_list, -+ .num_parents = ARRAY_SIZE(sec_mux_list), -+ .ops = &krait_mux_clk_ops, -+ .flags = CLK_SET_RATE_PARENT, -+ }; -+ struct clk *clk; -+ -+ mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); -+ if (!mux) -+ return -ENOMEM; -+ -+ mux->offset = offset; -+ mux->lpl = id >= 0; -+ mux->mask = 0x3; -+ mux->shift = 2; -+ mux->parent_map = sec_mux_map; -+ mux->hw.init = &init; -+ -+ init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); -+ if (!init.name) -+ return -ENOMEM; -+ -+ if (unique_aux) { -+ sec_mux_list[0] = kasprintf(GFP_KERNEL, "acpu%s_aux", s); -+ if (!sec_mux_list[0]) { -+ clk = ERR_PTR(-ENOMEM); -+ goto err_aux; -+ } -+ } -+ -+ clk = devm_clk_register(dev, &mux->hw); -+ -+ if (unique_aux) -+ kfree(sec_mux_list[0]); -+err_aux: -+ kfree(init.name); -+ return PTR_ERR_OR_ZERO(clk); -+} -+ -+static struct clk * -+krait_add_pri_mux(struct device *dev, int id, const char *s, -+ unsigned int offset) -+{ -+ struct krait_mux_clk *mux; -+ const char *p_names[3]; -+ struct clk_init_data init = { -+ .parent_names = p_names, -+ .num_parents = ARRAY_SIZE(p_names), -+ .ops = &krait_mux_clk_ops, -+ .flags = CLK_SET_RATE_PARENT, -+ }; -+ struct clk *clk; -+ -+ mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL); -+ if (!mux) -+ return ERR_PTR(-ENOMEM); -+ -+ mux->mask = 0x3; -+ mux->shift = 0; -+ mux->offset = offset; -+ mux->lpl = id >= 0; -+ mux->parent_map = pri_mux_map; -+ mux->hw.init = &init; -+ -+ init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s); -+ if (!init.name) -+ return ERR_PTR(-ENOMEM); -+ -+ p_names[0] = kasprintf(GFP_KERNEL, "hfpll%s", s); -+ if (!p_names[0]) { -+ clk = ERR_PTR(-ENOMEM); -+ goto err_p0; -+ } -+ -+ p_names[1] = kasprintf(GFP_KERNEL, "hfpll%s_div", s); -+ if (!p_names[1]) { -+ clk = ERR_PTR(-ENOMEM); -+ goto err_p1; -+ } -+ -+ p_names[2] = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); -+ if (!p_names[2]) { -+ clk = ERR_PTR(-ENOMEM); -+ goto err_p2; -+ } -+ -+ clk = devm_clk_register(dev, &mux->hw); -+ -+ kfree(p_names[2]); -+err_p2: -+ kfree(p_names[1]); -+err_p1: -+ kfree(p_names[0]); -+err_p0: -+ kfree(init.name); -+ return clk; -+} -+ -+/* id < 0 for L2, otherwise id == physical CPU number */ -+static struct clk *krait_add_clks(struct device *dev, int id, bool unique_aux) -+{ -+ int ret; -+ unsigned int offset; -+ void *p = NULL; -+ const char *s; -+ struct clk *clk; -+ -+ if (id >= 0) { -+ offset = 0x4501 + (0x1000 * id); -+ s = p = kasprintf(GFP_KERNEL, "%d", id); -+ if (!s) -+ return ERR_PTR(-ENOMEM); -+ } else { -+ offset = 0x500; -+ s = "_l2"; -+ } -+ -+ ret = krait_add_div(dev, id, s, offset); -+ if (ret) { -+ clk = ERR_PTR(ret); -+ goto err; -+ } -+ -+ ret = krait_add_sec_mux(dev, id, s, offset, unique_aux); -+ if (ret) { -+ clk = ERR_PTR(ret); -+ goto err; -+ } -+ -+ clk = krait_add_pri_mux(dev, id, s, offset); -+err: -+ kfree(p); -+ return clk; -+} -+ -+static struct clk *krait_of_get(struct of_phandle_args *clkspec, void *data) -+{ -+ unsigned int idx = clkspec->args[0]; -+ struct clk **clks = data; -+ -+ if (idx >= 5) { -+ pr_err("%s: invalid clock index %d\n", __func__, idx); -+ return ERR_PTR(-EINVAL); -+ } -+ -+ return clks[idx] ? : ERR_PTR(-ENODEV); -+} -+ -+static const struct of_device_id krait_cc_match_table[] = { -+ { .compatible = "qcom,krait-cc-v1", (void *)1UL }, -+ { .compatible = "qcom,krait-cc-v2" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, krait_cc_match_table); -+ -+static int krait_cc_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ const struct of_device_id *id; -+ unsigned long cur_rate, aux_rate; -+ int cpu; -+ struct clk *clk; -+ struct clk **clks; -+ struct clk *l2_pri_mux_clk; -+ -+ id = of_match_device(krait_cc_match_table, dev); -+ if (!id) -+ return -ENODEV; -+ -+ /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */ -+ clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1); -+ if (IS_ERR(clk)) -+ return PTR_ERR(clk); -+ -+ if (!id->data) { -+ clk = clk_register_fixed_factor(dev, "acpu_aux", -+ "gpll0_vote", 0, 1, 2); -+ if (IS_ERR(clk)) -+ return PTR_ERR(clk); -+ } -+ -+ /* Krait configurations have at most 4 CPUs and one L2 */ -+ clks = devm_kcalloc(dev, 5, sizeof(*clks), GFP_KERNEL); -+ if (!clks) -+ return -ENOMEM; -+ -+ for_each_possible_cpu(cpu) { -+ clk = krait_add_clks(dev, cpu, id->data); -+ if (IS_ERR(clk)) -+ return PTR_ERR(clk); -+ clks[cpu] = clk; -+ } -+ -+ l2_pri_mux_clk = krait_add_clks(dev, -1, id->data); -+ if (IS_ERR(l2_pri_mux_clk)) -+ return PTR_ERR(l2_pri_mux_clk); -+ clks[4] = l2_pri_mux_clk; -+ -+ /* -+ * We don't want the CPU or L2 clocks to be turned off at late init -+ * if CPUFREQ or HOTPLUG configs are disabled. So, bump up the -+ * refcount of these clocks. Any cpufreq/hotplug manager can assume -+ * that the clocks have already been prepared and enabled by the time -+ * they take over. -+ */ -+ for_each_online_cpu(cpu) { -+ clk_prepare_enable(l2_pri_mux_clk); -+ WARN(clk_prepare_enable(clks[cpu]), -+ "Unable to turn on CPU%d clock", cpu); -+ } -+ -+ /* -+ * Force reinit of HFPLLs and muxes to overwrite any potential -+ * incorrect configuration of HFPLLs and muxes by the bootloader. -+ * While at it, also make sure the cores are running at known rates -+ * and print the current rate. -+ * -+ * The clocks are set to aux clock rate first to make sure the -+ * secondary mux is not sourcing off of QSB. The rate is then set to -+ * two different rates to force a HFPLL reinit under all -+ * circumstances. -+ */ -+ cur_rate = clk_get_rate(l2_pri_mux_clk); -+ aux_rate = 384000000; -+ if (cur_rate == 1) { -+ pr_info("L2 @ QSB rate. Forcing new rate.\n"); -+ cur_rate = aux_rate; -+ } -+ clk_set_rate(l2_pri_mux_clk, aux_rate); -+ clk_set_rate(l2_pri_mux_clk, 2); -+ clk_set_rate(l2_pri_mux_clk, cur_rate); -+ pr_info("L2 @ %lu KHz\n", clk_get_rate(l2_pri_mux_clk) / 1000); -+ for_each_possible_cpu(cpu) { -+ clk = clks[cpu]; -+ cur_rate = clk_get_rate(clk); -+ if (cur_rate == 1) { -+ pr_info("CPU%d @ QSB rate. Forcing new rate.\n", cpu); -+ cur_rate = aux_rate; -+ } -+ -+ clk_set_rate(clk, aux_rate); -+ clk_set_rate(clk, 2); -+ clk_set_rate(clk, cur_rate); -+ pr_info("CPU%d @ %lu KHz\n", cpu, clk_get_rate(clk) / 1000); -+ } -+ -+ of_clk_add_provider(dev->of_node, krait_of_get, clks); -+ -+ return 0; -+} -+ -+static struct platform_driver krait_cc_driver = { -+ .probe = krait_cc_probe, -+ .driver = { -+ .name = "krait-cc", -+ .of_match_table = krait_cc_match_table, -+ }, -+}; -+module_platform_driver(krait_cc_driver); -+ -+MODULE_DESCRIPTION("Krait CPU Clock Driver"); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:krait-cc"); diff --git a/target/linux/ipq40xx/patches-4.9/0044-clk-Add-safe-switch-hook.patch b/target/linux/ipq40xx/patches-4.9/0044-clk-Add-safe-switch-hook.patch deleted file mode 100644 index d0eddc64c..000000000 --- a/target/linux/ipq40xx/patches-4.9/0044-clk-Add-safe-switch-hook.patch +++ /dev/null @@ -1,160 +0,0 @@ -From patchwork Fri Dec 8 09:42:28 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,10/12] clk: qcom: Add safe switch hook for krait mux clocks -From: Sricharan R -X-Patchwork-Id: 10102057 -Message-Id: <1512726150-7204-11-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:28 +0530 - -When the Hfplls are reprogrammed during the rate change, -the primary muxes which are sourced from the same hfpll -for higher frequencies, needs to be switched to the 'safe -secondary mux' as the parent for that small window. This -is done by registering a clk notifier for the muxes and -switching to the safe parent in the PRE_RATE_CHANGE notifier -and back to the original parent in the POST_RATE_CHANGE notifier. - -Signed-off-by: Sricharan R ---- - drivers/clk/qcom/clk-krait.c | 2 ++ - drivers/clk/qcom/clk-krait.h | 3 +++ - drivers/clk/qcom/krait-cc.c | 56 ++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 61 insertions(+) - ---- a/drivers/clk/qcom/clk-krait.c -+++ b/drivers/clk/qcom/clk-krait.c -@@ -60,6 +60,8 @@ static int krait_mux_set_parent(struct c - if (__clk_is_enabled(hw->clk)) - __krait_mux_set_sel(mux, sel); - -+ mux->reparent = true; -+ - return 0; - } - ---- a/drivers/clk/qcom/clk-krait.h -+++ b/drivers/clk/qcom/clk-krait.h -@@ -23,6 +23,9 @@ struct krait_mux_clk { - u32 shift; - u32 en_mask; - bool lpl; -+ u8 safe_sel; -+ u8 old_index; -+ bool reparent; - - struct clk_hw hw; - struct notifier_block clk_nb; ---- a/drivers/clk/qcom/krait-cc.c -+++ b/drivers/clk/qcom/krait-cc.c -@@ -35,6 +35,49 @@ static unsigned int pri_mux_map[] = { - 0, - }; - -+/* -+ * Notifier function for switching the muxes to safe parent -+ * while the hfpll is getting reprogrammed. -+ */ -+static int krait_notifier_cb(struct notifier_block *nb, -+ unsigned long event, -+ void *data) -+{ -+ int ret = 0; -+ struct krait_mux_clk *mux = container_of(nb, struct krait_mux_clk, -+ clk_nb); -+ /* Switch to safe parent */ -+ if (event == PRE_RATE_CHANGE) { -+ mux->old_index = krait_mux_clk_ops.get_parent(&mux->hw); -+ ret = krait_mux_clk_ops.set_parent(&mux->hw, mux->safe_sel); -+ mux->reparent = false; -+ /* -+ * By the time POST_RATE_CHANGE notifier is called, -+ * clk framework itself would have changed the parent for the new rate. -+ * Only otherwise, put back to the old parent. -+ */ -+ } else if (event == POST_RATE_CHANGE) { -+ if (!mux->reparent) -+ ret = krait_mux_clk_ops.set_parent(&mux->hw, -+ mux->old_index); -+ } -+ -+ return notifier_from_errno(ret); -+} -+ -+static int krait_notifier_register(struct device *dev, struct clk *clk, -+ struct krait_mux_clk *mux) -+{ -+ int ret = 0; -+ -+ mux->clk_nb.notifier_call = krait_notifier_cb; -+ ret = clk_notifier_register(clk, &mux->clk_nb); -+ if (ret) -+ dev_err(dev, "failed to register clock notifier: %d\n", ret); -+ -+ return ret; -+} -+ - static int - krait_add_div(struct device *dev, int id, const char *s, unsigned int offset) - { -@@ -79,6 +122,7 @@ static int - krait_add_sec_mux(struct device *dev, int id, const char *s, - unsigned int offset, bool unique_aux) - { -+ int ret; - struct krait_mux_clk *mux; - static const char *sec_mux_list[] = { - "acpu_aux", -@@ -102,6 +146,7 @@ krait_add_sec_mux(struct device *dev, in - mux->shift = 2; - mux->parent_map = sec_mux_map; - mux->hw.init = &init; -+ mux->safe_sel = 0; - - init.name = kasprintf(GFP_KERNEL, "krait%s_sec_mux", s); - if (!init.name) -@@ -117,6 +162,11 @@ krait_add_sec_mux(struct device *dev, in - - clk = devm_clk_register(dev, &mux->hw); - -+ ret = krait_notifier_register(dev, clk, mux); -+ if (ret) -+ goto unique_aux; -+ -+unique_aux: - if (unique_aux) - kfree(sec_mux_list[0]); - err_aux: -@@ -128,6 +178,7 @@ static struct clk * - krait_add_pri_mux(struct device *dev, int id, const char *s, - unsigned int offset) - { -+ int ret; - struct krait_mux_clk *mux; - const char *p_names[3]; - struct clk_init_data init = { -@@ -148,6 +199,7 @@ krait_add_pri_mux(struct device *dev, in - mux->lpl = id >= 0; - mux->parent_map = pri_mux_map; - mux->hw.init = &init; -+ mux->safe_sel = 2; - - init.name = kasprintf(GFP_KERNEL, "krait%s_pri_mux", s); - if (!init.name) -@@ -173,6 +225,10 @@ krait_add_pri_mux(struct device *dev, in - - clk = devm_clk_register(dev, &mux->hw); - -+ ret = krait_notifier_register(dev, clk, mux); -+ if (ret) -+ goto err_p3; -+err_p3: - kfree(p_names[2]); - err_p2: - kfree(p_names[1]); diff --git a/target/linux/ipq40xx/patches-4.9/0045-cpufreq-Add-module-to-register-cpufreq-on-Krait-CPUs.patch b/target/linux/ipq40xx/patches-4.9/0045-cpufreq-Add-module-to-register-cpufreq-on-Krait-CPUs.patch deleted file mode 100644 index 820d13f3c..000000000 --- a/target/linux/ipq40xx/patches-4.9/0045-cpufreq-Add-module-to-register-cpufreq-on-Krait-CPUs.patch +++ /dev/null @@ -1,307 +0,0 @@ -From patchwork Fri Dec 8 09:42:29 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,11/12] cpufreq: Add module to register cpufreq on Krait CPUs -From: Sricharan R -X-Patchwork-Id: 10102075 -Message-Id: <1512726150-7204-12-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:29 +0530 - -From: Stephen Boyd - -Register a cpufreq-generic device whenever we detect that a -"qcom,krait" compatible CPU is present in DT. - -Cc: -Signed-off-by: Stephen Boyd ---- - .../devicetree/bindings/arm/msm/qcom,pvs.txt | 38 ++++ - drivers/cpufreq/Kconfig.arm | 9 + - drivers/cpufreq/Makefile | 1 + - drivers/cpufreq/qcom-cpufreq.c | 204 +++++++++++++++++++++ - 4 files changed, 252 insertions(+) - create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,pvs.txt - create mode 100644 drivers/cpufreq/qcom-cpufreq.c - ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/msm/qcom,pvs.txt -@@ -0,0 +1,38 @@ -+Qualcomm Process Voltage Scaling Tables -+ -+The node name is required to be "qcom,pvs". There shall only be one -+such node present in the root of the tree. -+ -+PROPERTIES -+ -+- qcom,pvs-format-a or qcom,pvs-format-b: -+ Usage: required -+ Value type: -+ Definition: Indicates the format of qcom,speedX-pvsY-bin-vZ properties. -+ If qcom,pvs-format-a is used the table is two columns -+ (frequency and voltage in that order). If qcom,pvs-format-b is used the table is three columns (frequency, voltage, -+ and current in that order). -+ -+- qcom,speedX-pvsY-bin-vZ: -+ Usage: required -+ Value type: -+ Definition: The PVS table corresponding to the speed bin X, pvs bin Y, -+ and version Z. -+Example: -+ -+ qcom,pvs { -+ qcom,pvs-format-a; -+ qcom,speed0-pvs0-bin-v0 = -+ < 384000000 950000 >, -+ < 486000000 975000 >, -+ < 594000000 1000000 >, -+ < 702000000 1025000 >, -+ < 810000000 1075000 >, -+ < 918000000 1100000 >, -+ < 1026000000 1125000 >, -+ < 1134000000 1175000 >, -+ < 1242000000 1200000 >, -+ < 1350000000 1225000 >, -+ < 1458000000 1237500 >, -+ < 1512000000 1250000 >; -+ }; ---- a/drivers/cpufreq/Kconfig.arm -+++ b/drivers/cpufreq/Kconfig.arm -@@ -88,6 +88,15 @@ config ARM_OMAP2PLUS_CPUFREQ - depends on ARCH_OMAP2PLUS - default ARCH_OMAP2PLUS - -+config ARM_QCOM_CPUFREQ -+ tristate "Qualcomm based" -+ depends on ARCH_QCOM -+ select PM_OPP -+ help -+ This adds the CPUFreq driver for Qualcomm SoC based boards. -+ -+ If in doubt, say N. -+ - config ARM_S3C_CPUFREQ - bool - help ---- a/drivers/cpufreq/Makefile -+++ b/drivers/cpufreq/Makefile -@@ -62,6 +62,7 @@ obj-$(CONFIG_ARM_MT8173_CPUFREQ) += mt81 - obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o - obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o - obj-$(CONFIG_PXA3xx) += pxa3xx-cpufreq.o -+obj-$(CONFIG_ARM_QCOM_CPUFREQ) += qcom-cpufreq.o - obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += s3c24xx-cpufreq.o - obj-$(CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS) += s3c24xx-cpufreq-debugfs.o - obj-$(CONFIG_ARM_S3C2410_CPUFREQ) += s3c2410-cpufreq.o ---- /dev/null -+++ b/drivers/cpufreq/qcom-cpufreq.c -@@ -0,0 +1,204 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "cpufreq-dt.h" -+ -+static void __init get_krait_bin_format_a(int *speed, int *pvs, int *pvs_ver) -+{ -+ void __iomem *base; -+ u32 pte_efuse; -+ -+ *speed = *pvs = *pvs_ver = 0; -+ -+ base = ioremap(0x007000c0, 4); -+ if (!base) { -+ pr_warn("Unable to read efuse data. Defaulting to 0!\n"); -+ return; -+ } -+ -+ pte_efuse = readl_relaxed(base); -+ iounmap(base); -+ -+ *speed = pte_efuse & 0xf; -+ if (*speed == 0xf) -+ *speed = (pte_efuse >> 4) & 0xf; -+ -+ if (*speed == 0xf) { -+ *speed = 0; -+ pr_warn("Speed bin: Defaulting to %d\n", *speed); -+ } else { -+ pr_info("Speed bin: %d\n", *speed); -+ } -+ -+ *pvs = (pte_efuse >> 10) & 0x7; -+ if (*pvs == 0x7) -+ *pvs = (pte_efuse >> 13) & 0x7; -+ -+ if (*pvs == 0x7) { -+ *pvs = 0; -+ pr_warn("PVS bin: Defaulting to %d\n", *pvs); -+ } else { -+ pr_info("PVS bin: %d\n", *pvs); -+ } -+} -+ -+static void __init get_krait_bin_format_b(int *speed, int *pvs, int *pvs_ver) -+{ -+ u32 pte_efuse, redundant_sel; -+ void __iomem *base; -+ -+ *speed = 0; -+ *pvs = 0; -+ *pvs_ver = 0; -+ -+ base = ioremap(0xfc4b80b0, 8); -+ if (!base) { -+ pr_warn("Unable to read efuse data. Defaulting to 0!\n"); -+ return; -+ } -+ -+ pte_efuse = readl_relaxed(base); -+ redundant_sel = (pte_efuse >> 24) & 0x7; -+ *speed = pte_efuse & 0x7; -+ /* 4 bits of PVS are in efuse register bits 31, 8-6. */ -+ *pvs = ((pte_efuse >> 28) & 0x8) | ((pte_efuse >> 6) & 0x7); -+ *pvs_ver = (pte_efuse >> 4) & 0x3; -+ -+ switch (redundant_sel) { -+ case 1: -+ *speed = (pte_efuse >> 27) & 0xf; -+ break; -+ case 2: -+ *pvs = (pte_efuse >> 27) & 0xf; -+ break; -+ } -+ -+ /* Check SPEED_BIN_BLOW_STATUS */ -+ if (pte_efuse & BIT(3)) { -+ pr_info("Speed bin: %d\n", *speed); -+ } else { -+ pr_warn("Speed bin not set. Defaulting to 0!\n"); -+ *speed = 0; -+ } -+ -+ /* Check PVS_BLOW_STATUS */ -+ pte_efuse = readl_relaxed(base + 0x4) & BIT(21); -+ if (pte_efuse) { -+ pr_info("PVS bin: %d\n", *pvs); -+ } else { -+ pr_warn("PVS bin not set. Defaulting to 0!\n"); -+ *pvs = 0; -+ } -+ -+ pr_info("PVS version: %d\n", *pvs_ver); -+ iounmap(base); -+} -+ -+static int __init qcom_cpufreq_populate_opps(void) -+{ -+ int len, rows, cols, i, k, speed, pvs, pvs_ver; -+ char table_name[] = "qcom,speedXX-pvsXX-bin-vXX"; -+ struct device_node *np; -+ struct device *dev; -+ int cpu = 0; -+ -+ np = of_find_node_by_name(NULL, "qcom,pvs"); -+ if (!np) -+ return -ENODEV; -+ -+ if (of_property_read_bool(np, "qcom,pvs-format-a")) { -+ get_krait_bin_format_a(&speed, &pvs, &pvs_ver); -+ cols = 2; -+ } else if (of_property_read_bool(np, "qcom,pvs-format-b")) { -+ get_krait_bin_format_b(&speed, &pvs, &pvs_ver); -+ cols = 3; -+ } else { -+ return -ENODEV; -+ } -+ -+ snprintf(table_name, sizeof(table_name), -+ "qcom,speed%d-pvs%d-bin-v%d", speed, pvs, pvs_ver); -+ -+ if (!of_find_property(np, table_name, &len)) -+ return -EINVAL; -+ -+ len /= sizeof(u32); -+ if (len % cols || len == 0) -+ return -EINVAL; -+ -+ rows = len / cols; -+ -+ for (i = 0, k = 0; i < rows; i++) { -+ u32 freq, volt; -+ -+ of_property_read_u32_index(np, table_name, k++, &freq); -+ of_property_read_u32_index(np, table_name, k++, &volt); -+ while (k % cols) -+ k++; /* Skip uA entries if present */ -+ for (cpu = 0; cpu < num_possible_cpus(); cpu++) { -+ dev = get_cpu_device(cpu); -+ if (!dev) -+ return -ENODEV; -+ if (dev_pm_opp_add(dev, freq, volt)) -+ pr_warn("failed to add OPP %u\n", freq); -+ } -+ } -+ -+ return 0; -+} -+ -+static int __init qcom_cpufreq_driver_init(void) -+{ -+ struct cpufreq_dt_platform_data pdata = { .independent_clocks = true }; -+ struct platform_device_info devinfo = { -+ .name = "cpufreq-dt", -+ .data = &pdata, -+ .size_data = sizeof(pdata), -+ }; -+ struct device *cpu_dev; -+ struct device_node *np; -+ int ret; -+ -+ cpu_dev = get_cpu_device(0); -+ if (!cpu_dev) -+ return -ENODEV; -+ -+ np = of_node_get(cpu_dev->of_node); -+ if (!np) -+ return -ENOENT; -+ -+ if (!of_device_is_compatible(np, "qcom,krait")) { -+ of_node_put(np); -+ return -ENODEV; -+ } -+ of_node_put(np); -+ -+ ret = qcom_cpufreq_populate_opps(); -+ if (ret) -+ return ret; -+ -+ return PTR_ERR_OR_ZERO(platform_device_register_full(&devinfo)); -+} -+module_init(qcom_cpufreq_driver_init); -+ -+MODULE_DESCRIPTION("Qualcomm CPUfreq driver"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ipq40xx/patches-4.9/0046-cpufreq-qcom-independent-core-clocks.patch b/target/linux/ipq40xx/patches-4.9/0046-cpufreq-qcom-independent-core-clocks.patch deleted file mode 100644 index d767dbf5f..000000000 --- a/target/linux/ipq40xx/patches-4.9/0046-cpufreq-qcom-independent-core-clocks.patch +++ /dev/null @@ -1,66 +0,0 @@ -From patchwork Fri Dec 8 09:42:30 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,12/12] cpufreq: dt: Reintroduce independent_clocks platform data -From: Sricharan R -X-Patchwork-Id: 10102073 -Message-Id: <1512726150-7204-13-git-send-email-sricharan@codeaurora.org> -To: mturquette@baylibre.com, sboyd@codeaurora.org, - devicetree@vger.kernel.org, linux-pm@vger.kernel.org, - linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, - viresh.kumar@linaro.org, linux-arm-kernel@lists.infradead.org -Cc: sricharan@codeaurora.org -Date: Fri, 8 Dec 2017 15:12:30 +0530 - -The Platform data was removed earlier by, -'commit eb96924acddc ("cpufreq: dt: Kill platform-data")' -since there were no users at that time. -Now this is required when the each of the cpu clocks -can be scaled independently, which is the case -for krait cores. So reintroduce it. - -Signed-off-by: Sricharan R ---- - drivers/cpufreq/cpufreq-dt.c | 7 ++++++- - drivers/cpufreq/cpufreq-dt.h | 6 ++++++ - 2 files changed, 12 insertions(+), 1 deletion(-) - ---- a/drivers/cpufreq/cpufreq-dt.c -+++ b/drivers/cpufreq/cpufreq-dt.c -@@ -221,7 +221,10 @@ static int cpufreq_init(struct cpufreq_p - } - - if (fallback) { -- cpumask_setall(policy->cpus); -+ struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data(); -+ -+ if (!pd || !pd->independent_clocks) -+ cpumask_setall(policy->cpus); - - /* - * OPP tables are initialized only for policy->cpu, do it for -@@ -376,6 +379,8 @@ static int dt_cpufreq_probe(struct platf - if (data && data->have_governor_per_policy) - dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY; - -+ dt_cpufreq_driver.driver_data = data; -+ - ret = cpufreq_register_driver(&dt_cpufreq_driver); - if (ret) - dev_err(&pdev->dev, "failed register driver: %d\n", ret); ---- a/drivers/cpufreq/cpufreq-dt.h -+++ b/drivers/cpufreq/cpufreq-dt.h -@@ -13,6 +13,12 @@ - #include - - struct cpufreq_dt_platform_data { -+ /* -+ * True when each CPU has its own clock to control its -+ * frequency, false when all CPUs are controlled by a single -+ * clock. -+ */ -+ bool independent_clocks; - bool have_governor_per_policy; - }; - diff --git a/target/linux/ipq40xx/patches-4.9/0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke.patch b/target/linux/ipq40xx/patches-4.9/0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke.patch deleted file mode 100644 index be4a210f0..000000000 --- a/target/linux/ipq40xx/patches-4.9/0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke.patch +++ /dev/null @@ -1,72 +0,0 @@ -From c7c6a0f50f9ac3620c611ce06ba1f9fafea0444e Mon Sep 17 00:00:00 2001 -From: Archit Taneja -Date: Mon, 3 Aug 2015 10:38:14 +0530 -Subject: [PATCH 47/69] mtd: nand: Create a BBT flag to access bad block - markers in raw mode - -Some controllers can access the factory bad block marker from OOB only -when they read it in raw mode. When ECC is enabled, these controllers -discard reading/writing bad block markers, preventing access to them -altogether. - -The bbt driver assumes MTD_OPS_PLACE_OOB when scanning for bad blocks. -This results in the nand driver's ecc->read_oob() op to be called, which -works with ECC enabled. - -Create a new BBT option flag that tells nand_bbt to force the mode to -MTD_OPS_RAW. This would result in the correct op being called for the -underlying nand controller driver. - -Reviewed-by: Andy Gross -Signed-off-by: Archit Taneja ---- - drivers/mtd/nand/nand_base.c | 6 +++++- - drivers/mtd/nand/nand_bbt.c | 6 +++++- - include/linux/mtd/bbm.h | 6 ++++++ - 3 files changed, 16 insertions(+), 2 deletions(-) - ---- a/drivers/mtd/nand/nand_base.c -+++ b/drivers/mtd/nand/nand_base.c -@@ -488,7 +488,11 @@ static int nand_default_block_markbad(st - } else { - ops.len = ops.ooblen = 1; - } -- ops.mode = MTD_OPS_PLACE_OOB; -+ -+ if (unlikely(chip->bbt_options & NAND_BBT_ACCESS_BBM_RAW)) -+ ops.mode = MTD_OPS_RAW; -+ else -+ ops.mode = MTD_OPS_PLACE_OOB; - - /* Write to first/last page(s) if necessary */ - if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) ---- a/drivers/mtd/nand/nand_bbt.c -+++ b/drivers/mtd/nand/nand_bbt.c -@@ -420,7 +420,11 @@ static int scan_block_fast(struct mtd_in - ops.oobbuf = buf; - ops.ooboffs = 0; - ops.datbuf = NULL; -- ops.mode = MTD_OPS_PLACE_OOB; -+ -+ if (unlikely(bd->options & NAND_BBT_ACCESS_BBM_RAW)) -+ ops.mode = MTD_OPS_RAW; -+ else -+ ops.mode = MTD_OPS_PLACE_OOB; - - for (j = 0; j < numpages; j++) { - /* ---- a/include/linux/mtd/bbm.h -+++ b/include/linux/mtd/bbm.h -@@ -116,6 +116,12 @@ struct nand_bbt_descr { - #define NAND_BBT_NO_OOB_BBM 0x00080000 - - /* -+ * Force MTD_OPS_RAW mode when trying to access bad block markes from OOB. To -+ * be used by controllers which can access BBM only when ECC is disabled, i.e, -+ * when in RAW access mode -+ */ -+#define NAND_BBT_ACCESS_BBM_RAW 0x00100000 -+/* - * Flag set by nand_create_default_bbt_descr(), marking that the nand_bbt_descr - * was allocated dynamicaly and must be freed in nand_release(). Has no meaning - * in nand_chip.bbt_options. diff --git a/target/linux/ipq40xx/patches-4.9/0048-PM-OPP-HACK-Allow-to-set-regulator-without-opp_list.patch b/target/linux/ipq40xx/patches-4.9/0048-PM-OPP-HACK-Allow-to-set-regulator-without-opp_list.patch deleted file mode 100644 index da9c0dbef..000000000 --- a/target/linux/ipq40xx/patches-4.9/0048-PM-OPP-HACK-Allow-to-set-regulator-without-opp_list.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 5c294df1715d673f94f3b0a6e1ea3a426ca35e6e Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Thu, 28 Apr 2016 16:20:12 +0300 -Subject: [PATCH 48/69] PM / OPP: HACK: Allow to set regulator without opp_list - -Signed-off-by: Georgi Djakov ---- - drivers/base/power/opp/core.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/base/power/opp/core.c -+++ b/drivers/base/power/opp/core.c -@@ -1339,12 +1339,13 @@ struct opp_table *dev_pm_opp_set_regulat - ret = -ENOMEM; - goto unlock; - } -- -+#if 0 - /* This should be called before OPPs are initialized */ - if (WARN_ON(!list_empty(&opp_table->opp_list))) { - ret = -EBUSY; - goto err; - } -+#endif - - /* Already have a regulator set */ - if (WARN_ON(!IS_ERR(opp_table->regulator))) { diff --git a/target/linux/ipq40xx/patches-4.9/0049-PM-OPP-Support-adjusting-OPP-voltages-at-runtime.patch b/target/linux/ipq40xx/patches-4.9/0049-PM-OPP-Support-adjusting-OPP-voltages-at-runtime.patch deleted file mode 100644 index e2a4eede8..000000000 --- a/target/linux/ipq40xx/patches-4.9/0049-PM-OPP-Support-adjusting-OPP-voltages-at-runtime.patch +++ /dev/null @@ -1,147 +0,0 @@ -From c949f08cf20fe82971fbdb4015daa38210da492e Mon Sep 17 00:00:00 2001 -From: Stephen Boyd -Date: Fri, 18 Sep 2015 17:52:06 -0700 -Subject: [PATCH 49/69] PM / OPP: Support adjusting OPP voltages at runtime - -On some SoCs the Adaptive Voltage Scaling (AVS) technique is -employed to optimize the operating voltage of a device. At a -given frequency, the hardware monitors dynamic factors and either -makes a suggestion for how much to adjust a voltage for the -current frequency, or it automatically adjusts the voltage -without software intervention. Add an API to the OPP library for -the former case, so that AVS type devices can update the voltages -for an OPP when the hardware determines the voltage should -change. The assumption is that drivers like CPUfreq or devfreq -will register for the OPP notifiers and adjust the voltage -according to suggestions that AVS makes. - -Cc: Nishanth Menon -Acked-by: Viresh Kumar -Signed-off-by: Stephen Boyd -Acked-by: Viresh Kumar -Signed-off-by: Georgi Djakov ---- - drivers/base/power/opp/core.c | 77 +++++++++++++++++++++++++++++++++++++++++++ - include/linux/pm_opp.h | 11 +++++++ - 2 files changed, 88 insertions(+) - ---- a/drivers/base/power/opp/core.c -+++ b/drivers/base/power/opp/core.c -@@ -1521,6 +1521,83 @@ unlock: - } - - /** -+ * dev_pm_opp_adjust_voltage() - helper to change the voltage of an OPP -+ * @dev: device for which we do this operation -+ * @freq: OPP frequency to adjust voltage of -+ * @u_volt: new OPP voltage -+ * -+ * Change the voltage of an OPP with an RCU operation. -+ * -+ * Return: -EINVAL for bad pointers, -ENOMEM if no memory available for the -+ * copy operation, returns 0 if no modifcation was done OR modification was -+ * successful. -+ * -+ * Locking: The internal device_opp and opp structures are RCU protected. -+ * Hence this function internally uses RCU updater strategy with mutex locks to -+ * keep the integrity of the internal data structures. Callers should ensure -+ * that this function is *NOT* called under RCU protection or in contexts where -+ * mutex locking or synchronize_rcu() blocking calls cannot be used. -+ */ -+int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, -+ unsigned long u_volt) -+{ -+ struct opp_table *opp_table; -+ struct dev_pm_opp *new_opp, *tmp_opp, *opp = ERR_PTR(-ENODEV); -+ int r = 0; -+ -+ /* keep the node allocated */ -+ new_opp = kmalloc(sizeof(*new_opp), GFP_KERNEL); -+ if (!new_opp) -+ return -ENOMEM; -+ -+ mutex_lock(&opp_table_lock); -+ -+ /* Find the opp_table */ -+ opp_table = _find_opp_table(dev); -+ if (IS_ERR(opp_table)) { -+ r = PTR_ERR(opp_table); -+ dev_warn(dev, "%s: Device OPP not found (%d)\n", __func__, r); -+ goto unlock; -+ } -+ -+ /* Do we have the frequency? */ -+ list_for_each_entry(tmp_opp, &opp_table->opp_list, node) { -+ if (tmp_opp->rate == freq) { -+ opp = tmp_opp; -+ break; -+ } -+ } -+ if (IS_ERR(opp)) { -+ r = PTR_ERR(opp); -+ goto unlock; -+ } -+ -+ /* Is update really needed? */ -+ if (opp->u_volt == u_volt) -+ goto unlock; -+ /* copy the old data over */ -+ *new_opp = *opp; -+ -+ /* plug in new node */ -+ new_opp->u_volt = u_volt; -+ -+ list_replace_rcu(&opp->node, &new_opp->node); -+ mutex_unlock(&opp_table_lock); -+ call_srcu(&opp_table->srcu_head.srcu, &opp->rcu_head, _kfree_opp_rcu); -+ -+ /* Notify the change of the OPP */ -+ srcu_notifier_call_chain(&opp_table->srcu_head, OPP_EVENT_ADJUST_VOLTAGE, -+ new_opp); -+ -+ return 0; -+ -+unlock: -+ mutex_unlock(&opp_table_lock); -+ kfree(new_opp); -+ return r; -+} -+ -+/** - * dev_pm_opp_enable() - Enable a specific OPP - * @dev: device for which we do this operation - * @freq: OPP frequency to enable ---- a/include/linux/pm_opp.h -+++ b/include/linux/pm_opp.h -@@ -23,6 +23,7 @@ struct opp_table; - - enum dev_pm_opp_event { - OPP_EVENT_ADD, OPP_EVENT_REMOVE, OPP_EVENT_ENABLE, OPP_EVENT_DISABLE, -+ OPP_EVENT_ADJUST_VOLTAGE, - }; - - #if defined(CONFIG_PM_OPP) -@@ -53,6 +54,9 @@ int dev_pm_opp_add(struct device *dev, u - unsigned long u_volt); - void dev_pm_opp_remove(struct device *dev, unsigned long freq); - -+int dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, -+ unsigned long u_volt); -+ - int dev_pm_opp_enable(struct device *dev, unsigned long freq); - - int dev_pm_opp_disable(struct device *dev, unsigned long freq); -@@ -139,6 +143,13 @@ static inline void dev_pm_opp_remove(str - { - } - -+static inline int -+dev_pm_opp_adjust_voltage(struct device *dev, unsigned long freq, -+ unsigned long u_volt) -+{ -+ return 0; -+} -+ - static inline int dev_pm_opp_enable(struct device *dev, unsigned long freq) - { - return 0; diff --git a/target/linux/ipq40xx/patches-4.9/0050-OPP-Allow-notifiers-to-call-dev_pm_opp_get_-voltage-.patch b/target/linux/ipq40xx/patches-4.9/0050-OPP-Allow-notifiers-to-call-dev_pm_opp_get_-voltage-.patch deleted file mode 100644 index 7b41157fd..000000000 --- a/target/linux/ipq40xx/patches-4.9/0050-OPP-Allow-notifiers-to-call-dev_pm_opp_get_-voltage-.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 4a17bbfcf72c94b37079e39a7c1e1e8653f7fe92 Mon Sep 17 00:00:00 2001 -From: Stephen Boyd -Date: Fri, 18 Sep 2015 17:52:07 -0700 -Subject: [PATCH 50/69] OPP: Allow notifiers to call dev_pm_opp_get_{voltage, - freq} RCU-free - -We pass the dev_pm_opp structure to OPP notifiers but the users -of the notifier need to surround calls to dev_pm_opp_get_*() with -RCU read locks to avoid lockdep warnings. The notifier is already -called with the dev_opp's srcu lock held, so it should be safe to -assume the devm_pm_opp structure is already protected inside the -notifier. Update the lockdep check for this. - -Cc: Krzysztof Kozlowski -Signed-off-by: Stephen Boyd -Acked-by: Viresh Kumar -Signed-off-by: Georgi Djakov ---- - drivers/base/power/opp/core.c | 19 ++++++++++--------- - 1 file changed, 10 insertions(+), 9 deletions(-) - ---- a/drivers/base/power/opp/core.c -+++ b/drivers/base/power/opp/core.c -@@ -32,9 +32,10 @@ LIST_HEAD(opp_tables); - /* Lock to allow exclusive modification to the device and opp lists */ - DEFINE_MUTEX(opp_table_lock); - --#define opp_rcu_lockdep_assert() \ -+#define opp_rcu_lockdep_assert(s) \ - do { \ - RCU_LOCKDEP_WARN(!rcu_read_lock_held() && \ -+ !(s && srcu_read_lock_held(s)) && \ - !lockdep_is_held(&opp_table_lock), \ - "Missing rcu_read_lock() or " \ - "opp_table_lock protection"); \ -@@ -72,7 +73,7 @@ struct opp_table *_find_opp_table(struct - { - struct opp_table *opp_table; - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - if (IS_ERR_OR_NULL(dev)) { - pr_err("%s: Invalid parameters\n", __func__); -@@ -106,7 +107,7 @@ unsigned long dev_pm_opp_get_voltage(str - struct dev_pm_opp *tmp_opp; - unsigned long v = 0; - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - tmp_opp = rcu_dereference(opp); - if (IS_ERR_OR_NULL(tmp_opp)) -@@ -138,7 +139,7 @@ unsigned long dev_pm_opp_get_freq(struct - struct dev_pm_opp *tmp_opp; - unsigned long f = 0; - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - tmp_opp = rcu_dereference(opp); - if (IS_ERR_OR_NULL(tmp_opp) || !tmp_opp->available) -@@ -172,7 +173,7 @@ bool dev_pm_opp_is_turbo(struct dev_pm_o - { - struct dev_pm_opp *tmp_opp; - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - tmp_opp = rcu_dereference(opp); - if (IS_ERR_OR_NULL(tmp_opp) || !tmp_opp->available) { -@@ -300,7 +301,7 @@ struct dev_pm_opp *dev_pm_opp_get_suspen - { - struct opp_table *opp_table; - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - opp_table = _find_opp_table(dev); - if (IS_ERR(opp_table) || !opp_table->suspend_opp || -@@ -380,7 +381,7 @@ struct dev_pm_opp *dev_pm_opp_find_freq_ - struct opp_table *opp_table; - struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - opp_table = _find_opp_table(dev); - if (IS_ERR(opp_table)) { -@@ -444,7 +445,7 @@ struct dev_pm_opp *dev_pm_opp_find_freq_ - { - struct opp_table *opp_table; - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - if (!dev || !freq) { - dev_err(dev, "%s: Invalid argument freq=%p\n", __func__, freq); -@@ -486,7 +487,7 @@ struct dev_pm_opp *dev_pm_opp_find_freq_ - struct opp_table *opp_table; - struct dev_pm_opp *temp_opp, *opp = ERR_PTR(-ERANGE); - -- opp_rcu_lockdep_assert(); -+ opp_rcu_lockdep_assert(NULL); - - if (!dev || !freq) { - dev_err(dev, "%s: Invalid argument freq=%p\n", __func__, freq); diff --git a/target/linux/ipq40xx/patches-4.9/0051-PM-OPP-Add-a-helper-to-get-an-opp-regulator-for-devi.patch b/target/linux/ipq40xx/patches-4.9/0051-PM-OPP-Add-a-helper-to-get-an-opp-regulator-for-devi.patch deleted file mode 100644 index fc1a36efc..000000000 --- a/target/linux/ipq40xx/patches-4.9/0051-PM-OPP-Add-a-helper-to-get-an-opp-regulator-for-devi.patch +++ /dev/null @@ -1,52 +0,0 @@ -From d06ca5e7a3cf726f5be5ffd96e93ccd798b8c09a Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Thu, 12 May 2016 14:41:33 +0300 -Subject: [PATCH 51/69] PM / OPP: Add a helper to get an opp regulator for - device - -Signed-off-by: Georgi Djakov ---- - drivers/base/power/opp/core.c | 21 +++++++++++++++++++++ - include/linux/pm_opp.h | 1 + - 2 files changed, 22 insertions(+) - ---- a/drivers/base/power/opp/core.c -+++ b/drivers/base/power/opp/core.c -@@ -151,6 +151,27 @@ unsigned long dev_pm_opp_get_freq(struct - } - EXPORT_SYMBOL_GPL(dev_pm_opp_get_freq); - -+struct regulator *dev_pm_opp_get_regulator(struct device *dev) -+{ -+ struct opp_table *opp_table; -+ struct regulator *reg; -+ -+ rcu_read_lock(); -+ -+ opp_table = _find_opp_table(dev); -+ if (IS_ERR(opp_table)) { -+ rcu_read_unlock(); -+ return ERR_CAST(opp_table); -+ } -+ -+ reg = opp_table->regulator; -+ -+ rcu_read_unlock(); -+ -+ return reg; -+} -+EXPORT_SYMBOL_GPL(dev_pm_opp_get_regulator); -+ - /** - * dev_pm_opp_is_turbo() - Returns if opp is turbo OPP or not - * @opp: opp for which turbo mode is being verified ---- a/include/linux/pm_opp.h -+++ b/include/linux/pm_opp.h -@@ -31,6 +31,7 @@ enum dev_pm_opp_event { - unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp); - - unsigned long dev_pm_opp_get_freq(struct dev_pm_opp *opp); -+struct regulator *dev_pm_opp_get_regulator(struct device *dev); - - bool dev_pm_opp_is_turbo(struct dev_pm_opp *opp); - diff --git a/target/linux/ipq40xx/patches-4.9/0052-PM-OPP-Update-the-voltage-tolerance-when-adjusting-t.patch b/target/linux/ipq40xx/patches-4.9/0052-PM-OPP-Update-the-voltage-tolerance-when-adjusting-t.patch deleted file mode 100644 index 9065911d5..000000000 --- a/target/linux/ipq40xx/patches-4.9/0052-PM-OPP-Update-the-voltage-tolerance-when-adjusting-t.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 4533c285c2aedce6d4434d7b877066de3b1ecb33 Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Thu, 25 Aug 2016 18:43:35 +0300 -Subject: [PATCH 52/69] PM / OPP: Update the voltage tolerance when adjusting - the OPP - -When the voltage is adjusted, the voltage tolerance is not updated. -This can lead to situations where the voltage min value is greater -than the voltage max value. The final result is triggering a BUG() -in the regulator core. -Fix this by updating the voltage tolerance values too. - -Signed-off-by: Georgi Djakov ---- - drivers/base/power/opp/core.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/base/power/opp/core.c -+++ b/drivers/base/power/opp/core.c -@@ -1566,6 +1566,7 @@ int dev_pm_opp_adjust_voltage(struct dev - struct opp_table *opp_table; - struct dev_pm_opp *new_opp, *tmp_opp, *opp = ERR_PTR(-ENODEV); - int r = 0; -+ unsigned long tol; - - /* keep the node allocated */ - new_opp = kmalloc(sizeof(*new_opp), GFP_KERNEL); -@@ -1602,6 +1603,10 @@ int dev_pm_opp_adjust_voltage(struct dev - - /* plug in new node */ - new_opp->u_volt = u_volt; -+ tol = u_volt * opp_table->voltage_tolerance_v1 / 100; -+ new_opp->u_volt = u_volt; -+ new_opp->u_volt_min = u_volt - tol; -+ new_opp->u_volt_max = u_volt + tol; - - list_replace_rcu(&opp->node, &new_opp->node); - mutex_unlock(&opp_table_lock); diff --git a/target/linux/ipq40xx/patches-4.9/0053-regulator-add-smb208-support.patch b/target/linux/ipq40xx/patches-4.9/0053-regulator-add-smb208-support.patch deleted file mode 100644 index 0d2862c60..000000000 --- a/target/linux/ipq40xx/patches-4.9/0053-regulator-add-smb208-support.patch +++ /dev/null @@ -1,55 +0,0 @@ -From ef10381ca4d01848ebedb4afb2c78feb8052f103 Mon Sep 17 00:00:00 2001 -From: Adrian Panella -Date: Thu, 9 Mar 2017 08:26:54 +0100 -Subject: [PATCH 53/69] regulator: add smb208 support - -Signed-off-by: Adrian Panella ---- - Documentation/devicetree/bindings/mfd/qcom-rpm.txt | 4 ++++ - drivers/regulator/qcom_rpm-regulator.c | 9 +++++++++ - 2 files changed, 13 insertions(+) - ---- a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt -+++ b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt -@@ -61,6 +61,7 @@ Regulator nodes are identified by their - "qcom,rpm-pm8901-regulators" - "qcom,rpm-pm8921-regulators" - "qcom,rpm-pm8018-regulators" -+ "qcom,rpm-smb208-regulators" - - - vdd_l0_l1_lvs-supply: - - vdd_l2_l11_l12-supply: -@@ -171,6 +172,9 @@ pm8018: - s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, - l12, l14, lvs1 - -+smb208: -+ s1a, s1b, s2a, s2b -+ - The content of each sub-node is defined by the standard binding for regulators - - see regulator.txt - with additional custom properties described below: - ---- a/drivers/regulator/qcom_rpm-regulator.c -+++ b/drivers/regulator/qcom_rpm-regulator.c -@@ -933,12 +933,21 @@ static const struct rpm_regulator_data r - { } - }; - -+static const struct rpm_regulator_data rpm_smb208_regulators[] = { -+ { "s1a", QCOM_RPM_SMB208_S1a, &smb208_smps, "vin_s1a" }, -+ { "s1b", QCOM_RPM_SMB208_S1b, &smb208_smps, "vin_s1b" }, -+ { "s2a", QCOM_RPM_SMB208_S2a, &smb208_smps, "vin_s2a" }, -+ { "s2b", QCOM_RPM_SMB208_S2b, &smb208_smps, "vin_s2b" }, -+ { } -+}; -+ - static const struct of_device_id rpm_of_match[] = { - { .compatible = "qcom,rpm-pm8018-regulators", - .data = &rpm_pm8018_regulators }, - { .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators }, - { .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators }, - { .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators }, -+ { .compatible = "qcom,rpm-smb208-regulators", .data = &rpm_smb208_regulators }, - { } - }; - MODULE_DEVICE_TABLE(of, rpm_of_match); diff --git a/target/linux/ipq40xx/patches-4.9/0054-cpufreq-dt-Handle-OPP-voltage-adjust-events.patch b/target/linux/ipq40xx/patches-4.9/0054-cpufreq-dt-Handle-OPP-voltage-adjust-events.patch deleted file mode 100644 index 7cd6c6b5a..000000000 --- a/target/linux/ipq40xx/patches-4.9/0054-cpufreq-dt-Handle-OPP-voltage-adjust-events.patch +++ /dev/null @@ -1,144 +0,0 @@ -From 10577f74c35bd395951d1b2382c8d821089b5745 Mon Sep 17 00:00:00 2001 -From: Stephen Boyd -Date: Fri, 18 Sep 2015 17:52:08 -0700 -Subject: [PATCH 54/69] cpufreq-dt: Handle OPP voltage adjust events - -On some SoCs the Adaptive Voltage Scaling (AVS) technique is -employed to optimize the operating voltage of a device. At a -given frequency, the hardware monitors dynamic factors and either -makes a suggestion for how much to adjust a voltage for the -current frequency, or it automatically adjusts the voltage -without software intervention. - -In the former case, an AVS driver will call -dev_pm_opp_modify_voltage() and update the voltage for the -particular OPP the CPUs are using. Add an OPP notifier to -cpufreq-dt so that we can adjust the voltage of the CPU when AVS -updates the OPP. - -Signed-off-by: Stephen Boyd -Acked-by: Viresh Kumar -Signed-off-by: Georgi Djakov ---- - drivers/cpufreq/cpufreq-dt.c | 68 ++++++++++++++++++++++++++++++++++++++++++-- - 1 file changed, 65 insertions(+), 3 deletions(-) - ---- a/drivers/cpufreq/cpufreq-dt.c -+++ b/drivers/cpufreq/cpufreq-dt.c -@@ -32,6 +32,9 @@ struct private_data { - struct device *cpu_dev; - struct thermal_cooling_device *cdev; - const char *reg_name; -+ struct notifier_block opp_nb; -+ struct mutex lock; -+ unsigned long opp_freq; - }; - - static struct freq_attr *cpufreq_dt_attr[] = { -@@ -43,9 +46,16 @@ static struct freq_attr *cpufreq_dt_attr - static int set_target(struct cpufreq_policy *policy, unsigned int index) - { - struct private_data *priv = policy->driver_data; -+ int ret; -+ unsigned long target_freq = policy->freq_table[index].frequency * 1000; -+ -+ mutex_lock(&priv->lock); -+ ret = dev_pm_opp_set_rate(priv->cpu_dev, target_freq); -+ if (!ret) -+ priv->opp_freq = target_freq; -+ mutex_unlock(&priv->lock); - -- return dev_pm_opp_set_rate(priv->cpu_dev, -- policy->freq_table[index].frequency * 1000); -+ return ret; - } - - /* -@@ -86,6 +96,39 @@ node_put: - return name; - } - -+static int opp_notifier(struct notifier_block *nb, unsigned long event, -+ void *data) -+{ -+ struct dev_pm_opp *opp = data; -+ struct private_data *priv = container_of(nb, struct private_data, -+ opp_nb); -+ struct device *cpu_dev = priv->cpu_dev; -+ struct regulator *cpu_reg; -+ unsigned long volt, freq; -+ int ret = 0; -+ -+ if (event == OPP_EVENT_ADJUST_VOLTAGE) { -+ cpu_reg = dev_pm_opp_get_regulator(cpu_dev); -+ if (IS_ERR(cpu_reg)) { -+ ret = PTR_ERR(cpu_reg); -+ goto out; -+ } -+ volt = dev_pm_opp_get_voltage(opp); -+ freq = dev_pm_opp_get_freq(opp); -+ -+ mutex_lock(&priv->lock); -+ if (freq == priv->opp_freq) { -+ ret = regulator_set_voltage_triplet(cpu_reg, volt, volt, volt); -+ } -+ mutex_unlock(&priv->lock); -+ if (ret) -+ dev_err(cpu_dev, "failed to scale voltage: %d\n", ret); -+ } -+ -+out: -+ return notifier_from_errno(ret); -+} -+ - static int resources_available(void) - { - struct device *cpu_dev; -@@ -153,6 +196,7 @@ static int cpufreq_init(struct cpufreq_p - bool fallback = false; - const char *name; - int ret; -+ struct srcu_notifier_head *opp_srcu_head; - - cpu_dev = get_cpu_device(policy->cpu); - if (!cpu_dev) { -@@ -242,13 +286,29 @@ static int cpufreq_init(struct cpufreq_p - goto out_free_opp; - } - -+ mutex_init(&priv->lock); -+ -+ rcu_read_lock(); -+ opp_srcu_head = dev_pm_opp_get_notifier(cpu_dev); -+ if (IS_ERR(opp_srcu_head)) { -+ ret = PTR_ERR(opp_srcu_head); -+ rcu_read_unlock(); -+ goto out_free_priv; -+ } -+ -+ priv->opp_nb.notifier_call = opp_notifier; -+ ret = srcu_notifier_chain_register(opp_srcu_head, &priv->opp_nb); -+ rcu_read_unlock(); -+ if (ret) -+ goto out_free_priv; -+ - priv->reg_name = name; - priv->opp_table = opp_table; - - ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); - if (ret) { - dev_err(cpu_dev, "failed to init cpufreq table: %d\n", ret); -- goto out_free_priv; -+ goto out_unregister_nb; - } - - priv->cpu_dev = cpu_dev; -@@ -287,6 +347,8 @@ static int cpufreq_init(struct cpufreq_p - - out_free_cpufreq_table: - dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table); -+out_unregister_nb: -+ srcu_notifier_chain_unregister(opp_srcu_head, &priv->opp_nb); - out_free_priv: - kfree(priv); - out_free_opp: diff --git a/target/linux/ipq40xx/patches-4.9/0055-cpufreq-dt-Add-L2-frequency-scaling-support.patch b/target/linux/ipq40xx/patches-4.9/0055-cpufreq-dt-Add-L2-frequency-scaling-support.patch deleted file mode 100644 index e0ae1f058..000000000 --- a/target/linux/ipq40xx/patches-4.9/0055-cpufreq-dt-Add-L2-frequency-scaling-support.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 0759cdff49f1cf361bf503c13f7bcb33da43ab95 Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Tue, 8 Sep 2015 11:24:41 +0300 -Subject: [PATCH 55/69] cpufreq-dt: Add L2 frequency scaling support - -Signed-off-by: Georgi Djakov ---- - drivers/cpufreq/cpufreq-dt.c | 41 ++++++++++++++++++++++++++++++++++++++++- - include/linux/cpufreq.h | 2 ++ - 2 files changed, 42 insertions(+), 1 deletion(-) - ---- a/drivers/cpufreq/cpufreq-dt.c -+++ b/drivers/cpufreq/cpufreq-dt.c -@@ -48,11 +48,41 @@ static int set_target(struct cpufreq_pol - struct private_data *priv = policy->driver_data; - int ret; - unsigned long target_freq = policy->freq_table[index].frequency * 1000; -+ struct clk *l2_clk = policy->l2_clk; -+ unsigned int l2_freq; -+ unsigned long new_l2_freq = 0; - - mutex_lock(&priv->lock); - ret = dev_pm_opp_set_rate(priv->cpu_dev, target_freq); -- if (!ret) -+ -+ if (!ret) { -+ if (!IS_ERR(l2_clk) && policy->l2_rate[0] && policy->l2_rate[1] && -+ policy->l2_rate[2]) { -+ static unsigned long krait_l2[CONFIG_NR_CPUS] = { }; -+ int cpu, ret = 0; -+ -+ if (target_freq >= policy->l2_rate[2]) -+ new_l2_freq = policy->l2_rate[2]; -+ else if (target_freq >= policy->l2_rate[1]) -+ new_l2_freq = policy->l2_rate[1]; -+ else -+ new_l2_freq = policy->l2_rate[0]; -+ -+ krait_l2[policy->cpu] = new_l2_freq; -+ for_each_present_cpu(cpu) -+ new_l2_freq = max(new_l2_freq, krait_l2[cpu]); -+ -+ l2_freq = clk_get_rate(l2_clk); -+ -+ if (l2_freq != new_l2_freq) { -+ /* scale l2 with the core */ -+ ret = clk_set_rate(l2_clk, new_l2_freq); -+ } -+ } -+ - priv->opp_freq = target_freq; -+ } -+ - mutex_unlock(&priv->lock); - - return ret; -@@ -197,6 +227,8 @@ static int cpufreq_init(struct cpufreq_p - const char *name; - int ret; - struct srcu_notifier_head *opp_srcu_head; -+ struct device_node *l2_np; -+ struct clk *l2_clk = NULL; - - cpu_dev = get_cpu_device(policy->cpu); - if (!cpu_dev) { -@@ -321,6 +353,13 @@ static int cpufreq_init(struct cpufreq_p - policy->suspend_freq = dev_pm_opp_get_freq(suspend_opp) / 1000; - rcu_read_unlock(); - -+ l2_clk = clk_get(cpu_dev, "l2"); -+ if (!IS_ERR(l2_clk)) -+ policy->l2_clk = l2_clk; -+ l2_np = of_find_node_by_name(NULL, "qcom,l2"); -+ if (l2_np) -+ of_property_read_u32_array(l2_np, "qcom,l2-rates", policy->l2_rate, 3); -+ - ret = cpufreq_table_validate_and_show(policy, freq_table); - if (ret) { - dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__, ---- a/include/linux/cpufreq.h -+++ b/include/linux/cpufreq.h -@@ -73,6 +73,8 @@ struct cpufreq_policy { - unsigned int cpu; /* cpu managing this policy, must be online */ - - struct clk *clk; -+ struct clk *l2_clk; /* L2 clock */ -+ unsigned int l2_rate[3]; /* L2 bus clock rate thresholds */ - struct cpufreq_cpuinfo cpuinfo;/* see above */ - - unsigned int min; /* in kHz */ diff --git a/target/linux/ipq40xx/patches-4.9/0056-cpufreq-dt-Add-missing-rcu-locks.patch b/target/linux/ipq40xx/patches-4.9/0056-cpufreq-dt-Add-missing-rcu-locks.patch deleted file mode 100644 index c0eb2eb3c..000000000 --- a/target/linux/ipq40xx/patches-4.9/0056-cpufreq-dt-Add-missing-rcu-locks.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 001a8dcb56ced58c518aaa10a4f0ba5e878705b6 Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Tue, 17 May 2016 16:15:43 +0300 -Subject: [PATCH 56/69] cpufreq-dt: Add missing rcu locks - -Signed-off-by: Georgi Djakov ---- - drivers/cpufreq/cpufreq-dt.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/cpufreq/cpufreq-dt.c -+++ b/drivers/cpufreq/cpufreq-dt.c -@@ -143,8 +143,10 @@ static int opp_notifier(struct notifier_ - ret = PTR_ERR(cpu_reg); - goto out; - } -+ rcu_read_lock(); - volt = dev_pm_opp_get_voltage(opp); - freq = dev_pm_opp_get_freq(opp); -+ rcu_read_unlock(); - - mutex_lock(&priv->lock); - if (freq == priv->opp_freq) { diff --git a/target/linux/ipq40xx/patches-4.9/0058-clk-qcom-Always-add-factor-clock-for-xo-clocks.patch b/target/linux/ipq40xx/patches-4.9/0058-clk-qcom-Always-add-factor-clock-for-xo-clocks.patch deleted file mode 100644 index f679cf740..000000000 --- a/target/linux/ipq40xx/patches-4.9/0058-clk-qcom-Always-add-factor-clock-for-xo-clocks.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 6081776c1eef63e3083387bb9ec2bf7edf92428b Mon Sep 17 00:00:00 2001 -From: Georgi Djakov -Date: Wed, 2 Nov 2016 17:56:58 +0200 -Subject: [PATCH 58/69] clk: qcom: Always add factor clock for xo clocks - -Currently the RPM/RPM-SMD clock drivers do not register the xo clocks, -so we should always add factor clock. When we later add xo clocks support -into the drivers, we should update this function to skip registration. -By doing so we avoid any DT dependencies. - -Signed-off-by: Georgi Djakov ---- - drivers/clk/qcom/common.c | 15 ++++++--------- - 1 file changed, 6 insertions(+), 9 deletions(-) - ---- a/drivers/clk/qcom/common.c -+++ b/drivers/clk/qcom/common.c -@@ -153,15 +153,12 @@ int qcom_cc_register_board_clk(struct de - const char *name, unsigned long rate) - { - bool add_factor = true; -- struct device_node *node; - -- /* The RPM clock driver will add the factor clock if present */ -- if (IS_ENABLED(CONFIG_QCOM_RPMCC)) { -- node = of_find_compatible_node(NULL, NULL, "qcom,rpmcc"); -- if (of_device_is_available(node)) -- add_factor = false; -- of_node_put(node); -- } -+ /* -+ * TODO: The RPM clock driver currently does not support the xo clock. -+ * When xo is added to the RPM clock driver, we should change this -+ * function to skip registration of xo factor clocks. -+ */ - - return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor); - } diff --git a/target/linux/ipq40xx/patches-4.9/0059-ARM-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch b/target/linux/ipq40xx/patches-4.9/0059-ARM-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch deleted file mode 100644 index b7349863f..000000000 --- a/target/linux/ipq40xx/patches-4.9/0059-ARM-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 04ca10340f1b4d92e849724d322a7ca225d11539 Mon Sep 17 00:00:00 2001 -From: Lina Iyer -Date: Wed, 25 Mar 2015 14:25:29 -0600 -Subject: [PATCH 59/69] ARM: cpuidle: Add cpuidle support for QCOM cpus - -Define ARM_QCOM_CPUIDLE config item to enable cpuidle support. - -Cc: Stephen Boyd -Cc: Arnd Bergmann -Cc: Kevin Hilman -Cc: Daniel Lezcano -Signed-off-by: Lina Iyer ---- - drivers/cpuidle/Kconfig.arm | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/drivers/cpuidle/Kconfig.arm -+++ b/drivers/cpuidle/Kconfig.arm -@@ -74,3 +74,10 @@ config ARM_MVEBU_V7_CPUIDLE - depends on ARCH_MVEBU && !ARM64 - help - Select this to enable cpuidle on Armada 370, 38x and XP processors. -+ -+config ARM_QCOM_CPUIDLE -+ bool "CPU Idle Driver for QCOM processors" -+ depends on ARCH_QCOM -+ select ARM_CPUIDLE -+ help -+ Select this to enable cpuidle on QCOM processors. diff --git a/target/linux/ipq40xx/patches-4.9/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch b/target/linux/ipq40xx/patches-4.9/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch deleted file mode 100644 index c188d0da5..000000000 --- a/target/linux/ipq40xx/patches-4.9/0060-HACK-arch-arm-force-ZRELADDR-on-arch-qcom.patch +++ /dev/null @@ -1,62 +0,0 @@ -From fa71139b55e114aa8c3c4823ff8ee7d49ee810d4 Mon Sep 17 00:00:00 2001 -From: Mathieu Olivari -Date: Wed, 29 Apr 2015 15:21:46 -0700 -Subject: [PATCH 60/69] HACK: arch: arm: force ZRELADDR on arch-qcom - -ARCH_QCOM is using the ARCH_MULTIPLATFORM option, as now recommended -on most ARM architectures. This automatically calculate ZRELADDR by -masking PHYS_OFFSET with 0xf8000000. - -However, on IPQ806x, the first ~20MB of RAM is reserved for the hardware -network accelerators, and the bootloader removes this section from the -layout passed from the ATAGS (when used). - -For newer bootloader, when DT is used, this is not a problem, we just -reserve this memory in the device tree. But if the bootloader doesn't -have DT support, then ATAGS have to be used. In this case, the ARM -decompressor will position the kernel in this low mem, which will not be -in the RAM section mapped by the bootloader, which means the kernel will -freeze in the middle of the boot process trying to map the memory. - -As a work around, this patch allows disabling AUTO_ZRELADDR when -ARCH_QCOM is selected. It makes the zImage usage possible on bootloaders -which don't support device-tree, which is the case on certain early -IPQ806x based designs. - -Signed-off-by: Mathieu Olivari ---- - arch/arm/Kconfig | 2 +- - arch/arm/Makefile | 2 ++ - arch/arm/mach-qcom/Makefile.boot | 1 + - 3 files changed, 4 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/mach-qcom/Makefile.boot - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -331,7 +331,7 @@ config ARCH_MULTIPLATFORM - depends on MMU - select ARM_HAS_SG_CHAIN - select ARM_PATCH_PHYS_VIRT -- select AUTO_ZRELADDR -+ select AUTO_ZRELADDR if !ARCH_QCOM - select CLKSRC_OF - select COMMON_CLK - select GENERIC_CLOCKEVENTS ---- a/arch/arm/Makefile -+++ b/arch/arm/Makefile -@@ -251,9 +251,11 @@ MACHINE := arch/arm/mach-$(word 1,$(mac - else - MACHINE := - endif -+ifeq ($(CONFIG_ARCH_QCOM),) - ifeq ($(CONFIG_ARCH_MULTIPLATFORM),y) - MACHINE := - endif -+endif - - machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) - platdirs := $(patsubst %,arch/arm/plat-%/,$(sort $(plat-y))) ---- /dev/null -+++ b/arch/arm/mach-qcom/Makefile.boot -@@ -0,0 +1 @@ -+zreladdr-y+= 0x42208000 diff --git a/target/linux/ipq40xx/patches-4.9/0061-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch b/target/linux/ipq40xx/patches-4.9/0061-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch deleted file mode 100644 index a4a957545..000000000 --- a/target/linux/ipq40xx/patches-4.9/0061-mtd-rootfs-conflicts-with-OpenWrt-auto-mounting.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 5001f2e1a325b68dbf225bd17f69a4d3d975cca5 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 9 Mar 2017 09:31:44 +0100 -Subject: [PATCH 61/69] mtd: "rootfs" conflicts with OpenWrt auto mounting - -Signed-off-by: John Crispin ---- - drivers/mtd/qcom_smem_part.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/mtd/qcom_smem_part.c -+++ b/drivers/mtd/qcom_smem_part.c -@@ -189,6 +189,10 @@ static int parse_qcom_smem_partitions(st - m_part->size = le32_to_cpu(s_part->size) * (*smem_blksz); - m_part->offset = le32_to_cpu(s_part->start) * (*smem_blksz); - -+ /* "rootfs" conflicts with OpenWrt auto mounting */ -+ if (mtd_type_is_nand(master) && !strcmp(m_part->name, "rootfs")) -+ m_part->name = "ubi"; -+ - /* - * The last SMEM partition may have its size marked as - * something like 0xffffffff, which means "until the end of the diff --git a/target/linux/ipq40xx/patches-4.9/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch b/target/linux/ipq40xx/patches-4.9/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch deleted file mode 100644 index 717934315..000000000 --- a/target/linux/ipq40xx/patches-4.9/0062-ipq806x-gcc-Added-the-enable-regs-and-mask-for-PRNG.patch +++ /dev/null @@ -1,25 +0,0 @@ -From a16fcf911a020e46439a3bb3e702463fc3159831 Mon Sep 17 00:00:00 2001 -From: Abhishek Sahu -Date: Wed, 18 Nov 2015 12:38:56 +0530 -Subject: [PATCH 62/69] ipq806x: gcc: Added the enable regs and mask for PRNG - -kernel got hanged while reading from /dev/hwrng at the -time of PRNG clock enable - -Change-Id: I89856c7e19e6639508e6a2774304583a3ec91172 -Signed-off-by: Abhishek Sahu ---- - drivers/clk/qcom/gcc-ipq806x.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/clk/qcom/gcc-ipq806x.c -+++ b/drivers/clk/qcom/gcc-ipq806x.c -@@ -1233,6 +1233,8 @@ static struct clk_rcg prng_src = { - .parent_map = gcc_pxo_pll8_map, - }, - .clkr = { -+ .enable_reg = 0x2e80, -+ .enable_mask = BIT(11), - .hw.init = &(struct clk_init_data){ - .name = "prng_src", - .parent_names = gcc_pxo_pll8, diff --git a/target/linux/ipq40xx/patches-4.9/0063-1-ipq806x-tsens-driver.patch b/target/linux/ipq40xx/patches-4.9/0063-1-ipq806x-tsens-driver.patch deleted file mode 100644 index 685b0c3ce..000000000 --- a/target/linux/ipq40xx/patches-4.9/0063-1-ipq806x-tsens-driver.patch +++ /dev/null @@ -1,627 +0,0 @@ -From 3302e1e1a3cfa4e67fda2a61d6f0c42205d40932 Mon Sep 17 00:00:00 2001 -From: Rajith Cherian -Date: Tue, 14 Feb 2017 18:30:43 +0530 -Subject: [PATCH] ipq8064: tsens: Base tsens driver for IPQ8064 - -Add TSENS driver template to support IPQ8064. -This is a base file copied from tsens-8960.c - -Change-Id: I47c573fdfa2d898243c6a6ba952d1632f91391f7 -Signed-off-by: Rajith Cherian - -ipq8064: tsens: TSENS driver support for IPQ8064 - -Support for IPQ8064 tsens driver. The driver works -with the thermal framework. The driver overrides the -following fucntionalities: - -1. Get current temperature. -2. Get/Set trip temperatures. -3. Enabled/Disable trip points. -4. ISR for threshold generated interrupt. -5. Notify userspace when trip points are hit. - -Change-Id: I8bc7204fd627d10875ab13fc1de8cb6c2ed7a918 -Signed-off-by: Rajith Cherian ---- - .../devicetree/bindings/thermal/qcom-tsens.txt | 1 + - drivers/thermal/qcom/Makefile | 3 +- - drivers/thermal/qcom/tsens-ipq8064.c | 551 +++++++++++++++++++++ - drivers/thermal/qcom/tsens.c | 3 + - drivers/thermal/qcom/tsens.h | 2 +- - 5 files changed, 558 insertions(+), 2 deletions(-) - create mode 100644 drivers/thermal/qcom/tsens-ipq8064.c - ---- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt -+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt -@@ -5,6 +5,7 @@ Required properties: - - "qcom,msm8916-tsens" : For 8916 Family of SoCs - - "qcom,msm8974-tsens" : For 8974 Family of SoCs - - "qcom,msm8996-tsens" : For 8996 Family of SoCs -+ - "qcom,ipq8064-tsens" : For IPQ8064 - - - reg: Address range of the thermal registers - - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. ---- a/drivers/thermal/qcom/Makefile -+++ b/drivers/thermal/qcom/Makefile -@@ -1,2 +1,3 @@ - obj-$(CONFIG_QCOM_TSENS) += qcom_tsens.o --qcom_tsens-y += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o tsens-8996.o -+qcom_tsens-y += tsens.o tsens-common.o tsens-8916.o tsens-8974.o tsens-8960.o tsens-8996.o \ -+ tsens-ipq8064.o ---- /dev/null -+++ b/drivers/thermal/qcom/tsens-ipq8064.c -@@ -0,0 +1,551 @@ -+/* -+ * Copyright (c) 2015, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "tsens.h" -+ -+#define CAL_MDEGC 30000 -+ -+#define CONFIG_ADDR 0x3640 -+/* CONFIG_ADDR bitmasks */ -+#define CONFIG 0x9b -+#define CONFIG_MASK 0xf -+#define CONFIG_SHIFT 0 -+ -+#define STATUS_CNTL_8064 0x3660 -+#define CNTL_ADDR 0x3620 -+/* CNTL_ADDR bitmasks */ -+#define EN BIT(0) -+#define SW_RST BIT(1) -+#define SENSOR0_EN BIT(3) -+#define SLP_CLK_ENA BIT(26) -+#define MEASURE_PERIOD 1 -+#define SENSOR0_SHIFT 3 -+ -+/* INT_STATUS_ADDR bitmasks */ -+#define MIN_STATUS_MASK BIT(0) -+#define LOWER_STATUS_CLR BIT(1) -+#define UPPER_STATUS_CLR BIT(2) -+#define MAX_STATUS_MASK BIT(3) -+ -+#define THRESHOLD_ADDR 0x3624 -+/* THRESHOLD_ADDR bitmasks */ -+#define THRESHOLD_MAX_CODE 0x20000 -+#define THRESHOLD_MIN_CODE 0 -+#define THRESHOLD_MAX_LIMIT_SHIFT 24 -+#define THRESHOLD_MIN_LIMIT_SHIFT 16 -+#define THRESHOLD_UPPER_LIMIT_SHIFT 8 -+#define THRESHOLD_LOWER_LIMIT_SHIFT 0 -+#define THRESHOLD_MAX_LIMIT_MASK (THRESHOLD_MAX_CODE << \ -+ THRESHOLD_MAX_LIMIT_SHIFT) -+#define THRESHOLD_MIN_LIMIT_MASK (THRESHOLD_MAX_CODE << \ -+ THRESHOLD_MIN_LIMIT_SHIFT) -+#define THRESHOLD_UPPER_LIMIT_MASK (THRESHOLD_MAX_CODE << \ -+ THRESHOLD_UPPER_LIMIT_SHIFT) -+#define THRESHOLD_LOWER_LIMIT_MASK (THRESHOLD_MAX_CODE << \ -+ THRESHOLD_LOWER_LIMIT_SHIFT) -+ -+/* Initial temperature threshold values */ -+#define LOWER_LIMIT_TH 0x9d /* 95C */ -+#define UPPER_LIMIT_TH 0xa6 /* 105C */ -+#define MIN_LIMIT_TH 0x0 -+#define MAX_LIMIT_TH 0xff -+ -+#define S0_STATUS_ADDR 0x3628 -+#define STATUS_ADDR_OFFSET 2 -+#define SENSOR_STATUS_SIZE 4 -+#define INT_STATUS_ADDR 0x363c -+#define TRDY_MASK BIT(7) -+#define TIMEOUT_US 100 -+ -+#define TSENS_EN BIT(0) -+#define TSENS_SW_RST BIT(1) -+#define TSENS_ADC_CLK_SEL BIT(2) -+#define SENSOR0_EN BIT(3) -+#define SENSOR1_EN BIT(4) -+#define SENSOR2_EN BIT(5) -+#define SENSOR3_EN BIT(6) -+#define SENSOR4_EN BIT(7) -+#define SENSORS_EN (SENSOR0_EN | SENSOR1_EN | \ -+ SENSOR2_EN | SENSOR3_EN | SENSOR4_EN) -+#define TSENS_8064_SENSOR5_EN BIT(8) -+#define TSENS_8064_SENSOR6_EN BIT(9) -+#define TSENS_8064_SENSOR7_EN BIT(10) -+#define TSENS_8064_SENSOR8_EN BIT(11) -+#define TSENS_8064_SENSOR9_EN BIT(12) -+#define TSENS_8064_SENSOR10_EN BIT(13) -+#define TSENS_8064_SENSORS_EN (SENSORS_EN | \ -+ TSENS_8064_SENSOR5_EN | \ -+ TSENS_8064_SENSOR6_EN | \ -+ TSENS_8064_SENSOR7_EN | \ -+ TSENS_8064_SENSOR8_EN | \ -+ TSENS_8064_SENSOR9_EN | \ -+ TSENS_8064_SENSOR10_EN) -+ -+#define TSENS_8064_SEQ_SENSORS 5 -+#define TSENS_8064_S4_S5_OFFSET 40 -+#define TSENS_FACTOR 1 -+ -+/* Trips: from very hot to very cold */ -+enum tsens_trip_type { -+ TSENS_TRIP_STAGE3 = 0, -+ TSENS_TRIP_STAGE2, -+ TSENS_TRIP_STAGE1, -+ TSENS_TRIP_STAGE0, -+ TSENS_TRIP_NUM, -+}; -+ -+u32 tsens_8064_slope[] = { -+ 1176, 1176, 1154, 1176, -+ 1111, 1132, 1132, 1199, -+ 1132, 1199, 1132 -+ }; -+ -+/* Temperature on y axis and ADC-code on x-axis */ -+static inline int code_to_degC(u32 adc_code, const struct tsens_sensor *s) -+{ -+ int degcbeforefactor, degc; -+ -+ degcbeforefactor = (adc_code * s->slope) + s->offset; -+ -+ if (degcbeforefactor == 0) -+ degc = degcbeforefactor; -+ else if (degcbeforefactor > 0) -+ degc = (degcbeforefactor + TSENS_FACTOR/2) -+ / TSENS_FACTOR; -+ else -+ degc = (degcbeforefactor - TSENS_FACTOR/2) -+ / TSENS_FACTOR; -+ -+ return degc; -+} -+ -+static int degC_to_code(int degC, const struct tsens_sensor *s) -+{ -+ int code = ((degC * TSENS_FACTOR - s->offset) + (s->slope/2)) -+ / s->slope; -+ -+ if (code > THRESHOLD_MAX_CODE) -+ code = THRESHOLD_MAX_CODE; -+ else if (code < THRESHOLD_MIN_CODE) -+ code = THRESHOLD_MIN_CODE; -+ return code; -+} -+ -+static int suspend_ipq8064(struct tsens_device *tmdev) -+{ -+ int ret; -+ unsigned int mask; -+ struct regmap *map = tmdev->map; -+ -+ ret = regmap_read(map, THRESHOLD_ADDR, &tmdev->ctx.threshold); -+ if (ret) -+ return ret; -+ -+ ret = regmap_read(map, CNTL_ADDR, &tmdev->ctx.control); -+ if (ret) -+ return ret; -+ -+ mask = SLP_CLK_ENA | EN; -+ -+ ret = regmap_update_bits(map, CNTL_ADDR, mask, 0); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int resume_ipq8064(struct tsens_device *tmdev) -+{ -+ int ret; -+ struct regmap *map = tmdev->map; -+ -+ ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST); -+ if (ret) -+ return ret; -+ -+ ret = regmap_update_bits(map, CONFIG_ADDR, CONFIG_MASK, CONFIG); -+ if (ret) -+ return ret; -+ -+ ret = regmap_write(map, THRESHOLD_ADDR, tmdev->ctx.threshold); -+ if (ret) -+ return ret; -+ -+ ret = regmap_write(map, CNTL_ADDR, tmdev->ctx.control); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static void notify_uspace_tsens_fn(struct work_struct *work) -+{ -+ struct tsens_sensor *s = container_of(work, struct tsens_sensor, -+ notify_work); -+ -+ sysfs_notify(&s->tzd->device.kobj, NULL, "type"); -+} -+ -+static void tsens_scheduler_fn(struct work_struct *work) -+{ -+ struct tsens_device *tmdev = container_of(work, struct tsens_device, -+ tsens_work); -+ unsigned int threshold, threshold_low, code, reg, sensor, mask; -+ unsigned int sensor_addr; -+ bool upper_th_x, lower_th_x; -+ int adc_code, ret; -+ -+ ret = regmap_read(tmdev->map, STATUS_CNTL_8064, ®); -+ if (ret) -+ return; -+ reg = reg | LOWER_STATUS_CLR | UPPER_STATUS_CLR; -+ ret = regmap_write(tmdev->map, STATUS_CNTL_8064, reg); -+ if (ret) -+ return; -+ -+ mask = ~(LOWER_STATUS_CLR | UPPER_STATUS_CLR); -+ ret = regmap_read(tmdev->map, THRESHOLD_ADDR, &threshold); -+ if (ret) -+ return; -+ threshold_low = (threshold & THRESHOLD_LOWER_LIMIT_MASK) -+ >> THRESHOLD_LOWER_LIMIT_SHIFT; -+ threshold = (threshold & THRESHOLD_UPPER_LIMIT_MASK) -+ >> THRESHOLD_UPPER_LIMIT_SHIFT; -+ -+ ret = regmap_read(tmdev->map, STATUS_CNTL_8064, ®); -+ if (ret) -+ return; -+ -+ ret = regmap_read(tmdev->map, CNTL_ADDR, &sensor); -+ if (ret) -+ return; -+ sensor &= (uint32_t) TSENS_8064_SENSORS_EN; -+ sensor >>= SENSOR0_SHIFT; -+ -+ /* Constraint: There is only 1 interrupt control register for all -+ * 11 temperature sensor. So monitoring more than 1 sensor based -+ * on interrupts will yield inconsistent result. To overcome this -+ * issue we will monitor only sensor 0 which is the master sensor. -+ */ -+ -+ /* Skip if the sensor is disabled */ -+ if (sensor & 1) { -+ ret = regmap_read(tmdev->map, tmdev->sensor[0].status, &code); -+ if (ret) -+ return; -+ upper_th_x = code >= threshold; -+ lower_th_x = code <= threshold_low; -+ if (upper_th_x) -+ mask |= UPPER_STATUS_CLR; -+ if (lower_th_x) -+ mask |= LOWER_STATUS_CLR; -+ if (upper_th_x || lower_th_x) { -+ /* Notify user space */ -+ schedule_work(&tmdev->sensor[0].notify_work); -+ regmap_read(tmdev->map, sensor_addr, &adc_code); -+ pr_debug("Trigger (%d degrees) for sensor %d\n", -+ code_to_degC(adc_code, &tmdev->sensor[0]), 0); -+ } -+ } -+ regmap_write(tmdev->map, STATUS_CNTL_8064, reg & mask); -+ -+ /* force memory to sync */ -+ mb(); -+} -+ -+static irqreturn_t tsens_isr(int irq, void *data) -+{ -+ struct tsens_device *tmdev = data; -+ -+ schedule_work(&tmdev->tsens_work); -+ return IRQ_HANDLED; -+} -+ -+static void hw_init(struct tsens_device *tmdev) -+{ -+ int ret; -+ unsigned int reg_cntl = 0, reg_cfg = 0, reg_thr = 0; -+ unsigned int reg_status_cntl = 0; -+ -+ regmap_read(tmdev->map, CNTL_ADDR, ®_cntl); -+ regmap_write(tmdev->map, CNTL_ADDR, reg_cntl | TSENS_SW_RST); -+ -+ reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18) -+ | (((1 << tmdev->num_sensors) - 1) << SENSOR0_SHIFT); -+ regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); -+ regmap_read(tmdev->map, STATUS_CNTL_8064, ®_status_cntl); -+ reg_status_cntl |= LOWER_STATUS_CLR | UPPER_STATUS_CLR -+ | MIN_STATUS_MASK | MAX_STATUS_MASK; -+ regmap_write(tmdev->map, STATUS_CNTL_8064, reg_status_cntl); -+ reg_cntl |= TSENS_EN; -+ regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); -+ -+ regmap_read(tmdev->map, CONFIG_ADDR, ®_cfg); -+ reg_cfg = (reg_cfg & ~CONFIG_MASK) | (CONFIG << CONFIG_SHIFT); -+ regmap_write(tmdev->map, CONFIG_ADDR, reg_cfg); -+ -+ reg_thr |= (LOWER_LIMIT_TH << THRESHOLD_LOWER_LIMIT_SHIFT) -+ | (UPPER_LIMIT_TH << THRESHOLD_UPPER_LIMIT_SHIFT) -+ | (MIN_LIMIT_TH << THRESHOLD_MIN_LIMIT_SHIFT) -+ | (MAX_LIMIT_TH << THRESHOLD_MAX_LIMIT_SHIFT); -+ -+ regmap_write(tmdev->map, THRESHOLD_ADDR, reg_thr); -+ -+ ret = devm_request_irq(tmdev->dev, tmdev->tsens_irq, tsens_isr, -+ IRQF_TRIGGER_RISING, "tsens_interrupt", tmdev); -+ if (ret < 0) { -+ pr_err("%s: request_irq FAIL: %d\n", __func__, ret); -+ return; -+ } -+ -+ INIT_WORK(&tmdev->tsens_work, tsens_scheduler_fn); -+} -+ -+static int init_ipq8064(struct tsens_device *tmdev) -+{ -+ int ret, i; -+ u32 reg_cntl, offset = 0; -+ -+ init_common(tmdev); -+ if (!tmdev->map) -+ return -ENODEV; -+ -+ /* -+ * The status registers for each sensor are discontiguous -+ * because some SoCs have 5 sensors while others have more -+ * but the control registers stay in the same place, i.e -+ * directly after the first 5 status registers. -+ */ -+ for (i = 0; i < tmdev->num_sensors; i++) { -+ if (i >= TSENS_8064_SEQ_SENSORS) -+ offset = TSENS_8064_S4_S5_OFFSET; -+ -+ tmdev->sensor[i].status = S0_STATUS_ADDR + offset -+ + (i << STATUS_ADDR_OFFSET); -+ tmdev->sensor[i].slope = tsens_8064_slope[i]; -+ INIT_WORK(&tmdev->sensor[i].notify_work, -+ notify_uspace_tsens_fn); -+ } -+ -+ reg_cntl = SW_RST; -+ ret = regmap_update_bits(tmdev->map, CNTL_ADDR, SW_RST, reg_cntl); -+ if (ret) -+ return ret; -+ -+ reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); -+ reg_cntl &= ~SW_RST; -+ ret = regmap_update_bits(tmdev->map, CONFIG_ADDR, -+ CONFIG_MASK, CONFIG); -+ -+ reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT; -+ ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); -+ if (ret) -+ return ret; -+ -+ reg_cntl |= EN; -+ ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int calibrate_ipq8064(struct tsens_device *tmdev) -+{ -+ int i; -+ char *data, *data_backup; -+ -+ ssize_t num_read = tmdev->num_sensors; -+ struct tsens_sensor *s = tmdev->sensor; -+ -+ data = qfprom_read(tmdev->dev, "calib"); -+ if (IS_ERR(data)) { -+ pr_err("Calibration not found.\n"); -+ return PTR_ERR(data); -+ } -+ -+ data_backup = qfprom_read(tmdev->dev, "calib_backup"); -+ if (IS_ERR(data_backup)) { -+ pr_err("Backup calibration not found.\n"); -+ return PTR_ERR(data_backup); -+ } -+ -+ for (i = 0; i < num_read; i++) { -+ s[i].calib_data = readb_relaxed(data + i); -+ s[i].calib_data_backup = readb_relaxed(data_backup + i); -+ -+ if (s[i].calib_data_backup) -+ s[i].calib_data = s[i].calib_data_backup; -+ if (!s[i].calib_data) { -+ pr_err("QFPROM TSENS calibration data not present\n"); -+ return -ENODEV; -+ } -+ s[i].slope = tsens_8064_slope[i]; -+ s[i].offset = CAL_MDEGC - (s[i].calib_data * s[i].slope); -+ } -+ -+ hw_init(tmdev); -+ -+ return 0; -+} -+ -+static int get_temp_ipq8064(struct tsens_device *tmdev, int id, int *temp) -+{ -+ int ret; -+ u32 code, trdy; -+ const struct tsens_sensor *s = &tmdev->sensor[id]; -+ unsigned long timeout; -+ -+ timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); -+ do { -+ ret = regmap_read(tmdev->map, INT_STATUS_ADDR, &trdy); -+ if (ret) -+ return ret; -+ if (!(trdy & TRDY_MASK)) -+ continue; -+ ret = regmap_read(tmdev->map, s->status, &code); -+ if (ret) -+ return ret; -+ *temp = code_to_degC(code, s); -+ return 0; -+ } while (time_before(jiffies, timeout)); -+ -+ return -ETIMEDOUT; -+} -+ -+static int set_trip_temp_ipq8064(void *data, int trip, int temp) -+{ -+ unsigned int reg_th, reg_cntl; -+ int ret, code, code_chk, hi_code, lo_code; -+ const struct tsens_sensor *s = data; -+ struct tsens_device *tmdev = s->tmdev; -+ -+ code_chk = code = degC_to_code(temp, s); -+ -+ if (code < THRESHOLD_MIN_CODE || code > THRESHOLD_MAX_CODE) -+ return -EINVAL; -+ -+ ret = regmap_read(tmdev->map, STATUS_CNTL_8064, ®_cntl); -+ if (ret) -+ return ret; -+ -+ ret = regmap_read(tmdev->map, THRESHOLD_ADDR, ®_th); -+ if (ret) -+ return ret; -+ -+ hi_code = (reg_th & THRESHOLD_UPPER_LIMIT_MASK) -+ >> THRESHOLD_UPPER_LIMIT_SHIFT; -+ lo_code = (reg_th & THRESHOLD_LOWER_LIMIT_MASK) -+ >> THRESHOLD_LOWER_LIMIT_SHIFT; -+ -+ switch (trip) { -+ case TSENS_TRIP_STAGE3: -+ code <<= THRESHOLD_MAX_LIMIT_SHIFT; -+ reg_th &= ~THRESHOLD_MAX_LIMIT_MASK; -+ break; -+ case TSENS_TRIP_STAGE2: -+ if (code_chk <= lo_code) -+ return -EINVAL; -+ code <<= THRESHOLD_UPPER_LIMIT_SHIFT; -+ reg_th &= ~THRESHOLD_UPPER_LIMIT_MASK; -+ break; -+ case TSENS_TRIP_STAGE1: -+ if (code_chk >= hi_code) -+ return -EINVAL; -+ code <<= THRESHOLD_LOWER_LIMIT_SHIFT; -+ reg_th &= ~THRESHOLD_LOWER_LIMIT_MASK; -+ break; -+ case TSENS_TRIP_STAGE0: -+ code <<= THRESHOLD_MIN_LIMIT_SHIFT; -+ reg_th &= ~THRESHOLD_MIN_LIMIT_MASK; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ ret = regmap_write(tmdev->map, THRESHOLD_ADDR, reg_th | code); -+ if (ret) -+ return ret; -+ -+ return 0; -+} -+ -+static int set_trip_activate_ipq8064(void *data, int trip, -+ enum thermal_trip_activation_mode mode) -+{ -+ unsigned int reg_cntl, mask, val; -+ const struct tsens_sensor *s = data; -+ struct tsens_device *tmdev = s->tmdev; -+ int ret; -+ -+ if (!tmdev || trip < 0) -+ return -EINVAL; -+ -+ ret = regmap_read(tmdev->map, STATUS_CNTL_8064, ®_cntl); -+ if (ret) -+ return ret; -+ -+ switch (trip) { -+ case TSENS_TRIP_STAGE3: -+ mask = MAX_STATUS_MASK; -+ break; -+ case TSENS_TRIP_STAGE2: -+ mask = UPPER_STATUS_CLR; -+ break; -+ case TSENS_TRIP_STAGE1: -+ mask = LOWER_STATUS_CLR; -+ break; -+ case TSENS_TRIP_STAGE0: -+ mask = MIN_STATUS_MASK; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (mode == THERMAL_TRIP_ACTIVATION_DISABLED) -+ val = reg_cntl | mask; -+ else -+ val = reg_cntl & ~mask; -+ -+ ret = regmap_write(tmdev->map, STATUS_CNTL_8064, val); -+ if (ret) -+ return ret; -+ -+ /* force memory to sync */ -+ mb(); -+ return 0; -+} -+ -+const struct tsens_ops ops_ipq8064 = { -+ .init = init_ipq8064, -+ .calibrate = calibrate_ipq8064, -+ .get_temp = get_temp_ipq8064, -+ .suspend = suspend_ipq8064, -+ .resume = resume_ipq8064, -+ .set_trip_temp = set_trip_temp_ipq8064, -+ .set_trip_activate = set_trip_activate_ipq8064, -+}; -+ -+const struct tsens_data data_ipq8064 = { -+ .num_sensors = 11, -+ .ops = &ops_ipq8064, -+}; ---- a/drivers/thermal/qcom/tsens.c -+++ b/drivers/thermal/qcom/tsens.c -@@ -72,6 +72,9 @@ static const struct of_device_id tsens_t - }, { - .compatible = "qcom,msm8996-tsens", - .data = &data_8996, -+ }, { -+ .compatible = "qcom,ipq8064-tsens", -+ .data = &data_ipq8064, - }, - {} - }; ---- a/drivers/thermal/qcom/tsens.h -+++ b/drivers/thermal/qcom/tsens.h -@@ -89,6 +89,6 @@ void compute_intercept_slope(struct tsen - int init_common(struct tsens_device *); - int get_temp_common(struct tsens_device *, int, int *); - --extern const struct tsens_data data_8916, data_8974, data_8960, data_8996; -+extern const struct tsens_data data_8916, data_8974, data_8960, data_8996, data_ipq8064; - - #endif /* __QCOM_TSENS_H__ */ diff --git a/target/linux/ipq40xx/patches-4.9/0063-2-tsens-support-configurable-interrupts.patch b/target/linux/ipq40xx/patches-4.9/0063-2-tsens-support-configurable-interrupts.patch deleted file mode 100644 index ca9897049..000000000 --- a/target/linux/ipq40xx/patches-4.9/0063-2-tsens-support-configurable-interrupts.patch +++ /dev/null @@ -1,462 +0,0 @@ -From 4e87400732c77765afae2ea89ed43837457aa604 Mon Sep 17 00:00:00 2001 -From: Rajith Cherian -Date: Wed, 1 Feb 2017 19:00:26 +0530 -Subject: [PATCH] ipq8064: tsens: Support for configurable interrupts - -Provide support for adding configurable high and -configurable low trip temperatures. An interrupts is -also triggerred when these trip points are hit. The -interrupts can be activated or deactivated from sysfs. -This functionality is made available only if -CONFIG_THERMAL_WRITABLE_TRIPS is defined. - -Change-Id: Ib73f3f9459de4fffce7bb985a0312a88291f4934 -Signed-off-by: Rajith Cherian ---- - .../devicetree/bindings/thermal/qcom-tsens.txt | 4 ++ - drivers/thermal/of-thermal.c | 63 ++++++++++++++++++---- - drivers/thermal/qcom/tsens.c | 43 ++++++++++++--- - drivers/thermal/qcom/tsens.h | 11 ++++ - drivers/thermal/thermal_core.c | 44 ++++++++++++++- - include/linux/thermal.h | 14 +++++ - 6 files changed, 162 insertions(+), 17 deletions(-) - ---- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt -+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt -@@ -12,11 +12,15 @@ Required properties: - - Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify - nvmem cells - -+Optional properties: -+- interrupts: Interrupt which gets triggered when threshold is hit -+ - Example: - tsens: thermal-sensor@900000 { - compatible = "qcom,msm8916-tsens"; - reg = <0x4a8000 0x2000>; - nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; - nvmem-cell-names = "caldata", "calsel"; -+ interrupts = <0 178 0>; - #thermal-sensor-cells = <1>; - }; ---- a/drivers/thermal/of-thermal.c -+++ b/drivers/thermal/of-thermal.c -@@ -95,7 +95,7 @@ static int of_thermal_get_temp(struct th - { - struct __thermal_zone *data = tz->devdata; - -- if (!data->ops->get_temp) -+ if (!data->ops->get_temp || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EINVAL; - - return data->ops->get_temp(data->sensor_data, temp); -@@ -106,7 +106,8 @@ static int of_thermal_set_trips(struct t - { - struct __thermal_zone *data = tz->devdata; - -- if (!data->ops || !data->ops->set_trips) -+ if (!data->ops || !data->ops->set_trips -+ || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EINVAL; - - return data->ops->set_trips(data->sensor_data, low, high); -@@ -192,6 +193,9 @@ static int of_thermal_set_emul_temp(stru - { - struct __thermal_zone *data = tz->devdata; - -+ if (data->mode == THERMAL_DEVICE_DISABLED) -+ return -EINVAL; -+ - return data->ops->set_emul_temp(data->sensor_data, temp); - } - -@@ -200,7 +204,7 @@ static int of_thermal_get_trend(struct t - { - struct __thermal_zone *data = tz->devdata; - -- if (!data->ops->get_trend) -+ if (!data->ops->get_trend || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EINVAL; - - return data->ops->get_trend(data->sensor_data, trip, trend); -@@ -286,7 +290,9 @@ static int of_thermal_set_mode(struct th - mutex_unlock(&tz->lock); - - data->mode = mode; -- thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED); -+ -+ if (mode == THERMAL_DEVICE_ENABLED) -+ thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED); - - return 0; - } -@@ -296,7 +302,8 @@ static int of_thermal_get_trip_type(stru - { - struct __thermal_zone *data = tz->devdata; - -- if (trip >= data->ntrips || trip < 0) -+ if (trip >= data->ntrips || trip < 0 -+ || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EDOM; - - *type = data->trips[trip].type; -@@ -304,12 +311,39 @@ static int of_thermal_get_trip_type(stru - return 0; - } - -+static int of_thermal_activate_trip_type(struct thermal_zone_device *tz, -+ int trip, enum thermal_trip_activation_mode mode) -+{ -+ struct __thermal_zone *data = tz->devdata; -+ -+ if (trip >= data->ntrips || trip < 0 -+ || (data->mode == THERMAL_DEVICE_DISABLED)) -+ return -EDOM; -+ -+ /* -+ * The configurable_hi and configurable_lo trip points can be -+ * activated and deactivated. -+ */ -+ -+ if (data->ops->set_trip_activate) { -+ int ret; -+ -+ ret = data->ops->set_trip_activate(data->sensor_data, -+ trip, mode); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ - static int of_thermal_get_trip_temp(struct thermal_zone_device *tz, int trip, - int *temp) - { - struct __thermal_zone *data = tz->devdata; - -- if (trip >= data->ntrips || trip < 0) -+ if (trip >= data->ntrips || trip < 0 -+ || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EDOM; - - *temp = data->trips[trip].temperature; -@@ -322,7 +356,8 @@ static int of_thermal_set_trip_temp(stru - { - struct __thermal_zone *data = tz->devdata; - -- if (trip >= data->ntrips || trip < 0) -+ if (trip >= data->ntrips || trip < 0 -+ || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EDOM; - - if (data->ops->set_trip_temp) { -@@ -344,7 +379,8 @@ static int of_thermal_get_trip_hyst(stru - { - struct __thermal_zone *data = tz->devdata; - -- if (trip >= data->ntrips || trip < 0) -+ if (trip >= data->ntrips || trip < 0 -+ || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EDOM; - - *hyst = data->trips[trip].hysteresis; -@@ -357,7 +393,8 @@ static int of_thermal_set_trip_hyst(stru - { - struct __thermal_zone *data = tz->devdata; - -- if (trip >= data->ntrips || trip < 0) -+ if (trip >= data->ntrips || trip < 0 -+ || (data->mode == THERMAL_DEVICE_DISABLED)) - return -EDOM; - - /* thermal framework should take care of data->mask & (1 << trip) */ -@@ -432,6 +469,9 @@ thermal_zone_of_add_sensor(struct device - if (ops->set_emul_temp) - tzd->ops->set_emul_temp = of_thermal_set_emul_temp; - -+ if (ops->set_trip_activate) -+ tzd->ops->set_trip_activate = of_thermal_activate_trip_type; -+ - mutex_unlock(&tzd->lock); - - return tzd; -@@ -726,7 +766,10 @@ static const char * const trip_types[] = - [THERMAL_TRIP_ACTIVE] = "active", - [THERMAL_TRIP_PASSIVE] = "passive", - [THERMAL_TRIP_HOT] = "hot", -- [THERMAL_TRIP_CRITICAL] = "critical", -+ [THERMAL_TRIP_CRITICAL] = "critical_high", -+ [THERMAL_TRIP_CONFIGURABLE_HI] = "configurable_hi", -+ [THERMAL_TRIP_CONFIGURABLE_LOW] = "configurable_lo", -+ [THERMAL_TRIP_CRITICAL_LOW] = "critical_low", - }; - - /** ---- a/drivers/thermal/qcom/tsens.c -+++ b/drivers/thermal/qcom/tsens.c -@@ -31,7 +31,7 @@ static int tsens_get_temp(void *data, in - - static int tsens_get_trend(void *p, int trip, enum thermal_trend *trend) - { -- const struct tsens_sensor *s = p; -+ struct tsens_sensor *s = p; - struct tsens_device *tmdev = s->tmdev; - - if (tmdev->ops->get_trend) -@@ -40,9 +40,10 @@ static int tsens_get_trend(void *p, int - return -ENOTSUPP; - } - --static int __maybe_unused tsens_suspend(struct device *dev) -+static int __maybe_unused tsens_suspend(void *data) - { -- struct tsens_device *tmdev = dev_get_drvdata(dev); -+ struct tsens_sensor *s = data; -+ struct tsens_device *tmdev = s->tmdev; - - if (tmdev->ops && tmdev->ops->suspend) - return tmdev->ops->suspend(tmdev); -@@ -50,9 +51,10 @@ static int __maybe_unused tsens_suspend - return 0; - } - --static int __maybe_unused tsens_resume(struct device *dev) -+static int __maybe_unused tsens_resume(void *data) - { -- struct tsens_device *tmdev = dev_get_drvdata(dev); -+ struct tsens_sensor *s = data; -+ struct tsens_device *tmdev = s->tmdev; - - if (tmdev->ops && tmdev->ops->resume) - return tmdev->ops->resume(tmdev); -@@ -60,6 +62,30 @@ static int __maybe_unused tsens_resume(s - return 0; - } - -+static int __maybe_unused tsens_set_trip_temp(void *data, int trip, int temp) -+{ -+ struct tsens_sensor *s = data; -+ struct tsens_device *tmdev = s->tmdev; -+ -+ if (tmdev->ops && tmdev->ops->set_trip_temp) -+ return tmdev->ops->set_trip_temp(s, trip, temp); -+ -+ return 0; -+} -+ -+static int __maybe_unused tsens_activate_trip_type(void *data, int trip, -+ enum thermal_trip_activation_mode mode) -+{ -+ struct tsens_sensor *s = data; -+ struct tsens_device *tmdev = s->tmdev; -+ -+ if (tmdev->ops && tmdev->ops->set_trip_activate) -+ return tmdev->ops->set_trip_activate(s, trip, mode); -+ -+ return 0; -+} -+ -+ - static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume); - - static const struct of_device_id tsens_table[] = { -@@ -83,6 +109,8 @@ MODULE_DEVICE_TABLE(of, tsens_table); - static const struct thermal_zone_of_device_ops tsens_of_ops = { - .get_temp = tsens_get_temp, - .get_trend = tsens_get_trend, -+ .set_trip_temp = tsens_set_trip_temp, -+ .set_trip_activate = tsens_activate_trip_type, - }; - - static int tsens_register(struct tsens_device *tmdev) -@@ -131,7 +159,7 @@ static int tsens_probe(struct platform_d - if (id) - data = id->data; - else -- data = &data_8960; -+ return -EINVAL; - - if (data->num_sensors <= 0) { - dev_err(dev, "invalid number of sensors\n"); -@@ -146,6 +174,9 @@ static int tsens_probe(struct platform_d - tmdev->dev = dev; - tmdev->num_sensors = data->num_sensors; - tmdev->ops = data->ops; -+ -+ tmdev->tsens_irq = platform_get_irq(pdev, 0); -+ - for (i = 0; i < tmdev->num_sensors; i++) { - if (data->hw_ids) - tmdev->sensor[i].hw_id = data->hw_ids[i]; ---- a/drivers/thermal/qcom/tsens.h -+++ b/drivers/thermal/qcom/tsens.h -@@ -24,9 +24,12 @@ struct tsens_device; - struct tsens_sensor { - struct tsens_device *tmdev; - struct thermal_zone_device *tzd; -+ struct work_struct notify_work; - int offset; - int id; - int hw_id; -+ int calib_data; -+ int calib_data_backup; - int slope; - u32 status; - }; -@@ -41,6 +44,9 @@ struct tsens_sensor { - * @suspend: Function to suspend the tsens device - * @resume: Function to resume the tsens device - * @get_trend: Function to get the thermal/temp trend -+ * @set_trip_temp: Function to set trip temp -+ * @get_trip_temp: Function to get trip temp -+ * @set_trip_activate: Function to activate trip points - */ - struct tsens_ops { - /* mandatory callbacks */ -@@ -53,6 +59,9 @@ struct tsens_ops { - int (*suspend)(struct tsens_device *); - int (*resume)(struct tsens_device *); - int (*get_trend)(struct tsens_device *, int, enum thermal_trend *); -+ int (*set_trip_temp)(void *, int, int); -+ int (*set_trip_activate)(void *, int, -+ enum thermal_trip_activation_mode); - }; - - /** -@@ -76,11 +85,13 @@ struct tsens_context { - struct tsens_device { - struct device *dev; - u32 num_sensors; -+ u32 tsens_irq; - struct regmap *map; - struct regmap_field *status_field; - struct tsens_context ctx; - bool trdy; - const struct tsens_ops *ops; -+ struct work_struct tsens_work; - struct tsens_sensor sensor[0]; - }; - ---- a/drivers/thermal/thermal_core.c -+++ b/drivers/thermal/thermal_core.c -@@ -732,12 +732,48 @@ trip_point_type_show(struct device *dev, - return sprintf(buf, "passive\n"); - case THERMAL_TRIP_ACTIVE: - return sprintf(buf, "active\n"); -+ case THERMAL_TRIP_CONFIGURABLE_HI: -+ return sprintf(buf, "configurable_hi\n"); -+ case THERMAL_TRIP_CONFIGURABLE_LOW: -+ return sprintf(buf, "configurable_low\n"); -+ case THERMAL_TRIP_CRITICAL_LOW: -+ return sprintf(buf, "critical_low\n"); - default: - return sprintf(buf, "unknown\n"); - } - } - - static ssize_t -+trip_point_type_activate(struct device *dev, struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct thermal_zone_device *tz = to_thermal_zone(dev); -+ int trip, ret; -+ char *enabled = "enabled"; -+ char *disabled = "disabled"; -+ -+ if (!tz->ops->set_trip_activate) -+ return -EPERM; -+ -+ if (!sscanf(attr->attr.name, "trip_point_%d_type", &trip)) -+ return -EINVAL; -+ -+ if (!strncmp(buf, enabled, strlen(enabled))) -+ ret = tz->ops->set_trip_activate(tz, trip, -+ THERMAL_TRIP_ACTIVATION_ENABLED); -+ else if (!strncmp(buf, disabled, strlen(disabled))) -+ ret = tz->ops->set_trip_activate(tz, trip, -+ THERMAL_TRIP_ACTIVATION_DISABLED); -+ else -+ ret = -EINVAL; -+ -+ if (ret) -+ return ret; -+ -+ return count; -+} -+ -+static ssize_t - trip_point_temp_store(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count) - { -@@ -1321,7 +1357,7 @@ thermal_cooling_device_weight_store(stru - */ - int thermal_zone_bind_cooling_device(struct thermal_zone_device *tz, - int trip, -- struct thermal_cooling_device *cdev, -+ struct thermal_cooling_device *cdev, - unsigned long upper, unsigned long lower, - unsigned int weight) - { -@@ -1772,6 +1808,12 @@ static int create_trip_attrs(struct ther - tz->trip_type_attrs[indx].attr.attr.mode = S_IRUGO; - tz->trip_type_attrs[indx].attr.show = trip_point_type_show; - -+ if (IS_ENABLED(CONFIG_THERMAL_WRITABLE_TRIPS)) { -+ tz->trip_type_attrs[indx].attr.store -+ = trip_point_type_activate; -+ tz->trip_type_attrs[indx].attr.attr.mode |= S_IWUSR; -+ } -+ - device_create_file(&tz->device, - &tz->trip_type_attrs[indx].attr); - ---- a/include/linux/thermal.h -+++ b/include/linux/thermal.h -@@ -77,11 +77,19 @@ enum thermal_device_mode { - THERMAL_DEVICE_ENABLED, - }; - -+enum thermal_trip_activation_mode { -+ THERMAL_TRIP_ACTIVATION_DISABLED = 0, -+ THERMAL_TRIP_ACTIVATION_ENABLED, -+}; -+ - enum thermal_trip_type { - THERMAL_TRIP_ACTIVE = 0, - THERMAL_TRIP_PASSIVE, - THERMAL_TRIP_HOT, - THERMAL_TRIP_CRITICAL, -+ THERMAL_TRIP_CONFIGURABLE_HI, -+ THERMAL_TRIP_CONFIGURABLE_LOW, -+ THERMAL_TRIP_CRITICAL_LOW, - }; - - enum thermal_trend { -@@ -118,6 +126,8 @@ struct thermal_zone_device_ops { - enum thermal_trip_type *); - int (*get_trip_temp) (struct thermal_zone_device *, int, int *); - int (*set_trip_temp) (struct thermal_zone_device *, int, int); -+ int (*set_trip_activate) (struct thermal_zone_device *, int, -+ enum thermal_trip_activation_mode); - int (*get_trip_hyst) (struct thermal_zone_device *, int, int *); - int (*set_trip_hyst) (struct thermal_zone_device *, int, int); - int (*get_crit_temp) (struct thermal_zone_device *, int *); -@@ -360,6 +370,8 @@ struct thermal_genl_event { - * temperature. - * @set_trip_temp: a pointer to a function that sets the trip temperature on - * hardware. -+ * @activate_trip_type: a pointer to a function to enable/disable trip -+ * temperature interrupts - */ - struct thermal_zone_of_device_ops { - int (*get_temp)(void *, int *); -@@ -367,6 +379,8 @@ struct thermal_zone_of_device_ops { - int (*set_trips)(void *, int, int); - int (*set_emul_temp)(void *, int); - int (*set_trip_temp)(void *, int, int); -+ int (*set_trip_activate)(void *, int, -+ enum thermal_trip_activation_mode); - }; - - /** diff --git a/target/linux/ipq40xx/patches-4.9/0064-clk-clk-rpm-fixes.patch b/target/linux/ipq40xx/patches-4.9/0064-clk-clk-rpm-fixes.patch deleted file mode 100644 index b803488a1..000000000 --- a/target/linux/ipq40xx/patches-4.9/0064-clk-clk-rpm-fixes.patch +++ /dev/null @@ -1,93 +0,0 @@ -From d30840e2b1cf79d90392e6051b0c0b6006d29d8b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 9 Mar 2017 09:32:40 +0100 -Subject: [PATCH 64/69] clk: clk-rpm fixes - -Signed-off-by: John Crispin ---- - .../devicetree/bindings/clock/qcom,rpmcc.txt | 1 + - drivers/clk/qcom/clk-rpm.c | 35 ++++++++++++++++++++++ - include/dt-bindings/clock/qcom,rpmcc.h | 4 +++ - 3 files changed, 40 insertions(+) - ---- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt -+++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt -@@ -12,6 +12,7 @@ Required properties : - - "qcom,rpmcc-msm8916", "qcom,rpmcc" - "qcom,rpmcc-apq8064", "qcom,rpmcc" -+ "qcom,rpmcc-ipq806x", "qcom,rpmcc" - - - #clock-cells : shall contain 1 - ---- a/drivers/clk/qcom/clk-rpm.c -+++ b/drivers/clk/qcom/clk-rpm.c -@@ -359,6 +359,16 @@ DEFINE_CLK_RPM(apq8064, sfab_clk, sfab_a - DEFINE_CLK_RPM(apq8064, sfpb_clk, sfpb_a_clk, QCOM_RPM_SFPB_CLK); - DEFINE_CLK_RPM(apq8064, qdss_clk, qdss_a_clk, QCOM_RPM_QDSS_CLK); - -+/* ipq806x */ -+DEFINE_CLK_RPM(ipq806x, afab_clk, afab_a_clk, QCOM_RPM_APPS_FABRIC_CLK); -+DEFINE_CLK_RPM(ipq806x, cfpb_clk, cfpb_a_clk, QCOM_RPM_CFPB_CLK); -+DEFINE_CLK_RPM(ipq806x, daytona_clk, daytona_a_clk, QCOM_RPM_DAYTONA_FABRIC_CLK); -+DEFINE_CLK_RPM(ipq806x, ebi1_clk, ebi1_a_clk, QCOM_RPM_EBI1_CLK); -+DEFINE_CLK_RPM(ipq806x, sfab_clk, sfab_a_clk, QCOM_RPM_SYS_FABRIC_CLK); -+DEFINE_CLK_RPM(ipq806x, sfpb_clk, sfpb_a_clk, QCOM_RPM_SFPB_CLK); -+DEFINE_CLK_RPM(ipq806x, nss_fabric_0_clk, nss_fabric_0_a_clk, QCOM_RPM_NSS_FABRIC_0_CLK); -+DEFINE_CLK_RPM(ipq806x, nss_fabric_1_clk, nss_fabric_1_a_clk, QCOM_RPM_NSS_FABRIC_1_CLK); -+ - static struct clk_rpm *apq8064_clks[] = { - [RPM_APPS_FABRIC_CLK] = &apq8064_afab_clk, - [RPM_APPS_FABRIC_A_CLK] = &apq8064_afab_a_clk, -@@ -380,13 +390,38 @@ static struct clk_rpm *apq8064_clks[] = - [RPM_QDSS_A_CLK] = &apq8064_qdss_a_clk, - }; - -+static struct clk_rpm *ipq806x_clks[] = { -+ [RPM_APPS_FABRIC_CLK] = &ipq806x_afab_clk, -+ [RPM_APPS_FABRIC_A_CLK] = &ipq806x_afab_a_clk, -+ [RPM_CFPB_CLK] = &ipq806x_cfpb_clk, -+ [RPM_CFPB_A_CLK] = &ipq806x_cfpb_a_clk, -+ [RPM_DAYTONA_FABRIC_CLK] = &ipq806x_daytona_clk, -+ [RPM_DAYTONA_FABRIC_A_CLK] = &ipq806x_daytona_a_clk, -+ [RPM_EBI1_CLK] = &ipq806x_ebi1_clk, -+ [RPM_EBI1_A_CLK] = &ipq806x_ebi1_a_clk, -+ [RPM_SYS_FABRIC_CLK] = &ipq806x_sfab_clk, -+ [RPM_SYS_FABRIC_A_CLK] = &ipq806x_sfab_a_clk, -+ [RPM_SFPB_CLK] = &ipq806x_sfpb_clk, -+ [RPM_SFPB_A_CLK] = &ipq806x_sfpb_a_clk, -+ [RPM_NSS_FABRIC_0_CLK] = &ipq806x_nss_fabric_0_clk, -+ [RPM_NSS_FABRIC_0_A_CLK] = &ipq806x_nss_fabric_0_a_clk, -+ [RPM_NSS_FABRIC_1_CLK] = &ipq806x_nss_fabric_1_clk, -+ [RPM_NSS_FABRIC_1_A_CLK] = &ipq806x_nss_fabric_1_a_clk, -+}; -+ - static const struct rpm_clk_desc rpm_clk_apq8064 = { - .clks = apq8064_clks, - .num_clks = ARRAY_SIZE(apq8064_clks), - }; - -+static const struct rpm_clk_desc rpm_clk_ipq806x = { -+ .clks = ipq806x_clks, -+ .num_clks = ARRAY_SIZE(ipq806x_clks), -+}; -+ - static const struct of_device_id rpm_clk_match_table[] = { - { .compatible = "qcom,rpmcc-apq8064", .data = &rpm_clk_apq8064 }, -+ { .compatible = "qcom,rpmcc-ipq806x", .data = &rpm_clk_ipq806x }, - { } - }; - MODULE_DEVICE_TABLE(of, rpm_clk_match_table); ---- a/include/dt-bindings/clock/qcom,rpmcc.h -+++ b/include/dt-bindings/clock/qcom,rpmcc.h -@@ -37,6 +37,10 @@ - #define RPM_SYS_FABRIC_A_CLK 19 - #define RPM_SFPB_CLK 20 - #define RPM_SFPB_A_CLK 21 -+#define RPM_NSS_FABRIC_0_CLK 22 -+#define RPM_NSS_FABRIC_0_A_CLK 23 -+#define RPM_NSS_FABRIC_1_CLK 24 -+#define RPM_NSS_FABRIC_1_A_CLK 25 - - /* msm8916 */ - #define RPM_SMD_XO_CLK_SRC 0 diff --git a/target/linux/ipq40xx/patches-4.9/0065-arm-override-compiler-flags.patch b/target/linux/ipq40xx/patches-4.9/0065-arm-override-compiler-flags.patch deleted file mode 100644 index e5af7ffa2..000000000 --- a/target/linux/ipq40xx/patches-4.9/0065-arm-override-compiler-flags.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 4d8e29642661397a339ac3485f212c6360445421 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 9 Mar 2017 09:33:32 +0100 -Subject: [PATCH 65/69] arm: override compiler flags - -Signed-off-by: John Crispin ---- - arch/arm/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/Makefile -+++ b/arch/arm/Makefile -@@ -65,7 +65,7 @@ KBUILD_CFLAGS += $(call cc-option,-fno-i - # macro, but instead defines a whole series of macros which makes - # testing for a specific architecture or later rather impossible. - arch-$(CONFIG_CPU_32v7M) =-D__LINUX_ARM_ARCH__=7 -march=armv7-m -Wa,-march=armv7-m --arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a) -+arch-$(CONFIG_CPU_32v7) =-D__LINUX_ARM_ARCH__=7 -mcpu=cortex-a15 - arch-$(CONFIG_CPU_32v6) =-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) - # Only override the compiler option if ARMv6. The ARMv6K extensions are - # always available in ARMv7 diff --git a/target/linux/ipq40xx/patches-4.9/0067-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/ipq40xx/patches-4.9/0067-generic-Mangle-bootloader-s-kernel-arguments.patch deleted file mode 100644 index 478dad786..000000000 --- a/target/linux/ipq40xx/patches-4.9/0067-generic-Mangle-bootloader-s-kernel-arguments.patch +++ /dev/null @@ -1,189 +0,0 @@ -From 71270226b14733a4b1f2cde58ea9265caa50b38d Mon Sep 17 00:00:00 2001 -From: Adrian Panella -Date: Thu, 9 Mar 2017 09:37:17 +0100 -Subject: [PATCH 67/69] generic: Mangle bootloader's kernel arguments - -The command-line arguments provided by the boot loader will be -appended to a new device tree property: bootloader-args. -If there is a property "append-rootblock" in DT under /chosen -and a root= option in bootloaders command line it will be parsed -and added to DT bootargs with the form: XX. -Only command line ATAG will be processed, the rest of the ATAGs -sent by bootloader will be ignored. -This is usefull in dual boot systems, to get the current root partition -without afecting the rest of the system. - -Signed-off-by: Adrian Panella ---- - arch/arm/Kconfig | 11 +++++ - arch/arm/boot/compressed/atags_to_fdt.c | 72 ++++++++++++++++++++++++++++++++- - init/main.c | 16 ++++++++ - 3 files changed, 98 insertions(+), 1 deletion(-) - ---- a/arch/arm/Kconfig -+++ b/arch/arm/Kconfig -@@ -1948,6 +1948,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN - The command-line arguments provided by the boot loader will be - appended to the the device tree bootargs property. - -+config ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE -+ bool "Append rootblock parsing bootloader's kernel arguments" -+ help -+ The command-line arguments provided by the boot loader will be -+ appended to a new device tree property: bootloader-args. -+ If there is a property "append-rootblock" in DT under /chosen -+ and a root= option in bootloaders command line it will be parsed -+ and added to DT bootargs with the form: XX. -+ Only command line ATAG will be processed, the rest of the ATAGs -+ sent by bootloader will be ignored. -+ - endchoice - - config CMDLINE ---- a/arch/arm/boot/compressed/atags_to_fdt.c -+++ b/arch/arm/boot/compressed/atags_to_fdt.c -@@ -3,6 +3,8 @@ - - #if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND) - #define do_extend_cmdline 1 -+#elif defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+#define do_extend_cmdline 1 - #else - #define do_extend_cmdline 0 - #endif -@@ -66,6 +68,59 @@ static uint32_t get_cell_size(const void - return cell_size; - } - -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ -+static char *append_rootblock(char *dest, const char *str, int len, void *fdt) -+{ -+ char *ptr, *end; -+ char *root="root="; -+ int i, l; -+ const char *rootblock; -+ -+ //ARM doesn't have __HAVE_ARCH_STRSTR, so search manually -+ ptr = str - 1; -+ -+ do { -+ //first find an 'r' at the begining or after a space -+ do { -+ ptr++; -+ ptr = strchr(ptr, 'r'); -+ if(!ptr) return dest; -+ -+ } while (ptr != str && *(ptr-1) != ' '); -+ -+ //then check for the rest -+ for(i = 1; i <= 4; i++) -+ if(*(ptr+i) != *(root+i)) break; -+ -+ } while (i != 5); -+ -+ end = strchr(ptr, ' '); -+ end = end ? (end - 1) : (strchr(ptr, 0) - 1); -+ -+ //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX ) -+ for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++); -+ ptr = end + 1; -+ -+ /* if append-rootblock property is set use it to append to command line */ -+ rootblock = getprop(fdt, "/chosen", "append-rootblock", &l); -+ if(rootblock != NULL) { -+ if(*dest != ' ') { -+ *dest = ' '; -+ dest++; -+ len++; -+ } -+ if (len + l + i <= COMMAND_LINE_SIZE) { -+ memcpy(dest, rootblock, l); -+ dest += l - 1; -+ memcpy(dest, ptr, i); -+ dest += i; -+ } -+ } -+ return dest; -+} -+#endif -+ - static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline) - { - char cmdline[COMMAND_LINE_SIZE]; -@@ -85,12 +140,21 @@ static void merge_fdt_bootargs(void *fdt - - /* and append the ATAG_CMDLINE */ - if (fdt_cmdline) { -+ -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ //save original bootloader args -+ //and append ubi.mtd with root partition number to current cmdline -+ setprop_string(fdt, "/chosen", "bootloader-args", fdt_cmdline); -+ ptr = append_rootblock(ptr, fdt_cmdline, len, fdt); -+ -+#else - len = strlen(fdt_cmdline); - if (ptr - cmdline + len + 2 < COMMAND_LINE_SIZE) { - *ptr++ = ' '; - memcpy(ptr, fdt_cmdline, len); - ptr += len; - } -+#endif - } - *ptr = '\0'; - -@@ -147,7 +211,9 @@ int atags_to_fdt(void *atag_list, void * - else - setprop_string(fdt, "/chosen", "bootargs", - atag->u.cmdline.cmdline); -- } else if (atag->hdr.tag == ATAG_MEM) { -+ } -+#ifndef CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE -+ else if (atag->hdr.tag == ATAG_MEM) { - if (memcount >= sizeof(mem_reg_property)/4) - continue; - if (!atag->u.mem.size) -@@ -186,6 +252,10 @@ int atags_to_fdt(void *atag_list, void * - setprop(fdt, "/memory", "reg", mem_reg_property, - 4 * memcount * memsize); - } -+#else -+ -+ } -+#endif - - return fdt_pack(fdt); - } ---- a/init/main.c -+++ b/init/main.c -@@ -88,6 +88,10 @@ - #include - #include - -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+#include -+#endif -+ - static int kernel_init(void *); - - extern void init_IRQ(void); -@@ -539,6 +543,18 @@ asmlinkage __visible void __init start_k - page_alloc_init(); - - pr_notice("Kernel command line: %s\n", boot_command_line); -+ -+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE) -+ //Show bootloader's original command line for reference -+ if(of_chosen) { -+ const char *prop = of_get_property(of_chosen, "bootloader-args", NULL); -+ if(prop) -+ pr_notice("Bootloader command line (ignored): %s\n", prop); -+ else -+ pr_notice("Bootloader command line not present\n"); -+ } -+#endif -+ - parse_early_param(); - after_dashes = parse_args("Booting kernel", - static_command_line, __start___param, diff --git a/target/linux/ipq40xx/patches-4.9/0068-spi-add-gpio-cs-support.patch b/target/linux/ipq40xx/patches-4.9/0068-spi-add-gpio-cs-support.patch deleted file mode 100644 index 0c03bc9f7..000000000 --- a/target/linux/ipq40xx/patches-4.9/0068-spi-add-gpio-cs-support.patch +++ /dev/null @@ -1,71 +0,0 @@ -From b9c998eb7735df8000cf48d77f9271823e8e73da Mon Sep 17 00:00:00 2001 -From: Ram Chandra Jangir -Date: Thu, 9 Mar 2017 09:39:05 +0100 -Subject: [PATCH 68/69] spi: add gpio cs support - -Signed-off-by: John Crispin ---- - drivers/spi/spi-qup.c | 38 ++++++++++++++++++++++++++++++++++++++ - 1 file changed, 38 insertions(+) - ---- a/drivers/spi/spi-qup.c -+++ b/drivers/spi/spi-qup.c -@@ -24,6 +24,7 @@ - #include - #include - #include -+#include - - #define QUP_CONFIG 0x0000 - #define QUP_STATE 0x0004 -@@ -1019,6 +1020,38 @@ err_tx: - return ret; - } - -+static void spi_qup_set_cs(struct spi_device *spi, bool val) -+{ -+ struct spi_qup *controller; -+ u32 spi_ioc; -+ u32 spi_ioc_orig; -+ -+ controller = spi_master_get_devdata(spi->master); -+ spi_ioc = readl_relaxed(controller->base + SPI_IO_CONTROL); -+ spi_ioc_orig = spi_ioc; -+ if (!val) -+ spi_ioc |= SPI_IO_C_FORCE_CS; -+ else -+ spi_ioc &= ~SPI_IO_C_FORCE_CS; -+ -+ if (spi_ioc != spi_ioc_orig) -+ writel_relaxed(spi_ioc, controller->base + SPI_IO_CONTROL); -+} -+ -+static int spi_qup_setup(struct spi_device *spi) -+{ -+ if (spi->cs_gpio >= 0) { -+ if (spi->mode & SPI_CS_HIGH) -+ gpio_set_value(spi->cs_gpio, 0); -+ else -+ gpio_set_value(spi->cs_gpio, 1); -+ -+ udelay(10); -+ } -+ -+ return 0; -+} -+ - static int spi_qup_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -1115,6 +1148,11 @@ static int spi_qup_probe(struct platform - if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1")) - controller->qup_v1 = 1; - -+ if (!controller->qup_v1) -+ master->set_cs = spi_qup_set_cs; -+ else -+ master->setup = spi_qup_setup; -+ - spin_lock_init(&controller->lock); - init_completion(&controller->done); - init_completion(&controller->dma_tx_done); diff --git a/target/linux/ipq40xx/patches-4.9/0069-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-4.9/0069-arm-boot-add-dts-files.patch deleted file mode 100644 index 3e7c91cf3..000000000 --- a/target/linux/ipq40xx/patches-4.9/0069-arm-boot-add-dts-files.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 8f68331e14dff9a101f2d0e1d6bec84a031f27ee Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 9 Mar 2017 11:03:18 +0100 -Subject: [PATCH 69/69] arm: boot: add dts files - -Signed-off-by: John Crispin ---- - arch/arm/boot/dts/Makefile | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -618,7 +618,19 @@ dtb-$(CONFIG_ARCH_QCOM) += \ - qcom-apq8084-mtp.dtb \ - qcom-ipq4019-ap.dk01.1-c1.dtb \ - qcom-ipq4019-ap.dk04.1-c1.dtb \ -+ qcom-ipq4019-fritz4040.dtb \ -+ qcom-ipq4019-a42.dtb \ -+ qcom-ipq4019-rt-ac58u.dtb \ -+ qcom-ipq4019-rt-acrh17.dtb \ - qcom-ipq8064-ap148.dtb \ -+ qcom-ipq8064-c2600.dtb \ -+ qcom-ipq8064-d7800.dtb \ -+ qcom-ipq8064-db149.dtb \ -+ qcom-ipq8064-ea8500.dtb \ -+ qcom-ipq8064-r7500.dtb \ -+ qcom-ipq8064-r7500v2.dtb \ -+ qcom-ipq8065-nbg6817.dtb \ -+ qcom-ipq8065-r7800.dtb \ - qcom-msm8660-surf.dtb \ - qcom-msm8960-cdp.dtb \ - qcom-msm8974-lge-nexus5-hammerhead.dtb \ diff --git a/target/linux/ipq40xx/patches-4.9/0070-qcom-spm-fix-probe-order.patch b/target/linux/ipq40xx/patches-4.9/0070-qcom-spm-fix-probe-order.patch deleted file mode 100644 index b7e375dfb..000000000 --- a/target/linux/ipq40xx/patches-4.9/0070-qcom-spm-fix-probe-order.patch +++ /dev/null @@ -1,16 +0,0 @@ -Check for SCM availability before attempting to use SPM - -Signed-off-by: Felix Fietkau - ---- a/drivers/soc/qcom/spm.c -+++ b/drivers/soc/qcom/spm.c -@@ -219,6 +219,9 @@ static int __init qcom_cpuidle_init(stru - cpumask_t mask; - bool use_scm_power_down = false; - -+ if (!qcom_scm_is_available()) -+ return -EPROBE_DEFER; -+ - for (i = 0; ; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); - if (!state_node) diff --git a/target/linux/ipq40xx/patches-4.9/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch b/target/linux/ipq40xx/patches-4.9/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch deleted file mode 100644 index 7a315627f..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-1-PCI-qcom-Fixed-IPQ806x-specific-clocks.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 86655aa14304ca88a8ce8847276147dbc1a83238 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 19 Jul 2016 18:44:49 +0530 -Subject: PCI: qcom: Fixed IPQ806x specific clocks - -Change-Id: I488e1bc707d6a22b37a338f41935e3922009ba5e -Signed-off-by: Sham Muthayyan ---- - drivers/pci/host/pcie-qcom.c | 38 +++++++++++++++++++++++++++++++++----- - 1 file changed, 33 insertions(+), 5 deletions(-) - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -53,6 +53,8 @@ struct qcom_pcie_resources_v0 { - struct clk *iface_clk; - struct clk *core_clk; - struct clk *phy_clk; -+ struct clk *aux_clk; -+ struct clk *ref_clk; - struct reset_control *pci_reset; - struct reset_control *axi_reset; - struct reset_control *ahb_reset; -@@ -160,6 +162,14 @@ static int qcom_pcie_get_resources_v0(st - if (IS_ERR(res->phy_clk)) - return PTR_ERR(res->phy_clk); - -+ res->aux_clk = devm_clk_get(dev, "aux"); -+ if (IS_ERR(res->aux_clk)) -+ return PTR_ERR(res->aux_clk); -+ -+ res->ref_clk = devm_clk_get(dev, "ref"); -+ if (IS_ERR(res->ref_clk)) -+ return PTR_ERR(res->ref_clk); -+ - res->pci_reset = devm_reset_control_get(dev, "pci"); - if (IS_ERR(res->pci_reset)) - return PTR_ERR(res->pci_reset); -@@ -227,6 +237,8 @@ static void qcom_pcie_deinit_v0(struct q - clk_disable_unprepare(res->iface_clk); - clk_disable_unprepare(res->core_clk); - clk_disable_unprepare(res->phy_clk); -+ clk_disable_unprepare(res->aux_clk); -+ clk_disable_unprepare(res->ref_clk); - regulator_disable(res->vdda); - regulator_disable(res->vdda_phy); - regulator_disable(res->vdda_refclk); -@@ -269,16 +281,28 @@ static int qcom_pcie_init_v0(struct qcom - goto err_assert_ahb; - } - -+ ret = clk_prepare_enable(res->core_clk); -+ if (ret) { -+ dev_err(dev, "cannot prepare/enable core clock\n"); -+ goto err_clk_core; -+ } -+ - ret = clk_prepare_enable(res->phy_clk); - if (ret) { - dev_err(dev, "cannot prepare/enable phy clock\n"); - goto err_clk_phy; - } - -- ret = clk_prepare_enable(res->core_clk); -+ ret = clk_prepare_enable(res->aux_clk); - if (ret) { -- dev_err(dev, "cannot prepare/enable core clock\n"); -- goto err_clk_core; -+ dev_err(dev, "cannot prepare/enable aux clock\n"); -+ goto err_clk_aux; -+ } -+ -+ ret = clk_prepare_enable(res->ref_clk); -+ if (ret) { -+ dev_err(dev, "cannot prepare/enable ref clock\n"); -+ goto err_clk_ref; - } - - ret = reset_control_deassert(res->ahb_reset); -@@ -327,10 +351,14 @@ static int qcom_pcie_init_v0(struct qcom - return 0; - - err_deassert_ahb: -- clk_disable_unprepare(res->core_clk); --err_clk_core: -+ clk_disable_unprepare(res->ref_clk); -+err_clk_ref: -+ clk_disable_unprepare(res->aux_clk); -+err_clk_aux: - clk_disable_unprepare(res->phy_clk); - err_clk_phy: -+ clk_disable_unprepare(res->core_clk); -+err_clk_core: - clk_disable_unprepare(res->iface_clk); - err_assert_ahb: - regulator_disable(res->vdda_phy); diff --git a/target/linux/ipq40xx/patches-4.9/0071-2-PCI-qcom-Fixed-IPQ806x-PCIE-reset-changes.patch b/target/linux/ipq40xx/patches-4.9/0071-2-PCI-qcom-Fixed-IPQ806x-PCIE-reset-changes.patch deleted file mode 100644 index aab4f364e..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-2-PCI-qcom-Fixed-IPQ806x-PCIE-reset-changes.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 490d103232287eb51c92c49a4ef8865fd0a9d59e Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 19 Jul 2016 18:58:18 +0530 -Subject: PCI: qcom: Fixed IPQ806x PCIE reset changes - -Change-Id: Ia6590e960b9754b1e8b7a51f318788cd63e9e321 -Signed-off-by: Sham Muthayyan ---- - drivers/pci/host/pcie-qcom.c | 24 +++++++++++++++++++----- - 1 file changed, 19 insertions(+), 5 deletions(-) - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -60,6 +60,7 @@ struct qcom_pcie_resources_v0 { - struct reset_control *ahb_reset; - struct reset_control *por_reset; - struct reset_control *phy_reset; -+ struct reset_control *ext_reset; - struct regulator *vdda; - struct regulator *vdda_phy; - struct regulator *vdda_refclk; -@@ -190,6 +191,10 @@ static int qcom_pcie_get_resources_v0(st - if (IS_ERR(res->phy_reset)) - return PTR_ERR(res->phy_reset); - -+ res->ext_reset = devm_reset_control_get(dev, "ext"); -+ if (IS_ERR(res->ext_reset)) -+ return PTR_ERR(res->ext_reset); -+ - return 0; - } - -@@ -234,6 +239,7 @@ static void qcom_pcie_deinit_v0(struct q - reset_control_assert(res->ahb_reset); - reset_control_assert(res->por_reset); - reset_control_assert(res->pci_reset); -+ reset_control_assert(res->ext_reset); - clk_disable_unprepare(res->iface_clk); - clk_disable_unprepare(res->core_clk); - clk_disable_unprepare(res->phy_clk); -@@ -251,6 +257,12 @@ static int qcom_pcie_init_v0(struct qcom - u32 val; - int ret; - -+ ret = reset_control_assert(res->ahb_reset); -+ if (ret) { -+ dev_err(dev, "cannot assert ahb reset\n"); -+ return ret; -+ } -+ - ret = regulator_enable(res->vdda); - if (ret) { - dev_err(dev, "cannot enable vdda regulator\n"); -@@ -269,16 +281,16 @@ static int qcom_pcie_init_v0(struct qcom - goto err_vdda_phy; - } - -- ret = reset_control_assert(res->ahb_reset); -+ ret = reset_control_deassert(res->ext_reset); - if (ret) { -- dev_err(dev, "cannot assert ahb reset\n"); -- goto err_assert_ahb; -+ dev_err(dev, "cannot assert ext reset\n"); -+ goto err_reset_ext; - } - - ret = clk_prepare_enable(res->iface_clk); - if (ret) { - dev_err(dev, "cannot prepare/enable iface clock\n"); -- goto err_assert_ahb; -+ goto err_iface; - } - - ret = clk_prepare_enable(res->core_clk); -@@ -360,7 +372,9 @@ err_clk_phy: - clk_disable_unprepare(res->core_clk); - err_clk_core: - clk_disable_unprepare(res->iface_clk); --err_assert_ahb: -+err_iface: -+ reset_control_assert(res->ext_reset); -+err_reset_ext: - regulator_disable(res->vdda_phy); - err_vdda_phy: - regulator_disable(res->vdda_refclk); diff --git a/target/linux/ipq40xx/patches-4.9/0071-3-PCI-qcom-Fixed-IPQ806x-PCIE-init-changes.patch b/target/linux/ipq40xx/patches-4.9/0071-3-PCI-qcom-Fixed-IPQ806x-PCIE-init-changes.patch deleted file mode 100644 index 6c68edfe9..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-3-PCI-qcom-Fixed-IPQ806x-PCIE-init-changes.patch +++ /dev/null @@ -1,127 +0,0 @@ -From eddd13215d0f2b549ebc5f0e8796d5b1231f90a0 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 19 Jul 2016 19:58:22 +0530 -Subject: PCI: qcom: Fixed IPQ806x PCIE init changes - -Change-Id: Ic319b1aec27a47809284759f8fcb6a8815b7cf7e -Signed-off-by: Sham Muthayyan ---- - drivers/pci/host/pcie-qcom.c | 62 +++++++++++++++++++++++++++++++++++++------- - 1 file changed, 53 insertions(+), 9 deletions(-) - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -37,7 +37,13 @@ - #include "pcie-designware.h" - - #define PCIE20_PARF_PHY_CTRL 0x40 -+#define PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK (0x1f << 16) -+#define PHY_CTRL_PHY_TX0_TERM_OFFSET(x) (x << 16) -+ - #define PCIE20_PARF_PHY_REFCLK 0x4C -+#define REF_SSP_EN BIT(16) -+#define REF_USE_PAD BIT(12) -+ - #define PCIE20_PARF_DBI_BASE_ADDR 0x168 - #define PCIE20_PARF_SLV_ADDR_SPACE_SIZE 0x16c - #define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT 0x178 -@@ -48,6 +54,18 @@ - #define PCIE20_CAP 0x70 - - #define PERST_DELAY_US 1000 -+/* PARF registers */ -+#define PCIE20_PARF_PCS_DEEMPH 0x34 -+#define PCS_DEEMPH_TX_DEEMPH_GEN1(x) (x << 16) -+#define PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(x) (x << 8) -+#define PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(x) (x << 0) -+ -+#define PCIE20_PARF_PCS_SWING 0x38 -+#define PCS_SWING_TX_SWING_FULL(x) (x << 8) -+#define PCS_SWING_TX_SWING_LOW(x) (x << 0) -+ -+#define PCIE20_PARF_CONFIG_BITS 0x50 -+#define PHY_RX0_EQ(x) (x << 24) - - struct qcom_pcie_resources_v0 { - struct clk *iface_clk; -@@ -64,6 +82,7 @@ struct qcom_pcie_resources_v0 { - struct regulator *vdda; - struct regulator *vdda_phy; - struct regulator *vdda_refclk; -+ uint8_t phy_tx0_term_offset; - }; - - struct qcom_pcie_resources_v1 { -@@ -100,6 +119,16 @@ struct qcom_pcie { - - #define to_qcom_pcie(x) container_of(x, struct qcom_pcie, pp) - -+static inline void -+writel_masked(void __iomem *addr, u32 clear_mask, u32 set_mask) -+{ -+ u32 val = readl(addr); -+ -+ val &= ~clear_mask; -+ val |= set_mask; -+ writel(val, addr); -+} -+ - static void qcom_ep_reset_assert(struct qcom_pcie *pcie) - { - gpiod_set_value(pcie->reset, 1); -@@ -195,6 +224,10 @@ static int qcom_pcie_get_resources_v0(st - if (IS_ERR(res->ext_reset)) - return PTR_ERR(res->ext_reset); - -+ if (of_property_read_u8(dev->of_node, "phy-tx0-term-offset", -+ &res->phy_tx0_term_offset)) -+ res->phy_tx0_term_offset = 0; -+ - return 0; - } - -@@ -254,7 +287,6 @@ static int qcom_pcie_init_v0(struct qcom - { - struct qcom_pcie_resources_v0 *res = &pcie->res.v0; - struct device *dev = pcie->pp.dev; -- u32 val; - int ret; - - ret = reset_control_assert(res->ahb_reset); -@@ -323,15 +355,27 @@ static int qcom_pcie_init_v0(struct qcom - goto err_deassert_ahb; - } - -- /* enable PCIe clocks and resets */ -- val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL); -- val &= ~BIT(0); -- writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL); -- -- /* enable external reference clock */ -- val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); -- val |= BIT(16); -- writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); -+ writel_masked(pcie->parf + PCIE20_PARF_PHY_CTRL, BIT(0), 0); -+ -+ /* Set Tx termination offset */ -+ writel_masked(pcie->parf + PCIE20_PARF_PHY_CTRL, -+ PHY_CTRL_PHY_TX0_TERM_OFFSET_MASK, -+ PHY_CTRL_PHY_TX0_TERM_OFFSET(res->phy_tx0_term_offset)); -+ -+ /* PARF programming */ -+ writel(PCS_DEEMPH_TX_DEEMPH_GEN1(0x18) | -+ PCS_DEEMPH_TX_DEEMPH_GEN2_3_5DB(0x18) | -+ PCS_DEEMPH_TX_DEEMPH_GEN2_6DB(0x22), -+ pcie->parf + PCIE20_PARF_PCS_DEEMPH); -+ writel(PCS_SWING_TX_SWING_FULL(0x78) | -+ PCS_SWING_TX_SWING_LOW(0x78), -+ pcie->parf + PCIE20_PARF_PCS_SWING); -+ writel(PHY_RX0_EQ(0x4), pcie->parf + PCIE20_PARF_CONFIG_BITS); -+ -+ /* Enable reference clock */ -+ writel_masked(pcie->parf + PCIE20_PARF_PHY_REFCLK, -+ REF_USE_PAD, REF_SSP_EN); -+ - - ret = reset_control_deassert(res->phy_reset); - if (ret) { diff --git a/target/linux/ipq40xx/patches-4.9/0071-4-PCIE-designware-Fixed-PCI-host-init.patch b/target/linux/ipq40xx/patches-4.9/0071-4-PCIE-designware-Fixed-PCI-host-init.patch deleted file mode 100644 index af9e121f8..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-4-PCIE-designware-Fixed-PCI-host-init.patch +++ /dev/null @@ -1,68 +0,0 @@ -From e833cdb5c792912d459773cc23153e5d78875d34 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 19 Jul 2016 20:05:25 +0530 -Subject: PCIE: designware: Fixed PCI host init - -Change-Id: I949b302d77199fc09342acf26b7bb45a7ec467ee -Signed-off-by: Sham Muthayyan ---- - drivers/pci/host/pcie-designware.c | 9 +++++++-- - drivers/pci/host/pcie-designware.h | 2 +- - drivers/pci/host/pcie-qcom.c | 5 +++-- - 3 files changed, 11 insertions(+), 5 deletions(-) - ---- a/drivers/pci/host/pcie-designware.c -+++ b/drivers/pci/host/pcie-designware.c -@@ -637,8 +637,13 @@ int dw_pcie_host_init(struct pcie_port * - } - } - -- if (pp->ops->host_init) -- pp->ops->host_init(pp); -+ if (pp->ops->host_init) { -+ ret = pp->ops->host_init(pp); -+ if (ret) { -+ dev_err(pp->dev, "hostinit failed\n"); -+ return 0; -+ } -+ } - - pp->root_bus_nr = pp->busn->start; - if (IS_ENABLED(CONFIG_PCI_MSI)) { ---- a/drivers/pci/host/pcie-designware.h -+++ b/drivers/pci/host/pcie-designware.h -@@ -63,7 +63,7 @@ struct pcie_host_ops { - int (*wr_other_conf)(struct pcie_port *pp, struct pci_bus *bus, - unsigned int devfn, int where, int size, u32 val); - int (*link_up)(struct pcie_port *pp); -- void (*host_init)(struct pcie_port *pp); -+ int (*host_init)(struct pcie_port *pp); - void (*msi_set_irq)(struct pcie_port *pp, int irq); - void (*msi_clear_irq)(struct pcie_port *pp, int irq); - phys_addr_t (*get_msi_addr)(struct pcie_port *pp); ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -515,7 +515,7 @@ static int qcom_pcie_link_up(struct pcie - return !!(val & PCI_EXP_LNKSTA_DLLLA); - } - --static void qcom_pcie_host_init(struct pcie_port *pp) -+static int qcom_pcie_host_init(struct pcie_port *pp) - { - struct qcom_pcie *pcie = to_qcom_pcie(pp); - int ret; -@@ -541,12 +541,13 @@ static void qcom_pcie_host_init(struct p - if (ret) - goto err; - -- return; -+ return 0; - err: - qcom_ep_reset_assert(pcie); - phy_power_off(pcie->phy); - err_deinit: - pcie->ops->deinit(pcie); -+ return ret; - } - - static int qcom_pcie_rd_own_conf(struct pcie_port *pp, int where, int size, diff --git a/target/linux/ipq40xx/patches-4.9/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch b/target/linux/ipq40xx/patches-4.9/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch deleted file mode 100644 index 98e2b54e3..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-5-PCI-qcom-Programming-the-PCIE-iATU-for-IPQ806x.patch +++ /dev/null @@ -1,113 +0,0 @@ -From d27c303e828d7e42f339a459d2abfe30c51698e9 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Tue, 26 Jul 2016 12:28:31 +0530 -Subject: PCI: qcom: Programming the PCIE iATU for IPQ806x - -Resolved PCIE EP detection errors caused due to missing iATU programming. - -Change-Id: Ie95c0f8cb940abc0192a8a3c4e825ddba54b72fe -Signed-off-by: Sham Muthayyan ---- - drivers/pci/host/pcie-qcom.c | 77 ++++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 77 insertions(+) - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -52,6 +52,29 @@ - #define PCIE20_ELBI_SYS_CTRL_LT_ENABLE BIT(0) - - #define PCIE20_CAP 0x70 -+#define PCIE20_CAP_LINKCTRLSTATUS (PCIE20_CAP + 0x10) -+ -+#define PCIE20_AXI_MSTR_RESP_COMP_CTRL0 0x818 -+#define PCIE20_AXI_MSTR_RESP_COMP_CTRL1 0x81c -+ -+#define PCIE20_PLR_IATU_VIEWPORT 0x900 -+#define PCIE20_PLR_IATU_REGION_OUTBOUND (0x0 << 31) -+#define PCIE20_PLR_IATU_REGION_INDEX(x) (x << 0) -+ -+#define PCIE20_PLR_IATU_CTRL1 0x904 -+#define PCIE20_PLR_IATU_TYPE_CFG0 (0x4 << 0) -+#define PCIE20_PLR_IATU_TYPE_MEM (0x0 << 0) -+ -+#define PCIE20_PLR_IATU_CTRL2 0x908 -+#define PCIE20_PLR_IATU_ENABLE BIT(31) -+ -+#define PCIE20_PLR_IATU_LBAR 0x90C -+#define PCIE20_PLR_IATU_UBAR 0x910 -+#define PCIE20_PLR_IATU_LAR 0x914 -+#define PCIE20_PLR_IATU_LTAR 0x918 -+#define PCIE20_PLR_IATU_UTAR 0x91c -+ -+#define MSM_PCIE_DEV_CFG_ADDR 0x01000000 - - #define PERST_DELAY_US 1000 - /* PARF registers */ -@@ -163,6 +186,57 @@ static int qcom_pcie_establish_link(stru - return dw_pcie_wait_for_link(&pcie->pp); - } - -+static void qcom_pcie_prog_viewport_cfg0(struct qcom_pcie *pcie, u32 busdev) -+{ -+ struct pcie_port *pp = &pcie->pp; -+ -+ /* -+ * program and enable address translation region 0 (device config -+ * address space); region type config; -+ * axi config address range to device config address range -+ */ -+ writel(PCIE20_PLR_IATU_REGION_OUTBOUND | -+ PCIE20_PLR_IATU_REGION_INDEX(0), -+ pcie->pp.dbi_base + PCIE20_PLR_IATU_VIEWPORT); -+ -+ writel(PCIE20_PLR_IATU_TYPE_CFG0, pcie->pp.dbi_base + PCIE20_PLR_IATU_CTRL1); -+ writel(PCIE20_PLR_IATU_ENABLE, pcie->pp.dbi_base + PCIE20_PLR_IATU_CTRL2); -+ writel(pp->cfg0_base, pcie->pp.dbi_base + PCIE20_PLR_IATU_LBAR); -+ writel((pp->cfg0_base >> 32), pcie->pp.dbi_base + PCIE20_PLR_IATU_UBAR); -+ writel((pp->cfg0_base + pp->cfg0_size - 1), -+ pcie->pp.dbi_base + PCIE20_PLR_IATU_LAR); -+ writel(busdev, pcie->pp.dbi_base + PCIE20_PLR_IATU_LTAR); -+ writel(0, pcie->pp.dbi_base + PCIE20_PLR_IATU_UTAR); -+} -+ -+static void qcom_pcie_prog_viewport_mem2_outbound(struct qcom_pcie *pcie) -+{ -+ struct pcie_port *pp = &pcie->pp; -+ -+ /* -+ * program and enable address translation region 2 (device resource -+ * address space); region type memory; -+ * axi device bar address range to device bar address range -+ */ -+ writel(PCIE20_PLR_IATU_REGION_OUTBOUND | -+ PCIE20_PLR_IATU_REGION_INDEX(2), -+ pcie->pp.dbi_base + PCIE20_PLR_IATU_VIEWPORT); -+ -+ writel(PCIE20_PLR_IATU_TYPE_MEM, pcie->pp.dbi_base + PCIE20_PLR_IATU_CTRL1); -+ writel(PCIE20_PLR_IATU_ENABLE, pcie->pp.dbi_base + PCIE20_PLR_IATU_CTRL2); -+ writel(pp->mem_base, pcie->pp.dbi_base + PCIE20_PLR_IATU_LBAR); -+ writel((pp->mem_base >> 32), pcie->pp.dbi_base + PCIE20_PLR_IATU_UBAR); -+ writel(pp->mem_base + pp->mem_size - 1, -+ pcie->pp.dbi_base + PCIE20_PLR_IATU_LAR); -+ writel(pp->mem_bus_addr, pcie->pp.dbi_base + PCIE20_PLR_IATU_LTAR); -+ writel(upper_32_bits(pp->mem_bus_addr), -+ pcie->pp.dbi_base + PCIE20_PLR_IATU_UTAR); -+ -+ /* 256B PCIE buffer setting */ -+ writel(0x1, pcie->pp.dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL0); -+ writel(0x1, pcie->pp.dbi_base + PCIE20_AXI_MSTR_RESP_COMP_CTRL1); -+} -+ - static int qcom_pcie_get_resources_v0(struct qcom_pcie *pcie) - { - struct qcom_pcie_resources_v0 *res = &pcie->res.v0; -@@ -404,6 +478,9 @@ static int qcom_pcie_init_v0(struct qcom - /* wait for clock acquisition */ - usleep_range(1000, 1500); - -+ qcom_pcie_prog_viewport_cfg0(pcie, MSM_PCIE_DEV_CFG_ADDR); -+ qcom_pcie_prog_viewport_mem2_outbound(pcie); -+ - return 0; - - err_deassert_ahb: diff --git a/target/linux/ipq40xx/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch b/target/linux/ipq40xx/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch deleted file mode 100644 index 91891a5b2..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-6-PCI-qcom-Force-GEN1-support.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 4910cfd150342ec7b038892262923c725a9c4001 Mon Sep 17 00:00:00 2001 -From: Sham Muthayyan -Date: Wed, 7 Sep 2016 16:44:28 +0530 -Subject: PCI: qcom: Force GEN1 support - -Change-Id: Ica54ddb737d7b851469deab1745f54bf431bd3f0 -Signed-off-by: Sham Muthayyan ---- - drivers/pci/host/pcie-qcom.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -90,6 +90,8 @@ - #define PCIE20_PARF_CONFIG_BITS 0x50 - #define PHY_RX0_EQ(x) (x << 24) - -+#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0 -+ - struct qcom_pcie_resources_v0 { - struct clk *iface_clk; - struct clk *core_clk; -@@ -138,6 +140,7 @@ struct qcom_pcie { - struct phy *phy; - struct gpio_desc *reset; - struct qcom_pcie_ops *ops; -+ uint32_t force_gen1; - }; - - #define to_qcom_pcie(x) container_of(x, struct qcom_pcie, pp) -@@ -477,6 +480,11 @@ static int qcom_pcie_init_v0(struct qcom - - /* wait for clock acquisition */ - usleep_range(1000, 1500); -+ if (pcie->force_gen1) { -+ writel_relaxed((readl_relaxed( -+ pcie->pp.dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2) | 1), -+ pcie->pp.dbi_base + PCIE20_LNK_CONTROL2_LINK_STATUS2); -+ } - - qcom_pcie_prog_viewport_cfg0(pcie, MSM_PCIE_DEV_CFG_ADDR); - qcom_pcie_prog_viewport_mem2_outbound(pcie); -@@ -666,6 +674,8 @@ static int qcom_pcie_probe(struct platfo - struct qcom_pcie *pcie; - struct pcie_port *pp; - int ret; -+ uint32_t force_gen1 = 0; -+ struct device_node *np = pdev->dev.of_node; - - pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); - if (!pcie) -@@ -678,6 +688,9 @@ static int qcom_pcie_probe(struct platfo - if (IS_ERR(pcie->reset)) - return PTR_ERR(pcie->reset); - -+ of_property_read_u32(np, "force_gen1", &force_gen1); -+ pcie->force_gen1 = force_gen1; -+ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "parf"); - pcie->parf = devm_ioremap_resource(dev, res); - if (IS_ERR(pcie->parf)) diff --git a/target/linux/ipq40xx/patches-4.9/0071-7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch b/target/linux/ipq40xx/patches-4.9/0071-7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch deleted file mode 100644 index 157386458..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-7-pcie-Set-PCIE-MRRS-and-MPS-to-256B.patch +++ /dev/null @@ -1,69 +0,0 @@ -From edff8f777c6321ca89bb950a382f409c4a126e28 Mon Sep 17 00:00:00 2001 -From: Gokul Sriram Palanisamy -Date: Thu, 15 Dec 2016 17:38:18 +0530 -Subject: pcie: Set PCIE MRRS and MPS to 256B - -Set Max Read Request Size and Max Payload Size to 256 bytes, -per chip team recommendation. - -Change-Id: I097004be2ced1b3096ffc10c318aae0b2bb155e8 -Signed-off-by: Gokul Sriram Palanisamy ---- - drivers/pci/host/pcie-qcom.c | 37 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 37 insertions(+) - -(limited to 'drivers/pci/host/pcie-qcom.c') - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -92,6 +92,14 @@ - - #define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xA0 - -+#define __set(v, a, b) (((v) << (b)) & GENMASK(a, b)) -+#define __mask(a, b) (((1 << ((a) + 1)) - 1) & ~((1 << (b)) - 1)) -+#define PCIE20_DEV_CAS 0x78 -+#define PCIE20_MRRS_MASK __mask(14, 12) -+#define PCIE20_MRRS(x) __set(x, 14, 12) -+#define PCIE20_MPS_MASK __mask(7, 5) -+#define PCIE20_MPS(x) __set(x, 7, 5) -+ - struct qcom_pcie_resources_v0 { - struct clk *iface_clk; - struct clk *core_clk; -@@ -745,6 +753,35 @@ static int qcom_pcie_probe(struct platfo - return 0; - } - -+static void qcom_pcie_fixup_final(struct pci_dev *dev) -+{ -+ int cap, err; -+ u16 ctl, reg_val; -+ -+ cap = pci_pcie_cap(dev); -+ if (!cap) -+ return; -+ -+ err = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl); -+ -+ if (err) -+ return; -+ -+ reg_val = ctl; -+ -+ if (((reg_val & PCIE20_MRRS_MASK) >> 12) > 1) -+ reg_val = (reg_val & ~(PCIE20_MRRS_MASK)) | PCIE20_MRRS(0x1); -+ -+ if (((ctl & PCIE20_MPS_MASK) >> 5) > 1) -+ reg_val = (reg_val & ~(PCIE20_MPS_MASK)) | PCIE20_MPS(0x1); -+ -+ err = pci_write_config_word(dev, cap + PCI_EXP_DEVCTL, reg_val); -+ -+ if (err) -+ pr_err("pcie config write failed %d\n", err); -+} -+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, qcom_pcie_fixup_final); -+ - static const struct of_device_id qcom_pcie_match[] = { - { .compatible = "qcom,pcie-ipq8064", .data = &ops_v0 }, - { .compatible = "qcom,pcie-apq8064", .data = &ops_v0 }, diff --git a/target/linux/ipq40xx/patches-4.9/0071-8-pcie-qcom-Fixed-pcie_phy_clk-branch-issue.patch b/target/linux/ipq40xx/patches-4.9/0071-8-pcie-qcom-Fixed-pcie_phy_clk-branch-issue.patch deleted file mode 100644 index 0f5050826..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-8-pcie-qcom-Fixed-pcie_phy_clk-branch-issue.patch +++ /dev/null @@ -1,91 +0,0 @@ -From b74bab6186131eea09459eedf5d737645a3559c9 Mon Sep 17 00:00:00 2001 -From: Abhishek Sahu -Date: Thu, 22 Dec 2016 11:18:45 +0530 -Subject: pcie: qcom: Fixed pcie_phy_clk branch issue - -Following backtraces are observed in PCIe deinit operation. - - Hardware name: Qualcomm (Flattened Device Tree) - (unwind_backtrace) from [] (show_stack+0x10/0x14) - (show_stack) from [] (dump_stack+0x84/0x98) - (dump_stack) from [] (warn_slowpath_common+0x9c/0xb8) - (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40) - (warn_slowpath_fmt) from [] (clk_branch_wait+0x114/0x120) - (clk_branch_wait) from [] (clk_core_disable+0xd0/0x1f4) - (clk_core_disable) from [] (clk_disable+0x24/0x30) - (clk_disable) from [] (qcom_pcie_deinit_v0+0x6c/0xb8) - (qcom_pcie_deinit_v0) from [] (qcom_pcie_host_init+0xe0/0xe8) - (qcom_pcie_host_init) from [] (dw_pcie_host_init+0x3b0/0x538) - (dw_pcie_host_init) from [] (qcom_pcie_probe+0x20c/0x2e4) - -pcie_phy_clk is generated for PCIe controller itself and the -GCC controls its branch operation. This error is coming since -the assert operations turn off the parent clock before branch -clock. Now this patch moves clk_disable_unprepare before assert -operations. - -Similarly, during probe function, the clock branch operation -should be done after dessert operation. Currently, it does not -generate any error since bootloader enables the pcie_phy_clk -but the same error is coming during probe, if bootloader -disables pcie_phy_clk. - -Change-Id: Ib29c154d10eb64363d9cc982ce5fd8107af5627d -Signed-off-by: Abhishek Sahu ---- - drivers/pci/host/pcie-qcom.c | 16 +++++++--------- - 1 file changed, 7 insertions(+), 9 deletions(-) - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -352,6 +352,7 @@ static void qcom_pcie_deinit_v0(struct q - { - struct qcom_pcie_resources_v0 *res = &pcie->res.v0; - -+ clk_disable_unprepare(res->phy_clk); - reset_control_assert(res->pci_reset); - reset_control_assert(res->axi_reset); - reset_control_assert(res->ahb_reset); -@@ -360,7 +361,6 @@ static void qcom_pcie_deinit_v0(struct q - reset_control_assert(res->ext_reset); - clk_disable_unprepare(res->iface_clk); - clk_disable_unprepare(res->core_clk); -- clk_disable_unprepare(res->phy_clk); - clk_disable_unprepare(res->aux_clk); - clk_disable_unprepare(res->ref_clk); - regulator_disable(res->vdda); -@@ -416,12 +416,6 @@ static int qcom_pcie_init_v0(struct qcom - goto err_clk_core; - } - -- ret = clk_prepare_enable(res->phy_clk); -- if (ret) { -- dev_err(dev, "cannot prepare/enable phy clock\n"); -- goto err_clk_phy; -- } -- - ret = clk_prepare_enable(res->aux_clk); - if (ret) { - dev_err(dev, "cannot prepare/enable aux clock\n"); -@@ -486,6 +480,12 @@ static int qcom_pcie_init_v0(struct qcom - return ret; - } - -+ ret = clk_prepare_enable(res->phy_clk); -+ if (ret) { -+ dev_err(dev, "cannot prepare/enable phy clock\n"); -+ goto err_deassert_ahb; -+ } -+ - /* wait for clock acquisition */ - usleep_range(1000, 1500); - if (pcie->force_gen1) { -@@ -504,8 +504,6 @@ err_deassert_ahb: - err_clk_ref: - clk_disable_unprepare(res->aux_clk); - err_clk_aux: -- clk_disable_unprepare(res->phy_clk); --err_clk_phy: - clk_disable_unprepare(res->core_clk); - err_clk_core: - clk_disable_unprepare(res->iface_clk); diff --git a/target/linux/ipq40xx/patches-4.9/0071-9-pcie-qcom-change-duplicate-pci-reset-to-phy-reset.patch b/target/linux/ipq40xx/patches-4.9/0071-9-pcie-qcom-change-duplicate-pci-reset-to-phy-reset.patch deleted file mode 100644 index a60add93c..000000000 --- a/target/linux/ipq40xx/patches-4.9/0071-9-pcie-qcom-change-duplicate-pci-reset-to-phy-reset.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 1a9c48123bd09f75562b6a2ee0f0a7b2d533cd45 Mon Sep 17 00:00:00 2001 -From: Abhishek Sahu -Date: Thu, 22 Dec 2016 11:50:49 +0530 -Subject: pcie: qcom: change duplicate pci reset to phy reset - -The deinit issues reset_control_assert for pci twice and -does not contain phy reset. - -Change-Id: Iba849963c7e5f9a2a1063f0e2e89635df70b8a99 -Signed-off-by: Abhishek Sahu ---- - drivers/pci/host/pcie-qcom.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/pci/host/pcie-qcom.c -+++ b/drivers/pci/host/pcie-qcom.c -@@ -353,7 +353,7 @@ static void qcom_pcie_deinit_v0(struct q - struct qcom_pcie_resources_v0 *res = &pcie->res.v0; - - clk_disable_unprepare(res->phy_clk); -- reset_control_assert(res->pci_reset); -+ reset_control_assert(res->phy_reset); - reset_control_assert(res->axi_reset); - reset_control_assert(res->ahb_reset); - reset_control_assert(res->por_reset); diff --git a/target/linux/ipq40xx/patches-4.9/0072-ipq-scm-TZ-don-t-need-clock-to-be-enabled-disabled-for-ipq.patch b/target/linux/ipq40xx/patches-4.9/0072-ipq-scm-TZ-don-t-need-clock-to-be-enabled-disabled-for-ipq.patch deleted file mode 100644 index 4f0e544ab..000000000 --- a/target/linux/ipq40xx/patches-4.9/0072-ipq-scm-TZ-don-t-need-clock-to-be-enabled-disabled-for-ipq.patch +++ /dev/null @@ -1,166 +0,0 @@ -From 0fb08a02baf5114fd3bdbc5aa92d6a6cd6d5ef3f Mon Sep 17 00:00:00 2001 -From: Manoharan Vijaya Raghavan -Date: Tue, 24 Jan 2017 20:58:46 +0530 -Subject: ipq: scm: TZ don't need clock to be enabled/disabled for ipq - -When SCM was made as a platform driver, clock management was -addedfor firmware calls. This is not required for IPQ. - -Change-Id: I3d29fafe0266e51f708f2718bab03907078b0f4d -Signed-off-by: Manoharan Vijaya Raghavan ---- - drivers/firmware/qcom_scm.c | 87 +++++++++++++++++++++++++++++---------------- - 1 file changed, 57 insertions(+), 30 deletions(-) - -(limited to 'drivers/firmware/qcom_scm.c') - ---- a/drivers/firmware/qcom_scm.c -+++ b/drivers/firmware/qcom_scm.c -@@ -28,12 +28,15 @@ - - #include "qcom_scm.h" - -+#define SCM_NOCLK 1 -+ - struct qcom_scm { - struct device *dev; - struct clk *core_clk; - struct clk *iface_clk; - struct clk *bus_clk; - struct reset_controller_dev reset; -+ int is_clkdisabled; - }; - - static struct qcom_scm *__scm; -@@ -42,6 +45,9 @@ static int qcom_scm_clk_enable(void) - { - int ret; - -+ if (__scm->is_clkdisabled) -+ return 0; -+ - ret = clk_prepare_enable(__scm->core_clk); - if (ret) - goto bail; -@@ -66,6 +72,9 @@ bail: - - static void qcom_scm_clk_disable(void) - { -+ if (__scm->is_clkdisabled) -+ return; -+ - clk_disable_unprepare(__scm->core_clk); - clk_disable_unprepare(__scm->iface_clk); - clk_disable_unprepare(__scm->bus_clk); -@@ -320,37 +329,61 @@ bool qcom_scm_is_available(void) - } - EXPORT_SYMBOL(qcom_scm_is_available); - -+static const struct of_device_id qcom_scm_dt_match[] = { -+ { .compatible = "qcom,scm-apq8064",}, -+ { .compatible = "qcom,scm-msm8660",}, -+ { .compatible = "qcom,scm-msm8960",}, -+ { .compatible = "qcom,scm-ipq807x", .data = (void *)SCM_NOCLK }, -+ { .compatible = "qcom,scm-ipq806x", .data = (void *)SCM_NOCLK }, -+ { .compatible = "qcom,scm-ipq40xx", .data = (void *)SCM_NOCLK }, -+ { .compatible = "qcom,scm-msm8960",}, -+ { .compatible = "qcom,scm-msm8960",}, -+ { .compatible = "qcom,scm",}, -+ {} -+}; -+ - static int qcom_scm_probe(struct platform_device *pdev) - { - struct qcom_scm *scm; -+ const struct of_device_id *id; - int ret; - - scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL); - if (!scm) - return -ENOMEM; - -- scm->core_clk = devm_clk_get(&pdev->dev, "core"); -- if (IS_ERR(scm->core_clk)) { -- if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER) -- return PTR_ERR(scm->core_clk); -+ id = of_match_device(qcom_scm_dt_match, &pdev->dev); -+ if (id) -+ scm->is_clkdisabled = (unsigned int)id->data; -+ else -+ scm->is_clkdisabled = 0; -+ -+ if (!(scm->is_clkdisabled)) { -+ -+ scm->core_clk = devm_clk_get(&pdev->dev, "core"); -+ if (IS_ERR(scm->core_clk)) { -+ if (PTR_ERR(scm->core_clk) == -EPROBE_DEFER) -+ return PTR_ERR(scm->core_clk); - -- scm->core_clk = NULL; -- } -- -- if (of_device_is_compatible(pdev->dev.of_node, "qcom,scm")) { -- scm->iface_clk = devm_clk_get(&pdev->dev, "iface"); -- if (IS_ERR(scm->iface_clk)) { -- if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER) -- dev_err(&pdev->dev, "failed to acquire iface clk\n"); -- return PTR_ERR(scm->iface_clk); -+ scm->core_clk = NULL; - } - -- scm->bus_clk = devm_clk_get(&pdev->dev, "bus"); -- if (IS_ERR(scm->bus_clk)) { -- if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER) -- dev_err(&pdev->dev, "failed to acquire bus clk\n"); -- return PTR_ERR(scm->bus_clk); -+ if (of_device_is_compatible(pdev->dev.of_node, "qcom,scm")) { -+ scm->iface_clk = devm_clk_get(&pdev->dev, "iface"); -+ if (IS_ERR(scm->iface_clk)) { -+ if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER) -+ dev_err(&pdev->dev, "failed to acquire iface clk\n"); -+ return PTR_ERR(scm->iface_clk); -+ } -+ -+ scm->bus_clk = devm_clk_get(&pdev->dev, "bus"); -+ if (IS_ERR(scm->bus_clk)) { -+ if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER) -+ dev_err(&pdev->dev, "failed to acquire bus clk\n"); -+ return PTR_ERR(scm->bus_clk); -+ } - } -+ - } - - scm->reset.ops = &qcom_scm_pas_reset_ops; -@@ -358,10 +391,12 @@ static int qcom_scm_probe(struct platfor - scm->reset.of_node = pdev->dev.of_node; - reset_controller_register(&scm->reset); - -- /* vote for max clk rate for highest performance */ -- ret = clk_set_rate(scm->core_clk, INT_MAX); -- if (ret) -- return ret; -+ if (!(scm->is_clkdisabled)) { -+ /* vote for max clk rate for highest performance */ -+ ret = clk_set_rate(scm->core_clk, INT_MAX); -+ if (ret) -+ return ret; -+ } - - __scm = scm; - __scm->dev = &pdev->dev; -@@ -371,14 +406,6 @@ static int qcom_scm_probe(struct platfor - return 0; - } - --static const struct of_device_id qcom_scm_dt_match[] = { -- { .compatible = "qcom,scm-apq8064",}, -- { .compatible = "qcom,scm-msm8660",}, -- { .compatible = "qcom,scm-msm8960",}, -- { .compatible = "qcom,scm",}, -- {} --}; -- - static struct platform_driver qcom_scm_driver = { - .driver = { - .name = "qcom_scm", diff --git a/target/linux/ipq40xx/patches-4.9/0073-pinctrl-qom-use-scm_call-to-route-GPIO-irq-to-Apps.patch b/target/linux/ipq40xx/patches-4.9/0073-pinctrl-qom-use-scm_call-to-route-GPIO-irq-to-Apps.patch deleted file mode 100644 index c6a0470ea..000000000 --- a/target/linux/ipq40xx/patches-4.9/0073-pinctrl-qom-use-scm_call-to-route-GPIO-irq-to-Apps.patch +++ /dev/null @@ -1,166 +0,0 @@ -From 2034addc7e193dc81d7ca60d8884832751b76758 Mon Sep 17 00:00:00 2001 -From: Ajay Kishore -Date: Tue, 24 Jan 2017 14:14:16 +0530 -Subject: pinctrl: qcom: use scm_call to route GPIO irq to Apps - -For IPQ806x targets, TZ protects the registers that are used to -configure the routing of interrupts to a target processor. -To resolve this, this patch uses scm call to route GPIO interrupts -to application processor. Also the scm call interface is changed. - -Change-Id: Ib6c06829d04bc8c20483c36e63da92e26cdef9ce -Signed-off-by: Ajay Kishore ---- - drivers/firmware/qcom_scm-32.c | 17 +++++++++++++++++ - drivers/firmware/qcom_scm-64.c | 9 +++++++++ - drivers/firmware/qcom_scm.c | 13 +++++++++++++ - drivers/firmware/qcom_scm.h | 8 ++++++++ - drivers/pinctrl/qcom/pinctrl-msm.c | 34 ++++++++++++++++++++++++++++------ - include/linux/qcom_scm.h | 3 ++- - 6 files changed, 77 insertions(+), 7 deletions(-) - ---- a/drivers/firmware/qcom_scm-32.c -+++ b/drivers/firmware/qcom_scm-32.c -@@ -560,3 +560,21 @@ int __qcom_scm_pas_mss_reset(struct devi - - return ret ? : le32_to_cpu(out); - } -+ -+int __qcom_scm_pinmux_read(u32 svc_id, u32 cmd_id, u32 arg1) -+{ -+ s32 ret; -+ -+ ret = qcom_scm_call_atomic1(svc_id, cmd_id, arg1); -+ -+ return ret; -+} -+ -+int __qcom_scm_pinmux_write(u32 svc_id, u32 cmd_id, u32 arg1, u32 arg2) -+{ -+ s32 ret; -+ -+ ret = qcom_scm_call_atomic2(svc_id, cmd_id, arg1, arg2); -+ -+ return ret; -+ } ---- a/drivers/firmware/qcom_scm-64.c -+++ b/drivers/firmware/qcom_scm-64.c -@@ -365,3 +365,12 @@ int __qcom_scm_pas_mss_reset(struct devi - - return ret ? : res.a1; - } -+int __qcom_scm_pinmux_read(u32 svc_id, u32 cmd_id, u32 arg1) -+{ -+ return -ENOTSUPP; -+} -+ -+int __qcom_scm_pinmux_write(u32 svc_id, u32 cmd_id, u32 arg1, u32 arg2) -+{ -+ return -ENOTSUPP; -+} ---- a/drivers/firmware/qcom_scm.c -+++ b/drivers/firmware/qcom_scm.c -@@ -443,3 +443,16 @@ static int __init qcom_scm_init(void) - return platform_driver_register(&qcom_scm_driver); - } - subsys_initcall(qcom_scm_init); -+ -+int qcom_scm_pinmux_read(u32 arg1) -+{ -+ return __qcom_scm_pinmux_read(SCM_SVC_IO_ACCESS, SCM_IO_READ, arg1); -+} -+EXPORT_SYMBOL(qcom_scm_pinmux_read); -+ -+int qcom_scm_pinmux_write(u32 arg1, u32 arg2) -+{ -+ return __qcom_scm_pinmux_write(SCM_SVC_IO_ACCESS, SCM_IO_WRITE, -+ arg1, arg2); -+} -+EXPORT_SYMBOL(qcom_scm_pinmux_write); ---- a/drivers/firmware/qcom_scm.h -+++ b/drivers/firmware/qcom_scm.h -@@ -56,6 +56,13 @@ extern int __qcom_scm_pas_auth_and_rese - extern int __qcom_scm_pas_shutdown(struct device *dev, u32 peripheral); - extern int __qcom_scm_pas_mss_reset(struct device *dev, bool reset); - -+#define SCM_IO_READ 1 -+#define SCM_IO_WRITE 2 -+#define SCM_SVC_IO_ACCESS 0x5 -+ -+s32 __qcom_scm_pinmux_read(u32 svc_id, u32 cmd_id, u32 arg1); -+s32 __qcom_scm_pinmux_write(u32 svc_id, u32 cmd_id, u32 arg1, u32 arg2); -+ - /* common error codes */ - #define QCOM_SCM_V2_EBUSY -12 - #define QCOM_SCM_ENOMEM -5 ---- a/drivers/pinctrl/qcom/pinctrl-msm.c -+++ b/drivers/pinctrl/qcom/pinctrl-msm.c -@@ -30,7 +30,8 @@ - #include - #include - #include -- -+#include -+#include - #include "../core.h" - #include "../pinconf.h" - #include "pinctrl-msm.h" -@@ -635,6 +636,9 @@ static int msm_gpio_irq_set_type(struct - const struct msm_pingroup *g; - unsigned long flags; - u32 val; -+ u32 addr; -+ int ret; -+ const __be32 *reg; - - g = &pctrl->soc->groups[d->hwirq]; - -@@ -648,11 +652,30 @@ static int msm_gpio_irq_set_type(struct - else - clear_bit(d->hwirq, pctrl->dual_edge_irqs); - -+ ret = of_device_is_compatible(pctrl->dev->of_node, -+ "qcom,ipq8064-pinctrl"); - /* Route interrupts to application cpu */ -- val = readl(pctrl->regs + g->intr_target_reg); -- val &= ~(7 << g->intr_target_bit); -- val |= g->intr_target_kpss_val << g->intr_target_bit; -- writel(val, pctrl->regs + g->intr_target_reg); -+ if (!ret) { -+ val = readl(pctrl->regs + g->intr_target_reg); -+ val &= ~(7 << g->intr_target_bit); -+ val |= g->intr_target_kpss_val << g->intr_target_bit; -+ writel(val, pctrl->regs + g->intr_target_reg); -+ } else { -+ reg = of_get_property(pctrl->dev->of_node, "reg", NULL); -+ if (reg) { -+ addr = be32_to_cpup(reg) + g->intr_target_reg; -+ val = qcom_scm_pinmux_read(addr); -+ __iormb(); -+ -+ val &= ~(7 << g->intr_target_bit); -+ val |= g->intr_target_kpss_val << g->intr_target_bit; -+ -+ __iowmb(); -+ ret = qcom_scm_pinmux_write(addr, val); -+ if (ret) -+ pr_err("\n Routing interrupts to Apps proc failed"); -+ } -+ } - - /* Update configuration for gpio. - * RAW_STATUS_EN is left on for all gpio irqs. Due to the -@@ -926,4 +949,3 @@ int msm_pinctrl_remove(struct platform_d - return 0; - } - EXPORT_SYMBOL(msm_pinctrl_remove); -- ---- a/include/linux/qcom_scm.h -+++ b/include/linux/qcom_scm.h -@@ -46,4 +46,6 @@ extern void qcom_scm_cpu_power_down(u32 - - extern u32 qcom_scm_get_version(void); - -+extern s32 qcom_scm_pinmux_read(u32 arg1); -+extern s32 qcom_scm_pinmux_write(u32 arg1, u32 arg2); - #endif diff --git a/target/linux/ipq40xx/patches-4.9/0074-ipq806x-usb-Control-USB-master-reset.patch b/target/linux/ipq40xx/patches-4.9/0074-ipq806x-usb-Control-USB-master-reset.patch deleted file mode 100644 index d5ff86829..000000000 --- a/target/linux/ipq40xx/patches-4.9/0074-ipq806x-usb-Control-USB-master-reset.patch +++ /dev/null @@ -1,75 +0,0 @@ -From a86bda9f8a7965f0cedd347a9c04800eb9f41ea3 Mon Sep 17 00:00:00 2001 -From: Vasudevan Murugesan -Date: Tue, 21 Jul 2015 10:22:38 +0530 -Subject: ipq806x: usb: Control USB master reset - -During removal of the glue layer(dwc3-of-simple), -USB master reset is set to active and during insertion -it is de-activated. - -Change-Id: I537dc810f6cb2a46664ee674840145066432b957 -Signed-off-by: Vasudevan Murugesan -(cherry picked from commit 4611e13580a216812f85f0801b95442d02eeb836) ---- - drivers/usb/dwc3/dwc3-of-simple.c | 22 ++++++++++++++++++++++ - 1 file changed, 12 insertions(+) - -(limited to 'drivers/usb/dwc3/dwc3-of-simple.c') - -diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c -index f9e92ef..49bf556 100644 ---- a/drivers/usb/dwc3/dwc3-of-simple.c -+++ b/drivers/usb/dwc3/dwc3-of-simple.c -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -34,6 +35,8 @@ struct dwc3_of_simple { - struct device *dev; - struct clk **clks; - int num_clocks; -+ struct reset_control *mstr_rst_30_0; -+ struct reset_control *mstr_rst_30_1; - }; - - static int dwc3_of_simple_probe(struct platform_device *pdev) -@@ -89,6 +92,20 @@ static int dwc3_of_simple_probe(struct platform_device *pdev) - simple->clks[i] = clk; - } - -+ simple->mstr_rst_30_0 = devm_reset_control_get(dev, "usb30_0_mstr_rst"); -+ -+ if (!IS_ERR(simple->mstr_rst_30_0)) -+ reset_control_deassert(simple->mstr_rst_30_0); -+ else -+ dev_dbg(simple->dev, "cannot get handle for USB PHY 0 master reset control\n"); -+ -+ simple->mstr_rst_30_1 = devm_reset_control_get(dev, "usb30_1_mstr_rst"); -+ -+ if (!IS_ERR(simple->mstr_rst_30_1)) -+ reset_control_deassert(simple->mstr_rst_30_1); -+ else -+ dev_dbg(simple->dev, "cannot get handle for USB PHY 1 master reset control\n"); -+ - ret = of_platform_populate(np, NULL, NULL, dev); - if (ret) { - for (i = 0; i < simple->num_clocks; i++) { -@@ -117,6 +134,12 @@ static int dwc3_of_simple_remove(struct platform_device *pdev) - clk_put(simple->clks[i]); - } - -+ if (!IS_ERR(simple->mstr_rst_30_0)) -+ reset_control_assert(simple->mstr_rst_30_0); -+ -+ if (!IS_ERR(simple->mstr_rst_30_1)) -+ reset_control_assert(simple->mstr_rst_30_1); -+ - of_platform_depopulate(dev); - - pm_runtime_put_sync(dev); --- -cgit v1.1 diff --git a/target/linux/ipq40xx/patches-4.9/104-mtd-nand-add-Winbond-manufacturer-and-chip.patch b/target/linux/ipq40xx/patches-4.9/104-mtd-nand-add-Winbond-manufacturer-and-chip.patch deleted file mode 100644 index d2b58a466..000000000 --- a/target/linux/ipq40xx/patches-4.9/104-mtd-nand-add-Winbond-manufacturer-and-chip.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 07b6d0cdbbda8c917480eceaec668f09e4cf24a5 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Mon, 14 Nov 2016 23:49:22 +0100 -Subject: [PATCH] mtd: nand: add Winbond manufacturer and chip - -This patch adds the W25N01GV NAND to the table of -known devices. Without this patch the device gets detected: - -nand: device found, Manufacturer ID: 0xef, Chip ID: 0xaa -nand: Unknown NAND 256MiB 1,8V 8-bit -nand: 256 MiB, SLC, erase size: 64 KiB, page size: 1024, OOB size : 16 - -Whereas the u-boot identifies it as: -spi_nand: spi_nand_flash_probe SF NAND ID 00:ef:aa:21 -SF: Detected W25N01GV with page size 2 KiB, total 128 MiB - -Due to the page size discrepancy, it's impossible to attach -ubi volumes on the device. - -Signed-off-by: Christian Lamparter ---- - drivers/mtd/nand/nand_ids.c | 4 ++++ - include/linux/mtd/nand.h | 1 + - 2 files changed, 5 insertions(+) - ---- a/drivers/mtd/nand/nand_ids.c -+++ b/drivers/mtd/nand/nand_ids.c -@@ -52,6 +52,10 @@ struct nand_flash_dev nand_flash_ids[] = - { .id = {0xad, 0xde, 0x94, 0xda, 0x74, 0xc4} }, - SZ_8K, SZ_8K, SZ_2M, NAND_NEED_SCRAMBLING, 6, 640, - NAND_ECC_INFO(40, SZ_1K), 4 }, -+ {"W25N01GV 1G 3.3V 8-bit", -+ { .id = {0xef, 0xaa} }, -+ SZ_2K, SZ_128, SZ_128K, NAND_NO_SUBPAGE_WRITE, -+ 2, 64, NAND_ECC_INFO(1, SZ_512) }, - - LEGACY_ID_NAND("NAND 4MiB 5V 8-bit", 0x6B, 4, SZ_8K, SP_OPTIONS), - LEGACY_ID_NAND("NAND 4MiB 3,3V 8-bit", 0xE3, 4, SZ_8K, SP_OPTIONS), diff --git a/target/linux/ipq40xx/patches-4.9/105-mtd-nor-add-mx25l25635f.patch b/target/linux/ipq40xx/patches-4.9/105-mtd-nor-add-mx25l25635f.patch deleted file mode 100644 index edfafda48..000000000 --- a/target/linux/ipq40xx/patches-4.9/105-mtd-nor-add-mx25l25635f.patch +++ /dev/null @@ -1,22 +0,0 @@ -Subject: mtd: spi-nor: add mx25l25635f with SECT_4K - -This patch fixes an issue with the creation of the -ubi volume on the AVM FRITZ!Box 4040. The mx25l25635f -and mx25l25635e support SECT_4K which will set the -erase size to 4K. This is used by ubi to calculate -VID header offsets. Without this, uboot and linux -disagrees about the layout and refuse to attach -the ubi volume created by the other. - ---- ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1018,7 +1018,7 @@ static const struct flash_info spi_nor_i - { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, - { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, - { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) }, -- { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) }, -+ { "mx25l25635f", INFO(0xc22019, 0, 64 * 1024, 512, SECT_4K) }, - { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) }, - { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) }, - { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) }, diff --git a/target/linux/ipq40xx/patches-4.9/305-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch b/target/linux/ipq40xx/patches-4.9/305-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch deleted file mode 100644 index 40f5e407b..000000000 --- a/target/linux/ipq40xx/patches-4.9/305-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch +++ /dev/null @@ -1,109 +0,0 @@ -From 6a6c067b7ce2b3de4efbafddc134afbea3ddc1a3 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Fri, 8 Apr 2016 15:26:10 -0500 -Subject: [PATCH] qcom: ipq4019: use v2 of the kpss bringup mechanism - -v1 was the incorrect choice here and sometimes the board -would not come up properly. - -Signed-off-by: Matthew McClintock -Signed-off-by: Christian Lamparter ---- -Changes: - - moved L2-Cache to be a subnode of cpu0 ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 32 ++++++++++++++++++++++++-------- - 1 file changed, 24 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -34,19 +34,27 @@ - cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc0>; - qcom,saw = <&saw0>; - reg = <0x0>; - clocks = <&gcc GCC_APPS_CLK_SRC>; - clock-frequency = <0>; - operating-points-v2 = <&cpu0_opp_table>; -+ -+ L2: l2-cache { -+ compatible = "qcom,arch-cache"; -+ cache-level = <2>; -+ qcom,saw = <&saw_l2>; -+ }; - }; - - cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc1>; - qcom,saw = <&saw1>; - reg = <0x1>; -@@ -58,7 +66,8 @@ - cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc2>; - qcom,saw = <&saw2>; - reg = <0x2>; -@@ -70,7 +79,8 @@ - cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; -- enable-method = "qcom,kpss-acc-v1"; -+ enable-method = "qcom,kpss-acc-v2"; -+ next-level-cache = <&L2>; - qcom,acc = <&acc3>; - qcom,saw = <&saw3>; - reg = <0x3>; -@@ -212,22 +222,22 @@ - }; - - acc0: clock-controller@b088000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b088000 0x1000>, <0xb008000 0x1000>; - }; - - acc1: clock-controller@b098000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b098000 0x1000>, <0xb008000 0x1000>; - }; - - acc2: clock-controller@b0a8000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>; - }; - - acc3: clock-controller@b0b8000 { -- compatible = "qcom,kpss-acc-v1"; -+ compatible = "qcom,kpss-acc-v2"; - reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>; - }; - -@@ -255,6 +265,12 @@ - regulator; - }; - -+ saw_l2: regulator@b012000 { -+ compatible = "qcom,saw2"; -+ reg = <0xb012000 0x1000>; -+ regulator; -+ }; -+ - serial@78af000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x78af000 0x200>; diff --git a/target/linux/ipq40xx/patches-4.9/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch b/target/linux/ipq40xx/patches-4.9/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch deleted file mode 100644 index 3c3fc98a2..000000000 --- a/target/linux/ipq40xx/patches-4.9/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch +++ /dev/null @@ -1,130 +0,0 @@ -From ea5f4d6f4716f3a0bb4fc3614b7a0e8c0df1cb81 Mon Sep 17 00:00:00 2001 -From: Matthew McClintock -Date: Thu, 17 Mar 2016 16:22:28 -0500 -Subject: [PATCH] qcom: ipq4019: add USB nodes to ipq4019 SoC device tree - -This adds the SoC nodes to the ipq4019 device tree and -enable it for the DK01.1 board. - -Signed-off-by: Matthew McClintock -Signed-off-by: Christian Lamparter ---- -Changes: - - replaced space with tab - - added sleep and mock_utmi clocks - - added registers for usb2 and usb3 parent node - - changed compatible to qca,ipa4019-dwc3 - - updated usb2 and usb3 names - (included the reg - in case they become necessary later) ---- - arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 ++++++++ - arch/arm/boot/dts/qcom-ipq4019.dtsi | 71 +++++++++++++++++++++++++++ - 2 files changed, 91 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -@@ -108,5 +108,25 @@ - watchdog@b017000 { - status = "ok"; - }; -+ -+ usb3_ss_phy: ssphy@9a000 { -+ status = "ok"; -+ }; -+ -+ usb3_hs_phy: hsphy@a6000 { -+ status = "ok"; -+ }; -+ -+ usb3: usb3@8af8800 { -+ status = "ok"; -+ }; -+ -+ usb2_hs_phy: hsphy@a8000 { -+ status = "ok"; -+ }; -+ -+ usb2: usb2@60f8800 { -+ status = "ok"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -307,5 +307,76 @@ - compatible = "qcom,pshold"; - reg = <0x4ab000 0x4>; - }; -+ -+ usb3_ss_phy: ssphy@9a000 { -+ compatible = "qca,uni-ssphy"; -+ reg = <0x9a000 0x800>; -+ reg-names = "phy_base"; -+ resets = <&gcc USB3_UNIPHY_PHY_ARES>; -+ reset-names = "por_rst"; -+ status = "disabled"; -+ }; -+ -+ usb3_hs_phy: hsphy@a6000 { -+ compatible = "qca,baldur-usb3-hsphy"; -+ reg = <0xa6000 0x40>; -+ reg-names = "phy_base"; -+ resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>; -+ reset-names = "por_rst", "srif_rst"; -+ status = "disabled"; -+ }; -+ -+ usb3@8af8800 { -+ compatible = "qca,ipq4019-dwc3"; -+ reg = <0x8af8800 0x100>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ clocks = <&gcc GCC_USB3_MASTER_CLK>, -+ <&gcc GCC_USB3_SLEEP_CLK>, -+ <&gcc GCC_USB3_MOCK_UTMI_CLK>; -+ clock-names = "master", "sleep", "mock_utmi"; -+ ranges; -+ status = "disabled"; -+ -+ dwc3@8a00000 { -+ compatible = "snps,dwc3"; -+ reg = <0x8a00000 0xf8000>; -+ interrupts = <0 132 0>; -+ usb-phy = <&usb3_hs_phy>, <&usb3_ss_phy>; -+ phy-names = "usb2-phy", "usb3-phy"; -+ dr_mode = "host"; -+ }; -+ }; -+ -+ usb2_hs_phy: hsphy@a8000 { -+ compatible = "qca,baldur-usb2-hsphy"; -+ reg = <0xa8000 0x40>; -+ reg-names = "phy_base"; -+ resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>; -+ reset-names = "por_rst", "srif_rst"; -+ status = "disabled"; -+ }; -+ -+ usb2@60f8800 { -+ compatible = "qca,ipq4019-dwc3"; -+ reg = <0x60f8800 0x100>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ clocks = <&gcc GCC_USB2_MASTER_CLK>, -+ <&gcc GCC_USB2_SLEEP_CLK>, -+ <&gcc GCC_USB2_MOCK_UTMI_CLK>; -+ clock-names = "master", "sleep", "mock_utmi"; -+ ranges; -+ status = "disabled"; -+ -+ dwc3@6000000 { -+ compatible = "snps,dwc3"; -+ reg = <0x6000000 0xf8000>; -+ interrupts = <0 136 0>; -+ usb-phy = <&usb2_hs_phy>; -+ phy-names = "usb2-phy"; -+ dr_mode = "host"; -+ }; -+ }; - }; - }; diff --git a/target/linux/ipq40xx/patches-4.9/307-ARM-qcom-Add-IPQ4019-SoC-support.patch b/target/linux/ipq40xx/patches-4.9/307-ARM-qcom-Add-IPQ4019-SoC-support.patch deleted file mode 100644 index 4cbcc0aea..000000000 --- a/target/linux/ipq40xx/patches-4.9/307-ARM-qcom-Add-IPQ4019-SoC-support.patch +++ /dev/null @@ -1,35 +0,0 @@ -From e7748d641ae37081e2034869491f1629461ae13c Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sat, 19 Nov 2016 00:58:18 +0100 -Subject: [PATCH] ARM: qcom: Add IPQ4019 SoC support - -Add support for the Qualcomm Atheros IPQ4019 SoC. - -Signed-off-by: Christian Lamparter ---- - arch/arm/Makefile | 1 + - arch/arm/mach-qcom/Kconfig | 5 +++++ - 2 files changed, 6 insertions(+) - ---- a/arch/arm/Makefile -+++ b/arch/arm/Makefile -@@ -147,6 +147,7 @@ textofs-$(CONFIG_SA1111) := 0x00208000 - endif - textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 - textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 -+textofs-$(CONFIG_ARCH_IPQ40XX) := 0x00208000 - textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 - - # Machine directory name. This list is sorted alphanumerically ---- a/arch/arm/mach-qcom/Kconfig -+++ b/arch/arm/mach-qcom/Kconfig -@@ -28,4 +28,9 @@ config ARCH_MDM9615 - bool "Enable support for MDM9615" - select CLKSRC_QCOM - -+config ARCH_IPQ40XX -+ bool "Enable support for IPQ40XX" -+ select CLKSRC_QCOM -+ select HAVE_ARM_ARCH_TIMER -+ - endif diff --git a/target/linux/ipq40xx/patches-4.9/308-dts-ipq4019-add-both-IPQ4019-wifi-block-definitions.patch b/target/linux/ipq40xx/patches-4.9/308-dts-ipq4019-add-both-IPQ4019-wifi-block-definitions.patch deleted file mode 100644 index d12ca4bef..000000000 --- a/target/linux/ipq40xx/patches-4.9/308-dts-ipq4019-add-both-IPQ4019-wifi-block-definitions.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 6091a49b0b06bf838fed80498c4f5f40d0fbd447 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sat, 19 Nov 2016 01:22:46 +0100 -Subject: [PATCH] dts: ipq4019: add both IPQ4019 wifi block definitions - -The IPQ4019 has two ath10k blocks on the AHB. Both wifi's -are already supported by ath10k. - -Signed-off-by: Christian Lamparter ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 84 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 84 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -378,5 +378,89 @@ - dr_mode = "host"; - }; - }; -+ -+ wifi0: wifi@a000000 { -+ compatible = "qcom,ipq4019-wifi"; -+ reg = <0xa000000 0x200000>; -+ resets = <&gcc WIFI0_CPU_INIT_RESET -+ &gcc WIFI0_RADIO_SRIF_RESET -+ &gcc WIFI0_RADIO_WARM_RESET -+ &gcc WIFI0_RADIO_COLD_RESET -+ &gcc WIFI0_CORE_WARM_RESET -+ &gcc WIFI0_CORE_COLD_RESET>; -+ reset-names = "wifi_cpu_init", "wifi_radio_srif", -+ "wifi_radio_warm", "wifi_radio_cold", -+ "wifi_core_warm", "wifi_core_cold"; -+ clocks = <&gcc GCC_WCSS2G_CLK -+ &gcc GCC_WCSS2G_REF_CLK -+ &gcc GCC_WCSS2G_RTC_CLK>; -+ clock-names = "wifi_wcss_cmd", "wifi_wcss_ref", -+ "wifi_wcss_rtc"; -+ interrupts = <0 32 IRQ_TYPE_EDGE_RISING -+ 0 33 IRQ_TYPE_EDGE_RISING -+ 0 34 IRQ_TYPE_EDGE_RISING -+ 0 35 IRQ_TYPE_EDGE_RISING -+ 0 36 IRQ_TYPE_EDGE_RISING -+ 0 37 IRQ_TYPE_EDGE_RISING -+ 0 38 IRQ_TYPE_EDGE_RISING -+ 0 39 IRQ_TYPE_EDGE_RISING -+ 0 40 IRQ_TYPE_EDGE_RISING -+ 0 41 IRQ_TYPE_EDGE_RISING -+ 0 42 IRQ_TYPE_EDGE_RISING -+ 0 43 IRQ_TYPE_EDGE_RISING -+ 0 44 IRQ_TYPE_EDGE_RISING -+ 0 45 IRQ_TYPE_EDGE_RISING -+ 0 46 IRQ_TYPE_EDGE_RISING -+ 0 47 IRQ_TYPE_EDGE_RISING -+ 0 168 IRQ_TYPE_NONE>; -+ interrupt-names = "msi0", "msi1", "msi2", "msi3", -+ "msi4", "msi5", "msi6", "msi7", -+ "msi8", "msi9", "msi10", "msi11", -+ "msi12", "msi13", "msi14", "msi15", -+ "legacy"; -+ status = "disabled"; -+ }; -+ -+ wifi1: wifi@a800000 { -+ compatible = "qcom,ipq4019-wifi"; -+ reg = <0xa800000 0x200000>; -+ resets = <&gcc WIFI1_CPU_INIT_RESET -+ &gcc WIFI1_RADIO_SRIF_RESET -+ &gcc WIFI1_RADIO_WARM_RESET -+ &gcc WIFI1_RADIO_COLD_RESET -+ &gcc WIFI1_CORE_WARM_RESET -+ &gcc WIFI1_CORE_COLD_RESET>; -+ reset-names = "wifi_cpu_init", "wifi_radio_srif", -+ "wifi_radio_warm", "wifi_radio_cold", -+ "wifi_core_warm", "wifi_core_cold"; -+ clocks = <&gcc GCC_WCSS5G_CLK -+ &gcc GCC_WCSS5G_REF_CLK -+ &gcc GCC_WCSS5G_RTC_CLK>; -+ clock-names = "wifi_wcss_cmd", "wifi_wcss_ref", -+ "wifi_wcss_rtc"; -+ interrupts = <0 48 IRQ_TYPE_EDGE_RISING -+ 0 49 IRQ_TYPE_EDGE_RISING -+ 0 50 IRQ_TYPE_EDGE_RISING -+ 0 51 IRQ_TYPE_EDGE_RISING -+ 0 52 IRQ_TYPE_EDGE_RISING -+ 0 53 IRQ_TYPE_EDGE_RISING -+ 0 54 IRQ_TYPE_EDGE_RISING -+ 0 55 IRQ_TYPE_EDGE_RISING -+ 0 56 IRQ_TYPE_EDGE_RISING -+ 0 57 IRQ_TYPE_EDGE_RISING -+ 0 58 IRQ_TYPE_EDGE_RISING -+ 0 59 IRQ_TYPE_EDGE_RISING -+ 0 60 IRQ_TYPE_EDGE_RISING -+ 0 61 IRQ_TYPE_EDGE_RISING -+ 0 62 IRQ_TYPE_EDGE_RISING -+ 0 63 IRQ_TYPE_EDGE_RISING -+ 0 169 IRQ_TYPE_NONE>; -+ interrupt-names = "msi0", "msi1", "msi2", "msi3", -+ "msi4", "msi5", "msi6", "msi7", -+ "msi8", "msi9", "msi10", "msi11", -+ "msi12", "msi13", "msi14", "msi15", -+ "legacy"; -+ status = "disabled"; -+ }; - }; - }; diff --git a/target/linux/ipq40xx/patches-4.9/309-dts-ipq4019-add-pseudo-random-number-generator.patch b/target/linux/ipq40xx/patches-4.9/309-dts-ipq4019-add-pseudo-random-number-generator.patch deleted file mode 100644 index abcbb6ee5..000000000 --- a/target/linux/ipq40xx/patches-4.9/309-dts-ipq4019-add-pseudo-random-number-generator.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 26fa6fdc627b523277c7a79907233596b2f8a3ef Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sat, 19 Nov 2016 03:29:04 +0100 -Subject: [PATCH] dts: ipq4019: add pseudo random number generator - -This architecture has a pseudo random number generator -supported by the existing "qcom,prng" binding. - -Signed-off-by: Christian Lamparter ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -271,6 +271,13 @@ - regulator; - }; - -+ rng@22000 { -+ compatible = "qcom,prng"; -+ reg = <0x22000 0x140>; -+ clocks = <&gcc GCC_PRNG_AHB_CLK>; -+ clock-names = "core"; -+ }; -+ - serial@78af000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x78af000 0x200>; diff --git a/target/linux/ipq40xx/patches-4.9/310-msm-adhoc-bus-support.patch b/target/linux/ipq40xx/patches-4.9/310-msm-adhoc-bus-support.patch deleted file mode 100644 index ff0e1e0fe..000000000 --- a/target/linux/ipq40xx/patches-4.9/310-msm-adhoc-bus-support.patch +++ /dev/null @@ -1,11026 +0,0 @@ -From: Christian Lamparter -Subject: BUS: add MSM_BUS ---- a/drivers/bus/Makefile -+++ b/drivers/bus/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_BRCMSTB_GISB_ARB) += brcmst - obj-$(CONFIG_IMX_WEIM) += imx-weim.o - obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o - obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o -+obj-$(CONFIG_BUS_TOPOLOGY_ADHOC)+= msm_bus/ - - # Interconnect bus driver for OMAP SoCs. - obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o ---- a/drivers/bus/Kconfig -+++ b/drivers/bus/Kconfig -@@ -92,6 +92,8 @@ config MVEBU_MBUS - Driver needed for the MBus configuration on Marvell EBU SoCs - (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). - -+source "drivers/bus/msm_bus/Kconfig" -+ - config OMAP_INTERCONNECT - tristate "OMAP INTERCONNECT DRIVER" - depends on ARCH_OMAP2PLUS ---- /dev/null -+++ b/include/dt-bindings/msm/msm-bus-ids.h -@@ -0,0 +1,869 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __MSM_BUS_IDS_H -+#define __MSM_BUS_IDS_H -+ -+/* Topology related enums */ -+#define MSM_BUS_FAB_DEFAULT 0 -+#define MSM_BUS_FAB_APPSS 0 -+#define MSM_BUS_FAB_SYSTEM 1024 -+#define MSM_BUS_FAB_MMSS 2048 -+#define MSM_BUS_FAB_SYSTEM_FPB 3072 -+#define MSM_BUS_FAB_CPSS_FPB 4096 -+ -+#define MSM_BUS_FAB_BIMC 0 -+#define MSM_BUS_FAB_SYS_NOC 1024 -+#define MSM_BUS_FAB_MMSS_NOC 2048 -+#define MSM_BUS_FAB_OCMEM_NOC 3072 -+#define MSM_BUS_FAB_PERIPH_NOC 4096 -+#define MSM_BUS_FAB_CONFIG_NOC 5120 -+#define MSM_BUS_FAB_OCMEM_VNOC 6144 -+#define MSM_BUS_FAB_MMSS_AHB 2049 -+#define MSM_BUS_FAB_A0_NOC 6145 -+#define MSM_BUS_FAB_A1_NOC 6146 -+#define MSM_BUS_FAB_A2_NOC 6147 -+ -+#define MSM_BUS_MASTER_FIRST 1 -+#define MSM_BUS_MASTER_AMPSS_M0 1 -+#define MSM_BUS_MASTER_AMPSS_M1 2 -+#define MSM_BUS_APPSS_MASTER_FAB_MMSS 3 -+#define MSM_BUS_APPSS_MASTER_FAB_SYSTEM 4 -+#define MSM_BUS_SYSTEM_MASTER_FAB_APPSS 5 -+#define MSM_BUS_MASTER_SPS 6 -+#define MSM_BUS_MASTER_ADM_PORT0 7 -+#define MSM_BUS_MASTER_ADM_PORT1 8 -+#define MSM_BUS_SYSTEM_MASTER_ADM1_PORT0 9 -+#define MSM_BUS_MASTER_ADM1_PORT1 10 -+#define MSM_BUS_MASTER_LPASS_PROC 11 -+#define MSM_BUS_MASTER_MSS_PROCI 12 -+#define MSM_BUS_MASTER_MSS_PROCD 13 -+#define MSM_BUS_MASTER_MSS_MDM_PORT0 14 -+#define MSM_BUS_MASTER_LPASS 15 -+#define MSM_BUS_SYSTEM_MASTER_CPSS_FPB 16 -+#define MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB 17 -+#define MSM_BUS_SYSTEM_MASTER_MMSS_FPB 18 -+#define MSM_BUS_MASTER_ADM1_CI 19 -+#define MSM_BUS_MASTER_ADM0_CI 20 -+#define MSM_BUS_MASTER_MSS_MDM_PORT1 21 -+#define MSM_BUS_MASTER_MDP_PORT0 22 -+#define MSM_BUS_MASTER_MDP_PORT1 23 -+#define MSM_BUS_MMSS_MASTER_ADM1_PORT0 24 -+#define MSM_BUS_MASTER_ROTATOR 25 -+#define MSM_BUS_MASTER_GRAPHICS_3D 26 -+#define MSM_BUS_MASTER_JPEG_DEC 27 -+#define MSM_BUS_MASTER_GRAPHICS_2D_CORE0 28 -+#define MSM_BUS_MASTER_VFE 29 -+#define MSM_BUS_MASTER_VPE 30 -+#define MSM_BUS_MASTER_JPEG_ENC 31 -+#define MSM_BUS_MASTER_GRAPHICS_2D_CORE1 32 -+#define MSM_BUS_MMSS_MASTER_APPS_FAB 33 -+#define MSM_BUS_MASTER_HD_CODEC_PORT0 34 -+#define MSM_BUS_MASTER_HD_CODEC_PORT1 35 -+#define MSM_BUS_MASTER_SPDM 36 -+#define MSM_BUS_MASTER_RPM 37 -+#define MSM_BUS_MASTER_MSS 38 -+#define MSM_BUS_MASTER_RIVA 39 -+#define MSM_BUS_MASTER_SNOC_VMEM 40 -+#define MSM_BUS_MASTER_MSS_SW_PROC 41 -+#define MSM_BUS_MASTER_MSS_FW_PROC 42 -+#define MSM_BUS_MASTER_HMSS 43 -+#define MSM_BUS_MASTER_GSS_NAV 44 -+#define MSM_BUS_MASTER_PCIE 45 -+#define MSM_BUS_MASTER_SATA 46 -+#define MSM_BUS_MASTER_CRYPTO 47 -+#define MSM_BUS_MASTER_VIDEO_CAP 48 -+#define MSM_BUS_MASTER_GRAPHICS_3D_PORT1 49 -+#define MSM_BUS_MASTER_VIDEO_ENC 50 -+#define MSM_BUS_MASTER_VIDEO_DEC 51 -+#define MSM_BUS_MASTER_LPASS_AHB 52 -+#define MSM_BUS_MASTER_QDSS_BAM 53 -+#define MSM_BUS_MASTER_SNOC_CFG 54 -+#define MSM_BUS_MASTER_CRYPTO_CORE0 55 -+#define MSM_BUS_MASTER_CRYPTO_CORE1 56 -+#define MSM_BUS_MASTER_MSS_NAV 57 -+#define MSM_BUS_MASTER_OCMEM_DMA 58 -+#define MSM_BUS_MASTER_WCSS 59 -+#define MSM_BUS_MASTER_QDSS_ETR 60 -+#define MSM_BUS_MASTER_USB3 61 -+#define MSM_BUS_MASTER_JPEG 62 -+#define MSM_BUS_MASTER_VIDEO_P0 63 -+#define MSM_BUS_MASTER_VIDEO_P1 64 -+#define MSM_BUS_MASTER_MSS_PROC 65 -+#define MSM_BUS_MASTER_JPEG_OCMEM 66 -+#define MSM_BUS_MASTER_MDP_OCMEM 67 -+#define MSM_BUS_MASTER_VIDEO_P0_OCMEM 68 -+#define MSM_BUS_MASTER_VIDEO_P1_OCMEM 69 -+#define MSM_BUS_MASTER_VFE_OCMEM 70 -+#define MSM_BUS_MASTER_CNOC_ONOC_CFG 71 -+#define MSM_BUS_MASTER_RPM_INST 72 -+#define MSM_BUS_MASTER_RPM_DATA 73 -+#define MSM_BUS_MASTER_RPM_SYS 74 -+#define MSM_BUS_MASTER_DEHR 75 -+#define MSM_BUS_MASTER_QDSS_DAP 76 -+#define MSM_BUS_MASTER_TIC 77 -+#define MSM_BUS_MASTER_SDCC_1 78 -+#define MSM_BUS_MASTER_SDCC_3 79 -+#define MSM_BUS_MASTER_SDCC_4 80 -+#define MSM_BUS_MASTER_SDCC_2 81 -+#define MSM_BUS_MASTER_TSIF 82 -+#define MSM_BUS_MASTER_BAM_DMA 83 -+#define MSM_BUS_MASTER_BLSP_2 84 -+#define MSM_BUS_MASTER_USB_HSIC 85 -+#define MSM_BUS_MASTER_BLSP_1 86 -+#define MSM_BUS_MASTER_USB_HS 87 -+#define MSM_BUS_MASTER_PNOC_CFG 88 -+#define MSM_BUS_MASTER_V_OCMEM_GFX3D 89 -+#define MSM_BUS_MASTER_IPA 90 -+#define MSM_BUS_MASTER_QPIC 91 -+#define MSM_BUS_MASTER_MDPE 92 -+#define MSM_BUS_MASTER_USB_HS2 93 -+#define MSM_BUS_MASTER_VPU 94 -+#define MSM_BUS_MASTER_UFS 95 -+#define MSM_BUS_MASTER_BCAST 96 -+#define MSM_BUS_MASTER_CRYPTO_CORE2 97 -+#define MSM_BUS_MASTER_EMAC 98 -+#define MSM_BUS_MASTER_VPU_1 99 -+#define MSM_BUS_MASTER_PCIE_1 100 -+#define MSM_BUS_MASTER_USB3_1 101 -+#define MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG 102 -+#define MSM_BUS_MASTER_CNOC_MNOC_CFG 103 -+#define MSM_BUS_MASTER_TCU_0 104 -+#define MSM_BUS_MASTER_TCU_1 105 -+#define MSM_BUS_MASTER_CPP 106 -+#define MSM_BUS_MASTER_AUDIO 107 -+#define MSM_BUS_MASTER_PCIE_2 108 -+#define MSM_BUS_MASTER_BLSP_BAM 109 -+#define MSM_BUS_MASTER_USB2_BAM 110 -+#define MSM_BUS_MASTER_ADDS_DMA0 111 -+#define MSM_BUS_MASTER_ADDS_DMA1 112 -+#define MSM_BUS_MASTER_ADDS_DMA2 113 -+#define MSM_BUS_MASTER_ADDS_DMA3 114 -+#define MSM_BUS_MASTER_QPIC_BAM 115 -+#define MSM_BUS_MASTER_SDCC_BAM 116 -+#define MSM_BUS_MASTER_DDRC_SNOC 117 -+#define MSM_BUS_MASTER_WSS_0 118 -+#define MSM_BUS_MASTER_WSS_1 119 -+#define MSM_BUS_MASTER_ESS 120 -+#define MSM_BUS_MASTER_QDSS_BAMNDP 121 -+#define MSM_BUS_MASTER_QDSS_SNOC_CFG 122 -+#define MSM_BUS_MASTER_LAST 130 -+ -+#define MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB -+#define MSM_BUS_CPSS_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_CPSS_FPB -+ -+#define MSM_BUS_SNOC_MM_INT_0 10000 -+#define MSM_BUS_SNOC_MM_INT_1 10001 -+#define MSM_BUS_SNOC_MM_INT_2 10002 -+#define MSM_BUS_SNOC_MM_INT_BIMC 10003 -+#define MSM_BUS_SNOC_INT_0 10004 -+#define MSM_BUS_SNOC_INT_1 10005 -+#define MSM_BUS_SNOC_INT_BIMC 10006 -+#define MSM_BUS_SNOC_BIMC_0_MAS 10007 -+#define MSM_BUS_SNOC_BIMC_1_MAS 10008 -+#define MSM_BUS_SNOC_QDSS_INT 10009 -+#define MSM_BUS_PNOC_SNOC_MAS 10010 -+#define MSM_BUS_PNOC_SNOC_SLV 10011 -+#define MSM_BUS_PNOC_INT_0 10012 -+#define MSM_BUS_PNOC_INT_1 10013 -+#define MSM_BUS_PNOC_M_0 10014 -+#define MSM_BUS_PNOC_M_1 10015 -+#define MSM_BUS_BIMC_SNOC_MAS 10016 -+#define MSM_BUS_BIMC_SNOC_SLV 10017 -+#define MSM_BUS_PNOC_SLV_0 10018 -+#define MSM_BUS_PNOC_SLV_1 10019 -+#define MSM_BUS_PNOC_SLV_2 10020 -+#define MSM_BUS_PNOC_SLV_3 10021 -+#define MSM_BUS_PNOC_SLV_4 10022 -+#define MSM_BUS_PNOC_SLV_8 10023 -+#define MSM_BUS_PNOC_SLV_9 10024 -+#define MSM_BUS_SNOC_BIMC_0_SLV 10025 -+#define MSM_BUS_SNOC_BIMC_1_SLV 10026 -+#define MSM_BUS_MNOC_BIMC_MAS 10027 -+#define MSM_BUS_MNOC_BIMC_SLV 10028 -+#define MSM_BUS_BIMC_MNOC_MAS 10029 -+#define MSM_BUS_BIMC_MNOC_SLV 10030 -+#define MSM_BUS_SNOC_BIMC_MAS 10031 -+#define MSM_BUS_SNOC_BIMC_SLV 10032 -+#define MSM_BUS_CNOC_SNOC_MAS 10033 -+#define MSM_BUS_CNOC_SNOC_SLV 10034 -+#define MSM_BUS_SNOC_CNOC_MAS 10035 -+#define MSM_BUS_SNOC_CNOC_SLV 10036 -+#define MSM_BUS_OVNOC_SNOC_MAS 10037 -+#define MSM_BUS_OVNOC_SNOC_SLV 10038 -+#define MSM_BUS_SNOC_OVNOC_MAS 10039 -+#define MSM_BUS_SNOC_OVNOC_SLV 10040 -+#define MSM_BUS_SNOC_PNOC_MAS 10041 -+#define MSM_BUS_SNOC_PNOC_SLV 10042 -+#define MSM_BUS_BIMC_INT_APPS_EBI 10043 -+#define MSM_BUS_BIMC_INT_APPS_SNOC 10044 -+#define MSM_BUS_SNOC_BIMC_2_MAS 10045 -+#define MSM_BUS_SNOC_BIMC_2_SLV 10046 -+#define MSM_BUS_PNOC_SLV_5 10047 -+#define MSM_BUS_PNOC_SLV_6 10048 -+#define MSM_BUS_PNOC_INT_2 10049 -+#define MSM_BUS_PNOC_INT_3 10050 -+#define MSM_BUS_PNOC_INT_4 10051 -+#define MSM_BUS_PNOC_INT_5 10052 -+#define MSM_BUS_PNOC_INT_6 10053 -+#define MSM_BUS_PNOC_INT_7 10054 -+#define MSM_BUS_BIMC_SNOC_1_MAS 10055 -+#define MSM_BUS_BIMC_SNOC_1_SLV 10056 -+#define MSM_BUS_PNOC_A1NOC_MAS 10057 -+#define MSM_BUS_PNOC_A1NOC_SLV 10058 -+#define MSM_BUS_CNOC_A1NOC_MAS 10059 -+#define MSM_BUS_A0NOC_SNOC_MAS 10060 -+#define MSM_BUS_A0NOC_SNOC_SLV 10061 -+#define MSM_BUS_A1NOC_SNOC_SLV 10062 -+#define MSM_BUS_A1NOC_SNOC_MAS 10063 -+#define MSM_BUS_A2NOC_SNOC_MAS 10064 -+#define MSM_BUS_A2NOC_SNOC_SLV 10065 -+#define MSM_BUS_PNOC_SLV_7 10066 -+#define MSM_BUS_INT_LAST 10067 -+ -+#define MSM_BUS_SLAVE_FIRST 512 -+#define MSM_BUS_SLAVE_EBI_CH0 512 -+#define MSM_BUS_SLAVE_EBI_CH1 513 -+#define MSM_BUS_SLAVE_AMPSS_L2 514 -+#define MSM_BUS_APPSS_SLAVE_FAB_MMSS 515 -+#define MSM_BUS_APPSS_SLAVE_FAB_SYSTEM 516 -+#define MSM_BUS_SYSTEM_SLAVE_FAB_APPS 517 -+#define MSM_BUS_SLAVE_SPS 518 -+#define MSM_BUS_SLAVE_SYSTEM_IMEM 519 -+#define MSM_BUS_SLAVE_AMPSS 520 -+#define MSM_BUS_SLAVE_MSS 521 -+#define MSM_BUS_SLAVE_LPASS 522 -+#define MSM_BUS_SYSTEM_SLAVE_CPSS_FPB 523 -+#define MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB 524 -+#define MSM_BUS_SYSTEM_SLAVE_MMSS_FPB 525 -+#define MSM_BUS_SLAVE_CORESIGHT 526 -+#define MSM_BUS_SLAVE_RIVA 527 -+#define MSM_BUS_SLAVE_SMI 528 -+#define MSM_BUS_MMSS_SLAVE_FAB_APPS 529 -+#define MSM_BUS_MMSS_SLAVE_FAB_APPS_1 530 -+#define MSM_BUS_SLAVE_MM_IMEM 531 -+#define MSM_BUS_SLAVE_CRYPTO 532 -+#define MSM_BUS_SLAVE_SPDM 533 -+#define MSM_BUS_SLAVE_RPM 534 -+#define MSM_BUS_SLAVE_RPM_MSG_RAM 535 -+#define MSM_BUS_SLAVE_MPM 536 -+#define MSM_BUS_SLAVE_PMIC1_SSBI1_A 537 -+#define MSM_BUS_SLAVE_PMIC1_SSBI1_B 538 -+#define MSM_BUS_SLAVE_PMIC1_SSBI1_C 539 -+#define MSM_BUS_SLAVE_PMIC2_SSBI2_A 540 -+#define MSM_BUS_SLAVE_PMIC2_SSBI2_B 541 -+#define MSM_BUS_SLAVE_GSBI1_UART 542 -+#define MSM_BUS_SLAVE_GSBI2_UART 543 -+#define MSM_BUS_SLAVE_GSBI3_UART 544 -+#define MSM_BUS_SLAVE_GSBI4_UART 545 -+#define MSM_BUS_SLAVE_GSBI5_UART 546 -+#define MSM_BUS_SLAVE_GSBI6_UART 547 -+#define MSM_BUS_SLAVE_GSBI7_UART 548 -+#define MSM_BUS_SLAVE_GSBI8_UART 549 -+#define MSM_BUS_SLAVE_GSBI9_UART 550 -+#define MSM_BUS_SLAVE_GSBI10_UART 551 -+#define MSM_BUS_SLAVE_GSBI11_UART 552 -+#define MSM_BUS_SLAVE_GSBI12_UART 553 -+#define MSM_BUS_SLAVE_GSBI1_QUP 554 -+#define MSM_BUS_SLAVE_GSBI2_QUP 555 -+#define MSM_BUS_SLAVE_GSBI3_QUP 556 -+#define MSM_BUS_SLAVE_GSBI4_QUP 557 -+#define MSM_BUS_SLAVE_GSBI5_QUP 558 -+#define MSM_BUS_SLAVE_GSBI6_QUP 559 -+#define MSM_BUS_SLAVE_GSBI7_QUP 560 -+#define MSM_BUS_SLAVE_GSBI8_QUP 561 -+#define MSM_BUS_SLAVE_GSBI9_QUP 562 -+#define MSM_BUS_SLAVE_GSBI10_QUP 563 -+#define MSM_BUS_SLAVE_GSBI11_QUP 564 -+#define MSM_BUS_SLAVE_GSBI12_QUP 565 -+#define MSM_BUS_SLAVE_EBI2_NAND 566 -+#define MSM_BUS_SLAVE_EBI2_CS0 567 -+#define MSM_BUS_SLAVE_EBI2_CS1 568 -+#define MSM_BUS_SLAVE_EBI2_CS2 569 -+#define MSM_BUS_SLAVE_EBI2_CS3 570 -+#define MSM_BUS_SLAVE_EBI2_CS4 571 -+#define MSM_BUS_SLAVE_EBI2_CS5 572 -+#define MSM_BUS_SLAVE_USB_FS1 573 -+#define MSM_BUS_SLAVE_USB_FS2 574 -+#define MSM_BUS_SLAVE_TSIF 575 -+#define MSM_BUS_SLAVE_MSM_TSSC 576 -+#define MSM_BUS_SLAVE_MSM_PDM 577 -+#define MSM_BUS_SLAVE_MSM_DIMEM 578 -+#define MSM_BUS_SLAVE_MSM_TCSR 579 -+#define MSM_BUS_SLAVE_MSM_PRNG 580 -+#define MSM_BUS_SLAVE_GSS 581 -+#define MSM_BUS_SLAVE_SATA 582 -+#define MSM_BUS_SLAVE_USB3 583 -+#define MSM_BUS_SLAVE_WCSS 584 -+#define MSM_BUS_SLAVE_OCIMEM 585 -+#define MSM_BUS_SLAVE_SNOC_OCMEM 586 -+#define MSM_BUS_SLAVE_SERVICE_SNOC 587 -+#define MSM_BUS_SLAVE_QDSS_STM 588 -+#define MSM_BUS_SLAVE_CAMERA_CFG 589 -+#define MSM_BUS_SLAVE_DISPLAY_CFG 590 -+#define MSM_BUS_SLAVE_OCMEM_CFG 591 -+#define MSM_BUS_SLAVE_CPR_CFG 592 -+#define MSM_BUS_SLAVE_CPR_XPU_CFG 593 -+#define MSM_BUS_SLAVE_MISC_CFG 594 -+#define MSM_BUS_SLAVE_MISC_XPU_CFG 595 -+#define MSM_BUS_SLAVE_VENUS_CFG 596 -+#define MSM_BUS_SLAVE_MISC_VENUS_CFG 597 -+#define MSM_BUS_SLAVE_GRAPHICS_3D_CFG 598 -+#define MSM_BUS_SLAVE_MMSS_CLK_CFG 599 -+#define MSM_BUS_SLAVE_MMSS_CLK_XPU_CFG 600 -+#define MSM_BUS_SLAVE_MNOC_MPU_CFG 601 -+#define MSM_BUS_SLAVE_ONOC_MPU_CFG 602 -+#define MSM_BUS_SLAVE_SERVICE_MNOC 603 -+#define MSM_BUS_SLAVE_OCMEM 604 -+#define MSM_BUS_SLAVE_SERVICE_ONOC 605 -+#define MSM_BUS_SLAVE_SDCC_1 606 -+#define MSM_BUS_SLAVE_SDCC_3 607 -+#define MSM_BUS_SLAVE_SDCC_2 608 -+#define MSM_BUS_SLAVE_SDCC_4 609 -+#define MSM_BUS_SLAVE_BAM_DMA 610 -+#define MSM_BUS_SLAVE_BLSP_2 611 -+#define MSM_BUS_SLAVE_USB_HSIC 612 -+#define MSM_BUS_SLAVE_BLSP_1 613 -+#define MSM_BUS_SLAVE_USB_HS 614 -+#define MSM_BUS_SLAVE_PDM 615 -+#define MSM_BUS_SLAVE_PERIPH_APU_CFG 616 -+#define MSM_BUS_SLAVE_PNOC_MPU_CFG 617 -+#define MSM_BUS_SLAVE_PRNG 618 -+#define MSM_BUS_SLAVE_SERVICE_PNOC 619 -+#define MSM_BUS_SLAVE_CLK_CTL 620 -+#define MSM_BUS_SLAVE_CNOC_MSS 621 -+#define MSM_BUS_SLAVE_SECURITY 622 -+#define MSM_BUS_SLAVE_TCSR 623 -+#define MSM_BUS_SLAVE_TLMM 624 -+#define MSM_BUS_SLAVE_CRYPTO_0_CFG 625 -+#define MSM_BUS_SLAVE_CRYPTO_1_CFG 626 -+#define MSM_BUS_SLAVE_IMEM_CFG 627 -+#define MSM_BUS_SLAVE_MESSAGE_RAM 628 -+#define MSM_BUS_SLAVE_BIMC_CFG 629 -+#define MSM_BUS_SLAVE_BOOT_ROM 630 -+#define MSM_BUS_SLAVE_CNOC_MNOC_MMSS_CFG 631 -+#define MSM_BUS_SLAVE_PMIC_ARB 632 -+#define MSM_BUS_SLAVE_SPDM_WRAPPER 633 -+#define MSM_BUS_SLAVE_DEHR_CFG 634 -+#define MSM_BUS_SLAVE_QDSS_CFG 635 -+#define MSM_BUS_SLAVE_RBCPR_CFG 636 -+#define MSM_BUS_SLAVE_RBCPR_QDSS_APU_CFG 637 -+#define MSM_BUS_SLAVE_SNOC_MPU_CFG 638 -+#define MSM_BUS_SLAVE_CNOC_ONOC_CFG 639 -+#define MSM_BUS_SLAVE_CNOC_MNOC_CFG 640 -+#define MSM_BUS_SLAVE_PNOC_CFG 641 -+#define MSM_BUS_SLAVE_SNOC_CFG 642 -+#define MSM_BUS_SLAVE_EBI1_DLL_CFG 643 -+#define MSM_BUS_SLAVE_PHY_APU_CFG 644 -+#define MSM_BUS_SLAVE_EBI1_PHY_CFG 645 -+#define MSM_BUS_SLAVE_SERVICE_CNOC 646 -+#define MSM_BUS_SLAVE_IPS_CFG 647 -+#define MSM_BUS_SLAVE_QPIC 648 -+#define MSM_BUS_SLAVE_DSI_CFG 649 -+#define MSM_BUS_SLAVE_UFS_CFG 650 -+#define MSM_BUS_SLAVE_RBCPR_CX_CFG 651 -+#define MSM_BUS_SLAVE_RBCPR_MX_CFG 652 -+#define MSM_BUS_SLAVE_PCIE_CFG 653 -+#define MSM_BUS_SLAVE_USB_PHYS_CFG 654 -+#define MSM_BUS_SLAVE_VIDEO_CAP_CFG 655 -+#define MSM_BUS_SLAVE_AVSYNC_CFG 656 -+#define MSM_BUS_SLAVE_CRYPTO_2_CFG 657 -+#define MSM_BUS_SLAVE_VPU_CFG 658 -+#define MSM_BUS_SLAVE_BCAST_CFG 659 -+#define MSM_BUS_SLAVE_KLM_CFG 660 -+#define MSM_BUS_SLAVE_GENI_IR_CFG 661 -+#define MSM_BUS_SLAVE_OCMEM_GFX 662 -+#define MSM_BUS_SLAVE_CATS_128 663 -+#define MSM_BUS_SLAVE_OCMEM_64 664 -+#define MSM_BUS_SLAVE_PCIE_0 665 -+#define MSM_BUS_SLAVE_PCIE_1 666 -+#define MSM_BUS_SLAVE_PCIE_0_CFG 667 -+#define MSM_BUS_SLAVE_PCIE_1_CFG 668 -+#define MSM_BUS_SLAVE_SRVC_MNOC 669 -+#define MSM_BUS_SLAVE_USB_HS2 670 -+#define MSM_BUS_SLAVE_AUDIO 671 -+#define MSM_BUS_SLAVE_TCU 672 -+#define MSM_BUS_SLAVE_APPSS 673 -+#define MSM_BUS_SLAVE_PCIE_PARF 674 -+#define MSM_BUS_SLAVE_USB3_PHY_CFG 675 -+#define MSM_BUS_SLAVE_IPA_CFG 676 -+#define MSM_BUS_SLAVE_A0NOC_SNOC 677 -+#define MSM_BUS_SLAVE_A1NOC_SNOC 678 -+#define MSM_BUS_SLAVE_A2NOC_SNOC 679 -+#define MSM_BUS_SLAVE_HMSS_L3 680 -+#define MSM_BUS_SLAVE_PIMEM_CFG 681 -+#define MSM_BUS_SLAVE_DCC_CFG 682 -+#define MSM_BUS_SLAVE_QDSS_RBCPR_APU_CFG 683 -+#define MSM_BUS_SLAVE_PCIE_2_CFG 684 -+#define MSM_BUS_SLAVE_PCIE20_AHB2PHY 685 -+#define MSM_BUS_SLAVE_A0NOC_CFG 686 -+#define MSM_BUS_SLAVE_A1NOC_CFG 687 -+#define MSM_BUS_SLAVE_A2NOC_CFG 688 -+#define MSM_BUS_SLAVE_A1NOC_MPU_CFG 689 -+#define MSM_BUS_SLAVE_A2NOC_MPU_CFG 690 -+#define MSM_BUS_SLAVE_A0NOC_SMMU_CFG 691 -+#define MSM_BUS_SLAVE_A1NOC_SMMU_CFG 692 -+#define MSM_BUS_SLAVE_A2NOC_SMMU_CFG 693 -+#define MSM_BUS_SLAVE_LPASS_SMMU_CFG 694 -+#define MSM_BUS_SLAVE_MMAGIC_CFG 695 -+#define MSM_BUS_SLAVE_VENUS_THROTTLE_CFG 696 -+#define MSM_BUS_SLAVE_SSC_CFG 697 -+#define MSM_BUS_SLAVE_DSA_CFG 698 -+#define MSM_BUS_SLAVE_DSA_MPU_CFG 699 -+#define MSM_BUS_SLAVE_DISPLAY_THROTTLE_CFG 700 -+#define MSM_BUS_SLAVE_SMMU_CPP_CFG 701 -+#define MSM_BUS_SLAVE_SMMU_JPEG_CFG 702 -+#define MSM_BUS_SLAVE_SMMU_MDP_CFG 703 -+#define MSM_BUS_SLAVE_SMMU_ROTATOR_CFG 704 -+#define MSM_BUS_SLAVE_SMMU_VENUS_CFG 705 -+#define MSM_BUS_SLAVE_SMMU_VFE_CFG 706 -+#define MSM_BUS_SLAVE_A0NOC_MPU_CFG 707 -+#define MSM_BUS_SLAVE_VMEM_CFG 708 -+#define MSM_BUS_SLAVE_CAMERA_THROTTLE_CFG 700 -+#define MSM_BUS_SLAVE_VMEM 709 -+#define MSM_BUS_SLAVE_AHB2PHY 710 -+#define MSM_BUS_SLAVE_PIMEM 711 -+#define MSM_BUS_SLAVE_SNOC_VMEM 712 -+#define MSM_BUS_SLAVE_PCIE_2 713 -+#define MSM_BUS_SLAVE_RBCPR_MX 714 -+#define MSM_BUS_SLAVE_RBCPR_CX 715 -+#define MSM_BUS_SLAVE_PRNG_APU_CFG 716 -+#define MSM_BUS_SLAVE_PERIPH_MPU_CFG 717 -+#define MSM_BUS_SLAVE_GCNT 718 -+#define MSM_BUS_SLAVE_ADSS_CFG 719 -+#define MSM_BUS_SLAVE_ADSS_VMIDMT_CFG 720 -+#define MSM_BUS_SLAVE_QHSS_APU_CFG 721 -+#define MSM_BUS_SLAVE_MDIO 722 -+#define MSM_BUS_SLAVE_FEPHY_CFG 723 -+#define MSM_BUS_SLAVE_SRIF 724 -+#define MSM_BUS_SLAVE_LAST 730 -+#define MSM_BUS_SLAVE_DDRC_CFG 731 -+#define MSM_BUS_SLAVE_DDRC_APU_CFG 732 -+#define MSM_BUS_SLAVE_MPU0_CFG 733 -+#define MSM_BUS_SLAVE_MPU1_CFG 734 -+#define MSM_BUS_SLAVE_MPU2_CFG 734 -+#define MSM_BUS_SLAVE_ESS_VMIDMT_CFG 735 -+#define MSM_BUS_SLAVE_ESS_APU_CFG 736 -+#define MSM_BUS_SLAVE_USB2_CFG 737 -+#define MSM_BUS_SLAVE_BLSP_CFG 738 -+#define MSM_BUS_SLAVE_QPIC_CFG 739 -+#define MSM_BUS_SLAVE_SDCC_CFG 740 -+#define MSM_BUS_SLAVE_WSS0_VMIDMT_CFG 741 -+#define MSM_BUS_SLAVE_WSS0_APU_CFG 742 -+#define MSM_BUS_SLAVE_WSS1_VMIDMT_CFG 743 -+#define MSM_BUS_SLAVE_WSS1_APU_CFG 744 -+#define MSM_BUS_SLAVE_SRVC_PCNOC 745 -+#define MSM_BUS_SLAVE_SNOC_DDRC 746 -+#define MSM_BUS_SLAVE_A7SS 747 -+#define MSM_BUS_SLAVE_WSS0_CFG 748 -+#define MSM_BUS_SLAVE_WSS1_CFG 749 -+#define MSM_BUS_SLAVE_PCIE 750 -+#define MSM_BUS_SLAVE_USB3_CFG 751 -+#define MSM_BUS_SLAVE_CRYPTO_CFG 752 -+#define MSM_BUS_SLAVE_ESS_CFG 753 -+#define MSM_BUS_SLAVE_SRVC_SNOC 754 -+ -+#define MSM_BUS_SYSTEM_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB -+#define MSM_BUS_CPSS_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_CPSS_FPB -+ -+/* -+ * ID's used in RPM messages -+ */ -+#define ICBID_MASTER_APPSS_PROC 0 -+#define ICBID_MASTER_MSS_PROC 1 -+#define ICBID_MASTER_MNOC_BIMC 2 -+#define ICBID_MASTER_SNOC_BIMC 3 -+#define ICBID_MASTER_SNOC_BIMC_0 ICBID_MASTER_SNOC_BIMC -+#define ICBID_MASTER_CNOC_MNOC_MMSS_CFG 4 -+#define ICBID_MASTER_CNOC_MNOC_CFG 5 -+#define ICBID_MASTER_GFX3D 6 -+#define ICBID_MASTER_JPEG 7 -+#define ICBID_MASTER_MDP 8 -+#define ICBID_MASTER_MDP0 ICBID_MASTER_MDP -+#define ICBID_MASTER_MDPS ICBID_MASTER_MDP -+#define ICBID_MASTER_VIDEO 9 -+#define ICBID_MASTER_VIDEO_P0 ICBID_MASTER_VIDEO -+#define ICBID_MASTER_VIDEO_P1 10 -+#define ICBID_MASTER_VFE 11 -+#define ICBID_MASTER_CNOC_ONOC_CFG 12 -+#define ICBID_MASTER_JPEG_OCMEM 13 -+#define ICBID_MASTER_MDP_OCMEM 14 -+#define ICBID_MASTER_VIDEO_P0_OCMEM 15 -+#define ICBID_MASTER_VIDEO_P1_OCMEM 16 -+#define ICBID_MASTER_VFE_OCMEM 17 -+#define ICBID_MASTER_LPASS_AHB 18 -+#define ICBID_MASTER_QDSS_BAM 19 -+#define ICBID_MASTER_SNOC_CFG 20 -+#define ICBID_MASTER_BIMC_SNOC 21 -+#define ICBID_MASTER_CNOC_SNOC 22 -+#define ICBID_MASTER_CRYPTO 23 -+#define ICBID_MASTER_CRYPTO_CORE0 ICBID_MASTER_CRYPTO -+#define ICBID_MASTER_CRYPTO_CORE1 24 -+#define ICBID_MASTER_LPASS_PROC 25 -+#define ICBID_MASTER_MSS 26 -+#define ICBID_MASTER_MSS_NAV 27 -+#define ICBID_MASTER_OCMEM_DMA 28 -+#define ICBID_MASTER_PNOC_SNOC 29 -+#define ICBID_MASTER_WCSS 30 -+#define ICBID_MASTER_QDSS_ETR 31 -+#define ICBID_MASTER_USB3 32 -+#define ICBID_MASTER_USB3_0 ICBID_MASTER_USB3 -+#define ICBID_MASTER_SDCC_1 33 -+#define ICBID_MASTER_SDCC_3 34 -+#define ICBID_MASTER_SDCC_2 35 -+#define ICBID_MASTER_SDCC_4 36 -+#define ICBID_MASTER_TSIF 37 -+#define ICBID_MASTER_BAM_DMA 38 -+#define ICBID_MASTER_BLSP_2 39 -+#define ICBID_MASTER_USB_HSIC 40 -+#define ICBID_MASTER_BLSP_1 41 -+#define ICBID_MASTER_USB_HS 42 -+#define ICBID_MASTER_USB_HS1 ICBID_MASTER_USB_HS -+#define ICBID_MASTER_PNOC_CFG 43 -+#define ICBID_MASTER_SNOC_PNOC 44 -+#define ICBID_MASTER_RPM_INST 45 -+#define ICBID_MASTER_RPM_DATA 46 -+#define ICBID_MASTER_RPM_SYS 47 -+#define ICBID_MASTER_DEHR 48 -+#define ICBID_MASTER_QDSS_DAP 49 -+#define ICBID_MASTER_SPDM 50 -+#define ICBID_MASTER_TIC 51 -+#define ICBID_MASTER_SNOC_CNOC 52 -+#define ICBID_MASTER_GFX3D_OCMEM 53 -+#define ICBID_MASTER_GFX3D_GMEM ICBID_MASTER_GFX3D_OCMEM -+#define ICBID_MASTER_OVIRT_SNOC 54 -+#define ICBID_MASTER_SNOC_OVIRT 55 -+#define ICBID_MASTER_SNOC_GVIRT ICBID_MASTER_SNOC_OVIRT -+#define ICBID_MASTER_ONOC_OVIRT 56 -+#define ICBID_MASTER_USB_HS2 57 -+#define ICBID_MASTER_QPIC 58 -+#define ICBID_MASTER_IPA 59 -+#define ICBID_MASTER_DSI 60 -+#define ICBID_MASTER_MDP1 61 -+#define ICBID_MASTER_MDPE ICBID_MASTER_MDP1 -+#define ICBID_MASTER_VPU_PROC 62 -+#define ICBID_MASTER_VPU 63 -+#define ICBID_MASTER_VPU0 ICBID_MASTER_VPU -+#define ICBID_MASTER_CRYPTO_CORE2 64 -+#define ICBID_MASTER_PCIE_0 65 -+#define ICBID_MASTER_PCIE_1 66 -+#define ICBID_MASTER_SATA 67 -+#define ICBID_MASTER_UFS 68 -+#define ICBID_MASTER_USB3_1 69 -+#define ICBID_MASTER_VIDEO_OCMEM 70 -+#define ICBID_MASTER_VPU1 71 -+#define ICBID_MASTER_VCAP 72 -+#define ICBID_MASTER_EMAC 73 -+#define ICBID_MASTER_BCAST 74 -+#define ICBID_MASTER_MMSS_PROC 75 -+#define ICBID_MASTER_SNOC_BIMC_1 76 -+#define ICBID_MASTER_SNOC_PCNOC 77 -+#define ICBID_MASTER_AUDIO 78 -+#define ICBID_MASTER_MM_INT_0 79 -+#define ICBID_MASTER_MM_INT_1 80 -+#define ICBID_MASTER_MM_INT_2 81 -+#define ICBID_MASTER_MM_INT_BIMC 82 -+#define ICBID_MASTER_MSS_INT 83 -+#define ICBID_MASTER_PCNOC_CFG 84 -+#define ICBID_MASTER_PCNOC_INT_0 85 -+#define ICBID_MASTER_PCNOC_INT_1 86 -+#define ICBID_MASTER_PCNOC_M_0 87 -+#define ICBID_MASTER_PCNOC_M_1 88 -+#define ICBID_MASTER_PCNOC_S_0 89 -+#define ICBID_MASTER_PCNOC_S_1 90 -+#define ICBID_MASTER_PCNOC_S_2 91 -+#define ICBID_MASTER_PCNOC_S_3 92 -+#define ICBID_MASTER_PCNOC_S_4 93 -+#define ICBID_MASTER_PCNOC_S_6 94 -+#define ICBID_MASTER_PCNOC_S_7 95 -+#define ICBID_MASTER_PCNOC_S_8 96 -+#define ICBID_MASTER_PCNOC_S_9 97 -+#define ICBID_MASTER_QDSS_INT 98 -+#define ICBID_MASTER_SNOC_INT_0 99 -+#define ICBID_MASTER_SNOC_INT_1 100 -+#define ICBID_MASTER_SNOC_INT_BIMC 101 -+#define ICBID_MASTER_TCU_0 102 -+#define ICBID_MASTER_TCU_1 103 -+#define ICBID_MASTER_BIMC_INT_0 104 -+#define ICBID_MASTER_BIMC_INT_1 105 -+#define ICBID_MASTER_CAMERA 106 -+#define ICBID_MASTER_RICA 107 -+#define ICBID_MASTER_PCNOC_S_5 129 -+#define ICBID_MASTER_PCNOC_INT_2 124 -+#define ICBID_MASTER_PCNOC_INT_3 125 -+#define ICBID_MASTER_PCNOC_INT_4 126 -+#define ICBID_MASTER_PCNOC_INT_5 127 -+#define ICBID_MASTER_PCNOC_INT_6 128 -+#define ICBID_MASTER_PCIE_2 119 -+#define ICBID_MASTER_MASTER_CNOC_A1NOC 116 -+#define ICBID_MASTER_A0NOC_SNOC 110 -+#define ICBID_MASTER_A1NOC_SNOC 111 -+#define ICBID_MASTER_A2NOC_SNOC 112 -+#define ICBID_MASTER_PNOC_A1NOC 117 -+#define ICBID_MASTER_ROTATOR 120 -+#define ICBID_MASTER_SNOC_VMEM 114 -+#define ICBID_MASTER_VENUS_VMEM 121 -+#define ICBID_MASTER_HMSS 118 -+#define ICBID_MASTER_BIMC_SNOC_1 109 -+#define ICBID_MASTER_CNOC_A1NOC 116 -+#define ICBID_MASTER_CPP 115 -+#define ICBID_MASTER_BLSP_BAM 130 -+#define ICBID_MASTER_USB2_BAM 131 -+#define ICBID_MASTER_ADSS_DMA0 132 -+#define ICBID_MASTER_ADSS_DMA1 133 -+#define ICBID_MASTER_ADSS_DMA2 134 -+#define ICBID_MASTER_ADSS_DMA3 135 -+#define ICBID_MASTER_QPIC_BAM 136 -+#define ICBID_MASTER_SDCC_BAM 137 -+#define ICBID_MASTER_DDRC_SNOC 138 -+#define ICBID_MASTER_WSS_0 139 -+#define ICBID_MASTER_WSS_1 140 -+#define ICBID_MASTER_ESS 141 -+#define ICBID_MASTER_PCIE 142 -+#define ICBID_MASTER_QDSS_BAMNDP 143 -+#define ICBID_MASTER_QDSS_SNOC_CFG 144 -+ -+#define ICBID_SLAVE_EBI1 0 -+#define ICBID_SLAVE_APPSS_L2 1 -+#define ICBID_SLAVE_BIMC_SNOC 2 -+#define ICBID_SLAVE_CAMERA_CFG 3 -+#define ICBID_SLAVE_DISPLAY_CFG 4 -+#define ICBID_SLAVE_OCMEM_CFG 5 -+#define ICBID_SLAVE_CPR_CFG 6 -+#define ICBID_SLAVE_CPR_XPU_CFG 7 -+#define ICBID_SLAVE_MISC_CFG 8 -+#define ICBID_SLAVE_MISC_XPU_CFG 9 -+#define ICBID_SLAVE_VENUS_CFG 10 -+#define ICBID_SLAVE_GFX3D_CFG 11 -+#define ICBID_SLAVE_MMSS_CLK_CFG 12 -+#define ICBID_SLAVE_MMSS_CLK_XPU_CFG 13 -+#define ICBID_SLAVE_MNOC_MPU_CFG 14 -+#define ICBID_SLAVE_ONOC_MPU_CFG 15 -+#define ICBID_SLAVE_MNOC_BIMC 16 -+#define ICBID_SLAVE_SERVICE_MNOC 17 -+#define ICBID_SLAVE_OCMEM 18 -+#define ICBID_SLAVE_GMEM ICBID_SLAVE_OCMEM -+#define ICBID_SLAVE_SERVICE_ONOC 19 -+#define ICBID_SLAVE_APPSS 20 -+#define ICBID_SLAVE_LPASS 21 -+#define ICBID_SLAVE_USB3 22 -+#define ICBID_SLAVE_USB3_0 ICBID_SLAVE_USB3 -+#define ICBID_SLAVE_WCSS 23 -+#define ICBID_SLAVE_SNOC_BIMC 24 -+#define ICBID_SLAVE_SNOC_BIMC_0 ICBID_SLAVE_SNOC_BIMC -+#define ICBID_SLAVE_SNOC_CNOC 25 -+#define ICBID_SLAVE_IMEM 26 -+#define ICBID_SLAVE_OCIMEM ICBID_SLAVE_IMEM -+#define ICBID_SLAVE_SNOC_OVIRT 27 -+#define ICBID_SLAVE_SNOC_GVIRT ICBID_SLAVE_SNOC_OVIRT -+#define ICBID_SLAVE_SNOC_PNOC 28 -+#define ICBID_SLAVE_SNOC_PCNOC ICBID_SLAVE_SNOC_PNOC -+#define ICBID_SLAVE_SERVICE_SNOC 29 -+#define ICBID_SLAVE_QDSS_STM 30 -+#define ICBID_SLAVE_SDCC_1 31 -+#define ICBID_SLAVE_SDCC_3 32 -+#define ICBID_SLAVE_SDCC_2 33 -+#define ICBID_SLAVE_SDCC_4 34 -+#define ICBID_SLAVE_TSIF 35 -+#define ICBID_SLAVE_BAM_DMA 36 -+#define ICBID_SLAVE_BLSP_2 37 -+#define ICBID_SLAVE_USB_HSIC 38 -+#define ICBID_SLAVE_BLSP_1 39 -+#define ICBID_SLAVE_USB_HS 40 -+#define ICBID_SLAVE_USB_HS1 ICBID_SLAVE_USB_HS -+#define ICBID_SLAVE_PDM 41 -+#define ICBID_SLAVE_PERIPH_APU_CFG 42 -+#define ICBID_SLAVE_PNOC_MPU_CFG 43 -+#define ICBID_SLAVE_PRNG 44 -+#define ICBID_SLAVE_PNOC_SNOC 45 -+#define ICBID_SLAVE_PCNOC_SNOC ICBID_SLAVE_PNOC_SNOC -+#define ICBID_SLAVE_SERVICE_PNOC 46 -+#define ICBID_SLAVE_CLK_CTL 47 -+#define ICBID_SLAVE_CNOC_MSS 48 -+#define ICBID_SLAVE_PCNOC_MSS ICBID_SLAVE_CNOC_MSS -+#define ICBID_SLAVE_SECURITY 49 -+#define ICBID_SLAVE_TCSR 50 -+#define ICBID_SLAVE_TLMM 51 -+#define ICBID_SLAVE_CRYPTO_0_CFG 52 -+#define ICBID_SLAVE_CRYPTO_1_CFG 53 -+#define ICBID_SLAVE_IMEM_CFG 54 -+#define ICBID_SLAVE_MESSAGE_RAM 55 -+#define ICBID_SLAVE_BIMC_CFG 56 -+#define ICBID_SLAVE_BOOT_ROM 57 -+#define ICBID_SLAVE_CNOC_MNOC_MMSS_CFG 58 -+#define ICBID_SLAVE_PMIC_ARB 59 -+#define ICBID_SLAVE_SPDM_WRAPPER 60 -+#define ICBID_SLAVE_DEHR_CFG 61 -+#define ICBID_SLAVE_MPM 62 -+#define ICBID_SLAVE_QDSS_CFG 63 -+#define ICBID_SLAVE_RBCPR_CFG 64 -+#define ICBID_SLAVE_RBCPR_CX_CFG ICBID_SLAVE_RBCPR_CFG -+#define ICBID_SLAVE_RBCPR_QDSS_APU_CFG 65 -+#define ICBID_SLAVE_CNOC_MNOC_CFG 66 -+#define ICBID_SLAVE_SNOC_MPU_CFG 67 -+#define ICBID_SLAVE_CNOC_ONOC_CFG 68 -+#define ICBID_SLAVE_PNOC_CFG 69 -+#define ICBID_SLAVE_SNOC_CFG 70 -+#define ICBID_SLAVE_EBI1_DLL_CFG 71 -+#define ICBID_SLAVE_PHY_APU_CFG 72 -+#define ICBID_SLAVE_EBI1_PHY_CFG 73 -+#define ICBID_SLAVE_RPM 74 -+#define ICBID_SLAVE_CNOC_SNOC 75 -+#define ICBID_SLAVE_SERVICE_CNOC 76 -+#define ICBID_SLAVE_OVIRT_SNOC 77 -+#define ICBID_SLAVE_OVIRT_OCMEM 78 -+#define ICBID_SLAVE_USB_HS2 79 -+#define ICBID_SLAVE_QPIC 80 -+#define ICBID_SLAVE_IPS_CFG 81 -+#define ICBID_SLAVE_DSI_CFG 82 -+#define ICBID_SLAVE_USB3_1 83 -+#define ICBID_SLAVE_PCIE_0 84 -+#define ICBID_SLAVE_PCIE_1 85 -+#define ICBID_SLAVE_PSS_SMMU_CFG 86 -+#define ICBID_SLAVE_CRYPTO_2_CFG 87 -+#define ICBID_SLAVE_PCIE_0_CFG 88 -+#define ICBID_SLAVE_PCIE_1_CFG 89 -+#define ICBID_SLAVE_SATA_CFG 90 -+#define ICBID_SLAVE_SPSS_GENI_IR 91 -+#define ICBID_SLAVE_UFS_CFG 92 -+#define ICBID_SLAVE_AVSYNC_CFG 93 -+#define ICBID_SLAVE_VPU_CFG 94 -+#define ICBID_SLAVE_USB_PHY_CFG 95 -+#define ICBID_SLAVE_RBCPR_MX_CFG 96 -+#define ICBID_SLAVE_PCIE_PARF 97 -+#define ICBID_SLAVE_VCAP_CFG 98 -+#define ICBID_SLAVE_EMAC_CFG 99 -+#define ICBID_SLAVE_BCAST_CFG 100 -+#define ICBID_SLAVE_KLM_CFG 101 -+#define ICBID_SLAVE_DISPLAY_PWM 102 -+#define ICBID_SLAVE_GENI 103 -+#define ICBID_SLAVE_SNOC_BIMC_1 104 -+#define ICBID_SLAVE_AUDIO 105 -+#define ICBID_SLAVE_CATS_0 106 -+#define ICBID_SLAVE_CATS_1 107 -+#define ICBID_SLAVE_MM_INT_0 108 -+#define ICBID_SLAVE_MM_INT_1 109 -+#define ICBID_SLAVE_MM_INT_2 110 -+#define ICBID_SLAVE_MM_INT_BIMC 111 -+#define ICBID_SLAVE_MMU_MODEM_XPU_CFG 112 -+#define ICBID_SLAVE_MSS_INT 113 -+#define ICBID_SLAVE_PCNOC_INT_0 114 -+#define ICBID_SLAVE_PCNOC_INT_1 115 -+#define ICBID_SLAVE_PCNOC_M_0 116 -+#define ICBID_SLAVE_PCNOC_M_1 117 -+#define ICBID_SLAVE_PCNOC_S_0 118 -+#define ICBID_SLAVE_PCNOC_S_1 119 -+#define ICBID_SLAVE_PCNOC_S_2 120 -+#define ICBID_SLAVE_PCNOC_S_3 121 -+#define ICBID_SLAVE_PCNOC_S_4 122 -+#define ICBID_SLAVE_PCNOC_S_6 123 -+#define ICBID_SLAVE_PCNOC_S_7 124 -+#define ICBID_SLAVE_PCNOC_S_8 125 -+#define ICBID_SLAVE_PCNOC_S_9 126 -+#define ICBID_SLAVE_PRNG_XPU_CFG 127 -+#define ICBID_SLAVE_QDSS_INT 128 -+#define ICBID_SLAVE_RPM_XPU_CFG 129 -+#define ICBID_SLAVE_SNOC_INT_0 130 -+#define ICBID_SLAVE_SNOC_INT_1 131 -+#define ICBID_SLAVE_SNOC_INT_BIMC 132 -+#define ICBID_SLAVE_TCU 133 -+#define ICBID_SLAVE_BIMC_INT_0 134 -+#define ICBID_SLAVE_BIMC_INT_1 135 -+#define ICBID_SLAVE_RICA_CFG 136 -+#define ICBID_SLAVE_PCNOC_S_5 189 -+#define ICBID_SLAVE_PCNOC_S_7 124 -+#define ICBID_SLAVE_PCNOC_INT_2 184 -+#define ICBID_SLAVE_PCNOC_INT_3 185 -+#define ICBID_SLAVE_PCNOC_INT_4 186 -+#define ICBID_SLAVE_PCNOC_INT_5 187 -+#define ICBID_SLAVE_PCNOC_INT_6 188 -+#define ICBID_SLAVE_USB3_PHY_CFG 182 -+#define ICBID_SLAVE_IPA_CFG 183 -+ -+#define ICBID_SLAVE_A0NOC_SNOC 141 -+#define ICBID_SLAVE_A1NOC_SNOC 142 -+#define ICBID_SLAVE_A2NOC_SNOC 143 -+#define ICBID_SLAVE_BIMC_SNOC_1 138 -+#define ICBID_SLAVE_PIMEM 167 -+#define ICBID_SLAVE_PIMEM_CFG 168 -+#define ICBID_SLAVE_DCC_CFG 155 -+#define ICBID_SLAVE_QDSS_RBCPR_APU_CFG 168 -+#define ICBID_SLAVE_A0NOC_CFG 144 -+#define ICBID_SLAVE_PCIE_2_CFG 165 -+#define ICBID_SLAVE_PCIE20_AHB2PHY 163 -+#define ICBID_SLAVE_PCIE_2 164 -+#define ICBID_SLAVE_A1NOC_CFG 147 -+#define ICBID_SLAVE_A1NOC_MPU_CFG 148 -+#define ICBID_SLAVE_A1NOC_SMMU_CFG 149 -+#define ICBID_SLAVE_A2NOC_CFG 150 -+#define ICBID_SLAVE_A2NOC_MPU_CFG 151 -+#define ICBID_SLAVE_A2NOC_SMMU_CFG 152 -+#define ICBID_SLAVE_AHB2PHY 153 -+#define ICBID_SLAVE_HMSS_L3 161 -+#define ICBID_SLAVE_LPASS_SMMU_CFG 161 -+#define ICBID_SLAVE_MMAGIC_CFG 162 -+#define ICBID_SLAVE_SSC_CFG 177 -+#define ICBID_SLAVE_VENUS_THROTTLE_CFG 178 -+#define ICBID_SLAVE_DISPLAY_THROTTLE_CFG 156 -+#define ICBID_SLAVE_CAMERA_THROTTLE_CFG 154 -+#define ICBID_SLAVE_DSA_CFG 157 -+#define ICBID_SLAVE_DSA_MPU_CFG 158 -+#define ICBID_SLAVE_SMMU_CPP_CFG 171 -+#define ICBID_SLAVE_SMMU_JPEG_CFG 172 -+#define ICBID_SLAVE_SMMU_MDP_CFG 173 -+#define ICBID_SLAVE_SMMU_ROTATOR_CFG 174 -+#define ICBID_SLAVE_SMMU_VENUS_CFG 175 -+#define ICBID_SLAVE_SMMU_VFE_CFG 176 -+#define ICBID_SLAVE_A0NOC_MPU_CFG 145 -+#define ICBID_SLAVE_A0NOC_SMMU_CFG 146 -+#define ICBID_SLAVE_VMEM_CFG 180 -+#define ICBID_SLAVE_VMEM 179 -+#define ICBID_SLAVE_PNOC_A1NOC 139 -+#define ICBID_SLAVE_SNOC_VMEM 140 -+#define ICBID_SLAVE_RBCPR_MX 170 -+#define ICBID_SLAVE_RBCPR_CX 169 -+#define ICBID_SLAVE_PRNG_APU_CFG 190 -+#define ICBID_SLAVE_PERIPH_MPU_CFG 191 -+#define ICBID_SLAVE_GCNT 192 -+#define ICBID_SLAVE_ADSS_CFG 193 -+#define ICBID_SLAVE_ADSS_APU 194 -+#define ICBID_SLAVE_ADSS_VMIDMT_CFG 195 -+#define ICBID_SLAVE_QHSS_APU_CFG 196 -+#define ICBID_SLAVE_MDIO 197 -+#define ICBID_SLAVE_FEPHY_CFG 198 -+#define ICBID_SLAVE_SRIF 199 -+#define ICBID_SLAVE_DDRC_CFG 200 -+#define ICBID_SLAVE_DDRC_APU_CFG 201 -+#define ICBID_SLAVE_DDRC_MPU0_CFG 202 -+#define ICBID_SLAVE_DDRC_MPU1_CFG 203 -+#define ICBID_SLAVE_DDRC_MPU2_CFG 210 -+#define ICBID_SLAVE_ESS_VMIDMT_CFG 211 -+#define ICBID_SLAVE_ESS_APU_CFG 212 -+#define ICBID_SLAVE_USB2_CFG 213 -+#define ICBID_SLAVE_BLSP_CFG 214 -+#define ICBID_SLAVE_QPIC_CFG 215 -+#define ICBID_SLAVE_SDCC_CFG 216 -+#define ICBID_SLAVE_WSS0_VMIDMT_CFG 217 -+#define ICBID_SLAVE_WSS0_APU_CFG 218 -+#define ICBID_SLAVE_WSS1_VMIDMT_CFG 219 -+#define ICBID_SLAVE_WSS1_APU_CFG 220 -+#define ICBID_SLAVE_SRVC_PCNOC 221 -+#define ICBID_SLAVE_SNOC_DDRC 222 -+#define ICBID_SLAVE_A7SS 223 -+#define ICBID_SLAVE_WSS0_CFG 224 -+#define ICBID_SLAVE_WSS1_CFG 225 -+#define ICBID_SLAVE_PCIE 226 -+#define ICBID_SLAVE_USB3_CFG 227 -+#define ICBID_SLAVE_CRYPTO_CFG 228 -+#define ICBID_SLAVE_ESS_CFG 229 -+#define ICBID_SLAVE_SRVC_SNOC 230 -+#endif ---- /dev/null -+++ b/include/dt-bindings/msm/msm-bus-rule-ops.h -@@ -0,0 +1,32 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __MSM_BUS_RULE_OPS_H -+#define __MSM_BUS_RULE_OPS_H -+ -+#define FLD_IB 0 -+#define FLD_AB 1 -+#define FLD_CLK 2 -+ -+#define OP_LE 0 -+#define OP_LT 1 -+#define OP_GE 2 -+#define OP_GT 3 -+#define OP_NOOP 4 -+ -+#define RULE_STATE_NOT_APPLIED 0 -+#define RULE_STATE_APPLIED 1 -+ -+#define THROTTLE_ON 0 -+#define THROTTLE_OFF 1 -+ -+#endif ---- /dev/null -+++ b/drivers/bus/msm_bus/Kconfig -@@ -0,0 +1,19 @@ -+config BUS_TOPOLOGY_ADHOC -+ bool "ad-hoc bus scaling topology" -+ depends on ARCH_QCOM -+ default n -+ help -+ This option enables a driver that can handle adhoc bus topologies. -+ Adhoc bus topology driver allows one to many connections and maintains -+ directionality of connections by explicitly listing device connections -+ thus avoiding illegal routes. -+ -+config MSM_BUS_SCALING -+ bool "Bus scaling driver" -+ depends on BUS_TOPOLOGY_ADHOC -+ default n -+ help -+ This option enables bus scaling on MSM devices. Bus scaling -+ allows devices to request the clocks be set to rates sufficient -+ for the active devices needs without keeping the clocks at max -+ frequency when a slower speed is sufficient. ---- /dev/null -+++ b/drivers/bus/msm_bus/Makefile -@@ -0,0 +1,12 @@ -+# -+# Makefile for msm-bus driver specific files -+# -+obj-y += msm_bus_bimc.o msm_bus_noc.o msm_bus_core.o msm_bus_client_api.o \ -+ msm_bus_id.o -+obj-$(CONFIG_OF) += msm_bus_of.o -+ -+obj-y += msm_bus_fabric_adhoc.o msm_bus_arb_adhoc.o msm_bus_rules.o -+obj-$(CONFIG_OF) += msm_bus_of_adhoc.o -+obj-$(CONFIG_CORESIGHT) += msm_buspm_coresight_adhoc.o -+ -+obj-$(CONFIG_DEBUG_FS) += msm_bus_dbg.o ---- /dev/null -+++ b/drivers/bus/msm_bus/msm-bus-board.h -@@ -0,0 +1,198 @@ -+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __ASM_ARCH_MSM_BUS_BOARD_H -+#define __ASM_ARCH_MSM_BUS_BOARD_H -+ -+#include -+#include -+ -+enum context { -+ DUAL_CTX, -+ ACTIVE_CTX, -+ NUM_CTX -+}; -+ -+struct msm_bus_fabric_registration { -+ unsigned int id; -+ const char *name; -+ struct msm_bus_node_info *info; -+ unsigned int len; -+ int ahb; -+ const char *fabclk[NUM_CTX]; -+ const char *iface_clk; -+ unsigned int offset; -+ unsigned int haltid; -+ unsigned int rpm_enabled; -+ unsigned int nmasters; -+ unsigned int nslaves; -+ unsigned int ntieredslaves; -+ bool il_flag; -+ const struct msm_bus_board_algorithm *board_algo; -+ int hw_sel; -+ void *hw_data; -+ uint32_t qos_freq; -+ uint32_t qos_baseoffset; -+ u64 nr_lim_thresh; -+ uint32_t eff_fact; -+ uint32_t qos_delta; -+ bool virt; -+}; -+ -+struct msm_bus_device_node_registration { -+ struct msm_bus_node_device_type *info; -+ unsigned int num_devices; -+ bool virt; -+}; -+ -+enum msm_bus_bw_tier_type { -+ MSM_BUS_BW_TIER1 = 1, -+ MSM_BUS_BW_TIER2, -+ MSM_BUS_BW_COUNT, -+ MSM_BUS_BW_SIZE = 0x7FFFFFFF, -+}; -+ -+struct msm_bus_halt_vector { -+ uint32_t haltval; -+ uint32_t haltmask; -+}; -+ -+extern struct msm_bus_fabric_registration msm_bus_apps_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_sys_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_mm_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_sys_fpb_pdata; -+extern struct msm_bus_fabric_registration msm_bus_cpss_fpb_pdata; -+extern struct msm_bus_fabric_registration msm_bus_def_fab_pdata; -+ -+extern struct msm_bus_fabric_registration msm_bus_8960_apps_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8960_sys_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8960_mm_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8960_sg_mm_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8960_sys_fpb_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8960_cpss_fpb_pdata; -+ -+extern struct msm_bus_fabric_registration msm_bus_8064_apps_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8064_sys_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8064_mm_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8064_sys_fpb_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8064_cpss_fpb_pdata; -+ -+extern struct msm_bus_fabric_registration msm_bus_9615_sys_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_9615_def_fab_pdata; -+ -+extern struct msm_bus_fabric_registration msm_bus_8930_apps_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8930_sys_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8930_mm_fabric_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8930_sys_fpb_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8930_cpss_fpb_pdata; -+ -+extern struct msm_bus_fabric_registration msm_bus_8974_sys_noc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8974_mmss_noc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8974_bimc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8974_ocmem_noc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8974_periph_noc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8974_config_noc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_8974_ocmem_vnoc_pdata; -+ -+extern struct msm_bus_fabric_registration msm_bus_9625_sys_noc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_9625_bimc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_9625_periph_noc_pdata; -+extern struct msm_bus_fabric_registration msm_bus_9625_config_noc_pdata; -+ -+extern int msm_bus_device_match_adhoc(struct device *dev, void *id); -+ -+void msm_bus_rpm_set_mt_mask(void); -+int msm_bus_board_rpm_get_il_ids(uint16_t *id); -+int msm_bus_board_get_iid(int id); -+ -+#define NFAB_MSM8226 6 -+#define NFAB_MSM8610 5 -+ -+/* -+ * These macros specify the convention followed for allocating -+ * ids to fabrics, masters and slaves for 8x60. -+ * -+ * A node can be identified as a master/slave/fabric by using -+ * these ids. -+ */ -+#define FABRIC_ID_KEY 1024 -+#define SLAVE_ID_KEY ((FABRIC_ID_KEY) >> 1) -+#define MAX_FAB_KEY 7168 /* OR(All fabric ids) */ -+#define INT_NODE_START 10000 -+ -+#define GET_FABID(id) ((id) & MAX_FAB_KEY) -+ -+#define NODE_ID(id) ((id) & (FABRIC_ID_KEY - 1)) -+#define IS_SLAVE(id) ((NODE_ID(id)) >= SLAVE_ID_KEY ? 1 : 0) -+#define CHECK_ID(iid, id) (((iid & id) != id) ? -ENXIO : iid) -+ -+/* -+ * The following macros are used to format the data for port halt -+ * and unhalt requests. -+ */ -+#define MSM_BUS_CLK_HALT 0x1 -+#define MSM_BUS_CLK_HALT_MASK 0x1 -+#define MSM_BUS_CLK_HALT_FIELDSIZE 0x1 -+#define MSM_BUS_CLK_UNHALT 0x0 -+ -+#define MSM_BUS_MASTER_SHIFT(master, fieldsize) \ -+ ((master) * (fieldsize)) -+ -+#define MSM_BUS_SET_BITFIELD(word, fieldmask, fieldvalue) \ -+ { \ -+ (word) &= ~(fieldmask); \ -+ (word) |= (fieldvalue); \ -+ } -+ -+ -+#define MSM_BUS_MASTER_HALT(u32haltmask, u32haltval, master) \ -+ MSM_BUS_SET_BITFIELD(u32haltmask, \ -+ MSM_BUS_CLK_HALT_MASK< -+ -+ -+#endif /*__ASM_ARCH_MSM_BUS_BOARD_H */ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm-bus.h -@@ -0,0 +1,139 @@ -+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _ARCH_ARM_MACH_MSM_BUS_H -+#define _ARCH_ARM_MACH_MSM_BUS_H -+ -+#include -+#include -+#include -+ -+/* -+ * Macros for clients to convert their data to ib and ab -+ * Ws : Time window over which to transfer the data in SECONDS -+ * Bs : Size of the data block in bytes -+ * Per : Recurrence period -+ * Tb : Throughput bandwidth to prevent stalling -+ * R : Ratio of actual bandwidth used to Tb -+ * Ib : Instantaneous bandwidth -+ * Ab : Arbitrated bandwidth -+ * -+ * IB_RECURRBLOCK and AB_RECURRBLOCK: -+ * These are used if the requirement is to transfer a -+ * recurring block of data over a known time window. -+ * -+ * IB_THROUGHPUTBW and AB_THROUGHPUTBW: -+ * These are used for CPU style masters. Here the requirement -+ * is to have minimum throughput bandwidth available to avoid -+ * stalling. -+ */ -+#define IB_RECURRBLOCK(Ws, Bs) ((Ws) == 0 ? 0 : ((Bs)/(Ws))) -+#define AB_RECURRBLOCK(Ws, Per) ((Ws) == 0 ? 0 : ((Bs)/(Per))) -+#define IB_THROUGHPUTBW(Tb) (Tb) -+#define AB_THROUGHPUTBW(Tb, R) ((Tb) * (R)) -+ -+struct msm_bus_vectors { -+ int src; /* Master */ -+ int dst; /* Slave */ -+ uint64_t ab; /* Arbitrated bandwidth */ -+ uint64_t ib; /* Instantaneous bandwidth */ -+}; -+ -+struct msm_bus_paths { -+ int num_paths; -+ struct msm_bus_vectors *vectors; -+}; -+ -+struct msm_bus_scale_pdata { -+ struct msm_bus_paths *usecase; -+ int num_usecases; -+ const char *name; -+ /* -+ * If the active_only flag is set to 1, the BW request is applied -+ * only when at least one CPU is active (powered on). If the flag -+ * is set to 0, then the BW request is always applied irrespective -+ * of the CPU state. -+ */ -+ unsigned int active_only; -+}; -+ -+/* Scaling APIs */ -+ -+/* -+ * This function returns a handle to the client. This should be used to -+ * call msm_bus_scale_client_update_request. -+ * The function returns 0 if bus driver is unable to register a client -+ */ -+ -+#if (defined(CONFIG_MSM_BUS_SCALING) || defined(CONFIG_BUS_TOPOLOGY_ADHOC)) -+int __init msm_bus_fabric_init_driver(void); -+uint32_t msm_bus_scale_register_client(struct msm_bus_scale_pdata *pdata); -+int msm_bus_scale_client_update_request(uint32_t cl, unsigned int index); -+void msm_bus_scale_unregister_client(uint32_t cl); -+/* AXI Port configuration APIs */ -+int msm_bus_axi_porthalt(int master_port); -+int msm_bus_axi_portunhalt(int master_port); -+ -+#else -+static inline int __init msm_bus_fabric_init_driver(void) { return 0; } -+ -+static inline uint32_t -+msm_bus_scale_register_client(struct msm_bus_scale_pdata *pdata) -+{ -+ return 1; -+} -+ -+static inline int -+msm_bus_scale_client_update_request(uint32_t cl, unsigned int index) -+{ -+ return 0; -+} -+ -+static inline void -+msm_bus_scale_unregister_client(uint32_t cl) -+{ -+} -+ -+static inline int msm_bus_axi_porthalt(int master_port) -+{ -+ return 0; -+} -+ -+static inline int msm_bus_axi_portunhalt(int master_port) -+{ -+ return 0; -+} -+#endif -+ -+#if defined(CONFIG_OF) && defined(CONFIG_MSM_BUS_SCALING) -+struct msm_bus_scale_pdata *msm_bus_pdata_from_node( -+ struct platform_device *pdev, struct device_node *of_node); -+struct msm_bus_scale_pdata *msm_bus_cl_get_pdata(struct platform_device *pdev); -+void msm_bus_cl_clear_pdata(struct msm_bus_scale_pdata *pdata); -+#else -+static inline struct msm_bus_scale_pdata -+*msm_bus_cl_get_pdata(struct platform_device *pdev) -+{ -+ return NULL; -+} -+ -+static inline struct msm_bus_scale_pdata *msm_bus_pdata_from_node( -+ struct platform_device *pdev, struct device_node *of_node) -+{ -+ return NULL; -+} -+ -+static inline void msm_bus_cl_clear_pdata(struct msm_bus_scale_pdata *pdata) -+{ -+} -+#endif -+#endif /*_ARCH_ARM_MACH_MSM_BUS_H*/ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_adhoc.h -@@ -0,0 +1,141 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _ARCH_ARM_MACH_MSM_BUS_ADHOC_H -+#define _ARCH_ARM_MACH_MSM_BUS_ADHOC_H -+ -+#include -+#include -+#include "msm-bus-board.h" -+#include "msm-bus.h" -+#include "msm_bus_rules.h" -+#include "msm_bus_core.h" -+ -+struct msm_bus_node_device_type; -+struct link_node { -+ uint64_t lnode_ib[NUM_CTX]; -+ uint64_t lnode_ab[NUM_CTX]; -+ int next; -+ struct device *next_dev; -+ struct list_head link; -+ uint32_t in_use; -+}; -+ -+/* New types introduced for adhoc topology */ -+struct msm_bus_noc_ops { -+ int (*qos_init)(struct msm_bus_node_device_type *dev, -+ void __iomem *qos_base, uint32_t qos_off, -+ uint32_t qos_delta, uint32_t qos_freq); -+ int (*set_bw)(struct msm_bus_node_device_type *dev, -+ void __iomem *qos_base, uint32_t qos_off, -+ uint32_t qos_delta, uint32_t qos_freq); -+ int (*limit_mport)(struct msm_bus_node_device_type *dev, -+ void __iomem *qos_base, uint32_t qos_off, -+ uint32_t qos_delta, uint32_t qos_freq, bool enable_lim, -+ uint64_t lim_bw); -+ bool (*update_bw_reg)(int mode); -+}; -+ -+struct nodebw { -+ uint64_t ab[NUM_CTX]; -+ bool dirty; -+}; -+ -+struct msm_bus_fab_device_type { -+ void __iomem *qos_base; -+ phys_addr_t pqos_base; -+ size_t qos_range; -+ uint32_t base_offset; -+ uint32_t qos_freq; -+ uint32_t qos_off; -+ uint32_t util_fact; -+ uint32_t vrail_comp; -+ struct msm_bus_noc_ops noc_ops; -+ enum msm_bus_hw_sel bus_type; -+ bool bypass_qos_prg; -+}; -+ -+struct qos_params_type { -+ int mode; -+ unsigned int prio_lvl; -+ unsigned int prio_rd; -+ unsigned int prio_wr; -+ unsigned int prio1; -+ unsigned int prio0; -+ unsigned int gp; -+ unsigned int thmp; -+ unsigned int ws; -+ int cur_mode; -+ u64 bw_buffer; -+}; -+ -+struct msm_bus_node_info_type { -+ const char *name; -+ unsigned int id; -+ int mas_rpm_id; -+ int slv_rpm_id; -+ int num_ports; -+ int num_qports; -+ int *qport; -+ struct qos_params_type qos_params; -+ unsigned int num_connections; -+ unsigned int num_blist; -+ bool is_fab_dev; -+ bool virt_dev; -+ bool is_traversed; -+ unsigned int *connections; -+ unsigned int *black_listed_connections; -+ struct device **dev_connections; -+ struct device **black_connections; -+ unsigned int bus_device_id; -+ struct device *bus_device; -+ unsigned int buswidth; -+ struct rule_update_path_info rule; -+ uint64_t lim_bw; -+ uint32_t util_fact; -+ uint32_t vrail_comp; -+}; -+ -+struct msm_bus_node_device_type { -+ struct msm_bus_node_info_type *node_info; -+ struct msm_bus_fab_device_type *fabdev; -+ int num_lnodes; -+ struct link_node *lnode_list; -+ uint64_t cur_clk_hz[NUM_CTX]; -+ struct nodebw node_ab; -+ struct list_head link; -+ unsigned int ap_owned; -+ struct nodeclk clk[NUM_CTX]; -+ struct nodeclk qos_clk; -+}; -+ -+int msm_bus_enable_limiter(struct msm_bus_node_device_type *nodedev, -+ bool throttle_en, uint64_t lim_bw); -+int msm_bus_update_clks(struct msm_bus_node_device_type *nodedev, -+ int ctx, int **dirty_nodes, int *num_dirty); -+int msm_bus_commit_data(int *dirty_nodes, int ctx, int num_dirty); -+int msm_bus_update_bw(struct msm_bus_node_device_type *nodedev, int ctx, -+ int64_t add_bw, int **dirty_nodes, int *num_dirty); -+void *msm_bus_realloc_devmem(struct device *dev, void *p, size_t old_size, -+ size_t new_size, gfp_t flags); -+ -+extern struct msm_bus_device_node_registration -+ *msm_bus_of_to_pdata(struct platform_device *pdev); -+extern void msm_bus_arb_setops_adhoc(struct msm_bus_arb_ops *arb_ops); -+extern int msm_bus_bimc_set_ops(struct msm_bus_node_device_type *bus_dev); -+extern int msm_bus_noc_set_ops(struct msm_bus_node_device_type *bus_dev); -+extern int msm_bus_of_get_static_rules(struct platform_device *pdev, -+ struct bus_rule_type **static_rule); -+extern int msm_rules_update_path(struct list_head *input_list, -+ struct list_head *output_list); -+extern void print_all_rules(void); -+#endif /* _ARCH_ARM_MACH_MSM_BUS_ADHOC_H */ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_arb_adhoc.c -@@ -0,0 +1,998 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is Mree software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "msm-bus.h" -+#include "msm_bus_core.h" -+#include "msm_bus_adhoc.h" -+ -+#define NUM_CL_HANDLES 50 -+#define NUM_LNODES 3 -+ -+struct bus_search_type { -+ struct list_head link; -+ struct list_head node_list; -+}; -+ -+struct handle_type { -+ int num_entries; -+ struct msm_bus_client **cl_list; -+}; -+ -+static struct handle_type handle_list; -+struct list_head input_list; -+struct list_head apply_list; -+ -+DEFINE_MUTEX(msm_bus_adhoc_lock); -+ -+static bool chk_bl_list(struct list_head *black_list, unsigned int id) -+{ -+ struct msm_bus_node_device_type *bus_node = NULL; -+ -+ list_for_each_entry(bus_node, black_list, link) { -+ if (bus_node->node_info->id == id) -+ return true; -+ } -+ return false; -+} -+ -+static void copy_remaining_nodes(struct list_head *edge_list, struct list_head -+ *traverse_list, struct list_head *route_list) -+{ -+ struct bus_search_type *search_node; -+ -+ if (list_empty(edge_list) && list_empty(traverse_list)) -+ return; -+ -+ search_node = kzalloc(sizeof(struct bus_search_type), GFP_KERNEL); -+ INIT_LIST_HEAD(&search_node->node_list); -+ list_splice_init(edge_list, traverse_list); -+ list_splice_init(traverse_list, &search_node->node_list); -+ list_add_tail(&search_node->link, route_list); -+} -+ -+/* -+ * Duplicate instantiaion from msm_bus_arb.c. Todo there needs to be a -+ * "util" file for these common func/macros. -+ * -+ * */ -+uint64_t msm_bus_div64(unsigned int w, uint64_t bw) -+{ -+ uint64_t *b = &bw; -+ -+ if ((bw > 0) && (bw < w)) -+ return 1; -+ -+ switch (w) { -+ case 0: -+ WARN(1, "AXI: Divide by 0 attempted\n"); -+ case 1: return bw; -+ case 2: return (bw >> 1); -+ case 4: return (bw >> 2); -+ case 8: return (bw >> 3); -+ case 16: return (bw >> 4); -+ case 32: return (bw >> 5); -+ } -+ -+ do_div(*b, w); -+ return *b; -+} -+ -+int msm_bus_device_match_adhoc(struct device *dev, void *id) -+{ -+ int ret = 0; -+ struct msm_bus_node_device_type *bnode = dev->platform_data; -+ -+ if (bnode) -+ ret = (bnode->node_info->id == *(unsigned int *)id); -+ else -+ ret = 0; -+ -+ return ret; -+} -+ -+static int gen_lnode(struct device *dev, -+ int next_hop, int prev_idx) -+{ -+ struct link_node *lnode; -+ struct msm_bus_node_device_type *cur_dev = NULL; -+ int lnode_idx = -1; -+ -+ if (!dev) -+ goto exit_gen_lnode; -+ -+ cur_dev = dev->platform_data; -+ if (!cur_dev) { -+ MSM_BUS_ERR("%s: Null device ptr", __func__); -+ goto exit_gen_lnode; -+ } -+ -+ if (!cur_dev->num_lnodes) { -+ cur_dev->lnode_list = devm_kzalloc(dev, -+ sizeof(struct link_node) * NUM_LNODES, -+ GFP_KERNEL); -+ if (!cur_dev->lnode_list) -+ goto exit_gen_lnode; -+ -+ lnode = cur_dev->lnode_list; -+ cur_dev->num_lnodes = NUM_LNODES; -+ lnode_idx = 0; -+ } else { -+ int i; -+ for (i = 0; i < cur_dev->num_lnodes; i++) { -+ if (!cur_dev->lnode_list[i].in_use) -+ break; -+ } -+ -+ if (i < cur_dev->num_lnodes) { -+ lnode = &cur_dev->lnode_list[i]; -+ lnode_idx = i; -+ } else { -+ struct link_node *realloc_list; -+ size_t cur_size = sizeof(struct link_node) * -+ cur_dev->num_lnodes; -+ -+ cur_dev->num_lnodes += NUM_LNODES; -+ realloc_list = msm_bus_realloc_devmem( -+ dev, -+ cur_dev->lnode_list, -+ cur_size, -+ sizeof(struct link_node) * -+ cur_dev->num_lnodes, GFP_KERNEL); -+ -+ if (!realloc_list) -+ goto exit_gen_lnode; -+ -+ cur_dev->lnode_list = realloc_list; -+ lnode = &cur_dev->lnode_list[i]; -+ lnode_idx = i; -+ } -+ } -+ -+ lnode->in_use = 1; -+ if (next_hop == cur_dev->node_info->id) { -+ lnode->next = -1; -+ lnode->next_dev = NULL; -+ } else { -+ lnode->next = prev_idx; -+ lnode->next_dev = bus_find_device(&msm_bus_type, NULL, -+ (void *) &next_hop, -+ msm_bus_device_match_adhoc); -+ } -+ -+ memset(lnode->lnode_ib, 0, sizeof(uint64_t) * NUM_CTX); -+ memset(lnode->lnode_ab, 0, sizeof(uint64_t) * NUM_CTX); -+ -+exit_gen_lnode: -+ return lnode_idx; -+} -+ -+static int remove_lnode(struct msm_bus_node_device_type *cur_dev, -+ int lnode_idx) -+{ -+ int ret = 0; -+ -+ if (!cur_dev) { -+ MSM_BUS_ERR("%s: Null device ptr", __func__); -+ ret = -ENODEV; -+ goto exit_remove_lnode; -+ } -+ -+ if (lnode_idx != -1) { -+ if (!cur_dev->num_lnodes || -+ (lnode_idx > (cur_dev->num_lnodes - 1))) { -+ MSM_BUS_ERR("%s: Invalid Idx %d, num_lnodes %d", -+ __func__, lnode_idx, cur_dev->num_lnodes); -+ ret = -ENODEV; -+ goto exit_remove_lnode; -+ } -+ -+ cur_dev->lnode_list[lnode_idx].next = -1; -+ cur_dev->lnode_list[lnode_idx].next_dev = NULL; -+ cur_dev->lnode_list[lnode_idx].in_use = 0; -+ } -+ -+exit_remove_lnode: -+ return ret; -+} -+ -+static int prune_path(struct list_head *route_list, int dest, int src, -+ struct list_head *black_list, int found) -+{ -+ struct bus_search_type *search_node, *temp_search_node; -+ struct msm_bus_node_device_type *bus_node; -+ struct list_head *bl_list; -+ struct list_head *temp_bl_list; -+ int search_dev_id = dest; -+ struct device *dest_dev = bus_find_device(&msm_bus_type, NULL, -+ (void *) &dest, -+ msm_bus_device_match_adhoc); -+ int lnode_hop = -1; -+ -+ if (!found) -+ goto reset_links; -+ -+ if (!dest_dev) { -+ MSM_BUS_ERR("%s: Can't find dest dev %d", __func__, dest); -+ goto exit_prune_path; -+ } -+ -+ lnode_hop = gen_lnode(dest_dev, search_dev_id, lnode_hop); -+ -+ list_for_each_entry_reverse(search_node, route_list, link) { -+ list_for_each_entry(bus_node, &search_node->node_list, link) { -+ unsigned int i; -+ for (i = 0; i < bus_node->node_info->num_connections; -+ i++) { -+ if (bus_node->node_info->connections[i] == -+ search_dev_id) { -+ dest_dev = bus_find_device( -+ &msm_bus_type, -+ NULL, -+ (void *) -+ &bus_node->node_info-> -+ id, -+ msm_bus_device_match_adhoc); -+ -+ if (!dest_dev) { -+ lnode_hop = -1; -+ goto reset_links; -+ } -+ -+ lnode_hop = gen_lnode(dest_dev, -+ search_dev_id, -+ lnode_hop); -+ search_dev_id = -+ bus_node->node_info->id; -+ break; -+ } -+ } -+ } -+ } -+reset_links: -+ list_for_each_entry_safe(search_node, temp_search_node, route_list, -+ link) { -+ list_for_each_entry(bus_node, &search_node->node_list, -+ link) -+ bus_node->node_info->is_traversed = false; -+ -+ list_del(&search_node->link); -+ kfree(search_node); -+ } -+ -+ list_for_each_safe(bl_list, temp_bl_list, black_list) -+ list_del(bl_list); -+ -+exit_prune_path: -+ return lnode_hop; -+} -+ -+static void setup_bl_list(struct msm_bus_node_device_type *node, -+ struct list_head *black_list) -+{ -+ unsigned int i; -+ -+ for (i = 0; i < node->node_info->num_blist; i++) { -+ struct msm_bus_node_device_type *bdev; -+ bdev = node->node_info->black_connections[i]->platform_data; -+ list_add_tail(&bdev->link, black_list); -+ } -+} -+ -+static int getpath(int src, int dest) -+{ -+ struct list_head traverse_list; -+ struct list_head edge_list; -+ struct list_head route_list; -+ struct list_head black_list; -+ struct device *src_dev = bus_find_device(&msm_bus_type, NULL, -+ (void *) &src, -+ msm_bus_device_match_adhoc); -+ struct msm_bus_node_device_type *src_node; -+ struct bus_search_type *search_node; -+ int found = 0; -+ int depth_index = 0; -+ int first_hop = -1; -+ -+ INIT_LIST_HEAD(&traverse_list); -+ INIT_LIST_HEAD(&edge_list); -+ INIT_LIST_HEAD(&route_list); -+ INIT_LIST_HEAD(&black_list); -+ -+ if (!src_dev) { -+ MSM_BUS_ERR("%s: Cannot locate src dev %d", __func__, src); -+ goto exit_getpath; -+ } -+ -+ src_node = src_dev->platform_data; -+ if (!src_node) { -+ MSM_BUS_ERR("%s:Fatal, Source dev %d not found", __func__, src); -+ goto exit_getpath; -+ } -+ list_add_tail(&src_node->link, &traverse_list); -+ -+ while ((!found && !list_empty(&traverse_list))) { -+ struct msm_bus_node_device_type *bus_node = NULL; -+ /* Locate dest_id in the traverse list */ -+ list_for_each_entry(bus_node, &traverse_list, link) { -+ if (bus_node->node_info->id == dest) { -+ found = 1; -+ break; -+ } -+ } -+ -+ if (!found) { -+ unsigned int i; -+ /* Setup the new edge list */ -+ list_for_each_entry(bus_node, &traverse_list, link) { -+ /* Setup list of black-listed nodes */ -+ setup_bl_list(bus_node, &black_list); -+ -+ for (i = 0; i < bus_node->node_info-> -+ num_connections; i++) { -+ bool skip; -+ struct msm_bus_node_device_type -+ *node_conn; -+ node_conn = bus_node->node_info-> -+ dev_connections[i]-> -+ platform_data; -+ if (node_conn->node_info-> -+ is_traversed) { -+ MSM_BUS_ERR("Circ Path %d\n", -+ node_conn->node_info->id); -+ goto reset_traversed; -+ } -+ skip = chk_bl_list(&black_list, -+ bus_node->node_info-> -+ connections[i]); -+ if (!skip) { -+ list_add_tail(&node_conn->link, -+ &edge_list); -+ node_conn->node_info-> -+ is_traversed = true; -+ } -+ } -+ } -+ -+ /* Keep tabs of the previous search list */ -+ search_node = kzalloc(sizeof(struct bus_search_type), -+ GFP_KERNEL); -+ INIT_LIST_HEAD(&search_node->node_list); -+ list_splice_init(&traverse_list, -+ &search_node->node_list); -+ /* Add the previous search list to a route list */ -+ list_add_tail(&search_node->link, &route_list); -+ /* Advancing the list depth */ -+ depth_index++; -+ list_splice_init(&edge_list, &traverse_list); -+ } -+ } -+reset_traversed: -+ copy_remaining_nodes(&edge_list, &traverse_list, &route_list); -+ first_hop = prune_path(&route_list, dest, src, &black_list, found); -+ -+exit_getpath: -+ return first_hop; -+} -+ -+static uint64_t arbitrate_bus_req(struct msm_bus_node_device_type *bus_dev, -+ int ctx) -+{ -+ int i; -+ uint64_t max_ib = 0; -+ uint64_t sum_ab = 0; -+ uint64_t bw_max_hz; -+ struct msm_bus_node_device_type *fab_dev = NULL; -+ uint32_t util_fact = 0; -+ uint32_t vrail_comp = 0; -+ -+ /* Find max ib */ -+ for (i = 0; i < bus_dev->num_lnodes; i++) { -+ max_ib = max(max_ib, bus_dev->lnode_list[i].lnode_ib[ctx]); -+ sum_ab += bus_dev->lnode_list[i].lnode_ab[ctx]; -+ } -+ /* -+ * Account for Util factor and vrail comp. The new aggregation -+ * formula is: -+ * Freq_hz = max((sum(ab) * util_fact)/num_chan, max(ib)/vrail_comp) -+ * / bus-width -+ * util_fact and vrail comp are obtained from fabric/Node's dts -+ * properties. -+ * They default to 100 if absent. -+ */ -+ fab_dev = bus_dev->node_info->bus_device->platform_data; -+ /* Don't do this for virtual fabrics */ -+ if (fab_dev && fab_dev->fabdev) { -+ util_fact = bus_dev->node_info->util_fact ? -+ bus_dev->node_info->util_fact : -+ fab_dev->fabdev->util_fact; -+ vrail_comp = bus_dev->node_info->vrail_comp ? -+ bus_dev->node_info->vrail_comp : -+ fab_dev->fabdev->vrail_comp; -+ sum_ab *= util_fact; -+ sum_ab = msm_bus_div64(100, sum_ab); -+ max_ib *= 100; -+ max_ib = msm_bus_div64(vrail_comp, max_ib); -+ } -+ -+ /* Account for multiple channels if any */ -+ if (bus_dev->node_info->num_qports > 1) -+ sum_ab = msm_bus_div64(bus_dev->node_info->num_qports, -+ sum_ab); -+ -+ if (!bus_dev->node_info->buswidth) { -+ MSM_BUS_WARN("No bus width found for %d. Using default\n", -+ bus_dev->node_info->id); -+ bus_dev->node_info->buswidth = 8; -+ } -+ -+ bw_max_hz = max(max_ib, sum_ab); -+ bw_max_hz = msm_bus_div64(bus_dev->node_info->buswidth, -+ bw_max_hz); -+ -+ return bw_max_hz; -+} -+ -+static void del_inp_list(struct list_head *list) -+{ -+ struct rule_update_path_info *rule_node; -+ struct rule_update_path_info *rule_node_tmp; -+ -+ list_for_each_entry_safe(rule_node, rule_node_tmp, list, link) -+ list_del(&rule_node->link); -+} -+ -+static void del_op_list(struct list_head *list) -+{ -+ struct rule_apply_rcm_info *rule; -+ struct rule_apply_rcm_info *rule_tmp; -+ -+ list_for_each_entry_safe(rule, rule_tmp, list, link) -+ list_del(&rule->link); -+} -+ -+static int msm_bus_apply_rules(struct list_head *list, bool after_clk_commit) -+{ -+ struct rule_apply_rcm_info *rule; -+ struct device *dev = NULL; -+ struct msm_bus_node_device_type *dev_info = NULL; -+ int ret = 0; -+ bool throttle_en = false; -+ -+ list_for_each_entry(rule, list, link) { -+ if (!rule) -+ break; -+ -+ if (rule && (rule->after_clk_commit != after_clk_commit)) -+ continue; -+ -+ dev = bus_find_device(&msm_bus_type, NULL, -+ (void *) &rule->id, -+ msm_bus_device_match_adhoc); -+ -+ if (!dev) { -+ MSM_BUS_ERR("Can't find dev node for %d", rule->id); -+ continue; -+ } -+ dev_info = dev->platform_data; -+ -+ throttle_en = ((rule->throttle == THROTTLE_ON) ? true : false); -+ ret = msm_bus_enable_limiter(dev_info, throttle_en, -+ rule->lim_bw); -+ if (ret) -+ MSM_BUS_ERR("Failed to set limiter for %d", rule->id); -+ } -+ -+ return ret; -+} -+ -+static uint64_t get_node_aggab(struct msm_bus_node_device_type *bus_dev) -+{ -+ int i; -+ int ctx; -+ uint64_t max_agg_ab = 0; -+ uint64_t agg_ab = 0; -+ -+ for (ctx = 0; ctx < NUM_CTX; ctx++) { -+ for (i = 0; i < bus_dev->num_lnodes; i++) -+ agg_ab += bus_dev->lnode_list[i].lnode_ab[ctx]; -+ -+ if (bus_dev->node_info->num_qports > 1) -+ agg_ab = msm_bus_div64(bus_dev->node_info->num_qports, -+ agg_ab); -+ -+ max_agg_ab = max(max_agg_ab, agg_ab); -+ } -+ -+ return max_agg_ab; -+} -+ -+static uint64_t get_node_ib(struct msm_bus_node_device_type *bus_dev) -+{ -+ int i; -+ int ctx; -+ uint64_t max_ib = 0; -+ -+ for (ctx = 0; ctx < NUM_CTX; ctx++) { -+ for (i = 0; i < bus_dev->num_lnodes; i++) -+ max_ib = max(max_ib, -+ bus_dev->lnode_list[i].lnode_ib[ctx]); -+ } -+ return max_ib; -+} -+ -+static int update_path(int src, int dest, uint64_t req_ib, uint64_t req_bw, -+ uint64_t cur_ib, uint64_t cur_bw, int src_idx, int ctx) -+{ -+ struct device *src_dev = NULL; -+ struct device *next_dev = NULL; -+ struct link_node *lnode = NULL; -+ struct msm_bus_node_device_type *dev_info = NULL; -+ int curr_idx; -+ int ret = 0; -+ int *dirty_nodes = NULL; -+ int num_dirty = 0; -+ struct rule_update_path_info *rule_node; -+ bool rules_registered = msm_rule_are_rules_registered(); -+ -+ src_dev = bus_find_device(&msm_bus_type, NULL, -+ (void *) &src, -+ msm_bus_device_match_adhoc); -+ -+ if (!src_dev) { -+ MSM_BUS_ERR("%s: Can't find source device %d", __func__, src); -+ ret = -ENODEV; -+ goto exit_update_path; -+ } -+ -+ next_dev = src_dev; -+ -+ if (src_idx < 0) { -+ MSM_BUS_ERR("%s: Invalid lnode idx %d", __func__, src_idx); -+ ret = -ENXIO; -+ goto exit_update_path; -+ } -+ curr_idx = src_idx; -+ -+ INIT_LIST_HEAD(&input_list); -+ INIT_LIST_HEAD(&apply_list); -+ -+ while (next_dev) { -+ dev_info = next_dev->platform_data; -+ -+ if (curr_idx >= dev_info->num_lnodes) { -+ MSM_BUS_ERR("%s: Invalid lnode Idx %d num lnodes %d", -+ __func__, curr_idx, dev_info->num_lnodes); -+ ret = -ENXIO; -+ goto exit_update_path; -+ } -+ -+ lnode = &dev_info->lnode_list[curr_idx]; -+ lnode->lnode_ib[ctx] = req_ib; -+ lnode->lnode_ab[ctx] = req_bw; -+ -+ dev_info->cur_clk_hz[ctx] = arbitrate_bus_req(dev_info, ctx); -+ -+ /* Start updating the clocks at the first hop. -+ * Its ok to figure out the aggregated -+ * request at this node. -+ */ -+ if (src_dev != next_dev) { -+ ret = msm_bus_update_clks(dev_info, ctx, &dirty_nodes, -+ &num_dirty); -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to update clks dev %d", -+ __func__, dev_info->node_info->id); -+ goto exit_update_path; -+ } -+ } -+ -+ ret = msm_bus_update_bw(dev_info, ctx, req_bw, &dirty_nodes, -+ &num_dirty); -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to update bw dev %d", -+ __func__, dev_info->node_info->id); -+ goto exit_update_path; -+ } -+ -+ if (rules_registered) { -+ rule_node = &dev_info->node_info->rule; -+ rule_node->id = dev_info->node_info->id; -+ rule_node->ib = get_node_ib(dev_info); -+ rule_node->ab = get_node_aggab(dev_info); -+ rule_node->clk = max(dev_info->cur_clk_hz[ACTIVE_CTX], -+ dev_info->cur_clk_hz[DUAL_CTX]); -+ list_add_tail(&rule_node->link, &input_list); -+ } -+ -+ next_dev = lnode->next_dev; -+ curr_idx = lnode->next; -+ } -+ -+ if (rules_registered) { -+ msm_rules_update_path(&input_list, &apply_list); -+ msm_bus_apply_rules(&apply_list, false); -+ } -+ -+ msm_bus_commit_data(dirty_nodes, ctx, num_dirty); -+ -+ if (rules_registered) { -+ msm_bus_apply_rules(&apply_list, true); -+ del_inp_list(&input_list); -+ del_op_list(&apply_list); -+ } -+exit_update_path: -+ return ret; -+} -+ -+static int remove_path(int src, int dst, uint64_t cur_ib, uint64_t cur_ab, -+ int src_idx, int active_only) -+{ -+ struct device *src_dev = NULL; -+ struct device *next_dev = NULL; -+ struct link_node *lnode = NULL; -+ struct msm_bus_node_device_type *dev_info = NULL; -+ int ret = 0; -+ int cur_idx = src_idx; -+ int next_idx; -+ -+ /* Update the current path to zero out all request from -+ * this cient on all paths -+ */ -+ -+ ret = update_path(src, dst, 0, 0, cur_ib, cur_ab, src_idx, -+ active_only); -+ if (ret) { -+ MSM_BUS_ERR("%s: Error zeroing out path ctx %d", -+ __func__, ACTIVE_CTX); -+ goto exit_remove_path; -+ } -+ -+ src_dev = bus_find_device(&msm_bus_type, NULL, -+ (void *) &src, -+ msm_bus_device_match_adhoc); -+ if (!src_dev) { -+ MSM_BUS_ERR("%s: Can't find source device %d", __func__, src); -+ ret = -ENODEV; -+ goto exit_remove_path; -+ } -+ -+ next_dev = src_dev; -+ -+ while (next_dev) { -+ dev_info = next_dev->platform_data; -+ lnode = &dev_info->lnode_list[cur_idx]; -+ next_idx = lnode->next; -+ next_dev = lnode->next_dev; -+ remove_lnode(dev_info, cur_idx); -+ cur_idx = next_idx; -+ } -+ -+exit_remove_path: -+ return ret; -+} -+ -+static void getpath_debug(int src, int curr, int active_only) -+{ -+ struct device *dev_node; -+ struct device *dev_it; -+ unsigned int hop = 1; -+ int idx; -+ struct msm_bus_node_device_type *devinfo; -+ int i; -+ -+ dev_node = bus_find_device(&msm_bus_type, NULL, -+ (void *) &src, -+ msm_bus_device_match_adhoc); -+ -+ if (!dev_node) { -+ MSM_BUS_ERR("SRC NOT FOUND %d", src); -+ return; -+ } -+ -+ idx = curr; -+ devinfo = dev_node->platform_data; -+ dev_it = dev_node; -+ -+ MSM_BUS_ERR("Route list Src %d", src); -+ while (dev_it) { -+ struct msm_bus_node_device_type *busdev = -+ devinfo->node_info->bus_device->platform_data; -+ -+ MSM_BUS_ERR("Hop[%d] at Device %d ctx %d", hop, -+ devinfo->node_info->id, active_only); -+ -+ for (i = 0; i < NUM_CTX; i++) { -+ MSM_BUS_ERR("dev info sel ib %llu", -+ devinfo->cur_clk_hz[i]); -+ MSM_BUS_ERR("dev info sel ab %llu", -+ devinfo->node_ab.ab[i]); -+ } -+ -+ dev_it = devinfo->lnode_list[idx].next_dev; -+ idx = devinfo->lnode_list[idx].next; -+ if (dev_it) -+ devinfo = dev_it->platform_data; -+ -+ MSM_BUS_ERR("Bus Device %d", busdev->node_info->id); -+ MSM_BUS_ERR("Bus Clock %llu", busdev->clk[active_only].rate); -+ -+ if (idx < 0) -+ break; -+ hop++; -+ } -+} -+ -+static void unregister_client_adhoc(uint32_t cl) -+{ -+ int i; -+ struct msm_bus_scale_pdata *pdata; -+ int lnode, src, curr, dest; -+ uint64_t cur_clk, cur_bw; -+ struct msm_bus_client *client; -+ -+ mutex_lock(&msm_bus_adhoc_lock); -+ if (!cl) { -+ MSM_BUS_ERR("%s: Null cl handle passed unregister\n", -+ __func__); -+ goto exit_unregister_client; -+ } -+ client = handle_list.cl_list[cl]; -+ pdata = client->pdata; -+ if (!pdata) { -+ MSM_BUS_ERR("%s: Null pdata passed to unregister\n", -+ __func__); -+ goto exit_unregister_client; -+ } -+ -+ curr = client->curr; -+ if (curr >= pdata->num_usecases) { -+ MSM_BUS_ERR("Invalid index Defaulting curr to 0"); -+ curr = 0; -+ } -+ -+ MSM_BUS_DBG("%s: Unregistering client %p", __func__, client); -+ -+ for (i = 0; i < pdata->usecase->num_paths; i++) { -+ src = client->pdata->usecase[curr].vectors[i].src; -+ dest = client->pdata->usecase[curr].vectors[i].dst; -+ -+ lnode = client->src_pnode[i]; -+ cur_clk = client->pdata->usecase[curr].vectors[i].ib; -+ cur_bw = client->pdata->usecase[curr].vectors[i].ab; -+ remove_path(src, dest, cur_clk, cur_bw, lnode, -+ pdata->active_only); -+ } -+ msm_bus_dbg_client_data(client->pdata, MSM_BUS_DBG_UNREGISTER, cl); -+ kfree(client->src_pnode); -+ kfree(client); -+ handle_list.cl_list[cl] = NULL; -+exit_unregister_client: -+ mutex_unlock(&msm_bus_adhoc_lock); -+ return; -+} -+ -+static int alloc_handle_lst(int size) -+{ -+ int ret = 0; -+ struct msm_bus_client **t_cl_list; -+ -+ if (!handle_list.num_entries) { -+ t_cl_list = kzalloc(sizeof(struct msm_bus_client *) -+ * NUM_CL_HANDLES, GFP_KERNEL); -+ if (ZERO_OR_NULL_PTR(t_cl_list)) { -+ ret = -ENOMEM; -+ MSM_BUS_ERR("%s: Failed to allocate handles list", -+ __func__); -+ goto exit_alloc_handle_lst; -+ } -+ handle_list.cl_list = t_cl_list; -+ handle_list.num_entries += NUM_CL_HANDLES; -+ } else { -+ t_cl_list = krealloc(handle_list.cl_list, -+ sizeof(struct msm_bus_client *) * -+ handle_list.num_entries + NUM_CL_HANDLES, -+ GFP_KERNEL); -+ if (ZERO_OR_NULL_PTR(t_cl_list)) { -+ ret = -ENOMEM; -+ MSM_BUS_ERR("%s: Failed to allocate handles list", -+ __func__); -+ goto exit_alloc_handle_lst; -+ } -+ -+ memset(&handle_list.cl_list[handle_list.num_entries], 0, -+ NUM_CL_HANDLES * sizeof(struct msm_bus_client *)); -+ handle_list.num_entries += NUM_CL_HANDLES; -+ handle_list.cl_list = t_cl_list; -+ } -+exit_alloc_handle_lst: -+ return ret; -+} -+ -+static uint32_t gen_handle(struct msm_bus_client *client) -+{ -+ uint32_t handle = 0; -+ int i; -+ int ret = 0; -+ -+ for (i = 0; i < handle_list.num_entries; i++) { -+ if (i && !handle_list.cl_list[i]) { -+ handle = i; -+ break; -+ } -+ } -+ -+ if (!handle) { -+ ret = alloc_handle_lst(NUM_CL_HANDLES); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to allocate handle list", -+ __func__); -+ goto exit_gen_handle; -+ } -+ handle = i + 1; -+ } -+ handle_list.cl_list[handle] = client; -+exit_gen_handle: -+ return handle; -+} -+ -+static uint32_t register_client_adhoc(struct msm_bus_scale_pdata *pdata) -+{ -+ int src, dest; -+ int i; -+ struct msm_bus_client *client = NULL; -+ int *lnode; -+ uint32_t handle = 0; -+ -+ mutex_lock(&msm_bus_adhoc_lock); -+ client = kzalloc(sizeof(struct msm_bus_client), GFP_KERNEL); -+ if (!client) { -+ MSM_BUS_ERR("%s: Error allocating client data", __func__); -+ goto exit_register_client; -+ } -+ client->pdata = pdata; -+ -+ lnode = kzalloc(pdata->usecase->num_paths * sizeof(int), GFP_KERNEL); -+ if (ZERO_OR_NULL_PTR(lnode)) { -+ MSM_BUS_ERR("%s: Error allocating pathnode ptr!", __func__); -+ goto exit_register_client; -+ } -+ client->src_pnode = lnode; -+ -+ for (i = 0; i < pdata->usecase->num_paths; i++) { -+ src = pdata->usecase->vectors[i].src; -+ dest = pdata->usecase->vectors[i].dst; -+ -+ if ((src < 0) || (dest < 0)) { -+ MSM_BUS_ERR("%s:Invalid src/dst.src %d dest %d", -+ __func__, src, dest); -+ goto exit_register_client; -+ } -+ -+ lnode[i] = getpath(src, dest); -+ if (lnode[i] < 0) { -+ MSM_BUS_ERR("%s:Failed to find path.src %d dest %d", -+ __func__, src, dest); -+ goto exit_register_client; -+ } -+ } -+ -+ handle = gen_handle(client); -+ msm_bus_dbg_client_data(client->pdata, MSM_BUS_DBG_REGISTER, -+ handle); -+ MSM_BUS_DBG("%s:Client handle %d %s", __func__, handle, -+ client->pdata->name); -+exit_register_client: -+ mutex_unlock(&msm_bus_adhoc_lock); -+ return handle; -+} -+ -+static int update_request_adhoc(uint32_t cl, unsigned int index) -+{ -+ int i, ret = 0; -+ struct msm_bus_scale_pdata *pdata; -+ int lnode, src, curr, dest; -+ uint64_t req_clk, req_bw, curr_clk, curr_bw; -+ struct msm_bus_client *client; -+ const char *test_cl = "Null"; -+ bool log_transaction = false; -+ -+ mutex_lock(&msm_bus_adhoc_lock); -+ -+ if (!cl) { -+ MSM_BUS_ERR("%s: Invalid client handle %d", __func__, cl); -+ ret = -ENXIO; -+ goto exit_update_request; -+ } -+ -+ client = handle_list.cl_list[cl]; -+ pdata = client->pdata; -+ if (!pdata) { -+ MSM_BUS_ERR("%s: Client data Null.[client didn't register]", -+ __func__); -+ ret = -ENXIO; -+ goto exit_update_request; -+ } -+ -+ if (index >= pdata->num_usecases) { -+ MSM_BUS_ERR("Client %u passed invalid index: %d\n", -+ cl, index); -+ ret = -ENXIO; -+ goto exit_update_request; -+ } -+ -+ if (client->curr == index) { -+ MSM_BUS_DBG("%s: Not updating client request idx %d unchanged", -+ __func__, index); -+ goto exit_update_request; -+ } -+ -+ curr = client->curr; -+ client->curr = index; -+ -+ if (!strcmp(test_cl, pdata->name)) -+ log_transaction = true; -+ -+ MSM_BUS_DBG("%s: cl: %u index: %d curr: %d num_paths: %d\n", __func__, -+ cl, index, client->curr, client->pdata->usecase->num_paths); -+ -+ for (i = 0; i < pdata->usecase->num_paths; i++) { -+ src = client->pdata->usecase[index].vectors[i].src; -+ dest = client->pdata->usecase[index].vectors[i].dst; -+ -+ lnode = client->src_pnode[i]; -+ req_clk = client->pdata->usecase[index].vectors[i].ib; -+ req_bw = client->pdata->usecase[index].vectors[i].ab; -+ if (curr < 0) { -+ curr_clk = 0; -+ curr_bw = 0; -+ } else { -+ curr_clk = client->pdata->usecase[curr].vectors[i].ib; -+ curr_bw = client->pdata->usecase[curr].vectors[i].ab; -+ MSM_BUS_DBG("%s:ab: %llu ib: %llu\n", __func__, -+ curr_bw, curr_clk); -+ } -+ -+ ret = update_path(src, dest, req_clk, req_bw, -+ curr_clk, curr_bw, lnode, pdata->active_only); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: Update path failed! %d ctx %d\n", -+ __func__, ret, ACTIVE_CTX); -+ goto exit_update_request; -+ } -+ -+ if (log_transaction) -+ getpath_debug(src, lnode, pdata->active_only); -+ } -+ msm_bus_dbg_client_data(client->pdata, index , cl); -+exit_update_request: -+ mutex_unlock(&msm_bus_adhoc_lock); -+ return ret; -+} -+ -+/** -+ * msm_bus_arb_setops_adhoc() : Setup the bus arbitration ops -+ * @ arb_ops: pointer to the arb ops. -+ */ -+void msm_bus_arb_setops_adhoc(struct msm_bus_arb_ops *arb_ops) -+{ -+ arb_ops->register_client = register_client_adhoc; -+ arb_ops->update_request = update_request_adhoc; -+ arb_ops->unregister_client = unregister_client_adhoc; -+} ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_bimc.c -@@ -0,0 +1,2112 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#define pr_fmt(fmt) "AXI: BIMC: %s(): " fmt, __func__ -+ -+#include -+#include -+#include "msm-bus-board.h" -+#include "msm_bus_core.h" -+#include "msm_bus_bimc.h" -+#include "msm_bus_adhoc.h" -+#include -+ -+enum msm_bus_bimc_slave_block { -+ SLAVE_BLOCK_RESERVED = 0, -+ SLAVE_BLOCK_SLAVE_WAY, -+ SLAVE_BLOCK_XPU, -+ SLAVE_BLOCK_ARBITER, -+ SLAVE_BLOCK_SCMO, -+}; -+ -+enum bke_sw { -+ BKE_OFF = 0, -+ BKE_ON = 1, -+}; -+ -+/* M_Generic */ -+ -+#define M_REG_BASE(b) ((b) + 0x00008000) -+ -+#define M_COMPONENT_INFO_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000000) -+enum bimc_m_component_info { -+ M_COMPONENT_INFO_RMSK = 0xffffff, -+ M_COMPONENT_INFO_INSTANCE_BMSK = 0xff0000, -+ M_COMPONENT_INFO_INSTANCE_SHFT = 0x10, -+ M_COMPONENT_INFO_SUB_TYPE_BMSK = 0xff00, -+ M_COMPONENT_INFO_SUB_TYPE_SHFT = 0x8, -+ M_COMPONENT_INFO_TYPE_BMSK = 0xff, -+ M_COMPONENT_INFO_TYPE_SHFT = 0x0, -+}; -+ -+#define M_CONFIG_INFO_0_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000020) -+enum bimc_m_config_info_0 { -+ M_CONFIG_INFO_0_RMSK = 0xff00ffff, -+ M_CONFIG_INFO_0_SYNC_MODE_BMSK = 0xff000000, -+ M_CONFIG_INFO_0_SYNC_MODE_SHFT = 0x18, -+ M_CONFIG_INFO_0_CONNECTION_TYPE_BMSK = 0xff00, -+ M_CONFIG_INFO_0_CONNECTION_TYPE_SHFT = 0x8, -+ M_CONFIG_INFO_0_FUNC_BMSK = 0xff, -+ M_CONFIG_INFO_0_FUNC_SHFT = 0x0, -+}; -+ -+#define M_CONFIG_INFO_1_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000030) -+enum bimc_m_config_info_1 { -+ M_CONFIG_INFO_1_RMSK = 0xffffffff, -+ M_CONFIG_INFO_1_SWAY_CONNECTIVITY_BMSK = 0xffffffff, -+ M_CONFIG_INFO_1_SWAY_CONNECTIVITY_SHFT = 0x0, -+}; -+ -+#define M_CONFIG_INFO_2_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000040) -+enum bimc_m_config_info_2 { -+ M_CONFIG_INFO_2_RMSK = 0xffffffff, -+ M_CONFIG_INFO_2_M_DATA_WIDTH_BMSK = 0xffff0000, -+ M_CONFIG_INFO_2_M_DATA_WIDTH_SHFT = 0x10, -+ M_CONFIG_INFO_2_M_TID_WIDTH_BMSK = 0xff00, -+ M_CONFIG_INFO_2_M_TID_WIDTH_SHFT = 0x8, -+ M_CONFIG_INFO_2_M_MID_WIDTH_BMSK = 0xff, -+ M_CONFIG_INFO_2_M_MID_WIDTH_SHFT = 0x0, -+}; -+ -+#define M_CONFIG_INFO_3_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000050) -+enum bimc_m_config_info_3 { -+ M_CONFIG_INFO_3_RMSK = 0xffffffff, -+ M_CONFIG_INFO_3_RCH_DEPTH_BMSK = 0xff000000, -+ M_CONFIG_INFO_3_RCH_DEPTH_SHFT = 0x18, -+ M_CONFIG_INFO_3_BCH_DEPTH_BMSK = 0xff0000, -+ M_CONFIG_INFO_3_BCH_DEPTH_SHFT = 0x10, -+ M_CONFIG_INFO_3_WCH_DEPTH_BMSK = 0xff00, -+ M_CONFIG_INFO_3_WCH_DEPTH_SHFT = 0x8, -+ M_CONFIG_INFO_3_ACH_DEPTH_BMSK = 0xff, -+ M_CONFIG_INFO_3_ACH_DEPTH_SHFT = 0x0, -+}; -+ -+#define M_CONFIG_INFO_4_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000060) -+enum bimc_m_config_info_4 { -+ M_CONFIG_INFO_4_RMSK = 0xffff, -+ M_CONFIG_INFO_4_REORDER_BUF_DEPTH_BMSK = 0xff00, -+ M_CONFIG_INFO_4_REORDER_BUF_DEPTH_SHFT = 0x8, -+ M_CONFIG_INFO_4_REORDER_TABLE_DEPTH_BMSK = 0xff, -+ M_CONFIG_INFO_4_REORDER_TABLE_DEPTH_SHFT = 0x0, -+}; -+ -+#define M_CONFIG_INFO_5_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000070) -+enum bimc_m_config_info_5 { -+ M_CONFIG_INFO_5_RMSK = 0x111, -+ M_CONFIG_INFO_5_MP2ARB_PIPELINE_EN_BMSK = 0x100, -+ M_CONFIG_INFO_5_MP2ARB_PIPELINE_EN_SHFT = 0x8, -+ M_CONFIG_INFO_5_MPBUF_PIPELINE_EN_BMSK = 0x10, -+ M_CONFIG_INFO_5_MPBUF_PIPELINE_EN_SHFT = 0x4, -+ M_CONFIG_INFO_5_M2MP_PIPELINE_EN_BMSK = 0x1, -+ M_CONFIG_INFO_5_M2MP_PIPELINE_EN_SHFT = 0x0, -+}; -+ -+#define M_INT_STATUS_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000100) -+enum bimc_m_int_status { -+ M_INT_STATUS_RMSK = 0x3, -+}; -+ -+#define M_INT_CLR_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000108) -+enum bimc_m_int_clr { -+ M_INT_CLR_RMSK = 0x3, -+}; -+ -+#define M_INT_EN_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x0000010c) -+enum bimc_m_int_en { -+ M_INT_EN_RMSK = 0x3, -+}; -+ -+#define M_CLK_CTRL_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000200) -+enum bimc_m_clk_ctrl { -+ M_CLK_CTRL_RMSK = 0x3, -+ M_CLK_CTRL_MAS_CLK_GATING_EN_BMSK = 0x2, -+ M_CLK_CTRL_MAS_CLK_GATING_EN_SHFT = 0x1, -+ M_CLK_CTRL_CORE_CLK_GATING_EN_BMSK = 0x1, -+ M_CLK_CTRL_CORE_CLK_GATING_EN_SHFT = 0x0, -+}; -+ -+#define M_MODE_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000210) -+enum bimc_m_mode { -+ M_MODE_RMSK = 0xf0000011, -+ M_MODE_WR_GATHER_BEATS_BMSK = 0xf0000000, -+ M_MODE_WR_GATHER_BEATS_SHFT = 0x1c, -+ M_MODE_NARROW_WR_BMSK = 0x10, -+ M_MODE_NARROW_WR_SHFT = 0x4, -+ M_MODE_ORDERING_MODEL_BMSK = 0x1, -+ M_MODE_ORDERING_MODEL_SHFT = 0x0, -+}; -+ -+#define M_PRIOLVL_OVERRIDE_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000230) -+enum bimc_m_priolvl_override { -+ M_PRIOLVL_OVERRIDE_RMSK = 0x301, -+ M_PRIOLVL_OVERRIDE_BMSK = 0x300, -+ M_PRIOLVL_OVERRIDE_SHFT = 0x8, -+ M_PRIOLVL_OVERRIDE_OVERRIDE_PRIOLVL_BMSK = 0x1, -+ M_PRIOLVL_OVERRIDE_OVERRIDE_PRIOLVL_SHFT = 0x0, -+}; -+ -+#define M_RD_CMD_OVERRIDE_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000240) -+enum bimc_m_read_command_override { -+ M_RD_CMD_OVERRIDE_RMSK = 0x3071f7f, -+ M_RD_CMD_OVERRIDE_AREQPRIO_BMSK = 0x3000000, -+ M_RD_CMD_OVERRIDE_AREQPRIO_SHFT = 0x18, -+ M_RD_CMD_OVERRIDE_AMEMTYPE_BMSK = 0x70000, -+ M_RD_CMD_OVERRIDE_AMEMTYPE_SHFT = 0x10, -+ M_RD_CMD_OVERRIDE_ATRANSIENT_BMSK = 0x1000, -+ M_RD_CMD_OVERRIDE_ATRANSIENT_SHFT = 0xc, -+ M_RD_CMD_OVERRIDE_ASHARED_BMSK = 0x800, -+ M_RD_CMD_OVERRIDE_ASHARED_SHFT = 0xb, -+ M_RD_CMD_OVERRIDE_AREDIRECT_BMSK = 0x400, -+ M_RD_CMD_OVERRIDE_AREDIRECT_SHFT = 0xa, -+ M_RD_CMD_OVERRIDE_AOOO_BMSK = 0x200, -+ M_RD_CMD_OVERRIDE_AOOO_SHFT = 0x9, -+ M_RD_CMD_OVERRIDE_AINNERSHARED_BMSK = 0x100, -+ M_RD_CMD_OVERRIDE_AINNERSHARED_SHFT = 0x8, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AREQPRIO_BMSK = 0x40, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AREQPRIO_SHFT = 0x6, -+ M_RD_CMD_OVERRIDE_OVERRIDE_ATRANSIENT_BMSK = 0x20, -+ M_RD_CMD_OVERRIDE_OVERRIDE_ATRANSIENT_SHFT = 0x5, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AMEMTYPE_BMSK = 0x10, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AMEMTYPE_SHFT = 0x4, -+ M_RD_CMD_OVERRIDE_OVERRIDE_ASHARED_BMSK = 0x8, -+ M_RD_CMD_OVERRIDE_OVERRIDE_ASHARED_SHFT = 0x3, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AREDIRECT_BMSK = 0x4, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AREDIRECT_SHFT = 0x2, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AOOO_BMSK = 0x2, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AOOO_SHFT = 0x1, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AINNERSHARED_BMSK = 0x1, -+ M_RD_CMD_OVERRIDE_OVERRIDE_AINNERSHARED_SHFT = 0x0, -+}; -+ -+#define M_WR_CMD_OVERRIDE_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000250) -+enum bimc_m_write_command_override { -+ M_WR_CMD_OVERRIDE_RMSK = 0x3071f7f, -+ M_WR_CMD_OVERRIDE_AREQPRIO_BMSK = 0x3000000, -+ M_WR_CMD_OVERRIDE_AREQPRIO_SHFT = 0x18, -+ M_WR_CMD_OVERRIDE_AMEMTYPE_BMSK = 0x70000, -+ M_WR_CMD_OVERRIDE_AMEMTYPE_SHFT = 0x10, -+ M_WR_CMD_OVERRIDE_ATRANSIENT_BMSK = 0x1000, -+ M_WR_CMD_OVERRIDE_ATRANSIENT_SHFT = 0xc, -+ M_WR_CMD_OVERRIDE_ASHARED_BMSK = 0x800, -+ M_WR_CMD_OVERRIDE_ASHARED_SHFT = 0xb, -+ M_WR_CMD_OVERRIDE_AREDIRECT_BMSK = 0x400, -+ M_WR_CMD_OVERRIDE_AREDIRECT_SHFT = 0xa, -+ M_WR_CMD_OVERRIDE_AOOO_BMSK = 0x200, -+ M_WR_CMD_OVERRIDE_AOOO_SHFT = 0x9, -+ M_WR_CMD_OVERRIDE_AINNERSHARED_BMSK = 0x100, -+ M_WR_CMD_OVERRIDE_AINNERSHARED_SHFT = 0x8, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AREQPRIO_BMSK = 0x40, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AREQPRIO_SHFT = 0x6, -+ M_WR_CMD_OVERRIDE_OVERRIDE_ATRANSIENT_BMSK = 0x20, -+ M_WR_CMD_OVERRIDE_OVERRIDE_ATRANSIENT_SHFT = 0x5, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AMEMTYPE_BMSK = 0x10, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AMEMTYPE_SHFT = 0x4, -+ M_WR_CMD_OVERRIDE_OVERRIDE_ASHARED_BMSK = 0x8, -+ M_WR_CMD_OVERRIDE_OVERRIDE_ASHARED_SHFT = 0x3, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AREDIRECT_BMSK = 0x4, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AREDIRECT_SHFT = 0x2, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AOOO_BMSK = 0x2, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AOOO_SHFT = 0x1, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AINNERSHARED_BMSK = 0x1, -+ M_WR_CMD_OVERRIDE_OVERRIDE_AINNERSHARED_SHFT = 0x0, -+}; -+ -+#define M_BKE_EN_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000300) -+enum bimc_m_bke_en { -+ M_BKE_EN_RMSK = 0x1, -+ M_BKE_EN_EN_BMSK = 0x1, -+ M_BKE_EN_EN_SHFT = 0x0, -+}; -+ -+/* Grant Period registers */ -+#define M_BKE_GP_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000304) -+enum bimc_m_bke_grant_period { -+ M_BKE_GP_RMSK = 0x3ff, -+ M_BKE_GP_GP_BMSK = 0x3ff, -+ M_BKE_GP_GP_SHFT = 0x0, -+}; -+ -+/* Grant count register. -+ * The Grant count register represents a signed 16 bit -+ * value, range 0-0x7fff -+ */ -+#define M_BKE_GC_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000308) -+enum bimc_m_bke_grant_count { -+ M_BKE_GC_RMSK = 0xffff, -+ M_BKE_GC_GC_BMSK = 0xffff, -+ M_BKE_GC_GC_SHFT = 0x0, -+}; -+ -+/* Threshold High Registers */ -+#define M_BKE_THH_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000320) -+enum bimc_m_bke_thresh_high { -+ M_BKE_THH_RMSK = 0xffff, -+ M_BKE_THH_THRESH_BMSK = 0xffff, -+ M_BKE_THH_THRESH_SHFT = 0x0, -+}; -+ -+/* Threshold Medium Registers */ -+#define M_BKE_THM_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000324) -+enum bimc_m_bke_thresh_medium { -+ M_BKE_THM_RMSK = 0xffff, -+ M_BKE_THM_THRESH_BMSK = 0xffff, -+ M_BKE_THM_THRESH_SHFT = 0x0, -+}; -+ -+/* Threshold Low Registers */ -+#define M_BKE_THL_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000328) -+enum bimc_m_bke_thresh_low { -+ M_BKE_THL_RMSK = 0xffff, -+ M_BKE_THL_THRESH_BMSK = 0xffff, -+ M_BKE_THL_THRESH_SHFT = 0x0, -+}; -+ -+#define M_BKE_HEALTH_0_CONFIG_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000340) -+enum bimc_m_bke_health_0 { -+ M_BKE_HEALTH_0_CONFIG_RMSK = 0x80000303, -+ M_BKE_HEALTH_0_CONFIG_LIMIT_CMDS_BMSK = 0x80000000, -+ M_BKE_HEALTH_0_CONFIG_LIMIT_CMDS_SHFT = 0x1f, -+ M_BKE_HEALTH_0_CONFIG_AREQPRIO_BMSK = 0x300, -+ M_BKE_HEALTH_0_CONFIG_AREQPRIO_SHFT = 0x8, -+ M_BKE_HEALTH_0_CONFIG_PRIOLVL_BMSK = 0x3, -+ M_BKE_HEALTH_0_CONFIG_PRIOLVL_SHFT = 0x0, -+}; -+ -+#define M_BKE_HEALTH_1_CONFIG_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000344) -+enum bimc_m_bke_health_1 { -+ M_BKE_HEALTH_1_CONFIG_RMSK = 0x80000303, -+ M_BKE_HEALTH_1_CONFIG_LIMIT_CMDS_BMSK = 0x80000000, -+ M_BKE_HEALTH_1_CONFIG_LIMIT_CMDS_SHFT = 0x1f, -+ M_BKE_HEALTH_1_CONFIG_AREQPRIO_BMSK = 0x300, -+ M_BKE_HEALTH_1_CONFIG_AREQPRIO_SHFT = 0x8, -+ M_BKE_HEALTH_1_CONFIG_PRIOLVL_BMSK = 0x3, -+ M_BKE_HEALTH_1_CONFIG_PRIOLVL_SHFT = 0x0, -+}; -+ -+#define M_BKE_HEALTH_2_CONFIG_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000348) -+enum bimc_m_bke_health_2 { -+ M_BKE_HEALTH_2_CONFIG_RMSK = 0x80000303, -+ M_BKE_HEALTH_2_CONFIG_LIMIT_CMDS_BMSK = 0x80000000, -+ M_BKE_HEALTH_2_CONFIG_LIMIT_CMDS_SHFT = 0x1f, -+ M_BKE_HEALTH_2_CONFIG_AREQPRIO_BMSK = 0x300, -+ M_BKE_HEALTH_2_CONFIG_AREQPRIO_SHFT = 0x8, -+ M_BKE_HEALTH_2_CONFIG_PRIOLVL_BMSK = 0x3, -+ M_BKE_HEALTH_2_CONFIG_PRIOLVL_SHFT = 0x0, -+}; -+ -+#define M_BKE_HEALTH_3_CONFIG_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x0000034c) -+enum bimc_m_bke_health_3 { -+ M_BKE_HEALTH_3_CONFIG_RMSK = 0x303, -+ M_BKE_HEALTH_3_CONFIG_AREQPRIO_BMSK = 0x300, -+ M_BKE_HEALTH_3_CONFIG_AREQPRIO_SHFT = 0x8, -+ M_BKE_HEALTH_3_CONFIG_PRIOLVL_BMSK = 0x3, -+ M_BKE_HEALTH_3_CONFIG_PRIOLVL_SHFT = 0x0, -+}; -+ -+#define M_BUF_STATUS_ADDR(b, n) \ -+ (M_REG_BASE(b) + (0x4000 * (n)) + 0x00000400) -+enum bimc_m_buf_status { -+ M_BUF_STATUS_RMSK = 0xf03f030, -+ M_BUF_STATUS_RCH_DATA_WR_FULL_BMSK = 0x8000000, -+ M_BUF_STATUS_RCH_DATA_WR_FULL_SHFT = 0x1b, -+ M_BUF_STATUS_RCH_DATA_WR_EMPTY_BMSK = 0x4000000, -+ M_BUF_STATUS_RCH_DATA_WR_EMPTY_SHFT = 0x1a, -+ M_BUF_STATUS_RCH_CTRL_WR_FULL_BMSK = 0x2000000, -+ M_BUF_STATUS_RCH_CTRL_WR_FULL_SHFT = 0x19, -+ M_BUF_STATUS_RCH_CTRL_WR_EMPTY_BMSK = 0x1000000, -+ M_BUF_STATUS_RCH_CTRL_WR_EMPTY_SHFT = 0x18, -+ M_BUF_STATUS_BCH_WR_FULL_BMSK = 0x20000, -+ M_BUF_STATUS_BCH_WR_FULL_SHFT = 0x11, -+ M_BUF_STATUS_BCH_WR_EMPTY_BMSK = 0x10000, -+ M_BUF_STATUS_BCH_WR_EMPTY_SHFT = 0x10, -+ M_BUF_STATUS_WCH_DATA_RD_FULL_BMSK = 0x8000, -+ M_BUF_STATUS_WCH_DATA_RD_FULL_SHFT = 0xf, -+ M_BUF_STATUS_WCH_DATA_RD_EMPTY_BMSK = 0x4000, -+ M_BUF_STATUS_WCH_DATA_RD_EMPTY_SHFT = 0xe, -+ M_BUF_STATUS_WCH_CTRL_RD_FULL_BMSK = 0x2000, -+ M_BUF_STATUS_WCH_CTRL_RD_FULL_SHFT = 0xd, -+ M_BUF_STATUS_WCH_CTRL_RD_EMPTY_BMSK = 0x1000, -+ M_BUF_STATUS_WCH_CTRL_RD_EMPTY_SHFT = 0xc, -+ M_BUF_STATUS_ACH_RD_FULL_BMSK = 0x20, -+ M_BUF_STATUS_ACH_RD_FULL_SHFT = 0x5, -+ M_BUF_STATUS_ACH_RD_EMPTY_BMSK = 0x10, -+ M_BUF_STATUS_ACH_RD_EMPTY_SHFT = 0x4, -+}; -+/*BIMC Generic */ -+ -+#define S_REG_BASE(b) ((b) + 0x00048000) -+ -+#define S_COMPONENT_INFO_ADDR(b, n) \ -+ (S_REG_BASE(b) + (0x8000 * (n)) + 0x00000000) -+enum bimc_s_component_info { -+ S_COMPONENT_INFO_RMSK = 0xffffff, -+ S_COMPONENT_INFO_INSTANCE_BMSK = 0xff0000, -+ S_COMPONENT_INFO_INSTANCE_SHFT = 0x10, -+ S_COMPONENT_INFO_SUB_TYPE_BMSK = 0xff00, -+ S_COMPONENT_INFO_SUB_TYPE_SHFT = 0x8, -+ S_COMPONENT_INFO_TYPE_BMSK = 0xff, -+ S_COMPONENT_INFO_TYPE_SHFT = 0x0, -+}; -+ -+#define S_HW_INFO_ADDR(b, n) \ -+ (S_REG_BASE(b) + (0x80000 * (n)) + 0x00000010) -+enum bimc_s_hw_info { -+ S_HW_INFO_RMSK = 0xffffffff, -+ S_HW_INFO_MAJOR_BMSK = 0xff000000, -+ S_HW_INFO_MAJOR_SHFT = 0x18, -+ S_HW_INFO_BRANCH_BMSK = 0xff0000, -+ S_HW_INFO_BRANCH_SHFT = 0x10, -+ S_HW_INFO_MINOR_BMSK = 0xff00, -+ S_HW_INFO_MINOR_SHFT = 0x8, -+ S_HW_INFO_ECO_BMSK = 0xff, -+ S_HW_INFO_ECO_SHFT = 0x0, -+}; -+ -+ -+/* S_SCMO_GENERIC */ -+ -+#define S_SCMO_REG_BASE(b) ((b) + 0x00048000) -+ -+#define S_SCMO_CONFIG_INFO_0_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000020) -+enum bimc_s_scmo_config_info_0 { -+ S_SCMO_CONFIG_INFO_0_RMSK = 0xffffffff, -+ S_SCMO_CONFIG_INFO_0_DATA_WIDTH_BMSK = 0xffff0000, -+ S_SCMO_CONFIG_INFO_0_DATA_WIDTH_SHFT = 0x10, -+ S_SCMO_CONFIG_INFO_0_TID_WIDTH_BMSK = 0xff00, -+ S_SCMO_CONFIG_INFO_0_TID_WIDTH_SHFT = 0x8, -+ S_SCMO_CONFIG_INFO_0_MID_WIDTH_BMSK = 0xff, -+ S_SCMO_CONFIG_INFO_0_MID_WIDTH_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CONFIG_INFO_1_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000030) -+enum bimc_s_scmo_config_info_1 { -+ S_SCMO_CONFIG_INFO_1_RMSK = 0xffffffff, -+ S_SCMO_CONFIG_INFO_1_MPORT_CONNECTIVITY_BMSK = 0xffffffff, -+ S_SCMO_CONFIG_INFO_1_MPORT_CONNECTIVITY_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CONFIG_INFO_2_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000040) -+enum bimc_s_scmo_config_info_2 { -+ S_SCMO_CONFIG_INFO_2_RMSK = 0xff00ff, -+ S_SCMO_CONFIG_INFO_2_NUM_GLOBAL_MONS_BMSK = 0xff0000, -+ S_SCMO_CONFIG_INFO_2_NUM_GLOBAL_MONS_SHFT = 0x10, -+ S_SCMO_CONFIG_INFO_2_VMID_WIDTH_BMSK = 0xff, -+ S_SCMO_CONFIG_INFO_2_VMID_WIDTH_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CONFIG_INFO_3_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000050) -+enum bimc_s_scmo_config_info_3 { -+ S_SCMO_CONFIG_INFO_3_RMSK = 0xffffffff, -+ S_SCMO_CONFIG_INFO_3_RCH0_CTRL_DEPTH_BMSK = 0xff000000, -+ S_SCMO_CONFIG_INFO_3_RCH0_CTRL_DEPTH_SHFT = 0x18, -+ S_SCMO_CONFIG_INFO_3_RCH0_DEPTH_BMSK = 0xff0000, -+ S_SCMO_CONFIG_INFO_3_RCH0_DEPTH_SHFT = 0x10, -+ S_SCMO_CONFIG_INFO_3_BCH_DEPTH_BMSK = 0xff00, -+ S_SCMO_CONFIG_INFO_3_BCH_DEPTH_SHFT = 0x8, -+ S_SCMO_CONFIG_INFO_3_WCH_DEPTH_BMSK = 0xff, -+ S_SCMO_CONFIG_INFO_3_WCH_DEPTH_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CONFIG_INFO_4_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000060) -+enum bimc_s_scmo_config_info_4 { -+ S_SCMO_CONFIG_INFO_4_RMSK = 0xffff, -+ S_SCMO_CONFIG_INFO_4_RCH1_CTRL_DEPTH_BMSK = 0xff00, -+ S_SCMO_CONFIG_INFO_4_RCH1_CTRL_DEPTH_SHFT = 0x8, -+ S_SCMO_CONFIG_INFO_4_RCH1_DEPTH_BMSK = 0xff, -+ S_SCMO_CONFIG_INFO_4_RCH1_DEPTH_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CONFIG_INFO_5_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000070) -+enum bimc_s_scmo_config_info_5 { -+ S_SCMO_CONFIG_INFO_5_RMSK = 0xffff, -+ S_SCMO_CONFIG_INFO_5_DPE_CQ_DEPTH_BMSK = 0xff00, -+ S_SCMO_CONFIG_INFO_5_DPE_CQ_DEPTH_SHFT = 0x8, -+ S_SCMO_CONFIG_INFO_5_DDR_BUS_WIDTH_BMSK = 0xff, -+ S_SCMO_CONFIG_INFO_5_DDR_BUS_WIDTH_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CONFIG_INFO_6_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000080) -+enum bimc_s_scmo_config_info_6 { -+ S_SCMO_CONFIG_INFO_6_RMSK = 0x1111, -+ S_SCMO_CONFIG_INFO_6_WBUFC_PIPE_BMSK = 0x1000, -+ S_SCMO_CONFIG_INFO_6_WBUFC_PIPE_SHFT = 0xc, -+ S_SCMO_CONFIG_INFO_6_RDOPT_PIPE_BMSK = 0x100, -+ S_SCMO_CONFIG_INFO_6_RDOPT_PIPE_SHFT = 0x8, -+ S_SCMO_CONFIG_INFO_6_ACHAN_INTF_PIPE_BMSK = 0x10, -+ S_SCMO_CONFIG_INFO_6_ACHAN_INTF_PIPE_SHFT = 0x4, -+ S_SCMO_CONFIG_INFO_6_ADDR_DECODE_HT_BMSK = 0x1, -+ S_SCMO_CONFIG_INFO_6_ADDR_DECODE_HT_SHFT = 0x0, -+}; -+ -+#define S_SCMO_INT_STATUS_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000100) -+enum bimc_s_scmo_int_status { -+ S_SCMO_INT_STATUS_RMSK = 0x1, -+ S_SCMO_INT_STATUS_ERR_OCCURED_BMSK = 0x1, -+ S_SCMO_INT_STATUS_ERR_OCCURED_SHFT = 0x0, -+}; -+ -+#define S_SCMO_INT_CLR_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000108) -+enum bimc_s_scmo_int_clr { -+ S_SCMO_INT_CLR_RMSK = 0x1, -+ S_SCMO_INT_CLR_IRQ_CLR_BMSK = 0x1, -+ S_SCMO_INT_CLR_IRQ_CLR_SHFT = 0x0, -+}; -+ -+#define S_SCMO_INT_EN_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x0000010c) -+enum bimc_s_scmo_int_en { -+ S_SCMO_INT_EN_RMSK = 0x1, -+ S_SCMO_INT_EN_IRQ_EN_BMSK = 0x1, -+ S_SCMO_INT_EN_IRQ_EN_SHFT = 0x0, -+}; -+ -+#define S_SCMO_ESYN_ADDR_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000120) -+enum bimc_s_scmo_esyn_addr { -+ S_SCMO_ESYN_ADDR_RMSK = 0xffffffff, -+ S_SCMO_ESYN_ADDR_ESYN_ADDR_ERR_ADDR_BMSK = 0xffffffff, -+ S_SCMO_ESYN_ADDR_ESYN_ADDR_ERR_ADDR_SHFT = 0x0, -+}; -+ -+#define S_SCMO_ESYN_APACKET_0_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000128) -+enum bimc_s_scmo_esyn_apacket_0 { -+ S_SCMO_ESYN_APACKET_0_RMSK = 0xff1fffff, -+ S_SCMO_ESYN_APACKET_0_ERR_ATID_BMSK = 0xff000000, -+ S_SCMO_ESYN_APACKET_0_ERR_ATID_SHFT = 0x18, -+ S_SCMO_ESYN_APACKET_0_ERR_AVMID_BMSK = 0x1f0000, -+ S_SCMO_ESYN_APACKET_0_ERR_AVMID_SHFT = 0x10, -+ S_SCMO_ESYN_APACKET_0_ERR_AMID_BMSK = 0xffff, -+ S_SCMO_ESYN_APACKET_0_ERR_AMID_SHFT = 0x0, -+}; -+ -+#define S_SCMO_ESYN_APACKET_1_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x0000012c) -+enum bimc_s_scmo_esyn_apacket_1 { -+ S_SCMO_ESYN_APACKET_1_RMSK = 0x10ff117, -+ S_SCMO_ESYN_APACKET_1_ERR_CODE_BMSK = 0x1000000, -+ S_SCMO_ESYN_APACKET_1_ERR_CODE_SHFT = 0x18, -+ S_SCMO_ESYN_APACKET_1_ERR_ALEN_BMSK = 0xf0000, -+ S_SCMO_ESYN_APACKET_1_ERR_ALEN_SHFT = 0x10, -+ S_SCMO_ESYN_APACKET_1_ERR_ASIZE_BMSK = 0xe000, -+ S_SCMO_ESYN_APACKET_1_ERR_ASIZE_SHFT = 0xd, -+ S_SCMO_ESYN_APACKET_1_ERR_ABURST_BMSK = 0x1000, -+ S_SCMO_ESYN_APACKET_1_ERR_ABURST_SHFT = 0xc, -+ S_SCMO_ESYN_APACKET_1_ERR_AEXCLUSIVE_BMSK = 0x100, -+ S_SCMO_ESYN_APACKET_1_ERR_AEXCLUSIVE_SHFT = 0x8, -+ S_SCMO_ESYN_APACKET_1_ERR_APRONTS_BMSK = 0x10, -+ S_SCMO_ESYN_APACKET_1_ERR_APRONTS_SHFT = 0x4, -+ S_SCMO_ESYN_APACKET_1_ERR_AOOORD_BMSK = 0x4, -+ S_SCMO_ESYN_APACKET_1_ERR_AOOORD_SHFT = 0x2, -+ S_SCMO_ESYN_APACKET_1_ERR_AOOOWR_BMSK = 0x2, -+ S_SCMO_ESYN_APACKET_1_ERR_AOOOWR_SHFT = 0x1, -+ S_SCMO_ESYN_APACKET_1_ERR_AWRITE_BMSK = 0x1, -+ S_SCMO_ESYN_APACKET_1_ERR_AWRITE_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CLK_CTRL_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000200) -+enum bimc_s_scmo_clk_ctrl { -+ S_SCMO_CLK_CTRL_RMSK = 0xffff1111, -+ S_SCMO_CLK_CTRL_PEN_CMD_CG_EN_BMSK = 0x10000, -+ S_SCMO_CLK_CTRL_PEN_CMD_CG_EN_SHFT = 0x10, -+ S_SCMO_CLK_CTRL_RCH_CG_EN_BMSK = 0x1000, -+ S_SCMO_CLK_CTRL_RCH_CG_EN_SHFT = 0xc, -+ S_SCMO_CLK_CTRL_FLUSH_CG_EN_BMSK = 0x100, -+ S_SCMO_CLK_CTRL_FLUSH_CG_EN_SHFT = 0x8, -+ S_SCMO_CLK_CTRL_WCH_CG_EN_BMSK = 0x10, -+ S_SCMO_CLK_CTRL_WCH_CG_EN_SHFT = 0x4, -+ S_SCMO_CLK_CTRL_ACH_CG_EN_BMSK = 0x1, -+ S_SCMO_CLK_CTRL_ACH_CG_EN_SHFT = 0x0, -+}; -+ -+#define S_SCMO_SLV_INTERLEAVE_CFG_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000400) -+enum bimc_s_scmo_slv_interleave_cfg { -+ S_SCMO_SLV_INTERLEAVE_CFG_RMSK = 0xff, -+ S_SCMO_SLV_INTERLEAVE_CFG_INTERLEAVE_CS1_BMSK = 0x10, -+ S_SCMO_SLV_INTERLEAVE_CFG_INTERLEAVE_CS1_SHFT = 0x4, -+ S_SCMO_SLV_INTERLEAVE_CFG_INTERLEAVE_CS0_BMSK = 0x1, -+ S_SCMO_SLV_INTERLEAVE_CFG_INTERLEAVE_CS0_SHFT = 0x0, -+}; -+ -+#define S_SCMO_ADDR_BASE_CSn_ADDR(b, n, o) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000410 + 0x4 * (o)) -+enum bimc_s_scmo_addr_base_csn { -+ S_SCMO_ADDR_BASE_CSn_RMSK = 0xffff, -+ S_SCMO_ADDR_BASE_CSn_MAXn = 1, -+ S_SCMO_ADDR_BASE_CSn_ADDR_BASE_BMSK = 0xfc, -+ S_SCMO_ADDR_BASE_CSn_ADDR_BASE_SHFT = 0x2, -+}; -+ -+#define S_SCMO_ADDR_MAP_CSn_ADDR(b, n, o) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000420 + 0x4 * (o)) -+enum bimc_s_scmo_addr_map_csn { -+ S_SCMO_ADDR_MAP_CSn_RMSK = 0xffff, -+ S_SCMO_ADDR_MAP_CSn_MAXn = 1, -+ S_SCMO_ADDR_MAP_CSn_RANK_EN_BMSK = 0x8000, -+ S_SCMO_ADDR_MAP_CSn_RANK_EN_SHFT = 0xf, -+ S_SCMO_ADDR_MAP_CSn_ADDR_MODE_BMSK = 0x1000, -+ S_SCMO_ADDR_MAP_CSn_ADDR_MODE_SHFT = 0xc, -+ S_SCMO_ADDR_MAP_CSn_BANK_SIZE_BMSK = 0x100, -+ S_SCMO_ADDR_MAP_CSn_BANK_SIZE_SHFT = 0x8, -+ S_SCMO_ADDR_MAP_CSn_ROW_SIZE_BMSK = 0x30, -+ S_SCMO_ADDR_MAP_CSn_ROW_SIZE_SHFT = 0x4, -+ S_SCMO_ADDR_MAP_CSn_COL_SIZE_BMSK = 0x3, -+ S_SCMO_ADDR_MAP_CSn_COL_SIZE_SHFT = 0x0, -+}; -+ -+#define S_SCMO_ADDR_MASK_CSn_ADDR(b, n, o) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000430 + 0x4 * (0)) -+enum bimc_s_scmo_addr_mask_csn { -+ S_SCMO_ADDR_MASK_CSn_RMSK = 0xffff, -+ S_SCMO_ADDR_MASK_CSn_MAXn = 1, -+ S_SCMO_ADDR_MASK_CSn_ADDR_MASK_BMSK = 0xfc, -+ S_SCMO_ADDR_MASK_CSn_ADDR_MASK_SHFT = 0x2, -+}; -+ -+#define S_SCMO_SLV_STATUS_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000450) -+enum bimc_s_scmo_slv_status { -+ S_SCMO_SLV_STATUS_RMSK = 0xff3, -+ S_SCMO_SLV_STATUS_GLOBAL_MONS_IN_USE_BMSK = 0xff0, -+ S_SCMO_SLV_STATUS_GLOBAL_MONS_IN_USE_SHFT = 0x4, -+ S_SCMO_SLV_STATUS_SLAVE_IDLE_BMSK = 0x3, -+ S_SCMO_SLV_STATUS_SLAVE_IDLE_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CMD_BUF_CFG_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000500) -+enum bimc_s_scmo_cmd_buf_cfg { -+ S_SCMO_CMD_BUF_CFG_RMSK = 0xf1f, -+ S_SCMO_CMD_BUF_CFG_CMD_ORDERING_BMSK = 0x300, -+ S_SCMO_CMD_BUF_CFG_CMD_ORDERING_SHFT = 0x8, -+ S_SCMO_CMD_BUF_CFG_HP_CMD_AREQPRIO_MAP_BMSK = 0x10, -+ S_SCMO_CMD_BUF_CFG_HP_CMD_AREQPRIO_MAP_SHFT = 0x4, -+ S_SCMO_CMD_BUF_CFG_HP_CMD_Q_DEPTH_BMSK = 0x7, -+ S_SCMO_CMD_BUF_CFG_HP_CMD_Q_DEPTH_SHFT = 0x0, -+}; -+ -+#define S_SCM_CMD_BUF_STATUS_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000520) -+enum bimc_s_scm_cmd_buf_status { -+ S_SCMO_CMD_BUF_STATUS_RMSK = 0x77, -+ S_SCMO_CMD_BUF_STATUS_HP_CMD_BUF_ENTRIES_IN_USE_BMSK = 0x70, -+ S_SCMO_CMD_BUF_STATUS_HP_CMD_BUF_ENTRIES_IN_USE_SHFT = 0x4, -+ S_SCMO_CMD_BUF_STATUS_LP_CMD_BUF_ENTRIES_IN_USE_BMSK = 0x7, -+ S_SCMO_CMD_BUF_STATUS_LP_CMD_BUF_ENTRIES_IN_USE_SHFT = 0x0, -+}; -+ -+#define S_SCMO_RCH_SEL_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000540) -+enum bimc_s_scmo_rch_sel { -+ S_SCMO_RCH_SEL_RMSK = 0xffffffff, -+ S_SCMO_CMD_BUF_STATUS_RCH_PORTS_BMSK = 0xffffffff, -+ S_SCMO_CMD_BUF_STATUS_RCH_PORTS_SHFT = 0x0, -+}; -+ -+#define S_SCMO_RCH_BKPR_CFG_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000544) -+enum bimc_s_scmo_rch_bkpr_cfg { -+ S_SCMO_RCH_BKPR_CFG_RMSK = 0xffffffff, -+ S_SCMO_RCH_BKPR_CFG_RCH1_FIFO_BKPR_HI_TH_BMSK = 0x3f000000, -+ S_SCMO_RCH_BKPR_CFG_RCH1_FIFO_BKPR_HI_TH_SHFT = 0x18, -+ S_SCMO_RCH_BKPR_CFG_RCH1_FIFO_BKPR_LO_TH_BMSK = 0x3f0000, -+ S_SCMO_RCH_BKPR_CFG_RCH1_FIFO_BKPR_LO_TH_SHFT = 0x10, -+ S_SCMO_RCH_BKPR_CFG_RCH0_FIFO_BKPR_HI_TH_BMSK = 0x3f00, -+ S_SCMO_RCH_BKPR_CFG_RCH0_FIFO_BKPR_HI_TH_SHFT = 0x8, -+ S_SCMO_RCH_BKPR_CFG_RCH0_FIFO_BKPR_LO_TH_BMSK = 0x3f, -+ S_SCMO_RCH_BKPR_CFG_RCH0_FIFO_BKPR_LO_TH_SHFT = 0x0, -+}; -+ -+#define S_SCMO_RCH_STATUS_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000560) -+enum bimc_s_scmo_rch_status { -+ S_SCMO_RCH_STATUS_RMSK = 0x33333, -+ S_SCMO_RCH_STATUS_PRQ_FIFO_FULL_BMSK = 0x20000, -+ S_SCMO_RCH_STATUS_PRQ_FIFO_FULL_SHFT = 0x11, -+ S_SCMO_RCH_STATUS_PRQ_FIFO_EMPTY_BMSK = 0x10000, -+ S_SCMO_RCH_STATUS_PRQ_FIFO_EMPTY_SHFT = 0x10, -+ S_SCMO_RCH_STATUS_RCH1_QUAL_FIFO_FULL_BMSK = 0x2000, -+ S_SCMO_RCH_STATUS_RCH1_QUAL_FIFO_FULL_SHFT = 0xd, -+ S_SCMO_RCH_STATUS_RCH1_QUAL_FIFO_EMPTY_BMSK = 0x1000, -+ S_SCMO_RCH_STATUS_RCH1_QUAL_FIFO_EMPTY_SHFT = 0xc, -+ S_SCMO_RCH_STATUS_RCH1_DATA_FIFO_FULL_BMSK = 0x200, -+ S_SCMO_RCH_STATUS_RCH1_DATA_FIFO_FULL_SHFT = 0x9, -+ S_SCMO_RCH_STATUS_RCH1_DATA_FIFO_EMPTY_BMSK = 0x100, -+ S_SCMO_RCH_STATUS_RCH1_DATA_FIFO_EMPTY_SHFT = 0x8, -+ S_SCMO_RCH_STATUS_RCH0_QUAL_FIFO_FULL_BMSK = 0x20, -+ S_SCMO_RCH_STATUS_RCH0_QUAL_FIFO_FULL_SHFT = 0x5, -+ S_SCMO_RCH_STATUS_RCH0_QUAL_FIFO_EMPTY_BMSK = 0x10, -+ S_SCMO_RCH_STATUS_RCH0_QUAL_FIFO_EMPTY_SHFT = 0x4, -+ S_SCMO_RCH_STATUS_RCH0_DATA_FIFO_FULL_BMSK = 0x2, -+ S_SCMO_RCH_STATUS_RCH0_DATA_FIFO_FULL_SHFT = 0x1, -+ S_SCMO_RCH_STATUS_RCH0_DATA_FIFO_EMPTY_BMSK = 0x1, -+ S_SCMO_RCH_STATUS_RCH0_DATA_FIFO_EMPTY_SHFT = 0x0, -+}; -+ -+#define S_SCMO_WCH_BUF_CFG_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000580) -+enum bimc_s_scmo_wch_buf_cfg { -+ S_SCMO_WCH_BUF_CFG_RMSK = 0xff, -+ S_SCMO_WCH_BUF_CFG_WRITE_BLOCK_READ_BMSK = 0x10, -+ S_SCMO_WCH_BUF_CFG_WRITE_BLOCK_READ_SHFT = 0x4, -+ S_SCMO_WCH_BUF_CFG_COALESCE_EN_BMSK = 0x1, -+ S_SCMO_WCH_BUF_CFG_COALESCE_EN_SHFT = 0x0, -+}; -+ -+#define S_SCMO_WCH_STATUS_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x000005a0) -+enum bimc_s_scmo_wch_status { -+ S_SCMO_WCH_STATUS_RMSK = 0x333, -+ S_SCMO_WCH_STATUS_BRESP_FIFO_FULL_BMSK = 0x200, -+ S_SCMO_WCH_STATUS_BRESP_FIFO_FULL_SHFT = 0x9, -+ S_SCMO_WCH_STATUS_BRESP_FIFO_EMPTY_BMSK = 0x100, -+ S_SCMO_WCH_STATUS_BRESP_FIFO_EMPTY_SHFT = 0x8, -+ S_SCMO_WCH_STATUS_WDATA_FIFO_FULL_BMSK = 0x20, -+ S_SCMO_WCH_STATUS_WDATA_FIFO_FULL_SHFT = 0x5, -+ S_SCMO_WCH_STATUS_WDATA_FIFO_EMPTY_BMSK = 0x10, -+ S_SCMO_WCH_STATUS_WDATA_FIFO_EMPTY_SHFT = 0x4, -+ S_SCMO_WCH_STATUS_WBUF_FULL_BMSK = 0x2, -+ S_SCMO_WCH_STATUS_WBUF_FULL_SHFT = 0x1, -+ S_SCMO_WCH_STATUS_WBUF_EMPTY_BMSK = 0x1, -+ S_SCMO_WCH_STATUS_WBUF_EMPTY_SHFT = 0x0, -+}; -+ -+#define S_SCMO_FLUSH_CFG_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x000005c0) -+enum bimc_s_scmo_flush_cfg { -+ S_SCMO_FLUSH_CFG_RMSK = 0xffffffff, -+ S_SCMO_FLUSH_CFG_FLUSH_IN_ORDER_BMSK = 0x10000000, -+ S_SCMO_FLUSH_CFG_FLUSH_IN_ORDER_SHFT = 0x1c, -+ S_SCMO_FLUSH_CFG_FLUSH_IDLE_DELAY_BMSK = 0x3ff0000, -+ S_SCMO_FLUSH_CFG_FLUSH_IDLE_DELAY_SHFT = 0x10, -+ S_SCMO_FLUSH_CFG_FLUSH_UPPER_LIMIT_BMSK = 0xf00, -+ S_SCMO_FLUSH_CFG_FLUSH_UPPER_LIMIT_SHFT = 0x8, -+ S_SCMO_FLUSH_CFG_FLUSH_LOWER_LIMIT_BMSK = 0xf, -+ S_SCMO_FLUSH_CFG_FLUSH_LOWER_LIMIT_SHFT = 0x0, -+}; -+ -+#define S_SCMO_FLUSH_CMD_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x000005c4) -+enum bimc_s_scmo_flush_cmd { -+ S_SCMO_FLUSH_CMD_RMSK = 0xf, -+ S_SCMO_FLUSH_CMD_FLUSH_ALL_BUF_BMSK = 0x3, -+ S_SCMO_FLUSH_CMD_FLUSH_ALL_BUF_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CMD_OPT_CFG0_ADDR(b, n) \ -+ (S_SCM0_REG_BASE(b) + (0x8000 * (n)) + 0x00000700) -+enum bimc_s_scmo_cmd_opt_cfg0 { -+ S_SCMO_CMD_OPT_CFG0_RMSK = 0xffffff, -+ S_SCMO_CMD_OPT_CFG0_IGNORE_BANK_UNAVL_BMSK = 0x100000, -+ S_SCMO_CMD_OPT_CFG0_IGNORE_BANK_UNAVL_SHFT = 0x14, -+ S_SCMO_CMD_OPT_CFG0_MASK_CMDOUT_PRI_BMSK = 0x10000, -+ S_SCMO_CMD_OPT_CFG0_MASK_CMDOUT_PRI_SHFT = 0x10, -+ S_SCMO_CMD_OPT_CFG0_DPE_CMD_REORDERING_BMSK = 0x1000, -+ S_SCMO_CMD_OPT_CFG0_DPE_CMD_REORDERING_SHFT = 0xc, -+ S_SCMO_CMD_OPT_CFG0_WR_OPT_EN_BMSK = 0x100, -+ S_SCMO_CMD_OPT_CFG0_WR_OPT_EN_SHFT = 0x8, -+ S_SCMO_CMD_OPT_CFG0_RD_OPT_EN_BMSK = 0x10, -+ S_SCMO_CMD_OPT_CFG0_RD_OPT_EN_SHFT = 0x4, -+ S_SCMO_CMD_OPT_CFG0_PAGE_MGMT_POLICY_BMSK = 0x1, -+ S_SCMO_CMD_OPT_CFG0_PAGE_MGMT_POLICY_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CMD_OPT_CFG1_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000704) -+enum bimc_s_scmo_cmd_opt_cfg1 { -+ S_SCMO_CMD_OPT_CFG1_RMSK = 0xffffffff, -+ S_SCMO_CMD_OPT_CFG1_HSTP_CMD_TIMEOUT_BMSK = 0x1f000000, -+ S_SCMO_CMD_OPT_CFG1_HSTP_CMD_TIMEOUT_SHFT = 0x18, -+ S_SCMO_CMD_OPT_CFG1_HP_CMD_TIMEOUT_BMSK = 0x1f0000, -+ S_SCMO_CMD_OPT_CFG1_HP_CMD_TIMEOUT_SHFT = 0x10, -+ S_SCMO_CMD_OPT_CFG1_MP_CMD_TIMEOUT_BMSK = 0x1f00, -+ S_SCMO_CMD_OPT_CFG1_MP_CMD_TIMEOUT_SHFT = 0x8, -+ S_SCMO_CMD_OPT_CFG1_LP_CMD_TIMEOUT_BMSK = 0x1f, -+ S_SCMO_CMD_OPT_CFG1_LP_CMD_TIMEOUT_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CMD_OPT_CFG2_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x00000708) -+enum bimc_s_scmo_cmd_opt_cfg2 { -+ S_SCMO_CMD_OPT_CFG2_RMSK = 0xff, -+ S_SCMO_CMD_OPT_CFG2_RWOPT_CMD_TIMEOUT_BMSK = 0xf, -+ S_SCMO_CMD_OPT_CFG2_RWOPT_CMD_TIMEOUT_SHFT = 0x0, -+}; -+ -+#define S_SCMO_CMD_OPT_CFG3_ADDR(b, n) \ -+ (S_SCMO_REG_BASE(b) + (0x8000 * (n)) + 0x0000070c) -+enum bimc_s_scmo_cmd_opt_cfg3 { -+ S_SCMO_CMD_OPT_CFG3_RMSK = 0xff, -+ S_SCMO_CMD_OPT_CFG3_FLUSH_CMD_TIMEOUT_BMSK = 0xf, -+ S_SCMO_CMD_OPT_CFG3_FLUSH_CMD_TIMEOUT_SHFT = 0x0, -+}; -+ -+/* S_SWAY_GENERIC */ -+#define S_SWAY_REG_BASE(b) ((b) + 0x00048000) -+ -+#define S_SWAY_CONFIG_INFO_0_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000020) -+enum bimc_s_sway_config_info_0 { -+ S_SWAY_CONFIG_INFO_0_RMSK = 0xff0000ff, -+ S_SWAY_CONFIG_INFO_0_SYNC_MODE_BMSK = 0xff000000, -+ S_SWAY_CONFIG_INFO_0_SYNC_MODE_SHFT = 0x18, -+ S_SWAY_CONFIG_INFO_0_FUNC_BMSK = 0xff, -+ S_SWAY_CONFIG_INFO_0_FUNC_SHFT = 0x0, -+}; -+ -+#define S_SWAY_CONFIG_INFO_1_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000030) -+enum bimc_s_sway_config_info_1 { -+ S_SWAY_CONFIG_INFO_1_RMSK = 0xffffffff, -+ S_SWAY_CONFIG_INFO_1_MPORT_CONNECTIVITY_BMSK = 0xffffffff, -+ S_SWAY_CONFIG_INFO_1_MPORT_CONNECTIVITY_SHFT = 0x0, -+}; -+ -+#define S_SWAY_CONFIG_INFO_2_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000040) -+enum bimc_s_sway_config_info_2 { -+ S_SWAY_CONFIG_INFO_2_RMSK = 0xffff0000, -+ S_SWAY_CONFIG_INFO_2_MPORT_CONNECTIVITY_BMSK = 0xffff0000, -+ S_SWAY_CONFIG_INFO_2_MPORT_CONNECTIVITY_SHFT = 0x10, -+}; -+ -+#define S_SWAY_CONFIG_INFO_3_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000050) -+enum bimc_s_sway_config_info_3 { -+ S_SWAY_CONFIG_INFO_3_RMSK = 0xffffffff, -+ S_SWAY_CONFIG_INFO_3_RCH0_DEPTH_BMSK = 0xff000000, -+ S_SWAY_CONFIG_INFO_3_RCH0_DEPTH_SHFT = 0x18, -+ S_SWAY_CONFIG_INFO_3_BCH_DEPTH_BMSK = 0xff0000, -+ S_SWAY_CONFIG_INFO_3_BCH_DEPTH_SHFT = 0x10, -+ S_SWAY_CONFIG_INFO_3_WCH_DEPTH_BMSK = 0xff, -+ S_SWAY_CONFIG_INFO_3_WCH_DEPTH_SHFT = 0x0, -+}; -+ -+#define S_SWAY_CONFIG_INFO_4_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000060) -+enum bimc_s_sway_config_info_4 { -+ S_SWAY_CONFIG_INFO_4_RMSK = 0x800000ff, -+ S_SWAY_CONFIG_INFO_4_DUAL_RCH_EN_BMSK = 0x80000000, -+ S_SWAY_CONFIG_INFO_4_DUAL_RCH_EN_SHFT = 0x1f, -+ S_SWAY_CONFIG_INFO_4_RCH1_DEPTH_BMSK = 0xff, -+ S_SWAY_CONFIG_INFO_4_RCH1_DEPTH_SHFT = 0x0, -+}; -+ -+#define S_SWAY_CONFIG_INFO_5_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000070) -+enum bimc_s_sway_config_info_5 { -+ S_SWAY_CONFIG_INFO_5_RMSK = 0x800000ff, -+ S_SWAY_CONFIG_INFO_5_QCH_EN_BMSK = 0x80000000, -+ S_SWAY_CONFIG_INFO_5_QCH_EN_SHFT = 0x1f, -+ S_SWAY_CONFIG_INFO_5_QCH_DEPTH_BMSK = 0xff, -+ S_SWAY_CONFIG_INFO_5_QCH_DEPTH_SHFT = 0x0, -+}; -+ -+#define S_SWAY_CONFIG_INFO_6_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000080) -+enum bimc_s_sway_config_info_6 { -+ S_SWAY_CONFIG_INFO_6_RMSK = 0x1, -+ S_SWAY_CONFIG_INFO_6_S2SW_PIPELINE_EN_BMSK = 0x1, -+ S_SWAY_CONFIG_INFO_6_S2SW_PIPELINE_EN_SHFT = 0x0, -+}; -+ -+#define S_SWAY_INT_STATUS_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000100) -+enum bimc_s_sway_int_status { -+ S_SWAY_INT_STATUS_RMSK = 0x3, -+ S_SWAY_INT_STATUS_RFU_BMSK = 0x3, -+ S_SWAY_INT_STATUS_RFU_SHFT = 0x0, -+}; -+ -+#define S_SWAY_INT_CLR_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000108) -+enum bimc_s_sway_int_clr { -+ S_SWAY_INT_CLR_RMSK = 0x3, -+ S_SWAY_INT_CLR_RFU_BMSK = 0x3, -+ S_SWAY_INT_CLR_RFU_SHFT = 0x0, -+}; -+ -+ -+#define S_SWAY_INT_EN_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x0000010c) -+enum bimc_s_sway_int_en { -+ S_SWAY_INT_EN_RMSK = 0x3, -+ S_SWAY_INT_EN_RFU_BMSK = 0x3, -+ S_SWAY_INT_EN_RFU_SHFT = 0x0, -+}; -+ -+#define S_SWAY_CLK_CTRL_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000200) -+enum bimc_s_sway_clk_ctrl { -+ S_SWAY_CLK_CTRL_RMSK = 0x3, -+ S_SWAY_CLK_CTRL_SLAVE_CLK_GATING_EN_BMSK = 0x2, -+ S_SWAY_CLK_CTRL_SLAVE_CLK_GATING_EN_SHFT = 0x1, -+ S_SWAY_CLK_CTRL_CORE_CLK_GATING_EN_BMSK = 0x1, -+ S_SWAY_CLK_CTRL_CORE_CLK_GATING_EN_SHFT = 0x0, -+}; -+ -+#define S_SWAY_RCH_SEL_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000210) -+enum bimc_s_sway_rch_sel { -+ S_SWAY_RCH_SEL_RMSK = 0x7f, -+ S_SWAY_RCH_SEL_UNUSED_BMSK = 0x7f, -+ S_SWAY_RCH_SEL_UNUSED_SHFT = 0x0, -+}; -+ -+ -+#define S_SWAY_MAX_OUTSTANDING_REQS_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000220) -+enum bimc_s_sway_max_outstanding_reqs { -+ S_SWAY_MAX_OUTSTANDING_REQS_RMSK = 0xffff, -+ S_SWAY_MAX_OUTSTANDING_REQS_WRITE_BMSK = 0xff00, -+ S_SWAY_MAX_OUTSTANDING_REQS_WRITE_SHFT = 0x8, -+ S_SWAY_MAX_OUTSTANDING_REQS_READ_BMSK = 0xff, -+ S_SWAY_MAX_OUTSTANDING_REQS_READ_SHFT = 0x0, -+}; -+ -+ -+#define S_SWAY_BUF_STATUS_0_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000400) -+enum bimc_s_sway_buf_status_0 { -+ S_SWAY_BUF_STATUS_0_RMSK = 0xf0300f03, -+ S_SWAY_BUF_STATUS_0_RCH0_DATA_RD_FULL_BMSK = 0x80000000, -+ S_SWAY_BUF_STATUS_0_RCH0_DATA_RD_FULL_SHFT = 0x1f, -+ S_SWAY_BUF_STATUS_0_RCH0_DATA_RD_EMPTY_BMSK = 0x40000000, -+ S_SWAY_BUF_STATUS_0_RCH0_DATA_RD_EMPTY_SHFT = 0x1e, -+ S_SWAY_BUF_STATUS_0_RCH0_CTRL_RD_FULL_BMSK = 0x20000000, -+ S_SWAY_BUF_STATUS_0_RCH0_CTRL_RD_FULL_SHFT = 0x1d, -+ S_SWAY_BUF_STATUS_0_RCH0_CTRL_RD_EMPTY_BMSK = 0x10000000, -+ S_SWAY_BUF_STATUS_0_RCH0_CTRL_RD_EMPTY_SHFT = 0x1c, -+ S_SWAY_BUF_STATUS_0_BCH_RD_FULL_BMSK = 0x200000, -+ S_SWAY_BUF_STATUS_0_BCH_RD_FULL_SHFT = 0x15, -+ S_SWAY_BUF_STATUS_0_BCH_RD_EMPTY_BMSK = 0x100000, -+ S_SWAY_BUF_STATUS_0_BCH_RD_EMPTY_SHFT = 0x14, -+ S_SWAY_BUF_STATUS_0_WCH_DATA_WR_FULL_BMSK = 0x800, -+ S_SWAY_BUF_STATUS_0_WCH_DATA_WR_FULL_SHFT = 0xb, -+ S_SWAY_BUF_STATUS_0_WCH_DATA_WR_EMPTY_BMSK = 0x400, -+ S_SWAY_BUF_STATUS_0_WCH_DATA_WR_EMPTY_SHFT = 0xa, -+ S_SWAY_BUF_STATUS_0_WCH_CTRL_WR_FULL_BMSK = 0x200, -+ S_SWAY_BUF_STATUS_0_WCH_CTRL_WR_FULL_SHFT = 0x9, -+ S_SWAY_BUF_STATUS_0_WCH_CTRL_WR_EMPTY_BMSK = 0x100, -+ S_SWAY_BUF_STATUS_0_WCH_CTRL_WR_EMPTY_SHFT = 0x8, -+ S_SWAY_BUF_STATUS_0_ACH_WR_FULL_BMSK = 0x2, -+ S_SWAY_BUF_STATUS_0_ACH_WR_FULL_SHFT = 0x1, -+ S_SWAY_BUF_STATUS_0_ACH_WR_EMPTY_BMSK = 0x1, -+ S_SWAY_BUF_STATUS_0_ACH_WR_EMPTY_SHFT = 0x0, -+}; -+ -+#define S_SWAY_BUF_STATUS_1_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000410) -+enum bimc_s_sway_buf_status_1 { -+ S_SWAY_BUF_STATUS_1_RMSK = 0xf0, -+ S_SWAY_BUF_STATUS_1_RCH1_DATA_RD_FULL_BMSK = 0x80, -+ S_SWAY_BUF_STATUS_1_RCH1_DATA_RD_FULL_SHFT = 0x7, -+ S_SWAY_BUF_STATUS_1_RCH1_DATA_RD_EMPTY_BMSK = 0x40, -+ S_SWAY_BUF_STATUS_1_RCH1_DATA_RD_EMPTY_SHFT = 0x6, -+ S_SWAY_BUF_STATUS_1_RCH1_CTRL_RD_FULL_BMSK = 0x20, -+ S_SWAY_BUF_STATUS_1_RCH1_CTRL_RD_FULL_SHFT = 0x5, -+ S_SWAY_BUF_STATUS_1_RCH1_CTRL_RD_EMPTY_BMSK = 0x10, -+ S_SWAY_BUF_STATUS_1_RCH1_CTRL_RD_EMPTY_SHFT = 0x4, -+}; -+ -+#define S_SWAY_BUF_STATUS_2_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000420) -+enum bimc_s_sway_buf_status_2 { -+ S_SWAY_BUF_STATUS_2_RMSK = 0x30, -+ S_SWAY_BUF_STATUS_2_QCH_RD_FULL_BMSK = 0x20, -+ S_SWAY_BUF_STATUS_2_QCH_RD_FULL_SHFT = 0x5, -+ S_SWAY_BUF_STATUS_2_QCH_RD_EMPTY_BMSK = 0x10, -+ S_SWAY_BUF_STATUS_2_QCH_RD_EMPTY_SHFT = 0x4, -+}; -+ -+/* S_ARB_GENERIC */ -+ -+#define S_ARB_REG_BASE(b) ((b) + 0x00049000) -+ -+#define S_ARB_COMPONENT_INFO_ADDR(b, n) \ -+ (S_SWAY_REG_BASE(b) + (0x8000 * (n)) + 0x00000000) -+enum bimc_s_arb_component_info { -+ S_ARB_COMPONENT_INFO_RMSK = 0xffffff, -+ S_ARB_COMPONENT_INFO_INSTANCE_BMSK = 0xff0000, -+ S_ARB_COMPONENT_INFO_INSTANCE_SHFT = 0x10, -+ S_ARB_COMPONENT_INFO_SUB_TYPE_BMSK = 0xff00, -+ S_ARB_COMPONENT_INFO_SUB_TYPE_SHFT = 0x8, -+ S_ARB_COMPONENT_INFO_TYPE_BMSK = 0xff, -+ S_ARB_COMPONENT_INFO_TYPE_SHFT = 0x0, -+}; -+ -+#define S_ARB_CONFIG_INFO_0_ADDR(b, n) \ -+ (S_ARB_REG_BASE(b) + (0x8000 * (n)) + 0x00000020) -+enum bimc_s_arb_config_info_0 { -+ S_ARB_CONFIG_INFO_0_RMSK = 0x800000ff, -+ S_ARB_CONFIG_INFO_0_ARB2SW_PIPELINE_EN_BMSK = 0x80000000, -+ S_ARB_CONFIG_INFO_0_ARB2SW_PIPELINE_EN_SHFT = 0x1f, -+ S_ARB_CONFIG_INFO_0_FUNC_BMSK = 0xff, -+ S_ARB_CONFIG_INFO_0_FUNC_SHFT = 0x0, -+}; -+ -+#define S_ARB_CONFIG_INFO_1_ADDR(b, n) \ -+ (S_ARB_REG_BASE(b) + (0x8000 * (n)) + 0x00000030) -+enum bimc_s_arb_config_info_1 { -+ S_ARB_CONFIG_INFO_1_RMSK = 0xffffffff, -+ S_ARB_CONFIG_INFO_1_MPORT_CONNECTIVITY_BMSK = 0xffffffff, -+ S_ARB_CONFIG_INFO_1_MPORT_CONNECTIVITY_SHFT = 0x0, -+}; -+ -+#define S_ARB_CLK_CTRL_ADDR(b) \ -+ (S_ARB_REG_BASE(b) + (0x8000 * (n)) + 0x00000200) -+enum bimc_s_arb_clk_ctrl { -+ S_ARB_CLK_CTRL_RMSK = 0x1, -+ S_ARB_CLK_CTRL_SLAVE_CLK_GATING_EN_BMSK = 0x2, -+ S_ARB_CLK_CTRL_SLAVE_CLK_GATING_EN_SHFT = 0x1, -+ S_ARB_CLK_CTRL_CORE_CLK_GATING_EN_BMSK = 0x1, -+ S_ARB_CLK_CTRL_CORE_CLK_GATING_EN_SHFT = 0x0, -+ S_ARB_CLK_CTRL_CLK_GATING_EN_BMSK = 0x1, -+ S_ARB_CLK_CTRL_CLK_GATING_EN_SHFT = 0x0, -+}; -+ -+#define S_ARB_MODE_ADDR(b, n) \ -+ (S_ARB_REG_BASE(b) + (0x8000 * (n)) + 0x00000210) -+enum bimc_s_arb_mode { -+ S_ARB_MODE_RMSK = 0xf0000001, -+ S_ARB_MODE_WR_GRANTS_AHEAD_BMSK = 0xf0000000, -+ S_ARB_MODE_WR_GRANTS_AHEAD_SHFT = 0x1c, -+ S_ARB_MODE_PRIO_RR_EN_BMSK = 0x1, -+ S_ARB_MODE_PRIO_RR_EN_SHFT = 0x0, -+}; -+ -+#define BKE_HEALTH_MASK \ -+ (M_BKE_HEALTH_0_CONFIG_LIMIT_CMDS_BMSK |\ -+ M_BKE_HEALTH_0_CONFIG_AREQPRIO_BMSK |\ -+ M_BKE_HEALTH_0_CONFIG_PRIOLVL_BMSK) -+ -+#define BKE_HEALTH_VAL(limit, areq, plvl) \ -+ ((((limit) << M_BKE_HEALTH_0_CONFIG_LIMIT_CMDS_SHFT) & \ -+ M_BKE_HEALTH_0_CONFIG_LIMIT_CMDS_BMSK) | \ -+ (((areq) << M_BKE_HEALTH_0_CONFIG_AREQPRIO_SHFT) & \ -+ M_BKE_HEALTH_0_CONFIG_AREQPRIO_BMSK) | \ -+ (((plvl) << M_BKE_HEALTH_0_CONFIG_PRIOLVL_SHFT) & \ -+ M_BKE_HEALTH_0_CONFIG_PRIOLVL_BMSK)) -+ -+#define MAX_GRANT_PERIOD \ -+ (M_BKE_GP_GP_BMSK >> \ -+ M_BKE_GP_GP_SHFT) -+ -+#define MAX_GC \ -+ (M_BKE_GC_GC_BMSK >> \ -+ (M_BKE_GC_GC_SHFT + 1)) -+ -+static int bimc_div(int64_t *a, uint32_t b) -+{ -+ if ((*a > 0) && (*a < b)) { -+ *a = 0; -+ return 1; -+ } else { -+ return do_div(*a, b); -+ } -+} -+ -+#define ENABLE(val) ((val) == 1 ? 1 : 0) -+void msm_bus_bimc_set_mas_clk_gate(struct msm_bus_bimc_info *binfo, -+ uint32_t mas_index, struct msm_bus_bimc_clk_gate *bgate) -+{ -+ uint32_t val, mask, reg_val; -+ void __iomem *addr; -+ -+ reg_val = readl_relaxed(M_CLK_CTRL_ADDR(binfo->base, -+ mas_index)) & M_CLK_CTRL_RMSK; -+ addr = M_CLK_CTRL_ADDR(binfo->base, mas_index); -+ mask = (M_CLK_CTRL_MAS_CLK_GATING_EN_BMSK | -+ M_CLK_CTRL_CORE_CLK_GATING_EN_BMSK); -+ val = (bgate->core_clk_gate_en << -+ M_CLK_CTRL_MAS_CLK_GATING_EN_SHFT) | -+ bgate->port_clk_gate_en; -+ writel_relaxed(((reg_val & (~mask)) | (val & mask)), addr); -+ /* Ensure clock gating enable mask is set before exiting */ -+ wmb(); -+} -+ -+void msm_bus_bimc_arb_en(struct msm_bus_bimc_info *binfo, -+ uint32_t slv_index, bool en) -+{ -+ uint32_t reg_val, reg_mask_val, enable, val; -+ -+ reg_mask_val = (readl_relaxed(S_ARB_CONFIG_INFO_0_ADDR(binfo-> -+ base, slv_index)) & S_ARB_CONFIG_INFO_0_FUNC_BMSK) -+ >> S_ARB_CONFIG_INFO_0_FUNC_SHFT; -+ enable = ENABLE(en); -+ val = enable << S_ARB_MODE_PRIO_RR_EN_SHFT; -+ if (reg_mask_val == BIMC_ARB_MODE_PRIORITY_RR) { -+ reg_val = readl_relaxed(S_ARB_CONFIG_INFO_0_ADDR(binfo-> -+ base, slv_index)) & S_ARB_MODE_RMSK; -+ writel_relaxed(((reg_val & (~(S_ARB_MODE_PRIO_RR_EN_BMSK))) | -+ (val & S_ARB_MODE_PRIO_RR_EN_BMSK)), -+ S_ARB_MODE_ADDR(binfo->base, slv_index)); -+ /* Ensure arbitration mode is set before returning */ -+ wmb(); -+ } -+} -+ -+static void set_qos_mode(void __iomem *baddr, uint32_t index, uint32_t val0, -+ uint32_t val1, uint32_t val2) -+{ -+ uint32_t reg_val, val; -+ -+ reg_val = readl_relaxed(M_PRIOLVL_OVERRIDE_ADDR(baddr, -+ index)) & M_PRIOLVL_OVERRIDE_RMSK; -+ val = val0 << M_PRIOLVL_OVERRIDE_OVERRIDE_PRIOLVL_SHFT; -+ writel_relaxed(((reg_val & ~(M_PRIOLVL_OVERRIDE_OVERRIDE_PRIOLVL_BMSK)) -+ | (val & M_PRIOLVL_OVERRIDE_OVERRIDE_PRIOLVL_BMSK)), -+ M_PRIOLVL_OVERRIDE_ADDR(baddr, index)); -+ reg_val = readl_relaxed(M_RD_CMD_OVERRIDE_ADDR(baddr, index)) & -+ M_RD_CMD_OVERRIDE_RMSK; -+ val = val1 << M_RD_CMD_OVERRIDE_OVERRIDE_AREQPRIO_SHFT; -+ writel_relaxed(((reg_val & ~(M_RD_CMD_OVERRIDE_OVERRIDE_AREQPRIO_BMSK -+ )) | (val & M_RD_CMD_OVERRIDE_OVERRIDE_AREQPRIO_BMSK)), -+ M_RD_CMD_OVERRIDE_ADDR(baddr, index)); -+ reg_val = readl_relaxed(M_WR_CMD_OVERRIDE_ADDR(baddr, index)) & -+ M_WR_CMD_OVERRIDE_RMSK; -+ val = val2 << M_WR_CMD_OVERRIDE_OVERRIDE_AREQPRIO_SHFT; -+ writel_relaxed(((reg_val & ~(M_WR_CMD_OVERRIDE_OVERRIDE_AREQPRIO_BMSK -+ )) | (val & M_WR_CMD_OVERRIDE_OVERRIDE_AREQPRIO_BMSK)), -+ M_WR_CMD_OVERRIDE_ADDR(baddr, index)); -+ /* Ensure the priority register writes go through */ -+ wmb(); -+} -+ -+static void msm_bus_bimc_set_qos_mode(void __iomem *base, -+ uint32_t mas_index, uint8_t qmode_sel) -+{ -+ uint32_t reg_val, val; -+ -+ switch (qmode_sel) { -+ case BIMC_QOS_MODE_FIXED: -+ reg_val = readl_relaxed(M_BKE_EN_ADDR(base, -+ mas_index)); -+ writel_relaxed((reg_val & (~M_BKE_EN_EN_BMSK)), -+ M_BKE_EN_ADDR(base, mas_index)); -+ /* Ensure that the book-keeping register writes -+ * go through before setting QoS mode. -+ * QoS mode registers might write beyond 1K -+ * boundary in future -+ */ -+ wmb(); -+ set_qos_mode(base, mas_index, 1, 1, 1); -+ break; -+ -+ case BIMC_QOS_MODE_BYPASS: -+ reg_val = readl_relaxed(M_BKE_EN_ADDR(base, -+ mas_index)); -+ writel_relaxed((reg_val & (~M_BKE_EN_EN_BMSK)), -+ M_BKE_EN_ADDR(base, mas_index)); -+ /* Ensure that the book-keeping register writes -+ * go through before setting QoS mode. -+ * QoS mode registers might write beyond 1K -+ * boundary in future -+ */ -+ wmb(); -+ set_qos_mode(base, mas_index, 0, 0, 0); -+ break; -+ -+ case BIMC_QOS_MODE_REGULATOR: -+ case BIMC_QOS_MODE_LIMITER: -+ set_qos_mode(base, mas_index, 0, 0, 0); -+ reg_val = readl_relaxed(M_BKE_EN_ADDR(base, -+ mas_index)); -+ val = 1 << M_BKE_EN_EN_SHFT; -+ /* Ensure that the book-keeping register writes -+ * go through before setting QoS mode. -+ * QoS mode registers might write beyond 1K -+ * boundary in future -+ */ -+ wmb(); -+ writel_relaxed(((reg_val & (~M_BKE_EN_EN_BMSK)) | (val & -+ M_BKE_EN_EN_BMSK)), M_BKE_EN_ADDR(base, -+ mas_index)); -+ break; -+ default: -+ break; -+ } -+} -+ -+static void set_qos_prio_rl(void __iomem *addr, uint32_t rmsk, -+ uint8_t index, struct msm_bus_bimc_qos_mode *qmode) -+{ -+ uint32_t reg_val, val0, val; -+ -+ /* Note, addr is already passed with right mas_index */ -+ reg_val = readl_relaxed(addr) & rmsk; -+ val0 = BKE_HEALTH_VAL(qmode->rl.qhealth[index].limit_commands, -+ qmode->rl.qhealth[index].areq_prio, -+ qmode->rl.qhealth[index].prio_level); -+ val = ((reg_val & (~(BKE_HEALTH_MASK))) | (val0 & BKE_HEALTH_MASK)); -+ writel_relaxed(val, addr); -+ /* Ensure that priority for regulator/limiter modes are -+ * set before returning -+ */ -+ wmb(); -+ -+} -+ -+static void msm_bus_bimc_set_qos_prio(void __iomem *base, -+ uint32_t mas_index, uint8_t qmode_sel, -+ struct msm_bus_bimc_qos_mode *qmode) -+{ -+ uint32_t reg_val, val; -+ -+ switch (qmode_sel) { -+ case BIMC_QOS_MODE_FIXED: -+ reg_val = readl_relaxed(M_PRIOLVL_OVERRIDE_ADDR( -+ base, mas_index)) & M_PRIOLVL_OVERRIDE_RMSK; -+ val = qmode->fixed.prio_level << -+ M_PRIOLVL_OVERRIDE_SHFT; -+ writel_relaxed(((reg_val & -+ ~(M_PRIOLVL_OVERRIDE_BMSK)) | (val -+ & M_PRIOLVL_OVERRIDE_BMSK)), -+ M_PRIOLVL_OVERRIDE_ADDR(base, mas_index)); -+ -+ reg_val = readl_relaxed(M_RD_CMD_OVERRIDE_ADDR( -+ base, mas_index)) & M_RD_CMD_OVERRIDE_RMSK; -+ val = qmode->fixed.areq_prio_rd << -+ M_RD_CMD_OVERRIDE_AREQPRIO_SHFT; -+ writel_relaxed(((reg_val & ~(M_RD_CMD_OVERRIDE_AREQPRIO_BMSK)) -+ | (val & M_RD_CMD_OVERRIDE_AREQPRIO_BMSK)), -+ M_RD_CMD_OVERRIDE_ADDR(base, mas_index)); -+ -+ reg_val = readl_relaxed(M_WR_CMD_OVERRIDE_ADDR( -+ base, mas_index)) & M_WR_CMD_OVERRIDE_RMSK; -+ val = qmode->fixed.areq_prio_wr << -+ M_WR_CMD_OVERRIDE_AREQPRIO_SHFT; -+ writel_relaxed(((reg_val & ~(M_WR_CMD_OVERRIDE_AREQPRIO_BMSK)) -+ | (val & M_WR_CMD_OVERRIDE_AREQPRIO_BMSK)), -+ M_WR_CMD_OVERRIDE_ADDR(base, mas_index)); -+ /* Ensure that fixed mode register writes go through -+ * before returning -+ */ -+ wmb(); -+ break; -+ -+ case BIMC_QOS_MODE_REGULATOR: -+ case BIMC_QOS_MODE_LIMITER: -+ set_qos_prio_rl(M_BKE_HEALTH_3_CONFIG_ADDR(base, -+ mas_index), M_BKE_HEALTH_3_CONFIG_RMSK, 3, qmode); -+ set_qos_prio_rl(M_BKE_HEALTH_2_CONFIG_ADDR(base, -+ mas_index), M_BKE_HEALTH_2_CONFIG_RMSK, 2, qmode); -+ set_qos_prio_rl(M_BKE_HEALTH_1_CONFIG_ADDR(base, -+ mas_index), M_BKE_HEALTH_1_CONFIG_RMSK, 1, qmode); -+ set_qos_prio_rl(M_BKE_HEALTH_0_CONFIG_ADDR(base, -+ mas_index), M_BKE_HEALTH_0_CONFIG_RMSK, 0 , qmode); -+ break; -+ case BIMC_QOS_MODE_BYPASS: -+ default: -+ break; -+ } -+} -+ -+static void set_qos_bw_regs(void __iomem *baddr, uint32_t mas_index, -+ int32_t th, int32_t tm, int32_t tl, uint32_t gp, -+ uint32_t gc) -+{ -+ int32_t reg_val, val; -+ int32_t bke_reg_val; -+ int16_t val2; -+ -+ /* Disable BKE before writing to registers as per spec */ -+ bke_reg_val = readl_relaxed(M_BKE_EN_ADDR(baddr, mas_index)); -+ writel_relaxed((bke_reg_val & ~(M_BKE_EN_EN_BMSK)), -+ M_BKE_EN_ADDR(baddr, mas_index)); -+ -+ /* Write values of registers calculated */ -+ reg_val = readl_relaxed(M_BKE_GP_ADDR(baddr, mas_index)) -+ & M_BKE_GP_RMSK; -+ val = gp << M_BKE_GP_GP_SHFT; -+ writel_relaxed(((reg_val & ~(M_BKE_GP_GP_BMSK)) | (val & -+ M_BKE_GP_GP_BMSK)), M_BKE_GP_ADDR(baddr, mas_index)); -+ -+ reg_val = readl_relaxed(M_BKE_GC_ADDR(baddr, mas_index)) & -+ M_BKE_GC_RMSK; -+ val = gc << M_BKE_GC_GC_SHFT; -+ writel_relaxed(((reg_val & ~(M_BKE_GC_GC_BMSK)) | (val & -+ M_BKE_GC_GC_BMSK)), M_BKE_GC_ADDR(baddr, mas_index)); -+ -+ reg_val = readl_relaxed(M_BKE_THH_ADDR(baddr, mas_index)) & -+ M_BKE_THH_RMSK; -+ val = th << M_BKE_THH_THRESH_SHFT; -+ writel_relaxed(((reg_val & ~(M_BKE_THH_THRESH_BMSK)) | (val & -+ M_BKE_THH_THRESH_BMSK)), M_BKE_THH_ADDR(baddr, mas_index)); -+ -+ reg_val = readl_relaxed(M_BKE_THM_ADDR(baddr, mas_index)) & -+ M_BKE_THM_RMSK; -+ val2 = tm << M_BKE_THM_THRESH_SHFT; -+ writel_relaxed(((reg_val & ~(M_BKE_THM_THRESH_BMSK)) | (val2 & -+ M_BKE_THM_THRESH_BMSK)), M_BKE_THM_ADDR(baddr, mas_index)); -+ -+ reg_val = readl_relaxed(M_BKE_THL_ADDR(baddr, mas_index)) & -+ M_BKE_THL_RMSK; -+ val2 = tl << M_BKE_THL_THRESH_SHFT; -+ writel_relaxed(((reg_val & ~(M_BKE_THL_THRESH_BMSK)) | -+ (val2 & M_BKE_THL_THRESH_BMSK)), M_BKE_THL_ADDR(baddr, -+ mas_index)); -+ -+ /* Ensure that all bandwidth register writes have completed -+ * before returning -+ */ -+ wmb(); -+} -+ -+static void msm_bus_bimc_set_qos_bw(void __iomem *base, uint32_t qos_freq, -+ uint32_t mas_index, struct msm_bus_bimc_qos_bw *qbw) -+{ -+ uint32_t bke_en; -+ -+ /* Validate QOS Frequency */ -+ if (qos_freq == 0) { -+ MSM_BUS_DBG("Zero frequency\n"); -+ return; -+ } -+ -+ /* Get enable bit for BKE before programming the period */ -+ bke_en = (readl_relaxed(M_BKE_EN_ADDR(base, mas_index)) & -+ M_BKE_EN_EN_BMSK) >> M_BKE_EN_EN_SHFT; -+ -+ /* Only calculate if there's a requested bandwidth and window */ -+ if (qbw->bw && qbw->ws) { -+ int64_t th, tm, tl; -+ uint32_t gp, gc; -+ int64_t gp_nominal, gp_required, gp_calc, data, temp; -+ int64_t win = qbw->ws * qos_freq; -+ temp = win; -+ /* -+ * Calculate nominal grant period defined by requested -+ * window size. -+ * Ceil this value to max grant period. -+ */ -+ bimc_div(&temp, 1000000); -+ gp_nominal = min_t(uint64_t, MAX_GRANT_PERIOD, temp); -+ /* -+ * Calculate max window size, defined by bw request. -+ * Units: (KHz, MB/s) -+ */ -+ gp_calc = MAX_GC * qos_freq * 1000; -+ gp_required = gp_calc; -+ bimc_div(&gp_required, qbw->bw); -+ -+ /* User min of two grant periods */ -+ gp = min_t(int64_t, gp_nominal, gp_required); -+ -+ /* Calculate bandwith in grants and ceil. */ -+ temp = qbw->bw * gp; -+ data = qos_freq * 1000; -+ bimc_div(&temp, data); -+ gc = min_t(int64_t, MAX_GC, temp); -+ -+ /* Calculate thresholds */ -+ th = qbw->bw - qbw->thh; -+ tm = qbw->bw - qbw->thm; -+ tl = qbw->bw - qbw->thl; -+ -+ th = th * gp; -+ bimc_div(&th, data); -+ tm = tm * gp; -+ bimc_div(&tm, data); -+ tl = tl * gp; -+ bimc_div(&tl, data); -+ -+ MSM_BUS_DBG("BIMC: BW: mas_index: %d, th: %llu tm: %llu\n", -+ mas_index, th, tm); -+ MSM_BUS_DBG("BIMC: tl: %llu gp:%u gc: %u bke_en: %u\n", -+ tl, gp, gc, bke_en); -+ set_qos_bw_regs(base, mas_index, th, tm, tl, gp, gc); -+ } else -+ /* Clear bandwidth registers */ -+ set_qos_bw_regs(base, mas_index, 0, 0, 0, 0, 0); -+} -+ -+static int msm_bus_bimc_allocate_commit_data(struct msm_bus_fabric_registration -+ *fab_pdata, void **cdata, int ctx) -+{ -+ struct msm_bus_bimc_commit **cd = (struct msm_bus_bimc_commit **)cdata; -+ struct msm_bus_bimc_info *binfo = -+ (struct msm_bus_bimc_info *)fab_pdata->hw_data; -+ -+ MSM_BUS_DBG("Allocating BIMC commit data\n"); -+ *cd = kzalloc(sizeof(struct msm_bus_bimc_commit), GFP_KERNEL); -+ if (!*cd) { -+ MSM_BUS_DBG("Couldn't alloc mem for cdata\n"); -+ return -ENOMEM; -+ } -+ -+ (*cd)->mas = binfo->cdata[ctx].mas; -+ (*cd)->slv = binfo->cdata[ctx].slv; -+ -+ return 0; -+} -+ -+static void *msm_bus_bimc_allocate_bimc_data(struct platform_device *pdev, -+ struct msm_bus_fabric_registration *fab_pdata) -+{ -+ struct resource *bimc_mem; -+ struct resource *bimc_io; -+ struct msm_bus_bimc_info *binfo; -+ int i; -+ -+ MSM_BUS_DBG("Allocating BIMC data\n"); -+ binfo = kzalloc(sizeof(struct msm_bus_bimc_info), GFP_KERNEL); -+ if (!binfo) { -+ WARN(!binfo, "Couldn't alloc mem for bimc_info\n"); -+ return NULL; -+ } -+ -+ binfo->qos_freq = fab_pdata->qos_freq; -+ -+ binfo->params.nmasters = fab_pdata->nmasters; -+ binfo->params.nslaves = fab_pdata->nslaves; -+ binfo->params.bus_id = fab_pdata->id; -+ -+ for (i = 0; i < NUM_CTX; i++) { -+ binfo->cdata[i].mas = kzalloc(sizeof(struct -+ msm_bus_node_hw_info) * fab_pdata->nmasters * 2, -+ GFP_KERNEL); -+ if (!binfo->cdata[i].mas) { -+ MSM_BUS_ERR("Couldn't alloc mem for bimc master hw\n"); -+ kfree(binfo); -+ return NULL; -+ } -+ -+ binfo->cdata[i].slv = kzalloc(sizeof(struct -+ msm_bus_node_hw_info) * fab_pdata->nslaves * 2, -+ GFP_KERNEL); -+ if (!binfo->cdata[i].slv) { -+ MSM_BUS_DBG("Couldn't alloc mem for bimc slave hw\n"); -+ kfree(binfo->cdata[i].mas); -+ kfree(binfo); -+ return NULL; -+ } -+ } -+ -+ if (fab_pdata->virt) { -+ MSM_BUS_DBG("Don't get memory regions for virtual fabric\n"); -+ goto skip_mem; -+ } -+ -+ bimc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!bimc_mem) { -+ MSM_BUS_ERR("Cannot get BIMC Base address\n"); -+ kfree(binfo); -+ return NULL; -+ } -+ -+ bimc_io = request_mem_region(bimc_mem->start, -+ resource_size(bimc_mem), pdev->name); -+ if (!bimc_io) { -+ MSM_BUS_ERR("BIMC memory unavailable\n"); -+ kfree(binfo); -+ return NULL; -+ } -+ -+ binfo->base = ioremap(bimc_mem->start, resource_size(bimc_mem)); -+ if (!binfo->base) { -+ MSM_BUS_ERR("IOremap failed for BIMC!\n"); -+ release_mem_region(bimc_mem->start, resource_size(bimc_mem)); -+ kfree(binfo); -+ return NULL; -+ } -+ -+skip_mem: -+ fab_pdata->hw_data = (void *)binfo; -+ return (void *)binfo; -+} -+ -+static void free_commit_data(void *cdata) -+{ -+ struct msm_bus_bimc_commit *cd = (struct msm_bus_bimc_commit *)cdata; -+ -+ kfree(cd->mas); -+ kfree(cd->slv); -+ kfree(cd); -+} -+ -+static void bke_switch( -+ void __iomem *baddr, uint32_t mas_index, bool req, int mode) -+{ -+ uint32_t reg_val, val, cur_val; -+ -+ val = req << M_BKE_EN_EN_SHFT; -+ reg_val = readl_relaxed(M_BKE_EN_ADDR(baddr, mas_index)); -+ cur_val = reg_val & M_BKE_EN_RMSK; -+ if (val == cur_val) -+ return; -+ -+ if (!req && mode == BIMC_QOS_MODE_FIXED) -+ set_qos_mode(baddr, mas_index, 1, 1, 1); -+ -+ writel_relaxed(((reg_val & ~(M_BKE_EN_EN_BMSK)) | (val & -+ M_BKE_EN_EN_BMSK)), M_BKE_EN_ADDR(baddr, mas_index)); -+ /* Make sure BKE on/off goes through before changing priorities */ -+ wmb(); -+ -+ if (req) -+ set_qos_mode(baddr, mas_index, 0, 0, 0); -+} -+ -+static void bimc_set_static_qos_bw(void __iomem *base, unsigned int qos_freq, -+ int mport, struct msm_bus_bimc_qos_bw *qbw) -+{ -+ int32_t bw_mbps, thh = 0, thm, thl, gc; -+ int32_t gp; -+ u64 temp; -+ -+ if (qos_freq == 0) { -+ MSM_BUS_DBG("No QoS Frequency.\n"); -+ return; -+ } -+ -+ if (!(qbw->bw && qbw->gp)) { -+ MSM_BUS_DBG("No QoS Bandwidth or Window size\n"); -+ return; -+ } -+ -+ /* Convert bandwidth to MBPS */ -+ temp = qbw->bw; -+ bimc_div(&temp, 1000000); -+ bw_mbps = temp; -+ -+ /* Grant period in clock cycles -+ * Grant period from bandwidth structure -+ * is in nano seconds, QoS freq is in KHz. -+ * Divide by 1000 to get clock cycles. -+ */ -+ gp = (qos_freq * qbw->gp) / (1000 * NSEC_PER_USEC); -+ -+ /* Grant count = BW in MBps * Grant period -+ * in micro seconds -+ */ -+ gc = bw_mbps * (qbw->gp / NSEC_PER_USEC); -+ gc = min(gc, MAX_GC); -+ -+ /* Medium threshold = -((Medium Threshold percentage * -+ * Grant count) / 100) -+ */ -+ thm = -((qbw->thmp * gc) / 100); -+ qbw->thm = thm; -+ -+ /* Low threshold = -(Grant count) */ -+ thl = -gc; -+ qbw->thl = thl; -+ -+ MSM_BUS_DBG("%s: BKE parameters: gp %d, gc %d, thm %d thl %d thh %d", -+ __func__, gp, gc, thm, thl, thh); -+ -+ trace_bus_bke_params(gc, gp, thl, thm, thl); -+ set_qos_bw_regs(base, mport, thh, thm, thl, gp, gc); -+} -+ -+static void msm_bus_bimc_config_master( -+ struct msm_bus_fabric_registration *fab_pdata, -+ struct msm_bus_inode_info *info, -+ uint64_t req_clk, uint64_t req_bw) -+{ -+ int mode, i, ports; -+ struct msm_bus_bimc_info *binfo; -+ uint64_t bw = 0; -+ -+ binfo = (struct msm_bus_bimc_info *)fab_pdata->hw_data; -+ ports = info->node_info->num_mports; -+ -+ /** -+ * Here check the details of dual configuration. -+ * Take actions based on different modes. -+ * Check for threshold if limiter mode, etc. -+ */ -+ -+ if (req_clk <= info->node_info->th[0]) { -+ mode = info->node_info->mode; -+ bw = info->node_info->bimc_bw[0]; -+ } else if ((info->node_info->num_thresh > 1) && -+ (req_clk <= info->node_info->th[1])) { -+ mode = info->node_info->mode; -+ bw = info->node_info->bimc_bw[1]; -+ } else -+ mode = info->node_info->mode_thresh; -+ -+ switch (mode) { -+ case BIMC_QOS_MODE_BYPASS: -+ case BIMC_QOS_MODE_FIXED: -+ for (i = 0; i < ports; i++) -+ bke_switch(binfo->base, info->node_info->qport[i], -+ BKE_OFF, mode); -+ break; -+ case BIMC_QOS_MODE_REGULATOR: -+ case BIMC_QOS_MODE_LIMITER: -+ for (i = 0; i < ports; i++) { -+ /* If not in fixed mode, update bandwidth */ -+ if ((info->node_info->cur_lim_bw != bw) -+ && (mode != BIMC_QOS_MODE_FIXED)) { -+ struct msm_bus_bimc_qos_bw qbw; -+ qbw.ws = info->node_info->ws; -+ qbw.bw = bw; -+ qbw.gp = info->node_info->bimc_gp; -+ qbw.thmp = info->node_info->bimc_thmp; -+ bimc_set_static_qos_bw(binfo->base, -+ binfo->qos_freq, -+ info->node_info->qport[i], &qbw); -+ info->node_info->cur_lim_bw = bw; -+ MSM_BUS_DBG("%s: Qos is %d reqclk %llu bw %llu", -+ __func__, mode, req_clk, bw); -+ } -+ bke_switch(binfo->base, info->node_info->qport[i], -+ BKE_ON, mode); -+ } -+ break; -+ default: -+ break; -+ } -+} -+ -+static void msm_bus_bimc_update_bw(struct msm_bus_inode_info *hop, -+ struct msm_bus_inode_info *info, -+ struct msm_bus_fabric_registration *fab_pdata, -+ void *sel_cdata, int *master_tiers, -+ int64_t add_bw) -+{ -+ struct msm_bus_bimc_info *binfo; -+ struct msm_bus_bimc_qos_bw qbw; -+ int i; -+ int64_t bw; -+ int ports = info->node_info->num_mports; -+ struct msm_bus_bimc_commit *sel_cd = -+ (struct msm_bus_bimc_commit *)sel_cdata; -+ -+ MSM_BUS_DBG("BIMC: Update bw for ID %d, with IID: %d: %lld\n", -+ info->node_info->id, info->node_info->priv_id, add_bw); -+ -+ binfo = (struct msm_bus_bimc_info *)fab_pdata->hw_data; -+ -+ if (info->node_info->num_mports == 0) { -+ MSM_BUS_DBG("BIMC: Skip Master BW\n"); -+ goto skip_mas_bw; -+ } -+ -+ ports = info->node_info->num_mports; -+ bw = INTERLEAVED_BW(fab_pdata, add_bw, ports); -+ -+ for (i = 0; i < ports; i++) { -+ sel_cd->mas[info->node_info->masterp[i]].bw += bw; -+ sel_cd->mas[info->node_info->masterp[i]].hw_id = -+ info->node_info->mas_hw_id; -+ MSM_BUS_DBG("BIMC: Update mas_bw for ID: %d -> %llu\n", -+ info->node_info->priv_id, -+ sel_cd->mas[info->node_info->masterp[i]].bw); -+ if (info->node_info->hw_sel == MSM_BUS_RPM) -+ sel_cd->mas[info->node_info->masterp[i]].dirty = 1; -+ else { -+ if (!info->node_info->qport) { -+ MSM_BUS_DBG("No qos ports to update!\n"); -+ break; -+ } -+ if (!(info->node_info->mode == BIMC_QOS_MODE_REGULATOR) -+ || (info->node_info->mode == -+ BIMC_QOS_MODE_LIMITER)) { -+ MSM_BUS_DBG("Skip QoS reg programming\n"); -+ break; -+ } -+ -+ MSM_BUS_DBG("qport: %d\n", info->node_info->qport[i]); -+ qbw.bw = sel_cd->mas[info->node_info->masterp[i]].bw; -+ qbw.ws = info->node_info->ws; -+ /* Threshold low = 90% of bw */ -+ qbw.thl = div_s64((90 * bw), 100); -+ /* Threshold medium = bw */ -+ qbw.thm = bw; -+ /* Threshold high = 10% more than bw */ -+ qbw.thh = div_s64((110 * bw), 100); -+ /* Check if info is a shared master. -+ * If it is, mark it dirty -+ * If it isn't, then set QOS Bandwidth. -+ * Also if dual-conf is set, don't program bw regs. -+ **/ -+ if (!info->node_info->dual_conf && -+ ((info->node_info->mode == BIMC_QOS_MODE_LIMITER) || -+ (info->node_info->mode == BIMC_QOS_MODE_REGULATOR))) -+ msm_bus_bimc_set_qos_bw(binfo->base, -+ binfo->qos_freq, -+ info->node_info->qport[i], &qbw); -+ } -+ } -+ -+skip_mas_bw: -+ ports = hop->node_info->num_sports; -+ MSM_BUS_DBG("BIMC: ID: %d, Sports: %d\n", hop->node_info->priv_id, -+ ports); -+ -+ for (i = 0; i < ports; i++) { -+ sel_cd->slv[hop->node_info->slavep[i]].bw += add_bw; -+ sel_cd->slv[hop->node_info->slavep[i]].hw_id = -+ hop->node_info->slv_hw_id; -+ MSM_BUS_DBG("BIMC: Update slave_bw: ID: %d -> %llu\n", -+ hop->node_info->priv_id, -+ sel_cd->slv[hop->node_info->slavep[i]].bw); -+ MSM_BUS_DBG("BIMC: Update slave_bw: index: %d\n", -+ hop->node_info->slavep[i]); -+ /* Check if hop is a shared slave. -+ * If it is, mark it dirty -+ * If it isn't, then nothing to be done as the -+ * slaves are in bypass mode. -+ **/ -+ if (hop->node_info->hw_sel == MSM_BUS_RPM) { -+ MSM_BUS_DBG("Slave dirty: %d, slavep: %d\n", -+ hop->node_info->priv_id, -+ hop->node_info->slavep[i]); -+ sel_cd->slv[hop->node_info->slavep[i]].dirty = 1; -+ } -+ } -+} -+ -+static int msm_bus_bimc_commit(struct msm_bus_fabric_registration -+ *fab_pdata, void *hw_data, void **cdata) -+{ -+ MSM_BUS_DBG("\nReached BIMC Commit\n"); -+ msm_bus_remote_hw_commit(fab_pdata, hw_data, cdata); -+ return 0; -+} -+ -+static void msm_bus_bimc_config_limiter( -+ struct msm_bus_fabric_registration *fab_pdata, -+ struct msm_bus_inode_info *info) -+{ -+ struct msm_bus_bimc_info *binfo; -+ int mode, i, ports; -+ -+ binfo = (struct msm_bus_bimc_info *)fab_pdata->hw_data; -+ ports = info->node_info->num_mports; -+ -+ if (!info->node_info->qport) { -+ MSM_BUS_DBG("No QoS Ports to init\n"); -+ return; -+ } -+ -+ if (info->cur_lim_bw) -+ mode = BIMC_QOS_MODE_LIMITER; -+ else -+ mode = info->node_info->mode; -+ -+ switch (mode) { -+ case BIMC_QOS_MODE_BYPASS: -+ case BIMC_QOS_MODE_FIXED: -+ for (i = 0; i < ports; i++) -+ bke_switch(binfo->base, info->node_info->qport[i], -+ BKE_OFF, mode); -+ break; -+ case BIMC_QOS_MODE_REGULATOR: -+ case BIMC_QOS_MODE_LIMITER: -+ if (info->cur_lim_bw != info->cur_prg_bw) { -+ MSM_BUS_DBG("Enabled BKE throttling node %d to %llu\n", -+ info->node_info->id, info->cur_lim_bw); -+ trace_bus_bimc_config_limiter(info->node_info->id, -+ info->cur_lim_bw); -+ for (i = 0; i < ports; i++) { -+ /* If not in fixed mode, update bandwidth */ -+ struct msm_bus_bimc_qos_bw qbw; -+ -+ qbw.ws = info->node_info->ws; -+ qbw.bw = info->cur_lim_bw; -+ qbw.gp = info->node_info->bimc_gp; -+ qbw.thmp = info->node_info->bimc_thmp; -+ bimc_set_static_qos_bw(binfo->base, -+ binfo->qos_freq, -+ info->node_info->qport[i], &qbw); -+ bke_switch(binfo->base, -+ info->node_info->qport[i], -+ BKE_ON, mode); -+ info->cur_prg_bw = qbw.bw; -+ } -+ } -+ break; -+ default: -+ break; -+ } -+} -+ -+static void bimc_init_mas_reg(struct msm_bus_bimc_info *binfo, -+ struct msm_bus_inode_info *info, -+ struct msm_bus_bimc_qos_mode *qmode, int mode) -+{ -+ int i; -+ -+ switch (mode) { -+ case BIMC_QOS_MODE_FIXED: -+ qmode->fixed.prio_level = info->node_info->prio_lvl; -+ qmode->fixed.areq_prio_rd = info->node_info->prio_rd; -+ qmode->fixed.areq_prio_wr = info->node_info->prio_wr; -+ break; -+ case BIMC_QOS_MODE_LIMITER: -+ qmode->rl.qhealth[0].limit_commands = 1; -+ qmode->rl.qhealth[1].limit_commands = 0; -+ qmode->rl.qhealth[2].limit_commands = 0; -+ qmode->rl.qhealth[3].limit_commands = 0; -+ break; -+ default: -+ break; -+ } -+ -+ if (!info->node_info->qport) { -+ MSM_BUS_DBG("No QoS Ports to init\n"); -+ return; -+ } -+ -+ for (i = 0; i < info->node_info->num_mports; i++) { -+ /* If not in bypass mode, update priority */ -+ if (mode != BIMC_QOS_MODE_BYPASS) { -+ msm_bus_bimc_set_qos_prio(binfo->base, -+ info->node_info-> -+ qport[i], mode, qmode); -+ -+ /* If not in fixed mode, update bandwidth */ -+ if (mode != BIMC_QOS_MODE_FIXED) { -+ struct msm_bus_bimc_qos_bw qbw; -+ qbw.ws = info->node_info->ws; -+ qbw.bw = info->node_info->bimc_bw[0]; -+ qbw.gp = info->node_info->bimc_gp; -+ qbw.thmp = info->node_info->bimc_thmp; -+ bimc_set_static_qos_bw(binfo->base, -+ binfo->qos_freq, -+ info->node_info->qport[i], &qbw); -+ } -+ } -+ -+ /* set mode */ -+ msm_bus_bimc_set_qos_mode(binfo->base, -+ info->node_info->qport[i], -+ mode); -+ } -+} -+ -+static void init_health_regs(struct msm_bus_bimc_info *binfo, -+ struct msm_bus_inode_info *info, -+ struct msm_bus_bimc_qos_mode *qmode, -+ int mode) -+{ -+ int i; -+ -+ if (mode == BIMC_QOS_MODE_LIMITER) { -+ qmode->rl.qhealth[0].limit_commands = 1; -+ qmode->rl.qhealth[1].limit_commands = 0; -+ qmode->rl.qhealth[2].limit_commands = 0; -+ qmode->rl.qhealth[3].limit_commands = 0; -+ -+ if (!info->node_info->qport) { -+ MSM_BUS_DBG("No QoS Ports to init\n"); -+ return; -+ } -+ -+ for (i = 0; i < info->node_info->num_mports; i++) { -+ /* If not in bypass mode, update priority */ -+ if (mode != BIMC_QOS_MODE_BYPASS) -+ msm_bus_bimc_set_qos_prio(binfo->base, -+ info->node_info->qport[i], mode, qmode); -+ } -+ } -+} -+ -+ -+static int msm_bus_bimc_mas_init(struct msm_bus_bimc_info *binfo, -+ struct msm_bus_inode_info *info) -+{ -+ struct msm_bus_bimc_qos_mode *qmode; -+ qmode = kzalloc(sizeof(struct msm_bus_bimc_qos_mode), -+ GFP_KERNEL); -+ if (!qmode) { -+ MSM_BUS_WARN("Couldn't alloc prio data for node: %d\n", -+ info->node_info->id); -+ return -ENOMEM; -+ } -+ -+ info->hw_data = (void *)qmode; -+ -+ /** -+ * If the master supports dual configuration, -+ * configure registers for both modes -+ */ -+ if (info->node_info->dual_conf) -+ bimc_init_mas_reg(binfo, info, qmode, -+ info->node_info->mode_thresh); -+ else if (info->node_info->nr_lim) -+ init_health_regs(binfo, info, qmode, BIMC_QOS_MODE_LIMITER); -+ -+ bimc_init_mas_reg(binfo, info, qmode, info->node_info->mode); -+ return 0; -+} -+ -+static void msm_bus_bimc_node_init(void *hw_data, -+ struct msm_bus_inode_info *info) -+{ -+ struct msm_bus_bimc_info *binfo = -+ (struct msm_bus_bimc_info *)hw_data; -+ -+ if (!IS_SLAVE(info->node_info->priv_id) && -+ (info->node_info->hw_sel != MSM_BUS_RPM)) -+ msm_bus_bimc_mas_init(binfo, info); -+} -+ -+static int msm_bus_bimc_port_halt(uint32_t haltid, uint8_t mport) -+{ -+ return 0; -+} -+ -+static int msm_bus_bimc_port_unhalt(uint32_t haltid, uint8_t mport) -+{ -+ return 0; -+} -+ -+static int msm_bus_bimc_limit_mport(struct msm_bus_node_device_type *info, -+ void __iomem *qos_base, uint32_t qos_off, -+ uint32_t qos_delta, uint32_t qos_freq, -+ bool enable_lim, u64 lim_bw) -+{ -+ int mode; -+ int i; -+ -+ if (ZERO_OR_NULL_PTR(info->node_info->qport)) { -+ MSM_BUS_DBG("No QoS Ports to limit\n"); -+ return 0; -+ } -+ -+ if (enable_lim && lim_bw) { -+ mode = BIMC_QOS_MODE_LIMITER; -+ -+ if (!info->node_info->lim_bw) { -+ struct msm_bus_bimc_qos_mode qmode; -+ qmode.rl.qhealth[0].limit_commands = 1; -+ qmode.rl.qhealth[1].limit_commands = 0; -+ qmode.rl.qhealth[2].limit_commands = 0; -+ qmode.rl.qhealth[3].limit_commands = 0; -+ -+ for (i = 0; i < info->node_info->num_qports; i++) { -+ /* If not in bypass mode, update priority */ -+ if (mode != BIMC_QOS_MODE_BYPASS) -+ msm_bus_bimc_set_qos_prio(qos_base, -+ info->node_info->qport[i], mode, -+ &qmode); -+ } -+ } -+ -+ for (i = 0; i < info->node_info->num_qports; i++) { -+ struct msm_bus_bimc_qos_bw qbw; -+ /* If not in fixed mode, update bandwidth */ -+ if ((info->node_info->lim_bw != lim_bw)) { -+ qbw.ws = info->node_info->qos_params.ws; -+ qbw.bw = lim_bw; -+ qbw.gp = info->node_info->qos_params.gp; -+ qbw.thmp = info->node_info->qos_params.thmp; -+ bimc_set_static_qos_bw(qos_base, qos_freq, -+ info->node_info->qport[i], &qbw); -+ } -+ bke_switch(qos_base, info->node_info->qport[i], -+ BKE_ON, mode); -+ } -+ info->node_info->lim_bw = lim_bw; -+ } else { -+ mode = info->node_info->qos_params.mode; -+ for (i = 0; i < info->node_info->num_qports; i++) { -+ bke_switch(qos_base, info->node_info->qport[i], -+ BKE_OFF, mode); -+ } -+ } -+ info->node_info->qos_params.cur_mode = mode; -+ return 0; -+} -+ -+static bool msm_bus_bimc_update_bw_reg(int mode) -+{ -+ bool ret = false; -+ -+ if ((mode == BIMC_QOS_MODE_LIMITER) -+ || (mode == BIMC_QOS_MODE_REGULATOR)) -+ ret = true; -+ -+ return ret; -+} -+ -+static int msm_bus_bimc_qos_init(struct msm_bus_node_device_type *info, -+ void __iomem *qos_base, -+ uint32_t qos_off, uint32_t qos_delta, -+ uint32_t qos_freq) -+{ -+ int i; -+ struct msm_bus_bimc_qos_mode qmode; -+ -+ switch (info->node_info->qos_params.mode) { -+ case BIMC_QOS_MODE_FIXED: -+ qmode.fixed.prio_level = info->node_info->qos_params.prio_lvl; -+ qmode.fixed.areq_prio_rd = info->node_info->qos_params.prio_rd; -+ qmode.fixed.areq_prio_wr = info->node_info->qos_params.prio_wr; -+ break; -+ case BIMC_QOS_MODE_LIMITER: -+ qmode.rl.qhealth[0].limit_commands = 1; -+ qmode.rl.qhealth[1].limit_commands = 0; -+ qmode.rl.qhealth[2].limit_commands = 0; -+ qmode.rl.qhealth[3].limit_commands = 0; -+ break; -+ default: -+ break; -+ } -+ -+ if (ZERO_OR_NULL_PTR(info->node_info->qport)) { -+ MSM_BUS_DBG("No QoS Ports to init\n"); -+ return 0; -+ } -+ -+ for (i = 0; i < info->node_info->num_qports; i++) { -+ /* If not in bypass mode, update priority */ -+ if (info->node_info->qos_params.mode != BIMC_QOS_MODE_BYPASS) -+ msm_bus_bimc_set_qos_prio(qos_base, info->node_info-> -+ qport[i], info->node_info->qos_params.mode, -+ &qmode); -+ -+ /* set mode */ -+ if (info->node_info->qos_params.mode == BIMC_QOS_MODE_LIMITER) -+ bke_switch(qos_base, info->node_info->qport[i], -+ BKE_OFF, BIMC_QOS_MODE_FIXED); -+ else -+ msm_bus_bimc_set_qos_mode(qos_base, -+ info->node_info->qport[i], -+ info->node_info->qos_params.mode); -+ } -+ -+ return 0; -+} -+ -+static int msm_bus_bimc_set_bw(struct msm_bus_node_device_type *dev, -+ void __iomem *qos_base, uint32_t qos_off, -+ uint32_t qos_delta, uint32_t qos_freq) -+{ -+ struct msm_bus_bimc_qos_bw qbw; -+ int i; -+ int64_t bw = 0; -+ int ret = 0; -+ struct msm_bus_node_info_type *info = dev->node_info; -+ -+ if (info && info->num_qports && -+ ((info->qos_params.mode == BIMC_QOS_MODE_LIMITER) || -+ (info->qos_params.mode == BIMC_QOS_MODE_REGULATOR))) { -+ bw = msm_bus_div64(info->num_qports, -+ dev->node_ab.ab[DUAL_CTX]); -+ -+ for (i = 0; i < info->num_qports; i++) { -+ MSM_BUS_DBG("BIMC: Update mas_bw for ID: %d -> %llu\n", -+ info->id, bw); -+ -+ if (!info->qport) { -+ MSM_BUS_DBG("No qos ports to update!\n"); -+ break; -+ } -+ -+ qbw.bw = bw + info->qos_params.bw_buffer; -+ trace_bus_bimc_config_limiter(info->id, bw); -+ -+ /* Default to gp of 5us */ -+ qbw.gp = (info->qos_params.gp ? -+ info->qos_params.gp : 5000); -+ /* Default to thmp of 50% */ -+ qbw.thmp = (info->qos_params.thmp ? -+ info->qos_params.thmp : 50); -+ /* -+ * If the BW vote is 0 then set the QoS mode to -+ * Fixed. -+ */ -+ if (bw) { -+ bimc_set_static_qos_bw(qos_base, qos_freq, -+ info->qport[i], &qbw); -+ bke_switch(qos_base, info->qport[i], -+ BKE_ON, info->qos_params.mode); -+ } else { -+ bke_switch(qos_base, info->qport[i], -+ BKE_OFF, BIMC_QOS_MODE_FIXED); -+ } -+ } -+ } -+ return ret; -+} -+ -+int msm_bus_bimc_hw_init(struct msm_bus_fabric_registration *pdata, -+ struct msm_bus_hw_algorithm *hw_algo) -+{ -+ /* Set interleaving to true by default */ -+ MSM_BUS_DBG("\nInitializing BIMC...\n"); -+ pdata->il_flag = true; -+ hw_algo->allocate_commit_data = msm_bus_bimc_allocate_commit_data; -+ hw_algo->allocate_hw_data = msm_bus_bimc_allocate_bimc_data; -+ hw_algo->node_init = msm_bus_bimc_node_init; -+ hw_algo->free_commit_data = free_commit_data; -+ hw_algo->update_bw = msm_bus_bimc_update_bw; -+ hw_algo->commit = msm_bus_bimc_commit; -+ hw_algo->port_halt = msm_bus_bimc_port_halt; -+ hw_algo->port_unhalt = msm_bus_bimc_port_unhalt; -+ hw_algo->config_master = msm_bus_bimc_config_master; -+ hw_algo->config_limiter = msm_bus_bimc_config_limiter; -+ hw_algo->update_bw_reg = msm_bus_bimc_update_bw_reg; -+ /* BIMC slaves are shared. Slave registers are set through RPM */ -+ if (!pdata->ahb) -+ pdata->rpm_enabled = 1; -+ return 0; -+} -+ -+int msm_bus_bimc_set_ops(struct msm_bus_node_device_type *bus_dev) -+{ -+ if (!bus_dev) -+ return -ENODEV; -+ else { -+ bus_dev->fabdev->noc_ops.qos_init = msm_bus_bimc_qos_init; -+ bus_dev->fabdev->noc_ops.set_bw = msm_bus_bimc_set_bw; -+ bus_dev->fabdev->noc_ops.limit_mport = msm_bus_bimc_limit_mport; -+ bus_dev->fabdev->noc_ops.update_bw_reg = -+ msm_bus_bimc_update_bw_reg; -+ } -+ return 0; -+} -+EXPORT_SYMBOL(msm_bus_bimc_set_ops); ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_bimc.h -@@ -0,0 +1,127 @@ -+/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _ARCH_ARM_MACH_MSM_BUS_BIMC_H -+#define _ARCH_ARM_MACH_MSM_BUS_BIMC_H -+ -+struct msm_bus_bimc_params { -+ uint32_t bus_id; -+ uint32_t addr_width; -+ uint32_t data_width; -+ uint32_t nmasters; -+ uint32_t nslaves; -+}; -+ -+struct msm_bus_bimc_commit { -+ struct msm_bus_node_hw_info *mas; -+ struct msm_bus_node_hw_info *slv; -+}; -+ -+struct msm_bus_bimc_info { -+ void __iomem *base; -+ uint32_t base_addr; -+ uint32_t qos_freq; -+ struct msm_bus_bimc_params params; -+ struct msm_bus_bimc_commit cdata[NUM_CTX]; -+}; -+ -+struct msm_bus_bimc_node { -+ uint32_t conn_mask; -+ uint32_t data_width; -+ uint8_t slv_arb_mode; -+}; -+ -+enum msm_bus_bimc_arb_mode { -+ BIMC_ARB_MODE_RR = 0, -+ BIMC_ARB_MODE_PRIORITY_RR, -+ BIMC_ARB_MODE_TIERED_RR, -+}; -+ -+ -+enum msm_bus_bimc_interleave { -+ BIMC_INTERLEAVE_NONE = 0, -+ BIMC_INTERLEAVE_ODD, -+ BIMC_INTERLEAVE_EVEN, -+}; -+ -+struct msm_bus_bimc_slave_seg { -+ bool enable; -+ uint64_t start_addr; -+ uint64_t seg_size; -+ uint8_t interleave; -+}; -+ -+enum msm_bus_bimc_qos_mode_type { -+ BIMC_QOS_MODE_FIXED = 0, -+ BIMC_QOS_MODE_LIMITER, -+ BIMC_QOS_MODE_BYPASS, -+ BIMC_QOS_MODE_REGULATOR, -+}; -+ -+struct msm_bus_bimc_qos_health { -+ bool limit_commands; -+ uint32_t areq_prio; -+ uint32_t prio_level; -+}; -+ -+struct msm_bus_bimc_mode_fixed { -+ uint32_t prio_level; -+ uint32_t areq_prio_rd; -+ uint32_t areq_prio_wr; -+}; -+ -+struct msm_bus_bimc_mode_rl { -+ uint8_t qhealthnum; -+ struct msm_bus_bimc_qos_health qhealth[4]; -+}; -+ -+struct msm_bus_bimc_qos_mode { -+ uint8_t mode; -+ struct msm_bus_bimc_mode_fixed fixed; -+ struct msm_bus_bimc_mode_rl rl; -+}; -+ -+struct msm_bus_bimc_qos_bw { -+ uint64_t bw; /* bw is in Bytes/sec */ -+ uint32_t ws; /* Window size in nano seconds*/ -+ int64_t thh; /* Threshold high, bytes per second */ -+ int64_t thm; /* Threshold medium, bytes per second */ -+ int64_t thl; /* Threshold low, bytes per second */ -+ u32 gp; /* Grant Period in micro seconds */ -+ u32 thmp; /* Threshold medium in percentage */ -+}; -+ -+struct msm_bus_bimc_clk_gate { -+ bool core_clk_gate_en; -+ bool arb_clk_gate_en; /* For arbiter */ -+ bool port_clk_gate_en; /* For regs on BIMC core clock */ -+}; -+ -+void msm_bus_bimc_set_slave_seg(struct msm_bus_bimc_info *binfo, -+ uint32_t slv_index, uint32_t seg_index, -+ struct msm_bus_bimc_slave_seg *bsseg); -+void msm_bus_bimc_set_slave_clk_gate(struct msm_bus_bimc_info *binfo, -+ uint32_t slv_index, struct msm_bus_bimc_clk_gate *bgate); -+void msm_bus_bimc_set_mas_clk_gate(struct msm_bus_bimc_info *binfo, -+ uint32_t mas_index, struct msm_bus_bimc_clk_gate *bgate); -+void msm_bus_bimc_arb_en(struct msm_bus_bimc_info *binfo, -+ uint32_t slv_index, bool en); -+void msm_bus_bimc_get_params(struct msm_bus_bimc_info *binfo, -+ struct msm_bus_bimc_params *params); -+void msm_bus_bimc_get_mas_params(struct msm_bus_bimc_info *binfo, -+ uint32_t mas_index, struct msm_bus_bimc_node *mparams); -+void msm_bus_bimc_get_slv_params(struct msm_bus_bimc_info *binfo, -+ uint32_t slv_index, struct msm_bus_bimc_node *sparams); -+bool msm_bus_bimc_get_arb_en(struct msm_bus_bimc_info *binfo, -+ uint32_t slv_index); -+ -+#endif /*_ARCH_ARM_MACH_MSM_BUS_BIMC_H*/ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_client_api.c -@@ -0,0 +1,83 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "msm-bus.h" -+#include "msm_bus_core.h" -+ -+struct msm_bus_arb_ops arb_ops; -+ -+/** -+ * msm_bus_scale_register_client() - Register the clients with the msm bus -+ * driver -+ * @pdata: Platform data of the client, containing src, dest, ab, ib. -+ * Return non-zero value in case of success, 0 in case of failure. -+ * -+ * Client data contains the vectors specifying arbitrated bandwidth (ab) -+ * and instantaneous bandwidth (ib) requested between a particular -+ * src and dest. -+ */ -+uint32_t msm_bus_scale_register_client(struct msm_bus_scale_pdata *pdata) -+{ -+ if (arb_ops.register_client) -+ return arb_ops.register_client(pdata); -+ else { -+ pr_err("%s: Bus driver not ready.", -+ __func__); -+ return 0; -+ } -+} -+EXPORT_SYMBOL(msm_bus_scale_register_client); -+ -+/** -+ * msm_bus_scale_client_update_request() - Update the request for bandwidth -+ * from a particular client -+ * -+ * cl: Handle to the client -+ * index: Index into the vector, to which the bw and clock values need to be -+ * updated -+ */ -+int msm_bus_scale_client_update_request(uint32_t cl, unsigned int index) -+{ -+ if (arb_ops.update_request) -+ return arb_ops.update_request(cl, index); -+ else { -+ pr_err("%s: Bus driver not ready.", -+ __func__); -+ return -EPROBE_DEFER; -+ } -+} -+EXPORT_SYMBOL(msm_bus_scale_client_update_request); -+ -+/** -+ * msm_bus_scale_unregister_client() - Unregister the client from the bus driver -+ * @cl: Handle to the client -+ */ -+void msm_bus_scale_unregister_client(uint32_t cl) -+{ -+ if (arb_ops.unregister_client) -+ arb_ops.unregister_client(cl); -+ else { -+ pr_err("%s: Bus driver not ready.", -+ __func__); -+ } -+} -+EXPORT_SYMBOL(msm_bus_scale_unregister_client); ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_core.c -@@ -0,0 +1,125 @@ -+/* Copyright (c) 2010-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "msm-bus-board.h" -+#include "msm-bus.h" -+#include "msm_bus_core.h" -+ -+static atomic_t num_fab = ATOMIC_INIT(0); -+ -+int msm_bus_get_num_fab(void) -+{ -+ return atomic_read(&num_fab); -+} -+ -+int msm_bus_device_match(struct device *dev, void *id) -+{ -+ struct msm_bus_fabric_device *fabdev = to_msm_bus_fabric_device(dev); -+ -+ if (!fabdev) { -+ MSM_BUS_WARN("Fabric %p returning 0\n", fabdev); -+ return 0; -+ } -+ return fabdev->id == *(int *)id; -+} -+ -+static void msm_bus_release(struct device *device) -+{ -+} -+ -+struct bus_type msm_bus_type = { -+ .name = "msm-bus-type", -+}; -+EXPORT_SYMBOL(msm_bus_type); -+ -+/** -+ * msm_bus_get_fabric_device() - This function is used to search for -+ * the fabric device on the bus -+ * @fabid: Fabric id -+ * Function returns: Pointer to the fabric device -+ */ -+struct msm_bus_fabric_device *msm_bus_get_fabric_device(int fabid) -+{ -+ struct device *dev; -+ struct msm_bus_fabric_device *fabric; -+ dev = bus_find_device(&msm_bus_type, NULL, (void *)&fabid, -+ msm_bus_device_match); -+ if (!dev) -+ return NULL; -+ fabric = to_msm_bus_fabric_device(dev); -+ return fabric; -+} -+ -+/** -+ * msm_bus_fabric_device_register() - Registers a fabric on msm bus -+ * @fabdev: Fabric device to be registered -+ */ -+int msm_bus_fabric_device_register(struct msm_bus_fabric_device *fabdev) -+{ -+ int ret = 0; -+ fabdev->dev.bus = &msm_bus_type; -+ fabdev->dev.release = msm_bus_release; -+ ret = dev_set_name(&fabdev->dev, fabdev->name); -+ if (ret) { -+ MSM_BUS_ERR("error setting dev name\n"); -+ goto err; -+ } -+ -+ ret = device_register(&fabdev->dev); -+ if (ret < 0) { -+ MSM_BUS_ERR("error registering device%d %s\n", -+ ret, fabdev->name); -+ goto err; -+ } -+ atomic_inc(&num_fab); -+err: -+ return ret; -+} -+ -+/** -+ * msm_bus_fabric_device_unregister() - Unregisters the fabric -+ * devices from the msm bus -+ */ -+void msm_bus_fabric_device_unregister(struct msm_bus_fabric_device *fabdev) -+{ -+ device_unregister(&fabdev->dev); -+ atomic_dec(&num_fab); -+} -+ -+static void __exit msm_bus_exit(void) -+{ -+ bus_unregister(&msm_bus_type); -+} -+ -+static int __init msm_bus_init(void) -+{ -+ int retval = 0; -+ retval = bus_register(&msm_bus_type); -+ if (retval) -+ MSM_BUS_ERR("bus_register error! %d\n", -+ retval); -+ return retval; -+} -+postcore_initcall(msm_bus_init); -+module_exit(msm_bus_exit); -+MODULE_LICENSE("GPL v2"); -+MODULE_VERSION("0.2"); -+MODULE_ALIAS("platform:msm_bus"); ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_core.h -@@ -0,0 +1,375 @@ -+/* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _ARCH_ARM_MACH_MSM_BUS_CORE_H -+#define _ARCH_ARM_MACH_MSM_BUS_CORE_H -+ -+#include -+#include -+#include -+#include -+#include "msm-bus-board.h" -+#include "msm-bus.h" -+ -+#define MSM_BUS_DBG(msg, ...) \ -+ pr_debug(msg, ## __VA_ARGS__) -+#define MSM_BUS_ERR(msg, ...) \ -+ pr_err(msg, ## __VA_ARGS__) -+#define MSM_BUS_WARN(msg, ...) \ -+ pr_warn(msg, ## __VA_ARGS__) -+#define MSM_FAB_ERR(msg, ...) \ -+ dev_err(&fabric->fabdev.dev, msg, ## __VA_ARGS__) -+ -+#define IS_MASTER_VALID(mas) \ -+ (((mas >= MSM_BUS_MASTER_FIRST) && (mas <= MSM_BUS_MASTER_LAST)) \ -+ ? 1 : 0) -+#define IS_SLAVE_VALID(slv) \ -+ (((slv >= MSM_BUS_SLAVE_FIRST) && (slv <= MSM_BUS_SLAVE_LAST)) ? 1 : 0) -+ -+#define INTERLEAVED_BW(fab_pdata, bw, ports) \ -+ ((fab_pdata->il_flag) ? ((bw < 0) \ -+ ? -msm_bus_div64((ports), (-bw)) : msm_bus_div64((ports), (bw))) : (bw)) -+#define INTERLEAVED_VAL(fab_pdata, n) \ -+ ((fab_pdata->il_flag) ? (n) : 1) -+#define KBTOB(a) (a * 1000ULL) -+ -+enum msm_bus_dbg_op_type { -+ MSM_BUS_DBG_UNREGISTER = -2, -+ MSM_BUS_DBG_REGISTER, -+ MSM_BUS_DBG_OP = 1, -+}; -+ -+enum msm_bus_hw_sel { -+ MSM_BUS_RPM = 0, -+ MSM_BUS_NOC, -+ MSM_BUS_BIMC, -+}; -+ -+struct msm_bus_arb_ops { -+ uint32_t (*register_client)(struct msm_bus_scale_pdata *pdata); -+ int (*update_request)(uint32_t cl, unsigned int index); -+ void (*unregister_client)(uint32_t cl); -+}; -+ -+enum { -+ SLAVE_NODE, -+ MASTER_NODE, -+ CLK_NODE, -+ NR_LIM_NODE, -+}; -+ -+ -+extern struct bus_type msm_bus_type; -+extern struct msm_bus_arb_ops arb_ops; -+extern void msm_bus_arb_setops_legacy(struct msm_bus_arb_ops *arb_ops); -+ -+struct msm_bus_node_info { -+ unsigned int id; -+ unsigned int priv_id; -+ unsigned int mas_hw_id; -+ unsigned int slv_hw_id; -+ int gateway; -+ int *masterp; -+ int *qport; -+ int num_mports; -+ int *slavep; -+ int num_sports; -+ int *tier; -+ int num_tiers; -+ int ahb; -+ int hw_sel; -+ const char *slaveclk[NUM_CTX]; -+ const char *memclk[NUM_CTX]; -+ const char *iface_clk_node; -+ unsigned int buswidth; -+ unsigned int ws; -+ unsigned int mode; -+ unsigned int perm_mode; -+ unsigned int prio_lvl; -+ unsigned int prio_rd; -+ unsigned int prio_wr; -+ unsigned int prio1; -+ unsigned int prio0; -+ unsigned int num_thresh; -+ u64 *th; -+ u64 cur_lim_bw; -+ unsigned int mode_thresh; -+ bool dual_conf; -+ u64 *bimc_bw; -+ bool nr_lim; -+ u32 ff; -+ bool rt_mas; -+ u32 bimc_gp; -+ u32 bimc_thmp; -+ u64 floor_bw; -+ const char *name; -+}; -+ -+struct path_node { -+ uint64_t clk[NUM_CTX]; -+ uint64_t bw[NUM_CTX]; -+ uint64_t *sel_clk; -+ uint64_t *sel_bw; -+ int next; -+}; -+ -+struct msm_bus_link_info { -+ uint64_t clk[NUM_CTX]; -+ uint64_t *sel_clk; -+ uint64_t memclk; -+ int64_t bw[NUM_CTX]; -+ int64_t *sel_bw; -+ int *tier; -+ int num_tiers; -+}; -+ -+struct nodeclk { -+ struct clk *clk; -+ uint64_t rate; -+ bool dirty; -+ bool enable; -+}; -+ -+struct msm_bus_inode_info { -+ struct msm_bus_node_info *node_info; -+ uint64_t max_bw; -+ uint64_t max_clk; -+ uint64_t cur_lim_bw; -+ uint64_t cur_prg_bw; -+ struct msm_bus_link_info link_info; -+ int num_pnodes; -+ struct path_node *pnode; -+ int commit_index; -+ struct nodeclk nodeclk[NUM_CTX]; -+ struct nodeclk memclk[NUM_CTX]; -+ struct nodeclk iface_clk; -+ void *hw_data; -+}; -+ -+struct msm_bus_node_hw_info { -+ bool dirty; -+ unsigned int hw_id; -+ uint64_t bw; -+}; -+ -+struct msm_bus_hw_algorithm { -+ int (*allocate_commit_data)(struct msm_bus_fabric_registration -+ *fab_pdata, void **cdata, int ctx); -+ void *(*allocate_hw_data)(struct platform_device *pdev, -+ struct msm_bus_fabric_registration *fab_pdata); -+ void (*node_init)(void *hw_data, struct msm_bus_inode_info *info); -+ void (*free_commit_data)(void *cdata); -+ void (*update_bw)(struct msm_bus_inode_info *hop, -+ struct msm_bus_inode_info *info, -+ struct msm_bus_fabric_registration *fab_pdata, -+ void *sel_cdata, int *master_tiers, -+ int64_t add_bw); -+ void (*fill_cdata_buffer)(int *curr, char *buf, const int max_size, -+ void *cdata, int nmasters, int nslaves, int ntslaves); -+ int (*commit)(struct msm_bus_fabric_registration -+ *fab_pdata, void *hw_data, void **cdata); -+ int (*port_unhalt)(uint32_t haltid, uint8_t mport); -+ int (*port_halt)(uint32_t haltid, uint8_t mport); -+ void (*config_master)(struct msm_bus_fabric_registration *fab_pdata, -+ struct msm_bus_inode_info *info, -+ uint64_t req_clk, uint64_t req_bw); -+ void (*config_limiter)(struct msm_bus_fabric_registration *fab_pdata, -+ struct msm_bus_inode_info *info); -+ bool (*update_bw_reg)(int mode); -+}; -+ -+struct msm_bus_fabric_device { -+ int id; -+ const char *name; -+ struct device dev; -+ const struct msm_bus_fab_algorithm *algo; -+ const struct msm_bus_board_algorithm *board_algo; -+ struct msm_bus_hw_algorithm hw_algo; -+ int visited; -+ int num_nr_lim; -+ u64 nr_lim_thresh; -+ u32 eff_fact; -+}; -+#define to_msm_bus_fabric_device(d) container_of(d, \ -+ struct msm_bus_fabric_device, d) -+ -+struct msm_bus_fabric { -+ struct msm_bus_fabric_device fabdev; -+ int ahb; -+ void *cdata[NUM_CTX]; -+ bool arb_dirty; -+ bool clk_dirty; -+ struct radix_tree_root fab_tree; -+ int num_nodes; -+ struct list_head gateways; -+ struct msm_bus_inode_info info; -+ struct msm_bus_fabric_registration *pdata; -+ void *hw_data; -+}; -+#define to_msm_bus_fabric(d) container_of(d, \ -+ struct msm_bus_fabric, d) -+ -+ -+struct msm_bus_fab_algorithm { -+ int (*update_clks)(struct msm_bus_fabric_device *fabdev, -+ struct msm_bus_inode_info *pme, int index, -+ uint64_t curr_clk, uint64_t req_clk, -+ uint64_t bwsum, int flag, int ctx, -+ unsigned int cl_active_flag); -+ int (*port_halt)(struct msm_bus_fabric_device *fabdev, int portid); -+ int (*port_unhalt)(struct msm_bus_fabric_device *fabdev, int portid); -+ int (*commit)(struct msm_bus_fabric_device *fabdev); -+ struct msm_bus_inode_info *(*find_node)(struct msm_bus_fabric_device -+ *fabdev, int id); -+ struct msm_bus_inode_info *(*find_gw_node)(struct msm_bus_fabric_device -+ *fabdev, int id); -+ struct list_head *(*get_gw_list)(struct msm_bus_fabric_device *fabdev); -+ void (*update_bw)(struct msm_bus_fabric_device *fabdev, struct -+ msm_bus_inode_info * hop, struct msm_bus_inode_info *info, -+ int64_t add_bw, int *master_tiers, int ctx); -+ void (*config_master)(struct msm_bus_fabric_device *fabdev, -+ struct msm_bus_inode_info *info, uint64_t req_clk, -+ uint64_t req_bw); -+ void (*config_limiter)(struct msm_bus_fabric_device *fabdev, -+ struct msm_bus_inode_info *info); -+}; -+ -+struct msm_bus_board_algorithm { -+ int board_nfab; -+ void (*assign_iids)(struct msm_bus_fabric_registration *fabreg, -+ int fabid); -+ int (*get_iid)(int id); -+}; -+ -+/** -+ * Used to store the list of fabrics and other info to be -+ * maintained outside the fabric structure. -+ * Used while calculating path, and to find fabric ptrs -+ */ -+struct msm_bus_fabnodeinfo { -+ struct list_head list; -+ struct msm_bus_inode_info *info; -+}; -+ -+struct msm_bus_client { -+ int id; -+ struct msm_bus_scale_pdata *pdata; -+ int *src_pnode; -+ int curr; -+}; -+ -+uint64_t msm_bus_div64(unsigned int width, uint64_t bw); -+int msm_bus_fabric_device_register(struct msm_bus_fabric_device *fabric); -+void msm_bus_fabric_device_unregister(struct msm_bus_fabric_device *fabric); -+struct msm_bus_fabric_device *msm_bus_get_fabric_device(int fabid); -+int msm_bus_get_num_fab(void); -+ -+ -+int msm_bus_hw_fab_init(struct msm_bus_fabric_registration *pdata, -+ struct msm_bus_hw_algorithm *hw_algo); -+void msm_bus_board_init(struct msm_bus_fabric_registration *pdata); -+void msm_bus_board_set_nfab(struct msm_bus_fabric_registration *pdata, -+ int nfab); -+#if defined(CONFIG_MSM_RPM_SMD) -+int msm_bus_rpm_hw_init(struct msm_bus_fabric_registration *pdata, -+ struct msm_bus_hw_algorithm *hw_algo); -+int msm_bus_remote_hw_commit(struct msm_bus_fabric_registration -+ *fab_pdata, void *hw_data, void **cdata); -+void msm_bus_rpm_fill_cdata_buffer(int *curr, char *buf, const int max_size, -+ void *cdata, int nmasters, int nslaves, int ntslaves); -+#else -+static inline int msm_bus_rpm_hw_init(struct msm_bus_fabric_registration *pdata, -+ struct msm_bus_hw_algorithm *hw_algo) -+{ -+ return 0; -+} -+static inline int msm_bus_remote_hw_commit(struct msm_bus_fabric_registration -+ *fab_pdata, void *hw_data, void **cdata) -+{ -+ return 0; -+} -+static inline void msm_bus_rpm_fill_cdata_buffer(int *curr, char *buf, -+ const int max_size, void *cdata, int nmasters, int nslaves, -+ int ntslaves) -+{ -+} -+#endif -+ -+int msm_bus_noc_hw_init(struct msm_bus_fabric_registration *pdata, -+ struct msm_bus_hw_algorithm *hw_algo); -+int msm_bus_bimc_hw_init(struct msm_bus_fabric_registration *pdata, -+ struct msm_bus_hw_algorithm *hw_algo); -+#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_MSM_BUS_SCALING) -+void msm_bus_dbg_client_data(struct msm_bus_scale_pdata *pdata, int index, -+ uint32_t cl); -+void msm_bus_dbg_commit_data(const char *fabname, void *cdata, -+ int nmasters, int nslaves, int ntslaves, int op); -+#else -+static inline void msm_bus_dbg_client_data(struct msm_bus_scale_pdata *pdata, -+ int index, uint32_t cl) -+{ -+} -+static inline void msm_bus_dbg_commit_data(const char *fabname, -+ void *cdata, int nmasters, int nslaves, int ntslaves, -+ int op) -+{ -+} -+#endif -+ -+#ifdef CONFIG_CORESIGHT -+int msmbus_coresight_init(struct platform_device *pdev); -+void msmbus_coresight_remove(struct platform_device *pdev); -+int msmbus_coresight_init_adhoc(struct platform_device *pdev, -+ struct device_node *of_node); -+void msmbus_coresight_remove_adhoc(struct platform_device *pdev); -+#else -+static inline int msmbus_coresight_init(struct platform_device *pdev) -+{ -+ return 0; -+} -+ -+static inline void msmbus_coresight_remove(struct platform_device *pdev) -+{ -+} -+ -+static inline int msmbus_coresight_init_adhoc(struct platform_device *pdev, -+ struct device_node *of_node) -+{ -+ return 0; -+} -+ -+static inline void msmbus_coresight_remove_adhoc(struct platform_device *pdev) -+{ -+} -+#endif -+ -+ -+#ifdef CONFIG_OF -+void msm_bus_of_get_nfab(struct platform_device *pdev, -+ struct msm_bus_fabric_registration *pdata); -+struct msm_bus_fabric_registration -+ *msm_bus_of_get_fab_data(struct platform_device *pdev); -+#else -+static inline void msm_bus_of_get_nfab(struct platform_device *pdev, -+ struct msm_bus_fabric_registration *pdata) -+{ -+ return; -+} -+ -+static inline struct msm_bus_fabric_registration -+ *msm_bus_of_get_fab_data(struct platform_device *pdev) -+{ -+ return NULL; -+} -+#endif -+ -+#endif /*_ARCH_ARM_MACH_MSM_BUS_CORE_H*/ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_dbg.c -@@ -0,0 +1,810 @@ -+/* Copyright (c) 2010-2012, 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "msm-bus-board.h" -+#include "msm-bus.h" -+#include "msm_bus_rules.h" -+#include "msm_bus_core.h" -+#include "msm_bus_adhoc.h" -+ -+#define CREATE_TRACE_POINTS -+#include -+ -+#define MAX_BUFF_SIZE 4096 -+#define FILL_LIMIT 128 -+ -+static struct dentry *clients; -+static struct dentry *dir; -+static DEFINE_MUTEX(msm_bus_dbg_fablist_lock); -+struct msm_bus_dbg_state { -+ uint32_t cl; -+ uint8_t enable; -+ uint8_t current_index; -+} clstate; -+ -+struct msm_bus_cldata { -+ const struct msm_bus_scale_pdata *pdata; -+ int index; -+ uint32_t clid; -+ int size; -+ struct dentry *file; -+ struct list_head list; -+ char buffer[MAX_BUFF_SIZE]; -+}; -+ -+struct msm_bus_fab_list { -+ const char *name; -+ int size; -+ struct dentry *file; -+ struct list_head list; -+ char buffer[MAX_BUFF_SIZE]; -+}; -+ -+static char *rules_buf; -+ -+LIST_HEAD(fabdata_list); -+LIST_HEAD(cl_list); -+ -+/** -+ * The following structures and funtions are used for -+ * the test-client which can be created at run-time. -+ */ -+ -+static struct msm_bus_vectors init_vectors[1]; -+static struct msm_bus_vectors current_vectors[1]; -+static struct msm_bus_vectors requested_vectors[1]; -+ -+static struct msm_bus_paths shell_client_usecases[] = { -+ { -+ .num_paths = ARRAY_SIZE(init_vectors), -+ .vectors = init_vectors, -+ }, -+ { -+ .num_paths = ARRAY_SIZE(current_vectors), -+ .vectors = current_vectors, -+ }, -+ { -+ .num_paths = ARRAY_SIZE(requested_vectors), -+ .vectors = requested_vectors, -+ }, -+}; -+ -+static struct msm_bus_scale_pdata shell_client = { -+ .usecase = shell_client_usecases, -+ .num_usecases = ARRAY_SIZE(shell_client_usecases), -+ .name = "test-client", -+}; -+ -+static void msm_bus_dbg_init_vectors(void) -+{ -+ init_vectors[0].src = -1; -+ init_vectors[0].dst = -1; -+ init_vectors[0].ab = 0; -+ init_vectors[0].ib = 0; -+ current_vectors[0].src = -1; -+ current_vectors[0].dst = -1; -+ current_vectors[0].ab = 0; -+ current_vectors[0].ib = 0; -+ requested_vectors[0].src = -1; -+ requested_vectors[0].dst = -1; -+ requested_vectors[0].ab = 0; -+ requested_vectors[0].ib = 0; -+ clstate.enable = 0; -+ clstate.current_index = 0; -+} -+ -+static int msm_bus_dbg_update_cl_request(uint32_t cl) -+{ -+ int ret = 0; -+ -+ if (clstate.current_index < 2) -+ clstate.current_index = 2; -+ else { -+ clstate.current_index = 1; -+ current_vectors[0].ab = requested_vectors[0].ab; -+ current_vectors[0].ib = requested_vectors[0].ib; -+ } -+ -+ if (clstate.enable) { -+ MSM_BUS_DBG("Updating request for shell client, index: %d\n", -+ clstate.current_index); -+ ret = msm_bus_scale_client_update_request(clstate.cl, -+ clstate.current_index); -+ } else -+ MSM_BUS_DBG("Enable bit not set. Skipping update request\n"); -+ -+ return ret; -+} -+ -+static void msm_bus_dbg_unregister_client(uint32_t cl) -+{ -+ MSM_BUS_DBG("Unregistering shell client\n"); -+ msm_bus_scale_unregister_client(clstate.cl); -+ clstate.cl = 0; -+} -+ -+static uint32_t msm_bus_dbg_register_client(void) -+{ -+ int ret = 0; -+ -+ if (init_vectors[0].src != requested_vectors[0].src) { -+ MSM_BUS_DBG("Shell client master changed. Unregistering\n"); -+ msm_bus_dbg_unregister_client(clstate.cl); -+ } -+ if (init_vectors[0].dst != requested_vectors[0].dst) { -+ MSM_BUS_DBG("Shell client slave changed. Unregistering\n"); -+ msm_bus_dbg_unregister_client(clstate.cl); -+ } -+ -+ current_vectors[0].src = init_vectors[0].src; -+ requested_vectors[0].src = init_vectors[0].src; -+ current_vectors[0].dst = init_vectors[0].dst; -+ requested_vectors[0].dst = init_vectors[0].dst; -+ -+ if (!clstate.enable) { -+ MSM_BUS_DBG("Enable bit not set, skipping registration: cl " -+ "%d\n", clstate.cl); -+ return 0; -+ } -+ -+ if (clstate.cl) { -+ MSM_BUS_DBG("Client registered, skipping registration\n"); -+ return clstate.cl; -+ } -+ -+ MSM_BUS_DBG("Registering shell client\n"); -+ ret = msm_bus_scale_register_client(&shell_client); -+ return ret; -+} -+ -+static int msm_bus_dbg_mas_get(void *data, u64 *val) -+{ -+ *val = init_vectors[0].src; -+ MSM_BUS_DBG("Get master: %llu\n", *val); -+ return 0; -+} -+ -+static int msm_bus_dbg_mas_set(void *data, u64 val) -+{ -+ init_vectors[0].src = val; -+ MSM_BUS_DBG("Set master: %llu\n", val); -+ clstate.cl = msm_bus_dbg_register_client(); -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(shell_client_mas_fops, msm_bus_dbg_mas_get, -+ msm_bus_dbg_mas_set, "%llu\n"); -+ -+static int msm_bus_dbg_slv_get(void *data, u64 *val) -+{ -+ *val = init_vectors[0].dst; -+ MSM_BUS_DBG("Get slave: %llu\n", *val); -+ return 0; -+} -+ -+static int msm_bus_dbg_slv_set(void *data, u64 val) -+{ -+ init_vectors[0].dst = val; -+ MSM_BUS_DBG("Set slave: %llu\n", val); -+ clstate.cl = msm_bus_dbg_register_client(); -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(shell_client_slv_fops, msm_bus_dbg_slv_get, -+ msm_bus_dbg_slv_set, "%llu\n"); -+ -+static int msm_bus_dbg_ab_get(void *data, u64 *val) -+{ -+ *val = requested_vectors[0].ab; -+ MSM_BUS_DBG("Get ab: %llu\n", *val); -+ return 0; -+} -+ -+static int msm_bus_dbg_ab_set(void *data, u64 val) -+{ -+ requested_vectors[0].ab = val; -+ MSM_BUS_DBG("Set ab: %llu\n", val); -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(shell_client_ab_fops, msm_bus_dbg_ab_get, -+ msm_bus_dbg_ab_set, "%llu\n"); -+ -+static int msm_bus_dbg_ib_get(void *data, u64 *val) -+{ -+ *val = requested_vectors[0].ib; -+ MSM_BUS_DBG("Get ib: %llu\n", *val); -+ return 0; -+} -+ -+static int msm_bus_dbg_ib_set(void *data, u64 val) -+{ -+ requested_vectors[0].ib = val; -+ MSM_BUS_DBG("Set ib: %llu\n", val); -+ return 0; -+} -+DEFINE_SIMPLE_ATTRIBUTE(shell_client_ib_fops, msm_bus_dbg_ib_get, -+ msm_bus_dbg_ib_set, "%llu\n"); -+ -+static int msm_bus_dbg_en_get(void *data, u64 *val) -+{ -+ *val = clstate.enable; -+ MSM_BUS_DBG("Get enable: %llu\n", *val); -+ return 0; -+} -+ -+static int msm_bus_dbg_en_set(void *data, u64 val) -+{ -+ int ret = 0; -+ -+ clstate.enable = val; -+ if (clstate.enable) { -+ if (!clstate.cl) { -+ MSM_BUS_DBG("client: %u\n", clstate.cl); -+ clstate.cl = msm_bus_dbg_register_client(); -+ if (clstate.cl) -+ ret = msm_bus_dbg_update_cl_request(clstate.cl); -+ } else { -+ MSM_BUS_DBG("update request for cl: %u\n", clstate.cl); -+ ret = msm_bus_dbg_update_cl_request(clstate.cl); -+ } -+ } -+ -+ MSM_BUS_DBG("Set enable: %llu\n", val); -+ return ret; -+} -+DEFINE_SIMPLE_ATTRIBUTE(shell_client_en_fops, msm_bus_dbg_en_get, -+ msm_bus_dbg_en_set, "%llu\n"); -+ -+/** -+ * The following funtions are used for viewing the client data -+ * and changing the client request at run-time -+ */ -+ -+static ssize_t client_data_read(struct file *file, char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ int bsize = 0; -+ uint32_t cl = (uint32_t)(uintptr_t)file->private_data; -+ struct msm_bus_cldata *cldata = NULL; -+ int found = 0; -+ -+ list_for_each_entry(cldata, &cl_list, list) { -+ if (cldata->clid == cl) { -+ found = 1; -+ break; -+ } -+ } -+ if (!found) -+ return 0; -+ -+ bsize = cldata->size; -+ return simple_read_from_buffer(buf, count, ppos, -+ cldata->buffer, bsize); -+} -+ -+static int client_data_open(struct inode *inode, struct file *file) -+{ -+ file->private_data = inode->i_private; -+ return 0; -+} -+ -+static const struct file_operations client_data_fops = { -+ .open = client_data_open, -+ .read = client_data_read, -+}; -+ -+struct dentry *msm_bus_dbg_create(const char *name, mode_t mode, -+ struct dentry *dent, uint32_t clid) -+{ -+ if (dent == NULL) { -+ MSM_BUS_DBG("debugfs not ready yet\n"); -+ return NULL; -+ } -+ return debugfs_create_file(name, mode, dent, (void *)(uintptr_t)clid, -+ &client_data_fops); -+} -+ -+#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_MSM_BUS_SCALING) -+static int msm_bus_dbg_record_client(const struct msm_bus_scale_pdata *pdata, -+ int index, uint32_t clid, struct dentry *file) -+{ -+ struct msm_bus_cldata *cldata; -+ -+ cldata = kmalloc(sizeof(struct msm_bus_cldata), GFP_KERNEL); -+ if (!cldata) { -+ MSM_BUS_DBG("Failed to allocate memory for client data\n"); -+ return -ENOMEM; -+ } -+ cldata->pdata = pdata; -+ cldata->index = index; -+ cldata->clid = clid; -+ cldata->file = file; -+ cldata->size = 0; -+ list_add_tail(&cldata->list, &cl_list); -+ return 0; -+} -+ -+static void msm_bus_dbg_free_client(uint32_t clid) -+{ -+ struct msm_bus_cldata *cldata = NULL; -+ -+ list_for_each_entry(cldata, &cl_list, list) { -+ if (cldata->clid == clid) { -+ debugfs_remove(cldata->file); -+ list_del(&cldata->list); -+ kfree(cldata); -+ break; -+ } -+ } -+} -+ -+static int msm_bus_dbg_fill_cl_buffer(const struct msm_bus_scale_pdata *pdata, -+ int index, uint32_t clid) -+{ -+ int i = 0, j; -+ char *buf = NULL; -+ struct msm_bus_cldata *cldata = NULL; -+ struct timespec ts; -+ int found = 0; -+ -+ list_for_each_entry(cldata, &cl_list, list) { -+ if (cldata->clid == clid) { -+ found = 1; -+ break; -+ } -+ } -+ -+ if (!found) -+ return -ENOENT; -+ -+ if (cldata->file == NULL) { -+ if (pdata->name == NULL) { -+ MSM_BUS_DBG("Client doesn't have a name\n"); -+ return -EINVAL; -+ } -+ cldata->file = msm_bus_dbg_create(pdata->name, S_IRUGO, -+ clients, clid); -+ } -+ -+ if (cldata->size < (MAX_BUFF_SIZE - FILL_LIMIT)) -+ i = cldata->size; -+ else { -+ i = 0; -+ cldata->size = 0; -+ } -+ buf = cldata->buffer; -+ ts = ktime_to_timespec(ktime_get()); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "\n%d.%d\n", -+ (int)ts.tv_sec, (int)ts.tv_nsec); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "curr : %d\n", index); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "masters: "); -+ -+ for (j = 0; j < pdata->usecase->num_paths; j++) -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "%d ", -+ pdata->usecase[index].vectors[j].src); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "\nslaves : "); -+ for (j = 0; j < pdata->usecase->num_paths; j++) -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "%d ", -+ pdata->usecase[index].vectors[j].dst); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "\nab : "); -+ for (j = 0; j < pdata->usecase->num_paths; j++) -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "%llu ", -+ pdata->usecase[index].vectors[j].ab); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "\nib : "); -+ for (j = 0; j < pdata->usecase->num_paths; j++) -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "%llu ", -+ pdata->usecase[index].vectors[j].ib); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "\n"); -+ -+ for (j = 0; j < pdata->usecase->num_paths; j++) -+ trace_bus_update_request((int)ts.tv_sec, (int)ts.tv_nsec, -+ pdata->name, index, -+ pdata->usecase[index].vectors[j].src, -+ pdata->usecase[index].vectors[j].dst, -+ pdata->usecase[index].vectors[j].ab, -+ pdata->usecase[index].vectors[j].ib); -+ -+ cldata->size = i; -+ return i; -+} -+#endif -+ -+static int msm_bus_dbg_update_request(struct msm_bus_cldata *cldata, int index) -+{ -+ int ret = 0; -+ -+ if ((index < 0) || (index > cldata->pdata->num_usecases)) { -+ MSM_BUS_DBG("Invalid index!\n"); -+ return -EINVAL; -+ } -+ ret = msm_bus_scale_client_update_request(cldata->clid, index); -+ return ret; -+} -+ -+static ssize_t msm_bus_dbg_update_request_write(struct file *file, -+ const char __user *ubuf, size_t cnt, loff_t *ppos) -+{ -+ struct msm_bus_cldata *cldata; -+ unsigned long index = 0; -+ int ret = 0; -+ char *chid; -+ char *buf = kmalloc((sizeof(char) * (cnt + 1)), GFP_KERNEL); -+ int found = 0; -+ -+ if (!buf || IS_ERR(buf)) { -+ MSM_BUS_ERR("Memory allocation for buffer failed\n"); -+ return -ENOMEM; -+ } -+ if (cnt == 0) { -+ kfree(buf); -+ return 0; -+ } -+ if (copy_from_user(buf, ubuf, cnt)) { -+ kfree(buf); -+ return -EFAULT; -+ } -+ buf[cnt] = '\0'; -+ chid = buf; -+ MSM_BUS_DBG("buffer: %s\n size: %zu\n", buf, sizeof(ubuf)); -+ -+ list_for_each_entry(cldata, &cl_list, list) { -+ if (strnstr(chid, cldata->pdata->name, cnt)) { -+ found = 1; -+ cldata = cldata; -+ strsep(&chid, " "); -+ if (chid) { -+ ret = kstrtoul(chid, 10, &index); -+ if (ret) { -+ MSM_BUS_DBG("Index conversion" -+ " failed\n"); -+ return -EFAULT; -+ } -+ } else { -+ MSM_BUS_DBG("Error parsing input. Index not" -+ " found\n"); -+ found = 0; -+ } -+ break; -+ } -+ } -+ -+ if (found) -+ msm_bus_dbg_update_request(cldata, index); -+ kfree(buf); -+ return cnt; -+} -+ -+/** -+ * The following funtions are used for viewing the commit data -+ * for each fabric -+ */ -+static ssize_t fabric_data_read(struct file *file, char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ struct msm_bus_fab_list *fablist = NULL; -+ int bsize = 0; -+ ssize_t ret; -+ const char *name = file->private_data; -+ int found = 0; -+ -+ mutex_lock(&msm_bus_dbg_fablist_lock); -+ list_for_each_entry(fablist, &fabdata_list, list) { -+ if (strcmp(fablist->name, name) == 0) { -+ found = 1; -+ break; -+ } -+ } -+ if (!found) -+ return -ENOENT; -+ bsize = fablist->size; -+ ret = simple_read_from_buffer(buf, count, ppos, -+ fablist->buffer, bsize); -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+ return ret; -+} -+ -+static const struct file_operations fabric_data_fops = { -+ .open = client_data_open, -+ .read = fabric_data_read, -+}; -+ -+static ssize_t rules_dbg_read(struct file *file, char __user *buf, -+ size_t count, loff_t *ppos) -+{ -+ ssize_t ret; -+ memset(rules_buf, 0, MAX_BUFF_SIZE); -+ print_rules_buf(rules_buf, MAX_BUFF_SIZE); -+ ret = simple_read_from_buffer(buf, count, ppos, -+ rules_buf, MAX_BUFF_SIZE); -+ return ret; -+} -+ -+static int rules_dbg_open(struct inode *inode, struct file *file) -+{ -+ file->private_data = inode->i_private; -+ return 0; -+} -+ -+static const struct file_operations rules_dbg_fops = { -+ .open = rules_dbg_open, -+ .read = rules_dbg_read, -+}; -+ -+#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_MSM_BUS_SCALING) -+static int msm_bus_dbg_record_fabric(const char *fabname, struct dentry *file) -+{ -+ struct msm_bus_fab_list *fablist; -+ int ret = 0; -+ -+ mutex_lock(&msm_bus_dbg_fablist_lock); -+ fablist = kmalloc(sizeof(struct msm_bus_fab_list), GFP_KERNEL); -+ if (!fablist) { -+ MSM_BUS_DBG("Failed to allocate memory for commit data\n"); -+ ret = -ENOMEM; -+ goto err; -+ } -+ -+ fablist->name = fabname; -+ fablist->size = 0; -+ list_add_tail(&fablist->list, &fabdata_list); -+err: -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+ return ret; -+} -+ -+static void msm_bus_dbg_free_fabric(const char *fabname) -+{ -+ struct msm_bus_fab_list *fablist = NULL; -+ -+ mutex_lock(&msm_bus_dbg_fablist_lock); -+ list_for_each_entry(fablist, &fabdata_list, list) { -+ if (strcmp(fablist->name, fabname) == 0) { -+ debugfs_remove(fablist->file); -+ list_del(&fablist->list); -+ kfree(fablist); -+ break; -+ } -+ } -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+} -+ -+static int msm_bus_dbg_fill_fab_buffer(const char *fabname, -+ void *cdata, int nmasters, int nslaves, -+ int ntslaves) -+{ -+ int i; -+ char *buf = NULL; -+ struct msm_bus_fab_list *fablist = NULL; -+ struct timespec ts; -+ int found = 0; -+ -+ mutex_lock(&msm_bus_dbg_fablist_lock); -+ list_for_each_entry(fablist, &fabdata_list, list) { -+ if (strcmp(fablist->name, fabname) == 0) { -+ found = 1; -+ break; -+ } -+ } -+ if (!found) -+ return -ENOENT; -+ -+ if (fablist->file == NULL) { -+ MSM_BUS_DBG("Fabric dbg entry does not exist\n"); -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+ return -EFAULT; -+ } -+ -+ if (fablist->size < MAX_BUFF_SIZE - 256) -+ i = fablist->size; -+ else { -+ i = 0; -+ fablist->size = 0; -+ } -+ buf = fablist->buffer; -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+ ts = ktime_to_timespec(ktime_get()); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "\n%d.%d\n", -+ (int)ts.tv_sec, (int)ts.tv_nsec); -+ -+ msm_bus_rpm_fill_cdata_buffer(&i, buf, MAX_BUFF_SIZE, cdata, -+ nmasters, nslaves, ntslaves); -+ i += scnprintf(buf + i, MAX_BUFF_SIZE - i, "\n"); -+ mutex_lock(&msm_bus_dbg_fablist_lock); -+ fablist->size = i; -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+ return 0; -+} -+#endif -+ -+static const struct file_operations msm_bus_dbg_update_request_fops = { -+ .open = client_data_open, -+ .write = msm_bus_dbg_update_request_write, -+}; -+ -+#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_MSM_BUS_SCALING) -+/** -+ * msm_bus_dbg_client_data() - Add debug data for clients -+ * @pdata: Platform data of the client -+ * @index: The current index or operation to be performed -+ * @clid: Client handle obtained during registration -+ */ -+void msm_bus_dbg_client_data(struct msm_bus_scale_pdata *pdata, int index, -+ uint32_t clid) -+{ -+ struct dentry *file = NULL; -+ -+ if (index == MSM_BUS_DBG_REGISTER) { -+ msm_bus_dbg_record_client(pdata, index, clid, file); -+ if (!pdata->name) { -+ MSM_BUS_DBG("Cannot create debugfs entry. Null name\n"); -+ return; -+ } -+ } else if (index == MSM_BUS_DBG_UNREGISTER) { -+ msm_bus_dbg_free_client(clid); -+ MSM_BUS_DBG("Client %d unregistered\n", clid); -+ } else -+ msm_bus_dbg_fill_cl_buffer(pdata, index, clid); -+} -+EXPORT_SYMBOL(msm_bus_dbg_client_data); -+ -+/** -+ * msm_bus_dbg_commit_data() - Add commit data from fabrics -+ * @fabname: Fabric name specified in platform data -+ * @cdata: Commit Data -+ * @nmasters: Number of masters attached to fabric -+ * @nslaves: Number of slaves attached to fabric -+ * @ntslaves: Number of tiered slaves attached to fabric -+ * @op: Operation to be performed -+ */ -+void msm_bus_dbg_commit_data(const char *fabname, void *cdata, -+ int nmasters, int nslaves, int ntslaves, int op) -+{ -+ struct dentry *file = NULL; -+ -+ if (op == MSM_BUS_DBG_REGISTER) -+ msm_bus_dbg_record_fabric(fabname, file); -+ else if (op == MSM_BUS_DBG_UNREGISTER) -+ msm_bus_dbg_free_fabric(fabname); -+ else -+ msm_bus_dbg_fill_fab_buffer(fabname, cdata, nmasters, -+ nslaves, ntslaves); -+} -+EXPORT_SYMBOL(msm_bus_dbg_commit_data); -+#endif -+ -+static int __init msm_bus_debugfs_init(void) -+{ -+ struct dentry *commit, *shell_client, *rules_dbg; -+ struct msm_bus_fab_list *fablist; -+ struct msm_bus_cldata *cldata = NULL; -+ uint64_t val = 0; -+ -+ dir = debugfs_create_dir("msm-bus-dbg", NULL); -+ if ((!dir) || IS_ERR(dir)) { -+ MSM_BUS_ERR("Couldn't create msm-bus-dbg\n"); -+ goto err; -+ } -+ -+ clients = debugfs_create_dir("client-data", dir); -+ if ((!dir) || IS_ERR(dir)) { -+ MSM_BUS_ERR("Couldn't create clients\n"); -+ goto err; -+ } -+ -+ shell_client = debugfs_create_dir("shell-client", dir); -+ if ((!dir) || IS_ERR(dir)) { -+ MSM_BUS_ERR("Couldn't create clients\n"); -+ goto err; -+ } -+ -+ commit = debugfs_create_dir("commit-data", dir); -+ if ((!dir) || IS_ERR(dir)) { -+ MSM_BUS_ERR("Couldn't create commit\n"); -+ goto err; -+ } -+ -+ rules_dbg = debugfs_create_dir("rules-dbg", dir); -+ if ((!rules_dbg) || IS_ERR(rules_dbg)) { -+ MSM_BUS_ERR("Couldn't create rules-dbg\n"); -+ goto err; -+ } -+ -+ if (debugfs_create_file("print_rules", S_IRUGO | S_IWUSR, -+ rules_dbg, &val, &rules_dbg_fops) == NULL) -+ goto err; -+ -+ if (debugfs_create_file("update_request", S_IRUGO | S_IWUSR, -+ shell_client, &val, &shell_client_en_fops) == NULL) -+ goto err; -+ if (debugfs_create_file("ib", S_IRUGO | S_IWUSR, shell_client, &val, -+ &shell_client_ib_fops) == NULL) -+ goto err; -+ if (debugfs_create_file("ab", S_IRUGO | S_IWUSR, shell_client, &val, -+ &shell_client_ab_fops) == NULL) -+ goto err; -+ if (debugfs_create_file("slv", S_IRUGO | S_IWUSR, shell_client, -+ &val, &shell_client_slv_fops) == NULL) -+ goto err; -+ if (debugfs_create_file("mas", S_IRUGO | S_IWUSR, shell_client, -+ &val, &shell_client_mas_fops) == NULL) -+ goto err; -+ if (debugfs_create_file("update-request", S_IRUGO | S_IWUSR, -+ clients, NULL, &msm_bus_dbg_update_request_fops) == NULL) -+ goto err; -+ -+ rules_buf = kzalloc(MAX_BUFF_SIZE, GFP_KERNEL); -+ if (!rules_buf) { -+ MSM_BUS_ERR("Failed to alloc rules_buf"); -+ goto err; -+ } -+ -+ list_for_each_entry(cldata, &cl_list, list) { -+ if (cldata->pdata->name == NULL) { -+ MSM_BUS_DBG("Client name not found\n"); -+ continue; -+ } -+ cldata->file = msm_bus_dbg_create(cldata-> -+ pdata->name, S_IRUGO, clients, cldata->clid); -+ } -+ -+ mutex_lock(&msm_bus_dbg_fablist_lock); -+ list_for_each_entry(fablist, &fabdata_list, list) { -+ fablist->file = debugfs_create_file(fablist->name, S_IRUGO, -+ commit, (void *)fablist->name, &fabric_data_fops); -+ if (fablist->file == NULL) { -+ MSM_BUS_DBG("Cannot create files for commit data\n"); -+ kfree(rules_buf); -+ goto err; -+ } -+ } -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+ -+ msm_bus_dbg_init_vectors(); -+ return 0; -+err: -+ debugfs_remove_recursive(dir); -+ return -ENODEV; -+} -+late_initcall(msm_bus_debugfs_init); -+ -+static void __exit msm_bus_dbg_teardown(void) -+{ -+ struct msm_bus_fab_list *fablist = NULL, *fablist_temp; -+ struct msm_bus_cldata *cldata = NULL, *cldata_temp; -+ -+ debugfs_remove_recursive(dir); -+ list_for_each_entry_safe(cldata, cldata_temp, &cl_list, list) { -+ list_del(&cldata->list); -+ kfree(cldata); -+ } -+ mutex_lock(&msm_bus_dbg_fablist_lock); -+ list_for_each_entry_safe(fablist, fablist_temp, &fabdata_list, list) { -+ list_del(&fablist->list); -+ kfree(fablist); -+ } -+ kfree(rules_buf); -+ mutex_unlock(&msm_bus_dbg_fablist_lock); -+} -+module_exit(msm_bus_dbg_teardown); -+MODULE_DESCRIPTION("Debugfs for msm bus scaling client"); -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Gagan Mac "); ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_fabric_adhoc.c -@@ -0,0 +1,1281 @@ -+/* Copyright (c) 2014, Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "rpm-smd.h" -+#include "msm_bus_core.h" -+#include "msm_bus_adhoc.h" -+#include "msm_bus_noc.h" -+#include "msm_bus_bimc.h" -+ -+ssize_t vrail_show(struct device *dev, struct device_attribute *attr, -+ char *buf) -+{ -+ struct msm_bus_node_info_type *node_info = NULL; -+ struct msm_bus_node_device_type *bus_node = NULL; -+ -+ bus_node = dev->platform_data; -+ if (!bus_node) -+ return -EINVAL; -+ node_info = bus_node->node_info; -+ -+ return snprintf(buf, PAGE_SIZE, "%u", node_info->vrail_comp); -+} -+ -+ssize_t vrail_store(struct device *dev, struct device_attribute *attr, -+ const char *buf, size_t count) -+{ -+ struct msm_bus_node_info_type *node_info = NULL; -+ struct msm_bus_node_device_type *bus_node = NULL; -+ int ret = 0; -+ -+ bus_node = dev->platform_data; -+ if (!bus_node) -+ return -EINVAL; -+ node_info = bus_node->node_info; -+ -+ ret = sscanf(buf, "%u", &node_info->vrail_comp); -+ if (ret != 1) -+ return -EINVAL; -+ return count; -+} -+ -+DEVICE_ATTR(vrail, 0600, vrail_show, vrail_store); -+ -+struct static_rules_type { -+ int num_rules; -+ struct bus_rule_type *rules; -+}; -+ -+static struct static_rules_type static_rules; -+ -+static int enable_nodeclk(struct nodeclk *nclk) -+{ -+ int ret = 0; -+ -+ if (!nclk->enable) { -+ ret = clk_prepare_enable(nclk->clk); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: failed to enable clk ", __func__); -+ nclk->enable = false; -+ } else -+ nclk->enable = true; -+ } -+ return ret; -+} -+ -+static int disable_nodeclk(struct nodeclk *nclk) -+{ -+ int ret = 0; -+ -+ if (nclk->enable) { -+ clk_disable_unprepare(nclk->clk); -+ nclk->enable = false; -+ } -+ return ret; -+} -+ -+static int setrate_nodeclk(struct nodeclk *nclk, long rate) -+{ -+ int ret = 0; -+ -+ ret = clk_set_rate(nclk->clk, rate); -+ -+ if (ret) -+ MSM_BUS_ERR("%s: failed to setrate clk", __func__); -+ return ret; -+} -+ -+static int msm_bus_agg_fab_clks(struct device *bus_dev, void *data) -+{ -+ struct msm_bus_node_device_type *node = NULL; -+ int ret = 0; -+ int ctx = *(int *)data; -+ -+ if (ctx >= NUM_CTX) { -+ MSM_BUS_ERR("%s: Invalid Context %d", __func__, ctx); -+ goto exit_agg_fab_clks; -+ } -+ -+ node = bus_dev->platform_data; -+ if (!node) { -+ MSM_BUS_ERR("%s: Can't get device info", __func__); -+ goto exit_agg_fab_clks; -+ } -+ -+ if (!node->node_info->is_fab_dev) { -+ struct msm_bus_node_device_type *bus_dev = NULL; -+ -+ bus_dev = node->node_info->bus_device->platform_data; -+ -+ if (node->cur_clk_hz[ctx] >= bus_dev->cur_clk_hz[ctx]) -+ bus_dev->cur_clk_hz[ctx] = node->cur_clk_hz[ctx]; -+ } -+ -+exit_agg_fab_clks: -+ return ret; -+} -+ -+static int msm_bus_reset_fab_clks(struct device *bus_dev, void *data) -+{ -+ struct msm_bus_node_device_type *node = NULL; -+ int ret = 0; -+ int ctx = *(int *)data; -+ -+ if (ctx >= NUM_CTX) { -+ MSM_BUS_ERR("%s: Invalid Context %d", __func__, ctx); -+ goto exit_reset_fab_clks; -+ } -+ -+ node = bus_dev->platform_data; -+ if (!node) { -+ MSM_BUS_ERR("%s: Can't get device info", __func__); -+ goto exit_reset_fab_clks; -+ } -+ -+ if (node->node_info->is_fab_dev) { -+ node->cur_clk_hz[ctx] = 0; -+ MSM_BUS_DBG("Resetting for node %d", node->node_info->id); -+ } -+exit_reset_fab_clks: -+ return ret; -+} -+ -+ -+static int send_rpm_msg(struct device *device) -+{ -+ int ret = 0; -+ int ctx; -+ int rsc_type; -+ struct msm_bus_node_device_type *ndev = -+ device->platform_data; -+ struct msm_rpm_kvp rpm_kvp; -+ -+ if (!ndev) { -+ MSM_BUS_ERR("%s: Error getting node info.", __func__); -+ ret = -ENODEV; -+ goto exit_send_rpm_msg; -+ } -+ -+ rpm_kvp.length = sizeof(uint64_t); -+ rpm_kvp.key = RPM_MASTER_FIELD_BW; -+ -+ for (ctx = MSM_RPM_CTX_ACTIVE_SET; ctx <= MSM_RPM_CTX_SLEEP_SET; -+ ctx++) { -+ if (ctx == MSM_RPM_CTX_ACTIVE_SET) -+ rpm_kvp.data = -+ (uint8_t *)&ndev->node_ab.ab[MSM_RPM_CTX_ACTIVE_SET]; -+ else { -+ rpm_kvp.data = -+ (uint8_t *) &ndev->node_ab.ab[MSM_RPM_CTX_SLEEP_SET]; -+ } -+ -+ if (ndev->node_info->mas_rpm_id != -1) { -+ rsc_type = RPM_BUS_MASTER_REQ; -+ ret = msm_rpm_send_message(ctx, rsc_type, -+ ndev->node_info->mas_rpm_id, &rpm_kvp, 1); -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to send RPM message:", -+ __func__); -+ MSM_BUS_ERR("%s:Node Id %d RPM id %d", -+ __func__, ndev->node_info->id, -+ ndev->node_info->mas_rpm_id); -+ goto exit_send_rpm_msg; -+ } -+ } -+ -+ if (ndev->node_info->slv_rpm_id != -1) { -+ rsc_type = RPM_BUS_SLAVE_REQ; -+ ret = msm_rpm_send_message(ctx, rsc_type, -+ ndev->node_info->slv_rpm_id, &rpm_kvp, 1); -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to send RPM message:", -+ __func__); -+ MSM_BUS_ERR("%s: Node Id %d RPM id %d", -+ __func__, ndev->node_info->id, -+ ndev->node_info->slv_rpm_id); -+ goto exit_send_rpm_msg; -+ } -+ } -+ } -+exit_send_rpm_msg: -+ return ret; -+} -+ -+static int flush_bw_data(struct device *node_device, int ctx) -+{ -+ struct msm_bus_node_device_type *node_info; -+ int ret = 0; -+ -+ node_info = node_device->platform_data; -+ if (!node_info) { -+ MSM_BUS_ERR("%s: Unable to find bus device for device", -+ __func__); -+ ret = -ENODEV; -+ goto exit_flush_bw_data; -+ } -+ -+ if (node_info->node_ab.dirty) { -+ if (node_info->ap_owned) { -+ struct msm_bus_node_device_type *bus_device = -+ node_info->node_info->bus_device->platform_data; -+ struct msm_bus_fab_device_type *fabdev = -+ bus_device->fabdev; -+ -+ if (fabdev && fabdev->noc_ops.update_bw_reg && -+ fabdev->noc_ops.update_bw_reg -+ (node_info->node_info->qos_params.mode)) -+ ret = fabdev->noc_ops.set_bw(node_info, -+ fabdev->qos_base, -+ fabdev->base_offset, -+ fabdev->qos_off, -+ fabdev->qos_freq); -+ } else { -+ ret = send_rpm_msg(node_device); -+ -+ if (ret) -+ MSM_BUS_ERR("%s: Failed to send RPM msg for%d", -+ __func__, node_info->node_info->id); -+ } -+ node_info->node_ab.dirty = false; -+ } -+ -+exit_flush_bw_data: -+ return ret; -+ -+} -+ -+static int flush_clk_data(struct device *node_device, int ctx) -+{ -+ struct msm_bus_node_device_type *node; -+ struct nodeclk *nodeclk = NULL; -+ int ret = 0; -+ -+ node = node_device->platform_data; -+ if (!node) { -+ MSM_BUS_ERR("Unable to find bus device"); -+ ret = -ENODEV; -+ goto exit_flush_clk_data; -+ } -+ -+ nodeclk = &node->clk[ctx]; -+ if (node->node_info->is_fab_dev) { -+ if (nodeclk->rate != node->cur_clk_hz[ctx]) { -+ nodeclk->rate = node->cur_clk_hz[ctx]; -+ nodeclk->dirty = true; -+ } -+ } -+ -+ if (nodeclk && nodeclk->clk && nodeclk->dirty) { -+ long rounded_rate; -+ -+ if (nodeclk->rate) { -+ rounded_rate = clk_round_rate(nodeclk->clk, -+ nodeclk->rate); -+ ret = setrate_nodeclk(nodeclk, rounded_rate); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to set_rate %lu for %d", -+ __func__, rounded_rate, -+ node->node_info->id); -+ ret = -ENODEV; -+ goto exit_flush_clk_data; -+ } -+ -+ ret = enable_nodeclk(nodeclk); -+ } else -+ ret = disable_nodeclk(nodeclk); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to enable for %d", __func__, -+ node->node_info->id); -+ ret = -ENODEV; -+ goto exit_flush_clk_data; -+ } -+ MSM_BUS_DBG("%s: Updated %d clk to %llu", __func__, -+ node->node_info->id, nodeclk->rate); -+ -+ } -+exit_flush_clk_data: -+ /* Reset the aggregated clock rate for fab devices*/ -+ if (node && node->node_info->is_fab_dev) -+ node->cur_clk_hz[ctx] = 0; -+ -+ if (nodeclk) -+ nodeclk->dirty = 0; -+ return ret; -+} -+ -+int msm_bus_commit_data(int *dirty_nodes, int ctx, int num_dirty) -+{ -+ int ret = 0; -+ int i = 0; -+ -+ /* Aggregate the bus clocks */ -+ bus_for_each_dev(&msm_bus_type, NULL, (void *)&ctx, -+ msm_bus_agg_fab_clks); -+ -+ for (i = 0; i < num_dirty; i++) { -+ struct device *node_device = -+ bus_find_device(&msm_bus_type, NULL, -+ (void *)&dirty_nodes[i], -+ msm_bus_device_match_adhoc); -+ -+ if (!node_device) { -+ MSM_BUS_ERR("Can't find device for %d", dirty_nodes[i]); -+ continue; -+ } -+ -+ ret = flush_bw_data(node_device, ctx); -+ if (ret) -+ MSM_BUS_ERR("%s: Error flushing bw data for node %d", -+ __func__, dirty_nodes[i]); -+ -+ ret = flush_clk_data(node_device, ctx); -+ if (ret) -+ MSM_BUS_ERR("%s: Error flushing clk data for node %d", -+ __func__, dirty_nodes[i]); -+ } -+ kfree(dirty_nodes); -+ /* Aggregate the bus clocks */ -+ bus_for_each_dev(&msm_bus_type, NULL, (void *)&ctx, -+ msm_bus_reset_fab_clks); -+ return ret; -+} -+ -+void *msm_bus_realloc_devmem(struct device *dev, void *p, size_t old_size, -+ size_t new_size, gfp_t flags) -+{ -+ void *ret; -+ size_t copy_size = old_size; -+ -+ if (!new_size) { -+ devm_kfree(dev, p); -+ return ZERO_SIZE_PTR; -+ } -+ -+ if (new_size < old_size) -+ copy_size = new_size; -+ -+ ret = devm_kzalloc(dev, new_size, flags); -+ if (!ret) { -+ MSM_BUS_ERR("%s: Error Reallocating memory", __func__); -+ goto exit_realloc_devmem; -+ } -+ -+ memcpy(ret, p, copy_size); -+ devm_kfree(dev, p); -+exit_realloc_devmem: -+ return ret; -+} -+ -+ -+static int add_dirty_node(int **dirty_nodes, int id, int *num_dirty) -+{ -+ int i; -+ int found = 0; -+ int ret = 0; -+ int *dnode = NULL; -+ -+ for (i = 0; i < *num_dirty; i++) { -+ if ((*dirty_nodes)[i] == id) { -+ found = 1; -+ break; -+ } -+ } -+ -+ if (!found) { -+ (*num_dirty)++; -+ dnode = -+ krealloc(*dirty_nodes, sizeof(int) * (*num_dirty), -+ GFP_KERNEL); -+ -+ if (ZERO_OR_NULL_PTR(dnode)) { -+ MSM_BUS_ERR("%s: Failure allocating dirty nodes array", -+ __func__); -+ ret = -ENOMEM; -+ } else { -+ *dirty_nodes = dnode; -+ (*dirty_nodes)[(*num_dirty) - 1] = id; -+ } -+ } -+ -+ return ret; -+} -+ -+int msm_bus_update_bw(struct msm_bus_node_device_type *nodedev, int ctx, -+ int64_t add_bw, int **dirty_nodes, int *num_dirty) -+{ -+ int ret = 0; -+ int i, j; -+ uint64_t cur_ab_slp = 0; -+ uint64_t cur_ab_act = 0; -+ -+ if (nodedev->node_info->virt_dev) -+ goto exit_update_bw; -+ -+ for (i = 0; i < NUM_CTX; i++) { -+ for (j = 0; j < nodedev->num_lnodes; j++) { -+ if (i == DUAL_CTX) { -+ cur_ab_act += -+ nodedev->lnode_list[j].lnode_ab[i]; -+ cur_ab_slp += -+ nodedev->lnode_list[j].lnode_ab[i]; -+ } else -+ cur_ab_act += -+ nodedev->lnode_list[j].lnode_ab[i]; -+ } -+ } -+ -+ if (nodedev->node_ab.ab[MSM_RPM_CTX_ACTIVE_SET] != cur_ab_act) { -+ nodedev->node_ab.ab[MSM_RPM_CTX_ACTIVE_SET] = cur_ab_act; -+ nodedev->node_ab.ab[MSM_RPM_CTX_SLEEP_SET] = cur_ab_slp; -+ nodedev->node_ab.dirty = true; -+ ret = add_dirty_node(dirty_nodes, nodedev->node_info->id, -+ num_dirty); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to add dirty node %d", __func__, -+ nodedev->node_info->id); -+ goto exit_update_bw; -+ } -+ } -+ -+exit_update_bw: -+ return ret; -+} -+ -+int msm_bus_update_clks(struct msm_bus_node_device_type *nodedev, -+ int ctx, int **dirty_nodes, int *num_dirty) -+{ -+ int status = 0; -+ struct nodeclk *nodeclk; -+ struct nodeclk *busclk; -+ struct msm_bus_node_device_type *bus_info = NULL; -+ uint64_t req_clk; -+ -+ bus_info = nodedev->node_info->bus_device->platform_data; -+ -+ if (!bus_info) { -+ MSM_BUS_ERR("%s: Unable to find bus device for device %d", -+ __func__, nodedev->node_info->id); -+ status = -ENODEV; -+ goto exit_set_clks; -+ } -+ -+ req_clk = nodedev->cur_clk_hz[ctx]; -+ busclk = &bus_info->clk[ctx]; -+ -+ if (busclk->rate != req_clk) { -+ busclk->rate = req_clk; -+ busclk->dirty = 1; -+ MSM_BUS_DBG("%s: Modifying bus clk %d Rate %llu", __func__, -+ bus_info->node_info->id, req_clk); -+ status = add_dirty_node(dirty_nodes, bus_info->node_info->id, -+ num_dirty); -+ -+ if (status) { -+ MSM_BUS_ERR("%s: Failed to add dirty node %d", __func__, -+ bus_info->node_info->id); -+ goto exit_set_clks; -+ } -+ } -+ -+ req_clk = nodedev->cur_clk_hz[ctx]; -+ nodeclk = &nodedev->clk[ctx]; -+ -+ if (IS_ERR_OR_NULL(nodeclk)) -+ goto exit_set_clks; -+ -+ if (!nodeclk->dirty || (nodeclk->dirty && (nodeclk->rate < req_clk))) { -+ nodeclk->rate = req_clk; -+ nodeclk->dirty = 1; -+ MSM_BUS_DBG("%s: Modifying node clk %d Rate %llu", __func__, -+ nodedev->node_info->id, req_clk); -+ status = add_dirty_node(dirty_nodes, nodedev->node_info->id, -+ num_dirty); -+ if (status) { -+ MSM_BUS_ERR("%s: Failed to add dirty node %d", __func__, -+ nodedev->node_info->id); -+ goto exit_set_clks; -+ } -+ } -+ -+exit_set_clks: -+ return status; -+} -+ -+static void msm_bus_fab_init_noc_ops(struct msm_bus_node_device_type *bus_dev) -+{ -+ switch (bus_dev->fabdev->bus_type) { -+ case MSM_BUS_NOC: -+ msm_bus_noc_set_ops(bus_dev); -+ break; -+ case MSM_BUS_BIMC: -+ msm_bus_bimc_set_ops(bus_dev); -+ break; -+ default: -+ MSM_BUS_ERR("%s: Invalid Bus type", __func__); -+ } -+} -+ -+static int msm_bus_qos_disable_clk(struct msm_bus_node_device_type *node, -+ int disable_bus_qos_clk) -+{ -+ struct msm_bus_node_device_type *bus_node = NULL; -+ int ret = 0; -+ -+ if (!node) { -+ ret = -ENXIO; -+ goto exit_disable_qos_clk; -+ } -+ -+ bus_node = node->node_info->bus_device->platform_data; -+ -+ if (!bus_node) { -+ ret = -ENXIO; -+ goto exit_disable_qos_clk; -+ } -+ -+ if (disable_bus_qos_clk) -+ ret = disable_nodeclk(&bus_node->clk[DUAL_CTX]); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to disable bus clk, node %d", -+ __func__, node->node_info->id); -+ goto exit_disable_qos_clk; -+ } -+ -+ if (!IS_ERR_OR_NULL(node->qos_clk.clk)) { -+ ret = disable_nodeclk(&node->qos_clk); -+ -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to disable mas qos clk,node %d", -+ __func__, node->node_info->id); -+ goto exit_disable_qos_clk; -+ } -+ } -+ -+exit_disable_qos_clk: -+ return ret; -+} -+ -+static int msm_bus_qos_enable_clk(struct msm_bus_node_device_type *node) -+{ -+ struct msm_bus_node_device_type *bus_node = NULL; -+ long rounded_rate; -+ int ret = 0; -+ int bus_qos_enabled = 0; -+ -+ if (!node) { -+ ret = -ENXIO; -+ goto exit_enable_qos_clk; -+ } -+ -+ bus_node = node->node_info->bus_device->platform_data; -+ -+ if (!bus_node) { -+ ret = -ENXIO; -+ goto exit_enable_qos_clk; -+ } -+ -+ /* Check if the bus clk is already set before trying to set it -+ * Do this only during -+ * a. Bootup -+ * b. Only for bus clks -+ **/ -+ if (!clk_get_rate(bus_node->clk[DUAL_CTX].clk)) { -+ rounded_rate = clk_round_rate(bus_node->clk[DUAL_CTX].clk, 1); -+ ret = setrate_nodeclk(&bus_node->clk[DUAL_CTX], rounded_rate); -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to set bus clk, node %d", -+ __func__, node->node_info->id); -+ goto exit_enable_qos_clk; -+ } -+ -+ ret = enable_nodeclk(&bus_node->clk[DUAL_CTX]); -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to enable bus clk, node %d", -+ __func__, node->node_info->id); -+ goto exit_enable_qos_clk; -+ } -+ bus_qos_enabled = 1; -+ } -+ -+ if (!IS_ERR_OR_NULL(node->qos_clk.clk)) { -+ rounded_rate = clk_round_rate(node->qos_clk.clk, 1); -+ ret = setrate_nodeclk(&node->qos_clk, rounded_rate); -+ if (ret) { -+ MSM_BUS_ERR("%s: Failed to enable mas qos clk, node %d", -+ __func__, node->node_info->id); -+ goto exit_enable_qos_clk; -+ } -+ -+ ret = enable_nodeclk(&node->qos_clk); -+ if (ret) { -+ MSM_BUS_ERR("Err enable mas qos clk, node %d ret %d", -+ node->node_info->id, ret); -+ goto exit_enable_qos_clk; -+ } -+ } -+ ret = bus_qos_enabled; -+ -+exit_enable_qos_clk: -+ return ret; -+} -+ -+int msm_bus_enable_limiter(struct msm_bus_node_device_type *node_dev, -+ bool enable, uint64_t lim_bw) -+{ -+ int ret = 0; -+ struct msm_bus_node_device_type *bus_node_dev; -+ -+ if (!node_dev) { -+ MSM_BUS_ERR("No device specified"); -+ ret = -ENXIO; -+ goto exit_enable_limiter; -+ } -+ -+ if (!node_dev->ap_owned) { -+ MSM_BUS_ERR("Device is not AP owned %d.", -+ node_dev->node_info->id); -+ ret = -ENXIO; -+ goto exit_enable_limiter; -+ } -+ -+ bus_node_dev = node_dev->node_info->bus_device->platform_data; -+ if (!bus_node_dev) { -+ MSM_BUS_ERR("Unable to get bus device infofor %d", -+ node_dev->node_info->id); -+ ret = -ENXIO; -+ goto exit_enable_limiter; -+ } -+ if (bus_node_dev->fabdev && -+ bus_node_dev->fabdev->noc_ops.limit_mport) { -+ ret = msm_bus_qos_enable_clk(node_dev); -+ if (ret < 0) { -+ MSM_BUS_ERR("Can't Enable QoS clk %d", -+ node_dev->node_info->id); -+ goto exit_enable_limiter; -+ } -+ bus_node_dev->fabdev->noc_ops.limit_mport( -+ node_dev, -+ bus_node_dev->fabdev->qos_base, -+ bus_node_dev->fabdev->base_offset, -+ bus_node_dev->fabdev->qos_off, -+ bus_node_dev->fabdev->qos_freq, -+ enable, lim_bw); -+ msm_bus_qos_disable_clk(node_dev, ret); -+ } -+ -+exit_enable_limiter: -+ return ret; -+} -+ -+static int msm_bus_dev_init_qos(struct device *dev, void *data) -+{ -+ int ret = 0; -+ struct msm_bus_node_device_type *node_dev = NULL; -+ -+ node_dev = dev->platform_data; -+ -+ if (!node_dev) { -+ MSM_BUS_ERR("%s: Unable to get node device info" , __func__); -+ ret = -ENXIO; -+ goto exit_init_qos; -+ } -+ -+ MSM_BUS_DBG("Device = %d", node_dev->node_info->id); -+ -+ if (node_dev->ap_owned) { -+ struct msm_bus_node_device_type *bus_node_info; -+ -+ bus_node_info = node_dev->node_info->bus_device->platform_data; -+ -+ if (!bus_node_info) { -+ MSM_BUS_ERR("%s: Unable to get bus device infofor %d", -+ __func__, -+ node_dev->node_info->id); -+ ret = -ENXIO; -+ goto exit_init_qos; -+ } -+ -+ if (bus_node_info->fabdev && -+ bus_node_info->fabdev->noc_ops.qos_init) { -+ int ret = 0; -+ -+ if (node_dev->ap_owned && -+ (node_dev->node_info->qos_params.mode) != -1) { -+ -+ if (bus_node_info->fabdev->bypass_qos_prg) -+ goto exit_init_qos; -+ -+ ret = msm_bus_qos_enable_clk(node_dev); -+ if (ret < 0) { -+ MSM_BUS_ERR("Can't Enable QoS clk %d", -+ node_dev->node_info->id); -+ goto exit_init_qos; -+ } -+ -+ bus_node_info->fabdev->noc_ops.qos_init( -+ node_dev, -+ bus_node_info->fabdev->qos_base, -+ bus_node_info->fabdev->base_offset, -+ bus_node_info->fabdev->qos_off, -+ bus_node_info->fabdev->qos_freq); -+ msm_bus_qos_disable_clk(node_dev, ret); -+ } -+ } else -+ MSM_BUS_ERR("%s: Skipping QOS init for %d", -+ __func__, node_dev->node_info->id); -+ } -+exit_init_qos: -+ return ret; -+} -+ -+static int msm_bus_fabric_init(struct device *dev, -+ struct msm_bus_node_device_type *pdata) -+{ -+ struct msm_bus_fab_device_type *fabdev; -+ struct msm_bus_node_device_type *node_dev = NULL; -+ int ret = 0; -+ -+ node_dev = dev->platform_data; -+ if (!node_dev) { -+ MSM_BUS_ERR("%s: Unable to get bus device info" , __func__); -+ ret = -ENXIO; -+ goto exit_fabric_init; -+ } -+ -+ if (node_dev->node_info->virt_dev) { -+ MSM_BUS_ERR("%s: Skip Fab init for virtual device %d", __func__, -+ node_dev->node_info->id); -+ goto exit_fabric_init; -+ } -+ -+ fabdev = devm_kzalloc(dev, sizeof(struct msm_bus_fab_device_type), -+ GFP_KERNEL); -+ if (!fabdev) { -+ MSM_BUS_ERR("Fabric alloc failed\n"); -+ ret = -ENOMEM; -+ goto exit_fabric_init; -+ } -+ -+ node_dev->fabdev = fabdev; -+ fabdev->pqos_base = pdata->fabdev->pqos_base; -+ fabdev->qos_range = pdata->fabdev->qos_range; -+ fabdev->base_offset = pdata->fabdev->base_offset; -+ fabdev->qos_off = pdata->fabdev->qos_off; -+ fabdev->qos_freq = pdata->fabdev->qos_freq; -+ fabdev->bus_type = pdata->fabdev->bus_type; -+ fabdev->bypass_qos_prg = pdata->fabdev->bypass_qos_prg; -+ fabdev->util_fact = pdata->fabdev->util_fact; -+ fabdev->vrail_comp = pdata->fabdev->vrail_comp; -+ msm_bus_fab_init_noc_ops(node_dev); -+ -+ fabdev->qos_base = devm_ioremap(dev, -+ fabdev->pqos_base, fabdev->qos_range); -+ if (!fabdev->qos_base) { -+ MSM_BUS_ERR("%s: Error remapping address 0x%zx :bus device %d", -+ __func__, -+ (size_t)fabdev->pqos_base, node_dev->node_info->id); -+ ret = -ENOMEM; -+ goto exit_fabric_init; -+ } -+ -+ /*if (msmbus_coresight_init(pdev)) -+ pr_warn("Coresight support absent for bus: %d\n", pdata->id);*/ -+exit_fabric_init: -+ return ret; -+} -+ -+static int msm_bus_init_clk(struct device *bus_dev, -+ struct msm_bus_node_device_type *pdata) -+{ -+ unsigned int ctx; -+ int ret = 0; -+ struct msm_bus_node_device_type *node_dev = bus_dev->platform_data; -+ -+ for (ctx = 0; ctx < NUM_CTX; ctx++) { -+ if (!IS_ERR_OR_NULL(pdata->clk[ctx].clk)) { -+ node_dev->clk[ctx].clk = pdata->clk[ctx].clk; -+ node_dev->clk[ctx].enable = false; -+ node_dev->clk[ctx].dirty = false; -+ MSM_BUS_ERR("%s: Valid node clk node %d ctx %d", -+ __func__, node_dev->node_info->id, ctx); -+ } -+ } -+ -+ if (!IS_ERR_OR_NULL(pdata->qos_clk.clk)) { -+ node_dev->qos_clk.clk = pdata->qos_clk.clk; -+ node_dev->qos_clk.enable = false; -+ MSM_BUS_ERR("%s: Valid Iface clk node %d", __func__, -+ node_dev->node_info->id); -+ } -+ -+ return ret; -+} -+ -+static int msm_bus_copy_node_info(struct msm_bus_node_device_type *pdata, -+ struct device *bus_dev) -+{ -+ int ret = 0; -+ struct msm_bus_node_info_type *node_info = NULL; -+ struct msm_bus_node_info_type *pdata_node_info = NULL; -+ struct msm_bus_node_device_type *bus_node = NULL; -+ -+ bus_node = bus_dev->platform_data; -+ -+ if (!bus_node || !pdata) { -+ ret = -ENXIO; -+ MSM_BUS_ERR("%s: Invalid pointers pdata %p, bus_node %p", -+ __func__, pdata, bus_node); -+ goto exit_copy_node_info; -+ } -+ -+ node_info = bus_node->node_info; -+ pdata_node_info = pdata->node_info; -+ -+ node_info->name = pdata_node_info->name; -+ node_info->id = pdata_node_info->id; -+ node_info->bus_device_id = pdata_node_info->bus_device_id; -+ node_info->mas_rpm_id = pdata_node_info->mas_rpm_id; -+ node_info->slv_rpm_id = pdata_node_info->slv_rpm_id; -+ node_info->num_connections = pdata_node_info->num_connections; -+ node_info->num_blist = pdata_node_info->num_blist; -+ node_info->num_qports = pdata_node_info->num_qports; -+ node_info->buswidth = pdata_node_info->buswidth; -+ node_info->virt_dev = pdata_node_info->virt_dev; -+ node_info->is_fab_dev = pdata_node_info->is_fab_dev; -+ node_info->qos_params.mode = pdata_node_info->qos_params.mode; -+ node_info->qos_params.prio1 = pdata_node_info->qos_params.prio1; -+ node_info->qos_params.prio0 = pdata_node_info->qos_params.prio0; -+ node_info->qos_params.prio_lvl = pdata_node_info->qos_params.prio_lvl; -+ node_info->qos_params.prio_rd = pdata_node_info->qos_params.prio_rd; -+ node_info->qos_params.prio_wr = pdata_node_info->qos_params.prio_wr; -+ node_info->qos_params.gp = pdata_node_info->qos_params.gp; -+ node_info->qos_params.thmp = pdata_node_info->qos_params.thmp; -+ node_info->qos_params.ws = pdata_node_info->qos_params.ws; -+ node_info->qos_params.bw_buffer = pdata_node_info->qos_params.bw_buffer; -+ node_info->util_fact = pdata_node_info->util_fact; -+ node_info->vrail_comp = pdata_node_info->vrail_comp; -+ -+ node_info->dev_connections = devm_kzalloc(bus_dev, -+ sizeof(struct device *) * -+ pdata_node_info->num_connections, -+ GFP_KERNEL); -+ if (!node_info->dev_connections) { -+ MSM_BUS_ERR("%s:Bus dev connections alloc failed\n", __func__); -+ ret = -ENOMEM; -+ goto exit_copy_node_info; -+ } -+ -+ node_info->connections = devm_kzalloc(bus_dev, -+ sizeof(int) * pdata_node_info->num_connections, -+ GFP_KERNEL); -+ if (!node_info->connections) { -+ MSM_BUS_ERR("%s:Bus connections alloc failed\n", __func__); -+ devm_kfree(bus_dev, node_info->dev_connections); -+ ret = -ENOMEM; -+ goto exit_copy_node_info; -+ } -+ -+ memcpy(node_info->connections, -+ pdata_node_info->connections, -+ sizeof(int) * pdata_node_info->num_connections); -+ -+ node_info->black_connections = devm_kzalloc(bus_dev, -+ sizeof(struct device *) * -+ pdata_node_info->num_blist, -+ GFP_KERNEL); -+ if (!node_info->black_connections) { -+ MSM_BUS_ERR("%s: Bus black connections alloc failed\n", -+ __func__); -+ devm_kfree(bus_dev, node_info->dev_connections); -+ devm_kfree(bus_dev, node_info->connections); -+ ret = -ENOMEM; -+ goto exit_copy_node_info; -+ } -+ -+ node_info->black_listed_connections = devm_kzalloc(bus_dev, -+ pdata_node_info->num_blist * sizeof(int), -+ GFP_KERNEL); -+ if (!node_info->black_listed_connections) { -+ MSM_BUS_ERR("%s:Bus black list connections alloc failed\n", -+ __func__); -+ devm_kfree(bus_dev, node_info->black_connections); -+ devm_kfree(bus_dev, node_info->dev_connections); -+ devm_kfree(bus_dev, node_info->connections); -+ ret = -ENOMEM; -+ goto exit_copy_node_info; -+ } -+ -+ memcpy(node_info->black_listed_connections, -+ pdata_node_info->black_listed_connections, -+ sizeof(int) * pdata_node_info->num_blist); -+ -+ node_info->qport = devm_kzalloc(bus_dev, -+ sizeof(int) * pdata_node_info->num_qports, -+ GFP_KERNEL); -+ if (!node_info->qport) { -+ MSM_BUS_ERR("%s:Bus qport allocation failed\n", __func__); -+ devm_kfree(bus_dev, node_info->dev_connections); -+ devm_kfree(bus_dev, node_info->connections); -+ devm_kfree(bus_dev, node_info->black_listed_connections); -+ ret = -ENOMEM; -+ goto exit_copy_node_info; -+ } -+ -+ memcpy(node_info->qport, -+ pdata_node_info->qport, -+ sizeof(int) * pdata_node_info->num_qports); -+ -+exit_copy_node_info: -+ return ret; -+} -+ -+static struct device *msm_bus_device_init( -+ struct msm_bus_node_device_type *pdata) -+{ -+ struct device *bus_dev = NULL; -+ struct msm_bus_node_device_type *bus_node = NULL; -+ struct msm_bus_node_info_type *node_info = NULL; -+ int ret = 0; -+ -+ bus_dev = kzalloc(sizeof(struct device), GFP_KERNEL); -+ if (!bus_dev) { -+ MSM_BUS_ERR("%s:Device alloc failed\n", __func__); -+ bus_dev = NULL; -+ goto exit_device_init; -+ } -+ /** -+ * Init here so we can use devm calls -+ */ -+ device_initialize(bus_dev); -+ -+ bus_node = devm_kzalloc(bus_dev, -+ sizeof(struct msm_bus_node_device_type), GFP_KERNEL); -+ if (!bus_node) { -+ MSM_BUS_ERR("%s:Bus node alloc failed\n", __func__); -+ kfree(bus_dev); -+ bus_dev = NULL; -+ goto exit_device_init; -+ } -+ -+ node_info = devm_kzalloc(bus_dev, -+ sizeof(struct msm_bus_node_info_type), GFP_KERNEL); -+ if (!node_info) { -+ MSM_BUS_ERR("%s:Bus node info alloc failed\n", __func__); -+ devm_kfree(bus_dev, bus_node); -+ kfree(bus_dev); -+ bus_dev = NULL; -+ goto exit_device_init; -+ } -+ -+ bus_node->node_info = node_info; -+ bus_node->ap_owned = pdata->ap_owned; -+ bus_dev->platform_data = bus_node; -+ -+ if (msm_bus_copy_node_info(pdata, bus_dev) < 0) { -+ devm_kfree(bus_dev, bus_node); -+ devm_kfree(bus_dev, node_info); -+ kfree(bus_dev); -+ bus_dev = NULL; -+ goto exit_device_init; -+ } -+ -+ bus_dev->bus = &msm_bus_type; -+ dev_set_name(bus_dev, bus_node->node_info->name); -+ -+ ret = device_add(bus_dev); -+ if (ret < 0) { -+ MSM_BUS_ERR("%s: Error registering device %d", -+ __func__, pdata->node_info->id); -+ devm_kfree(bus_dev, bus_node); -+ devm_kfree(bus_dev, node_info->dev_connections); -+ devm_kfree(bus_dev, node_info->connections); -+ devm_kfree(bus_dev, node_info->black_connections); -+ devm_kfree(bus_dev, node_info->black_listed_connections); -+ devm_kfree(bus_dev, node_info); -+ kfree(bus_dev); -+ bus_dev = NULL; -+ goto exit_device_init; -+ } -+ device_create_file(bus_dev, &dev_attr_vrail); -+ -+exit_device_init: -+ return bus_dev; -+} -+ -+static int msm_bus_setup_dev_conn(struct device *bus_dev, void *data) -+{ -+ struct msm_bus_node_device_type *bus_node = NULL; -+ int ret = 0; -+ int j; -+ -+ bus_node = bus_dev->platform_data; -+ if (!bus_node) { -+ MSM_BUS_ERR("%s: Can't get device info", __func__); -+ ret = -ENODEV; -+ goto exit_setup_dev_conn; -+ } -+ -+ /* Setup parent bus device for this node */ -+ if (!bus_node->node_info->is_fab_dev) { -+ struct device *bus_parent_device = -+ bus_find_device(&msm_bus_type, NULL, -+ (void *)&bus_node->node_info->bus_device_id, -+ msm_bus_device_match_adhoc); -+ -+ if (!bus_parent_device) { -+ MSM_BUS_ERR("%s: Error finding parentdev %d parent %d", -+ __func__, -+ bus_node->node_info->id, -+ bus_node->node_info->bus_device_id); -+ ret = -ENXIO; -+ goto exit_setup_dev_conn; -+ } -+ bus_node->node_info->bus_device = bus_parent_device; -+ } -+ -+ bus_node->node_info->is_traversed = false; -+ -+ for (j = 0; j < bus_node->node_info->num_connections; j++) { -+ bus_node->node_info->dev_connections[j] = -+ bus_find_device(&msm_bus_type, NULL, -+ (void *)&bus_node->node_info->connections[j], -+ msm_bus_device_match_adhoc); -+ -+ if (!bus_node->node_info->dev_connections[j]) { -+ MSM_BUS_ERR("%s: Error finding conn %d for device %d", -+ __func__, bus_node->node_info->connections[j], -+ bus_node->node_info->id); -+ ret = -ENODEV; -+ goto exit_setup_dev_conn; -+ } -+ } -+ -+ for (j = 0; j < bus_node->node_info->num_blist; j++) { -+ bus_node->node_info->black_connections[j] = -+ bus_find_device(&msm_bus_type, NULL, -+ (void *)&bus_node->node_info-> -+ black_listed_connections[j], -+ msm_bus_device_match_adhoc); -+ -+ if (!bus_node->node_info->black_connections[j]) { -+ MSM_BUS_ERR("%s: Error finding conn %d for device %d\n", -+ __func__, bus_node->node_info-> -+ black_listed_connections[j], -+ bus_node->node_info->id); -+ ret = -ENODEV; -+ goto exit_setup_dev_conn; -+ } -+ } -+ -+exit_setup_dev_conn: -+ return ret; -+} -+ -+static int msm_bus_node_debug(struct device *bus_dev, void *data) -+{ -+ int j; -+ int ret = 0; -+ struct msm_bus_node_device_type *bus_node = NULL; -+ -+ bus_node = bus_dev->platform_data; -+ if (!bus_node) { -+ MSM_BUS_ERR("%s: Can't get device info", __func__); -+ ret = -ENODEV; -+ goto exit_node_debug; -+ } -+ -+ MSM_BUS_DBG("Device = %d buswidth %u", bus_node->node_info->id, -+ bus_node->node_info->buswidth); -+ for (j = 0; j < bus_node->node_info->num_connections; j++) { -+ struct msm_bus_node_device_type *bdev = -+ (struct msm_bus_node_device_type *) -+ bus_node->node_info->dev_connections[j]->platform_data; -+ MSM_BUS_DBG("\n\t Connection[%d] %d", j, bdev->node_info->id); -+ } -+ -+exit_node_debug: -+ return ret; -+} -+ -+static int msm_bus_device_probe(struct platform_device *pdev) -+{ -+ unsigned int i, ret; -+ struct msm_bus_device_node_registration *pdata; -+ -+ /* If possible, get pdata from device-tree */ -+ if (pdev->dev.of_node) -+ pdata = msm_bus_of_to_pdata(pdev); -+ else { -+ pdata = (struct msm_bus_device_node_registration *)pdev-> -+ dev.platform_data; -+ } -+ -+ if (IS_ERR_OR_NULL(pdata)) { -+ MSM_BUS_ERR("No platform data found"); -+ ret = -ENODATA; -+ goto exit_device_probe; -+ } -+ -+ for (i = 0; i < pdata->num_devices; i++) { -+ struct device *node_dev = NULL; -+ -+ node_dev = msm_bus_device_init(&pdata->info[i]); -+ -+ if (!node_dev) { -+ MSM_BUS_ERR("%s: Error during dev init for %d", -+ __func__, pdata->info[i].node_info->id); -+ ret = -ENXIO; -+ goto exit_device_probe; -+ } -+ -+ ret = msm_bus_init_clk(node_dev, &pdata->info[i]); -+ /*Is this a fabric device ?*/ -+ if (pdata->info[i].node_info->is_fab_dev) { -+ MSM_BUS_DBG("%s: %d is a fab", __func__, -+ pdata->info[i].node_info->id); -+ ret = msm_bus_fabric_init(node_dev, &pdata->info[i]); -+ if (ret) { -+ MSM_BUS_ERR("%s: Error intializing fab %d", -+ __func__, pdata->info[i].node_info->id); -+ goto exit_device_probe; -+ } -+ } -+ } -+ -+ ret = bus_for_each_dev(&msm_bus_type, NULL, NULL, -+ msm_bus_setup_dev_conn); -+ if (ret) { -+ MSM_BUS_ERR("%s: Error setting up dev connections", __func__); -+ goto exit_device_probe; -+ } -+ -+ ret = bus_for_each_dev(&msm_bus_type, NULL, NULL, msm_bus_dev_init_qos); -+ if (ret) { -+ MSM_BUS_ERR("%s: Error during qos init", __func__); -+ goto exit_device_probe; -+ } -+ -+ bus_for_each_dev(&msm_bus_type, NULL, NULL, msm_bus_node_debug); -+ -+ /* Register the arb layer ops */ -+ msm_bus_arb_setops_adhoc(&arb_ops); -+ devm_kfree(&pdev->dev, pdata->info); -+ devm_kfree(&pdev->dev, pdata); -+exit_device_probe: -+ return ret; -+} -+ -+static int msm_bus_device_rules_probe(struct platform_device *pdev) -+{ -+ struct bus_rule_type *rule_data = NULL; -+ int num_rules = 0; -+ -+ num_rules = msm_bus_of_get_static_rules(pdev, &rule_data); -+ -+ if (!rule_data) -+ goto exit_rules_probe; -+ -+ msm_rule_register(num_rules, rule_data, NULL); -+ static_rules.num_rules = num_rules; -+ static_rules.rules = rule_data; -+ pdev->dev.platform_data = &static_rules; -+ -+exit_rules_probe: -+ return 0; -+} -+ -+int msm_bus_device_rules_remove(struct platform_device *pdev) -+{ -+ struct static_rules_type *static_rules = NULL; -+ -+ static_rules = pdev->dev.platform_data; -+ if (static_rules) -+ msm_rule_unregister(static_rules->num_rules, -+ static_rules->rules, NULL); -+ return 0; -+} -+ -+static int msm_bus_free_dev(struct device *dev, void *data) -+{ -+ struct msm_bus_node_device_type *bus_node = NULL; -+ -+ bus_node = dev->platform_data; -+ -+ if (bus_node) -+ MSM_BUS_ERR("\n%s: Removing device %d", __func__, -+ bus_node->node_info->id); -+ device_unregister(dev); -+ return 0; -+} -+ -+int msm_bus_device_remove(struct platform_device *pdev) -+{ -+ bus_for_each_dev(&msm_bus_type, NULL, NULL, msm_bus_free_dev); -+ return 0; -+} -+ -+static struct of_device_id rules_match[] = { -+ {.compatible = "qcom,msm-bus-static-bw-rules"}, -+ {} -+}; -+ -+static struct platform_driver msm_bus_rules_driver = { -+ .probe = msm_bus_device_rules_probe, -+ .remove = msm_bus_device_rules_remove, -+ .driver = { -+ .name = "msm_bus_rules_device", -+ .owner = THIS_MODULE, -+ .of_match_table = rules_match, -+ }, -+}; -+ -+static struct of_device_id fabric_match[] = { -+ {.compatible = "qcom,msm-bus-device"}, -+ {} -+}; -+ -+static struct platform_driver msm_bus_device_driver = { -+ .probe = msm_bus_device_probe, -+ .remove = msm_bus_device_remove, -+ .driver = { -+ .name = "msm_bus_device", -+ .owner = THIS_MODULE, -+ .of_match_table = fabric_match, -+ }, -+}; -+ -+int __init msm_bus_device_init_driver(void) -+{ -+ int rc; -+ -+ MSM_BUS_ERR("msm_bus_fabric_init_driver\n"); -+ rc = platform_driver_register(&msm_bus_device_driver); -+ -+ if (rc) { -+ MSM_BUS_ERR("Failed to register bus device driver"); -+ return rc; -+ } -+ return platform_driver_register(&msm_bus_rules_driver); -+} -+subsys_initcall(msm_bus_device_init_driver); ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_id.c -@@ -0,0 +1,94 @@ -+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include "msm-bus.h" -+#include "msm-bus-board.h" -+#include "msm_bus_core.h" -+#include "msm_bus_noc.h" -+#include "msm_bus_bimc.h" -+ -+static uint32_t master_iids[MSM_BUS_MASTER_LAST]; -+static uint32_t slave_iids[MSM_BUS_SLAVE_LAST - SLAVE_ID_KEY]; -+ -+static void msm_bus_assign_iids(struct msm_bus_fabric_registration -+ *fabreg, int fabid) -+{ -+ int i; -+ for (i = 0; i < fabreg->len; i++) { -+ if (!fabreg->info[i].gateway) { -+ fabreg->info[i].priv_id = fabid + fabreg->info[i].id; -+ if (fabreg->info[i].id < SLAVE_ID_KEY) { -+ if (fabreg->info[i].id >= MSM_BUS_MASTER_LAST) { -+ WARN(1, "id %d exceeds array size!\n", -+ fabreg->info[i].id); -+ continue; -+ } -+ -+ master_iids[fabreg->info[i].id] = -+ fabreg->info[i].priv_id; -+ } else { -+ if ((fabreg->info[i].id - SLAVE_ID_KEY) >= -+ (MSM_BUS_SLAVE_LAST - SLAVE_ID_KEY)) { -+ WARN(1, "id %d exceeds array size!\n", -+ fabreg->info[i].id); -+ continue; -+ } -+ -+ slave_iids[fabreg->info[i].id - (SLAVE_ID_KEY)] -+ = fabreg->info[i].priv_id; -+ } -+ } else { -+ fabreg->info[i].priv_id = fabreg->info[i].id; -+ } -+ } -+} -+ -+static int msm_bus_get_iid(int id) -+{ -+ if ((id < SLAVE_ID_KEY && id >= MSM_BUS_MASTER_LAST) || -+ id >= MSM_BUS_SLAVE_LAST) { -+ MSM_BUS_ERR("Cannot get iid. Invalid id %d passed\n", id); -+ return -EINVAL; -+ } -+ -+ return CHECK_ID(((id < SLAVE_ID_KEY) ? master_iids[id] : -+ slave_iids[id - SLAVE_ID_KEY]), id); -+} -+ -+static struct msm_bus_board_algorithm msm_bus_id_algo = { -+ .get_iid = msm_bus_get_iid, -+ .assign_iids = msm_bus_assign_iids, -+}; -+ -+int msm_bus_board_rpm_get_il_ids(uint16_t *id) -+{ -+ return -ENXIO; -+} -+ -+void msm_bus_board_init(struct msm_bus_fabric_registration *pdata) -+{ -+ pdata->board_algo = &msm_bus_id_algo; -+} -+ -+void msm_bus_board_set_nfab(struct msm_bus_fabric_registration *pdata, -+ int nfab) -+{ -+ if (nfab <= 0) -+ return; -+ -+ msm_bus_id_algo.board_nfab = nfab; -+} ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_noc.c -@@ -0,0 +1,770 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#define pr_fmt(fmt) "AXI: NOC: %s(): " fmt, __func__ -+ -+#include -+#include -+#include "msm-bus-board.h" -+#include "msm_bus_core.h" -+#include "msm_bus_noc.h" -+#include "msm_bus_adhoc.h" -+ -+/* NOC_QOS generic */ -+#define __CLZ(x) ((8 * sizeof(uint32_t)) - 1 - __fls(x)) -+#define SAT_SCALE 16 /* 16 bytes minimum for saturation */ -+#define BW_SCALE 256 /* 1/256 byte per cycle unit */ -+#define QOS_DEFAULT_BASEOFFSET 0x00003000 -+#define QOS_DEFAULT_DELTA 0x80 -+#define MAX_BW_FIELD (NOC_QOS_BWn_BW_BMSK >> NOC_QOS_BWn_BW_SHFT) -+#define MAX_SAT_FIELD (NOC_QOS_SATn_SAT_BMSK >> NOC_QOS_SATn_SAT_SHFT) -+ -+#define NOC_QOS_REG_BASE(b, o) ((b) + (o)) -+ -+#define NOC_QOS_ID_COREIDn_ADDR(b, o, n, d) \ -+ (NOC_QOS_REG_BASE(b, o) + (d) * (n)) -+enum noc_qos_id_coreidn { -+ NOC_QOS_ID_COREIDn_RMSK = 0xffffffff, -+ NOC_QOS_ID_COREIDn_MAXn = 32, -+ NOC_QOS_ID_COREIDn_CORECHSUM_BMSK = 0xffffff00, -+ NOC_QOS_ID_COREIDn_CORECHSUM_SHFT = 0x8, -+ NOC_QOS_ID_COREIDn_CORETYPEID_BMSK = 0xff, -+ NOC_QOS_ID_COREIDn_CORETYPEID_SHFT = 0x0, -+}; -+ -+#define NOC_QOS_ID_REVISIONIDn_ADDR(b, o, n, d) \ -+ (NOC_QOS_REG_BASE(b, o) + 0x4 + (d) * (n)) -+enum noc_qos_id_revisionidn { -+ NOC_QOS_ID_REVISIONIDn_RMSK = 0xffffffff, -+ NOC_QOS_ID_REVISIONIDn_MAXn = 32, -+ NOC_QOS_ID_REVISIONIDn_FLEXNOCID_BMSK = 0xffffff00, -+ NOC_QOS_ID_REVISIONIDn_FLEXNOCID_SHFT = 0x8, -+ NOC_QOS_ID_REVISIONIDn_USERID_BMSK = 0xff, -+ NOC_QOS_ID_REVISIONIDn_USERID_SHFT = 0x0, -+}; -+ -+#define NOC_QOS_PRIORITYn_ADDR(b, o, n, d) \ -+ (NOC_QOS_REG_BASE(b, o) + 0x8 + (d) * (n)) -+enum noc_qos_id_priorityn { -+ NOC_QOS_PRIORITYn_RMSK = 0x0000000f, -+ NOC_QOS_PRIORITYn_MAXn = 32, -+ NOC_QOS_PRIORITYn_P1_BMSK = 0xc, -+ NOC_QOS_PRIORITYn_P1_SHFT = 0x2, -+ NOC_QOS_PRIORITYn_P0_BMSK = 0x3, -+ NOC_QOS_PRIORITYn_P0_SHFT = 0x0, -+}; -+ -+#define NOC_QOS_MODEn_ADDR(b, o, n, d) \ -+ (NOC_QOS_REG_BASE(b, o) + 0xC + (d) * (n)) -+enum noc_qos_id_moden_rmsk { -+ NOC_QOS_MODEn_RMSK = 0x00000003, -+ NOC_QOS_MODEn_MAXn = 32, -+ NOC_QOS_MODEn_MODE_BMSK = 0x3, -+ NOC_QOS_MODEn_MODE_SHFT = 0x0, -+}; -+ -+#define NOC_QOS_BWn_ADDR(b, o, n, d) \ -+ (NOC_QOS_REG_BASE(b, o) + 0x10 + (d) * (n)) -+enum noc_qos_id_bwn { -+ NOC_QOS_BWn_RMSK = 0x0000ffff, -+ NOC_QOS_BWn_MAXn = 32, -+ NOC_QOS_BWn_BW_BMSK = 0xffff, -+ NOC_QOS_BWn_BW_SHFT = 0x0, -+}; -+ -+/* QOS Saturation registers */ -+#define NOC_QOS_SATn_ADDR(b, o, n, d) \ -+ (NOC_QOS_REG_BASE(b, o) + 0x14 + (d) * (n)) -+enum noc_qos_id_saturationn { -+ NOC_QOS_SATn_RMSK = 0x000003ff, -+ NOC_QOS_SATn_MAXn = 32, -+ NOC_QOS_SATn_SAT_BMSK = 0x3ff, -+ NOC_QOS_SATn_SAT_SHFT = 0x0, -+}; -+ -+static int noc_div(uint64_t *a, uint32_t b) -+{ -+ if ((*a > 0) && (*a < b)) -+ return 1; -+ else -+ return do_div(*a, b); -+} -+ -+/** -+ * Calculates bw hardware is using from register values -+ * bw returned is in bytes/sec -+ */ -+static uint64_t noc_bw(uint32_t bw_field, uint32_t qos_freq) -+{ -+ uint64_t res; -+ uint32_t rem, scale; -+ -+ res = 2 * qos_freq * bw_field; -+ scale = BW_SCALE * 1000; -+ rem = noc_div(&res, scale); -+ MSM_BUS_DBG("NOC: Calculated bw: %llu\n", res * 1000000ULL); -+ return res * 1000000ULL; -+} -+ -+static uint32_t noc_bw_ceil(long int bw_field, uint32_t qos_freq) -+{ -+ uint64_t bw_temp = 2 * qos_freq * bw_field; -+ uint32_t scale = 1000 * BW_SCALE; -+ noc_div(&bw_temp, scale); -+ return bw_temp * 1000000; -+} -+#define MAX_BW(timebase) noc_bw_ceil(MAX_BW_FIELD, (timebase)) -+ -+/** -+ * Calculates ws hardware is using from register values -+ * ws returned is in nanoseconds -+ */ -+static uint32_t noc_ws(uint64_t bw, uint32_t sat, uint32_t qos_freq) -+{ -+ if (bw && qos_freq) { -+ uint32_t bwf = bw * qos_freq; -+ uint64_t scale = 1000000000000LL * BW_SCALE * -+ SAT_SCALE * sat; -+ noc_div(&scale, bwf); -+ MSM_BUS_DBG("NOC: Calculated ws: %llu\n", scale); -+ return scale; -+ } -+ -+ return 0; -+} -+#define MAX_WS(bw, timebase) noc_ws((bw), MAX_SAT_FIELD, (timebase)) -+ -+/* Calculate bandwidth field value for requested bandwidth */ -+static uint32_t noc_bw_field(uint64_t bw, uint32_t qos_freq) -+{ -+ uint32_t bw_field = 0; -+ -+ if (bw) { -+ uint32_t rem; -+ uint64_t bw_capped = min_t(uint64_t, bw, MAX_BW(qos_freq)); -+ uint64_t bwc = bw_capped * BW_SCALE; -+ uint64_t qf = 2 * qos_freq * 1000; -+ -+ rem = noc_div(&bwc, qf); -+ bw_field = (uint32_t)min_t(uint64_t, bwc, MAX_BW_FIELD); -+ } -+ -+ MSM_BUS_DBG("NOC: bw_field: %u\n", bw_field); -+ return bw_field; -+} -+ -+static uint32_t noc_sat_field(uint64_t bw, uint32_t ws, uint32_t qos_freq) -+{ -+ uint32_t sat_field = 0, win; -+ -+ if (bw) { -+ /* Limit to max bw and scale bw to 100 KB increments */ -+ uint64_t tbw, tscale; -+ uint64_t bw_scaled = min_t(uint64_t, bw, MAX_BW(qos_freq)); -+ uint32_t rem = noc_div(&bw_scaled, 100000); -+ -+ /** -+ * Calculate saturation from windows size. -+ * WS must be at least one arb period. -+ * Saturation must not exceed max field size -+ * -+ * Bandwidth is in 100KB increments -+ * Window size is in ns -+ * qos_freq is in KHz -+ */ -+ win = max(ws, 1000000 / qos_freq); -+ tbw = bw_scaled * win * qos_freq; -+ tscale = 10000000ULL * BW_SCALE * SAT_SCALE; -+ rem = noc_div(&tbw, tscale); -+ sat_field = (uint32_t)min_t(uint64_t, tbw, MAX_SAT_FIELD); -+ } -+ -+ MSM_BUS_DBG("NOC: sat_field: %d\n", sat_field); -+ return sat_field; -+} -+ -+static void noc_set_qos_mode(void __iomem *base, uint32_t qos_off, -+ uint32_t mport, uint32_t qos_delta, uint8_t mode, -+ uint8_t perm_mode) -+{ -+ if (mode < NOC_QOS_MODE_MAX && -+ ((1 << mode) & perm_mode)) { -+ uint32_t reg_val; -+ -+ reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(base, qos_off, -+ mport, qos_delta)) & NOC_QOS_MODEn_RMSK; -+ writel_relaxed(((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK))) | -+ (mode & NOC_QOS_MODEn_MODE_BMSK)), -+ NOC_QOS_MODEn_ADDR(base, qos_off, mport, qos_delta)); -+ } -+ /* Ensure qos mode is set before exiting */ -+ wmb(); -+} -+ -+static void noc_set_qos_priority(void __iomem *base, uint32_t qos_off, -+ uint32_t mport, uint32_t qos_delta, -+ struct msm_bus_noc_qos_priority *priority) -+{ -+ uint32_t reg_val, val; -+ -+ reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(base, qos_off, mport, -+ qos_delta)) & NOC_QOS_PRIORITYn_RMSK; -+ val = priority->p1 << NOC_QOS_PRIORITYn_P1_SHFT; -+ writel_relaxed(((reg_val & (~(NOC_QOS_PRIORITYn_P1_BMSK))) | -+ (val & NOC_QOS_PRIORITYn_P1_BMSK)), -+ NOC_QOS_PRIORITYn_ADDR(base, qos_off, mport, qos_delta)); -+ -+ reg_val = readl_relaxed(NOC_QOS_PRIORITYn_ADDR(base, qos_off, mport, -+ qos_delta)) -+ & NOC_QOS_PRIORITYn_RMSK; -+ writel_relaxed(((reg_val & (~(NOC_QOS_PRIORITYn_P0_BMSK))) | -+ (priority->p0 & NOC_QOS_PRIORITYn_P0_BMSK)), -+ NOC_QOS_PRIORITYn_ADDR(base, qos_off, mport, qos_delta)); -+ /* Ensure qos priority is set before exiting */ -+ wmb(); -+} -+ -+static void msm_bus_noc_set_qos_bw(void __iomem *base, uint32_t qos_off, -+ uint32_t qos_freq, uint32_t mport, uint32_t qos_delta, -+ uint8_t perm_mode, struct msm_bus_noc_qos_bw *qbw) -+{ -+ uint32_t reg_val, val, mode; -+ -+ if (!qos_freq) { -+ MSM_BUS_DBG("Zero QoS Freq\n"); -+ return; -+ } -+ -+ -+ /* If Limiter or Regulator modes are not supported, bw not available*/ -+ if (perm_mode & (NOC_QOS_PERM_MODE_LIMITER | -+ NOC_QOS_PERM_MODE_REGULATOR)) { -+ uint32_t bw_val = noc_bw_field(qbw->bw, qos_freq); -+ uint32_t sat_val = noc_sat_field(qbw->bw, qbw->ws, -+ qos_freq); -+ -+ MSM_BUS_DBG("NOC: BW: perm_mode: %d bw_val: %d, sat_val: %d\n", -+ perm_mode, bw_val, sat_val); -+ /* -+ * If in Limiter/Regulator mode, first go to fixed mode. -+ * Clear QoS accumulator -+ **/ -+ mode = readl_relaxed(NOC_QOS_MODEn_ADDR(base, qos_off, -+ mport, qos_delta)) & NOC_QOS_MODEn_MODE_BMSK; -+ if (mode == NOC_QOS_MODE_REGULATOR || mode == -+ NOC_QOS_MODE_LIMITER) { -+ reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR( -+ base, qos_off, mport, qos_delta)); -+ val = NOC_QOS_MODE_FIXED; -+ writel_relaxed((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK))) -+ | (val & NOC_QOS_MODEn_MODE_BMSK), -+ NOC_QOS_MODEn_ADDR(base, qos_off, mport, -+ qos_delta)); -+ } -+ -+ reg_val = readl_relaxed(NOC_QOS_BWn_ADDR(base, qos_off, mport, -+ qos_delta)); -+ val = bw_val << NOC_QOS_BWn_BW_SHFT; -+ writel_relaxed(((reg_val & (~(NOC_QOS_BWn_BW_BMSK))) | -+ (val & NOC_QOS_BWn_BW_BMSK)), -+ NOC_QOS_BWn_ADDR(base, qos_off, mport, qos_delta)); -+ -+ MSM_BUS_DBG("NOC: BW: Wrote value: 0x%x\n", ((reg_val & -+ (~NOC_QOS_BWn_BW_BMSK)) | (val & -+ NOC_QOS_BWn_BW_BMSK))); -+ -+ reg_val = readl_relaxed(NOC_QOS_SATn_ADDR(base, qos_off, -+ mport, qos_delta)); -+ val = sat_val << NOC_QOS_SATn_SAT_SHFT; -+ writel_relaxed(((reg_val & (~(NOC_QOS_SATn_SAT_BMSK))) | -+ (val & NOC_QOS_SATn_SAT_BMSK)), -+ NOC_QOS_SATn_ADDR(base, qos_off, mport, qos_delta)); -+ -+ MSM_BUS_DBG("NOC: SAT: Wrote value: 0x%x\n", ((reg_val & -+ (~NOC_QOS_SATn_SAT_BMSK)) | (val & -+ NOC_QOS_SATn_SAT_BMSK))); -+ -+ /* Set mode back to what it was initially */ -+ reg_val = readl_relaxed(NOC_QOS_MODEn_ADDR(base, qos_off, -+ mport, qos_delta)); -+ writel_relaxed((reg_val & (~(NOC_QOS_MODEn_MODE_BMSK))) -+ | (mode & NOC_QOS_MODEn_MODE_BMSK), -+ NOC_QOS_MODEn_ADDR(base, qos_off, mport, qos_delta)); -+ /* Ensure that all writes for bandwidth registers have -+ * completed before returning -+ */ -+ wmb(); -+ } -+} -+ -+uint8_t msm_bus_noc_get_qos_mode(void __iomem *base, uint32_t qos_off, -+ uint32_t mport, uint32_t qos_delta, uint32_t mode, uint32_t perm_mode) -+{ -+ if (NOC_QOS_MODES_ALL_PERM == perm_mode) -+ return readl_relaxed(NOC_QOS_MODEn_ADDR(base, qos_off, -+ mport, qos_delta)) & NOC_QOS_MODEn_MODE_BMSK; -+ else -+ return 31 - __CLZ(mode & -+ NOC_QOS_MODES_ALL_PERM); -+} -+ -+void msm_bus_noc_get_qos_priority(void __iomem *base, uint32_t qos_off, -+ uint32_t mport, uint32_t qos_delta, -+ struct msm_bus_noc_qos_priority *priority) -+{ -+ priority->p1 = (readl_relaxed(NOC_QOS_PRIORITYn_ADDR(base, qos_off, -+ mport, qos_delta)) & NOC_QOS_PRIORITYn_P1_BMSK) >> -+ NOC_QOS_PRIORITYn_P1_SHFT; -+ -+ priority->p0 = (readl_relaxed(NOC_QOS_PRIORITYn_ADDR(base, qos_off, -+ mport, qos_delta)) & NOC_QOS_PRIORITYn_P0_BMSK) >> -+ NOC_QOS_PRIORITYn_P0_SHFT; -+} -+ -+void msm_bus_noc_get_qos_bw(void __iomem *base, uint32_t qos_off, -+ uint32_t qos_freq, -+ uint32_t mport, uint32_t qos_delta, uint8_t perm_mode, -+ struct msm_bus_noc_qos_bw *qbw) -+{ -+ if (perm_mode & (NOC_QOS_PERM_MODE_LIMITER | -+ NOC_QOS_PERM_MODE_REGULATOR)) { -+ uint32_t bw_val = readl_relaxed(NOC_QOS_BWn_ADDR( -+ base, qos_off, mport, qos_delta)) & NOC_QOS_BWn_BW_BMSK; -+ uint32_t sat = readl_relaxed(NOC_QOS_SATn_ADDR( -+ base, qos_off, mport, qos_delta)) -+ & NOC_QOS_SATn_SAT_BMSK; -+ -+ qbw->bw = noc_bw(bw_val, qos_freq); -+ qbw->ws = noc_ws(qbw->bw, sat, qos_freq); -+ } else { -+ qbw->bw = 0; -+ qbw->ws = 0; -+ } -+} -+ -+static int msm_bus_noc_mas_init(struct msm_bus_noc_info *ninfo, -+ struct msm_bus_inode_info *info) -+{ -+ int i; -+ struct msm_bus_noc_qos_priority *prio; -+ prio = kzalloc(sizeof(struct msm_bus_noc_qos_priority), -+ GFP_KERNEL); -+ if (!prio) { -+ MSM_BUS_WARN("Couldn't alloc prio data for node: %d\n", -+ info->node_info->id); -+ return -ENOMEM; -+ } -+ -+ prio->read_prio = info->node_info->prio_rd; -+ prio->write_prio = info->node_info->prio_wr; -+ prio->p1 = info->node_info->prio1; -+ prio->p0 = info->node_info->prio0; -+ info->hw_data = (void *)prio; -+ -+ if (!info->node_info->qport) { -+ MSM_BUS_DBG("No QoS Ports to init\n"); -+ return 0; -+ } -+ -+ for (i = 0; i < info->node_info->num_mports; i++) { -+ if (info->node_info->mode != NOC_QOS_MODE_BYPASS) { -+ noc_set_qos_priority(ninfo->base, ninfo->qos_baseoffset, -+ info->node_info->qport[i], ninfo->qos_delta, -+ prio); -+ -+ if (info->node_info->mode != NOC_QOS_MODE_FIXED) { -+ struct msm_bus_noc_qos_bw qbw; -+ qbw.ws = info->node_info->ws; -+ qbw.bw = 0; -+ msm_bus_noc_set_qos_bw(ninfo->base, -+ ninfo->qos_baseoffset, -+ ninfo->qos_freq, info->node_info-> -+ qport[i], ninfo->qos_delta, -+ info->node_info->perm_mode, -+ &qbw); -+ } -+ } -+ -+ noc_set_qos_mode(ninfo->base, ninfo->qos_baseoffset, -+ info->node_info->qport[i], ninfo->qos_delta, -+ info->node_info->mode, -+ info->node_info->perm_mode); -+ } -+ -+ return 0; -+} -+ -+static void msm_bus_noc_node_init(void *hw_data, -+ struct msm_bus_inode_info *info) -+{ -+ struct msm_bus_noc_info *ninfo = -+ (struct msm_bus_noc_info *)hw_data; -+ -+ if (!IS_SLAVE(info->node_info->priv_id)) -+ if (info->node_info->hw_sel != MSM_BUS_RPM) -+ msm_bus_noc_mas_init(ninfo, info); -+} -+ -+static int msm_bus_noc_allocate_commit_data(struct msm_bus_fabric_registration -+ *fab_pdata, void **cdata, int ctx) -+{ -+ struct msm_bus_noc_commit **cd = (struct msm_bus_noc_commit **)cdata; -+ struct msm_bus_noc_info *ninfo = -+ (struct msm_bus_noc_info *)fab_pdata->hw_data; -+ -+ *cd = kzalloc(sizeof(struct msm_bus_noc_commit), GFP_KERNEL); -+ if (!*cd) { -+ MSM_BUS_DBG("Couldn't alloc mem for cdata\n"); -+ return -ENOMEM; -+ } -+ -+ (*cd)->mas = ninfo->cdata[ctx].mas; -+ (*cd)->slv = ninfo->cdata[ctx].slv; -+ -+ return 0; -+} -+ -+static void *msm_bus_noc_allocate_noc_data(struct platform_device *pdev, -+ struct msm_bus_fabric_registration *fab_pdata) -+{ -+ struct resource *noc_mem; -+ struct resource *noc_io; -+ struct msm_bus_noc_info *ninfo; -+ int i; -+ -+ ninfo = kzalloc(sizeof(struct msm_bus_noc_info), GFP_KERNEL); -+ if (!ninfo) { -+ MSM_BUS_DBG("Couldn't alloc mem for noc info\n"); -+ return NULL; -+ } -+ -+ ninfo->nmasters = fab_pdata->nmasters; -+ ninfo->nqos_masters = fab_pdata->nmasters; -+ ninfo->nslaves = fab_pdata->nslaves; -+ ninfo->qos_freq = fab_pdata->qos_freq; -+ -+ if (!fab_pdata->qos_baseoffset) -+ ninfo->qos_baseoffset = QOS_DEFAULT_BASEOFFSET; -+ else -+ ninfo->qos_baseoffset = fab_pdata->qos_baseoffset; -+ -+ if (!fab_pdata->qos_delta) -+ ninfo->qos_delta = QOS_DEFAULT_DELTA; -+ else -+ ninfo->qos_delta = fab_pdata->qos_delta; -+ -+ ninfo->mas_modes = kzalloc(sizeof(uint32_t) * fab_pdata->nmasters, -+ GFP_KERNEL); -+ if (!ninfo->mas_modes) { -+ MSM_BUS_DBG("Couldn't alloc mem for noc master-modes\n"); -+ kfree(ninfo); -+ return NULL; -+ } -+ -+ for (i = 0; i < NUM_CTX; i++) { -+ ninfo->cdata[i].mas = kzalloc(sizeof(struct -+ msm_bus_node_hw_info) * fab_pdata->nmasters * 2, -+ GFP_KERNEL); -+ if (!ninfo->cdata[i].mas) { -+ MSM_BUS_DBG("Couldn't alloc mem for noc master-bw\n"); -+ kfree(ninfo->mas_modes); -+ kfree(ninfo); -+ return NULL; -+ } -+ -+ ninfo->cdata[i].slv = kzalloc(sizeof(struct -+ msm_bus_node_hw_info) * fab_pdata->nslaves * 2, -+ GFP_KERNEL); -+ if (!ninfo->cdata[i].slv) { -+ MSM_BUS_DBG("Couldn't alloc mem for noc master-bw\n"); -+ kfree(ninfo->cdata[i].mas); -+ goto err; -+ } -+ } -+ -+ /* If it's a virtual fabric, don't get memory info */ -+ if (fab_pdata->virt) -+ goto skip_mem; -+ -+ noc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!noc_mem && !fab_pdata->virt) { -+ MSM_BUS_ERR("Cannot get NoC Base address\n"); -+ goto err; -+ } -+ -+ noc_io = request_mem_region(noc_mem->start, -+ resource_size(noc_mem), pdev->name); -+ if (!noc_io) { -+ MSM_BUS_ERR("NoC memory unavailable\n"); -+ goto err; -+ } -+ -+ ninfo->base = ioremap(noc_mem->start, resource_size(noc_mem)); -+ if (!ninfo->base) { -+ MSM_BUS_ERR("IOremap failed for NoC!\n"); -+ release_mem_region(noc_mem->start, resource_size(noc_mem)); -+ goto err; -+ } -+ -+skip_mem: -+ fab_pdata->hw_data = (void *)ninfo; -+ return (void *)ninfo; -+ -+err: -+ kfree(ninfo->mas_modes); -+ kfree(ninfo); -+ return NULL; -+} -+ -+static void free_commit_data(void *cdata) -+{ -+ struct msm_bus_noc_commit *cd = (struct msm_bus_noc_commit *)cdata; -+ -+ kfree(cd->mas); -+ kfree(cd->slv); -+ kfree(cd); -+} -+ -+static bool msm_bus_noc_update_bw_reg(int mode) -+{ -+ bool ret = false; -+ -+ if ((mode == NOC_QOS_MODE_LIMITER) || -+ (mode == NOC_QOS_MODE_REGULATOR)) -+ ret = true; -+ -+ return ret; -+} -+ -+static void msm_bus_noc_update_bw(struct msm_bus_inode_info *hop, -+ struct msm_bus_inode_info *info, -+ struct msm_bus_fabric_registration *fab_pdata, -+ void *sel_cdata, int *master_tiers, -+ int64_t add_bw) -+{ -+ struct msm_bus_noc_info *ninfo; -+ struct msm_bus_noc_qos_bw qos_bw; -+ int i, ports; -+ int64_t bw; -+ struct msm_bus_noc_commit *sel_cd = -+ (struct msm_bus_noc_commit *)sel_cdata; -+ -+ ninfo = (struct msm_bus_noc_info *)fab_pdata->hw_data; -+ if (!ninfo->qos_freq) { -+ MSM_BUS_DBG("NOC: No qos frequency to update bw\n"); -+ return; -+ } -+ -+ if (info->node_info->num_mports == 0) { -+ MSM_BUS_DBG("NOC: Skip Master BW\n"); -+ goto skip_mas_bw; -+ } -+ -+ ports = info->node_info->num_mports; -+ bw = INTERLEAVED_BW(fab_pdata, add_bw, ports); -+ -+ MSM_BUS_DBG("NOC: Update bw for: %d: %lld\n", -+ info->node_info->priv_id, add_bw); -+ for (i = 0; i < ports; i++) { -+ sel_cd->mas[info->node_info->masterp[i]].bw += bw; -+ sel_cd->mas[info->node_info->masterp[i]].hw_id = -+ info->node_info->mas_hw_id; -+ MSM_BUS_DBG("NOC: Update mas_bw: ID: %d, BW: %llu ports:%d\n", -+ info->node_info->priv_id, -+ sel_cd->mas[info->node_info->masterp[i]].bw, -+ ports); -+ /* Check if info is a shared master. -+ * If it is, mark it dirty -+ * If it isn't, then set QOS Bandwidth -+ **/ -+ if (info->node_info->hw_sel == MSM_BUS_RPM) -+ sel_cd->mas[info->node_info->masterp[i]].dirty = 1; -+ else { -+ if (!info->node_info->qport) { -+ MSM_BUS_DBG("No qos ports to update!\n"); -+ break; -+ } -+ -+ if (!(info->node_info->mode == NOC_QOS_MODE_REGULATOR) -+ || (info->node_info->mode == -+ NOC_QOS_MODE_LIMITER)) { -+ MSM_BUS_DBG("Skip QoS reg programming\n"); -+ break; -+ } -+ qos_bw.bw = sel_cd->mas[info->node_info->masterp[i]]. -+ bw; -+ qos_bw.ws = info->node_info->ws; -+ msm_bus_noc_set_qos_bw(ninfo->base, -+ ninfo->qos_baseoffset, -+ ninfo->qos_freq, -+ info->node_info->qport[i], ninfo->qos_delta, -+ info->node_info->perm_mode, &qos_bw); -+ MSM_BUS_DBG("NOC: QoS: Update mas_bw: ws: %u\n", -+ qos_bw.ws); -+ } -+ } -+ -+skip_mas_bw: -+ ports = hop->node_info->num_sports; -+ for (i = 0; i < ports; i++) { -+ sel_cd->slv[hop->node_info->slavep[i]].bw += add_bw; -+ sel_cd->slv[hop->node_info->slavep[i]].hw_id = -+ hop->node_info->slv_hw_id; -+ MSM_BUS_DBG("NOC: Update slave_bw for ID: %d -> %llu\n", -+ hop->node_info->priv_id, -+ sel_cd->slv[hop->node_info->slavep[i]].bw); -+ MSM_BUS_DBG("NOC: Update slave_bw for hw_id: %d, index: %d\n", -+ hop->node_info->slv_hw_id, hop->node_info->slavep[i]); -+ /* Check if hop is a shared slave. -+ * If it is, mark it dirty -+ * If it isn't, then nothing to be done as the -+ * slaves are in bypass mode. -+ **/ -+ if (hop->node_info->hw_sel == MSM_BUS_RPM) -+ sel_cd->slv[hop->node_info->slavep[i]].dirty = 1; -+ } -+} -+ -+static int msm_bus_noc_commit(struct msm_bus_fabric_registration -+ *fab_pdata, void *hw_data, void **cdata) -+{ -+ MSM_BUS_DBG("\nReached NOC Commit\n"); -+ msm_bus_remote_hw_commit(fab_pdata, hw_data, cdata); -+ return 0; -+} -+ -+static int msm_bus_noc_port_halt(uint32_t haltid, uint8_t mport) -+{ -+ return 0; -+} -+ -+static int msm_bus_noc_port_unhalt(uint32_t haltid, uint8_t mport) -+{ -+ return 0; -+} -+ -+static int msm_bus_noc_qos_init(struct msm_bus_node_device_type *info, -+ void __iomem *qos_base, -+ uint32_t qos_off, uint32_t qos_delta, -+ uint32_t qos_freq) -+{ -+ struct msm_bus_noc_qos_priority prio; -+ int ret = 0; -+ int i; -+ -+ prio.p1 = info->node_info->qos_params.prio1; -+ prio.p0 = info->node_info->qos_params.prio0; -+ -+ if (!info->node_info->qport) { -+ MSM_BUS_DBG("No QoS Ports to init\n"); -+ ret = 0; -+ goto err_qos_init; -+ } -+ -+ for (i = 0; i < info->node_info->num_qports; i++) { -+ if (info->node_info->qos_params.mode != NOC_QOS_MODE_BYPASS) { -+ noc_set_qos_priority(qos_base, qos_off, -+ info->node_info->qport[i], qos_delta, -+ &prio); -+ -+ if (info->node_info->qos_params.mode != -+ NOC_QOS_MODE_FIXED) { -+ struct msm_bus_noc_qos_bw qbw; -+ qbw.ws = info->node_info->qos_params.ws; -+ qbw.bw = 0; -+ msm_bus_noc_set_qos_bw(qos_base, qos_off, -+ qos_freq, -+ info->node_info->qport[i], -+ qos_delta, -+ info->node_info->qos_params.mode, -+ &qbw); -+ } -+ } -+ -+ noc_set_qos_mode(qos_base, qos_off, info->node_info->qport[i], -+ qos_delta, info->node_info->qos_params.mode, -+ (1 << info->node_info->qos_params.mode)); -+ } -+err_qos_init: -+ return ret; -+} -+ -+static int msm_bus_noc_set_bw(struct msm_bus_node_device_type *dev, -+ void __iomem *qos_base, -+ uint32_t qos_off, uint32_t qos_delta, -+ uint32_t qos_freq) -+{ -+ int ret = 0; -+ uint64_t bw = 0; -+ int i; -+ struct msm_bus_node_info_type *info = dev->node_info; -+ -+ if (info && info->num_qports && -+ ((info->qos_params.mode == NOC_QOS_MODE_REGULATOR) || -+ (info->qos_params.mode == -+ NOC_QOS_MODE_LIMITER))) { -+ struct msm_bus_noc_qos_bw qos_bw; -+ -+ bw = msm_bus_div64(info->num_qports, -+ dev->node_ab.ab[DUAL_CTX]); -+ -+ for (i = 0; i < info->num_qports; i++) { -+ if (!info->qport) { -+ MSM_BUS_DBG("No qos ports to update!\n"); -+ break; -+ } -+ -+ qos_bw.bw = bw; -+ qos_bw.ws = info->qos_params.ws; -+ msm_bus_noc_set_qos_bw(qos_base, qos_off, qos_freq, -+ info->qport[i], qos_delta, -+ info->qos_params.mode, &qos_bw); -+ MSM_BUS_DBG("NOC: QoS: Update mas_bw: ws: %u\n", -+ qos_bw.ws); -+ } -+ } -+ return ret; -+} -+int msm_bus_noc_hw_init(struct msm_bus_fabric_registration *pdata, -+ struct msm_bus_hw_algorithm *hw_algo) -+{ -+ /* Set interleaving to true by default */ -+ pdata->il_flag = true; -+ hw_algo->allocate_commit_data = msm_bus_noc_allocate_commit_data; -+ hw_algo->allocate_hw_data = msm_bus_noc_allocate_noc_data; -+ hw_algo->node_init = msm_bus_noc_node_init; -+ hw_algo->free_commit_data = free_commit_data; -+ hw_algo->update_bw = msm_bus_noc_update_bw; -+ hw_algo->commit = msm_bus_noc_commit; -+ hw_algo->port_halt = msm_bus_noc_port_halt; -+ hw_algo->port_unhalt = msm_bus_noc_port_unhalt; -+ hw_algo->update_bw_reg = msm_bus_noc_update_bw_reg; -+ hw_algo->config_master = NULL; -+ hw_algo->config_limiter = NULL; -+ -+ return 0; -+} -+ -+int msm_bus_noc_set_ops(struct msm_bus_node_device_type *bus_dev) -+{ -+ if (!bus_dev) -+ return -ENODEV; -+ else { -+ bus_dev->fabdev->noc_ops.qos_init = msm_bus_noc_qos_init; -+ bus_dev->fabdev->noc_ops.set_bw = msm_bus_noc_set_bw; -+ bus_dev->fabdev->noc_ops.limit_mport = NULL; -+ bus_dev->fabdev->noc_ops.update_bw_reg = -+ msm_bus_noc_update_bw_reg; -+ } -+ return 0; -+} -+EXPORT_SYMBOL(msm_bus_noc_set_ops); ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_noc.h -@@ -0,0 +1,76 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _ARCH_ARM_MACH_MSM_BUS_BIMC_H -+#define _ARCH_ARM_MACH_MSM_BUS_BIMC_H -+ -+enum msm_bus_noc_qos_mode_type { -+ NOC_QOS_MODE_FIXED = 0, -+ NOC_QOS_MODE_LIMITER, -+ NOC_QOS_MODE_BYPASS, -+ NOC_QOS_MODE_REGULATOR, -+ NOC_QOS_MODE_MAX, -+}; -+ -+enum msm_bus_noc_qos_mode_perm { -+ NOC_QOS_PERM_MODE_FIXED = (1 << NOC_QOS_MODE_FIXED), -+ NOC_QOS_PERM_MODE_LIMITER = (1 << NOC_QOS_MODE_LIMITER), -+ NOC_QOS_PERM_MODE_BYPASS = (1 << NOC_QOS_MODE_BYPASS), -+ NOC_QOS_PERM_MODE_REGULATOR = (1 << NOC_QOS_MODE_REGULATOR), -+}; -+ -+#define NOC_QOS_MODES_ALL_PERM (NOC_QOS_PERM_MODE_FIXED | \ -+ NOC_QOS_PERM_MODE_LIMITER | NOC_QOS_PERM_MODE_BYPASS | \ -+ NOC_QOS_PERM_MODE_REGULATOR) -+ -+struct msm_bus_noc_commit { -+ struct msm_bus_node_hw_info *mas; -+ struct msm_bus_node_hw_info *slv; -+}; -+ -+struct msm_bus_noc_info { -+ void __iomem *base; -+ uint32_t base_addr; -+ uint32_t nmasters; -+ uint32_t nqos_masters; -+ uint32_t nslaves; -+ uint32_t qos_freq; /* QOS Clock in KHz */ -+ uint32_t qos_baseoffset; -+ uint32_t qos_delta; -+ uint32_t *mas_modes; -+ struct msm_bus_noc_commit cdata[NUM_CTX]; -+}; -+ -+struct msm_bus_noc_qos_priority { -+ uint32_t high_prio; -+ uint32_t low_prio; -+ uint32_t read_prio; -+ uint32_t write_prio; -+ uint32_t p1; -+ uint32_t p0; -+}; -+ -+struct msm_bus_noc_qos_bw { -+ uint64_t bw; /* Bandwidth in bytes per second */ -+ uint32_t ws; /* Window size in nano seconds */ -+}; -+ -+void msm_bus_noc_init(struct msm_bus_noc_info *ninfo); -+uint8_t msm_bus_noc_get_qos_mode(void __iomem *base, uint32_t qos_off, -+ uint32_t mport, uint32_t qos_delta, uint32_t mode, uint32_t perm_mode); -+void msm_bus_noc_get_qos_priority(void __iomem *base, uint32_t qos_off, -+ uint32_t mport, uint32_t qos_delta, -+ struct msm_bus_noc_qos_priority *qprio); -+void msm_bus_noc_get_qos_bw(void __iomem *base, uint32_t qos_off, -+ uint32_t qos_freq, uint32_t mport, uint32_t qos_delta, -+ uint8_t perm_mode, struct msm_bus_noc_qos_bw *qbw); -+#endif /*_ARCH_ARM_MACH_MSM_BUS_NOC_H */ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_of.c -@@ -0,0 +1,705 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "msm-bus.h" -+#include "msm-bus-board.h" -+#include "msm_bus_core.h" -+ -+static const char * const hw_sel_name[] = {"RPM", "NoC", "BIMC", NULL}; -+static const char * const mode_sel_name[] = {"Fixed", "Limiter", "Bypass", -+ "Regulator", NULL}; -+ -+static int get_num(const char *const str[], const char *name) -+{ -+ int i = 0; -+ -+ do { -+ if (!strcmp(name, str[i])) -+ return i; -+ -+ i++; -+ } while (str[i] != NULL); -+ -+ pr_err("Error: string %s not found\n", name); -+ return -EINVAL; -+} -+ -+#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_MSM_BUS_SCALING) -+static struct msm_bus_scale_pdata *get_pdata(struct platform_device *pdev, -+ struct device_node *of_node) -+{ -+ struct msm_bus_scale_pdata *pdata = NULL; -+ struct msm_bus_paths *usecase = NULL; -+ int i = 0, j, ret, num_usecases = 0, num_paths, len; -+ const uint32_t *vec_arr = NULL; -+ bool mem_err = false; -+ -+ if (!pdev) { -+ pr_err("Error: Null Platform device\n"); -+ return NULL; -+ } -+ -+ pdata = devm_kzalloc(&pdev->dev, sizeof(struct msm_bus_scale_pdata), -+ GFP_KERNEL); -+ if (!pdata) { -+ pr_err("Error: Memory allocation for pdata failed\n"); -+ mem_err = true; -+ goto err; -+ } -+ -+ ret = of_property_read_string(of_node, "qcom,msm-bus,name", -+ &pdata->name); -+ if (ret) { -+ pr_err("Error: Client name not found\n"); -+ goto err; -+ } -+ -+ ret = of_property_read_u32(of_node, "qcom,msm-bus,num-cases", -+ &num_usecases); -+ if (ret) { -+ pr_err("Error: num-usecases not found\n"); -+ goto err; -+ } -+ -+ pdata->num_usecases = num_usecases; -+ -+ if (of_property_read_bool(of_node, "qcom,msm-bus,active-only")) -+ pdata->active_only = 1; -+ else { -+ pr_debug("active_only flag absent.\n"); -+ pr_debug("Using dual context by default\n"); -+ } -+ -+ usecase = devm_kzalloc(&pdev->dev, (sizeof(struct msm_bus_paths) * -+ pdata->num_usecases), GFP_KERNEL); -+ if (!usecase) { -+ pr_err("Error: Memory allocation for paths failed\n"); -+ mem_err = true; -+ goto err; -+ } -+ -+ ret = of_property_read_u32(of_node, "qcom,msm-bus,num-paths", -+ &num_paths); -+ if (ret) { -+ pr_err("Error: num_paths not found\n"); -+ goto err; -+ } -+ -+ vec_arr = of_get_property(of_node, "qcom,msm-bus,vectors-KBps", &len); -+ if (vec_arr == NULL) { -+ pr_err("Error: Vector array not found\n"); -+ goto err; -+ } -+ -+ if (len != num_usecases * num_paths * sizeof(uint32_t) * 4) { -+ pr_err("Error: Length-error on getting vectors\n"); -+ goto err; -+ } -+ -+ for (i = 0; i < num_usecases; i++) { -+ usecase[i].num_paths = num_paths; -+ usecase[i].vectors = devm_kzalloc(&pdev->dev, num_paths * -+ sizeof(struct msm_bus_vectors), GFP_KERNEL); -+ if (!usecase[i].vectors) { -+ mem_err = true; -+ pr_err("Error: Mem alloc failure in vectors\n"); -+ goto err; -+ } -+ -+ for (j = 0; j < num_paths; j++) { -+ int index = ((i * num_paths) + j) * 4; -+ usecase[i].vectors[j].src = be32_to_cpu(vec_arr[index]); -+ usecase[i].vectors[j].dst = -+ be32_to_cpu(vec_arr[index + 1]); -+ usecase[i].vectors[j].ab = (uint64_t) -+ KBTOB(be32_to_cpu(vec_arr[index + 2])); -+ usecase[i].vectors[j].ib = (uint64_t) -+ KBTOB(be32_to_cpu(vec_arr[index + 3])); -+ } -+ } -+ -+ pdata->usecase = usecase; -+ return pdata; -+err: -+ if (mem_err) { -+ for (; i > 0; i--) -+ kfree(usecase[i-1].vectors); -+ -+ kfree(usecase); -+ kfree(pdata); -+ } -+ -+ return NULL; -+} -+ -+/** -+ * msm_bus_cl_get_pdata() - Generate bus client data from device tree -+ * provided by clients. -+ * -+ * of_node: Device tree node to extract information from -+ * -+ * The function returns a valid pointer to the allocated bus-scale-pdata -+ * if the vectors were correctly read from the client's device node. -+ * Any error in reading or parsing the device node will return NULL -+ * to the caller. -+ */ -+struct msm_bus_scale_pdata *msm_bus_cl_get_pdata(struct platform_device *pdev) -+{ -+ struct device_node *of_node; -+ struct msm_bus_scale_pdata *pdata = NULL; -+ -+ if (!pdev) { -+ pr_err("Error: Null Platform device\n"); -+ return NULL; -+ } -+ -+ of_node = pdev->dev.of_node; -+ pdata = get_pdata(pdev, of_node); -+ if (!pdata) { -+ pr_err("client has to provide missing entry for successful registration\n"); -+ return NULL; -+ } -+ -+ return pdata; -+} -+EXPORT_SYMBOL(msm_bus_cl_get_pdata); -+ -+/** -+ * msm_bus_cl_pdata_from_node() - Generate bus client data from device tree -+ * node provided by clients. This function should be used when a client -+ * driver needs to register multiple bus-clients from a single device-tree -+ * node associated with the platform-device. -+ * -+ * of_node: The subnode containing information about the bus scaling -+ * data -+ * -+ * pdev: Platform device associated with the device-tree node -+ * -+ * The function returns a valid pointer to the allocated bus-scale-pdata -+ * if the vectors were correctly read from the client's device node. -+ * Any error in reading or parsing the device node will return NULL -+ * to the caller. -+ */ -+struct msm_bus_scale_pdata *msm_bus_pdata_from_node( -+ struct platform_device *pdev, struct device_node *of_node) -+{ -+ struct msm_bus_scale_pdata *pdata = NULL; -+ -+ if (!pdev) { -+ pr_err("Error: Null Platform device\n"); -+ return NULL; -+ } -+ -+ if (!of_node) { -+ pr_err("Error: Null of_node passed to bus driver\n"); -+ return NULL; -+ } -+ -+ pdata = get_pdata(pdev, of_node); -+ if (!pdata) { -+ pr_err("client has to provide missing entry for successful registration\n"); -+ return NULL; -+ } -+ -+ return pdata; -+} -+EXPORT_SYMBOL(msm_bus_pdata_from_node); -+ -+/** -+ * msm_bus_cl_clear_pdata() - Clear pdata allocated from device-tree -+ * of_node: Device tree node to extract information from -+ */ -+void msm_bus_cl_clear_pdata(struct msm_bus_scale_pdata *pdata) -+{ -+ int i; -+ -+ for (i = 0; i < pdata->num_usecases; i++) -+ kfree(pdata->usecase[i].vectors); -+ -+ kfree(pdata->usecase); -+ kfree(pdata); -+} -+EXPORT_SYMBOL(msm_bus_cl_clear_pdata); -+#endif -+ -+static int *get_arr(struct platform_device *pdev, -+ const struct device_node *node, const char *prop, -+ int *nports) -+{ -+ int size = 0, ret; -+ int *arr = NULL; -+ -+ if (of_get_property(node, prop, &size)) { -+ *nports = size / sizeof(int); -+ } else { -+ pr_debug("Property %s not available\n", prop); -+ *nports = 0; -+ return NULL; -+ } -+ -+ if (!size) { -+ *nports = 0; -+ return NULL; -+ } -+ -+ arr = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); -+ if (ZERO_OR_NULL_PTR(arr)) { -+ pr_err("Error: Failed to alloc mem for %s\n", prop); -+ return NULL; -+ } -+ -+ ret = of_property_read_u32_array(node, prop, (u32 *)arr, *nports); -+ if (ret) { -+ pr_err("Error in reading property: %s\n", prop); -+ goto err; -+ } -+ -+ return arr; -+err: -+ devm_kfree(&pdev->dev, arr); -+ return NULL; -+} -+ -+static u64 *get_th_params(struct platform_device *pdev, -+ const struct device_node *node, const char *prop, -+ int *nports) -+{ -+ int size = 0, ret; -+ u64 *ret_arr = NULL; -+ int *arr = NULL; -+ int i; -+ -+ if (of_get_property(node, prop, &size)) { -+ *nports = size / sizeof(int); -+ } else { -+ pr_debug("Property %s not available\n", prop); -+ *nports = 0; -+ return NULL; -+ } -+ -+ if (!size) { -+ *nports = 0; -+ return NULL; -+ } -+ -+ ret_arr = devm_kzalloc(&pdev->dev, (*nports * sizeof(u64)), -+ GFP_KERNEL); -+ if (ZERO_OR_NULL_PTR(ret_arr)) { -+ pr_err("Error: Failed to alloc mem for ret arr %s\n", prop); -+ return NULL; -+ } -+ -+ arr = kzalloc(size, GFP_KERNEL); -+ if ((ZERO_OR_NULL_PTR(arr))) { -+ pr_err("Error: Failed to alloc temp mem for %s\n", prop); -+ return NULL; -+ } -+ -+ ret = of_property_read_u32_array(node, prop, (u32 *)arr, *nports); -+ if (ret) { -+ pr_err("Error in reading property: %s\n", prop); -+ goto err; -+ } -+ -+ for (i = 0; i < *nports; i++) -+ ret_arr[i] = (uint64_t)KBTOB(arr[i]); -+ -+ MSM_BUS_DBG("%s: num entries %d prop %s", __func__, *nports, prop); -+ -+ for (i = 0; i < *nports; i++) -+ MSM_BUS_DBG("Th %d val %llu", i, ret_arr[i]); -+ -+ kfree(arr); -+ return ret_arr; -+err: -+ kfree(arr); -+ devm_kfree(&pdev->dev, ret_arr); -+ return NULL; -+} -+ -+static struct msm_bus_node_info *get_nodes(struct device_node *of_node, -+ struct platform_device *pdev, -+ struct msm_bus_fabric_registration *pdata) -+{ -+ struct msm_bus_node_info *info; -+ struct device_node *child_node = NULL; -+ int i = 0, ret; -+ int num_bw = 0; -+ u32 temp; -+ -+ for_each_child_of_node(of_node, child_node) { -+ i++; -+ } -+ -+ pdata->len = i; -+ info = (struct msm_bus_node_info *) -+ devm_kzalloc(&pdev->dev, sizeof(struct msm_bus_node_info) * -+ pdata->len, GFP_KERNEL); -+ if (ZERO_OR_NULL_PTR(info)) { -+ pr_err("Failed to alloc memory for nodes: %d\n", pdata->len); -+ goto err; -+ } -+ -+ i = 0; -+ child_node = NULL; -+ for_each_child_of_node(of_node, child_node) { -+ const char *sel_str; -+ -+ ret = of_property_read_string(child_node, "label", -+ &info[i].name); -+ if (ret) -+ pr_err("Error reading node label\n"); -+ -+ ret = of_property_read_u32(child_node, "cell-id", &info[i].id); -+ if (ret) { -+ pr_err("Error reading node id\n"); -+ goto err; -+ } -+ -+ if (of_property_read_bool(child_node, "qcom,gateway")) -+ info[i].gateway = 1; -+ -+ of_property_read_u32(child_node, "qcom,mas-hw-id", -+ &info[i].mas_hw_id); -+ -+ of_property_read_u32(child_node, "qcom,slv-hw-id", -+ &info[i].slv_hw_id); -+ info[i].masterp = get_arr(pdev, child_node, -+ "qcom,masterp", &info[i].num_mports); -+ /* No need to store number of qports */ -+ info[i].qport = get_arr(pdev, child_node, -+ "qcom,qport", &ret); -+ pdata->nmasters += info[i].num_mports; -+ -+ -+ info[i].slavep = get_arr(pdev, child_node, -+ "qcom,slavep", &info[i].num_sports); -+ pdata->nslaves += info[i].num_sports; -+ -+ -+ info[i].tier = get_arr(pdev, child_node, -+ "qcom,tier", &info[i].num_tiers); -+ -+ if (of_property_read_bool(child_node, "qcom,ahb")) -+ info[i].ahb = 1; -+ -+ ret = of_property_read_string(child_node, "qcom,hw-sel", -+ &sel_str); -+ if (ret) -+ info[i].hw_sel = 0; -+ else { -+ ret = get_num(hw_sel_name, sel_str); -+ if (ret < 0) { -+ pr_err("Invalid hw-sel\n"); -+ goto err; -+ } -+ -+ info[i].hw_sel = ret; -+ } -+ -+ of_property_read_u32(child_node, "qcom,buswidth", -+ &info[i].buswidth); -+ of_property_read_u32(child_node, "qcom,ws", &info[i].ws); -+ -+ info[i].dual_conf = -+ of_property_read_bool(child_node, "qcom,dual-conf"); -+ -+ -+ info[i].th = get_th_params(pdev, child_node, "qcom,thresh", -+ &info[i].num_thresh); -+ -+ info[i].bimc_bw = get_th_params(pdev, child_node, -+ "qcom,bimc,bw", &num_bw); -+ -+ if (num_bw != info[i].num_thresh) { -+ pr_err("%s:num_bw %d must equal num_thresh %d", -+ __func__, num_bw, info[i].num_thresh); -+ pr_err("%s:Err setting up dual conf for %s", -+ __func__, info[i].name); -+ goto err; -+ } -+ -+ of_property_read_u32(child_node, "qcom,bimc,gp", -+ &info[i].bimc_gp); -+ of_property_read_u32(child_node, "qcom,bimc,thmp", -+ &info[i].bimc_thmp); -+ -+ ret = of_property_read_string(child_node, "qcom,mode-thresh", -+ &sel_str); -+ if (ret) -+ info[i].mode_thresh = 0; -+ else { -+ ret = get_num(mode_sel_name, sel_str); -+ if (ret < 0) { -+ pr_err("Unknown mode :%s\n", sel_str); -+ goto err; -+ } -+ -+ info[i].mode_thresh = ret; -+ MSM_BUS_DBG("AXI: THreshold mode set: %d\n", -+ info[i].mode_thresh); -+ } -+ -+ ret = of_property_read_string(child_node, "qcom,mode", -+ &sel_str); -+ -+ if (ret) -+ info[i].mode = 0; -+ else { -+ ret = get_num(mode_sel_name, sel_str); -+ if (ret < 0) { -+ pr_err("Unknown mode :%s\n", sel_str); -+ goto err; -+ } -+ -+ info[i].mode = ret; -+ } -+ -+ info[i].nr_lim = -+ of_property_read_bool(child_node, "qcom,nr-lim"); -+ -+ ret = of_property_read_u32(child_node, "qcom,ff", -+ &info[i].ff); -+ if (ret) { -+ pr_debug("fudge factor not present %d", info[i].id); -+ info[i].ff = 0; -+ } -+ -+ ret = of_property_read_u32(child_node, "qcom,floor-bw", -+ &temp); -+ if (ret) { -+ pr_debug("fabdev floor bw not present %d", info[i].id); -+ info[i].floor_bw = 0; -+ } else { -+ info[i].floor_bw = KBTOB(temp); -+ } -+ -+ info[i].rt_mas = -+ of_property_read_bool(child_node, "qcom,rt-mas"); -+ -+ ret = of_property_read_string(child_node, "qcom,perm-mode", -+ &sel_str); -+ if (ret) -+ info[i].perm_mode = 0; -+ else { -+ ret = get_num(mode_sel_name, sel_str); -+ if (ret < 0) -+ goto err; -+ -+ info[i].perm_mode = 1 << ret; -+ } -+ -+ of_property_read_u32(child_node, "qcom,prio-lvl", -+ &info[i].prio_lvl); -+ of_property_read_u32(child_node, "qcom,prio-rd", -+ &info[i].prio_rd); -+ of_property_read_u32(child_node, "qcom,prio-wr", -+ &info[i].prio_wr); -+ of_property_read_u32(child_node, "qcom,prio0", &info[i].prio0); -+ of_property_read_u32(child_node, "qcom,prio1", &info[i].prio1); -+ ret = of_property_read_string(child_node, "qcom,slaveclk-dual", -+ &info[i].slaveclk[DUAL_CTX]); -+ if (!ret) -+ pr_debug("Got slaveclk_dual: %s\n", -+ info[i].slaveclk[DUAL_CTX]); -+ else -+ info[i].slaveclk[DUAL_CTX] = NULL; -+ -+ ret = of_property_read_string(child_node, -+ "qcom,slaveclk-active", &info[i].slaveclk[ACTIVE_CTX]); -+ if (!ret) -+ pr_debug("Got slaveclk_active\n"); -+ else -+ info[i].slaveclk[ACTIVE_CTX] = NULL; -+ -+ ret = of_property_read_string(child_node, "qcom,memclk-dual", -+ &info[i].memclk[DUAL_CTX]); -+ if (!ret) -+ pr_debug("Got memclk_dual\n"); -+ else -+ info[i].memclk[DUAL_CTX] = NULL; -+ -+ ret = of_property_read_string(child_node, "qcom,memclk-active", -+ &info[i].memclk[ACTIVE_CTX]); -+ if (!ret) -+ pr_debug("Got memclk_active\n"); -+ else -+ info[i].memclk[ACTIVE_CTX] = NULL; -+ -+ ret = of_property_read_string(child_node, "qcom,iface-clk-node", -+ &info[i].iface_clk_node); -+ if (!ret) -+ pr_debug("Got iface_clk_node\n"); -+ else -+ info[i].iface_clk_node = NULL; -+ -+ pr_debug("Node name: %s\n", info[i].name); -+ of_node_put(child_node); -+ i++; -+ } -+ -+ pr_debug("Bus %d added: %d masters\n", pdata->id, pdata->nmasters); -+ pr_debug("Bus %d added: %d slaves\n", pdata->id, pdata->nslaves); -+ return info; -+err: -+ return NULL; -+} -+ -+void msm_bus_of_get_nfab(struct platform_device *pdev, -+ struct msm_bus_fabric_registration *pdata) -+{ -+ struct device_node *of_node; -+ int ret, nfab = 0; -+ -+ if (!pdev) { -+ pr_err("Error: Null platform device\n"); -+ return; -+ } -+ -+ of_node = pdev->dev.of_node; -+ ret = of_property_read_u32(of_node, "qcom,nfab", -+ &nfab); -+ if (!ret) -+ pr_debug("Fab_of: Read number of buses: %u\n", nfab); -+ -+ msm_bus_board_set_nfab(pdata, nfab); -+} -+ -+struct msm_bus_fabric_registration -+ *msm_bus_of_get_fab_data(struct platform_device *pdev) -+{ -+ struct device_node *of_node; -+ struct msm_bus_fabric_registration *pdata; -+ bool mem_err = false; -+ int ret = 0; -+ const char *sel_str; -+ u32 temp; -+ -+ if (!pdev) { -+ pr_err("Error: Null platform device\n"); -+ return NULL; -+ } -+ -+ of_node = pdev->dev.of_node; -+ pdata = devm_kzalloc(&pdev->dev, -+ sizeof(struct msm_bus_fabric_registration), GFP_KERNEL); -+ if (!pdata) { -+ pr_err("Error: Memory allocation for pdata failed\n"); -+ mem_err = true; -+ goto err; -+ } -+ -+ ret = of_property_read_string(of_node, "label", &pdata->name); -+ if (ret) { -+ pr_err("Error: label not found\n"); -+ goto err; -+ } -+ pr_debug("Fab_of: Read name: %s\n", pdata->name); -+ -+ ret = of_property_read_u32(of_node, "cell-id", -+ &pdata->id); -+ if (ret) { -+ pr_err("Error: num-usecases not found\n"); -+ goto err; -+ } -+ pr_debug("Fab_of: Read id: %u\n", pdata->id); -+ -+ if (of_property_read_bool(of_node, "qcom,ahb")) -+ pdata->ahb = 1; -+ -+ ret = of_property_read_string(of_node, "qcom,fabclk-dual", -+ &pdata->fabclk[DUAL_CTX]); -+ if (ret) { -+ pr_debug("fabclk_dual not available\n"); -+ pdata->fabclk[DUAL_CTX] = NULL; -+ } else -+ pr_debug("Fab_of: Read clk dual ctx: %s\n", -+ pdata->fabclk[DUAL_CTX]); -+ ret = of_property_read_string(of_node, "qcom,fabclk-active", -+ &pdata->fabclk[ACTIVE_CTX]); -+ if (ret) { -+ pr_debug("Error: fabclk_active not available\n"); -+ pdata->fabclk[ACTIVE_CTX] = NULL; -+ } else -+ pr_debug("Fab_of: Read clk act ctx: %s\n", -+ pdata->fabclk[ACTIVE_CTX]); -+ -+ ret = of_property_read_u32(of_node, "qcom,ntieredslaves", -+ &pdata->ntieredslaves); -+ if (ret) { -+ pr_err("Error: ntieredslaves not found\n"); -+ goto err; -+ } -+ -+ ret = of_property_read_u32(of_node, "qcom,qos-freq", &pdata->qos_freq); -+ if (ret) -+ pr_debug("qos_freq not available\n"); -+ -+ ret = of_property_read_string(of_node, "qcom,hw-sel", &sel_str); -+ if (ret) { -+ pr_err("Error: hw_sel not found\n"); -+ goto err; -+ } else { -+ ret = get_num(hw_sel_name, sel_str); -+ if (ret < 0) -+ goto err; -+ -+ pdata->hw_sel = ret; -+ } -+ -+ if (of_property_read_bool(of_node, "qcom,virt")) -+ pdata->virt = true; -+ -+ ret = of_property_read_u32(of_node, "qcom,qos-baseoffset", -+ &pdata->qos_baseoffset); -+ if (ret) -+ pr_debug("%s:qos_baseoffset not available\n", __func__); -+ -+ ret = of_property_read_u32(of_node, "qcom,qos-delta", -+ &pdata->qos_delta); -+ if (ret) -+ pr_debug("%s:qos_delta not available\n", __func__); -+ -+ if (of_property_read_bool(of_node, "qcom,rpm-en")) -+ pdata->rpm_enabled = 1; -+ -+ ret = of_property_read_u32(of_node, "qcom,nr-lim-thresh", -+ &temp); -+ -+ if (ret) { -+ pr_err("nr-lim threshold not specified"); -+ pdata->nr_lim_thresh = 0; -+ } else { -+ pdata->nr_lim_thresh = KBTOB(temp); -+ } -+ -+ ret = of_property_read_u32(of_node, "qcom,eff-fact", -+ &pdata->eff_fact); -+ if (ret) { -+ pr_err("Fab eff-factor not present"); -+ pdata->eff_fact = 0; -+ } -+ -+ pdata->info = get_nodes(of_node, pdev, pdata); -+ return pdata; -+err: -+ return NULL; -+} -+EXPORT_SYMBOL(msm_bus_of_get_fab_data); ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_of_adhoc.c -@@ -0,0 +1,641 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#define pr_fmt(fmt) "AXI: %s(): " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "msm-bus.h" -+#include "msm-bus-board.h" -+#include "msm_bus_rules.h" -+#include "msm_bus_core.h" -+#include "msm_bus_adhoc.h" -+ -+#define DEFAULT_QOS_FREQ 19200 -+#define DEFAULT_UTIL_FACT 100 -+#define DEFAULT_VRAIL_COMP 100 -+ -+static int get_qos_mode(struct platform_device *pdev, -+ struct device_node *node, const char *qos_mode) -+{ -+ const char *qos_names[] = {"fixed", "limiter", "bypass", "regulator"}; -+ int i = 0; -+ int ret = -1; -+ -+ if (!qos_mode) -+ goto exit_get_qos_mode; -+ -+ for (i = 0; i < ARRAY_SIZE(qos_names); i++) { -+ if (!strcmp(qos_mode, qos_names[i])) -+ break; -+ } -+ if (i == ARRAY_SIZE(qos_names)) -+ dev_err(&pdev->dev, "Cannot match mode qos %s using Bypass", -+ qos_mode); -+ else -+ ret = i; -+ -+exit_get_qos_mode: -+ return ret; -+} -+ -+static int *get_arr(struct platform_device *pdev, -+ struct device_node *node, const char *prop, -+ int *nports) -+{ -+ int size = 0, ret; -+ int *arr = NULL; -+ -+ if (of_get_property(node, prop, &size)) { -+ *nports = size / sizeof(int); -+ } else { -+ dev_dbg(&pdev->dev, "Property %s not available\n", prop); -+ *nports = 0; -+ return NULL; -+ } -+ -+ arr = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); -+ if ((size > 0) && ZERO_OR_NULL_PTR(arr)) { -+ dev_err(&pdev->dev, "Error: Failed to alloc mem for %s\n", -+ prop); -+ return NULL; -+ } -+ -+ ret = of_property_read_u32_array(node, prop, (u32 *)arr, *nports); -+ if (ret) { -+ dev_err(&pdev->dev, "Error in reading property: %s\n", prop); -+ goto arr_err; -+ } -+ -+ return arr; -+arr_err: -+ devm_kfree(&pdev->dev, arr); -+ return NULL; -+} -+ -+static struct msm_bus_fab_device_type *get_fab_device_info( -+ struct device_node *dev_node, -+ struct platform_device *pdev) -+{ -+ struct msm_bus_fab_device_type *fab_dev; -+ unsigned int ret; -+ struct resource *res; -+ const char *base_name; -+ -+ fab_dev = devm_kzalloc(&pdev->dev, -+ sizeof(struct msm_bus_fab_device_type), -+ GFP_KERNEL); -+ if (!fab_dev) { -+ dev_err(&pdev->dev, -+ "Error: Unable to allocate memory for fab_dev\n"); -+ return NULL; -+ } -+ -+ ret = of_property_read_string(dev_node, "qcom,base-name", &base_name); -+ if (ret) { -+ dev_err(&pdev->dev, "Error: Unable to get base address name\n"); -+ goto fab_dev_err; -+ } -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, base_name); -+ if (!res) { -+ dev_err(&pdev->dev, "Error getting qos base addr %s\n", -+ base_name); -+ goto fab_dev_err; -+ } -+ fab_dev->pqos_base = res->start; -+ fab_dev->qos_range = resource_size(res); -+ fab_dev->bypass_qos_prg = of_property_read_bool(dev_node, -+ "qcom,bypass-qos-prg"); -+ -+ ret = of_property_read_u32(dev_node, "qcom,base-offset", -+ &fab_dev->base_offset); -+ if (ret) -+ dev_dbg(&pdev->dev, "Bus base offset is missing\n"); -+ -+ ret = of_property_read_u32(dev_node, "qcom,qos-off", -+ &fab_dev->qos_off); -+ if (ret) -+ dev_dbg(&pdev->dev, "Bus qos off is missing\n"); -+ -+ -+ ret = of_property_read_u32(dev_node, "qcom,bus-type", -+ &fab_dev->bus_type); -+ if (ret) { -+ dev_warn(&pdev->dev, "Bus type is missing\n"); -+ goto fab_dev_err; -+ } -+ -+ ret = of_property_read_u32(dev_node, "qcom,qos-freq", -+ &fab_dev->qos_freq); -+ if (ret) { -+ dev_dbg(&pdev->dev, "Bus qos freq is missing\n"); -+ fab_dev->qos_freq = DEFAULT_QOS_FREQ; -+ } -+ -+ ret = of_property_read_u32(dev_node, "qcom,util-fact", -+ &fab_dev->util_fact); -+ if (ret) { -+ dev_info(&pdev->dev, "Util-fact is missing, default to %d\n", -+ DEFAULT_UTIL_FACT); -+ fab_dev->util_fact = DEFAULT_UTIL_FACT; -+ } -+ -+ ret = of_property_read_u32(dev_node, "qcom,vrail-comp", -+ &fab_dev->vrail_comp); -+ if (ret) { -+ dev_info(&pdev->dev, "Vrail-comp is missing, default to %d\n", -+ DEFAULT_VRAIL_COMP); -+ fab_dev->vrail_comp = DEFAULT_VRAIL_COMP; -+ } -+ -+ return fab_dev; -+ -+fab_dev_err: -+ devm_kfree(&pdev->dev, fab_dev); -+ fab_dev = 0; -+ return NULL; -+} -+ -+static void get_qos_params( -+ struct device_node * const dev_node, -+ struct platform_device * const pdev, -+ struct msm_bus_node_info_type *node_info) -+{ -+ const char *qos_mode = NULL; -+ unsigned int ret; -+ unsigned int temp; -+ -+ ret = of_property_read_string(dev_node, "qcom,qos-mode", &qos_mode); -+ -+ if (ret) -+ node_info->qos_params.mode = -1; -+ else -+ node_info->qos_params.mode = get_qos_mode(pdev, dev_node, -+ qos_mode); -+ -+ of_property_read_u32(dev_node, "qcom,prio-lvl", -+ &node_info->qos_params.prio_lvl); -+ -+ of_property_read_u32(dev_node, "qcom,prio1", -+ &node_info->qos_params.prio1); -+ -+ of_property_read_u32(dev_node, "qcom,prio0", -+ &node_info->qos_params.prio0); -+ -+ of_property_read_u32(dev_node, "qcom,prio-rd", -+ &node_info->qos_params.prio_rd); -+ -+ of_property_read_u32(dev_node, "qcom,prio-wr", -+ &node_info->qos_params.prio_wr); -+ -+ of_property_read_u32(dev_node, "qcom,gp", -+ &node_info->qos_params.gp); -+ -+ of_property_read_u32(dev_node, "qcom,thmp", -+ &node_info->qos_params.thmp); -+ -+ of_property_read_u32(dev_node, "qcom,ws", -+ &node_info->qos_params.ws); -+ -+ ret = of_property_read_u32(dev_node, "qcom,bw_buffer", &temp); -+ -+ if (ret) -+ node_info->qos_params.bw_buffer = 0; -+ else -+ node_info->qos_params.bw_buffer = KBTOB(temp); -+ -+} -+ -+ -+static struct msm_bus_node_info_type *get_node_info_data( -+ struct device_node * const dev_node, -+ struct platform_device * const pdev) -+{ -+ struct msm_bus_node_info_type *node_info; -+ unsigned int ret; -+ int size; -+ int i; -+ struct device_node *con_node; -+ struct device_node *bus_dev; -+ -+ node_info = devm_kzalloc(&pdev->dev, -+ sizeof(struct msm_bus_node_info_type), -+ GFP_KERNEL); -+ if (!node_info) { -+ dev_err(&pdev->dev, -+ "Error: Unable to allocate memory for node_info\n"); -+ return NULL; -+ } -+ -+ ret = of_property_read_u32(dev_node, "cell-id", &node_info->id); -+ if (ret) { -+ dev_warn(&pdev->dev, "Bus node is missing cell-id\n"); -+ goto node_info_err; -+ } -+ ret = of_property_read_string(dev_node, "label", &node_info->name); -+ if (ret) { -+ dev_warn(&pdev->dev, "Bus node is missing name\n"); -+ goto node_info_err; -+ } -+ node_info->qport = get_arr(pdev, dev_node, "qcom,qport", -+ &node_info->num_qports); -+ -+ if (of_get_property(dev_node, "qcom,connections", &size)) { -+ node_info->num_connections = size / sizeof(int); -+ node_info->connections = devm_kzalloc(&pdev->dev, size, -+ GFP_KERNEL); -+ } else { -+ node_info->num_connections = 0; -+ node_info->connections = 0; -+ } -+ -+ for (i = 0; i < node_info->num_connections; i++) { -+ con_node = of_parse_phandle(dev_node, "qcom,connections", i); -+ if (IS_ERR_OR_NULL(con_node)) -+ goto node_info_err; -+ -+ if (of_property_read_u32(con_node, "cell-id", -+ &node_info->connections[i])) -+ goto node_info_err; -+ of_node_put(con_node); -+ } -+ -+ if (of_get_property(dev_node, "qcom,blacklist", &size)) { -+ node_info->num_blist = size/sizeof(u32); -+ node_info->black_listed_connections = devm_kzalloc(&pdev->dev, -+ size, GFP_KERNEL); -+ } else { -+ node_info->num_blist = 0; -+ node_info->black_listed_connections = 0; -+ } -+ -+ for (i = 0; i < node_info->num_blist; i++) { -+ con_node = of_parse_phandle(dev_node, "qcom,blacklist", i); -+ if (IS_ERR_OR_NULL(con_node)) -+ goto node_info_err; -+ -+ if (of_property_read_u32(con_node, "cell-id", -+ &node_info->black_listed_connections[i])) -+ goto node_info_err; -+ of_node_put(con_node); -+ } -+ -+ bus_dev = of_parse_phandle(dev_node, "qcom,bus-dev", 0); -+ if (!IS_ERR_OR_NULL(bus_dev)) { -+ if (of_property_read_u32(bus_dev, "cell-id", -+ &node_info->bus_device_id)) { -+ dev_err(&pdev->dev, "Can't find bus device. Node %d", -+ node_info->id); -+ goto node_info_err; -+ } -+ -+ of_node_put(bus_dev); -+ } else -+ dev_dbg(&pdev->dev, "Can't find bdev phandle for %d", -+ node_info->id); -+ -+ node_info->is_fab_dev = of_property_read_bool(dev_node, "qcom,fab-dev"); -+ node_info->virt_dev = of_property_read_bool(dev_node, "qcom,virt-dev"); -+ -+ ret = of_property_read_u32(dev_node, "qcom,buswidth", -+ &node_info->buswidth); -+ if (ret) { -+ dev_dbg(&pdev->dev, "Using default 8 bytes %d", node_info->id); -+ node_info->buswidth = 8; -+ } -+ -+ ret = of_property_read_u32(dev_node, "qcom,mas-rpm-id", -+ &node_info->mas_rpm_id); -+ if (ret) { -+ dev_dbg(&pdev->dev, "mas rpm id is missing\n"); -+ node_info->mas_rpm_id = -1; -+ } -+ -+ ret = of_property_read_u32(dev_node, "qcom,slv-rpm-id", -+ &node_info->slv_rpm_id); -+ if (ret) { -+ dev_dbg(&pdev->dev, "slv rpm id is missing\n"); -+ node_info->slv_rpm_id = -1; -+ } -+ ret = of_property_read_u32(dev_node, "qcom,util-fact", -+ &node_info->util_fact); -+ if (ret) -+ node_info->util_fact = 0; -+ ret = of_property_read_u32(dev_node, "qcom,vrail-comp", -+ &node_info->vrail_comp); -+ if (ret) -+ node_info->vrail_comp = 0; -+ get_qos_params(dev_node, pdev, node_info); -+ -+ return node_info; -+ -+node_info_err: -+ devm_kfree(&pdev->dev, node_info); -+ node_info = 0; -+ return NULL; -+} -+ -+static unsigned int get_bus_node_device_data( -+ struct device_node * const dev_node, -+ struct platform_device * const pdev, -+ struct msm_bus_node_device_type * const node_device) -+{ -+ node_device->node_info = get_node_info_data(dev_node, pdev); -+ if (IS_ERR_OR_NULL(node_device->node_info)) { -+ dev_err(&pdev->dev, "Error: Node info missing\n"); -+ return -ENODATA; -+ } -+ node_device->ap_owned = of_property_read_bool(dev_node, -+ "qcom,ap-owned"); -+ -+ if (node_device->node_info->is_fab_dev) { -+ dev_dbg(&pdev->dev, "Dev %d\n", node_device->node_info->id); -+ -+ if (!node_device->node_info->virt_dev) { -+ node_device->fabdev = -+ get_fab_device_info(dev_node, pdev); -+ if (IS_ERR_OR_NULL(node_device->fabdev)) { -+ dev_err(&pdev->dev, -+ "Error: Fabric device info missing\n"); -+ devm_kfree(&pdev->dev, node_device->node_info); -+ return -ENODATA; -+ } -+ } -+ node_device->clk[DUAL_CTX].clk = of_clk_get_by_name(dev_node, -+ "bus_clk"); -+ -+ if (IS_ERR_OR_NULL(node_device->clk[DUAL_CTX].clk)) -+ dev_dbg(&pdev->dev, -+ "%s:Failed to get bus clk for bus%d ctx%d", -+ __func__, node_device->node_info->id, -+ DUAL_CTX); -+ -+ node_device->clk[ACTIVE_CTX].clk = of_clk_get_by_name(dev_node, -+ "bus_a_clk"); -+ if (IS_ERR_OR_NULL(node_device->clk[ACTIVE_CTX].clk)) -+ dev_err(&pdev->dev, -+ "Failed to get bus clk for bus%d ctx%d", -+ node_device->node_info->id, ACTIVE_CTX); -+ if (msmbus_coresight_init_adhoc(pdev, dev_node)) -+ dev_warn(&pdev->dev, -+ "Coresight support absent for bus: %d\n", -+ node_device->node_info->id); -+ } else { -+ node_device->qos_clk.clk = of_clk_get_by_name(dev_node, -+ "bus_qos_clk"); -+ -+ if (IS_ERR_OR_NULL(node_device->qos_clk.clk)) -+ dev_dbg(&pdev->dev, -+ "%s:Failed to get bus qos clk for mas%d", -+ __func__, node_device->node_info->id); -+ -+ node_device->clk[DUAL_CTX].clk = of_clk_get_by_name(dev_node, -+ "node_clk"); -+ -+ if (IS_ERR_OR_NULL(node_device->clk[DUAL_CTX].clk)) -+ dev_dbg(&pdev->dev, -+ "%s:Failed to get bus clk for bus%d ctx%d", -+ __func__, node_device->node_info->id, -+ DUAL_CTX); -+ -+ } -+ return 0; -+} -+ -+struct msm_bus_device_node_registration -+ *msm_bus_of_to_pdata(struct platform_device *pdev) -+{ -+ struct device_node *of_node, *child_node; -+ struct msm_bus_device_node_registration *pdata; -+ unsigned int i = 0, j; -+ unsigned int ret; -+ -+ if (!pdev) { -+ pr_err("Error: Null platform device\n"); -+ return NULL; -+ } -+ -+ of_node = pdev->dev.of_node; -+ -+ pdata = devm_kzalloc(&pdev->dev, -+ sizeof(struct msm_bus_device_node_registration), -+ GFP_KERNEL); -+ if (!pdata) { -+ dev_err(&pdev->dev, -+ "Error: Memory allocation for pdata failed\n"); -+ return NULL; -+ } -+ -+ pdata->num_devices = of_get_child_count(of_node); -+ -+ pdata->info = devm_kzalloc(&pdev->dev, -+ sizeof(struct msm_bus_node_device_type) * -+ pdata->num_devices, GFP_KERNEL); -+ -+ if (!pdata->info) { -+ dev_err(&pdev->dev, -+ "Error: Memory allocation for pdata->info failed\n"); -+ goto node_reg_err; -+ } -+ -+ ret = 0; -+ for_each_child_of_node(of_node, child_node) { -+ ret = get_bus_node_device_data(child_node, pdev, -+ &pdata->info[i]); -+ if (ret) { -+ dev_err(&pdev->dev, "Error: unable to initialize bus nodes\n"); -+ goto node_reg_err_1; -+ } -+ i++; -+ } -+ -+ dev_dbg(&pdev->dev, "bus topology:\n"); -+ for (i = 0; i < pdata->num_devices; i++) { -+ dev_dbg(&pdev->dev, "id %d\nnum_qports %d\nnum_connections %d", -+ pdata->info[i].node_info->id, -+ pdata->info[i].node_info->num_qports, -+ pdata->info[i].node_info->num_connections); -+ dev_dbg(&pdev->dev, "\nbus_device_id %d\n buswidth %d\n", -+ pdata->info[i].node_info->bus_device_id, -+ pdata->info[i].node_info->buswidth); -+ for (j = 0; j < pdata->info[i].node_info->num_connections; -+ j++) { -+ dev_dbg(&pdev->dev, "connection[%d]: %d\n", j, -+ pdata->info[i].node_info->connections[j]); -+ } -+ for (j = 0; j < pdata->info[i].node_info->num_blist; -+ j++) { -+ dev_dbg(&pdev->dev, "black_listed_node[%d]: %d\n", j, -+ pdata->info[i].node_info-> -+ black_listed_connections[j]); -+ } -+ if (pdata->info[i].fabdev) -+ dev_dbg(&pdev->dev, "base_addr %zu\nbus_type %d\n", -+ (size_t)pdata->info[i]. -+ fabdev->pqos_base, -+ pdata->info[i].fabdev->bus_type); -+ } -+ return pdata; -+ -+node_reg_err_1: -+ devm_kfree(&pdev->dev, pdata->info); -+node_reg_err: -+ devm_kfree(&pdev->dev, pdata); -+ pdata = NULL; -+ return NULL; -+} -+ -+static int msm_bus_of_get_ids(struct platform_device *pdev, -+ struct device_node *dev_node, int **dev_ids, -+ int *num_ids, char *prop_name) -+{ -+ int ret = 0; -+ int size, i; -+ struct device_node *rule_node; -+ int *ids = NULL; -+ -+ if (of_get_property(dev_node, prop_name, &size)) { -+ *num_ids = size / sizeof(int); -+ ids = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); -+ } else { -+ dev_err(&pdev->dev, "No rule nodes, skipping node"); -+ ret = -ENXIO; -+ goto exit_get_ids; -+ } -+ -+ *dev_ids = ids; -+ for (i = 0; i < *num_ids; i++) { -+ rule_node = of_parse_phandle(dev_node, prop_name, i); -+ if (IS_ERR_OR_NULL(rule_node)) { -+ dev_err(&pdev->dev, "Can't get rule node id"); -+ ret = -ENXIO; -+ goto err_get_ids; -+ } -+ -+ if (of_property_read_u32(rule_node, "cell-id", -+ &ids[i])) { -+ dev_err(&pdev->dev, "Can't get rule node id"); -+ ret = -ENXIO; -+ goto err_get_ids; -+ } -+ of_node_put(rule_node); -+ } -+exit_get_ids: -+ return ret; -+err_get_ids: -+ devm_kfree(&pdev->dev, ids); -+ of_node_put(rule_node); -+ ids = NULL; -+ return ret; -+} -+ -+int msm_bus_of_get_static_rules(struct platform_device *pdev, -+ struct bus_rule_type **static_rules) -+{ -+ int ret = 0; -+ struct device_node *of_node, *child_node; -+ int num_rules = 0; -+ int rule_idx = 0; -+ int bw_fld = 0; -+ int i; -+ struct bus_rule_type *static_rule = NULL; -+ -+ of_node = pdev->dev.of_node; -+ num_rules = of_get_child_count(of_node); -+ static_rule = devm_kzalloc(&pdev->dev, -+ sizeof(struct bus_rule_type) * num_rules, -+ GFP_KERNEL); -+ -+ if (IS_ERR_OR_NULL(static_rule)) { -+ ret = -ENOMEM; -+ goto exit_static_rules; -+ } -+ -+ *static_rules = static_rule; -+ for_each_child_of_node(of_node, child_node) { -+ ret = msm_bus_of_get_ids(pdev, child_node, -+ &static_rule[rule_idx].src_id, -+ &static_rule[rule_idx].num_src, -+ "qcom,src-nodes"); -+ -+ ret = msm_bus_of_get_ids(pdev, child_node, -+ &static_rule[rule_idx].dst_node, -+ &static_rule[rule_idx].num_dst, -+ "qcom,dest-node"); -+ -+ ret = of_property_read_u32(child_node, "qcom,src-field", -+ &static_rule[rule_idx].src_field); -+ if (ret) { -+ dev_err(&pdev->dev, "src-field missing"); -+ ret = -ENXIO; -+ goto err_static_rules; -+ } -+ -+ ret = of_property_read_u32(child_node, "qcom,src-op", -+ &static_rule[rule_idx].op); -+ if (ret) { -+ dev_err(&pdev->dev, "src-op missing"); -+ ret = -ENXIO; -+ goto err_static_rules; -+ } -+ -+ ret = of_property_read_u32(child_node, "qcom,mode", -+ &static_rule[rule_idx].mode); -+ if (ret) { -+ dev_err(&pdev->dev, "mode missing"); -+ ret = -ENXIO; -+ goto err_static_rules; -+ } -+ -+ ret = of_property_read_u32(child_node, "qcom,thresh", &bw_fld); -+ if (ret) { -+ dev_err(&pdev->dev, "thresh missing"); -+ ret = -ENXIO; -+ goto err_static_rules; -+ } else -+ static_rule[rule_idx].thresh = KBTOB(bw_fld); -+ -+ ret = of_property_read_u32(child_node, "qcom,dest-bw", -+ &bw_fld); -+ if (ret) -+ static_rule[rule_idx].dst_bw = 0; -+ else -+ static_rule[rule_idx].dst_bw = KBTOB(bw_fld); -+ -+ rule_idx++; -+ } -+ ret = rule_idx; -+exit_static_rules: -+ return ret; -+err_static_rules: -+ for (i = 0; i < num_rules; i++) { -+ if (!IS_ERR_OR_NULL(static_rule)) { -+ if (!IS_ERR_OR_NULL(static_rule[i].src_id)) -+ devm_kfree(&pdev->dev, -+ static_rule[i].src_id); -+ if (!IS_ERR_OR_NULL(static_rule[i].dst_node)) -+ devm_kfree(&pdev->dev, -+ static_rule[i].dst_node); -+ devm_kfree(&pdev->dev, static_rule); -+ } -+ } -+ devm_kfree(&pdev->dev, *static_rules); -+ static_rules = NULL; -+ return ret; -+} ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_rules.c -@@ -0,0 +1,624 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include "msm-bus-board.h" -+#include "msm_bus_rules.h" -+#include -+ -+struct node_vote_info { -+ int id; -+ u64 ib; -+ u64 ab; -+ u64 clk; -+}; -+ -+struct rules_def { -+ int rule_id; -+ int num_src; -+ int state; -+ struct node_vote_info *src_info; -+ struct bus_rule_type rule_ops; -+ bool state_change; -+ struct list_head link; -+}; -+ -+struct rule_node_info { -+ int id; -+ void *data; -+ struct raw_notifier_head rule_notify_list; -+ int cur_rule; -+ int num_rules; -+ struct list_head node_rules; -+ struct list_head link; -+ struct rule_apply_rcm_info apply; -+}; -+ -+DEFINE_MUTEX(msm_bus_rules_lock); -+static LIST_HEAD(node_list); -+static struct rule_node_info *get_node(u32 id, void *data); -+ -+#define LE(op1, op2) (op1 <= op2) -+#define LT(op1, op2) (op1 < op2) -+#define GE(op1, op2) (op1 >= op2) -+#define GT(op1, op2) (op1 > op2) -+#define NB_ID (0x201) -+ -+static struct rule_node_info *get_node(u32 id, void *data) -+{ -+ struct rule_node_info *node_it = NULL; -+ struct rule_node_info *node_match = NULL; -+ -+ list_for_each_entry(node_it, &node_list, link) { -+ if (node_it->id == id) { -+ if ((id == NB_ID)) { -+ if ((node_it->data == data)) { -+ node_match = node_it; -+ break; -+ } -+ } else { -+ node_match = node_it; -+ break; -+ } -+ } -+ } -+ return node_match; -+} -+ -+static struct rule_node_info *gen_node(u32 id, void *data) -+{ -+ struct rule_node_info *node_it = NULL; -+ struct rule_node_info *node_match = NULL; -+ -+ list_for_each_entry(node_it, &node_list, link) { -+ if (node_it->id == id) { -+ node_match = node_it; -+ break; -+ } -+ } -+ -+ if (!node_match) { -+ node_match = kzalloc(sizeof(struct rule_node_info), GFP_KERNEL); -+ if (!node_match) { -+ pr_err("%s: Cannot allocate memory", __func__); -+ goto exit_node_match; -+ } -+ -+ node_match->id = id; -+ node_match->cur_rule = -1; -+ node_match->num_rules = 0; -+ node_match->data = data; -+ list_add_tail(&node_match->link, &node_list); -+ INIT_LIST_HEAD(&node_match->node_rules); -+ RAW_INIT_NOTIFIER_HEAD(&node_match->rule_notify_list); -+ pr_debug("Added new node %d to list\n", id); -+ } -+exit_node_match: -+ return node_match; -+} -+ -+static bool do_compare_op(u64 op1, u64 op2, int op) -+{ -+ bool ret = false; -+ -+ switch (op) { -+ case OP_LE: -+ ret = LE(op1, op2); -+ break; -+ case OP_LT: -+ ret = LT(op1, op2); -+ break; -+ case OP_GT: -+ ret = GT(op1, op2); -+ break; -+ case OP_GE: -+ ret = GE(op1, op2); -+ break; -+ case OP_NOOP: -+ ret = true; -+ break; -+ default: -+ pr_info("Invalid OP %d", op); -+ break; -+ } -+ return ret; -+} -+ -+static void update_src_id_vote(struct rule_update_path_info *inp_node, -+ struct rule_node_info *rule_node) -+{ -+ struct rules_def *rule; -+ int i; -+ -+ list_for_each_entry(rule, &rule_node->node_rules, link) { -+ for (i = 0; i < rule->num_src; i++) { -+ if (rule->src_info[i].id == inp_node->id) { -+ rule->src_info[i].ib = inp_node->ib; -+ rule->src_info[i].ab = inp_node->ab; -+ rule->src_info[i].clk = inp_node->clk; -+ } -+ } -+ } -+} -+ -+static u64 get_field(struct rules_def *rule, int src_id) -+{ -+ u64 field = 0; -+ int i; -+ -+ for (i = 0; i < rule->num_src; i++) { -+ switch (rule->rule_ops.src_field) { -+ case FLD_IB: -+ field += rule->src_info[i].ib; -+ break; -+ case FLD_AB: -+ field += rule->src_info[i].ab; -+ break; -+ case FLD_CLK: -+ field += rule->src_info[i].clk; -+ break; -+ } -+ } -+ -+ return field; -+} -+ -+static bool check_rule(struct rules_def *rule, -+ struct rule_update_path_info *inp) -+{ -+ bool ret = false; -+ -+ if (!rule) -+ return ret; -+ -+ switch (rule->rule_ops.op) { -+ case OP_LE: -+ case OP_LT: -+ case OP_GT: -+ case OP_GE: -+ { -+ u64 src_field = get_field(rule, inp->id); -+ if (!src_field) -+ ret = false; -+ else -+ ret = do_compare_op(src_field, rule->rule_ops.thresh, -+ rule->rule_ops.op); -+ break; -+ } -+ default: -+ pr_err("Unsupported op %d", rule->rule_ops.op); -+ break; -+ } -+ return ret; -+} -+ -+static void match_rule(struct rule_update_path_info *inp_node, -+ struct rule_node_info *node) -+{ -+ struct rules_def *rule; -+ int i; -+ -+ list_for_each_entry(rule, &node->node_rules, link) { -+ for (i = 0; i < rule->num_src; i++) { -+ if (rule->src_info[i].id == inp_node->id) { -+ if (check_rule(rule, inp_node)) { -+ trace_bus_rules_matches(node->cur_rule, -+ inp_node->id, inp_node->ab, -+ inp_node->ib, inp_node->clk); -+ if (rule->state == -+ RULE_STATE_NOT_APPLIED) -+ rule->state_change = true; -+ rule->state = RULE_STATE_APPLIED; -+ } else { -+ if (rule->state == -+ RULE_STATE_APPLIED) -+ rule->state_change = true; -+ rule->state = RULE_STATE_NOT_APPLIED; -+ } -+ } -+ } -+ } -+} -+ -+static void apply_rule(struct rule_node_info *node, -+ struct list_head *output_list) -+{ -+ struct rules_def *rule; -+ -+ node->cur_rule = -1; -+ list_for_each_entry(rule, &node->node_rules, link) { -+ if ((rule->state == RULE_STATE_APPLIED) && -+ (node->cur_rule == -1)) -+ node->cur_rule = rule->rule_id; -+ -+ if (node->id == NB_ID) { -+ if (rule->state_change) { -+ rule->state_change = false; -+ raw_notifier_call_chain(&node->rule_notify_list, -+ rule->state, (void *)&rule->rule_ops); -+ } -+ } else { -+ if ((rule->state == RULE_STATE_APPLIED) && -+ (node->cur_rule == rule->rule_id)) { -+ node->apply.id = rule->rule_ops.dst_node[0]; -+ node->apply.throttle = rule->rule_ops.mode; -+ node->apply.lim_bw = rule->rule_ops.dst_bw; -+ list_add_tail(&node->apply.link, output_list); -+ } -+ rule->state_change = false; -+ } -+ } -+ -+} -+ -+int msm_rules_update_path(struct list_head *input_list, -+ struct list_head *output_list) -+{ -+ int ret = 0; -+ struct rule_update_path_info *inp_node; -+ struct rule_node_info *node_it = NULL; -+ -+ mutex_lock(&msm_bus_rules_lock); -+ list_for_each_entry(inp_node, input_list, link) { -+ list_for_each_entry(node_it, &node_list, link) { -+ update_src_id_vote(inp_node, node_it); -+ match_rule(inp_node, node_it); -+ } -+ } -+ -+ list_for_each_entry(node_it, &node_list, link) -+ apply_rule(node_it, output_list); -+ -+ mutex_unlock(&msm_bus_rules_lock); -+ return ret; -+} -+ -+static bool ops_equal(int op1, int op2) -+{ -+ bool ret = false; -+ -+ switch (op1) { -+ case OP_GT: -+ case OP_GE: -+ case OP_LT: -+ case OP_LE: -+ if (abs(op1 - op2) <= 1) -+ ret = true; -+ break; -+ default: -+ ret = (op1 == op2); -+ } -+ -+ return ret; -+} -+ -+static int node_rules_compare(void *priv, struct list_head *a, -+ struct list_head *b) -+{ -+ struct rules_def *ra = container_of(a, struct rules_def, link); -+ struct rules_def *rb = container_of(b, struct rules_def, link); -+ int ret = -1; -+ int64_t th_diff = 0; -+ -+ -+ if (ra->rule_ops.mode == rb->rule_ops.mode) { -+ if (ops_equal(ra->rule_ops.op, rb->rule_ops.op)) { -+ if ((ra->rule_ops.op == OP_LT) || -+ (ra->rule_ops.op == OP_LE)) { -+ th_diff = ra->rule_ops.thresh - -+ rb->rule_ops.thresh; -+ if (th_diff > 0) -+ ret = 1; -+ else -+ ret = -1; -+ } else if ((ra->rule_ops.op == OP_GT) || -+ (ra->rule_ops.op == OP_GE)) { -+ th_diff = rb->rule_ops.thresh - -+ ra->rule_ops.thresh; -+ if (th_diff > 0) -+ ret = 1; -+ else -+ ret = -1; -+ } -+ } else -+ ret = ra->rule_ops.op - rb->rule_ops.op; -+ } else if ((ra->rule_ops.mode == THROTTLE_OFF) && -+ (rb->rule_ops.mode == THROTTLE_ON)) { -+ ret = 1; -+ } else if ((ra->rule_ops.mode == THROTTLE_ON) && -+ (rb->rule_ops.mode == THROTTLE_OFF)) { -+ ret = -1; -+ } -+ -+ return ret; -+} -+ -+static void print_rules(struct rule_node_info *node_it) -+{ -+ struct rules_def *node_rule = NULL; -+ int i; -+ -+ if (!node_it) { -+ pr_err("%s: no node for found", __func__); -+ return; -+ } -+ -+ pr_info("\n Now printing rules for Node %d cur rule %d\n", -+ node_it->id, node_it->cur_rule); -+ list_for_each_entry(node_rule, &node_it->node_rules, link) { -+ pr_info("\n num Rules %d rule Id %d\n", -+ node_it->num_rules, node_rule->rule_id); -+ pr_info("Rule: src_field %d\n", node_rule->rule_ops.src_field); -+ for (i = 0; i < node_rule->rule_ops.num_src; i++) -+ pr_info("Rule: src %d\n", -+ node_rule->rule_ops.src_id[i]); -+ for (i = 0; i < node_rule->rule_ops.num_dst; i++) -+ pr_info("Rule: dst %d dst_bw %llu\n", -+ node_rule->rule_ops.dst_node[i], -+ node_rule->rule_ops.dst_bw); -+ pr_info("Rule: thresh %llu op %d mode %d State %d\n", -+ node_rule->rule_ops.thresh, -+ node_rule->rule_ops.op, -+ node_rule->rule_ops.mode, -+ node_rule->state); -+ } -+} -+ -+void print_all_rules(void) -+{ -+ struct rule_node_info *node_it = NULL; -+ -+ list_for_each_entry(node_it, &node_list, link) -+ print_rules(node_it); -+} -+ -+void print_rules_buf(char *buf, int max_buf) -+{ -+ struct rule_node_info *node_it = NULL; -+ struct rules_def *node_rule = NULL; -+ int i; -+ int cnt = 0; -+ -+ list_for_each_entry(node_it, &node_list, link) { -+ cnt += scnprintf(buf + cnt, max_buf - cnt, -+ "\n Now printing rules for Node %d cur_rule %d\n", -+ node_it->id, node_it->cur_rule); -+ list_for_each_entry(node_rule, &node_it->node_rules, link) { -+ cnt += scnprintf(buf + cnt, max_buf - cnt, -+ "\nNum Rules:%d ruleId %d STATE:%d change:%d\n", -+ node_it->num_rules, node_rule->rule_id, -+ node_rule->state, node_rule->state_change); -+ cnt += scnprintf(buf + cnt, max_buf - cnt, -+ "Src_field %d\n", -+ node_rule->rule_ops.src_field); -+ for (i = 0; i < node_rule->rule_ops.num_src; i++) -+ cnt += scnprintf(buf + cnt, max_buf - cnt, -+ "Src %d Cur Ib %llu Ab %llu\n", -+ node_rule->rule_ops.src_id[i], -+ node_rule->src_info[i].ib, -+ node_rule->src_info[i].ab); -+ for (i = 0; i < node_rule->rule_ops.num_dst; i++) -+ cnt += scnprintf(buf + cnt, max_buf - cnt, -+ "Dst %d dst_bw %llu\n", -+ node_rule->rule_ops.dst_node[0], -+ node_rule->rule_ops.dst_bw); -+ cnt += scnprintf(buf + cnt, max_buf - cnt, -+ "Thresh %llu op %d mode %d\n", -+ node_rule->rule_ops.thresh, -+ node_rule->rule_ops.op, -+ node_rule->rule_ops.mode); -+ } -+ } -+} -+ -+static int copy_rule(struct bus_rule_type *src, struct rules_def *node_rule, -+ struct notifier_block *nb) -+{ -+ int i; -+ int ret = 0; -+ -+ memcpy(&node_rule->rule_ops, src, -+ sizeof(struct bus_rule_type)); -+ node_rule->rule_ops.src_id = kzalloc( -+ (sizeof(int) * node_rule->rule_ops.num_src), -+ GFP_KERNEL); -+ if (!node_rule->rule_ops.src_id) { -+ pr_err("%s:Failed to allocate for src_id", -+ __func__); -+ return -ENOMEM; -+ } -+ memcpy(node_rule->rule_ops.src_id, src->src_id, -+ sizeof(int) * src->num_src); -+ -+ -+ if (!nb) { -+ node_rule->rule_ops.dst_node = kzalloc( -+ (sizeof(int) * node_rule->rule_ops.num_dst), -+ GFP_KERNEL); -+ if (!node_rule->rule_ops.dst_node) { -+ pr_err("%s:Failed to allocate for src_id", -+ __func__); -+ return -ENOMEM; -+ } -+ memcpy(node_rule->rule_ops.dst_node, src->dst_node, -+ sizeof(int) * src->num_dst); -+ } -+ -+ node_rule->num_src = src->num_src; -+ node_rule->src_info = kzalloc( -+ (sizeof(struct node_vote_info) * node_rule->rule_ops.num_src), -+ GFP_KERNEL); -+ if (!node_rule->src_info) { -+ pr_err("%s:Failed to allocate for src_id", -+ __func__); -+ return -ENOMEM; -+ } -+ for (i = 0; i < src->num_src; i++) -+ node_rule->src_info[i].id = src->src_id[i]; -+ -+ return ret; -+} -+ -+void msm_rule_register(int num_rules, struct bus_rule_type *rule, -+ struct notifier_block *nb) -+{ -+ struct rule_node_info *node = NULL; -+ int i, j; -+ struct rules_def *node_rule = NULL; -+ int num_dst = 0; -+ -+ if (!rule) -+ return; -+ -+ mutex_lock(&msm_bus_rules_lock); -+ for (i = 0; i < num_rules; i++) { -+ if (nb) -+ num_dst = 1; -+ else -+ num_dst = rule[i].num_dst; -+ -+ for (j = 0; j < num_dst; j++) { -+ int id = 0; -+ -+ if (nb) -+ id = NB_ID; -+ else -+ id = rule[i].dst_node[j]; -+ -+ node = gen_node(id, nb); -+ if (!node) { -+ pr_info("Error getting rule"); -+ goto exit_rule_register; -+ } -+ node_rule = kzalloc(sizeof(struct rules_def), -+ GFP_KERNEL); -+ if (!node_rule) { -+ pr_err("%s: Failed to allocate for rule", -+ __func__); -+ goto exit_rule_register; -+ } -+ -+ if (copy_rule(&rule[i], node_rule, nb)) { -+ pr_err("Error copying rule"); -+ goto exit_rule_register; -+ } -+ -+ node_rule->rule_id = node->num_rules++; -+ if (nb) -+ node->data = nb; -+ -+ list_add_tail(&node_rule->link, &node->node_rules); -+ } -+ } -+ list_sort(NULL, &node->node_rules, node_rules_compare); -+ -+ if (nb) -+ raw_notifier_chain_register(&node->rule_notify_list, nb); -+exit_rule_register: -+ mutex_unlock(&msm_bus_rules_lock); -+ return; -+} -+ -+static int comp_rules(struct bus_rule_type *rulea, struct bus_rule_type *ruleb) -+{ -+ int ret = 1; -+ -+ if (rulea->num_src == ruleb->num_src) -+ ret = memcmp(rulea->src_id, ruleb->src_id, -+ (sizeof(int) * rulea->num_src)); -+ if (!ret && (rulea->num_dst == ruleb->num_dst)) -+ ret = memcmp(rulea->dst_node, ruleb->dst_node, -+ (sizeof(int) * rulea->num_dst)); -+ if (!ret && (rulea->dst_bw == ruleb->dst_bw) && -+ (rulea->op == ruleb->op) && (rulea->thresh == ruleb->thresh)) -+ ret = 0; -+ -+ return ret; -+} -+ -+void msm_rule_unregister(int num_rules, struct bus_rule_type *rule, -+ struct notifier_block *nb) -+{ -+ int i; -+ struct rule_node_info *node = NULL; -+ struct rule_node_info *node_tmp = NULL; -+ struct rules_def *node_rule; -+ struct rules_def *node_rule_tmp; -+ bool match_found = false; -+ -+ if (!rule) -+ return; -+ -+ mutex_lock(&msm_bus_rules_lock); -+ if (nb) { -+ node = get_node(NB_ID, nb); -+ if (!node) { -+ pr_err("%s: Can't find node", __func__); -+ goto exit_unregister_rule; -+ } -+ -+ list_for_each_entry_safe(node_rule, node_rule_tmp, -+ &node->node_rules, link) { -+ list_del(&node_rule->link); -+ kfree(node_rule); -+ node->num_rules--; -+ } -+ raw_notifier_chain_unregister(&node->rule_notify_list, nb); -+ } else { -+ for (i = 0; i < num_rules; i++) { -+ match_found = false; -+ -+ list_for_each_entry(node, &node_list, link) { -+ list_for_each_entry_safe(node_rule, -+ node_rule_tmp, &node->node_rules, link) { -+ if (comp_rules(&node_rule->rule_ops, -+ &rule[i]) == 0) { -+ list_del(&node_rule->link); -+ kfree(node_rule); -+ match_found = true; -+ node->num_rules--; -+ list_sort(NULL, -+ &node->node_rules, -+ node_rules_compare); -+ break; -+ } -+ } -+ } -+ } -+ } -+ -+ list_for_each_entry_safe(node, node_tmp, -+ &node_list, link) { -+ if (!node->num_rules) { -+ pr_debug("Deleting Rule node %d", node->id); -+ list_del(&node->link); -+ kfree(node); -+ } -+ } -+exit_unregister_rule: -+ mutex_unlock(&msm_bus_rules_lock); -+} -+ -+bool msm_rule_are_rules_registered(void) -+{ -+ bool ret = false; -+ -+ if (list_empty(&node_list)) -+ ret = false; -+ else -+ ret = true; -+ -+ return ret; -+} -+ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_bus_rules.h -@@ -0,0 +1,77 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _ARCH_ARM_MACH_MSM_BUS_RULES_H -+#define _ARCH_ARM_MACH_MSM_BUS_RULES_H -+ -+#include -+#include -+#include -+#include -+ -+#define MAX_NODES (5) -+ -+struct rule_update_path_info { -+ u32 id; -+ u64 ab; -+ u64 ib; -+ u64 clk; -+ struct list_head link; -+}; -+ -+struct rule_apply_rcm_info { -+ u32 id; -+ u64 lim_bw; -+ int throttle; -+ bool after_clk_commit; -+ struct list_head link; -+}; -+ -+struct bus_rule_type { -+ int num_src; -+ int *src_id; -+ int src_field; -+ int op; -+ u64 thresh; -+ int num_dst; -+ int *dst_node; -+ u64 dst_bw; -+ int mode; -+ void *client_data; -+}; -+ -+#if (defined(CONFIG_BUS_TOPOLOGY_ADHOC)) -+void msm_rule_register(int num_rules, struct bus_rule_type *rule, -+ struct notifier_block *nb); -+void msm_rule_unregister(int num_rules, struct bus_rule_type *rule, -+ struct notifier_block *nb); -+void print_rules_buf(char *buf, int count); -+bool msm_rule_are_rules_registered(void); -+#else -+static inline void msm_rule_register(int num_rules, struct bus_rule_type *rule, -+ struct notifier_block *nb) -+{ -+} -+static inline void msm_rule_unregister(int num_rules, -+ struct bus_rule_type *rule, -+ struct notifier_block *nb) -+{ -+} -+static inline void print_rules_buf(char *buf, int count) -+{ -+} -+static inline bool msm_rule_are_rules_registered(void) -+{ -+ return false; -+} -+#endif /* defined(CONFIG_BUS_TOPOLOGY_ADHOC) */ -+#endif /* _ARCH_ARM_MACH_MSM_BUS_RULES_H */ ---- /dev/null -+++ b/drivers/bus/msm_bus/msm_buspm_coresight_adhoc.c -@@ -0,0 +1,189 @@ -+/* Copyright (c) 2014 The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct msmbus_coresight_adhoc_clock_drvdata { -+ int id; -+ struct clk *clk; -+ struct list_head list; -+}; -+ -+struct msmbus_coresight_adhoc_drvdata { -+ struct device *dev; -+ struct coresight_device *csdev; -+ struct coresight_desc *desc; -+ struct list_head clocks; -+}; -+ -+static int msmbus_coresight_enable_adhoc(struct coresight_device *csdev) -+{ -+ struct msmbus_coresight_adhoc_clock_drvdata *clk; -+ struct msmbus_coresight_adhoc_drvdata *drvdata = -+ dev_get_drvdata(csdev->dev.parent); -+ long rate; -+ -+ list_for_each_entry(clk, &drvdata->clocks, list) { -+ if (clk->id == csdev->id) { -+ rate = clk_round_rate(clk->clk, 1L); -+ clk_set_rate(clk->clk, rate); -+ return clk_prepare_enable(clk->clk); -+ } -+ } -+ -+ return -ENOENT; -+} -+ -+static void msmbus_coresight_disable_adhoc(struct coresight_device *csdev) -+{ -+ struct msmbus_coresight_adhoc_clock_drvdata *clk; -+ struct msmbus_coresight_adhoc_drvdata *drvdata = -+ dev_get_drvdata(csdev->dev.parent); -+ -+ list_for_each_entry(clk, &drvdata->clocks, list) { -+ if (clk->id == csdev->id) -+ clk_disable_unprepare(clk->clk); -+ } -+} -+ -+static const struct coresight_ops_source msmbus_coresight_adhoc_source_ops = { -+ .enable = msmbus_coresight_enable_adhoc, -+ .disable = msmbus_coresight_disable_adhoc, -+}; -+ -+static const struct coresight_ops msmbus_coresight_cs_ops = { -+ .source_ops = &msmbus_coresight_adhoc_source_ops, -+}; -+ -+void msmbus_coresight_remove_adhoc(struct platform_device *pdev) -+{ -+ struct msmbus_coresight_adhoc_clock_drvdata *clk, *next_clk; -+ struct msmbus_coresight_adhoc_drvdata *drvdata = -+ platform_get_drvdata(pdev); -+ -+ msmbus_coresight_disable_adhoc(drvdata->csdev); -+ coresight_unregister(drvdata->csdev); -+ list_for_each_entry_safe(clk, next_clk, &drvdata->clocks, list) { -+ list_del(&clk->list); -+ devm_kfree(&pdev->dev, clk); -+ } -+ devm_kfree(&pdev->dev, drvdata->desc); -+ devm_kfree(&pdev->dev, drvdata); -+ platform_set_drvdata(pdev, NULL); -+} -+EXPORT_SYMBOL(msmbus_coresight_remove_adhoc); -+ -+static int buspm_of_get_clk_adhoc(struct device_node *of_node, -+ struct msmbus_coresight_adhoc_drvdata *drvdata, int id) -+{ -+ struct msmbus_coresight_adhoc_clock_drvdata *clk; -+ clk = devm_kzalloc(drvdata->dev, sizeof(*clk), GFP_KERNEL); -+ -+ if (!clk) -+ return -ENOMEM; -+ -+ clk->id = id; -+ -+ clk->clk = of_clk_get_by_name(of_node, "bus_clk"); -+ if (IS_ERR(clk->clk)) { -+ pr_err("Error: unable to get clock for coresight node %d\n", -+ id); -+ goto err; -+ } -+ -+ list_add(&clk->list, &drvdata->clocks); -+ return 0; -+ -+err: -+ devm_kfree(drvdata->dev, clk); -+ return -EINVAL; -+} -+ -+int msmbus_coresight_init_adhoc(struct platform_device *pdev, -+ struct device_node *of_node) -+{ -+ int ret; -+ struct device *dev = &pdev->dev; -+ struct coresight_platform_data *pdata; -+ struct msmbus_coresight_adhoc_drvdata *drvdata; -+ struct coresight_desc *desc; -+ -+ pdata = of_get_coresight_platform_data(dev, of_node); -+ if (IS_ERR(pdata)) -+ return PTR_ERR(pdata); -+ -+ drvdata = platform_get_drvdata(pdev); -+ if (IS_ERR_OR_NULL(drvdata)) { -+ drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); -+ if (!drvdata) { -+ pr_err("coresight: Alloc for drvdata failed\n"); -+ return -ENOMEM; -+ } -+ INIT_LIST_HEAD(&drvdata->clocks); -+ drvdata->dev = &pdev->dev; -+ platform_set_drvdata(pdev, drvdata); -+ } -+ ret = buspm_of_get_clk_adhoc(of_node, drvdata, pdata->id); -+ if (ret) { -+ pr_err("Error getting clocks\n"); -+ ret = -ENXIO; -+ goto err1; -+ } -+ -+ desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); -+ if (!desc) { -+ pr_err("coresight: Error allocating memory\n"); -+ ret = -ENOMEM; -+ goto err1; -+ } -+ -+ desc->type = CORESIGHT_DEV_TYPE_SOURCE; -+ desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_BUS; -+ desc->ops = &msmbus_coresight_cs_ops; -+ desc->pdata = pdata; -+ desc->dev = &pdev->dev; -+ desc->owner = THIS_MODULE; -+ drvdata->desc = desc; -+ drvdata->csdev = coresight_register(desc); -+ if (IS_ERR(drvdata->csdev)) { -+ pr_err("coresight: Coresight register failed\n"); -+ ret = PTR_ERR(drvdata->csdev); -+ goto err0; -+ } -+ -+ dev_info(dev, "msmbus_coresight initialized\n"); -+ -+ return 0; -+err0: -+ devm_kfree(dev, desc); -+err1: -+ devm_kfree(dev, drvdata); -+ platform_set_drvdata(pdev, NULL); -+ return ret; -+} -+EXPORT_SYMBOL(msmbus_coresight_init_adhoc); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_DESCRIPTION("MSM BusPM Adhoc CoreSight Driver"); ---- /dev/null -+++ b/drivers/bus/msm_bus/rpm-smd.h -@@ -0,0 +1,268 @@ -+/* Copyright (c) 2012, 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+ -+#ifndef __ARCH_ARM_MACH_MSM_RPM_SMD_H -+#define __ARCH_ARM_MACH_MSM_RPM_SMD_H -+ -+/** -+ * enum msm_rpm_set - RPM enumerations for sleep/active set -+ * %MSM_RPM_CTX_SET_0: Set resource parameters for active mode. -+ * %MSM_RPM_CTX_SET_SLEEP: Set resource parameters for sleep. -+ */ -+enum msm_rpm_set { -+ MSM_RPM_CTX_ACTIVE_SET, -+ MSM_RPM_CTX_SLEEP_SET, -+}; -+ -+struct msm_rpm_request; -+ -+struct msm_rpm_kvp { -+ uint32_t key; -+ uint32_t length; -+ uint8_t *data; -+}; -+#ifdef CONFIG_MSM_RPM_SMD -+/** -+ * msm_rpm_request() - Creates a parent element to identify the -+ * resource on the RPM, that stores the KVPs for different fields modified -+ * for a hardware resource -+ * -+ * @set: if the device is setting the active/sleep set parameter -+ * for the resource -+ * @rsc_type: unsigned 32 bit integer that identifies the type of the resource -+ * @rsc_id: unsigned 32 bit that uniquely identifies a resource within a type -+ * @num_elements: number of KVPs pairs associated with the resource -+ * -+ * returns pointer to a msm_rpm_request on success, NULL on error -+ */ -+struct msm_rpm_request *msm_rpm_create_request( -+ enum msm_rpm_set set, uint32_t rsc_type, -+ uint32_t rsc_id, int num_elements); -+ -+/** -+ * msm_rpm_request_noirq() - Creates a parent element to identify the -+ * resource on the RPM, that stores the KVPs for different fields modified -+ * for a hardware resource. This function is similar to msm_rpm_create_request -+ * except that it has to be called with interrupts masked. -+ * -+ * @set: if the device is setting the active/sleep set parameter -+ * for the resource -+ * @rsc_type: unsigned 32 bit integer that identifies the type of the resource -+ * @rsc_id: unsigned 32 bit that uniquely identifies a resource within a type -+ * @num_elements: number of KVPs pairs associated with the resource -+ * -+ * returns pointer to a msm_rpm_request on success, NULL on error -+ */ -+struct msm_rpm_request *msm_rpm_create_request_noirq( -+ enum msm_rpm_set set, uint32_t rsc_type, -+ uint32_t rsc_id, int num_elements); -+ -+/** -+ * msm_rpm_add_kvp_data() - Adds a Key value pair to a existing RPM resource. -+ * -+ * @handle: RPM resource handle to which the data should be appended -+ * @key: unsigned integer identify the parameter modified -+ * @data: byte array that contains the value corresponding to key. -+ * @size: size of data in bytes. -+ * -+ * returns 0 on success or errno -+ */ -+int msm_rpm_add_kvp_data(struct msm_rpm_request *handle, -+ uint32_t key, const uint8_t *data, int size); -+ -+/** -+ * msm_rpm_add_kvp_data_noirq() - Adds a Key value pair to a existing RPM -+ * resource. This function is similar to msm_rpm_add_kvp_data except that it -+ * has to be called with interrupts masked. -+ * -+ * @handle: RPM resource handle to which the data should be appended -+ * @key: unsigned integer identify the parameter modified -+ * @data: byte array that contains the value corresponding to key. -+ * @size: size of data in bytes. -+ * -+ * returns 0 on success or errno -+ */ -+int msm_rpm_add_kvp_data_noirq(struct msm_rpm_request *handle, -+ uint32_t key, const uint8_t *data, int size); -+ -+/** msm_rpm_free_request() - clean up the RPM request handle created with -+ * msm_rpm_create_request -+ * -+ * @handle: RPM resource handle to be cleared. -+ */ -+ -+void msm_rpm_free_request(struct msm_rpm_request *handle); -+ -+/** -+ * msm_rpm_send_request() - Send the RPM messages using SMD. The function -+ * assigns a message id before sending the data out to the RPM. RPM hardware -+ * uses the message id to acknowledge the messages. -+ * -+ * @handle: pointer to the msm_rpm_request for the resource being modified. -+ * -+ * returns non-zero message id on success and zero on a failed transaction. -+ * The drivers use message id to wait for ACK from RPM. -+ */ -+int msm_rpm_send_request(struct msm_rpm_request *handle); -+ -+/** -+ * msm_rpm_send_request_noirq() - Send the RPM messages using SMD. The -+ * function assigns a message id before sending the data out to the RPM. -+ * RPM hardware uses the message id to acknowledge the messages. This function -+ * is similar to msm_rpm_send_request except that it has to be called with -+ * interrupts masked. -+ * -+ * @handle: pointer to the msm_rpm_request for the resource being modified. -+ * -+ * returns non-zero message id on success and zero on a failed transaction. -+ * The drivers use message id to wait for ACK from RPM. -+ */ -+int msm_rpm_send_request_noirq(struct msm_rpm_request *handle); -+ -+/** -+ * msm_rpm_wait_for_ack() - A blocking call that waits for acknowledgment of -+ * a message from RPM. -+ * -+ * @msg_id: the return from msm_rpm_send_requests -+ * -+ * returns 0 on success or errno -+ */ -+int msm_rpm_wait_for_ack(uint32_t msg_id); -+ -+/** -+ * msm_rpm_wait_for_ack_noirq() - A blocking call that waits for acknowledgment -+ * of a message from RPM. This function is similar to msm_rpm_wait_for_ack -+ * except that it has to be called with interrupts masked. -+ * -+ * @msg_id: the return from msm_rpm_send_request -+ * -+ * returns 0 on success or errno -+ */ -+int msm_rpm_wait_for_ack_noirq(uint32_t msg_id); -+ -+/** -+ * msm_rpm_send_message() -Wrapper function for clients to send data given an -+ * array of key value pairs. -+ * -+ * @set: if the device is setting the active/sleep set parameter -+ * for the resource -+ * @rsc_type: unsigned 32 bit integer that identifies the type of the resource -+ * @rsc_id: unsigned 32 bit that uniquely identifies a resource within a type -+ * @kvp: array of KVP data. -+ * @nelem: number of KVPs pairs associated with the message. -+ * -+ * returns 0 on success and errno on failure. -+ */ -+int msm_rpm_send_message(enum msm_rpm_set set, uint32_t rsc_type, -+ uint32_t rsc_id, struct msm_rpm_kvp *kvp, int nelems); -+ -+/** -+ * msm_rpm_send_message_noirq() -Wrapper function for clients to send data -+ * given an array of key value pairs. This function is similar to the -+ * msm_rpm_send_message() except that it has to be called with interrupts -+ * disabled. Clients should choose the irq version when possible for system -+ * performance. -+ * -+ * @set: if the device is setting the active/sleep set parameter -+ * for the resource -+ * @rsc_type: unsigned 32 bit integer that identifies the type of the resource -+ * @rsc_id: unsigned 32 bit that uniquely identifies a resource within a type -+ * @kvp: array of KVP data. -+ * @nelem: number of KVPs pairs associated with the message. -+ * -+ * returns 0 on success and errno on failure. -+ */ -+int msm_rpm_send_message_noirq(enum msm_rpm_set set, uint32_t rsc_type, -+ uint32_t rsc_id, struct msm_rpm_kvp *kvp, int nelems); -+ -+/** -+ * msm_rpm_driver_init() - Initialization function that registers for a -+ * rpm platform driver. -+ * -+ * returns 0 on success. -+ */ -+int __init msm_rpm_driver_init(void); -+ -+#else -+ -+static inline struct msm_rpm_request *msm_rpm_create_request( -+ enum msm_rpm_set set, uint32_t rsc_type, -+ uint32_t rsc_id, int num_elements) -+{ -+ return NULL; -+} -+ -+static inline struct msm_rpm_request *msm_rpm_create_request_noirq( -+ enum msm_rpm_set set, uint32_t rsc_type, -+ uint32_t rsc_id, int num_elements) -+{ -+ return NULL; -+ -+} -+static inline uint32_t msm_rpm_add_kvp_data(struct msm_rpm_request *handle, -+ uint32_t key, const uint8_t *data, int count) -+{ -+ return 0; -+} -+static inline uint32_t msm_rpm_add_kvp_data_noirq( -+ struct msm_rpm_request *handle, uint32_t key, -+ const uint8_t *data, int count) -+{ -+ return 0; -+} -+ -+static inline void msm_rpm_free_request(struct msm_rpm_request *handle) -+{ -+ return; -+} -+ -+static inline int msm_rpm_send_request(struct msm_rpm_request *handle) -+{ -+ return 0; -+} -+ -+static inline int msm_rpm_send_request_noirq(struct msm_rpm_request *handle) -+{ -+ return 0; -+ -+} -+ -+static inline int msm_rpm_send_message(enum msm_rpm_set set, uint32_t rsc_type, -+ uint32_t rsc_id, struct msm_rpm_kvp *kvp, int nelems) -+{ -+ return 0; -+} -+ -+static inline int msm_rpm_send_message_noirq(enum msm_rpm_set set, -+ uint32_t rsc_type, uint32_t rsc_id, struct msm_rpm_kvp *kvp, -+ int nelems) -+{ -+ return 0; -+} -+ -+static inline int msm_rpm_wait_for_ack(uint32_t msg_id) -+{ -+ return 0; -+ -+} -+static inline int msm_rpm_wait_for_ack_noirq(uint32_t msg_id) -+{ -+ return 0; -+} -+ -+static inline int __init msm_rpm_driver_init(void) -+{ -+ return 0; -+} -+#endif -+#endif /*__ARCH_ARM_MACH_MSM_RPM_SMD_H*/ ---- /dev/null -+++ b/include/trace/events/trace_msm_bus.h -@@ -0,0 +1,163 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#undef TRACE_SYSTEM -+#define TRACE_SYSTEM msm_bus -+ -+#if !defined(_TRACE_MSM_BUS_H) || defined(TRACE_HEADER_MULTI_READ) -+#define _TRACE_MSM_BUS_H -+ -+#include -+ -+TRACE_EVENT(bus_update_request, -+ -+ TP_PROTO(int sec, int nsec, const char *name, unsigned int index, -+ int src, int dest, unsigned long long ab, -+ unsigned long long ib), -+ -+ TP_ARGS(sec, nsec, name, index, src, dest, ab, ib), -+ -+ TP_STRUCT__entry( -+ __field(int, sec) -+ __field(int, nsec) -+ __string(name, name) -+ __field(u32, index) -+ __field(int, src) -+ __field(int, dest) -+ __field(u64, ab) -+ __field(u64, ib) -+ ), -+ -+ TP_fast_assign( -+ __entry->sec = sec; -+ __entry->nsec = nsec; -+ __assign_str(name, name); -+ __entry->index = index; -+ __entry->src = src; -+ __entry->dest = dest; -+ __entry->ab = ab; -+ __entry->ib = ib; -+ ), -+ -+ TP_printk("time= %d.%d name=%s index=%u src=%d dest=%d ab=%llu ib=%llu", -+ __entry->sec, -+ __entry->nsec, -+ __get_str(name), -+ (unsigned int)__entry->index, -+ __entry->src, -+ __entry->dest, -+ (unsigned long long)__entry->ab, -+ (unsigned long long)__entry->ib) -+); -+ -+TRACE_EVENT(bus_bimc_config_limiter, -+ -+ TP_PROTO(int mas_id, unsigned long long cur_lim_bw), -+ -+ TP_ARGS(mas_id, cur_lim_bw), -+ -+ TP_STRUCT__entry( -+ __field(int, mas_id) -+ __field(u64, cur_lim_bw) -+ ), -+ -+ TP_fast_assign( -+ __entry->mas_id = mas_id; -+ __entry->cur_lim_bw = cur_lim_bw; -+ ), -+ -+ TP_printk("Master=%d cur_lim_bw=%llu", -+ __entry->mas_id, -+ (unsigned long long)__entry->cur_lim_bw) -+); -+ -+TRACE_EVENT(bus_avail_bw, -+ -+ TP_PROTO(unsigned long long cur_bimc_bw, unsigned long long cur_mdp_bw), -+ -+ TP_ARGS(cur_bimc_bw, cur_mdp_bw), -+ -+ TP_STRUCT__entry( -+ __field(u64, cur_bimc_bw) -+ __field(u64, cur_mdp_bw) -+ ), -+ -+ TP_fast_assign( -+ __entry->cur_bimc_bw = cur_bimc_bw; -+ __entry->cur_mdp_bw = cur_mdp_bw; -+ ), -+ -+ TP_printk("cur_bimc_bw = %llu cur_mdp_bw = %llu", -+ (unsigned long long)__entry->cur_bimc_bw, -+ (unsigned long long)__entry->cur_mdp_bw) -+); -+ -+TRACE_EVENT(bus_rules_matches, -+ -+ TP_PROTO(int node_id, int rule_id, unsigned long long node_ab, -+ unsigned long long node_ib, unsigned long long node_clk), -+ -+ TP_ARGS(node_id, rule_id, node_ab, node_ib, node_clk), -+ -+ TP_STRUCT__entry( -+ __field(int, node_id) -+ __field(int, rule_id) -+ __field(u64, node_ab) -+ __field(u64, node_ib) -+ __field(u64, node_clk) -+ ), -+ -+ TP_fast_assign( -+ __entry->node_id = node_id; -+ __entry->rule_id = rule_id; -+ __entry->node_ab = node_ab; -+ __entry->node_ib = node_ib; -+ __entry->node_clk = node_clk; -+ ), -+ -+ TP_printk("Rule match node%d rule%d node-ab%llu:ib%llu:clk%llu", -+ __entry->node_id, __entry->rule_id, -+ (unsigned long long)__entry->node_ab, -+ (unsigned long long)__entry->node_ib, -+ (unsigned long long)__entry->node_clk) -+); -+ -+TRACE_EVENT(bus_bke_params, -+ -+ TP_PROTO(u32 gc, u32 gp, u32 thl, u32 thm, u32 thh), -+ -+ TP_ARGS(gc, gp, thl, thm, thh), -+ -+ TP_STRUCT__entry( -+ __field(u32, gc) -+ __field(u32, gp) -+ __field(u32, thl) -+ __field(u32, thm) -+ __field(u32, thh) -+ ), -+ -+ TP_fast_assign( -+ __entry->gc = gc; -+ __entry->gp = gp; -+ __entry->thl = thl; -+ __entry->thm = thm; -+ __entry->thh = thh; -+ ), -+ -+ TP_printk("BKE Params GC=0x%x GP=0x%x THL=0x%x THM=0x%x THH=0x%x", -+ __entry->gc, __entry->gp, __entry->thl, __entry->thm, -+ __entry->thh) -+); -+ -+#endif -+#define TRACE_INCLUDE_FILE trace_msm_bus -+#include diff --git a/target/linux/ipq40xx/patches-4.9/400-mtd-ubi-add-quirk-to-autoload-ubi-on-rt-ac58u.patch b/target/linux/ipq40xx/patches-4.9/400-mtd-ubi-add-quirk-to-autoload-ubi-on-rt-ac58u.patch deleted file mode 100644 index ee19f363b..000000000 --- a/target/linux/ipq40xx/patches-4.9/400-mtd-ubi-add-quirk-to-autoload-ubi-on-rt-ac58u.patch +++ /dev/null @@ -1,29 +0,0 @@ -From b8f3a7ccbeca5bdbd1b6210b94b38d3fef2dd0bd Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Thu, 19 Jan 2017 01:57:22 +0100 -Subject: [PATCH 16/38] mtd: ubi: add auto_attach HACK for the ASUS RT-AC58U - -This patch adds a hack that allows UBI's autoattach feature -to work with the custom ASUS UBI_DEV partition name. - -This is necessary because the vendor's u-boot doesn't leave -the bootargs / cmdline alone, so the it can't be overwritten -easily otherwise. - -Signed-off-by: Christian Lamparter ---- - drivers/mtd/ubi/build.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/mtd/ubi/build.c -+++ b/drivers/mtd/ubi/build.c -@@ -1225,6 +1225,9 @@ static void __init ubi_auto_attach(void) - mtd = open_mtd_device("ubi"); - if (IS_ERR(mtd)) - mtd = open_mtd_device("data"); -+ /* Hack for the Asus RT-AC58U */ -+ if (IS_ERR(mtd)) -+ mtd = open_mtd_device("UBI_DEV"); - - if (!IS_ERR(mtd)) { - size_t len; diff --git a/target/linux/ipq40xx/patches-4.9/605-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch b/target/linux/ipq40xx/patches-4.9/605-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch deleted file mode 100644 index d2721875a..000000000 --- a/target/linux/ipq40xx/patches-4.9/605-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 7c129254adb1093d10a62ed7bf7b956fcc6ffe34 Mon Sep 17 00:00:00 2001 -From: Rakesh Nair -Date: Wed, 20 Jul 2016 15:02:01 +0530 -Subject: [PATCH] net: IPQ4019 needs rfs/vlan_tag callbacks in - netdev_ops - -Add callback support to get default vlan tag and register -receive flow steering filter. - -Used by IPQ4019 ess-edma driver. - -BUG=chrome-os-partner:33096 -TEST=none - -Change-Id: I266070e4a0fbe4a0d9966fe79a71e50ec4f26c75 -Signed-off-by: Rakesh Nair -Reviewed-on: https://chromium-review.googlesource.com/362203 -Commit-Ready: Grant Grundler -Tested-by: Grant Grundler -Reviewed-by: Grant Grundler ---- - include/linux/netdevice.h | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -725,6 +725,16 @@ struct xps_map { - #define XPS_MIN_MAP_ALLOC ((L1_CACHE_ALIGN(offsetof(struct xps_map, queues[1])) \ - - sizeof(struct xps_map)) / sizeof(u16)) - -+#ifdef CONFIG_RFS_ACCEL -+typedef int (*set_rfs_filter_callback_t)(struct net_device *dev, -+ __be32 src, -+ __be32 dst, -+ __be16 sport, -+ __be16 dport, -+ u8 proto, -+ u16 rxq_index, -+ u32 action); -+#endif - /* - * This structure holds all XPS maps for device. Maps are indexed by CPU. - */ -@@ -1251,6 +1261,9 @@ struct net_device_ops { - const struct sk_buff *skb, - u16 rxq_index, - u32 flow_id); -+ int (*ndo_register_rfs_filter)(struct net_device *dev, -+ set_rfs_filter_callback_t set_filter); -+ int (*ndo_get_default_vlan_tag)(struct net_device *net); - #endif - int (*ndo_add_slave)(struct net_device *dev, - struct net_device *slave_dev); diff --git a/target/linux/ipq40xx/patches-4.9/700-net-add-qualcomm-mdio-and-phy.patch b/target/linux/ipq40xx/patches-4.9/700-net-add-qualcomm-mdio-and-phy.patch deleted file mode 100644 index 003524312..000000000 --- a/target/linux/ipq40xx/patches-4.9/700-net-add-qualcomm-mdio-and-phy.patch +++ /dev/null @@ -1,2690 +0,0 @@ -From 5a71a2005a2e1e6bbe36f00386c495ad6626beb2 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Thu, 19 Jan 2017 01:59:43 +0100 -Subject: [PATCH 30/38] NET: add qualcomm mdio and PHY - ---- - drivers/net/phy/Kconfig | 14 ++++++++++++++ - drivers/net/phy/Makefile | 2 ++ - 2 files changed, 16 insertions(+) - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -408,6 +408,20 @@ config XILINX_GMII2RGMII - the Reduced Gigabit Media Independent Interface(RGMII) between - Ethernet physical media devices and the Gigabit Ethernet controller. - -+config MDIO_IPQ40XX -+ tristate "Qualcomm Atheros ipq40xx MDIO interface" -+ depends on HAS_IOMEM && OF -+ ---help--- -+ This driver supports the MDIO interface found in Qualcomm -+ Atheros ipq40xx Soc chip. -+ -+config AR40XX_PHY -+ tristate "Driver for Qualcomm Atheros IPQ40XX switches" -+ depends on HAS_IOMEM && OF -+ select SWCONFIG -+ ---help--- -+ This is the driver for Qualcomm Atheros IPQ40XX ESS switches. -+ - endif # PHYLIB - - config MICREL_KS8995MA ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -32,6 +32,7 @@ obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += md - obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o - obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o - obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o -+obj-$(CONFIG_MDIO_IPQ40XX) += mdio-ipq40xx.o - obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o - obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o - obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o -@@ -40,6 +41,7 @@ obj-$(CONFIG_MDIO_XGENE) += mdio-xgene.o - - obj-$(CONFIG_AMD_PHY) += amd.o - obj-$(CONFIG_AQUANTIA_PHY) += aquantia.o -+obj-$(CONFIG_AR40XX_PHY) += ar40xx.o - obj-$(CONFIG_AT803X_PHY) += at803x.o - obj-$(CONFIG_BCM63XX_PHY) += bcm63xx.o - obj-$(CONFIG_BCM7XXX_PHY) += bcm7xxx.o ---- /dev/null -+++ b/drivers/net/phy/ar40xx.c -@@ -0,0 +1,2090 @@ -+/* -+ * Copyright (c) 2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "ar40xx.h" -+ -+static struct ar40xx_priv *ar40xx_priv; -+ -+#define MIB_DESC(_s , _o, _n) \ -+ { \ -+ .size = (_s), \ -+ .offset = (_o), \ -+ .name = (_n), \ -+ } -+ -+static const struct ar40xx_mib_desc ar40xx_mibs[] = { -+ MIB_DESC(1, AR40XX_STATS_RXBROAD, "RxBroad"), -+ MIB_DESC(1, AR40XX_STATS_RXPAUSE, "RxPause"), -+ MIB_DESC(1, AR40XX_STATS_RXMULTI, "RxMulti"), -+ MIB_DESC(1, AR40XX_STATS_RXFCSERR, "RxFcsErr"), -+ MIB_DESC(1, AR40XX_STATS_RXALIGNERR, "RxAlignErr"), -+ MIB_DESC(1, AR40XX_STATS_RXRUNT, "RxRunt"), -+ MIB_DESC(1, AR40XX_STATS_RXFRAGMENT, "RxFragment"), -+ MIB_DESC(1, AR40XX_STATS_RX64BYTE, "Rx64Byte"), -+ MIB_DESC(1, AR40XX_STATS_RX128BYTE, "Rx128Byte"), -+ MIB_DESC(1, AR40XX_STATS_RX256BYTE, "Rx256Byte"), -+ MIB_DESC(1, AR40XX_STATS_RX512BYTE, "Rx512Byte"), -+ MIB_DESC(1, AR40XX_STATS_RX1024BYTE, "Rx1024Byte"), -+ MIB_DESC(1, AR40XX_STATS_RX1518BYTE, "Rx1518Byte"), -+ MIB_DESC(1, AR40XX_STATS_RXMAXBYTE, "RxMaxByte"), -+ MIB_DESC(1, AR40XX_STATS_RXTOOLONG, "RxTooLong"), -+ MIB_DESC(2, AR40XX_STATS_RXGOODBYTE, "RxGoodByte"), -+ MIB_DESC(2, AR40XX_STATS_RXBADBYTE, "RxBadByte"), -+ MIB_DESC(1, AR40XX_STATS_RXOVERFLOW, "RxOverFlow"), -+ MIB_DESC(1, AR40XX_STATS_FILTERED, "Filtered"), -+ MIB_DESC(1, AR40XX_STATS_TXBROAD, "TxBroad"), -+ MIB_DESC(1, AR40XX_STATS_TXPAUSE, "TxPause"), -+ MIB_DESC(1, AR40XX_STATS_TXMULTI, "TxMulti"), -+ MIB_DESC(1, AR40XX_STATS_TXUNDERRUN, "TxUnderRun"), -+ MIB_DESC(1, AR40XX_STATS_TX64BYTE, "Tx64Byte"), -+ MIB_DESC(1, AR40XX_STATS_TX128BYTE, "Tx128Byte"), -+ MIB_DESC(1, AR40XX_STATS_TX256BYTE, "Tx256Byte"), -+ MIB_DESC(1, AR40XX_STATS_TX512BYTE, "Tx512Byte"), -+ MIB_DESC(1, AR40XX_STATS_TX1024BYTE, "Tx1024Byte"), -+ MIB_DESC(1, AR40XX_STATS_TX1518BYTE, "Tx1518Byte"), -+ MIB_DESC(1, AR40XX_STATS_TXMAXBYTE, "TxMaxByte"), -+ MIB_DESC(1, AR40XX_STATS_TXOVERSIZE, "TxOverSize"), -+ MIB_DESC(2, AR40XX_STATS_TXBYTE, "TxByte"), -+ MIB_DESC(1, AR40XX_STATS_TXCOLLISION, "TxCollision"), -+ MIB_DESC(1, AR40XX_STATS_TXABORTCOL, "TxAbortCol"), -+ MIB_DESC(1, AR40XX_STATS_TXMULTICOL, "TxMultiCol"), -+ MIB_DESC(1, AR40XX_STATS_TXSINGLECOL, "TxSingleCol"), -+ MIB_DESC(1, AR40XX_STATS_TXEXCDEFER, "TxExcDefer"), -+ MIB_DESC(1, AR40XX_STATS_TXDEFER, "TxDefer"), -+ MIB_DESC(1, AR40XX_STATS_TXLATECOL, "TxLateCol"), -+}; -+ -+static u32 -+ar40xx_read(struct ar40xx_priv *priv, int reg) -+{ -+ return readl(priv->hw_addr + reg); -+} -+ -+static u32 -+ar40xx_psgmii_read(struct ar40xx_priv *priv, int reg) -+{ -+ return readl(priv->psgmii_hw_addr + reg); -+} -+ -+static void -+ar40xx_write(struct ar40xx_priv *priv, int reg, u32 val) -+{ -+ writel(val, priv->hw_addr + reg); -+} -+ -+static u32 -+ar40xx_rmw(struct ar40xx_priv *priv, int reg, u32 mask, u32 val) -+{ -+ u32 ret; -+ -+ ret = ar40xx_read(priv, reg); -+ ret &= ~mask; -+ ret |= val; -+ ar40xx_write(priv, reg, ret); -+ return ret; -+} -+ -+static void -+ar40xx_psgmii_write(struct ar40xx_priv *priv, int reg, u32 val) -+{ -+ writel(val, priv->psgmii_hw_addr + reg); -+} -+ -+static void -+ar40xx_phy_dbg_write(struct ar40xx_priv *priv, int phy_addr, -+ u16 dbg_addr, u16 dbg_data) -+{ -+ struct mii_bus *bus = priv->mii_bus; -+ -+ mutex_lock(&bus->mdio_lock); -+ bus->write(bus, phy_addr, AR40XX_MII_ATH_DBG_ADDR, dbg_addr); -+ bus->write(bus, phy_addr, AR40XX_MII_ATH_DBG_DATA, dbg_data); -+ mutex_unlock(&bus->mdio_lock); -+} -+ -+static void -+ar40xx_phy_dbg_read(struct ar40xx_priv *priv, int phy_addr, -+ u16 dbg_addr, u16 *dbg_data) -+{ -+ struct mii_bus *bus = priv->mii_bus; -+ -+ mutex_lock(&bus->mdio_lock); -+ bus->write(bus, phy_addr, AR40XX_MII_ATH_DBG_ADDR, dbg_addr); -+ *dbg_data = bus->read(bus, phy_addr, AR40XX_MII_ATH_DBG_DATA); -+ mutex_unlock(&bus->mdio_lock); -+} -+ -+static void -+ar40xx_phy_mmd_write(struct ar40xx_priv *priv, u32 phy_id, -+ u16 mmd_num, u16 reg_id, u16 reg_val) -+{ -+ struct mii_bus *bus = priv->mii_bus; -+ -+ mutex_lock(&bus->mdio_lock); -+ bus->write(bus, phy_id, -+ AR40XX_MII_ATH_MMD_ADDR, mmd_num); -+ bus->write(bus, phy_id, -+ AR40XX_MII_ATH_MMD_DATA, reg_id); -+ bus->write(bus, phy_id, -+ AR40XX_MII_ATH_MMD_ADDR, -+ 0x4000 | mmd_num); -+ bus->write(bus, phy_id, -+ AR40XX_MII_ATH_MMD_DATA, reg_val); -+ mutex_unlock(&bus->mdio_lock); -+} -+ -+static u16 -+ar40xx_phy_mmd_read(struct ar40xx_priv *priv, u32 phy_id, -+ u16 mmd_num, u16 reg_id) -+{ -+ u16 value; -+ struct mii_bus *bus = priv->mii_bus; -+ -+ mutex_lock(&bus->mdio_lock); -+ bus->write(bus, phy_id, -+ AR40XX_MII_ATH_MMD_ADDR, mmd_num); -+ bus->write(bus, phy_id, -+ AR40XX_MII_ATH_MMD_DATA, reg_id); -+ bus->write(bus, phy_id, -+ AR40XX_MII_ATH_MMD_ADDR, -+ 0x4000 | mmd_num); -+ value = bus->read(bus, phy_id, AR40XX_MII_ATH_MMD_DATA); -+ mutex_unlock(&bus->mdio_lock); -+ return value; -+} -+ -+/* Start of swconfig support */ -+ -+static void -+ar40xx_phy_poll_reset(struct ar40xx_priv *priv) -+{ -+ u32 i, in_reset, retries = 500; -+ struct mii_bus *bus = priv->mii_bus; -+ -+ /* Assume RESET was recently issued to some or all of the phys */ -+ in_reset = GENMASK(AR40XX_NUM_PHYS - 1, 0); -+ -+ while (retries--) { -+ /* 1ms should be plenty of time. -+ * 802.3 spec allows for a max wait time of 500ms -+ */ -+ usleep_range(1000, 2000); -+ -+ for (i = 0; i < AR40XX_NUM_PHYS; i++) { -+ int val; -+ -+ /* skip devices which have completed reset */ -+ if (!(in_reset & BIT(i))) -+ continue; -+ -+ val = mdiobus_read(bus, i, MII_BMCR); -+ if (val < 0) -+ continue; -+ -+ /* mark when phy is no longer in reset state */ -+ if (!(val & BMCR_RESET)) -+ in_reset &= ~BIT(i); -+ } -+ -+ if (!in_reset) -+ return; -+ } -+ -+ dev_warn(&bus->dev, "Failed to reset all phys! (in_reset: 0x%x)\n", -+ in_reset); -+} -+ -+static void -+ar40xx_phy_init(struct ar40xx_priv *priv) -+{ -+ int i; -+ struct mii_bus *bus; -+ u16 val; -+ -+ bus = priv->mii_bus; -+ for (i = 0; i < AR40XX_NUM_PORTS - 1; i++) { -+ ar40xx_phy_dbg_read(priv, i, AR40XX_PHY_DEBUG_0, &val); -+ val &= ~AR40XX_PHY_MANU_CTRL_EN; -+ ar40xx_phy_dbg_write(priv, i, AR40XX_PHY_DEBUG_0, val); -+ mdiobus_write(bus, i, -+ MII_ADVERTISE, ADVERTISE_ALL | -+ ADVERTISE_PAUSE_CAP | -+ ADVERTISE_PAUSE_ASYM); -+ mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL); -+ mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); -+ } -+ -+ ar40xx_phy_poll_reset(priv); -+} -+ -+static void -+ar40xx_port_phy_linkdown(struct ar40xx_priv *priv) -+{ -+ struct mii_bus *bus; -+ int i; -+ u16 val; -+ -+ bus = priv->mii_bus; -+ for (i = 0; i < AR40XX_NUM_PORTS - 1; i++) { -+ mdiobus_write(bus, i, MII_CTRL1000, 0); -+ mdiobus_write(bus, i, MII_ADVERTISE, 0); -+ mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); -+ ar40xx_phy_dbg_read(priv, i, AR40XX_PHY_DEBUG_0, &val); -+ val |= AR40XX_PHY_MANU_CTRL_EN; -+ ar40xx_phy_dbg_write(priv, i, AR40XX_PHY_DEBUG_0, val); -+ /* disable transmit */ -+ ar40xx_phy_dbg_read(priv, i, AR40XX_PHY_DEBUG_2, &val); -+ val &= 0xf00f; -+ ar40xx_phy_dbg_write(priv, i, AR40XX_PHY_DEBUG_2, val); -+ } -+} -+ -+static void -+ar40xx_set_mirror_regs(struct ar40xx_priv *priv) -+{ -+ int port; -+ -+ /* reset all mirror registers */ -+ ar40xx_rmw(priv, AR40XX_REG_FWD_CTRL0, -+ AR40XX_FWD_CTRL0_MIRROR_PORT, -+ (0xF << AR40XX_FWD_CTRL0_MIRROR_PORT_S)); -+ for (port = 0; port < AR40XX_NUM_PORTS; port++) { -+ ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(port), -+ AR40XX_PORT_LOOKUP_ING_MIRROR_EN, 0); -+ -+ ar40xx_rmw(priv, AR40XX_REG_PORT_HOL_CTRL1(port), -+ AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN, 0); -+ } -+ -+ /* now enable mirroring if necessary */ -+ if (priv->source_port >= AR40XX_NUM_PORTS || -+ priv->monitor_port >= AR40XX_NUM_PORTS || -+ priv->source_port == priv->monitor_port) { -+ return; -+ } -+ -+ ar40xx_rmw(priv, AR40XX_REG_FWD_CTRL0, -+ AR40XX_FWD_CTRL0_MIRROR_PORT, -+ (priv->monitor_port << AR40XX_FWD_CTRL0_MIRROR_PORT_S)); -+ -+ if (priv->mirror_rx) -+ ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(priv->source_port), 0, -+ AR40XX_PORT_LOOKUP_ING_MIRROR_EN); -+ -+ if (priv->mirror_tx) -+ ar40xx_rmw(priv, AR40XX_REG_PORT_HOL_CTRL1(priv->source_port), -+ 0, AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN); -+} -+ -+static int -+ar40xx_sw_get_ports(struct switch_dev *dev, struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ u8 ports = priv->vlan_table[val->port_vlan]; -+ int i; -+ -+ val->len = 0; -+ for (i = 0; i < dev->ports; i++) { -+ struct switch_port *p; -+ -+ if (!(ports & BIT(i))) -+ continue; -+ -+ p = &val->value.ports[val->len++]; -+ p->id = i; -+ if ((priv->vlan_tagged & BIT(i)) || -+ (priv->pvid[i] != val->port_vlan)) -+ p->flags = BIT(SWITCH_PORT_FLAG_TAGGED); -+ else -+ p->flags = 0; -+ } -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_ports(struct switch_dev *dev, struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ u8 *vt = &priv->vlan_table[val->port_vlan]; -+ int i; -+ -+ *vt = 0; -+ for (i = 0; i < val->len; i++) { -+ struct switch_port *p = &val->value.ports[i]; -+ -+ if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED)) { -+ if (val->port_vlan == priv->pvid[p->id]) -+ priv->vlan_tagged |= BIT(p->id); -+ } else { -+ priv->vlan_tagged &= ~BIT(p->id); -+ priv->pvid[p->id] = val->port_vlan; -+ } -+ -+ *vt |= BIT(p->id); -+ } -+ return 0; -+} -+ -+static int -+ar40xx_reg_wait(struct ar40xx_priv *priv, u32 reg, u32 mask, u32 val, -+ unsigned timeout) -+{ -+ int i; -+ -+ for (i = 0; i < timeout; i++) { -+ u32 t; -+ -+ t = ar40xx_read(priv, reg); -+ if ((t & mask) == val) -+ return 0; -+ -+ usleep_range(1000, 2000); -+ } -+ -+ return -ETIMEDOUT; -+} -+ -+static int -+ar40xx_mib_op(struct ar40xx_priv *priv, u32 op) -+{ -+ int ret; -+ -+ lockdep_assert_held(&priv->mib_lock); -+ -+ /* Capture the hardware statistics for all ports */ -+ ar40xx_rmw(priv, AR40XX_REG_MIB_FUNC, -+ AR40XX_MIB_FUNC, (op << AR40XX_MIB_FUNC_S)); -+ -+ /* Wait for the capturing to complete. */ -+ ret = ar40xx_reg_wait(priv, AR40XX_REG_MIB_FUNC, -+ AR40XX_MIB_BUSY, 0, 10); -+ -+ return ret; -+} -+ -+static void -+ar40xx_mib_fetch_port_stat(struct ar40xx_priv *priv, int port, bool flush) -+{ -+ unsigned int base; -+ u64 *mib_stats; -+ int i; -+ u32 num_mibs = ARRAY_SIZE(ar40xx_mibs); -+ -+ WARN_ON(port >= priv->dev.ports); -+ -+ lockdep_assert_held(&priv->mib_lock); -+ -+ base = AR40XX_REG_PORT_STATS_START + -+ AR40XX_REG_PORT_STATS_LEN * port; -+ -+ mib_stats = &priv->mib_stats[port * num_mibs]; -+ if (flush) { -+ u32 len; -+ -+ len = num_mibs * sizeof(*mib_stats); -+ memset(mib_stats, 0, len); -+ return; -+ } -+ for (i = 0; i < num_mibs; i++) { -+ const struct ar40xx_mib_desc *mib; -+ u64 t; -+ -+ mib = &ar40xx_mibs[i]; -+ t = ar40xx_read(priv, base + mib->offset); -+ if (mib->size == 2) { -+ u64 hi; -+ -+ hi = ar40xx_read(priv, base + mib->offset + 4); -+ t |= hi << 32; -+ } -+ -+ mib_stats[i] += t; -+ } -+} -+ -+static int -+ar40xx_mib_capture(struct ar40xx_priv *priv) -+{ -+ return ar40xx_mib_op(priv, AR40XX_MIB_FUNC_CAPTURE); -+} -+ -+static int -+ar40xx_mib_flush(struct ar40xx_priv *priv) -+{ -+ return ar40xx_mib_op(priv, AR40XX_MIB_FUNC_FLUSH); -+} -+ -+static int -+ar40xx_sw_set_reset_mibs(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ unsigned int len; -+ int ret; -+ u32 num_mibs = ARRAY_SIZE(ar40xx_mibs); -+ -+ mutex_lock(&priv->mib_lock); -+ -+ len = priv->dev.ports * num_mibs * sizeof(*priv->mib_stats); -+ memset(priv->mib_stats, 0, len); -+ ret = ar40xx_mib_flush(priv); -+ -+ mutex_unlock(&priv->mib_lock); -+ return ret; -+} -+ -+static int -+ar40xx_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ priv->vlan = !!val->value.i; -+ return 0; -+} -+ -+static int -+ar40xx_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ val->value.i = priv->vlan; -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_mirror_rx_enable(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ priv->mirror_rx = !!val->value.i; -+ ar40xx_set_mirror_regs(priv); -+ mutex_unlock(&priv->reg_mutex); -+ -+ return 0; -+} -+ -+static int -+ar40xx_sw_get_mirror_rx_enable(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ val->value.i = priv->mirror_rx; -+ mutex_unlock(&priv->reg_mutex); -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_mirror_tx_enable(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ priv->mirror_tx = !!val->value.i; -+ ar40xx_set_mirror_regs(priv); -+ mutex_unlock(&priv->reg_mutex); -+ -+ return 0; -+} -+ -+static int -+ar40xx_sw_get_mirror_tx_enable(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ val->value.i = priv->mirror_tx; -+ mutex_unlock(&priv->reg_mutex); -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_mirror_monitor_port(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ priv->monitor_port = val->value.i; -+ ar40xx_set_mirror_regs(priv); -+ mutex_unlock(&priv->reg_mutex); -+ -+ return 0; -+} -+ -+static int -+ar40xx_sw_get_mirror_monitor_port(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ val->value.i = priv->monitor_port; -+ mutex_unlock(&priv->reg_mutex); -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_mirror_source_port(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ priv->source_port = val->value.i; -+ ar40xx_set_mirror_regs(priv); -+ mutex_unlock(&priv->reg_mutex); -+ -+ return 0; -+} -+ -+static int -+ar40xx_sw_get_mirror_source_port(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ mutex_lock(&priv->reg_mutex); -+ val->value.i = priv->source_port; -+ mutex_unlock(&priv->reg_mutex); -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_linkdown(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ if (val->value.i == 1) -+ ar40xx_port_phy_linkdown(priv); -+ else -+ ar40xx_phy_init(priv); -+ -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_port_reset_mib(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ int port; -+ int ret; -+ -+ port = val->port_vlan; -+ if (port >= dev->ports) -+ return -EINVAL; -+ -+ mutex_lock(&priv->mib_lock); -+ ret = ar40xx_mib_capture(priv); -+ if (ret) -+ goto unlock; -+ -+ ar40xx_mib_fetch_port_stat(priv, port, true); -+ -+unlock: -+ mutex_unlock(&priv->mib_lock); -+ return ret; -+} -+ -+static int -+ar40xx_sw_get_port_mib(struct switch_dev *dev, -+ const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ u64 *mib_stats; -+ int port; -+ int ret; -+ char *buf = priv->buf; -+ int i, len = 0; -+ u32 num_mibs = ARRAY_SIZE(ar40xx_mibs); -+ -+ port = val->port_vlan; -+ if (port >= dev->ports) -+ return -EINVAL; -+ -+ mutex_lock(&priv->mib_lock); -+ ret = ar40xx_mib_capture(priv); -+ if (ret) -+ goto unlock; -+ -+ ar40xx_mib_fetch_port_stat(priv, port, false); -+ -+ len += snprintf(buf + len, sizeof(priv->buf) - len, -+ "Port %d MIB counters\n", -+ port); -+ -+ mib_stats = &priv->mib_stats[port * num_mibs]; -+ for (i = 0; i < num_mibs; i++) -+ len += snprintf(buf + len, sizeof(priv->buf) - len, -+ "%-12s: %llu\n", -+ ar40xx_mibs[i].name, -+ mib_stats[i]); -+ -+ val->value.s = buf; -+ val->len = len; -+ -+unlock: -+ mutex_unlock(&priv->mib_lock); -+ return ret; -+} -+ -+static int -+ar40xx_sw_set_vid(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ priv->vlan_id[val->port_vlan] = val->value.i; -+ return 0; -+} -+ -+static int -+ar40xx_sw_get_vid(struct switch_dev *dev, const struct switch_attr *attr, -+ struct switch_val *val) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ val->value.i = priv->vlan_id[val->port_vlan]; -+ return 0; -+} -+ -+static int -+ar40xx_sw_get_pvid(struct switch_dev *dev, int port, int *vlan) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ *vlan = priv->pvid[port]; -+ return 0; -+} -+ -+static int -+ar40xx_sw_set_pvid(struct switch_dev *dev, int port, int vlan) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ /* make sure no invalid PVIDs get set */ -+ if (vlan >= dev->vlans) -+ return -EINVAL; -+ -+ priv->pvid[port] = vlan; -+ return 0; -+} -+ -+static void -+ar40xx_read_port_link(struct ar40xx_priv *priv, int port, -+ struct switch_port_link *link) -+{ -+ u32 status; -+ u32 speed; -+ -+ memset(link, 0, sizeof(*link)); -+ -+ status = ar40xx_read(priv, AR40XX_REG_PORT_STATUS(port)); -+ -+ link->aneg = !!(status & AR40XX_PORT_AUTO_LINK_EN); -+ if (link->aneg || (port != AR40XX_PORT_CPU)) -+ link->link = !!(status & AR40XX_PORT_STATUS_LINK_UP); -+ else -+ link->link = true; -+ -+ if (!link->link) -+ return; -+ -+ link->duplex = !!(status & AR40XX_PORT_DUPLEX); -+ link->tx_flow = !!(status & AR40XX_PORT_STATUS_TXFLOW); -+ link->rx_flow = !!(status & AR40XX_PORT_STATUS_RXFLOW); -+ -+ speed = (status & AR40XX_PORT_SPEED) >> -+ AR40XX_PORT_STATUS_SPEED_S; -+ -+ switch (speed) { -+ case AR40XX_PORT_SPEED_10M: -+ link->speed = SWITCH_PORT_SPEED_10; -+ break; -+ case AR40XX_PORT_SPEED_100M: -+ link->speed = SWITCH_PORT_SPEED_100; -+ break; -+ case AR40XX_PORT_SPEED_1000M: -+ link->speed = SWITCH_PORT_SPEED_1000; -+ break; -+ default: -+ link->speed = SWITCH_PORT_SPEED_UNKNOWN; -+ break; -+ } -+} -+ -+static int -+ar40xx_sw_get_port_link(struct switch_dev *dev, int port, -+ struct switch_port_link *link) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ -+ ar40xx_read_port_link(priv, port, link); -+ return 0; -+} -+ -+static const struct switch_attr ar40xx_sw_attr_globals[] = { -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "enable_vlan", -+ .description = "Enable VLAN mode", -+ .set = ar40xx_sw_set_vlan, -+ .get = ar40xx_sw_get_vlan, -+ .max = 1 -+ }, -+ { -+ .type = SWITCH_TYPE_NOVAL, -+ .name = "reset_mibs", -+ .description = "Reset all MIB counters", -+ .set = ar40xx_sw_set_reset_mibs, -+ }, -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "enable_mirror_rx", -+ .description = "Enable mirroring of RX packets", -+ .set = ar40xx_sw_set_mirror_rx_enable, -+ .get = ar40xx_sw_get_mirror_rx_enable, -+ .max = 1 -+ }, -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "enable_mirror_tx", -+ .description = "Enable mirroring of TX packets", -+ .set = ar40xx_sw_set_mirror_tx_enable, -+ .get = ar40xx_sw_get_mirror_tx_enable, -+ .max = 1 -+ }, -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "mirror_monitor_port", -+ .description = "Mirror monitor port", -+ .set = ar40xx_sw_set_mirror_monitor_port, -+ .get = ar40xx_sw_get_mirror_monitor_port, -+ .max = AR40XX_NUM_PORTS - 1 -+ }, -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "mirror_source_port", -+ .description = "Mirror source port", -+ .set = ar40xx_sw_set_mirror_source_port, -+ .get = ar40xx_sw_get_mirror_source_port, -+ .max = AR40XX_NUM_PORTS - 1 -+ }, -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "linkdown", -+ .description = "Link down all the PHYs", -+ .set = ar40xx_sw_set_linkdown, -+ .max = 1 -+ }, -+}; -+ -+static const struct switch_attr ar40xx_sw_attr_port[] = { -+ { -+ .type = SWITCH_TYPE_NOVAL, -+ .name = "reset_mib", -+ .description = "Reset single port MIB counters", -+ .set = ar40xx_sw_set_port_reset_mib, -+ }, -+ { -+ .type = SWITCH_TYPE_STRING, -+ .name = "mib", -+ .description = "Get port's MIB counters", -+ .set = NULL, -+ .get = ar40xx_sw_get_port_mib, -+ }, -+}; -+ -+const struct switch_attr ar40xx_sw_attr_vlan[] = { -+ { -+ .type = SWITCH_TYPE_INT, -+ .name = "vid", -+ .description = "VLAN ID (0-4094)", -+ .set = ar40xx_sw_set_vid, -+ .get = ar40xx_sw_get_vid, -+ .max = 4094, -+ }, -+}; -+ -+/* End of swconfig support */ -+ -+static int -+ar40xx_wait_bit(struct ar40xx_priv *priv, int reg, u32 mask, u32 val) -+{ -+ int timeout = 20; -+ u32 t; -+ -+ while (1) { -+ t = ar40xx_read(priv, reg); -+ if ((t & mask) == val) -+ return 0; -+ -+ if (timeout-- <= 0) -+ break; -+ -+ usleep_range(10, 20); -+ } -+ -+ pr_err("ar40xx: timeout for reg %08x: %08x & %08x != %08x\n", -+ (unsigned int)reg, t, mask, val); -+ return -ETIMEDOUT; -+} -+ -+static int -+ar40xx_atu_flush(struct ar40xx_priv *priv) -+{ -+ int ret; -+ -+ ret = ar40xx_wait_bit(priv, AR40XX_REG_ATU_FUNC, -+ AR40XX_ATU_FUNC_BUSY, 0); -+ if (!ret) -+ ar40xx_write(priv, AR40XX_REG_ATU_FUNC, -+ AR40XX_ATU_FUNC_OP_FLUSH | -+ AR40XX_ATU_FUNC_BUSY); -+ -+ return ret; -+} -+ -+static void -+ar40xx_ess_reset(struct ar40xx_priv *priv) -+{ -+ reset_control_assert(priv->ess_rst); -+ mdelay(10); -+ reset_control_deassert(priv->ess_rst); -+ /* Waiting for all inner tables init done. -+ * It cost 5~10ms. -+ */ -+ mdelay(10); -+ -+ pr_info("ESS reset ok!\n"); -+} -+ -+/* Start of psgmii self test */ -+ -+static void -+ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv) -+{ -+ u32 n; -+ struct mii_bus *bus = priv->mii_bus; -+ /* reset phy psgmii */ -+ /* fix phy psgmii RX 20bit */ -+ mdiobus_write(bus, 5, 0x0, 0x005b); -+ /* reset phy psgmii */ -+ mdiobus_write(bus, 5, 0x0, 0x001b); -+ /* release reset phy psgmii */ -+ mdiobus_write(bus, 5, 0x0, 0x005b); -+ -+ for (n = 0; n < AR40XX_PSGMII_CALB_NUM; n++) { -+ u16 status; -+ -+ status = ar40xx_phy_mmd_read(priv, 5, 1, 0x28); -+ if (status & BIT(0)) -+ break; -+ /* Polling interval to check PSGMII PLL in malibu is ready -+ * the worst time is 8.67ms -+ * for 25MHz reference clock -+ * [512+(128+2048)*49]*80ns+100us -+ */ -+ mdelay(2); -+ } -+ -+ /*check malibu psgmii calibration done end..*/ -+ -+ /*freeze phy psgmii RX CDR*/ -+ mdiobus_write(bus, 5, 0x1a, 0x2230); -+ -+ ar40xx_ess_reset(priv); -+ -+ /*check psgmii calibration done start*/ -+ for (n = 0; n < AR40XX_PSGMII_CALB_NUM; n++) { -+ u32 status; -+ -+ status = ar40xx_psgmii_read(priv, 0xa0); -+ if (status & BIT(0)) -+ break; -+ /* Polling interval to check PSGMII PLL in ESS is ready */ -+ mdelay(2); -+ } -+ -+ /* check dakota psgmii calibration done end..*/ -+ -+ /* relesae phy psgmii RX CDR */ -+ mdiobus_write(bus, 5, 0x1a, 0x3230); -+ /* release phy psgmii RX 20bit */ -+ mdiobus_write(bus, 5, 0x0, 0x005f); -+} -+ -+static void -+ar40xx_psgmii_single_phy_testing(struct ar40xx_priv *priv, int phy) -+{ -+ int j; -+ u32 tx_ok, tx_error; -+ u32 rx_ok, rx_error; -+ u32 tx_ok_high16; -+ u32 rx_ok_high16; -+ u32 tx_all_ok, rx_all_ok; -+ struct mii_bus *bus = priv->mii_bus; -+ -+ mdiobus_write(bus, phy, 0x0, 0x9000); -+ mdiobus_write(bus, phy, 0x0, 0x4140); -+ -+ for (j = 0; j < AR40XX_PSGMII_CALB_NUM; j++) { -+ u16 status; -+ -+ status = mdiobus_read(bus, phy, 0x11); -+ if (status & AR40XX_PHY_SPEC_STATUS_LINK) -+ break; -+ /* the polling interval to check if the PHY link up or not -+ * maxwait_timer: 750 ms +/-10 ms -+ * minwait_timer : 1 us +/- 0.1us -+ * time resides in minwait_timer ~ maxwait_timer -+ * see IEEE 802.3 section 40.4.5.2 -+ */ -+ mdelay(8); -+ } -+ -+ /* enable check */ -+ ar40xx_phy_mmd_write(priv, phy, 7, 0x8029, 0x0000); -+ ar40xx_phy_mmd_write(priv, phy, 7, 0x8029, 0x0003); -+ -+ /* start traffic */ -+ ar40xx_phy_mmd_write(priv, phy, 7, 0x8020, 0xa000); -+ /* wait for all traffic end -+ * 4096(pkt num)*1524(size)*8ns(125MHz)=49.9ms -+ */ -+ mdelay(50); -+ -+ /* check counter */ -+ tx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802e); -+ tx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802d); -+ tx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802f); -+ rx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802b); -+ rx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802a); -+ rx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802c); -+ tx_all_ok = tx_ok + (tx_ok_high16 << 16); -+ rx_all_ok = rx_ok + (rx_ok_high16 << 16); -+ if (tx_all_ok == 0x1000 && tx_error == 0) { -+ /* success */ -+ priv->phy_t_status &= (~BIT(phy)); -+ } else { -+ pr_info("PHY %d single test PSGMII issue happen!\n", phy); -+ priv->phy_t_status |= BIT(phy); -+ } -+ -+ mdiobus_write(bus, phy, 0x0, 0x1840); -+} -+ -+static void -+ar40xx_psgmii_all_phy_testing(struct ar40xx_priv *priv) -+{ -+ int phy, j; -+ struct mii_bus *bus = priv->mii_bus; -+ -+ mdiobus_write(bus, 0x1f, 0x0, 0x9000); -+ mdiobus_write(bus, 0x1f, 0x0, 0x4140); -+ -+ for (j = 0; j < AR40XX_PSGMII_CALB_NUM; j++) { -+ for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { -+ u16 status; -+ -+ status = mdiobus_read(bus, phy, 0x11); -+ if (!(status & BIT(10))) -+ break; -+ } -+ -+ if (phy >= (AR40XX_NUM_PORTS - 1)) -+ break; -+ /* The polling interva to check if the PHY link up or not */ -+ mdelay(8); -+ } -+ /* enable check */ -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8029, 0x0000); -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8029, 0x0003); -+ -+ /* start traffic */ -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8020, 0xa000); -+ /* wait for all traffic end -+ * 4096(pkt num)*1524(size)*8ns(125MHz)=49.9ms -+ */ -+ mdelay(50); -+ -+ for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { -+ u32 tx_ok, tx_error; -+ u32 rx_ok, rx_error; -+ u32 tx_ok_high16; -+ u32 rx_ok_high16; -+ u32 tx_all_ok, rx_all_ok; -+ -+ /* check counter */ -+ tx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802e); -+ tx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802d); -+ tx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802f); -+ rx_ok = ar40xx_phy_mmd_read(priv, phy, 7, 0x802b); -+ rx_ok_high16 = ar40xx_phy_mmd_read(priv, phy, 7, 0x802a); -+ rx_error = ar40xx_phy_mmd_read(priv, phy, 7, 0x802c); -+ tx_all_ok = tx_ok + (tx_ok_high16<<16); -+ rx_all_ok = rx_ok + (rx_ok_high16<<16); -+ if (tx_all_ok == 0x1000 && tx_error == 0) { -+ /* success */ -+ priv->phy_t_status &= ~BIT(phy + 8); -+ } else { -+ pr_info("PHY%d test see issue!\n", phy); -+ priv->phy_t_status |= BIT(phy + 8); -+ } -+ } -+ -+ pr_debug("PHY all test 0x%x \r\n", priv->phy_t_status); -+} -+ -+void -+ar40xx_psgmii_self_test(struct ar40xx_priv *priv) -+{ -+ u32 i, phy; -+ struct mii_bus *bus = priv->mii_bus; -+ -+ ar40xx_malibu_psgmii_ess_reset(priv); -+ -+ /* switch to access MII reg for copper */ -+ mdiobus_write(bus, 4, 0x1f, 0x8500); -+ for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { -+ /*enable phy mdio broadcast write*/ -+ ar40xx_phy_mmd_write(priv, phy, 7, 0x8028, 0x801f); -+ } -+ /* force no link by power down */ -+ mdiobus_write(bus, 0x1f, 0x0, 0x1840); -+ /*packet number*/ -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8021, 0x1000); -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8062, 0x05e0); -+ -+ /*fix mdi status */ -+ mdiobus_write(bus, 0x1f, 0x10, 0x6800); -+ for (i = 0; i < AR40XX_PSGMII_CALB_NUM; i++) { -+ priv->phy_t_status = 0; -+ -+ for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { -+ ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(phy + 1), -+ AR40XX_PORT_LOOKUP_LOOPBACK, -+ AR40XX_PORT_LOOKUP_LOOPBACK); -+ } -+ -+ for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) -+ ar40xx_psgmii_single_phy_testing(priv, phy); -+ -+ ar40xx_psgmii_all_phy_testing(priv); -+ -+ if (priv->phy_t_status) -+ ar40xx_malibu_psgmii_ess_reset(priv); -+ else -+ break; -+ } -+ -+ if (i >= AR40XX_PSGMII_CALB_NUM) -+ pr_info("PSGMII cannot recover\n"); -+ else -+ pr_debug("PSGMII recovered after %d times reset\n", i); -+ -+ /* configuration recover */ -+ /* packet number */ -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8021, 0x0); -+ /* disable check */ -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8029, 0x0); -+ /* disable traffic */ -+ ar40xx_phy_mmd_write(priv, 0x1f, 7, 0x8020, 0x0); -+} -+ -+void -+ar40xx_psgmii_self_test_clean(struct ar40xx_priv *priv) -+{ -+ int phy; -+ struct mii_bus *bus = priv->mii_bus; -+ -+ /* disable phy internal loopback */ -+ mdiobus_write(bus, 0x1f, 0x10, 0x6860); -+ mdiobus_write(bus, 0x1f, 0x0, 0x9040); -+ -+ for (phy = 0; phy < AR40XX_NUM_PORTS - 1; phy++) { -+ /* disable mac loop back */ -+ ar40xx_rmw(priv, AR40XX_REG_PORT_LOOKUP(phy + 1), -+ AR40XX_PORT_LOOKUP_LOOPBACK, 0); -+ /* disable phy mdio broadcast write */ -+ ar40xx_phy_mmd_write(priv, phy, 7, 0x8028, 0x001f); -+ } -+ -+ /* clear fdb entry */ -+ ar40xx_atu_flush(priv); -+} -+ -+/* End of psgmii self test */ -+ -+static void -+ar40xx_mac_mode_init(struct ar40xx_priv *priv, u32 mode) -+{ -+ if (mode == PORT_WRAPPER_PSGMII) { -+ ar40xx_psgmii_write(priv, AR40XX_PSGMII_MODE_CONTROL, 0x2200); -+ ar40xx_psgmii_write(priv, AR40XX_PSGMIIPHY_TX_CONTROL, 0x8380); -+ } -+} -+ -+static -+int ar40xx_cpuport_setup(struct ar40xx_priv *priv) -+{ -+ u32 t; -+ -+ t = AR40XX_PORT_STATUS_TXFLOW | -+ AR40XX_PORT_STATUS_RXFLOW | -+ AR40XX_PORT_TXHALF_FLOW | -+ AR40XX_PORT_DUPLEX | -+ AR40XX_PORT_SPEED_1000M; -+ ar40xx_write(priv, AR40XX_REG_PORT_STATUS(0), t); -+ usleep_range(10, 20); -+ -+ t |= AR40XX_PORT_TX_EN | -+ AR40XX_PORT_RX_EN; -+ ar40xx_write(priv, AR40XX_REG_PORT_STATUS(0), t); -+ -+ return 0; -+} -+ -+static void -+ar40xx_init_port(struct ar40xx_priv *priv, int port) -+{ -+ u32 t; -+ -+ ar40xx_rmw(priv, AR40XX_REG_PORT_STATUS(port), -+ AR40XX_PORT_AUTO_LINK_EN, 0); -+ -+ ar40xx_write(priv, AR40XX_REG_PORT_HEADER(port), 0); -+ -+ ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), 0); -+ -+ t = AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH << AR40XX_PORT_VLAN1_OUT_MODE_S; -+ ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t); -+ -+ t = AR40XX_PORT_LOOKUP_LEARN; -+ t |= AR40XX_PORT_STATE_FORWARD << AR40XX_PORT_LOOKUP_STATE_S; -+ ar40xx_write(priv, AR40XX_REG_PORT_LOOKUP(port), t); -+} -+ -+void -+ar40xx_init_globals(struct ar40xx_priv *priv) -+{ -+ u32 t; -+ -+ /* enable CPU port and disable mirror port */ -+ t = AR40XX_FWD_CTRL0_CPU_PORT_EN | -+ AR40XX_FWD_CTRL0_MIRROR_PORT; -+ ar40xx_write(priv, AR40XX_REG_FWD_CTRL0, t); -+ -+ /* forward multicast and broadcast frames to CPU */ -+ t = (AR40XX_PORTS_ALL << AR40XX_FWD_CTRL1_UC_FLOOD_S) | -+ (AR40XX_PORTS_ALL << AR40XX_FWD_CTRL1_MC_FLOOD_S) | -+ (AR40XX_PORTS_ALL << AR40XX_FWD_CTRL1_BC_FLOOD_S); -+ ar40xx_write(priv, AR40XX_REG_FWD_CTRL1, t); -+ -+ /* enable jumbo frames */ -+ ar40xx_rmw(priv, AR40XX_REG_MAX_FRAME_SIZE, -+ AR40XX_MAX_FRAME_SIZE_MTU, 9018 + 8 + 2); -+ -+ /* Enable MIB counters */ -+ ar40xx_rmw(priv, AR40XX_REG_MODULE_EN, 0, -+ AR40XX_MODULE_EN_MIB); -+ -+ /* Disable AZ */ -+ ar40xx_write(priv, AR40XX_REG_EEE_CTRL, 0); -+ -+ /* set flowctrl thershold for cpu port */ -+ t = (AR40XX_PORT0_FC_THRESH_ON_DFLT << 16) | -+ AR40XX_PORT0_FC_THRESH_OFF_DFLT; -+ ar40xx_write(priv, AR40XX_REG_PORT_FLOWCTRL_THRESH(0), t); -+} -+ -+static void -+ar40xx_malibu_init(struct ar40xx_priv *priv) -+{ -+ int i; -+ struct mii_bus *bus; -+ u16 val; -+ -+ bus = priv->mii_bus; -+ -+ /* war to enable AZ transmitting ability */ -+ ar40xx_phy_mmd_write(priv, AR40XX_PSGMII_ID, 1, -+ AR40XX_MALIBU_PSGMII_MODE_CTRL, -+ AR40XX_MALIBU_PHY_PSGMII_MODE_CTRL_ADJUST_VAL); -+ for (i = 0; i < AR40XX_NUM_PORTS - 1; i++) { -+ /* change malibu control_dac */ -+ val = ar40xx_phy_mmd_read(priv, i, 7, -+ AR40XX_MALIBU_PHY_MMD7_DAC_CTRL); -+ val &= ~AR40XX_MALIBU_DAC_CTRL_MASK; -+ val |= AR40XX_MALIBU_DAC_CTRL_VALUE; -+ ar40xx_phy_mmd_write(priv, i, 7, -+ AR40XX_MALIBU_PHY_MMD7_DAC_CTRL, val); -+ if (i == AR40XX_MALIBU_PHY_LAST_ADDR) { -+ /* to avoid goes into hibernation */ -+ val = ar40xx_phy_mmd_read(priv, i, 3, -+ AR40XX_MALIBU_PHY_RLP_CTRL); -+ val &= (~(1<<1)); -+ ar40xx_phy_mmd_write(priv, i, 3, -+ AR40XX_MALIBU_PHY_RLP_CTRL, val); -+ } -+ } -+ -+ /* adjust psgmii serdes tx amp */ -+ mdiobus_write(bus, AR40XX_PSGMII_ID, AR40XX_PSGMII_TX_DRIVER_1_CTRL, -+ AR40XX_MALIBU_PHY_PSGMII_REDUCE_SERDES_TX_AMP); -+} -+ -+static int -+ar40xx_hw_init(struct ar40xx_priv *priv) -+{ -+ u32 i; -+ -+ ar40xx_ess_reset(priv); -+ -+ if (priv->mii_bus) -+ ar40xx_malibu_init(priv); -+ else -+ return -1; -+ -+ ar40xx_psgmii_self_test(priv); -+ ar40xx_psgmii_self_test_clean(priv); -+ -+ ar40xx_mac_mode_init(priv, priv->mac_mode); -+ -+ for (i = 0; i < priv->dev.ports; i++) -+ ar40xx_init_port(priv, i); -+ -+ ar40xx_init_globals(priv); -+ -+ return 0; -+} -+ -+/* Start of qm error WAR */ -+ -+static -+int ar40xx_force_1g_full(struct ar40xx_priv *priv, u32 port_id) -+{ -+ u32 reg; -+ -+ if (port_id < 0 || port_id > 6) -+ return -1; -+ -+ reg = AR40XX_REG_PORT_STATUS(port_id); -+ return ar40xx_rmw(priv, reg, AR40XX_PORT_SPEED, -+ (AR40XX_PORT_SPEED_1000M | AR40XX_PORT_DUPLEX)); -+} -+ -+static -+int ar40xx_get_qm_status(struct ar40xx_priv *priv, -+ u32 port_id, u32 *qm_buffer_err) -+{ -+ u32 reg; -+ u32 qm_val; -+ -+ if (port_id < 1 || port_id > 5) { -+ *qm_buffer_err = 0; -+ return -1; -+ } -+ -+ if (port_id < 4) { -+ reg = AR40XX_REG_QM_PORT0_3_QNUM; -+ ar40xx_write(priv, AR40XX_REG_QM_DEBUG_ADDR, reg); -+ qm_val = ar40xx_read(priv, AR40XX_REG_QM_DEBUG_VALUE); -+ /* every 8 bits for each port */ -+ *qm_buffer_err = (qm_val >> (port_id * 8)) & 0xFF; -+ } else { -+ reg = AR40XX_REG_QM_PORT4_6_QNUM; -+ ar40xx_write(priv, AR40XX_REG_QM_DEBUG_ADDR, reg); -+ qm_val = ar40xx_read(priv, AR40XX_REG_QM_DEBUG_VALUE); -+ /* every 8 bits for each port */ -+ *qm_buffer_err = (qm_val >> ((port_id-4) * 8)) & 0xFF; -+ } -+ -+ return 0; -+} -+ -+static void -+ar40xx_sw_mac_polling_task(struct ar40xx_priv *priv) -+{ -+ static int task_count; -+ u32 i; -+ u32 reg, value; -+ u32 link, speed, duplex; -+ u32 qm_buffer_err; -+ u16 port_phy_status[AR40XX_NUM_PORTS]; -+ static u32 qm_err_cnt[AR40XX_NUM_PORTS] = {0, 0, 0, 0, 0, 0}; -+ static u32 link_cnt[AR40XX_NUM_PORTS] = {0, 0, 0, 0, 0, 0}; -+ struct mii_bus *bus = NULL; -+ -+ if (!priv || !priv->mii_bus) -+ return; -+ -+ bus = priv->mii_bus; -+ -+ ++task_count; -+ -+ for (i = 1; i < AR40XX_NUM_PORTS; ++i) { -+ port_phy_status[i] = -+ mdiobus_read(bus, i-1, AR40XX_PHY_SPEC_STATUS); -+ speed = link = duplex = port_phy_status[i]; -+ speed &= AR40XX_PHY_SPEC_STATUS_SPEED; -+ speed >>= 14; -+ link &= AR40XX_PHY_SPEC_STATUS_LINK; -+ link >>= 10; -+ duplex &= AR40XX_PHY_SPEC_STATUS_DUPLEX; -+ duplex >>= 13; -+ -+ if (link != priv->ar40xx_port_old_link[i]) { -+ ++link_cnt[i]; -+ /* Up --> Down */ -+ if ((priv->ar40xx_port_old_link[i] == -+ AR40XX_PORT_LINK_UP) && -+ (link == AR40XX_PORT_LINK_DOWN)) { -+ /* LINK_EN disable(MAC force mode)*/ -+ reg = AR40XX_REG_PORT_STATUS(i); -+ ar40xx_rmw(priv, reg, -+ AR40XX_PORT_AUTO_LINK_EN, 0); -+ -+ /* Check queue buffer */ -+ qm_err_cnt[i] = 0; -+ ar40xx_get_qm_status(priv, i, &qm_buffer_err); -+ if (qm_buffer_err) { -+ priv->ar40xx_port_qm_buf[i] = -+ AR40XX_QM_NOT_EMPTY; -+ } else { -+ u16 phy_val = 0; -+ -+ priv->ar40xx_port_qm_buf[i] = -+ AR40XX_QM_EMPTY; -+ ar40xx_force_1g_full(priv, i); -+ /* Ref:QCA8337 Datasheet,Clearing -+ * MENU_CTRL_EN prevents phy to -+ * stuck in 100BT mode when -+ * bringing up the link -+ */ -+ ar40xx_phy_dbg_read(priv, i-1, -+ AR40XX_PHY_DEBUG_0, -+ &phy_val); -+ phy_val &= (~AR40XX_PHY_MANU_CTRL_EN); -+ ar40xx_phy_dbg_write(priv, i-1, -+ AR40XX_PHY_DEBUG_0, -+ phy_val); -+ } -+ priv->ar40xx_port_old_link[i] = link; -+ } else if ((priv->ar40xx_port_old_link[i] == -+ AR40XX_PORT_LINK_DOWN) && -+ (link == AR40XX_PORT_LINK_UP)) { -+ /* Down --> Up */ -+ if (priv->port_link_up[i] < 1) { -+ ++priv->port_link_up[i]; -+ } else { -+ /* Change port status */ -+ reg = AR40XX_REG_PORT_STATUS(i); -+ value = ar40xx_read(priv, reg); -+ priv->port_link_up[i] = 0; -+ -+ value &= ~(AR40XX_PORT_DUPLEX | -+ AR40XX_PORT_SPEED); -+ value |= speed | (duplex ? BIT(6) : 0); -+ ar40xx_write(priv, reg, value); -+ /* clock switch need such time -+ * to avoid glitch -+ */ -+ usleep_range(100, 200); -+ -+ value |= AR40XX_PORT_AUTO_LINK_EN; -+ ar40xx_write(priv, reg, value); -+ /* HW need such time to make sure link -+ * stable before enable MAC -+ */ -+ usleep_range(100, 200); -+ -+ if (speed == AR40XX_PORT_SPEED_100M) { -+ u16 phy_val = 0; -+ /* Enable @100M, if down to 10M -+ * clock will change smoothly -+ */ -+ ar40xx_phy_dbg_read(priv, i-1, -+ 0, -+ &phy_val); -+ phy_val |= -+ AR40XX_PHY_MANU_CTRL_EN; -+ ar40xx_phy_dbg_write(priv, i-1, -+ 0, -+ phy_val); -+ } -+ priv->ar40xx_port_old_link[i] = link; -+ } -+ } -+ } -+ -+ if (priv->ar40xx_port_qm_buf[i] == AR40XX_QM_NOT_EMPTY) { -+ /* Check QM */ -+ ar40xx_get_qm_status(priv, i, &qm_buffer_err); -+ if (qm_buffer_err) { -+ ++qm_err_cnt[i]; -+ } else { -+ priv->ar40xx_port_qm_buf[i] = -+ AR40XX_QM_EMPTY; -+ qm_err_cnt[i] = 0; -+ ar40xx_force_1g_full(priv, i); -+ } -+ } -+ } -+} -+ -+static void -+ar40xx_qm_err_check_work_task(struct work_struct *work) -+{ -+ struct ar40xx_priv *priv = container_of(work, struct ar40xx_priv, -+ qm_dwork.work); -+ -+ mutex_lock(&priv->qm_lock); -+ -+ ar40xx_sw_mac_polling_task(priv); -+ -+ mutex_unlock(&priv->qm_lock); -+ -+ schedule_delayed_work(&priv->qm_dwork, -+ msecs_to_jiffies(AR40XX_QM_WORK_DELAY)); -+} -+ -+static int -+ar40xx_qm_err_check_work_start(struct ar40xx_priv *priv) -+{ -+ mutex_init(&priv->qm_lock); -+ -+ INIT_DELAYED_WORK(&priv->qm_dwork, ar40xx_qm_err_check_work_task); -+ -+ schedule_delayed_work(&priv->qm_dwork, -+ msecs_to_jiffies(AR40XX_QM_WORK_DELAY)); -+ -+ return 0; -+} -+ -+/* End of qm error WAR */ -+ -+static int -+ar40xx_vlan_init(struct ar40xx_priv *priv) -+{ -+ int port; -+ unsigned long bmp; -+ -+ /* By default Enable VLAN */ -+ priv->vlan = 1; -+ priv->vlan_table[AR40XX_LAN_VLAN] = priv->cpu_bmp | priv->lan_bmp; -+ priv->vlan_table[AR40XX_WAN_VLAN] = priv->cpu_bmp | priv->wan_bmp; -+ priv->vlan_tagged = priv->cpu_bmp; -+ bmp = priv->lan_bmp; -+ for_each_set_bit(port, &bmp, AR40XX_NUM_PORTS) -+ priv->pvid[port] = AR40XX_LAN_VLAN; -+ -+ bmp = priv->wan_bmp; -+ for_each_set_bit(port, &bmp, AR40XX_NUM_PORTS) -+ priv->pvid[port] = AR40XX_WAN_VLAN; -+ -+ return 0; -+} -+ -+static void -+ar40xx_mib_work_func(struct work_struct *work) -+{ -+ struct ar40xx_priv *priv; -+ int err; -+ -+ priv = container_of(work, struct ar40xx_priv, mib_work.work); -+ -+ mutex_lock(&priv->mib_lock); -+ -+ err = ar40xx_mib_capture(priv); -+ if (err) -+ goto next_port; -+ -+ ar40xx_mib_fetch_port_stat(priv, priv->mib_next_port, false); -+ -+next_port: -+ priv->mib_next_port++; -+ if (priv->mib_next_port >= priv->dev.ports) -+ priv->mib_next_port = 0; -+ -+ mutex_unlock(&priv->mib_lock); -+ -+ schedule_delayed_work(&priv->mib_work, -+ msecs_to_jiffies(AR40XX_MIB_WORK_DELAY)); -+} -+ -+static void -+ar40xx_setup_port(struct ar40xx_priv *priv, int port, u32 members) -+{ -+ u32 t; -+ u32 egress, ingress; -+ u32 pvid = priv->vlan_id[priv->pvid[port]]; -+ -+ if (priv->vlan) { -+ egress = AR40XX_PORT_VLAN1_OUT_MODE_UNMOD; -+ ingress = AR40XX_IN_SECURE; -+ } else { -+ egress = AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH; -+ ingress = AR40XX_IN_PORT_ONLY; -+ } -+ -+ t = pvid << AR40XX_PORT_VLAN0_DEF_SVID_S; -+ t |= pvid << AR40XX_PORT_VLAN0_DEF_CVID_S; -+ ar40xx_write(priv, AR40XX_REG_PORT_VLAN0(port), t); -+ -+ t = AR40XX_PORT_VLAN1_PORT_VLAN_PROP; -+ t |= egress << AR40XX_PORT_VLAN1_OUT_MODE_S; -+ ar40xx_write(priv, AR40XX_REG_PORT_VLAN1(port), t); -+ -+ t = members; -+ t |= AR40XX_PORT_LOOKUP_LEARN; -+ t |= ingress << AR40XX_PORT_LOOKUP_IN_MODE_S; -+ t |= AR40XX_PORT_STATE_FORWARD << AR40XX_PORT_LOOKUP_STATE_S; -+ ar40xx_write(priv, AR40XX_REG_PORT_LOOKUP(port), t); -+} -+ -+static void -+ar40xx_vtu_op(struct ar40xx_priv *priv, u32 op, u32 val) -+{ -+ if (ar40xx_wait_bit(priv, AR40XX_REG_VTU_FUNC1, -+ AR40XX_VTU_FUNC1_BUSY, 0)) -+ return; -+ -+ if ((op & AR40XX_VTU_FUNC1_OP) == AR40XX_VTU_FUNC1_OP_LOAD) -+ ar40xx_write(priv, AR40XX_REG_VTU_FUNC0, val); -+ -+ op |= AR40XX_VTU_FUNC1_BUSY; -+ ar40xx_write(priv, AR40XX_REG_VTU_FUNC1, op); -+} -+ -+static void -+ar40xx_vtu_load_vlan(struct ar40xx_priv *priv, u32 vid, u32 port_mask) -+{ -+ u32 op; -+ u32 val; -+ int i; -+ -+ op = AR40XX_VTU_FUNC1_OP_LOAD | (vid << AR40XX_VTU_FUNC1_VID_S); -+ val = AR40XX_VTU_FUNC0_VALID | AR40XX_VTU_FUNC0_IVL; -+ for (i = 0; i < AR40XX_NUM_PORTS; i++) { -+ u32 mode; -+ -+ if ((port_mask & BIT(i)) == 0) -+ mode = AR40XX_VTU_FUNC0_EG_MODE_NOT; -+ else if (priv->vlan == 0) -+ mode = AR40XX_VTU_FUNC0_EG_MODE_KEEP; -+ else if ((priv->vlan_tagged & BIT(i)) || -+ (priv->vlan_id[priv->pvid[i]] != vid)) -+ mode = AR40XX_VTU_FUNC0_EG_MODE_TAG; -+ else -+ mode = AR40XX_VTU_FUNC0_EG_MODE_UNTAG; -+ -+ val |= mode << AR40XX_VTU_FUNC0_EG_MODE_S(i); -+ } -+ ar40xx_vtu_op(priv, op, val); -+} -+ -+static void -+ar40xx_vtu_flush(struct ar40xx_priv *priv) -+{ -+ ar40xx_vtu_op(priv, AR40XX_VTU_FUNC1_OP_FLUSH, 0); -+} -+ -+static int -+ar40xx_sw_hw_apply(struct switch_dev *dev) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ u8 portmask[AR40XX_NUM_PORTS]; -+ int i, j; -+ -+ mutex_lock(&priv->reg_mutex); -+ /* flush all vlan entries */ -+ ar40xx_vtu_flush(priv); -+ -+ memset(portmask, 0, sizeof(portmask)); -+ if (priv->vlan) { -+ for (j = 0; j < AR40XX_MAX_VLANS; j++) { -+ u8 vp = priv->vlan_table[j]; -+ -+ if (!vp) -+ continue; -+ -+ for (i = 0; i < dev->ports; i++) { -+ u8 mask = BIT(i); -+ -+ if (vp & mask) -+ portmask[i] |= vp & ~mask; -+ } -+ -+ ar40xx_vtu_load_vlan(priv, priv->vlan_id[j], -+ priv->vlan_table[j]); -+ } -+ } else { -+ /* 8021q vlan disabled */ -+ for (i = 0; i < dev->ports; i++) { -+ if (i == AR40XX_PORT_CPU) -+ continue; -+ -+ portmask[i] = BIT(AR40XX_PORT_CPU); -+ portmask[AR40XX_PORT_CPU] |= BIT(i); -+ } -+ } -+ -+ /* update the port destination mask registers and tag settings */ -+ for (i = 0; i < dev->ports; i++) -+ ar40xx_setup_port(priv, i, portmask[i]); -+ -+ ar40xx_set_mirror_regs(priv); -+ -+ mutex_unlock(&priv->reg_mutex); -+ return 0; -+} -+ -+static int -+ar40xx_sw_reset_switch(struct switch_dev *dev) -+{ -+ struct ar40xx_priv *priv = swdev_to_ar40xx(dev); -+ int i, rv; -+ -+ mutex_lock(&priv->reg_mutex); -+ memset(&priv->vlan, 0, sizeof(struct ar40xx_priv) - -+ offsetof(struct ar40xx_priv, vlan)); -+ -+ for (i = 0; i < AR40XX_MAX_VLANS; i++) -+ priv->vlan_id[i] = i; -+ -+ ar40xx_vlan_init(priv); -+ -+ priv->mirror_rx = false; -+ priv->mirror_tx = false; -+ priv->source_port = 0; -+ priv->monitor_port = 0; -+ -+ mutex_unlock(&priv->reg_mutex); -+ -+ rv = ar40xx_sw_hw_apply(dev); -+ return rv; -+} -+ -+static int -+ar40xx_start(struct ar40xx_priv *priv) -+{ -+ int ret; -+ -+ ret = ar40xx_hw_init(priv); -+ if (ret) -+ return ret; -+ -+ ret = ar40xx_sw_reset_switch(&priv->dev); -+ if (ret) -+ return ret; -+ -+ /* at last, setup cpu port */ -+ ret = ar40xx_cpuport_setup(priv); -+ if (ret) -+ return ret; -+ -+ schedule_delayed_work(&priv->mib_work, -+ msecs_to_jiffies(AR40XX_MIB_WORK_DELAY)); -+ -+ ar40xx_qm_err_check_work_start(priv); -+ -+ return 0; -+} -+ -+static const struct switch_dev_ops ar40xx_sw_ops = { -+ .attr_global = { -+ .attr = ar40xx_sw_attr_globals, -+ .n_attr = ARRAY_SIZE(ar40xx_sw_attr_globals), -+ }, -+ .attr_port = { -+ .attr = ar40xx_sw_attr_port, -+ .n_attr = ARRAY_SIZE(ar40xx_sw_attr_port), -+ }, -+ .attr_vlan = { -+ .attr = ar40xx_sw_attr_vlan, -+ .n_attr = ARRAY_SIZE(ar40xx_sw_attr_vlan), -+ }, -+ .get_port_pvid = ar40xx_sw_get_pvid, -+ .set_port_pvid = ar40xx_sw_set_pvid, -+ .get_vlan_ports = ar40xx_sw_get_ports, -+ .set_vlan_ports = ar40xx_sw_set_ports, -+ .apply_config = ar40xx_sw_hw_apply, -+ .reset_switch = ar40xx_sw_reset_switch, -+ .get_port_link = ar40xx_sw_get_port_link, -+}; -+ -+/* Start of phy driver support */ -+ -+static const u32 ar40xx_phy_ids[] = { -+ 0x004dd0b1, -+ 0x004dd0b2, /* AR40xx */ -+}; -+ -+static bool -+ar40xx_phy_match(u32 phy_id) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(ar40xx_phy_ids); i++) -+ if (phy_id == ar40xx_phy_ids[i]) -+ return true; -+ -+ return false; -+} -+ -+static bool -+is_ar40xx_phy(struct mii_bus *bus) -+{ -+ unsigned i; -+ -+ for (i = 0; i < 4; i++) { -+ u32 phy_id; -+ -+ phy_id = mdiobus_read(bus, i, MII_PHYSID1) << 16; -+ phy_id |= mdiobus_read(bus, i, MII_PHYSID2); -+ if (!ar40xx_phy_match(phy_id)) -+ return false; -+ } -+ -+ return true; -+} -+ -+static int -+ar40xx_phy_probe(struct phy_device *phydev) -+{ -+ if (!is_ar40xx_phy(phydev->mdio.bus)) -+ return -ENODEV; -+ -+ ar40xx_priv->mii_bus = phydev->mdio.bus; -+ phydev->priv = ar40xx_priv; -+ if (phydev->mdio.addr == 0) -+ ar40xx_priv->phy = phydev; -+ -+ phydev->supported |= SUPPORTED_1000baseT_Full; -+ phydev->advertising |= ADVERTISED_1000baseT_Full; -+ return 0; -+} -+ -+static void -+ar40xx_phy_remove(struct phy_device *phydev) -+{ -+ ar40xx_priv->mii_bus = NULL; -+ phydev->priv = NULL; -+} -+ -+static int -+ar40xx_phy_config_init(struct phy_device *phydev) -+{ -+ return 0; -+} -+ -+static int -+ar40xx_phy_read_status(struct phy_device *phydev) -+{ -+ if (phydev->mdio.addr != 0) -+ return genphy_read_status(phydev); -+ -+ return 0; -+} -+ -+static int -+ar40xx_phy_config_aneg(struct phy_device *phydev) -+{ -+ if (phydev->mdio.addr == 0) -+ return 0; -+ -+ return genphy_config_aneg(phydev); -+} -+ -+static struct phy_driver ar40xx_phy_driver = { -+ .phy_id = 0x004d0000, -+ .name = "QCA Malibu", -+ .phy_id_mask = 0xffff0000, -+ .features = PHY_BASIC_FEATURES, -+ .probe = ar40xx_phy_probe, -+ .remove = ar40xx_phy_remove, -+ .config_init = ar40xx_phy_config_init, -+ .config_aneg = ar40xx_phy_config_aneg, -+ .read_status = ar40xx_phy_read_status, -+}; -+ -+static uint16_t ar40xx_gpio_get_phy(unsigned int offset) -+{ -+ return offset / 4; -+} -+ -+static uint16_t ar40xx_gpio_get_reg(unsigned int offset) -+{ -+ return 0x8074 + offset % 4; -+} -+ -+static void ar40xx_gpio_set(struct gpio_chip *gc, unsigned int offset, -+ int value) -+{ -+ struct ar40xx_priv *priv = gpiochip_get_data(gc); -+ -+ ar40xx_phy_mmd_write(priv, ar40xx_gpio_get_phy(offset), 0x7, -+ ar40xx_gpio_get_reg(offset), -+ value ? 0xA000 : 0x8000); -+} -+ -+static int ar40xx_gpio_get(struct gpio_chip *gc, unsigned offset) -+{ -+ struct ar40xx_priv *priv = gpiochip_get_data(gc); -+ -+ return ar40xx_phy_mmd_read(priv, ar40xx_gpio_get_phy(offset), 0x7, -+ ar40xx_gpio_get_reg(offset)) == 0xA000; -+} -+ -+static int ar40xx_gpio_get_dir(struct gpio_chip *gc, unsigned offset) -+{ -+ return 0; /* only out direction */ -+} -+ -+static int ar40xx_gpio_dir_out(struct gpio_chip *gc, unsigned offset, -+ int value) -+{ -+ /* -+ * the direction out value is used to set the initial value. -+ * support of this function is required by leds-gpio.c -+ */ -+ ar40xx_gpio_set(gc, offset, value); -+ return 0; -+} -+ -+static void ar40xx_register_gpio(struct device *pdev, -+ struct ar40xx_priv *priv, -+ struct device_node *switch_node) -+{ -+ struct gpio_chip *gc; -+ int err; -+ -+ gc = devm_kzalloc(pdev, sizeof(*gc), GFP_KERNEL); -+ if (!gc) -+ return; -+ -+ gc->label = "ar40xx_gpio", -+ gc->base = -1, -+ gc->ngpio = 5 /* mmd 0 - 4 */ * 4 /* 0x8074 - 0x8077 */, -+ gc->parent = pdev; -+ gc->owner = THIS_MODULE; -+ -+ gc->get_direction = ar40xx_gpio_get_dir; -+ gc->direction_output = ar40xx_gpio_dir_out; -+ gc->get = ar40xx_gpio_get; -+ gc->set = ar40xx_gpio_set; -+ gc->can_sleep = true; -+ gc->label = priv->dev.name; -+ gc->of_node = switch_node; -+ -+ err = devm_gpiochip_add_data(pdev, gc, priv); -+ if (err != 0) -+ dev_err(pdev, "Failed to register gpio %d.\n", err); -+} -+ -+/* End of phy driver support */ -+ -+/* Platform driver probe function */ -+ -+static int ar40xx_probe(struct platform_device *pdev) -+{ -+ struct device_node *switch_node; -+ struct device_node *psgmii_node; -+ const __be32 *mac_mode; -+ struct clk *ess_clk; -+ struct switch_dev *swdev; -+ struct ar40xx_priv *priv; -+ u32 len; -+ u32 num_mibs; -+ struct resource psgmii_base = {0}; -+ struct resource switch_base = {0}; -+ int ret; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, priv); -+ ar40xx_priv = priv; -+ -+ switch_node = of_node_get(pdev->dev.of_node); -+ if (of_address_to_resource(switch_node, 0, &switch_base) != 0) -+ return -EIO; -+ -+ priv->hw_addr = devm_ioremap_resource(&pdev->dev, &switch_base); -+ if (IS_ERR(priv->hw_addr)) { -+ dev_err(&pdev->dev, "Failed to ioremap switch_base!\n"); -+ return PTR_ERR(priv->hw_addr); -+ } -+ -+ /*psgmii dts get*/ -+ psgmii_node = of_find_node_by_name(NULL, "ess-psgmii"); -+ if (!psgmii_node) { -+ dev_err(&pdev->dev, "Failed to find ess-psgmii node!\n"); -+ return -EINVAL; -+ } -+ -+ if (of_address_to_resource(psgmii_node, 0, &psgmii_base) != 0) -+ return -EIO; -+ -+ priv->psgmii_hw_addr = devm_ioremap_resource(&pdev->dev, &psgmii_base); -+ if (IS_ERR(priv->psgmii_hw_addr)) { -+ dev_err(&pdev->dev, "psgmii ioremap fail!\n"); -+ return PTR_ERR(priv->psgmii_hw_addr); -+ } -+ -+ mac_mode = of_get_property(switch_node, "switch_mac_mode", &len); -+ if (!mac_mode) { -+ dev_err(&pdev->dev, "Failed to read switch_mac_mode\n"); -+ return -EINVAL; -+ } -+ priv->mac_mode = be32_to_cpup(mac_mode); -+ -+ ess_clk = of_clk_get_by_name(switch_node, "ess_clk"); -+ if (ess_clk) -+ clk_prepare_enable(ess_clk); -+ -+ priv->ess_rst = devm_reset_control_get(&pdev->dev, "ess_rst"); -+ if (IS_ERR(priv->ess_rst)) { -+ dev_err(&pdev->dev, "Failed to get ess_rst control!\n"); -+ return PTR_ERR(priv->ess_rst); -+ } -+ -+ if (of_property_read_u32(switch_node, "switch_cpu_bmp", -+ &priv->cpu_bmp) || -+ of_property_read_u32(switch_node, "switch_lan_bmp", -+ &priv->lan_bmp) || -+ of_property_read_u32(switch_node, "switch_wan_bmp", -+ &priv->wan_bmp)) { -+ dev_err(&pdev->dev, "Failed to read port properties\n"); -+ return -EIO; -+ } -+ -+ ret = phy_driver_register(&ar40xx_phy_driver, THIS_MODULE); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to register ar40xx phy driver!\n"); -+ return -EIO; -+ } -+ -+ mutex_init(&priv->reg_mutex); -+ mutex_init(&priv->mib_lock); -+ INIT_DELAYED_WORK(&priv->mib_work, ar40xx_mib_work_func); -+ -+ /* register switch */ -+ swdev = &priv->dev; -+ -+ swdev->alias = dev_name(&priv->mii_bus->dev); -+ -+ swdev->cpu_port = AR40XX_PORT_CPU; -+ swdev->name = "QCA AR40xx"; -+ swdev->vlans = AR40XX_MAX_VLANS; -+ swdev->ports = AR40XX_NUM_PORTS; -+ swdev->ops = &ar40xx_sw_ops; -+ ret = register_switch(swdev, NULL); -+ if (ret) -+ goto err_unregister_phy; -+ -+ num_mibs = ARRAY_SIZE(ar40xx_mibs); -+ len = priv->dev.ports * num_mibs * -+ sizeof(*priv->mib_stats); -+ priv->mib_stats = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); -+ if (!priv->mib_stats) { -+ ret = -ENOMEM; -+ goto err_unregister_switch; -+ } -+ -+ ar40xx_start(priv); -+ -+ if (of_property_read_bool(switch_node, "gpio-controller")) -+ ar40xx_register_gpio(&pdev->dev, ar40xx_priv, switch_node); -+ -+ return 0; -+ -+err_unregister_switch: -+ unregister_switch(&priv->dev); -+err_unregister_phy: -+ phy_driver_unregister(&ar40xx_phy_driver); -+ platform_set_drvdata(pdev, NULL); -+ return ret; -+} -+ -+static int ar40xx_remove(struct platform_device *pdev) -+{ -+ struct ar40xx_priv *priv = platform_get_drvdata(pdev); -+ -+ cancel_delayed_work_sync(&priv->qm_dwork); -+ cancel_delayed_work_sync(&priv->mib_work); -+ -+ unregister_switch(&priv->dev); -+ -+ phy_driver_unregister(&ar40xx_phy_driver); -+ -+ return 0; -+} -+ -+static const struct of_device_id ar40xx_of_mtable[] = { -+ {.compatible = "qcom,ess-switch" }, -+ {} -+}; -+ -+struct platform_driver ar40xx_drv = { -+ .probe = ar40xx_probe, -+ .remove = ar40xx_remove, -+ .driver = { -+ .name = "ar40xx", -+ .of_match_table = ar40xx_of_mtable, -+ }, -+}; -+ -+module_platform_driver(ar40xx_drv); -+ -+MODULE_DESCRIPTION("IPQ40XX ESS driver"); -+MODULE_LICENSE("Dual BSD/GPL"); ---- /dev/null -+++ b/drivers/net/phy/ar40xx.h -@@ -0,0 +1,337 @@ -+/* -+ * Copyright (c) 2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+ #ifndef __AR40XX_H -+#define __AR40XX_H -+ -+#define AR40XX_MAX_VLANS 128 -+#define AR40XX_NUM_PORTS 6 -+#define AR40XX_NUM_PHYS 5 -+ -+#define BITS(_s, _n) (((1UL << (_n)) - 1) << _s) -+ -+struct ar40xx_priv { -+ struct switch_dev dev; -+ -+ u8 __iomem *hw_addr; -+ u8 __iomem *psgmii_hw_addr; -+ u32 mac_mode; -+ struct reset_control *ess_rst; -+ u32 cpu_bmp; -+ u32 lan_bmp; -+ u32 wan_bmp; -+ -+ struct mii_bus *mii_bus; -+ struct phy_device *phy; -+ -+ /* mutex for qm task */ -+ struct mutex qm_lock; -+ struct delayed_work qm_dwork; -+ u32 port_link_up[AR40XX_NUM_PORTS]; -+ u32 ar40xx_port_old_link[AR40XX_NUM_PORTS]; -+ u32 ar40xx_port_qm_buf[AR40XX_NUM_PORTS]; -+ -+ u32 phy_t_status; -+ -+ /* mutex for switch reg access */ -+ struct mutex reg_mutex; -+ -+ /* mutex for mib task */ -+ struct mutex mib_lock; -+ struct delayed_work mib_work; -+ int mib_next_port; -+ u64 *mib_stats; -+ -+ char buf[2048]; -+ -+ /* all fields below will be cleared on reset */ -+ bool vlan; -+ u16 vlan_id[AR40XX_MAX_VLANS]; -+ u8 vlan_table[AR40XX_MAX_VLANS]; -+ u8 vlan_tagged; -+ u16 pvid[AR40XX_NUM_PORTS]; -+ -+ /* mirror */ -+ bool mirror_rx; -+ bool mirror_tx; -+ int source_port; -+ int monitor_port; -+}; -+ -+#define AR40XX_PORT_LINK_UP 1 -+#define AR40XX_PORT_LINK_DOWN 0 -+#define AR40XX_QM_NOT_EMPTY 1 -+#define AR40XX_QM_EMPTY 0 -+ -+#define AR40XX_LAN_VLAN 1 -+#define AR40XX_WAN_VLAN 2 -+ -+enum ar40xx_port_wrapper_cfg { -+ PORT_WRAPPER_PSGMII = 0, -+}; -+ -+struct ar40xx_mib_desc { -+ u32 size; -+ u32 offset; -+ const char *name; -+}; -+ -+#define AR40XX_PORT_CPU 0 -+ -+#define AR40XX_PSGMII_MODE_CONTROL 0x1b4 -+#define AR40XX_PSGMII_ATHR_CSCO_MODE_25M BIT(0) -+ -+#define AR40XX_PSGMIIPHY_TX_CONTROL 0x288 -+ -+#define AR40XX_MII_ATH_MMD_ADDR 0x0d -+#define AR40XX_MII_ATH_MMD_DATA 0x0e -+#define AR40XX_MII_ATH_DBG_ADDR 0x1d -+#define AR40XX_MII_ATH_DBG_DATA 0x1e -+ -+#define AR40XX_STATS_RXBROAD 0x00 -+#define AR40XX_STATS_RXPAUSE 0x04 -+#define AR40XX_STATS_RXMULTI 0x08 -+#define AR40XX_STATS_RXFCSERR 0x0c -+#define AR40XX_STATS_RXALIGNERR 0x10 -+#define AR40XX_STATS_RXRUNT 0x14 -+#define AR40XX_STATS_RXFRAGMENT 0x18 -+#define AR40XX_STATS_RX64BYTE 0x1c -+#define AR40XX_STATS_RX128BYTE 0x20 -+#define AR40XX_STATS_RX256BYTE 0x24 -+#define AR40XX_STATS_RX512BYTE 0x28 -+#define AR40XX_STATS_RX1024BYTE 0x2c -+#define AR40XX_STATS_RX1518BYTE 0x30 -+#define AR40XX_STATS_RXMAXBYTE 0x34 -+#define AR40XX_STATS_RXTOOLONG 0x38 -+#define AR40XX_STATS_RXGOODBYTE 0x3c -+#define AR40XX_STATS_RXBADBYTE 0x44 -+#define AR40XX_STATS_RXOVERFLOW 0x4c -+#define AR40XX_STATS_FILTERED 0x50 -+#define AR40XX_STATS_TXBROAD 0x54 -+#define AR40XX_STATS_TXPAUSE 0x58 -+#define AR40XX_STATS_TXMULTI 0x5c -+#define AR40XX_STATS_TXUNDERRUN 0x60 -+#define AR40XX_STATS_TX64BYTE 0x64 -+#define AR40XX_STATS_TX128BYTE 0x68 -+#define AR40XX_STATS_TX256BYTE 0x6c -+#define AR40XX_STATS_TX512BYTE 0x70 -+#define AR40XX_STATS_TX1024BYTE 0x74 -+#define AR40XX_STATS_TX1518BYTE 0x78 -+#define AR40XX_STATS_TXMAXBYTE 0x7c -+#define AR40XX_STATS_TXOVERSIZE 0x80 -+#define AR40XX_STATS_TXBYTE 0x84 -+#define AR40XX_STATS_TXCOLLISION 0x8c -+#define AR40XX_STATS_TXABORTCOL 0x90 -+#define AR40XX_STATS_TXMULTICOL 0x94 -+#define AR40XX_STATS_TXSINGLECOL 0x98 -+#define AR40XX_STATS_TXEXCDEFER 0x9c -+#define AR40XX_STATS_TXDEFER 0xa0 -+#define AR40XX_STATS_TXLATECOL 0xa4 -+ -+#define AR40XX_REG_MODULE_EN 0x030 -+#define AR40XX_MODULE_EN_MIB BIT(0) -+ -+#define AR40XX_REG_MIB_FUNC 0x034 -+#define AR40XX_MIB_BUSY BIT(17) -+#define AR40XX_MIB_CPU_KEEP BIT(20) -+#define AR40XX_MIB_FUNC BITS(24, 3) -+#define AR40XX_MIB_FUNC_S 24 -+#define AR40XX_MIB_FUNC_NO_OP 0x0 -+#define AR40XX_MIB_FUNC_FLUSH 0x1 -+ -+#define AR40XX_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) -+#define AR40XX_PORT_SPEED BITS(0, 2) -+#define AR40XX_PORT_STATUS_SPEED_S 0 -+#define AR40XX_PORT_TX_EN BIT(2) -+#define AR40XX_PORT_RX_EN BIT(3) -+#define AR40XX_PORT_STATUS_TXFLOW BIT(4) -+#define AR40XX_PORT_STATUS_RXFLOW BIT(5) -+#define AR40XX_PORT_DUPLEX BIT(6) -+#define AR40XX_PORT_TXHALF_FLOW BIT(7) -+#define AR40XX_PORT_STATUS_LINK_UP BIT(8) -+#define AR40XX_PORT_AUTO_LINK_EN BIT(9) -+#define AR40XX_PORT_STATUS_FLOW_CONTROL BIT(12) -+ -+#define AR40XX_REG_MAX_FRAME_SIZE 0x078 -+#define AR40XX_MAX_FRAME_SIZE_MTU BITS(0, 14) -+ -+#define AR40XX_REG_PORT_HEADER(_i) (0x09c + (_i) * 4) -+ -+#define AR40XX_REG_EEE_CTRL 0x100 -+#define AR40XX_EEE_CTRL_DISABLE_PHY(_i) BIT(4 + (_i) * 2) -+ -+#define AR40XX_REG_PORT_VLAN0(_i) (0x420 + (_i) * 0x8) -+#define AR40XX_PORT_VLAN0_DEF_SVID BITS(0, 12) -+#define AR40XX_PORT_VLAN0_DEF_SVID_S 0 -+#define AR40XX_PORT_VLAN0_DEF_CVID BITS(16, 12) -+#define AR40XX_PORT_VLAN0_DEF_CVID_S 16 -+ -+#define AR40XX_REG_PORT_VLAN1(_i) (0x424 + (_i) * 0x8) -+#define AR40XX_PORT_VLAN1_PORT_VLAN_PROP BIT(6) -+#define AR40XX_PORT_VLAN1_OUT_MODE BITS(12, 2) -+#define AR40XX_PORT_VLAN1_OUT_MODE_S 12 -+#define AR40XX_PORT_VLAN1_OUT_MODE_UNMOD 0 -+#define AR40XX_PORT_VLAN1_OUT_MODE_UNTAG 1 -+#define AR40XX_PORT_VLAN1_OUT_MODE_TAG 2 -+#define AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH 3 -+ -+#define AR40XX_REG_VTU_FUNC0 0x0610 -+#define AR40XX_VTU_FUNC0_EG_MODE BITS(4, 14) -+#define AR40XX_VTU_FUNC0_EG_MODE_S(_i) (4 + (_i) * 2) -+#define AR40XX_VTU_FUNC0_EG_MODE_KEEP 0 -+#define AR40XX_VTU_FUNC0_EG_MODE_UNTAG 1 -+#define AR40XX_VTU_FUNC0_EG_MODE_TAG 2 -+#define AR40XX_VTU_FUNC0_EG_MODE_NOT 3 -+#define AR40XX_VTU_FUNC0_IVL BIT(19) -+#define AR40XX_VTU_FUNC0_VALID BIT(20) -+ -+#define AR40XX_REG_VTU_FUNC1 0x0614 -+#define AR40XX_VTU_FUNC1_OP BITS(0, 3) -+#define AR40XX_VTU_FUNC1_OP_NOOP 0 -+#define AR40XX_VTU_FUNC1_OP_FLUSH 1 -+#define AR40XX_VTU_FUNC1_OP_LOAD 2 -+#define AR40XX_VTU_FUNC1_OP_PURGE 3 -+#define AR40XX_VTU_FUNC1_OP_REMOVE_PORT 4 -+#define AR40XX_VTU_FUNC1_OP_GET_NEXT 5 -+#define AR40XX7_VTU_FUNC1_OP_GET_ONE 6 -+#define AR40XX_VTU_FUNC1_FULL BIT(4) -+#define AR40XX_VTU_FUNC1_PORT BIT(8, 4) -+#define AR40XX_VTU_FUNC1_PORT_S 8 -+#define AR40XX_VTU_FUNC1_VID BIT(16, 12) -+#define AR40XX_VTU_FUNC1_VID_S 16 -+#define AR40XX_VTU_FUNC1_BUSY BIT(31) -+ -+#define AR40XX_REG_FWD_CTRL0 0x620 -+#define AR40XX_FWD_CTRL0_CPU_PORT_EN BIT(10) -+#define AR40XX_FWD_CTRL0_MIRROR_PORT BITS(4, 4) -+#define AR40XX_FWD_CTRL0_MIRROR_PORT_S 4 -+ -+#define AR40XX_REG_FWD_CTRL1 0x624 -+#define AR40XX_FWD_CTRL1_UC_FLOOD BITS(0, 7) -+#define AR40XX_FWD_CTRL1_UC_FLOOD_S 0 -+#define AR40XX_FWD_CTRL1_MC_FLOOD BITS(8, 7) -+#define AR40XX_FWD_CTRL1_MC_FLOOD_S 8 -+#define AR40XX_FWD_CTRL1_BC_FLOOD BITS(16, 7) -+#define AR40XX_FWD_CTRL1_BC_FLOOD_S 16 -+#define AR40XX_FWD_CTRL1_IGMP BITS(24, 7) -+#define AR40XX_FWD_CTRL1_IGMP_S 24 -+ -+#define AR40XX_REG_PORT_LOOKUP(_i) (0x660 + (_i) * 0xc) -+#define AR40XX_PORT_LOOKUP_MEMBER BITS(0, 7) -+#define AR40XX_PORT_LOOKUP_IN_MODE BITS(8, 2) -+#define AR40XX_PORT_LOOKUP_IN_MODE_S 8 -+#define AR40XX_PORT_LOOKUP_STATE BITS(16, 3) -+#define AR40XX_PORT_LOOKUP_STATE_S 16 -+#define AR40XX_PORT_LOOKUP_LEARN BIT(20) -+#define AR40XX_PORT_LOOKUP_LOOPBACK BIT(21) -+#define AR40XX_PORT_LOOKUP_ING_MIRROR_EN BIT(25) -+ -+#define AR40XX_REG_ATU_FUNC 0x60c -+#define AR40XX_ATU_FUNC_OP BITS(0, 4) -+#define AR40XX_ATU_FUNC_OP_NOOP 0x0 -+#define AR40XX_ATU_FUNC_OP_FLUSH 0x1 -+#define AR40XX_ATU_FUNC_OP_LOAD 0x2 -+#define AR40XX_ATU_FUNC_OP_PURGE 0x3 -+#define AR40XX_ATU_FUNC_OP_FLUSH_LOCKED 0x4 -+#define AR40XX_ATU_FUNC_OP_FLUSH_UNICAST 0x5 -+#define AR40XX_ATU_FUNC_OP_GET_NEXT 0x6 -+#define AR40XX_ATU_FUNC_OP_SEARCH_MAC 0x7 -+#define AR40XX_ATU_FUNC_OP_CHANGE_TRUNK 0x8 -+#define AR40XX_ATU_FUNC_BUSY BIT(31) -+ -+#define AR40XX_REG_QM_DEBUG_ADDR 0x820 -+#define AR40XX_REG_QM_DEBUG_VALUE 0x824 -+#define AR40XX_REG_QM_PORT0_3_QNUM 0x1d -+#define AR40XX_REG_QM_PORT4_6_QNUM 0x1e -+ -+#define AR40XX_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8) -+#define AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16) -+ -+#define AR40XX_REG_PORT_FLOWCTRL_THRESH(_i) (0x9b0 + (_i) * 0x4) -+#define AR40XX_PORT0_FC_THRESH_ON_DFLT 0x60 -+#define AR40XX_PORT0_FC_THRESH_OFF_DFLT 0x90 -+ -+#define AR40XX_PHY_DEBUG_0 0 -+#define AR40XX_PHY_MANU_CTRL_EN BIT(12) -+ -+#define AR40XX_PHY_DEBUG_2 2 -+ -+#define AR40XX_PHY_SPEC_STATUS 0x11 -+#define AR40XX_PHY_SPEC_STATUS_LINK BIT(10) -+#define AR40XX_PHY_SPEC_STATUS_DUPLEX BIT(13) -+#define AR40XX_PHY_SPEC_STATUS_SPEED BITS(14, 2) -+ -+/* port forwarding state */ -+enum { -+ AR40XX_PORT_STATE_DISABLED = 0, -+ AR40XX_PORT_STATE_BLOCK = 1, -+ AR40XX_PORT_STATE_LISTEN = 2, -+ AR40XX_PORT_STATE_LEARN = 3, -+ AR40XX_PORT_STATE_FORWARD = 4 -+}; -+ -+/* ingress 802.1q mode */ -+enum { -+ AR40XX_IN_PORT_ONLY = 0, -+ AR40XX_IN_PORT_FALLBACK = 1, -+ AR40XX_IN_VLAN_ONLY = 2, -+ AR40XX_IN_SECURE = 3 -+}; -+ -+/* egress 802.1q mode */ -+enum { -+ AR40XX_OUT_KEEP = 0, -+ AR40XX_OUT_STRIP_VLAN = 1, -+ AR40XX_OUT_ADD_VLAN = 2 -+}; -+ -+/* port speed */ -+enum { -+ AR40XX_PORT_SPEED_10M = 0, -+ AR40XX_PORT_SPEED_100M = 1, -+ AR40XX_PORT_SPEED_1000M = 2, -+ AR40XX_PORT_SPEED_ERR = 3, -+}; -+ -+#define AR40XX_MIB_WORK_DELAY 2000 /* msecs */ -+ -+#define AR40XX_QM_WORK_DELAY 100 -+ -+#define AR40XX_MIB_FUNC_CAPTURE 0x3 -+ -+#define AR40XX_REG_PORT_STATS_START 0x1000 -+#define AR40XX_REG_PORT_STATS_LEN 0x100 -+ -+#define AR40XX_PORTS_ALL 0x3f -+ -+#define AR40XX_PSGMII_ID 5 -+#define AR40XX_PSGMII_CALB_NUM 100 -+#define AR40XX_MALIBU_PSGMII_MODE_CTRL 0x6d -+#define AR40XX_MALIBU_PHY_PSGMII_MODE_CTRL_ADJUST_VAL 0x220c -+#define AR40XX_MALIBU_PHY_MMD7_DAC_CTRL 0x801a -+#define AR40XX_MALIBU_DAC_CTRL_MASK 0x380 -+#define AR40XX_MALIBU_DAC_CTRL_VALUE 0x280 -+#define AR40XX_MALIBU_PHY_RLP_CTRL 0x805a -+#define AR40XX_PSGMII_TX_DRIVER_1_CTRL 0xb -+#define AR40XX_MALIBU_PHY_PSGMII_REDUCE_SERDES_TX_AMP 0x8a -+#define AR40XX_MALIBU_PHY_LAST_ADDR 4 -+ -+static inline struct ar40xx_priv * -+swdev_to_ar40xx(struct switch_dev *swdev) -+{ -+ return container_of(swdev, struct ar40xx_priv, dev); -+} -+ -+#endif ---- /dev/null -+++ b/drivers/net/phy/mdio-ipq40xx.c -@@ -0,0 +1,203 @@ -+/* -+ * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MDIO_CTRL_0_REG 0x40 -+#define MDIO_CTRL_1_REG 0x44 -+#define MDIO_CTRL_2_REG 0x48 -+#define MDIO_CTRL_3_REG 0x4c -+#define MDIO_CTRL_4_REG 0x50 -+#define MDIO_CTRL_4_ACCESS_BUSY BIT(16) -+#define MDIO_CTRL_4_ACCESS_START BIT(8) -+#define MDIO_CTRL_4_ACCESS_CODE_READ 0 -+#define MDIO_CTRL_4_ACCESS_CODE_WRITE 1 -+#define CTRL_0_REG_DEFAULT_VALUE 0x150FF -+ -+#define IPQ40XX_MDIO_RETRY 1000 -+#define IPQ40XX_MDIO_DELAY 10 -+ -+struct ipq40xx_mdio_data { -+ struct mii_bus *mii_bus; -+ void __iomem *membase; -+ int phy_irq[PHY_MAX_ADDR]; -+ struct device *dev; -+}; -+ -+static int ipq40xx_mdio_wait_busy(struct ipq40xx_mdio_data *am) -+{ -+ int i; -+ -+ for (i = 0; i < IPQ40XX_MDIO_RETRY; i++) { -+ unsigned int busy; -+ -+ busy = readl(am->membase + MDIO_CTRL_4_REG) & -+ MDIO_CTRL_4_ACCESS_BUSY; -+ if (!busy) -+ return 0; -+ -+ /* BUSY might take to be cleard by 15~20 times of loop */ -+ udelay(IPQ40XX_MDIO_DELAY); -+ } -+ -+ dev_err(am->dev, "%s: MDIO operation timed out\n", am->mii_bus->name); -+ -+ return -ETIMEDOUT; -+} -+ -+static int ipq40xx_mdio_read(struct mii_bus *bus, int mii_id, int regnum) -+{ -+ struct ipq40xx_mdio_data *am = bus->priv; -+ int value = 0; -+ unsigned int cmd = 0; -+ -+ lockdep_assert_held(&bus->mdio_lock); -+ -+ if (ipq40xx_mdio_wait_busy(am)) -+ return -ETIMEDOUT; -+ -+ /* issue the phy address and reg */ -+ writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG); -+ -+ cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_READ; -+ -+ /* issue read command */ -+ writel(cmd, am->membase + MDIO_CTRL_4_REG); -+ -+ /* Wait read complete */ -+ if (ipq40xx_mdio_wait_busy(am)) -+ return -ETIMEDOUT; -+ -+ /* Read data */ -+ value = readl(am->membase + MDIO_CTRL_3_REG); -+ -+ return value; -+} -+ -+static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum, -+ u16 value) -+{ -+ struct ipq40xx_mdio_data *am = bus->priv; -+ unsigned int cmd = 0; -+ -+ lockdep_assert_held(&bus->mdio_lock); -+ -+ if (ipq40xx_mdio_wait_busy(am)) -+ return -ETIMEDOUT; -+ -+ /* issue the phy address and reg */ -+ writel((mii_id << 8) | regnum, am->membase + MDIO_CTRL_1_REG); -+ -+ /* issue write data */ -+ writel(value, am->membase + MDIO_CTRL_2_REG); -+ -+ cmd = MDIO_CTRL_4_ACCESS_START|MDIO_CTRL_4_ACCESS_CODE_WRITE; -+ /* issue write command */ -+ writel(cmd, am->membase + MDIO_CTRL_4_REG); -+ -+ /* Wait write complete */ -+ if (ipq40xx_mdio_wait_busy(am)) -+ return -ETIMEDOUT; -+ -+ return 0; -+} -+ -+static int ipq40xx_mdio_probe(struct platform_device *pdev) -+{ -+ struct ipq40xx_mdio_data *am; -+ struct resource *res; -+ int i; -+ -+ am = devm_kzalloc(&pdev->dev, sizeof(*am), GFP_KERNEL); -+ if (!am) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) { -+ dev_err(&pdev->dev, "no iomem resource found\n"); -+ return -ENXIO; -+ } -+ -+ am->membase = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(am->membase)) { -+ dev_err(&pdev->dev, "unable to ioremap registers\n"); -+ return PTR_ERR(am->membase); -+ } -+ -+ am->mii_bus = devm_mdiobus_alloc(&pdev->dev); -+ if (!am->mii_bus) -+ return -ENOMEM; -+ -+ writel(CTRL_0_REG_DEFAULT_VALUE, am->membase + MDIO_CTRL_0_REG); -+ -+ am->mii_bus->name = "ipq40xx_mdio"; -+ am->mii_bus->read = ipq40xx_mdio_read; -+ am->mii_bus->write = ipq40xx_mdio_write; -+ memcpy(am->mii_bus->irq, am->phy_irq, sizeof(am->phy_irq)); -+ am->mii_bus->priv = am; -+ am->mii_bus->parent = &pdev->dev; -+ snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev)); -+ -+ for (i = 0; i < PHY_MAX_ADDR; i++) -+ am->phy_irq[i] = PHY_POLL; -+ -+ am->dev = &pdev->dev; -+ platform_set_drvdata(pdev, am); -+ -+ /* edma_axi_probe() use "am" drvdata. -+ * ipq40xx_mdio_probe() must be called first. -+ */ -+ return of_mdiobus_register(am->mii_bus, pdev->dev.of_node); -+} -+ -+static int ipq40xx_mdio_remove(struct platform_device *pdev) -+{ -+ struct ipq40xx_mdio_data *am = platform_get_drvdata(pdev); -+ -+ mdiobus_unregister(am->mii_bus); -+ return 0; -+} -+ -+static const struct of_device_id ipq40xx_mdio_dt_ids[] = { -+ { .compatible = "qcom,ipq4019-mdio" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, ipq40xx_mdio_dt_ids); -+ -+static struct platform_driver ipq40xx_mdio_driver = { -+ .probe = ipq40xx_mdio_probe, -+ .remove = ipq40xx_mdio_remove, -+ .driver = { -+ .name = "ipq40xx-mdio", -+ .of_match_table = ipq40xx_mdio_dt_ids, -+ }, -+}; -+ -+module_platform_driver(ipq40xx_mdio_driver); -+ -+#define DRV_VERSION "1.0" -+ -+MODULE_DESCRIPTION("IPQ40XX MDIO interface driver"); -+MODULE_AUTHOR("Qualcomm Atheros"); -+MODULE_VERSION(DRV_VERSION); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/target/linux/ipq40xx/patches-4.9/701-dts-ipq4019-add-mdio-node.patch b/target/linux/ipq40xx/patches-4.9/701-dts-ipq4019-add-mdio-node.patch deleted file mode 100644 index 676da7214..000000000 --- a/target/linux/ipq40xx/patches-4.9/701-dts-ipq4019-add-mdio-node.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 09ed737593f71bcca08a537a6c15264a1a6add08 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 20 Nov 2016 01:10:33 +0100 -Subject: [PATCH] dts: ipq4019: add mdio node for ethernet - -This patch adds the mdio device-tree node. -This is where the switch is connected to, so it's needed -for the ethernet interfaces. - -Note: The driver isn't anywhere close to be upstream, -so the info might change. ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 28 ++++++++++++++++++++++++++++ - 1 file changed, 28 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -315,6 +315,34 @@ - reg = <0x4ab000 0x4>; - }; - -+ mdio@90000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "qcom,ipq4019-mdio"; -+ reg = <0x90000 0x64>; -+ status = "disabled"; -+ -+ ethernet-phy@0 { -+ reg = <0>; -+ }; -+ -+ ethernet-phy@1 { -+ reg = <1>; -+ }; -+ -+ ethernet-phy@2 { -+ reg = <2>; -+ }; -+ -+ ethernet-phy@3 { -+ reg = <3>; -+ }; -+ -+ ethernet-phy@4 { -+ reg = <4>; -+ }; -+ }; -+ - usb3_ss_phy: ssphy@9a000 { - compatible = "qca,uni-ssphy"; - reg = <0x9a000 0x800>; diff --git a/target/linux/ipq40xx/patches-4.9/702-dts-ipq4019-add-PHY-switch-nodes.patch b/target/linux/ipq40xx/patches-4.9/702-dts-ipq4019-add-PHY-switch-nodes.patch deleted file mode 100644 index 79031d398..000000000 --- a/target/linux/ipq40xx/patches-4.9/702-dts-ipq4019-add-PHY-switch-nodes.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 20 Nov 2016 02:20:54 +0100 -Subject: [PATCH] dts: ipq4019: add PHY/switch nodes - -This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii" -nodes which are needed for the ar40xx.c driver to initialize the -switch. - -Signed-off-by: Christian Lamparter ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -343,6 +343,29 @@ - }; - }; - -+ ess-switch@c000000 { -+ compatible = "qcom,ess-switch"; -+ reg = <0xc000000 0x80000>; -+ switch_access_mode = "local bus"; -+ resets = <&gcc ESS_RESET>; -+ reset-names = "ess_rst"; -+ clocks = <&gcc GCC_ESS_CLK>; -+ clock-names = "ess_clk"; -+ switch_cpu_bmp = <0x1>; -+ switch_lan_bmp = <0x1e>; -+ switch_wan_bmp = <0x20>; -+ switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */ -+ switch_initvlas = <0x7c 0x54>; -+ status = "disabled"; -+ }; -+ -+ ess-psgmii@98000 { -+ compatible = "qcom,ess-psgmii"; -+ reg = <0x98000 0x800>; -+ psgmii_access_mode = "local bus"; -+ status = "disabled"; -+ }; -+ - usb3_ss_phy: ssphy@9a000 { - compatible = "qca,uni-ssphy"; - reg = <0x9a000 0x800>; diff --git a/target/linux/ipq40xx/patches-4.9/710-net-add-qualcomm-essedma-ethernet-driver.patch b/target/linux/ipq40xx/patches-4.9/710-net-add-qualcomm-essedma-ethernet-driver.patch deleted file mode 100644 index eb84124b5..000000000 --- a/target/linux/ipq40xx/patches-4.9/710-net-add-qualcomm-essedma-ethernet-driver.patch +++ /dev/null @@ -1,4602 +0,0 @@ -From 12e9319da1adacac92930c899c99f0e1970cac11 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Thu, 19 Jan 2017 02:01:31 +0100 -Subject: [PATCH 33/38] NET: add qualcomm essedma ethernet driver - -Signed-off-by: Christian Lamparter ---- - drivers/net/ethernet/qualcomm/Kconfig | 9 +++++++++ - drivers/net/ethernet/qualcomm/Makefile | 1 + - 2 files changed, 10 insertions(+) - ---- a/drivers/net/ethernet/qualcomm/Kconfig -+++ b/drivers/net/ethernet/qualcomm/Kconfig -@@ -37,4 +37,13 @@ config QCOM_EMAC - low power, Receive-Side Scaling (RSS), and IEEE 1588-2008 - Precision Clock Synchronization Protocol. - -+config ESSEDMA -+ tristate "Qualcomm Atheros ESS Edma support" -+ ---help--- -+ This driver supports ethernet edma adapter. -+ Say Y to build this driver. -+ -+ To compile this driver as a module, choose M here. The module -+ will be called essedma.ko. -+ - endif # NET_VENDOR_QUALCOMM ---- a/drivers/net/ethernet/qualcomm/Makefile -+++ b/drivers/net/ethernet/qualcomm/Makefile -@@ -6,3 +6,4 @@ obj-$(CONFIG_QCA7000) += qcaspi.o - qcaspi-objs := qca_spi.o qca_framing.o qca_7k.o qca_debug.o - - obj-y += emac/ -+obj-$(CONFIG_ESSEDMA) += essedma/ ---- /dev/null -+++ b/drivers/net/ethernet/qualcomm/essedma/Makefile -@@ -0,0 +1,9 @@ -+# -+## Makefile for the Qualcomm Atheros ethernet edma driver -+# -+ -+ -+obj-$(CONFIG_ESSEDMA) += essedma.o -+ -+essedma-objs := edma_axi.o edma.o edma_ethtool.o -+ ---- /dev/null -+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c -@@ -0,0 +1,2168 @@ -+/* -+ * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#include -+#include -+#include "ess_edma.h" -+#include "edma.h" -+ -+extern struct net_device *edma_netdev[EDMA_MAX_PORTID_SUPPORTED]; -+bool edma_stp_rstp; -+u16 edma_ath_eth_type; -+ -+/* edma_skb_priority_offset() -+ * get edma skb priority -+ */ -+static unsigned int edma_skb_priority_offset(struct sk_buff *skb) -+{ -+ return (skb->priority >> 2) & 1; -+} -+ -+/* edma_alloc_tx_ring() -+ * Allocate Tx descriptors ring -+ */ -+static int edma_alloc_tx_ring(struct edma_common_info *edma_cinfo, -+ struct edma_tx_desc_ring *etdr) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ -+ /* Initialize ring */ -+ etdr->size = sizeof(struct edma_sw_desc) * etdr->count; -+ etdr->sw_next_to_fill = 0; -+ etdr->sw_next_to_clean = 0; -+ -+ /* Allocate SW descriptors */ -+ etdr->sw_desc = vzalloc(etdr->size); -+ if (!etdr->sw_desc) { -+ dev_err(&pdev->dev, "buffer alloc of tx ring failed=%p", etdr); -+ return -ENOMEM; -+ } -+ -+ /* Allocate HW descriptors */ -+ etdr->hw_desc = dma_alloc_coherent(&pdev->dev, etdr->size, &etdr->dma, -+ GFP_KERNEL); -+ if (!etdr->hw_desc) { -+ dev_err(&pdev->dev, "descriptor allocation for tx ring failed"); -+ vfree(etdr->sw_desc); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+/* edma_free_tx_ring() -+ * Free tx rings allocated by edma_alloc_tx_rings -+ */ -+static void edma_free_tx_ring(struct edma_common_info *edma_cinfo, -+ struct edma_tx_desc_ring *etdr) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ -+ if (likely(etdr->dma)) -+ dma_free_coherent(&pdev->dev, etdr->size, etdr->hw_desc, -+ etdr->dma); -+ -+ vfree(etdr->sw_desc); -+ etdr->sw_desc = NULL; -+} -+ -+/* edma_alloc_rx_ring() -+ * allocate rx descriptor ring -+ */ -+static int edma_alloc_rx_ring(struct edma_common_info *edma_cinfo, -+ struct edma_rfd_desc_ring *erxd) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ -+ erxd->size = sizeof(struct edma_sw_desc) * erxd->count; -+ erxd->sw_next_to_fill = 0; -+ erxd->sw_next_to_clean = 0; -+ -+ /* Allocate SW descriptors */ -+ erxd->sw_desc = vzalloc(erxd->size); -+ if (!erxd->sw_desc) -+ return -ENOMEM; -+ -+ /* Alloc HW descriptors */ -+ erxd->hw_desc = dma_alloc_coherent(&pdev->dev, erxd->size, &erxd->dma, -+ GFP_KERNEL); -+ if (!erxd->hw_desc) { -+ vfree(erxd->sw_desc); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+/* edma_free_rx_ring() -+ * Free rx ring allocated by alloc_rx_ring -+ */ -+static void edma_free_rx_ring(struct edma_common_info *edma_cinfo, -+ struct edma_rfd_desc_ring *rxdr) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ -+ if (likely(rxdr->dma)) -+ dma_free_coherent(&pdev->dev, rxdr->size, rxdr->hw_desc, -+ rxdr->dma); -+ -+ vfree(rxdr->sw_desc); -+ rxdr->sw_desc = NULL; -+} -+ -+/* edma_configure_tx() -+ * Configure transmission control data -+ */ -+static void edma_configure_tx(struct edma_common_info *edma_cinfo) -+{ -+ u32 txq_ctrl_data; -+ -+ txq_ctrl_data = (EDMA_TPD_BURST << EDMA_TXQ_NUM_TPD_BURST_SHIFT); -+ txq_ctrl_data |= EDMA_TXQ_CTRL_TPD_BURST_EN; -+ txq_ctrl_data |= (EDMA_TXF_BURST << EDMA_TXQ_TXF_BURST_NUM_SHIFT); -+ edma_write_reg(EDMA_REG_TXQ_CTRL, txq_ctrl_data); -+} -+ -+ -+/* edma_configure_rx() -+ * configure reception control data -+ */ -+static void edma_configure_rx(struct edma_common_info *edma_cinfo) -+{ -+ struct edma_hw *hw = &edma_cinfo->hw; -+ u32 rss_type, rx_desc1, rxq_ctrl_data; -+ -+ /* Set RSS type */ -+ rss_type = hw->rss_type; -+ edma_write_reg(EDMA_REG_RSS_TYPE, rss_type); -+ -+ /* Set RFD burst number */ -+ rx_desc1 = (EDMA_RFD_BURST << EDMA_RXQ_RFD_BURST_NUM_SHIFT); -+ -+ /* Set RFD prefetch threshold */ -+ rx_desc1 |= (EDMA_RFD_THR << EDMA_RXQ_RFD_PF_THRESH_SHIFT); -+ -+ /* Set RFD in host ring low threshold to generte interrupt */ -+ rx_desc1 |= (EDMA_RFD_LTHR << EDMA_RXQ_RFD_LOW_THRESH_SHIFT); -+ edma_write_reg(EDMA_REG_RX_DESC1, rx_desc1); -+ -+ /* Set Rx FIFO threshold to start to DMA data to host */ -+ rxq_ctrl_data = EDMA_FIFO_THRESH_128_BYTE; -+ -+ /* Set RX remove vlan bit */ -+ rxq_ctrl_data |= EDMA_RXQ_CTRL_RMV_VLAN; -+ -+ edma_write_reg(EDMA_REG_RXQ_CTRL, rxq_ctrl_data); -+} -+ -+/* edma_alloc_rx_buf() -+ * does skb allocation for the received packets. -+ */ -+static int edma_alloc_rx_buf(struct edma_common_info -+ *edma_cinfo, -+ struct edma_rfd_desc_ring *erdr, -+ int cleaned_count, int queue_id) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ struct edma_rx_free_desc *rx_desc; -+ struct edma_sw_desc *sw_desc; -+ struct sk_buff *skb; -+ unsigned int i; -+ u16 prod_idx, length; -+ u32 reg_data; -+ -+ if (cleaned_count > erdr->count) { -+ dev_err(&pdev->dev, "Incorrect cleaned_count %d", -+ cleaned_count); -+ return -1; -+ } -+ -+ i = erdr->sw_next_to_fill; -+ -+ while (cleaned_count) { -+ sw_desc = &erdr->sw_desc[i]; -+ length = edma_cinfo->rx_head_buffer_len; -+ -+ if (sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_REUSE) { -+ skb = sw_desc->skb; -+ } else { -+ /* alloc skb */ -+ skb = netdev_alloc_skb(edma_netdev[0], length); -+ if (!skb) { -+ /* Better luck next round */ -+ break; -+ } -+ } -+ -+ if (edma_cinfo->page_mode) { -+ struct page *pg = alloc_page(GFP_ATOMIC); -+ -+ if (!pg) { -+ dev_kfree_skb_any(skb); -+ break; -+ } -+ -+ sw_desc->dma = dma_map_page(&pdev->dev, pg, 0, -+ edma_cinfo->rx_page_buffer_len, -+ DMA_FROM_DEVICE); -+ if (dma_mapping_error(&pdev->dev, -+ sw_desc->dma)) { -+ __free_page(pg); -+ dev_kfree_skb_any(skb); -+ break; -+ } -+ -+ skb_fill_page_desc(skb, 0, pg, 0, -+ edma_cinfo->rx_page_buffer_len); -+ sw_desc->flags = EDMA_SW_DESC_FLAG_SKB_FRAG; -+ sw_desc->length = edma_cinfo->rx_page_buffer_len; -+ } else { -+ sw_desc->dma = dma_map_single(&pdev->dev, skb->data, -+ length, DMA_FROM_DEVICE); -+ if (dma_mapping_error(&pdev->dev, -+ sw_desc->dma)) { -+ dev_kfree_skb_any(skb); -+ break; -+ } -+ -+ sw_desc->flags = EDMA_SW_DESC_FLAG_SKB_HEAD; -+ sw_desc->length = length; -+ } -+ -+ /* Update the buffer info */ -+ sw_desc->skb = skb; -+ rx_desc = (&((struct edma_rx_free_desc *)(erdr->hw_desc))[i]); -+ rx_desc->buffer_addr = cpu_to_le64(sw_desc->dma); -+ if (++i == erdr->count) -+ i = 0; -+ cleaned_count--; -+ } -+ -+ erdr->sw_next_to_fill = i; -+ -+ if (i == 0) -+ prod_idx = erdr->count - 1; -+ else -+ prod_idx = i - 1; -+ -+ /* Update the producer index */ -+ edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), ®_data); -+ reg_data &= ~EDMA_RFD_PROD_IDX_BITS; -+ reg_data |= prod_idx; -+ edma_write_reg(EDMA_REG_RFD_IDX_Q(queue_id), reg_data); -+ return cleaned_count; -+} -+ -+/* edma_init_desc() -+ * update descriptor ring size, buffer and producer/consumer index -+ */ -+static void edma_init_desc(struct edma_common_info *edma_cinfo) -+{ -+ struct edma_rfd_desc_ring *rfd_ring; -+ struct edma_tx_desc_ring *etdr; -+ int i = 0, j = 0; -+ u32 data = 0; -+ u16 hw_cons_idx = 0; -+ -+ /* Set the base address of every TPD ring. */ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) { -+ etdr = edma_cinfo->tpd_ring[i]; -+ -+ /* Update descriptor ring base address */ -+ edma_write_reg(EDMA_REG_TPD_BASE_ADDR_Q(i), (u32)etdr->dma); -+ edma_read_reg(EDMA_REG_TPD_IDX_Q(i), &data); -+ -+ /* Calculate hardware consumer index */ -+ hw_cons_idx = (data >> EDMA_TPD_CONS_IDX_SHIFT) & 0xffff; -+ etdr->sw_next_to_fill = hw_cons_idx; -+ etdr->sw_next_to_clean = hw_cons_idx; -+ data &= ~(EDMA_TPD_PROD_IDX_MASK << EDMA_TPD_PROD_IDX_SHIFT); -+ data |= hw_cons_idx; -+ -+ /* update producer index */ -+ edma_write_reg(EDMA_REG_TPD_IDX_Q(i), data); -+ -+ /* update SW consumer index register */ -+ edma_write_reg(EDMA_REG_TX_SW_CONS_IDX_Q(i), hw_cons_idx); -+ -+ /* Set TPD ring size */ -+ edma_write_reg(EDMA_REG_TPD_RING_SIZE, -+ edma_cinfo->tx_ring_count & -+ EDMA_TPD_RING_SIZE_MASK); -+ } -+ -+ for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) { -+ rfd_ring = edma_cinfo->rfd_ring[j]; -+ /* Update Receive Free descriptor ring base address */ -+ edma_write_reg(EDMA_REG_RFD_BASE_ADDR_Q(j), -+ (u32)(rfd_ring->dma)); -+ j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ } -+ -+ data = edma_cinfo->rx_head_buffer_len; -+ if (edma_cinfo->page_mode) -+ data = edma_cinfo->rx_page_buffer_len; -+ -+ data &= EDMA_RX_BUF_SIZE_MASK; -+ data <<= EDMA_RX_BUF_SIZE_SHIFT; -+ -+ /* Update RFD ring size and RX buffer size */ -+ data |= (edma_cinfo->rx_ring_count & EDMA_RFD_RING_SIZE_MASK) -+ << EDMA_RFD_RING_SIZE_SHIFT; -+ -+ edma_write_reg(EDMA_REG_RX_DESC0, data); -+ -+ /* Disable TX FIFO low watermark and high watermark */ -+ edma_write_reg(EDMA_REG_TXF_WATER_MARK, 0); -+ -+ /* Load all of base address above */ -+ edma_read_reg(EDMA_REG_TX_SRAM_PART, &data); -+ data |= 1 << EDMA_LOAD_PTR_SHIFT; -+ edma_write_reg(EDMA_REG_TX_SRAM_PART, data); -+} -+ -+/* edma_receive_checksum -+ * Api to check checksum on receive packets -+ */ -+static void edma_receive_checksum(struct edma_rx_return_desc *rd, -+ struct sk_buff *skb) -+{ -+ skb_checksum_none_assert(skb); -+ -+ /* check the RRD IP/L4 checksum bit to see if -+ * its set, which in turn indicates checksum -+ * failure. -+ */ -+ if (rd->rrd6 & EDMA_RRD_CSUM_FAIL_MASK) -+ return; -+ -+ skb->ip_summed = CHECKSUM_UNNECESSARY; -+} -+ -+/* edma_clean_rfd() -+ * clean up rx resourcers on error -+ */ -+static void edma_clean_rfd(struct edma_rfd_desc_ring *erdr, u16 index) -+{ -+ struct edma_rx_free_desc *rx_desc; -+ struct edma_sw_desc *sw_desc; -+ -+ rx_desc = (&((struct edma_rx_free_desc *)(erdr->hw_desc))[index]); -+ sw_desc = &erdr->sw_desc[index]; -+ if (sw_desc->skb) { -+ dev_kfree_skb_any(sw_desc->skb); -+ sw_desc->skb = NULL; -+ } -+ -+ memset(rx_desc, 0, sizeof(struct edma_rx_free_desc)); -+} -+ -+/* edma_rx_complete_fraglist() -+ * Complete Rx processing for fraglist skbs -+ */ -+static void edma_rx_complete_stp_rstp(struct sk_buff *skb, int port_id, struct edma_rx_return_desc *rd) -+{ -+ int i; -+ u32 priority; -+ u16 port_type; -+ u8 mac_addr[EDMA_ETH_HDR_LEN]; -+ -+ port_type = (rd->rrd1 >> EDMA_RRD_PORT_TYPE_SHIFT) -+ & EDMA_RRD_PORT_TYPE_MASK; -+ /* if port type is 0x4, then only proceed with -+ * other stp/rstp calculation -+ */ -+ if (port_type == EDMA_RX_ATH_HDR_RSTP_PORT_TYPE) { -+ u8 bpdu_mac[6] = {0x01, 0x80, 0xc2, 0x00, 0x00, 0x00}; -+ -+ /* calculate the frame priority */ -+ priority = (rd->rrd1 >> EDMA_RRD_PRIORITY_SHIFT) -+ & EDMA_RRD_PRIORITY_MASK; -+ -+ for (i = 0; i < EDMA_ETH_HDR_LEN; i++) -+ mac_addr[i] = skb->data[i]; -+ -+ /* Check if destination mac addr is bpdu addr */ -+ if (!memcmp(mac_addr, bpdu_mac, 6)) { -+ /* destination mac address is BPDU -+ * destination mac address, then add -+ * atheros header to the packet. -+ */ -+ u16 athr_hdr = (EDMA_RX_ATH_HDR_VERSION << EDMA_RX_ATH_HDR_VERSION_SHIFT) | -+ (priority << EDMA_RX_ATH_HDR_PRIORITY_SHIFT) | -+ (EDMA_RX_ATH_HDR_RSTP_PORT_TYPE << EDMA_RX_ATH_PORT_TYPE_SHIFT) | port_id; -+ skb_push(skb, 4); -+ memcpy(skb->data, mac_addr, EDMA_ETH_HDR_LEN); -+ *(uint16_t *)&skb->data[12] = htons(edma_ath_eth_type); -+ *(uint16_t *)&skb->data[14] = htons(athr_hdr); -+ } -+ } -+} -+ -+/* -+ * edma_rx_complete_fraglist() -+ * Complete Rx processing for fraglist skbs -+ */ -+static int edma_rx_complete_fraglist(struct sk_buff *skb, u16 num_rfds, u16 length, u32 sw_next_to_clean, -+ u16 *cleaned_count, struct edma_rfd_desc_ring *erdr, struct edma_common_info *edma_cinfo) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ struct edma_hw *hw = &edma_cinfo->hw; -+ struct sk_buff *skb_temp; -+ struct edma_sw_desc *sw_desc; -+ int i; -+ u16 size_remaining; -+ -+ skb->data_len = 0; -+ skb->tail += (hw->rx_head_buff_size - 16); -+ skb->len = skb->truesize = length; -+ size_remaining = length - (hw->rx_head_buff_size - 16); -+ -+ /* clean-up all related sw_descs */ -+ for (i = 1; i < num_rfds; i++) { -+ struct sk_buff *skb_prev; -+ sw_desc = &erdr->sw_desc[sw_next_to_clean]; -+ skb_temp = sw_desc->skb; -+ -+ dma_unmap_single(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_FROM_DEVICE); -+ -+ if (size_remaining < hw->rx_head_buff_size) -+ skb_put(skb_temp, size_remaining); -+ else -+ skb_put(skb_temp, hw->rx_head_buff_size); -+ -+ /* -+ * If we are processing the first rfd, we link -+ * skb->frag_list to the skb corresponding to the -+ * first RFD -+ */ -+ if (i == 1) -+ skb_shinfo(skb)->frag_list = skb_temp; -+ else -+ skb_prev->next = skb_temp; -+ skb_prev = skb_temp; -+ skb_temp->next = NULL; -+ -+ skb->data_len += skb_temp->len; -+ size_remaining -= skb_temp->len; -+ -+ /* Increment SW index */ -+ sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1); -+ (*cleaned_count)++; -+ } -+ -+ return sw_next_to_clean; -+} -+ -+/* edma_rx_complete_paged() -+ * Complete Rx processing for paged skbs -+ */ -+static int edma_rx_complete_paged(struct sk_buff *skb, u16 num_rfds, u16 length, u32 sw_next_to_clean, -+ u16 *cleaned_count, struct edma_rfd_desc_ring *erdr, struct edma_common_info *edma_cinfo) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ struct sk_buff *skb_temp; -+ struct edma_sw_desc *sw_desc; -+ int i; -+ u16 size_remaining; -+ -+ skb_frag_t *frag = &skb_shinfo(skb)->frags[0]; -+ -+ /* Setup skbuff fields */ -+ skb->len = length; -+ -+ if (likely(num_rfds <= 1)) { -+ skb->data_len = length; -+ skb->truesize += edma_cinfo->rx_page_buffer_len; -+ skb_fill_page_desc(skb, 0, skb_frag_page(frag), -+ 16, length); -+ } else { -+ frag->size -= 16; -+ skb->data_len = frag->size; -+ skb->truesize += edma_cinfo->rx_page_buffer_len; -+ size_remaining = length - frag->size; -+ -+ skb_fill_page_desc(skb, 0, skb_frag_page(frag), -+ 16, frag->size); -+ -+ /* clean-up all related sw_descs */ -+ for (i = 1; i < num_rfds; i++) { -+ sw_desc = &erdr->sw_desc[sw_next_to_clean]; -+ skb_temp = sw_desc->skb; -+ frag = &skb_shinfo(skb_temp)->frags[0]; -+ dma_unmap_page(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_FROM_DEVICE); -+ -+ if (size_remaining < edma_cinfo->rx_page_buffer_len) -+ frag->size = size_remaining; -+ -+ skb_fill_page_desc(skb, i, skb_frag_page(frag), -+ 0, frag->size); -+ -+ skb_shinfo(skb_temp)->nr_frags = 0; -+ dev_kfree_skb_any(skb_temp); -+ -+ skb->data_len += frag->size; -+ skb->truesize += edma_cinfo->rx_page_buffer_len; -+ size_remaining -= frag->size; -+ -+ /* Increment SW index */ -+ sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1); -+ (*cleaned_count)++; -+ } -+ } -+ -+ return sw_next_to_clean; -+} -+ -+/* -+ * edma_rx_complete() -+ * Main api called from the poll function to process rx packets. -+ */ -+static void edma_rx_complete(struct edma_common_info *edma_cinfo, -+ int *work_done, int work_to_do, int queue_id, -+ struct napi_struct *napi) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ struct edma_rfd_desc_ring *erdr = edma_cinfo->rfd_ring[queue_id]; -+ struct net_device *netdev; -+ struct edma_adapter *adapter; -+ struct edma_sw_desc *sw_desc; -+ struct sk_buff *skb; -+ struct edma_rx_return_desc *rd; -+ u16 hash_type, rrd[8], cleaned_count = 0, length = 0, num_rfds = 1, -+ sw_next_to_clean, hw_next_to_clean = 0, vlan = 0, ret_count = 0; -+ u32 data = 0; -+ u8 *vaddr; -+ int port_id, i, drop_count = 0; -+ u32 priority; -+ u16 count = erdr->count, rfd_avail; -+ u8 queue_to_rxid[8] = {0, 0, 1, 1, 2, 2, 3, 3}; -+ -+ sw_next_to_clean = erdr->sw_next_to_clean; -+ -+ edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), &data); -+ hw_next_to_clean = (data >> EDMA_RFD_CONS_IDX_SHIFT) & -+ EDMA_RFD_CONS_IDX_MASK; -+ -+ do { -+ while (sw_next_to_clean != hw_next_to_clean) { -+ if (!work_to_do) -+ break; -+ -+ sw_desc = &erdr->sw_desc[sw_next_to_clean]; -+ skb = sw_desc->skb; -+ -+ /* Unmap the allocated buffer */ -+ if (likely(sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_HEAD)) -+ dma_unmap_single(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_FROM_DEVICE); -+ else -+ dma_unmap_page(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_FROM_DEVICE); -+ -+ /* Get RRD */ -+ if (edma_cinfo->page_mode) { -+ vaddr = kmap_atomic(skb_frag_page(&skb_shinfo(skb)->frags[0])); -+ memcpy((uint8_t *)&rrd[0], vaddr, 16); -+ rd = (struct edma_rx_return_desc *)rrd; -+ kunmap_atomic(vaddr); -+ } else { -+ rd = (struct edma_rx_return_desc *)skb->data; -+ } -+ -+ /* Check if RRD is valid */ -+ if (!(rd->rrd7 & EDMA_RRD_DESC_VALID)) { -+ edma_clean_rfd(erdr, sw_next_to_clean); -+ sw_next_to_clean = (sw_next_to_clean + 1) & -+ (erdr->count - 1); -+ cleaned_count++; -+ continue; -+ } -+ -+ /* Get the number of RFDs from RRD */ -+ num_rfds = rd->rrd1 & EDMA_RRD_NUM_RFD_MASK; -+ -+ /* Get Rx port ID from switch */ -+ port_id = (rd->rrd1 >> EDMA_PORT_ID_SHIFT) & EDMA_PORT_ID_MASK; -+ if ((!port_id) || (port_id > EDMA_MAX_PORTID_SUPPORTED)) { -+ dev_err(&pdev->dev, "Invalid RRD source port bit set"); -+ for (i = 0; i < num_rfds; i++) { -+ edma_clean_rfd(erdr, sw_next_to_clean); -+ sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1); -+ cleaned_count++; -+ } -+ continue; -+ } -+ -+ /* check if we have a sink for the data we receive. -+ * If the interface isn't setup, we have to drop the -+ * incoming data for now. -+ */ -+ netdev = edma_cinfo->portid_netdev_lookup_tbl[port_id]; -+ if (!netdev) { -+ edma_clean_rfd(erdr, sw_next_to_clean); -+ sw_next_to_clean = (sw_next_to_clean + 1) & -+ (erdr->count - 1); -+ cleaned_count++; -+ continue; -+ } -+ adapter = netdev_priv(netdev); -+ -+ /* This code is added to handle a usecase where high -+ * priority stream and a low priority stream are -+ * received simultaneously on DUT. The problem occurs -+ * if one of the Rx rings is full and the corresponding -+ * core is busy with other stuff. This causes ESS CPU -+ * port to backpressure all incoming traffic including -+ * high priority one. We monitor free descriptor count -+ * on each CPU and whenever it reaches threshold (< 80), -+ * we drop all low priority traffic and let only high -+ * priotiy traffic pass through. We can hence avoid -+ * ESS CPU port to send backpressure on high priroity -+ * stream. -+ */ -+ priority = (rd->rrd1 >> EDMA_RRD_PRIORITY_SHIFT) -+ & EDMA_RRD_PRIORITY_MASK; -+ if (likely(!priority && !edma_cinfo->page_mode && (num_rfds <= 1))) { -+ rfd_avail = (count + sw_next_to_clean - hw_next_to_clean - 1) & (count - 1); -+ if (rfd_avail < EDMA_RFD_AVAIL_THR) { -+ sw_desc->flags = EDMA_SW_DESC_FLAG_SKB_REUSE; -+ sw_next_to_clean = (sw_next_to_clean + 1) & (erdr->count - 1); -+ adapter->stats.rx_dropped++; -+ cleaned_count++; -+ drop_count++; -+ if (drop_count == 3) { -+ work_to_do--; -+ (*work_done)++; -+ drop_count = 0; -+ } -+ if (cleaned_count == EDMA_RX_BUFFER_WRITE) { -+ /* If buffer clean count reaches 16, we replenish HW buffers. */ -+ ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id); -+ edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id), -+ sw_next_to_clean); -+ cleaned_count = ret_count; -+ } -+ continue; -+ } -+ } -+ -+ work_to_do--; -+ (*work_done)++; -+ -+ /* Increment SW index */ -+ sw_next_to_clean = (sw_next_to_clean + 1) & -+ (erdr->count - 1); -+ -+ cleaned_count++; -+ -+ /* Get the packet size and allocate buffer */ -+ length = rd->rrd6 & EDMA_RRD_PKT_SIZE_MASK; -+ -+ if (edma_cinfo->page_mode) { -+ /* paged skb */ -+ sw_next_to_clean = edma_rx_complete_paged(skb, num_rfds, length, sw_next_to_clean, &cleaned_count, erdr, edma_cinfo); -+ if (!pskb_may_pull(skb, ETH_HLEN)) { -+ dev_kfree_skb_any(skb); -+ continue; -+ } -+ } else { -+ /* single or fraglist skb */ -+ -+ /* Addition of 16 bytes is required, as in the packet -+ * first 16 bytes are rrd descriptors, so actual data -+ * starts from an offset of 16. -+ */ -+ skb_reserve(skb, 16); -+ if (likely((num_rfds <= 1) || !edma_cinfo->fraglist_mode)) { -+ skb_put(skb, length); -+ } else { -+ sw_next_to_clean = edma_rx_complete_fraglist(skb, num_rfds, length, sw_next_to_clean, &cleaned_count, erdr, edma_cinfo); -+ } -+ } -+ -+ if (edma_stp_rstp) { -+ edma_rx_complete_stp_rstp(skb, port_id, rd); -+ } -+ -+ skb->protocol = eth_type_trans(skb, netdev); -+ -+ /* Record Rx queue for RFS/RPS and fill flow hash from HW */ -+ skb_record_rx_queue(skb, queue_to_rxid[queue_id]); -+ if (netdev->features & NETIF_F_RXHASH) { -+ hash_type = (rd->rrd5 >> EDMA_HASH_TYPE_SHIFT); -+ if ((hash_type > EDMA_HASH_TYPE_START) && (hash_type < EDMA_HASH_TYPE_END)) -+ skb_set_hash(skb, rd->rrd2, PKT_HASH_TYPE_L4); -+ } -+ -+#ifdef CONFIG_NF_FLOW_COOKIE -+ skb->flow_cookie = rd->rrd3 & EDMA_RRD_FLOW_COOKIE_MASK; -+#endif -+ edma_receive_checksum(rd, skb); -+ -+ /* Process VLAN HW acceleration indication provided by HW */ -+ if (unlikely(adapter->default_vlan_tag != rd->rrd4)) { -+ vlan = rd->rrd4; -+ if (likely(rd->rrd7 & EDMA_RRD_CVLAN)) -+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); -+ else if (rd->rrd1 & EDMA_RRD_SVLAN) -+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan); -+ } -+ -+ /* Update rx statistics */ -+ adapter->stats.rx_packets++; -+ adapter->stats.rx_bytes += length; -+ -+ /* Check if we reached refill threshold */ -+ if (cleaned_count == EDMA_RX_BUFFER_WRITE) { -+ ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id); -+ edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id), -+ sw_next_to_clean); -+ cleaned_count = ret_count; -+ } -+ -+ /* At this point skb should go to stack */ -+ napi_gro_receive(napi, skb); -+ } -+ -+ /* Check if we still have NAPI budget */ -+ if (!work_to_do) -+ break; -+ -+ /* Read index once again since we still have NAPI budget */ -+ edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), &data); -+ hw_next_to_clean = (data >> EDMA_RFD_CONS_IDX_SHIFT) & -+ EDMA_RFD_CONS_IDX_MASK; -+ } while (hw_next_to_clean != sw_next_to_clean); -+ -+ erdr->sw_next_to_clean = sw_next_to_clean; -+ -+ /* Refill here in case refill threshold wasn't reached */ -+ if (likely(cleaned_count)) { -+ ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id); -+ if (ret_count) -+ dev_dbg(&pdev->dev, "Not all buffers was reallocated"); -+ edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id), -+ erdr->sw_next_to_clean); -+ } -+} -+ -+/* edma_delete_rfs_filter() -+ * Remove RFS filter from switch -+ */ -+static int edma_delete_rfs_filter(struct edma_adapter *adapter, -+ struct edma_rfs_filter_node *filter_node) -+{ -+ int res = -1; -+ -+ struct flow_keys *keys = &filter_node->keys; -+ -+ if (likely(adapter->set_rfs_rule)) -+ res = (*adapter->set_rfs_rule)(adapter->netdev, -+ flow_get_u32_src(keys), flow_get_u32_dst(keys), -+ keys->ports.src, keys->ports.dst, -+ keys->basic.ip_proto, filter_node->rq_id, 0); -+ -+ return res; -+} -+ -+/* edma_add_rfs_filter() -+ * Add RFS filter to switch -+ */ -+static int edma_add_rfs_filter(struct edma_adapter *adapter, -+ struct flow_keys *keys, u16 rq, -+ struct edma_rfs_filter_node *filter_node) -+{ -+ int res = -1; -+ -+ struct flow_keys *dest_keys = &filter_node->keys; -+ -+ memcpy(dest_keys, &filter_node->keys, sizeof(*dest_keys)); -+/* -+ dest_keys->control = keys->control; -+ dest_keys->basic = keys->basic; -+ dest_keys->addrs = keys->addrs; -+ dest_keys->ports = keys->ports; -+ dest_keys.ip_proto = keys->ip_proto; -+*/ -+ /* Call callback registered by ESS driver */ -+ if (likely(adapter->set_rfs_rule)) -+ res = (*adapter->set_rfs_rule)(adapter->netdev, flow_get_u32_src(keys), -+ flow_get_u32_dst(keys), keys->ports.src, keys->ports.dst, -+ keys->basic.ip_proto, rq, 1); -+ -+ return res; -+} -+ -+/* edma_rfs_key_search() -+ * Look for existing RFS entry -+ */ -+static struct edma_rfs_filter_node *edma_rfs_key_search(struct hlist_head *h, -+ struct flow_keys *key) -+{ -+ struct edma_rfs_filter_node *p; -+ -+ hlist_for_each_entry(p, h, node) -+ if (flow_get_u32_src(&p->keys) == flow_get_u32_src(key) && -+ flow_get_u32_dst(&p->keys) == flow_get_u32_dst(key) && -+ p->keys.ports.src == key->ports.src && -+ p->keys.ports.dst == key->ports.dst && -+ p->keys.basic.ip_proto == key->basic.ip_proto) -+ return p; -+ return NULL; -+} -+ -+/* edma_initialise_rfs_flow_table() -+ * Initialise EDMA RFS flow table -+ */ -+static void edma_initialise_rfs_flow_table(struct edma_adapter *adapter) -+{ -+ int i; -+ -+ spin_lock_init(&adapter->rfs.rfs_ftab_lock); -+ -+ /* Initialize EDMA flow hash table */ -+ for (i = 0; i < EDMA_RFS_FLOW_ENTRIES; i++) -+ INIT_HLIST_HEAD(&adapter->rfs.hlist_head[i]); -+ -+ adapter->rfs.max_num_filter = EDMA_RFS_FLOW_ENTRIES; -+ adapter->rfs.filter_available = adapter->rfs.max_num_filter; -+ adapter->rfs.hashtoclean = 0; -+ -+ /* Add timer to get periodic RFS updates from OS */ -+ init_timer(&adapter->rfs.expire_rfs); -+ adapter->rfs.expire_rfs.function = edma_flow_may_expire; -+ adapter->rfs.expire_rfs.data = (unsigned long)adapter; -+ mod_timer(&adapter->rfs.expire_rfs, jiffies + HZ / 4); -+} -+ -+/* edma_free_rfs_flow_table() -+ * Free EDMA RFS flow table -+ */ -+static void edma_free_rfs_flow_table(struct edma_adapter *adapter) -+{ -+ int i; -+ -+ /* Remove sync timer */ -+ del_timer_sync(&adapter->rfs.expire_rfs); -+ spin_lock_bh(&adapter->rfs.rfs_ftab_lock); -+ -+ /* Free EDMA RFS table entries */ -+ adapter->rfs.filter_available = 0; -+ -+ /* Clean-up EDMA flow hash table */ -+ for (i = 0; i < EDMA_RFS_FLOW_ENTRIES; i++) { -+ struct hlist_head *hhead; -+ struct hlist_node *tmp; -+ struct edma_rfs_filter_node *filter_node; -+ int res; -+ -+ hhead = &adapter->rfs.hlist_head[i]; -+ hlist_for_each_entry_safe(filter_node, tmp, hhead, node) { -+ res = edma_delete_rfs_filter(adapter, filter_node); -+ if (res < 0) -+ dev_warn(&adapter->netdev->dev, -+ "EDMA going down but RFS entry %d not allowed to be flushed by Switch", -+ filter_node->flow_id); -+ hlist_del(&filter_node->node); -+ kfree(filter_node); -+ } -+ } -+ spin_unlock_bh(&adapter->rfs.rfs_ftab_lock); -+} -+ -+/* edma_tx_unmap_and_free() -+ * clean TX buffer -+ */ -+static inline void edma_tx_unmap_and_free(struct platform_device *pdev, -+ struct edma_sw_desc *sw_desc) -+{ -+ struct sk_buff *skb = sw_desc->skb; -+ -+ if (likely((sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_HEAD) || -+ (sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_FRAGLIST))) -+ /* unmap_single for skb head area */ -+ dma_unmap_single(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_TO_DEVICE); -+ else if (sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_FRAG) -+ /* unmap page for paged fragments */ -+ dma_unmap_page(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_TO_DEVICE); -+ -+ if (likely(sw_desc->flags & EDMA_SW_DESC_FLAG_LAST)) -+ dev_kfree_skb_any(skb); -+ -+ sw_desc->flags = 0; -+} -+ -+/* edma_tx_complete() -+ * Used to clean tx queues and update hardware and consumer index -+ */ -+static void edma_tx_complete(struct edma_common_info *edma_cinfo, int queue_id) -+{ -+ struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id]; -+ struct edma_sw_desc *sw_desc; -+ struct platform_device *pdev = edma_cinfo->pdev; -+ int i; -+ -+ u16 sw_next_to_clean = etdr->sw_next_to_clean; -+ u16 hw_next_to_clean; -+ u32 data = 0; -+ -+ edma_read_reg(EDMA_REG_TPD_IDX_Q(queue_id), &data); -+ hw_next_to_clean = (data >> EDMA_TPD_CONS_IDX_SHIFT) & EDMA_TPD_CONS_IDX_MASK; -+ -+ /* clean the buffer here */ -+ while (sw_next_to_clean != hw_next_to_clean) { -+ sw_desc = &etdr->sw_desc[sw_next_to_clean]; -+ edma_tx_unmap_and_free(pdev, sw_desc); -+ sw_next_to_clean = (sw_next_to_clean + 1) & (etdr->count - 1); -+ } -+ -+ etdr->sw_next_to_clean = sw_next_to_clean; -+ -+ /* update the TPD consumer index register */ -+ edma_write_reg(EDMA_REG_TX_SW_CONS_IDX_Q(queue_id), sw_next_to_clean); -+ -+ /* Wake the queue if queue is stopped and netdev link is up */ -+ for (i = 0; i < EDMA_MAX_NETDEV_PER_QUEUE && etdr->nq[i] ; i++) { -+ if (netif_tx_queue_stopped(etdr->nq[i])) { -+ if ((etdr->netdev[i]) && netif_carrier_ok(etdr->netdev[i])) -+ netif_tx_wake_queue(etdr->nq[i]); -+ } -+ } -+} -+ -+/* edma_get_tx_buffer() -+ * Get sw_desc corresponding to the TPD -+ */ -+static struct edma_sw_desc *edma_get_tx_buffer(struct edma_common_info *edma_cinfo, -+ struct edma_tx_desc *tpd, int queue_id) -+{ -+ struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id]; -+ return &etdr->sw_desc[tpd - (struct edma_tx_desc *)etdr->hw_desc]; -+} -+ -+/* edma_get_next_tpd() -+ * Return a TPD descriptor for transfer -+ */ -+static struct edma_tx_desc *edma_get_next_tpd(struct edma_common_info *edma_cinfo, -+ int queue_id) -+{ -+ struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id]; -+ u16 sw_next_to_fill = etdr->sw_next_to_fill; -+ struct edma_tx_desc *tpd_desc = -+ (&((struct edma_tx_desc *)(etdr->hw_desc))[sw_next_to_fill]); -+ -+ etdr->sw_next_to_fill = (etdr->sw_next_to_fill + 1) & (etdr->count - 1); -+ -+ return tpd_desc; -+} -+ -+/* edma_tpd_available() -+ * Check number of free TPDs -+ */ -+static inline u16 edma_tpd_available(struct edma_common_info *edma_cinfo, -+ int queue_id) -+{ -+ struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id]; -+ -+ u16 sw_next_to_fill; -+ u16 sw_next_to_clean; -+ u16 count = 0; -+ -+ sw_next_to_clean = etdr->sw_next_to_clean; -+ sw_next_to_fill = etdr->sw_next_to_fill; -+ -+ if (likely(sw_next_to_clean <= sw_next_to_fill)) -+ count = etdr->count; -+ -+ return count + sw_next_to_clean - sw_next_to_fill - 1; -+} -+ -+/* edma_tx_queue_get() -+ * Get the starting number of the queue -+ */ -+static inline int edma_tx_queue_get(struct edma_adapter *adapter, -+ struct sk_buff *skb, int txq_id) -+{ -+ /* skb->priority is used as an index to skb priority table -+ * and based on packet priority, correspong queue is assigned. -+ */ -+ return adapter->tx_start_offset[txq_id] + edma_skb_priority_offset(skb); -+} -+ -+/* edma_tx_update_hw_idx() -+ * update the producer index for the ring transmitted -+ */ -+static void edma_tx_update_hw_idx(struct edma_common_info *edma_cinfo, -+ struct sk_buff *skb, int queue_id) -+{ -+ struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[queue_id]; -+ u32 tpd_idx_data; -+ -+ /* Read and update the producer index */ -+ edma_read_reg(EDMA_REG_TPD_IDX_Q(queue_id), &tpd_idx_data); -+ tpd_idx_data &= ~EDMA_TPD_PROD_IDX_BITS; -+ tpd_idx_data |= (etdr->sw_next_to_fill & EDMA_TPD_PROD_IDX_MASK) -+ << EDMA_TPD_PROD_IDX_SHIFT; -+ -+ edma_write_reg(EDMA_REG_TPD_IDX_Q(queue_id), tpd_idx_data); -+} -+ -+/* edma_rollback_tx() -+ * Function to retrieve tx resources in case of error -+ */ -+static void edma_rollback_tx(struct edma_adapter *adapter, -+ struct edma_tx_desc *start_tpd, int queue_id) -+{ -+ struct edma_tx_desc_ring *etdr = adapter->edma_cinfo->tpd_ring[queue_id]; -+ struct edma_sw_desc *sw_desc; -+ struct edma_tx_desc *tpd = NULL; -+ u16 start_index, index; -+ -+ start_index = start_tpd - (struct edma_tx_desc *)(etdr->hw_desc); -+ -+ index = start_index; -+ while (index != etdr->sw_next_to_fill) { -+ tpd = (&((struct edma_tx_desc *)(etdr->hw_desc))[index]); -+ sw_desc = &etdr->sw_desc[index]; -+ edma_tx_unmap_and_free(adapter->pdev, sw_desc); -+ memset(tpd, 0, sizeof(struct edma_tx_desc)); -+ if (++index == etdr->count) -+ index = 0; -+ } -+ etdr->sw_next_to_fill = start_index; -+} -+ -+/* edma_tx_map_and_fill() -+ * gets called from edma_xmit_frame -+ * -+ * This is where the dma of the buffer to be transmitted -+ * gets mapped -+ */ -+static int edma_tx_map_and_fill(struct edma_common_info *edma_cinfo, -+ struct edma_adapter *adapter, struct sk_buff *skb, int queue_id, -+ unsigned int flags_transmit, u16 from_cpu, u16 dp_bitmap, -+ bool packet_is_rstp, int nr_frags) -+{ -+ struct edma_sw_desc *sw_desc = NULL; -+ struct platform_device *pdev = edma_cinfo->pdev; -+ struct edma_tx_desc *tpd = NULL, *start_tpd = NULL; -+ struct sk_buff *iter_skb; -+ int i = 0; -+ u32 word1 = 0, word3 = 0, lso_word1 = 0, svlan_tag = 0; -+ u16 buf_len, lso_desc_len = 0; -+ -+ /* It should either be a nr_frags skb or fraglist skb but not both */ -+ BUG_ON(nr_frags && skb_has_frag_list(skb)); -+ -+ if (skb_is_gso(skb)) { -+ /* TODO: What additional checks need to be performed here */ -+ if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) { -+ lso_word1 |= EDMA_TPD_IPV4_EN; -+ ip_hdr(skb)->check = 0; -+ tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr, -+ ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); -+ } else if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6) { -+ lso_word1 |= EDMA_TPD_LSO_V2_EN; -+ ipv6_hdr(skb)->payload_len = 0; -+ tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, -+ &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0); -+ } else -+ return -EINVAL; -+ -+ lso_word1 |= EDMA_TPD_LSO_EN | ((skb_shinfo(skb)->gso_size & EDMA_TPD_MSS_MASK) << EDMA_TPD_MSS_SHIFT) | -+ (skb_transport_offset(skb) << EDMA_TPD_HDR_SHIFT); -+ } else if (flags_transmit & EDMA_HW_CHECKSUM) { -+ u8 css, cso; -+ cso = skb_checksum_start_offset(skb); -+ css = cso + skb->csum_offset; -+ -+ word1 |= (EDMA_TPD_CUSTOM_CSUM_EN); -+ word1 |= (cso >> 1) << EDMA_TPD_HDR_SHIFT; -+ word1 |= ((css >> 1) << EDMA_TPD_CUSTOM_CSUM_SHIFT); -+ } -+ -+ if (skb->protocol == htons(ETH_P_PPP_SES)) -+ word1 |= EDMA_TPD_PPPOE_EN; -+ -+ if (flags_transmit & EDMA_VLAN_TX_TAG_INSERT_FLAG) { -+ switch(skb->vlan_proto) { -+ case htons(ETH_P_8021Q): -+ word3 |= (1 << EDMA_TX_INS_CVLAN); -+ word3 |= skb_vlan_tag_get(skb) << EDMA_TX_CVLAN_TAG_SHIFT; -+ break; -+ case htons(ETH_P_8021AD): -+ word1 |= (1 << EDMA_TX_INS_SVLAN); -+ svlan_tag = skb_vlan_tag_get(skb) << EDMA_TX_SVLAN_TAG_SHIFT; -+ break; -+ default: -+ dev_err(&pdev->dev, "no ctag or stag present\n"); -+ goto vlan_tag_error; -+ } -+ } else if (flags_transmit & EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG) { -+ word3 |= (1 << EDMA_TX_INS_CVLAN); -+ word3 |= (adapter->default_vlan_tag) << EDMA_TX_CVLAN_TAG_SHIFT; -+ } -+ -+ if (packet_is_rstp) { -+ word3 |= dp_bitmap << EDMA_TPD_PORT_BITMAP_SHIFT; -+ word3 |= from_cpu << EDMA_TPD_FROM_CPU_SHIFT; -+ } else { -+ word3 |= adapter->dp_bitmap << EDMA_TPD_PORT_BITMAP_SHIFT; -+ } -+ -+ buf_len = skb_headlen(skb); -+ -+ if (lso_word1) { -+ if (lso_word1 & EDMA_TPD_LSO_V2_EN) { -+ -+ /* IPv6 LSOv2 descriptor */ -+ start_tpd = tpd = edma_get_next_tpd(edma_cinfo, queue_id); -+ sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id); -+ sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_NONE; -+ -+ /* LSOv2 descriptor overrides addr field to pass length */ -+ tpd->addr = cpu_to_le16(skb->len); -+ tpd->svlan_tag = svlan_tag; -+ tpd->word1 = word1 | lso_word1; -+ tpd->word3 = word3; -+ } -+ -+ tpd = edma_get_next_tpd(edma_cinfo, queue_id); -+ if (!start_tpd) -+ start_tpd = tpd; -+ sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id); -+ -+ /* The last buffer info contain the skb address, -+ * so skb will be freed after unmap -+ */ -+ sw_desc->length = lso_desc_len; -+ sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_HEAD; -+ -+ sw_desc->dma = dma_map_single(&adapter->pdev->dev, -+ skb->data, buf_len, DMA_TO_DEVICE); -+ if (dma_mapping_error(&pdev->dev, sw_desc->dma)) -+ goto dma_error; -+ -+ tpd->addr = cpu_to_le32(sw_desc->dma); -+ tpd->len = cpu_to_le16(buf_len); -+ -+ tpd->svlan_tag = svlan_tag; -+ tpd->word1 = word1 | lso_word1; -+ tpd->word3 = word3; -+ -+ /* The last buffer info contain the skb address, -+ * so it will be freed after unmap -+ */ -+ sw_desc->length = lso_desc_len; -+ sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_HEAD; -+ -+ buf_len = 0; -+ } -+ -+ if (likely(buf_len)) { -+ -+ /* TODO Do not dequeue descriptor if there is a potential error */ -+ tpd = edma_get_next_tpd(edma_cinfo, queue_id); -+ -+ if (!start_tpd) -+ start_tpd = tpd; -+ -+ sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id); -+ -+ /* The last buffer info contain the skb address, -+ * so it will be free after unmap -+ */ -+ sw_desc->length = buf_len; -+ sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_HEAD; -+ sw_desc->dma = dma_map_single(&adapter->pdev->dev, -+ skb->data, buf_len, DMA_TO_DEVICE); -+ if (dma_mapping_error(&pdev->dev, sw_desc->dma)) -+ goto dma_error; -+ -+ tpd->addr = cpu_to_le32(sw_desc->dma); -+ tpd->len = cpu_to_le16(buf_len); -+ -+ tpd->svlan_tag = svlan_tag; -+ tpd->word1 = word1 | lso_word1; -+ tpd->word3 = word3; -+ } -+ -+ /* Walk through all paged fragments */ -+ while (nr_frags--) { -+ skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; -+ buf_len = skb_frag_size(frag); -+ tpd = edma_get_next_tpd(edma_cinfo, queue_id); -+ sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id); -+ sw_desc->length = buf_len; -+ sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_FRAG; -+ -+ sw_desc->dma = skb_frag_dma_map(&pdev->dev, frag, 0, buf_len, DMA_TO_DEVICE); -+ -+ if (dma_mapping_error(NULL, sw_desc->dma)) -+ goto dma_error; -+ -+ tpd->addr = cpu_to_le32(sw_desc->dma); -+ tpd->len = cpu_to_le16(buf_len); -+ -+ tpd->svlan_tag = svlan_tag; -+ tpd->word1 = word1 | lso_word1; -+ tpd->word3 = word3; -+ i++; -+ } -+ -+ /* Walk through all fraglist skbs */ -+ skb_walk_frags(skb, iter_skb) { -+ buf_len = iter_skb->len; -+ tpd = edma_get_next_tpd(edma_cinfo, queue_id); -+ sw_desc = edma_get_tx_buffer(edma_cinfo, tpd, queue_id); -+ sw_desc->length = buf_len; -+ sw_desc->dma = dma_map_single(&adapter->pdev->dev, -+ iter_skb->data, buf_len, DMA_TO_DEVICE); -+ -+ if (dma_mapping_error(NULL, sw_desc->dma)) -+ goto dma_error; -+ -+ tpd->addr = cpu_to_le32(sw_desc->dma); -+ tpd->len = cpu_to_le16(buf_len); -+ tpd->svlan_tag = svlan_tag; -+ tpd->word1 = word1 | lso_word1; -+ tpd->word3 = word3; -+ sw_desc->flags |= EDMA_SW_DESC_FLAG_SKB_FRAGLIST; -+ } -+ -+ if (tpd) -+ tpd->word1 |= 1 << EDMA_TPD_EOP_SHIFT; -+ -+ sw_desc->skb = skb; -+ sw_desc->flags |= EDMA_SW_DESC_FLAG_LAST; -+ -+ return 0; -+ -+dma_error: -+ edma_rollback_tx(adapter, start_tpd, queue_id); -+ dev_err(&pdev->dev, "TX DMA map failed\n"); -+vlan_tag_error: -+ return -ENOMEM; -+} -+ -+/* edma_check_link() -+ * check Link status -+ */ -+static int edma_check_link(struct edma_adapter *adapter) -+{ -+ struct phy_device *phydev = adapter->phydev; -+ -+ if (!(adapter->poll_required)) -+ return __EDMA_LINKUP; -+ -+ if (phydev->link) -+ return __EDMA_LINKUP; -+ -+ return __EDMA_LINKDOWN; -+} -+ -+/* edma_adjust_link() -+ * check for edma link status -+ */ -+void edma_adjust_link(struct net_device *netdev) -+{ -+ int status; -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ struct phy_device *phydev = adapter->phydev; -+ -+ if (!test_bit(__EDMA_UP, &adapter->state_flags)) -+ return; -+ -+ status = edma_check_link(adapter); -+ -+ if (status == __EDMA_LINKUP && adapter->link_state == __EDMA_LINKDOWN) { -+ dev_info(&adapter->pdev->dev, "%s: GMAC Link is up with phy_speed=%d\n", netdev->name, phydev->speed); -+ adapter->link_state = __EDMA_LINKUP; -+ netif_carrier_on(netdev); -+ if (netif_running(netdev)) -+ netif_tx_wake_all_queues(netdev); -+ } else if (status == __EDMA_LINKDOWN && adapter->link_state == __EDMA_LINKUP) { -+ dev_info(&adapter->pdev->dev, "%s: GMAC Link is down\n", netdev->name); -+ adapter->link_state = __EDMA_LINKDOWN; -+ netif_carrier_off(netdev); -+ netif_tx_stop_all_queues(netdev); -+ } -+} -+ -+/* edma_get_stats() -+ * Statistics api used to retreive the tx/rx statistics -+ */ -+struct net_device_stats *edma_get_stats(struct net_device *netdev) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ -+ return &adapter->stats; -+} -+ -+/* edma_xmit() -+ * Main api to be called by the core for packet transmission -+ */ -+netdev_tx_t edma_xmit(struct sk_buff *skb, -+ struct net_device *net_dev) -+{ -+ struct edma_adapter *adapter = netdev_priv(net_dev); -+ struct edma_common_info *edma_cinfo = adapter->edma_cinfo; -+ struct edma_tx_desc_ring *etdr; -+ u16 from_cpu, dp_bitmap, txq_id; -+ int ret, nr_frags = 0, num_tpds_needed = 1, queue_id; -+ unsigned int flags_transmit = 0; -+ bool packet_is_rstp = false; -+ struct netdev_queue *nq = NULL; -+ -+ if (skb_shinfo(skb)->nr_frags) { -+ nr_frags = skb_shinfo(skb)->nr_frags; -+ num_tpds_needed += nr_frags; -+ } else if (skb_has_frag_list(skb)) { -+ struct sk_buff *iter_skb; -+ -+ skb_walk_frags(skb, iter_skb) -+ num_tpds_needed++; -+ } -+ -+ if (num_tpds_needed > EDMA_MAX_SKB_FRAGS) { -+ dev_err(&net_dev->dev, -+ "skb received with fragments %d which is more than %lu", -+ num_tpds_needed, EDMA_MAX_SKB_FRAGS); -+ dev_kfree_skb_any(skb); -+ adapter->stats.tx_errors++; -+ return NETDEV_TX_OK; -+ } -+ -+ if (edma_stp_rstp) { -+ u16 ath_hdr, ath_eth_type; -+ u8 mac_addr[EDMA_ETH_HDR_LEN]; -+ ath_eth_type = ntohs(*(uint16_t *)&skb->data[12]); -+ if (ath_eth_type == edma_ath_eth_type) { -+ packet_is_rstp = true; -+ ath_hdr = htons(*(uint16_t *)&skb->data[14]); -+ dp_bitmap = ath_hdr & EDMA_TX_ATH_HDR_PORT_BITMAP_MASK; -+ from_cpu = (ath_hdr & EDMA_TX_ATH_HDR_FROM_CPU_MASK) >> EDMA_TX_ATH_HDR_FROM_CPU_SHIFT; -+ memcpy(mac_addr, skb->data, EDMA_ETH_HDR_LEN); -+ -+ skb_pull(skb, 4); -+ -+ memcpy(skb->data, mac_addr, EDMA_ETH_HDR_LEN); -+ } -+ } -+ -+ /* this will be one of the 4 TX queues exposed to linux kernel */ -+ txq_id = skb_get_queue_mapping(skb); -+ queue_id = edma_tx_queue_get(adapter, skb, txq_id); -+ etdr = edma_cinfo->tpd_ring[queue_id]; -+ nq = netdev_get_tx_queue(net_dev, txq_id); -+ -+ local_bh_disable(); -+ /* Tx is not handled in bottom half context. Hence, we need to protect -+ * Tx from tasks and bottom half -+ */ -+ -+ if (num_tpds_needed > edma_tpd_available(edma_cinfo, queue_id)) { -+ /* not enough descriptor, just stop queue */ -+ netif_tx_stop_queue(nq); -+ local_bh_enable(); -+ dev_dbg(&net_dev->dev, "Not enough descriptors available"); -+ edma_cinfo->edma_ethstats.tx_desc_error++; -+ return NETDEV_TX_BUSY; -+ } -+ -+ /* Check and mark VLAN tag offload */ -+ if (skb_vlan_tag_present(skb)) -+ flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG; -+ else if (adapter->default_vlan_tag) -+ flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG; -+ -+ /* Check and mark checksum offload */ -+ if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) -+ flags_transmit |= EDMA_HW_CHECKSUM; -+ -+ /* Map and fill descriptor for Tx */ -+ ret = edma_tx_map_and_fill(edma_cinfo, adapter, skb, queue_id, -+ flags_transmit, from_cpu, dp_bitmap, packet_is_rstp, nr_frags); -+ if (ret) { -+ dev_kfree_skb_any(skb); -+ adapter->stats.tx_errors++; -+ goto netdev_okay; -+ } -+ -+ /* Update SW producer index */ -+ edma_tx_update_hw_idx(edma_cinfo, skb, queue_id); -+ -+ /* update tx statistics */ -+ adapter->stats.tx_packets++; -+ adapter->stats.tx_bytes += skb->len; -+ -+netdev_okay: -+ local_bh_enable(); -+ return NETDEV_TX_OK; -+} -+ -+/* -+ * edma_flow_may_expire() -+ * Timer function called periodically to delete the node -+ */ -+void edma_flow_may_expire(unsigned long data) -+{ -+ struct edma_adapter *adapter = (struct edma_adapter *)data; -+ int j; -+ -+ spin_lock_bh(&adapter->rfs.rfs_ftab_lock); -+ for (j = 0; j < EDMA_RFS_EXPIRE_COUNT_PER_CALL; j++) { -+ struct hlist_head *hhead; -+ struct hlist_node *tmp; -+ struct edma_rfs_filter_node *n; -+ bool res; -+ -+ hhead = &adapter->rfs.hlist_head[adapter->rfs.hashtoclean++]; -+ hlist_for_each_entry_safe(n, tmp, hhead, node) { -+ res = rps_may_expire_flow(adapter->netdev, n->rq_id, -+ n->flow_id, n->filter_id); -+ if (res) { -+ int ret; -+ ret = edma_delete_rfs_filter(adapter, n); -+ if (ret < 0) -+ dev_dbg(&adapter->netdev->dev, -+ "RFS entry %d not allowed to be flushed by Switch", -+ n->flow_id); -+ else { -+ hlist_del(&n->node); -+ kfree(n); -+ adapter->rfs.filter_available++; -+ } -+ } -+ } -+ } -+ -+ adapter->rfs.hashtoclean = adapter->rfs.hashtoclean & (EDMA_RFS_FLOW_ENTRIES - 1); -+ spin_unlock_bh(&adapter->rfs.rfs_ftab_lock); -+ mod_timer(&adapter->rfs.expire_rfs, jiffies + HZ / 4); -+} -+ -+/* edma_rx_flow_steer() -+ * Called by core to to steer the flow to CPU -+ */ -+int edma_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, -+ u16 rxq, u32 flow_id) -+{ -+ struct flow_keys keys; -+ struct edma_rfs_filter_node *filter_node; -+ struct edma_adapter *adapter = netdev_priv(dev); -+ u16 hash_tblid; -+ int res; -+ -+ if (skb->protocol == htons(ETH_P_IPV6)) { -+ dev_err(&adapter->pdev->dev, "IPv6 not supported\n"); -+ res = -EINVAL; -+ goto no_protocol_err; -+ } -+ -+ /* Dissect flow parameters -+ * We only support IPv4 + TCP/UDP -+ */ -+ res = skb_flow_dissect_flow_keys(skb, &keys, 0); -+ if (!((keys.basic.ip_proto == IPPROTO_TCP) || (keys.basic.ip_proto == IPPROTO_UDP))) { -+ res = -EPROTONOSUPPORT; -+ goto no_protocol_err; -+ } -+ -+ /* Check if table entry exists */ -+ hash_tblid = skb_get_hash_raw(skb) & EDMA_RFS_FLOW_ENTRIES_MASK; -+ -+ spin_lock_bh(&adapter->rfs.rfs_ftab_lock); -+ filter_node = edma_rfs_key_search(&adapter->rfs.hlist_head[hash_tblid], &keys); -+ -+ if (filter_node) { -+ if (rxq == filter_node->rq_id) { -+ res = -EEXIST; -+ goto out; -+ } else { -+ res = edma_delete_rfs_filter(adapter, filter_node); -+ if (res < 0) -+ dev_warn(&adapter->netdev->dev, -+ "Cannot steer flow %d to different queue", -+ filter_node->flow_id); -+ else { -+ adapter->rfs.filter_available++; -+ res = edma_add_rfs_filter(adapter, &keys, rxq, filter_node); -+ if (res < 0) { -+ dev_warn(&adapter->netdev->dev, -+ "Cannot steer flow %d to different queue", -+ filter_node->flow_id); -+ } else { -+ adapter->rfs.filter_available--; -+ filter_node->rq_id = rxq; -+ filter_node->filter_id = res; -+ } -+ } -+ } -+ } else { -+ if (adapter->rfs.filter_available == 0) { -+ res = -EBUSY; -+ goto out; -+ } -+ -+ filter_node = kmalloc(sizeof(*filter_node), GFP_ATOMIC); -+ if (!filter_node) { -+ res = -ENOMEM; -+ goto out; -+ } -+ -+ res = edma_add_rfs_filter(adapter, &keys, rxq, filter_node); -+ if (res < 0) { -+ kfree(filter_node); -+ goto out; -+ } -+ -+ adapter->rfs.filter_available--; -+ filter_node->rq_id = rxq; -+ filter_node->filter_id = res; -+ filter_node->flow_id = flow_id; -+ filter_node->keys = keys; -+ INIT_HLIST_NODE(&filter_node->node); -+ hlist_add_head(&filter_node->node, &adapter->rfs.hlist_head[hash_tblid]); -+ } -+ -+out: -+ spin_unlock_bh(&adapter->rfs.rfs_ftab_lock); -+no_protocol_err: -+ return res; -+} -+ -+/* edma_register_rfs_filter() -+ * Add RFS filter callback -+ */ -+int edma_register_rfs_filter(struct net_device *netdev, -+ set_rfs_filter_callback_t set_filter) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ -+ spin_lock_bh(&adapter->rfs.rfs_ftab_lock); -+ -+ if (adapter->set_rfs_rule) { -+ spin_unlock_bh(&adapter->rfs.rfs_ftab_lock); -+ return -1; -+ } -+ -+ adapter->set_rfs_rule = set_filter; -+ spin_unlock_bh(&adapter->rfs.rfs_ftab_lock); -+ -+ return 0; -+} -+ -+/* edma_alloc_tx_rings() -+ * Allocate rx rings -+ */ -+int edma_alloc_tx_rings(struct edma_common_info *edma_cinfo) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ int i, err = 0; -+ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) { -+ err = edma_alloc_tx_ring(edma_cinfo, edma_cinfo->tpd_ring[i]); -+ if (err) { -+ dev_err(&pdev->dev, "Tx Queue alloc %u failed\n", i); -+ return err; -+ } -+ } -+ -+ return 0; -+} -+ -+/* edma_free_tx_rings() -+ * Free tx rings -+ */ -+void edma_free_tx_rings(struct edma_common_info *edma_cinfo) -+{ -+ int i; -+ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) -+ edma_free_tx_ring(edma_cinfo, edma_cinfo->tpd_ring[i]); -+} -+ -+/* edma_free_tx_resources() -+ * Free buffers associated with tx rings -+ */ -+void edma_free_tx_resources(struct edma_common_info *edma_cinfo) -+{ -+ struct edma_tx_desc_ring *etdr; -+ struct edma_sw_desc *sw_desc; -+ struct platform_device *pdev = edma_cinfo->pdev; -+ int i, j; -+ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) { -+ etdr = edma_cinfo->tpd_ring[i]; -+ for (j = 0; j < EDMA_TX_RING_SIZE; j++) { -+ sw_desc = &etdr->sw_desc[j]; -+ if (sw_desc->flags & (EDMA_SW_DESC_FLAG_SKB_HEAD | -+ EDMA_SW_DESC_FLAG_SKB_FRAG | EDMA_SW_DESC_FLAG_SKB_FRAGLIST)) -+ edma_tx_unmap_and_free(pdev, sw_desc); -+ } -+ } -+} -+ -+/* edma_alloc_rx_rings() -+ * Allocate rx rings -+ */ -+int edma_alloc_rx_rings(struct edma_common_info *edma_cinfo) -+{ -+ struct platform_device *pdev = edma_cinfo->pdev; -+ int i, j, err = 0; -+ -+ for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) { -+ err = edma_alloc_rx_ring(edma_cinfo, edma_cinfo->rfd_ring[j]); -+ if (err) { -+ dev_err(&pdev->dev, "Rx Queue alloc%u failed\n", i); -+ return err; -+ } -+ j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ } -+ -+ return 0; -+} -+ -+/* edma_free_rx_rings() -+ * free rx rings -+ */ -+void edma_free_rx_rings(struct edma_common_info *edma_cinfo) -+{ -+ int i, j; -+ -+ for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) { -+ edma_free_rx_ring(edma_cinfo, edma_cinfo->rfd_ring[j]); -+ j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ } -+} -+ -+/* edma_free_queues() -+ * Free the queues allocaated -+ */ -+void edma_free_queues(struct edma_common_info *edma_cinfo) -+{ -+ int i , j; -+ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) { -+ if (edma_cinfo->tpd_ring[i]) -+ kfree(edma_cinfo->tpd_ring[i]); -+ edma_cinfo->tpd_ring[i] = NULL; -+ } -+ -+ for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) { -+ if (edma_cinfo->rfd_ring[j]) -+ kfree(edma_cinfo->rfd_ring[j]); -+ edma_cinfo->rfd_ring[j] = NULL; -+ j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ } -+ -+ edma_cinfo->num_rx_queues = 0; -+ edma_cinfo->num_tx_queues = 0; -+ -+ return; -+} -+ -+/* edma_free_rx_resources() -+ * Free buffers associated with tx rings -+ */ -+void edma_free_rx_resources(struct edma_common_info *edma_cinfo) -+{ -+ struct edma_rfd_desc_ring *erdr; -+ struct edma_sw_desc *sw_desc; -+ struct platform_device *pdev = edma_cinfo->pdev; -+ int i, j, k; -+ -+ for (i = 0, k = 0; i < edma_cinfo->num_rx_queues; i++) { -+ erdr = edma_cinfo->rfd_ring[k]; -+ for (j = 0; j < EDMA_RX_RING_SIZE; j++) { -+ sw_desc = &erdr->sw_desc[j]; -+ if (likely(sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_HEAD)) { -+ dma_unmap_single(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_FROM_DEVICE); -+ edma_clean_rfd(erdr, j); -+ } else if ((sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_FRAG)) { -+ dma_unmap_page(&pdev->dev, sw_desc->dma, -+ sw_desc->length, DMA_FROM_DEVICE); -+ edma_clean_rfd(erdr, j); -+ } -+ } -+ k += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ -+ } -+} -+ -+/* edma_alloc_queues_tx() -+ * Allocate memory for all rings -+ */ -+int edma_alloc_queues_tx(struct edma_common_info *edma_cinfo) -+{ -+ int i; -+ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) { -+ struct edma_tx_desc_ring *etdr; -+ etdr = kzalloc(sizeof(struct edma_tx_desc_ring), GFP_KERNEL); -+ if (!etdr) -+ goto err; -+ etdr->count = edma_cinfo->tx_ring_count; -+ edma_cinfo->tpd_ring[i] = etdr; -+ } -+ -+ return 0; -+err: -+ edma_free_queues(edma_cinfo); -+ return -1; -+} -+ -+/* edma_alloc_queues_rx() -+ * Allocate memory for all rings -+ */ -+int edma_alloc_queues_rx(struct edma_common_info *edma_cinfo) -+{ -+ int i, j; -+ -+ for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) { -+ struct edma_rfd_desc_ring *rfd_ring; -+ rfd_ring = kzalloc(sizeof(struct edma_rfd_desc_ring), -+ GFP_KERNEL); -+ if (!rfd_ring) -+ goto err; -+ rfd_ring->count = edma_cinfo->rx_ring_count; -+ edma_cinfo->rfd_ring[j] = rfd_ring; -+ j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ } -+ return 0; -+err: -+ edma_free_queues(edma_cinfo); -+ return -1; -+} -+ -+/* edma_clear_irq_status() -+ * Clear interrupt status -+ */ -+void edma_clear_irq_status() -+{ -+ edma_write_reg(EDMA_REG_RX_ISR, 0xff); -+ edma_write_reg(EDMA_REG_TX_ISR, 0xffff); -+ edma_write_reg(EDMA_REG_MISC_ISR, 0x1fff); -+ edma_write_reg(EDMA_REG_WOL_ISR, 0x1); -+}; -+ -+/* edma_configure() -+ * Configure skb, edma interrupts and control register. -+ */ -+int edma_configure(struct edma_common_info *edma_cinfo) -+{ -+ struct edma_hw *hw = &edma_cinfo->hw; -+ u32 intr_modrt_data; -+ u32 intr_ctrl_data = 0; -+ int i, j, ret_count; -+ -+ edma_read_reg(EDMA_REG_INTR_CTRL, &intr_ctrl_data); -+ intr_ctrl_data &= ~(1 << EDMA_INTR_SW_IDX_W_TYP_SHIFT); -+ intr_ctrl_data |= hw->intr_sw_idx_w << EDMA_INTR_SW_IDX_W_TYP_SHIFT; -+ edma_write_reg(EDMA_REG_INTR_CTRL, intr_ctrl_data); -+ -+ edma_clear_irq_status(); -+ -+ /* Clear any WOL status */ -+ edma_write_reg(EDMA_REG_WOL_CTRL, 0); -+ intr_modrt_data = (EDMA_TX_IMT << EDMA_IRQ_MODRT_TX_TIMER_SHIFT); -+ intr_modrt_data |= (EDMA_RX_IMT << EDMA_IRQ_MODRT_RX_TIMER_SHIFT); -+ edma_write_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data); -+ edma_configure_tx(edma_cinfo); -+ edma_configure_rx(edma_cinfo); -+ -+ /* Allocate the RX buffer */ -+ for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) { -+ struct edma_rfd_desc_ring *ring = edma_cinfo->rfd_ring[j]; -+ ret_count = edma_alloc_rx_buf(edma_cinfo, ring, ring->count, j); -+ if (ret_count) { -+ dev_dbg(&edma_cinfo->pdev->dev, "not all rx buffers allocated\n"); -+ } -+ j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ } -+ -+ /* Configure descriptor Ring */ -+ edma_init_desc(edma_cinfo); -+ return 0; -+} -+ -+/* edma_irq_enable() -+ * Enable default interrupt generation settings -+ */ -+void edma_irq_enable(struct edma_common_info *edma_cinfo) -+{ -+ struct edma_hw *hw = &edma_cinfo->hw; -+ int i, j; -+ -+ edma_write_reg(EDMA_REG_RX_ISR, 0xff); -+ for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) { -+ edma_write_reg(EDMA_REG_RX_INT_MASK_Q(j), hw->rx_intr_mask); -+ j += ((edma_cinfo->num_rx_queues == 4) ? 2 : 1); -+ } -+ edma_write_reg(EDMA_REG_TX_ISR, 0xffff); -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) -+ edma_write_reg(EDMA_REG_TX_INT_MASK_Q(i), hw->tx_intr_mask); -+} -+ -+/* edma_irq_disable() -+ * Disable Interrupt -+ */ -+void edma_irq_disable(struct edma_common_info *edma_cinfo) -+{ -+ int i; -+ -+ for (i = 0; i < EDMA_MAX_RECEIVE_QUEUE; i++) -+ edma_write_reg(EDMA_REG_RX_INT_MASK_Q(i), 0x0); -+ -+ for (i = 0; i < EDMA_MAX_TRANSMIT_QUEUE; i++) -+ edma_write_reg(EDMA_REG_TX_INT_MASK_Q(i), 0x0); -+ edma_write_reg(EDMA_REG_MISC_IMR, 0); -+ edma_write_reg(EDMA_REG_WOL_IMR, 0); -+} -+ -+/* edma_free_irqs() -+ * Free All IRQs -+ */ -+void edma_free_irqs(struct edma_adapter *adapter) -+{ -+ struct edma_common_info *edma_cinfo = adapter->edma_cinfo; -+ int i, j; -+ int k = ((edma_cinfo->num_rx_queues == 4) ? 1 : 2); -+ -+ for (i = 0; i < CONFIG_NR_CPUS; i++) { -+ for (j = edma_cinfo->edma_percpu_info[i].tx_start; j < (edma_cinfo->edma_percpu_info[i].tx_start + 4); j++) -+ free_irq(edma_cinfo->tx_irq[j], &edma_cinfo->edma_percpu_info[i]); -+ -+ for (j = edma_cinfo->edma_percpu_info[i].rx_start; j < (edma_cinfo->edma_percpu_info[i].rx_start + k); j++) -+ free_irq(edma_cinfo->rx_irq[j], &edma_cinfo->edma_percpu_info[i]); -+ } -+} -+ -+/* edma_enable_rx_ctrl() -+ * Enable RX queue control -+ */ -+void edma_enable_rx_ctrl(struct edma_hw *hw) -+{ -+ u32 data; -+ -+ edma_read_reg(EDMA_REG_RXQ_CTRL, &data); -+ data |= EDMA_RXQ_CTRL_EN; -+ edma_write_reg(EDMA_REG_RXQ_CTRL, data); -+} -+ -+ -+/* edma_enable_tx_ctrl() -+ * Enable TX queue control -+ */ -+void edma_enable_tx_ctrl(struct edma_hw *hw) -+{ -+ u32 data; -+ -+ edma_read_reg(EDMA_REG_TXQ_CTRL, &data); -+ data |= EDMA_TXQ_CTRL_TXQ_EN; -+ edma_write_reg(EDMA_REG_TXQ_CTRL, data); -+} -+ -+/* edma_stop_rx_tx() -+ * Disable RX/TQ Queue control -+ */ -+void edma_stop_rx_tx(struct edma_hw *hw) -+{ -+ u32 data; -+ -+ edma_read_reg(EDMA_REG_RXQ_CTRL, &data); -+ data &= ~EDMA_RXQ_CTRL_EN; -+ edma_write_reg(EDMA_REG_RXQ_CTRL, data); -+ edma_read_reg(EDMA_REG_TXQ_CTRL, &data); -+ data &= ~EDMA_TXQ_CTRL_TXQ_EN; -+ edma_write_reg(EDMA_REG_TXQ_CTRL, data); -+} -+ -+/* edma_reset() -+ * Reset the EDMA -+ */ -+int edma_reset(struct edma_common_info *edma_cinfo) -+{ -+ struct edma_hw *hw = &edma_cinfo->hw; -+ -+ edma_irq_disable(edma_cinfo); -+ -+ edma_clear_irq_status(); -+ -+ edma_stop_rx_tx(hw); -+ -+ return 0; -+} -+ -+/* edma_fill_netdev() -+ * Fill netdev for each etdr -+ */ -+int edma_fill_netdev(struct edma_common_info *edma_cinfo, int queue_id, -+ int dev, int txq_id) -+{ -+ struct edma_tx_desc_ring *etdr; -+ int i = 0; -+ -+ etdr = edma_cinfo->tpd_ring[queue_id]; -+ -+ while (etdr->netdev[i]) -+ i++; -+ -+ if (i >= EDMA_MAX_NETDEV_PER_QUEUE) -+ return -1; -+ -+ /* Populate the netdev associated with the tpd ring */ -+ etdr->netdev[i] = edma_netdev[dev]; -+ etdr->nq[i] = netdev_get_tx_queue(edma_netdev[dev], txq_id); -+ -+ return 0; -+} -+ -+/* edma_change_mtu() -+ * change the MTU of the NIC. -+ */ -+int edma_change_mtu(struct net_device *netdev, int new_mtu) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ struct edma_common_info *edma_cinfo = adapter->edma_cinfo; -+ int old_mtu = netdev->mtu; -+ int max_frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + (2 * VLAN_HLEN); -+ -+ if ((max_frame_size < ETH_ZLEN + ETH_FCS_LEN) || -+ (max_frame_size > EDMA_MAX_JUMBO_FRAME_SIZE)) { -+ dev_err(&edma_cinfo->pdev->dev, "MTU setting not correct\n"); -+ return -EINVAL; -+ } -+ -+ /* set MTU */ -+ if (old_mtu != new_mtu) { -+ netdev->mtu = new_mtu; -+ netdev_update_features(netdev); -+ } -+ -+ return 0; -+} -+ -+/* edma_set_mac() -+ * Change the Ethernet Address of the NIC -+ */ -+int edma_set_mac_addr(struct net_device *netdev, void *p) -+{ -+ struct sockaddr *addr = p; -+ -+ if (!is_valid_ether_addr(addr->sa_data)) -+ return -EINVAL; -+ -+ if (netif_running(netdev)) -+ return -EBUSY; -+ -+ memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); -+ return 0; -+} -+ -+/* edma_set_stp_rstp() -+ * set stp/rstp -+ */ -+void edma_set_stp_rstp(bool rstp) -+{ -+ edma_stp_rstp = rstp; -+} -+ -+/* edma_assign_ath_hdr_type() -+ * assign atheros header eth type -+ */ -+void edma_assign_ath_hdr_type(int eth_type) -+{ -+ edma_ath_eth_type = eth_type & EDMA_ETH_TYPE_MASK; -+} -+ -+/* edma_get_default_vlan_tag() -+ * Used by other modules to get the default vlan tag -+ */ -+int edma_get_default_vlan_tag(struct net_device *netdev) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ -+ if (adapter->default_vlan_tag) -+ return adapter->default_vlan_tag; -+ -+ return 0; -+} -+ -+/* edma_open() -+ * gets called when netdevice is up, start the queue. -+ */ -+int edma_open(struct net_device *netdev) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ struct platform_device *pdev = adapter->edma_cinfo->pdev; -+ -+ netif_tx_start_all_queues(netdev); -+ edma_initialise_rfs_flow_table(adapter); -+ set_bit(__EDMA_UP, &adapter->state_flags); -+ -+ /* if Link polling is enabled, in our case enabled for WAN, then -+ * do a phy start, else always set link as UP -+ */ -+ if (adapter->poll_required) { -+ if (!IS_ERR(adapter->phydev)) { -+ phy_start(adapter->phydev); -+ phy_start_aneg(adapter->phydev); -+ adapter->link_state = __EDMA_LINKDOWN; -+ } else { -+ dev_dbg(&pdev->dev, "Invalid PHY device for a link polled interface\n"); -+ } -+ } else { -+ adapter->link_state = __EDMA_LINKUP; -+ netif_carrier_on(netdev); -+ } -+ -+ return 0; -+} -+ -+ -+/* edma_close() -+ * gets called when netdevice is down, stops the queue. -+ */ -+int edma_close(struct net_device *netdev) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ -+ edma_free_rfs_flow_table(adapter); -+ netif_carrier_off(netdev); -+ netif_tx_stop_all_queues(netdev); -+ -+ if (adapter->poll_required) { -+ if (!IS_ERR(adapter->phydev)) -+ phy_stop(adapter->phydev); -+ } -+ -+ adapter->link_state = __EDMA_LINKDOWN; -+ -+ /* Set GMAC state to UP before link state is checked -+ */ -+ clear_bit(__EDMA_UP, &adapter->state_flags); -+ -+ return 0; -+} -+ -+/* edma_poll -+ * polling function that gets called when the napi gets scheduled. -+ * -+ * Main sequence of task performed in this api -+ * is clear irq status -> clear_tx_irq -> clean_rx_irq-> -+ * enable interrupts. -+ */ -+int edma_poll(struct napi_struct *napi, int budget) -+{ -+ struct edma_per_cpu_queues_info *edma_percpu_info = container_of(napi, -+ struct edma_per_cpu_queues_info, napi); -+ struct edma_common_info *edma_cinfo = edma_percpu_info->edma_cinfo; -+ u32 reg_data; -+ u32 shadow_rx_status, shadow_tx_status; -+ int queue_id; -+ int i, work_done = 0; -+ -+ /* Store the Rx/Tx status by ANDing it with -+ * appropriate CPU RX?TX mask -+ */ -+ edma_read_reg(EDMA_REG_RX_ISR, ®_data); -+ edma_percpu_info->rx_status |= reg_data & edma_percpu_info->rx_mask; -+ shadow_rx_status = edma_percpu_info->rx_status; -+ edma_read_reg(EDMA_REG_TX_ISR, ®_data); -+ edma_percpu_info->tx_status |= reg_data & edma_percpu_info->tx_mask; -+ shadow_tx_status = edma_percpu_info->tx_status; -+ -+ /* Every core will have a start, which will be computed -+ * in probe and stored in edma_percpu_info->tx_start variable. -+ * We will shift the status bit by tx_start to obtain -+ * status bits for the core on which the current processing -+ * is happening. Since, there are 4 tx queues per core, -+ * we will run the loop till we get the correct queue to clear. -+ */ -+ while (edma_percpu_info->tx_status) { -+ queue_id = ffs(edma_percpu_info->tx_status) - 1; -+ edma_tx_complete(edma_cinfo, queue_id); -+ edma_percpu_info->tx_status &= ~(1 << queue_id); -+ } -+ -+ /* Every core will have a start, which will be computed -+ * in probe and stored in edma_percpu_info->tx_start variable. -+ * We will shift the status bit by tx_start to obtain -+ * status bits for the core on which the current processing -+ * is happening. Since, there are 4 tx queues per core, we -+ * will run the loop till we get the correct queue to clear. -+ */ -+ while (edma_percpu_info->rx_status) { -+ queue_id = ffs(edma_percpu_info->rx_status) - 1; -+ edma_rx_complete(edma_cinfo, &work_done, -+ budget, queue_id, napi); -+ -+ if (likely(work_done < budget)) -+ edma_percpu_info->rx_status &= ~(1 << queue_id); -+ else -+ break; -+ } -+ -+ /* Clear the status register, to avoid the interrupts to -+ * reoccur.This clearing of interrupt status register is -+ * done here as writing to status register only takes place -+ * once the producer/consumer index has been updated to -+ * reflect that the packet transmission/reception went fine. -+ */ -+ edma_write_reg(EDMA_REG_RX_ISR, shadow_rx_status); -+ edma_write_reg(EDMA_REG_TX_ISR, shadow_tx_status); -+ -+ /* If budget not fully consumed, exit the polling mode */ -+ if (likely(work_done < budget)) { -+ napi_complete(napi); -+ -+ /* re-enable the interrupts */ -+ for (i = 0; i < edma_cinfo->num_rxq_per_core; i++) -+ edma_write_reg(EDMA_REG_RX_INT_MASK_Q(edma_percpu_info->rx_start + i), 0x1); -+ for (i = 0; i < edma_cinfo->num_txq_per_core; i++) -+ edma_write_reg(EDMA_REG_TX_INT_MASK_Q(edma_percpu_info->tx_start + i), 0x1); -+ } -+ -+ return work_done; -+} -+ -+/* edma interrupt() -+ * interrupt handler -+ */ -+irqreturn_t edma_interrupt(int irq, void *dev) -+{ -+ struct edma_per_cpu_queues_info *edma_percpu_info = (struct edma_per_cpu_queues_info *) dev; -+ struct edma_common_info *edma_cinfo = edma_percpu_info->edma_cinfo; -+ int i; -+ -+ /* Unmask the TX/RX interrupt register */ -+ for (i = 0; i < edma_cinfo->num_rxq_per_core; i++) -+ edma_write_reg(EDMA_REG_RX_INT_MASK_Q(edma_percpu_info->rx_start + i), 0x0); -+ -+ for (i = 0; i < edma_cinfo->num_txq_per_core; i++) -+ edma_write_reg(EDMA_REG_TX_INT_MASK_Q(edma_percpu_info->tx_start + i), 0x0); -+ -+ napi_schedule(&edma_percpu_info->napi); -+ -+ return IRQ_HANDLED; -+} ---- /dev/null -+++ b/drivers/net/ethernet/qualcomm/essedma/edma.h -@@ -0,0 +1,447 @@ -+/* -+ * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#ifndef _EDMA_H_ -+#define _EDMA_H_ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "ess_edma.h" -+ -+#define EDMA_CPU_CORES_SUPPORTED 4 -+#define EDMA_MAX_PORTID_SUPPORTED 5 -+#define EDMA_MAX_VLAN_SUPPORTED EDMA_MAX_PORTID_SUPPORTED -+#define EDMA_MAX_PORTID_BITMAP_INDEX (EDMA_MAX_PORTID_SUPPORTED + 1) -+#define EDMA_MAX_PORTID_BITMAP_SUPPORTED 0x1f /* 0001_1111 = 0x1f */ -+#define EDMA_MAX_NETDEV_PER_QUEUE 4 /* 3 Netdev per queue, 1 space for indexing */ -+ -+#define EDMA_MAX_RECEIVE_QUEUE 8 -+#define EDMA_MAX_TRANSMIT_QUEUE 16 -+ -+/* WAN/LAN adapter number */ -+#define EDMA_WAN 0 -+#define EDMA_LAN 1 -+ -+/* VLAN tag */ -+#define EDMA_LAN_DEFAULT_VLAN 1 -+#define EDMA_WAN_DEFAULT_VLAN 2 -+ -+#define EDMA_DEFAULT_GROUP1_VLAN 1 -+#define EDMA_DEFAULT_GROUP2_VLAN 2 -+#define EDMA_DEFAULT_GROUP3_VLAN 3 -+#define EDMA_DEFAULT_GROUP4_VLAN 4 -+#define EDMA_DEFAULT_GROUP5_VLAN 5 -+ -+/* Queues exposed to linux kernel */ -+#define EDMA_NETDEV_TX_QUEUE 4 -+#define EDMA_NETDEV_RX_QUEUE 4 -+ -+/* Number of queues per core */ -+#define EDMA_NUM_TXQ_PER_CORE 4 -+#define EDMA_NUM_RXQ_PER_CORE 2 -+ -+#define EDMA_TPD_EOP_SHIFT 31 -+ -+#define EDMA_PORT_ID_SHIFT 12 -+#define EDMA_PORT_ID_MASK 0x7 -+ -+/* tpd word 3 bit 18-28 */ -+#define EDMA_TPD_PORT_BITMAP_SHIFT 18 -+ -+#define EDMA_TPD_FROM_CPU_SHIFT 25 -+ -+#define EDMA_FROM_CPU_MASK 0x80 -+#define EDMA_SKB_PRIORITY_MASK 0x38 -+ -+/* TX/RX descriptor ring count */ -+/* should be a power of 2 */ -+#define EDMA_RX_RING_SIZE 128 -+#define EDMA_TX_RING_SIZE 128 -+ -+/* Flags used in paged/non paged mode */ -+#define EDMA_RX_HEAD_BUFF_SIZE_JUMBO 256 -+#define EDMA_RX_HEAD_BUFF_SIZE 1540 -+ -+/* MAX frame size supported by switch */ -+#define EDMA_MAX_JUMBO_FRAME_SIZE 9216 -+ -+/* Configurations */ -+#define EDMA_INTR_CLEAR_TYPE 0 -+#define EDMA_INTR_SW_IDX_W_TYPE 0 -+#define EDMA_FIFO_THRESH_TYPE 0 -+#define EDMA_RSS_TYPE 0 -+#define EDMA_RX_IMT 0x0020 -+#define EDMA_TX_IMT 0x0050 -+#define EDMA_TPD_BURST 5 -+#define EDMA_TXF_BURST 0x100 -+#define EDMA_RFD_BURST 8 -+#define EDMA_RFD_THR 16 -+#define EDMA_RFD_LTHR 0 -+ -+/* RX/TX per CPU based mask/shift */ -+#define EDMA_TX_PER_CPU_MASK 0xF -+#define EDMA_RX_PER_CPU_MASK 0x3 -+#define EDMA_TX_PER_CPU_MASK_SHIFT 0x2 -+#define EDMA_RX_PER_CPU_MASK_SHIFT 0x1 -+#define EDMA_TX_CPU_START_SHIFT 0x2 -+#define EDMA_RX_CPU_START_SHIFT 0x1 -+ -+/* FLags used in transmit direction */ -+#define EDMA_HW_CHECKSUM 0x00000001 -+#define EDMA_VLAN_TX_TAG_INSERT_FLAG 0x00000002 -+#define EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG 0x00000004 -+ -+#define EDMA_SW_DESC_FLAG_LAST 0x1 -+#define EDMA_SW_DESC_FLAG_SKB_HEAD 0x2 -+#define EDMA_SW_DESC_FLAG_SKB_FRAG 0x4 -+#define EDMA_SW_DESC_FLAG_SKB_FRAGLIST 0x8 -+#define EDMA_SW_DESC_FLAG_SKB_NONE 0x10 -+#define EDMA_SW_DESC_FLAG_SKB_REUSE 0x20 -+ -+ -+#define EDMA_MAX_SKB_FRAGS (MAX_SKB_FRAGS + 1) -+ -+/* Ethtool specific list of EDMA supported features */ -+#define EDMA_SUPPORTED_FEATURES (SUPPORTED_10baseT_Half \ -+ | SUPPORTED_10baseT_Full \ -+ | SUPPORTED_100baseT_Half \ -+ | SUPPORTED_100baseT_Full \ -+ | SUPPORTED_1000baseT_Full) -+ -+/* Recevie side atheros Header */ -+#define EDMA_RX_ATH_HDR_VERSION 0x2 -+#define EDMA_RX_ATH_HDR_VERSION_SHIFT 14 -+#define EDMA_RX_ATH_HDR_PRIORITY_SHIFT 11 -+#define EDMA_RX_ATH_PORT_TYPE_SHIFT 6 -+#define EDMA_RX_ATH_HDR_RSTP_PORT_TYPE 0x4 -+ -+/* Transmit side atheros Header */ -+#define EDMA_TX_ATH_HDR_PORT_BITMAP_MASK 0x7F -+#define EDMA_TX_ATH_HDR_FROM_CPU_MASK 0x80 -+#define EDMA_TX_ATH_HDR_FROM_CPU_SHIFT 7 -+ -+#define EDMA_TXQ_START_CORE0 8 -+#define EDMA_TXQ_START_CORE1 12 -+#define EDMA_TXQ_START_CORE2 0 -+#define EDMA_TXQ_START_CORE3 4 -+ -+#define EDMA_TXQ_IRQ_MASK_CORE0 0x0F00 -+#define EDMA_TXQ_IRQ_MASK_CORE1 0xF000 -+#define EDMA_TXQ_IRQ_MASK_CORE2 0x000F -+#define EDMA_TXQ_IRQ_MASK_CORE3 0x00F0 -+ -+#define EDMA_ETH_HDR_LEN 12 -+#define EDMA_ETH_TYPE_MASK 0xFFFF -+ -+#define EDMA_RX_BUFFER_WRITE 16 -+#define EDMA_RFD_AVAIL_THR 80 -+ -+#define EDMA_GMAC_NO_MDIO_PHY PHY_MAX_ADDR -+ -+extern int ssdk_rfs_ipct_rule_set(__be32 ip_src, __be32 ip_dst, -+ __be16 sport, __be16 dport, -+ uint8_t proto, u16 loadbalance, bool action); -+struct edma_ethtool_statistics { -+ u32 tx_q0_pkt; -+ u32 tx_q1_pkt; -+ u32 tx_q2_pkt; -+ u32 tx_q3_pkt; -+ u32 tx_q4_pkt; -+ u32 tx_q5_pkt; -+ u32 tx_q6_pkt; -+ u32 tx_q7_pkt; -+ u32 tx_q8_pkt; -+ u32 tx_q9_pkt; -+ u32 tx_q10_pkt; -+ u32 tx_q11_pkt; -+ u32 tx_q12_pkt; -+ u32 tx_q13_pkt; -+ u32 tx_q14_pkt; -+ u32 tx_q15_pkt; -+ u32 tx_q0_byte; -+ u32 tx_q1_byte; -+ u32 tx_q2_byte; -+ u32 tx_q3_byte; -+ u32 tx_q4_byte; -+ u32 tx_q5_byte; -+ u32 tx_q6_byte; -+ u32 tx_q7_byte; -+ u32 tx_q8_byte; -+ u32 tx_q9_byte; -+ u32 tx_q10_byte; -+ u32 tx_q11_byte; -+ u32 tx_q12_byte; -+ u32 tx_q13_byte; -+ u32 tx_q14_byte; -+ u32 tx_q15_byte; -+ u32 rx_q0_pkt; -+ u32 rx_q1_pkt; -+ u32 rx_q2_pkt; -+ u32 rx_q3_pkt; -+ u32 rx_q4_pkt; -+ u32 rx_q5_pkt; -+ u32 rx_q6_pkt; -+ u32 rx_q7_pkt; -+ u32 rx_q0_byte; -+ u32 rx_q1_byte; -+ u32 rx_q2_byte; -+ u32 rx_q3_byte; -+ u32 rx_q4_byte; -+ u32 rx_q5_byte; -+ u32 rx_q6_byte; -+ u32 rx_q7_byte; -+ u32 tx_desc_error; -+}; -+ -+struct edma_mdio_data { -+ struct mii_bus *mii_bus; -+ void __iomem *membase; -+ int phy_irq[PHY_MAX_ADDR]; -+}; -+ -+/* EDMA LINK state */ -+enum edma_link_state { -+ __EDMA_LINKUP, /* Indicate link is UP */ -+ __EDMA_LINKDOWN /* Indicate link is down */ -+}; -+ -+/* EDMA GMAC state */ -+enum edma_gmac_state { -+ __EDMA_UP /* use to indicate GMAC is up */ -+}; -+ -+/* edma transmit descriptor */ -+struct edma_tx_desc { -+ __le16 len; /* full packet including CRC */ -+ __le16 svlan_tag; /* vlan tag */ -+ __le32 word1; /* byte 4-7 */ -+ __le32 addr; /* address of buffer */ -+ __le32 word3; /* byte 12 */ -+}; -+ -+/* edma receive return descriptor */ -+struct edma_rx_return_desc { -+ u16 rrd0; -+ u16 rrd1; -+ u16 rrd2; -+ u16 rrd3; -+ u16 rrd4; -+ u16 rrd5; -+ u16 rrd6; -+ u16 rrd7; -+}; -+ -+/* RFD descriptor */ -+struct edma_rx_free_desc { -+ __le32 buffer_addr; /* buffer address */ -+}; -+ -+/* edma hw specific data */ -+struct edma_hw { -+ u32 __iomem *hw_addr; /* inner register address */ -+ struct edma_adapter *adapter; /* netdevice adapter */ -+ u32 rx_intr_mask; /*rx interrupt mask */ -+ u32 tx_intr_mask; /* tx interrupt nask */ -+ u32 misc_intr_mask; /* misc interrupt mask */ -+ u32 wol_intr_mask; /* wake on lan interrupt mask */ -+ bool intr_clear_type; /* interrupt clear */ -+ bool intr_sw_idx_w; /* interrupt software index */ -+ u32 rx_head_buff_size; /* Rx buffer size */ -+ u8 rss_type; /* rss protocol type */ -+}; -+ -+/* edma_sw_desc stores software descriptor -+ * SW descriptor has 1:1 map with HW descriptor -+ */ -+struct edma_sw_desc { -+ struct sk_buff *skb; -+ dma_addr_t dma; /* dma address */ -+ u16 length; /* Tx/Rx buffer length */ -+ u32 flags; -+}; -+ -+/* per core related information */ -+struct edma_per_cpu_queues_info { -+ struct napi_struct napi; /* napi associated with the core */ -+ u32 tx_mask; /* tx interrupt mask */ -+ u32 rx_mask; /* rx interrupt mask */ -+ u32 tx_status; /* tx interrupt status */ -+ u32 rx_status; /* rx interrupt status */ -+ u32 tx_start; /* tx queue start */ -+ u32 rx_start; /* rx queue start */ -+ struct edma_common_info *edma_cinfo; /* edma common info */ -+}; -+ -+/* edma specific common info */ -+struct edma_common_info { -+ struct edma_tx_desc_ring *tpd_ring[16]; /* 16 Tx queues */ -+ struct edma_rfd_desc_ring *rfd_ring[8]; /* 8 Rx queues */ -+ struct platform_device *pdev; /* device structure */ -+ struct net_device *netdev[EDMA_MAX_PORTID_SUPPORTED]; -+ struct net_device *portid_netdev_lookup_tbl[EDMA_MAX_PORTID_BITMAP_INDEX]; -+ struct ctl_table_header *edma_ctl_table_hdr; -+ int num_gmac; -+ struct edma_ethtool_statistics edma_ethstats; /* ethtool stats */ -+ int num_rx_queues; /* number of rx queue */ -+ u32 num_tx_queues; /* number of tx queue */ -+ u32 tx_irq[16]; /* number of tx irq */ -+ u32 rx_irq[8]; /* number of rx irq */ -+ u32 from_cpu; /* from CPU TPD field */ -+ u32 num_rxq_per_core; /* Rx queues per core */ -+ u32 num_txq_per_core; /* Tx queues per core */ -+ u16 tx_ring_count; /* Tx ring count */ -+ u16 rx_ring_count; /* Rx ring*/ -+ u16 rx_head_buffer_len; /* rx buffer length */ -+ u16 rx_page_buffer_len; /* rx buffer length */ -+ u32 page_mode; /* Jumbo frame supported flag */ -+ u32 fraglist_mode; /* fraglist supported flag */ -+ struct edma_hw hw; /* edma hw specific structure */ -+ struct edma_per_cpu_queues_info edma_percpu_info[CONFIG_NR_CPUS]; /* per cpu information */ -+ spinlock_t stats_lock; /* protect edma stats area for updation */ -+}; -+ -+/* transimit packet descriptor (tpd) ring */ -+struct edma_tx_desc_ring { -+ struct netdev_queue *nq[EDMA_MAX_NETDEV_PER_QUEUE]; /* Linux queue index */ -+ struct net_device *netdev[EDMA_MAX_NETDEV_PER_QUEUE]; -+ /* Array of netdevs associated with the tpd ring */ -+ void *hw_desc; /* descriptor ring virtual address */ -+ struct edma_sw_desc *sw_desc; /* buffer associated with ring */ -+ int netdev_bmp; /* Bitmap for per-ring netdevs */ -+ u32 size; /* descriptor ring length in bytes */ -+ u16 count; /* number of descriptors in the ring */ -+ dma_addr_t dma; /* descriptor ring physical address */ -+ u16 sw_next_to_fill; /* next Tx descriptor to fill */ -+ u16 sw_next_to_clean; /* next Tx descriptor to clean */ -+}; -+ -+/* receive free descriptor (rfd) ring */ -+struct edma_rfd_desc_ring { -+ void *hw_desc; /* descriptor ring virtual address */ -+ struct edma_sw_desc *sw_desc; /* buffer associated with ring */ -+ u16 size; /* bytes allocated to sw_desc */ -+ u16 count; /* number of descriptors in the ring */ -+ dma_addr_t dma; /* descriptor ring physical address */ -+ u16 sw_next_to_fill; /* next descriptor to fill */ -+ u16 sw_next_to_clean; /* next descriptor to clean */ -+}; -+ -+/* edma_rfs_flter_node - rfs filter node in hash table */ -+struct edma_rfs_filter_node { -+ struct flow_keys keys; -+ u32 flow_id; /* flow_id of filter provided by kernel */ -+ u16 filter_id; /* filter id of filter returned by adaptor */ -+ u16 rq_id; /* desired rq index */ -+ struct hlist_node node; /* edma rfs list node */ -+}; -+ -+/* edma_rfs_flow_tbl - rfs flow table */ -+struct edma_rfs_flow_table { -+ u16 max_num_filter; /* Maximum number of filters edma supports */ -+ u16 hashtoclean; /* hash table index to clean next */ -+ int filter_available; /* Number of free filters available */ -+ struct hlist_head hlist_head[EDMA_RFS_FLOW_ENTRIES]; -+ spinlock_t rfs_ftab_lock; -+ struct timer_list expire_rfs; /* timer function for edma_rps_may_expire_flow */ -+}; -+ -+/* EDMA net device structure */ -+struct edma_adapter { -+ struct net_device *netdev; /* netdevice */ -+ struct platform_device *pdev; /* platform device */ -+ struct edma_common_info *edma_cinfo; /* edma common info */ -+ struct phy_device *phydev; /* Phy device */ -+ struct edma_rfs_flow_table rfs; /* edma rfs flow table */ -+ struct net_device_stats stats; /* netdev statistics */ -+ set_rfs_filter_callback_t set_rfs_rule; -+ u32 flags;/* status flags */ -+ unsigned long state_flags; /* GMAC up/down flags */ -+ u32 forced_speed; /* link force speed */ -+ u32 forced_duplex; /* link force duplex */ -+ u32 link_state; /* phy link state */ -+ u32 phy_mdio_addr; /* PHY device address on MII interface */ -+ u32 poll_required; /* check if link polling is required */ -+ u32 tx_start_offset[CONFIG_NR_CPUS]; /* tx queue start */ -+ u32 default_vlan_tag; /* vlan tag */ -+ u32 dp_bitmap; -+ uint8_t phy_id[MII_BUS_ID_SIZE + 3]; -+}; -+ -+int edma_alloc_queues_tx(struct edma_common_info *edma_cinfo); -+int edma_alloc_queues_rx(struct edma_common_info *edma_cinfo); -+int edma_open(struct net_device *netdev); -+int edma_close(struct net_device *netdev); -+void edma_free_tx_resources(struct edma_common_info *edma_c_info); -+void edma_free_rx_resources(struct edma_common_info *edma_c_info); -+int edma_alloc_tx_rings(struct edma_common_info *edma_cinfo); -+int edma_alloc_rx_rings(struct edma_common_info *edma_cinfo); -+void edma_free_tx_rings(struct edma_common_info *edma_cinfo); -+void edma_free_rx_rings(struct edma_common_info *edma_cinfo); -+void edma_free_queues(struct edma_common_info *edma_cinfo); -+void edma_irq_disable(struct edma_common_info *edma_cinfo); -+int edma_reset(struct edma_common_info *edma_cinfo); -+int edma_poll(struct napi_struct *napi, int budget); -+netdev_tx_t edma_xmit(struct sk_buff *skb, -+ struct net_device *netdev); -+int edma_configure(struct edma_common_info *edma_cinfo); -+void edma_irq_enable(struct edma_common_info *edma_cinfo); -+void edma_enable_tx_ctrl(struct edma_hw *hw); -+void edma_enable_rx_ctrl(struct edma_hw *hw); -+void edma_stop_rx_tx(struct edma_hw *hw); -+void edma_free_irqs(struct edma_adapter *adapter); -+irqreturn_t edma_interrupt(int irq, void *dev); -+void edma_write_reg(u16 reg_addr, u32 reg_value); -+void edma_read_reg(u16 reg_addr, volatile u32 *reg_value); -+struct net_device_stats *edma_get_stats(struct net_device *netdev); -+int edma_set_mac_addr(struct net_device *netdev, void *p); -+int edma_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, -+ u16 rxq, u32 flow_id); -+int edma_register_rfs_filter(struct net_device *netdev, -+ set_rfs_filter_callback_t set_filter); -+void edma_flow_may_expire(unsigned long data); -+void edma_set_ethtool_ops(struct net_device *netdev); -+int edma_change_mtu(struct net_device *netdev, int new_mtu); -+void edma_set_stp_rstp(bool tag); -+void edma_assign_ath_hdr_type(int tag); -+int edma_get_default_vlan_tag(struct net_device *netdev); -+void edma_adjust_link(struct net_device *netdev); -+int edma_fill_netdev(struct edma_common_info *edma_cinfo, int qid, int num, int txq_id); -+void edma_read_append_stats(struct edma_common_info *edma_cinfo); -+void edma_change_tx_coalesce(int usecs); -+void edma_change_rx_coalesce(int usecs); -+void edma_get_tx_rx_coalesce(u32 *reg_val); -+void edma_clear_irq_status(void); -+#endif /* _EDMA_H_ */ ---- /dev/null -+++ b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c -@@ -0,0 +1,1220 @@ -+/* -+ * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#include -+#include -+#include -+#include -+#include "edma.h" -+#include "ess_edma.h" -+ -+/* Weight round robin and virtual QID mask */ -+#define EDMA_WRR_VID_SCTL_MASK 0xffff -+ -+/* Weight round robin and virtual QID shift */ -+#define EDMA_WRR_VID_SCTL_SHIFT 16 -+ -+char edma_axi_driver_name[] = "ess_edma"; -+static const u32 default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | -+ NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP; -+ -+static u32 edma_hw_addr; -+ -+struct timer_list edma_stats_timer; -+ -+char edma_tx_irq[16][64]; -+char edma_rx_irq[8][64]; -+struct net_device *edma_netdev[EDMA_MAX_PORTID_SUPPORTED]; -+static u16 tx_start[4] = {EDMA_TXQ_START_CORE0, EDMA_TXQ_START_CORE1, -+ EDMA_TXQ_START_CORE2, EDMA_TXQ_START_CORE3}; -+static u32 tx_mask[4] = {EDMA_TXQ_IRQ_MASK_CORE0, EDMA_TXQ_IRQ_MASK_CORE1, -+ EDMA_TXQ_IRQ_MASK_CORE2, EDMA_TXQ_IRQ_MASK_CORE3}; -+ -+static u32 edma_default_ltag __read_mostly = EDMA_LAN_DEFAULT_VLAN; -+static u32 edma_default_wtag __read_mostly = EDMA_WAN_DEFAULT_VLAN; -+static u32 edma_default_group1_vtag __read_mostly = EDMA_DEFAULT_GROUP1_VLAN; -+static u32 edma_default_group2_vtag __read_mostly = EDMA_DEFAULT_GROUP2_VLAN; -+static u32 edma_default_group3_vtag __read_mostly = EDMA_DEFAULT_GROUP3_VLAN; -+static u32 edma_default_group4_vtag __read_mostly = EDMA_DEFAULT_GROUP4_VLAN; -+static u32 edma_default_group5_vtag __read_mostly = EDMA_DEFAULT_GROUP5_VLAN; -+static u32 edma_rss_idt_val = EDMA_RSS_IDT_VALUE; -+static u32 edma_rss_idt_idx; -+ -+static int edma_weight_assigned_to_q __read_mostly; -+static int edma_queue_to_virtual_q __read_mostly; -+static bool edma_enable_rstp __read_mostly; -+static int edma_athr_hdr_eth_type __read_mostly; -+ -+static int page_mode; -+module_param(page_mode, int, 0); -+MODULE_PARM_DESC(page_mode, "enable page mode"); -+ -+static int overwrite_mode; -+module_param(overwrite_mode, int, 0); -+MODULE_PARM_DESC(overwrite_mode, "overwrite default page_mode setting"); -+ -+static int jumbo_mru = EDMA_RX_HEAD_BUFF_SIZE; -+module_param(jumbo_mru, int, 0); -+MODULE_PARM_DESC(jumbo_mru, "enable fraglist support"); -+ -+static int num_rxq = 4; -+module_param(num_rxq, int, 0); -+MODULE_PARM_DESC(num_rxq, "change the number of rx queues"); -+ -+void edma_write_reg(u16 reg_addr, u32 reg_value) -+{ -+ writel(reg_value, ((void __iomem *)(edma_hw_addr + reg_addr))); -+} -+ -+void edma_read_reg(u16 reg_addr, volatile u32 *reg_value) -+{ -+ *reg_value = readl((void __iomem *)(edma_hw_addr + reg_addr)); -+} -+ -+/* edma_change_tx_coalesce() -+ * change tx interrupt moderation timer -+ */ -+void edma_change_tx_coalesce(int usecs) -+{ -+ u32 reg_value; -+ -+ /* Here, we right shift the value from the user by 1, this is -+ * done because IMT resolution timer is 2usecs. 1 count -+ * of this register corresponds to 2 usecs. -+ */ -+ edma_read_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, ®_value); -+ reg_value = ((reg_value & 0xffff) | ((usecs >> 1) << 16)); -+ edma_write_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, reg_value); -+} -+ -+/* edma_change_rx_coalesce() -+ * change rx interrupt moderation timer -+ */ -+void edma_change_rx_coalesce(int usecs) -+{ -+ u32 reg_value; -+ -+ /* Here, we right shift the value from the user by 1, this is -+ * done because IMT resolution timer is 2usecs. 1 count -+ * of this register corresponds to 2 usecs. -+ */ -+ edma_read_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, ®_value); -+ reg_value = ((reg_value & 0xffff0000) | (usecs >> 1)); -+ edma_write_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, reg_value); -+} -+ -+/* edma_get_tx_rx_coalesce() -+ * Get tx/rx interrupt moderation value -+ */ -+void edma_get_tx_rx_coalesce(u32 *reg_val) -+{ -+ edma_read_reg(EDMA_REG_IRQ_MODRT_TIMER_INIT, reg_val); -+} -+ -+void edma_read_append_stats(struct edma_common_info *edma_cinfo) -+{ -+ uint32_t *p; -+ int i; -+ u32 stat; -+ -+ spin_lock(&edma_cinfo->stats_lock); -+ p = (uint32_t *)&(edma_cinfo->edma_ethstats); -+ -+ for (i = 0; i < EDMA_MAX_TRANSMIT_QUEUE; i++) { -+ edma_read_reg(EDMA_REG_TX_STAT_PKT_Q(i), &stat); -+ *p += stat; -+ p++; -+ } -+ -+ for (i = 0; i < EDMA_MAX_TRANSMIT_QUEUE; i++) { -+ edma_read_reg(EDMA_REG_TX_STAT_BYTE_Q(i), &stat); -+ *p += stat; -+ p++; -+ } -+ -+ for (i = 0; i < EDMA_MAX_RECEIVE_QUEUE; i++) { -+ edma_read_reg(EDMA_REG_RX_STAT_PKT_Q(i), &stat); -+ *p += stat; -+ p++; -+ } -+ -+ for (i = 0; i < EDMA_MAX_RECEIVE_QUEUE; i++) { -+ edma_read_reg(EDMA_REG_RX_STAT_BYTE_Q(i), &stat); -+ *p += stat; -+ p++; -+ } -+ -+ spin_unlock(&edma_cinfo->stats_lock); -+} -+ -+static void edma_statistics_timer(unsigned long data) -+{ -+ struct edma_common_info *edma_cinfo = (struct edma_common_info *)data; -+ -+ edma_read_append_stats(edma_cinfo); -+ -+ mod_timer(&edma_stats_timer, jiffies + 1*HZ); -+} -+ -+static int edma_enable_stp_rstp(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ int ret; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ if (write) -+ edma_set_stp_rstp(edma_enable_rstp); -+ -+ return ret; -+} -+ -+static int edma_ath_hdr_eth_type(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ int ret; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ if (write) -+ edma_assign_ath_hdr_type(edma_athr_hdr_eth_type); -+ -+ return ret; -+} -+ -+static int edma_change_default_lan_vlan(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ struct edma_adapter *adapter; -+ int ret; -+ -+ if (!edma_netdev[1]) { -+ pr_err("Netdevice for default_lan does not exist\n"); -+ return -1; -+ } -+ -+ adapter = netdev_priv(edma_netdev[1]); -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ -+ if (write) -+ adapter->default_vlan_tag = edma_default_ltag; -+ -+ return ret; -+} -+ -+static int edma_change_default_wan_vlan(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ struct edma_adapter *adapter; -+ int ret; -+ -+ if (!edma_netdev[0]) { -+ pr_err("Netdevice for default_wan does not exist\n"); -+ return -1; -+ } -+ -+ adapter = netdev_priv(edma_netdev[0]); -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ -+ if (write) -+ adapter->default_vlan_tag = edma_default_wtag; -+ -+ return ret; -+} -+ -+static int edma_change_group1_vtag(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ struct edma_adapter *adapter; -+ struct edma_common_info *edma_cinfo; -+ int ret; -+ -+ if (!edma_netdev[0]) { -+ pr_err("Netdevice for Group 1 does not exist\n"); -+ return -1; -+ } -+ -+ adapter = netdev_priv(edma_netdev[0]); -+ edma_cinfo = adapter->edma_cinfo; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ -+ if (write) -+ adapter->default_vlan_tag = edma_default_group1_vtag; -+ -+ return ret; -+} -+ -+static int edma_change_group2_vtag(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ struct edma_adapter *adapter; -+ struct edma_common_info *edma_cinfo; -+ int ret; -+ -+ if (!edma_netdev[1]) { -+ pr_err("Netdevice for Group 2 does not exist\n"); -+ return -1; -+ } -+ -+ adapter = netdev_priv(edma_netdev[1]); -+ edma_cinfo = adapter->edma_cinfo; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ -+ if (write) -+ adapter->default_vlan_tag = edma_default_group2_vtag; -+ -+ return ret; -+} -+ -+static int edma_change_group3_vtag(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ struct edma_adapter *adapter; -+ struct edma_common_info *edma_cinfo; -+ int ret; -+ -+ if (!edma_netdev[2]) { -+ pr_err("Netdevice for Group 3 does not exist\n"); -+ return -1; -+ } -+ -+ adapter = netdev_priv(edma_netdev[2]); -+ edma_cinfo = adapter->edma_cinfo; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ -+ if (write) -+ adapter->default_vlan_tag = edma_default_group3_vtag; -+ -+ return ret; -+} -+ -+static int edma_change_group4_vtag(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ struct edma_adapter *adapter; -+ struct edma_common_info *edma_cinfo; -+ int ret; -+ -+ if (!edma_netdev[3]) { -+ pr_err("Netdevice for Group 4 does not exist\n"); -+ return -1; -+ } -+ -+ adapter = netdev_priv(edma_netdev[3]); -+ edma_cinfo = adapter->edma_cinfo; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ -+ if (write) -+ adapter->default_vlan_tag = edma_default_group4_vtag; -+ -+ return ret; -+} -+ -+static int edma_change_group5_vtag(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ struct edma_adapter *adapter; -+ struct edma_common_info *edma_cinfo; -+ int ret; -+ -+ if (!edma_netdev[4]) { -+ pr_err("Netdevice for Group 5 does not exist\n"); -+ return -1; -+ } -+ -+ adapter = netdev_priv(edma_netdev[4]); -+ edma_cinfo = adapter->edma_cinfo; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ -+ if (write) -+ adapter->default_vlan_tag = edma_default_group5_vtag; -+ -+ return ret; -+} -+ -+static int edma_set_rss_idt_value(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ int ret; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ if (write && !ret) -+ edma_write_reg(EDMA_REG_RSS_IDT(edma_rss_idt_idx), -+ edma_rss_idt_val); -+ return ret; -+} -+ -+static int edma_set_rss_idt_idx(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ int ret; -+ u32 old_value = edma_rss_idt_idx; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ if (!write || ret) -+ return ret; -+ -+ if (edma_rss_idt_idx >= EDMA_NUM_IDT) { -+ pr_err("Invalid RSS indirection table index %d\n", -+ edma_rss_idt_idx); -+ edma_rss_idt_idx = old_value; -+ return -EINVAL; -+ } -+ return ret; -+} -+ -+static int edma_weight_assigned_to_queues(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ int ret, queue_id, weight; -+ u32 reg_data, data, reg_addr; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ if (write) { -+ queue_id = edma_weight_assigned_to_q & EDMA_WRR_VID_SCTL_MASK; -+ if (queue_id < 0 || queue_id > 15) { -+ pr_err("queue_id not within desired range\n"); -+ return -EINVAL; -+ } -+ -+ weight = edma_weight_assigned_to_q >> EDMA_WRR_VID_SCTL_SHIFT; -+ if (weight < 0 || weight > 0xF) { -+ pr_err("queue_id not within desired range\n"); -+ return -EINVAL; -+ } -+ -+ data = weight << EDMA_WRR_SHIFT(queue_id); -+ -+ reg_addr = EDMA_REG_WRR_CTRL_Q0_Q3 + (queue_id & ~0x3); -+ edma_read_reg(reg_addr, ®_data); -+ reg_data &= ~(1 << EDMA_WRR_SHIFT(queue_id)); -+ edma_write_reg(reg_addr, data | reg_data); -+ } -+ -+ return ret; -+} -+ -+static int edma_queue_to_virtual_queue_map(struct ctl_table *table, int write, -+ void __user *buffer, size_t *lenp, -+ loff_t *ppos) -+{ -+ int ret, queue_id, virtual_qid; -+ u32 reg_data, data, reg_addr; -+ -+ ret = proc_dointvec(table, write, buffer, lenp, ppos); -+ if (write) { -+ queue_id = edma_queue_to_virtual_q & EDMA_WRR_VID_SCTL_MASK; -+ if (queue_id < 0 || queue_id > 15) { -+ pr_err("queue_id not within desired range\n"); -+ return -EINVAL; -+ } -+ -+ virtual_qid = edma_queue_to_virtual_q >> -+ EDMA_WRR_VID_SCTL_SHIFT; -+ if (virtual_qid < 0 || virtual_qid > 8) { -+ pr_err("queue_id not within desired range\n"); -+ return -EINVAL; -+ } -+ -+ data = virtual_qid << EDMA_VQ_ID_SHIFT(queue_id); -+ -+ reg_addr = EDMA_REG_VQ_CTRL0 + (queue_id & ~0x3); -+ edma_read_reg(reg_addr, ®_data); -+ reg_data &= ~(1 << EDMA_VQ_ID_SHIFT(queue_id)); -+ edma_write_reg(reg_addr, data | reg_data); -+ } -+ -+ return ret; -+} -+ -+static struct ctl_table edma_table[] = { -+ { -+ .procname = "default_lan_tag", -+ .data = &edma_default_ltag, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_change_default_lan_vlan -+ }, -+ { -+ .procname = "default_wan_tag", -+ .data = &edma_default_wtag, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_change_default_wan_vlan -+ }, -+ { -+ .procname = "weight_assigned_to_queues", -+ .data = &edma_weight_assigned_to_q, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_weight_assigned_to_queues -+ }, -+ { -+ .procname = "queue_to_virtual_queue_map", -+ .data = &edma_queue_to_virtual_q, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_queue_to_virtual_queue_map -+ }, -+ { -+ .procname = "enable_stp_rstp", -+ .data = &edma_enable_rstp, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_enable_stp_rstp -+ }, -+ { -+ .procname = "athr_hdr_eth_type", -+ .data = &edma_athr_hdr_eth_type, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_ath_hdr_eth_type -+ }, -+ { -+ .procname = "default_group1_vlan_tag", -+ .data = &edma_default_group1_vtag, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_change_group1_vtag -+ }, -+ { -+ .procname = "default_group2_vlan_tag", -+ .data = &edma_default_group2_vtag, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_change_group2_vtag -+ }, -+ { -+ .procname = "default_group3_vlan_tag", -+ .data = &edma_default_group3_vtag, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_change_group3_vtag -+ }, -+ { -+ .procname = "default_group4_vlan_tag", -+ .data = &edma_default_group4_vtag, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_change_group4_vtag -+ }, -+ { -+ .procname = "default_group5_vlan_tag", -+ .data = &edma_default_group5_vtag, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_change_group5_vtag -+ }, -+ { -+ .procname = "edma_rss_idt_value", -+ .data = &edma_rss_idt_val, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_set_rss_idt_value -+ }, -+ { -+ .procname = "edma_rss_idt_idx", -+ .data = &edma_rss_idt_idx, -+ .maxlen = sizeof(int), -+ .mode = 0644, -+ .proc_handler = edma_set_rss_idt_idx -+ }, -+ {} -+}; -+ -+/* edma_axi_netdev_ops -+ * Describe the operations supported by registered netdevices -+ * -+ * static const struct net_device_ops edma_axi_netdev_ops = { -+ * .ndo_open = edma_open, -+ * .ndo_stop = edma_close, -+ * .ndo_start_xmit = edma_xmit_frame, -+ * .ndo_set_mac_address = edma_set_mac_addr, -+ * } -+ */ -+static const struct net_device_ops edma_axi_netdev_ops = { -+ .ndo_open = edma_open, -+ .ndo_stop = edma_close, -+ .ndo_start_xmit = edma_xmit, -+ .ndo_set_mac_address = edma_set_mac_addr, -+#ifdef CONFIG_RFS_ACCEL -+ .ndo_rx_flow_steer = edma_rx_flow_steer, -+ .ndo_register_rfs_filter = edma_register_rfs_filter, -+ .ndo_get_default_vlan_tag = edma_get_default_vlan_tag, -+#endif -+ .ndo_get_stats = edma_get_stats, -+ .ndo_change_mtu = edma_change_mtu, -+}; -+ -+/* edma_axi_probe() -+ * Initialise an adapter identified by a platform_device structure. -+ * -+ * The OS initialization, configuring of the adapter private structure, -+ * and a hardware reset occur in the probe. -+ */ -+static int edma_axi_probe(struct platform_device *pdev) -+{ -+ struct edma_common_info *edma_cinfo; -+ struct edma_hw *hw; -+ struct edma_adapter *adapter[EDMA_MAX_PORTID_SUPPORTED]; -+ struct resource *res; -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *pnp; -+ struct device_node *mdio_node = NULL; -+ struct platform_device *mdio_plat = NULL; -+ struct mii_bus *miibus = NULL; -+ struct edma_mdio_data *mdio_data = NULL; -+ int i, j, k, err = 0; -+ int portid_bmp; -+ int idx = 0, idx_mac = 0; -+ -+ if (CONFIG_NR_CPUS != EDMA_CPU_CORES_SUPPORTED) { -+ dev_err(&pdev->dev, "Invalid CPU Cores\n"); -+ return -EINVAL; -+ } -+ -+ if ((num_rxq != 4) && (num_rxq != 8)) { -+ dev_err(&pdev->dev, "Invalid RX queue, edma probe failed\n"); -+ return -EINVAL; -+ } -+ edma_cinfo = kzalloc(sizeof(struct edma_common_info), GFP_KERNEL); -+ if (!edma_cinfo) { -+ err = -ENOMEM; -+ goto err_alloc; -+ } -+ -+ edma_cinfo->pdev = pdev; -+ -+ of_property_read_u32(np, "qcom,num_gmac", &edma_cinfo->num_gmac); -+ if (edma_cinfo->num_gmac > EDMA_MAX_PORTID_SUPPORTED) { -+ pr_err("Invalid DTSI Entry for qcom,num_gmac\n"); -+ err = -EINVAL; -+ goto err_cinfo; -+ } -+ -+ /* Initialize the netdev array before allocation -+ * to avoid double free -+ */ -+ for (i = 0 ; i < edma_cinfo->num_gmac ; i++) -+ edma_netdev[i] = NULL; -+ -+ for (i = 0 ; i < edma_cinfo->num_gmac ; i++) { -+ edma_netdev[i] = alloc_etherdev_mqs(sizeof(struct edma_adapter), -+ EDMA_NETDEV_TX_QUEUE, EDMA_NETDEV_RX_QUEUE); -+ -+ if (!edma_netdev[i]) { -+ dev_err(&pdev->dev, -+ "net device alloc fails for index=%d\n", i); -+ err = -ENODEV; -+ goto err_ioremap; -+ } -+ -+ SET_NETDEV_DEV(edma_netdev[i], &pdev->dev); -+ platform_set_drvdata(pdev, edma_netdev[i]); -+ edma_cinfo->netdev[i] = edma_netdev[i]; -+ } -+ -+ /* Fill ring details */ -+ edma_cinfo->num_tx_queues = EDMA_MAX_TRANSMIT_QUEUE; -+ edma_cinfo->num_txq_per_core = (EDMA_MAX_TRANSMIT_QUEUE / 4); -+ edma_cinfo->tx_ring_count = EDMA_TX_RING_SIZE; -+ -+ /* Update num rx queues based on module parameter */ -+ edma_cinfo->num_rx_queues = num_rxq; -+ edma_cinfo->num_rxq_per_core = ((num_rxq == 4) ? 1 : 2); -+ -+ edma_cinfo->rx_ring_count = EDMA_RX_RING_SIZE; -+ -+ hw = &edma_cinfo->hw; -+ -+ /* Fill HW defaults */ -+ hw->tx_intr_mask = EDMA_TX_IMR_NORMAL_MASK; -+ hw->rx_intr_mask = EDMA_RX_IMR_NORMAL_MASK; -+ -+ of_property_read_u32(np, "qcom,page-mode", &edma_cinfo->page_mode); -+ of_property_read_u32(np, "qcom,rx_head_buf_size", -+ &hw->rx_head_buff_size); -+ -+ if (overwrite_mode) { -+ dev_info(&pdev->dev, "page mode overwritten"); -+ edma_cinfo->page_mode = page_mode; -+ } -+ -+ if (jumbo_mru) -+ edma_cinfo->fraglist_mode = 1; -+ -+ if (edma_cinfo->page_mode) -+ hw->rx_head_buff_size = EDMA_RX_HEAD_BUFF_SIZE_JUMBO; -+ else if (edma_cinfo->fraglist_mode) -+ hw->rx_head_buff_size = jumbo_mru; -+ else if (!hw->rx_head_buff_size) -+ hw->rx_head_buff_size = EDMA_RX_HEAD_BUFF_SIZE; -+ -+ hw->misc_intr_mask = 0; -+ hw->wol_intr_mask = 0; -+ -+ hw->intr_clear_type = EDMA_INTR_CLEAR_TYPE; -+ hw->intr_sw_idx_w = EDMA_INTR_SW_IDX_W_TYPE; -+ -+ /* configure RSS type to the different protocol that can be -+ * supported -+ */ -+ hw->rss_type = EDMA_RSS_TYPE_IPV4TCP | EDMA_RSS_TYPE_IPV6_TCP | -+ EDMA_RSS_TYPE_IPV4_UDP | EDMA_RSS_TYPE_IPV6UDP | -+ EDMA_RSS_TYPE_IPV4 | EDMA_RSS_TYPE_IPV6; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ -+ edma_cinfo->hw.hw_addr = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(edma_cinfo->hw.hw_addr)) { -+ err = PTR_ERR(edma_cinfo->hw.hw_addr); -+ goto err_ioremap; -+ } -+ -+ edma_hw_addr = (u32)edma_cinfo->hw.hw_addr; -+ -+ /* Parse tx queue interrupt number from device tree */ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) -+ edma_cinfo->tx_irq[i] = platform_get_irq(pdev, i); -+ -+ /* Parse rx queue interrupt number from device tree -+ * Here we are setting j to point to the point where we -+ * left tx interrupt parsing(i.e 16) and run run the loop -+ * from 0 to 7 to parse rx interrupt number. -+ */ -+ for (i = 0, j = edma_cinfo->num_tx_queues, k = 0; -+ i < edma_cinfo->num_rx_queues; i++) { -+ edma_cinfo->rx_irq[k] = platform_get_irq(pdev, j); -+ k += ((num_rxq == 4) ? 2 : 1); -+ j += ((num_rxq == 4) ? 2 : 1); -+ } -+ -+ edma_cinfo->rx_head_buffer_len = edma_cinfo->hw.rx_head_buff_size; -+ edma_cinfo->rx_page_buffer_len = PAGE_SIZE; -+ -+ err = edma_alloc_queues_tx(edma_cinfo); -+ if (err) { -+ dev_err(&pdev->dev, "Allocation of TX queue failed\n"); -+ goto err_tx_qinit; -+ } -+ -+ err = edma_alloc_queues_rx(edma_cinfo); -+ if (err) { -+ dev_err(&pdev->dev, "Allocation of RX queue failed\n"); -+ goto err_rx_qinit; -+ } -+ -+ err = edma_alloc_tx_rings(edma_cinfo); -+ if (err) { -+ dev_err(&pdev->dev, "Allocation of TX resources failed\n"); -+ goto err_tx_rinit; -+ } -+ -+ err = edma_alloc_rx_rings(edma_cinfo); -+ if (err) { -+ dev_err(&pdev->dev, "Allocation of RX resources failed\n"); -+ goto err_rx_rinit; -+ } -+ -+ /* Initialize netdev and netdev bitmap for transmit descriptor rings */ -+ for (i = 0; i < edma_cinfo->num_tx_queues; i++) { -+ struct edma_tx_desc_ring *etdr = edma_cinfo->tpd_ring[i]; -+ int j; -+ -+ etdr->netdev_bmp = 0; -+ for (j = 0; j < EDMA_MAX_NETDEV_PER_QUEUE; j++) { -+ etdr->netdev[j] = NULL; -+ etdr->nq[j] = NULL; -+ } -+ } -+ -+ if (of_property_read_bool(np, "qcom,mdio_supported")) { -+ mdio_node = of_find_compatible_node(NULL, NULL, -+ "qcom,ipq4019-mdio"); -+ if (!mdio_node) { -+ dev_err(&pdev->dev, "cannot find mdio node by phandle"); -+ err = -EIO; -+ goto err_mdiobus_init_fail; -+ } -+ -+ mdio_plat = of_find_device_by_node(mdio_node); -+ if (!mdio_plat) { -+ dev_err(&pdev->dev, -+ "cannot find platform device from mdio node"); -+ of_node_put(mdio_node); -+ err = -EIO; -+ goto err_mdiobus_init_fail; -+ } -+ -+ mdio_data = dev_get_drvdata(&mdio_plat->dev); -+ if (!mdio_data) { -+ dev_err(&pdev->dev, -+ "cannot get mii bus reference from device data"); -+ of_node_put(mdio_node); -+ err = -EIO; -+ goto err_mdiobus_init_fail; -+ } -+ -+ miibus = mdio_data->mii_bus; -+ } -+ -+ for_each_available_child_of_node(np, pnp) { -+ const char *mac_addr; -+ -+ /* this check is needed if parent and daughter dts have -+ * different number of gmac nodes -+ */ -+ if (idx_mac == edma_cinfo->num_gmac) { -+ of_node_put(np); -+ break; -+ } -+ -+ mac_addr = of_get_mac_address(pnp); -+ if (mac_addr) -+ memcpy(edma_netdev[idx_mac]->dev_addr, mac_addr, ETH_ALEN); -+ -+ idx_mac++; -+ } -+ -+ /* Populate the adapter structure register the netdevice */ -+ for (i = 0; i < edma_cinfo->num_gmac; i++) { -+ int k, m; -+ -+ adapter[i] = netdev_priv(edma_netdev[i]); -+ adapter[i]->netdev = edma_netdev[i]; -+ adapter[i]->pdev = pdev; -+ for (j = 0; j < CONFIG_NR_CPUS; j++) { -+ m = i % 2; -+ adapter[i]->tx_start_offset[j] = -+ ((j << EDMA_TX_CPU_START_SHIFT) + (m << 1)); -+ /* Share the queues with available net-devices. -+ * For instance , with 5 net-devices -+ * eth0/eth2/eth4 will share q0,q1,q4,q5,q8,q9,q12,q13 -+ * and eth1/eth3 will get the remaining. -+ */ -+ for (k = adapter[i]->tx_start_offset[j]; k < -+ (adapter[i]->tx_start_offset[j] + 2); k++) { -+ if (edma_fill_netdev(edma_cinfo, k, i, j)) { -+ pr_err("Netdev overflow Error\n"); -+ goto err_register; -+ } -+ } -+ } -+ -+ adapter[i]->edma_cinfo = edma_cinfo; -+ edma_netdev[i]->netdev_ops = &edma_axi_netdev_ops; -+ edma_netdev[i]->features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM -+ | NETIF_F_HW_VLAN_CTAG_TX -+ | NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_SG | -+ NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GRO; -+ edma_netdev[i]->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM | -+ NETIF_F_HW_VLAN_CTAG_RX -+ | NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | -+ NETIF_F_GRO; -+ edma_netdev[i]->vlan_features = NETIF_F_HW_CSUM | NETIF_F_SG | -+ NETIF_F_TSO | NETIF_F_TSO6 | -+ NETIF_F_GRO; -+ edma_netdev[i]->wanted_features = NETIF_F_HW_CSUM | NETIF_F_SG | -+ NETIF_F_TSO | NETIF_F_TSO6 | -+ NETIF_F_GRO; -+ -+#ifdef CONFIG_RFS_ACCEL -+ edma_netdev[i]->features |= NETIF_F_RXHASH | NETIF_F_NTUPLE; -+ edma_netdev[i]->hw_features |= NETIF_F_RXHASH | NETIF_F_NTUPLE; -+ edma_netdev[i]->vlan_features |= NETIF_F_RXHASH | NETIF_F_NTUPLE; -+ edma_netdev[i]->wanted_features |= NETIF_F_RXHASH | NETIF_F_NTUPLE; -+#endif -+ edma_set_ethtool_ops(edma_netdev[i]); -+ -+ /* This just fill in some default MAC address -+ */ -+ if (!is_valid_ether_addr(edma_netdev[i]->dev_addr)) { -+ random_ether_addr(edma_netdev[i]->dev_addr); -+ pr_info("EDMA using MAC@ - using"); -+ pr_info("%02x:%02x:%02x:%02x:%02x:%02x\n", -+ *(edma_netdev[i]->dev_addr), -+ *(edma_netdev[i]->dev_addr + 1), -+ *(edma_netdev[i]->dev_addr + 2), -+ *(edma_netdev[i]->dev_addr + 3), -+ *(edma_netdev[i]->dev_addr + 4), -+ *(edma_netdev[i]->dev_addr + 5)); -+ } -+ -+ err = register_netdev(edma_netdev[i]); -+ if (err) -+ goto err_register; -+ -+ /* carrier off reporting is important to -+ * ethtool even BEFORE open -+ */ -+ netif_carrier_off(edma_netdev[i]); -+ -+ /* Allocate reverse irq cpu mapping structure for -+ * receive queues -+ */ -+#ifdef CONFIG_RFS_ACCEL -+ edma_netdev[i]->rx_cpu_rmap = -+ alloc_irq_cpu_rmap(EDMA_NETDEV_RX_QUEUE); -+ if (!edma_netdev[i]->rx_cpu_rmap) { -+ err = -ENOMEM; -+ goto err_rmap_alloc_fail; -+ } -+#endif -+ } -+ -+ for (i = 0; i < EDMA_MAX_PORTID_BITMAP_INDEX; i++) -+ edma_cinfo->portid_netdev_lookup_tbl[i] = NULL; -+ -+ for_each_available_child_of_node(np, pnp) { -+ const uint32_t *vlan_tag = NULL; -+ int len; -+ -+ /* this check is needed if parent and daughter dts have -+ * different number of gmac nodes -+ */ -+ if (idx == edma_cinfo->num_gmac) -+ break; -+ -+ /* Populate port-id to netdev lookup table */ -+ vlan_tag = of_get_property(pnp, "vlan_tag", &len); -+ if (!vlan_tag) { -+ pr_err("Vlan tag parsing Failed.\n"); -+ goto err_rmap_alloc_fail; -+ } -+ -+ adapter[idx]->default_vlan_tag = of_read_number(vlan_tag, 1); -+ vlan_tag++; -+ portid_bmp = of_read_number(vlan_tag, 1); -+ adapter[idx]->dp_bitmap = portid_bmp; -+ -+ portid_bmp = portid_bmp >> 1; /* We ignore CPU Port bit 0 */ -+ while (portid_bmp) { -+ int port_bit = ffs(portid_bmp); -+ -+ if (port_bit > EDMA_MAX_PORTID_SUPPORTED) -+ goto err_rmap_alloc_fail; -+ edma_cinfo->portid_netdev_lookup_tbl[port_bit] = -+ edma_netdev[idx]; -+ portid_bmp &= ~(1 << (port_bit - 1)); -+ } -+ -+ if (!of_property_read_u32(pnp, "qcom,poll_required", -+ &adapter[idx]->poll_required)) { -+ if (adapter[idx]->poll_required) { -+ of_property_read_u32(pnp, "qcom,phy_mdio_addr", -+ &adapter[idx]->phy_mdio_addr); -+ of_property_read_u32(pnp, "qcom,forced_speed", -+ &adapter[idx]->forced_speed); -+ of_property_read_u32(pnp, "qcom,forced_duplex", -+ &adapter[idx]->forced_duplex); -+ -+ /* create a phyid using MDIO bus id -+ * and MDIO bus address -+ */ -+ snprintf(adapter[idx]->phy_id, -+ MII_BUS_ID_SIZE + 3, PHY_ID_FMT, -+ miibus->id, -+ adapter[idx]->phy_mdio_addr); -+ } -+ } else { -+ adapter[idx]->poll_required = 0; -+ adapter[idx]->forced_speed = SPEED_1000; -+ adapter[idx]->forced_duplex = DUPLEX_FULL; -+ } -+ -+ idx++; -+ } -+ -+ edma_cinfo->edma_ctl_table_hdr = register_net_sysctl(&init_net, -+ "net/edma", -+ edma_table); -+ if (!edma_cinfo->edma_ctl_table_hdr) { -+ dev_err(&pdev->dev, "edma sysctl table hdr not registered\n"); -+ goto err_unregister_sysctl_tbl; -+ } -+ -+ /* Disable all 16 Tx and 8 rx irqs */ -+ edma_irq_disable(edma_cinfo); -+ -+ err = edma_reset(edma_cinfo); -+ if (err) { -+ err = -EIO; -+ goto err_reset; -+ } -+ -+ /* populate per_core_info, do a napi_Add, request 16 TX irqs, -+ * 8 RX irqs, do a napi enable -+ */ -+ for (i = 0; i < CONFIG_NR_CPUS; i++) { -+ u8 rx_start; -+ -+ edma_cinfo->edma_percpu_info[i].napi.state = 0; -+ -+ netif_napi_add(edma_netdev[0], -+ &edma_cinfo->edma_percpu_info[i].napi, -+ edma_poll, 64); -+ napi_enable(&edma_cinfo->edma_percpu_info[i].napi); -+ edma_cinfo->edma_percpu_info[i].tx_mask = tx_mask[i]; -+ edma_cinfo->edma_percpu_info[i].rx_mask = EDMA_RX_PER_CPU_MASK -+ << (i << EDMA_RX_PER_CPU_MASK_SHIFT); -+ edma_cinfo->edma_percpu_info[i].tx_start = tx_start[i]; -+ edma_cinfo->edma_percpu_info[i].rx_start = -+ i << EDMA_RX_CPU_START_SHIFT; -+ rx_start = i << EDMA_RX_CPU_START_SHIFT; -+ edma_cinfo->edma_percpu_info[i].tx_status = 0; -+ edma_cinfo->edma_percpu_info[i].rx_status = 0; -+ edma_cinfo->edma_percpu_info[i].edma_cinfo = edma_cinfo; -+ -+ /* Request irq per core */ -+ for (j = edma_cinfo->edma_percpu_info[i].tx_start; -+ j < tx_start[i] + 4; j++) { -+ sprintf(&edma_tx_irq[j][0], "edma_eth_tx%d", j); -+ err = request_irq(edma_cinfo->tx_irq[j], -+ edma_interrupt, -+ 0, -+ &edma_tx_irq[j][0], -+ &edma_cinfo->edma_percpu_info[i]); -+ if (err) -+ goto err_reset; -+ } -+ -+ for (j = edma_cinfo->edma_percpu_info[i].rx_start; -+ j < (rx_start + -+ ((edma_cinfo->num_rx_queues == 4) ? 1 : 2)); -+ j++) { -+ sprintf(&edma_rx_irq[j][0], "edma_eth_rx%d", j); -+ err = request_irq(edma_cinfo->rx_irq[j], -+ edma_interrupt, -+ 0, -+ &edma_rx_irq[j][0], -+ &edma_cinfo->edma_percpu_info[i]); -+ if (err) -+ goto err_reset; -+ } -+ -+#ifdef CONFIG_RFS_ACCEL -+ for (j = edma_cinfo->edma_percpu_info[i].rx_start; -+ j < rx_start + 2; j += 2) { -+ err = irq_cpu_rmap_add(edma_netdev[0]->rx_cpu_rmap, -+ edma_cinfo->rx_irq[j]); -+ if (err) -+ goto err_rmap_add_fail; -+ } -+#endif -+ } -+ -+ /* Used to clear interrupt status, allocate rx buffer, -+ * configure edma descriptors registers -+ */ -+ err = edma_configure(edma_cinfo); -+ if (err) { -+ err = -EIO; -+ goto err_configure; -+ } -+ -+ /* Configure RSS indirection table. -+ * 128 hash will be configured in the following -+ * pattern: hash{0,1,2,3} = {Q0,Q2,Q4,Q6} respectively -+ * and so on -+ */ -+ for (i = 0; i < EDMA_NUM_IDT; i++) -+ edma_write_reg(EDMA_REG_RSS_IDT(i), EDMA_RSS_IDT_VALUE); -+ -+ /* Configure load balance mapping table. -+ * 4 table entry will be configured according to the -+ * following pattern: load_balance{0,1,2,3} = {Q0,Q1,Q3,Q4} -+ * respectively. -+ */ -+ edma_write_reg(EDMA_REG_LB_RING, EDMA_LB_REG_VALUE); -+ -+ /* Configure Virtual queue for Tx rings -+ * User can also change this value runtime through -+ * a sysctl -+ */ -+ edma_write_reg(EDMA_REG_VQ_CTRL0, EDMA_VQ_REG_VALUE); -+ edma_write_reg(EDMA_REG_VQ_CTRL1, EDMA_VQ_REG_VALUE); -+ -+ /* Configure Max AXI Burst write size to 128 bytes*/ -+ edma_write_reg(EDMA_REG_AXIW_CTRL_MAXWRSIZE, -+ EDMA_AXIW_MAXWRSIZE_VALUE); -+ -+ /* Enable All 16 tx and 8 rx irq mask */ -+ edma_irq_enable(edma_cinfo); -+ edma_enable_tx_ctrl(&edma_cinfo->hw); -+ edma_enable_rx_ctrl(&edma_cinfo->hw); -+ -+ for (i = 0; i < edma_cinfo->num_gmac; i++) { -+ if (adapter[i]->poll_required) { -+ adapter[i]->phydev = -+ phy_connect(edma_netdev[i], -+ (const char *)adapter[i]->phy_id, -+ &edma_adjust_link, -+ PHY_INTERFACE_MODE_SGMII); -+ if (IS_ERR(adapter[i]->phydev)) { -+ dev_dbg(&pdev->dev, "PHY attach FAIL"); -+ err = -EIO; -+ goto edma_phy_attach_fail; -+ } else { -+ adapter[i]->phydev->advertising |= -+ ADVERTISED_Pause | -+ ADVERTISED_Asym_Pause; -+ adapter[i]->phydev->supported |= -+ SUPPORTED_Pause | -+ SUPPORTED_Asym_Pause; -+ } -+ } else { -+ adapter[i]->phydev = NULL; -+ } -+ } -+ -+ spin_lock_init(&edma_cinfo->stats_lock); -+ -+ init_timer(&edma_stats_timer); -+ edma_stats_timer.expires = jiffies + 1*HZ; -+ edma_stats_timer.data = (unsigned long)edma_cinfo; -+ edma_stats_timer.function = edma_statistics_timer; /* timer handler */ -+ add_timer(&edma_stats_timer); -+ -+ return 0; -+ -+edma_phy_attach_fail: -+ miibus = NULL; -+err_configure: -+#ifdef CONFIG_RFS_ACCEL -+ for (i = 0; i < edma_cinfo->num_gmac; i++) { -+ free_irq_cpu_rmap(adapter[i]->netdev->rx_cpu_rmap); -+ adapter[i]->netdev->rx_cpu_rmap = NULL; -+ } -+#endif -+err_rmap_add_fail: -+ edma_free_irqs(adapter[0]); -+ for (i = 0; i < CONFIG_NR_CPUS; i++) -+ napi_disable(&edma_cinfo->edma_percpu_info[i].napi); -+err_reset: -+err_unregister_sysctl_tbl: -+err_rmap_alloc_fail: -+ for (i = 0; i < edma_cinfo->num_gmac; i++) -+ unregister_netdev(edma_netdev[i]); -+err_register: -+err_mdiobus_init_fail: -+ edma_free_rx_rings(edma_cinfo); -+err_rx_rinit: -+ edma_free_tx_rings(edma_cinfo); -+err_tx_rinit: -+ edma_free_queues(edma_cinfo); -+err_rx_qinit: -+err_tx_qinit: -+ iounmap(edma_cinfo->hw.hw_addr); -+err_ioremap: -+ for (i = 0; i < edma_cinfo->num_gmac; i++) { -+ if (edma_netdev[i]) -+ free_netdev(edma_netdev[i]); -+ } -+err_cinfo: -+ kfree(edma_cinfo); -+err_alloc: -+ return err; -+} -+ -+/* edma_axi_remove() -+ * Device Removal Routine -+ * -+ * edma_axi_remove is called by the platform subsystem to alert the driver -+ * that it should release a platform device. -+ */ -+static int edma_axi_remove(struct platform_device *pdev) -+{ -+ struct edma_adapter *adapter = netdev_priv(edma_netdev[0]); -+ struct edma_common_info *edma_cinfo = adapter->edma_cinfo; -+ struct edma_hw *hw = &edma_cinfo->hw; -+ int i; -+ -+ for (i = 0; i < edma_cinfo->num_gmac; i++) -+ unregister_netdev(edma_netdev[i]); -+ -+ edma_stop_rx_tx(hw); -+ for (i = 0; i < CONFIG_NR_CPUS; i++) -+ napi_disable(&edma_cinfo->edma_percpu_info[i].napi); -+ -+ edma_irq_disable(edma_cinfo); -+ edma_write_reg(EDMA_REG_RX_ISR, 0xff); -+ edma_write_reg(EDMA_REG_TX_ISR, 0xffff); -+#ifdef CONFIG_RFS_ACCEL -+ for (i = 0; i < edma_cinfo->num_gmac; i++) { -+ free_irq_cpu_rmap(edma_netdev[i]->rx_cpu_rmap); -+ edma_netdev[i]->rx_cpu_rmap = NULL; -+ } -+#endif -+ -+ for (i = 0; i < edma_cinfo->num_gmac; i++) { -+ struct edma_adapter *adapter = netdev_priv(edma_netdev[i]); -+ -+ if (adapter->phydev) -+ phy_disconnect(adapter->phydev); -+ } -+ -+ del_timer_sync(&edma_stats_timer); -+ edma_free_irqs(adapter); -+ unregister_net_sysctl_table(edma_cinfo->edma_ctl_table_hdr); -+ edma_free_tx_resources(edma_cinfo); -+ edma_free_rx_resources(edma_cinfo); -+ edma_free_tx_rings(edma_cinfo); -+ edma_free_rx_rings(edma_cinfo); -+ edma_free_queues(edma_cinfo); -+ for (i = 0; i < edma_cinfo->num_gmac; i++) -+ free_netdev(edma_netdev[i]); -+ -+ kfree(edma_cinfo); -+ -+ return 0; -+} -+ -+static const struct of_device_id edma_of_mtable[] = { -+ {.compatible = "qcom,ess-edma" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, edma_of_mtable); -+ -+static struct platform_driver edma_axi_driver = { -+ .driver = { -+ .name = edma_axi_driver_name, -+ .of_match_table = edma_of_mtable, -+ }, -+ .probe = edma_axi_probe, -+ .remove = edma_axi_remove, -+}; -+ -+module_platform_driver(edma_axi_driver); -+ -+MODULE_AUTHOR("Qualcomm Atheros Inc"); -+MODULE_DESCRIPTION("QCA ESS EDMA driver"); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c -@@ -0,0 +1,374 @@ -+/* -+ * Copyright (c) 2015 - 2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#include -+#include -+#include -+#include "edma.h" -+ -+struct edma_ethtool_stats { -+ uint8_t stat_string[ETH_GSTRING_LEN]; -+ uint32_t stat_offset; -+}; -+ -+#define EDMA_STAT(m) offsetof(struct edma_ethtool_statistics, m) -+#define DRVINFO_LEN 32 -+ -+/* Array of strings describing statistics -+ */ -+static const struct edma_ethtool_stats edma_gstrings_stats[] = { -+ {"tx_q0_pkt", EDMA_STAT(tx_q0_pkt)}, -+ {"tx_q1_pkt", EDMA_STAT(tx_q1_pkt)}, -+ {"tx_q2_pkt", EDMA_STAT(tx_q2_pkt)}, -+ {"tx_q3_pkt", EDMA_STAT(tx_q3_pkt)}, -+ {"tx_q4_pkt", EDMA_STAT(tx_q4_pkt)}, -+ {"tx_q5_pkt", EDMA_STAT(tx_q5_pkt)}, -+ {"tx_q6_pkt", EDMA_STAT(tx_q6_pkt)}, -+ {"tx_q7_pkt", EDMA_STAT(tx_q7_pkt)}, -+ {"tx_q8_pkt", EDMA_STAT(tx_q8_pkt)}, -+ {"tx_q9_pkt", EDMA_STAT(tx_q9_pkt)}, -+ {"tx_q10_pkt", EDMA_STAT(tx_q10_pkt)}, -+ {"tx_q11_pkt", EDMA_STAT(tx_q11_pkt)}, -+ {"tx_q12_pkt", EDMA_STAT(tx_q12_pkt)}, -+ {"tx_q13_pkt", EDMA_STAT(tx_q13_pkt)}, -+ {"tx_q14_pkt", EDMA_STAT(tx_q14_pkt)}, -+ {"tx_q15_pkt", EDMA_STAT(tx_q15_pkt)}, -+ {"tx_q0_byte", EDMA_STAT(tx_q0_byte)}, -+ {"tx_q1_byte", EDMA_STAT(tx_q1_byte)}, -+ {"tx_q2_byte", EDMA_STAT(tx_q2_byte)}, -+ {"tx_q3_byte", EDMA_STAT(tx_q3_byte)}, -+ {"tx_q4_byte", EDMA_STAT(tx_q4_byte)}, -+ {"tx_q5_byte", EDMA_STAT(tx_q5_byte)}, -+ {"tx_q6_byte", EDMA_STAT(tx_q6_byte)}, -+ {"tx_q7_byte", EDMA_STAT(tx_q7_byte)}, -+ {"tx_q8_byte", EDMA_STAT(tx_q8_byte)}, -+ {"tx_q9_byte", EDMA_STAT(tx_q9_byte)}, -+ {"tx_q10_byte", EDMA_STAT(tx_q10_byte)}, -+ {"tx_q11_byte", EDMA_STAT(tx_q11_byte)}, -+ {"tx_q12_byte", EDMA_STAT(tx_q12_byte)}, -+ {"tx_q13_byte", EDMA_STAT(tx_q13_byte)}, -+ {"tx_q14_byte", EDMA_STAT(tx_q14_byte)}, -+ {"tx_q15_byte", EDMA_STAT(tx_q15_byte)}, -+ {"rx_q0_pkt", EDMA_STAT(rx_q0_pkt)}, -+ {"rx_q1_pkt", EDMA_STAT(rx_q1_pkt)}, -+ {"rx_q2_pkt", EDMA_STAT(rx_q2_pkt)}, -+ {"rx_q3_pkt", EDMA_STAT(rx_q3_pkt)}, -+ {"rx_q4_pkt", EDMA_STAT(rx_q4_pkt)}, -+ {"rx_q5_pkt", EDMA_STAT(rx_q5_pkt)}, -+ {"rx_q6_pkt", EDMA_STAT(rx_q6_pkt)}, -+ {"rx_q7_pkt", EDMA_STAT(rx_q7_pkt)}, -+ {"rx_q0_byte", EDMA_STAT(rx_q0_byte)}, -+ {"rx_q1_byte", EDMA_STAT(rx_q1_byte)}, -+ {"rx_q2_byte", EDMA_STAT(rx_q2_byte)}, -+ {"rx_q3_byte", EDMA_STAT(rx_q3_byte)}, -+ {"rx_q4_byte", EDMA_STAT(rx_q4_byte)}, -+ {"rx_q5_byte", EDMA_STAT(rx_q5_byte)}, -+ {"rx_q6_byte", EDMA_STAT(rx_q6_byte)}, -+ {"rx_q7_byte", EDMA_STAT(rx_q7_byte)}, -+ {"tx_desc_error", EDMA_STAT(tx_desc_error)}, -+}; -+ -+#define EDMA_STATS_LEN ARRAY_SIZE(edma_gstrings_stats) -+ -+/* edma_get_strset_count() -+ * Get strset count -+ */ -+static int edma_get_strset_count(struct net_device *netdev, -+ int sset) -+{ -+ switch (sset) { -+ case ETH_SS_STATS: -+ return EDMA_STATS_LEN; -+ default: -+ netdev_dbg(netdev, "%s: Invalid string set", __func__); -+ return -EOPNOTSUPP; -+ } -+} -+ -+ -+/* edma_get_strings() -+ * get stats string -+ */ -+static void edma_get_strings(struct net_device *netdev, uint32_t stringset, -+ uint8_t *data) -+{ -+ uint8_t *p = data; -+ uint32_t i; -+ -+ switch (stringset) { -+ case ETH_SS_STATS: -+ for (i = 0; i < EDMA_STATS_LEN; i++) { -+ memcpy(p, edma_gstrings_stats[i].stat_string, -+ min((size_t)ETH_GSTRING_LEN, -+ strlen(edma_gstrings_stats[i].stat_string) -+ + 1)); -+ p += ETH_GSTRING_LEN; -+ } -+ break; -+ } -+} -+ -+/* edma_get_ethtool_stats() -+ * Get ethtool statistics -+ */ -+static void edma_get_ethtool_stats(struct net_device *netdev, -+ struct ethtool_stats *stats, uint64_t *data) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ struct edma_common_info *edma_cinfo = adapter->edma_cinfo; -+ int i; -+ uint8_t *p = NULL; -+ -+ edma_read_append_stats(edma_cinfo); -+ -+ for(i = 0; i < EDMA_STATS_LEN; i++) { -+ p = (uint8_t *)&(edma_cinfo->edma_ethstats) + -+ edma_gstrings_stats[i].stat_offset; -+ data[i] = *(uint32_t *)p; -+ } -+} -+ -+/* edma_get_drvinfo() -+ * get edma driver info -+ */ -+static void edma_get_drvinfo(struct net_device *dev, -+ struct ethtool_drvinfo *info) -+{ -+ strlcpy(info->driver, "ess_edma", DRVINFO_LEN); -+ strlcpy(info->bus_info, "axi", ETHTOOL_BUSINFO_LEN); -+} -+ -+/* edma_nway_reset() -+ * Reset the phy, if available. -+ */ -+static int edma_nway_reset(struct net_device *netdev) -+{ -+ return -EINVAL; -+} -+ -+/* edma_get_wol() -+ * get wake on lan info -+ */ -+static void edma_get_wol(struct net_device *netdev, -+ struct ethtool_wolinfo *wol) -+{ -+ wol->supported = 0; -+ wol->wolopts = 0; -+} -+ -+/* edma_get_msglevel() -+ * get message level. -+ */ -+static uint32_t edma_get_msglevel(struct net_device *netdev) -+{ -+ return 0; -+} -+ -+/* edma_get_settings() -+ * Get edma settings -+ */ -+static int edma_get_settings(struct net_device *netdev, -+ struct ethtool_cmd *ecmd) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ -+ if (adapter->poll_required) { -+ struct phy_device *phydev = NULL; -+ uint16_t phyreg; -+ -+ if ((adapter->forced_speed != SPEED_UNKNOWN) -+ && !(adapter->poll_required)) -+ return -EPERM; -+ -+ phydev = adapter->phydev; -+ -+ ecmd->advertising = phydev->advertising; -+ ecmd->autoneg = phydev->autoneg; -+ -+ if (adapter->link_state == __EDMA_LINKDOWN) { -+ ecmd->speed = SPEED_UNKNOWN; -+ ecmd->duplex = DUPLEX_UNKNOWN; -+ } else { -+ ecmd->speed = phydev->speed; -+ ecmd->duplex = phydev->duplex; -+ } -+ -+ ecmd->phy_address = adapter->phy_mdio_addr; -+ -+ phyreg = (uint16_t)phy_read(adapter->phydev, MII_LPA); -+ if (phyreg & LPA_10HALF) -+ ecmd->lp_advertising |= ADVERTISED_10baseT_Half; -+ -+ if (phyreg & LPA_10FULL) -+ ecmd->lp_advertising |= ADVERTISED_10baseT_Full; -+ -+ if (phyreg & LPA_100HALF) -+ ecmd->lp_advertising |= ADVERTISED_100baseT_Half; -+ -+ if (phyreg & LPA_100FULL) -+ ecmd->lp_advertising |= ADVERTISED_100baseT_Full; -+ -+ phyreg = (uint16_t)phy_read(adapter->phydev, MII_STAT1000); -+ if (phyreg & LPA_1000HALF) -+ ecmd->lp_advertising |= ADVERTISED_1000baseT_Half; -+ -+ if (phyreg & LPA_1000FULL) -+ ecmd->lp_advertising |= ADVERTISED_1000baseT_Full; -+ } else { -+ /* If the speed/duplex for this GMAC is forced and we -+ * are not polling for link state changes, return the -+ * values as specified by platform. This will be true -+ * for GMACs connected to switch, and interfaces that -+ * do not use a PHY. -+ */ -+ if (!(adapter->poll_required)) { -+ if (adapter->forced_speed != SPEED_UNKNOWN) { -+ /* set speed and duplex */ -+ ethtool_cmd_speed_set(ecmd, SPEED_1000); -+ ecmd->duplex = DUPLEX_FULL; -+ -+ /* Populate capabilities advertised by self */ -+ ecmd->advertising = 0; -+ ecmd->autoneg = 0; -+ ecmd->port = PORT_TP; -+ ecmd->transceiver = XCVR_EXTERNAL; -+ } else { -+ /* non link polled and non -+ * forced speed/duplex interface -+ */ -+ return -EIO; -+ } -+ } -+ } -+ -+ return 0; -+} -+ -+/* edma_set_settings() -+ * Set EDMA settings -+ */ -+static int edma_set_settings(struct net_device *netdev, -+ struct ethtool_cmd *ecmd) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ struct phy_device *phydev = NULL; -+ -+ if ((adapter->forced_speed != SPEED_UNKNOWN) && -+ !adapter->poll_required) -+ return -EPERM; -+ -+ phydev = adapter->phydev; -+ phydev->advertising = ecmd->advertising; -+ phydev->autoneg = ecmd->autoneg; -+ phydev->speed = ethtool_cmd_speed(ecmd); -+ phydev->duplex = ecmd->duplex; -+ -+ genphy_config_aneg(phydev); -+ -+ return 0; -+} -+ -+/* edma_get_coalesce -+ * get interrupt mitigation -+ */ -+static int edma_get_coalesce(struct net_device *netdev, -+ struct ethtool_coalesce *ec) -+{ -+ u32 reg_val; -+ -+ edma_get_tx_rx_coalesce(®_val); -+ -+ /* We read the Interrupt Moderation Timer(IMT) register value, -+ * use lower 16 bit for rx and higher 16 bit for Tx. We do a -+ * left shift by 1, because IMT resolution timer is 2usecs. -+ * Hence the value given by the register is multiplied by 2 to -+ * get the actual time in usecs. -+ */ -+ ec->tx_coalesce_usecs = (((reg_val >> 16) & 0xffff) << 1); -+ ec->rx_coalesce_usecs = ((reg_val & 0xffff) << 1); -+ -+ return 0; -+} -+ -+/* edma_set_coalesce -+ * set interrupt mitigation -+ */ -+static int edma_set_coalesce(struct net_device *netdev, -+ struct ethtool_coalesce *ec) -+{ -+ if (ec->tx_coalesce_usecs) -+ edma_change_tx_coalesce(ec->tx_coalesce_usecs); -+ if (ec->rx_coalesce_usecs) -+ edma_change_rx_coalesce(ec->rx_coalesce_usecs); -+ -+ return 0; -+} -+ -+/* edma_set_priv_flags() -+ * Set EDMA private flags -+ */ -+static int edma_set_priv_flags(struct net_device *netdev, u32 flags) -+{ -+ return 0; -+} -+ -+/* edma_get_priv_flags() -+ * get edma driver flags -+ */ -+static u32 edma_get_priv_flags(struct net_device *netdev) -+{ -+ return 0; -+} -+ -+/* edma_get_ringparam() -+ * get ring size -+ */ -+static void edma_get_ringparam(struct net_device *netdev, -+ struct ethtool_ringparam *ring) -+{ -+ struct edma_adapter *adapter = netdev_priv(netdev); -+ struct edma_common_info *edma_cinfo = adapter->edma_cinfo; -+ -+ ring->tx_max_pending = edma_cinfo->tx_ring_count; -+ ring->rx_max_pending = edma_cinfo->rx_ring_count; -+} -+ -+/* Ethtool operations -+ */ -+static const struct ethtool_ops edma_ethtool_ops = { -+ .get_drvinfo = &edma_get_drvinfo, -+ .get_link = ðtool_op_get_link, -+ .get_msglevel = &edma_get_msglevel, -+ .nway_reset = &edma_nway_reset, -+ .get_wol = &edma_get_wol, -+ .get_settings = &edma_get_settings, -+ .set_settings = &edma_set_settings, -+ .get_strings = &edma_get_strings, -+ .get_sset_count = &edma_get_strset_count, -+ .get_ethtool_stats = &edma_get_ethtool_stats, -+ .get_coalesce = &edma_get_coalesce, -+ .set_coalesce = &edma_set_coalesce, -+ .get_priv_flags = edma_get_priv_flags, -+ .set_priv_flags = edma_set_priv_flags, -+ .get_ringparam = edma_get_ringparam, -+}; -+ -+/* edma_set_ethtool_ops -+ * Set ethtool operations -+ */ -+void edma_set_ethtool_ops(struct net_device *netdev) -+{ -+ netdev->ethtool_ops = &edma_ethtool_ops; -+} ---- /dev/null -+++ b/drivers/net/ethernet/qualcomm/essedma/ess_edma.h -@@ -0,0 +1,332 @@ -+/* -+ * Copyright (c) 2014 - 2016, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for -+ * any purpose with or without fee is hereby granted, provided that the -+ * above copyright notice and this permission notice appear in all copies. -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT -+ * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#ifndef _ESS_EDMA_H_ -+#define _ESS_EDMA_H_ -+ -+#include -+ -+struct edma_adapter; -+struct edma_hw; -+ -+/* register definition */ -+#define EDMA_REG_MAS_CTRL 0x0 -+#define EDMA_REG_TIMEOUT_CTRL 0x004 -+#define EDMA_REG_DBG0 0x008 -+#define EDMA_REG_DBG1 0x00C -+#define EDMA_REG_SW_CTRL0 0x100 -+#define EDMA_REG_SW_CTRL1 0x104 -+ -+/* Interrupt Status Register */ -+#define EDMA_REG_RX_ISR 0x200 -+#define EDMA_REG_TX_ISR 0x208 -+#define EDMA_REG_MISC_ISR 0x210 -+#define EDMA_REG_WOL_ISR 0x218 -+ -+#define EDMA_MISC_ISR_RX_URG_Q(x) (1 << x) -+ -+#define EDMA_MISC_ISR_AXIR_TIMEOUT 0x00000100 -+#define EDMA_MISC_ISR_AXIR_ERR 0x00000200 -+#define EDMA_MISC_ISR_TXF_DEAD 0x00000400 -+#define EDMA_MISC_ISR_AXIW_ERR 0x00000800 -+#define EDMA_MISC_ISR_AXIW_TIMEOUT 0x00001000 -+ -+#define EDMA_WOL_ISR 0x00000001 -+ -+/* Interrupt Mask Register */ -+#define EDMA_REG_MISC_IMR 0x214 -+#define EDMA_REG_WOL_IMR 0x218 -+ -+#define EDMA_RX_IMR_NORMAL_MASK 0x1 -+#define EDMA_TX_IMR_NORMAL_MASK 0x1 -+#define EDMA_MISC_IMR_NORMAL_MASK 0x80001FFF -+#define EDMA_WOL_IMR_NORMAL_MASK 0x1 -+ -+/* Edma receive consumer index */ -+#define EDMA_REG_RX_SW_CONS_IDX_Q(x) (0x220 + ((x) << 2)) /* x is the queue id */ -+/* Edma transmit consumer index */ -+#define EDMA_REG_TX_SW_CONS_IDX_Q(x) (0x240 + ((x) << 2)) /* x is the queue id */ -+ -+/* IRQ Moderator Initial Timer Register */ -+#define EDMA_REG_IRQ_MODRT_TIMER_INIT 0x280 -+#define EDMA_IRQ_MODRT_TIMER_MASK 0xFFFF -+#define EDMA_IRQ_MODRT_RX_TIMER_SHIFT 0 -+#define EDMA_IRQ_MODRT_TX_TIMER_SHIFT 16 -+ -+/* Interrupt Control Register */ -+#define EDMA_REG_INTR_CTRL 0x284 -+#define EDMA_INTR_CLR_TYP_SHIFT 0 -+#define EDMA_INTR_SW_IDX_W_TYP_SHIFT 1 -+#define EDMA_INTR_CLEAR_TYPE_W1 0 -+#define EDMA_INTR_CLEAR_TYPE_R 1 -+ -+/* RX Interrupt Mask Register */ -+#define EDMA_REG_RX_INT_MASK_Q(x) (0x300 + ((x) << 2)) /* x = queue id */ -+ -+/* TX Interrupt mask register */ -+#define EDMA_REG_TX_INT_MASK_Q(x) (0x340 + ((x) << 2)) /* x = queue id */ -+ -+/* Load Ptr Register -+ * Software sets this bit after the initialization of the head and tail -+ */ -+#define EDMA_REG_TX_SRAM_PART 0x400 -+#define EDMA_LOAD_PTR_SHIFT 16 -+ -+/* TXQ Control Register */ -+#define EDMA_REG_TXQ_CTRL 0x404 -+#define EDMA_TXQ_CTRL_IP_OPTION_EN 0x10 -+#define EDMA_TXQ_CTRL_TXQ_EN 0x20 -+#define EDMA_TXQ_CTRL_ENH_MODE 0x40 -+#define EDMA_TXQ_CTRL_LS_8023_EN 0x80 -+#define EDMA_TXQ_CTRL_TPD_BURST_EN 0x100 -+#define EDMA_TXQ_CTRL_LSO_BREAK_EN 0x200 -+#define EDMA_TXQ_NUM_TPD_BURST_MASK 0xF -+#define EDMA_TXQ_TXF_BURST_NUM_MASK 0xFFFF -+#define EDMA_TXQ_NUM_TPD_BURST_SHIFT 0 -+#define EDMA_TXQ_TXF_BURST_NUM_SHIFT 16 -+ -+#define EDMA_REG_TXF_WATER_MARK 0x408 /* In 8-bytes */ -+#define EDMA_TXF_WATER_MARK_MASK 0x0FFF -+#define EDMA_TXF_LOW_WATER_MARK_SHIFT 0 -+#define EDMA_TXF_HIGH_WATER_MARK_SHIFT 16 -+#define EDMA_TXQ_CTRL_BURST_MODE_EN 0x80000000 -+ -+/* WRR Control Register */ -+#define EDMA_REG_WRR_CTRL_Q0_Q3 0x40c -+#define EDMA_REG_WRR_CTRL_Q4_Q7 0x410 -+#define EDMA_REG_WRR_CTRL_Q8_Q11 0x414 -+#define EDMA_REG_WRR_CTRL_Q12_Q15 0x418 -+ -+/* Weight round robin(WRR), it takes queue as input, and computes -+ * starting bits where we need to write the weight for a particular -+ * queue -+ */ -+#define EDMA_WRR_SHIFT(x) (((x) * 5) % 20) -+ -+/* Tx Descriptor Control Register */ -+#define EDMA_REG_TPD_RING_SIZE 0x41C -+#define EDMA_TPD_RING_SIZE_SHIFT 0 -+#define EDMA_TPD_RING_SIZE_MASK 0xFFFF -+ -+/* Transmit descriptor base address */ -+#define EDMA_REG_TPD_BASE_ADDR_Q(x) (0x420 + ((x) << 2)) /* x = queue id */ -+ -+/* TPD Index Register */ -+#define EDMA_REG_TPD_IDX_Q(x) (0x460 + ((x) << 2)) /* x = queue id */ -+ -+#define EDMA_TPD_PROD_IDX_BITS 0x0000FFFF -+#define EDMA_TPD_CONS_IDX_BITS 0xFFFF0000 -+#define EDMA_TPD_PROD_IDX_MASK 0xFFFF -+#define EDMA_TPD_CONS_IDX_MASK 0xFFFF -+#define EDMA_TPD_PROD_IDX_SHIFT 0 -+#define EDMA_TPD_CONS_IDX_SHIFT 16 -+ -+/* TX Virtual Queue Mapping Control Register */ -+#define EDMA_REG_VQ_CTRL0 0x4A0 -+#define EDMA_REG_VQ_CTRL1 0x4A4 -+ -+/* Virtual QID shift, it takes queue as input, and computes -+ * Virtual QID position in virtual qid control register -+ */ -+#define EDMA_VQ_ID_SHIFT(i) (((i) * 3) % 24) -+ -+/* Virtual Queue Default Value */ -+#define EDMA_VQ_REG_VALUE 0x240240 -+ -+/* Tx side Port Interface Control Register */ -+#define EDMA_REG_PORT_CTRL 0x4A8 -+#define EDMA_PAD_EN_SHIFT 15 -+ -+/* Tx side VLAN Configuration Register */ -+#define EDMA_REG_VLAN_CFG 0x4AC -+ -+#define EDMA_TX_CVLAN 16 -+#define EDMA_TX_INS_CVLAN 17 -+#define EDMA_TX_CVLAN_TAG_SHIFT 0 -+ -+#define EDMA_TX_SVLAN 14 -+#define EDMA_TX_INS_SVLAN 15 -+#define EDMA_TX_SVLAN_TAG_SHIFT 16 -+ -+/* Tx Queue Packet Statistic Register */ -+#define EDMA_REG_TX_STAT_PKT_Q(x) (0x700 + ((x) << 3)) /* x = queue id */ -+ -+#define EDMA_TX_STAT_PKT_MASK 0xFFFFFF -+ -+/* Tx Queue Byte Statistic Register */ -+#define EDMA_REG_TX_STAT_BYTE_Q(x) (0x704 + ((x) << 3)) /* x = queue id */ -+ -+/* Load Balance Based Ring Offset Register */ -+#define EDMA_REG_LB_RING 0x800 -+#define EDMA_LB_RING_ENTRY_MASK 0xff -+#define EDMA_LB_RING_ID_MASK 0x7 -+#define EDMA_LB_RING_PROFILE_ID_MASK 0x3 -+#define EDMA_LB_RING_ENTRY_BIT_OFFSET 8 -+#define EDMA_LB_RING_ID_OFFSET 0 -+#define EDMA_LB_RING_PROFILE_ID_OFFSET 3 -+#define EDMA_LB_REG_VALUE 0x6040200 -+ -+/* Load Balance Priority Mapping Register */ -+#define EDMA_REG_LB_PRI_START 0x804 -+#define EDMA_REG_LB_PRI_END 0x810 -+#define EDMA_LB_PRI_REG_INC 4 -+#define EDMA_LB_PRI_ENTRY_BIT_OFFSET 4 -+#define EDMA_LB_PRI_ENTRY_MASK 0xf -+ -+/* RSS Priority Mapping Register */ -+#define EDMA_REG_RSS_PRI 0x820 -+#define EDMA_RSS_PRI_ENTRY_MASK 0xf -+#define EDMA_RSS_RING_ID_MASK 0x7 -+#define EDMA_RSS_PRI_ENTRY_BIT_OFFSET 4 -+ -+/* RSS Indirection Register */ -+#define EDMA_REG_RSS_IDT(x) (0x840 + ((x) << 2)) /* x = No. of indirection table */ -+#define EDMA_NUM_IDT 16 -+#define EDMA_RSS_IDT_VALUE 0x64206420 -+ -+/* Default RSS Ring Register */ -+#define EDMA_REG_DEF_RSS 0x890 -+#define EDMA_DEF_RSS_MASK 0x7 -+ -+/* RSS Hash Function Type Register */ -+#define EDMA_REG_RSS_TYPE 0x894 -+#define EDMA_RSS_TYPE_NONE 0x01 -+#define EDMA_RSS_TYPE_IPV4TCP 0x02 -+#define EDMA_RSS_TYPE_IPV6_TCP 0x04 -+#define EDMA_RSS_TYPE_IPV4_UDP 0x08 -+#define EDMA_RSS_TYPE_IPV6UDP 0x10 -+#define EDMA_RSS_TYPE_IPV4 0x20 -+#define EDMA_RSS_TYPE_IPV6 0x40 -+#define EDMA_RSS_HASH_MODE_MASK 0x7f -+ -+#define EDMA_REG_RSS_HASH_VALUE 0x8C0 -+ -+#define EDMA_REG_RSS_TYPE_RESULT 0x8C4 -+ -+#define EDMA_HASH_TYPE_START 0 -+#define EDMA_HASH_TYPE_END 5 -+#define EDMA_HASH_TYPE_SHIFT 12 -+ -+#define EDMA_RFS_FLOW_ENTRIES 1024 -+#define EDMA_RFS_FLOW_ENTRIES_MASK (EDMA_RFS_FLOW_ENTRIES - 1) -+#define EDMA_RFS_EXPIRE_COUNT_PER_CALL 128 -+ -+/* RFD Base Address Register */ -+#define EDMA_REG_RFD_BASE_ADDR_Q(x) (0x950 + ((x) << 2)) /* x = queue id */ -+ -+/* RFD Index Register */ -+#define EDMA_REG_RFD_IDX_Q(x) (0x9B0 + ((x) << 2)) -+ -+#define EDMA_RFD_PROD_IDX_BITS 0x00000FFF -+#define EDMA_RFD_CONS_IDX_BITS 0x0FFF0000 -+#define EDMA_RFD_PROD_IDX_MASK 0xFFF -+#define EDMA_RFD_CONS_IDX_MASK 0xFFF -+#define EDMA_RFD_PROD_IDX_SHIFT 0 -+#define EDMA_RFD_CONS_IDX_SHIFT 16 -+ -+/* Rx Descriptor Control Register */ -+#define EDMA_REG_RX_DESC0 0xA10 -+#define EDMA_RFD_RING_SIZE_MASK 0xFFF -+#define EDMA_RX_BUF_SIZE_MASK 0xFFFF -+#define EDMA_RFD_RING_SIZE_SHIFT 0 -+#define EDMA_RX_BUF_SIZE_SHIFT 16 -+ -+#define EDMA_REG_RX_DESC1 0xA14 -+#define EDMA_RXQ_RFD_BURST_NUM_MASK 0x3F -+#define EDMA_RXQ_RFD_PF_THRESH_MASK 0x1F -+#define EDMA_RXQ_RFD_LOW_THRESH_MASK 0xFFF -+#define EDMA_RXQ_RFD_BURST_NUM_SHIFT 0 -+#define EDMA_RXQ_RFD_PF_THRESH_SHIFT 8 -+#define EDMA_RXQ_RFD_LOW_THRESH_SHIFT 16 -+ -+/* RXQ Control Register */ -+#define EDMA_REG_RXQ_CTRL 0xA18 -+#define EDMA_FIFO_THRESH_TYPE_SHIF 0 -+#define EDMA_FIFO_THRESH_128_BYTE 0x0 -+#define EDMA_FIFO_THRESH_64_BYTE 0x1 -+#define EDMA_RXQ_CTRL_RMV_VLAN 0x00000002 -+#define EDMA_RXQ_CTRL_EN 0x0000FF00 -+ -+/* AXI Burst Size Config */ -+#define EDMA_REG_AXIW_CTRL_MAXWRSIZE 0xA1C -+#define EDMA_AXIW_MAXWRSIZE_VALUE 0x0 -+ -+/* Rx Statistics Register */ -+#define EDMA_REG_RX_STAT_BYTE_Q(x) (0xA30 + ((x) << 2)) /* x = queue id */ -+#define EDMA_REG_RX_STAT_PKT_Q(x) (0xA50 + ((x) << 2)) /* x = queue id */ -+ -+/* WoL Pattern Length Register */ -+#define EDMA_REG_WOL_PATTERN_LEN0 0xC00 -+#define EDMA_WOL_PT_LEN_MASK 0xFF -+#define EDMA_WOL_PT0_LEN_SHIFT 0 -+#define EDMA_WOL_PT1_LEN_SHIFT 8 -+#define EDMA_WOL_PT2_LEN_SHIFT 16 -+#define EDMA_WOL_PT3_LEN_SHIFT 24 -+ -+#define EDMA_REG_WOL_PATTERN_LEN1 0xC04 -+#define EDMA_WOL_PT4_LEN_SHIFT 0 -+#define EDMA_WOL_PT5_LEN_SHIFT 8 -+#define EDMA_WOL_PT6_LEN_SHIFT 16 -+ -+/* WoL Control Register */ -+#define EDMA_REG_WOL_CTRL 0xC08 -+#define EDMA_WOL_WK_EN 0x00000001 -+#define EDMA_WOL_MG_EN 0x00000002 -+#define EDMA_WOL_PT0_EN 0x00000004 -+#define EDMA_WOL_PT1_EN 0x00000008 -+#define EDMA_WOL_PT2_EN 0x00000010 -+#define EDMA_WOL_PT3_EN 0x00000020 -+#define EDMA_WOL_PT4_EN 0x00000040 -+#define EDMA_WOL_PT5_EN 0x00000080 -+#define EDMA_WOL_PT6_EN 0x00000100 -+ -+/* MAC Control Register */ -+#define EDMA_REG_MAC_CTRL0 0xC20 -+#define EDMA_REG_MAC_CTRL1 0xC24 -+ -+/* WoL Pattern Register */ -+#define EDMA_REG_WOL_PATTERN_START 0x5000 -+#define EDMA_PATTERN_PART_REG_OFFSET 0x40 -+ -+ -+/* TX descriptor fields */ -+#define EDMA_TPD_HDR_SHIFT 0 -+#define EDMA_TPD_PPPOE_EN 0x00000100 -+#define EDMA_TPD_IP_CSUM_EN 0x00000200 -+#define EDMA_TPD_TCP_CSUM_EN 0x0000400 -+#define EDMA_TPD_UDP_CSUM_EN 0x00000800 -+#define EDMA_TPD_CUSTOM_CSUM_EN 0x00000C00 -+#define EDMA_TPD_LSO_EN 0x00001000 -+#define EDMA_TPD_LSO_V2_EN 0x00002000 -+#define EDMA_TPD_IPV4_EN 0x00010000 -+#define EDMA_TPD_MSS_MASK 0x1FFF -+#define EDMA_TPD_MSS_SHIFT 18 -+#define EDMA_TPD_CUSTOM_CSUM_SHIFT 18 -+ -+/* RRD descriptor fields */ -+#define EDMA_RRD_NUM_RFD_MASK 0x000F -+#define EDMA_RRD_SVLAN 0x8000 -+#define EDMA_RRD_FLOW_COOKIE_MASK 0x07FF; -+ -+#define EDMA_RRD_PKT_SIZE_MASK 0x3FFF -+#define EDMA_RRD_CSUM_FAIL_MASK 0xC000 -+#define EDMA_RRD_CVLAN 0x0001 -+#define EDMA_RRD_DESC_VALID 0x8000 -+ -+#define EDMA_RRD_PRIORITY_SHIFT 4 -+#define EDMA_RRD_PRIORITY_MASK 0x7 -+#define EDMA_RRD_PORT_TYPE_SHIFT 7 -+#define EDMA_RRD_PORT_TYPE_MASK 0x1F -+#endif /* _ESS_EDMA_H_ */ diff --git a/target/linux/ipq40xx/patches-4.9/711-dts-ipq4019-add-ethernet-essedma-node.patch b/target/linux/ipq40xx/patches-4.9/711-dts-ipq4019-add-ethernet-essedma-node.patch deleted file mode 100644 index 771ff2275..000000000 --- a/target/linux/ipq40xx/patches-4.9/711-dts-ipq4019-add-ethernet-essedma-node.patch +++ /dev/null @@ -1,92 +0,0 @@ -From c611d3780fa101662a822d10acf8feb04ca97409 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 20 Nov 2016 01:01:10 +0100 -Subject: [PATCH] dts: ipq4019: add ethernet essedma node - -This patch adds the device-tree node for the ethernet -interfaces. - -Note: The driver isn't anywhere close to be upstream, -so the info might change. - -Signed-off-by: Christian Lamparter ---- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 60 +++++++++++++++++++++++++++++++++++++ - 1 file changed, 60 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -26,6 +26,8 @@ - aliases { - spi0 = &spi_0; - i2c0 = &i2c_0; -+ ethernet0 = &gmac0; -+ ethernet1 = &gmac1; - }; - - cpus { -@@ -366,6 +368,64 @@ - status = "disabled"; - }; - -+ edma@c080000 { -+ compatible = "qcom,ess-edma"; -+ reg = <0xc080000 0x8000>; -+ qcom,page-mode = <0>; -+ qcom,rx_head_buf_size = <1540>; -+ qcom,mdio_supported; -+ qcom,poll_required = <1>; -+ qcom,num_gmac = <2>; -+ interrupts = <0 65 IRQ_TYPE_EDGE_RISING -+ 0 66 IRQ_TYPE_EDGE_RISING -+ 0 67 IRQ_TYPE_EDGE_RISING -+ 0 68 IRQ_TYPE_EDGE_RISING -+ 0 69 IRQ_TYPE_EDGE_RISING -+ 0 70 IRQ_TYPE_EDGE_RISING -+ 0 71 IRQ_TYPE_EDGE_RISING -+ 0 72 IRQ_TYPE_EDGE_RISING -+ 0 73 IRQ_TYPE_EDGE_RISING -+ 0 74 IRQ_TYPE_EDGE_RISING -+ 0 75 IRQ_TYPE_EDGE_RISING -+ 0 76 IRQ_TYPE_EDGE_RISING -+ 0 77 IRQ_TYPE_EDGE_RISING -+ 0 78 IRQ_TYPE_EDGE_RISING -+ 0 79 IRQ_TYPE_EDGE_RISING -+ 0 80 IRQ_TYPE_EDGE_RISING -+ 0 240 IRQ_TYPE_EDGE_RISING -+ 0 241 IRQ_TYPE_EDGE_RISING -+ 0 242 IRQ_TYPE_EDGE_RISING -+ 0 243 IRQ_TYPE_EDGE_RISING -+ 0 244 IRQ_TYPE_EDGE_RISING -+ 0 245 IRQ_TYPE_EDGE_RISING -+ 0 246 IRQ_TYPE_EDGE_RISING -+ 0 247 IRQ_TYPE_EDGE_RISING -+ 0 248 IRQ_TYPE_EDGE_RISING -+ 0 249 IRQ_TYPE_EDGE_RISING -+ 0 250 IRQ_TYPE_EDGE_RISING -+ 0 251 IRQ_TYPE_EDGE_RISING -+ 0 252 IRQ_TYPE_EDGE_RISING -+ 0 253 IRQ_TYPE_EDGE_RISING -+ 0 254 IRQ_TYPE_EDGE_RISING -+ 0 255 IRQ_TYPE_EDGE_RISING>; -+ -+ status = "disabled"; -+ -+ gmac0: gmac0 { -+ local-mac-address = [00 00 00 00 00 00]; -+ vlan_tag = <1 0x1f>; -+ }; -+ -+ gmac1: gmac1 { -+ local-mac-address = [00 00 00 00 00 00]; -+ qcom,phy_mdio_addr = <4>; -+ qcom,poll_required = <1>; -+ qcom,forced_speed = <1000>; -+ qcom,forced_duplex = <1>; -+ vlan_tag = <2 0x20>; -+ }; -+ }; -+ - usb3_ss_phy: ssphy@9a000 { - compatible = "qca,uni-ssphy"; - reg = <0x9a000 0x800>; diff --git a/target/linux/ipq40xx/patches-4.9/712-net-essedma-disable-default-vlan.patch b/target/linux/ipq40xx/patches-4.9/712-net-essedma-disable-default-vlan.patch deleted file mode 100644 index 2a1cade85..000000000 --- a/target/linux/ipq40xx/patches-4.9/712-net-essedma-disable-default-vlan.patch +++ /dev/null @@ -1,69 +0,0 @@ -From: Christian Lamparter -Subject: [PATCH] net: essedma: disable default vlan tagging -Date: Tue, 21 Mar 13:59:02 CET 2017 +0100 - -The essedma driver has its own unique take on VLAN management -and its configuration. In the original SDK, each VLAN is -assigned one virtual ethernet netdev. - -However, this is non-standard. So, this patch does away -with the default_vlan_tag property the driver is using -and therefore forces the user to use the kernel's vlan -feature. - -This patch also removes the "qcom,poll_required = <1>;" from -the essedma node. - -Signed-off-by: Christian Lamparter ---- ---- a/drivers/net/ethernet/qualcomm/essedma/edma.c -+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c -@@ -715,13 +715,11 @@ static void edma_rx_complete(struct edma - edma_receive_checksum(rd, skb); - - /* Process VLAN HW acceleration indication provided by HW */ -- if (unlikely(adapter->default_vlan_tag != rd->rrd4)) { -- vlan = rd->rrd4; -- if (likely(rd->rrd7 & EDMA_RRD_CVLAN)) -- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); -- else if (rd->rrd1 & EDMA_RRD_SVLAN) -- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan); -- } -+ vlan = rd->rrd4; -+ if (likely(rd->rrd7 & EDMA_RRD_CVLAN)) -+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan); -+ else if (rd->rrd1 & EDMA_RRD_SVLAN) -+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan); - - /* Update rx statistics */ - adapter->stats.rx_packets++; -@@ -1390,8 +1388,6 @@ netdev_tx_t edma_xmit(struct sk_buff *sk - /* Check and mark VLAN tag offload */ - if (skb_vlan_tag_present(skb)) - flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG; -- else if (adapter->default_vlan_tag) -- flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG; - - /* Check and mark checksum offload */ - if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -404,8 +404,7 @@ - qcom,page-mode = <0>; - qcom,rx_head_buf_size = <1540>; - qcom,mdio_supported; -- qcom,poll_required = <1>; -- qcom,num_gmac = <2>; -+ qcom,num_gmac = <1>; - interrupts = <0 65 IRQ_TYPE_EDGE_RISING - 0 66 IRQ_TYPE_EDGE_RISING - 0 67 IRQ_TYPE_EDGE_RISING -@@ -443,7 +442,7 @@ - - gmac0: gmac0 { - local-mac-address = [00 00 00 00 00 00]; -- vlan_tag = <1 0x1f>; -+ vlan_tag = <1 0x3f>; - }; - - gmac1: gmac1 { diff --git a/target/linux/ipq40xx/patches-4.9/820-qcom-ipq4019-Add-IPQ4019-USB-HS-SS-PHY-drivers.patch b/target/linux/ipq40xx/patches-4.9/820-qcom-ipq4019-Add-IPQ4019-USB-HS-SS-PHY-drivers.patch deleted file mode 100644 index 3636c5ca0..000000000 --- a/target/linux/ipq40xx/patches-4.9/820-qcom-ipq4019-Add-IPQ4019-USB-HS-SS-PHY-drivers.patch +++ /dev/null @@ -1,429 +0,0 @@ -From e73682ec4455c34f3f3edc7f40d90ed297521012 Mon Sep 17 00:00:00 2001 -From: Senthilkumar N L -Date: Tue, 6 Jan 2015 12:52:23 +0530 -Subject: [PATCH] qcom: ipq4019: Add IPQ4019 USB HS/SS PHY drivers - -These drivers handles control and configuration of the HS -and SS USB PHY transceivers. - -Signed-off-by: Senthilkumar N L -Signed-off-by: Christian Lamparter - ---- -Changed: - - replaced spaces with tabs - - remove emulation and host variables ---- - drivers/usb/phy/Kconfig | 11 ++ - drivers/usb/phy/Makefile | 2 + - drivers/usb/phy/phy-qca-baldur.c | 233 +++++++++++++++++++++++++++++++++++++++ - drivers/usb/phy/phy-qca-uniphy.c | 141 +++++++++++++++++++++++ - 4 files changed, 387 insertions(+) - create mode 100644 drivers/usb/phy/phy-qca-baldur.c - create mode 100644 drivers/usb/phy/phy-qca-uniphy.c - ---- a/drivers/usb/phy/Kconfig -+++ b/drivers/usb/phy/Kconfig -@@ -194,6 +194,17 @@ config USB_MXS_PHY - - MXS Phy is used by some of the i.MX SoCs, for example imx23/28/6x. - -+config USB_IPQ4019_PHY -+ tristate "IPQ4019 PHY wrappers support" -+ depends on (USB || USB_GADGET) && ARCH_QCOM -+ select USB_PHY -+ help -+ Enable this to support the USB PHY transceivers on QCA961x chips. -+ It handles PHY initialization, clock management required after -+ resetting the hardware and power management. -+ This driver is required even for peripheral only or host only -+ mode configurations. -+ - config USB_ULPI - bool "Generic ULPI Transceiver Driver" - depends on ARM || ARM64 ---- a/drivers/usb/phy/Makefile -+++ b/drivers/usb/phy/Makefile -@@ -21,6 +21,8 @@ obj-$(CONFIG_USB_GPIO_VBUS) += phy-gpio - obj-$(CONFIG_USB_ISP1301) += phy-isp1301.o - obj-$(CONFIG_USB_MSM_OTG) += phy-msm-usb.o - obj-$(CONFIG_USB_QCOM_8X16_PHY) += phy-qcom-8x16-usb.o -+obj-$(CONFIG_USB_IPQ4019_PHY) += phy-qca-baldur.o -+obj-$(CONFIG_USB_IPQ4019_PHY) += phy-qca-uniphy.o - obj-$(CONFIG_USB_MV_OTG) += phy-mv-usb.o - obj-$(CONFIG_USB_MXS_PHY) += phy-mxs-usb.o - obj-$(CONFIG_USB_ULPI) += phy-ulpi.o ---- /dev/null -+++ b/drivers/usb/phy/phy-qca-baldur.c -@@ -0,0 +1,233 @@ -+/* Copyright (c) 2015, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/** -+ * USB Hardware registers -+ */ -+#define PHY_CTRL0_ADDR 0x000 -+#define PHY_CTRL1_ADDR 0x004 -+#define PHY_CTRL2_ADDR 0x008 -+#define PHY_CTRL3_ADDR 0x00C -+#define PHY_CTRL4_ADDR 0x010 -+#define PHY_MISC_ADDR 0x024 -+#define PHY_IPG_ADDR 0x030 -+ -+#define PHY_CTRL0_VAL 0xA4600015 -+#define PHY_CTRL1_VAL 0x09500000 -+#define PHY_CTRL2_VAL 0x00058180 -+#define PHY_CTRL3_VAL 0x6DB6DCD6 -+#define PHY_CTRL4_VAL 0x836DB6DB -+#define PHY_MISC_VAL 0x3803FB0C -+#define PHY_IPG_VAL 0x47323232 -+ -+#define USB30_HS_PHY_HOST_MODE (0x01 << 21) -+#define USB20_HS_PHY_HOST_MODE (0x01 << 5) -+ -+/* used to differentiate between USB3 HS and USB2 HS PHY */ -+struct qca_baldur_hs_data { -+ unsigned int usb3_hs_phy; -+ unsigned int phy_config_offset; -+}; -+ -+struct qca_baldur_hs_phy { -+ struct device *dev; -+ struct usb_phy phy; -+ -+ void __iomem *base; -+ void __iomem *qscratch_base; -+ -+ struct reset_control *por_rst; -+ struct reset_control *srif_rst; -+ -+ const struct qca_baldur_hs_data *data; -+}; -+ -+#define phy_to_dw_phy(x) container_of((x), struct qca_baldur_hs_phy, phy) -+ -+static int qca_baldur_phy_read(struct usb_phy *x, u32 reg) -+{ -+ struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x); -+ -+ return readl(phy->base + reg); -+} -+ -+static int qca_baldur_phy_write(struct usb_phy *x, u32 val, u32 reg) -+{ -+ struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x); -+ -+ writel(val, phy->base + reg); -+ return 0; -+} -+ -+static int qca_baldur_hs_phy_init(struct usb_phy *x) -+{ -+ struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x); -+ -+ /* assert HS PHY POR reset */ -+ reset_control_assert(phy->por_rst); -+ msleep(10); -+ -+ /* assert HS PHY SRIF reset */ -+ reset_control_assert(phy->srif_rst); -+ msleep(10); -+ -+ /* deassert HS PHY SRIF reset and program HS PHY registers */ -+ reset_control_deassert(phy->srif_rst); -+ msleep(10); -+ -+ /* perform PHY register writes */ -+ writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR); -+ writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR); -+ writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR); -+ writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR); -+ writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR); -+ writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR); -+ writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR); -+ -+ msleep(10); -+ -+ /* de-assert USB3 HS PHY POR reset */ -+ reset_control_deassert(phy->por_rst); -+ -+ return 0; -+} -+ -+static int qca_baldur_hs_get_resources(struct qca_baldur_hs_phy *phy) -+{ -+ struct platform_device *pdev = to_platform_device(phy->dev); -+ struct resource *res; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ phy->base = devm_ioremap_resource(phy->dev, res); -+ if (IS_ERR(phy->base)) -+ return PTR_ERR(phy->base); -+ -+ phy->por_rst = devm_reset_control_get(phy->dev, "por_rst"); -+ if (IS_ERR(phy->por_rst)) -+ return PTR_ERR(phy->por_rst); -+ -+ phy->srif_rst = devm_reset_control_get(phy->dev, "srif_rst"); -+ if (IS_ERR(phy->srif_rst)) -+ return PTR_ERR(phy->srif_rst); -+ -+ return 0; -+} -+ -+static void qca_baldur_hs_put_resources(struct qca_baldur_hs_phy *phy) -+{ -+ reset_control_assert(phy->srif_rst); -+ reset_control_assert(phy->por_rst); -+} -+ -+static int qca_baldur_hs_remove(struct platform_device *pdev) -+{ -+ struct qca_baldur_hs_phy *phy = platform_get_drvdata(pdev); -+ -+ usb_remove_phy(&phy->phy); -+ return 0; -+} -+ -+static void qca_baldur_hs_phy_shutdown(struct usb_phy *x) -+{ -+ struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x); -+ -+ qca_baldur_hs_put_resources(phy); -+} -+ -+static struct usb_phy_io_ops qca_baldur_io_ops = { -+ .read = qca_baldur_phy_read, -+ .write = qca_baldur_phy_write, -+}; -+ -+static const struct qca_baldur_hs_data usb3_hs_data = { -+ .usb3_hs_phy = 1, -+ .phy_config_offset = USB30_HS_PHY_HOST_MODE, -+}; -+ -+static const struct qca_baldur_hs_data usb2_hs_data = { -+ .usb3_hs_phy = 0, -+ .phy_config_offset = USB20_HS_PHY_HOST_MODE, -+}; -+ -+static const struct of_device_id qca_baldur_hs_id_table[] = { -+ { .compatible = "qca,baldur-usb3-hsphy", .data = &usb3_hs_data }, -+ { .compatible = "qca,baldur-usb2-hsphy", .data = &usb2_hs_data }, -+ { /* Sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, qca_baldur_hs_id_table); -+ -+static int qca_baldur_hs_probe(struct platform_device *pdev) -+{ -+ const struct of_device_id *match; -+ struct qca_baldur_hs_phy *phy; -+ int err; -+ -+ match = of_match_device(qca_baldur_hs_id_table, &pdev->dev); -+ if (!match) -+ return -ENODEV; -+ -+ phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); -+ if (!phy) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, phy); -+ phy->dev = &pdev->dev; -+ -+ phy->data = match->data; -+ -+ err = qca_baldur_hs_get_resources(phy); -+ if (err < 0) { -+ dev_err(&pdev->dev, "failed to request resources: %d\n", err); -+ return err; -+ } -+ -+ phy->phy.dev = phy->dev; -+ phy->phy.label = "qca-baldur-hsphy"; -+ phy->phy.init = qca_baldur_hs_phy_init; -+ phy->phy.shutdown = qca_baldur_hs_phy_shutdown; -+ phy->phy.type = USB_PHY_TYPE_USB2; -+ phy->phy.io_ops = &qca_baldur_io_ops; -+ -+ err = usb_add_phy_dev(&phy->phy); -+ return err; -+} -+ -+static struct platform_driver qca_baldur_hs_driver = { -+ .probe = qca_baldur_hs_probe, -+ .remove = qca_baldur_hs_remove, -+ .driver = { -+ .name = "qca-baldur-hsphy", -+ .owner = THIS_MODULE, -+ .of_match_table = qca_baldur_hs_id_table, -+ }, -+}; -+ -+module_platform_driver(qca_baldur_hs_driver); -+ -+MODULE_ALIAS("platform:qca-baldur-hsphy"); -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_DESCRIPTION("USB3 QCA BALDUR HSPHY driver"); ---- /dev/null -+++ b/drivers/usb/phy/phy-qca-uniphy.c -@@ -0,0 +1,135 @@ -+/* Copyright (c) 2015, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct qca_uni_ss_phy { -+ struct usb_phy phy; -+ struct device *dev; -+ -+ void __iomem *base; -+ -+ struct reset_control *por_rst; -+}; -+ -+#define phy_to_dw_phy(x) container_of((x), struct qca_uni_ss_phy, phy) -+ -+static void qca_uni_ss_phy_shutdown(struct usb_phy *x) -+{ -+ struct qca_uni_ss_phy *phy = phy_to_dw_phy(x); -+ -+ /* assert SS PHY POR reset */ -+ reset_control_assert(phy->por_rst); -+} -+ -+static int qca_uni_ss_phy_init(struct usb_phy *x) -+{ -+ struct qca_uni_ss_phy *phy = phy_to_dw_phy(x); -+ -+ /* assert SS PHY POR reset */ -+ reset_control_assert(phy->por_rst); -+ -+ msleep(20); -+ -+ /* deassert SS PHY POR reset */ -+ reset_control_deassert(phy->por_rst); -+ -+ return 0; -+} -+ -+static int qca_uni_ss_get_resources(struct platform_device *pdev, -+ struct qca_uni_ss_phy *phy) -+{ -+ struct resource *res; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ phy->base = devm_ioremap_resource(phy->dev, res); -+ if (IS_ERR(phy->base)) -+ return PTR_ERR(phy->base); -+ -+ phy->por_rst = devm_reset_control_get(phy->dev, "por_rst"); -+ if (IS_ERR(phy->por_rst)) -+ return PTR_ERR(phy->por_rst); -+ -+ return 0; -+} -+ -+static int qca_uni_ss_remove(struct platform_device *pdev) -+{ -+ struct qca_uni_ss_phy *phy = platform_get_drvdata(pdev); -+ -+ usb_remove_phy(&phy->phy); -+ return 0; -+} -+ -+static const struct of_device_id qca_uni_ss_id_table[] = { -+ { .compatible = "qca,uni-ssphy" }, -+ { /* Sentinel */ } -+}; -+MODULE_DEVICE_TABLE(of, qca_uni_ss_id_table); -+ -+static int qca_uni_ss_probe(struct platform_device *pdev) -+{ -+ struct qca_uni_ss_phy *phy; -+ int ret; -+ -+ phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); -+ if (!phy) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, phy); -+ phy->dev = &pdev->dev; -+ -+ ret = qca_uni_ss_get_resources(pdev, phy); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "failed to request resources: %d\n", ret); -+ return ret; -+ } -+ -+ phy->phy.dev = phy->dev; -+ phy->phy.label = "qca-uni-ssphy"; -+ phy->phy.init = qca_uni_ss_phy_init; -+ phy->phy.shutdown = qca_uni_ss_phy_shutdown; -+ phy->phy.type = USB_PHY_TYPE_USB3; -+ -+ ret = usb_add_phy_dev(&phy->phy); -+ return ret; -+} -+ -+static struct platform_driver qca_uni_ss_driver = { -+ .probe = qca_uni_ss_probe, -+ .remove = qca_uni_ss_remove, -+ .driver = { -+ .name = "qca-uni-ssphy", -+ .owner = THIS_MODULE, -+ .of_match_table = qca_uni_ss_id_table, -+ }, -+}; -+ -+module_platform_driver(qca_uni_ss_driver); -+ -+MODULE_ALIAS("platform:qca-uni-ssphy"); -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_DESCRIPTION("USB3 QCA UNI SSPHY driver"); diff --git a/target/linux/ipq40xx/patches-4.9/830-usb-dwc3-register-qca-ipq4019-dwc3-in-dwc3-of-simple.patch b/target/linux/ipq40xx/patches-4.9/830-usb-dwc3-register-qca-ipq4019-dwc3-in-dwc3-of-simple.patch deleted file mode 100644 index 18591b205..000000000 --- a/target/linux/ipq40xx/patches-4.9/830-usb-dwc3-register-qca-ipq4019-dwc3-in-dwc3-of-simple.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 08c18ab774368feb610d1eb952957bb1bb35129f Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sat, 19 Nov 2016 00:52:35 +0100 -Subject: [PATCH 37/38] usb: dwc3: register qca,ipq4019-dwc3 in dwc3-of-simple - -For host mode, the dwc3 found in the IPQ4019 can be driven -by the dwc3-of-simple module. It will get more tricky for -OTG since they'll need to enable VBUS and reconfigure the -registers. - -Signed-off-by: Christian Lamparter ---- - drivers/usb/dwc3/dwc3-of-simple.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/usb/dwc3/dwc3-of-simple.c -+++ b/drivers/usb/dwc3/dwc3-of-simple.c -@@ -174,6 +174,7 @@ static const struct dev_pm_ops dwc3_of_s - - static const struct of_device_id of_dwc3_simple_match[] = { - { .compatible = "qcom,dwc3" }, -+ { .compatible = "qca,ipq4019-dwc3" }, - { .compatible = "rockchip,rk3399-dwc3" }, - { .compatible = "xlnx,zynqmp-dwc3" }, - { .compatible = "cavium,octeon-7130-usb-uctl" }, diff --git a/target/linux/ipq40xx/patches-4.9/850-soc-add-qualcomm-syscon.patch b/target/linux/ipq40xx/patches-4.9/850-soc-add-qualcomm-syscon.patch deleted file mode 100644 index beb85e7ef..000000000 --- a/target/linux/ipq40xx/patches-4.9/850-soc-add-qualcomm-syscon.patch +++ /dev/null @@ -1,177 +0,0 @@ -From: Christian Lamparter -Subject: SoC: add qualcomm syscon ---- a/drivers/soc/qcom/Makefile -+++ b/drivers/soc/qcom/Makefile -@@ -7,3 +7,4 @@ obj-$(CONFIG_QCOM_SMEM_STATE) += smem_st - obj-$(CONFIG_QCOM_SMP2P) += smp2p.o - obj-$(CONFIG_QCOM_SMSM) += smsm.o - obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o -+obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o ---- a/drivers/soc/qcom/Kconfig -+++ b/drivers/soc/qcom/Kconfig -@@ -70,6 +70,13 @@ config QCOM_SMSM - Say yes here to support the Qualcomm Shared Memory State Machine. - The state machine is represented by bits in shared memory. - -+config QCOM_TCSR -+ tristate "QCOM Top Control and Status Registers" -+ depends on ARCH_QCOM -+ help -+ Say y here to enable TCSR support. The TCSR provides control -+ functions for various peripherals. -+ - config QCOM_WCNSS_CTRL - tristate "Qualcomm WCNSS control driver" - depends on QCOM_SMD ---- /dev/null -+++ b/drivers/soc/qcom/qcom_tcsr.c -@@ -0,0 +1,98 @@ -+/* -+ * Copyright (c) 2014, The Linux foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License rev 2 and -+ * only rev 2 as published by the free Software foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define TCSR_USB_PORT_SEL 0xb0 -+#define TCSR_USB_HSPHY_CONFIG 0xC -+ -+#define TCSR_ESS_INTERFACE_SEL_OFFSET 0x0 -+#define TCSR_ESS_INTERFACE_SEL_MASK 0xf -+ -+#define TCSR_WIFI0_GLB_CFG_OFFSET 0x0 -+#define TCSR_WIFI1_GLB_CFG_OFFSET 0x4 -+#define TCSR_PNOC_SNOC_MEMTYPE_M0_M2 0x4 -+ -+static int tcsr_probe(struct platform_device *pdev) -+{ -+ struct resource *res; -+ const struct device_node *node = pdev->dev.of_node; -+ void __iomem *base; -+ u32 val; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) { -+ dev_err(&pdev->dev, "setting usb port select = %d\n", val); -+ writel(val, base + TCSR_USB_PORT_SEL); -+ } -+ -+ if (!of_property_read_u32(node, "qcom,usb-hsphy-mode-select", &val)) { -+ dev_info(&pdev->dev, "setting usb hs phy mode select = %x\n", val); -+ writel(val, base + TCSR_USB_HSPHY_CONFIG); -+ } -+ -+ if (!of_property_read_u32(node, "qcom,ess-interface-select", &val)) { -+ u32 tmp = 0; -+ dev_info(&pdev->dev, "setting ess interface select = %x\n", val); -+ tmp = readl(base + TCSR_ESS_INTERFACE_SEL_OFFSET); -+ tmp = tmp & (~TCSR_ESS_INTERFACE_SEL_MASK); -+ tmp = tmp | (val&TCSR_ESS_INTERFACE_SEL_MASK); -+ writel(tmp, base + TCSR_ESS_INTERFACE_SEL_OFFSET); -+ } -+ -+ if (!of_property_read_u32(node, "qcom,wifi_glb_cfg", &val)) { -+ dev_info(&pdev->dev, "setting wifi_glb_cfg = %x\n", val); -+ writel(val, base + TCSR_WIFI0_GLB_CFG_OFFSET); -+ writel(val, base + TCSR_WIFI1_GLB_CFG_OFFSET); -+ } -+ -+ if (!of_property_read_u32(node, "qcom,wifi_noc_memtype_m0_m2", &val)) { -+ dev_info(&pdev->dev, -+ "setting wifi_noc_memtype_m0_m2 = %x\n", val); -+ writel(val, base + TCSR_PNOC_SNOC_MEMTYPE_M0_M2); -+ } -+ -+ return 0; -+} -+ -+static const struct of_device_id tcsr_dt_match[] = { -+ { .compatible = "qcom,tcsr", }, -+ { }, -+}; -+ -+MODULE_DEVICE_TABLE(of, tcsr_dt_match); -+ -+static struct platform_driver tcsr_driver = { -+ .driver = { -+ .name = "tcsr", -+ .owner = THIS_MODULE, -+ .of_match_table = tcsr_dt_match, -+ }, -+ .probe = tcsr_probe, -+}; -+ -+module_platform_driver(tcsr_driver); -+ -+MODULE_AUTHOR("Andy Gross "); -+MODULE_DESCRIPTION("QCOM TCSR driver"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/include/dt-bindings/soc/qcom,tcsr.h -@@ -0,0 +1,48 @@ -+/* Copyright (c) 2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#ifndef __DT_BINDINGS_QCOM_TCSR_H -+#define __DT_BINDINGS_QCOM_TCSR_H -+ -+#define TCSR_USB_SELECT_USB3_P0 0x1 -+#define TCSR_USB_SELECT_USB3_P1 0x2 -+#define TCSR_USB_SELECT_USB3_DUAL 0x3 -+ -+/* IPQ40xx HS PHY Mode Select */ -+#define TCSR_USB_HSPHY_HOST_MODE 0x00E700E7 -+#define TCSR_USB_HSPHY_DEVICE_MODE 0x00C700E7 -+ -+/* IPQ40xx ess interface mode select */ -+#define TCSR_ESS_PSGMII 0 -+#define TCSR_ESS_PSGMII_RGMII5 1 -+#define TCSR_ESS_PSGMII_RMII0 2 -+#define TCSR_ESS_PSGMII_RMII1 4 -+#define TCSR_ESS_PSGMII_RMII0_RMII1 6 -+#define TCSR_ESS_PSGMII_RGMII4 9 -+ -+/* -+ * IPQ40xx WiFi Global Config -+ * Bit 30:AXID_EN -+ * Enable AXI master bus Axid translating to confirm all txn submitted by order -+ * Bit 24: Use locally generated socslv_wxi_bvalid -+ * 1: use locally generate socslv_wxi_bvalid for performance. -+ * 0: use SNOC socslv_wxi_bvalid. -+ */ -+#define TCSR_WIFI_GLB_CFG 0x41000000 -+ -+/* IPQ40xx MEM_TYPE_SEL_M0_M2 Select Bit 26:24 - 2 NORMAL */ -+#define TCSR_WIFI_NOC_MEMTYPE_M0_M2 0x02222222 -+ -+/* TCSR A/B REG */ -+#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0 -+#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1 -+ -+#endif diff --git a/target/linux/ipq40xx/patches-4.9/852-ipq4019-pinctrl-Updated-various-Pin-definitions.patch b/target/linux/ipq40xx/patches-4.9/852-ipq4019-pinctrl-Updated-various-Pin-definitions.patch deleted file mode 100644 index d0a6a26a5..000000000 --- a/target/linux/ipq40xx/patches-4.9/852-ipq4019-pinctrl-Updated-various-Pin-definitions.patch +++ /dev/null @@ -1,1328 +0,0 @@ -From fc6cf61517b8b4ab4678659936fc7572f699d6e7 Mon Sep 17 00:00:00 2001 -From: Ram Chandra Jangir -Date: Tue, 28 Mar 2017 14:00:00 +0530 -Subject: [PATCH] ipq4019: pinctrl: Updated various Pin definitions - -Populate default values for various GPIO functions - -Signed-off-by: Ram Chandra Jangir ---- - drivers/pinctrl/qcom/pinctrl-ipq4019.c | 1189 +++++++++++++++++++++++++++++--- - 1 file changed, 1111 insertions(+), 78 deletions(-) - ---- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c -+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c -@@ -276,16 +276,531 @@ DECLARE_QCA_GPIO_PINS(99); - - - enum ipq4019_functions { -+ qca_mux_rmii0_refclk, -+ qca_mux_wifi0_rfsilient0, -+ qca_mux_wifi1_rfsilient0, -+ qca_mux_smart2, -+ qca_mux_led4, -+ qca_mux_wifi0_cal, -+ qca_mux_wifi1_cal, -+ qca_mux_wifi_wci0, -+ qca_mux_rmii0_dv, -+ qca_mux_wifi_wci1, -+ qca_mux_rmii1_refclk, -+ qca_mux_blsp_spi1, -+ qca_mux_led5, -+ qca_mux_rmii10, -+ qca_mux_led6, -+ qca_mux_rmii11, -+ qca_mux_led7, -+ qca_mux_rmii1_dv, -+ qca_mux_led8, -+ qca_mux_rmii1_tx, -+ qca_mux_aud_pin, -+ qca_mux_led9, -+ qca_mux_rmii1_rx, -+ qca_mux_led10, -+ qca_mux_wifi0_rfsilient1, -+ qca_mux_wifi1_rfsilient1, -+ qca_mux_led11, -+ qca_mux_boot7, -+ qca_mux_qpic_pad, -+ qca_mux_pcie_clk, -+ qca_mux_tm_clk0, -+ qca_mux_wifi00, -+ qca_mux_wifi10, -+ qca_mux_mdio1, -+ qca_mux_prng_rosc, -+ qca_mux_dbg_out, -+ qca_mux_tm0, -+ qca_mux_wifi01, -+ qca_mux_wifi11, -+ qca_mux_atest_char3, -+ qca_mux_pmu0, -+ qca_mux_boot8, -+ qca_mux_tm1, -+ qca_mux_atest_char2, -+ qca_mux_pmu1, -+ qca_mux_boot9, -+ qca_mux_tm2, -+ qca_mux_atest_char1, -+ qca_mux_tm_ack, -+ qca_mux_wifi03, -+ qca_mux_wifi13, -+ qca_mux_qpic_pad4, -+ qca_mux_atest_char0, -+ qca_mux_tm3, -+ qca_mux_wifi02, -+ qca_mux_wifi12, -+ qca_mux_qpic_pad5, -+ qca_mux_smart3, -+ qca_mux_wcss0_dbg14, -+ qca_mux_tm4, -+ qca_mux_wifi04, -+ qca_mux_wifi14, -+ qca_mux_qpic_pad6, -+ qca_mux_wcss0_dbg15, -+ qca_mux_qdss_tracectl_a, -+ qca_mux_boot18, -+ qca_mux_tm5, -+ qca_mux_qpic_pad7, -+ qca_mux_atest_char, -+ qca_mux_wcss0_dbg4, -+ qca_mux_qdss_traceclk_a, -+ qca_mux_boot19, -+ qca_mux_tm6, -+ qca_mux_wcss0_dbg5, -+ qca_mux_qdss_cti_trig_out_a0, -+ qca_mux_boot14, -+ qca_mux_tm7, -+ qca_mux_chip_rst, -+ qca_mux_wcss0_dbg6, -+ qca_mux_qdss_cti_trig_out_b0, -+ qca_mux_boot11, -+ qca_mux_tm8, -+ qca_mux_wcss0_dbg7, -+ qca_mux_wcss1_dbg7, -+ qca_mux_boot20, -+ qca_mux_tm9, -+ qca_mux_qpic_pad1, -+ qca_mux_wcss0_dbg8, -+ qca_mux_wcss1_dbg8, -+ qca_mux_qpic_pad2, -+ qca_mux_wcss0_dbg9, -+ qca_mux_wcss1_dbg9, -+ qca_mux_qpic_pad3, -+ qca_mux_wcss0_dbg10, -+ qca_mux_wcss1_dbg10, -+ qca_mux_qpic_pad0, -+ qca_mux_wcss0_dbg11, -+ qca_mux_wcss1_dbg11, -+ qca_mux_qpic_pad8, -+ qca_mux_wcss0_dbg12, -+ qca_mux_wcss1_dbg12, -+ qca_mux_wifi034, -+ qca_mux_wifi134, -+ qca_mux_jtag_tdi, - qca_mux_gpio, -+ qca_mux_i2s_rx_bclk, -+ qca_mux_jtag_tck, -+ qca_mux_i2s_rx_fsync, -+ qca_mux_jtag_tms, -+ qca_mux_i2s_rxd, -+ qca_mux_smart0, -+ qca_mux_jtag_tdo, -+ qca_mux_jtag_rst, -+ qca_mux_jtag_trst, -+ qca_mux_mdio0, -+ qca_mux_wcss0_dbg18, -+ qca_mux_wcss1_dbg18, -+ qca_mux_qdss_tracedata_a, -+ qca_mux_mdc, -+ qca_mux_wcss0_dbg19, -+ qca_mux_wcss1_dbg19, - qca_mux_blsp_uart1, -+ qca_mux_wifi0_uart, -+ qca_mux_wifi1_uart, -+ qca_mux_smart1, -+ qca_mux_wcss0_dbg20, -+ qca_mux_wcss1_dbg20, -+ qca_mux_wifi0_uart0, -+ qca_mux_wifi1_uart0, -+ qca_mux_wcss0_dbg21, -+ qca_mux_wcss1_dbg21, - qca_mux_blsp_i2c0, -+ qca_mux_wcss0_dbg22, -+ qca_mux_wcss1_dbg22, -+ qca_mux_wcss0_dbg23, -+ qca_mux_wcss1_dbg23, -+ qca_mux_blsp_spi0, - qca_mux_blsp_i2c1, -+ qca_mux_wcss0_dbg24, -+ qca_mux_wcss1_dbg24, -+ qca_mux_wcss0_dbg25, -+ qca_mux_wcss1_dbg25, -+ qca_mux_wcss0_dbg26, -+ qca_mux_wcss1_dbg26, -+ qca_mux_wcss0_dbg, -+ qca_mux_wcss1_dbg, - qca_mux_blsp_uart0, -- qca_mux_blsp_spi1, -- qca_mux_blsp_spi0, -+ qca_mux_led0, -+ qca_mux_wcss0_dbg28, -+ qca_mux_wcss1_dbg28, -+ qca_mux_led1, -+ qca_mux_wcss0_dbg29, -+ qca_mux_wcss1_dbg29, -+ qca_mux_wifi0_uart1, -+ qca_mux_wifi1_uart1, -+ qca_mux_wcss0_dbg30, -+ qca_mux_wcss1_dbg30, -+ qca_mux_wcss0_dbg31, -+ qca_mux_wcss1_dbg31, -+ qca_mux_i2s_rx_mclk, -+ qca_mux_wcss0_dbg16, -+ qca_mux_wcss1_dbg16, -+ qca_mux_wcss0_dbg17, -+ qca_mux_wcss1_dbg17, -+ qca_mux_rgmii0, -+ qca_mux_sdio0, -+ qca_mux_rgmii1, -+ qca_mux_sdio1, -+ qca_mux_rgmii2, -+ qca_mux_i2s_tx_mclk, -+ qca_mux_sdio2, -+ qca_mux_rgmii3, -+ qca_mux_i2s_tx_bclk, -+ qca_mux_sdio3, -+ qca_mux_rgmii_rx, -+ qca_mux_i2s_tx_fsync, -+ qca_mux_sdio_clk, -+ qca_mux_rgmii_txc, -+ qca_mux_i2s_td1, -+ qca_mux_sdio_cmd, -+ qca_mux_i2s_td2, -+ qca_mux_sdio4, -+ qca_mux_i2s_td3, -+ qca_mux_sdio5, -+ qca_mux_audio_pwm0, -+ qca_mux_sdio6, -+ qca_mux_audio_pwm1, -+ qca_mux_wcss0_dbg27, -+ qca_mux_wcss1_dbg27, -+ qca_mux_sdio7, -+ qca_mux_rgmii_rxc, -+ qca_mux_audio_pwm2, -+ qca_mux_rgmii_tx, -+ qca_mux_audio_pwm3, -+ qca_mux_boot2, -+ qca_mux_i2s_spdif_in, -+ qca_mux_i2s_spdif_out, -+ qca_mux_rmii00, -+ qca_mux_led2, -+ qca_mux_rmii01, -+ qca_mux_wifi0_wci, -+ qca_mux_wifi1_wci, -+ qca_mux_boot4, -+ qca_mux_rmii0_tx, -+ qca_mux_boot5, -+ qca_mux_rmii0_rx, -+ qca_mux_pcie_clk1, -+ qca_mux_led3, -+ qca_mux_sdio_cd, - qca_mux_NA, - }; - -+static const char * const rmii0_refclk_groups[] = { -+ "gpio40", -+}; -+static const char * const wifi0_rfsilient0_groups[] = { -+ "gpio40", -+}; -+static const char * const wifi1_rfsilient0_groups[] = { -+ "gpio40", -+}; -+static const char * const smart2_groups[] = { -+ "gpio40", "gpio41", "gpio48", "gpio49", -+}; -+static const char * const led4_groups[] = { -+ "gpio40", -+}; -+static const char * const wifi0_cal_groups[] = { -+ "gpio41", "gpio51", -+}; -+static const char * const wifi1_cal_groups[] = { -+ "gpio41", "gpio51", -+}; -+static const char * const wifi_wci0_groups[] = { -+ "gpio42", -+}; -+static const char * const rmii0_dv_groups[] = { -+ "gpio43", -+}; -+static const char * const wifi_wci1_groups[] = { -+ "gpio43", -+}; -+static const char * const rmii1_refclk_groups[] = { -+ "gpio44", -+}; -+static const char * const blsp_spi1_groups[] = { -+ "gpio44", "gpio45", "gpio46", "gpio47", -+}; -+static const char * const led5_groups[] = { -+ "gpio44", -+}; -+static const char * const rmii10_groups[] = { -+ "gpio45", "gpio50", -+}; -+static const char * const led6_groups[] = { -+ "gpio45", -+}; -+static const char * const rmii11_groups[] = { -+ "gpio46", "gpio51", -+}; -+static const char * const led7_groups[] = { -+ "gpio46", -+}; -+static const char * const rmii1_dv_groups[] = { -+ "gpio47", -+}; -+static const char * const led8_groups[] = { -+ "gpio47", -+}; -+static const char * const rmii1_tx_groups[] = { -+ "gpio48", -+}; -+static const char * const aud_pin_groups[] = { -+ "gpio48", "gpio49", "gpio50", "gpio51", -+}; -+static const char * const led9_groups[] = { -+ "gpio48", -+}; -+static const char * const rmii1_rx_groups[] = { -+ "gpio49", -+}; -+static const char * const led10_groups[] = { -+ "gpio49", -+}; -+static const char * const wifi0_rfsilient1_groups[] = { -+ "gpio50", -+}; -+static const char * const wifi1_rfsilient1_groups[] = { -+ "gpio50", -+}; -+static const char * const led11_groups[] = { -+ "gpio50", -+}; -+static const char * const boot7_groups[] = { -+ "gpio51", -+}; -+static const char * const qpic_pad_groups[] = { -+ "gpio52", "gpio53", "gpio54", "gpio55", "gpio56", "gpio61", "gpio62", -+ "gpio63", "gpio69", -+}; -+static const char * const pcie_clk_groups[] = { -+ "gpio52", -+}; -+static const char * const tm_clk0_groups[] = { -+ "gpio52", -+}; -+static const char * const wifi00_groups[] = { -+ "gpio52", -+}; -+static const char * const wifi10_groups[] = { -+ "gpio52", -+}; -+static const char * const mdio1_groups[] = { -+ "gpio53", -+}; -+static const char * const prng_rosc_groups[] = { -+ "gpio53", -+}; -+static const char * const dbg_out_groups[] = { -+ "gpio53", -+}; -+static const char * const tm0_groups[] = { -+ "gpio53", -+}; -+static const char * const wifi01_groups[] = { -+ "gpio53", -+}; -+static const char * const wifi11_groups[] = { -+ "gpio53", -+}; -+static const char * const atest_char3_groups[] = { -+ "gpio54", -+}; -+static const char * const pmu0_groups[] = { -+ "gpio54", -+}; -+static const char * const boot8_groups[] = { -+ "gpio54", -+}; -+static const char * const tm1_groups[] = { -+ "gpio54", -+}; -+static const char * const atest_char2_groups[] = { -+ "gpio55", -+}; -+static const char * const pmu1_groups[] = { -+ "gpio55", -+}; -+static const char * const boot9_groups[] = { -+ "gpio55", -+}; -+static const char * const tm2_groups[] = { -+ "gpio55", -+}; -+static const char * const atest_char1_groups[] = { -+ "gpio56", -+}; -+static const char * const tm_ack_groups[] = { -+ "gpio56", -+}; -+static const char * const wifi03_groups[] = { -+ "gpio56", -+}; -+static const char * const wifi13_groups[] = { -+ "gpio56", -+}; -+static const char * const qpic_pad4_groups[] = { -+ "gpio57", -+}; -+static const char * const atest_char0_groups[] = { -+ "gpio57", -+}; -+static const char * const tm3_groups[] = { -+ "gpio57", -+}; -+static const char * const wifi02_groups[] = { -+ "gpio57", -+}; -+static const char * const wifi12_groups[] = { -+ "gpio57", -+}; -+static const char * const qpic_pad5_groups[] = { -+ "gpio58", -+}; -+static const char * const smart3_groups[] = { -+ "gpio58", "gpio59", "gpio60", "gpio61", -+}; -+static const char * const wcss0_dbg14_groups[] = { -+ "gpio58", -+}; -+static const char * const tm4_groups[] = { -+ "gpio58", -+}; -+static const char * const wifi04_groups[] = { -+ "gpio58", -+}; -+static const char * const wifi14_groups[] = { -+ "gpio58", -+}; -+static const char * const qpic_pad6_groups[] = { -+ "gpio59", -+}; -+static const char * const wcss0_dbg15_groups[] = { -+ "gpio59", -+}; -+static const char * const qdss_tracectl_a_groups[] = { -+ "gpio59", -+}; -+static const char * const boot18_groups[] = { -+ "gpio59", -+}; -+static const char * const tm5_groups[] = { -+ "gpio59", -+}; -+static const char * const qpic_pad7_groups[] = { -+ "gpio60", -+}; -+static const char * const atest_char_groups[] = { -+ "gpio60", -+}; -+static const char * const wcss0_dbg4_groups[] = { -+ "gpio60", -+}; -+static const char * const qdss_traceclk_a_groups[] = { -+ "gpio60", -+}; -+static const char * const boot19_groups[] = { -+ "gpio60", -+}; -+static const char * const tm6_groups[] = { -+ "gpio60", -+}; -+static const char * const wcss0_dbg5_groups[] = { -+ "gpio61", -+}; -+static const char * const qdss_cti_trig_out_a0_groups[] = { -+ "gpio61", -+}; -+static const char * const boot14_groups[] = { -+ "gpio61", -+}; -+static const char * const tm7_groups[] = { -+ "gpio61", -+}; -+static const char * const chip_rst_groups[] = { -+ "gpio62", -+}; -+static const char * const wcss0_dbg6_groups[] = { -+ "gpio62", -+}; -+static const char * const qdss_cti_trig_out_b0_groups[] = { -+ "gpio62", -+}; -+static const char * const boot11_groups[] = { -+ "gpio62", -+}; -+static const char * const tm8_groups[] = { -+ "gpio62", -+}; -+static const char * const wcss0_dbg7_groups[] = { -+ "gpio63", -+}; -+static const char * const wcss1_dbg7_groups[] = { -+ "gpio63", -+}; -+static const char * const boot20_groups[] = { -+ "gpio63", -+}; -+static const char * const tm9_groups[] = { -+ "gpio63", -+}; -+static const char * const qpic_pad1_groups[] = { -+ "gpio64", -+}; -+static const char * const wcss0_dbg8_groups[] = { -+ "gpio64", -+}; -+static const char * const wcss1_dbg8_groups[] = { -+ "gpio64", -+}; -+static const char * const qpic_pad2_groups[] = { -+ "gpio65", -+}; -+static const char * const wcss0_dbg9_groups[] = { -+ "gpio65", -+}; -+static const char * const wcss1_dbg9_groups[] = { -+ "gpio65", -+}; -+static const char * const qpic_pad3_groups[] = { -+ "gpio66", -+}; -+static const char * const wcss0_dbg10_groups[] = { -+ "gpio66", -+}; -+static const char * const wcss1_dbg10_groups[] = { -+ "gpio66", -+}; -+static const char * const qpic_pad0_groups[] = { -+ "gpio67", -+}; -+static const char * const wcss0_dbg11_groups[] = { -+ "gpio67", -+}; -+static const char * const wcss1_dbg11_groups[] = { -+ "gpio67", -+}; -+static const char * const qpic_pad8_groups[] = { -+ "gpio68", -+}; -+static const char * const wcss0_dbg12_groups[] = { -+ "gpio68", -+}; -+static const char * const wcss1_dbg12_groups[] = { -+ "gpio68", -+}; -+static const char * const wifi034_groups[] = { -+ "gpio98", -+}; -+static const char * const wifi134_groups[] = { -+ "gpio98", -+}; -+static const char * const jtag_tdi_groups[] = { -+ "gpio0", -+}; - static const char * const gpio_groups[] = { - "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", - "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", -@@ -303,13 +818,103 @@ static const char * const gpio_groups[] - "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", "gpio97", "gpio98", - "gpio99", - }; -- -+static const char * const i2s_rx_bclk_groups[] = { -+ "gpio0", "gpio21", "gpio60", -+}; -+static const char * const jtag_tck_groups[] = { -+ "gpio1", -+}; -+static const char * const i2s_rx_fsync_groups[] = { -+ "gpio1", "gpio22", "gpio61", -+}; -+static const char * const jtag_tms_groups[] = { -+ "gpio2", -+}; -+static const char * const i2s_rxd_groups[] = { -+ "gpio2", "gpio23", "gpio63", -+}; -+static const char * const smart0_groups[] = { -+ "gpio0", "gpio1", "gpio2", "gpio5", "gpio44", "gpio45", "gpio46", -+ "gpio47", -+}; -+static const char * const jtag_tdo_groups[] = { -+ "gpio3", -+}; -+static const char * const jtag_rst_groups[] = { -+ "gpio4", -+}; -+static const char * const jtag_trst_groups[] = { -+ "gpio5", -+}; -+static const char * const mdio0_groups[] = { -+ "gpio6", -+}; -+static const char * const wcss0_dbg18_groups[] = { -+ "gpio6", "gpio22", "gpio39", -+}; -+static const char * const wcss1_dbg18_groups[] = { -+ "gpio6", "gpio22", "gpio39", -+}; -+static const char * const qdss_tracedata_a_groups[] = { -+ "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", "gpio16", -+ "gpio17", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", -+ "gpio43", -+}; -+static const char * const mdc_groups[] = { -+ "gpio7", "gpio52", -+}; -+static const char * const wcss0_dbg19_groups[] = { -+ "gpio7", "gpio23", "gpio40", -+}; -+static const char * const wcss1_dbg19_groups[] = { -+ "gpio7", "gpio23", "gpio40", -+}; - static const char * const blsp_uart1_groups[] = { - "gpio8", "gpio9", "gpio10", "gpio11", - }; -+static const char * const wifi0_uart_groups[] = { -+ "gpio8", "gpio9", "gpio11", "gpio19", "gpio62", -+}; -+static const char * const wifi1_uart_groups[] = { -+ "gpio8", "gpio11", "gpio19", "gpio62", "gpio63", -+}; -+static const char * const smart1_groups[] = { -+ "gpio8", "gpio9", "gpio16", "gpio17", "gpio58", "gpio59", "gpio60", -+ "gpio61", -+}; -+static const char * const wcss0_dbg20_groups[] = { -+ "gpio8", "gpio24", "gpio41", -+}; -+static const char * const wcss1_dbg20_groups[] = { -+ "gpio8", "gpio24", "gpio41", -+}; -+static const char * const wifi0_uart0_groups[] = { -+ "gpio9", "gpio10", -+}; -+static const char * const wifi1_uart0_groups[] = { -+ "gpio9", "gpio10", -+}; -+static const char * const wcss0_dbg21_groups[] = { -+ "gpio9", "gpio25", "gpio42", -+}; -+static const char * const wcss1_dbg21_groups[] = { -+ "gpio9", "gpio25", "gpio42", -+}; - static const char * const blsp_i2c0_groups[] = { - "gpio10", "gpio11", "gpio20", "gpio21", "gpio58", "gpio59", - }; -+static const char * const wcss0_dbg22_groups[] = { -+ "gpio10", "gpio26", "gpio43", -+}; -+static const char * const wcss1_dbg22_groups[] = { -+ "gpio10", "gpio26", "gpio43", -+}; -+static const char * const wcss0_dbg23_groups[] = { -+ "gpio11", "gpio27", "gpio44", -+}; -+static const char * const wcss1_dbg23_groups[] = { -+ "gpio11", "gpio27", "gpio44", -+}; - static const char * const blsp_spi0_groups[] = { - "gpio12", "gpio13", "gpio14", "gpio15", "gpio45", - "gpio54", "gpio55", "gpio56", "gpio57", -@@ -317,94 +922,582 @@ static const char * const blsp_spi0_grou - static const char * const blsp_i2c1_groups[] = { - "gpio12", "gpio13", "gpio34", "gpio35", - }; -+static const char * const wcss0_dbg24_groups[] = { -+ "gpio12", "gpio28", "gpio45", -+}; -+static const char * const wcss1_dbg24_groups[] = { -+ "gpio12", "gpio28", "gpio45", -+}; -+static const char * const wcss0_dbg25_groups[] = { -+ "gpio13", "gpio29", "gpio46", -+}; -+static const char * const wcss1_dbg25_groups[] = { -+ "gpio13", "gpio29", "gpio46", -+}; -+static const char * const wcss0_dbg26_groups[] = { -+ "gpio14", "gpio30", "gpio47", -+}; -+static const char * const wcss1_dbg26_groups[] = { -+ "gpio14", "gpio30", "gpio47", -+}; -+static const char * const wcss0_dbg_groups[] = { -+ "gpio15", "gpio69", -+}; -+static const char * const wcss1_dbg_groups[] = { -+ "gpio15", -+}; - static const char * const blsp_uart0_groups[] = { - "gpio16", "gpio17", "gpio60", "gpio61", - }; --static const char * const blsp_spi1_groups[] = { -- "gpio44", "gpio45", "gpio46", "gpio47", -+static const char * const led0_groups[] = { -+ "gpio16", "gpio36", "gpio60", -+}; -+static const char * const wcss0_dbg28_groups[] = { -+ "gpio16", "gpio32", "gpio49", -+}; -+static const char * const wcss1_dbg28_groups[] = { -+ "gpio16", "gpio32", "gpio49", -+}; -+static const char * const led1_groups[] = { -+ "gpio17", "gpio37", "gpio61", -+}; -+static const char * const wcss0_dbg29_groups[] = { -+ "gpio17", "gpio33", "gpio50", -+}; -+static const char * const wcss1_dbg29_groups[] = { -+ "gpio17", "gpio33", "gpio50", -+}; -+static const char * const wifi0_uart1_groups[] = { -+ "gpio18", "gpio63", -+}; -+static const char * const wifi1_uart1_groups[] = { -+ "gpio18", "gpio63", -+}; -+static const char * const wcss0_dbg30_groups[] = { -+ "gpio18", "gpio34", "gpio51", -+}; -+static const char * const wcss1_dbg30_groups[] = { -+ "gpio18", "gpio34", "gpio51", -+}; -+static const char * const wcss0_dbg31_groups[] = { -+ "gpio19", "gpio35", "gpio52", -+}; -+static const char * const wcss1_dbg31_groups[] = { -+ "gpio19", "gpio35", -+}; -+static const char * const i2s_rx_mclk_groups[] = { -+ "gpio20", "gpio58", -+}; -+static const char * const wcss0_dbg16_groups[] = { -+ "gpio20", "gpio37", -+}; -+static const char * const wcss1_dbg16_groups[] = { -+ "gpio20", "gpio37", -+}; -+static const char * const wcss0_dbg17_groups[] = { -+ "gpio21", "gpio38", -+}; -+static const char * const wcss1_dbg17_groups[] = { -+ "gpio21", "gpio38", -+}; -+static const char * const rgmii0_groups[] = { -+ "gpio22", "gpio28", -+}; -+static const char * const sdio0_groups[] = { -+ "gpio23", -+}; -+static const char * const rgmii1_groups[] = { -+ "gpio23", "gpio29", -+}; -+static const char * const sdio1_groups[] = { -+ "gpio24", -+}; -+static const char * const rgmii2_groups[] = { -+ "gpio24", "gpio30", -+}; -+static const char * const i2s_tx_mclk_groups[] = { -+ "gpio24", "gpio52", -+}; -+static const char * const sdio2_groups[] = { -+ "gpio25", -+}; -+static const char * const rgmii3_groups[] = { -+ "gpio25", "gpio31", -+}; -+static const char * const i2s_tx_bclk_groups[] = { -+ "gpio25", "gpio53", "gpio60", -+}; -+static const char * const sdio3_groups[] = { -+ "gpio26", -+}; -+static const char * const rgmii_rx_groups[] = { -+ "gpio26", -+}; -+static const char * const i2s_tx_fsync_groups[] = { -+ "gpio26", "gpio57", "gpio61", -+}; -+static const char * const sdio_clk_groups[] = { -+ "gpio27", -+}; -+static const char * const rgmii_txc_groups[] = { -+ "gpio27", -+}; -+static const char * const i2s_td1_groups[] = { -+ "gpio27", "gpio54", "gpio63", -+}; -+static const char * const sdio_cmd_groups[] = { -+ "gpio28", -+}; -+static const char * const i2s_td2_groups[] = { -+ "gpio28", "gpio55", -+}; -+static const char * const sdio4_groups[] = { -+ "gpio29", -+}; -+static const char * const i2s_td3_groups[] = { -+ "gpio29", "gpio56", -+}; -+static const char * const sdio5_groups[] = { -+ "gpio30", -+}; -+static const char * const audio_pwm0_groups[] = { -+ "gpio30", "gpio64", -+}; -+static const char * const sdio6_groups[] = { -+ "gpio31", -+}; -+static const char * const audio_pwm1_groups[] = { -+ "gpio31", "gpio65", -+}; -+static const char * const wcss0_dbg27_groups[] = { -+ "gpio31", "gpio48", -+}; -+static const char * const wcss1_dbg27_groups[] = { -+ "gpio31", "gpio48", -+}; -+static const char * const sdio7_groups[] = { -+ "gpio32", -+}; -+static const char * const rgmii_rxc_groups[] = { -+ "gpio32", -+}; -+static const char * const audio_pwm2_groups[] = { -+ "gpio32", "gpio66", -+}; -+static const char * const rgmii_tx_groups[] = { -+ "gpio33", -+}; -+static const char * const audio_pwm3_groups[] = { -+ "gpio33", "gpio67", -+}; -+static const char * const boot2_groups[] = { -+ "gpio33", -+}; -+static const char * const i2s_spdif_in_groups[] = { -+ "gpio34", "gpio59", "gpio63", -+}; -+static const char * const i2s_spdif_out_groups[] = { -+ "gpio35", "gpio62", "gpio63", -+}; -+static const char * const rmii00_groups[] = { -+ "gpio36", "gpio41", -+}; -+static const char * const led2_groups[] = { -+ "gpio36", "gpio38", "gpio58", -+}; -+static const char * const rmii01_groups[] = { -+ "gpio37", "gpio42", -+}; -+static const char * const wifi0_wci_groups[] = { -+ "gpio37", -+}; -+static const char * const wifi1_wci_groups[] = { -+ "gpio37", -+}; -+static const char * const boot4_groups[] = { -+ "gpio37", -+}; -+static const char * const rmii0_tx_groups[] = { -+ "gpio38", -+}; -+static const char * const boot5_groups[] = { -+ "gpio38", -+}; -+static const char * const rmii0_rx_groups[] = { -+ "gpio39", -+}; -+static const char * const pcie_clk1_groups[] = { -+ "gpio39", -+}; -+static const char * const led3_groups[] = { -+ "gpio39", -+}; -+static const char * const sdio_cd_groups[] = { -+ "gpio22", - }; - - static const struct msm_function ipq4019_functions[] = { -+ FUNCTION(rmii0_refclk), -+ FUNCTION(wifi0_rfsilient0), -+ FUNCTION(wifi1_rfsilient0), -+ FUNCTION(smart2), -+ FUNCTION(led4), -+ FUNCTION(wifi0_cal), -+ FUNCTION(wifi1_cal), -+ FUNCTION(wifi_wci0), -+ FUNCTION(rmii0_dv), -+ FUNCTION(wifi_wci1), -+ FUNCTION(rmii1_refclk), -+ FUNCTION(blsp_spi1), -+ FUNCTION(led5), -+ FUNCTION(rmii10), -+ FUNCTION(led6), -+ FUNCTION(rmii11), -+ FUNCTION(led7), -+ FUNCTION(rmii1_dv), -+ FUNCTION(led8), -+ FUNCTION(rmii1_tx), -+ FUNCTION(aud_pin), -+ FUNCTION(led9), -+ FUNCTION(rmii1_rx), -+ FUNCTION(led10), -+ FUNCTION(wifi0_rfsilient1), -+ FUNCTION(wifi1_rfsilient1), -+ FUNCTION(led11), -+ FUNCTION(boot7), -+ FUNCTION(qpic_pad), -+ FUNCTION(pcie_clk), -+ FUNCTION(tm_clk0), -+ FUNCTION(wifi00), -+ FUNCTION(wifi10), -+ FUNCTION(mdio1), -+ FUNCTION(prng_rosc), -+ FUNCTION(dbg_out), -+ FUNCTION(tm0), -+ FUNCTION(wifi01), -+ FUNCTION(wifi11), -+ FUNCTION(atest_char3), -+ FUNCTION(pmu0), -+ FUNCTION(boot8), -+ FUNCTION(tm1), -+ FUNCTION(atest_char2), -+ FUNCTION(pmu1), -+ FUNCTION(boot9), -+ FUNCTION(tm2), -+ FUNCTION(atest_char1), -+ FUNCTION(tm_ack), -+ FUNCTION(wifi03), -+ FUNCTION(wifi13), -+ FUNCTION(qpic_pad4), -+ FUNCTION(atest_char0), -+ FUNCTION(tm3), -+ FUNCTION(wifi02), -+ FUNCTION(wifi12), -+ FUNCTION(qpic_pad5), -+ FUNCTION(smart3), -+ FUNCTION(wcss0_dbg14), -+ FUNCTION(tm4), -+ FUNCTION(wifi04), -+ FUNCTION(wifi14), -+ FUNCTION(qpic_pad6), -+ FUNCTION(wcss0_dbg15), -+ FUNCTION(qdss_tracectl_a), -+ FUNCTION(boot18), -+ FUNCTION(tm5), -+ FUNCTION(qpic_pad7), -+ FUNCTION(atest_char), -+ FUNCTION(wcss0_dbg4), -+ FUNCTION(qdss_traceclk_a), -+ FUNCTION(boot19), -+ FUNCTION(tm6), -+ FUNCTION(wcss0_dbg5), -+ FUNCTION(qdss_cti_trig_out_a0), -+ FUNCTION(boot14), -+ FUNCTION(tm7), -+ FUNCTION(chip_rst), -+ FUNCTION(wcss0_dbg6), -+ FUNCTION(qdss_cti_trig_out_b0), -+ FUNCTION(boot11), -+ FUNCTION(tm8), -+ FUNCTION(wcss0_dbg7), -+ FUNCTION(wcss1_dbg7), -+ FUNCTION(boot20), -+ FUNCTION(tm9), -+ FUNCTION(qpic_pad1), -+ FUNCTION(wcss0_dbg8), -+ FUNCTION(wcss1_dbg8), -+ FUNCTION(qpic_pad2), -+ FUNCTION(wcss0_dbg9), -+ FUNCTION(wcss1_dbg9), -+ FUNCTION(qpic_pad3), -+ FUNCTION(wcss0_dbg10), -+ FUNCTION(wcss1_dbg10), -+ FUNCTION(qpic_pad0), -+ FUNCTION(wcss0_dbg11), -+ FUNCTION(wcss1_dbg11), -+ FUNCTION(qpic_pad8), -+ FUNCTION(wcss0_dbg12), -+ FUNCTION(wcss1_dbg12), -+ FUNCTION(wifi034), -+ FUNCTION(wifi134), -+ FUNCTION(jtag_tdi), - FUNCTION(gpio), -+ FUNCTION(i2s_rx_bclk), -+ FUNCTION(jtag_tck), -+ FUNCTION(i2s_rx_fsync), -+ FUNCTION(jtag_tms), -+ FUNCTION(i2s_rxd), -+ FUNCTION(smart0), -+ FUNCTION(jtag_tdo), -+ FUNCTION(jtag_rst), -+ FUNCTION(jtag_trst), -+ FUNCTION(mdio0), -+ FUNCTION(wcss0_dbg18), -+ FUNCTION(wcss1_dbg18), -+ FUNCTION(qdss_tracedata_a), -+ FUNCTION(mdc), -+ FUNCTION(wcss0_dbg19), -+ FUNCTION(wcss1_dbg19), - FUNCTION(blsp_uart1), -+ FUNCTION(wifi0_uart), -+ FUNCTION(wifi1_uart), -+ FUNCTION(smart1), -+ FUNCTION(wcss0_dbg20), -+ FUNCTION(wcss1_dbg20), -+ FUNCTION(wifi0_uart0), -+ FUNCTION(wifi1_uart0), -+ FUNCTION(wcss0_dbg21), -+ FUNCTION(wcss1_dbg21), - FUNCTION(blsp_i2c0), -+ FUNCTION(wcss0_dbg22), -+ FUNCTION(wcss1_dbg22), -+ FUNCTION(wcss0_dbg23), -+ FUNCTION(wcss1_dbg23), -+ FUNCTION(blsp_spi0), - FUNCTION(blsp_i2c1), -+ FUNCTION(wcss0_dbg24), -+ FUNCTION(wcss1_dbg24), -+ FUNCTION(wcss0_dbg25), -+ FUNCTION(wcss1_dbg25), -+ FUNCTION(wcss0_dbg26), -+ FUNCTION(wcss1_dbg26), -+ FUNCTION(wcss0_dbg), -+ FUNCTION(wcss1_dbg), - FUNCTION(blsp_uart0), -- FUNCTION(blsp_spi1), -- FUNCTION(blsp_spi0), -+ FUNCTION(led0), -+ FUNCTION(wcss0_dbg28), -+ FUNCTION(wcss1_dbg28), -+ FUNCTION(led1), -+ FUNCTION(wcss0_dbg29), -+ FUNCTION(wcss1_dbg29), -+ FUNCTION(wifi0_uart1), -+ FUNCTION(wifi1_uart1), -+ FUNCTION(wcss0_dbg30), -+ FUNCTION(wcss1_dbg30), -+ FUNCTION(wcss0_dbg31), -+ FUNCTION(wcss1_dbg31), -+ FUNCTION(i2s_rx_mclk), -+ FUNCTION(wcss0_dbg16), -+ FUNCTION(wcss1_dbg16), -+ FUNCTION(wcss0_dbg17), -+ FUNCTION(wcss1_dbg17), -+ FUNCTION(rgmii0), -+ FUNCTION(sdio0), -+ FUNCTION(rgmii1), -+ FUNCTION(sdio1), -+ FUNCTION(rgmii2), -+ FUNCTION(i2s_tx_mclk), -+ FUNCTION(sdio2), -+ FUNCTION(rgmii3), -+ FUNCTION(i2s_tx_bclk), -+ FUNCTION(sdio3), -+ FUNCTION(rgmii_rx), -+ FUNCTION(i2s_tx_fsync), -+ FUNCTION(sdio_clk), -+ FUNCTION(rgmii_txc), -+ FUNCTION(i2s_td1), -+ FUNCTION(sdio_cmd), -+ FUNCTION(i2s_td2), -+ FUNCTION(sdio4), -+ FUNCTION(i2s_td3), -+ FUNCTION(sdio5), -+ FUNCTION(audio_pwm0), -+ FUNCTION(sdio6), -+ FUNCTION(audio_pwm1), -+ FUNCTION(wcss0_dbg27), -+ FUNCTION(wcss1_dbg27), -+ FUNCTION(sdio7), -+ FUNCTION(rgmii_rxc), -+ FUNCTION(audio_pwm2), -+ FUNCTION(rgmii_tx), -+ FUNCTION(audio_pwm3), -+ FUNCTION(boot2), -+ FUNCTION(i2s_spdif_in), -+ FUNCTION(i2s_spdif_out), -+ FUNCTION(rmii00), -+ FUNCTION(led2), -+ FUNCTION(rmii01), -+ FUNCTION(wifi0_wci), -+ FUNCTION(wifi1_wci), -+ FUNCTION(boot4), -+ FUNCTION(rmii0_tx), -+ FUNCTION(boot5), -+ FUNCTION(rmii0_rx), -+ FUNCTION(pcie_clk1), -+ FUNCTION(led3), -+ FUNCTION(sdio_cd), - }; - - static const struct msm_pingroup ipq4019_groups[] = { -- PINGROUP(0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(2, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(3, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(4, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(5, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(6, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(7, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(8, blsp_uart1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(9, blsp_uart1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(10, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(11, blsp_uart1, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(12, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(13, blsp_spi0, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(14, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(15, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(16, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(17, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(18, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(19, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(20, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(21, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(22, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(23, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(24, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(25, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(26, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(27, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(28, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(29, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(30, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(31, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(32, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(33, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(34, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(35, blsp_i2c1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(36, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(37, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(38, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(39, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(40, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(41, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(42, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(43, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(44, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(45, NA, blsp_spi1, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(46, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(47, NA, blsp_spi1, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(48, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(49, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(50, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(51, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(52, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(53, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(54, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(55, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(56, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(57, NA, blsp_spi0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(58, NA, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(59, NA, blsp_i2c0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(60, NA, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(61, NA, blsp_uart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(62, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(63, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(64, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(65, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(66, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(67, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(68, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(69, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(0, jtag_tdi, smart0, i2s_rx_bclk, NA, NA, NA, NA, NA, NA, NA, -+ NA, NA, NA, NA), -+ PINGROUP(1, jtag_tck, smart0, i2s_rx_fsync, NA, NA, NA, NA, NA, NA, NA, -+ NA, NA, NA, NA), -+ PINGROUP(2, jtag_tms, smart0, i2s_rxd, NA, NA, NA, NA, NA, NA, NA, NA, -+ NA, NA, NA), -+ PINGROUP(3, jtag_tdo, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, -+ NA), -+ PINGROUP(4, jtag_rst, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, -+ NA), -+ PINGROUP(5, jtag_trst, smart0, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, -+ NA, NA), -+ PINGROUP(6, mdio0, NA, wcss0_dbg18, wcss1_dbg18, NA, qdss_tracedata_a, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(7, mdc, NA, wcss0_dbg19, wcss1_dbg19, NA, qdss_tracedata_a, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(8, blsp_uart1, wifi0_uart, wifi1_uart, smart1, NA, -+ wcss0_dbg20, wcss1_dbg20, NA, qdss_tracedata_a, NA, NA, NA, -+ NA, NA), -+ PINGROUP(9, blsp_uart1, wifi0_uart0, wifi1_uart0, smart1, wifi0_uart, -+ NA, wcss0_dbg21, wcss1_dbg21, NA, qdss_tracedata_a, NA, NA, -+ NA, NA), -+ PINGROUP(10, blsp_uart1, wifi0_uart0, wifi1_uart0, blsp_i2c0, NA, -+ wcss0_dbg22, wcss1_dbg22, NA, qdss_tracedata_a, NA, NA, NA, -+ NA, NA), -+ PINGROUP(11, blsp_uart1, wifi0_uart, wifi1_uart, blsp_i2c0, NA, -+ wcss0_dbg23, wcss1_dbg23, NA, qdss_tracedata_a, NA, NA, NA, -+ NA, NA), -+ PINGROUP(12, blsp_spi0, blsp_i2c1, NA, wcss0_dbg24, wcss1_dbg24, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(13, blsp_spi0, blsp_i2c1, NA, wcss0_dbg25, wcss1_dbg25, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(14, blsp_spi0, NA, wcss0_dbg26, wcss1_dbg26, NA, NA, NA, NA, -+ NA, NA, NA, NA, NA, NA), -+ PINGROUP(15, blsp_spi0, NA, wcss0_dbg, wcss1_dbg, NA, NA, NA, NA, NA, -+ NA, NA, NA, NA, NA), -+ PINGROUP(16, blsp_uart0, led0, smart1, NA, wcss0_dbg28, wcss1_dbg28, -+ NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA), -+ PINGROUP(17, blsp_uart0, led1, smart1, NA, wcss0_dbg29, wcss1_dbg29, -+ NA, qdss_tracedata_a, NA, NA, NA, NA, NA, NA), -+ PINGROUP(18, wifi0_uart1, wifi1_uart1, NA, wcss0_dbg30, wcss1_dbg30, -+ NA, NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(19, wifi0_uart, wifi1_uart, NA, wcss0_dbg31, wcss1_dbg31, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(20, blsp_i2c0, i2s_rx_mclk, NA, wcss0_dbg16, wcss1_dbg16, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(21, blsp_i2c0, i2s_rx_bclk, NA, wcss0_dbg17, wcss1_dbg17, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(22, rgmii0, i2s_rx_fsync, NA, wcss0_dbg18, wcss1_dbg18, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(23, sdio0, rgmii1, i2s_rxd, NA, wcss0_dbg19, wcss1_dbg19, NA, -+ NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(24, sdio1, rgmii2, i2s_tx_mclk, NA, wcss0_dbg20, wcss1_dbg20, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(25, sdio2, rgmii3, i2s_tx_bclk, NA, wcss0_dbg21, wcss1_dbg21, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(26, sdio3, rgmii_rx, i2s_tx_fsync, NA, wcss0_dbg22, -+ wcss1_dbg22, NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(27, sdio_clk, rgmii_txc, i2s_td1, NA, wcss0_dbg23, -+ wcss1_dbg23, NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(28, sdio_cmd, rgmii0, i2s_td2, NA, wcss0_dbg24, wcss1_dbg24, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(29, sdio4, rgmii1, i2s_td3, NA, wcss0_dbg25, wcss1_dbg25, NA, -+ NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(30, sdio5, rgmii2, audio_pwm0, NA, wcss0_dbg26, wcss1_dbg26, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(31, sdio6, rgmii3, audio_pwm1, NA, wcss0_dbg27, wcss1_dbg27, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(32, sdio7, rgmii_rxc, audio_pwm2, NA, wcss0_dbg28, -+ wcss1_dbg28, NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(33, rgmii_tx, audio_pwm3, NA, wcss0_dbg29, wcss1_dbg29, NA, -+ boot2, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(34, blsp_i2c1, i2s_spdif_in, NA, wcss0_dbg30, wcss1_dbg30, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(35, blsp_i2c1, i2s_spdif_out, NA, wcss0_dbg31, wcss1_dbg31, -+ NA, NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(36, rmii00, led2, led0, NA, NA, NA, NA, NA, NA, NA, NA, NA, -+ NA, NA), -+ PINGROUP(37, rmii01, wifi0_wci, wifi1_wci, led1, NA, NA, wcss0_dbg16, -+ wcss1_dbg16, NA, qdss_tracedata_a, boot4, NA, NA, NA), -+ PINGROUP(38, rmii0_tx, led2, NA, NA, wcss0_dbg17, wcss1_dbg17, NA, -+ qdss_tracedata_a, boot5, NA, NA, NA, NA, NA), -+ PINGROUP(39, rmii0_rx, pcie_clk1, led3, NA, NA, wcss0_dbg18, -+ wcss1_dbg18, NA, NA, qdss_tracedata_a, NA, NA, NA, NA), -+ PINGROUP(40, rmii0_refclk, wifi0_rfsilient0, wifi1_rfsilient0, smart2, -+ led4, NA, NA, wcss0_dbg19, wcss1_dbg19, NA, NA, -+ qdss_tracedata_a, NA, NA), -+ PINGROUP(41, rmii00, wifi0_cal, wifi1_cal, smart2, NA, NA, wcss0_dbg20, -+ wcss1_dbg20, NA, NA, qdss_tracedata_a, NA, NA, NA), -+ PINGROUP(42, rmii01, wifi_wci0, NA, NA, wcss0_dbg21, wcss1_dbg21, NA, -+ NA, qdss_tracedata_a, NA, NA, NA, NA, NA), -+ PINGROUP(43, rmii0_dv, wifi_wci1, NA, NA, wcss0_dbg22, wcss1_dbg22, NA, -+ NA, qdss_tracedata_a, NA, NA, NA, NA, NA), -+ PINGROUP(44, rmii1_refclk, blsp_spi1, smart0, led5, NA, NA, -+ wcss0_dbg23, wcss1_dbg23, NA, NA, NA, NA, NA, NA), -+ PINGROUP(45, rmii10, blsp_spi1, blsp_spi0, smart0, led6, NA, NA, -+ wcss0_dbg24, wcss1_dbg24, NA, NA, NA, NA, NA), -+ PINGROUP(46, rmii11, blsp_spi1, smart0, led7, NA, NA, wcss0_dbg25, -+ wcss1_dbg25, NA, NA, NA, NA, NA, NA), -+ PINGROUP(47, rmii1_dv, blsp_spi1, smart0, led8, NA, NA, wcss0_dbg26, -+ wcss1_dbg26, NA, NA, NA, NA, NA, NA), -+ PINGROUP(48, rmii1_tx, aud_pin, smart2, led9, NA, NA, wcss0_dbg27, -+ wcss1_dbg27, NA, NA, NA, NA, NA, NA), -+ PINGROUP(49, rmii1_rx, aud_pin, smart2, led10, NA, NA, wcss0_dbg28, -+ wcss1_dbg28, NA, NA, NA, NA, NA, NA), -+ PINGROUP(50, rmii10, aud_pin, wifi0_rfsilient1, wifi1_rfsilient1, -+ led11, NA, NA, wcss0_dbg29, wcss1_dbg29, NA, NA, NA, NA, NA), -+ PINGROUP(51, rmii11, aud_pin, wifi0_cal, wifi1_cal, NA, NA, -+ wcss0_dbg30, wcss1_dbg30, NA, boot7, NA, NA, NA, NA), -+ PINGROUP(52, qpic_pad, mdc, pcie_clk, i2s_tx_mclk, NA, NA, wcss0_dbg31, -+ tm_clk0, wifi00, wifi10, NA, NA, NA, NA), -+ PINGROUP(53, qpic_pad, mdio1, i2s_tx_bclk, prng_rosc, dbg_out, tm0, -+ wifi01, wifi11, NA, NA, NA, NA, NA, NA), -+ PINGROUP(54, qpic_pad, blsp_spi0, i2s_td1, atest_char3, pmu0, NA, NA, -+ boot8, tm1, NA, NA, NA, NA, NA), -+ PINGROUP(55, qpic_pad, blsp_spi0, i2s_td2, atest_char2, pmu1, NA, NA, -+ boot9, tm2, NA, NA, NA, NA, NA), -+ PINGROUP(56, qpic_pad, blsp_spi0, i2s_td3, atest_char1, NA, tm_ack, -+ wifi03, wifi13, NA, NA, NA, NA, NA, NA), -+ PINGROUP(57, qpic_pad4, blsp_spi0, i2s_tx_fsync, atest_char0, NA, tm3, -+ wifi02, wifi12, NA, NA, NA, NA, NA, NA), -+ PINGROUP(58, qpic_pad5, led2, blsp_i2c0, smart3, smart1, i2s_rx_mclk, -+ NA, wcss0_dbg14, tm4, wifi04, wifi14, NA, NA, NA), -+ PINGROUP(59, qpic_pad6, blsp_i2c0, smart3, smart1, i2s_spdif_in, NA, -+ NA, wcss0_dbg15, qdss_tracectl_a, boot18, tm5, NA, NA, NA), -+ PINGROUP(60, qpic_pad7, blsp_uart0, smart1, smart3, led0, i2s_tx_bclk, -+ i2s_rx_bclk, atest_char, NA, wcss0_dbg4, qdss_traceclk_a, -+ boot19, tm6, NA), -+ PINGROUP(61, qpic_pad, blsp_uart0, smart1, smart3, led1, i2s_tx_fsync, -+ i2s_rx_fsync, NA, NA, wcss0_dbg5, qdss_cti_trig_out_a0, -+ boot14, tm7, NA), -+ PINGROUP(62, qpic_pad, chip_rst, wifi0_uart, wifi1_uart, i2s_spdif_out, -+ NA, NA, wcss0_dbg6, qdss_cti_trig_out_b0, boot11, tm8, NA, NA, -+ NA), -+ PINGROUP(63, qpic_pad, wifi0_uart1, wifi1_uart1, wifi1_uart, i2s_td1, -+ i2s_rxd, i2s_spdif_out, i2s_spdif_in, NA, wcss0_dbg7, -+ wcss1_dbg7, boot20, tm9, NA), -+ PINGROUP(64, qpic_pad1, audio_pwm0, NA, wcss0_dbg8, wcss1_dbg8, NA, NA, -+ NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(65, qpic_pad2, audio_pwm1, NA, wcss0_dbg9, wcss1_dbg9, NA, NA, -+ NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(66, qpic_pad3, audio_pwm2, NA, wcss0_dbg10, wcss1_dbg10, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(67, qpic_pad0, audio_pwm3, NA, wcss0_dbg11, wcss1_dbg11, NA, -+ NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(68, qpic_pad8, NA, wcss0_dbg12, wcss1_dbg12, NA, NA, NA, NA, -+ NA, NA, NA, NA, NA, NA), -+ PINGROUP(69, qpic_pad, NA, wcss0_dbg, NA, NA, NA, NA, NA, NA, NA, NA, -+ NA, NA, NA), - PINGROUP(70, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(71, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(72, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -@@ -433,7 +1526,8 @@ static const struct msm_pingroup ipq4019 - PINGROUP(95, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(96, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), - PINGROUP(97, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -- PINGROUP(98, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), -+ PINGROUP(98, wifi034, wifi134, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, -+ NA, NA), - PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), - }; - -@@ -460,6 +1554,7 @@ static const struct of_device_id ipq4019 - static struct platform_driver ipq4019_pinctrl_driver = { - .driver = { - .name = "ipq4019-pinctrl", -+ .owner = THIS_MODULE, - .of_match_table = ipq4019_pinctrl_of_match, - }, - .probe = ipq4019_pinctrl_probe, diff --git a/target/linux/ipq40xx/patches-4.9/859-msm-pinctrl-Add-support-to-configure-ipq40xx-GPIO_PU.patch b/target/linux/ipq40xx/patches-4.9/859-msm-pinctrl-Add-support-to-configure-ipq40xx-GPIO_PU.patch deleted file mode 100644 index 07cf01b26..000000000 --- a/target/linux/ipq40xx/patches-4.9/859-msm-pinctrl-Add-support-to-configure-ipq40xx-GPIO_PU.patch +++ /dev/null @@ -1,236 +0,0 @@ -From e77af7de404eb464f7da9e0daeb8b362cc66a7ba Mon Sep 17 00:00:00 2001 -From: Ram Chandra Jangir -Date: Tue, 9 May 2017 11:45:00 +0530 -Subject: [PATCH] msm: pinctrl: Add support to configure ipq40xx GPIO_PULL bits - -GPIO_PULL bits configurations in TLMM_GPIO_CFG register -differs for IPQ40xx from rest of the other qcom SoC's. -This change add support to configure the msm_gpio_pull -bits for ipq40xx, It is required to fix the proper -configurations of gpio-pull bits for nand pins mux. - -IPQ40xx SoC: -2'b10: Internal pull up enable. -2'b11: Unsupport - -For other SoC's: -2'b10: Keeper -2'b11: Pull-Up - -Signed-off-by: Ram Chandra Jangir ---- - drivers/pinctrl/qcom/pinctrl-apq8064.c | 1 + - drivers/pinctrl/qcom/pinctrl-apq8084.c | 1 + - drivers/pinctrl/qcom/pinctrl-ipq4019.c | 8 ++++++++ - drivers/pinctrl/qcom/pinctrl-ipq8064.c | 1 + - drivers/pinctrl/qcom/pinctrl-mdm9615.c | 1 + - drivers/pinctrl/qcom/pinctrl-msm.c | 21 ++++++++------------- - drivers/pinctrl/qcom/pinctrl-msm.h | 19 +++++++++++++++++++ - drivers/pinctrl/qcom/pinctrl-msm8660.c | 1 + - drivers/pinctrl/qcom/pinctrl-msm8916.c | 1 + - drivers/pinctrl/qcom/pinctrl-msm8960.c | 1 + - drivers/pinctrl/qcom/pinctrl-msm8x74.c | 1 + - 11 files changed, 43 insertions(+), 13 deletions(-) - ---- a/drivers/pinctrl/qcom/pinctrl-apq8064.c -+++ b/drivers/pinctrl/qcom/pinctrl-apq8064.c -@@ -597,6 +597,7 @@ static const struct msm_pinctrl_soc_data - .groups = apq8064_groups, - .ngroups = ARRAY_SIZE(apq8064_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int apq8064_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-apq8084.c -+++ b/drivers/pinctrl/qcom/pinctrl-apq8084.c -@@ -1206,6 +1206,7 @@ static const struct msm_pinctrl_soc_data - .groups = apq8084_groups, - .ngroups = ARRAY_SIZE(apq8084_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int apq8084_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c -+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c -@@ -1531,6 +1531,13 @@ static const struct msm_pingroup ipq4019 - PINGROUP(99, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA), - }; - -+static const struct msm_pinctrl_gpio_pull ipq4019_gpio_pull = { -+ .no_pull = 0, -+ .pull_down = 1, -+ .keeper = 0, -+ .pull_up = 2, -+}; -+ - static const struct msm_pinctrl_soc_data ipq4019_pinctrl = { - .pins = ipq4019_pins, - .npins = ARRAY_SIZE(ipq4019_pins), -@@ -1539,6 +1546,7 @@ static const struct msm_pinctrl_soc_data - .groups = ipq4019_groups, - .ngroups = ARRAY_SIZE(ipq4019_groups), - .ngpios = 100, -+ .gpio_pull = &ipq4019_gpio_pull, - }; - - static int ipq4019_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-ipq8064.c -+++ b/drivers/pinctrl/qcom/pinctrl-ipq8064.c -@@ -630,6 +630,7 @@ static const struct msm_pinctrl_soc_data - .groups = ipq8064_groups, - .ngroups = ARRAY_SIZE(ipq8064_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int ipq8064_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-mdm9615.c -+++ b/drivers/pinctrl/qcom/pinctrl-mdm9615.c -@@ -444,6 +444,7 @@ static const struct msm_pinctrl_soc_data - .groups = mdm9615_groups, - .ngroups = ARRAY_SIZE(mdm9615_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int mdm9615_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-msm.c -+++ b/drivers/pinctrl/qcom/pinctrl-msm.c -@@ -203,11 +203,6 @@ static int msm_config_reg(struct msm_pin - return 0; - } - --#define MSM_NO_PULL 0 --#define MSM_PULL_DOWN 1 --#define MSM_KEEPER 2 --#define MSM_PULL_UP 3 -- - static unsigned msm_regval_to_drive(u32 val) - { - return (val + 1) * 2; -@@ -238,16 +233,16 @@ static int msm_config_group_get(struct p - /* Convert register value to pinconf value */ - switch (param) { - case PIN_CONFIG_BIAS_DISABLE: -- arg = arg == MSM_NO_PULL; -+ arg = arg == pctrl->soc->gpio_pull->no_pull; - break; - case PIN_CONFIG_BIAS_PULL_DOWN: -- arg = arg == MSM_PULL_DOWN; -+ arg = arg == pctrl->soc->gpio_pull->pull_down; - break; - case PIN_CONFIG_BIAS_BUS_HOLD: -- arg = arg == MSM_KEEPER; -+ arg = arg == pctrl->soc->gpio_pull->keeper; - break; - case PIN_CONFIG_BIAS_PULL_UP: -- arg = arg == MSM_PULL_UP; -+ arg = arg == pctrl->soc->gpio_pull->pull_up; - break; - case PIN_CONFIG_DRIVE_STRENGTH: - arg = msm_regval_to_drive(arg); -@@ -304,16 +299,16 @@ static int msm_config_group_set(struct p - /* Convert pinconf values to register values */ - switch (param) { - case PIN_CONFIG_BIAS_DISABLE: -- arg = MSM_NO_PULL; -+ arg = pctrl->soc->gpio_pull->no_pull; - break; - case PIN_CONFIG_BIAS_PULL_DOWN: -- arg = MSM_PULL_DOWN; -+ arg = pctrl->soc->gpio_pull->pull_down; - break; - case PIN_CONFIG_BIAS_BUS_HOLD: -- arg = MSM_KEEPER; -+ arg = pctrl->soc->gpio_pull->keeper; - break; - case PIN_CONFIG_BIAS_PULL_UP: -- arg = MSM_PULL_UP; -+ arg = pctrl->soc->gpio_pull->pull_up; - break; - case PIN_CONFIG_DRIVE_STRENGTH: - /* Check for invalid values */ ---- a/drivers/pinctrl/qcom/pinctrl-msm.h -+++ b/drivers/pinctrl/qcom/pinctrl-msm.h -@@ -98,6 +98,16 @@ struct msm_pingroup { - }; - - /** -+ * struct msm_pinctrl_gpio_pull - pinctrl pull value bit field descriptor -+ */ -+struct msm_pinctrl_gpio_pull { -+ unsigned no_pull; -+ unsigned pull_down; -+ unsigned keeper; -+ unsigned pull_up; -+}; -+ -+/** - * struct msm_pinctrl_soc_data - Qualcomm pin controller driver configuration - * @pins: An array describing all pins the pin controller affects. - * @npins: The number of entries in @pins. -@@ -106,6 +116,7 @@ struct msm_pingroup { - * @groups: An array describing all pin groups the pin SoC supports. - * @ngroups: The numbmer of entries in @groups. - * @ngpio: The number of pingroups the driver should expose as GPIOs. -+ * @gpio_pull_val: The pull value bit field descriptor. - */ - struct msm_pinctrl_soc_data { - const struct pinctrl_pin_desc *pins; -@@ -115,6 +126,14 @@ struct msm_pinctrl_soc_data { - const struct msm_pingroup *groups; - unsigned ngroups; - unsigned ngpios; -+ const struct msm_pinctrl_gpio_pull *gpio_pull; -+}; -+ -+static const struct msm_pinctrl_gpio_pull msm_gpio_pull = { -+ .no_pull = 0, -+ .pull_down = 1, -+ .keeper = 2, -+ .pull_up = 3, - }; - - int msm_pinctrl_probe(struct platform_device *pdev, ---- a/drivers/pinctrl/qcom/pinctrl-msm8660.c -+++ b/drivers/pinctrl/qcom/pinctrl-msm8660.c -@@ -979,6 +979,7 @@ static const struct msm_pinctrl_soc_data - .groups = msm8660_groups, - .ngroups = ARRAY_SIZE(msm8660_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int msm8660_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-msm8916.c -+++ b/drivers/pinctrl/qcom/pinctrl-msm8916.c -@@ -967,6 +967,7 @@ static const struct msm_pinctrl_soc_data - .groups = msm8916_groups, - .ngroups = ARRAY_SIZE(msm8916_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int msm8916_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-msm8960.c -+++ b/drivers/pinctrl/qcom/pinctrl-msm8960.c -@@ -1244,6 +1244,7 @@ static const struct msm_pinctrl_soc_data - .groups = msm8960_groups, - .ngroups = ARRAY_SIZE(msm8960_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int msm8960_pinctrl_probe(struct platform_device *pdev) ---- a/drivers/pinctrl/qcom/pinctrl-msm8x74.c -+++ b/drivers/pinctrl/qcom/pinctrl-msm8x74.c -@@ -1069,6 +1069,7 @@ static const struct msm_pinctrl_soc_data - .groups = msm8x74_groups, - .ngroups = ARRAY_SIZE(msm8x74_groups), - .ngpios = NUM_GPIO_PINGROUPS, -+ .gpio_pull = &msm_gpio_pull, - }; - - static int msm8x74_pinctrl_probe(struct platform_device *pdev) diff --git a/target/linux/ipq40xx/patches-4.9/860-qcom-mtd-nand-Add-bam_dma-support-in-qcom_nand-drive.patch b/target/linux/ipq40xx/patches-4.9/860-qcom-mtd-nand-Add-bam_dma-support-in-qcom_nand-drive.patch deleted file mode 100644 index 5a3c02c70..000000000 --- a/target/linux/ipq40xx/patches-4.9/860-qcom-mtd-nand-Add-bam_dma-support-in-qcom_nand-drive.patch +++ /dev/null @@ -1,370 +0,0 @@ -From 074036f9de6b8c5fc642e8e2540950f6a35aa804 Mon Sep 17 00:00:00 2001 -From: Ram Chandra Jangir -Date: Thu, 20 Apr 2017 10:31:10 +0530 -Subject: [PATCH] qcom: mtd: nand: Add bam_dma support in qcom_nand driver - -The current driver only support ADM DMA so this patch adds the -BAM DMA support in current NAND driver with compatible string -qcom,ebi2-nandc-bam. -Added bam channels and data buffers, NAND BAM uses 3 channels: -command, data tx and data rx, while ADM uses only single channel. -So this patch adds the BAM channel in device tree and using the -same in NAND driver allocation function. - -Signed-off-by: Ram Chandra Jangir ---- - .../devicetree/bindings/mtd/qcom_nandc.txt | 69 +++++++-- - drivers/mtd/nand/qcom_nandc.c | 160 +++++++++++++++++---- - 2 files changed, 190 insertions(+), 39 deletions(-) - ---- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt -+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt -@@ -1,21 +1,26 @@ - * Qualcomm NAND controller - - Required properties: --- compatible: should be "qcom,ipq806x-nand" -+- compatible: "qcom,ipq806x-nand" for IPQ8064 which uses -+ ADM DMA. -+ "qcom,ebi2-nand-bam" - nand drivers using BAM DMA -+ like IPQ4019. - - reg: MMIO address range - - clocks: must contain core clock and always on clock - - clock-names: must contain "core" for the core clock and "aon" for the - always on clock - - dmas: DMA specifier, consisting of a phandle to the ADM DMA -- controller node and the channel number to be used for -- NAND. Refer to dma.txt and qcom_adm.txt for more details --- dma-names: must be "rxtx" --- qcom,cmd-crci: must contain the ADM command type CRCI block instance -- number specified for the NAND controller on the given -- platform --- qcom,data-crci: must contain the ADM data type CRCI block instance -- number specified for the NAND controller on the given -- platform -+ or BAM DMA controller node and the channel number to -+ be used for NAND. Refer to dma.txt, qcom_adm.txt(ADM) -+ and qcom_bam_dma.txt(BAM) for more details -+- dma-names: "rxtx" - ADM -+ "tx", "rx", "cmd" - BAM -+- qcom,cmd-crci: Only required for ADM DMA. must contain the ADM command -+ type CRCI block instance number specified for the NAND -+ controller on the given platform. -+- qcom,data-crci: Only required for ADM DMA. must contain the ADM data -+ type CRCI block instance number specified for the NAND -+ controller on the given platform. - - #address-cells: <1> - subnodes give the chip-select number - - #size-cells: <0> - -@@ -44,7 +49,7 @@ partition.txt for more detail. - Example: - - nand@1ac00000 { -- compatible = "qcom,ebi2-nandc"; -+ compatible = "qcom,ipq806x-nand","qcom.qcom_nand"; - reg = <0x1ac00000 0x800>; - - clocks = <&gcc EBI2_CLK>, -@@ -58,6 +63,48 @@ nand@1ac00000 { - - #address-cells = <1>; - #size-cells = <0>; -+ -+ nandcs@0 { -+ compatible = "qcom,nandcs"; -+ reg = <0>; -+ -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-bus-width = <8>; -+ -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ partition@0 { -+ label = "boot-nand"; -+ reg = <0 0x58a0000>; -+ }; -+ -+ partition@58a0000 { -+ label = "fs-nand"; -+ reg = <0x58a0000 0x4000000>; -+ }; -+ }; -+ }; -+}; -+ -+nand@79B0000 { -+ compatible = "qcom,ebi2-nandc-bam"; -+ reg = <0x79B0000 0x1000>; -+ -+ clocks = <&gcc EBI2_CLK>, -+ <&gcc EBI2_AON_CLK>; -+ clock-names = "core", "aon"; -+ -+ dmas = <&qpicbam 0>, -+ <&qpicbam 1>, -+ <&qpicbam 2>; -+ dma-names = "tx", "rx", "cmd"; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; - - nandcs@0 { - compatible = "qcom,nandcs"; ---- a/drivers/mtd/nand/qcom_nandc.c -+++ b/drivers/mtd/nand/qcom_nandc.c -@@ -234,6 +234,7 @@ struct nandc_regs { - * by upper layers directly - * @buf_size/count/start: markers for chip->read_buf/write_buf functions - * @reg_read_buf: local buffer for reading back registers via DMA -+ * @reg_read_buf_phys: contains dma address for register read buffer - * @reg_read_pos: marker for data read in reg_read_buf - * - * @regs: a contiguous chunk of memory for DMA register -@@ -242,7 +243,10 @@ struct nandc_regs { - * @cmd1/vld: some fixed controller register values - * @ecc_modes: supported ECC modes by the current controller, - * initialized via DT match data -- */ -+ * @bch_enabled: flag to tell whether BCH or RS ECC mode is used -+ * @dma_bam_enabled: flag to tell whether nand controller is using -+ * bam dma -+*/ - struct qcom_nand_controller { - struct nand_hw_control controller; - struct list_head host_list; -@@ -255,17 +259,28 @@ struct qcom_nand_controller { - struct clk *core_clk; - struct clk *aon_clk; - -- struct dma_chan *chan; -- unsigned int cmd_crci; -- unsigned int data_crci; - struct list_head desc_list; -+ union { -+ struct { -+ struct dma_chan *tx_chan; -+ struct dma_chan *rx_chan; -+ struct dma_chan *cmd_chan; -+ }; -+ struct { -+ struct dma_chan *chan; -+ unsigned int cmd_crci; -+ unsigned int data_crci; -+ }; -+ }; - - u8 *data_buffer; -+ bool dma_bam_enabled; - int buf_size; - int buf_count; - int buf_start; - - __le32 *reg_read_buf; -+ dma_addr_t reg_read_buf_phys; - int reg_read_pos; - - struct nandc_regs *regs; -@@ -324,6 +339,17 @@ struct qcom_nand_host { - u32 clrreadstatus; - }; - -+/* -+ * This data type corresponds to the nand driver data which will be used at -+ * driver probe time -+ * @ecc_modes - ecc mode for nand -+ * @dma_bam_enabled - whether this driver is using bam -+ */ -+struct qcom_nand_driver_data { -+ u32 ecc_modes; -+ bool dma_bam_enabled; -+}; -+ - static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip) - { - return container_of(chip, struct qcom_nand_host, chip); -@@ -1949,16 +1975,46 @@ static int qcom_nandc_alloc(struct qcom_ - if (!nandc->regs) - return -ENOMEM; - -- nandc->reg_read_buf = devm_kzalloc(nandc->dev, -- MAX_REG_RD * sizeof(*nandc->reg_read_buf), -- GFP_KERNEL); -- if (!nandc->reg_read_buf) -- return -ENOMEM; -+ if (!nandc->dma_bam_enabled) { -+ nandc->reg_read_buf = devm_kzalloc(nandc->dev, -+ MAX_REG_RD * -+ sizeof(*nandc->reg_read_buf), -+ GFP_KERNEL); - -- nandc->chan = dma_request_slave_channel(nandc->dev, "rxtx"); -- if (!nandc->chan) { -- dev_err(nandc->dev, "failed to request slave channel\n"); -- return -ENODEV; -+ if (!nandc->reg_read_buf) -+ return -ENOMEM; -+ -+ nandc->chan = dma_request_slave_channel(nandc->dev, "rxtx"); -+ if (!nandc->chan) { -+ dev_err(nandc->dev, "failed to request slave channel\n"); -+ return -ENODEV; -+ } -+ } else { -+ nandc->reg_read_buf = dmam_alloc_coherent(nandc->dev, -+ MAX_REG_RD * -+ sizeof(*nandc->reg_read_buf), -+ &nandc->reg_read_buf_phys, GFP_KERNEL); -+ -+ if (!nandc->reg_read_buf) -+ return -ENOMEM; -+ -+ nandc->tx_chan = dma_request_slave_channel(nandc->dev, "tx"); -+ if (!nandc->tx_chan) { -+ dev_err(nandc->dev, "failed to request tx channel\n"); -+ return -ENODEV; -+ } -+ -+ nandc->rx_chan = dma_request_slave_channel(nandc->dev, "rx"); -+ if (!nandc->rx_chan) { -+ dev_err(nandc->dev, "failed to request rx channel\n"); -+ return -ENODEV; -+ } -+ -+ nandc->cmd_chan = dma_request_slave_channel(nandc->dev, "cmd"); -+ if (!nandc->cmd_chan) { -+ dev_err(nandc->dev, "failed to request cmd channel\n"); -+ return -ENODEV; -+ } - } - - INIT_LIST_HEAD(&nandc->desc_list); -@@ -1971,8 +2027,35 @@ static int qcom_nandc_alloc(struct qcom_ - - static void qcom_nandc_unalloc(struct qcom_nand_controller *nandc) - { -- dma_release_channel(nandc->chan); --} -+ if (nandc->dma_bam_enabled) { -+ if (nandc->tx_chan) -+ dma_release_channel(nandc->tx_chan); -+ -+ if (nandc->rx_chan) -+ dma_release_channel(nandc->rx_chan); -+ -+ if (nandc->cmd_chan) -+ dma_release_channel(nandc->tx_chan); -+ -+ if (nandc->reg_read_buf) -+ dmam_free_coherent(nandc->dev, MAX_REG_RD * -+ sizeof(*nandc->reg_read_buf), -+ nandc->reg_read_buf, -+ nandc->reg_read_buf_phys); -+ } else { -+ if (nandc->chan) -+ dma_release_channel(nandc->chan); -+ -+ if (nandc->reg_read_buf) -+ devm_kfree(nandc->dev, nandc->reg_read_buf); -+ } -+ -+ if (nandc->regs) -+ devm_kfree(nandc->dev, nandc->regs); -+ -+ if (nandc->data_buffer) -+ devm_kfree(nandc->dev, nandc->data_buffer); -+ } - - /* one time setup of a few nand controller registers */ - static int qcom_nandc_setup(struct qcom_nand_controller *nandc) -@@ -2010,6 +2093,8 @@ static int qcom_nand_host_init(struct qc - mtd->name = devm_kasprintf(dev, GFP_KERNEL, "qcom_nand.%d", host->cs); - mtd->owner = THIS_MODULE; - mtd->dev.parent = dev; -+ mtd->priv = chip; -+ chip->priv = nandc; - - chip->cmdfunc = qcom_nandc_command; - chip->select_chip = qcom_nandc_select_chip; -@@ -2057,16 +2142,20 @@ static int qcom_nandc_parse_dt(struct pl - struct device_node *np = nandc->dev->of_node; - int ret; - -- ret = of_property_read_u32(np, "qcom,cmd-crci", &nandc->cmd_crci); -- if (ret) { -- dev_err(nandc->dev, "command CRCI unspecified\n"); -- return ret; -- } -+ if (!nandc->dma_bam_enabled) { -+ ret = of_property_read_u32(np, "qcom,cmd-crci", -+ &nandc->cmd_crci); -+ if (ret) { -+ dev_err(nandc->dev, "command CRCI unspecified\n"); -+ return ret; -+ } - -- ret = of_property_read_u32(np, "qcom,data-crci", &nandc->data_crci); -- if (ret) { -- dev_err(nandc->dev, "data CRCI unspecified\n"); -- return ret; -+ ret = of_property_read_u32(np, "qcom,data-crci", -+ &nandc->data_crci); -+ if (ret) { -+ dev_err(nandc->dev, "data CRCI unspecified\n"); -+ return ret; -+ } - } - - return 0; -@@ -2081,6 +2170,7 @@ static int qcom_nandc_probe(struct platf - struct device_node *dn = dev->of_node, *child; - struct resource *res; - int ret; -+ struct qcom_nand_driver_data *driver_data; - - nandc = devm_kzalloc(&pdev->dev, sizeof(*nandc), GFP_KERNEL); - if (!nandc) -@@ -2095,7 +2185,10 @@ static int qcom_nandc_probe(struct platf - return -ENODEV; - } - -- nandc->ecc_modes = (unsigned long)dev_data; -+ driver_data = (struct qcom_nand_driver_data *)dev_data; -+ -+ nandc->ecc_modes = driver_data->ecc_modes; -+ nandc->dma_bam_enabled = driver_data->dma_bam_enabled; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - nandc->base = devm_ioremap_resource(dev, res); -@@ -2187,7 +2280,15 @@ static int qcom_nandc_remove(struct plat - return 0; - } - --#define EBI2_NANDC_ECC_MODES (ECC_RS_4BIT | ECC_BCH_8BIT) -+struct qcom_nand_driver_data ebi2_nandc_bam_data = { -+ .ecc_modes = (ECC_BCH_4BIT | ECC_BCH_8BIT), -+ .dma_bam_enabled = true, -+}; -+ -+struct qcom_nand_driver_data ebi2_nandc_data = { -+ .ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT), -+ .dma_bam_enabled = false, -+}; - - /* - * data will hold a struct pointer containing more differences once we support -@@ -2195,7 +2296,10 @@ static int qcom_nandc_remove(struct plat - */ - static const struct of_device_id qcom_nandc_of_match[] = { - { .compatible = "qcom,ipq806x-nand", -- .data = (void *)EBI2_NANDC_ECC_MODES, -+ .data = (void *) &ebi2_nandc_data, -+ }, -+ { .compatible = "qcom,ebi2-nandc-bam", -+ .data = (void *) &ebi2_nandc_bam_data, - }, - {} - }; diff --git a/target/linux/ipq40xx/patches-4.9/861-qcom-mtd-nand-Added-bam-transaction-and-support-addi.patch b/target/linux/ipq40xx/patches-4.9/861-qcom-mtd-nand-Added-bam-transaction-and-support-addi.patch deleted file mode 100644 index 4b9f67220..000000000 --- a/target/linux/ipq40xx/patches-4.9/861-qcom-mtd-nand-Added-bam-transaction-and-support-addi.patch +++ /dev/null @@ -1,1267 +0,0 @@ -From 645c7805f2602569263d7ac78050b2c9e91e3377 Mon Sep 17 00:00:00 2001 -From: Ram Chandra Jangir -Date: Thu, 20 Apr 2017 10:23:00 +0530 -Subject: [PATCH] qcom: mtd: nand: Added bam transaction and support - additional CSRs - -This patch adds the following for NAND BAM DMA support - - Bam transaction which will be used for any NAND request. - It contains the array of command elements, command and - data sgl. This transaction will be resetted before every - request. - - Allocation function for NAND BAM transaction which will be - called only once at probe time. - - Reset function for NAND BAM transaction which will be called - before any new NAND request. - - Add support for additional CSRs. - NAND_READ_LOCATION - page offset for reading in BAM DMA mode - NAND_ERASED_CW_DETECT_CFG - status for erased code words - NAND_BUFFER_STATUS - status for ECC - -Signed-off-by: Abhishek Sahu -Signed-off-by: Ram Chandra Jangir ---- - drivers/mtd/nand/qcom_nandc.c | 631 +++++++++++++++++++++++++++++++++++---- - include/linux/dma/qcom_bam_dma.h | 149 +++++++++ - 2 files changed, 721 insertions(+), 59 deletions(-) - create mode 100644 include/linux/dma/qcom_bam_dma.h - ---- a/drivers/mtd/nand/qcom_nandc.c -+++ b/drivers/mtd/nand/qcom_nandc.c -@@ -22,6 +22,7 @@ - #include - #include - #include -+#include - - /* NANDc reg offsets */ - #define NAND_FLASH_CMD 0x00 -@@ -53,6 +54,8 @@ - #define NAND_VERSION 0xf08 - #define NAND_READ_LOCATION_0 0xf20 - #define NAND_READ_LOCATION_1 0xf24 -+#define NAND_READ_LOCATION_2 0xf28 -+#define NAND_READ_LOCATION_3 0xf2c - - /* dummy register offsets, used by write_reg_dma */ - #define NAND_DEV_CMD1_RESTORE 0xdead -@@ -135,6 +138,11 @@ - #define ERASED_PAGE (PAGE_ALL_ERASED | PAGE_ERASED) - #define ERASED_CW (CODEWORD_ALL_ERASED | CODEWORD_ERASED) - -+/* NAND_READ_LOCATION_n bits */ -+#define READ_LOCATION_OFFSET 0 -+#define READ_LOCATION_SIZE 16 -+#define READ_LOCATION_LAST 31 -+ - /* Version Mask */ - #define NAND_VERSION_MAJOR_MASK 0xf0000000 - #define NAND_VERSION_MAJOR_SHIFT 28 -@@ -156,6 +164,9 @@ - #define NAND_DEV_CMD_VLD_VAL (READ_START_VLD | WRITE_START_VLD | \ - ERASE_START_VLD | SEQ_READ_START_VLD) - -+/* NAND_CTRL bits */ -+#define BAM_MODE_EN BIT(0) -+ - /* - * the NAND controller performs reads/writes with ECC in 516 byte chunks. - * the driver calls the chunks 'step' or 'codeword' interchangeably -@@ -177,12 +188,77 @@ - #define ECC_BCH_4BIT BIT(2) - #define ECC_BCH_8BIT BIT(3) - -+/* Flags used for BAM DMA desc preparation*/ -+/* Don't set the EOT in current tx sgl */ -+#define DMA_DESC_FLAG_NO_EOT (0x0001) -+/* Set the NWD flag in current sgl */ -+#define DMA_DESC_FLAG_BAM_NWD (0x0002) -+/* Close current sgl and start writing in another sgl */ -+#define DMA_DESC_FLAG_BAM_NEXT_SGL (0x0004) -+/* -+ * Erased codeword status is being used two times in single transfer so this -+ * flag will determine the current value of erased codeword status register -+ */ -+#define DMA_DESC_ERASED_CW_SET (0x0008) -+ -+/* Returns the dma address for reg read buffer */ -+#define REG_BUF_DMA_ADDR(chip, vaddr) \ -+ ((chip)->reg_read_buf_phys + \ -+ ((uint8_t *)(vaddr) - (uint8_t *)(chip)->reg_read_buf)) -+ -+/* Returns the nand register physical address */ -+#define NAND_REG_PHYS_ADDRESS(chip, addr) \ -+ ((chip)->base_dma + (addr)) -+ -+/* command element array size in bam transaction */ -+#define BAM_CMD_ELEMENT_SIZE (256) -+/* command sgl size in bam transaction */ -+#define BAM_CMD_SGL_SIZE (256) -+/* data sgl size in bam transaction */ -+#define BAM_DATA_SGL_SIZE (128) -+ -+/* -+ * This data type corresponds to the BAM transaction which will be used for any -+ * nand request. -+ * @bam_ce - the array of bam command elements -+ * @cmd_sgl - sgl for nand bam command pipe -+ * @tx_sgl - sgl for nand bam consumer pipe -+ * @rx_sgl - sgl for nand bam producer pipe -+ * @bam_ce_index - the index in bam_ce which is available for next sgl request -+ * @pre_bam_ce_index - the index in bam_ce which marks the start position ce -+ * for current sgl. It will be used for size calculation -+ * for current sgl -+ * @cmd_sgl_cnt - no of entries in command sgl. -+ * @tx_sgl_cnt - no of entries in tx sgl. -+ * @rx_sgl_cnt - no of entries in rx sgl. -+ */ -+struct bam_transaction { -+ struct bam_cmd_element bam_ce[BAM_CMD_ELEMENT_SIZE]; -+ struct qcom_bam_sgl cmd_sgl[BAM_CMD_SGL_SIZE]; -+ struct qcom_bam_sgl tx_sgl[BAM_DATA_SGL_SIZE]; -+ struct qcom_bam_sgl rx_sgl[BAM_DATA_SGL_SIZE]; -+ uint32_t bam_ce_index; -+ uint32_t pre_bam_ce_index; -+ uint32_t cmd_sgl_cnt; -+ uint32_t tx_sgl_cnt; -+ uint32_t rx_sgl_cnt; -+}; -+ -+/** -+ * This data type corresponds to the nand dma descriptor -+ * @list - list for desc_info -+ * @dir - DMA transfer direction -+ * @sgl - sgl which will be used for single sgl dma descriptor -+ * @dma_desc - low level dma engine descriptor -+ * @bam_desc_data - used for bam desc mappings -+ */ - struct desc_info { - struct list_head node; - - enum dma_data_direction dir; - struct scatterlist sgl; - struct dma_async_tx_descriptor *dma_desc; -+ struct qcom_bam_custom_data bam_desc_data; - }; - - /* -@@ -210,6 +286,13 @@ struct nandc_regs { - __le32 orig_vld; - - __le32 ecc_buf_cfg; -+ __le32 read_location0; -+ __le32 read_location1; -+ __le32 read_location2; -+ __le32 read_location3; -+ -+ __le32 erased_cw_detect_cfg_clr; -+ __le32 erased_cw_detect_cfg_set; - }; - - /* -@@ -225,6 +308,7 @@ struct nandc_regs { - * @aon_clk: another controller clock - * - * @chan: dma channel -+ * @bam_txn: contains the bam transaction address - * @cmd_crci: ADM DMA CRCI for command flow control - * @data_crci: ADM DMA CRCI for data flow control - * @desc_list: DMA descriptor list (list of desc_infos) -@@ -250,6 +334,7 @@ struct nandc_regs { - struct qcom_nand_controller { - struct nand_hw_control controller; - struct list_head host_list; -+ struct bam_transaction *bam_txn; - - struct device *dev; - -@@ -350,6 +435,45 @@ struct qcom_nand_driver_data { - bool dma_bam_enabled; - }; - -+/* Allocates and Initializes the BAM transaction */ -+struct bam_transaction *alloc_bam_transaction( -+ struct qcom_nand_controller *nandc) -+{ -+ struct bam_transaction *bam_txn; -+ -+ bam_txn = kzalloc(sizeof(*bam_txn), GFP_KERNEL); -+ -+ if (!bam_txn) -+ return NULL; -+ -+ bam_txn->bam_ce_index = 0; -+ bam_txn->pre_bam_ce_index = 0; -+ bam_txn->cmd_sgl_cnt = 0; -+ bam_txn->tx_sgl_cnt = 0; -+ bam_txn->rx_sgl_cnt = 0; -+ -+ qcom_bam_sg_init_table(bam_txn->cmd_sgl, BAM_CMD_SGL_SIZE); -+ qcom_bam_sg_init_table(bam_txn->tx_sgl, BAM_DATA_SGL_SIZE); -+ qcom_bam_sg_init_table(bam_txn->rx_sgl, BAM_DATA_SGL_SIZE); -+ -+ return bam_txn; -+} -+ -+/* Clears the BAM transaction index */ -+void clear_bam_transaction(struct qcom_nand_controller *nandc) -+{ -+ struct bam_transaction *bam_txn = nandc->bam_txn; -+ -+ if (!nandc->dma_bam_enabled) -+ return; -+ -+ bam_txn->bam_ce_index = 0; -+ bam_txn->pre_bam_ce_index = 0; -+ bam_txn->cmd_sgl_cnt = 0; -+ bam_txn->tx_sgl_cnt = 0; -+ bam_txn->rx_sgl_cnt = 0; -+} -+ - static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip) - { - return container_of(chip, struct qcom_nand_host, chip); -@@ -406,6 +530,16 @@ static __le32 *offset_to_nandc_reg(struc - return ®s->orig_vld; - case NAND_EBI2_ECC_BUF_CFG: - return ®s->ecc_buf_cfg; -+ case NAND_BUFFER_STATUS: -+ return ®s->clrreadstatus; -+ case NAND_READ_LOCATION_0: -+ return ®s->read_location0; -+ case NAND_READ_LOCATION_1: -+ return ®s->read_location1; -+ case NAND_READ_LOCATION_2: -+ return ®s->read_location2; -+ case NAND_READ_LOCATION_3: -+ return ®s->read_location3; - default: - return NULL; - } -@@ -447,7 +581,7 @@ static void update_rw_regs(struct qcom_n - { - struct nand_chip *chip = &host->chip; - struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); -- u32 cmd, cfg0, cfg1, ecc_bch_cfg; -+ u32 cmd, cfg0, cfg1, ecc_bch_cfg, read_location0; - - if (read) { - if (host->use_ecc) -@@ -464,12 +598,20 @@ static void update_rw_regs(struct qcom_n - - cfg1 = host->cfg1; - ecc_bch_cfg = host->ecc_bch_cfg; -+ if (read) -+ read_location0 = (0 << READ_LOCATION_OFFSET) | -+ (host->cw_data << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST); - } else { - cfg0 = (host->cfg0_raw & ~(7U << CW_PER_PAGE)) | - (num_cw - 1) << CW_PER_PAGE; - - cfg1 = host->cfg1_raw; - ecc_bch_cfg = 1 << ECC_CFG_ECC_DISABLE; -+ if (read) -+ read_location0 = (0 << READ_LOCATION_OFFSET) | -+ (host->cw_size << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST); - } - - nandc_set_reg(nandc, NAND_FLASH_CMD, cmd); -@@ -480,8 +622,104 @@ static void update_rw_regs(struct qcom_n - nandc_set_reg(nandc, NAND_FLASH_STATUS, host->clrflashstatus); - nandc_set_reg(nandc, NAND_READ_STATUS, host->clrreadstatus); - nandc_set_reg(nandc, NAND_EXEC_CMD, 1); -+ -+ if (read) -+ nandc_set_reg(nandc, NAND_READ_LOCATION_0, read_location0); -+} -+ -+/* -+ * Prepares the command descriptor for BAM DMA which will be used for NAND -+ * register read and write. The command descriptor requires the command -+ * to be formed in command element type so this function uses the command -+ * element from bam transaction ce array and fills the same with required -+ * data. A single SGL can contain multiple command elements so -+ * DMA_DESC_FLAG_BAM_NEXT_SGL will be used for starting the separate SGL -+ * after the current command element. -+ */ -+static int prep_dma_desc_command(struct qcom_nand_controller *nandc, bool read, -+ int reg_off, const void *vaddr, -+ int size, unsigned int flags) -+{ -+ int bam_ce_size; -+ int i; -+ struct bam_cmd_element *bam_ce_buffer; -+ struct bam_transaction *bam_txn = nandc->bam_txn; -+ -+ bam_ce_buffer = &bam_txn->bam_ce[bam_txn->bam_ce_index]; -+ -+ /* fill the command desc */ -+ for (i = 0; i < size; i++) { -+ if (read) { -+ qcom_prep_bam_ce(&bam_ce_buffer[i], -+ NAND_REG_PHYS_ADDRESS(nandc, reg_off + 4 * i), -+ BAM_READ_COMMAND, -+ REG_BUF_DMA_ADDR(nandc, -+ (unsigned int *)vaddr + i)); -+ } else { -+ qcom_prep_bam_ce(&bam_ce_buffer[i], -+ NAND_REG_PHYS_ADDRESS(nandc, reg_off + 4 * i), -+ BAM_WRITE_COMMAND, -+ *((unsigned int *)vaddr + i)); -+ } -+ } -+ -+ /* use the separate sgl after this command */ -+ if (flags & DMA_DESC_FLAG_BAM_NEXT_SGL) { -+ bam_ce_buffer = &bam_txn->bam_ce[bam_txn->pre_bam_ce_index]; -+ bam_txn->bam_ce_index += size; -+ bam_ce_size = (bam_txn->bam_ce_index - -+ bam_txn->pre_bam_ce_index) * -+ sizeof(struct bam_cmd_element); -+ sg_set_buf(&bam_txn->cmd_sgl[bam_txn->cmd_sgl_cnt].sgl, -+ bam_ce_buffer, -+ bam_ce_size); -+ if (flags & DMA_DESC_FLAG_BAM_NWD) -+ bam_txn->cmd_sgl[bam_txn->cmd_sgl_cnt].dma_flags = -+ DESC_FLAG_NWD | DESC_FLAG_CMD; -+ else -+ bam_txn->cmd_sgl[bam_txn->cmd_sgl_cnt].dma_flags = -+ DESC_FLAG_CMD; -+ -+ bam_txn->cmd_sgl_cnt++; -+ bam_txn->pre_bam_ce_index = bam_txn->bam_ce_index; -+ } else { -+ bam_txn->bam_ce_index += size; -+ } -+ -+ return 0; - } - -+/* -+ * Prepares the data descriptor for BAM DMA which will be used for NAND -+ * data read and write. -+ */ -+static int prep_dma_desc_data_bam(struct qcom_nand_controller *nandc, bool read, -+ int reg_off, const void *vaddr, -+ int size, unsigned int flags) -+{ -+ struct bam_transaction *bam_txn = nandc->bam_txn; -+ -+ if (read) { -+ sg_set_buf(&bam_txn->rx_sgl[bam_txn->rx_sgl_cnt].sgl, -+ vaddr, size); -+ bam_txn->rx_sgl[bam_txn->rx_sgl_cnt].dma_flags = 0; -+ bam_txn->rx_sgl_cnt++; -+ } else { -+ sg_set_buf(&bam_txn->tx_sgl[bam_txn->tx_sgl_cnt].sgl, -+ vaddr, size); -+ if (flags & DMA_DESC_FLAG_NO_EOT) -+ bam_txn->tx_sgl[bam_txn->tx_sgl_cnt].dma_flags = 0; -+ else -+ bam_txn->tx_sgl[bam_txn->tx_sgl_cnt].dma_flags = -+ DESC_FLAG_EOT; -+ -+ bam_txn->tx_sgl_cnt++; -+ } -+ -+ return 0; -+} -+ -+/* Prepares the dma desciptor for adm dma engine */ - static int prep_dma_desc(struct qcom_nand_controller *nandc, bool read, - int reg_off, const void *vaddr, int size, - bool flow_control) -@@ -560,7 +798,7 @@ err: - * @num_regs: number of registers to read - */ - static int read_reg_dma(struct qcom_nand_controller *nandc, int first, -- int num_regs) -+ int num_regs, unsigned int flags) - { - bool flow_control = false; - void *vaddr; -@@ -569,10 +807,18 @@ static int read_reg_dma(struct qcom_nand - if (first == NAND_READ_ID || first == NAND_FLASH_STATUS) - flow_control = true; - -- size = num_regs * sizeof(u32); - vaddr = nandc->reg_read_buf + nandc->reg_read_pos; - nandc->reg_read_pos += num_regs; - -+ if (nandc->dma_bam_enabled) { -+ size = num_regs; -+ -+ return prep_dma_desc_command(nandc, true, first, vaddr, size, -+ flags); -+ } -+ -+ size = num_regs * sizeof(u32); -+ - return prep_dma_desc(nandc, true, first, vaddr, size, flow_control); - } - -@@ -584,7 +830,7 @@ static int read_reg_dma(struct qcom_nand - * @num_regs: number of registers to write - */ - static int write_reg_dma(struct qcom_nand_controller *nandc, int first, -- int num_regs) -+ int num_regs, unsigned int flags) - { - bool flow_control = false; - struct nandc_regs *regs = nandc->regs; -@@ -596,12 +842,29 @@ static int write_reg_dma(struct qcom_nan - if (first == NAND_FLASH_CMD) - flow_control = true; - -+ if (first == NAND_ERASED_CW_DETECT_CFG) { -+ if (flags & DMA_DESC_ERASED_CW_SET) -+ vaddr = ®s->erased_cw_detect_cfg_set; -+ else -+ vaddr = ®s->erased_cw_detect_cfg_clr; -+ } -+ -+ if (first == NAND_EXEC_CMD) -+ flags |= DMA_DESC_FLAG_BAM_NWD; -+ - if (first == NAND_DEV_CMD1_RESTORE) - first = NAND_DEV_CMD1; - - if (first == NAND_DEV_CMD_VLD_RESTORE) - first = NAND_DEV_CMD_VLD; - -+ if (nandc->dma_bam_enabled) { -+ size = num_regs; -+ -+ return prep_dma_desc_command(nandc, false, first, vaddr, size, -+ flags); -+ } -+ - size = num_regs * sizeof(u32); - - return prep_dma_desc(nandc, false, first, vaddr, size, flow_control); -@@ -616,8 +879,12 @@ static int write_reg_dma(struct qcom_nan - * @size: DMA transaction size in bytes - */ - static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off, -- const u8 *vaddr, int size) -+ const u8 *vaddr, int size, unsigned int flags) - { -+ if (nandc->dma_bam_enabled) -+ return prep_dma_desc_data_bam(nandc, true, reg_off, vaddr, size, -+ flags); -+ - return prep_dma_desc(nandc, true, reg_off, vaddr, size, false); - } - -@@ -630,8 +897,12 @@ static int read_data_dma(struct qcom_nan - * @size: DMA transaction size in bytes - */ - static int write_data_dma(struct qcom_nand_controller *nandc, int reg_off, -- const u8 *vaddr, int size) -+ const u8 *vaddr, int size, unsigned int flags) - { -+ if (nandc->dma_bam_enabled) -+ return prep_dma_desc_data_bam(nandc, false, reg_off, vaddr, -+ size, flags); -+ - return prep_dma_desc(nandc, false, reg_off, vaddr, size, false); - } - -@@ -641,14 +912,57 @@ static int write_data_dma(struct qcom_na - */ - static void config_cw_read(struct qcom_nand_controller *nandc) - { -- write_reg_dma(nandc, NAND_FLASH_CMD, 3); -- write_reg_dma(nandc, NAND_DEV0_CFG0, 3); -- write_reg_dma(nandc, NAND_EBI2_ECC_BUF_CFG, 1); - -- write_reg_dma(nandc, NAND_EXEC_CMD, 1); -+ write_reg_dma(nandc, NAND_FLASH_CMD, 3, 0); -+ write_reg_dma(nandc, NAND_DEV0_CFG0, 3, 0); -+ write_reg_dma(nandc, NAND_EBI2_ECC_BUF_CFG, 1, 0); -+ -+ write_reg_dma(nandc, NAND_ERASED_CW_DETECT_CFG, 1, 0); -+ write_reg_dma(nandc, NAND_ERASED_CW_DETECT_CFG, 1, -+ DMA_DESC_ERASED_CW_SET); -+ if (nandc->dma_bam_enabled) -+ write_reg_dma(nandc, NAND_READ_LOCATION_0, 1, -+ DMA_DESC_FLAG_BAM_NEXT_SGL); - -- read_reg_dma(nandc, NAND_FLASH_STATUS, 2); -- read_reg_dma(nandc, NAND_ERASED_CW_DETECT_STATUS, 1); -+ -+ write_reg_dma(nandc, NAND_EXEC_CMD, 1, DMA_DESC_FLAG_BAM_NWD | -+ DMA_DESC_FLAG_BAM_NEXT_SGL); -+ -+ read_reg_dma(nandc, NAND_FLASH_STATUS, 2, 0); -+ read_reg_dma(nandc, NAND_ERASED_CW_DETECT_STATUS, 1, -+ DMA_DESC_FLAG_BAM_NEXT_SGL); -+} -+ -+/* -+ * Helpers to prepare DMA descriptors for configuring registers -+ * before reading a NAND page with BAM. -+ */ -+static void config_bam_page_read(struct qcom_nand_controller *nandc) -+{ -+ write_reg_dma(nandc, NAND_FLASH_CMD, 3, 0); -+ write_reg_dma(nandc, NAND_DEV0_CFG0, 3, 0); -+ write_reg_dma(nandc, NAND_EBI2_ECC_BUF_CFG, 1, 0); -+ write_reg_dma(nandc, NAND_ERASED_CW_DETECT_CFG, 1, 0); -+ write_reg_dma(nandc, NAND_ERASED_CW_DETECT_CFG, 1, -+ DMA_DESC_ERASED_CW_SET | -+ DMA_DESC_FLAG_BAM_NEXT_SGL); -+} -+ -+/* -+ * Helpers to prepare DMA descriptors for configuring registers -+ * before reading each codeword in NAND page with BAM. -+ */ -+static void config_bam_cw_read(struct qcom_nand_controller *nandc) -+{ -+ if (nandc->dma_bam_enabled) -+ write_reg_dma(nandc, NAND_READ_LOCATION_0, 4, 0); -+ -+ write_reg_dma(nandc, NAND_FLASH_CMD, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); -+ write_reg_dma(nandc, NAND_EXEC_CMD, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); -+ -+ read_reg_dma(nandc, NAND_FLASH_STATUS, 2, 0); -+ read_reg_dma(nandc, NAND_ERASED_CW_DETECT_STATUS, 1, -+ DMA_DESC_FLAG_BAM_NEXT_SGL); - } - - /* -@@ -657,19 +971,20 @@ static void config_cw_read(struct qcom_n - */ - static void config_cw_write_pre(struct qcom_nand_controller *nandc) - { -- write_reg_dma(nandc, NAND_FLASH_CMD, 3); -- write_reg_dma(nandc, NAND_DEV0_CFG0, 3); -- write_reg_dma(nandc, NAND_EBI2_ECC_BUF_CFG, 1); -+ write_reg_dma(nandc, NAND_FLASH_CMD, 3, 0); -+ write_reg_dma(nandc, NAND_DEV0_CFG0, 3, 0); -+ write_reg_dma(nandc, NAND_EBI2_ECC_BUF_CFG, 1, -+ DMA_DESC_FLAG_BAM_NEXT_SGL); - } - - static void config_cw_write_post(struct qcom_nand_controller *nandc) - { -- write_reg_dma(nandc, NAND_EXEC_CMD, 1); -+ write_reg_dma(nandc, NAND_EXEC_CMD, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - -- read_reg_dma(nandc, NAND_FLASH_STATUS, 1); -+ read_reg_dma(nandc, NAND_FLASH_STATUS, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - -- write_reg_dma(nandc, NAND_FLASH_STATUS, 1); -- write_reg_dma(nandc, NAND_READ_STATUS, 1); -+ write_reg_dma(nandc, NAND_FLASH_STATUS, 1, 0); -+ write_reg_dma(nandc, NAND_READ_STATUS, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - } - - /* -@@ -683,6 +998,8 @@ static int nandc_param(struct qcom_nand_ - struct nand_chip *chip = &host->chip; - struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); - -+ clear_bam_transaction(nandc); -+ - /* - * NAND_CMD_PARAM is called before we know much about the FLASH chip - * in use. we configure the controller to perform a raw read of 512 -@@ -715,9 +1032,13 @@ static int nandc_param(struct qcom_nand_ - - nandc_set_reg(nandc, NAND_DEV_CMD1_RESTORE, nandc->cmd1); - nandc_set_reg(nandc, NAND_DEV_CMD_VLD_RESTORE, nandc->vld); -+ nandc_set_reg(nandc, NAND_READ_LOCATION_0, -+ (0 << READ_LOCATION_OFFSET) | -+ (512 << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST)); - -- write_reg_dma(nandc, NAND_DEV_CMD_VLD, 1); -- write_reg_dma(nandc, NAND_DEV_CMD1, 1); -+ write_reg_dma(nandc, NAND_DEV_CMD_VLD, 1, 0); -+ write_reg_dma(nandc, NAND_DEV_CMD1, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - - nandc->buf_count = 512; - memset(nandc->data_buffer, 0xff, nandc->buf_count); -@@ -725,11 +1046,12 @@ static int nandc_param(struct qcom_nand_ - config_cw_read(nandc); - - read_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, -- nandc->buf_count); -+ nandc->buf_count, 0); - - /* restore CMD1 and VLD regs */ -- write_reg_dma(nandc, NAND_DEV_CMD1_RESTORE, 1); -- write_reg_dma(nandc, NAND_DEV_CMD_VLD_RESTORE, 1); -+ write_reg_dma(nandc, NAND_DEV_CMD1_RESTORE, 1, 0); -+ write_reg_dma(nandc, NAND_DEV_CMD_VLD_RESTORE, 1, -+ DMA_DESC_FLAG_BAM_NEXT_SGL); - - return 0; - } -@@ -740,6 +1062,8 @@ static int erase_block(struct qcom_nand_ - struct nand_chip *chip = &host->chip; - struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); - -+ clear_bam_transaction(nandc); -+ - nandc_set_reg(nandc, NAND_FLASH_CMD, - BLOCK_ERASE | PAGE_ACC | LAST_PAGE); - nandc_set_reg(nandc, NAND_ADDR0, page_addr); -@@ -751,14 +1075,15 @@ static int erase_block(struct qcom_nand_ - nandc_set_reg(nandc, NAND_FLASH_STATUS, host->clrflashstatus); - nandc_set_reg(nandc, NAND_READ_STATUS, host->clrreadstatus); - -- write_reg_dma(nandc, NAND_FLASH_CMD, 3); -- write_reg_dma(nandc, NAND_DEV0_CFG0, 2); -- write_reg_dma(nandc, NAND_EXEC_CMD, 1); - -- read_reg_dma(nandc, NAND_FLASH_STATUS, 1); -+ write_reg_dma(nandc, NAND_FLASH_CMD, 3, DMA_DESC_FLAG_BAM_NEXT_SGL); -+ write_reg_dma(nandc, NAND_DEV0_CFG0, 2, DMA_DESC_FLAG_BAM_NEXT_SGL); -+ write_reg_dma(nandc, NAND_EXEC_CMD, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); -+ -+ read_reg_dma(nandc, NAND_FLASH_STATUS, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - -- write_reg_dma(nandc, NAND_FLASH_STATUS, 1); -- write_reg_dma(nandc, NAND_READ_STATUS, 1); -+ write_reg_dma(nandc, NAND_FLASH_STATUS, 1, 0); -+ write_reg_dma(nandc, NAND_READ_STATUS, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - - return 0; - } -@@ -772,16 +1097,19 @@ static int read_id(struct qcom_nand_host - if (column == -1) - return 0; - -+ clear_bam_transaction(nandc); -+ - nandc_set_reg(nandc, NAND_FLASH_CMD, FETCH_ID); - nandc_set_reg(nandc, NAND_ADDR0, column); - nandc_set_reg(nandc, NAND_ADDR1, 0); -- nandc_set_reg(nandc, NAND_FLASH_CHIP_SELECT, DM_EN); -+ nandc_set_reg(nandc, NAND_FLASH_CHIP_SELECT, -+ nandc->dma_bam_enabled ? 0 : DM_EN); - nandc_set_reg(nandc, NAND_EXEC_CMD, 1); - -- write_reg_dma(nandc, NAND_FLASH_CMD, 4); -- write_reg_dma(nandc, NAND_EXEC_CMD, 1); -+ write_reg_dma(nandc, NAND_FLASH_CMD, 4, DMA_DESC_FLAG_BAM_NEXT_SGL); -+ write_reg_dma(nandc, NAND_EXEC_CMD, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - -- read_reg_dma(nandc, NAND_READ_ID, 1); -+ read_reg_dma(nandc, NAND_READ_ID, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - - return 0; - } -@@ -792,28 +1120,108 @@ static int reset(struct qcom_nand_host * - struct nand_chip *chip = &host->chip; - struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); - -+ clear_bam_transaction(nandc); -+ - nandc_set_reg(nandc, NAND_FLASH_CMD, RESET_DEVICE); - nandc_set_reg(nandc, NAND_EXEC_CMD, 1); - -- write_reg_dma(nandc, NAND_FLASH_CMD, 1); -- write_reg_dma(nandc, NAND_EXEC_CMD, 1); -+ write_reg_dma(nandc, NAND_FLASH_CMD, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); -+ write_reg_dma(nandc, NAND_EXEC_CMD, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - -- read_reg_dma(nandc, NAND_FLASH_STATUS, 1); -+ read_reg_dma(nandc, NAND_FLASH_STATUS, 1, DMA_DESC_FLAG_BAM_NEXT_SGL); - - return 0; - } - -+static int prepare_bam_async_desc(struct qcom_nand_controller *nandc, -+ struct dma_chan *chan, -+ struct qcom_bam_sgl *bam_sgl, -+ int sgl_cnt, -+ enum dma_transfer_direction direction) -+{ -+ struct desc_info *desc; -+ struct dma_async_tx_descriptor *dma_desc; -+ -+ if (!qcom_bam_map_sg(nandc->dev, bam_sgl, sgl_cnt, direction)) { -+ dev_err(nandc->dev, "failure in mapping sgl\n"); -+ return -ENOMEM; -+ } -+ -+ desc = kzalloc(sizeof(*desc), GFP_KERNEL); -+ if (!desc) { -+ qcom_bam_unmap_sg(nandc->dev, bam_sgl, sgl_cnt, direction); -+ return -ENOMEM; -+ } -+ -+ -+ desc->bam_desc_data.dir = direction; -+ desc->bam_desc_data.sgl_cnt = sgl_cnt; -+ desc->bam_desc_data.bam_sgl = bam_sgl; -+ -+ dma_desc = dmaengine_prep_dma_custom_mapping(chan, -+ &desc->bam_desc_data, -+ 0); -+ -+ if (!dma_desc) { -+ dev_err(nandc->dev, "failure in cmd prep desc\n"); -+ qcom_bam_unmap_sg(nandc->dev, bam_sgl, sgl_cnt, direction); -+ kfree(desc); -+ return -EINVAL; -+ } -+ -+ desc->dma_desc = dma_desc; -+ -+ list_add_tail(&desc->node, &nandc->desc_list); -+ -+ return 0; -+ -+} -+ - /* helpers to submit/free our list of dma descriptors */ - static int submit_descs(struct qcom_nand_controller *nandc) - { - struct desc_info *desc; - dma_cookie_t cookie = 0; -+ struct bam_transaction *bam_txn = nandc->bam_txn; -+ int r; -+ -+ if (nandc->dma_bam_enabled) { -+ if (bam_txn->rx_sgl_cnt) { -+ r = prepare_bam_async_desc(nandc, nandc->rx_chan, -+ bam_txn->rx_sgl, bam_txn->rx_sgl_cnt, -+ DMA_DEV_TO_MEM); -+ if (r) -+ return r; -+ } -+ -+ if (bam_txn->tx_sgl_cnt) { -+ r = prepare_bam_async_desc(nandc, nandc->tx_chan, -+ bam_txn->tx_sgl, bam_txn->tx_sgl_cnt, -+ DMA_MEM_TO_DEV); -+ if (r) -+ return r; -+ } -+ -+ r = prepare_bam_async_desc(nandc, nandc->cmd_chan, -+ bam_txn->cmd_sgl, bam_txn->cmd_sgl_cnt, -+ DMA_MEM_TO_DEV); -+ if (r) -+ return r; -+ } - - list_for_each_entry(desc, &nandc->desc_list, node) - cookie = dmaengine_submit(desc->dma_desc); - -- if (dma_sync_wait(nandc->chan, cookie) != DMA_COMPLETE) -- return -ETIMEDOUT; -+ if (nandc->dma_bam_enabled) { -+ dma_async_issue_pending(nandc->tx_chan); -+ dma_async_issue_pending(nandc->rx_chan); -+ -+ if (dma_sync_wait(nandc->cmd_chan, cookie) != DMA_COMPLETE) -+ return -ETIMEDOUT; -+ } else { -+ if (dma_sync_wait(nandc->chan, cookie) != DMA_COMPLETE) -+ return -ETIMEDOUT; -+ } - - return 0; - } -@@ -824,7 +1232,16 @@ static void free_descs(struct qcom_nand_ - - list_for_each_entry_safe(desc, n, &nandc->desc_list, node) { - list_del(&desc->node); -- dma_unmap_sg(nandc->dev, &desc->sgl, 1, desc->dir); -+ -+ if (nandc->dma_bam_enabled) -+ qcom_bam_unmap_sg(nandc->dev, -+ desc->bam_desc_data.bam_sgl, -+ desc->bam_desc_data.sgl_cnt, -+ desc->bam_desc_data.dir); -+ else -+ dma_unmap_sg(nandc->dev, &desc->sgl, 1, -+ desc->dir); -+ - kfree(desc); - } - } -@@ -1135,6 +1552,9 @@ static int read_page_ecc(struct qcom_nan - struct nand_ecc_ctrl *ecc = &chip->ecc; - int i, ret; - -+ if (nandc->dma_bam_enabled) -+ config_bam_page_read(nandc); -+ - /* queue cmd descs for each codeword */ - for (i = 0; i < ecc->steps; i++) { - int data_size, oob_size; -@@ -1148,11 +1568,36 @@ static int read_page_ecc(struct qcom_nan - oob_size = host->ecc_bytes_hw + host->spare_bytes; - } - -- config_cw_read(nandc); -+ if (nandc->dma_bam_enabled) { -+ if (data_buf && oob_buf) { -+ nandc_set_reg(nandc, NAND_READ_LOCATION_0, -+ (0 << READ_LOCATION_OFFSET) | -+ (data_size << READ_LOCATION_SIZE) | -+ (0 << READ_LOCATION_LAST)); -+ nandc_set_reg(nandc, NAND_READ_LOCATION_1, -+ (data_size << READ_LOCATION_OFFSET) | -+ (oob_size << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST)); -+ } else if (data_buf) { -+ nandc_set_reg(nandc, NAND_READ_LOCATION_0, -+ (0 << READ_LOCATION_OFFSET) | -+ (data_size << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST)); -+ } else { -+ nandc_set_reg(nandc, NAND_READ_LOCATION_0, -+ (data_size << READ_LOCATION_OFFSET) | -+ (oob_size << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST)); -+ } -+ -+ config_bam_cw_read(nandc); -+ } else { -+ config_cw_read(nandc); -+ } - - if (data_buf) - read_data_dma(nandc, FLASH_BUF_ACC, data_buf, -- data_size); -+ data_size, 0); - - /* - * when ecc is enabled, the controller doesn't read the real -@@ -1168,7 +1613,7 @@ static int read_page_ecc(struct qcom_nan - *oob_buf++ = 0xff; - - read_data_dma(nandc, FLASH_BUF_ACC + data_size, -- oob_buf, oob_size); -+ oob_buf, oob_size, 0); - } - - if (data_buf) -@@ -1207,10 +1652,14 @@ static int copy_last_cw(struct qcom_nand - - set_address(host, host->cw_size * (ecc->steps - 1), page); - update_rw_regs(host, 1, true); -+ nandc_set_reg(nandc, NAND_READ_LOCATION_0, -+ (0 << READ_LOCATION_OFFSET) | -+ (size << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST)); - - config_cw_read(nandc); - -- read_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, size); -+ read_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, size, 0); - - ret = submit_descs(nandc); - if (ret) -@@ -1233,6 +1682,7 @@ static int qcom_nandc_read_page(struct m - data_buf = buf; - oob_buf = oob_required ? chip->oob_poi : NULL; - -+ clear_bam_transaction(nandc); - ret = read_page_ecc(host, data_buf, oob_buf); - if (ret) { - dev_err(nandc->dev, "failure to read page\n"); -@@ -1252,13 +1702,19 @@ static int qcom_nandc_read_page_raw(stru - u8 *data_buf, *oob_buf; - struct nand_ecc_ctrl *ecc = &chip->ecc; - int i, ret; -+ int read_location; - - data_buf = buf; - oob_buf = chip->oob_poi; - - host->use_ecc = false; -+ -+ clear_bam_transaction(nandc); - update_rw_regs(host, ecc->steps, true); - -+ if (nandc->dma_bam_enabled) -+ config_bam_page_read(nandc); -+ - for (i = 0; i < ecc->steps; i++) { - int data_size1, data_size2, oob_size1, oob_size2; - int reg_off = FLASH_BUF_ACC; -@@ -1276,21 +1732,49 @@ static int qcom_nandc_read_page_raw(stru - oob_size2 = host->ecc_bytes_hw + host->spare_bytes; - } - -- config_cw_read(nandc); -+ if (nandc->dma_bam_enabled) { -+ read_location = 0; -+ nandc_set_reg(nandc, NAND_READ_LOCATION_0, -+ (read_location << READ_LOCATION_OFFSET) | -+ (data_size1 << READ_LOCATION_SIZE) | -+ (0 << READ_LOCATION_LAST)); -+ read_location += data_size1; -+ -+ nandc_set_reg(nandc, NAND_READ_LOCATION_1, -+ (read_location << READ_LOCATION_OFFSET) | -+ (oob_size1 << READ_LOCATION_SIZE) | -+ (0 << READ_LOCATION_LAST)); -+ read_location += oob_size1; -+ -+ nandc_set_reg(nandc, NAND_READ_LOCATION_2, -+ (read_location << READ_LOCATION_OFFSET) | -+ (data_size2 << READ_LOCATION_SIZE) | -+ (0 << READ_LOCATION_LAST)); -+ read_location += data_size2; -+ -+ nandc_set_reg(nandc, NAND_READ_LOCATION_3, -+ (read_location << READ_LOCATION_OFFSET) | -+ (oob_size2 << READ_LOCATION_SIZE) | -+ (1 << READ_LOCATION_LAST)); -+ -+ config_bam_cw_read(nandc); -+ } else { -+ config_cw_read(nandc); -+ } - -- read_data_dma(nandc, reg_off, data_buf, data_size1); -+ read_data_dma(nandc, reg_off, data_buf, data_size1, 0); - reg_off += data_size1; - data_buf += data_size1; - -- read_data_dma(nandc, reg_off, oob_buf, oob_size1); -+ read_data_dma(nandc, reg_off, oob_buf, oob_size1, 0); - reg_off += oob_size1; - oob_buf += oob_size1; - -- read_data_dma(nandc, reg_off, data_buf, data_size2); -+ read_data_dma(nandc, reg_off, data_buf, data_size2, 0); - reg_off += data_size2; - data_buf += data_size2; - -- read_data_dma(nandc, reg_off, oob_buf, oob_size2); -+ read_data_dma(nandc, reg_off, oob_buf, oob_size2, 0); - oob_buf += oob_size2; - } - -@@ -1313,6 +1797,7 @@ static int qcom_nandc_read_oob(struct mt - int ret; - - clear_read_regs(nandc); -+ clear_bam_transaction(nandc); - - host->use_ecc = true; - set_address(host, 0, page); -@@ -1336,6 +1821,7 @@ static int qcom_nandc_write_page(struct - int i, ret; - - clear_read_regs(nandc); -+ clear_bam_transaction(nandc); - - data_buf = (u8 *)buf; - oob_buf = chip->oob_poi; -@@ -1357,7 +1843,8 @@ static int qcom_nandc_write_page(struct - - config_cw_write_pre(nandc); - -- write_data_dma(nandc, FLASH_BUF_ACC, data_buf, data_size); -+ write_data_dma(nandc, FLASH_BUF_ACC, data_buf, data_size, -+ i == (ecc->steps - 1) ? DMA_DESC_FLAG_NO_EOT : 0); - - /* - * when ECC is enabled, we don't really need to write anything -@@ -1370,7 +1857,7 @@ static int qcom_nandc_write_page(struct - oob_buf += host->bbm_size; - - write_data_dma(nandc, FLASH_BUF_ACC + data_size, -- oob_buf, oob_size); -+ oob_buf, oob_size, 0); - } - - config_cw_write_post(nandc); -@@ -1400,6 +1887,7 @@ static int qcom_nandc_write_page_raw(str - int i, ret; - - clear_read_regs(nandc); -+ clear_bam_transaction(nandc); - - data_buf = (u8 *)buf; - oob_buf = chip->oob_poi; -@@ -1426,19 +1914,22 @@ static int qcom_nandc_write_page_raw(str - - config_cw_write_pre(nandc); - -- write_data_dma(nandc, reg_off, data_buf, data_size1); -+ write_data_dma(nandc, reg_off, data_buf, data_size1, -+ DMA_DESC_FLAG_NO_EOT); - reg_off += data_size1; - data_buf += data_size1; - -- write_data_dma(nandc, reg_off, oob_buf, oob_size1); -+ write_data_dma(nandc, reg_off, oob_buf, oob_size1, -+ DMA_DESC_FLAG_NO_EOT); - reg_off += oob_size1; - oob_buf += oob_size1; - -- write_data_dma(nandc, reg_off, data_buf, data_size2); -+ write_data_dma(nandc, reg_off, data_buf, data_size2, -+ DMA_DESC_FLAG_NO_EOT); - reg_off += data_size2; - data_buf += data_size2; - -- write_data_dma(nandc, reg_off, oob_buf, oob_size2); -+ write_data_dma(nandc, reg_off, oob_buf, oob_size2, 0); - oob_buf += oob_size2; - - config_cw_write_post(nandc); -@@ -1474,6 +1965,7 @@ static int qcom_nandc_write_oob(struct m - - host->use_ecc = true; - -+ clear_bam_transaction(nandc); - ret = copy_last_cw(host, page); - if (ret) - return ret; -@@ -1493,7 +1985,7 @@ static int qcom_nandc_write_oob(struct m - - config_cw_write_pre(nandc); - write_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, -- data_size + oob_size); -+ data_size + oob_size, 0); - config_cw_write_post(nandc); - - ret = submit_descs(nandc); -@@ -1531,6 +2023,7 @@ static int qcom_nandc_block_bad(struct m - */ - host->use_ecc = false; - -+ clear_bam_transaction(nandc); - ret = copy_last_cw(host, page); - if (ret) - goto err; -@@ -1561,6 +2054,7 @@ static int qcom_nandc_block_markbad(stru - int page, ret, status = 0; - - clear_read_regs(nandc); -+ clear_bam_transaction(nandc); - - /* - * to mark the BBM as bad, we flash the entire last codeword with 0s. -@@ -1577,7 +2071,8 @@ static int qcom_nandc_block_markbad(stru - update_rw_regs(host, 1, false); - - config_cw_write_pre(nandc); -- write_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, host->cw_size); -+ write_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, -+ host->cw_size, 0); - config_cw_write_post(nandc); - - ret = submit_descs(nandc); -@@ -1937,6 +2432,8 @@ static int qcom_nand_host_setup(struct q - - host->clrflashstatus = FS_READY_BSY_N; - host->clrreadstatus = 0xc0; -+ nandc->regs->erased_cw_detect_cfg_clr = CLR_ERASED_PAGE_DET; -+ nandc->regs->erased_cw_detect_cfg_set = SET_ERASED_PAGE_DET; - - dev_dbg(nandc->dev, - "cfg0 %x cfg1 %x ecc_buf_cfg %x ecc_bch cfg %x cw_size %d cw_data %d strength %d parity_bytes %d steps %d\n", -@@ -2015,6 +2512,12 @@ static int qcom_nandc_alloc(struct qcom_ - dev_err(nandc->dev, "failed to request cmd channel\n"); - return -ENODEV; - } -+ -+ nandc->bam_txn = alloc_bam_transaction(nandc); -+ if (!nandc->bam_txn) { -+ dev_err(nandc->dev, "failed to allocate bam transaction\n"); -+ return -ENOMEM; -+ } - } - - INIT_LIST_HEAD(&nandc->desc_list); -@@ -2050,6 +2553,9 @@ static void qcom_nandc_unalloc(struct qc - devm_kfree(nandc->dev, nandc->reg_read_buf); - } - -+ if (nandc->bam_txn) -+ devm_kfree(nandc->dev, nandc->bam_txn); -+ - if (nandc->regs) - devm_kfree(nandc->dev, nandc->regs); - -@@ -2060,12 +2566,19 @@ static void qcom_nandc_unalloc(struct qc - /* one time setup of a few nand controller registers */ - static int qcom_nandc_setup(struct qcom_nand_controller *nandc) - { -+ u32 nand_ctrl; -+ - /* kill onenand */ - nandc_write(nandc, SFLASHC_BURST_CFG, 0); - nandc_write(nandc, NAND_DEV_CMD_VLD, NAND_DEV_CMD_VLD_VAL); - -- /* enable ADM DMA */ -- nandc_write(nandc, NAND_FLASH_CHIP_SELECT, DM_EN); -+ /* enable ADM or BAM DMA */ -+ if (!nandc->dma_bam_enabled) { -+ nandc_write(nandc, NAND_FLASH_CHIP_SELECT, DM_EN); -+ } else { -+ nand_ctrl = nandc_read(nandc, NAND_CTRL); -+ nandc_write(nandc, NAND_CTRL, nand_ctrl | BAM_MODE_EN); -+ } - - /* save the original values of these registers */ - nandc->cmd1 = nandc_read(nandc, NAND_DEV_CMD1); ---- /dev/null -+++ b/include/linux/dma/qcom_bam_dma.h -@@ -0,0 +1,149 @@ -+/* -+ * Copyright (c) 2017, The Linux Foundation. All rights reserved. -+ * -+ * Permission to use, copy, modify, and/or distribute this software for any -+ * purpose with or without fee is hereby granted, provided that the above -+ * copyright notice and this permission notice appear in all copies. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES -+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR -+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES -+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN -+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF -+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. -+ */ -+ -+#ifndef _QCOM_BAM_DMA_H -+#define _QCOM_BAM_DMA_H -+ -+#include -+ -+#define DESC_FLAG_INT BIT(15) -+#define DESC_FLAG_EOT BIT(14) -+#define DESC_FLAG_EOB BIT(13) -+#define DESC_FLAG_NWD BIT(12) -+#define DESC_FLAG_CMD BIT(11) -+ -+/* -+ * QCOM BAM DMA SGL struct -+ * -+ * @sgl: DMA SGL -+ * @dma_flags: BAM DMA flags -+ */ -+struct qcom_bam_sgl { -+ struct scatterlist sgl; -+ unsigned int dma_flags; -+}; -+ -+/* -+ * This data type corresponds to the native Command Element -+ * supported by BAM DMA Engine. -+ * -+ * @addr - register address. -+ * @command - command type. -+ * @data - for write command: content to be written into peripheral register. -+ * for read command: dest addr to write peripheral register value to. -+ * @mask - register mask. -+ * @reserved - for future usage. -+ * -+ */ -+struct bam_cmd_element { -+ __le32 addr:24; -+ __le32 command:8; -+ __le32 data; -+ __le32 mask; -+ __le32 reserved; -+}; -+ -+/* -+ * This enum indicates the command type in a command element -+ */ -+enum bam_command_type { -+ BAM_WRITE_COMMAND = 0, -+ BAM_READ_COMMAND, -+}; -+ -+/* -+ * qcom_bam_sg_init_table - Init QCOM BAM SGL -+ * @bam_sgl: bam sgl -+ * @nents: number of entries in bam sgl -+ * -+ * This function performs the initialization for each SGL in BAM SGL -+ * with generic SGL API. -+ */ -+static inline void qcom_bam_sg_init_table(struct qcom_bam_sgl *bam_sgl, -+ unsigned int nents) -+{ -+ int i; -+ -+ for (i = 0; i < nents; i++) -+ sg_init_table(&bam_sgl[i].sgl, 1); -+} -+ -+/* -+ * qcom_bam_unmap_sg - Unmap QCOM BAM SGL -+ * @dev: device for which unmapping needs to be done -+ * @bam_sgl: bam sgl -+ * @nents: number of entries in bam sgl -+ * @dir: dma transfer direction -+ * -+ * This function performs the DMA unmapping for each SGL in BAM SGL -+ * with generic SGL API. -+ */ -+static inline void qcom_bam_unmap_sg(struct device *dev, -+ struct qcom_bam_sgl *bam_sgl, int nents, enum dma_data_direction dir) -+{ -+ int i; -+ -+ for (i = 0; i < nents; i++) -+ dma_unmap_sg(dev, &bam_sgl[i].sgl, 1, dir); -+} -+ -+/* -+ * qcom_bam_map_sg - Map QCOM BAM SGL -+ * @dev: device for which mapping needs to be done -+ * @bam_sgl: bam sgl -+ * @nents: number of entries in bam sgl -+ * @dir: dma transfer direction -+ * -+ * This function performs the DMA mapping for each SGL in BAM SGL -+ * with generic SGL API. -+ * -+ * returns 0 on error and > 0 on success -+ */ -+static inline int qcom_bam_map_sg(struct device *dev, -+ struct qcom_bam_sgl *bam_sgl, int nents, enum dma_data_direction dir) -+{ -+ int i, ret = 0; -+ -+ for (i = 0; i < nents; i++) { -+ ret = dma_map_sg(dev, &bam_sgl[i].sgl, 1, dir); -+ if (!ret) -+ break; -+ } -+ -+ /* unmap the mapped sgl from previous loop in case of error */ -+ if (!ret) -+ qcom_bam_unmap_sg(dev, bam_sgl, i, dir); -+ -+ return ret; -+} -+ -+/* -+ * qcom_prep_bam_ce - Wrapper function to prepare a single BAM command element -+ * with the data that is passed to this function. -+ * @bam_ce: bam command element -+ * @addr: target address -+ * @command: command in bam_command_type -+ * @data: actual data for write and dest addr for read -+ */ -+static inline void qcom_prep_bam_ce(struct bam_cmd_element *bam_ce, -+ uint32_t addr, uint32_t command, uint32_t data) -+{ -+ bam_ce->addr = cpu_to_le32(addr); -+ bam_ce->command = cpu_to_le32(command); -+ bam_ce->data = cpu_to_le32(data); -+ bam_ce->mask = 0xFFFFFFFF; -+} -+#endif diff --git a/target/linux/ipq40xx/patches-4.9/862-dmaengine-qcom-bam_dma-Add-custom-data-mapping.patch b/target/linux/ipq40xx/patches-4.9/862-dmaengine-qcom-bam_dma-Add-custom-data-mapping.patch deleted file mode 100644 index 796938f2d..000000000 --- a/target/linux/ipq40xx/patches-4.9/862-dmaengine-qcom-bam_dma-Add-custom-data-mapping.patch +++ /dev/null @@ -1,209 +0,0 @@ -From 5a7ccdf845d64b385affdcffaf2defbe9848be15 Mon Sep 17 00:00:00 2001 -From: Ram Chandra Jangir -Date: Thu, 20 Apr 2017 10:39:00 +0530 -Subject: [PATCH] dmaengine: qcom: bam_dma: Add custom data mapping - -Add a new function to support for preparing DMA descriptor -for custom data. - -Signed-off-by: Abhishek Sahu -Signed-off-by: Ram Chandra Jangir ---- - drivers/dma/qcom/bam_dma.c | 97 +++++++++++++++++++++++++++++++++++++--- - include/linux/dma/qcom_bam_dma.h | 14 ++++++ - include/linux/dmaengine.h | 14 ++++++ - 3 files changed, 119 insertions(+), 6 deletions(-) - ---- a/drivers/dma/qcom/bam_dma.c -+++ b/drivers/dma/qcom/bam_dma.c -@@ -49,6 +49,7 @@ - #include - #include - #include -+#include - - #include "../dmaengine.h" - #include "../virt-dma.h" -@@ -61,11 +62,6 @@ struct bam_desc_hw { - - #define BAM_DMA_AUTOSUSPEND_DELAY 100 - --#define DESC_FLAG_INT BIT(15) --#define DESC_FLAG_EOT BIT(14) --#define DESC_FLAG_EOB BIT(13) --#define DESC_FLAG_NWD BIT(12) -- - struct bam_async_desc { - struct virt_dma_desc vd; - -@@ -670,6 +666,93 @@ err_out: - } - - /** -+ * bam_prep_dma_custom_mapping - Prep DMA descriptor from custom data -+ * -+ * @chan: dma channel -+ * @data: custom data -+ * @flags: DMA flags -+ */ -+static struct dma_async_tx_descriptor *bam_prep_dma_custom_mapping( -+ struct dma_chan *chan, -+ void *data, unsigned long flags) -+{ -+ struct bam_chan *bchan = to_bam_chan(chan); -+ struct bam_device *bdev = bchan->bdev; -+ struct bam_async_desc *async_desc; -+ struct qcom_bam_custom_data *desc_data = data; -+ u32 i; -+ struct bam_desc_hw *desc; -+ unsigned int num_alloc = 0; -+ -+ -+ if (!is_slave_direction(desc_data->dir)) { -+ dev_err(bdev->dev, "invalid dma direction\n"); -+ return NULL; -+ } -+ -+ /* calculate number of required entries */ -+ for (i = 0; i < desc_data->sgl_cnt; i++) -+ num_alloc += DIV_ROUND_UP( -+ sg_dma_len(&desc_data->bam_sgl[i].sgl), BAM_FIFO_SIZE); -+ -+ /* allocate enough room to accommodate the number of entries */ -+ async_desc = kzalloc(sizeof(*async_desc) + -+ (num_alloc * sizeof(struct bam_desc_hw)), GFP_NOWAIT); -+ -+ if (!async_desc) -+ goto err_out; -+ -+ if (flags & DMA_PREP_FENCE) -+ async_desc->flags |= DESC_FLAG_NWD; -+ -+ if (flags & DMA_PREP_INTERRUPT) -+ async_desc->flags |= DESC_FLAG_EOT; -+ else -+ async_desc->flags |= DESC_FLAG_INT; -+ -+ async_desc->num_desc = num_alloc; -+ async_desc->curr_desc = async_desc->desc; -+ async_desc->dir = desc_data->dir; -+ -+ /* fill in temporary descriptors */ -+ desc = async_desc->desc; -+ for (i = 0; i < desc_data->sgl_cnt; i++) { -+ unsigned int remainder; -+ unsigned int curr_offset = 0; -+ -+ remainder = sg_dma_len(&desc_data->bam_sgl[i].sgl); -+ -+ do { -+ desc->addr = cpu_to_le32( -+ sg_dma_address(&desc_data->bam_sgl[i].sgl) + -+ curr_offset); -+ -+ if (desc_data->bam_sgl[i].dma_flags) -+ desc->flags |= cpu_to_le16( -+ desc_data->bam_sgl[i].dma_flags); -+ -+ if (remainder > BAM_FIFO_SIZE) { -+ desc->size = cpu_to_le16(BAM_FIFO_SIZE); -+ remainder -= BAM_FIFO_SIZE; -+ curr_offset += BAM_FIFO_SIZE; -+ } else { -+ desc->size = cpu_to_le16(remainder); -+ remainder = 0; -+ } -+ -+ async_desc->length += desc->size; -+ desc++; -+ } while (remainder > 0); -+ } -+ -+ return vchan_tx_prep(&bchan->vc, &async_desc->vd, flags); -+ -+err_out: -+ kfree(async_desc); -+ return NULL; -+} -+ -+/** - * bam_dma_terminate_all - terminate all transactions on a channel - * @bchan: bam dma channel - * -@@ -960,7 +1043,7 @@ static void bam_start_dma(struct bam_cha - - /* set any special flags on the last descriptor */ - if (async_desc->num_desc == async_desc->xfer_len) -- desc[async_desc->xfer_len - 1].flags = -+ desc[async_desc->xfer_len - 1].flags |= - cpu_to_le16(async_desc->flags); - else - desc[async_desc->xfer_len - 1].flags |= -@@ -1237,6 +1320,8 @@ static int bam_dma_probe(struct platform - bdev->common.device_alloc_chan_resources = bam_alloc_chan; - bdev->common.device_free_chan_resources = bam_free_chan; - bdev->common.device_prep_slave_sg = bam_prep_slave_sg; -+ bdev->common.device_prep_dma_custom_mapping = -+ bam_prep_dma_custom_mapping; - bdev->common.device_config = bam_slave_config; - bdev->common.device_pause = bam_pause; - bdev->common.device_resume = bam_resume; ---- a/include/linux/dma/qcom_bam_dma.h -+++ b/include/linux/dma/qcom_bam_dma.h -@@ -65,6 +65,19 @@ enum bam_command_type { - }; - - /* -+ * QCOM BAM DMA custom data -+ * -+ * @sgl_cnt: number of sgl in bam_sgl -+ * @dir: DMA data transfer direction -+ * @bam_sgl: BAM SGL pointer -+ */ -+struct qcom_bam_custom_data { -+ u32 sgl_cnt; -+ enum dma_transfer_direction dir; -+ struct qcom_bam_sgl *bam_sgl; -+}; -+ -+/* - * qcom_bam_sg_init_table - Init QCOM BAM SGL - * @bam_sgl: bam sgl - * @nents: number of entries in bam sgl ---- a/include/linux/dmaengine.h -+++ b/include/linux/dmaengine.h -@@ -692,6 +692,8 @@ struct dma_filter { - * be called after period_len bytes have been transferred. - * @device_prep_interleaved_dma: Transfer expression in a generic way. - * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address -+ * @device_prep_dma_custom_mapping: prepares a dma operation from dma driver -+ * specific custom data - * @device_config: Pushes a new configuration to a channel, return 0 or an error - * code - * @device_pause: Pauses any transfer happening on a channel. Returns -@@ -783,6 +785,9 @@ struct dma_device { - struct dma_async_tx_descriptor *(*device_prep_dma_imm_data)( - struct dma_chan *chan, dma_addr_t dst, u64 data, - unsigned long flags); -+ struct dma_async_tx_descriptor *(*device_prep_dma_custom_mapping)( -+ struct dma_chan *chan, void *data, -+ unsigned long flags); - - int (*device_config)(struct dma_chan *chan, - struct dma_slave_config *config); -@@ -899,6 +904,15 @@ static inline struct dma_async_tx_descri - src_sg, src_nents, flags); - } - -+static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_custom_mapping( -+ struct dma_chan *chan, -+ void *data, -+ unsigned long flags) -+{ -+ return chan->device->device_prep_dma_custom_mapping(chan, data, -+ flags); -+} -+ - /** - * dmaengine_terminate_all() - Terminate all active DMA transfers - * @chan: The channel for which to terminate the transfers diff --git a/target/linux/ipq40xx/patches-4.9/863-dts-ipq4019-add-nand-and-qpic-bam-dma-node.patch b/target/linux/ipq40xx/patches-4.9/863-dts-ipq4019-add-nand-and-qpic-bam-dma-node.patch deleted file mode 100644 index f054927e0..000000000 --- a/target/linux/ipq40xx/patches-4.9/863-dts-ipq4019-add-nand-and-qpic-bam-dma-node.patch +++ /dev/null @@ -1,166 +0,0 @@ -From 02bbf3c46e1e38e9ca699143566903683e3a015d Mon Sep 17 00:00:00 2001 -From: Ram Chandra Jangir -Date: Thu, 20 Apr 2017 10:45:00 +0530 -Subject: [PATCH] dts: ipq4019: add nand and qpic bam dma node - -This change adds QPIC BAM dma and NAND driver node's in -IPQ4019 device tree, also enable this for AP-DK04.1 based -boards. - -Signed-off-by: Ram Chandra Jangir ---- - arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 75 +++++++++++++++++++++++++++ - arch/arm/boot/dts/qcom-ipq4019.dtsi | 38 ++++++++++++++ - 2 files changed, 113 insertions(+) - ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi -@@ -88,6 +88,86 @@ - bias-disable; - }; - }; -+ -+ nand_pins: nand_pins { -+ -+ mux_1 { -+ pins = "gpio52", "gpio53", "gpio54", -+ "gpio55", "gpio56", "gpio61", -+ "gpio62", "gpio63", "gpio69"; -+ function = "qpic_pad"; -+ bias-disable; -+ }; -+ -+ mux_2 { -+ pins = "gpio67"; -+ function = "qpic_pad0"; -+ bias-disable; -+ }; -+ -+ mux_3 { -+ pins = "gpio64"; -+ function = "qpic_pad1"; -+ bias-disable; -+ }; -+ -+ mux_4 { -+ pins = "gpio65"; -+ function = "qpic_pad2"; -+ bias-disable; -+ }; -+ -+ mux_5 { -+ pins = "gpio66"; -+ function = "qpic_pad3"; -+ bias-disable; -+ }; -+ -+ mux_6 { -+ pins = "gpio57"; -+ function = "qpic_pad4"; -+ bias-disable; -+ }; -+ -+ mux_7 { -+ pins = "gpio58"; -+ function = "qpic_pad5"; -+ bias-disable; -+ }; -+ -+ mux_8 { -+ pins = "gpio59"; -+ function = "qpic_pad6"; -+ bias-disable; -+ }; -+ -+ mux_9 { -+ pins = "gpio60"; -+ function = "qpic_pad7"; -+ bias-disable; -+ }; -+ -+ mux_10 { -+ pins = "gpio68"; -+ function = "qpic_pad8"; -+ bias-disable; -+ }; -+ -+ pullups { -+ pins = "gpio52", "gpio53", "gpio58", -+ "gpio59"; -+ bias-pull-up; -+ }; -+ -+ pulldowns { -+ pins = "gpio54", "gpio55", "gpio56", -+ "gpio57", "gpio60", "gpio61", -+ "gpio62", "gpio63", "gpio64", -+ "gpio65", "gpio66", "gpio67", -+ "gpio68", "gpio69"; -+ bias-pull-down; -+ }; -+ }; - }; - - blsp_dma: dma@7884000 { -@@ -159,5 +239,15 @@ - watchdog@b017000 { - status = "ok"; - }; -+ -+ qpic_bam: dma@7984000 { -+ status = "ok"; -+ }; -+ -+ nand: qpic-nand@79b0000 { -+ pinctrl-0 = <&nand_pins>; -+ pinctrl-names = "default"; -+ status = "ok"; -+ }; - }; - }; ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -580,5 +580,43 @@ - "legacy"; - status = "disabled"; - }; -+ -+ qpic_bam: dma@7984000 { -+ compatible = "qcom,bam-v1.7.0"; -+ reg = <0x7984000 0x1a000>; -+ interrupts = <0 101 0>; -+ clocks = <&gcc GCC_QPIC_AHB_CLK>; -+ clock-names = "bam_clk"; -+ #dma-cells = <1>; -+ qcom,ee = <0>; -+ status = "disabled"; -+ }; -+ -+ nand: qpic-nand@79b0000 { -+ compatible = "qcom,ebi2-nandc-bam", "qcom,msm-nand"; -+ reg = <0x79b0000 0x1000>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ clocks = <&gcc GCC_QPIC_CLK>, -+ <&gcc GCC_QPIC_AHB_CLK>; -+ clock-names = "core", "aon"; -+ -+ dmas = <&qpic_bam 0>, -+ <&qpic_bam 1>, -+ <&qpic_bam 2>; -+ dma-names = "tx", "rx", "cmd"; -+ status = "disabled"; -+ -+ nandcs@0 { -+ compatible = "qcom,nandcs"; -+ reg = <0>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ nand-ecc-strength = <4>; -+ nand-ecc-step-size = <512>; -+ nand-bus-width = <8>; -+ }; -+ }; - }; - }; diff --git a/target/linux/ipq40xx/patches-4.9/864-00-v3-1-2-dts-ipq4019-Fix-pinctrl-node-name.patch b/target/linux/ipq40xx/patches-4.9/864-00-v3-1-2-dts-ipq4019-Fix-pinctrl-node-name.patch deleted file mode 100644 index dbd5537f8..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-00-v3-1-2-dts-ipq4019-Fix-pinctrl-node-name.patch +++ /dev/null @@ -1,44 +0,0 @@ -From patchwork Mon Jul 3 07:47:12 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v3,1/2] dts: ipq4019: Fix pinctrl node name -From: Varadarajan Narayanan -X-Patchwork-Id: 9822099 -Message-Id: <1499068033-24000-2-git-send-email-varada@codeaurora.org> -To: andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, - mark.rutland@arm.com, linux@armlinux.org.uk, - linux-arm-msm@vger.kernel.org, - linux-soc@vger.kernel.org, devicetree@vger.kernel.org, - linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org -Cc: Varadarajan Narayanan -Date: Mon, 3 Jul 2017 13:17:12 +0530 - -Signed-off-by: Varadarajan Narayanan ---- - arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 2 +- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -@@ -40,7 +40,7 @@ - clock-frequency = <48000000>; - }; - -- pinctrl@0x01000000 { -+ pinctrl@1000000 { - serial_pins: serial_pinmux { - mux { - pins = "gpio60", "gpio61"; ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -149,7 +149,7 @@ - reg = <0x1800000 0x60000>; - }; - -- tlmm: pinctrl@0x01000000 { -+ tlmm: pinctrl@1000000 { - compatible = "qcom,ipq4019-pinctrl"; - reg = <0x01000000 0x300000>; - gpio-controller; diff --git a/target/linux/ipq40xx/patches-4.9/864-00-v3-2-2-dts-ipq4019-Move-xo-and-timer-nodes-to-SoC-dtsi.patch b/target/linux/ipq40xx/patches-4.9/864-00-v3-2-2-dts-ipq4019-Move-xo-and-timer-nodes-to-SoC-dtsi.patch deleted file mode 100644 index 3e2c39611..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-00-v3-2-2-dts-ipq4019-Move-xo-and-timer-nodes-to-SoC-dtsi.patch +++ /dev/null @@ -1,78 +0,0 @@ -From patchwork Mon Jul 3 07:47:13 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v3,2/2] dts: ipq4019: Move xo and timer nodes to SoC dtsi -From: Varadarajan Narayanan -X-Patchwork-Id: 9822107 -Message-Id: <1499068033-24000-3-git-send-email-varada@codeaurora.org> -To: andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, - mark.rutland@arm.com, linux@armlinux.org.uk, - linux-arm-msm@vger.kernel.org, - linux-soc@vger.kernel.org, devicetree@vger.kernel.org, - linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org -Cc: Varadarajan Narayanan -Date: Mon, 3 Jul 2017 13:17:13 +0530 - -The node for xo and timer belong to the SoC DTS file. -Else, new board DT files may not inherit these nodes. - -Signed-off-by: Varadarajan Narayanan ---- - arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 19 ------------------- - arch/arm/boot/dts/qcom-ipq4019.dtsi | 15 +++++++++++++++ - 2 files changed, 15 insertions(+), 19 deletions(-) - ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -@@ -20,26 +20,7 @@ - model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1"; - compatible = "qcom,ipq4019"; - -- clocks { -- xo: xo { -- compatible = "fixed-clock"; -- clock-frequency = <48000000>; -- #clock-cells = <0>; -- }; -- }; -- - soc { -- -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = <1 2 0xf08>, -- <1 3 0xf08>, -- <1 4 0xf08>, -- <1 1 0xf08>; -- clock-frequency = <48000000>; -- }; -- - pinctrl@1000000 { - serial_pins: serial_pinmux { - mux { ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -126,6 +126,21 @@ - clock-frequency = <32768>; - #clock-cells = <0>; - }; -+ -+ xo: xo { -+ compatible = "fixed-clock"; -+ clock-frequency = <48000000>; -+ #clock-cells = <0>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = <1 2 0xf08>, -+ <1 3 0xf08>, -+ <1 4 0xf08>, -+ <1 1 0xf08>; -+ clock-frequency = <48000000>; - }; - - soc { diff --git a/target/linux/ipq40xx/patches-4.9/864-01-dts-ipq4019-ap-dk04-fix-pinctrl-node-name.patch b/target/linux/ipq40xx/patches-4.9/864-01-dts-ipq4019-ap-dk04-fix-pinctrl-node-name.patch deleted file mode 100644 index f2de6d618..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-01-dts-ipq4019-ap-dk04-fix-pinctrl-node-name.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi -@@ -38,7 +38,7 @@ - clock-frequency = <48000000>; - }; - -- pinctrl@0x01000000 { -+ pinctrl@1000000 { - serial_0_pins: serial_pinmux { - mux { - pins = "gpio16", "gpio17"; diff --git a/target/linux/ipq40xx/patches-4.9/864-02-dts-ipq4019-ap-dk04-remove-xo-and-timer-nodes.patch b/target/linux/ipq40xx/patches-4.9/864-02-dts-ipq4019-ap-dk04-remove-xo-and-timer-nodes.patch deleted file mode 100644 index dcbdb8d77..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-02-dts-ipq4019-ap-dk04-remove-xo-and-timer-nodes.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi -@@ -20,24 +20,7 @@ - model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1"; - compatible = "qcom,ipq4019"; - -- clocks { -- xo: xo { -- compatible = "fixed-clock"; -- clock-frequency = <48000000>; -- #clock-cells = <0>; -- }; -- }; -- - soc { -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = <1 2 0xf08>, -- <1 3 0xf08>, -- <1 4 0xf08>, -- <1 1 0xf08>; -- clock-frequency = <48000000>; -- }; -- - pinctrl@1000000 { - serial_0_pins: serial_pinmux { - mux { diff --git a/target/linux/ipq40xx/patches-4.9/864-03-dts-ipq4019-ap-dk01-add-tcsr-config-to-dtsi.patch b/target/linux/ipq40xx/patches-4.9/864-03-dts-ipq4019-ap-dk01-add-tcsr-config-to-dtsi.patch deleted file mode 100644 index 9d11dc022..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-03-dts-ipq4019-ap-dk01-add-tcsr-config-to-dtsi.patch +++ /dev/null @@ -1,42 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -@@ -15,12 +15,39 @@ - */ - - #include "qcom-ipq4019.dtsi" -+#include - - / { - model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1"; - compatible = "qcom,ipq4019"; - - soc { -+ tcsr@194b000 { -+ /* select hostmode */ -+ compatible = "qcom,tcsr"; -+ reg = <0x194b000 0x100>; -+ qcom,usb-hsphy-mode-select = ; -+ status = "ok"; -+ }; -+ -+ ess_tcsr@1953000 { -+ compatible = "qcom,tcsr"; -+ reg = <0x1953000 0x1000>; -+ qcom,ess-interface-select = ; -+ }; -+ -+ tcsr@1949000 { -+ compatible = "qcom,tcsr"; -+ reg = <0x1949000 0x100>; -+ qcom,wifi_glb_cfg = ; -+ }; -+ -+ tcsr@1957000 { -+ compatible = "qcom,tcsr"; -+ reg = <0x1957000 0x100>; -+ qcom,wifi_noc_memtype_m0_m2 = ; -+ }; -+ - pinctrl@1000000 { - serial_pins: serial_pinmux { - mux { diff --git a/target/linux/ipq40xx/patches-4.9/864-04-dts-ipq4019-ap-dk01-add-network-nodes-to-dtsi.patch b/target/linux/ipq40xx/patches-4.9/864-04-dts-ipq4019-ap-dk01-add-network-nodes-to-dtsi.patch deleted file mode 100644 index 02a102e37..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-04-dts-ipq4019-ap-dk01-add-network-nodes-to-dtsi.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -@@ -136,5 +136,29 @@ - usb2: usb2@60f8800 { - status = "ok"; - }; -+ -+ mdio@90000 { -+ status = "okay"; -+ }; -+ -+ ess-switch@c000000 { -+ status = "okay"; -+ }; -+ -+ ess-psgmii@98000 { -+ status = "okay"; -+ }; -+ -+ edma@c080000 { -+ status = "okay"; -+ }; -+ -+ wifi@a000000 { -+ status = "okay"; -+ }; -+ -+ wifi@a800000 { -+ status = "okay"; -+ }; - }; - }; diff --git a/target/linux/ipq40xx/patches-4.9/864-05-dts-ipq4019-ap-dk01-remove-spi-chip-node-from-dtsi.patch b/target/linux/ipq40xx/patches-4.9/864-05-dts-ipq4019-ap-dk01-remove-spi-chip-node-from-dtsi.patch deleted file mode 100644 index 0d4b80b30..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-05-dts-ipq4019-ap-dk01-remove-spi-chip-node-from-dtsi.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi -@@ -89,14 +89,6 @@ - pinctrl-names = "default"; - status = "ok"; - cs-gpios = <&tlmm 54 0>; -- -- mx25l25635e@0 { -- #address-cells = <1>; -- #size-cells = <1>; -- reg = <0>; -- compatible = "mx25l25635e"; -- spi-max-frequency = <24000000>; -- }; - }; - - serial@78af000 { diff --git a/target/linux/ipq40xx/patches-4.9/864-06-dts-ipq4019-fix-max-cpu-speed.patch b/target/linux/ipq40xx/patches-4.9/864-06-dts-ipq4019-fix-max-cpu-speed.patch deleted file mode 100644 index 33f7f04f3..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-06-dts-ipq4019-fix-max-cpu-speed.patch +++ /dev/null @@ -1,13 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi -@@ -108,8 +108,8 @@ - opp-hz = /bits/ 64 <500000000>; - clock-latency-ns = <256000>; - }; -- opp@666000000 { -- opp-hz = /bits/ 64 <666000000>; -+ opp@716800000 { -+ opp-hz = /bits/ 64 <716800000>; - clock-latency-ns = <256000>; - }; - }; diff --git a/target/linux/ipq40xx/patches-4.9/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch b/target/linux/ipq40xx/patches-4.9/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch deleted file mode 100644 index e9d262069..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch +++ /dev/null @@ -1,115 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts -@@ -19,4 +19,112 @@ - / { - model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1"; - -+ memory { -+ device_type = "memory"; -+ reg = <0x80000000 0x10000000>; -+ }; -+ -+ reserved-memory { -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ ranges; -+ -+ apps_bl@87000000 { -+ reg = <0x87000000 0x400000>; -+ no-map; -+ }; -+ -+ sbl@87400000 { -+ reg = <0x87400000 0x100000>; -+ no-map; -+ }; -+ -+ cnss_debug@87500000 { -+ reg = <0x87500000 0x600000>; -+ no-map; -+ }; -+ -+ cpu_context_dump@87b00000 { -+ reg = <0x87b00000 0x080000>; -+ no-map; -+ }; -+ -+ tz_apps@87b80000 { -+ reg = <0x87b80000 0x280000>; -+ no-map; -+ }; -+ -+ smem@87e00000 { -+ reg = <0x87e00000 0x080000>; -+ no-map; -+ }; -+ -+ tz@87e80000 { -+ reg = <0x87e80000 0x180000>; -+ no-map; -+ }; -+ }; -+}; -+ -+&spi_0 { -+ mx25l25635f@0 { -+ compatible = "mx25l25635f", "jedec,spi-nor"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ reg = <0>; -+ spi-max-frequency = <24000000>; -+ -+ SBL1@0 { -+ label = "SBL1"; -+ reg = <0x0 0x40000>; -+ read-only; -+ }; -+ MIBIB@40000 { -+ label = "MIBIB"; -+ reg = <0x40000 0x20000>; -+ read-only; -+ }; -+ QSEE@60000 { -+ label = "QSEE"; -+ reg = <0x60000 0x60000>; -+ read-only; -+ }; -+ CDT@c0000 { -+ label = "CDT"; -+ reg = <0xc0000 0x10000>; -+ read-only; -+ }; -+ DDRPARAMS@d0000 { -+ label = "DDRPARAMS"; -+ reg = <0xd0000 0x10000>; -+ read-only; -+ }; -+ APPSBLENV@e0000 { -+ label = "APPSBLENV"; -+ reg = <0xe0000 0x10000>; -+ read-only; -+ }; -+ APPSBL@f0000 { -+ label = "APPSBL"; -+ reg = <0xf0000 0x80000>; -+ read-only; -+ }; -+ ART@170000 { -+ label = "ART"; -+ reg = <0x170000 0x10000>; -+ read-only; -+ }; -+ kernel@180000 { -+ label = "kernel"; -+ reg = <0x180000 0x400000>; -+ }; -+ rootfs@580000 { -+ label = "rootfs"; -+ reg = <0x580000 0x1600000>; -+ }; -+ firmware@180000 { -+ label = "firmware"; -+ reg = <0x180000 0x1a00000>; -+ }; -+ }; - }; diff --git a/target/linux/ipq40xx/patches-4.9/864-08-dts-ipq4019-ap-dk01.1-c1-add-compatible-string.patch b/target/linux/ipq40xx/patches-4.9/864-08-dts-ipq4019-ap-dk01.1-c1-add-compatible-string.patch deleted file mode 100644 index 2d4ff3104..000000000 --- a/target/linux/ipq40xx/patches-4.9/864-08-dts-ipq4019-ap-dk01.1-c1-add-compatible-string.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts -+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts -@@ -18,6 +18,7 @@ - - / { - model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1"; -+ compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1", "qcom,ipq4019"; - - memory { - device_type = "memory"; diff --git a/target/linux/ipq40xx/patches-4.9/900-mach-qcom-add-msm_pcie-driver.patch b/target/linux/ipq40xx/patches-4.9/900-mach-qcom-add-msm_pcie-driver.patch deleted file mode 100644 index be3a1af15..000000000 --- a/target/linux/ipq40xx/patches-4.9/900-mach-qcom-add-msm_pcie-driver.patch +++ /dev/null @@ -1,4883 +0,0 @@ -From a0473413c8a10ea1884f2532b89e029b70e389d0 Mon Sep 17 00:00:00 2001 -From: Chen Minqiang -Date: Sat, 6 Jan 2018 13:59:06 +0800 -Subject: [PATCH 3/3] mach-qcom: add msm_pcie driver - ---- - Documentation/devicetree/bindings/pci/msm_pcie.txt | 164 ++ - arch/arm/mach-qcom/Kconfig | 8 + - arch/arm/mach-qcom/Makefile | 3 + - arch/arm/mach-qcom/include/mach/gpiomux.h | 216 ++ - arch/arm/mach-qcom/include/mach/msm_pcie.h | 134 ++ - arch/arm/mach-qcom/pcie.c | 2389 ++++++++++++++++++++ - arch/arm/mach-qcom/pcie.h | 329 +++ - arch/arm/mach-qcom/pcie_irq.c | 598 +++++ - arch/arm/mach-qcom/pcie_phy.c | 403 ++++ - arch/arm/mach-qcom/pcie_phy.h | 545 +++++ - 10 files changed, 4789 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/msm_pcie.txt - create mode 100644 arch/arm/mach-qcom/include/mach/gpiomux.h - create mode 100644 arch/arm/mach-qcom/include/mach/msm_pcie.h - create mode 100644 arch/arm/mach-qcom/pcie.c - create mode 100644 arch/arm/mach-qcom/pcie.h - create mode 100644 arch/arm/mach-qcom/pcie_irq.c - create mode 100644 arch/arm/mach-qcom/pcie_phy.c - create mode 100644 arch/arm/mach-qcom/pcie_phy.h - -diff --git a/Documentation/devicetree/bindings/pci/msm_pcie.txt b/Documentation/devicetree/bindings/pci/msm_pcie.txt -new file mode 100644 -index 0000000..24a2be7 ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/msm_pcie.txt -@@ -0,0 +1,164 @@ -+MSM PCIe -+ -+MSM PCI express root complex -+ -+Required properties: -+ - compatible: should be "qcom,pci-msm" -+ - cell-index: defines root complex ID. -+ - #address-cells: Should provide a value of 0. -+ - reg: should contain PCIe register maps. -+ - reg-names: indicates various resources passed to driver by name. -+ Should be "parf", "phy", "dm_core", "elbi", "conf", "io", "bars". -+ These correspond to different modules within the PCIe core. -+ - interrupts: Should be in the format <0 1 2> and it is an index to the -+ interrupt-map that contains PCIe related interrupts. -+ - #interrupt-cells: Should provide a value of 1. -+ - #interrupt-map-mask: should provide a value of 0xffffffff. -+ - interrupt-map: Must create mapping for the number of interrupts -+ that are defined in above interrupts property. -+ For PCIe device node, it should define 12 mappings for -+ the corresponding PCIe interrupts supporting the specification. -+ - interrupt-names: indicates interrupts passed to driver by name. -+ Should be "int_msi", "int_a", "int_b", "int_c", "int_d", -+ "int_pls_pme", "int_pme_legacy", "int_pls_err", -+ "int_aer_legacy", "int_pls_link_up", -+ "int_pls_link_down", "int_bridge_flush_n" -+ These correspond to the standard PCIe specification to support -+ MSIs, virtual IRQ's (INT#), link state notifications. -+ - perst-gpio: PERST GPIO specified by PCIe spec. -+ - wake-gpio: WAKE GPIO specified by PCIe spec. -+ - -supply: phandle to the regulator device tree node. -+ Refer to the schematics for the corresponding voltage regulators. -+ vreg-1.8-supply: phandle to the analog supply for the PCIe controller. -+ vreg-3.3-supply: phandle to the analog supply for the PCIe controller. -+ vreg-0.9-supply: phandle to the analog supply for the PCIe controller. -+ -+Optional Properties: -+ - qcom,-voltage-level: specifies voltage levels for supply. -+ Should be specified in pairs (max, min, optimal), units uV. -+ - clkreq-gpio: CLKREQ GPIO specified by PCIe spec. -+ - pinctrl-names: The state name of the pin configuration. Only -+ support: "default" -+ - pinctrl-0: For details of pinctrl properties, please refer to: -+ "Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt" -+ - clocks: list of clock phandles -+ - clock-names: list of names of clock inputs. -+ Should be "pcie_0_pipe_clk", "pcie_0_ref_clk_src", -+ "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", -+ "pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk", -+ "pcie_0_ldo"; -+ - max-clock-frequency-hz: list of the maximum operating frequencies stored -+ in the same order of clock names; -+ - qcom,l0s-supported: L0s is supported. -+ - qcom,l1-supported: L1 is supported. -+ - qcom,l1ss-supported: L1 sub-states (L1ss) is supported. -+ - qcom,aux-clk-sync: The AUX clock is synchronous to the Core clock to -+ support L1ss. -+ - qcom,n-fts: The number of fast training sequences sent when the link state -+ is changed from L0s to L0. -+ - qcom,ep-wakeirq: The endpoint will issue wake signal when it is up, and the -+ root complex has the capability to enumerate the endpoint for this case. -+ - qcom,msi-gicm-addr: MSI address for GICv2m. -+ - qcom,msi-gicm-base: MSI IRQ base for GICv2m. -+ - qcom,ext-ref-clk: The reference clock is external. -+ - qcom,ep-latency: The time (unit: ms) to wait for the PCIe endpoint to become -+ stable after power on, before de-assert the PERST to the endpoint. -+ - qcom,tlp-rd-size: The max TLP read size (Calculation: 128 times 2 to the -+ tlp-rd-size power). -+ - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for -+ below optional properties: -+ - qcom,msm-bus,name -+ - qcom,msm-bus,num-cases -+ - qcom,msm-bus,num-paths -+ - qcom,msm-bus,vectors-KBps -+ - qcom,scm-dev-id: If present then device id value is passed to secure channel -+ manager(scm) driver. scm driver uses this device id to restore PCIe -+ controller related security configuration after coming out of the controller -+ power collapse. -+ -+Example: -+ -+ pcie0: qcom,pcie@fc520000 { -+ compatible = "qcom,msm_pcie"; -+ cell-index = <0>; -+ #address-cells = <0>; -+ reg = <0xfc520000 0x2000>, -+ <0xfc526000 0x1000>, -+ <0xff000000 0x1000>, -+ <0xff001000 0x1000>, -+ <0xff100000 0x1000>, -+ <0xff200000 0x100000>, -+ <0xff300000 0xd00000>; -+ reg-names = "parf", "dm_core", "elbi", -+ "conf", "io", "bars"; -+ interrupt-parent = <&pcie0>; -+ interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12>; -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0xffffffff>; -+ interrupt-map = <0 &intc 0 243 0 -+ 1 &intc 0 244 0 -+ 2 &intc 0 245 0 -+ 3 &intc 0 247 0 -+ 4 &intc 0 248 0 -+ 5 &intc 0 249 0 -+ 6 &intc 0 250 0 -+ 7 &intc 0 251 0 -+ 8 &intc 0 252 0 -+ 9 &intc 0 253 0 -+ 10 &intc 0 254 0 -+ 11 &intc 0 255 0>; -+ interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d", -+ "int_pls_pme", "int_pme_legacy", "int_pls_err", -+ "int_aer_legacy", "int_pls_link_up", -+ "int_pls_link_down", "int_bridge_flush_n"; -+ perst-gpio = <&msmgpio 70 0>; -+ wake-gpio = <&msmgpio 69 0>; -+ clkreq-gpio = <&msmgpio 68 0>; -+ -+ gdsc-vdd-supply = <&gdsc_pcie_0>; -+ vreg-1.8-supply = <&pma8084_l12>; -+ vreg-0.9-supply = <&pma8084_l4>; -+ vreg-3.3-supply = <&wlan_vreg>; -+ -+ qcom,vreg-1.8-voltage-level = <1800000 1800000 1000>; -+ qcom,vreg-0.9-voltage-level = <950000 950000 24000>; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pcie0_clkreq_default &pcie0_perst_default &pcie0_wake_default>; -+ -+ clocks = <&clock_gcc clk_gcc_pcie_0_pipe_clk>, -+ <&clock_rpm clk_ln_bb_clk>, -+ <&clock_gcc clk_gcc_pcie_0_aux_clk>, -+ <&clock_gcc clk_gcc_pcie_0_cfg_ahb_clk>, -+ <&clock_gcc clk_gcc_pcie_0_mstr_axi_clk>, -+ <&clock_gcc clk_gcc_pcie_0_slv_axi_clk>, -+ <&clock_gcc clk_pcie_0_phy_ldo>, -+ <&clock_gcc clk_gcc_pcie_phy_0_reset>; -+ -+ clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", -+ "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", -+ "pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk", -+ "pcie_0_ldo"; -+ max-clock-frequency-hz = <125000000>, <0>, <1000000>, -+ <0>, <0>, <0>, <0>; -+ qcom,l0s-supported; -+ qcom,l1-supported; -+ qcom,l1ss-supported; -+ qcom,aux-clk-sync; -+ qcom,n-fts = <0x50>; -+ qcom,ep-wakeirq; -+ qcom,msi-gicm-addr = <0xf9040040>; -+ qcom,msi-gicm-base = <0x160>; -+ qcom,ext-ref-clk; -+ qcom,tlp-rd-size = <0x5>; -+ qcom,ep-latency = <100>; -+ -+ qcom,msm-bus,name = "pcie0"; -+ qcom,msm-bus,num-cases = <2>; -+ qcom,msm-bus,num-paths = <1>; -+ qcom,msm-bus,vectors-KBps = -+ <45 512 0 0>, -+ <45 512 500 800>; -+ -+ qcom,scm-dev-id = <11>; -+ }; -diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig -index b438cd0..38b4009 100644 ---- a/arch/arm/mach-qcom/Kconfig -+++ b/arch/arm/mach-qcom/Kconfig -@@ -10,6 +10,14 @@ menuconfig ARCH_QCOM - help - Support for Qualcomm's devicetree based systems. - -+config MSM_PCIE -+ bool "MSM PCIe Controller driver" -+ depends on PCI && PCI_MSI -+ select PCI_DOMAINS -+ help -+ Enables the PCIe functionality by configures PCIe core on -+ MSM chipset and by enabling the ARM PCI framework extension. -+ - if ARCH_QCOM - - config ARCH_MSM8X60 -diff --git a/arch/arm/mach-qcom/Makefile b/arch/arm/mach-qcom/Makefile -index 12878e9..542691b 100644 ---- a/arch/arm/mach-qcom/Makefile -+++ b/arch/arm/mach-qcom/Makefile -@@ -1 +1,4 @@ -+EXTRA_CFLAGS += -I$(srctree)/arch/arm/mach-qcom/include -+EXTRA_CFLAGS += -I$(srctree)/drivers/bus/msm_bus - obj-$(CONFIG_SMP) += platsmp.o -+obj-$(CONFIG_MSM_PCIE) += pcie.o pcie_irq.o pcie_phy.o -diff --git a/arch/arm/mach-qcom/include/mach/gpiomux.h b/arch/arm/mach-qcom/include/mach/gpiomux.h -new file mode 100644 -index 0000000..2278677 ---- /dev/null -+++ b/arch/arm/mach-qcom/include/mach/gpiomux.h -@@ -0,0 +1,216 @@ -+/* Copyright (c) 2010-2011,2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#ifndef __ARCH_ARM_MACH_MSM_GPIOMUX_H -+#define __ARCH_ARM_MACH_MSM_GPIOMUX_H -+ -+#include -+#include -+ -+enum msm_gpiomux_setting { -+ GPIOMUX_ACTIVE = 0, -+ GPIOMUX_SUSPENDED, -+ GPIOMUX_NSETTINGS -+}; -+ -+enum gpiomux_drv { -+ GPIOMUX_DRV_2MA = 0, -+ GPIOMUX_DRV_4MA, -+ GPIOMUX_DRV_6MA, -+ GPIOMUX_DRV_8MA, -+ GPIOMUX_DRV_10MA, -+ GPIOMUX_DRV_12MA, -+ GPIOMUX_DRV_14MA, -+ GPIOMUX_DRV_16MA, -+}; -+ -+enum gpiomux_func { -+ GPIOMUX_FUNC_GPIO = 0, -+ GPIOMUX_FUNC_1, -+ GPIOMUX_FUNC_2, -+ GPIOMUX_FUNC_3, -+ GPIOMUX_FUNC_4, -+ GPIOMUX_FUNC_5, -+ GPIOMUX_FUNC_6, -+ GPIOMUX_FUNC_7, -+ GPIOMUX_FUNC_8, -+ GPIOMUX_FUNC_9, -+ GPIOMUX_FUNC_A, -+ GPIOMUX_FUNC_B, -+ GPIOMUX_FUNC_C, -+ GPIOMUX_FUNC_D, -+ GPIOMUX_FUNC_E, -+ GPIOMUX_FUNC_F, -+}; -+ -+enum gpiomux_pull { -+ GPIOMUX_PULL_NONE = 0, -+ GPIOMUX_PULL_DOWN, -+ GPIOMUX_PULL_KEEPER, -+ GPIOMUX_PULL_UP, -+}; -+ -+/* Direction settings are only meaningful when GPIOMUX_FUNC_GPIO is selected. -+ * This element is ignored for all other FUNC selections, as the output- -+ * enable pin is not under software control in those cases. See the SWI -+ * for your target for more details. -+ */ -+enum gpiomux_dir { -+ GPIOMUX_IN = 0, -+ GPIOMUX_OUT_HIGH, -+ GPIOMUX_OUT_LOW, -+}; -+ -+struct gpiomux_setting { -+ enum gpiomux_func func; -+ enum gpiomux_drv drv; -+ enum gpiomux_pull pull; -+ enum gpiomux_dir dir; -+}; -+ -+/** -+ * struct msm_gpiomux_config: gpiomux settings for one gpio line. -+ * -+ * A complete gpiomux config is the combination of a drive-strength, -+ * function, pull, and (sometimes) direction. For functions other than GPIO, -+ * the input/output setting is hard-wired according to the function. -+ * -+ * @gpio: The index number of the gpio being described. -+ * @settings: The settings to be installed, specifically: -+ * GPIOMUX_ACTIVE: The setting to be installed when the -+ * line is active, or its reference count is > 0. -+ * GPIOMUX_SUSPENDED: The setting to be installed when -+ * the line is suspended, or its reference count is 0. -+ */ -+struct msm_gpiomux_config { -+ unsigned gpio; -+ struct gpiomux_setting *settings[GPIOMUX_NSETTINGS]; -+}; -+ -+/** -+ * struct msm_gpiomux_configs: a collection of gpiomux configs. -+ * -+ * It is so common to manage blocks of gpiomux configs that the data structure -+ * for doing so has been standardized here as a convenience. -+ * -+ * @cfg: A pointer to the first config in an array of configs. -+ * @ncfg: The number of configs in the array. -+ */ -+struct msm_gpiomux_configs { -+ struct msm_gpiomux_config *cfg; -+ size_t ncfg; -+}; -+ -+/* Provide an enum and an API to write to misc TLMM registers */ -+enum msm_tlmm_misc_reg { -+ TLMM_ETM_MODE_REG = 0x2014, -+ TLMM_SDC2_HDRV_PULL_CTL = 0x2048, -+ TLMM_SPARE_REG = 0x2024, -+ TLMM_CDC_HDRV_CTL = 0x2054, -+ TLMM_CDC_HDRV_PULL_CTL = 0x2058, -+}; -+ -+#ifdef CONFIG_MSM_GPIOMUX -+ -+/* Before using gpiomux, initialize the subsystem by telling it how many -+ * gpios are going to be managed. Calling any other gpiomux functions before -+ * msm_gpiomux_init is unsupported. -+ */ -+int msm_gpiomux_init(size_t ngpio); -+ -+/* DT Variant of msm_gpiomux_init. This will look up the number of gpios from -+ * device tree rather than relying on NR_GPIO_IRQS -+ */ -+int msm_gpiomux_init_dt(void); -+ -+/* Install a block of gpiomux configurations in gpiomux. This is functionally -+ * identical to calling msm_gpiomux_write many times. -+ */ -+void msm_gpiomux_install(struct msm_gpiomux_config *configs, unsigned nconfigs); -+ -+/* Install a block of gpiomux configurations in gpiomux. Do not however write -+ * to hardware. Just store the settings to be retrieved at a later time -+ */ -+void msm_gpiomux_install_nowrite(struct msm_gpiomux_config *configs, -+ unsigned nconfigs); -+ -+/* Increment a gpio's reference count, possibly activating the line. */ -+int __must_check msm_gpiomux_get(unsigned gpio); -+ -+/* Decrement a gpio's reference count, possibly suspending the line. */ -+int msm_gpiomux_put(unsigned gpio); -+ -+/* Install a new setting in a gpio. To erase a slot, use NULL. -+ * The old setting that was overwritten can be passed back to the caller -+ * old_setting can be NULL if the caller is not interested in the previous -+ * setting -+ * If a previous setting was not available to return (NULL configuration) -+ * - the function returns 1 -+ * else function returns 0 -+ */ -+int msm_gpiomux_write(unsigned gpio, enum msm_gpiomux_setting which, -+ struct gpiomux_setting *setting, struct gpiomux_setting *old_setting); -+ -+/* Architecture-internal function for use by the framework only. -+ * This function can assume the following: -+ * - the gpio value has passed a bounds-check -+ * - the gpiomux spinlock has been obtained -+ * -+ * This function is not for public consumption. External users -+ * should use msm_gpiomux_write. -+ */ -+void __msm_gpiomux_write(unsigned gpio, struct gpiomux_setting val); -+ -+/* Functions that provide an API for drivers to read from and write to -+ * miscellaneous TLMM registers. -+ */ -+int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg); -+ -+void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, int val); -+ -+#else -+static inline int msm_gpiomux_init(size_t ngpio) -+{ -+ return -ENOSYS; -+} -+ -+static inline void -+msm_gpiomux_install(struct msm_gpiomux_config *configs, unsigned nconfigs) {} -+ -+static inline int __must_check msm_gpiomux_get(unsigned gpio) -+{ -+ return -ENOSYS; -+} -+ -+static inline int msm_gpiomux_put(unsigned gpio) -+{ -+ return -ENOSYS; -+} -+ -+static inline int msm_gpiomux_write(unsigned gpio, -+ enum msm_gpiomux_setting which, struct gpiomux_setting *setting, -+ struct gpiomux_setting *old_setting) -+{ -+ return -ENOSYS; -+} -+ -+static inline int msm_tlmm_misc_reg_read(enum msm_tlmm_misc_reg misc_reg) -+{ -+ return -ENOSYS; -+} -+ -+static inline void msm_tlmm_misc_reg_write(enum msm_tlmm_misc_reg misc_reg, -+ int val) -+{ -+} -+ -+#endif -+#endif -diff --git a/arch/arm/mach-qcom/include/mach/msm_pcie.h b/arch/arm/mach-qcom/include/mach/msm_pcie.h -new file mode 100644 -index 0000000..c2fbdea ---- /dev/null -+++ b/arch/arm/mach-qcom/include/mach/msm_pcie.h -@@ -0,0 +1,134 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __ASM_ARCH_MSM_PCIE_H -+#define __ASM_ARCH_MSM_PCIE_H -+ -+#include -+#include -+ -+enum msm_pcie_config { -+ MSM_PCIE_CONFIG_INVALID = 0, -+ MSM_PCIE_CONFIG_NO_CFG_RESTORE = 0x1, -+ MSM_PCIE_CONFIG_LINKDOWN = 0x2, -+ MSM_PCIE_CONFIG_NO_RECOVERY = 0x4, -+}; -+ -+enum msm_pcie_pm_opt { -+ MSM_PCIE_SUSPEND, -+ MSM_PCIE_RESUME, -+ MSM_PCIE_REQ_EXIT_L1, -+}; -+ -+enum msm_pcie_event { -+ MSM_PCIE_EVENT_INVALID = 0, -+ MSM_PCIE_EVENT_LINKDOWN = 0x1, -+ MSM_PCIE_EVENT_LINKUP = 0x2, -+ MSM_PCIE_EVENT_WAKEUP = 0x4, -+ MSM_PCIE_EVENT_WAKE_RECOVERY = 0x8, -+ MSM_PCIE_EVENT_NO_ACCESS = 0x10, -+}; -+ -+enum msm_pcie_trigger { -+ MSM_PCIE_TRIGGER_CALLBACK, -+ MSM_PCIE_TRIGGER_COMPLETION, -+}; -+ -+struct msm_pcie_notify { -+ enum msm_pcie_event event; -+ void *user; -+ void *data; -+ u32 options; -+}; -+ -+struct msm_pcie_register_event { -+ u32 events; -+ void *user; -+ enum msm_pcie_trigger mode; -+ void (*callback)(struct msm_pcie_notify *notify); -+ struct msm_pcie_notify notify; -+ struct completion *completion; -+ u32 options; -+}; -+ -+/** -+ * msm_pcie_pm_control - control the power state of a PCIe link. -+ * @pm_opt: power management operation -+ * @busnr: bus number of PCIe endpoint -+ * @user: handle of the caller -+ * @data: private data from the caller -+ * @options: options for pm control -+ * -+ * This function gives PCIe endpoint device drivers the control to change -+ * the power state of a PCIe link for their device. -+ * -+ * Return: 0 on success, negative value on error -+ */ -+int msm_pcie_pm_control(enum msm_pcie_pm_opt pm_opt, u32 busnr, void *user, -+ void *data, u32 options); -+ -+/** -+ * msm_pcie_register_event - register an event with PCIe bus driver. -+ * @reg: event structure -+ * -+ * This function gives PCIe endpoint device drivers an option to register -+ * events with PCIe bus driver. -+ * -+ * Return: 0 on success, negative value on error -+ */ -+int msm_pcie_register_event(struct msm_pcie_register_event *reg); -+ -+/** -+ * msm_pcie_deregister_event - deregister an event with PCIe bus driver. -+ * @reg: event structure -+ * -+ * This function gives PCIe endpoint device drivers an option to deregister -+ * events with PCIe bus driver. -+ * -+ * Return: 0 on success, negative value on error -+ */ -+int msm_pcie_deregister_event(struct msm_pcie_register_event *reg); -+ -+/** -+ * msm_pcie_recover_config - recover config space. -+ * @dev: pci device structure -+ * -+ * This function recovers the config space of both RC and Endpoint. -+ * -+ * Return: 0 on success, negative value on error -+ */ -+int msm_pcie_recover_config(struct pci_dev *dev); -+ -+/** -+ * msm_pcie_shadow_control - control the shadowing of PCIe config space. -+ * @dev: pci device structure -+ * @enable: shadowing should be enabled or disabled -+ * -+ * This function gives PCIe endpoint device drivers the control to enable -+ * or disable the shadowing of PCIe config space. -+ * -+ * Return: 0 on success, negative value on error -+ */ -+int msm_pcie_shadow_control(struct pci_dev *dev, bool enable); -+ -+/* -+ * msm_pcie_access_control - access control to PCIe address range. -+ * @dev: pci device structure -+ * @enable: enable or disable the access -+ * -+ * This function gives PCIe endpoint device drivers the control to enable -+ * or disable the access to PCIe address range. -+ * -+ * Return: 0 on success, negative value on error -+ */ -+int msm_pcie_access_control(struct pci_dev *dev, bool enable); -+#endif -diff --git a/arch/arm/mach-qcom/pcie.c b/arch/arm/mach-qcom/pcie.c -new file mode 100644 -index 0000000..b471479 ---- /dev/null -+++ b/arch/arm/mach-qcom/pcie.c -@@ -0,0 +1,2389 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+/* -+ * MSM PCIe controller driver. -+ */ -+ -+#define pr_fmt(fmt) "%s: " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+//#include -+#include -+#include -+#include -+#include "msm-bus.h" -+#include "msm-bus-board.h" -+ -+#include "pcie.h" -+ -+/* Root Complex Port vendor/device IDs */ -+#define PCIE_VENDOR_ID_RCP 0x17cb -+#ifdef CONFIG_ARCH_MDM9630 -+#define PCIE_DEVICE_ID_RCP 0x300 -+#else -+#define PCIE_DEVICE_ID_RCP 0x0101 -+#endif -+ -+#define PCIE20_PARF_SYS_CTRL 0x00 -+#define PCIE20_PARF_PM_CTRL 0x20 -+#define PCIE20_PARF_PM_STTS 0x24 -+#define PCIE20_PARF_PCS_DEEMPH 0x34 -+#define PCIE20_PARF_PCS_SWING 0x38 -+#define PCIE20_PARF_PHY_CTRL 0x40 -+#define PCIE20_PARF_PHY_REFCLK 0x4C -+#define PCIE20_PARF_CONFIG_BITS 0x50 -+#define PCIE20_PARF_DBI_BASE_ADDR 0x168 -+#define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT 0x178 -+#define PCIE20_PARF_Q2A_FLUSH 0x1AC -+#define PCIE20_PARF_LTSSM 0x1B0 -+ -+#define PCIE20_ELBI_VERSION 0x00 -+#define PCIE20_ELBI_SYS_CTRL 0x04 -+#define PCIE20_ELBI_SYS_STTS 0x08 -+ -+#define PCIE20_CAP 0x70 -+#define PCIE20_CAP_LINKCTRLSTATUS (PCIE20_CAP + 0x10) -+#define PCIE20_CAP_LINK_CAPABILITIES (PCIE20_CAP + 0xC) -+#define PCIE20_CAP_LINK_1 (PCIE20_CAP + 0x14) -+ -+#define PCIE20_COMMAND_STATUS 0x04 -+#define PCIE20_BUSNUMBERS 0x18 -+#define PCIE20_MEMORY_BASE_LIMIT 0x20 -+#define PCIE20_L1SUB_CONTROL1 0x158 -+#define PCIE20_EP_L1SUB_CTL1_OFFSET 0x30 -+#define PCIE20_DEVICE_CONTROL2_STATUS2 0x98 -+ -+#define PCIE20_ACK_F_ASPM_CTRL_REG 0x70C -+#define PCIE20_ACK_N_FTS 0xff00 -+#define PCIE20_GEN2_CTRL_REG 0x80C -+#define PCIE20_MISC_CONTROL_1_REG 0x8BC -+ -+#define PCIE20_PLR_IATU_VIEWPORT 0x900 -+#define PCIE20_PLR_IATU_CTRL1 0x904 -+#define PCIE20_PLR_IATU_CTRL2 0x908 -+#define PCIE20_PLR_IATU_LBAR 0x90C -+#define PCIE20_PLR_IATU_UBAR 0x910 -+#define PCIE20_PLR_IATU_LAR 0x914 -+#define PCIE20_PLR_IATU_LTAR 0x918 -+#define PCIE20_PLR_IATU_UTAR 0x91c -+ -+#define RD 0 -+#define WR 1 -+ -+/* Timing Delays */ -+#define PERST_PROPAGATION_DELAY_US_MIN 1000 -+#define PERST_PROPAGATION_DELAY_US_MAX 1005 -+#define REFCLK_STABILIZATION_DELAY_US_MIN 1000 -+#define REFCLK_STABILIZATION_DELAY_US_MAX 1500 -+#define LINK_RETRY_TIMEOUT_US_MIN 20000 -+#define LINK_RETRY_TIMEOUT_US_MAX 25000 -+#define LINK_UP_TIMEOUT_US_MIN 5000 -+#define LINK_UP_TIMEOUT_US_MAX 5100 -+#define LINK_UP_CHECK_MAX_COUNT 20 -+#define PHY_STABILIZATION_DELAY_US_MIN 995 -+#define PHY_STABILIZATION_DELAY_US_MAX 1005 -+#define REQ_EXIT_L1_DELAY_US 1 -+ -+#define PHY_READY_TIMEOUT_COUNT 10 -+#define XMLH_LINK_UP 0x400 -+#define MAX_LINK_RETRIES 5 -+#define MAX_BUS_NUM 3 -+#define MAX_PROP_SIZE 32 -+#define MAX_RC_NAME_LEN 15 -+ -+#define CMD_BME_VAL 0x4 -+#define DBI_RO_WR_EN 1 -+#define PCIE_CAP_CPL_TIMEOUT_DISABLE 0x10 -+#define LTSSM_EN (1 << 8) -+#define PCIE_CAP_ACTIVE_STATE_LINK_PM_SUPPORT_MASK 0xc00 -+#define PCIE_CAP_LINK1_VAL 0x2fd7f -+ -+/* Config Space Offsets */ -+#define BDF_OFFSET(bus, device, function) \ -+ ((bus << 24) | (device << 15) | (function << 8)) -+ -+/* debug mask sys interface */ -+static int msm_pcie_debug_mask; -+module_param_named(debug_mask, msm_pcie_debug_mask, -+ int, S_IRUGO | S_IWUSR | S_IWGRP); -+static atomic_t rc_removed; -+ -+/** -+ * PCIe driver state -+ */ -+struct pcie_drv_sta { -+ u32 rc_num; -+ u32 rc_expected; -+ u32 current_rc; -+ bool vreg_on; -+ struct mutex drv_lock; -+} pcie_drv; -+ -+/* msm pcie device data */ -+static struct msm_pcie_dev_t msm_pcie_dev[MAX_RC_NUM]; -+ -+/* regulators */ -+static struct msm_pcie_vreg_info_t msm_pcie_vreg_info[MSM_PCIE_MAX_VREG] = { -+ {NULL, "vreg-3.3", 0, 0, 0, false}, -+ {NULL, "vreg-1.8", 1800000, 1800000, 1000, true}, -+ {NULL, "vreg-0.9", 1000000, 1000000, 24000, true} -+}; -+ -+/* GPIOs */ -+static struct msm_pcie_gpio_info_t msm_pcie_gpio_info[MSM_PCIE_MAX_GPIO] = { -+ {"perst-gpio", 0, 1, 0, 0}, -+ {"wake-gpio", 0, 0, 0, 0}, -+ {"clkreq-gpio", 0, 0, 0, 0} -+}; -+ -+/* clocks */ -+static struct msm_pcie_clk_info_t -+ msm_pcie_clk_info[MAX_RC_NUM][MSM_PCIE_MAX_CLK] = { -+ { -+ {NULL, "pcie_0_cfg_ahb_clk", 0, true}, -+ {NULL, "pcie_0_mstr_axi_clk", 0, true}, -+ {NULL, "pcie_0_slv_axi_clk", 0, true}, -+ }, -+}; -+ -+/* RESETs */ -+static struct msm_pcie_rst_info_t msm_pcie_rst_info[MSM_PCIE_MAX_RESET] = { -+ {NULL, "pcie_rst_axi_m_ares"}, -+ {NULL, "pcie_rst_axi_s_ares"}, -+ {NULL, "pcie_rst_pipe_ares"}, -+ {NULL, "pcie_rst_axi_m_vmidmt_ares"}, -+ {NULL, "pcie_rst_axi_s_xpu_ares"}, -+ {NULL, "pcie_rst_parf_xpu_ares"}, -+ {NULL, "pcie_rst_phy_ares"}, -+ {NULL, "pcie_rst_axi_m_sticky_ares"}, -+ {NULL, "pcie_rst_pipe_sticky_ares"}, -+ {NULL, "pcie_rst_pwr_ares"}, -+ {NULL, "pcie_rst_ahb_res"}, -+ {NULL, "pcie_rst_phy_ahb_ares"} -+}; -+ -+/* resources */ -+static const struct msm_pcie_res_info_t msm_pcie_res_info[MSM_PCIE_MAX_RES] = { -+ {"parf", 0, 0}, -+ {"phy", 0, 0}, -+ {"dm_core", 0, 0}, -+ {"elbi", 0, 0}, -+ {"conf", 0, 0}, -+ {"io", 0, 0}, -+ {"bars", 0, 0} -+}; -+ -+/* irqs */ -+static const struct msm_pcie_irq_info_t msm_pcie_irq_info[MSM_PCIE_MAX_IRQ] = { -+ {"int_msi", 0}, -+ {"int_a", 0}, -+ {"int_b", 0}, -+ {"int_c", 0}, -+ {"int_d", 0}, -+ {"int_pls_pme", 0}, -+ {"int_pme_legacy", 0}, -+ {"int_pls_err", 0}, -+ {"int_aer_legacy", 0}, -+ {"int_pls_link_up", 0}, -+ {"int_pls_link_down", 0}, -+ {"int_bridge_flush_n", 0}, -+ {"int_wake", 0} -+}; -+ -+int msm_pcie_get_debug_mask(void) -+{ -+ return msm_pcie_debug_mask; -+} -+ -+bool msm_pcie_confirm_linkup(struct msm_pcie_dev_t *dev, -+ bool check_sw_stts, -+ bool check_ep) -+{ -+ u32 val; -+ -+ if (check_sw_stts && (dev->link_status != MSM_PCIE_LINK_ENABLED)) { -+ PCIE_DBG(dev, "PCIe: The link of RC %d is not enabled.\n", -+ dev->rc_idx); -+ return false; -+ } -+ -+ if (!(readl_relaxed(dev->dm_core + 0x80) & BIT(29))) { -+ PCIE_DBG(dev, "PCIe: The link of RC %d is not up.\n", -+ dev->rc_idx); -+ return false; -+ } -+ -+ val = readl_relaxed(dev->dm_core); -+ PCIE_DBG(dev, "PCIe: device ID and vender ID of RC %d are 0x%x.\n", -+ dev->rc_idx, val); -+ if (val == PCIE_LINK_DOWN) { -+ PCIE_ERR(dev, -+ "PCIe: The link of RC %d is not really up; device ID and vender ID of RC %d are 0x%x.\n", -+ dev->rc_idx, dev->rc_idx, val); -+ return false; -+ } -+ -+ if (check_ep) { -+ val = readl_relaxed(dev->conf); -+ PCIE_DBG(dev, -+ "PCIe: device ID and vender ID of EP of RC %d are 0x%x.\n", -+ dev->rc_idx, val); -+ if (val == PCIE_LINK_DOWN) { -+ PCIE_ERR(dev, -+ "PCIe: The link of RC %d is not really up; device ID and vender ID of EP of RC %d are 0x%x.\n", -+ dev->rc_idx, dev->rc_idx, val); -+ return false; -+ } -+ } -+ -+ return true; -+} -+ -+void msm_pcie_cfg_recover(struct msm_pcie_dev_t *dev, bool rc) -+{ -+ int i; -+ u32 val = 0; -+ u32 *shadow; -+ void *cfg; -+ -+ if (rc) { -+ shadow = dev->rc_shadow; -+ cfg = dev->dm_core; -+ } else { -+ shadow = dev->ep_shadow; -+ cfg = dev->conf; -+ } -+ -+ for (i = PCIE_CONF_SPACE_DW - 1; i >= 0; i--) { -+ val = shadow[i]; -+ if (val != PCIE_CLEAR) { -+ PCIE_DBG3(dev, "PCIe: before recovery:cfg 0x%x:0x%x\n", -+ i * 4, readl_relaxed(cfg + i * 4)); -+ PCIE_DBG3(dev, "PCIe: shadow_dw[%d]:cfg 0x%x:0x%x\n", -+ i, i * 4, val); -+ writel_relaxed(val, cfg + i * 4); -+ wmb(); -+ PCIE_DBG3(dev, "PCIe: after recovery:cfg 0x%x:0x%x\n\n", -+ i * 4, readl_relaxed(cfg + i * 4)); -+ } -+ } -+ -+ readl_relaxed(dev->elbi); -+} -+ -+static void msm_pcie_write_mask(void __iomem *addr, -+ uint32_t clear_mask, uint32_t set_mask) -+{ -+ uint32_t val; -+ -+ val = (readl_relaxed(addr) & ~clear_mask) | set_mask; -+ writel_relaxed(val, addr); -+ wmb(); /* ensure data is written to hardware register */ -+} -+ -+static int msm_pcie_is_link_up(struct msm_pcie_dev_t *dev) -+{ -+ return readl_relaxed(dev->dm_core + -+ PCIE20_CAP_LINKCTRLSTATUS) & BIT(29); -+} -+ -+static inline int msm_pcie_oper_conf(struct pci_bus *bus, u32 devfn, int oper, -+ int where, int size, u32 *val) -+{ -+ uint32_t word_offset, byte_offset, mask; -+ uint32_t rd_val, wr_val; -+ struct msm_pcie_dev_t *dev; -+ void __iomem *config_base; -+ bool rc = false; -+ u32 rc_idx; -+ int rv = 0; -+ -+ dev = ((struct msm_pcie_dev_t *) -+ (((struct pci_sys_data *)bus->sysdata)->private_data)); -+ -+ if (!dev) { -+ pr_err("PCIe: No device found for this bus.\n"); -+ *val = ~0; -+ rv = PCIBIOS_DEVICE_NOT_FOUND; -+ goto out; -+ } -+ -+ /* Do the bus->number based access control since we don't support -+ ECAM mechanism */ -+ -+ switch (bus->number) { -+ case 0: -+ rc = true; -+ case 1: -+ rc_idx = dev->rc_idx; -+ break; -+ default: -+ PCIE_ERR(dev, "PCIe: unsupported bus number:%d\n", bus->number); -+ *val = ~0; -+ rv = PCIBIOS_DEVICE_NOT_FOUND; -+ goto out; -+ } -+ -+ if ((bus->number > MAX_BUS_NUM) || (devfn != 0)) { -+ PCIE_DBG3(dev, "RC%d invalid %s - bus %d devfn %d\n", rc_idx, -+ (oper == RD) ? "rd" : "wr", bus->number, devfn); -+ *val = ~0; -+ rv = PCIBIOS_DEVICE_NOT_FOUND; -+ goto out; -+ } -+ -+ spin_lock_irqsave(&dev->cfg_lock, dev->irqsave_flags); -+ -+ if (!dev->cfg_access) { -+ PCIE_DBG3(dev, -+ "Access denied for RC%d %d:0x%02x + 0x%04x[%d]\n", -+ rc_idx, bus->number, devfn, where, size); -+ *val = ~0; -+ rv = PCIBIOS_DEVICE_NOT_FOUND; -+ goto unlock; -+ } -+ -+ if (dev->link_status != MSM_PCIE_LINK_ENABLED) { -+ PCIE_DBG3(dev, -+ "Access to RC%d %d:0x%02x + 0x%04x[%d] is denied because link is down\n", -+ rc_idx, bus->number, devfn, where, size); -+ *val = ~0; -+ rv = PCIBIOS_DEVICE_NOT_FOUND; -+ goto unlock; -+ } -+ -+ /* check if the link is up for endpoint */ -+ if (!rc && !msm_pcie_is_link_up(dev)) { -+ PCIE_ERR(dev, -+ "PCIe: RC%d %s fail, link down - bus %d devfn %d\n", -+ rc_idx, (oper == RD) ? "rd" : "wr", -+ bus->number, devfn); -+ *val = ~0; -+ rv = PCIBIOS_DEVICE_NOT_FOUND; -+ goto unlock; -+ } -+ -+ word_offset = where & ~0x3; -+ byte_offset = where & 0x3; -+ mask = (~0 >> (8 * (4 - size))) << (8 * byte_offset); -+ -+ config_base = rc ? dev->dm_core : dev->conf; -+ rd_val = readl_relaxed(config_base + word_offset); -+ -+ if (oper == RD) { -+ *val = ((rd_val & mask) >> (8 * byte_offset)); -+ PCIE_DBG3(dev, -+ "RC%d %d:0x%02x + 0x%04x[%d] -> 0x%08x; rd 0x%08x\n", -+ rc_idx, bus->number, devfn, where, size, *val, rd_val); -+ } else { -+ wr_val = (rd_val & ~mask) | -+ ((*val << (8 * byte_offset)) & mask); -+ writel_relaxed(wr_val, config_base + word_offset); -+ wmb(); /* ensure config data is written to hardware register */ -+ readl_relaxed(dev->elbi); -+ -+ if (rd_val == PCIE_LINK_DOWN) { -+ PCIE_ERR(dev, -+ "Read of RC%d %d:0x%02x + 0x%04x[%d] is all FFs\n", -+ rc_idx, bus->number, devfn, where, size); -+ } else if (dev->shadow_en) { -+ if (rc) -+ dev->rc_shadow[word_offset / 4] = wr_val; -+ else -+ dev->ep_shadow[word_offset / 4] = wr_val; -+ } -+ -+ PCIE_DBG3(dev, -+ "RC%d %d:0x%02x + 0x%04x[%d] <- 0x%08x; rd 0x%08x val 0x%08x\n", -+ rc_idx, bus->number, devfn, where, size, -+ wr_val, rd_val, *val); -+ } -+ -+unlock: -+ spin_unlock_irqrestore(&dev->cfg_lock, dev->irqsave_flags); -+out: -+ return rv; -+} -+ -+static int msm_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, -+ int size, u32 *val) -+{ -+ int ret = msm_pcie_oper_conf(bus, devfn, RD, where, size, val); -+ -+ if ((bus->number == 0) && (where == PCI_CLASS_REVISION)) { -+ *val = (*val & 0xff) | (PCI_CLASS_BRIDGE_PCI << 16); -+ pr_debug("change class for RC:0x%x\n", *val); -+ } -+ -+ return ret; -+} -+ -+static int msm_pcie_wr_conf(struct pci_bus *bus, u32 devfn, -+ int where, int size, u32 val) -+{ -+ return msm_pcie_oper_conf(bus, devfn, WR, where, size, &val); -+} -+ -+static struct pci_ops msm_pcie_ops = { -+ .read = msm_pcie_rd_conf, -+ .write = msm_pcie_wr_conf, -+}; -+ -+static int msm_pcie_gpio_init(struct msm_pcie_dev_t *dev) -+{ -+ int rc = 0, i; -+ struct msm_pcie_gpio_info_t *info; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ for (i = 0; i < dev->gpio_n; i++) { -+ info = &dev->gpio[i]; -+ -+ if (!info->num) -+ continue; -+ -+ rc = gpio_request(info->num, info->name); -+ if (rc) { -+ PCIE_ERR(dev, "PCIe: RC%d can't get gpio %s; %d\n", -+ dev->rc_idx, info->name, rc); -+ break; -+ } -+ -+ if (info->out) -+ rc = gpio_direction_output(info->num, info->init); -+ else -+ rc = gpio_direction_input(info->num); -+ if (rc) { -+ PCIE_ERR(dev, -+ "PCIe: RC%d can't set direction for GPIO %s:%d\n", -+ dev->rc_idx, info->name, rc); -+ gpio_free(info->num); -+ break; -+ } -+ } -+ -+ if (rc) -+ while (i--) -+ gpio_free(dev->gpio[i].num); -+ -+ return rc; -+} -+ -+static void msm_pcie_gpio_deinit(struct msm_pcie_dev_t *dev) -+{ -+ int i; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ for (i = 0; i < dev->gpio_n; i++) -+ gpio_free(dev->gpio[i].num); -+} -+ -+int msm_pcie_vreg_init(struct msm_pcie_dev_t *dev) -+{ -+ int i, rc = 0; -+ struct regulator *vreg; -+ struct msm_pcie_vreg_info_t *info; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ for (i = 0; i < MSM_PCIE_MAX_VREG; i++) { -+ info = &dev->vreg[i]; -+ vreg = info->hdl; -+ -+ if (!vreg) -+ continue; -+ -+ PCIE_DBG2(dev, "RC%d Vreg %s is being enabled\n", -+ dev->rc_idx, info->name); -+ if (info->max_v) { -+ rc = regulator_set_voltage(vreg, -+ info->min_v, info->max_v); -+ if (rc) { -+ PCIE_ERR(dev, -+ "PCIe: RC%d can't set voltage for %s: %d\n", -+ dev->rc_idx, info->name, rc); -+ break; -+ } -+ } -+ -+ if (info->opt_mode) { -+ rc = regulator_set_mode(vreg, info->opt_mode); -+ if (rc < 0) { -+ PCIE_ERR(dev, -+ "PCIe: RC%d can't set mode for %s: %d\n", -+ dev->rc_idx, info->name, rc); -+ break; -+ } -+ } -+ -+ rc = regulator_enable(vreg); -+ if (rc) { -+ PCIE_ERR(dev, -+ "PCIe: RC%d can't enable regulator %s: %d\n", -+ dev->rc_idx, info->name, rc); -+ break; -+ } -+ } -+ -+ if (rc) -+ while (i--) { -+ struct regulator *hdl = dev->vreg[i].hdl; -+ if (hdl) -+ regulator_disable(hdl); -+ } -+ -+ return rc; -+} -+ -+static void msm_pcie_vreg_deinit(struct msm_pcie_dev_t *dev) -+{ -+ int i; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ for (i = MSM_PCIE_MAX_VREG - 1; i >= 0; i--) { -+ if (dev->vreg[i].hdl) { -+ PCIE_DBG(dev, "Vreg %s is being disabled\n", -+ dev->vreg[i].name); -+ regulator_disable(dev->vreg[i].hdl); -+ } -+ } -+} -+ -+static int msm_pcie_clk_init(struct msm_pcie_dev_t *dev) -+{ -+ int i, rc = 0; -+ struct msm_pcie_clk_info_t *info; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ rc = regulator_enable(dev->gdsc); -+ -+ if (rc) { -+ PCIE_ERR(dev, "PCIe: fail to enable GDSC for RC%d (%s)\n", -+ dev->rc_idx, dev->pdev->name); -+ return rc; -+ } -+ -+ if (dev->bus_client) { -+ rc = msm_bus_scale_client_update_request(dev->bus_client, 1); -+ if (rc) { -+ PCIE_ERR(dev, -+ "PCIe: fail to set bus bandwidth for RC%d:%d.\n", -+ dev->rc_idx, rc); -+ return rc; -+ } else { -+ PCIE_DBG2(dev, -+ "PCIe: set bus bandwidth for RC%d.\n", -+ dev->rc_idx); -+ } -+ } -+ -+ for (i = 0; i < MSM_PCIE_MAX_CLK; i++) { -+ info = &dev->clk[i]; -+ -+ if (!info->hdl) -+ continue; -+ -+ if (info->freq) { -+ rc = clk_set_rate(info->hdl, info->freq); -+ if (rc) { -+ PCIE_ERR(dev, -+ "PCIe: RC%d can't set rate for clk %s: %d.\n", -+ dev->rc_idx, info->name, rc); -+ break; -+ } else { -+ PCIE_DBG2(dev, -+ "PCIe: RC%d set rate for clk %s.\n", -+ dev->rc_idx, info->name); -+ } -+ } -+ -+ rc = clk_prepare_enable(info->hdl); -+ -+ if (rc) -+ PCIE_ERR(dev, "PCIe: RC%d failed to enable clk %s\n", -+ dev->rc_idx, info->name); -+ else -+ PCIE_DBG2(dev, "enable clk %s for RC%d.\n", -+ info->name, dev->rc_idx); -+ } -+ -+ if (rc) { -+ PCIE_DBG(dev, "RC%d disable clocks for error handling.\n", -+ dev->rc_idx); -+ while (i--) { -+ struct clk *hdl = dev->clk[i].hdl; -+ if (hdl) -+ clk_disable_unprepare(hdl); -+ } -+ -+ regulator_disable(dev->gdsc); -+ } -+ -+ return rc; -+} -+ -+static void msm_pcie_clk_deinit(struct msm_pcie_dev_t *dev) -+{ -+ int i; -+ int rc; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ for (i = 0; i < MSM_PCIE_MAX_CLK; i++) -+ if (dev->clk[i].hdl) -+ clk_disable_unprepare(dev->clk[i].hdl); -+ -+ if (dev->bus_client) { -+ rc = msm_bus_scale_client_update_request(dev->bus_client, 0); -+ if (rc) -+ PCIE_ERR(dev, -+ "PCIe: fail to relinquish bus bandwidth for RC%d:%d.\n", -+ dev->rc_idx, rc); -+ else -+ PCIE_DBG(dev, -+ "PCIe: relinquish bus bandwidth for RC%d.\n", -+ dev->rc_idx); -+ } -+ -+ regulator_disable(dev->gdsc); -+} -+ -+static void msm_pcie_controller_reset(struct msm_pcie_dev_t *dev) -+{ -+ /* Assert pcie_pipe_ares */ -+ reset_control_assert(dev->rst[MSM_PCIE_AXI_M_ARES].hdl); -+ reset_control_assert(dev->rst[MSM_PCIE_AXI_S_ARES].hdl); -+ usleep_range(10000, 12000); /* wait 12ms */ -+ -+ reset_control_assert(dev->rst[MSM_PCIE_PIPE_ARES].hdl); -+ reset_control_assert(dev->rst[MSM_PCIE_PIPE_STICKY_ARES].hdl); -+ reset_control_assert(dev->rst[MSM_PCIE_PHY_ARES].hdl); -+ reset_control_assert(dev->rst[MSM_PCIE_PHY_AHB_ARES].hdl); -+ usleep_range(10000, 12000); /* wait 12ms */ -+ -+ reset_control_assert(dev->rst[MSM_PCIE_AXI_M_STICKY_ARES].hdl); -+ reset_control_assert(dev->rst[MSM_PCIE_PWR_ARES].hdl); -+ reset_control_assert(dev->rst[MSM_PCIE_AHB_ARES].hdl); -+ usleep_range(10000, 12000); /* wait 12ms */ -+ -+ reset_control_deassert(dev->rst[MSM_PCIE_PHY_AHB_ARES].hdl); -+ reset_control_deassert(dev->rst[MSM_PCIE_PHY_ARES].hdl); -+ reset_control_deassert(dev->rst[MSM_PCIE_PIPE_ARES].hdl); -+ reset_control_deassert(dev->rst[MSM_PCIE_PIPE_STICKY_ARES].hdl); -+ usleep_range(10000, 12000); /* wait 12ms */ -+ -+ reset_control_deassert(dev->rst[MSM_PCIE_AXI_M_ARES].hdl); -+ reset_control_deassert(dev->rst[MSM_PCIE_AXI_M_STICKY_ARES].hdl); -+ reset_control_deassert(dev->rst[MSM_PCIE_AXI_S_ARES].hdl); -+ reset_control_deassert(dev->rst[MSM_PCIE_PWR_ARES].hdl); -+ reset_control_deassert(dev->rst[MSM_PCIE_AHB_ARES].hdl); -+ usleep_range(10000, 12000); /* wait 12ms */ -+ wmb(); /* ensure data is written to hw register */ -+} -+ -+static void msm_pcie_config_controller(struct msm_pcie_dev_t *dev) -+{ -+ struct resource *axi_conf = dev->res[MSM_PCIE_RES_CONF].resource; -+ u32 dev_conf, upper, lower, limit; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ if (IS_ENABLED(CONFIG_ARM_LPAE)) { -+ lower = PCIE_LOWER_ADDR(axi_conf->start); -+ upper = PCIE_UPPER_ADDR(axi_conf->start); -+ limit = PCIE_LOWER_ADDR(axi_conf->end); -+ } else { -+ lower = axi_conf->start; -+ upper = 0; -+ limit = axi_conf->end; -+ } -+ -+ dev_conf = BDF_OFFSET(1, 0, 0); -+ -+ if (dev->shadow_en) { -+ dev->rc_shadow[PCIE20_PLR_IATU_VIEWPORT / 4] = 0; -+ dev->rc_shadow[PCIE20_PLR_IATU_CTRL1 / 4] = 4; -+ dev->rc_shadow[PCIE20_PLR_IATU_LBAR / 4] = lower; -+ dev->rc_shadow[PCIE20_PLR_IATU_UBAR / 4] = upper; -+ dev->rc_shadow[PCIE20_PLR_IATU_LAR / 4] = limit; -+ dev->rc_shadow[PCIE20_PLR_IATU_LTAR / 4] = dev_conf; -+ dev->rc_shadow[PCIE20_PLR_IATU_UTAR / 4] = 0; -+ dev->rc_shadow[PCIE20_PLR_IATU_CTRL2 / 4] = BIT(31); -+ } -+ -+ /* -+ * program and enable address translation region 0 (device config -+ * address space); region type config; -+ * axi config address range to device config address range -+ */ -+ writel_relaxed(0, dev->dm_core + PCIE20_PLR_IATU_VIEWPORT); -+ /* ensure that hardware locks the region before programming it */ -+ wmb(); -+ -+ writel_relaxed(4, dev->dm_core + PCIE20_PLR_IATU_CTRL1); -+ writel_relaxed(lower, dev->dm_core + PCIE20_PLR_IATU_LBAR); -+ writel_relaxed(upper, dev->dm_core + PCIE20_PLR_IATU_UBAR); -+ writel_relaxed(limit, dev->dm_core + PCIE20_PLR_IATU_LAR); -+ writel_relaxed(dev_conf, dev->dm_core + PCIE20_PLR_IATU_LTAR); -+ writel_relaxed(0, dev->dm_core + PCIE20_PLR_IATU_UTAR); -+ writel_relaxed(BIT(31), dev->dm_core + PCIE20_PLR_IATU_CTRL2); -+ /* ensure that hardware registers the configuration */ -+ wmb(); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_VIEWPORT:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_VIEWPORT)); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_CTRL1:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_CTRL1)); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_LBAR:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_LBAR)); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_UBAR:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_UBAR)); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_LAR:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_LAR)); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_LTAR:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_LTAR)); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_UTAR:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_UTAR)); -+ PCIE_DBG2(dev, "PCIE20_PLR_IATU_CTRL2:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_PLR_IATU_CTRL2)); -+ -+ /* configure N_FTS */ -+ PCIE_DBG2(dev, "Original PCIE20_ACK_F_ASPM_CTRL_REG:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_ACK_F_ASPM_CTRL_REG)); -+ if (!dev->n_fts) -+ msm_pcie_write_mask(dev->dm_core + PCIE20_ACK_F_ASPM_CTRL_REG, -+ 0, BIT(15)); -+ else -+ msm_pcie_write_mask(dev->dm_core + PCIE20_ACK_F_ASPM_CTRL_REG, -+ PCIE20_ACK_N_FTS, -+ dev->n_fts << 8); -+ readl_relaxed(dev->elbi); -+ -+ if (dev->shadow_en) -+ dev->rc_shadow[PCIE20_ACK_F_ASPM_CTRL_REG / 4] = -+ readl_relaxed(dev->dm_core + -+ PCIE20_ACK_F_ASPM_CTRL_REG); -+ -+ PCIE_DBG2(dev, "Updated PCIE20_ACK_F_ASPM_CTRL_REG:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_ACK_F_ASPM_CTRL_REG)); -+} -+ -+static void msm_pcie_config_l1ss(struct msm_pcie_dev_t *dev) -+{ -+ u32 offset = 0; -+ -+ if (!dev->rc_idx) -+ offset = PCIE20_EP_L1SUB_CTL1_OFFSET; -+ -+ /* Enable the AUX Clock and the Core Clk to be synchronous for L1SS*/ -+ if (!dev->aux_clk_sync) -+ msm_pcie_write_mask(dev->parf + -+ PCIE20_PARF_SYS_CTRL, BIT(3), 0); -+ -+ /* Enable L1SS on RC */ -+ msm_pcie_write_mask(dev->dm_core + PCIE20_CAP_LINKCTRLSTATUS, 0, -+ BIT(1)|BIT(0)); -+ msm_pcie_write_mask(dev->dm_core + PCIE20_L1SUB_CONTROL1, 0, -+ BIT(3)|BIT(2)|BIT(1)|BIT(0)); -+ msm_pcie_write_mask(dev->dm_core + PCIE20_DEVICE_CONTROL2_STATUS2, 0, -+ BIT(10)); -+ readl_relaxed(dev->elbi); -+ if (dev->shadow_en) { -+ dev->rc_shadow[PCIE20_CAP_LINKCTRLSTATUS / 4] = -+ readl_relaxed(dev->dm_core + PCIE20_CAP_LINKCTRLSTATUS); -+ dev->rc_shadow[PCIE20_L1SUB_CONTROL1 / 4] = -+ readl_relaxed(dev->dm_core + PCIE20_L1SUB_CONTROL1); -+ dev->rc_shadow[PCIE20_DEVICE_CONTROL2_STATUS2 / 4] = -+ readl_relaxed(dev->dm_core + -+ PCIE20_DEVICE_CONTROL2_STATUS2); -+ } -+ PCIE_DBG2(dev, "RC's CAP_LINKCTRLSTATUS:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_CAP_LINKCTRLSTATUS)); -+ PCIE_DBG2(dev, "RC's L1SUB_CONTROL1:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_L1SUB_CONTROL1)); -+ PCIE_DBG2(dev, "RC's DEVICE_CONTROL2_STATUS2:0x%x\n", -+ readl_relaxed(dev->dm_core + PCIE20_DEVICE_CONTROL2_STATUS2)); -+ -+ /* Enable L1SS on EP */ -+ msm_pcie_write_mask(dev->conf + PCIE20_CAP_LINKCTRLSTATUS, 0, -+ BIT(1)|BIT(0)); -+ msm_pcie_write_mask(dev->conf + PCIE20_L1SUB_CONTROL1 + -+ offset, 0, -+ BIT(3)|BIT(2)|BIT(1)|BIT(0)); -+ msm_pcie_write_mask(dev->conf + PCIE20_DEVICE_CONTROL2_STATUS2, 0, -+ BIT(10)); -+ readl_relaxed(dev->elbi); -+ if (dev->shadow_en) { -+ dev->ep_shadow[PCIE20_CAP_LINKCTRLSTATUS / 4] = -+ readl_relaxed(dev->conf + -+ PCIE20_CAP_LINKCTRLSTATUS); -+ dev->ep_shadow[PCIE20_L1SUB_CONTROL1 / 4 + offset / 4] = -+ readl_relaxed(dev->conf + -+ PCIE20_L1SUB_CONTROL1 + offset); -+ dev->ep_shadow[PCIE20_DEVICE_CONTROL2_STATUS2 / 4] = -+ readl_relaxed(dev->conf + -+ PCIE20_DEVICE_CONTROL2_STATUS2); -+ } -+ PCIE_DBG2(dev, "EP's CAP_LINKCTRLSTATUS:0x%x\n", -+ readl_relaxed(dev->conf + PCIE20_CAP_LINKCTRLSTATUS)); -+ PCIE_DBG2(dev, "EP's L1SUB_CONTROL1:0x%x\n", -+ readl_relaxed(dev->conf + PCIE20_L1SUB_CONTROL1 + -+ offset)); -+ PCIE_DBG2(dev, "EP's DEVICE_CONTROL2_STATUS2:0x%x\n", -+ readl_relaxed(dev->conf + PCIE20_DEVICE_CONTROL2_STATUS2)); -+} -+ -+static int msm_pcie_get_resources(struct msm_pcie_dev_t *dev, -+ struct platform_device *pdev) -+{ -+ int i, len, cnt, ret = 0; -+ struct msm_pcie_vreg_info_t *vreg_info; -+ struct msm_pcie_gpio_info_t *gpio_info; -+ struct msm_pcie_clk_info_t *clk_info; -+ struct msm_pcie_rst_info_t *rst_info; -+ struct resource *res; -+ struct msm_pcie_res_info_t *res_info; -+ struct msm_pcie_irq_info_t *irq_info; -+ char prop_name[MAX_PROP_SIZE]; -+ const __be32 *prop; -+ u32 *clkfreq = NULL; -+ -+ cnt = of_property_count_strings((&pdev->dev)->of_node, -+ "clock-names"); -+ if (cnt > 0) { -+ clkfreq = kzalloc(cnt * sizeof(*clkfreq), -+ GFP_KERNEL); -+ if (!clkfreq) { -+ PCIE_ERR(dev, "PCIe: memory alloc failed for RC%d\n", -+ dev->rc_idx); -+ return -ENOMEM; -+ } -+ ret = of_property_read_u32_array( -+ (&pdev->dev)->of_node, -+ "max-clock-frequency-hz", clkfreq, cnt); -+ if (ret) { -+ PCIE_ERR(dev, -+ "PCIe: invalid max-clock-frequency-hz property for RC%d:%d\n", -+ dev->rc_idx, ret); -+ goto out; -+ } -+ } -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ for (i = 0; i < MSM_PCIE_MAX_VREG; i++) { -+ vreg_info = &dev->vreg[i]; -+ vreg_info->hdl = -+ devm_regulator_get(&pdev->dev, vreg_info->name); -+ -+ if (PTR_ERR(vreg_info->hdl) == -EPROBE_DEFER) { -+ PCIE_DBG(dev, "EPROBE_DEFER for VReg:%s\n", -+ vreg_info->name); -+ ret = PTR_ERR(vreg_info->hdl); -+ goto out; -+ } -+ -+ if (IS_ERR(vreg_info->hdl)) { -+ if (vreg_info->required) { -+ PCIE_DBG(dev, "Vreg %s doesn't exist\n", -+ vreg_info->name); -+ ret = PTR_ERR(vreg_info->hdl); -+ goto out; -+ } else { -+ PCIE_DBG(dev, -+ "Optional Vreg %s doesn't exist\n", -+ vreg_info->name); -+ vreg_info->hdl = NULL; -+ } -+ } else { -+ dev->vreg_n++; -+ snprintf(prop_name, MAX_PROP_SIZE, -+ "qcom,%s-voltage-level", vreg_info->name); -+ prop = of_get_property((&pdev->dev)->of_node, -+ prop_name, &len); -+ if (!prop || (len != (3 * sizeof(__be32)))) { -+ PCIE_DBG(dev, "%s %s property\n", -+ prop ? "invalid format" : -+ "no", prop_name); -+ vreg_info->hdl = NULL; -+ } else { -+ vreg_info->max_v = be32_to_cpup(&prop[0]); -+ vreg_info->min_v = be32_to_cpup(&prop[1]); -+ vreg_info->opt_mode = -+ be32_to_cpup(&prop[2]); -+ } -+ } -+ } -+ -+ dev->gdsc = devm_regulator_get(&pdev->dev, "gdsc-vdd"); -+ -+ if (IS_ERR(dev->gdsc)) { -+ PCIE_ERR(dev, "PCIe: RC%d Failed to get %s GDSC:%ld\n", -+ dev->rc_idx, dev->pdev->name, PTR_ERR(dev->gdsc)); -+ if (PTR_ERR(dev->gdsc) == -EPROBE_DEFER) -+ PCIE_DBG(dev, "PCIe: EPROBE_DEFER for %s GDSC\n", -+ dev->pdev->name); -+ ret = PTR_ERR(dev->gdsc); -+ goto out; -+ } -+ -+ dev->gpio_n = 0; -+ for (i = 0; i < MSM_PCIE_MAX_GPIO; i++) { -+ gpio_info = &dev->gpio[i]; -+ ret = of_get_named_gpio((&pdev->dev)->of_node, -+ gpio_info->name, 0); -+ if (ret >= 0) { -+ gpio_info->num = ret; -+ ret = 0; -+ dev->gpio_n++; -+ PCIE_DBG(dev, "GPIO num for %s is %d\n", -+ gpio_info->name, gpio_info->num); -+ } else { -+ goto out; -+ } -+ } -+ -+ for (i = 0; i < MSM_PCIE_MAX_CLK; i++) { -+ clk_info = &dev->clk[i]; -+ -+ clk_info->hdl = devm_clk_get(&pdev->dev, clk_info->name); -+ -+ if (IS_ERR(clk_info->hdl)) { -+ if (clk_info->required) { -+ PCIE_DBG(dev, "Clock %s isn't available:%ld\n", -+ clk_info->name, PTR_ERR(clk_info->hdl)); -+ ret = PTR_ERR(clk_info->hdl); -+ goto out; -+ } else { -+ PCIE_DBG(dev, "Ignoring Clock %s\n", -+ clk_info->name); -+ clk_info->hdl = NULL; -+ } -+ } else { -+ if (clkfreq != NULL) { -+ clk_info->freq = clkfreq[i + -+ MSM_PCIE_MAX_PIPE_CLK]; -+ PCIE_DBG(dev, "Freq of Clock %s is:%d\n", -+ clk_info->name, clk_info->freq); -+ } -+ } -+ } -+ -+ for (i = 0; i < MSM_PCIE_MAX_RESET; i++) { -+ rst_info = &dev->rst[i]; -+ -+ rst_info->hdl = devm_reset_control_get(&pdev->dev, rst_info->name); -+ -+ if (IS_ERR(rst_info->hdl)) { -+ PCIE_DBG(dev, "Reset %s isn't available:%ld\n", -+ rst_info->name, PTR_ERR(rst_info->hdl)); -+ ret = PTR_ERR(rst_info->hdl); -+ goto out; -+ } -+ } -+ -+ -+ -+ dev->bus_scale_table = msm_bus_cl_get_pdata(pdev); -+ if (!dev->bus_scale_table) { -+ PCIE_DBG(dev, "PCIe: No bus scale table for RC%d (%s)\n", -+ dev->rc_idx, dev->pdev->name); -+ dev->bus_client = 0; -+ } else { -+ dev->bus_client = -+ msm_bus_scale_register_client(dev->bus_scale_table); -+ if (!dev->bus_client) { -+ PCIE_ERR(dev, -+ "PCIe: Failed to register bus client for RC%d (%s)\n", -+ dev->rc_idx, dev->pdev->name); -+ msm_bus_cl_clear_pdata(dev->bus_scale_table); -+ ret = -ENODEV; -+ goto out; -+ } -+ } -+ -+ for (i = 0; i < MSM_PCIE_MAX_RES; i++) { -+ res_info = &dev->res[i]; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, -+ res_info->name); -+ -+ if (!res) { -+ PCIE_ERR(dev, "PCIe: RC%d can't get %s resource.\n", -+ dev->rc_idx, res_info->name); -+ ret = -ENOMEM; -+ goto out; -+ } else -+ PCIE_DBG(dev, "start addr for %s is %pa.\n", -+ res_info->name, &res->start); -+ -+ res_info->base = devm_ioremap(&pdev->dev, -+ res->start, resource_size(res)); -+ if (!res_info->base) { -+ PCIE_ERR(dev, "PCIe: RC%d can't remap %s.\n", -+ dev->rc_idx, res_info->name); -+ ret = -ENOMEM; -+ goto out; -+ } -+ res_info->resource = res; -+ } -+ -+ for (i = 0; i < MSM_PCIE_MAX_IRQ; i++) { -+ irq_info = &dev->irq[i]; -+ -+ /* Skip if wakeirq is not present in device tree */ -+ if (!dev->ep_wakeirq && (i == MSM_PCIE_INT_WAKE)) -+ continue; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, -+ irq_info->name); -+ -+ if (!res) { -+ int j; -+ for (j = 0; j < MSM_PCIE_MAX_RES; j++) { -+ iounmap(dev->res[j].base); -+ dev->res[j].base = NULL; -+ } -+ PCIE_ERR(dev, "PCIe: RC%d can't find IRQ # for %s.\n", -+ dev->rc_idx, irq_info->name); -+ ret = -ENODEV; -+ goto out; -+ } else { -+ irq_info->num = res->start; -+ PCIE_DBG(dev, "IRQ # for %s is %d.\n", irq_info->name, -+ irq_info->num); -+ } -+ } -+ -+ /* All allocations succeeded */ -+ -+ dev->wake_n = dev->irq[MSM_PCIE_INT_WAKE].num; -+ -+ dev->parf = dev->res[MSM_PCIE_RES_PARF].base; -+ dev->phy = dev->res[MSM_PCIE_RES_PHY].base; -+ dev->elbi = dev->res[MSM_PCIE_RES_ELBI].base; -+ dev->dm_core = dev->res[MSM_PCIE_RES_DM_CORE].base; -+ dev->conf = dev->res[MSM_PCIE_RES_CONF].base; -+ dev->bars = dev->res[MSM_PCIE_RES_BARS].base; -+ dev->dev_mem_res = dev->res[MSM_PCIE_RES_BARS].resource; -+ dev->dev_io_res = dev->res[MSM_PCIE_RES_IO].resource; -+ dev->dev_io_res->flags = IORESOURCE_IO; -+ -+out: -+ kfree(clkfreq); -+ return ret; -+} -+ -+static void msm_pcie_release_resources(struct msm_pcie_dev_t *dev) -+{ -+ dev->parf = NULL; -+ dev->elbi = NULL; -+ dev->dm_core = NULL; -+ dev->conf = NULL; -+ dev->bars = NULL; -+ dev->dev_mem_res = NULL; -+ dev->dev_io_res = NULL; -+} -+ -+int msm_pcie_enable(struct msm_pcie_dev_t *dev, u32 options) -+{ -+ int ret = 0; -+ uint32_t val; -+ long int retries = 0; -+ int link_check_count = 0; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ mutex_lock(&dev->setup_lock); -+ -+ if (dev->link_status == MSM_PCIE_LINK_ENABLED) { -+ PCIE_ERR(dev, "PCIe: the link of RC%d is already enabled\n", -+ dev->rc_idx); -+ goto out; -+ } -+ -+ -+ /* assert PCIe reset link to keep EP in reset */ -+ -+ PCIE_INFO(dev, "PCIe: trigger the reset of endpoint of RC%d.\n", -+ dev->rc_idx); -+ gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num, -+ dev->gpio[MSM_PCIE_GPIO_PERST].on); -+ usleep_range(PERST_PROPAGATION_DELAY_US_MIN, -+ PERST_PROPAGATION_DELAY_US_MAX); -+ -+ /* enable power */ -+ -+ if (options & PM_VREG) { -+ ret = msm_pcie_vreg_init(dev); -+ if (ret) -+ goto out; -+ } -+ -+ /* enable clocks */ -+ if (options & PM_CLK) { -+ ret = msm_pcie_clk_init(dev); -+ wmb(); -+ if (ret) -+ goto clk_fail; -+ } -+ -+ /* enable PCIe clocks and resets */ -+ msm_pcie_write_mask(dev->parf + PCIE20_PARF_PHY_CTRL, BIT(0), 0); -+ -+ /* change DBI base address */ -+ writel_relaxed(0, dev->parf + PCIE20_PARF_DBI_BASE_ADDR); -+ -+ if (dev->rc_idx) -+ writel_relaxed(0x361c, dev->parf + PCIE20_PARF_SYS_CTRL); -+ else -+ writel_relaxed(0x3656, dev->parf + PCIE20_PARF_SYS_CTRL); -+ -+ writel_relaxed(0, dev->parf + PCIE20_PARF_Q2A_FLUSH); -+ -+ if (dev->use_msi) { -+ PCIE_DBG(dev, "RC%d: enable WR halt.\n", dev->rc_idx); -+ msm_pcie_write_mask(dev->parf + -+ PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT, 0, BIT(31)); -+ } -+ -+ /* init PCIe PHY */ -+ if (dev->is_emulation) -+ pcie_phy_init(dev); -+ -+ writel_relaxed(CMD_BME_VAL, dev->dm_core + PCIE20_COMMAND_STATUS); -+ writel_relaxed(DBI_RO_WR_EN, -+ dev->dm_core + PCIE20_MISC_CONTROL_1_REG); -+ writel_relaxed(PCIE_CAP_LINK1_VAL, dev->dm_core + PCIE20_CAP_LINK_1); -+ msm_pcie_write_mask(dev->dm_core + PCIE20_CAP_LINK_CAPABILITIES, -+ BIT(10) | BIT(11), 0); -+ writel_relaxed(PCIE_CAP_CPL_TIMEOUT_DISABLE, -+ dev->dm_core + PCIE20_DEVICE_CONTROL2_STATUS2); -+ writel_relaxed(LTSSM_EN, dev->parf + PCIE20_PARF_LTSSM); -+ -+ PCIE_DBG(dev, "RC%d: waiting for phy ready...\n", dev->rc_idx); -+ -+ do { -+ if (pcie_phy_is_ready(dev)) -+ break; -+ retries++; -+ usleep_range(REFCLK_STABILIZATION_DELAY_US_MIN, -+ REFCLK_STABILIZATION_DELAY_US_MAX); -+ } while (retries < PHY_READY_TIMEOUT_COUNT); -+ -+ PCIE_DBG(dev, "RC%d: number of PHY retries:%ld.\n", -+ dev->rc_idx, retries); -+ -+ if (pcie_phy_is_ready(dev)) -+ PCIE_INFO(dev, "PCIe RC%d PHY is ready!\n", dev->rc_idx); -+ else { -+ PCIE_ERR(dev, "PCIe PHY RC%d failed to come up!\n", -+ dev->rc_idx); -+ ret = -ENODEV; -+ goto link_fail; -+ } -+ -+ if (dev->ep_latency) -+ msleep(dev->ep_latency); -+ -+ /* de-assert PCIe reset link to bring EP out of reset */ -+ -+ PCIE_INFO(dev, "PCIe: Release the reset of endpoint of RC%d.\n", -+ dev->rc_idx); -+ gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num, -+ 1 - dev->gpio[MSM_PCIE_GPIO_PERST].on); -+ usleep_range(PERST_PROPAGATION_DELAY_US_MIN, -+ PERST_PROPAGATION_DELAY_US_MAX); -+ -+ /* enable link training */ -+ msm_pcie_write_mask(dev->elbi + PCIE20_ELBI_SYS_CTRL, 0, BIT(0)); -+ -+ PCIE_DBG(dev, "%s", "check if link is up\n"); -+ -+ if (dev->rc_idx == 1) { -+ PCIE_DBG(dev, "optimized link training for RC%d\n", -+ dev->rc_idx); -+ /* Wait for up to 100ms for the link to come up */ -+ do { -+ usleep_range(LINK_UP_TIMEOUT_US_MIN, -+ LINK_UP_TIMEOUT_US_MAX); -+ val = readl_relaxed(dev->elbi + PCIE20_ELBI_SYS_STTS); -+ } while ((!(val & XMLH_LINK_UP) || -+ !msm_pcie_confirm_linkup(dev, false, false)) -+ && (link_check_count++ < LINK_UP_CHECK_MAX_COUNT)); -+ -+ if ((val & XMLH_LINK_UP) && -+ msm_pcie_confirm_linkup(dev, false, false)) -+ PCIE_DBG(dev, "Link is up after %d checkings\n", -+ link_check_count); -+ else -+ PCIE_DBG(dev, "Initial link training failed for RC%d\n", -+ dev->rc_idx); -+ } else { -+ PCIE_DBG(dev, "non-optimized link training for RC%d\n", -+ dev->rc_idx); -+ usleep_range(LINK_RETRY_TIMEOUT_US_MIN * 5 , -+ LINK_RETRY_TIMEOUT_US_MAX * 5); -+ val = readl_relaxed(dev->elbi + PCIE20_ELBI_SYS_STTS); -+ } -+ -+ retries = 0; -+ -+ while ((!(val & XMLH_LINK_UP) || -+ !msm_pcie_confirm_linkup(dev, false, false)) -+ && (retries < MAX_LINK_RETRIES)) { -+ PCIE_ERR(dev, "RC%d:No. %ld:LTSSM_STATE:0x%x\n", dev->rc_idx, -+ retries + 1, (val >> 0xC) & 0x1f); -+ gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num, -+ dev->gpio[MSM_PCIE_GPIO_PERST].on); -+ usleep_range(PERST_PROPAGATION_DELAY_US_MIN, -+ PERST_PROPAGATION_DELAY_US_MAX); -+ gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num, -+ 1 - dev->gpio[MSM_PCIE_GPIO_PERST].on); -+ usleep_range(LINK_RETRY_TIMEOUT_US_MIN, -+ LINK_RETRY_TIMEOUT_US_MAX); -+ retries++; -+ val = readl_relaxed(dev->elbi + PCIE20_ELBI_SYS_STTS); -+ } -+ -+ PCIE_DBG(dev, "number of link training retries: %ld\n", retries); -+ -+ if ((val & XMLH_LINK_UP) && -+ msm_pcie_confirm_linkup(dev, false, false)) { -+ PCIE_INFO(dev, "PCIe RC%d link initialized\n", dev->rc_idx); -+ } else { -+ PCIE_INFO(dev, "PCIe: trigger the reset of endpoint of RC%d.\n", -+ dev->rc_idx); -+ gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num, -+ dev->gpio[MSM_PCIE_GPIO_PERST].on); -+ PCIE_ERR(dev, "PCIe RC%d link initialization failed\n", -+ dev->rc_idx); -+ ret = -1; -+ goto link_fail; -+ } -+ -+ msm_pcie_config_controller(dev); -+ -+ if (!dev->msi_gicm_addr) -+ msm_pcie_config_msi_controller(dev); -+ -+ if (dev->l1ss_supported) -+ msm_pcie_config_l1ss(dev); -+ -+ dev->link_status = MSM_PCIE_LINK_ENABLED; -+ dev->power_on = true; -+ dev->suspending = false; -+ goto out; -+ -+link_fail: -+ msm_pcie_clk_deinit(dev); -+clk_fail: -+ msm_pcie_vreg_deinit(dev); -+out: -+ mutex_unlock(&dev->setup_lock); -+ -+ return ret; -+} -+ -+ -+void msm_pcie_disable(struct msm_pcie_dev_t *dev, u32 options) -+{ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ mutex_lock(&dev->setup_lock); -+ -+ if (!dev->power_on) { -+ PCIE_DBG(dev, -+ "PCIe: the link of RC%d is already power down.\n", -+ dev->rc_idx); -+ mutex_unlock(&dev->setup_lock); -+ return; -+ } -+ -+ dev->link_status = MSM_PCIE_LINK_DISABLED; -+ dev->power_on = false; -+ -+ PCIE_INFO(dev, "PCIe: trigger the reset of endpoint of RC%d.\n", -+ dev->rc_idx); -+ -+ gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num, -+ dev->gpio[MSM_PCIE_GPIO_PERST].on); -+ -+ if (options & PM_CLK) { -+ msm_pcie_write_mask(dev->parf + PCIE20_PARF_PHY_CTRL, 0, -+ BIT(0)); -+ msm_pcie_clk_deinit(dev); -+ } -+ -+ if (options & PM_VREG) -+ msm_pcie_vreg_deinit(dev); -+ -+ mutex_unlock(&dev->setup_lock); -+} -+ -+static int msm_pcie_setup(int nr, struct pci_sys_data *sys) -+{ -+ struct msm_pcie_dev_t *dev = -+ (struct msm_pcie_dev_t *)(sys->private_data); -+ -+ PCIE_DBG(dev, "bus %d\n", nr); -+ /* -+ * specify linux PCI framework to allocate device memory (BARs) -+ * from msm_pcie_dev.dev_mem_res resource. -+ */ -+ sys->mem_offset = 0; -+ sys->io_offset = 0; -+ -+ pci_add_resource(&sys->resources, dev->dev_io_res); -+ pci_add_resource(&sys->resources, dev->dev_mem_res); -+ return 1; -+} -+ -+static int msm_rc_remove(struct msm_pcie_dev_t *dev) -+{ -+ msm_pcie_disable(dev, PM_PIPE_CLK | PM_CLK | PM_VREG); -+ pci_stop_root_bus(dev->pci_bus); -+ pci_remove_root_bus(dev->pci_bus); -+ dev->pci_bus = NULL; -+ dev->enumerated = false; -+ return 0; -+} -+ -+void msm_pcie_remove_bus(void) -+{ -+ int i; -+ -+ if (atomic_read(&rc_removed)) -+ return; -+ -+ for (i = 0; i < pcie_drv.rc_num; i++) { -+ pr_notice("---> Removing %d", i); -+ msm_rc_remove(&msm_pcie_dev[i]); -+ pr_notice(" ... done<---\n"); -+ } -+ -+ atomic_set(&rc_removed, 1); -+} -+ -+static struct pci_bus *msm_pcie_scan_bus(int nr, -+ struct pci_sys_data *sys) -+{ -+ struct pci_bus *bus = NULL; -+ struct msm_pcie_dev_t *dev = -+ (struct msm_pcie_dev_t *)(sys->private_data); -+ -+ PCIE_DBG(dev, "bus %d\n", nr); -+ -+ bus = pci_scan_root_bus(NULL, sys->busnr, &msm_pcie_ops, sys, -+ &sys->resources); -+ dev->pci_bus = bus; -+ -+ return bus; -+} -+ -+static int msm_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ int ret = 0; -+ -+ PCIE_DBG(pcie_dev, "rc %s slot %d pin %d\n", pcie_dev->pdev->name, -+ slot, pin); -+ -+ switch (pin) { -+ case 1: -+ ret = pcie_dev->irq[MSM_PCIE_INT_A].num; -+ break; -+ case 2: -+ ret = pcie_dev->irq[MSM_PCIE_INT_B].num; -+ break; -+ case 3: -+ ret = pcie_dev->irq[MSM_PCIE_INT_C].num; -+ break; -+ case 4: -+ ret = pcie_dev->irq[MSM_PCIE_INT_D].num; -+ break; -+ default: -+ PCIE_ERR(pcie_dev, "PCIe: RC%d: unsupported pin number.\n", -+ pcie_dev->rc_idx); -+ } -+ -+ return ret; -+} -+ -+#if 0 -+static void msm_pcie_add_bus(struct pci_bus *bus) -+{ -+ struct pci_sys_data *sys = bus->sysdata; -+ struct msm_pcie_dev_t *dev = -+ (struct msm_pcie_dev_t *)(sys->private_data); -+ -+ bus->msi = dev->msi_chip; -+} -+#endif -+ -+static struct hw_pci msm_pci[MAX_RC_NUM] = { -+ { -+ //.domain = 0, -+ .nr_controllers = 1, -+ .swizzle = pci_common_swizzle, -+ .setup = msm_pcie_setup, -+ .scan = msm_pcie_scan_bus, -+ .map_irq = msm_pcie_map_irq, -+ //.add_bus = msm_pcie_add_bus, -+ }, -+}; -+ -+int msm_pcie_rescan(void) -+{ -+ int i; -+ -+ if (!atomic_read(&rc_removed)) -+ return 0; -+ -+ for (i = 0; i < pcie_drv.rc_num; i++) { -+ /* reset the RC and enumurate devices */ -+ msm_pcie_controller_reset(&msm_pcie_dev[i]); -+ msm_pcie_enumerate(i); -+ } -+ -+ atomic_set(&rc_removed, 0); -+ -+ return 0; -+} -+ -+int msm_pcie_enumerate(u32 rc_idx) -+{ -+ int ret = 0; -+ struct msm_pcie_dev_t *dev = &msm_pcie_dev[rc_idx]; -+ -+ PCIE_DBG(dev, "Enumerate RC%d\n", rc_idx); -+ -+ if (!dev->enumerated) { -+ ret = msm_pcie_enable(dev, PM_ALL); -+ -+ /* kick start ARM PCI configuration framework */ -+ if (!ret) { -+ struct pci_dev *pcidev = NULL; -+ bool found = false; -+ u32 ids = readl_relaxed(msm_pcie_dev[rc_idx].dm_core); -+ u32 vendor_id = ids & 0xffff; -+ u32 device_id = (ids & 0xffff0000) >> 16; -+ -+ PCIE_DBG(dev, "vendor-id:0x%x device_id:0x%x\n", -+ vendor_id, device_id); -+ -+ msm_pci[rc_idx].private_data = (void **)&dev; -+ pci_common_init(&msm_pci[rc_idx]); -+ /* This has to happen only once */ -+ dev->enumerated = true; -+ -+ do { -+ pcidev = pci_get_device(vendor_id, -+ device_id, pcidev); -+ if (pcidev && (&msm_pcie_dev[rc_idx] == -+ (struct msm_pcie_dev_t *) -+ PCIE_BUS_PRIV_DATA(pcidev))) { -+ msm_pcie_dev[rc_idx].dev = pcidev; -+ found = true; -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "PCI device is found for RC%d\n", -+ rc_idx); -+ } -+ } while (!found && pcidev); -+ -+ if (!pcidev) { -+ PCIE_ERR(dev, -+ "PCIe: Did not find PCI device for RC%d.\n", -+ dev->rc_idx); -+ return -ENODEV; -+ } -+ } else { -+ PCIE_ERR(dev, "PCIe: failed to enable RC%d.\n", -+ dev->rc_idx); -+ } -+ } else { -+ PCIE_ERR(dev, "PCIe: RC%d has already been enumerated.\n", -+ dev->rc_idx); -+ } -+ -+ return ret; -+} -+ -+static ssize_t msm_bus_rescan_store(struct bus_type *bus, const char *buf, -+ size_t count) -+{ -+ unsigned long val; -+ -+ if (kstrtoul(buf, 0, &val) < 0) -+ return -EINVAL; -+ -+ if (val) { -+ pci_lock_rescan_remove(); -+ msm_pcie_rescan(); -+ pci_unlock_rescan_remove(); -+ } -+ return count; -+} -+static BUS_ATTR(rcrescan, (S_IWUSR|S_IWGRP), NULL, msm_bus_rescan_store); -+ -+static ssize_t msm_bus_remove_store(struct bus_type *bus, const char *buf, -+ size_t count) -+{ -+ unsigned long val; -+ -+ if (kstrtoul(buf, 0, &val) < 0) -+ return -EINVAL; -+ -+ if (val) { -+ pci_lock_rescan_remove(); -+ msm_pcie_remove_bus(); -+ pci_unlock_rescan_remove(); -+ } -+ return count; -+} -+static BUS_ATTR(rcremove, (S_IWUSR|S_IWGRP), NULL, msm_bus_remove_store); -+ -+static int msm_pcie_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ int rc_idx = -1; -+ int i; -+ -+ pr_debug("%s\n", __func__); -+ -+ mutex_lock(&pcie_drv.drv_lock); -+ -+ ret = of_property_read_u32((&pdev->dev)->of_node, -+ "qcom,ctrl-amt", &pcie_drv.rc_expected); -+ if (ret) { -+ pr_err("PCIe: does not find controller amount.\n"); -+ goto out; -+ } else { -+ if (pcie_drv.rc_expected > MAX_RC_NUM) { -+ pr_debug("Expected number of devices %d\n", -+ pcie_drv.rc_expected); -+ pr_debug("Exceeded max supported devices %d\n", -+ MAX_RC_NUM); -+ goto out; -+ } -+ pr_debug("Target has %d RC(s).\n", pcie_drv.rc_expected); -+ } -+ -+ ret = of_property_read_u32((&pdev->dev)->of_node, -+ "cell-index", &rc_idx); -+ if (ret) { -+ pr_debug("Did not find RC index.\n"); -+ goto out; -+ } else { -+ if (rc_idx >= MAX_RC_NUM) { -+ pr_err( -+ "PCIe: Invalid RC Index %d (max supported = %d)\n", -+ rc_idx, MAX_RC_NUM); -+ goto out; -+ } -+ pcie_drv.rc_num++; -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "PCIe: RC index is %d.\n", -+ rc_idx); -+ } -+ -+ msm_pcie_dev[rc_idx].l1ss_supported = -+ of_property_read_bool((&pdev->dev)->of_node, -+ "qcom,l1ss-supported"); -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "L1ss is %s supported.\n", -+ msm_pcie_dev[rc_idx].l1ss_supported ? "" : "not"); -+ msm_pcie_dev[rc_idx].aux_clk_sync = -+ of_property_read_bool((&pdev->dev)->of_node, -+ "qcom,aux-clk-sync"); -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "AUX clock is %s synchronous to Core clock.\n", -+ msm_pcie_dev[rc_idx].aux_clk_sync ? "" : "not"); -+ -+ msm_pcie_dev[rc_idx].ep_wakeirq = -+ of_property_read_bool((&pdev->dev)->of_node, -+ "qcom,ep-wakeirq"); -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "PCIe: EP of RC%d does %s assert wake when it is up.\n", -+ rc_idx, msm_pcie_dev[rc_idx].ep_wakeirq ? "" : "not"); -+ -+ msm_pcie_dev[rc_idx].n_fts = 0; -+ ret = of_property_read_u32((&pdev->dev)->of_node, -+ "qcom,n-fts", -+ &msm_pcie_dev[rc_idx].n_fts); -+ -+ if (ret) -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "n-fts does not exist. ret=%d\n", ret); -+ else -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "n-fts: 0x%x.\n", -+ msm_pcie_dev[rc_idx].n_fts); -+ -+ msm_pcie_dev[rc_idx].is_emulation = -+ of_property_read_bool((&pdev->dev)->of_node, -+ "qcom,is_emulation"); -+ -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "is_emulation: 0x%x.\n", -+ msm_pcie_dev[rc_idx].is_emulation); -+ -+ msm_pcie_dev[rc_idx].ext_ref_clk = -+ of_property_read_bool((&pdev->dev)->of_node, -+ "qcom,ext-ref-clk"); -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "ref clk is %s.\n", -+ msm_pcie_dev[rc_idx].ext_ref_clk ? "external" : "internal"); -+ -+ msm_pcie_dev[rc_idx].ep_latency = 0; -+ ret = of_property_read_u32((&pdev->dev)->of_node, -+ "qcom,ep-latency", -+ &msm_pcie_dev[rc_idx].ep_latency); -+ if (ret) -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "RC%d: ep-latency does not exist.\n", -+ rc_idx); -+ else -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "RC%d: ep-latency: 0x%x.\n", -+ rc_idx, msm_pcie_dev[rc_idx].ep_latency); -+ -+ msm_pcie_dev[rc_idx].msi_gicm_addr = 0; -+ msm_pcie_dev[rc_idx].msi_gicm_base = 0; -+ ret = of_property_read_u32((&pdev->dev)->of_node, -+ "qcom,msi-gicm-addr", -+ &msm_pcie_dev[rc_idx].msi_gicm_addr); -+ -+ if (ret) { -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "%s", -+ "msi-gicm-addr does not exist.\n"); -+ } else { -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "msi-gicm-addr: 0x%x.\n", -+ msm_pcie_dev[rc_idx].msi_gicm_addr); -+ -+ ret = of_property_read_u32((&pdev->dev)->of_node, -+ "qcom,msi-gicm-base", -+ &msm_pcie_dev[rc_idx].msi_gicm_base); -+ -+ if (ret) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: msi-gicm-base does not exist.\n", -+ rc_idx); -+ goto decrease_rc_num; -+ } else { -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "msi-gicm-base: 0x%x\n", -+ msm_pcie_dev[rc_idx].msi_gicm_base); -+ } -+ } -+ -+ msm_pcie_dev[rc_idx].rc_idx = rc_idx; -+ msm_pcie_dev[rc_idx].pdev = pdev; -+ msm_pcie_dev[rc_idx].vreg_n = 0; -+ msm_pcie_dev[rc_idx].gpio_n = 0; -+ msm_pcie_dev[rc_idx].parf_deemph = 0; -+ msm_pcie_dev[rc_idx].parf_swing = 0; -+ msm_pcie_dev[rc_idx].link_status = MSM_PCIE_LINK_DEINIT; -+ msm_pcie_dev[rc_idx].user_suspend = false; -+ msm_pcie_dev[rc_idx].saved_state = NULL; -+ msm_pcie_dev[rc_idx].enumerated = false; -+ msm_pcie_dev[rc_idx].linkdown_counter = 0; -+ msm_pcie_dev[rc_idx].suspending = false; -+ msm_pcie_dev[rc_idx].wake_counter = 0; -+ msm_pcie_dev[rc_idx].req_exit_l1_counter = 0; -+ msm_pcie_dev[rc_idx].power_on = false; -+ msm_pcie_dev[rc_idx].use_msi = false; -+ memcpy(msm_pcie_dev[rc_idx].vreg, msm_pcie_vreg_info, -+ sizeof(msm_pcie_vreg_info)); -+ memcpy(msm_pcie_dev[rc_idx].gpio, msm_pcie_gpio_info, -+ sizeof(msm_pcie_gpio_info)); -+ memcpy(msm_pcie_dev[rc_idx].clk, msm_pcie_clk_info[rc_idx], -+ sizeof(msm_pcie_clk_info)); -+ -+ memcpy(msm_pcie_dev[rc_idx].rst, msm_pcie_rst_info, -+ sizeof(msm_pcie_rst_info)); -+ memcpy(msm_pcie_dev[rc_idx].res, msm_pcie_res_info, -+ sizeof(msm_pcie_res_info)); -+ memcpy(msm_pcie_dev[rc_idx].irq, msm_pcie_irq_info, -+ sizeof(msm_pcie_irq_info)); -+ msm_pcie_dev[rc_idx].shadow_en = true; -+ for (i = 0; i < PCIE_CONF_SPACE_DW; i++) { -+ msm_pcie_dev[rc_idx].rc_shadow[i] = PCIE_CLEAR; -+ msm_pcie_dev[rc_idx].ep_shadow[i] = PCIE_CLEAR; -+ } -+ -+ ret = msm_pcie_get_resources(&msm_pcie_dev[rc_idx], -+ msm_pcie_dev[rc_idx].pdev); -+ -+ if (ret) -+ goto decrease_rc_num; -+ -+ ret = msm_pcie_gpio_init(&msm_pcie_dev[rc_idx]); -+ if (ret) { -+ msm_pcie_release_resources(&msm_pcie_dev[rc_idx]); -+ goto decrease_rc_num; -+ } -+ -+ /* s/w reset of pcie */ -+ msm_pcie_controller_reset(&msm_pcie_dev[rc_idx]); -+ -+ /* detect uni phy before accessing the pcie registers */ -+ if (msm_pcie_dev[rc_idx].is_emulation && !pcie_phy_detect(&msm_pcie_dev[rc_idx])) { -+ ret = -ENODEV; -+ msm_pcie_release_resources(&msm_pcie_dev[rc_idx]); -+ msm_pcie_gpio_deinit(&msm_pcie_dev[rc_idx]); -+ goto decrease_rc_num; -+ } -+ -+ ret = msm_pcie_irq_init(&msm_pcie_dev[rc_idx]); -+ if (ret) { -+ msm_pcie_release_resources(&msm_pcie_dev[rc_idx]); -+ msm_pcie_gpio_deinit(&msm_pcie_dev[rc_idx]); -+ goto decrease_rc_num; -+ } -+ -+ if (msm_pcie_dev[rc_idx].ep_wakeirq) { -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d will be enumerated upon WAKE signal from Endpoint.\n", -+ rc_idx); -+ mutex_unlock(&pcie_drv.drv_lock); -+ return 0; -+ } -+ -+ ret = msm_pcie_enumerate(rc_idx); -+ -+ if (ret) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d is not enabled during bootup; it will be enumerated upon WAKE signal.\n", -+ rc_idx); -+ goto decrease_rc_num; -+ } else { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], "RC%d is enabled in bootup\n", -+ rc_idx); -+ } -+ -+ PCIE_DBG(&msm_pcie_dev[rc_idx], "PCIE probed %s\n", -+ dev_name(&(pdev->dev))); -+ -+ /* create sysfs files to support power save mode */ -+ if (!rc_idx) { -+ ret = bus_create_file(&pci_bus_type, &bus_attr_rcrescan); -+ if (ret != 0) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "RC%d failed to create sysfs rcrescan file\n", -+ rc_idx); -+ } -+ -+ ret = bus_create_file(&pci_bus_type, &bus_attr_rcremove); -+ if (ret != 0) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "RC%d failed to create sysfs rcremove file\n", -+ rc_idx); -+ } -+ } -+ -+ mutex_unlock(&pcie_drv.drv_lock); -+ return 0; -+ -+decrease_rc_num: -+ pcie_drv.rc_num--; -+out: -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: Driver probe failed for RC%d:%d\n", -+ rc_idx, ret); -+ mutex_unlock(&pcie_drv.drv_lock); -+ -+ return ret; -+} -+ -+static int __exit msm_pcie_remove(struct platform_device *pdev) -+{ -+ int ret = 0; -+ int rc_idx; -+ -+ pr_debug("PCIe:%s.\n", __func__); -+ -+ mutex_lock(&pcie_drv.drv_lock); -+ -+ ret = of_property_read_u32((&pdev->dev)->of_node, -+ "cell-index", &rc_idx); -+ if (ret) { -+ pr_err("%s: Did not find RC index.\n", __func__); -+ goto out; -+ } else { -+ pcie_drv.rc_num--; -+ pr_debug("%s: RC index is 0x%x.", __func__, rc_idx); -+ } -+ -+ msm_pcie_irq_deinit(&msm_pcie_dev[rc_idx]); -+ msm_pcie_vreg_deinit(&msm_pcie_dev[rc_idx]); -+ msm_pcie_clk_deinit(&msm_pcie_dev[rc_idx]); -+ msm_pcie_gpio_deinit(&msm_pcie_dev[rc_idx]); -+ msm_pcie_release_resources(&msm_pcie_dev[rc_idx]); -+ -+out: -+ mutex_unlock(&pcie_drv.drv_lock); -+ -+ return ret; -+} -+ -+static struct of_device_id msm_pcie_match[] = { -+ { .compatible = "qcom,msm_pcie", -+ }, -+ {} -+}; -+ -+static struct platform_driver msm_pcie_driver = { -+ .probe = msm_pcie_probe, -+ .remove = msm_pcie_remove, -+ .driver = { -+ .name = "msm_pcie", -+ .owner = THIS_MODULE, -+ .of_match_table = msm_pcie_match, -+ }, -+}; -+ -+static int __init pcie_init(void) -+{ -+ int ret = 0, i; -+#ifdef CONFIG_IPC_LOGGING -+ char rc_name[MAX_RC_NAME_LEN]; -+#endif -+ -+ pr_debug("pcie:%s.\n", __func__); -+ -+ pcie_drv.rc_num = 0; -+ pcie_drv.rc_expected = 0; -+ mutex_init(&pcie_drv.drv_lock); -+ -+ for (i = 0; i < MAX_RC_NUM; i++) { -+#ifdef CONFIG_IPC_LOGGING -+ snprintf(rc_name, MAX_RC_NAME_LEN, "pcie%d-short", i); -+ msm_pcie_dev[i].ipc_log = -+ ipc_log_context_create(PCIE_LOG_PAGES, rc_name, 0); -+ if (msm_pcie_dev[i].ipc_log == NULL) -+ pr_err("%s: unable to create IPC log context for %s\n", -+ __func__, rc_name); -+ else -+ PCIE_DBG(&msm_pcie_dev[i], -+ "PCIe IPC logging is enable for RC%d\n", -+ i); -+ snprintf(rc_name, MAX_RC_NAME_LEN, "pcie%d-long", i); -+ msm_pcie_dev[i].ipc_log_long = -+ ipc_log_context_create(PCIE_LOG_PAGES, rc_name, 0); -+ if (msm_pcie_dev[i].ipc_log_long == NULL) -+ pr_err("%s: unable to create IPC log context for %s\n", -+ __func__, rc_name); -+ else -+ PCIE_DBG(&msm_pcie_dev[i], -+ "PCIe IPC logging %s is enable for RC%d\n", -+ rc_name, i); -+#endif -+ -+ spin_lock_init(&msm_pcie_dev[i].cfg_lock); -+ msm_pcie_dev[i].cfg_access = true; -+ mutex_init(&msm_pcie_dev[i].setup_lock); -+ mutex_init(&msm_pcie_dev[i].recovery_lock); -+ spin_lock_init(&msm_pcie_dev[i].linkdown_lock); -+ spin_lock_init(&msm_pcie_dev[i].wakeup_lock); -+ } -+ -+ ret = platform_driver_register(&msm_pcie_driver); -+ -+ return ret; -+} -+ -+static void __exit pcie_exit(void) -+{ -+ pr_debug("pcie:%s.\n", __func__); -+ -+ platform_driver_unregister(&msm_pcie_driver); -+} -+ -+subsys_initcall_sync(pcie_init); -+module_exit(pcie_exit); -+ -+ -+/* RC do not represent the right class; set it to PCI_CLASS_BRIDGE_PCI */ -+static void msm_pcie_fixup_early(struct pci_dev *dev) -+{ -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ PCIE_DBG(pcie_dev, "hdr_type %d\n", dev->hdr_type); -+ if (dev->hdr_type == 1) -+ dev->class = (dev->class & 0xff) | (PCI_CLASS_BRIDGE_PCI << 8); -+} -+DECLARE_PCI_FIXUP_EARLY(PCIE_VENDOR_ID_RCP, PCIE_DEVICE_ID_RCP, -+ msm_pcie_fixup_early); -+ -+/* Suspend the PCIe link */ -+static int msm_pcie_pm_suspend(struct pci_dev *dev, -+ void *user, void *data, u32 options) -+{ -+ int ret = 0; -+ u32 val = 0; -+ int ret_l23; -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ -+ pcie_dev->suspending = true; -+ PCIE_DBG(pcie_dev, "RC%d\n", pcie_dev->rc_idx); -+ -+ if (!pcie_dev->power_on) { -+ PCIE_DBG(pcie_dev, -+ "PCIe: power of RC%d has been turned off.\n", -+ pcie_dev->rc_idx); -+ return ret; -+ } -+ -+ if (dev && !(options & MSM_PCIE_CONFIG_NO_CFG_RESTORE) -+ && msm_pcie_confirm_linkup(pcie_dev, true, true)) { -+ ret = pci_save_state(dev); -+ pcie_dev->saved_state = pci_store_saved_state(dev); -+ } -+ if (ret) { -+ PCIE_ERR(pcie_dev, "PCIe: fail to save state of RC%d:%d.\n", -+ pcie_dev->rc_idx, ret); -+ pcie_dev->suspending = false; -+ return ret; -+ } -+ -+ spin_lock_irqsave(&pcie_dev->cfg_lock, -+ pcie_dev->irqsave_flags); -+ pcie_dev->cfg_access = false; -+ spin_unlock_irqrestore(&pcie_dev->cfg_lock, -+ pcie_dev->irqsave_flags); -+ -+ msm_pcie_write_mask(pcie_dev->elbi + PCIE20_ELBI_SYS_CTRL, 0, -+ BIT(4)); -+ -+ PCIE_DBG(pcie_dev, "RC%d: PME_TURNOFF_MSG is sent out\n", -+ pcie_dev->rc_idx); -+ -+ ret_l23 = readl_poll_timeout((pcie_dev->parf -+ + PCIE20_PARF_PM_STTS), val, (val & BIT(6)), 10000, 100000); -+ -+ /* check L23_Ready */ -+ if (!ret_l23) -+ PCIE_DBG(pcie_dev, "RC%d: PM_Enter_L23 is received\n", -+ pcie_dev->rc_idx); -+ else -+ PCIE_DBG(pcie_dev, "RC%d: PM_Enter_L23 is NOT received\n", -+ pcie_dev->rc_idx); -+ -+ msm_pcie_disable(pcie_dev, PM_PIPE_CLK | PM_CLK | PM_VREG); -+ -+ return ret; -+} -+ -+static void msm_pcie_fixup_suspend(struct pci_dev *dev) -+{ -+ int ret; -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ -+ PCIE_DBG(pcie_dev, "RC%d\n", pcie_dev->rc_idx); -+ -+ if (pcie_dev->link_status != MSM_PCIE_LINK_ENABLED) -+ return; -+ -+ mutex_lock(&pcie_dev->recovery_lock); -+ -+ ret = msm_pcie_pm_suspend(dev, NULL, NULL, 0); -+ if (ret) -+ PCIE_ERR(pcie_dev, "PCIe: RC%d got failure in suspend:%d.\n", -+ pcie_dev->rc_idx, ret); -+ -+ mutex_unlock(&pcie_dev->recovery_lock); -+} -+DECLARE_PCI_FIXUP_SUSPEND(PCIE_VENDOR_ID_RCP, PCIE_DEVICE_ID_RCP, -+ msm_pcie_fixup_suspend); -+ -+/* Resume the PCIe link */ -+static int msm_pcie_pm_resume(struct pci_dev *dev, -+ void *user, void *data, u32 options) -+{ -+ int ret; -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ -+ PCIE_DBG(pcie_dev, "RC%d\n", pcie_dev->rc_idx); -+ -+ spin_lock_irqsave(&pcie_dev->cfg_lock, -+ pcie_dev->irqsave_flags); -+ pcie_dev->cfg_access = true; -+ spin_unlock_irqrestore(&pcie_dev->cfg_lock, -+ pcie_dev->irqsave_flags); -+ -+ ret = msm_pcie_enable(pcie_dev, PM_PIPE_CLK | PM_CLK | PM_VREG); -+ if (ret) { -+ PCIE_ERR(pcie_dev, -+ "PCIe: RC%d fail to enable PCIe link in resume.\n", -+ pcie_dev->rc_idx); -+ return ret; -+ } else { -+ pcie_dev->suspending = false; -+ PCIE_DBG(pcie_dev, -+ "dev->bus->number = %d dev->bus->primary = %d\n", -+ dev->bus->number, dev->bus->primary); -+ -+ if (!(options & MSM_PCIE_CONFIG_NO_CFG_RESTORE)) { -+ pci_load_and_free_saved_state(dev, -+ &pcie_dev->saved_state); -+ pci_restore_state(dev); -+ } -+ } -+ -+ return ret; -+} -+ -+void msm_pcie_fixup_resume(struct pci_dev *dev) -+{ -+ int ret; -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ -+ PCIE_DBG(pcie_dev, "RC%d\n", pcie_dev->rc_idx); -+ -+ if ((pcie_dev->link_status != MSM_PCIE_LINK_DISABLED) || -+ pcie_dev->user_suspend) -+ return; -+ -+ mutex_lock(&pcie_dev->recovery_lock); -+ ret = msm_pcie_pm_resume(dev, NULL, NULL, 0); -+ if (ret) -+ PCIE_ERR(pcie_dev, -+ "PCIe: RC%d got failure in fixup resume:%d.\n", -+ pcie_dev->rc_idx, ret); -+ -+ mutex_unlock(&pcie_dev->recovery_lock); -+} -+DECLARE_PCI_FIXUP_RESUME(PCIE_VENDOR_ID_RCP, PCIE_DEVICE_ID_RCP, -+ msm_pcie_fixup_resume); -+ -+void msm_pcie_fixup_resume_early(struct pci_dev *dev) -+{ -+ int ret; -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ -+ PCIE_DBG(pcie_dev, "RC%d\n", pcie_dev->rc_idx); -+ -+ if ((pcie_dev->link_status != MSM_PCIE_LINK_DISABLED) || -+ pcie_dev->user_suspend) -+ return; -+ -+ mutex_lock(&pcie_dev->recovery_lock); -+ ret = msm_pcie_pm_resume(dev, NULL, NULL, 0); -+ if (ret) -+ PCIE_ERR(pcie_dev, "PCIe: RC%d got failure in resume:%d.\n", -+ pcie_dev->rc_idx, ret); -+ -+ mutex_unlock(&pcie_dev->recovery_lock); -+} -+DECLARE_PCI_FIXUP_RESUME_EARLY(PCIE_VENDOR_ID_RCP, PCIE_DEVICE_ID_RCP, -+ msm_pcie_fixup_resume_early); -+ -+static void msm_pcie_fixup_final(struct pci_dev *dev) -+{ -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ PCIE_DBG(pcie_dev, "RC%d\n", pcie_dev->rc_idx); -+ pcie_drv.current_rc++; -+} -+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, msm_pcie_fixup_final); -+ -+int msm_pcie_pm_control(enum msm_pcie_pm_opt pm_opt, u32 busnr, void *user, -+ void *data, u32 options) -+{ -+ int ret = 0; -+ struct pci_dev *dev; -+ u32 rc_idx = 0; -+ -+ pr_debug("PCIe: pm_opt:%d;busnr:%d;options:%d\n", -+ pm_opt, busnr, options); -+ -+ switch (busnr) { -+ case 1: -+ if (user) { -+ struct msm_pcie_dev_t *pcie_dev -+ = PCIE_BUS_PRIV_DATA(((struct pci_dev *)user)); -+ -+ if (pcie_dev) { -+ rc_idx = pcie_dev->rc_idx; -+ PCIE_DBG(pcie_dev, -+ "PCIe: RC%d: pm_opt:%d;busnr:%d;options:%d\n", -+ rc_idx, pm_opt, busnr, options); -+ } else { -+ pr_err( -+ "PCIe: did not find RC for pci endpoint device 0x%x.\n", -+ (u32)user); -+ ret = -ENODEV; -+ goto out; -+ } -+ } -+ break; -+ default: -+ pr_err("PCIe: unsupported bus number.\n"); -+ ret = PCIBIOS_DEVICE_NOT_FOUND; -+ goto out; -+ } -+ -+ dev = msm_pcie_dev[rc_idx].dev; -+ -+ switch (pm_opt) { -+ case MSM_PCIE_SUSPEND: -+ if (msm_pcie_dev[rc_idx].link_status != MSM_PCIE_LINK_ENABLED) -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: requested to suspend when link is not enabled:%d.\n", -+ rc_idx, msm_pcie_dev[rc_idx].link_status); -+ -+ if (!msm_pcie_dev[rc_idx].power_on) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: requested to suspend when link is powered down:%d.\n", -+ rc_idx, msm_pcie_dev[rc_idx].link_status); -+ break; -+ } -+ -+ msm_pcie_dev[rc_idx].user_suspend = true; -+ -+ mutex_lock(&msm_pcie_dev[rc_idx].recovery_lock); -+ -+ ret = msm_pcie_pm_suspend(dev, user, data, options); -+ if (ret) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: user failed to suspend the link.\n", -+ rc_idx); -+ msm_pcie_dev[rc_idx].user_suspend = false; -+ } -+ -+ mutex_unlock(&msm_pcie_dev[rc_idx].recovery_lock); -+ break; -+ case MSM_PCIE_RESUME: -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "User of RC%d requests to resume the link\n", rc_idx); -+ if (msm_pcie_dev[rc_idx].link_status != -+ MSM_PCIE_LINK_DISABLED) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: requested to resume when link is not disabled:%d.\n", -+ rc_idx, msm_pcie_dev[rc_idx].link_status); -+ break; -+ } -+ -+ mutex_lock(&msm_pcie_dev[rc_idx].recovery_lock); -+ ret = msm_pcie_pm_resume(dev, user, data, options); -+ if (ret) { -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: user failed to resume the link.\n", -+ rc_idx); -+ } else { -+ PCIE_DBG(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: user succeeded to resume the link.\n", -+ rc_idx); -+ -+ msm_pcie_dev[rc_idx].user_suspend = false; -+ } -+ -+ mutex_unlock(&msm_pcie_dev[rc_idx].recovery_lock); -+ break; -+ case MSM_PCIE_REQ_EXIT_L1: -+ msm_pcie_dev[rc_idx].req_exit_l1_counter++; -+ msm_pcie_write_mask(msm_pcie_dev[rc_idx].parf -+ + PCIE20_PARF_PM_CTRL, -+ 0, BIT(1)); -+ udelay(REQ_EXIT_L1_DELAY_US); -+ msm_pcie_write_mask(msm_pcie_dev[rc_idx].parf -+ + PCIE20_PARF_PM_CTRL, -+ BIT(1), 0); -+ break; -+ default: -+ PCIE_ERR(&msm_pcie_dev[rc_idx], -+ "PCIe: RC%d: unsupported pm operation:%d.\n", -+ rc_idx, pm_opt); -+ ret = -ENODEV; -+ goto out; -+ } -+ -+out: -+ return ret; -+} -+EXPORT_SYMBOL(msm_pcie_pm_control); -+ -+int msm_pcie_register_event(struct msm_pcie_register_event *reg) -+{ -+ int ret = 0; -+ struct msm_pcie_dev_t *pcie_dev; -+ -+ if (!reg) { -+ pr_err("PCIe: Event registration is NULL\n"); -+ return -ENODEV; -+ } -+ -+ if (!reg->user) { -+ pr_err("PCIe: User of event registration is NULL\n"); -+ return -ENODEV; -+ } -+ -+ pcie_dev = PCIE_BUS_PRIV_DATA(((struct pci_dev *)reg->user)); -+ -+ if (pcie_dev) { -+ pcie_dev->event_reg = reg; -+ PCIE_DBG(pcie_dev, -+ "Event 0x%x is registered for RC %d\n", reg->events, -+ pcie_dev->rc_idx); -+ } else { -+ PCIE_ERR(pcie_dev, -+ "PCIe: did not find RC for pci endpoint device 0x%x.\n", -+ (u32)reg->user); -+ ret = -ENODEV; -+ } -+ -+ return ret; -+} -+EXPORT_SYMBOL(msm_pcie_register_event); -+ -+int msm_pcie_deregister_event(struct msm_pcie_register_event *reg) -+{ -+ int ret = 0; -+ struct msm_pcie_dev_t *pcie_dev; -+ -+ if (!reg) { -+ pr_err("PCIe: Event deregistration is NULL\n"); -+ return -ENODEV; -+ } -+ -+ if (!reg->user) { -+ pr_err("PCIe: User of event deregistration is NULL\n"); -+ return -ENODEV; -+ } -+ -+ pcie_dev = PCIE_BUS_PRIV_DATA(((struct pci_dev *)reg->user)); -+ -+ if (pcie_dev) { -+ pcie_dev->event_reg = NULL; -+ PCIE_DBG(pcie_dev, "Event is deregistered for RC %d\n", -+ pcie_dev->rc_idx); -+ } else { -+ PCIE_ERR(pcie_dev, -+ "PCIe: did not find RC for pci endpoint device 0x%x.\n", -+ (u32)reg->user); -+ ret = -ENODEV; -+ } -+ -+ return ret; -+} -+EXPORT_SYMBOL(msm_pcie_deregister_event); -+ -+int msm_pcie_recover_config(struct pci_dev *dev) -+{ -+ int ret = 0; -+ struct msm_pcie_dev_t *pcie_dev; -+ -+ if (dev) { -+ pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ PCIE_DBG(pcie_dev, -+ "Recovery for the link of RC%d\n", pcie_dev->rc_idx); -+ } else { -+ pr_err("PCIe: the input pci dev is NULL.\n"); -+ return -ENODEV; -+ } -+ -+ if (msm_pcie_confirm_linkup(pcie_dev, true, true)) { -+ PCIE_DBG(pcie_dev, -+ "Recover config space of RC%d and its EP\n", -+ pcie_dev->rc_idx); -+ pcie_dev->shadow_en = false; -+ PCIE_DBG(pcie_dev, "Recover RC%d\n", pcie_dev->rc_idx); -+ msm_pcie_cfg_recover(pcie_dev, true); -+ PCIE_DBG(pcie_dev, "Recover EP of RC%d\n", pcie_dev->rc_idx); -+ msm_pcie_cfg_recover(pcie_dev, false); -+ PCIE_DBG(pcie_dev, -+ "Refreshing the saved config space in PCI framework for RC%d and its EP\n", -+ pcie_dev->rc_idx); -+ pci_save_state(pcie_dev->dev); -+ pci_save_state(dev); -+ pcie_dev->shadow_en = true; -+ PCIE_DBG(pcie_dev, "Turn on shadow for RC%d\n", -+ pcie_dev->rc_idx); -+ } else { -+ PCIE_ERR(pcie_dev, -+ "PCIe: the link of RC%d is not up yet; can't recover config space.\n", -+ pcie_dev->rc_idx); -+ ret = -ENODEV; -+ } -+ -+ return ret; -+} -+EXPORT_SYMBOL(msm_pcie_recover_config); -+ -+int msm_pcie_shadow_control(struct pci_dev *dev, bool enable) -+{ -+ int ret = 0; -+ struct msm_pcie_dev_t *pcie_dev; -+ -+ if (dev) { -+ pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ PCIE_DBG(pcie_dev, -+ "Recovery for the link of RC%d\n", pcie_dev->rc_idx); -+ } else { -+ pr_err("PCIe: the input pci dev is NULL.\n"); -+ return -ENODEV; -+ } -+ -+ PCIE_DBG(pcie_dev, -+ "The shadowing of RC%d is %s enabled currently.\n", -+ pcie_dev->rc_idx, pcie_dev->shadow_en ? "" : "not"); -+ -+ pcie_dev->shadow_en = enable; -+ -+ PCIE_DBG(pcie_dev, -+ "Shadowing of RC%d is turned %s upon user's request.\n", -+ pcie_dev->rc_idx, enable ? "on" : "off"); -+ -+ return ret; -+} -+EXPORT_SYMBOL(msm_pcie_shadow_control); -+ -+int msm_pcie_access_control(struct pci_dev *dev, bool allow_access) -+{ -+ int ret = 0; -+ struct msm_pcie_dev_t *pcie_dev; -+ -+ if (dev) { -+ pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ PCIE_DBG(pcie_dev, -+ "access control for the link of RC%d\n", -+ pcie_dev->rc_idx); -+ } else { -+ pr_err("PCIe: the input pci dev is NULL.\n"); -+ return -ENODEV; -+ } -+ -+ mutex_lock(&pcie_dev->recovery_lock); -+ -+ PCIE_DBG(pcie_dev, -+ "The config space of RC%d is %savailable currently.\n", -+ pcie_dev->rc_idx, pcie_dev->cfg_access ? "" : "un"); -+ -+ pcie_dev->cfg_access = allow_access; -+ -+ PCIE_DBG(pcie_dev, -+ "The config space of RC%d becomes %savailable upon user's request.\n", -+ pcie_dev->rc_idx, pcie_dev->cfg_access ? "" : "un"); -+ -+ mutex_unlock(&pcie_dev->recovery_lock); -+ -+ return ret; -+} -+EXPORT_SYMBOL(msm_pcie_access_control); -diff --git a/arch/arm/mach-qcom/pcie.h b/arch/arm/mach-qcom/pcie.h -new file mode 100644 -index 0000000..94c0417 ---- /dev/null -+++ b/arch/arm/mach-qcom/pcie.h -@@ -0,0 +1,329 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __ARCH_ARM_MACH_MSM_PCIE_H -+#define __ARCH_ARM_MACH_MSM_PCIE_H -+ -+#include -+#include -+#ifdef CONFIG_IPC_LOGGING -+#include -+#endif -+#include -+#include -+#include -+#include -+#include -+ -+#define MSM_PCIE_MAX_VREG 3 -+#define MSM_PCIE_MAX_CLK 3 -+#define MSM_PCIE_MAX_PIPE_CLK 1 -+ -+#define MAX_RC_NUM 1 -+ -+#ifdef CONFIG_ARM_LPAE -+#define PCIE_UPPER_ADDR(addr) ((u32)((addr) >> 32)) -+#else -+#define PCIE_UPPER_ADDR(addr) (0x0) -+#endif -+#define PCIE_LOWER_ADDR(addr) ((u32)((addr) & 0xffffffff)) -+ -+#define PCIE_MSI_NR_IRQS 256 -+ -+#define PCIE_LOG_PAGES (50) -+ -+#ifdef CONFIG_IPC_LOGGING -+ -+#define PCIE_DBG(dev, fmt, arg...) do { \ -+ if ((dev) && (dev)->ipc_log_long) \ -+ ipc_log_string((dev)->ipc_log_long, \ -+ "DBG1:%s: " fmt, __func__, arg); \ -+ if ((dev) && (dev)->ipc_log) \ -+ ipc_log_string((dev)->ipc_log, "%s: " fmt, __func__, arg); \ -+ if (msm_pcie_get_debug_mask()) \ -+ pr_alert("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_DBG2(dev, fmt, arg...) do { \ -+ if ((dev) && (dev)->ipc_log) \ -+ ipc_log_string((dev)->ipc_log, "DBG2:%s: " fmt, __func__, arg);\ -+ if (msm_pcie_get_debug_mask()) \ -+ pr_alert("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_DBG3(dev, fmt, arg...) do { \ -+ if ((dev) && (dev)->ipc_log) \ -+ ipc_log_string((dev)->ipc_log, "DBG3:%s: " fmt, __func__, arg);\ -+ if (msm_pcie_get_debug_mask()) \ -+ pr_alert("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_INFO(dev, fmt, arg...) do { \ -+ if ((dev) && (dev)->ipc_log_long) \ -+ ipc_log_string((dev)->ipc_log_long, \ -+ "INFO:%s: " fmt, __func__, arg); \ -+ if ((dev) && (dev)->ipc_log) \ -+ ipc_log_string((dev)->ipc_log, "%s: " fmt, __func__, arg); \ -+ pr_info("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_ERR(dev, fmt, arg...) do { \ -+ if ((dev) && (dev)->ipc_log_long) \ -+ ipc_log_string((dev)->ipc_log_long, \ -+ "ERR:%s: " fmt, __func__, arg); \ -+ if ((dev) && (dev)->ipc_log) \ -+ ipc_log_string((dev)->ipc_log, "%s: " fmt, __func__, arg); \ -+ pr_err("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#else -+ -+#define PCIE_DBG(dev, fmt, arg...) do { \ -+ if (msm_pcie_get_debug_mask()) \ -+ pr_alert("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_DBG2(dev, fmt, arg...) do { \ -+ if (msm_pcie_get_debug_mask()) \ -+ pr_alert("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_DBG3(dev, fmt, arg...) do { \ -+ if (msm_pcie_get_debug_mask()) \ -+ pr_alert("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_INFO(dev, fmt, arg...) do { \ -+ pr_info("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#define PCIE_ERR(dev, fmt, arg...) do { \ -+ pr_err("%s: " fmt, __func__, arg); \ -+ } while (0) -+ -+#endif -+ -+#define PCIE_BUS_PRIV_DATA(pdev) \ -+ (((struct pci_sys_data *)pdev->bus->sysdata)->private_data) -+ -+/* PM control options */ -+#define PM_IRQ 0x1 -+#define PM_CLK 0x2 -+#define PM_GPIO 0x4 -+#define PM_VREG 0x8 -+#define PM_PIPE_CLK 0x10 -+#define PM_ALL (PM_IRQ | PM_CLK | PM_GPIO | PM_VREG | PM_PIPE_CLK) -+ -+#define PCIE_CONF_SPACE_DW 1024 -+#define PCIE_CLEAR 0xDEADBEEF -+#define PCIE_LINK_DOWN 0xFFFFFFFF -+ -+enum msm_pcie_res { -+ MSM_PCIE_RES_PARF, -+ MSM_PCIE_RES_PHY, -+ MSM_PCIE_RES_DM_CORE, -+ MSM_PCIE_RES_ELBI, -+ MSM_PCIE_RES_CONF, -+ MSM_PCIE_RES_IO, -+ MSM_PCIE_RES_BARS, -+ MSM_PCIE_MAX_RES, -+}; -+ -+enum msm_pcie_rst { -+ MSM_PCIE_AXI_M_ARES, -+ MSM_PCIE_AXI_S_ARES, -+ MSM_PCIE_PIPE_ARES, -+ MSM_PCIE_AXI_M_VMIDMT_ARES, -+ MSM_PCIE_AXI_S_XPU_ARES, -+ MSM_PCIE_PARF_XPU_ARES, -+ MSM_PCIE_PHY_ARES, -+ MSM_PCIE_AXI_M_STICKY_ARES, -+ MSM_PCIE_PIPE_STICKY_ARES, -+ MSM_PCIE_PWR_ARES, -+ MSM_PCIE_AHB_ARES, -+ MSM_PCIE_PHY_AHB_ARES, -+ MSM_PCIE_MAX_RESET, -+}; -+ -+enum msm_pcie_irq { -+ MSM_PCIE_INT_MSI, -+ MSM_PCIE_INT_A, -+ MSM_PCIE_INT_B, -+ MSM_PCIE_INT_C, -+ MSM_PCIE_INT_D, -+ MSM_PCIE_INT_PLS_PME, -+ MSM_PCIE_INT_PME_LEGACY, -+ MSM_PCIE_INT_PLS_ERR, -+ MSM_PCIE_INT_AER_LEGACY, -+ MSM_PCIE_INT_LINK_UP, -+ MSM_PCIE_INT_LINK_DOWN, -+ MSM_PCIE_INT_BRIDGE_FLUSH_N, -+ MSM_PCIE_INT_WAKE, -+ MSM_PCIE_MAX_IRQ, -+}; -+ -+/* gpios */ -+enum msm_pcie_gpio { -+ MSM_PCIE_GPIO_PERST, -+ MSM_PCIE_GPIO_WAKE, -+ MSM_PCIE_GPIO_CLKREQ, -+ MSM_PCIE_MAX_GPIO -+}; -+ -+enum msm_pcie_link_status { -+ MSM_PCIE_LINK_DEINIT, -+ MSM_PCIE_LINK_ENABLED, -+ MSM_PCIE_LINK_DISABLED -+}; -+ -+/* gpio info structure */ -+struct msm_pcie_gpio_info_t { -+ char *name; -+ uint32_t num; -+ bool out; -+ uint32_t on; -+ uint32_t init; -+}; -+ -+/* voltage regulator info structrue */ -+struct msm_pcie_vreg_info_t { -+ struct regulator *hdl; -+ char *name; -+ uint32_t max_v; -+ uint32_t min_v; -+ uint32_t opt_mode; -+ bool required; -+}; -+ -+/* reset info structure */ -+struct msm_pcie_rst_info_t { -+ struct reset_control *hdl; -+ char *name; -+}; -+ -+/* clock info structure */ -+struct msm_pcie_clk_info_t { -+ struct clk *hdl; -+ char *name; -+ u32 freq; -+ bool required; -+}; -+ -+/* resource info structure */ -+struct msm_pcie_res_info_t { -+ char *name; -+ struct resource *resource; -+ void __iomem *base; -+}; -+ -+/* irq info structrue */ -+struct msm_pcie_irq_info_t { -+ char *name; -+ uint32_t num; -+}; -+ -+/* msm pcie device structure */ -+struct msm_pcie_dev_t { -+ struct platform_device *pdev; -+ struct pci_dev *dev; -+ struct msi_controller *msi_chip; -+ struct regulator *gdsc; -+ struct msm_pcie_vreg_info_t vreg[MSM_PCIE_MAX_VREG]; -+ struct msm_pcie_gpio_info_t gpio[MSM_PCIE_MAX_GPIO]; -+ struct msm_pcie_clk_info_t clk[MSM_PCIE_MAX_CLK]; -+ struct msm_pcie_res_info_t res[MSM_PCIE_MAX_RES]; -+ struct msm_pcie_irq_info_t irq[MSM_PCIE_MAX_IRQ]; -+ struct msm_pcie_rst_info_t rst[MSM_PCIE_MAX_RESET]; -+ -+ void __iomem *parf; -+ void __iomem *phy; -+ void __iomem *elbi; -+ void __iomem *dm_core; -+ void __iomem *conf; -+ void __iomem *bars; -+ -+ uint32_t axi_bar_start; -+ uint32_t axi_bar_end; -+ -+ struct resource *dev_mem_res; -+ struct resource *dev_io_res; -+ -+ uint32_t wake_n; -+ uint32_t vreg_n; -+ uint32_t gpio_n; -+ uint32_t parf_deemph; -+ uint32_t parf_swing; -+ -+ bool cfg_access; -+ spinlock_t cfg_lock; -+ unsigned long irqsave_flags; -+ struct mutex setup_lock; -+ -+ struct irq_domain *irq_domain; -+ DECLARE_BITMAP(msi_irq_in_use, PCIE_MSI_NR_IRQS); -+ uint32_t msi_gicm_addr; -+ uint32_t msi_gicm_base; -+ bool use_msi; -+ bool is_emulation; -+ -+ enum msm_pcie_link_status link_status; -+ bool user_suspend; -+ struct pci_saved_state *saved_state; -+ -+ struct wakeup_source ws; -+ struct msm_bus_scale_pdata *bus_scale_table; -+ uint32_t bus_client; -+ -+ bool l1ss_supported; -+ bool aux_clk_sync; -+ uint32_t n_fts; -+ bool ext_ref_clk; -+ uint32_t ep_latency; -+ bool ep_wakeirq; -+ -+ uint32_t rc_idx; -+ bool enumerated; -+ struct work_struct handle_wake_work; -+ struct mutex recovery_lock; -+ spinlock_t linkdown_lock; -+ spinlock_t wakeup_lock; -+ ulong linkdown_counter; -+ bool suspending; -+ ulong wake_counter; -+ ulong req_exit_l1_counter; -+ u32 ep_shadow[PCIE_CONF_SPACE_DW]; -+ u32 rc_shadow[PCIE_CONF_SPACE_DW]; -+ bool shadow_en; -+ struct msm_pcie_register_event *event_reg; -+ bool power_on; -+ void *ipc_log; -+ void *ipc_log_long; -+ struct pci_bus *pci_bus; -+}; -+ -+extern int msm_pcie_enumerate(u32 rc_idx); -+extern int msm_pcie_enable(struct msm_pcie_dev_t *dev, u32 options); -+extern void msm_pcie_disable(struct msm_pcie_dev_t *dev, u32 options); -+extern void msm_pcie_cfg_recover(struct msm_pcie_dev_t *dev, bool rc); -+extern void msm_pcie_config_msi_controller(struct msm_pcie_dev_t *dev); -+extern int32_t msm_pcie_irq_init(struct msm_pcie_dev_t *dev); -+extern void msm_pcie_irq_deinit(struct msm_pcie_dev_t *dev); -+extern int msm_pcie_get_debug_mask(void); -+extern bool msm_pcie_confirm_linkup(struct msm_pcie_dev_t *dev, -+ bool check_sw_stts, bool check_ep); -+ -+extern void pcie_phy_init(struct msm_pcie_dev_t *dev); -+extern bool pcie_phy_is_ready(struct msm_pcie_dev_t *dev); -+extern void pcie20_uni_phy_init(struct msm_pcie_dev_t *dev); -+extern bool pcie_phy_detect(struct msm_pcie_dev_t *dev); -+ -+#endif -diff --git a/arch/arm/mach-qcom/pcie_irq.c b/arch/arm/mach-qcom/pcie_irq.c -new file mode 100644 -index 0000000..ae21d05 ---- /dev/null -+++ b/arch/arm/mach-qcom/pcie_irq.c -@@ -0,0 +1,598 @@ -+/* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+/* -+ * MSM PCIe controller IRQ driver. -+ */ -+ -+#define pr_fmt(fmt) "%s: " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "pcie.h" -+ -+/* Any address will do here, as it won't be dereferenced */ -+#define MSM_PCIE_MSI_PHY 0xa0000000 -+ -+#define PCIE20_MSI_CTRL_ADDR (0x820) -+#define PCIE20_MSI_CTRL_UPPER_ADDR (0x824) -+#define PCIE20_MSI_CTRL_INTR_EN (0x828) -+#define PCIE20_MSI_CTRL_INTR_MASK (0x82C) -+#define PCIE20_MSI_CTRL_INTR_STATUS (0x830) -+ -+#define PCIE20_MSI_CTRL_MAX 8 -+ -+#define LINKDOWN_INIT_WAITING_US_MIN 995 -+#define LINKDOWN_INIT_WAITING_US_MAX 1005 -+#define LINKDOWN_WAITING_US_MIN 4900 -+#define LINKDOWN_WAITING_US_MAX 5100 -+#define LINKDOWN_WAITING_COUNT 200 -+ -+static void msm_pcie_notify_client(struct msm_pcie_dev_t *dev, -+ enum msm_pcie_event event) -+{ -+ if (dev->event_reg && dev->event_reg->callback && -+ (dev->event_reg->events & event)) { -+ struct msm_pcie_notify *notify = &dev->event_reg->notify; -+ notify->event = event; -+ notify->user = dev->event_reg->user; -+ PCIE_DBG(dev, "PCIe: callback RC%d for event %d.\n", -+ dev->rc_idx, event); -+ dev->event_reg->callback(notify); -+ -+ if ((dev->event_reg->options & MSM_PCIE_CONFIG_NO_RECOVERY) && -+ (event == MSM_PCIE_EVENT_LINKDOWN)) { -+ dev->user_suspend = true; -+ PCIE_DBG(dev, -+ "PCIe: Client of RC%d will recover the link later.\n", -+ dev->rc_idx); -+ return; -+ } -+ } else { -+ PCIE_DBG2(dev, -+ "PCIe: Client of RC%d does not have registration for event %d.\n", -+ dev->rc_idx, event); -+ } -+} -+ -+static void handle_wake_func(struct work_struct *work) -+{ -+ int ret; -+ struct msm_pcie_dev_t *dev = container_of(work, struct msm_pcie_dev_t, -+ handle_wake_work); -+ -+ PCIE_DBG(dev, "PCIe: Wake work for RC%d\n", dev->rc_idx); -+ -+ mutex_lock(&dev->recovery_lock); -+ -+ if (!dev->enumerated) { -+ PCIE_DBG(dev, -+ "PCIe: Start enumeration for RC%d upon the wake from endpoint.\n", -+ dev->rc_idx); -+ -+ ret = msm_pcie_enumerate(dev->rc_idx); -+ -+ if (ret) { -+ PCIE_ERR(dev, -+ "PCIe: failed to enable RC%d upon wake request from the device.\n", -+ dev->rc_idx); -+ goto out; -+ } -+ -+ if ((dev->link_status == MSM_PCIE_LINK_ENABLED) && -+ dev->event_reg && dev->event_reg->callback && -+ (dev->event_reg->events & MSM_PCIE_EVENT_LINKUP)) { -+ struct msm_pcie_notify *notify = -+ &dev->event_reg->notify; -+ notify->event = MSM_PCIE_EVENT_LINKUP; -+ notify->user = dev->event_reg->user; -+ PCIE_DBG(dev, -+ "PCIe: Linkup callback for RC%d after enumeration is successful in wake IRQ handling\n", -+ dev->rc_idx); -+ dev->event_reg->callback(notify); -+ } else { -+ PCIE_DBG(dev, -+ "PCIe: Client of RC%d does not have registration for linkup event.\n", -+ dev->rc_idx); -+ } -+ goto out; -+ } else { -+ PCIE_ERR(dev, -+ "PCIe: The enumeration for RC%d has already been done.\n", -+ dev->rc_idx); -+ goto out; -+ } -+ -+out: -+ mutex_unlock(&dev->recovery_lock); -+} -+ -+static irqreturn_t handle_wake_irq(int irq, void *data) -+{ -+ struct msm_pcie_dev_t *dev = data; -+ unsigned long irqsave_flags; -+ -+ spin_lock_irqsave(&dev->wakeup_lock, irqsave_flags); -+ -+ dev->wake_counter++; -+ PCIE_DBG(dev, "PCIe: No. %ld wake IRQ for RC%d\n", -+ dev->wake_counter, dev->rc_idx); -+ -+ PCIE_DBG2(dev, "PCIe WAKE is asserted by Endpoint of RC%d\n", -+ dev->rc_idx); -+ -+ if (!dev->enumerated) { -+ PCIE_DBG(dev, "Start enumeating RC%d\n", dev->rc_idx); -+ schedule_work(&dev->handle_wake_work); -+ } else { -+ PCIE_DBG2(dev, "Wake up RC%d\n", dev->rc_idx); -+ __pm_stay_awake(&dev->ws); -+ __pm_relax(&dev->ws); -+ msm_pcie_notify_client(dev, MSM_PCIE_EVENT_WAKEUP); -+ } -+ -+ spin_unlock_irqrestore(&dev->wakeup_lock, irqsave_flags); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t handle_linkdown_irq(int irq, void *data) -+{ -+ struct msm_pcie_dev_t *dev = data; -+ unsigned long irqsave_flags; -+ -+ spin_lock_irqsave(&dev->linkdown_lock, irqsave_flags); -+ -+ dev->linkdown_counter++; -+ PCIE_DBG(dev, -+ "PCIe: No. %ld linkdown IRQ for RC%d.\n", -+ dev->linkdown_counter, dev->rc_idx); -+ -+ if (!dev->enumerated || dev->link_status != MSM_PCIE_LINK_ENABLED) { -+ PCIE_DBG(dev, -+ "PCIe:Linkdown IRQ for RC%d when the link is not enabled\n", -+ dev->rc_idx); -+ } else if (dev->suspending) { -+ PCIE_DBG(dev, -+ "PCIe:the link of RC%d is suspending.\n", -+ dev->rc_idx); -+ } else { -+ dev->link_status = MSM_PCIE_LINK_DISABLED; -+ dev->shadow_en = false; -+ /* assert PERST */ -+ gpio_set_value(dev->gpio[MSM_PCIE_GPIO_PERST].num, -+ dev->gpio[MSM_PCIE_GPIO_PERST].on); -+ PCIE_ERR(dev, "PCIe link is down for RC%d\n", dev->rc_idx); -+ msm_pcie_notify_client(dev, MSM_PCIE_EVENT_LINKDOWN); -+ } -+ -+ spin_unlock_irqrestore(&dev->linkdown_lock, irqsave_flags); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t handle_msi_irq(int irq, void *data) -+{ -+ int i, j; -+ unsigned long val; -+ struct msm_pcie_dev_t *dev = data; -+ void __iomem *ctrl_status; -+ -+ PCIE_DBG(dev, "irq=%d\n", irq); -+ -+ /* check for set bits, clear it by setting that bit -+ and trigger corresponding irq */ -+ for (i = 0; i < PCIE20_MSI_CTRL_MAX; i++) { -+ ctrl_status = dev->dm_core + -+ PCIE20_MSI_CTRL_INTR_STATUS + (i * 12); -+ -+ val = readl_relaxed(ctrl_status); -+ while (val) { -+ j = find_first_bit(&val, 32); -+ writel_relaxed(BIT(j), ctrl_status); -+ /* ensure that interrupt is cleared (acked) */ -+ wmb(); -+ generic_handle_irq( -+ irq_find_mapping(dev->irq_domain, (j + (32*i))) -+ ); -+ val = readl_relaxed(ctrl_status); -+ } -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+void msm_pcie_config_msi_controller(struct msm_pcie_dev_t *dev) -+{ -+ int i; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ /* program MSI controller and enable all interrupts */ -+ writel_relaxed(MSM_PCIE_MSI_PHY, dev->dm_core + PCIE20_MSI_CTRL_ADDR); -+ writel_relaxed(0, dev->dm_core + PCIE20_MSI_CTRL_UPPER_ADDR); -+ -+ for (i = 0; i < PCIE20_MSI_CTRL_MAX; i++) -+ writel_relaxed(~0, dev->dm_core + -+ PCIE20_MSI_CTRL_INTR_EN + (i * 12)); -+ -+ /* ensure that hardware is configured before proceeding */ -+ wmb(); -+} -+ -+void msm_pcie_destroy_irq(unsigned int irq, struct msm_pcie_dev_t *pcie_dev) -+{ -+ int pos; -+ struct msm_pcie_dev_t *dev; -+ -+ if (pcie_dev) { -+ dev = pcie_dev; -+ } else { -+ dev = irq_get_chip_data(irq); -+ if (!dev) -+ return; -+ } -+ -+ if (dev->msi_gicm_addr) { -+ PCIE_DBG(dev, "destroy QGIC based irq %d\n", irq); -+ pos = irq - dev->msi_gicm_base; -+ } else { -+ PCIE_DBG(dev, "destroy default MSI irq %d\n", irq); -+ pos = irq - irq_find_mapping(dev->irq_domain, 0); -+ } -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ if (!dev->msi_gicm_addr) -+ irq_dispose_mapping(irq); -+ -+ PCIE_DBG(dev, "Before clear_bit pos:%d msi_irq_in_use:%ld\n", -+ pos, *dev->msi_irq_in_use); -+ clear_bit(pos, dev->msi_irq_in_use); -+ PCIE_DBG(dev, "After clear_bit pos:%d msi_irq_in_use:%ld\n", -+ pos, *dev->msi_irq_in_use); -+} -+ -+/* hookup to linux pci msi framework */ -+void msm_pcie_teardown_msi_irq(struct msi_controller *chip, unsigned int irq) -+{ -+ pr_debug("irq %d deallocated\n", irq); -+ msm_pcie_destroy_irq(irq, NULL); -+} -+ -+#if 0 -+void msm_pcie_teardown_msi_irqs(struct pci_dev *dev) -+{ -+ struct msi_desc *entry; -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ -+ PCIE_DBG(pcie_dev, "RC:%d EP: vendor_id:0x%x device_id:0x%x\n", -+ pcie_dev->rc_idx, dev->vendor, dev->device); -+ -+ pcie_dev->use_msi = false; -+ -+ list_for_each_entry(entry, &dev->msi_list, list) { -+ int i, nvec; -+ if (entry->irq == 0) -+ continue; -+ nvec = 1 << entry->msi_attrib.multiple; -+ for (i = 0; i < nvec; i++) -+ msm_pcie_destroy_irq(entry->irq + i, pcie_dev); -+ } -+} -+#endif -+ -+static void msm_pcie_msi_nop(struct irq_data *d) -+{ -+ return; -+} -+ -+static struct irq_chip pcie_msi_chip = { -+ .name = "msm-pcie-msi", -+ .irq_ack = msm_pcie_msi_nop, -+ .irq_enable = unmask_msi_irq, -+ .irq_disable = mask_msi_irq, -+ .irq_mask = mask_msi_irq, -+ .irq_unmask = unmask_msi_irq, -+}; -+ -+static int msm_pcie_create_irq(struct msm_pcie_dev_t *dev) -+{ -+ int irq, pos; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+again: -+ pos = find_first_zero_bit(dev->msi_irq_in_use, PCIE_MSI_NR_IRQS); -+ -+ if (pos >= PCIE_MSI_NR_IRQS) -+ return -ENOSPC; -+ -+ PCIE_DBG(dev, "pos:%d msi_irq_in_use:%ld\n", pos, *dev->msi_irq_in_use); -+ -+ if (test_and_set_bit(pos, dev->msi_irq_in_use)) -+ goto again; -+ else -+ PCIE_DBG(dev, "test_and_set_bit is successful pos=%d\n", pos); -+ -+ irq = irq_create_mapping(dev->irq_domain, pos); -+ if (!irq) -+ return -EINVAL; -+ -+ return irq; -+} -+ -+static int arch_setup_msi_irq_default(struct pci_dev *pdev, -+ struct msi_desc *desc, int nvec) -+{ -+ int irq; -+ struct msi_msg msg; -+ struct msm_pcie_dev_t *dev = PCIE_BUS_PRIV_DATA(pdev); -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ irq = msm_pcie_create_irq(dev); -+ -+ PCIE_DBG(dev, "IRQ %d is allocated.\n", irq); -+ -+ if (irq < 0) -+ return irq; -+ -+ PCIE_DBG(dev, "irq %d allocated\n", irq); -+ -+ irq_set_msi_desc(irq, desc); -+ -+ /* write msi vector and data */ -+ msg.address_hi = 0; -+ msg.address_lo = MSM_PCIE_MSI_PHY; -+ msg.data = irq - irq_find_mapping(dev->irq_domain, 0); -+ write_msi_msg(irq, &msg); -+ -+ return 0; -+} -+ -+static int msm_pcie_create_irq_qgic(struct msm_pcie_dev_t *dev) -+{ -+ int irq, pos; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+again: -+ pos = find_first_zero_bit(dev->msi_irq_in_use, PCIE_MSI_NR_IRQS); -+ -+ if (pos >= PCIE_MSI_NR_IRQS) -+ return -ENOSPC; -+ -+ PCIE_DBG(dev, "pos:%d msi_irq_in_use:%ld\n", pos, *dev->msi_irq_in_use); -+ -+ if (test_and_set_bit(pos, dev->msi_irq_in_use)) -+ goto again; -+ else -+ PCIE_DBG(dev, "test_and_set_bit is successful pos=%d\n", pos); -+ -+ irq = dev->msi_gicm_base + pos; -+ if (!irq) { -+ PCIE_ERR(dev, "PCIe: RC%d failed to create QGIC MSI IRQ.\n", -+ dev->rc_idx); -+ return -EINVAL; -+ } -+ -+ return irq; -+} -+ -+static int arch_setup_msi_irq_qgic(struct pci_dev *pdev, -+ struct msi_desc *desc, int nvec) -+{ -+ int irq, index, firstirq = 0; -+ struct msi_msg msg; -+ struct msm_pcie_dev_t *dev = PCIE_BUS_PRIV_DATA(pdev); -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ for (index = 0; index < nvec; index++) { -+ irq = msm_pcie_create_irq_qgic(dev); -+ PCIE_DBG(dev, "irq %d is allocated\n", irq); -+ -+ if (irq < 0) -+ return irq; -+ -+ if (index == 0) -+ firstirq = irq; -+ -+ irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); -+ } -+ -+ /* write msi vector and data */ -+ irq_set_msi_desc(firstirq, desc); -+ msg.address_hi = 0; -+ msg.address_lo = dev->msi_gicm_addr; -+ msg.data = firstirq; -+ write_msi_msg(firstirq, &msg); -+ -+ return 0; -+} -+ -+int msm_pcie_setup_msi_irq(struct msi_controller *chip, struct pci_dev *pdev, -+ struct msi_desc *desc) -+{ -+ struct msm_pcie_dev_t *dev = PCIE_BUS_PRIV_DATA(pdev); -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ if (dev->msi_gicm_addr) -+ return arch_setup_msi_irq_qgic(pdev, desc, 1); -+ else -+ return arch_setup_msi_irq_default(pdev, desc, 1); -+} -+ -+#if 0 -+static int msm_pcie_get_msi_multiple(int nvec) -+{ -+ int msi_multiple = 0; -+ -+ while (nvec) { -+ nvec = nvec >> 1; -+ msi_multiple++; -+ } -+ pr_debug("log2 number of MSI multiple:%d\n", -+ msi_multiple - 1); -+ -+ return msi_multiple - 1; -+} -+ -+int msm_pcie_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) -+{ -+ struct msi_desc *entry; -+ int ret; -+ struct msm_pcie_dev_t *pcie_dev = PCIE_BUS_PRIV_DATA(dev); -+ -+ PCIE_DBG(pcie_dev, "RC%d\n", pcie_dev->rc_idx); -+ -+ if (type != PCI_CAP_ID_MSI || nvec > 32) -+ return -ENOSPC; -+ -+ PCIE_DBG(pcie_dev, "nvec = %d\n", nvec); -+ -+ list_for_each_entry(entry, &dev->msi_list, list) { -+ entry->msi_attrib.multiple = -+ msm_pcie_get_msi_multiple(nvec); -+ -+ if (pcie_dev->msi_gicm_addr) -+ ret = arch_setup_msi_irq_qgic(dev, entry, nvec); -+ else -+ ret = arch_setup_msi_irq_default(dev, entry, nvec); -+ -+ PCIE_DBG(pcie_dev, "ret from msi_irq: %d\n", ret); -+ -+ if (ret < 0) -+ return ret; -+ if (ret > 0) -+ return -ENOSPC; -+ } -+ -+ pcie_dev->use_msi = true; -+ -+ return 0; -+} -+#endif -+ -+static int msm_pcie_msi_map(struct irq_domain *domain, unsigned int irq, -+ irq_hw_number_t hwirq) -+{ -+ irq_set_chip_and_handler (irq, &pcie_msi_chip, handle_simple_irq); -+ irq_set_chip_data(irq, domain->host_data); -+ //set_irq_flags(irq, IRQF_VALID); -+ return 0; -+} -+ -+static const struct irq_domain_ops msm_pcie_msi_ops = { -+ .map = msm_pcie_msi_map, -+}; -+ -+int32_t msm_pcie_irq_init(struct msm_pcie_dev_t *dev) -+{ -+ int rc; -+ int msi_start = 0; -+ struct device *pdev = &dev->pdev->dev; -+ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ dev->msi_chip = kzalloc(sizeof(struct msi_controller), GFP_KERNEL); -+ if (!dev->msi_chip) -+ return -ENOMEM; -+ -+ dev->msi_chip->setup_irq = msm_pcie_setup_msi_irq; -+ dev->msi_chip->teardown_irq = msm_pcie_teardown_msi_irq; -+ -+ if (dev->ep_wakeirq) -+ wakeup_source_init(&dev->ws, "pcie_wakeup_source"); -+ -+ /* register handler for linkdown interrupt */ -+ rc = devm_request_irq(pdev, -+ dev->irq[MSM_PCIE_INT_LINK_DOWN].num, handle_linkdown_irq, -+ IRQF_TRIGGER_RISING, dev->irq[MSM_PCIE_INT_LINK_DOWN].name, -+ dev); -+ if (rc) { -+ PCIE_ERR(dev, "PCIe: Unable to request linkdown interrupt:%d\n", -+ dev->irq[MSM_PCIE_INT_LINK_DOWN].num); -+ return rc; -+ } -+ -+ /* register handler for physical MSI interrupt line */ -+ rc = devm_request_irq(pdev, -+ dev->irq[MSM_PCIE_INT_MSI].num, handle_msi_irq, -+ IRQF_TRIGGER_RISING, dev->irq[MSM_PCIE_INT_MSI].name, dev); -+ if (rc) { -+ PCIE_ERR(dev, "PCIe: RC%d: Unable to request MSI interrupt\n", -+ dev->rc_idx); -+ return rc; -+ } -+ -+ if (dev->ep_wakeirq) { -+ /* register handler for PCIE_WAKE_N interrupt line */ -+ rc = devm_request_irq(pdev, -+ dev->wake_n, handle_wake_irq, IRQF_TRIGGER_FALLING, -+ "msm_pcie_wake", dev); -+ if (rc) { -+ PCIE_ERR(dev, "PCIe: RC%d: Unable to request wake interrupt\n", -+ dev->rc_idx); -+ return rc; -+ } -+ -+ INIT_WORK(&dev->handle_wake_work, handle_wake_func); -+ -+ rc = enable_irq_wake(dev->wake_n); -+ if (rc) { -+ PCIE_ERR(dev, "PCIe: RC%d: Unable to enable wake interrupt\n", -+ dev->rc_idx); -+ return rc; -+ } -+ } -+ -+ /* Create a virtual domain of interrupts */ -+ if (!dev->msi_gicm_addr) { -+ dev->irq_domain = irq_domain_add_linear(dev->pdev->dev.of_node, -+ PCIE_MSI_NR_IRQS, &msm_pcie_msi_ops, dev); -+ -+ if (!dev->irq_domain) { -+ PCIE_ERR(dev, -+ "PCIe: RC%d: Unable to initialize irq domain\n", -+ dev->rc_idx); -+ disable_irq(dev->wake_n); -+ return PTR_ERR(dev->irq_domain); -+ } -+ -+ msi_start = irq_create_mapping(dev->irq_domain, 0); -+ } -+ -+ return 0; -+} -+ -+void msm_pcie_irq_deinit(struct msm_pcie_dev_t *dev) -+{ -+ PCIE_DBG(dev, "RC%d\n", dev->rc_idx); -+ -+ kfree(dev->msi_chip); -+ -+ if (dev->ep_wakeirq) { -+ wakeup_source_trash(&dev->ws); -+ disable_irq(dev->wake_n); -+ } -+} -diff --git a/arch/arm/mach-qcom/pcie_phy.c b/arch/arm/mach-qcom/pcie_phy.c -new file mode 100644 -index 0000000..32f3c79 ---- /dev/null -+++ b/arch/arm/mach-qcom/pcie_phy.c -@@ -0,0 +1,403 @@ -+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+/* -+ * MSM PCIe PHY driver. -+ */ -+ -+#include -+#include -+#include "pcie.h" -+#include "pcie_phy.h" -+ -+#define MDIO_CTRL_0_REG 0x40 -+#define MDIO_CTRL_1_REG 0x44 -+#define MDIO_CTRL_2_REG 0x48 -+#define MDIO_CTRL_3_REG 0x4C -+#define MDIO_CTRL_4_REG 0x50 -+ -+#define MDIO_PCIE_PHY_ID (0x5 << 13) -+#define MDC_MODE (0x1 << 12) -+#define MDIO_CLAUSE_22 (0x0 << 8) -+#define MDIO_CLAUSE_45 (0x1 << 8) -+#define MDIO_PCIE_CLK_DIV (0xF) -+#define MDIO_MMD_ID (0x1) -+ -+#define MDIO_ACCESS_BUSY (0x1 << 16) -+#define MDIO_ACCESS_START (0x1 << 8) -+#define MDIO_TIMEOUT_STATIC 1000 -+ -+#define MDIO_ACCESS_22_WRITE (0x1) -+#define MDIO_ACCESS_22_READ (0x0) -+#define MDIO_ACCESS_45_WRITE (0x2) -+#define MDIO_ACCESS_45_READ (0x1) -+#define MDIO_ACCESS_45_READ_ADDR (0x0) -+ -+static inline void write_phy(void *base, u32 offset, u32 value) -+{ -+ writel_relaxed(value, base + offset); -+ wmb(); -+} -+ -+#ifndef CONFIG_ARCH_MDM9630 -+static inline void pcie20_phy_init_default(struct msm_pcie_dev_t *dev) -+{ -+ -+ PCIE_DBG(dev, "RC%d: Initializing 28nm QMP phy - 19.2MHz\n", -+ dev->rc_idx); -+ -+ write_phy(dev->phy, PCIE_PHY_POWER_DOWN_CONTROL, 0x03); -+ write_phy(dev->phy, QSERDES_COM_SYSCLK_EN_SEL, 0x08); -+ write_phy(dev->phy, QSERDES_COM_DEC_START1, 0x82); -+ write_phy(dev->phy, QSERDES_COM_DEC_START2, 0x03); -+ write_phy(dev->phy, QSERDES_COM_DIV_FRAC_START1, 0xd5); -+ write_phy(dev->phy, QSERDES_COM_DIV_FRAC_START2, 0xaa); -+ write_phy(dev->phy, QSERDES_COM_DIV_FRAC_START3, 0x13); -+ write_phy(dev->phy, QSERDES_COM_PLLLOCK_CMP_EN, 0x01); -+ write_phy(dev->phy, QSERDES_COM_PLLLOCK_CMP1, 0x2b); -+ write_phy(dev->phy, QSERDES_COM_PLLLOCK_CMP2, 0x68); -+ write_phy(dev->phy, QSERDES_COM_PLL_CRCTRL, 0xff); -+ write_phy(dev->phy, QSERDES_COM_PLL_CP_SETI, 0x3f); -+ write_phy(dev->phy, QSERDES_COM_PLL_IP_SETP, 0x07); -+ write_phy(dev->phy, QSERDES_COM_PLL_CP_SETP, 0x03); -+ write_phy(dev->phy, QSERDES_RX_CDR_CONTROL, 0xf3); -+ write_phy(dev->phy, QSERDES_RX_CDR_CONTROL2, 0x6b); -+ write_phy(dev->phy, QSERDES_COM_RESETSM_CNTRL, 0x10); -+ write_phy(dev->phy, QSERDES_RX_RX_TERM_HIGHZ_CM_AC_COUPLE, 0x87); -+ write_phy(dev->phy, QSERDES_RX_RX_EQ_GAIN12, 0x54); -+ write_phy(dev->phy, PCIE_PHY_POWER_STATE_CONFIG1, 0xa3); -+ write_phy(dev->phy, PCIE_PHY_POWER_STATE_CONFIG2, 0xcb); -+ write_phy(dev->phy, QSERDES_COM_PLL_RXTXEPCLK_EN, 0x10); -+ write_phy(dev->phy, PCIE_PHY_ENDPOINT_REFCLK_DRIVE, 0x10); -+ write_phy(dev->phy, PCIE_PHY_SW_RESET, 0x00); -+ write_phy(dev->phy, PCIE_PHY_START, 0x03); -+} -+#endif -+ -+#ifdef CONFIG_ARCH_MDM9630 -+void pcie_phy_init(struct msm_pcie_dev_t *dev) -+{ -+ -+ PCIE_DBG(dev, "RC%d: Initializing 28nm QMP phy - 19.2MHz\n", -+ dev->rc_idx); -+ -+ write_phy(dev->phy, PCIE_PHY_POWER_DOWN_CONTROL, 0x03); -+ -+ write_phy(dev->phy, QSERDES_COM_SYSCLK_EN_SEL_TXBAND, 0x08); -+ write_phy(dev->phy, QSERDES_COM_DEC_START1, 0x82); -+ write_phy(dev->phy, QSERDES_COM_DEC_START2, 0x03); -+ write_phy(dev->phy, QSERDES_COM_DIV_FRAC_START1, 0xD5); -+ write_phy(dev->phy, QSERDES_COM_DIV_FRAC_START2, 0xAA); -+ write_phy(dev->phy, QSERDES_COM_DIV_FRAC_START3, 0x4D); -+ write_phy(dev->phy, QSERDES_COM_PLLLOCK_CMP_EN, 0x01); -+ write_phy(dev->phy, QSERDES_COM_PLLLOCK_CMP1, 0x2B); -+ write_phy(dev->phy, QSERDES_COM_PLLLOCK_CMP2, 0x68); -+ write_phy(dev->phy, QSERDES_COM_PLL_CRCTRL, 0x7C); -+ write_phy(dev->phy, QSERDES_COM_PLL_CP_SETI, 0x02); -+ write_phy(dev->phy, QSERDES_COM_PLL_IP_SETP, 0x1F); -+ write_phy(dev->phy, QSERDES_COM_PLL_CP_SETP, 0x0F); -+ write_phy(dev->phy, QSERDES_COM_PLL_IP_SETI, 0x01); -+ write_phy(dev->phy, QSERDES_COM_IE_TRIM, 0x0F); -+ write_phy(dev->phy, QSERDES_COM_IP_TRIM, 0x0F); -+ write_phy(dev->phy, QSERDES_COM_PLL_CNTRL, 0x46); -+ -+ /* CDR Settings */ -+ write_phy(dev->phy, QSERDES_RX_CDR_CONTROL1, 0xF3); -+ write_phy(dev->phy, QSERDES_RX_CDR_CONTROL_HALF, 0x2B); -+ -+ write_phy(dev->phy, QSERDES_COM_PLL_VCOTAIL_EN, 0xE1); -+ -+ /* Calibration Settings */ -+ write_phy(dev->phy, QSERDES_COM_RESETSM_CNTRL, 0x90); -+ write_phy(dev->phy, QSERDES_COM_RESETSM_CNTRL2, 0x7); -+ -+ /* Additional writes */ -+ write_phy(dev->phy, QSERDES_COM_RES_CODE_START_SEG1, 0x20); -+ write_phy(dev->phy, QSERDES_COM_RES_CODE_CAL_CSR, 0x77); -+ write_phy(dev->phy, QSERDES_COM_RES_TRIM_CONTROL, 0x15); -+ write_phy(dev->phy, QSERDES_TX_RCV_DETECT_LVL, 0x03); -+ write_phy(dev->phy, QSERDES_RX_RX_EQ_GAIN1_LSB, 0xFF); -+ write_phy(dev->phy, QSERDES_RX_RX_EQ_GAIN1_MSB, 0x1F); -+ write_phy(dev->phy, QSERDES_RX_RX_EQ_GAIN2_LSB, 0xFF); -+ write_phy(dev->phy, QSERDES_RX_RX_EQ_GAIN2_MSB, 0x00); -+ write_phy(dev->phy, QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2, 0x1A); -+ write_phy(dev->phy, QSERDES_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x80); -+ write_phy(dev->phy, QSERDES_RX_SIGDET_ENABLES, 0x40); -+ write_phy(dev->phy, QSERDES_RX_SIGDET_CNTRL, 0x70); -+ write_phy(dev->phy, QSERDES_RX_SIGDET_DEGLITCH_CNTRL, 0x06); -+ write_phy(dev->phy, QSERDES_COM_PLL_RXTXEPCLK_EN, 0x10); -+ write_phy(dev->phy, PCIE_PHY_ENDPOINT_REFCLK_DRIVE, 0x10); -+ write_phy(dev->phy, PCIE_PHY_POWER_STATE_CONFIG1, 0x23); -+ write_phy(dev->phy, PCIE_PHY_POWER_STATE_CONFIG2, 0xCB); -+ write_phy(dev->phy, QSERDES_RX_RX_RCVR_IQ_EN, 0x31); -+ -+ write_phy(dev->phy, PCIE_PHY_SW_RESET, 0x00); -+ write_phy(dev->phy, PCIE_PHY_START, 0x03); -+} -+#elif defined(CONFIG_ARCH_FSM9900) -+void pcie_phy_init(struct msm_pcie_dev_t *dev) -+{ -+ if (dev->ext_ref_clk == false) { -+ pcie20_phy_init_default(dev); -+ return; -+ } -+ -+ PCIE_DBG(dev, "RC%d: Initializing 28nm ATE phy - 100MHz\n", -+ dev->rc_idx); -+ -+ /* 1 */ -+ write_phy(dev->phy, PCIE_PHY_POWER_DOWN_CONTROL, 0x01); -+ /* 2 */ -+ write_phy(dev->phy, QSERDES_COM_SYS_CLK_CTRL, 0x3e); -+ /* 3 */ -+ write_phy(dev->phy, QSERDES_COM_PLL_CP_SETI, 0x0f); -+ /* 4 */ -+ write_phy(dev->phy, QSERDES_COM_PLL_IP_SETP, 0x23); -+ /* 5 */ -+ write_phy(dev->phy, QSERDES_COM_PLL_IP_SETI, 0x3f); -+ /* 6 */ -+ write_phy(dev->phy, QSERDES_RX_CDR_CONTROL, 0xf3); -+ /* 7 */ -+ write_phy(dev->phy, QSERDES_RX_CDR_CONTROL2, 0x6b); -+ /* 8 */ -+ write_phy(dev->phy, QSERDES_COM_RESETSM_CNTRL, 0x10); -+ /* 9 */ -+ write_phy(dev->phy, QSERDES_RX_RX_TERM_HIGHZ_CM_AC_COUPLE, 0x87); -+ /* 10 */ -+ write_phy(dev->phy, QSERDES_RX_RX_EQ_GAIN12, 0x54); -+ /* 11 */ -+ write_phy(dev->phy, PCIE_PHY_POWER_STATE_CONFIG1, 0xa3); -+ /* 12 */ -+ write_phy(dev->phy, PCIE_PHY_POWER_STATE_CONFIG2, 0x1b); -+ /* 13 */ -+ write_phy(dev->phy, PCIE_PHY_SW_RESET, 0x00); -+ /* 14 */ -+ write_phy(dev->phy, PCIE_PHY_START, 0x03); -+} -+#else -+void pcie_phy_init(struct msm_pcie_dev_t *dev) -+{ -+ if (dev->is_emulation) -+ pcie20_uni_phy_init(dev); -+ else -+ pcie20_phy_init_default(dev); -+} -+ -+#endif -+ -+bool pcie_phy_is_ready(struct msm_pcie_dev_t *dev) -+{ -+ if (!dev->is_emulation && -+ readl_relaxed(dev->phy + PCIE_PHY_PCS_STATUS) & BIT(6)) -+ return false; -+ else -+ return true; -+} -+/** -+ * Write register -+ * -+ * @base - PHY base virtual address. -+ * @offset - register offset. -+ */ -+static u32 qca_uni_phy_read(void __iomem *base, u32 offset) -+{ -+ u32 value; -+ value = readl_relaxed(base + offset); -+ return value; -+} -+ -+/** -+ * Write register -+ * @base - PHY base virtual address. -+ * @offset - register offset. -+ * @val - value to write. -+ */ -+static void qca_uni_phy_write(void __iomem *base, u32 offset, u32 val) -+{ -+ writel(val, base + offset); -+ udelay(100); -+} -+ -+static int mdio_wait(void __iomem *base) -+{ -+ unsigned int mdio_access; -+ unsigned int timeout = MDIO_TIMEOUT_STATIC; -+ -+ do { -+ mdio_access = qca_uni_phy_read(base, MDIO_CTRL_4_REG); -+ if (!timeout--) -+ return -EFAULT; -+ } while (mdio_access & MDIO_ACCESS_BUSY); -+ -+ return 0; -+} -+ -+static int mdio_mii_read(void __iomem *base, unsigned char regAddr, -+ unsigned short *data) -+{ -+ unsigned short mdio_ctl_0 = (MDIO_PCIE_PHY_ID | MDC_MODE | -+ MDIO_CLAUSE_22 | MDIO_PCIE_CLK_DIV); -+ unsigned int regVal; -+ -+ qca_uni_phy_write(base, MDIO_CTRL_0_REG, mdio_ctl_0); -+ qca_uni_phy_write(base, MDIO_CTRL_1_REG, regAddr); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_22_READ); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_22_READ | -+ MDIO_ACCESS_START); -+ -+ /* wait for access busy to be cleared */ -+ if (mdio_wait(base)) { -+ pr_err("%s MDIO Access Busy Timeout %x\n", __func__, regAddr); -+ return -EFAULT; -+ } -+ -+ regVal = qca_uni_phy_read(base, MDIO_CTRL_3_REG); -+ *data = (unsigned short)regVal; -+ return 0; -+} -+ -+static int mdio_mii_write(void __iomem *base, unsigned char regAddr, -+ unsigned short data) -+{ -+ unsigned short mdio_ctl_0 = (MDIO_PCIE_PHY_ID | MDC_MODE | -+ MDIO_CLAUSE_22 | MDIO_PCIE_CLK_DIV); -+ -+ qca_uni_phy_write(base, MDIO_CTRL_0_REG, mdio_ctl_0); -+ qca_uni_phy_write(base, MDIO_CTRL_1_REG, regAddr); -+ qca_uni_phy_write(base, MDIO_CTRL_2_REG, data); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_22_WRITE); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_22_WRITE | -+ MDIO_ACCESS_START); -+ -+ /* wait for access busy to be cleared */ -+ if (mdio_wait(base)) { -+ pr_err("%s MDIO Access Busy Timeout %x\n", __func__, regAddr); -+ return -EFAULT; -+ } -+ -+ return 0; -+} -+ -+static int mdio_mmd_read(void __iomem *base, unsigned short regAddr, -+ unsigned short *data) -+{ -+ unsigned short mdio_ctl_0 = (MDIO_PCIE_PHY_ID | MDC_MODE | -+ MDIO_CLAUSE_45 | MDIO_PCIE_CLK_DIV); -+ unsigned int regVal; -+ -+ qca_uni_phy_write(base, MDIO_CTRL_0_REG, mdio_ctl_0); -+ qca_uni_phy_write(base, MDIO_CTRL_1_REG, MDIO_MMD_ID); -+ qca_uni_phy_write(base, MDIO_CTRL_2_REG, regAddr); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_READ_ADDR); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_READ_ADDR | -+ MDIO_ACCESS_START); -+ -+ /* wait for access busy to be cleared */ -+ if (mdio_wait(base)) { -+ pr_err("%s MDIO Access Busy Timeout %x\n", __func__, regAddr); -+ return -EFAULT; -+ } -+ -+ qca_uni_phy_write(base, MDIO_CTRL_1_REG, MDIO_MMD_ID); -+ qca_uni_phy_write(base, MDIO_CTRL_2_REG, regAddr); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_WRITE); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_WRITE | -+ MDIO_ACCESS_START); -+ -+ /* wait for access busy to be cleared */ -+ if (mdio_wait(base)) { -+ pr_err("%s MDIO Access Busy Timeout %x\n", __func__, regAddr); -+ return -EFAULT; -+ } -+ -+ regVal = qca_uni_phy_read(base, MDIO_CTRL_3_REG); -+ *data = (unsigned short)regVal; -+ -+ return 0; -+} -+ -+static int mdio_mmd_write(void __iomem *base, unsigned short regAddr, -+ unsigned short data) -+{ -+ -+ unsigned short mdio_ctl_0 = (MDIO_PCIE_PHY_ID | MDC_MODE | -+ MDIO_CLAUSE_45 | MDIO_PCIE_CLK_DIV); -+ -+ qca_uni_phy_write(base, MDIO_CTRL_0_REG, mdio_ctl_0); -+ qca_uni_phy_write(base, MDIO_CTRL_1_REG, MDIO_MMD_ID); -+ qca_uni_phy_write(base, MDIO_CTRL_2_REG, regAddr); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_READ_ADDR); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_READ_ADDR | -+ MDIO_ACCESS_START); -+ -+ /* wait for access busy to be cleared */ -+ if (mdio_wait(base)) { -+ pr_err("%s MDIO Access Busy Timeout %x\n", __func__, regAddr); -+ return -EFAULT; -+ } -+ -+ qca_uni_phy_write(base, MDIO_CTRL_2_REG, data); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_READ); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_READ | -+ MDIO_ACCESS_START); -+ -+ qca_uni_phy_write(base, MDIO_CTRL_2_REG, regAddr); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_WRITE); -+ qca_uni_phy_write(base, MDIO_CTRL_4_REG, MDIO_ACCESS_45_WRITE | -+ MDIO_ACCESS_START); -+ -+ /* wait for access busy to be cleared */ -+ if (mdio_wait(base)) { -+ pr_err("%s MDIO Access Busy Timeout %x\n", __func__, regAddr); -+ return -EFAULT; -+ } -+ -+ return 0; -+} -+ -+void pcie20_uni_phy_init(struct msm_pcie_dev_t *dev) -+{ -+ unsigned short data; -+ -+ mdio_mii_write(dev->phy, 0x1, 0x801c); -+ mdio_mii_write(dev->phy, 0xb, 0x300d); -+ -+ mdio_mmd_write(dev->phy, 0x2d, 0x681a); -+ mdio_mmd_write(dev->phy, 0x7d, 0x8); -+ mdio_mmd_write(dev->phy, 0x7f, 0x5ed5); -+ mdio_mmd_write(dev->phy, 0x87, 0xaa0a); -+ mdio_mmd_write(dev->phy, 0x4, 0x0802); -+ mdio_mmd_write(dev->phy, 0x8, 0x0280); -+ mdio_mmd_write(dev->phy, 0x9, 0x8854); -+ mdio_mmd_write(dev->phy, 0xa, 0x2815); -+ mdio_mmd_write(dev->phy, 0xb, 0x0120); -+ mdio_mmd_write(dev->phy, 0xc, 0x0480); -+ mdio_mmd_write(dev->phy, 0x13, 0x8000); -+ -+ mdio_mmd_read(dev->phy, 0x7e, &data); -+ -+ mdio_mii_read(dev->phy, 0x7, &data); -+} -+ -+bool pcie_phy_detect(struct msm_pcie_dev_t *dev) -+{ -+ unsigned short data; -+ -+ mdio_mii_read(dev->phy, 0x0, &data); -+ -+ if (data == 0x7f) { -+ pr_info("PCIe UNI PHY detected\n"); -+ return true; -+ } else { -+ return false; -+ } -+} -diff --git a/arch/arm/mach-qcom/pcie_phy.h b/arch/arm/mach-qcom/pcie_phy.h -new file mode 100644 -index 0000000..99297c3 ---- /dev/null -+++ b/arch/arm/mach-qcom/pcie_phy.h -@@ -0,0 +1,545 @@ -+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __ARCH_ARM_MACH_MSM_PCIE_PHY_H -+#define __ARCH_ARM_MACH_MSM_PCIE_PHY_H -+ -+#ifdef CONFIG_ARCH_MDM9630 -+#define QSERDES_COM_SYS_CLK_CTRL 0x000 -+#define QSERDES_COM_PLL_VCOTAIL_EN 0x004 -+#define QSERDES_COM_CMN_MODE 0x008 -+#define QSERDES_COM_IE_TRIM 0x00C -+#define QSERDES_COM_IP_TRIM 0x010 -+#define QSERDES_COM_PLL_CNTRL 0x014 -+#define QSERDES_COM_PLL_PHSEL_CONTROL 0x018 -+#define QSERDES_COM_IPTAT_TRIM_VCCA_TX_SEL 0x01C -+#define QSERDES_COM_PLL_PHSEL_DC 0x020 -+#define QSERDES_COM_PLL_IP_SETI 0x024 -+#define QSERDES_COM_CORE_CLK_IN_SYNC_SEL 0x028 -+#define QSERDES_COM_PLL_BKG_KVCO_CAL_EN 0x02C -+#define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x030 -+#define QSERDES_COM_PLL_CP_SETI 0x034 -+#define QSERDES_COM_PLL_IP_SETP 0x038 -+#define QSERDES_COM_PLL_CP_SETP 0x03C -+#define QSERDES_COM_ATB_SEL1 0x040 -+#define QSERDES_COM_ATB_SEL2 0x044 -+#define QSERDES_COM_SYSCLK_EN_SEL_TXBAND 0x048 -+#define QSERDES_COM_RESETSM_CNTRL 0x04C -+#define QSERDES_COM_RESETSM_CNTRL2 0x050 -+#define QSERDES_COM_RESETSM_CNTRL3 0x054 -+#define QSERDES_COM_DIV_REF1 0x058 -+#define QSERDES_COM_DIV_REF2 0x05C -+#define QSERDES_COM_KVCO_COUNT1 0x060 -+#define QSERDES_COM_KVCO_COUNT2 0x064 -+#define QSERDES_COM_KVCO_CAL_CNTRL 0x068 -+#define QSERDES_COM_KVCO_CODE 0x06C -+#define QSERDES_COM_VREF_CFG1 0x070 -+#define QSERDES_COM_VREF_CFG2 0x074 -+#define QSERDES_COM_VREF_CFG3 0x078 -+#define QSERDES_COM_VREF_CFG4 0x07C -+#define QSERDES_COM_VREF_CFG5 0x080 -+#define QSERDES_COM_VREF_CFG6 0x084 -+#define QSERDES_COM_PLLLOCK_CMP1 0x088 -+#define QSERDES_COM_PLLLOCK_CMP2 0x08C -+#define QSERDES_COM_PLLLOCK_CMP3 0x090 -+#define QSERDES_COM_PLLLOCK_CMP_EN 0x094 -+#define QSERDES_COM_BGTC 0x098 -+#define QSERDES_COM_PLL_TEST_UPDN 0x09C -+#define QSERDES_COM_PLL_VCO_TUNE 0x0A0 -+#define QSERDES_COM_DEC_START1 0x0A4 -+#define QSERDES_COM_PLL_AMP_OS 0x0A8 -+#define QSERDES_COM_SSC_EN_CENTER 0x0AC -+#define QSERDES_COM_SSC_ADJ_PER1 0x0B0 -+#define QSERDES_COM_SSC_ADJ_PER2 0x0B4 -+#define QSERDES_COM_SSC_PER1 0x0B8 -+#define QSERDES_COM_SSC_PER2 0x0BC -+#define QSERDES_COM_SSC_STEP_SIZE1 0x0C0 -+#define QSERDES_COM_SSC_STEP_SIZE2 0x0C4 -+#define QSERDES_COM_RES_CODE_UP 0x0C8 -+#define QSERDES_COM_RES_CODE_DN 0x0CC -+#define QSERDES_COM_RES_CODE_UP_OFFSET 0x0D0 -+#define QSERDES_COM_RES_CODE_DN_OFFSET 0x0D4 -+#define QSERDES_COM_RES_CODE_START_SEG1 0x0D8 -+#define QSERDES_COM_RES_CODE_START_SEG2 0x0DC -+#define QSERDES_COM_RES_CODE_CAL_CSR 0x0E0 -+#define QSERDES_COM_RES_CODE 0x0E4 -+#define QSERDES_COM_RES_TRIM_CONTROL 0x0E8 -+#define QSERDES_COM_RES_TRIM_CONTROL2 0x0EC -+#define QSERDES_COM_RES_TRIM_EN_VCOCALDONE 0x0F0 -+#define QSERDES_COM_FAUX_EN 0x0F4 -+#define QSERDES_COM_DIV_FRAC_START1 0x0F8 -+#define QSERDES_COM_DIV_FRAC_START2 0x0FC -+#define QSERDES_COM_DIV_FRAC_START3 0x100 -+#define QSERDES_COM_DEC_START2 0x104 -+#define QSERDES_COM_PLL_RXTXEPCLK_EN 0x108 -+#define QSERDES_COM_PLL_CRCTRL 0x10C -+#define QSERDES_COM_PLL_CLKEPDIV 0x110 -+#define QSERDES_COM_PLL_FREQUPDATE 0x114 -+#define QSERDES_COM_PLL_BKGCAL_TRIM_UP 0x118 -+#define QSERDES_COM_PLL_BKGCAL_TRIM_DN 0x11C -+#define QSERDES_COM_PLL_BKGCAL_TRIM_MUX 0x120 -+#define QSERDES_COM_PLL_BKGCAL_VREF_CFG 0x124 -+#define QSERDES_COM_PLL_BKGCAL_DIV_REF1 0x128 -+#define QSERDES_COM_PLL_BKGCAL_DIV_REF2 0x12C -+#define QSERDES_COM_MUXADDR 0x130 -+#define QSERDES_COM_LOW_POWER_RO_CONTROL 0x134 -+#define QSERDES_COM_POST_DIVIDER_CONTROL 0x138 -+#define QSERDES_COM_HR_OCLK2_DIVIDER 0x13C -+#define QSERDES_COM_HR_OCLK3_DIVIDER 0x140 -+#define QSERDES_COM_PLL_VCO_HIGH 0x144 -+#define QSERDES_COM_RESET_SM 0x148 -+#define QSERDES_COM_MUXVAL 0x14C -+ -+#define QSERDES_RX_CDR_CONTROL1 0x400 -+#define QSERDES_RX_CDR_CONTROL2 0x404 -+#define QSERDES_RX_CDR_CONTROL_HALF 0x408 -+#define QSERDES_RX_CDR_CONTROL_QUARTER 0x40C -+#define QSERDES_RX_CDR_CONTROL_EIGHTH 0x410 -+#define QSERDES_RX_UCDR_FO_GAIN 0x414 -+#define QSERDES_RX_UCDR_SO_GAIN 0x418 -+#define QSERDES_RX_UCDR_SO_SATURATION_AND_ENABLE 0x41C -+#define QSERDES_RX_UCDR_FO_TO_SO_DELAY 0x420 -+#define QSERDES_RX_AUX_CONTROL 0x424 -+#define QSERDES_RX_AUX_DATA_TCOARSE 0x428 -+#define QSERDES_RX_AUX_DATA_TFINE_LSB 0x42C -+#define QSERDES_RX_AUX_DATA_TFINE_MSB 0x430 -+#define QSERDES_RX_RCLK_AUXDATA_SEL 0x434 -+#define QSERDES_RX_AC_JTAG_ENABLE 0x438 -+#define QSERDES_RX_AC_JTAG_INITP 0x43C -+#define QSERDES_RX_AC_JTAG_INITN 0x440 -+#define QSERDES_RX_AC_JTAG_LVL 0x444 -+#define QSERDES_RX_AC_JTAG_MODE 0x448 -+#define QSERDES_RX_AC_JTAG_RESET 0x44C -+#define QSERDES_RX_RX_RCVR_IQ_EN 0x450 -+#define QSERDES_RX_RX_IDAC_I_DC_OFFSETS 0x454 -+#define QSERDES_RX_RX_IDAC_Q_DC_OFFSETS 0x458 -+#define QSERDES_RX_RX_IDAC_A_DC_OFFSETS 0x45C -+#define QSERDES_RX_RX_IDAC_EN 0x460 -+#define QSERDES_RX_RX_IDAC_CTRL0 0x464 -+#define QSERDES_RX_RX_IDAC_CTRL1 0x468 -+#define QSERDES_RX_RX_EOM_EN 0x46C -+#define QSERDES_RX_RX_EOM_CTRL0 0x470 -+#define QSERDES_RX_RX_EOM_CTRL1 0x474 -+#define QSERDES_RX_RX_EOM_CTRL2 0x478 -+#define QSERDES_RX_RX_EOM_CTRL3 0x47C -+#define QSERDES_RX_RX_EOM_CTRL4 0x480 -+#define QSERDES_RX_RX_EOM_CTRL5 0x484 -+#define QSERDES_RX_RX_EOM_CTRL6 0x488 -+#define QSERDES_RX_RX_EOM_CTRL7 0x48C -+#define QSERDES_RX_RX_EOM_CTRL8 0x490 -+#define QSERDES_RX_RX_EOM_CTRL9 0x494 -+#define QSERDES_RX_RX_EOM_CTRL10 0x498 -+#define QSERDES_RX_RX_EOM_CTRL11 0x49C -+#define QSERDES_RX_RX_HIGHZ_HIGHRATE 0x4A0 -+#define QSERDES_RX_RX_TERM_AC_BYPASS_DC_COUPLE_OFFSET 0x4A4 -+#define QSERDES_RX_RX_EQ_GAIN1_LSB 0x4A8 -+#define QSERDES_RX_RX_EQ_GAIN1_MSB 0x4AC -+#define QSERDES_RX_RX_EQ_GAIN2_LSB 0x4B0 -+#define QSERDES_RX_RX_EQ_GAIN2_MSB 0x4B4 -+#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL1 0x4B8 -+#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL2 0x4BC -+#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL3 0x4C0 -+#define QSERDES_RX_RX_EQU_ADAPTOR_CNTRL4 0x4C4 -+#define QSERDES_RX_RX_IDAC_CAL_CONFIGURATION 0x4C8 -+#define QSERDES_RX_RX_IDAC_CAL_CONFIGURATION_2 0x4CC -+#define QSERDES_RX_RX_IDAC_TSETTLE_LOW 0x4D0 -+#define QSERDES_RX_RX_IDAC_TSETTLE_HIGH 0x4D4 -+#define QSERDES_RX_RX_IDAC_ENDSAMP_LOW 0x4D8 -+#define QSERDES_RX_RX_IDAC_ENDSAMP_HIGH 0x4DC -+#define QSERDES_RX_RX_IDAC_MIDPOINT_LOW 0x4E0 -+#define QSERDES_RX_RX_IDAC_MIDPOINT_HIGH 0x4E4 -+#define QSERDES_RX_RX_EQ_OFFSET_LSB 0x4E8 -+#define QSERDES_RX_RX_EQ_OFFSET_MSB 0x4EC -+#define QSERDES_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x4F0 -+#define QSERDES_RX_RX_OFFSET_ADAPTOR_CNTRL2 0x4F4 -+#define QSERDES_RX_SIGDET_ENABLES 0x4F8 -+#define QSERDES_RX_SIGDET_ENABLES_2 0x4FC -+#define QSERDES_RX_SIGDET_CNTRL 0x500 -+#define QSERDES_RX_SIGDET_DEGLITCH_CNTRL 0x504 -+#define QSERDES_RX_SIGDET_TIMER_LIMIT 0x508 -+#define QSERDES_RX_RX_BAND 0x50C -+#define QSERDES_RX_CDR_FREEZE_UP_DN 0x510 -+#define QSERDES_RX_RX_INTERFACE_MODE 0x514 -+#define QSERDES_RX_JITTER_GEN_MODE 0x518 -+#define QSERDES_RX_BUJ_AMP 0x51C -+#define QSERDES_RX_SJ_AMP1 0x520 -+#define QSERDES_RX_SJ_AMP2 0x524 -+#define QSERDES_RX_SJ_PER1 0x528 -+#define QSERDES_RX_SJ_PER2 0x52C -+#define QSERDES_RX_BUJ_STEP_FREQ1 0x530 -+#define QSERDES_RX_BUJ_STEP_FREQ2 0x534 -+#define QSERDES_RX_PPM_OFFSET1 0x538 -+#define QSERDES_RX_PPM_OFFSET2 0x53C -+#define QSERDES_RX_SIGN_PPM_PERIOD1 0x540 -+#define QSERDES_RX_SIGN_PPM_PERIOD2 0x544 -+#define QSERDES_RX_SSC_CTRL 0x548 -+#define QSERDES_RX_SSC_COUNT1 0x54C -+#define QSERDES_RX_SSC_COUNT2 0x550 -+#define QSERDES_RX_RX_ALOG_INTF_OBSV_CNTL 0x554 -+#define QSERDES_RX_PI_CTRL1 0x558 -+#define QSERDES_RX_PI_CTRL2 0x55C -+#define QSERDES_RX_PI_QUAD 0x560 -+#define QSERDES_RX_IDATA1 0x564 -+#define QSERDES_RX_IDATA2 0x568 -+#define QSERDES_RX_AUX_DATA1 0x56C -+#define QSERDES_RX_AUX_DATA2 0x570 -+#define QSERDES_RX_AC_JTAG_OUTP 0x574 -+#define QSERDES_RX_AC_JTAG_OUTN 0x578 -+#define QSERDES_RX_RX_SIGDET 0x57C -+#define QSERDES_RX_RX_VDCOFF 0x580 -+#define QSERDES_RX_IDAC_CAL_ON 0x584 -+#define QSERDES_RX_IDAC_STATUS_I 0x588 -+#define QSERDES_RX_IDAC_STATUS_Q 0x58C -+#define QSERDES_RX_IDAC_STATUS_A 0x590 -+#define QSERDES_RX_CALST_STATUS_I 0x594 -+#define QSERDES_RX_CALST_STATUS_Q 0x598 -+#define QSERDES_RX_CALST_STATUS_A 0x59C -+#define QSERDES_RX_EOM_STATUS0 0x5A0 -+#define QSERDES_RX_EOM_STATUS1 0x5A4 -+#define QSERDES_RX_EOM_STATUS2 0x5A8 -+#define QSERDES_RX_EOM_STATUS3 0x5AC -+#define QSERDES_RX_EOM_STATUS4 0x5B0 -+#define QSERDES_RX_EOM_STATUS5 0x5B4 -+#define QSERDES_RX_EOM_STATUS6 0x5B8 -+#define QSERDES_RX_EOM_STATUS7 0x5BC -+#define QSERDES_RX_EOM_STATUS8 0x5C0 -+#define QSERDES_RX_EOM_STATUS9 0x5C4 -+#define QSERDES_RX_RX_ALOG_INTF_OBSV 0x5C8 -+#define QSERDES_RX_READ_EQCODE 0x5CC -+#define QSERDES_RX_READ_OFFSETCODE 0x5D0 -+ -+#define QSERDES_TX_BIST_MODE_LANENO 0x200 -+#define QSERDES_TX_CLKBUF_ENABLE 0x204 -+#define QSERDES_TX_TX_EMP_POST1_LVL 0x208 -+#define QSERDES_TX_TX_DRV_LVL 0x20C -+#define QSERDES_TX_RESET_TSYNC_EN 0x210 -+#define QSERDES_TX_LPB_EN 0x214 -+#define QSERDES_TX_RES_CODE_UP 0x218 -+#define QSERDES_TX_RES_CODE_DN 0x21C -+#define QSERDES_TX_PERL_LENGTH1 0x220 -+#define QSERDES_TX_PERL_LENGTH2 0x224 -+#define QSERDES_TX_SERDES_BYP_EN_OUT 0x228 -+#define QSERDES_TX_HIGHZ_TRANSCEIVEREN_BIAS_DRVR_EN 0x22C -+#define QSERDES_TX_PARRATE_REC_DETECT_IDLE_EN 0x230 -+#define QSERDES_TX_BIST_PATTERN1 0x234 -+#define QSERDES_TX_BIST_PATTERN2 0x238 -+#define QSERDES_TX_BIST_PATTERN3 0x23C -+#define QSERDES_TX_BIST_PATTERN4 0x240 -+#define QSERDES_TX_BIST_PATTERN5 0x244 -+#define QSERDES_TX_BIST_PATTERN6 0x248 -+#define QSERDES_TX_BIST_PATTERN7 0x24C -+#define QSERDES_TX_BIST_PATTERN8 0x250 -+#define QSERDES_TX_LANE_MODE 0x254 -+#define QSERDES_TX_IDAC_CAL_LANE_MODE 0x258 -+#define QSERDES_TX_IDAC_CAL_LANE_MODE_CONFIGURATION 0x25C -+#define QSERDES_TX_ATB_SEL1 0x260 -+#define QSERDES_TX_ATB_SEL2 0x264 -+#define QSERDES_TX_RCV_DETECT_LVL 0x268 -+#define QSERDES_TX_PRBS_SEED1 0x26C -+#define QSERDES_TX_PRBS_SEED2 0x270 -+#define QSERDES_TX_PRBS_SEED3 0x274 -+#define QSERDES_TX_PRBS_SEED4 0x278 -+#define QSERDES_TX_RESET_GEN 0x27C -+#define QSERDES_TX_TRAN_DRVR_EMP_EN 0x280 -+#define QSERDES_TX_TX_INTERFACE_MODE 0x284 -+#define QSERDES_TX_PWM_CTRL 0x288 -+#define QSERDES_TX_PWM_DATA 0x28C -+#define QSERDES_TX_PWM_ENC_DIV_CTRL 0x290 -+#define QSERDES_TX_VMODE_CTRL1 0x294 -+#define QSERDES_TX_VMODE_CTRL2 0x298 -+#define QSERDES_TX_VMODE_CTRL3 0x29C -+#define QSERDES_TX_VMODE_CTRL4 0x2A0 -+#define QSERDES_TX_VMODE_CTRL5 0x2A4 -+#define QSERDES_TX_VMODE_CTRL6 0x2A8 -+#define QSERDES_TX_VMODE_CTRL7 0x2AC -+#define QSERDES_TX_TX_ALOG_INTF_OBSV_CNTL 0x2B0 -+#define QSERDES_TX_BIST_STATUS 0x2B4 -+#define QSERDES_TX_BIST_ERROR_COUNT1 0x2B8 -+#define QSERDES_TX_BIST_ERROR_COUNT2 0x2BC -+#define QSERDES_TX_TX_ALOG_INTF_OBSV 0x2C0 -+#define QSERDES_TX_PWM_DEC_STATUS 0x2C4 -+ -+#define PCIE_PHY_SW_RESET 0x600 -+#define PCIE_PHY_POWER_DOWN_CONTROL 0x604 -+#define PCIE_PHY_START 0x608 -+#define PCIE_PHY_TXMGN_V1_V0 0x60C -+#define PCIE_PHY_TXMGN_V3_V2 0x610 -+#define PCIE_PHY_TXMGN_LS_V4 0x614 -+#define PCIE_PHY_TXDEEMPH_M6DB_V0 0x618 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V0 0x61C -+#define PCIE_PHY_TXDEEMPH_M6DB_V1 0x620 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V1 0x624 -+#define PCIE_PHY_TXDEEMPH_M6DB_V2 0x628 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V2 0x62C -+#define PCIE_PHY_TXDEEMPH_M6DB_V3 0x630 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V3 0x634 -+#define PCIE_PHY_TXDEEMPH_M6DB_V4 0x638 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V4 0x63C -+#define PCIE_PHY_TXDEEMPH_M6DB_LS 0x640 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_LS 0x644 -+#define PCIE_PHY_ENDPOINT_REFCLK_DRIVE 0x648 -+#define PCIE_PHY_RX_IDLE_DTCT_CNTRL 0x64C -+#define PCIE_PHY_POWER_STATE_CONFIG1 0x650 -+#define PCIE_PHY_POWER_STATE_CONFIG2 0x654 -+#define PCIE_PHY_POWER_STATE_CONFIG3 0x658 -+#define PCIE_PHY_RCVR_DTCT_DLY_P1U2_L 0x65C -+#define PCIE_PHY_RCVR_DTCT_DLY_P1U2_H 0x660 -+#define PCIE_PHY_RCVR_DTCT_DLY_U3_L 0x664 -+#define PCIE_PHY_RCVR_DTCT_DLY_U3_H 0x668 -+#define PCIE_PHY_LOCK_DETECT_CONFIG1 0x66C -+#define PCIE_PHY_LOCK_DETECT_CONFIG2 0x670 -+#define PCIE_PHY_LOCK_DETECT_CONFIG3 0x674 -+#define PCIE_PHY_TSYNC_RSYNC_TIME 0x678 -+#define PCIE_PHY_SIGDET_LOW_2_IDLE_TIME 0x67C -+#define PCIE_PHY_BEACON_2_IDLE_TIME_L 0x680 -+#define PCIE_PHY_BEACON_2_IDLE_TIME_H 0x684 -+#define PCIE_PHY_PWRUP_RESET_DLY_TIME_SYSCLK 0x688 -+#define PCIE_PHY_PWRUP_RESET_DLY_TIME_AUXCLK 0x68C -+#define PCIE_PHY_LFPS_DET_HIGH_COUNT_VAL 0x690 -+#define PCIE_PHY_LFPS_TX_ECSTART_EQTLOCK 0x694 -+#define PCIE_PHY_LFPS_TX_END_CNT_P2U3_START 0x698 -+#define PCIE_PHY_RXEQTRAINING_WAIT_TIME 0x69C -+#define PCIE_PHY_RXEQTRAINING_RUN_TIME 0x6A0 -+#define PCIE_PHY_TXONESZEROS_RUN_LENGTH 0x6A4 -+#define PCIE_PHY_FLL_CNTRL1 0x6A8 -+#define PCIE_PHY_FLL_CNTRL2 0x6AC -+#define PCIE_PHY_FLL_CNT_VAL_L 0x6B0 -+#define PCIE_PHY_FLL_CNT_VAL_H_TOL 0x6B4 -+#define PCIE_PHY_FLL_MAN_CODE 0x6B8 -+#define PCIE_PHY_AUTONOMOUS_MODE_CTRL 0x6BC -+#define PCIE_PHY_LFPS_RXTERM_IRQ_CLEAR 0x6C0 -+#define PCIE_PHY_ARCVR_DTCT_EN_PERIOD 0x6C4 -+#define PCIE_PHY_ARCVR_DTCT_CM_DLY 0x6C8 -+#define PCIE_PHY_ALFPS_DEGLITCH_VAL 0x6CC -+#define PCIE_PHY_INSIG_SW_CTRL1 0x6D0 -+#define PCIE_PHY_INSIG_SW_CTRL2 0x6D4 -+#define PCIE_PHY_INSIG_SW_CTRL3 0x6D8 -+#define PCIE_PHY_INSIG_MX_CTRL1 0x6DC -+#define PCIE_PHY_INSIG_MX_CTRL2 0x6E0 -+#define PCIE_PHY_INSIG_MX_CTRL3 0x6E4 -+#define PCIE_PHY_TEST_CONTROL 0x6E8 -+#define PCIE_PHY_BIST_CTRL 0x6EC -+#define PCIE_PHY_PRBS_POLY0 0x6F0 -+#define PCIE_PHY_PRBS_POLY1 0x6F4 -+#define PCIE_PHY_PRBS_SEED0 0x6F8 -+#define PCIE_PHY_PRBS_SEED1 0x6FC -+#define PCIE_PHY_FIXED_PAT_CTRL 0x700 -+#define PCIE_PHY_FIXED_PAT0 0x704 -+#define PCIE_PHY_FIXED_PAT1 0x708 -+#define PCIE_PHY_FIXED_PAT2 0x70C -+#define PCIE_PHY_FIXED_PAT3 0x710 -+#define PCIE_PHY_SPARE1 0x714 -+#define PCIE_PHY_BIST_CHK_ERR_CNT_L 0x718 -+#define PCIE_PHY_BIST_CHK_ERR_CNT_H 0x71C -+#define PCIE_PHY_BIST_CHK_STATUS 0x720 -+#define PCIE_PHY_LFPS_RXTERM_IRQ_SOURCE 0x724 -+#define PCIE_PHY_PCS_STATUS 0x728 -+#define PCIE_PHY_PCS_STATUS2 0x72C -+#define PCIE_PHY_REVISION_ID0 0x730 -+#define PCIE_PHY_REVISION_ID1 0x734 -+#define PCIE_PHY_REVISION_ID2 0x738 -+#define PCIE_PHY_REVISION_ID3 0x73C -+#define PCIE_PHY_DEBUG_BUS_0_STATUS 0x740 -+#define PCIE_PHY_DEBUG_BUS_1_STATUS 0x744 -+#define PCIE_PHY_DEBUG_BUS_2_STATUS 0x748 -+#define PCIE_PHY_DEBUG_BUS_3_STATUS 0x74C -+ -+#else -+ -+#define QSERDES_COM_SYS_CLK_CTRL 0x000 -+#define QSERDES_COM_PLL_VCOTAIL_EN 0x004 -+#define QSERDES_COM_CMN_MODE 0x008 -+#define QSERDES_COM_IE_TRIM 0x00c -+#define QSERDES_COM_IP_TRIM 0x010 -+#define QSERDES_COM_PLL_CNTRL 0x014 -+#define QSERDES_COM_PLL_IP_SETI 0x018 -+#define QSERDES_COM_CORE_CLK_IN_SYNC_SEL 0x01c -+#define QSERDES_COM_BIAS_EN_CLKBUFLR_EN 0x020 -+#define QSERDES_COM_PLL_CP_SETI 0x024 -+#define QSERDES_COM_PLL_IP_SETP 0x028 -+#define QSERDES_COM_PLL_CP_SETP 0x02c -+#define QSERDES_COM_ATB_SEL1 0x030 -+#define QSERDES_COM_ATB_SEL2 0x034 -+#define QSERDES_COM_SYSCLK_EN_SEL 0x038 -+#define QSERDES_COM_RES_CODE_TXBAND 0x03c -+#define QSERDES_COM_RESETSM_CNTRL 0x040 -+#define QSERDES_COM_PLLLOCK_CMP1 0x044 -+#define QSERDES_COM_PLLLOCK_CMP2 0x048 -+#define QSERDES_COM_PLLLOCK_CMP3 0x04c -+#define QSERDES_COM_PLLLOCK_CMP_EN 0x050 -+#define QSERDES_COM_RES_TRIM_OFFSET 0x054 -+#define QSERDES_COM_BGTC 0x058 -+#define QSERDES_COM_PLL_TEST_UPDN_RESTRIMSTEP 0x05c -+#define QSERDES_COM_PLL_VCO_TUNE 0x060 -+#define QSERDES_COM_DEC_START1 0x064 -+#define QSERDES_COM_PLL_AMP_OS 0x068 -+#define QSERDES_COM_SSC_EN_CENTER 0x06c -+#define QSERDES_COM_SSC_ADJ_PER1 0x070 -+#define QSERDES_COM_SSC_ADJ_PER2 0x074 -+#define QSERDES_COM_SSC_PER1 0x078 -+#define QSERDES_COM_SSC_PER2 0x07c -+#define QSERDES_COM_SSC_STEP_SIZE1 0x080 -+#define QSERDES_COM_SSC_STEP_SIZE2 0x084 -+#define QSERDES_COM_RES_TRIM_SEARCH 0x088 -+#define QSERDES_COM_RES_TRIM_FREEZE 0x08c -+#define QSERDES_COM_RES_TRIM_EN_VCOCALDONE 0x090 -+#define QSERDES_COM_FAUX_EN 0x094 -+#define QSERDES_COM_DIV_FRAC_START1 0x098 -+#define QSERDES_COM_DIV_FRAC_START2 0x09c -+#define QSERDES_COM_DIV_FRAC_START3 0x0a0 -+#define QSERDES_COM_DEC_START2 0x0a4 -+#define QSERDES_COM_PLL_RXTXEPCLK_EN 0x0a8 -+#define QSERDES_COM_PLL_CRCTRL 0x0ac -+#define QSERDES_COM_PLL_CLKEPDIV 0x0b0 -+#define QSERDES_COM_PLL_FREQUPDATE 0x0b4 -+#define QSERDES_COM_PLL_VCO_HIGH 0x0b8 -+#define QSERDES_COM_RESET_SM 0x0bc -+#define QSERDES_TX_BIST_MODE_LANENO 0x200 -+#define QSERDES_TX_CLKBUF_ENABLE 0x204 -+#define QSERDES_TX_TX_EMP_POST1_LVL 0x208 -+#define QSERDES_TX_TX_DRV_LVL 0x20c -+#define QSERDES_TX_RESET_TSYNC_EN 0x210 -+#define QSERDES_TX_LPB_EN 0x214 -+#define QSERDES_TX_RES_CODE 0x218 -+#define QSERDES_TX_PERL_LENGTH1 0x21c -+#define QSERDES_TX_PERL_LENGTH2 0x220 -+#define QSERDES_TX_SERDES_BYP_EN_OUT 0x224 -+#define QSERDES_TX_HIGHZ_TRANSCEIVEREN_BIAS_EN 0x228 -+#define QSERDES_TX_PARRATE_REC_DETECT_IDLE_EN 0x22c -+#define QSERDES_TX_BIST_PATTERN1 0x230 -+#define QSERDES_TX_BIST_PATTERN2 0x234 -+#define QSERDES_TX_BIST_PATTERN3 0x238 -+#define QSERDES_TX_BIST_PATTERN4 0x23c -+#define QSERDES_TX_BIST_PATTERN5 0x240 -+#define QSERDES_TX_BIST_PATTERN6 0x244 -+#define QSERDES_TX_BIST_PATTERN7 0x248 -+#define QSERDES_TX_BIST_PATTERN8 0x24c -+#define QSERDES_TX_LANE_MODE 0x250 -+#define QSERDES_TX_ATB_SEL 0x254 -+#define QSERDES_TX_REC_DETECT_LVL 0x258 -+#define QSERDES_TX_PRBS_SEED1 0x25c -+#define QSERDES_TX_PRBS_SEED2 0x260 -+#define QSERDES_TX_PRBS_SEED3 0x264 -+#define QSERDES_TX_PRBS_SEED4 0x268 -+#define QSERDES_TX_RESET_GEN 0x26c -+#define QSERDES_TX_TRAN_DRVR_EMP_EN 0x270 -+#define QSERDES_TX_TX_INTERFACE_MODE 0x274 -+#define QSERDES_TX_BIST_STATUS 0x278 -+#define QSERDES_TX_BIST_ERROR_COUNT1 0x27c -+#define QSERDES_TX_BIST_ERROR_COUNT2 0x280 -+#define QSERDES_RX_CDR_CONTROL 0x400 -+#define QSERDES_RX_AUX_CONTROL 0x404 -+#define QSERDES_RX_AUX_DATA_TCODE 0x408 -+#define QSERDES_RX_RCLK_AUXDATA_SEL 0x40c -+#define QSERDES_RX_CDR_CONTROL2 0x410 -+#define QSERDES_RX_AC_JTAG_INITP 0x414 -+#define QSERDES_RX_AC_JTAG_INITN 0x418 -+#define QSERDES_RX_AC_JTAG_LVL_EN 0x41c -+#define QSERDES_RX_AC_JTAG_MODE 0x420 -+#define QSERDES_RX_AC_JTAG_RESET 0x424 -+#define QSERDES_RX_RX_IQ_RXDET_EN 0x428 -+#define QSERDES_RX_RX_TERM_HIGHZ_CM_AC_COUPLE 0x42c -+#define QSERDES_RX_RX_EQ_GAIN12 0x430 -+#define QSERDES_RX_SIGDET_CNTRL 0x434 -+#define QSERDES_RX_RX_BAND 0x438 -+#define QSERDES_RX_CDR_FREEZE_UP_DN 0x43c -+#define QSERDES_RX_RX_INTERFACE_MODE 0x440 -+#define QSERDES_RX_JITTER_GEN_MODE 0x444 -+#define QSERDES_RX_BUJ_AMP 0x448 -+#define QSERDES_RX_SJ_AMP1 0x44c -+#define QSERDES_RX_SJ_AMP2 0x450 -+#define QSERDES_RX_SJ_PER1 0x454 -+#define QSERDES_RX_SJ_PER2 0x458 -+#define QSERDES_RX_BUJ_STEP_FREQ1 0x45c -+#define QSERDES_RX_BUJ_STEP_FREQ2 0x460 -+#define QSERDES_RX_PPM_OFFSET1 0x464 -+#define QSERDES_RX_PPM_OFFSET2 0x468 -+#define QSERDES_RX_SIGN_PPM_PERIOD1 0x46c -+#define QSERDES_RX_SIGN_PPM_PERIOD2 0x470 -+#define QSERDES_RX_SSC_CTRL 0x474 -+#define QSERDES_RX_SSC_COUNT1 0x478 -+#define QSERDES_RX_SSC_COUNT2 0x47c -+#define QSERDES_RX_PWM_CNTRL1 0x480 -+#define QSERDES_RX_PWM_CNTRL2 0x484 -+#define QSERDES_RX_PWM_NDIV 0x488 -+#define QSERDES_RX_PI_CTRL1 0x48c -+#define QSERDES_RX_PI_CTRL2 0x490 -+#define QSERDES_RX_PI_QUAD 0x494 -+#define QSERDES_RX_IDATA1 0x498 -+#define QSERDES_RX_IDATA2 0x49c -+#define QSERDES_RX_AUX_DATA1 0x4a0 -+#define QSERDES_RX_AUX_DATA2 0x4a4 -+#define QSERDES_RX_AC_JTAG_OUTP 0x4a8 -+#define QSERDES_RX_AC_JTAG_OUTN 0x4ac -+#define QSERDES_RX_RX_SIGDET_PWMDECSTATUS 0x4b0 -+#define PCIE_PHY_SW_RESET 0x600 -+#define PCIE_PHY_POWER_DOWN_CONTROL 0x604 -+#define PCIE_PHY_START 0x608 -+#define PCIE_PHY_TXMGN_V1_V0 0x60c -+#define PCIE_PHY_TXMGN_V3_V2 0x610 -+#define PCIE_PHY_TXMGN_LS_V4 0x614 -+#define PCIE_PHY_TXDEEMPH_M6DB_V0 0x618 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V0 0x61c -+#define PCIE_PHY_TXDEEMPH_M6DB_V1 0x620 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V1 0x624 -+#define PCIE_PHY_TXDEEMPH_M6DB_V2 0x628 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V2 0x62c -+#define PCIE_PHY_TXDEEMPH_M6DB_V3 0x630 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V3 0x634 -+#define PCIE_PHY_TXDEEMPH_M6DB_V4 0x638 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_V4 0x63c -+#define PCIE_PHY_TXDEEMPH_M6DB_LS 0x640 -+#define PCIE_PHY_TXDEEMPH_M3P5DB_LS 0x644 -+#define PCIE_PHY_ENDPOINT_REFCLK_DRIVE 0x648 -+#define PCIE_PHY_RX_IDLE_DTCT_CNTRL 0x64c -+#define PCIE_PHY_POWER_STATE_CONFIG1 0x650 -+#define PCIE_PHY_POWER_STATE_CONFIG2 0x654 -+#define PCIE_PHY_RCVR_DTCT_DLY_L 0x658 -+#define PCIE_PHY_RCVR_DTCT_DLY_H 0x65c -+#define PCIE_PHY_LOCK_DETECT_CONFIG1 0x660 -+#define PCIE_PHY_LOCK_DETECT_CONFIG2 0x664 -+#define PCIE_PHY_TSYNC_RSYNC_TIME 0x668 -+#define PCIE_PHY_SIGDET_LOW_2_IDLE_TIME 0x66c -+#define PCIE_PHY_BEACON_2_IDLE_TIME_L 0x670 -+#define PCIE_PHY_BEACON_2_IDLE_TIME_H 0x674 -+#define PCIE_PHY_PWRUP_RESET_DLY_TIME_SYSCLK 0x678 -+#define PCIE_PHY_PWRUP_RESET_DLY_TIME_AUXCLK 0x67c -+#define PCIE_PHY_INSIG_SW_CTRL1 0x680 -+#define PCIE_PHY_INSIG_SW_CTRL2 0x684 -+#define PCIE_PHY_INSIG_MX_CTRL1 0x688 -+#define PCIE_PHY_INSIG_MX_CTRL2 0x68c -+#define PCIE_PHY_TEST_CONTROL 0x690 -+#define PCIE_PHY_BIST_CTRL 0x694 -+#define PCIE_PHY_PRBS_POLY0 0x698 -+#define PCIE_PHY_PRBS_POLY1 0x69c -+#define PCIE_PHY_PRBS_SEED0 0x6a0 -+#define PCIE_PHY_PRBS_SEED1 0x6a4 -+#define PCIE_PHY_FIXED_PAT_CTRL 0x6a8 -+#define PCIE_PHY_FIXED_PAT0 0x6ac -+#define PCIE_PHY_FIXED_PAT1 0x6b0 -+#define PCIE_PHY_FIXED_PAT2 0x6b4 -+#define PCIE_PHY_FIXED_PAT3 0x6b8 -+#define PCIE_PHY_BIST_CHK_ERR_CNT_L 0x6bc -+#define PCIE_PHY_BIST_CHK_ERR_CNT_H 0x6c0 -+#define PCIE_PHY_BIST_CHK_STATUS 0x6c4 -+#define PCIE_PHY_PCS_STATUS 0x6c8 -+#define PCIE_PHY_REVISION_ID0 0x6cc -+#define PCIE_PHY_REVISION_ID1 0x6d0 -+#define PCIE_PHY_REVISION_ID2 0x6d4 -+#define PCIE_PHY_REVISION_ID3 0x6d8 -+#define PCIE_PHY_DEBUG_BUS_0_STATUS 0x6dc -+#define PCIE_PHY_DEBUG_BUS_1_STATUS 0x6e0 -+#define PCIE_PHY_DEBUG_BUS_2_STATUS 0x6e4 -+#define PCIE_PHY_DEBUG_BUS_3_STATUS 0x6e8 -+#endif -+ -+#endif --- -2.7.4 - diff --git a/target/linux/ipq806x/image/Makefile b/target/linux/ipq806x/image/Makefile index eb91d9e84..a737e165b 100644 --- a/target/linux/ipq806x/image/Makefile +++ b/target/linux/ipq806x/image/Makefile @@ -3,8 +3,6 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/image.mk -UBIFS_OPTS = -m 2048 -e 124KiB -c 4096 -U -F - define Device/Default PROFILES := Default KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts) @@ -49,8 +47,8 @@ define Device/DniImage NETGEAR_HW_ID := UBINIZE_OPTS := -E 5 IMAGES := factory.img sysupgrade.bin - IMAGE/factory.img := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-uImage-fakeroot-hdr | pad-to $$$$(KERNEL_SIZE) | append-ubi | netgear-dni - IMAGE/sysupgrade.bin := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-uImage-fakeroot-hdr | sysupgrade-tar kernel=$$$$@ | append-metadata + IMAGE/factory.img := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-uImage-fakehdr filesystem | pad-to $$$$(KERNEL_SIZE) | append-ubi | netgear-dni + IMAGE/sysupgrade.bin := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-uImage-fakehdr filesystem | sysupgrade-tar kernel=$$$$@ | append-metadata endef DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_HW_ID diff --git a/target/linux/ixp4xx/base-files/lib/upgrade/platform.sh b/target/linux/ixp4xx/base-files/lib/upgrade/platform.sh index e1e43cf19..92eeaffef 100644 --- a/target/linux/ixp4xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/ixp4xx/base-files/lib/upgrade/platform.sh @@ -135,15 +135,3 @@ platform_do_upgrade() { ;; esac } - -disable_watchdog() { - v "killing watchdog" - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} - -# CONFIG_WATCHDOG_NOWAYOUT=y - can't kill watchdog unless kernel cmdline has a mpcore_wdt.nowayout=0 -#append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/ixp4xx/config-4.4 b/target/linux/ixp4xx/config-4.4 deleted file mode 100644 index a5bc7e919..000000000 --- a/target/linux/ixp4xx/config-4.4 +++ /dev/null @@ -1,250 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -# CONFIG_ARCH_ADI_COYOTE is not set -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# CONFIG_ARCH_HAS_SG_CHAIN is not set -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_IXCDP1100=y -CONFIG_ARCH_IXDP425=y -CONFIG_ARCH_IXDP4XX=y -CONFIG_ARCH_IXP4XX=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_NR_GPIO=0 -# CONFIG_ARCH_PRPMC1100 is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -# CONFIG_ARM_CPU_SUSPEND is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_THUMB is not set -CONFIG_ATAGS=y -CONFIG_BOUNCE=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200" -CONFIG_CMDLINE_FROM_BOOTLOADER=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5T=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_ENDIAN_BE32=y -# CONFIG_CPU_ENDIAN_BE8 is not set -CONFIG_CPU_IXP43X=y -CONFIG_CPU_IXP46X=y -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_USE_DOMAINS=y -CONFIG_CPU_XSCALE=y -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_UART_8250=y -# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set -CONFIG_DEBUG_UART_8250_SHIFT=2 -# CONFIG_DEBUG_UART_8250_WORD is not set -CONFIG_DEBUG_UART_PHYS=0xc8000003 -CONFIG_DEBUG_UART_VIRT=0xfef00003 -# CONFIG_DEBUG_USER is not set -CONFIG_DMABOUNCE=y -CONFIG_DNOTIFY=y -CONFIG_EEPROM_AT24=y -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_DEVRES=y -CONFIG_GPIO_GW_I2C_PLD=y -CONFIG_GPIO_SYSFS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -# CONFIG_HAVE_ARCH_BITREVERSE is not set -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_BPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZ4=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KERNEL_LZO=y -CONFIG_HAVE_KERNEL_XZ=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HWMON=y -CONFIG_HWMON_VID=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IXP4XX=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_ALGOBIT=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_GPIO=y -# CONFIG_I2C_IOP3XX is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IOMMU_HELPER=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_IWMMXT is not set -CONFIG_IXP4XX_ETH=y -# CONFIG_IXP4XX_INDIRECT_PCI is not set -CONFIG_IXP4XX_NPE=y -CONFIG_IXP4XX_QMGR=y -CONFIG_IXP4XX_WATCHDOG=y -CONFIG_LEDS_FSG=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_LATCH=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_LZ4_COMPRESS is not set -# CONFIG_LZ4_DECOMPRESS is not set -CONFIG_MACH_AP1000=y -CONFIG_MACH_AP42X=y -# CONFIG_MACH_ARCOM_VULCAN is not set -CONFIG_MACH_AVILA=y -CONFIG_MACH_CAMBRIA=y -CONFIG_MACH_COMPEXWP18=y -# CONFIG_MACH_DEVIXP is not set -CONFIG_MACH_DSMG600=y -CONFIG_MACH_FSG=y -CONFIG_MACH_GATEWAY7001=y -# CONFIG_MACH_GORAMO_MLR is not set -# CONFIG_MACH_GTWX5715 is not set -# CONFIG_MACH_IXDP465 is not set -CONFIG_MACH_IXDPG425=y -# CONFIG_MACH_KIXRP435 is not set -CONFIG_MACH_LOFT=y -CONFIG_MACH_MI424WR=y -# CONFIG_MACH_MIC256 is not set -# CONFIG_MACH_MICCPT is not set -CONFIG_MACH_NAS100D=y -CONFIG_MACH_NSLU2=y -CONFIG_MACH_PRONGHORN=y -CONFIG_MACH_PRONGHORNMETRO=y -CONFIG_MACH_SIDEWINDER=y -CONFIG_MACH_TW2662=y -CONFIG_MACH_TW5334=y -CONFIG_MACH_USR8200=y -CONFIG_MACH_WG302V1=y -CONFIG_MACH_WG302V2=y -CONFIG_MACH_WRT300NV2=y -CONFIG_MDIO_BOARDINFO=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_IXP4XX=y -CONFIG_MTD_OTP=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_KUSER_HELPERS=y -CONFIG_NEED_MACH_IO_H=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_VENDOR_XSCALE=y -CONFIG_NO_BOOTMEM=y -# CONFIG_OF is not set -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -# CONFIG_PCI_DOMAINS_GENERIC is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -# CONFIG_RCU_EXPEDITE_BOOT is not set -# CONFIG_RCU_STALL_COMMON is not set -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_DS1672=y -CONFIG_RTC_DRV_ISL1208=y -CONFIG_RTC_DRV_PCF8563=y -CONFIG_RTC_DRV_X1205=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCSI_DMA is not set -CONFIG_SENSORS_AD7418=y -CONFIG_SENSORS_GSC=y -CONFIG_SENSORS_MAX6650=y -CONFIG_SENSORS_W83781D=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SPLIT_PTLOCK_CPUS=999999 -CONFIG_SRCU=y -CONFIG_SWIOTLB=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_UID16=y -CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h" -CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 diff --git a/target/linux/ixp4xx/patches-4.4/001-arm-ixp4xx-set-cohorent_dma_mask-for-ethernet-platfo.patch b/target/linux/ixp4xx/patches-4.4/001-arm-ixp4xx-set-cohorent_dma_mask-for-ethernet-platfo.patch deleted file mode 100644 index 3ca3eb76a..000000000 --- a/target/linux/ixp4xx/patches-4.4/001-arm-ixp4xx-set-cohorent_dma_mask-for-ethernet-platfo.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 7113f56b683c5123df5c20724ac813cee66fa21a Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Mon, 1 Jul 2013 16:49:05 +0200 -Subject: [PATCH 1/2] arm: ixp4xx: set cohorent_dma_mask for ethernet platform - devices - -ARM requires the cohorent_dma_mask set, so set it for the platform -devices so that the ethernet driver has access to it. - -Signed-off-by: Jonas Gorski ---- - arch/arm/mach-ixp4xx/fsg-setup.c | 2 ++ - arch/arm/mach-ixp4xx/goramo_mlr.c | 2 ++ - arch/arm/mach-ixp4xx/ixdp425-setup.c | 3 +++ - arch/arm/mach-ixp4xx/nas100d-setup.c | 1 + - arch/arm/mach-ixp4xx/nslu2-setup.c | 1 + - arch/arm/mach-ixp4xx/omixp-setup.c | 3 +++ - arch/arm/mach-ixp4xx/vulcan-setup.c | 2 ++ - 7 files changed, 14 insertions(+) - ---- a/arch/arm/mach-ixp4xx/fsg-setup.c -+++ b/arch/arm/mach-ixp4xx/fsg-setup.c -@@ -142,12 +142,14 @@ static struct platform_device fsg_eth[] - .id = IXP4XX_ETH_NPEB, - .dev = { - .platform_data = fsg_plat_eth, -+ .coherent_dma_mask = DMA_BIT_MASK(32), - }, - }, { - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEC, - .dev = { - .platform_data = fsg_plat_eth + 1, -+ .coherent_dma_mask = DMA_BIT_MASK(32), - }, - } - }; ---- a/arch/arm/mach-ixp4xx/goramo_mlr.c -+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c -@@ -295,10 +295,12 @@ static struct platform_device device_eth - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEB, - .dev.platform_data = eth_plat, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - }, { - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEC, - .dev.platform_data = eth_plat + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - } - }; - ---- a/arch/arm/mach-ixp4xx/ixdp425-setup.c -+++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c -@@ -20,6 +20,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -196,10 +197,12 @@ static struct platform_device ixdp425_et - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEB, - .dev.platform_data = ixdp425_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - }, { - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEC, - .dev.platform_data = ixdp425_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - } - }; - ---- a/arch/arm/mach-ixp4xx/nas100d-setup.c -+++ b/arch/arm/mach-ixp4xx/nas100d-setup.c -@@ -170,6 +170,7 @@ static struct platform_device nas100d_et - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEB, - .dev.platform_data = nas100d_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - } - }; - ---- a/arch/arm/mach-ixp4xx/nslu2-setup.c -+++ b/arch/arm/mach-ixp4xx/nslu2-setup.c -@@ -182,6 +182,7 @@ static struct platform_device nslu2_eth[ - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEB, - .dev.platform_data = nslu2_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - } - }; - ---- a/arch/arm/mach-ixp4xx/omixp-setup.c -+++ b/arch/arm/mach-ixp4xx/omixp-setup.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - #include - - #include -@@ -188,10 +189,12 @@ static struct platform_device ixdp425_et - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEB, - .dev.platform_data = ixdp425_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - }, { - .name = "ixp4xx_eth", - .id = IXP4XX_ETH_NPEC, - .dev.platform_data = ixdp425_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), - }, - }; - ---- a/arch/arm/mach-ixp4xx/vulcan-setup.c -+++ b/arch/arm/mach-ixp4xx/vulcan-setup.c -@@ -139,6 +139,7 @@ static struct platform_device vulcan_eth - .id = IXP4XX_ETH_NPEB, - .dev = { - .platform_data = &vulcan_plat_eth[0], -+ .coherent_dma_mask = DMA_BIT_MASK(32), - }, - }, - [1] = { -@@ -146,6 +147,7 @@ static struct platform_device vulcan_eth - .id = IXP4XX_ETH_NPEC, - .dev = { - .platform_data = &vulcan_plat_eth[1], -+ .coherent_dma_mask = DMA_BIT_MASK(32), - }, - }, - }; diff --git a/target/linux/ixp4xx/patches-4.4/002-ixp4xx_eth-use-parent-device-for-dma-allocations.patch b/target/linux/ixp4xx/patches-4.4/002-ixp4xx_eth-use-parent-device-for-dma-allocations.patch deleted file mode 100644 index ceaf21b32..000000000 --- a/target/linux/ixp4xx/patches-4.4/002-ixp4xx_eth-use-parent-device-for-dma-allocations.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 1d67040af0144c549f4db8144d2ccc253ff8639c Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Mon, 1 Jul 2013 16:39:28 +0200 -Subject: [PATCH 2/2] net: ixp4xx_eth: use parent device for dma allocations - -Now that the platfomr device provides a dma_cohorent_mask, use it for -dma operations. - -This fixes ethernet on ixp4xx which was broken since 3.7. - -Signed-off-by: Jonas Gorski ---- - drivers/net/ethernet/xscale/ixp4xx_eth.c | 23 ++++++++++++----------- - 1 file changed, 12 insertions(+), 11 deletions(-) - ---- a/drivers/net/ethernet/xscale/ixp4xx_eth.c -+++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c -@@ -657,10 +657,10 @@ static inline void queue_put_desc(unsign - static inline void dma_unmap_tx(struct port *port, struct desc *desc) - { - #ifdef __ARMEB__ -- dma_unmap_single(&port->netdev->dev, desc->data, -+ dma_unmap_single(port->netdev->dev.parent, desc->data, - desc->buf_len, DMA_TO_DEVICE); - #else -- dma_unmap_single(&port->netdev->dev, desc->data & ~3, -+ dma_unmap_single(port->netdev->dev.parent, desc->data & ~3, - ALIGN((desc->data & 3) + desc->buf_len, 4), - DMA_TO_DEVICE); - #endif -@@ -727,9 +727,9 @@ static int eth_poll(struct napi_struct * - - #ifdef __ARMEB__ - if ((skb = netdev_alloc_skb(dev, RX_BUFF_SIZE))) { -- phys = dma_map_single(&dev->dev, skb->data, -+ phys = dma_map_single(dev->dev.parent, skb->data, - RX_BUFF_SIZE, DMA_FROM_DEVICE); -- if (dma_mapping_error(&dev->dev, phys)) { -+ if (dma_mapping_error(dev->dev.parent, phys)) { - dev_kfree_skb(skb); - skb = NULL; - } -@@ -752,10 +752,11 @@ static int eth_poll(struct napi_struct * - #ifdef __ARMEB__ - temp = skb; - skb = port->rx_buff_tab[n]; -- dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN, -+ dma_unmap_single(dev->dev.parent, desc->data - NET_IP_ALIGN, - RX_BUFF_SIZE, DMA_FROM_DEVICE); - #else -- dma_sync_single_for_cpu(&dev->dev, desc->data - NET_IP_ALIGN, -+ dma_sync_single_for_cpu(dev->dev.parent, -+ desc->data - NET_IP_ALIGN, - RX_BUFF_SIZE, DMA_FROM_DEVICE); - memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n], - ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4); -@@ -874,7 +875,7 @@ static int eth_xmit(struct sk_buff *skb, - memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4); - #endif - -- phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE); -+ phys = dma_map_single(dev->dev.parent, mem, bytes, DMA_TO_DEVICE); - if (dma_mapping_error(&dev->dev, phys)) { - dev_kfree_skb(skb); - #ifndef __ARMEB__ -@@ -1124,7 +1125,7 @@ static int init_queues(struct port *port - int i; - - if (!ports_open) { -- dma_pool = dma_pool_create(DRV_NAME, &port->netdev->dev, -+ dma_pool = dma_pool_create(DRV_NAME, port->netdev->dev.parent, - POOL_ALLOC_SIZE, 32, 0); - if (!dma_pool) - return -ENOMEM; -@@ -1152,9 +1153,9 @@ static int init_queues(struct port *port - data = buff; - #endif - desc->buf_len = MAX_MRU; -- desc->data = dma_map_single(&port->netdev->dev, data, -+ desc->data = dma_map_single(port->netdev->dev.parent, data, - RX_BUFF_SIZE, DMA_FROM_DEVICE); -- if (dma_mapping_error(&port->netdev->dev, desc->data)) { -+ if (dma_mapping_error(port->netdev->dev.parent, desc->data)) { - free_buffer(buff); - return -EIO; - } -@@ -1174,7 +1175,7 @@ static void destroy_queues(struct port * - struct desc *desc = rx_desc_ptr(port, i); - buffer_t *buff = port->rx_buff_tab[i]; - if (buff) { -- dma_unmap_single(&port->netdev->dev, -+ dma_unmap_single(port->netdev->dev.parent, - desc->data - NET_IP_ALIGN, - RX_BUFF_SIZE, DMA_FROM_DEVICE); - free_buffer(buff); diff --git a/target/linux/ixp4xx/patches-4.4/020-gateworks_i2c_pld.patch b/target/linux/ixp4xx/patches-4.4/020-gateworks_i2c_pld.patch deleted file mode 100644 index c527db8ed..000000000 --- a/target/linux/ixp4xx/patches-4.4/020-gateworks_i2c_pld.patch +++ /dev/null @@ -1,424 +0,0 @@ ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -697,6 +697,14 @@ config GPIO_SX150X - 8 bits: sx1508q - 16 bits: sx1509q - -+config GPIO_GW_I2C_PLD -+ tristate "Gateworks I2C PLD GPIO Expander" -+ depends on I2C -+ help -+ Say yes here to provide access to the Gateworks I2C PLD GPIO -+ Expander. This is used at least on the GW2358-4. -+ -+ - endmenu - - menu "MFD GPIO expanders" ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -40,6 +40,7 @@ obj-$(CONFIG_GPIO_ETRAXFS) += gpio-etrax - obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o - obj-$(CONFIG_GPIO_GE_FPGA) += gpio-ge.o - obj-$(CONFIG_GPIO_GRGPIO) += gpio-grgpio.o -+obj-$(CONFIG_GPIO_GW_I2C_PLD) += gw_i2c_pld.o - obj-$(CONFIG_GPIO_ICH) += gpio-ich.o - obj-$(CONFIG_GPIO_IOP) += gpio-iop.o - obj-$(CONFIG_GPIO_IT87) += gpio-it87.o ---- /dev/null -+++ b/drivers/gpio/gw_i2c_pld.c -@@ -0,0 +1,371 @@ -+/* -+ * Gateworks I2C PLD GPIO expander -+ * -+ * Copyright (C) 2009 Gateworks Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static const struct i2c_device_id gw_i2c_pld_id[] = { -+ { "gw_i2c_pld", 8 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, gw_i2c_pld_id); -+ -+/* -+ * The Gateworks I2C PLD chip only expose one read and one -+ * write register. Writing a "one" bit (to match the reset state) lets -+ * that pin be used as an input. It is an open-drain model. -+ */ -+ -+struct gw_i2c_pld { -+ struct gpio_chip chip; -+ struct i2c_client *client; -+ unsigned out; /* software latch */ -+}; -+ -+/*-------------------------------------------------------------------------*/ -+ -+/* -+ * The Gateworks I2C PLD chip does not properly send the acknowledge bit -+ * thus we cannot use standard i2c_smbus functions. We have recreated -+ * our own here, but we still use the rt_mutex_lock to lock the i2c_bus -+ * as the device still exists on the I2C bus. -+*/ -+ -+#define PLD_SCL_GPIO 6 -+#define PLD_SDA_GPIO 7 -+ -+#define SCL_LO() gpio_line_set(PLD_SCL_GPIO, IXP4XX_GPIO_LOW) -+#define SCL_HI() gpio_line_set(PLD_SCL_GPIO, IXP4XX_GPIO_HIGH) -+#define SCL_EN() gpio_line_config(PLD_SCL_GPIO, IXP4XX_GPIO_OUT) -+#define SDA_LO() gpio_line_set(PLD_SDA_GPIO, IXP4XX_GPIO_LOW) -+#define SDA_HI() gpio_line_set(PLD_SDA_GPIO, IXP4XX_GPIO_HIGH) -+#define SDA_EN() gpio_line_config(PLD_SDA_GPIO, IXP4XX_GPIO_OUT) -+#define SDA_DIS() gpio_line_config(PLD_SDA_GPIO, IXP4XX_GPIO_IN) -+#define SDA_IN(x) gpio_line_get(PLD_SDA_GPIO, &x); -+ -+static int i2c_pld_write_byte(int address, int byte) -+{ -+ int i; -+ -+ address = (address << 1) & ~0x1; -+ -+ SDA_HI(); -+ SDA_EN(); -+ SCL_EN(); -+ SCL_HI(); -+ SDA_LO(); -+ SCL_LO(); -+ -+ for (i = 7; i >= 0; i--) -+ { -+ if (address & (1 << i)) -+ SDA_HI(); -+ else -+ SDA_LO(); -+ -+ SCL_HI(); -+ SCL_LO(); -+ } -+ -+ SDA_DIS(); -+ SCL_HI(); -+ SDA_IN(i); -+ SCL_LO(); -+ SDA_EN(); -+ -+ for (i = 7; i >= 0; i--) -+ { -+ if (byte & (1 << i)) -+ SDA_HI(); -+ else -+ SDA_LO(); -+ SCL_HI(); -+ SCL_LO(); -+ } -+ -+ SDA_DIS(); -+ SCL_HI(); -+ SDA_IN(i); -+ SCL_LO(); -+ -+ SDA_HI(); -+ SDA_EN(); -+ -+ SDA_LO(); -+ SCL_HI(); -+ SDA_HI(); -+ SCL_LO(); -+ SCL_HI(); -+ -+ return 0; -+} -+ -+static unsigned int i2c_pld_read_byte(int address) -+{ -+ int i = 0, byte = 0; -+ int bit; -+ -+ address = (address << 1) | 0x1; -+ -+ SDA_HI(); -+ SDA_EN(); -+ SCL_EN(); -+ SCL_HI(); -+ SDA_LO(); -+ SCL_LO(); -+ -+ for (i = 7; i >= 0; i--) -+ { -+ if (address & (1 << i)) -+ SDA_HI(); -+ else -+ SDA_LO(); -+ -+ SCL_HI(); -+ SCL_LO(); -+ } -+ -+ SDA_DIS(); -+ SCL_HI(); -+ SDA_IN(i); -+ SCL_LO(); -+ SDA_EN(); -+ -+ SDA_DIS(); -+ for (i = 7; i >= 0; i--) -+ { -+ SCL_HI(); -+ SDA_IN(bit); -+ byte |= bit << i; -+ SCL_LO(); -+ } -+ -+ SDA_LO(); -+ SCL_HI(); -+ SDA_HI(); -+ SCL_LO(); -+ SCL_HI(); -+ -+ return byte; -+} -+ -+ -+static int gw_i2c_pld_input8(struct gpio_chip *chip, unsigned offset) -+{ -+ int ret; -+ struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip); -+ struct i2c_adapter *adap = gpio->client->adapter; -+ -+ if (in_atomic() || irqs_disabled()) { -+ ret = rt_mutex_trylock(&adap->bus_lock); -+ if (!ret) -+ /* I2C activity is ongoing. */ -+ return -EAGAIN; -+ } else { -+ rt_mutex_lock(&adap->bus_lock); -+ } -+ -+ gpio->out |= (1 << offset); -+ -+ ret = i2c_pld_write_byte(gpio->client->addr, gpio->out); -+ -+ rt_mutex_unlock(&adap->bus_lock); -+ -+ return ret; -+} -+ -+static int gw_i2c_pld_get8(struct gpio_chip *chip, unsigned offset) -+{ -+ int ret; -+ s32 value; -+ struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip); -+ struct i2c_adapter *adap = gpio->client->adapter; -+ -+ if (in_atomic() || irqs_disabled()) { -+ ret = rt_mutex_trylock(&adap->bus_lock); -+ if (!ret) -+ /* I2C activity is ongoing. */ -+ return -EAGAIN; -+ } else { -+ rt_mutex_lock(&adap->bus_lock); -+ } -+ -+ value = i2c_pld_read_byte(gpio->client->addr); -+ -+ rt_mutex_unlock(&adap->bus_lock); -+ -+ return (value < 0) ? 0 : (value & (1 << offset)); -+} -+ -+static int gw_i2c_pld_output8(struct gpio_chip *chip, unsigned offset, int value) -+{ -+ int ret; -+ -+ struct gw_i2c_pld *gpio = container_of(chip, struct gw_i2c_pld, chip); -+ struct i2c_adapter *adap = gpio->client->adapter; -+ -+ unsigned bit = 1 << offset; -+ -+ if (in_atomic() || irqs_disabled()) { -+ ret = rt_mutex_trylock(&adap->bus_lock); -+ if (!ret) -+ /* I2C activity is ongoing. */ -+ return -EAGAIN; -+ } else { -+ rt_mutex_lock(&adap->bus_lock); -+ } -+ -+ -+ if (value) -+ gpio->out |= bit; -+ else -+ gpio->out &= ~bit; -+ -+ ret = i2c_pld_write_byte(gpio->client->addr, gpio->out); -+ -+ rt_mutex_unlock(&adap->bus_lock); -+ -+ return ret; -+} -+ -+static void gw_i2c_pld_set8(struct gpio_chip *chip, unsigned offset, int value) -+{ -+ gw_i2c_pld_output8(chip, offset, value); -+} -+ -+/*-------------------------------------------------------------------------*/ -+ -+static int gw_i2c_pld_probe(struct i2c_client *client, -+ const struct i2c_device_id *id) -+{ -+ struct gw_i2c_pld_platform_data *pdata; -+ struct gw_i2c_pld *gpio; -+ int status; -+ -+ pdata = client->dev.platform_data; -+ if (!pdata) -+ return -ENODEV; -+ -+ /* Allocate, initialize, and register this gpio_chip. */ -+ gpio = kzalloc(sizeof *gpio, GFP_KERNEL); -+ if (!gpio) -+ return -ENOMEM; -+ -+ gpio->chip.base = pdata->gpio_base; -+ gpio->chip.can_sleep = 1; -+ gpio->chip.dev = &client->dev; -+ gpio->chip.owner = THIS_MODULE; -+ -+ gpio->chip.ngpio = pdata->nr_gpio; -+ gpio->chip.direction_input = gw_i2c_pld_input8; -+ gpio->chip.get = gw_i2c_pld_get8; -+ gpio->chip.direction_output = gw_i2c_pld_output8; -+ gpio->chip.set = gw_i2c_pld_set8; -+ -+ gpio->chip.label = client->name; -+ -+ gpio->client = client; -+ i2c_set_clientdata(client, gpio); -+ -+ gpio->out = 0xFF; -+ -+ status = gpiochip_add(&gpio->chip); -+ if (status < 0) -+ goto fail; -+ -+ dev_info(&client->dev, "gpios %d..%d on a %s%s\n", -+ gpio->chip.base, -+ gpio->chip.base + gpio->chip.ngpio - 1, -+ client->name, -+ client->irq ? " (irq ignored)" : ""); -+ -+ /* Let platform code set up the GPIOs and their users. -+ * Now is the first time anyone could use them. -+ */ -+ if (pdata->setup) { -+ status = pdata->setup(client, -+ gpio->chip.base, gpio->chip.ngpio, -+ pdata->context); -+ if (status < 0) -+ dev_warn(&client->dev, "setup --> %d\n", status); -+ } -+ -+ return 0; -+ -+fail: -+ dev_dbg(&client->dev, "probe error %d for '%s'\n", -+ status, client->name); -+ kfree(gpio); -+ return status; -+} -+ -+static int gw_i2c_pld_remove(struct i2c_client *client) -+{ -+ struct gw_i2c_pld_platform_data *pdata = client->dev.platform_data; -+ struct gw_i2c_pld *gpio = i2c_get_clientdata(client); -+ int status = 0; -+ -+ if (pdata->teardown) { -+ status = pdata->teardown(client, -+ gpio->chip.base, gpio->chip.ngpio, -+ pdata->context); -+ if (status < 0) { -+ dev_err(&client->dev, "%s --> %d\n", -+ "teardown", status); -+ return status; -+ } -+ } -+ -+ gpiochip_remove(&gpio->chip); -+ kfree(gpio); -+ return 0; -+} -+ -+static struct i2c_driver gw_i2c_pld_driver = { -+ .driver = { -+ .name = "gw_i2c_pld", -+ .owner = THIS_MODULE, -+ }, -+ .probe = gw_i2c_pld_probe, -+ .remove = gw_i2c_pld_remove, -+ .id_table = gw_i2c_pld_id, -+}; -+ -+static int __init gw_i2c_pld_init(void) -+{ -+ return i2c_add_driver(&gw_i2c_pld_driver); -+} -+module_init(gw_i2c_pld_init); -+ -+static void __exit gw_i2c_pld_exit(void) -+{ -+ i2c_del_driver(&gw_i2c_pld_driver); -+} -+module_exit(gw_i2c_pld_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Chris Lang"); ---- /dev/null -+++ b/include/linux/i2c/gw_i2c_pld.h -@@ -0,0 +1,20 @@ -+#ifndef __LINUX_GW_I2C_PLD_H -+#define __LINUX_GW_I2C_PLD_H -+ -+/** -+ * The Gateworks I2C PLD Implements an additional 8 bits of GPIO through the PLD -+ */ -+ -+struct gw_i2c_pld_platform_data { -+ unsigned gpio_base; -+ unsigned nr_gpio; -+ int (*setup)(struct i2c_client *client, -+ int gpio, unsigned ngpio, -+ void *context); -+ int (*teardown)(struct i2c_client *client, -+ int gpio, unsigned ngpio, -+ void *context); -+ void *context; -+}; -+ -+#endif /* __LINUX_GW_I2C_PLD_H */ diff --git a/target/linux/ixp4xx/patches-4.4/030-gpio_line_config.patch b/target/linux/ixp4xx/patches-4.4/030-gpio_line_config.patch deleted file mode 100644 index 0e5179327..000000000 --- a/target/linux/ixp4xx/patches-4.4/030-gpio_line_config.patch +++ /dev/null @@ -1,73 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/common.c -+++ b/arch/arm/mach-ixp4xx/common.c -@@ -93,22 +93,7 @@ void __init ixp4xx_map_io(void) - /* - * GPIO-functions - */ --/* -- * The following converted to the real HW bits the gpio_line_config -- */ --/* GPIO pin types */ --#define IXP4XX_GPIO_OUT 0x1 --#define IXP4XX_GPIO_IN 0x2 -- --/* GPIO signal types */ --#define IXP4XX_GPIO_LOW 0 --#define IXP4XX_GPIO_HIGH 1 -- --/* GPIO Clocks */ --#define IXP4XX_GPIO_CLK_0 14 --#define IXP4XX_GPIO_CLK_1 15 -- --static void gpio_line_config(u8 line, u32 direction) -+void gpio_line_config(u8 line, u32 direction) - { - if (direction == IXP4XX_GPIO_IN) - *IXP4XX_GPIO_GPOER |= (1 << line); -@@ -116,17 +101,17 @@ static void gpio_line_config(u8 line, u3 - *IXP4XX_GPIO_GPOER &= ~(1 << line); - } - --static void gpio_line_get(u8 line, int *value) -+void gpio_line_get(u8 line, int *value) - { - *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; - } - --static void gpio_line_set(u8 line, int value) -+void gpio_line_set(u8 line, int value) - { -- if (value == IXP4XX_GPIO_HIGH) -- *IXP4XX_GPIO_GPOUTR |= (1 << line); -- else if (value == IXP4XX_GPIO_LOW) -+ if (value == IXP4XX_GPIO_LOW) - *IXP4XX_GPIO_GPOUTR &= ~(1 << line); -+ else -+ *IXP4XX_GPIO_GPOUTR |= (1 << line); - } - - /************************************************************************* ---- a/arch/arm/mach-ixp4xx/include/mach/platform.h -+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h -@@ -131,5 +131,21 @@ struct pci_sys_data; - extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); - extern struct pci_ops ixp4xx_ops; - -+/* GPIO pin types */ -+#define IXP4XX_GPIO_OUT 0x1 -+#define IXP4XX_GPIO_IN 0x2 -+ -+/* GPIO signal types */ -+#define IXP4XX_GPIO_LOW 0 -+#define IXP4XX_GPIO_HIGH 1 -+ -+/* GPIO Clocks */ -+#define IXP4XX_GPIO_CLK_0 14 -+#define IXP4XX_GPIO_CLK_1 15 -+ -+void gpio_line_config(u8 line, u32 direction); -+void gpio_line_get(u8 line, int *value); -+void gpio_line_set(u8 line, int value); -+ - #endif // __ASSEMBLY__ - diff --git a/target/linux/ixp4xx/patches-4.4/040-arm_mach_types.patch b/target/linux/ixp4xx/patches-4.4/040-arm_mach_types.patch deleted file mode 100644 index c6392ef2f..000000000 --- a/target/linux/ixp4xx/patches-4.4/040-arm_mach_types.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/arch/arm/tools/mach-types -+++ b/arch/arm/tools/mach-types -@@ -1006,3 +1006,15 @@ eco5_bx2 MACH_ECO5_BX2 ECO5_BX2 4572 - eukrea_cpuimx28sd MACH_EUKREA_CPUIMX28SD EUKREA_CPUIMX28SD 4573 - domotab MACH_DOMOTAB DOMOTAB 4574 - pfla03 MACH_PFLA03 PFLA03 4575 -+wg302v1 MACH_WG302V1 WG302V1 889 -+pronghorn MACH_PRONGHORN PRONGHORN 928 -+pronghorn_metro MACH_PRONGHORNMETRO PRONGHORNMETRO 1040 -+sidewinder MACH_SIDEWINDER SIDEWINDER 1041 -+wrt300nv2 MACH_WRT300NV2 WRT300NV2 1077 -+compex42x MACH_COMPEXWP18 COMPEXWP18 1273 -+cambria MACH_CAMBRIA CAMBRIA 1468 -+ap1000 MACH_AP1000 AP1000 1543 -+tw2662 MACH_TW2662 TW2662 1658 -+tw5334 MACH_TW5334 TW5334 1664 -+usr8200 MACH_USR8200 USR8200 1762 -+mi424wr MACH_MI424WR MI424WR 1778 diff --git a/target/linux/ixp4xx/patches-4.4/090-increase_entropy_pools.patch b/target/linux/ixp4xx/patches-4.4/090-increase_entropy_pools.patch deleted file mode 100644 index 3eea75b51..000000000 --- a/target/linux/ixp4xx/patches-4.4/090-increase_entropy_pools.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- a/drivers/char/random.c -+++ b/drivers/char/random.c -@@ -275,11 +275,11 @@ - /* - * Configuration information - */ --#define INPUT_POOL_SHIFT 12 -+#define INPUT_POOL_SHIFT 13 - #define INPUT_POOL_WORDS (1 << (INPUT_POOL_SHIFT-5)) --#define OUTPUT_POOL_SHIFT 10 -+#define OUTPUT_POOL_SHIFT 11 - #define OUTPUT_POOL_WORDS (1 << (OUTPUT_POOL_SHIFT-5)) --#define SEC_XFER_SIZE 512 -+#define SEC_XFER_SIZE 1024 - #define EXTRACT_SIZE 10 - - #define DEBUG_RANDOM_BOOT 0 diff --git a/target/linux/ixp4xx/patches-4.4/100-wg302v2_gateway7001_mac_plat_info.patch b/target/linux/ixp4xx/patches-4.4/100-wg302v2_gateway7001_mac_plat_info.patch deleted file mode 100644 index 317103fda..000000000 --- a/target/linux/ixp4xx/patches-4.4/100-wg302v2_gateway7001_mac_plat_info.patch +++ /dev/null @@ -1,78 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/gateway7001-setup.c -+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c -@@ -17,6 +17,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -75,9 +76,37 @@ static struct platform_device gateway700 - .resource = &gateway7001_uart_resource, - }; - -+static struct eth_plat_info gateway7001_plat_eth[] = { -+ { -+ .phy = 1, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 2, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device gateway7001_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = gateway7001_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = gateway7001_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ - static struct platform_device *gateway7001_devices[] __initdata = { - &gateway7001_flash, -- &gateway7001_uart -+ &gateway7001_uart, -+ &gateway7001_eth[0], -+ &gateway7001_eth[1], - }; - - static void __init gateway7001_init(void) ---- a/arch/arm/mach-ixp4xx/wg302v2-setup.c -+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c -@@ -76,9 +76,26 @@ static struct platform_device wg302v2_ua - .resource = &wg302v2_uart_resource, - }; - -+static struct eth_plat_info wg302v2_plat_eth[] = { -+ { -+ .phy = 8, -+ .rxq = 3, -+ .txreadyq = 20, -+ } -+}; -+ -+static struct platform_device wg302v2_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = wg302v2_plat_eth, -+ } -+}; -+ - static struct platform_device *wg302v2_devices[] __initdata = { - &wg302v2_flash, - &wg302v2_uart, -+ &wg302v2_eth[0], - }; - - static void __init wg302v2_init(void) diff --git a/target/linux/ixp4xx/patches-4.4/105-wg302v1_support.patch b/target/linux/ixp4xx/patches-4.4/105-wg302v1_support.patch deleted file mode 100644 index 8793549c6..000000000 --- a/target/linux/ixp4xx/patches-4.4/105-wg302v1_support.patch +++ /dev/null @@ -1,261 +0,0 @@ ---- a/arch/arm/configs/ixp4xx_defconfig -+++ b/arch/arm/configs/ixp4xx_defconfig -@@ -13,6 +13,7 @@ CONFIG_MACH_AVILA=y - CONFIG_MACH_LOFT=y - CONFIG_ARCH_ADI_COYOTE=y - CONFIG_MACH_GATEWAY7001=y -+CONFIG_MACH_WG302V1=y - CONFIG_MACH_WG302V2=y - CONFIG_ARCH_IXDP425=y - CONFIG_MACH_IXDPG425=y ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -45,6 +45,14 @@ config MACH_GATEWAY7001 - 7001 Access Point. For more information on this platform, - see http://openwrt.org - -+config MACH_WG302V1 -+ bool "Netgear WG302 v1 / WAG302 v1" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support Netgear's -+ WG302 v1 or WAG302 v1 Access Points. For more information -+ on this platform, see http://openwrt.org -+ - config MACH_WG302V2 - bool "Netgear WG302 v2 / WAG302 v2" - select PCI ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -15,6 +15,7 @@ obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-p - obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o - obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o - obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o -+obj-pci-$(CONFIG_MACH_WG302V1) += wg302v1-pci.o - obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o - obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o - obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o -@@ -33,6 +34,7 @@ obj-$(CONFIG_MACH_NSLU2) += nslu2-setup. - obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o - obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o - obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o -+obj-$(CONFIG_MACH_WG302V1) += wg302v1-setup.o - obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o - obj-$(CONFIG_MACH_FSG) += fsg-setup.o - obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/wg302v1-pci.c -@@ -0,0 +1,63 @@ -+/* -+ * arch/arch/mach-ixp4xx/wg302v1-pci.c -+ * -+ * PCI setup routines for the Netgear WG302 v1 and WAG302 v1 -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Software, Inc. -+ * -+ * Maintainer: Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+ -+void __init wg302v1_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init wg302v1_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 1) -+ return IRQ_IXP4XX_GPIO8; -+ else if (slot == 2) -+ return IRQ_IXP4XX_GPIO10; -+ else -+ return -1; -+} -+ -+struct hw_pci wg302v1_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = wg302v1_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = wg302v1_map_irq, -+}; -+ -+int __init wg302v1_pci_init(void) -+{ -+ if (machine_is_wg302v1()) -+ pci_common_init(&wg302v1_pci); -+ return 0; -+} -+ -+subsys_initcall(wg302v1_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c -@@ -0,0 +1,147 @@ -+/* -+ * arch/arm/mach-ixp4xx/wg302v1-setup.c -+ * -+ * Board setup for the Netgear WG302 v1 and WAG302 v1 -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct flash_platform_data wg302v1_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource wg302v1_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device wg302v1_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &wg302v1_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &wg302v1_flash_resource, -+}; -+ -+static struct resource wg302v1_uart_resources[] = { -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+ } -+}; -+ -+static struct plat_serial8250_port wg302v1_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device wg302v1_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = wg302v1_uart_data, -+ }, -+ .num_resources = 2, -+ .resource = wg302v1_uart_resources, -+}; -+ -+static struct eth_plat_info wg302v1_plat_eth[] = { -+ { -+ .phy = 30, -+ .rxq = 3, -+ .txreadyq = 20, -+ } -+}; -+ -+static struct platform_device wg302v1_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = wg302v1_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct platform_device *wg302v1_devices[] __initdata = { -+ &wg302v1_flash, -+ &wg302v1_uart, -+ &wg302v1_eth[0], -+}; -+ -+static void __init wg302v1_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ wg302v1_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ wg302v1_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; -+ -+ platform_add_devices(wg302v1_devices, ARRAY_SIZE(wg302v1_devices)); -+} -+ -+#ifdef CONFIG_MACH_WG302V1 -+MACHINE_START(WG302V1, "Netgear WG302 v1 / WAG302 v1") -+ /* Maintainer: Imre Kaloz */ -+ .fixup = wg302v1_fixup, -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = wg302v1_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+#endif diff --git a/target/linux/ixp4xx/patches-4.4/110-pronghorn_series_support.patch b/target/linux/ixp4xx/patches-4.4/110-pronghorn_series_support.patch deleted file mode 100644 index d1fdfcba4..000000000 --- a/target/linux/ixp4xx/patches-4.4/110-pronghorn_series_support.patch +++ /dev/null @@ -1,393 +0,0 @@ ---- a/arch/arm/configs/ixp4xx_defconfig -+++ b/arch/arm/configs/ixp4xx_defconfig -@@ -15,6 +15,8 @@ CONFIG_ARCH_ADI_COYOTE=y - CONFIG_MACH_GATEWAY7001=y - CONFIG_MACH_WG302V1=y - CONFIG_MACH_WG302V2=y -+CONFIG_MACH_PRONGHORN=y -+CONFIG_MACH_PRONGHORNMETRO=y - CONFIG_ARCH_IXDP425=y - CONFIG_MACH_IXDPG425=y - CONFIG_MACH_IXDP465=y ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -61,6 +61,22 @@ config MACH_WG302V2 - WG302 v2 or WAG302 v2 Access Points. For more information - on this platform, see http://openwrt.org - -+config MACH_PRONGHORN -+ bool "ADI Pronghorn series" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support the ADI -+ Engineering Pronghorn series. For more -+ information on this platform, see http://www.adiengineering.com -+ -+# -+# There're only minimal differences kernel-wise between the Pronghorn and -+# Pronghorn Metro boards - they use different chip selects to drive the -+# CF slot connected to the expansion bus, so we just enable them together. -+# -+config MACH_PRONGHORNMETRO -+ def_bool MACH_PRONGHORN -+ - config ARCH_IXDP425 - bool "IXDP425" - help ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -19,6 +19,7 @@ obj-pci-$(CONFIG_MACH_WG302V1) += wg302 - obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o - obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o - obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o -+obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o - - obj-y += common.o - -@@ -39,6 +40,7 @@ obj-$(CONFIG_MACH_WG302V2) += wg302v2-se - obj-$(CONFIG_MACH_FSG) += fsg-setup.o - obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o - obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o -+obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h -+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h -@@ -42,7 +42,8 @@ static __inline__ void __arch_decomp_set - */ - if (machine_is_adi_coyote() || machine_is_gtwx5715() || - machine_is_gateway7001() || machine_is_wg302v2() || -- machine_is_devixp() || machine_is_miccpt() || machine_is_mic256()) -+ machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() || -+ machine_is_pronghorn() || machine_is_pronghorn_metro()) - uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; - else - uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/pronghorn-pci.c -@@ -0,0 +1,69 @@ -+/* -+ * arch/arch/mach-ixp4xx/pronghorn-pci.c -+ * -+ * PCI setup routines for ADI Engineering Pronghorn series -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * -+ * Maintainer: Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+ -+void __init pronghorn_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init pronghorn_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 13) -+ return IRQ_IXP4XX_GPIO4; -+ else if (slot == 14) -+ return IRQ_IXP4XX_GPIO6; -+ else if (slot == 15) -+ return IRQ_IXP4XX_GPIO11; -+ else if (slot == 16) -+ return IRQ_IXP4XX_GPIO1; -+ else -+ return -1; -+} -+ -+struct hw_pci pronghorn_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = pronghorn_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = pronghorn_map_irq, -+}; -+ -+int __init pronghorn_pci_init(void) -+{ -+ if (machine_is_pronghorn() || machine_is_pronghorn_metro()) -+ pci_common_init(&pronghorn_pci); -+ return 0; -+} -+ -+subsys_initcall(pronghorn_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/pronghorn-setup.c -@@ -0,0 +1,252 @@ -+/* -+ * arch/arm/mach-ixp4xx/pronghorn-setup.c -+ * -+ * Board setup for the ADI Engineering Pronghorn series -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct flash_platform_data pronghorn_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource pronghorn_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device pronghorn_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &pronghorn_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &pronghorn_flash_resource, -+}; -+ -+static struct resource pronghorn_uart_resources [] = { -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ } -+}; -+ -+static struct plat_serial8250_port pronghorn_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device pronghorn_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = pronghorn_uart_data, -+ }, -+ .num_resources = 2, -+ .resource = pronghorn_uart_resources, -+}; -+ -+static struct i2c_gpio_platform_data pronghorn_i2c_gpio_data = { -+ .sda_pin = 9, -+ .scl_pin = 10, -+}; -+ -+static struct platform_device pronghorn_i2c_gpio = { -+ .name = "i2c-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &pronghorn_i2c_gpio_data, -+ }, -+}; -+ -+static struct gpio_led pronghorn_led_pin[] = { -+ { -+ .name = "pronghorn:green:status", -+ .gpio = 7, -+ } -+}; -+ -+static struct gpio_led_platform_data pronghorn_led_data = { -+ .num_leds = 1, -+ .leds = pronghorn_led_pin, -+}; -+ -+static struct platform_device pronghorn_led = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev.platform_data = &pronghorn_led_data, -+}; -+ -+static struct resource pronghorn_pata_resources[] = { -+ { -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .name = "intrq", -+ .start = IRQ_IXP4XX_GPIO0, -+ .end = IRQ_IXP4XX_GPIO0, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct ixp4xx_pata_data pronghorn_pata_data = { -+ .cs0_bits = 0xbfff0043, -+ .cs1_bits = 0xbfff0043, -+}; -+ -+static struct platform_device pronghorn_pata = { -+ .name = "pata_ixp4xx_cf", -+ .id = 0, -+ .dev.platform_data = &pronghorn_pata_data, -+ .num_resources = ARRAY_SIZE(pronghorn_pata_resources), -+ .resource = pronghorn_pata_resources, -+}; -+ -+static struct eth_plat_info pronghorn_plat_eth[] = { -+ { -+ .phy = 0, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 1, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device pronghorn_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = pronghorn_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = pronghorn_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct platform_device *pronghorn_devices[] __initdata = { -+ &pronghorn_flash, -+ &pronghorn_uart, -+ &pronghorn_led, -+ &pronghorn_eth[0], -+ &pronghorn_eth[1], -+}; -+ -+static void __init pronghorn_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ pronghorn_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ pronghorn_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; -+ -+ platform_add_devices(pronghorn_devices, ARRAY_SIZE(pronghorn_devices)); -+ -+ if (machine_is_pronghorn()) { -+ pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(2); -+ pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(2); -+ -+ pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(3); -+ pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(3); -+ -+ pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS2; -+ pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS3; -+ } else { -+ pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(3); -+ pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(3); -+ -+ pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(4); -+ pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(4); -+ -+ pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS3; -+ pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS4; -+ -+ platform_device_register(&pronghorn_i2c_gpio); -+ } -+ -+ platform_device_register(&pronghorn_pata); -+} -+ -+MACHINE_START(PRONGHORN, "ADI Engineering Pronghorn") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = pronghorn_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+ -+MACHINE_START(PRONGHORNMETRO, "ADI Engineering Pronghorn Metro") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = pronghorn_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END diff --git a/target/linux/ixp4xx/patches-4.4/111-pronghorn_swap_uarts.patch b/target/linux/ixp4xx/patches-4.4/111-pronghorn_swap_uarts.patch deleted file mode 100644 index ed9f7a785..000000000 --- a/target/linux/ixp4xx/patches-4.4/111-pronghorn_swap_uarts.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/pronghorn-setup.c -+++ b/arch/arm/mach-ixp4xx/pronghorn-setup.c -@@ -52,31 +52,31 @@ static struct platform_device pronghorn_ - - static struct resource pronghorn_uart_resources [] = { - { -- .start = IXP4XX_UART1_BASE_PHYS, -- .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, - .flags = IORESOURCE_MEM - }, - { -- .start = IXP4XX_UART2_BASE_PHYS, -- .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, - .flags = IORESOURCE_MEM - } - }; - - static struct plat_serial8250_port pronghorn_uart_data[] = { - { -- .mapbase = IXP4XX_UART1_BASE_PHYS, -- .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -- .irq = IRQ_IXP4XX_UART1, -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - .regshift = 2, - .uartclk = IXP4XX_UART_XTAL, - }, - { -- .mapbase = IXP4XX_UART2_BASE_PHYS, -- .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -- .irq = IRQ_IXP4XX_UART2, -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, - .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, - .iotype = UPIO_MEM, - .regshift = 2, diff --git a/target/linux/ixp4xx/patches-4.4/115-sidewinder_support.patch b/target/linux/ixp4xx/patches-4.4/115-sidewinder_support.patch deleted file mode 100644 index 20adbb5c0..000000000 --- a/target/linux/ixp4xx/patches-4.4/115-sidewinder_support.patch +++ /dev/null @@ -1,286 +0,0 @@ -From 95dac4a842a3c66f69f949b48f9075e16275f77b Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sun, 30 Jun 2013 15:48:47 +0200 -Subject: [PATCH 07/36] 115-sidewinder_support.patch - ---- - arch/arm/mach-ixp4xx/Kconfig | 10 +- - arch/arm/mach-ixp4xx/Makefile | 2 + - arch/arm/mach-ixp4xx/sidewinder-pci.c | 68 ++++++++++++++ - arch/arm/mach-ixp4xx/sidewinder-setup.c | 151 +++++++++++++++++++++++++++++++ - 4 files changed, 230 insertions(+), 1 deletion(-) - create mode 100644 arch/arm/mach-ixp4xx/sidewinder-pci.c - create mode 100644 arch/arm/mach-ixp4xx/sidewinder-setup.c - ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -77,6 +77,14 @@ config MACH_PRONGHORN - config MACH_PRONGHORNMETRO - def_bool MACH_PRONGHORN - -+config MACH_SIDEWINDER -+ bool "ADI Sidewinder" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support the ADI -+ Engineering Sidewinder board. For more information on this -+ platform, see http://www.adiengineering.com -+ - config ARCH_IXDP425 - bool "IXDP425" - help -@@ -173,7 +181,7 @@ config MACH_ARCOM_VULCAN - # - config CPU_IXP46X - bool -- depends on MACH_IXDP465 -+ depends on MACH_IXDP465 || MACH_SIDEWINDER - default y - - config CPU_IXP43X ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -20,6 +20,7 @@ obj-pci-$(CONFIG_MACH_WG302V2) += wg302 - obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o - obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o - obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o -+obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o - - obj-y += common.o - -@@ -41,6 +42,7 @@ obj-$(CONFIG_MACH_FSG) += fsg-setup.o - obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o - obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o - obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o -+obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/sidewinder-pci.c -@@ -0,0 +1,67 @@ -+/* -+ * arch/arch/mach-ixp4xx/pronghornmetro-pci.c -+ * -+ * PCI setup routines for ADI Engineering Sidewinder -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * -+ * Maintainer: Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+void __init sidewinder_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init sidewinder_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 1) -+ return IRQ_IXP4XX_GPIO11; -+ else if (slot == 2) -+ return IRQ_IXP4XX_GPIO10; -+ else if (slot == 3) -+ return IRQ_IXP4XX_GPIO9; -+ else -+ return -1; -+} -+ -+struct hw_pci sidewinder_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = sidewinder_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = sidewinder_map_irq, -+}; -+ -+int __init sidewinder_pci_init(void) -+{ -+ if (machine_is_sidewinder()) -+ pci_common_init(&sidewinder_pci); -+ return 0; -+} -+ -+subsys_initcall(sidewinder_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/sidewinder-setup.c -@@ -0,0 +1,155 @@ -+/* -+ * arch/arm/mach-ixp4xx/sidewinder-setup.c -+ * -+ * Board setup for the ADI Engineering Sidewinder -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+static struct flash_platform_data sidewinder_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource sidewinder_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device sidewinder_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &sidewinder_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &sidewinder_flash_resource, -+}; -+ -+static struct resource sidewinder_uart_resources[] = { -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+ } -+}; -+ -+static struct plat_serial8250_port sidewinder_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device sidewinder_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = sidewinder_uart_data, -+ }, -+ .num_resources = ARRAY_SIZE(sidewinder_uart_resources), -+ .resource = sidewinder_uart_resources, -+}; -+ -+static struct eth_plat_info sidewinder_plat_eth[] = { -+ { -+ .phy = 5, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0x1e, -+ .rxq = 4, -+ .txreadyq = 21, -+ }, { -+ .phy = 31, -+ .rxq = 2, -+ .txreadyq = 19, -+ } -+}; -+ -+static struct platform_device sidewinder_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = sidewinder_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = sidewinder_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEA, -+ .dev.platform_data = sidewinder_plat_eth + 2, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct platform_device *sidewinder_devices[] __initdata = { -+ &sidewinder_flash, -+ &sidewinder_uart, -+ &sidewinder_eth[0], -+ &sidewinder_eth[1], -+ &sidewinder_eth[2], -+}; -+ -+static void __init sidewinder_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ sidewinder_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ sidewinder_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_64M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; -+ -+ platform_add_devices(sidewinder_devices, ARRAY_SIZE(sidewinder_devices)); -+} -+ -+MACHINE_START(SIDEWINDER, "ADI Engineering Sidewinder") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = sidewinder_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END diff --git a/target/linux/ixp4xx/patches-4.4/116-sidewinder_fis_location.patch b/target/linux/ixp4xx/patches-4.4/116-sidewinder_fis_location.patch deleted file mode 100644 index 7d633f713..000000000 --- a/target/linux/ixp4xx/patches-4.4/116-sidewinder_fis_location.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -30,6 +30,8 @@ - #include - #include - -+#include -+ - struct fis_image_desc { - unsigned char name[16]; // Null terminated name - uint32_t flash_base; // Address within FLASH of image -@@ -47,7 +49,8 @@ struct fis_list { - struct fis_list *next; - }; - --static int directory = CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK; -+int directory = CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK; -+ - module_param(directory, int, 0); - - static inline int redboot_checksum(struct fis_image_desc *img) -@@ -75,6 +78,8 @@ static int parse_redboot_partitions(stru - #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED - static char nullstring[] = "unallocated"; - #endif -+ if (machine_is_sidewinder()) -+ directory = -5; - - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; diff --git a/target/linux/ixp4xx/patches-4.4/120-compex_support.patch b/target/linux/ixp4xx/patches-4.4/120-compex_support.patch deleted file mode 100644 index 2abc159f0..000000000 --- a/target/linux/ixp4xx/patches-4.4/120-compex_support.patch +++ /dev/null @@ -1,199 +0,0 @@ -From 24025a2dcf1248079dd3019fac6ed955252d277f Mon Sep 17 00:00:00 2001 -From: Imre Kaloz -Date: Mon, 14 Jul 2008 21:56:34 +0200 -Subject: [PATCH] Add support for the Compex WP18 / NP18A boards - -Signed-off-by: Imre Kaloz ---- - ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -85,6 +85,14 @@ config MACH_SIDEWINDER - Engineering Sidewinder board. For more information on this - platform, see http://www.adiengineering.com - -+config MACH_COMPEXWP18 -+ bool "Compex WP18 / NP18A" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support Compex' -+ WP18 or NP18A boards. For more information on this -+ platform, see http://www.compex.com.sg/home/OEM/product_ap.htm -+ - config ARCH_IXDP425 - bool "IXDP425" - help ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -21,6 +21,7 @@ obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o - obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o - obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o - obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o -+obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixdp425-pci.o - - obj-y += common.o - -@@ -43,6 +44,7 @@ obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_ - obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o - obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o - obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o -+obj-$(CONFIG_MACH_COMPEXWP18) += compex42x-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/compex42x-setup.c -@@ -0,0 +1,141 @@ -+/* -+ * arch/arm/mach-ixp4xx/compex-setup.c -+ * -+ * Compex WP18 / NP18A board-setup -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+static struct flash_platform_data compex42x_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource compex42x_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device compex42x_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &compex42x_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &compex42x_flash_resource, -+}; -+ -+static struct resource compex42x_uart_resources[] = { -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ } -+}; -+ -+static struct plat_serial8250_port compex42x_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device compex42x_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev.platform_data = compex42x_uart_data, -+ .num_resources = 2, -+ .resource = compex42x_uart_resources, -+}; -+ -+static struct eth_plat_info compex42x_plat_eth[] = { -+ { -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0xf0000, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 3, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device compex42x_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = compex42x_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = compex42x_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct platform_device *compex42x_devices[] __initdata = { -+ &compex42x_flash, -+ &compex42x_uart, -+ &compex42x_eth[0], -+ &compex42x_eth[1], -+}; -+ -+static void __init compex42x_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ compex42x_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ compex42x_flash_resource.end = -+ IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ platform_add_devices(compex42x_devices, ARRAY_SIZE(compex42x_devices)); -+} -+ -+MACHINE_START(COMPEXWP18, "Compex WP18 / NP18A") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = compex42x_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END ---- a/arch/arm/mach-ixp4xx/ixdp425-pci.c -+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c -@@ -69,7 +69,8 @@ struct hw_pci ixdp425_pci __initdata = { - int __init ixdp425_pci_init(void) - { - if (machine_is_ixdp425() || machine_is_ixcdp1100() || -- machine_is_ixdp465() || machine_is_kixrp435()) -+ machine_is_ixdp465() || machine_is_kixrp435() || -+ machine_is_compex42x()) - pci_common_init(&ixdp425_pci); - return 0; - } diff --git a/target/linux/ixp4xx/patches-4.4/130-wrt300nv2_support.patch b/target/linux/ixp4xx/patches-4.4/130-wrt300nv2_support.patch deleted file mode 100644 index 49359be44..000000000 --- a/target/linux/ixp4xx/patches-4.4/130-wrt300nv2_support.patch +++ /dev/null @@ -1,227 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -93,6 +93,14 @@ config MACH_COMPEXWP18 - WP18 or NP18A boards. For more information on this - platform, see http://www.compex.com.sg/home/OEM/product_ap.htm - -+config MACH_WRT300NV2 -+ bool "Linksys WRT300N v2" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support Linksys' -+ WRT300N v2 router. For more information on this -+ platform, see http://openwrt.org -+ - config ARCH_IXDP425 - bool "IXDP425" - help ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -22,6 +22,7 @@ obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += v - obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o - obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o - obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixdp425-pci.o -+obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o - - obj-y += common.o - -@@ -45,6 +46,7 @@ obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulca - obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o - obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o - obj-$(CONFIG_MACH_COMPEXWP18) += compex42x-setup.o -+obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h -+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h -@@ -43,7 +43,8 @@ static __inline__ void __arch_decomp_set - if (machine_is_adi_coyote() || machine_is_gtwx5715() || - machine_is_gateway7001() || machine_is_wg302v2() || - machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() || -- machine_is_pronghorn() || machine_is_pronghorn_metro()) -+ machine_is_pronghorn() || machine_is_pronghorn_metro() || -+ machine_is_wrt300nv2()) - uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; - else - uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/wrt300nv2-pci.c -@@ -0,0 +1,64 @@ -+/* -+ * arch/arch/mach-ixp4xx/wrt300nv2-pci.c -+ * -+ * PCI setup routines for Linksys WRT300N v2 -+ * -+ * Copyright (C) 2007 Imre Kaloz -+ * -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * -+ * Maintainer: Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+extern void ixp4xx_pci_preinit(void); -+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); -+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); -+ -+void __init wrt300nv2_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init wrt300nv2_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 1) -+ return IRQ_IXP4XX_GPIO8; -+ else return -1; -+} -+ -+struct hw_pci wrt300nv2_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = wrt300nv2_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = wrt300nv2_map_irq, -+}; -+ -+int __init wrt300nv2_pci_init(void) -+{ -+ if (machine_is_wrt300nv2()) -+ pci_common_init(&wrt300nv2_pci); -+ return 0; -+} -+ -+subsys_initcall(wrt300nv2_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/wrt300nv2-setup.c -@@ -0,0 +1,110 @@ -+/* -+ * arch/arm/mach-ixp4xx/wrt300nv2-setup.c -+ * -+ * Board setup for the Linksys WRT300N v2 -+ * -+ * Copyright (C) 2007 Imre Kaloz -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct flash_platform_data wrt300nv2_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource wrt300nv2_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device wrt300nv2_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &wrt300nv2_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &wrt300nv2_flash_resource, -+}; -+ -+static struct resource wrt300nv2_uart_resource = { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct plat_serial8250_port wrt300nv2_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device wrt300nv2_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = wrt300nv2_uart_data, -+ }, -+ .num_resources = 1, -+ .resource = &wrt300nv2_uart_resource, -+}; -+ -+static struct platform_device *wrt300nv2_devices[] __initdata = { -+ &wrt300nv2_flash, -+ &wrt300nv2_uart -+}; -+ -+static void __init wrt300nv2_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ wrt300nv2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ wrt300nv2_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; -+ -+ platform_add_devices(wrt300nv2_devices, ARRAY_SIZE(wrt300nv2_devices)); -+} -+ -+#ifdef CONFIG_MACH_WRT300NV2 -+MACHINE_START(WRT300NV2, "Linksys WRT300N v2") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = wrt300nv2_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+#endif diff --git a/target/linux/ixp4xx/patches-4.4/131-wrt300nv2_mac_plat_info.patch b/target/linux/ixp4xx/patches-4.4/131-wrt300nv2_mac_plat_info.patch deleted file mode 100644 index 5debbf107..000000000 --- a/target/linux/ixp4xx/patches-4.4/131-wrt300nv2_mac_plat_info.patch +++ /dev/null @@ -1,42 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/wrt300nv2-setup.c -+++ b/arch/arm/mach-ixp4xx/wrt300nv2-setup.c -@@ -76,9 +76,38 @@ static struct platform_device wrt300nv2_ - .resource = &wrt300nv2_uart_resource, - }; - -+/* Built-in 10/100 Ethernet MAC interfaces */ -+static struct eth_plat_info wrt300nv2_plat_eth[] = { -+ { -+ .phy = -1, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 1, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device wrt300nv2_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = wrt300nv2_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = wrt300nv2_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ - static struct platform_device *wrt300nv2_devices[] __initdata = { - &wrt300nv2_flash, -- &wrt300nv2_uart -+ &wrt300nv2_uart, -+ &wrt300nv2_eth[0], -+ &wrt300nv2_eth[1], - }; - - static void __init wrt300nv2_init(void) diff --git a/target/linux/ixp4xx/patches-4.4/132-wrt300nv2_mac_fix.patch b/target/linux/ixp4xx/patches-4.4/132-wrt300nv2_mac_fix.patch deleted file mode 100644 index 99db2673d..000000000 --- a/target/linux/ixp4xx/patches-4.4/132-wrt300nv2_mac_fix.patch +++ /dev/null @@ -1,72 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/wrt300nv2-setup.c -+++ b/arch/arm/mach-ixp4xx/wrt300nv2-setup.c -@@ -3,6 +3,7 @@ - * - * Board setup for the Linksys WRT300N v2 - * -+ * Copyright (C) 2010 Alexandros C. Couloumbis - * Copyright (C) 2007 Imre Kaloz - * - * based on coyote-setup.c: -@@ -18,6 +19,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -79,7 +81,8 @@ static struct platform_device wrt300nv2_ - /* Built-in 10/100 Ethernet MAC interfaces */ - static struct eth_plat_info wrt300nv2_plat_eth[] = { - { -- .phy = -1, -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0x0F0000, - .rxq = 3, - .txreadyq = 20, - }, { -@@ -112,6 +115,10 @@ static struct platform_device *wrt300nv2 - - static void __init wrt300nv2_init(void) - { -+ uint8_t __iomem *f; -+ int offset = 0; -+ int i; -+ - ixp4xx_sys_init(); - - wrt300nv2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -@@ -121,6 +128,32 @@ static void __init wrt300nv2_init(void) - *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; - - platform_add_devices(wrt300nv2_devices, ARRAY_SIZE(wrt300nv2_devices)); -+ -+ f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x60000); -+ -+ if (f) { -+ for (i = 0; i < 6; i++) { -+#ifdef __ARMEB__ -+ wrt300nv2_plat_eth[0].hwaddr[i] = readb(f + 0x5FFA0 + i); -+ if (i == 5) -+ offset = 1; -+ wrt300nv2_plat_eth[1].hwaddr[i] = (wrt300nv2_plat_eth[0].hwaddr[i] + offset); -+#else -+ wrt300nv2_plat_eth[0].hwaddr[i] = readb(f + 0x5FFA0 + (i^3)); -+ if (i == 5) -+ offset = 1; -+ wrt300nv2_plat_eth[1].hwaddr[i] = (wrt300nv2_plat_eth[0].hwaddr[i] + offset); -+#endif -+ } -+ iounmap(f); -+ } -+ -+ if (!(is_valid_ether_addr(wrt300nv2_plat_eth[0].hwaddr))) -+ random_ether_addr(wrt300nv2_plat_eth[0].hwaddr); -+ if (!(is_valid_ether_addr(wrt300nv2_plat_eth[1].hwaddr))) { -+ memcpy(wrt300nv2_plat_eth[1].hwaddr, wrt300nv2_plat_eth[0].hwaddr, ETH_ALEN); -+ wrt300nv2_plat_eth[1].hwaddr[5] = (wrt300nv2_plat_eth[0].hwaddr[5] + 1); -+ } - } - - #ifdef CONFIG_MACH_WRT300NV2 diff --git a/target/linux/ixp4xx/patches-4.4/150-lanready_ap1000_support.patch b/target/linux/ixp4xx/patches-4.4/150-lanready_ap1000_support.patch deleted file mode 100644 index ad09efdc2..000000000 --- a/target/linux/ixp4xx/patches-4.4/150-lanready_ap1000_support.patch +++ /dev/null @@ -1,203 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -101,6 +101,14 @@ config MACH_WRT300NV2 - WRT300N v2 router. For more information on this - platform, see http://openwrt.org - -+config MACH_AP1000 -+ bool "Lanready AP-1000" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support Lanready's -+ AP1000 board. For more information on this -+ platform, see http://openwrt.org -+ - config ARCH_IXDP425 - bool "IXDP425" - help ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -23,6 +23,7 @@ obj-pci-$(CONFIG_MACH_PRONGHORN) += pron - obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o - obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixdp425-pci.o - obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o -+obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o - - obj-y += common.o - -@@ -47,6 +48,7 @@ obj-$(CONFIG_MACH_PRONGHORN) += pronghor - obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o - obj-$(CONFIG_MACH_COMPEXWP18) += compex42x-setup.o - obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o -+obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/ap1000-setup.c -@@ -0,0 +1,154 @@ -+/* -+ * arch/arm/mach-ixp4xx/ap1000-setup.c -+ * -+ * Lanready AP-1000 -+ * -+ * Copyright (C) 2007 Imre Kaloz -+ * -+ * based on ixdp425-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct flash_platform_data ap1000_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource ap1000_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device ap1000_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &ap1000_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &ap1000_flash_resource, -+}; -+ -+static struct resource ap1000_uart_resources[] = { -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ } -+}; -+ -+static struct plat_serial8250_port ap1000_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device ap1000_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev.platform_data = ap1000_uart_data, -+ .num_resources = 2, -+ .resource = ap1000_uart_resources -+}; -+ -+static struct platform_device *ap1000_devices[] __initdata = { -+ &ap1000_flash, -+ &ap1000_uart -+}; -+ -+static char ap1000_mem_fixup[] __initdata = "mem=64M "; -+ -+static void __init ap1000_fixup(struct machine_desc *desc, -+ struct tag *tags, char **cmdline, struct meminfo *mi) -+ -+{ -+ struct tag *t = tags; -+ char *p = *cmdline; -+ -+ /* Find the end of the tags table, taking note of any cmdline tag. */ -+ for (; t->hdr.size; t = tag_next(t)) { -+ if (t->hdr.tag == ATAG_CMDLINE) { -+ p = t->u.cmdline.cmdline; -+ } -+ } -+ -+ /* Overwrite the end of the table with a new cmdline tag. */ -+ t->hdr.tag = ATAG_CMDLINE; -+ t->hdr.size = (sizeof (struct tag_header) + -+ strlen(ap1000_mem_fixup) + strlen(p) + 1 + 4) >> 2; -+ strlcpy(t->u.cmdline.cmdline, ap1000_mem_fixup, COMMAND_LINE_SIZE); -+ strlcpy(t->u.cmdline.cmdline + strlen(ap1000_mem_fixup), p, -+ COMMAND_LINE_SIZE - strlen(ap1000_mem_fixup)); -+ -+ /* Terminate the table. */ -+ t = tag_next(t); -+ t->hdr.tag = ATAG_NONE; -+ t->hdr.size = 0; -+} -+ -+static void __init ap1000_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ ap1000_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ ap1000_flash_resource.end = -+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; -+ -+ platform_add_devices(ap1000_devices, ARRAY_SIZE(ap1000_devices)); -+} -+ -+#ifdef CONFIG_MACH_AP1000 -+MACHINE_START(AP1000, "Lanready AP-1000") -+ /* Maintainer: Imre Kaloz */ -+ .fixup = ap1000_fixup, -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = ap1000_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+#endif ---- a/arch/arm/mach-ixp4xx/ixdp425-pci.c -+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c -@@ -70,7 +70,7 @@ int __init ixdp425_pci_init(void) - { - if (machine_is_ixdp425() || machine_is_ixcdp1100() || - machine_is_ixdp465() || machine_is_kixrp435() || -- machine_is_compex42x()) -+ machine_is_compex42x() || machine_is_ap1000()) - pci_common_init(&ixdp425_pci); - return 0; - } diff --git a/target/linux/ixp4xx/patches-4.4/151-lanready_ap1000_mac_plat_info.patch b/target/linux/ixp4xx/patches-4.4/151-lanready_ap1000_mac_plat_info.patch deleted file mode 100644 index 2079589a7..000000000 --- a/target/linux/ixp4xx/patches-4.4/151-lanready_ap1000_mac_plat_info.patch +++ /dev/null @@ -1,51 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/ap1000-setup.c -+++ b/arch/arm/mach-ixp4xx/ap1000-setup.c -@@ -91,15 +91,45 @@ static struct platform_device ap1000_uar - .resource = ap1000_uart_resources - }; - -+/* Built-in 10/100 Ethernet MAC interfaces */ -+static struct eth_plat_info ap1000_plat_eth[] = { -+ { -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0x1e, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 5, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device ap1000_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = ap1000_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = ap1000_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ - static struct platform_device *ap1000_devices[] __initdata = { - &ap1000_flash, -- &ap1000_uart -+ &ap1000_uart, -+ &ap1000_eth[0], -+ &ap1000_eth[1], - }; - - static char ap1000_mem_fixup[] __initdata = "mem=64M "; - --static void __init ap1000_fixup(struct machine_desc *desc, -- struct tag *tags, char **cmdline, struct meminfo *mi) -+static void __init ap1000_fixup(struct tag *tags, char **cmdline, -+ struct meminfo *mi) - - { - struct tag *t = tags; diff --git a/target/linux/ixp4xx/patches-4.4/160-delayed_uart_io.patch b/target/linux/ixp4xx/patches-4.4/160-delayed_uart_io.patch deleted file mode 100644 index 937a65e43..000000000 --- a/target/linux/ixp4xx/patches-4.4/160-delayed_uart_io.patch +++ /dev/null @@ -1,133 +0,0 @@ ---- a/drivers/tty/serial/8250/8250_core.c -+++ b/drivers/tty/serial/8250/8250_core.c -@@ -825,6 +825,7 @@ static int serial8250_probe(struct platf - uart.port.set_termios = p->set_termios; - uart.port.pm = p->pm; - uart.port.dev = &dev->dev; -+ uart.port.rw_delay = p->rw_delay; - uart.port.irqflags |= irqflag; - ret = serial8250_register_8250_port(&uart); - if (ret < 0) { -@@ -981,6 +982,7 @@ int serial8250_register_8250_port(struct - uart->bugs = up->bugs; - uart->port.mapbase = up->port.mapbase; - uart->port.mapsize = up->port.mapsize; -+ uart->port.rw_delay = up->port.rw_delay; - uart->port.private_data = up->port.private_data; - uart->tx_loadsz = up->tx_loadsz; - uart->capabilities = up->capabilities; ---- a/drivers/tty/serial/serial_core.c -+++ b/drivers/tty/serial/serial_core.c -@@ -2185,6 +2185,7 @@ uart_report_port(struct uart_driver *drv - snprintf(address, sizeof(address), - "I/O 0x%lx offset 0x%x", port->iobase, port->hub6); - break; -+ case UPIO_MEM_DELAY: - case UPIO_MEM: - case UPIO_MEM32: - case UPIO_MEM32BE: -@@ -2830,6 +2831,7 @@ int uart_match_port(struct uart_port *po - case UPIO_HUB6: - return (port1->iobase == port2->iobase) && - (port1->hub6 == port2->hub6); -+ case UPIO_MEM_DELAY: - case UPIO_MEM: - case UPIO_MEM32: - case UPIO_MEM32BE: ---- a/include/linux/serial_8250.h -+++ b/include/linux/serial_8250.h -@@ -28,6 +28,7 @@ struct plat_serial8250_port { - void *private_data; - unsigned char regshift; /* register shift */ - unsigned char iotype; /* UPIO_* */ -+ unsigned int rw_delay; /* udelay for slower busses IXP4XX Expansion Bus */ - unsigned char hub6; - upf_t flags; /* UPF_* flags */ - unsigned int type; /* If UPF_FIXED_TYPE */ ---- a/include/linux/serial_core.h -+++ b/include/linux/serial_core.h -@@ -150,6 +150,7 @@ struct uart_port { - #define UPIO_AU (SERIAL_IO_AU) /* Au1x00 and RT288x type IO */ - #define UPIO_TSI (SERIAL_IO_TSI) /* Tsi108/109 type IO */ - #define UPIO_MEM32BE (SERIAL_IO_MEM32BE) /* 32b big endian */ -+#define UPIO_MEM_DELAY (SERIAL_IO_MEM_DELAY) - - unsigned int read_status_mask; /* driver specific */ - unsigned int ignore_status_mask; /* driver specific */ -@@ -231,6 +232,7 @@ struct uart_port { - int hw_stopped; /* sw-assisted CTS flow state */ - unsigned int mctrl; /* current modem ctrl settings */ - unsigned int timeout; /* character-based timeout */ -+ unsigned int rw_delay; /* udelay for slow busses, IXP4XX Expansion Bus */ - unsigned int type; /* port type */ - const struct uart_ops *ops; - unsigned int custom_divisor; ---- a/include/uapi/linux/serial.h -+++ b/include/uapi/linux/serial.h -@@ -69,6 +69,7 @@ struct serial_struct { - #define SERIAL_IO_AU 4 - #define SERIAL_IO_TSI 5 - #define SERIAL_IO_MEM32BE 6 -+#define SERIAL_IO_MEM_DELAY 7 - - #define UART_CLEAR_FIFO 0x01 - #define UART_USE_FIFO 0x02 ---- a/drivers/tty/serial/8250/8250_port.c -+++ b/drivers/tty/serial/8250/8250_port.c -@@ -368,6 +368,20 @@ static void mem_serial_out(struct uart_p - writeb(value, p->membase + offset); - } - -+static unsigned int memdelay_serial_in(struct uart_port *p, int offset) -+{ -+ struct uart_8250_port *up = (struct uart_8250_port *)p; -+ udelay(up->port.rw_delay); -+ return mem_serial_in(p, offset); -+} -+ -+static void memdelay_serial_out(struct uart_port *p, int offset, int value) -+{ -+ struct uart_8250_port *up = (struct uart_8250_port *)p; -+ udelay(up->port.rw_delay); -+ mem_serial_out(p, offset, value); -+} -+ - static void mem32_serial_out(struct uart_port *p, int offset, int value) - { - offset = offset << p->regshift; -@@ -435,6 +449,11 @@ static void set_io_from_upio(struct uart - p->serial_out = mem32be_serial_out; - break; - -+ case UPIO_MEM_DELAY: -+ p->serial_in = memdelay_serial_in; -+ p->serial_out = memdelay_serial_out; -+ break; -+ - #ifdef CONFIG_SERIAL_8250_RT288X - case UPIO_AU: - p->serial_in = au_serial_in; -@@ -461,6 +480,7 @@ serial_port_out_sync(struct uart_port *p - case UPIO_MEM: - case UPIO_MEM32: - case UPIO_MEM32BE: -+ case UPIO_MEM_DELAY: - case UPIO_AU: - p->serial_out(p, offset, value); - p->serial_in(p, UART_LCR); /* safe, no side-effects */ -@@ -2460,6 +2480,7 @@ static int serial8250_request_std_resour - case UPIO_MEM32: - case UPIO_MEM32BE: - case UPIO_MEM: -+ case UPIO_MEM_DELAY: - if (!port->mapbase) - break; - -@@ -2497,6 +2518,7 @@ static void serial8250_release_std_resou - case UPIO_MEM32: - case UPIO_MEM32BE: - case UPIO_MEM: -+ case UPIO_MEM_DELAY: - if (!port->mapbase) - break; - diff --git a/target/linux/ixp4xx/patches-4.4/162-wg302v1_mem_fixup.patch b/target/linux/ixp4xx/patches-4.4/162-wg302v1_mem_fixup.patch deleted file mode 100644 index 75212bc2e..000000000 --- a/target/linux/ixp4xx/patches-4.4/162-wg302v1_mem_fixup.patch +++ /dev/null @@ -1,38 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/wg302v1-setup.c -+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c -@@ -117,6 +117,35 @@ static struct platform_device *wg302v1_d - &wg302v1_eth[0], - }; - -+static char wg302v1_mem_fixup[] __initdata = " mem=32M"; -+ -+static void __init wg302v1_fixup(struct tag *tags, char **cmdline, -+ struct meminfo *mi) -+{ -+ struct tag *t = tags; -+ char *p = *cmdline; -+ size_t fixlen, cmdlen; -+ -+ /* Find the end of the tags table, taking note of any cmdline tag. */ -+ for (; t->hdr.size; t = tag_next(t)) { -+ if (t->hdr.tag == ATAG_CMDLINE) { -+ p = t->u.cmdline.cmdline; -+ } -+ } -+ -+ fixlen = strlen(wg302v1_mem_fixup); -+ cmdlen = strlen(p); -+ if (fixlen + cmdlen >= COMMAND_LINE_SIZE) -+ return; -+ -+ /* append the fixup to the cmdline */ -+ memmove(p + cmdlen, wg302v1_mem_fixup, fixlen + 1); -+ -+ /* Adjust the size of the atag if there was one */ -+ if (t->hdr.size) -+ t->hdr.size += fixlen; -+} -+ - static void __init wg302v1_init(void) - { - ixp4xx_sys_init(); diff --git a/target/linux/ixp4xx/patches-4.4/170-ixdpg425_mac_plat_info.patch b/target/linux/ixp4xx/patches-4.4/170-ixdpg425_mac_plat_info.patch deleted file mode 100644 index f7090cd1b..000000000 --- a/target/linux/ixp4xx/patches-4.4/170-ixdpg425_mac_plat_info.patch +++ /dev/null @@ -1,51 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/coyote-setup.c -+++ b/arch/arm/mach-ixp4xx/coyote-setup.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -81,9 +82,39 @@ static struct platform_device coyote_uar - .resource = &coyote_uart_resource, - }; - -+/* Built-in 10/100 Ethernet MAC interfaces */ -+static struct eth_plat_info ixdpg425_plat_eth[] = { -+ { -+ .phy = 5, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 4, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device ixdpg425_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = ixdpg425_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = ixdpg425_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+ - static struct platform_device *coyote_devices[] __initdata = { - &coyote_flash, -- &coyote_uart -+ &coyote_uart, -+ &ixdpg425_eth[0], -+ &ixdpg425_eth[1], - }; - - static void __init coyote_init(void) diff --git a/target/linux/ixp4xx/patches-4.4/175-avila_hss_audio_support.patch b/target/linux/ixp4xx/patches-4.4/175-avila_hss_audio_support.patch deleted file mode 100644 index 72ccc00f3..000000000 --- a/target/linux/ixp4xx/patches-4.4/175-avila_hss_audio_support.patch +++ /dev/null @@ -1,2093 +0,0 @@ ---- a/sound/soc/Kconfig -+++ b/sound/soc/Kconfig -@@ -46,6 +46,7 @@ source "sound/soc/cirrus/Kconfig" - source "sound/soc/davinci/Kconfig" - source "sound/soc/dwc/Kconfig" - source "sound/soc/fsl/Kconfig" -+source "sound/soc/gw-avila/Kconfig" - source "sound/soc/jz4740/Kconfig" - source "sound/soc/nuc900/Kconfig" - source "sound/soc/omap/Kconfig" ---- a/sound/soc/Makefile -+++ b/sound/soc/Makefile -@@ -26,6 +26,7 @@ obj-$(CONFIG_SND_SOC) += cirrus/ - obj-$(CONFIG_SND_SOC) += davinci/ - obj-$(CONFIG_SND_SOC) += dwc/ - obj-$(CONFIG_SND_SOC) += fsl/ -+obj-$(CONFIG_SND_SOC) += gw-avila/ - obj-$(CONFIG_SND_SOC) += jz4740/ - obj-$(CONFIG_SND_SOC) += intel/ - obj-$(CONFIG_SND_SOC) += mediatek/ ---- /dev/null -+++ b/sound/soc/gw-avila/Kconfig -@@ -0,0 +1,17 @@ -+config SND_GW_AVILA_SOC_PCM -+ tristate -+ -+config SND_GW_AVILA_SOC_HSS -+ tristate -+ -+config SND_GW_AVILA_SOC -+ tristate "SoC Audio for the Gateworks AVILA Family" -+ depends on ARCH_IXP4XX && SND_SOC -+ select SND_GW_AVILA_SOC_PCM -+ select SND_GW_AVILA_SOC_HSS -+ select SND_SOC_TLV320AIC3X -+ help -+ Say Y or M if you want to add support for codecs attached to -+ the Gateworks HSS interface. You will also need -+ to select the audio interfaces to support below. -+ ---- /dev/null -+++ b/sound/soc/gw-avila/Makefile -@@ -0,0 +1,8 @@ -+# Gateworks Avila HSS Platform Support -+snd-soc-gw-avila-objs := gw-avila.o ixp4xx_hss.o -+snd-soc-gw-avila-pcm-objs := gw-avila-pcm.o -+snd-soc-gw-avila-hss-objs := gw-avila-hss.o -+ -+obj-$(CONFIG_SND_GW_AVILA_SOC) += snd-soc-gw-avila.o -+obj-$(CONFIG_SND_GW_AVILA_SOC_PCM) += snd-soc-gw-avila-pcm.o -+obj-$(CONFIG_SND_GW_AVILA_SOC_HSS) += snd-soc-gw-avila-hss.o ---- /dev/null -+++ b/sound/soc/gw-avila/gw-avila-hss.c -@@ -0,0 +1,103 @@ -+/* -+ * gw-avila-hss.c -- HSS Audio Support for Gateworks Avila -+ * -+ * Author: Chris Lang -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include "ixp4xx_hss.h" -+#include "gw-avila-hss.h" -+ -+#define gw_avila_hss_suspend NULL -+#define gw_avila_hss_resume NULL -+ -+struct snd_soc_dai_driver gw_avila_hss_dai = { -+ .playback = { -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | -+ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | -+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | -+ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | -+ SNDRV_PCM_RATE_KNOT), -+ .formats = SNDRV_PCM_FMTBIT_S16_LE, }, -+ .capture = { -+ .channels_min = 2, -+ .channels_max = 2, -+ .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | -+ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | -+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | -+ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | -+ SNDRV_PCM_RATE_KNOT), -+ .formats = SNDRV_PCM_FMTBIT_S16_LE, }, -+}; -+ -+static const struct snd_soc_component_driver gw_avila_hss_component = { -+ .name = "gw_avila_hss", -+}; -+ -+static int gw_avila_hss_probe(struct platform_device *pdev) -+{ -+ int port = (pdev->id < 2) ? 0 : 1; -+ int channel = (pdev->id % 2); -+ -+ hss_handle[pdev->id] = hss_init(port, channel); -+ if (!hss_handle[pdev->id]) { -+ return -ENODEV; -+ } -+ -+ return snd_soc_register_component(&pdev->dev, &gw_avila_hss_component, -+ &gw_avila_hss_dai, 1); -+} -+ -+static int gw_avila_hss_remove(struct platform_device *pdev) -+{ -+ snd_soc_unregister_component(&pdev->dev); -+ -+ return 0; -+} -+ -+static struct platform_driver gw_avila_hss_driver = { -+ .probe = gw_avila_hss_probe, -+ .remove = gw_avila_hss_remove, -+ .driver = { -+ .name = "gw_avila_hss", -+ .owner = THIS_MODULE, -+ } -+}; -+ -+static int __init gw_avila_hss_init(void) -+{ -+ return platform_driver_register(&gw_avila_hss_driver); -+} -+module_init(gw_avila_hss_init); -+ -+static void __exit gw_avila_hss_exit(void) -+{ -+ platform_driver_unregister(&gw_avila_hss_driver); -+} -+module_exit(gw_avila_hss_exit); -+ -+MODULE_AUTHOR("Chris Lang"); -+MODULE_DESCRIPTION("HSS Audio Driver for Gateworks Avila"); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/sound/soc/gw-avila/gw-avila-hss.h -@@ -0,0 +1,12 @@ -+/* -+ * Author: Chris Lang -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _GW_AVILA_HSS_H -+#define _GW_AVILA_HSS_H -+ -+#endif ---- /dev/null -+++ b/sound/soc/gw-avila/gw-avila-pcm.c -@@ -0,0 +1,327 @@ -+/* -+ * ALSA PCM interface for the TI DAVINCI processor -+ * -+ * Author: Chris Lang, -+ * Copyright: (C) 2009 Gateworks Corporation -+ * -+ * Based On: davinci-evm.c, Author: Vladimir Barinov, -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+ -+#include -+ -+#include "gw-avila-pcm.h" -+#include "gw-avila-hss.h" -+#include "ixp4xx_hss.h" -+ -+#define GW_AVILA_PCM_DEBUG 0 -+#if GW_AVILA_PCM_DEBUG -+#define DPRINTK(x...) printk(KERN_DEBUG x) -+#else -+#define DPRINTK(x...) -+#endif -+ -+static struct snd_pcm_hardware gw_avila_pcm_hardware = { -+ .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | -+ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), -+/* SNDRV_PCM_INFO_PAUSE),*/ -+ .formats = (SNDRV_PCM_FMTBIT_S16_LE), -+ .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | -+ SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | -+ SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | -+ SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | -+ SNDRV_PCM_RATE_KNOT), -+ .rate_min = 8000, -+ .rate_max = 8000, -+ .channels_min = 2, -+ .channels_max = 2, -+ .buffer_bytes_max = 64 * 1024, // All of the lines below may need to be changed -+ .period_bytes_min = 128, -+ .period_bytes_max = 4 * 1024, -+ .periods_min = 16, -+ .periods_max = 32, -+ .fifo_size = 0, -+}; -+ -+struct gw_avila_runtime_data { -+ spinlock_t lock; -+ int period; /* current DMA period */ -+ int master_lch; /* Master DMA channel */ -+ int slave_lch; /* Slave DMA channel */ -+ struct gw_avila_pcm_dma_params *params; /* DMA params */ -+}; -+ -+static void gw_avila_dma_irq(void *data) -+{ -+ struct snd_pcm_substream *substream = data; -+ snd_pcm_period_elapsed(substream); -+} -+ -+static int gw_avila_pcm_trigger(struct snd_pcm_substream *substream, int cmd) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct hss_device *hdev = runtime->private_data; -+ int ret = 0; -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ case SNDRV_PCM_TRIGGER_RESUME: -+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: -+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) -+ hss_tx_start(hdev); -+ else -+ hss_rx_start(hdev); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ case SNDRV_PCM_TRIGGER_SUSPEND: -+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH: -+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) -+ hss_tx_stop(hdev); -+ else -+ hss_rx_stop(hdev); -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ return ret; -+} -+ -+static int gw_avila_pcm_prepare(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct hss_device *hdev = runtime->private_data; -+ -+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { -+ hss_set_tx_callback(hdev, gw_avila_dma_irq, substream); -+ hss_config_tx_dma(hdev, runtime->dma_area, runtime->buffer_size, runtime->period_size); -+ } else { -+ hss_set_rx_callback(hdev, gw_avila_dma_irq, substream); -+ hss_config_rx_dma(hdev, runtime->dma_area, runtime->buffer_size, runtime->period_size); -+ } -+ -+ return 0; -+} -+ -+static snd_pcm_uframes_t -+gw_avila_pcm_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct hss_device *hdev = runtime->private_data; -+ -+ unsigned int curr = 0; -+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) -+ curr = hss_curr_offset_tx(hdev); -+ else -+ curr = hss_curr_offset_rx(hdev); -+ return curr; -+} -+ -+static int gw_avila_pcm_open(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ snd_soc_set_runtime_hwparams(substream, &gw_avila_pcm_hardware); -+ -+ if (hss_handle[cpu_dai->id] != NULL) -+ runtime->private_data = hss_handle[cpu_dai->id]; -+ else { -+ pr_err("hss_handle is NULL\n"); -+ return -1; -+ } -+ -+ hss_chan_open(hss_handle[cpu_dai->id]); -+ -+ return 0; -+} -+ -+static int gw_avila_pcm_close(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ struct hss_device *hdev = runtime->private_data; -+ -+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { -+ memset(hdev->tx_buf, 0, runtime->buffer_size); -+ } else -+ memset(hdev->rx_buf, 0, runtime->buffer_size); -+ -+ hss_chan_close(hdev); -+ -+ return 0; -+} -+ -+static int gw_avila_pcm_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ return snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+} -+ -+static int gw_avila_pcm_hw_free(struct snd_pcm_substream *substream) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) -+ memset(runtime->dma_area, 0, runtime->buffer_size); -+ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int gw_avila_pcm_mmap(struct snd_pcm_substream *substream, -+ struct vm_area_struct *vma) -+{ -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ return dma_mmap_writecombine(substream->pcm->card->dev, vma, -+ runtime->dma_area, -+ runtime->dma_addr, -+ runtime->dma_bytes); -+} -+ -+struct snd_pcm_ops gw_avila_pcm_ops = { -+ .open = gw_avila_pcm_open, -+ .close = gw_avila_pcm_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = gw_avila_pcm_hw_params, -+ .hw_free = gw_avila_pcm_hw_free, -+ .prepare = gw_avila_pcm_prepare, -+ .trigger = gw_avila_pcm_trigger, -+ .pointer = gw_avila_pcm_pointer, -+ .mmap = gw_avila_pcm_mmap, -+}; -+ -+static int gw_avila_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream) -+{ -+ struct snd_pcm_substream *substream = pcm->streams[stream].substream; -+ struct snd_dma_buffer *buf = &substream->dma_buffer; -+ size_t size = gw_avila_pcm_hardware.buffer_bytes_max; -+ -+ buf->dev.type = SNDRV_DMA_TYPE_DEV; -+ buf->dev.dev = pcm->card->dev; -+ buf->private_data = NULL; -+ -+ buf->area = dma_alloc_coherent(pcm->card->dev, size, -+ &buf->addr, GFP_KERNEL); -+ -+ if (!buf->area) { -+ return -ENOMEM; -+ } -+ -+ memset(buf->area, 0xff, size); -+ -+ DPRINTK("preallocate_dma_buffer: area=%p, addr=%p, size=%d\n", -+ (void *) buf->area, (void *) buf->addr, size); -+ -+ buf->bytes = size; -+ -+ return 0; -+} -+ -+static void gw_avila_pcm_free(struct snd_pcm *pcm) -+{ -+ struct snd_pcm_substream *substream; -+ struct snd_dma_buffer *buf; -+ int stream; -+ -+ for (stream = 0; stream < 2; stream++) { -+ substream = pcm->streams[stream].substream; -+ if (!substream) -+ continue; -+ -+ buf = &substream->dma_buffer; -+ if (!buf->area) -+ continue; -+ -+ dma_free_coherent(NULL, buf->bytes, buf->area, 0); -+ buf->area = NULL; -+ } -+} -+ -+static u64 gw_avila_pcm_dmamask = 0xFFFFFFFF; -+ -+static int gw_avila_pcm_new(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_card *card = rtd->card->snd_card; -+ struct snd_pcm *pcm = rtd->pcm; -+ struct snd_soc_dai *dai = rtd->codec_dai; -+ int ret; -+ -+ if (!card->dev->dma_mask) -+ card->dev->dma_mask = &gw_avila_pcm_dmamask; -+ if (!card->dev->coherent_dma_mask) -+ card->dev->coherent_dma_mask = 0xFFFFFFFF; -+ -+ if (dai->driver->playback.channels_min) { -+ ret = gw_avila_pcm_preallocate_dma_buffer(pcm, -+ SNDRV_PCM_STREAM_PLAYBACK); -+ if (ret) -+ return ret; -+ } -+ -+ if (dai->driver->capture.channels_min) { -+ ret = gw_avila_pcm_preallocate_dma_buffer(pcm, -+ SNDRV_PCM_STREAM_CAPTURE); -+ if (ret) -+ return ret; -+ } -+ -+ return 0; -+} -+ -+struct snd_soc_platform_driver gw_avila_soc_platform = { -+ .ops = &gw_avila_pcm_ops, -+ .pcm_new = gw_avila_pcm_new, -+ .pcm_free = gw_avila_pcm_free, -+}; -+ -+static int gw_avila_pcm_platform_probe(struct platform_device *pdev) -+{ -+ return snd_soc_register_platform(&pdev->dev, &gw_avila_soc_platform); -+} -+ -+static int gw_avila_pcm_platform_remove(struct platform_device *pdev) -+{ -+ snd_soc_unregister_platform(&pdev->dev); -+ return 0; -+} -+ -+static struct platform_driver gw_avila_pcm_driver = { -+ .driver = { -+ .name = "gw_avila-audio", -+ .owner = THIS_MODULE, -+ }, -+ .probe = gw_avila_pcm_platform_probe, -+ .remove = gw_avila_pcm_platform_remove, -+}; -+ -+static int __init gw_avila_soc_platform_init(void) -+{ -+ return platform_driver_register(&gw_avila_pcm_driver); -+} -+module_init(gw_avila_soc_platform_init); -+ -+static void __exit gw_avila_soc_platform_exit(void) -+{ -+ platform_driver_unregister(&gw_avila_pcm_driver); -+} -+module_exit(gw_avila_soc_platform_exit); -+ -+MODULE_AUTHOR("Chris Lang"); -+MODULE_DESCRIPTION("Gateworks Avila PCM DMA module"); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/sound/soc/gw-avila/gw-avila-pcm.h -@@ -0,0 +1,32 @@ -+/* -+ * ALSA PCM interface for the Gateworks Avila platform -+ * -+ * Author: Chris Lang, -+ * Copyright: (C) 2009 Gateworks Corporation -+ * -+ * Based On: davinci-evm.c, Author: Vladimir Barinov, -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef _GW_AVILA_PCM_H -+#define _GW_AVILA_PCM_H -+ -+#if 0 -+struct gw_avila_pcm_dma_params { -+ char *name; /* stream identifier */ -+ int channel; /* sync dma channel ID */ -+ dma_addr_t dma_addr; /* device physical address for DMA */ -+ unsigned int data_type; /* xfer data type */ -+}; -+ -+struct gw_avila_snd_platform_data { -+ int tx_dma_ch; // XXX Do we need this? -+ int rx_dma_ch; // XXX Do we need this -+}; -+extern struct snd_soc_platform gw_avila_soc_platform[]; -+#endif -+ -+#endif ---- /dev/null -+++ b/sound/soc/gw-avila/gw-avila.c -@@ -0,0 +1,244 @@ -+/* -+ * File: sound/soc/gw-avila/gw_avila.c -+ * Author: Chris Lang -+ * -+ * Created: Tue June 06 2008 -+ * Description: Board driver for Gateworks Avila -+ * -+ * Modified: -+ * Copyright 2009 Gateworks Corporation -+ * -+ * Bugs: What Bugs? -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, see the file COPYING, or write -+ * to the Free Software Foundation, Inc., -+ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "ixp4xx_hss.h" -+#include "gw-avila-hss.h" -+#include "gw-avila-pcm.h" -+ -+#define CODEC_FREQ 33333000 -+ -+static int gw_avila_board_startup(struct snd_pcm_substream *substream) -+{ -+ pr_debug("%s enter\n", __func__); -+ return 0; -+} -+ -+static int gw_avila_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ int ret = 0; -+ -+ /* set codec DAI configuration */ -+ if (cpu_dai->id % 2) { -+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_CBS_CFS); -+ snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 1, 32); -+ } else { -+ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_IB_NF | SND_SOC_DAIFMT_CBM_CFM); -+ snd_soc_dai_set_tdm_slot(codec_dai, 0, 0, 0, 32); -+ } -+ -+ if (ret < 0) -+ return ret; -+ -+ /* set the codec system clock */ -+ ret = snd_soc_dai_set_sysclk(codec_dai, 0, CODEC_FREQ, SND_SOC_CLOCK_OUT); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static const struct snd_soc_dapm_widget aic3x_dapm_widgets[] = { -+ SND_SOC_DAPM_HP("Headphone Jack", NULL), -+ SND_SOC_DAPM_LINE("Line Out", NULL), -+ SND_SOC_DAPM_LINE("Line In", NULL), -+}; -+ -+static const struct snd_soc_dapm_route audio_map[] = { -+ {"Headphone Jack", NULL, "HPLOUT"}, -+ {"Headphone Jack", NULL, "HPROUT"}, -+ -+ /* Line Out connected to LLOUT, RLOUT */ -+ {"Line Out", NULL, "LLOUT"}, -+ {"Line Out", NULL, "RLOUT"}, -+ -+ /* Line In connected to (LINE1L | LINE2L), (LINE1R | LINE2R) */ -+ {"LINE1L", NULL, "Line In"}, -+ {"LINE1R", NULL, "Line In"}, -+}; -+ -+/* Logic for a aic3x as connected on a davinci-evm */ -+static int avila_aic3x_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_codec *codec = rtd->codec; -+ struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); -+ -+ /* Add davinci-evm specific widgets */ -+ snd_soc_dapm_new_controls(dapm, aic3x_dapm_widgets, -+ ARRAY_SIZE(aic3x_dapm_widgets)); -+ -+ /* Set up davinci-evm specific audio path audio_map */ -+ snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); -+ -+ /* not connected */ -+ snd_soc_dapm_disable_pin(dapm, "MONO_LOUT"); -+ //snd_soc_dapm_disable_pin(dapm, "HPLCOM"); -+ //snd_soc_dapm_disable_pin(dapm, "HPRCOM"); -+ snd_soc_dapm_disable_pin(dapm, "MIC3L"); -+ snd_soc_dapm_disable_pin(dapm, "MIC3R"); -+ snd_soc_dapm_disable_pin(dapm, "LINE2L"); -+ snd_soc_dapm_disable_pin(dapm, "LINE2R"); -+ -+ /* always connected */ -+ snd_soc_dapm_enable_pin(dapm, "Headphone Jack"); -+ snd_soc_dapm_enable_pin(dapm, "Line Out"); -+ snd_soc_dapm_enable_pin(dapm, "Line In"); -+ -+ snd_soc_dapm_sync(dapm); -+ -+ return 0; -+} -+ -+static struct snd_soc_ops gw_avila_board_ops = { -+ .startup = gw_avila_board_startup, -+ .hw_params = gw_avila_hw_params, -+}; -+ -+static struct snd_soc_dai_link gw_avila_board_dai[] = { -+ { -+ .name = "HSS-0", -+ .stream_name = "HSS-0", -+ .cpu_dai_name = "gw_avila_hss.0", -+ .codec_dai_name = "tlv320aic3x-hifi", -+ .codec_name = "tlv320aic3x-codec.0-001b", -+ .platform_name = "gw_avila-audio.0", -+ .init = avila_aic3x_init, -+ .ops = &gw_avila_board_ops, -+ },{ -+ .name = "HSS-1", -+ .stream_name = "HSS-1", -+ .cpu_dai_name = "gw_avila_hss.1", -+ .codec_dai_name = "tlv320aic3x-hifi", -+ .codec_name = "tlv320aic3x-codec.0-001a", -+ .platform_name = "gw_avila-audio.1", -+ .init = avila_aic3x_init, -+ .ops = &gw_avila_board_ops, -+ },{ -+ .name = "HSS-2", -+ .stream_name = "HSS-2", -+ .cpu_dai_name = "gw_avila_hss.2", -+ .codec_dai_name = "tlv320aic3x-hifi", -+ .codec_name = "tlv320aic3x-codec.0-0019", -+ .platform_name = "gw_avila-audio.2", -+ .init = avila_aic3x_init, -+ .ops = &gw_avila_board_ops, -+ },{ -+ .name = "HSS-3", -+ .stream_name = "HSS-3", -+ .cpu_dai_name = "gw_avila_hss.3", -+ .codec_dai_name = "tlv320aic3x-hifi", -+ .codec_name = "tlv320aic3x-codec.0-0018", -+ .platform_name = "gw_avila-audio.3", -+ .init = avila_aic3x_init, -+ .ops = &gw_avila_board_ops, -+ }, -+}; -+ -+static struct snd_soc_card gw_avila_board[] = { -+ { -+ .name = "gw_avila-board.0", -+ .owner = THIS_MODULE, -+ .dai_link = &gw_avila_board_dai[0], -+ .num_links = 1, -+ },{ -+ .name = "gw_avila-board.1", -+ .owner = THIS_MODULE, -+ .dai_link = &gw_avila_board_dai[1], -+ .num_links = 1, -+ },{ -+ .name = "gw_avila-board.2", -+ .owner = THIS_MODULE, -+ .dai_link = &gw_avila_board_dai[2], -+ .num_links = 1, -+ },{ -+ .name = "gw_avila-board.3", -+ .owner = THIS_MODULE, -+ .dai_link = &gw_avila_board_dai[3], -+ .num_links = 1, -+ } -+}; -+ -+static struct platform_device *gw_avila_board_snd_device[4]; -+ -+static int __init gw_avila_board_init(void) -+{ -+ int ret; -+ struct port *port; -+ int i; -+ -+ if ((hss_port[0] = kzalloc(sizeof(*port), GFP_KERNEL)) == NULL) -+ return -ENOMEM; -+ -+ if ((hss_port[1] = kzalloc(sizeof(*port), GFP_KERNEL)) == NULL) -+ return -ENOMEM; -+ -+ for (i = 0; i < 4; i++) { -+ gw_avila_board_snd_device[i] = platform_device_alloc("soc-audio", i); -+ if (!gw_avila_board_snd_device[i]) { -+ return -ENOMEM; -+ } -+ -+ platform_set_drvdata(gw_avila_board_snd_device[i], &gw_avila_board[i]); -+ ret = platform_device_add(gw_avila_board_snd_device[i]); -+ -+ if (ret) { -+ platform_device_put(gw_avila_board_snd_device[i]); -+ } -+ } -+ return ret; -+} -+ -+static void __exit gw_avila_board_exit(void) -+{ -+ int i; -+ for (i = 0; i < 4; i++) -+ platform_device_unregister(gw_avila_board_snd_device[i]); -+} -+ -+module_init(gw_avila_board_init); -+module_exit(gw_avila_board_exit); -+ -+/* Module information */ -+MODULE_AUTHOR("Chris Lang"); -+MODULE_DESCRIPTION("ALSA SoC HSS Audio gw_avila board"); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/sound/soc/gw-avila/ixp4xx_hss.c -@@ -0,0 +1,902 @@ -+/* -+ * Intel IXP4xx HSS (synchronous serial port) driver for Linux -+ * -+ * Copyright (C) 2009 Chris Lang -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License -+ * as published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include "ixp4xx_hss.h" -+ -+/***************************************************************************** -+ * global variables -+ ****************************************************************************/ -+ -+void hss_chan_read(unsigned long data); -+static char lock_init = 0; -+static spinlock_t npe_lock; -+static struct npe *npe; -+ -+static const struct { -+ int tx, txdone, rx, rxfree, chan; -+}queue_ids[2] = {{HSS0_PKT_TX0_QUEUE, HSS0_PKT_TXDONE_QUEUE, HSS0_PKT_RX_QUEUE, -+ HSS0_PKT_RXFREE0_QUEUE, HSS0_CHL_RXTRIG_QUEUE}, -+ {HSS1_PKT_TX0_QUEUE, HSS1_PKT_TXDONE_QUEUE, HSS1_PKT_RX_QUEUE, -+ HSS1_PKT_RXFREE0_QUEUE, HSS1_CHL_RXTRIG_QUEUE}, -+}; -+ -+struct port *hss_port[2]; -+struct hss_device *hss_handle[32]; -+EXPORT_SYMBOL(hss_handle); -+ -+/***************************************************************************** -+ * utility functions -+ ****************************************************************************/ -+ -+#ifndef __ARMEB__ -+static inline void memcpy_swab32(u32 *dest, u32 *src, int cnt) -+{ -+ int i; -+ for (i = 0; i < cnt; i++) -+ dest[i] = swab32(src[i]); -+} -+#endif -+ -+static inline unsigned int sub_offset(unsigned int a, unsigned int b, -+ unsigned int modulo) -+{ -+ return (modulo /* make sure the result >= 0 */ + a - b) % modulo; -+} -+ -+/***************************************************************************** -+ * HSS access -+ ****************************************************************************/ -+ -+static void hss_config_load(struct port *port) -+{ -+ struct msg msg; -+ -+ do { -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_CONFIG_LOAD; -+ msg.hss_port = port->id; -+ if (npe_send_message(npe, &msg, "HSS_LOAD_CONFIG")) -+ break; -+ if (npe_recv_message(npe, &msg, "HSS_LOAD_CONFIG")) -+ break; -+ -+ /* HSS_LOAD_CONFIG for port #1 returns port_id = #4 */ -+ if (msg.cmd != PORT_CONFIG_LOAD || msg.data32) -+ break; -+ -+ /* HDLC may stop working without this */ -+ npe_recv_message(npe, &msg, "FLUSH_IT"); -+ return; -+ } while (0); -+ -+ printk(KERN_CRIT "HSS-%i: unable to reload HSS configuration\n", -+ port->id); -+ BUG(); -+} -+ -+static void hss_config_set_pcr(struct port *port) -+{ -+ struct msg msg; -+ -+ do { -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_CONFIG_WRITE; -+ msg.hss_port = port->id; -+ msg.index = HSS_CONFIG_TX_PCR; -+#if 0 -+ msg.data32 = PCR_FRM_SYNC_RISINGEDGE | PCR_MSB_ENDIAN | -+ PCR_TX_DATA_ENABLE | PCR_TX_UNASS_HIGH_IMP | PCR_TX_V56K_HIGH_IMP | PCR_TX_FB_HIGH_IMP; -+#else -+ msg.data32 = PCR_FRM_SYNC_RISINGEDGE | PCR_MSB_ENDIAN | -+ PCR_TX_DATA_ENABLE | PCR_TX_FB_HIGH_IMP | PCR_DCLK_EDGE_RISING; -+#endif -+ if (port->frame_size % 8 == 0) -+ msg.data32 |= PCR_SOF_NO_FBIT; -+ -+ if (npe_send_message(npe, &msg, "HSS_SET_TX_PCR")) -+ break; -+ -+ msg.index = HSS_CONFIG_RX_PCR; -+ msg.data32 &= ~ (PCR_DCLK_EDGE_RISING | PCR_FCLK_EDGE_RISING | PCR_TX_DATA_ENABLE); -+ -+ if (npe_send_message(npe, &msg, "HSS_SET_RX_PCR")) -+ break; -+ return; -+ } while (0); -+ -+ printk(KERN_CRIT "HSS-%i: unable to set HSS PCR registers\n", port->id); -+ BUG(); -+} -+ -+static void hss_config_set_core(struct port *port) -+{ -+ struct msg msg; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_CONFIG_WRITE; -+ msg.hss_port = port->id; -+ msg.index = HSS_CONFIG_CORE_CR; -+#if 0 -+ msg.data32 = 0 | CCR_LOOPBACK | -+ (port->id ? CCR_SECOND_HSS : 0); -+#else -+ msg.data32 = 0 | -+ (port->id ? CCR_SECOND_HSS : 0); -+#endif -+ if (npe_send_message(npe, &msg, "HSS_SET_CORE_CR")) { -+ printk(KERN_CRIT "HSS-%i: unable to set HSS core control" -+ " register\n", port->id); -+ BUG(); -+ } -+} -+ -+static void hss_config_set_line(struct port *port) -+{ -+ struct msg msg; -+ -+ hss_config_set_pcr(port); -+ hss_config_set_core(port); -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_CONFIG_WRITE; -+ msg.hss_port = port->id; -+ msg.index = HSS_CONFIG_CLOCK_CR; -+ msg.data32 = CLK42X_SPEED_8192KHZ /* FIXME */; -+ if (npe_send_message(npe, &msg, "HSS_SET_CLOCK_CR")) { -+ printk(KERN_CRIT "HSS-%i: unable to set HSS clock control" -+ " register\n", port->id); -+ BUG(); -+ } -+} -+ -+static void hss_config_set_rx_frame(struct port *port) -+{ -+ struct msg msg; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_CONFIG_WRITE; -+ msg.hss_port = port->id; -+ msg.index = HSS_CONFIG_RX_FCR; -+ msg.data16a = port->frame_sync_offset; -+ msg.data16b = port->frame_size - 1; -+ if (npe_send_message(npe, &msg, "HSS_SET_RX_FCR")) { -+ printk(KERN_CRIT "HSS-%i: unable to set HSS RX frame size" -+ " and offset\n", port->id); -+ BUG(); -+ } -+} -+ -+static void hss_config_set_frame(struct port *port) -+{ -+ struct msg msg; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_CONFIG_WRITE; -+ msg.hss_port = port->id; -+ msg.index = HSS_CONFIG_TX_FCR; -+ msg.data16a = TX_FRAME_SYNC_OFFSET; -+ msg.data16b = port->frame_size - 1; -+ if (npe_send_message(npe, &msg, "HSS_SET_TX_FCR")) { -+ printk(KERN_CRIT "HSS-%i: unable to set HSS TX frame size" -+ " and offset\n", port->id); -+ BUG(); -+ } -+ hss_config_set_rx_frame(port); -+} -+ -+static void hss_config_set_lut(struct port *port) -+{ -+ struct msg msg; -+ int chan_count = 32; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_CONFIG_WRITE; -+ msg.hss_port = port->id; -+ -+ msg.index = HSS_CONFIG_TX_LUT; -+ msg.data32 = 0xffffffff; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ msg.data32 = 0x0; -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_TX_LUT"); -+ -+ msg.index = HSS_CONFIG_RX_LUT; -+ msg.data32 = 0xffffffff; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ msg.data32 = 0x0; -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ msg.index += 4; -+ npe_send_message(npe, &msg, "HSS_SET_RX_LUT"); -+ -+ hss_config_set_frame(port); -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_NUM_CHANS_WRITE; -+ msg.hss_port = port->id; -+ msg.data8a = chan_count; -+ if (npe_send_message(npe, &msg, "CHAN_NUM_CHANS_WRITE")) { -+ printk(KERN_CRIT "HSS-%i: unable to set HSS channel count\n", -+ port->id); -+ BUG(); -+ } -+} -+ -+static u32 hss_config_get_status(struct port *port) -+{ -+ struct msg msg; -+ -+ do { -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = PORT_ERROR_READ; -+ msg.hss_port = port->id; -+ if (npe_send_message(npe, &msg, "PORT_ERROR_READ")) -+ break; -+ if (npe_recv_message(npe, &msg, "PORT_ERROR_READ")) -+ break; -+ -+ return msg.data32; -+ } while (0); -+ -+ printk(KERN_CRIT "HSS-%i: unable to read HSS status\n", port->id); -+ BUG(); -+} -+ -+static void hss_config_start_chan(struct port *port) -+{ -+ struct msg msg; -+ -+ port->chan_last_tx = 0; -+ port->chan_last_rx = 0; -+ -+ do { -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_RX_BUF_ADDR_WRITE; -+ msg.hss_port = port->id; -+ msg.data32 = port->chan_rx_buf_phys; -+ if (npe_send_message(npe, &msg, "CHAN_RX_BUF_ADDR_WRITE")) -+ break; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_TX_BUF_ADDR_WRITE; -+ msg.hss_port = port->id; -+ msg.data32 = port->chan_tx_pointers_phys; -+ if (npe_send_message(npe, &msg, "CHAN_TX_BUF_ADDR_WRITE")) -+ break; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_FLOW_ENABLE; -+ msg.hss_port = port->id; -+ if (npe_send_message(npe, &msg, "CHAN_FLOW_ENABLE")) -+ break; -+ port->chan_started = 1; -+ return; -+ } while (0); -+ -+ printk(KERN_CRIT "HSS-%i: unable to start channelized flow\n", -+ port->id); -+ BUG(); -+} -+ -+static void hss_config_stop_chan(struct port *port) -+{ -+ struct msg msg; -+ -+ if (!port->chan_started) -+ return; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_FLOW_DISABLE; -+ msg.hss_port = port->id; -+ if (npe_send_message(npe, &msg, "CHAN_FLOW_DISABLE")) { -+ printk(KERN_CRIT "HSS-%i: unable to stop channelized flow\n", -+ port->id); -+ BUG(); -+ } -+ hss_config_get_status(port); /* make sure it's halted */ -+ port->chan_started = 0; -+} -+ -+static int hss_config_load_firmware(struct port *port) -+{ -+ struct msg msg; -+ -+ if (port->initialized) -+ return 0; -+ -+ if (!npe_running(npe)) { -+ int err; -+ if ((err = npe_load_firmware(npe, "NPE-A-HSS", -+ port->dev))) -+ return err; -+ } -+ -+ do { -+ /* HSS main configuration */ -+ hss_config_set_line(port); -+ -+ hss_config_set_frame(port); -+ -+ /* Channelized operation settings */ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_TX_BLK_CFG_WRITE; -+ msg.hss_port = port->id; -+ msg.data8b = (CHAN_TX_LIST_FRAMES & ~7) / 2; -+ msg.data8a = msg.data8b / 4; -+ msg.data8d = CHAN_TX_LIST_FRAMES - msg.data8b; -+ msg.data8c = msg.data8d / 4; -+ if (npe_send_message(npe, &msg, "CHAN_TX_BLK_CFG_WRITE")) -+ break; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_RX_BUF_CFG_WRITE; -+ msg.hss_port = port->id; -+ msg.data8a = CHAN_RX_TRIGGER / 8; -+ msg.data8b = CHAN_RX_FRAMES; -+ if (npe_send_message(npe, &msg, "CHAN_RX_BUF_CFG_WRITE")) -+ break; -+ -+ memset(&msg, 0, sizeof(msg)); -+ msg.cmd = CHAN_TX_BUF_SIZE_WRITE; -+ msg.hss_port = port->id; -+ msg.data8a = CHAN_TX_LISTS; -+ if (npe_send_message(npe, &msg, "CHAN_TX_BUF_SIZE_WRITE")) -+ break; -+ -+ port->initialized = 1; -+ return 0; -+ } while (0); -+ -+ printk(KERN_CRIT "HSS-%i: unable to start HSS operation\n", port->id); -+ BUG(); -+} -+ -+void hss_chan_irq(void *pdev) -+{ -+ struct port *port = pdev; -+ -+ qmgr_disable_irq(queue_ids[port->id].chan); -+ -+ tasklet_hi_schedule(&port->task); -+} -+ -+ -+int hss_prepare_chan(struct port *port) -+{ -+ int err, i, j; -+ u32 *temp; -+ u32 temp2; -+ u8 *temp3; -+ -+ if (port->initialized) -+ return 0; -+ -+ if ((err = hss_config_load_firmware(port))) -+ return err; -+ -+ if ((err = qmgr_request_queue(queue_ids[port->id].chan, -+ CHAN_QUEUE_LEN, 0, 0, "%s:hss", "hss"))) -+ return err; -+ -+ port->chan_tx_buf = dma_alloc_coherent(port->dev, chan_tx_buf_len(port), &port->chan_tx_buf_phys, GFP_DMA); -+ memset(port->chan_tx_buf, 0, chan_tx_buf_len(port)); -+ -+ port->chan_tx_pointers = dma_alloc_coherent(port->dev, chan_tx_buf_len(port) / CHAN_TX_LIST_FRAMES * 4, &port->chan_tx_pointers_phys, GFP_DMA); -+ -+ temp3 = port->chan_tx_buf; -+ for (i = 0; i < CHAN_TX_LISTS; i++) { -+ for (j = 0; j < 8; j++) { -+ port->tx_lists[i][j] = temp3; -+ temp3 += CHAN_TX_LIST_FRAMES * 4; -+ } -+ } -+ -+ temp = port->chan_tx_pointers; -+ temp2 = port->chan_tx_buf_phys; -+ for (i = 0; i < CHAN_TX_LISTS; i++) -+ { -+ for (j = 0; j < 32; j++) -+ { -+ *temp = temp2; -+ temp2 += CHAN_TX_LIST_FRAMES; -+ temp++; -+ } -+ } -+ -+ port->chan_rx_buf = dma_alloc_coherent(port->dev, chan_rx_buf_len(port), &port->chan_rx_buf_phys, GFP_DMA); -+ -+ for (i = 0; i < 8; i++) { -+ temp3 = port->chan_rx_buf + (i * 4 * 128); -+ for (j = 0; j < 8; j++) { -+ port->rx_frames[i][j] = temp3; -+ temp3 += CHAN_RX_TRIGGER; -+ } -+ } -+ -+ qmgr_set_irq(queue_ids[port->id].chan, QUEUE_IRQ_SRC_NOT_EMPTY, -+ hss_chan_irq, port); -+ -+ return 0; -+ -+} -+ -+int hss_tx_start(struct hss_device *hdev) -+{ -+ unsigned long flags; -+ struct port *port = hdev->port; -+ -+ hdev->tx_loc = 0; -+ hdev->tx_frame = 0; -+ -+ set_bit((1 << hdev->id), &port->chan_tx_bitmap); -+ -+ if (!port->chan_started) -+ { -+ qmgr_enable_irq(queue_ids[port->id].chan); -+ spin_lock_irqsave(&npe_lock, flags); -+ hss_config_start_chan(port); -+ spin_unlock_irqrestore(&npe_lock, flags); -+ hss_chan_irq(port); -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_tx_start); -+ -+int hss_rx_start(struct hss_device *hdev) -+{ -+ unsigned long flags; -+ struct port *port = hdev->port; -+ -+ hdev->rx_loc = 0; -+ hdev->rx_frame = 0; -+ -+ set_bit((1 << hdev->id), &port->chan_rx_bitmap); -+ -+ if (!port->chan_started) -+ { -+ qmgr_enable_irq(queue_ids[port->id].chan); -+ spin_lock_irqsave(&npe_lock, flags); -+ hss_config_start_chan(port); -+ spin_unlock_irqrestore(&npe_lock, flags); -+ hss_chan_irq(port); -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_rx_start); -+ -+int hss_tx_stop(struct hss_device *hdev) -+{ -+ struct port *port = hdev->port; -+ -+ clear_bit((1 << hdev->id), &port->chan_tx_bitmap); -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_tx_stop); -+ -+int hss_rx_stop(struct hss_device *hdev) -+{ -+ struct port *port = hdev->port; -+ -+ clear_bit((1 << hdev->id), &port->chan_rx_bitmap); -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_rx_stop); -+ -+int hss_chan_open(struct hss_device *hdev) -+{ -+ struct port *port = hdev->port; -+ int i, err = 0; -+ -+ if (port->chan_open) -+ return 0; -+ -+ if (port->mode == MODE_HDLC) { -+ err = -ENOSYS; -+ goto out; -+ } -+ -+ if (port->mode == MODE_G704 && port->channels[0] == hdev->id) { -+ err = -EBUSY; /* channel #0 is used for G.704 signaling */ -+ goto out; -+ } -+ -+ for (i = MAX_CHANNELS; i > port->frame_size / 8; i--) -+ if (port->channels[i - 1] == hdev->id) { -+ err = -ECHRNG; /* frame too short */ -+ goto out; -+ } -+ -+ hdev->rx_loc = hdev->tx_loc = 0; -+ hdev->rx_frame = hdev->tx_frame = 0; -+ -+ //clear_bit((1 << hdev->id), &port->chan_rx_bitmap); -+ //clear_bit((1 << hdev->id), &port->chan_tx_bitmap); -+ -+ if (!port->initialized) { -+ hss_prepare_chan(port); -+ -+ hss_config_stop_chan(port); -+ hdev->open_count++; -+ port->chan_open_count++; -+ -+ hss_config_set_lut(port); -+ hss_config_load(port); -+ -+ } -+ port->chan_open = 1; -+ -+out: -+ return err; -+} -+EXPORT_SYMBOL(hss_chan_open); -+ -+int hss_chan_close(struct hss_device *hdev) -+{ -+ return 0; -+} -+EXPORT_SYMBOL(hss_chan_close); -+ -+void hss_chan_read(unsigned long data) -+{ -+ struct port *port = (void *)data; -+ struct hss_device *hdev; -+ u8 *hw_buf, *save_buf; -+ u8 *buf; -+ u32 v; -+ unsigned int tx_list, rx_frame; -+ int i, j, channel; -+ u8 more_work = 0; -+ -+/* -+ My Data in the hardware buffer is scattered by channels into 4 trunks -+ as follows for rx -+ -+ channel 0 channel 1 channel 2 channel 3 -+Trunk 1 = 0 -> 127 128 -> 255 256 -> 383 384 -> 512 -+Trunk 2 = 513 -> 639 640 -> 768 769 -> 895 896 -> 1023 -+Trunk 3 = 1024 -> 1151 1152 -> 1207 1208 -> 1407 1408 -> 1535 -+Trunk 4 = 1535 -> 1663 1664 -> 1791 1792 -> 1920 1921 -> 2047 -+ -+ I will get CHAN_RX_TRIGGER worth of bytes out of each channel on each trunk -+ with each IRQ -+ -+ For TX Data, it is split into 8 lists with each list containing 16 bytes per -+ channel -+ -+Trunk 1 = 0 -> 16 17 -> 32 33 -> 48 49 -> 64 -+Trunk 2 = 65 -> 80 81 -> 96 97 -> 112 113 -> 128 -+Trunk 3 = 129 -> 144 145 -> 160 161 -> 176 177 -> 192 -+Trunk 4 = 193 -> 208 209 -> 224 225 -> 240 241 -> 256 -+ -+*/ -+ -+ -+ while ((v = qmgr_get_entry(queue_ids[port->id].chan))) -+ { -+ tx_list = (v >> 8) & 0xFF; -+ rx_frame = v & 0xFF; -+ -+ if (tx_list == 7) -+ tx_list = 0; -+ else -+ tx_list++; -+ for (channel = 0; channel < 8; channel++) { -+ -+ hdev = port->chan_devices[channel]; -+ if (!hdev) -+ continue; -+ -+ if (test_bit(1 << channel, &port->chan_tx_bitmap)) { -+ buf = (u8 *)hdev->tx_buf + hdev->tx_loc; -+#if 0 -+ hw_buf = (u8 *)port->chan_tx_buf; -+ hw_buf += (tx_list * CHAN_TX_LIST_FRAMES * 32); -+ hw_buf += (4 * CHAN_TX_LIST_FRAMES * channel); -+ save_buf = hw_buf; -+#else -+ save_buf = port->tx_lists[tx_list][channel]; -+#endif -+ for (i = 0; i < CHAN_TX_LIST_FRAMES; i++) { -+ hw_buf = save_buf + i; -+ for (j = 0; j < 4; j++) { -+ *hw_buf = *(buf++); -+ hw_buf += CHAN_TX_LIST_FRAMES; -+ } -+ -+ hdev->tx_loc += 4; -+ hdev->tx_frame++; -+ if (hdev->tx_loc >= hdev->tx_buffer_size) { -+ hdev->tx_loc = 0; -+ buf = (u8 *)hdev->tx_buf; -+ } -+ } -+ } else { -+#if 0 -+ hw_buf = (u8 *)port->chan_tx_buf; -+ hw_buf += (tx_list * CHAN_TX_LIST_FRAMES * 32); -+ hw_buf += (4 * CHAN_TX_LIST_FRAMES * channel); -+#else -+ hw_buf = port->tx_lists[tx_list][channel]; -+#endif -+ memset(hw_buf, 0, 64); -+ } -+ -+ if (hdev->tx_frame >= hdev->tx_period_size && test_bit(1 << channel, &port->chan_tx_bitmap)) -+ { -+ hdev->tx_frame %= hdev->tx_period_size; -+ if (hdev->tx_callback) -+ hdev->tx_callback(hdev->tx_data); -+ more_work = 1; -+ } -+ -+ if (test_bit(1 << channel, &port->chan_rx_bitmap)) { -+ buf = (u8 *)hdev->rx_buf + hdev->rx_loc; -+#if 0 -+ hw_buf = (u8 *)port->chan_rx_buf; -+ hw_buf += (4 * CHAN_RX_FRAMES * channel); -+ hw_buf += rx_frame; -+ save_buf = hw_buf; -+#else -+ save_buf = port->rx_frames[channel][rx_frame >> 4]; -+#endif -+ for (i = 0; i < CHAN_RX_TRIGGER; i++) { -+ hw_buf = save_buf + i; -+ for (j = 0; j < 4; j++) { -+ *(buf++) = *hw_buf; -+ hw_buf += CHAN_RX_FRAMES; -+ } -+ hdev->rx_loc += 4; -+ hdev->rx_frame++; -+ if (hdev->rx_loc >= hdev->rx_buffer_size) { -+ hdev->rx_loc = 0; -+ buf = (u8 *)hdev->rx_buf; -+ } -+ } -+ } -+ -+ if (hdev->rx_frame >= hdev->rx_period_size && test_bit(1 << channel, &port->chan_rx_bitmap)) -+ { -+ hdev->rx_frame %= hdev->rx_period_size; -+ if (hdev->rx_callback) -+ hdev->rx_callback(hdev->rx_data); -+ more_work = 1; -+ } -+ } -+#if 0 -+ if (more_work) -+ { -+ tasklet_hi_schedule(&port->task); -+ return; -+ } -+#endif -+ } -+ -+ qmgr_enable_irq(queue_ids[port->id].chan); -+ -+ return; -+ -+} -+ -+struct hss_device *hss_chan_create(struct port *port, unsigned int channel) -+{ -+ struct hss_device *chan_dev; -+ unsigned long flags; -+ -+ chan_dev = kzalloc(sizeof(struct hss_device), GFP_KERNEL); -+ -+ spin_lock_irqsave(&npe_lock, flags); -+ -+ chan_dev->id = channel; -+ chan_dev->port = port; -+ -+ port->channels[channel] = channel; -+ -+ port->chan_devices[channel] = chan_dev; -+ -+ spin_unlock_irqrestore(&npe_lock, flags); -+ -+ return chan_dev; -+} -+ -+/***************************************************************************** -+ * initialization -+ ****************************************************************************/ -+ -+static struct platform_device gw_avila_hss_device_0 = { -+ .name = "ixp4xx_hss", -+ .id = 0, -+}; -+ -+static struct platform_device gw_avila_hss_device_1 = { -+ .name = "ixp4xx_hss", -+ .id = 1, -+}; -+ -+static struct platform_device *gw_avila_hss_port_0; -+static struct platform_device *gw_avila_hss_port_1; -+static u64 hss_dmamask = 0xFFFFFFFF; -+ -+struct hss_device *hss_init(int id, int channel) -+{ -+ struct port *port = hss_port[id]; -+ struct hss_device *hdev; -+ int ret; -+ -+ if (!lock_init) -+ { -+ spin_lock_init(&npe_lock); -+ lock_init = 1; -+ npe = npe_request(0); -+ } -+ -+ if (!port->init) { -+ if (id == 0) { -+ gw_avila_hss_port_0 = platform_device_alloc("hss-port", 0); -+ -+ platform_set_drvdata(gw_avila_hss_port_0, &gw_avila_hss_device_0); -+ port->dev = &gw_avila_hss_port_0->dev; -+ -+ if (!port->dev->dma_mask) -+ port->dev->dma_mask = &hss_dmamask; -+ if (!port->dev->coherent_dma_mask) -+ port->dev->coherent_dma_mask = 0xFFFFFFFF; -+ -+ ret = platform_device_add(gw_avila_hss_port_0); -+ -+ if (ret) -+ platform_device_put(gw_avila_hss_port_0); -+ -+ tasklet_init(&port->task, hss_chan_read, (unsigned long) port); -+ } -+ else -+ { -+ gw_avila_hss_port_1 = platform_device_alloc("hss-port", 1); -+ -+ platform_set_drvdata(gw_avila_hss_port_1, &gw_avila_hss_device_1); -+ port->dev = &gw_avila_hss_port_1->dev; -+ -+ if (!port->dev->dma_mask) -+ port->dev->dma_mask = &hss_dmamask; -+ if (!port->dev->coherent_dma_mask) -+ port->dev->coherent_dma_mask = 0xFFFFFFFF; -+ -+ ret = platform_device_add(gw_avila_hss_port_1); -+ -+ if (ret) -+ platform_device_put(gw_avila_hss_port_1); -+ -+ tasklet_init(&port->task, hss_chan_read, (unsigned long) port); -+ } -+ -+ port->init = 1; -+ port->id = id; -+ port->clock_type = CLOCK_EXT; -+ port->clock_rate = 8192000; -+ port->frame_size = 256; /* E1 */ -+ port->mode = MODE_RAW; -+ port->next_rx_frame = 0; -+ memset(port->channels, CHANNEL_UNUSED, sizeof(port->channels)); -+ } -+ -+ hdev = hss_chan_create(port, channel); -+ -+ return hdev; -+} -+EXPORT_SYMBOL(hss_init); -+ -+int hss_set_tx_callback(struct hss_device *hdev, void (*tx_callback)(void *), void *tx_data) -+{ -+ BUG_ON(tx_callback == NULL); -+ hdev->tx_callback = tx_callback; -+ hdev->tx_data = tx_data; -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_set_tx_callback); -+ -+int hss_set_rx_callback(struct hss_device *hdev, void (*rx_callback)(void *), void *rx_data) -+{ -+ BUG_ON(rx_callback == NULL); -+ hdev->rx_callback = rx_callback; -+ hdev->rx_data = rx_data; -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_set_rx_callback); -+ -+int hss_config_rx_dma(struct hss_device *hdev, void *buf, size_t buffer_size, size_t period_size) -+{ -+ /* -+ * Period Size and Buffer Size are in Frames which are u32 -+ * We convert the u32 *buf to u8 in order to make channel reads -+ * and rx_loc easier -+ */ -+ -+ hdev->rx_buf = (u8 *)buf; -+ hdev->rx_buffer_size = buffer_size << 2; -+ hdev->rx_period_size = period_size; -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_config_rx_dma); -+ -+int hss_config_tx_dma(struct hss_device *hdev, void *buf, size_t buffer_size, size_t period_size) -+{ -+ /* -+ * Period Size and Buffer Size are in Frames which are u32 -+ * We convert the u32 *buf to u8 in order to make channel reads -+ * and rx_loc easier -+ */ -+ -+ hdev->tx_buf = (u8 *)buf; -+ hdev->tx_buffer_size = buffer_size << 2; -+ hdev->tx_period_size = period_size; -+ -+ return 0; -+} -+EXPORT_SYMBOL(hss_config_tx_dma); -+ -+unsigned long hss_curr_offset_rx(struct hss_device *hdev) -+{ -+ return hdev->rx_loc >> 2; -+} -+EXPORT_SYMBOL(hss_curr_offset_rx); -+ -+unsigned long hss_curr_offset_tx(struct hss_device *hdev) -+{ -+ return hdev->tx_loc >> 2; -+} -+EXPORT_SYMBOL(hss_curr_offset_tx); -+ -+MODULE_AUTHOR("Chris Lang"); -+MODULE_DESCRIPTION("Intel IXP4xx HSS Audio driver"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/sound/soc/gw-avila/ixp4xx_hss.h -@@ -0,0 +1,401 @@ -+/* -+ * -+ * -+ * Copyright (C) 2009 Gateworks Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of version 2 of the GNU General Public License -+ * as published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+//#include XXX We aren't HDLC -+ -+#define DEBUG_QUEUES 0 -+#define DEBUG_DESC 0 -+#define DEBUG_RX 0 -+#define DEBUG_TX 0 -+#define DEBUG_PKT_BYTES 0 -+#define DEBUG_CLOSE 0 -+#define DEBUG_FRAMER 0 -+ -+#define DRV_NAME "ixp4xx_hss" -+ -+#define PKT_EXTRA_FLAGS 0 /* orig 1 */ -+#define TX_FRAME_SYNC_OFFSET 0 /* channelized */ -+#define PKT_NUM_PIPES 1 /* 1, 2 or 4 */ -+#define PKT_PIPE_FIFO_SIZEW 4 /* total 4 dwords per HSS */ -+ -+#define RX_DESCS 512 /* also length of all RX queues */ -+#define TX_DESCS 512 /* also length of all TX queues */ -+ -+//#define POOL_ALLOC_SIZE (sizeof(struct desc) * (RX_DESCS + TX_DESCS)) -+#define RX_SIZE (HDLC_MAX_MRU + 4) /* NPE needs more space */ -+#define MAX_CLOSE_WAIT 1000 /* microseconds */ -+#define HSS_COUNT 2 -+#define MIN_FRAME_SIZE 16 /* bits */ -+#define MAX_FRAME_SIZE 257 /* 256 bits + framing bit */ -+#define MAX_CHANNELS (MAX_FRAME_SIZE / 8) -+#define MAX_CHAN_DEVICES 32 -+#define CHANNEL_HDLC 0xFE -+#define CHANNEL_UNUSED 0xFF -+ -+#define NAPI_WEIGHT 16 -+#define CHAN_RX_TRIGGER 16 /* 8 RX frames = 1 ms @ E1 */ -+#define CHAN_RX_FRAMES 128 -+#define CHAN_RX_TRUNKS 1 -+#define MAX_CHAN_RX_BAD_SYNC (CHAN_RX_TRIGGER / 2 /* pairs */ - 3) -+ -+#define CHAN_TX_LIST_FRAMES CHAN_RX_TRIGGER /* bytes/channel per list, 16 - 48 */ -+#define CHAN_TX_LISTS 8 -+#define CHAN_TX_TRUNKS CHAN_RX_TRUNKS -+#define CHAN_TX_FRAMES (CHAN_TX_LIST_FRAMES * CHAN_TX_LISTS) -+ -+#define CHAN_QUEUE_LEN 32 /* minimum possible */ -+ -+#define chan_rx_buf_len(port) (port->frame_size / 8 * CHAN_RX_FRAMES * CHAN_RX_TRUNKS) -+#define chan_tx_buf_len(port) (port->frame_size / 8 * CHAN_TX_FRAMES * CHAN_TX_TRUNKS) -+ -+/* Queue IDs */ -+#define HSS0_CHL_RXTRIG_QUEUE 12 /* orig size = 32 dwords */ -+#define HSS0_PKT_RX_QUEUE 13 /* orig size = 32 dwords */ -+#define HSS0_PKT_TX0_QUEUE 14 /* orig size = 16 dwords */ -+#define HSS0_PKT_TX1_QUEUE 15 -+#define HSS0_PKT_TX2_QUEUE 16 -+#define HSS0_PKT_TX3_QUEUE 17 -+#define HSS0_PKT_RXFREE0_QUEUE 18 /* orig size = 16 dwords */ -+#define HSS0_PKT_RXFREE1_QUEUE 19 -+#define HSS0_PKT_RXFREE2_QUEUE 20 -+#define HSS0_PKT_RXFREE3_QUEUE 21 -+#define HSS0_PKT_TXDONE_QUEUE 22 /* orig size = 64 dwords */ -+ -+#define HSS1_CHL_RXTRIG_QUEUE 10 -+#define HSS1_PKT_RX_QUEUE 0 -+#define HSS1_PKT_TX0_QUEUE 5 -+#define HSS1_PKT_TX1_QUEUE 6 -+#define HSS1_PKT_TX2_QUEUE 7 -+#define HSS1_PKT_TX3_QUEUE 8 -+#define HSS1_PKT_RXFREE0_QUEUE 1 -+#define HSS1_PKT_RXFREE1_QUEUE 2 -+#define HSS1_PKT_RXFREE2_QUEUE 3 -+#define HSS1_PKT_RXFREE3_QUEUE 4 -+#define HSS1_PKT_TXDONE_QUEUE 9 -+ -+#define NPE_PKT_MODE_HDLC 0 -+#define NPE_PKT_MODE_RAW 1 -+#define NPE_PKT_MODE_56KMODE 2 -+#define NPE_PKT_MODE_56KENDIAN_MSB 4 -+ -+/* PKT_PIPE_HDLC_CFG_WRITE flags */ -+#define PKT_HDLC_IDLE_ONES 0x1 /* default = flags */ -+#define PKT_HDLC_CRC_32 0x2 /* default = CRC-16 */ -+#define PKT_HDLC_MSB_ENDIAN 0x4 /* default = LE */ -+ -+ -+/* hss_config, PCRs */ -+/* Frame sync sampling, default = active low */ -+#define PCR_FRM_SYNC_ACTIVE_HIGH 0x40000000 -+#define PCR_FRM_SYNC_FALLINGEDGE 0x80000000 -+#define PCR_FRM_SYNC_RISINGEDGE 0xC0000000 -+ -+/* Frame sync pin: input (default) or output generated off a given clk edge */ -+#define PCR_FRM_SYNC_OUTPUT_FALLING 0x20000000 -+#define PCR_FRM_SYNC_OUTPUT_RISING 0x30000000 -+ -+/* Frame and data clock sampling on edge, default = falling */ -+#define PCR_FCLK_EDGE_RISING 0x08000000 -+#define PCR_DCLK_EDGE_RISING 0x04000000 -+ -+/* Clock direction, default = input */ -+#define PCR_SYNC_CLK_DIR_OUTPUT 0x02000000 -+ -+/* Generate/Receive frame pulses, default = enabled */ -+#define PCR_FRM_PULSE_DISABLED 0x01000000 -+ -+ /* Data rate is full (default) or half the configured clk speed */ -+#define PCR_HALF_CLK_RATE 0x00200000 -+ -+/* Invert data between NPE and HSS FIFOs? (default = no) */ -+#define PCR_DATA_POLARITY_INVERT 0x00100000 -+ -+/* TX/RX endianness, default = LSB */ -+#define PCR_MSB_ENDIAN 0x00080000 -+ -+/* Normal (default) / open drain mode (TX only) */ -+#define PCR_TX_PINS_OPEN_DRAIN 0x00040000 -+ -+/* No framing bit transmitted and expected on RX? (default = framing bit) */ -+#define PCR_SOF_NO_FBIT 0x00020000 -+ -+/* Drive data pins? */ -+#define PCR_TX_DATA_ENABLE 0x00010000 -+ -+/* Voice 56k type: drive the data pins low (default), high, high Z */ -+#define PCR_TX_V56K_HIGH 0x00002000 -+#define PCR_TX_V56K_HIGH_IMP 0x00004000 -+ -+/* Unassigned type: drive the data pins low (default), high, high Z */ -+#define PCR_TX_UNASS_HIGH 0x00000800 -+#define PCR_TX_UNASS_HIGH_IMP 0x00001000 -+ -+/* T1 @ 1.544MHz only: Fbit dictated in FIFO (default) or high Z */ -+#define PCR_TX_FB_HIGH_IMP 0x00000400 -+ -+/* 56k data endiannes - which bit unused: high (default) or low */ -+#define PCR_TX_56KE_BIT_0_UNUSED 0x00000200 -+ -+/* 56k data transmission type: 32/8 bit data (default) or 56K data */ -+#define PCR_TX_56KS_56K_DATA 0x00000100 -+ -+/* hss_config, cCR */ -+/* Number of packetized clients, default = 1 */ -+#define CCR_NPE_HFIFO_2_HDLC 0x04000000 -+#define CCR_NPE_HFIFO_3_OR_4HDLC 0x08000000 -+ -+/* default = no loopback */ -+#define CCR_LOOPBACK 0x02000000 -+ -+/* HSS number, default = 0 (first) */ -+#define CCR_SECOND_HSS 0x01000000 -+ -+ -+/* hss_config, clkCR: main:10, num:10, denom:12 */ -+#define CLK42X_SPEED_EXP ((0x3FF << 22) | ( 2 << 12) | 15) /*65 KHz*/ -+ -+#define CLK42X_SPEED_512KHZ (( 130 << 22) | ( 2 << 12) | 15) -+#define CLK42X_SPEED_1536KHZ (( 43 << 22) | ( 18 << 12) | 47) -+#define CLK42X_SPEED_1544KHZ (( 43 << 22) | ( 33 << 12) | 192) -+#define CLK42X_SPEED_2048KHZ (( 32 << 22) | ( 34 << 12) | 63) -+#define CLK42X_SPEED_4096KHZ (( 16 << 22) | ( 34 << 12) | 127) -+#define CLK42X_SPEED_8192KHZ (( 8 << 22) | ( 34 << 12) | 255) -+ -+#define CLK46X_SPEED_512KHZ (( 130 << 22) | ( 24 << 12) | 127) -+#define CLK46X_SPEED_1536KHZ (( 43 << 22) | (152 << 12) | 383) -+#define CLK46X_SPEED_1544KHZ (( 43 << 22) | ( 66 << 12) | 385) -+#define CLK46X_SPEED_2048KHZ (( 32 << 22) | (280 << 12) | 511) -+#define CLK46X_SPEED_4096KHZ (( 16 << 22) | (280 << 12) | 1023) -+#define CLK46X_SPEED_8192KHZ (( 8 << 22) | (280 << 12) | 2047) -+ -+ -+/* hss_config, LUT entries */ -+#define TDMMAP_UNASSIGNED 0 -+#define TDMMAP_HDLC 1 /* HDLC - packetized */ -+#define TDMMAP_VOICE56K 2 /* Voice56K - 7-bit channelized */ -+#define TDMMAP_VOICE64K 3 /* Voice64K - 8-bit channelized */ -+ -+/* offsets into HSS config */ -+#define HSS_CONFIG_TX_PCR 0x00 /* port configuration registers */ -+#define HSS_CONFIG_RX_PCR 0x04 -+#define HSS_CONFIG_CORE_CR 0x08 /* loopback control, HSS# */ -+#define HSS_CONFIG_CLOCK_CR 0x0C /* clock generator control */ -+#define HSS_CONFIG_TX_FCR 0x10 /* frame configuration registers */ -+#define HSS_CONFIG_RX_FCR 0x14 -+#define HSS_CONFIG_TX_LUT 0x18 /* channel look-up tables */ -+#define HSS_CONFIG_RX_LUT 0x38 -+ -+ -+/* NPE command codes */ -+/* writes the ConfigWord value to the location specified by offset */ -+#define PORT_CONFIG_WRITE 0x40 -+ -+/* triggers the NPE to load the contents of the configuration table */ -+#define PORT_CONFIG_LOAD 0x41 -+ -+/* triggers the NPE to return an HssErrorReadResponse message */ -+#define PORT_ERROR_READ 0x42 -+ -+/* reset NPE internal status and enable the HssChannelized operation */ -+#define CHAN_FLOW_ENABLE 0x43 -+#define CHAN_FLOW_DISABLE 0x44 -+#define CHAN_IDLE_PATTERN_WRITE 0x45 -+#define CHAN_NUM_CHANS_WRITE 0x46 -+#define CHAN_RX_BUF_ADDR_WRITE 0x47 -+#define CHAN_RX_BUF_CFG_WRITE 0x48 -+#define CHAN_TX_BLK_CFG_WRITE 0x49 -+#define CHAN_TX_BUF_ADDR_WRITE 0x4A -+#define CHAN_TX_BUF_SIZE_WRITE 0x4B -+#define CHAN_TSLOTSWITCH_ENABLE 0x4C -+#define CHAN_TSLOTSWITCH_DISABLE 0x4D -+ -+/* downloads the gainWord value for a timeslot switching channel associated -+ with bypassNum */ -+#define CHAN_TSLOTSWITCH_GCT_DOWNLOAD 0x4E -+ -+/* triggers the NPE to reset internal status and enable the HssPacketized -+ operation for the flow specified by pPipe */ -+#define PKT_PIPE_FLOW_ENABLE 0x50 -+#define PKT_PIPE_FLOW_DISABLE 0x51 -+#define PKT_NUM_PIPES_WRITE 0x52 -+#define PKT_PIPE_FIFO_SIZEW_WRITE 0x53 -+#define PKT_PIPE_HDLC_CFG_WRITE 0x54 -+#define PKT_PIPE_IDLE_PATTERN_WRITE 0x55 -+#define PKT_PIPE_RX_SIZE_WRITE 0x56 -+#define PKT_PIPE_MODE_WRITE 0x57 -+ -+/* HDLC packet status values - desc->status */ -+#define ERR_SHUTDOWN 1 /* stop or shutdown occurrance */ -+#define ERR_HDLC_ALIGN 2 /* HDLC alignment error */ -+#define ERR_HDLC_FCS 3 /* HDLC Frame Check Sum error */ -+#define ERR_RXFREE_Q_EMPTY 4 /* RX-free queue became empty while receiving -+ this packet (if buf_len < pkt_len) */ -+#define ERR_HDLC_TOO_LONG 5 /* HDLC frame size too long */ -+#define ERR_HDLC_ABORT 6 /* abort sequence received */ -+#define ERR_DISCONNECTING 7 /* disconnect is in progress */ -+ -+#define CLOCK_EXT 0 -+#define CLOCK_INT 1 -+ -+enum mode {MODE_HDLC = 0, MODE_RAW, MODE_G704}; -+enum rx_tx_bit { -+ TX_BIT = 0, -+ RX_BIT = 1 -+}; -+enum chan_bit { -+ CHAN_0 = (1 << 0), -+ CHAN_1 = (1 << 1), -+ CHAN_2 = (1 << 2), -+ CHAN_3 = (1 << 3), -+ CHAN_4 = (1 << 4), -+ CHAN_5 = (1 << 5), -+ CHAN_6 = (1 << 6), -+ CHAN_7 = (1 << 7), -+ CHAN_8 = (1 << 8), -+ CHAN_9 = (1 << 9), -+ CHAN_10 = (1 << 10), -+ CHAN_11 = (1 << 11), -+ CHAN_12 = (1 << 12), -+ CHAN_13 = (1 << 13), -+ CHAN_14 = (1 << 14), -+ CHAN_15 = (1 << 15) -+}; -+ -+enum alignment { NOT_ALIGNED = 0, EVEN_FIRST, ODD_FIRST }; -+ -+#ifdef __ARMEB__ -+typedef struct sk_buff buffer_t; -+#define free_buffer dev_kfree_skb -+#define free_buffer_irq dev_kfree_skb_irq -+#else -+typedef void buffer_t; -+#define free_buffer kfree -+#define free_buffer_irq kfree -+#endif -+ -+struct hss_device { -+ struct port *port; -+ unsigned int open_count, excl_open; -+ unsigned long tx_loc, rx_loc; /* bytes */ -+ unsigned long tx_frame, rx_frame; /* Frames */ -+ u8 id, chan_count; -+ u8 log_channels[MAX_CHANNELS]; -+ -+ u8 *rx_buf; -+ u8 *tx_buf; -+ -+ size_t rx_buffer_size; -+ size_t rx_period_size; -+ size_t tx_buffer_size; -+ size_t tx_period_size; -+ -+ void (*rx_callback)(void *data); -+ void *rx_data; -+ void (*tx_callback)(void *data); -+ void *tx_data; -+ void *private_data; -+}; -+ -+extern struct hss_device *hss_handle[32]; -+extern struct port *hss_port[2]; -+ -+struct port { -+ unsigned char init; -+ -+ struct device *dev; -+ -+ struct tasklet_struct task; -+ unsigned int id; -+ unsigned long chan_rx_bitmap; -+ unsigned long chan_tx_bitmap; -+ unsigned char chan_open; -+ -+ /* the following fields must be protected by npe_lock */ -+ enum mode mode; -+ unsigned int clock_type, clock_rate, loopback; -+ unsigned int frame_size, frame_sync_offset; -+ unsigned int next_rx_frame; -+ -+ struct hss_device *chan_devices[MAX_CHAN_DEVICES]; -+ u32 chan_tx_buf_phys, chan_rx_buf_phys; -+ u32 chan_tx_pointers_phys; -+ u32 *chan_tx_pointers; -+ u8 *chan_rx_buf; -+ u8 *chan_tx_buf; -+ u8 *tx_lists[CHAN_TX_LISTS][8]; -+ u8 *rx_frames[8][CHAN_TX_LISTS]; -+ unsigned int chan_open_count, hdlc_open; -+ unsigned int chan_started, initialized, just_set_offset; -+ unsigned int chan_last_rx, chan_last_tx; -+ -+ /* assigned channels, may be invalid with given frame length or mode */ -+ u8 channels[MAX_CHANNELS]; -+ int msg_count; -+}; -+ -+/* NPE message structure */ -+struct msg { -+#ifdef __ARMEB__ -+ u8 cmd, unused, hss_port, index; -+ union { -+ struct { u8 data8a, data8b, data8c, data8d; }; -+ struct { u16 data16a, data16b; }; -+ struct { u32 data32; }; -+ }; -+#else -+ u8 index, hss_port, unused, cmd; -+ union { -+ struct { u8 data8d, data8c, data8b, data8a; }; -+ struct { u16 data16b, data16a; }; -+ struct { u32 data32; }; -+ }; -+#endif -+}; -+ -+#define rx_desc_phys(port, n) ((port)->desc_tab_phys + \ -+ (n) * sizeof(struct desc)) -+#define rx_desc_ptr(port, n) (&(port)->desc_tab[n]) -+ -+#define tx_desc_phys(port, n) ((port)->desc_tab_phys + \ -+ ((n) + RX_DESCS) * sizeof(struct desc)) -+#define tx_desc_ptr(port, n) (&(port)->desc_tab[(n) + RX_DESCS]) -+ -+int hss_prepare_chan(struct port *port); -+void hss_chan_stop(struct port *port); -+ -+struct hss_device *hss_init(int id, int channel); -+int hss_chan_open(struct hss_device *hdev); -+int hss_chan_close(struct hss_device *hdev); -+ -+int hss_set_tx_callback(struct hss_device *hdev, void (*tx_callback)(void *), void *tx_data); -+int hss_set_rx_callback(struct hss_device *hdev, void (*rx_callback)(void *), void *rx_data); -+int hss_tx_start(struct hss_device *hdev); -+int hss_tx_stop(struct hss_device *hdev); -+int hss_rx_start(struct hss_device *hdev); -+int hss_rx_stop(struct hss_device *hdev); -+ -+int hss_config_rx_dma(struct hss_device *hdev, void *buf, size_t buffer_size, size_t period_size); -+int hss_config_tx_dma(struct hss_device *hdev, void *buf, size_t buffer_size, size_t period_size); -+unsigned long hss_curr_offset_rx(struct hss_device *hdev); -+unsigned long hss_curr_offset_tx(struct hss_device *hdev); -+ diff --git a/target/linux/ixp4xx/patches-4.4/180-tw5334_support.patch b/target/linux/ixp4xx/patches-4.4/180-tw5334_support.patch deleted file mode 100644 index b56fbb732..000000000 --- a/target/linux/ixp4xx/patches-4.4/180-tw5334_support.patch +++ /dev/null @@ -1,287 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -160,6 +160,14 @@ config ARCH_PRPMC1100 - PrPCM1100 Processor Mezanine Module. For more information on - this platform, see . - -+config MACH_TW5334 -+ bool "Titan Wireless TW-533-4" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support the Titan -+ Wireless TW533-4. For more information on this platform, -+ see http://openwrt.org -+ - config MACH_NAS100D - bool - prompt "NAS100D" ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -24,6 +24,7 @@ obj-pci-$(CONFIG_MACH_SIDEWINDER) += sid - obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixdp425-pci.o - obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o - obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o -+obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o - - obj-y += common.o - -@@ -49,6 +50,7 @@ obj-$(CONFIG_MACH_SIDEWINDER) += sidewin - obj-$(CONFIG_MACH_COMPEXWP18) += compex42x-setup.o - obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o - obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o -+obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h -+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h -@@ -44,7 +44,7 @@ static __inline__ void __arch_decomp_set - machine_is_gateway7001() || machine_is_wg302v2() || - machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() || - machine_is_pronghorn() || machine_is_pronghorn_metro() || -- machine_is_wrt300nv2()) -+ machine_is_wrt300nv2() || machine_is_tw5334()) - uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; - else - uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/tw5334-pci.c -@@ -0,0 +1,68 @@ -+/* -+ * arch/arch/mach-ixp4xx/tw5334-pci.c -+ * -+ * PCI setup routines for the Titan Wireless TW-533-4 -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * -+ * Maintainer: Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+ -+void __init tw5334_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO2, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO0, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init tw5334_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 12) -+ return IRQ_IXP4XX_GPIO6; -+ else if (slot == 13) -+ return IRQ_IXP4XX_GPIO2; -+ else if (slot == 14) -+ return IRQ_IXP4XX_GPIO1; -+ else if (slot == 15) -+ return IRQ_IXP4XX_GPIO0; -+ else return -1; -+} -+ -+struct hw_pci tw5334_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = tw5334_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = tw5334_map_irq, -+}; -+ -+int __init tw5334_pci_init(void) -+{ -+ if (machine_is_tw5334()) -+ pci_common_init(&tw5334_pci); -+ return 0; -+} -+ -+subsys_initcall(tw5334_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/tw5334-setup.c -@@ -0,0 +1,167 @@ -+/* -+ * arch/arm/mach-ixp4xx/tw5334-setup.c -+ * -+ * Board setup for the Titan Wireless TW-533-4 -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct flash_platform_data tw5334_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource tw5334_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device tw5334_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &tw5334_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &tw5334_flash_resource, -+}; -+ -+static struct resource tw5334_uart_resource = { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct plat_serial8250_port tw5334_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device tw5334_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = tw5334_uart_data, -+ }, -+ .num_resources = 1, -+ .resource = &tw5334_uart_resource, -+}; -+ -+/* Built-in 10/100 Ethernet MAC interfaces */ -+static struct eth_plat_info tw5334_plat_eth[] = { -+ { -+ .phy = 0, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 1, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device tw5334_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = tw5334_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = tw5334_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct platform_device *tw5334_devices[] __initdata = { -+ &tw5334_flash, -+ &tw5334_uart, -+ &tw5334_eth[0], -+ &tw5334_eth[1], -+}; -+ -+static void __init tw5334_init(void) -+{ -+ uint8_t __iomem *f; -+ int i; -+ -+ ixp4xx_sys_init(); -+ -+ tw5334_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ tw5334_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; -+ -+ platform_add_devices(tw5334_devices, ARRAY_SIZE(tw5334_devices)); -+ -+ /* -+ * Map in a portion of the flash and read the MAC addresses. -+ * Since it is stored in BE in the flash itself, we need to -+ * byteswap it if we're in LE mode. -+ */ -+ f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000); -+ if (f) { -+ for (i = 0; i < 6; i++) { -+#ifdef __ARMEB__ -+ tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + i); -+ tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + i); -+#else -+ tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + (i^3)); -+ tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + (i^3)); -+#endif -+ } -+ iounmap(f); -+ } -+ -+ printk(KERN_INFO "TW-533-4: Using MAC address %pM for port 0\n", -+ tw5334_plat_eth[0].hwaddr); -+ printk(KERN_INFO "TW-533-4: Using MAC address %pM for port 1\n", -+ tw5334_plat_eth[1].hwaddr); -+} -+ -+#ifdef CONFIG_MACH_TW5334 -+MACHINE_START(TW5334, "Titan Wireless TW-533-4") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = tw5334_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+#endif diff --git a/target/linux/ixp4xx/patches-4.4/185-mi424wr_support.patch b/target/linux/ixp4xx/patches-4.4/185-mi424wr_support.patch deleted file mode 100644 index 81713b3cf..000000000 --- a/target/linux/ixp4xx/patches-4.4/185-mi424wr_support.patch +++ /dev/null @@ -1,507 +0,0 @@ ---- a/arch/arm/configs/ixp4xx_defconfig -+++ b/arch/arm/configs/ixp4xx_defconfig -@@ -26,6 +26,7 @@ CONFIG_MACH_NAS100D=y - CONFIG_MACH_DSMG600=y - CONFIG_MACH_FSG=y - CONFIG_MACH_GTWX5715=y -+CONFIG_MACH_MI424WR=y - CONFIG_IXP4XX_QMGR=y - CONFIG_IXP4XX_NPE=y - # CONFIG_ARM_THUMB is not set ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -258,6 +258,13 @@ config MACH_MIC256 - Say 'Y' here if you want your kernel to support the MIC256 - board from OMICRON electronics GmbH. - -+config MACH_MI424WR -+ bool "Actiontec MI424WR" -+ depends on ARCH_IXP4XX -+ select PCI -+ help -+ Add support for the Actiontec MI424-WR. -+ - comment "IXP4xx Options" - - config IXP4XX_INDIRECT_PCI ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -25,6 +25,7 @@ obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixd - obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o - obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o - obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o -+obj-pci-$(CONFIG_MACH_MI424WR) += mi424wr-pci.o - - obj-y += common.o - -@@ -51,6 +52,7 @@ obj-$(CONFIG_MACH_COMPEXWP18) += compex4 - obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o - obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o - obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o -+obj-$(CONFIG_MACH_MI424WR) += mi424wr-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/mi424wr-pci.c -@@ -0,0 +1,70 @@ -+/* -+ * arch/arm/mach-ixp4xx/mi424wr-pci.c -+ * -+ * Actiontec MI424WR board-level PCI initialization -+ * -+ * Copyright (C) 2008 Jose Vasconcellos -+ * -+ * Maintainer: Jose Vasconcellos -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+/* PCI controller GPIO to IRQ pin mappings -+ * This information was obtained from Actiontec's GPL release. -+ * -+ * INTA INTB -+ * SLOT 13 8 6 -+ * SLOT 14 7 8 -+ * SLOT 15 6 7 -+ */ -+ -+void __init mi424wr_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init mi424wr_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 13) -+ return IRQ_IXP4XX_GPIO8; -+ if (slot == 14) -+ return IRQ_IXP4XX_GPIO7; -+ if (slot == 15) -+ return IRQ_IXP4XX_GPIO6; -+ -+ return -1; -+} -+ -+struct hw_pci mi424wr_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = mi424wr_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = mi424wr_map_irq, -+}; -+ -+int __init mi424wr_pci_init(void) -+{ -+ if (machine_is_mi424wr()) -+ pci_common_init(&mi424wr_pci); -+ return 0; -+} -+ -+subsys_initcall(mi424wr_pci_init); -+ ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/mi424wr-setup.c -@@ -0,0 +1,387 @@ -+/* -+ * arch/arm/mach-ixp4xx/mi424wr-setup.c -+ * -+ * Actiontec MI424-WR board setup -+ * Copyright (c) 2008 Jose Vasconcellos -+ * -+ * Based on Gemtek GTWX5715 by -+ * Copyright (C) 2004 George T. Joseph -+ * Derived from Coyote -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * GPIO 2,3,4 and 9 are hard wired to the Micrel/Kendin KS8995M Switch -+ * and operate as an SPI type interface. The details of the interface -+ * are available on Kendin/Micrel's web site. -+ */ -+ -+#define MI424WR_KSSPI_SELECT 9 -+#define MI424WR_KSSPI_TXD 4 -+#define MI424WR_KSSPI_CLOCK 2 -+#define MI424WR_KSSPI_RXD 3 -+ -+/* -+ * The "reset" button is wired to GPIO 10. -+ * The GPIO is brought "low" when the button is pushed. -+ */ -+ -+#define MI424WR_BUTTON_GPIO 10 -+#define MI424WR_BUTTON_IRQ IRQ_IXP4XX_GPIO10 -+ -+#define MI424WR_MOCA_WAN_LED 11 -+ -+/* Latch on CS1 - taken from Actiontec's 2.4 source code -+ * -+ * default latch value -+ * 0 - power alarm led (red) 0 (off) -+ * 1 - power led (green) 0 (off) -+ * 2 - wireless led (green) 1 (off) -+ * 3 - no internet led (red) 0 (off) -+ * 4 - internet ok led (green) 0 (off) -+ * 5 - moca LAN 0 (off) -+ * 6 - WAN alarm led (red) 0 (off) -+ * 7 - PCI reset 1 (not reset) -+ * 8 - IP phone 1 led (green) 1 (off) -+ * 9 - IP phone 2 led (green) 1 (off) -+ * 10 - VOIP ready led (green) 1 (off) -+ * 11 - PSTN relay 1 control 0 (PSTN) -+ * 12 - PSTN relay 1 control 0 (PSTN) -+ * 13 - N/A -+ * 14 - N/A -+ * 15 - N/A -+ */ -+ -+#define MI424WR_LATCH_MASK 0x04 -+#define MI424WR_LATCH_DEFAULT 0x1f86 -+ -+#define MI424WR_LATCH_ALARM_LED 0x00 -+#define MI424WR_LATCH_POWER_LED 0x01 -+#define MI424WR_LATCH_WIRELESS_LED 0x02 -+#define MI424WR_LATCH_INET_DOWN_LED 0x03 -+#define MI424WR_LATCH_INET_OK_LED 0x04 -+#define MI424WR_LATCH_MOCA_LAN_LED 0x05 -+#define MI424WR_LATCH_WAN_ALARM_LED 0x06 -+#define MI424WR_LATCH_PCI_RESET 0x07 -+#define MI424WR_LATCH_PHONE1_LED 0x08 -+#define MI424WR_LATCH_PHONE2_LED 0x09 -+#define MI424WR_LATCH_VOIP_LED 0x10 -+#define MI424WR_LATCH_PSTN_RELAY1 0x11 -+#define MI424WR_LATCH_PSTN_RELAY2 0x12 -+ -+/* initialize CS1 to default timings, Intel style, 16-bit bus */ -+#define MI424WR_CS1_CONFIG 0x80000002 -+ -+/* Define both UARTs but they are not easily accessible. -+ */ -+ -+static struct resource mi424wr_uart_resources[] = { -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+ } -+}; -+ -+ -+static struct plat_serial8250_port mi424wr_uart_platform_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device mi424wr_uart_device = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev.platform_data = mi424wr_uart_platform_data, -+ .num_resources = ARRAY_SIZE(mi424wr_uart_resources), -+ .resource = mi424wr_uart_resources, -+}; -+ -+static struct flash_platform_data mi424wr_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource mi424wr_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device mi424wr_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev.platform_data = &mi424wr_flash_data, -+ .num_resources = 1, -+ .resource = &mi424wr_flash_resource, -+}; -+ -+static int mi424wr_spi_boardinfo_setup(struct spi_board_info *bi, -+ struct spi_master *master, void *data) -+{ -+ -+ strlcpy(bi->modalias, "spi-ks8995", sizeof(bi->modalias)); -+ -+ bi->max_speed_hz = 5000000 /* Hz */; -+ bi->bus_num = master->bus_num; -+ bi->mode = SPI_MODE_0; -+ -+ return 0; -+} -+ -+static struct spi_gpio_platform_data mi424wr_spi_bus_data = { -+ .pin_cs = MI424WR_KSSPI_SELECT, -+ .pin_clk = MI424WR_KSSPI_CLOCK, -+ .pin_miso = MI424WR_KSSPI_RXD, -+ .pin_mosi = MI424WR_KSSPI_TXD, -+ .cs_activelow = 1, -+ .no_spi_delay = 1, -+ .boardinfo_setup = mi424wr_spi_boardinfo_setup, -+}; -+ -+static struct gpio_led mi424wr_gpio_led[] = { -+ { -+ .name = "moca-wan", /* green led */ -+ .gpio = MI424WR_MOCA_WAN_LED, -+ .active_low = 0, -+ } -+}; -+ -+static struct gpio_led_platform_data mi424wr_gpio_leds_data = { -+ .num_leds = 1, -+ .leds = mi424wr_gpio_led, -+}; -+ -+static struct platform_device mi424wr_gpio_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev.platform_data = &mi424wr_gpio_leds_data, -+}; -+ -+static uint16_t latch_value = MI424WR_LATCH_DEFAULT; -+static uint16_t __iomem *iobase; -+ -+static void mi424wr_latch_set_led(u8 bit, enum led_brightness value) -+{ -+ -+ if (((MI424WR_LATCH_MASK >> bit) & 1) ^ (value == LED_OFF)) -+ latch_value &= ~(0x1 << bit); -+ else -+ latch_value |= (0x1 << bit); -+ -+ __raw_writew(latch_value, iobase); -+ -+} -+ -+static struct latch_led mi424wr_latch_led[] = { -+ { -+ .name = "power-alarm", -+ .bit = MI424WR_LATCH_ALARM_LED, -+ }, -+ { -+ .name = "power-ok", -+ .bit = MI424WR_LATCH_POWER_LED, -+ }, -+ { -+ .name = "wireless", /* green led */ -+ .bit = MI424WR_LATCH_WIRELESS_LED, -+ }, -+ { -+ .name = "inet-down", /* red led */ -+ .bit = MI424WR_LATCH_INET_DOWN_LED, -+ }, -+ { -+ .name = "inet-up", /* green led */ -+ .bit = MI424WR_LATCH_INET_OK_LED, -+ }, -+ { -+ .name = "moca-lan", /* green led */ -+ .bit = MI424WR_LATCH_MOCA_LAN_LED, -+ }, -+ { -+ .name = "wan-alarm", /* red led */ -+ .bit = MI424WR_LATCH_WAN_ALARM_LED, -+ } -+}; -+ -+static struct latch_led_platform_data mi424wr_latch_leds_data = { -+ .num_leds = ARRAY_SIZE(mi424wr_latch_led), -+ .mem = 0x51000000, -+ .leds = mi424wr_latch_led, -+ .set_led = mi424wr_latch_set_led, -+}; -+ -+static struct platform_device mi424wr_latch_leds = { -+ .name = "leds-latch", -+ .id = -1, -+ .dev.platform_data = &mi424wr_latch_leds_data, -+}; -+ -+static struct platform_device mi424wr_spi_bus = { -+ .name = "spi-gpio", -+ .id = 0, -+ .dev.platform_data = &mi424wr_spi_bus_data, -+}; -+ -+static struct eth_plat_info mi424wr_wan_data = { -+ .phy = 17, /* KS8721 */ -+ .rxq = 3, -+ .txreadyq = 20, -+}; -+ -+static struct eth_plat_info mi424wr_lan_data = { -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0x1e, /* ports 1-4 of the KS8995 switch */ -+ .rxq = 4, -+ .txreadyq = 21, -+}; -+ -+static struct platform_device mi424wr_npe_devices[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = &mi424wr_lan_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = &mi424wr_wan_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct eth_plat_info mi424wr_wanD_data = { -+ .phy = 5, -+ .rxq = 4, -+ .txreadyq = 21, -+}; -+ -+static struct eth_plat_info mi424wr_lanD_data = { -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0x1e, /* ports 1-4 of the KS8995 switch */ -+ .rxq = 3, -+ .txreadyq = 20, -+}; -+ -+static struct platform_device mi424wr_npeD_devices[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = &mi424wr_lanD_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = &mi424wr_wanD_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct platform_device *mi424wr_devices[] __initdata = { -+ &mi424wr_uart_device, -+ &mi424wr_flash, -+ &mi424wr_gpio_leds, -+ &mi424wr_latch_leds, -+ &mi424wr_spi_bus, -+}; -+ -+static void __init mi424wr_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ mi424wr_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ mi424wr_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS1 = MI424WR_CS1_CONFIG; -+ -+ /* configure button as input -+ */ -+ gpio_line_config(MI424WR_BUTTON_GPIO, IXP4XX_GPIO_IN); -+ -+ /* Initialize LEDs and enables PCI bus. -+ */ -+ iobase = ioremap_nocache(IXP4XX_EXP_BUS_BASE(1), 0x1000); -+ __raw_writew(latch_value, iobase); -+ -+ platform_add_devices(mi424wr_devices, ARRAY_SIZE(mi424wr_devices)); -+ -+ /* Need to figure out how to detect revD. -+ * Look for a revision argument sent by redboot. -+ */ -+#define revD 4 -+ if (system_rev == revD) { -+ platform_device_register(&mi424wr_npeD_devices[0]); -+ platform_device_register(&mi424wr_npeD_devices[1]); -+ } else { -+ platform_device_register(&mi424wr_npe_devices[0]); -+ platform_device_register(&mi424wr_npe_devices[1]); -+ } -+} -+ -+ -+MACHINE_START(MI424WR, "Actiontec MI424WR") -+ /* Maintainer: Jose Vasconcellos */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = mi424wr_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+ diff --git a/target/linux/ixp4xx/patches-4.4/190-cambria_support.patch b/target/linux/ixp4xx/patches-4.4/190-cambria_support.patch deleted file mode 100644 index d6787f4e9..000000000 --- a/target/linux/ixp4xx/patches-4.4/190-cambria_support.patch +++ /dev/null @@ -1,1131 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -21,6 +21,14 @@ config MACH_AVILA - Avila Network Platform. For more information on this platform, - see . - -+config MACH_CAMBRIA -+ bool "Cambria" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support the Gateworks -+ Cambria series. For more information on this platform, -+ see . -+ - config MACH_LOFT - bool "Loft" - depends on MACH_AVILA -@@ -218,7 +226,7 @@ config CPU_IXP46X - - config CPU_IXP43X - bool -- depends on MACH_KIXRP435 -+ depends on MACH_KIXRP435 || MACH_CAMBRIA - default y - - config MACH_GTWX5715 ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -7,6 +7,7 @@ obj-pci-n := - - obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o - obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o -+obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o - obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o - obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o - obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o -@@ -31,6 +32,7 @@ obj-y += common.o - - obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o - obj-$(CONFIG_MACH_AVILA) += avila-setup.o -+obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o - obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o - obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o - obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/cambria-pci.c -@@ -0,0 +1,78 @@ -+/* -+ * arch/arch/mach-ixp4xx/cambria-pci.c -+ * -+ * PCI setup routines for Gateworks Cambria series -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * -+ * Maintainer: Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#include -+ -+extern void ixp4xx_pci_preinit(void); -+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); -+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); -+ -+void __init cambria_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init cambria_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 1) -+ return IRQ_IXP4XX_GPIO11; -+ else if (slot == 2) -+ return IRQ_IXP4XX_GPIO10; -+ else if (slot == 3) -+ return IRQ_IXP4XX_GPIO9; -+ else if (slot == 4) -+ return IRQ_IXP4XX_GPIO8; -+ else if (slot == 6) -+ return IRQ_IXP4XX_GPIO10; -+ else if (slot == 15) -+ return IRQ_IXP4XX_GPIO8; -+ -+ else return -1; -+} -+ -+struct hw_pci cambria_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = cambria_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = cambria_map_irq, -+}; -+ -+int __init cambria_pci_init(void) -+{ -+ if (machine_is_cambria()) -+ pci_common_init(&cambria_pci); -+ return 0; -+} -+ -+subsys_initcall(cambria_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/cambria-setup.c -@@ -0,0 +1,1003 @@ -+/* -+ * arch/arm/mach-ixp4xx/cambria-setup.c -+ * -+ * Board setup for the Gateworks Cambria series -+ * -+ * Copyright (C) 2008 Imre Kaloz -+ * Copyright (C) 2012 Gateworks Corporation -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ * Tim Harvey -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) -+ -+struct cambria_board_info { -+ unsigned char *model; -+ void (*setup)(void); -+}; -+ -+static struct cambria_board_info *cambria_info __initdata; -+ -+static struct flash_platform_data cambria_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource cambria_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device cambria_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &cambria_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &cambria_flash_resource, -+}; -+ -+static struct i2c_gpio_platform_data cambria_i2c_gpio_data = { -+ .sda_pin = 7, -+ .scl_pin = 6, -+}; -+ -+static struct platform_device cambria_i2c_gpio = { -+ .name = "i2c-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = &cambria_i2c_gpio_data, -+ }, -+}; -+ -+#ifdef SFP_SERIALID -+static struct i2c_gpio_platform_data cambria_i2c_gpio_sfpa_data = { -+ .sda_pin = 113, -+ .scl_pin = 112, -+ .sda_is_open_drain = 0, -+ .scl_is_open_drain = 0, -+}; -+ -+static struct platform_device cambria_i2c_gpio_sfpa = { -+ .name = "i2c-gpio", -+ .id = 1, -+ .dev = { -+ .platform_data = &cambria_i2c_gpio_sfpa_data, -+ }, -+}; -+ -+static struct i2c_gpio_platform_data cambria_i2c_gpio_sfpb_data = { -+ .sda_pin = 115, -+ .scl_pin = 114, -+ .sda_is_open_drain = 0, -+ .scl_is_open_drain = 0, -+}; -+ -+static struct platform_device cambria_i2c_gpio_sfpb = { -+ .name = "i2c-gpio", -+ .id = 2, -+ .dev = { -+ .platform_data = &cambria_i2c_gpio_sfpb_data, -+ }, -+}; -+#endif // #ifdef SFP_SERIALID -+ -+static struct eth_plat_info cambria_npec_data = { -+ .phy = 1, -+ .rxq = 4, -+ .txreadyq = 21, -+}; -+ -+static struct eth_plat_info cambria_npea_data = { -+ .phy = 2, -+ .rxq = 2, -+ .txreadyq = 19, -+}; -+ -+static struct platform_device cambria_npec_device = { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = &cambria_npec_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+}; -+ -+static struct platform_device cambria_npea_device = { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEA, -+ .dev.platform_data = &cambria_npea_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+}; -+ -+static struct resource cambria_uart_resource = { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct plat_serial8250_port cambria_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device cambria_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = cambria_uart_data, -+ }, -+ .num_resources = 1, -+ .resource = &cambria_uart_resource, -+}; -+ -+static struct resource cambria_optional_uart_resources[] = { -+ { -+ .start = 0x52000000, -+ .end = 0x52000fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = 0x53000000, -+ .end = 0x53000fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = 0x52000000, -+ .end = 0x52000fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = 0x52000000, -+ .end = 0x52000fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = 0x52000000, -+ .end = 0x52000fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = 0x52000000, -+ .end = 0x52000fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = 0x52000000, -+ .end = 0x52000fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = 0x53000000, -+ .end = 0x53000fff, -+ .flags = IORESOURCE_MEM -+ } -+}; -+ -+static struct plat_serial8250_port cambria_optional_uart_data[] = { -+ { -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM_DELAY, -+ .regshift = 0, -+ .uartclk = 1843200, -+ .rw_delay = 10, -+ }, -+ { -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM_DELAY, -+ .regshift = 0, -+ .uartclk = 1843200, -+ .rw_delay = 10, -+ }, -+ { -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ }, -+ { -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ }, -+ { -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ }, -+ { -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ }, -+ { -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ }, -+ { }, -+}; -+ -+static struct platform_device cambria_optional_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM1, -+ .dev.platform_data = cambria_optional_uart_data, -+ .num_resources = 2, -+ .resource = cambria_optional_uart_resources, -+}; -+ -+static struct resource cambria_pata_resources[] = { -+ { -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .name = "intrq", -+ .start = IRQ_IXP4XX_GPIO12, -+ .end = IRQ_IXP4XX_GPIO12, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct ixp4xx_pata_data cambria_pata_data = { -+ .cs0_bits = 0xbfff3c03, -+ .cs1_bits = 0xbfff3c03, -+}; -+ -+static struct platform_device cambria_pata = { -+ .name = "pata_ixp4xx_cf", -+ .id = 0, -+ .dev.platform_data = &cambria_pata_data, -+ .num_resources = ARRAY_SIZE(cambria_pata_resources), -+ .resource = cambria_pata_resources, -+}; -+ -+static struct gpio_led cambria_gpio_leds[] = { -+ { -+ .name = "user", -+ .gpio = 5, -+ .active_low = 1, -+ }, -+ { -+ .name = "user2", -+ .gpio = 0, -+ .active_low = 1, -+ }, -+ { -+ .name = "user3", -+ .gpio = 0, -+ .active_low = 1, -+ }, -+ { -+ .name = "user4", -+ .gpio = 0, -+ .active_low = 1, -+ } -+}; -+ -+static struct gpio_led_platform_data cambria_gpio_leds_data = { -+ .num_leds = 1, -+ .leds = cambria_gpio_leds, -+}; -+ -+static struct platform_device cambria_gpio_leds_device = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev.platform_data = &cambria_gpio_leds_data, -+}; -+ -+static struct resource cambria_gpio_resources[] = { -+ { -+ .name = "gpio", -+ .flags = 0, -+ }, -+}; -+ -+static struct gpio cambria_gpios_gw2350[] = { -+ // ARM GPIO -+#if 0 // configured from bootloader -+ { 0, GPIOF_IN, "ARM_DIO0" }, -+ { 1, GPIOF_IN, "ARM_DIO1" }, -+ { 2, GPIOF_IN, "ARM_DIO2" }, -+ { 3, GPIOF_IN, "ARM_DIO3" }, -+ { 4, GPIOF_IN, "ARM_DIO4" }, -+ { 5, GPIOF_IN, "ARM_DIO5" }, -+ { 12, GPIOF_OUT_INIT_HIGH, "WDOGEN#" }, -+#endif -+ { 8, GPIOF_IN, "ARM_DIO8" }, -+ { 9, GPIOF_IN, "ARM_DIO9" }, -+}; -+ -+static struct gpio cambria_gpios_gw2358[] = { -+ // ARM GPIO -+#if 0 // configured from bootloader -+ { 0, GPIOF_IN, "*VINLOW#" }, -+ { 2, GPIOF_IN, "*GPS_PPS" }, -+ { 3, GPIOF_IN, "*GPS_IRQ#" }, -+ { 4, GPIOF_IN, "*RS485_IRQ#" }, -+ { 5, GPIOF_IN, "*SER_EN#" }, -+ { 14, GPIOF_OUT_INIT_HIGH, "*WDOGEN#" }, -+#endif -+}; -+ -+static struct gpio cambria_gpios_gw2359[] = { -+ // ARM GPIO -+#if 0 // configured from bootloader -+ { 0, GPIOF_IN, "*PCA_IRQ#" }, -+ { 1, GPIOF_IN, "ARM_DIO1" }, -+ { 2, GPIOF_IN, "ARM_DIO2" }, -+ { 3, GPIOF_IN, "ARM_DIO3" }, -+ { 4, GPIOF_IN, "ARM_DIO4" }, -+ { 5, GPIOF_IN, "ARM_DIO5" }, -+ { 8, GPIOF_OUT_INIT_HIGH, "*WDOGEN#" }, -+#endif -+ { 11, GPIOF_OUT_INIT_HIGH, "*SER_EN" }, // console serial enable -+ { 12, GPIOF_IN, "*GSC_IRQ#" }, -+ { 13, GPIOF_OUT_INIT_HIGH, "*PCIE_RST#"}, -+ // GSC GPIO -+#if !(IS_ENABLED(CONFIG_KEYBOARD_GPIO_POLLED)) -+ {100, GPIOF_IN, "*USER_PB#" }, -+#endif -+ {103, GPIOF_OUT_INIT_HIGH, "*5V_EN" }, // 5V aux supply enable -+ {108, GPIOF_IN, "*SMUXDA0" }, -+ {109, GPIOF_IN, "*SMUXDA1" }, -+ {110, GPIOF_IN, "*SMUXDA2" }, -+ {111, GPIOF_IN, "*SMUXDB0" }, -+ {112, GPIOF_IN, "*SMUXDB1" }, -+ {113, GPIOF_IN, "*SMUXDB2" }, -+ // PCA GPIO -+ {118, GPIOF_IN, "*USIM2_DET#"}, // USIM2 Detect -+ {120, GPIOF_OUT_INIT_LOW, "*USB1_PCI_SEL"}, // USB1 Select (1=PCI, 0=FP) -+ {121, GPIOF_OUT_INIT_LOW, "*USB2_PCI_SEL"}, // USB2 Select (1=PCI, 0=FP) -+ {122, GPIOF_IN, "*USIM1_DET#"}, // USIM1 Detect -+ {123, GPIOF_OUT_INIT_HIGH, "*COM1_DTR#" }, // J21/J10 -+ {124, GPIOF_IN, "*COM1_DSR#" }, // J21/J10 -+ {127, GPIOF_IN, "PCA_DIO0" }, -+ {128, GPIOF_IN, "PCA_DIO1" }, -+ {129, GPIOF_IN, "PCA_DIO2" }, -+ {130, GPIOF_IN, "PCA_DIO3" }, -+ {131, GPIOF_IN, "PCA_DIO4" }, -+}; -+ -+static struct gpio cambria_gpios_gw2360[] = { -+ // ARM GPIO -+ { 0, GPIOF_IN, "*PCA_IRQ#" }, -+ { 11, GPIOF_OUT_INIT_LOW, "*SER0_EN#" }, -+ { 12, GPIOF_IN, "*GSC_IRQ#" }, -+ { 13, GPIOF_OUT_INIT_HIGH, "*PCIE_RST#"}, -+ // GSC GPIO -+#if !(IS_ENABLED(CONFIG_KEYBOARD_GPIO_POLLED)) -+ {100, GPIOF_IN, "*USER_PB#" }, -+#endif -+ {108, GPIOF_OUT_INIT_LOW, "*ENET1_EN#" }, // ENET1 TX Enable -+ {109, GPIOF_IN, "*ENET1_PRES#" }, // ENET1 Detect (0=SFP present) -+ {110, GPIOF_OUT_INIT_LOW, "*ENET2_EN#" }, // ENET2 TX Enable -+ {111, GPIOF_IN, "*ENET2_PRES#"}, // ENET2 Detect (0=SFP present) -+ // PCA GPIO -+ {116, GPIOF_OUT_INIT_HIGH, "*USIM2_LOC"}, // USIM2 Select (1=Loc, 0=Rem) -+ {117, GPIOF_IN, "*USIM2_DET_LOC#" },// USIM2 Detect (Local Slot) -+ {118, GPIOF_IN, "*USIM2_DET_REM#" },// USIM2 Detect (Remote Slot) -+ {120, GPIOF_OUT_INIT_LOW, "*USB1_PCI_SEL"}, // USB1 Select (1=PCIe1, 0=J1) -+ {121, GPIOF_OUT_INIT_LOW, "*USB2_PCI_SEL"}, // USB2 Select (1=PCIe2, 0=J1) -+ {122, GPIOF_IN, "*USIM1_DET#"}, // USIM1 Detect -+ {127, GPIOF_IN, "DIO0" }, -+ {128, GPIOF_IN, "DIO1" }, -+ {129, GPIOF_IN, "DIO2" }, -+ {130, GPIOF_IN, "DIO3" }, -+ {131, GPIOF_IN, "DIO4" }, -+}; -+ -+static struct latch_led cambria_latch_leds[] = { -+ { -+ .name = "ledA", /* green led */ -+ .bit = 0, -+ }, -+ { -+ .name = "ledB", /* green led */ -+ .bit = 1, -+ }, -+ { -+ .name = "ledC", /* green led */ -+ .bit = 2, -+ }, -+ { -+ .name = "ledD", /* green led */ -+ .bit = 3, -+ }, -+ { -+ .name = "ledE", /* green led */ -+ .bit = 4, -+ }, -+ { -+ .name = "ledF", /* green led */ -+ .bit = 5, -+ }, -+ { -+ .name = "ledG", /* green led */ -+ .bit = 6, -+ }, -+ { -+ .name = "ledH", /* green led */ -+ .bit = 7, -+ } -+}; -+ -+static struct latch_led_platform_data cambria_latch_leds_data = { -+ .num_leds = 8, -+ .leds = cambria_latch_leds, -+ .mem = 0x53F40000, -+}; -+ -+static struct platform_device cambria_latch_leds_device = { -+ .name = "leds-latch", -+ .id = -1, -+ .dev.platform_data = &cambria_latch_leds_data, -+}; -+ -+static struct resource cambria_usb0_resources[] = { -+ { -+ .start = 0xCD000000, -+ .end = 0xCD000300, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = 32, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct resource cambria_usb1_resources[] = { -+ { -+ .start = 0xCE000000, -+ .end = 0xCE000300, -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = 33, -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static u64 ehci_dma_mask = ~(u32)0; -+ -+static struct usb_ehci_pdata cambria_usb_pdata = { -+ .big_endian_desc = 1, -+ .big_endian_mmio = 1, -+ .has_tt = 1, -+ .caps_offset = 0x100, -+}; -+ -+static struct platform_device cambria_usb0_device = { -+ .name = "ehci-platform", -+ .id = 0, -+ .resource = cambria_usb0_resources, -+ .num_resources = ARRAY_SIZE(cambria_usb0_resources), -+ .dev = { -+ .dma_mask = &ehci_dma_mask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &cambria_usb_pdata, -+ }, -+}; -+ -+static struct platform_device cambria_usb1_device = { -+ .name = "ehci-platform", -+ .id = 1, -+ .resource = cambria_usb1_resources, -+ .num_resources = ARRAY_SIZE(cambria_usb1_resources), -+ .dev = { -+ .dma_mask = &ehci_dma_mask, -+ .coherent_dma_mask = 0xffffffff, -+ .platform_data = &cambria_usb_pdata, -+ }, -+}; -+ -+static struct gw_i2c_pld_platform_data gw_i2c_pld_data0 = { -+ .gpio_base = 16, -+ .nr_gpio = 8, -+}; -+ -+static struct gw_i2c_pld_platform_data gw_i2c_pld_data1 = { -+ .gpio_base = 24, -+ .nr_gpio = 2, -+}; -+ -+ -+static struct gpio_keys_button cambria_gpio_buttons[] = { -+ { -+ .desc = "user", -+ .type = EV_KEY, -+ .code = BTN_0, -+ .debounce_interval = 6, -+ .gpio = 25, -+ } -+}; -+ -+static struct gpio_keys_platform_data cambria_gpio_buttons_data = { -+ .poll_interval = 500, -+ .nbuttons = 1, -+ .buttons = cambria_gpio_buttons, -+}; -+ -+static struct platform_device cambria_gpio_buttons_device = { -+ .name = "gpio-keys-polled", -+ .id = -1, -+ .dev.platform_data = &cambria_gpio_buttons_data, -+}; -+ -+static struct platform_device *cambria_devices[] __initdata = { -+ &cambria_i2c_gpio, -+ &cambria_flash, -+ &cambria_uart, -+}; -+ -+static int cambria_register_gpio(struct gpio *array, size_t num) -+{ -+ int i, err, ret; -+ -+ ret = 0; -+ for (i = 0; i < num; i++, array++) { -+ const char *label = array->label; -+ if (label[0] == '*') -+ label++; -+ err = gpio_request_one(array->gpio, array->flags, label); -+ if (err) -+ ret = err; -+ else { -+ err = gpio_export(array->gpio, array->label[0] != '*'); -+ } -+ } -+ return ret; -+} -+ -+static void __init cambria_gw23xx_setup(void) -+{ -+ cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\ -+ (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12); -+ cambria_gpio_resources[0].end = cambria_gpio_resources[0].start; -+ -+ platform_device_register(&cambria_npec_device); -+ platform_device_register(&cambria_npea_device); -+} -+ -+static void __init cambria_gw2350_setup(void) -+{ -+ *IXP4XX_EXP_CS2 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING); -+ cambria_optional_uart_data[0].mapbase = 0x52FF0000; -+ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52FF0000, 0x0fff); -+ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3; -+ -+ *IXP4XX_EXP_CS3 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING); -+ cambria_optional_uart_data[1].mapbase = 0x53FF0000; -+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53FF0000, 0x0fff); -+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4; -+ -+ cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\ -+ (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12); -+ cambria_gpio_resources[0].end = cambria_gpio_resources[0].start; -+ -+ platform_device_register(&cambria_optional_uart); -+ platform_device_register(&cambria_npec_device); -+ platform_device_register(&cambria_npea_device); -+ -+ platform_device_register(&cambria_usb0_device); -+ platform_device_register(&cambria_usb1_device); -+ -+ platform_device_register(&cambria_gpio_leds_device); -+ -+ /* gpio config (/sys/class/gpio) */ -+ cambria_register_gpio(ARRAY_AND_SIZE(cambria_gpios_gw2350)); -+} -+ -+static void __init cambria_gw2358_setup(void) -+{ -+ *IXP4XX_EXP_CS3 = 0xBFFF3C43; // bit0 = 16bit vs 8bit bus -+ irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING); -+ cambria_optional_uart_data[0].mapbase = 0x53FC0000; -+ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff); -+ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3; -+ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING); -+ cambria_optional_uart_data[1].mapbase = 0x53F80000; -+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff); -+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4; -+ -+ cambria_gpio_resources[0].start = (1 << 14) | (1 << 16) | (1 << 17) | (1 << 18) |\ -+ (1 << 19) | (1 << 20) | (1 << 24) | (1 << 25); -+ cambria_gpio_resources[0].end = cambria_gpio_resources[0].start; -+ -+ platform_device_register(&cambria_optional_uart); -+ -+ platform_device_register(&cambria_npec_device); -+ platform_device_register(&cambria_npea_device); -+ -+ platform_device_register(&cambria_usb0_device); -+ platform_device_register(&cambria_usb1_device); -+ -+ platform_device_register(&cambria_pata); -+ -+ cambria_gpio_leds[0].gpio = 24; -+ platform_device_register(&cambria_gpio_leds_device); -+ -+ platform_device_register(&cambria_latch_leds_device); -+ -+ platform_device_register(&cambria_gpio_buttons_device); -+ -+ /* gpio config (/sys/class/gpio) */ -+ cambria_register_gpio(ARRAY_AND_SIZE(cambria_gpios_gw2358)); -+} -+ -+static void __init cambria_gw2359_setup(void) -+{ -+#if defined(CONFIG_MVSWITCH_PHY) || defined(CONFIG_MVSWITCH_PHY_MODULE) -+ /* The mvswitch driver has some hard-coded values which could -+ * easily be turned into a platform resource if needed. For now they -+ * match our hardware configuration: -+ * MV_BASE 0x10 - phy base address -+ * MV_WANPORT 0 - Port0 (ENET2) is WAN (SFP module) -+ * MV_CPUPORT 5 - Port5 is CPU NPEA (eth1) -+ * -+ * The mvswitch driver registers a fixup which forces a driver match -+ * if phy_addr matches MV_BASE -+ * -+ * Two static defautl VLAN's are created: WAN port in 1, and all other ports -+ * in the other. -+ */ -+ cambria_npea_data.phy = 0x10; // mvswitch driver catches this -+#else -+ // Switch Port5 to CPU is MII<->MII (no PHY) - this disables the genphy driver -+ cambria_npea_data.phy = IXP4XX_ETH_PHY_MAX_ADDR; -+ // CPU NPE-C is in bridge bypass mode to Port4 PHY@0x14 -+ cambria_npec_data.phy = 0x14; -+#endif -+ platform_device_register(&cambria_npec_device); -+ platform_device_register(&cambria_npea_device); -+ -+ platform_device_register(&cambria_usb0_device); -+ platform_device_register(&cambria_usb1_device); -+ -+ cambria_gpio_leds_data.num_leds = 3; -+ cambria_gpio_leds[0].name = "user1"; -+ cambria_gpio_leds[0].gpio = 125; // PNLLED1# -+ cambria_gpio_leds[1].gpio = 126; // PNLLED3# -+ cambria_gpio_leds[2].gpio = 119; // PNLLED4# -+ platform_device_register(&cambria_gpio_leds_device); -+ -+#if (IS_ENABLED(CONFIG_KEYBOARD_GPIO_POLLED)) -+ cambria_gpio_buttons[0].gpio = 100; -+ platform_device_register(&cambria_gpio_buttons_device); -+#endif -+ -+ /* gpio config (/sys/class/gpio) */ -+ cambria_register_gpio(ARRAY_AND_SIZE(cambria_gpios_gw2359)); -+} -+ -+static void __init cambria_gw2360_setup(void) -+{ -+ /* The GW2360 has 8 UARTs in addition to the 1 IXP4xxx UART. -+ * The chip-selects are expanded via a 3-to-8 decoder and CS2 -+ * and they are 8bit devices -+ */ -+ *IXP4XX_EXP_CS2 = 0xBFFF3C43; -+ cambria_optional_uart_data[0].mapbase = 0x52000000; -+ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52000000, 0x0fff); -+ cambria_optional_uart_data[0].uartclk = 18432000; -+ cambria_optional_uart_data[0].iotype = UPIO_MEM; -+ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO2; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO2, IRQ_TYPE_EDGE_RISING); -+ -+ cambria_optional_uart_data[1].mapbase = 0x52000008; -+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x52000008, 0x0fff); -+ cambria_optional_uart_data[1].uartclk = 18432000; -+ cambria_optional_uart_data[1].iotype = UPIO_MEM; -+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO3; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING); -+ -+ cambria_optional_uart_data[2].mapbase = 0x52000010; -+ cambria_optional_uart_data[2].membase = (void __iomem *)ioremap(0x52000010, 0x0fff); -+ cambria_optional_uart_data[2].uartclk = 18432000; -+ cambria_optional_uart_data[2].iotype = UPIO_MEM; -+ cambria_optional_uart_data[2].irq = IRQ_IXP4XX_GPIO4; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_EDGE_RISING); -+ -+ cambria_optional_uart_data[3].mapbase = 0x52000018; -+ cambria_optional_uart_data[3].membase = (void __iomem *)ioremap(0x52000018, 0x0fff); -+ cambria_optional_uart_data[3].uartclk = 18432000; -+ cambria_optional_uart_data[3].iotype = UPIO_MEM; -+ cambria_optional_uart_data[3].irq = IRQ_IXP4XX_GPIO5; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO5, IRQ_TYPE_EDGE_RISING); -+ -+ cambria_optional_uart_data[4].mapbase = 0x52000020; -+ cambria_optional_uart_data[4].membase = (void __iomem *)ioremap(0x52000020, 0x0fff); -+ cambria_optional_uart_data[4].uartclk = 18432000; -+ cambria_optional_uart_data[4].iotype = UPIO_MEM; -+ cambria_optional_uart_data[4].irq = IRQ_IXP4XX_GPIO8; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_EDGE_RISING); -+ -+ cambria_optional_uart_data[5].mapbase = 0x52000028; -+ cambria_optional_uart_data[5].membase = (void __iomem *)ioremap(0x52000028, 0x0fff); -+ cambria_optional_uart_data[5].uartclk = 18432000; -+ cambria_optional_uart_data[5].iotype = UPIO_MEM; -+ cambria_optional_uart_data[5].irq = IRQ_IXP4XX_GPIO9; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_EDGE_RISING); -+ -+ cambria_optional_uart_data[6].mapbase = 0x52000030; -+ cambria_optional_uart_data[6].membase = (void __iomem *)ioremap(0x52000030, 0x0fff); -+ cambria_optional_uart_data[6].uartclk = 18432000; -+ cambria_optional_uart_data[6].iotype = UPIO_MEM; -+ cambria_optional_uart_data[6].irq = IRQ_IXP4XX_GPIO10; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_EDGE_RISING); -+ -+ cambria_optional_uart.num_resources = 7, -+ platform_device_register(&cambria_optional_uart); -+ -+#if defined(CONFIG_MVSWITCH_PHY) || defined(CONFIG_MVSWITCH_PHY_MODULE) -+ /* The mvswitch driver has some hard-coded values which could -+ * easily be turned into a platform resource if needed. For now they -+ * match our hardware configuration: -+ * MV_BASE 0x10 - phy base address -+ * MV_WANPORT 0 - Port0 (ENET2) is WAN (SFP module) -+ * MV_CPUPORT 5 - Port5 is CPU NPEA (eth1) -+ * -+ * The mvswitch driver registers a fixup which forces a driver match -+ * if phy_addr matches MV_BASE -+ * -+ * Two static defautl VLAN's are created: WAN port in 1, and all other ports -+ * in the other. -+ */ -+ cambria_npea_data.phy = 0x10; // mvswitch driver catches this -+#else -+ // Switch Port5 to CPU is MII<->MII (no PHY) - this disables the generic PHY driver -+ cambria_npea_data.phy = IXP4XX_ETH_PHY_MAX_ADDR; -+#endif -+ -+ // disable genphy autonegotiation on NPE-C PHY (eth1) as its 100BaseFX -+ //cambria_npec_data.noautoneg = 1; // disable autoneg -+ cambria_npec_data.speed_10 = 0; // 100mbps -+ cambria_npec_data.half_duplex = 0; // full-duplex -+ platform_device_register(&cambria_npec_device); -+ platform_device_register(&cambria_npea_device); -+ -+ platform_device_register(&cambria_usb0_device); -+ platform_device_register(&cambria_usb1_device); -+ -+ cambria_gpio_leds_data.num_leds = 3; -+ cambria_gpio_leds[0].name = "user1"; -+ cambria_gpio_leds[0].gpio = 125; -+ cambria_gpio_leds[1].gpio = 126; -+ cambria_gpio_leds[2].gpio = 119; -+ platform_device_register(&cambria_gpio_leds_device); -+ -+#if (IS_ENABLED(CONFIG_KEYBOARD_GPIO_POLLED)) -+ cambria_gpio_buttons[0].gpio = 100; -+ platform_device_register(&cambria_gpio_buttons_device); -+#endif -+ -+#ifdef SFP_SERIALID -+ /* the SFP modules each have an i2c bus for serial ident via GSC GPIO -+ * To use these the i2c-gpio driver must be changed to use the _cansleep -+ * varients of gpio_get_value/gpio_set_value (I don't know why it doesn't -+ * use that anyway as it doesn't operate in an IRQ context). -+ * Additionally the i2c-gpio module must set the gpio to output-high prior -+ * to changing direction to an input to enable internal Pullups -+ */ -+ platform_device_register(&cambria_i2c_gpio_sfpa); -+ platform_device_register(&cambria_i2c_gpio_sfpb); -+#endif -+ -+ /* gpio config (/sys/class/gpio) */ -+ cambria_register_gpio(ARRAY_AND_SIZE(cambria_gpios_gw2360)); -+} -+ -+static struct cambria_board_info cambria_boards[] __initdata = { -+ { -+ .model = "GW2350", -+ .setup = cambria_gw2350_setup, -+ }, { -+ .model = "GW2351", -+ .setup = cambria_gw2350_setup, -+ }, { -+ .model = "GW2358", -+ .setup = cambria_gw2358_setup, -+ }, { -+ .model = "GW2359", -+ .setup = cambria_gw2359_setup, -+ }, { -+ .model = "GW2360", -+ .setup = cambria_gw2360_setup, -+ }, { -+ .model = "GW2371", -+ .setup = cambria_gw2358_setup, -+ } -+}; -+ -+static struct cambria_board_info * __init cambria_find_board_info(char *model) -+{ -+ int i; -+ model[6] = '\0'; -+ -+ for (i = 0; i < ARRAY_SIZE(cambria_boards); i++) { -+ struct cambria_board_info *info = &cambria_boards[i]; -+ if (strcmp(info->model, model) == 0) -+ return info; -+ } -+ -+ return NULL; -+} -+ -+static struct memory_accessor *at24_mem_acc; -+ -+static void at24_setup(struct memory_accessor *mem_acc, void *context) -+{ -+ char mac_addr[ETH_ALEN]; -+ char model[7]; -+ -+ at24_mem_acc = mem_acc; -+ -+ /* Read MAC addresses */ -+ if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x0, 6) == 6) { -+ memcpy(&cambria_npec_data.hwaddr, mac_addr, ETH_ALEN); -+ } -+ if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x6, 6) == 6) { -+ memcpy(&cambria_npea_data.hwaddr, mac_addr, ETH_ALEN); -+ } -+ -+ /* Read the first 6 bytes of the model number */ -+ if (at24_mem_acc->read(at24_mem_acc, model, 0x20, 6) == 6) { -+ cambria_info = cambria_find_board_info(model); -+ } -+ -+} -+ -+static struct at24_platform_data cambria_eeprom_info = { -+ .byte_len = 1024, -+ .page_size = 16, -+ .flags = AT24_FLAG_READONLY, -+ .setup = at24_setup, -+}; -+ -+static struct pca953x_platform_data cambria_pca_data = { -+ .gpio_base = 100, -+ .irq_base = -1, -+}; -+ -+static struct pca953x_platform_data cambria_pca2_data = { -+ .gpio_base = 116, -+ .irq_base = -1, -+}; -+ -+static struct i2c_board_info __initdata cambria_i2c_board_info[] = { -+ { -+ I2C_BOARD_INFO("pca9555", 0x23), -+ .platform_data = &cambria_pca_data, -+ }, -+ { -+ I2C_BOARD_INFO("pca9555", 0x27), -+ .platform_data = &cambria_pca2_data, -+ }, -+ { -+ I2C_BOARD_INFO("ds1672", 0x68), -+ }, -+ { -+ I2C_BOARD_INFO("gsp", 0x29), -+ }, -+ { -+ I2C_BOARD_INFO("ad7418", 0x28), -+ }, -+ { -+ I2C_BOARD_INFO("24c08", 0x51), -+ .platform_data = &cambria_eeprom_info -+ }, -+ { -+ I2C_BOARD_INFO("gw_i2c_pld", 0x56), -+ .platform_data = &gw_i2c_pld_data0, -+ }, -+ { -+ I2C_BOARD_INFO("gw_i2c_pld", 0x57), -+ .platform_data = &gw_i2c_pld_data1, -+ }, -+}; -+ -+static void __init cambria_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; // make sure window is writable -+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; -+ -+ platform_add_devices(ARRAY_AND_SIZE(cambria_devices)); -+ -+ cambria_pata_resources[0].start = 0x53e00000; -+ cambria_pata_resources[0].end = 0x53e3ffff; -+ -+ cambria_pata_resources[1].start = 0x53e40000; -+ cambria_pata_resources[1].end = 0x53e7ffff; -+ -+ cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3; -+ cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3; -+ -+ i2c_register_board_info(0, ARRAY_AND_SIZE(cambria_i2c_board_info)); -+} -+ -+static int __init cambria_model_setup(void) -+{ -+ if (!machine_is_cambria()) -+ return 0; -+ -+ if (cambria_info) { -+ printk(KERN_DEBUG "Running on Gateworks Cambria %s\n", -+ cambria_info->model); -+ cambria_info->setup(); -+ } else { -+ printk(KERN_INFO "Unknown/missing Cambria model number" -+ " -- defaults will be used\n"); -+ cambria_gw23xx_setup(); -+ } -+ -+ return 0; -+} -+late_initcall(cambria_model_setup); -+ -+MACHINE_START(CAMBRIA, "Gateworks Cambria series") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = cambria_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END diff --git a/target/linux/ixp4xx/patches-4.4/201-npe_driver_print_license_location.patch b/target/linux/ixp4xx/patches-4.4/201-npe_driver_print_license_location.patch deleted file mode 100644 index f46b9c61b..000000000 --- a/target/linux/ixp4xx/patches-4.4/201-npe_driver_print_license_location.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c -+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c -@@ -586,6 +586,8 @@ int npe_load_firmware(struct npe *npe, c - npe_reset(npe); - #endif - -+ print_npe(KERN_INFO, npe, "firmware's license can be found in /usr/share/doc/LICENSE.IPL\n"); -+ - print_npe(KERN_INFO, npe, "firmware functionality 0x%X, " - "revision 0x%X:%X\n", (image->id >> 16) & 0xFF, - (image->id >> 8) & 0xFF, image->id & 0xFF); diff --git a/target/linux/ixp4xx/patches-4.4/203-npe_driver_mask_phy_features.patch b/target/linux/ixp4xx/patches-4.4/203-npe_driver_mask_phy_features.patch deleted file mode 100644 index 359873d7d..000000000 --- a/target/linux/ixp4xx/patches-4.4/203-npe_driver_mask_phy_features.patch +++ /dev/null @@ -1,13 +0,0 @@ ---- a/drivers/net/ethernet/xscale/ixp4xx_eth.c -+++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c -@@ -1474,6 +1474,10 @@ static int eth_init_one(struct platform_ - goto err_free_mem; - } - -+ /* mask with MAC supported features */ -+ port->phydev->supported &= PHY_BASIC_FEATURES; -+ port->phydev->advertising = port->phydev->supported; -+ - port->phydev->irq = PHY_POLL; - - if ((err = register_netdev(dev))) diff --git a/target/linux/ixp4xx/patches-4.4/205-npe_driver_separate_phy_functions.patch b/target/linux/ixp4xx/patches-4.4/205-npe_driver_separate_phy_functions.patch deleted file mode 100644 index 6d1eb7bfb..000000000 --- a/target/linux/ixp4xx/patches-4.4/205-npe_driver_separate_phy_functions.patch +++ /dev/null @@ -1,131 +0,0 @@ -From e3eab80fb5d0a7d7fdb0f2f231b27161d5ec3804 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sun, 30 Jun 2013 15:52:53 +0200 -Subject: [PATCH 23/36] 205-npe_driver_separate_phy_functions.patch - ---- - drivers/net/ethernet/xscale/ixp4xx_eth.c | 70 ++++++++++++++++++++++-------- - 1 file changed, 51 insertions(+), 19 deletions(-) - ---- a/drivers/net/ethernet/xscale/ixp4xx_eth.c -+++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c -@@ -589,6 +589,51 @@ static void ixp4xx_adjust_link(struct ne - dev->name, port->speed, port->duplex ? "full" : "half"); - } - -+static int ixp4xx_phy_connect(struct net_device *dev) -+{ -+ struct port *port = netdev_priv(dev); -+ struct eth_plat_info *plat = port->plat; -+ char phy_id[MII_BUS_ID_SIZE + 3]; -+ -+ snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, -+ mdio_bus->id, plat->phy); -+ port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, -+ PHY_INTERFACE_MODE_MII); -+ if (IS_ERR(port->phydev)) { -+ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); -+ return PTR_ERR(port->phydev); -+ } -+ -+ /* mask with MAC supported features */ -+ port->phydev->supported &= PHY_BASIC_FEATURES; -+ port->phydev->advertising = port->phydev->supported; -+ -+ port->phydev->irq = PHY_POLL; -+ -+ return 0; -+} -+ -+static void ixp4xx_phy_disconnect(struct net_device *dev) -+{ -+ struct port *port = netdev_priv(dev); -+ -+ phy_disconnect(port->phydev); -+} -+ -+static void ixp4xx_phy_start(struct net_device *dev) -+{ -+ struct port *port = netdev_priv(dev); -+ -+ port->speed = 0; /* force "link up" message */ -+ phy_start(port->phydev); -+} -+ -+static void ixp4xx_phy_stop(struct net_device *dev) -+{ -+ struct port *port = netdev_priv(dev); -+ -+ phy_stop(port->phydev); -+} - - static inline void debug_pkt(struct net_device *dev, const char *func, - u8 *data, int len) -@@ -1259,8 +1304,7 @@ static int eth_open(struct net_device *d - return err; - } - -- port->speed = 0; /* force "link up" message */ -- phy_start(port->phydev); -+ ixp4xx_phy_start(dev); - - for (i = 0; i < ETH_ALEN; i++) - __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]); -@@ -1381,7 +1425,7 @@ static int eth_close(struct net_device * - printk(KERN_CRIT "%s: unable to disable loopback\n", - dev->name); - -- phy_stop(port->phydev); -+ ixp4xx_phy_stop(dev); - - if (!ports_open) - qmgr_disable_irq(TXDONE_QUEUE); -@@ -1407,7 +1451,6 @@ static int eth_init_one(struct platform_ - struct net_device *dev; - struct eth_plat_info *plat = dev_get_platdata(&pdev->dev); - u32 regs_phys; -- char phy_id[MII_BUS_ID_SIZE + 3]; - int err; - - if (!(dev = alloc_etherdev(sizeof(struct port)))) -@@ -1465,20 +1508,9 @@ static int eth_init_one(struct platform_ - __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control); - udelay(50); - -- snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, -- mdio_bus->id, plat->phy); -- port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, -- PHY_INTERFACE_MODE_MII); -- if (IS_ERR(port->phydev)) { -- err = PTR_ERR(port->phydev); -+ err = ixp4xx_phy_connect(dev); -+ if (err) - goto err_free_mem; -- } -- -- /* mask with MAC supported features */ -- port->phydev->supported &= PHY_BASIC_FEATURES; -- port->phydev->advertising = port->phydev->supported; -- -- port->phydev->irq = PHY_POLL; - - if ((err = register_netdev(dev))) - goto err_phy_dis; -@@ -1489,7 +1521,7 @@ static int eth_init_one(struct platform_ - return 0; - - err_phy_dis: -- phy_disconnect(port->phydev); -+ ixp4xx_phy_disconnect(dev); - err_free_mem: - npe_port_tab[NPE_ID(port->id)] = NULL; - release_resource(port->mem_res); -@@ -1506,7 +1538,7 @@ static int eth_remove_one(struct platfor - struct port *port = netdev_priv(dev); - - unregister_netdev(dev); -- phy_disconnect(port->phydev); -+ ixp4xx_phy_disconnect(dev); - npe_port_tab[NPE_ID(port->id)] = NULL; - npe_release(port->npe); - release_resource(port->mem_res); diff --git a/target/linux/ixp4xx/patches-4.4/206-npe_driver_add_update_link_function.patch b/target/linux/ixp4xx/patches-4.4/206-npe_driver_add_update_link_function.patch deleted file mode 100644 index f1a77078c..000000000 --- a/target/linux/ixp4xx/patches-4.4/206-npe_driver_add_update_link_function.patch +++ /dev/null @@ -1,98 +0,0 @@ ---- a/drivers/net/ethernet/xscale/ixp4xx_eth.c -+++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c -@@ -177,7 +177,7 @@ struct port { - struct desc *desc_tab; /* coherent */ - u32 desc_tab_phys; - int id; /* logical port ID */ -- int speed, duplex; -+ int link, speed, duplex; - u8 firmware[4]; - int hwts_tx_en; - int hwts_rx_en; -@@ -558,37 +558,52 @@ static void ixp4xx_mdio_remove(void) - mdiobus_free(mdio_bus); - } - -- --static void ixp4xx_adjust_link(struct net_device *dev) -+static void ixp4xx_update_link(struct net_device *dev) - { - struct port *port = netdev_priv(dev); -- struct phy_device *phydev = port->phydev; - -- if (!phydev->link) { -- if (port->speed) { -- port->speed = 0; -- printk(KERN_INFO "%s: link down\n", dev->name); -- } -+ if (!port->link) { -+ netif_carrier_off(dev); -+ printk(KERN_INFO "%s: link down\n", dev->name); - return; - } - -- if (port->speed == phydev->speed && port->duplex == phydev->duplex) -- return; -- -- port->speed = phydev->speed; -- port->duplex = phydev->duplex; -- -- if (port->duplex) -+ if (port->duplex == DUPLEX_FULL) - __raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX, - &port->regs->tx_control[0]); - else - __raw_writel(DEFAULT_TX_CNTRL0 | TX_CNTRL0_HALFDUPLEX, - &port->regs->tx_control[0]); - -+ netif_carrier_on(dev); - printk(KERN_INFO "%s: link up, speed %u Mb/s, %s duplex\n", - dev->name, port->speed, port->duplex ? "full" : "half"); - } - -+static void ixp4xx_adjust_link(struct net_device *dev) -+{ -+ struct port *port = netdev_priv(dev); -+ struct phy_device *phydev = port->phydev; -+ int status_change = 0; -+ -+ if (phydev->link) { -+ if (port->duplex != phydev->duplex -+ || port->speed != phydev->speed) { -+ status_change = 1; -+ } -+ } -+ -+ if (phydev->link != port->link) -+ status_change = 1; -+ -+ port->link = phydev->link; -+ port->speed = phydev->speed; -+ port->duplex = phydev->duplex; -+ -+ if (status_change) -+ ixp4xx_update_link(dev); -+} -+ - static int ixp4xx_phy_connect(struct net_device *dev) - { - struct port *port = netdev_priv(dev); -@@ -624,7 +639,6 @@ static void ixp4xx_phy_start(struct net_ - { - struct port *port = netdev_priv(dev); - -- port->speed = 0; /* force "link up" message */ - phy_start(port->phydev); - } - -@@ -1515,6 +1529,10 @@ static int eth_init_one(struct platform_ - if ((err = register_netdev(dev))) - goto err_phy_dis; - -+ port->link = 0; -+ port->speed = 0; -+ port->duplex = -1; -+ - printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy, - npe_name(port->npe)); - diff --git a/target/linux/ixp4xx/patches-4.4/207-npe_driver_multiphy_support.patch b/target/linux/ixp4xx/patches-4.4/207-npe_driver_multiphy_support.patch deleted file mode 100644 index 33c3327ee..000000000 --- a/target/linux/ixp4xx/patches-4.4/207-npe_driver_multiphy_support.patch +++ /dev/null @@ -1,167 +0,0 @@ -TODO: take care of additional PHYs through the PHY abstraction layer - ---- a/arch/arm/mach-ixp4xx/include/mach/platform.h -+++ b/arch/arm/mach-ixp4xx/include/mach/platform.h -@@ -95,12 +95,23 @@ struct ixp4xx_pata_data { - #define IXP4XX_ETH_NPEB 0x10 - #define IXP4XX_ETH_NPEC 0x20 - -+#define IXP4XX_ETH_PHY_MAX_ADDR 32 -+ - /* Information about built-in Ethernet MAC interfaces */ - struct eth_plat_info { - u8 phy; /* MII PHY ID, 0 - 31 */ - u8 rxq; /* configurable, currently 0 - 31 only */ - u8 txreadyq; - u8 hwaddr[6]; -+ -+ u32 phy_mask; -+#if 0 -+ int speed; -+ int duplex; -+#else -+ int speed_10; -+ int half_duplex; -+#endif - }; - - /* Information about built-in HSS (synchronous serial) interfaces */ ---- a/drivers/net/ethernet/xscale/ixp4xx_eth.c -+++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c -@@ -610,6 +610,37 @@ static int ixp4xx_phy_connect(struct net - struct eth_plat_info *plat = port->plat; - char phy_id[MII_BUS_ID_SIZE + 3]; - -+ if (plat->phy == IXP4XX_ETH_PHY_MAX_ADDR) { -+#if 0 -+ switch (plat->speed) { -+ case SPEED_10: -+ case SPEED_100: -+ break; -+ default: -+ printk(KERN_ERR "%s: invalid speed (%d)\n", -+ dev->name, plat->speed); -+ return -EINVAL; -+ } -+ -+ switch (plat->duplex) { -+ case DUPLEX_HALF: -+ case DUPLEX_FULL: -+ break; -+ default: -+ printk(KERN_ERR "%s: invalid duplex mode (%d)\n", -+ dev->name, plat->duplex); -+ return -EINVAL; -+ } -+ port->speed = plat->speed; -+ port->duplex = plat->duplex; -+#else -+ port->speed = plat->speed_10 ? SPEED_10 : SPEED_100; -+ port->duplex = plat->half_duplex ? DUPLEX_HALF : DUPLEX_FULL; -+#endif -+ -+ return 0; -+ } -+ - snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, - mdio_bus->id, plat->phy); - port->phydev = phy_connect(dev, phy_id, &ixp4xx_adjust_link, -@@ -625,6 +656,10 @@ static int ixp4xx_phy_connect(struct net - - port->phydev->irq = PHY_POLL; - -+ port->link = 0; -+ port->speed = 0; -+ port->duplex = -1; -+ - return 0; - } - -@@ -632,21 +667,32 @@ static void ixp4xx_phy_disconnect(struct - { - struct port *port = netdev_priv(dev); - -- phy_disconnect(port->phydev); -+ if (port->phydev) -+ phy_disconnect(port->phydev); - } - - static void ixp4xx_phy_start(struct net_device *dev) - { - struct port *port = netdev_priv(dev); - -- phy_start(port->phydev); -+ if (port->phydev) { -+ phy_start(port->phydev); -+ } else { -+ port->link = 1; -+ ixp4xx_update_link(dev); -+ } - } - - static void ixp4xx_phy_stop(struct net_device *dev) - { - struct port *port = netdev_priv(dev); - -- phy_stop(port->phydev); -+ if (port->phydev) { -+ phy_stop(port->phydev); -+ } else { -+ port->link = 0; -+ ixp4xx_update_link(dev); -+ } - } - - static inline void debug_pkt(struct net_device *dev, const char *func, -@@ -1048,6 +1094,9 @@ static int eth_ioctl(struct net_device * - return hwtstamp_get(dev, req); - } - -+ if (!port->phydev) -+ return -EOPNOTSUPP; -+ - return phy_mii_ioctl(port->phydev, req, cmd); - } - -@@ -1068,18 +1117,30 @@ static void ixp4xx_get_drvinfo(struct ne - static int ixp4xx_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) - { - struct port *port = netdev_priv(dev); -+ -+ if (!port->phydev) -+ return -EOPNOTSUPP; -+ - return phy_ethtool_gset(port->phydev, cmd); - } - - static int ixp4xx_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) - { - struct port *port = netdev_priv(dev); -+ -+ if (!port->phydev) -+ return -EOPNOTSUPP; -+ - return phy_ethtool_sset(port->phydev, cmd); - } - - static int ixp4xx_nway_reset(struct net_device *dev) - { - struct port *port = netdev_priv(dev); -+ -+ if (!port->phydev) -+ return -EOPNOTSUPP; -+ - return phy_start_aneg(port->phydev); - } - -@@ -1529,10 +1590,6 @@ static int eth_init_one(struct platform_ - if ((err = register_netdev(dev))) - goto err_phy_dis; - -- port->link = 0; -- port->speed = 0; -- port->duplex = -1; -- - printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy, - npe_name(port->npe)); - diff --git a/target/linux/ixp4xx/patches-4.4/295-latch_led_driver.patch b/target/linux/ixp4xx/patches-4.4/295-latch_led_driver.patch deleted file mode 100644 index 2b475161c..000000000 --- a/target/linux/ixp4xx/patches-4.4/295-latch_led_driver.patch +++ /dev/null @@ -1,201 +0,0 @@ ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -296,6 +296,12 @@ config LEDS_LP8860 - on the LP8860 4 channel LED driver using the I2C communication - bus. - -+config LEDS_LATCH -+ tristate "LED Support for Memory Latched LEDs" -+ depends on LEDS_CLASS -+ help -+ -- To Do -- -+ - config LEDS_CLEVO_MAIL - tristate "Mail LED on Clevo notebook" - depends on LEDS_CLASS ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -25,6 +25,7 @@ obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunf - obj-$(CONFIG_LEDS_PCA9532) += leds-pca9532.o - obj-$(CONFIG_LEDS_GPIO_REGISTER) += leds-gpio-register.o - obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o -+obj-$(CONFIG_LEDS_LATCH) += leds-latch.o - obj-$(CONFIG_LEDS_LP3944) += leds-lp3944.o - obj-$(CONFIG_LEDS_LP55XX_COMMON) += leds-lp55xx-common.o - obj-$(CONFIG_LEDS_LP5521) += leds-lp5521.o ---- /dev/null -+++ b/drivers/leds/leds-latch.c -@@ -0,0 +1,152 @@ -+/* -+ * LEDs driver for Memory Latched Devices -+ * -+ * Copyright (C) 2008 Gateworks Corp. -+ * Chris Lang -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static unsigned int mem_keep = 0xFF; -+static spinlock_t mem_lock; -+static unsigned char *iobase; -+ -+struct latch_led_data { -+ struct led_classdev cdev; -+ struct work_struct work; -+ u8 new_level; -+ u8 bit; -+ void (*set_led)(u8 bit, enum led_brightness value); -+}; -+ -+static void latch_set_led(u8 bit, enum led_brightness value) -+{ -+ if (value == LED_OFF) -+ mem_keep |= (0x1 << bit); -+ else -+ mem_keep &= ~(0x1 << bit); -+ -+ writeb(mem_keep, iobase); -+} -+ -+static void latch_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ struct latch_led_data *led_dat = -+ container_of(led_cdev, struct latch_led_data, cdev); -+ -+ raw_spin_lock(mem_lock); -+ -+ led_dat->set_led(led_dat->bit, value); -+ -+ raw_spin_unlock(mem_lock); -+} -+ -+static int latch_led_probe(struct platform_device *pdev) -+{ -+ struct latch_led_platform_data *pdata = pdev->dev.platform_data; -+ struct latch_led *cur_led; -+ struct latch_led_data *leds_data, *led_dat; -+ int i, ret = 0; -+ -+ if (!pdata) -+ return -EBUSY; -+ -+ leds_data = kzalloc(sizeof(struct latch_led_data) * pdata->num_leds, -+ GFP_KERNEL); -+ if (!leds_data) -+ return -ENOMEM; -+ -+ for (i = 0; i < pdata->num_leds; i++) { -+ cur_led = &pdata->leds[i]; -+ led_dat = &leds_data[i]; -+ -+ led_dat->cdev.name = cur_led->name; -+ led_dat->cdev.default_trigger = cur_led->default_trigger; -+ led_dat->cdev.brightness_set = latch_led_set; -+ led_dat->cdev.brightness = LED_OFF; -+ led_dat->bit = cur_led->bit; -+ led_dat->set_led = pdata->set_led ? pdata->set_led : latch_set_led; -+ -+ ret = led_classdev_register(&pdev->dev, &led_dat->cdev); -+ if (ret < 0) { -+ goto err; -+ } -+ } -+ -+ if (!pdata->set_led) { -+ iobase = ioremap_nocache(pdata->mem, 0x1000); -+ writeb(0xFF, iobase); -+ } -+ platform_set_drvdata(pdev, leds_data); -+ -+ return 0; -+ -+err: -+ if (i > 0) { -+ for (i = i - 1; i >= 0; i--) { -+ led_classdev_unregister(&leds_data[i].cdev); -+ } -+ } -+ -+ kfree(leds_data); -+ -+ return ret; -+} -+ -+static int latch_led_remove(struct platform_device *pdev) -+{ -+ int i; -+ struct latch_led_platform_data *pdata = pdev->dev.platform_data; -+ struct latch_led_data *leds_data; -+ -+ leds_data = platform_get_drvdata(pdev); -+ -+ for (i = 0; i < pdata->num_leds; i++) { -+ led_classdev_unregister(&leds_data[i].cdev); -+ cancel_work_sync(&leds_data[i].work); -+ } -+ -+ kfree(leds_data); -+ -+ return 0; -+} -+ -+static struct platform_driver latch_led_driver = { -+ .probe = latch_led_probe, -+ .remove = latch_led_remove, -+ .driver = { -+ .name = "leds-latch", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init latch_led_init(void) -+{ -+ return platform_driver_register(&latch_led_driver); -+} -+ -+static void __exit latch_led_exit(void) -+{ -+ platform_driver_unregister(&latch_led_driver); -+} -+ -+module_init(latch_led_init); -+module_exit(latch_led_exit); -+ -+MODULE_AUTHOR("Chris Lang "); -+MODULE_DESCRIPTION("Latch LED driver"); ---- a/include/linux/leds.h -+++ b/include/linux/leds.h -@@ -385,4 +385,18 @@ static inline void ledtrig_cpu(enum cpu_ - } - #endif - -+/* For the leds-latch driver */ -+struct latch_led { -+ const char *name; -+ char *default_trigger; -+ unsigned bit; -+}; -+ -+struct latch_led_platform_data { -+ int num_leds; -+ u32 mem; -+ struct latch_led *leds; -+ void (*set_led)(u8 bit, enum led_brightness value); -+}; -+ - #endif /* __LINUX_LEDS_H_INCLUDED */ diff --git a/target/linux/ixp4xx/patches-4.4/300-avila_support.patch b/target/linux/ixp4xx/patches-4.4/300-avila_support.patch deleted file mode 100644 index d2dafaa5c..000000000 --- a/target/linux/ixp4xx/patches-4.4/300-avila_support.patch +++ /dev/null @@ -1,726 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/avila-pci.c -+++ b/arch/arm/mach-ixp4xx/avila-pci.c -@@ -27,8 +27,8 @@ - #include - #include - --#define AVILA_MAX_DEV 4 --#define LOFT_MAX_DEV 6 -+#define AVILA_MAX_DEV 6 -+ - #define IRQ_LINES 4 - - /* PCI controller GPIO to IRQ pin mappings */ -@@ -55,10 +55,8 @@ static int __init avila_map_irq(const st - IXP4XX_GPIO_IRQ(INTD) - }; - -- if (slot >= 1 && -- slot <= (machine_is_loft() ? LOFT_MAX_DEV : AVILA_MAX_DEV) && -- pin >= 1 && pin <= IRQ_LINES) -- return pci_irq_table[(slot + pin - 2) % 4]; -+ if (slot >= 1 && slot <= AVILA_MAX_DEV && pin >= 1 && pin <= IRQ_LINES) -+ return pci_irq_table[(slot + pin - 2) % IRQ_LINES]; - - return -1; - } ---- a/arch/arm/mach-ixp4xx/avila-setup.c -+++ b/arch/arm/mach-ixp4xx/avila-setup.c -@@ -14,9 +14,16 @@ - #include - #include - #include -+#include -+#include -+#include - #include - #include - #include -+#include -+#include -+#include -+#include - #include - #include - #include -@@ -26,10 +33,25 @@ - #include - #include - #include -+#include - - #define AVILA_SDA_PIN 7 - #define AVILA_SCL_PIN 6 - -+/* User LEDs */ -+#define AVILA_GW23XX_LED_USER_GPIO 3 -+#define AVILA_GW23X7_LED_USER_GPIO 4 -+ -+/* gpio mask used by platform device */ -+#define AVILA_GPIO_MASK (1 << 1) | (1 << 3) | (1 << 5) | (1 << 7) | (1 << 9) -+ -+struct avila_board_info { -+ unsigned char *model; -+ void (*setup)(void); -+}; -+ -+static struct avila_board_info *avila_info __initdata; -+ - static struct flash_platform_data avila_flash_data = { - .map_name = "cfi_probe", - .width = 2, -@@ -105,14 +127,69 @@ static struct platform_device avila_uart - .resource = avila_uart_resources - }; - --static struct resource avila_pata_resources[] = { -+static struct resource avila_optional_uart_resources[] = { - { -- .flags = IORESOURCE_MEM -- }, -+ .start = 0x54000000, -+ .end = 0x54000fff, -+ .flags = IORESOURCE_MEM -+ },{ -+ .start = 0x55000000, -+ .end = 0x55000fff, -+ .flags = IORESOURCE_MEM -+ },{ -+ .start = 0x56000000, -+ .end = 0x56000fff, -+ .flags = IORESOURCE_MEM -+ },{ -+ .start = 0x57000000, -+ .end = 0x57000fff, -+ .flags = IORESOURCE_MEM -+ } -+}; -+ -+static struct plat_serial8250_port avila_optional_uart_data[] = { - { -- .flags = IORESOURCE_MEM, -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ .rw_delay = 2, -+ },{ -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ .rw_delay = 2, -+ },{ -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ .rw_delay = 2, -+ },{ -+ .flags = UPF_BOOT_AUTOCONF, -+ .iotype = UPIO_MEM, -+ .regshift = 0, -+ .uartclk = 18432000, -+ .rw_delay = 2, - }, -+ { } -+}; -+ -+static struct platform_device avila_optional_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM1, -+ .dev.platform_data = avila_optional_uart_data, -+ .num_resources = 4, -+ .resource = avila_optional_uart_resources, -+}; -+ -+static struct resource avila_pata_resources[] = { - { -+ .flags = IORESOURCE_MEM -+ },{ -+ .flags = IORESOURCE_MEM, -+ },{ - .name = "intrq", - .start = IRQ_IXP4XX_GPIO12, - .end = IRQ_IXP4XX_GPIO12, -@@ -133,21 +210,237 @@ static struct platform_device avila_pata - .resource = avila_pata_resources, - }; - -+/* Built-in 10/100 Ethernet MAC interfaces */ -+static struct eth_plat_info avila_npeb_data = { -+ .phy = 0, -+ .rxq = 3, -+ .txreadyq = 20, -+}; -+ -+static struct eth_plat_info avila_npec_data = { -+ .phy = 1, -+ .rxq = 4, -+ .txreadyq = 21, -+}; -+ -+static struct platform_device avila_npeb_device = { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = &avila_npeb_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+}; -+ -+static struct platform_device avila_npec_device = { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = &avila_npec_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+}; -+ -+static struct gpio_led avila_gpio_leds[] = { -+ { -+ .name = "user", /* green led */ -+ .gpio = AVILA_GW23XX_LED_USER_GPIO, -+ .active_low = 1, -+ }, -+ { -+ .name = "radio1", /* green led */ -+ .gpio = 104, -+ .active_low = 1, -+ }, -+ { -+ .name = "radio2", /* green led */ -+ .gpio = 105, -+ .active_low = 1, -+ }, -+ { -+ .name = "radio3", /* green led */ -+ .gpio = 106, -+ .active_low = 1, -+ }, -+ { -+ .name = "radio4", /* green led */ -+ .gpio = 107, -+ .active_low = 1, -+ }, -+ -+}; -+ -+static struct gpio_led_platform_data avila_gpio_leds_data = { -+ .num_leds = 1, -+ .leds = avila_gpio_leds, -+}; -+ -+static struct platform_device avila_gpio_leds_device = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev.platform_data = &avila_gpio_leds_data, -+}; -+ -+static struct latch_led avila_latch_leds[] = { -+ { -+ .name = "led0", /* green led */ -+ .bit = 0, -+ }, -+ { -+ .name = "led1", /* green led */ -+ .bit = 1, -+ }, -+ { -+ .name = "led2", /* green led */ -+ .bit = 2, -+ }, -+ { -+ .name = "led3", /* green led */ -+ .bit = 3, -+ }, -+ { -+ .name = "led4", /* green led */ -+ .bit = 4, -+ }, -+ { -+ .name = "led5", /* green led */ -+ .bit = 5, -+ }, -+ { -+ .name = "led6", /* green led */ -+ .bit = 6, -+ }, -+ { -+ .name = "led7", /* green led */ -+ .bit = 7, -+ } -+}; -+ -+static struct latch_led_platform_data avila_latch_leds_data = { -+ .num_leds = 8, -+ .leds = avila_latch_leds, -+ .mem = 0x51000000, -+}; -+ -+static struct platform_device avila_latch_leds_device = { -+ .name = "leds-latch", -+ .id = -1, -+ .dev.platform_data = &avila_latch_leds_data, -+}; -+ - static struct platform_device *avila_devices[] __initdata = { - &avila_i2c_gpio, -- &avila_flash, - &avila_uart - }; - --static void __init avila_init(void) -+/* -+ * Audio Devices -+ */ -+ -+static struct platform_device avila_hss_device[] = { -+ { -+ .name = "gw_avila_hss", -+ .id = 0, -+ },{ -+ .name = "gw_avila_hss", -+ .id = 1, -+ },{ -+ .name = "gw_avila_hss", -+ .id = 2, -+ },{ -+ .name = "gw_avila_hss", -+ .id = 3, -+ }, -+}; -+ -+static struct platform_device avila_pcm_device[] = { -+ { -+ .name = "gw_avila-audio", -+ .id = 0, -+ },{ -+ .name = "gw_avila-audio", -+ .id = 1, -+ },{ -+ .name = "gw_avila-audio", -+ .id = 2, -+ },{ -+ .name = "gw_avila-audio", -+ .id = 3, -+ } -+}; -+ -+static void setup_audio_devices(void) { -+ platform_device_register(&avila_hss_device[0]); -+ platform_device_register(&avila_hss_device[1]); -+ platform_device_register(&avila_hss_device[2]); -+ platform_device_register(&avila_hss_device[3]); -+ -+ platform_device_register(&avila_pcm_device[0]); -+ platform_device_register(&avila_pcm_device[1]); -+ platform_device_register(&avila_pcm_device[2]); -+ platform_device_register(&avila_pcm_device[3]); -+} -+ -+static void __init avila_gw23xx_setup(void) - { -- ixp4xx_sys_init(); -+ platform_device_register(&avila_npeb_device); -+ platform_device_register(&avila_npec_device); - -- avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -- avila_flash_resource.end = -- IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; -+ platform_device_register(&avila_gpio_leds_device); -+} - -- platform_add_devices(avila_devices, ARRAY_SIZE(avila_devices)); -+static void __init avila_gw2342_setup(void) -+{ -+ platform_device_register(&avila_npeb_device); -+ platform_device_register(&avila_npec_device); -+ -+ platform_device_register(&avila_gpio_leds_device); -+ -+ avila_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(1); -+ avila_pata_resources[0].end = IXP4XX_EXP_BUS_END(1); -+ -+ avila_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(2); -+ avila_pata_resources[1].end = IXP4XX_EXP_BUS_END(2); -+ -+ avila_pata_data.cs0_cfg = IXP4XX_EXP_CS1; -+ avila_pata_data.cs1_cfg = IXP4XX_EXP_CS2; -+ -+ platform_device_register(&avila_pata); -+} -+ -+static void __init avila_gw2345_setup(void) -+{ -+ avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR; -+ avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */ -+ platform_device_register(&avila_npeb_device); -+ -+ avila_npec_data.phy = 5; /* port 5 of the KS8995 switch */ -+ platform_device_register(&avila_npec_device); -+ -+ platform_device_register(&avila_gpio_leds_device); -+ -+ avila_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(1); -+ avila_pata_resources[0].end = IXP4XX_EXP_BUS_END(1); -+ -+ avila_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(2); -+ avila_pata_resources[1].end = IXP4XX_EXP_BUS_END(2); -+ -+ avila_pata_data.cs0_cfg = IXP4XX_EXP_CS1; -+ avila_pata_data.cs1_cfg = IXP4XX_EXP_CS2; -+ -+ platform_device_register(&avila_pata); -+} -+ -+static void __init avila_gw2347_setup(void) -+{ -+ platform_device_register(&avila_npeb_device); -+ -+ avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO; -+ platform_device_register(&avila_gpio_leds_device); -+} -+ -+static void __init avila_gw2348_setup(void) -+{ -+ platform_device_register(&avila_npeb_device); -+ platform_device_register(&avila_npec_device); -+ -+ platform_device_register(&avila_gpio_leds_device); - - avila_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(1); - avila_pata_resources[0].end = IXP4XX_EXP_BUS_END(1); -@@ -159,8 +452,335 @@ static void __init avila_init(void) - avila_pata_data.cs1_cfg = IXP4XX_EXP_CS2; - - platform_device_register(&avila_pata); -+} -+ -+static void __init avila_gw2353_setup(void) -+{ -+ platform_device_register(&avila_npeb_device); -+ platform_device_register(&avila_gpio_leds_device); -+} -+ -+static void __init avila_gw2355_setup(void) -+{ -+ avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR; -+ avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */ -+ platform_device_register(&avila_npeb_device); -+ -+ avila_npec_data.phy = 16; -+ platform_device_register(&avila_npec_device); -+ -+ avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO; -+ platform_device_register(&avila_gpio_leds_device); -+ -+ *IXP4XX_EXP_CS4 |= 0xbfff3c03; -+ avila_latch_leds[0].name = "RXD"; -+ avila_latch_leds[1].name = "TXD"; -+ avila_latch_leds[2].name = "POL"; -+ avila_latch_leds[3].name = "LNK"; -+ avila_latch_leds[4].name = "ERR"; -+ avila_latch_leds_data.num_leds = 5; -+ avila_latch_leds_data.mem = 0x54000000; -+ platform_device_register(&avila_latch_leds_device); -+ -+ avila_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(1); -+ avila_pata_resources[0].end = IXP4XX_EXP_BUS_END(1); -+ -+ avila_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(2); -+ avila_pata_resources[1].end = IXP4XX_EXP_BUS_END(2); -+ -+ avila_pata_data.cs0_cfg = IXP4XX_EXP_CS1; -+ avila_pata_data.cs1_cfg = IXP4XX_EXP_CS2; -+ -+ platform_device_register(&avila_pata); -+} -+ -+static void __init avila_gw2357_setup(void) -+{ -+ platform_device_register(&avila_npeb_device); -+ -+ avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO; -+ platform_device_register(&avila_gpio_leds_device); -+ -+ *IXP4XX_EXP_CS1 |= 0xbfff3c03; -+ platform_device_register(&avila_latch_leds_device); -+} -+ -+static void __init avila_gw2365_setup(void) -+{ -+ avila_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ *IXP4XX_EXP_CS4 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO0, IRQ_TYPE_EDGE_RISING); -+ avila_optional_uart_data[0].mapbase = 0x54000000; -+ avila_optional_uart_data[0].membase = (void __iomem *)ioremap(0x54000000, 0x0fff); -+ avila_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO0; -+ -+ *IXP4XX_EXP_CS5 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_EDGE_RISING); -+ avila_optional_uart_data[1].mapbase = 0x55000000; -+ avila_optional_uart_data[1].membase = (void __iomem *)ioremap(0x55000000, 0x0fff); -+ avila_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO1; -+ -+ *IXP4XX_EXP_CS6 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO2, IRQ_TYPE_EDGE_RISING); -+ avila_optional_uart_data[2].mapbase = 0x56000000; -+ avila_optional_uart_data[2].membase = (void __iomem *)ioremap(0x56000000, 0x0fff); -+ avila_optional_uart_data[2].irq = IRQ_IXP4XX_GPIO2; -+ -+ *IXP4XX_EXP_CS7 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING); -+ avila_optional_uart_data[3].mapbase = 0x57000000; -+ avila_optional_uart_data[3].membase = (void __iomem *)ioremap(0x57000000, 0x0fff); -+ avila_optional_uart_data[3].irq = IRQ_IXP4XX_GPIO3; -+ -+ platform_device_register(&avila_optional_uart); -+ -+ avila_npeb_data.phy = 1; -+ platform_device_register(&avila_npeb_device); -+ -+ avila_npec_data.phy = 2; -+ platform_device_register(&avila_npec_device); -+ -+ avila_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(2); -+ avila_pata_resources[0].end = IXP4XX_EXP_BUS_END(2); -+ -+ avila_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(3); -+ avila_pata_resources[1].end = IXP4XX_EXP_BUS_END(3); -+ -+ avila_pata_data.cs0_cfg = IXP4XX_EXP_CS2; -+ avila_pata_data.cs1_cfg = IXP4XX_EXP_CS3; -+ -+ platform_device_register(&avila_pata); -+ -+ avila_gpio_leds[0].gpio = 109; -+ avila_gpio_leds_data.num_leds = 5; -+ platform_device_register(&avila_gpio_leds_device); -+ -+ setup_audio_devices(); -+} -+ -+static void __init avila_gw2369_setup(void) -+{ -+ avila_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ avila_npeb_data.phy = 1; -+ platform_device_register(&avila_npeb_device); -+ -+ avila_npec_data.phy = 2; -+ platform_device_register(&avila_npec_device); -+ -+ setup_audio_devices(); -+} -+ -+static void __init avila_gw2370_setup(void) -+{ -+ avila_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ avila_npeb_data.phy = 5; -+ platform_device_register(&avila_npeb_device); -+ -+ avila_npec_data.phy = IXP4XX_ETH_PHY_MAX_ADDR; -+ avila_npec_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */ -+ platform_device_register(&avila_npec_device); -+ -+ *IXP4XX_EXP_CS2 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO2, IRQ_TYPE_EDGE_RISING); -+ avila_optional_uart_data[0].mapbase = 0x52000000; -+ avila_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52000000, 0x0fff); -+ avila_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO2; -+ -+ *IXP4XX_EXP_CS3 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO3, IRQ_TYPE_EDGE_RISING); -+ avila_optional_uart_data[1].mapbase = 0x53000000; -+ avila_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53000000, 0x0fff); -+ avila_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO3; -+ -+ avila_optional_uart.num_resources = 2; -+ -+ platform_device_register(&avila_optional_uart); -+ -+ avila_gpio_leds[0].gpio = 101; -+ platform_device_register(&avila_gpio_leds_device); -+ -+ setup_audio_devices(); -+} -+ -+static void __init avila_gw2375_setup(void) -+{ -+ avila_npeb_data.phy = 1; -+ platform_device_register(&avila_npeb_device); -+ -+ avila_npec_data.phy = 2; -+ platform_device_register(&avila_npec_device); -+ -+ *IXP4XX_EXP_CS2 = 0xBFFF3C43; -+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_EDGE_RISING); -+ avila_optional_uart_data[0].mapbase = 0x52000000; -+ avila_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52000000, 0x0fff); -+ avila_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO10; -+ -+ avila_optional_uart.num_resources = 1; -+ -+ platform_device_register(&avila_optional_uart); -+ -+ setup_audio_devices(); -+} -+ -+ -+static struct avila_board_info avila_boards[] __initdata = { -+ { -+ .model = "GW2342", -+ .setup = avila_gw2342_setup, -+ }, { -+ .model = "GW2345", -+ .setup = avila_gw2345_setup, -+ }, { -+ .model = "GW2347", -+ .setup = avila_gw2347_setup, -+ }, { -+ .model = "GW2348", -+ .setup = avila_gw2348_setup, -+ }, { -+ .model = "GW2353", -+ .setup = avila_gw2353_setup, -+ }, { -+ .model = "GW2355", -+ .setup = avila_gw2355_setup, -+ }, { -+ .model = "GW2357", -+ .setup = avila_gw2357_setup, -+ }, { -+ .model = "GW2365", -+ .setup = avila_gw2365_setup, -+ }, { -+ .model = "GW2369", -+ .setup = avila_gw2369_setup, -+ }, { -+ .model = "GW2370", -+ .setup = avila_gw2370_setup, -+ }, { -+ .model = "GW2373", -+ .setup = avila_gw2369_setup, -+ }, { -+ .model = "GW2375", -+ .setup = avila_gw2375_setup, -+ } -+}; -+ -+static struct avila_board_info * __init avila_find_board_info(char *model) -+{ -+ int i; -+ model[6] = '\0'; -+ -+ for (i = 0; i < ARRAY_SIZE(avila_boards); i++) { -+ struct avila_board_info *info = &avila_boards[i]; -+ if (strcmp(info->model, model) == 0) -+ return info; -+ } -+ -+ return NULL; -+} -+ -+static struct memory_accessor *at24_mem_acc; -+ -+static void at24_setup(struct memory_accessor *mem_acc, void *context) -+{ -+ char mac_addr[ETH_ALEN]; -+ char model[7]; -+ -+ at24_mem_acc = mem_acc; -+ -+ /* Read MAC addresses */ -+ if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x0, 6) == 6) { -+ memcpy(&avila_npeb_data.hwaddr, mac_addr, ETH_ALEN); -+ } -+ if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x6, 6) == 6) { -+ memcpy(&avila_npec_data.hwaddr, mac_addr, ETH_ALEN); -+ } -+ -+ /* Read the first 6 bytes of the model number */ -+ if (at24_mem_acc->read(at24_mem_acc, model, 0x20, 6) == 6) { -+ avila_info = avila_find_board_info(model); -+ } -+ -+} -+ -+static struct at24_platform_data avila_eeprom_info = { -+ .byte_len = 1024, -+ .page_size = 16, -+// .flags = AT24_FLAG_READONLY, -+ .setup = at24_setup, -+}; -+ -+static struct pca953x_platform_data avila_pca_data = { -+ .gpio_base = 100, -+}; -+ -+static struct i2c_board_info __initdata avila_i2c_board_info[] = { -+ { -+ I2C_BOARD_INFO("ds1672", 0x68), -+ }, -+ { -+ I2C_BOARD_INFO("gsp", 0x29), -+ }, -+ { -+ I2C_BOARD_INFO("pca9555", 0x23), -+ .platform_data = &avila_pca_data, -+ }, -+ { -+ I2C_BOARD_INFO("ad7418", 0x28), -+ }, -+ { -+ I2C_BOARD_INFO("24c08", 0x51), -+ .platform_data = &avila_eeprom_info -+ }, -+ { -+ I2C_BOARD_INFO("tlv320aic33", 0x1b), -+ }, -+ { -+ I2C_BOARD_INFO("tlv320aic33", 0x1a), -+ }, -+ { -+ I2C_BOARD_INFO("tlv320aic33", 0x19), -+ }, -+ { -+ I2C_BOARD_INFO("tlv320aic33", 0x18), -+ }, -+}; -+ -+static void __init avila_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ platform_add_devices(avila_devices, ARRAY_SIZE(avila_devices)); -+ -+ i2c_register_board_info(0, avila_i2c_board_info, -+ ARRAY_SIZE(avila_i2c_board_info)); -+} -+ -+static int __init avila_model_setup(void) -+{ -+ if (!machine_is_avila()) -+ return 0; -+ -+ /* default 16MB flash */ -+ avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ avila_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_16M - 1; -+ -+ if (avila_info) { -+ printk(KERN_DEBUG "Running on Gateworks Avila %s\n", -+ avila_info->model); -+ avila_info->setup(); -+ } else { -+ printk(KERN_INFO "Unknown/missing Avila model number" -+ " -- defaults will be used\n"); -+ avila_gw23xx_setup(); -+ } -+ platform_device_register(&avila_flash); - -+ return 0; - } -+late_initcall(avila_model_setup); - - MACHINE_START(AVILA, "Gateworks Avila Network Platform") - /* Maintainer: Deepak Saxena */ diff --git a/target/linux/ixp4xx/patches-4.4/310-gtwx5717_spi_bus.patch b/target/linux/ixp4xx/patches-4.4/310-gtwx5717_spi_bus.patch deleted file mode 100644 index 080b96ac8..000000000 --- a/target/linux/ixp4xx/patches-4.4/310-gtwx5717_spi_bus.patch +++ /dev/null @@ -1,52 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c -+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -146,9 +147,41 @@ static struct platform_device gtwx5715_f - .resource = >wx5715_flash_resource, - }; - -+static int gtwx5715_spi_boardinfo_setup(struct spi_board_info *bi, -+ struct spi_master *master, void *data) -+{ -+ -+ strlcpy(bi->modalias, "spi-ks8995", sizeof(bi->modalias)); -+ -+ bi->max_speed_hz = 5000000 /* Hz */; -+ bi->bus_num = master->bus_num; -+ bi->mode = SPI_MODE_0; -+ -+ return 0; -+} -+ -+static struct spi_gpio_platform_data gtwx5715_spi_bus_data = { -+ .pin_cs = GTWX5715_KSSPI_SELECT, -+ .pin_clk = GTWX5715_KSSPI_CLOCK, -+ .pin_miso = GTWX5715_KSSPI_RXD, -+ .pin_mosi = GTWX5715_KSSPI_TXD, -+ .cs_activelow = 1, -+ .no_spi_delay = 1, -+ .boardinfo_setup = gtwx5715_spi_boardinfo_setup, -+}; -+ -+static struct platform_device gtwx5715_spi_bus = { -+ .name = "spi-gpio", -+ .id = 0, -+ .dev = { -+ .platform_data = >wx5715_spi_bus_data, -+ }, -+}; -+ - static struct platform_device *gtwx5715_devices[] __initdata = { - >wx5715_uart_device, - >wx5715_flash, -+ >wx5715_spi_bus, - }; - - static void __init gtwx5715_init(void) diff --git a/target/linux/ixp4xx/patches-4.4/311-gtwx5717_mac_plat_info.patch b/target/linux/ixp4xx/patches-4.4/311-gtwx5717_mac_plat_info.patch deleted file mode 100644 index aa7a9e05a..000000000 --- a/target/linux/ixp4xx/patches-4.4/311-gtwx5717_mac_plat_info.patch +++ /dev/null @@ -1,50 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c -+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c -@@ -28,6 +28,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -178,10 +179,39 @@ static struct platform_device gtwx5715_s - }, - }; - -+static struct eth_plat_info gtwx5715_npeb_data = { -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0x1e, /* ports 1-4 of the KS8995 switch */ -+ .rxq = 3, -+ .txreadyq = 20, -+}; -+ -+static struct eth_plat_info gtwx5715_npec_data = { -+ .phy = 5, /* port 5 of the KS8995 switch */ -+ .rxq = 4, -+ .txreadyq = 21, -+}; -+ -+static struct platform_device gtwx5715_npeb_device = { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = >wx5715_npeb_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+}; -+ -+static struct platform_device gtwx5715_npec_device = { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = >wx5715_npec_data, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+}; -+ - static struct platform_device *gtwx5715_devices[] __initdata = { - >wx5715_uart_device, - >wx5715_flash, - >wx5715_spi_bus, -+ >wx5715_npeb_device, -+ >wx5715_npec_device, - }; - - static void __init gtwx5715_init(void) diff --git a/target/linux/ixp4xx/patches-4.4/312-ixp4xx_pata_optimization.patch b/target/linux/ixp4xx/patches-4.4/312-ixp4xx_pata_optimization.patch deleted file mode 100644 index 59c2837f0..000000000 --- a/target/linux/ixp4xx/patches-4.4/312-ixp4xx_pata_optimization.patch +++ /dev/null @@ -1,137 +0,0 @@ ---- a/drivers/ata/pata_ixp4xx_cf.c -+++ b/drivers/ata/pata_ixp4xx_cf.c -@@ -24,16 +24,58 @@ - #include - - #define DRV_NAME "pata_ixp4xx_cf" --#define DRV_VERSION "0.2" -+#define DRV_VERSION "0.3" - - static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error) - { -+ struct ixp4xx_pata_data *data = link->ap->host->dev->platform_data; -+ unsigned int pio_mask; - struct ata_device *dev; - - ata_for_each_dev(dev, link, ENABLED) { -- ata_dev_info(dev, "configured for PIO0\n"); -- dev->pio_mode = XFER_PIO_0; -- dev->xfer_mode = XFER_PIO_0; -+ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)) { -+ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03; -+ if (pio_mask & (1 << 1)) { -+ pio_mask = 4; -+ } else { -+ pio_mask = 3; -+ } -+ } else { -+ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8); -+ } -+ -+ switch (pio_mask){ -+ case 0: -+ ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n"); -+ dev->pio_mode = XFER_PIO_0; -+ dev->xfer_mode = XFER_PIO_0; -+ *data->cs0_cfg = 0x8a473c03; -+ break; -+ case 1: -+ ata_dev_printk(dev, KERN_INFO, "configured for PIO1\n"); -+ dev->pio_mode = XFER_PIO_1; -+ dev->xfer_mode = XFER_PIO_1; -+ *data->cs0_cfg = 0x86433c03; -+ break; -+ case 2: -+ ata_dev_printk(dev, KERN_INFO, "configured for PIO2\n"); -+ dev->pio_mode = XFER_PIO_2; -+ dev->xfer_mode = XFER_PIO_2; -+ *data->cs0_cfg = 0x82413c03; -+ break; -+ case 3: -+ ata_dev_printk(dev, KERN_INFO, "configured for PIO3\n"); -+ dev->pio_mode = XFER_PIO_3; -+ dev->xfer_mode = XFER_PIO_3; -+ *data->cs0_cfg = 0x80823c03; -+ break; -+ case 4: -+ ata_dev_printk(dev, KERN_INFO, "configured for PIO4\n"); -+ dev->pio_mode = XFER_PIO_4; -+ dev->xfer_mode = XFER_PIO_4; -+ *data->cs0_cfg = 0x80403c03; -+ break; -+ } - dev->xfer_shift = ATA_SHIFT_PIO; - dev->flags |= ATA_DFLAG_PIO; - } -@@ -46,6 +88,7 @@ static unsigned int ixp4xx_mmio_data_xfe - unsigned int i; - unsigned int words = buflen >> 1; - u16 *buf16 = (u16 *) buf; -+ unsigned int pio_mask; - struct ata_port *ap = dev->link->ap; - void __iomem *mmio = ap->ioaddr.data_addr; - struct ixp4xx_pata_data *data = dev_get_platdata(ap->host->dev); -@@ -53,8 +96,34 @@ static unsigned int ixp4xx_mmio_data_xfe - /* set the expansion bus in 16bit mode and restore - * 8 bit mode after the transaction. - */ -- *data->cs0_cfg &= ~(0x01); -- udelay(100); -+ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){ -+ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03; -+ if (pio_mask & (1 << 1)){ -+ pio_mask = 4; -+ }else{ -+ pio_mask = 3; -+ } -+ }else{ -+ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8); -+ } -+ switch (pio_mask){ -+ case 0: -+ *data->cs0_cfg = 0xa9643c42; -+ break; -+ case 1: -+ *data->cs0_cfg = 0x85033c42; -+ break; -+ case 2: -+ *data->cs0_cfg = 0x80b23c42; -+ break; -+ case 3: -+ *data->cs0_cfg = 0x80823c42; -+ break; -+ case 4: -+ *data->cs0_cfg = 0x80403c42; -+ break; -+ } -+ udelay(5); - - /* Transfer multiple of 2 bytes */ - if (rw == READ) -@@ -79,8 +148,24 @@ static unsigned int ixp4xx_mmio_data_xfe - words++; - } - -- udelay(100); -- *data->cs0_cfg |= 0x01; -+ udelay(5); -+ switch (pio_mask){ -+ case 0: -+ *data->cs0_cfg = 0x8a473c03; -+ break; -+ case 1: -+ *data->cs0_cfg = 0x86433c03; -+ break; -+ case 2: -+ *data->cs0_cfg = 0x82413c03; -+ break; -+ case 3: -+ *data->cs0_cfg = 0x80823c03; -+ break; -+ case 4: -+ *data->cs0_cfg = 0x80403c03; -+ break; -+ } - - return words << 1; - } diff --git a/target/linux/ixp4xx/patches-4.4/500-usr8200_support.patch b/target/linux/ixp4xx/patches-4.4/500-usr8200_support.patch deleted file mode 100644 index fb7f03ee1..000000000 --- a/target/linux/ixp4xx/patches-4.4/500-usr8200_support.patch +++ /dev/null @@ -1,347 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -93,6 +93,14 @@ config MACH_SIDEWINDER - Engineering Sidewinder board. For more information on this - platform, see http://www.adiengineering.com - -+config MACH_USR8200 -+ bool "USRobotics USR8200" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support the USRobotics -+ USR8200 router board. For more information on this platform, see -+ http://openwrt.org -+ - config MACH_COMPEXWP18 - bool "Compex WP18 / NP18A" - select PCI ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -27,6 +27,7 @@ obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt - obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o - obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o - obj-pci-$(CONFIG_MACH_MI424WR) += mi424wr-pci.o -+obj-pci-$(CONFIG_MACH_USR8200) += usr8200-pci.o - - obj-y += common.o - -@@ -55,6 +56,7 @@ obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv - obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o - obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o - obj-$(CONFIG_MACH_MI424WR) += mi424wr-setup.o -+obj-$(CONFIG_MACH_USR8200) += usr8200-setup.o - - obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o - obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o ---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h -+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h -@@ -44,7 +44,8 @@ static __inline__ void __arch_decomp_set - machine_is_gateway7001() || machine_is_wg302v2() || - machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() || - machine_is_pronghorn() || machine_is_pronghorn_metro() || -- machine_is_wrt300nv2() || machine_is_tw5334()) -+ machine_is_wrt300nv2() || machine_is_tw5334() || -+ machine_is_usr8200()) - uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; - else - uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/usr8200-pci.c -@@ -0,0 +1,77 @@ -+/* -+ * arch/arch/mach-ixp4xx/usr8200-pci.c -+ * -+ * PCI setup routines for USRobotics USR8200 -+ * -+ * Copyright (C) 2008 Peter Denison -+ * -+ * based on pronghorn-pci.c -+ * Copyright (C) 2008 Imre Kaloz -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * -+ * Maintainer: Peter Denison -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+ -+void __init usr8200_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init usr8200_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == 14) -+ return IRQ_IXP4XX_GPIO7; -+ else if (slot == 15) -+ return IRQ_IXP4XX_GPIO8; -+ else if (slot == 16) { -+ if (pin == 1) -+ return IRQ_IXP4XX_GPIO11; -+ else if (pin == 2) -+ return IRQ_IXP4XX_GPIO10; -+ else if (pin == 3) -+ return IRQ_IXP4XX_GPIO9; -+ else -+ return -1; -+ } else -+ return -1; -+} -+ -+struct hw_pci usr8200_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = usr8200_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = usr8200_map_irq, -+}; -+ -+int __init usr8200_pci_init(void) -+{ -+ if (machine_is_usr8200()) -+ pci_common_init(&usr8200_pci); -+ return 0; -+} -+ -+subsys_initcall(usr8200_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/usr8200-setup.c -@@ -0,0 +1,217 @@ -+/* -+ * arch/arm/mach-ixp4xx/usr8200-setup.c -+ * -+ * Board setup for the USRobotics USR8200 -+ * -+ * Copyright (C) 2008 Peter Denison -+ * -+ * based on pronghorn-setup.c: -+ * Copyright (C) 2008 Imre Kaloz -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Peter Denison -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct flash_platform_data usr8200_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource usr8200_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device usr8200_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &usr8200_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &usr8200_flash_resource, -+}; -+ -+static struct resource usr8200_uart_resources [] = { -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ } -+}; -+ -+static struct plat_serial8250_port usr8200_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device usr8200_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = usr8200_uart_data, -+ }, -+ .num_resources = 2, -+ .resource = usr8200_uart_resources, -+}; -+ -+static struct gpio_led usr8200_led_pin[] = { -+ { -+ .name = "usr8200:usb1", -+ .gpio = 0, -+ .active_low = 1, -+ }, -+ { -+ .name = "usr8200:usb2", -+ .gpio = 1, -+ .active_low = 1, -+ }, -+ { -+ .name = "usr8200:ieee1394", -+ .gpio = 2, -+ .active_low = 1, -+ }, -+ { -+ .name = "usr8200:internal", -+ .gpio = 3, -+ .active_low = 1, -+ }, -+ { -+ .name = "usr8200:power", -+ .gpio = 14, -+ } -+}; -+ -+static struct gpio_led_platform_data usr8200_led_data = { -+ .num_leds = ARRAY_SIZE(usr8200_led_pin), -+ .leds = usr8200_led_pin, -+}; -+ -+static struct platform_device usr8200_led = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev.platform_data = &usr8200_led_data, -+}; -+ -+static struct eth_plat_info usr8200_plat_eth[] = { -+ { /* NPEC - LAN with Marvell 88E6060 switch */ -+ .phy = IXP4XX_ETH_PHY_MAX_ADDR, -+ .phy_mask = 0x0F0000, -+ .rxq = 4, -+ .txreadyq = 21, -+ }, { /* NPEB - WAN */ -+ .phy = 9, -+ .rxq = 3, -+ .txreadyq = 20, -+ } -+}; -+ -+static struct platform_device usr8200_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = usr8200_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = usr8200_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct resource usr8200_rtc_resources = { -+ .flags = IORESOURCE_MEM -+}; -+ -+static struct platform_device usr8200_rtc = { -+ .name = "rtc7301", -+ .id = 0, -+ .num_resources = 1, -+ .resource = &usr8200_rtc_resources, -+}; -+ -+static struct platform_device *usr8200_devices[] __initdata = { -+ &usr8200_flash, -+ &usr8200_uart, -+ &usr8200_led, -+ &usr8200_eth[0], -+ &usr8200_eth[1], -+ &usr8200_rtc, -+}; -+ -+static void __init usr8200_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ usr8200_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ usr8200_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_16M - 1; -+ -+ usr8200_rtc_resources.start = IXP4XX_EXP_BUS_BASE(2); -+ usr8200_rtc_resources.end = IXP4XX_EXP_BUS_BASE(2) + 0x01ff; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS2 = 0x3fff000 | IXP4XX_EXP_BUS_SIZE(0) | IXP4XX_EXP_BUS_WR_EN | -+ IXP4XX_EXP_BUS_CS_EN | IXP4XX_EXP_BUS_BYTE_EN; -+ *IXP4XX_GPIO_GPCLKR = 0x01100000; -+ -+ /* configure button as input */ -+ gpio_line_config(12, IXP4XX_GPIO_IN); -+ -+ platform_add_devices(usr8200_devices, ARRAY_SIZE(usr8200_devices)); -+} -+ -+MACHINE_START(USR8200, "USRobotics USR8200") -+ /* Maintainer: Peter Denison */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = usr8200_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END diff --git a/target/linux/ixp4xx/patches-4.4/520-tw2662_support.patch b/target/linux/ixp4xx/patches-4.4/520-tw2662_support.patch deleted file mode 100644 index 7cea61f2a..000000000 --- a/target/linux/ixp4xx/patches-4.4/520-tw2662_support.patch +++ /dev/null @@ -1,317 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -176,6 +176,15 @@ config ARCH_PRPMC1100 - PrPCM1100 Processor Mezanine Module. For more information on - this platform, see . - -+config MACH_TW2662 -+ bool "Titan Wireless TW-266-2" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support the Titan -+ Wireless TW266-2. For more information on this platform, -+ see http://openwrt.org -+ -+ - config MACH_TW5334 - bool "Titan Wireless TW-533-4" - select PCI ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -25,6 +25,7 @@ obj-pci-$(CONFIG_MACH_SIDEWINDER) += sid - obj-pci-$(CONFIG_MACH_COMPEXWP18) += ixdp425-pci.o - obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o - obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o -+obj-pci-$(CONFIG_MACH_TW2662) += tw2662-pci.o - obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o - obj-pci-$(CONFIG_MACH_MI424WR) += mi424wr-pci.o - obj-pci-$(CONFIG_MACH_USR8200) += usr8200-pci.o -@@ -54,6 +55,7 @@ obj-$(CONFIG_MACH_SIDEWINDER) += sidewin - obj-$(CONFIG_MACH_COMPEXWP18) += compex42x-setup.o - obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o - obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o -+obj-$(CONFIG_MACH_TW2662) += tw2662-setup.o - obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o - obj-$(CONFIG_MACH_MI424WR) += mi424wr-setup.o - obj-$(CONFIG_MACH_USR8200) += usr8200-setup.o ---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h -+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h -@@ -45,7 +45,7 @@ static __inline__ void __arch_decomp_set - machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() || - machine_is_pronghorn() || machine_is_pronghorn_metro() || - machine_is_wrt300nv2() || machine_is_tw5334() || -- machine_is_usr8200()) -+ machine_is_usr8200() || machine_is_tw2662()) - uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; - else - uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/tw2662-pci.c -@@ -0,0 +1,67 @@ -+/* -+ * arch/arm/mach-ixp4xx/tw2662-pci.c -+ * -+ * PCI setup routines for Tiran Wireless TW-266-2 platform -+ * -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * Copyright (C) 2010 Alexandros C. Couloumbis -+ * Copyright (C) 2010 Gabor Juhos -+ * -+ * Maintainer: Deepak Saxena -+ * Maintainer: Alexandros C. Couloumbis -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define SLOT0_DEVID 1 -+#define SLOT1_DEVID 3 -+ -+/* PCI controller GPIO to IRQ pin mappings */ -+#define SLOT0_INTA 11 -+#define SLOT1_INTA 9 -+ -+void __init tw2662_pci_preinit(void) -+{ -+ irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW); -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init tw2662_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ if (slot == SLOT0_DEVID) -+ return IXP4XX_GPIO_IRQ(SLOT0_INTA); -+ else if (slot == SLOT1_DEVID) -+ return IXP4XX_GPIO_IRQ(SLOT1_INTA); -+ else return -1; -+} -+ -+struct hw_pci tw2662_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = tw2662_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = tw2662_map_irq, -+}; -+ -+int __init tw2662_pci_init(void) -+{ -+ if (machine_is_tw2662()) -+ pci_common_init(&tw2662_pci); -+ return 0; -+} -+ -+subsys_initcall(tw2662_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/tw2662-setup.c -@@ -0,0 +1,197 @@ -+/* -+ * arch/arm/mach-ixp4xx/tw2662-setup.c -+ * -+ * Titan Wireless TW-266-2 -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ * Copyright (C) 2010 Alexandros C. Couloumbis -+ * -+ * based on ap1000-setup.c: -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* gpio mask used by platform device */ -+#define TW2662_GPIO_MASK (1 << 1) | (1 << 3) | (1 << 5) | (1 << 7) -+ -+static struct flash_platform_data tw2662_flash_data = { -+ .map_name = "cfi_probe", -+ .width = 2, -+}; -+ -+static struct resource tw2662_flash_resource = { -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct platform_device tw2662_flash = { -+ .name = "IXP4XX-Flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &tw2662_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &tw2662_flash_resource, -+}; -+ -+static struct resource tw2662_uart_resources[] = { -+ { -+ .start = IXP4XX_UART1_BASE_PHYS, -+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ }, -+ { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM -+ } -+}; -+ -+static struct plat_serial8250_port tw2662_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART1_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART1, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device tw2662_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev.platform_data = tw2662_uart_data, -+ .num_resources = 2, -+ .resource = tw2662_uart_resources -+}; -+ -+/* Built-in 10/100 Ethernet MAC interfaces */ -+static struct eth_plat_info tw2662_plat_eth[] = { -+ { -+ .phy = 3, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 1, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device tw2662_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = tw2662_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = tw2662_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+ -+static struct platform_device *tw2662_devices[] __initdata = { -+ &tw2662_flash, -+ &tw2662_uart, -+ &tw2662_eth[0], -+ &tw2662_eth[1], -+}; -+ -+static char tw2662_mem_fixup[] __initdata = "mem=64M "; -+ -+static void __init tw2662_fixup(struct tag *tags, char **cmdline, -+ struct meminfo *mi) -+{ -+ struct tag *t = tags; -+ char *p = *cmdline; -+ -+ /* Find the end of the tags table, taking note of any cmdline tag. */ -+ for (; t->hdr.size; t = tag_next(t)) { -+ if (t->hdr.tag == ATAG_CMDLINE) { -+ p = t->u.cmdline.cmdline; -+ } -+ } -+ -+ /* Overwrite the end of the table with a new cmdline tag. */ -+ t->hdr.tag = ATAG_CMDLINE; -+ t->hdr.size = (sizeof (struct tag_header) + -+ strlen(tw2662_mem_fixup) + strlen(p) + 1 + 4) >> 2; -+ strlcpy(t->u.cmdline.cmdline, tw2662_mem_fixup, COMMAND_LINE_SIZE); -+ strlcpy(t->u.cmdline.cmdline + strlen(tw2662_mem_fixup), p, -+ COMMAND_LINE_SIZE - strlen(tw2662_mem_fixup)); -+ -+ /* Terminate the table. */ -+ t = tag_next(t); -+ t->hdr.tag = ATAG_NONE; -+ t->hdr.size = 0; -+} -+ -+static void __init tw2662_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ tw2662_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ tw2662_flash_resource.end = -+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; -+ -+ platform_add_devices(tw2662_devices, ARRAY_SIZE(tw2662_devices)); -+ -+ if (!(is_valid_ether_addr(tw2662_plat_eth[0].hwaddr))) -+ random_ether_addr(tw2662_plat_eth[0].hwaddr); -+ if (!(is_valid_ether_addr(tw2662_plat_eth[1].hwaddr))) { -+ memcpy(tw2662_plat_eth[1].hwaddr, tw2662_plat_eth[0].hwaddr, ETH_ALEN); -+ tw2662_plat_eth[1].hwaddr[5] = (tw2662_plat_eth[0].hwaddr[5] + 1); -+ } -+ -+} -+ -+#ifdef CONFIG_MACH_TW2662 -+MACHINE_START(TW2662, "Titan Wireless TW-266-2") -+ /* Maintainer: Alexandros C. Couloumbis */ -+ .fixup = tw2662_fixup, -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x0100, -+ .init_machine = tw2662_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+#endif diff --git a/target/linux/ixp4xx/patches-4.4/530-ap42x_support.patch b/target/linux/ixp4xx/patches-4.4/530-ap42x_support.patch deleted file mode 100644 index 1afbe3d61..000000000 --- a/target/linux/ixp4xx/patches-4.4/530-ap42x_support.patch +++ /dev/null @@ -1,282 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/Kconfig -+++ b/arch/arm/mach-ixp4xx/Kconfig -@@ -4,6 +4,14 @@ menu "Intel IXP4xx Implementation Option - - comment "IXP4xx Platforms" - -+config MACH_AP42X -+ bool "Tonze AP-422/425" -+ select PCI -+ help -+ Say 'Y' here if you want your kernel to support Tonze's -+ AP-422/425 boards. For more information on this platform, -+ see http://tonze.com.tw -+ - config MACH_NSLU2 - bool - prompt "Linksys NSLU2" ---- a/arch/arm/mach-ixp4xx/Makefile -+++ b/arch/arm/mach-ixp4xx/Makefile -@@ -5,6 +5,7 @@ - obj-pci-y := - obj-pci-n := - -+obj-pci-$(CONFIG_MACH_AP42X) += ap42x-pci.o - obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o - obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o - obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o -@@ -32,6 +33,7 @@ obj-pci-$(CONFIG_MACH_USR8200) += usr82 - - obj-y += common.o - -+obj-$(CONFIG_MACH_AP42X) += ap42x-setup.o - obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o - obj-$(CONFIG_MACH_AVILA) += avila-setup.o - obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/ap42x-pci.c -@@ -0,0 +1,63 @@ -+/* -+ * arch/arch/mach-ixp4xx/ap42x-pci.c -+ * -+ * PCI setup routines for Tonze AP-422/425 -+ * -+ * Copyright (C) 2012 Imre Kaloz -+ * -+ * based on coyote-pci.c: -+ * Copyright (C) 2002 Jungo Software Technologies. -+ * Copyright (C) 2003 MontaVista Softwrae, Inc. -+ * -+ * Maintainer: Imre Kaloz -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+ -+void __init ap42x_pci_preinit(void) -+{ -+ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); -+ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); -+ -+ ixp4xx_pci_preinit(); -+} -+ -+static int __init ap42x_map_irq(const struct pci_dev *dev, u8 slot, -+ u8 pin) -+{ -+ if (slot == 1) -+ return IRQ_IXP4XX_GPIO11; -+ else if (slot == 2) -+ return IRQ_IXP4XX_GPIO10; -+ else return -1; -+} -+ -+struct hw_pci ap42x_pci __initdata = { -+ .nr_controllers = 1, -+ .preinit = ap42x_pci_preinit, -+ .ops = &ixp4xx_ops, -+ .setup = ixp4xx_setup, -+ .map_irq = ap42x_map_irq, -+}; -+ -+int __init ap42x_pci_init(void) -+{ -+ if (machine_is_ap42x()) -+ pci_common_init(&ap42x_pci); -+ return 0; -+} -+ -+subsys_initcall(ap42x_pci_init); ---- /dev/null -+++ b/arch/arm/mach-ixp4xx/ap42x-setup.c -@@ -0,0 +1,166 @@ -+/* -+ * arch/arm/mach-ixp4xx/ap42x-setup.c -+ * -+ * Board setup for the Tonze AP-42x boards -+ * -+ * Copyright (C) 2012 Imre Kaloz -+ * -+ * based on coyote-setup.c: -+ * Copyright (C) 2003-2005 MontaVista Software, Inc. -+ * -+ * Author: Imre Kaloz -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static struct mtd_partition ap42x_flash_partitions[] = { -+ { -+ .name = "RedBoot", -+ .offset = 0x00000000, -+ .size = 0x00080000, -+ }, { -+ .name = "linux", -+ .offset = 0x00080000, -+ .size = 0x00100000, -+ }, { -+ .name = "rootfs", -+ .offset = 0x00180000, -+ .size = 0x00660000, -+ }, { -+ .name = "FIS directory", -+ .offset = 0x007f8000, -+ .size = 0x00007000, -+ }, { -+ .name = "RedBoot config", -+ .offset = 0x007ff000, -+ .size = 0x00001000, -+ }, -+}; -+ -+static struct physmap_flash_data ap42x_flash_data = { -+ .width = 2, -+ .parts = ap42x_flash_partitions, -+ .nr_parts = ARRAY_SIZE(ap42x_flash_partitions), -+}; -+ -+static struct resource ap42x_flash_resource = { -+ .flags = IORESOURCE_MEM, -+ .start = IXP4XX_EXP_BUS_BASE_PHYS, -+ .end = IXP4XX_EXP_BUS_BASE_PHYS + SZ_8M - 1, -+}; -+ -+static struct platform_device ap42x_flash = { -+ .name = "physmap-flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &ap42x_flash_data, -+ }, -+ .num_resources = 1, -+ .resource = &ap42x_flash_resource, -+}; -+ -+static struct resource ap42x_uart_resource = { -+ .start = IXP4XX_UART2_BASE_PHYS, -+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct plat_serial8250_port ap42x_uart_data[] = { -+ { -+ .mapbase = IXP4XX_UART2_BASE_PHYS, -+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, -+ .irq = IRQ_IXP4XX_UART2, -+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, -+ .iotype = UPIO_MEM, -+ .regshift = 2, -+ .uartclk = IXP4XX_UART_XTAL, -+ }, -+ { }, -+}; -+ -+static struct platform_device ap42x_uart = { -+ .name = "serial8250", -+ .id = PLAT8250_DEV_PLATFORM, -+ .dev = { -+ .platform_data = ap42x_uart_data, -+ }, -+ .num_resources = 1, -+ .resource = &ap42x_uart_resource, -+}; -+ -+static struct eth_plat_info ap42x_plat_eth[] = { -+ { -+ .phy = 2, -+ .rxq = 3, -+ .txreadyq = 20, -+ }, { -+ .phy = 1, -+ .rxq = 4, -+ .txreadyq = 21, -+ } -+}; -+ -+static struct platform_device ap42x_eth[] = { -+ { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEB, -+ .dev.platform_data = ap42x_plat_eth, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ }, { -+ .name = "ixp4xx_eth", -+ .id = IXP4XX_ETH_NPEC, -+ .dev.platform_data = ap42x_plat_eth + 1, -+ .dev.coherent_dma_mask = DMA_BIT_MASK(32), -+ } -+}; -+ -+static struct platform_device *ap42x_devices[] __initdata = { -+ &ap42x_flash, -+ &ap42x_uart, -+ &ap42x_eth[0], -+ &ap42x_eth[1], -+}; -+ -+static void __init ap42x_init(void) -+{ -+ ixp4xx_sys_init(); -+ -+ ap42x_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); -+ ap42x_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; -+ -+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; -+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; -+ -+ platform_add_devices(ap42x_devices, ARRAY_SIZE(ap42x_devices)); -+} -+ -+#ifdef CONFIG_MACH_AP42X -+MACHINE_START(AP42X, "Tonze AP-422/425") -+ /* Maintainer: Imre Kaloz */ -+ .map_io = ixp4xx_map_io, -+ .init_irq = ixp4xx_init_irq, -+ .init_time = ixp4xx_timer_init, -+ .atag_offset = 0x100, -+ .init_machine = ap42x_init, -+#if defined(CONFIG_PCI) -+ .dma_zone_size = SZ_64M, -+#endif -+ .restart = ixp4xx_restart, -+MACHINE_END -+#endif ---- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h -+++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h -@@ -45,7 +45,8 @@ static __inline__ void __arch_decomp_set - machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() || - machine_is_pronghorn() || machine_is_pronghorn_metro() || - machine_is_wrt300nv2() || machine_is_tw5334() || -- machine_is_usr8200() || machine_is_tw2662()) -+ machine_is_usr8200() || machine_is_tw2662() || -+ machine_is_ap42x()) - uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; - else - uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; diff --git a/target/linux/ixp4xx/patches-4.4/600-skb_avoid_dmabounce.patch b/target/linux/ixp4xx/patches-4.4/600-skb_avoid_dmabounce.patch deleted file mode 100644 index e080e600f..000000000 --- a/target/linux/ixp4xx/patches-4.4/600-skb_avoid_dmabounce.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/net/core/skbuff.c -+++ b/net/core/skbuff.c -@@ -214,6 +214,9 @@ struct sk_buff *__alloc_skb(unsigned int - - if (sk_memalloc_socks() && (flags & SKB_ALLOC_RX)) - gfp_mask |= __GFP_MEMALLOC; -+#ifdef CONFIG_ARCH_IXP4XX -+ gfp_mask |= GFP_DMA; -+#endif - - /* Get the HEAD */ - skb = kmem_cache_alloc_node(cache, gfp_mask & ~__GFP_DMA, node); -@@ -1146,6 +1149,10 @@ int pskb_expand_head(struct sk_buff *skb - if (skb_shared(skb)) - BUG(); - -+#ifdef CONFIG_ARCH_IXP4XX -+ gfp_mask |= GFP_DMA; -+#endif -+ - size = SKB_DATA_ALIGN(size); - - if (skb_pfmemalloc(skb)) diff --git a/target/linux/ixp4xx/patches-4.4/900-ixp4xx-crypto-include-module.h.patch b/target/linux/ixp4xx/patches-4.4/900-ixp4xx-crypto-include-module.h.patch deleted file mode 100644 index 24c93dc74..000000000 --- a/target/linux/ixp4xx/patches-4.4/900-ixp4xx-crypto-include-module.h.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/drivers/crypto/ixp4xx_crypto.c -+++ b/drivers/crypto/ixp4xx_crypto.c -@@ -14,6 +14,7 @@ - #include - #include - #include -+#include - #include - #include - #include diff --git a/target/linux/ixp4xx/patches-4.4/910-ixp4xx-nr_irq_lines.patch b/target/linux/ixp4xx/patches-4.4/910-ixp4xx-nr_irq_lines.patch deleted file mode 100644 index 06e09f469..000000000 --- a/target/linux/ixp4xx/patches-4.4/910-ixp4xx-nr_irq_lines.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/arch/arm/mach-ixp4xx/ixdp425-pci.c -+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c -@@ -53,7 +53,7 @@ static int __init ixdp425_map_irq(const - }; - - if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) -- return pci_irq_table[(slot + pin - 2) % 4]; -+ return pci_irq_table[(slot + pin - 2) % IRQ_LINES]; - - return -1; - } ---- a/arch/arm/mach-ixp4xx/miccpt-pci.c -+++ b/arch/arm/mach-ixp4xx/miccpt-pci.c -@@ -54,7 +54,7 @@ static int __init miccpt_map_irq(const s - }; - - if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES) -- return pci_irq_table[(slot + pin - 2) % 4]; -+ return pci_irq_table[(slot + pin - 2) % IRQ_LINES]; - - return -1; - } diff --git a/target/linux/ixp4xx/patches-4.9/160-delayed_uart_io.patch b/target/linux/ixp4xx/patches-4.9/160-delayed_uart_io.patch index 1ac9e5f9f..dd431a294 100644 --- a/target/linux/ixp4xx/patches-4.9/160-delayed_uart_io.patch +++ b/target/linux/ixp4xx/patches-4.9/160-delayed_uart_io.patch @@ -18,7 +18,7 @@ uart->capabilities = up->capabilities; --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c -@@ -2229,6 +2229,7 @@ uart_report_port(struct uart_driver *drv +@@ -2233,6 +2233,7 @@ uart_report_port(struct uart_driver *drv snprintf(address, sizeof(address), "I/O 0x%lx offset 0x%x", port->iobase, port->hub6); break; @@ -26,7 +26,7 @@ case UPIO_MEM: case UPIO_MEM16: case UPIO_MEM32: -@@ -2893,6 +2894,7 @@ int uart_match_port(struct uart_port *po +@@ -2897,6 +2898,7 @@ int uart_match_port(struct uart_port *po case UPIO_HUB6: return (port1->iobase == port2->iobase) && (port1->hub6 == port2->hub6); diff --git a/target/linux/kirkwood/Makefile b/target/linux/kirkwood/Makefile index d5df85443..3eac246a4 100644 --- a/target/linux/kirkwood/Makefile +++ b/target/linux/kirkwood/Makefile @@ -13,7 +13,7 @@ FEATURES:=usb nand squashfs ramdisk CPU_TYPE:=xscale MAINTAINER:=Luka Perkov -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/kirkwood/base-files/lib/upgrade/platform.sh b/target/linux/kirkwood/base-files/lib/upgrade/platform.sh index 27012bd21..a25d90a09 100644 --- a/target/linux/kirkwood/base-files/lib/upgrade/platform.sh +++ b/target/linux/kirkwood/base-files/lib/upgrade/platform.sh @@ -4,7 +4,7 @@ RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock' REQUIRE_IMAGE_METADATA=1 platform_check_image() { - return 1 + return 0 } platform_do_upgrade() { diff --git a/target/linux/mvebu/config-4.4 b/target/linux/kirkwood/config-4.14 similarity index 54% rename from target/linux/mvebu/config-4.4 rename to target/linux/kirkwood/config-4.14 index 789b220b7..3ea1a9b41 100644 --- a/target/linux/mvebu/config-4.4 +++ b/target/linux/kirkwood/config-4.14 @@ -1,20 +1,25 @@ -CONFIG_AHCI_MVEBU=y CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_ARCH_MULTIPLATFORM=y -# CONFIG_ARCH_MULTI_CPU_AUTO is not set -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MULTI_CPU_AUTO=y +# CONFIG_ARCH_MULTI_V4 is not set +# CONFIG_ARCH_MULTI_V4T is not set +CONFIG_ARCH_MULTI_V4_V5=y +CONFIG_ARCH_MULTI_V5=y CONFIG_ARCH_MVEBU=y CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y @@ -23,146 +28,102 @@ CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y +CONFIG_ARCH_WANT_LIBATA_LEDS=y CONFIG_ARM=y -CONFIG_ARMADA_370_CLK=y -CONFIG_ARMADA_370_XP_TIMER=y -CONFIG_ARMADA_38X_CLK=y -CONFIG_ARMADA_THERMAL=y -CONFIG_ARMADA_XP_CLK=y +# CONFIG_ARMADA_THERMAL is not set CONFIG_ARM_APPENDED_DTB=y CONFIG_ARM_ATAG_DTB_COMPAT=y # CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_ARM_GIC=y +# CONFIG_ARM_CPU_SUSPEND is not set CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_MVEBU_V7_CPUIDLE=y +# CONFIG_ARM_KIRKWOOD_CPUIDLE is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +# CONFIG_ARM_THUMB is not set CONFIG_ATA=y CONFIG_ATAGS=y +CONFIG_ATA_LEDS=y CONFIG_AUTO_ZRELADDR=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BOUNCE=y -# CONFIG_CACHE_FEROCEON_L2 is not set -CONFIG_CACHE_L2X0=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_CACHE_FEROCEON_L2=y +# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set +# CONFIG_CACHE_L2X0 is not set CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_COMMON_CLK=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y # CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_FEROCEON=y CONFIG_CPU_CP15=y CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_FEROCEON=y +# CONFIG_CPU_FEROCEON_OLD_ID is not set # CONFIG_CPU_ICACHE_DISABLE is not set CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PJ4B=y +CONFIG_CPU_PABRT_LEGACY=y CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_FEROCEON=y +CONFIG_CPU_USE_DOMAINS=y CONFIG_CRC16=y -CONFIG_CRYPTO_ABLK_HELPER=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -# CONFIG_CRYPTO_AES_ARM_CE is not set +# CONFIG_CRC32_SARWATE is not set +CONFIG_CRC32_SLICEBY8=y +CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRYPTD=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_MARVELL_CESA=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -# CONFIG_CRYPTO_SHA1_ARM_CE is not set -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256_ARM=y -# CONFIG_CRYPTO_SHA2_ARM_CE is not set -CONFIG_CRYPTO_SHA512_ARM=y CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_INFO=y CONFIG_DEBUG_LL=y CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_MVEBU_UART0=y -# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set +CONFIG_DEBUG_MVEBU_UART0_ALTERNATE=y # CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set CONFIG_DEBUG_UART_8250=y # CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set CONFIG_DEBUG_UART_8250_SHIFT=2 # CONFIG_DEBUG_UART_8250_WORD is not set -CONFIG_DEBUG_UART_PHYS=0xd0012000 -CONFIG_DEBUG_UART_VIRT=0xfec12000 +CONFIG_DEBUG_UART_PHYS=0xf1012000 +CONFIG_DEBUG_UART_VIRT=0xfed12000 CONFIG_DEBUG_UNCOMPRESS=y -CONFIG_DEBUG_USER=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_ENGINE_RAID=y -CONFIG_DMA_OF=y +# CONFIG_DEBUG_USER is not set +# CONFIG_DLCI is not set +# CONFIG_DMA_NOOP_OPS is not set +# CONFIG_DMA_VIRT_OPS is not set +CONFIG_DNOTIFY=y +# CONFIG_DRM_LIB_RANDOM is not set CONFIG_DTC=y -# CONFIG_DW_DMAC_PCI is not set -CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK is not set CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y +CONFIG_EXPORTFS=y CONFIG_EXT4_FS=y -# CONFIG_F2FS_CHECK_FS is not set -CONFIG_F2FS_FS=y -# CONFIG_F2FS_FS_SECURITY is not set -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_STAT_FS=y CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FRAME_POINTER=y CONFIG_FS_MBCACHE=y +CONFIG_FUTEX_PI=y CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IO=y CONFIG_GENERIC_IRQ_CHIP=y @@ -176,12 +137,9 @@ CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GLOB=y CONFIG_GPIOLIB=y -CONFIG_GPIO_DEVRES=y CONFIG_GPIO_MVEBU=y -CONFIG_GPIO_MVEBU_PWM=y -CONFIG_GPIO_PCA953X=y -# CONFIG_GPIO_PCA953X_IRQ is not set CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y @@ -189,16 +147,13 @@ CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y # CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y +# CONFIG_HAVE_ARCH_BITREVERSE is not set CONFIG_HAVE_ARCH_JUMP_LABEL=y CONFIG_HAVE_ARCH_KGDB=y CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_TWD=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_BPF_JIT=y CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y @@ -206,10 +161,10 @@ CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y @@ -226,70 +181,51 @@ CONFIG_HAVE_PERF_REGS=y CONFIG_HAVE_PERF_USER_STACK_DUMP=y CONFIG_HAVE_PROC_CPU=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_SMP=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_UID16=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HOTPLUG_CPU=y -CONFIG_HWBM=y -CONFIG_HWMON=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OMAP=y CONFIG_HZ_FIXED=0 CONFIG_HZ_PERIODIC=y CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_MV64XXX=y +# CONFIG_I2C_PXA is not set CONFIG_INITRAMFS_SOURCE="" CONFIG_IOMMU_HELPER=y CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_DEBUG=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_WORK=y -# CONFIG_IWMMXT is not set CONFIG_JBD2=y +CONFIG_KIRKWOOD_CLK=y +CONFIG_KIRKWOOD_THERMAL=y CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PCA963X=y -CONFIG_LEDS_TLC591XX=y +CONFIG_LEDS_NETXBIG=y +CONFIG_LEDS_NS2=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 CONFIG_LIBFDT=y -CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -CONFIG_MACH_ARMADA_370=y -# CONFIG_MACH_ARMADA_375 is not set -CONFIG_MACH_ARMADA_38X=y -# CONFIG_MACH_ARMADA_39X is not set -CONFIG_MACH_ARMADA_XP=y -# CONFIG_MACH_DOVE is not set +CONFIG_MACH_KIRKWOOD=y CONFIG_MACH_MVEBU_ANY=y -CONFIG_MACH_MVEBU_V7=y -CONFIG_MAGIC_SYSRQ=y CONFIG_MANGLE_BOOTARGS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BOARDINFO=y -CONFIG_MDIO_I2C=y -CONFIG_MEMORY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y CONFIG_MIGHT_HAVE_PCI=y CONFIG_MMC=y CONFIG_MMC_BLOCK=y CONFIG_MMC_MVSDIO=y -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_PXAV3=y # CONFIG_MMC_TIFM_SD is not set CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_M25P80=y +# CONFIG_MTD_CFI is not set +CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_PXA3xx=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_NAND_ORION=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_BEB_LIMIT=20 CONFIG_MTD_UBI_BLOCK=y @@ -297,24 +233,18 @@ CONFIG_MTD_UBI_BLOCK=y # CONFIG_MTD_UBI_GLUEBI is not set CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MULTI_IRQ_HANDLER=y -CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_MV643XX_ETH=y CONFIG_MVEBU_CLK_COMMON=y -CONFIG_MVEBU_CLK_COREDIV=y -CONFIG_MVEBU_CLK_CPU=y -CONFIG_MVEBU_DEVBUS=y CONFIG_MVEBU_MBUS=y CONFIG_MVMDIO=y -CONFIG_MVNETA=y -CONFIG_MVNETA_BM=y +# CONFIG_MVNETA is not set +# CONFIG_MVPP2 is not set CONFIG_MVSW61XX_PHY=y -CONFIG_MV_XOR=y CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_FLOW_LIMIT=y +CONFIG_NEED_KUSER_HELPERS=y +CONFIG_NEED_PER_CPU_KM=y CONFIG_NLS=y -CONFIG_NOP_USB_XCEIV=y CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=4 CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_ADDRESS_PCI=y @@ -323,86 +253,83 @@ CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y CONFIG_OF_MDIO=y -CONFIG_OF_MTD=y CONFIG_OF_NET=y CONFIG_OF_PCI=y CONFIG_OF_PCI_IRQ=y CONFIG_OF_RESERVED_MEM=y CONFIG_OLD_SIGACTION=y CONFIG_OLD_SIGSUSPEND3=y +CONFIG_ORION_IRQCHIP=y +CONFIG_ORION_TIMER=y CONFIG_ORION_WATCHDOG=y CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PCI=y -# CONFIG_PCI_DOMAINS_GENERIC is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y CONFIG_PCI_MVEBU=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y -CONFIG_PHYLINK=y +# CONFIG_PHY_MVEBU_CP110_COMPHY is not set +CONFIG_PHY_MVEBU_SATA=y CONFIG_PINCTRL=y -CONFIG_PINCTRL_ARMADA_370=y -CONFIG_PINCTRL_ARMADA_38X=y -CONFIG_PINCTRL_ARMADA_XP=y +CONFIG_PINCTRL_KIRKWOOD=y CONFIG_PINCTRL_MVEBU=y # CONFIG_PINCTRL_SINGLE is not set -CONFIG_PJ4B_ERRATA_4742=y -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set CONFIG_PLAT_ORION=y -CONFIG_PM_OPP=y -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +# CONFIG_POWER_RESET_QNAP is not set +CONFIG_POWER_SUPPLY=y CONFIG_RATIONAL=y -CONFIG_RCU_STALL_COMMON=y +# CONFIG_RCU_NEED_SEGCBLIST is not set +# CONFIG_RCU_STALL_COMMON is not set CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_SPI=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_ARMADA38X=y CONFIG_RTC_DRV_MV=y -CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SATA_AHCI_PLATFORM=y CONFIG_SATA_MV=y # CONFIG_SCHED_INFO is not set CONFIG_SCSI=y -CONFIG_SENSORS_PWM_FAN=y -CONFIG_SENSORS_TMP421=y -CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y CONFIG_SERIAL_8250_FSL=y -CONFIG_SFP=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y +# CONFIG_SERIAL_MVEBU_UART is not set +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SG_POOL=y CONFIG_SOC_BUS=y CONFIG_SPARSE_IRQ=y CONFIG_SPI=y +# CONFIG_SPI_ARMADA_3700 is not set CONFIG_SPI_MASTER=y CONFIG_SPI_ORION=y +CONFIG_SPLIT_PTLOCK_CPUS=999999 CONFIG_SRAM=y +CONFIG_SRAM_EXEC=y CONFIG_SRCU=y CONFIG_SWCONFIG=y CONFIG_SWIOTLB=y CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_THERMAL=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set +CONFIG_THIN_ARCHIVES=y CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_STATS=y -CONFIG_TREE_RCU=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_ADVANCED_COMPR=y CONFIG_UBIFS_FS_LZO=y CONFIG_UBIFS_FS_ZLIB=y CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" @@ -410,27 +337,19 @@ CONFIG_USB=y CONFIG_USB_COMMON=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD_ORION=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_LEDS_TRIGGER_USBPORT=y -CONFIG_USB_PHY=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +CONFIG_USB_LED_TRIG=y CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_MVEBU=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_XHCI_PLATFORM=y CONFIG_USE_OF=y CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_VFP=y -CONFIG_VFPv3=y +# CONFIG_VFP is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WAN=y CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y CONFIG_XZ_DEC_ARM=y CONFIG_XZ_DEC_BCJ=y CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/kirkwood/patches-4.14/100-ib62x0.patch b/target/linux/kirkwood/patches-4.14/100-ib62x0.patch new file mode 100644 index 000000000..d1a5aa7d3 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/100-ib62x0.patch @@ -0,0 +1,30 @@ +--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts ++++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts +@@ -6,7 +6,7 @@ + + / { + model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)"; +- compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; ++ compatible = "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood"; + + memory { + device_type = "memory"; +@@ -118,13 +118,13 @@ + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x600000>; ++ label = "second stage u-boot"; ++ reg = <0x100000 0x200000>; + }; + +- partition@700000 { +- label = "root"; +- reg = <0x0700000 0xf900000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x200000 0xfe00000>; + }; + + }; diff --git a/target/linux/kirkwood/patches-4.14/101-iconnect.patch b/target/linux/kirkwood/patches-4.14/101-iconnect.patch new file mode 100644 index 000000000..ab47b5a72 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/101-iconnect.patch @@ -0,0 +1,50 @@ +--- a/arch/arm/boot/dts/kirkwood-iconnect.dts ++++ b/arch/arm/boot/dts/kirkwood-iconnect.dts +@@ -16,8 +16,6 @@ + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; +- linux,initrd-start = <0x4500040>; +- linux,initrd-end = <0x4800000>; + }; + + ocp@f1000000 { +@@ -146,28 +144,23 @@ + status = "okay"; + + partition@0 { +- label = "uboot"; +- reg = <0x0000000 0xc0000>; ++ label = "u-boot"; ++ reg = <0x0000000 0xe0000>; + }; + +- partition@a0000 { +- label = "env"; +- reg = <0xa0000 0x20000>; ++ partition@e0000 { ++ label = "u-boot environment"; ++ reg = <0xe0000 0x100000>; + }; + + partition@100000 { +- label = "zImage"; +- reg = <0x100000 0x300000>; ++ label = "second stage u-boot"; ++ reg = <0x100000 0x200000>; + }; + +- partition@540000 { +- label = "initrd"; +- reg = <0x540000 0x300000>; +- }; +- +- partition@980000 { +- label = "boot"; +- reg = <0x980000 0x1f400000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x200000 0x1fe00000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-4.14/102-dockstar.patch b/target/linux/kirkwood/patches-4.14/102-dockstar.patch new file mode 100644 index 000000000..7462b93e0 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/102-dockstar.patch @@ -0,0 +1,32 @@ +--- a/arch/arm/boot/dts/kirkwood-dockstar.dts ++++ b/arch/arm/boot/dts/kirkwood-dockstar.dts +@@ -78,18 +78,22 @@ + + partition@0 { + label = "u-boot"; +- reg = <0x0000000 0x100000>; +- read-only; ++ reg = <0x0000000 0xe0000>; ++ }; ++ ++ partition@e0000 { ++ label = "u-boot environment"; ++ reg = <0xe0000 0x100000>; + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x400000>; ++ label = "second stage u-boot"; ++ reg = <0x100000 0x200000>; + }; + +- partition@500000 { +- label = "data"; +- reg = <0x0500000 0xfb00000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x200000 0xfe00000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-4.14/104-ea3500.patch b/target/linux/kirkwood/patches-4.14/104-ea3500.patch new file mode 100644 index 000000000..73bb252a7 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/104-ea3500.patch @@ -0,0 +1,258 @@ +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -250,6 +250,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \ + kirkwood-linkstation-lswsxl.dtb \ + kirkwood-linkstation-lswvl.dtb \ + kirkwood-linkstation-lswxl.dtb \ ++ kirkwood-linksys-audi.dtb \ + kirkwood-linksys-viper.dtb \ + kirkwood-lschlv2.dtb \ + kirkwood-lsxhl.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/kirkwood-linksys-audi.dts +@@ -0,0 +1,245 @@ ++/* ++ * kirkwood-linksys-audi.dts - Device Tree file for Linksys EA3500 ++ * ++ * (c) 2013 Jonas Gorski ++ * (c) 2013 Deutsche Telekom Innovation Laboratories ++ * (c) 2014 Luka Perkov ++ * (c) 2014 Dan Walters ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++/dts-v1/; ++ ++#include "kirkwood.dtsi" ++#include "kirkwood-6282.dtsi" ++ ++/ { ++ model = "Linksys Audi (EA3500)"; ++ compatible = "linksys,audi", "marvell,kirkwood-88f6282", "marvell,kirkwood"; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x4000000>; ++ }; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ gpio_keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-0 = < &pmx_btn_wps &pmx_btn_reset >; ++ pinctrl-names = "default"; ++ ++ wps { ++ label = "WPS Button"; ++ linux,code = ; ++ gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; ++ }; ++ ++ reset { ++ label = "Reset Button"; ++ linux,code = ; ++ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = < &pmx_led_green_power >; ++ pinctrl-names = "default"; ++ ++ green-power { ++ label = "audi:green:power"; ++ gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ mvsw61xx { ++ compatible = "marvell,88e6171"; ++ status = "okay"; ++ reg = <0x10>; ++ ++ mii-bus = <&mdio>; ++ cpu-port-0 = <5>; ++ cpu-port-1 = <6>; ++ is-indirect; ++ }; ++ ++ dsa { ++ compatible = "marvell,dsa"; ++ #address-cells = <2>; ++ #size-cells = <0>; ++ ++ dsa,ethernet = <ð0port>; ++ dsa,mii-bus = <&mdio>; ++ ++ switch@16,0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <16 0>; /* MDIO address 16, switch 0 in tree */ ++ ++ port@0 { ++ reg = <0>; ++ label = "ethernet1"; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "ethernet2"; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "ethernet3"; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "ethernet4"; ++ }; ++ ++ port@4 { ++ reg = <4>; ++ label = "internet"; ++ }; ++ ++ port@5 { ++ reg = <5>; ++ label = "cpu"; ++ }; ++ }; ++ }; ++}; ++ ++&pinctrl { ++ pmx_led_green_power: pmx-led-green-power { ++ marvell,pins = "mpp7"; ++ marvell,function = "gpo"; ++ }; ++ pmx_btn_wps: pmx-btn-wps { ++ marvell,pins = "mpp47"; ++ marvell,function = "gpio"; ++ }; ++ pmx_btn_reset: pmx-btn-reset { ++ marvell,pins = "mpp48"; ++ marvell,function = "gpio"; ++ }; ++}; ++ ++&nand { ++ status = "okay"; ++ pinctrl-0 = <&pmx_nand>; ++ pinctrl-names = "default"; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x0 0x80000>; ++ read-only; ++ }; ++ ++ partition@80000 { ++ label = "u_env"; ++ reg = <0x80000 0x4000>; ++ }; ++ ++ partition@84000 { ++ label = "s_env"; ++ reg = <0x84000 0x4000>; ++ }; ++ ++ partition@200000 { ++ label = "kernel1"; ++ reg = <0x200000 0x290000>; ++ }; ++ ++ partition@490000 { ++ label = "rootfs1"; ++ reg = <0x490000 0x1170000>; ++ }; ++ ++ partition@1600000 { ++ label = "kernel2"; ++ reg = <0x1600000 0x290000>; ++ }; ++ ++ partition@1890000 { ++ label = "rootfs2"; ++ reg = <0x1890000 0x1170000>; ++ }; ++ ++ partition@2a00000 { ++ label = "syscfg"; ++ reg = <0x2a00000 0x1600000>; ++ }; ++ ++ partition@88000 { ++ label = "unused"; ++ reg = <0x88000 0x178000>; ++ }; ++ ++ }; ++}; ++ ++&pciec { ++ status = "okay"; ++}; ++ ++&pcie0 { ++ status = "okay"; ++}; ++ ++&pcie1 { ++ status = "okay"; ++}; ++ ++&mdio { ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++/* eth0 is connected to a Marvell 88E6171 switch, without a PHY. So set ++ * fixed speed and duplex. ++ */ ++ð0 { ++ status = "okay"; ++ ethernet0-port@0 { ++ speed = <1000>; ++ duplex = <1>; ++ }; ++}; ++ ++/* eth1 is connected to the switch at port 6. However DSA only supports a ++ * single CPU port. Upstream uses DSA so they disable this port to avoid confusion. ++ */ ++ð1 { ++ status = "okay"; ++ ethernet1-port@0 { ++ speed = <1000>; ++ duplex = <1>; ++ }; ++}; ++ ++/* There is no battery on the board, so the RTC does not keep ++ * time when there is no power, making it useless. ++ */ ++&rtc { ++ status = "disabled"; ++}; diff --git a/target/linux/kirkwood/patches-4.14/105-ea4500.patch b/target/linux/kirkwood/patches-4.14/105-ea4500.patch new file mode 100644 index 000000000..6cc3de221 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/105-ea4500.patch @@ -0,0 +1,121 @@ +--- a/arch/arm/boot/dts/kirkwood-linksys-viper.dts ++++ b/arch/arm/boot/dts/kirkwood-linksys-viper.dts +@@ -69,9 +69,18 @@ + }; + }; + +- dsa { +- status = "disabled"; ++ mvsw61xx { ++ compatible = "marvell,88e6171"; ++ status = "okay"; ++ reg = <0x10>; ++ ++ mii-bus = <&mdio>; ++ cpu-port-0 = <5>; ++ cpu-port-1 = <6>; ++ is-indirect; ++ }; + ++ dsa { + compatible = "marvell,dsa"; + #address-cells = <2>; + #size-cells = <0>; +@@ -163,22 +172,22 @@ + }; + + partition@200000 { +- label = "kernel"; ++ label = "kernel1"; + reg = <0x200000 0x2A0000>; + }; + + partition@4A0000 { +- label = "rootfs"; ++ label = "rootfs1"; + reg = <0x4A0000 0x1760000>; + }; + + partition@1C00000 { +- label = "alt_kernel"; ++ label = "kernel2"; + reg = <0x1C00000 0x2A0000>; + }; + + partition@1EA0000 { +- label = "alt_rootfs"; ++ label = "rootfs2"; + reg = <0x1EA0000 0x1760000>; + }; + +@@ -209,53 +218,6 @@ + + &mdio { + status = "okay"; +- +- switch@10 { +- compatible = "marvell,mv88e6085"; +- #address-cells = <1>; +- #size-cells = <0>; +- reg = <16>; +- +- ports { +- #address-cells = <1>; +- #size-cells = <0>; +- +- port@0 { +- reg = <0>; +- label = "ethernet1"; +- }; +- +- port@1 { +- reg = <1>; +- label = "ethernet2"; +- }; +- +- port@2 { +- reg = <2>; +- label = "ethernet3"; +- }; +- +- port@3 { +- reg = <3>; +- label = "ethernet4"; +- }; +- +- port@4 { +- reg = <4>; +- label = "internet"; +- }; +- +- port@5 { +- reg = <5>; +- label = "cpu"; +- ethernet = <ð0port>; +- fixed-link { +- speed = <1000>; +- full-duplex; +- }; +- }; +- }; +- }; + }; + + &uart0 { +@@ -274,10 +236,14 @@ + }; + + /* eth1 is connected to the switch at port 6. However DSA only supports a +- * single CPU port. So leave this port disabled to avoid confusion. ++ * single CPU port. Upstream uses DSA so they disable this port to avoid confusion. + */ + ð1 { +- status = "disabled"; ++ status = "okay"; ++ ethernet1-port@0 { ++ speed = <1000>; ++ duplex = <1>; ++ }; + }; + + /* There is no battery on the board, so the RTC does not keep diff --git a/target/linux/kirkwood/patches-4.14/105-goflexhome.patch b/target/linux/kirkwood/patches-4.14/105-goflexhome.patch new file mode 100644 index 000000000..8270613ea --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/105-goflexhome.patch @@ -0,0 +1,130 @@ +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -237,6 +237,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \ + kirkwood-ds411.dtb \ + kirkwood-ds411j.dtb \ + kirkwood-ds411slim.dtb \ ++ kirkwood-goflexhome.dtb \ + kirkwood-goflexnet.dtb \ + kirkwood-guruplug-server-plus.dtb \ + kirkwood-ib62x0.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/kirkwood-goflexhome.dts +@@ -0,0 +1,117 @@ ++/dts-v1/; ++ ++#include "kirkwood.dtsi" ++#include "kirkwood-6281.dtsi" ++ ++/ { ++ model = "Seagate GoFlex Home"; ++ compatible = "seagate,goflexhome", "marvell,kirkwood-88f6281", "marvell,kirkwood"; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x8000000>; ++ }; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10"; ++ stdout-path = &uart0; ++ }; ++ ++ ocp@f1000000 { ++ pinctrl: pin-controller@10000 { ++ pmx_usb_power_enable: pmx-usb-power-enable { ++ marvell,pins = "mpp29"; ++ marvell,function = "gpio"; ++ }; ++ pmx_led_white: pmx-led-white { ++ marvell,pins = "mpp40"; ++ marvell,function = "gpio"; ++ }; ++ pmx_led_green: pmx-led_green { ++ marvell,pins = "mpp46"; ++ marvell,function = "gpio"; ++ }; ++ pmx_led_orange: pmx-led-orange { ++ marvell,pins = "mpp47"; ++ marvell,function = "gpio"; ++ }; ++ }; ++ serial@12000 { ++ status = "ok"; ++ }; ++ ++ sata@80000 { ++ status = "okay"; ++ nr-ports = <2>; ++ }; ++ ++ }; ++ gpio-leds { ++ compatible = "gpio-leds"; ++ ++ health { ++ label = "status:green:health"; ++ gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "default-on"; ++ }; ++ fault { ++ label = "status:orange:fault"; ++ gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; ++ }; ++ misc { ++ label = "status:white:misc"; ++ gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "disk-activity"; ++ }; ++ }; ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-0 = <&pmx_usb_power_enable>; ++ pinctrl-names = "default"; ++ ++ usb_power: regulator@1 { ++ compatible = "regulator-fixed"; ++ reg = <1>; ++ regulator-name = "USB Power"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ regulator-always-on; ++ regulator-boot-on; ++ gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; ++ ++&nand { ++ chip-delay = <40>; ++ status = "okay"; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x0000000 0x100000>; ++ read-only; ++ }; ++ ++ partition@100000 { ++ label = "ubi"; ++ reg = <0x100000 0x0ff00000>; ++ }; ++}; ++ ++&mdio { ++ status = "okay"; ++ ++ ethphy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++}; ++ ++ð0 { ++ status = "okay"; ++ ethernet0-port@0 { ++ phy-handle = <ðphy0>; ++ }; ++}; diff --git a/target/linux/kirkwood/patches-4.14/106-goflexnet.patch b/target/linux/kirkwood/patches-4.14/106-goflexnet.patch new file mode 100644 index 000000000..b22176880 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/106-goflexnet.patch @@ -0,0 +1,23 @@ +--- a/arch/arm/boot/dts/kirkwood-goflexnet.dts ++++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts +@@ -159,18 +159,8 @@ + }; + + partition@100000 { +- label = "uImage"; +- reg = <0x0100000 0x400000>; +- }; +- +- partition@500000 { +- label = "pogoplug"; +- reg = <0x0500000 0x2000000>; +- }; +- +- partition@2500000 { +- label = "root"; +- reg = <0x02500000 0xd800000>; ++ label = "ubi"; ++ reg = <0x0100000 0x0ff00000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-4.14/107-01-zyxel-nsa3x0-common-nand-partitions.patch b/target/linux/kirkwood/patches-4.14/107-01-zyxel-nsa3x0-common-nand-partitions.patch new file mode 100644 index 000000000..df654033f --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/107-01-zyxel-nsa3x0-common-nand-partitions.patch @@ -0,0 +1,48 @@ +--- a/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi ++++ b/arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi +@@ -112,40 +112,16 @@ + + partition@0 { + label = "uboot"; +- reg = <0x0000000 0x0100000>; ++ reg = <0x0000000 0x00c0000>; + read-only; + }; + partition@100000 { + label = "uboot_env"; +- reg = <0x0100000 0x0080000>; ++ reg = <0x00c0000 0x0080000>; + }; +- partition@180000 { +- label = "key_store"; +- reg = <0x0180000 0x0080000>; +- }; +- partition@200000 { +- label = "info"; +- reg = <0x0200000 0x0080000>; +- }; +- partition@280000 { +- label = "etc"; +- reg = <0x0280000 0x0a00000>; +- }; +- partition@c80000 { +- label = "kernel_1"; +- reg = <0x0c80000 0x0a00000>; +- }; +- partition@1680000 { +- label = "rootfs1"; +- reg = <0x1680000 0x2fc0000>; +- }; +- partition@4640000 { +- label = "kernel_2"; +- reg = <0x4640000 0x0a00000>; +- }; +- partition@5040000 { +- label = "rootfs2"; +- reg = <0x5040000 0x2fc0000>; ++ partition@140000 { ++ label = "ubi"; ++ reg = <0x0140000 0x7ec0000>; + }; + }; + diff --git a/target/linux/kirkwood/patches-4.14/107-02-nsa310b.patch b/target/linux/kirkwood/patches-4.14/107-02-nsa310b.patch new file mode 100644 index 000000000..eefd78abd --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/107-02-nsa310b.patch @@ -0,0 +1,147 @@ +kirkwood: add nsa310b dtb, a zyxel nsa310 variant + +add support to a nsa310 variant with red/green usb led +and lm85 temp/fan controller + +Signed-off-by: Alberto Bursi + +NOTE: this patch can be upstreamed as-is, LEDE-specific + nand partitions are set in another patch + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -268,6 +268,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \ + kirkwood-ns2mini.dtb \ + kirkwood-nsa310.dtb \ + kirkwood-nsa310a.dtb \ ++ kirkwood-nsa310b.dtb \ + kirkwood-nsa320.dtb \ + kirkwood-nsa325.dtb \ + kirkwood-openblocks_a6.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/kirkwood-nsa310b.dts +@@ -0,0 +1,124 @@ ++/dts-v1/; ++ ++#include "kirkwood-nsa3x0-common.dtsi" ++ ++/* ++ * There are at least two different NSA310 designs. This variant has ++ * a red/green USB Led (same as nsa310) and a lm85 temp/fan controller. ++ */ ++ ++/ { ++ model = "ZyXEL NSA310b"; ++ compatible = "zyxel,nsa310b", "zyxel,nsa310", "marvell,kirkwood-88f6281", "marvell,kirkwood"; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x10000000>; ++ }; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200"; ++ stdout-path = &uart0; ++ }; ++ ++ ocp@f1000000 { ++ pinctrl: pin-controller@10000 { ++ pinctrl-names = "default"; ++ ++ pmx_led_esata_green: pmx-led-esata-green { ++ marvell,pins = "mpp12"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_esata_red: pmx-led-esata-red { ++ marvell,pins = "mpp13"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_usb_green: pmx-led-usb-green { ++ marvell,pins = "mpp15"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_usb_red: pmx-led-usb-red { ++ marvell,pins = "mpp16"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_sys_green: pmx-led-sys-green { ++ marvell,pins = "mpp28"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_sys_red: pmx-led-sys-red { ++ marvell,pins = "mpp29"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_hdd_green: pmx-led-hdd-green { ++ marvell,pins = "mpp41"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_hdd_red: pmx-led-hdd-red { ++ marvell,pins = "mpp42"; ++ marvell,function = "gpio"; ++ }; ++ ++ }; ++ ++ i2c@11000 { ++ status = "okay"; ++ ++ lm85: lm85@2e { ++ compatible = "national,lm85"; ++ reg = <0x2e>; ++ }; ++ }; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ ++ green-sys { ++ label = "nsa310:green:sys"; ++ gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; ++ }; ++ red-sys { ++ label = "nsa310:red:sys"; ++ gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; ++ }; ++ green-hdd { ++ label = "nsa310:green:hdd"; ++ gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; ++ }; ++ red-hdd { ++ label = "nsa310:red:hdd"; ++ gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; ++ }; ++ green-esata { ++ label = "nsa310:green:esata"; ++ gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; ++ }; ++ red-esata { ++ label = "nsa310:red:esata"; ++ gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; ++ }; ++ green-usb { ++ label = "nsa310:green:usb"; ++ gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; ++ }; ++ red-usb { ++ label = "nsa310:red:usb"; ++ gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; ++ }; ++ green-copy { ++ label = "nsa310:green:copy"; ++ gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; ++ }; ++ red-copy { ++ label = "nsa310:red:copy"; ++ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; diff --git a/target/linux/kirkwood/patches-4.14/108-on100.patch b/target/linux/kirkwood/patches-4.14/108-on100.patch new file mode 100644 index 000000000..7856277e4 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/108-on100.patch @@ -0,0 +1,173 @@ +--- /dev/null ++++ b/arch/arm/boot/dts/kirkwood-on100.dts +@@ -0,0 +1,160 @@ ++/dts-v1/; ++ ++#include "kirkwood.dtsi" ++#include "kirkwood-6282.dtsi" ++ ++/ { ++ model = "Cisco Systems ON100"; ++ compatible = "cisco,on100", "marvell,kirkwood-88f6282", "marvell,kirkwood"; ++ ++ memory { ++ device_type = "memory"; ++ reg = <0x00000000 0x20000000>; ++ }; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ bootargs = "console=ttyS0,115200n8 earlyprintk"; ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ gpio_keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-0 = <&pmx_btn_reset>; ++ pinctrl-names = "default"; ++ ++ button@1 { ++ label = "Reset Button"; ++ linux,code = ; ++ gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g >; ++ pinctrl-names = "default"; ++ ++ health-g { ++ label = "on100:green:health"; ++ gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ health-r { ++ label = "on100:red:health"; ++ gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; ++ }; ++ ++ health2-g { ++ label = "on100:green:health2"; ++ gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; ++ }; ++ ++ health2-r { ++ label = "on100:red:health2"; ++ gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++ð0 { ++ status = "okay"; ++ ++ ethernet0-port@0 { ++ phy-handle = <ðphy0>; ++ phy-connection-type = "rgmii-id"; ++ }; ++}; ++ ++ð1 { ++ status = "okay"; ++ ++ ethernet1-port@0 { ++ phy-handle = <ðphy1>; ++ phy-connection-type = "rgmii-id"; ++ }; ++}; ++ ++&mdio { ++ status = "okay"; ++ ++ ethphy0: ethernet-phy@0 { ++ /* Marvell 88E1121R */ ++ compatible = "ethernet-phy-id0141.0cb0", ++ "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++ ++ ethphy1: ethernet-phy@1 { ++ /* Marvell 88E1121R */ ++ compatible = "ethernet-phy-id0141.0cb0", ++ "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ ++&nand { ++ status = "okay"; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x00000000 0x000a0000>; ++ read-only; ++ }; ++ ++ partition@a0000 { ++ label = "u-boot environment"; ++ reg = <0x000a0000 0x00020000>; ++ read-only; ++ }; ++ ++ partition@c0000 { ++ label = "kernel"; ++ reg = <0x000c0000 0x00540000>; ++ }; ++ ++ partition@600000 { ++ label = "ubi"; ++ reg = <0x00600000 0x1fa00000>; ++ }; ++}; ++ ++&pinctrl { ++ pmx_led_health_r: pmx-led-health-r { ++ marvell,pins = "mpp45"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_health_g: pmx-led-health-g { ++ marvell,pins = "mpp44"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_health2_r: pmx-led-health2-r { ++ marvell,pins = "mpp47"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_led_health2_g: pmx-led-health2-g { ++ marvell,pins = "mpp46"; ++ marvell,function = "gpio"; ++ }; ++ ++ pmx_btn_reset: pmx-led-reset { ++ marvell,pins = "mpp31"; ++ marvell,function = "gpio"; ++ }; ++}; ++ ++&sdio { ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -271,6 +271,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \ + kirkwood-nsa310b.dtb \ + kirkwood-nsa320.dtb \ + kirkwood-nsa325.dtb \ ++ kirkwood-on100.dtb \ + kirkwood-openblocks_a6.dtb \ + kirkwood-openblocks_a7.dtb \ + kirkwood-openrd-base.dtb \ diff --git a/target/linux/kirkwood/patches-4.14/109-pogoplug_v4.patch b/target/linux/kirkwood/patches-4.14/109-pogoplug_v4.patch new file mode 100644 index 000000000..b4e53cd65 --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/109-pogoplug_v4.patch @@ -0,0 +1,59 @@ +--- a/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts ++++ b/arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts +@@ -24,6 +24,7 @@ + }; + + chosen { ++ bootargs = "console=ttyS0,115200"; + stdout-path = "uart0:115200n8"; + }; + +@@ -37,8 +38,8 @@ + eject { + debounce_interval = <50>; + wakeup-source; +- linux,code = ; +- label = "Eject Button"; ++ linux,code = ; ++ label = "Reset"; + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; + }; + }; +@@ -137,29 +138,19 @@ + #size-cells = <1>; + + partition@0 { +- label = "u-boot"; +- reg = <0x00000000 0x200000>; ++ label = "uboot"; ++ reg = <0x00000000 0x1c0000>; + read-only; + }; + +- partition@200000 { +- label = "uImage"; +- reg = <0x00200000 0x300000>; +- }; +- +- partition@500000 { +- label = "uImage2"; +- reg = <0x00500000 0x300000>; ++ partition@1c0000 { ++ label = "uboot_env"; ++ reg = <0x001c0000 0x40000>; + }; + +- partition@800000 { +- label = "failsafe"; +- reg = <0x00800000 0x800000>; +- }; +- +- partition@1000000 { +- label = "root"; +- reg = <0x01000000 0x7000000>; ++ partition@200000 { ++ label = "ubi"; ++ reg = <0x00200000 0x7e00000>; + }; + }; + }; diff --git a/target/linux/kirkwood/patches-4.14/200-disable-tso.patch b/target/linux/kirkwood/patches-4.14/200-disable-tso.patch new file mode 100644 index 000000000..4b0cbeaba --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/200-disable-tso.patch @@ -0,0 +1,35 @@ +From: Ezequiel Garcia +Subject: [PATCH] net: mv643xx_eth: Make TSO disabled by default + +Data corruption has been observed to be produced by TSO. For instance, +accessing files on a NFS-server with TSO enabled results in different data +transferred each time. + +This has been observed only on Kirkwood platforms, i.e. with the mv643xx_eth +driver. Same tests on platforms using the mvneta ethernet driver have +passed without errors. + +Make TSO disabled by default for now, until we can found a proper fix +for the regression. + +Fixes: 3ae8f4e0b98 ('net: mv643xx_eth: Implement software TSO') +Reported-by: Slawomir Gajzner gmail.com> +Reported-by: Julien D'Ascenzio yahoo.fr> +Signed-off-by: Ezequiel Garcia free-electrons.com> +--- +--- a/drivers/net/ethernet/marvell/mv643xx_eth.c ++++ b/drivers/net/ethernet/marvell/mv643xx_eth.c +@@ -3200,11 +3200,11 @@ static int mv643xx_eth_probe(struct plat + dev->watchdog_timeo = 2 * HZ; + dev->base_addr = 0; + +- dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO; ++ dev->features = NETIF_F_SG | NETIF_F_IP_CSUM; + dev->vlan_features = dev->features; + + dev->features |= NETIF_F_RXCSUM; +- dev->hw_features = dev->features; ++ dev->hw_features = dev->features | NETIF_F_TSO; + + dev->priv_flags |= IFF_UNICAST_FLT; + dev->gso_max_segs = MV643XX_MAX_TSO_SEGS; diff --git a/target/linux/kirkwood/patches-4.14/201-enable-sata-port-specific-led-triggers.patch b/target/linux/kirkwood/patches-4.14/201-enable-sata-port-specific-led-triggers.patch new file mode 100644 index 000000000..c1645367a --- /dev/null +++ b/target/linux/kirkwood/patches-4.14/201-enable-sata-port-specific-led-triggers.patch @@ -0,0 +1,10 @@ +--- a/arch/arm/mach-mvebu/Kconfig ++++ b/arch/arm/mach-mvebu/Kconfig +@@ -119,6 +119,7 @@ config MACH_DOVE + config MACH_KIRKWOOD + bool "Marvell Kirkwood boards" + depends on ARCH_MULTI_V5 ++ select ARCH_WANT_LIBATA_LEDS + select CPU_FEROCEON + select GPIOLIB + select KIRKWOOD_CLK diff --git a/target/linux/mvebu/patches-4.9/100-find_active_root.patch b/target/linux/kirkwood/patches-4.14/202-linksys-find-active-root.patch similarity index 87% rename from target/linux/mvebu/patches-4.9/100-find_active_root.patch rename to target/linux/kirkwood/patches-4.14/202-linksys-find-active-root.patch index 216af28c8..860d7b072 100644 --- a/target/linux/mvebu/patches-4.9/100-find_active_root.patch +++ b/target/linux/kirkwood/patches-4.14/202-linksys-find-active-root.patch @@ -2,7 +2,7 @@ The WRT1900AC among other Linksys routers uses a dual-firmware layout. Dynamically rename the active partition to "ubi". Signed-off-by: Imre Kaloz - +--- --- a/drivers/mtd/ofpart.c +++ b/drivers/mtd/ofpart.c @@ -25,6 +25,8 @@ static bool node_has_compatible(struct d @@ -14,15 +14,15 @@ Signed-off-by: Imre Kaloz static int parse_fixed_partitions(struct mtd_info *master, const struct mtd_partition **pparts, struct mtd_part_parser_data *data) -@@ -33,6 +35,7 @@ static int parse_fixed_partitions(struct +@@ -32,6 +34,7 @@ static int parse_fixed_partitions(struct + struct mtd_partition *parts; struct device_node *mtd_node; struct device_node *ofpart_node; - const char *partname; + const char *owrtpart = "ubi"; + const char *partname; struct device_node *pp; int nr_parts, i, ret = 0; - bool dedicated = true; -@@ -110,9 +113,13 @@ static int parse_fixed_partitions(struct +@@ -110,9 +113,15 @@ static int parse_fixed_partitions(struct parts[i].size = of_read_number(reg + a_cells, s_cells); parts[i].of_node = pp; @@ -33,13 +33,15 @@ Signed-off-by: Imre Kaloz + partname = owrtpart; + } else { + partname = of_get_property(pp, "label", &len); ++ + if (!partname) + partname = of_get_property(pp, "name", &len); + } ++ parts[i].name = partname; if (of_get_property(pp, "read-only", &len)) -@@ -220,6 +227,18 @@ static int __init ofpart_parser_init(voi +@@ -219,6 +228,18 @@ static int __init ofpart_parser_init(voi return 0; } diff --git a/target/linux/kirkwood/patches-4.9/101-iconnect.patch b/target/linux/kirkwood/patches-4.9/101-iconnect.patch index 20fb0c8c5..17705eae1 100644 --- a/target/linux/kirkwood/patches-4.9/101-iconnect.patch +++ b/target/linux/kirkwood/patches-4.9/101-iconnect.patch @@ -1,6 +1,15 @@ --- a/arch/arm/boot/dts/kirkwood-iconnect.dts +++ b/arch/arm/boot/dts/kirkwood-iconnect.dts -@@ -145,28 +145,23 @@ +@@ -15,8 +15,6 @@ + chosen { + bootargs = "console=ttyS0,115200n8 earlyprintk"; + stdout-path = &uart0; +- linux,initrd-start = <0x4500040>; +- linux,initrd-end = <0x4800000>; + }; + + ocp@f1000000 { +@@ -145,28 +143,23 @@ status = "okay"; partition@0 { diff --git a/target/linux/kirkwood/patches-4.9/202-linksys-find-active-root.patch b/target/linux/kirkwood/patches-4.9/202-linksys-find-active-root.patch index cb705e60c..f4156be4d 100644 --- a/target/linux/kirkwood/patches-4.9/202-linksys-find-active-root.patch +++ b/target/linux/kirkwood/patches-4.9/202-linksys-find-active-root.patch @@ -11,10 +11,10 @@ Signed-off-by: Imre Kaloz +static int mangled_rootblock; + - static int parse_ofpart_partitions(struct mtd_info *master, - const struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -@@ -32,6 +34,7 @@ static int parse_ofpart_partitions(struc + static int parse_fixed_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +@@ -32,6 +34,7 @@ static int parse_fixed_partitions(struct struct mtd_partition *parts; struct device_node *mtd_node; struct device_node *ofpart_node; @@ -22,7 +22,7 @@ Signed-off-by: Imre Kaloz const char *partname; struct device_node *pp; int nr_parts, i, ret = 0; -@@ -110,9 +113,15 @@ static int parse_ofpart_partitions(struc +@@ -110,9 +113,15 @@ static int parse_fixed_partitions(struct parts[i].size = of_read_number(reg + a_cells, s_cells); parts[i].of_node = pp; diff --git a/target/linux/lantiq/ase/config-default b/target/linux/lantiq/ase/config-4.14 similarity index 96% rename from target/linux/lantiq/ase/config-default rename to target/linux/lantiq/ase/config-4.14 index b80250902..cf27a148b 100644 --- a/target/linux/lantiq/ase/config-default +++ b/target/linux/lantiq/ase/config-4.14 @@ -3,6 +3,7 @@ CONFIG_CPU_MIPS32_R1=y # CONFIG_CPU_MIPS32_R2 is not set CONFIG_CPU_MIPSR1=y CONFIG_CRC16=y +CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_DEFLATE=y CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_FIRMWARE_MEMMAP=y diff --git a/target/linux/lantiq/ase/config-4.9 b/target/linux/lantiq/ase/config-4.9 new file mode 100644 index 000000000..0dfd21436 --- /dev/null +++ b/target/linux/lantiq/ase/config-4.9 @@ -0,0 +1,24 @@ +CONFIG_ADM6996_PHY=y +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +CONFIG_CPU_MIPSR1=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +# CONFIG_ISDN is not set +# CONFIG_LBDAF is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_NLS=y +# CONFIG_PSB6970_PHY is not set +# CONFIG_RTL8366_SMI is not set +CONFIG_SOC_AMAZON_SE=y +# CONFIG_SOC_XWAY is not set +CONFIG_USB=y +CONFIG_USB_COMMON=y +# CONFIG_USB_EHCI_HCD is not set +CONFIG_USB_SUPPORT=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/lantiq/base-files/lib/upgrade/platform.sh b/target/linux/lantiq/base-files/lib/upgrade/platform.sh index 77b3868dc..2e58cb799 100755 --- a/target/linux/lantiq/base-files/lib/upgrade/platform.sh +++ b/target/linux/lantiq/base-files/lib/upgrade/platform.sh @@ -5,23 +5,15 @@ platform_check_image() { return 0 } -platform_pre_upgrade() { +platform_do_upgrade() { local board=$(board_name) case "$board" in bt,homehub-v2b|bt,homehub-v3a|bt,homehub-v5a|zyxel,p-2812hnu-f1|zyxel,p-2812hnu-f3) nand_do_upgrade $1 ;; + *) + default_do_upgrade "$ARGV" + ;; esac } - -# use default for platform_do_upgrade() - -disable_watchdog() { - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} -append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/ramips/mt7620nand/config-4.14 b/target/linux/lantiq/config-4.14 similarity index 71% rename from target/linux/ramips/mt7620nand/config-4.14 rename to target/linux/lantiq/config-4.14 index 0c5b07aa4..063f2ba3e 100644 --- a/target/linux/ramips/mt7620nand/config-4.14 +++ b/target/linux/lantiq/config-4.14 @@ -21,22 +21,16 @@ CONFIG_ARCH_USE_QUEUED_RWLOCKS=y CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y # CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_AT803X_PHY=y -CONFIG_BLK_MQ_PCI=y +# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_CEVT_R4K=y -CONFIG_CEVT_SYSTICK_QUIRK=y CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKEVT_RT3352=y -CONFIG_CLKSRC_MMIO=y CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_CPU_BIG_ENDIAN=y CONFIG_CPU_GENERIC_DUMP_TLB=y CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_RIXI=y CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_MIPS32=y # CONFIG_CPU_MIPS32_R1 is not set CONFIG_CPU_MIPS32_R2=y @@ -47,24 +41,19 @@ CONFIG_CPU_R4K_FPU=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y -CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_WORKQUEUE=y CONFIG_CSRC_R4K=y -CONFIG_DEBUG_PINCTRL=y CONFIG_DMA_NONCOHERENT=y # CONFIG_DMA_NOOP_OPS is not set # CONFIG_DMA_VIRT_OPS is not set # CONFIG_DRM_LIB_RANDOM is not set -# CONFIG_DTB_MT7620A_EVAL is not set -# CONFIG_DTB_OMEGA2P is not set -CONFIG_DTB_RT_NONE=y -# CONFIG_DTB_VOCORE2 is not set CONFIG_DTC=y +# CONFIG_DT_EASY50712 is not set CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y CONFIG_EXPORTFS=y CONFIG_FIXED_PHY=y CONFIG_FUTEX_PI=y @@ -75,6 +64,7 @@ CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_IO=y CONFIG_GENERIC_IRQ_CHIP=y CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_IPI=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PHY=y @@ -82,8 +72,8 @@ CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GPIOLIB=y -# CONFIG_GPIO_MT7621 is not set -CONFIG_GPIO_RALINK=y +CONFIG_GPIO_MM_LANTIQ=y +CONFIG_GPIO_STP_XWAY=y CONFIG_GPIO_SYSFS=y # CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y @@ -128,26 +118,33 @@ CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HZ=250 +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y CONFIG_HZ_PERIODIC=y -CONFIG_ICPLUS_PHY=y CONFIG_INITRAMFS_SOURCE="" CONFIG_IRQCHIP=y CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_INTC=y CONFIG_IRQ_MIPS_CPU=y CONFIG_IRQ_WORK=y +CONFIG_LANTIQ=y +CONFIG_LANTIQ_DT_NONE=y +CONFIG_LANTIQ_ETOP=y +CONFIG_LANTIQ_WDT=y +# CONFIG_LANTIQ_XRX200 is not set +CONFIG_LEDS_GPIO=y CONFIG_LIBFDT=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y CONFIG_MDIO_BUS=y CONFIG_MDIO_DEVICE=y +CONFIG_MFD_CORE=y CONFIG_MFD_SYSCON=y CONFIG_MIPS=y CONFIG_MIPS_ASID_BITS=8 CONFIG_MIPS_ASID_SHIFT=0 CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set # CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set # CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set CONFIG_MIPS_CMDLINE_FROM_DTB=y @@ -155,74 +152,71 @@ CONFIG_MIPS_CMDLINE_FROM_DTB=y # CONFIG_MIPS_HUGE_TLB_SUPPORT is not set CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_MIPS_MACHINE is not set -CONFIG_MIPS_NO_APPENDED_DTB=y -# CONFIG_MIPS_RAW_APPENDED_DTB is not set +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y CONFIG_MIPS_SPRAM=y +# CONFIG_MIPS_VPE_LOADER is not set CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MT7621_WDT is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_NAND_MT7620=y -# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_GEOMETRY=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_LANTIQ=y +CONFIG_MTD_M25P80=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BRNIMAGE_FW=y +CONFIG_MTD_SPLIT_EVA_FW=y CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_TPLINK_FW=y CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_PER_CPU_KM=y -CONFIG_NET_MEDIATEK_GSW_MT7620=y -CONFIG_NET_MEDIATEK_MDIO=y -CONFIG_NET_MEDIATEK_MDIO_MT7620=y -CONFIG_NET_MEDIATEK_MT7620=y -# CONFIG_NET_MEDIATEK_RT3050 is not set -CONFIG_NET_MEDIATEK_SOC=y -CONFIG_NET_VENDOR_MEDIATEK=y CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y # CONFIG_NO_IOPORT_MAP is not set CONFIG_OF=y CONFIG_OF_ADDRESS=y -CONFIG_OF_ADDRESS_PCI=y CONFIG_OF_EARLY_FLATTREE=y CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y CONFIG_OF_MDIO=y CONFIG_OF_NET=y -CONFIG_OF_PCI=y -CONFIG_OF_PCI_IRQ=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y CONFIG_PCI_DRIVERS_LEGACY=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y -CONFIG_PHY_RALINK_USB=y +CONFIG_PHY_LANTIQ_RCU_USB2=y CONFIG_PINCTRL=y -CONFIG_PINCTRL_RT2880=y +CONFIG_PINCTRL_LANTIQ=y # CONFIG_PINCTRL_SINGLE is not set -CONFIG_RALINK=y -CONFIG_RALINK_WDT=y +CONFIG_PINCTRL_XWAY=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_PSB6970_PHY=y # CONFIG_RCU_NEED_SEGCBLIST is not set # CONFIG_RCU_STALL_COMMON is not set CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_LANTIQ=y +CONFIG_RTL8366RB_PHY=y +CONFIG_RTL8366_SMI=y # CONFIG_SCHED_INFO is not set # CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250_FSL is not set -CONFIG_SERIAL_8250_RT288X=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SOC_MT7620=y -# CONFIG_SOC_MT7621 is not set -# CONFIG_SOC_RT288X is not set -# CONFIG_SOC_RT305X is not set -# CONFIG_SOC_RT3883 is not set +# CONFIG_SENSORS_LTQ_CPUTEMP is not set +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_LANTIQ=y +# CONFIG_SOC_AMAZON_SE is not set +# CONFIG_SOC_FALCON is not set +CONFIG_SOC_TYPE_XWAY=y +CONFIG_SOC_XWAY=y +CONFIG_SPI=y +CONFIG_SPI_LANTIQ_SSC=y +CONFIG_SPI_MASTER=y CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y CONFIG_SWPHY=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_SYS_HAS_CPU_MIPS32_R1=y @@ -230,20 +224,11 @@ CONFIG_SYS_HAS_CPU_MIPS32_R2=y CONFIG_SYS_HAS_EARLY_PRINTK=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_MULTITHREADING=y CONFIG_THIN_ARCHIVES=y CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y CONFIG_TINY_SRCU=y -CONFIG_UBIFS_ATIME_SUPPORT=y -CONFIG_UBIFS_FS=y -CONFIG_UBIFS_FS_ADVANCED_COMPR=y -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_USB_SUPPORT=y CONFIG_USE_OF=y -CONFIG_WATCHDOG_CORE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y +# CONFIG_XRX200_PHY_FW is not set diff --git a/target/linux/lantiq/falcon/config-4.14 b/target/linux/lantiq/falcon/config-4.14 new file mode 100644 index 000000000..84b36d006 --- /dev/null +++ b/target/linux/lantiq/falcon/config-4.14 @@ -0,0 +1,12 @@ +# CONFIG_MFD_CORE is not set +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_SPLIT_FIRMWARE_NAME="linux" +CONFIG_PINCTRL_FALCON=y +# CONFIG_PSB6970_PHY is not set +# CONFIG_RESET_LANTIQ is not set +# CONFIG_RTL8366_SMI is not set +CONFIG_SOC_FALCON=y +# CONFIG_SOC_TYPE_XWAY is not set +# CONFIG_SOC_XWAY is not set +CONFIG_SPI_FALCON=y diff --git a/target/linux/lantiq/falcon/config-default b/target/linux/lantiq/falcon/config-4.9 similarity index 100% rename from target/linux/lantiq/falcon/config-default rename to target/linux/lantiq/falcon/config-4.9 diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ACMP252.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ACMP252.dts new file mode 100644 index 000000000..5e1f27160 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ACMP252.dts @@ -0,0 +1,114 @@ +/dts-v1/; + +#include "danube.dtsi" + +/ { + compatible = "audiocodes,mp-252", "lantiq,xway", "lantiq,danube"; + model = "AudioCodes MediaPack MP-252"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + }; + pci { + lantiq,groups = "gnt1", "req1"; + lantiq,function = "pci"; + }; + }; +}; + +&gsw { + phy-mode = "rmii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "uboot_env"; + reg = <0x20000 0x20000>; + }; + + partition@40000 { + label = "boardconfig"; + reg = <0x40000 0x60000>; + read-only; + }; + + partition@a0000 { + label = "firmware"; + reg = <0xa0000 0xf20000>; + }; + + partition@fc0000 { + label = "sysconfig"; + reg = <0xfc0000 0x40000>; + }; + + partition@0x1000000 { + label = "rootfs_data"; + reg = <0x1000000 0x1000000>; + }; + }; + }; +}; + +&pci0 { + status = "okay"; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ALL0333CJ.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ALL0333CJ.dts new file mode 100644 index 000000000..0d128e038 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ALL0333CJ.dts @@ -0,0 +1,116 @@ +/dts-v1/; + +#include "amazonse.dtsi" + +/ { + compatible = "allnet,all0333cj", "lantiq,xway", "lantiq,ase"; + model = "Allnet ALL0333CJ DSL Modem"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + + led-dsl = &dsl; + led-internet = &online_green; + }; + + }; + + memory@0 { + reg = <0x0 0x1000000>; + }; + + gpio-leds { + compatible = "gpio-leds"; + + /* power led: red=off, green=on */ + power: power { + label = "all0333cj:green:power"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + lan: lan { + label = "all0333cj:green:lan"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + + dsl: dsl { + label = "all0333cj:green:dsl"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; + + online_green: online { + label = "all0333cj:green:online"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + online_red { + label = "all0333cj:red:online"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + asc { + lantiq,groups = "asc"; + lantiq,function = "asc"; + }; + keys_in { + lantiq,pins = "io0",/* "io25", */"io29"; + lantiq,pull = <2>; + lantiq,open-drain = <1>; + }; + }; +}; + +&gsw { + phy-mode = "mii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x400000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + read-only; + }; + + partition@10000 { + label = "firmware"; + reg = <0x10000 0x3ef200>; + }; + + partition@3ff200 { + label = "uboot_env"; + reg = <0x3ff200 0xc00>; + read-only; + }; + + partition@3ffe00 { + label = "dummy_bits"; + reg = <0x3ffe00 0x200>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4510PW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4510PW.dts new file mode 100644 index 000000000..0d0b70c68 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4510PW.dts @@ -0,0 +1,229 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv4510pw", "lantiq,xway", "lantiq,danube"; + model = "Wippies, Elisa"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power2; + led-running = &power; + + led-dsl = &adsl; + led-internet = &internet; + led-usb = &led_usb; + led-usb2 = &led_usb2; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + wps { + label = "wps"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power: power { + label = "power"; + gpios = <&gpios 21 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + power2: power2 { + label = "power2"; + gpios = <&gpios 20 GPIO_ACTIVE_HIGH>; + }; + lan1 { + label = "lan1"; + gpios = <&gpios 19 GPIO_ACTIVE_HIGH>; + }; + lan2 { + label = "lan2"; + gpios = <&gpios 18 GPIO_ACTIVE_HIGH>; + }; + lan3 { + label = "lan3"; + gpios = <&gpios 17 GPIO_ACTIVE_HIGH>; + }; + lan4 { + label = "lan4"; + gpios = <&gpios 16 GPIO_ACTIVE_HIGH>; + }; + wifi: wifi { + label = "wifi"; + gpios = <&gpios 15 GPIO_ACTIVE_HIGH>; + }; + adsl: adsl { + label = "adsl"; + gpios = <&gpios 14 GPIO_ACTIVE_HIGH>; + }; + internet: internet { + label = "internet"; + gpios = <&gpios 13 GPIO_ACTIVE_HIGH>; + }; + internet2 { + label = "internet2"; + gpios = <&gpios 12 GPIO_ACTIVE_HIGH>; + }; + voip { + label = "voip"; + gpios = <&gpios 11 GPIO_ACTIVE_HIGH>; + }; + phone { + label = "phone"; + gpios = <&gpios 10 GPIO_ACTIVE_HIGH>; + }; + phone2 { + label = "phone2"; + gpios = <&gpios 9 GPIO_ACTIVE_HIGH>; + }; + led_usb: usb { + label = "usb"; + gpios = <&gpios 8 GPIO_ACTIVE_HIGH>; + }; + led_usb2: usb2 { + label = "usb2"; + gpios = <&gpios 7 GPIO_ACTIVE_HIGH>; + }; + usb3 { + label = "usb3"; + gpios = <&gpios 6 GPIO_ACTIVE_HIGH>; + }; + unlabeled { + label = "unlabeled"; + gpios = <&gpios 5 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu a23"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + exin { + lantiq,groups = "exin1", "exin2"; + lantiq,function = "exin"; + lantiq,output = <0>; + }; + pci_in { + lantiq,groups = "req1", "req2"; + lantiq,function = "pci"; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1", "gnt2"; + lantiq,function = "pci"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + buttons { + lantiq,pins = "io3", "io14"; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + }; +}; + +&gpios { + status = "okay"; + lantiq,groups = <0x7>; +}; + +&gsw { + phy-mode = "rmii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x1000000>; + #address-cells = <1>; + #size-cells = <1>; + + lantiq,noxip; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@40000 { + label = "uboot_env"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "firmware"; + reg = <0x60000 0xfa0000>; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + interrupt-map = < + 0x6000 0 0 1 &icu0 135 + 0x7800 0 0 1 &icu0 66 + 0x7800 0 0 2 &icu0 66 + 0x7800 0 0 3 &icu0 66 + >; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + req-mask = <0x7>; +}; + +&vmmc { + status = "okay"; +}; diff --git a/target/linux/lantiq/dts/ARV4518PWR01.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01.dts similarity index 100% rename from target/linux/lantiq/dts/ARV4518PWR01.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01.dts diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01.dtsi new file mode 100644 index 000000000..458a38753 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01.dtsi @@ -0,0 +1,205 @@ +#include "danube.dtsi" + +#include + +/ { + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + + led-dsl = &dsl; + led-internet = &online; + led-usb = &led_usb; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + ath5k_eep { + compatible = "ath5k,eeprom"; + ath,eep-flash = <&boardconfig 0x400>; + ath,mac-offset = <0x16>; + ath,mac-increment = <1>; + ath,eep-swap; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power: power { + label = "power"; + gpios = <&gpio 3 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + dsl: dsl { + label = "dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + online: online { + label = "online"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "wifi"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + wps { + label = "wps"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + dsl2 { + label = "dsl2"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "usb"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + voice { + label = "voice"; + gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>; + }; + fxs1 { + label = "fxs1"; + gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>; + }; + fxs2 { + label = "fxs2"; + gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>; + }; + fxo { + label = "fxo"; + gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + pci_in { + lantiq,groups = "req1", "req2"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1", "gnt2"; + lantiq,function = "pci"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; +}; + +&gpiomm { + status = "okay"; + lantiq,shadow = <0x0>; +}; + +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; /* 64 KB */ + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; /* 64 KB */ + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x3d0000>; + }; + + boardconfig: partition@400000 { + label = "boardconfig"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + req-mask = <0xf>; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01A.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01A.dts new file mode 100644 index 000000000..9617398bb --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4518PWR01A.dts @@ -0,0 +1,12 @@ +/dts-v1/; + +#include "ARV4518PWR01.dtsi" + +/ { + compatible = "arcadyan,arv4518pwr01a", "lantiq,xway", "lantiq,danube"; + model = "SMC7908A-ISP, Airties WAV-221"; +}; + +&pci0 { + lantiq,external-clock; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4519PW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4519PW.dts new file mode 100644 index 000000000..5733d2ce1 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4519PW.dts @@ -0,0 +1,202 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv4519pw", "lantiq,xway", "lantiq,danube"; + model = "Vodafone Netfaster IAD 2, Pirelli P.RG A4201G"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &internet_green; + led-usb = &led_usb; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_green: power { + label = "arv4519pw:green:power"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power2 { + label = "arv4519pw:red:power"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv4519pw:green:wlan"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "arv4519pw:green:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + internet_green: online { + label = "arv4519pw:green:internet"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + online2 { + label = "arv4519pw:red:internet"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "arv4519pw:green:usb"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + voip { + label = "arv4519pw:green:voip"; + gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>; + }; + fxs1 { + label = "arv4519pw:green:phone1"; + gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>; + }; + fxs2 { + label = "arv4519pw:green:phone2"; + gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>; + }; + fxo { + label = "arv4519pw:green:line"; + gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>; + }; + wps2 { + label = "arv4519pw:green:wps"; + gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>; + }; + wps { + label = "arv4519pw:orange:wps"; + gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>; + }; + wps3 { + label = "arv4519pw:red:wps"; + gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + }; +}; + +&gpiomm { + status = "okay"; + lantiq,shadow = <0x400>; +}; + +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x3d0000>; + }; + + boardconfig: partition@3f0000 { + label = "boardconfig"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + req-mask = <0xf>; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4520PW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4520PW.dts new file mode 100644 index 000000000..aa4269305 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4520PW.dts @@ -0,0 +1,227 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv4520pw", "lantiq,xway", "lantiq,danube"; + model = "Easybox 800, WAV-281"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_blue; + led-failsafe = &power_red; + led-running = &power_blue; + + led-dsl = &dsl; + led-internet = &internet_blue; + led-usb = &led_usb; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "wps"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_blue: power { + label = "arv4520pw:blue:power"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + dsl: dsl { + label = "arv4520pw:blue:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + internet_blue: internet { + label = "arv4520pw:blue:internet"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + power_red: power2 { + label = "arv4520pw:red:power"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + wps { + label = "arv4520pw:yellow:wps"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + wps2 { + label = "arv4520pw:red:wps"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + /* + wps green is missing + */ + fxs1 { + label = "arv4520pw:blue:telefon1"; + gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>; + }; + fxs2 { + label = "arv4520pw:blue:telefon2"; + gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>; + }; + isdn { + label = "arv4520pw:blue:isdn"; + gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>; + }; + fxo { + label = "arv4520pw:blue:line"; + gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>; + }; + voice { + label = "arv4520pw:blue:sprache"; + gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "arv4520pw:blue:usb"; + gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv4520pw:blue:wifi"; + gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>; + }; + internet2 { + label = "arv4520pw:red:internet"; + gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>; + }; + /* + info is missing + */ + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 28 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + }; +}; + +&gpiomm { + status = "okay"; + lantiq,shadow = <0x400>; +}; + +&gsw { + /* gpiomm 10 - switch */ + phy-mode = "rmii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x20000>; + read-only; + }; + + partition@20000 { + label = "uboot_env"; + reg = <0x20000 0x10000>; + read-only; + }; + + partition@30000 { + label = "firmware"; + reg = <0x30000 0x3c0000>; + }; + + boardconfig: partition@7f0000 { + label = "boardconfig"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH + &gpiomm 7 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4525PW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4525PW.dts new file mode 100644 index 000000000..b3904d37d --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV4525PW.dts @@ -0,0 +1,162 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv4525pw", "lantiq,xway", "lantiq,danube"; + model = "Speedport W501V Typ A"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + /* we dont have a power led, lets use the online led */ + led-boot = &online; + led-failsafe = &online; + + led-dsl = &dsl; + led-internet = &online; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + ath5k_eep { + compatible = "ath5k,eeprom"; + ath,eep-flash = <&boardconfig 0x400>; + ath,mac-offset = <0x0>; + ath,eep-swap; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + wps { + label = "wps"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + fxo { + label = "arv4525pw:green:festnetz"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + fxs { + label = "arv4525pw:green:internet"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "arv4525pw:green:t-dsl"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv4525pw:green:wlan"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + online: online { + label = "arv4525pw:green:online"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + relay { + lantiq,pins = "io31"; + lantiq,output = <1>; + }; + }; +}; + +/* #define ARV4525PW_PHYRESET 13 */ +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x3d0000>; + }; + + boardconfig: partition@400000 { + label = "boardconfig"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +/* #define ARV4525PW_RELAY 31 */ +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV452CQW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV452CQW.dts new file mode 100644 index 000000000..1e1183d1b --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV452CQW.dts @@ -0,0 +1,245 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv452cqw", "lantiq,xway", "lantiq,danube"; + model = "Arcor 801"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_blue; + led-failsafe = &power_red; + led-running = &power_blue; + + led-dsl = &dsl_blue; + led-usb = &led_usb; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + ath5k_eep { + compatible = "ath5k,eeprom"; + ath,eep-flash = <&boardconfig 0x400>; + ath,mac-offset = <0x0>; + ath,eep-swap; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power_blue: power0 { + label = "arv452cqw:blue:power"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + dsl_blue: dsl { + label = "arv452cqw:blue:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + isdn { + label = "arv452cqw:blue:isdn"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + power_red: power1 { + label = "arv452cqw:red:power"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + wps { + label = "arv452cqw:blue:wps"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + wps1 { + label = "arv452cqw:yellow:wps"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + fxs1 { + label = "arv452cqw:blue:telefon1"; + gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>; + }; + fxs2 { + label = "arv452cqw:blue:telefon2"; + gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>; + }; + wps2 { + label = "arv452cqw:red:wps"; + gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>; + }; + fxo { + label = "arv452cqw:blue:line"; + gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>; + }; + voice { + label = "arv452cqw:blue:sprache"; + gpios = <&gpiomm 4 1>; + }; + led_usb: usb { + label = "arv452cqw:blue:usb"; + gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv452cqw:blue:wlan"; + gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>; + }; + /* + internet blue and internet red are missing + dsl2 and dsl3 are not referenced in manual + */ + dsl2 { + label = "arv452cqw:yellow:dsl"; + gpios = <&gpiomm 8 GPIO_ACTIVE_LOW>; + }; + dsl3 { + label = "arv452cqw:red:dsl"; + gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 28 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + leds { + lantiq,pins = "io3", "io5", "io6", "io7", "io9"; + lantiq,output = <1>; + }; + }; +}; + +&gpiomm { + status = "okay"; + lantiq,shadow = <0x77f>; +}; + +/* +#define ARV452CPW_SWITCH_RESET 110 +*/ +&gsw { + phy-mode = "rmii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x400000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x3d0000>; + }; + + boardconfig: partition@3f0000 { + label = "boardconfig"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH + &gpiomm 7 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7506PW11.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7506PW11.dts new file mode 100644 index 000000000..0c251c61f --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7506PW11.dts @@ -0,0 +1,163 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv7506pw11", "lantiq,xway", "lantiq,danube"; + model = "Alice/O2 IAD 4421"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power_red; + led-running = &power; + + led-dsl = &dsl; + led-internet = &internet; + led-wifi = &wlan; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + wlan: wlan { + label = "arv7506pw11:green:wlan"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + power: power { + label = "arv7506pw11:green:power"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + dsl: dsl { + label = "arv7506pw11:green:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + internet: internet { + label = "arv7506pw11:green:internet"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + power_red: power_red { + label = "arv7506pw11:red:power"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + internet_red { + label = "arv7506pw11:red:internet"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + info { + label = "arv7506pw11:green:info"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + telefon { + label = "arv7506pw11:green:telefon"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + info_red { + label = "arv7506pw11:red:info"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + pci { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + }; +}; + +/* GPIO 19: switch reset */ +&gsw { + phy-mode = "rmii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@40000 { + label = "uboot_env"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "firmware"; + reg = <0x50000 0x7a0000>; + }; + + boardconfig: partition@7f0000 { + label = "board_config"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@1814,3592 { + compatible = "pci1814,3592"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + ralink,mtd-eeprom-swap; + mtd-mac-address = <&boardconfig 0x16>; + mtd-mac-address-increment = <1>; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7510PW22.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7510PW22.dts new file mode 100644 index 000000000..337f969b3 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7510PW22.dts @@ -0,0 +1,208 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv7510pw22", "lantiq,xway", "lantiq,danube"; + model = "Astoria Networks ARV7510PW22"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + + led-dsl = &internet; + led-usb = &umts; + led-wifi = &wlan; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + restart { + label = "restart"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power: power { + label = "power"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + internet: internet { + label = "internet"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + wlan: wlan { + label = "wlan"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + }; + umts: 3g { + label = "3g"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + message { + label = "message"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_in { + lantiq,groups = "req1", "req2"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + pins_out { + lantiq,pins = "io2", "io4", "io8", "io9", "io10", "io15", "io20"; + lantiq,output = <1>; + }; + pins_in { + lantiq,pins = "io11", "io12", "io28"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gsw { + /* Switch reset 19 */ + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x1000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@40000 { + label = "uboot_env"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "firmware"; + reg = <0x60000 0xf80000>; + }; + + boardconfig: partition@fe0000 { + label = "board_config"; + reg = <0xfe0000 0x20000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + interrupt-map = < + 0x7000 0 0 1 &icu0 30 + 0x7800 0 0 1 &icu0 135 + 0x7800 0 0 2 &icu0 135 + 0x7800 0 0 3 &icu0 135 + >; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + req-mask = <0x3>; + + wifi@1814,3592 { + compatible = "pci1814,3592"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + ralink,mtd-eeprom-swap; + }; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 9 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7518PW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7518PW.dts new file mode 100644 index 000000000..1d6f404ee --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7518PW.dts @@ -0,0 +1,239 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv7518pw", "lantiq,xway", "lantiq,danube"; + model = "Astoria Networks ARV7518PW"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &online_green; + led-usb = &led_usb; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power_green: power { + label = "arv7518pw:green:power"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + dsl: dsl { + label = "arv7518pw:green:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + online_green: online { + label = "arv7518pw:green:internet"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv7518pw:green:wlan"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + power_red: power2 { + label = "arv7518pw:red:power"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + online2 { + label = "arv7518pw:red:internet"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "arv7518pw:green:usb"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + voice { + label = "arv7518pw:green:voip"; + gpios = <&gpiomm 0 GPIO_ACTIVE_LOW>; + }; + fxs1 { + label = "arv7518pw:green:phone1"; + gpios = <&gpiomm 1 GPIO_ACTIVE_LOW>; + }; + fxs2 { + label = "arv7518pw:green:phone2"; + gpios = <&gpiomm 2 GPIO_ACTIVE_LOW>; + }; + unlabeled { + label = "arv7518pw:amber:unlabeled"; + gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>; + }; + wps { + label = "arv7518pw:amber:wps"; + gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>; + }; + wps2 { + label = "arv7518pw:green:wps"; + gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>; + }; + wps3 { + label = "arv7518pw:red:wps"; + gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + leds { + lantiq,pins = "io2", "io4", "io5", "io6", "io7", "io8", "io19"; + lantiq,output = <1>; + }; + keys { + lantiq,pins = "io28", "io30"; + lantiq,output = <0>; + lantiq,pull = <2>; + lantiq,open-drain = <1>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpiomm { + status = "okay"; + lantiq,shadow = <0x0>; +}; + +/* +#define SWITCH_RESET 13 +*/ +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x7d0000>; + }; + + boardconfig: partition@400000 { + label = "boardconfig"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + lantiq,external-clock; + req-mask = <0xf>; + + wifi@168c,0029 { + compatible = "pci168c,0029"; + reg = <0x7000 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ + mtd-mac-address = <&boardconfig 0x16>; + mtd-mac-address-increment = <1>; + }; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519PW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519PW.dts new file mode 100644 index 000000000..39dcf4561 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519PW.dts @@ -0,0 +1,228 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv7519pw", "lantiq,xway", "lantiq,danube"; + model = "Astoria Networks ARV7519PW"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power2; + led-running = &power; + + led-dsl = &dsl; + led-internet = &online; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power: power { + label = "power"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power2: power2 { + label = "power2"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + online: online { + label = "online"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + online2 { + label = "online2"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "wifi"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + wifi2 { + label = "wifi2"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + }; + wifi3 { + label = "wifi3"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + voice { + label = "voice"; + gpios = <&gpio 31 GPIO_ACTIVE_LOW>; + }; + wps { + label = "wps"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + wps2 { + label = "wps2"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + wps3 { + label = "wps3"; + gpios = <&gpio 23 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + lan { + label = "lan"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; + tv { + label = "tv"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + upgrade { + label = "upgrade"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + }; + }; + + /* is there another way to "reserve" the GPIO? */ + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + switch { + gpio-export,name = "switch"; + gpio-export,output = <1>; + gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + switch_rst { + lantiq,pins = "io19"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + }; +}; + +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@40000 { + label = "uboot_env"; + reg = <0x40000 0x20000>; + }; + + partition@60000 { + label = "firmware"; + reg = <0x60000 0xf80000>; + }; + + boardconfig: partition@fe0000 { + label = "board_config"; + reg = <0xfe0000 0x20000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + req-mask = <0xf>; + + wifi@0,0 { + compatible = "pci0,0"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + ralink,mtd-eeprom-swap; + }; +}; + +&usb_phy { + status = "okay"; +}; + +/* warning: passive port only works with active devices */ +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519RW22.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519RW22.dts new file mode 100644 index 000000000..40607aebd --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7519RW22.dts @@ -0,0 +1,253 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "arcadyan,arv7519rw22", "lantiq,xway", "lantiq,vr9"; + model = "Orange Livebox 2.1"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_green; + led-running = &power_green; + + led-dsl = &internet_green; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + rfkill { + label = "rfkill"; + gpios = <&gpio 33 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 37 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + lan_green { + label = "arv7519rw22:green:lan"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + internet_red { + label = "arv7519rw22:red:internet"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + }; + power_green: power_green { + label = "arv7519rw22:green:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + alarm_blue { + label = "arv7519rw22:blue:alarm"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + internet_orange { + label = "arv7519rw22:orange:internet"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + internet_green: internet_green { + label = "arv7519rw22:green:internet"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + }; + voice_green { + label = "arv7519rw22:green:voice"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 32 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mtd-mac-address = <&boardconfig 0x16>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "mii"; + phy-handle = <&phy13>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "mii"; + phy-handle = <&phy14>; + }; + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "mii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <3>; + phy-mode = "mii"; + phy-handle = <&phy12>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy12: ethernet-phy@12 { + reg = <0x12>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy14: ethernet-phy@14 { + reg = <0x14>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + pcie-rst { + lantiq,pins = "io21"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x60000>; + read-only; + }; + + partition@60000 { + label = "uboot-env"; + reg = <0x60000 0x20000>; + read-only; + }; + + partition@80000 { + label = "firmware"; + reg = <0x80000 0x1f00000>; + }; + + boardconfig: partition@1f80000 { + label = "boardconfig"; + reg = <0x1f80000 0x80000>; + read-only; + }; + }; + }; +}; + +&pcie0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb_phy1 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7525PW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7525PW.dts new file mode 100644 index 000000000..425222633 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV7525PW.dts @@ -0,0 +1,151 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv7525pw", "lantiq,xway", "lantiq,danube"; + model = "Speedport W303V Typ A"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &power_green; + led-internet = &online; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + wps { + label = "wps"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power_green: power { + label = "arv7525pw:green:power"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power1 { + label = "arv7525pw:red:power"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + online: online { + label = "arv7525pw:green:online"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + voice { + label = "arv7525pw:green:telefonie"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + voice2 { + label = "arv7525pw:red:telefonie"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv7525pw:green:wlan"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + }; + pci { + lantiq,groups = "gnt1", "req1"; + lantiq,function = "pci"; + }; + }; +}; + +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x3d0000>; + }; + + boardconfig: partition@400000 { + label = "board_config"; + reg = <0x3f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + interrupt-map = <0x7000 0 0 1 &icu0 135 1>; + + wifi@0,0 { + compatible = "pci0,0"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + }; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW.dts new file mode 100644 index 000000000..7b337b4f5 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW.dts @@ -0,0 +1,245 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv752dpw", "lantiq,xway", "lantiq,danube"; + model = "Arcor 802"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_red; + led-failsafe = &power_blue; + led-running = &power_red; + + led-dsl = &internet_red; + led-usb = &umts; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + wps { + label = "wps"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + restart { + label = "restart"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + dsl { + label = "dsl"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power_blue: power1 { + label = "arv752dpw:blue:power"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + internet_red: internet { + label = "arv752dpw:red:internet"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + message { + label = "arv752dpw:red:message"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + power_red: power { + label = "arv752dpw:red:power"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + voice1 { + label = "arv752dpw:red:voice"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + umts: umts { + label = "arv752dpw:red:umts"; + gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv752dpw:red:wifi"; + gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>; + }; + fxs1 { + label = "arv752dpw:green:tae-n"; + gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>; + }; + fxs2 { + label = "arv752dpw:green:tae-u"; + gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>; + }; + fxo { + label = "arv752dpw:green:isdn"; + gpios = <&gpiomm 7 GPIO_ACTIVE_LOW>; + }; + internet2 { + label = "arv752dpw:blue:internet"; + gpios = <&gpiomm 8 GPIO_ACTIVE_LOW>; + }; + voice2 { + label = "arv752dpw:blue:voice"; + gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_in { + lantiq,groups = "req2", "req1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + leds { + lantiq,pins = "io3", "io5", "io6", "io8"; + lantiq,output = <1>; + lantiq,pull = <0>; + }; + keys { + lantiq,pins = "io11", "io12", "io13", "io28"; + lantiq,output = <0>; + lantiq,pull = <2>; + lantiq,open-drain = <1>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpiomm 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpiomm { + status = "okay"; + lantiq,shadow = <0x3>; +}; + +&gsw { + phy-mode = "rmii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x7d0000>; + }; + + boardconfig: partition@7f0000 { + label = "board_config"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + interrupt-map = <0x7000 0 0 1 &icu0 135>; + req-mask = <0x3>; + + wifi@1814,0601 { + compatible = "pci1814,0601"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + ralink,mtd-eeprom-swap; + }; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW22.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW22.dts new file mode 100644 index 000000000..feb92d4d9 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV752DPW22.dts @@ -0,0 +1,267 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv752dpw22", "lantiq,xway", "lantiq,danube"; + model = "Arcor 803"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_red; + led-failsafe = &power_blue; + led-running = &power_red; + + led-dsl = &internet_red; + led-usb = &umts; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + wps { + label = "wps"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + restart { + label = "restart"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + dsl { + label = "dsl"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power_blue: power1 { + label = "arv752dpw22:blue:power"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + internet_red: internet { + label = "arv752dpw22:red:internet"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + message { + label = "arv752dpw22:red:message"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + power_red: power { + label = "arv752dpw22:red:power"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + voice1 { + label = "arv752dpw22:red:voice"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + umts: umts { + label = "arv752dpw22:red:umts"; + gpios = <&gpiomm 3 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "arv752dpw22:red:wifi"; + gpios = <&gpiomm 4 GPIO_ACTIVE_LOW>; + }; + fxs1 { + label = "arv752dpw22:green:tae-n"; + gpios = <&gpiomm 5 GPIO_ACTIVE_LOW>; + }; + fxs2 { + label = "arv752dpw22:green:tae-u"; + gpios = <&gpiomm 6 GPIO_ACTIVE_LOW>; + }; + fxo { + label = "arv752dpw22:green:isdn"; + gpios = <&gpiomm 7 GPIO_ACTIVE_LOW>; + }; + internet2 { + label = "arv752dpw22:blue:internet"; + gpios = <&gpiomm 8 GPIO_ACTIVE_LOW>; + }; + voice2 { + label = "arv752dpw22:blue:voice"; + gpios = <&gpiomm 9 GPIO_ACTIVE_LOW>; + }; + eth1 { + label = "arv752dpw22:green:lan1"; + gpios = <&gpiomm 11 GPIO_ACTIVE_LOW>; + }; + eth2 { + label = "arv752dpw22:green:lan2"; + gpios = <&gpiomm 12 GPIO_ACTIVE_LOW>; + }; + eth3 { + label = "arv752dpw22:green:lan3"; + gpios = <&gpiomm 13 GPIO_ACTIVE_LOW>; + }; + eth4 { + label = "arv752dpw22:green:lan4"; + gpios = <&gpiomm 14 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpiomm 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + ebu { + lantiq,groups = "ebu cs1"; + lantiq,function = "ebu"; + }; + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,open-drain = <1>; + lantiq,output = <1>; + }; + leds { + lantiq,pins = "io3", "io5", "io6", "io8"; + lantiq,open-drain = <1>; + lantiq,output = <1>; + }; + buttons { + lantiq,pins = "io11", "io12", "io13", "io28"; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + }; +}; + + +&gpiomm { + status = "okay"; + lantiq,shadow = <3>; +}; + +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&boardconfig 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x30000>; + read-only; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x30000 0x10000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x40000 0x7b0000>; + }; + + boardconfig: partition@7f0000 { + label = "board_config"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,external-clock; + interrupt-map = < + 0x7000 0 0 1 &icu0 30 + 0x7800 0 0 1 &icu0 135 + 0x7800 0 0 2 &icu0 135 + 0x7800 0 0 3 &icu0 135 + >; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + req-mask = <0x3>; + + wifi@1814,3592 { + compatible = "pci1814,3592"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + ralink,mtd-eeprom-swap; + mtd-mac-address = <&boardconfig 0x16>; + }; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV8539PW22.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV8539PW22.dts new file mode 100644 index 000000000..1e39380f6 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ARV8539PW22.dts @@ -0,0 +1,191 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "arcadyan,arv8539pw22", "lantiq,xway", "lantiq,danube"; + model = "Speedport W 504V Typ A"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl_green; + led-internet = &online_green; + led-wifi = &wireless_green; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + wlan { + label = "wlan"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + /* key DECT is missing */ + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_green: power-green { + label = "arv8539pw22:green:power"; + gpios = <&gpio 24 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power-red { + label = "arv8539pw22:red:power"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + + dsl_green: dsl-green { + label = "arv8539pw22:green:dsl"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + + online_green: online-green { + label = "arv8539pw22:green:online"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + + wireless_green: wireless-green { + label = "arv8539pw22:green:wlan"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + /* + telefonie green is missing + */ + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + lantiq,output = <0>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + relay { + lantiq,pins = "io31"; + lantiq,output = <1>; + }; + }; +}; + +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&art 0x16>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x30000>; /* 192 KiB */ + read-only; + }; + + partition@30000 { + label = "uboot"; + reg = <0x30000 0x10000>; /* 64 KiB */ + read-only; + }; + + partition@40000 { + label = "firmware"; + reg = <0x40000 0x7B0000>; /* 7872 KiB */ + }; + + art: partition@7F0000 { + label = "art"; + reg = <0x7F0000 0x10000>; /* 64 KiB*/ + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@168c,0029 { + compatible = "pci168c,0029"; + reg = <0x7000 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ + mtd-mac-address = <&art 0x16>; + mtd-mac-address-increment = <1>; + }; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ASL56026.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ASL56026.dts new file mode 100644 index 000000000..9a78822be --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ASL56026.dts @@ -0,0 +1,172 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "alphanetworks,asl56026", "lantiq,xway", "lantiq,vr9"; + model = "BT OpenReach VDSL Modem"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 40 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + dsl: dsl { + label = "asl56026:green:dsl"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + + /* power-* is a bicolour led */ + power_green: power_green { + label = "asl56026:green:power"; + gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + + power_red: power_red { + label = "asl56026:red:power"; + gpios = <&gpio 18 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + power_led_blink { + gpio-export,name = "power_led_blink"; + gpio-export,output = <0>; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + lantiq,switch; + + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "mii"; + phy-handle = <&phy11>; + }; + + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <3>; + phy-mode = "mii"; + phy-handle = <&phy14>; + }; + + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + + phy14: ethernet-phy@14 { + reg = <0x14>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + }; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x0800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x30000>; + }; + + partition@30000 { + label = "uboot_env"; + reg = <0x30000 0x10000>; + }; + + partition@40000 { + label = "firmware"; + reg = <0x40000 0x750000>; + }; + + partition@790000 { + label = "ddrconfig"; + reg = <0x790000 0x70000>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV2B.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV2B.dts new file mode 100644 index 000000000..105dae408 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV2B.dts @@ -0,0 +1,262 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "bt,homehub-v2b", "lantiq,xway", "lantiq,danube"; + model = "BT Home Hub 2B"; /* SoC: Lantiq Danube-S PSB 50712 @ 333MHz V1.3/1.5 */ + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_orange; + led-failsafe = &power_red; + led-running = &power_blue; + + led-dsl = &broadband_blue; + led-wifi = &wireless_blue; + }; + + memory@0 { /* RAM: Samsung K4H511638F-LC 64MB */ + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + findhandset { + label = "findhandset"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + upgrading-orange { + label = "bthomehubv2b:orange:upgrading"; + gpios = <&gpios 5 GPIO_ACTIVE_HIGH>; + }; + + phone-orange { + label = "bthomehubv2b:orange:phone"; + gpios = <&gpios 6 GPIO_ACTIVE_HIGH>; + }; + phone-blue { + label = "bthomehubv2b:blue:phone"; + gpios = <&gpios 7 GPIO_ACTIVE_HIGH>; + }; + + wireless-orange { + label = "bthomehubv2b:orange:wireless"; + gpios = <&gpios 8 GPIO_ACTIVE_HIGH>; + }; + wireless_blue: wireless-blue { + label = "bthomehubv2b:blue:wireless"; + gpios = <&gpios 9 GPIO_ACTIVE_HIGH>; + }; + + broadband-red { + label = "bthomehubv2b:red:broadband"; + gpios = <&gpios 10 GPIO_ACTIVE_HIGH>; + }; + broadband-orange { + label = "bthomehubv2b:orange:broadband"; + gpios = <&gpios 11 GPIO_ACTIVE_HIGH>; + }; + broadband_blue: broadband-blue { + label = "bthomehubv2b:blue:broadband"; + gpios = <&gpios 12 GPIO_ACTIVE_HIGH>; + }; + + power_red: power-red { + label = "bthomehubv2b:red:power"; + gpios = <&gpios 13 GPIO_ACTIVE_HIGH>; + }; + power_orange: power-orange { + label = "bthomehubv2b:orange:power"; + gpios = <&gpios 14 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + power_blue: power-blue { + label = "bthomehubv2b:blue:power"; + gpios = <&gpios 15 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + nand_out { + lantiq,groups = "nand cle", "nand ale"; + lantiq,function = "ebu"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + nand_cs1 { + lantiq,groups = "nand cs1"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + }; + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + }; + + btn_in { + lantiq,pins = "io2", "io15", "io22"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + }; +}; + +&gpios { + status = "okay"; +}; + +&gsw { + phy-mode = "rmii"; +}; + +&localbus { + nor@0 { /* NOR Flash: Spansion S29AL004D 512KB */ + compatible = "lantiq,nor"; /* "AMD AM29LV400BB" compatible on 3.3.8 */ + lantiq,cs = <0>; + bank-width = <2>; + reg = <0 0x0 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; /* 256KB */ + }; + + partition@40000 { + label = "uboot_env"; + reg = <0x40000 0x10000>; /* 64KB */ + }; + + partition@50000 { + label = "rg_conf_1"; + reg = <0x50000 0x10000>; + }; + + partition@60000 { + label = "rg_conf_2"; + reg = <0x60000 0x10000>; + }; + + partition@70000 { + label = "rg_conf_factory"; + reg = <0x70000 0x10000>; + }; + }; + }; + + nand@1 { /* NAND Flash: Samsung K9F5608U0D-JIB0 32MB */ + compatible = "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <1 0x0 0x2000000 >; + #address-cells = <1>; + #size-cells = <1>; + req-mask = <0x1>; /* PCI request lines to mask during NAND access */ + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + ath9k_cal: partition@0 { + label = "art"; /* Atheros 9160 wifi b/g/n radio EEPROM */ + reg = <0x00000 0x4000>; + read-only; + }; + + partition@4000 { + label = "kernel"; + reg = <0x4000 0x200000>; + }; + + partition@164000 { + label = "ubi"; + reg = <0x204000 0x1DFC000>; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@168c,0027 { + compatible = "pci168c,0027"; + reg = <0x7000 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ + }; +}; + +&usb_phy { + status = "okay"; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 31 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV3A.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV3A.dts new file mode 100644 index 000000000..6bba7e420 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV3A.dts @@ -0,0 +1,215 @@ +/dts-v1/; + +#include "ar9.dtsi" + +#include + +/ { + compatible = "bt,homehub-v3a", "lantiq,xway", "lantiq,ar9"; + model = "BT Home Hub 3A"; /* SoC: Lantiq ar9 @ 333MHz */ + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_orange; + led-failsafe = &power_red; + led-running = &power_blue; + + led-dsl = &broadband_blue; + led-wifi = &wireless_blue; + }; + + memory@0 { /* RAM: Samsung K4H511638F-LC 64MB */ + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 54 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + restart { + label = "restart"; + gpios = <&gpio 52 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 53 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + wireless-red { + label = "bthomehubv3a:red:wireless"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + wireless-orange { + label = "bthomehubv3a:orange:wireless"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + wireless_blue: wireless-blue { + label = "bthomehubv3a:blue:wireless"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + + broadband-red { + label = "bthomehubv3a:red:broadband"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + broadband-orange { + label = "bthomehubv3a:orange:broadband"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + }; + broadband_blue: broadband-blue { + label = "bthomehubv3a:blue:broadband"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + + power_red: power-red { + label = "bthomehubv3a:red:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + power_orange: power-orange { + label = "bthomehubv3a:orange:power"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_blue: power-blue { + label = "bthomehubv3a:blue:power"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + nand_out { + lantiq,groups = "nand cle", "nand ale"; + lantiq,function = "ebu"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + nand_cs1 { + lantiq,groups = "nand cs1"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + + pci_in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci_out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + }; + }; +}; + +&gsw { + phy-mode = "rgmii"; +}; + +&localbus { + nand@1 { /* NAND Flash: Samsung K9F5608U0D-JIB0 32MB */ + compatible = "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <1 0x0 0x2000000 >; + #address-cells = <1>; + #size-cells = <1>; + req-mask = <0x1>; /* PCI request lines to mask during NAND access */ + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "preboot"; + reg = <0x00000 0x8000>; + read-only; + }; + partition@8000 { + label = "u-boot"; + reg = <0x8000 0x05c000>; + read-only; + }; + partition@64000 { + label = "uboot_env"; + reg = <0x64000 0x004000>; + }; + ath9k_cal: partition@68000 { + label = "art-copy"; + reg = <0x68000 0x004000>; + }; + partition@6c000 { + label = "kernel"; + reg = <0x6c000 0x200000>; + }; + partition@26c000 { + label = "ubi"; + reg = <0x26c000 0x1d94000>; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + ath9k@7000 { + reg = <0x7000 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ + }; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV5A.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV5A.dts new file mode 100644 index 000000000..a3be0a5c9 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/BTHOMEHUBV5A.dts @@ -0,0 +1,299 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "bt,homehub-v5a", "lantiq,xway", "lantiq,vr9"; + model = "BT Home Hub 5A"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_blue; + + led-dsl = &broadband_blue; + led-wifi = &wireless_blue; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 25 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + restart { + label = "restart"; + gpios = <&gpio 39 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + /* broadband-* is a single RGB led */ + broadband-red { + label = "bthomehubv5a:red:broadband"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + }; + broadband-green { + label = "bthomehubv5a:green:broadband"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + broadband_blue: broadband-blue { + label = "bthomehubv5a:blue:broadband"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + + /* wireless-* is a single RGB led */ + wireless-red { + label = "bthomehubv5a:red:wireless"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + wireless-green { + label = "bthomehubv5a:green:wireless"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + }; + wireless_blue: wireless-blue { + label = "bthomehubv5a:blue:wireless"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + + /* power-* is a single RGB led */ + power_red: power-red { + label = "bthomehubv5a:red:power"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + power_green: power-green { + label = "bthomehubv5a:green:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_blue: power-blue { + label = "bthomehubv5a:blue:power"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + dimmed { + label = "dimmed"; + gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain; + }; + pcie_rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + lantiq,open-drain; + }; + usb_vbus { + lantiq,pins = "io33"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + nand_out { + lantiq,groups = "nand cle", "nand ale"; + lantiq,function = "ebu"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + nand_cs1 { + lantiq,groups = "nand cs1"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + }; +}; + +&localbus { + nand@1 { + compatible = "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <0x1 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + nand-on-flash-bbt; + nand-ecc-strength = <3>; + nand-ecc-step-size = <256>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0xa0000>; + read-only; + }; + partition@a0000 { + label = "uboot-env"; + reg = <0xa0000 0x20000>; + read-only; + }; + partition@c0000 { + label = "unused"; + reg = <0xc0000 0x40000>; + }; + partition@100000 { + label = "ubi"; + reg = <0x100000 0x7e80000>; + }; + /* + * last 512 KiB are for the bad block table, not writable + */ + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@168c,002d { + compatible = "pci168c,002d"; + reg = <0x7000 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ + qca,disable-5ghz; + }; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN1000B.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN1000B.dts new file mode 100644 index 000000000..8982c27be --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN1000B.dts @@ -0,0 +1,173 @@ +/dts-v1/; + +#include "amazonse.dtsi" + +#include + +/ { + compatible = "netgear,dgn1000b", "lantiq,xway", "lantiq,ase"; + model = "Netgear DGN1000B"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + + led-dsl = &dsl; + led-internet = &online_green; + }; + + memory@0 { + reg = <0x0 0x1000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + rfkill { + label = "rfkill"; + gpios = <&gpio 25 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + dsl: dsl { + label = "dgn1000b:green:dsl"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + online_green: online { + label = "dgn1000b:green:online"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + online2 { + label = "dgn1000b:red:online"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + wps { + label = "dgn1000b:green:wps"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + power: power { + label = "dgn1000b:green:power"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + /* + power red is missing + */ + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + asc { + lantiq,groups = "asc"; + lantiq,function = "asc"; + }; + keys_in { + lantiq,pins = "io0",/* "io25", */"io29"; + lantiq,pull = <2>; + lantiq,open-drain = <1>; + }; + }; + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", + "spi_cs1"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&gsw { + phy-mode = "mii"; + mac-address = [ 00 11 22 33 44 55 ]; +}; + +&spi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + m25p80@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <1 0>; + spi-max-frequency = <5000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x20000>; + label = "SPI (RO) U-Boot Image"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0x10000>; + label = "ENV_MAC"; + read-only; + }; + + partition@30000 { + reg = <0x30000 0x10000>; + label = "DPF"; + read-only; + }; + + partition@40000 { + reg = <0x40000 0x10000>; + label = "NVRAM"; + read-only; + }; + + partition@500000 { + reg = <0x50000 0x003a0000>; + label = "kernel"; + }; + }; + }; +}; + +&usb_phy { + status = "okay"; +}; + +&usb { + status = "okay"; +}; diff --git a/target/linux/lantiq/dts/DGN3500.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500.dts similarity index 100% rename from target/linux/lantiq/dts/DGN3500.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500.dts diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500.dtsi new file mode 100644 index 000000000..614845f09 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500.dtsi @@ -0,0 +1,213 @@ +#include "ar9.dtsi" + +#include + +/ { + chosen { + bootargs = "root= console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &internet; + led-usb = &led_usb; + led-wifi = &wifi_green; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + rtl8366rb { + compatible = "realtek,rtl8366rb"; + gpio-sda = <&gpio 35 GPIO_ACTIVE_HIGH>; + gpio-sck = <&gpio 37 GPIO_ACTIVE_HIGH>; + + realtek,initvals = < + 0x0000 0x0830 + 0x0400 0x8130 + 0x000A 0x83ED + 0x0F51 0x0017 + 0x02F5 0x0048 + 0x02FA 0xFFDF + 0x02FB 0xFFE0 + 0x0450 0x0000 + 0x0401 0x0000 + 0x0431 0x0960 + >; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 36 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 54 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 53 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + internet: internet { + label = "dgn3500:green:internet"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + internet2 { + label = "dgn3500:red:internet"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "dgn3500:green:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "dgn3500:green:usb"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; + power_green: power { + label = "dgn3500:green:power"; + gpios = <&gpio 34 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power2 { + label = "dgn3500:red:power"; + gpios = <&gpio 39 GPIO_ACTIVE_LOW>; + }; + wifi_green: wifi { + label = "dgn3500:green:wireless"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + wifi2 { + label = "dgn3500:amber:wireless"; + gpios = <&gpio 51 GPIO_ACTIVE_LOW>; + }; + wps { + label = "dgn3500:green:wps"; + gpios = <&gpio 52 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + }; + pci { + lantiq,groups = "gnt1", "req1"; + lantiq,function = "pci"; + }; + pci-in { + lantiq,groups = "req1"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci-out { + lantiq,groups = "gnt1"; + lantiq,output = <1>; + lantiq,pull = <0>; + }; + }; + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", + "spi_cs4"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&gsw { + phy-mode = "mii"; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@168c,0029 { + compatible = "pci168c,0029"; + reg = <0x7000 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ + }; +}; + +&spi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + m25p80@4 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <4 0>; + spi-max-frequency = <20000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x10000>; + label = "uboot"; + read-only; + }; + + partition@10000 { + reg = <0x10000 0x10000>; + label = "uboot-env"; + read-only; + }; + + ath9k_cal: partition@20000 { + reg = <0x20000 0x10000>; + label = "calibration"; + read-only; + }; + + partition@50000 { + reg = <0x50000 0xfa0000>; + label = "firmware"; + }; + }; + }; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/dts/DGN3500B.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500B.dts similarity index 100% rename from target/linux/lantiq/dts/DGN3500B.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/DGN3500B.dts diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DM200.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DM200.dts new file mode 100644 index 000000000..8302336bd --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/DM200.dts @@ -0,0 +1,216 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "netgear,dm200", "lantiq,xway", "lantiq,vr9"; + model = "Netgear DM200"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_amber; + led-running = &power_green; + + led-dsl = &dsl_green; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + annexa { + gpio-export,name = "annexa"; + gpio-export,output = <0>; + gpios = <&gpio 12 GPIO_ACTIVE_HIGH>; + }; + annexb { + gpio-export,name = "annexb"; + gpio-export,output = <0>; + gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_amber: power_amber { + label = "dm200:amber:power"; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + }; + power_green: power_green { + label = "dm200:green:power"; + gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + }; + + lan_amber { + label = "dm200:amber:lan"; + gpios = <&gpio 33 GPIO_ACTIVE_HIGH>; + }; + lan_green { + label = "dm200:green:lan"; + gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; + }; + + dsl_amber { + label = "dm200:amber:dsl"; + gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + }; + dsl_green: dsl_green { + label = "dm200:green:dsl"; + gpios = <&gpio 36 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +ð0 { + lantiq,phys = <&gphy1>; + + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "mii"; + phy-handle = <&phy13>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + }; + + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", "spi_cs4"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&pcie0 { + status = "disabled"; +}; + +&spi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + m25p80@4 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <4 0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x20000>; + label = "uboot"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0x10000>; + label = "gphyfirmware"; + read-only; + }; + + partition@30000 { + reg = <0x30000 0x7b0000>; + label = "firmware"; + }; + + partition@7e0000 { + reg = <0x7e0000 0x10000>; + label = "sysconfig"; + read-only; + }; + + partition@7f0000 { + reg = <0x7f0000 0x2000>; + label = "ubootconfig"; + read-only; + }; + + partition@7f2000 { + reg = <0x7f2000 0x1000>; + label = "ART"; + read-only; + }; + + partition@7f3000 { + reg = <0x7f3000 0x1000>; + label = "pot"; + read-only; + }; + + partition@7f4000 { + reg = <0x7f4000 0xc000>; + label = "ret"; + read-only; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50712.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50712.dts new file mode 100644 index 000000000..ec287ab40 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50712.dts @@ -0,0 +1,81 @@ +/dts-v1/; + +#include "danube.dtsi" + +/ { + compatible = "lantiq,easy50712", "lantiq,xway", "lantiq,danube"; + model = "Intel EASY50712 Nand"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + }; + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + }; + pci { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + }; + conf_out { + lantiq,pins = "io4", "io5", "io6"; /* stp */ + lantiq,open-drain; + lantiq,pull = <0>; + }; + }; +}; + +&gsw { + phy-mode = "rmii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; /* 64 KB */ + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; /* 64 KB */ + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x3d0000>; + }; + + partition@400000 { + label = "rootfs"; + reg = <0x400000 0x400000>; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50810.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50810.dts new file mode 100644 index 000000000..21562dce2 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY50810.dts @@ -0,0 +1,87 @@ +/dts-v1/; + +#include "ar9.dtsi" + +/ { + compatible = "lantiq,easy50810", "lantiq,xway", "lantiq,ar9"; + model = "Lantiq EASY50810"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + }; + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + }; + pci { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + }; + conf_out { + lantiq,pins = "io4", "io5", "io6"; /* stp */ + lantiq,open-drain; + lantiq,pull = <0>; + }; + }; +}; + +&gsw { + phy-mode = "rmii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; /* 64 KB */ + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; /* 64 KB */ + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x3d0000>; + }; + + partition@400000 { + label = "rootfs"; + reg = <0x400000 0x400000>; + }; + }; + }; +}; + +&stp { + status = "okay"; + lantiq,shadow = <0xfff>; + lantiq,groups = <0x3>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920.dtsi new file mode 100644 index 000000000..464ab5bd4 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920.dtsi @@ -0,0 +1,312 @@ +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "lantiq,easy80920", "lantiq,xway", "lantiq,vr9"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + + led-usb = &led_usb1; + led-usb2 = &led_usb2; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; +/* reset { + label = "reset"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + linux,code = ; + };*/ + paging { + label = "paging"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power: power { + label = "easy80920:green:power"; + gpios = <&stp 9 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + warning { + label = "easy80920:green:warning"; + gpios = <&stp 22 GPIO_ACTIVE_HIGH>; + }; + fxs1 { + label = "easy80920:green:fxs1"; + gpios = <&stp 21 GPIO_ACTIVE_HIGH>; + }; + fxs2 { + label = "easy80920:green:fxs2"; + gpios = <&stp 20 GPIO_ACTIVE_HIGH>; + }; + fxo { + label = "easy80920:green:fxo"; + gpios = <&stp 19 GPIO_ACTIVE_HIGH>; + }; + led_usb1: usb1 { + label = "easy80920:green:usb1"; + gpios = <&stp 18 GPIO_ACTIVE_HIGH>; + }; + led_usb2: usb2 { + label = "easy80920:green:usb2"; + gpios = <&stp 15 GPIO_ACTIVE_HIGH>; + }; + sd { + label = "easy80920:green:sd"; + gpios = <&stp 14 GPIO_ACTIVE_HIGH>; + }; + wps { + label = "easy80920:green:wps"; + gpios = <&stp 12 GPIO_ACTIVE_HIGH>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + lantiq,switch; + + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + }; + + wan: interface@1 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + lantiq,wan; + + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + exin3 { + lantiq,groups = "exin3"; + lantiq,function = "exin"; + }; + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + }; + nand { + lantiq,groups = "nand cle", "nand ale", + "nand rd", "nand rdy"; + lantiq,function = "ebu"; + }; + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + pci { + lantiq,groups = "gnt1", "req1"; + lantiq,function = "pci"; + }; + conf_out { + lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */ + "io4", "io5", "io6", /* stp */ + "io21", + "io33"; + lantiq,open-drain; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + conf_in { + lantiq,pins = "io39", /* exin3 */ + "io48"; /* nand rdy */ + lantiq,pull = <2>; + }; + }; + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", + "spi_cs4"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&spi { + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + status = "okay"; + + m25p80@4 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <4 0>; + spi-max-frequency = <1000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x20000>; + label = "SPI (RO) U-Boot Image"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0x10000>; + label = "ENV_MAC"; + read-only; + }; + + partition@30000 { + reg = <0x30000 0x10000>; + label = "DPF"; + read-only; + }; + + partition@40000 { + reg = <0x40000 0x10000>; + label = "NVRAM"; + read-only; + }; + + partition@500000 { + reg = <0x50000 0x003a0000>; + label = "kernel"; + }; + }; + }; +}; + +&stp { + status = "okay"; + + lantiq,shadow = <0xffff>; + lantiq,groups = <0x7>; + lantiq,dsl = <0x3>; + lantiq,phy1 = <0x7>; + lantiq,phy2 = <0x7>; + /* lantiq,rising; */ +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NAND.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NAND.dts new file mode 100644 index 000000000..0134a7c17 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NAND.dts @@ -0,0 +1,65 @@ +/dts-v1/; + + +#include "EASY80920.dtsi" + +/ { + compatible = "lantiq,easy80920-nand", "lantiq,easy80920", "lantiq,xway", "lantiq,vr9"; + model = "Intel EASY80920 Nand"; + + chosen { + bootargs = "ubi.mtd=ubi ubi.block=0,rootfsA root=/dev/ubiblock0_1"; + }; +}; + +&localbus { + nand@0 { + compatible = "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x100000>; /* 1024 KB */ + }; + + partition@100000 { + label = "uboot_env"; + reg = <0x100000 0x40000>; /* 256 KB */ + }; + + partition@140000 { + label = "ubootconfigB"; + reg = <0x140000 0x40000>; /* 256 KB */ + }; + + partition@180000 { + label = "gphyfirmware"; + reg = <0x180000 0x40000>; /* 256 KB */ + }; + + partition@1c0000 { + label = "ubi"; + reg = <0x1c0000 0xc800000>; + }; + + partition@c9c0000 { + label = "calibration"; + reg = <0xc9c0000 0x100000>; + }; + + partition@cac0000 { + label = "res"; + reg = <0xcac0000 0x13540000>; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NOR.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NOR.dts new file mode 100644 index 000000000..9adc0b4f9 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920NOR.dts @@ -0,0 +1,39 @@ +/dts-v1/; + +#include "EASY80920.dtsi" + +/ { + compatible = "lantiq,easy80920-nor", "lantiq,easy80920", "lantiq,xway", "lantiq,vr9"; + model = "Intel EASY80920 Nor"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x10000>; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x10000 0x10000>; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x7e0000>; + }; + }; + }; +}; diff --git a/target/linux/lantiq/dts/EASY88388.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY88388.dts similarity index 100% rename from target/linux/lantiq/dts/EASY88388.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY88388.dts diff --git a/target/linux/lantiq/dts/EASY88444.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY88444.dts similarity index 100% rename from target/linux/lantiq/dts/EASY88444.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY88444.dts diff --git a/target/linux/lantiq/dts/EASY98000-base.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000-base.dtsi similarity index 100% rename from target/linux/lantiq/dts/EASY98000-base.dtsi rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000-base.dtsi diff --git a/target/linux/lantiq/dts/EASY98000NAND.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000NAND.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98000NAND.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000NAND.dts diff --git a/target/linux/lantiq/dts/EASY98000NOR.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000NOR.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98000NOR.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000NOR.dts diff --git a/target/linux/lantiq/dts/EASY98000SFLASH.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000SFLASH.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98000SFLASH.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98000SFLASH.dts diff --git a/target/linux/lantiq/dts/EASY98020.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98020.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98020.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98020.dts diff --git a/target/linux/lantiq/dts/EASY98020V18.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98020V18.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98020V18.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98020V18.dts diff --git a/target/linux/lantiq/dts/EASY98021.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98021.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98021.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98021.dts diff --git a/target/linux/lantiq/dts/EASY98035SYNCE.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98035SYNCE.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98035SYNCE.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98035SYNCE.dts diff --git a/target/linux/lantiq/dts/EASY98035SYNCE1588.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98035SYNCE1588.dts similarity index 100% rename from target/linux/lantiq/dts/EASY98035SYNCE1588.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY98035SYNCE1588.dts diff --git a/target/linux/lantiq/dts/FALCON-MDU.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FALCON-MDU.dts similarity index 100% rename from target/linux/lantiq/dts/FALCON-MDU.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/FALCON-MDU.dts diff --git a/target/linux/lantiq/dts/FALCON-SFP.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FALCON-SFP.dts similarity index 100% rename from target/linux/lantiq/dts/FALCON-SFP.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/FALCON-SFP.dts diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ3370.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ3370.dts new file mode 100644 index 000000000..a958fc67a --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ3370.dts @@ -0,0 +1,296 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "avm,fritz3370", "lantiq,xway", "lantiq,vr9"; + model = "Fritz!Box WLAN 3370"; + + chosen { + bootargs = "console=ttyLTQ0,115200 ubi.mtd=1,512 root=/dev/mtdblock9"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &info_green; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + power { + label = "power"; + gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + linux,code = ; + }; +/* wifi { + label = "wifi"; + gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; + linux,code = ; + };*/ + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_green: power { + label = "fritz3370:green:power"; + gpios = <&gpio 32 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power2 { + label = "fritz3370:red:power"; + gpios = <&gpio 33 GPIO_ACTIVE_LOW>; + }; + info_red { + label = "fritz3370:red:info"; + gpios = <&gpio 34 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "fritz3370:green:wlan"; + gpios = <&gpio 35 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "fritz3370:green:dsl"; + gpios = <&gpio 36 GPIO_ACTIVE_LOW>; + }; + lan { + label = "fritz3370:green:lan"; + gpios = <&gpio 38 GPIO_ACTIVE_LOW>; + }; + info_green: info_green { + label = "fritz3370:green:info"; + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mtd-mac-address = <&urlader 0x987>; + mtd-mac-address-increment = <(-2)>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + gpios = <&gpio 37 GPIO_ACTIVE_HIGH>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + gpios = <&gpio 44 GPIO_ACTIVE_HIGH>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + nand { + lantiq,groups = "nand cle", "nand ale", + "nand rd", "nand cs1", "nand rdy"; + lantiq,function = "ebu"; + lantiq,pull = <1>; + }; + phy-rst { + lantiq,pins = "io37", "io44"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", + "spi_cs4"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&localbus { + nand@1 { + compatible = "lantiq,nand-xway"; + bank-width = <2>; + reg = <1 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x400000>; + }; + + partition@400000 { + label = "rootfs_ubi"; + reg = <0x400000 0x3000000>; + }; + + partition@3400000 { + label = "vr9_firmware"; + reg = <0x3400000 0x400000>; + }; + partition@3800000 { + label = "reserved"; + reg = <0x3800000 0x3000000>; + }; + partition@6800000 { + label = "config"; + reg = <0x6800000 0x200000>; + }; + partition@6a00000 { + label = "nand-filesystem"; + reg = <0x6a00000 0x1600000>; + }; + }; + }; +}; + +&pcie0 { + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + + wifi@0,0 { + compatible = "pci0,0"; + reg = <0 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */ + }; + }; +}; + +&spi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + m25p80@4 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <4 0>; + spi-max-frequency = <1000000>; + + urlader: partition@0 { + reg = <0x0 0x20000>; + label = "urlader"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0x10000>; + label = "tffs (1)"; + read-only; + }; + + partition@30000 { + reg = <0x30000 0x10000>; + label = "tffs (2)"; + read-only; + }; + }; +}; + +/* + * TODO: add phy-supply, gpio 5 GPIO_ACTIVE_HIGH and gpio 14 GPIO_ACTIVE_HIGH are + * related + */ +&usb_phy0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7320.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7320.dts new file mode 100644 index 000000000..eed4ae316 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7320.dts @@ -0,0 +1,163 @@ +/dts-v1/; + +#include "ar9.dtsi" + +#include + +/ { + compatible = "avm,fritz7320", "lantiq,xway", "lantiq,ar9"; + model = "1&1 HomeServer"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + + led-internet = &info_green; + led-dsl = &power; + led-wifi = &wlan; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + rfkill { + label = "rfkill"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + dect { + label = "dect"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power: power { + label = "fritz7320:green:power"; + gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + voice { + label = "fritz7320:green:fon"; + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + }; + dect { + label = "fritz7320:green:dect"; + gpios = <&gpio 38 GPIO_ACTIVE_LOW>; + }; + wlan: wlan { + label = "fritz7320:green:wlan"; + gpios = <&gpio 37 GPIO_ACTIVE_LOW>; + }; + info_green: info_green { + label = "fritz7320:green:info"; + gpios = <&gpio 35 GPIO_ACTIVE_LOW>; + }; + info_red { + label = "fritz7320:red:info"; + gpios = <&gpio 45 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + pci { + lantiq,groups = "gnt1", "req1", "req2", "req3", "req4", "gnt2", "gnt3", "gnt4"; + lantiq,function = "pci"; + }; + pci-in { + lantiq,groups = "req1", "req2", "req3", "req4"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci-out { + lantiq,groups = "gnt1", "gnt2", "gnt3", "gnt4"; + lantiq,output = <1>; + lantiq,pull = <0>; + }; + }; +}; + +&gsw { + phy-mode = "mii"; + mtd-mac-address = <&ath9k_cal 0xa91>; + mtd-mac-address-increment = <(-2)>; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x1000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + ath9k_cal: partition@0 { + label = "urlader"; + reg = <0x00000 0x20000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0xf60000>; + }; + + partition@f80000 { + label = "tffs (1)"; + reg = <0xf80000 0x40000>; + read-only; + }; + + partition@fc0000 { + label = "tffs (2)"; + reg = <0xfc0000 0x40000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + req-mask = <0xf>; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@0,0 { + compatible = "pci0,0"; + reg = <0x7000 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:00:0e.0.bin */ + }; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7360SL.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7360SL.dts new file mode 100644 index 000000000..a0f5d8ee0 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/FRITZ7360SL.dts @@ -0,0 +1,239 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "avm,fritz7360sl", "lantiq,xway", "lantiq,vr9"; + model = "1&1 HomeServer"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &info_green; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + dect { + label = "dect"; + gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + linux,code = ; + }; + wifi { + label = "wifi"; + gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_green: power { + label = "fritz7360sl:green:power"; + gpios = <&gpio 32 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power2 { + label = "fritz7360sl:red:power"; + gpios = <&gpio 33 GPIO_ACTIVE_LOW>; + }; + info_red { + label = "fritz7360sl:red:info"; + gpios = <&gpio 34 GPIO_ACTIVE_LOW>; + }; + info_green: info_green { + label = "fritz7360sl:green:info"; + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "fritz7360sl:green:wlan"; + gpios = <&gpio 36 GPIO_ACTIVE_LOW>; + }; + dect { + label = "fritz7360sl:green:dect"; + gpios = <&gpio 35 GPIO_ACTIVE_LOW>; + }; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mtd-mac-address = <&urlader 0xa91>; + mtd-mac-address-increment = <(-2)>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rmii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x00>; + compatible = "ethernet-phy-ieee802.3-c22"; + reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>; + }; + phy1: ethernet-phy@1 { + reg = <0x01>; + compatible = "ethernet-phy-ieee802.3-c22"; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + phy-rst { + lantiq,pins = "io37", "io44"; + lantiq,pull = <0>; + lantiq,open-drain; + lantiq,output = <1>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x1000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + urlader: partition@0 { + label = "urlader"; + reg = <0x00000 0x20000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0xf60000>; + }; + + partition@f80000 { + label = "tffs (1)"; + reg = <0xf80000 0x40000>; + read-only; + }; + + partition@fc0000 { + label = "tffs (2)"; + reg = <0xfc0000 0x40000>; + read-only; + }; + }; + }; +}; + +&pcie0 { + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + + wifi@168c,002e { + compatible = "pci168c,002e"; + reg = <0 0 0 0 0>; + qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */ + }; + }; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb_phy1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/GIGASX76X.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/GIGASX76X.dts new file mode 100644 index 000000000..fc028bb5f --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/GIGASX76X.dts @@ -0,0 +1,130 @@ +/dts-v1/; + +#include "danube.dtsi" + +#include + +/ { + compatible = "siemens,gigaset-sx76x", "lantiq,xway", "lantiq,danube"; + model = "Gigaset SX761,SX762,SX763"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 14 GPIO_ACTIVE_HIGH>; + linux,code = ; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + switch { + gpio-export,name = "switch"; + gpio-export,output = <1>; + gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 29 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + }; + }; +}; + + +&gpiomm { + status = "okay"; + lantiq,shadow = <0x3>; +}; + +&gpios { + status = "okay"; +}; + +&gsw { + phy-mode = "rmii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x30000>; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x30000 0x10000>; + }; + + partition@40000 { + label = "firmware"; + reg = <0x40000 0x7c0000>; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +&usb_phy { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpiomm 1 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/H201L.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/H201L.dts new file mode 100644 index 000000000..43a4b42d8 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/H201L.dts @@ -0,0 +1,174 @@ +/dts-v1/; + +#include "ar9.dtsi" + +#include + +/ { + compatible = "zte,h201l", "lantiq,xway", "lantiq,ar9"; + model = "ZTE H210L"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_green; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &online; + led-usb = &led_usb; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 53 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 54 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + rfkill { + label = "rfkill"; + gpios = <&gpio 55 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_green: power { + label = "h201l:green:power"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + online: online { + label = "h201l:green:internet"; + gpios = <&gpio 37 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "h201l:green:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + phone { + label = "h201l:green:phone"; + gpios = <&gpio 39 GPIO_ACTIVE_LOW>; + }; + wps { + label = "h201l:green:wps"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "h201l:green:wlan"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "h201l:green:usb"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + switch { + gpio-export,name = "switch"; + gpio-export,output = <1>; + gpios = <&gpio 38 GPIO_ACTIVE_HIGH>; + }; + usb { + gpio-export,name = "usb"; + gpio-export,output = <1>; + gpios = <&gpio 28 GPIO_ACTIVE_HIGH>; + }; + wifi { + gpio-export,name = "wifi"; + gpio-export,output = <1>; + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 36 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + }; +}; + +&gsw { + phy-mode = "rgmii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x20000>; + read-only; + }; + + partition@20000 { + label = "uboot_env"; + reg = <0x20000 0x10000>; + read-only; + }; + + partition@30000 { + label = "firmware"; + reg = <0x30000 0x7d0000>; + }; + }; + }; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2601HNFX.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2601HNFX.dts new file mode 100644 index 000000000..267a4f3a7 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2601HNFX.dts @@ -0,0 +1,194 @@ +/dts-v1/; + +#include "ar9.dtsi" + +#include + +/ { + compatible = "zyxel,p-2601hn", "lantiq,xway", "lantiq,ar9"; + model = "ZyXEL P-2601HN-Fx"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &online; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 53 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + rfkill { + label = "rfkill"; + gpios = <&gpio 54 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_green: power { + label = "p2601hnfx:green:power"; + gpios = <&stp 11 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power2 { + label = "p2601hnfx:red:power"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + }; + online: online { + label = "p2601hnfx:green:internet"; + gpios = <&stp 13 GPIO_ACTIVE_LOW>; + }; + online2 { + label = "p2601hnfx:red:internet"; + gpios = <&stp 12 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "p2601hnfx:green:dsl"; + gpios = <&stp 14 GPIO_ACTIVE_LOW>; + }; + phone { + label = "p2601hnfx:green:phone"; + gpios = <&stp 9 GPIO_ACTIVE_LOW>; + }; + phone2 { + label = "p2601hnfx:orange:phone"; + gpios = <&stp 8 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "p2601hnfx:green:wireless"; + gpios = <&stp 15 GPIO_ACTIVE_LOW>; + }; + wifi2 { + label = "p2601hnfx:orange:wireless"; + gpios = <&stp 10 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + switch { + gpio-export,name = "switch"; + gpio-export,output = <1>; + gpios = <&gpio 50 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + exin { + lantiq,groups = "exin1"; + lantiq,function = "exin"; + }; + pci { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + }; + conf_out { + lantiq,pins = "io4", "io5", "io6"; + lantiq,open-drain; + lantiq,pull = <0>; + }; + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gsw { + phy-mode = "rmii"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@40000 { + label = "uboot_env"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "firmware"; + reg = <0x60000 0xfa0000>; + }; + }; + }; +}; + +&stp { + lantiq,shadow = <0xfff>; + lantiq,groups = <0x3>; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF1.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF1.dts new file mode 100644 index 000000000..911a2d6af --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF1.dts @@ -0,0 +1,70 @@ +/dts-v1/; + +#include "P2812HNUFX.dtsi" + +/ { + compatible = "zyxel,p-2812hnu-f1", "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9"; + model = "ZyXEL P-2812HNU-F1"; + + aliases { + led-usb = &led_usb1; + led-usb2 = &led_usb2; + }; + + gpio-leds { + led_usb1: usb1 { + label = "p2812hnuf1:green:usb1"; + gpios = <&gpio 38 GPIO_ACTIVE_LOW>; + }; + led_usb2: usb2 { + label = "p2812hnuf1:green:usb2"; + gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&localbus { + nand@0 { + compatible = "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + }; + partition@40000 { + label = "uboot-env"; + reg = <0x40000 0x20000>; + }; + partition@60000 { + label = "kernel"; + reg = <0x60000 0x200000>; + }; + partition@260000 { + label = "ubi"; + reg = <0x260000 0x7da0000>; + }; + }; + }; +}; + +&pci0 { + wifi@1814,3062 { + compatible = "pci1814,3062"; + reg = <0x7000 0 0 0 0>; + ralink,eeprom = "RT3062.eeprom"; + }; +}; + +&pcie0 { + status = "disabled"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF3.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF3.dts new file mode 100644 index 000000000..202226aa8 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUF3.dts @@ -0,0 +1,64 @@ +/dts-v1/; + +#include "P2812HNUFX.dtsi" + +/ { + compatible = "zyxel,p-2812hnu-f3", "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9"; + model = "ZyXEL P-2812HNU-F3"; +}; + +&pci0 { + wifi@1814,3092 { + compatible = "pci1814,3092"; + reg = <0x7000 0 0 0 0>; + ralink,eeprom = "RT3092.eeprom"; + }; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x50000>; + read-only; + }; + partition@50000 { + label = "uboot-env"; + reg = <0x50000 0x10000>; + }; + partition@60000 { + label = "unused"; + reg = <0x60000 0x7a0000>; + }; + }; + }; + + nand@1 { + compatible = "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <1 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x200000>; + }; + partition@200000 { + label = "ubi"; + reg = <0x200000 0x7e00000>; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUFX.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUFX.dtsi new file mode 100644 index 000000000..03858afef --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUFX.dtsi @@ -0,0 +1,297 @@ +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl_green; + led-internet = &internet_green; + led-wifi = &wireless_green; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 39 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + rfkill { + label = "rfkill"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + internet_red { + label = "p2812hnufx:red:internet"; + gpios = <&stp 16 GPIO_ACTIVE_LOW>; + }; + internet_green: internet_green { + label = "p2812hnufx:green:internet"; + gpios = <&stp 17 GPIO_ACTIVE_LOW>; + }; + dsl_green: dsl_green { + label = "p2812hnufx:green:dsl"; + gpios = <&stp 18 GPIO_ACTIVE_LOW>; + }; + dsl_orange { + label = "p2812hnufx:orange:dsl"; + gpios = <&stp 19 GPIO_ACTIVE_LOW>; + }; + wireless_orange { + label = "p2812hnufx:orange:wlan"; + gpios = <&stp 20 GPIO_ACTIVE_LOW>; + }; + wireless_green: wireless_green { + label = "p2812hnufx:green:wlan"; + gpios = <&stp 21 GPIO_ACTIVE_LOW>; + }; + power_red: power { + label = "p2812hnufx:red:power"; + gpios = <&stp 22 GPIO_ACTIVE_LOW>; + }; + power_green: power2 { + label = "p2812hnufx:green:power"; + gpios = <&stp 23 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + phone1 { + label = "p2812hnufx:green:phone"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + phone1warn { + label = "p2812hnufx:orange:phone"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + phone2warn { + label = "p2812hnufx:orange:phone2"; + gpios = <&gpio 26 GPIO_ACTIVE_LOW>; + }; + phone2 { + label = "p2812hnufx:green:phone2"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mac-address = [ 00 11 22 33 44 55 ]; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + exin3 { + lantiq,groups = "exin3"; + lantiq,function = "exin"; + }; + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + gphy-leds { + lantiq,groups = "gphy0 led1", "gphy1 led1", + "gphy0 led2", "gphy1 led2"; + lantiq,function = "gphy"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pci-in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci-out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <2>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + ifxhcd-rst { + lantiq,pins = "io33"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + nand_out { + lantiq,groups = "nand cle", "nand ale"; + lantiq,function = "ebu"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + nand_cs1 { + lantiq,groups = "nand cs1"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +&stp { + status = "okay"; + + lantiq,shadow = <0xffffff>; + lantiq,groups = <0x7>; + lantiq,dsl = <0x0>; + lantiq,phy1 = <0x0>; + lantiq,phy2 = <0x0>; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb_phy1 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/target/linux/lantiq/dts/TDW8970.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW8970.dts similarity index 100% rename from target/linux/lantiq/dts/TDW8970.dts rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW8970.dts diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW8980.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW8980.dts new file mode 100644 index 000000000..76875e735 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW8980.dts @@ -0,0 +1,33 @@ +/dts-v1/; + +#include "TDW89X0.dtsi" + +/ { + compatible = "tplink,tdw8980", "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9"; + model = "TP-LINK TD-W8980"; + + gpio-leds { + wifi2 { + label = "tdw8980:green:wlan5ghz"; + gpios = <&gpio 24 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio { + state_default: pinmux { + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain; + }; + }; +}; + +&pci0 { + status = "okay"; + lantiq,bus-clock = <33333333>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = <0x7000 0 0 1 &icu0 30 1>; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW89X0.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW89X0.dtsi new file mode 100644 index 000000000..e176bca30 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/TDW89X0.dtsi @@ -0,0 +1,298 @@ +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + /* the power led can't be controlled, use the wps led instead */ + led-boot = &wps; + led-failsafe = &wps; + + led-dsl = &dsl; + led-internet = &internet; + led-wifi = &wifi; + led-usb = &led_usb0; + led-usb2 = &led_usb2; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wifi { + label = "wifi"; + gpios = <&gpio 9 GPIO_ACTIVE_HIGH>; + linux,code = ; + linux,input-type = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 39 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + /* + power is not controllable via gpio + */ + dsl: dsl { + label = "tdw89x0:green:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; + }; + internet: internet { + label = "tdw89x0:green:internet"; + gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; + }; + + led_usb0: usb0 { + label = "tdw89x0:green:usb"; + gpios = <&gpio 19 GPIO_ACTIVE_HIGH>; + }; + led_usb2: usb2 { + label = "tdw89x0:green:usb2"; + gpios = <&gpio 20 GPIO_ACTIVE_HIGH>; + }; + wps: wps { + label = "tdw89x0:green:wps"; + gpios = <&gpio 37 GPIO_ACTIVE_HIGH>; + }; + }; + + wifi-leds { + compatible = "gpio-leds"; + + wifi: wifi { + label = "tdw89x0:green:wifi"; + gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>; + }; + }; + + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mtd-mac-address = <&ath9k_cal 0xf100>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + // gpios = <&gpio 42 GPIO_ACTIVE_LOW>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + gphy-leds { + lantiq,groups = "gphy0 led1", "gphy1 led1"; + lantiq,function = "gphy"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + phy-rst { + lantiq,pins = "io42"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", + "spi_cs4"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&pcie0 { + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + + ath9k: wifi@168c,002e { + compatible = "pci168c,002e"; + reg = <0 0 0 0 0>; + #gpio-cells = <2>; + gpio-controller; + qca,no-eeprom; + qca,disable-5ghz; + mtd-mac-address = <&ath9k_cal 0xf100>; + mtd-mac-address-increment = <2>; + }; + }; +}; + +&spi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + m25p80@4 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <4 0>; + spi-max-frequency = <33250000>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x20000>; + label = "u-boot"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0x7a0000>; + label = "firmware"; + }; + + partition@7c0000 { + reg = <0x7c0000 0x10000>; + label = "config"; + read-only; + }; + + ath9k_cal: partition@7d0000 { + reg = <0x7d0000 0x30000>; + label = "boardconfig"; + read-only; + }; + }; + }; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb_phy1 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VG3503J.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VG3503J.dts new file mode 100644 index 000000000..bb001cb21 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VG3503J.dts @@ -0,0 +1,164 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "arcadyan,vg3503j", "lantiq,xway", "lantiq,vr9"; + model = "BT OpenReach VDSL Modem"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + }; + + memory@0 { + reg = <0x0 0x2000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_red: power2 { + label = "vg3503j:red:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "vg3503j:green:dsl"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + power_green: power { + label = "vg3503j:green:power"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + }; +}; + +ð0 { + interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + lantiq,switch; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "mii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "mii"; + phy-handle = <&phy13>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + lantiq,led1h = <0x70>; + lantiq,led1l = <0x00>; + lantiq,led2h = <0x00>; + lantiq,led2l = <0x03>; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + lantiq,led1h = <0x70>; + lantiq,led1l = <0x00>; + lantiq,led2h = <0x00>; + lantiq,led2l = <0x03>; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + gphy-leds { + lantiq,groups = "gphy0 led0", "gphy0 led1", + "gphy0 led2", "gphy1 led0", + "gphy1 led1", "gphy1 led2"; + lantiq,function = "gphy"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + }; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x20000>; + }; + + partition@20000 { + label = "firmware"; + reg = <0x20000 0x7d0000>; + }; + + partition@7f0000 { + label = "uboot-env"; + reg = <0x7f0000 0x10000>; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22.dtsi new file mode 100644 index 000000000..8f22380cc --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22.dtsi @@ -0,0 +1,268 @@ +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "arcadyan,vgv7510kw22", "lantiq,xway", "lantiq,vr9"; + + chosen { + bootargs = "console=ttyLTQ0,115200 mem=62M vpe1_load_addr=0x83e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &internet_green; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + dsl: dsl { + label = "vgv7510kw22:green:dsl"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + + internet_red { + label = "vgv7510kw22:red:internet"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + }; + + info_red { + label = "vgv7510kw22:red:info"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + }; + + power_green: power { + label = "vgv7510kw22:green:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + info_green { + label = "vgv7510kw22:green:info"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + internet_green: internet_green { + label = "vgv7510kw22:green:internet"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + + wifi: wifi { + label = "vgv7510kw22:green:wlan"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + + power_red: power2 { + label = "vgv7510kw22:red:power"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + }; + + phone { + label = "vgv7510kw22:green:telefon"; + gpios = <&gpio 29 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 47 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mtd-mac-address = <&boardconfig 0x16>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "mii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "mii"; + phy-handle = <&phy11>; + }; + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <3>; + phy-mode = "mii"; + phy-handle = <&phy12>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "mii"; + phy-handle = <&phy13>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "mii"; + phy-handle = <&phy14>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "ethernet-phy-ieee802.3-c22"; + }; + + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy12: ethernet-phy@12 { + reg = <0x12>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy14: ethernet-phy@14 { + reg = <0x14>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + gphy-leds { + lantiq,groups = "gphy0 led0", "gphy0 led1", + "gphy1 led0", "gphy1 led1"; + lantiq,function = "gphy"; + lantiq,open-drain = <0>; + lantiq,pull = <2>; + lantiq,output = <1>; + }; + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + pci-rst { + lantiq,pins = "io21"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x1000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boardconfig: partition@fe0000 { + label = "board_config"; + reg = <0xfe0000 0x20000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@1814,3592 { + compatible = "pci1814,3592"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + ralink,mtd-eeprom-swap; + mtd-mac-address = <&boardconfig 0x16>; + mtd-mac-address-increment = <1>; + }; +}; + +&pcie0 { + status = "disabled"; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 30 GPIO_ACTIVE_HIGH //fxs relay + &gpio 31 GPIO_ACTIVE_HIGH //still unknown + &gpio 3 GPIO_ACTIVE_HIGH>; //reset_slic? +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22BRN.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22BRN.dts new file mode 100644 index 000000000..94b96d74d --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22BRN.dts @@ -0,0 +1,65 @@ +/dts-v1/; + +#include "VGV7510KW22.dtsi" + +/ { + compatible = "arcadyan,vgv7510kw22-brn", "arcadyan,vgv7510kw22", "lantiq,xway", "lantiq,vr9"; + model = "o2 Box 6431"; + + sram@1f000000 { + cgu@103000 { + lantiq,phy-clk-src = <0x2>; + }; + }; +}; + +&localbus { + nor@0 { + partitions { + partition@0 { + label = "Boot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@40000 { + label = "Configuration"; + reg = <0x40000 0x40000>; + read-only; + }; + + partition@80000 { + label = "Certificate"; + reg = <0x80000 0x20000>; + read-only; + }; + + partition@a0000 { + label = "Special_Area"; + reg = <0xa0000 0x20000>; + read-only; + }; + + partition@c0000 { + compatible = "brnboot,root-selector"; + label = "Primary_Setting"; + reg = <0xc0000 0x20000>; + read-only; + }; + + partition@e0000 { + label = "Code_Image_0"; + reg = <0xe0000 0x780000>; + brnboot,root-id = <0x00>; + read-only; + }; + + partition@860000 { + label = "Code_Image_1"; + reg = <0x860000 0x780000>; + brnboot,root-id = <0x01>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22NOR.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22NOR.dts new file mode 100644 index 000000000..cc84c63f2 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7510KW22NOR.dts @@ -0,0 +1,31 @@ +/dts-v1/; + +#include "VGV7510KW22.dtsi" + +/ { + compatible = "arcadyan,vgv7510kw22-nor", "arcadyan,vgv7510kw22", "lantiq,xway", "lantiq,vr9"; + model = "o2 Box 6431"; +}; + +&localbus { + nor@0 { + partitions { + partition@0 { + label = "uboot"; + reg = <0x0 0x60000>; /* 384 KiB */ + read-only; + }; + + partition@60000 { + label = "uboot-env"; + reg = <0x60000 0x20000>; /* 128 KiB */ + read-only; + }; + + partition@80000 { + label = "firmware"; + reg = <0x80000 0xf60000>; /* 15744 KiB */ + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519.dtsi new file mode 100644 index 000000000..297f5f7f4 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519.dtsi @@ -0,0 +1,312 @@ +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "arcadyan,vgv7519", "lantiq,xway", "lantiq,vr9"; + + chosen { + bootargs = "console=ttyLTQ0,115200 mem=62M vpe1_load_addr=0x83e00000 vpe1_mem=2M maxvpes=1 maxtcs=1 nosmp"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &broadband_green; + led-internet = &internet_green; + led-wifi = &wireless_green; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + eco { + label = "eco"; + gpios = <&gpio 41 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + rfkill { + label = "rfkill"; + gpios = <&gpio 45 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + wps { + label = "wps"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + eco { + label = "vgv7519:blue:eco"; + gpios = <&stp 2 GPIO_ACTIVE_LOW>; + }; + wps_red { + label = "vgv7519:red:wps"; + gpios = <&stp 3 GPIO_ACTIVE_LOW>; + }; + wps_green { + label = "vgv7519:green:wps"; + gpios = <&stp 4 GPIO_ACTIVE_LOW>; + }; + upgrade { + label = "vgv7519:blue:upgrade"; + gpios = <&stp 5 GPIO_ACTIVE_LOW>; + }; + tv { + label = "vgv7519:green:tv"; + gpios = <&stp 6 GPIO_ACTIVE_LOW>; + }; + internet_green: internet_green { + label = "vgv7519:green:internet"; + gpios = <&stp 7 GPIO_ACTIVE_LOW>; + }; + internet_red { + label = "vgv7519:red:internet"; + gpios = <&stp 8 GPIO_ACTIVE_LOW>; + }; + broadband_red { + label = "vgv7519:red:broadband"; + gpios = <&stp 9 GPIO_ACTIVE_LOW>; + }; + broadband_green: broadband_green { + label = "vgv7519:green:broadband"; + gpios = <&stp 10 GPIO_ACTIVE_LOW>; + }; + voice { + label = "vgv7519:green:voice"; + gpios = <&stp 11 GPIO_ACTIVE_LOW>; + }; + wireless_red { + label = "vgv7519:red:wireless"; + gpios = <&stp 12 GPIO_ACTIVE_LOW>; + }; + wireless_green: wireless_green { + label = "vgv7519:green:wireless"; + gpios = <&stp 13 GPIO_ACTIVE_LOW>; + }; + power_green: power2 { + label = "vgv7519:green:power"; + gpios = <&stp 14 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power { + label = "vgv7519:red:power"; + gpios = <&stp 15 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 32 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mtd-mac-address = <&boardconfig 0x16>; + mtd-mac-address-increment = <1>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + lantiq,open-drain = <0>; + lantiq,output = <1>; + lantiq,pull = <0>; + }; + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + pci-rst { + lantiq,pins = "io21"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + gphy-leds { + lantiq,groups = "gphy0 led1", "gphy1 led0"; + lantiq,function = "gphy"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>, <1 0x800000 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boardconfig: partition@40000 { + label = "board_config"; + reg = <0x40000 0x10000>; + read-only; + }; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; + + wifi@1814,3091 { + compatible = "pci1814,3091"; + reg = <0x7000 0 0 0 0>; + ralink,mtd-eeprom = <&boardconfig 0x410>; + ralink,mtd-eeprom-swap; + mtd-mac-address = <&boardconfig 0x16>; + mtd-mac-address-increment = <1>; + }; +}; + +&pcie0 { + status = "disabled"; +}; + +&stp { + lantiq,shadow = <0xffff>; + lantiq,groups = <0x3>; + lantiq,dsl = <0x0>; + lantiq,phy1 = <0x0>; + lantiq,phy2 = <0x0>; + /* lantiq,rising; */ +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb_phy1 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; + +&vmmc { + status = "okay"; + gpios = <&gpio 30 GPIO_ACTIVE_HIGH //fxs relay + &gpio 31 GPIO_ACTIVE_HIGH //still unknown + &gpio 3 GPIO_ACTIVE_HIGH>; //reset_slic? +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519BRN.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519BRN.dts new file mode 100644 index 000000000..1e6a65ebb --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519BRN.dts @@ -0,0 +1,70 @@ +/dts-v1/; + +#include "VGV7519.dtsi" + +/ { + compatible = "arcadyan,vgv7519-brn", "arcadyan,vgv7519", "lantiq,xway", "lantiq,vr9"; + model = "KPN Experiabox V8"; +}; + +&localbus { + nor@0 { + partitions { + partition@0 { + label = "Boot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@50000 { + label = "Certificate"; + reg = <0x50000 0x10000>; + read-only; + }; + partition@60000 { + label = "Special_Area"; + reg = <0x60000 0x10000>; + read-only; + }; + + partition@70000 { + label = " Reserve_0"; + reg = <0x70000 0x10000>; + read-only; + }; + + partition@80000 { + label = "Code_Image_0"; + reg = <0x80000 0x780000>; + brnboot,root-id = <0x00>; + read-only; + }; + + partition@4000000 { + compatible = "brnboot,root-selector"; + label = "Primary_Setting"; + reg = <0x4000000 0x10000>; + read-only; + }; + + partition@4010000 { + label = "Configuration"; + reg = <0x4010000 0x60000>; + read-only; + }; + + partition@4070000 { + label = " Reserve_1"; + reg = <0x4070000 0x10000>; + read-only; + }; + + partition@4080000 { + label = "Code_Image_1"; + reg = <0x4080000 0x780000>; + brnboot,root-id = <0x01>; + read-only; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519NOR.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519NOR.dts new file mode 100644 index 000000000..4bdf0bc75 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VGV7519NOR.dts @@ -0,0 +1,29 @@ +/dts-v1/; + +#include "VGV7519.dtsi" + +/ { + compatible = "arcadyan,vgv7519-nor", "arcadyan,vgv7519", "lantiq,xway", "lantiq,vr9"; + model = "KPN Experiabox V8"; +}; + +&localbus { + nor@0 { + partitions { + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + read-only; + }; + partition@60000 { + label = "uboot_env"; + reg = <0x60000 0x10000>; + read-only; + }; + partition@80000 { + label = "firmware"; + reg = <0x80000 0xf80000>; + }; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VR200v.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VR200v.dts new file mode 100644 index 000000000..d0fcd6fcd --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/VR200v.dts @@ -0,0 +1,305 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "tplink,vr200v", "lantiq,xway", "lantiq,vr9"; + model = "TP-LINK Archer VR200v"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + + led-dsl = &dsl; + led-internet = &internet; + led-usb = &led_usb; + led-usb2 = &led_usb; + }; + + memory@0 { + reg = <0x0 0x7f00000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + reset { + label = "reset"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wifi { + label = "wifi"; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + linux,code = ; + linux,input-type = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + dect_paging { + label = "dect_paging"; + gpios = <&gpio 39 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + power: power { + label = "vr200v:blue:power"; + gpios = <&gpio 46 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "vr200v:blue:dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + internet: internet { + label = "vr200v:blue:internet"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "vr200v:blue:usb"; + gpios = <&gpio 25 GPIO_ACTIVE_LOW>; + }; + eth { + label = "vr200v:blue:lan"; + gpios = <&gpio 40 GPIO_ACTIVE_LOW>; + }; + wlan { + label = "vr200v:blue:wlan"; + gpios = <&gpio 24 GPIO_ACTIVE_LOW>; + }; + wlan5g { + label = "vr200v:blue:wlan5g"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + phone { + label = "vr200v:blue:phone"; + gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mtd-mac-address = <&romfile 0xf100>; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + // gpios = <&gpio 42 GPIO_ACTIVE_LOW>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + gphy-leds { + lantiq,groups = "gphy0 led1", "gphy1 led1"; + lantiq,function = "gphy"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + phy-rst { + lantiq,pins = "io42"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", + "spi_cs4"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&pci0 { + status = "okay"; + gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>; +}; + +&spi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + m25p80@4 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <4 0>; + spi-max-frequency = <33250000>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + reg = <0x0 0x20000>; + label = "u-boot"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0xf90000>; + label = "firmware"; + }; + + partition@fb0000 { + reg = <0xfb0000 0x10000>; + label = "radioDECT"; + read-only; + }; + + partition@fc0000 { + reg = <0xfc0000 0x10000>; + label = "config"; + read-only; + }; + + romfile: partition@fd0000 { + reg = <0xfd0000 0x10000>; + label = "romfile"; + read-only; + }; + + partition@fe0000 { + reg = <0xfe0000 0x10000>; + label = "rom"; + read-only; + }; + + partition@ff0000 { + reg = <0xff0000 0x10000>; + label = "radio"; + read-only; + }; + }; + }; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb_phy1 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR.dts new file mode 100644 index 000000000..6bee3308a --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR.dts @@ -0,0 +1,199 @@ +/dts-v1/; + +#include "ar9.dtsi" + +#include + +/ { + compatible = "buffalo,wbmr-hp-g300h", "lantiq,xway", "lantiq,ar9"; + model = "Buffalo WBMR-HP-G300H"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + + led-dsl = &dsl; + led-internet = &online_green; + led-usb = &led_usb; + led-wifi = &wifi; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + wps { + label = "wps"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + reset { + label = "reset"; + gpios = <&gpio 37 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + eject { + label = "eject"; + gpios = <&gpio 34 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + movie { + label = "movie"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + power_green: power { + label = "wbmr:green:power"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + power_red: power2 { + label = "wbmr:red:power"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + security { + label = "wbmr:yellow:security"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + wifi: wifi { + label = "wbmr:green:wireless"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + dsl: dsl { + label = "wbmr:green:dsl"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + online_green: online { + label = "wbmr:green:internet"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + online2 { + label = "wbmr:red:internet"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + }; + movie { + label = "wbmr:blue:movie"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + led_usb: usb { + label = "wbmr:green:usb"; + gpios = <&gpio 28 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 36 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + pci-in { + lantiq,groups = "req1"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci-out { + lantiq,groups = "gnt1"; + lantiq,output = <1>; + lantiq,pull = <0>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; +}; + +&gsw { + phy-mode = "rgmii"; + mtd-mac-address = <&boardconfig 0x10024>; +}; + +&pci0 { + status = "okay"; +}; + +&localbus { + nor@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + read-only; + }; + + partition@40000 { + label = "uboot_env"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@20000 { + label = "firmware"; + reg = <0x60000 0x1f20000>; + }; + + boardconfig: partition@1fc0000 { + label = "board"; + reg = <0x1fc0000 0x20000>; + read-only; + }; + + partition@1fe0000 { + label = "calibration"; + reg = <0x1fe0000 0x20000>; + read-only; + }; + }; + }; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR300.dts b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR300.dts new file mode 100644 index 000000000..4092b6b6e --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/WBMR300.dts @@ -0,0 +1,329 @@ +/dts-v1/; + +#include "vr9.dtsi" + +#include +#include + +/ { + compatible = "buffalo,wbmr-300hpd", "lantiq,xway", "lantiq,vr9"; + model = "Buffalo WBMR-300HPD"; + + chosen { + bootargs = "console=ttyLTQ0,115200"; + }; + + aliases { + led-boot = &power_g; + led-failsafe = &diag_r; + led-running = &power_g; + + led-dsl = &dsl; + led-internet = &router_g; + led-wifi = &wifi_g; + }; + + memory@0 { + reg = <0x0 0x4000000>; + }; + + gpio_poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + power { + label = "power"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 31 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + auto { + label = "auto"; + gpios = <&gpio 48 GPIO_ACTIVE_HIGH>; + linux,code = ; + linux,input-type = ; + }; + + router { + label = "router"; + gpios = <&gpio 2 GPIO_ACTIVE_HIGH>; + linux,code = ; + linux,input-type = ; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + diag_r: diag_r { + label = "wbmr300:red:diag"; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + default_state = "off"; + }; + + wifi_g: wifi_g { + label = "wbmr300:green:wifi"; + gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + }; + + dsl: dsl { + label = "dsl"; + gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; + }; + + router_y: router_y { + label = "wbmr300:yellow:router"; + gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + }; + + wifi_y: wifi_y { + label = "wbmr300:yellow:wifi"; + gpios = <&gpio 9 GPIO_ACTIVE_HIGH>; + }; + + lan1: lan1 { + label = "wbmr300:green:lan1"; + gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; + }; + + wan: wan { + label = "wbmr300:green:wan"; + gpios = <&gpio 12 GPIO_ACTIVE_HIGH>; + }; + + lan3: lan3 { + label = "wbmr300:green:lan3"; + gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; + }; + + lan2: lan2 { + label = "wbmr300:green:lan2"; + gpios = <&gpio 33 GPIO_ACTIVE_HIGH>; + }; + + internet_g: internet_g { + label = "wbmr300:green:internet"; + gpios = <&gpio 34 GPIO_ACTIVE_HIGH>; + }; + + internet_y: internet_y { + label = "wbmr300:yellow:internet"; + gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; + }; + + router_g: router_g { + label = "wbmr300:green:router"; + gpios = <&gpio 36 GPIO_ACTIVE_HIGH>; + }; + + power_g: power_g { + label = "wbmr300:green:power"; + gpios = <&gpio 49 GPIO_ACTIVE_HIGH>; + }; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + + regulator-name = "USB_VBUS"; + + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + + gpio = <&gpio 33 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +ð0 { + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + lantiq,switch; + + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "mii"; + phy-handle = <&phy13>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "mii"; + phy-handle = <&phy14>; + }; + ethernet@3 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "mii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <3>; + phy-mode = "mii"; + phy-handle = <&phy12>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + reg = <0>; + + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy12: ethernet-phy@12 { + reg = <0x12>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + phy14: ethernet-phy@14 { + reg = <0x14>; + compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; + }; + }; +}; + +&gphy0 { + lantiq,gphy-mode = ; +}; + +&gphy1 { + lantiq,gphy-mode = ; +}; + +&gpio { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + phy-rst { + lantiq,pins = "io42"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + }; + pins_spi_default: pins_spi_default { + spi_in { + lantiq,groups = "spi_di"; + lantiq,function = "spi"; + }; + spi_out { + lantiq,groups = "spi_do", "spi_clk", + "spi_cs4"; + lantiq,function = "spi"; + lantiq,output = <1>; + }; + }; +}; + +&spi { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi_default>; + + m25p80@4 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <4 0>; + spi-max-frequency = <20000000>; + + partition@0 { + reg = <0x0 0x10000>; + label = "u-boot"; + read-only; + }; + + partition@10000 { + reg = <0x10000 0x10000>; + label = "gphyfirmware"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0x80000>; + label = "dsl_fw"; + }; + + partition@de0000 { + reg = <0xa0000 0xf40000>; + label = "firmware"; + }; + + partition@fe0000 { + reg = <0xfe0000 0x10000>; + label = "sysconfig"; + read-only; + }; + + partition@ff0000 { + reg = <0xff0000 0x2000>; + label = "ubootconfig"; + }; + + partition@ff3000 { + reg = <0xff3000 0x2000>; + label = "board_config"; + read-only; + }; + }; +}; + +&usb_phy0 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb_phy1 { + status = "okay"; + phy-supply = <&usb_vbus>; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/amazonse.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/amazonse.dtsi new file mode 100644 index 000000000..f216adf36 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/amazonse.dtsi @@ -0,0 +1,204 @@ +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,xway", "lantiq,ase"; + + aliases { + serial0 = &asc1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cpus { + cpu@0 { + compatible = "mips,mips4Kc"; + }; + }; + + memory@0 { + device_type = "memory"; + }; + + biu@1f800000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,biu", "simple-bus"; + reg = <0x1f800000 0x800000>; + ranges = <0x0 0x1f800000 0x7fffff>; + + icu0: icu@80200 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,icu"; + reg = <0x80200 0x28 + 0x80228 0x28 + 0x80250 0x28 + 0x80278 0x28 + 0x802a0 0x28>; + }; + + watchdog@803f0 { + compatible = "lantiq,wdt"; + reg = <0x803f0 0x10>; + }; + }; + + sram@1f000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,sram", "simple-bus"; + reg = <0x1f000000 0x800000>; + ranges = <0x0 0x1f000000 0x7fffff>; + + eiu0: eiu@101000 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,eiu-xway"; + reg = <0x101000 0x1000>; + interrupt-parent = <&icu0>; + lantiq,eiu-irqs = <29 30 31>; + }; + + pmu0: pmu@102000 { + compatible = "lantiq,pmu-xway"; + reg = <0x102000 0x1000>; + }; + + cgu0: cgu@103000 { + compatible = "lantiq,cgu-xway"; + reg = <0x103000 0x1000>; + #clock-cells = <1>; + }; + + rcu0: rcu@203000 { + compatible = "lantiq,ase-rcu", "simple-mfd", "syscon"; + reg = <0x203000 0x1000>; + ranges = <0x0 0x203000 0x100>; + big-endian; + + reset: reset-controller@10 { + compatible = "lantiq,danube-reset"; + reg = <0x10 4>, <0x14 4>; + + #reset-cells = <2>; + }; + + usb_phy: usb2-phy@18 { + compatible = "lantiq,ase-usb2-phy"; + reg = <0x18 4>; + status = "disabled"; + + resets = <&reset 4 4>; + reset-names = "ctrl"; + #phy-cells = <0>; + }; + + reboot@10 { + compatible = "syscon-reboot"; + reg = <0x10 4>; + + regmap = <&rcu0>; + offset = <0x10>; + mask = <0x40000000>; + }; + }; + }; + + fpi@10000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,fpi", "simple-bus"; + ranges = <0x0 0x10000000 0xeefffff>; + reg = <0x10000000 0xef00000>; + + localbus: localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ + 1 0 0x4000000 0x4000010>; /* addsel1 */ + compatible = "lantiq,localbus", "simple-bus"; + }; + + spi: spi@e100800 { + compatible = "lantiq,ase-spi"; + reg = <0xe100800 0x100>; + interrupt-parent = <&icu0>; + interrupts = <24 25 26>; + interrupt-names = "spi_rx", "spi_tx", "spi_err", + "spi_frm"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + }; + + gptu@e100a00 { + compatible = "lantiq,gptu-xway"; + reg = <0xe100a00 0x100>; + interrupt-parent = <&icu0>; + interrupts = <33 34 35 36 37 38>; + }; + + gpio: pinmux@e100b10 { + compatible = "lantiq,ase-pinctrl"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xe100b10 0xa0>; + }; + + asc1: serial@e100c00 { + compatible = "lantiq,asc"; + reg = <0xe100c00 0x400>; + interrupt-parent = <&icu0>; + interrupts = <72 74 75>; + }; + + mei@e116000 { + compatible = "lantiq,mei-xway"; + interrupt-parent = <&icu0>; + interrupts = <81>; + }; + + usb: usb@e101000 { + compatible = "lantiq,ase-usb"; + reg = <0xe101000 0x1000 + 0xe120000 0x3f000>; + interrupt-parent = <&icu0>; + interrupts = <39>; + dr_mode = "host"; + phys = <&usb_phy>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + dma0: dma@e104100 { + compatible = "lantiq,dma-xway"; + reg = <0xe104100 0x800>; + }; + + ebu0: ebu@e105300 { + compatible = "lantiq,ebu-xway"; + reg = <0xe105300 0x100>; + }; + + ppe@e234000 { + compatible = "lantiq,ppe-ase"; + interrupt-parent = <&icu0>; + interrupts = <85>; + }; + + gsw: etop@e180000 { + compatible = "lantiq,etop-xway"; + reg = <0xe180000 0x40000>; + interrupt-parent = <&icu0>; + interrupts = <105 109>; + }; + }; + + adsl { + compatible = "lantiq,adsl-ase"; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ar9.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ar9.dtsi new file mode 100644 index 000000000..48e0d95d6 --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/ar9.dtsi @@ -0,0 +1,268 @@ +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,xway", "lantiq,ar9"; + + aliases { + serial0 = &asc1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cpus { + cpu@0 { + compatible = "mips,mips34K"; + }; + }; + + memory@0 { + device_type = "memory"; + }; + + biu@1f800000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,biu", "simple-bus"; + reg = <0x1f800000 0x800000>; + ranges = <0x0 0x1f800000 0x7fffff>; + + icu0: icu@80200 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,icu"; + reg = <0x80200 0x28 + 0x80228 0x28 + 0x80250 0x28 + 0x80278 0x28 + 0x802a0 0x28>; + }; + + watchdog@803f0 { + compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt"; + reg = <0x803f0 0x10>; + + regmap = <&rcu0>; + }; + }; + + sram@1f000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,sram", "simple-bus"; + reg = <0x1f000000 0x800000>; + ranges = <0x0 0x1f000000 0x7fffff>; + + eiu0: eiu@101000 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,eiu-xway"; + reg = <0x101000 0x1000>; + interrupt-parent = <&icu0>; + lantiq,eiu-irqs = <166 135 66 40 41 42>; + }; + + pmu0: pmu@102000 { + compatible = "lantiq,pmu-xway"; + reg = <0x102000 0x1000>; + }; + + cgu0: cgu@103000 { + compatible = "lantiq,cgu-xway"; + reg = <0x103000 0x1000>; + #clock-cells = <1>; + }; + + rcu0: rcu@203000 { + compatible = "lantiq,xrx100-rcu", "simple-mfd", "syscon"; + reg = <0x203000 0x1000>; + ranges = <0x0 0x203000 0x100>; + big-endian; + + reset: reset-controller@10 { + compatible = "lantiq,xrx100-reset", "lantiq,danube-reset"; + reg = <0x10 4>, <0x14 4>; + + #reset-cells = <2>; + }; + + usb_phy0: usb2-phy@18 { + compatible = "lantiq,xrx100-usb2-phy"; + reg = <0x18 4>; + status = "disabled"; + + resets = <&reset 4 4>; + reset-names = "ctrl"; + #phy-cells = <0>; + }; + + usb_phy1: usb2-phy@34 { + compatible = "lantiq,xrx100-usb2-phy"; + reg = <0x34 4>; + status = "disabled"; + + resets = <&reset 28 28>; + reset-names = "ctrl"; + #phy-cells = <0>; + }; + + reboot@10 { + compatible = "syscon-reboot"; + reg = <0x10 4>; + + regmap = <&rcu0>; + offset = <0x10>; + mask = <0x40000000>; + }; + }; + }; + + fpi@10000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,fpi", "simple-bus"; + ranges = <0x0 0x10000000 0xeefffff>; + reg = <0x10000000 0xef00000>; + + localbus: localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ + 1 0 0x4000000 0x4000010>; /* addsel1 */ + compatible = "lantiq,localbus", "simple-bus"; + }; + + gptu@e100a00 { + compatible = "lantiq,gptu-xway"; + reg = <0xe100a00 0x100>; + interrupt-parent = <&icu0>; + interrupts = <126 127 128 129 130 131>; + }; + + asc0: serial@e100400 { + compatible = "lantiq,asc"; + reg = <0xe100400 0x400>; + interrupt-parent = <&icu0>; + interrupts = <104 105 106>; + status = "disabled"; + }; + + spi: spi@e100800 { + compatible = "lantiq,xrx100-spi"; + reg = <0xe100800 0x100>; + interrupt-parent = <&icu0>; + interrupts = <22 23 24>; + interrupt-names = "spi_rx", "spi_tx", "spi_err", + "spi_frm"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + }; + + gpio: pinmux@e100b10 { + compatible = "lantiq,xrx100-pinctrl"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xe100b10 0xa0>; + }; + + stp: stp@e100bb0 { + #gpio-cells = <2>; + compatible = "lantiq,gpio-stp-xway"; + gpio-controller; + reg = <0xe100bb0 0x40>; + status = "disabled"; + }; + + asc1: serial@e100c00 { + compatible = "lantiq,asc"; + reg = <0xe100c00 0x400>; + interrupt-parent = <&icu0>; + interrupts = <112 113 114>; + }; + + usb0: usb@e101000 { + compatible = "lantiq,arx100-usb"; + reg = <0xe101000 0x1000 + 0xe120000 0x3f000>; + interrupt-parent = <&icu0>; + interrupts = <62 91>; + dr_mode = "host"; + phys = <&usb_phy0>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + usb1: usb@e106000 { + compatible = "lantiq,arx100-usb"; + reg = <0xe106000 0x1000 + 0xe1e0000 0x3f000>; + interrupt-parent = <&icu0>; + interrupts = <91>; + dr_mode = "host"; + phys = <&usb_phy1>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + deu@e103100 { + compatible = "lantiq,deu-arx100"; + reg = <0xe103100 0xf00>; + }; + + dma0: dma@e104100 { + compatible = "lantiq,dma-xway"; + reg = <0xe104100 0x800>; + }; + + ebu0: ebu@e105300 { + compatible = "lantiq,ebu-xway"; + reg = <0xe105300 0x100>; + }; + + mei@e116000 { + compatible = "lantiq,mei-xway"; + interrupt-parent = <&icu0>; + interrupts = <63>; + }; + + gsw: etop@e180000 { + compatible = "lantiq,etop-xway"; + reg = <0xe180000 0x40000 + 0xe108000 0x200>; + interrupt-parent = <&icu0>; + interrupts = <73 72>; + mac-address = [ 00 11 22 33 44 55 ]; + }; + + ppe@e234000 { + compatible = "lantiq,ppe-arx100"; + interrupt-parent = <&icu0>; + interrupts = <96>; + }; + + pci0: pci@e105400 { + status = "disabled"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + compatible = "lantiq,pci-xway"; + bus-range = <0x0 0x0>; + ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ + 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */ + reg = <0x7000000 0x8000 /* config space */ + 0xe105400 0x400>; /* pci bridge */ + lantiq,bus-clock = <33333333>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = <0x7000 0 0 1 &icu0 30 1>; + req-mask = <0x1>; + }; + }; + + adsl { + compatible = "lantiq,adsl-arx100"; + }; +}; diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/danube.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/danube.dtsi new file mode 100644 index 000000000..af4c795af --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/danube.dtsi @@ -0,0 +1,252 @@ +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,xway", "lantiq,danube"; + + aliases { + serial0 = &asc1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cpus { + cpu@0 { + compatible = "mips,mips24Kc"; + }; + }; + + memory@0 { + device_type = "memory"; + }; + + biu@1f800000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,biu", "simple-bus"; + reg = <0x1f800000 0x800000>; + ranges = <0x0 0x1f800000 0x7fffff>; + + icu0: icu@80200 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,icu"; + reg = <0x80200 0x28 + 0x80228 0x28 + 0x80250 0x28 + 0x80278 0x28 + 0x802a0 0x28>; + }; + + watchdog@803f0 { + compatible = "lantiq,wdt"; + reg = <0x803f0 0x10>; + }; + }; + + sram@1f000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,sram", "simple-bus"; + reg = <0x1f000000 0x800000>; + ranges = <0x0 0x1f000000 0x7fffff>; + + eiu0: eiu@101000 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,eiu-xway"; + reg = <0x101000 0x1000>; + interrupt-parent = <&icu0>; + lantiq,eiu-irqs = <166 135 66>; + }; + + pmu0: pmu@102000 { + compatible = "lantiq,pmu-xway"; + reg = <0x102000 0x1000>; + }; + + cgu0: cgu@103000 { + compatible = "lantiq,cgu-xway"; + reg = <0x103000 0x1000>; + #clock-cells = <1>; + }; + + vmmc: vmmc@107000 { + status = "disabled"; + compatible = "lantiq,vmmc-xway"; + reg = <0x103000 0x400>; + interrupt-parent = <&icu0>; + interrupts = <150 151 152 153 154 155>; + }; + + rcu0: rcu@203000 { + compatible = "lantiq,danube-rcu", "simple-mfd", "syscon"; + reg = <0x203000 0x1000>; + ranges = <0x0 0x203000 0x100>; + big-endian; + + reset: reset-controller@10 { + compatible = "lantiq,danube-reset"; + reg = <0x10 4>, <0x14 4>; + + #reset-cells = <2>; + }; + + usb_phy: usb2-phy@18 { + compatible = "lantiq,danube-usb2-phy"; + reg = <0x18 4>; + status = "disabled"; + + resets = <&reset 4 4>; + reset-names = "ctrl"; + #phy-cells = <0>; + }; + + reboot@10 { + compatible = "syscon-reboot"; + reg = <0x10 4>; + + regmap = <&rcu0>; + offset = <0x10>; + mask = <0x40000000>; + }; + }; + }; + + fpi@10000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,fpi", "simple-bus"; + ranges = <0x0 0x10000000 0xeefffff>; + reg = <0x10000000 0xef00000>; + + localbus: localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ + 1 0 0x4000000 0x4000010>; /* addsel1 */ + compatible = "lantiq,localbus", "simple-bus"; + + gpiomm: gpiomm@1 { + compatible = "lantiq,gpio-mm"; + reg = <1 0x0 0x10 >; + #address-cells = <1>; + #size-cells = <1>; + #gpio-cells = <2>; + gpio-controller; + status = "disabled"; + }; + }; + + gptu@e100a00 { + compatible = "lantiq,gptu-xway"; + reg = <0xe100a00 0x100>; + interrupt-parent = <&icu0>; + interrupts = <126 127 128 129 130 131>; + }; + + gpios: stp@e100bb0 { + #gpio-cells = <2>; + compatible = "lantiq,gpio-stp-xway"; + gpio-controller; + reg = <0xe100bb0 0x40>; + lantiq,shadow = <0xfff>; + lantiq,groups = <0x3>; + status = "disabled"; + }; + + asc0: serial@e100400 { + compatible = "lantiq,asc"; + reg = <0xe100400 0x400>; + interrupt-parent = <&icu0>; + interrupts = <104 105 106>; + status = "disabled"; + }; + + gpio: pinmux@e100b10 { + compatible = "lantiq,danube-pinctrl"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xe100b10 0xa0>; + }; + + asc1: serial@e100c00 { + compatible = "lantiq,asc"; + reg = <0xe100c00 0x400>; + interrupt-parent = <&icu0>; + interrupts = <112 113 114>; + }; + + usb: usb@e101000 { + compatible = "lantiq,danube-usb"; + reg = <0xe101000 0x1000 + 0xe120000 0x3f000>; + interrupt-parent = <&icu0>; + interrupts = <62>; + dr_mode = "host"; + phys = <&usb_phy>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + deu@e103100 { + compatible = "lantiq,deu-danube"; + reg = <0xe103100 0xf00>; + }; + + dma0: dma@e104100 { + compatible = "lantiq,dma-xway"; + reg = <0xe104100 0x800>; + }; + + ebu0: ebu@e105300 { + compatible = "lantiq,ebu-xway"; + reg = <0xe105300 0x100>; + }; + + mei@e116000 { + compatible = "lantiq,mei-xway"; + interrupt-parent = <&icu0>; + interrupts = <63>; + }; + + gsw: etop@e180000 { + compatible = "lantiq,etop-xway"; + reg = <0xe180000 0x40000>; + interrupt-parent = <&icu0>; + interrupts = <73 78>; + mac-address = [ 00 11 22 33 44 55 ]; + }; + + ppe@e234000 { + compatible = "lantiq,ppe-danube"; + interrupt-parent = <&icu0>; + interrupts = <96>; + }; + + pci0: pci@e105400 { + status = "disabled"; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + compatible = "lantiq,pci-xway"; + bus-range = <0x0 0x0>; + ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ + 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */ + reg = <0x7000000 0x8000 /* config space */ + 0xe105400 0x400>; /* pci bridge */ + lantiq,bus-clock = <33333333>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */ + req-mask = <0x1>; /* GNT1 */ + }; + }; + + adsl { + compatible = "lantiq,adsl-danube"; + }; +}; diff --git a/target/linux/lantiq/dts/falcon-sflash-16M.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/falcon-sflash-16M.dtsi similarity index 100% rename from target/linux/lantiq/dts/falcon-sflash-16M.dtsi rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/falcon-sflash-16M.dtsi diff --git a/target/linux/lantiq/dts/falcon.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/falcon.dtsi similarity index 100% rename from target/linux/lantiq/dts/falcon.dtsi rename to target/linux/lantiq/files-4.14/arch/mips/boot/dts/falcon.dtsi diff --git a/target/linux/lantiq/files-4.14/arch/mips/boot/dts/vr9.dtsi b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/vr9.dtsi new file mode 100644 index 000000000..1bc1d608b --- /dev/null +++ b/target/linux/lantiq/files-4.14/arch/mips/boot/dts/vr9.dtsi @@ -0,0 +1,339 @@ +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,xway", "lantiq,vr9"; + + aliases { + serial0 = &asc1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cpus { + cpu@0 { + compatible = "mips,mips34Kc"; + }; + }; + + memory@0 { + device_type = "memory"; + }; + + cputemp@0 { + compatible = "lantiq,cputemp"; + }; + + biu@1f800000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,biu", "simple-bus"; + reg = <0x1f800000 0x800000>; + ranges = <0x0 0x1f800000 0x7fffff>; + + icu0: icu@80200 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,icu"; + reg = <0x80200 0x28 + 0x80228 0x28 + 0x80250 0x28 + 0x80278 0x28 + 0x802a0 0x28>; + }; + + watchdog@803f0 { + compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt"; + reg = <0x803f0 0x10>; + + regmap = <&rcu0>; + }; + }; + + sram@1f000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,sram", "simple-bus"; + reg = <0x1f000000 0x800000>; + ranges = <0x0 0x1f000000 0x7fffff>; + + eiu0: eiu@101000 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,eiu-xway"; + reg = <0x101000 0x1000>; + interrupt-parent = <&icu0>; + lantiq,eiu-irqs = <166 135 66 40 41 42>; + }; + + pmu0: pmu@102000 { + compatible = "lantiq,pmu-xway"; + reg = <0x102000 0x1000>; + }; + + cgu0: cgu@103000 { + compatible = "lantiq,cgu-xway"; + reg = <0x103000 0x1000>; + }; + + dcdc@106a00 { + compatible = "lantiq,dcdc-xrx200"; + reg = <0x106a00 0x200>; + }; + + vmmc: vmmc@103000 { + status = "disabled"; + compatible = "lantiq,vmmc-xway"; + reg = <0x103000 0x400>; + interrupt-parent = <&icu0>; + interrupts = <150 151 152 153 154 155>; + }; + + rcu0: rcu@203000 { + compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon"; + reg = <0x203000 0x100>; + ranges = <0x0 0x203000 0x100>; + big-endian; + + gphy0: gphy@20 { + compatible = "lantiq,xrx200-gphy"; + reg = <0x20 0x4>; + + resets = <&reset0 31 30>, <&reset1 7 7>; + reset-names = "gphy", "gphy2"; + }; + + gphy1: gphy@68 { + compatible = "lantiq,xrx200-gphy"; + reg = <0x68 0x4>; + + resets = <&reset0 29 28>, <&reset1 6 6>; + reset-names = "gphy", "gphy2"; + }; + + reset0: reset-controller@10 { + compatible = "lantiq,xrx200-reset"; + reg = <0x10 4>, <0x14 4>; + + #reset-cells = <2>; + }; + + reset1: reset-controller@48 { + compatible = "lantiq,xrx200-reset"; + reg = <0x48 4>, <0x24 4>; + + #reset-cells = <2>; + }; + + usb_phy0: usb2-phy@18 { + compatible = "lantiq,xrx200-usb2-phy"; + reg = <0x18 4>, <0x38 4>; + status = "disabled"; + + resets = <&reset1 4 4>, <&reset0 4 4>; + reset-names = "phy", "ctrl"; + #phy-cells = <0>; + }; + + usb_phy1: usb2-phy@34 { + compatible = "lantiq,xrx200-usb2-phy"; + reg = <0x34 4>, <0x3c 4>; + status = "disabled"; + + resets = <&reset1 5 4>, <&reset0 4 4>; + reset-names = "phy", "ctrl"; + #phy-cells = <0>; + }; + + reboot@10 { + compatible = "syscon-reboot"; + reg = <0x10 4>; + + regmap = <&rcu0>; + offset = <0x10>; + mask = <0xe0000000>; + }; + }; + }; + + fpi@10000000 { + compatible = "lantiq,xrx200-fpi", "simple-bus"; + ranges = <0x0 0x10000000 0xf000000>; + reg = <0x1f400000 0x1000>, + <0x10000000 0xf000000>; + regmap = <&rcu0>; + offset-endianness = <0x4c>; + #address-cells = <1>; + #size-cells = <1>; + + localbus: localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ + 1 0 0x4000000 0x4000010>; /* addsel1 */ + compatible = "lantiq,localbus", "simple-bus"; + }; + + gptu@e100a00 { + compatible = "lantiq,gptu-xway"; + reg = <0xe100a00 0x100>; + interrupt-parent = <&icu0>; + interrupts = <126 127 128 129 130 131>; + }; + + usif: usif@da00000 { + compatible = "lantiq,usif"; + reg = <0xda00000 0x1000000>; + interrupt-parent = <&icu0>; + interrupts = <29 125 107 108 109 110>; + status = "disabled"; + }; + + spi: spi@e100800 { + compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi"; + reg = <0xe100800 0x100>; + interrupt-parent = <&icu0>; + interrupts = <22 23 24>; + interrupt-names = "spi_rx", "spi_tx", "spi_err", + "spi_frm"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + }; + + gpio: pinmux@e100b10 { + compatible = "lantiq,xrx200-pinctrl"; + #gpio-cells = <2>; + gpio-controller; + reg = <0xe100b10 0xa0>; + }; + + stp: stp@e100bb0 { + status = "disabled"; + compatible = "lantiq,gpio-stp-xway"; + reg = <0xe100bb0 0x40>; + #gpio-cells = <2>; + gpio-controller; + + lantiq,shadow = <0xffffff>; + lantiq,groups = <0x7>; + lantiq,dsl = <0x0>; + lantiq,phy1 = <0x0>; + lantiq,phy2 = <0x0>; + }; + + asc1: serial@e100c00 { + compatible = "lantiq,asc"; + reg = <0xe100c00 0x400>; + interrupt-parent = <&icu0>; + interrupts = <112 113 114>; + }; + + deu@e103100 { + compatible = "lantiq,deu-xrx200"; + reg = <0xe103100 0xf00>; + }; + + dma0: dma@e104100 { + compatible = "lantiq,dma-xway"; + reg = <0xe104100 0x800>; + }; + + ebu0: ebu@e105300 { + compatible = "lantiq,ebu-xway"; + reg = <0xe105300 0x100>; + }; + + usb0: usb@e101000 { + status = "disabled"; + compatible = "lantiq,xrx200-usb"; + reg = <0xe101000 0x1000 + 0xe120000 0x3f000>; + interrupt-parent = <&icu0>; + interrupts = <62 91>; + dr_mode = "host"; + phys = <&usb_phy0>; + phy-names = "usb2-phy"; + }; + + usb1: usb@e106000 { + status = "disabled"; + compatible = "lantiq,xrx200-usb"; + reg = <0xe106000 0x1000>; + interrupt-parent = <&icu0>; + interrupts = <91>; + dr_mode = "host"; + phys = <&usb_phy1>; + phy-names = "usb2-phy"; + }; + + eth0: eth@e108000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-net"; + reg = < 0xe108000 0x3000 /* switch */ + 0xe10b100 0x70 /* mdio */ + 0xe10b1d8 0x30 /* mii */ + 0xe10b308 0x30 /* pmac */ + >; + interrupt-parent = <&icu0>; + interrupts = <75 73 72>; + resets = <&reset0 21 16>, <&reset0 8 8>; + reset-names = "switch", "ppe"; + lantiq,phys = <&gphy0>, <&gphy1>; + }; + + mei@e116000 { + compatible = "lantiq,mei-xrx200"; + reg = <0xe116000 0x9c>; + interrupt-parent = <&icu0>; + interrupts = <63>; + }; + + ppe@e234000 { + compatible = "lantiq,ppe-xrx200"; + interrupt-parent = <&icu0>; + interrupts = <96>; + }; + + pcie0: pcie@d900000 { + compatible = "lantiq,pcie-xrx200"; + + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + + interrupt-parent = <&icu0>; + interrupts = <161 144>; + + device_type = "pci"; + + gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>; + }; + + pci0: pci@e105400 { + status = "disabled"; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + compatible = "lantiq,pci-xway"; + bus-range = <0x0 0x0>; + ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ + 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */ + reg = <0x7000000 0x8000 /* config space */ + 0xe105400 0x400>; /* pci bridge */ + lantiq,bus-clock = <33333333>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */ + req-mask = <0x1>; /* GNT1 */ + }; + }; + + vdsl { + compatible = "lantiq,vdsl-vrx200"; + }; +}; diff --git a/target/linux/lantiq/dts/ACMP252.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ACMP252.dts similarity index 100% rename from target/linux/lantiq/dts/ACMP252.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ACMP252.dts diff --git a/target/linux/lantiq/dts/ALL0333CJ.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ALL0333CJ.dts similarity index 100% rename from target/linux/lantiq/dts/ALL0333CJ.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ALL0333CJ.dts diff --git a/target/linux/lantiq/dts/ARV4510PW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4510PW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV4510PW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4510PW.dts diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4518PWR01.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4518PWR01.dts new file mode 100644 index 000000000..34f868f48 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4518PWR01.dts @@ -0,0 +1,8 @@ +/dts-v1/; + +#include "ARV4518PWR01.dtsi" + +/ { + compatible = "arcadyan,arv4518pwr01", "lantiq,xway", "lantiq,danube"; + model = "SMC7908A-ISP"; +}; diff --git a/target/linux/lantiq/dts/ARV4518PWR01.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4518PWR01.dtsi similarity index 100% rename from target/linux/lantiq/dts/ARV4518PWR01.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4518PWR01.dtsi diff --git a/target/linux/lantiq/dts/ARV4518PWR01A.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4518PWR01A.dts similarity index 100% rename from target/linux/lantiq/dts/ARV4518PWR01A.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4518PWR01A.dts diff --git a/target/linux/lantiq/dts/ARV4519PW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4519PW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV4519PW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4519PW.dts diff --git a/target/linux/lantiq/dts/ARV4520PW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4520PW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV4520PW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4520PW.dts diff --git a/target/linux/lantiq/dts/ARV4525PW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4525PW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV4525PW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV4525PW.dts diff --git a/target/linux/lantiq/dts/ARV452CQW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV452CQW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV452CQW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV452CQW.dts diff --git a/target/linux/lantiq/dts/ARV7506PW11.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7506PW11.dts similarity index 100% rename from target/linux/lantiq/dts/ARV7506PW11.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7506PW11.dts diff --git a/target/linux/lantiq/dts/ARV7510PW22.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7510PW22.dts similarity index 100% rename from target/linux/lantiq/dts/ARV7510PW22.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7510PW22.dts diff --git a/target/linux/lantiq/dts/ARV7518PW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7518PW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV7518PW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7518PW.dts diff --git a/target/linux/lantiq/dts/ARV7519PW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7519PW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV7519PW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7519PW.dts diff --git a/target/linux/lantiq/dts/ARV7519RW22.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7519RW22.dts similarity index 97% rename from target/linux/lantiq/dts/ARV7519RW22.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7519RW22.dts index 9e2ae9d6f..0bdc150a1 100644 --- a/target/linux/lantiq/dts/ARV7519RW22.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7519RW22.dts @@ -99,8 +99,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy22f_a1x.bin"; /*VR9 1.1*/ - firmware2 = "lantiq/vr9_phy22f_a2x.bin"; /*VR9 1.2*/ + firmware1 = "lantiq/xrx200_phy22f_a14.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/xrx200_phy22f_a22.bin"; /*VR9 1.2*/ phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/ARV7525PW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7525PW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV7525PW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV7525PW.dts diff --git a/target/linux/lantiq/dts/ARV752DPW.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV752DPW.dts similarity index 100% rename from target/linux/lantiq/dts/ARV752DPW.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV752DPW.dts diff --git a/target/linux/lantiq/dts/ARV752DPW22.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV752DPW22.dts similarity index 100% rename from target/linux/lantiq/dts/ARV752DPW22.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV752DPW22.dts diff --git a/target/linux/lantiq/dts/ARV8539PW22.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV8539PW22.dts similarity index 100% rename from target/linux/lantiq/dts/ARV8539PW22.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ARV8539PW22.dts diff --git a/target/linux/lantiq/dts/ASL56026.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ASL56026.dts similarity index 96% rename from target/linux/lantiq/dts/ASL56026.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ASL56026.dts index 293a3e27d..2037f40f0 100644 --- a/target/linux/lantiq/dts/ASL56026.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ASL56026.dts @@ -77,8 +77,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy22f_a1x.bin"; /*VR9 1.1*/ - firmware2 = "lantiq/vr9_phy22f_a2x.bin"; /*VR9 1.2*/ + firmware1 = "lantiq/xrx200_phy22f_a14.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/xrx200_phy22f_a22.bin"; /*VR9 1.2*/ phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/BTHOMEHUBV2B.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/BTHOMEHUBV2B.dts similarity index 100% rename from target/linux/lantiq/dts/BTHOMEHUBV2B.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/BTHOMEHUBV2B.dts diff --git a/target/linux/lantiq/dts/BTHOMEHUBV3A.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/BTHOMEHUBV3A.dts similarity index 100% rename from target/linux/lantiq/dts/BTHOMEHUBV3A.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/BTHOMEHUBV3A.dts diff --git a/target/linux/lantiq/dts/BTHOMEHUBV5A.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/BTHOMEHUBV5A.dts similarity index 98% rename from target/linux/lantiq/dts/BTHOMEHUBV5A.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/BTHOMEHUBV5A.dts index 4bdeddcaf..2f7507469 100644 --- a/target/linux/lantiq/dts/BTHOMEHUBV5A.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/BTHOMEHUBV5A.dts @@ -118,8 +118,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/ - firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/ + firmware1 = "lantiq/xrx200_phy11g_a14.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/xrx200_phy11g_a22.bin"; /*VR9 1.2*/ phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/DGN1000B.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN1000B.dts similarity index 100% rename from target/linux/lantiq/dts/DGN1000B.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN1000B.dts diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500.dts new file mode 100644 index 000000000..98a2ebd98 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500.dts @@ -0,0 +1,8 @@ +/dts-v1/; + +#include "DGN3500.dtsi" + +/ { + compatible = "netgear,dgn3500", "lantiq,xway", "lantiq,ar9"; + model = "Netgear DGN3500"; +}; diff --git a/target/linux/lantiq/dts/DGN3500.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500.dtsi similarity index 100% rename from target/linux/lantiq/dts/DGN3500.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500.dtsi diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500B.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500B.dts new file mode 100644 index 000000000..d1d788cc7 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DGN3500B.dts @@ -0,0 +1,8 @@ +/dts-v1/; + +#include "DGN3500.dtsi" + +/ { + compatible = "netgear,dgn3500b", "lantiq,xway", "lantiq,ar9"; + model = "Netgear DGN3500B"; +}; diff --git a/target/linux/lantiq/dts/DM200.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DM200.dts similarity index 98% rename from target/linux/lantiq/dts/DM200.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/DM200.dts index eef408491..3c8a2a1fa 100644 --- a/target/linux/lantiq/dts/DM200.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/DM200.dts @@ -56,7 +56,7 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware = "lantiq/vr9_phy22f_a2x.bin"; + firmware = "lantiq/xrx200_phy22f_a22.bin"; phys = [ 01 ]; }; diff --git a/target/linux/lantiq/dts/EASY50712.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY50712.dts similarity index 100% rename from target/linux/lantiq/dts/EASY50712.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY50712.dts diff --git a/target/linux/lantiq/dts/EASY50810.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY50810.dts similarity index 100% rename from target/linux/lantiq/dts/EASY50810.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY50810.dts diff --git a/target/linux/lantiq/dts/EASY80920.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY80920.dtsi similarity index 98% rename from target/linux/lantiq/dts/EASY80920.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY80920.dtsi index 3565842f2..b19b9713f 100644 --- a/target/linux/lantiq/dts/EASY80920.dtsi +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY80920.dtsi @@ -106,8 +106,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy11g_a1x.bin"; - firmware2 = "lantiq/vr9_phy11g_a2x.bin"; + firmware1 = "lantiq/xrx200_phy11g_a14.bin"; + firmware2 = "lantiq/xrx200_phy11g_a22.bin"; phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/EASY80920NAND.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY80920NAND.dts similarity index 100% rename from target/linux/lantiq/dts/EASY80920NAND.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY80920NAND.dts diff --git a/target/linux/lantiq/dts/EASY80920NOR.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY80920NOR.dts similarity index 100% rename from target/linux/lantiq/dts/EASY80920NOR.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY80920NOR.dts diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY88388.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY88388.dts new file mode 100644 index 000000000..a9c5b3c24 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY88388.dts @@ -0,0 +1,106 @@ +/dts-v1/; + +#include +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon FTTDP8 Reference Board"; + compatible = "lantiq,easy88388", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + gpio-keys { + compatible = "gpio-keys"; + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <0x198>; + }; + }; + + pinctrl { + led_pins: led-pins { + lantiq,pins = "io34", "io35", "io36", "io37", "io38", + "io39", "io40", "io41"; + lantiq,function = "gpio"; + }; + }; + + easy88388-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins &bootled_pins>; + + GPON { + label = "easy88388:green:gpon"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + TEST { + label = "easy88388:green:test"; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + STATUS { + label = "easy88388:green:status"; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + ERROR { + label = "easy88388:red:error"; + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + DSL1 { + label = "easy88388:dsl:1"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + DSL2 { + label = "easy88388:dsl:2"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + DSL3 { + label = "easy88388:dsl:3"; + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + DSL4 { + label = "easy88388:dsl:4"; + gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + DSL5 { + label = "easy88388:dsl:5"; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + DSL6 { + label = "easy88388:dsl:6"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + DSL7 { + label = "easy88388:dsl:7"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + DSL8 { + label = "easy88388:dsl:8"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + }; +}; + diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY88444.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY88444.dts new file mode 100644 index 000000000..ceb81ea13 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY88444.dts @@ -0,0 +1,80 @@ +/dts-v1/; + +#include +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon FTTdp G.FAST Reference Board"; + compatible = "lantiq,easy88444", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + gpio-keys { + compatible = "gpio-keys"; + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <0x198>; + }; + }; + + pinctrl { + led_pins: led-pins { + lantiq,pins = "io34", "io35", "io37"; + lantiq,function = "gpio"; + }; + }; + + easy88444-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins &bootled_pins>; + + GPON { + label = "easy88444:green:gpon"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + TEST { + label = "easy88444:green:test"; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + STATUS { + label = "easy88444:green:status"; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + GFAST1 { + label = "easy88444:gfast:1"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + GFAST2 { + label = "easy88444:gfast:2"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + GFAST3 { + label = "easy88444:gfast:3"; + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + GFAST4 { + label = "easy88444:gfast:4"; + gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + }; +}; + diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000-base.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000-base.dtsi new file mode 100644 index 000000000..cfe1140ac --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000-base.dtsi @@ -0,0 +1,110 @@ + +#include +#include + +/ { + compatible = "lantiq,easy98000", "lantiq,falcon"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; + }; + + easy98000-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&bootled_pins>; + + LED_0 { + label = "easy98000:green:gpon"; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_1 { + label = "easy98000:red:gpon"; + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_2 { + label = "easy98000:green:gpon_tx"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_3 { + label = "easy98000:green:gpon_rx"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_4 { + label = "easy98000:green:voice"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_5 { + label = "easy98000:green:status"; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + }; +}; + +&ebu_cs1 { + eth0: ethernet@0000000 { + compatible = "davicom,dm9000"; + device_type = "network"; + reg = <0x0000003 0x1>, <0x0000001 0x1>; + reg-names = "addr", "data"; + interrupt-parent = <&gpio1>; + #interrupt-cells = <2>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + + cpld@3c00000 { + compatible = "lantiq,easy98000_addon"; + reg = <0x3c00000 0x2>; + }; + + cpld@3c0000c { + compatible = "lantiq,easy98000_cpld_led"; + reg = <0x3c0000c 0x2>, <0x3c00012 0x2>; + }; +}; + +/* // enable this for second uart: +&serial1 { + status = "okay"; +};*/ + +&spi { + status = "okay"; + + eeprom@1 { + compatible = "atmel,at25", "atmel,at25160n"; + reg = <2>; + spi-max-frequency = <1000000>; + spi-cpha; + spi-cpol; + + pagesize = <32>; + size = <2048>; + address-width = <16>; + }; +}; + +&i2c { + status = "okay"; + + clock-frequency = <100000>; + + /* eeprom-emulation by OMU */ + eeprom@50 { + compatible = "at,24c02"; + reg = <0x50>; + }; + eeprom@51 { + compatible = "at,24c02"; + reg = <0x51>; + }; +}; + diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000NAND.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000NAND.dts new file mode 100644 index 000000000..a40cef393 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000NAND.dts @@ -0,0 +1,40 @@ +/dts-v1/; + +#include "falcon.dtsi" +#include "EASY98000-base.dtsi" + +/ { + model = "Lantiq Falcon (NAND)"; + compatible = "lantiq,easy98000-nand", "lantiq,easy98000", "lantiq,falcon"; + + aliases { + spi0 = &spi; + }; +}; + +&ebu_cs0 { + gen_nand@0 { + compatible = "gen_nand", "lantiq,nand-falcon"; + bank-width = <1>; + reg = <0x0 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + linux,mtd-name = "gen_nand"; + bbt-use-flash; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x40000 0x40000>; + }; + + partition@20000 { + label = "linux"; + reg = <0x80000 0x3d0000>; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000NOR.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000NOR.dts new file mode 100644 index 000000000..ad53bf96e --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000NOR.dts @@ -0,0 +1,38 @@ +/dts-v1/; + +#include "falcon.dtsi" +#include "EASY98000-base.dtsi" + +/ { + model = "Lantiq Falcon (NOR)"; + compatible = "lantiq,easy98000-nor", "lantiq,easy98000", "lantiq,falcon"; + + aliases { + spi0 = &spi; + }; +}; + +&ebu_cs0 { + cfi@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0x0 0x4000000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + }; + + partition@10000 { + label = "uboot_env"; + reg = <0x40000 0x40000>; + }; + + partition@20000 { + label = "linux"; + reg = <0x80000 0x3d0000>; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000SFLASH.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000SFLASH.dts new file mode 100644 index 000000000..bbe524e94 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98000SFLASH.dts @@ -0,0 +1,16 @@ +/dts-v1/; + +#include "falcon.dtsi" +#include "EASY98000-base.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon (SFLASH)"; + compatible = "lantiq,easy98000-sflash", "lantiq,easy98000", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + spi1 = &spi; + }; +}; + diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98020.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98020.dts new file mode 100644 index 000000000..c0970ef48 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98020.dts @@ -0,0 +1,95 @@ +/dts-v1/; + +#include + +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon Reference Board"; + compatible = "lantiq,easy98020", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + gpio-keys { + compatible = "gpio-keys"; + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <0x198>; + }; + }; + + pinctrl { + led_pins: phy-led-pins { + lantiq,pins = "io42", "io41", "io38", "io37"; + lantiq,function = "gpio"; + }; + }; + + easy98020-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&bootled_pins>; + + GPON { + label = "easy98020:green:gpon"; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + TEST { + label = "easy98020:green:test"; + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + ETH { + label = "easy98020:green:status"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + VOICE { + label = "easy98020:green:voice"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + VIDEO { + label = "easy98020:green:video"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + }; + + easy98020-phy-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + GE0_ACT { + label = "easy98020:ge0_act"; + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + GE0_LINK { + label = "easy98020:ge0_link"; + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + GE1_ACT { + label = "easy98020:ge1_act"; + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + GE1_LINK { + label = "easy98020:ge1_link"; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98020V18.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98020V18.dts new file mode 100644 index 000000000..9aa1be91e --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98020V18.dts @@ -0,0 +1,68 @@ +/dts-v1/; + +#include + +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon Reference Board V1.8"; + compatible = "lantiq,easy98020-v18", "lantiq,easy98020", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + gpio-keys { + compatible = "gpio-keys"; + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <0x198>; + }; + }; + + pinctrl { + led_pins: led-pins { + lantiq,pins = "io11", "io14", "io36", "io37", "io38"; + lantiq,function = "gpio"; + }; + }; + + easy98020-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins &bootled_pins>; + + GPON { + label = "easy98020:green:gpon"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + TEST { + label = "easy98020:green:test"; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + ETH { + label = "easy98020:green:status"; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + VOICE { + label = "easy98020:green:voice"; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + VIDEO { + label = "easy98020:green:video"; + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98021.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98021.dts new file mode 100644 index 000000000..7b2e490fc --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98021.dts @@ -0,0 +1,81 @@ +/dts-v1/; + +#include + +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon HGU Reference Board"; + compatible = "lantiq,easy98021", "lantiq,easy98020", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + gpio-keys { + compatible = "gpio-keys"; + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = <0x198>; + }; + }; + + gpio-mmc { + /* Place-holder for SIM-Card connector, + to list the used GPIOs, no official binding */ + compatible = "gpio-mmc"; + gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>, + <&gpio0 3 GPIO_ACTIVE_HIGH>, + <&gpio0 2 GPIO_ACTIVE_HIGH>, + <0>; /* no CS */ + gpio-names = "di", "do", "clk", "cs"; + reset-gpio = <&gpio3 24 GPIO_ACTIVE_HIGH>; + }; + + pinctrl { + led_pins: led-pins { + lantiq,pins = "io11", "io14", "io36", "io37", "io38"; + lantiq,function = "gpio"; + }; + }; + + easy98021-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins &bootled_pins>; + + GPON { + label = "easy98021:green:gpon"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + TEST { + label = "easy98021:red:test"; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + ETH { + label = "easy98021:green:status"; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + VOICE { + label = "easy98021:green:voice"; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + SIMCARD { + label = "easy98021:green:simcard"; + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + }; +}; + diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98035SYNCE.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98035SYNCE.dts new file mode 100644 index 000000000..df941cdb6 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98035SYNCE.dts @@ -0,0 +1,76 @@ +/dts-v1/; + +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon SFP Stick with SyncE"; + compatible = "lantiq,easy98035synce", "lantiq,falcon-sfp", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + pinctrl { + compatible = "lantiq,pinctrl-falcon"; + + asc0_func1: func1 { + func1_tx { + lantiq,pins = "io32"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + func1_rx { + lantiq,pins = "io33"; + lantiq,mux = <0>; + }; + }; + asc0_func2: func2 { + func2_tx { + lantiq,pins = "io32"; + lantiq,mux = <0>; + }; + func2_rx { + lantiq,pins = "io33"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + }; + asc0_func3: func3 { + func3_tx { + lantiq,pins = "io32"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + func3_rx { + lantiq,pins = "io33"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + }; + }; + + pinselect-asc0 { + compatible = "lantiq,pinselect-asc0"; + pinctrl-names = "asc0", "func1", "func2", "func3"; + pinctrl-0 = <&asc0_pins>; + pinctrl-1 = <&asc0_func1>; + pinctrl-2 = <&asc0_func2>; + pinctrl-3 = <&asc0_func3>; + }; +}; + +&serial0 { + pinctrl-names = "default"; + /* use "empty" pinctrl to leave setting from u-boot enabled */ + pinctrl-0 = < >; +}; + +&i2c { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98035SYNCE1588.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98035SYNCE1588.dts new file mode 100644 index 000000000..a3abc6e70 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/EASY98035SYNCE1588.dts @@ -0,0 +1,76 @@ +/dts-v1/; + +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon SFP Stick with SyncE/1588"; + compatible = "lantiq,easy98035synce1588", "lantiq,falcon-sfp", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + pinctrl { + compatible = "lantiq,pinctrl-falcon"; + + asc0_func1: func1 { + func1_tx { + lantiq,pins = "io32"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + func1_rx { + lantiq,pins = "io33"; + lantiq,mux = <0>; + }; + }; + asc0_func2: func2 { + func2_tx { + lantiq,pins = "io32"; + lantiq,mux = <0>; + }; + func2_rx { + lantiq,pins = "io33"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + }; + asc0_func3: func3 { + func3_tx { + lantiq,pins = "io32"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + func3_rx { + lantiq,pins = "io33"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + }; + }; + + pinselect-asc0 { + compatible = "lantiq,pinselect-asc0"; + pinctrl-names = "asc0", "func1", "func2", "func3"; + pinctrl-0 = <&asc0_pins>; + pinctrl-1 = <&asc0_func1>; + pinctrl-2 = <&asc0_func2>; + pinctrl-3 = <&asc0_func3>; + }; +}; + +&serial0 { + pinctrl-names = "default"; + /* use "empty" pinctrl to leave setting from u-boot enabled */ + pinctrl-0 = < >; +}; + +&i2c { + status = "okay"; +}; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FALCON-MDU.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FALCON-MDU.dts new file mode 100644 index 000000000..6710bbe98 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FALCON-MDU.dts @@ -0,0 +1,53 @@ +/dts-v1/; + +#include + +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon / Vinax MDU Board"; + compatible = "lantiq,falcon-mdu", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + mdu-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&bootled_pins>; + + LED_0 { + label = "mdu:green:gpon"; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_1 { + label = "mdu:green:status"; + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_2 { + label = "mdu:green:2"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_3 { + label = "mdu:green:3"; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + LED_4 { + label = "mdu:green:4"; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + default-state = "keep"; + }; + }; +}; + diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FALCON-SFP.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FALCON-SFP.dts new file mode 100644 index 000000000..8d45de4eb --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FALCON-SFP.dts @@ -0,0 +1,76 @@ +/dts-v1/; + +#include "falcon.dtsi" +#include "falcon-sflash-16M.dtsi" + +/ { + model = "Lantiq Falcon SFP Stick"; + compatible = "lantiq,falcon-sfp", "lantiq,falcon"; + + aliases { + spi0 = &ebu_cs0; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; // 64M at 0x0 + }; + + pinctrl { + compatible = "lantiq,pinctrl-falcon"; + + asc0_func1: func1 { + func1_tx { + lantiq,pins = "io32"; + lantiq,mux = <1>; + lantiq,output = <0>; + }; + func1_rx { + lantiq,pins = "io33"; + lantiq,mux = <0>; + }; + }; + asc0_func2: func2 { + func2_tx { + lantiq,pins = "io32"; + lantiq,mux = <0>; + }; + func2_rx { + lantiq,pins = "io33"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + }; + asc0_func3: func3 { + func3_tx { + lantiq,pins = "io32"; + lantiq,mux = <1>; + lantiq,output = <0>; + }; + func3_rx { + lantiq,pins = "io33"; + lantiq,mux = <1>; + lantiq,input = <0>; + }; + }; + }; + + pinselect-asc0 { + compatible = "lantiq,pinselect-asc0"; + pinctrl-names = "asc0", "func1", "func2", "func3"; + pinctrl-0 = <&asc0_pins>; + pinctrl-1 = <&asc0_func1>; + pinctrl-2 = <&asc0_func2>; + pinctrl-3 = <&asc0_func3>; + }; +}; + +&serial0 { + pinctrl-names = "default"; + /* use "empty" pinctrl to leave setting from u-boot enabled */ + pinctrl-0 = < >; +}; + +&i2c { + status = "okay"; +}; diff --git a/target/linux/lantiq/dts/FRITZ3370.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ3370.dts similarity index 99% rename from target/linux/lantiq/dts/FRITZ3370.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ3370.dts index 76f7f877b..ef3655de6 100644 --- a/target/linux/lantiq/dts/FRITZ3370.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ3370.dts @@ -121,7 +121,7 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware = "lantiq/vr9_phy11g_a1x.bin"; + firmware = "lantiq/xrx200_phy11g_a14.bin"; phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/FRITZ7320.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ7320.dts similarity index 100% rename from target/linux/lantiq/dts/FRITZ7320.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ7320.dts diff --git a/target/linux/lantiq/dts/FRITZ7360SL.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ7360SL.dts similarity index 98% rename from target/linux/lantiq/dts/FRITZ7360SL.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ7360SL.dts index cf8245140..b16487110 100644 --- a/target/linux/lantiq/dts/FRITZ7360SL.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/FRITZ7360SL.dts @@ -98,7 +98,7 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware = "lantiq/vr9_phy11g_a2x.bin"; + firmware = "lantiq/xrx200_phy11g_a22.bin"; phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/GIGASX76X.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/GIGASX76X.dts similarity index 100% rename from target/linux/lantiq/dts/GIGASX76X.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/GIGASX76X.dts diff --git a/target/linux/lantiq/dts/H201L.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/H201L.dts similarity index 100% rename from target/linux/lantiq/dts/H201L.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/H201L.dts diff --git a/target/linux/lantiq/dts/P2601HNFX.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2601HNFX.dts similarity index 100% rename from target/linux/lantiq/dts/P2601HNFX.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2601HNFX.dts diff --git a/target/linux/lantiq/dts/P2812HNUF1.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2812HNUF1.dts similarity index 100% rename from target/linux/lantiq/dts/P2812HNUF1.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2812HNUF1.dts diff --git a/target/linux/lantiq/dts/P2812HNUF3.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2812HNUF3.dts similarity index 100% rename from target/linux/lantiq/dts/P2812HNUF3.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2812HNUF3.dts diff --git a/target/linux/lantiq/dts/P2812HNUFX.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2812HNUFX.dtsi similarity index 98% rename from target/linux/lantiq/dts/P2812HNUFX.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2812HNUFX.dtsi index 9429d5caf..ec3bd1033 100644 --- a/target/linux/lantiq/dts/P2812HNUFX.dtsi +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/P2812HNUFX.dtsi @@ -131,8 +131,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/ - firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/ + firmware1 = "lantiq/xrx200_phy11g_a14.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/xrx200_phy11g_a22.bin"; /*VR9 1.2*/ phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW8970.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW8970.dts new file mode 100644 index 000000000..25eb3dac6 --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW8970.dts @@ -0,0 +1,8 @@ +/dts-v1/; + +#include "TDW89X0.dtsi" + +/ { + compatible = "tplink,tdw8970", "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9"; + model = "TP-LINK TD-W8970"; +}; diff --git a/target/linux/lantiq/dts/TDW8980.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW8980.dts similarity index 100% rename from target/linux/lantiq/dts/TDW8980.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW8980.dts diff --git a/target/linux/lantiq/dts/TDW89X0.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW89X0.dtsi similarity index 99% rename from target/linux/lantiq/dts/TDW89X0.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW89X0.dtsi index 79bcfc103..a629d92e4 100644 --- a/target/linux/lantiq/dts/TDW89X0.dtsi +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/TDW89X0.dtsi @@ -82,7 +82,7 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware = "lantiq/vr9_phy11g_a2x.bin"; + firmware = "lantiq/xrx200_phy11g_a22.bin"; phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/VG3503J.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VG3503J.dts similarity index 96% rename from target/linux/lantiq/dts/VG3503J.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VG3503J.dts index cb0d5ddec..8a73de9a2 100644 --- a/target/linux/lantiq/dts/VG3503J.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VG3503J.dts @@ -81,8 +81,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/ - firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/ + firmware1 = "lantiq/xrx200_phy11g_a14.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/xrx200_phy11g_a22.bin"; /*VR9 1.2*/ phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/VGV7510KW22.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7510KW22.dtsi similarity index 97% rename from target/linux/lantiq/dts/VGV7510KW22.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7510KW22.dtsi index 2d8e528f4..fb4486aca 100644 --- a/target/linux/lantiq/dts/VGV7510KW22.dtsi +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7510KW22.dtsi @@ -93,8 +93,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy22f_a1x.bin"; /*VR9 1.1*/ - firmware2 = "lantiq/vr9_phy22f_a2x.bin"; /*VR9 1.2*/ + firmware1 = "lantiq/xrx200_phy22f_a14.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/xrx200_phy22f_a22.bin"; /*VR9 1.2*/ phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/VGV7510KW22BRN.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7510KW22BRN.dts similarity index 100% rename from target/linux/lantiq/dts/VGV7510KW22BRN.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7510KW22BRN.dts diff --git a/target/linux/lantiq/dts/VGV7510KW22NOR.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7510KW22NOR.dts similarity index 100% rename from target/linux/lantiq/dts/VGV7510KW22NOR.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7510KW22NOR.dts diff --git a/target/linux/lantiq/dts/VGV7519.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7519.dtsi similarity index 98% rename from target/linux/lantiq/dts/VGV7519.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7519.dtsi index edff93cf4..e807b5271 100644 --- a/target/linux/lantiq/dts/VGV7519.dtsi +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7519.dtsi @@ -119,8 +119,8 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/ - firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/ + firmware1 = "lantiq/xrx200_phy11g_a14.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/xrx200_phy11g_a22.bin"; /*VR9 1.2*/ phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/VGV7519BRN.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7519BRN.dts similarity index 100% rename from target/linux/lantiq/dts/VGV7519BRN.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7519BRN.dts diff --git a/target/linux/lantiq/dts/VGV7519NOR.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7519NOR.dts similarity index 100% rename from target/linux/lantiq/dts/VGV7519NOR.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VGV7519NOR.dts diff --git a/target/linux/lantiq/dts/VR200v.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VR200v.dts similarity index 99% rename from target/linux/lantiq/dts/VR200v.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/VR200v.dts index b063d758c..6eccc5bdd 100644 --- a/target/linux/lantiq/dts/VR200v.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/VR200v.dts @@ -88,7 +88,7 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware = "lantiq/vr9_phy11g_a2x.bin"; + firmware = "lantiq/xrx200_phy11g_a22.bin"; phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/WBMR.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/WBMR.dts similarity index 100% rename from target/linux/lantiq/dts/WBMR.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/WBMR.dts diff --git a/target/linux/lantiq/dts/WBMR300.dts b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/WBMR300.dts similarity index 99% rename from target/linux/lantiq/dts/WBMR300.dts rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/WBMR300.dts index de2be582f..2ecfe4bc9 100644 --- a/target/linux/lantiq/dts/WBMR300.dts +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/WBMR300.dts @@ -76,7 +76,7 @@ gphy-xrx200 { compatible = "lantiq,phy-xrx200"; - firmware = "lantiq/vr9_phy22f_a2x.bin"; + firmware = "lantiq/xrx200_phy22f_a22.bin"; phys = [ 00 01 ]; }; diff --git a/target/linux/lantiq/dts/amazonse.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/amazonse.dtsi similarity index 100% rename from target/linux/lantiq/dts/amazonse.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/amazonse.dtsi diff --git a/target/linux/lantiq/dts/ar9.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/ar9.dtsi similarity index 100% rename from target/linux/lantiq/dts/ar9.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/ar9.dtsi diff --git a/target/linux/lantiq/dts/danube.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/danube.dtsi similarity index 100% rename from target/linux/lantiq/dts/danube.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/danube.dtsi diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/falcon-sflash-16M.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/falcon-sflash-16M.dtsi new file mode 100644 index 000000000..d95acc21e --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/falcon-sflash-16M.dtsi @@ -0,0 +1,37 @@ + +&ebu_cs0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,sflash-falcon", "simple-bus"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl129p0", "spansion,s25fl129p1"; + reg = <0 0>; + linux,mtd-name = "sflash"; + spi-max-frequency = <80000000>; + m25p,fast-read; + + partition@0 { + reg = <0x0 0x40000>; + label = "uboot"; + read-only; + }; + + partition@40000 { + reg = <0x40000 0x80000>; + label = "uboot_env"; + }; + + partition@C0000 { + reg = <0xC0000 0x740000>; + label = "image0"; + }; + + partition@800000 { + reg = <0x800000 0x800000>; + label = "image1"; + }; + }; +}; diff --git a/target/linux/lantiq/files-4.9/arch/mips/boot/dts/falcon.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/falcon.dtsi new file mode 100644 index 000000000..98f71819a --- /dev/null +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/falcon.dtsi @@ -0,0 +1,392 @@ +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,falcon"; + + cpus { + cpu@0 { + compatible = "mips,mips34kc"; + }; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + clocks { + compatible = "simple-bus"; + + cpu_clk: cpu { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + clock-output-names = "cpu"; + }; + + io_clk: io { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + clock-output-names = "io"; + }; + + fpi_clk: fpi { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "fpi"; + }; + }; + + ebu_cs0: localbus@10000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,localbus", "simple-bus"; + reg = <0x10000000 0x4000000>; + ranges = <0x0 0x10000000 0x4000000>; + }; + ebu_cs1: localbus@14000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,localbus", "simple-bus"; + reg = <0x14000000 0x4000000>; + ranges = <0x0 0x14000000 0x4000000>; + }; + + ebu@18000000 { + compatible = "lantiq,ebu-falcon"; + reg = <0x18000000 0x100>; + }; + + sbs2@1D000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,sysb2", "simple-bus"; + reg = <0x1D000000 0x1000000>; + ranges = <0x0 0x1D000000 0x1000000>; + + clock_sysgpe: clock-controller@700000 { + compatible = "lantiq,sysgpe-falcon"; + reg = <0x700000 0x100>; + #clock-cells = <1>; + }; + + mps@4000 { + compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100"; + reg = <0x4000 0x1000>; + interrupt-parent = <&icu0>; + interrupts = <154 155>; + lantiq,mbx = <&mpsmbx>; + }; + + gpio0: gpio@810000 { + compatible = "lantiq,falcon-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&icu0>; + interrupts = <44>; + reg = <0x810000 0x80>; + clocks = <&clock_syseth 16>; + }; + + gpio2: gpio@810100 { + compatible = "lantiq,falcon-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&icu0>; + interrupts = <46>; + reg = <0x810100 0x80>; + clocks = <&clock_syseth 17>; + }; + + clock_syseth: clock-controller@B00000 { + compatible = "lantiq,syseth-falcon"; + reg = <0xB00000 0x100>; + #clock-cells = <1>; + }; + + pad@B01000 { + compatible = "lantiq,pad-falcon"; + reg = <0xB01000 0x100>; + lantiq,bank = <0>; + clocks = <&clock_syseth 20>; + }; + + pad@B02000 { + compatible = "lantiq,pad-falcon"; + reg = <0xB02000 0x100>; + lantiq,bank = <2>; + clocks = <&clock_syseth 21>; + }; + }; + + fpi@1E000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,fpi", "simple-bus"; + reg = <0x1E000000 0x1000000>; + ranges = <0x0 0x1E000000 0x1000000>; + + serial1: serial@100B00 { + status = "disabled"; + compatible = "lantiq,asc"; + reg = <0x100B00 0x100>; + interrupt-parent = <&icu0>; + interrupts = <112 113 114>; + line = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&asc1_pins>; + clocks = <&clock_sys1 11>; + }; + + serial0: serial@100C00 { + compatible = "lantiq,asc"; + reg = <0x100C00 0x100>; + interrupt-parent = <&icu0>; + interrupts = <104 105 106>; + line = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&asc0_pins>; + clocks = <&clock_sys1 12>; + }; + + spi: spi@100D00 { + status = "disabled"; + compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc"; + interrupts = <22 23 24 25>; + interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x100D00 0x100>; + interrupt-parent = <&icu0>; + clocks = <&clock_sys1 13>; + base_cs = <1>; + num_cs = <2>; + }; + + gptc@100E00 { + compatible = "lantiq,gptc-falcon"; + reg = <0x100E00 0x100>; + }; + + i2c: i2c@200000 { + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,lantiq-i2c"; + reg = <0x200000 0x10000>; + interrupt-parent = <&icu0>; + interrupts = <18 19 20 21>; + gpios = <&gpio1 7 0 &gpio1 8 0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c_pins>; + clocks = <&clock_sys1 14>; + }; + + gpio1: gpio@800100 { + compatible = "lantiq,falcon-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&icu0>; + interrupts = <45>; + reg = <0x800100 0x100>; + clocks = <&clock_sys1 16>; + }; + + gpio3: gpio@800200 { + compatible = "lantiq,falcon-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&icu0>; + interrupts = <47>; + reg = <0x800200 0x100>; + clocks = <&clock_sys1 17>; + }; + + gpio4: gpio@800300 { + compatible = "lantiq,falcon-gpio"; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&icu0>; + interrupts = <48>; + reg = <0x800300 0x100>; + clocks = <&clock_sys1 18>; + }; + + pad@800400 { + compatible = "lantiq,pad-falcon"; + reg = <0x800400 0x100>; + lantiq,bank = <1>; + clocks = <&clock_sys1 20>; + }; + + pad@800500 { + compatible = "lantiq,pad-falcon"; + reg = <0x800500 0x100>; + lantiq,bank = <3>; + clocks = <&clock_sys1 21>; + }; + + pad@800600 { + compatible = "lantiq,pad-falcon"; + reg = <0x800600 0x100>; + lantiq,bank = <4>; + clocks = <&clock_sys1 22>; + }; + + status@802000 { + compatible = "lantiq,status-falcon"; + reg = <0x802000 0x80>; + }; + + clock_sys1: clock-controller@F00000 { + compatible = "lantiq,sys1-falcon"; + reg = <0xF00000 0x100>; + #clock-cells = <1>; + }; + }; + + sbs0@1F000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + reg = <0x1F000000 0x400000>; + ranges = <0x0 0x1F000000 0x400000>; + + mpsmbx: mpsmbx@200000 { + reg = <0x200000 0x200>; + }; + }; + + sbs1@1F700000 { + + }; + + biu@1F800000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,biu", "simple-bus"; + reg = <0x1F800000 0x800000>; + ranges = <0x0 0x1F800000 0x800000>; + + icu0: icu@80200 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "lantiq,icu"; + reg = <0x80200 0x28 + 0x80228 0x28 + 0x80250 0x28 + 0x80278 0x28 + 0x802a0 0x28>; + }; + + watchdog@803F0 { + compatible = "lantiq,wdt"; + reg = <0x803F0 0x10>; + clocks = <&io_clk>; /* currently no effect */ + }; + }; + + pinctrl { + compatible = "lantiq,pinctrl-falcon"; + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinctrl0 { + /*ntr { + lantiq,groups = "ntr8k"; + lantiq,function = "ntr"; + };*/ + hrst { + lantiq,groups = "hrst"; + lantiq,function = "rst"; + }; + }; + + asc0_pins: asc0 { + asc0 { + lantiq,groups = "asc0"; + lantiq,function = "asc"; + }; + }; + asc1_pins: asc1 { + asc1 { + lantiq,groups = "asc1"; + lantiq,function = "asc"; + }; + }; + i2c_pins: i2c { + i2c { + lantiq,groups = "i2c"; + lantiq,function = "i2c"; + }; + }; + bootled_pins: bootled { + bootled { + lantiq,groups = "bootled"; + lantiq,function = "led"; + }; + }; + ntr_ntr8k: ntr8k { + ntr8k { + lantiq,groups = "ntr8k"; + lantiq,function = "ntr"; + }; + }; + ntr_pps: pps { + pps { + lantiq,groups = "pps"; + lantiq,function = "ntr"; + }; + }; + ntr_gpio: gpio { + gpio { + lantiq,pins = "io5"; + lantiq,mux = <1>; + lantiq,output = <0>; + }; + }; + slic_pins: slic { + slic { + lantiq,groups = "slic"; + lantiq,function = "slic"; + }; + }; + }; + + pinselect-ntr { + compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr"; + pinctrl-names = "ntr8k", "pps", "gpio"; + pinctrl-0 = <&ntr_ntr8k>; + pinctrl-1 = <&ntr_pps>; + pinctrl-2 = <&ntr_gpio>; + }; + + pinselect-asc1 { + compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1"; + pinctrl-names = "default", "asc1"; + pinctrl-0 = <&slic_pins>; + pinctrl-1 = <&asc1_pins>; + }; + +}; diff --git a/target/linux/lantiq/dts/vr9.dtsi b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/vr9.dtsi similarity index 97% rename from target/linux/lantiq/dts/vr9.dtsi rename to target/linux/lantiq/files-4.9/arch/mips/boot/dts/vr9.dtsi index 13bb002c5..dbcbb3dce 100644 --- a/target/linux/lantiq/dts/vr9.dtsi +++ b/target/linux/lantiq/files-4.9/arch/mips/boot/dts/vr9.dtsi @@ -126,11 +126,11 @@ interrupts = <126 127 128 129 130 131>; }; - asc0: serial@E100400 { - compatible = "lantiq,asc"; - reg = <0xE100400 0x400>; + usif: usif@da00000 { + compatible = "lantiq,usif"; + reg = <0xda00000 0x1000000>; interrupt-parent = <&icu0>; - interrupts = <104 105 106>; + interrupts = <29 125 107 108 109 110>; status = "disabled"; }; diff --git a/target/linux/lantiq/files/firmware/lantiq/vr9_phy11g_a1x.bin b/target/linux/lantiq/files/firmware/lantiq/xrx200_phy11g_a14.bin similarity index 100% rename from target/linux/lantiq/files/firmware/lantiq/vr9_phy11g_a1x.bin rename to target/linux/lantiq/files/firmware/lantiq/xrx200_phy11g_a14.bin diff --git a/target/linux/lantiq/files/firmware/lantiq/vr9_phy11g_a2x.bin b/target/linux/lantiq/files/firmware/lantiq/xrx200_phy11g_a22.bin similarity index 100% rename from target/linux/lantiq/files/firmware/lantiq/vr9_phy11g_a2x.bin rename to target/linux/lantiq/files/firmware/lantiq/xrx200_phy11g_a22.bin diff --git a/target/linux/lantiq/files/firmware/lantiq/vr9_phy22f_a1x.bin b/target/linux/lantiq/files/firmware/lantiq/xrx200_phy22f_a14.bin similarity index 100% rename from target/linux/lantiq/files/firmware/lantiq/vr9_phy22f_a1x.bin rename to target/linux/lantiq/files/firmware/lantiq/xrx200_phy22f_a14.bin diff --git a/target/linux/lantiq/files/firmware/lantiq/vr9_phy22f_a2x.bin b/target/linux/lantiq/files/firmware/lantiq/xrx200_phy22f_a22.bin similarity index 100% rename from target/linux/lantiq/files/firmware/lantiq/vr9_phy22f_a2x.bin rename to target/linux/lantiq/files/firmware/lantiq/xrx200_phy22f_a22.bin diff --git a/target/linux/lantiq/image/Makefile b/target/linux/lantiq/image/Makefile index dcd0c710d..031c3fcb8 100644 --- a/target/linux/lantiq/image/Makefile +++ b/target/linux/lantiq/image/Makefile @@ -39,7 +39,7 @@ endef define Build/fullimage mkimage -A mips -O linux -C lzma -T filesystem -a 0x00 \ - -e 0x00 -n 'OpenWrt RootFS' \ + -e 0x00 -n '$(VERSION_DIST) RootFS' \ -d $(IMAGE_ROOTFS) $(IMAGE_ROOTFS).new cat $(IMAGE_KERNEL) $(IMAGE_ROOTFS).new > $@.tmp @@ -55,12 +55,11 @@ endef # Shared device definition: applies to every defined device define Device/Default PROFILES = Default - KERNEL_DEPENDS = $$(wildcard ../dts/$$(DEVICE_DTS).dts) + KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts) KERNEL_INITRAMFS_NAME = $$(KERNEL_NAME)-initramfs KERNEL := kernel-bin | append-dtb | lzma | uImage lzma KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | uImage lzma FILESYSTEMS := squashfs - DEVICE_DTS_DIR := ../dts IMAGE_SIZE := SUPPORTED_DEVICES := $(subst _,$(comma),$(1)) IMAGES := sysupgrade.bin @@ -102,6 +101,7 @@ endef define Device/AVM KERNEL := kernel-bin | append-dtb | lzma | eva-image + KERNEL_INITRAMFS := $$(KERNEL) IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | append-avm-fakeroot | \ append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) endef @@ -584,6 +584,10 @@ TARGET_DEVICES += bt_homehub-v5a define Device/netgear_dm200 DEVICE_DTS := DM200 IMAGES := sysupgrade.bin factory.img + IMAGE/sysupgrade.bin := append-kernel | \ + pad-offset 64k 64 | append-uImage-fakehdr filesystem | \ + pad-offset 64k 64 | append-uImage-fakehdr filesystem | \ + append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) IMAGE/factory.img := $$(IMAGE/sysupgrade.bin) | netgear-dni IMAGE_SIZE := 7872k DEVICE_TITLE := Netgear DM200 diff --git a/target/linux/lantiq/patches-4.14/0001-MIPS-lantiq-add-pcie-driver.patch b/target/linux/lantiq/patches-4.14/0001-MIPS-lantiq-add-pcie-driver.patch new file mode 100644 index 000000000..77351e179 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0001-MIPS-lantiq-add-pcie-driver.patch @@ -0,0 +1,5520 @@ +From 6f933347d0b4ed02d9534f5fa07f7b99f13eeaa1 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 7 Aug 2014 18:12:28 +0200 +Subject: [PATCH 01/36] MIPS: lantiq: add pcie driver + +Signed-off-by: John Crispin +--- + arch/mips/lantiq/Kconfig | 10 + + arch/mips/lantiq/xway/sysctrl.c | 2 + + arch/mips/pci/Makefile | 2 + + arch/mips/pci/fixup-lantiq-pcie.c | 82 +++ + arch/mips/pci/fixup-lantiq.c | 5 +- + arch/mips/pci/ifxmips_pci_common.h | 57 ++ + arch/mips/pci/ifxmips_pcie.c | 1099 ++++++++++++++++++++++++++++++ + arch/mips/pci/ifxmips_pcie.h | 135 ++++ + arch/mips/pci/ifxmips_pcie_ar10.h | 290 ++++++++ + arch/mips/pci/ifxmips_pcie_msi.c | 392 +++++++++++ + arch/mips/pci/ifxmips_pcie_phy.c | 478 +++++++++++++ + arch/mips/pci/ifxmips_pcie_pm.c | 176 +++++ + arch/mips/pci/ifxmips_pcie_pm.h | 36 + + arch/mips/pci/ifxmips_pcie_reg.h | 1001 +++++++++++++++++++++++++++ + arch/mips/pci/ifxmips_pcie_vr9.h | 271 ++++++++ + arch/mips/pci/pci.c | 25 + + arch/mips/pci/pcie-lantiq.h | 1305 ++++++++++++++++++++++++++++++++++++ + drivers/pci/pcie/aer/Kconfig | 2 +- + include/linux/pci.h | 2 + + include/linux/pci_ids.h | 6 + + 20 files changed, 5374 insertions(+), 2 deletions(-) + create mode 100644 arch/mips/pci/fixup-lantiq-pcie.c + create mode 100644 arch/mips/pci/ifxmips_pci_common.h + create mode 100644 arch/mips/pci/ifxmips_pcie.c + create mode 100644 arch/mips/pci/ifxmips_pcie.h + create mode 100644 arch/mips/pci/ifxmips_pcie_ar10.h + create mode 100644 arch/mips/pci/ifxmips_pcie_msi.c + create mode 100644 arch/mips/pci/ifxmips_pcie_phy.c + create mode 100644 arch/mips/pci/ifxmips_pcie_pm.c + create mode 100644 arch/mips/pci/ifxmips_pcie_pm.h + create mode 100644 arch/mips/pci/ifxmips_pcie_reg.h + create mode 100644 arch/mips/pci/ifxmips_pcie_vr9.h + create mode 100644 arch/mips/pci/pcie-lantiq.h + +--- a/arch/mips/lantiq/Kconfig ++++ b/arch/mips/lantiq/Kconfig +@@ -20,6 +20,7 @@ config SOC_XWAY + bool "XWAY" + select SOC_TYPE_XWAY + select HW_HAS_PCI ++ select ARCH_SUPPORTS_MSI + select MFD_SYSCON + select MFD_CORE + +@@ -52,6 +53,15 @@ config PCI_LANTIQ + bool "PCI Support" + depends on SOC_XWAY && PCI + ++config PCIE_LANTIQ ++ bool "PCIE Support" ++ depends on SOC_XWAY && PCI ++ ++config PCIE_LANTIQ_MSI ++ bool ++ depends on PCIE_LANTIQ && PCI_MSI ++ default y ++ + config XRX200_PHY_FW + bool "XRX200 PHY firmware loader" + depends on SOC_XWAY +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -49,6 +49,8 @@ obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o + obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o + obj-$(CONFIG_SOC_RT288X) += pci-rt2880.o + obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o ++obj-$(CONFIG_PCIE_LANTIQ) += ifxmips_pcie_phy.o ifxmips_pcie.o fixup-lantiq-pcie.o ++obj-$(CONFIG_PCIE_LANTIQ_MSI) += pcie-lantiq-msi.o + obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o + obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o + obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o +--- /dev/null ++++ b/arch/mips/pci/fixup-lantiq-pcie.c +@@ -0,0 +1,74 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_fixup_pcie.c ++** PROJECT : IFX UEIP for VRX200 ++** MODULES : PCIe ++** ++** DATE : 02 Mar 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe Root Complex Driver ++** COPYRIGHT : Copyright (c) 2009 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** HISTORY ++** $Version $Date $Author $Comment ++** 0.0.1 17 Mar,2009 Lei Chuanhua Initial version ++*******************************************************************************/ ++/*! ++ \file ifxmips_fixup_pcie.c ++ \ingroup IFX_PCIE ++ \brief PCIe Fixup functions source file ++*/ ++#include ++#include ++#include ++ ++#include ++ ++#include "pcie-lantiq.h" ++ ++static void ++ifx_pcie_fixup_resource(struct pci_dev *dev) ++{ ++ u32 reg; ++ ++ IFX_PCIE_PRINT(PCIE_MSG_FIXUP, "%s dev %s: enter\n", __func__, pci_name(dev)); ++ ++ printk("%s: fixup host controller %s (%04x:%04x)\n", ++ __func__, pci_name(dev), dev->vendor, dev->device); ++ ++ /* Setup COMMAND register */ ++ reg = PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER /* | ++ PCI_COMMAND_INTX_DISABLE */| PCI_COMMAND_SERR; ++ pci_write_config_word(dev, PCI_COMMAND, reg); ++ IFX_PCIE_PRINT(PCIE_MSG_FIXUP, "%s dev %s: exit\n", __func__, pci_name(dev)); ++} ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INFINEON, PCI_DEVICE_ID_INFINEON_PCIE, ifx_pcie_fixup_resource); ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LANTIQ, PCI_VENDOR_ID_LANTIQ, ifx_pcie_fixup_resource); ++ ++static void ++ifx_pcie_rc_class_early_fixup(struct pci_dev *dev) ++{ ++ IFX_PCIE_PRINT(PCIE_MSG_FIXUP, "%s dev %s: enter\n", __func__, pci_name(dev)); ++ ++ if (dev->devfn == PCI_DEVFN(0, 0) && ++ (dev->class >> 8) == PCI_CLASS_BRIDGE_HOST) { ++ ++ dev->class = (PCI_CLASS_BRIDGE_PCI << 8) | (dev->class & 0xff); ++ ++ printk(KERN_INFO "%s: fixed pcie host bridge to pci-pci bridge\n", __func__); ++ } ++ IFX_PCIE_PRINT(PCIE_MSG_FIXUP, "%s dev %s: exit\n", __func__, pci_name(dev)); ++ mdelay(10); ++} ++ ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INFINEON, PCI_DEVICE_ID_INFINEON_PCIE, ++ ifx_pcie_rc_class_early_fixup); ++ ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LANTIQ, PCI_DEVICE_ID_LANTIQ_PCIE, ++ ifx_pcie_rc_class_early_fixup); +--- a/arch/mips/pci/fixup-lantiq.c ++++ b/arch/mips/pci/fixup-lantiq.c +@@ -8,12 +8,18 @@ + + #include + #include ++#include "ifxmips_pci_common.h" + + int (*ltq_pci_plat_arch_init)(struct pci_dev *dev) = NULL; + int (*ltq_pci_plat_dev_init)(struct pci_dev *dev) = NULL; + + int pcibios_plat_dev_init(struct pci_dev *dev) + { ++#ifdef CONFIG_PCIE_LANTIQ ++ if (pci_find_capability(dev, PCI_CAP_ID_EXP)) ++ ifx_pcie_bios_plat_dev_init(dev); ++#endif ++ + if (ltq_pci_plat_arch_init) + return ltq_pci_plat_arch_init(dev); + +@@ -25,5 +31,10 @@ int pcibios_plat_dev_init(struct pci_dev + + int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) + { ++#ifdef CONFIG_PCIE_LANTIQ ++ if (pci_find_capability(dev, PCI_CAP_ID_EXP)) ++ return ifx_pcie_bios_map_irq(dev, slot, pin); ++#endif ++ + return of_irq_parse_and_map_pci(dev, slot, pin); + } +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pci_common.h +@@ -0,0 +1,57 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pci_common.h ++** PROJECT : IFX UEIP ++** MODULES : PCI subsystem ++** ++** DATE : 30 June 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe Root Complex Driver ++** COPYRIGHT : Copyright (c) 2009 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** HISTORY ++** $Version $Date $Author $Comment ++** 0.0.1 30 June,2009 Lei Chuanhua Initial version ++*******************************************************************************/ ++ ++#ifndef IFXMIPS_PCI_COMMON_H ++#define IFXMIPS_PCI_COMMON_H ++#include ++/*! ++ \defgroup IFX_PCI_COM IFX PCI/PCIe common parts for OS integration ++ \brief PCI/PCIe common parts ++*/ ++ ++/*! ++ \defgroup IFX_PCI_COM_OS OS APIs ++ \ingroup IFX_PCI_COM ++ \brief PCI/PCIe bus driver OS interface functions ++*/ ++/*! ++ \file ifxmips_pci_common.h ++ \ingroup IFX_PCI_COM ++ \brief PCI/PCIe bus driver common OS header file ++*/ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) ++#define IFX_PCI_CONST ++#else ++#define IFX_PCI_CONST const ++#endif ++#ifdef CONFIG_IFX_PCI ++extern int ifx_pci_bios_map_irq(IFX_PCI_CONST struct pci_dev *dev, u8 slot, u8 pin); ++extern int ifx_pci_bios_plat_dev_init(struct pci_dev *dev); ++#endif /* COFNIG_IFX_PCI */ ++ ++#ifdef CONFIG_PCIE_LANTIQ ++extern int ifx_pcie_bios_map_irq(IFX_PCI_CONST struct pci_dev *dev, u8 slot, u8 pin); ++extern int ifx_pcie_bios_plat_dev_init(struct pci_dev *dev); ++#endif ++ ++#endif /* IFXMIPS_PCI_COMMON_H */ ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie.c +@@ -0,0 +1,1092 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ * Copyright (C) 2009 Lei Chuanhua ++ * Copyright (C) 2013 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "ifxmips_pcie.h" ++#include "ifxmips_pcie_reg.h" ++ ++/* Enable 32bit io due to its mem mapped io nature */ ++#define IFX_PCIE_ERROR_INT ++#define IFX_PCIE_IO_32BIT ++ ++#define IFX_PCIE_IR (INT_NUM_IM4_IRL0 + 25) ++#define IFX_PCIE_INTA (INT_NUM_IM4_IRL0 + 8) ++#define IFX_PCIE_INTB (INT_NUM_IM4_IRL0 + 9) ++#define IFX_PCIE_INTC (INT_NUM_IM4_IRL0 + 10) ++#define IFX_PCIE_INTD (INT_NUM_IM4_IRL0 + 11) ++#define MS(_v, _f) (((_v) & (_f)) >> _f##_S) ++#define SM(_v, _f) (((_v) << _f##_S) & (_f)) ++#define IFX_REG_SET_BIT(_f, _r) \ ++ IFX_REG_W32((IFX_REG_R32((_r)) &~ (_f)) | (_f), (_r)) ++ ++#define IFX_PCIE_LTSSM_ENABLE_TIMEOUT 10 ++ ++static DEFINE_SPINLOCK(ifx_pcie_lock); ++ ++u32 g_pcie_debug_flag = PCIE_MSG_ANY & (~PCIE_MSG_CFG); ++ ++static ifx_pcie_irq_t pcie_irqs[IFX_PCIE_CORE_NR] = { ++ { ++ .ir_irq = { ++ .irq = IFX_PCIE_IR, ++ .name = "ifx_pcie_rc0", ++ }, ++ ++ .legacy_irq = { ++ { ++ .irq_bit = PCIE_IRN_INTA, ++ .irq = IFX_PCIE_INTA, ++ }, ++ { ++ .irq_bit = PCIE_IRN_INTB, ++ .irq = IFX_PCIE_INTB, ++ }, ++ { ++ .irq_bit = PCIE_IRN_INTC, ++ .irq = IFX_PCIE_INTC, ++ }, ++ { ++ .irq_bit = PCIE_IRN_INTD, ++ .irq = IFX_PCIE_INTD, ++ }, ++ }, ++ }, ++ ++}; ++ ++void ifx_pcie_debug(const char *fmt, ...) ++{ ++ static char buf[256] = {0}; /* XXX */ ++ va_list ap; ++ ++ va_start(ap, fmt); ++ vsnprintf(buf, sizeof(buf), fmt, ap); ++ va_end(ap); ++ ++ printk("%s", buf); ++} ++ ++ ++static inline int pcie_ltssm_enable(int pcie_port) ++{ ++ int i; ++ ++ /* Enable LTSSM */ ++ IFX_REG_W32(PCIE_RC_CCR_LTSSM_ENABLE, PCIE_RC_CCR(pcie_port)); ++ ++ /* Wait for the link to come up */ ++ for (i = 0; i < IFX_PCIE_LTSSM_ENABLE_TIMEOUT; i++) { ++ if (!(IFX_REG_R32(PCIE_LCTLSTS(pcie_port)) & PCIE_LCTLSTS_RETRAIN_PENDING)) ++ return 0; ++ udelay(10); ++ } ++ ++ printk("%s link timeout!!!!!\n", __func__); ++ return -1; ++} ++ ++static inline void pcie_status_register_clear(int pcie_port) ++{ ++ IFX_REG_W32(0, PCIE_RC_DR(pcie_port)); ++ IFX_REG_W32(0, PCIE_PCICMDSTS(pcie_port)); ++ IFX_REG_W32(0, PCIE_DCTLSTS(pcie_port)); ++ IFX_REG_W32(0, PCIE_LCTLSTS(pcie_port)); ++ IFX_REG_W32(0, PCIE_SLCTLSTS(pcie_port)); ++ IFX_REG_W32(0, PCIE_RSTS(pcie_port)); ++ IFX_REG_W32(0, PCIE_UES_R(pcie_port)); ++ IFX_REG_W32(0, PCIE_UEMR(pcie_port)); ++ IFX_REG_W32(0, PCIE_UESR(pcie_port)); ++ IFX_REG_W32(0, PCIE_CESR(pcie_port)); ++ IFX_REG_W32(0, PCIE_CEMR(pcie_port)); ++ IFX_REG_W32(0, PCIE_RESR(pcie_port)); ++ IFX_REG_W32(0, PCIE_PVCCRSR(pcie_port)); ++ IFX_REG_W32(0, PCIE_VC0_RSR0(pcie_port)); ++ IFX_REG_W32(0, PCIE_TPFCS(pcie_port)); ++ IFX_REG_W32(0, PCIE_TNPFCS(pcie_port)); ++ IFX_REG_W32(0, PCIE_TCFCS(pcie_port)); ++ IFX_REG_W32(0, PCIE_QSR(pcie_port)); ++ IFX_REG_W32(0, PCIE_IOBLSECS(pcie_port)); ++} ++ ++static inline int ifx_pcie_link_up(int pcie_port) ++{ ++ return (IFX_REG_R32(PCIE_PHY_SR(pcie_port)) & PCIE_PHY_SR_PHY_LINK_UP) ? 1 : 0; ++} ++ ++ ++static inline void pcie_mem_io_setup(int pcie_port) ++{ ++ u32 reg; ++ /* ++ * BAR[0:1] readonly register ++ * RC contains only minimal BARs for packets mapped to this device ++ * Mem/IO filters defines a range of memory occupied by memory mapped IO devices that ++ * reside on the downstream side fo the bridge. ++ */ ++ reg = SM((PCIE_MEM_PHY_PORT_TO_END(pcie_port) >> 20), PCIE_MBML_MEM_LIMIT_ADDR) ++ | SM((PCIE_MEM_PHY_PORT_TO_BASE(pcie_port) >> 20), PCIE_MBML_MEM_BASE_ADDR); ++ ++ IFX_REG_W32(reg, PCIE_MBML(pcie_port)); ++ ++ ++#ifdef IFX_PCIE_PREFETCH_MEM_64BIT ++ reg = SM((PCIE_MEM_PHY_PORT_TO_END(pcie_port) >> 20), PCIE_PMBL_END_ADDR) ++ | SM((PCIE_MEM_PHY_PORT_TO_BASE(pcie_port) >> 20), PCIE_PMBL_UPPER_12BIT) ++ | PCIE_PMBL_64BIT_ADDR; ++ IFX_REG_W32(reg, PCIE_PMBL(pcie_port)); ++ ++ /* Must configure upper 32bit */ ++ IFX_REG_W32(0, PCIE_PMBU32(pcie_port)); ++ IFX_REG_W32(0, PCIE_PMLU32(pcie_port)); ++#else ++ /* PCIe_PBML, same as MBML */ ++ IFX_REG_W32(IFX_REG_R32(PCIE_MBML(pcie_port)), PCIE_PMBL(pcie_port)); ++#endif ++ ++ /* IO Address Range */ ++ reg = SM((PCIE_IO_PHY_PORT_TO_END(pcie_port) >> 12), PCIE_IOBLSECS_IO_LIMIT_ADDR) ++ | SM((PCIE_IO_PHY_PORT_TO_BASE(pcie_port) >> 12), PCIE_IOBLSECS_IO_BASE_ADDR); ++#ifdef IFX_PCIE_IO_32BIT ++ reg |= PCIE_IOBLSECS_32BIT_IO_ADDR; ++#endif /* IFX_PCIE_IO_32BIT */ ++ IFX_REG_W32(reg, PCIE_IOBLSECS(pcie_port)); ++ ++#ifdef IFX_PCIE_IO_32BIT ++ reg = SM((PCIE_IO_PHY_PORT_TO_END(pcie_port) >> 16), PCIE_IO_BANDL_UPPER_16BIT_IO_LIMIT) ++ | SM((PCIE_IO_PHY_PORT_TO_BASE(pcie_port) >> 16), PCIE_IO_BANDL_UPPER_16BIT_IO_BASE); ++ IFX_REG_W32(reg, PCIE_IO_BANDL(pcie_port)); ++ ++#endif /* IFX_PCIE_IO_32BIT */ ++} ++ ++static inline void ++pcie_device_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ /* Device capability register, set up Maximum payload size */ ++ reg = IFX_REG_R32(PCIE_DCAP(pcie_port)); ++ reg |= PCIE_DCAP_ROLE_BASE_ERR_REPORT; ++ reg |= SM(PCIE_MAX_PAYLOAD_128, PCIE_DCAP_MAX_PAYLOAD_SIZE); ++ ++ /* Only available for EP */ ++ reg &= ~(PCIE_DCAP_EP_L0S_LATENCY | PCIE_DCAP_EP_L1_LATENCY); ++ IFX_REG_W32(reg, PCIE_DCAP(pcie_port)); ++ ++ /* Device control and status register */ ++ /* Set Maximum Read Request size for the device as a Requestor */ ++ reg = IFX_REG_R32(PCIE_DCTLSTS(pcie_port)); ++ ++ /* ++ * Request size can be larger than the MPS used, but the completions returned ++ * for the read will be bounded by the MPS size. ++ * In our system, Max request size depends on AHB burst size. It is 64 bytes. ++ * but we set it as 128 as minimum one. ++ */ ++ reg |= SM(PCIE_MAX_PAYLOAD_128, PCIE_DCTLSTS_MAX_READ_SIZE) ++ | SM(PCIE_MAX_PAYLOAD_128, PCIE_DCTLSTS_MAX_PAYLOAD_SIZE); ++ ++ /* Enable relaxed ordering, no snoop, and all kinds of errors */ ++ reg |= PCIE_DCTLSTS_RELAXED_ORDERING_EN | PCIE_DCTLSTS_ERR_EN | PCIE_DCTLSTS_NO_SNOOP_EN; ++ ++ IFX_REG_W32(reg, PCIE_DCTLSTS(pcie_port)); ++} ++ ++static inline void ++pcie_link_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ /* ++ * XXX, Link capability register, bit 18 for EP CLKREQ# dynamic clock management for L1, L2/3 CPM ++ * L0s is reported during link training via TS1 order set by N_FTS ++ */ ++ reg = IFX_REG_R32(PCIE_LCAP(pcie_port)); ++ reg &= ~PCIE_LCAP_L0S_EIXT_LATENCY; ++ reg |= SM(3, PCIE_LCAP_L0S_EIXT_LATENCY); ++ IFX_REG_W32(reg, PCIE_LCAP(pcie_port)); ++ ++ /* Link control and status register */ ++ reg = IFX_REG_R32(PCIE_LCTLSTS(pcie_port)); ++ ++ /* Link Enable, ASPM enabled */ ++ reg &= ~PCIE_LCTLSTS_LINK_DISABLE; ++ ++#ifdef CONFIG_PCIEASPM ++ /* ++ * We use the same physical reference clock that the platform provides on the connector ++ * It paved the way for ASPM to calculate the new exit Latency ++ */ ++ reg |= PCIE_LCTLSTS_SLOT_CLK_CFG; ++ reg |= PCIE_LCTLSTS_COM_CLK_CFG; ++ /* ++ * We should disable ASPM by default except that we have dedicated power management support ++ * Enable ASPM will cause the system hangup/instability, performance degration ++ */ ++ reg |= PCIE_LCTLSTS_ASPM_ENABLE; ++#else ++ reg &= ~PCIE_LCTLSTS_ASPM_ENABLE; ++#endif /* CONFIG_PCIEASPM */ ++ ++ /* ++ * The maximum size of any completion with data packet is bounded by the MPS setting ++ * in device control register ++ */ ++ ++ /* RCB may cause multiple split transactions, two options available, we use 64 byte RCB */ ++ reg &= ~ PCIE_LCTLSTS_RCB128; ++ ++ IFX_REG_W32(reg, PCIE_LCTLSTS(pcie_port)); ++} ++ ++static inline void pcie_error_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ /* ++ * Forward ERR_COR, ERR_NONFATAL, ERR_FATAL to the backbone ++ * Poisoned write TLPs and completions indicating poisoned TLPs will set the PCIe_PCICMDSTS.MDPE ++ */ ++ reg = IFX_REG_R32(PCIE_INTRBCTRL(pcie_port)); ++ reg |= PCIE_INTRBCTRL_SERR_ENABLE | PCIE_INTRBCTRL_PARITY_ERR_RESP_ENABLE; ++ ++ IFX_REG_W32(reg, PCIE_INTRBCTRL(pcie_port)); ++ ++ /* Uncorrectable Error Mask Register, Unmask all bits in PCIE_UESR */ ++ reg = IFX_REG_R32(PCIE_UEMR(pcie_port)); ++ reg &= ~PCIE_ALL_UNCORRECTABLE_ERR; ++ IFX_REG_W32(reg, PCIE_UEMR(pcie_port)); ++ ++ /* Uncorrectable Error Severity Register, ALL errors are FATAL */ ++ IFX_REG_W32(PCIE_ALL_UNCORRECTABLE_ERR, PCIE_UESR(pcie_port)); ++ ++ /* Correctable Error Mask Register, unmask all bits */ ++ reg = IFX_REG_R32(PCIE_CEMR(pcie_port)); ++ reg &= ~PCIE_CORRECTABLE_ERR; ++ IFX_REG_W32(reg, PCIE_CEMR(pcie_port)); ++ ++ /* Advanced Error Capabilities and Control Registr */ ++ reg = IFX_REG_R32(PCIE_AECCR(pcie_port)); ++ reg |= PCIE_AECCR_ECRC_CHECK_EN | PCIE_AECCR_ECRC_GEN_EN; ++ IFX_REG_W32(reg, PCIE_AECCR(pcie_port)); ++ ++ /* Root Error Command Register, Report all types of errors */ ++ reg = IFX_REG_R32(PCIE_RECR(pcie_port)); ++ reg |= PCIE_RECR_ERR_REPORT_EN; ++ IFX_REG_W32(reg, PCIE_RECR(pcie_port)); ++ ++ /* Clear the Root status register */ ++ reg = IFX_REG_R32(PCIE_RESR(pcie_port)); ++ IFX_REG_W32(reg, PCIE_RESR(pcie_port)); ++} ++ ++static inline void pcie_port_logic_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ /* FTS number, default 12, increase to 63, may increase time from/to L0s to L0 */ ++ reg = IFX_REG_R32(PCIE_AFR(pcie_port)); ++ reg &= ~(PCIE_AFR_FTS_NUM | PCIE_AFR_COM_FTS_NUM); ++ reg |= SM(PCIE_AFR_FTS_NUM_DEFAULT, PCIE_AFR_FTS_NUM) ++ | SM(PCIE_AFR_FTS_NUM_DEFAULT, PCIE_AFR_COM_FTS_NUM); ++ /* L0s and L1 entry latency */ ++ reg &= ~(PCIE_AFR_L0S_ENTRY_LATENCY | PCIE_AFR_L1_ENTRY_LATENCY); ++ reg |= SM(PCIE_AFR_L0S_ENTRY_LATENCY_DEFAULT, PCIE_AFR_L0S_ENTRY_LATENCY) ++ | SM(PCIE_AFR_L1_ENTRY_LATENCY_DEFAULT, PCIE_AFR_L1_ENTRY_LATENCY); ++ IFX_REG_W32(reg, PCIE_AFR(pcie_port)); ++ ++ ++ /* Port Link Control Register */ ++ reg = IFX_REG_R32(PCIE_PLCR(pcie_port)); ++ reg |= PCIE_PLCR_DLL_LINK_EN; /* Enable the DLL link */ ++ IFX_REG_W32(reg, PCIE_PLCR(pcie_port)); ++ ++ /* Lane Skew Register */ ++ reg = IFX_REG_R32(PCIE_LSR(pcie_port)); ++ /* Enable ACK/NACK and FC */ ++ reg &= ~(PCIE_LSR_ACKNAK_DISABLE | PCIE_LSR_FC_DISABLE); ++ IFX_REG_W32(reg, PCIE_LSR(pcie_port)); ++ ++ /* Symbol Timer Register and Filter Mask Register 1 */ ++ reg = IFX_REG_R32(PCIE_STRFMR(pcie_port)); ++ ++ /* Default SKP interval is very accurate already, 5us */ ++ /* Enable IO/CFG transaction */ ++ reg |= PCIE_STRFMR_RX_CFG_TRANS_ENABLE | PCIE_STRFMR_RX_IO_TRANS_ENABLE; ++ /* Disable FC WDT */ ++ reg &= ~PCIE_STRFMR_FC_WDT_DISABLE; ++ IFX_REG_W32(reg, PCIE_STRFMR(pcie_port)); ++ ++ /* Filter Masker Register 2 */ ++ reg = IFX_REG_R32(PCIE_FMR2(pcie_port)); ++ reg |= PCIE_FMR2_VENDOR_MSG1_PASSED_TO_TRGT1 | PCIE_FMR2_VENDOR_MSG0_PASSED_TO_TRGT1; ++ IFX_REG_W32(reg, PCIE_FMR2(pcie_port)); ++ ++ /* VC0 Completion Receive Queue Control Register */ ++ reg = IFX_REG_R32(PCIE_VC0_CRQCR(pcie_port)); ++ reg &= ~PCIE_VC0_CRQCR_CPL_TLP_QUEUE_MODE; ++ reg |= SM(PCIE_VC0_TLP_QUEUE_MODE_BYPASS, PCIE_VC0_CRQCR_CPL_TLP_QUEUE_MODE); ++ IFX_REG_W32(reg, PCIE_VC0_CRQCR(pcie_port)); ++} ++ ++static inline void pcie_rc_cfg_reg_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ /* Disable LTSSM */ ++ IFX_REG_W32(0, PCIE_RC_CCR(pcie_port)); /* Disable LTSSM */ ++ ++ pcie_mem_io_setup(pcie_port); ++ ++ /* XXX, MSI stuff should only apply to EP */ ++ /* MSI Capability: Only enable 32-bit addresses */ ++ reg = IFX_REG_R32(PCIE_MCAPR(pcie_port)); ++ reg &= ~PCIE_MCAPR_ADDR64_CAP; ++ ++ reg |= PCIE_MCAPR_MSI_ENABLE; ++ ++ /* Disable multiple message */ ++ reg &= ~(PCIE_MCAPR_MULTI_MSG_CAP | PCIE_MCAPR_MULTI_MSG_ENABLE); ++ IFX_REG_W32(reg, PCIE_MCAPR(pcie_port)); ++ ++ ++ /* Enable PME, Soft reset enabled */ ++ reg = IFX_REG_R32(PCIE_PM_CSR(pcie_port)); ++ reg |= PCIE_PM_CSR_PME_ENABLE | PCIE_PM_CSR_SW_RST; ++ IFX_REG_W32(reg, PCIE_PM_CSR(pcie_port)); ++ ++ /* setup the bus */ ++ reg = SM(0, PCIE_BNR_PRIMARY_BUS_NUM) | SM(1, PCIE_PNR_SECONDARY_BUS_NUM) | SM(0xFF, PCIE_PNR_SUB_BUS_NUM); ++ IFX_REG_W32(reg, PCIE_BNR(pcie_port)); ++ ++ ++ pcie_device_setup(pcie_port); ++ pcie_link_setup(pcie_port); ++ pcie_error_setup(pcie_port); ++ ++ /* Root control and capabilities register */ ++ reg = IFX_REG_R32(PCIE_RCTLCAP(pcie_port)); ++ reg |= PCIE_RCTLCAP_SERR_ENABLE | PCIE_RCTLCAP_PME_INT_EN; ++ IFX_REG_W32(reg, PCIE_RCTLCAP(pcie_port)); ++ ++ /* Port VC Capability Register 2 */ ++ reg = IFX_REG_R32(PCIE_PVC2(pcie_port)); ++ reg &= ~PCIE_PVC2_VC_ARB_WRR; ++ reg |= PCIE_PVC2_VC_ARB_16P_FIXED_WRR; ++ IFX_REG_W32(reg, PCIE_PVC2(pcie_port)); ++ ++ /* VC0 Resource Capability Register */ ++ reg = IFX_REG_R32(PCIE_VC0_RC(pcie_port)); ++ reg &= ~PCIE_VC0_RC_REJECT_SNOOP; ++ IFX_REG_W32(reg, PCIE_VC0_RC(pcie_port)); ++ ++ pcie_port_logic_setup(pcie_port); ++} ++ ++static int ifx_pcie_wait_phy_link_up(int pcie_port) ++{ ++#define IFX_PCIE_PHY_LINK_UP_TIMEOUT 1000 /* XXX, tunable */ ++ int i; ++ ++ /* Wait for PHY link is up */ ++ for (i = 0; i < IFX_PCIE_PHY_LINK_UP_TIMEOUT; i++) { ++ if (ifx_pcie_link_up(pcie_port)) { ++ break; ++ } ++ udelay(100); ++ } ++ if (i >= IFX_PCIE_PHY_LINK_UP_TIMEOUT) { ++ printk(KERN_ERR "%s timeout\n", __func__); ++ return -1; ++ } ++ ++ /* Check data link up or not */ ++ if (!(IFX_REG_R32(PCIE_RC_DR(pcie_port)) & PCIE_RC_DR_DLL_UP)) { ++ printk(KERN_ERR "%s DLL link is still down\n", __func__); ++ return -1; ++ } ++ ++ /* Check Data link active or not */ ++ if (!(IFX_REG_R32(PCIE_LCTLSTS(pcie_port)) & PCIE_LCTLSTS_DLL_ACTIVE)) { ++ printk(KERN_ERR "%s DLL is not active\n", __func__); ++ return -1; ++ } ++ return 0; ++} ++ ++static inline int pcie_app_loigc_setup(int pcie_port) ++{ ++ /* supress ahb bus errrors */ ++ IFX_REG_W32(PCIE_AHB_CTRL_BUS_ERROR_SUPPRESS, PCIE_AHB_CTRL(pcie_port)); ++ ++ /* Pull PCIe EP out of reset */ ++ pcie_device_rst_deassert(pcie_port); ++ ++ /* Start LTSSM training between RC and EP */ ++ pcie_ltssm_enable(pcie_port); ++ ++ /* Check PHY status after enabling LTSSM */ ++ if (ifx_pcie_wait_phy_link_up(pcie_port) != 0) ++ return -1; ++ ++ return 0; ++} ++ ++/* ++ * The numbers below are directly from the PCIe spec table 3-4/5. ++ */ ++static inline void pcie_replay_time_update(int pcie_port) ++{ ++ u32 reg; ++ int nlw; ++ int rtl; ++ ++ reg = IFX_REG_R32(PCIE_LCTLSTS(pcie_port)); ++ ++ nlw = MS(reg, PCIE_LCTLSTS_NEGOTIATED_LINK_WIDTH); ++ switch (nlw) { ++ case PCIE_MAX_LENGTH_WIDTH_X1: ++ rtl = 1677; ++ break; ++ case PCIE_MAX_LENGTH_WIDTH_X2: ++ rtl = 867; ++ break; ++ case PCIE_MAX_LENGTH_WIDTH_X4: ++ rtl = 462; ++ break; ++ case PCIE_MAX_LENGTH_WIDTH_X8: ++ rtl = 258; ++ break; ++ default: ++ rtl = 1677; ++ break; ++ } ++ reg = IFX_REG_R32(PCIE_ALTRT(pcie_port)); ++ reg &= ~PCIE_ALTRT_REPLAY_TIME_LIMIT; ++ reg |= SM(rtl, PCIE_ALTRT_REPLAY_TIME_LIMIT); ++ IFX_REG_W32(reg, PCIE_ALTRT(pcie_port)); ++} ++ ++/* ++ * Table 359 Enhanced Configuration Address Mapping1) ++ * 1) This table is defined in Table 7-1, page 341, PCI Express Base Specification v1.1 ++ * Memory Address PCI Express Configuration Space ++ * A[(20+n-1):20] Bus Number 1 < n < 8 ++ * A[19:15] Device Number ++ * A[14:12] Function Number ++ * A[11:8] Extended Register Number ++ * A[7:2] Register Number ++ * A[1:0] Along with size of the access, used to generate Byte Enables ++ * For VR9, only the address bits [22:0] are mapped to the configuration space: ++ * . Address bits [22:20] select the target bus (1-of-8)1) ++ * . Address bits [19:15] select the target device (1-of-32) on the bus ++ * . Address bits [14:12] select the target function (1-of-8) within the device. ++ * . Address bits [11:2] selects the target dword (1-of-1024) within the selected function.s configuration space ++ * . Address bits [1:0] define the start byte location within the selected dword. ++ */ ++static inline u32 pcie_bus_addr(u8 bus_num, u16 devfn, int where) ++{ ++ u32 addr; ++ u8 bus; ++ ++ if (!bus_num) { ++ /* type 0 */ ++ addr = ((PCI_SLOT(devfn) & 0x1F) << 15) | ((PCI_FUNC(devfn) & 0x7) << 12) | ((where & 0xFFF)& ~3); ++ } else { ++ bus = bus_num; ++ /* type 1, only support 8 buses */ ++ addr = ((bus & 0x7) << 20) | ((PCI_SLOT(devfn) & 0x1F) << 15) | ++ ((PCI_FUNC(devfn) & 0x7) << 12) | ((where & 0xFFF) & ~3); ++ } ++ return addr; ++} ++ ++static int pcie_valid_config(int pcie_port, int bus, int dev) ++{ ++ /* RC itself */ ++ if ((bus == 0) && (dev == 0)) { ++ return 1; ++ } ++ ++ /* No physical link */ ++ if (!ifx_pcie_link_up(pcie_port)) { ++ return 0; ++ } ++ ++ /* Bus zero only has RC itself ++ * XXX, check if EP will be integrated ++ */ ++ if ((bus == 0) && (dev != 0)) { ++ return 0; ++ } ++ ++ /* Maximum 8 buses supported for VRX */ ++ if (bus > 9) { ++ return 0; ++ } ++ ++ /* ++ * PCIe is PtP link, one bus only supports only one device ++ * except bus zero and PCIe switch which is virtual bus device ++ * The following two conditions really depends on the system design ++ * and attached the device. ++ * XXX, how about more new switch ++ */ ++ if ((bus == 1) && (dev != 0)) { ++ return 0; ++ } ++ ++ if ((bus >= 3) && (dev != 0)) { ++ return 0; ++ } ++ return 1; ++} ++ ++static inline u32 ifx_pcie_cfg_rd(int pcie_port, u32 reg) ++{ ++ return IFX_REG_R32((volatile u32 *)(PCIE_CFG_PORT_TO_BASE(pcie_port) + reg)); ++} ++ ++static inline void ifx_pcie_cfg_wr(int pcie_port, unsigned int reg, u32 val) ++{ ++ IFX_REG_W32( val, (volatile u32 *)(PCIE_CFG_PORT_TO_BASE(pcie_port) + reg)); ++} ++ ++static inline u32 ifx_pcie_rc_cfg_rd(int pcie_port, u32 reg) ++{ ++ return IFX_REG_R32((volatile u32 *)(PCIE_RC_PORT_TO_BASE(pcie_port) + reg)); ++} ++ ++static inline void ifx_pcie_rc_cfg_wr(int pcie_port, unsigned int reg, u32 val) ++{ ++ IFX_REG_W32(val, (volatile u32 *)(PCIE_RC_PORT_TO_BASE(pcie_port) + reg)); ++} ++ ++u32 ifx_pcie_bus_enum_read_hack(int where, u32 value) ++{ ++ u32 tvalue = value; ++ ++ if (where == PCI_PRIMARY_BUS) { ++ u8 primary, secondary, subordinate; ++ ++ primary = tvalue & 0xFF; ++ secondary = (tvalue >> 8) & 0xFF; ++ subordinate = (tvalue >> 16) & 0xFF; ++ primary += pcibios_1st_host_bus_nr(); ++ secondary += pcibios_1st_host_bus_nr(); ++ subordinate += pcibios_1st_host_bus_nr(); ++ tvalue = (tvalue & 0xFF000000) | (u32)primary | (u32)(secondary << 8) | (u32)(subordinate << 16); ++ } ++ return tvalue; ++} ++ ++u32 ifx_pcie_bus_enum_write_hack(int where, u32 value) ++{ ++ u32 tvalue = value; ++ ++ if (where == PCI_PRIMARY_BUS) { ++ u8 primary, secondary, subordinate; ++ ++ primary = tvalue & 0xFF; ++ secondary = (tvalue >> 8) & 0xFF; ++ subordinate = (tvalue >> 16) & 0xFF; ++ if (primary > 0 && primary != 0xFF) { ++ primary -= pcibios_1st_host_bus_nr(); ++ } ++ ++ if (secondary > 0 && secondary != 0xFF) { ++ secondary -= pcibios_1st_host_bus_nr(); ++ } ++ if (subordinate > 0 && subordinate != 0xFF) { ++ subordinate -= pcibios_1st_host_bus_nr(); ++ } ++ tvalue = (tvalue & 0xFF000000) | (u32)primary | (u32)(secondary << 8) | (u32)(subordinate << 16); ++ } ++ else if (where == PCI_SUBORDINATE_BUS) { ++ u8 subordinate = tvalue & 0xFF; ++ ++ subordinate = subordinate > 0 ? subordinate - pcibios_1st_host_bus_nr() : 0; ++ tvalue = subordinate; ++ } ++ return tvalue; ++} ++ ++static int ifx_pcie_read_config(struct pci_bus *bus, u32 devfn, ++ int where, int size, u32 *value) ++{ ++ u32 data = 0; ++ int bus_number = bus->number; ++ static const u32 mask[8] = {0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0}; ++ int ret = PCIBIOS_SUCCESSFUL; ++ struct ifx_pci_controller *ctrl = bus->sysdata; ++ int pcie_port = ctrl->port; ++ ++ if (unlikely(size != 1 && size != 2 && size != 4)){ ++ ret = PCIBIOS_BAD_REGISTER_NUMBER; ++ goto out; ++ } ++ ++ /* Make sure the address is aligned to natural boundary */ ++ if (unlikely(((size - 1) & where))) { ++ ret = PCIBIOS_BAD_REGISTER_NUMBER; ++ goto out; ++ } ++ ++ /* ++ * If we are second controller, we have to cheat OS so that it assume ++ * its bus number starts from 0 in host controller ++ */ ++ bus_number = ifx_pcie_bus_nr_deduct(bus_number, pcie_port); ++ ++ /* ++ * We need to force the bus number to be zero on the root ++ * bus. Linux numbers the 2nd root bus to start after all ++ * busses on root 0. ++ */ ++ if (bus->parent == NULL) { ++ bus_number = 0; ++ } ++ ++ /* ++ * PCIe only has a single device connected to it. It is ++ * always device ID 0. Don't bother doing reads for other ++ * device IDs on the first segment. ++ */ ++ if ((bus_number == 0) && (PCI_SLOT(devfn) != 0)) { ++ ret = PCIBIOS_FUNC_NOT_SUPPORTED; ++ goto out; ++ } ++ ++ if (pcie_valid_config(pcie_port, bus_number, PCI_SLOT(devfn)) == 0) { ++ *value = 0xffffffff; ++ ret = PCIBIOS_DEVICE_NOT_FOUND; ++ goto out; ++ } ++ ++ PCIE_IRQ_LOCK(ifx_pcie_lock); ++ if (bus_number == 0) { /* RC itself */ ++ u32 t; ++ ++ t = (where & ~3); ++ data = ifx_pcie_rc_cfg_rd(pcie_port, t); ++ } else { ++ u32 addr = pcie_bus_addr(bus_number, devfn, where); ++ ++ data = ifx_pcie_cfg_rd(pcie_port, addr); ++ #ifdef CONFIG_IFX_PCIE_HW_SWAP ++ data = le32_to_cpu(data); ++ #endif /* CONFIG_IFX_PCIE_HW_SWAP */ ++ } ++ /* To get a correct PCI topology, we have to restore the bus number to OS */ ++ data = ifx_pcie_bus_enum_hack(bus, devfn, where, data, pcie_port, 1); ++ ++ PCIE_IRQ_UNLOCK(ifx_pcie_lock); ++ ++ *value = (data >> (8 * (where & 3))) & mask[size & 7]; ++out: ++ return ret; ++} ++ ++static u32 ifx_pcie_size_to_value(int where, int size, u32 data, u32 value) ++{ ++ u32 shift; ++ u32 tdata = data; ++ ++ switch (size) { ++ case 1: ++ shift = (where & 0x3) << 3; ++ tdata &= ~(0xffU << shift); ++ tdata |= ((value & 0xffU) << shift); ++ break; ++ case 2: ++ shift = (where & 3) << 3; ++ tdata &= ~(0xffffU << shift); ++ tdata |= ((value & 0xffffU) << shift); ++ break; ++ case 4: ++ tdata = value; ++ break; ++ } ++ return tdata; ++} ++ ++static int ifx_pcie_write_config(struct pci_bus *bus, u32 devfn, ++ int where, int size, u32 value) ++{ ++ int bus_number = bus->number; ++ int ret = PCIBIOS_SUCCESSFUL; ++ struct ifx_pci_controller *ctrl = bus->sysdata; ++ int pcie_port = ctrl->port; ++ u32 tvalue = value; ++ u32 data; ++ ++ /* Make sure the address is aligned to natural boundary */ ++ if (unlikely(((size - 1) & where))) { ++ ret = PCIBIOS_BAD_REGISTER_NUMBER; ++ goto out; ++ } ++ /* ++ * If we are second controller, we have to cheat OS so that it assume ++ * its bus number starts from 0 in host controller ++ */ ++ bus_number = ifx_pcie_bus_nr_deduct(bus_number, pcie_port); ++ ++ /* ++ * We need to force the bus number to be zero on the root ++ * bus. Linux numbers the 2nd root bus to start after all ++ * busses on root 0. ++ */ ++ if (bus->parent == NULL) { ++ bus_number = 0; ++ } ++ ++ if (pcie_valid_config(pcie_port, bus_number, PCI_SLOT(devfn)) == 0) { ++ ret = PCIBIOS_DEVICE_NOT_FOUND; ++ goto out; ++ } ++ ++ /* XXX, some PCIe device may need some delay */ ++ PCIE_IRQ_LOCK(ifx_pcie_lock); ++ ++ /* ++ * To configure the correct bus topology using native way, we have to cheat Os so that ++ * it can configure the PCIe hardware correctly. ++ */ ++ tvalue = ifx_pcie_bus_enum_hack(bus, devfn, where, value, pcie_port, 0); ++ ++ if (bus_number == 0) { /* RC itself */ ++ u32 t; ++ ++ t = (where & ~3); ++ data = ifx_pcie_rc_cfg_rd(pcie_port, t); ++ ++ data = ifx_pcie_size_to_value(where, size, data, tvalue); ++ ++ ifx_pcie_rc_cfg_wr(pcie_port, t, data); ++ } else { ++ u32 addr = pcie_bus_addr(bus_number, devfn, where); ++ ++ data = ifx_pcie_cfg_rd(pcie_port, addr); ++#ifdef CONFIG_IFX_PCIE_HW_SWAP ++ data = le32_to_cpu(data); ++#endif ++ ++ data = ifx_pcie_size_to_value(where, size, data, tvalue); ++#ifdef CONFIG_IFX_PCIE_HW_SWAP ++ data = cpu_to_le32(data); ++#endif ++ ifx_pcie_cfg_wr(pcie_port, addr, data); ++ } ++ PCIE_IRQ_UNLOCK(ifx_pcie_lock); ++out: ++ return ret; ++} ++ ++static struct resource ifx_pcie_io_resource = { ++ .name = "PCIe0 I/O space", ++ .start = PCIE_IO_PHY_BASE, ++ .end = PCIE_IO_PHY_END, ++ .flags = IORESOURCE_IO, ++}; ++ ++static struct resource ifx_pcie_mem_resource = { ++ .name = "PCIe0 Memory space", ++ .start = PCIE_MEM_PHY_BASE, ++ .end = PCIE_MEM_PHY_END, ++ .flags = IORESOURCE_MEM, ++}; ++ ++static struct pci_ops ifx_pcie_ops = { ++ .read = ifx_pcie_read_config, ++ .write = ifx_pcie_write_config, ++}; ++ ++static struct ifx_pci_controller ifx_pcie_controller[IFX_PCIE_CORE_NR] = { ++ { ++ .pcic = { ++ .pci_ops = &ifx_pcie_ops, ++ .mem_resource = &ifx_pcie_mem_resource, ++ .io_resource = &ifx_pcie_io_resource, ++ }, ++ .port = IFX_PCIE_PORT0, ++ }, ++}; ++ ++#ifdef IFX_PCIE_ERROR_INT ++ ++static irqreturn_t pcie_rc_core_isr(int irq, void *dev_id) ++{ ++ struct ifx_pci_controller *ctrl = (struct ifx_pci_controller *)dev_id; ++ int pcie_port = ctrl->port; ++ u32 reg; ++ ++ pr_debug("PCIe RC error intr %d\n", irq); ++ reg = IFX_REG_R32(PCIE_IRNCR(pcie_port)); ++ reg &= PCIE_RC_CORE_COMBINED_INT; ++ IFX_REG_W32(reg, PCIE_IRNCR(pcie_port)); ++ ++ return IRQ_HANDLED; ++} ++ ++static int ++pcie_rc_core_int_init(int pcie_port) ++{ ++ int ret; ++ ++ /* Enable core interrupt */ ++ IFX_REG_SET_BIT(PCIE_RC_CORE_COMBINED_INT, PCIE_IRNEN(pcie_port)); ++ ++ /* Clear it first */ ++ IFX_REG_SET_BIT(PCIE_RC_CORE_COMBINED_INT, PCIE_IRNCR(pcie_port)); ++ ret = request_irq(pcie_irqs[pcie_port].ir_irq.irq, pcie_rc_core_isr, 0, ++ pcie_irqs[pcie_port].ir_irq.name, &ifx_pcie_controller[pcie_port]); ++ if (ret) ++ printk(KERN_ERR "%s request irq %d failed\n", __func__, IFX_PCIE_IR); ++ ++ return ret; ++} ++#endif ++ ++int ifx_pcie_bios_map_irq(IFX_PCI_CONST struct pci_dev *dev, u8 slot, u8 pin) ++{ ++ u32 irq_bit = 0; ++ int irq = 0; ++ struct ifx_pci_controller *ctrl = dev->bus->sysdata; ++ int pcie_port = ctrl->port; ++ ++ printk("%s port %d dev %s slot %d pin %d \n", __func__, pcie_port, pci_name(dev), slot, pin); ++ ++ if ((pin == PCIE_LEGACY_DISABLE) || (pin > PCIE_LEGACY_INT_MAX)) { ++ printk(KERN_WARNING "WARNING: dev %s: invalid interrupt pin %d\n", pci_name(dev), pin); ++ return -1; ++ } ++ ++ /* Pin index so minus one */ ++ irq_bit = pcie_irqs[pcie_port].legacy_irq[pin - 1].irq_bit; ++ irq = pcie_irqs[pcie_port].legacy_irq[pin - 1].irq; ++ IFX_REG_SET_BIT(irq_bit, PCIE_IRNEN(pcie_port)); ++ IFX_REG_SET_BIT(irq_bit, PCIE_IRNCR(pcie_port)); ++ printk("%s dev %s irq %d assigned\n", __func__, pci_name(dev), irq); ++ return irq; ++} ++ ++int ifx_pcie_bios_plat_dev_init(struct pci_dev *dev) ++{ ++ u16 config; ++#ifdef IFX_PCIE_ERROR_INT ++ u32 dconfig; ++ int pos; ++#endif ++ ++ /* Enable reporting System errors and parity errors on all devices */ ++ /* Enable parity checking and error reporting */ ++ pci_read_config_word(dev, PCI_COMMAND, &config); ++ config |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR /*| PCI_COMMAND_INVALIDATE | ++ PCI_COMMAND_FAST_BACK*/; ++ pci_write_config_word(dev, PCI_COMMAND, config); ++ ++ if (dev->subordinate) { ++ /* Set latency timers on sub bridges */ ++ pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 0x40); /* XXX, */ ++ /* More bridge error detection */ ++ pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &config); ++ config |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR; ++ pci_write_config_word(dev, PCI_BRIDGE_CONTROL, config); ++ } ++#ifdef IFX_PCIE_ERROR_INT ++ /* Enable the PCIe normal error reporting */ ++ pos = pci_find_capability(dev, PCI_CAP_ID_EXP); ++ if (pos) { ++ ++ /* Disable system error generation in response to error messages */ ++ pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &config); ++ config &= ~(PCI_EXP_RTCTL_SECEE | PCI_EXP_RTCTL_SENFEE | PCI_EXP_RTCTL_SEFEE); ++ pci_write_config_word(dev, pos + PCI_EXP_RTCTL, config); ++ ++ /* Clear PCIE Capability's Device Status */ ++ pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &config); ++ pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, config); ++ ++ /* Update Device Control */ ++ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config); ++ /* Correctable Error Reporting */ ++ config |= PCI_EXP_DEVCTL_CERE; ++ /* Non-Fatal Error Reporting */ ++ config |= PCI_EXP_DEVCTL_NFERE; ++ /* Fatal Error Reporting */ ++ config |= PCI_EXP_DEVCTL_FERE; ++ /* Unsupported Request */ ++ config |= PCI_EXP_DEVCTL_URRE; ++ pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config); ++ } ++ ++ /* Find the Advanced Error Reporting capability */ ++ pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); ++ if (pos) { ++ /* Clear Uncorrectable Error Status */ ++ pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &dconfig); ++ pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, dconfig); ++ /* Enable reporting of all uncorrectable errors */ ++ /* Uncorrectable Error Mask - turned on bits disable errors */ ++ pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 0); ++ /* ++ * Leave severity at HW default. This only controls if ++ * errors are reported as uncorrectable or ++ * correctable, not if the error is reported. ++ */ ++ /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */ ++ /* Clear Correctable Error Status */ ++ pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &dconfig); ++ pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, dconfig); ++ /* Enable reporting of all correctable errors */ ++ /* Correctable Error Mask - turned on bits disable errors */ ++ pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, 0); ++ /* Advanced Error Capabilities */ ++ pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig); ++ /* ECRC Generation Enable */ ++ if (dconfig & PCI_ERR_CAP_ECRC_GENC) { ++ dconfig |= PCI_ERR_CAP_ECRC_GENE; ++ } ++ /* ECRC Check Enable */ ++ if (dconfig & PCI_ERR_CAP_ECRC_CHKC) { ++ dconfig |= PCI_ERR_CAP_ECRC_CHKE; ++ } ++ pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig); ++ ++ /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */ ++ /* Enable Root Port's interrupt in response to error messages */ ++ pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, ++ PCI_ERR_ROOT_CMD_COR_EN | ++ PCI_ERR_ROOT_CMD_NONFATAL_EN | ++ PCI_ERR_ROOT_CMD_FATAL_EN); ++ /* Clear the Root status register */ ++ pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &dconfig); ++ pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig); ++ } ++#endif /* IFX_PCIE_ERROR_INT */ ++ /* WAR, only 128 MRRS is supported, force all EPs to support this value */ ++ pcie_set_readrq(dev, 128); ++ return 0; ++} ++ ++static int ++pcie_rc_initialize(int pcie_port) ++{ ++ int i; ++#define IFX_PCIE_PHY_LOOP_CNT 5 ++ ++ pcie_rcu_endian_setup(pcie_port); ++ ++ pcie_ep_gpio_rst_init(pcie_port); ++ ++ /* ++ * XXX, PCIe elastic buffer bug will cause not to be detected. One more ++ * reset PCIe PHY will solve this issue ++ */ ++ for (i = 0; i < IFX_PCIE_PHY_LOOP_CNT; i++) { ++ /* Disable PCIe PHY Analog part for sanity check */ ++ pcie_phy_pmu_disable(pcie_port); ++ ++ pcie_phy_rst_assert(pcie_port); ++ pcie_phy_rst_deassert(pcie_port); ++ ++ /* Make sure PHY PLL is stable */ ++ udelay(20); ++ ++ /* PCIe Core reset enabled, low active, sw programmed */ ++ pcie_core_rst_assert(pcie_port); ++ ++ /* Put PCIe EP in reset status */ ++ pcie_device_rst_assert(pcie_port); ++ ++ /* PCI PHY & Core reset disabled, high active, sw programmed */ ++ pcie_core_rst_deassert(pcie_port); ++ ++ /* Already in a quiet state, program PLL, enable PHY, check ready bit */ ++ pcie_phy_clock_mode_setup(pcie_port); ++ ++ /* Enable PCIe PHY and Clock */ ++ pcie_core_pmu_setup(pcie_port); ++ ++ /* Clear status registers */ ++ pcie_status_register_clear(pcie_port); ++ ++#ifdef CONFIG_PCI_MSI ++ pcie_msi_init(pcie_port); ++#endif /* CONFIG_PCI_MSI */ ++ pcie_rc_cfg_reg_setup(pcie_port); ++ ++ /* Once link is up, break out */ ++ if (pcie_app_loigc_setup(pcie_port) == 0) ++ break; ++ } ++ if (i >= IFX_PCIE_PHY_LOOP_CNT) { ++ printk(KERN_ERR "%s link up failed!!!!!\n", __func__); ++ return -EIO; ++ } ++ /* NB, don't increase ACK/NACK timer timeout value, which will cause a lot of COR errors */ ++ pcie_replay_time_update(pcie_port); ++ return 0; ++} ++ ++static int __init ifx_pcie_bios_init(void) ++{ ++ void __iomem *io_map_base; ++ int pcie_port; ++ int startup_port; ++ ++ /* Enable AHB Master/ Slave */ ++ pcie_ahb_pmu_setup(); ++ ++ startup_port = IFX_PCIE_PORT0; ++ ++ for (pcie_port = startup_port; pcie_port < IFX_PCIE_CORE_NR; pcie_port++){ ++ if (pcie_rc_initialize(pcie_port) == 0) { ++ IFX_PCIE_PRINT(PCIE_MSG_INIT, "%s: ifx_pcie_cfg_base 0x%p\n", ++ __func__, PCIE_CFG_PORT_TO_BASE(pcie_port)); ++ /* Otherwise, warning will pop up */ ++ io_map_base = ioremap(PCIE_IO_PHY_PORT_TO_BASE(pcie_port), PCIE_IO_SIZE); ++ if (io_map_base == NULL) { ++ IFX_PCIE_PRINT(PCIE_MSG_ERR, "%s io space ioremap failed\n", __func__); ++ return -ENOMEM; ++ } ++ ifx_pcie_controller[pcie_port].pcic.io_map_base = (unsigned long)io_map_base; ++ ++ register_pci_controller(&ifx_pcie_controller[pcie_port].pcic); ++ /* XXX, clear error status */ ++ ++ IFX_PCIE_PRINT(PCIE_MSG_INIT, "%s: mem_resource 0x%p, io_resource 0x%p\n", ++ __func__, &ifx_pcie_controller[pcie_port].pcic.mem_resource, ++ &ifx_pcie_controller[pcie_port].pcic.io_resource); ++ ++ #ifdef IFX_PCIE_ERROR_INT ++ pcie_rc_core_int_init(pcie_port); ++ #endif /* IFX_PCIE_ERROR_INT */ ++ } ++ } ++ ++ return 0; ++} ++arch_initcall(ifx_pcie_bios_init); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Chuanhua.Lei@infineon.com"); ++MODULE_SUPPORTED_DEVICE("Infineon builtin PCIe RC module"); ++MODULE_DESCRIPTION("Infineon builtin PCIe RC driver"); ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie.h +@@ -0,0 +1,135 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pcie.h ++** PROJECT : IFX UEIP for VRX200 ++** MODULES : PCIe module ++** ++** DATE : 02 Mar 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe Root Complex Driver ++** COPYRIGHT : Copyright (c) 2009 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** HISTORY ++** $Version $Date $Author $Comment ++** 0.0.1 17 Mar,2009 Lei Chuanhua Initial version ++*******************************************************************************/ ++#ifndef IFXMIPS_PCIE_H ++#define IFXMIPS_PCIE_H ++#include ++#include ++#include ++#include ++#include "ifxmips_pci_common.h" ++#include "ifxmips_pcie_reg.h" ++ ++/*! ++ \defgroup IFX_PCIE PCI Express bus driver module ++ \brief PCI Express IP module support VRX200 ++*/ ++ ++/*! ++ \defgroup IFX_PCIE_OS OS APIs ++ \ingroup IFX_PCIE ++ \brief PCIe bus driver OS interface functions ++*/ ++ ++/*! ++ \file ifxmips_pcie.h ++ \ingroup IFX_PCIE ++ \brief header file for PCIe module common header file ++*/ ++#define PCIE_IRQ_LOCK(lock) do { \ ++ unsigned long flags; \ ++ spin_lock_irqsave(&(lock), flags); ++#define PCIE_IRQ_UNLOCK(lock) \ ++ spin_unlock_irqrestore(&(lock), flags); \ ++} while (0) ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) ++#define IRQF_SHARED SA_SHIRQ ++#endif ++ ++#define PCIE_MSG_MSI 0x00000001 ++#define PCIE_MSG_ISR 0x00000002 ++#define PCIE_MSG_FIXUP 0x00000004 ++#define PCIE_MSG_READ_CFG 0x00000008 ++#define PCIE_MSG_WRITE_CFG 0x00000010 ++#define PCIE_MSG_CFG (PCIE_MSG_READ_CFG | PCIE_MSG_WRITE_CFG) ++#define PCIE_MSG_REG 0x00000020 ++#define PCIE_MSG_INIT 0x00000040 ++#define PCIE_MSG_ERR 0x00000080 ++#define PCIE_MSG_PHY 0x00000100 ++#define PCIE_MSG_ANY 0x000001ff ++ ++#define IFX_PCIE_PORT0 0 ++#define IFX_PCIE_PORT1 1 ++ ++#ifdef CONFIG_IFX_PCIE_2ND_CORE ++#define IFX_PCIE_CORE_NR 2 ++#else ++#define IFX_PCIE_CORE_NR 1 ++#endif ++ ++#define IFX_PCIE_ERROR_INT ++ ++//#define IFX_PCIE_DBG ++ ++#if defined(IFX_PCIE_DBG) ++#define IFX_PCIE_PRINT(_m, _fmt, args...) do { \ ++ ifx_pcie_debug((_fmt), ##args); \ ++} while (0) ++ ++#define INLINE ++#else ++#define IFX_PCIE_PRINT(_m, _fmt, args...) \ ++ do {} while(0) ++#define INLINE inline ++#endif ++ ++struct ifx_pci_controller { ++ struct pci_controller pcic; ++ ++ /* RC specific, per host bus information */ ++ u32 port; /* Port index, 0 -- 1st core, 1 -- 2nd core */ ++}; ++ ++typedef struct ifx_pcie_ir_irq { ++ const unsigned int irq; ++ const char name[16]; ++}ifx_pcie_ir_irq_t; ++ ++typedef struct ifx_pcie_legacy_irq{ ++ const u32 irq_bit; ++ const int irq; ++}ifx_pcie_legacy_irq_t; ++ ++typedef struct ifx_pcie_irq { ++ ifx_pcie_ir_irq_t ir_irq; ++ ifx_pcie_legacy_irq_t legacy_irq[PCIE_LEGACY_INT_MAX]; ++}ifx_pcie_irq_t; ++ ++extern u32 g_pcie_debug_flag; ++extern void ifx_pcie_debug(const char *fmt, ...); ++extern void pcie_phy_clock_mode_setup(int pcie_port); ++extern void pcie_msi_pic_init(int pcie_port); ++extern u32 ifx_pcie_bus_enum_read_hack(int where, u32 value); ++extern u32 ifx_pcie_bus_enum_write_hack(int where, u32 value); ++ ++#define CONFIG_VR9 ++ ++#ifdef CONFIG_VR9 ++#include "ifxmips_pcie_vr9.h" ++#elif defined (CONFIG_AR10) ++#include "ifxmips_pcie_ar10.h" ++#else ++#error "PCIE: platform not defined" ++#endif /* CONFIG_VR9 */ ++ ++#endif /* IFXMIPS_PCIE_H */ ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie_ar10.h +@@ -0,0 +1,290 @@ ++/**************************************************************************** ++ Copyright (c) 2010 ++ Lantiq Deutschland GmbH ++ Am Campeon 3; 85579 Neubiberg, Germany ++ ++ For licensing information, see the file 'LICENSE' in the root folder of ++ this software module. ++ ++ *****************************************************************************/ ++/*! ++ \file ifxmips_pcie_ar10.h ++ \ingroup IFX_PCIE ++ \brief PCIe RC driver ar10 specific file ++*/ ++ ++#ifndef IFXMIPS_PCIE_AR10_H ++#define IFXMIPS_PCIE_AR10_H ++#ifndef AUTOCONF_INCLUDED ++#include ++#endif /* AUTOCONF_INCLUDED */ ++#include ++#include ++ ++/* Project header file */ ++#include ++#include ++#include ++#include ++ ++static inline void pcie_ep_gpio_rst_init(int pcie_port) ++{ ++ ifx_ebu_led_enable(); ++ if (pcie_port == 0) { ++ ifx_ebu_led_set_data(11, 1); ++ } ++ else { ++ ifx_ebu_led_set_data(12, 1); ++ } ++} ++ ++static inline void pcie_ahb_pmu_setup(void) ++{ ++ /* XXX, moved to CGU to control AHBM */ ++} ++ ++static inline void pcie_rcu_endian_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_AHB_ENDIAN); ++ /* Inbound, big endian */ ++ reg |= IFX_RCU_BE_AHB4S; ++ if (pcie_port == 0) { ++ reg |= IFX_RCU_BE_PCIE0M; ++ ++ #ifdef CONFIG_IFX_PCIE_HW_SWAP ++ /* Outbound, software swap needed */ ++ reg |= IFX_RCU_BE_AHB3M; ++ reg &= ~IFX_RCU_BE_PCIE0S; ++ #else ++ /* Outbound little endian */ ++ reg &= ~IFX_RCU_BE_AHB3M; ++ reg &= ~IFX_RCU_BE_PCIE0S; ++ #endif ++ } ++ else { ++ reg |= IFX_RCU_BE_PCIE1M; ++ #ifdef CONFIG_IFX_PCIE1_HW_SWAP ++ /* Outbound, software swap needed */ ++ reg |= IFX_RCU_BE_AHB3M; ++ reg &= ~IFX_RCU_BE_PCIE1S; ++ #else ++ /* Outbound little endian */ ++ reg &= ~IFX_RCU_BE_AHB3M; ++ reg &= ~IFX_RCU_BE_PCIE1S; ++ #endif ++ } ++ ++ IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); ++ IFX_PCIE_PRINT(PCIE_MSG_REG, "%s IFX_RCU_AHB_ENDIAN: 0x%08x\n", __func__, IFX_REG_R32(IFX_RCU_AHB_ENDIAN)); ++} ++ ++static inline void pcie_phy_pmu_enable(int pcie_port) ++{ ++ if (pcie_port == 0) { /* XXX, should use macro*/ ++ PCIE0_PHY_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++ else { ++ PCIE1_PHY_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++} ++ ++static inline void pcie_phy_pmu_disable(int pcie_port) ++{ ++ if (pcie_port == 0) { /* XXX, should use macro*/ ++ PCIE0_PHY_PMU_SETUP(IFX_PMU_DISABLE); ++ } ++ else { ++ PCIE1_PHY_PMU_SETUP(IFX_PMU_DISABLE); ++ } ++} ++ ++static inline void pcie_pdi_big_endian(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_AHB_ENDIAN); ++ if (pcie_port == 0) { ++ /* Config AHB->PCIe and PDI endianness */ ++ reg |= IFX_RCU_BE_PCIE0_PDI; ++ } ++ else { ++ /* Config AHB->PCIe and PDI endianness */ ++ reg |= IFX_RCU_BE_PCIE1_PDI; ++ } ++ IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); ++} ++ ++static inline void pcie_pdi_pmu_enable(int pcie_port) ++{ ++ if (pcie_port == 0) { ++ /* Enable PDI to access PCIe PHY register */ ++ PDI0_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++ else { ++ PDI1_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++} ++ ++static inline void pcie_core_rst_assert(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ ++ /* Reset Core, bit 22 */ ++ if (pcie_port == 0) { ++ reg |= 0x00400000; ++ } ++ else { ++ reg |= 0x08000000; /* Bit 27 */ ++ } ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_core_rst_deassert(int pcie_port) ++{ ++ u32 reg; ++ ++ /* Make sure one micro-second delay */ ++ udelay(1); ++ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ if (pcie_port == 0) { ++ reg &= ~0x00400000; /* bit 22 */ ++ } ++ else { ++ reg &= ~0x08000000; /* Bit 27 */ ++ } ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_phy_rst_assert(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ if (pcie_port == 0) { ++ reg |= 0x00001000; /* Bit 12 */ ++ } ++ else { ++ reg |= 0x00002000; /* Bit 13 */ ++ } ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_phy_rst_deassert(int pcie_port) ++{ ++ u32 reg; ++ ++ /* Make sure one micro-second delay */ ++ udelay(1); ++ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ if (pcie_port == 0) { ++ reg &= ~0x00001000; /* Bit 12 */ ++ } ++ else { ++ reg &= ~0x00002000; /* Bit 13 */ ++ } ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_device_rst_assert(int pcie_port) ++{ ++ if (pcie_port == 0) { ++ ifx_ebu_led_set_data(11, 0); ++ } ++ else { ++ ifx_ebu_led_set_data(12, 0); ++ } ++} ++ ++static inline void pcie_device_rst_deassert(int pcie_port) ++{ ++ mdelay(100); ++ if (pcie_port == 0) { ++ ifx_ebu_led_set_data(11, 1); ++ } ++ else { ++ ifx_ebu_led_set_data(12, 1); ++ } ++ ifx_ebu_led_disable(); ++} ++ ++static inline void pcie_core_pmu_setup(int pcie_port) ++{ ++ if (pcie_port == 0) { ++ PCIE0_CTRL_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++ else { ++ PCIE1_CTRL_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++} ++ ++static inline void pcie_msi_init(int pcie_port) ++{ ++ pcie_msi_pic_init(pcie_port); ++ if (pcie_port == 0) { ++ MSI0_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++ else { ++ MSI1_PMU_SETUP(IFX_PMU_ENABLE); ++ } ++} ++ ++static inline u32 ++ifx_pcie_bus_nr_deduct(u32 bus_number, int pcie_port) ++{ ++ u32 tbus_number = bus_number; ++ ++#ifdef CONFIG_IFX_PCIE_2ND_CORE ++ if (pcie_port == IFX_PCIE_PORT1) { /* Port 1 must check if there are two cores enabled */ ++ if (pcibios_host_nr() > 1) { ++ tbus_number -= pcibios_1st_host_bus_nr(); ++ } ++ } ++#endif /* CONFIG_IFX_PCI */ ++ return tbus_number; ++} ++ ++static inline u32 ++ifx_pcie_bus_enum_hack(struct pci_bus *bus, u32 devfn, int where, u32 value, int pcie_port, int read) ++{ ++ struct pci_dev *pdev; ++ u32 tvalue = value; ++ ++ /* Sanity check */ ++ pdev = pci_get_slot(bus, devfn); ++ if (pdev == NULL) { ++ return tvalue; ++ } ++ ++ /* Only care about PCI bridge */ ++ if (pdev->hdr_type != PCI_HEADER_TYPE_BRIDGE) { ++ return tvalue; ++ } ++ ++ if (read) { /* Read hack */ ++ #ifdef CONFIG_IFX_PCIE_2ND_CORE ++ if (pcie_port == IFX_PCIE_PORT1) { /* Port 1 must check if there are two cores enabled */ ++ if (pcibios_host_nr() > 1) { ++ tvalue = ifx_pcie_bus_enum_read_hack(where, tvalue); ++ } ++ } ++ #endif /* CONFIG_IFX_PCIE_2ND_CORE */ ++ } ++ else { /* Write hack */ ++ #ifdef CONFIG_IFX_PCIE_2ND_CORE ++ if (pcie_port == IFX_PCIE_PORT1) { /* Port 1 must check if there are two cores enabled */ ++ if (pcibios_host_nr() > 1) { ++ tvalue = ifx_pcie_bus_enum_write_hack(where, tvalue); ++ } ++ } ++ #endif ++ } ++ return tvalue; ++} ++ ++#endif /* IFXMIPS_PCIE_AR10_H */ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie_msi.c +@@ -0,0 +1,392 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pcie_msi.c ++** PROJECT : IFX UEIP for VRX200 ++** MODULES : PCI MSI sub module ++** ++** DATE : 02 Mar 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe MSI Driver ++** COPYRIGHT : Copyright (c) 2009 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** HISTORY ++** $Date $Author $Comment ++** 02 Mar,2009 Lei Chuanhua Initial version ++*******************************************************************************/ ++/*! ++ \defgroup IFX_PCIE_MSI MSI OS APIs ++ \ingroup IFX_PCIE ++ \brief PCIe bus driver OS interface functions ++*/ ++ ++/*! ++ \file ifxmips_pcie_msi.c ++ \ingroup IFX_PCIE ++ \brief PCIe MSI OS interface file ++*/ ++ ++#ifndef AUTOCONF_INCLUDED ++#include ++#endif /* AUTOCONF_INCLUDED */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include "ifxmips_pcie_reg.h" ++#include "ifxmips_pcie.h" ++ ++#define IFX_MSI_IRQ_NUM 16 ++ ++enum { ++ IFX_PCIE_MSI_IDX0 = 0, ++ IFX_PCIE_MSI_IDX1, ++ IFX_PCIE_MSI_IDX2, ++ IFX_PCIE_MSI_IDX3, ++}; ++ ++typedef struct ifx_msi_irq_idx { ++ const int irq; ++ const int idx; ++}ifx_msi_irq_idx_t; ++ ++struct ifx_msi_pic { ++ volatile u32 pic_table[IFX_MSI_IRQ_NUM]; ++ volatile u32 pic_endian; /* 0x40 */ ++}; ++typedef struct ifx_msi_pic *ifx_msi_pic_t; ++ ++typedef struct ifx_msi_irq { ++ const volatile ifx_msi_pic_t msi_pic_p; ++ const u32 msi_phy_base; ++ const ifx_msi_irq_idx_t msi_irq_idx[IFX_MSI_IRQ_NUM]; ++ /* ++ * Each bit in msi_free_irq_bitmask represents a MSI interrupt that is ++ * in use. ++ */ ++ u16 msi_free_irq_bitmask; ++ ++ /* ++ * Each bit in msi_multiple_irq_bitmask tells that the device using ++ * this bit in msi_free_irq_bitmask is also using the next bit. This ++ * is used so we can disable all of the MSI interrupts when a device ++ * uses multiple. ++ */ ++ u16 msi_multiple_irq_bitmask; ++}ifx_msi_irq_t; ++ ++static ifx_msi_irq_t msi_irqs[IFX_PCIE_CORE_NR] = { ++ { ++ .msi_pic_p = (const volatile ifx_msi_pic_t)IFX_MSI_PIC_REG_BASE, ++ .msi_phy_base = PCIE_MSI_PHY_BASE, ++ .msi_irq_idx = { ++ {IFX_PCIE_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ {IFX_PCIE_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ {IFX_PCIE_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ {IFX_PCIE_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ }, ++ .msi_free_irq_bitmask = 0, ++ .msi_multiple_irq_bitmask= 0, ++ }, ++#ifdef CONFIG_IFX_PCIE_2ND_CORE ++ { ++ .msi_pic_p = (const volatile ifx_msi_pic_t)IFX_MSI1_PIC_REG_BASE, ++ .msi_phy_base = PCIE1_MSI_PHY_BASE, ++ .msi_irq_idx = { ++ {IFX_PCIE1_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE1_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE1_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE1_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ {IFX_PCIE1_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE1_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE1_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE1_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ {IFX_PCIE1_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE1_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE1_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE1_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ {IFX_PCIE1_MSI_IR0, IFX_PCIE_MSI_IDX0}, {IFX_PCIE1_MSI_IR1, IFX_PCIE_MSI_IDX1}, ++ {IFX_PCIE1_MSI_IR2, IFX_PCIE_MSI_IDX2}, {IFX_PCIE1_MSI_IR3, IFX_PCIE_MSI_IDX3}, ++ }, ++ .msi_free_irq_bitmask = 0, ++ .msi_multiple_irq_bitmask= 0, ++ ++ }, ++#endif /* CONFIG_IFX_PCIE_2ND_CORE */ ++}; ++ ++/* ++ * This lock controls updates to msi_free_irq_bitmask, ++ * msi_multiple_irq_bitmask and pic register settting ++ */ ++static DEFINE_SPINLOCK(ifx_pcie_msi_lock); ++ ++void pcie_msi_pic_init(int pcie_port) ++{ ++ spin_lock(&ifx_pcie_msi_lock); ++ msi_irqs[pcie_port].msi_pic_p->pic_endian = IFX_MSI_PIC_BIG_ENDIAN; ++ spin_unlock(&ifx_pcie_msi_lock); ++} ++ ++/** ++ * \fn int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) ++ * \brief Called when a driver request MSI interrupts instead of the ++ * legacy INT A-D. This routine will allocate multiple interrupts ++ * for MSI devices that support them. A device can override this by ++ * programming the MSI control bits [6:4] before calling ++ * pci_enable_msi(). ++ * ++ * \param[in] pdev Device requesting MSI interrupts ++ * \param[in] desc MSI descriptor ++ * ++ * \return -EINVAL Invalid pcie root port or invalid msi bit ++ * \return 0 OK ++ * \ingroup IFX_PCIE_MSI ++ */ ++int ++arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) ++{ ++ int irq, pos; ++ u16 control; ++ int irq_idx; ++ int irq_step; ++ int configured_private_bits; ++ int request_private_bits; ++ struct msi_msg msg; ++ u16 search_mask; ++ struct ifx_pci_controller *ctrl = pdev->bus->sysdata; ++ int pcie_port = ctrl->port; ++ ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "%s %s enter\n", __func__, pci_name(pdev)); ++ ++ /* XXX, skip RC MSI itself */ ++ if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) { ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "%s RC itself doesn't use MSI interrupt\n", __func__); ++ return -EINVAL; ++ } ++ ++ /* ++ * Read the MSI config to figure out how many IRQs this device ++ * wants. Most devices only want 1, which will give ++ * configured_private_bits and request_private_bits equal 0. ++ */ ++ pci_read_config_word(pdev, desc->msi_attrib.pos + PCI_MSI_FLAGS, &control); ++ ++ /* ++ * If the number of private bits has been configured then use ++ * that value instead of the requested number. This gives the ++ * driver the chance to override the number of interrupts ++ * before calling pci_enable_msi(). ++ */ ++ configured_private_bits = (control & PCI_MSI_FLAGS_QSIZE) >> 4; ++ if (configured_private_bits == 0) { ++ /* Nothing is configured, so use the hardware requested size */ ++ request_private_bits = (control & PCI_MSI_FLAGS_QMASK) >> 1; ++ } ++ else { ++ /* ++ * Use the number of configured bits, assuming the ++ * driver wanted to override the hardware request ++ * value. ++ */ ++ request_private_bits = configured_private_bits; ++ } ++ ++ /* ++ * The PCI 2.3 spec mandates that there are at most 32 ++ * interrupts. If this device asks for more, only give it one. ++ */ ++ if (request_private_bits > 5) { ++ request_private_bits = 0; ++ } ++again: ++ /* ++ * The IRQs have to be aligned on a power of two based on the ++ * number being requested. ++ */ ++ irq_step = (1 << request_private_bits); ++ ++ /* Mask with one bit for each IRQ */ ++ search_mask = (1 << irq_step) - 1; ++ ++ /* ++ * We're going to search msi_free_irq_bitmask_lock for zero ++ * bits. This represents an MSI interrupt number that isn't in ++ * use. ++ */ ++ spin_lock(&ifx_pcie_msi_lock); ++ for (pos = 0; pos < IFX_MSI_IRQ_NUM; pos += irq_step) { ++ if ((msi_irqs[pcie_port].msi_free_irq_bitmask & (search_mask << pos)) == 0) { ++ msi_irqs[pcie_port].msi_free_irq_bitmask |= search_mask << pos; ++ msi_irqs[pcie_port].msi_multiple_irq_bitmask |= (search_mask >> 1) << pos; ++ break; ++ } ++ } ++ spin_unlock(&ifx_pcie_msi_lock); ++ ++ /* Make sure the search for available interrupts didn't fail */ ++ if (pos >= IFX_MSI_IRQ_NUM) { ++ if (request_private_bits) { ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "%s: Unable to find %d free " ++ "interrupts, trying just one", __func__, 1 << request_private_bits); ++ request_private_bits = 0; ++ goto again; ++ } ++ else { ++ printk(KERN_ERR "%s: Unable to find a free MSI interrupt\n", __func__); ++ return -EINVAL; ++ } ++ } ++ irq = msi_irqs[pcie_port].msi_irq_idx[pos].irq; ++ irq_idx = msi_irqs[pcie_port].msi_irq_idx[pos].idx; ++ ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "pos %d, irq %d irq_idx %d\n", pos, irq, irq_idx); ++ ++ /* ++ * Initialize MSI. This has to match the memory-write endianess from the device ++ * Address bits [23:12] ++ */ ++ spin_lock(&ifx_pcie_msi_lock); ++ msi_irqs[pcie_port].msi_pic_p->pic_table[pos] = SM(irq_idx, IFX_MSI_PIC_INT_LINE) | ++ SM((msi_irqs[pcie_port].msi_phy_base >> 12), IFX_MSI_PIC_MSG_ADDR) | ++ SM((1 << pos), IFX_MSI_PIC_MSG_DATA); ++ ++ /* Enable this entry */ ++ msi_irqs[pcie_port].msi_pic_p->pic_table[pos] &= ~IFX_MSI_PCI_INT_DISABLE; ++ spin_unlock(&ifx_pcie_msi_lock); ++ ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "pic_table[%d]: 0x%08x\n", ++ pos, msi_irqs[pcie_port].msi_pic_p->pic_table[pos]); ++ ++ /* Update the number of IRQs the device has available to it */ ++ control &= ~PCI_MSI_FLAGS_QSIZE; ++ control |= (request_private_bits << 4); ++ pci_write_config_word(pdev, desc->msi_attrib.pos + PCI_MSI_FLAGS, control); ++ ++ set_irq_msi(irq, desc); ++ msg.address_hi = 0x0; ++ msg.address_lo = msi_irqs[pcie_port].msi_phy_base; ++ msg.data = SM((1 << pos), IFX_MSI_PIC_MSG_DATA); ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "msi_data: pos %d 0x%08x\n", pos, msg.data); ++ ++ write_msi_msg(irq, &msg); ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "%s exit\n", __func__); ++ return 0; ++} ++ ++static int ++pcie_msi_irq_to_port(unsigned int irq, int *port) ++{ ++ int ret = 0; ++ ++ if (irq == IFX_PCIE_MSI_IR0 || irq == IFX_PCIE_MSI_IR1 || ++ irq == IFX_PCIE_MSI_IR2 || irq == IFX_PCIE_MSI_IR3) { ++ *port = IFX_PCIE_PORT0; ++ } ++#ifdef CONFIG_IFX_PCIE_2ND_CORE ++ else if (irq == IFX_PCIE1_MSI_IR0 || irq == IFX_PCIE1_MSI_IR1 || ++ irq == IFX_PCIE1_MSI_IR2 || irq == IFX_PCIE1_MSI_IR3) { ++ *port = IFX_PCIE_PORT1; ++ } ++#endif /* CONFIG_IFX_PCIE_2ND_CORE */ ++ else { ++ printk(KERN_ERR "%s: Attempted to teardown illegal " ++ "MSI interrupt (%d)\n", __func__, irq); ++ ret = -EINVAL; ++ } ++ return ret; ++} ++ ++/** ++ * \fn void arch_teardown_msi_irq(unsigned int irq) ++ * \brief Called when a device no longer needs its MSI interrupts. All ++ * MSI interrupts for the device are freed. ++ * ++ * \param irq The devices first irq number. There may be multple in sequence. ++ * \return none ++ * \ingroup IFX_PCIE_MSI ++ */ ++void ++arch_teardown_msi_irq(unsigned int irq) ++{ ++ int pos; ++ int number_irqs; ++ u16 bitmask; ++ int pcie_port; ++ ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "%s enter\n", __func__); ++ ++ BUG_ON(irq > INT_NUM_IM4_IRL31); ++ ++ if (pcie_msi_irq_to_port(irq, &pcie_port) != 0) { ++ return; ++ } ++ ++ /* Shift the mask to the correct bit location, not always correct ++ * Probally, the first match will be chosen. ++ */ ++ for (pos = 0; pos < IFX_MSI_IRQ_NUM; pos++) { ++ if ((msi_irqs[pcie_port].msi_irq_idx[pos].irq == irq) ++ && (msi_irqs[pcie_port].msi_free_irq_bitmask & ( 1 << pos))) { ++ break; ++ } ++ } ++ if (pos >= IFX_MSI_IRQ_NUM) { ++ printk(KERN_ERR "%s: Unable to find a matched MSI interrupt\n", __func__); ++ return; ++ } ++ spin_lock(&ifx_pcie_msi_lock); ++ /* Disable this entry */ ++ msi_irqs[pcie_port].msi_pic_p->pic_table[pos] |= IFX_MSI_PCI_INT_DISABLE; ++ msi_irqs[pcie_port].msi_pic_p->pic_table[pos] &= ~(IFX_MSI_PIC_INT_LINE | IFX_MSI_PIC_MSG_ADDR | IFX_MSI_PIC_MSG_DATA); ++ spin_unlock(&ifx_pcie_msi_lock); ++ /* ++ * Count the number of IRQs we need to free by looking at the ++ * msi_multiple_irq_bitmask. Each bit set means that the next ++ * IRQ is also owned by this device. ++ */ ++ number_irqs = 0; ++ while (((pos + number_irqs) < IFX_MSI_IRQ_NUM) && ++ (msi_irqs[pcie_port].msi_multiple_irq_bitmask & (1 << (pos + number_irqs)))) { ++ number_irqs++; ++ } ++ number_irqs++; ++ ++ /* Mask with one bit for each IRQ */ ++ bitmask = (1 << number_irqs) - 1; ++ ++ bitmask <<= pos; ++ if ((msi_irqs[pcie_port].msi_free_irq_bitmask & bitmask) != bitmask) { ++ printk(KERN_ERR "%s: Attempted to teardown MSI " ++ "interrupt (%d) not in use\n", __func__, irq); ++ return; ++ } ++ /* Checks are done, update the in use bitmask */ ++ spin_lock(&ifx_pcie_msi_lock); ++ msi_irqs[pcie_port].msi_free_irq_bitmask &= ~bitmask; ++ msi_irqs[pcie_port].msi_multiple_irq_bitmask &= ~(bitmask >> 1); ++ spin_unlock(&ifx_pcie_msi_lock); ++ IFX_PCIE_PRINT(PCIE_MSG_MSI, "%s exit\n", __func__); ++} ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Chuanhua.Lei@infineon.com"); ++MODULE_SUPPORTED_DEVICE("Infineon PCIe IP builtin MSI PIC module"); ++MODULE_DESCRIPTION("Infineon PCIe IP builtin MSI PIC driver"); ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie_phy.c +@@ -0,0 +1,478 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pcie_phy.c ++** PROJECT : IFX UEIP for VRX200 ++** MODULES : PCIe PHY sub module ++** ++** DATE : 14 May 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe Root Complex Driver ++** COPYRIGHT : Copyright (c) 2009 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** HISTORY ++** $Version $Date $Author $Comment ++** 0.0.1 14 May,2009 Lei Chuanhua Initial version ++*******************************************************************************/ ++/*! ++ \file ifxmips_pcie_phy.c ++ \ingroup IFX_PCIE ++ \brief PCIe PHY PLL register programming source file ++*/ ++#include ++#include ++#include ++#include ++ ++#include "ifxmips_pcie_reg.h" ++#include "ifxmips_pcie.h" ++ ++/* PCIe PDI only supports 16 bit operation */ ++ ++#define IFX_PCIE_PHY_REG_WRITE16(__addr, __data) \ ++ ((*(volatile u16 *) (__addr)) = (__data)) ++ ++#define IFX_PCIE_PHY_REG_READ16(__addr) \ ++ (*(volatile u16 *) (__addr)) ++ ++#define IFX_PCIE_PHY_REG16(__addr) \ ++ (*(volatile u16 *) (__addr)) ++ ++#define IFX_PCIE_PHY_REG(__reg, __value, __mask) do { \ ++ u16 read_data; \ ++ u16 write_data; \ ++ read_data = IFX_PCIE_PHY_REG_READ16((__reg)); \ ++ write_data = (read_data & ((u16)~(__mask))) | (((u16)(__value)) & ((u16)(__mask)));\ ++ IFX_PCIE_PHY_REG_WRITE16((__reg), write_data); \ ++} while (0) ++ ++#define IFX_PCIE_PLL_TIMEOUT 1000 /* Tunnable */ ++ ++//#define IFX_PCI_PHY_REG_DUMP ++ ++#ifdef IFX_PCI_PHY_REG_DUMP ++static void ++pcie_phy_reg_dump(int pcie_port) ++{ ++ printk("PLL REGFILE\n"); ++ printk("PCIE_PHY_PLL_CTRL1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_CTRL1(pcie_port))); ++ printk("PCIE_PHY_PLL_CTRL2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_CTRL2(pcie_port))); ++ printk("PCIE_PHY_PLL_CTRL3 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_CTRL3(pcie_port))); ++ printk("PCIE_PHY_PLL_CTRL4 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_CTRL4(pcie_port))); ++ printk("PCIE_PHY_PLL_CTRL5 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_CTRL5(pcie_port))); ++ printk("PCIE_PHY_PLL_CTRL6 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_CTRL6(pcie_port))); ++ printk("PCIE_PHY_PLL_CTRL7 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_CTRL7(pcie_port))); ++ printk("PCIE_PHY_PLL_A_CTRL1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_A_CTRL1(pcie_port))); ++ printk("PCIE_PHY_PLL_A_CTRL2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_A_CTRL2(pcie_port))); ++ printk("PCIE_PHY_PLL_A_CTRL3 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_A_CTRL3(pcie_port))); ++ printk("PCIE_PHY_PLL_STATUS 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_STATUS(pcie_port))); ++ ++ printk("TX1 REGFILE\n"); ++ printk("PCIE_PHY_TX1_CTRL1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_CTRL1(pcie_port))); ++ printk("PCIE_PHY_TX1_CTRL2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_CTRL2(pcie_port))); ++ printk("PCIE_PHY_TX1_CTRL3 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_CTRL3(pcie_port))); ++ printk("PCIE_PHY_TX1_A_CTRL1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_A_CTRL1(pcie_port))); ++ printk("PCIE_PHY_TX1_A_CTRL2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_A_CTRL2(pcie_port))); ++ printk("PCIE_PHY_TX1_MOD1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_MOD1(pcie_port))); ++ printk("PCIE_PHY_TX1_MOD2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_MOD2(pcie_port))); ++ printk("PCIE_PHY_TX1_MOD3 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX1_MOD3(pcie_port))); ++ ++ printk("TX2 REGFILE\n"); ++ printk("PCIE_PHY_TX2_CTRL1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX2_CTRL1(pcie_port))); ++ printk("PCIE_PHY_TX2_CTRL2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX2_CTRL2(pcie_port))); ++ printk("PCIE_PHY_TX2_A_CTRL1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX2_A_CTRL1(pcie_port))); ++ printk("PCIE_PHY_TX2_A_CTRL2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX2_A_CTRL2(pcie_port))); ++ printk("PCIE_PHY_TX2_MOD1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX2_MOD1(pcie_port))); ++ printk("PCIE_PHY_TX2_MOD2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX2_MOD2(pcie_port))); ++ printk("PCIE_PHY_TX2_MOD3 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_TX2_MOD3(pcie_port))); ++ ++ printk("RX1 REGFILE\n"); ++ printk("PCIE_PHY_RX1_CTRL1 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_RX1_CTRL1(pcie_port))); ++ printk("PCIE_PHY_RX1_CTRL2 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_RX1_CTRL2(pcie_port))); ++ printk("PCIE_PHY_RX1_CDR 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_RX1_CDR(pcie_port))); ++ printk("PCIE_PHY_RX1_EI 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_RX1_EI(pcie_port))); ++ printk("PCIE_PHY_RX1_A_CTRL 0x%04x\n", IFX_PCIE_PHY_REG16(PCIE_PHY_RX1_A_CTRL(pcie_port))); ++} ++#endif /* IFX_PCI_PHY_REG_DUMP */ ++ ++static void ++pcie_phy_comm_setup(int pcie_port) ++{ ++ /* PLL Setting */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL1(pcie_port), 0x120e, 0xFFFF); ++ ++ /* increase the bias reference voltage */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL2(pcie_port), 0x39D7, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL3(pcie_port), 0x0900, 0xFFFF); ++ ++ /* Endcnt */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_EI(pcie_port), 0x0004, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_A_CTRL(pcie_port), 0x6803, 0xFFFF); ++ ++ /* force */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL1(pcie_port), 0x0008, 0x0008); ++ ++ /* predrv_ser_en */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_A_CTRL2(pcie_port), 0x0706, 0xFFFF); ++ ++ /* ctrl_lim */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL3(pcie_port), 0x1FFF, 0xFFFF); ++ ++ /* ctrl */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_A_CTRL1(pcie_port), 0x0800, 0xFF00); ++ ++ /* predrv_ser_en */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_A_CTRL2(pcie_port), 0x4702, 0x7F00); ++ ++ /* RTERM*/ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL2(pcie_port), 0x2e00, 0xFFFF); ++ ++ /* Improved 100MHz clock output */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_CTRL2(pcie_port), 0x3096, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_A_CTRL2(pcie_port), 0x4707, 0xFFFF); ++ ++ /* Reduced CDR BW to avoid glitches */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_CDR(pcie_port), 0x0235, 0xFFFF); ++} ++ ++#ifdef CONFIG_IFX_PCIE_PHY_36MHZ_MODE ++static void ++pcie_phy_36mhz_mode_setup(int pcie_port) ++{ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d enter\n", __func__, pcie_port); ++#ifdef IFX_PCI_PHY_REG_DUMP ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "Initial PHY register dump\n"); ++ pcie_phy_reg_dump(pcie_port); ++#endif ++ ++ /* en_ext_mmd_div_ratio */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0000, 0x0002); ++ ++ /* ext_mmd_div_ratio*/ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0000, 0x0070); ++ ++ /* pll_ensdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0200, 0x0200); ++ ++ /* en_const_sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0100, 0x0100); ++ ++ /* mmd */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL3(pcie_port), 0x2000, 0xe000); ++ ++ /* lf_mode */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL2(pcie_port), 0x0000, 0x4000); ++ ++ /* const_sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL1(pcie_port), 0x38e4, 0xFFFF); ++ ++ /* const sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x00ee, 0x00FF); ++ ++ /* pllmod */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL7(pcie_port), 0x0002, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL6(pcie_port), 0x3a04, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL5(pcie_port), 0xfae3, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL4(pcie_port), 0x1b72, 0xFFFF); ++ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d exit\n", __func__, pcie_port); ++} ++#endif /* CONFIG_IFX_PCIE_PHY_36MHZ_MODE */ ++ ++#ifdef CONFIG_IFX_PCIE_PHY_36MHZ_SSC_MODE ++static void ++pcie_phy_36mhz_ssc_mode_setup(int pcie_port) ++{ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d enter\n", __func__, pcie_port); ++#ifdef IFX_PCI_PHY_REG_DUMP ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "Initial PHY register dump\n"); ++ pcie_phy_reg_dump(pcie_port); ++#endif ++ ++ /* PLL Setting */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL1(pcie_port), 0x120e, 0xFFFF); ++ ++ /* Increase the bias reference voltage */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL2(pcie_port), 0x39D7, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL3(pcie_port), 0x0900, 0xFFFF); ++ ++ /* Endcnt */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_EI(pcie_port), 0x0004, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_A_CTRL(pcie_port), 0x6803, 0xFFFF); ++ ++ /* Force */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL1(pcie_port), 0x0008, 0x0008); ++ ++ /* Predrv_ser_en */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_A_CTRL2(pcie_port), 0x0706, 0xFFFF); ++ ++ /* ctrl_lim */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL3(pcie_port), 0x1FFF, 0xFFFF); ++ ++ /* ctrl */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_A_CTRL1(pcie_port), 0x0800, 0xFF00); ++ ++ /* predrv_ser_en */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_A_CTRL2(pcie_port), 0x4702, 0x7F00); ++ ++ /* RTERM*/ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL2(pcie_port), 0x2e00, 0xFFFF); ++ ++ /* en_ext_mmd_div_ratio */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0000, 0x0002); ++ ++ /* ext_mmd_div_ratio*/ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0000, 0x0070); ++ ++ /* pll_ensdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0400, 0x0400); ++ ++ /* en_const_sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0200, 0x0200); ++ ++ /* mmd */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL3(pcie_port), 0x2000, 0xe000); ++ ++ /* lf_mode */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL2(pcie_port), 0x0000, 0x4000); ++ ++ /* const_sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL1(pcie_port), 0x38e4, 0xFFFF); ++ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0000, 0x0100); ++ /* const sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x00ee, 0x00FF); ++ ++ /* pllmod */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL7(pcie_port), 0x0002, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL6(pcie_port), 0x3a04, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL5(pcie_port), 0xfae3, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL4(pcie_port), 0x1c72, 0xFFFF); ++ ++ /* improved 100MHz clock output */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_CTRL2(pcie_port), 0x3096, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_A_CTRL2(pcie_port), 0x4707, 0xFFFF); ++ ++ /* reduced CDR BW to avoid glitches */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_CDR(pcie_port), 0x0235, 0xFFFF); ++ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d exit\n", __func__, pcie_port); ++} ++#endif /* CONFIG_IFX_PCIE_PHY_36MHZ_SSC_MODE */ ++ ++#ifdef CONFIG_IFX_PCIE_PHY_25MHZ_MODE ++static void ++pcie_phy_25mhz_mode_setup(int pcie_port) ++{ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d enter\n", __func__, pcie_port); ++#ifdef IFX_PCI_PHY_REG_DUMP ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "Initial PHY register dump\n"); ++ pcie_phy_reg_dump(pcie_port); ++#endif ++ /* en_const_sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0100, 0x0100); ++ ++ /* pll_ensdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0000, 0x0200); ++ ++ /* en_ext_mmd_div_ratio*/ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0002, 0x0002); ++ ++ /* ext_mmd_div_ratio*/ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0040, 0x0070); ++ ++ /* mmd */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL3(pcie_port), 0x6000, 0xe000); ++ ++ /* lf_mode */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL2(pcie_port), 0x4000, 0x4000); ++ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d exit\n", __func__, pcie_port); ++} ++#endif /* CONFIG_IFX_PCIE_PHY_25MHZ_MODE */ ++ ++#ifdef CONFIG_IFX_PCIE_PHY_100MHZ_MODE ++static void ++pcie_phy_100mhz_mode_setup(int pcie_port) ++{ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d enter\n", __func__, pcie_port); ++#ifdef IFX_PCI_PHY_REG_DUMP ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "Initial PHY register dump\n"); ++ pcie_phy_reg_dump(pcie_port); ++#endif ++ /* en_ext_mmd_div_ratio */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0000, 0x0002); ++ ++ /* ext_mmd_div_ratio*/ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL3(pcie_port), 0x0000, 0x0070); ++ ++ /* pll_ensdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0200, 0x0200); ++ ++ /* en_const_sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x0100, 0x0100); ++ ++ /* mmd */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL3(pcie_port), 0x2000, 0xe000); ++ ++ /* lf_mode */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_A_CTRL2(pcie_port), 0x0000, 0x4000); ++ ++ /* const_sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL1(pcie_port), 0x38e4, 0xFFFF); ++ ++ /* const sdm */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL2(pcie_port), 0x00ee, 0x00FF); ++ ++ /* pllmod */ ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL7(pcie_port), 0x0002, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL6(pcie_port), 0x3a04, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL5(pcie_port), 0xfae3, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_PLL_CTRL4(pcie_port), 0x1b72, 0xFFFF); ++ ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "%s pcie_port %d exit\n", __func__, pcie_port); ++} ++#endif /* CONFIG_IFX_PCIE_PHY_100MHZ_MODE */ ++ ++static int ++pcie_phy_wait_startup_ready(int pcie_port) ++{ ++ int i; ++ ++ for (i = 0; i < IFX_PCIE_PLL_TIMEOUT; i++) { ++ if ((IFX_PCIE_PHY_REG16(PCIE_PHY_PLL_STATUS(pcie_port)) & 0x0040) != 0) { ++ break; ++ } ++ udelay(10); ++ } ++ if (i >= IFX_PCIE_PLL_TIMEOUT) { ++ printk(KERN_ERR "%s PLL Link timeout\n", __func__); ++ return -1; ++ } ++ return 0; ++} ++ ++static void ++pcie_phy_load_enable(int pcie_port, int slice) ++{ ++ /* Set the load_en of tx/rx slice to '1' */ ++ switch (slice) { ++ case 1: ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL1(pcie_port), 0x0010, 0x0010); ++ break; ++ case 2: ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_CTRL1(pcie_port), 0x0010, 0x0010); ++ break; ++ case 3: ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_CTRL1(pcie_port), 0x0002, 0x0002); ++ break; ++ } ++} ++ ++static void ++pcie_phy_load_disable(int pcie_port, int slice) ++{ ++ /* set the load_en of tx/rx slice to '0' */ ++ switch (slice) { ++ case 1: ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_CTRL1(pcie_port), 0x0000, 0x0010); ++ break; ++ case 2: ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_CTRL1(pcie_port), 0x0000, 0x0010); ++ break; ++ case 3: ++ IFX_PCIE_PHY_REG(PCIE_PHY_RX1_CTRL1(pcie_port), 0x0000, 0x0002); ++ break; ++ } ++} ++ ++static void ++pcie_phy_load_war(int pcie_port) ++{ ++ int slice; ++ ++ for (slice = 1; slice < 4; slice++) { ++ pcie_phy_load_enable(pcie_port, slice); ++ udelay(1); ++ pcie_phy_load_disable(pcie_port, slice); ++ } ++} ++ ++static void ++pcie_phy_tx2_modulation(int pcie_port) ++{ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_MOD1(pcie_port), 0x1FFE, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_MOD2(pcie_port), 0xFFFE, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_MOD3(pcie_port), 0x0601, 0xFFFF); ++ mdelay(1); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX2_MOD3(pcie_port), 0x0001, 0xFFFF); ++} ++ ++static void ++pcie_phy_tx1_modulation(int pcie_port) ++{ ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_MOD1(pcie_port), 0x1FFE, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_MOD2(pcie_port), 0xFFFE, 0xFFFF); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_MOD3(pcie_port), 0x0601, 0xFFFF); ++ mdelay(1); ++ IFX_PCIE_PHY_REG(PCIE_PHY_TX1_MOD3(pcie_port), 0x0001, 0xFFFF); ++} ++ ++static void ++pcie_phy_tx_modulation_war(int pcie_port) ++{ ++ int i; ++ ++#define PCIE_PHY_MODULATION_NUM 5 ++ for (i = 0; i < PCIE_PHY_MODULATION_NUM; i++) { ++ pcie_phy_tx2_modulation(pcie_port); ++ pcie_phy_tx1_modulation(pcie_port); ++ } ++#undef PCIE_PHY_MODULATION_NUM ++} ++ ++void ++pcie_phy_clock_mode_setup(int pcie_port) ++{ ++ pcie_pdi_big_endian(pcie_port); ++ ++ /* Enable PDI to access PCIe PHY register */ ++ pcie_pdi_pmu_enable(pcie_port); ++ ++ /* Configure PLL and PHY clock */ ++ pcie_phy_comm_setup(pcie_port); ++ ++#ifdef CONFIG_IFX_PCIE_PHY_36MHZ_MODE ++ pcie_phy_36mhz_mode_setup(pcie_port); ++#elif defined(CONFIG_IFX_PCIE_PHY_36MHZ_SSC_MODE) ++ pcie_phy_36mhz_ssc_mode_setup(pcie_port); ++#elif defined(CONFIG_IFX_PCIE_PHY_25MHZ_MODE) ++ pcie_phy_25mhz_mode_setup(pcie_port); ++#elif defined (CONFIG_IFX_PCIE_PHY_100MHZ_MODE) ++ pcie_phy_100mhz_mode_setup(pcie_port); ++#else ++ #error "PCIE PHY Clock Mode must be chosen first!!!!" ++#endif /* CONFIG_IFX_PCIE_PHY_36MHZ_MODE */ ++ ++ /* Enable PCIe PHY and make PLL setting take effect */ ++ pcie_phy_pmu_enable(pcie_port); ++ ++ /* Check if we are in startup_ready status */ ++ pcie_phy_wait_startup_ready(pcie_port); ++ ++ pcie_phy_load_war(pcie_port); ++ ++ /* Apply TX modulation workarounds */ ++ pcie_phy_tx_modulation_war(pcie_port); ++ ++#ifdef IFX_PCI_PHY_REG_DUMP ++ IFX_PCIE_PRINT(PCIE_MSG_PHY, "Modified PHY register dump\n"); ++ pcie_phy_reg_dump(pcie_port); ++#endif ++} ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie_pm.c +@@ -0,0 +1,176 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pcie_pm.c ++** PROJECT : IFX UEIP ++** MODULES : PCIE Root Complex Driver ++** ++** DATE : 21 Dec 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIE Root Complex Driver Power Managment ++** COPYRIGHT : Copyright (c) 2009 ++** Lantiq Deutschland GmbH ++** Am Campeon 3, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** ++** HISTORY ++** $Date $Author $Comment ++** 21 Dec,2009 Lei Chuanhua First UEIP release ++*******************************************************************************/ ++/*! ++ \defgroup IFX_PCIE_PM Power Management functions ++ \ingroup IFX_PCIE ++ \brief IFX PCIE Root Complex Driver power management functions ++*/ ++ ++/*! ++ \file ifxmips_pcie_pm.c ++ \ingroup IFX_PCIE ++ \brief source file for PCIE Root Complex Driver Power Management ++*/ ++ ++#ifndef EXPORT_SYMTAB ++#define EXPORT_SYMTAB ++#endif ++#ifndef AUTOCONF_INCLUDED ++#include ++#endif /* AUTOCONF_INCLUDED */ ++#include ++#include ++#include ++#include ++#include ++ ++/* Project header */ ++#include ++#include ++#include ++#include ++#include "ifxmips_pcie_pm.h" ++ ++/** ++ * \fn static IFX_PMCU_RETURN_t ifx_pcie_pmcu_state_change(IFX_PMCU_STATE_t pmcuState) ++ * \brief the callback function to request pmcu state in the power management hardware-dependent module ++ * ++ * \param pmcuState This parameter is a PMCU state. ++ * ++ * \return IFX_PMCU_RETURN_SUCCESS Set Power State successfully ++ * \return IFX_PMCU_RETURN_ERROR Failed to set power state. ++ * \return IFX_PMCU_RETURN_DENIED Not allowed to operate power state ++ * \ingroup IFX_PCIE_PM ++ */ ++static IFX_PMCU_RETURN_t ++ifx_pcie_pmcu_state_change(IFX_PMCU_STATE_t pmcuState) ++{ ++ switch(pmcuState) ++ { ++ case IFX_PMCU_STATE_D0: ++ return IFX_PMCU_RETURN_SUCCESS; ++ case IFX_PMCU_STATE_D1: // Not Applicable ++ return IFX_PMCU_RETURN_DENIED; ++ case IFX_PMCU_STATE_D2: // Not Applicable ++ return IFX_PMCU_RETURN_DENIED; ++ case IFX_PMCU_STATE_D3: // Module clock gating and Power gating ++ return IFX_PMCU_RETURN_SUCCESS; ++ default: ++ return IFX_PMCU_RETURN_DENIED; ++ } ++} ++ ++/** ++ * \fn static IFX_PMCU_RETURN_t ifx_pcie_pmcu_state_get(IFX_PMCU_STATE_t *pmcuState) ++ * \brief the callback function to get pmcu state in the power management hardware-dependent module ++ ++ * \param pmcuState Pointer to return power state. ++ * ++ * \return IFX_PMCU_RETURN_SUCCESS Set Power State successfully ++ * \return IFX_PMCU_RETURN_ERROR Failed to set power state. ++ * \return IFX_PMCU_RETURN_DENIED Not allowed to operate power state ++ * \ingroup IFX_PCIE_PM ++ */ ++static IFX_PMCU_RETURN_t ++ifx_pcie_pmcu_state_get(IFX_PMCU_STATE_t *pmcuState) ++{ ++ return IFX_PMCU_RETURN_SUCCESS; ++} ++ ++/** ++ * \fn IFX_PMCU_RETURN_t ifx_pcie_pmcu_prechange(IFX_PMCU_MODULE_t pmcuModule, IFX_PMCU_STATE_t newState, IFX_PMCU_STATE_t oldState) ++ * \brief Apply all callbacks registered to be executed before a state change for pmcuModule ++ * ++ * \param pmcuModule Module ++ * \param newState New state ++ * \param oldState Old state ++ * \return IFX_PMCU_RETURN_SUCCESS Set Power State successfully ++ * \return IFX_PMCU_RETURN_ERROR Failed to set power state. ++ * \ingroup IFX_PCIE_PM ++ */ ++static IFX_PMCU_RETURN_t ++ifx_pcie_pmcu_prechange(IFX_PMCU_MODULE_t pmcuModule, IFX_PMCU_STATE_t newState, IFX_PMCU_STATE_t oldState) ++{ ++ return IFX_PMCU_RETURN_SUCCESS; ++} ++ ++/** ++ * \fn IFX_PMCU_RETURN_t ifx_pcie_pmcu_postchange(IFX_PMCU_MODULE_t pmcuModule, IFX_PMCU_STATE_t newState, IFX_PMCU_STATE_t oldState) ++ * \brief Apply all callbacks registered to be executed before a state change for pmcuModule ++ * ++ * \param pmcuModule Module ++ * \param newState New state ++ * \param oldState Old state ++ * \return IFX_PMCU_RETURN_SUCCESS Set Power State successfully ++ * \return IFX_PMCU_RETURN_ERROR Failed to set power state. ++ * \ingroup IFX_PCIE_PM ++ */ ++static IFX_PMCU_RETURN_t ++ifx_pcie_pmcu_postchange(IFX_PMCU_MODULE_t pmcuModule, IFX_PMCU_STATE_t newState, IFX_PMCU_STATE_t oldState) ++{ ++ return IFX_PMCU_RETURN_SUCCESS; ++} ++ ++/** ++ * \fn static void ifx_pcie_pmcu_init(void) ++ * \brief Register with central PMCU module ++ * \return none ++ * \ingroup IFX_PCIE_PM ++ */ ++void ++ifx_pcie_pmcu_init(void) ++{ ++ IFX_PMCU_REGISTER_t pmcuRegister; ++ ++ /* XXX, hook driver context */ ++ ++ /* State function register */ ++ memset(&pmcuRegister, 0, sizeof(IFX_PMCU_REGISTER_t)); ++ pmcuRegister.pmcuModule = IFX_PMCU_MODULE_PCIE; ++ pmcuRegister.pmcuModuleNr = 0; ++ pmcuRegister.ifx_pmcu_state_change = ifx_pcie_pmcu_state_change; ++ pmcuRegister.ifx_pmcu_state_get = ifx_pcie_pmcu_state_get; ++ pmcuRegister.pre = ifx_pcie_pmcu_prechange; ++ pmcuRegister.post= ifx_pcie_pmcu_postchange; ++ ifx_pmcu_register(&pmcuRegister); ++} ++ ++/** ++ * \fn static void ifx_pcie_pmcu_exit(void) ++ * \brief Unregister with central PMCU module ++ * ++ * \return none ++ * \ingroup IFX_PCIE_PM ++ */ ++void ++ifx_pcie_pmcu_exit(void) ++{ ++ IFX_PMCU_REGISTER_t pmcuUnRegister; ++ ++ /* XXX, hook driver context */ ++ ++ pmcuUnRegister.pmcuModule = IFX_PMCU_MODULE_PCIE; ++ pmcuUnRegister.pmcuModuleNr = 0; ++ ifx_pmcu_unregister(&pmcuUnRegister); ++} ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie_pm.h +@@ -0,0 +1,36 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pcie_pm.h ++** PROJECT : IFX UEIP ++** MODULES : PCIe Root Complex Driver ++** ++** DATE : 21 Dec 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe Root Complex Driver Power Managment ++** COPYRIGHT : Copyright (c) 2009 ++** Lantiq Deutschland GmbH ++** Am Campeon 3, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** ++** HISTORY ++** $Date $Author $Comment ++** 21 Dec,2009 Lei Chuanhua First UEIP release ++*******************************************************************************/ ++/*! ++ \file ifxmips_pcie_pm.h ++ \ingroup IFX_PCIE ++ \brief header file for PCIe Root Complex Driver Power Management ++*/ ++ ++#ifndef IFXMIPS_PCIE_PM_H ++#define IFXMIPS_PCIE_PM_H ++ ++void ifx_pcie_pmcu_init(void); ++void ifx_pcie_pmcu_exit(void); ++ ++#endif /* IFXMIPS_PCIE_PM_H */ ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie_reg.h +@@ -0,0 +1,1001 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pcie_reg.h ++** PROJECT : IFX UEIP for VRX200 ++** MODULES : PCIe module ++** ++** DATE : 02 Mar 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe Root Complex Driver ++** COPYRIGHT : Copyright (c) 2009 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** HISTORY ++** $Version $Date $Author $Comment ++** 0.0.1 17 Mar,2009 Lei Chuanhua Initial version ++*******************************************************************************/ ++#ifndef IFXMIPS_PCIE_REG_H ++#define IFXMIPS_PCIE_REG_H ++/*! ++ \file ifxmips_pcie_reg.h ++ \ingroup IFX_PCIE ++ \brief header file for PCIe module register definition ++*/ ++/* PCIe Address Mapping Base */ ++#define PCIE_CFG_PHY_BASE 0x1D000000UL ++#define PCIE_CFG_BASE (KSEG1 + PCIE_CFG_PHY_BASE) ++#define PCIE_CFG_SIZE (8 * 1024 * 1024) ++ ++#define PCIE_MEM_PHY_BASE 0x1C000000UL ++#define PCIE_MEM_BASE (KSEG1 + PCIE_MEM_PHY_BASE) ++#define PCIE_MEM_SIZE (16 * 1024 * 1024) ++#define PCIE_MEM_PHY_END (PCIE_MEM_PHY_BASE + PCIE_MEM_SIZE - 1) ++ ++#define PCIE_IO_PHY_BASE 0x1D800000UL ++#define PCIE_IO_BASE (KSEG1 + PCIE_IO_PHY_BASE) ++#define PCIE_IO_SIZE (1 * 1024 * 1024) ++#define PCIE_IO_PHY_END (PCIE_IO_PHY_BASE + PCIE_IO_SIZE - 1) ++ ++#define PCIE_RC_CFG_BASE (KSEG1 + 0x1D900000) ++#define PCIE_APP_LOGIC_REG (KSEG1 + 0x1E100900) ++#define PCIE_MSI_PHY_BASE 0x1F600000UL ++ ++#define PCIE_PDI_PHY_BASE 0x1F106800UL ++#define PCIE_PDI_BASE (KSEG1 + PCIE_PDI_PHY_BASE) ++#define PCIE_PDI_SIZE 0x400 ++ ++#define PCIE1_CFG_PHY_BASE 0x19000000UL ++#define PCIE1_CFG_BASE (KSEG1 + PCIE1_CFG_PHY_BASE) ++#define PCIE1_CFG_SIZE (8 * 1024 * 1024) ++ ++#define PCIE1_MEM_PHY_BASE 0x18000000UL ++#define PCIE1_MEM_BASE (KSEG1 + PCIE1_MEM_PHY_BASE) ++#define PCIE1_MEM_SIZE (16 * 1024 * 1024) ++#define PCIE1_MEM_PHY_END (PCIE1_MEM_PHY_BASE + PCIE1_MEM_SIZE - 1) ++ ++#define PCIE1_IO_PHY_BASE 0x19800000UL ++#define PCIE1_IO_BASE (KSEG1 + PCIE1_IO_PHY_BASE) ++#define PCIE1_IO_SIZE (1 * 1024 * 1024) ++#define PCIE1_IO_PHY_END (PCIE1_IO_PHY_BASE + PCIE1_IO_SIZE - 1) ++ ++#define PCIE1_RC_CFG_BASE (KSEG1 + 0x19900000) ++#define PCIE1_APP_LOGIC_REG (KSEG1 + 0x1E100700) ++#define PCIE1_MSI_PHY_BASE 0x1F400000UL ++ ++#define PCIE1_PDI_PHY_BASE 0x1F700400UL ++#define PCIE1_PDI_BASE (KSEG1 + PCIE1_PDI_PHY_BASE) ++#define PCIE1_PDI_SIZE 0x400 ++ ++#define PCIE_CFG_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_CFG_BASE) : (PCIE_CFG_BASE)) ++#define PCIE_MEM_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_MEM_BASE) : (PCIE_MEM_BASE)) ++#define PCIE_IO_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_IO_BASE) : (PCIE_IO_BASE)) ++#define PCIE_MEM_PHY_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_MEM_PHY_BASE) : (PCIE_MEM_PHY_BASE)) ++#define PCIE_MEM_PHY_PORT_TO_END(X) ((X) > 0 ? (PCIE1_MEM_PHY_END) : (PCIE_MEM_PHY_END)) ++#define PCIE_IO_PHY_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_IO_PHY_BASE) : (PCIE_IO_PHY_BASE)) ++#define PCIE_IO_PHY_PORT_TO_END(X) ((X) > 0 ? (PCIE1_IO_PHY_END) : (PCIE_IO_PHY_END)) ++#define PCIE_APP_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_APP_LOGIC_REG) : (PCIE_APP_LOGIC_REG)) ++#define PCIE_RC_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_RC_CFG_BASE) : (PCIE_RC_CFG_BASE)) ++#define PCIE_PHY_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_PDI_BASE) : (PCIE_PDI_BASE)) ++ ++/* PCIe Application Logic Register */ ++/* RC Core Control Register */ ++#define PCIE_RC_CCR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x10) ++/* This should be enabled after initializing configuratin registers ++ * Also should check link status retraining bit ++ */ ++#define PCIE_RC_CCR_LTSSM_ENABLE 0x00000001 /* Enable LTSSM to continue link establishment */ ++ ++/* RC Core Debug Register */ ++#define PCIE_RC_DR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x14) ++#define PCIE_RC_DR_DLL_UP 0x00000001 /* Data Link Layer Up */ ++#define PCIE_RC_DR_CURRENT_POWER_STATE 0x0000000E /* Current Power State */ ++#define PCIE_RC_DR_CURRENT_POWER_STATE_S 1 ++#define PCIE_RC_DR_CURRENT_LTSSM_STATE 0x000001F0 /* Current LTSSM State */ ++#define PCIE_RC_DR_CURRENT_LTSSM_STATE_S 4 ++ ++#define PCIE_RC_DR_PM_DEV_STATE 0x00000E00 /* Power Management D-State */ ++#define PCIE_RC_DR_PM_DEV_STATE_S 9 ++ ++#define PCIE_RC_DR_PM_ENABLED 0x00001000 /* Power Management State from PMU */ ++#define PCIE_RC_DR_PME_EVENT_ENABLED 0x00002000 /* Power Management Event Enable State */ ++#define PCIE_RC_DR_AUX_POWER_ENABLED 0x00004000 /* Auxiliary Power Enable */ ++ ++/* Current Power State Definition */ ++enum { ++ PCIE_RC_DR_D0 = 0, ++ PCIE_RC_DR_D1, /* Not supported */ ++ PCIE_RC_DR_D2, /* Not supported */ ++ PCIE_RC_DR_D3, ++ PCIE_RC_DR_UN, ++}; ++ ++/* PHY Link Status Register */ ++#define PCIE_PHY_SR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x18) ++#define PCIE_PHY_SR_PHY_LINK_UP 0x00000001 /* PHY Link Up/Down Indicator */ ++ ++/* Electromechanical Control Register */ ++#define PCIE_EM_CR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x1C) ++#define PCIE_EM_CR_CARD_IS_PRESENT 0x00000001 /* Card Presence Detect State */ ++#define PCIE_EM_CR_MRL_OPEN 0x00000002 /* MRL Sensor State */ ++#define PCIE_EM_CR_POWER_FAULT_SET 0x00000004 /* Power Fault Detected */ ++#define PCIE_EM_CR_MRL_SENSOR_SET 0x00000008 /* MRL Sensor Changed */ ++#define PCIE_EM_CR_PRESENT_DETECT_SET 0x00000010 /* Card Presense Detect Changed */ ++#define PCIE_EM_CR_CMD_CPL_INT_SET 0x00000020 /* Command Complete Interrupt */ ++#define PCIE_EM_CR_SYS_INTERLOCK_SET 0x00000040 /* System Electromechanical IterLock Engaged */ ++#define PCIE_EM_CR_ATTENTION_BUTTON_SET 0x00000080 /* Attention Button Pressed */ ++ ++/* Interrupt Status Register */ ++#define PCIE_IR_SR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x20) ++#define PCIE_IR_SR_PME_CAUSE_MSI 0x00000002 /* MSI caused by PME */ ++#define PCIE_IR_SR_HP_PME_WAKE_GEN 0x00000004 /* Hotplug PME Wake Generation */ ++#define PCIE_IR_SR_HP_MSI 0x00000008 /* Hotplug MSI */ ++#define PCIE_IR_SR_AHB_LU_ERR 0x00000030 /* AHB Bridge Lookup Error Signals */ ++#define PCIE_IR_SR_AHB_LU_ERR_S 4 ++#define PCIE_IR_SR_INT_MSG_NUM 0x00003E00 /* Interrupt Message Number */ ++#define PCIE_IR_SR_INT_MSG_NUM_S 9 ++#define PCIE_IR_SR_AER_INT_MSG_NUM 0xF8000000 /* Advanced Error Interrupt Message Number */ ++#define PCIE_IR_SR_AER_INT_MSG_NUM_S 27 ++ ++/* Message Control Register */ ++#define PCIE_MSG_CR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x30) ++#define PCIE_MSG_CR_GEN_PME_TURN_OFF_MSG 0x00000001 /* Generate PME Turn Off Message */ ++#define PCIE_MSG_CR_GEN_UNLOCK_MSG 0x00000002 /* Generate Unlock Message */ ++ ++#define PCIE_VDM_DR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x34) ++ ++/* Vendor-Defined Message Requester ID Register */ ++#define PCIE_VDM_RID(X) (PCIE_APP_PORT_TO_BASE (X) + 0x38) ++#define PCIE_VDM_RID_VENROR_MSG_REQ_ID 0x0000FFFF ++#define PCIE_VDM_RID_VDMRID_S 0 ++ ++/* ASPM Control Register */ ++#define PCIE_ASPM_CR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x40) ++#define PCIE_ASPM_CR_HOT_RST 0x00000001 /* Hot Reset Request to the downstream device */ ++#define PCIE_ASPM_CR_REQ_EXIT_L1 0x00000002 /* Request to Exit L1 */ ++#define PCIE_ASPM_CR_REQ_ENTER_L1 0x00000004 /* Request to Enter L1 */ ++ ++/* Vendor Message DW0 Register */ ++#define PCIE_VM_MSG_DW0(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x50) ++#define PCIE_VM_MSG_DW0_TYPE 0x0000001F /* Message type */ ++#define PCIE_VM_MSG_DW0_TYPE_S 0 ++#define PCIE_VM_MSG_DW0_FORMAT 0x00000060 /* Format */ ++#define PCIE_VM_MSG_DW0_FORMAT_S 5 ++#define PCIE_VM_MSG_DW0_TC 0x00007000 /* Traffic Class */ ++#define PCIE_VM_MSG_DW0_TC_S 12 ++#define PCIE_VM_MSG_DW0_ATTR 0x000C0000 /* Atrributes */ ++#define PCIE_VM_MSG_DW0_ATTR_S 18 ++#define PCIE_VM_MSG_DW0_EP_TLP 0x00100000 /* Poisoned TLP */ ++#define PCIE_VM_MSG_DW0_TD 0x00200000 /* TLP Digest */ ++#define PCIE_VM_MSG_DW0_LEN 0xFFC00000 /* Length */ ++#define PCIE_VM_MSG_DW0_LEN_S 22 ++ ++/* Format Definition */ ++enum { ++ PCIE_VM_MSG_FORMAT_00 = 0, /* 3DW Hdr, no data*/ ++ PCIE_VM_MSG_FORMAT_01, /* 4DW Hdr, no data */ ++ PCIE_VM_MSG_FORMAT_10, /* 3DW Hdr, with data */ ++ PCIE_VM_MSG_FORMAT_11, /* 4DW Hdr, with data */ ++}; ++ ++/* Traffic Class Definition */ ++enum { ++ PCIE_VM_MSG_TC0 = 0, ++ PCIE_VM_MSG_TC1, ++ PCIE_VM_MSG_TC2, ++ PCIE_VM_MSG_TC3, ++ PCIE_VM_MSG_TC4, ++ PCIE_VM_MSG_TC5, ++ PCIE_VM_MSG_TC6, ++ PCIE_VM_MSG_TC7, ++}; ++ ++/* Attributes Definition */ ++enum { ++ PCIE_VM_MSG_ATTR_00 = 0, /* RO and No Snoop cleared */ ++ PCIE_VM_MSG_ATTR_01, /* RO cleared , No Snoop set */ ++ PCIE_VM_MSG_ATTR_10, /* RO set, No Snoop cleared*/ ++ PCIE_VM_MSG_ATTR_11, /* RO and No Snoop set */ ++}; ++ ++/* Payload Size Definition */ ++#define PCIE_VM_MSG_LEN_MIN 0 ++#define PCIE_VM_MSG_LEN_MAX 1024 ++ ++/* Vendor Message DW1 Register */ ++#define PCIE_VM_MSG_DW1(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x54) ++#define PCIE_VM_MSG_DW1_FUNC_NUM 0x00000070 /* Function Number */ ++#define PCIE_VM_MSG_DW1_FUNC_NUM_S 8 ++#define PCIE_VM_MSG_DW1_CODE 0x00FF0000 /* Message Code */ ++#define PCIE_VM_MSG_DW1_CODE_S 16 ++#define PCIE_VM_MSG_DW1_TAG 0xFF000000 /* Tag */ ++#define PCIE_VM_MSG_DW1_TAG_S 24 ++ ++#define PCIE_VM_MSG_DW2(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x58) ++#define PCIE_VM_MSG_DW3(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x5C) ++ ++/* Vendor Message Request Register */ ++#define PCIE_VM_MSG_REQR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x60) ++#define PCIE_VM_MSG_REQR_REQ 0x00000001 /* Vendor Message Request */ ++ ++ ++/* AHB Slave Side Band Control Register */ ++#define PCIE_AHB_SSB(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x70) ++#define PCIE_AHB_SSB_REQ_BCM 0x00000001 /* Slave Reques BCM filed */ ++#define PCIE_AHB_SSB_REQ_EP 0x00000002 /* Slave Reques EP filed */ ++#define PCIE_AHB_SSB_REQ_TD 0x00000004 /* Slave Reques TD filed */ ++#define PCIE_AHB_SSB_REQ_ATTR 0x00000018 /* Slave Reques Attribute number */ ++#define PCIE_AHB_SSB_REQ_ATTR_S 3 ++#define PCIE_AHB_SSB_REQ_TC 0x000000E0 /* Slave Request TC Field */ ++#define PCIE_AHB_SSB_REQ_TC_S 5 ++ ++/* AHB Master SideBand Ctrl Register */ ++#define PCIE_AHB_MSB(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x74) ++#define PCIE_AHB_MSB_RESP_ATTR 0x00000003 /* Master Response Attribute number */ ++#define PCIE_AHB_MSB_RESP_ATTR_S 0 ++#define PCIE_AHB_MSB_RESP_BAD_EOT 0x00000004 /* Master Response Badeot filed */ ++#define PCIE_AHB_MSB_RESP_BCM 0x00000008 /* Master Response BCM filed */ ++#define PCIE_AHB_MSB_RESP_EP 0x00000010 /* Master Response EP filed */ ++#define PCIE_AHB_MSB_RESP_TD 0x00000020 /* Master Response TD filed */ ++#define PCIE_AHB_MSB_RESP_FUN_NUM 0x000003C0 /* Master Response Function number */ ++#define PCIE_AHB_MSB_RESP_FUN_NUM_S 6 ++ ++/* AHB Control Register, fixed bus enumeration exception */ ++#define PCIE_AHB_CTRL(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x78) ++#define PCIE_AHB_CTRL_BUS_ERROR_SUPPRESS 0x00000001 ++ ++/* Interrupt Enalbe Register */ ++#define PCIE_IRNEN(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0xF4) ++#define PCIE_IRNCR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0xF8) ++#define PCIE_IRNICR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0xFC) ++ ++/* PCIe interrupt enable/control/capture register definition */ ++#define PCIE_IRN_AER_REPORT 0x00000001 /* AER Interrupt */ ++#define PCIE_IRN_AER_MSIX 0x00000002 /* Advanced Error MSI-X Interrupt */ ++#define PCIE_IRN_PME 0x00000004 /* PME Interrupt */ ++#define PCIE_IRN_HOTPLUG 0x00000008 /* Hotplug Interrupt */ ++#define PCIE_IRN_RX_VDM_MSG 0x00000010 /* Vendor-Defined Message Interrupt */ ++#define PCIE_IRN_RX_CORRECTABLE_ERR_MSG 0x00000020 /* Correctable Error Message Interrupt */ ++#define PCIE_IRN_RX_NON_FATAL_ERR_MSG 0x00000040 /* Non-fatal Error Message */ ++#define PCIE_IRN_RX_FATAL_ERR_MSG 0x00000080 /* Fatal Error Message */ ++#define PCIE_IRN_RX_PME_MSG 0x00000100 /* PME Message Interrupt */ ++#define PCIE_IRN_RX_PME_TURNOFF_ACK 0x00000200 /* PME Turnoff Ack Message Interrupt */ ++#define PCIE_IRN_AHB_BR_FATAL_ERR 0x00000400 /* AHB Fatal Error Interrupt */ ++#define PCIE_IRN_LINK_AUTO_BW_STATUS 0x00000800 /* Link Auto Bandwidth Status Interrupt */ ++#define PCIE_IRN_BW_MGT 0x00001000 /* Bandwidth Managment Interrupt */ ++#define PCIE_IRN_INTA 0x00002000 /* INTA */ ++#define PCIE_IRN_INTB 0x00004000 /* INTB */ ++#define PCIE_IRN_INTC 0x00008000 /* INTC */ ++#define PCIE_IRN_INTD 0x00010000 /* INTD */ ++#define PCIE_IRN_WAKEUP 0x00020000 /* Wake up Interrupt */ ++ ++#define PCIE_RC_CORE_COMBINED_INT (PCIE_IRN_AER_REPORT | PCIE_IRN_AER_MSIX | PCIE_IRN_PME | \ ++ PCIE_IRN_HOTPLUG | PCIE_IRN_RX_VDM_MSG | PCIE_IRN_RX_CORRECTABLE_ERR_MSG |\ ++ PCIE_IRN_RX_NON_FATAL_ERR_MSG | PCIE_IRN_RX_FATAL_ERR_MSG | \ ++ PCIE_IRN_RX_PME_MSG | PCIE_IRN_RX_PME_TURNOFF_ACK | PCIE_IRN_AHB_BR_FATAL_ERR | \ ++ PCIE_IRN_LINK_AUTO_BW_STATUS | PCIE_IRN_BW_MGT) ++/* PCIe RC Configuration Register */ ++#define PCIE_VDID(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x00) ++ ++/* Bit definition from pci_reg.h */ ++#define PCIE_PCICMDSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x04) ++#define PCIE_CCRID(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x08) ++#define PCIE_CLSLTHTBR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x0C) /* EP only */ ++/* BAR0, BAR1,Only necessary if the bridges implements a device-specific register set or memory buffer */ ++#define PCIE_BAR0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x10) /* Not used*/ ++#define PCIE_BAR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x14) /* Not used */ ++ ++#define PCIE_BNR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x18) /* Mandatory */ ++/* Bus Number Register bits */ ++#define PCIE_BNR_PRIMARY_BUS_NUM 0x000000FF ++#define PCIE_BNR_PRIMARY_BUS_NUM_S 0 ++#define PCIE_PNR_SECONDARY_BUS_NUM 0x0000FF00 ++#define PCIE_PNR_SECONDARY_BUS_NUM_S 8 ++#define PCIE_PNR_SUB_BUS_NUM 0x00FF0000 ++#define PCIE_PNR_SUB_BUS_NUM_S 16 ++ ++/* IO Base/Limit Register bits */ ++#define PCIE_IOBLSECS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x1C) /* RC only */ ++#define PCIE_IOBLSECS_32BIT_IO_ADDR 0x00000001 ++#define PCIE_IOBLSECS_IO_BASE_ADDR 0x000000F0 ++#define PCIE_IOBLSECS_IO_BASE_ADDR_S 4 ++#define PCIE_IOBLSECS_32BIT_IOLIMT 0x00000100 ++#define PCIE_IOBLSECS_IO_LIMIT_ADDR 0x0000F000 ++#define PCIE_IOBLSECS_IO_LIMIT_ADDR_S 12 ++ ++/* Non-prefetchable Memory Base/Limit Register bit */ ++#define PCIE_MBML(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x20) /* RC only */ ++#define PCIE_MBML_MEM_BASE_ADDR 0x0000FFF0 ++#define PCIE_MBML_MEM_BASE_ADDR_S 4 ++#define PCIE_MBML_MEM_LIMIT_ADDR 0xFFF00000 ++#define PCIE_MBML_MEM_LIMIT_ADDR_S 20 ++ ++/* Prefetchable Memory Base/Limit Register bit */ ++#define PCIE_PMBL(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x24) /* RC only */ ++#define PCIE_PMBL_64BIT_ADDR 0x00000001 ++#define PCIE_PMBL_UPPER_12BIT 0x0000FFF0 ++#define PCIE_PMBL_UPPER_12BIT_S 4 ++#define PCIE_PMBL_E64MA 0x00010000 ++#define PCIE_PMBL_END_ADDR 0xFFF00000 ++#define PCIE_PMBL_END_ADDR_S 20 ++#define PCIE_PMBU32(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x28) /* RC only */ ++#define PCIE_PMLU32(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x2C) /* RC only */ ++ ++/* I/O Base/Limit Upper 16 bits register */ ++#define PCIE_IO_BANDL(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x30) /* RC only */ ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_BASE 0x0000FFFF ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_BASE_S 0 ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_LIMIT 0xFFFF0000 ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_LIMIT_S 16 ++ ++#define PCIE_CPR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x34) ++#define PCIE_EBBAR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x38) ++ ++/* Interrupt and Secondary Bridge Control Register */ ++#define PCIE_INTRBCTRL(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x3C) ++ ++#define PCIE_INTRBCTRL_INT_LINE 0x000000FF ++#define PCIE_INTRBCTRL_INT_LINE_S 0 ++#define PCIE_INTRBCTRL_INT_PIN 0x0000FF00 ++#define PCIE_INTRBCTRL_INT_PIN_S 8 ++#define PCIE_INTRBCTRL_PARITY_ERR_RESP_ENABLE 0x00010000 /* #PERR */ ++#define PCIE_INTRBCTRL_SERR_ENABLE 0x00020000 /* #SERR */ ++#define PCIE_INTRBCTRL_ISA_ENABLE 0x00040000 /* ISA enable, IO 64KB only */ ++#define PCIE_INTRBCTRL_VGA_ENABLE 0x00080000 /* VGA enable */ ++#define PCIE_INTRBCTRL_VGA_16BIT_DECODE 0x00100000 /* VGA 16bit decode */ ++#define PCIE_INTRBCTRL_RST_SECONDARY_BUS 0x00400000 /* Secondary bus rest, hot rest, 1ms */ ++/* Others are read only */ ++enum { ++ PCIE_INTRBCTRL_INT_NON = 0, ++ PCIE_INTRBCTRL_INTA, ++ PCIE_INTRBCTRL_INTB, ++ PCIE_INTRBCTRL_INTC, ++ PCIE_INTRBCTRL_INTD, ++}; ++ ++#define PCIE_PM_CAPR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x40) ++ ++/* Power Management Control and Status Register */ ++#define PCIE_PM_CSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x44) ++ ++#define PCIE_PM_CSR_POWER_STATE 0x00000003 /* Power State */ ++#define PCIE_PM_CSR_POWER_STATE_S 0 ++#define PCIE_PM_CSR_SW_RST 0x00000008 /* Soft Reset Enabled */ ++#define PCIE_PM_CSR_PME_ENABLE 0x00000100 /* PME Enable */ ++#define PCIE_PM_CSR_PME_STATUS 0x00008000 /* PME status */ ++ ++/* MSI Capability Register for EP */ ++#define PCIE_MCAPR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x50) ++ ++#define PCIE_MCAPR_MSI_CAP_ID 0x000000FF /* MSI Capability ID */ ++#define PCIE_MCAPR_MSI_CAP_ID_S 0 ++#define PCIE_MCAPR_MSI_NEXT_CAP_PTR 0x0000FF00 /* Next Capability Pointer */ ++#define PCIE_MCAPR_MSI_NEXT_CAP_PTR_S 8 ++#define PCIE_MCAPR_MSI_ENABLE 0x00010000 /* MSI Enable */ ++#define PCIE_MCAPR_MULTI_MSG_CAP 0x000E0000 /* Multiple Message Capable */ ++#define PCIE_MCAPR_MULTI_MSG_CAP_S 17 ++#define PCIE_MCAPR_MULTI_MSG_ENABLE 0x00700000 /* Multiple Message Enable */ ++#define PCIE_MCAPR_MULTI_MSG_ENABLE_S 20 ++#define PCIE_MCAPR_ADDR64_CAP 0X00800000 /* 64-bit Address Capable */ ++ ++/* MSI Message Address Register */ ++#define PCIE_MA(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x54) ++ ++#define PCIE_MA_ADDR_MASK 0xFFFFFFFC /* Message Address */ ++ ++/* MSI Message Upper Address Register */ ++#define PCIE_MUA(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x58) ++ ++/* MSI Message Data Register */ ++#define PCIE_MD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x5C) ++ ++#define PCIE_MD_DATA 0x0000FFFF /* Message Data */ ++#define PCIE_MD_DATA_S 0 ++ ++/* PCI Express Capability Register */ ++#define PCIE_XCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x70) ++ ++#define PCIE_XCAP_ID 0x000000FF /* PCI Express Capability ID */ ++#define PCIE_XCAP_ID_S 0 ++#define PCIE_XCAP_NEXT_CAP 0x0000FF00 /* Next Capability Pointer */ ++#define PCIE_XCAP_NEXT_CAP_S 8 ++#define PCIE_XCAP_VER 0x000F0000 /* PCI Express Capability Version */ ++#define PCIE_XCAP_VER_S 16 ++#define PCIE_XCAP_DEV_PORT_TYPE 0x00F00000 /* Device Port Type */ ++#define PCIE_XCAP_DEV_PORT_TYPE_S 20 ++#define PCIE_XCAP_SLOT_IMPLEMENTED 0x01000000 /* Slot Implemented */ ++#define PCIE_XCAP_MSG_INT_NUM 0x3E000000 /* Interrupt Message Number */ ++#define PCIE_XCAP_MSG_INT_NUM_S 25 ++ ++/* Device Capability Register */ ++#define PCIE_DCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x74) ++ ++#define PCIE_DCAP_MAX_PAYLOAD_SIZE 0x00000007 /* Max Payload size */ ++#define PCIE_DCAP_MAX_PAYLOAD_SIZE_S 0 ++#define PCIE_DCAP_PHANTOM_FUNC 0x00000018 /* Phanton Function, not supported */ ++#define PCIE_DCAP_PHANTOM_FUNC_S 3 ++#define PCIE_DCAP_EXT_TAG 0x00000020 /* Extended Tag Field */ ++#define PCIE_DCAP_EP_L0S_LATENCY 0x000001C0 /* EP L0s latency only */ ++#define PCIE_DCAP_EP_L0S_LATENCY_S 6 ++#define PCIE_DCAP_EP_L1_LATENCY 0x00000E00 /* EP L1 latency only */ ++#define PCIE_DCAP_EP_L1_LATENCY_S 9 ++#define PCIE_DCAP_ROLE_BASE_ERR_REPORT 0x00008000 /* Role Based ERR */ ++ ++/* Maximum payload size supported */ ++enum { ++ PCIE_MAX_PAYLOAD_128 = 0, ++ PCIE_MAX_PAYLOAD_256, ++ PCIE_MAX_PAYLOAD_512, ++ PCIE_MAX_PAYLOAD_1024, ++ PCIE_MAX_PAYLOAD_2048, ++ PCIE_MAX_PAYLOAD_4096, ++}; ++ ++/* Device Control and Status Register */ ++#define PCIE_DCTLSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x78) ++ ++#define PCIE_DCTLSTS_CORRECTABLE_ERR_EN 0x00000001 /* COR-ERR */ ++#define PCIE_DCTLSTS_NONFATAL_ERR_EN 0x00000002 /* Non-fatal ERR */ ++#define PCIE_DCTLSTS_FATAL_ERR_EN 0x00000004 /* Fatal ERR */ ++#define PCIE_DCTLSYS_UR_REQ_EN 0x00000008 /* UR ERR */ ++#define PCIE_DCTLSTS_RELAXED_ORDERING_EN 0x00000010 /* Enable relaxing ordering */ ++#define PCIE_DCTLSTS_MAX_PAYLOAD_SIZE 0x000000E0 /* Max payload mask */ ++#define PCIE_DCTLSTS_MAX_PAYLOAD_SIZE_S 5 ++#define PCIE_DCTLSTS_EXT_TAG_EN 0x00000100 /* Extended tag field */ ++#define PCIE_DCTLSTS_PHANTOM_FUNC_EN 0x00000200 /* Phantom Function Enable */ ++#define PCIE_DCTLSTS_AUX_PM_EN 0x00000400 /* AUX Power PM Enable */ ++#define PCIE_DCTLSTS_NO_SNOOP_EN 0x00000800 /* Enable no snoop, except root port*/ ++#define PCIE_DCTLSTS_MAX_READ_SIZE 0x00007000 /* Max Read Request size*/ ++#define PCIE_DCTLSTS_MAX_READ_SIZE_S 12 ++#define PCIE_DCTLSTS_CORRECTABLE_ERR 0x00010000 /* COR-ERR Detected */ ++#define PCIE_DCTLSTS_NONFATAL_ERR 0x00020000 /* Non-Fatal ERR Detected */ ++#define PCIE_DCTLSTS_FATAL_ER 0x00040000 /* Fatal ERR Detected */ ++#define PCIE_DCTLSTS_UNSUPPORTED_REQ 0x00080000 /* UR Detected */ ++#define PCIE_DCTLSTS_AUX_POWER 0x00100000 /* Aux Power Detected */ ++#define PCIE_DCTLSTS_TRANSACT_PENDING 0x00200000 /* Transaction pending */ ++ ++#define PCIE_DCTLSTS_ERR_EN (PCIE_DCTLSTS_CORRECTABLE_ERR_EN | \ ++ PCIE_DCTLSTS_NONFATAL_ERR_EN | PCIE_DCTLSTS_FATAL_ERR_EN | \ ++ PCIE_DCTLSYS_UR_REQ_EN) ++ ++/* Link Capability Register */ ++#define PCIE_LCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7C) ++#define PCIE_LCAP_MAX_LINK_SPEED 0x0000000F /* Max link speed, 0x1 by default */ ++#define PCIE_LCAP_MAX_LINK_SPEED_S 0 ++#define PCIE_LCAP_MAX_LENGTH_WIDTH 0x000003F0 /* Maxium Length Width */ ++#define PCIE_LCAP_MAX_LENGTH_WIDTH_S 4 ++#define PCIE_LCAP_ASPM_LEVEL 0x00000C00 /* Active State Link PM Support */ ++#define PCIE_LCAP_ASPM_LEVEL_S 10 ++#define PCIE_LCAP_L0S_EIXT_LATENCY 0x00007000 /* L0s Exit Latency */ ++#define PCIE_LCAP_L0S_EIXT_LATENCY_S 12 ++#define PCIE_LCAP_L1_EXIT_LATENCY 0x00038000 /* L1 Exit Latency */ ++#define PCIE_LCAP_L1_EXIT_LATENCY_S 15 ++#define PCIE_LCAP_CLK_PM 0x00040000 /* Clock Power Management */ ++#define PCIE_LCAP_SDER 0x00080000 /* Surprise Down Error Reporting */ ++#define PCIE_LCAP_DLL_ACTIVE_REPROT 0x00100000 /* Data Link Layer Active Reporting Capable */ ++#define PCIE_LCAP_PORT_NUM 0xFF0000000 /* Port number */ ++#define PCIE_LCAP_PORT_NUM_S 24 ++ ++/* Maximum Length width definition */ ++#define PCIE_MAX_LENGTH_WIDTH_RES 0x00 ++#define PCIE_MAX_LENGTH_WIDTH_X1 0x01 /* Default */ ++#define PCIE_MAX_LENGTH_WIDTH_X2 0x02 ++#define PCIE_MAX_LENGTH_WIDTH_X4 0x04 ++#define PCIE_MAX_LENGTH_WIDTH_X8 0x08 ++#define PCIE_MAX_LENGTH_WIDTH_X12 0x0C ++#define PCIE_MAX_LENGTH_WIDTH_X16 0x10 ++#define PCIE_MAX_LENGTH_WIDTH_X32 0x20 ++ ++/* Active State Link PM definition */ ++enum { ++ PCIE_ASPM_RES0 = 0, ++ PCIE_ASPM_L0S_ENTRY_SUPPORT, /* L0s */ ++ PCIE_ASPM_RES1, ++ PCIE_ASPM_L0S_L1_ENTRY_SUPPORT, /* L0s and L1, default */ ++}; ++ ++/* L0s Exit Latency definition */ ++enum { ++ PCIE_L0S_EIXT_LATENCY_L64NS = 0, /* < 64 ns */ ++ PCIE_L0S_EIXT_LATENCY_B64A128, /* > 64 ns < 128 ns */ ++ PCIE_L0S_EIXT_LATENCY_B128A256, /* > 128 ns < 256 ns */ ++ PCIE_L0S_EIXT_LATENCY_B256A512, /* > 256 ns < 512 ns */ ++ PCIE_L0S_EIXT_LATENCY_B512TO1U, /* > 512 ns < 1 us */ ++ PCIE_L0S_EIXT_LATENCY_B1A2U, /* > 1 us < 2 us */ ++ PCIE_L0S_EIXT_LATENCY_B2A4U, /* > 2 us < 4 us */ ++ PCIE_L0S_EIXT_LATENCY_M4US, /* > 4 us */ ++}; ++ ++/* L1 Exit Latency definition */ ++enum { ++ PCIE_L1_EXIT_LATENCY_L1US = 0, /* < 1 us */ ++ PCIE_L1_EXIT_LATENCY_B1A2, /* > 1 us < 2 us */ ++ PCIE_L1_EXIT_LATENCY_B2A4, /* > 2 us < 4 us */ ++ PCIE_L1_EXIT_LATENCY_B4A8, /* > 4 us < 8 us */ ++ PCIE_L1_EXIT_LATENCY_B8A16, /* > 8 us < 16 us */ ++ PCIE_L1_EXIT_LATENCY_B16A32, /* > 16 us < 32 us */ ++ PCIE_L1_EXIT_LATENCY_B32A64, /* > 32 us < 64 us */ ++ PCIE_L1_EXIT_LATENCY_M64US, /* > 64 us */ ++}; ++ ++/* Link Control and Status Register */ ++#define PCIE_LCTLSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x80) ++#define PCIE_LCTLSTS_ASPM_ENABLE 0x00000003 /* Active State Link PM Control */ ++#define PCIE_LCTLSTS_ASPM_ENABLE_S 0 ++#define PCIE_LCTLSTS_RCB128 0x00000008 /* Read Completion Boundary 128*/ ++#define PCIE_LCTLSTS_LINK_DISABLE 0x00000010 /* Link Disable */ ++#define PCIE_LCTLSTS_RETRIAN_LINK 0x00000020 /* Retrain Link */ ++#define PCIE_LCTLSTS_COM_CLK_CFG 0x00000040 /* Common Clock Configuration */ ++#define PCIE_LCTLSTS_EXT_SYNC 0x00000080 /* Extended Synch */ ++#define PCIE_LCTLSTS_CLK_PM_EN 0x00000100 /* Enable Clock Powerm Management */ ++#define PCIE_LCTLSTS_LINK_SPEED 0x000F0000 /* Link Speed */ ++#define PCIE_LCTLSTS_LINK_SPEED_S 16 ++#define PCIE_LCTLSTS_NEGOTIATED_LINK_WIDTH 0x03F00000 /* Negotiated Link Width */ ++#define PCIE_LCTLSTS_NEGOTIATED_LINK_WIDTH_S 20 ++#define PCIE_LCTLSTS_RETRAIN_PENDING 0x08000000 /* Link training is ongoing */ ++#define PCIE_LCTLSTS_SLOT_CLK_CFG 0x10000000 /* Slot Clock Configuration */ ++#define PCIE_LCTLSTS_DLL_ACTIVE 0x20000000 /* Data Link Layer Active */ ++ ++/* Slot Capabilities Register */ ++#define PCIE_SLCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x84) ++ ++/* Slot Capabilities */ ++#define PCIE_SLCTLSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x88) ++ ++/* Root Control and Capability Register */ ++#define PCIE_RCTLCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x8C) ++#define PCIE_RCTLCAP_SERR_ON_CORRECTABLE_ERR 0x00000001 /* #SERR on COR-ERR */ ++#define PCIE_RCTLCAP_SERR_ON_NONFATAL_ERR 0x00000002 /* #SERR on Non-Fatal ERR */ ++#define PCIE_RCTLCAP_SERR_ON_FATAL_ERR 0x00000004 /* #SERR on Fatal ERR */ ++#define PCIE_RCTLCAP_PME_INT_EN 0x00000008 /* PME Interrupt Enable */ ++#define PCIE_RCTLCAP_SERR_ENABLE (PCIE_RCTLCAP_SERR_ON_CORRECTABLE_ERR | \ ++ PCIE_RCTLCAP_SERR_ON_NONFATAL_ERR | PCIE_RCTLCAP_SERR_ON_FATAL_ERR) ++/* Root Status Register */ ++#define PCIE_RSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x90) ++#define PCIE_RSTS_PME_REQ_ID 0x0000FFFF /* PME Request ID */ ++#define PCIE_RSTS_PME_REQ_ID_S 0 ++#define PCIE_RSTS_PME_STATUS 0x00010000 /* PME Status */ ++#define PCIE_RSTS_PME_PENDING 0x00020000 /* PME Pending */ ++ ++/* PCI Express Enhanced Capability Header */ ++#define PCIE_ENHANCED_CAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x100) ++#define PCIE_ENHANCED_CAP_ID 0x0000FFFF /* PCI Express Extended Capability ID */ ++#define PCIE_ENHANCED_CAP_ID_S 0 ++#define PCIE_ENHANCED_CAP_VER 0x000F0000 /* Capability Version */ ++#define PCIE_ENHANCED_CAP_VER_S 16 ++#define PCIE_ENHANCED_CAP_NEXT_OFFSET 0xFFF00000 /* Next Capability Offset */ ++#define PCIE_ENHANCED_CAP_NEXT_OFFSET_S 20 ++ ++/* Uncorrectable Error Status Register */ ++#define PCIE_UES_R(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x104) ++#define PCIE_DATA_LINK_PROTOCOL_ERR 0x00000010 /* Data Link Protocol Error Status */ ++#define PCIE_SURPRISE_DOWN_ERROR 0x00000020 /* Surprise Down Error Status */ ++#define PCIE_POISONED_TLP 0x00001000 /* Poisoned TLP Status */ ++#define PCIE_FC_PROTOCOL_ERR 0x00002000 /* Flow Control Protocol Error Status */ ++#define PCIE_COMPLETION_TIMEOUT 0x00004000 /* Completion Timeout Status */ ++#define PCIE_COMPLETOR_ABORT 0x00008000 /* Completer Abort Error */ ++#define PCIE_UNEXPECTED_COMPLETION 0x00010000 /* Unexpected Completion Status */ ++#define PCIE_RECEIVER_OVERFLOW 0x00020000 /* Receive Overflow Status */ ++#define PCIE_MALFORNED_TLP 0x00040000 /* Malformed TLP Stauts */ ++#define PCIE_ECRC_ERR 0x00080000 /* ECRC Error Stauts */ ++#define PCIE_UR_REQ 0x00100000 /* Unsupported Request Error Status */ ++#define PCIE_ALL_UNCORRECTABLE_ERR (PCIE_DATA_LINK_PROTOCOL_ERR | PCIE_SURPRISE_DOWN_ERROR | \ ++ PCIE_POISONED_TLP | PCIE_FC_PROTOCOL_ERR | PCIE_COMPLETION_TIMEOUT | \ ++ PCIE_COMPLETOR_ABORT | PCIE_UNEXPECTED_COMPLETION | PCIE_RECEIVER_OVERFLOW |\ ++ PCIE_MALFORNED_TLP | PCIE_ECRC_ERR | PCIE_UR_REQ) ++ ++/* Uncorrectable Error Mask Register, Mask means no report */ ++#define PCIE_UEMR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x108) ++ ++/* Uncorrectable Error Severity Register */ ++#define PCIE_UESR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x10C) ++ ++/* Correctable Error Status Register */ ++#define PCIE_CESR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x110) ++#define PCIE_RX_ERR 0x00000001 /* Receive Error Status */ ++#define PCIE_BAD_TLP 0x00000040 /* Bad TLP Status */ ++#define PCIE_BAD_DLLP 0x00000080 /* Bad DLLP Status */ ++#define PCIE_REPLAY_NUM_ROLLOVER 0x00000100 /* Replay Number Rollover Status */ ++#define PCIE_REPLAY_TIMER_TIMEOUT_ERR 0x00001000 /* Reply Timer Timeout Status */ ++#define PCIE_ADVISORY_NONFTAL_ERR 0x00002000 /* Advisory Non-Fatal Error Status */ ++#define PCIE_CORRECTABLE_ERR (PCIE_RX_ERR | PCIE_BAD_TLP | PCIE_BAD_DLLP | PCIE_REPLAY_NUM_ROLLOVER |\ ++ PCIE_REPLAY_TIMER_TIMEOUT_ERR | PCIE_ADVISORY_NONFTAL_ERR) ++ ++/* Correctable Error Mask Register */ ++#define PCIE_CEMR(X) (volatile u32*)(PCIE_RC_CFG_BASE + 0x114) ++ ++/* Advanced Error Capabilities and Control Register */ ++#define PCIE_AECCR(X) (volatile u32*)(PCIE_RC_CFG_BASE + 0x118) ++#define PCIE_AECCR_FIRST_ERR_PTR 0x0000001F /* First Error Pointer */ ++#define PCIE_AECCR_FIRST_ERR_PTR_S 0 ++#define PCIE_AECCR_ECRC_GEN_CAP 0x00000020 /* ECRC Generation Capable */ ++#define PCIE_AECCR_ECRC_GEN_EN 0x00000040 /* ECRC Generation Enable */ ++#define PCIE_AECCR_ECRC_CHECK_CAP 0x00000080 /* ECRC Check Capable */ ++#define PCIE_AECCR_ECRC_CHECK_EN 0x00000100 /* ECRC Check Enable */ ++ ++/* Header Log Register 1 */ ++#define PCIE_HLR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x11C) ++ ++/* Header Log Register 2 */ ++#define PCIE_HLR2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x120) ++ ++/* Header Log Register 3 */ ++#define PCIE_HLR3(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x124) ++ ++/* Header Log Register 4 */ ++#define PCIE_HLR4(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x128) ++ ++/* Root Error Command Register */ ++#define PCIE_RECR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x12C) ++#define PCIE_RECR_CORRECTABLE_ERR_REPORT_EN 0x00000001 /* COR-ERR */ ++#define PCIE_RECR_NONFATAL_ERR_REPORT_EN 0x00000002 /* Non-Fatal ERR */ ++#define PCIE_RECR_FATAL_ERR_REPORT_EN 0x00000004 /* Fatal ERR */ ++#define PCIE_RECR_ERR_REPORT_EN (PCIE_RECR_CORRECTABLE_ERR_REPORT_EN | \ ++ PCIE_RECR_NONFATAL_ERR_REPORT_EN | PCIE_RECR_FATAL_ERR_REPORT_EN) ++ ++/* Root Error Status Register */ ++#define PCIE_RESR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x130) ++#define PCIE_RESR_CORRECTABLE_ERR 0x00000001 /* COR-ERR Receveid */ ++#define PCIE_RESR_MULTI_CORRECTABLE_ERR 0x00000002 /* Multiple COR-ERR Received */ ++#define PCIE_RESR_FATAL_NOFATAL_ERR 0x00000004 /* ERR Fatal/Non-Fatal Received */ ++#define PCIE_RESR_MULTI_FATAL_NOFATAL_ERR 0x00000008 /* Multiple ERR Fatal/Non-Fatal Received */ ++#define PCIE_RESR_FIRST_UNCORRECTABLE_FATAL_ERR 0x00000010 /* First UN-COR Fatal */ ++#define PCIR_RESR_NON_FATAL_ERR 0x00000020 /* Non-Fatal Error Message Received */ ++#define PCIE_RESR_FATAL_ERR 0x00000040 /* Fatal Message Received */ ++#define PCIE_RESR_AER_INT_MSG_NUM 0xF8000000 /* Advanced Error Interrupt Message Number */ ++#define PCIE_RESR_AER_INT_MSG_NUM_S 27 ++ ++/* Error Source Indentification Register */ ++#define PCIE_ESIR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x134) ++#define PCIE_ESIR_CORRECTABLE_ERR_SRC_ID 0x0000FFFF ++#define PCIE_ESIR_CORRECTABLE_ERR_SRC_ID_S 0 ++#define PCIE_ESIR_FATAL_NON_FATAL_SRC_ID 0xFFFF0000 ++#define PCIE_ESIR_FATAL_NON_FATAL_SRC_ID_S 16 ++ ++/* VC Enhanced Capability Header */ ++#define PCIE_VC_ECH(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x140) ++ ++/* Port VC Capability Register */ ++#define PCIE_PVC1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x144) ++#define PCIE_PVC1_EXT_VC_CNT 0x00000007 /* Extended VC Count */ ++#define PCIE_PVC1_EXT_VC_CNT_S 0 ++#define PCIE_PVC1_LOW_PRI_EXT_VC_CNT 0x00000070 /* Low Priority Extended VC Count */ ++#define PCIE_PVC1_LOW_PRI_EXT_VC_CNT_S 4 ++#define PCIE_PVC1_REF_CLK 0x00000300 /* Reference Clock */ ++#define PCIE_PVC1_REF_CLK_S 8 ++#define PCIE_PVC1_PORT_ARB_TAB_ENTRY_SIZE 0x00000C00 /* Port Arbitration Table Entry Size */ ++#define PCIE_PVC1_PORT_ARB_TAB_ENTRY_SIZE_S 10 ++ ++/* Extended Virtual Channel Count Defintion */ ++#define PCIE_EXT_VC_CNT_MIN 0 ++#define PCIE_EXT_VC_CNT_MAX 7 ++ ++/* Port Arbitration Table Entry Size Definition */ ++enum { ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S1BIT = 0, ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S2BIT, ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S4BIT, ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S8BIT, ++}; ++ ++/* Port VC Capability Register 2 */ ++#define PCIE_PVC2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x148) ++#define PCIE_PVC2_VC_ARB_16P_FIXED_WRR 0x00000001 /* HW Fixed arbitration, 16 phase WRR */ ++#define PCIE_PVC2_VC_ARB_32P_WRR 0x00000002 /* 32 phase WRR */ ++#define PCIE_PVC2_VC_ARB_64P_WRR 0x00000004 /* 64 phase WRR */ ++#define PCIE_PVC2_VC_ARB_128P_WRR 0x00000008 /* 128 phase WRR */ ++#define PCIE_PVC2_VC_ARB_WRR 0x0000000F ++#define PCIE_PVC2_VC_ARB_TAB_OFFSET 0xFF000000 /* VC arbitration table offset, not support */ ++#define PCIE_PVC2_VC_ARB_TAB_OFFSET_S 24 ++ ++/* Port VC Control and Status Register */ ++#define PCIE_PVCCRSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x14C) ++#define PCIE_PVCCRSR_LOAD_VC_ARB_TAB 0x00000001 /* Load VC Arbitration Table */ ++#define PCIE_PVCCRSR_VC_ARB_SEL 0x0000000E /* VC Arbitration Select */ ++#define PCIE_PVCCRSR_VC_ARB_SEL_S 1 ++#define PCIE_PVCCRSR_VC_ARB_TAB_STATUS 0x00010000 /* Arbitration Status */ ++ ++/* VC0 Resource Capability Register */ ++#define PCIE_VC0_RC(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x150) ++#define PCIE_VC0_RC_PORT_ARB_HW_FIXED 0x00000001 /* HW Fixed arbitration */ ++#define PCIE_VC0_RC_PORT_ARB_32P_WRR 0x00000002 /* 32 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_64P_WRR 0x00000004 /* 64 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_128P_WRR 0x00000008 /* 128 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_TM_128P_WRR 0x00000010 /* Time-based 128 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_TM_256P_WRR 0x00000020 /* Time-based 256 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB (PCIE_VC0_RC_PORT_ARB_HW_FIXED | PCIE_VC0_RC_PORT_ARB_32P_WRR |\ ++ PCIE_VC0_RC_PORT_ARB_64P_WRR | PCIE_VC0_RC_PORT_ARB_128P_WRR | \ ++ PCIE_VC0_RC_PORT_ARB_TM_128P_WRR | PCIE_VC0_RC_PORT_ARB_TM_256P_WRR) ++ ++#define PCIE_VC0_RC_REJECT_SNOOP 0x00008000 /* Reject Snoop Transactioin */ ++#define PCIE_VC0_RC_MAX_TIMESLOTS 0x007F0000 /* Maximum time Slots */ ++#define PCIE_VC0_RC_MAX_TIMESLOTS_S 16 ++#define PCIE_VC0_RC_PORT_ARB_TAB_OFFSET 0xFF000000 /* Port Arbitration Table Offset */ ++#define PCIE_VC0_RC_PORT_ARB_TAB_OFFSET_S 24 ++ ++/* VC0 Resource Control Register */ ++#define PCIE_VC0_RC0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x154) ++#define PCIE_VC0_RC0_TVM0 0x00000001 /* TC0 and VC0 */ ++#define PCIE_VC0_RC0_TVM1 0x00000002 /* TC1 and VC1 */ ++#define PCIE_VC0_RC0_TVM2 0x00000004 /* TC2 and VC2 */ ++#define PCIE_VC0_RC0_TVM3 0x00000008 /* TC3 and VC3 */ ++#define PCIE_VC0_RC0_TVM4 0x00000010 /* TC4 and VC4 */ ++#define PCIE_VC0_RC0_TVM5 0x00000020 /* TC5 and VC5 */ ++#define PCIE_VC0_RC0_TVM6 0x00000040 /* TC6 and VC6 */ ++#define PCIE_VC0_RC0_TVM7 0x00000080 /* TC7 and VC7 */ ++#define PCIE_VC0_RC0_TC_VC 0x000000FF /* TC/VC mask */ ++ ++#define PCIE_VC0_RC0_LOAD_PORT_ARB_TAB 0x00010000 /* Load Port Arbitration Table */ ++#define PCIE_VC0_RC0_PORT_ARB_SEL 0x000E0000 /* Port Arbitration Select */ ++#define PCIE_VC0_RC0_PORT_ARB_SEL_S 17 ++#define PCIE_VC0_RC0_VC_ID 0x07000000 /* VC ID */ ++#define PCIE_VC0_RC0_VC_ID_S 24 ++#define PCIE_VC0_RC0_VC_EN 0x80000000 /* VC Enable */ ++ ++/* VC0 Resource Status Register */ ++#define PCIE_VC0_RSR0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x158) ++#define PCIE_VC0_RSR0_PORT_ARB_TAB_STATUS 0x00010000 /* Port Arbitration Table Status,not used */ ++#define PCIE_VC0_RSR0_VC_NEG_PENDING 0x00020000 /* VC Negotiation Pending */ ++ ++/* Ack Latency Timer and Replay Timer Register */ ++#define PCIE_ALTRT(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x700) ++#define PCIE_ALTRT_ROUND_TRIP_LATENCY_LIMIT 0x0000FFFF /* Round Trip Latency Time Limit */ ++#define PCIE_ALTRT_ROUND_TRIP_LATENCY_LIMIT_S 0 ++#define PCIE_ALTRT_REPLAY_TIME_LIMIT 0xFFFF0000 /* Replay Time Limit */ ++#define PCIE_ALTRT_REPLAY_TIME_LIMIT_S 16 ++ ++/* Other Message Register */ ++#define PCIE_OMR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x704) ++ ++/* Port Force Link Register */ ++#define PCIE_PFLR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x708) ++#define PCIE_PFLR_LINK_NUM 0x000000FF /* Link Number */ ++#define PCIE_PFLR_LINK_NUM_S 0 ++#define PCIE_PFLR_FORCE_LINK 0x00008000 /* Force link */ ++#define PCIE_PFLR_LINK_STATE 0x003F0000 /* Link State */ ++#define PCIE_PFLR_LINK_STATE_S 16 ++#define PCIE_PFLR_LOW_POWER_ENTRY_CNT 0xFF000000 /* Low Power Entrance Count, only for EP */ ++#define PCIE_PFLR_LOW_POWER_ENTRY_CNT_S 24 ++ ++/* Ack Frequency Register */ ++#define PCIE_AFR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x70C) ++#define PCIE_AFR_AF 0x000000FF /* Ack Frequency */ ++#define PCIE_AFR_AF_S 0 ++#define PCIE_AFR_FTS_NUM 0x0000FF00 /* The number of Fast Training Sequence from L0S to L0 */ ++#define PCIE_AFR_FTS_NUM_S 8 ++#define PCIE_AFR_COM_FTS_NUM 0x00FF0000 /* N_FTS; when common clock is used*/ ++#define PCIE_AFR_COM_FTS_NUM_S 16 ++#define PCIE_AFR_L0S_ENTRY_LATENCY 0x07000000 /* L0s Entrance Latency */ ++#define PCIE_AFR_L0S_ENTRY_LATENCY_S 24 ++#define PCIE_AFR_L1_ENTRY_LATENCY 0x38000000 /* L1 Entrance Latency */ ++#define PCIE_AFR_L1_ENTRY_LATENCY_S 27 ++#define PCIE_AFR_FTS_NUM_DEFAULT 32 ++#define PCIE_AFR_L0S_ENTRY_LATENCY_DEFAULT 7 ++#define PCIE_AFR_L1_ENTRY_LATENCY_DEFAULT 5 ++ ++/* Port Link Control Register */ ++#define PCIE_PLCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x710) ++#define PCIE_PLCR_OTHER_MSG_REQ 0x00000001 /* Other Message Request */ ++#define PCIE_PLCR_SCRAMBLE_DISABLE 0x00000002 /* Scramble Disable */ ++#define PCIE_PLCR_LOOPBACK_EN 0x00000004 /* Loopback Enable */ ++#define PCIE_PLCR_LTSSM_HOT_RST 0x00000008 /* Force LTSSM to the hot reset */ ++#define PCIE_PLCR_DLL_LINK_EN 0x00000020 /* Enable Link initialization */ ++#define PCIE_PLCR_FAST_LINK_SIM_EN 0x00000080 /* Sets all internal timers to fast mode for simulation purposes */ ++#define PCIE_PLCR_LINK_MODE 0x003F0000 /* Link Mode Enable Mask */ ++#define PCIE_PLCR_LINK_MODE_S 16 ++#define PCIE_PLCR_CORRUPTED_CRC_EN 0x02000000 /* Enabled Corrupt CRC */ ++ ++/* Lane Skew Register */ ++#define PCIE_LSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x714) ++#define PCIE_LSR_LANE_SKEW_NUM 0x00FFFFFF /* Insert Lane Skew for Transmit, not applicable */ ++#define PCIE_LSR_LANE_SKEW_NUM_S 0 ++#define PCIE_LSR_FC_DISABLE 0x01000000 /* Disable of Flow Control */ ++#define PCIE_LSR_ACKNAK_DISABLE 0x02000000 /* Disable of Ack/Nak */ ++#define PCIE_LSR_LANE_DESKEW_DISABLE 0x80000000 /* Disable of Lane-to-Lane Skew */ ++ ++/* Symbol Number Register */ ++#define PCIE_SNR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x718) ++#define PCIE_SNR_TS 0x0000000F /* Number of TS Symbol */ ++#define PCIE_SNR_TS_S 0 ++#define PCIE_SNR_SKP 0x00000700 /* Number of SKP Symbol */ ++#define PCIE_SNR_SKP_S 8 ++#define PCIE_SNR_REPLAY_TIMER 0x0007C000 /* Timer Modifier for Replay Timer */ ++#define PCIE_SNR_REPLAY_TIMER_S 14 ++#define PCIE_SNR_ACKNAK_LATENCY_TIMER 0x00F80000 /* Timer Modifier for Ack/Nak Latency Timer */ ++#define PCIE_SNR_ACKNAK_LATENCY_TIMER_S 19 ++#define PCIE_SNR_FC_TIMER 0x1F000000 /* Timer Modifier for Flow Control Watchdog Timer */ ++#define PCIE_SNR_FC_TIMER_S 28 ++ ++/* Symbol Timer Register and Filter Mask Register 1 */ ++#define PCIE_STRFMR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x71C) ++#define PCIE_STRFMR_SKP_INTERVAL 0x000007FF /* SKP lnterval Value */ ++#define PCIE_STRFMR_SKP_INTERVAL_S 0 ++#define PCIE_STRFMR_FC_WDT_DISABLE 0x00008000 /* Disable of FC Watchdog Timer */ ++#define PCIE_STRFMR_TLP_FUNC_MISMATCH_OK 0x00010000 /* Mask Function Mismatch Filtering for Incoming Requests */ ++#define PCIE_STRFMR_POISONED_TLP_OK 0x00020000 /* Mask Poisoned TLP Filtering */ ++#define PCIE_STRFMR_BAR_MATCH_OK 0x00040000 /* Mask BAR Match Filtering */ ++#define PCIE_STRFMR_TYPE1_CFG_REQ_OK 0x00080000 /* Mask Type 1 Configuration Request Filtering */ ++#define PCIE_STRFMR_LOCKED_REQ_OK 0x00100000 /* Mask Locked Request Filtering */ ++#define PCIE_STRFMR_CPL_TAG_ERR_RULES_OK 0x00200000 /* Mask Tag Error Rules for Received Completions */ ++#define PCIE_STRFMR_CPL_REQUESTOR_ID_MISMATCH_OK 0x00400000 /* Mask Requester ID Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_FUNC_MISMATCH_OK 0x00800000 /* Mask Function Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_TC_MISMATCH_OK 0x01000000 /* Mask Traffic Class Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_ATTR_MISMATCH_OK 0x02000000 /* Mask Attribute Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_LENGTH_MISMATCH_OK 0x04000000 /* Mask Length Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_TLP_ECRC_ERR_OK 0x08000000 /* Mask ECRC Error Filtering */ ++#define PCIE_STRFMR_CPL_TLP_ECRC_OK 0x10000000 /* Mask ECRC Error Filtering for Completions */ ++#define PCIE_STRFMR_RX_TLP_MSG_NO_DROP 0x20000000 /* Send Message TLPs */ ++#define PCIE_STRFMR_RX_IO_TRANS_ENABLE 0x40000000 /* Mask Filtering of received I/O Requests */ ++#define PCIE_STRFMR_RX_CFG_TRANS_ENABLE 0x80000000 /* Mask Filtering of Received Configuration Requests */ ++ ++#define PCIE_DEF_SKP_INTERVAL 700 /* 1180 ~1538 , 125MHz * 2, 250MHz * 1 */ ++ ++/* Filter Masker Register 2 */ ++#define PCIE_FMR2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x720) ++#define PCIE_FMR2_VENDOR_MSG0_PASSED_TO_TRGT1 0x00000001 /* Mask RADM Filtering and Error Handling Rules */ ++#define PCIE_FMR2_VENDOR_MSG1_PASSED_TO_TRGT1 0x00000002 /* Mask RADM Filtering and Error Handling Rules */ ++ ++/* Debug Register 0 */ ++#define PCIE_DBR0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x728) ++ ++/* Debug Register 1 */ ++#define PCIE_DBR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x72C) ++ ++/* Transmit Posted FC Credit Status Register */ ++#define PCIE_TPFCS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x730) ++#define PCIE_TPFCS_TX_P_DATA_FC_CREDITS 0x00000FFF /* Transmit Posted Data FC Credits */ ++#define PCIE_TPFCS_TX_P_DATA_FC_CREDITS_S 0 ++#define PCIE_TPFCS_TX_P_HDR_FC_CREDITS 0x000FF000 /* Transmit Posted Header FC Credits */ ++#define PCIE_TPFCS_TX_P_HDR_FC_CREDITS_S 12 ++ ++/* Transmit Non-Posted FC Credit Status */ ++#define PCIE_TNPFCS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x734) ++#define PCIE_TNPFCS_TX_NP_DATA_FC_CREDITS 0x00000FFF /* Transmit Non-Posted Data FC Credits */ ++#define PCIE_TNPFCS_TX_NP_DATA_FC_CREDITS_S 0 ++#define PCIE_TNPFCS_TX_NP_HDR_FC_CREDITS 0x000FF000 /* Transmit Non-Posted Header FC Credits */ ++#define PCIE_TNPFCS_TX_NP_HDR_FC_CREDITS_S 12 ++ ++/* Transmit Complete FC Credit Status Register */ ++#define PCIE_TCFCS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x738) ++#define PCIE_TCFCS_TX_CPL_DATA_FC_CREDITS 0x00000FFF /* Transmit Completion Data FC Credits */ ++#define PCIE_TCFCS_TX_CPL_DATA_FC_CREDITS_S 0 ++#define PCIE_TCFCS_TX_CPL_HDR_FC_CREDITS 0x000FF000 /* Transmit Completion Header FC Credits */ ++#define PCIE_TCFCS_TX_CPL_HDR_FC_CREDITS_S 12 ++ ++/* Queue Status Register */ ++#define PCIE_QSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x73C) ++#define PCIE_QSR_WAIT_UPDATE_FC_DLL 0x00000001 /* Received TLP FC Credits Not Returned */ ++#define PCIE_QSR_TX_RETRY_BUF_NOT_EMPTY 0x00000002 /* Transmit Retry Buffer Not Empty */ ++#define PCIE_QSR_RX_QUEUE_NOT_EMPTY 0x00000004 /* Received Queue Not Empty */ ++ ++/* VC Transmit Arbitration Register 1 */ ++#define PCIE_VCTAR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x740) ++#define PCIE_VCTAR1_WRR_WEIGHT_VC0 0x000000FF /* WRR Weight for VC0 */ ++#define PCIE_VCTAR1_WRR_WEIGHT_VC1 0x0000FF00 /* WRR Weight for VC1 */ ++#define PCIE_VCTAR1_WRR_WEIGHT_VC2 0x00FF0000 /* WRR Weight for VC2 */ ++#define PCIE_VCTAR1_WRR_WEIGHT_VC3 0xFF000000 /* WRR Weight for VC3 */ ++ ++/* VC Transmit Arbitration Register 2 */ ++#define PCIE_VCTAR2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x744) ++#define PCIE_VCTAR2_WRR_WEIGHT_VC4 0x000000FF /* WRR Weight for VC4 */ ++#define PCIE_VCTAR2_WRR_WEIGHT_VC5 0x0000FF00 /* WRR Weight for VC5 */ ++#define PCIE_VCTAR2_WRR_WEIGHT_VC6 0x00FF0000 /* WRR Weight for VC6 */ ++#define PCIE_VCTAR2_WRR_WEIGHT_VC7 0xFF000000 /* WRR Weight for VC7 */ ++ ++/* VC0 Posted Receive Queue Control Register */ ++#define PCIE_VC0_PRQCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x748) ++#define PCIE_VC0_PRQCR_P_DATA_CREDITS 0x00000FFF /* VC0 Posted Data Credits */ ++#define PCIE_VC0_PRQCR_P_DATA_CREDITS_S 0 ++#define PCIE_VC0_PRQCR_P_HDR_CREDITS 0x000FF000 /* VC0 Posted Header Credits */ ++#define PCIE_VC0_PRQCR_P_HDR_CREDITS_S 12 ++#define PCIE_VC0_PRQCR_P_TLP_QUEUE_MODE 0x00E00000 /* VC0 Posted TLP Queue Mode */ ++#define PCIE_VC0_PRQCR_P_TLP_QUEUE_MODE_S 20 ++#define PCIE_VC0_PRQCR_TLP_RELAX_ORDER 0x40000000 /* TLP Type Ordering for VC0 */ ++#define PCIE_VC0_PRQCR_VC_STRICT_ORDER 0x80000000 /* VC0 Ordering for Receive Queues */ ++ ++/* VC0 Non-Posted Receive Queue Control */ ++#define PCIE_VC0_NPRQCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x74C) ++#define PCIE_VC0_NPRQCR_NP_DATA_CREDITS 0x00000FFF /* VC0 Non-Posted Data Credits */ ++#define PCIE_VC0_NPRQCR_NP_DATA_CREDITS_S 0 ++#define PCIE_VC0_NPRQCR_NP_HDR_CREDITS 0x000FF000 /* VC0 Non-Posted Header Credits */ ++#define PCIE_VC0_NPRQCR_NP_HDR_CREDITS_S 12 ++#define PCIE_VC0_NPRQCR_NP_TLP_QUEUE_MODE 0x00E00000 /* VC0 Non-Posted TLP Queue Mode */ ++#define PCIE_VC0_NPRQCR_NP_TLP_QUEUE_MODE_S 20 ++ ++/* VC0 Completion Receive Queue Control */ ++#define PCIE_VC0_CRQCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x750) ++#define PCIE_VC0_CRQCR_CPL_DATA_CREDITS 0x00000FFF /* VC0 Completion TLP Queue Mode */ ++#define PCIE_VC0_CRQCR_CPL_DATA_CREDITS_S 0 ++#define PCIE_VC0_CRQCR_CPL_HDR_CREDITS 0x000FF000 /* VC0 Completion Header Credits */ ++#define PCIE_VC0_CRQCR_CPL_HDR_CREDITS_S 12 ++#define PCIE_VC0_CRQCR_CPL_TLP_QUEUE_MODE 0x00E00000 /* VC0 Completion Data Credits */ ++#define PCIE_VC0_CRQCR_CPL_TLP_QUEUE_MODE_S 21 ++ ++/* Applicable to the above three registers */ ++enum { ++ PCIE_VC0_TLP_QUEUE_MODE_STORE_FORWARD = 1, ++ PCIE_VC0_TLP_QUEUE_MODE_CUT_THROUGH = 2, ++ PCIE_VC0_TLP_QUEUE_MODE_BYPASS = 4, ++}; ++ ++/* VC0 Posted Buffer Depth Register */ ++#define PCIE_VC0_PBD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7A8) ++#define PCIE_VC0_PBD_P_DATA_QUEUE_ENTRIES 0x00003FFF /* VC0 Posted Data Queue Depth */ ++#define PCIE_VC0_PBD_P_DATA_QUEUE_ENTRIES_S 0 ++#define PCIE_VC0_PBD_P_HDR_QUEUE_ENTRIES 0x03FF0000 /* VC0 Posted Header Queue Depth */ ++#define PCIE_VC0_PBD_P_HDR_QUEUE_ENTRIES_S 16 ++ ++/* VC0 Non-Posted Buffer Depth Register */ ++#define PCIE_VC0_NPBD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7AC) ++#define PCIE_VC0_NPBD_NP_DATA_QUEUE_ENTRIES 0x00003FFF /* VC0 Non-Posted Data Queue Depth */ ++#define PCIE_VC0_NPBD_NP_DATA_QUEUE_ENTRIES_S 0 ++#define PCIE_VC0_NPBD_NP_HDR_QUEUE_ENTRIES 0x03FF0000 /* VC0 Non-Posted Header Queue Depth */ ++#define PCIE_VC0_NPBD_NP_HDR_QUEUE_ENTRIES_S 16 ++ ++/* VC0 Completion Buffer Depth Register */ ++#define PCIE_VC0_CBD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7B0) ++#define PCIE_VC0_CBD_CPL_DATA_QUEUE_ENTRIES 0x00003FFF /* C0 Completion Data Queue Depth */ ++#define PCIE_VC0_CBD_CPL_DATA_QUEUE_ENTRIES_S 0 ++#define PCIE_VC0_CBD_CPL_HDR_QUEUE_ENTRIES 0x03FF0000 /* VC0 Completion Header Queue Depth */ ++#define PCIE_VC0_CBD_CPL_HDR_QUEUE_ENTRIES_S 16 ++ ++/* PHY Status Register, all zeros in VR9 */ ++#define PCIE_PHYSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x810) ++ ++/* PHY Control Register, all zeros in VR9 */ ++#define PCIE_PHYCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x814) ++ ++/* ++ * PCIe PDI PHY register definition, suppose all the following ++ * stuff is confidential. ++ * XXX, detailed bit definition ++ */ ++#define PCIE_PHY_PLL_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x22 << 1)) ++#define PCIE_PHY_PLL_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x23 << 1)) ++#define PCIE_PHY_PLL_CTRL3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x24 << 1)) ++#define PCIE_PHY_PLL_CTRL4(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x25 << 1)) ++#define PCIE_PHY_PLL_CTRL5(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x26 << 1)) ++#define PCIE_PHY_PLL_CTRL6(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x27 << 1)) ++#define PCIE_PHY_PLL_CTRL7(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x28 << 1)) ++#define PCIE_PHY_PLL_A_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x29 << 1)) ++#define PCIE_PHY_PLL_A_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x2A << 1)) ++#define PCIE_PHY_PLL_A_CTRL3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x2B << 1)) ++#define PCIE_PHY_PLL_STATUS(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x2C << 1)) ++ ++#define PCIE_PHY_TX1_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x30 << 1)) ++#define PCIE_PHY_TX1_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x31 << 1)) ++#define PCIE_PHY_TX1_CTRL3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x32 << 1)) ++#define PCIE_PHY_TX1_A_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x33 << 1)) ++#define PCIE_PHY_TX1_A_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x34 << 1)) ++#define PCIE_PHY_TX1_MOD1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x35 << 1)) ++#define PCIE_PHY_TX1_MOD2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x36 << 1)) ++#define PCIE_PHY_TX1_MOD3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x37 << 1)) ++ ++#define PCIE_PHY_TX2_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x38 << 1)) ++#define PCIE_PHY_TX2_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x39 << 1)) ++#define PCIE_PHY_TX2_A_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3B << 1)) ++#define PCIE_PHY_TX2_A_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3C << 1)) ++#define PCIE_PHY_TX2_MOD1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3D << 1)) ++#define PCIE_PHY_TX2_MOD2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3E << 1)) ++#define PCIE_PHY_TX2_MOD3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3F << 1)) ++ ++#define PCIE_PHY_RX1_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x50 << 1)) ++#define PCIE_PHY_RX1_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x51 << 1)) ++#define PCIE_PHY_RX1_CDR(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x52 << 1)) ++#define PCIE_PHY_RX1_EI(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x53 << 1)) ++#define PCIE_PHY_RX1_A_CTRL(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x55 << 1)) ++ ++/* Interrupt related stuff */ ++#define PCIE_LEGACY_DISABLE 0 ++#define PCIE_LEGACY_INTA 1 ++#define PCIE_LEGACY_INTB 2 ++#define PCIE_LEGACY_INTC 3 ++#define PCIE_LEGACY_INTD 4 ++#define PCIE_LEGACY_INT_MAX PCIE_LEGACY_INTD ++ ++#endif /* IFXMIPS_PCIE_REG_H */ ++ +--- /dev/null ++++ b/arch/mips/pci/ifxmips_pcie_vr9.h +@@ -0,0 +1,269 @@ ++/**************************************************************************** ++ Copyright (c) 2010 ++ Lantiq Deutschland GmbH ++ Am Campeon 3; 85579 Neubiberg, Germany ++ ++ For licensing information, see the file 'LICENSE' in the root folder of ++ this software module. ++ ++ *****************************************************************************/ ++/*! ++ \file ifxmips_pcie_vr9.h ++ \ingroup IFX_PCIE ++ \brief PCIe RC driver vr9 specific file ++*/ ++ ++#ifndef IFXMIPS_PCIE_VR9_H ++#define IFXMIPS_PCIE_VR9_H ++ ++#include ++#include ++ ++#include ++#include ++ ++#define IFX_PCIE_GPIO_RESET 494 ++ ++#define IFX_REG_R32 ltq_r32 ++#define IFX_REG_W32 ltq_w32 ++#define CONFIG_IFX_PCIE_HW_SWAP ++#define IFX_RCU_AHB_ENDIAN ((volatile u32*)(IFX_RCU + 0x004C)) ++#define IFX_RCU_RST_REQ ((volatile u32*)(IFX_RCU + 0x0010)) ++#define IFX_RCU_AHB_BE_PCIE_PDI 0x00000080 /* Configure PCIE PDI module in big endian*/ ++ ++#define IFX_RCU (KSEG1 | 0x1F203000) ++#define IFX_RCU_AHB_BE_PCIE_M 0x00000001 /* Configure AHB master port that connects to PCIe RC in big endian */ ++#define IFX_RCU_AHB_BE_PCIE_S 0x00000010 /* Configure AHB slave port that connects to PCIe RC in little endian */ ++#define IFX_RCU_AHB_BE_XBAR_M 0x00000002 /* Configure AHB master port that connects to XBAR in big endian */ ++#define CONFIG_IFX_PCIE_PHY_36MHZ_MODE ++ ++#define IFX_PMU1_MODULE_PCIE_PHY (0) ++#define IFX_PMU1_MODULE_PCIE_CTRL (1) ++#define IFX_PMU1_MODULE_PDI (4) ++#define IFX_PMU1_MODULE_MSI (5) ++ ++#define IFX_PMU_MODULE_PCIE_L0_CLK (31) ++ ++ ++#define IFX_GPIO (KSEG1 | 0x1E100B00) ++#define ALT0 ((volatile u32*)(IFX_GPIO + 0x007c)) ++#define ALT1 ((volatile u32*)(IFX_GPIO + 0x0080)) ++#define OD ((volatile u32*)(IFX_GPIO + 0x0084)) ++#define DIR ((volatile u32*)(IFX_GPIO + 0x0078)) ++#define OUT ((volatile u32*)(IFX_GPIO + 0x0070)) ++ ++ ++static inline void pcie_ep_gpio_rst_init(int pcie_port) ++{ ++ ++ gpio_request(IFX_PCIE_GPIO_RESET, "pcie-reset"); ++ gpio_direction_output(IFX_PCIE_GPIO_RESET, 1); ++ gpio_set_value(IFX_PCIE_GPIO_RESET, 1); ++ ++/* ifx_gpio_pin_reserve(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); ++ ifx_gpio_output_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); ++ ifx_gpio_dir_out_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); ++ ifx_gpio_altsel0_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); ++ ifx_gpio_altsel1_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); ++ ifx_gpio_open_drain_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);*/ ++} ++ ++static inline void pcie_ahb_pmu_setup(void) ++{ ++ /* Enable AHB bus master/slave */ ++ struct clk *clk; ++ clk = clk_get_sys("1d900000.pcie", "ahb"); ++ clk_enable(clk); ++ ++ //AHBM_PMU_SETUP(IFX_PMU_ENABLE); ++ //AHBS_PMU_SETUP(IFX_PMU_ENABLE); ++} ++ ++static inline void pcie_rcu_endian_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_AHB_ENDIAN); ++#ifdef CONFIG_IFX_PCIE_HW_SWAP ++ reg |= IFX_RCU_AHB_BE_PCIE_M; ++ reg |= IFX_RCU_AHB_BE_PCIE_S; ++ reg &= ~IFX_RCU_AHB_BE_XBAR_M; ++#else ++ reg |= IFX_RCU_AHB_BE_PCIE_M; ++ reg &= ~IFX_RCU_AHB_BE_PCIE_S; ++ reg &= ~IFX_RCU_AHB_BE_XBAR_M; ++#endif /* CONFIG_IFX_PCIE_HW_SWAP */ ++ IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); ++ IFX_PCIE_PRINT(PCIE_MSG_REG, "%s IFX_RCU_AHB_ENDIAN: 0x%08x\n", __func__, IFX_REG_R32(IFX_RCU_AHB_ENDIAN)); ++} ++ ++static inline void pcie_phy_pmu_enable(int pcie_port) ++{ ++ struct clk *clk; ++ clk = clk_get_sys("1d900000.pcie", "phy"); ++ clk_enable(clk); ++ ++ //PCIE_PHY_PMU_SETUP(IFX_PMU_ENABLE); ++} ++ ++static inline void pcie_phy_pmu_disable(int pcie_port) ++{ ++ struct clk *clk; ++ clk = clk_get_sys("1d900000.pcie", "phy"); ++ clk_disable(clk); ++ ++// PCIE_PHY_PMU_SETUP(IFX_PMU_DISABLE); ++} ++ ++static inline void pcie_pdi_big_endian(int pcie_port) ++{ ++ u32 reg; ++ ++ /* SRAM2PDI endianness control. */ ++ reg = IFX_REG_R32(IFX_RCU_AHB_ENDIAN); ++ /* Config AHB->PCIe and PDI endianness */ ++ reg |= IFX_RCU_AHB_BE_PCIE_PDI; ++ IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); ++} ++ ++static inline void pcie_pdi_pmu_enable(int pcie_port) ++{ ++ /* Enable PDI to access PCIe PHY register */ ++ struct clk *clk; ++ clk = clk_get_sys("1d900000.pcie", "pdi"); ++ clk_enable(clk); ++ //PDI_PMU_SETUP(IFX_PMU_ENABLE); ++} ++ ++static inline void pcie_core_rst_assert(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ ++ /* Reset PCIe PHY & Core, bit 22, bit 26 may be affected if write it directly */ ++ reg |= 0x00400000; ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_core_rst_deassert(int pcie_port) ++{ ++ u32 reg; ++ ++ /* Make sure one micro-second delay */ ++ udelay(1); ++ ++ /* Reset PCIe PHY & Core, bit 22 */ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ reg &= ~0x00400000; ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_phy_rst_assert(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ reg |= 0x00001000; /* Bit 12 */ ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_phy_rst_deassert(int pcie_port) ++{ ++ u32 reg; ++ ++ /* Make sure one micro-second delay */ ++ udelay(1); ++ ++ reg = IFX_REG_R32(IFX_RCU_RST_REQ); ++ reg &= ~0x00001000; /* Bit 12 */ ++ IFX_REG_W32(reg, IFX_RCU_RST_REQ); ++} ++ ++static inline void pcie_device_rst_assert(int pcie_port) ++{ ++ gpio_set_value(IFX_PCIE_GPIO_RESET, 0); ++// ifx_gpio_output_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); ++} ++ ++static inline void pcie_device_rst_deassert(int pcie_port) ++{ ++ mdelay(100); ++ gpio_direction_output(IFX_PCIE_GPIO_RESET, 1); ++// gpio_set_value(IFX_PCIE_GPIO_RESET, 1); ++ //ifx_gpio_output_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); ++} ++ ++static inline void pcie_core_pmu_setup(int pcie_port) ++{ ++ struct clk *clk; ++ clk = clk_get_sys("1d900000.pcie", "ctl"); ++ clk_enable(clk); ++ clk = clk_get_sys("1d900000.pcie", "bus"); ++ clk_enable(clk); ++ ++ /* PCIe Core controller enabled */ ++// PCIE_CTRL_PMU_SETUP(IFX_PMU_ENABLE); ++ ++ /* Enable PCIe L0 Clock */ ++// PCIE_L0_CLK_PMU_SETUP(IFX_PMU_ENABLE); ++} ++ ++static inline void pcie_msi_init(int pcie_port) ++{ ++ struct clk *clk; ++ pcie_msi_pic_init(pcie_port); ++ clk = clk_get_sys("ltq_pcie", "msi"); ++ clk_enable(clk); ++// MSI_PMU_SETUP(IFX_PMU_ENABLE); ++} ++ ++static inline u32 ++ifx_pcie_bus_nr_deduct(u32 bus_number, int pcie_port) ++{ ++ u32 tbus_number = bus_number; ++ ++#ifdef CONFIG_PCI_LANTIQ ++ if (pcibios_host_nr() > 1) { ++ tbus_number -= pcibios_1st_host_bus_nr(); ++ } ++#endif /* CONFIG_PCI_LANTIQ */ ++ return tbus_number; ++} ++ ++static inline u32 ++ifx_pcie_bus_enum_hack(struct pci_bus *bus, u32 devfn, int where, u32 value, int pcie_port, int read) ++{ ++ struct pci_dev *pdev; ++ u32 tvalue = value; ++ ++ /* Sanity check */ ++ pdev = pci_get_slot(bus, devfn); ++ if (pdev == NULL) { ++ return tvalue; ++ } ++ ++ /* Only care about PCI bridge */ ++ if (pdev->hdr_type != PCI_HEADER_TYPE_BRIDGE) { ++ return tvalue; ++ } ++ ++ if (read) { /* Read hack */ ++ #ifdef CONFIG_PCI_LANTIQ ++ if (pcibios_host_nr() > 1) { ++ tvalue = ifx_pcie_bus_enum_read_hack(where, tvalue); ++ } ++ #endif /* CONFIG_PCI_LANTIQ */ ++ } ++ else { /* Write hack */ ++ #ifdef CONFIG_PCI_LANTIQ ++ if (pcibios_host_nr() > 1) { ++ tvalue = ifx_pcie_bus_enum_write_hack(where, tvalue); ++ } ++ #endif ++ } ++ return tvalue; ++} ++ ++#endif /* IFXMIPS_PCIE_VR9_H */ ++ +--- a/arch/mips/pci/pci-legacy.c ++++ b/arch/mips/pci/pci-legacy.c +@@ -309,3 +309,30 @@ char *__init pcibios_setup(char *str) + return pcibios_plat_setup(str); + return str; + } ++ ++int pcibios_host_nr(void) ++{ ++ int count = 0; ++ struct pci_controller *hose; ++ list_for_each_entry(hose, &controllers, list) { ++ count++; ++ } ++ return count; ++} ++EXPORT_SYMBOL(pcibios_host_nr); ++ ++int pcibios_1st_host_bus_nr(void) ++{ ++ int bus_nr = 0; ++ struct pci_controller *hose; ++ ++ hose = list_first_entry_or_null(&controllers, struct pci_controller, list); ++ ++ if (hose != NULL) { ++ if (hose->bus != NULL) { ++ bus_nr = hose->bus->number + 1; ++ } ++ } ++ return bus_nr; ++} ++EXPORT_SYMBOL(pcibios_1st_host_bus_nr); +--- /dev/null ++++ b/arch/mips/pci/pcie-lantiq.h +@@ -0,0 +1,1305 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifxmips_pcie_reg.h ++** PROJECT : IFX UEIP for VRX200 ++** MODULES : PCIe module ++** ++** DATE : 02 Mar 2009 ++** AUTHOR : Lei Chuanhua ++** DESCRIPTION : PCIe Root Complex Driver ++** COPYRIGHT : Copyright (c) 2009 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** HISTORY ++** $Version $Date $Author $Comment ++** 0.0.1 17 Mar,2009 Lei Chuanhua Initial version ++*******************************************************************************/ ++#ifndef IFXMIPS_PCIE_REG_H ++#define IFXMIPS_PCIE_REG_H ++#include ++#include ++#include ++#include ++/*! ++ \file ifxmips_pcie_reg.h ++ \ingroup IFX_PCIE ++ \brief header file for PCIe module register definition ++*/ ++/* PCIe Address Mapping Base */ ++#define PCIE_CFG_PHY_BASE 0x1D000000UL ++#define PCIE_CFG_BASE (KSEG1 + PCIE_CFG_PHY_BASE) ++#define PCIE_CFG_SIZE (8 * 1024 * 1024) ++ ++#define PCIE_MEM_PHY_BASE 0x1C000000UL ++#define PCIE_MEM_BASE (KSEG1 + PCIE_MEM_PHY_BASE) ++#define PCIE_MEM_SIZE (16 * 1024 * 1024) ++#define PCIE_MEM_PHY_END (PCIE_MEM_PHY_BASE + PCIE_MEM_SIZE - 1) ++ ++#define PCIE_IO_PHY_BASE 0x1D800000UL ++#define PCIE_IO_BASE (KSEG1 + PCIE_IO_PHY_BASE) ++#define PCIE_IO_SIZE (1 * 1024 * 1024) ++#define PCIE_IO_PHY_END (PCIE_IO_PHY_BASE + PCIE_IO_SIZE - 1) ++ ++#define PCIE_RC_CFG_BASE (KSEG1 + 0x1D900000) ++#define PCIE_APP_LOGIC_REG (KSEG1 + 0x1E100900) ++#define PCIE_MSI_PHY_BASE 0x1F600000UL ++ ++#define PCIE_PDI_PHY_BASE 0x1F106800UL ++#define PCIE_PDI_BASE (KSEG1 + PCIE_PDI_PHY_BASE) ++#define PCIE_PDI_SIZE 0x400 ++ ++#define PCIE1_CFG_PHY_BASE 0x19000000UL ++#define PCIE1_CFG_BASE (KSEG1 + PCIE1_CFG_PHY_BASE) ++#define PCIE1_CFG_SIZE (8 * 1024 * 1024) ++ ++#define PCIE1_MEM_PHY_BASE 0x18000000UL ++#define PCIE1_MEM_BASE (KSEG1 + PCIE1_MEM_PHY_BASE) ++#define PCIE1_MEM_SIZE (16 * 1024 * 1024) ++#define PCIE1_MEM_PHY_END (PCIE1_MEM_PHY_BASE + PCIE1_MEM_SIZE - 1) ++ ++#define PCIE1_IO_PHY_BASE 0x19800000UL ++#define PCIE1_IO_BASE (KSEG1 + PCIE1_IO_PHY_BASE) ++#define PCIE1_IO_SIZE (1 * 1024 * 1024) ++#define PCIE1_IO_PHY_END (PCIE1_IO_PHY_BASE + PCIE1_IO_SIZE - 1) ++ ++#define PCIE1_RC_CFG_BASE (KSEG1 + 0x19900000) ++#define PCIE1_APP_LOGIC_REG (KSEG1 + 0x1E100700) ++#define PCIE1_MSI_PHY_BASE 0x1F400000UL ++ ++#define PCIE1_PDI_PHY_BASE 0x1F700400UL ++#define PCIE1_PDI_BASE (KSEG1 + PCIE1_PDI_PHY_BASE) ++#define PCIE1_PDI_SIZE 0x400 ++ ++#define PCIE_CFG_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_CFG_BASE) : (PCIE_CFG_BASE)) ++#define PCIE_MEM_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_MEM_BASE) : (PCIE_MEM_BASE)) ++#define PCIE_IO_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_IO_BASE) : (PCIE_IO_BASE)) ++#define PCIE_MEM_PHY_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_MEM_PHY_BASE) : (PCIE_MEM_PHY_BASE)) ++#define PCIE_MEM_PHY_PORT_TO_END(X) ((X) > 0 ? (PCIE1_MEM_PHY_END) : (PCIE_MEM_PHY_END)) ++#define PCIE_IO_PHY_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_IO_PHY_BASE) : (PCIE_IO_PHY_BASE)) ++#define PCIE_IO_PHY_PORT_TO_END(X) ((X) > 0 ? (PCIE1_IO_PHY_END) : (PCIE_IO_PHY_END)) ++#define PCIE_APP_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_APP_LOGIC_REG) : (PCIE_APP_LOGIC_REG)) ++#define PCIE_RC_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_RC_CFG_BASE) : (PCIE_RC_CFG_BASE)) ++#define PCIE_PHY_PORT_TO_BASE(X) ((X) > 0 ? (PCIE1_PDI_BASE) : (PCIE_PDI_BASE)) ++ ++/* PCIe Application Logic Register */ ++/* RC Core Control Register */ ++#define PCIE_RC_CCR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x10) ++/* This should be enabled after initializing configuratin registers ++ * Also should check link status retraining bit ++ */ ++#define PCIE_RC_CCR_LTSSM_ENABLE 0x00000001 /* Enable LTSSM to continue link establishment */ ++ ++/* RC Core Debug Register */ ++#define PCIE_RC_DR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x14) ++#define PCIE_RC_DR_DLL_UP 0x00000001 /* Data Link Layer Up */ ++#define PCIE_RC_DR_CURRENT_POWER_STATE 0x0000000E /* Current Power State */ ++#define PCIE_RC_DR_CURRENT_POWER_STATE_S 1 ++#define PCIE_RC_DR_CURRENT_LTSSM_STATE 0x000001F0 /* Current LTSSM State */ ++#define PCIE_RC_DR_CURRENT_LTSSM_STATE_S 4 ++ ++#define PCIE_RC_DR_PM_DEV_STATE 0x00000E00 /* Power Management D-State */ ++#define PCIE_RC_DR_PM_DEV_STATE_S 9 ++ ++#define PCIE_RC_DR_PM_ENABLED 0x00001000 /* Power Management State from PMU */ ++#define PCIE_RC_DR_PME_EVENT_ENABLED 0x00002000 /* Power Management Event Enable State */ ++#define PCIE_RC_DR_AUX_POWER_ENABLED 0x00004000 /* Auxiliary Power Enable */ ++ ++/* Current Power State Definition */ ++enum { ++ PCIE_RC_DR_D0 = 0, ++ PCIE_RC_DR_D1, /* Not supported */ ++ PCIE_RC_DR_D2, /* Not supported */ ++ PCIE_RC_DR_D3, ++ PCIE_RC_DR_UN, ++}; ++ ++/* PHY Link Status Register */ ++#define PCIE_PHY_SR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x18) ++#define PCIE_PHY_SR_PHY_LINK_UP 0x00000001 /* PHY Link Up/Down Indicator */ ++ ++/* Electromechanical Control Register */ ++#define PCIE_EM_CR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x1C) ++#define PCIE_EM_CR_CARD_IS_PRESENT 0x00000001 /* Card Presence Detect State */ ++#define PCIE_EM_CR_MRL_OPEN 0x00000002 /* MRL Sensor State */ ++#define PCIE_EM_CR_POWER_FAULT_SET 0x00000004 /* Power Fault Detected */ ++#define PCIE_EM_CR_MRL_SENSOR_SET 0x00000008 /* MRL Sensor Changed */ ++#define PCIE_EM_CR_PRESENT_DETECT_SET 0x00000010 /* Card Presense Detect Changed */ ++#define PCIE_EM_CR_CMD_CPL_INT_SET 0x00000020 /* Command Complete Interrupt */ ++#define PCIE_EM_CR_SYS_INTERLOCK_SET 0x00000040 /* System Electromechanical IterLock Engaged */ ++#define PCIE_EM_CR_ATTENTION_BUTTON_SET 0x00000080 /* Attention Button Pressed */ ++ ++/* Interrupt Status Register */ ++#define PCIE_IR_SR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x20) ++#define PCIE_IR_SR_PME_CAUSE_MSI 0x00000002 /* MSI caused by PME */ ++#define PCIE_IR_SR_HP_PME_WAKE_GEN 0x00000004 /* Hotplug PME Wake Generation */ ++#define PCIE_IR_SR_HP_MSI 0x00000008 /* Hotplug MSI */ ++#define PCIE_IR_SR_AHB_LU_ERR 0x00000030 /* AHB Bridge Lookup Error Signals */ ++#define PCIE_IR_SR_AHB_LU_ERR_S 4 ++#define PCIE_IR_SR_INT_MSG_NUM 0x00003E00 /* Interrupt Message Number */ ++#define PCIE_IR_SR_INT_MSG_NUM_S 9 ++#define PCIE_IR_SR_AER_INT_MSG_NUM 0xF8000000 /* Advanced Error Interrupt Message Number */ ++#define PCIE_IR_SR_AER_INT_MSG_NUM_S 27 ++ ++/* Message Control Register */ ++#define PCIE_MSG_CR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x30) ++#define PCIE_MSG_CR_GEN_PME_TURN_OFF_MSG 0x00000001 /* Generate PME Turn Off Message */ ++#define PCIE_MSG_CR_GEN_UNLOCK_MSG 0x00000002 /* Generate Unlock Message */ ++ ++#define PCIE_VDM_DR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x34) ++ ++/* Vendor-Defined Message Requester ID Register */ ++#define PCIE_VDM_RID(X) (PCIE_APP_PORT_TO_BASE (X) + 0x38) ++#define PCIE_VDM_RID_VENROR_MSG_REQ_ID 0x0000FFFF ++#define PCIE_VDM_RID_VDMRID_S 0 ++ ++/* ASPM Control Register */ ++#define PCIE_ASPM_CR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x40) ++#define PCIE_ASPM_CR_HOT_RST 0x00000001 /* Hot Reset Request to the downstream device */ ++#define PCIE_ASPM_CR_REQ_EXIT_L1 0x00000002 /* Request to Exit L1 */ ++#define PCIE_ASPM_CR_REQ_ENTER_L1 0x00000004 /* Request to Enter L1 */ ++ ++/* Vendor Message DW0 Register */ ++#define PCIE_VM_MSG_DW0(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x50) ++#define PCIE_VM_MSG_DW0_TYPE 0x0000001F /* Message type */ ++#define PCIE_VM_MSG_DW0_TYPE_S 0 ++#define PCIE_VM_MSG_DW0_FORMAT 0x00000060 /* Format */ ++#define PCIE_VM_MSG_DW0_FORMAT_S 5 ++#define PCIE_VM_MSG_DW0_TC 0x00007000 /* Traffic Class */ ++#define PCIE_VM_MSG_DW0_TC_S 12 ++#define PCIE_VM_MSG_DW0_ATTR 0x000C0000 /* Atrributes */ ++#define PCIE_VM_MSG_DW0_ATTR_S 18 ++#define PCIE_VM_MSG_DW0_EP_TLP 0x00100000 /* Poisoned TLP */ ++#define PCIE_VM_MSG_DW0_TD 0x00200000 /* TLP Digest */ ++#define PCIE_VM_MSG_DW0_LEN 0xFFC00000 /* Length */ ++#define PCIE_VM_MSG_DW0_LEN_S 22 ++ ++/* Format Definition */ ++enum { ++ PCIE_VM_MSG_FORMAT_00 = 0, /* 3DW Hdr, no data*/ ++ PCIE_VM_MSG_FORMAT_01, /* 4DW Hdr, no data */ ++ PCIE_VM_MSG_FORMAT_10, /* 3DW Hdr, with data */ ++ PCIE_VM_MSG_FORMAT_11, /* 4DW Hdr, with data */ ++}; ++ ++/* Traffic Class Definition */ ++enum { ++ PCIE_VM_MSG_TC0 = 0, ++ PCIE_VM_MSG_TC1, ++ PCIE_VM_MSG_TC2, ++ PCIE_VM_MSG_TC3, ++ PCIE_VM_MSG_TC4, ++ PCIE_VM_MSG_TC5, ++ PCIE_VM_MSG_TC6, ++ PCIE_VM_MSG_TC7, ++}; ++ ++/* Attributes Definition */ ++enum { ++ PCIE_VM_MSG_ATTR_00 = 0, /* RO and No Snoop cleared */ ++ PCIE_VM_MSG_ATTR_01, /* RO cleared , No Snoop set */ ++ PCIE_VM_MSG_ATTR_10, /* RO set, No Snoop cleared*/ ++ PCIE_VM_MSG_ATTR_11, /* RO and No Snoop set */ ++}; ++ ++/* Payload Size Definition */ ++#define PCIE_VM_MSG_LEN_MIN 0 ++#define PCIE_VM_MSG_LEN_MAX 1024 ++ ++/* Vendor Message DW1 Register */ ++#define PCIE_VM_MSG_DW1(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x54) ++#define PCIE_VM_MSG_DW1_FUNC_NUM 0x00000070 /* Function Number */ ++#define PCIE_VM_MSG_DW1_FUNC_NUM_S 8 ++#define PCIE_VM_MSG_DW1_CODE 0x00FF0000 /* Message Code */ ++#define PCIE_VM_MSG_DW1_CODE_S 16 ++#define PCIE_VM_MSG_DW1_TAG 0xFF000000 /* Tag */ ++#define PCIE_VM_MSG_DW1_TAG_S 24 ++ ++#define PCIE_VM_MSG_DW2(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x58) ++#define PCIE_VM_MSG_DW3(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x5C) ++ ++/* Vendor Message Request Register */ ++#define PCIE_VM_MSG_REQR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x60) ++#define PCIE_VM_MSG_REQR_REQ 0x00000001 /* Vendor Message Request */ ++ ++ ++/* AHB Slave Side Band Control Register */ ++#define PCIE_AHB_SSB(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x70) ++#define PCIE_AHB_SSB_REQ_BCM 0x00000001 /* Slave Reques BCM filed */ ++#define PCIE_AHB_SSB_REQ_EP 0x00000002 /* Slave Reques EP filed */ ++#define PCIE_AHB_SSB_REQ_TD 0x00000004 /* Slave Reques TD filed */ ++#define PCIE_AHB_SSB_REQ_ATTR 0x00000018 /* Slave Reques Attribute number */ ++#define PCIE_AHB_SSB_REQ_ATTR_S 3 ++#define PCIE_AHB_SSB_REQ_TC 0x000000E0 /* Slave Request TC Field */ ++#define PCIE_AHB_SSB_REQ_TC_S 5 ++ ++/* AHB Master SideBand Ctrl Register */ ++#define PCIE_AHB_MSB(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x74) ++#define PCIE_AHB_MSB_RESP_ATTR 0x00000003 /* Master Response Attribute number */ ++#define PCIE_AHB_MSB_RESP_ATTR_S 0 ++#define PCIE_AHB_MSB_RESP_BAD_EOT 0x00000004 /* Master Response Badeot filed */ ++#define PCIE_AHB_MSB_RESP_BCM 0x00000008 /* Master Response BCM filed */ ++#define PCIE_AHB_MSB_RESP_EP 0x00000010 /* Master Response EP filed */ ++#define PCIE_AHB_MSB_RESP_TD 0x00000020 /* Master Response TD filed */ ++#define PCIE_AHB_MSB_RESP_FUN_NUM 0x000003C0 /* Master Response Function number */ ++#define PCIE_AHB_MSB_RESP_FUN_NUM_S 6 ++ ++/* AHB Control Register, fixed bus enumeration exception */ ++#define PCIE_AHB_CTRL(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0x78) ++#define PCIE_AHB_CTRL_BUS_ERROR_SUPPRESS 0x00000001 ++ ++/* Interrupt Enalbe Register */ ++#define PCIE_IRNEN(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0xF4) ++#define PCIE_IRNCR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0xF8) ++#define PCIE_IRNICR(X) (volatile u32*)(PCIE_APP_PORT_TO_BASE(X) + 0xFC) ++ ++/* PCIe interrupt enable/control/capture register definition */ ++#define PCIE_IRN_AER_REPORT 0x00000001 /* AER Interrupt */ ++#define PCIE_IRN_AER_MSIX 0x00000002 /* Advanced Error MSI-X Interrupt */ ++#define PCIE_IRN_PME 0x00000004 /* PME Interrupt */ ++#define PCIE_IRN_HOTPLUG 0x00000008 /* Hotplug Interrupt */ ++#define PCIE_IRN_RX_VDM_MSG 0x00000010 /* Vendor-Defined Message Interrupt */ ++#define PCIE_IRN_RX_CORRECTABLE_ERR_MSG 0x00000020 /* Correctable Error Message Interrupt */ ++#define PCIE_IRN_RX_NON_FATAL_ERR_MSG 0x00000040 /* Non-fatal Error Message */ ++#define PCIE_IRN_RX_FATAL_ERR_MSG 0x00000080 /* Fatal Error Message */ ++#define PCIE_IRN_RX_PME_MSG 0x00000100 /* PME Message Interrupt */ ++#define PCIE_IRN_RX_PME_TURNOFF_ACK 0x00000200 /* PME Turnoff Ack Message Interrupt */ ++#define PCIE_IRN_AHB_BR_FATAL_ERR 0x00000400 /* AHB Fatal Error Interrupt */ ++#define PCIE_IRN_LINK_AUTO_BW_STATUS 0x00000800 /* Link Auto Bandwidth Status Interrupt */ ++#define PCIE_IRN_BW_MGT 0x00001000 /* Bandwidth Managment Interrupt */ ++#define PCIE_IRN_INTA 0x00002000 /* INTA */ ++#define PCIE_IRN_INTB 0x00004000 /* INTB */ ++#define PCIE_IRN_INTC 0x00008000 /* INTC */ ++#define PCIE_IRN_INTD 0x00010000 /* INTD */ ++#define PCIE_IRN_WAKEUP 0x00020000 /* Wake up Interrupt */ ++ ++#define PCIE_RC_CORE_COMBINED_INT (PCIE_IRN_AER_REPORT | PCIE_IRN_AER_MSIX | PCIE_IRN_PME | \ ++ PCIE_IRN_HOTPLUG | PCIE_IRN_RX_VDM_MSG | PCIE_IRN_RX_CORRECTABLE_ERR_MSG |\ ++ PCIE_IRN_RX_NON_FATAL_ERR_MSG | PCIE_IRN_RX_FATAL_ERR_MSG | \ ++ PCIE_IRN_RX_PME_MSG | PCIE_IRN_RX_PME_TURNOFF_ACK | PCIE_IRN_AHB_BR_FATAL_ERR | \ ++ PCIE_IRN_LINK_AUTO_BW_STATUS | PCIE_IRN_BW_MGT) ++/* PCIe RC Configuration Register */ ++#define PCIE_VDID(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x00) ++ ++/* Bit definition from pci_reg.h */ ++#define PCIE_PCICMDSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x04) ++#define PCIE_CCRID(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x08) ++#define PCIE_CLSLTHTBR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x0C) /* EP only */ ++/* BAR0, BAR1,Only necessary if the bridges implements a device-specific register set or memory buffer */ ++#define PCIE_BAR0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x10) /* Not used*/ ++#define PCIE_BAR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x14) /* Not used */ ++ ++#define PCIE_BNR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x18) /* Mandatory */ ++/* Bus Number Register bits */ ++#define PCIE_BNR_PRIMARY_BUS_NUM 0x000000FF ++#define PCIE_BNR_PRIMARY_BUS_NUM_S 0 ++#define PCIE_PNR_SECONDARY_BUS_NUM 0x0000FF00 ++#define PCIE_PNR_SECONDARY_BUS_NUM_S 8 ++#define PCIE_PNR_SUB_BUS_NUM 0x00FF0000 ++#define PCIE_PNR_SUB_BUS_NUM_S 16 ++ ++/* IO Base/Limit Register bits */ ++#define PCIE_IOBLSECS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x1C) /* RC only */ ++#define PCIE_IOBLSECS_32BIT_IO_ADDR 0x00000001 ++#define PCIE_IOBLSECS_IO_BASE_ADDR 0x000000F0 ++#define PCIE_IOBLSECS_IO_BASE_ADDR_S 4 ++#define PCIE_IOBLSECS_32BIT_IOLIMT 0x00000100 ++#define PCIE_IOBLSECS_IO_LIMIT_ADDR 0x0000F000 ++#define PCIE_IOBLSECS_IO_LIMIT_ADDR_S 12 ++ ++/* Non-prefetchable Memory Base/Limit Register bit */ ++#define PCIE_MBML(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x20) /* RC only */ ++#define PCIE_MBML_MEM_BASE_ADDR 0x0000FFF0 ++#define PCIE_MBML_MEM_BASE_ADDR_S 4 ++#define PCIE_MBML_MEM_LIMIT_ADDR 0xFFF00000 ++#define PCIE_MBML_MEM_LIMIT_ADDR_S 20 ++ ++/* Prefetchable Memory Base/Limit Register bit */ ++#define PCIE_PMBL(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x24) /* RC only */ ++#define PCIE_PMBL_64BIT_ADDR 0x00000001 ++#define PCIE_PMBL_UPPER_12BIT 0x0000FFF0 ++#define PCIE_PMBL_UPPER_12BIT_S 4 ++#define PCIE_PMBL_E64MA 0x00010000 ++#define PCIE_PMBL_END_ADDR 0xFFF00000 ++#define PCIE_PMBL_END_ADDR_S 20 ++#define PCIE_PMBU32(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x28) /* RC only */ ++#define PCIE_PMLU32(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x2C) /* RC only */ ++ ++/* I/O Base/Limit Upper 16 bits register */ ++#define PCIE_IO_BANDL(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x30) /* RC only */ ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_BASE 0x0000FFFF ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_BASE_S 0 ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_LIMIT 0xFFFF0000 ++#define PCIE_IO_BANDL_UPPER_16BIT_IO_LIMIT_S 16 ++ ++#define PCIE_CPR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x34) ++#define PCIE_EBBAR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x38) ++ ++/* Interrupt and Secondary Bridge Control Register */ ++#define PCIE_INTRBCTRL(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x3C) ++ ++#define PCIE_INTRBCTRL_INT_LINE 0x000000FF ++#define PCIE_INTRBCTRL_INT_LINE_S 0 ++#define PCIE_INTRBCTRL_INT_PIN 0x0000FF00 ++#define PCIE_INTRBCTRL_INT_PIN_S 8 ++#define PCIE_INTRBCTRL_PARITY_ERR_RESP_ENABLE 0x00010000 /* #PERR */ ++#define PCIE_INTRBCTRL_SERR_ENABLE 0x00020000 /* #SERR */ ++#define PCIE_INTRBCTRL_ISA_ENABLE 0x00040000 /* ISA enable, IO 64KB only */ ++#define PCIE_INTRBCTRL_VGA_ENABLE 0x00080000 /* VGA enable */ ++#define PCIE_INTRBCTRL_VGA_16BIT_DECODE 0x00100000 /* VGA 16bit decode */ ++#define PCIE_INTRBCTRL_RST_SECONDARY_BUS 0x00400000 /* Secondary bus rest, hot rest, 1ms */ ++/* Others are read only */ ++enum { ++ PCIE_INTRBCTRL_INT_NON = 0, ++ PCIE_INTRBCTRL_INTA, ++ PCIE_INTRBCTRL_INTB, ++ PCIE_INTRBCTRL_INTC, ++ PCIE_INTRBCTRL_INTD, ++}; ++ ++#define PCIE_PM_CAPR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x40) ++ ++/* Power Management Control and Status Register */ ++#define PCIE_PM_CSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x44) ++ ++#define PCIE_PM_CSR_POWER_STATE 0x00000003 /* Power State */ ++#define PCIE_PM_CSR_POWER_STATE_S 0 ++#define PCIE_PM_CSR_SW_RST 0x00000008 /* Soft Reset Enabled */ ++#define PCIE_PM_CSR_PME_ENABLE 0x00000100 /* PME Enable */ ++#define PCIE_PM_CSR_PME_STATUS 0x00008000 /* PME status */ ++ ++/* MSI Capability Register for EP */ ++#define PCIE_MCAPR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x50) ++ ++#define PCIE_MCAPR_MSI_CAP_ID 0x000000FF /* MSI Capability ID */ ++#define PCIE_MCAPR_MSI_CAP_ID_S 0 ++#define PCIE_MCAPR_MSI_NEXT_CAP_PTR 0x0000FF00 /* Next Capability Pointer */ ++#define PCIE_MCAPR_MSI_NEXT_CAP_PTR_S 8 ++#define PCIE_MCAPR_MSI_ENABLE 0x00010000 /* MSI Enable */ ++#define PCIE_MCAPR_MULTI_MSG_CAP 0x000E0000 /* Multiple Message Capable */ ++#define PCIE_MCAPR_MULTI_MSG_CAP_S 17 ++#define PCIE_MCAPR_MULTI_MSG_ENABLE 0x00700000 /* Multiple Message Enable */ ++#define PCIE_MCAPR_MULTI_MSG_ENABLE_S 20 ++#define PCIE_MCAPR_ADDR64_CAP 0X00800000 /* 64-bit Address Capable */ ++ ++/* MSI Message Address Register */ ++#define PCIE_MA(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x54) ++ ++#define PCIE_MA_ADDR_MASK 0xFFFFFFFC /* Message Address */ ++ ++/* MSI Message Upper Address Register */ ++#define PCIE_MUA(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x58) ++ ++/* MSI Message Data Register */ ++#define PCIE_MD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x5C) ++ ++#define PCIE_MD_DATA 0x0000FFFF /* Message Data */ ++#define PCIE_MD_DATA_S 0 ++ ++/* PCI Express Capability Register */ ++#define PCIE_XCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x70) ++ ++#define PCIE_XCAP_ID 0x000000FF /* PCI Express Capability ID */ ++#define PCIE_XCAP_ID_S 0 ++#define PCIE_XCAP_NEXT_CAP 0x0000FF00 /* Next Capability Pointer */ ++#define PCIE_XCAP_NEXT_CAP_S 8 ++#define PCIE_XCAP_VER 0x000F0000 /* PCI Express Capability Version */ ++#define PCIE_XCAP_VER_S 16 ++#define PCIE_XCAP_DEV_PORT_TYPE 0x00F00000 /* Device Port Type */ ++#define PCIE_XCAP_DEV_PORT_TYPE_S 20 ++#define PCIE_XCAP_SLOT_IMPLEMENTED 0x01000000 /* Slot Implemented */ ++#define PCIE_XCAP_MSG_INT_NUM 0x3E000000 /* Interrupt Message Number */ ++#define PCIE_XCAP_MSG_INT_NUM_S 25 ++ ++/* Device Capability Register */ ++#define PCIE_DCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x74) ++ ++#define PCIE_DCAP_MAX_PAYLOAD_SIZE 0x00000007 /* Max Payload size */ ++#define PCIE_DCAP_MAX_PAYLOAD_SIZE_S 0 ++#define PCIE_DCAP_PHANTOM_FUNC 0x00000018 /* Phanton Function, not supported */ ++#define PCIE_DCAP_PHANTOM_FUNC_S 3 ++#define PCIE_DCAP_EXT_TAG 0x00000020 /* Extended Tag Field */ ++#define PCIE_DCAP_EP_L0S_LATENCY 0x000001C0 /* EP L0s latency only */ ++#define PCIE_DCAP_EP_L0S_LATENCY_S 6 ++#define PCIE_DCAP_EP_L1_LATENCY 0x00000E00 /* EP L1 latency only */ ++#define PCIE_DCAP_EP_L1_LATENCY_S 9 ++#define PCIE_DCAP_ROLE_BASE_ERR_REPORT 0x00008000 /* Role Based ERR */ ++ ++/* Maximum payload size supported */ ++enum { ++ PCIE_MAX_PAYLOAD_128 = 0, ++ PCIE_MAX_PAYLOAD_256, ++ PCIE_MAX_PAYLOAD_512, ++ PCIE_MAX_PAYLOAD_1024, ++ PCIE_MAX_PAYLOAD_2048, ++ PCIE_MAX_PAYLOAD_4096, ++}; ++ ++/* Device Control and Status Register */ ++#define PCIE_DCTLSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x78) ++ ++#define PCIE_DCTLSTS_CORRECTABLE_ERR_EN 0x00000001 /* COR-ERR */ ++#define PCIE_DCTLSTS_NONFATAL_ERR_EN 0x00000002 /* Non-fatal ERR */ ++#define PCIE_DCTLSTS_FATAL_ERR_EN 0x00000004 /* Fatal ERR */ ++#define PCIE_DCTLSYS_UR_REQ_EN 0x00000008 /* UR ERR */ ++#define PCIE_DCTLSTS_RELAXED_ORDERING_EN 0x00000010 /* Enable relaxing ordering */ ++#define PCIE_DCTLSTS_MAX_PAYLOAD_SIZE 0x000000E0 /* Max payload mask */ ++#define PCIE_DCTLSTS_MAX_PAYLOAD_SIZE_S 5 ++#define PCIE_DCTLSTS_EXT_TAG_EN 0x00000100 /* Extended tag field */ ++#define PCIE_DCTLSTS_PHANTOM_FUNC_EN 0x00000200 /* Phantom Function Enable */ ++#define PCIE_DCTLSTS_AUX_PM_EN 0x00000400 /* AUX Power PM Enable */ ++#define PCIE_DCTLSTS_NO_SNOOP_EN 0x00000800 /* Enable no snoop, except root port*/ ++#define PCIE_DCTLSTS_MAX_READ_SIZE 0x00007000 /* Max Read Request size*/ ++#define PCIE_DCTLSTS_MAX_READ_SIZE_S 12 ++#define PCIE_DCTLSTS_CORRECTABLE_ERR 0x00010000 /* COR-ERR Detected */ ++#define PCIE_DCTLSTS_NONFATAL_ERR 0x00020000 /* Non-Fatal ERR Detected */ ++#define PCIE_DCTLSTS_FATAL_ER 0x00040000 /* Fatal ERR Detected */ ++#define PCIE_DCTLSTS_UNSUPPORTED_REQ 0x00080000 /* UR Detected */ ++#define PCIE_DCTLSTS_AUX_POWER 0x00100000 /* Aux Power Detected */ ++#define PCIE_DCTLSTS_TRANSACT_PENDING 0x00200000 /* Transaction pending */ ++ ++#define PCIE_DCTLSTS_ERR_EN (PCIE_DCTLSTS_CORRECTABLE_ERR_EN | \ ++ PCIE_DCTLSTS_NONFATAL_ERR_EN | PCIE_DCTLSTS_FATAL_ERR_EN | \ ++ PCIE_DCTLSYS_UR_REQ_EN) ++ ++/* Link Capability Register */ ++#define PCIE_LCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7C) ++#define PCIE_LCAP_MAX_LINK_SPEED 0x0000000F /* Max link speed, 0x1 by default */ ++#define PCIE_LCAP_MAX_LINK_SPEED_S 0 ++#define PCIE_LCAP_MAX_LENGTH_WIDTH 0x000003F0 /* Maxium Length Width */ ++#define PCIE_LCAP_MAX_LENGTH_WIDTH_S 4 ++#define PCIE_LCAP_ASPM_LEVEL 0x00000C00 /* Active State Link PM Support */ ++#define PCIE_LCAP_ASPM_LEVEL_S 10 ++#define PCIE_LCAP_L0S_EIXT_LATENCY 0x00007000 /* L0s Exit Latency */ ++#define PCIE_LCAP_L0S_EIXT_LATENCY_S 12 ++#define PCIE_LCAP_L1_EXIT_LATENCY 0x00038000 /* L1 Exit Latency */ ++#define PCIE_LCAP_L1_EXIT_LATENCY_S 15 ++#define PCIE_LCAP_CLK_PM 0x00040000 /* Clock Power Management */ ++#define PCIE_LCAP_SDER 0x00080000 /* Surprise Down Error Reporting */ ++#define PCIE_LCAP_DLL_ACTIVE_REPROT 0x00100000 /* Data Link Layer Active Reporting Capable */ ++#define PCIE_LCAP_PORT_NUM 0xFF0000000 /* Port number */ ++#define PCIE_LCAP_PORT_NUM_S 24 ++ ++/* Maximum Length width definition */ ++#define PCIE_MAX_LENGTH_WIDTH_RES 0x00 ++#define PCIE_MAX_LENGTH_WIDTH_X1 0x01 /* Default */ ++#define PCIE_MAX_LENGTH_WIDTH_X2 0x02 ++#define PCIE_MAX_LENGTH_WIDTH_X4 0x04 ++#define PCIE_MAX_LENGTH_WIDTH_X8 0x08 ++#define PCIE_MAX_LENGTH_WIDTH_X12 0x0C ++#define PCIE_MAX_LENGTH_WIDTH_X16 0x10 ++#define PCIE_MAX_LENGTH_WIDTH_X32 0x20 ++ ++/* Active State Link PM definition */ ++enum { ++ PCIE_ASPM_RES0 = 0, ++ PCIE_ASPM_L0S_ENTRY_SUPPORT, /* L0s */ ++ PCIE_ASPM_RES1, ++ PCIE_ASPM_L0S_L1_ENTRY_SUPPORT, /* L0s and L1, default */ ++}; ++ ++/* L0s Exit Latency definition */ ++enum { ++ PCIE_L0S_EIXT_LATENCY_L64NS = 0, /* < 64 ns */ ++ PCIE_L0S_EIXT_LATENCY_B64A128, /* > 64 ns < 128 ns */ ++ PCIE_L0S_EIXT_LATENCY_B128A256, /* > 128 ns < 256 ns */ ++ PCIE_L0S_EIXT_LATENCY_B256A512, /* > 256 ns < 512 ns */ ++ PCIE_L0S_EIXT_LATENCY_B512TO1U, /* > 512 ns < 1 us */ ++ PCIE_L0S_EIXT_LATENCY_B1A2U, /* > 1 us < 2 us */ ++ PCIE_L0S_EIXT_LATENCY_B2A4U, /* > 2 us < 4 us */ ++ PCIE_L0S_EIXT_LATENCY_M4US, /* > 4 us */ ++}; ++ ++/* L1 Exit Latency definition */ ++enum { ++ PCIE_L1_EXIT_LATENCY_L1US = 0, /* < 1 us */ ++ PCIE_L1_EXIT_LATENCY_B1A2, /* > 1 us < 2 us */ ++ PCIE_L1_EXIT_LATENCY_B2A4, /* > 2 us < 4 us */ ++ PCIE_L1_EXIT_LATENCY_B4A8, /* > 4 us < 8 us */ ++ PCIE_L1_EXIT_LATENCY_B8A16, /* > 8 us < 16 us */ ++ PCIE_L1_EXIT_LATENCY_B16A32, /* > 16 us < 32 us */ ++ PCIE_L1_EXIT_LATENCY_B32A64, /* > 32 us < 64 us */ ++ PCIE_L1_EXIT_LATENCY_M64US, /* > 64 us */ ++}; ++ ++/* Link Control and Status Register */ ++#define PCIE_LCTLSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x80) ++#define PCIE_LCTLSTS_ASPM_ENABLE 0x00000003 /* Active State Link PM Control */ ++#define PCIE_LCTLSTS_ASPM_ENABLE_S 0 ++#define PCIE_LCTLSTS_RCB128 0x00000008 /* Read Completion Boundary 128*/ ++#define PCIE_LCTLSTS_LINK_DISABLE 0x00000010 /* Link Disable */ ++#define PCIE_LCTLSTS_RETRIAN_LINK 0x00000020 /* Retrain Link */ ++#define PCIE_LCTLSTS_COM_CLK_CFG 0x00000040 /* Common Clock Configuration */ ++#define PCIE_LCTLSTS_EXT_SYNC 0x00000080 /* Extended Synch */ ++#define PCIE_LCTLSTS_CLK_PM_EN 0x00000100 /* Enable Clock Powerm Management */ ++#define PCIE_LCTLSTS_LINK_SPEED 0x000F0000 /* Link Speed */ ++#define PCIE_LCTLSTS_LINK_SPEED_S 16 ++#define PCIE_LCTLSTS_NEGOTIATED_LINK_WIDTH 0x03F00000 /* Negotiated Link Width */ ++#define PCIE_LCTLSTS_NEGOTIATED_LINK_WIDTH_S 20 ++#define PCIE_LCTLSTS_RETRAIN_PENDING 0x08000000 /* Link training is ongoing */ ++#define PCIE_LCTLSTS_SLOT_CLK_CFG 0x10000000 /* Slot Clock Configuration */ ++#define PCIE_LCTLSTS_DLL_ACTIVE 0x20000000 /* Data Link Layer Active */ ++ ++/* Slot Capabilities Register */ ++#define PCIE_SLCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x84) ++ ++/* Slot Capabilities */ ++#define PCIE_SLCTLSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x88) ++ ++/* Root Control and Capability Register */ ++#define PCIE_RCTLCAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x8C) ++#define PCIE_RCTLCAP_SERR_ON_CORRECTABLE_ERR 0x00000001 /* #SERR on COR-ERR */ ++#define PCIE_RCTLCAP_SERR_ON_NONFATAL_ERR 0x00000002 /* #SERR on Non-Fatal ERR */ ++#define PCIE_RCTLCAP_SERR_ON_FATAL_ERR 0x00000004 /* #SERR on Fatal ERR */ ++#define PCIE_RCTLCAP_PME_INT_EN 0x00000008 /* PME Interrupt Enable */ ++#define PCIE_RCTLCAP_SERR_ENABLE (PCIE_RCTLCAP_SERR_ON_CORRECTABLE_ERR | \ ++ PCIE_RCTLCAP_SERR_ON_NONFATAL_ERR | PCIE_RCTLCAP_SERR_ON_FATAL_ERR) ++/* Root Status Register */ ++#define PCIE_RSTS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x90) ++#define PCIE_RSTS_PME_REQ_ID 0x0000FFFF /* PME Request ID */ ++#define PCIE_RSTS_PME_REQ_ID_S 0 ++#define PCIE_RSTS_PME_STATUS 0x00010000 /* PME Status */ ++#define PCIE_RSTS_PME_PENDING 0x00020000 /* PME Pending */ ++ ++/* PCI Express Enhanced Capability Header */ ++#define PCIE_ENHANCED_CAP(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x100) ++#define PCIE_ENHANCED_CAP_ID 0x0000FFFF /* PCI Express Extended Capability ID */ ++#define PCIE_ENHANCED_CAP_ID_S 0 ++#define PCIE_ENHANCED_CAP_VER 0x000F0000 /* Capability Version */ ++#define PCIE_ENHANCED_CAP_VER_S 16 ++#define PCIE_ENHANCED_CAP_NEXT_OFFSET 0xFFF00000 /* Next Capability Offset */ ++#define PCIE_ENHANCED_CAP_NEXT_OFFSET_S 20 ++ ++/* Uncorrectable Error Status Register */ ++#define PCIE_UES_R(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x104) ++#define PCIE_DATA_LINK_PROTOCOL_ERR 0x00000010 /* Data Link Protocol Error Status */ ++#define PCIE_SURPRISE_DOWN_ERROR 0x00000020 /* Surprise Down Error Status */ ++#define PCIE_POISONED_TLP 0x00001000 /* Poisoned TLP Status */ ++#define PCIE_FC_PROTOCOL_ERR 0x00002000 /* Flow Control Protocol Error Status */ ++#define PCIE_COMPLETION_TIMEOUT 0x00004000 /* Completion Timeout Status */ ++#define PCIE_COMPLETOR_ABORT 0x00008000 /* Completer Abort Error */ ++#define PCIE_UNEXPECTED_COMPLETION 0x00010000 /* Unexpected Completion Status */ ++#define PCIE_RECEIVER_OVERFLOW 0x00020000 /* Receive Overflow Status */ ++#define PCIE_MALFORNED_TLP 0x00040000 /* Malformed TLP Stauts */ ++#define PCIE_ECRC_ERR 0x00080000 /* ECRC Error Stauts */ ++#define PCIE_UR_REQ 0x00100000 /* Unsupported Request Error Status */ ++#define PCIE_ALL_UNCORRECTABLE_ERR (PCIE_DATA_LINK_PROTOCOL_ERR | PCIE_SURPRISE_DOWN_ERROR | \ ++ PCIE_POISONED_TLP | PCIE_FC_PROTOCOL_ERR | PCIE_COMPLETION_TIMEOUT | \ ++ PCIE_COMPLETOR_ABORT | PCIE_UNEXPECTED_COMPLETION | PCIE_RECEIVER_OVERFLOW |\ ++ PCIE_MALFORNED_TLP | PCIE_ECRC_ERR | PCIE_UR_REQ) ++ ++/* Uncorrectable Error Mask Register, Mask means no report */ ++#define PCIE_UEMR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x108) ++ ++/* Uncorrectable Error Severity Register */ ++#define PCIE_UESR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x10C) ++ ++/* Correctable Error Status Register */ ++#define PCIE_CESR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x110) ++#define PCIE_RX_ERR 0x00000001 /* Receive Error Status */ ++#define PCIE_BAD_TLP 0x00000040 /* Bad TLP Status */ ++#define PCIE_BAD_DLLP 0x00000080 /* Bad DLLP Status */ ++#define PCIE_REPLAY_NUM_ROLLOVER 0x00000100 /* Replay Number Rollover Status */ ++#define PCIE_REPLAY_TIMER_TIMEOUT_ERR 0x00001000 /* Reply Timer Timeout Status */ ++#define PCIE_ADVISORY_NONFTAL_ERR 0x00002000 /* Advisory Non-Fatal Error Status */ ++#define PCIE_CORRECTABLE_ERR (PCIE_RX_ERR | PCIE_BAD_TLP | PCIE_BAD_DLLP | PCIE_REPLAY_NUM_ROLLOVER |\ ++ PCIE_REPLAY_TIMER_TIMEOUT_ERR | PCIE_ADVISORY_NONFTAL_ERR) ++ ++/* Correctable Error Mask Register */ ++#define PCIE_CEMR(X) (volatile u32*)(PCIE_RC_CFG_BASE + 0x114) ++ ++/* Advanced Error Capabilities and Control Register */ ++#define PCIE_AECCR(X) (volatile u32*)(PCIE_RC_CFG_BASE + 0x118) ++#define PCIE_AECCR_FIRST_ERR_PTR 0x0000001F /* First Error Pointer */ ++#define PCIE_AECCR_FIRST_ERR_PTR_S 0 ++#define PCIE_AECCR_ECRC_GEN_CAP 0x00000020 /* ECRC Generation Capable */ ++#define PCIE_AECCR_ECRC_GEN_EN 0x00000040 /* ECRC Generation Enable */ ++#define PCIE_AECCR_ECRC_CHECK_CAP 0x00000080 /* ECRC Check Capable */ ++#define PCIE_AECCR_ECRC_CHECK_EN 0x00000100 /* ECRC Check Enable */ ++ ++/* Header Log Register 1 */ ++#define PCIE_HLR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x11C) ++ ++/* Header Log Register 2 */ ++#define PCIE_HLR2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x120) ++ ++/* Header Log Register 3 */ ++#define PCIE_HLR3(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x124) ++ ++/* Header Log Register 4 */ ++#define PCIE_HLR4(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x128) ++ ++/* Root Error Command Register */ ++#define PCIE_RECR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x12C) ++#define PCIE_RECR_CORRECTABLE_ERR_REPORT_EN 0x00000001 /* COR-ERR */ ++#define PCIE_RECR_NONFATAL_ERR_REPORT_EN 0x00000002 /* Non-Fatal ERR */ ++#define PCIE_RECR_FATAL_ERR_REPORT_EN 0x00000004 /* Fatal ERR */ ++#define PCIE_RECR_ERR_REPORT_EN (PCIE_RECR_CORRECTABLE_ERR_REPORT_EN | \ ++ PCIE_RECR_NONFATAL_ERR_REPORT_EN | PCIE_RECR_FATAL_ERR_REPORT_EN) ++ ++/* Root Error Status Register */ ++#define PCIE_RESR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x130) ++#define PCIE_RESR_CORRECTABLE_ERR 0x00000001 /* COR-ERR Receveid */ ++#define PCIE_RESR_MULTI_CORRECTABLE_ERR 0x00000002 /* Multiple COR-ERR Received */ ++#define PCIE_RESR_FATAL_NOFATAL_ERR 0x00000004 /* ERR Fatal/Non-Fatal Received */ ++#define PCIE_RESR_MULTI_FATAL_NOFATAL_ERR 0x00000008 /* Multiple ERR Fatal/Non-Fatal Received */ ++#define PCIE_RESR_FIRST_UNCORRECTABLE_FATAL_ERR 0x00000010 /* First UN-COR Fatal */ ++#define PCIR_RESR_NON_FATAL_ERR 0x00000020 /* Non-Fatal Error Message Received */ ++#define PCIE_RESR_FATAL_ERR 0x00000040 /* Fatal Message Received */ ++#define PCIE_RESR_AER_INT_MSG_NUM 0xF8000000 /* Advanced Error Interrupt Message Number */ ++#define PCIE_RESR_AER_INT_MSG_NUM_S 27 ++ ++/* Error Source Indentification Register */ ++#define PCIE_ESIR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x134) ++#define PCIE_ESIR_CORRECTABLE_ERR_SRC_ID 0x0000FFFF ++#define PCIE_ESIR_CORRECTABLE_ERR_SRC_ID_S 0 ++#define PCIE_ESIR_FATAL_NON_FATAL_SRC_ID 0xFFFF0000 ++#define PCIE_ESIR_FATAL_NON_FATAL_SRC_ID_S 16 ++ ++/* VC Enhanced Capability Header */ ++#define PCIE_VC_ECH(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x140) ++ ++/* Port VC Capability Register */ ++#define PCIE_PVC1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x144) ++#define PCIE_PVC1_EXT_VC_CNT 0x00000007 /* Extended VC Count */ ++#define PCIE_PVC1_EXT_VC_CNT_S 0 ++#define PCIE_PVC1_LOW_PRI_EXT_VC_CNT 0x00000070 /* Low Priority Extended VC Count */ ++#define PCIE_PVC1_LOW_PRI_EXT_VC_CNT_S 4 ++#define PCIE_PVC1_REF_CLK 0x00000300 /* Reference Clock */ ++#define PCIE_PVC1_REF_CLK_S 8 ++#define PCIE_PVC1_PORT_ARB_TAB_ENTRY_SIZE 0x00000C00 /* Port Arbitration Table Entry Size */ ++#define PCIE_PVC1_PORT_ARB_TAB_ENTRY_SIZE_S 10 ++ ++/* Extended Virtual Channel Count Defintion */ ++#define PCIE_EXT_VC_CNT_MIN 0 ++#define PCIE_EXT_VC_CNT_MAX 7 ++ ++/* Port Arbitration Table Entry Size Definition */ ++enum { ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S1BIT = 0, ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S2BIT, ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S4BIT, ++ PCIE_PORT_ARB_TAB_ENTRY_SIZE_S8BIT, ++}; ++ ++/* Port VC Capability Register 2 */ ++#define PCIE_PVC2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x148) ++#define PCIE_PVC2_VC_ARB_16P_FIXED_WRR 0x00000001 /* HW Fixed arbitration, 16 phase WRR */ ++#define PCIE_PVC2_VC_ARB_32P_WRR 0x00000002 /* 32 phase WRR */ ++#define PCIE_PVC2_VC_ARB_64P_WRR 0x00000004 /* 64 phase WRR */ ++#define PCIE_PVC2_VC_ARB_128P_WRR 0x00000008 /* 128 phase WRR */ ++#define PCIE_PVC2_VC_ARB_WRR 0x0000000F ++#define PCIE_PVC2_VC_ARB_TAB_OFFSET 0xFF000000 /* VC arbitration table offset, not support */ ++#define PCIE_PVC2_VC_ARB_TAB_OFFSET_S 24 ++ ++/* Port VC Control and Status Register */ ++#define PCIE_PVCCRSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x14C) ++#define PCIE_PVCCRSR_LOAD_VC_ARB_TAB 0x00000001 /* Load VC Arbitration Table */ ++#define PCIE_PVCCRSR_VC_ARB_SEL 0x0000000E /* VC Arbitration Select */ ++#define PCIE_PVCCRSR_VC_ARB_SEL_S 1 ++#define PCIE_PVCCRSR_VC_ARB_TAB_STATUS 0x00010000 /* Arbitration Status */ ++ ++/* VC0 Resource Capability Register */ ++#define PCIE_VC0_RC(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x150) ++#define PCIE_VC0_RC_PORT_ARB_HW_FIXED 0x00000001 /* HW Fixed arbitration */ ++#define PCIE_VC0_RC_PORT_ARB_32P_WRR 0x00000002 /* 32 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_64P_WRR 0x00000004 /* 64 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_128P_WRR 0x00000008 /* 128 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_TM_128P_WRR 0x00000010 /* Time-based 128 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB_TM_256P_WRR 0x00000020 /* Time-based 256 phase WRR */ ++#define PCIE_VC0_RC_PORT_ARB (PCIE_VC0_RC_PORT_ARB_HW_FIXED | PCIE_VC0_RC_PORT_ARB_32P_WRR |\ ++ PCIE_VC0_RC_PORT_ARB_64P_WRR | PCIE_VC0_RC_PORT_ARB_128P_WRR | \ ++ PCIE_VC0_RC_PORT_ARB_TM_128P_WRR | PCIE_VC0_RC_PORT_ARB_TM_256P_WRR) ++ ++#define PCIE_VC0_RC_REJECT_SNOOP 0x00008000 /* Reject Snoop Transactioin */ ++#define PCIE_VC0_RC_MAX_TIMESLOTS 0x007F0000 /* Maximum time Slots */ ++#define PCIE_VC0_RC_MAX_TIMESLOTS_S 16 ++#define PCIE_VC0_RC_PORT_ARB_TAB_OFFSET 0xFF000000 /* Port Arbitration Table Offset */ ++#define PCIE_VC0_RC_PORT_ARB_TAB_OFFSET_S 24 ++ ++/* VC0 Resource Control Register */ ++#define PCIE_VC0_RC0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x154) ++#define PCIE_VC0_RC0_TVM0 0x00000001 /* TC0 and VC0 */ ++#define PCIE_VC0_RC0_TVM1 0x00000002 /* TC1 and VC1 */ ++#define PCIE_VC0_RC0_TVM2 0x00000004 /* TC2 and VC2 */ ++#define PCIE_VC0_RC0_TVM3 0x00000008 /* TC3 and VC3 */ ++#define PCIE_VC0_RC0_TVM4 0x00000010 /* TC4 and VC4 */ ++#define PCIE_VC0_RC0_TVM5 0x00000020 /* TC5 and VC5 */ ++#define PCIE_VC0_RC0_TVM6 0x00000040 /* TC6 and VC6 */ ++#define PCIE_VC0_RC0_TVM7 0x00000080 /* TC7 and VC7 */ ++#define PCIE_VC0_RC0_TC_VC 0x000000FF /* TC/VC mask */ ++ ++#define PCIE_VC0_RC0_LOAD_PORT_ARB_TAB 0x00010000 /* Load Port Arbitration Table */ ++#define PCIE_VC0_RC0_PORT_ARB_SEL 0x000E0000 /* Port Arbitration Select */ ++#define PCIE_VC0_RC0_PORT_ARB_SEL_S 17 ++#define PCIE_VC0_RC0_VC_ID 0x07000000 /* VC ID */ ++#define PCIE_VC0_RC0_VC_ID_S 24 ++#define PCIE_VC0_RC0_VC_EN 0x80000000 /* VC Enable */ ++ ++/* VC0 Resource Status Register */ ++#define PCIE_VC0_RSR0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x158) ++#define PCIE_VC0_RSR0_PORT_ARB_TAB_STATUS 0x00010000 /* Port Arbitration Table Status,not used */ ++#define PCIE_VC0_RSR0_VC_NEG_PENDING 0x00020000 /* VC Negotiation Pending */ ++ ++/* Ack Latency Timer and Replay Timer Register */ ++#define PCIE_ALTRT(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x700) ++#define PCIE_ALTRT_ROUND_TRIP_LATENCY_LIMIT 0x0000FFFF /* Round Trip Latency Time Limit */ ++#define PCIE_ALTRT_ROUND_TRIP_LATENCY_LIMIT_S 0 ++#define PCIE_ALTRT_REPLAY_TIME_LIMIT 0xFFFF0000 /* Replay Time Limit */ ++#define PCIE_ALTRT_REPLAY_TIME_LIMIT_S 16 ++ ++/* Other Message Register */ ++#define PCIE_OMR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x704) ++ ++/* Port Force Link Register */ ++#define PCIE_PFLR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x708) ++#define PCIE_PFLR_LINK_NUM 0x000000FF /* Link Number */ ++#define PCIE_PFLR_LINK_NUM_S 0 ++#define PCIE_PFLR_FORCE_LINK 0x00008000 /* Force link */ ++#define PCIE_PFLR_LINK_STATE 0x003F0000 /* Link State */ ++#define PCIE_PFLR_LINK_STATE_S 16 ++#define PCIE_PFLR_LOW_POWER_ENTRY_CNT 0xFF000000 /* Low Power Entrance Count, only for EP */ ++#define PCIE_PFLR_LOW_POWER_ENTRY_CNT_S 24 ++ ++/* Ack Frequency Register */ ++#define PCIE_AFR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x70C) ++#define PCIE_AFR_AF 0x000000FF /* Ack Frequency */ ++#define PCIE_AFR_AF_S 0 ++#define PCIE_AFR_FTS_NUM 0x0000FF00 /* The number of Fast Training Sequence from L0S to L0 */ ++#define PCIE_AFR_FTS_NUM_S 8 ++#define PCIE_AFR_COM_FTS_NUM 0x00FF0000 /* N_FTS; when common clock is used*/ ++#define PCIE_AFR_COM_FTS_NUM_S 16 ++#define PCIE_AFR_L0S_ENTRY_LATENCY 0x07000000 /* L0s Entrance Latency */ ++#define PCIE_AFR_L0S_ENTRY_LATENCY_S 24 ++#define PCIE_AFR_L1_ENTRY_LATENCY 0x38000000 /* L1 Entrance Latency */ ++#define PCIE_AFR_L1_ENTRY_LATENCY_S 27 ++#define PCIE_AFR_FTS_NUM_DEFAULT 32 ++#define PCIE_AFR_L0S_ENTRY_LATENCY_DEFAULT 7 ++#define PCIE_AFR_L1_ENTRY_LATENCY_DEFAULT 5 ++ ++/* Port Link Control Register */ ++#define PCIE_PLCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x710) ++#define PCIE_PLCR_OTHER_MSG_REQ 0x00000001 /* Other Message Request */ ++#define PCIE_PLCR_SCRAMBLE_DISABLE 0x00000002 /* Scramble Disable */ ++#define PCIE_PLCR_LOOPBACK_EN 0x00000004 /* Loopback Enable */ ++#define PCIE_PLCR_LTSSM_HOT_RST 0x00000008 /* Force LTSSM to the hot reset */ ++#define PCIE_PLCR_DLL_LINK_EN 0x00000020 /* Enable Link initialization */ ++#define PCIE_PLCR_FAST_LINK_SIM_EN 0x00000080 /* Sets all internal timers to fast mode for simulation purposes */ ++#define PCIE_PLCR_LINK_MODE 0x003F0000 /* Link Mode Enable Mask */ ++#define PCIE_PLCR_LINK_MODE_S 16 ++#define PCIE_PLCR_CORRUPTED_CRC_EN 0x02000000 /* Enabled Corrupt CRC */ ++ ++/* Lane Skew Register */ ++#define PCIE_LSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x714) ++#define PCIE_LSR_LANE_SKEW_NUM 0x00FFFFFF /* Insert Lane Skew for Transmit, not applicable */ ++#define PCIE_LSR_LANE_SKEW_NUM_S 0 ++#define PCIE_LSR_FC_DISABLE 0x01000000 /* Disable of Flow Control */ ++#define PCIE_LSR_ACKNAK_DISABLE 0x02000000 /* Disable of Ack/Nak */ ++#define PCIE_LSR_LANE_DESKEW_DISABLE 0x80000000 /* Disable of Lane-to-Lane Skew */ ++ ++/* Symbol Number Register */ ++#define PCIE_SNR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x718) ++#define PCIE_SNR_TS 0x0000000F /* Number of TS Symbol */ ++#define PCIE_SNR_TS_S 0 ++#define PCIE_SNR_SKP 0x00000700 /* Number of SKP Symbol */ ++#define PCIE_SNR_SKP_S 8 ++#define PCIE_SNR_REPLAY_TIMER 0x0007C000 /* Timer Modifier for Replay Timer */ ++#define PCIE_SNR_REPLAY_TIMER_S 14 ++#define PCIE_SNR_ACKNAK_LATENCY_TIMER 0x00F80000 /* Timer Modifier for Ack/Nak Latency Timer */ ++#define PCIE_SNR_ACKNAK_LATENCY_TIMER_S 19 ++#define PCIE_SNR_FC_TIMER 0x1F000000 /* Timer Modifier for Flow Control Watchdog Timer */ ++#define PCIE_SNR_FC_TIMER_S 28 ++ ++/* Symbol Timer Register and Filter Mask Register 1 */ ++#define PCIE_STRFMR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x71C) ++#define PCIE_STRFMR_SKP_INTERVAL 0x000007FF /* SKP lnterval Value */ ++#define PCIE_STRFMR_SKP_INTERVAL_S 0 ++#define PCIE_STRFMR_FC_WDT_DISABLE 0x00008000 /* Disable of FC Watchdog Timer */ ++#define PCIE_STRFMR_TLP_FUNC_MISMATCH_OK 0x00010000 /* Mask Function Mismatch Filtering for Incoming Requests */ ++#define PCIE_STRFMR_POISONED_TLP_OK 0x00020000 /* Mask Poisoned TLP Filtering */ ++#define PCIE_STRFMR_BAR_MATCH_OK 0x00040000 /* Mask BAR Match Filtering */ ++#define PCIE_STRFMR_TYPE1_CFG_REQ_OK 0x00080000 /* Mask Type 1 Configuration Request Filtering */ ++#define PCIE_STRFMR_LOCKED_REQ_OK 0x00100000 /* Mask Locked Request Filtering */ ++#define PCIE_STRFMR_CPL_TAG_ERR_RULES_OK 0x00200000 /* Mask Tag Error Rules for Received Completions */ ++#define PCIE_STRFMR_CPL_REQUESTOR_ID_MISMATCH_OK 0x00400000 /* Mask Requester ID Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_FUNC_MISMATCH_OK 0x00800000 /* Mask Function Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_TC_MISMATCH_OK 0x01000000 /* Mask Traffic Class Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_ATTR_MISMATCH_OK 0x02000000 /* Mask Attribute Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_CPL_LENGTH_MISMATCH_OK 0x04000000 /* Mask Length Mismatch Error for Received Completions */ ++#define PCIE_STRFMR_TLP_ECRC_ERR_OK 0x08000000 /* Mask ECRC Error Filtering */ ++#define PCIE_STRFMR_CPL_TLP_ECRC_OK 0x10000000 /* Mask ECRC Error Filtering for Completions */ ++#define PCIE_STRFMR_RX_TLP_MSG_NO_DROP 0x20000000 /* Send Message TLPs */ ++#define PCIE_STRFMR_RX_IO_TRANS_ENABLE 0x40000000 /* Mask Filtering of received I/O Requests */ ++#define PCIE_STRFMR_RX_CFG_TRANS_ENABLE 0x80000000 /* Mask Filtering of Received Configuration Requests */ ++ ++#define PCIE_DEF_SKP_INTERVAL 700 /* 1180 ~1538 , 125MHz * 2, 250MHz * 1 */ ++ ++/* Filter Masker Register 2 */ ++#define PCIE_FMR2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x720) ++#define PCIE_FMR2_VENDOR_MSG0_PASSED_TO_TRGT1 0x00000001 /* Mask RADM Filtering and Error Handling Rules */ ++#define PCIE_FMR2_VENDOR_MSG1_PASSED_TO_TRGT1 0x00000002 /* Mask RADM Filtering and Error Handling Rules */ ++ ++/* Debug Register 0 */ ++#define PCIE_DBR0(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x728) ++ ++/* Debug Register 1 */ ++#define PCIE_DBR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x72C) ++ ++/* Transmit Posted FC Credit Status Register */ ++#define PCIE_TPFCS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x730) ++#define PCIE_TPFCS_TX_P_DATA_FC_CREDITS 0x00000FFF /* Transmit Posted Data FC Credits */ ++#define PCIE_TPFCS_TX_P_DATA_FC_CREDITS_S 0 ++#define PCIE_TPFCS_TX_P_HDR_FC_CREDITS 0x000FF000 /* Transmit Posted Header FC Credits */ ++#define PCIE_TPFCS_TX_P_HDR_FC_CREDITS_S 12 ++ ++/* Transmit Non-Posted FC Credit Status */ ++#define PCIE_TNPFCS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x734) ++#define PCIE_TNPFCS_TX_NP_DATA_FC_CREDITS 0x00000FFF /* Transmit Non-Posted Data FC Credits */ ++#define PCIE_TNPFCS_TX_NP_DATA_FC_CREDITS_S 0 ++#define PCIE_TNPFCS_TX_NP_HDR_FC_CREDITS 0x000FF000 /* Transmit Non-Posted Header FC Credits */ ++#define PCIE_TNPFCS_TX_NP_HDR_FC_CREDITS_S 12 ++ ++/* Transmit Complete FC Credit Status Register */ ++#define PCIE_TCFCS(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x738) ++#define PCIE_TCFCS_TX_CPL_DATA_FC_CREDITS 0x00000FFF /* Transmit Completion Data FC Credits */ ++#define PCIE_TCFCS_TX_CPL_DATA_FC_CREDITS_S 0 ++#define PCIE_TCFCS_TX_CPL_HDR_FC_CREDITS 0x000FF000 /* Transmit Completion Header FC Credits */ ++#define PCIE_TCFCS_TX_CPL_HDR_FC_CREDITS_S 12 ++ ++/* Queue Status Register */ ++#define PCIE_QSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x73C) ++#define PCIE_QSR_WAIT_UPDATE_FC_DLL 0x00000001 /* Received TLP FC Credits Not Returned */ ++#define PCIE_QSR_TX_RETRY_BUF_NOT_EMPTY 0x00000002 /* Transmit Retry Buffer Not Empty */ ++#define PCIE_QSR_RX_QUEUE_NOT_EMPTY 0x00000004 /* Received Queue Not Empty */ ++ ++/* VC Transmit Arbitration Register 1 */ ++#define PCIE_VCTAR1(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x740) ++#define PCIE_VCTAR1_WRR_WEIGHT_VC0 0x000000FF /* WRR Weight for VC0 */ ++#define PCIE_VCTAR1_WRR_WEIGHT_VC1 0x0000FF00 /* WRR Weight for VC1 */ ++#define PCIE_VCTAR1_WRR_WEIGHT_VC2 0x00FF0000 /* WRR Weight for VC2 */ ++#define PCIE_VCTAR1_WRR_WEIGHT_VC3 0xFF000000 /* WRR Weight for VC3 */ ++ ++/* VC Transmit Arbitration Register 2 */ ++#define PCIE_VCTAR2(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x744) ++#define PCIE_VCTAR2_WRR_WEIGHT_VC4 0x000000FF /* WRR Weight for VC4 */ ++#define PCIE_VCTAR2_WRR_WEIGHT_VC5 0x0000FF00 /* WRR Weight for VC5 */ ++#define PCIE_VCTAR2_WRR_WEIGHT_VC6 0x00FF0000 /* WRR Weight for VC6 */ ++#define PCIE_VCTAR2_WRR_WEIGHT_VC7 0xFF000000 /* WRR Weight for VC7 */ ++ ++/* VC0 Posted Receive Queue Control Register */ ++#define PCIE_VC0_PRQCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x748) ++#define PCIE_VC0_PRQCR_P_DATA_CREDITS 0x00000FFF /* VC0 Posted Data Credits */ ++#define PCIE_VC0_PRQCR_P_DATA_CREDITS_S 0 ++#define PCIE_VC0_PRQCR_P_HDR_CREDITS 0x000FF000 /* VC0 Posted Header Credits */ ++#define PCIE_VC0_PRQCR_P_HDR_CREDITS_S 12 ++#define PCIE_VC0_PRQCR_P_TLP_QUEUE_MODE 0x00E00000 /* VC0 Posted TLP Queue Mode */ ++#define PCIE_VC0_PRQCR_P_TLP_QUEUE_MODE_S 20 ++#define PCIE_VC0_PRQCR_TLP_RELAX_ORDER 0x40000000 /* TLP Type Ordering for VC0 */ ++#define PCIE_VC0_PRQCR_VC_STRICT_ORDER 0x80000000 /* VC0 Ordering for Receive Queues */ ++ ++/* VC0 Non-Posted Receive Queue Control */ ++#define PCIE_VC0_NPRQCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x74C) ++#define PCIE_VC0_NPRQCR_NP_DATA_CREDITS 0x00000FFF /* VC0 Non-Posted Data Credits */ ++#define PCIE_VC0_NPRQCR_NP_DATA_CREDITS_S 0 ++#define PCIE_VC0_NPRQCR_NP_HDR_CREDITS 0x000FF000 /* VC0 Non-Posted Header Credits */ ++#define PCIE_VC0_NPRQCR_NP_HDR_CREDITS_S 12 ++#define PCIE_VC0_NPRQCR_NP_TLP_QUEUE_MODE 0x00E00000 /* VC0 Non-Posted TLP Queue Mode */ ++#define PCIE_VC0_NPRQCR_NP_TLP_QUEUE_MODE_S 20 ++ ++/* VC0 Completion Receive Queue Control */ ++#define PCIE_VC0_CRQCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x750) ++#define PCIE_VC0_CRQCR_CPL_DATA_CREDITS 0x00000FFF /* VC0 Completion TLP Queue Mode */ ++#define PCIE_VC0_CRQCR_CPL_DATA_CREDITS_S 0 ++#define PCIE_VC0_CRQCR_CPL_HDR_CREDITS 0x000FF000 /* VC0 Completion Header Credits */ ++#define PCIE_VC0_CRQCR_CPL_HDR_CREDITS_S 12 ++#define PCIE_VC0_CRQCR_CPL_TLP_QUEUE_MODE 0x00E00000 /* VC0 Completion Data Credits */ ++#define PCIE_VC0_CRQCR_CPL_TLP_QUEUE_MODE_S 21 ++ ++/* Applicable to the above three registers */ ++enum { ++ PCIE_VC0_TLP_QUEUE_MODE_STORE_FORWARD = 1, ++ PCIE_VC0_TLP_QUEUE_MODE_CUT_THROUGH = 2, ++ PCIE_VC0_TLP_QUEUE_MODE_BYPASS = 4, ++}; ++ ++/* VC0 Posted Buffer Depth Register */ ++#define PCIE_VC0_PBD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7A8) ++#define PCIE_VC0_PBD_P_DATA_QUEUE_ENTRIES 0x00003FFF /* VC0 Posted Data Queue Depth */ ++#define PCIE_VC0_PBD_P_DATA_QUEUE_ENTRIES_S 0 ++#define PCIE_VC0_PBD_P_HDR_QUEUE_ENTRIES 0x03FF0000 /* VC0 Posted Header Queue Depth */ ++#define PCIE_VC0_PBD_P_HDR_QUEUE_ENTRIES_S 16 ++ ++/* VC0 Non-Posted Buffer Depth Register */ ++#define PCIE_VC0_NPBD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7AC) ++#define PCIE_VC0_NPBD_NP_DATA_QUEUE_ENTRIES 0x00003FFF /* VC0 Non-Posted Data Queue Depth */ ++#define PCIE_VC0_NPBD_NP_DATA_QUEUE_ENTRIES_S 0 ++#define PCIE_VC0_NPBD_NP_HDR_QUEUE_ENTRIES 0x03FF0000 /* VC0 Non-Posted Header Queue Depth */ ++#define PCIE_VC0_NPBD_NP_HDR_QUEUE_ENTRIES_S 16 ++ ++/* VC0 Completion Buffer Depth Register */ ++#define PCIE_VC0_CBD(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x7B0) ++#define PCIE_VC0_CBD_CPL_DATA_QUEUE_ENTRIES 0x00003FFF /* C0 Completion Data Queue Depth */ ++#define PCIE_VC0_CBD_CPL_DATA_QUEUE_ENTRIES_S 0 ++#define PCIE_VC0_CBD_CPL_HDR_QUEUE_ENTRIES 0x03FF0000 /* VC0 Completion Header Queue Depth */ ++#define PCIE_VC0_CBD_CPL_HDR_QUEUE_ENTRIES_S 16 ++ ++/* PHY Status Register, all zeros in VR9 */ ++#define PCIE_PHYSR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x810) ++ ++/* PHY Control Register, all zeros in VR9 */ ++#define PCIE_PHYCR(X) (volatile u32*)(PCIE_RC_PORT_TO_BASE(X) + 0x814) ++ ++/* ++ * PCIe PDI PHY register definition, suppose all the following ++ * stuff is confidential. ++ * XXX, detailed bit definition ++ */ ++#define PCIE_PHY_PLL_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x22 << 1)) ++#define PCIE_PHY_PLL_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x23 << 1)) ++#define PCIE_PHY_PLL_CTRL3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x24 << 1)) ++#define PCIE_PHY_PLL_CTRL4(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x25 << 1)) ++#define PCIE_PHY_PLL_CTRL5(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x26 << 1)) ++#define PCIE_PHY_PLL_CTRL6(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x27 << 1)) ++#define PCIE_PHY_PLL_CTRL7(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x28 << 1)) ++#define PCIE_PHY_PLL_A_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x29 << 1)) ++#define PCIE_PHY_PLL_A_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x2A << 1)) ++#define PCIE_PHY_PLL_A_CTRL3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x2B << 1)) ++#define PCIE_PHY_PLL_STATUS(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x2C << 1)) ++ ++#define PCIE_PHY_TX1_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x30 << 1)) ++#define PCIE_PHY_TX1_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x31 << 1)) ++#define PCIE_PHY_TX1_CTRL3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x32 << 1)) ++#define PCIE_PHY_TX1_A_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x33 << 1)) ++#define PCIE_PHY_TX1_A_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x34 << 1)) ++#define PCIE_PHY_TX1_MOD1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x35 << 1)) ++#define PCIE_PHY_TX1_MOD2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x36 << 1)) ++#define PCIE_PHY_TX1_MOD3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x37 << 1)) ++ ++#define PCIE_PHY_TX2_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x38 << 1)) ++#define PCIE_PHY_TX2_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x39 << 1)) ++#define PCIE_PHY_TX2_A_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3B << 1)) ++#define PCIE_PHY_TX2_A_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3C << 1)) ++#define PCIE_PHY_TX2_MOD1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3D << 1)) ++#define PCIE_PHY_TX2_MOD2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3E << 1)) ++#define PCIE_PHY_TX2_MOD3(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x3F << 1)) ++ ++#define PCIE_PHY_RX1_CTRL1(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x50 << 1)) ++#define PCIE_PHY_RX1_CTRL2(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x51 << 1)) ++#define PCIE_PHY_RX1_CDR(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x52 << 1)) ++#define PCIE_PHY_RX1_EI(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x53 << 1)) ++#define PCIE_PHY_RX1_A_CTRL(X) (PCIE_PHY_PORT_TO_BASE(X) + (0x55 << 1)) ++ ++/* Interrupt related stuff */ ++#define PCIE_LEGACY_DISABLE 0 ++#define PCIE_LEGACY_INTA 1 ++#define PCIE_LEGACY_INTB 2 ++#define PCIE_LEGACY_INTC 3 ++#define PCIE_LEGACY_INTD 4 ++#define PCIE_LEGACY_INT_MAX PCIE_LEGACY_INTD ++ ++#define PCIE_IRQ_LOCK(lock) do { \ ++ unsigned long flags; \ ++ spin_lock_irqsave(&(lock), flags); ++#define PCIE_IRQ_UNLOCK(lock) \ ++ spin_unlock_irqrestore(&(lock), flags); \ ++} while (0) ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) ++#define IRQF_SHARED SA_SHIRQ ++#endif ++ ++#define PCIE_MSG_MSI 0x00000001 ++#define PCIE_MSG_ISR 0x00000002 ++#define PCIE_MSG_FIXUP 0x00000004 ++#define PCIE_MSG_READ_CFG 0x00000008 ++#define PCIE_MSG_WRITE_CFG 0x00000010 ++#define PCIE_MSG_CFG (PCIE_MSG_READ_CFG | PCIE_MSG_WRITE_CFG) ++#define PCIE_MSG_REG 0x00000020 ++#define PCIE_MSG_INIT 0x00000040 ++#define PCIE_MSG_ERR 0x00000080 ++#define PCIE_MSG_PHY 0x00000100 ++#define PCIE_MSG_ANY 0x000001ff ++ ++#define IFX_PCIE_PORT0 0 ++#define IFX_PCIE_PORT1 1 ++ ++#ifdef CONFIG_IFX_PCIE_2ND_CORE ++#define IFX_PCIE_CORE_NR 2 ++#else ++#define IFX_PCIE_CORE_NR 1 ++#endif ++ ++//#define IFX_PCIE_ERROR_INT ++ ++//#define IFX_PCIE_DBG ++ ++#if defined(IFX_PCIE_DBG) ++#define IFX_PCIE_PRINT(_m, _fmt, args...) do { \ ++ if (g_pcie_debug_flag & (_m)) { \ ++ ifx_pcie_debug((_fmt), ##args); \ ++ } \ ++} while (0) ++ ++#define INLINE ++#else ++#define IFX_PCIE_PRINT(_m, _fmt, args...) \ ++ do {} while(0) ++#define INLINE inline ++#endif ++ ++struct ifx_pci_controller { ++ struct pci_controller pcic; ++ ++ /* RC specific, per host bus information */ ++ u32 port; /* Port index, 0 -- 1st core, 1 -- 2nd core */ ++}; ++ ++typedef struct ifx_pcie_ir_irq { ++ const unsigned int irq; ++ const char name[16]; ++}ifx_pcie_ir_irq_t; ++ ++typedef struct ifx_pcie_legacy_irq{ ++ const u32 irq_bit; ++ const int irq; ++}ifx_pcie_legacy_irq_t; ++ ++typedef struct ifx_pcie_irq { ++ ifx_pcie_ir_irq_t ir_irq; ++ ifx_pcie_legacy_irq_t legacy_irq[PCIE_LEGACY_INT_MAX]; ++}ifx_pcie_irq_t; ++ ++extern u32 g_pcie_debug_flag; ++extern void ifx_pcie_debug(const char *fmt, ...); ++extern void pcie_phy_clock_mode_setup(int pcie_port); ++extern void pcie_msi_pic_init(int pcie_port); ++extern u32 ifx_pcie_bus_enum_read_hack(int where, u32 value); ++extern u32 ifx_pcie_bus_enum_write_hack(int where, u32 value); ++ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define IFX_PCIE_GPIO_RESET 38 ++#define IFX_REG_R32 ltq_r32 ++#define IFX_REG_W32 ltq_w32 ++#define CONFIG_IFX_PCIE_HW_SWAP ++#define IFX_RCU_AHB_ENDIAN ((volatile u32*)(IFX_RCU + 0x004C)) ++#define IFX_RCU_RST_REQ ((volatile u32*)(IFX_RCU + 0x0010)) ++#define IFX_RCU_AHB_BE_PCIE_PDI 0x00000080 /* Configure PCIE PDI module in big endian*/ ++ ++#define IFX_RCU (KSEG1 | 0x1F203000) ++#define IFX_RCU_AHB_BE_PCIE_M 0x00000001 /* Configure AHB master port that connects to PCIe RC in big endian */ ++#define IFX_RCU_AHB_BE_PCIE_S 0x00000010 /* Configure AHB slave port that connects to PCIe RC in little endian */ ++#define IFX_RCU_AHB_BE_XBAR_M 0x00000002 /* Configure AHB master port that connects to XBAR in big endian */ ++#define CONFIG_IFX_PCIE_PHY_36MHZ_MODE ++ ++#define IFX_PMU1_MODULE_PCIE_PHY (0) ++#define IFX_PMU1_MODULE_PCIE_CTRL (1) ++#define IFX_PMU1_MODULE_PDI (4) ++#define IFX_PMU1_MODULE_MSI (5) ++ ++#define IFX_PMU_MODULE_PCIE_L0_CLK (31) ++ ++ ++static inline void pcie_ep_gpio_rst_init(int pcie_port) ++{ ++} ++ ++static inline void pcie_ahb_pmu_setup(void) ++{ ++ struct clk *clk; ++ clk = clk_get_sys("ltq_pcie", "ahb"); ++ clk_enable(clk); ++ //ltq_pmu_enable(PMU_AHBM | PMU_AHBS); ++} ++ ++static inline void pcie_rcu_endian_setup(int pcie_port) ++{ ++ u32 reg; ++ ++ reg = IFX_REG_R32(IFX_RCU_AHB_ENDIAN); ++#ifdef CONFIG_IFX_PCIE_HW_SWAP ++ reg |= IFX_RCU_AHB_BE_PCIE_M; ++ reg |= IFX_RCU_AHB_BE_PCIE_S; ++ reg &= ~IFX_RCU_AHB_BE_XBAR_M; ++#else ++ reg |= IFX_RCU_AHB_BE_PCIE_M; ++ reg &= ~IFX_RCU_AHB_BE_PCIE_S; ++ reg &= ~IFX_RCU_AHB_BE_XBAR_M; ++#endif /* CONFIG_IFX_PCIE_HW_SWAP */ ++ IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); ++ IFX_PCIE_PRINT(PCIE_MSG_REG, "%s IFX_RCU_AHB_ENDIAN: 0x%08x\n", __func__, IFX_REG_R32(IFX_RCU_AHB_ENDIAN)); ++} ++ ++static inline void pcie_phy_pmu_enable(int pcie_port) ++{ ++ struct clk *clk; ++ clk = clk_get_sys("ltq_pcie", "phy"); ++ clk_enable(clk); ++ //ltq_pmu1_enable(1<PCIe and PDI endianness */ ++ reg |= IFX_RCU_AHB_BE_PCIE_PDI; ++ IFX_REG_W32(reg, IFX_RCU_AHB_ENDIAN); ++} ++ ++static inline void pcie_pdi_pmu_enable(int pcie_port) ++{ ++ struct clk *clk; ++ clk = clk_get_sys("ltq_pcie", "pdi"); ++ clk_enable(clk); ++ //ltq_pmu1_enable(1< 1) { ++ tbus_number -= pcibios_1st_host_bus_nr(); ++ } ++#endif /* CONFIG_PCI_LANTIQ */ ++ return tbus_number; ++} ++ ++static inline u32 ++ifx_pcie_bus_enum_hack(struct pci_bus *bus, u32 devfn, int where, u32 value, int pcie_port, int read) ++{ ++ struct pci_dev *pdev; ++ u32 tvalue = value; ++ ++ /* Sanity check */ ++ pdev = pci_get_slot(bus, devfn); ++ if (pdev == NULL) { ++ return tvalue; ++ } ++ ++ /* Only care about PCI bridge */ ++ if (pdev->hdr_type != PCI_HEADER_TYPE_BRIDGE) { ++ return tvalue; ++ } ++ ++ if (read) { /* Read hack */ ++ #ifdef CONFIG_PCI_LANTIQ ++ if (pcibios_host_nr() > 1) { ++ tvalue = ifx_pcie_bus_enum_read_hack(where, tvalue); ++ } ++ #endif /* CONFIG_PCI_LANTIQ */ ++ } ++ else { /* Write hack */ ++ #ifdef CONFIG_PCI_LANTIQ ++ if (pcibios_host_nr() > 1) { ++ tvalue = ifx_pcie_bus_enum_write_hack(where, tvalue); ++ } ++ #endif ++ } ++ return tvalue; ++} ++ ++#endif /* IFXMIPS_PCIE_VR9_H */ ++ +--- a/drivers/pci/pcie/aer/Kconfig ++++ b/drivers/pci/pcie/aer/Kconfig +@@ -19,6 +19,7 @@ config PCIEAER + config PCIE_ECRC + bool "PCI Express ECRC settings control" + depends on PCIEAER ++ default n + help + Used to override firmware/bios settings for PCI Express ECRC + (transaction layer end-to-end CRC checking). +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -1300,6 +1300,8 @@ void pci_walk_bus(struct pci_bus *top, i + void *userdata); + int pci_cfg_space_size(struct pci_dev *dev); + unsigned char pci_bus_max_busnr(struct pci_bus *bus); ++int pcibios_host_nr(void); ++int pcibios_1st_host_bus_nr(void); + void pci_setup_bridge(struct pci_bus *bus); + resource_size_t pcibios_window_alignment(struct pci_bus *bus, + unsigned long type); +--- a/include/linux/pci_ids.h ++++ b/include/linux/pci_ids.h +@@ -1061,6 +1061,12 @@ + #define PCI_DEVICE_ID_SGI_LITHIUM 0x1002 + #define PCI_DEVICE_ID_SGI_IOC4 0x100a + ++#define PCI_VENDOR_ID_INFINEON 0x15D1 ++#define PCI_DEVICE_ID_INFINEON_DANUBE 0x000F ++#define PCI_DEVICE_ID_INFINEON_PCIE 0x0011 ++#define PCI_VENDOR_ID_LANTIQ 0x1BEF ++#define PCI_DEVICE_ID_LANTIQ_PCIE 0x0011 ++ + #define PCI_VENDOR_ID_WINBOND 0x10ad + #define PCI_DEVICE_ID_WINBOND_82C105 0x0105 + #define PCI_DEVICE_ID_WINBOND_83C553 0x0565 diff --git a/target/linux/lantiq/patches-4.14/0004-MIPS-lantiq-add-atm-hack.patch b/target/linux/lantiq/patches-4.14/0004-MIPS-lantiq-add-atm-hack.patch new file mode 100644 index 000000000..2c73cec55 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0004-MIPS-lantiq-add-atm-hack.patch @@ -0,0 +1,499 @@ +From 9afadf01b1be371ee88491819aa67364684461f9 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Fri, 3 Aug 2012 10:27:25 +0200 +Subject: [PATCH 04/36] MIPS: lantiq: add atm hack + +Signed-off-by: John Crispin +--- + arch/mips/include/asm/mach-lantiq/lantiq_atm.h | 196 +++++++++++++++++++++++ + arch/mips/include/asm/mach-lantiq/lantiq_ptm.h | 203 ++++++++++++++++++++++++ + arch/mips/lantiq/irq.c | 2 + + arch/mips/mm/cache.c | 2 + + include/uapi/linux/atm.h | 6 + + net/atm/common.c | 6 + + net/atm/proc.c | 2 +- + 7 files changed, 416 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_atm.h + create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_ptm.h + +--- /dev/null ++++ b/arch/mips/include/asm/mach-lantiq/lantiq_atm.h +@@ -0,0 +1,196 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifx_atm.h ++** PROJECT : UEIP ++** MODULES : ATM ++** ++** DATE : 17 Jun 2009 ++** AUTHOR : Xu Liang ++** DESCRIPTION : Global ATM driver header file ++** COPYRIGHT : Copyright (c) 2006 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** ++** HISTORY ++** $Date $Author $Comment ++** 07 JUL 2009 Xu Liang Init Version ++*******************************************************************************/ ++ ++#ifndef IFX_ATM_H ++#define IFX_ATM_H ++ ++ ++ ++/*! ++ \defgroup IFX_ATM UEIP Project - ATM driver module ++ \brief UEIP Project - ATM driver module, support Danube, Amazon-SE, AR9, VR9. ++ */ ++ ++/*! ++ \defgroup IFX_ATM_IOCTL IOCTL Commands ++ \ingroup IFX_ATM ++ \brief IOCTL Commands used by user application. ++ */ ++ ++/*! ++ \defgroup IFX_ATM_STRUCT Structures ++ \ingroup IFX_ATM ++ \brief Structures used by user application. ++ */ ++ ++/*! ++ \file ifx_atm.h ++ \ingroup IFX_ATM ++ \brief ATM driver header file ++ */ ++ ++ ++ ++/* ++ * #################################### ++ * Definition ++ * #################################### ++ */ ++ ++/*! ++ \addtogroup IFX_ATM_STRUCT ++ */ ++/*@{*/ ++ ++/* ++ * ATM MIB ++ */ ++ ++/*! ++ \struct atm_cell_ifEntry_t ++ \brief Structure used for Cell Level MIB Counters. ++ ++ User application use this structure to call IOCTL command "PPE_ATM_MIB_CELL". ++ */ ++typedef struct { ++ __u32 ifHCInOctets_h; /*!< byte counter of ingress cells (upper 32 bits, total 64 bits) */ ++ __u32 ifHCInOctets_l; /*!< byte counter of ingress cells (lower 32 bits, total 64 bits) */ ++ __u32 ifHCOutOctets_h; /*!< byte counter of egress cells (upper 32 bits, total 64 bits) */ ++ __u32 ifHCOutOctets_l; /*!< byte counter of egress cells (lower 32 bits, total 64 bits) */ ++ __u32 ifInErrors; /*!< counter of error ingress cells */ ++ __u32 ifInUnknownProtos; /*!< counter of unknown ingress cells */ ++ __u32 ifOutErrors; /*!< counter of error egress cells */ ++} atm_cell_ifEntry_t; ++ ++/*! ++ \struct atm_aal5_ifEntry_t ++ \brief Structure used for AAL5 Frame Level MIB Counters. ++ ++ User application use this structure to call IOCTL command "PPE_ATM_MIB_AAL5". ++ */ ++typedef struct { ++ __u32 ifHCInOctets_h; /*!< byte counter of ingress packets (upper 32 bits, total 64 bits) */ ++ __u32 ifHCInOctets_l; /*!< byte counter of ingress packets (lower 32 bits, total 64 bits) */ ++ __u32 ifHCOutOctets_h; /*!< byte counter of egress packets (upper 32 bits, total 64 bits) */ ++ __u32 ifHCOutOctets_l; /*!< byte counter of egress packets (lower 32 bits, total 64 bits) */ ++ __u32 ifInUcastPkts; /*!< counter of ingress packets */ ++ __u32 ifOutUcastPkts; /*!< counter of egress packets */ ++ __u32 ifInErrors; /*!< counter of error ingress packets */ ++ __u32 ifInDiscards; /*!< counter of dropped ingress packets */ ++ __u32 ifOutErros; /*!< counter of error egress packets */ ++ __u32 ifOutDiscards; /*!< counter of dropped egress packets */ ++} atm_aal5_ifEntry_t; ++ ++/*! ++ \struct atm_aal5_vcc_t ++ \brief Structure used for per PVC AAL5 Frame Level MIB Counters. ++ ++ This structure is a part of structure "atm_aal5_vcc_x_t". ++ */ ++typedef struct { ++ __u32 aal5VccCrcErrors; /*!< counter of ingress packets with CRC error */ ++ __u32 aal5VccSarTimeOuts; /*!< counter of ingress packets with Re-assemble timeout */ //no timer support yet ++ __u32 aal5VccOverSizedSDUs; /*!< counter of oversized ingress packets */ ++} atm_aal5_vcc_t; ++ ++/*! ++ \struct atm_aal5_vcc_x_t ++ \brief Structure used for per PVC AAL5 Frame Level MIB Counters. ++ ++ User application use this structure to call IOCTL command "PPE_ATM_MIB_VCC". ++ */ ++typedef struct { ++ int vpi; /*!< VPI of the VCC to get MIB counters */ ++ int vci; /*!< VCI of the VCC to get MIB counters */ ++ atm_aal5_vcc_t mib_vcc; /*!< structure to get MIB counters */ ++} atm_aal5_vcc_x_t; ++ ++/*@}*/ ++ ++ ++ ++/* ++ * #################################### ++ * IOCTL ++ * #################################### ++ */ ++ ++/*! ++ \addtogroup IFX_ATM_IOCTL ++ */ ++/*@{*/ ++ ++/* ++ * ioctl Command ++ */ ++/*! ++ \brief ATM IOCTL Magic Number ++ */ ++#define PPE_ATM_IOC_MAGIC 'o' ++/*! ++ \brief ATM IOCTL Command - Get Cell Level MIB Counters ++ ++ This command is obsolete. User can get cell level MIB from DSL API. ++ This command uses structure "atm_cell_ifEntry_t" as parameter for output of MIB counters. ++ */ ++#define PPE_ATM_MIB_CELL _IOW(PPE_ATM_IOC_MAGIC, 0, atm_cell_ifEntry_t) ++/*! ++ \brief ATM IOCTL Command - Get AAL5 Level MIB Counters ++ ++ Get AAL5 packet counters. ++ This command uses structure "atm_aal5_ifEntry_t" as parameter for output of MIB counters. ++ */ ++#define PPE_ATM_MIB_AAL5 _IOW(PPE_ATM_IOC_MAGIC, 1, atm_aal5_ifEntry_t) ++/*! ++ \brief ATM IOCTL Command - Get Per PVC MIB Counters ++ ++ Get AAL5 packet counters for each PVC. ++ This command uses structure "atm_aal5_vcc_x_t" as parameter for input of VPI/VCI information and output of MIB counters. ++ */ ++#define PPE_ATM_MIB_VCC _IOWR(PPE_ATM_IOC_MAGIC, 2, atm_aal5_vcc_x_t) ++/*! ++ \brief Total Number of ATM IOCTL Commands ++ */ ++#define PPE_ATM_IOC_MAXNR 3 ++ ++/*@}*/ ++ ++ ++ ++/* ++ * #################################### ++ * API ++ * #################################### ++ */ ++ ++#ifdef __KERNEL__ ++struct port_cell_info { ++ unsigned int port_num; ++ unsigned int tx_link_rate[2]; ++}; ++#endif ++ ++ ++ ++#endif // IFX_ATM_H ++ +--- /dev/null ++++ b/arch/mips/include/asm/mach-lantiq/lantiq_ptm.h +@@ -0,0 +1,203 @@ ++/****************************************************************************** ++** ++** FILE NAME : ifx_ptm.h ++** PROJECT : UEIP ++** MODULES : PTM ++** ++** DATE : 17 Jun 2009 ++** AUTHOR : Xu Liang ++** DESCRIPTION : Global PTM driver header file ++** COPYRIGHT : Copyright (c) 2006 ++** Infineon Technologies AG ++** Am Campeon 1-12, 85579 Neubiberg, Germany ++** ++** This program is free software; you can redistribute it and/or modify ++** it under the terms of the GNU General Public License as published by ++** the Free Software Foundation; either version 2 of the License, or ++** (at your option) any later version. ++** ++** HISTORY ++** $Date $Author $Comment ++** 07 JUL 2009 Xu Liang Init Version ++*******************************************************************************/ ++ ++#ifndef IFX_PTM_H ++#define IFX_PTM_H ++ ++ ++ ++/*! ++ \defgroup IFX_PTM UEIP Project - PTM driver module ++ \brief UEIP Project - PTM driver module, support Danube, Amazon-SE, AR9, VR9. ++ */ ++ ++/*! ++ \defgroup IFX_PTM_IOCTL IOCTL Commands ++ \ingroup IFX_PTM ++ \brief IOCTL Commands used by user application. ++ */ ++ ++/*! ++ \defgroup IFX_PTM_STRUCT Structures ++ \ingroup IFX_PTM ++ \brief Structures used by user application. ++ */ ++ ++/*! ++ \file ifx_ptm.h ++ \ingroup IFX_PTM ++ \brief PTM driver header file ++ */ ++ ++ ++ ++/* ++ * #################################### ++ * Definition ++ * #################################### ++ */ ++ ++ ++ ++/* ++ * #################################### ++ * IOCTL ++ * #################################### ++ */ ++ ++/*! ++ \addtogroup IFX_PTM_IOCTL ++ */ ++/*@{*/ ++ ++/* ++ * ioctl Command ++ */ ++/*! ++ \brief PTM IOCTL Command - Get codeword MIB counters. ++ ++ This command uses structure "PTM_CW_IF_ENTRY_T" to get codeword level MIB counters. ++ */ ++#define IFX_PTM_MIB_CW_GET SIOCDEVPRIVATE + 1 ++/*! ++ \brief PTM IOCTL Command - Get packet MIB counters. ++ ++ This command uses structure "PTM_FRAME_MIB_T" to get packet level MIB counters. ++ */ ++#define IFX_PTM_MIB_FRAME_GET SIOCDEVPRIVATE + 2 ++/*! ++ \brief PTM IOCTL Command - Get firmware configuration (CRC). ++ ++ This command uses structure "IFX_PTM_CFG_T" to get firmware configuration (CRC). ++ */ ++#define IFX_PTM_CFG_GET SIOCDEVPRIVATE + 3 ++/*! ++ \brief PTM IOCTL Command - Set firmware configuration (CRC). ++ ++ This command uses structure "IFX_PTM_CFG_T" to set firmware configuration (CRC). ++ */ ++#define IFX_PTM_CFG_SET SIOCDEVPRIVATE + 4 ++/*! ++ \brief PTM IOCTL Command - Program priority value to TX queue mapping. ++ ++ This command uses structure "IFX_PTM_PRIO_Q_MAP_T" to program priority value to TX queue mapping. ++ */ ++#define IFX_PTM_MAP_PKT_PRIO_TO_Q SIOCDEVPRIVATE + 14 ++ ++/*@}*/ ++ ++ ++/*! ++ \addtogroup IFX_PTM_STRUCT ++ */ ++/*@{*/ ++ ++/* ++ * ioctl Data Type ++ */ ++ ++/*! ++ \typedef PTM_CW_IF_ENTRY_T ++ \brief Wrapping of structure "ptm_cw_ifEntry_t". ++ */ ++/*! ++ \struct ptm_cw_ifEntry_t ++ \brief Structure used for CodeWord level MIB counters. ++ */ ++typedef struct ptm_cw_ifEntry_t { ++ uint32_t ifRxNoIdleCodewords; /*!< output, number of ingress user codeword */ ++ uint32_t ifRxIdleCodewords; /*!< output, number of ingress idle codeword */ ++ uint32_t ifRxCodingViolation; /*!< output, number of error ingress codeword */ ++ uint32_t ifTxNoIdleCodewords; /*!< output, number of egress user codeword */ ++ uint32_t ifTxIdleCodewords; /*!< output, number of egress idle codeword */ ++} PTM_CW_IF_ENTRY_T; ++ ++/*! ++ \typedef PTM_FRAME_MIB_T ++ \brief Wrapping of structure "ptm_frame_mib_t". ++ */ ++/*! ++ \struct ptm_frame_mib_t ++ \brief Structure used for packet level MIB counters. ++ */ ++typedef struct ptm_frame_mib_t { ++ uint32_t RxCorrect; /*!< output, number of ingress packet */ ++ uint32_t TC_CrcError; /*!< output, number of egress packet with CRC error */ ++ uint32_t RxDropped; /*!< output, number of dropped ingress packet */ ++ uint32_t TxSend; /*!< output, number of egress packet */ ++} PTM_FRAME_MIB_T; ++ ++/*! ++ \typedef IFX_PTM_CFG_T ++ \brief Wrapping of structure "ptm_cfg_t". ++ */ ++/*! ++ \struct ptm_cfg_t ++ \brief Structure used for ETH/TC CRC configuration. ++ */ ++typedef struct ptm_cfg_t { ++ uint32_t RxEthCrcPresent; /*!< input/output, ingress packet has ETH CRC */ ++ uint32_t RxEthCrcCheck; /*!< input/output, check ETH CRC of ingress packet */ ++ uint32_t RxTcCrcCheck; /*!< input/output, check TC CRC of ingress codeword */ ++ uint32_t RxTcCrcLen; /*!< input/output, length of TC CRC of ingress codeword */ ++ uint32_t TxEthCrcGen; /*!< input/output, generate ETH CRC for egress packet */ ++ uint32_t TxTcCrcGen; /*!< input/output, generate TC CRC for egress codeword */ ++ uint32_t TxTcCrcLen; /*!< input/output, length of TC CRC of egress codeword */ ++} IFX_PTM_CFG_T; ++ ++/*! ++ \typedef IFX_PTM_PRIO_Q_MAP_T ++ \brief Wrapping of structure "ppe_prio_q_map". ++ */ ++/*! ++ \struct ppe_prio_q_map ++ \brief Structure used for Priority Value to TX Queue mapping. ++ */ ++typedef struct ppe_prio_q_map { ++ int pkt_prio; ++ int qid; ++ int vpi; // ignored in eth interface ++ int vci; // ignored in eth interface ++} IFX_PTM_PRIO_Q_MAP_T; ++ ++/*@}*/ ++ ++ ++ ++/* ++ * #################################### ++ * API ++ * #################################### ++ */ ++ ++#ifdef __KERNEL__ ++struct port_cell_info { ++ unsigned int port_num; ++ unsigned int tx_link_rate[2]; ++}; ++#endif ++ ++ ++ ++#endif // IFX_PTM_H ++ +--- a/arch/mips/lantiq/irq.c ++++ b/arch/mips/lantiq/irq.c +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -96,6 +97,7 @@ void ltq_mask_and_ack_irq(struct irq_dat + ltq_icu_w32(im, ltq_icu_r32(im, ier) & ~BIT(offset), ier); + ltq_icu_w32(im, BIT(offset), isr); + } ++EXPORT_SYMBOL(ltq_mask_and_ack_irq); + + static void ltq_ack_irq(struct irq_data *d) + { +--- a/arch/mips/mm/cache.c ++++ b/arch/mips/mm/cache.c +@@ -64,6 +64,8 @@ void (*_dma_cache_wback)(unsigned long s + void (*_dma_cache_inv)(unsigned long start, unsigned long size); + + EXPORT_SYMBOL(_dma_cache_wback_inv); ++EXPORT_SYMBOL(_dma_cache_wback); ++EXPORT_SYMBOL(_dma_cache_inv); + + #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */ + +--- a/include/uapi/linux/atm.h ++++ b/include/uapi/linux/atm.h +@@ -131,8 +131,14 @@ + #define ATM_ABR 4 + #define ATM_ANYCLASS 5 /* compatible with everything */ + ++#define ATM_VBR_NRT ATM_VBR ++#define ATM_VBR_RT 6 ++#define ATM_UBR_PLUS 7 ++#define ATM_GFR 8 ++ + #define ATM_MAX_PCR -1 /* maximum available PCR */ + ++ + struct atm_trafprm { + unsigned char traffic_class; /* traffic class (ATM_UBR, ...) */ + int max_pcr; /* maximum PCR in cells per second */ +--- a/net/atm/common.c ++++ b/net/atm/common.c +@@ -62,10 +62,16 @@ static void vcc_remove_socket(struct soc + write_unlock_irq(&vcc_sklist_lock); + } + ++struct sk_buff* (*ifx_atm_alloc_tx)(struct atm_vcc *, unsigned int) = NULL; ++EXPORT_SYMBOL(ifx_atm_alloc_tx); ++ + static bool vcc_tx_ready(struct atm_vcc *vcc, unsigned int size) + { + struct sock *sk = sk_atm(vcc); + ++ if (ifx_atm_alloc_tx != NULL) ++ return ifx_atm_alloc_tx(vcc, size); ++ + if (sk_wmem_alloc_get(sk) && !atm_may_send(vcc, size)) { + pr_debug("Sorry: wmem_alloc = %d, size = %d, sndbuf = %d\n", + sk_wmem_alloc_get(sk), size, sk->sk_sndbuf); +--- a/net/atm/proc.c ++++ b/net/atm/proc.c +@@ -155,7 +155,7 @@ static void *vcc_seq_next(struct seq_fil + static void pvc_info(struct seq_file *seq, struct atm_vcc *vcc) + { + static const char *const class_name[] = { +- "off", "UBR", "CBR", "VBR", "ABR"}; ++ "off","UBR","CBR","NTR-VBR","ABR","ANY","RT-VBR","UBR+","GFR"}; + static const char *const aal_name[] = { + "---", "1", "2", "3/4", /* 0- 3 */ + "???", "5", "???", "???", /* 4- 7 */ diff --git a/target/linux/lantiq/patches-4.14/0008-MIPS-lantiq-backport-old-timer-code.patch b/target/linux/lantiq/patches-4.14/0008-MIPS-lantiq-backport-old-timer-code.patch new file mode 100644 index 000000000..52e4cbeb1 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0008-MIPS-lantiq-backport-old-timer-code.patch @@ -0,0 +1,1034 @@ +From 94800350cb8d2f29dda2206b5e9a3772024ee168 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 7 Aug 2014 18:30:56 +0200 +Subject: [PATCH 08/36] MIPS: lantiq: backport old timer code + +Signed-off-by: John Crispin +--- + arch/mips/include/asm/mach-lantiq/lantiq_timer.h | 155 ++++ + arch/mips/lantiq/xway/Makefile | 2 +- + arch/mips/lantiq/xway/timer.c | 845 ++++++++++++++++++++++ + 3 files changed, 1001 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_timer.h + create mode 100644 arch/mips/lantiq/xway/timer.c + +--- /dev/null ++++ b/arch/mips/include/asm/mach-lantiq/lantiq_timer.h +@@ -0,0 +1,155 @@ ++#ifndef __DANUBE_GPTU_DEV_H__2005_07_26__10_19__ ++#define __DANUBE_GPTU_DEV_H__2005_07_26__10_19__ ++ ++ ++/****************************************************************************** ++ Copyright (c) 2002, Infineon Technologies. All rights reserved. ++ ++ No Warranty ++ Because the program is licensed free of charge, there is no warranty for ++ the program, to the extent permitted by applicable law. Except when ++ otherwise stated in writing the copyright holders and/or other parties ++ provide the program "as is" without warranty of any kind, either ++ expressed or implied, including, but not limited to, the implied ++ warranties of merchantability and fitness for a particular purpose. The ++ entire risk as to the quality and performance of the program is with ++ you. should the program prove defective, you assume the cost of all ++ necessary servicing, repair or correction. ++ ++ In no event unless required by applicable law or agreed to in writing ++ will any copyright holder, or any other party who may modify and/or ++ redistribute the program as permitted above, be liable to you for ++ damages, including any general, special, incidental or consequential ++ damages arising out of the use or inability to use the program ++ (including but not limited to loss of data or data being rendered ++ inaccurate or losses sustained by you or third parties or a failure of ++ the program to operate with any other programs), even if such holder or ++ other party has been advised of the possibility of such damages. ++******************************************************************************/ ++ ++ ++/* ++ * #################################### ++ * Definition ++ * #################################### ++ */ ++ ++/* ++ * Available Timer/Counter Index ++ */ ++#define TIMER(n, X) (n * 2 + (X ? 1 : 0)) ++#define TIMER_ANY 0x00 ++#define TIMER1A TIMER(1, 0) ++#define TIMER1B TIMER(1, 1) ++#define TIMER2A TIMER(2, 0) ++#define TIMER2B TIMER(2, 1) ++#define TIMER3A TIMER(3, 0) ++#define TIMER3B TIMER(3, 1) ++ ++/* ++ * Flag of Timer/Counter ++ * These flags specify the way in which timer is configured. ++ */ ++/* Bit size of timer/counter. */ ++#define TIMER_FLAG_16BIT 0x0000 ++#define TIMER_FLAG_32BIT 0x0001 ++/* Switch between timer and counter. */ ++#define TIMER_FLAG_TIMER 0x0000 ++#define TIMER_FLAG_COUNTER 0x0002 ++/* Stop or continue when overflowing/underflowing. */ ++#define TIMER_FLAG_ONCE 0x0000 ++#define TIMER_FLAG_CYCLIC 0x0004 ++/* Count up or counter down. */ ++#define TIMER_FLAG_UP 0x0000 ++#define TIMER_FLAG_DOWN 0x0008 ++/* Count on specific level or edge. */ ++#define TIMER_FLAG_HIGH_LEVEL_SENSITIVE 0x0000 ++#define TIMER_FLAG_LOW_LEVEL_SENSITIVE 0x0040 ++#define TIMER_FLAG_RISE_EDGE 0x0010 ++#define TIMER_FLAG_FALL_EDGE 0x0020 ++#define TIMER_FLAG_ANY_EDGE 0x0030 ++/* Signal is syncronous to module clock or not. */ ++#define TIMER_FLAG_UNSYNC 0x0000 ++#define TIMER_FLAG_SYNC 0x0080 ++/* Different interrupt handle type. */ ++#define TIMER_FLAG_NO_HANDLE 0x0000 ++#if defined(__KERNEL__) ++ #define TIMER_FLAG_CALLBACK_IN_IRQ 0x0100 ++#endif // defined(__KERNEL__) ++#define TIMER_FLAG_SIGNAL 0x0300 ++/* Internal clock source or external clock source */ ++#define TIMER_FLAG_INT_SRC 0x0000 ++#define TIMER_FLAG_EXT_SRC 0x1000 ++ ++ ++/* ++ * ioctl Command ++ */ ++#define GPTU_REQUEST_TIMER 0x01 /* General method to setup timer/counter. */ ++#define GPTU_FREE_TIMER 0x02 /* Free timer/counter. */ ++#define GPTU_START_TIMER 0x03 /* Start or resume timer/counter. */ ++#define GPTU_STOP_TIMER 0x04 /* Suspend timer/counter. */ ++#define GPTU_GET_COUNT_VALUE 0x05 /* Get current count value. */ ++#define GPTU_CALCULATE_DIVIDER 0x06 /* Calculate timer divider from given freq.*/ ++#define GPTU_SET_TIMER 0x07 /* Simplified method to setup timer. */ ++#define GPTU_SET_COUNTER 0x08 /* Simplified method to setup counter. */ ++ ++/* ++ * Data Type Used to Call ioctl ++ */ ++struct gptu_ioctl_param { ++ unsigned int timer; /* In command GPTU_REQUEST_TIMER, GPTU_SET_TIMER, and * ++ * GPTU_SET_COUNTER, this field is ID of expected * ++ * timer/counter. If it's zero, a timer/counter would * ++ * be dynamically allocated and ID would be stored in * ++ * this field. * ++ * In command GPTU_GET_COUNT_VALUE, this field is * ++ * ignored. * ++ * In other command, this field is ID of timer/counter * ++ * allocated. */ ++ unsigned int flag; /* In command GPTU_REQUEST_TIMER, GPTU_SET_TIMER, and * ++ * GPTU_SET_COUNTER, this field contains flags to * ++ * specify how to configure timer/counter. * ++ * In command GPTU_START_TIMER, zero indicate start * ++ * and non-zero indicate resume timer/counter. * ++ * In other command, this field is ignored. */ ++ unsigned long value; /* In command GPTU_REQUEST_TIMER, this field contains * ++ * init/reload value. * ++ * In command GPTU_SET_TIMER, this field contains * ++ * frequency (0.001Hz) of timer. * ++ * In command GPTU_GET_COUNT_VALUE, current count * ++ * value would be stored in this field. * ++ * In command GPTU_CALCULATE_DIVIDER, this field * ++ * contains frequency wanted, and after calculation, * ++ * divider would be stored in this field to overwrite * ++ * the frequency. * ++ * In other command, this field is ignored. */ ++ int pid; /* In command GPTU_REQUEST_TIMER and GPTU_SET_TIMER, * ++ * if signal is required, this field contains process * ++ * ID to which signal would be sent. * ++ * In other command, this field is ignored. */ ++ int sig; /* In command GPTU_REQUEST_TIMER and GPTU_SET_TIMER, * ++ * if signal is required, this field contains signal * ++ * number which would be sent. * ++ * In other command, this field is ignored. */ ++}; ++ ++/* ++ * #################################### ++ * Data Type ++ * #################################### ++ */ ++typedef void (*timer_callback)(unsigned long arg); ++ ++extern int lq_request_timer(unsigned int, unsigned int, unsigned long, unsigned long, unsigned long); ++extern int lq_free_timer(unsigned int); ++extern int lq_start_timer(unsigned int, int); ++extern int lq_stop_timer(unsigned int); ++extern int lq_reset_counter_flags(u32 timer, u32 flags); ++extern int lq_get_count_value(unsigned int, unsigned long *); ++extern u32 lq_cal_divider(unsigned long); ++extern int lq_set_timer(unsigned int, unsigned int, int, int, unsigned int, unsigned long, unsigned long); ++extern int lq_set_counter(unsigned int timer, unsigned int flag, ++ u32 reload, unsigned long arg1, unsigned long arg2); ++ ++#endif /* __DANUBE_GPTU_DEV_H__2005_07_26__10_19__ */ +--- a/arch/mips/lantiq/xway/Makefile ++++ b/arch/mips/lantiq/xway/Makefile +@@ -1,3 +1,9 @@ +-obj-y := prom.o sysctrl.o clk.o dma.o gptu.o dcdc.o ++obj-y := prom.o sysctrl.o clk.o dma.o dcdc.o ++ ++ifdef CONFIG_SOC_AMAZON_SE ++obj-y += gptu.o ++else ++obj-y += timer.o ++endif + + obj-y += vmmc.o +--- /dev/null ++++ b/arch/mips/lantiq/xway/timer.c +@@ -0,0 +1,846 @@ ++#ifndef CONFIG_SOC_AMAZON_SE ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "../clk.h" ++ ++#include ++#include ++#include ++ ++#define MAX_NUM_OF_32BIT_TIMER_BLOCKS 6 ++ ++#ifdef TIMER1A ++#define FIRST_TIMER TIMER1A ++#else ++#define FIRST_TIMER 2 ++#endif ++ ++/* ++ * GPTC divider is set or not. ++ */ ++#define GPTU_CLC_RMC_IS_SET 0 ++ ++/* ++ * Timer Interrupt (IRQ) ++ */ ++/* Must be adjusted when ICU driver is available */ ++#define TIMER_INTERRUPT (INT_NUM_IM3_IRL0 + 22) ++ ++/* ++ * Bits Operation ++ */ ++#define GET_BITS(x, msb, lsb) \ ++ (((x) & ((1 << ((msb) + 1)) - 1)) >> (lsb)) ++#define SET_BITS(x, msb, lsb, value) \ ++ (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | \ ++ (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb))) ++ ++/* ++ * GPTU Register Mapping ++ */ ++#define LQ_GPTU (KSEG1 + 0x1E100A00) ++#define LQ_GPTU_CLC ((volatile u32 *)(LQ_GPTU + 0x0000)) ++#define LQ_GPTU_ID ((volatile u32 *)(LQ_GPTU + 0x0008)) ++#define LQ_GPTU_CON(n, X) ((volatile u32 *)(LQ_GPTU + 0x0010 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */ ++#define LQ_GPTU_RUN(n, X) ((volatile u32 *)(LQ_GPTU + 0x0018 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */ ++#define LQ_GPTU_RELOAD(n, X) ((volatile u32 *)(LQ_GPTU + 0x0020 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */ ++#define LQ_GPTU_COUNT(n, X) ((volatile u32 *)(LQ_GPTU + 0x0028 + ((X) * 4) + ((n) - 1) * 0x0020)) /* X must be either A or B */ ++#define LQ_GPTU_IRNEN ((volatile u32 *)(LQ_GPTU + 0x00F4)) ++#define LQ_GPTU_IRNICR ((volatile u32 *)(LQ_GPTU + 0x00F8)) ++#define LQ_GPTU_IRNCR ((volatile u32 *)(LQ_GPTU + 0x00FC)) ++ ++/* ++ * Clock Control Register ++ */ ++#define GPTU_CLC_SMC GET_BITS(*LQ_GPTU_CLC, 23, 16) ++#define GPTU_CLC_RMC GET_BITS(*LQ_GPTU_CLC, 15, 8) ++#define GPTU_CLC_FSOE (*LQ_GPTU_CLC & (1 << 5)) ++#define GPTU_CLC_EDIS (*LQ_GPTU_CLC & (1 << 3)) ++#define GPTU_CLC_SPEN (*LQ_GPTU_CLC & (1 << 2)) ++#define GPTU_CLC_DISS (*LQ_GPTU_CLC & (1 << 1)) ++#define GPTU_CLC_DISR (*LQ_GPTU_CLC & (1 << 0)) ++ ++#define GPTU_CLC_SMC_SET(value) SET_BITS(0, 23, 16, (value)) ++#define GPTU_CLC_RMC_SET(value) SET_BITS(0, 15, 8, (value)) ++#define GPTU_CLC_FSOE_SET(value) ((value) ? (1 << 5) : 0) ++#define GPTU_CLC_SBWE_SET(value) ((value) ? (1 << 4) : 0) ++#define GPTU_CLC_EDIS_SET(value) ((value) ? (1 << 3) : 0) ++#define GPTU_CLC_SPEN_SET(value) ((value) ? (1 << 2) : 0) ++#define GPTU_CLC_DISR_SET(value) ((value) ? (1 << 0) : 0) ++ ++/* ++ * ID Register ++ */ ++#define GPTU_ID_ID GET_BITS(*LQ_GPTU_ID, 15, 8) ++#define GPTU_ID_CFG GET_BITS(*LQ_GPTU_ID, 7, 5) ++#define GPTU_ID_REV GET_BITS(*LQ_GPTU_ID, 4, 0) ++ ++/* ++ * Control Register of Timer/Counter nX ++ * n is the index of block (1 based index) ++ * X is either A or B ++ */ ++#define GPTU_CON_SRC_EG(n, X) (*LQ_GPTU_CON(n, X) & (1 << 10)) ++#define GPTU_CON_SRC_EXT(n, X) (*LQ_GPTU_CON(n, X) & (1 << 9)) ++#define GPTU_CON_SYNC(n, X) (*LQ_GPTU_CON(n, X) & (1 << 8)) ++#define GPTU_CON_EDGE(n, X) GET_BITS(*LQ_GPTU_CON(n, X), 7, 6) ++#define GPTU_CON_INV(n, X) (*LQ_GPTU_CON(n, X) & (1 << 5)) ++#define GPTU_CON_EXT(n, X) (*LQ_GPTU_CON(n, A) & (1 << 4)) /* Timer/Counter B does not have this bit */ ++#define GPTU_CON_STP(n, X) (*LQ_GPTU_CON(n, X) & (1 << 3)) ++#define GPTU_CON_CNT(n, X) (*LQ_GPTU_CON(n, X) & (1 << 2)) ++#define GPTU_CON_DIR(n, X) (*LQ_GPTU_CON(n, X) & (1 << 1)) ++#define GPTU_CON_EN(n, X) (*LQ_GPTU_CON(n, X) & (1 << 0)) ++ ++#define GPTU_CON_SRC_EG_SET(value) ((value) ? 0 : (1 << 10)) ++#define GPTU_CON_SRC_EXT_SET(value) ((value) ? (1 << 9) : 0) ++#define GPTU_CON_SYNC_SET(value) ((value) ? (1 << 8) : 0) ++#define GPTU_CON_EDGE_SET(value) SET_BITS(0, 7, 6, (value)) ++#define GPTU_CON_INV_SET(value) ((value) ? (1 << 5) : 0) ++#define GPTU_CON_EXT_SET(value) ((value) ? (1 << 4) : 0) ++#define GPTU_CON_STP_SET(value) ((value) ? (1 << 3) : 0) ++#define GPTU_CON_CNT_SET(value) ((value) ? (1 << 2) : 0) ++#define GPTU_CON_DIR_SET(value) ((value) ? (1 << 1) : 0) ++ ++#define GPTU_RUN_RL_SET(value) ((value) ? (1 << 2) : 0) ++#define GPTU_RUN_CEN_SET(value) ((value) ? (1 << 1) : 0) ++#define GPTU_RUN_SEN_SET(value) ((value) ? (1 << 0) : 0) ++ ++#define GPTU_IRNEN_TC_SET(n, X, value) ((value) ? (1 << (((n) - 1) * 2 + (X))) : 0) ++#define GPTU_IRNCR_TC_SET(n, X, value) ((value) ? (1 << (((n) - 1) * 2 + (X))) : 0) ++ ++#define TIMER_FLAG_MASK_SIZE(x) (x & 0x0001) ++#define TIMER_FLAG_MASK_TYPE(x) (x & 0x0002) ++#define TIMER_FLAG_MASK_STOP(x) (x & 0x0004) ++#define TIMER_FLAG_MASK_DIR(x) (x & 0x0008) ++#define TIMER_FLAG_NONE_EDGE 0x0000 ++#define TIMER_FLAG_MASK_EDGE(x) (x & 0x0030) ++#define TIMER_FLAG_REAL 0x0000 ++#define TIMER_FLAG_INVERT 0x0040 ++#define TIMER_FLAG_MASK_INVERT(x) (x & 0x0040) ++#define TIMER_FLAG_MASK_TRIGGER(x) (x & 0x0070) ++#define TIMER_FLAG_MASK_SYNC(x) (x & 0x0080) ++#define TIMER_FLAG_CALLBACK_IN_HB 0x0200 ++#define TIMER_FLAG_MASK_HANDLE(x) (x & 0x0300) ++#define TIMER_FLAG_MASK_SRC(x) (x & 0x1000) ++ ++struct timer_dev_timer { ++ unsigned int f_irq_on; ++ unsigned int irq; ++ unsigned int flag; ++ unsigned long arg1; ++ unsigned long arg2; ++}; ++ ++struct timer_dev { ++ struct mutex gptu_mutex; ++ unsigned int number_of_timers; ++ unsigned int occupation; ++ unsigned int f_gptu_on; ++ struct timer_dev_timer timer[MAX_NUM_OF_32BIT_TIMER_BLOCKS * 2]; ++}; ++ ++ ++unsigned int ltq_get_fpi_bus_clock(int fpi) { ++ struct clk *clk = clk_get_fpi(); ++ return clk_get_rate(clk); ++} ++ ++ ++static long gptu_ioctl(struct file *, unsigned int, unsigned long); ++static int gptu_open(struct inode *, struct file *); ++static int gptu_release(struct inode *, struct file *); ++ ++static struct file_operations gptu_fops = { ++ .owner = THIS_MODULE, ++ .unlocked_ioctl = gptu_ioctl, ++ .open = gptu_open, ++ .release = gptu_release ++}; ++ ++static struct miscdevice gptu_miscdev = { ++ .minor = MISC_DYNAMIC_MINOR, ++ .name = "gptu", ++ .fops = &gptu_fops, ++}; ++ ++static struct timer_dev timer_dev; ++ ++static irqreturn_t timer_irq_handler(int irq, void *p) ++{ ++ unsigned int timer; ++ unsigned int flag; ++ struct timer_dev_timer *dev_timer = (struct timer_dev_timer *)p; ++ ++ timer = irq - TIMER_INTERRUPT; ++ if (timer < timer_dev.number_of_timers ++ && dev_timer == &timer_dev.timer[timer]) { ++ /* Clear interrupt. */ ++ ltq_w32(1 << timer, LQ_GPTU_IRNCR); ++ ++ /* Call user hanler or signal. */ ++ flag = dev_timer->flag; ++ if (!(timer & 0x01) ++ || TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT) { ++ /* 16-bit timer or timer A of 32-bit timer */ ++ switch (TIMER_FLAG_MASK_HANDLE(flag)) { ++ case TIMER_FLAG_CALLBACK_IN_IRQ: ++ case TIMER_FLAG_CALLBACK_IN_HB: ++ if (dev_timer->arg1) ++ (*(timer_callback)dev_timer->arg1)(dev_timer->arg2); ++ break; ++ case TIMER_FLAG_SIGNAL: ++ send_sig((int)dev_timer->arg2, (struct task_struct *)dev_timer->arg1, 0); ++ break; ++ } ++ } ++ } ++ return IRQ_HANDLED; ++} ++ ++static inline void lq_enable_gptu(void) ++{ ++ struct clk *clk = clk_get_sys("1e100a00.gptu", NULL); ++ clk_enable(clk); ++ ++ //ltq_pmu_enable(PMU_GPT); ++ ++ /* Set divider as 1, disable write protection for SPEN, enable module. */ ++ *LQ_GPTU_CLC = ++ GPTU_CLC_SMC_SET(0x00) | ++ GPTU_CLC_RMC_SET(0x01) | ++ GPTU_CLC_FSOE_SET(0) | ++ GPTU_CLC_SBWE_SET(1) | ++ GPTU_CLC_EDIS_SET(0) | ++ GPTU_CLC_SPEN_SET(0) | ++ GPTU_CLC_DISR_SET(0); ++} ++ ++static inline void lq_disable_gptu(void) ++{ ++ struct clk *clk = clk_get_sys("1e100a00.gptu", NULL); ++ ltq_w32(0x00, LQ_GPTU_IRNEN); ++ ltq_w32(0xfff, LQ_GPTU_IRNCR); ++ ++ /* Set divider as 0, enable write protection for SPEN, disable module. */ ++ *LQ_GPTU_CLC = ++ GPTU_CLC_SMC_SET(0x00) | ++ GPTU_CLC_RMC_SET(0x00) | ++ GPTU_CLC_FSOE_SET(0) | ++ GPTU_CLC_SBWE_SET(0) | ++ GPTU_CLC_EDIS_SET(0) | ++ GPTU_CLC_SPEN_SET(0) | ++ GPTU_CLC_DISR_SET(1); ++ ++ clk_enable(clk); ++} ++ ++int lq_request_timer(unsigned int timer, unsigned int flag, ++ unsigned long value, unsigned long arg1, unsigned long arg2) ++{ ++ int ret = 0; ++ unsigned int con_reg, irnen_reg; ++ int n, X; ++ ++ if (timer >= FIRST_TIMER + timer_dev.number_of_timers) ++ return -EINVAL; ++ ++ printk(KERN_INFO "request_timer(%d, 0x%08X, %lu)...", ++ timer, flag, value); ++ ++ if (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT) ++ value &= 0xFFFF; ++ else ++ timer &= ~0x01; ++ ++ mutex_lock(&timer_dev.gptu_mutex); ++ ++ /* ++ * Allocate timer. ++ */ ++ if (timer < FIRST_TIMER) { ++ unsigned int mask; ++ unsigned int shift; ++ /* This takes care of TIMER1B which is the only choice for Voice TAPI system */ ++ unsigned int offset = TIMER2A; ++ ++ /* ++ * Pick up a free timer. ++ */ ++ if (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT) { ++ mask = 1 << offset; ++ shift = 1; ++ } else { ++ mask = 3 << offset; ++ shift = 2; ++ } ++ for (timer = offset; ++ timer < offset + timer_dev.number_of_timers; ++ timer += shift, mask <<= shift) ++ if (!(timer_dev.occupation & mask)) { ++ timer_dev.occupation |= mask; ++ break; ++ } ++ if (timer >= offset + timer_dev.number_of_timers) { ++ printk("failed![%d]\n", __LINE__); ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return -EINVAL; ++ } else ++ ret = timer; ++ } else { ++ register unsigned int mask; ++ ++ /* ++ * Check if the requested timer is free. ++ */ ++ mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer; ++ if ((timer_dev.occupation & mask)) { ++ printk("failed![%d] mask %#x, timer_dev.occupation %#x\n", ++ __LINE__, mask, timer_dev.occupation); ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return -EBUSY; ++ } else { ++ timer_dev.occupation |= mask; ++ ret = 0; ++ } ++ } ++ ++ /* ++ * Prepare control register value. ++ */ ++ switch (TIMER_FLAG_MASK_EDGE(flag)) { ++ default: ++ case TIMER_FLAG_NONE_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x00); ++ break; ++ case TIMER_FLAG_RISE_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x01); ++ break; ++ case TIMER_FLAG_FALL_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x02); ++ break; ++ case TIMER_FLAG_ANY_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x03); ++ break; ++ } ++ if (TIMER_FLAG_MASK_TYPE(flag) == TIMER_FLAG_TIMER) ++ con_reg |= ++ TIMER_FLAG_MASK_SRC(flag) == ++ TIMER_FLAG_EXT_SRC ? GPTU_CON_SRC_EXT_SET(1) : ++ GPTU_CON_SRC_EXT_SET(0); ++ else ++ con_reg |= ++ TIMER_FLAG_MASK_SRC(flag) == ++ TIMER_FLAG_EXT_SRC ? GPTU_CON_SRC_EG_SET(1) : ++ GPTU_CON_SRC_EG_SET(0); ++ con_reg |= ++ TIMER_FLAG_MASK_SYNC(flag) == ++ TIMER_FLAG_UNSYNC ? GPTU_CON_SYNC_SET(0) : ++ GPTU_CON_SYNC_SET(1); ++ con_reg |= ++ TIMER_FLAG_MASK_INVERT(flag) == ++ TIMER_FLAG_REAL ? GPTU_CON_INV_SET(0) : GPTU_CON_INV_SET(1); ++ con_reg |= ++ TIMER_FLAG_MASK_SIZE(flag) == ++ TIMER_FLAG_16BIT ? GPTU_CON_EXT_SET(0) : ++ GPTU_CON_EXT_SET(1); ++ con_reg |= ++ TIMER_FLAG_MASK_STOP(flag) == ++ TIMER_FLAG_ONCE ? GPTU_CON_STP_SET(1) : GPTU_CON_STP_SET(0); ++ con_reg |= ++ TIMER_FLAG_MASK_TYPE(flag) == ++ TIMER_FLAG_TIMER ? GPTU_CON_CNT_SET(0) : ++ GPTU_CON_CNT_SET(1); ++ con_reg |= ++ TIMER_FLAG_MASK_DIR(flag) == ++ TIMER_FLAG_UP ? GPTU_CON_DIR_SET(1) : GPTU_CON_DIR_SET(0); ++ ++ /* ++ * Fill up running data. ++ */ ++ timer_dev.timer[timer - FIRST_TIMER].flag = flag; ++ timer_dev.timer[timer - FIRST_TIMER].arg1 = arg1; ++ timer_dev.timer[timer - FIRST_TIMER].arg2 = arg2; ++ if (TIMER_FLAG_MASK_SIZE(flag) != TIMER_FLAG_16BIT) ++ timer_dev.timer[timer - FIRST_TIMER + 1].flag = flag; ++ ++ /* ++ * Enable GPTU module. ++ */ ++ if (!timer_dev.f_gptu_on) { ++ lq_enable_gptu(); ++ timer_dev.f_gptu_on = 1; ++ } ++ ++ /* ++ * Enable IRQ. ++ */ ++ if (TIMER_FLAG_MASK_HANDLE(flag) != TIMER_FLAG_NO_HANDLE) { ++ if (TIMER_FLAG_MASK_HANDLE(flag) == TIMER_FLAG_SIGNAL) ++ timer_dev.timer[timer - FIRST_TIMER].arg1 = ++ (unsigned long) find_task_by_vpid((int) arg1); ++ ++ irnen_reg = 1 << (timer - FIRST_TIMER); ++ ++ if (TIMER_FLAG_MASK_HANDLE(flag) == TIMER_FLAG_SIGNAL ++ || (TIMER_FLAG_MASK_HANDLE(flag) == ++ TIMER_FLAG_CALLBACK_IN_IRQ ++ && timer_dev.timer[timer - FIRST_TIMER].arg1)) { ++ enable_irq(timer_dev.timer[timer - FIRST_TIMER].irq); ++ timer_dev.timer[timer - FIRST_TIMER].f_irq_on = 1; ++ } ++ } else ++ irnen_reg = 0; ++ ++ /* ++ * Write config register, reload value and enable interrupt. ++ */ ++ n = timer >> 1; ++ X = timer & 0x01; ++ *LQ_GPTU_CON(n, X) = con_reg; ++ *LQ_GPTU_RELOAD(n, X) = value; ++ /* printk("reload value = %d\n", (u32)value); */ ++ *LQ_GPTU_IRNEN |= irnen_reg; ++ ++ mutex_unlock(&timer_dev.gptu_mutex); ++ printk("successful!\n"); ++ return ret; ++} ++EXPORT_SYMBOL(lq_request_timer); ++ ++int lq_free_timer(unsigned int timer) ++{ ++ unsigned int flag; ++ unsigned int mask; ++ int n, X; ++ ++ if (!timer_dev.f_gptu_on) ++ return -EINVAL; ++ ++ if (timer < FIRST_TIMER || timer >= FIRST_TIMER + timer_dev.number_of_timers) ++ return -EINVAL; ++ ++ mutex_lock(&timer_dev.gptu_mutex); ++ ++ flag = timer_dev.timer[timer - FIRST_TIMER].flag; ++ if (TIMER_FLAG_MASK_SIZE(flag) != TIMER_FLAG_16BIT) ++ timer &= ~0x01; ++ ++ mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer; ++ if (((timer_dev.occupation & mask) ^ mask)) { ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return -EINVAL; ++ } ++ ++ n = timer >> 1; ++ X = timer & 0x01; ++ ++ if (GPTU_CON_EN(n, X)) ++ *LQ_GPTU_RUN(n, X) = GPTU_RUN_CEN_SET(1); ++ ++ *LQ_GPTU_IRNEN &= ~GPTU_IRNEN_TC_SET(n, X, 1); ++ *LQ_GPTU_IRNCR |= GPTU_IRNCR_TC_SET(n, X, 1); ++ ++ if (timer_dev.timer[timer - FIRST_TIMER].f_irq_on) { ++ disable_irq(timer_dev.timer[timer - FIRST_TIMER].irq); ++ timer_dev.timer[timer - FIRST_TIMER].f_irq_on = 0; ++ } ++ ++ timer_dev.occupation &= ~mask; ++ if (!timer_dev.occupation && timer_dev.f_gptu_on) { ++ lq_disable_gptu(); ++ timer_dev.f_gptu_on = 0; ++ } ++ ++ mutex_unlock(&timer_dev.gptu_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL(lq_free_timer); ++ ++int lq_start_timer(unsigned int timer, int is_resume) ++{ ++ unsigned int flag; ++ unsigned int mask; ++ int n, X; ++ ++ if (!timer_dev.f_gptu_on) ++ return -EINVAL; ++ ++ if (timer < FIRST_TIMER || timer >= FIRST_TIMER + timer_dev.number_of_timers) ++ return -EINVAL; ++ ++ mutex_lock(&timer_dev.gptu_mutex); ++ ++ flag = timer_dev.timer[timer - FIRST_TIMER].flag; ++ if (TIMER_FLAG_MASK_SIZE(flag) != TIMER_FLAG_16BIT) ++ timer &= ~0x01; ++ ++ mask = (TIMER_FLAG_MASK_SIZE(flag) == ++ TIMER_FLAG_16BIT ? 1 : 3) << timer; ++ if (((timer_dev.occupation & mask) ^ mask)) { ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return -EINVAL; ++ } ++ ++ n = timer >> 1; ++ X = timer & 0x01; ++ ++ *LQ_GPTU_RUN(n, X) = GPTU_RUN_RL_SET(!is_resume) | GPTU_RUN_SEN_SET(1); ++ ++ ++ mutex_unlock(&timer_dev.gptu_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL(lq_start_timer); ++ ++int lq_stop_timer(unsigned int timer) ++{ ++ unsigned int flag; ++ unsigned int mask; ++ int n, X; ++ ++ if (!timer_dev.f_gptu_on) ++ return -EINVAL; ++ ++ if (timer < FIRST_TIMER ++ || timer >= FIRST_TIMER + timer_dev.number_of_timers) ++ return -EINVAL; ++ ++ mutex_lock(&timer_dev.gptu_mutex); ++ ++ flag = timer_dev.timer[timer - FIRST_TIMER].flag; ++ if (TIMER_FLAG_MASK_SIZE(flag) != TIMER_FLAG_16BIT) ++ timer &= ~0x01; ++ ++ mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer; ++ if (((timer_dev.occupation & mask) ^ mask)) { ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return -EINVAL; ++ } ++ ++ n = timer >> 1; ++ X = timer & 0x01; ++ ++ *LQ_GPTU_RUN(n, X) = GPTU_RUN_CEN_SET(1); ++ ++ mutex_unlock(&timer_dev.gptu_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL(lq_stop_timer); ++ ++int lq_reset_counter_flags(u32 timer, u32 flags) ++{ ++ unsigned int oflag; ++ unsigned int mask, con_reg; ++ int n, X; ++ ++ if (!timer_dev.f_gptu_on) ++ return -EINVAL; ++ ++ if (timer < FIRST_TIMER || timer >= FIRST_TIMER + timer_dev.number_of_timers) ++ return -EINVAL; ++ ++ mutex_lock(&timer_dev.gptu_mutex); ++ ++ oflag = timer_dev.timer[timer - FIRST_TIMER].flag; ++ if (TIMER_FLAG_MASK_SIZE(oflag) != TIMER_FLAG_16BIT) ++ timer &= ~0x01; ++ ++ mask = (TIMER_FLAG_MASK_SIZE(oflag) == TIMER_FLAG_16BIT ? 1 : 3) << timer; ++ if (((timer_dev.occupation & mask) ^ mask)) { ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return -EINVAL; ++ } ++ ++ switch (TIMER_FLAG_MASK_EDGE(flags)) { ++ default: ++ case TIMER_FLAG_NONE_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x00); ++ break; ++ case TIMER_FLAG_RISE_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x01); ++ break; ++ case TIMER_FLAG_FALL_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x02); ++ break; ++ case TIMER_FLAG_ANY_EDGE: ++ con_reg = GPTU_CON_EDGE_SET(0x03); ++ break; ++ } ++ if (TIMER_FLAG_MASK_TYPE(flags) == TIMER_FLAG_TIMER) ++ con_reg |= TIMER_FLAG_MASK_SRC(flags) == TIMER_FLAG_EXT_SRC ? GPTU_CON_SRC_EXT_SET(1) : GPTU_CON_SRC_EXT_SET(0); ++ else ++ con_reg |= TIMER_FLAG_MASK_SRC(flags) == TIMER_FLAG_EXT_SRC ? GPTU_CON_SRC_EG_SET(1) : GPTU_CON_SRC_EG_SET(0); ++ con_reg |= TIMER_FLAG_MASK_SYNC(flags) == TIMER_FLAG_UNSYNC ? GPTU_CON_SYNC_SET(0) : GPTU_CON_SYNC_SET(1); ++ con_reg |= TIMER_FLAG_MASK_INVERT(flags) == TIMER_FLAG_REAL ? GPTU_CON_INV_SET(0) : GPTU_CON_INV_SET(1); ++ con_reg |= TIMER_FLAG_MASK_SIZE(flags) == TIMER_FLAG_16BIT ? GPTU_CON_EXT_SET(0) : GPTU_CON_EXT_SET(1); ++ con_reg |= TIMER_FLAG_MASK_STOP(flags) == TIMER_FLAG_ONCE ? GPTU_CON_STP_SET(1) : GPTU_CON_STP_SET(0); ++ con_reg |= TIMER_FLAG_MASK_TYPE(flags) == TIMER_FLAG_TIMER ? GPTU_CON_CNT_SET(0) : GPTU_CON_CNT_SET(1); ++ con_reg |= TIMER_FLAG_MASK_DIR(flags) == TIMER_FLAG_UP ? GPTU_CON_DIR_SET(1) : GPTU_CON_DIR_SET(0); ++ ++ timer_dev.timer[timer - FIRST_TIMER].flag = flags; ++ if (TIMER_FLAG_MASK_SIZE(flags) != TIMER_FLAG_16BIT) ++ timer_dev.timer[timer - FIRST_TIMER + 1].flag = flags; ++ ++ n = timer >> 1; ++ X = timer & 0x01; ++ ++ *LQ_GPTU_CON(n, X) = con_reg; ++ smp_wmb(); ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return 0; ++} ++EXPORT_SYMBOL(lq_reset_counter_flags); ++ ++int lq_get_count_value(unsigned int timer, unsigned long *value) ++{ ++ unsigned int flag; ++ unsigned int mask; ++ int n, X; ++ ++ if (!timer_dev.f_gptu_on) ++ return -EINVAL; ++ ++ if (timer < FIRST_TIMER ++ || timer >= FIRST_TIMER + timer_dev.number_of_timers) ++ return -EINVAL; ++ ++ mutex_lock(&timer_dev.gptu_mutex); ++ ++ flag = timer_dev.timer[timer - FIRST_TIMER].flag; ++ if (TIMER_FLAG_MASK_SIZE(flag) != TIMER_FLAG_16BIT) ++ timer &= ~0x01; ++ ++ mask = (TIMER_FLAG_MASK_SIZE(flag) == TIMER_FLAG_16BIT ? 1 : 3) << timer; ++ if (((timer_dev.occupation & mask) ^ mask)) { ++ mutex_unlock(&timer_dev.gptu_mutex); ++ return -EINVAL; ++ } ++ ++ n = timer >> 1; ++ X = timer & 0x01; ++ ++ *value = *LQ_GPTU_COUNT(n, X); ++ ++ ++ mutex_unlock(&timer_dev.gptu_mutex); ++ ++ return 0; ++} ++EXPORT_SYMBOL(lq_get_count_value); ++ ++u32 lq_cal_divider(unsigned long freq) ++{ ++ u64 module_freq, fpi = ltq_get_fpi_bus_clock(2); ++ u32 clock_divider = 1; ++ module_freq = fpi * 1000; ++ do_div(module_freq, clock_divider * freq); ++ return module_freq; ++} ++EXPORT_SYMBOL(lq_cal_divider); ++ ++int lq_set_timer(unsigned int timer, unsigned int freq, int is_cyclic, ++ int is_ext_src, unsigned int handle_flag, unsigned long arg1, ++ unsigned long arg2) ++{ ++ unsigned long divider; ++ unsigned int flag; ++ ++ divider = lq_cal_divider(freq); ++ if (divider == 0) ++ return -EINVAL; ++ flag = ((divider & ~0xFFFF) ? TIMER_FLAG_32BIT : TIMER_FLAG_16BIT) ++ | (is_cyclic ? TIMER_FLAG_CYCLIC : TIMER_FLAG_ONCE) ++ | (is_ext_src ? TIMER_FLAG_EXT_SRC : TIMER_FLAG_INT_SRC) ++ | TIMER_FLAG_TIMER | TIMER_FLAG_DOWN ++ | TIMER_FLAG_MASK_HANDLE(handle_flag); ++ ++ printk(KERN_INFO "lq_set_timer(%d, %d), divider = %lu\n", ++ timer, freq, divider); ++ return lq_request_timer(timer, flag, divider, arg1, arg2); ++} ++EXPORT_SYMBOL(lq_set_timer); ++ ++int lq_set_counter(unsigned int timer, unsigned int flag, u32 reload, ++ unsigned long arg1, unsigned long arg2) ++{ ++ printk(KERN_INFO "lq_set_counter(%d, %#x, %d)\n", timer, flag, reload); ++ return lq_request_timer(timer, flag, reload, arg1, arg2); ++} ++EXPORT_SYMBOL(lq_set_counter); ++ ++static long gptu_ioctl(struct file *file, unsigned int cmd, ++ unsigned long arg) ++{ ++ int ret; ++ struct gptu_ioctl_param param; ++ ++ if (!access_ok(VERIFY_READ, (void __user *)arg, sizeof(struct gptu_ioctl_param))) ++ return -EFAULT; ++ copy_from_user(¶m, (void __user *)arg, sizeof(param)); ++ ++ if ((((cmd == GPTU_REQUEST_TIMER || cmd == GPTU_SET_TIMER ++ || GPTU_SET_COUNTER) && param.timer < 2) ++ || cmd == GPTU_GET_COUNT_VALUE || cmd == GPTU_CALCULATE_DIVIDER) ++ && !access_ok(VERIFY_WRITE, (void __user *)arg, ++ sizeof(struct gptu_ioctl_param))) ++ return -EFAULT; ++ ++ switch (cmd) { ++ case GPTU_REQUEST_TIMER: ++ ret = lq_request_timer(param.timer, param.flag, param.value, ++ (unsigned long) param.pid, ++ (unsigned long) param.sig); ++ if (ret > 0) { ++ copy_to_user(&((struct gptu_ioctl_param *) arg)-> ++ timer, &ret, sizeof(&ret)); ++ ret = 0; ++ } ++ break; ++ case GPTU_FREE_TIMER: ++ ret = lq_free_timer(param.timer); ++ break; ++ case GPTU_START_TIMER: ++ ret = lq_start_timer(param.timer, param.flag); ++ break; ++ case GPTU_STOP_TIMER: ++ ret = lq_stop_timer(param.timer); ++ break; ++ case GPTU_GET_COUNT_VALUE: ++ ret = lq_get_count_value(param.timer, ¶m.value); ++ if (!ret) ++ copy_to_user(&((struct gptu_ioctl_param *) arg)-> ++ value, ¶m.value, ++ sizeof(param.value)); ++ break; ++ case GPTU_CALCULATE_DIVIDER: ++ param.value = lq_cal_divider(param.value); ++ if (param.value == 0) ++ ret = -EINVAL; ++ else { ++ copy_to_user(&((struct gptu_ioctl_param *) arg)-> ++ value, ¶m.value, ++ sizeof(param.value)); ++ ret = 0; ++ } ++ break; ++ case GPTU_SET_TIMER: ++ ret = lq_set_timer(param.timer, param.value, ++ TIMER_FLAG_MASK_STOP(param.flag) != ++ TIMER_FLAG_ONCE ? 1 : 0, ++ TIMER_FLAG_MASK_SRC(param.flag) == ++ TIMER_FLAG_EXT_SRC ? 1 : 0, ++ TIMER_FLAG_MASK_HANDLE(param.flag) == ++ TIMER_FLAG_SIGNAL ? TIMER_FLAG_SIGNAL : ++ TIMER_FLAG_NO_HANDLE, ++ (unsigned long) param.pid, ++ (unsigned long) param.sig); ++ if (ret > 0) { ++ copy_to_user(&((struct gptu_ioctl_param *) arg)-> ++ timer, &ret, sizeof(&ret)); ++ ret = 0; ++ } ++ break; ++ case GPTU_SET_COUNTER: ++ lq_set_counter(param.timer, param.flag, param.value, 0, 0); ++ if (ret > 0) { ++ copy_to_user(&((struct gptu_ioctl_param *) arg)-> ++ timer, &ret, sizeof(&ret)); ++ ret = 0; ++ } ++ break; ++ default: ++ ret = -ENOTTY; ++ } ++ ++ return ret; ++} ++ ++static int gptu_open(struct inode *inode, struct file *file) ++{ ++ return 0; ++} ++ ++static int gptu_release(struct inode *inode, struct file *file) ++{ ++ return 0; ++} ++ ++int __init lq_gptu_init(void) ++{ ++ int ret; ++ unsigned int i; ++ ++ ltq_w32(0, LQ_GPTU_IRNEN); ++ ltq_w32(0xfff, LQ_GPTU_IRNCR); ++ ++ memset(&timer_dev, 0, sizeof(timer_dev)); ++ mutex_init(&timer_dev.gptu_mutex); ++ ++ lq_enable_gptu(); ++ timer_dev.number_of_timers = GPTU_ID_CFG * 2; ++ lq_disable_gptu(); ++ if (timer_dev.number_of_timers > MAX_NUM_OF_32BIT_TIMER_BLOCKS * 2) ++ timer_dev.number_of_timers = MAX_NUM_OF_32BIT_TIMER_BLOCKS * 2; ++ printk(KERN_INFO "gptu: totally %d 16-bit timers/counters\n", timer_dev.number_of_timers); ++ ++ ret = misc_register(&gptu_miscdev); ++ if (ret) { ++ printk(KERN_ERR "gptu: can't misc_register, get error %d\n", -ret); ++ return ret; ++ } else { ++ printk(KERN_INFO "gptu: misc_register on minor %d\n", gptu_miscdev.minor); ++ } ++ ++ for (i = 0; i < timer_dev.number_of_timers; i++) { ++ ret = request_irq(TIMER_INTERRUPT + i, timer_irq_handler, IRQF_TIMER, gptu_miscdev.name, &timer_dev.timer[i]); ++ if (ret) { ++ for (; i >= 0; i--) ++ free_irq(TIMER_INTERRUPT + i, &timer_dev.timer[i]); ++ misc_deregister(&gptu_miscdev); ++ printk(KERN_ERR "gptu: failed in requesting irq (%d), get error %d\n", i, -ret); ++ return ret; ++ } else { ++ timer_dev.timer[i].irq = TIMER_INTERRUPT + i; ++ disable_irq(timer_dev.timer[i].irq); ++ printk(KERN_INFO "gptu: succeeded to request irq %d\n", timer_dev.timer[i].irq); ++ } ++ } ++ ++ return 0; ++} ++ ++void __exit lq_gptu_exit(void) ++{ ++ unsigned int i; ++ ++ for (i = 0; i < timer_dev.number_of_timers; i++) { ++ if (timer_dev.timer[i].f_irq_on) ++ disable_irq(timer_dev.timer[i].irq); ++ free_irq(timer_dev.timer[i].irq, &timer_dev.timer[i]); ++ } ++ lq_disable_gptu(); ++ misc_deregister(&gptu_miscdev); ++} ++ ++module_init(lq_gptu_init); ++module_exit(lq_gptu_exit); ++ ++#endif diff --git a/target/linux/lantiq/patches-4.14/0018-MTD-nand-lots-of-xrx200-fixes.patch b/target/linux/lantiq/patches-4.14/0018-MTD-nand-lots-of-xrx200-fixes.patch new file mode 100644 index 000000000..b97967d20 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0018-MTD-nand-lots-of-xrx200-fixes.patch @@ -0,0 +1,122 @@ +From 997a8965db8417266bea3fbdcfa3e5655a1b52fa Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 9 Sep 2014 23:12:15 +0200 +Subject: [PATCH 18/36] MTD: nand: lots of xrx200 fixes + +Signed-off-by: John Crispin +--- + drivers/mtd/nand/xway_nand.c | 63 ++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 63 insertions(+) + +--- a/drivers/mtd/nand/xway_nand.c ++++ b/drivers/mtd/nand/xway_nand.c +@@ -63,6 +63,24 @@ + #define NAND_CON_CSMUX (1 << 1) + #define NAND_CON_NANDM 1 + ++#define DANUBE_PCI_REG32( addr ) (*(volatile u32 *)(addr)) ++#define PCI_CR_PR_OFFSET (KSEG1+0x1E105400) ++#define PCI_CR_PC_ARB (PCI_CR_PR_OFFSET + 0x0080) ++ ++/* ++ * req_mask provides a mechanism to prevent interference between ++ * nand and pci (probably only relevant for the BT Home Hub 2B). ++ * Setting it causes the corresponding pci req pins to be masked ++ * during nand access, and also moves ebu locking from the read/write ++ * functions to the chip select function to ensure that the whole ++ * operation runs with interrupts disabled. ++ * In addition it switches on some extra waiting in xway_cmd_ctrl(). ++ * This seems to be necessary if the ebu_cs1 pin has open-drain disabled, ++ * which in turn seems to be necessary for the nor chip to be recognised ++ * reliably, on a board (Home Hub 2B again) which has both nor and nand. ++ */ ++static __be32 req_mask = 0; ++ + struct xway_nand_data { + struct nand_chip chip; + unsigned long csflags; +@@ -94,10 +112,22 @@ static void xway_select_chip(struct mtd_ + case -1: + ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON); + ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON); ++ ++ if (req_mask) { ++ /* Unmask all external PCI request */ ++ DANUBE_PCI_REG32(PCI_CR_PC_ARB) &= ~(req_mask << 16); ++ } ++ + spin_unlock_irqrestore(&ebu_lock, data->csflags); + break; + case 0: + spin_lock_irqsave(&ebu_lock, data->csflags); ++ ++ if (req_mask) { ++ /* Mask all external PCI request */ ++ DANUBE_PCI_REG32(PCI_CR_PC_ARB) |= (req_mask << 16); ++ } ++ + ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON); + ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON); + break; +@@ -108,6 +138,12 @@ static void xway_select_chip(struct mtd_ + + static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) + { ++ ++ if (req_mask) { ++ if (cmd != NAND_CMD_STATUS) ++ ltq_ebu_w32(0, EBU_NAND_WAIT); /* Clear nand ready */ ++ } ++ + if (cmd == NAND_CMD_NONE) + return; + +@@ -118,6 +154,24 @@ static void xway_cmd_ctrl(struct mtd_inf + + while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) + ; ++ ++ if (req_mask) { ++ /* ++ * program and erase have their own busy handlers ++ * status and sequential in needs no delay ++ */ ++ switch (cmd) { ++ case NAND_CMD_ERASE1: ++ case NAND_CMD_SEQIN: ++ case NAND_CMD_STATUS: ++ case NAND_CMD_READID: ++ return; ++ } ++ ++ /* wait until command is processed */ ++ while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_RD) == 0) ++ ; ++ } + } + + static int xway_dev_ready(struct mtd_info *mtd) +@@ -157,6 +211,7 @@ static int xway_nand_probe(struct platfo + int err; + u32 cs; + u32 cs_flag = 0; ++ const __be32 *req_mask_ptr; + + /* Allocate memory for the device structure (and zero it) */ + data = devm_kzalloc(&pdev->dev, sizeof(struct xway_nand_data), +@@ -192,6 +247,15 @@ static int xway_nand_probe(struct platfo + if (!err && cs == 1) + cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1; + ++ req_mask_ptr = of_get_property(pdev->dev.of_node, ++ "req-mask", NULL); ++ ++ /* ++ * Load the PCI req lines to mask from the device tree. If the ++ * property is not present, setting req_mask to 0 disables masking. ++ */ ++ req_mask = (req_mask_ptr ? *req_mask_ptr : 0); ++ + /* setup the EBU to run in NAND mode on our base addr */ + ltq_ebu_w32(CPHYSADDR(data->nandaddr) + | ADDSEL1_MASK(3) | ADDSEL1_REGEN, EBU_ADDSEL1); diff --git a/target/linux/lantiq/patches-4.14/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch b/target/linux/lantiq/patches-4.14/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch new file mode 100644 index 000000000..502c5af9f --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0020-MTD-lantiq-handle-NO_XIP-on-cfi0001-flash.patch @@ -0,0 +1,25 @@ +From e3b20f04e9f9cae1babe091fdc1d08d7703ae344 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 7 Aug 2014 18:18:00 +0200 +Subject: [PATCH 20/36] MTD: lantiq: handle NO_XIP on cfi0001 flash + +Signed-off-by: John Crispin +--- + drivers/mtd/maps/lantiq-flash.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/mtd/maps/lantiq-flash.c ++++ b/drivers/mtd/maps/lantiq-flash.c +@@ -131,7 +131,11 @@ ltq_mtd_probe(struct platform_device *pd + if (!ltq_mtd->map) + return -ENOMEM; + +- ltq_mtd->map->phys = ltq_mtd->res->start; ++ if (of_find_property(pdev->dev.of_node, "lantiq,noxip", NULL)) ++ ltq_mtd->map->phys = NO_XIP; ++ else ++ ltq_mtd->map->phys = ltq_mtd->res->start; ++ ltq_mtd->res->start; + ltq_mtd->map->size = resource_size(ltq_mtd->res); + ltq_mtd->map->virt = devm_ioremap_resource(&pdev->dev, ltq_mtd->res); + if (IS_ERR(ltq_mtd->map->virt)) diff --git a/target/linux/lantiq/patches-4.14/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch b/target/linux/lantiq/patches-4.14/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch new file mode 100644 index 000000000..415c8579b --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch @@ -0,0 +1,44 @@ +From 4400e1f593ea40a51912128adb4f53d59e62cad8 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Wed, 10 Sep 2014 22:40:18 +0200 +Subject: [PATCH 22/36] MTD: m25p80: allow loading mtd name from OF + +In accordance with the physmap flash we should honour the linux,mtd-name +property when deciding what name the mtd device has. + +Signed-off-by: Thomas Langer +Signed-off-by: John Crispin +--- + drivers/mtd/devices/m25p80.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/mtd/devices/m25p80.c ++++ b/drivers/mtd/devices/m25p80.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -245,6 +246,10 @@ static int m25p_probe(struct spi_device + }; + char *flash_name; + int ret; ++ const char __maybe_unused *of_mtd_name = NULL; ++ ++ of_property_read_string(spi->dev.of_node, ++ "linux,mtd-name", &of_mtd_name); + + data = dev_get_platdata(&spi->dev); + +@@ -283,6 +288,8 @@ static int m25p_probe(struct spi_device + + if (data && data->name) + nor->mtd.name = data->name; ++ else if (of_mtd_name) ++ nor->mtd.name = of_mtd_name; + + /* For some (historical?) reason many platforms provide two different + * names in flash_platform_data: "name" and "type". Quite often name is diff --git a/target/linux/lantiq/patches-4.14/0023-NET-PHY-add-led-support-for-intel-xway.patch b/target/linux/lantiq/patches-4.14/0023-NET-PHY-add-led-support-for-intel-xway.patch new file mode 100644 index 000000000..068684282 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0023-NET-PHY-add-led-support-for-intel-xway.patch @@ -0,0 +1,294 @@ +From 0a63ab263725c427051a8bbaa0732b749627da27 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 7 Aug 2014 18:15:36 +0200 +Subject: [PATCH 23/36] NET: PHY: adds driver for lantiq PHY11G + +Signed-off-by: John Crispin +--- + drivers/net/phy/Kconfig | 5 + + drivers/net/phy/Makefile | 1 + + drivers/net/phy/lantiq.c | 231 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 237 insertions(+) + create mode 100644 drivers/net/phy/lantiq.c + +--- a/drivers/net/phy/intel-xway.c ++++ b/drivers/net/phy/intel-xway.c +@@ -152,6 +152,51 @@ + #define PHY_ID_PHY11G_VR9 0xD565A409 + #define PHY_ID_PHY22F_VR9 0xD565A419 + ++#if IS_ENABLED(CONFIG_OF_MDIO) ++static int vr9_gphy_of_reg_init(struct phy_device *phydev) ++{ ++ u32 tmp; ++ ++ /* store the led values if one was passed by the devicetree */ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,ledch", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCH, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,ledcl", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCL, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led0h", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0H, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led0l", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0L, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led1h", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1H, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led1l", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1L, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led2h", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED3H, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led2l", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED3L, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led3h", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED3H, tmp); ++ ++ if (!of_property_read_u32(phydev->mdio.dev.of_node, "lantiq,led3l", &tmp)) ++ phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED3L, tmp); ++ ++ return 0; ++} ++#else ++static int vr9_gphy_of_reg_init(struct phy_device *phydev) ++{ ++ return 0; ++} ++#endif /* CONFIG_OF_MDIO */ ++ + static int xway_gphy_config_init(struct phy_device *phydev) + { + int err; +@@ -190,6 +235,7 @@ static int xway_gphy_config_init(struct + phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2H, ledxh); + phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2L, ledxl); + ++ vr9_gphy_of_reg_init(phydev); + return 0; + } + +--- /dev/null ++++ b/Documentation/devicetree/bindings/phy/phy-lanitq.txt +@@ -0,0 +1,216 @@ ++Lanitq PHY binding ++============================================ ++ ++This devicetree binding controls the lantiq ethernet phys led functionality. ++ ++Example: ++ mdio@0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "lantiq,xrx200-mdio"; ++ phy5: ethernet-phy@5 { ++ reg = <0x1>; ++ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; ++ }; ++ phy11: ethernet-phy@11 { ++ reg = <0x11>; ++ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; ++ lantiq,led2h = <0x00>; ++ lantiq,led2l = <0x03>; ++ }; ++ phy12: ethernet-phy@12 { ++ reg = <0x12>; ++ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; ++ lantiq,led1h = <0x00>; ++ lantiq,led1l = <0x03>; ++ }; ++ phy13: ethernet-phy@13 { ++ reg = <0x13>; ++ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; ++ lantiq,led2h = <0x00>; ++ lantiq,led2l = <0x03>; ++ }; ++ phy14: ethernet-phy@14 { ++ reg = <0x14>; ++ compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; ++ lantiq,led1h = <0x00>; ++ lantiq,led1l = <0x03>; ++ }; ++ }; ++ ++Register Description ++============================================ ++ ++LEDCH: ++ ++Name Hardware Reset Value ++LEDCH 0x00C5 ++ ++| 15 | | | | | | | 8 | ++========================================= ++| RES | ++========================================= ++ ++| 7 | | | | | | | 0 | ++========================================= ++| FBF | SBF |RES | NACS | ++========================================= ++ ++Field Bits Type Description ++FBF 7:6 RW Fast Blink Frequency ++ --- ++ 0x0 (00b) F02HZ 2 Hz blinking frequency ++ 0x1 (01b) F04HZ 4 Hz blinking frequency ++ 0x2 (10b) F08HZ 8 Hz blinking frequency ++ 0x3 (11b) F16HZ 16 Hz blinking frequency ++ ++SBF 5:4 RW Slow Blink Frequency ++ --- ++ 0x0 (00b) F02HZ 2 Hz blinking frequency ++ 0x1 (01b) F04HZ 4 Hz blinking frequency ++ 0x2 (10b) F08HZ 8 Hz blinking frequency ++ 0x3 (11b) F16HZ 16 Hz blinking frequency ++ ++NACS 2:0 RW Inverse of Scan Function ++ --- ++ 0x0 (000b) NONE No Function ++ 0x1 (001b) LINK Complex function enabled when link is up ++ 0x2 (010b) PDOWN Complex function enabled when device is powered-down ++ 0x3 (011b) EEE Complex function enabled when device is in EEE mode ++ 0x4 (100b) ANEG Complex function enabled when auto-negotiation is running ++ 0x5 (101b) ABIST Complex function enabled when analog self-test is running ++ 0x6 (110b) CDIAG Complex function enabled when cable diagnostics are running ++ 0x7 (111b) TEST Complex function enabled when test mode is running ++ ++LEDCL: ++ ++Name Hardware Reset Value ++LEDCL 0x0067 ++ ++| 15 | | | | | | | 8 | ++========================================= ++| RES | ++========================================= ++ ++| 7 | | | | | | | 0 | ++========================================= ++|RES | SCAN |RES | CBLINK | ++========================================= ++ ++Field Bits Type Description ++SCAN 6:4 RW Complex Scan Configuration ++ --- ++ 000 B NONE No Function ++ 001 B LINK Complex function enabled when link is up ++ 010 B PDOWN Complex function enabled when device is powered-down ++ 011 B EEE Complex function enabled when device is in EEE mode ++ 100 B ANEG Complex function enabled when auto-negotiation is running ++ 101 B ABIST Complex function enabled when analog self-test is running ++ 110 B CDIAG Complex function enabled when cable diagnostics are running ++ 111 B TEST Complex function enabled when test mode is running ++ ++CBLINK 2:0 RW Complex Blinking Configuration ++ --- ++ 000 B NONE No Function ++ 001 B LINK Complex function enabled when link is up ++ 010 B PDOWN Complex function enabled when device is powered-down ++ 011 B EEE Complex function enabled when device is in EEE mode ++ 100 B ANEG Complex function enabled when auto-negotiation is running ++ 101 B ABIST Complex function enabled when analog self-test is running ++ 110 B CDIAG Complex function enabled when cable diagnostics are running ++ 111 B TEST Complex function enabled when test mode is running ++ ++LEDxH: ++ ++Name Hardware Reset Value ++LED0H 0x0070 ++LED1H 0x0020 ++LED2H 0x0040 ++LED3H 0x0040 ++ ++| 15 | | | | | | | 8 | ++========================================= ++| RES | ++========================================= ++ ++| 7 | | | | | | | 0 | ++========================================= ++| CON | BLINKF | ++========================================= ++ ++Field Bits Type Description ++CON 7:4 RW Constant On Configuration ++ --- ++ 0x0 (0000b) NONE LED does not light up constantly ++ 0x1 (0001b) LINK10 LED is on when link is 10 Mbit/s ++ 0x2 (0010b) LINK100 LED is on when link is 100 Mbit/s ++ 0x3 (0011b) LINK10X LED is on when link is 10/100 Mbit/s ++ 0x4 (0100b) LINK1000 LED is on when link is 1000 Mbit/s ++ 0x5 (0101b) LINK10_0 LED is on when link is 10/1000 Mbit/s ++ 0x6 (0110b) LINK100X LED is on when link is 100/1000 Mbit/s ++ 0x7 (0111b) LINK10XX LED is on when link is 10/100/1000 Mbit/s ++ 0x8 (1000b) PDOWN LED is on when device is powered-down ++ 0x9 (1001b) EEE LED is on when device is in EEE mode ++ 0xA (1010b) ANEG LED is on when auto-negotiation is running ++ 0xB (1011b) ABIST LED is on when analog self-test is running ++ 0xC (1100b) CDIAG LED is on when cable diagnostics are running ++ ++BLINKF 3:0 RW Fast Blinking Configuration ++ --- ++ 0x0 (0000b) NONE No Blinking ++ 0x1 (0001b) LINK10 Blink when link is 10 Mbit/s ++ 0x2 (0010b) LINK100 Blink when link is 100 Mbit/s ++ 0x3 (0011b) LINK10X Blink when link is 10/100 Mbit/s ++ 0x4 (0100b) LINK1000 Blink when link is 1000 Mbit/s ++ 0x5 (0101b) LINK10_0 Blink when link is 10/1000 Mbit/s ++ 0x6 (0110b) LINK100X Blink when link is 100/1000 Mbit/s ++ 0x7 (0111b) LINK10XX Blink when link is 10/100/1000 Mbit/s ++ 0x8 (1000b) PDOWN Blink when device is powered-down ++ 0x9 (1001b) EEE Blink when device is in EEE mode ++ 0xA (1010b) ANEG Blink when auto-negotiation is running ++ 0xB (1011b) ABIST Blink when analog self-test is running ++ 0xC (1100b) CDIAG Blink when cable diagnostics are running ++ ++LEDxL: ++ ++Name Hardware Reset Value ++LED0L 0x0003 ++LED1L 0x0000 ++LED2L 0x0000 ++LED3L 0x0020 ++ ++| 15 | | | | | | | 8 | ++========================================= ++| RES | ++========================================= ++ ++| 7 | | | | | | | 0 | ++========================================= ++| BLINKS | PULSE | ++========================================= ++ ++Field Bits Type Description ++BLINKS 7:4 RW Slow Blinkin Configuration ++ --- ++ 0x0 (0000b) NONE No Blinking ++ 0x1 (0001b) LINK10 Blink when link is 10 Mbit/s ++ 0x2 (0010b) LINK100 Blink when link is 100 Mbit/s ++ 0x3 (0011b) LINK10X Blink when link is 10/100 Mbit/s ++ 0x4 (0100b) LINK1000 Blink when link is 1000 Mbit/s ++ 0x5 (0101b) LINK10_0 Blink when link is 10/1000 Mbit/s ++ 0x6 (0110b) LINK100X Blink when link is 100/1000 Mbit/s ++ 0x7 (0111b) LINK10XX Blink when link is 10/100/1000 Mbit/s ++ 0x8 (1000b) PDOWN Blink when device is powered-down ++ 0x9 (1001b) EEE Blink when device is in EEE mode ++ 0xA (1010b) ANEG Blink when auto-negotiation is running ++ 0xB (1011b) ABIST Blink when analog self-test is running ++ 0xC (1100b) CDIAG Blink when cable diagnostics are runningning ++ ++PULSE 3:0 RW Pulsing Configuration ++ The pulse field is a mask field by which certain events can be combined ++ --- ++ 0x0 (0000b) NONE No pulsing ++ 0x1 (0001b) TXACT Transmit activity ++ 0x2 (0010b) RXACT Receive activity ++ 0x4 (0100b) COL Collision ++ 0x8 (1000b) RES Reserved diff --git a/target/linux/lantiq/patches-4.14/0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch b/target/linux/lantiq/patches-4.14/0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch new file mode 100644 index 000000000..68643cc05 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch @@ -0,0 +1,45 @@ +From ae0c287060749dc72c866484d12bd3cade8c517d Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Fri, 19 Jan 2018 20:19:06 +0100 +Subject: [PATCH] MIPS: lantiq: autoselect matching vr9 rev gphy firmware + +Add a custom xrx200 ethernet phy compatible to load the firmware matching +the vr9 revision without specifing an expected revision. + +We have quite a few boards in the tree were later produced ones are using +a more recent vr9. It is impossible to distinguish which revision of the +vr9 is used without opening the case and removing a heatsink for some of +them. + +Signed-off-by: Mathias Kresin +--- + drivers/soc/lantiq/gphy.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/drivers/soc/lantiq/gphy.c ++++ b/drivers/soc/lantiq/gphy.c +@@ -56,6 +56,7 @@ static const struct xway_gphy_match_data + }; + + static const struct of_device_id xway_gphy_match[] = { ++ { .compatible = "lantiq,xrx200-gphy", .data = NULL }, + { .compatible = "lantiq,xrx200a1x-gphy", .data = &xrx200a1x_gphy_data }, + { .compatible = "lantiq,xrx200a2x-gphy", .data = &xrx200a2x_gphy_data }, + { .compatible = "lantiq,xrx300-gphy", .data = &xrx300_gphy_data }, +@@ -130,6 +131,16 @@ static int xway_gphy_of_probe(struct pla + + gphy_fw_name_cfg = of_device_get_match_data(dev); + ++ if (of_device_is_compatible(pdev->dev.of_node, "lantiq,xrx200-gphy")) ++ switch (ltq_soc_type()) { ++ case SOC_TYPE_VR9: ++ gphy_fw_name_cfg = &xrx200a1x_gphy_data; ++ break; ++ case SOC_TYPE_VR9_2: ++ gphy_fw_name_cfg = &xrx200a2x_gphy_data; ++ break; ++ } ++ + priv->gphy_clk_gate = devm_clk_get(dev, NULL); + if (IS_ERR(priv->gphy_clk_gate)) { + dev_err(dev, "Failed to lookup gate clock\n"); diff --git a/target/linux/lantiq/patches-4.14/0025-NET-MIPS-lantiq-adds-xrx200-net.patch b/target/linux/lantiq/patches-4.14/0025-NET-MIPS-lantiq-adds-xrx200-net.patch new file mode 100644 index 000000000..7eaf0b7b7 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0025-NET-MIPS-lantiq-adds-xrx200-net.patch @@ -0,0 +1,3430 @@ +From fb0c9601f4414c39ff68e26b88681bef0bb04954 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 22 Oct 2012 12:22:23 +0200 +Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net + +--- + drivers/net/ethernet/Kconfig | 8 +- + drivers/net/ethernet/Makefile | 1 + + drivers/net/ethernet/lantiq_pce.h | 163 +++ + drivers/net/ethernet/lantiq_xrx200.c | 1798 +++++++++++++++++++++++++++++++ + drivers/net/ethernet/lantiq_xrx200_sw.h | 1328 +++++++++++++++++++++++ + 5 files changed, 3297 insertions(+), 1 deletion(-) + create mode 100644 drivers/net/ethernet/lantiq_pce.h + create mode 100644 drivers/net/ethernet/lantiq_xrx200.c + create mode 100644 drivers/net/ethernet/lantiq_xrx200_sw.h + +--- a/drivers/net/ethernet/Kconfig ++++ b/drivers/net/ethernet/Kconfig +@@ -107,7 +107,13 @@ config LANTIQ_ETOP + tristate "Lantiq SoC ETOP driver" + depends on SOC_TYPE_XWAY + ---help--- +- Support for the MII0 inside the Lantiq SoC ++ Support for the MII0 inside the Lantiq ADSL SoC ++ ++config LANTIQ_XRX200 ++ tristate "Lantiq SoC XRX200 driver" ++ depends on SOC_TYPE_XWAY ++ ---help--- ++ Support for the MII0 inside the Lantiq VDSL SoC + + source "drivers/net/ethernet/marvell/Kconfig" + source "drivers/net/ethernet/mediatek/Kconfig" +--- a/drivers/net/ethernet/Makefile ++++ b/drivers/net/ethernet/Makefile +@@ -50,6 +50,7 @@ obj-$(CONFIG_NET_VENDOR_XSCALE) += xscal + obj-$(CONFIG_JME) += jme.o + obj-$(CONFIG_KORINA) += korina.o + obj-$(CONFIG_LANTIQ_ETOP) += lantiq_etop.o ++obj-$(CONFIG_LANTIQ_XRX200) += lantiq_xrx200.o + obj-$(CONFIG_NET_VENDOR_MARVELL) += marvell/ + obj-$(CONFIG_NET_VENDOR_MEDIATEK) += mediatek/ + obj-$(CONFIG_NET_VENDOR_MELLANOX) += mellanox/ +--- /dev/null ++++ b/drivers/net/ethernet/lantiq_pce.h +@@ -0,0 +1,163 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Copyright (C) 2010 Lantiq Deutschland GmbH ++ * Copyright (C) 2012 John Crispin ++ * ++ * PCE microcode extracted from UGW5.2 switch api ++ */ ++ ++/* Switch API Micro Code V0.3 */ ++enum { ++ OUT_MAC0 = 0, ++ OUT_MAC1, ++ OUT_MAC2, ++ OUT_MAC3, ++ OUT_MAC4, ++ OUT_MAC5, ++ OUT_ETHTYP, ++ OUT_VTAG0, ++ OUT_VTAG1, ++ OUT_ITAG0, ++ OUT_ITAG1, /*10 */ ++ OUT_ITAG2, ++ OUT_ITAG3, ++ OUT_IP0, ++ OUT_IP1, ++ OUT_IP2, ++ OUT_IP3, ++ OUT_SIP0, ++ OUT_SIP1, ++ OUT_SIP2, ++ OUT_SIP3, /*20*/ ++ OUT_SIP4, ++ OUT_SIP5, ++ OUT_SIP6, ++ OUT_SIP7, ++ OUT_DIP0, ++ OUT_DIP1, ++ OUT_DIP2, ++ OUT_DIP3, ++ OUT_DIP4, ++ OUT_DIP5, /*30*/ ++ OUT_DIP6, ++ OUT_DIP7, ++ OUT_SESID, ++ OUT_PROT, ++ OUT_APP0, ++ OUT_APP1, ++ OUT_IGMP0, ++ OUT_IGMP1, ++ OUT_IPOFF, /*39*/ ++ OUT_NONE = 63 ++}; ++ ++/* parser's microcode length type */ ++#define INSTR 0 ++#define IPV6 1 ++#define LENACCU 2 ++ ++/* parser's microcode flag type */ ++enum { ++ FLAG_ITAG = 0, ++ FLAG_VLAN, ++ FLAG_SNAP, ++ FLAG_PPPOE, ++ FLAG_IPV6, ++ FLAG_IPV6FL, ++ FLAG_IPV4, ++ FLAG_IGMP, ++ FLAG_TU, ++ FLAG_HOP, ++ FLAG_NN1, /*10 */ ++ FLAG_NN2, ++ FLAG_END, ++ FLAG_NO, /*13*/ ++}; ++ ++/* Micro code version V2_11 (extension for parsing IPv6 in PPPoE) */ ++#define MC_ENTRY(val, msk, ns, out, len, type, flags, ipv4_len) \ ++ { {val, msk, (ns<<10 | out<<4 | len>>1), (len&1)<<15 | type<<13 | flags<<9 | ipv4_len<<8 }} ++struct pce_microcode { ++ unsigned short val[4]; ++/* unsigned short val_2; ++ unsigned short val_1; ++ unsigned short val_0;*/ ++} pce_microcode[] = { ++ /* value mask ns fields L type flags ipv4_len */ ++ MC_ENTRY(0x88c3, 0xFFFF, 1, OUT_ITAG0, 4, INSTR, FLAG_ITAG, 0), ++ MC_ENTRY(0x8100, 0xFFFF, 2, OUT_VTAG0, 2, INSTR, FLAG_VLAN, 0), ++ MC_ENTRY(0x88A8, 0xFFFF, 1, OUT_VTAG0, 2, INSTR, FLAG_VLAN, 0), ++ MC_ENTRY(0x8100, 0xFFFF, 1, OUT_VTAG0, 2, INSTR, FLAG_VLAN, 0), ++ MC_ENTRY(0x8864, 0xFFFF, 17, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0800, 0xFFFF, 21, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x86DD, 0xFFFF, 22, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x8863, 0xFFFF, 16, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0xF800, 10, OUT_NONE, 0, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 38, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0600, 0x0600, 38, OUT_ETHTYP, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 12, OUT_NONE, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0xAAAA, 0xFFFF, 14, OUT_NONE, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0300, 0xFF00, 39, OUT_NONE, 0, INSTR, FLAG_SNAP, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_DIP7, 3, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 18, OUT_DIP7, 3, INSTR, FLAG_PPPOE, 0), ++ MC_ENTRY(0x0021, 0xFFFF, 21, OUT_NONE, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0057, 0xFFFF, 22, OUT_NONE, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x4000, 0xF000, 24, OUT_IP0, 4, INSTR, FLAG_IPV4, 1), ++ MC_ENTRY(0x6000, 0xF000, 27, OUT_IP0, 3, INSTR, FLAG_IPV6, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 25, OUT_IP3, 2, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 26, OUT_SIP0, 4, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 38, OUT_NONE, 0, LENACCU, FLAG_NO, 0), ++ MC_ENTRY(0x1100, 0xFF00, 37, OUT_PROT, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0600, 0xFF00, 37, OUT_PROT, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0xFF00, 33, OUT_IP3, 17, INSTR, FLAG_HOP, 0), ++ MC_ENTRY(0x2B00, 0xFF00, 33, OUT_IP3, 17, INSTR, FLAG_NN1, 0), ++ MC_ENTRY(0x3C00, 0xFF00, 33, OUT_IP3, 17, INSTR, FLAG_NN2, 0), ++ MC_ENTRY(0x0000, 0x0000, 37, OUT_PROT, 1, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0xFF00, 33, OUT_NONE, 0, IPV6, FLAG_HOP, 0), ++ MC_ENTRY(0x2B00, 0xFF00, 33, OUT_NONE, 0, IPV6, FLAG_NN1, 0), ++ MC_ENTRY(0x3C00, 0xFF00, 33, OUT_NONE, 0, IPV6, FLAG_NN2, 0), ++ MC_ENTRY(0x0000, 0x0000, 38, OUT_PROT, 1, IPV6, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 38, OUT_SIP0, 16, INSTR, FLAG_NO, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_APP0, 4, INSTR, FLAG_IGMP, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++ MC_ENTRY(0x0000, 0x0000, 39, OUT_NONE, 0, INSTR, FLAG_END, 0), ++}; +--- /dev/null ++++ b/drivers/net/ethernet/lantiq_xrx200.c +@@ -0,0 +1,1887 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Copyright (C) 2010 Lantiq Deutschland ++ * Copyright (C) 2012 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "lantiq_pce.h" ++#include "lantiq_xrx200_sw.h" ++ ++#define SW_POLLING ++#define SW_ROUTING ++ ++#ifdef SW_ROUTING ++#define XRX200_MAX_DEV 2 ++#else ++#define XRX200_MAX_DEV 1 ++#endif ++ ++#define XRX200_MAX_VLAN 64 ++#define XRX200_PCE_ACTVLAN_IDX 0x01 ++#define XRX200_PCE_VLANMAP_IDX 0x02 ++ ++#define XRX200_MAX_PORT 7 ++#define XRX200_MAX_DMA 8 ++ ++#define XRX200_HEADROOM 4 ++ ++#define XRX200_TX_TIMEOUT (10 * HZ) ++ ++/* port type */ ++#define XRX200_PORT_TYPE_PHY 1 ++#define XRX200_PORT_TYPE_MAC 2 ++ ++/* DMA */ ++#define XRX200_DMA_DATA_LEN 0x600 ++#define XRX200_DMA_IRQ INT_NUM_IM2_IRL0 ++#define XRX200_DMA_RX 0 ++#define XRX200_DMA_TX 1 ++#define XRX200_DMA_TX_2 3 ++#define XRX200_DMA_IS_TX(x) (x%2) ++#define XRX200_DMA_IS_RX(x) (!XRX200_DMA_IS_TX(x)) ++ ++/* fetch / store dma */ ++#define FDMA_PCTRL0 0x2A00 ++#define FDMA_PCTRLx(x) (FDMA_PCTRL0 + (x * 0x18)) ++#define SDMA_PCTRL0 0x2F00 ++#define SDMA_PCTRLx(x) (SDMA_PCTRL0 + (x * 0x18)) ++ ++/* buffer management */ ++#define BM_PCFG0 0x200 ++#define BM_PCFGx(x) (BM_PCFG0 + (x * 8)) ++ ++/* MDIO */ ++#define MDIO_GLOB 0x0000 ++#define MDIO_CTRL 0x0020 ++#define MDIO_READ 0x0024 ++#define MDIO_WRITE 0x0028 ++#define MDIO_PHY0 0x0054 ++#define MDIO_PHY(x) (0x0054 - (x * sizeof(unsigned))) ++#define MDIO_CLK_CFG0 0x002C ++#define MDIO_CLK_CFG1 0x0030 ++ ++#define MDIO_GLOB_ENABLE 0x8000 ++#define MDIO_BUSY BIT(12) ++#define MDIO_RD BIT(11) ++#define MDIO_WR BIT(10) ++#define MDIO_MASK 0x1f ++#define MDIO_ADDRSHIFT 5 ++#define MDIO1_25MHZ 9 ++ ++#define MDIO_PHY_LINK_DOWN 0x4000 ++#define MDIO_PHY_LINK_UP 0x2000 ++ ++#define MDIO_PHY_SPEED_M10 0x0000 ++#define MDIO_PHY_SPEED_M100 0x0800 ++#define MDIO_PHY_SPEED_G1 0x1000 ++ ++#define MDIO_PHY_FDUP_EN 0x0200 ++#define MDIO_PHY_FDUP_DIS 0x0600 ++ ++#define MDIO_PHY_LINK_MASK 0x6000 ++#define MDIO_PHY_SPEED_MASK 0x1800 ++#define MDIO_PHY_FDUP_MASK 0x0600 ++#define MDIO_PHY_ADDR_MASK 0x001f ++#define MDIO_UPDATE_MASK MDIO_PHY_ADDR_MASK | MDIO_PHY_LINK_MASK | \ ++ MDIO_PHY_SPEED_MASK | MDIO_PHY_FDUP_MASK ++ ++/* MII */ ++#define MII_CFG(p) (p * 8) ++ ++#define MII_CFG_EN BIT(14) ++ ++#define MII_CFG_MODE_MIIP 0x0 ++#define MII_CFG_MODE_MIIM 0x1 ++#define MII_CFG_MODE_RMIIP 0x2 ++#define MII_CFG_MODE_RMIIM 0x3 ++#define MII_CFG_MODE_RGMII 0x4 ++#define MII_CFG_MODE_MASK 0xf ++ ++#define MII_CFG_RATE_M2P5 0x00 ++#define MII_CFG_RATE_M25 0x10 ++#define MII_CFG_RATE_M125 0x20 ++#define MII_CFG_RATE_M50 0x30 ++#define MII_CFG_RATE_AUTO 0x40 ++#define MII_CFG_RATE_MASK 0x70 ++ ++/* cpu port mac */ ++#define PMAC_HD_CTL 0x0000 ++#define PMAC_RX_IPG 0x0024 ++#define PMAC_EWAN 0x002c ++ ++#define PMAC_IPG_MASK 0xf ++#define PMAC_HD_CTL_AS 0x0008 ++#define PMAC_HD_CTL_AC 0x0004 ++#define PMAC_HD_CTL_RC 0x0010 ++#define PMAC_HD_CTL_RXSH 0x0040 ++#define PMAC_HD_CTL_AST 0x0080 ++#define PMAC_HD_CTL_RST 0x0100 ++ ++/* PCE */ ++#define PCE_TBL_KEY(x) (0x1100 + ((7 - x) * 4)) ++#define PCE_TBL_MASK 0x1120 ++#define PCE_TBL_VAL(x) (0x1124 + ((4 - x) * 4)) ++#define PCE_TBL_ADDR 0x1138 ++#define PCE_TBL_CTRL 0x113c ++#define PCE_PMAP1 0x114c ++#define PCE_PMAP2 0x1150 ++#define PCE_PMAP3 0x1154 ++#define PCE_GCTRL_REG(x) (0x1158 + (x * 4)) ++#define PCE_PCTRL_REG(p, x) (0x1200 + (((p * 0xa) + x) * 4)) ++ ++#define PCE_TBL_BUSY BIT(15) ++#define PCE_TBL_CFG_ADDR_MASK 0x1f ++#define PCE_TBL_CFG_ADWR 0x20 ++#define PCE_TBL_CFG_ADWR_MASK 0x60 ++#define PCE_INGRESS BIT(11) ++ ++/* MAC */ ++#define MAC_FLEN_REG (0x2314) ++#define MAC_CTRL_REG(p, x) (0x240c + (((p * 0xc) + x) * 4)) ++ ++/* buffer management */ ++#define BM_PCFG(p) (0x200 + (p * 8)) ++ ++/* special tag in TX path header */ ++#define SPID_SHIFT 24 ++#define DPID_SHIFT 16 ++#define DPID_ENABLE 1 ++#define SPID_CPU_PORT 2 ++#define PORT_MAP_SEL BIT(15) ++#define PORT_MAP_EN BIT(14) ++#define PORT_MAP_SHIFT 1 ++#define PORT_MAP_MASK 0x3f ++ ++#define SPPID_MASK 0x7 ++#define SPPID_SHIFT 4 ++ ++/* MII regs not yet in linux */ ++#define MDIO_DEVAD_NONE (-1) ++#define ADVERTIZE_MPD (1 << 10) ++ ++struct xrx200_port { ++ u8 num; ++ u8 phy_addr; ++ u16 flags; ++ phy_interface_t phy_if; ++ ++ int link; ++ int gpio; ++ enum of_gpio_flags gpio_flags; ++ ++ struct phy_device *phydev; ++ struct device_node *phy_node; ++}; ++ ++struct xrx200_chan { ++ int idx; ++ int refcount; ++ int tx_free; ++ ++ struct net_device dummy_dev; ++ struct net_device *devs[XRX200_MAX_DEV]; ++ ++ struct tasklet_struct tasklet; ++ struct napi_struct napi; ++ struct ltq_dma_channel dma; ++ struct sk_buff *skb[LTQ_DESC_NUM]; ++ ++ spinlock_t lock; ++}; ++ ++struct xrx200_hw { ++ struct clk *clk; ++ struct mii_bus *mii_bus; ++ ++ struct xrx200_chan chan[XRX200_MAX_DMA]; ++ u16 vlan_vid[XRX200_MAX_VLAN]; ++ u16 vlan_port_map[XRX200_MAX_VLAN]; ++ ++ struct net_device *devs[XRX200_MAX_DEV]; ++ int num_devs; ++ ++ int port_map[XRX200_MAX_PORT]; ++ unsigned short wan_map; ++ ++ struct switch_dev swdev; ++}; ++ ++struct xrx200_priv { ++ struct net_device_stats stats; ++ int id; ++ ++ struct xrx200_port port[XRX200_MAX_PORT]; ++ int num_port; ++ bool wan; ++ bool sw; ++ unsigned short port_map; ++ unsigned char mac[6]; ++ ++ struct xrx200_hw *hw; ++}; ++ ++static __iomem void *xrx200_switch_membase; ++static __iomem void *xrx200_mii_membase; ++static __iomem void *xrx200_mdio_membase; ++static __iomem void *xrx200_pmac_membase; ++ ++#define ltq_switch_r32(x) ltq_r32(xrx200_switch_membase + (x)) ++#define ltq_switch_w32(x, y) ltq_w32(x, xrx200_switch_membase + (y)) ++#define ltq_switch_w32_mask(x, y, z) \ ++ ltq_w32_mask(x, y, xrx200_switch_membase + (z)) ++ ++#define ltq_mdio_r32(x) ltq_r32(xrx200_mdio_membase + (x)) ++#define ltq_mdio_w32(x, y) ltq_w32(x, xrx200_mdio_membase + (y)) ++#define ltq_mdio_w32_mask(x, y, z) \ ++ ltq_w32_mask(x, y, xrx200_mdio_membase + (z)) ++ ++#define ltq_mii_r32(x) ltq_r32(xrx200_mii_membase + (x)) ++#define ltq_mii_w32(x, y) ltq_w32(x, xrx200_mii_membase + (y)) ++#define ltq_mii_w32_mask(x, y, z) \ ++ ltq_w32_mask(x, y, xrx200_mii_membase + (z)) ++ ++#define ltq_pmac_r32(x) ltq_r32(xrx200_pmac_membase + (x)) ++#define ltq_pmac_w32(x, y) ltq_w32(x, xrx200_pmac_membase + (y)) ++#define ltq_pmac_w32_mask(x, y, z) \ ++ ltq_w32_mask(x, y, xrx200_pmac_membase + (z)) ++ ++#define XRX200_GLOBAL_REGATTR(reg) \ ++ .id = reg, \ ++ .type = SWITCH_TYPE_INT, \ ++ .set = xrx200_set_global_attr, \ ++ .get = xrx200_get_global_attr ++ ++#define XRX200_PORT_REGATTR(reg) \ ++ .id = reg, \ ++ .type = SWITCH_TYPE_INT, \ ++ .set = xrx200_set_port_attr, \ ++ .get = xrx200_get_port_attr ++ ++static int xrx200sw_read_x(int reg, int x) ++{ ++ int value, mask, addr; ++ ++ addr = xrx200sw_reg[reg].offset + (xrx200sw_reg[reg].mult * x); ++ value = ltq_switch_r32(addr); ++ mask = (1 << xrx200sw_reg[reg].size) - 1; ++ value = (value >> xrx200sw_reg[reg].shift); ++ ++ return (value & mask); ++} ++ ++static int xrx200sw_read(int reg) ++{ ++ return xrx200sw_read_x(reg, 0); ++} ++ ++static void xrx200sw_write_x(int value, int reg, int x) ++{ ++ int mask, addr; ++ ++ addr = xrx200sw_reg[reg].offset + (xrx200sw_reg[reg].mult * x); ++ mask = (1 << xrx200sw_reg[reg].size) - 1; ++ mask = (mask << xrx200sw_reg[reg].shift); ++ value = (value << xrx200sw_reg[reg].shift) & mask; ++ ++ ltq_switch_w32_mask(mask, value, addr); ++} ++ ++static void xrx200sw_write(int value, int reg) ++{ ++ xrx200sw_write_x(value, reg, 0); ++} ++ ++struct xrx200_pce_table_entry { ++ int index; // PCE_TBL_ADDR.ADDR = pData->table_index ++ int table; // PCE_TBL_CTRL.ADDR = pData->table ++ unsigned short key[8]; ++ unsigned short val[5]; ++ unsigned short mask; ++ unsigned short type; ++ unsigned short valid; ++ unsigned short gmap; ++}; ++ ++static int xrx200_pce_table_entry_read(struct xrx200_pce_table_entry *tbl) ++{ ++ // wait until hardware is ready ++ while (xrx200sw_read(XRX200_PCE_TBL_CTRL_BAS)) {}; ++ ++ // prepare the table access: ++ // PCE_TBL_ADDR.ADDR = pData->table_index ++ xrx200sw_write(tbl->index, XRX200_PCE_TBL_ADDR_ADDR); ++ // PCE_TBL_CTRL.ADDR = pData->table ++ xrx200sw_write(tbl->table, XRX200_PCE_TBL_CTRL_ADDR); ++ ++ //(address-based read) ++ xrx200sw_write(0, XRX200_PCE_TBL_CTRL_OPMOD); // OPMOD_ADRD ++ ++ xrx200sw_write(1, XRX200_PCE_TBL_CTRL_BAS); // start access ++ ++ // wait until hardware is ready ++ while (xrx200sw_read(XRX200_PCE_TBL_CTRL_BAS)) {}; ++ ++ // read the keys ++ tbl->key[7] = xrx200sw_read(XRX200_PCE_TBL_KEY_7); ++ tbl->key[6] = xrx200sw_read(XRX200_PCE_TBL_KEY_6); ++ tbl->key[5] = xrx200sw_read(XRX200_PCE_TBL_KEY_5); ++ tbl->key[4] = xrx200sw_read(XRX200_PCE_TBL_KEY_4); ++ tbl->key[3] = xrx200sw_read(XRX200_PCE_TBL_KEY_3); ++ tbl->key[2] = xrx200sw_read(XRX200_PCE_TBL_KEY_2); ++ tbl->key[1] = xrx200sw_read(XRX200_PCE_TBL_KEY_1); ++ tbl->key[0] = xrx200sw_read(XRX200_PCE_TBL_KEY_0); ++ ++ // read the values ++ tbl->val[4] = xrx200sw_read(XRX200_PCE_TBL_VAL_4); ++ tbl->val[3] = xrx200sw_read(XRX200_PCE_TBL_VAL_3); ++ tbl->val[2] = xrx200sw_read(XRX200_PCE_TBL_VAL_2); ++ tbl->val[1] = xrx200sw_read(XRX200_PCE_TBL_VAL_1); ++ tbl->val[0] = xrx200sw_read(XRX200_PCE_TBL_VAL_0); ++ ++ // read the mask ++ tbl->mask = xrx200sw_read(XRX200_PCE_TBL_MASK_0); ++ // read the type ++ tbl->type = xrx200sw_read(XRX200_PCE_TBL_CTRL_TYPE); ++ // read the valid flag ++ tbl->valid = xrx200sw_read(XRX200_PCE_TBL_CTRL_VLD); ++ // read the group map ++ tbl->gmap = xrx200sw_read(XRX200_PCE_TBL_CTRL_GMAP); ++ ++ return 0; ++} ++ ++static int xrx200_pce_table_entry_write(struct xrx200_pce_table_entry *tbl) ++{ ++ // wait until hardware is ready ++ while (xrx200sw_read(XRX200_PCE_TBL_CTRL_BAS)) {}; ++ ++ // prepare the table access: ++ // PCE_TBL_ADDR.ADDR = pData->table_index ++ xrx200sw_write(tbl->index, XRX200_PCE_TBL_ADDR_ADDR); ++ // PCE_TBL_CTRL.ADDR = pData->table ++ xrx200sw_write(tbl->table, XRX200_PCE_TBL_CTRL_ADDR); ++ ++ //(address-based write) ++ xrx200sw_write(1, XRX200_PCE_TBL_CTRL_OPMOD); // OPMOD_ADRD ++ ++ // read the keys ++ xrx200sw_write(tbl->key[7], XRX200_PCE_TBL_KEY_7); ++ xrx200sw_write(tbl->key[6], XRX200_PCE_TBL_KEY_6); ++ xrx200sw_write(tbl->key[5], XRX200_PCE_TBL_KEY_5); ++ xrx200sw_write(tbl->key[4], XRX200_PCE_TBL_KEY_4); ++ xrx200sw_write(tbl->key[3], XRX200_PCE_TBL_KEY_3); ++ xrx200sw_write(tbl->key[2], XRX200_PCE_TBL_KEY_2); ++ xrx200sw_write(tbl->key[1], XRX200_PCE_TBL_KEY_1); ++ xrx200sw_write(tbl->key[0], XRX200_PCE_TBL_KEY_0); ++ ++ // read the values ++ xrx200sw_write(tbl->val[4], XRX200_PCE_TBL_VAL_4); ++ xrx200sw_write(tbl->val[3], XRX200_PCE_TBL_VAL_3); ++ xrx200sw_write(tbl->val[2], XRX200_PCE_TBL_VAL_2); ++ xrx200sw_write(tbl->val[1], XRX200_PCE_TBL_VAL_1); ++ xrx200sw_write(tbl->val[0], XRX200_PCE_TBL_VAL_0); ++ ++ // read the mask ++ xrx200sw_write(tbl->mask, XRX200_PCE_TBL_MASK_0); ++ // read the type ++ xrx200sw_write(tbl->type, XRX200_PCE_TBL_CTRL_TYPE); ++ // read the valid flag ++ xrx200sw_write(tbl->valid, XRX200_PCE_TBL_CTRL_VLD); ++ // read the group map ++ xrx200sw_write(tbl->gmap, XRX200_PCE_TBL_CTRL_GMAP); ++ ++ xrx200sw_write(1, XRX200_PCE_TBL_CTRL_BAS); // start access ++ ++ // wait until hardware is ready ++ while (xrx200sw_read(XRX200_PCE_TBL_CTRL_BAS)) {}; ++ ++ return 0; ++} ++ ++static void xrx200sw_fixup_pvids(void) ++{ ++ int index, p, portmap, untagged; ++ struct xrx200_pce_table_entry tem; ++ struct xrx200_pce_table_entry tev; ++ ++ portmap = 0; ++ for (p = 0; p < XRX200_MAX_PORT; p++) ++ portmap |= BIT(p); ++ ++ tem.table = XRX200_PCE_VLANMAP_IDX; ++ tev.table = XRX200_PCE_ACTVLAN_IDX; ++ ++ for (index = XRX200_MAX_VLAN; index-- > 0;) ++ { ++ tev.index = index; ++ xrx200_pce_table_entry_read(&tev); ++ ++ if (tev.valid == 0) ++ continue; ++ ++ tem.index = index; ++ xrx200_pce_table_entry_read(&tem); ++ ++ if (tem.val[0] == 0) ++ continue; ++ ++ untagged = portmap & (tem.val[1] ^ tem.val[2]); ++ ++ for (p = 0; p < XRX200_MAX_PORT; p++) ++ if (untagged & BIT(p)) ++ { ++ portmap &= ~BIT(p); ++ xrx200sw_write_x(index, XRX200_PCE_DEFPVID_PVID, p); ++ } ++ ++ for (p = 0; p < XRX200_MAX_PORT; p++) ++ if (portmap & BIT(p)) ++ xrx200sw_write_x(index, XRX200_PCE_DEFPVID_PVID, p); ++ } ++} ++ ++// swconfig interface ++static void xrx200_hw_init(struct xrx200_hw *hw); ++ ++// global ++static int xrx200sw_reset_switch(struct switch_dev *dev) ++{ ++ struct xrx200_hw *hw = container_of(dev, struct xrx200_hw, swdev); ++ ++ xrx200_hw_init(hw); ++ ++ return 0; ++} ++ ++static int xrx200_set_vlan_mode_enable(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) ++{ ++ int p; ++ ++ if ((attr->max > 0) && (val->value.i > attr->max)) ++ return -EINVAL; ++ ++ for (p = 0; p < XRX200_MAX_PORT; p++) { ++ xrx200sw_write_x(val->value.i, XRX200_PCE_VCTRL_VEMR, p); ++ xrx200sw_write_x(val->value.i, XRX200_PCE_VCTRL_VIMR, p); ++ } ++ ++ xrx200sw_write(val->value.i, XRX200_PCE_GCTRL_0_VLAN); ++ return 0; ++} ++ ++static int xrx200_get_vlan_mode_enable(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) ++{ ++ val->value.i = xrx200sw_read(attr->id); ++ return 0; ++} ++ ++static int xrx200_set_global_attr(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) ++{ ++ if ((attr->max > 0) && (val->value.i > attr->max)) ++ return -EINVAL; ++ ++ xrx200sw_write(val->value.i, attr->id); ++ return 0; ++} ++ ++static int xrx200_get_global_attr(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) ++{ ++ val->value.i = xrx200sw_read(attr->id); ++ return 0; ++} ++ ++// vlan ++static int xrx200sw_set_vlan_vid(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct xrx200_hw *hw = container_of(dev, struct xrx200_hw, swdev); ++ int i; ++ struct xrx200_pce_table_entry tev; ++ struct xrx200_pce_table_entry tem; ++ ++ tev.table = XRX200_PCE_ACTVLAN_IDX; ++ ++ for (i = 0; i < XRX200_MAX_VLAN; i++) ++ { ++ tev.index = i; ++ xrx200_pce_table_entry_read(&tev); ++ if (tev.key[0] == val->value.i && i != val->port_vlan) ++ return -EINVAL; ++ } ++ ++ hw->vlan_vid[val->port_vlan] = val->value.i; ++ ++ tev.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&tev); ++ tev.key[0] = val->value.i; ++ tev.valid = val->value.i > 0; ++ xrx200_pce_table_entry_write(&tev); ++ ++ tem.table = XRX200_PCE_VLANMAP_IDX; ++ tem.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&tem); ++ tem.val[0] = val->value.i; ++ xrx200_pce_table_entry_write(&tem); ++ ++ xrx200sw_fixup_pvids(); ++ return 0; ++} ++ ++static int xrx200sw_get_vlan_vid(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct xrx200_pce_table_entry te; ++ ++ te.table = XRX200_PCE_ACTVLAN_IDX; ++ te.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&te); ++ val->value.i = te.key[0]; ++ ++ return 0; ++} ++ ++static int xrx200sw_set_vlan_ports(struct switch_dev *dev, struct switch_val *val) ++{ ++ struct xrx200_hw *hw = container_of(dev, struct xrx200_hw, swdev); ++ int i, portmap, tagmap, untagged; ++ struct xrx200_pce_table_entry tem; ++ ++ portmap = 0; ++ tagmap = 0; ++ for (i = 0; i < val->len; i++) ++ { ++ struct switch_port *p = &val->value.ports[i]; ++ ++ portmap |= (1 << p->id); ++ if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ++ tagmap |= (1 << p->id); ++ } ++ ++ tem.table = XRX200_PCE_VLANMAP_IDX; ++ ++ untagged = portmap ^ tagmap; ++ for (i = 0; i < XRX200_MAX_VLAN; i++) ++ { ++ tem.index = i; ++ xrx200_pce_table_entry_read(&tem); ++ ++ if (tem.val[0] == 0) ++ continue; ++ ++ if ((untagged & (tem.val[1] ^ tem.val[2])) && (val->port_vlan != i)) ++ return -EINVAL; ++ } ++ ++ tem.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&tem); ++ ++ // auto-enable this vlan if not enabled already ++ if (tem.val[0] == 0) ++ { ++ struct switch_val v; ++ v.port_vlan = val->port_vlan; ++ v.value.i = val->port_vlan; ++ if(xrx200sw_set_vlan_vid(dev, NULL, &v)) ++ return -EINVAL; ++ ++ //read updated tem ++ tem.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&tem); ++ } ++ ++ tem.val[1] = portmap; ++ tem.val[2] = tagmap; ++ xrx200_pce_table_entry_write(&tem); ++ ++ ltq_switch_w32_mask(0, portmap, PCE_PMAP2); ++ ltq_switch_w32_mask(0, portmap, PCE_PMAP3); ++ hw->vlan_port_map[val->port_vlan] = portmap; ++ ++ xrx200sw_fixup_pvids(); ++ ++ return 0; ++} ++ ++static int xrx200sw_get_vlan_ports(struct switch_dev *dev, struct switch_val *val) ++{ ++ int i; ++ unsigned short ports, tags; ++ struct xrx200_pce_table_entry tem; ++ ++ tem.table = XRX200_PCE_VLANMAP_IDX; ++ tem.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&tem); ++ ++ ports = tem.val[1]; ++ tags = tem.val[2]; ++ ++ for (i = 0; i < XRX200_MAX_PORT; i++) { ++ struct switch_port *p; ++ ++ if (!(ports & (1 << i))) ++ continue; ++ ++ p = &val->value.ports[val->len++]; ++ p->id = i; ++ if (tags & (1 << i)) ++ p->flags = (1 << SWITCH_PORT_FLAG_TAGGED); ++ else ++ p->flags = 0; ++ } ++ ++ return 0; ++} ++ ++static int xrx200sw_set_vlan_enable(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct xrx200_pce_table_entry tev; ++ ++ tev.table = XRX200_PCE_ACTVLAN_IDX; ++ tev.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&tev); ++ ++ if (tev.key[0] == 0) ++ return -EINVAL; ++ ++ tev.valid = val->value.i; ++ xrx200_pce_table_entry_write(&tev); ++ ++ xrx200sw_fixup_pvids(); ++ return 0; ++} ++ ++static int xrx200sw_get_vlan_enable(struct switch_dev *dev, const struct switch_attr *attr, ++ struct switch_val *val) ++{ ++ struct xrx200_pce_table_entry tev; ++ ++ tev.table = XRX200_PCE_ACTVLAN_IDX; ++ tev.index = val->port_vlan; ++ xrx200_pce_table_entry_read(&tev); ++ val->value.i = tev.valid; ++ ++ return 0; ++} ++ ++// port ++static int xrx200sw_get_port_pvid(struct switch_dev *dev, int port, int *val) ++{ ++ struct xrx200_pce_table_entry tev; ++ ++ if (port >= XRX200_MAX_PORT) ++ return -EINVAL; ++ ++ tev.table = XRX200_PCE_ACTVLAN_IDX; ++ tev.index = xrx200sw_read_x(XRX200_PCE_DEFPVID_PVID, port); ++ xrx200_pce_table_entry_read(&tev); ++ ++ *val = tev.key[0]; ++ return 0; ++} ++ ++static int xrx200sw_get_port_link(struct switch_dev *dev, ++ int port, ++ struct switch_port_link *link) ++{ ++ if (port >= XRX200_MAX_PORT) ++ return -EINVAL; ++ ++ link->link = xrx200sw_read_x(XRX200_MAC_PSTAT_LSTAT, port); ++ if (!link->link) ++ return 0; ++ ++ link->duplex = xrx200sw_read_x(XRX200_MAC_PSTAT_FDUP, port); ++ ++ link->rx_flow = !!(xrx200sw_read_x(XRX200_MAC_CTRL_0_FCON, port) && 0x0010); ++ link->tx_flow = !!(xrx200sw_read_x(XRX200_MAC_CTRL_0_FCON, port) && 0x0020); ++ link->aneg = !(xrx200sw_read_x(XRX200_MAC_CTRL_0_FCON, port)); ++ ++ link->speed = SWITCH_PORT_SPEED_10; ++ if (xrx200sw_read_x(XRX200_MAC_PSTAT_MBIT, port)) ++ link->speed = SWITCH_PORT_SPEED_100; ++ if (xrx200sw_read_x(XRX200_MAC_PSTAT_GBIT, port)) ++ link->speed = SWITCH_PORT_SPEED_1000; ++ ++ return 0; ++} ++ ++static int xrx200_set_port_attr(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) ++{ ++ if (val->port_vlan >= XRX200_MAX_PORT) ++ return -EINVAL; ++ ++ if ((attr->max > 0) && (val->value.i > attr->max)) ++ return -EINVAL; ++ ++ xrx200sw_write_x(val->value.i, attr->id, val->port_vlan); ++ return 0; ++} ++ ++static int xrx200_get_port_attr(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) ++{ ++ if (val->port_vlan >= XRX200_MAX_PORT) ++ return -EINVAL; ++ ++ val->value.i = xrx200sw_read_x(attr->id, val->port_vlan); ++ return 0; ++} ++ ++// attributes ++static struct switch_attr xrx200sw_globals[] = { ++ { ++ .type = SWITCH_TYPE_INT, ++ .set = xrx200_set_vlan_mode_enable, ++ .get = xrx200_get_vlan_mode_enable, ++ .name = "enable_vlan", ++ .description = "Enable VLAN mode", ++ .max = 1}, ++}; ++ ++static struct switch_attr xrx200sw_port[] = { ++ { ++ XRX200_PORT_REGATTR(XRX200_PCE_VCTRL_UVR), ++ .name = "uvr", ++ .description = "Unknown VLAN Rule", ++ .max = 1, ++ }, ++ { ++ XRX200_PORT_REGATTR(XRX200_PCE_VCTRL_VSR), ++ .name = "vsr", ++ .description = "VLAN Security Rule", ++ .max = 1, ++ }, ++ { ++ XRX200_PORT_REGATTR(XRX200_PCE_VCTRL_VINR), ++ .name = "vinr", ++ .description = "VLAN Ingress Tag Rule", ++ .max = 2, ++ }, ++ { ++ XRX200_PORT_REGATTR(XRX200_PCE_PCTRL_0_TVM), ++ .name = "tvm", ++ .description = "Transparent VLAN Mode", ++ .max = 1, ++ }, ++}; ++ ++static struct switch_attr xrx200sw_vlan[] = { ++ { ++ .type = SWITCH_TYPE_INT, ++ .name = "vid", ++ .description = "VLAN ID (0-4094)", ++ .set = xrx200sw_set_vlan_vid, ++ .get = xrx200sw_get_vlan_vid, ++ .max = 4094, ++ }, ++ { ++ .type = SWITCH_TYPE_INT, ++ .name = "enable", ++ .description = "Enable VLAN", ++ .set = xrx200sw_set_vlan_enable, ++ .get = xrx200sw_get_vlan_enable, ++ .max = 1, ++ }, ++}; ++ ++static const struct switch_dev_ops xrx200sw_ops = { ++ .attr_global = { ++ .attr = xrx200sw_globals, ++ .n_attr = ARRAY_SIZE(xrx200sw_globals), ++ }, ++ .attr_port = { ++ .attr = xrx200sw_port, ++ .n_attr = ARRAY_SIZE(xrx200sw_port), ++ }, ++ .attr_vlan = { ++ .attr = xrx200sw_vlan, ++ .n_attr = ARRAY_SIZE(xrx200sw_vlan), ++ }, ++ .get_vlan_ports = xrx200sw_get_vlan_ports, ++ .set_vlan_ports = xrx200sw_set_vlan_ports, ++ .get_port_pvid = xrx200sw_get_port_pvid, ++ .reset_switch = xrx200sw_reset_switch, ++ .get_port_link = xrx200sw_get_port_link, ++// .get_port_stats = xrx200sw_get_port_stats, //TODO ++}; ++ ++static int xrx200sw_init(struct xrx200_hw *hw) ++{ ++ int netdev_num; ++ ++ for (netdev_num = 0; netdev_num < hw->num_devs; netdev_num++) ++ { ++ struct switch_dev *swdev; ++ struct net_device *dev = hw->devs[netdev_num]; ++ struct xrx200_priv *priv = netdev_priv(dev); ++ if (!priv->sw) ++ continue; ++ ++ swdev = &hw->swdev; ++ ++ swdev->name = "Lantiq XRX200 Switch"; ++ swdev->vlans = XRX200_MAX_VLAN; ++ swdev->ports = XRX200_MAX_PORT; ++ swdev->cpu_port = 6; ++ swdev->ops = &xrx200sw_ops; ++ ++ register_switch(swdev, dev); ++ return 0; // enough switches ++ } ++ return 0; ++} ++ ++static int xrx200_open(struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ int i; ++ ++ for (i = 0; i < XRX200_MAX_DMA; i++) { ++ if (!priv->hw->chan[i].dma.irq) ++ continue; ++ spin_lock_bh(&priv->hw->chan[i].lock); ++ if (!priv->hw->chan[i].refcount) { ++ if (XRX200_DMA_IS_RX(i)) ++ napi_enable(&priv->hw->chan[i].napi); ++ ltq_dma_open(&priv->hw->chan[i].dma); ++ } ++ priv->hw->chan[i].refcount++; ++ spin_unlock_bh(&priv->hw->chan[i].lock); ++ } ++ for (i = 0; i < priv->num_port; i++) ++ if (priv->port[i].phydev) ++ phy_start(priv->port[i].phydev); ++ netif_wake_queue(dev); ++ ++ return 0; ++} ++ ++static int xrx200_close(struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ int i; ++ ++ netif_stop_queue(dev); ++ ++ for (i = 0; i < priv->num_port; i++) ++ if (priv->port[i].phydev) ++ phy_stop(priv->port[i].phydev); ++ ++ for (i = 0; i < XRX200_MAX_DMA; i++) { ++ if (!priv->hw->chan[i].dma.irq) ++ continue; ++ ++ priv->hw->chan[i].refcount--; ++ if (!priv->hw->chan[i].refcount) { ++ if (XRX200_DMA_IS_RX(i)) ++ napi_disable(&priv->hw->chan[i].napi); ++ spin_lock_bh(&priv->hw->chan[i].lock); ++ ltq_dma_close(&priv->hw->chan[XRX200_DMA_RX].dma); ++ spin_unlock_bh(&priv->hw->chan[i].lock); ++ } ++ } ++ ++ return 0; ++} ++ ++static int xrx200_alloc_skb(struct xrx200_chan *ch) ++{ ++#define DMA_PAD (NET_IP_ALIGN + NET_SKB_PAD) ++ ch->skb[ch->dma.desc] = dev_alloc_skb(XRX200_DMA_DATA_LEN + DMA_PAD); ++ if (!ch->skb[ch->dma.desc]) ++ goto skip; ++ ++ skb_reserve(ch->skb[ch->dma.desc], NET_SKB_PAD); ++ ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(NULL, ++ ch->skb[ch->dma.desc]->data, XRX200_DMA_DATA_LEN, ++ DMA_FROM_DEVICE); ++ ch->dma.desc_base[ch->dma.desc].addr = ++ CPHYSADDR(ch->skb[ch->dma.desc]->data); ++ skb_reserve(ch->skb[ch->dma.desc], NET_IP_ALIGN); ++ ++skip: ++ ch->dma.desc_base[ch->dma.desc].ctl = ++ LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | ++ XRX200_DMA_DATA_LEN; ++ ++ return 0; ++} ++ ++static void xrx200_hw_receive(struct xrx200_chan *ch, int id) ++{ ++ struct net_device *dev = ch->devs[id]; ++ struct xrx200_priv *priv = netdev_priv(dev); ++ struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; ++ struct sk_buff *skb = ch->skb[ch->dma.desc]; ++ int len = (desc->ctl & LTQ_DMA_SIZE_MASK); ++ int ret; ++ ++ ret = xrx200_alloc_skb(ch); ++ ++ ch->dma.desc++; ++ ch->dma.desc %= LTQ_DESC_NUM; ++ ++ if (ret) { ++ netdev_err(dev, ++ "failed to allocate new rx buffer\n"); ++ return; ++ } ++ ++ skb_put(skb, len); ++#ifdef SW_ROUTING ++ skb_pull(skb, 8); ++#endif ++ skb->dev = dev; ++ skb->protocol = eth_type_trans(skb, dev); ++ netif_receive_skb(skb); ++ priv->stats.rx_packets++; ++ priv->stats.rx_bytes+=len; ++} ++ ++static int xrx200_poll_rx(struct napi_struct *napi, int budget) ++{ ++ struct xrx200_chan *ch = container_of(napi, ++ struct xrx200_chan, napi); ++ struct xrx200_priv *priv = netdev_priv(ch->devs[0]); ++ int rx = 0; ++ int complete = 0; ++ ++ while ((rx < budget) && !complete) { ++ struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; ++ if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { ++#ifdef SW_ROUTING ++ struct sk_buff *skb = ch->skb[ch->dma.desc]; ++ u8 *special_tag = (u8*)skb->data; ++ int port = (special_tag[7] >> SPPID_SHIFT) & SPPID_MASK; ++ xrx200_hw_receive(ch, priv->hw->port_map[port]); ++#else ++ xrx200_hw_receive(ch, 0); ++#endif ++ rx++; ++ } else { ++ complete = 1; ++ } ++ } ++ ++ if (complete || !rx) { ++ napi_complete(&ch->napi); ++ ltq_dma_enable_irq(&ch->dma); ++ } ++ ++ return rx; ++} ++ ++static void xrx200_tx_housekeeping(unsigned long ptr) ++{ ++ struct xrx200_chan *ch = (struct xrx200_chan *) ptr; ++ int pkts = 0; ++ int i; ++ ++ spin_lock_bh(&ch->lock); ++ ltq_dma_ack_irq(&ch->dma); ++ while ((ch->dma.desc_base[ch->tx_free].ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { ++ struct sk_buff *skb = ch->skb[ch->tx_free]; ++ ++ pkts++; ++ ch->skb[ch->tx_free] = NULL; ++ dev_kfree_skb(skb); ++ memset(&ch->dma.desc_base[ch->tx_free], 0, ++ sizeof(struct ltq_dma_desc)); ++ ch->tx_free++; ++ ch->tx_free %= LTQ_DESC_NUM; ++ } ++ ltq_dma_enable_irq(&ch->dma); ++ spin_unlock_bh(&ch->lock); ++ ++ if (!pkts) ++ return; ++ ++ for (i = 0; i < XRX200_MAX_DEV && ch->devs[i]; i++) ++ netif_wake_queue(ch->devs[i]); ++} ++ ++static struct net_device_stats *xrx200_get_stats (struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ ++ return &priv->stats; ++} ++ ++static void xrx200_tx_timeout(struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ ++ printk(KERN_ERR "%s: transmit timed out, disable the dma channel irq\n", dev->name); ++ ++ priv->stats.tx_errors++; ++ netif_wake_queue(dev); ++} ++ ++static int xrx200_start_xmit(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ struct xrx200_chan *ch; ++ struct ltq_dma_desc *desc; ++ u32 byte_offset; ++ int ret = NETDEV_TX_OK; ++ int len; ++#ifdef SW_ROUTING ++ u32 special_tag = (SPID_CPU_PORT << SPID_SHIFT) | DPID_ENABLE; ++#endif ++ if(priv->id) ++ ch = &priv->hw->chan[XRX200_DMA_TX_2]; ++ else ++ ch = &priv->hw->chan[XRX200_DMA_TX]; ++ ++ desc = &ch->dma.desc_base[ch->dma.desc]; ++ ++ skb->dev = dev; ++ len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; ++ ++#ifdef SW_ROUTING ++ if (is_multicast_ether_addr(eth_hdr(skb)->h_dest)) { ++ u16 port_map = priv->port_map; ++ ++ if (priv->sw && skb->protocol == htons(ETH_P_8021Q)) { ++ u16 vid; ++ int i; ++ ++ port_map = 0; ++ if (!__vlan_get_tag(skb, &vid)) { ++ for (i = 0; i < XRX200_MAX_VLAN; i++) { ++ if (priv->hw->vlan_vid[i] != vid) ++ continue; ++ port_map = priv->hw->vlan_port_map[i]; ++ break; ++ } ++ } ++ } ++ ++ special_tag |= (port_map << PORT_MAP_SHIFT) | ++ PORT_MAP_SEL | PORT_MAP_EN; ++ } ++ if(priv->wan) ++ special_tag |= (1 << DPID_SHIFT); ++ if(skb_headroom(skb) < 4) { ++ struct sk_buff *tmp = skb_realloc_headroom(skb, 4); ++ dev_kfree_skb_any(skb); ++ skb = tmp; ++ } ++ skb_push(skb, 4); ++ memcpy(skb->data, &special_tag, sizeof(u32)); ++ len += 4; ++#endif ++ ++ /* dma needs to start on a 16 byte aligned address */ ++ byte_offset = CPHYSADDR(skb->data) % 16; ++ ++ spin_lock_bh(&ch->lock); ++ if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) { ++ netdev_err(dev, "tx ring full\n"); ++ netif_stop_queue(dev); ++ ret = NETDEV_TX_BUSY; ++ goto out; ++ } ++ ++ ch->skb[ch->dma.desc] = skb; ++ ++ netif_trans_update(dev); ++ ++ desc->addr = ((unsigned int) dma_map_single(NULL, skb->data, len, ++ DMA_TO_DEVICE)) - byte_offset; ++ wmb(); ++ desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | ++ LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK); ++ ch->dma.desc++; ++ ch->dma.desc %= LTQ_DESC_NUM; ++ if (ch->dma.desc == ch->tx_free) ++ netif_stop_queue(dev); ++ ++ ++ priv->stats.tx_packets++; ++ priv->stats.tx_bytes+=len; ++ ++out: ++ spin_unlock_bh(&ch->lock); ++ ++ return ret; ++} ++ ++static irqreturn_t xrx200_dma_irq(int irq, void *priv) ++{ ++ struct xrx200_hw *hw = priv; ++ int chnr = irq - XRX200_DMA_IRQ; ++ struct xrx200_chan *ch = &hw->chan[chnr]; ++ ++ ltq_dma_disable_irq(&ch->dma); ++ ltq_dma_ack_irq(&ch->dma); ++ ++ if (chnr % 2) ++ tasklet_schedule(&ch->tasklet); ++ else ++ napi_schedule(&ch->napi); ++ ++ return IRQ_HANDLED; ++} ++ ++static int xrx200_dma_init(struct xrx200_hw *hw) ++{ ++ int i, err = 0; ++ ++ ltq_dma_init_port(DMA_PORT_ETOP); ++ ++ for (i = 0; i < 8 && !err; i++) { ++ int irq = XRX200_DMA_IRQ + i; ++ struct xrx200_chan *ch = &hw->chan[i]; ++ ++ spin_lock_init(&ch->lock); ++ ++ ch->idx = ch->dma.nr = i; ++ ++ if (i == XRX200_DMA_TX) { ++ ltq_dma_alloc_tx(&ch->dma); ++ err = request_irq(irq, xrx200_dma_irq, 0, "vrx200_tx", hw); ++ } else if (i == XRX200_DMA_TX_2) { ++ ltq_dma_alloc_tx(&ch->dma); ++ err = request_irq(irq, xrx200_dma_irq, 0, "vrx200_tx_2", hw); ++ } else if (i == XRX200_DMA_RX) { ++ ltq_dma_alloc_rx(&ch->dma); ++ for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM; ++ ch->dma.desc++) ++ if (xrx200_alloc_skb(ch)) ++ err = -ENOMEM; ++ ch->dma.desc = 0; ++ err = request_irq(irq, xrx200_dma_irq, 0, "vrx200_rx", hw); ++ } else ++ continue; ++ ++ if (!err) ++ ch->dma.irq = irq; ++ else ++ pr_err("net-xrx200: failed to request irq %d\n", irq); ++ } ++ ++ return err; ++} ++ ++#ifdef SW_POLLING ++static void xrx200_gmac_update(struct xrx200_port *port) ++{ ++ u16 phyaddr = port->phydev->mdio.addr & MDIO_PHY_ADDR_MASK; ++ u16 miimode = ltq_mii_r32(MII_CFG(port->num)) & MII_CFG_MODE_MASK; ++ u16 miirate = 0; ++ ++ switch (port->phydev->speed) { ++ case SPEED_1000: ++ phyaddr |= MDIO_PHY_SPEED_G1; ++ miirate = MII_CFG_RATE_M125; ++ break; ++ ++ case SPEED_100: ++ phyaddr |= MDIO_PHY_SPEED_M100; ++ switch (miimode) { ++ case MII_CFG_MODE_RMIIM: ++ case MII_CFG_MODE_RMIIP: ++ miirate = MII_CFG_RATE_M50; ++ break; ++ default: ++ miirate = MII_CFG_RATE_M25; ++ break; ++ } ++ break; ++ ++ default: ++ phyaddr |= MDIO_PHY_SPEED_M10; ++ miirate = MII_CFG_RATE_M2P5; ++ break; ++ } ++ ++ if (port->phydev->link) ++ phyaddr |= MDIO_PHY_LINK_UP; ++ else ++ phyaddr |= MDIO_PHY_LINK_DOWN; ++ ++ if (port->phydev->duplex == DUPLEX_FULL) ++ phyaddr |= MDIO_PHY_FDUP_EN; ++ else ++ phyaddr |= MDIO_PHY_FDUP_DIS; ++ ++ ltq_mdio_w32_mask(MDIO_UPDATE_MASK, phyaddr, MDIO_PHY(port->num)); ++ ltq_mii_w32_mask(MII_CFG_RATE_MASK, miirate, MII_CFG(port->num)); ++ udelay(1); ++} ++#else ++static void xrx200_gmac_update(struct xrx200_port *port) ++{ ++ ++} ++#endif ++ ++static void xrx200_mdio_link(struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ int i; ++ ++ for (i = 0; i < priv->num_port; i++) { ++ if (!priv->port[i].phydev) ++ continue; ++ ++ if (priv->port[i].link != priv->port[i].phydev->link) { ++ xrx200_gmac_update(&priv->port[i]); ++ priv->port[i].link = priv->port[i].phydev->link; ++ netdev_info(dev, "port %d %s link\n", ++ priv->port[i].num, ++ (priv->port[i].link)?("got"):("lost")); ++ } ++ } ++} ++ ++static inline int xrx200_mdio_poll(struct mii_bus *bus) ++{ ++ unsigned cnt = 10000; ++ ++ while (likely(cnt--)) { ++ unsigned ctrl = ltq_mdio_r32(MDIO_CTRL); ++ if ((ctrl & MDIO_BUSY) == 0) ++ return 0; ++ } ++ ++ return 1; ++} ++ ++static int xrx200_mdio_wr(struct mii_bus *bus, int addr, int reg, u16 val) ++{ ++ if (xrx200_mdio_poll(bus)) ++ return 1; ++ ++ ltq_mdio_w32(val, MDIO_WRITE); ++ ltq_mdio_w32(MDIO_BUSY | MDIO_WR | ++ ((addr & MDIO_MASK) << MDIO_ADDRSHIFT) | ++ (reg & MDIO_MASK), ++ MDIO_CTRL); ++ ++ return 0; ++} ++ ++static int xrx200_mdio_rd(struct mii_bus *bus, int addr, int reg) ++{ ++ if (xrx200_mdio_poll(bus)) ++ return -1; ++ ++ ltq_mdio_w32(MDIO_BUSY | MDIO_RD | ++ ((addr & MDIO_MASK) << MDIO_ADDRSHIFT) | ++ (reg & MDIO_MASK), ++ MDIO_CTRL); ++ ++ if (xrx200_mdio_poll(bus)) ++ return -1; ++ ++ return ltq_mdio_r32(MDIO_READ); ++} ++ ++static int xrx200_phy_has_link(struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ int i; ++ ++ for (i = 0; i < priv->num_port; i++) { ++ if (!priv->port[i].phydev) ++ continue; ++ ++ if (priv->port[i].phydev->link) ++ return 1; ++ } ++ ++ return 0; ++} ++ ++static void xrx200_phy_link_change(struct phy_device *phydev, bool up, bool do_carrier) ++{ ++ struct net_device *netdev = phydev->attached_dev; ++ ++ if (do_carrier) ++ if (up) ++ netif_carrier_on(netdev); ++ else if (!xrx200_phy_has_link(netdev)) ++ netif_carrier_off(netdev); ++ ++ phydev->adjust_link(netdev); ++} ++ ++static int xrx200_mdio_probe(struct net_device *dev, struct xrx200_port *port) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ struct phy_device *phydev = NULL; ++ unsigned val; ++ ++ phydev = mdiobus_get_phy(priv->hw->mii_bus, port->phy_addr); ++ ++ if (!phydev) { ++ netdev_err(dev, "no PHY found\n"); ++ return -ENODEV; ++ } ++ ++ phydev = phy_connect(dev, phydev_name(phydev), &xrx200_mdio_link, ++ port->phy_if); ++ ++ if (IS_ERR(phydev)) { ++ netdev_err(dev, "Could not attach to PHY\n"); ++ return PTR_ERR(phydev); ++ } ++ ++ phydev->supported &= (SUPPORTED_10baseT_Half ++ | SUPPORTED_10baseT_Full ++ | SUPPORTED_100baseT_Half ++ | SUPPORTED_100baseT_Full ++ | SUPPORTED_1000baseT_Half ++ | SUPPORTED_1000baseT_Full ++ | SUPPORTED_Autoneg ++ | SUPPORTED_MII ++ | SUPPORTED_TP); ++ phydev->advertising = phydev->supported; ++ port->phydev = phydev; ++ phydev->phy_link_change = xrx200_phy_link_change; ++ ++ phy_attached_info(phydev); ++ ++#ifdef SW_POLLING ++ phy_read_status(phydev); ++ ++ val = xrx200_mdio_rd(priv->hw->mii_bus, MDIO_DEVAD_NONE, MII_CTRL1000); ++ val |= ADVERTIZE_MPD; ++ xrx200_mdio_wr(priv->hw->mii_bus, MDIO_DEVAD_NONE, MII_CTRL1000, val); ++ xrx200_mdio_wr(priv->hw->mii_bus, 0, 0, 0x1040); ++ ++ phy_start_aneg(phydev); ++#endif ++ return 0; ++} ++ ++static void xrx200_port_config(struct xrx200_priv *priv, ++ const struct xrx200_port *port) ++{ ++ u16 miimode = 0; ++ ++ switch (port->num) { ++ case 0: /* xMII0 */ ++ case 1: /* xMII1 */ ++ switch (port->phy_if) { ++ case PHY_INTERFACE_MODE_MII: ++ if (port->flags & XRX200_PORT_TYPE_PHY) ++ /* MII MAC mode, connected to external PHY */ ++ miimode = MII_CFG_MODE_MIIM; ++ else ++ /* MII PHY mode, connected to external MAC */ ++ miimode = MII_CFG_MODE_MIIP; ++ break; ++ case PHY_INTERFACE_MODE_RMII: ++ if (port->flags & XRX200_PORT_TYPE_PHY) ++ /* RMII MAC mode, connected to external PHY */ ++ miimode = MII_CFG_MODE_RMIIM; ++ else ++ /* RMII PHY mode, connected to external MAC */ ++ miimode = MII_CFG_MODE_RMIIP; ++ break; ++ case PHY_INTERFACE_MODE_RGMII: ++ /* RGMII MAC mode, connected to external PHY */ ++ miimode = MII_CFG_MODE_RGMII; ++ break; ++ default: ++ break; ++ } ++ break; ++ case 2: /* internal GPHY0 */ ++ case 3: /* internal GPHY0 */ ++ case 4: /* internal GPHY1 */ ++ switch (port->phy_if) { ++ case PHY_INTERFACE_MODE_MII: ++ case PHY_INTERFACE_MODE_GMII: ++ /* MII MAC mode, connected to internal GPHY */ ++ miimode = MII_CFG_MODE_MIIM; ++ break; ++ default: ++ break; ++ } ++ break; ++ case 5: /* internal GPHY1 or xMII2 */ ++ switch (port->phy_if) { ++ case PHY_INTERFACE_MODE_MII: ++ /* MII MAC mode, connected to internal GPHY */ ++ miimode = MII_CFG_MODE_MIIM; ++ break; ++ case PHY_INTERFACE_MODE_RGMII: ++ /* RGMII MAC mode, connected to external PHY */ ++ miimode = MII_CFG_MODE_RGMII; ++ break; ++ default: ++ break; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ ltq_mii_w32_mask(MII_CFG_MODE_MASK, miimode | MII_CFG_EN, ++ MII_CFG(port->num)); ++} ++ ++static int xrx200_init(struct net_device *dev) ++{ ++ struct xrx200_priv *priv = netdev_priv(dev); ++ struct sockaddr mac; ++ int err, i; ++ ++#ifndef SW_POLLING ++ unsigned int reg = 0; ++ ++ /* enable auto polling */ ++ for (i = 0; i < priv->num_port; i++) ++ reg |= BIT(priv->port[i].num); ++ ltq_mdio_w32(reg, MDIO_CLK_CFG0); ++ ltq_mdio_w32(MDIO1_25MHZ, MDIO_CLK_CFG1); ++#endif ++ ++ /* setup each port */ ++ for (i = 0; i < priv->num_port; i++) ++ xrx200_port_config(priv, &priv->port[i]); ++ ++ memcpy(&mac.sa_data, priv->mac, ETH_ALEN); ++ if (!is_valid_ether_addr(mac.sa_data)) { ++ pr_warn("net-xrx200: invalid MAC, using random\n"); ++ eth_random_addr(mac.sa_data); ++ dev->addr_assign_type |= NET_ADDR_RANDOM; ++ } ++ ++ err = eth_mac_addr(dev, &mac); ++ if (err) ++ goto err_netdev; ++ ++ for (i = 0; i < priv->num_port; i++) ++ if (xrx200_mdio_probe(dev, &priv->port[i])) ++ pr_warn("xrx200-mdio: probing phy of port %d failed\n", ++ priv->port[i].num); ++ ++ return 0; ++ ++err_netdev: ++ unregister_netdev(dev); ++ free_netdev(dev); ++ return err; ++} ++ ++static void xrx200_pci_microcode(void) ++{ ++ int i; ++ ++ ltq_switch_w32_mask(PCE_TBL_CFG_ADDR_MASK | PCE_TBL_CFG_ADWR_MASK, ++ PCE_TBL_CFG_ADWR, PCE_TBL_CTRL); ++ ltq_switch_w32(0, PCE_TBL_MASK); ++ ++ for (i = 0; i < ARRAY_SIZE(pce_microcode); i++) { ++ ltq_switch_w32(i, PCE_TBL_ADDR); ++ ltq_switch_w32(pce_microcode[i].val[3], PCE_TBL_VAL(0)); ++ ltq_switch_w32(pce_microcode[i].val[2], PCE_TBL_VAL(1)); ++ ltq_switch_w32(pce_microcode[i].val[1], PCE_TBL_VAL(2)); ++ ltq_switch_w32(pce_microcode[i].val[0], PCE_TBL_VAL(3)); ++ ++ // start the table access: ++ ltq_switch_w32_mask(0, PCE_TBL_BUSY, PCE_TBL_CTRL); ++ while (ltq_switch_r32(PCE_TBL_CTRL) & PCE_TBL_BUSY); ++ } ++ ++ /* tell the switch that the microcode is loaded */ ++ ltq_switch_w32_mask(0, BIT(3), PCE_GCTRL_REG(0)); ++} ++ ++static void xrx200_hw_init(struct xrx200_hw *hw) ++{ ++ int i; ++ ++ /* enable clock gate */ ++ clk_enable(hw->clk); ++ ++ ltq_switch_w32(1, 0); ++ mdelay(100); ++ ltq_switch_w32(0, 0); ++ /* ++ * TODO: we should really disbale all phys/miis here and explicitly ++ * enable them in the device secific init function ++ */ ++ ++ /* disable port fetch/store dma */ ++ for (i = 0; i < 7; i++ ) { ++ ltq_switch_w32(0, FDMA_PCTRLx(i)); ++ ltq_switch_w32(0, SDMA_PCTRLx(i)); ++ } ++ ++ /* enable Switch */ ++ ltq_mdio_w32_mask(0, MDIO_GLOB_ENABLE, MDIO_GLOB); ++ ++ /* load the pce microcode */ ++ xrx200_pci_microcode(); ++ ++ /* Default unknown Broadcat/Multicast/Unicast port maps */ ++ ltq_switch_w32(0x40, PCE_PMAP1); ++ ltq_switch_w32(0x40, PCE_PMAP2); ++ ltq_switch_w32(0x40, PCE_PMAP3); ++ ++ /* RMON Counter Enable for all physical ports */ ++ for (i = 0; i < 7; i++) ++ ltq_switch_w32(0x1, BM_PCFG(i)); ++ ++ /* disable auto polling */ ++ ltq_mdio_w32(0x0, MDIO_CLK_CFG0); ++ ++ /* enable port statistic counters */ ++ for (i = 0; i < 7; i++) ++ ltq_switch_w32(0x1, BM_PCFGx(i)); ++ ++ /* set IPG to 12 */ ++ ltq_pmac_w32_mask(PMAC_IPG_MASK, 0xb, PMAC_RX_IPG); ++ ++#ifdef SW_ROUTING ++ /* enable status header, enable CRC */ ++ ltq_pmac_w32_mask(0, ++ PMAC_HD_CTL_RST | PMAC_HD_CTL_AST | PMAC_HD_CTL_RXSH | PMAC_HD_CTL_AS | PMAC_HD_CTL_AC | PMAC_HD_CTL_RC, ++ PMAC_HD_CTL); ++#else ++ /* disable status header, enable CRC */ ++ ltq_pmac_w32_mask(PMAC_HD_CTL_AST | PMAC_HD_CTL_RXSH | PMAC_HD_CTL_AS, ++ PMAC_HD_CTL_AC | PMAC_HD_CTL_RC, ++ PMAC_HD_CTL); ++#endif ++ ++ /* enable port fetch/store dma & VLAN Modification */ ++ for (i = 0; i < 7; i++ ) { ++ ltq_switch_w32_mask(0, 0x19, FDMA_PCTRLx(i)); ++ ltq_switch_w32_mask(0, 0x01, SDMA_PCTRLx(i)); ++ ltq_switch_w32_mask(0, PCE_INGRESS, PCE_PCTRL_REG(i, 0)); ++ } ++ ++ /* enable special tag insertion on cpu port */ ++ ltq_switch_w32_mask(0, 0x02, FDMA_PCTRLx(6)); ++ ltq_switch_w32_mask(0, PCE_INGRESS, PCE_PCTRL_REG(6, 0)); ++ ltq_switch_w32_mask(0, BIT(3), MAC_CTRL_REG(6, 2)); ++ ltq_switch_w32(1518 + 8 + 4 * 2, MAC_FLEN_REG); ++ xrx200sw_write_x(1, XRX200_BM_QUEUE_GCTRL_GL_MOD, 0); ++ ++ for (i = 0; i < XRX200_MAX_VLAN; i++) ++ hw->vlan_vid[i] = i; ++} ++ ++static void xrx200_hw_cleanup(struct xrx200_hw *hw) ++{ ++ int i; ++ ++ /* disable the switch */ ++ ltq_mdio_w32_mask(MDIO_GLOB_ENABLE, 0, MDIO_GLOB); ++ ++ /* free the channels and IRQs */ ++ for (i = 0; i < 2; i++) { ++ ltq_dma_free(&hw->chan[i].dma); ++ if (hw->chan[i].dma.irq) ++ free_irq(hw->chan[i].dma.irq, hw); ++ } ++ ++ /* free the allocated RX ring */ ++ for (i = 0; i < LTQ_DESC_NUM; i++) ++ dev_kfree_skb_any(hw->chan[XRX200_DMA_RX].skb[i]); ++ ++ /* clear the mdio bus */ ++ mdiobus_unregister(hw->mii_bus); ++ mdiobus_free(hw->mii_bus); ++ ++ /* release the clock */ ++ clk_disable(hw->clk); ++ clk_put(hw->clk); ++} ++ ++static int xrx200_of_mdio(struct xrx200_hw *hw, struct device_node *np) ++{ ++ hw->mii_bus = mdiobus_alloc(); ++ if (!hw->mii_bus) ++ return -ENOMEM; ++ ++ hw->mii_bus->read = xrx200_mdio_rd; ++ hw->mii_bus->write = xrx200_mdio_wr; ++ hw->mii_bus->name = "lantiq,xrx200-mdio"; ++ snprintf(hw->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0); ++ ++ if (of_mdiobus_register(hw->mii_bus, np)) { ++ mdiobus_free(hw->mii_bus); ++ return -ENXIO; ++ } ++ ++ return 0; ++} ++ ++static void xrx200_of_port(struct xrx200_priv *priv, struct device_node *port) ++{ ++ const __be32 *addr, *id = of_get_property(port, "reg", NULL); ++ struct xrx200_port *p = &priv->port[priv->num_port]; ++ ++ if (!id) ++ return; ++ ++ memset(p, 0, sizeof(struct xrx200_port)); ++ p->phy_node = of_parse_phandle(port, "phy-handle", 0); ++ addr = of_get_property(p->phy_node, "reg", NULL); ++ if (!addr) ++ return; ++ ++ p->num = *id; ++ p->phy_addr = *addr; ++ p->phy_if = of_get_phy_mode(port); ++ if (p->phy_addr > 0x10) ++ p->flags = XRX200_PORT_TYPE_MAC; ++ else ++ p->flags = XRX200_PORT_TYPE_PHY; ++ priv->num_port++; ++ ++ p->gpio = of_get_gpio_flags(port, 0, &p->gpio_flags); ++ if (gpio_is_valid(p->gpio)) ++ if (!gpio_request(p->gpio, "phy-reset")) { ++ gpio_direction_output(p->gpio, ++ (p->gpio_flags & OF_GPIO_ACTIVE_LOW) ? (1) : (0)); ++ udelay(100); ++ gpio_set_value(p->gpio, (p->gpio_flags & OF_GPIO_ACTIVE_LOW) ? (0) : (1)); ++ } ++ /* is this port a wan port ? */ ++ if (priv->wan) ++ priv->hw->wan_map |= BIT(p->num); ++ ++ priv->port_map |= BIT(p->num); ++ ++ /* store the port id in the hw struct so we can map ports -> devices */ ++ priv->hw->port_map[p->num] = priv->hw->num_devs; ++} ++ ++static const struct net_device_ops xrx200_netdev_ops = { ++ .ndo_init = xrx200_init, ++ .ndo_open = xrx200_open, ++ .ndo_stop = xrx200_close, ++ .ndo_start_xmit = xrx200_start_xmit, ++ .ndo_set_mac_address = eth_mac_addr, ++ .ndo_validate_addr = eth_validate_addr, ++ .ndo_get_stats = xrx200_get_stats, ++ .ndo_tx_timeout = xrx200_tx_timeout, ++}; ++ ++static void xrx200_of_iface(struct xrx200_hw *hw, struct device_node *iface, struct device *dev) ++{ ++ struct xrx200_priv *priv; ++ struct device_node *port; ++ const __be32 *wan; ++ const u8 *mac; ++ ++ /* alloc the network device */ ++ hw->devs[hw->num_devs] = alloc_etherdev(sizeof(struct xrx200_priv)); ++ if (!hw->devs[hw->num_devs]) ++ return; ++ ++ /* setup the network device */ ++ strcpy(hw->devs[hw->num_devs]->name, "eth%d"); ++ hw->devs[hw->num_devs]->netdev_ops = &xrx200_netdev_ops; ++ hw->devs[hw->num_devs]->watchdog_timeo = XRX200_TX_TIMEOUT; ++ hw->devs[hw->num_devs]->needed_headroom = XRX200_HEADROOM; ++ SET_NETDEV_DEV(hw->devs[hw->num_devs], dev); ++ ++ /* setup our private data */ ++ priv = netdev_priv(hw->devs[hw->num_devs]); ++ priv->hw = hw; ++ priv->id = hw->num_devs; ++ ++ mac = of_get_mac_address(iface); ++ if (mac) ++ memcpy(priv->mac, mac, ETH_ALEN); ++ ++ /* is this the wan interface ? */ ++ wan = of_get_property(iface, "lantiq,wan", NULL); ++ if (wan && (*wan == 1)) ++ priv->wan = 1; ++ ++ /* should the switch be enabled on this interface ? */ ++ if (of_find_property(iface, "lantiq,switch", NULL)) ++ priv->sw = 1; ++ ++ /* load the ports that are part of the interface */ ++ for_each_child_of_node(iface, port) ++ if (of_device_is_compatible(port, "lantiq,xrx200-pdi-port")) ++ xrx200_of_port(priv, port); ++ ++ /* register the actual device */ ++ if (!register_netdev(hw->devs[hw->num_devs])) ++ hw->num_devs++; ++} ++ ++static struct xrx200_hw xrx200_hw; ++ ++static int xrx200_probe(struct platform_device *pdev) ++{ ++ struct resource *res[4]; ++ struct device_node *mdio_np, *iface_np, *phy_np; ++ struct of_phandle_iterator it; ++ int err; ++ int i; ++ ++ /* load the memory ranges */ ++ for (i = 0; i < 4; i++) { ++ res[i] = platform_get_resource(pdev, IORESOURCE_MEM, i); ++ if (!res[i]) { ++ dev_err(&pdev->dev, "failed to get resources\n"); ++ return -ENOENT; ++ } ++ } ++ xrx200_switch_membase = devm_ioremap_resource(&pdev->dev, res[0]); ++ xrx200_mdio_membase = devm_ioremap_resource(&pdev->dev, res[1]); ++ xrx200_mii_membase = devm_ioremap_resource(&pdev->dev, res[2]); ++ xrx200_pmac_membase = devm_ioremap_resource(&pdev->dev, res[3]); ++ if (!xrx200_switch_membase || !xrx200_mdio_membase || ++ !xrx200_mii_membase || !xrx200_pmac_membase) { ++ dev_err(&pdev->dev, "failed to request and remap io ranges \n"); ++ return -ENOMEM; ++ } ++ ++ of_for_each_phandle(&it, err, pdev->dev.of_node, "lantiq,phys", NULL, 0) { ++ phy_np = it.node; ++ if (phy_np) { ++ struct platform_device *phy = of_find_device_by_node(phy_np); ++ ++ of_node_put(phy_np); ++ if (!platform_get_drvdata(phy)) ++ return -EPROBE_DEFER; ++ } ++ } ++ ++ /* get the clock */ ++ xrx200_hw.clk = clk_get(&pdev->dev, NULL); ++ if (IS_ERR(xrx200_hw.clk)) { ++ dev_err(&pdev->dev, "failed to get clock\n"); ++ return PTR_ERR(xrx200_hw.clk); ++ } ++ ++ /* bring up the dma engine and IP core */ ++ xrx200_dma_init(&xrx200_hw); ++ xrx200_hw_init(&xrx200_hw); ++ tasklet_init(&xrx200_hw.chan[XRX200_DMA_TX].tasklet, xrx200_tx_housekeeping, (u32) &xrx200_hw.chan[XRX200_DMA_TX]); ++ tasklet_init(&xrx200_hw.chan[XRX200_DMA_TX_2].tasklet, xrx200_tx_housekeeping, (u32) &xrx200_hw.chan[XRX200_DMA_TX_2]); ++ ++ /* bring up the mdio bus */ ++ mdio_np = of_find_compatible_node(pdev->dev.of_node, NULL, ++ "lantiq,xrx200-mdio"); ++ if (mdio_np) ++ if (xrx200_of_mdio(&xrx200_hw, mdio_np)) ++ dev_err(&pdev->dev, "mdio probe failed\n"); ++ ++ /* load the interfaces */ ++ for_each_child_of_node(pdev->dev.of_node, iface_np) ++ if (of_device_is_compatible(iface_np, "lantiq,xrx200-pdi")) { ++ if (xrx200_hw.num_devs < XRX200_MAX_DEV) ++ xrx200_of_iface(&xrx200_hw, iface_np, &pdev->dev); ++ else ++ dev_err(&pdev->dev, ++ "only %d interfaces allowed\n", ++ XRX200_MAX_DEV); ++ } ++ ++ if (!xrx200_hw.num_devs) { ++ xrx200_hw_cleanup(&xrx200_hw); ++ dev_err(&pdev->dev, "failed to load interfaces\n"); ++ return -ENOENT; ++ } ++ ++ xrx200sw_init(&xrx200_hw); ++ ++ /* set wan port mask */ ++ ltq_pmac_w32(xrx200_hw.wan_map, PMAC_EWAN); ++ ++ for (i = 0; i < xrx200_hw.num_devs; i++) { ++ xrx200_hw.chan[XRX200_DMA_RX].devs[i] = xrx200_hw.devs[i]; ++ xrx200_hw.chan[XRX200_DMA_TX].devs[i] = xrx200_hw.devs[i]; ++ xrx200_hw.chan[XRX200_DMA_TX_2].devs[i] = xrx200_hw.devs[i]; ++ } ++ ++ /* setup NAPI */ ++ init_dummy_netdev(&xrx200_hw.chan[XRX200_DMA_RX].dummy_dev); ++ netif_napi_add(&xrx200_hw.chan[XRX200_DMA_RX].dummy_dev, ++ &xrx200_hw.chan[XRX200_DMA_RX].napi, xrx200_poll_rx, 32); ++ ++ platform_set_drvdata(pdev, &xrx200_hw); ++ ++ return 0; ++} ++ ++static int xrx200_remove(struct platform_device *pdev) ++{ ++ struct net_device *dev = platform_get_drvdata(pdev); ++ struct xrx200_priv *priv; ++ ++ if (!dev) ++ return 0; ++ ++ priv = netdev_priv(dev); ++ ++ /* free stack related instances */ ++ netif_stop_queue(dev); ++ netif_napi_del(&xrx200_hw.chan[XRX200_DMA_RX].napi); ++ ++ /* shut down hardware */ ++ xrx200_hw_cleanup(&xrx200_hw); ++ ++ /* remove the actual device */ ++ unregister_netdev(dev); ++ free_netdev(dev); ++ ++ return 0; ++} ++ ++static const struct of_device_id xrx200_match[] = { ++ { .compatible = "lantiq,xrx200-net" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, xrx200_match); ++ ++static struct platform_driver xrx200_driver = { ++ .probe = xrx200_probe, ++ .remove = xrx200_remove, ++ .driver = { ++ .name = "lantiq,xrx200-net", ++ .of_match_table = xrx200_match, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++module_platform_driver(xrx200_driver); ++ ++MODULE_AUTHOR("John Crispin "); ++MODULE_DESCRIPTION("Lantiq SoC XRX200 ethernet"); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/drivers/net/ethernet/lantiq_xrx200_sw.h +@@ -0,0 +1,1328 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Copyright (C) 2010 Lantiq Deutschland GmbH ++ * Copyright (C) 2013 Antonios Vamporakis ++ * ++ * VR9 switch registers extracted from 310TUJ0 switch api ++ * WARNING mult values of 0x00 may not be correct ++ * ++ */ ++ ++enum { ++// XRX200_ETHSW_SWRES, /* Ethernet Switch ResetControl Register */ ++// XRX200_ETHSW_SWRES_R1, /* Hardware Reset */ ++// XRX200_ETHSW_SWRES_R0, /* Register Configuration */ ++// XRX200_ETHSW_CLK_MAC_GAT, /* Ethernet Switch Clock ControlRegister */ ++// XRX200_ETHSW_CLK_EXP_SLEEP, /* Exponent to put system into sleep */ ++// XRX200_ETHSW_CLK_EXP_WAKE, /* Exponent to wake up system */ ++// XRX200_ETHSW_CLK_CLK2_EN, /* CLK2 Input for MAC */ ++// XRX200_ETHSW_CLK_EXT_DIV_EN, /* External Clock Divider Enable */ ++// XRX200_ETHSW_CLK_RAM_DBG_EN, /* Clock Gating Enable */ ++// XRX200_ETHSW_CLK_REG_GAT_EN, /* Clock Gating Enable */ ++// XRX200_ETHSW_CLK_GAT_EN, /* Clock Gating Enable */ ++// XRX200_ETHSW_CLK_MAC_GAT_EN, /* Clock Gating Enable */ ++// XRX200_ETHSW_DBG_STEP, /* Ethernet Switch Debug ControlRegister */ ++// XRX200_ETHSW_DBG_CLK_SEL, /* Trigger Enable */ ++// XRX200_ETHSW_DBG_MON_EN, /* Monitoring Enable */ ++// XRX200_ETHSW_DBG_TRIG_EN, /* Trigger Enable */ ++// XRX200_ETHSW_DBG_MODE, /* Debug Mode */ ++// XRX200_ETHSW_DBG_STEP_TIME, /* Clock Step Size */ ++// XRX200_ETHSW_SSB_MODE, /* Ethernet Switch SharedSegment Buffer Mode Register */ ++// XRX200_ETHSW_SSB_MODE_ADDE, /* Memory Address */ ++// XRX200_ETHSW_SSB_MODE_MODE, /* Memory Access Mode */ ++// XRX200_ETHSW_SSB_ADDR, /* Ethernet Switch SharedSegment Buffer Address Register */ ++// XRX200_ETHSW_SSB_ADDR_ADDE, /* Memory Address */ ++// XRX200_ETHSW_SSB_DATA, /* Ethernet Switch SharedSegment Buffer Data Register */ ++// XRX200_ETHSW_SSB_DATA_DATA, /* Data Value */ ++// XRX200_ETHSW_CAP_0, /* Ethernet Switch CapabilityRegister 0 */ ++// XRX200_ETHSW_CAP_0_SPEED, /* Clock frequency */ ++// XRX200_ETHSW_CAP_1, /* Ethernet Switch CapabilityRegister 1 */ ++// XRX200_ETHSW_CAP_1_GMAC, /* MAC operation mode */ ++// XRX200_ETHSW_CAP_1_QUEUE, /* Number of queues */ ++// XRX200_ETHSW_CAP_1_VPORTS, /* Number of virtual ports */ ++// XRX200_ETHSW_CAP_1_PPORTS, /* Number of physical ports */ ++// XRX200_ETHSW_CAP_2, /* Ethernet Switch CapabilityRegister 2 */ ++// XRX200_ETHSW_CAP_2_PACKETS, /* Number of packets */ ++// XRX200_ETHSW_CAP_3, /* Ethernet Switch CapabilityRegister 3 */ ++// XRX200_ETHSW_CAP_3_METERS, /* Number of traffic meters */ ++// XRX200_ETHSW_CAP_3_SHAPERS, /* Number of traffic shapers */ ++// XRX200_ETHSW_CAP_4, /* Ethernet Switch CapabilityRegister 4 */ ++// XRX200_ETHSW_CAP_4_PPPOE, /* PPPoE table size */ ++// XRX200_ETHSW_CAP_4_VLAN, /* Active VLAN table size */ ++// XRX200_ETHSW_CAP_5, /* Ethernet Switch CapabilityRegister 5 */ ++// XRX200_ETHSW_CAP_5_IPPLEN, /* IP packet length table size */ ++// XRX200_ETHSW_CAP_5_PROT, /* Protocol table size */ ++// XRX200_ETHSW_CAP_6, /* Ethernet Switch CapabilityRegister 6 */ ++// XRX200_ETHSW_CAP_6_MACDASA, /* MAC DA/SA table size */ ++// XRX200_ETHSW_CAP_6_APPL, /* Application table size */ ++// XRX200_ETHSW_CAP_7, /* Ethernet Switch CapabilityRegister 7 */ ++// XRX200_ETHSW_CAP_7_IPDASAM, /* IP DA/SA MSB table size */ ++// XRX200_ETHSW_CAP_7_IPDASAL, /* IP DA/SA LSB table size */ ++// XRX200_ETHSW_CAP_8, /* Ethernet Switch CapabilityRegister 8 */ ++// XRX200_ETHSW_CAP_8_MCAST, /* Multicast table size */ ++// XRX200_ETHSW_CAP_9, /* Ethernet Switch CapabilityRegister 9 */ ++// XRX200_ETHSW_CAP_9_FLAGG, /* Flow Aggregation table size */ ++// XRX200_ETHSW_CAP_10, /* Ethernet Switch CapabilityRegister 10 */ ++// XRX200_ETHSW_CAP_10_MACBT, /* MAC bridging table size */ ++// XRX200_ETHSW_CAP_11, /* Ethernet Switch CapabilityRegister 11 */ ++// XRX200_ETHSW_CAP_11_BSIZEL, /* Packet buffer size (lower part, in byte) */ ++// XRX200_ETHSW_CAP_12, /* Ethernet Switch CapabilityRegister 12 */ ++// XRX200_ETHSW_CAP_12_BSIZEH, /* Packet buffer size (higher part, in byte) */ ++// XRX200_ETHSW_VERSION_REV, /* Ethernet Switch VersionRegister */ ++// XRX200_ETHSW_VERSION_MOD_ID, /* Module Identification */ ++// XRX200_ETHSW_VERSION_REV_ID, /* Hardware Revision Identification */ ++// XRX200_ETHSW_IER, /* Interrupt Enable Register */ ++// XRX200_ETHSW_IER_FDMAIE, /* Fetch DMA Interrupt Enable */ ++// XRX200_ETHSW_IER_SDMAIE, /* Store DMA Interrupt Enable */ ++// XRX200_ETHSW_IER_MACIE, /* Ethernet MAC Interrupt Enable */ ++// XRX200_ETHSW_IER_PCEIE, /* Parser and Classification Engine Interrupt Enable */ ++// XRX200_ETHSW_IER_BMIE, /* Buffer Manager Interrupt Enable */ ++// XRX200_ETHSW_ISR, /* Interrupt Status Register */ ++// XRX200_ETHSW_ISR_FDMAINT, /* Fetch DMA Interrupt */ ++// XRX200_ETHSW_ISR_SDMAINT, /* Store DMA Interrupt */ ++// XRX200_ETHSW_ISR_MACINT, /* Ethernet MAC Interrupt */ ++// XRX200_ETHSW_ISR_PCEINT, /* Parser and Classification Engine Interrupt */ ++// XRX200_ETHSW_ISR_BMINT, /* Buffer Manager Interrupt */ ++// XRX200_ETHSW_SPARE_0, /* Ethernet Switch SpareCells 0 */ ++// XRX200_ETHSW_SPARE_0_SPARE, /* SPARE0 */ ++// XRX200_ETHSW_SPARE_1, /* Ethernet Switch SpareCells 1 */ ++// XRX200_ETHSW_SPARE_1_SPARE, /* SPARE1 */ ++// XRX200_ETHSW_SPARE_2, /* Ethernet Switch SpareCells 2 */ ++// XRX200_ETHSW_SPARE_2_SPARE, /* SPARE2 */ ++// XRX200_ETHSW_SPARE_3, /* Ethernet Switch SpareCells 3 */ ++// XRX200_ETHSW_SPARE_3_SPARE, /* SPARE3 */ ++// XRX200_ETHSW_SPARE_4, /* Ethernet Switch SpareCells 4 */ ++// XRX200_ETHSW_SPARE_4_SPARE, /* SPARE4 */ ++// XRX200_ETHSW_SPARE_5, /* Ethernet Switch SpareCells 5 */ ++// XRX200_ETHSW_SPARE_5_SPARE, /* SPARE5 */ ++// XRX200_ETHSW_SPARE_6, /* Ethernet Switch SpareCells 6 */ ++// XRX200_ETHSW_SPARE_6_SPARE, /* SPARE6 */ ++// XRX200_ETHSW_SPARE_7, /* Ethernet Switch SpareCells 7 */ ++// XRX200_ETHSW_SPARE_7_SPARE, /* SPARE7 */ ++// XRX200_ETHSW_SPARE_8, /* Ethernet Switch SpareCells 8 */ ++// XRX200_ETHSW_SPARE_8_SPARE, /* SPARE8 */ ++// XRX200_ETHSW_SPARE_9, /* Ethernet Switch SpareCells 9 */ ++// XRX200_ETHSW_SPARE_9_SPARE, /* SPARE9 */ ++// XRX200_ETHSW_SPARE_10, /* Ethernet Switch SpareCells 10 */ ++// XRX200_ETHSW_SPARE_10_SPARE, /* SPARE10 */ ++// XRX200_ETHSW_SPARE_11, /* Ethernet Switch SpareCells 11 */ ++// XRX200_ETHSW_SPARE_11_SPARE, /* SPARE11 */ ++// XRX200_ETHSW_SPARE_12, /* Ethernet Switch SpareCells 12 */ ++// XRX200_ETHSW_SPARE_12_SPARE, /* SPARE12 */ ++// XRX200_ETHSW_SPARE_13, /* Ethernet Switch SpareCells 13 */ ++// XRX200_ETHSW_SPARE_13_SPARE, /* SPARE13 */ ++// XRX200_ETHSW_SPARE_14, /* Ethernet Switch SpareCells 14 */ ++// XRX200_ETHSW_SPARE_14_SPARE, /* SPARE14 */ ++// XRX200_ETHSW_SPARE_15, /* Ethernet Switch SpareCells 15 */ ++// XRX200_ETHSW_SPARE_15_SPARE, /* SPARE15 */ ++// XRX200_BM_RAM_VAL_3, /* RAM Value Register 3 */ ++// XRX200_BM_RAM_VAL_3_VAL3, /* Data value [15:0] */ ++// XRX200_BM_RAM_VAL_2, /* RAM Value Register 2 */ ++// XRX200_BM_RAM_VAL_2_VAL2, /* Data value [15:0] */ ++// XRX200_BM_RAM_VAL_1, /* RAM Value Register 1 */ ++// XRX200_BM_RAM_VAL_1_VAL1, /* Data value [15:0] */ ++// XRX200_BM_RAM_VAL_0, /* RAM Value Register 0 */ ++// XRX200_BM_RAM_VAL_0_VAL0, /* Data value [15:0] */ ++// XRX200_BM_RAM_ADDR, /* RAM Address Register */ ++// XRX200_BM_RAM_ADDR_ADDR, /* RAM Address */ ++// XRX200_BM_RAM_CTRL, /* RAM Access Control Register */ ++// XRX200_BM_RAM_CTRL_BAS, /* Access Busy/Access Start */ ++// XRX200_BM_RAM_CTRL_OPMOD, /* Lookup Table Access Operation Mode */ ++// XRX200_BM_RAM_CTRL_ADDR, /* Address for RAM selection */ ++// XRX200_BM_FSQM_GCTRL, /* Free Segment Queue ManagerGlobal Control Register */ ++// XRX200_BM_FSQM_GCTRL_SEGNUM, /* Maximum Segment Number */ ++// XRX200_BM_CONS_SEG, /* Number of Consumed SegmentsRegister */ ++// XRX200_BM_CONS_SEG_FSEG, /* Number of Consumed Segments */ ++// XRX200_BM_CONS_PKT, /* Number of Consumed PacketPointers Register */ ++// XRX200_BM_CONS_PKT_FQP, /* Number of Consumed Packet Pointers */ ++// XRX200_BM_GCTRL_F, /* Buffer Manager Global ControlRegister 0 */ ++// XRX200_BM_GCTRL_BM_STA, /* Buffer Manager Initialization Status Bit */ ++// XRX200_BM_GCTRL_SAT, /* RMON Counter Update Mode */ ++// XRX200_BM_GCTRL_FR_RBC, /* Freeze RMON RX Bad Byte 64 Bit Counter */ ++// XRX200_BM_GCTRL_FR_RGC, /* Freeze RMON RX Good Byte 64 Bit Counter */ ++// XRX200_BM_GCTRL_FR_TGC, /* Freeze RMON TX Good Byte 64 Bit Counter */ ++// XRX200_BM_GCTRL_I_FIN, /* RAM initialization finished */ ++// XRX200_BM_GCTRL_CX_INI, /* PQM Context RAM initialization */ ++// XRX200_BM_GCTRL_FP_INI, /* FPQM RAM initialization */ ++// XRX200_BM_GCTRL_FS_INI, /* FSQM RAM initialization */ ++// XRX200_BM_GCTRL_R_SRES, /* Software Reset for RMON */ ++// XRX200_BM_GCTRL_S_SRES, /* Software Reset for Scheduler */ ++// XRX200_BM_GCTRL_A_SRES, /* Software Reset for AVG */ ++// XRX200_BM_GCTRL_P_SRES, /* Software Reset for PQM */ ++// XRX200_BM_GCTRL_F_SRES, /* Software Reset for FSQM */ ++// XRX200_BM_QUEUE_GCTRL, /* Queue Manager GlobalControl Register 0 */ ++ XRX200_BM_QUEUE_GCTRL_GL_MOD, /* WRED Mode Signal */ ++// XRX200_BM_QUEUE_GCTRL_AQUI, /* Average Queue Update Interval */ ++// XRX200_BM_QUEUE_GCTRL_AQWF, /* Average Queue Weight Factor */ ++// XRX200_BM_QUEUE_GCTRL_QAVGEN, /* Queue Average Calculation Enable */ ++// XRX200_BM_QUEUE_GCTRL_DPROB, /* Drop Probability Profile */ ++// XRX200_BM_WRED_RTH_0, /* WRED Red Threshold Register0 */ ++// XRX200_BM_WRED_RTH_0_MINTH, /* Minimum Threshold */ ++// XRX200_BM_WRED_RTH_1, /* WRED Red Threshold Register1 */ ++// XRX200_BM_WRED_RTH_1_MAXTH, /* Maximum Threshold */ ++// XRX200_BM_WRED_YTH_0, /* WRED Yellow ThresholdRegister 0 */ ++// XRX200_BM_WRED_YTH_0_MINTH, /* Minimum Threshold */ ++// XRX200_BM_WRED_YTH_1, /* WRED Yellow ThresholdRegister 1 */ ++// XRX200_BM_WRED_YTH_1_MAXTH, /* Maximum Threshold */ ++// XRX200_BM_WRED_GTH_0, /* WRED Green ThresholdRegister 0 */ ++// XRX200_BM_WRED_GTH_0_MINTH, /* Minimum Threshold */ ++// XRX200_BM_WRED_GTH_1, /* WRED Green ThresholdRegister 1 */ ++// XRX200_BM_WRED_GTH_1_MAXTH, /* Maximum Threshold */ ++// XRX200_BM_DROP_GTH_0_THR, /* Drop Threshold ConfigurationRegister 0 */ ++// XRX200_BM_DROP_GTH_0_THR_FQ, /* Threshold for frames marked red */ ++// XRX200_BM_DROP_GTH_1_THY, /* Drop Threshold ConfigurationRegister 1 */ ++// XRX200_BM_DROP_GTH_1_THY_FQ, /* Threshold for frames marked yellow */ ++// XRX200_BM_DROP_GTH_2_THG, /* Drop Threshold ConfigurationRegister 2 */ ++// XRX200_BM_DROP_GTH_2_THG_FQ, /* Threshold for frames marked green */ ++// XRX200_BM_IER, /* Buffer Manager Global InterruptEnable Register */ ++// XRX200_BM_IER_CNT4, /* Counter Group 4 (RMON-CLASSIFICATION) Interrupt Enable */ ++// XRX200_BM_IER_CNT3, /* Counter Group 3 (RMON-PQM) Interrupt Enable */ ++// XRX200_BM_IER_CNT2, /* Counter Group 2 (RMON-SCHEDULER) Interrupt Enable */ ++// XRX200_BM_IER_CNT1, /* Counter Group 1 (RMON-QFETCH) Interrupt Enable */ ++// XRX200_BM_IER_CNT0, /* Counter Group 0 (RMON-QSTOR) Interrupt Enable */ ++// XRX200_BM_IER_DEQ, /* PQM dequeue Interrupt Enable */ ++// XRX200_BM_IER_ENQ, /* PQM Enqueue Interrupt Enable */ ++// XRX200_BM_IER_FSQM, /* Buffer Empty Interrupt Enable */ ++// XRX200_BM_ISR, /* Buffer Manager Global InterruptStatus Register */ ++// XRX200_BM_ISR_CNT4, /* Counter Group 4 Interrupt */ ++// XRX200_BM_ISR_CNT3, /* Counter Group 3 Interrupt */ ++// XRX200_BM_ISR_CNT2, /* Counter Group 2 Interrupt */ ++// XRX200_BM_ISR_CNT1, /* Counter Group 1 Interrupt */ ++// XRX200_BM_ISR_CNT0, /* Counter Group 0 Interrupt */ ++// XRX200_BM_ISR_DEQ, /* PQM dequeue Interrupt Enable */ ++// XRX200_BM_ISR_ENQ, /* PQM Enqueue Interrupt */ ++// XRX200_BM_ISR_FSQM, /* Buffer Empty Interrupt */ ++// XRX200_BM_CISEL, /* Buffer Manager RMON CounterInterrupt Select Register */ ++// XRX200_BM_CISEL_PORT, /* Port Number */ ++// XRX200_BM_DEBUG_CTRL_DBG, /* Debug Control Register */ ++// XRX200_BM_DEBUG_CTRL_DBG_SEL, /* Select Signal for Debug Multiplexer */ ++// XRX200_BM_DEBUG_VAL_DBG, /* Debug Value Register */ ++// XRX200_BM_DEBUG_VAL_DBG_DAT, /* Debug Data Value */ ++// XRX200_BM_PCFG, /* Buffer Manager PortConfiguration Register */ ++// XRX200_BM_PCFG_CNTEN, /* RMON Counter Enable */ ++// XRX200_BM_RMON_CTRL_RAM1, /* Buffer ManagerRMON Control Register */ ++// XRX200_BM_RMON_CTRL_RAM2_RES, /* Software Reset for RMON RAM2 */ ++// XRX200_BM_RMON_CTRL_RAM1_RES, /* Software Reset for RMON RAM1 */ ++// XRX200_PQM_DP, /* Packet Queue ManagerDrop Probability Register */ ++// XRX200_PQM_DP_DPROB, /* Drop Probability Profile */ ++// XRX200_PQM_RS, /* Packet Queue ManagerRate Shaper Assignment Register */ ++// XRX200_PQM_RS_EN2, /* Rate Shaper 2 Enable */ ++// XRX200_PQM_RS_RS2, /* Rate Shaper 2 */ ++// XRX200_PQM_RS_EN1, /* Rate Shaper 1 Enable */ ++// XRX200_PQM_RS_RS1, /* Rate Shaper 1 */ ++// XRX200_RS_CTRL, /* Rate Shaper ControlRegister */ ++// XRX200_RS_CTRL_RSEN, /* Rate Shaper Enable */ ++// XRX200_RS_CBS, /* Rate Shaper CommittedBurst Size Register */ ++// XRX200_RS_CBS_CBS, /* Committed Burst Size */ ++// XRX200_RS_IBS, /* Rate Shaper InstantaneousBurst Size Register */ ++// XRX200_RS_IBS_IBS, /* Instantaneous Burst Size */ ++// XRX200_RS_CIR_EXP, /* Rate Shaper RateExponent Register */ ++// XRX200_RS_CIR_EXP_EXP, /* Exponent */ ++// XRX200_RS_CIR_MANT, /* Rate Shaper RateMantissa Register */ ++// XRX200_RS_CIR_MANT_MANT, /* Mantissa */ ++ XRX200_PCE_TBL_KEY_7, /* Table Key Data 7 */ ++// XRX200_PCE_TBL_KEY_7_KEY7, /* Key Value[15:0] */ ++ XRX200_PCE_TBL_KEY_6, /* Table Key Data 6 */ ++// XRX200_PCE_TBL_KEY_6_KEY6, /* Key Value[15:0] */ ++ XRX200_PCE_TBL_KEY_5, /* Table Key Data 5 */ ++// XRX200_PCE_TBL_KEY_5_KEY5, /* Key Value[15:0] */ ++ XRX200_PCE_TBL_KEY_4, /* Table Key Data 4 */ ++// XRX200_PCE_TBL_KEY_4_KEY4, /* Key Value[15:0] */ ++ XRX200_PCE_TBL_KEY_3, /* Table Key Data 3 */ ++// XRX200_PCE_TBL_KEY_3_KEY3, /* Key Value[15:0] */ ++ XRX200_PCE_TBL_KEY_2, /* Table Key Data 2 */ ++// XRX200_PCE_TBL_KEY_2_KEY2, /* Key Value[15:0] */ ++ XRX200_PCE_TBL_KEY_1, /* Table Key Data 1 */ ++// XRX200_PCE_TBL_KEY_1_KEY1, /* Key Value[31:16] */ ++ XRX200_PCE_TBL_KEY_0, /* Table Key Data 0 */ ++// XRX200_PCE_TBL_KEY_0_KEY0, /* Key Value[15:0] */ ++ XRX200_PCE_TBL_MASK_0, /* Table Mask Write Register0 */ ++// XRX200_PCE_TBL_MASK_0_MASK0, /* Mask Pattern [15:0] */ ++ XRX200_PCE_TBL_VAL_4, /* Table Value Register4 */ ++// XRX200_PCE_TBL_VAL_4_VAL4, /* Data value [15:0] */ ++ XRX200_PCE_TBL_VAL_3, /* Table Value Register3 */ ++// XRX200_PCE_TBL_VAL_3_VAL3, /* Data value [15:0] */ ++ XRX200_PCE_TBL_VAL_2, /* Table Value Register2 */ ++// XRX200_PCE_TBL_VAL_2_VAL2, /* Data value [15:0] */ ++ XRX200_PCE_TBL_VAL_1, /* Table Value Register1 */ ++// XRX200_PCE_TBL_VAL_1_VAL1, /* Data value [15:0] */ ++ XRX200_PCE_TBL_VAL_0, /* Table Value Register0 */ ++// XRX200_PCE_TBL_VAL_0_VAL0, /* Data value [15:0] */ ++// XRX200_PCE_TBL_ADDR, /* Table Entry AddressRegister */ ++ XRX200_PCE_TBL_ADDR_ADDR, /* Table Address */ ++// XRX200_PCE_TBL_CTRL, /* Table Access ControlRegister */ ++ XRX200_PCE_TBL_CTRL_BAS, /* Access Busy/Access Start */ ++ XRX200_PCE_TBL_CTRL_TYPE, /* Lookup Entry Type */ ++ XRX200_PCE_TBL_CTRL_VLD, /* Lookup Entry Valid */ ++ XRX200_PCE_TBL_CTRL_GMAP, /* Group Map */ ++ XRX200_PCE_TBL_CTRL_OPMOD, /* Lookup Table Access Operation Mode */ ++ XRX200_PCE_TBL_CTRL_ADDR, /* Lookup Table Address */ ++// XRX200_PCE_TBL_STAT, /* Table General StatusRegister */ ++// XRX200_PCE_TBL_STAT_TBUSY, /* Table Access Busy */ ++// XRX200_PCE_TBL_STAT_TEMPT, /* Table Empty */ ++// XRX200_PCE_TBL_STAT_TFUL, /* Table Full */ ++// XRX200_PCE_AGE_0, /* Aging Counter ConfigurationRegister 0 */ ++// XRX200_PCE_AGE_0_EXP, /* Aging Counter Exponent Value */ ++// XRX200_PCE_AGE_1, /* Aging Counter ConfigurationRegister 1 */ ++// XRX200_PCE_AGE_1_MANT, /* Aging Counter Mantissa Value */ ++// XRX200_PCE_PMAP_1, /* Port Map Register 1 */ ++// XRX200_PCE_PMAP_1_MPMAP, /* Monitoring Port Map */ ++// XRX200_PCE_PMAP_2, /* Port Map Register 2 */ ++// XRX200_PCE_PMAP_2_DMCPMAP, /* Default Multicast Port Map */ ++// XRX200_PCE_PMAP_3, /* Port Map Register 3 */ ++// XRX200_PCE_PMAP_3_UUCMAP, /* Default Unknown Unicast Port Map */ ++// XRX200_PCE_GCTRL_0, /* PCE Global Control Register0 */ ++// XRX200_PCE_GCTRL_0_IGMP, /* IGMP Mode Selection */ ++ XRX200_PCE_GCTRL_0_VLAN, /* VLAN-aware Switching */ ++// XRX200_PCE_GCTRL_0_NOPM, /* No Port Map Forwarding */ ++// XRX200_PCE_GCTRL_0_SCONUC, /* Unknown Unicast Storm Control */ ++// XRX200_PCE_GCTRL_0_SCONMC, /* Multicast Storm Control */ ++// XRX200_PCE_GCTRL_0_SCONBC, /* Broadcast Storm Control */ ++// XRX200_PCE_GCTRL_0_SCONMOD, /* Storm Control Mode */ ++// XRX200_PCE_GCTRL_0_SCONMET, /* Storm Control Metering Instance */ ++// XRX200_PCE_GCTRL_0_MC_VALID, /* Access Request */ ++// XRX200_PCE_GCTRL_0_PLCKMOD, /* Port Lock Mode */ ++// XRX200_PCE_GCTRL_0_PLIMMOD, /* MAC Address Learning Limitation Mode */ ++// XRX200_PCE_GCTRL_0_MTFL, /* MAC Table Flushing */ ++// XRX200_PCE_GCTRL_1, /* PCE Global Control Register1 */ ++// XRX200_PCE_GCTRL_1_PCE_DIS, /* PCE Disable after currently processed packet */ ++// XRX200_PCE_GCTRL_1_LRNMOD, /* MAC Address Learning Mode */ ++// XRX200_PCE_TCM_GLOB_CTRL, /* Three-color MarkerGlobal Control Register */ ++// XRX200_PCE_TCM_GLOB_CTRL_DPRED, /* Re-marking Drop Precedence Red Encoding */ ++// XRX200_PCE_TCM_GLOB_CTRL_DPYEL, /* Re-marking Drop Precedence Yellow Encoding */ ++// XRX200_PCE_TCM_GLOB_CTRL_DPGRN, /* Re-marking Drop Precedence Green Encoding */ ++// XRX200_PCE_IGMP_CTRL, /* IGMP Control Register */ ++// XRX200_PCE_IGMP_CTRL_FAGEEN, /* Force Aging of Table Entries Enable */ ++// XRX200_PCE_IGMP_CTRL_FLEAVE, /* Fast Leave Enable */ ++// XRX200_PCE_IGMP_CTRL_DMRTEN, /* Default Maximum Response Time Enable */ ++// XRX200_PCE_IGMP_CTRL_JASUP, /* Join Aggregation Suppression Enable */ ++// XRX200_PCE_IGMP_CTRL_REPSUP, /* Report Suppression Enable */ ++// XRX200_PCE_IGMP_CTRL_SRPEN, /* Snooping of Router Port Enable */ ++// XRX200_PCE_IGMP_CTRL_ROB, /* Robustness Variable */ ++// XRX200_PCE_IGMP_CTRL_DMRT, /* IGMP Default Maximum Response Time */ ++// XRX200_PCE_IGMP_DRPM, /* IGMP Default RouterPort Map Register */ ++// XRX200_PCE_IGMP_DRPM_DRPM, /* IGMP Default Router Port Map */ ++// XRX200_PCE_IGMP_AGE_0, /* IGMP Aging Register0 */ ++// XRX200_PCE_IGMP_AGE_0_MANT, /* IGMP Group Aging Time Mantissa */ ++// XRX200_PCE_IGMP_AGE_0_EXP, /* IGMP Group Aging Time Exponent */ ++// XRX200_PCE_IGMP_AGE_1, /* IGMP Aging Register1 */ ++// XRX200_PCE_IGMP_AGE_1_MANT, /* IGMP Router Port Aging Time Mantissa */ ++// XRX200_PCE_IGMP_STAT, /* IGMP Status Register */ ++// XRX200_PCE_IGMP_STAT_IGPM, /* IGMP Port Map */ ++// XRX200_WOL_GLB_CTRL, /* Wake-on-LAN ControlRegister */ ++// XRX200_WOL_GLB_CTRL_PASSEN, /* WoL Password Enable */ ++// XRX200_WOL_DA_0, /* Wake-on-LAN DestinationAddress Register 0 */ ++// XRX200_WOL_DA_0_DA0, /* WoL Destination Address [15:0] */ ++// XRX200_WOL_DA_1, /* Wake-on-LAN DestinationAddress Register 1 */ ++// XRX200_WOL_DA_1_DA1, /* WoL Destination Address [31:16] */ ++// XRX200_WOL_DA_2, /* Wake-on-LAN DestinationAddress Register 2 */ ++// XRX200_WOL_DA_2_DA2, /* WoL Destination Address [47:32] */ ++// XRX200_WOL_PW_0, /* Wake-on-LAN Password Register0 */ ++// XRX200_WOL_PW_0_PW0, /* WoL Password [15:0] */ ++// XRX200_WOL_PW_1, /* Wake-on-LAN Password Register1 */ ++// XRX200_WOL_PW_1_PW1, /* WoL Password [31:16] */ ++// XRX200_WOL_PW_2, /* Wake-on-LAN Password Register2 */ ++// XRX200_WOL_PW_2_PW2, /* WoL Password [47:32] */ ++// XRX200_PCE_IER_0_PINT, /* Parser and ClassificationEngine Global Interrupt Enable Register 0 */ ++// XRX200_PCE_IER_0_PINT_15, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_14, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_13, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_12, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_11, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_10, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_9, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_8, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_7, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_6, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_5, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_4, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_3, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_2, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_1, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_0_PINT_0, /* Port Interrupt Enable */ ++// XRX200_PCE_IER_1, /* Parser and ClassificationEngine Global Interrupt Enable Register 1 */ ++// XRX200_PCE_IER_1_FLOWINT, /* Traffic Flow Table Interrupt Rule matched Interrupt Enable */ ++// XRX200_PCE_IER_1_CPH2, /* Classification Phase 2 Ready Interrupt Enable */ ++// XRX200_PCE_IER_1_CPH1, /* Classification Phase 1 Ready Interrupt Enable */ ++// XRX200_PCE_IER_1_CPH0, /* Classification Phase 0 Ready Interrupt Enable */ ++// XRX200_PCE_IER_1_PRDY, /* Parser Ready Interrupt Enable */ ++// XRX200_PCE_IER_1_IGTF, /* IGMP Table Full Interrupt Enable */ ++// XRX200_PCE_IER_1_MTF, /* MAC Table Full Interrupt Enable */ ++// XRX200_PCE_ISR_0_PINT, /* Parser and ClassificationEngine Global Interrupt Status Register 0 */ ++// XRX200_PCE_ISR_0_PINT_15, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_14, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_13, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_12, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_11, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_10, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_9, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_8, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_7, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_6, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_5, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_4, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_3, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_2, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_1, /* Port Interrupt */ ++// XRX200_PCE_ISR_0_PINT_0, /* Port Interrupt */ ++// XRX200_PCE_ISR_1, /* Parser and ClassificationEngine Global Interrupt Status Register 1 */ ++// XRX200_PCE_ISR_1_FLOWINT, /* Traffic Flow Table Interrupt Rule matched */ ++// XRX200_PCE_ISR_1_CPH2, /* Classification Phase 2 Ready Interrupt */ ++// XRX200_PCE_ISR_1_CPH1, /* Classification Phase 1 Ready Interrupt */ ++// XRX200_PCE_ISR_1_CPH0, /* Classification Phase 0 Ready Interrupt */ ++// XRX200_PCE_ISR_1_PRDY, /* Parser Ready Interrupt */ ++// XRX200_PCE_ISR_1_IGTF, /* IGMP Table Full Interrupt */ ++// XRX200_PCE_ISR_1_MTF, /* MAC Table Full Interrupt */ ++// XRX200_PARSER_STAT_FIFO, /* Parser Status Register */ ++// XRX200_PARSER_STAT_FSM_DAT_CNT, /* Parser FSM Data Counter */ ++// XRX200_PARSER_STAT_FSM_STATE, /* Parser FSM State */ ++// XRX200_PARSER_STAT_PKT_ERR, /* Packet error detected */ ++// XRX200_PARSER_STAT_FSM_FIN, /* Parser FSM finished */ ++// XRX200_PARSER_STAT_FSM_START, /* Parser FSM start */ ++// XRX200_PARSER_STAT_FIFO_RDY, /* Parser FIFO ready for read. */ ++// XRX200_PARSER_STAT_FIFO_FULL, /* Parser */ ++// XRX200_PCE_PCTRL_0, /* PCE Port ControlRegister 0 */ ++// XRX200_PCE_PCTRL_0_MCST, /* Multicast Forwarding Mode Selection */ ++// XRX200_PCE_PCTRL_0_EGSTEN, /* Table-based Egress Special Tag Enable */ ++// XRX200_PCE_PCTRL_0_IGSTEN, /* Ingress Special Tag Enable */ ++// XRX200_PCE_PCTRL_0_PCPEN, /* PCP Remarking Mode */ ++// XRX200_PCE_PCTRL_0_CLPEN, /* Class Remarking Mode */ ++// XRX200_PCE_PCTRL_0_DPEN, /* Drop Precedence Remarking Mode */ ++// XRX200_PCE_PCTRL_0_CMOD, /* Three-color Marker Color Mode */ ++// XRX200_PCE_PCTRL_0_VREP, /* VLAN Replacement Mode */ ++ XRX200_PCE_PCTRL_0_TVM, /* Transparent VLAN Mode */ ++// XRX200_PCE_PCTRL_0_PLOCK, /* Port Locking Enable */ ++// XRX200_PCE_PCTRL_0_AGEDIS, /* Aging Disable */ ++// XRX200_PCE_PCTRL_0_PSTATE, /* Port State */ ++// XRX200_PCE_PCTRL_1, /* PCE Port ControlRegister 1 */ ++// XRX200_PCE_PCTRL_1_LRNLIM, /* MAC Address Learning Limit */ ++// XRX200_PCE_PCTRL_2, /* PCE Port ControlRegister 2 */ ++// XRX200_PCE_PCTRL_2_DSCPMOD, /* DSCP Mode Selection */ ++// XRX200_PCE_PCTRL_2_DSCP, /* Enable DSCP to select the Class of Service */ ++// XRX200_PCE_PCTRL_2_PCP, /* Enable VLAN PCP to select the Class of Service */ ++// XRX200_PCE_PCTRL_2_PCLASS, /* Port-based Traffic Class */ ++// XRX200_PCE_PCTRL_3_VIO, /* PCE Port ControlRegister 3 */ ++// XRX200_PCE_PCTRL_3_EDIR, /* Egress Redirection Mode */ ++// XRX200_PCE_PCTRL_3_RXDMIR, /* Receive Mirroring Enable for dropped frames */ ++// XRX200_PCE_PCTRL_3_RXVMIR, /* Receive Mirroring Enable for valid frames */ ++// XRX200_PCE_PCTRL_3_TXMIR, /* Transmit Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_7, /* Violation Type 7 Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_6, /* Violation Type 6 Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_5, /* Violation Type 5 Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_4, /* Violation Type 4 Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_3, /* Violation Type 3 Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_2, /* Violation Type 2 Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_1, /* Violation Type 1 Mirroring Enable */ ++// XRX200_PCE_PCTRL_3_VIO_0, /* Violation Type 0 Mirroring Enable */ ++// XRX200_WOL_CTRL, /* Wake-on-LAN ControlRegister */ ++// XRX200_WOL_CTRL_PORT, /* WoL Enable */ ++// XRX200_PCE_VCTRL, /* PCE VLAN ControlRegister */ ++ XRX200_PCE_VCTRL_VSR, /* VLAN Security Rule */ ++ XRX200_PCE_VCTRL_VEMR, /* VLAN Egress Member Violation Rule */ ++ XRX200_PCE_VCTRL_VIMR, /* VLAN Ingress Member Violation Rule */ ++ XRX200_PCE_VCTRL_VINR, /* VLAN Ingress Tag Rule */ ++ XRX200_PCE_VCTRL_UVR, /* Unknown VLAN Rule */ ++// XRX200_PCE_DEFPVID, /* PCE Default PortVID Register */ ++ XRX200_PCE_DEFPVID_PVID, /* Default Port VID Index */ ++// XRX200_PCE_PSTAT, /* PCE Port StatusRegister */ ++// XRX200_PCE_PSTAT_LRNCNT, /* Learning Count */ ++// XRX200_PCE_PIER, /* Parser and ClassificationEngine Port Interrupt Enable Register */ ++// XRX200_PCE_PIER_CLDRP, /* Classification Drop Interrupt Enable */ ++// XRX200_PCE_PIER_PTDRP, /* Port Drop Interrupt Enable */ ++// XRX200_PCE_PIER_VLAN, /* VLAN Violation Interrupt Enable */ ++// XRX200_PCE_PIER_WOL, /* Wake-on-LAN Interrupt Enable */ ++// XRX200_PCE_PIER_LOCK, /* Port Limit Alert Interrupt Enable */ ++// XRX200_PCE_PIER_LIM, /* Port Lock Alert Interrupt Enable */ ++// XRX200_PCE_PISR, /* Parser and ClassificationEngine Port Interrupt Status Register */ ++// XRX200_PCE_PISR_CLDRP, /* Classification Drop Interrupt */ ++// XRX200_PCE_PISR_PTDRP, /* Port Drop Interrupt */ ++// XRX200_PCE_PISR_VLAN, /* VLAN Violation Interrupt */ ++// XRX200_PCE_PISR_WOL, /* Wake-on-LAN Interrupt */ ++// XRX200_PCE_PISR_LOCK, /* Port Lock Alert Interrupt */ ++// XRX200_PCE_PISR_LIMIT, /* Port Limitation Alert Interrupt */ ++// XRX200_PCE_TCM_CTRL, /* Three-colorMarker Control Register */ ++// XRX200_PCE_TCM_CTRL_TCMEN, /* Three-color Marker metering instance enable */ ++// XRX200_PCE_TCM_STAT, /* Three-colorMarker Status Register */ ++// XRX200_PCE_TCM_STAT_AL1, /* Three-color Marker Alert 1 Status */ ++// XRX200_PCE_TCM_STAT_AL0, /* Three-color Marker Alert 0 Status */ ++// XRX200_PCE_TCM_CBS, /* Three-color MarkerCommitted Burst Size Register */ ++// XRX200_PCE_TCM_CBS_CBS, /* Committed Burst Size */ ++// XRX200_PCE_TCM_EBS, /* Three-color MarkerExcess Burst Size Register */ ++// XRX200_PCE_TCM_EBS_EBS, /* Excess Burst Size */ ++// XRX200_PCE_TCM_IBS, /* Three-color MarkerInstantaneous Burst Size Register */ ++// XRX200_PCE_TCM_IBS_IBS, /* Instantaneous Burst Size */ ++// XRX200_PCE_TCM_CIR_MANT, /* Three-colorMarker Constant Information Rate Mantissa Register */ ++// XRX200_PCE_TCM_CIR_MANT_MANT, /* Rate Counter Mantissa */ ++// XRX200_PCE_TCM_CIR_EXP, /* Three-colorMarker Constant Information Rate Exponent Register */ ++// XRX200_PCE_TCM_CIR_EXP_EXP, /* Rate Counter Exponent */ ++// XRX200_MAC_TEST, /* MAC Test Register */ ++// XRX200_MAC_TEST_JTP, /* Jitter Test Pattern */ ++// XRX200_MAC_PFAD_CFG, /* MAC Pause FrameSource Address Configuration Register */ ++// XRX200_MAC_PFAD_CFG_SAMOD, /* Source Address Mode */ ++// XRX200_MAC_PFSA_0, /* Pause Frame SourceAddress Part 0 */ ++// XRX200_MAC_PFSA_0_PFAD, /* Pause Frame Source Address Part 0 */ ++// XRX200_MAC_PFSA_1, /* Pause Frame SourceAddress Part 1 */ ++// XRX200_MAC_PFSA_1_PFAD, /* Pause Frame Source Address Part 1 */ ++// XRX200_MAC_PFSA_2, /* Pause Frame SourceAddress Part 2 */ ++// XRX200_MAC_PFSA_2_PFAD, /* Pause Frame Source Address Part 2 */ ++// XRX200_MAC_FLEN, /* MAC Frame Length Register */ ++// XRX200_MAC_FLEN_LEN, /* Maximum Frame Length */ ++// XRX200_MAC_VLAN_ETYPE_0, /* MAC VLAN EthertypeRegister 0 */ ++// XRX200_MAC_VLAN_ETYPE_0_OUTER, /* Ethertype */ ++// XRX200_MAC_VLAN_ETYPE_1, /* MAC VLAN EthertypeRegister 1 */ ++// XRX200_MAC_VLAN_ETYPE_1_INNER, /* Ethertype */ ++// XRX200_MAC_IER, /* MAC Interrupt EnableRegister */ ++// XRX200_MAC_IER_MACIEN, /* MAC Interrupt Enable */ ++// XRX200_MAC_ISR, /* MAC Interrupt StatusRegister */ ++// XRX200_MAC_ISR_MACINT, /* MAC Interrupt */ ++// XRX200_MAC_PSTAT, /* MAC Port Status Register */ ++// XRX200_MAC_PSTAT_PACT, /* PHY Active Status */ ++ XRX200_MAC_PSTAT_GBIT, /* Gigabit Speed Status */ ++ XRX200_MAC_PSTAT_MBIT, /* Megabit Speed Status */ ++ XRX200_MAC_PSTAT_FDUP, /* Full Duplex Status */ ++// XRX200_MAC_PSTAT_RXPAU, /* Receive Pause Status */ ++// XRX200_MAC_PSTAT_TXPAU, /* Transmit Pause Status */ ++// XRX200_MAC_PSTAT_RXPAUEN, /* Receive Pause Enable Status */ ++// XRX200_MAC_PSTAT_TXPAUEN, /* Transmit Pause Enable Status */ ++ XRX200_MAC_PSTAT_LSTAT, /* Link Status */ ++// XRX200_MAC_PSTAT_CRS, /* Carrier Sense Status */ ++// XRX200_MAC_PSTAT_TXLPI, /* Transmit Low-power Idle Status */ ++// XRX200_MAC_PSTAT_RXLPI, /* Receive Low-power Idle Status */ ++// XRX200_MAC_PISR, /* MAC Interrupt Status Register */ ++// XRX200_MAC_PISR_PACT, /* PHY Active Status */ ++// XRX200_MAC_PISR_SPEED, /* Megabit Speed Status */ ++// XRX200_MAC_PISR_FDUP, /* Full Duplex Status */ ++// XRX200_MAC_PISR_RXPAUEN, /* Receive Pause Enable Status */ ++// XRX200_MAC_PISR_TXPAUEN, /* Transmit Pause Enable Status */ ++// XRX200_MAC_PISR_LPIOFF, /* Receive Low-power Idle Mode is left */ ++// XRX200_MAC_PISR_LPION, /* Receive Low-power Idle Mode is entered */ ++// XRX200_MAC_PISR_JAM, /* Jam Status Detected */ ++// XRX200_MAC_PISR_TOOSHORT, /* Too Short Frame Error Detected */ ++// XRX200_MAC_PISR_TOOLONG, /* Too Long Frame Error Detected */ ++// XRX200_MAC_PISR_LENERR, /* Length Mismatch Error Detected */ ++// XRX200_MAC_PISR_FCSERR, /* Frame Checksum Error Detected */ ++// XRX200_MAC_PISR_TXPAUSE, /* Pause Frame Transmitted */ ++// XRX200_MAC_PISR_RXPAUSE, /* Pause Frame Received */ ++// XRX200_MAC_PIER, /* MAC Interrupt Enable Register */ ++// XRX200_MAC_PIER_PACT, /* PHY Active Status */ ++// XRX200_MAC_PIER_SPEED, /* Megabit Speed Status */ ++// XRX200_MAC_PIER_FDUP, /* Full Duplex Status */ ++// XRX200_MAC_PIER_RXPAUEN, /* Receive Pause Enable Status */ ++// XRX200_MAC_PIER_TXPAUEN, /* Transmit Pause Enable Status */ ++// XRX200_MAC_PIER_LPIOFF, /* Low-power Idle Off Interrupt Mask */ ++// XRX200_MAC_PIER_LPION, /* Low-power Idle On Interrupt Mask */ ++// XRX200_MAC_PIER_JAM, /* Jam Status Interrupt Mask */ ++// XRX200_MAC_PIER_TOOSHORT, /* Too Short Frame Error Interrupt Mask */ ++// XRX200_MAC_PIER_TOOLONG, /* Too Long Frame Error Interrupt Mask */ ++// XRX200_MAC_PIER_LENERR, /* Length Mismatch Error Interrupt Mask */ ++// XRX200_MAC_PIER_FCSERR, /* Frame Checksum Error Interrupt Mask */ ++// XRX200_MAC_PIER_TXPAUSE, /* Transmit Pause Frame Interrupt Mask */ ++// XRX200_MAC_PIER_RXPAUSE, /* Receive Pause Frame Interrupt Mask */ ++// XRX200_MAC_CTRL_0, /* MAC Control Register0 */ ++// XRX200_MAC_CTRL_0_LCOL, /* Late Collision Control */ ++// XRX200_MAC_CTRL_0_BM, /* Burst Mode Control */ ++// XRX200_MAC_CTRL_0_APADEN, /* Automatic VLAN Padding Enable */ ++// XRX200_MAC_CTRL_0_VPAD2EN, /* Stacked VLAN Padding Enable */ ++// XRX200_MAC_CTRL_0_VPADEN, /* VLAN Padding Enable */ ++// XRX200_MAC_CTRL_0_PADEN, /* Padding Enable */ ++// XRX200_MAC_CTRL_0_FCS, /* Transmit FCS Control */ ++ XRX200_MAC_CTRL_0_FCON, /* Flow Control Mode */ ++// XRX200_MAC_CTRL_0_FDUP, /* Full Duplex Control */ ++// XRX200_MAC_CTRL_0_GMII, /* GMII/MII interface mode selection */ ++// XRX200_MAC_CTRL_1, /* MAC Control Register1 */ ++// XRX200_MAC_CTRL_1_SHORTPRE, /* Short Preamble Control */ ++// XRX200_MAC_CTRL_1_IPG, /* Minimum Inter Packet Gap Size */ ++// XRX200_MAC_CTRL_2, /* MAC Control Register2 */ ++// XRX200_MAC_CTRL_2_MLEN, /* Maximum Untagged Frame Length */ ++// XRX200_MAC_CTRL_2_LCHKL, /* Frame Length Check Long Enable */ ++// XRX200_MAC_CTRL_2_LCHKS, /* Frame Length Check Short Enable */ ++// XRX200_MAC_CTRL_3, /* MAC Control Register3 */ ++// XRX200_MAC_CTRL_3_RCNT, /* Retry Count */ ++// XRX200_MAC_CTRL_4, /* MAC Control Register4 */ ++// XRX200_MAC_CTRL_4_LPIEN, /* LPI Mode Enable */ ++// XRX200_MAC_CTRL_4_WAIT, /* LPI Wait Time */ ++// XRX200_MAC_CTRL_5_PJPS, /* MAC Control Register5 */ ++// XRX200_MAC_CTRL_5_PJPS_NOBP, /* Prolonged Jam pattern size during no-backpressure state */ ++// XRX200_MAC_CTRL_5_PJPS_BP, /* Prolonged Jam pattern size during backpressure state */ ++// XRX200_MAC_CTRL_6_XBUF, /* Transmit and ReceiveBuffer Control Register */ ++// XRX200_MAC_CTRL_6_RBUF_DLY_WP, /* Delay */ ++// XRX200_MAC_CTRL_6_RBUF_INIT, /* Receive Buffer Initialization */ ++// XRX200_MAC_CTRL_6_RBUF_BYPASS, /* Bypass the Receive Buffer */ ++// XRX200_MAC_CTRL_6_XBUF_DLY_WP, /* Delay */ ++// XRX200_MAC_CTRL_6_XBUF_INIT, /* Initialize the Transmit Buffer */ ++// XRX200_MAC_CTRL_6_XBUF_BYPASS, /* Bypass the Transmit Buffer */ ++// XRX200_MAC_BUFST_XBUF, /* MAC Receive and TransmitBuffer Status Register */ ++// XRX200_MAC_BUFST_RBUF_UFL, /* Receive Buffer Underflow Indicator */ ++// XRX200_MAC_BUFST_RBUF_OFL, /* Receive Buffer Overflow Indicator */ ++// XRX200_MAC_BUFST_XBUF_UFL, /* Transmit Buffer Underflow Indicator */ ++// XRX200_MAC_BUFST_XBUF_OFL, /* Transmit Buffer Overflow Indicator */ ++// XRX200_MAC_TESTEN, /* MAC Test Enable Register */ ++// XRX200_MAC_TESTEN_JTEN, /* Jitter Test Enable */ ++// XRX200_MAC_TESTEN_TXER, /* Transmit Error Insertion */ ++// XRX200_MAC_TESTEN_LOOP, /* MAC Loopback Enable */ ++// XRX200_FDMA_CTRL, /* Ethernet Switch FetchDMA Control Register */ ++// XRX200_FDMA_CTRL_LPI_THRESHOLD, /* Low Power Idle Threshold */ ++// XRX200_FDMA_CTRL_LPI_MODE, /* Low Power Idle Mode */ ++// XRX200_FDMA_CTRL_EGSTAG, /* Egress Special Tag Size */ ++// XRX200_FDMA_CTRL_IGSTAG, /* Ingress Special Tag Size */ ++// XRX200_FDMA_CTRL_EXCOL, /* Excessive Collision Handling */ ++// XRX200_FDMA_STETYPE, /* Special Tag EthertypeControl Register */ ++// XRX200_FDMA_STETYPE_ETYPE, /* Special Tag Ethertype */ ++// XRX200_FDMA_VTETYPE, /* VLAN Tag EthertypeControl Register */ ++// XRX200_FDMA_VTETYPE_ETYPE, /* VLAN Tag Ethertype */ ++// XRX200_FDMA_STAT_0, /* FDMA Status Register0 */ ++// XRX200_FDMA_STAT_0_FSMS, /* FSM states status */ ++// XRX200_FDMA_IER, /* Fetch DMA Global InterruptEnable Register */ ++// XRX200_FDMA_IER_PCKD, /* Packet Drop Interrupt Enable */ ++// XRX200_FDMA_IER_PCKR, /* Packet Ready Interrupt Enable */ ++// XRX200_FDMA_IER_PCKT, /* Packet Sent Interrupt Enable */ ++// XRX200_FDMA_ISR, /* Fetch DMA Global InterruptStatus Register */ ++// XRX200_FDMA_ISR_PCKTD, /* Packet Drop */ ++// XRX200_FDMA_ISR_PCKR, /* Packet is Ready for Transmission */ ++// XRX200_FDMA_ISR_PCKT, /* Packet Sent Event */ ++// XRX200_FDMA_PCTRL, /* Ethernet SwitchFetch DMA Port Control Register */ ++// XRX200_FDMA_PCTRL_VLANMOD, /* VLAN Modification Enable */ ++// XRX200_FDMA_PCTRL_DSCPRM, /* DSCP Re-marking Enable */ ++// XRX200_FDMA_PCTRL_STEN, /* Special Tag Insertion Enable */ ++// XRX200_FDMA_PCTRL_EN, /* FDMA Port Enable */ ++// XRX200_FDMA_PRIO, /* Ethernet SwitchFetch DMA Port Priority Register */ ++// XRX200_FDMA_PRIO_PRIO, /* FDMA PRIO */ ++// XRX200_FDMA_PSTAT0, /* Ethernet SwitchFetch DMA Port Status Register 0 */ ++// XRX200_FDMA_PSTAT0_PKT_AVAIL, /* Port Egress Packet Available */ ++// XRX200_FDMA_PSTAT0_POK, /* Port Status OK */ ++// XRX200_FDMA_PSTAT0_PSEG, /* Port Egress Segment Count */ ++// XRX200_FDMA_PSTAT1_HDR, /* Ethernet SwitchFetch DMA Port Status Register 1 */ ++// XRX200_FDMA_PSTAT1_HDR_PTR, /* Header Pointer */ ++// XRX200_FDMA_TSTAMP0, /* Egress TimeStamp Register 0 */ ++// XRX200_FDMA_TSTAMP0_TSTL, /* Time Stamp [15:0] */ ++// XRX200_FDMA_TSTAMP1, /* Egress TimeStamp Register 1 */ ++// XRX200_FDMA_TSTAMP1_TSTH, /* Time Stamp [31:16] */ ++// XRX200_SDMA_CTRL, /* Ethernet Switch StoreDMA Control Register */ ++// XRX200_SDMA_CTRL_TSTEN, /* Time Stamp Enable */ ++// XRX200_SDMA_FCTHR1, /* SDMA Flow Control Threshold1 Register */ ++// XRX200_SDMA_FCTHR1_THR1, /* Threshold 1 */ ++// XRX200_SDMA_FCTHR2, /* SDMA Flow Control Threshold2 Register */ ++// XRX200_SDMA_FCTHR2_THR2, /* Threshold 2 */ ++// XRX200_SDMA_FCTHR3, /* SDMA Flow Control Threshold3 Register */ ++// XRX200_SDMA_FCTHR3_THR3, /* Threshold 3 */ ++// XRX200_SDMA_FCTHR4, /* SDMA Flow Control Threshold4 Register */ ++// XRX200_SDMA_FCTHR4_THR4, /* Threshold 4 */ ++// XRX200_SDMA_FCTHR5, /* SDMA Flow Control Threshold5 Register */ ++// XRX200_SDMA_FCTHR5_THR5, /* Threshold 5 */ ++// XRX200_SDMA_FCTHR6, /* SDMA Flow Control Threshold6 Register */ ++// XRX200_SDMA_FCTHR6_THR6, /* Threshold 6 */ ++// XRX200_SDMA_FCTHR7, /* SDMA Flow Control Threshold7 Register */ ++// XRX200_SDMA_FCTHR7_THR7, /* Threshold 7 */ ++// XRX200_SDMA_STAT_0, /* SDMA Status Register0 */ ++// XRX200_SDMA_STAT_0_BPS_FILL, /* Back Pressure Status */ ++// XRX200_SDMA_STAT_0_BPS_PNT, /* Back Pressure Status */ ++// XRX200_SDMA_STAT_0_DROP, /* Back Pressure Status */ ++// XRX200_SDMA_STAT_1, /* SDMA Status Register1 */ ++// XRX200_SDMA_STAT_1_FILL, /* Buffer Filling Level */ ++// XRX200_SDMA_STAT_2, /* SDMA Status Register2 */ ++// XRX200_SDMA_STAT_2_FSMS, /* FSM states status */ ++// XRX200_SDMA_IER, /* SDMA Interrupt Enable Register */ ++// XRX200_SDMA_IER_BPEX, /* Buffer Pointers Exceeded */ ++// XRX200_SDMA_IER_BFULL, /* Buffer Full */ ++// XRX200_SDMA_IER_FERR, /* Frame Error */ ++// XRX200_SDMA_IER_FRX, /* Frame Received Successfully */ ++// XRX200_SDMA_ISR, /* SDMA Interrupt Status Register */ ++// XRX200_SDMA_ISR_BPEX, /* Packet Descriptors Exceeded */ ++// XRX200_SDMA_ISR_BFULL, /* Buffer Full */ ++// XRX200_SDMA_ISR_FERR, /* Frame Error */ ++// XRX200_SDMA_ISR_FRX, /* Frame Received Successfully */ ++// XRX200_SDMA_PCTRL, /* Ethernet SwitchStore DMA Port Control Register */ ++// XRX200_SDMA_PCTRL_DTHR, /* Drop Threshold Selection */ ++// XRX200_SDMA_PCTRL_PTHR, /* Pause Threshold Selection */ ++// XRX200_SDMA_PCTRL_PHYEFWD, /* Forward PHY Error Frames */ ++// XRX200_SDMA_PCTRL_ALGFWD, /* Forward Alignment Error Frames */ ++// XRX200_SDMA_PCTRL_LENFWD, /* Forward Length Errored Frames */ ++// XRX200_SDMA_PCTRL_OSFWD, /* Forward Oversized Frames */ ++// XRX200_SDMA_PCTRL_USFWD, /* Forward Undersized Frames */ ++// XRX200_SDMA_PCTRL_FCSIGN, /* Ignore FCS Errors */ ++// XRX200_SDMA_PCTRL_FCSFWD, /* Forward FCS Errored Frames */ ++// XRX200_SDMA_PCTRL_PAUFWD, /* Pause Frame Forwarding */ ++// XRX200_SDMA_PCTRL_MFCEN, /* Metering Flow Control Enable */ ++// XRX200_SDMA_PCTRL_FCEN, /* Flow Control Enable */ ++// XRX200_SDMA_PCTRL_PEN, /* Port Enable */ ++// XRX200_SDMA_PRIO, /* Ethernet SwitchStore DMA Port Priority Register */ ++// XRX200_SDMA_PRIO_PRIO, /* SDMA PRIO */ ++// XRX200_SDMA_PSTAT0_HDR, /* Ethernet SwitchStore DMA Port Status Register 0 */ ++// XRX200_SDMA_PSTAT0_HDR_PTR, /* Port Ingress Queue Header Pointer */ ++// XRX200_SDMA_PSTAT1, /* Ethernet SwitchStore DMA Port Status Register 1 */ ++// XRX200_SDMA_PSTAT1_PPKT, /* Port Ingress Packet Count */ ++// XRX200_SDMA_TSTAMP0, /* Ingress TimeStamp Register 0 */ ++// XRX200_SDMA_TSTAMP0_TSTL, /* Time Stamp [15:0] */ ++// XRX200_SDMA_TSTAMP1, /* Ingress TimeStamp Register 1 */ ++// XRX200_SDMA_TSTAMP1_TSTH, /* Time Stamp [31:16] */ ++}; ++ ++ ++struct xrx200sw_reg { ++ int offset; ++ int shift; ++ int size; ++ int mult; ++} xrx200sw_reg[] = { ++// offeset shift size mult ++// {0x0000, 0, 16, 0x00}, /* XRX200_ETHSW_SWRES Ethernet Switch ResetControl Register */ ++// {0x0000, 1, 1, 0x00}, /* XRX200_ETHSW_SWRES_R1 Hardware Reset */ ++// {0x0000, 0, 1, 0x00}, /* XRX200_ETHSW_SWRES_R0 Register Configuration */ ++// {0x0004, 0, 16, 0x00}, /* XRX200_ETHSW_CLK_MAC_GAT Ethernet Switch Clock ControlRegister */ ++// {0x0004, 12, 4, 0x00}, /* XRX200_ETHSW_CLK_EXP_SLEEP Exponent to put system into sleep */ ++// {0x0004, 8, 4, 0x00}, /* XRX200_ETHSW_CLK_EXP_WAKE Exponent to wake up system */ ++// {0x0004, 7, 1, 0x00}, /* XRX200_ETHSW_CLK_CLK2_EN CLK2 Input for MAC */ ++// {0x0004, 6, 1, 0x00}, /* XRX200_ETHSW_CLK_EXT_DIV_EN External Clock Divider Enable */ ++// {0x0004, 5, 1, 0x00}, /* XRX200_ETHSW_CLK_RAM_DBG_EN Clock Gating Enable */ ++// {0x0004, 4, 1, 0x00}, /* XRX200_ETHSW_CLK_REG_GAT_EN Clock Gating Enable */ ++// {0x0004, 3, 1, 0x00}, /* XRX200_ETHSW_CLK_GAT_EN Clock Gating Enable */ ++// {0x0004, 2, 1, 0x00}, /* XRX200_ETHSW_CLK_MAC_GAT_EN Clock Gating Enable */ ++// {0x0008, 0, 16, 0x00}, /* XRX200_ETHSW_DBG_STEP Ethernet Switch Debug ControlRegister */ ++// {0x0008, 12, 4, 0x00}, /* XRX200_ETHSW_DBG_CLK_SEL Trigger Enable */ ++// {0x0008, 11, 1, 0x00}, /* XRX200_ETHSW_DBG_MON_EN Monitoring Enable */ ++// {0x0008, 9, 2, 0x00}, /* XRX200_ETHSW_DBG_TRIG_EN Trigger Enable */ ++// {0x0008, 8, 1, 0x00}, /* XRX200_ETHSW_DBG_MODE Debug Mode */ ++// {0x0008, 0, 8, 0x00}, /* XRX200_ETHSW_DBG_STEP_TIME Clock Step Size */ ++// {0x000C, 0, 16, 0x00}, /* XRX200_ETHSW_SSB_MODE Ethernet Switch SharedSegment Buffer Mode Register */ ++// {0x000C, 2, 4, 0x00}, /* XRX200_ETHSW_SSB_MODE_ADDE Memory Address */ ++// {0x000C, 0, 2, 0x00}, /* XRX200_ETHSW_SSB_MODE_MODE Memory Access Mode */ ++// {0x0010, 0, 16, 0x00}, /* XRX200_ETHSW_SSB_ADDR Ethernet Switch SharedSegment Buffer Address Register */ ++// {0x0010, 0, 16, 0x00}, /* XRX200_ETHSW_SSB_ADDR_ADDE Memory Address */ ++// {0x0014, 0, 16, 0x00}, /* XRX200_ETHSW_SSB_DATA Ethernet Switch SharedSegment Buffer Data Register */ ++// {0x0014, 0, 16, 0x00}, /* XRX200_ETHSW_SSB_DATA_DATA Data Value */ ++// {0x0018, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_0 Ethernet Switch CapabilityRegister 0 */ ++// {0x0018, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_0_SPEED Clock frequency */ ++// {0x001C, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_1 Ethernet Switch CapabilityRegister 1 */ ++// {0x001C, 15, 1, 0x00}, /* XRX200_ETHSW_CAP_1_GMAC MAC operation mode */ ++// {0x001C, 8, 7, 0x00}, /* XRX200_ETHSW_CAP_1_QUEUE Number of queues */ ++// {0x001C, 4, 4, 0x00}, /* XRX200_ETHSW_CAP_1_VPORTS Number of virtual ports */ ++// {0x001C, 0, 4, 0x00}, /* XRX200_ETHSW_CAP_1_PPORTS Number of physical ports */ ++// {0x0020, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_2 Ethernet Switch CapabilityRegister 2 */ ++// {0x0020, 0, 11, 0x00}, /* XRX200_ETHSW_CAP_2_PACKETS Number of packets */ ++// {0x0024, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_3 Ethernet Switch CapabilityRegister 3 */ ++// {0x0024, 8, 8, 0x00}, /* XRX200_ETHSW_CAP_3_METERS Number of traffic meters */ ++// {0x0024, 0, 8, 0x00}, /* XRX200_ETHSW_CAP_3_SHAPERS Number of traffic shapers */ ++// {0x0028, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_4 Ethernet Switch CapabilityRegister 4 */ ++// {0x0028, 8, 8, 0x00}, /* XRX200_ETHSW_CAP_4_PPPOE PPPoE table size */ ++// {0x0028, 0, 8, 0x00}, /* XRX200_ETHSW_CAP_4_VLAN Active VLAN table size */ ++// {0x002C, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_5 Ethernet Switch CapabilityRegister 5 */ ++// {0x002C, 8, 8, 0x00}, /* XRX200_ETHSW_CAP_5_IPPLEN IP packet length table size */ ++// {0x002C, 0, 8, 0x00}, /* XRX200_ETHSW_CAP_5_PROT Protocol table size */ ++// {0x0030, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_6 Ethernet Switch CapabilityRegister 6 */ ++// {0x0030, 8, 8, 0x00}, /* XRX200_ETHSW_CAP_6_MACDASA MAC DA/SA table size */ ++// {0x0030, 0, 8, 0x00}, /* XRX200_ETHSW_CAP_6_APPL Application table size */ ++// {0x0034, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_7 Ethernet Switch CapabilityRegister 7 */ ++// {0x0034, 8, 8, 0x00}, /* XRX200_ETHSW_CAP_7_IPDASAM IP DA/SA MSB table size */ ++// {0x0034, 0, 8, 0x00}, /* XRX200_ETHSW_CAP_7_IPDASAL IP DA/SA LSB table size */ ++// {0x0038, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_8 Ethernet Switch CapabilityRegister 8 */ ++// {0x0038, 0, 8, 0x00}, /* XRX200_ETHSW_CAP_8_MCAST Multicast table size */ ++// {0x003C, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_9 Ethernet Switch CapabilityRegister 9 */ ++// {0x003C, 0, 8, 0x00}, /* XRX200_ETHSW_CAP_9_FLAGG Flow Aggregation table size */ ++// {0x0040, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_10 Ethernet Switch CapabilityRegister 10 */ ++// {0x0040, 0, 13, 0x00}, /* XRX200_ETHSW_CAP_10_MACBT MAC bridging table size */ ++// {0x0044, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_11 Ethernet Switch CapabilityRegister 11 */ ++// {0x0044, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_11_BSIZEL Packet buffer size (lower part, in byte) */ ++// {0x0048, 0, 16, 0x00}, /* XRX200_ETHSW_CAP_12 Ethernet Switch CapabilityRegister 12 */ ++// {0x0048, 0, 3, 0x00}, /* XRX200_ETHSW_CAP_12_BSIZEH Packet buffer size (higher part, in byte) */ ++// {0x004C, 0, 16, 0x00}, /* XRX200_ETHSW_VERSION_REV Ethernet Switch VersionRegister */ ++// {0x004C, 8, 8, 0x00}, /* XRX200_ETHSW_VERSION_MOD_ID Module Identification */ ++// {0x004C, 0, 8, 0x00}, /* XRX200_ETHSW_VERSION_REV_ID Hardware Revision Identification */ ++// {0x0050, 0, 16, 0x00}, /* XRX200_ETHSW_IER Interrupt Enable Register */ ++// {0x0050, 4, 1, 0x00}, /* XRX200_ETHSW_IER_FDMAIE Fetch DMA Interrupt Enable */ ++// {0x0050, 3, 1, 0x00}, /* XRX200_ETHSW_IER_SDMAIE Store DMA Interrupt Enable */ ++// {0x0050, 2, 1, 0x00}, /* XRX200_ETHSW_IER_MACIE Ethernet MAC Interrupt Enable */ ++// {0x0050, 1, 1, 0x00}, /* XRX200_ETHSW_IER_PCEIE Parser and Classification Engine Interrupt Enable */ ++// {0x0050, 0, 1, 0x00}, /* XRX200_ETHSW_IER_BMIE Buffer Manager Interrupt Enable */ ++// {0x0054, 0, 16, 0x00}, /* XRX200_ETHSW_ISR Interrupt Status Register */ ++// {0x0054, 4, 1, 0x00}, /* XRX200_ETHSW_ISR_FDMAINT Fetch DMA Interrupt */ ++// {0x0054, 3, 1, 0x00}, /* XRX200_ETHSW_ISR_SDMAINT Store DMA Interrupt */ ++// {0x0054, 2, 1, 0x00}, /* XRX200_ETHSW_ISR_MACINT Ethernet MAC Interrupt */ ++// {0x0054, 1, 1, 0x00}, /* XRX200_ETHSW_ISR_PCEINT Parser and Classification Engine Interrupt */ ++// {0x0054, 0, 1, 0x00}, /* XRX200_ETHSW_ISR_BMINT Buffer Manager Interrupt */ ++// {0x0058, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_0 Ethernet Switch SpareCells 0 */ ++// {0x0058, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_0_SPARE SPARE0 */ ++// {0x005C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_1 Ethernet Switch SpareCells 1 */ ++// {0x005C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_1_SPARE SPARE1 */ ++// {0x0060, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_2 Ethernet Switch SpareCells 2 */ ++// {0x0060, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_2_SPARE SPARE2 */ ++// {0x0064, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_3 Ethernet Switch SpareCells 3 */ ++// {0x0064, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_3_SPARE SPARE3 */ ++// {0x0068, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_4 Ethernet Switch SpareCells 4 */ ++// {0x0068, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_4_SPARE SPARE4 */ ++// {0x006C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_5 Ethernet Switch SpareCells 5 */ ++// {0x006C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_5_SPARE SPARE5 */ ++// {0x0070, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_6 Ethernet Switch SpareCells 6 */ ++// {0x0070, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_6_SPARE SPARE6 */ ++// {0x0074, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_7 Ethernet Switch SpareCells 7 */ ++// {0x0074, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_7_SPARE SPARE7 */ ++// {0x0078, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_8 Ethernet Switch SpareCells 8 */ ++// {0x0078, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_8_SPARE SPARE8 */ ++// {0x007C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_9 Ethernet Switch SpareCells 9 */ ++// {0x007C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_9_SPARE SPARE9 */ ++// {0x0080, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_10 Ethernet Switch SpareCells 10 */ ++// {0x0080, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_10_SPARE SPARE10 */ ++// {0x0084, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_11 Ethernet Switch SpareCells 11 */ ++// {0x0084, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_11_SPARE SPARE11 */ ++// {0x0088, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_12 Ethernet Switch SpareCells 12 */ ++// {0x0088, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_12_SPARE SPARE12 */ ++// {0x008C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_13 Ethernet Switch SpareCells 13 */ ++// {0x008C, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_13_SPARE SPARE13 */ ++// {0x0090, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_14 Ethernet Switch SpareCells 14 */ ++// {0x0090, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_14_SPARE SPARE14 */ ++// {0x0094, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_15 Ethernet Switch SpareCells 15 */ ++// {0x0094, 0, 16, 0x00}, /* XRX200_ETHSW_SPARE_15_SPARE SPARE15 */ ++// {0x0100, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_3 RAM Value Register 3 */ ++// {0x0100, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_3_VAL3 Data value [15:0] */ ++// {0x0104, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_2 RAM Value Register 2 */ ++// {0x0104, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_2_VAL2 Data value [15:0] */ ++// {0x0108, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_1 RAM Value Register 1 */ ++// {0x0108, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_1_VAL1 Data value [15:0] */ ++// {0x010C, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_0 RAM Value Register 0 */ ++// {0x010C, 0, 16, 0x00}, /* XRX200_BM_RAM_VAL_0_VAL0 Data value [15:0] */ ++// {0x0110, 0, 16, 0x00}, /* XRX200_BM_RAM_ADDR RAM Address Register */ ++// {0x0110, 0, 11, 0x00}, /* XRX200_BM_RAM_ADDR_ADDR RAM Address */ ++// {0x0114, 0, 16, 0x00}, /* XRX200_BM_RAM_CTRL RAM Access Control Register */ ++// {0x0114, 15, 1, 0x00}, /* XRX200_BM_RAM_CTRL_BAS Access Busy/Access Start */ ++// {0x0114, 5, 1, 0x00}, /* XRX200_BM_RAM_CTRL_OPMOD Lookup Table Access Operation Mode */ ++// {0x0114, 0, 5, 0x00}, /* XRX200_BM_RAM_CTRL_ADDR Address for RAM selection */ ++// {0x0118, 0, 16, 0x00}, /* XRX200_BM_FSQM_GCTRL Free Segment Queue ManagerGlobal Control Register */ ++// {0x0118, 0, 10, 0x00}, /* XRX200_BM_FSQM_GCTRL_SEGNUM Maximum Segment Number */ ++// {0x011C, 0, 16, 0x00}, /* XRX200_BM_CONS_SEG Number of Consumed SegmentsRegister */ ++// {0x011C, 0, 10, 0x00}, /* XRX200_BM_CONS_SEG_FSEG Number of Consumed Segments */ ++// {0x0120, 0, 16, 0x00}, /* XRX200_BM_CONS_PKT Number of Consumed PacketPointers Register */ ++// {0x0120, 0, 11, 0x00}, /* XRX200_BM_CONS_PKT_FQP Number of Consumed Packet Pointers */ ++// {0x0124, 0, 16, 0x00}, /* XRX200_BM_GCTRL_F Buffer Manager Global ControlRegister 0 */ ++// {0x0124, 13, 1, 0x00}, /* XRX200_BM_GCTRL_BM_STA Buffer Manager Initialization Status Bit */ ++// {0x0124, 12, 1, 0x00}, /* XRX200_BM_GCTRL_SAT RMON Counter Update Mode */ ++// {0x0124, 11, 1, 0x00}, /* XRX200_BM_GCTRL_FR_RBC Freeze RMON RX Bad Byte 64 Bit Counter */ ++// {0x0124, 10, 1, 0x00}, /* XRX200_BM_GCTRL_FR_RGC Freeze RMON RX Good Byte 64 Bit Counter */ ++// {0x0124, 9, 1, 0x00}, /* XRX200_BM_GCTRL_FR_TGC Freeze RMON TX Good Byte 64 Bit Counter */ ++// {0x0124, 8, 1, 0x00}, /* XRX200_BM_GCTRL_I_FIN RAM initialization finished */ ++// {0x0124, 7, 1, 0x00}, /* XRX200_BM_GCTRL_CX_INI PQM Context RAM initialization */ ++// {0x0124, 6, 1, 0x00}, /* XRX200_BM_GCTRL_FP_INI FPQM RAM initialization */ ++// {0x0124, 5, 1, 0x00}, /* XRX200_BM_GCTRL_FS_INI FSQM RAM initialization */ ++// {0x0124, 4, 1, 0x00}, /* XRX200_BM_GCTRL_R_SRES Software Reset for RMON */ ++// {0x0124, 3, 1, 0x00}, /* XRX200_BM_GCTRL_S_SRES Software Reset for Scheduler */ ++// {0x0124, 2, 1, 0x00}, /* XRX200_BM_GCTRL_A_SRES Software Reset for AVG */ ++// {0x0124, 1, 1, 0x00}, /* XRX200_BM_GCTRL_P_SRES Software Reset for PQM */ ++// {0x0124, 0, 1, 0x00}, /* XRX200_BM_GCTRL_F_SRES Software Reset for FSQM */ ++// {0x0128, 0, 16, 0x00}, /* XRX200_BM_QUEUE_GCTRL Queue Manager GlobalControl Register 0 */ ++ {0x0128, 10, 1, 0x00}, /* XRX200_BM_QUEUE_GCTRL_GL_MOD WRED Mode Signal */ ++// {0x0128, 7, 3, 0x00}, /* XRX200_BM_QUEUE_GCTRL_AQUI Average Queue Update Interval */ ++// {0x0128, 3, 4, 0x00}, /* XRX200_BM_QUEUE_GCTRL_AQWF Average Queue Weight Factor */ ++// {0x0128, 2, 1, 0x00}, /* XRX200_BM_QUEUE_GCTRL_QAVGEN Queue Average Calculation Enable */ ++// {0x0128, 0, 2, 0x00}, /* XRX200_BM_QUEUE_GCTRL_DPROB Drop Probability Profile */ ++// {0x012C, 0, 16, 0x00}, /* XRX200_BM_WRED_RTH_0 WRED Red Threshold Register0 */ ++// {0x012C, 0, 10, 0x00}, /* XRX200_BM_WRED_RTH_0_MINTH Minimum Threshold */ ++// {0x0130, 0, 16, 0x00}, /* XRX200_BM_WRED_RTH_1 WRED Red Threshold Register1 */ ++// {0x0130, 0, 10, 0x00}, /* XRX200_BM_WRED_RTH_1_MAXTH Maximum Threshold */ ++// {0x0134, 0, 16, 0x00}, /* XRX200_BM_WRED_YTH_0 WRED Yellow ThresholdRegister 0 */ ++// {0x0134, 0, 10, 0x00}, /* XRX200_BM_WRED_YTH_0_MINTH Minimum Threshold */ ++// {0x0138, 0, 16, 0x00}, /* XRX200_BM_WRED_YTH_1 WRED Yellow ThresholdRegister 1 */ ++// {0x0138, 0, 10, 0x00}, /* XRX200_BM_WRED_YTH_1_MAXTH Maximum Threshold */ ++// {0x013C, 0, 16, 0x00}, /* XRX200_BM_WRED_GTH_0 WRED Green ThresholdRegister 0 */ ++// {0x013C, 0, 10, 0x00}, /* XRX200_BM_WRED_GTH_0_MINTH Minimum Threshold */ ++// {0x0140, 0, 16, 0x00}, /* XRX200_BM_WRED_GTH_1 WRED Green ThresholdRegister 1 */ ++// {0x0140, 0, 10, 0x00}, /* XRX200_BM_WRED_GTH_1_MAXTH Maximum Threshold */ ++// {0x0144, 0, 16, 0x00}, /* XRX200_BM_DROP_GTH_0_THR Drop Threshold ConfigurationRegister 0 */ ++// {0x0144, 0, 11, 0x00}, /* XRX200_BM_DROP_GTH_0_THR_FQ Threshold for frames marked red */ ++// {0x0148, 0, 16, 0x00}, /* XRX200_BM_DROP_GTH_1_THY Drop Threshold ConfigurationRegister 1 */ ++// {0x0148, 0, 11, 0x00}, /* XRX200_BM_DROP_GTH_1_THY_FQ Threshold for frames marked yellow */ ++// {0x014C, 0, 16, 0x00}, /* XRX200_BM_DROP_GTH_2_THG Drop Threshold ConfigurationRegister 2 */ ++// {0x014C, 0, 11, 0x00}, /* XRX200_BM_DROP_GTH_2_THG_FQ Threshold for frames marked green */ ++// {0x0150, 0, 16, 0x00}, /* XRX200_BM_IER Buffer Manager Global InterruptEnable Register */ ++// {0x0150, 7, 1, 0x00}, /* XRX200_BM_IER_CNT4 Counter Group 4 (RMON-CLASSIFICATION) Interrupt Enable */ ++// {0x0150, 6, 1, 0x00}, /* XRX200_BM_IER_CNT3 Counter Group 3 (RMON-PQM) Interrupt Enable */ ++// {0x0150, 5, 1, 0x00}, /* XRX200_BM_IER_CNT2 Counter Group 2 (RMON-SCHEDULER) Interrupt Enable */ ++// {0x0150, 4, 1, 0x00}, /* XRX200_BM_IER_CNT1 Counter Group 1 (RMON-QFETCH) Interrupt Enable */ ++// {0x0150, 3, 1, 0x00}, /* XRX200_BM_IER_CNT0 Counter Group 0 (RMON-QSTOR) Interrupt Enable */ ++// {0x0150, 2, 1, 0x00}, /* XRX200_BM_IER_DEQ PQM dequeue Interrupt Enable */ ++// {0x0150, 1, 1, 0x00}, /* XRX200_BM_IER_ENQ PQM Enqueue Interrupt Enable */ ++// {0x0150, 0, 1, 0x00}, /* XRX200_BM_IER_FSQM Buffer Empty Interrupt Enable */ ++// {0x0154, 0, 16, 0x00}, /* XRX200_BM_ISR Buffer Manager Global InterruptStatus Register */ ++// {0x0154, 7, 1, 0x00}, /* XRX200_BM_ISR_CNT4 Counter Group 4 Interrupt */ ++// {0x0154, 6, 1, 0x00}, /* XRX200_BM_ISR_CNT3 Counter Group 3 Interrupt */ ++// {0x0154, 5, 1, 0x00}, /* XRX200_BM_ISR_CNT2 Counter Group 2 Interrupt */ ++// {0x0154, 4, 1, 0x00}, /* XRX200_BM_ISR_CNT1 Counter Group 1 Interrupt */ ++// {0x0154, 3, 1, 0x00}, /* XRX200_BM_ISR_CNT0 Counter Group 0 Interrupt */ ++// {0x0154, 2, 1, 0x00}, /* XRX200_BM_ISR_DEQ PQM dequeue Interrupt Enable */ ++// {0x0154, 1, 1, 0x00}, /* XRX200_BM_ISR_ENQ PQM Enqueue Interrupt */ ++// {0x0154, 0, 1, 0x00}, /* XRX200_BM_ISR_FSQM Buffer Empty Interrupt */ ++// {0x0158, 0, 16, 0x00}, /* XRX200_BM_CISEL Buffer Manager RMON CounterInterrupt Select Register */ ++// {0x0158, 0, 3, 0x00}, /* XRX200_BM_CISEL_PORT Port Number */ ++// {0x015C, 0, 16, 0x00}, /* XRX200_BM_DEBUG_CTRL_DBG Debug Control Register */ ++// {0x015C, 0, 8, 0x00}, /* XRX200_BM_DEBUG_CTRL_DBG_SEL Select Signal for Debug Multiplexer */ ++// {0x0160, 0, 16, 0x00}, /* XRX200_BM_DEBUG_VAL_DBG Debug Value Register */ ++// {0x0160, 0, 16, 0x00}, /* XRX200_BM_DEBUG_VAL_DBG_DAT Debug Data Value */ ++// {0x0200, 0, 16, 0x08}, /* XRX200_BM_PCFG Buffer Manager PortConfiguration Register */ ++// {0x0200, 0, 1, 0x08}, /* XRX200_BM_PCFG_CNTEN RMON Counter Enable */ ++// {0x0204, 0, 16, 0x08}, /* XRX200_BM_RMON_CTRL_RAM1 Buffer ManagerRMON Control Register */ ++// {0x0204, 1, 1, 0x08}, /* XRX200_BM_RMON_CTRL_RAM2_RES Software Reset for RMON RAM2 */ ++// {0x0204, 0, 1, 0x08}, /* XRX200_BM_RMON_CTRL_RAM1_RES Software Reset for RMON RAM1 */ ++// {0x0400, 0, 16, 0x08}, /* XRX200_PQM_DP Packet Queue ManagerDrop Probability Register */ ++// {0x0400, 0, 2, 0x08}, /* XRX200_PQM_DP_DPROB Drop Probability Profile */ ++// {0x0404, 0, 16, 0x08}, /* XRX200_PQM_RS Packet Queue ManagerRate Shaper Assignment Register */ ++// {0x0404, 15, 1, 0x08}, /* XRX200_PQM_RS_EN2 Rate Shaper 2 Enable */ ++// {0x0404, 8, 6, 0x08}, /* XRX200_PQM_RS_RS2 Rate Shaper 2 */ ++// {0x0404, 7, 1, 0x08}, /* XRX200_PQM_RS_EN1 Rate Shaper 1 Enable */ ++// {0x0404, 0, 6, 0x08}, /* XRX200_PQM_RS_RS1 Rate Shaper 1 */ ++// {0x0500, 0, 16, 0x14}, /* XRX200_RS_CTRL Rate Shaper ControlRegister */ ++// {0x0500, 0, 1, 0x14}, /* XRX200_RS_CTRL_RSEN Rate Shaper Enable */ ++// {0x0504, 0, 16, 0x14}, /* XRX200_RS_CBS Rate Shaper CommittedBurst Size Register */ ++// {0x0504, 0, 10, 0x14}, /* XRX200_RS_CBS_CBS Committed Burst Size */ ++// {0x0508, 0, 16, 0x14}, /* XRX200_RS_IBS Rate Shaper InstantaneousBurst Size Register */ ++// {0x0508, 0, 2, 0x14}, /* XRX200_RS_IBS_IBS Instantaneous Burst Size */ ++// {0x050C, 0, 16, 0x14}, /* XRX200_RS_CIR_EXP Rate Shaper RateExponent Register */ ++// {0x050C, 0, 4, 0x14}, /* XRX200_RS_CIR_EXP_EXP Exponent */ ++// {0x0510, 0, 16, 0x14}, /* XRX200_RS_CIR_MANT Rate Shaper RateMantissa Register */ ++// {0x0510, 0, 10, 0x14}, /* XRX200_RS_CIR_MANT_MANT Mantissa */ ++ {0x1100, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_7 Table Key Data 7 */ ++// {0x1100, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_7_KEY7 Key Value[15:0] */ ++ {0x1104, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_6 Table Key Data 6 */ ++// {0x1104, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_6_KEY6 Key Value[15:0] */ ++ {0x1108, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_5 Table Key Data 5 */ ++// {0x1108, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_5_KEY5 Key Value[15:0] */ ++ {0x110C, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_4 Table Key Data 4 */ ++// {0x110C, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_4_KEY4 Key Value[15:0] */ ++ {0x1110, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_3 Table Key Data 3 */ ++// {0x1110, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_3_KEY3 Key Value[15:0] */ ++ {0x1114, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_2 Table Key Data 2 */ ++// {0x1114, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_2_KEY2 Key Value[15:0] */ ++ {0x1118, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_1 Table Key Data 1 */ ++// {0x1118, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_1_KEY1 Key Value[31:16] */ ++ {0x111C, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_0 Table Key Data 0 */ ++// {0x111C, 0, 16, 0x00}, /* XRX200_PCE_TBL_KEY_0_KEY0 Key Value[15:0] */ ++ {0x1120, 0, 16, 0x00}, /* XRX200_PCE_TBL_MASK_0 Table Mask Write Register0 */ ++// {0x1120, 0, 16, 0x00}, /* XRX200_PCE_TBL_MASK_0_MASK0 Mask Pattern [15:0] */ ++ {0x1124, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_4 Table Value Register4 */ ++// {0x1124, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_4_VAL4 Data value [15:0] */ ++ {0x1128, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_3 Table Value Register3 */ ++// {0x1128, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_3_VAL3 Data value [15:0] */ ++ {0x112C, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_2 Table Value Register2 */ ++// {0x112C, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_2_VAL2 Data value [15:0] */ ++ {0x1130, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_1 Table Value Register1 */ ++// {0x1130, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_1_VAL1 Data value [15:0] */ ++ {0x1134, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_0 Table Value Register0 */ ++// {0x1134, 0, 16, 0x00}, /* XRX200_PCE_TBL_VAL_0_VAL0 Data value [15:0] */ ++// {0x1138, 0, 16, 0x00}, /* XRX200_PCE_TBL_ADDR Table Entry AddressRegister */ ++ {0x1138, 0, 11, 0x00}, /* XRX200_PCE_TBL_ADDR_ADDR Table Address */ ++// {0x113C, 0, 16, 0x00}, /* XRX200_PCE_TBL_CTRL Table Access ControlRegister */ ++ {0x113C, 15, 1, 0x00}, /* XRX200_PCE_TBL_CTRL_BAS Access Busy/Access Start */ ++ {0x113C, 13, 1, 0x00}, /* XRX200_PCE_TBL_CTRL_TYPE Lookup Entry Type */ ++ {0x113C, 12, 1, 0x00}, /* XRX200_PCE_TBL_CTRL_VLD Lookup Entry Valid */ ++ {0x113C, 7, 4, 0x00}, /* XRX200_PCE_TBL_CTRL_GMAP Group Map */ ++ {0x113C, 5, 2, 0x00}, /* XRX200_PCE_TBL_CTRL_OPMOD Lookup Table Access Operation Mode */ ++ {0x113C, 0, 5, 0x00}, /* XRX200_PCE_TBL_CTRL_ADDR Lookup Table Address */ ++// {0x1140, 0, 16, 0x00}, /* XRX200_PCE_TBL_STAT Table General StatusRegister */ ++// {0x1140, 2, 1, 0x00}, /* XRX200_PCE_TBL_STAT_TBUSY Table Access Busy */ ++// {0x1140, 1, 1, 0x00}, /* XRX200_PCE_TBL_STAT_TEMPT Table Empty */ ++// {0x1140, 0, 1, 0x00}, /* XRX200_PCE_TBL_STAT_TFUL Table Full */ ++// {0x1144, 0, 16, 0x00}, /* XRX200_PCE_AGE_0 Aging Counter ConfigurationRegister 0 */ ++// {0x1144, 0, 4, 0x00}, /* XRX200_PCE_AGE_0_EXP Aging Counter Exponent Value */ ++// {0x1148, 0, 16, 0x00}, /* XRX200_PCE_AGE_1 Aging Counter ConfigurationRegister 1 */ ++// {0x1148, 0, 16, 0x00}, /* XRX200_PCE_AGE_1_MANT Aging Counter Mantissa Value */ ++// {0x114C, 0, 16, 0x00}, /* XRX200_PCE_PMAP_1 Port Map Register 1 */ ++// {0x114C, 0, 16, 0x00}, /* XRX200_PCE_PMAP_1_MPMAP Monitoring Port Map */ ++// {0x1150, 0, 16, 0x00}, /* XRX200_PCE_PMAP_2 Port Map Register 2 */ ++// {0x1150, 0, 16, 0x00}, /* XRX200_PCE_PMAP_2_DMCPMAP Default Multicast Port Map */ ++// {0x1154, 0, 16, 0x00}, /* XRX200_PCE_PMAP_3 Port Map Register 3 */ ++// {0x1154, 0, 16, 0x00}, /* XRX200_PCE_PMAP_3_UUCMAP Default Unknown Unicast Port Map */ ++// {0x1158, 0, 16, 0x00}, /* XRX200_PCE_GCTRL_0 PCE Global Control Register0 */ ++// {0x1158, 15, 1, 0x00}, /* XRX200_PCE_GCTRL_0_IGMP IGMP Mode Selection */ ++ {0x1158, 14, 1, 0x00}, /* XRX200_PCE_GCTRL_0_VLAN VLAN-aware Switching */ ++// {0x1158, 13, 1, 0x00}, /* XRX200_PCE_GCTRL_0_NOPM No Port Map Forwarding */ ++// {0x1158, 12, 1, 0x00}, /* XRX200_PCE_GCTRL_0_SCONUC Unknown Unicast Storm Control */ ++// {0x1158, 11, 1, 0x00}, /* XRX200_PCE_GCTRL_0_SCONMC Multicast Storm Control */ ++// {0x1158, 10, 1, 0x00}, /* XRX200_PCE_GCTRL_0_SCONBC Broadcast Storm Control */ ++// {0x1158, 8, 2, 0x00}, /* XRX200_PCE_GCTRL_0_SCONMOD Storm Control Mode */ ++// {0x1158, 4, 4, 0x00}, /* XRX200_PCE_GCTRL_0_SCONMET Storm Control Metering Instance */ ++// {0x1158, 3, 1, 0x00}, /* XRX200_PCE_GCTRL_0_MC_VALID Access Request */ ++// {0x1158, 2, 1, 0x00}, /* XRX200_PCE_GCTRL_0_PLCKMOD Port Lock Mode */ ++// {0x1158, 1, 1, 0x00}, /* XRX200_PCE_GCTRL_0_PLIMMOD MAC Address Learning Limitation Mode */ ++// {0x1158, 0, 1, 0x00}, /* XRX200_PCE_GCTRL_0_MTFL MAC Table Flushing */ ++// {0x115C, 0, 16, 0x00}, /* XRX200_PCE_GCTRL_1 PCE Global Control Register1 */ ++// {0x115C, 1, 1, 0x00}, /* XRX200_PCE_GCTRL_1_PCE_DIS PCE Disable after currently processed packet */ ++// {0x115C, 0, 1, 0x00}, /* XRX200_PCE_GCTRL_1_LRNMOD MAC Address Learning Mode */ ++// {0x1160, 0, 16, 0x00}, /* XRX200_PCE_TCM_GLOB_CTRL Three-color MarkerGlobal Control Register */ ++// {0x1160, 6, 3, 0x00}, /* XRX200_PCE_TCM_GLOB_CTRL_DPRED Re-marking Drop Precedence Red Encoding */ ++// {0x1160, 3, 3, 0x00}, /* XRX200_PCE_TCM_GLOB_CTRL_DPYEL Re-marking Drop Precedence Yellow Encoding */ ++// {0x1160, 0, 3, 0x00}, /* XRX200_PCE_TCM_GLOB_CTRL_DPGRN Re-marking Drop Precedence Green Encoding */ ++// {0x1164, 0, 16, 0x00}, /* XRX200_PCE_IGMP_CTRL IGMP Control Register */ ++// {0x1164, 15, 1, 0x00}, /* XRX200_PCE_IGMP_CTRL_FAGEEN Force Aging of Table Entries Enable */ ++// {0x1164, 14, 1, 0x00}, /* XRX200_PCE_IGMP_CTRL_FLEAVE Fast Leave Enable */ ++// {0x1164, 13, 1, 0x00}, /* XRX200_PCE_IGMP_CTRL_DMRTEN Default Maximum Response Time Enable */ ++// {0x1164, 12, 1, 0x00}, /* XRX200_PCE_IGMP_CTRL_JASUP Join Aggregation Suppression Enable */ ++// {0x1164, 11, 1, 0x00}, /* XRX200_PCE_IGMP_CTRL_REPSUP Report Suppression Enable */ ++// {0x1164, 10, 1, 0x00}, /* XRX200_PCE_IGMP_CTRL_SRPEN Snooping of Router Port Enable */ ++// {0x1164, 8, 2, 0x00}, /* XRX200_PCE_IGMP_CTRL_ROB Robustness Variable */ ++// {0x1164, 0, 8, 0x00}, /* XRX200_PCE_IGMP_CTRL_DMRT IGMP Default Maximum Response Time */ ++// {0x1168, 0, 16, 0x00}, /* XRX200_PCE_IGMP_DRPM IGMP Default RouterPort Map Register */ ++// {0x1168, 0, 16, 0x00}, /* XRX200_PCE_IGMP_DRPM_DRPM IGMP Default Router Port Map */ ++// {0x116C, 0, 16, 0x00}, /* XRX200_PCE_IGMP_AGE_0 IGMP Aging Register0 */ ++// {0x116C, 3, 8, 0x00}, /* XRX200_PCE_IGMP_AGE_0_MANT IGMP Group Aging Time Mantissa */ ++// {0x116C, 0, 3, 0x00}, /* XRX200_PCE_IGMP_AGE_0_EXP IGMP Group Aging Time Exponent */ ++// {0x1170, 0, 16, 0x00}, /* XRX200_PCE_IGMP_AGE_1 IGMP Aging Register1 */ ++// {0x1170, 0, 12, 0x00}, /* XRX200_PCE_IGMP_AGE_1_MANT IGMP Router Port Aging Time Mantissa */ ++// {0x1174, 0, 16, 0x00}, /* XRX200_PCE_IGMP_STAT IGMP Status Register */ ++// {0x1174, 0, 16, 0x00}, /* XRX200_PCE_IGMP_STAT_IGPM IGMP Port Map */ ++// {0x1178, 0, 16, 0x00}, /* XRX200_WOL_GLB_CTRL Wake-on-LAN ControlRegister */ ++// {0x1178, 0, 1, 0x00}, /* XRX200_WOL_GLB_CTRL_PASSEN WoL Password Enable */ ++// {0x117C, 0, 16, 0x00}, /* XRX200_WOL_DA_0 Wake-on-LAN DestinationAddress Register 0 */ ++// {0x117C, 0, 16, 0x00}, /* XRX200_WOL_DA_0_DA0 WoL Destination Address [15:0] */ ++// {0x1180, 0, 16, 0x00}, /* XRX200_WOL_DA_1 Wake-on-LAN DestinationAddress Register 1 */ ++// {0x1180, 0, 16, 0x00}, /* XRX200_WOL_DA_1_DA1 WoL Destination Address [31:16] */ ++// {0x1184, 0, 16, 0x00}, /* XRX200_WOL_DA_2 Wake-on-LAN DestinationAddress Register 2 */ ++// {0x1184, 0, 16, 0x00}, /* XRX200_WOL_DA_2_DA2 WoL Destination Address [47:32] */ ++// {0x1188, 0, 16, 0x00}, /* XRX200_WOL_PW_0 Wake-on-LAN Password Register0 */ ++// {0x1188, 0, 16, 0x00}, /* XRX200_WOL_PW_0_PW0 WoL Password [15:0] */ ++// {0x118C, 0, 16, 0x00}, /* XRX200_WOL_PW_1 Wake-on-LAN Password Register1 */ ++// {0x118C, 0, 16, 0x00}, /* XRX200_WOL_PW_1_PW1 WoL Password [31:16] */ ++// {0x1190, 0, 16, 0x00}, /* XRX200_WOL_PW_2 Wake-on-LAN Password Register2 */ ++// {0x1190, 0, 16, 0x00}, /* XRX200_WOL_PW_2_PW2 WoL Password [47:32] */ ++// {0x1194, 0, 16, 0x00}, /* XRX200_PCE_IER_0_PINT Parser and ClassificationEngine Global Interrupt Enable Register 0 */ ++// {0x1194, 15, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_15 Port Interrupt Enable */ ++// {0x1194, 14, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_14 Port Interrupt Enable */ ++// {0x1194, 13, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_13 Port Interrupt Enable */ ++// {0x1194, 12, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_12 Port Interrupt Enable */ ++// {0x1194, 11, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_11 Port Interrupt Enable */ ++// {0x1194, 10, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_10 Port Interrupt Enable */ ++// {0x1194, 9, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_9 Port Interrupt Enable */ ++// {0x1194, 8, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_8 Port Interrupt Enable */ ++// {0x1194, 7, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_7 Port Interrupt Enable */ ++// {0x1194, 6, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_6 Port Interrupt Enable */ ++// {0x1194, 5, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_5 Port Interrupt Enable */ ++// {0x1194, 4, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_4 Port Interrupt Enable */ ++// {0x1194, 3, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_3 Port Interrupt Enable */ ++// {0x1194, 2, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_2 Port Interrupt Enable */ ++// {0x1194, 1, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_1 Port Interrupt Enable */ ++// {0x1194, 0, 1, 0x00}, /* XRX200_PCE_IER_0_PINT_0 Port Interrupt Enable */ ++// {0x1198, 0, 16, 0x00}, /* XRX200_PCE_IER_1 Parser and ClassificationEngine Global Interrupt Enable Register 1 */ ++// {0x1198, 6, 1, 0x00}, /* XRX200_PCE_IER_1_FLOWINT Traffic Flow Table Interrupt Rule matched Interrupt Enable */ ++// {0x1198, 5, 1, 0x00}, /* XRX200_PCE_IER_1_CPH2 Classification Phase 2 Ready Interrupt Enable */ ++// {0x1198, 4, 1, 0x00}, /* XRX200_PCE_IER_1_CPH1 Classification Phase 1 Ready Interrupt Enable */ ++// {0x1198, 3, 1, 0x00}, /* XRX200_PCE_IER_1_CPH0 Classification Phase 0 Ready Interrupt Enable */ ++// {0x1198, 2, 1, 0x00}, /* XRX200_PCE_IER_1_PRDY Parser Ready Interrupt Enable */ ++// {0x1198, 1, 1, 0x00}, /* XRX200_PCE_IER_1_IGTF IGMP Table Full Interrupt Enable */ ++// {0x1198, 0, 1, 0x00}, /* XRX200_PCE_IER_1_MTF MAC Table Full Interrupt Enable */ ++// {0x119C, 0, 16, 0x00}, /* XRX200_PCE_ISR_0_PINT Parser and ClassificationEngine Global Interrupt Status Register 0 */ ++// {0x119C, 15, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_15 Port Interrupt */ ++// {0x119C, 14, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_14 Port Interrupt */ ++// {0x119C, 13, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_13 Port Interrupt */ ++// {0x119C, 12, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_12 Port Interrupt */ ++// {0x119C, 11, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_11 Port Interrupt */ ++// {0x119C, 10, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_10 Port Interrupt */ ++// {0x119C, 9, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_9 Port Interrupt */ ++// {0x119C, 8, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_8 Port Interrupt */ ++// {0x119C, 7, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_7 Port Interrupt */ ++// {0x119C, 6, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_6 Port Interrupt */ ++// {0x119C, 5, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_5 Port Interrupt */ ++// {0x119C, 4, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_4 Port Interrupt */ ++// {0x119C, 3, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_3 Port Interrupt */ ++// {0x119C, 2, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_2 Port Interrupt */ ++// {0x119C, 1, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_1 Port Interrupt */ ++// {0x119C, 0, 1, 0x00}, /* XRX200_PCE_ISR_0_PINT_0 Port Interrupt */ ++// {0x11A0, 0, 16, 0x00}, /* XRX200_PCE_ISR_1 Parser and ClassificationEngine Global Interrupt Status Register 1 */ ++// {0x11A0, 6, 1, 0x00}, /* XRX200_PCE_ISR_1_FLOWINT Traffic Flow Table Interrupt Rule matched */ ++// {0x11A0, 5, 1, 0x00}, /* XRX200_PCE_ISR_1_CPH2 Classification Phase 2 Ready Interrupt */ ++// {0x11A0, 4, 1, 0x00}, /* XRX200_PCE_ISR_1_CPH1 Classification Phase 1 Ready Interrupt */ ++// {0x11A0, 3, 1, 0x00}, /* XRX200_PCE_ISR_1_CPH0 Classification Phase 0 Ready Interrupt */ ++// {0x11A0, 2, 1, 0x00}, /* XRX200_PCE_ISR_1_PRDY Parser Ready Interrupt */ ++// {0x11A0, 1, 1, 0x00}, /* XRX200_PCE_ISR_1_IGTF IGMP Table Full Interrupt */ ++// {0x11A0, 0, 1, 0x00}, /* XRX200_PCE_ISR_1_MTF MAC Table Full Interrupt */ ++// {0x11A4, 0, 16, 0x00}, /* XRX200_PARSER_STAT_FIFO Parser Status Register */ ++// {0x11A4, 8, 8, 0x00}, /* XRX200_PARSER_STAT_FSM_DAT_CNT Parser FSM Data Counter */ ++// {0x11A4, 5, 3, 0x00}, /* XRX200_PARSER_STAT_FSM_STATE Parser FSM State */ ++// {0x11A4, 4, 1, 0x00}, /* XRX200_PARSER_STAT_PKT_ERR Packet error detected */ ++// {0x11A4, 3, 1, 0x00}, /* XRX200_PARSER_STAT_FSM_FIN Parser FSM finished */ ++// {0x11A4, 2, 1, 0x00}, /* XRX200_PARSER_STAT_FSM_START Parser FSM start */ ++// {0x11A4, 1, 1, 0x00}, /* XRX200_PARSER_STAT_FIFO_RDY Parser FIFO ready for read. */ ++// {0x11A4, 0, 1, 0x00}, /* XRX200_PARSER_STAT_FIFO_FULL Parser */ ++// {0x1200, 0, 16, 0x28}, /* XRX200_PCE_PCTRL_0 PCE Port ControlRegister 0 */ ++// {0x1200, 13, 1, 0x28}, /* XRX200_PCE_PCTRL_0_MCST Multicast Forwarding Mode Selection */ ++// {0x1200, 12, 1, 0x28}, /* XRX200_PCE_PCTRL_0_EGSTEN Table-based Egress Special Tag Enable */ ++// {0x1200, 11, 1, 0x28}, /* XRX200_PCE_PCTRL_0_IGSTEN Ingress Special Tag Enable */ ++// {0x1200, 10, 1, 0x28}, /* XRX200_PCE_PCTRL_0_PCPEN PCP Remarking Mode */ ++// {0x1200, 9, 1, 0x28}, /* XRX200_PCE_PCTRL_0_CLPEN Class Remarking Mode */ ++// {0x1200, 8, 1, 0x28}, /* XRX200_PCE_PCTRL_0_DPEN Drop Precedence Remarking Mode */ ++// {0x1200, 7, 1, 0x28}, /* XRX200_PCE_PCTRL_0_CMOD Three-color Marker Color Mode */ ++// {0x1200, 6, 1, 0x28}, /* XRX200_PCE_PCTRL_0_VREP VLAN Replacement Mode */ ++ {0x1200, 5, 1, 0x28}, /* XRX200_PCE_PCTRL_0_TVM Transparent VLAN Mode */ ++// {0x1200, 4, 1, 0x28}, /* XRX200_PCE_PCTRL_0_PLOCK Port Locking Enable */ ++// {0x1200, 3, 1, 0x28}, /* XRX200_PCE_PCTRL_0_AGEDIS Aging Disable */ ++// {0x1200, 0, 3, 0x28}, /* XRX200_PCE_PCTRL_0_PSTATE Port State */ ++// {0x1204, 0, 16, 0x28}, /* XRX200_PCE_PCTRL_1 PCE Port ControlRegister 1 */ ++// {0x1204, 0, 8, 0x28}, /* XRX200_PCE_PCTRL_1_LRNLIM MAC Address Learning Limit */ ++// {0x1208, 0, 16, 0x28}, /* XRX200_PCE_PCTRL_2 PCE Port ControlRegister 2 */ ++// {0x1208, 7, 1, 0x28}, /* XRX200_PCE_PCTRL_2_DSCPMOD DSCP Mode Selection */ ++// {0x1208, 5, 2, 0x28}, /* XRX200_PCE_PCTRL_2_DSCP Enable DSCP to select the Class of Service */ ++// {0x1208, 4, 1, 0x28}, /* XRX200_PCE_PCTRL_2_PCP Enable VLAN PCP to select the Class of Service */ ++// {0x1208, 0, 4, 0x28}, /* XRX200_PCE_PCTRL_2_PCLASS Port-based Traffic Class */ ++// {0x120C, 0, 16, 0x28}, /* XRX200_PCE_PCTRL_3_VIO PCE Port ControlRegister 3 */ ++// {0x120C, 11, 1, 0x28}, /* XRX200_PCE_PCTRL_3_EDIR Egress Redirection Mode */ ++// {0x120C, 10, 1, 0x28}, /* XRX200_PCE_PCTRL_3_RXDMIR Receive Mirroring Enable for dropped frames */ ++// {0x120C, 9, 1, 0x28}, /* XRX200_PCE_PCTRL_3_RXVMIR Receive Mirroring Enable for valid frames */ ++// {0x120C, 8, 1, 0x28}, /* XRX200_PCE_PCTRL_3_TXMIR Transmit Mirroring Enable */ ++// {0x120C, 7, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_7 Violation Type 7 Mirroring Enable */ ++// {0x120C, 6, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_6 Violation Type 6 Mirroring Enable */ ++// {0x120C, 5, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_5 Violation Type 5 Mirroring Enable */ ++// {0x120C, 4, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_4 Violation Type 4 Mirroring Enable */ ++// {0x120C, 3, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_3 Violation Type 3 Mirroring Enable */ ++// {0x120C, 2, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_2 Violation Type 2 Mirroring Enable */ ++// {0x120C, 1, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_1 Violation Type 1 Mirroring Enable */ ++// {0x120C, 0, 1, 0x28}, /* XRX200_PCE_PCTRL_3_VIO_0 Violation Type 0 Mirroring Enable */ ++// {0x1210, 0, 16, 0x28}, /* XRX200_WOL_CTRL Wake-on-LAN ControlRegister */ ++// {0x1210, 0, 1, 0x28}, /* XRX200_WOL_CTRL_PORT WoL Enable */ ++// {0x1214, 0, 16, 0x28}, /* XRX200_PCE_VCTRL PCE VLAN ControlRegister */ ++ {0x1214, 5, 1, 0x28}, /* XRX200_PCE_VCTRL_VSR VLAN Security Rule */ ++ {0x1214, 4, 1, 0x28}, /* XRX200_PCE_VCTRL_VEMR VLAN Egress Member Violation Rule */ ++ {0x1214, 3, 1, 0x28}, /* XRX200_PCE_VCTRL_VIMR VLAN Ingress Member Violation Rule */ ++ {0x1214, 1, 2, 0x28}, /* XRX200_PCE_VCTRL_VINR VLAN Ingress Tag Rule */ ++ {0x1214, 0, 1, 0x28}, /* XRX200_PCE_VCTRL_UVR Unknown VLAN Rule */ ++// {0x1218, 0, 16, 0x28}, /* XRX200_PCE_DEFPVID PCE Default PortVID Register */ ++ {0x1218, 0, 6, 0x28}, /* XRX200_PCE_DEFPVID_PVID Default Port VID Index */ ++// {0x121C, 0, 16, 0x28}, /* XRX200_PCE_PSTAT PCE Port StatusRegister */ ++// {0x121C, 0, 16, 0x28}, /* XRX200_PCE_PSTAT_LRNCNT Learning Count */ ++// {0x1220, 0, 16, 0x28}, /* XRX200_PCE_PIER Parser and ClassificationEngine Port Interrupt Enable Register */ ++// {0x1220, 5, 1, 0x28}, /* XRX200_PCE_PIER_CLDRP Classification Drop Interrupt Enable */ ++// {0x1220, 4, 1, 0x28}, /* XRX200_PCE_PIER_PTDRP Port Drop Interrupt Enable */ ++// {0x1220, 3, 1, 0x28}, /* XRX200_PCE_PIER_VLAN VLAN Violation Interrupt Enable */ ++// {0x1220, 2, 1, 0x28}, /* XRX200_PCE_PIER_WOL Wake-on-LAN Interrupt Enable */ ++// {0x1220, 1, 1, 0x28}, /* XRX200_PCE_PIER_LOCK Port Limit Alert Interrupt Enable */ ++// {0x1220, 0, 1, 0x28}, /* XRX200_PCE_PIER_LIM Port Lock Alert Interrupt Enable */ ++// {0x1224, 0, 16, 0x28}, /* XRX200_PCE_PISR Parser and ClassificationEngine Port Interrupt Status Register */ ++// {0x1224, 5, 1, 0x28}, /* XRX200_PCE_PISR_CLDRP Classification Drop Interrupt */ ++// {0x1224, 4, 1, 0x28}, /* XRX200_PCE_PISR_PTDRP Port Drop Interrupt */ ++// {0x1224, 3, 1, 0x28}, /* XRX200_PCE_PISR_VLAN VLAN Violation Interrupt */ ++// {0x1224, 2, 1, 0x28}, /* XRX200_PCE_PISR_WOL Wake-on-LAN Interrupt */ ++// {0x1224, 1, 1, 0x28}, /* XRX200_PCE_PISR_LOCK Port Lock Alert Interrupt */ ++// {0x1224, 0, 1, 0x28}, /* XRX200_PCE_PISR_LIMIT Port Limitation Alert Interrupt */ ++// {0x1600, 0, 16, 0x1c}, /* XRX200_PCE_TCM_CTRL Three-colorMarker Control Register */ ++// {0x1600, 0, 1, 0x1c}, /* XRX200_PCE_TCM_CTRL_TCMEN Three-color Marker metering instance enable */ ++// {0x1604, 0, 16, 0x1c}, /* XRX200_PCE_TCM_STAT Three-colorMarker Status Register */ ++// {0x1604, 1, 1, 0x1c}, /* XRX200_PCE_TCM_STAT_AL1 Three-color Marker Alert 1 Status */ ++// {0x1604, 0, 1, 0x1c}, /* XRX200_PCE_TCM_STAT_AL0 Three-color Marker Alert 0 Status */ ++// {0x1608, 0, 16, 0x1c}, /* XRX200_PCE_TCM_CBS Three-color MarkerCommitted Burst Size Register */ ++// {0x1608, 0, 10, 0x1c}, /* XRX200_PCE_TCM_CBS_CBS Committed Burst Size */ ++// {0x160C, 0, 16, 0x1c}, /* XRX200_PCE_TCM_EBS Three-color MarkerExcess Burst Size Register */ ++// {0x160C, 0, 10, 0x1c}, /* XRX200_PCE_TCM_EBS_EBS Excess Burst Size */ ++// {0x1610, 0, 16, 0x1c}, /* XRX200_PCE_TCM_IBS Three-color MarkerInstantaneous Burst Size Register */ ++// {0x1610, 0, 2, 0x1c}, /* XRX200_PCE_TCM_IBS_IBS Instantaneous Burst Size */ ++// {0x1614, 0, 16, 0x1c}, /* XRX200_PCE_TCM_CIR_MANT Three-colorMarker Constant Information Rate Mantissa Register */ ++// {0x1614, 0, 10, 0x1c}, /* XRX200_PCE_TCM_CIR_MANT_MANT Rate Counter Mantissa */ ++// {0x1618, 0, 16, 0x1c}, /* XRX200_PCE_TCM_CIR_EXP Three-colorMarker Constant Information Rate Exponent Register */ ++// {0x1618, 0, 4, 0x1c}, /* XRX200_PCE_TCM_CIR_EXP_EXP Rate Counter Exponent */ ++// {0x2300, 0, 16, 0x00}, /* XRX200_MAC_TEST MAC Test Register */ ++// {0x2300, 0, 16, 0x00}, /* XRX200_MAC_TEST_JTP Jitter Test Pattern */ ++// {0x2304, 0, 16, 0x00}, /* XRX200_MAC_PFAD_CFG MAC Pause FrameSource Address Configuration Register */ ++// {0x2304, 0, 1, 0x00}, /* XRX200_MAC_PFAD_CFG_SAMOD Source Address Mode */ ++// {0x2308, 0, 16, 0x00}, /* XRX200_MAC_PFSA_0 Pause Frame SourceAddress Part 0 */ ++// {0x2308, 0, 16, 0x00}, /* XRX200_MAC_PFSA_0_PFAD Pause Frame Source Address Part 0 */ ++// {0x230C, 0, 16, 0x00}, /* XRX200_MAC_PFSA_1 Pause Frame SourceAddress Part 1 */ ++// {0x230C, 0, 16, 0x00}, /* XRX200_MAC_PFSA_1_PFAD Pause Frame Source Address Part 1 */ ++// {0x2310, 0, 16, 0x00}, /* XRX200_MAC_PFSA_2 Pause Frame SourceAddress Part 2 */ ++// {0x2310, 0, 16, 0x00}, /* XRX200_MAC_PFSA_2_PFAD Pause Frame Source Address Part 2 */ ++// {0x2314, 0, 16, 0x00}, /* XRX200_MAC_FLEN MAC Frame Length Register */ ++// {0x2314, 0, 14, 0x00}, /* XRX200_MAC_FLEN_LEN Maximum Frame Length */ ++// {0x2318, 0, 16, 0x00}, /* XRX200_MAC_VLAN_ETYPE_0 MAC VLAN EthertypeRegister 0 */ ++// {0x2318, 0, 16, 0x00}, /* XRX200_MAC_VLAN_ETYPE_0_OUTER Ethertype */ ++// {0x231C, 0, 16, 0x00}, /* XRX200_MAC_VLAN_ETYPE_1 MAC VLAN EthertypeRegister 1 */ ++// {0x231C, 0, 16, 0x00}, /* XRX200_MAC_VLAN_ETYPE_1_INNER Ethertype */ ++// {0x2320, 0, 16, 0x00}, /* XRX200_MAC_IER MAC Interrupt EnableRegister */ ++// {0x2320, 0, 8, 0x00}, /* XRX200_MAC_IER_MACIEN MAC Interrupt Enable */ ++// {0x2324, 0, 16, 0x00}, /* XRX200_MAC_ISR MAC Interrupt StatusRegister */ ++// {0x2324, 0, 8, 0x00}, /* XRX200_MAC_ISR_MACINT MAC Interrupt */ ++// {0x2400, 0, 16, 0x30}, /* XRX200_MAC_PSTAT MAC Port Status Register */ ++// {0x2400, 11, 1, 0x30}, /* XRX200_MAC_PSTAT_PACT PHY Active Status */ ++ {0x2400, 10, 1, 0x30}, /* XRX200_MAC_PSTAT_GBIT Gigabit Speed Status */ ++ {0x2400, 9, 1, 0x30}, /* XRX200_MAC_PSTAT_MBIT Megabit Speed Status */ ++ {0x2400, 8, 1, 0x30}, /* XRX200_MAC_PSTAT_FDUP Full Duplex Status */ ++// {0x2400, 7, 1, 0x30}, /* XRX200_MAC_PSTAT_RXPAU Receive Pause Status */ ++// {0x2400, 6, 1, 0x30}, /* XRX200_MAC_PSTAT_TXPAU Transmit Pause Status */ ++// {0x2400, 5, 1, 0x30}, /* XRX200_MAC_PSTAT_RXPAUEN Receive Pause Enable Status */ ++// {0x2400, 4, 1, 0x30}, /* XRX200_MAC_PSTAT_TXPAUEN Transmit Pause Enable Status */ ++ {0x2400, 3, 1, 0x30}, /* XRX200_MAC_PSTAT_LSTAT Link Status */ ++// {0x2400, 2, 1, 0x30}, /* XRX200_MAC_PSTAT_CRS Carrier Sense Status */ ++// {0x2400, 1, 1, 0x30}, /* XRX200_MAC_PSTAT_TXLPI Transmit Low-power Idle Status */ ++// {0x2400, 0, 1, 0x30}, /* XRX200_MAC_PSTAT_RXLPI Receive Low-power Idle Status */ ++// {0x2404, 0, 16, 0x30}, /* XRX200_MAC_PISR MAC Interrupt Status Register */ ++// {0x2404, 13, 1, 0x30}, /* XRX200_MAC_PISR_PACT PHY Active Status */ ++// {0x2404, 12, 1, 0x30}, /* XRX200_MAC_PISR_SPEED Megabit Speed Status */ ++// {0x2404, 11, 1, 0x30}, /* XRX200_MAC_PISR_FDUP Full Duplex Status */ ++// {0x2404, 10, 1, 0x30}, /* XRX200_MAC_PISR_RXPAUEN Receive Pause Enable Status */ ++// {0x2404, 9, 1, 0x30}, /* XRX200_MAC_PISR_TXPAUEN Transmit Pause Enable Status */ ++// {0x2404, 8, 1, 0x30}, /* XRX200_MAC_PISR_LPIOFF Receive Low-power Idle Mode is left */ ++// {0x2404, 7, 1, 0x30}, /* XRX200_MAC_PISR_LPION Receive Low-power Idle Mode is entered */ ++// {0x2404, 6, 1, 0x30}, /* XRX200_MAC_PISR_JAM Jam Status Detected */ ++// {0x2404, 5, 1, 0x30}, /* XRX200_MAC_PISR_TOOSHORT Too Short Frame Error Detected */ ++// {0x2404, 4, 1, 0x30}, /* XRX200_MAC_PISR_TOOLONG Too Long Frame Error Detected */ ++// {0x2404, 3, 1, 0x30}, /* XRX200_MAC_PISR_LENERR Length Mismatch Error Detected */ ++// {0x2404, 2, 1, 0x30}, /* XRX200_MAC_PISR_FCSERR Frame Checksum Error Detected */ ++// {0x2404, 1, 1, 0x30}, /* XRX200_MAC_PISR_TXPAUSE Pause Frame Transmitted */ ++// {0x2404, 0, 1, 0x30}, /* XRX200_MAC_PISR_RXPAUSE Pause Frame Received */ ++// {0x2408, 0, 16, 0x30}, /* XRX200_MAC_PIER MAC Interrupt Enable Register */ ++// {0x2408, 13, 1, 0x30}, /* XRX200_MAC_PIER_PACT PHY Active Status */ ++// {0x2408, 12, 1, 0x30}, /* XRX200_MAC_PIER_SPEED Megabit Speed Status */ ++// {0x2408, 11, 1, 0x30}, /* XRX200_MAC_PIER_FDUP Full Duplex Status */ ++// {0x2408, 10, 1, 0x30}, /* XRX200_MAC_PIER_RXPAUEN Receive Pause Enable Status */ ++// {0x2408, 9, 1, 0x30}, /* XRX200_MAC_PIER_TXPAUEN Transmit Pause Enable Status */ ++// {0x2408, 8, 1, 0x30}, /* XRX200_MAC_PIER_LPIOFF Low-power Idle Off Interrupt Mask */ ++// {0x2408, 7, 1, 0x30}, /* XRX200_MAC_PIER_LPION Low-power Idle On Interrupt Mask */ ++// {0x2408, 6, 1, 0x30}, /* XRX200_MAC_PIER_JAM Jam Status Interrupt Mask */ ++// {0x2408, 5, 1, 0x30}, /* XRX200_MAC_PIER_TOOSHORT Too Short Frame Error Interrupt Mask */ ++// {0x2408, 4, 1, 0x30}, /* XRX200_MAC_PIER_TOOLONG Too Long Frame Error Interrupt Mask */ ++// {0x2408, 3, 1, 0x30}, /* XRX200_MAC_PIER_LENERR Length Mismatch Error Interrupt Mask */ ++// {0x2408, 2, 1, 0x30}, /* XRX200_MAC_PIER_FCSERR Frame Checksum Error Interrupt Mask */ ++// {0x2408, 1, 1, 0x30}, /* XRX200_MAC_PIER_TXPAUSE Transmit Pause Frame Interrupt Mask */ ++// {0x2408, 0, 1, 0x30}, /* XRX200_MAC_PIER_RXPAUSE Receive Pause Frame Interrupt Mask */ ++// {0x240C, 0, 16, 0x30}, /* XRX200_MAC_CTRL_0 MAC Control Register0 */ ++// {0x240C, 13, 2, 0x30}, /* XRX200_MAC_CTRL_0_LCOL Late Collision Control */ ++// {0x240C, 12, 1, 0x30}, /* XRX200_MAC_CTRL_0_BM Burst Mode Control */ ++// {0x240C, 11, 1, 0x30}, /* XRX200_MAC_CTRL_0_APADEN Automatic VLAN Padding Enable */ ++// {0x240C, 10, 1, 0x30}, /* XRX200_MAC_CTRL_0_VPAD2EN Stacked VLAN Padding Enable */ ++// {0x240C, 9, 1, 0x30}, /* XRX200_MAC_CTRL_0_VPADEN VLAN Padding Enable */ ++// {0x240C, 8, 1, 0x30}, /* XRX200_MAC_CTRL_0_PADEN Padding Enable */ ++// {0x240C, 7, 1, 0x30}, /* XRX200_MAC_CTRL_0_FCS Transmit FCS Control */ ++ {0x240C, 4, 3, 0x30}, /* XRX200_MAC_CTRL_0_FCON Flow Control Mode */ ++// {0x240C, 2, 2, 0x30}, /* XRX200_MAC_CTRL_0_FDUP Full Duplex Control */ ++// {0x240C, 0, 2, 0x30}, /* XRX200_MAC_CTRL_0_GMII GMII/MII interface mode selection */ ++// {0x2410, 0, 16, 0x30}, /* XRX200_MAC_CTRL_1 MAC Control Register1 */ ++// {0x2410, 8, 1, 0x30}, /* XRX200_MAC_CTRL_1_SHORTPRE Short Preamble Control */ ++// {0x2410, 0, 4, 0x30}, /* XRX200_MAC_CTRL_1_IPG Minimum Inter Packet Gap Size */ ++// {0x2414, 0, 16, 0x30}, /* XRX200_MAC_CTRL_2 MAC Control Register2 */ ++// {0x2414, 3, 1, 0x30}, /* XRX200_MAC_CTRL_2_MLEN Maximum Untagged Frame Length */ ++// {0x2414, 2, 1, 0x30}, /* XRX200_MAC_CTRL_2_LCHKL Frame Length Check Long Enable */ ++// {0x2414, 0, 2, 0x30}, /* XRX200_MAC_CTRL_2_LCHKS Frame Length Check Short Enable */ ++// {0x2418, 0, 16, 0x30}, /* XRX200_MAC_CTRL_3 MAC Control Register3 */ ++// {0x2418, 0, 4, 0x30}, /* XRX200_MAC_CTRL_3_RCNT Retry Count */ ++// {0x241C, 0, 16, 0x30}, /* XRX200_MAC_CTRL_4 MAC Control Register4 */ ++// {0x241C, 7, 1, 0x30}, /* XRX200_MAC_CTRL_4_LPIEN LPI Mode Enable */ ++// {0x241C, 0, 7, 0x30}, /* XRX200_MAC_CTRL_4_WAIT LPI Wait Time */ ++// {0x2420, 0, 16, 0x30}, /* XRX200_MAC_CTRL_5_PJPS MAC Control Register5 */ ++// {0x2420, 1, 1, 0x30}, /* XRX200_MAC_CTRL_5_PJPS_NOBP Prolonged Jam pattern size during no-backpressure state */ ++// {0x2420, 0, 1, 0x30}, /* XRX200_MAC_CTRL_5_PJPS_BP Prolonged Jam pattern size during backpressure state */ ++// {0x2424, 0, 16, 0x30}, /* XRX200_MAC_CTRL_6_XBUF Transmit and ReceiveBuffer Control Register */ ++// {0x2424, 9, 3, 0x30}, /* XRX200_MAC_CTRL_6_RBUF_DLY_WP Delay */ ++// {0x2424, 8, 1, 0x30}, /* XRX200_MAC_CTRL_6_RBUF_INIT Receive Buffer Initialization */ ++// {0x2424, 6, 1, 0x30}, /* XRX200_MAC_CTRL_6_RBUF_BYPASS Bypass the Receive Buffer */ ++// {0x2424, 3, 3, 0x30}, /* XRX200_MAC_CTRL_6_XBUF_DLY_WP Delay */ ++// {0x2424, 2, 1, 0x30}, /* XRX200_MAC_CTRL_6_XBUF_INIT Initialize the Transmit Buffer */ ++// {0x2424, 0, 1, 0x30}, /* XRX200_MAC_CTRL_6_XBUF_BYPASS Bypass the Transmit Buffer */ ++// {0x2428, 0, 16, 0x30}, /* XRX200_MAC_BUFST_XBUF MAC Receive and TransmitBuffer Status Register */ ++// {0x2428, 3, 1, 0x30}, /* XRX200_MAC_BUFST_RBUF_UFL Receive Buffer Underflow Indicator */ ++// {0x2428, 2, 1, 0x30}, /* XRX200_MAC_BUFST_RBUF_OFL Receive Buffer Overflow Indicator */ ++// {0x2428, 1, 1, 0x30}, /* XRX200_MAC_BUFST_XBUF_UFL Transmit Buffer Underflow Indicator */ ++// {0x2428, 0, 1, 0x30}, /* XRX200_MAC_BUFST_XBUF_OFL Transmit Buffer Overflow Indicator */ ++// {0x242C, 0, 16, 0x30}, /* XRX200_MAC_TESTEN MAC Test Enable Register */ ++// {0x242C, 2, 1, 0x30}, /* XRX200_MAC_TESTEN_JTEN Jitter Test Enable */ ++// {0x242C, 1, 1, 0x30}, /* XRX200_MAC_TESTEN_TXER Transmit Error Insertion */ ++// {0x242C, 0, 1, 0x30}, /* XRX200_MAC_TESTEN_LOOP MAC Loopback Enable */ ++// {0x2900, 0, 16, 0x00}, /* XRX200_FDMA_CTRL Ethernet Switch FetchDMA Control Register */ ++// {0x2900, 7, 5, 0x00}, /* XRX200_FDMA_CTRL_LPI_THRESHOLD Low Power Idle Threshold */ ++// {0x2900, 4, 3, 0x00}, /* XRX200_FDMA_CTRL_LPI_MODE Low Power Idle Mode */ ++// {0x2900, 2, 2, 0x00}, /* XRX200_FDMA_CTRL_EGSTAG Egress Special Tag Size */ ++// {0x2900, 1, 1, 0x00}, /* XRX200_FDMA_CTRL_IGSTAG Ingress Special Tag Size */ ++// {0x2900, 0, 1, 0x00}, /* XRX200_FDMA_CTRL_EXCOL Excessive Collision Handling */ ++// {0x2904, 0, 16, 0x00}, /* XRX200_FDMA_STETYPE Special Tag EthertypeControl Register */ ++// {0x2904, 0, 16, 0x00}, /* XRX200_FDMA_STETYPE_ETYPE Special Tag Ethertype */ ++// {0x2908, 0, 16, 0x00}, /* XRX200_FDMA_VTETYPE VLAN Tag EthertypeControl Register */ ++// {0x2908, 0, 16, 0x00}, /* XRX200_FDMA_VTETYPE_ETYPE VLAN Tag Ethertype */ ++// {0x290C, 0, 16, 0x00}, /* XRX200_FDMA_STAT_0 FDMA Status Register0 */ ++// {0x290C, 0, 16, 0x00}, /* XRX200_FDMA_STAT_0_FSMS FSM states status */ ++// {0x2910, 0, 16, 0x00}, /* XRX200_FDMA_IER Fetch DMA Global InterruptEnable Register */ ++// {0x2910, 14, 1, 0x00}, /* XRX200_FDMA_IER_PCKD Packet Drop Interrupt Enable */ ++// {0x2910, 13, 1, 0x00}, /* XRX200_FDMA_IER_PCKR Packet Ready Interrupt Enable */ ++// {0x2910, 0, 8, 0x00}, /* XRX200_FDMA_IER_PCKT Packet Sent Interrupt Enable */ ++// {0x2914, 0, 16, 0x00}, /* XRX200_FDMA_ISR Fetch DMA Global InterruptStatus Register */ ++// {0x2914, 14, 1, 0x00}, /* XRX200_FDMA_ISR_PCKTD Packet Drop */ ++// {0x2914, 13, 1, 0x00}, /* XRX200_FDMA_ISR_PCKR Packet is Ready for Transmission */ ++// {0x2914, 0, 8, 0x00}, /* XRX200_FDMA_ISR_PCKT Packet Sent Event */ ++// {0x2A00, 0, 16, 0x18}, /* XRX200_FDMA_PCTRL Ethernet SwitchFetch DMA Port Control Register */ ++// {0x2A00, 3, 2, 0x18}, /* XRX200_FDMA_PCTRL_VLANMOD VLAN Modification Enable */ ++// {0x2A00, 2, 1, 0x18}, /* XRX200_FDMA_PCTRL_DSCPRM DSCP Re-marking Enable */ ++// {0x2A00, 1, 1, 0x18}, /* XRX200_FDMA_PCTRL_STEN Special Tag Insertion Enable */ ++// {0x2A00, 0, 1, 0x18}, /* XRX200_FDMA_PCTRL_EN FDMA Port Enable */ ++// {0x2A04, 0, 16, 0x18}, /* XRX200_FDMA_PRIO Ethernet SwitchFetch DMA Port Priority Register */ ++// {0x2A04, 0, 2, 0x18}, /* XRX200_FDMA_PRIO_PRIO FDMA PRIO */ ++// {0x2A08, 0, 16, 0x18}, /* XRX200_FDMA_PSTAT0 Ethernet SwitchFetch DMA Port Status Register 0 */ ++// {0x2A08, 15, 1, 0x18}, /* XRX200_FDMA_PSTAT0_PKT_AVAIL Port Egress Packet Available */ ++// {0x2A08, 14, 1, 0x18}, /* XRX200_FDMA_PSTAT0_POK Port Status OK */ ++// {0x2A08, 0, 6, 0x18}, /* XRX200_FDMA_PSTAT0_PSEG Port Egress Segment Count */ ++// {0x2A0C, 0, 16, 0x18}, /* XRX200_FDMA_PSTAT1_HDR Ethernet SwitchFetch DMA Port Status Register 1 */ ++// {0x2A0C, 0, 10, 0x18}, /* XRX200_FDMA_PSTAT1_HDR_PTR Header Pointer */ ++// {0x2A10, 0, 16, 0x18}, /* XRX200_FDMA_TSTAMP0 Egress TimeStamp Register 0 */ ++// {0x2A10, 0, 16, 0x18}, /* XRX200_FDMA_TSTAMP0_TSTL Time Stamp [15:0] */ ++// {0x2A14, 0, 16, 0x18}, /* XRX200_FDMA_TSTAMP1 Egress TimeStamp Register 1 */ ++// {0x2A14, 0, 16, 0x18}, /* XRX200_FDMA_TSTAMP1_TSTH Time Stamp [31:16] */ ++// {0x2D00, 0, 16, 0x00}, /* XRX200_SDMA_CTRL Ethernet Switch StoreDMA Control Register */ ++// {0x2D00, 0, 1, 0x00}, /* XRX200_SDMA_CTRL_TSTEN Time Stamp Enable */ ++// {0x2D04, 0, 16, 0x00}, /* XRX200_SDMA_FCTHR1 SDMA Flow Control Threshold1 Register */ ++// {0x2D04, 0, 10, 0x00}, /* XRX200_SDMA_FCTHR1_THR1 Threshold 1 */ ++// {0x2D08, 0, 16, 0x00}, /* XRX200_SDMA_FCTHR2 SDMA Flow Control Threshold2 Register */ ++// {0x2D08, 0, 10, 0x00}, /* XRX200_SDMA_FCTHR2_THR2 Threshold 2 */ ++// {0x2D0C, 0, 16, 0x00}, /* XRX200_SDMA_FCTHR3 SDMA Flow Control Threshold3 Register */ ++// {0x2D0C, 0, 10, 0x00}, /* XRX200_SDMA_FCTHR3_THR3 Threshold 3 */ ++// {0x2D10, 0, 16, 0x00}, /* XRX200_SDMA_FCTHR4 SDMA Flow Control Threshold4 Register */ ++// {0x2D10, 0, 10, 0x00}, /* XRX200_SDMA_FCTHR4_THR4 Threshold 4 */ ++// {0x2D14, 0, 16, 0x00}, /* XRX200_SDMA_FCTHR5 SDMA Flow Control Threshold5 Register */ ++// {0x2D14, 0, 10, 0x00}, /* XRX200_SDMA_FCTHR5_THR5 Threshold 5 */ ++// {0x2D18, 0, 16, 0x00}, /* XRX200_SDMA_FCTHR6 SDMA Flow Control Threshold6 Register */ ++// {0x2D18, 0, 10, 0x00}, /* XRX200_SDMA_FCTHR6_THR6 Threshold 6 */ ++// {0x2D1C, 0, 16, 0x00}, /* XRX200_SDMA_FCTHR7 SDMA Flow Control Threshold7 Register */ ++// {0x2D1C, 0, 11, 0x00}, /* XRX200_SDMA_FCTHR7_THR7 Threshold 7 */ ++// {0x2D20, 0, 16, 0x00}, /* XRX200_SDMA_STAT_0 SDMA Status Register0 */ ++// {0x2D20, 4, 3, 0x00}, /* XRX200_SDMA_STAT_0_BPS_FILL Back Pressure Status */ ++// {0x2D20, 2, 2, 0x00}, /* XRX200_SDMA_STAT_0_BPS_PNT Back Pressure Status */ ++// {0x2D20, 0, 2, 0x00}, /* XRX200_SDMA_STAT_0_DROP Back Pressure Status */ ++// {0x2D24, 0, 16, 0x00}, /* XRX200_SDMA_STAT_1 SDMA Status Register1 */ ++// {0x2D24, 0, 10, 0x00}, /* XRX200_SDMA_STAT_1_FILL Buffer Filling Level */ ++// {0x2D28, 0, 16, 0x00}, /* XRX200_SDMA_STAT_2 SDMA Status Register2 */ ++// {0x2D28, 0, 16, 0x00}, /* XRX200_SDMA_STAT_2_FSMS FSM states status */ ++// {0x2D2C, 0, 16, 0x00}, /* XRX200_SDMA_IER SDMA Interrupt Enable Register */ ++// {0x2D2C, 15, 1, 0x00}, /* XRX200_SDMA_IER_BPEX Buffer Pointers Exceeded */ ++// {0x2D2C, 14, 1, 0x00}, /* XRX200_SDMA_IER_BFULL Buffer Full */ ++// {0x2D2C, 13, 1, 0x00}, /* XRX200_SDMA_IER_FERR Frame Error */ ++// {0x2D2C, 0, 8, 0x00}, /* XRX200_SDMA_IER_FRX Frame Received Successfully */ ++// {0x2D30, 0, 16, 0x00}, /* XRX200_SDMA_ISR SDMA Interrupt Status Register */ ++// {0x2D30, 15, 1, 0x00}, /* XRX200_SDMA_ISR_BPEX Packet Descriptors Exceeded */ ++// {0x2D30, 14, 1, 0x00}, /* XRX200_SDMA_ISR_BFULL Buffer Full */ ++// {0x2D30, 13, 1, 0x00}, /* XRX200_SDMA_ISR_FERR Frame Error */ ++// {0x2D30, 0, 8, 0x00}, /* XRX200_SDMA_ISR_FRX Frame Received Successfully */ ++// {0x2F00, 0, 16, 0x18}, /* XRX200_SDMA_PCTRL Ethernet SwitchStore DMA Port Control Register */ ++// {0x2F00, 13, 2, 0x18}, /* XRX200_SDMA_PCTRL_DTHR Drop Threshold Selection */ ++// {0x2F00, 11, 2, 0x18}, /* XRX200_SDMA_PCTRL_PTHR Pause Threshold Selection */ ++// {0x2F00, 10, 1, 0x18}, /* XRX200_SDMA_PCTRL_PHYEFWD Forward PHY Error Frames */ ++// {0x2F00, 9, 1, 0x18}, /* XRX200_SDMA_PCTRL_ALGFWD Forward Alignment Error Frames */ ++// {0x2F00, 8, 1, 0x18}, /* XRX200_SDMA_PCTRL_LENFWD Forward Length Errored Frames */ ++// {0x2F00, 7, 1, 0x18}, /* XRX200_SDMA_PCTRL_OSFWD Forward Oversized Frames */ ++// {0x2F00, 6, 1, 0x18}, /* XRX200_SDMA_PCTRL_USFWD Forward Undersized Frames */ ++// {0x2F00, 5, 1, 0x18}, /* XRX200_SDMA_PCTRL_FCSIGN Ignore FCS Errors */ ++// {0x2F00, 4, 1, 0x18}, /* XRX200_SDMA_PCTRL_FCSFWD Forward FCS Errored Frames */ ++// {0x2F00, 3, 1, 0x18}, /* XRX200_SDMA_PCTRL_PAUFWD Pause Frame Forwarding */ ++// {0x2F00, 2, 1, 0x18}, /* XRX200_SDMA_PCTRL_MFCEN Metering Flow Control Enable */ ++// {0x2F00, 1, 1, 0x18}, /* XRX200_SDMA_PCTRL_FCEN Flow Control Enable */ ++// {0x2F00, 0, 1, 0x18}, /* XRX200_SDMA_PCTRL_PEN Port Enable */ ++// {0x2F04, 0, 16, 0x18}, /* XRX200_SDMA_PRIO Ethernet SwitchStore DMA Port Priority Register */ ++// {0x2F04, 0, 2, 0x18}, /* XRX200_SDMA_PRIO_PRIO SDMA PRIO */ ++// {0x2F08, 0, 16, 0x18}, /* XRX200_SDMA_PSTAT0_HDR Ethernet SwitchStore DMA Port Status Register 0 */ ++// {0x2F08, 0, 10, 0x18}, /* XRX200_SDMA_PSTAT0_HDR_PTR Port Ingress Queue Header Pointer */ ++// {0x2F0C, 0, 16, 0x18}, /* XRX200_SDMA_PSTAT1 Ethernet SwitchStore DMA Port Status Register 1 */ ++// {0x2F0C, 0, 10, 0x18}, /* XRX200_SDMA_PSTAT1_PPKT Port Ingress Packet Count */ ++// {0x2F10, 0, 16, 0x18}, /* XRX200_SDMA_TSTAMP0 Ingress TimeStamp Register 0 */ ++// {0x2F10, 0, 16, 0x18}, /* XRX200_SDMA_TSTAMP0_TSTL Time Stamp [15:0] */ ++// {0x2F14, 0, 16, 0x18}, /* XRX200_SDMA_TSTAMP1 Ingress TimeStamp Register 1 */ ++// {0x2F14, 0, 16, 0x18}, /* XRX200_SDMA_TSTAMP1_TSTH Time Stamp [31:16] */ ++}; ++ ++ diff --git a/target/linux/lantiq/patches-4.14/0027-01-net-phy-intel-xway-add-VR9-version-number.patch b/target/linux/lantiq/patches-4.14/0027-01-net-phy-intel-xway-add-VR9-version-number.patch new file mode 100644 index 000000000..b02b3fbd2 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0027-01-net-phy-intel-xway-add-VR9-version-number.patch @@ -0,0 +1,62 @@ +From 5b73d9955fb4b0e3c37f8f6c71910293246c89dc Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Thu, 22 Mar 2018 23:31:38 +0100 +Subject: [PATCH 1/2] net: phy: intel-xway: add VR9 version number + +The VR9 phy ids are matching only for the SoC version 1.2. Rename the +macros and change the names to take this into account. + +Signed-off-by: Mathias Kresin +Signed-off-by: David S. Miller +--- + drivers/net/phy/intel-xway.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/net/phy/intel-xway.c ++++ b/drivers/net/phy/intel-xway.c +@@ -149,8 +149,8 @@ + #define PHY_ID_PHY22F_1_4 0xD565A410 + #define PHY_ID_PHY11G_1_5 0xD565A401 + #define PHY_ID_PHY22F_1_5 0xD565A411 +-#define PHY_ID_PHY11G_VR9 0xD565A409 +-#define PHY_ID_PHY22F_VR9 0xD565A419 ++#define PHY_ID_PHY11G_VR9_1_2 0xD565A409 ++#define PHY_ID_PHY22F_VR9_1_2 0xD565A419 + + #if IS_ENABLED(CONFIG_OF_MDIO) + static int vr9_gphy_of_reg_init(struct phy_device *phydev) +@@ -366,9 +366,9 @@ static struct phy_driver xway_gphy[] = { + .suspend = genphy_suspend, + .resume = genphy_resume, + }, { +- .phy_id = PHY_ID_PHY11G_VR9, ++ .phy_id = PHY_ID_PHY11G_VR9_1_2, + .phy_id_mask = 0xffffffff, +- .name = "Intel XWAY PHY11G (xRX integrated)", ++ .name = "Intel XWAY PHY11G (xRX v1.2 integrated)", + .features = PHY_GBIT_FEATURES, + .flags = PHY_HAS_INTERRUPT, + .config_init = xway_gphy_config_init, +@@ -380,9 +380,9 @@ static struct phy_driver xway_gphy[] = { + .suspend = genphy_suspend, + .resume = genphy_resume, + }, { +- .phy_id = PHY_ID_PHY22F_VR9, ++ .phy_id = PHY_ID_PHY22F_VR9_1_2, + .phy_id_mask = 0xffffffff, +- .name = "Intel XWAY PHY22F (xRX integrated)", ++ .name = "Intel XWAY PHY22F (xRX v1.2 integrated)", + .features = PHY_BASIC_FEATURES, + .flags = PHY_HAS_INTERRUPT, + .config_init = xway_gphy_config_init, +@@ -404,8 +404,8 @@ static struct mdio_device_id __maybe_unu + { PHY_ID_PHY22F_1_4, 0xffffffff }, + { PHY_ID_PHY11G_1_5, 0xffffffff }, + { PHY_ID_PHY22F_1_5, 0xffffffff }, +- { PHY_ID_PHY11G_VR9, 0xffffffff }, +- { PHY_ID_PHY22F_VR9, 0xffffffff }, ++ { PHY_ID_PHY11G_VR9_1_2, 0xffffffff }, ++ { PHY_ID_PHY22F_VR9_1_2, 0xffffffff }, + { } + }; + MODULE_DEVICE_TABLE(mdio, xway_gphy_tbl); diff --git a/target/linux/lantiq/patches-4.14/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch b/target/linux/lantiq/patches-4.14/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch new file mode 100644 index 000000000..c9229b3ae --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch @@ -0,0 +1,69 @@ +From f452518c982e57538e6d49da0a2c80eef22087ab Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Thu, 22 Mar 2018 23:31:39 +0100 +Subject: [PATCH 2/2] net: phy: intel-xway: add VR9 v1.1 phy ids + +The phys embedded into the v1.1 of the VR9 SoC are using different phy +ids. Add the phy ids to use the driver for this VR9 version as well. + +Signed-off-by: Mathias Kresin +Signed-off-by: David S. Miller +--- + drivers/net/phy/intel-xway.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/drivers/net/phy/intel-xway.c ++++ b/drivers/net/phy/intel-xway.c +@@ -149,6 +149,8 @@ + #define PHY_ID_PHY22F_1_4 0xD565A410 + #define PHY_ID_PHY11G_1_5 0xD565A401 + #define PHY_ID_PHY22F_1_5 0xD565A411 ++#define PHY_ID_PHY11G_VR9_1_1 0xD565A408 ++#define PHY_ID_PHY22F_VR9_1_1 0xD565A418 + #define PHY_ID_PHY11G_VR9_1_2 0xD565A409 + #define PHY_ID_PHY22F_VR9_1_2 0xD565A419 + +@@ -366,6 +368,34 @@ static struct phy_driver xway_gphy[] = { + .suspend = genphy_suspend, + .resume = genphy_resume, + }, { ++ .phy_id = PHY_ID_PHY11G_VR9_1_1, ++ .phy_id_mask = 0xffffffff, ++ .name = "Intel XWAY PHY11G (xRX v1.1 integrated)", ++ .features = PHY_GBIT_FEATURES, ++ .flags = PHY_HAS_INTERRUPT, ++ .config_init = xway_gphy_config_init, ++ .config_aneg = genphy_config_aneg, ++ .read_status = genphy_read_status, ++ .ack_interrupt = xway_gphy_ack_interrupt, ++ .did_interrupt = xway_gphy_did_interrupt, ++ .config_intr = xway_gphy_config_intr, ++ .suspend = genphy_suspend, ++ .resume = genphy_resume, ++ }, { ++ .phy_id = PHY_ID_PHY22F_VR9_1_1, ++ .phy_id_mask = 0xffffffff, ++ .name = "Intel XWAY PHY22F (xRX v1.1 integrated)", ++ .features = PHY_BASIC_FEATURES, ++ .flags = PHY_HAS_INTERRUPT, ++ .config_init = xway_gphy_config_init, ++ .config_aneg = genphy_config_aneg, ++ .read_status = genphy_read_status, ++ .ack_interrupt = xway_gphy_ack_interrupt, ++ .did_interrupt = xway_gphy_did_interrupt, ++ .config_intr = xway_gphy_config_intr, ++ .suspend = genphy_suspend, ++ .resume = genphy_resume, ++ }, { + .phy_id = PHY_ID_PHY11G_VR9_1_2, + .phy_id_mask = 0xffffffff, + .name = "Intel XWAY PHY11G (xRX v1.2 integrated)", +@@ -404,6 +434,8 @@ static struct mdio_device_id __maybe_unu + { PHY_ID_PHY22F_1_4, 0xffffffff }, + { PHY_ID_PHY11G_1_5, 0xffffffff }, + { PHY_ID_PHY22F_1_5, 0xffffffff }, ++ { PHY_ID_PHY11G_VR9_1_1, 0xffffffff }, ++ { PHY_ID_PHY22F_VR9_1_1, 0xffffffff }, + { PHY_ID_PHY11G_VR9_1_2, 0xffffffff }, + { PHY_ID_PHY22F_VR9_1_2, 0xffffffff }, + { } diff --git a/target/linux/lantiq/patches-4.14/0028-NET-lantiq-various-etop-fixes.patch b/target/linux/lantiq/patches-4.14/0028-NET-lantiq-various-etop-fixes.patch new file mode 100644 index 000000000..83aef78ca --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0028-NET-lantiq-various-etop-fixes.patch @@ -0,0 +1,868 @@ +From 870ed9cae083ff8a60a739ef7e74c5a1800533be Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 9 Sep 2014 22:45:34 +0200 +Subject: [PATCH 28/36] NET: lantiq: various etop fixes + +Signed-off-by: John Crispin +--- + drivers/net/ethernet/lantiq_etop.c | 555 +++++++++++++++++++++++++----------- + 1 file changed, 389 insertions(+), 166 deletions(-) + +--- a/drivers/net/ethernet/lantiq_etop.c ++++ b/drivers/net/ethernet/lantiq_etop.c +@@ -11,7 +11,7 @@ + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + * +- * Copyright (C) 2011 John Crispin ++ * Copyright (C) 2011-12 John Crispin + */ + + #include +@@ -30,11 +30,16 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include ++#include ++#include ++#include + + #include + +@@ -42,7 +47,7 @@ + #include + #include + +-#define LTQ_ETOP_MDIO 0x11804 ++#define LTQ_ETOP_MDIO_ACC 0x11804 + #define MDIO_REQUEST 0x80000000 + #define MDIO_READ 0x40000000 + #define MDIO_ADDR_MASK 0x1f +@@ -51,44 +56,91 @@ + #define MDIO_REG_OFFSET 0x10 + #define MDIO_VAL_MASK 0xffff + +-#define PPE32_CGEN 0x800 +-#define LQ_PPE32_ENET_MAC_CFG 0x1840 ++#define LTQ_ETOP_MDIO_CFG 0x11800 ++#define MDIO_CFG_MASK 0x6 ++ ++#define LTQ_ETOP_CFG 0x11808 ++#define LTQ_ETOP_IGPLEN 0x11820 ++#define LTQ_ETOP_MAC_CFG 0x11840 + + #define LTQ_ETOP_ENETS0 0x11850 + #define LTQ_ETOP_MAC_DA0 0x1186C + #define LTQ_ETOP_MAC_DA1 0x11870 +-#define LTQ_ETOP_CFG 0x16020 +-#define LTQ_ETOP_IGPLEN 0x16080 ++ ++#define MAC_CFG_MASK 0xfff ++#define MAC_CFG_CGEN (1 << 11) ++#define MAC_CFG_DUPLEX (1 << 2) ++#define MAC_CFG_SPEED (1 << 1) ++#define MAC_CFG_LINK (1 << 0) + + #define MAX_DMA_CHAN 0x8 + #define MAX_DMA_CRC_LEN 0x4 + #define MAX_DMA_DATA_LEN 0x600 + + #define ETOP_FTCU BIT(28) +-#define ETOP_MII_MASK 0xf +-#define ETOP_MII_NORMAL 0xd +-#define ETOP_MII_REVERSE 0xe + #define ETOP_PLEN_UNDER 0x40 +-#define ETOP_CGEN 0x800 ++#define ETOP_CFG_MII0 0x01 + +-/* use 2 static channels for TX/RX */ +-#define LTQ_ETOP_TX_CHANNEL 1 +-#define LTQ_ETOP_RX_CHANNEL 6 +-#define IS_TX(x) (x == LTQ_ETOP_TX_CHANNEL) +-#define IS_RX(x) (x == LTQ_ETOP_RX_CHANNEL) ++#define ETOP_CFG_MASK 0xfff ++#define ETOP_CFG_FEN0 (1 << 8) ++#define ETOP_CFG_SEN0 (1 << 6) ++#define ETOP_CFG_OFF1 (1 << 3) ++#define ETOP_CFG_REMII0 (1 << 1) ++#define ETOP_CFG_OFF0 (1 << 0) ++ ++#define LTQ_GBIT_MDIO_CTL 0xCC ++#define LTQ_GBIT_MDIO_DATA 0xd0 ++#define LTQ_GBIT_GCTL0 0x68 ++#define LTQ_GBIT_PMAC_HD_CTL 0x8c ++#define LTQ_GBIT_P0_CTL 0x4 ++#define LTQ_GBIT_PMAC_RX_IPG 0xa8 ++#define LTQ_GBIT_RGMII_CTL 0x78 ++ ++#define PMAC_HD_CTL_AS (1 << 19) ++#define PMAC_HD_CTL_RXSH (1 << 22) ++ ++/* Switch Enable (0=disable, 1=enable) */ ++#define GCTL0_SE 0x80000000 ++/* Disable MDIO auto polling (0=disable, 1=enable) */ ++#define PX_CTL_DMDIO 0x00400000 ++ ++/* MDC clock divider, clock = 25MHz/((MDC_CLOCK + 1) * 2) */ ++#define MDC_CLOCK_MASK 0xff000000 ++#define MDC_CLOCK_OFFSET 24 ++ ++/* register information for the gbit's MDIO bus */ ++#define MDIO_XR9_REQUEST 0x00008000 ++#define MDIO_XR9_READ 0x00000800 ++#define MDIO_XR9_WRITE 0x00000400 ++#define MDIO_XR9_REG_MASK 0x1f ++#define MDIO_XR9_ADDR_MASK 0x1f ++#define MDIO_XR9_RD_MASK 0xffff ++#define MDIO_XR9_REG_OFFSET 0 ++#define MDIO_XR9_ADDR_OFFSET 5 ++#define MDIO_XR9_WR_OFFSET 16 + ++#define LTQ_DMA_ETOP ((of_machine_is_compatible("lantiq,ase")) ? \ ++ (INT_NUM_IM3_IRL0) : (INT_NUM_IM2_IRL0)) ++ ++/* the newer xway socks have a embedded 3/7 port gbit multiplexer */ + #define ltq_etop_r32(x) ltq_r32(ltq_etop_membase + (x)) + #define ltq_etop_w32(x, y) ltq_w32(x, ltq_etop_membase + (y)) + #define ltq_etop_w32_mask(x, y, z) \ + ltq_w32_mask(x, y, ltq_etop_membase + (z)) + +-#define DRV_VERSION "1.0" ++#define ltq_gbit_r32(x) ltq_r32(ltq_gbit_membase + (x)) ++#define ltq_gbit_w32(x, y) ltq_w32(x, ltq_gbit_membase + (y)) ++#define ltq_gbit_w32_mask(x, y, z) \ ++ ltq_w32_mask(x, y, ltq_gbit_membase + (z)) ++ ++#define DRV_VERSION "1.2" + + static void __iomem *ltq_etop_membase; ++static void __iomem *ltq_gbit_membase; + + struct ltq_etop_chan { +- int idx; + int tx_free; ++ int irq; + struct net_device *netdev; + struct napi_struct napi; + struct ltq_dma_channel dma; +@@ -98,21 +150,34 @@ struct ltq_etop_chan { + struct ltq_etop_priv { + struct net_device *netdev; + struct platform_device *pdev; +- struct ltq_eth_data *pldata; + struct resource *res; + + struct mii_bus *mii_bus; + +- struct ltq_etop_chan ch[MAX_DMA_CHAN]; +- int tx_free[MAX_DMA_CHAN >> 1]; ++ struct ltq_etop_chan txch; ++ struct ltq_etop_chan rxch; ++ ++ int tx_irq; ++ int rx_irq; ++ ++ unsigned char mac[6]; ++ int mii_mode; + + spinlock_t lock; ++ ++ struct clk *clk_ppe; ++ struct clk *clk_switch; ++ struct clk *clk_ephy; ++ struct clk *clk_ephycgu; + }; + ++static int ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, ++ int phy_reg, u16 phy_data); ++ + static int + ltq_etop_alloc_skb(struct ltq_etop_chan *ch) + { +- ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN); ++ ch->skb[ch->dma.desc] = dev_alloc_skb(MAX_DMA_DATA_LEN); + if (!ch->skb[ch->dma.desc]) + return -ENOMEM; + ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(NULL, +@@ -147,8 +212,11 @@ ltq_etop_hw_receive(struct ltq_etop_chan + spin_unlock_irqrestore(&priv->lock, flags); + + skb_put(skb, len); ++ skb->dev = ch->netdev; + skb->protocol = eth_type_trans(skb, ch->netdev); + netif_receive_skb(skb); ++ ch->netdev->stats.rx_packets++; ++ ch->netdev->stats.rx_bytes += len; + } + + static int +@@ -156,7 +224,9 @@ ltq_etop_poll_rx(struct napi_struct *nap + { + struct ltq_etop_chan *ch = container_of(napi, + struct ltq_etop_chan, napi); ++ struct ltq_etop_priv *priv = netdev_priv(ch->netdev); + int work_done = 0; ++ unsigned long flags; + + while (work_done < budget) { + struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; +@@ -168,7 +238,9 @@ ltq_etop_poll_rx(struct napi_struct *nap + } + if (work_done < budget) { + napi_complete_done(&ch->napi, work_done); ++ spin_lock_irqsave(&priv->lock, flags); + ltq_dma_ack_irq(&ch->dma); ++ spin_unlock_irqrestore(&priv->lock, flags); + } + return work_done; + } +@@ -180,12 +252,14 @@ ltq_etop_poll_tx(struct napi_struct *nap + container_of(napi, struct ltq_etop_chan, napi); + struct ltq_etop_priv *priv = netdev_priv(ch->netdev); + struct netdev_queue *txq = +- netdev_get_tx_queue(ch->netdev, ch->idx >> 1); ++ netdev_get_tx_queue(ch->netdev, ch->dma.nr >> 1); + unsigned long flags; + + spin_lock_irqsave(&priv->lock, flags); + while ((ch->dma.desc_base[ch->tx_free].ctl & + (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { ++ ch->netdev->stats.tx_packets++; ++ ch->netdev->stats.tx_bytes += ch->skb[ch->tx_free]->len; + dev_kfree_skb_any(ch->skb[ch->tx_free]); + ch->skb[ch->tx_free] = NULL; + memset(&ch->dma.desc_base[ch->tx_free], 0, +@@ -198,7 +272,9 @@ ltq_etop_poll_tx(struct napi_struct *nap + if (netif_tx_queue_stopped(txq)) + netif_tx_start_queue(txq); + napi_complete(&ch->napi); ++ spin_lock_irqsave(&priv->lock, flags); + ltq_dma_ack_irq(&ch->dma); ++ spin_unlock_irqrestore(&priv->lock, flags); + return 1; + } + +@@ -206,9 +282,10 @@ static irqreturn_t + ltq_etop_dma_irq(int irq, void *_priv) + { + struct ltq_etop_priv *priv = _priv; +- int ch = irq - LTQ_DMA_CH0_INT; +- +- napi_schedule(&priv->ch[ch].napi); ++ if (irq == priv->txch.dma.irq) ++ napi_schedule(&priv->txch.napi); ++ else ++ napi_schedule(&priv->rxch.napi); + return IRQ_HANDLED; + } + +@@ -220,7 +297,7 @@ ltq_etop_free_channel(struct net_device + ltq_dma_free(&ch->dma); + if (ch->dma.irq) + free_irq(ch->dma.irq, priv); +- if (IS_RX(ch->idx)) { ++ if (ch == &priv->txch) { + int desc; + for (desc = 0; desc < LTQ_DESC_NUM; desc++) + dev_kfree_skb_any(ch->skb[ch->dma.desc]); +@@ -231,65 +308,133 @@ static void + ltq_etop_hw_exit(struct net_device *dev) + { + struct ltq_etop_priv *priv = netdev_priv(dev); +- int i; + +- ltq_pmu_disable(PMU_PPE); +- for (i = 0; i < MAX_DMA_CHAN; i++) +- if (IS_TX(i) || IS_RX(i)) +- ltq_etop_free_channel(dev, &priv->ch[i]); ++ clk_disable(priv->clk_ppe); ++ ++ if (of_machine_is_compatible("lantiq,ar9")) ++ clk_disable(priv->clk_switch); ++ ++ if (of_machine_is_compatible("lantiq,ase")) { ++ clk_disable(priv->clk_ephy); ++ clk_disable(priv->clk_ephycgu); ++ } ++ ++ ltq_etop_free_channel(dev, &priv->txch); ++ ltq_etop_free_channel(dev, &priv->rxch); ++} ++ ++static void ++ltq_etop_gbit_init(struct net_device *dev) ++{ ++ struct ltq_etop_priv *priv = netdev_priv(dev); ++ ++ clk_enable(priv->clk_switch); ++ ++ /* enable gbit port0 on the SoC */ ++ ltq_gbit_w32_mask((1 << 17), (1 << 18), LTQ_GBIT_P0_CTL); ++ ++ ltq_gbit_w32_mask(0, GCTL0_SE, LTQ_GBIT_GCTL0); ++ /* disable MDIO auto polling mode */ ++ ltq_gbit_w32_mask(0, PX_CTL_DMDIO, LTQ_GBIT_P0_CTL); ++ /* set 1522 packet size */ ++ ltq_gbit_w32_mask(0x300, 0, LTQ_GBIT_GCTL0); ++ /* disable pmac & dmac headers */ ++ ltq_gbit_w32_mask(PMAC_HD_CTL_AS | PMAC_HD_CTL_RXSH, 0, ++ LTQ_GBIT_PMAC_HD_CTL); ++ /* Due to traffic halt when burst length 8, ++ replace default IPG value with 0x3B */ ++ ltq_gbit_w32(0x3B, LTQ_GBIT_PMAC_RX_IPG); ++ /* set mdc clock to 2.5 MHz */ ++ ltq_gbit_w32_mask(MDC_CLOCK_MASK, 4 << MDC_CLOCK_OFFSET, ++ LTQ_GBIT_RGMII_CTL); + } + + static int + ltq_etop_hw_init(struct net_device *dev) + { + struct ltq_etop_priv *priv = netdev_priv(dev); +- int i; ++ int mii_mode = priv->mii_mode; + +- ltq_pmu_enable(PMU_PPE); ++ clk_enable(priv->clk_ppe); + +- switch (priv->pldata->mii_mode) { ++ if (of_machine_is_compatible("lantiq,ar9")) { ++ ltq_etop_gbit_init(dev); ++ /* force the etops link to the gbit to MII */ ++ mii_mode = PHY_INTERFACE_MODE_MII; ++ } ++ ltq_etop_w32_mask(MDIO_CFG_MASK, 0, LTQ_ETOP_MDIO_CFG); ++ ltq_etop_w32_mask(MAC_CFG_MASK, MAC_CFG_CGEN | MAC_CFG_DUPLEX | ++ MAC_CFG_SPEED | MAC_CFG_LINK, LTQ_ETOP_MAC_CFG); ++ ++ switch (mii_mode) { + case PHY_INTERFACE_MODE_RMII: +- ltq_etop_w32_mask(ETOP_MII_MASK, +- ETOP_MII_REVERSE, LTQ_ETOP_CFG); ++ ltq_etop_w32_mask(ETOP_CFG_MASK, ETOP_CFG_REMII0 | ETOP_CFG_OFF1 | ++ ETOP_CFG_SEN0 | ETOP_CFG_FEN0, LTQ_ETOP_CFG); + break; + + case PHY_INTERFACE_MODE_MII: +- ltq_etop_w32_mask(ETOP_MII_MASK, +- ETOP_MII_NORMAL, LTQ_ETOP_CFG); ++ ltq_etop_w32_mask(ETOP_CFG_MASK, ETOP_CFG_OFF1 | ++ ETOP_CFG_SEN0 | ETOP_CFG_FEN0, LTQ_ETOP_CFG); + break; + + default: ++ if (of_machine_is_compatible("lantiq,ase")) { ++ clk_enable(priv->clk_ephy); ++ /* disable external MII */ ++ ltq_etop_w32_mask(0, ETOP_CFG_MII0, LTQ_ETOP_CFG); ++ /* enable clock for internal PHY */ ++ clk_enable(priv->clk_ephycgu); ++ /* we need to write this magic to the internal phy to ++ make it work */ ++ ltq_etop_mdio_wr(NULL, 0x8, 0x12, 0xC020); ++ pr_info("Selected EPHY mode\n"); ++ break; ++ } + netdev_err(dev, "unknown mii mode %d\n", +- priv->pldata->mii_mode); ++ mii_mode); + return -ENOTSUPP; + } + +- /* enable crc generation */ +- ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG); ++ return 0; ++} ++ ++static int ++ltq_etop_dma_init(struct net_device *dev) ++{ ++ struct ltq_etop_priv *priv = netdev_priv(dev); ++ int tx = priv->tx_irq - LTQ_DMA_ETOP; ++ int rx = priv->rx_irq - LTQ_DMA_ETOP; ++ int err; + + ltq_dma_init_port(DMA_PORT_ETOP); + +- for (i = 0; i < MAX_DMA_CHAN; i++) { +- int irq = LTQ_DMA_CH0_INT + i; +- struct ltq_etop_chan *ch = &priv->ch[i]; +- +- ch->idx = ch->dma.nr = i; +- +- if (IS_TX(i)) { +- ltq_dma_alloc_tx(&ch->dma); +- request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv); +- } else if (IS_RX(i)) { +- ltq_dma_alloc_rx(&ch->dma); +- for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM; +- ch->dma.desc++) +- if (ltq_etop_alloc_skb(ch)) +- return -ENOMEM; +- ch->dma.desc = 0; +- request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv); ++ priv->txch.dma.nr = tx; ++ ltq_dma_alloc_tx(&priv->txch.dma); ++ err = request_irq(priv->tx_irq, ltq_etop_dma_irq, 0, "eth_tx", priv); ++ if (err) { ++ netdev_err(dev, "failed to allocate tx irq\n"); ++ goto err_out; ++ } ++ priv->txch.dma.irq = priv->tx_irq; ++ ++ priv->rxch.dma.nr = rx; ++ ltq_dma_alloc_rx(&priv->rxch.dma); ++ for (priv->rxch.dma.desc = 0; priv->rxch.dma.desc < LTQ_DESC_NUM; ++ priv->rxch.dma.desc++) { ++ if (ltq_etop_alloc_skb(&priv->rxch)) { ++ netdev_err(dev, "failed to allocate skbs\n"); ++ err = -ENOMEM; ++ goto err_out; + } +- ch->dma.irq = irq; + } +- return 0; ++ priv->rxch.dma.desc = 0; ++ err = request_irq(priv->rx_irq, ltq_etop_dma_irq, 0, "eth_rx", priv); ++ if (err) ++ netdev_err(dev, "failed to allocate rx irq\n"); ++ else ++ priv->rxch.dma.irq = priv->rx_irq; ++err_out: ++ return err; + } + + static void +@@ -308,6 +453,39 @@ static const struct ethtool_ops ltq_etop + }; + + static int ++ltq_etop_mdio_wr_xr9(struct mii_bus *bus, int phy_addr, ++ int phy_reg, u16 phy_data) ++{ ++ u32 val = MDIO_XR9_REQUEST | MDIO_XR9_WRITE | ++ (phy_data << MDIO_XR9_WR_OFFSET) | ++ ((phy_addr & MDIO_XR9_ADDR_MASK) << MDIO_XR9_ADDR_OFFSET) | ++ ((phy_reg & MDIO_XR9_REG_MASK) << MDIO_XR9_REG_OFFSET); ++ ++ while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST) ++ ; ++ ltq_gbit_w32(val, LTQ_GBIT_MDIO_CTL); ++ while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST) ++ ; ++ return 0; ++} ++ ++static int ++ltq_etop_mdio_rd_xr9(struct mii_bus *bus, int phy_addr, int phy_reg) ++{ ++ u32 val = MDIO_XR9_REQUEST | MDIO_XR9_READ | ++ ((phy_addr & MDIO_XR9_ADDR_MASK) << MDIO_XR9_ADDR_OFFSET) | ++ ((phy_reg & MDIO_XR9_REG_MASK) << MDIO_XR9_REG_OFFSET); ++ ++ while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST) ++ ; ++ ltq_gbit_w32(val, LTQ_GBIT_MDIO_CTL); ++ while (ltq_gbit_r32(LTQ_GBIT_MDIO_CTL) & MDIO_XR9_REQUEST) ++ ; ++ val = ltq_gbit_r32(LTQ_GBIT_MDIO_DATA) & MDIO_XR9_RD_MASK; ++ return val; ++} ++ ++static int + ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data) + { + u32 val = MDIO_REQUEST | +@@ -315,9 +493,9 @@ ltq_etop_mdio_wr(struct mii_bus *bus, in + ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) | + phy_data; + +- while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) ++ while (ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_REQUEST) + ; +- ltq_etop_w32(val, LTQ_ETOP_MDIO); ++ ltq_etop_w32(val, LTQ_ETOP_MDIO_ACC); + return 0; + } + +@@ -328,12 +506,12 @@ ltq_etop_mdio_rd(struct mii_bus *bus, in + ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) | + ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET); + +- while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) ++ while (ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_REQUEST) + ; +- ltq_etop_w32(val, LTQ_ETOP_MDIO); +- while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST) ++ ltq_etop_w32(val, LTQ_ETOP_MDIO_ACC); ++ while (ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_REQUEST) + ; +- val = ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_VAL_MASK; ++ val = ltq_etop_r32(LTQ_ETOP_MDIO_ACC) & MDIO_VAL_MASK; + return val; + } + +@@ -348,8 +526,18 @@ ltq_etop_mdio_probe(struct net_device *d + { + struct ltq_etop_priv *priv = netdev_priv(dev); + struct phy_device *phydev; ++ u32 phy_supported = (SUPPORTED_10baseT_Half ++ | SUPPORTED_10baseT_Full ++ | SUPPORTED_100baseT_Half ++ | SUPPORTED_100baseT_Full ++ | SUPPORTED_Autoneg ++ | SUPPORTED_MII ++ | SUPPORTED_TP); + +- phydev = phy_find_first(priv->mii_bus); ++ if (of_machine_is_compatible("lantiq,ase")) ++ phydev = mdiobus_get_phy(priv->mii_bus, 8); ++ else ++ phydev = mdiobus_get_phy(priv->mii_bus, 0); + + if (!phydev) { + netdev_err(dev, "no PHY found\n"); +@@ -357,21 +545,18 @@ ltq_etop_mdio_probe(struct net_device *d + } + + phydev = phy_connect(dev, phydev_name(phydev), +- <q_etop_mdio_link, priv->pldata->mii_mode); ++ <q_etop_mdio_link, priv->mii_mode); + + if (IS_ERR(phydev)) { + netdev_err(dev, "Could not attach to PHY\n"); + return PTR_ERR(phydev); + } + +- phydev->supported &= (SUPPORTED_10baseT_Half +- | SUPPORTED_10baseT_Full +- | SUPPORTED_100baseT_Half +- | SUPPORTED_100baseT_Full +- | SUPPORTED_Autoneg +- | SUPPORTED_MII +- | SUPPORTED_TP); ++ if (of_machine_is_compatible("lantiq,ar9")) ++ phy_supported |= SUPPORTED_1000baseT_Half ++ | SUPPORTED_1000baseT_Full; + ++ phydev->supported &= phy_supported; + phydev->advertising = phydev->supported; + phy_attached_info(phydev); + +@@ -392,8 +577,13 @@ ltq_etop_mdio_init(struct net_device *de + } + + priv->mii_bus->priv = dev; +- priv->mii_bus->read = ltq_etop_mdio_rd; +- priv->mii_bus->write = ltq_etop_mdio_wr; ++ if (of_machine_is_compatible("lantiq,ar9")) { ++ priv->mii_bus->read = ltq_etop_mdio_rd_xr9; ++ priv->mii_bus->write = ltq_etop_mdio_wr_xr9; ++ } else { ++ priv->mii_bus->read = ltq_etop_mdio_rd; ++ priv->mii_bus->write = ltq_etop_mdio_wr; ++ } + priv->mii_bus->name = "ltq_mii"; + snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", + priv->pdev->name, priv->pdev->id); +@@ -430,17 +620,19 @@ static int + ltq_etop_open(struct net_device *dev) + { + struct ltq_etop_priv *priv = netdev_priv(dev); +- int i; ++ unsigned long flags; + +- for (i = 0; i < MAX_DMA_CHAN; i++) { +- struct ltq_etop_chan *ch = &priv->ch[i]; ++ napi_enable(&priv->txch.napi); ++ napi_enable(&priv->rxch.napi); ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ ltq_dma_open(&priv->txch.dma); ++ ltq_dma_open(&priv->rxch.dma); ++ spin_unlock_irqrestore(&priv->lock, flags); ++ ++ if (dev->phydev) ++ phy_start(dev->phydev); + +- if (!IS_TX(i) && (!IS_RX(i))) +- continue; +- ltq_dma_open(&ch->dma); +- napi_enable(&ch->napi); +- } +- phy_start(dev->phydev); + netif_tx_start_all_queues(dev); + return 0; + } +@@ -449,18 +641,19 @@ static int + ltq_etop_stop(struct net_device *dev) + { + struct ltq_etop_priv *priv = netdev_priv(dev); +- int i; ++ unsigned long flags; + + netif_tx_stop_all_queues(dev); +- phy_stop(dev->phydev); +- for (i = 0; i < MAX_DMA_CHAN; i++) { +- struct ltq_etop_chan *ch = &priv->ch[i]; +- +- if (!IS_RX(i) && !IS_TX(i)) +- continue; +- napi_disable(&ch->napi); +- ltq_dma_close(&ch->dma); +- } ++ if (dev->phydev) ++ phy_stop(dev->phydev); ++ napi_disable(&priv->txch.napi); ++ napi_disable(&priv->rxch.napi); ++ ++ spin_lock_irqsave(&priv->lock, flags); ++ ltq_dma_close(&priv->txch.dma); ++ ltq_dma_close(&priv->rxch.dma); ++ spin_unlock_irqrestore(&priv->lock, flags); ++ + return 0; + } + +@@ -470,16 +663,16 @@ ltq_etop_tx(struct sk_buff *skb, struct + int queue = skb_get_queue_mapping(skb); + struct netdev_queue *txq = netdev_get_tx_queue(dev, queue); + struct ltq_etop_priv *priv = netdev_priv(dev); +- struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1]; +- struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; +- int len; ++ struct ltq_dma_desc *desc = ++ &priv->txch.dma.desc_base[priv->txch.dma.desc]; + unsigned long flags; + u32 byte_offset; ++ int len; + + len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; + +- if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) { +- dev_kfree_skb_any(skb); ++ if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ++ priv->txch.skb[priv->txch.dma.desc]) { + netdev_err(dev, "tx ring full\n"); + netif_tx_stop_queue(txq); + return NETDEV_TX_BUSY; +@@ -487,7 +680,7 @@ ltq_etop_tx(struct sk_buff *skb, struct + + /* dma needs to start on a 16 byte aligned address */ + byte_offset = CPHYSADDR(skb->data) % 16; +- ch->skb[ch->dma.desc] = skb; ++ priv->txch.skb[priv->txch.dma.desc] = skb; + + netif_trans_update(dev); + +@@ -497,11 +690,11 @@ ltq_etop_tx(struct sk_buff *skb, struct + wmb(); + desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP | + LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK); +- ch->dma.desc++; +- ch->dma.desc %= LTQ_DESC_NUM; ++ priv->txch.dma.desc++; ++ priv->txch.dma.desc %= LTQ_DESC_NUM; + spin_unlock_irqrestore(&priv->lock, flags); + +- if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN) ++ if (priv->txch.dma.desc_base[priv->txch.dma.desc].ctl & LTQ_DMA_OWN) + netif_tx_stop_queue(txq); + + return NETDEV_TX_OK; +@@ -515,8 +708,10 @@ ltq_etop_change_mtu(struct net_device *d + + dev->mtu = new_mtu; + ++ int max = ETH_HLEN + VLAN_HLEN + new_mtu + ETH_FCS_LEN; ++ + spin_lock_irqsave(&priv->lock, flags); +- ltq_etop_w32((ETOP_PLEN_UNDER << 16) | new_mtu, LTQ_ETOP_IGPLEN); ++ ltq_etop_w32((ETOP_PLEN_UNDER << 16) | max, LTQ_ETOP_IGPLEN); + spin_unlock_irqrestore(&priv->lock, flags); + + return 0; +@@ -584,6 +779,9 @@ ltq_etop_init(struct net_device *dev) + if (err) + goto err_hw; + ltq_etop_change_mtu(dev, 1500); ++ err = ltq_etop_dma_init(dev); ++ if (err) ++ goto err_hw; + + memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr)); + if (!is_valid_ether_addr(mac.sa_data)) { +@@ -601,9 +799,10 @@ ltq_etop_init(struct net_device *dev) + dev->addr_assign_type = NET_ADDR_RANDOM; + + ltq_etop_set_multicast_list(dev); +- err = ltq_etop_mdio_init(dev); +- if (err) +- goto err_netdev; ++ if (!ltq_etop_mdio_init(dev)) ++ dev->ethtool_ops = <q_etop_ethtool_ops; ++ else ++ pr_warn("etop: mdio probe failed\n");; + return 0; + + err_netdev: +@@ -623,6 +822,9 @@ ltq_etop_tx_timeout(struct net_device *d + err = ltq_etop_hw_init(dev); + if (err) + goto err_hw; ++ err = ltq_etop_dma_init(dev); ++ if (err) ++ goto err_hw; + netif_trans_update(dev); + netif_wake_queue(dev); + return; +@@ -646,14 +848,19 @@ static const struct net_device_ops ltq_e + .ndo_tx_timeout = ltq_etop_tx_timeout, + }; + +-static int __init +-ltq_etop_probe(struct platform_device *pdev) ++static int ltq_etop_probe(struct platform_device *pdev) + { + struct net_device *dev; + struct ltq_etop_priv *priv; +- struct resource *res; ++ struct resource *res, *gbit_res, irqres[2]; ++ const u8 *mac; + int err; +- int i; ++ ++ err = of_irq_to_resource_table(pdev->dev.of_node, irqres, 2); ++ if (err != 2) { ++ dev_err(&pdev->dev, "failed to get etop irqs\n"); ++ return -EINVAL; ++ } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { +@@ -679,31 +886,62 @@ ltq_etop_probe(struct platform_device *p + goto err_out; + } + +- dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4); +- if (!dev) { +- err = -ENOMEM; +- goto err_out; ++ if (of_machine_is_compatible("lantiq,ar9")) { ++ gbit_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!gbit_res) { ++ dev_err(&pdev->dev, "failed to get gbit resource\n"); ++ err = -ENOENT; ++ goto err_out; ++ } ++ ltq_gbit_membase = devm_ioremap_nocache(&pdev->dev, ++ gbit_res->start, resource_size(gbit_res)); ++ if (!ltq_gbit_membase) { ++ dev_err(&pdev->dev, "failed to remap gigabit switch %d\n", ++ pdev->id); ++ err = -ENOMEM; ++ goto err_out; ++ } + } ++ ++ dev = alloc_etherdev_mq(sizeof(struct ltq_etop_priv), 4); + strcpy(dev->name, "eth%d"); + dev->netdev_ops = <q_eth_netdev_ops; +- dev->ethtool_ops = <q_etop_ethtool_ops; + priv = netdev_priv(dev); + priv->res = res; + priv->pdev = pdev; +- priv->pldata = dev_get_platdata(&pdev->dev); + priv->netdev = dev; ++ priv->tx_irq = irqres[0].start; ++ priv->rx_irq = irqres[1].start; ++ priv->mii_mode = of_get_phy_mode(pdev->dev.of_node); ++ ++ mac = of_get_mac_address(pdev->dev.of_node); ++ if (mac) ++ memcpy(priv->mac, mac, ETH_ALEN); ++ ++ priv->clk_ppe = clk_get(&pdev->dev, NULL); ++ if (IS_ERR(priv->clk_ppe)) ++ return PTR_ERR(priv->clk_ppe); ++ if (of_machine_is_compatible("lantiq,ar9")) { ++ priv->clk_switch = clk_get(&pdev->dev, "switch"); ++ if (IS_ERR(priv->clk_switch)) ++ return PTR_ERR(priv->clk_switch); ++ } ++ if (of_machine_is_compatible("lantiq,ase")) { ++ priv->clk_ephy = clk_get(&pdev->dev, "ephy"); ++ if (IS_ERR(priv->clk_ephy)) ++ return PTR_ERR(priv->clk_ephy); ++ priv->clk_ephycgu = clk_get(&pdev->dev, "ephycgu"); ++ if (IS_ERR(priv->clk_ephycgu)) ++ return PTR_ERR(priv->clk_ephycgu); ++ } ++ + spin_lock_init(&priv->lock); + SET_NETDEV_DEV(dev, &pdev->dev); + +- for (i = 0; i < MAX_DMA_CHAN; i++) { +- if (IS_TX(i)) +- netif_napi_add(dev, &priv->ch[i].napi, +- ltq_etop_poll_tx, 8); +- else if (IS_RX(i)) +- netif_napi_add(dev, &priv->ch[i].napi, +- ltq_etop_poll_rx, 32); +- priv->ch[i].netdev = dev; +- } ++ netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8); ++ netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32); ++ priv->txch.netdev = dev; ++ priv->rxch.netdev = dev; + + err = register_netdev(dev); + if (err) +@@ -732,31 +970,22 @@ ltq_etop_remove(struct platform_device * + return 0; + } + ++static const struct of_device_id ltq_etop_match[] = { ++ { .compatible = "lantiq,etop-xway" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ltq_etop_match); ++ + static struct platform_driver ltq_mii_driver = { ++ .probe = ltq_etop_probe, + .remove = ltq_etop_remove, + .driver = { + .name = "ltq_etop", ++ .of_match_table = ltq_etop_match, + }, + }; + +-int __init +-init_ltq_etop(void) +-{ +- int ret = platform_driver_probe(<q_mii_driver, ltq_etop_probe); +- +- if (ret) +- pr_err("ltq_etop: Error registering platform driver!"); +- return ret; +-} +- +-static void __exit +-exit_ltq_etop(void) +-{ +- platform_driver_unregister(<q_mii_driver); +-} +- +-module_init(init_ltq_etop); +-module_exit(exit_ltq_etop); ++module_platform_driver(ltq_mii_driver); + + MODULE_AUTHOR("John Crispin "); + MODULE_DESCRIPTION("Lantiq SoC ETOP"); diff --git a/target/linux/ipq40xx/patches-4.9/0066-GPIO-add-named-gpio-exports.patch b/target/linux/lantiq/patches-4.14/0030-GPIO-add-named-gpio-exports.patch similarity index 84% rename from target/linux/ipq40xx/patches-4.9/0066-GPIO-add-named-gpio-exports.patch rename to target/linux/lantiq/patches-4.14/0030-GPIO-add-named-gpio-exports.patch index 4aa80007d..30b6a1181 100644 --- a/target/linux/ipq40xx/patches-4.9/0066-GPIO-add-named-gpio-exports.patch +++ b/target/linux/lantiq/patches-4.14/0030-GPIO-add-named-gpio-exports.patch @@ -1,15 +1,15 @@ -From a37b0c9113647b2120cf1a18cfc46afdb3f1fccc Mon Sep 17 00:00:00 2001 +From cc809a441d8f2924f785eb863dfa6aef47a25b0b Mon Sep 17 00:00:00 2001 From: John Crispin Date: Tue, 12 Aug 2014 20:49:27 +0200 -Subject: [PATCH 66/69] GPIO: add named gpio exports +Subject: [PATCH 30/36] GPIO: add named gpio exports Signed-off-by: John Crispin --- - drivers/gpio/gpiolib-of.c | 68 +++++++++++++++++++++++++++++++++++++++++++ - drivers/gpio/gpiolib-sysfs.c | 10 ++++++- - include/asm-generic/gpio.h | 6 ++++ - include/linux/gpio/consumer.h | 8 +++++ - 4 files changed, 91 insertions(+), 1 deletion(-) + drivers/gpio/gpiolib-of.c | 68 +++++++++++++++++++++++++++++++++++++++++ + drivers/gpio/gpiolib.c | 11 +++++-- + include/asm-generic/gpio.h | 5 +++ + include/linux/gpio/consumer.h | 8 +++++ + 4 files changed, 90 insertions(+), 2 deletions(-) --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -22,11 +22,13 @@ Signed-off-by: John Crispin #include "gpiolib.h" -@@ -538,3 +540,69 @@ void of_gpiochip_remove(struct gpio_chip +@@ -506,3 +508,73 @@ void of_gpiochip_remove(struct gpio_chip gpiochip_remove_pin_ranges(chip); of_node_put(chip->of_node); } + ++#ifdef CONFIG_GPIO_SYSFS ++ +static struct of_device_id gpio_export_ids[] = { + { .compatible = "gpio-export" }, + { /* sentinel */ } @@ -92,42 +94,11 @@ Signed-off-by: John Crispin + return platform_driver_probe(&gpio_export_driver, of_gpio_export_probe); +} +device_initcall(of_gpio_export_init); ---- a/drivers/gpio/gpiolib-sysfs.c -+++ b/drivers/gpio/gpiolib-sysfs.c -@@ -544,7 +544,7 @@ static struct class gpio_class = { - * - * Returns zero on success, else an error. - */ --int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) - { - struct gpio_chip *chip; - struct gpio_device *gdev; -@@ -606,6 +606,8 @@ int gpiod_export(struct gpio_desc *desc, - offset = gpio_chip_hwgpio(desc); - if (chip->names && chip->names[offset]) - ioname = chip->names[offset]; -+ if (name) -+ ioname = name; - - dev = device_create_with_groups(&gpio_class, &gdev->dev, - MKDEV(0, 0), data, gpio_groups, -@@ -627,6 +629,12 @@ err_unlock: - gpiod_dbg(desc, "%s: status %d\n", __func__, status); - return status; - } -+EXPORT_SYMBOL_GPL(__gpiod_export); + -+int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+{ -+ return __gpiod_export(desc, direction_may_change, NULL); -+} - EXPORT_SYMBOL_GPL(gpiod_export); - - static int match_export(struct device *dev, const void *desc) ++#endif --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h -@@ -126,6 +126,12 @@ static inline int gpio_export(unsigned g +@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g return gpiod_export(gpio_to_desc(gpio), direction_may_change); } @@ -142,7 +113,7 @@ Signed-off-by: John Crispin { --- a/include/linux/gpio/consumer.h +++ b/include/linux/gpio/consumer.h -@@ -427,6 +427,7 @@ static inline struct gpio_desc *devm_get +@@ -451,6 +451,7 @@ struct gpio_desc *devm_fwnode_get_gpiod_ #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) @@ -150,7 +121,7 @@ Signed-off-by: John Crispin int gpiod_export(struct gpio_desc *desc, bool direction_may_change); int gpiod_export_link(struct device *dev, const char *name, struct gpio_desc *desc); -@@ -434,6 +435,13 @@ void gpiod_unexport(struct gpio_desc *de +@@ -458,6 +459,13 @@ void gpiod_unexport(struct gpio_desc *de #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ @@ -164,3 +135,36 @@ Signed-off-by: John Crispin static inline int gpiod_export(struct gpio_desc *desc, bool direction_may_change) { +--- a/drivers/gpio/gpiolib-sysfs.c ++++ b/drivers/gpio/gpiolib-sysfs.c +@@ -553,7 +553,7 @@ static struct class gpio_class = { + * + * Returns zero on success, else an error. + */ +-int gpiod_export(struct gpio_desc *desc, bool direction_may_change) ++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) + { + struct gpio_chip *chip; + struct gpio_device *gdev; +@@ -615,6 +615,8 @@ int gpiod_export(struct gpio_desc *desc, + offset = gpio_chip_hwgpio(desc); + if (chip->names && chip->names[offset]) + ioname = chip->names[offset]; ++ if (name) ++ ioname = name; + + dev = device_create_with_groups(&gpio_class, &gdev->dev, + MKDEV(0, 0), data, gpio_groups, +@@ -636,6 +638,12 @@ err_unlock: + gpiod_dbg(desc, "%s: status %d\n", __func__, status); + return status; + } ++EXPORT_SYMBOL_GPL(__gpiod_export); ++ ++int gpiod_export(struct gpio_desc *desc, bool direction_may_change) ++{ ++ return __gpiod_export(desc, direction_may_change, NULL); ++} + EXPORT_SYMBOL_GPL(gpiod_export); + + static int match_export(struct device *dev, const void *desc) diff --git a/target/linux/lantiq/patches-4.14/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch b/target/linux/lantiq/patches-4.14/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch new file mode 100644 index 000000000..a1e1ccedd --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0031-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch @@ -0,0 +1,1034 @@ +From f17e50f67fa3c77624edf2ca03fae0d50f0ce39b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 7 Aug 2014 18:26:42 +0200 +Subject: [PATCH 31/36] I2C: MIPS: lantiq: add FALC-ON i2c bus master + +This patch adds the driver needed to make the I2C bus work on FALC-ON SoCs. + +Signed-off-by: Thomas Langer +Signed-off-by: John Crispin +--- + drivers/i2c/busses/Kconfig | 10 + + drivers/i2c/busses/Makefile | 1 + + drivers/i2c/busses/i2c-lantiq.c | 747 +++++++++++++++++++++++++++++++++++++++ + drivers/i2c/busses/i2c-lantiq.h | 234 ++++++++++++ + 4 files changed, 992 insertions(+) + create mode 100644 drivers/i2c/busses/i2c-lantiq.c + create mode 100644 drivers/i2c/busses/i2c-lantiq.h + +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -696,6 +696,16 @@ config I2C_MESON + If you say yes to this option, support will be included for the + I2C interface on the Amlogic Meson family of SoCs. + ++config I2C_LANTIQ ++ tristate "Lantiq I2C interface" ++ depends on LANTIQ && SOC_FALCON ++ help ++ If you say yes to this option, support will be included for the ++ Lantiq I2C core. ++ ++ This driver can also be built as a module. If so, the module ++ will be called i2c-lantiq. ++ + config I2C_MPC + tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx" + depends on PPC +--- a/drivers/i2c/busses/Makefile ++++ b/drivers/i2c/busses/Makefile +@@ -68,6 +68,7 @@ obj-$(CONFIG_I2C_IMX_LPI2C) += i2c-imx-l + obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o + obj-$(CONFIG_I2C_JZ4780) += i2c-jz4780.o + obj-$(CONFIG_I2C_KEMPLD) += i2c-kempld.o ++obj-$(CONFIG_I2C_LANTIQ) += i2c-lantiq.o + obj-$(CONFIG_I2C_LPC2K) += i2c-lpc2k.o + obj-$(CONFIG_I2C_MESON) += i2c-meson.o + obj-$(CONFIG_I2C_MPC) += i2c-mpc.o +--- /dev/null ++++ b/drivers/i2c/busses/i2c-lantiq.c +@@ -0,0 +1,747 @@ ++ ++/* ++ * Lantiq I2C bus adapter ++ * ++ * Parts based on i2c-designware.c and other i2c drivers from Linux 2.6.33 ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ * ++ * Copyright (C) 2012 Thomas Langer ++ */ ++ ++#include ++#include ++#include ++#include /* for kzalloc, kfree */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include "i2c-lantiq.h" ++ ++/* ++ * CURRENT ISSUES: ++ * - no high speed support ++ * - ten bit mode is not tested (no slave devices) ++ */ ++ ++/* access macros */ ++#define i2c_r32(reg) \ ++ __raw_readl(&(priv->membase)->reg) ++#define i2c_w32(val, reg) \ ++ __raw_writel(val, &(priv->membase)->reg) ++#define i2c_w32_mask(clear, set, reg) \ ++ i2c_w32((i2c_r32(reg) & ~(clear)) | (set), reg) ++ ++#define DRV_NAME "i2c-lantiq" ++#define DRV_VERSION "1.00" ++ ++#define LTQ_I2C_BUSY_TIMEOUT 20 /* ms */ ++ ++#ifdef DEBUG ++#define LTQ_I2C_XFER_TIMEOUT (25*HZ) ++#else ++#define LTQ_I2C_XFER_TIMEOUT HZ ++#endif ++ ++#define LTQ_I2C_IMSC_DEFAULT_MASK (I2C_IMSC_I2C_P_INT_EN | \ ++ I2C_IMSC_I2C_ERR_INT_EN) ++ ++#define LTQ_I2C_ARB_LOST (1 << 0) ++#define LTQ_I2C_NACK (1 << 1) ++#define LTQ_I2C_RX_UFL (1 << 2) ++#define LTQ_I2C_RX_OFL (1 << 3) ++#define LTQ_I2C_TX_UFL (1 << 4) ++#define LTQ_I2C_TX_OFL (1 << 5) ++ ++struct ltq_i2c { ++ struct mutex mutex; ++ ++ ++ /* active clock settings */ ++ unsigned int input_clock; /* clock input for i2c hardware block */ ++ unsigned int i2c_clock; /* approximated bus clock in kHz */ ++ ++ struct clk *clk_gate; ++ struct clk *clk_input; ++ ++ ++ /* resources (memory and interrupts) */ ++ int irq_lb; /* last burst irq */ ++ ++ struct lantiq_reg_i2c __iomem *membase; /* base of mapped registers */ ++ ++ struct i2c_adapter adap; ++ struct device *dev; ++ ++ struct completion cmd_complete; ++ ++ ++ /* message transfer data */ ++ struct i2c_msg *current_msg; /* current message */ ++ int msgs_num; /* number of messages to handle */ ++ u8 *msg_buf; /* current buffer */ ++ u32 msg_buf_len; /* remaining length of current buffer */ ++ int msg_err; /* error status of the current transfer */ ++ ++ ++ /* master status codes */ ++ enum { ++ STATUS_IDLE, ++ STATUS_ADDR, /* address phase */ ++ STATUS_WRITE, ++ STATUS_READ, ++ STATUS_READ_END, ++ STATUS_STOP ++ } status; ++}; ++ ++static irqreturn_t ltq_i2c_isr(int irq, void *dev_id); ++ ++static inline void enable_burst_irq(struct ltq_i2c *priv) ++{ ++ i2c_w32_mask(0, I2C_IMSC_LBREQ_INT_EN | I2C_IMSC_BREQ_INT_EN, imsc); ++} ++static inline void disable_burst_irq(struct ltq_i2c *priv) ++{ ++ i2c_w32_mask(I2C_IMSC_LBREQ_INT_EN | I2C_IMSC_BREQ_INT_EN, 0, imsc); ++} ++ ++static void prepare_msg_send_addr(struct ltq_i2c *priv) ++{ ++ struct i2c_msg *msg = priv->current_msg; ++ int rd = !!(msg->flags & I2C_M_RD); /* extends to 0 or 1 */ ++ u16 addr = msg->addr; ++ ++ /* new i2c_msg */ ++ priv->msg_buf = msg->buf; ++ priv->msg_buf_len = msg->len; ++ if (rd) ++ priv->status = STATUS_READ; ++ else ++ priv->status = STATUS_WRITE; ++ ++ /* send slave address */ ++ if (msg->flags & I2C_M_TEN) { ++ i2c_w32(0xf0 | ((addr & 0x300) >> 7) | rd, txd); ++ i2c_w32(addr & 0xff, txd); ++ } else { ++ i2c_w32((addr & 0x7f) << 1 | rd, txd); ++ } ++} ++ ++static void ltq_i2c_set_tx_len(struct ltq_i2c *priv) ++{ ++ struct i2c_msg *msg = priv->current_msg; ++ int len = (msg->flags & I2C_M_TEN) ? 2 : 1; ++ ++ pr_debug("set_tx_len %cX\n", (msg->flags & I2C_M_RD) ? 'R' : 'T'); ++ ++ priv->status = STATUS_ADDR; ++ ++ if (!(msg->flags & I2C_M_RD)) ++ len += msg->len; ++ else ++ /* set maximum received packet size (before rx int!) */ ++ i2c_w32(msg->len, mrps_ctrl); ++ i2c_w32(len, tps_ctrl); ++ enable_burst_irq(priv); ++} ++ ++static int ltq_i2c_hw_set_clock(struct i2c_adapter *adap) ++{ ++ struct ltq_i2c *priv = i2c_get_adapdata(adap); ++ unsigned int input_clock = clk_get_rate(priv->clk_input); ++ u32 dec, inc = 1; ++ ++ /* clock changed? */ ++ if (priv->input_clock == input_clock) ++ return 0; ++ ++ /* ++ * this formula is only an approximation, found by the recommended ++ * values in the "I2C Architecture Specification 1.7.1" ++ */ ++ dec = input_clock / (priv->i2c_clock * 2); ++ if (dec <= 6) ++ return -ENXIO; ++ ++ i2c_w32(0, fdiv_high_cfg); ++ i2c_w32((inc << I2C_FDIV_CFG_INC_OFFSET) | ++ (dec << I2C_FDIV_CFG_DEC_OFFSET), ++ fdiv_cfg); ++ ++ dev_info(priv->dev, "setup clocks (in %d kHz, bus %d kHz, dec=%d)\n", ++ input_clock, priv->i2c_clock, dec); ++ ++ priv->input_clock = input_clock; ++ return 0; ++} ++ ++static int ltq_i2c_hw_init(struct i2c_adapter *adap) ++{ ++ int ret = 0; ++ struct ltq_i2c *priv = i2c_get_adapdata(adap); ++ ++ /* disable bus */ ++ i2c_w32_mask(I2C_RUN_CTRL_RUN_EN, 0, run_ctrl); ++ ++#ifndef DEBUG ++ /* set normal operation clock divider */ ++ i2c_w32(1 << I2C_CLC_RMC_OFFSET, clc); ++#else ++ /* for debugging a higher divider value! */ ++ i2c_w32(0xF0 << I2C_CLC_RMC_OFFSET, clc); ++#endif ++ ++ /* setup clock */ ++ ret = ltq_i2c_hw_set_clock(adap); ++ if (ret != 0) { ++ dev_warn(priv->dev, "invalid clock settings\n"); ++ return ret; ++ } ++ ++ /* configure fifo */ ++ i2c_w32(I2C_FIFO_CFG_TXFC | /* tx fifo as flow controller */ ++ I2C_FIFO_CFG_RXFC | /* rx fifo as flow controller */ ++ I2C_FIFO_CFG_TXFA_TXFA2 | /* tx fifo 4-byte aligned */ ++ I2C_FIFO_CFG_RXFA_RXFA2 | /* rx fifo 4-byte aligned */ ++ I2C_FIFO_CFG_TXBS_TXBS0 | /* tx fifo burst size is 1 word */ ++ I2C_FIFO_CFG_RXBS_RXBS0, /* rx fifo burst size is 1 word */ ++ fifo_cfg); ++ ++ /* configure address */ ++ i2c_w32(I2C_ADDR_CFG_SOPE_EN | /* generate stop when no more data in ++ the fifo */ ++ I2C_ADDR_CFG_SONA_EN | /* generate stop when NA received */ ++ I2C_ADDR_CFG_MnS_EN | /* we are master device */ ++ 0, /* our slave address (not used!) */ ++ addr_cfg); ++ ++ /* enable bus */ ++ i2c_w32_mask(0, I2C_RUN_CTRL_RUN_EN, run_ctrl); ++ ++ return 0; ++} ++ ++static int ltq_i2c_wait_bus_not_busy(struct ltq_i2c *priv) ++{ ++ unsigned long timeout; ++ ++ timeout = jiffies + msecs_to_jiffies(LTQ_I2C_BUSY_TIMEOUT); ++ ++ do { ++ u32 stat = i2c_r32(bus_stat); ++ ++ if ((stat & I2C_BUS_STAT_BS_MASK) == I2C_BUS_STAT_BS_FREE) ++ return 0; ++ ++ cond_resched(); ++ } while (!time_after_eq(jiffies, timeout)); ++ ++ dev_err(priv->dev, "timeout waiting for bus ready\n"); ++ return -ETIMEDOUT; ++} ++ ++static void ltq_i2c_tx(struct ltq_i2c *priv, int last) ++{ ++ if (priv->msg_buf_len && priv->msg_buf) { ++ i2c_w32(*priv->msg_buf, txd); ++ ++ if (--priv->msg_buf_len) ++ priv->msg_buf++; ++ else ++ priv->msg_buf = NULL; ++ } else { ++ last = 1; ++ } ++ ++ if (last) ++ disable_burst_irq(priv); ++} ++ ++static void ltq_i2c_rx(struct ltq_i2c *priv, int last) ++{ ++ u32 fifo_stat, timeout; ++ if (priv->msg_buf_len && priv->msg_buf) { ++ timeout = 5000000; ++ do { ++ fifo_stat = i2c_r32(ffs_stat); ++ } while (!fifo_stat && --timeout); ++ if (!timeout) { ++ last = 1; ++ pr_debug("\nrx timeout\n"); ++ goto err; ++ } ++ while (fifo_stat) { ++ *priv->msg_buf = i2c_r32(rxd); ++ if (--priv->msg_buf_len) { ++ priv->msg_buf++; ++ } else { ++ priv->msg_buf = NULL; ++ last = 1; ++ break; ++ } ++ /* ++ * do not read more than burst size, otherwise no "last ++ * burst" is generated and the transaction is blocked! ++ */ ++ fifo_stat = 0; ++ } ++ } else { ++ last = 1; ++ } ++err: ++ if (last) { ++ disable_burst_irq(priv); ++ ++ if (priv->status == STATUS_READ_END) { ++ /* ++ * do the STATUS_STOP and complete() here, as sometimes ++ * the tx_end is already seen before this is finished ++ */ ++ priv->status = STATUS_STOP; ++ complete(&priv->cmd_complete); ++ } else { ++ i2c_w32(I2C_ENDD_CTRL_SETEND, endd_ctrl); ++ priv->status = STATUS_READ_END; ++ } ++ } ++} ++ ++static void ltq_i2c_xfer_init(struct ltq_i2c *priv) ++{ ++ /* enable interrupts */ ++ i2c_w32(LTQ_I2C_IMSC_DEFAULT_MASK, imsc); ++ ++ /* trigger transfer of first msg */ ++ ltq_i2c_set_tx_len(priv); ++} ++ ++static void dump_msgs(struct i2c_msg msgs[], int num, int rx) ++{ ++#if defined(DEBUG) ++ int i, j; ++ pr_debug("Messages %d %s\n", num, rx ? "out" : "in"); ++ for (i = 0; i < num; i++) { ++ pr_debug("%2d %cX Msg(%d) addr=0x%X: ", i, ++ (msgs[i].flags & I2C_M_RD) ? 'R' : 'T', ++ msgs[i].len, msgs[i].addr); ++ if (!(msgs[i].flags & I2C_M_RD) || rx) { ++ for (j = 0; j < msgs[i].len; j++) ++ pr_debug("%02X ", msgs[i].buf[j]); ++ } ++ pr_debug("\n"); ++ } ++#endif ++} ++ ++static void ltq_i2c_release_bus(struct ltq_i2c *priv) ++{ ++ if ((i2c_r32(bus_stat) & I2C_BUS_STAT_BS_MASK) == I2C_BUS_STAT_BS_BM) ++ i2c_w32(I2C_ENDD_CTRL_SETEND, endd_ctrl); ++} ++ ++static int ltq_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], ++ int num) ++{ ++ struct ltq_i2c *priv = i2c_get_adapdata(adap); ++ int ret; ++ ++ dev_dbg(priv->dev, "xfer %u messages\n", num); ++ dump_msgs(msgs, num, 0); ++ ++ mutex_lock(&priv->mutex); ++ ++ init_completion(&priv->cmd_complete); ++ priv->current_msg = msgs; ++ priv->msgs_num = num; ++ priv->msg_err = 0; ++ priv->status = STATUS_IDLE; ++ ++ /* wait for the bus to become ready */ ++ ret = ltq_i2c_wait_bus_not_busy(priv); ++ if (ret) ++ goto done; ++ ++ while (priv->msgs_num) { ++ /* start the transfers */ ++ ltq_i2c_xfer_init(priv); ++ ++ /* wait for transfers to complete */ ++ ret = wait_for_completion_interruptible_timeout( ++ &priv->cmd_complete, LTQ_I2C_XFER_TIMEOUT); ++ if (ret == 0) { ++ dev_err(priv->dev, "controller timed out\n"); ++ ltq_i2c_hw_init(adap); ++ ret = -ETIMEDOUT; ++ goto done; ++ } else if (ret < 0) ++ goto done; ++ ++ if (priv->msg_err) { ++ if (priv->msg_err & LTQ_I2C_NACK) ++ ret = -ENXIO; ++ else ++ ret = -EREMOTEIO; ++ goto done; ++ } ++ if (--priv->msgs_num) ++ priv->current_msg++; ++ } ++ /* no error? */ ++ ret = num; ++ ++done: ++ ltq_i2c_release_bus(priv); ++ ++ mutex_unlock(&priv->mutex); ++ ++ if (ret >= 0) ++ dump_msgs(msgs, num, 1); ++ ++ pr_debug("XFER ret %d\n", ret); ++ return ret; ++} ++ ++static irqreturn_t ltq_i2c_isr_burst(int irq, void *dev_id) ++{ ++ struct ltq_i2c *priv = dev_id; ++ struct i2c_msg *msg = priv->current_msg; ++ int last = (irq == priv->irq_lb); ++ ++ if (last) ++ pr_debug("LB "); ++ else ++ pr_debug("B "); ++ ++ if (msg->flags & I2C_M_RD) { ++ switch (priv->status) { ++ case STATUS_ADDR: ++ pr_debug("X"); ++ prepare_msg_send_addr(priv); ++ disable_burst_irq(priv); ++ break; ++ case STATUS_READ: ++ case STATUS_READ_END: ++ pr_debug("R"); ++ ltq_i2c_rx(priv, last); ++ break; ++ default: ++ disable_burst_irq(priv); ++ pr_warn("Status R %d\n", priv->status); ++ break; ++ } ++ } else { ++ switch (priv->status) { ++ case STATUS_ADDR: ++ pr_debug("x"); ++ prepare_msg_send_addr(priv); ++ break; ++ case STATUS_WRITE: ++ pr_debug("w"); ++ ltq_i2c_tx(priv, last); ++ break; ++ default: ++ disable_burst_irq(priv); ++ pr_warn("Status W %d\n", priv->status); ++ break; ++ } ++ } ++ ++ i2c_w32(I2C_ICR_BREQ_INT_CLR | I2C_ICR_LBREQ_INT_CLR, icr); ++ return IRQ_HANDLED; ++} ++ ++static void ltq_i2c_isr_prot(struct ltq_i2c *priv) ++{ ++ u32 i_pro = i2c_r32(p_irqss); ++ ++ pr_debug("i2c-p"); ++ ++ /* not acknowledge */ ++ if (i_pro & I2C_P_IRQSS_NACK) { ++ priv->msg_err |= LTQ_I2C_NACK; ++ pr_debug(" nack"); ++ } ++ ++ /* arbitration lost */ ++ if (i_pro & I2C_P_IRQSS_AL) { ++ priv->msg_err |= LTQ_I2C_ARB_LOST; ++ pr_debug(" arb-lost"); ++ } ++ /* tx -> rx switch */ ++ if (i_pro & I2C_P_IRQSS_RX) ++ pr_debug(" rx"); ++ ++ /* tx end */ ++ if (i_pro & I2C_P_IRQSS_TX_END) ++ pr_debug(" txend"); ++ pr_debug("\n"); ++ ++ if (!priv->msg_err) { ++ /* tx -> rx switch */ ++ if (i_pro & I2C_P_IRQSS_RX) { ++ priv->status = STATUS_READ; ++ enable_burst_irq(priv); ++ } ++ if (i_pro & I2C_P_IRQSS_TX_END) { ++ if (priv->status == STATUS_READ) ++ priv->status = STATUS_READ_END; ++ else { ++ disable_burst_irq(priv); ++ priv->status = STATUS_STOP; ++ } ++ } ++ } ++ ++ i2c_w32(i_pro, p_irqsc); ++} ++ ++static irqreturn_t ltq_i2c_isr(int irq, void *dev_id) ++{ ++ u32 i_raw, i_err = 0; ++ struct ltq_i2c *priv = dev_id; ++ ++ i_raw = i2c_r32(mis); ++ pr_debug("i_raw 0x%08X\n", i_raw); ++ ++ /* error interrupt */ ++ if (i_raw & I2C_RIS_I2C_ERR_INT_INTOCC) { ++ i_err = i2c_r32(err_irqss); ++ pr_debug("i_err 0x%08X bus_stat 0x%04X\n", ++ i_err, i2c_r32(bus_stat)); ++ ++ /* tx fifo overflow (8) */ ++ if (i_err & I2C_ERR_IRQSS_TXF_OFL) ++ priv->msg_err |= LTQ_I2C_TX_OFL; ++ ++ /* tx fifo underflow (4) */ ++ if (i_err & I2C_ERR_IRQSS_TXF_UFL) ++ priv->msg_err |= LTQ_I2C_TX_UFL; ++ ++ /* rx fifo overflow (2) */ ++ if (i_err & I2C_ERR_IRQSS_RXF_OFL) ++ priv->msg_err |= LTQ_I2C_RX_OFL; ++ ++ /* rx fifo underflow (1) */ ++ if (i_err & I2C_ERR_IRQSS_RXF_UFL) ++ priv->msg_err |= LTQ_I2C_RX_UFL; ++ ++ i2c_w32(i_err, err_irqsc); ++ } ++ ++ /* protocol interrupt */ ++ if (i_raw & I2C_RIS_I2C_P_INT_INTOCC) ++ ltq_i2c_isr_prot(priv); ++ ++ if ((priv->msg_err) || (priv->status == STATUS_STOP)) ++ complete(&priv->cmd_complete); ++ ++ return IRQ_HANDLED; ++} ++ ++static u32 ltq_i2c_functionality(struct i2c_adapter *adap) ++{ ++ return I2C_FUNC_I2C | ++ I2C_FUNC_10BIT_ADDR | ++ I2C_FUNC_SMBUS_EMUL; ++} ++ ++static struct i2c_algorithm ltq_i2c_algorithm = { ++ .master_xfer = ltq_i2c_xfer, ++ .functionality = ltq_i2c_functionality, ++}; ++ ++static int ltq_i2c_probe(struct platform_device *pdev) ++{ ++ struct device_node *node = pdev->dev.of_node; ++ struct ltq_i2c *priv; ++ struct i2c_adapter *adap; ++ struct resource *mmres, irqres[4]; ++ int ret = 0; ++ ++ dev_dbg(&pdev->dev, "probing\n"); ++ ++ mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ret = of_irq_to_resource_table(node, irqres, 4); ++ if (!mmres || (ret != 4)) { ++ dev_err(&pdev->dev, "no resources\n"); ++ return -ENODEV; ++ } ++ ++ /* allocate private data */ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) { ++ dev_err(&pdev->dev, "can't allocate private data\n"); ++ return -ENOMEM; ++ } ++ ++ adap = &priv->adap; ++ i2c_set_adapdata(adap, priv); ++ adap->owner = THIS_MODULE; ++ adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD; ++ strlcpy(adap->name, DRV_NAME "-adapter", sizeof(adap->name)); ++ adap->algo = <q_i2c_algorithm; ++ adap->dev.parent = &pdev->dev; ++ adap->dev.of_node = pdev->dev.of_node; ++ ++ if (of_property_read_u32(node, "clock-frequency", &priv->i2c_clock)) { ++ dev_warn(&pdev->dev, "No I2C speed selected, using 100kHz\n"); ++ priv->i2c_clock = 100000; ++ } ++ ++ init_completion(&priv->cmd_complete); ++ mutex_init(&priv->mutex); ++ ++ priv->membase = devm_ioremap_resource(&pdev->dev, mmres); ++ if (IS_ERR(priv->membase)) ++ return PTR_ERR(priv->membase); ++ ++ priv->dev = &pdev->dev; ++ priv->irq_lb = irqres[0].start; ++ ++ ret = devm_request_irq(&pdev->dev, irqres[0].start, ltq_i2c_isr_burst, ++ 0x0, "i2c lb", priv); ++ if (ret) { ++ dev_err(&pdev->dev, "can't get last burst IRQ %d\n", ++ irqres[0].start); ++ return -ENODEV; ++ } ++ ++ ret = devm_request_irq(&pdev->dev, irqres[1].start, ltq_i2c_isr_burst, ++ 0x0, "i2c b", priv); ++ if (ret) { ++ dev_err(&pdev->dev, "can't get burst IRQ %d\n", ++ irqres[1].start); ++ return -ENODEV; ++ } ++ ++ ret = devm_request_irq(&pdev->dev, irqres[2].start, ltq_i2c_isr, ++ 0x0, "i2c err", priv); ++ if (ret) { ++ dev_err(&pdev->dev, "can't get error IRQ %d\n", ++ irqres[2].start); ++ return -ENODEV; ++ } ++ ++ ret = devm_request_irq(&pdev->dev, irqres[3].start, ltq_i2c_isr, ++ 0x0, "i2c p", priv); ++ if (ret) { ++ dev_err(&pdev->dev, "can't get protocol IRQ %d\n", ++ irqres[3].start); ++ return -ENODEV; ++ } ++ ++ dev_dbg(&pdev->dev, "mapped io-space to %p\n", priv->membase); ++ dev_dbg(&pdev->dev, "use IRQs %d, %d, %d, %d\n", irqres[0].start, ++ irqres[1].start, irqres[2].start, irqres[3].start); ++ ++ priv->clk_gate = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(priv->clk_gate)) { ++ dev_err(&pdev->dev, "failed to get i2c clk\n"); ++ return -ENOENT; ++ } ++ ++ /* this is a static clock, which has no refcounting */ ++ priv->clk_input = clk_get_fpi(); ++ if (IS_ERR(priv->clk_input)) { ++ dev_err(&pdev->dev, "failed to get fpi clk\n"); ++ return -ENOENT; ++ } ++ ++ clk_activate(priv->clk_gate); ++ ++ /* add our adapter to the i2c stack */ ++ ret = i2c_add_numbered_adapter(adap); ++ if (ret) { ++ dev_err(&pdev->dev, "can't register I2C adapter\n"); ++ goto out; ++ } ++ ++ platform_set_drvdata(pdev, priv); ++ i2c_set_adapdata(adap, priv); ++ ++ /* print module version information */ ++ dev_dbg(&pdev->dev, "module id=%u revision=%u\n", ++ (i2c_r32(id) & I2C_ID_ID_MASK) >> I2C_ID_ID_OFFSET, ++ (i2c_r32(id) & I2C_ID_REV_MASK) >> I2C_ID_REV_OFFSET); ++ ++ /* initialize HW */ ++ ret = ltq_i2c_hw_init(adap); ++ if (ret) { ++ dev_err(&pdev->dev, "can't configure adapter\n"); ++ i2c_del_adapter(adap); ++ platform_set_drvdata(pdev, NULL); ++ goto out; ++ } else { ++ dev_info(&pdev->dev, "version %s\n", DRV_VERSION); ++ } ++ ++out: ++ /* if init failed, we need to deactivate the clock gate */ ++ if (ret) ++ clk_deactivate(priv->clk_gate); ++ ++ return ret; ++} ++ ++static int ltq_i2c_remove(struct platform_device *pdev) ++{ ++ struct ltq_i2c *priv = platform_get_drvdata(pdev); ++ ++ /* disable bus */ ++ i2c_w32_mask(I2C_RUN_CTRL_RUN_EN, 0, run_ctrl); ++ ++ /* power down the core */ ++ clk_deactivate(priv->clk_gate); ++ ++ /* remove driver */ ++ i2c_del_adapter(&priv->adap); ++ kfree(priv); ++ ++ dev_dbg(&pdev->dev, "removed\n"); ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++static const struct of_device_id ltq_i2c_match[] = { ++ { .compatible = "lantiq,lantiq-i2c" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ltq_i2c_match); ++ ++static struct platform_driver ltq_i2c_driver = { ++ .probe = ltq_i2c_probe, ++ .remove = ltq_i2c_remove, ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ .of_match_table = ltq_i2c_match, ++ }, ++}; ++ ++module_platform_driver(ltq_i2c_driver); ++ ++MODULE_DESCRIPTION("Lantiq I2C bus adapter"); ++MODULE_AUTHOR("Thomas Langer "); ++MODULE_ALIAS("platform:" DRV_NAME); ++MODULE_LICENSE("GPL"); ++MODULE_VERSION(DRV_VERSION); +--- /dev/null ++++ b/drivers/i2c/busses/i2c-lantiq.h +@@ -0,0 +1,234 @@ ++#ifndef I2C_LANTIQ_H ++#define I2C_LANTIQ_H ++ ++/* I2C register structure */ ++struct lantiq_reg_i2c { ++ /* I2C Kernel Clock Control Register */ ++ unsigned int clc; /* 0x00000000 */ ++ /* Reserved */ ++ unsigned int res_0; /* 0x00000004 */ ++ /* I2C Identification Register */ ++ unsigned int id; /* 0x00000008 */ ++ /* Reserved */ ++ unsigned int res_1; /* 0x0000000C */ ++ /* ++ * I2C RUN Control Register ++ * This register enables and disables the I2C peripheral. Before ++ * enabling, the I2C has to be configured properly. After enabling ++ * no configuration is possible ++ */ ++ unsigned int run_ctrl; /* 0x00000010 */ ++ /* ++ * I2C End Data Control Register ++ * This register is used to either turn around the data transmission ++ * direction or to address another slave without sending a stop ++ * condition. Also the software can stop the slave-transmitter by ++ * sending a not-accolade when working as master-receiver or even ++ * stop data transmission immediately when operating as ++ * master-transmitter. The writing to the bits of this control ++ * register is only effective when in MASTER RECEIVES BYTES, MASTER ++ * TRANSMITS BYTES, MASTER RESTART or SLAVE RECEIVE BYTES state ++ */ ++ unsigned int endd_ctrl; /* 0x00000014 */ ++ /* ++ * I2C Fractional Divider Configuration Register ++ * These register is used to program the fractional divider of the I2C ++ * bus. Before the peripheral is switched on by setting the RUN-bit the ++ * two (fixed) values for the two operating frequencies are programmed ++ * into these (configuration) registers. The Register FDIV_HIGH_CFG has ++ * the same layout as I2C_FDIV_CFG. ++ */ ++ unsigned int fdiv_cfg; /* 0x00000018 */ ++ /* ++ * I2C Fractional Divider (highspeed mode) Configuration Register ++ * These register is used to program the fractional divider of the I2C ++ * bus. Before the peripheral is switched on by setting the RUN-bit the ++ * two (fixed) values for the two operating frequencies are programmed ++ * into these (configuration) registers. The Register FDIV_CFG has the ++ * same layout as I2C_FDIV_CFG. ++ */ ++ unsigned int fdiv_high_cfg; /* 0x0000001C */ ++ /* I2C Address Configuration Register */ ++ unsigned int addr_cfg; /* 0x00000020 */ ++ /* I2C Bus Status Register ++ * This register gives a status information of the I2C. This additional ++ * information can be used by the software to start proper actions. ++ */ ++ unsigned int bus_stat; /* 0x00000024 */ ++ /* I2C FIFO Configuration Register */ ++ unsigned int fifo_cfg; /* 0x00000028 */ ++ /* I2C Maximum Received Packet Size Register */ ++ unsigned int mrps_ctrl; /* 0x0000002C */ ++ /* I2C Received Packet Size Status Register */ ++ unsigned int rps_stat; /* 0x00000030 */ ++ /* I2C Transmit Packet Size Register */ ++ unsigned int tps_ctrl; /* 0x00000034 */ ++ /* I2C Filled FIFO Stages Status Register */ ++ unsigned int ffs_stat; /* 0x00000038 */ ++ /* Reserved */ ++ unsigned int res_2; /* 0x0000003C */ ++ /* I2C Timing Configuration Register */ ++ unsigned int tim_cfg; /* 0x00000040 */ ++ /* Reserved */ ++ unsigned int res_3[7]; /* 0x00000044 */ ++ /* I2C Error Interrupt Request Source Mask Register */ ++ unsigned int err_irqsm; /* 0x00000060 */ ++ /* I2C Error Interrupt Request Source Status Register */ ++ unsigned int err_irqss; /* 0x00000064 */ ++ /* I2C Error Interrupt Request Source Clear Register */ ++ unsigned int err_irqsc; /* 0x00000068 */ ++ /* Reserved */ ++ unsigned int res_4; /* 0x0000006C */ ++ /* I2C Protocol Interrupt Request Source Mask Register */ ++ unsigned int p_irqsm; /* 0x00000070 */ ++ /* I2C Protocol Interrupt Request Source Status Register */ ++ unsigned int p_irqss; /* 0x00000074 */ ++ /* I2C Protocol Interrupt Request Source Clear Register */ ++ unsigned int p_irqsc; /* 0x00000078 */ ++ /* Reserved */ ++ unsigned int res_5; /* 0x0000007C */ ++ /* I2C Raw Interrupt Status Register */ ++ unsigned int ris; /* 0x00000080 */ ++ /* I2C Interrupt Mask Control Register */ ++ unsigned int imsc; /* 0x00000084 */ ++ /* I2C Masked Interrupt Status Register */ ++ unsigned int mis; /* 0x00000088 */ ++ /* I2C Interrupt Clear Register */ ++ unsigned int icr; /* 0x0000008C */ ++ /* I2C Interrupt Set Register */ ++ unsigned int isr; /* 0x00000090 */ ++ /* I2C DMA Enable Register */ ++ unsigned int dmae; /* 0x00000094 */ ++ /* Reserved */ ++ unsigned int res_6[8154]; /* 0x00000098 */ ++ /* I2C Transmit Data Register */ ++ unsigned int txd; /* 0x00008000 */ ++ /* Reserved */ ++ unsigned int res_7[4095]; /* 0x00008004 */ ++ /* I2C Receive Data Register */ ++ unsigned int rxd; /* 0x0000C000 */ ++ /* Reserved */ ++ unsigned int res_8[4095]; /* 0x0000C004 */ ++}; ++ ++/* ++ * Clock Divider for Normal Run Mode ++ * Max 8-bit divider value. IF RMC is 0 the module is disabled. Note: As long ++ * as the new divider value RMC is not valid, the register returns 0x0000 00xx ++ * on reading. ++ */ ++#define I2C_CLC_RMC_MASK 0x0000FF00 ++/* field offset */ ++#define I2C_CLC_RMC_OFFSET 8 ++ ++/* Fields of "I2C Identification Register" */ ++/* Module ID */ ++#define I2C_ID_ID_MASK 0x0000FF00 ++/* field offset */ ++#define I2C_ID_ID_OFFSET 8 ++/* Revision */ ++#define I2C_ID_REV_MASK 0x000000FF ++/* field offset */ ++#define I2C_ID_REV_OFFSET 0 ++ ++/* Fields of "I2C Interrupt Mask Control Register" */ ++/* Enable */ ++#define I2C_IMSC_BREQ_INT_EN 0x00000008 ++/* Enable */ ++#define I2C_IMSC_LBREQ_INT_EN 0x00000004 ++ ++/* Fields of "I2C Fractional Divider Configuration Register" */ ++/* field offset */ ++#define I2C_FDIV_CFG_INC_OFFSET 16 ++ ++/* Fields of "I2C Interrupt Mask Control Register" */ ++/* Enable */ ++#define I2C_IMSC_I2C_P_INT_EN 0x00000020 ++/* Enable */ ++#define I2C_IMSC_I2C_ERR_INT_EN 0x00000010 ++ ++/* Fields of "I2C Error Interrupt Request Source Status Register" */ ++/* TXF_OFL */ ++#define I2C_ERR_IRQSS_TXF_OFL 0x00000008 ++/* TXF_UFL */ ++#define I2C_ERR_IRQSS_TXF_UFL 0x00000004 ++/* RXF_OFL */ ++#define I2C_ERR_IRQSS_RXF_OFL 0x00000002 ++/* RXF_UFL */ ++#define I2C_ERR_IRQSS_RXF_UFL 0x00000001 ++ ++/* Fields of "I2C Raw Interrupt Status Register" */ ++/* Read: Interrupt occurred. */ ++#define I2C_RIS_I2C_ERR_INT_INTOCC 0x00000010 ++/* Read: Interrupt occurred. */ ++#define I2C_RIS_I2C_P_INT_INTOCC 0x00000020 ++ ++/* Fields of "I2C FIFO Configuration Register" */ ++/* TX FIFO Flow Control */ ++#define I2C_FIFO_CFG_TXFC 0x00020000 ++/* RX FIFO Flow Control */ ++#define I2C_FIFO_CFG_RXFC 0x00010000 ++/* Word aligned (character alignment of four characters) */ ++#define I2C_FIFO_CFG_TXFA_TXFA2 0x00002000 ++/* Word aligned (character alignment of four characters) */ ++#define I2C_FIFO_CFG_RXFA_RXFA2 0x00000200 ++/* 1 word */ ++#define I2C_FIFO_CFG_TXBS_TXBS0 0x00000000 ++ ++/* Fields of "I2C FIFO Configuration Register" */ ++/* 1 word */ ++#define I2C_FIFO_CFG_RXBS_RXBS0 0x00000000 ++/* Stop on Packet End Enable */ ++#define I2C_ADDR_CFG_SOPE_EN 0x00200000 ++/* Stop on Not Acknowledge Enable */ ++#define I2C_ADDR_CFG_SONA_EN 0x00100000 ++/* Enable */ ++#define I2C_ADDR_CFG_MnS_EN 0x00080000 ++ ++/* Fields of "I2C Interrupt Clear Register" */ ++/* Clear */ ++#define I2C_ICR_BREQ_INT_CLR 0x00000008 ++/* Clear */ ++#define I2C_ICR_LBREQ_INT_CLR 0x00000004 ++ ++/* Fields of "I2C Fractional Divider Configuration Register" */ ++/* field offset */ ++#define I2C_FDIV_CFG_DEC_OFFSET 0 ++ ++/* Fields of "I2C Bus Status Register" */ ++/* Bus Status */ ++#define I2C_BUS_STAT_BS_MASK 0x00000003 ++/* Read from I2C Bus. */ ++#define I2C_BUS_STAT_RNW_READ 0x00000004 ++/* I2C Bus is free. */ ++#define I2C_BUS_STAT_BS_FREE 0x00000000 ++/* ++ * The device is working as master and has claimed the control on the ++ * I2C-bus (busy master). ++ */ ++#define I2C_BUS_STAT_BS_BM 0x00000002 ++ ++/* Fields of "I2C RUN Control Register" */ ++/* Enable */ ++#define I2C_RUN_CTRL_RUN_EN 0x00000001 ++ ++/* Fields of "I2C End Data Control Register" */ ++/* ++ * Set End of Transmission ++ * Note:Do not write '1' to this bit when bus is free. This will cause an ++ * abort after the first byte when a new transfer is started. ++ */ ++#define I2C_ENDD_CTRL_SETEND 0x00000002 ++ ++/* Fields of "I2C Protocol Interrupt Request Source Status Register" */ ++/* NACK */ ++#define I2C_P_IRQSS_NACK 0x00000010 ++/* AL */ ++#define I2C_P_IRQSS_AL 0x00000008 ++/* RX */ ++#define I2C_P_IRQSS_RX 0x00000040 ++/* TX_END */ ++#define I2C_P_IRQSS_TX_END 0x00000020 ++ ++ ++#endif /* I2C_LANTIQ_H */ diff --git a/target/linux/lantiq/patches-4.14/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch b/target/linux/lantiq/patches-4.14/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch new file mode 100644 index 000000000..2e0ce468f --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch @@ -0,0 +1,218 @@ +From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Wed, 10 Sep 2014 22:42:14 +0200 +Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling + +Signed-off-by: John Crispin +--- + .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 + + arch/mips/lantiq/xway/Makefile | 3 + + arch/mips/lantiq/xway/ath5k_eep.c | 136 +++++++++++++++++++++ + arch/mips/lantiq/xway/eth_mac.c | 25 ++++ + drivers/net/ethernet/lantiq_etop.c | 6 +- + 5 files changed, 172 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/lantiq/xway/ath5k_eep.c + create mode 100644 arch/mips/lantiq/xway/eth_mac.c + +--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h ++++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +@@ -104,5 +104,8 @@ int xrx200_gphy_boot(struct device *dev, + extern void ltq_pmu_enable(unsigned int module); + extern void ltq_pmu_disable(unsigned int module); + ++/* allow the ethernet driver to load a flash mapped mac addr */ ++const u8* ltq_get_eth_mac(void); ++ + #endif /* CONFIG_SOC_TYPE_XWAY */ + #endif /* _LTQ_XWAY_H__ */ +--- a/arch/mips/lantiq/xway/Makefile ++++ b/arch/mips/lantiq/xway/Makefile +@@ -7,3 +7,6 @@ obj-y += timer.o + endif + + obj-y += vmmc.o ++ ++obj-y += eth_mac.o ++obj-$(CONFIG_PCI) += ath5k_eep.o +--- /dev/null ++++ b/arch/mips/lantiq/xway/ath5k_eep.c +@@ -0,0 +1,136 @@ ++/* ++ * Copyright (C) 2011 Luca Olivetti ++ * Copyright (C) 2011 John Crispin ++ * Copyright (C) 2011 Andrej Vlašić ++ * Copyright (C) 2013 Álvaro Fernández Rojas ++ * Copyright (C) 2013 Daniel Gimpelevich ++ * Copyright (C) 2015 Vittorio Gambaletta ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev); ++struct ath5k_platform_data ath5k_pdata; ++static u8 athxk_eeprom_mac[6]; ++ ++static int ath5k_pci_plat_dev_init(struct pci_dev *dev) ++{ ++ dev->dev.platform_data = &ath5k_pdata; ++ return 0; ++} ++ ++static int ath5k_eep_load; ++int __init of_ath5k_eeprom_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node, *mtd_np = NULL; ++ int mac_offset; ++ u32 mac_inc = 0; ++ int i; ++ struct mtd_info *the_mtd; ++ size_t flash_readlen; ++ const __be32 *list; ++ const char *part; ++ phandle phandle; ++ ++ list = of_get_property(np, "ath,eep-flash", &i); ++ if (!list || (i != (2 * sizeof(*list)))) ++ return -ENODEV; ++ ++ phandle = be32_to_cpup(list++); ++ if (phandle) ++ mtd_np = of_find_node_by_phandle(phandle); ++ ++ if (!mtd_np) ++ return -ENODEV; ++ ++ part = of_get_property(mtd_np, "label", NULL); ++ if (!part) ++ part = mtd_np->name; ++ ++ the_mtd = get_mtd_device_nm(part); ++ if (IS_ERR(the_mtd)) ++ return -ENODEV; ++ ++ ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1, GFP_KERNEL); ++ ++ i = mtd_read(the_mtd, be32_to_cpup(list), ATH5K_PLAT_EEP_MAX_WORDS << 1, ++ &flash_readlen, (void *) ath5k_pdata.eeprom_data); ++ ++ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) { ++ size_t mac_readlen; ++ mtd_read(the_mtd, mac_offset, 6, &mac_readlen, ++ (void *) athxk_eeprom_mac); ++ } ++ put_mtd_device(the_mtd); ++ ++ if (((ATH5K_PLAT_EEP_MAX_WORDS<<1) != flash_readlen) || i) { ++ dev_err(&pdev->dev, "failed to load eeprom from mtd\n"); ++ return -ENODEV; ++ } ++ ++ if (of_find_property(np, "ath,eep-swap", NULL)) ++ for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++) ++ ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]); ++ ++ if (!is_valid_ether_addr(athxk_eeprom_mac) && ltq_get_eth_mac()) ++ ether_addr_copy(athxk_eeprom_mac, ltq_get_eth_mac()); ++ ++ if (!is_valid_ether_addr(athxk_eeprom_mac)) { ++ dev_warn(&pdev->dev, "using random mac\n"); ++ random_ether_addr(athxk_eeprom_mac); ++ } ++ ++ if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc)) ++ athxk_eeprom_mac[5] += mac_inc; ++ ++ ath5k_pdata.macaddr = athxk_eeprom_mac; ++ ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init; ++ ++ dev_info(&pdev->dev, "loaded ath5k eeprom\n"); ++ ++ return 0; ++} ++ ++static struct of_device_id ath5k_eeprom_ids[] = { ++ { .compatible = "ath5k,eeprom" }, ++ { } ++}; ++ ++static struct platform_driver ath5k_eeprom_driver = { ++ .driver = { ++ .name = "ath5k,eeprom", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(ath5k_eeprom_ids), ++ }, ++}; ++ ++static int __init of_ath5k_eeprom_init(void) ++{ ++ int ret = platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe); ++ ++ if (ret) ++ ath5k_eep_load = 1; ++ ++ return ret; ++} ++ ++static int __init of_ath5k_eeprom_init_late(void) ++{ ++ if (!ath5k_eep_load) ++ return 0; ++ ++ return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe); ++} ++late_initcall(of_ath5k_eeprom_init_late); ++subsys_initcall(of_ath5k_eeprom_init); +--- /dev/null ++++ b/arch/mips/lantiq/xway/eth_mac.c +@@ -0,0 +1,25 @@ ++/* ++ * Copyright (C) 2012 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++ ++static u8 eth_mac[6]; ++static int eth_mac_set; ++ ++const u8* ltq_get_eth_mac(void) ++{ ++ return eth_mac; ++} ++ ++static int __init setup_ethaddr(char *str) ++{ ++ eth_mac_set = mac_pton(str, eth_mac); ++ return !eth_mac_set; ++} ++early_param("ethaddr", setup_ethaddr); +--- a/drivers/net/ethernet/lantiq_etop.c ++++ b/drivers/net/ethernet/lantiq_etop.c +@@ -783,7 +783,11 @@ ltq_etop_init(struct net_device *dev) + if (err) + goto err_hw; + +- memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr)); ++ memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN); ++ ++ if (priv->mac && !is_valid_ether_addr(mac.sa_data)) ++ memcpy(&mac.sa_data, priv->mac, ETH_ALEN); ++ + if (!is_valid_ether_addr(mac.sa_data)) { + pr_warn("etop: invalid MAC, using random\n"); + eth_random_addr(mac.sa_data); diff --git a/target/linux/lantiq/patches-4.14/0042-arch-mips-increase-io_space_limit.patch b/target/linux/lantiq/patches-4.14/0042-arch-mips-increase-io_space_limit.patch new file mode 100644 index 000000000..14b417e69 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0042-arch-mips-increase-io_space_limit.patch @@ -0,0 +1,23 @@ +From 9807eb80a1b3bad7a4a89aa6566497bb1cadd6ef Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Fri, 3 Jun 2016 13:12:20 +0200 +Subject: [PATCH] arch: mips: increase io_space_limit + +this value comes from x86 and breaks some pci devices + +Signed-off-by: John Crispin +--- + arch/mips/include/asm/io.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/include/asm/io.h ++++ b/arch/mips/include/asm/io.h +@@ -50,7 +50,7 @@ + + /* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */ + +-#define IO_SPACE_LIMIT 0xffff ++#define IO_SPACE_LIMIT 0xffffffff + + /* + * On MIPS I/O ports are memory mapped, so we access them using normal diff --git a/target/linux/lantiq/patches-4.14/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch b/target/linux/lantiq/patches-4.14/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch new file mode 100644 index 000000000..37894244e --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0050-USB-DWC2-make-the-lantiq-settings-match-vendor-drive.patch @@ -0,0 +1,78 @@ +From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Fri, 6 Jan 2017 17:55:24 +0100 +Subject: [PATCH 2/2] usb: dwc2: add support for other Lantiq SoCs + +The size of the internal RAM of the DesignWare USB controller changed +between the different Lantiq SoCs. We have the following sizes: + +Amazon + Danube: 8 KByte +Amazon SE + arx100: 2 KByte +xrx200 + xrx300: 2.5 KByte + +For Danube SoC we do not provide the params and let the driver decide +to use sane defaults, for the Amazon SE and arx100 we use small fifos +and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo. +The auto detection of max_transfer_size and max_packet_count should +work, so remove it. + +Signed-off-by: Hauke Mehrtens +--- + drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++------- + 1 file changed, 39 insertions(+), 7 deletions(-) + +--- a/drivers/usb/dwc2/params.c ++++ b/drivers/usb/dwc2/params.c +@@ -83,7 +83,14 @@ static void dwc2_set_rk_params(struct dw + GAHBCFG_HBSTLEN_SHIFT; + } + +-static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg) ++static void dwc2_set_ltq_danube_params(struct dwc2_hsotg *hsotg) ++{ ++ struct dwc2_core_params *p = &hsotg->params; ++ ++ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; ++} ++ ++static void dwc2_set_ltq_ase_params(struct dwc2_hsotg *hsotg) + { + struct dwc2_core_params *p = &hsotg->params; + +@@ -91,12 +98,20 @@ static void dwc2_set_ltq_params(struct d + p->host_rx_fifo_size = 288; + p->host_nperio_tx_fifo_size = 128; + p->host_perio_tx_fifo_size = 96; +- p->max_transfer_size = 65535; +- p->max_packet_count = 511; + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << + GAHBCFG_HBSTLEN_SHIFT; + } + ++static void dwc2_set_ltq_xrx200_params(struct dwc2_hsotg *hsotg) ++{ ++ struct dwc2_core_params *p = &hsotg->params; ++ ++ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE; ++ p->host_rx_fifo_size = 288; ++ p->host_nperio_tx_fifo_size = 128; ++ p->host_perio_tx_fifo_size = 136; ++} ++ + static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg) + { + struct dwc2_core_params *p = &hsotg->params; +@@ -140,8 +155,11 @@ const struct of_device_id dwc2_of_match_ + { .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params }, + { .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params }, + { .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params }, +- { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params }, +- { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params }, ++ { .compatible = "lantiq,danube-usb", .data = &dwc2_set_ltq_danube_params }, ++ { .compatible = "lantiq,ase-usb", .data = &dwc2_set_ltq_ase_params }, ++ { .compatible = "lantiq,arx100-usb", .data = &dwc2_set_ltq_ase_params }, ++ { .compatible = "lantiq,xrx200-usb", .data = &dwc2_set_ltq_xrx200_params }, ++ { .compatible = "lantiq,xrx300-usb", .data = &dwc2_set_ltq_xrx200_params }, + { .compatible = "snps,dwc2" }, + { .compatible = "samsung,s3c6400-hsotg" }, + { .compatible = "amlogic,meson8-usb", diff --git a/target/linux/lantiq/patches-4.14/0051-MIPS-lantiq-improve-USB-initialization.patch b/target/linux/lantiq/patches-4.14/0051-MIPS-lantiq-improve-USB-initialization.patch new file mode 100644 index 000000000..5030bbf3d --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0051-MIPS-lantiq-improve-USB-initialization.patch @@ -0,0 +1,49 @@ +From 14909c4e4e836925668e74fc6e0e85ba0283cbf9 Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Fri, 6 Jan 2017 17:40:12 +0100 +Subject: [PATCH 2/2] MIPS: lantiq: improve USB initialization + +This adds code to initialize the USB controller and PHY also on Danube, +Amazon SE and AR10. This code is based on the Vendor driver from +different UGW versions and compared to the hardware documentation. + +Signed-off-by: Hauke Mehrtens +--- + arch/mips/lantiq/xway/sysctrl.c | 20 +++++++ + 2 files changed, 110 insertions(+), 30 deletions(-) + + +--- a/arch/mips/lantiq/xway/sysctrl.c ++++ b/arch/mips/lantiq/xway/sysctrl.c +@@ -246,6 +246,25 @@ static void pmu_disable(struct clk *clk) + pr_warn("deactivating PMU module failed!"); + } + ++static void usb_set_clock(void) ++{ ++ unsigned int val = ltq_cgu_r32(ifccr); ++ ++ if (of_machine_is_compatible("lantiq,ar10") || ++ of_machine_is_compatible("lantiq,grx390")) { ++ val &= ~0x03; /* XTAL divided by 3 */ ++ } else if (of_machine_is_compatible("lantiq,ar9") || ++ of_machine_is_compatible("lantiq,vr9")) { ++ /* TODO: this depends on the XTAL frequency */ ++ val |= 0x03; /* XTAL divided by 3 */ ++ } else if (of_machine_is_compatible("lantiq,ase")) { ++ val |= 0x20; /* from XTAL */ ++ } else if (of_machine_is_compatible("lantiq,danube")) { ++ val |= 0x30; /* 12 MHz, generated from 36 MHz */ ++ } ++ ltq_cgu_w32(val, ifccr); ++} ++ + /* the pci enable helper */ + static int pci_enable(struct clk *clk) + { +@@ -569,4 +588,5 @@ void __init ltq_soc_init(void) + clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); + clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0); + } ++ usb_set_clock(); + } diff --git a/target/linux/lantiq/patches-4.14/0101-find_active_root.patch b/target/linux/lantiq/patches-4.14/0101-find_active_root.patch new file mode 100644 index 000000000..73361c87f --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0101-find_active_root.patch @@ -0,0 +1,93 @@ +--- a/drivers/mtd/ofpart.c ++++ b/drivers/mtd/ofpart.c +@@ -25,6 +25,38 @@ static bool node_has_compatible(struct d + return of_get_property(pp, "compatible", NULL); + } + ++static uint8_t * brnboot_get_selected_root_part(struct mtd_info *master, ++ loff_t offset) ++{ ++ static uint8_t root_id; ++ int err, len; ++ ++ err = mtd_read(master, offset, 0x01, &len, &root_id); ++ ++ if (mtd_is_bitflip(err) || !err) ++ return &root_id; ++ ++ return NULL; ++} ++ ++static void brnboot_set_active_root_part(struct mtd_partition *pparts, ++ struct device_node **part_nodes, ++ int nr_parts, ++ uint8_t *root_id) ++{ ++ int i; ++ ++ for (i = 0; i < nr_parts; i++) { ++ int part_root_id; ++ ++ if (!of_property_read_u32(part_nodes[i], "brnboot,root-id", &part_root_id) ++ && part_root_id == *root_id) { ++ pparts[i].name = "firmware"; ++ break; ++ } ++ } ++} ++ + static int parse_fixed_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +@@ -36,7 +68,8 @@ static int parse_fixed_partitions(struct + struct device_node *pp; + int nr_parts, i, ret = 0; + bool dedicated = true; +- ++ uint8_t *proot_id = NULL; ++ struct device_node **part_nodes; + + /* Pull of_node from the master device node */ + mtd_node = mtd_get_of_node(master); +@@ -72,7 +105,9 @@ static int parse_fixed_partitions(struct + return 0; + + parts = kzalloc(nr_parts * sizeof(*parts), GFP_KERNEL); +- if (!parts) ++ part_nodes = kzalloc(nr_parts * sizeof(*part_nodes), GFP_KERNEL); ++ ++ if (!parts || !part_nodes) + return -ENOMEM; + + i = 0; +@@ -121,12 +156,22 @@ static int parse_fixed_partitions(struct + if (of_get_property(pp, "lock", &len)) + parts[i].mask_flags |= MTD_POWERUP_LOCK; + ++ if (!proot_id && of_device_is_compatible(pp, "brnboot,root-selector")) ++ proot_id = brnboot_get_selected_root_part(master, parts[i].offset); ++ ++ part_nodes[i] = pp; ++ + i++; + } + + if (!nr_parts) + goto ofpart_none; + ++ if (proot_id) ++ brnboot_set_active_root_part(parts, part_nodes, nr_parts, proot_id); ++ ++ kfree(part_nodes); ++ + *pparts = parts; + return nr_parts; + +@@ -137,6 +182,7 @@ ofpart_fail: + ofpart_none: + of_node_put(pp); + kfree(parts); ++ kfree(part_nodes); + return ret; + } + diff --git a/target/linux/lantiq/patches-4.14/0151-lantiq-ifxmips_pcie-use-of.patch b/target/linux/lantiq/patches-4.14/0151-lantiq-ifxmips_pcie-use-of.patch new file mode 100644 index 000000000..03d43c241 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0151-lantiq-ifxmips_pcie-use-of.patch @@ -0,0 +1,166 @@ +--- a/arch/mips/pci/ifxmips_pcie.c ++++ b/arch/mips/pci/ifxmips_pcie.c +@@ -18,6 +18,9 @@ + #include + #include + ++#include ++#include ++ + #include "ifxmips_pcie.h" + #include "ifxmips_pcie_reg.h" + +@@ -40,6 +43,7 @@ + static DEFINE_SPINLOCK(ifx_pcie_lock); + + u32 g_pcie_debug_flag = PCIE_MSG_ANY & (~PCIE_MSG_CFG); ++static int pcie_reset_gpio; + + static ifx_pcie_irq_t pcie_irqs[IFX_PCIE_CORE_NR] = { + { +@@ -82,6 +86,22 @@ void ifx_pcie_debug(const char *fmt, ... + printk("%s", buf); + } + ++static inline void pcie_ep_gpio_rst_init(int pcie_port) ++{ ++ gpio_direction_output(pcie_reset_gpio, 1); ++ gpio_set_value(pcie_reset_gpio, 1); ++} ++ ++static inline void pcie_device_rst_assert(int pcie_port) ++{ ++ gpio_set_value(pcie_reset_gpio, 0); ++} ++ ++static inline void pcie_device_rst_deassert(int pcie_port) ++{ ++ mdelay(100); ++ gpio_direction_output(pcie_reset_gpio, 1); ++} + + static inline int pcie_ltssm_enable(int pcie_port) + { +@@ -1045,8 +1065,9 @@ pcie_rc_initialize(int pcie_port) + return 0; + } + +-static int __init ifx_pcie_bios_init(void) ++static int ifx_pcie_bios_probe(struct platform_device *pdev) + { ++ struct device_node *node = pdev->dev.of_node; + void __iomem *io_map_base; + int pcie_port; + int startup_port; +@@ -1055,7 +1076,17 @@ static int __init ifx_pcie_bios_init(voi + pcie_ahb_pmu_setup(); + + startup_port = IFX_PCIE_PORT0; +- ++ ++ pcie_reset_gpio = of_get_named_gpio(node, "gpio-reset", 0); ++ if (gpio_is_valid(pcie_reset_gpio)) { ++ int ret = devm_gpio_request(&pdev->dev, pcie_reset_gpio, "pcie-reset"); ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request gpio %d\n", pcie_reset_gpio); ++ return ret; ++ } ++ gpio_direction_output(pcie_reset_gpio, 1); ++ } ++ + for (pcie_port = startup_port; pcie_port < IFX_PCIE_CORE_NR; pcie_port++){ + if (pcie_rc_initialize(pcie_port) == 0) { + IFX_PCIE_PRINT(PCIE_MSG_INIT, "%s: ifx_pcie_cfg_base 0x%p\n", +@@ -1067,6 +1098,7 @@ static int __init ifx_pcie_bios_init(voi + return -ENOMEM; + } + ifx_pcie_controller[pcie_port].pcic.io_map_base = (unsigned long)io_map_base; ++ pci_load_of_ranges(&ifx_pcie_controller[pcie_port].pcic, node); + + register_pci_controller(&ifx_pcie_controller[pcie_port].pcic); + /* XXX, clear error status */ +@@ -1083,6 +1115,30 @@ static int __init ifx_pcie_bios_init(voi + + return 0; + } ++ ++static const struct of_device_id ifxmips_pcie_match[] = { ++ { .compatible = "lantiq,pcie-xrx200" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, ifxmips_pcie_match); ++ ++static struct platform_driver ltq_pci_driver = { ++ .probe = ifx_pcie_bios_probe, ++ .driver = { ++ .name = "pcie-xrx200", ++ .owner = THIS_MODULE, ++ .of_match_table = ifxmips_pcie_match, ++ }, ++}; ++ ++int __init ifx_pcie_bios_init(void) ++{ ++ int ret = platform_driver_register(<q_pci_driver); ++ if (ret) ++ pr_info("pcie-xrx200: Error registering platform driver!"); ++ return ret; ++} ++ + arch_initcall(ifx_pcie_bios_init); + + MODULE_LICENSE("GPL"); +--- a/arch/mips/pci/ifxmips_pcie_vr9.h ++++ b/arch/mips/pci/ifxmips_pcie_vr9.h +@@ -22,8 +22,6 @@ + #include + #include + +-#define IFX_PCIE_GPIO_RESET 494 +- + #define IFX_REG_R32 ltq_r32 + #define IFX_REG_W32 ltq_w32 + #define CONFIG_IFX_PCIE_HW_SWAP +@@ -53,21 +51,6 @@ + #define OUT ((volatile u32*)(IFX_GPIO + 0x0070)) + + +-static inline void pcie_ep_gpio_rst_init(int pcie_port) +-{ +- +- gpio_request(IFX_PCIE_GPIO_RESET, "pcie-reset"); +- gpio_direction_output(IFX_PCIE_GPIO_RESET, 1); +- gpio_set_value(IFX_PCIE_GPIO_RESET, 1); +- +-/* ifx_gpio_pin_reserve(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); +- ifx_gpio_output_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); +- ifx_gpio_dir_out_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); +- ifx_gpio_altsel0_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); +- ifx_gpio_altsel1_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); +- ifx_gpio_open_drain_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id);*/ +-} +- + static inline void pcie_ahb_pmu_setup(void) + { + /* Enable AHB bus master/slave */ +@@ -180,20 +163,6 @@ static inline void pcie_phy_rst_deassert + IFX_REG_W32(reg, IFX_RCU_RST_REQ); + } + +-static inline void pcie_device_rst_assert(int pcie_port) +-{ +- gpio_set_value(IFX_PCIE_GPIO_RESET, 0); +-// ifx_gpio_output_clear(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); +-} +- +-static inline void pcie_device_rst_deassert(int pcie_port) +-{ +- mdelay(100); +- gpio_direction_output(IFX_PCIE_GPIO_RESET, 1); +-// gpio_set_value(IFX_PCIE_GPIO_RESET, 1); +- //ifx_gpio_output_set(IFX_PCIE_GPIO_RESET, ifx_pcie_gpio_module_id); +-} +- + static inline void pcie_core_pmu_setup(int pcie_port) + { + struct clk *clk; diff --git a/target/linux/lantiq/patches-4.14/0152-lantiq-VPE.patch b/target/linux/lantiq/patches-4.14/0152-lantiq-VPE.patch new file mode 100644 index 000000000..c0639e137 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0152-lantiq-VPE.patch @@ -0,0 +1,180 @@ +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -2323,6 +2323,12 @@ config MIPS_VPE_LOADER + Includes a loader for loading an elf relocatable object + onto another VPE and running it. + ++config IFX_VPE_EXT ++ bool "IFX APRP Extensions" ++ depends on MIPS_VPE_LOADER ++ help ++ IFX included extensions in APRP ++ + config MIPS_VPE_LOADER_CMP + bool + default "y" +--- a/arch/mips/include/asm/vpe.h ++++ b/arch/mips/include/asm/vpe.h +@@ -127,4 +127,13 @@ void cleanup_tc(struct tc *tc); + + int __init vpe_module_init(void); + void __exit vpe_module_exit(void); ++ ++/* For the explanation of the APIs please refer the section "MT APRP Kernel ++ * Programming" in AR9 SW Architecture Specification ++ */ ++int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags); ++int32_t vpe1_sw_stop(uint32_t flags); ++uint32_t vpe1_get_load_addr(uint32_t flags); ++uint32_t vpe1_get_max_mem(uint32_t flags); ++ + #endif /* _ASM_VPE_H */ +--- a/arch/mips/kernel/vpe-mt.c ++++ b/arch/mips/kernel/vpe-mt.c +@@ -29,6 +29,7 @@ int vpe_run(struct vpe *v) + struct vpe_notifications *notifier; + unsigned int vpeflags; + struct tc *t; ++ unsigned long physical_memsize = 0L; + + /* check we are the Master VPE */ + local_irq_save(flags); +@@ -417,6 +418,8 @@ int __init vpe_module_init(void) + } + + v->ntcs = hw_tcs - aprp_cpu_index(); ++ write_tc_c0_tcbind((read_tc_c0_tcbind() & ++ ~TCBIND_CURVPE) | 1); + + /* add the tc to the list of this vpe's tc's. */ + list_add(&t->tc, &v->tc); +@@ -519,3 +522,47 @@ void __exit vpe_module_exit(void) + release_vpe(v); + } + } ++ ++#ifdef CONFIG_IFX_VPE_EXT ++int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags) ++{ ++ enum vpe_state state; ++ struct vpe *v = get_vpe(tclimit); ++ struct vpe_notifications *not; ++ ++ if (tcmask || flags) { ++ pr_warn("Currently tcmask and flags should be 0. Other values are not supported\n"); ++ return -1; ++ } ++ ++ state = xchg(&v->state, VPE_STATE_INUSE); ++ if (state != VPE_STATE_UNUSED) { ++ vpe_stop(v); ++ ++ list_for_each_entry(not, &v->notify, list) { ++ not->stop(tclimit); ++ } ++ } ++ ++ v->__start = (unsigned long)sw_start_addr; ++ ++ if (!vpe_run(v)) { ++ pr_debug("VPE loader: VPE1 running successfully\n"); ++ return 0; ++ } ++ return -1; ++} ++EXPORT_SYMBOL(vpe1_sw_start); ++ ++int32_t vpe1_sw_stop(uint32_t flags) ++{ ++ struct vpe *v = get_vpe(tclimit); ++ ++ if (!vpe_free(v)) { ++ pr_debug("RP Stopped\n"); ++ return 0; ++ } else ++ return -1; ++} ++EXPORT_SYMBOL(vpe1_sw_stop); ++#endif +--- a/arch/mips/kernel/vpe.c ++++ b/arch/mips/kernel/vpe.c +@@ -49,6 +49,41 @@ struct vpe_control vpecontrol = { + .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list) + }; + ++#ifdef CONFIG_IFX_VPE_EXT ++unsigned int vpe1_load_addr; ++ ++static int __init load_address(char *str) ++{ ++ get_option(&str, &vpe1_load_addr); ++ return 1; ++} ++__setup("vpe1_load_addr=", load_address); ++ ++static unsigned int vpe1_mem; ++static int __init vpe1mem(char *str) ++{ ++ vpe1_mem = memparse(str, &str); ++ return 1; ++} ++__setup("vpe1_mem=", vpe1mem); ++ ++uint32_t vpe1_get_load_addr(uint32_t flags) ++{ ++ return vpe1_load_addr; ++} ++EXPORT_SYMBOL(vpe1_get_load_addr); ++ ++uint32_t vpe1_get_max_mem(uint32_t flags) ++{ ++ if (!vpe1_mem) ++ return P_SIZE; ++ else ++ return vpe1_mem; ++} ++EXPORT_SYMBOL(vpe1_get_max_mem); ++ ++#endif ++ + /* get the vpe associated with this minor */ + struct vpe *get_vpe(int minor) + { +--- a/arch/mips/lantiq/prom.c ++++ b/arch/mips/lantiq/prom.c +@@ -37,10 +37,14 @@ unsigned long physical_memsize = 0L; + */ + static struct ltq_soc_info soc_info; + ++/* for Multithreading (APRP), vpe.c will use it */ ++unsigned long cp0_memsize; ++ + const char *get_system_type(void) + { + return soc_info.sys_type; + } ++EXPORT_SYMBOL(ltq_soc_type); + + int ltq_soc_type(void) + { +--- a/arch/mips/include/asm/mipsmtregs.h ++++ b/arch/mips/include/asm/mipsmtregs.h +@@ -32,6 +32,9 @@ + #define read_c0_vpeconf1() __read_32bit_c0_register($1, 3) + #define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val) + ++#define read_c0_vpeopt() __read_32bit_c0_register($1, 7) ++#define write_c0_vpeopt(val) __write_32bit_c0_register($1, 7, val) ++ + #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) + #define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val) + +@@ -377,6 +380,8 @@ do { \ + #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) + #define read_vpe_c0_vpeconf1() mftc0(1, 3) + #define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val) ++#define read_vpe_c0_vpeopt() mftc0(1, 7) ++#define write_vpe_c0_vpeopt(val) mttc0(1, 7, val) + #define read_vpe_c0_count() mftc0(9, 0) + #define write_vpe_c0_count(val) mttc0(9, 0, val) + #define read_vpe_c0_status() mftc0(12, 0) diff --git a/target/linux/lantiq/patches-4.14/0154-lantiq-pci-bar11mask-fix.patch b/target/linux/lantiq/patches-4.14/0154-lantiq-pci-bar11mask-fix.patch new file mode 100644 index 000000000..d0acd4bb1 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0154-lantiq-pci-bar11mask-fix.patch @@ -0,0 +1,22 @@ +--- a/arch/mips/pci/pci-lantiq.c ++++ b/arch/mips/pci/pci-lantiq.c +@@ -61,6 +61,8 @@ + #define ltq_pci_cfg_w32(x, y) ltq_w32((x), ltq_pci_mapped_cfg + (y)) + #define ltq_pci_cfg_r32(x) ltq_r32(ltq_pci_mapped_cfg + (x)) + ++extern u32 max_low_pfn; ++ + __iomem void *ltq_pci_mapped_cfg; + static __iomem void *ltq_pci_membase; + +@@ -86,8 +88,8 @@ static inline u32 ltq_calc_bar11mask(voi + u32 mem, bar11mask; + + /* BAR11MASK value depends on available memory on system. */ +- mem = get_num_physpages() * PAGE_SIZE; +- bar11mask = (0x0ffffff0 & ~((1 << (fls(mem) - 1)) - 1)) | 8; ++ mem = max_low_pfn << PAGE_SHIFT; ++ bar11mask = ((-roundup_pow_of_two(mem)) & 0x0F000000) | 8; + + return bar11mask; + } diff --git a/target/linux/lantiq/patches-4.14/0155-lantiq-VPE-nosmp.patch b/target/linux/lantiq/patches-4.14/0155-lantiq-VPE-nosmp.patch new file mode 100644 index 000000000..898c2d482 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0155-lantiq-VPE-nosmp.patch @@ -0,0 +1,14 @@ +--- a/arch/mips/kernel/vpe-mt.c ++++ b/arch/mips/kernel/vpe-mt.c +@@ -132,7 +132,10 @@ int vpe_run(struct vpe *v) + * kernels need to turn it on, even if that wasn't the pre-dvpe() state. + */ + #ifdef CONFIG_SMP +- evpe(vpeflags); ++ if (!setup_max_cpus) /* nosmp is set */ ++ evpe(EVPE_ENABLE); ++ else ++ evpe(vpeflags); + #else + evpe(EVPE_ENABLE); + #endif diff --git a/target/linux/lantiq/patches-4.14/0160-owrt-lantiq-multiple-flash.patch b/target/linux/lantiq/patches-4.14/0160-owrt-lantiq-multiple-flash.patch new file mode 100644 index 000000000..304ff4bac --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0160-owrt-lantiq-multiple-flash.patch @@ -0,0 +1,220 @@ +--- a/drivers/mtd/maps/lantiq-flash.c ++++ b/drivers/mtd/maps/lantiq-flash.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -38,13 +39,16 @@ enum { + LTQ_NOR_NORMAL + }; + ++#define MAX_RESOURCES 4 ++ + struct ltq_mtd { +- struct resource *res; +- struct mtd_info *mtd; +- struct map_info *map; ++ struct mtd_info *mtd[MAX_RESOURCES]; ++ struct mtd_info *cmtd; ++ struct map_info map[MAX_RESOURCES]; + }; + + static const char ltq_map_name[] = "ltq_nor"; ++static const char * const ltq_probe_types[] = { "cmdlinepart", "ofpart", NULL }; + + static map_word + ltq_read16(struct map_info *map, unsigned long adr) +@@ -108,11 +112,43 @@ ltq_copy_to(struct map_info *map, unsign + } + + static int ++ltq_mtd_remove(struct platform_device *pdev) ++{ ++ struct ltq_mtd *ltq_mtd = platform_get_drvdata(pdev); ++ int i; ++ ++ if (ltq_mtd == NULL) ++ return 0; ++ ++ if (ltq_mtd->cmtd) { ++ mtd_device_unregister(ltq_mtd->cmtd); ++ if (ltq_mtd->cmtd != ltq_mtd->mtd[0]) ++ mtd_concat_destroy(ltq_mtd->cmtd); ++ } ++ ++ for (i = 0; i < MAX_RESOURCES; i++) { ++ if (ltq_mtd->mtd[i] != NULL) ++ map_destroy(ltq_mtd->mtd[i]); ++ } ++ ++ kfree(ltq_mtd); ++ ++ return 0; ++} ++ ++static int + ltq_mtd_probe(struct platform_device *pdev) + { + struct ltq_mtd *ltq_mtd; + struct cfi_private *cfi; +- int err; ++ int err = 0; ++ int i; ++ int devices_found = 0; ++ ++ static const char *rom_probe_types[] = { ++ "cfi_probe", "jedec_probe", NULL ++ }; ++ const char **type; + + ltq_mtd = devm_kzalloc(&pdev->dev, sizeof(struct ltq_mtd), GFP_KERNEL); + if (!ltq_mtd) +@@ -120,75 +156,89 @@ ltq_mtd_probe(struct platform_device *pd + + platform_set_drvdata(pdev, ltq_mtd); + +- ltq_mtd->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); +- if (!ltq_mtd->res) { +- dev_err(&pdev->dev, "failed to get memory resource\n"); +- return -ENOENT; ++ for (i = 0; i < pdev->num_resources; i++) { ++ printk(KERN_NOTICE "lantiq nor flash device: %.8llx at %.8llx\n", ++ (unsigned long long)resource_size(&pdev->resource[i]), ++ (unsigned long long)pdev->resource[i].start); ++ ++ if (!devm_request_mem_region(&pdev->dev, ++ pdev->resource[i].start, ++ resource_size(&pdev->resource[i]), ++ dev_name(&pdev->dev))) { ++ dev_err(&pdev->dev, "Could not reserve memory region\n"); ++ return -ENOMEM; ++ } ++ ++ ltq_mtd->map[i].name = ltq_map_name; ++ ltq_mtd->map[i].bankwidth = 2; ++ ltq_mtd->map[i].read = ltq_read16; ++ ltq_mtd->map[i].write = ltq_write16; ++ ltq_mtd->map[i].copy_from = ltq_copy_from; ++ ltq_mtd->map[i].copy_to = ltq_copy_to; ++ ++ if (of_find_property(pdev->dev.of_node, "lantiq,noxip", NULL)) ++ ltq_mtd->map[i].phys = NO_XIP; ++ else ++ ltq_mtd->map[i].phys = pdev->resource[i].start; ++ ltq_mtd->map[i].size = resource_size(&pdev->resource[i]); ++ ltq_mtd->map[i].virt = devm_ioremap(&pdev->dev, pdev->resource[i].start, ++ ltq_mtd->map[i].size); ++ if (IS_ERR(ltq_mtd->map[i].virt)) ++ return PTR_ERR(ltq_mtd->map[i].virt); ++ ++ if (ltq_mtd->map[i].virt == NULL) { ++ dev_err(&pdev->dev, "Failed to ioremap flash region\n"); ++ err = PTR_ERR(ltq_mtd->map[i].virt); ++ goto err_out; ++ } ++ ++ ltq_mtd->map[i].map_priv_1 = LTQ_NOR_PROBING; ++ for (type = rom_probe_types; !ltq_mtd->mtd[i] && *type; type++) ++ ltq_mtd->mtd[i] = do_map_probe(*type, <q_mtd->map[i]); ++ ltq_mtd->map[i].map_priv_1 = LTQ_NOR_NORMAL; ++ ++ if (!ltq_mtd->mtd[i]) { ++ dev_err(&pdev->dev, "probing failed\n"); ++ return -ENXIO; ++ } else { ++ devices_found++; ++ } ++ ++ ltq_mtd->mtd[i]->owner = THIS_MODULE; ++ ltq_mtd->mtd[i]->dev.parent = &pdev->dev; ++ ++ cfi = ltq_mtd->map[i].fldrv_priv; ++ cfi->addr_unlock1 ^= 1; ++ cfi->addr_unlock2 ^= 1; + } + +- ltq_mtd->map = devm_kzalloc(&pdev->dev, sizeof(struct map_info), +- GFP_KERNEL); +- if (!ltq_mtd->map) +- return -ENOMEM; +- +- if (of_find_property(pdev->dev.of_node, "lantiq,noxip", NULL)) +- ltq_mtd->map->phys = NO_XIP; +- else +- ltq_mtd->map->phys = ltq_mtd->res->start; +- ltq_mtd->res->start; +- ltq_mtd->map->size = resource_size(ltq_mtd->res); +- ltq_mtd->map->virt = devm_ioremap_resource(&pdev->dev, ltq_mtd->res); +- if (IS_ERR(ltq_mtd->map->virt)) +- return PTR_ERR(ltq_mtd->map->virt); +- +- ltq_mtd->map->name = ltq_map_name; +- ltq_mtd->map->bankwidth = 2; +- ltq_mtd->map->read = ltq_read16; +- ltq_mtd->map->write = ltq_write16; +- ltq_mtd->map->copy_from = ltq_copy_from; +- ltq_mtd->map->copy_to = ltq_copy_to; +- +- ltq_mtd->map->map_priv_1 = LTQ_NOR_PROBING; +- ltq_mtd->mtd = do_map_probe("cfi_probe", ltq_mtd->map); +- ltq_mtd->map->map_priv_1 = LTQ_NOR_NORMAL; +- +- if (!ltq_mtd->mtd) { +- dev_err(&pdev->dev, "probing failed\n"); +- return -ENXIO; ++ if (devices_found == 1) { ++ ltq_mtd->cmtd = ltq_mtd->mtd[0]; ++ } else if (devices_found > 1) { ++ /* ++ * We detected multiple devices. Concatenate them together. ++ */ ++ ltq_mtd->cmtd = mtd_concat_create(ltq_mtd->mtd, devices_found, dev_name(&pdev->dev)); ++ if (ltq_mtd->cmtd == NULL) ++ err = -ENXIO; + } + +- ltq_mtd->mtd->dev.parent = &pdev->dev; +- mtd_set_of_node(ltq_mtd->mtd, pdev->dev.of_node); +- +- cfi = ltq_mtd->map->fldrv_priv; +- cfi->addr_unlock1 ^= 1; +- cfi->addr_unlock2 ^= 1; ++ ltq_mtd->cmtd->dev.parent = &pdev->dev; ++ mtd_set_of_node(ltq_mtd->cmtd, pdev->dev.of_node); + +- err = mtd_device_register(ltq_mtd->mtd, NULL, 0); ++ err = mtd_device_register(ltq_mtd->cmtd, NULL, 0); + if (err) { + dev_err(&pdev->dev, "failed to add partitions\n"); +- goto err_destroy; ++ goto err_out; + } + + return 0; + +-err_destroy: +- map_destroy(ltq_mtd->mtd); ++err_out: ++ ltq_mtd_remove(pdev); + return err; + } + +-static int +-ltq_mtd_remove(struct platform_device *pdev) +-{ +- struct ltq_mtd *ltq_mtd = platform_get_drvdata(pdev); +- +- if (ltq_mtd && ltq_mtd->mtd) { +- mtd_device_unregister(ltq_mtd->mtd); +- map_destroy(ltq_mtd->mtd); +- } +- return 0; +-} +- + static const struct of_device_id ltq_mtd_match[] = { + { .compatible = "lantiq,nor" }, + {}, diff --git a/target/linux/lantiq/patches-4.14/0300-MTD-cfi-cmdset-0001-disable-buffered-writes.patch b/target/linux/lantiq/patches-4.14/0300-MTD-cfi-cmdset-0001-disable-buffered-writes.patch new file mode 100644 index 000000000..d153c521d --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0300-MTD-cfi-cmdset-0001-disable-buffered-writes.patch @@ -0,0 +1,11 @@ +--- a/drivers/mtd/chips/cfi_cmdset_0001.c ++++ b/drivers/mtd/chips/cfi_cmdset_0001.c +@@ -39,7 +39,7 @@ + /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */ + + // debugging, turns off buffer write mode if set to 1 +-#define FORCE_WORD_WRITE 0 ++#define FORCE_WORD_WRITE 1 + + /* Intel chips */ + #define I82802AB 0x00ad diff --git a/target/linux/lantiq/patches-4.14/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch b/target/linux/lantiq/patches-4.14/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch new file mode 100644 index 000000000..ae8efcfdc --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch @@ -0,0 +1,30 @@ +--- a/arch/mips/lantiq/xway/sysctrl.c ++++ b/arch/mips/lantiq/xway/sysctrl.c +@@ -424,6 +424,20 @@ static void clkdev_add_clkout(void) + } + } + ++static void set_phy_clock_source(struct device_node *np_cgu) ++{ ++ u32 phy_clk_src, ifcc; ++ ++ if (!np_cgu) ++ return; ++ ++ if (of_property_read_u32(np_cgu, "lantiq,phy-clk-src", &phy_clk_src)) ++ return; ++ ++ ifcc = ltq_cgu_r32(ifccr) & ~(0x1c); ++ ltq_cgu_w32(ifcc | (phy_clk_src << 2), ifccr); ++} ++ + /* bring up all register ranges that we need for basic system control */ + void __init ltq_soc_init(void) + { +@@ -589,4 +603,6 @@ void __init ltq_soc_init(void) + clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0); + } + usb_set_clock(); ++ ++ set_phy_clock_source(np_cgu); + } diff --git a/target/linux/lantiq/patches-4.14/0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch b/target/linux/lantiq/patches-4.14/0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch new file mode 100644 index 000000000..7c2deb190 --- /dev/null +++ b/target/linux/lantiq/patches-4.14/0400-Revert-MIPS-smp-mt-Use-CPU-interrupt-controller-IPI-.patch @@ -0,0 +1,271 @@ +From 8fe9821b478e5c61fef4786b7ec96b6766af196d Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Mon, 8 Jan 2018 23:04:57 +0100 +Subject: [PATCH] Revert "MIPS: smp-mt: Use CPU interrupt controller IPI IRQ + domain support" + +The problem is that the Lantiq IRQ controller gets registered first and +it directly handles the MIPS native SW1/2 and HW0 - HW5 IRQs. It looks +like this controller already registers IRQ 0 - 7 and the generic driver +only gets the following IRQs starting later. + +The upstream discussion can be found at https://www.linux-mips.org/archives/linux-mips/2017-05/msg00059.html + +This reverts kernel commit 1eed40043579 ("MIPS: smp-mt: Use CPU interrupt +controller IPI IRQ domain support"). + +Signed-off-by: Mathias Kresin + +--- + arch/mips/kernel/smp-mt.c | 49 ++++++++++++++++++++++-- + arch/mips/lantiq/irq.c | 52 ++++++++++++++++++++++++++ + arch/mips/mti-malta/malta-int.c | 83 +++++++++++++++++++++++++++++++++++++++-- + 3 files changed, 176 insertions(+), 8 deletions(-) + +--- a/arch/mips/kernel/smp-mt.c ++++ b/arch/mips/kernel/smp-mt.c +@@ -83,8 +83,6 @@ static unsigned int __init smvp_vpe_init + if (tc != 0) + smvp_copy_vpe_config(); + +- cpu_set_vpe_id(&cpu_data[ncpu], tc); +- + return ncpu; + } + +@@ -116,6 +114,49 @@ static void __init smvp_tc_init(unsigned + write_tc_c0_tchalt(TCHALT_H); + } + ++static void vsmp_send_ipi_single(int cpu, unsigned int action) ++{ ++ int i; ++ unsigned long flags; ++ int vpflags; ++ ++#ifdef CONFIG_MIPS_GIC ++ if (gic_present) { ++ mips_smp_send_ipi_single(cpu, action); ++ return; ++ } ++#endif ++ local_irq_save(flags); ++ ++ vpflags = dvpe(); /* can't access the other CPU's registers whilst MVPE enabled */ ++ ++ switch (action) { ++ case SMP_CALL_FUNCTION: ++ i = C_SW1; ++ break; ++ ++ case SMP_RESCHEDULE_YOURSELF: ++ default: ++ i = C_SW0; ++ break; ++ } ++ ++ /* 1:1 mapping of vpe and tc... */ ++ settc(cpu); ++ write_vpe_c0_cause(read_vpe_c0_cause() | i); ++ evpe(vpflags); ++ ++ local_irq_restore(flags); ++} ++ ++static void vsmp_send_ipi_mask(const struct cpumask *mask, unsigned int action) ++{ ++ unsigned int i; ++ ++ for_each_cpu(i, mask) ++ vsmp_send_ipi_single(i, action); ++} ++ + static void vsmp_init_secondary(void) + { + /* This is Malta specific: IPI,performance and timer interrupts */ +@@ -240,8 +281,8 @@ static void __init vsmp_prepare_cpus(uns + } + + const struct plat_smp_ops vsmp_smp_ops = { +- .send_ipi_single = mips_smp_send_ipi_single, +- .send_ipi_mask = mips_smp_send_ipi_mask, ++ .send_ipi_single = vsmp_send_ipi_single, ++ .send_ipi_mask = vsmp_send_ipi_mask, + .init_secondary = vsmp_init_secondary, + .smp_finish = vsmp_smp_finish, + .boot_secondary = vsmp_boot_secondary, +--- a/arch/mips/lantiq/irq.c ++++ b/arch/mips/lantiq/irq.c +@@ -272,6 +272,47 @@ static void ltq_hw_irq_handler(struct ir + ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2); + } + ++#ifdef CONFIG_MIPS_MT_SMP ++void __init arch_init_ipiirq(int irq, struct irqaction *action) ++{ ++ setup_irq(irq, action); ++ irq_set_handler(irq, handle_percpu_irq); ++} ++ ++static void ltq_sw0_irqdispatch(void) ++{ ++ do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ); ++} ++ ++static void ltq_sw1_irqdispatch(void) ++{ ++ do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ); ++} ++static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) ++{ ++ scheduler_ipi(); ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) ++{ ++ generic_smp_call_function_interrupt(); ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction irq_resched = { ++ .handler = ipi_resched_interrupt, ++ .flags = IRQF_PERCPU, ++ .name = "IPI_resched" ++}; ++ ++static struct irqaction irq_call = { ++ .handler = ipi_call_interrupt, ++ .flags = IRQF_PERCPU, ++ .name = "IPI_call" ++}; ++#endif ++ + asmlinkage void plat_irq_dispatch(void) + { + unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; +@@ -359,6 +400,17 @@ int __init icu_of_init(struct device_nod + (MAX_IM * INT_NUM_IM_OFFSET) + MIPS_CPU_IRQ_CASCADE, + &irq_domain_ops, 0); + ++#if defined(CONFIG_MIPS_MT_SMP) ++ if (cpu_has_vint) { ++ pr_info("Setting up IPI vectored interrupts\n"); ++ set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ltq_sw0_irqdispatch); ++ set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ltq_sw1_irqdispatch); ++ } ++ arch_init_ipiirq(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ, ++ &irq_resched); ++ arch_init_ipiirq(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ, &irq_call); ++#endif ++ + #ifndef CONFIG_MIPS_MT_SMP + set_c0_status(IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | + IE_IRQ3 | IE_IRQ4 | IE_IRQ5); +--- a/arch/mips/mti-malta/malta-int.c ++++ b/arch/mips/mti-malta/malta-int.c +@@ -144,6 +144,56 @@ static irqreturn_t corehi_handler(int ir + return IRQ_HANDLED; + } + ++#ifdef CONFIG_MIPS_MT_SMP ++ ++#define MIPS_CPU_IPI_RESCHED_IRQ 0 /* SW int 0 for resched */ ++#define C_RESCHED C_SW0 ++#define MIPS_CPU_IPI_CALL_IRQ 1 /* SW int 1 for resched */ ++#define C_CALL C_SW1 ++static int cpu_ipi_resched_irq, cpu_ipi_call_irq; ++ ++static void ipi_resched_dispatch(void) ++{ ++ do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ); ++} ++ ++static void ipi_call_dispatch(void) ++{ ++ do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ); ++} ++ ++static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) ++{ ++#ifdef CONFIG_MIPS_VPE_APSP_API_CMP ++ if (aprp_hook) ++ aprp_hook(); ++#endif ++ ++ scheduler_ipi(); ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) ++{ ++ generic_smp_call_function_interrupt(); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction irq_resched = { ++ .handler = ipi_resched_interrupt, ++ .flags = IRQF_PERCPU, ++ .name = "IPI_resched" ++}; ++ ++static struct irqaction irq_call = { ++ .handler = ipi_call_interrupt, ++ .flags = IRQF_PERCPU, ++ .name = "IPI_call" ++}; ++#endif /* CONFIG_MIPS_MT_SMP */ ++ + static struct irqaction corehi_irqaction = { + .handler = corehi_handler, + .name = "CoreHi", +@@ -171,6 +221,12 @@ static msc_irqmap_t msc_eicirqmap[] __in + + static int msc_nr_eicirqs __initdata = ARRAY_SIZE(msc_eicirqmap); + ++void __init arch_init_ipiirq(int irq, struct irqaction *action) ++{ ++ setup_irq(irq, action); ++ irq_set_handler(irq, handle_percpu_irq); ++} ++ + void __init arch_init_irq(void) + { + int corehi_irq; +@@ -216,11 +272,30 @@ void __init arch_init_irq(void) + + if (mips_gic_present()) { + corehi_irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_COREHI; +- } else if (cpu_has_veic) { +- set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch); +- corehi_irq = MSC01E_INT_BASE + MSC01E_INT_COREHI; + } else { +- corehi_irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_COREHI; ++#if defined(CONFIG_MIPS_MT_SMP) ++ /* set up ipi interrupts */ ++ if (cpu_has_veic) { ++ set_vi_handler (MSC01E_INT_SW0, ipi_resched_dispatch); ++ set_vi_handler (MSC01E_INT_SW1, ipi_call_dispatch); ++ cpu_ipi_resched_irq = MSC01E_INT_SW0; ++ cpu_ipi_call_irq = MSC01E_INT_SW1; ++ } else { ++ cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + ++ MIPS_CPU_IPI_RESCHED_IRQ; ++ cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + ++ MIPS_CPU_IPI_CALL_IRQ; ++ } ++ arch_init_ipiirq(cpu_ipi_resched_irq, &irq_resched); ++ arch_init_ipiirq(cpu_ipi_call_irq, &irq_call); ++#endif ++ if (cpu_has_veic) { ++ set_vi_handler(MSC01E_INT_COREHI, ++ corehi_irqdispatch); ++ corehi_irq = MSC01E_INT_BASE + MSC01E_INT_COREHI; ++ } else { ++ corehi_irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_COREHI; ++ } + } + + setup_irq(corehi_irq, &corehi_irqaction); diff --git a/target/linux/lantiq/patches-4.9/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch b/target/linux/lantiq/patches-4.9/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch index f08db6504..7617c14dd 100644 --- a/target/linux/lantiq/patches-4.9/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch +++ b/target/linux/lantiq/patches-4.9/0022-MTD-m25p80-allow-loading-mtd-name-from-OF.patch @@ -22,7 +22,7 @@ Signed-off-by: John Crispin #include #include -@@ -198,6 +199,10 @@ static int m25p_probe(struct spi_device +@@ -200,6 +201,10 @@ static int m25p_probe(struct spi_device enum read_mode mode = SPI_NOR_NORMAL; char *flash_name; int ret; @@ -33,7 +33,7 @@ Signed-off-by: John Crispin data = dev_get_platdata(&spi->dev); -@@ -227,6 +232,8 @@ static int m25p_probe(struct spi_device +@@ -229,6 +234,8 @@ static int m25p_probe(struct spi_device if (data && data->name) nor->mtd.name = data->name; diff --git a/target/linux/lantiq/patches-4.9/0024-NET-lantiq-adds-PHY11G-firmware-blobs.patch b/target/linux/lantiq/patches-4.9/0024-NET-lantiq-adds-PHY11G-firmware-blobs.patch index b69b2a900..e62ff2f69 100644 --- a/target/linux/lantiq/patches-4.9/0024-NET-lantiq-adds-PHY11G-firmware-blobs.patch +++ b/target/linux/lantiq/patches-4.9/0024-NET-lantiq-adds-PHY11G-firmware-blobs.patch @@ -18,10 +18,10 @@ Signed-off-by: John Crispin fw-shipped-$(CONFIG_USB_SERIAL_XIRCOM) += keyspan_pda/xircom_pgs.fw fw-shipped-$(CONFIG_USB_VICAM) += vicam/firmware.fw fw-shipped-$(CONFIG_VIDEO_CPIA2) += cpia2/stv0672_vp4.bin -+fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/vr9_phy11g_a1x.bin -+fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/vr9_phy11g_a2x.bin -+fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/vr9_phy22f_a1x.bin -+fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/vr9_phy22f_a2x.bin ++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy11g_a14.bin ++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy11g_a22.bin ++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy22f_a14.bin ++fw-shipped-$(CONFIG_LANTIQ_XRX200) += lantiq/xrx200_phy22f_a22.bin fw-shipped-$(CONFIG_YAM) += yam/1200.bin yam/9600.bin fw-shipped-all := $(fw-shipped-y) $(fw-shipped-m) $(fw-shipped-) @@ -356,9 +356,9 @@ Signed-off-by: John Crispin +# + +# GPHY core on Lantiq XWAY VR9 v1.1 -+lantiq/vr9_phy11g_a1x.bin -+lantiq/vr9_phy22f_a1x.bin ++lantiq/xrx200_phy11g_a14.bin ++lantiq/xrx200_phy22f_a14.bin + +# GPHY core on Lantiq XWAY VR9 v1.2 -+lantiq/vr9_phy11g_a2x.bin -+lantiq/vr9_phy22f_a2x.bin ++lantiq/xrx200_phy11g_a22.bin ++lantiq/xrx200_phy22f_a22.bin diff --git a/target/linux/lantiq/patches-4.9/0027-01-net-phy-intel-xway-add-VR9-version-number.patch b/target/linux/lantiq/patches-4.9/0027-01-net-phy-intel-xway-add-VR9-version-number.patch new file mode 100644 index 000000000..21261b459 --- /dev/null +++ b/target/linux/lantiq/patches-4.9/0027-01-net-phy-intel-xway-add-VR9-version-number.patch @@ -0,0 +1,62 @@ +From 5b73d9955fb4b0e3c37f8f6c71910293246c89dc Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Thu, 22 Mar 2018 23:31:38 +0100 +Subject: [PATCH 1/2] net: phy: intel-xway: add VR9 version number + +The VR9 phy ids are matching only for the SoC version 1.2. Rename the +macros and change the names to take this into account. + +Signed-off-by: Mathias Kresin +Signed-off-by: David S. Miller +--- + drivers/net/phy/intel-xway.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/net/phy/intel-xway.c ++++ b/drivers/net/phy/intel-xway.c +@@ -149,8 +149,8 @@ + #define PHY_ID_PHY22F_1_4 0xD565A410 + #define PHY_ID_PHY11G_1_5 0xD565A401 + #define PHY_ID_PHY22F_1_5 0xD565A411 +-#define PHY_ID_PHY11G_VR9 0xD565A409 +-#define PHY_ID_PHY22F_VR9 0xD565A419 ++#define PHY_ID_PHY11G_VR9_1_2 0xD565A409 ++#define PHY_ID_PHY22F_VR9_1_2 0xD565A419 + + #if IS_ENABLED(CONFIG_OF_MDIO) + static int vr9_gphy_of_reg_init(struct phy_device *phydev) +@@ -372,9 +372,9 @@ static struct phy_driver xway_gphy[] = { + .suspend = genphy_suspend, + .resume = genphy_resume, + }, { +- .phy_id = PHY_ID_PHY11G_VR9, ++ .phy_id = PHY_ID_PHY11G_VR9_1_2, + .phy_id_mask = 0xffffffff, +- .name = "Intel XWAY PHY11G (xRX integrated)", ++ .name = "Intel XWAY PHY11G (xRX v1.2 integrated)", + .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause | + SUPPORTED_Asym_Pause), + .flags = PHY_HAS_INTERRUPT, +@@ -387,9 +387,9 @@ static struct phy_driver xway_gphy[] = { + .suspend = genphy_suspend, + .resume = genphy_resume, + }, { +- .phy_id = PHY_ID_PHY22F_VR9, ++ .phy_id = PHY_ID_PHY22F_VR9_1_2, + .phy_id_mask = 0xffffffff, +- .name = "Intel XWAY PHY22F (xRX integrated)", ++ .name = "Intel XWAY PHY22F (xRX v1.2 integrated)", + .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | + SUPPORTED_Asym_Pause), + .flags = PHY_HAS_INTERRUPT, +@@ -412,8 +412,8 @@ static struct mdio_device_id __maybe_unu + { PHY_ID_PHY22F_1_4, 0xffffffff }, + { PHY_ID_PHY11G_1_5, 0xffffffff }, + { PHY_ID_PHY22F_1_5, 0xffffffff }, +- { PHY_ID_PHY11G_VR9, 0xffffffff }, +- { PHY_ID_PHY22F_VR9, 0xffffffff }, ++ { PHY_ID_PHY11G_VR9_1_2, 0xffffffff }, ++ { PHY_ID_PHY22F_VR9_1_2, 0xffffffff }, + { } + }; + MODULE_DEVICE_TABLE(mdio, xway_gphy_tbl); diff --git a/target/linux/lantiq/patches-4.9/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch b/target/linux/lantiq/patches-4.9/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch new file mode 100644 index 000000000..9a9253290 --- /dev/null +++ b/target/linux/lantiq/patches-4.9/0027-02-net-phy-intel-xway-add-VR9-v1.1-phy-ids.patch @@ -0,0 +1,71 @@ +From f452518c982e57538e6d49da0a2c80eef22087ab Mon Sep 17 00:00:00 2001 +From: Mathias Kresin +Date: Thu, 22 Mar 2018 23:31:39 +0100 +Subject: [PATCH 2/2] net: phy: intel-xway: add VR9 v1.1 phy ids + +The phys embedded into the v1.1 of the VR9 SoC are using different phy +ids. Add the phy ids to use the driver for this VR9 version as well. + +Signed-off-by: Mathias Kresin +Signed-off-by: David S. Miller +--- + drivers/net/phy/intel-xway.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/drivers/net/phy/intel-xway.c ++++ b/drivers/net/phy/intel-xway.c +@@ -149,6 +149,8 @@ + #define PHY_ID_PHY22F_1_4 0xD565A410 + #define PHY_ID_PHY11G_1_5 0xD565A401 + #define PHY_ID_PHY22F_1_5 0xD565A411 ++#define PHY_ID_PHY11G_VR9_1_1 0xD565A408 ++#define PHY_ID_PHY22F_VR9_1_1 0xD565A418 + #define PHY_ID_PHY11G_VR9_1_2 0xD565A409 + #define PHY_ID_PHY22F_VR9_1_2 0xD565A419 + +@@ -372,6 +374,36 @@ static struct phy_driver xway_gphy[] = { + .suspend = genphy_suspend, + .resume = genphy_resume, + }, { ++ .phy_id = PHY_ID_PHY11G_VR9_1_1, ++ .phy_id_mask = 0xffffffff, ++ .name = "Intel XWAY PHY11G (xRX v1.1 integrated)", ++ .features = (PHY_GBIT_FEATURES | SUPPORTED_Pause | ++ SUPPORTED_Asym_Pause), ++ .flags = PHY_HAS_INTERRUPT, ++ .config_init = xway_gphy_config_init, ++ .config_aneg = genphy_config_aneg, ++ .read_status = genphy_read_status, ++ .ack_interrupt = xway_gphy_ack_interrupt, ++ .did_interrupt = xway_gphy_did_interrupt, ++ .config_intr = xway_gphy_config_intr, ++ .suspend = genphy_suspend, ++ .resume = genphy_resume, ++ }, { ++ .phy_id = PHY_ID_PHY22F_VR9_1_1, ++ .phy_id_mask = 0xffffffff, ++ .name = "Intel XWAY PHY22F (xRX v1.1 integrated)", ++ .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause | ++ SUPPORTED_Asym_Pause), ++ .flags = PHY_HAS_INTERRUPT, ++ .config_init = xway_gphy_config_init, ++ .config_aneg = genphy_config_aneg, ++ .read_status = genphy_read_status, ++ .ack_interrupt = xway_gphy_ack_interrupt, ++ .did_interrupt = xway_gphy_did_interrupt, ++ .config_intr = xway_gphy_config_intr, ++ .suspend = genphy_suspend, ++ .resume = genphy_resume, ++ }, { + .phy_id = PHY_ID_PHY11G_VR9_1_2, + .phy_id_mask = 0xffffffff, + .name = "Intel XWAY PHY11G (xRX v1.2 integrated)", +@@ -412,6 +444,8 @@ static struct mdio_device_id __maybe_unu + { PHY_ID_PHY22F_1_4, 0xffffffff }, + { PHY_ID_PHY11G_1_5, 0xffffffff }, + { PHY_ID_PHY22F_1_5, 0xffffffff }, ++ { PHY_ID_PHY11G_VR9_1_1, 0xffffffff }, ++ { PHY_ID_PHY22F_VR9_1_1, 0xffffffff }, + { PHY_ID_PHY11G_VR9_1_2, 0xffffffff }, + { PHY_ID_PHY22F_VR9_1_2, 0xffffffff }, + { } diff --git a/target/linux/lantiq/patches-4.9/0090-spi-lantiq-ssc-add-support-for-Lantiq-SSC-SPI-contro.patch b/target/linux/lantiq/patches-4.9/0090-spi-lantiq-ssc-add-support-for-Lantiq-SSC-SPI-contro.patch index da48ae3a1..64597cec8 100644 --- a/target/linux/lantiq/patches-4.9/0090-spi-lantiq-ssc-add-support-for-Lantiq-SSC-SPI-contro.patch +++ b/target/linux/lantiq/patches-4.9/0090-spi-lantiq-ssc-add-support-for-Lantiq-SSC-SPI-contro.patch @@ -65,7 +65,7 @@ Signed-off-by: Mark Brown +}; --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig -@@ -403,6 +403,14 @@ config SPI_NUC900 +@@ -404,6 +404,14 @@ config SPI_NUC900 help SPI driver for Nuvoton NUC900 series ARM SoCs diff --git a/target/linux/lantiq/patches-4.9/0101-find_active_root.patch b/target/linux/lantiq/patches-4.9/0101-find_active_root.patch index 7232ffa41..73361c87f 100644 --- a/target/linux/lantiq/patches-4.9/0101-find_active_root.patch +++ b/target/linux/lantiq/patches-4.9/0101-find_active_root.patch @@ -36,10 +36,10 @@ + } +} + - static int parse_ofpart_partitions(struct mtd_info *master, - const struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -@@ -36,7 +68,8 @@ static int parse_ofpart_partitions(struc + static int parse_fixed_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +@@ -36,7 +68,8 @@ static int parse_fixed_partitions(struct struct device_node *pp; int nr_parts, i, ret = 0; bool dedicated = true; @@ -49,7 +49,7 @@ /* Pull of_node from the master device node */ mtd_node = mtd_get_of_node(master); -@@ -72,7 +105,9 @@ static int parse_ofpart_partitions(struc +@@ -72,7 +105,9 @@ static int parse_fixed_partitions(struct return 0; parts = kzalloc(nr_parts * sizeof(*parts), GFP_KERNEL); @@ -60,7 +60,7 @@ return -ENOMEM; i = 0; -@@ -121,12 +156,22 @@ static int parse_ofpart_partitions(struc +@@ -121,12 +156,22 @@ static int parse_fixed_partitions(struct if (of_get_property(pp, "lock", &len)) parts[i].mask_flags |= MTD_POWERUP_LOCK; diff --git a/target/linux/lantiq/xrx200/config-4.14 b/target/linux/lantiq/xrx200/config-4.14 new file mode 100644 index 000000000..7b15d4283 --- /dev/null +++ b/target/linux/lantiq/xrx200/config-4.14 @@ -0,0 +1,97 @@ +CONFIG_ADM6996_PHY=y +CONFIG_AR8216_PHY=y +CONFIG_AT803X_PHY=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CPU_MIPSR2_IRQ_EI=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_RMAP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL2=y +CONFIG_EXTRA_FIRMWARE="lantiq/xrx200_phy11g_a14.bin lantiq/xrx200_phy11g_a22.bin lantiq/xrx200_phy22f_a14.bin lantiq/xrx200_phy22f_a22.bin" +CONFIG_EXTRA_FIRMWARE_DIR="firmware" +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_HWMON=y +CONFIG_ICPLUS_PHY=y +CONFIG_IFX_VPE_EXT=y +CONFIG_INPUT=y +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_POLLDEV=y +CONFIG_INTEL_XWAY_PHY=y +# CONFIG_ISDN is not set +CONFIG_LANTIQ_XRX200=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MIPS_MT=y +# CONFIG_MIPS_MT_FPAFF is not set +CONFIG_MIPS_MT_SMP=y +CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y +CONFIG_MIPS_VPE_APSP_API=y +CONFIG_MIPS_VPE_APSP_API_MT=y +CONFIG_MIPS_VPE_LOADER=y +CONFIG_MIPS_VPE_LOADER_MT=y +CONFIG_MIPS_VPE_LOADER_TOM=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_PLATFORM=y +CONFIG_MTD_NAND_XWAY=y +# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NLS=y +CONFIG_NR_CPUS=2 +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_PADATA=y +CONFIG_PCI=y +CONFIG_PCIE_LANTIQ=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_LANTIQ=y +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_SUPPLY=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTL8306_PHY=y +CONFIG_RTL8366S_PHY=y +CONFIG_RTL8367B_PHY=y +CONFIG_RTL8367_PHY=y +CONFIG_SENSORS_LTQ_CPUTEMP=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SYNC_R4K=y +CONFIG_SYS_SUPPORTS_SCHED_SMT=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +# CONFIG_USB_EHCI_HCD is not set +CONFIG_USB_SUPPORT=y +CONFIG_XPS=y +CONFIG_XRX200_PHY_FW=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/lantiq/xrx200/config-default b/target/linux/lantiq/xrx200/config-4.9 similarity index 100% rename from target/linux/lantiq/xrx200/config-default rename to target/linux/lantiq/xrx200/config-4.9 diff --git a/target/linux/lantiq/xway/config-4.14 b/target/linux/lantiq/xway/config-4.14 new file mode 100644 index 000000000..5e18a4dee --- /dev/null +++ b/target/linux/lantiq/xway/config-4.14 @@ -0,0 +1,50 @@ +CONFIG_ADM6996_PHY=y +CONFIG_AR8216_PHY=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CRC16=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_FIRMWARE_IN_KERNEL=y +CONFIG_INPUT=y +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_ISDN is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_PLATFORM=y +CONFIG_MTD_NAND_XWAY=y +# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NLS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_PCI=y +# CONFIG_PCIE_LANTIQ is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_LANTIQ=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RTL8306_PHY=y +CONFIG_RTL8366S_PHY=y +CONFIG_RTL8367B_PHY=y +CONFIG_RTL8367_PHY=y +CONFIG_UBIFS_FS=y +CONFIG_UBIFS_FS_ADVANCED_COMPR=y +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +# CONFIG_USB_EHCI_HCD is not set +CONFIG_USB_SUPPORT=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/lantiq/xway/config-default b/target/linux/lantiq/xway/config-4.9 similarity index 100% rename from target/linux/lantiq/xway/config-default rename to target/linux/lantiq/xway/config-4.9 diff --git a/target/linux/lantiq/xway_legacy/config-4.14 b/target/linux/lantiq/xway_legacy/config-4.14 new file mode 100644 index 000000000..feb82c5fc --- /dev/null +++ b/target/linux/lantiq/xway_legacy/config-4.14 @@ -0,0 +1,39 @@ +CONFIG_ADM6996_PHY=y +CONFIG_AR8216_PHY=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CRC16=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LZO=y +CONFIG_FIRMWARE_IN_KERNEL=y +# CONFIG_GPIO_SYSFS is not set +# CONFIG_HW_RANDOM is not set +CONFIG_INPUT=y +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_POLLDEV=y +# CONFIG_ISDN is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +# CONFIG_LEDS_TRIGGER_TIMER is not set +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +# CONFIG_MTD_PHYSMAP_OF is not set +CONFIG_NLS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_PCI=y +# CONFIG_PCIE_LANTIQ is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_LANTIQ=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_RTL8306_PHY=y +CONFIG_RTL8366S_PHY=y +CONFIG_RTL8367B_PHY=y +CONFIG_RTL8367_PHY=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +# CONFIG_USB_EHCI_HCD is not set +CONFIG_USB_SUPPORT=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/lantiq/xway_legacy/config-default b/target/linux/lantiq/xway_legacy/config-4.9 similarity index 100% rename from target/linux/lantiq/xway_legacy/config-default rename to target/linux/lantiq/xway_legacy/config-4.9 diff --git a/target/linux/layerscape/Makefile b/target/linux/layerscape/Makefile index bd91556ef..f533767fa 100644 --- a/target/linux/layerscape/Makefile +++ b/target/linux/layerscape/Makefile @@ -10,7 +10,7 @@ BOARD:=layerscape BOARDNAME:=NXP Layerscape DEVICE_TYPE:=developerboard KERNEL_PATCHVER:=4.9 -FEATURES:=squashfs nand usb pcie gpio fpu +FEATURES:=squashfs nand usb pcie gpio fpu ubifs SUBTARGETS:=armv8_64b armv8_32b MAINTAINER:=Yangbo Lu diff --git a/target/linux/layerscape/README b/target/linux/layerscape/README index eaeee32e8..c210e01ca 100644 --- a/target/linux/layerscape/README +++ b/target/linux/layerscape/README @@ -12,6 +12,10 @@ Layerscape Quick Start 2. Build -------- +Before configuration and build, update and install package feeds. + +$ ./scripts/feeds update -a +$ ./scripts/feeds install -a 2.1 make menuconfig ------------------- @@ -42,22 +46,26 @@ Layerscape Quick Start +-----------------------------------------------------------------+ | [*] Enable all profiles by default | |-----------------------------------------------------------------| - | [ ] Use a per-device root filesystem that adds profile packages | + | [*] Use a per-device root filesystem that adds profile packages | |-----------------------------------------------------------------| - | [*] ls1012afrdm-armv8_64b ---- | + | [*] ls1012afrdm-armv8_64b ---> | |-----------------------------------------------------------------| - | [*] ls1012ardb-armv8_64b ---- | + | [*] ls1012ardb-armv8_64b ---> | |-----------------------------------------------------------------| - | [*] ls1043ardb-armv8_64b ---- | + | [*] ls1043ardb-armv8_64b ---> | |-----------------------------------------------------------------| - | [*] ls1046ardb-armv8_64b ---- | + | [*] ls1046ardb-armv8_64b ---> | |-----------------------------------------------------------------| - | [*] ls1088ardb-armv8_64b ---- | + | [*] ls1088ardb-armv8_64b ---> | |-----------------------------------------------------------------| - | [*] ls2088ardb-armv8_64b ---- | + | [*] ls2088ardb-armv8_64b ---> | +-----------------------------------------------------------------+ - Note: per-device root filesystem hasn't been supported for now. +Note: The first time make menuconfig would create a .config file which +would include all dependencies for selected target. After that, make +menuconfig still could be used to modify packages. If want to change +other target, please remove .config and make menuconfig to select again. +Otherwise the packages selected in .config would be a mess. 2.2 make (or make -j) ------------------------ @@ -65,7 +73,7 @@ Layerscape Quick Start 2.3 Final firmware ------------------ Final firmware would be in bin/targets/layerscape//, and -named as lede-layerscape---squashfs-firmware.bin. +named as openwrt-layerscape----firmware.bin. 3. Program firmware to NOR/QSPI flash @@ -73,9 +81,9 @@ named as lede-layerscape---squashfs-firmware.bin. * LS1043ARDB (NOR flash) Start up from bank0, and program firmware to bank4 with below commands. - Switch to bank4 to start up LEDE. + Switch to bank4 to start up OpenWrt. - => tftp a0000000 lede-layerscape---squashfs-firmware.bin + => tftp a0000000 .bin => protect off all => erase 64000000 +$filesize => cp.b a0000000 64000000 $filesize @@ -84,9 +92,9 @@ named as lede-layerscape---squashfs-firmware.bin. * LS2088ARDB (NOR flash) Start up from bank0, and program firmware to bank4 with below commands. - Switch to bank4 to start up LEDE. + Switch to bank4 to start up OpenWrt. - => tftp a0000000 lede-layerscape---squashfs-firmware.bin + => tftp a0000000 .bin => protect off all => erase 584000000 +$filesize => cp.b a0000000 584000000 $filesize @@ -95,9 +103,9 @@ named as lede-layerscape---squashfs-firmware.bin. * LS1012ARDB (QSPI flash) Start up from bank1, and program firmware to bank2 with below commands. - Switch to bank2 to start up LEDE. + Switch to bank2 to start up OpenWrt. - => tftp a0000000 lede-layerscape---squashfs-firmware.bin + => tftp a0000000 .bin => i2c mw 0x24 0x7 0xfc;i2c mw 0x24 0x3 0xf5 => sf probe 0:0 => sf erase 0 +$filesize @@ -107,9 +115,9 @@ named as lede-layerscape---squashfs-firmware.bin. * LS1012AFRDM (QSPI flash) LS1012AFRDM board only has one bank. Start up board, and program firmware - with below commands. Reset to start up LEDE. + with below commands. Reset to start up OpenWrt. - => tftp 96000000 lede-layerscape---squashfs-firmware.bin + => tftp 96000000 .bin => sf probe 0:0 => sf erase 0 +$filesize => sf write 96000000 0 $filesize @@ -118,9 +126,9 @@ named as lede-layerscape---squashfs-firmware.bin. * LS1046ARDB (QSPI flash) Start up from bank1, and program firmware to bank2 with below commands. - Switch to bank2 to start up LEDE. + Switch to bank2 to start up OpenWrt. - => tftp a0000000 lede-layerscape---squashfs-firmware.bin + => tftp a0000000 .bin => sf probe 0:1 => sf erase 0 +$filesize => sf write a0000000 0 $filesize @@ -129,9 +137,9 @@ named as lede-layerscape---squashfs-firmware.bin. * LS1088ARDB (QSPI flash) Start up from bank0, and program firmware to bank1 with below commands. - Switch to bank1 to start up LEDE. + Switch to bank1 to start up OpenWrt. - => tftp a0000000 lede-layerscape---squashfs-firmware.bin + => tftp a0000000 .bin => sf probe 0:1 => sf erase 0 +$filesize => sf write a0000000 0 $filesize @@ -142,7 +150,18 @@ named as lede-layerscape---squashfs-firmware.bin. => i2c mw 66 50 20;i2c mw 66 10 20;i2c mw 66 10 21 -4. Other references and sources +4. Known issues and limitation +------------------------------ +* u-boot may fail to read MAC addresses from EEPROM on some boards and there + won't be MAC addresses set in environment. This may cause kernel fails to + probe these network interfaces. The workaround is to set MAC addresses + manually, for example, + + => setenv ethaddr 00:04:9F:04:65:4b + => setenv eth1addr 00:04:9F:04:65:4c + + +5. Other references and sources ------------------------------- - NXP LSDK site: https://lsdk.github.io/ diff --git a/target/linux/layerscape/armv8_32b/config-4.9 b/target/linux/layerscape/armv8_32b/config-4.9 index 0d98e8a13..1ee8fdb0d 100644 --- a/target/linux/layerscape/armv8_32b/config-4.9 +++ b/target/linux/layerscape/armv8_32b/config-4.9 @@ -11,10 +11,8 @@ CONFIG_AQUANTIA_PHY=y # CONFIG_ARCH_AXXIA is not set CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HAS_BANDGAP=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_ARCH_HAS_SG_CHAIN=y CONFIG_ARCH_HAS_TICK_BROADCAST=y @@ -26,13 +24,7 @@ CONFIG_ARCH_MULTIPLATFORM=y CONFIG_ARCH_MULTI_V6_V7=y CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_MXC=y -CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED=y -CONFIG_ARCH_NR_GPIO=512 -CONFIG_ARCH_OMAP=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_ARCH_OMAP2PLUS_TYPICAL=y -CONFIG_ARCH_OMAP3=y -CONFIG_ARCH_OMAP4=y +CONFIG_ARCH_NR_GPIO=0 CONFIG_ARCH_PHYS_ADDR_T_64BIT=y # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set @@ -74,14 +66,12 @@ CONFIG_ARM_IMX6Q_CPUFREQ=y CONFIG_ARM_L1_CACHE_SHIFT=6 CONFIG_ARM_L1_CACHE_SHIFT_6=y CONFIG_ARM_LPAE=y -CONFIG_ARM_OMAP2PLUS_CPUFREQ=y CONFIG_ARM_PATCH_IDIV=y CONFIG_ARM_PATCH_PHYS_VIRT=y # CONFIG_ARM_PL172_MPMC is not set CONFIG_ARM_PMU=y CONFIG_ARM_PSCI=y CONFIG_ARM_PSCI_FW=y -# CONFIG_ARM_SCPI_PROTOCOL is not set # CONFIG_ARM_SMMU is not set CONFIG_ARM_SP805_WATCHDOG=y CONFIG_ARM_THUMB=y @@ -141,21 +131,16 @@ CONFIG_BUILD_BIN2C=y CONFIG_CACHE_L2X0=y # CONFIG_CACHE_L2X0_PMU is not set CONFIG_CAN=y -# CONFIG_CAN_8DEV_USB is not set CONFIG_CAN_BCM=y CONFIG_CAN_CALC_BITTIMING=y # CONFIG_CAN_CC770 is not set # CONFIG_CAN_C_CAN is not set CONFIG_CAN_DEV=y -# CONFIG_CAN_EMS_USB is not set -# CONFIG_CAN_ESD_USB2 is not set CONFIG_CAN_FLEXCAN=y # CONFIG_CAN_GRCAN is not set CONFIG_CAN_GW=y -# CONFIG_CAN_KVASER_USB is not set # CONFIG_CAN_LEDS is not set CONFIG_CAN_MCP251X=y -# CONFIG_CAN_PEAK_USB is not set CONFIG_CAN_RAW=y # CONFIG_CAN_SJA1000 is not set # CONFIG_CAN_SOFTING is not set @@ -167,7 +152,6 @@ CONFIG_CGROUPS=y CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_DEVICE=y CONFIG_CGROUP_FREEZER=y -# CONFIG_CGROUP_NET_CLASSID is not set # CONFIG_CGROUP_PERF is not set CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_SCHED=y @@ -182,7 +166,6 @@ CONFIG_CLKSRC_IMX_GPT=y CONFIG_CLKSRC_MMIO=y CONFIG_CLKSRC_OF=y CONFIG_CLKSRC_PROBE=y -CONFIG_CLKSRC_TI_32K=y CONFIG_CLKSRC_VERSATILE=y CONFIG_CLK_QORIQ=y CONFIG_CLONE_BACKWARDS=y @@ -202,7 +185,6 @@ CONFIG_COMMON_CLK_MAX77686=y # CONFIG_COMMON_CLK_PALMAS is not set # CONFIG_COMMON_CLK_RK808 is not set # CONFIG_COMMON_CLK_S2MPS11 is not set -CONFIG_COMMON_CLK_TI_ADPLL=y CONFIG_COMPACTION=y CONFIG_COMPAT_BRK=y CONFIG_CONFIGFS_FS=y @@ -259,11 +241,9 @@ CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC is not set # CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC is not set # CONFIG_CRYPTO_DEV_MXC_SCC is not set -# CONFIG_CRYPTO_DEV_OMAP_AES is not set -# CONFIG_CRYPTO_DEV_OMAP_DES is not set -# CONFIG_CRYPTO_DEV_OMAP_SHAM is not set CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_DRBG_HMAC=y CONFIG_CRYPTO_DRBG_MENU=y @@ -325,7 +305,6 @@ CONFIG_DMADEVICES=y CONFIG_DMA_CMA=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y -CONFIG_DMA_OMAP=y CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DNOTIFY=y @@ -377,7 +356,6 @@ CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y CONFIG_EXTCON=y -# CONFIG_EXTCON_AXP288 is not set # CONFIG_EXTCON_MAX14577 is not set # CONFIG_EXTCON_MAX8997 is not set # CONFIG_EXTCON_PALMAS is not set @@ -512,7 +490,6 @@ CONFIG_GPIO_EM=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y CONFIG_GPIO_MXC=y -CONFIG_GPIO_OMAP=y CONFIG_GPIO_PALMAS=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y @@ -540,9 +517,7 @@ CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_HAVE_ARM_SCU=y CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set CONFIG_HAVE_CBPF_JIT=y CONFIG_HAVE_CC_STACKPROTECTOR=y @@ -597,8 +572,6 @@ CONFIG_HVC_DRIVER=y CONFIG_HWMON=y CONFIG_HW_CONSOLE=y CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_OMAP=y -CONFIG_HW_RANDOM_OMAP3_ROM=y CONFIG_HZ_FIXED=0 CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y @@ -614,7 +587,6 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_NOMADIK=y -CONFIG_I2C_OMAP=y CONFIG_I2C_RK3X=y CONFIG_I2C_SLAVE=y CONFIG_I2C_SLAVE_EEPROM=y @@ -677,13 +649,11 @@ CONFIG_IPV6_ROUTER_PREF=y CONFIG_IPV6_SIT=y # CONFIG_IPV6_SUBTREES is not set # CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_MROUTE is not set CONFIG_IP_PNP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_DHCP=y CONFIG_IP_PNP_RARP=y CONFIG_IRQCHIP=y -CONFIG_IRQ_CROSSBAR=y CONFIG_IRQ_DOMAIN=y CONFIG_IRQ_DOMAIN_DEBUG=y CONFIG_IRQ_DOMAIN_HIERARCHY=y @@ -735,9 +705,6 @@ CONFIG_LS_SCFG_MSI=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_MACB=y -CONFIG_MACH_OMAP3517EVM=y -CONFIG_MACH_OMAP3_PANDORA=y -CONFIG_MACH_OMAP_GENERIC=y CONFIG_MACVLAN=y CONFIG_MACVTAP=y CONFIG_MAGIC_SYSRQ=y @@ -769,7 +736,6 @@ CONFIG_MFD_MAX77686=y CONFIG_MFD_MAX8907=y CONFIG_MFD_MAX8997=y CONFIG_MFD_MAX8998=y -CONFIG_MFD_OMAP_USB_HOST=y CONFIG_MFD_PALMAS=y CONFIG_MFD_RK808=y CONFIG_MFD_SEC_CORE=y @@ -796,8 +762,6 @@ CONFIG_MMC_DW_EXYNOS=y # CONFIG_MMC_DW_PCI is not set CONFIG_MMC_DW_PLTFM=y # CONFIG_MMC_MXC is not set -CONFIG_MMC_OMAP=y -CONFIG_MMC_OMAP_HS=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ESDHC_IMX=y CONFIG_MMC_SDHCI_IO_ACCESSORS=y @@ -895,28 +859,6 @@ CONFIG_OF_PCI_IRQ=y CONFIG_OF_RESERVED_MEM=y CONFIG_OLD_SIGACTION=y CONFIG_OLD_SIGSUSPEND3=y -# CONFIG_OMAP2PLUS_MBOX is not set -# CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set -# CONFIG_OMAP3_SDRC_AC_TIMING is not set -# CONFIG_OMAP5_ERRATA_801819 is not set -CONFIG_OMAP_32K_TIMER=y -CONFIG_OMAP_CONTROL_PHY=y -CONFIG_OMAP_DM_TIMER=y -CONFIG_OMAP_GPMC=y -# CONFIG_OMAP_GPMC_DEBUG is not set -CONFIG_OMAP_INTERCONNECT=y -CONFIG_OMAP_INTERCONNECT_BARRIER=y -# CONFIG_OMAP_IOMMU is not set -CONFIG_OMAP_IRQCHIP=y -CONFIG_OMAP_MUX=y -# CONFIG_OMAP_MUX_DEBUG is not set -CONFIG_OMAP_MUX_WARNINGS=y -CONFIG_OMAP_OCP2SCP=y -CONFIG_OMAP_PACKAGE_CBB=y -CONFIG_OMAP_PM_NOOP=y -# CONFIG_OMAP_RESET_CLOCKS is not set -CONFIG_OMAP_USB2=y -# CONFIG_OMAP_WATCHDOG is not set CONFIG_OUTER_CACHE=y CONFIG_OUTER_CACHE_SYNC=y CONFIG_PACKET_DIAG=y @@ -939,7 +881,6 @@ CONFIG_PCIE_PME=y CONFIG_PCI_BUS_ADDR_T_64BIT=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y -# CONFIG_PCI_DRA7XX is not set CONFIG_PCI_ECAM=y CONFIG_PCI_HOST_COMMON=y CONFIG_PCI_HOST_GENERIC=y @@ -951,7 +892,6 @@ CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=3 CONFIG_PHYLIB=y CONFIG_PHYS_ADDR_T_64BIT=y -# CONFIG_PHY_DM816X_USB is not set CONFIG_PID_NS=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AS3722=y @@ -974,7 +914,6 @@ CONFIG_PM_SLEEP_SMP=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y CONFIG_POWER_AVS=y -# CONFIG_POWER_AVS_OMAP is not set CONFIG_POWER_RESET=y CONFIG_POWER_RESET_AS3722=y CONFIG_POWER_RESET_BRCMKONA=y @@ -1003,11 +942,8 @@ CONFIG_PTP_1588_CLOCK=y CONFIG_PTP_1588_CLOCK_GIANFAR=y CONFIG_PWM=y # CONFIG_PWM_IMX is not set -# CONFIG_PWM_OMAP_DMTIMER is not set # CONFIG_PWM_STMPE is not set CONFIG_PWM_SYSFS=y -# CONFIG_PWM_TIECAP is not set -# CONFIG_PWM_TIEHRPWM is not set # CONFIG_PWM_TWL is not set # CONFIG_PWM_TWL_LED is not set CONFIG_QMAN_CEETM_UPDATE_PERIOD=1000 @@ -1054,14 +990,12 @@ CONFIG_REGULATOR_MAX8973=y # CONFIG_REGULATOR_MAX8997 is not set # CONFIG_REGULATOR_MAX8998 is not set CONFIG_REGULATOR_PALMAS=y -CONFIG_REGULATOR_PBIAS=y CONFIG_REGULATOR_PWM=y # CONFIG_REGULATOR_QCOM_SPMI is not set CONFIG_REGULATOR_RK808=y # CONFIG_REGULATOR_S2MPA01 is not set CONFIG_REGULATOR_S2MPS11=y CONFIG_REGULATOR_S5M8767=y -CONFIG_REGULATOR_TI_ABB=y CONFIG_REGULATOR_TPS51632=y CONFIG_REGULATOR_TPS62360=y CONFIG_REGULATOR_TPS65090=y @@ -1121,7 +1055,6 @@ CONFIG_SERIAL_8250_DW=y CONFIG_SERIAL_8250_EM=y CONFIG_SERIAL_8250_FSL=y CONFIG_SERIAL_8250_NR_UARTS=4 -# CONFIG_SERIAL_8250_OMAP is not set CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_AMBA_PL011=y @@ -1136,8 +1069,6 @@ CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_SERIAL_MCTRL_GPIO=y CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIAL_OMAP=y -CONFIG_SERIAL_OMAP_CONSOLE=y CONFIG_SERIAL_ST_ASC=y CONFIG_SERIAL_ST_ASC_CONSOLE=y CONFIG_SERIAL_XILINX_PS_UART=y @@ -1147,7 +1078,6 @@ CONFIG_SERIO_AMBAKMI=y CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_SERPORT=y CONFIG_SG_POOL=y -CONFIG_SG_SPLIT=y CONFIG_SLUB_DEBUG=y CONFIG_SMP=y CONFIG_SMP_ON_UP=y @@ -1155,13 +1085,8 @@ CONFIG_SMSC911X=y # CONFIG_SMSC911X_ARCH_HOOKS is not set CONFIG_SMSC_PHY=y CONFIG_SOCK_DIAG=y -CONFIG_SOC_AM33XX=y -CONFIG_SOC_AM43XX=y CONFIG_SOC_BRCMSTB=y CONFIG_SOC_BUS=y -CONFIG_SOC_DRA7XX=y -CONFIG_SOC_HAS_OMAP2_SDRC=y -CONFIG_SOC_HAS_REALTIME_COUNTER=y # CONFIG_SOC_IMX50 is not set # CONFIG_SOC_IMX51 is not set # CONFIG_SOC_IMX53 is not set @@ -1171,9 +1096,6 @@ CONFIG_SOC_HAS_REALTIME_COUNTER=y # CONFIG_SOC_IMX6UL is not set # CONFIG_SOC_IMX7D is not set CONFIG_SOC_LS1021A=y -CONFIG_SOC_OMAP3430=y -CONFIG_SOC_OMAP5=y -CONFIG_SOC_TI81XX=y # CONFIG_SOC_VF610 is not set CONFIG_SPARSE_IRQ=y CONFIG_SPI=y @@ -1182,7 +1104,6 @@ CONFIG_SPI_CADENCE=y CONFIG_SPI_FSL_QUADSPI=y # CONFIG_SPI_IMX is not set CONFIG_SPI_MASTER=y -CONFIG_SPI_OMAP24XX=y CONFIG_SPI_PL022=y CONFIG_SPI_SPIDEV=y CONFIG_SPI_XILINX=y @@ -1200,7 +1121,6 @@ CONFIG_STMMAC_ETH=y CONFIG_STMMAC_PLATFORM=y CONFIG_STMPE_I2C=y # CONFIG_STMPE_SPI is not set -CONFIG_STMP_DEVICE=y # CONFIG_STRIP_ASM_SYMS is not set CONFIG_SUSPEND=y CONFIG_SUSPEND_FREEZER=y @@ -1221,18 +1141,7 @@ CONFIG_THERMAL_HWMON=y CONFIG_THERMAL_OF=y # CONFIG_THUMB2_KERNEL is not set CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_TI_CPPI41 is not set -CONFIG_TI_CPSW=y CONFIG_TI_CPSW_ALE=y -CONFIG_TI_CPSW_PHY_SEL=y -CONFIG_TI_DAVINCI_CPDMA=y -# CONFIG_TI_DAVINCI_EMAC is not set -CONFIG_TI_DAVINCI_MDIO=y -CONFIG_TI_DMA_CROSSBAR=y -CONFIG_TI_EDMA=y -# CONFIG_TI_EMIF is not set -CONFIG_TI_PIPE3=y -# CONFIG_TI_SOC_THERMAL is not set CONFIG_TMPFS_POSIX_ACL=y CONFIG_TOUCHSCREEN_PROPERTIES=y CONFIG_TOUCHSCREEN_STMPE=y @@ -1250,69 +1159,8 @@ CONFIG_UCS2_STRING=y CONFIG_UEVENT_HELPER_PATH="" CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" CONFIG_UNIX_DIAG=y -CONFIG_USB=y -# CONFIG_USB_ALI_M5632 is not set -# CONFIG_USB_AN2720 is not set -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_OF=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWC2=y -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_PCI is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_DUAL_ROLE=y -# CONFIG_USB_DWC3_GADGET is not set -# CONFIG_USB_DWC3_HOST is not set -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PCI=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_EHCI_MXC is not set -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_FSL_USB2=y -CONFIG_USB_GADGET=y -CONFIG_USB_GPIO_VBUS=y -# CONFIG_USB_HCD_BCMA is not set -CONFIG_USB_HID=y # CONFIG_USB_IMX21_HCD is not set -CONFIG_USB_ISP1301=y -CONFIG_USB_ISP1760=y -CONFIG_USB_ISP1760_DUAL_ROLE=y -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_HCD=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -CONFIG_USB_ISP1761_UDC=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_NET_AX88179_178A=y -CONFIG_USB_NET_AX8817X=y -CONFIG_USB_NET_CDCETHER=y -CONFIG_USB_NET_CDC_NCM=y -CONFIG_USB_NET_CDC_SUBSET=y -CONFIG_USB_NET_CDC_SUBSET_ENABLE=y -CONFIG_USB_NET_DRIVERS=y -CONFIG_USB_NET_NET1080=y -CONFIG_USB_NET_SMSC75XX=y -CONFIG_USB_NET_SMSC95XX=y -CONFIG_USB_NET_ZAURUS=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_OMAP3=y -CONFIG_USB_OHCI_HCD_PCI=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_PEGASUS=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_USBNET=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_XHCI_PLATFORM=y # CONFIG_USERIO is not set CONFIG_USER_NS=y CONFIG_USE_OF=y @@ -1346,7 +1194,6 @@ CONFIG_VT_CONSOLE=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_VT_HW_CONSOLE_BINDING=y CONFIG_WATCHDOG_CORE=y -# CONFIG_WKUP_M3_RPROC is not set # CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set CONFIG_XFRM_ALGO=y CONFIG_XFRM_USER=y diff --git a/target/linux/layerscape/armv8_64b/config-4.9 b/target/linux/layerscape/armv8_64b/config-4.9 index bb7443431..976006ca4 100644 --- a/target/linux/layerscape/armv8_64b/config-4.9 +++ b/target/linux/layerscape/armv8_64b/config-4.9 @@ -168,7 +168,6 @@ CONFIG_CGROUP_CPUACCT=y CONFIG_CGROUP_DEVICE=y # CONFIG_CGROUP_FREEZER is not set CONFIG_CGROUP_HUGETLB=y -# CONFIG_CGROUP_NET_CLASSID is not set CONFIG_CGROUP_PERF=y CONFIG_CGROUP_PIDS=y CONFIG_CGROUP_SCHED=y @@ -260,9 +259,11 @@ CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32_ARM64 is not set CONFIG_CRYPTO_CRCT10DIF=y CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_FSL_CAAM=y CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y @@ -285,6 +286,7 @@ CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_MD5=y @@ -517,7 +519,6 @@ CONFIG_GLOB=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_ACPI=y -# CONFIG_GPIO_AMDPT is not set CONFIG_GPIO_DWAPB=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y @@ -686,7 +687,6 @@ CONFIG_IPC_NS=y CONFIG_IPV6=y CONFIG_IPV6_SIT=y # CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_MROUTE is not set CONFIG_IP_PNP=y CONFIG_IP_PNP_BOOTP=y CONFIG_IP_PNP_DHCP=y @@ -708,6 +708,7 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_CROS_EC is not set CONFIG_KEYBOARD_GPIO=y CONFIG_KEYS=y +CONFIG_KEYS_COMPAT=y CONFIG_KSM=y CONFIG_KVM=y CONFIG_KVM_ARM_HOST=y @@ -827,6 +828,12 @@ CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS_LIMIT=16384 CONFIG_MTD_SST25L=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_UBI_FASTMAP is not set +# CONFIG_MTD_UBI_GLUEBI is not set +CONFIG_MTD_UBI_WL_THRESHOLD=4096 CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_MV_XOR_V2=y CONFIG_NAMESPACES=y @@ -906,10 +913,6 @@ CONFIG_PERF_EVENTS=y CONFIG_PGTABLE_LEVELS=4 CONFIG_PHYLIB=y CONFIG_PHYS_ADDR_T_64BIT=y -# CONFIG_PHY_EXYNOS4210_USB2 is not set -# CONFIG_PHY_EXYNOS4X12_USB2 is not set -# CONFIG_PHY_EXYNOS5250_USB2 is not set -CONFIG_PHY_SAMSUNG_USB2=y CONFIG_PHY_XGENE=y CONFIG_PID_IN_CONTEXTIDR=y CONFIG_PID_NS=y @@ -1134,6 +1137,10 @@ CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set CONFIG_TRANSPARENT_HUGE_PAGECACHE=y CONFIG_TUN=y +CONFIG_UBIFS_FS=y +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set +CONFIG_UBIFS_FS_LZO=y +CONFIG_UBIFS_FS_ZLIB=y CONFIG_UCS2_STRING=y CONFIG_UIO=y CONFIG_UIO_AEC=y @@ -1147,46 +1154,7 @@ CONFIG_UIO_PDRV_GENIRQ=y CONFIG_UIO_SERCOS3=y CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_UNIX_DIAG=y -CONFIG_USB=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_OF=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWC2=y -CONFIG_USB_DWC2_DUAL_ROLE=y -# CONFIG_USB_DWC2_PCI is not set -# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_DUAL_ROLE=y -# CONFIG_USB_DWC3_GADGET is not set -# CONFIG_USB_DWC3_HOST is not set -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_DWC3_PCI=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_GADGET=y -CONFIG_USB_HID=y -CONFIG_USB_HSIC_USB3503=y -CONFIG_USB_ISP1760=y -CONFIG_USB_ISP1760_DUAL_ROLE=y -# CONFIG_USB_ISP1760_GADGET_ROLE is not set -CONFIG_USB_ISP1760_HCD=y -# CONFIG_USB_ISP1760_HOST_ROLE is not set -CONFIG_USB_ISP1761_UDC=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PCI=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_OTG=y -CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_XHCI_PLATFORM=y # CONFIG_USERIO is not set CONFIG_USER_NS=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y diff --git a/target/linux/layerscape/image/Makefile b/target/linux/layerscape/image/Makefile index 88bf8d7b4..fc76ddd2e 100644 --- a/target/linux/layerscape/image/Makefile +++ b/target/linux/layerscape/image/Makefile @@ -45,11 +45,6 @@ define Build/append-ls-dtb dd if=$(DTS_DIR)/$(1).dtb >> $@ endef -define Build/append-ls-rootfs-ext4 - $(STAGING_DIR_HOST)/bin/make_ext4fs -l $(word 2,$(1)) -b 4096 -i 6000 -m 0 -J $(KDIR)/$(word 1,$(1))-$(word 2,$(1)).root.ext4 $(TARGET_DIR) - dd if=$(KDIR)/$(word 1,$(1))-$(word 2,$(1)).root.ext4 >> $@ -endef - define Device/Default PROFILES = Default FILESYSTEMS := squashfs @@ -89,13 +84,18 @@ define Device/ls1046ardb DEVICE_PACKAGES += rcw-layerscape-ls1046ardb uboot-layerscape-$(SUBTARGET)-ls1046ardb \ fman-layerscape-ls1046ardb layerscape-ppa-ls1046ardb DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk + FILESYSTEMS := ubifs + UBIFS_OPTS := -m 1 -e 262016 -c 128 + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 256KiB + PAGESIZE := 1 IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \ append-ls-uboot $(1) | pad-to 4M | \ append-ls-ppa $(1) | pad-to 9M | \ append-ls-fman $(1) | pad-to 15M | \ append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \ append-kernel | pad-to 32M | \ - append-ls-rootfs-ext4 $(1) 30M | check-size 67108865 + append-ubi | check-size 67108865 endef TARGET_DEVICES += ls1046ardb @@ -104,13 +104,18 @@ define Device/ls1012ardb DEVICE_PACKAGES += rcw-layerscape-ls1012ardb uboot-layerscape-$(SUBTARGET)-ls1012ardb \ kmod-ppfe layerscape-ppfe layerscape-ppa-ls1012ardb DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1012a-rdb + FILESYSTEMS := ubifs + UBIFS_OPTS := -m 1 -e 262016 -c 128 + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 256KiB + PAGESIZE := 1 IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \ append-ls-uboot $(1) | pad-to 4M | \ append-ls-ppa $(1) | pad-to 10M | \ append-ls-ppfe | pad-to 15M | \ append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \ append-kernel | pad-to 32M | \ - append-ls-rootfs-ext4 $(1) 30M | check-size 67108865 + append-ubi | check-size 67108865 endef TARGET_DEVICES += ls1012ardb @@ -119,13 +124,18 @@ define Device/ls1012afrdm DEVICE_PACKAGES += rcw-layerscape-ls1012afrdm uboot-layerscape-$(SUBTARGET)-ls1012afrdm \ kmod-ppfe layerscape-ppfe layerscape-ppa-ls1012afrdm DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1012a-frdm + FILESYSTEMS := ubifs + UBIFS_OPTS := -m 1 -e 262016 -c 128 + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 256KiB + PAGESIZE := 1 IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \ append-ls-uboot $(1) | pad-to 4M | \ append-ls-ppa $(1) | pad-to 10M | \ append-ls-ppfe | pad-to 15M | \ append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \ append-kernel | pad-to 32M | \ - append-ls-rootfs-ext4 $(1) 30M | check-size 67108865 + append-ubi | check-size 67108865 endef TARGET_DEVICES += ls1012afrdm @@ -136,6 +146,11 @@ define Device/ls1088ardb layerscape-mc-ls1088ardb layerscape-dpl-ls1088ardb restool \ layerscape-ppa-ls1088ardb DEVICE_DTS = ../../../arm64/boot/dts/freescale/fsl-ls1088a-rdb + FILESYSTEMS := ubifs + UBIFS_OPTS := -m 1 -e 262016 -c 128 + UBINIZE_OPTS := -E 5 + BLOCKSIZE := 256KiB + PAGESIZE := 1 IMAGE/firmware.bin = append-ls-rcw $(1) | pad-to 1M | \ append-ls-uboot $(1) | pad-to 4M | \ append-ls-ppa $(1) | pad-to 10M | \ @@ -144,7 +159,7 @@ define Device/ls1088ardb append-ls-dpc $(1) | pad-to 15M | \ append-ls-dtb $$(DEVICE_DTS) | pad-to 16M | \ append-kernel | pad-to 32M | \ - append-ls-rootfs-ext4 $(1) 30M | check-size 67108865 + append-ubi | check-size 67108865 endef TARGET_DEVICES += ls1088ardb diff --git a/target/linux/layerscape/patches-4.9/201-config-support-layerscape.patch b/target/linux/layerscape/patches-4.9/201-config-support-layerscape.patch index ccfce1df7..218421265 100644 --- a/target/linux/layerscape/patches-4.9/201-config-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/201-config-support-layerscape.patch @@ -1,12 +1,12 @@ -From 7992b4384d94c5e1bad998ca3a9a5781caac8e62 Mon Sep 17 00:00:00 2001 +From e43dec70614b55ba1ce24dfcdf8f51e36d800af2 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 09:52:26 +0800 -Subject: [PATCH] config: support layerscape +Date: Wed, 17 Jan 2018 15:26:46 +0800 +Subject: [PATCH 01/30] config: support layerscape MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -This is a integrated patch for layerscape config/makefile support. +This is an integrated patch for layerscape config/makefile support. Signed-off-by: Yuantian Tang Signed-off-by: Zhang Ying-22455 @@ -16,33 +16,42 @@ Signed-off-by: Zhao Qiang Signed-off-by: Horia Geantă Signed-off-by: Yangbo Lu --- - drivers/base/Kconfig | 1 + - drivers/crypto/Makefile | 2 +- - drivers/net/ethernet/freescale/Kconfig | 4 +- - drivers/net/ethernet/freescale/Makefile | 2 + - drivers/ptp/Kconfig | 29 ++++++ - drivers/rtc/Kconfig | 8 ++ - drivers/rtc/Makefile | 1 + - drivers/soc/Kconfig | 3 +- - drivers/soc/fsl/Kconfig | 22 +++++ - drivers/soc/fsl/Kconfig.arm | 16 ++++ - drivers/soc/fsl/Makefile | 4 + - drivers/soc/fsl/layerscape/Kconfig | 10 +++ - drivers/soc/fsl/layerscape/Makefile | 1 + - drivers/soc/fsl/rcpm.c | 154 ++++++++++++++++++++++++++++++++ - drivers/staging/Kconfig | 6 ++ - drivers/staging/Makefile | 3 + - drivers/staging/fsl-dpaa2/Kconfig | 41 +++++++++ - drivers/staging/fsl-dpaa2/Makefile | 9 ++ - 18 files changed, 312 insertions(+), 4 deletions(-) + arch/arm/mach-imx/Kconfig | 1 + + drivers/base/Kconfig | 1 + + drivers/crypto/Makefile | 2 +- + drivers/net/ethernet/freescale/Kconfig | 4 ++- + drivers/net/ethernet/freescale/Makefile | 2 ++ + drivers/ptp/Kconfig | 29 +++++++++++++++++++ + drivers/rtc/Kconfig | 8 ++++++ + drivers/rtc/Makefile | 1 + + drivers/soc/Kconfig | 3 +- + drivers/soc/fsl/Kconfig | 22 ++++++++++++++ + drivers/soc/fsl/Kconfig.arm | 16 +++++++++++ + drivers/soc/fsl/Makefile | 4 +++ + drivers/soc/fsl/layerscape/Kconfig | 10 +++++++ + drivers/soc/fsl/layerscape/Makefile | 1 + + drivers/staging/Kconfig | 6 ++++ + drivers/staging/Makefile | 3 ++ + drivers/staging/fsl-dpaa2/Kconfig | 51 +++++++++++++++++++++++++++++++++ + drivers/staging/fsl-dpaa2/Makefile | 9 ++++++ + 18 files changed, 169 insertions(+), 4 deletions(-) create mode 100644 drivers/soc/fsl/Kconfig create mode 100644 drivers/soc/fsl/Kconfig.arm create mode 100644 drivers/soc/fsl/layerscape/Kconfig create mode 100644 drivers/soc/fsl/layerscape/Makefile - create mode 100644 drivers/soc/fsl/rcpm.c create mode 100644 drivers/staging/fsl-dpaa2/Kconfig create mode 100644 drivers/staging/fsl-dpaa2/Makefile +--- a/arch/arm/mach-imx/Kconfig ++++ b/arch/arm/mach-imx/Kconfig +@@ -1,6 +1,7 @@ + menuconfig ARCH_MXC + bool "Freescale i.MX family" + depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M ++ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE + select ARCH_SUPPORTS_BIG_ENDIAN + select CLKSRC_IMX_GPT + select GENERIC_IRQ_CHIP --- a/drivers/base/Kconfig +++ b/drivers/base/Kconfig @@ -240,6 +240,7 @@ config GENERIC_CPU_VULNERABILITIES @@ -239,163 +248,6 @@ Signed-off-by: Yangbo Lu +++ b/drivers/soc/fsl/layerscape/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_FTM_ALARM) += ftm_alarm.o ---- /dev/null -+++ b/drivers/soc/fsl/rcpm.c -@@ -0,0 +1,154 @@ -+/* -+ * Run Control and Power Management (RCPM) driver -+ * -+ * Copyright 2016 NXP -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ */ -+#define pr_fmt(fmt) "RCPM: %s: " fmt, __func__ -+ -+#include -+#include -+#include -+#include -+#include -+ -+/* RCPM register offset */ -+#define RCPM_IPPDEXPCR0 0x140 -+ -+#define RCPM_WAKEUP_CELL_SIZE 2 -+ -+struct rcpm_config { -+ int ipp_num; -+ int ippdexpcr_offset; -+ u32 ippdexpcr[2]; -+ void *rcpm_reg_base; -+}; -+ -+static struct rcpm_config *rcpm; -+ -+static inline void rcpm_reg_write(u32 offset, u32 value) -+{ -+ iowrite32be(value, rcpm->rcpm_reg_base + offset); -+} -+ -+static inline u32 rcpm_reg_read(u32 offset) -+{ -+ return ioread32be(rcpm->rcpm_reg_base + offset); -+} -+ -+static void rcpm_wakeup_fixup(struct device *dev, void *data) -+{ -+ struct device_node *node = dev ? dev->of_node : NULL; -+ u32 value[RCPM_WAKEUP_CELL_SIZE]; -+ int ret, i; -+ -+ if (!dev || !node || !device_may_wakeup(dev)) -+ return; -+ -+ /* -+ * Get the values in the "rcpm-wakeup" property. -+ * Three values are: -+ * The first is a pointer to the RCPM node. -+ * The second is the value of the ippdexpcr0 register. -+ * The third is the value of the ippdexpcr1 register. -+ */ -+ ret = of_property_read_u32_array(node, "fsl,rcpm-wakeup", -+ value, RCPM_WAKEUP_CELL_SIZE); -+ if (ret) -+ return; -+ -+ pr_debug("wakeup source: the device %s\n", node->full_name); -+ -+ for (i = 0; i < rcpm->ipp_num; i++) -+ rcpm->ippdexpcr[i] |= value[i + 1]; -+} -+ -+static int rcpm_suspend_prepare(void) -+{ -+ int i; -+ -+ BUG_ON(!rcpm); -+ -+ for (i = 0; i < rcpm->ipp_num; i++) -+ rcpm->ippdexpcr[i] = 0; -+ -+ dpm_for_each_dev(NULL, rcpm_wakeup_fixup); -+ -+ for (i = 0; i < rcpm->ipp_num; i++) { -+ rcpm_reg_write(rcpm->ippdexpcr_offset + 4 * i, -+ rcpm->ippdexpcr[i]); -+ pr_debug("ippdexpcr%d = 0x%x\n", i, rcpm->ippdexpcr[i]); -+ } -+ -+ return 0; -+} -+ -+static int rcpm_suspend_notifier_call(struct notifier_block *bl, -+ unsigned long state, -+ void *unused) -+{ -+ switch (state) { -+ case PM_SUSPEND_PREPARE: -+ rcpm_suspend_prepare(); -+ break; -+ } -+ -+ return NOTIFY_DONE; -+} -+ -+static struct rcpm_config rcpm_default_config = { -+ .ipp_num = 1, -+ .ippdexpcr_offset = RCPM_IPPDEXPCR0, -+}; -+ -+static const struct of_device_id rcpm_matches[] = { -+ { -+ .compatible = "fsl,qoriq-rcpm-2.1", -+ .data = &rcpm_default_config, -+ }, -+ {} -+}; -+ -+static struct notifier_block rcpm_suspend_notifier = { -+ .notifier_call = rcpm_suspend_notifier_call, -+}; -+ -+static int __init layerscape_rcpm_init(void) -+{ -+ const struct of_device_id *match; -+ struct device_node *np; -+ -+ np = of_find_matching_node_and_match(NULL, rcpm_matches, &match); -+ if (!np) { -+ pr_err("Can't find the RCPM node.\n"); -+ return -EINVAL; -+ } -+ -+ if (match->data) -+ rcpm = (struct rcpm_config *)match->data; -+ else -+ return -EINVAL; -+ -+ rcpm->rcpm_reg_base = of_iomap(np, 0); -+ of_node_put(np); -+ if (!rcpm->rcpm_reg_base) -+ return -ENOMEM; -+ -+ register_pm_notifier(&rcpm_suspend_notifier); -+ -+ pr_info("The RCPM driver initialized.\n"); -+ -+ return 0; -+} -+ -+subsys_initcall(layerscape_rcpm_init); --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -94,6 +94,8 @@ source "drivers/staging/fbtft/Kconfig" @@ -433,7 +285,7 @@ Signed-off-by: Yangbo Lu +obj-$(CONFIG_FSL_PPFE) += fsl_ppfe/ --- /dev/null +++ b/drivers/staging/fsl-dpaa2/Kconfig -@@ -0,0 +1,41 @@ +@@ -0,0 +1,51 @@ +# +# Freescale DataPath Acceleration Architecture Gen2 (DPAA2) drivers +# @@ -470,6 +322,16 @@ Signed-off-by: Yangbo Lu + default n + ---help--- + Enable advanced statistics through debugfs interface. ++ ++config FSL_DPAA2_ETH_DCB ++ bool "Data Center Bridging (DCB) Support" ++ default n ++ depends on DCB ++ ---help--- ++ Say Y here if you want to use Data Center Bridging (DCB) features ++ (PFC) in the driver. ++ ++ If unsure, say N. +endif + +source "drivers/staging/fsl-dpaa2/mac/Kconfig" diff --git a/target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch b/target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch index 51408253c..77e54f834 100644 --- a/target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/202-core-linux-support-layerscape.patch @@ -1,9 +1,9 @@ -From c37953457a7ebeb0d97ae8574b3d41274fcd9119 Mon Sep 17 00:00:00 2001 +From 67a2eceebe9dcd92a1a5f3e912340c8975c84434 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Wed, 1 Nov 2017 16:22:33 +0800 -Subject: [PATCH] core-linux: support layerscape +Date: Wed, 17 Jan 2018 14:50:41 +0800 +Subject: [PATCH 02/30] core-linux: support layerscape -This is a integrated patch for layerscape core-linux support. +This is an integrated patch for layerscape core-linux support. Signed-off-by: Madalin Bucur Signed-off-by: Zhao Qiang @@ -18,7 +18,7 @@ Signed-off-by: Arnd Bergmann Signed-off-by: Yangbo Lu --- drivers/base/devres.c | 66 ++++++++++++++++++++++++++++ - drivers/base/soc.c | 66 ++++++++++++++++++++++++++++ + drivers/base/soc.c | 70 +++++++++++++++++++++++++++++ include/linux/device.h | 19 ++++++++ include/linux/fsl/svr.h | 97 +++++++++++++++++++++++++++++++++++++++++ include/linux/fsl_devices.h | 3 ++ @@ -30,7 +30,7 @@ Signed-off-by: Yangbo Lu net/core/dev.c | 13 +++++- net/core/skbuff.c | 29 +++++++++++- net/sched/sch_generic.c | 7 +++ - 13 files changed, 309 insertions(+), 3 deletions(-) + 13 files changed, 313 insertions(+), 3 deletions(-) create mode 100644 include/linux/fsl/svr.h --- a/drivers/base/devres.c @@ -122,7 +122,7 @@ Signed-off-by: Yangbo Lu static DEFINE_IDA(soc_ida); -@@ -159,3 +160,68 @@ static int __init soc_bus_register(void) +@@ -159,3 +160,72 @@ static int __init soc_bus_register(void) return bus_register(&soc_bus_type); } core_initcall(soc_bus_register); @@ -133,19 +133,23 @@ Signed-off-by: Yangbo Lu + const struct soc_device_attribute *match = arg; + + if (match->machine && -+ !glob_match(match->machine, soc_dev->attr->machine)) ++ (!soc_dev->attr->machine || ++ !glob_match(match->machine, soc_dev->attr->machine))) + return 0; + + if (match->family && -+ !glob_match(match->family, soc_dev->attr->family)) ++ (!soc_dev->attr->family || ++ !glob_match(match->family, soc_dev->attr->family))) + return 0; + + if (match->revision && -+ !glob_match(match->revision, soc_dev->attr->revision)) ++ (!soc_dev->attr->revision || ++ !glob_match(match->revision, soc_dev->attr->revision))) + return 0; + + if (match->soc_id && -+ !glob_match(match->soc_id, soc_dev->attr->soc_id)) ++ (!soc_dev->attr->soc_id || ++ !glob_match(match->soc_id, soc_dev->attr->soc_id))) + return 0; + + return 1; @@ -417,7 +421,7 @@ Signed-off-by: Yangbo Lu * These are the defined Ethernet Protocol ID's. --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -6604,9 +6604,18 @@ int dev_set_mtu(struct net_device *dev, +@@ -6622,9 +6622,18 @@ int dev_set_mtu(struct net_device *dev, if (new_mtu == dev->mtu) return 0; diff --git a/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch b/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch index 135333e47..0276ebe33 100644 --- a/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/301-arch-support-layerscape.patch @@ -1,12 +1,12 @@ -From 739029f49bd9181b821298f9d27b29ce2d292967 Mon Sep 17 00:00:00 2001 +From 45e934873f9147f692dddbb61abc088f4c8059d7 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 10:03:52 +0800 -Subject: [PATCH] arch: support layerscape +Date: Wed, 17 Jan 2018 14:51:29 +0800 +Subject: [PATCH 03/30] arch: support layerscape MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -This is a integrated patch for layerscape arch support. +This is an integrated patch for layerscape arch support. Signed-off-by: Madalin Bucur Signed-off-by: Nipun Gupta @@ -29,13 +29,13 @@ Signed-off-by: Yangbo Lu arch/arm/mm/ioremap.c | 7 ++++ arch/arm/mm/mmu.c | 9 +++++ arch/arm64/include/asm/cache.h | 2 +- - arch/arm64/include/asm/io.h | 2 ++ + arch/arm64/include/asm/io.h | 30 +++++++++++++++++ arch/arm64/include/asm/pci.h | 4 +++ arch/arm64/include/asm/pgtable-prot.h | 1 + arch/arm64/include/asm/pgtable.h | 5 +++ arch/arm64/kernel/pci.c | 62 +++++++++++++++++++++++++++++++++++ - arch/arm64/mm/dma-mapping.c | 23 ++++++++++--- - 15 files changed, 209 insertions(+), 8 deletions(-) + arch/arm64/mm/dma-mapping.c | 6 ++++ + 15 files changed, 225 insertions(+), 3 deletions(-) --- a/arch/arm/include/asm/delay.h +++ b/arch/arm/include/asm/delay.h @@ -284,6 +284,41 @@ Signed-off-by: Yangbo Lu + __pgprot(PROT_NORMAL_NS)) #define iounmap __iounmap + /* +@@ -184,6 +186,34 @@ extern void __iomem *ioremap_cache(phys_ + #define iowrite32be(v,p) ({ __iowmb(); __raw_writel((__force __u32)cpu_to_be32(v), p); }) + #define iowrite64be(v,p) ({ __iowmb(); __raw_writeq((__force __u64)cpu_to_be64(v), p); }) + ++/* access ports */ ++#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr)) ++#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr)) ++ ++#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr)) ++#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr)) ++ ++#define setbits8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr)) ++#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr)) ++ ++/* Clear and set bits in one shot. These macros can be used to clear and ++ * set multiple bits in a register using a single read-modify-write. These ++ * macros can also be used to set a multiple-bit bit pattern using a mask, ++ * by specifying the mask in the 'clear' parameter and the new bit pattern ++ * in the 'set' parameter. ++ */ ++ ++#define clrsetbits_be32(addr, clear, set) \ ++ iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr)) ++#define clrsetbits_le32(addr, clear, set) \ ++ iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr)) ++#define clrsetbits_be16(addr, clear, set) \ ++ iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr)) ++#define clrsetbits_le16(addr, clear, set) \ ++ iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr)) ++#define clrsetbits_8(addr, clear, set) \ ++ iowrite8((ioread8(addr) & ~(clear)) | (set), (addr)) ++ + #include + /* --- a/arch/arm64/include/asm/pci.h +++ b/arch/arm64/include/asm/pci.h diff --git a/target/linux/layerscape/patches-4.9/302-dts-support-layercape.patch b/target/linux/layerscape/patches-4.9/302-dts-support-layercape.patch index 7dae7d6ac..361f43c6b 100644 --- a/target/linux/layerscape/patches-4.9/302-dts-support-layercape.patch +++ b/target/linux/layerscape/patches-4.9/302-dts-support-layercape.patch @@ -1,9 +1,9 @@ -From bfa4a794f91162cfeccfa4d59121cde9a84e32a3 Mon Sep 17 00:00:00 2001 +From 1806d342beb334c8cb0a438315ad5529262b2791 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 10:02:10 +0800 -Subject: [PATCH] dts: support layercape +Date: Wed, 17 Jan 2018 14:52:50 +0800 +Subject: [PATCH 04/30] dts: support layercape -This is a integrated patch for layerscape dts support. +This is an integrated patch for layerscape dts support. Signed-off-by: Amrita Kumari Signed-off-by: Alison Wang @@ -32,9 +32,9 @@ Signed-off-by: Yangbo Lu arch/arm/boot/dts/ecx-2000.dts | 2 +- arch/arm/boot/dts/imx6ul.dtsi | 4 +- arch/arm/boot/dts/keystone.dtsi | 4 +- - arch/arm/boot/dts/ls1021a-qds.dts | 13 + - arch/arm/boot/dts/ls1021a-twr.dts | 13 + - arch/arm/boot/dts/ls1021a.dtsi | 155 ++-- + arch/arm/boot/dts/ls1021a-qds.dts | 21 + + arch/arm/boot/dts/ls1021a-twr.dts | 25 + + arch/arm/boot/dts/ls1021a.dtsi | 197 +++-- arch/arm/boot/dts/mt6580.dtsi | 2 +- arch/arm/boot/dts/mt6589.dtsi | 2 +- arch/arm/boot/dts/mt8127.dtsi | 2 +- @@ -44,28 +44,29 @@ Signed-off-by: Yangbo Lu arch/arm/boot/dts/sun7i-a20.dtsi | 4 +- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +- arch/arm/boot/dts/sun9i-a80.dtsi | 2 +- - arch/arm64/boot/dts/freescale/Makefile | 16 + + arch/arm64/boot/dts/freescale/Makefile | 17 + + .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 123 +++ arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 177 ++++ - arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 198 +++++ - arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 134 +++ - arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 594 ++++++++++++++ + arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 202 +++++ + arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 138 ++++ + arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 602 ++++++++++++++ arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 45 + .../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts | 69 ++ arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 171 +++- .../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts | 69 ++ .../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 117 +++ arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 113 ++- - arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 302 ++++++- + arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 308 ++++++- arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi | 48 ++ - .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 109 +++ + .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 110 +++ arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 363 ++++++++ - .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 76 ++ + .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 83 ++ .../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 110 +++ arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 218 +++++ - arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 793 ++++++++++++++++++ + arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 800 ++++++++++++++++++ arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 173 ++++ arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 236 ++++++ - arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 818 ++++++++++++++++++ + arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 825 ++++++++++++++++++ arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 191 ++--- arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 169 ++-- arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 9 +- @@ -76,9 +77,9 @@ Signed-off-by: Yangbo Lu arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 195 +++++ arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++ arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++ - arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 912 +++++++++++++++++++++ + arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 919 +++++++++++++++++++++ .../boot/dts/freescale/qoriq-bman1-portals.dtsi | 81 ++ - arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 66 ++ + arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 73 ++ .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 43 + .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 43 + .../boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi | 42 + @@ -93,7 +94,8 @@ Signed-off-by: Yangbo Lu arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi | 10 + arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +- arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +- - 66 files changed, 7988 insertions(+), 1021 deletions(-) + 67 files changed, 8231 insertions(+), 1022 deletions(-) + create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts @@ -221,6 +223,18 @@ Signed-off-by: Yangbo Lu &enet0 { tbi-handle = <&tbi0>; phy-handle = <&sgmii_phy1c>; +@@ -331,3 +344,11 @@ + &uart1 { + status = "okay"; + }; ++ ++&can0 { ++ status = "okay"; ++}; ++ ++&can1 { ++ status = "okay"; ++}; --- a/arch/arm/boot/dts/ls1021a-twr.dts +++ b/arch/arm/boot/dts/ls1021a-twr.dts @@ -142,6 +142,19 @@ @@ -243,6 +257,29 @@ Signed-off-by: Yangbo Lu &enet0 { tbi-handle = <&tbi1>; phy-handle = <&sgmii_phy2>; +@@ -228,6 +241,10 @@ + }; + }; + ++&esdhc { ++ status = "okay"; ++}; ++ + &sai1 { + status = "okay"; + }; +@@ -243,3 +260,11 @@ + &uart1 { + status = "okay"; + }; ++ ++&can0 { ++ status = "okay"; ++}; ++ ++&can1 { ++ status = "okay"; ++}; --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -74,17 +74,24 @@ @@ -303,7 +340,7 @@ Signed-off-by: Yangbo Lu reg = <0x0 0x1570e08 0x0 0x8>; msi-controller; interrupts = ; -@@ -137,11 +144,12 @@ +@@ -137,16 +144,17 @@ compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x1530000 0x0 0x10000>; interrupts = ; @@ -317,6 +354,12 @@ Signed-off-by: Yangbo Lu big-endian; }; + esdhc: esdhc@1560000 { +- compatible = "fsl,esdhc"; ++ compatible = "fsl,ls1021a-esdhc","fsl,esdhc"; + reg = <0x0 0x1560000 0x0 0x10000>; + interrupts = ; + clock-frequency = <0>; @@ -163,7 +171,7 @@ <0x0 0x20220520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; @@ -536,9 +579,9 @@ Signed-off-by: Yangbo Lu + + qdma: qdma@8390000 { + compatible = "fsl,ls1021a-qdma"; -+ reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */ -+ <0x0 0x8389000 0x0 0x1000>, /* Status regs */ -+ <0x0 0x838a000 0x0 0x2000>; /* Block regs */ ++ reg = <0x0 0x8398000 0x0 0x1000>, /* Controller regs */ ++ <0x0 0x8399000 0x0 0x1000>, /* Status regs */ ++ <0x0 0x839a000 0x0 0x2000>; /* Block regs */ + interrupts = , + ; + interrupt-names = "qdma-error", "qdma-queue"; @@ -609,6 +652,52 @@ Signed-off-by: Yangbo Lu #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, +@@ -674,5 +697,45 @@ + <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; + }; ++ ++ can0: can@2a70000 { ++ compatible = "fsl,ls1021ar2-flexcan"; ++ reg = <0x0 0x2a70000 0x0 0x1000>; ++ interrupts = ; ++ clocks = <&clockgen 4 1>, <&clockgen 4 1>; ++ clock-names = "ipg", "per"; ++ big-endian; ++ status = "disabled"; ++ }; ++ ++ can1: can@2a80000 { ++ compatible = "fsl,ls1021ar2-flexcan"; ++ reg = <0x0 0x2a80000 0x0 0x1000>; ++ interrupts = ; ++ clocks = <&clockgen 4 1>, <&clockgen 4 1>; ++ clock-names = "ipg", "per"; ++ big-endian; ++ status = "disabled"; ++ }; ++ ++ can2: can@2a90000 { ++ compatible = "fsl,ls1021ar2-flexcan"; ++ reg = <0x0 0x2a90000 0x0 0x1000>; ++ interrupts = ; ++ clocks = <&clockgen 4 1>, <&clockgen 4 1>; ++ clock-names = "ipg", "per"; ++ big-endian; ++ status = "disabled"; ++ }; ++ ++ can3: can@2aa0000 { ++ compatible = "fsl,ls1021ar2-flexcan"; ++ reg = <0x0 0x2aa0000 0x0 0x1000>; ++ interrupts = ; ++ clocks = <&clockgen 4 1>, <&clockgen 4 1>; ++ clock-names = "ipg", "per"; ++ big-endian; ++ status = "disabled"; ++ }; + }; + }; --- a/arch/arm/boot/dts/mt6580.dtsi +++ b/arch/arm/boot/dts/mt6580.dtsi @@ -91,7 +91,7 @@ @@ -713,10 +802,11 @@ Signed-off-by: Yangbo Lu interrupt-controller; --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile -@@ -1,8 +1,24 @@ +@@ -1,8 +1,25 @@ +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb ++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb @@ -739,6 +829,132 @@ Signed-off-by: Yangbo Lu always := $(dtb-y) subdir-y := $(dts-dirs) --- /dev/null ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts +@@ -0,0 +1,123 @@ ++/* ++ * Device Tree file for NXP LS1012A 2G5RDB Board. ++ * ++ * Copyright 2017 NXP ++ * ++ * Bhaskar Upadhaya ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPLv2 or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This library is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This library is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++/dts-v1/; ++ ++#include "fsl-ls1012a.dtsi" ++ ++/ { ++ model = "LS1012A 2G5RDB Board"; ++ compatible = "fsl,ls1012a-rdb", "fsl,ls1012a"; ++ ++ aliases { ++ ethernet0 = &pfe_mac0; ++ ethernet1 = &pfe_mac1; ++ }; ++}; ++ ++&duart0 { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++}; ++ ++&qspi { ++ num-cs = <2>; ++ bus-num = <0>; ++ status = "okay"; ++ ++ qflash0: s25fs512s@0 { ++ compatible = "spansion,m25p80"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ spi-max-frequency = <20000000>; ++ m25p,fast-read; ++ reg = <0>; ++ }; ++}; ++ ++&sata { ++ status = "okay"; ++}; ++ ++&pfe { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ethernet@0 { ++ compatible = "fsl,pfe-gemac-port"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x0>; /* GEM_ID */ ++ fsl,gemac-bus-id = <0x0>; /* BUS_ID */ ++ fsl,gemac-phy-id = <0x1>; /* PHY_ID */ ++ fsl,mdio-mux-val = <0x0>; ++ phy-mode = "sgmii-2500"; ++ fsl,pfe-phy-if-flags = <0x0>; ++ ++ mdio@0 { ++ reg = <0x1>; /* enabled/disabled */ ++ }; ++ }; ++ ++ ethernet@1 { ++ compatible = "fsl,pfe-gemac-port"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x1>; /* GEM_ID */ ++ fsl,gemac-bus-id = < 0x0>; /* BUS_ID */ ++ fsl,gemac-phy-id = < 0x2>; /* PHY_ID */ ++ fsl,mdio-mux-val = <0x0>; ++ phy-mode = "sgmii-2500"; ++ fsl,pfe-phy-if-flags = <0x0>; ++ ++ mdio@0 { ++ reg = <0x0>; /* enabled/disabled */ ++ }; ++ }; ++}; +--- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts @@ -0,0 +1,177 @@ +/* @@ -920,7 +1136,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts -@@ -0,0 +1,198 @@ +@@ -0,0 +1,202 @@ +/* + * Device Tree file for Freescale LS1012A QDS Board. + * @@ -1021,6 +1237,10 @@ Signed-off-by: Yangbo Lu + }; +}; + ++&pcie { ++ status = "okay"; ++}; ++ +&duart0 { + status = "okay"; +}; @@ -1121,7 +1341,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts -@@ -0,0 +1,134 @@ +@@ -0,0 +1,138 @@ +/* + * Device Tree file for Freescale LS1012A RDB Board. + * @@ -1179,6 +1399,10 @@ Signed-off-by: Yangbo Lu + }; +}; + ++&pcie { ++ status = "okay"; ++}; ++ +&duart0 { + status = "okay"; +}; @@ -1258,7 +1482,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi -@@ -0,0 +1,594 @@ +@@ -0,0 +1,602 @@ +/* + * Device Tree Include file for Freescale Layerscape-1012A family SoC. + * @@ -1641,7 +1865,7 @@ Signed-off-by: Yangbo Lu + #size-cells = <0>; + reg = <0x0 0x2180000 0x0 0x10000>; + interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&clockgen 4 0>; ++ clocks = <&clockgen 4 3>; + status = "disabled"; + }; + @@ -1651,7 +1875,7 @@ Signed-off-by: Yangbo Lu + #size-cells = <0>; + reg = <0x0 0x2190000 0x0 0x10000>; + interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&clockgen 4 0>; ++ clocks = <&clockgen 4 3>; + status = "disabled"; + }; + @@ -1794,7 +2018,7 @@ Signed-off-by: Yangbo Lu + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; + }; + -+ pcie@3400000 { ++ pcie: pcie@3400000 { + compatible = "fsl,ls1012a-pcie", "snps,dw-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ @@ -1816,6 +2040,7 @@ Signed-off-by: Yangbo Lu + <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>, + <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; ++ status = "disabled"; + }; + }; + @@ -1852,6 +2077,13 @@ Signed-off-by: Yangbo Lu + pfe_mac1: ethernet@1 { + }; + }; ++ ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi @@ -3006,9 +3238,16 @@ Signed-off-by: Yangbo Lu #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 154 0x4>, -@@ -608,3 +869,6 @@ +@@ -607,4 +868,13 @@ + }; }; ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; }; + +#include "qoriq-qman1-portals.dtsi" @@ -3066,7 +3305,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts -@@ -0,0 +1,109 @@ +@@ -0,0 +1,110 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * @@ -3137,6 +3376,7 @@ Signed-off-by: Yangbo Lu + ethernet@9 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; ++ dma-coherent; + }; +}; + @@ -3544,7 +3784,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts -@@ -0,0 +1,76 @@ +@@ -0,0 +1,83 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * @@ -3612,9 +3852,16 @@ Signed-off-by: Yangbo Lu +}; + +&fsldpaa { ++ ethernet@0 { ++ status = "disabled"; ++ }; ++ ethernet@1 { ++ status = "disabled"; ++ }; + ethernet@9 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; ++ dma-coherent; + }; +}; + @@ -3957,7 +4204,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi -@@ -0,0 +1,793 @@ +@@ -0,0 +1,800 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * @@ -4747,6 +4994,13 @@ Signed-off-by: Yangbo Lu + no-map; + }; + }; ++ ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; +}; + +#include "qoriq-qman1-portals.dtsi" @@ -5168,7 +5422,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi -@@ -0,0 +1,818 @@ +@@ -0,0 +1,825 @@ +/* + * Device Tree Include file for NXP Layerscape-1088A family SoC. + * @@ -5694,7 +5948,7 @@ Signed-off-by: Yangbo Lu + #size-cells = <0>; + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 7>; + status = "disabled"; + }; + @@ -5704,7 +5958,7 @@ Signed-off-by: Yangbo Lu + #size-cells = <0>; + reg = <0x0 0x2010000 0x0 0x10000>; + interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 7>; + status = "disabled"; + }; + @@ -5714,7 +5968,7 @@ Signed-off-by: Yangbo Lu + #size-cells = <0>; + reg = <0x0 0x2020000 0x0 0x10000>; + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 7>; + status = "disabled"; + }; + @@ -5724,7 +5978,7 @@ Signed-off-by: Yangbo Lu + #size-cells = <0>; + reg = <0x0 0x2030000 0x0 0x10000>; + interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 7>; + status = "disabled"; + }; + @@ -5986,6 +6240,13 @@ Signed-off-by: Yangbo Lu + }; + }; + ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; ++ +}; --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts @@ -8332,7 +8593,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi -@@ -0,0 +1,912 @@ +@@ -0,0 +1,919 @@ +/* + * Device Tree Include file for Freescale Layerscape-2080A family SoC. + * @@ -9024,7 +9285,7 @@ Signed-off-by: Yangbo Lu + reg = <0x0 0x2000000 0x0 0x10000>; + interrupts = <0 34 0x4>; /* Level high type */ + clock-names = "i2c"; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 1>; + }; + + i2c1: i2c@2010000 { @@ -9035,7 +9296,7 @@ Signed-off-by: Yangbo Lu + reg = <0x0 0x2010000 0x0 0x10000>; + interrupts = <0 34 0x4>; /* Level high type */ + clock-names = "i2c"; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 1>; + }; + + i2c2: i2c@2020000 { @@ -9046,7 +9307,7 @@ Signed-off-by: Yangbo Lu + reg = <0x0 0x2020000 0x0 0x10000>; + interrupts = <0 35 0x4>; /* Level high type */ + clock-names = "i2c"; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 1>; + }; + + i2c3: i2c@2030000 { @@ -9057,7 +9318,7 @@ Signed-off-by: Yangbo Lu + reg = <0x0 0x2030000 0x0 0x10000>; + interrupts = <0 35 0x4>; /* Level high type */ + clock-names = "i2c"; -+ clocks = <&clockgen 4 3>; ++ clocks = <&clockgen 4 1>; + }; + + ifc: ifc@2240000 { @@ -9244,6 +9505,13 @@ Signed-off-by: Yangbo Lu + interrupts = <0 18 0x4>; + little-endian; + }; ++ ++ firmware { ++ optee { ++ compatible = "linaro,optee-tz"; ++ method = "smc"; ++ }; ++ }; +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi @@ -9331,7 +9599,7 @@ Signed-off-by: Yangbo Lu +}; --- /dev/null +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi -@@ -0,0 +1,66 @@ +@@ -0,0 +1,73 @@ +/* + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ] + * @@ -9371,30 +9639,37 @@ Signed-off-by: Yangbo Lu + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; ++ dma-coherent; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; ++ dma-coherent; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; ++ dma-coherent; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; ++ dma-coherent; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; ++ dma-coherent; + }; + ethernet@5 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; ++ dma-coherent; + }; + ethernet@8 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet6>; ++ dma-coherent; + }; +}; + diff --git a/target/linux/layerscape/patches-4.9/303-arm-imx-select-ARCH_DMA_ADDR_T_64BIT-for-LPAE.patch b/target/linux/layerscape/patches-4.9/303-arm-imx-select-ARCH_DMA_ADDR_T_64BIT-for-LPAE.patch deleted file mode 100644 index 097c4320f..000000000 --- a/target/linux/layerscape/patches-4.9/303-arm-imx-select-ARCH_DMA_ADDR_T_64BIT-for-LPAE.patch +++ /dev/null @@ -1,23 +0,0 @@ -From c079739fa1101dcf7a1e40a195e019065e327d15 Mon Sep 17 00:00:00 2001 -From: Yangbo Lu -Date: Fri, 20 Oct 2017 16:45:17 +0800 -Subject: [PATCH] arm: imx: select ARCH_DMA_ADDR_T_64BIT for LPAE - -Selected ARCH_DMA_ADDR_T_64BIT for LPAE since -hardware could support it. - -Signed-off-by: Yangbo Lu ---- - arch/arm/mach-imx/Kconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/mach-imx/Kconfig -+++ b/arch/arm/mach-imx/Kconfig -@@ -1,6 +1,7 @@ - menuconfig ARCH_MXC - bool "Freescale i.MX family" - depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M -+ select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE - select ARCH_SUPPORTS_BIG_ENDIAN - select CLKSRC_IMX_GPT - select GENERIC_IRQ_CHIP diff --git a/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch b/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch index e4e7ff47a..6ffc2e109 100644 --- a/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/401-mtd-spi-nor-support-layerscape.patch @@ -1,9 +1,9 @@ -From a3757157751a8a5302ee5e11faf828dc5db02018 Mon Sep 17 00:00:00 2001 +From 825d57369b196b64387348922b47adc5b651622c Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 10:53:50 +0800 -Subject: [PATCH] mtd: spi-nor: support layerscape +Date: Wed, 17 Jan 2018 14:55:47 +0800 +Subject: [PATCH 05/30] mtd: spi-nor: support layerscape -This is a integrated patch for layerscape qspi support. +This is an integrated patch for layerscape qspi support. Signed-off-by: Suresh Gupta Signed-off-by: Yunhui Cui diff --git a/target/linux/layerscape/patches-4.9/402-mtd-support-layerscape.patch b/target/linux/layerscape/patches-4.9/402-mtd-support-layerscape.patch index c4f15111c..6b3485700 100644 --- a/target/linux/layerscape/patches-4.9/402-mtd-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/402-mtd-support-layerscape.patch @@ -1,9 +1,9 @@ -From c0e4767d3b26f21e5043fe2d15a24a1958de766e Mon Sep 17 00:00:00 2001 +From d9d0181f74146507026c31cccd52dda27ec3d966 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 10:17:28 +0800 -Subject: [PATCH] mtd: support layerscape +Date: Wed, 17 Jan 2018 14:57:31 +0800 +Subject: [PATCH 06/30] mtd: support layerscape -This is a integrated patch for layerscape ifc-nor-nand support. +This is an integrated patch for layerscape ifc-nor-nand support. Signed-off-by: Alison Wang Signed-off-by: Prabhakar Kushwaha @@ -358,7 +358,7 @@ Signed-off-by: Yangbo Lu help --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c -@@ -904,9 +904,12 @@ static int fsl_ifc_chip_init(struct fsl_ +@@ -898,7 +898,7 @@ static int fsl_ifc_chip_init(struct fsl_ chip->ecc.algo = NAND_ECC_HAMMING; } @@ -366,12 +366,7 @@ Signed-off-by: Yangbo Lu + if (ctrl->version >= FSL_IFC_VERSION_1_1_0) fsl_ifc_sram_init(priv); -+ if (ctrl->version >= FSL_IFC_VERSION_2_0_0) -+ priv->bufnum_mask = (priv->bufnum_mask * 2) + 1; -+ - return 0; - } - + /* --- a/include/linux/fsl_ifc.h +++ b/include/linux/fsl_ifc.h @@ -274,6 +274,8 @@ @@ -383,7 +378,7 @@ Signed-off-by: Yangbo Lu /* Addressing Mode-ROW0+n/COL0 */ #define IFC_NAND_NCFGR_ADDR_MODE_RC0 0x00000000 /* Addressing Mode-ROW0+n/COL0+n */ -@@ -861,6 +863,11 @@ struct fsl_ifc_ctrl { +@@ -857,6 +859,11 @@ struct fsl_ifc_ctrl { u32 nand_stat; wait_queue_head_t nand_wait; bool little_endian; diff --git a/target/linux/layerscape/patches-4.9/701-sdk_dpaa-support-layerscape.patch b/target/linux/layerscape/patches-4.9/701-sdk_dpaa-support-layerscape.patch index 4ebcdc73a..c318c579b 100644 --- a/target/linux/layerscape/patches-4.9/701-sdk_dpaa-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/701-sdk_dpaa-support-layerscape.patch @@ -1,29 +1,30 @@ -From 3cd36deb674720ab34eabb9783648ed743e52121 Mon Sep 17 00:00:00 2001 +From 2f887ade916e7e1de2f8a84d3902aaa30af4b163 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 11:58:03 +0800 -Subject: [PATCH] sdk_dpaa: support layerscape +Date: Wed, 17 Jan 2018 14:59:15 +0800 +Subject: [PATCH 07/30] sdk_dpaa: support layerscape -This is a integrated patch for layerscape dpaa1-sdk support. +This is an integrated patch for layerscape dpaa1-sdk support. Signed-off-by: Camelia Groza Signed-off-by: Zhao Qiang Signed-off-by: Zhang Ying-22455 Signed-off-by: Madalin Bucur +Signed-off-by: Mathew McBride Signed-off-by: Yangbo Lu --- - drivers/net/ethernet/freescale/sdk_dpaa/Kconfig | 173 + + drivers/net/ethernet/freescale/sdk_dpaa/Kconfig | 196 + drivers/net/ethernet/freescale/sdk_dpaa/Makefile | 46 + .../net/ethernet/freescale/sdk_dpaa/dpaa_1588.c | 580 ++ .../net/ethernet/freescale/sdk_dpaa/dpaa_1588.h | 138 + .../net/ethernet/freescale/sdk_dpaa/dpaa_debugfs.c | 180 + .../net/ethernet/freescale/sdk_dpaa/dpaa_debugfs.h | 43 + - drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.c | 1213 ++++ + drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.c | 1224 ++++ drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.h | 687 ++ .../ethernet/freescale/sdk_dpaa/dpaa_eth_base.c | 205 + .../ethernet/freescale/sdk_dpaa/dpaa_eth_base.h | 49 + - .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c | 1992 +++++ - .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.h | 237 + - .../ethernet/freescale/sdk_dpaa/dpaa_eth_common.c | 1820 +++++ + .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c | 2013 ++++++ + .../ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.h | 238 + + .../ethernet/freescale/sdk_dpaa/dpaa_eth_common.c | 1802 +++++ .../ethernet/freescale/sdk_dpaa/dpaa_eth_common.h | 225 + .../ethernet/freescale/sdk_dpaa/dpaa_eth_proxy.c | 381 + .../net/ethernet/freescale/sdk_dpaa/dpaa_eth_sg.c | 1168 +++ @@ -241,14 +242,14 @@ Signed-off-by: Yangbo Lu drivers/staging/fsl_qbman/dpa_sys_arm64.h | 102 + drivers/staging/fsl_qbman/dpa_sys_ppc32.h | 70 + drivers/staging/fsl_qbman/dpa_sys_ppc64.h | 79 + - drivers/staging/fsl_qbman/fsl_usdpaa.c | 1983 +++++ + drivers/staging/fsl_qbman/fsl_usdpaa.c | 2007 ++++++ drivers/staging/fsl_qbman/fsl_usdpaa_irq.c | 289 + drivers/staging/fsl_qbman/qbman_driver.c | 88 + drivers/staging/fsl_qbman/qman_config.c | 1224 ++++ drivers/staging/fsl_qbman/qman_debugfs.c | 1594 ++++ drivers/staging/fsl_qbman/qman_driver.c | 977 +++ drivers/staging/fsl_qbman/qman_high.c | 5669 +++++++++++++++ - drivers/staging/fsl_qbman/qman_low.h | 1427 ++++ + drivers/staging/fsl_qbman/qman_low.h | 1442 ++++ drivers/staging/fsl_qbman/qman_private.h | 398 + drivers/staging/fsl_qbman/qman_test.c | 57 + drivers/staging/fsl_qbman/qman_test.h | 45 + @@ -268,7 +269,7 @@ Signed-off-by: Yangbo Lu .../linux/fmd/integrations/integration_ioctls.h | 56 + include/uapi/linux/fmd/ioctls.h | 96 + include/uapi/linux/fmd/net_ioctls.h | 430 ++ - 257 files changed, 153159 insertions(+) + 257 files changed, 153236 insertions(+) create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/Kconfig create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/Makefile create mode 100644 drivers/net/ethernet/freescale/sdk_dpaa/dpaa_1588.c @@ -529,7 +530,7 @@ Signed-off-by: Yangbo Lu --- /dev/null +++ b/drivers/net/ethernet/freescale/sdk_dpaa/Kconfig -@@ -0,0 +1,173 @@ +@@ -0,0 +1,196 @@ +menuconfig FSL_SDK_DPAA_ETH + tristate "DPAA Ethernet" + depends on (FSL_SOC || ARM64 || ARM) && FSL_SDK_BMAN && FSL_SDK_QMAN && FSL_SDK_FMAN && !FSL_DPAA_ETH @@ -552,6 +553,29 @@ Signed-off-by: Yangbo Lu + help + Enable QoS offloading support through the CEETM hardware block. + ++config FSL_DPAA_CEETM_CCS_THRESHOLD_1G ++ hex "CEETM egress congestion threshold on 1G ports" ++ depends on FSL_DPAA_CEETM ++ range 0x1000 0x10000000 ++ default "0x000a0000" ++ help ++ The size in bytes of the CEETM egress Class Congestion State threshold on 1G ports. ++ The threshold needs to be configured keeping in mind the following factors: ++ - A threshold too large will buffer frames for a long time in the TX queues, ++ when a small shaping rate is configured. This will cause buffer pool depletion ++ or out of memory errors. This in turn will cause frame loss on RX; ++ - A threshold too small will cause unnecessary frame loss by entering ++ congestion too often. ++ ++config FSL_DPAA_CEETM_CCS_THRESHOLD_10G ++ hex "CEETM egress congestion threshold on 10G ports" ++ depends on FSL_DPAA_CEETM ++ range 0x1000 0x20000000 ++ default "0x00640000" ++ help ++ The size in bytes of the CEETM egress Class Congestion State threshold on 10G ports. ++ See FSL_DPAA_CEETM_CCS_THRESHOLD_1G for details. ++ +config FSL_DPAA_OFFLINE_PORTS + bool "Offline Ports support" + depends on FSL_SDK_DPAA_ETH @@ -1707,7 +1731,7 @@ Signed-off-by: Yangbo Lu +#endif /* DPAA_DEBUGFS_H_ */ --- /dev/null +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth.c -@@ -0,0 +1,1213 @@ +@@ -0,0 +1,1224 @@ +/* Copyright 2008-2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -2485,6 +2509,17 @@ Signed-off-by: Yangbo Lu + /* Advertise NETIF_F_HW_ACCEL_MQ to avoid Tx timeout warnings */ + net_dev->features |= NETIF_F_HW_ACCEL_MQ; + ++#ifndef CONFIG_PPC ++ /* Due to the A010022 FMan errata, we can not use contig frames larger ++ * than 4K, nor S/G frames. We need to stop advertising S/G and GSO ++ * support. ++ */ ++ if (unlikely(dpaa_errata_a010022)) { ++ net_dev->hw_features &= ~NETIF_F_SG; ++ net_dev->features &= ~NETIF_F_GSO; ++ } ++#endif ++ + return dpa_netdev_init(net_dev, mac_addr, tx_timeout); +} + @@ -2573,7 +2608,7 @@ Signed-off-by: Yangbo Lu + + for (i = 0; i < count; i++) { + int err; -+ err = dpa_bp_alloc(&dpa_bp[i]); ++ err = dpa_bp_alloc(&dpa_bp[i], net_dev->dev.parent); + if (err < 0) { + dpa_bp_free(priv); + priv->dpa_bp = NULL; @@ -3792,7 +3827,7 @@ Signed-off-by: Yangbo Lu + + for (i = 0; i < count; i++) { + int err; -+ err = dpa_bp_alloc(&dpa_bp[i]); ++ err = dpa_bp_alloc(&dpa_bp[i], net_dev->dev.parent); + if (err < 0) { + dpa_bp_free(priv); + priv->dpa_bp = NULL; @@ -3873,7 +3908,7 @@ Signed-off-by: Yangbo Lu +#endif /* __DPAA_ETH_BASE_H */ --- /dev/null +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.c -@@ -0,0 +1,1992 @@ +@@ -0,0 +1,2013 @@ +/* Copyright 2008-2016 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -3945,24 +3980,27 @@ Signed-off-by: Yangbo Lu +static void ceetm_ern(struct qman_portal *portal, struct qman_fq *fq, + const struct qm_mr_entry *msg) +{ -+ struct net_device *net_dev; -+ struct ceetm_class *cls; ++ struct dpa_percpu_priv_s *dpa_percpu_priv; + struct ceetm_class_stats *cstats = NULL; + const struct dpa_priv_s *dpa_priv; -+ struct dpa_percpu_priv_s *dpa_percpu_priv; -+ struct sk_buff *skb; + struct qm_fd fd = msg->ern.fd; ++ struct net_device *net_dev; ++ struct ceetm_fq *ceetm_fq; ++ struct ceetm_class *cls; ++ struct sk_buff *skb; + -+ net_dev = ((struct ceetm_fq *)fq)->net_dev; ++ ceetm_fq = container_of(fq, struct ceetm_fq, fq); ++ net_dev = ceetm_fq->net_dev; + dpa_priv = netdev_priv(net_dev); + dpa_percpu_priv = raw_cpu_ptr(dpa_priv->percpu_priv); + + /* Increment DPA counters */ + dpa_percpu_priv->stats.tx_dropped++; + dpa_percpu_priv->stats.tx_fifo_errors++; ++ count_ern(dpa_percpu_priv, msg); + + /* Increment CEETM counters */ -+ cls = ((struct ceetm_fq *)fq)->ceetm_cls; ++ cls = ceetm_fq->ceetm_cls; + switch (cls->type) { + case CEETM_PRIO: + cstats = this_cpu_ptr(cls->prio.cstats); @@ -3975,11 +4013,15 @@ Signed-off-by: Yangbo Lu + if (cstats) + cstats->ern_drop_count++; + ++ /* Release the buffers that were supposed to be recycled. */ + if (fd.bpid != 0xff) { + dpa_fd_release(net_dev, &fd); + return; + } + ++ /* Release the frames that were supposed to return on the ++ * confirmation path. ++ */ + skb = _dpa_cleanup_tx_fd(dpa_priv, &fd); + dev_kfree_skb_any(skb); +} @@ -4001,16 +4043,16 @@ Signed-off-by: Yangbo Lu + break; + } + ++ ceetm_fq->congested = congested; ++ + if (congested) { + dpa_priv->cgr_data.congestion_start_jiffies = jiffies; -+ netif_tx_stop_all_queues(dpa_priv->net_dev); + dpa_priv->cgr_data.cgr_congested_count++; + if (cstats) + cstats->congested_count++; + } else { + dpa_priv->cgr_data.congested_jiffies += + (jiffies - dpa_priv->cgr_data.congestion_start_jiffies); -+ netif_tx_wake_all_queues(dpa_priv->net_dev); + } +} + @@ -4024,6 +4066,7 @@ Signed-off-by: Yangbo Lu + + (*fq)->net_dev = dev; + (*fq)->ceetm_cls = cls; ++ (*fq)->congested = 0; + return 0; +} + @@ -4061,9 +4104,9 @@ Signed-off-by: Yangbo Lu + + /* Set the congestion state thresholds according to the link speed */ + if (dpa_priv->mac_dev->if_support & SUPPORTED_10000baseT_Full) -+ cs_th = CONFIG_FSL_DPAA_CS_THRESHOLD_10G; ++ cs_th = CONFIG_FSL_DPAA_CEETM_CCS_THRESHOLD_10G; + else -+ cs_th = CONFIG_FSL_DPAA_CS_THRESHOLD_1G; ++ cs_th = CONFIG_FSL_DPAA_CEETM_CCS_THRESHOLD_1G; + + qm_cgr_cs_thres_set64(&ccg_params.cs_thres_in, cs_th, 1); + qm_cgr_cs_thres_set64(&ccg_params.cs_thres_out, @@ -5784,17 +5827,22 @@ Signed-off-by: Yangbo Lu + +int __hot ceetm_tx(struct sk_buff *skb, struct net_device *net_dev) +{ -+ int ret; -+ bool act_drop = false; -+ struct Qdisc *sch = net_dev->qdisc; -+ struct ceetm_class *cl; -+ struct dpa_priv_s *priv_dpa; -+ struct qman_fq *egress_fq, *conf_fq; -+ struct ceetm_qdisc *priv = qdisc_priv(sch); -+ struct ceetm_qdisc_stats *qstats = this_cpu_ptr(priv->root.qstats); -+ struct ceetm_class_stats *cstats; + const int queue_mapping = dpa_get_queue_mapping(skb); -+ spinlock_t *root_lock = qdisc_lock(sch); ++ struct Qdisc *sch = net_dev->qdisc; ++ struct ceetm_class_stats *cstats; ++ struct ceetm_qdisc_stats *qstats; ++ struct dpa_priv_s *priv_dpa; ++ struct ceetm_fq *ceetm_fq; ++ struct ceetm_qdisc *priv; ++ struct qman_fq *conf_fq; ++ struct ceetm_class *cl; ++ spinlock_t *root_lock; ++ bool act_drop = false; ++ int ret; ++ ++ root_lock = qdisc_lock(sch); ++ priv = qdisc_priv(sch); ++ qstats = this_cpu_ptr(priv->root.qstats); + + spin_lock(root_lock); + cl = ceetm_classify(skb, sch, &ret, &act_drop); @@ -5821,11 +5869,11 @@ Signed-off-by: Yangbo Lu + */ + switch (cl->type) { + case CEETM_PRIO: -+ egress_fq = &cl->prio.fq->fq; ++ ceetm_fq = cl->prio.fq; + cstats = this_cpu_ptr(cl->prio.cstats); + break; + case CEETM_WBFS: -+ egress_fq = &cl->wbfs.fq->fq; ++ ceetm_fq = cl->wbfs.fq; + cstats = this_cpu_ptr(cl->wbfs.cstats); + break; + default: @@ -5833,8 +5881,16 @@ Signed-off-by: Yangbo Lu + goto drop; + } + ++ /* If the FQ is congested, avoid enqueuing the frame and dropping it ++ * when it returns on the ERN path. Drop it here directly instead. ++ */ ++ if (unlikely(ceetm_fq->congested)) { ++ qstats->drops++; ++ goto drop; ++ } ++ + bstats_update(&cstats->bstats, skb); -+ return dpa_tx_extended(skb, net_dev, egress_fq, conf_fq); ++ return dpa_tx_extended(skb, net_dev, &ceetm_fq->fq, conf_fq); + +drop: + dev_kfree_skb_any(skb); @@ -5868,7 +5924,7 @@ Signed-off-by: Yangbo Lu +module_exit(ceetm_unregister); --- /dev/null +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_ceetm.h -@@ -0,0 +1,237 @@ +@@ -0,0 +1,238 @@ +/* Copyright 2008-2016 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -5976,6 +6032,7 @@ Signed-off-by: Yangbo Lu + struct qman_fq fq; + struct net_device *net_dev; + struct ceetm_class *ceetm_cls; ++ int congested; /* Congestion status */ +}; + +struct root_q { @@ -6108,7 +6165,7 @@ Signed-off-by: Yangbo Lu +#endif --- /dev/null +++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c -@@ -0,0 +1,1820 @@ +@@ -0,0 +1,1802 @@ +/* Copyright 2008-2013 Freescale Semiconductor, Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -6350,8 +6407,8 @@ Signed-off-by: Yangbo Lu + * Calculates the statistics for the given device by adding the statistics + * collected by each CPU. + */ -+void __cold -+dpa_get_stats64(struct net_device *net_dev, ++struct rtnl_link_stats64 __cold ++*dpa_get_stats64(struct net_device *net_dev, + struct rtnl_link_stats64 *stats) +{ + struct dpa_priv_s *priv = netdev_priv(net_dev); @@ -6369,6 +6426,7 @@ Signed-off-by: Yangbo Lu + for (j = 0; j < numstats; j++) + netstats[j] += cpustats[j]; + } ++ return stats; +} +EXPORT_SYMBOL(dpa_get_stats64); + @@ -6580,14 +6638,18 @@ Signed-off-by: Yangbo Lu +#ifdef CONFIG_FSL_DPAA_1588 + struct dpa_priv_s *priv = netdev_priv(dev); +#endif -+ int ret = 0; ++ int ret = -EINVAL; + -+ /* at least one timestamping feature must be enabled */ -+#ifdef CONFIG_FSL_DPAA_TS + if (!netif_running(dev)) -+#endif + return -EINVAL; + ++ if (cmd == SIOCGMIIREG) { ++ if (!dev->phydev) ++ ret = -EINVAL; ++ else ++ ret = phy_mii_ioctl(dev->phydev, rq, cmd); ++ } ++ +#ifdef CONFIG_FSL_DPAA_TS + if (cmd == SIOCSHWTSTAMP) + return dpa_ts_ioctl(dev, rq, cmd); @@ -6822,11 +6884,10 @@ Signed-off-by: Yangbo Lu +EXPORT_SYMBOL(dpa_set_buffers_layout); + +int __attribute__((nonnull)) -+dpa_bp_alloc(struct dpa_bp *dpa_bp) ++dpa_bp_alloc(struct dpa_bp *dpa_bp, struct device *dev) +{ + int err; + struct bman_pool_params bp_params; -+ struct platform_device *pdev; + + if (dpa_bp->size == 0 || dpa_bp->config_count == 0) { + pr_err("Buffer pool is not properly initialized! Missing size or initial number of buffers"); @@ -6859,44 +6920,25 @@ Signed-off-by: Yangbo Lu + + dpa_bp->bpid = (uint8_t)bman_get_params(dpa_bp->pool)->bpid; + -+ pdev = platform_device_register_simple("dpaa_eth_bpool", -+ dpa_bp->bpid, NULL, 0); -+ if (IS_ERR(pdev)) { -+ pr_err("platform_device_register_simple() failed\n"); -+ err = PTR_ERR(pdev); -+ goto pdev_register_failed; -+ } -+ { -+ struct dma_map_ops *ops = get_dma_ops(&pdev->dev); -+ ops->dma_supported = NULL; -+ } -+ err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40)); ++ err = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(40)); + if (err) { + pr_err("dma_coerce_mask_and_coherent() failed\n"); -+ goto pdev_mask_failed; ++ goto bman_free_pool; + } -+#ifdef CONFIG_FMAN_ARM -+ /* force coherency */ -+ pdev->dev.archdata.dma_coherent = true; -+ arch_setup_dma_ops(&pdev->dev, 0, 0, NULL, true); -+#endif + -+ dpa_bp->dev = &pdev->dev; ++ dpa_bp->dev = dev; + + if (dpa_bp->seed_cb) { + err = dpa_bp->seed_cb(dpa_bp); + if (err) -+ goto pool_seed_failed; ++ goto bman_free_pool; + } + + dpa_bpid2pool_map(dpa_bp->bpid, dpa_bp); + + return 0; + -+pool_seed_failed: -+pdev_mask_failed: -+ platform_device_unregister(pdev); -+pdev_register_failed: ++bman_free_pool: + bman_free_pool(dpa_bp->pool); + + return err; @@ -6958,9 +7000,6 @@ Signed-off-by: Yangbo Lu + + dpa_bp_array[bp->bpid] = NULL; + bman_free_pool(bp->pool); -+ -+ if (bp->dev) -+ platform_device_unregister(to_platform_device(bp->dev)); +} + +void __cold __attribute__((nonnull)) @@ -8074,8 +8113,8 @@ Signed-off-by: Yangbo Lu +int __cold dpa_start(struct net_device *net_dev); +int __cold dpa_stop(struct net_device *net_dev); +void __cold dpa_timeout(struct net_device *net_dev); -+void __cold -+dpa_get_stats64(struct net_device *net_dev, ++struct rtnl_link_stats64 __cold ++*dpa_get_stats64(struct net_device *net_dev, + struct rtnl_link_stats64 *stats); +int dpa_change_mtu(struct net_device *net_dev, int new_mtu); +int dpa_ndo_init(struct net_device *net_dev); @@ -8098,7 +8137,7 @@ Signed-off-by: Yangbo Lu +void dpa_set_buffers_layout(struct mac_device *mac_dev, + struct dpa_buffer_layout_s *layout); +int __attribute__((nonnull)) -+dpa_bp_alloc(struct dpa_bp *dpa_bp); ++dpa_bp_alloc(struct dpa_bp *dpa_bp, struct device *dev); +void __cold __attribute__((nonnull)) +dpa_bp_free(struct dpa_priv_s *priv); +struct dpa_bp *dpa_bpid2pool(int bpid); @@ -11972,7 +12011,7 @@ Signed-off-by: Yangbo Lu + [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid", + [PHY_INTERFACE_MODE_RTBI] = "rtbi", + [PHY_INTERFACE_MODE_XGMII] = "xgmii", -+ [PHY_INTERFACE_MODE_SGMII_2500] = "sgmii-2500", ++ [PHY_INTERFACE_MODE_2500SGMII] = "sgmii-2500", +}; + +static phy_interface_t __pure __attribute__((nonnull)) str2phy(const char *str) @@ -11999,7 +12038,7 @@ Signed-off-by: Yangbo Lu + [PHY_INTERFACE_MODE_RGMII_TXID] = SPEED_1000, + [PHY_INTERFACE_MODE_RTBI] = SPEED_1000, + [PHY_INTERFACE_MODE_XGMII] = SPEED_10000, -+ [PHY_INTERFACE_MODE_SGMII_2500] = SPEED_2500, ++ [PHY_INTERFACE_MODE_2500SGMII] = SPEED_2500, +}; + +static struct mac_device * __cold @@ -129503,7 +129542,7 @@ Signed-off-by: Yangbo Lu +#endif --- /dev/null +++ b/drivers/staging/fsl_qbman/fsl_usdpaa.c -@@ -0,0 +1,1983 @@ +@@ -0,0 +1,2007 @@ +/* Copyright (C) 2008-2012 Freescale Semiconductor, Inc. + * Authors: Andy Fleming + * Timur Tabi @@ -129877,6 +129916,16 @@ Signed-off-by: Yangbo Lu + +#define DQRR_MAXFILL 15 + ++ ++/* Invalidate a portal */ ++void dbci_portal(void *addr) ++{ ++ int i; ++ ++ for (i = 0; i < 0x4000; i += 64) ++ dcbi(addr + i); ++} ++ +/* Reset a QMan portal to its default state */ +static int init_qm_portal(struct qm_portal_config *config, + struct qm_portal *portal) @@ -129890,6 +129939,13 @@ Signed-off-by: Yangbo Lu + /* Make sure interrupts are inhibited */ + qm_out(IIR, 1); + ++ /* ++ * Invalidate the entire CE portal are to ensure no stale ++ * cachelines are present. This should be done on all ++ * cores as the portal is mapped as M=0 (non-coherent). ++ */ ++ on_each_cpu(dbci_portal, portal->addr.addr_ce, 1); ++ + /* Initialize the DQRR. This will stop any dequeue + commands that are in progress */ + if (qm_dqrr_init(portal, config, qm_dqrr_dpush, qm_dqrr_pvb, @@ -129941,6 +129997,13 @@ Signed-off-by: Yangbo Lu + portal->addr.addr_ce = config->addr_virt[DPA_PORTAL_CE]; + portal->addr.addr_ci = config->addr_virt[DPA_PORTAL_CI]; + ++ /* ++ * Invalidate the entire CE portal are to ensure no stale ++ * cachelines are present. This should be done on all ++ * cores as the portal is mapped as M=0 (non-coherent). ++ */ ++ on_each_cpu(dbci_portal, portal->addr.addr_ce, 1); ++ + if (bm_rcr_init(portal, bm_rcr_pvb, bm_rcr_cce)) { + pr_err("Bman RCR initialisation failed\n"); + return 1; @@ -141348,7 +141411,7 @@ Signed-off-by: Yangbo Lu +} --- /dev/null +++ b/drivers/staging/fsl_qbman/qman_low.h -@@ -0,0 +1,1427 @@ +@@ -0,0 +1,1442 @@ +/* Copyright 2008-2011 Freescale Semiconductor, Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -142446,11 +142509,26 @@ Signed-off-by: Yangbo Lu + +static inline int qm_mc_init(struct qm_portal *portal) +{ ++ u8 rr0, rr1; + register struct qm_mc *mc = &portal->mc; ++ + mc->cr = portal->addr.addr_ce + QM_CL_CR; + mc->rr = portal->addr.addr_ce + QM_CL_RR0; -+ mc->rridx = (__raw_readb(&mc->cr->__dont_write_directly__verb) & -+ QM_MCC_VERB_VBIT) ? 0 : 1; ++ ++ /* ++ * The expected valid bit polarity for the next CR command is 0 ++ * if RR1 contains a valid response, and is 1 if RR0 contains a ++ * valid response. If both RR contain all 0, this indicates either ++ * that no command has been executed since reset (in which case the ++ * expected valid bit polarity is 1) ++ */ ++ rr0 = __raw_readb(&mc->rr->verb); ++ rr1 = __raw_readb(&(mc->rr+1)->verb); ++ if ((rr0 == 0 && rr1 == 0) || rr0 != 0) ++ mc->rridx = 1; ++ else ++ mc->rridx = 0; ++ + mc->vbit = mc->rridx ? QM_MCC_VERB_VBIT : 0; +#ifdef CONFIG_FSL_DPA_CHECKING + mc->state = qman_mc_idle; diff --git a/target/linux/layerscape/patches-4.9/702-pci-support-layerscape.patch b/target/linux/layerscape/patches-4.9/702-pci-support-layerscape.patch index 65243518a..3d7febceb 100644 --- a/target/linux/layerscape/patches-4.9/702-pci-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/702-pci-support-layerscape.patch @@ -1,9 +1,9 @@ -From 9e6e0a53b29190dbd86a39304b59c3028f5b36c2 Mon Sep 17 00:00:00 2001 +From 5fcb42fbd224e1103bacbae4785745842cfd6304 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 11:04:10 +0800 -Subject: [PATCH] pci: support layerscape +Date: Wed, 17 Jan 2018 15:00:43 +0800 +Subject: [PATCH 08/30] pci: support layerscape -This is a integrated patch for layerscape pcie support. +This is an integrated patch for layerscape pcie support. Signed-off-by: Po Liu Signed-off-by: Liu Gang @@ -20,12 +20,14 @@ Signed-off-by: Yangbo Lu drivers/pci/host/pci-layerscape-ep-debugfs.c | 758 +++++++++++++++++++++++++++ drivers/pci/host/pci-layerscape-ep.c | 309 +++++++++++ drivers/pci/host/pci-layerscape-ep.h | 115 ++++ - drivers/pci/host/pci-layerscape.c | 38 +- + drivers/pci/host/pci-layerscape.c | 48 +- drivers/pci/host/pcie-designware.c | 6 + drivers/pci/host/pcie-designware.h | 1 + + drivers/pci/pci.c | 2 +- drivers/pci/pcie/portdrv_core.c | 181 +++---- + drivers/pci/quirks.c | 8 + include/linux/pci.h | 1 + - 10 files changed, 1520 insertions(+), 148 deletions(-) + 12 files changed, 1539 insertions(+), 149 deletions(-) create mode 100644 drivers/pci/host/pci-layerscape-ep-debugfs.c create mode 100644 drivers/pci/host/pci-layerscape-ep.c create mode 100644 drivers/pci/host/pci-layerscape-ep.h @@ -1606,8 +1608,12 @@ Signed-off-by: Yangbo Lu +#endif /* _PCIE_LAYERSCAPE_EP_H */ --- a/drivers/pci/host/pci-layerscape.c +++ b/drivers/pci/host/pci-layerscape.c -@@ -35,12 +35,14 @@ +@@ -33,14 +33,18 @@ + + /* PEX Internal Configuration Registers */ #define PCIE_STRFMR1 0x71c /* Symbol Timer & Filter Mask Register1 */ ++#define PCIE_ABSERR 0x8d0 /* Bridge Slave Error Response Register */ ++#define PCIE_ABSERR_SETTING 0x9401 /* Forward error of non-posted request */ #define PCIE_DBI_RO_WR_EN 0x8bc /* DBI Read-Only Write Enable Register */ -/* PEX LUT registers */ @@ -1623,7 +1629,7 @@ Signed-off-by: Yangbo Lu struct pcie_host_ops *ops; }; -@@ -86,6 +88,14 @@ static void ls_pcie_drop_msg_tlp(struct +@@ -86,6 +90,14 @@ static void ls_pcie_drop_msg_tlp(struct iowrite32(val, pcie->pp.dbi_base + PCIE_STRFMR1); } @@ -1638,7 +1644,7 @@ Signed-off-by: Yangbo Lu static int ls1021_pcie_link_up(struct pcie_port *pp) { u32 state; -@@ -134,7 +144,7 @@ static int ls_pcie_link_up(struct pcie_p +@@ -134,7 +146,7 @@ static int ls_pcie_link_up(struct pcie_p struct ls_pcie *pcie = to_ls_pcie(pp); u32 state; @@ -1647,17 +1653,31 @@ Signed-off-by: Yangbo Lu pcie->drvdata->ltssm_shift) & LTSSM_STATE_MASK; -@@ -153,6 +163,9 @@ static void ls_pcie_host_init(struct pci +@@ -144,6 +156,12 @@ static int ls_pcie_link_up(struct pcie_p + return 1; + } + ++/* Forward error response of outbound non-posted requests */ ++static void ls_pcie_fix_error_response(struct ls_pcie *pcie) ++{ ++ iowrite32(PCIE_ABSERR_SETTING, pcie->pp.dbi_base + PCIE_ABSERR); ++} ++ + static void ls_pcie_host_init(struct pcie_port *pp) + { + struct ls_pcie *pcie = to_ls_pcie(pp); +@@ -153,6 +171,10 @@ static void ls_pcie_host_init(struct pci ls_pcie_clear_multifunction(pcie); ls_pcie_drop_msg_tlp(pcie); iowrite32(0, pcie->pp.dbi_base + PCIE_DBI_RO_WR_EN); + + ls_pcie_disable_outbound_atus(pcie); ++ ls_pcie_fix_error_response(pcie); + dw_pcie_setup_rc(pp); } static int ls_pcie_msi_host_init(struct pcie_port *pp, -@@ -196,20 +209,39 @@ static struct ls_pcie_drvdata ls1021_drv +@@ -196,20 +218,40 @@ static struct ls_pcie_drvdata ls1021_drv static struct ls_pcie_drvdata ls1043_drvdata = { .lut_offset = 0x10000, .ltssm_shift = 24, @@ -1694,6 +1714,7 @@ Signed-off-by: Yangbo Lu { .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata }, { .compatible = "fsl,ls2085a-pcie", .data = &ls2080_drvdata }, + { .compatible = "fsl,ls2088a-pcie", .data = &ls2088_drvdata }, ++ { .compatible = "fsl,ls1088a-pcie", .data = &ls2088_drvdata }, { }, }; @@ -1721,6 +1742,17 @@ Signed-off-by: Yangbo Lu +void dw_pcie_disable_outbound_atu(struct pcie_port *pp, int index); #endif /* _PCIE_DESIGNWARE_H */ +--- a/drivers/pci/pci.c ++++ b/drivers/pci/pci.c +@@ -454,7 +454,7 @@ struct resource *pci_find_parent_resourc + pci_bus_for_each_resource(bus, r, i) { + if (!r) + continue; +- if (res->start && resource_contains(r, res)) { ++ if (resource_contains(r, res)) { + + /* + * If the window is prefetchable but the BAR is --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -44,52 +44,30 @@ static void release_pcie_device(struct d @@ -2026,6 +2058,20 @@ Signed-off-by: Yangbo Lu driver->remove(pciedev); put_device(dev); } +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -4654,3 +4654,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_IN + DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2031, quirk_no_aersid); + DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2032, quirk_no_aersid); + DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid); ++ ++/* Freescale PCIe doesn't support MSI in RC mode */ ++static void quirk_fsl_no_msi(struct pci_dev *pdev) ++{ ++ if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT) ++ pdev->no_msi = 1; ++} ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, PCI_ANY_ID, quirk_fsl_no_msi); --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1823,6 +1823,7 @@ void pcibios_release_device(struct pci_d diff --git a/target/linux/layerscape/patches-4.9/703-phy-support-layerscape.patch b/target/linux/layerscape/patches-4.9/703-phy-support-layerscape.patch index 907fb336a..197fd9c50 100644 --- a/target/linux/layerscape/patches-4.9/703-phy-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/703-phy-support-layerscape.patch @@ -1,9 +1,9 @@ -From be07319b9897738a4ab1501880b7dd9be26eba66 Mon Sep 17 00:00:00 2001 +From 8949ebc0c5b982eab7ca493dad7b86c30befa6ec Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 11:54:28 +0800 -Subject: [PATCH] phy: support layerscape +Date: Wed, 17 Jan 2018 15:01:30 +0800 +Subject: [PATCH 09/30] phy: support layerscape -This is a integrated patch for layerscape mdio-phy support. +This is an integrated patch for layerscape mdio-phy support. Signed-off-by: Bogdan Purcareata Signed-off-by: Zhang Ying-22455 @@ -18,11 +18,12 @@ Signed-off-by: Yangbo Lu drivers/net/phy/aquantia.c | 28 + drivers/net/phy/cortina.c | 118 ++++ drivers/net/phy/fsl_backplane.c | 1358 +++++++++++++++++++++++++++++++++++++++ + drivers/net/phy/marvell.c | 2 +- drivers/net/phy/phy.c | 23 +- drivers/net/phy/phy_device.c | 6 +- drivers/net/phy/swphy.c | 1 + - include/linux/phy.h | 4 + - 9 files changed, 1544 insertions(+), 7 deletions(-) + include/linux/phy.h | 6 + + 10 files changed, 1547 insertions(+), 8 deletions(-) create mode 100644 drivers/net/phy/cortina.c create mode 100644 drivers/net/phy/fsl_backplane.c @@ -1604,6 +1605,17 @@ Signed-off-by: Yangbo Lu +MODULE_DESCRIPTION("Freescale Backplane driver"); +MODULE_AUTHOR("Shaohui Xie "); +MODULE_LICENSE("GPL v2"); +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -1610,7 +1610,7 @@ static struct phy_driver marvell_drivers + .flags = PHY_HAS_INTERRUPT, + .probe = marvell_probe, + .config_init = &m88e1145_config_init, +- .config_aneg = &marvell_config_aneg, ++ .config_aneg = &m88e1101_config_aneg, + .read_status = &genphy_read_status, + .ack_interrupt = &marvell_ack_interrupt, + .config_intr = &marvell_config_intr, --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -585,7 +585,7 @@ int phy_mii_ioctl(struct phy_device *phy @@ -1737,11 +1749,20 @@ Signed-off-by: Yangbo Lu PHY_INTERFACE_MODE_MOCA, PHY_INTERFACE_MODE_QSGMII, PHY_INTERFACE_MODE_TRGMII, -+ PHY_INTERFACE_MODE_SGMII_2500, ++ PHY_INTERFACE_MODE_2500SGMII, PHY_INTERFACE_MODE_MAX, } phy_interface_t; -@@ -791,6 +792,9 @@ int phy_stop_interrupts(struct phy_devic +@@ -126,6 +127,8 @@ static inline const char *phy_modes(phy_ + return "qsgmii"; + case PHY_INTERFACE_MODE_TRGMII: + return "trgmii"; ++ case PHY_INTERFACE_MODE_2500SGMII: ++ return "sgmii-2500"; + default: + return "unknown"; + } +@@ -791,6 +794,9 @@ int phy_stop_interrupts(struct phy_devic static inline int phy_read_status(struct phy_device *phydev) { diff --git a/target/linux/layerscape/patches-4.9/704-fsl-mc-layerscape-support.patch b/target/linux/layerscape/patches-4.9/704-fsl-mc-layerscape-support.patch index a35e59310..976f801cd 100644 --- a/target/linux/layerscape/patches-4.9/704-fsl-mc-layerscape-support.patch +++ b/target/linux/layerscape/patches-4.9/704-fsl-mc-layerscape-support.patch @@ -1,12 +1,12 @@ -From afb7254de9f03c3efaf4e306dcf5f88e1873fc6b Mon Sep 17 00:00:00 2001 +From 667f0792b6f6d000c10f21c29c397c84cbe77f4a Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:06:25 +0800 -Subject: [PATCH] fsl-mc: layerscape support +Date: Wed, 17 Jan 2018 15:11:45 +0800 +Subject: [PATCH 10/30] fsl-mc: layerscape support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -This is a integrated patch for layerscape mc-bus support. +This is an integrated patch for layerscape mc-bus support. Signed-off-by: Stuart Yoder Signed-off-by: Bharat Bhushan @@ -28,7 +28,6 @@ Signed-off-by: Yangbo Lu drivers/staging/fsl-mc/bus/dpio/Makefile | 11 + .../{include/dpcon-cmd.h => bus/dpio/dpio-cmd.h} | 73 +- drivers/staging/fsl-mc/bus/dpio/dpio-driver.c | 296 ++++++ - drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt | 135 +++ drivers/staging/fsl-mc/bus/dpio/dpio-service.c | 693 +++++++++++++ drivers/staging/fsl-mc/bus/dpio/dpio.c | 224 +++++ drivers/staging/fsl-mc/bus/dpio/dpio.h | 109 ++ @@ -48,9 +47,9 @@ Signed-off-by: Yangbo Lu drivers/staging/fsl-mc/bus/fsl-mc-allocator.c | 78 +- drivers/staging/fsl-mc/bus/fsl-mc-bus.c | 318 +++--- drivers/staging/fsl-mc/bus/fsl-mc-iommu.c | 104 ++ - drivers/staging/fsl-mc/bus/fsl-mc-msi.c | 3 +- + drivers/staging/fsl-mc/bus/fsl-mc-msi.c | 2 +- drivers/staging/fsl-mc/bus/fsl-mc-private.h | 6 +- - .../staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c | 11 +- + .../staging/fsl-mc/bus/irq-gic-v3-its-fsl-mc-msi.c | 10 +- drivers/staging/fsl-mc/bus/mc-io.c | 4 +- drivers/staging/fsl-mc/bus/mc-ioctl.h | 22 + drivers/staging/fsl-mc/bus/mc-restool.c | 405 ++++++++ @@ -68,14 +67,13 @@ Signed-off-by: Yangbo Lu drivers/staging/fsl-mc/include/mc-cmd.h | 44 +- drivers/staging/fsl-mc/include/mc-sys.h | 3 +- drivers/staging/fsl-mc/include/mc.h | 17 +- - 49 files changed, 7384 insertions(+), 2612 deletions(-) + 48 files changed, 7247 insertions(+), 2612 deletions(-) create mode 100644 drivers/staging/fsl-mc/bus/dpbp-cmd.h create mode 100644 drivers/staging/fsl-mc/bus/dpcon-cmd.h create mode 100644 drivers/staging/fsl-mc/bus/dpcon.c create mode 100644 drivers/staging/fsl-mc/bus/dpio/Makefile rename drivers/staging/fsl-mc/{include/dpcon-cmd.h => bus/dpio/dpio-cmd.h} (64%) create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-driver.c - create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio-service.c create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio.c create mode 100644 drivers/staging/fsl-mc/bus/dpio/dpio.h @@ -1633,144 +1631,6 @@ Signed-off-by: Yangbo Lu +module_init(dpio_driver_init); +module_exit(dpio_driver_exit); --- /dev/null -+++ b/drivers/staging/fsl-mc/bus/dpio/dpio-driver.txt -@@ -0,0 +1,135 @@ -+Copyright 2016 NXP -+ -+Introduction -+------------ -+ -+A DPAA2 DPIO (Data Path I/O) is a hardware object that provides -+interfaces to enqueue and dequeue frames to/from network interfaces -+and other accelerators. A DPIO also provides hardware buffer -+pool management for network interfaces. -+ -+This document provides an overview the Linux DPIO driver, its -+subcomponents, and its APIs. -+ -+See Documentation/dpaa2/overview.txt for a general overview of DPAA2 -+and the general DPAA2 driver architecture in Linux. -+ -+Driver Overview -+--------------- -+ -+The DPIO driver is bound to DPIO objects discovered on the fsl-mc bus and -+provides services that: -+ A) allow other drivers, such as the Ethernet driver, to enqueue and dequeue -+ frames for their respective objects -+ B) allow drivers to register callbacks for data availability notifications -+ when data becomes available on a queue or channel -+ C) allow drivers to manage hardware buffer pools -+ -+The Linux DPIO driver consists of 3 primary components-- -+ DPIO object driver-- fsl-mc driver that manages the DPIO object -+ DPIO service-- provides APIs to other Linux drivers for services -+ QBman portal interface-- sends portal commands, gets responses -+ -+ fsl-mc other -+ bus drivers -+ | | -+ +---+----+ +------+-----+ -+ |DPIO obj| |DPIO service| -+ | driver |---| (DPIO) | -+ +--------+ +------+-----+ -+ | -+ +------+-----+ -+ | QBman | -+ | portal i/f | -+ +------------+ -+ | -+ hardware -+ -+The diagram below shows how the DPIO driver components fit with the other -+DPAA2 Linux driver components: -+ +------------+ -+ | OS Network | -+ | Stack | -+ +------------+ +------------+ -+ | Allocator |. . . . . . . | Ethernet | -+ |(DPMCP,DPBP)| | (DPNI) | -+ +-.----------+ +---+---+----+ -+ . . ^ | -+ . . | | dequeue> -+ +-------------+ . | | -+ | DPRC driver | . +--------+ +------------+ -+ | (DPRC) | . . |DPIO obj| |DPIO service| -+ +----------+--+ | driver |-| (DPIO) | -+ | +--------+ +------+-----+ -+ | +------|-----+ -+ | | QBman | -+ +----+--------------+ | portal i/f | -+ | MC-bus driver | +------------+ -+ | | | -+ | /soc/fsl-mc | | -+ +-------------------+ | -+ | -+ =========================================|=========|======================== -+ +-+--DPIO---|-----------+ -+ | | | -+ | QBman Portal | -+ +-----------------------+ -+ -+ ============================================================================ -+ -+ -+DPIO Object Driver (dpio-driver.c) -+---------------------------------- -+ -+ The dpio-driver component registers with the fsl-mc bus to handle objects of -+ type "dpio". The implementation of probe() handles basic initialization -+ of the DPIO including mapping of the DPIO regions (the QBman SW portal) -+ and initializing interrupts and registering irq handlers. The dpio-driver -+ registers the probed DPIO with dpio-service. -+ -+DPIO service (dpio-service.c, dpaa2-io.h) -+------------------------------------------ -+ -+ The dpio service component provides queuing, notification, and buffers -+ management services to DPAA2 drivers, such as the Ethernet driver. A system -+ will typically allocate 1 DPIO object per CPU to allow queuing operations -+ to happen simultaneously across all CPUs. -+ -+ Notification handling -+ dpaa2_io_service_register() -+ dpaa2_io_service_deregister() -+ dpaa2_io_service_rearm() -+ -+ Queuing -+ dpaa2_io_service_pull_fq() -+ dpaa2_io_service_pull_channel() -+ dpaa2_io_service_enqueue_fq() -+ dpaa2_io_service_enqueue_qd() -+ dpaa2_io_store_create() -+ dpaa2_io_store_destroy() -+ dpaa2_io_store_next() -+ -+ Buffer pool management -+ dpaa2_io_service_release() -+ dpaa2_io_service_acquire() -+ -+QBman portal interface (qbman-portal.c) -+--------------------------------------- -+ -+ The qbman-portal component provides APIs to do the low level hardware -+ bit twiddling for operations such as: -+ -initializing Qman software portals -+ -building and sending portal commands -+ -portal interrupt configuration and processing -+ -+ The qbman-portal APIs are not public to other drivers, and are -+ only used by dpio-service. -+ -+Other (dpaa2-fd.h, dpaa2-global.h) -+---------------------------------- -+ -+ Frame descriptor and scatter-gather definitions and the APIs used to -+ manipulate them are defined in dpaa2-fd.h. -+ -+ Dequeue result struct and parsing APIs are defined in dpaa2-global.h. ---- /dev/null +++ b/drivers/staging/fsl-mc/bus/dpio/dpio-service.c @@ -0,0 +1,693 @@ +/* diff --git a/target/linux/layerscape/patches-4.9/705-dpaa2-support-layerscape.patch b/target/linux/layerscape/patches-4.9/705-dpaa2-support-layerscape.patch index 51abc0325..5363f0a35 100644 --- a/target/linux/layerscape/patches-4.9/705-dpaa2-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/705-dpaa2-support-layerscape.patch @@ -1,15 +1,16 @@ -From 3a302437605308079db398b67000a77a4fe92da8 Mon Sep 17 00:00:00 2001 +From e729e648e4259940473e256dd4f9c8df99e774b0 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:07:58 +0800 +Date: Wed, 17 Jan 2018 15:12:58 +0800 Subject: [PATCH] dpaa2: support layerscape -This is a integrated patch for layerscape dpaa2 support. +This is an integrated patch for layerscape dpaa2 support. Signed-off-by: Bogdan Purcareata Signed-off-by: Ioana Radulescu Signed-off-by: Razvan Stefanescu Signed-off-by: costi Signed-off-by: Catalin Horghidan +Signed-off-by: Mathew McBride Signed-off-by: Yangbo Lu --- drivers/soc/fsl/ls2-console/Kconfig | 4 + @@ -17,41 +18,41 @@ Signed-off-by: Yangbo Lu drivers/soc/fsl/ls2-console/ls2-console.c | 284 ++ drivers/staging/fsl-dpaa2/ethernet/Makefile | 11 + drivers/staging/fsl-dpaa2/ethernet/README | 186 ++ - .../staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.c | 350 +++ + .../staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.c | 352 ++ .../staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.h | 60 + - .../staging/fsl-dpaa2/ethernet/dpaa2-eth-trace.h | 184 ++ - drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c | 3155 ++++++++++++++++++++ - drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h | 460 +++ - drivers/staging/fsl-dpaa2/ethernet/dpaa2-ethtool.c | 856 ++++++ - drivers/staging/fsl-dpaa2/ethernet/dpkg.h | 176 ++ - drivers/staging/fsl-dpaa2/ethernet/dpni-cmd.h | 600 ++++ - drivers/staging/fsl-dpaa2/ethernet/dpni.c | 1770 +++++++++++ - drivers/staging/fsl-dpaa2/ethernet/dpni.h | 989 ++++++ + .../staging/fsl-dpaa2/ethernet/dpaa2-eth-trace.h | 184 + + drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c | 3516 ++++++++++++++++++++ + drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h | 499 +++ + drivers/staging/fsl-dpaa2/ethernet/dpaa2-ethtool.c | 864 +++++ + drivers/staging/fsl-dpaa2/ethernet/dpkg.h | 176 + + drivers/staging/fsl-dpaa2/ethernet/dpni-cmd.h | 658 ++++ + drivers/staging/fsl-dpaa2/ethernet/dpni.c | 1903 +++++++++++ + drivers/staging/fsl-dpaa2/ethernet/dpni.h | 1053 ++++++ drivers/staging/fsl-dpaa2/ethernet/net.h | 480 +++ drivers/staging/fsl-dpaa2/ethsw/Kconfig | 6 + drivers/staging/fsl-dpaa2/ethsw/Makefile | 10 + - drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h | 851 ++++++ - drivers/staging/fsl-dpaa2/ethsw/dpsw.c | 2762 +++++++++++++++++ - drivers/staging/fsl-dpaa2/ethsw/dpsw.h | 1269 ++++++++ - drivers/staging/fsl-dpaa2/ethsw/switch.c | 1857 ++++++++++++ + drivers/staging/fsl-dpaa2/ethsw/dpsw-cmd.h | 851 +++++ + drivers/staging/fsl-dpaa2/ethsw/dpsw.c | 2762 +++++++++++++++ + drivers/staging/fsl-dpaa2/ethsw/dpsw.h | 1269 +++++++ + drivers/staging/fsl-dpaa2/ethsw/switch.c | 1857 +++++++++++ drivers/staging/fsl-dpaa2/evb/Kconfig | 7 + drivers/staging/fsl-dpaa2/evb/Makefile | 10 + drivers/staging/fsl-dpaa2/evb/dpdmux-cmd.h | 279 ++ drivers/staging/fsl-dpaa2/evb/dpdmux.c | 1112 +++++++ drivers/staging/fsl-dpaa2/evb/dpdmux.h | 453 +++ - drivers/staging/fsl-dpaa2/evb/evb.c | 1350 +++++++++ + drivers/staging/fsl-dpaa2/evb/evb.c | 1350 ++++++++ drivers/staging/fsl-dpaa2/mac/Kconfig | 23 + drivers/staging/fsl-dpaa2/mac/Makefile | 10 + - drivers/staging/fsl-dpaa2/mac/dpmac-cmd.h | 172 ++ + drivers/staging/fsl-dpaa2/mac/dpmac-cmd.h | 172 + drivers/staging/fsl-dpaa2/mac/dpmac.c | 620 ++++ - drivers/staging/fsl-dpaa2/mac/dpmac.h | 342 +++ - drivers/staging/fsl-dpaa2/mac/mac.c | 666 +++++ + drivers/staging/fsl-dpaa2/mac/dpmac.h | 342 ++ + drivers/staging/fsl-dpaa2/mac/mac.c | 670 ++++ drivers/staging/fsl-dpaa2/rtc/Makefile | 10 + drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h | 160 + drivers/staging/fsl-dpaa2/rtc/dprtc.c | 746 +++++ - drivers/staging/fsl-dpaa2/rtc/dprtc.h | 172 ++ + drivers/staging/fsl-dpaa2/rtc/dprtc.h | 172 + drivers/staging/fsl-dpaa2/rtc/rtc.c | 243 ++ - 39 files changed, 22696 insertions(+) + 39 files changed, 23365 insertions(+) create mode 100644 drivers/soc/fsl/ls2-console/Kconfig create mode 100644 drivers/soc/fsl/ls2-console/Makefile create mode 100644 drivers/soc/fsl/ls2-console/ls2-console.c @@ -595,7 +596,7 @@ Signed-off-by: Yangbo Lu +non-standard driver stats can be consulted through ethtool -S option. --- /dev/null +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth-debugfs.c -@@ -0,0 +1,350 @@ +@@ -0,0 +1,352 @@ + +/* Copyright 2015 Freescale Semiconductor Inc. + * @@ -708,9 +709,9 @@ Signed-off-by: Yangbo Lu + int i, err; + + seq_printf(file, "FQ stats for %s:\n", priv->net_dev->name); -+ seq_printf(file, "%s%16s%16s%16s%16s%16s\n", -+ "VFQID", "CPU", "Type", "Frames", "Pending frames", -+ "Congestion"); ++ seq_printf(file, "%s%16s%16s%16s%16s%16s%16s\n", ++ "VFQID", "CPU", "Traffic Class", "Type", "Frames", ++ "Pending frames", "Congestion"); + + for (i = 0; i < priv->num_fqs; i++) { + fq = &priv->fq[i]; @@ -718,9 +719,10 @@ Signed-off-by: Yangbo Lu + if (err) + fcnt = 0; + -+ seq_printf(file, "%5d%16d%16s%16llu%16u%16llu\n", ++ seq_printf(file, "%5d%16d%16d%16s%16llu%16u%16llu\n", + fq->fqid, + fq->target_cpu, ++ fq->tc, + fq_type_to_str(fq), + fq->stats.frames, + fcnt, @@ -756,19 +758,20 @@ Signed-off-by: Yangbo Lu + int i; + + seq_printf(file, "Channel stats for %s:\n", priv->net_dev->name); -+ seq_printf(file, "%s%16s%16s%16s%16s%16s\n", ++ seq_printf(file, "%s%16s%16s%16s%16s%16s%16s\n", + "CHID", "CPU", "Deq busy", "Frames", "CDANs", -+ "Avg frm/CDAN"); ++ "Avg frm/CDAN", "Buf count"); + + for (i = 0; i < priv->num_channels; i++) { + ch = priv->channel[i]; -+ seq_printf(file, "%4d%16d%16llu%16llu%16llu%16llu\n", ++ seq_printf(file, "%4d%16d%16llu%16llu%16llu%16llu%16d\n", + ch->ch_id, + ch->nctx.desired_cpu, + ch->stats.dequeue_portal_busy, + ch->stats.frames, + ch->stats.cdan, -+ ch->stats.frames / ch->stats.cdan); ++ ch->stats.frames / ch->stats.cdan, ++ ch->buf_count); + } + + return 0; @@ -1198,7 +1201,7 @@ Signed-off-by: Yangbo Lu +#include --- /dev/null +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c -@@ -0,0 +1,3155 @@ +@@ -0,0 +1,3516 @@ +/* Copyright 2014-2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -1338,6 +1341,8 @@ Signed-off-by: Yangbo Lu + u16 fd_offset = dpaa2_fd_get_offset(fd); + u32 fd_length = dpaa2_fd_get_len(fd); + ++ ch->buf_count--; ++ + skb = build_skb(fd_vaddr, DPAA2_ETH_SKB_SIZE); + if (unlikely(!skb)) + return NULL; @@ -1345,8 +1350,6 @@ Signed-off-by: Yangbo Lu + skb_reserve(skb, fd_offset); + skb_put(skb, fd_length); + -+ ch->buf_count--; -+ + return skb; +} + @@ -1384,7 +1387,7 @@ Signed-off-by: Yangbo Lu + /* We build the skb around the first data buffer */ + skb = build_skb(sg_vaddr, DPAA2_ETH_SKB_SIZE); + if (unlikely(!skb)) -+ return NULL; ++ goto err_build; + + sg_offset = dpaa2_sg_get_offset(sge); + skb_reserve(skb, sg_offset); @@ -1415,6 +1418,32 @@ Signed-off-by: Yangbo Lu + ch->buf_count -= i + 2; + + return skb; ++ ++err_build: ++ /* We still need to subtract the buffers used by this FD from our ++ * software counter ++ */ ++ for (i = 0; i < DPAA2_ETH_MAX_SG_ENTRIES; i++) ++ if (dpaa2_sg_is_final(&sgt[i])) ++ break; ++ ch->buf_count -= i + 2; ++ ++ return NULL; ++} ++ ++static void free_bufs(struct dpaa2_eth_priv *priv, u64 *buf_array, int count) ++{ ++ struct device *dev = priv->net_dev->dev.parent; ++ void *vaddr; ++ int i; ++ ++ for (i = 0; i < count; i++) { ++ /* Same logic as on regular Rx path */ ++ vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, buf_array[i]); ++ dma_unmap_single(dev, buf_array[i], DPAA2_ETH_RX_BUF_SIZE, ++ DMA_FROM_DEVICE); ++ put_page(virt_to_head_page(vaddr)); ++ } +} + +/* Main Rx frame processing routine */ @@ -1722,7 +1751,7 @@ Signed-off-by: Yangbo Lu + dpaa2_fd_set_addr(fd, addr); + dpaa2_fd_set_len(fd, skb->len); + -+ fd->simple.ctrl = DPAA2_FD_CTRL_ASAL | FD_CTRL_PTA | FD_CTRL_PTV1; ++ fd->simple.ctrl = DPAA2_FD_CTRL_ASAL | FD_CTRL_PTA; + + if (priv->ts_tx_en && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) + enable_tx_tstamp(fd, sgt_buf); @@ -1779,7 +1808,7 @@ Signed-off-by: Yangbo Lu + dpaa2_fd_set_len(fd, skb->len); + dpaa2_fd_set_format(fd, dpaa2_fd_single); + -+ fd->simple.ctrl = DPAA2_FD_CTRL_ASAL | FD_CTRL_PTA | FD_CTRL_PTV1; ++ fd->simple.ctrl = DPAA2_FD_CTRL_ASAL | FD_CTRL_PTA; + + if (priv->ts_tx_en && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) + enable_tx_tstamp(fd, buffer_start); @@ -1798,7 +1827,7 @@ Signed-off-by: Yangbo Lu + */ +static void free_tx_fd(const struct dpaa2_eth_priv *priv, + const struct dpaa2_fd *fd, -+ u32 *status) ++ u32 *status, bool in_napi) +{ + struct device *dev = priv->net_dev->dev.parent; + dma_addr_t fd_addr; @@ -1877,7 +1906,7 @@ Signed-off-by: Yangbo Lu + kfree(skbh); + + /* Move on with skb release */ -+ dev_kfree_skb(skb); ++ napi_consume_skb(skb, in_napi); +} + +static int dpaa2_eth_tx(struct sk_buff *skb, struct net_device *net_dev) @@ -1961,7 +1990,7 @@ Signed-off-by: Yangbo Lu + if (unlikely(err < 0)) { + percpu_stats->tx_errors++; + /* Clean up everything, including freeing the skb */ -+ free_tx_fd(priv, &fd, NULL); ++ free_tx_fd(priv, &fd, NULL, false); + } else { + percpu_stats->tx_packets++; + percpu_stats->tx_bytes += dpaa2_fd_get_len(&fd); @@ -2014,7 +2043,7 @@ Signed-off-by: Yangbo Lu + fd->simple.ctrl & DPAA2_FD_TX_ERR_MASK); + } + -+ free_tx_fd(priv, fd, check_fas_errors ? &status : NULL); ++ free_tx_fd(priv, fd, check_fas_errors ? &status : NULL, true); + + /* if there are no errors, we're done */ + if (likely(!errors)) @@ -2084,7 +2113,7 @@ Signed-off-by: Yangbo Lu + u64 buf_array[DPAA2_ETH_BUFS_PER_CMD]; + void *buf; + dma_addr_t addr; -+ int i; ++ int i, err; + + for (i = 0; i < DPAA2_ETH_BUFS_PER_CMD; i++) { + /* Allocate buffer visible to WRIOP + skb shared info + @@ -2111,22 +2140,25 @@ Signed-off-by: Yangbo Lu + } + +release_bufs: -+ /* In case the portal is busy, retry until successful. -+ * The buffer release function would only fail if the QBMan portal -+ * was busy, which implies portal contention (i.e. more CPUs than -+ * portals, i.e. GPPs w/o affine DPIOs). For all practical purposes, -+ * there is little we can realistically do, short of giving up - -+ * in which case we'd risk depleting the buffer pool and never again -+ * receiving the Rx interrupt which would kick-start the refill logic. -+ * So just keep retrying, at the risk of being moved to ksoftirqd. -+ */ -+ while (dpaa2_io_service_release(NULL, bpid, buf_array, i)) ++ /* In case the portal is busy, retry until successful */ ++ while ((err = dpaa2_io_service_release(NULL, bpid, ++ buf_array, i)) == -EBUSY) + cpu_relax(); ++ ++ /* If release command failed, clean up and bail out; not much ++ * else we can do about it ++ */ ++ if (unlikely(err)) { ++ free_bufs(priv, buf_array, i); ++ return 0; ++ } ++ + return i; + +err_map: + put_page(virt_to_head_page(buf)); +err_alloc: ++ /* If we managed to allocate at least some buffers, release them */ + if (i) + goto release_bufs; + @@ -2169,10 +2201,8 @@ Signed-off-by: Yangbo Lu + */ +static void drain_bufs(struct dpaa2_eth_priv *priv, int count) +{ -+ struct device *dev = priv->net_dev->dev.parent; + u64 buf_array[DPAA2_ETH_BUFS_PER_CMD]; -+ void *vaddr; -+ int ret, i; ++ int ret; + + do { + ret = dpaa2_io_service_acquire(NULL, priv->bpid, @@ -2181,15 +2211,7 @@ Signed-off-by: Yangbo Lu + netdev_err(priv->net_dev, "dpaa2_io_service_acquire() failed\n"); + return; + } -+ for (i = 0; i < ret; i++) { -+ /* Same logic as on regular Rx path */ -+ vaddr = dpaa2_eth_iova_to_virt(priv->iommu_domain, -+ buf_array[i]); -+ dma_unmap_single(dev, buf_array[i], -+ DPAA2_ETH_RX_BUF_SIZE, -+ DMA_FROM_DEVICE); -+ put_page(virt_to_head_page(vaddr)); -+ } ++ free_bufs(priv, buf_array, ret); + } while (ret); +} + @@ -2497,7 +2519,7 @@ Signed-off-by: Yangbo Lu +/** Fill in counters maintained by the GPP driver. These may be different from + * the hardware counters obtained by ethtool. + */ -+static void dpaa2_eth_get_stats(struct net_device *net_dev, ++static struct rtnl_link_stats64 *dpaa2_eth_get_stats(struct net_device *net_dev, + struct rtnl_link_stats64 *stats) +{ + struct dpaa2_eth_priv *priv = netdev_priv(net_dev); @@ -2513,6 +2535,7 @@ Signed-off-by: Yangbo Lu + for (j = 0; j < num; j++) + netstats[j] += cpustats[j]; + } ++ return stats; +} + +static int dpaa2_eth_change_mtu(struct net_device *net_dev, int mtu) @@ -3039,7 +3062,7 @@ Signed-off-by: Yangbo Lu + +static void setup_fqs(struct dpaa2_eth_priv *priv) +{ -+ int i; ++ int i, j; + + /* We have one TxConf FQ per Tx flow. Tx queues MUST be at the + * beginning of the queue array. @@ -3052,11 +3075,13 @@ Signed-off-by: Yangbo Lu + priv->fq[priv->num_fqs++].flowid = (u16)i; + } + -+ for (i = 0; i < dpaa2_eth_queue_count(priv); i++) { -+ priv->fq[priv->num_fqs].type = DPAA2_RX_FQ; -+ priv->fq[priv->num_fqs].consume = dpaa2_eth_rx; -+ priv->fq[priv->num_fqs++].flowid = (u16)i; -+ } ++ for (i = 0; i < dpaa2_eth_tc_count(priv); i++) ++ for (j = 0; j < dpaa2_eth_queue_count(priv); j++) { ++ priv->fq[priv->num_fqs].type = DPAA2_RX_FQ; ++ priv->fq[priv->num_fqs].consume = dpaa2_eth_rx; ++ priv->fq[priv->num_fqs].tc = (u8)i; ++ priv->fq[priv->num_fqs++].flowid = (u16)j; ++ } + +#ifdef CONFIG_FSL_DPAA2_ETH_USE_ERR_QUEUE + /* We have exactly one Rx error queue per DPNI */ @@ -3299,9 +3324,6 @@ Signed-off-by: Yangbo Lu + dev_warn(dev, "Tx data offset (%d) not a multiple of 64B", + priv->tx_data_offset); + -+ /* Accommodate software annotation space (SWA) */ -+ priv->tx_data_offset += DPAA2_ETH_SWA_SIZE; -+ + /* Enable congestion notifications for Tx queues */ + err = setup_tx_congestion(priv); + if (err) @@ -3357,39 +3379,111 @@ Signed-off-by: Yangbo Lu + kfree(priv->cscn_unaligned); +} + -+int setup_fqs_taildrop(struct dpaa2_eth_priv *priv, -+ bool enable) ++static int set_queue_taildrop(struct dpaa2_eth_priv *priv, ++ struct dpni_taildrop *td) +{ + struct device *dev = priv->net_dev->dev.parent; -+ struct dpni_taildrop td; -+ int err = 0, i; ++ int err, i; + -+ td.enable = enable; -+ td.threshold = DPAA2_ETH_TAILDROP_THRESH; -+ -+ if (enable) { -+ priv->num_bufs = DPAA2_ETH_NUM_BUFS_TD; -+ priv->refill_thresh = DPAA2_ETH_REFILL_THRESH_TD; -+ } else { -+ priv->num_bufs = DPAA2_ETH_NUM_BUFS_FC / -+ priv->num_channels; -+ priv->refill_thresh = priv->num_bufs - DPAA2_ETH_BUFS_PER_CMD; -+ } + + for (i = 0; i < priv->num_fqs; i++) { + if (priv->fq[i].type != DPAA2_RX_FQ) + continue; + + err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token, -+ DPNI_CP_QUEUE, DPNI_QUEUE_RX, 0, -+ priv->fq[i].flowid, &td); ++ DPNI_CP_QUEUE, DPNI_QUEUE_RX, ++ priv->fq[i].tc, priv->fq[i].flowid, ++ td); + if (err) { + dev_err(dev, "dpni_set_taildrop() failed (%d)\n", err); -+ break; ++ return err; + } + } + -+ return err; ++ return 0; ++} ++ ++static int set_group_taildrop(struct dpaa2_eth_priv *priv, ++ struct dpni_taildrop *td) ++{ ++ struct device *dev = priv->net_dev->dev.parent; ++ struct dpni_taildrop disable_td, *tc_td; ++ int i, err; ++ ++ memset(&disable_td, 0, sizeof(struct dpni_taildrop)); ++ for (i = 0; i < dpaa2_eth_tc_count(priv); i++) { ++ if (td->enable && dpaa2_eth_is_pfc_enabled(priv, i)) ++ /* Do not set taildrop thresholds for PFC-enabled ++ * traffic classes. We will enable congestion ++ * notifications for them. ++ */ ++ tc_td = &disable_td; ++ else ++ tc_td = td; ++ ++ err = dpni_set_taildrop(priv->mc_io, 0, priv->mc_token, ++ DPNI_CP_GROUP, DPNI_QUEUE_RX, ++ i, 0, tc_td); ++ if (err) { ++ dev_err(dev, "dpni_set_taildrop() failed (%d)\n", err); ++ return err; ++ } ++ } ++ return 0; ++} ++ ++/* Enable/disable Rx FQ taildrop ++ * ++ * Rx FQ taildrop is mutually exclusive with flow control and it only gets ++ * disabled when FC is active. Depending on FC status, we need to compute ++ * the maximum number of buffers in the pool differently, so use the ++ * opportunity to update max number of buffers as well. ++ */ ++int set_rx_taildrop(struct dpaa2_eth_priv *priv) ++{ ++ enum dpaa2_eth_td_cfg cfg = dpaa2_eth_get_td_type(priv); ++ struct dpni_taildrop td_queue, td_group; ++ int err = 0; ++ ++ switch (cfg) { ++ case DPAA2_ETH_TD_NONE: ++ memset(&td_queue, 0, sizeof(struct dpni_taildrop)); ++ memset(&td_group, 0, sizeof(struct dpni_taildrop)); ++ priv->num_bufs = DPAA2_ETH_NUM_BUFS_FC / ++ priv->num_channels; ++ break; ++ case DPAA2_ETH_TD_QUEUE: ++ memset(&td_group, 0, sizeof(struct dpni_taildrop)); ++ td_queue.enable = 1; ++ td_queue.units = DPNI_CONGESTION_UNIT_BYTES; ++ td_queue.threshold = DPAA2_ETH_TAILDROP_THRESH / ++ dpaa2_eth_tc_count(priv); ++ priv->num_bufs = DPAA2_ETH_NUM_BUFS_TD; ++ break; ++ case DPAA2_ETH_TD_GROUP: ++ memset(&td_queue, 0, sizeof(struct dpni_taildrop)); ++ td_group.enable = 1; ++ td_group.units = DPNI_CONGESTION_UNIT_FRAMES; ++ td_group.threshold = NAPI_POLL_WEIGHT * ++ dpaa2_eth_queue_count(priv); ++ priv->num_bufs = NAPI_POLL_WEIGHT * ++ dpaa2_eth_tc_count(priv); ++ break; ++ default: ++ break; ++ } ++ ++ err = set_queue_taildrop(priv, &td_queue); ++ if (err) ++ return err; ++ ++ err = set_group_taildrop(priv, &td_group); ++ if (err) ++ return err; ++ ++ priv->refill_thresh = priv->num_bufs - DPAA2_ETH_BUFS_PER_CMD; ++ ++ return 0; +} + +static int setup_rx_flow(struct dpaa2_eth_priv *priv, @@ -3402,7 +3496,7 @@ Signed-off-by: Yangbo Lu + int err; + + err = dpni_get_queue(priv->mc_io, 0, priv->mc_token, -+ DPNI_QUEUE_RX, 0, fq->flowid, &q, &qid); ++ DPNI_QUEUE_RX, fq->tc, fq->flowid, &q, &qid); + if (err) { + dev_err(dev, "dpni_get_queue() failed (%d)\n", err); + return err; @@ -3415,7 +3509,7 @@ Signed-off-by: Yangbo Lu + q.destination.priority = 1; + q.user_context = (u64)fq; + err = dpni_set_queue(priv->mc_io, 0, priv->mc_token, -+ DPNI_QUEUE_RX, 0, fq->flowid, q_opt, &q); ++ DPNI_QUEUE_RX, fq->tc, fq->flowid, q_opt, &q); + if (err) { + dev_err(dev, "dpni_set_queue() failed (%d)\n", err); + return err; @@ -3612,7 +3706,13 @@ Signed-off-by: Yangbo Lu + dist_cfg.dist_mode = DPNI_DIST_MODE_HASH; + } + -+ err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token, 0, &dist_cfg); ++ for (i = 0; i < dpaa2_eth_tc_count(priv); i++) { ++ err = dpni_set_rx_tc_dist(priv->mc_io, 0, priv->mc_token, i, ++ &dist_cfg); ++ if (err) ++ break; ++ } ++ + dma_unmap_single(dev, dist_cfg.key_cfg_iova, + DPAA2_CLASSIFIER_DMA_SIZE, DMA_TO_DEVICE); + if (err) @@ -3639,6 +3739,7 @@ Signed-off-by: Yangbo Lu + pools_params.num_dpbp = 1; + pools_params.pools[0].dpbp_id = priv->dpbp_dev->obj_desc.id; + pools_params.pools[0].backup_pool = 0; ++ pools_params.pools[0].priority_mask = 0xff; + pools_params.pools[0].buffer_size = DPAA2_ETH_RX_BUF_SIZE; + err = dpni_set_pools(priv->mc_io, 0, priv->mc_token, &pools_params); + if (err) { @@ -4124,6 +4225,264 @@ Signed-off-by: Yangbo Lu + device_remove_file(dev, &dpaa2_eth_attrs[i]); +} + ++#ifdef CONFIG_FSL_DPAA2_ETH_DCB ++static int dpaa2_eth_dcbnl_ieee_getpfc(struct net_device *net_dev, ++ struct ieee_pfc *pfc) ++{ ++ struct dpaa2_eth_priv *priv = netdev_priv(net_dev); ++ struct dpni_congestion_notification_cfg notification_cfg; ++ struct dpni_link_state state; ++ int err, i; ++ ++ pfc->pfc_cap = dpaa2_eth_tc_count(priv); ++ ++ err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state); ++ if (err) { ++ netdev_err(net_dev, "ERROR %d getting link state", err); ++ return err; ++ } ++ ++ if (!(state.options & DPNI_LINK_OPT_PFC_PAUSE)) ++ return 0; ++ ++ priv->pfc.pfc_en = 0; ++ for (i = 0; i < dpaa2_eth_tc_count(priv); i++) { ++ err = dpni_get_congestion_notification(priv->mc_io, 0, ++ priv->mc_token, ++ DPNI_QUEUE_RX, ++ i, ¬ification_cfg); ++ if (err) { ++ netdev_err(net_dev, "Error %d getting congestion notif", ++ err); ++ return err; ++ } ++ ++ if (notification_cfg.threshold_entry) ++ priv->pfc.pfc_en |= 1 << i; ++ } ++ ++ pfc->pfc_en = priv->pfc.pfc_en; ++ pfc->mbc = priv->pfc.mbc; ++ pfc->delay = priv->pfc.delay; ++ ++ return 0; ++} ++ ++/* Configure ingress classification based on VLAN PCP */ ++static int set_vlan_qos(struct dpaa2_eth_priv *priv) ++{ ++ struct device *dev = priv->net_dev->dev.parent; ++ struct dpkg_profile_cfg kg_cfg = {0}; ++ struct dpni_qos_tbl_cfg qos_cfg = {0}; ++ struct dpni_rule_cfg key_params; ++ u8 *params_iova; ++ __be16 key, mask = cpu_to_be16(VLAN_PRIO_MASK); ++ int err = 0, i, j = 0; ++ ++ if (priv->vlan_clsf_set) ++ return 0; ++ ++ params_iova = kzalloc(DPAA2_CLASSIFIER_DMA_SIZE, GFP_KERNEL); ++ if (!params_iova) ++ return -ENOMEM; ++ ++ kg_cfg.num_extracts = 1; ++ kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR; ++ kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_VLAN; ++ kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD; ++ kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_VLAN_TCI; ++ ++ err = dpni_prepare_key_cfg(&kg_cfg, params_iova); ++ if (err) { ++ dev_err(dev, "dpkg_prepare_key_cfg failed: %d\n", err); ++ goto out_free; ++ } ++ ++ /* Set QoS table */ ++ qos_cfg.default_tc = 0; ++ qos_cfg.discard_on_miss = 0; ++ qos_cfg.key_cfg_iova = dma_map_single(dev, params_iova, ++ DPAA2_CLASSIFIER_DMA_SIZE, ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(dev, qos_cfg.key_cfg_iova)) { ++ dev_err(dev, "%s: DMA mapping failed\n", __func__); ++ err = -ENOMEM; ++ goto out_free; ++ } ++ err = dpni_set_qos_table(priv->mc_io, 0, priv->mc_token, &qos_cfg); ++ dma_unmap_single(dev, qos_cfg.key_cfg_iova, ++ DPAA2_CLASSIFIER_DMA_SIZE, DMA_TO_DEVICE); ++ ++ if (err) { ++ dev_err(dev, "dpni_set_qos_table failed: %d\n", err); ++ goto out_free; ++ } ++ ++ key_params.key_size = sizeof(key); ++ ++ if (dpaa2_eth_fs_mask_enabled(priv)) { ++ key_params.mask_iova = dma_map_single(dev, &mask, sizeof(mask), ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(dev, key_params.mask_iova)) { ++ dev_err(dev, "DMA mapping failed %s\n", __func__); ++ err = -ENOMEM; ++ goto out_free; ++ } ++ } else { ++ key_params.mask_iova = 0; ++ } ++ ++ key_params.key_iova = dma_map_single(dev, &key, sizeof(key), ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(dev, key_params.key_iova)) { ++ dev_err(dev, "%s: DMA mapping failed\n", __func__); ++ err = -ENOMEM; ++ goto out_unmap_mask; ++ } ++ ++ for (i = 0; i < dpaa2_eth_tc_count(priv); i++) { ++ key = cpu_to_be16(i << VLAN_PRIO_SHIFT); ++ dma_sync_single_for_device(dev, key_params.key_iova, ++ sizeof(key), DMA_TO_DEVICE); ++ ++ err = dpni_add_qos_entry(priv->mc_io, 0, priv->mc_token, ++ &key_params, i, j++); ++ if (err) { ++ dev_err(dev, "dpni_add_qos_entry failed: %d\n", err); ++ goto out_unmap; ++ } ++ } ++ ++ priv->vlan_clsf_set = true; ++ ++out_unmap: ++ dma_unmap_single(dev, key_params.key_iova, sizeof(key), DMA_TO_DEVICE); ++out_unmap_mask: ++ if (key_params.mask_iova) ++ dma_unmap_single(dev, key_params.mask_iova, sizeof(mask), ++ DMA_TO_DEVICE); ++out_free: ++ kfree(params_iova); ++ return err; ++} ++ ++static int dpaa2_eth_dcbnl_ieee_setpfc(struct net_device *net_dev, ++ struct ieee_pfc *pfc) ++{ ++ struct dpaa2_eth_priv *priv = netdev_priv(net_dev); ++ struct dpni_congestion_notification_cfg notification_cfg = {0}; ++ struct dpni_link_state state = {0}; ++ struct dpni_link_cfg cfg = {0}; ++ int err = 0, i; ++ ++ if (priv->pfc.pfc_en == pfc->pfc_en) ++ /* Same enabled mask, nothing to be done */ ++ return 0; ++ ++ err = set_vlan_qos(priv); ++ if (err) ++ return err; ++ ++ err = dpni_get_link_state(priv->mc_io, 0, priv->mc_token, &state); ++ if (err) { ++ netdev_err(net_dev, "ERROR %d getting link state", err); ++ return err; ++ } ++ ++ cfg.rate = state.rate; ++ cfg.options = state.options; ++ if (pfc->pfc_en) ++ cfg.options |= DPNI_LINK_OPT_PFC_PAUSE; ++ else ++ cfg.options &= ~DPNI_LINK_OPT_PFC_PAUSE; ++ ++ err = dpni_set_link_cfg(priv->mc_io, 0, priv->mc_token, &cfg); ++ if (err) { ++ netdev_err(net_dev, "ERROR %d setting link cfg", err); ++ return err; ++ } ++ ++ memcpy(&priv->pfc, pfc, sizeof(priv->pfc)); ++ ++ err = set_rx_taildrop(priv); ++ if (err) ++ return err; ++ ++ /* configure congestion notifications */ ++ notification_cfg.notification_mode = DPNI_CONG_OPT_FLOW_CONTROL; ++ notification_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; ++ notification_cfg.message_iova = 0ULL; ++ notification_cfg.message_ctx = 0ULL; ++ ++ for (i = 0; i < dpaa2_eth_tc_count(priv); i++) { ++ if (dpaa2_eth_is_pfc_enabled(priv, i)) { ++ notification_cfg.threshold_entry = NAPI_POLL_WEIGHT; ++ notification_cfg.threshold_exit = NAPI_POLL_WEIGHT / 2; ++ } else { ++ notification_cfg.threshold_entry = 0; ++ notification_cfg.threshold_exit = 0; ++ } ++ ++ err = dpni_set_congestion_notification(priv->mc_io, 0, ++ priv->mc_token, ++ DPNI_QUEUE_RX, ++ i, ¬ification_cfg); ++ if (err) { ++ netdev_err(net_dev, "Error %d setting congestion notif", ++ err); ++ return err; ++ } ++ } ++ ++ return 0; ++} ++ ++static u8 dpaa2_eth_dcbnl_getdcbx(struct net_device *net_dev) ++{ ++ struct dpaa2_eth_priv *priv = netdev_priv(net_dev); ++ ++ return priv->dcbx_mode; ++} ++ ++static u8 dpaa2_eth_dcbnl_setdcbx(struct net_device *net_dev, u8 mode) ++{ ++ struct dpaa2_eth_priv *priv = netdev_priv(net_dev); ++ ++ priv->dcbx_mode = mode; ++ return 0; ++} ++ ++static u8 dpaa2_eth_dcbnl_getcap(struct net_device *net_dev, int capid, u8 *cap) ++{ ++ struct dpaa2_eth_priv *priv = netdev_priv(net_dev); ++ ++ switch (capid) { ++ case DCB_CAP_ATTR_PFC: ++ *cap = true; ++ break; ++ case DCB_CAP_ATTR_PFC_TCS: ++ *cap = 1 << dpaa2_eth_tc_count(priv); ++ break; ++ case DCB_CAP_ATTR_DCBX: ++ *cap = priv->dcbx_mode; ++ break; ++ default: ++ *cap = false; ++ break; ++ } ++ ++ return 0; ++} ++ ++const struct dcbnl_rtnl_ops dpaa2_eth_dcbnl_ops = { ++ .ieee_getpfc = dpaa2_eth_dcbnl_ieee_getpfc, ++ .ieee_setpfc = dpaa2_eth_dcbnl_ieee_setpfc, ++ .getdcbx = dpaa2_eth_dcbnl_getdcbx, ++ .setdcbx = dpaa2_eth_dcbnl_setdcbx, ++ .getcap = dpaa2_eth_dcbnl_getcap, ++}; ++#endif ++ +static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev) +{ + struct device *dev; @@ -4152,7 +4511,8 @@ Signed-off-by: Yangbo Lu + err = fsl_mc_portal_allocate(dpni_dev, FSL_MC_IO_ATOMIC_CONTEXT_PORTAL, + &priv->mc_io); + if (err) { -+ dev_err(dev, "MC portal allocation failed\n"); ++ dev_dbg(dev, "MC portal allocation failed\n"); ++ err = -EPROBE_DEFER; + goto err_portal_alloc; + } + @@ -4178,10 +4538,6 @@ Signed-off-by: Yangbo Lu + if (err) + goto err_bind; + -+ /* Add a NAPI context for each channel */ -+ add_ch_napi(priv); -+ enable_ch_napi(priv); -+ + /* Percpu statistics */ + priv->percpu_stats = alloc_percpu(*priv->percpu_stats); + if (!priv->percpu_stats) { @@ -4224,6 +4580,14 @@ Signed-off-by: Yangbo Lu + goto err_alloc_rings; + + net_dev->ethtool_ops = &dpaa2_ethtool_ops; ++#ifdef CONFIG_FSL_DPAA2_ETH_DCB ++ net_dev->dcbnl_ops = &dpaa2_eth_dcbnl_ops; ++ priv->dcbx_mode = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE; ++#endif ++ ++ /* Add a NAPI context for each channel */ ++ add_ch_napi(priv); ++ enable_ch_napi(priv); + + err = setup_irqs(dpni_dev); + if (err) { @@ -4287,6 +4651,9 @@ Signed-off-by: Yangbo Lu +#endif + dpaa2_eth_sysfs_remove(&net_dev->dev); + ++ disable_ch_napi(priv); ++ del_ch_napi(priv); ++ + unregister_netdev(net_dev); + dev_info(net_dev->dev.parent, "Removed interface %s\n", net_dev->name); + @@ -4298,9 +4665,6 @@ Signed-off-by: Yangbo Lu + free_rings(priv); + free_percpu(priv->percpu_stats); + free_percpu(priv->percpu_extras); -+ -+ disable_ch_napi(priv); -+ del_ch_napi(priv); + free_dpbp(priv); + free_dpio(priv); + free_dpni(priv); @@ -4356,7 +4720,7 @@ Signed-off-by: Yangbo Lu +module_exit(dpaa2_eth_driver_exit); --- /dev/null +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h -@@ -0,0 +1,460 @@ +@@ -0,0 +1,499 @@ +/* Copyright 2014-2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -4392,6 +4756,7 @@ Signed-off-by: Yangbo Lu +#define __DPAA2_ETH_H + +#include ++#include +#include +#include +#include "../../fsl-mc/include/dpaa2-io.h" @@ -4455,7 +4820,7 @@ Signed-off-by: Yangbo Lu +#define DPAA2_ETH_RX_BUF_ALIGN 64 +#define DPAA2_ETH_RX_BUF_ALIGN_V1 256 +#define DPAA2_ETH_NEEDED_HEADROOM(p_priv) \ -+ ((p_priv)->tx_data_offset + DPAA2_ETH_TX_BUF_ALIGN) ++ ((p_priv)->tx_data_offset + DPAA2_ETH_TX_BUF_ALIGN - HH_DATA_MOD) + +/* rx_extra_head prevents reallocations in L3 processing. */ +#define DPAA2_ETH_SKB_SIZE \ @@ -4473,17 +4838,19 @@ Signed-off-by: Yangbo Lu +/* PTP nominal frequency 1GHz */ +#define DPAA2_PTP_NOMINAL_FREQ_PERIOD_NS 1 + -+/* Leave enough extra space in the headroom to make sure the skb is -+ * not realloc'd in forwarding scenarios. -+ */ -+#define DPAA2_ETH_RX_HEAD_ROOM 192 -+ +/* We are accommodating a skb backpointer and some S/G info + * in the frame's software annotation. The hardware + * options are either 0 or 64, so we choose the latter. + */ +#define DPAA2_ETH_SWA_SIZE 64 + ++/* Extra headroom space requested to hardware, in order to make sure there's ++ * no realloc'ing in forwarding scenarios ++ */ ++#define DPAA2_ETH_RX_HEAD_ROOM \ ++ (DPAA2_ETH_TX_HWA_SIZE - DPAA2_ETH_RX_HWA_SIZE + \ ++ DPAA2_ETH_TX_BUF_ALIGN) ++ +/* Must keep this struct smaller than DPAA2_ETH_SWA_SIZE */ +struct dpaa2_eth_swa { + struct sk_buff *skb; @@ -4660,16 +5027,17 @@ Signed-off-by: Yangbo Lu + __u64 pull_err; +}; + ++#define DPAA2_ETH_MAX_DPCONS NR_CPUS ++#define DPAA2_ETH_MAX_TCS 8 ++ +/* Maximum number of queues associated with a DPNI */ -+#define DPAA2_ETH_MAX_RX_QUEUES 16 -+#define DPAA2_ETH_MAX_TX_QUEUES NR_CPUS ++#define DPAA2_ETH_MAX_RX_QUEUES (DPNI_MAX_DIST_SIZE * DPAA2_ETH_MAX_TCS) ++#define DPAA2_ETH_MAX_TX_QUEUES DPNI_MAX_SENDERS +#define DPAA2_ETH_MAX_RX_ERR_QUEUES 1 +#define DPAA2_ETH_MAX_QUEUES (DPAA2_ETH_MAX_RX_QUEUES + \ + DPAA2_ETH_MAX_TX_QUEUES + \ + DPAA2_ETH_MAX_RX_ERR_QUEUES) + -+#define DPAA2_ETH_MAX_DPCONS NR_CPUS -+ +enum dpaa2_eth_fq_type { + DPAA2_RX_FQ = 0, + DPAA2_TX_CONF_FQ, @@ -4682,6 +5050,7 @@ Signed-off-by: Yangbo Lu + u32 fqid; + u32 tx_qdbin; + u16 flowid; ++ u8 tc; + int target_cpu; + struct dpaa2_eth_channel *channel; + enum dpaa2_eth_fq_type type; @@ -4788,6 +5157,10 @@ Signed-off-by: Yangbo Lu + struct dpaa2_eth_cls_rule *cls_rule; + + struct dpni_tx_shaping_cfg shaping_cfg; ++ ++ u8 dcbx_mode; ++ struct ieee_pfc pfc; ++ bool vlan_clsf_set; +}; + +#define dpaa2_eth_hash_enabled(priv) \ @@ -4813,13 +5186,43 @@ Signed-off-by: Yangbo Lu + return priv->dpni_attrs.num_queues; +} + ++static inline int dpaa2_eth_tc_count(struct dpaa2_eth_priv *priv) ++{ ++ return priv->dpni_attrs.num_tcs; ++} ++ ++static inline bool dpaa2_eth_is_pfc_enabled(struct dpaa2_eth_priv *priv, ++ int traffic_class) ++{ ++ return priv->pfc.pfc_en & (1 << traffic_class); ++} ++ ++enum dpaa2_eth_td_cfg { ++ DPAA2_ETH_TD_NONE, ++ DPAA2_ETH_TD_QUEUE, ++ DPAA2_ETH_TD_GROUP ++}; ++ ++static inline enum dpaa2_eth_td_cfg ++dpaa2_eth_get_td_type(struct dpaa2_eth_priv *priv) ++{ ++ bool pfc_enabled = !!(priv->pfc.pfc_en); ++ ++ if (pfc_enabled) ++ return DPAA2_ETH_TD_GROUP; ++ else if (priv->tx_pause_frames) ++ return DPAA2_ETH_TD_NONE; ++ else ++ return DPAA2_ETH_TD_QUEUE; ++} ++ +void check_cls_support(struct dpaa2_eth_priv *priv); + -+int setup_fqs_taildrop(struct dpaa2_eth_priv *priv, bool enable); ++int set_rx_taildrop(struct dpaa2_eth_priv *priv); +#endif /* __DPAA2_H */ --- /dev/null +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-ethtool.c -@@ -0,0 +1,856 @@ +@@ -0,0 +1,864 @@ +/* Copyright 2014-2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -5052,7 +5455,8 @@ Signed-off-by: Yangbo Lu + if (current_tx_pause == pause->tx_pause) + goto out; + -+ err = setup_fqs_taildrop(priv, !pause->tx_pause); ++ priv->tx_pause_frames = pause->tx_pause; ++ err = set_rx_taildrop(priv); + if (err) + netdev_dbg(net_dev, "ERROR %d configuring taildrop", err); + @@ -5498,7 +5902,7 @@ Signed-off-by: Yangbo Lu + struct dpni_rule_cfg rule_cfg; + struct dpni_fs_action_cfg fs_act = { 0 }; + void *dma_mem; -+ int err = 0; ++ int err = 0, tc; + + if (!dpaa2_eth_fs_enabled(priv)) { + netdev_err(net_dev, "dev does not support steering!\n"); @@ -5541,12 +5945,19 @@ Signed-off-by: Yangbo Lu + else + fs_act.flow_id = fs->ring_cookie; + -+ if (add) -+ err = dpni_add_fs_entry(priv->mc_io, 0, priv->mc_token, -+ 0, fs->location, &rule_cfg, &fs_act); -+ else -+ err = dpni_remove_fs_entry(priv->mc_io, 0, priv->mc_token, -+ 0, &rule_cfg); ++ for (tc = 0; tc < dpaa2_eth_tc_count(priv); tc++) { ++ if (add) ++ err = dpni_add_fs_entry(priv->mc_io, 0, priv->mc_token, ++ tc, fs->location, &rule_cfg, ++ &fs_act); ++ else ++ err = dpni_remove_fs_entry(priv->mc_io, 0, ++ priv->mc_token, tc, ++ &rule_cfg); ++ ++ if (err) ++ break; ++ } + + dma_unmap_single(dev, rule_cfg.key_iova, + rule_cfg.key_size * 2, DMA_TO_DEVICE); @@ -5857,7 +6268,7 @@ Signed-off-by: Yangbo Lu +#endif /* __FSL_DPKG_H_ */ --- /dev/null +++ b/drivers/staging/fsl-dpaa2/ethernet/dpni-cmd.h -@@ -0,0 +1,600 @@ +@@ -0,0 +1,658 @@ +/* Copyright 2013-2016 Freescale Semiconductor Inc. + * Copyright 2016 NXP + * @@ -5897,9 +6308,11 @@ Signed-off-by: Yangbo Lu +#define DPNI_VER_MAJOR 7 +#define DPNI_VER_MINOR 0 +#define DPNI_CMD_BASE_VERSION 1 ++#define DPNI_CMD_2ND_VERSION 2 +#define DPNI_CMD_ID_OFFSET 4 + +#define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION) ++#define DPNI_CMD_V2(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_2ND_VERSION) + +#define DPNI_CMDID_OPEN DPNI_CMD(0x801) +#define DPNI_CMDID_CLOSE DPNI_CMD(0x800) @@ -5922,7 +6335,7 @@ Signed-off-by: Yangbo Lu +#define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016) +#define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017) + -+#define DPNI_CMDID_SET_POOLS DPNI_CMD(0x200) ++#define DPNI_CMDID_SET_POOLS DPNI_CMD_V2(0x200) +#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B) + +#define DPNI_CMDID_GET_QDID DPNI_CMD(0x210) @@ -5945,6 +6358,8 @@ Signed-off-by: Yangbo Lu + +#define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD(0x235) + ++#define DPNI_CMDID_SET_QOS_TBL DPNI_CMD(0x240) ++#define DPNI_CMDID_ADD_QOS_ENT DPNI_CMD(0x241) +#define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244) +#define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245) +#define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246) @@ -5985,13 +6400,14 @@ Signed-off-by: Yangbo Lu + +#define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order)) +struct dpni_cmd_set_pools { -+ /* cmd word 0 */ + u8 num_dpbp; + u8 backup_pool_mask; + __le16 pad; -+ /* cmd word 0..4 */ -+ __le32 dpbp_id[DPNI_MAX_DPBP]; -+ /* cmd word 4..6 */ ++ struct { ++ __le16 dpbp_id; ++ u8 priority_mask; ++ u8 pad; ++ } pool[DPNI_MAX_DPBP]; + __le16 buffer_size[DPNI_MAX_DPBP]; +}; + @@ -6370,6 +6786,36 @@ Signed-off-by: Yangbo Lu + __le64 user_context; +}; + ++#define DPNI_DISCARD_ON_MISS_SHIFT 0 ++#define DPNI_DISCARD_ON_MISS_SIZE 1 ++ ++struct dpni_cmd_set_qos_table { ++ u32 pad; ++ u8 default_tc; ++ /* only the LSB */ ++ u8 discard_on_miss; ++ u16 pad1[21]; ++ u64 key_cfg_iova; ++}; ++ ++struct dpni_cmd_add_qos_entry { ++ u16 pad; ++ u8 tc_id; ++ u8 key_size; ++ u16 index; ++ u16 pad2; ++ u64 key_iova; ++ u64 mask_iova; ++}; ++ ++struct dpni_cmd_remove_qos_entry { ++ u8 pad1[3]; ++ u8 key_size; ++ u32 pad2; ++ u64 key_iova; ++ u64 mask_iova; ++}; ++ +struct dpni_cmd_add_fs_entry { + /* cmd word 0 */ + u16 options; @@ -6457,10 +6903,33 @@ Signed-off-by: Yangbo Lu + u32 threshold_exit; +}; + ++struct dpni_cmd_get_congestion_notification { ++ /* cmd word 0 */ ++ u8 qtype; ++ u8 tc; ++}; ++ ++struct dpni_rsp_get_congestion_notification { ++ /* cmd word 0 */ ++ u64 pad; ++ /* cmd word 1 */ ++ u32 dest_id; ++ u16 notification_mode; ++ u8 dest_priority; ++ /* from LSB: dest_type: 4 units:2 */ ++ u8 type_units; ++ /* cmd word 2 */ ++ u64 message_iova; ++ /* cmd word 3 */ ++ u64 message_ctx; ++ /* cmd word 4 */ ++ u32 threshold_entry; ++ u32 threshold_exit; ++}; +#endif /* _FSL_DPNI_CMD_H */ --- /dev/null +++ b/drivers/staging/fsl-dpaa2/ethernet/dpni.c -@@ -0,0 +1,1770 @@ +@@ -0,0 +1,1903 @@ +/* Copyright 2013-2016 Freescale Semiconductor Inc. + * Copyright 2016 NXP + * @@ -6661,7 +7130,10 @@ Signed-off-by: Yangbo Lu + cmd_params = (struct dpni_cmd_set_pools *)cmd.params; + cmd_params->num_dpbp = cfg->num_dpbp; + for (i = 0; i < DPNI_MAX_DPBP; i++) { -+ cmd_params->dpbp_id[i] = cpu_to_le32(cfg->pools[i].dpbp_id); ++ cmd_params->pool[i].dpbp_id = ++ cpu_to_le16(cfg->pools[i].dpbp_id); ++ cmd_params->pool[i].priority_mask = ++ cfg->pools[i].priority_mask; + cmd_params->buffer_size[i] = + cpu_to_le16(cfg->pools[i].buffer_size); + cmd_params->backup_pool_mask |= @@ -7837,6 +8309,82 @@ Signed-off-by: Yangbo Lu + return mc_send_command(mc_io, &cmd); +} + ++/* ++ * dpni_set_qos_table() - Set QoS mapping table ++ * @mc_io: Pointer to MC portal's I/O object ++ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' ++ * @token: Token of DPNI object ++ * @cfg: QoS table configuration ++ * ++ * This function and all QoS-related functions require that ++ *'max_tcs > 1' was set at DPNI creation. ++ * ++ * warning: Before calling this function, call dpkg_prepare_key_cfg() to ++ * prepare the key_cfg_iova parameter ++ * ++ * Return: '0' on Success; Error code otherwise. ++ */ ++int dpni_set_qos_table(struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token, ++ const struct dpni_qos_tbl_cfg *cfg) ++{ ++ struct dpni_cmd_set_qos_table *cmd_params; ++ struct mc_command cmd = { 0 }; ++ ++ /* prepare command */ ++ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_QOS_TBL, ++ cmd_flags, ++ token); ++ cmd_params = (struct dpni_cmd_set_qos_table *)cmd.params; ++ cmd_params->default_tc = cfg->default_tc; ++ cmd_params->key_cfg_iova = cpu_to_le64(cfg->key_cfg_iova); ++ dpni_set_field(cmd_params->discard_on_miss, ++ ENABLE, ++ cfg->discard_on_miss); ++ ++ /* send command to mc*/ ++ return mc_send_command(mc_io, &cmd); ++} ++ ++/** ++ * dpni_add_qos_entry() - Add QoS mapping entry (to select a traffic class) ++ * @mc_io: Pointer to MC portal's I/O object ++ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' ++ * @token: Token of DPNI object ++ * @cfg: QoS rule to add ++ * @tc_id: Traffic class selection (0-7) ++ * @index: Location in the QoS table where to insert the entry. ++ * Only relevant if MASKING is enabled for QoS classification on ++ * this DPNI, it is ignored for exact match. ++ * ++ * Return: '0' on Success; Error code otherwise. ++ */ ++int dpni_add_qos_entry(struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token, ++ const struct dpni_rule_cfg *cfg, ++ u8 tc_id, ++ u16 index) ++{ ++ struct dpni_cmd_add_qos_entry *cmd_params; ++ struct mc_command cmd = { 0 }; ++ ++ /* prepare command */ ++ cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_QOS_ENT, ++ cmd_flags, ++ token); ++ cmd_params = (struct dpni_cmd_add_qos_entry *)cmd.params; ++ cmd_params->tc_id = tc_id; ++ cmd_params->key_size = cfg->key_size; ++ cmd_params->index = cpu_to_le16(index); ++ cmd_params->key_iova = cpu_to_le64(cfg->key_iova); ++ cmd_params->mask_iova = cpu_to_le64(cfg->mask_iova); ++ ++ /* send command to mc*/ ++ return mc_send_command(mc_io, &cmd); ++} ++ +/** + * dpni_add_fs_entry() - Add Flow Steering entry for a specific traffic class + * (to select a flow ID) @@ -7961,6 +8509,60 @@ Signed-off-by: Yangbo Lu +} + +/** ++ * dpni_get_congestion_notification() - Get traffic class congestion ++ * notification configuration ++ * @mc_io: Pointer to MC portal's I/O object ++ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' ++ * @token: Token of DPNI object ++ * @qtype: Type of queue - Rx, Tx and Tx confirm types are supported ++ * @tc_id: Traffic class selection (0-7) ++ * @cfg: congestion notification configuration ++ * ++ * Return: '0' on Success; error code otherwise. ++ */ ++int dpni_get_congestion_notification( ++ struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token, ++ enum dpni_queue_type qtype, ++ u8 tc_id, ++ struct dpni_congestion_notification_cfg *cfg) ++{ ++ struct dpni_rsp_get_congestion_notification *rsp_params; ++ struct dpni_cmd_get_congestion_notification *cmd_params; ++ struct mc_command cmd = { 0 }; ++ int err; ++ ++ /* prepare command */ ++ cmd.header = mc_encode_cmd_header( ++ DPNI_CMDID_GET_CONGESTION_NOTIFICATION, ++ cmd_flags, ++ token); ++ cmd_params = (struct dpni_cmd_get_congestion_notification *)cmd.params; ++ cmd_params->qtype = qtype; ++ cmd_params->tc = tc_id; ++ ++ /* send command to mc*/ ++ err = mc_send_command(mc_io, &cmd); ++ if (err) ++ return err; ++ ++ rsp_params = (struct dpni_rsp_get_congestion_notification *)cmd.params; ++ cfg->units = dpni_get_field(rsp_params->type_units, CONG_UNITS); ++ cfg->threshold_entry = le32_to_cpu(rsp_params->threshold_entry); ++ cfg->threshold_exit = le32_to_cpu(rsp_params->threshold_exit); ++ cfg->message_ctx = le64_to_cpu(rsp_params->message_ctx); ++ cfg->message_iova = le64_to_cpu(rsp_params->message_iova); ++ cfg->notification_mode = le16_to_cpu(rsp_params->notification_mode); ++ cfg->dest_cfg.dest_id = le32_to_cpu(rsp_params->dest_id); ++ cfg->dest_cfg.priority = rsp_params->dest_priority; ++ cfg->dest_cfg.dest_type = dpni_get_field(rsp_params->type_units, ++ DEST_TYPE); ++ ++ return 0; ++} ++ ++/** + * dpni_set_queue() - Set queue parameters + * @mc_io: Pointer to MC portal's I/O object + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_' @@ -8233,7 +8835,7 @@ Signed-off-by: Yangbo Lu +} --- /dev/null +++ b/drivers/staging/fsl-dpaa2/ethernet/dpni.h -@@ -0,0 +1,989 @@ +@@ -0,0 +1,1053 @@ +/* Copyright 2013-2016 Freescale Semiconductor Inc. + * Copyright 2016 NXP + * @@ -8288,6 +8890,14 @@ Signed-off-by: Yangbo Lu + * Maximum number of buffer pools per DPNI + */ +#define DPNI_MAX_DPBP 8 ++/** ++ * Maximum number of senders ++ */ ++#define DPNI_MAX_SENDERS 8 ++/** ++ * Maximum distribution size ++ */ ++#define DPNI_MAX_DIST_SIZE 8 + +/** + * All traffic classes considered; see dpni_set_queue() @@ -8359,13 +8969,15 @@ Signed-off-by: Yangbo Lu + /** + * struct pools - Buffer pools parameters + * @dpbp_id: DPBP object ID ++ * @priority_mask: priorities served by DPBP + * @buffer_size: Buffer size + * @backup_pool: Backup pool + */ + struct { -+ int dpbp_id; ++ u16 dpbp_id; ++ u8 priority_mask; + u16 buffer_size; -+ int backup_pool; ++ u8 backup_pool; + } pools[DPNI_MAX_DPBP]; +}; + @@ -8745,6 +9357,10 @@ Signed-off-by: Yangbo Lu + * Enable a-symmetric pause frames + */ +#define DPNI_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL ++/** ++ * Enable priority flow control pause frames ++ */ ++#define DPNI_LINK_OPT_PFC_PAUSE 0x0000000000000010ULL + +/** + * struct - Structure representing DPNI link configuration @@ -8894,6 +9510,26 @@ Signed-off-by: Yangbo Lu + u8 *key_cfg_buf); + +/** ++ * struct dpni_qos_tbl_cfg - Structure representing QOS table configuration ++ * @key_cfg_iova: I/O virtual address of 256 bytes DMA-able memory filled with ++ * key extractions to be used as the QoS criteria by calling ++ * dpkg_prepare_key_cfg() ++ * @discard_on_miss: Set to '1' to discard frames in case of no match (miss); ++ * '0' to use the 'default_tc' in such cases ++ * @default_tc: Used in case of no-match and 'discard_on_miss'= 0 ++ */ ++struct dpni_qos_tbl_cfg { ++ u64 key_cfg_iova; ++ int discard_on_miss; ++ u8 default_tc; ++}; ++ ++int dpni_set_qos_table(struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token, ++ const struct dpni_qos_tbl_cfg *cfg); ++ ++/** + * struct dpni_rx_tc_dist_cfg - Rx traffic class distribution configuration + * @dist_size: Set the distribution size; + * supported values: 1,2,3,4,6,7,8,12,14,16,24,28,32,48,56,64,96, @@ -9086,6 +9722,12 @@ Signed-off-by: Yangbo Lu + * sw-portal's DQRR, the DQRI interrupt is asserted immediately (if enabled) + */ +#define DPNI_CONG_OPT_INTR_COALESCING_DISABLED 0x00000020 ++/** ++ * This congestion will trigger flow control or priority flow control. ++ * This will have effect only if flow control is enabled with ++ * dpni_set_link_cfg(). ++ */ ++#define DPNI_CONG_OPT_FLOW_CONTROL 0x00000040 + +/** + * struct dpni_congestion_notification_cfg - congestion notification @@ -9119,6 +9761,14 @@ Signed-off-by: Yangbo Lu + u8 tc_id, + const struct dpni_congestion_notification_cfg *cfg); + ++int dpni_get_congestion_notification( ++ struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token, ++ enum dpni_queue_type qtype, ++ u8 tc_id, ++ struct dpni_congestion_notification_cfg *cfg); ++ +/** + * struct dpni_taildrop - Structure representing the taildrop + * @enable: Indicates whether the taildrop is active or not. @@ -9165,6 +9815,22 @@ Signed-off-by: Yangbo Lu + u8 key_size; +}; + ++int dpni_add_qos_entry(struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token, ++ const struct dpni_rule_cfg *cfg, ++ u8 tc_id, ++ u16 index); ++ ++int dpni_remove_qos_entry(struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token, ++ const struct dpni_rule_cfg *cfg); ++ ++int dpni_clear_qos_table(struct fsl_mc_io *mc_io, ++ u32 cmd_flags, ++ u16 token); ++ +/** + * Discard matching traffic. If set, this takes precedence over any other + * configuration and matching traffic is always discarded. @@ -15718,7 +16384,7 @@ Signed-off-by: Yangbo Lu + return 0; +} + -+void ethsw_port_get_stats(struct net_device *netdev, ++struct rtnl_link_stats64 *ethsw_port_get_stats(struct net_device *netdev, + struct rtnl_link_stats64 *storage) +{ + struct ethsw_port_priv *port_priv = netdev_priv(netdev); @@ -15778,7 +16444,7 @@ Signed-off-by: Yangbo Lu + if (err) + goto error; + -+ return; ++ return storage; + +error: + netdev_err(netdev, "dpsw_if_get_counter err %d\n", err); @@ -19125,7 +19791,7 @@ Signed-off-by: Yangbo Lu + return 0; +} + -+void evb_port_get_stats(struct net_device *netdev, ++struct rtnl_link_stats64 *evb_port_get_stats(struct net_device *netdev, + struct rtnl_link_stats64 *storage) +{ + struct evb_port_priv *port_priv = netdev_priv(netdev); @@ -19202,7 +19868,7 @@ Signed-off-by: Yangbo Lu + if (unlikely(err)) + goto error; + -+ return; ++ return storage; + +error: + netdev_err(netdev, "dpdmux_if_get_counter err %d\n", err); @@ -20892,7 +21558,7 @@ Signed-off-by: Yangbo Lu +#endif /* __FSL_DPMAC_H */ --- /dev/null +++ b/drivers/staging/fsl-dpaa2/mac/mac.c -@@ -0,0 +1,666 @@ +@@ -0,0 +1,670 @@ +/* Copyright 2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without @@ -21014,15 +21680,6 @@ Signed-off-by: Yangbo Lu + dev_err(&priv->mc_dev->dev, "dpmac_set_link_state: %d\n", err); +} + -+#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS -+static netdev_tx_t dpaa2_mac_drop_frame(struct sk_buff *skb, -+ struct net_device *dev) -+{ -+ /* we don't support I/O for now, drop the frame */ -+ dev_kfree_skb_any(skb); -+ return NETDEV_TX_OK; -+} -+ +static int dpaa2_mac_open(struct net_device *netdev) +{ + /* start PHY state machine */ @@ -21047,6 +21704,15 @@ Signed-off-by: Yangbo Lu + return 0; +} + ++#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS ++static netdev_tx_t dpaa2_mac_drop_frame(struct sk_buff *skb, ++ struct net_device *dev) ++{ ++ /* we don't support I/O for now, drop the frame */ ++ dev_kfree_skb_any(skb); ++ return NETDEV_TX_OK; ++} ++ +static int dpaa2_mac_get_settings(struct net_device *netdev, + struct ethtool_cmd *cmd) +{ @@ -21059,7 +21725,7 @@ Signed-off-by: Yangbo Lu + return phy_ethtool_sset(netdev->phydev, cmd); +} + -+static void dpaa2_mac_get_stats(struct net_device *netdev, ++static struct rtnl_link_stats64 *dpaa2_mac_get_stats(struct net_device *netdev, + struct rtnl_link_stats64 *storage) +{ + struct dpaa2_mac_priv *priv = netdev_priv(netdev); @@ -21122,9 +21788,10 @@ Signed-off-by: Yangbo Lu + if (err) + goto error; + -+ return; ++ return storage; +error: + netdev_err(netdev, "dpmac_get_counter err %d\n", err); ++ return storage; +} + +static struct { @@ -21207,9 +21874,9 @@ Signed-off-by: Yangbo Lu +} + +static const struct net_device_ops dpaa2_mac_ndo_ops = { -+ .ndo_start_xmit = &dpaa2_mac_drop_frame, + .ndo_open = &dpaa2_mac_open, + .ndo_stop = &dpaa2_mac_stop, ++ .ndo_start_xmit = &dpaa2_mac_drop_frame, + .ndo_get_stats64 = &dpaa2_mac_get_stats, +}; + @@ -21437,10 +22104,9 @@ Signed-off-by: Yangbo Lu + } +#endif /* CONFIG_FSL_DPAA2_MAC_NETDEVS */ + -+ /* probe the PHY as a fixed-link if the link type declared in DPC -+ * explicitly mandates this ++ /* probe the PHY as a fixed-link if there's a phy-handle defined ++ * in the device tree + */ -+ + phy_node = of_parse_phandle(dpmac_node, "phy-handle", 0); + if (!phy_node) { + goto probe_fixed_link; @@ -21492,12 +22158,8 @@ Signed-off-by: Yangbo Lu + dev_info(dev, "Registered fixed PHY.\n"); + } + -+ /* start PHY state machine */ -+#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS + dpaa2_mac_open(netdev); -+#else /* CONFIG_FSL_DPAA2_MAC_NETDEVS */ -+ phy_start(netdev->phydev); -+#endif /* CONFIG_FSL_DPAA2_MAC_NETDEVS */ ++ + return 0; + +err_defer: @@ -21521,6 +22183,15 @@ Signed-off-by: Yangbo Lu +{ + struct device *dev = &mc_dev->dev; + struct dpaa2_mac_priv *priv = dev_get_drvdata(dev); ++ struct net_device *netdev = priv->netdev; ++ ++ dpaa2_mac_stop(netdev); ++ ++ if (phy_is_pseudo_fixed_link(netdev->phydev)) ++ fixed_phy_unregister(netdev->phydev); ++ else ++ phy_disconnect(netdev->phydev); ++ netdev->phydev = NULL; + +#ifdef CONFIG_FSL_DPAA2_MAC_NETDEVS + unregister_netdev(priv->netdev); @@ -21531,7 +22202,6 @@ Signed-off-by: Yangbo Lu + free_netdev(priv->netdev); + + dev_set_drvdata(dev, NULL); -+ kfree(priv); + + return 0; +} diff --git a/target/linux/layerscape/patches-4.9/706-fsl-dpaa-use-4-9-ndo-get-stats64.patch b/target/linux/layerscape/patches-4.9/706-fsl-dpaa-use-4-9-ndo-get-stats64.patch deleted file mode 100644 index 4fa29b290..000000000 --- a/target/linux/layerscape/patches-4.9/706-fsl-dpaa-use-4-9-ndo-get-stats64.patch +++ /dev/null @@ -1,112 +0,0 @@ -From: Mathew McBride -Date: Tue, 24 Oct 2017 11:30:00 +1100 -Subject: [PATCH] dpaa: backport use of 4.9 ndo_get_stats64 - -This patch changes the declarations of ndo_get_stats64 handlers -to the previous struct rtnl_link_stats64 * return type instead of -the mainline void return. - -Suggested-by: Adrien Gallouët -Signed-off-by: Mathew McBride - ---- - drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c | 5 +++-- - drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h | 4 ++-- - drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c | 3 ++- - drivers/staging/fsl-dpaa2/ethsw/switch.c | 4 ++-- - drivers/staging/fsl-dpaa2/evb/evb.c | 4 ++-- - 5 files changed, 11 insertions(+), 9 deletions(-) - ---- a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c -+++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c -@@ -1296,7 +1296,7 @@ static int dpaa2_eth_set_addr(struct net - /** Fill in counters maintained by the GPP driver. These may be different from - * the hardware counters obtained by ethtool. - */ --static void dpaa2_eth_get_stats(struct net_device *net_dev, -+static struct rtnl_link_stats64 *dpaa2_eth_get_stats(struct net_device *net_dev, - struct rtnl_link_stats64 *stats) - { - struct dpaa2_eth_priv *priv = netdev_priv(net_dev); -@@ -1312,6 +1312,7 @@ static void dpaa2_eth_get_stats(struct n - for (j = 0; j < num; j++) - netstats[j] += cpustats[j]; - } -+ return stats; - } - - static int dpaa2_eth_change_mtu(struct net_device *net_dev, int mtu) ---- a/drivers/staging/fsl-dpaa2/ethsw/switch.c -+++ b/drivers/staging/fsl-dpaa2/ethsw/switch.c -@@ -1094,7 +1094,7 @@ static int ethsw_port_fdb_del(struct ndm - return 0; - } - --void ethsw_port_get_stats(struct net_device *netdev, -+struct rtnl_link_stats64 *ethsw_port_get_stats(struct net_device *netdev, - struct rtnl_link_stats64 *storage) - { - struct ethsw_port_priv *port_priv = netdev_priv(netdev); -@@ -1154,7 +1154,7 @@ void ethsw_port_get_stats(struct net_dev - if (err) - goto error; - -- return; -+ return storage; - - error: - netdev_err(netdev, "dpsw_if_get_counter err %d\n", err); ---- a/drivers/staging/fsl-dpaa2/evb/evb.c -+++ b/drivers/staging/fsl-dpaa2/evb/evb.c -@@ -765,7 +765,7 @@ static int evb_dellink(struct net_device - return 0; - } - --void evb_port_get_stats(struct net_device *netdev, -+struct rtnl_link_stats64 *evb_port_get_stats(struct net_device *netdev, - struct rtnl_link_stats64 *storage) - { - struct evb_port_priv *port_priv = netdev_priv(netdev); -@@ -842,7 +842,7 @@ void evb_port_get_stats(struct net_devic - if (unlikely(err)) - goto error; - -- return; -+ return storage; - - error: - netdev_err(netdev, "dpdmux_if_get_counter err %d\n", err); ---- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c -+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.c -@@ -239,8 +239,8 @@ EXPORT_SYMBOL(dpa_timeout); - * Calculates the statistics for the given device by adding the statistics - * collected by each CPU. - */ --void __cold --dpa_get_stats64(struct net_device *net_dev, -+struct rtnl_link_stats64 __cold -+*dpa_get_stats64(struct net_device *net_dev, - struct rtnl_link_stats64 *stats) - { - struct dpa_priv_s *priv = netdev_priv(net_dev); -@@ -258,6 +258,7 @@ dpa_get_stats64(struct net_device *net_d - for (j = 0; j < numstats; j++) - netstats[j] += cpustats[j]; - } -+ return stats; - } - EXPORT_SYMBOL(dpa_get_stats64); - ---- a/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h -+++ b/drivers/net/ethernet/freescale/sdk_dpaa/dpaa_eth_common.h -@@ -140,8 +140,8 @@ int dpa_netdev_init(struct net_device *n - int __cold dpa_start(struct net_device *net_dev); - int __cold dpa_stop(struct net_device *net_dev); - void __cold dpa_timeout(struct net_device *net_dev); --void __cold --dpa_get_stats64(struct net_device *net_dev, -+struct rtnl_link_stats64 __cold -+*dpa_get_stats64(struct net_device *net_dev, - struct rtnl_link_stats64 *stats); - int dpa_change_mtu(struct net_device *net_dev, int new_mtu); - int dpa_ndo_init(struct net_device *net_dev); diff --git a/target/linux/layerscape/patches-4.9/706-fsl_ppfe-support-layercape.patch b/target/linux/layerscape/patches-4.9/706-fsl_ppfe-support-layercape.patch index 4104272ef..01a24336f 100644 --- a/target/linux/layerscape/patches-4.9/706-fsl_ppfe-support-layercape.patch +++ b/target/linux/layerscape/patches-4.9/706-fsl_ppfe-support-layercape.patch @@ -1,9 +1,9 @@ -From 8b7935a883d42187716fe486c83352f24d01ddcd Mon Sep 17 00:00:00 2001 +From 79fb41b6040d00d3bdfca9eb70a7848441eb7447 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Thu, 19 Oct 2017 12:48:19 +0800 +Date: Wed, 17 Jan 2018 15:14:12 +0800 Subject: [PATCH] fsl_ppfe: support layercape -This is a integrated patch for layerscape pfe support. +This is an integrated patch for layerscape pfe support. Calvin Johnson Signed-off-by: Yangbo Lu @@ -25,24 +25,24 @@ Signed-off-by: Yangbo Lu drivers/staging/fsl_ppfe/pfe_ctrl.h | 112 + drivers/staging/fsl_ppfe/pfe_debugfs.c | 111 + drivers/staging/fsl_ppfe/pfe_debugfs.h | 25 + - drivers/staging/fsl_ppfe/pfe_eth.c | 2434 ++++++++++++++++++++ + drivers/staging/fsl_ppfe/pfe_eth.c | 2474 ++++++++++++++++++++ drivers/staging/fsl_ppfe/pfe_eth.h | 184 ++ drivers/staging/fsl_ppfe/pfe_firmware.c | 314 +++ drivers/staging/fsl_ppfe/pfe_firmware.h | 32 + drivers/staging/fsl_ppfe/pfe_hal.c | 1516 ++++++++++++ drivers/staging/fsl_ppfe/pfe_hif.c | 1072 +++++++++ drivers/staging/fsl_ppfe/pfe_hif.h | 211 ++ - drivers/staging/fsl_ppfe/pfe_hif_lib.c | 601 +++++ - drivers/staging/fsl_ppfe/pfe_hif_lib.h | 239 ++ + drivers/staging/fsl_ppfe/pfe_hif_lib.c | 637 +++++ + drivers/staging/fsl_ppfe/pfe_hif_lib.h | 240 ++ drivers/staging/fsl_ppfe/pfe_hw.c | 176 ++ drivers/staging/fsl_ppfe/pfe_hw.h | 27 + - drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c | 394 ++++ + drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c | 385 +++ drivers/staging/fsl_ppfe/pfe_mod.c | 141 ++ drivers/staging/fsl_ppfe/pfe_mod.h | 112 + drivers/staging/fsl_ppfe/pfe_perfmon.h | 38 + drivers/staging/fsl_ppfe/pfe_sysfs.c | 818 +++++++ drivers/staging/fsl_ppfe/pfe_sysfs.h | 29 + - 34 files changed, 10366 insertions(+) + 34 files changed, 10434 insertions(+) create mode 100644 drivers/staging/fsl_ppfe/Kconfig create mode 100644 drivers/staging/fsl_ppfe/Makefile create mode 100644 drivers/staging/fsl_ppfe/TODO @@ -2159,7 +2159,7 @@ Signed-off-by: Yangbo Lu +#endif /* _PFE_DEBUGFS_H_ */ --- /dev/null +++ b/drivers/staging/fsl_ppfe/pfe_eth.c -@@ -0,0 +1,2434 @@ +@@ -0,0 +1,2474 @@ +/* + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP @@ -2455,10 +2455,10 @@ Signed-off-by: Yangbo Lu + /* Initialize the default values */ + + /* -+ * By default, packets without conntrack will use this default high ++ * By default, packets without conntrack will use this default low + * priority queue + */ -+ priv->default_priority = 15; ++ priv->default_priority = 0; + + /* Create our sysfs files */ + err = device_create_file(&ndev->dev, &dev_attr_default_priority); @@ -2739,7 +2739,9 @@ Signed-off-by: Yangbo Lu + if (!phydev) + return -ENODEV; + -+ return phy_ethtool_ksettings_get(phydev, cmd); ++ phy_ethtool_ksettings_get(phydev, cmd); ++ ++ return 0; +} + +/* @@ -3083,7 +3085,8 @@ Signed-off-by: Yangbo Lu + struct ls1012a_mdio_platform_data *minfo) +{ + struct mii_bus *bus; -+ int rc; ++ int rc, ii; ++ struct phy_device *phydev; + + netif_info(priv, drv, priv->ndev, "%s\n", __func__); + pr_info("%s\n", __func__); @@ -3122,6 +3125,31 @@ Signed-off-by: Yangbo Lu + } + + priv->mii_bus = bus; ++ ++ /* For clause 45 we need to call get_phy_device() with it's ++ * 3rd argument as true and then register the phy device ++ * via phy_device_register() ++ */ ++ ++ if (priv->einfo->mii_config == PHY_INTERFACE_MODE_2500SGMII) { ++ for (ii = 0; ii < NUM_GEMAC_SUPPORT; ii++) { ++ phydev = get_phy_device(priv->mii_bus, ++ priv->einfo->phy_id + ii, true); ++ if (!phydev || IS_ERR(phydev)) { ++ rc = -EIO; ++ netdev_err(priv->ndev, "fail to get device\n"); ++ goto err1; ++ } ++ rc = phy_device_register(phydev); ++ if (rc) { ++ phy_device_free(phydev); ++ netdev_err(priv->ndev, ++ "phy_device_register() failed\n"); ++ goto err1; ++ } ++ } ++ } ++ + pfe_eth_mdio_reset(bus); + + return 0; @@ -3307,8 +3335,9 @@ Signed-off-by: Yangbo Lu + struct pfe_eth_priv_s *priv = pfe->eth.eth_priv[0]; + int sgmii_2500 = 0; + struct mii_bus *bus = priv->mii_bus; ++ u16 value = 0; + -+ if (priv->einfo->mii_config == PHY_INTERFACE_MODE_SGMII_2500) ++ if (priv->einfo->mii_config == PHY_INTERFACE_MODE_2500SGMII) + sgmii_2500 = 1; + + netif_info(priv, drv, ndev, "%s\n", __func__); @@ -3324,14 +3353,16 @@ Signed-off-by: Yangbo Lu + pfe_eth_mdio_write(bus, 0, 0x4, 0x4001); + pfe_eth_mdio_write(bus, 0, 0x12, 0xa120); + pfe_eth_mdio_write(bus, 0, 0x13, 0x7); ++ /* Autonegotiation need to be disabled for 2.5G SGMII mode*/ ++ value = 0x0140; ++ pfe_eth_mdio_write(bus, 0, 0x0, value); + } else { + pfe_eth_mdio_write(bus, 0, 0x14, 0xb); + pfe_eth_mdio_write(bus, 0, 0x4, 0x1a1); + pfe_eth_mdio_write(bus, 0, 0x12, 0x400); + pfe_eth_mdio_write(bus, 0, 0x13, 0x0); ++ pfe_eth_mdio_write(bus, 0, 0x0, 0x1140); + } -+ -+ pfe_eth_mdio_write(bus, 0, 0x0, 0x1140); +} + +/* @@ -3357,7 +3388,7 @@ Signed-off-by: Yangbo Lu + netif_info(priv, drv, ndev, "%s: %s\n", __func__, phy_id); + interface = priv->einfo->mii_config; + if ((interface == PHY_INTERFACE_MODE_SGMII) || -+ (interface == PHY_INTERFACE_MODE_SGMII_2500)) { ++ (interface == PHY_INTERFACE_MODE_2500SGMII)) { + /*Configure SGMII PCS */ + if (pfe->scfg) { + /*Config MDIO from serdes */ @@ -3725,10 +3756,17 @@ Signed-off-by: Yangbo Lu + unsigned int n_segs) +{ + ktime_t kt; ++ int tried = 0; + ++try_again: + if (unlikely((__hif_tx_avail(&pfe->hif) < n_desc) || -+ (hif_lib_tx_avail(&priv->client, queuenum) < n_desc) || ++ (hif_lib_tx_avail(&priv->client, queuenum) < n_desc) || + (hif_lib_tx_credit_avail(pfe, priv->id, queuenum) < n_segs))) { ++ if (!tried) { ++ __hif_lib_update_credit(&priv->client, queuenum); ++ tried = 1; ++ goto try_again; ++ } +#ifdef PFE_ETH_TX_STATS + if (__hif_tx_avail(&pfe->hif) < n_desc) { + priv->stop_queue_hif[queuenum]++; @@ -3851,8 +3889,10 @@ Signed-off-by: Yangbo Lu + + netif_info(priv, tx_done, priv->ndev, "%s\n", __func__); + -+ for (ii = 0; ii < emac_txq_cnt; ii++) ++ for (ii = 0; ii < emac_txq_cnt; ii++) { + pfe_eth_flush_txQ(priv, ii, 0, 0); ++ __hif_lib_update_credit(&priv->client, ii); ++ } +} + +void pfe_tx_get_req_desc(struct sk_buff *skb, unsigned int *n_desc, unsigned int @@ -7943,7 +7983,7 @@ Signed-off-by: Yangbo Lu +#endif /* _PFE_HIF_H_ */ --- /dev/null +++ b/drivers/staging/fsl_ppfe/pfe_hif_lib.c -@@ -0,0 +1,601 @@ +@@ -0,0 +1,637 @@ +/* + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP @@ -7980,7 +8020,10 @@ Signed-off-by: Yangbo Lu + +unsigned int lro_mode; +unsigned int page_mode; -+unsigned int tx_qos; ++unsigned int tx_qos = 1; ++module_param(tx_qos, uint, 0444); ++MODULE_PARM_DESC(tx_qos, "0: disable ,\n" ++ "1: enable (default), guarantee no packet drop at TMU level\n"); +unsigned int pfe_pkt_size; +unsigned int pfe_pkt_headroom; +unsigned int emac_txq_cnt; @@ -8511,6 +8554,39 @@ Signed-off-by: Yangbo Lu + } +} + ++/* __hif_lib_update_credit ++ * ++ * @param[in] client hif client context ++ * @param[in] queue queue number in match with TMU ++ */ ++void __hif_lib_update_credit(struct hif_client_s *client, unsigned int queue) ++{ ++ unsigned int tmu_tx_packets, tmp; ++ ++ if (tx_qos) { ++ tmu_tx_packets = be32_to_cpu(pe_dmem_read(TMU0_ID + ++ client->id, (TMU_DM_TX_TRANS + (queue * 4)), 4)); ++ ++ /* tx_packets counter overflowed */ ++ if (tmu_tx_packets > ++ pfe->tmu_credit.tx_packets[client->id][queue]) { ++ tmp = UINT_MAX - tmu_tx_packets + ++ pfe->tmu_credit.tx_packets[client->id][queue]; ++ ++ pfe->tmu_credit.tx_credit[client->id][queue] = ++ pfe->tmu_credit.tx_credit_max[client->id][queue] - tmp; ++ } else { ++ /* TMU tx <= pfe_eth tx, normal case or both OF since ++ * last time ++ */ ++ pfe->tmu_credit.tx_credit[client->id][queue] = ++ pfe->tmu_credit.tx_credit_max[client->id][queue] - ++ (pfe->tmu_credit.tx_packets[client->id][queue] - ++ tmu_tx_packets); ++ } ++ } ++} ++ +int pfe_hif_lib_init(struct pfe *pfe) +{ + int rc; @@ -8547,7 +8623,7 @@ Signed-off-by: Yangbo Lu +} --- /dev/null +++ b/drivers/staging/fsl_ppfe/pfe_hif_lib.h -@@ -0,0 +1,239 @@ +@@ -0,0 +1,240 @@ +/* + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP @@ -8735,6 +8811,7 @@ Signed-off-by: Yangbo Lu +void *hif_lib_receive_pkt(struct hif_client_s *client, int qno, int *len, int + *ofst, unsigned int *rx_ctrl, + unsigned int *desc_ctrl, void **priv_data); ++void __hif_lib_update_credit(struct hif_client_s *client, unsigned int queue); +void hif_lib_set_rx_cpu_affinity(struct hif_client_s *client, int cpu_id); +void hif_lib_set_tx_queue_nocpy(struct hif_client_s *client, int qno, int + enable); @@ -8998,7 +9075,7 @@ Signed-off-by: Yangbo Lu +#endif /* _PFE_HW_H_ */ --- /dev/null +++ b/drivers/staging/fsl_ppfe/pfe_ls1012a_platform.c -@@ -0,0 +1,394 @@ +@@ -0,0 +1,385 @@ +/* + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 NXP @@ -9170,13 +9247,7 @@ Signed-off-by: Yangbo Lu + + pfe->ddr_phys_baseaddr = res.start; + pfe->ddr_size = resource_size(&res); -+ + pfe->ddr_baseaddr = phys_to_virt(res.start); -+ if (!pfe->ddr_baseaddr) { -+ pr_err("ioremap() ddr failed\n"); -+ rc = -ENOMEM; -+ goto err_ddr; -+ } + + pfe->scfg = + syscon_regmap_lookup_by_phandle(pdev->dev.of_node, @@ -9258,8 +9329,6 @@ Signed-off-by: Yangbo Lu + iounmap(pfe->cbus_baseaddr); + +err_axi: -+ iounmap(pfe->ddr_baseaddr); -+ +err_ddr: + platform_set_drvdata(pdev, NULL); + @@ -9282,7 +9351,6 @@ Signed-off-by: Yangbo Lu + rc = pfe_remove(pfe); + + iounmap(pfe->cbus_baseaddr); -+ iounmap(pfe->ddr_baseaddr); + + platform_set_drvdata(pdev, NULL); + diff --git a/target/linux/layerscape/patches-4.9/801-ata-support-layerscape.patch b/target/linux/layerscape/patches-4.9/801-ata-support-layerscape.patch index 0c1cd1bf8..e9d34d36c 100644 --- a/target/linux/layerscape/patches-4.9/801-ata-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/801-ata-support-layerscape.patch @@ -1,9 +1,9 @@ -From 505eb62bdb7a4cc25b13491dd5c68d0741c5d6da Mon Sep 17 00:00:00 2001 +From 4c3979602db05bca439bfc98db88dc14a8663db0 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:21:13 +0800 -Subject: [PATCH] ata: support layerscape +Date: Wed, 17 Jan 2018 15:14:57 +0800 +Subject: [PATCH 13/30] ata: support layerscape -This is a integrated patch for layerscape sata support. +This is an integrated patch for layerscape sata support. Signed-off-by: Tang Yuantian Signed-off-by: Yangbo Lu diff --git a/target/linux/layerscape/patches-4.9/802-clk-support-layerscape.patch b/target/linux/layerscape/patches-4.9/802-clk-support-layerscape.patch index 2f7d6f847..0d05dc78a 100644 --- a/target/linux/layerscape/patches-4.9/802-clk-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/802-clk-support-layerscape.patch @@ -1,17 +1,17 @@ -From bd3df6d053a28d5aa630524c9087c21def30e764 Mon Sep 17 00:00:00 2001 +From 82a391a067491f4c46b75d0dfe2bf9e5a11aca8e Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:09:35 +0800 -Subject: [PATCH] clk: support layerscape +Date: Wed, 17 Jan 2018 15:15:44 +0800 +Subject: [PATCH 14/30] clk: support layerscape -This is a integrated patch for layerscape clock support. +This is an integrated patch for layerscape clock support. Signed-off-by: Yuantian Tang Signed-off-by: Mingkai Hu Signed-off-by: Scott Wood Signed-off-by: Yangbo Lu --- - drivers/clk/clk-qoriq.c | 170 ++++++++++++++++++++++++++++++++++++++++++++---- - 1 file changed, 156 insertions(+), 14 deletions(-) + drivers/clk/clk-qoriq.c | 179 ++++++++++++++++++++++++++++++++++++++++++++---- + 1 file changed, 164 insertions(+), 15 deletions(-) --- a/drivers/clk/clk-qoriq.c +++ b/drivers/clk/clk-qoriq.c @@ -23,6 +23,15 @@ Signed-off-by: Yangbo Lu #include #include #include +@@ -40,7 +41,7 @@ struct clockgen_pll_div { + }; + + struct clockgen_pll { +- struct clockgen_pll_div div[4]; ++ struct clockgen_pll_div div[8]; + }; + + #define CLKSEL_VALID 1 @@ -87,7 +88,7 @@ struct clockgen { struct device_node *node; void __iomem *regs; @@ -244,11 +253,18 @@ Signed-off-by: Yangbo Lu if (cg->info.flags & CG_VER3) { switch (idx) { case PLATFORM_PLL: -@@ -1000,12 +1125,13 @@ static void __init create_one_pll(struct +@@ -1000,12 +1125,20 @@ static void __init create_one_pll(struct for (i = 0; i < ARRAY_SIZE(pll->div); i++) { struct clk *clk; + int ret; ++ ++ /* ++ * For platform PLL, there are 8 divider clocks. ++ * For core PLL, there are 4 divider clocks at most. ++ */ ++ if (idx != 0 && i >= 4) ++ break; snprintf(pll->div[i].name, sizeof(pll->div[i].name), "cg-pll%d-div%d", idx, i + 1); @@ -259,7 +275,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(clk)) { pr_err("%s: %s: register failed %ld\n", __func__, pll->div[i].name, PTR_ERR(clk)); -@@ -1013,6 +1139,11 @@ static void __init create_one_pll(struct +@@ -1013,6 +1146,11 @@ static void __init create_one_pll(struct } pll->div[i].clk = clk; @@ -271,7 +287,7 @@ Signed-off-by: Yangbo Lu } } -@@ -1142,6 +1273,13 @@ static struct clk *clockgen_clk_get(stru +@@ -1142,6 +1280,13 @@ static struct clk *clockgen_clk_get(stru goto bad_args; clk = pll->div[idx].clk; break; @@ -285,7 +301,7 @@ Signed-off-by: Yangbo Lu default: goto bad_args; } -@@ -1253,6 +1391,7 @@ static void __init clockgen_init(struct +@@ -1253,6 +1398,7 @@ static void __init clockgen_init(struct clockgen.info.flags |= CG_CMUX_GE_PLAT; clockgen.sysclk = create_sysclk("cg-sysclk"); @@ -293,7 +309,7 @@ Signed-off-by: Yangbo Lu create_plls(&clockgen); create_muxes(&clockgen); -@@ -1273,8 +1412,11 @@ err: +@@ -1273,8 +1419,11 @@ err: CLK_OF_DECLARE(qoriq_clockgen_1, "fsl,qoriq-clockgen-1.0", clockgen_init); CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init); diff --git a/target/linux/layerscape/patches-4.9/803-cpufreq-support-layerscape.patch b/target/linux/layerscape/patches-4.9/803-cpufreq-support-layerscape.patch index 2bc0f24f7..465f909a9 100644 --- a/target/linux/layerscape/patches-4.9/803-cpufreq-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/803-cpufreq-support-layerscape.patch @@ -1,9 +1,9 @@ -From a9ebdf9fa18fd317a4e97f46e8c5263898094864 Mon Sep 17 00:00:00 2001 +From b018e44a68dc2f4df819ae194e39e07313841dad Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:20:10 +0800 -Subject: [PATCH] cpufreq: support layerscape +Date: Wed, 17 Jan 2018 15:27:58 +0800 +Subject: [PATCH 15/30] cpufreq: support layerscape -This is a integrated patch for layerscape pm support. +This is an integrated patch for layerscape pm support. Signed-off-by: Tang Yuantian Signed-off-by: Yangbo Lu @@ -11,11 +11,13 @@ Signed-off-by: Yangbo Lu drivers/cpufreq/Kconfig | 2 +- drivers/cpufreq/qoriq-cpufreq.c | 176 +++++++++++++++------------------------- drivers/firmware/psci.c | 12 ++- - 3 files changed, 77 insertions(+), 113 deletions(-) + drivers/soc/fsl/rcpm.c | 158 ++++++++++++++++++++++++++++++++++++ + 4 files changed, 235 insertions(+), 113 deletions(-) + create mode 100644 drivers/soc/fsl/rcpm.c --- a/drivers/cpufreq/Kconfig +++ b/drivers/cpufreq/Kconfig -@@ -332,7 +332,7 @@ endif +@@ -334,7 +334,7 @@ endif config QORIQ_CPUFREQ tristate "CPU frequency scaling driver for Freescale QorIQ SoCs" @@ -359,3 +361,164 @@ Signed-off-by: Yangbo Lu } /* +--- /dev/null ++++ b/drivers/soc/fsl/rcpm.c +@@ -0,0 +1,158 @@ ++/* ++ * Run Control and Power Management (RCPM) driver ++ * ++ * Copyright 2016 NXP ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ */ ++#define pr_fmt(fmt) "RCPM: %s: " fmt, __func__ ++ ++#include ++#include ++#include ++#include ++#include ++ ++/* RCPM register offset */ ++#define RCPM_IPPDEXPCR0 0x140 ++ ++#define RCPM_WAKEUP_CELL_SIZE 2 ++ ++struct rcpm_config { ++ int ipp_num; ++ int ippdexpcr_offset; ++ u32 ippdexpcr[2]; ++ void *rcpm_reg_base; ++}; ++ ++static struct rcpm_config *rcpm; ++ ++static inline void rcpm_reg_write(u32 offset, u32 value) ++{ ++ iowrite32be(value, rcpm->rcpm_reg_base + offset); ++} ++ ++static inline u32 rcpm_reg_read(u32 offset) ++{ ++ return ioread32be(rcpm->rcpm_reg_base + offset); ++} ++ ++static void rcpm_wakeup_fixup(struct device *dev, void *data) ++{ ++ struct device_node *node = dev ? dev->of_node : NULL; ++ u32 value[RCPM_WAKEUP_CELL_SIZE]; ++ int ret, i; ++ ++ if (!dev || !node || !device_may_wakeup(dev)) ++ return; ++ ++ /* ++ * Get the values in the "rcpm-wakeup" property. ++ * Three values are: ++ * The first is a pointer to the RCPM node. ++ * The second is the value of the ippdexpcr0 register. ++ * The third is the value of the ippdexpcr1 register. ++ */ ++ ret = of_property_read_u32_array(node, "fsl,rcpm-wakeup", ++ value, RCPM_WAKEUP_CELL_SIZE); ++ if (ret) ++ return; ++ ++ pr_debug("wakeup source: the device %s\n", node->full_name); ++ ++ for (i = 0; i < rcpm->ipp_num; i++) ++ rcpm->ippdexpcr[i] |= value[i + 1]; ++} ++ ++static int rcpm_suspend_prepare(void) ++{ ++ int i; ++ u32 val; ++ ++ BUG_ON(!rcpm); ++ ++ for (i = 0; i < rcpm->ipp_num; i++) ++ rcpm->ippdexpcr[i] = 0; ++ ++ dpm_for_each_dev(NULL, rcpm_wakeup_fixup); ++ ++ for (i = 0; i < rcpm->ipp_num; i++) { ++ if (rcpm->ippdexpcr[i]) { ++ val = rcpm_reg_read(rcpm->ippdexpcr_offset + 4 * i); ++ rcpm_reg_write(rcpm->ippdexpcr_offset + 4 * i, ++ val | rcpm->ippdexpcr[i]); ++ pr_debug("ippdexpcr%d = 0x%x\n", i, rcpm->ippdexpcr[i]); ++ } ++ } ++ ++ return 0; ++} ++ ++static int rcpm_suspend_notifier_call(struct notifier_block *bl, ++ unsigned long state, ++ void *unused) ++{ ++ switch (state) { ++ case PM_SUSPEND_PREPARE: ++ rcpm_suspend_prepare(); ++ break; ++ } ++ ++ return NOTIFY_DONE; ++} ++ ++static struct rcpm_config rcpm_default_config = { ++ .ipp_num = 1, ++ .ippdexpcr_offset = RCPM_IPPDEXPCR0, ++}; ++ ++static const struct of_device_id rcpm_matches[] = { ++ { ++ .compatible = "fsl,qoriq-rcpm-2.1", ++ .data = &rcpm_default_config, ++ }, ++ {} ++}; ++ ++static struct notifier_block rcpm_suspend_notifier = { ++ .notifier_call = rcpm_suspend_notifier_call, ++}; ++ ++static int __init layerscape_rcpm_init(void) ++{ ++ const struct of_device_id *match; ++ struct device_node *np; ++ ++ np = of_find_matching_node_and_match(NULL, rcpm_matches, &match); ++ if (!np) { ++ pr_err("Can't find the RCPM node.\n"); ++ return -EINVAL; ++ } ++ ++ if (match->data) ++ rcpm = (struct rcpm_config *)match->data; ++ else ++ return -EINVAL; ++ ++ rcpm->rcpm_reg_base = of_iomap(np, 0); ++ of_node_put(np); ++ if (!rcpm->rcpm_reg_base) ++ return -ENOMEM; ++ ++ register_pm_notifier(&rcpm_suspend_notifier); ++ ++ pr_info("The RCPM driver initialized.\n"); ++ ++ return 0; ++} ++ ++subsys_initcall(layerscape_rcpm_init); diff --git a/target/linux/layerscape/patches-4.9/804-crypto-support-layerscape.patch b/target/linux/layerscape/patches-4.9/804-crypto-support-layerscape.patch index 6deb5f975..2598cdedb 100644 --- a/target/linux/layerscape/patches-4.9/804-crypto-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/804-crypto-support-layerscape.patch @@ -1,12 +1,12 @@ -From 9c9579d76ccd6e738ab98c9b4c73c168912cdb8a Mon Sep 17 00:00:00 2001 +From a3310d64d7cb1ba0f9279e77d21f13a75fa66ab5 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Wed, 27 Sep 2017 15:02:01 +0800 -Subject: [PATCH] crypto: support layerscape +Date: Wed, 17 Jan 2018 15:29:23 +0800 +Subject: [PATCH 16/30] crypto: support layerscape MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -This is a integrated patch for layerscape sec support. +This is an integrated patch for layerscape sec support. Signed-off-by: Radu Alexe Signed-off-by: Fabio Estevam @@ -36,39 +36,41 @@ Signed-off-by: Yangbo Lu crypto/crypto_user.c | 19 + crypto/scompress.c | 356 ++ crypto/tcrypt.c | 17 +- - crypto/testmgr.c | 1701 ++++---- - crypto/testmgr.h | 1125 +++--- + crypto/testmgr.c | 1708 +++--- + crypto/testmgr.h | 1125 ++-- crypto/tls.c | 607 +++ - drivers/crypto/caam/Kconfig | 72 +- - drivers/crypto/caam/Makefile | 15 +- - drivers/crypto/caam/caamalg.c | 2125 +++------- - drivers/crypto/caam/caamalg_desc.c | 1913 +++++++++ + drivers/crypto/caam/Kconfig | 77 +- + drivers/crypto/caam/Makefile | 16 +- + drivers/crypto/caam/caamalg.c | 2171 ++------ + drivers/crypto/caam/caamalg_desc.c | 1961 +++++++ drivers/crypto/caam/caamalg_desc.h | 127 + - drivers/crypto/caam/caamalg_qi.c | 2877 +++++++++++++ - drivers/crypto/caam/caamalg_qi2.c | 4428 +++++++++++++++++++++ - drivers/crypto/caam/caamalg_qi2.h | 265 ++ - drivers/crypto/caam/caamhash.c | 521 +-- - drivers/crypto/caam/caampkc.c | 471 ++- + drivers/crypto/caam/caamalg_qi.c | 2929 ++++++++++ + drivers/crypto/caam/caamalg_qi2.c | 5920 +++++++++++++++++++++ + drivers/crypto/caam/caamalg_qi2.h | 281 + + drivers/crypto/caam/caamhash.c | 550 +- + drivers/crypto/caam/caamhash_desc.c | 108 + + drivers/crypto/caam/caamhash_desc.h | 49 + + drivers/crypto/caam/caampkc.c | 471 +- drivers/crypto/caam/caampkc.h | 58 + drivers/crypto/caam/caamrng.c | 16 +- drivers/crypto/caam/compat.h | 1 + - drivers/crypto/caam/ctrl.c | 356 +- + drivers/crypto/caam/ctrl.c | 358 +- drivers/crypto/caam/ctrl.h | 2 + - drivers/crypto/caam/desc.h | 55 +- - drivers/crypto/caam/desc_constr.h | 139 +- - drivers/crypto/caam/dpseci.c | 859 ++++ + drivers/crypto/caam/desc.h | 84 +- + drivers/crypto/caam/desc_constr.h | 180 +- + drivers/crypto/caam/dpseci.c | 859 +++ drivers/crypto/caam/dpseci.h | 395 ++ - drivers/crypto/caam/dpseci_cmd.h | 261 ++ + drivers/crypto/caam/dpseci_cmd.h | 261 + drivers/crypto/caam/error.c | 127 +- drivers/crypto/caam/error.h | 10 +- drivers/crypto/caam/intern.h | 31 +- - drivers/crypto/caam/jr.c | 97 +- + drivers/crypto/caam/jr.c | 72 +- drivers/crypto/caam/jr.h | 2 + drivers/crypto/caam/key_gen.c | 32 +- drivers/crypto/caam/key_gen.h | 36 +- drivers/crypto/caam/pdb.h | 62 + drivers/crypto/caam/pkc_desc.c | 36 + - drivers/crypto/caam/qi.c | 797 ++++ + drivers/crypto/caam/qi.c | 797 +++ drivers/crypto/caam/qi.h | 204 + drivers/crypto/caam/regs.h | 63 +- drivers/crypto/caam/sg_sw_qm.h | 126 + @@ -77,14 +79,14 @@ Signed-off-by: Yangbo Lu drivers/net/wireless/rsi/rsi_91x_usb.c | 2 +- drivers/staging/wilc1000/linux_wlan.c | 2 +- drivers/staging/wilc1000/wilc_wfi_cfgoperations.c | 2 +- - include/crypto/acompress.h | 269 ++ + include/crypto/acompress.h | 269 + include/crypto/internal/acompress.h | 81 + include/crypto/internal/scompress.h | 136 + include/linux/crypto.h | 3 + include/uapi/linux/cryptouser.h | 5 + scripts/spelling.txt | 3 + sound/soc/amd/acp-pcm-dma.c | 2 +- - 55 files changed, 17310 insertions(+), 3955 deletions(-) + 57 files changed, 19177 insertions(+), 3988 deletions(-) create mode 100644 crypto/acompress.c create mode 100644 crypto/scompress.c create mode 100644 crypto/tls.c @@ -93,6 +95,8 @@ Signed-off-by: Yangbo Lu create mode 100644 drivers/crypto/caam/caamalg_qi.c create mode 100644 drivers/crypto/caam/caamalg_qi2.c create mode 100644 drivers/crypto/caam/caamalg_qi2.h + create mode 100644 drivers/crypto/caam/caamhash_desc.c + create mode 100644 drivers/crypto/caam/caamhash_desc.h create mode 100644 drivers/crypto/caam/dpseci.c create mode 100644 drivers/crypto/caam/dpseci.h create mode 100644 drivers/crypto/caam/dpseci_cmd.h @@ -777,7 +781,7 @@ Signed-off-by: Yangbo Lu }; struct tcrypt_result { -@@ -1331,6 +1331,10 @@ static int do_test(const char *alg, u32 +@@ -1333,6 +1333,10 @@ static int do_test(const char *alg, u32 ret += tcrypt_test("hmac(sha3-512)"); break; @@ -788,7 +792,7 @@ Signed-off-by: Yangbo Lu case 150: ret += tcrypt_test("ansi_cprng"); break; -@@ -1392,6 +1396,9 @@ static int do_test(const char *alg, u32 +@@ -1394,6 +1398,9 @@ static int do_test(const char *alg, u32 case 190: ret += tcrypt_test("authenc(hmac(sha512),cbc(des3_ede))"); break; @@ -798,7 +802,7 @@ Signed-off-by: Yangbo Lu case 200: test_cipher_speed("ecb(aes)", ENCRYPT, sec, NULL, 0, speed_template_16_24_32); -@@ -1406,9 +1413,9 @@ static int do_test(const char *alg, u32 +@@ -1408,9 +1415,9 @@ static int do_test(const char *alg, u32 test_cipher_speed("lrw(aes)", DECRYPT, sec, NULL, 0, speed_template_32_40_48); test_cipher_speed("xts(aes)", ENCRYPT, sec, NULL, 0, @@ -810,7 +814,7 @@ Signed-off-by: Yangbo Lu test_cipher_speed("cts(cbc(aes))", ENCRYPT, sec, NULL, 0, speed_template_16_24_32); test_cipher_speed("cts(cbc(aes))", DECRYPT, sec, NULL, 0, -@@ -1839,9 +1846,9 @@ static int do_test(const char *alg, u32 +@@ -1841,9 +1848,9 @@ static int do_test(const char *alg, u32 test_acipher_speed("lrw(aes)", DECRYPT, sec, NULL, 0, speed_template_32_40_48); test_acipher_speed("xts(aes)", ENCRYPT, sec, NULL, 0, @@ -1257,7 +1261,31 @@ Signed-off-by: Yangbo Lu const bool diff_dst, const int align_offset) { const char *algo = -@@ -1330,7 +1571,8 @@ out_nobuf: +@@ -1079,12 +1320,16 @@ static int __test_skcipher(struct crypto + const char *e, *d; + struct tcrypt_result result; + void *data; +- char iv[MAX_IVLEN]; ++ char *iv; + char *xbuf[XBUFSIZE]; + char *xoutbuf[XBUFSIZE]; + int ret = -ENOMEM; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); + ++ iv = kmalloc(MAX_IVLEN, GFP_KERNEL); ++ if (!iv) ++ return ret; ++ + if (testmgr_alloc_buf(xbuf)) + goto out_nobuf; + +@@ -1325,12 +1570,14 @@ out: + testmgr_free_buf(xoutbuf); + out_nooutbuf: + testmgr_free_buf(xbuf); ++ kfree(iv); + out_nobuf: + return ret; } static int test_skcipher(struct crypto_skcipher *tfm, int enc, @@ -1267,7 +1295,7 @@ Signed-off-by: Yangbo Lu { unsigned int alignmask; int ret; -@@ -1362,8 +1604,10 @@ static int test_skcipher(struct crypto_s +@@ -1362,8 +1609,10 @@ static int test_skcipher(struct crypto_s return 0; } @@ -1280,7 +1308,7 @@ Signed-off-by: Yangbo Lu { const char *algo = crypto_tfm_alg_driver_name(crypto_comp_tfm(tfm)); unsigned int i; -@@ -1442,7 +1686,154 @@ out: +@@ -1442,7 +1691,154 @@ out: return ret; } @@ -1436,7 +1464,7 @@ Signed-off-by: Yangbo Lu unsigned int tcount) { const char *algo = crypto_tfm_alg_driver_name(crypto_rng_tfm(tfm)); -@@ -1509,7 +1900,7 @@ static int alg_test_aead(const struct al +@@ -1509,7 +1905,7 @@ static int alg_test_aead(const struct al struct crypto_aead *tfm; int err = 0; @@ -1445,7 +1473,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(tfm)) { printk(KERN_ERR "alg: aead: Failed to load transform for %s: " "%ld\n", driver, PTR_ERR(tfm)); -@@ -1538,7 +1929,7 @@ static int alg_test_cipher(const struct +@@ -1538,7 +1934,7 @@ static int alg_test_cipher(const struct struct crypto_cipher *tfm; int err = 0; @@ -1454,7 +1482,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(tfm)) { printk(KERN_ERR "alg: cipher: Failed to load transform for " "%s: %ld\n", driver, PTR_ERR(tfm)); -@@ -1567,7 +1958,7 @@ static int alg_test_skcipher(const struc +@@ -1567,7 +1963,7 @@ static int alg_test_skcipher(const struc struct crypto_skcipher *tfm; int err = 0; @@ -1463,7 +1491,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(tfm)) { printk(KERN_ERR "alg: skcipher: Failed to load transform for " "%s: %ld\n", driver, PTR_ERR(tfm)); -@@ -1593,22 +1984,38 @@ out: +@@ -1593,22 +1989,38 @@ out: static int alg_test_comp(const struct alg_test_desc *desc, const char *driver, u32 type, u32 mask) { @@ -1514,7 +1542,7 @@ Signed-off-by: Yangbo Lu return err; } -@@ -1618,7 +2025,7 @@ static int alg_test_hash(const struct al +@@ -1618,7 +2030,7 @@ static int alg_test_hash(const struct al struct crypto_ahash *tfm; int err; @@ -1523,7 +1551,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(tfm)) { printk(KERN_ERR "alg: hash: Failed to load transform for %s: " "%ld\n", driver, PTR_ERR(tfm)); -@@ -1646,7 +2053,7 @@ static int alg_test_crc32c(const struct +@@ -1646,7 +2058,7 @@ static int alg_test_crc32c(const struct if (err) goto out; @@ -1532,7 +1560,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(tfm)) { printk(KERN_ERR "alg: crc32c: Failed to load transform for %s: " "%ld\n", driver, PTR_ERR(tfm)); -@@ -1688,7 +2095,7 @@ static int alg_test_cprng(const struct a +@@ -1688,7 +2100,7 @@ static int alg_test_cprng(const struct a struct crypto_rng *rng; int err; @@ -1541,7 +1569,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(rng)) { printk(KERN_ERR "alg: cprng: Failed to load transform for %s: " "%ld\n", driver, PTR_ERR(rng)); -@@ -1703,7 +2110,7 @@ static int alg_test_cprng(const struct a +@@ -1703,7 +2115,7 @@ static int alg_test_cprng(const struct a } @@ -1550,7 +1578,7 @@ Signed-off-by: Yangbo Lu const char *driver, u32 type, u32 mask) { int ret = -EAGAIN; -@@ -1715,7 +2122,7 @@ static int drbg_cavs_test(struct drbg_te +@@ -1715,7 +2127,7 @@ static int drbg_cavs_test(struct drbg_te if (!buf) return -ENOMEM; @@ -1559,7 +1587,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(drng)) { printk(KERN_ERR "alg: drbg: could not allocate DRNG handle for " "%s\n", driver); -@@ -1777,7 +2184,7 @@ static int alg_test_drbg(const struct al +@@ -1777,7 +2189,7 @@ static int alg_test_drbg(const struct al int err = 0; int pr = 0; int i = 0; @@ -1568,7 +1596,7 @@ Signed-off-by: Yangbo Lu unsigned int tcount = desc->suite.drbg.count; if (0 == memcmp(driver, "drbg_pr_", 8)) -@@ -1796,7 +2203,7 @@ static int alg_test_drbg(const struct al +@@ -1796,7 +2208,7 @@ static int alg_test_drbg(const struct al } @@ -1577,7 +1605,7 @@ Signed-off-by: Yangbo Lu const char *alg) { struct kpp_request *req; -@@ -1888,7 +2295,7 @@ free_req: +@@ -1888,7 +2300,7 @@ free_req: } static int test_kpp(struct crypto_kpp *tfm, const char *alg, @@ -1586,7 +1614,7 @@ Signed-off-by: Yangbo Lu { int ret, i; -@@ -1909,7 +2316,7 @@ static int alg_test_kpp(const struct alg +@@ -1909,7 +2321,7 @@ static int alg_test_kpp(const struct alg struct crypto_kpp *tfm; int err = 0; @@ -1595,7 +1623,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(tfm)) { pr_err("alg: kpp: Failed to load tfm for %s: %ld\n", driver, PTR_ERR(tfm)); -@@ -1924,7 +2331,7 @@ static int alg_test_kpp(const struct alg +@@ -1924,7 +2336,7 @@ static int alg_test_kpp(const struct alg } static int test_akcipher_one(struct crypto_akcipher *tfm, @@ -1604,7 +1632,7 @@ Signed-off-by: Yangbo Lu { char *xbuf[XBUFSIZE]; struct akcipher_request *req; -@@ -2044,7 +2451,8 @@ free_xbuf: +@@ -2044,7 +2456,8 @@ free_xbuf: } static int test_akcipher(struct crypto_akcipher *tfm, const char *alg, @@ -1614,7 +1642,7 @@ Signed-off-by: Yangbo Lu { const char *algo = crypto_tfm_alg_driver_name(crypto_akcipher_tfm(tfm)); -@@ -2068,7 +2476,7 @@ static int alg_test_akcipher(const struc +@@ -2068,7 +2481,7 @@ static int alg_test_akcipher(const struc struct crypto_akcipher *tfm; int err = 0; @@ -1623,7 +1651,7 @@ Signed-off-by: Yangbo Lu if (IS_ERR(tfm)) { pr_err("alg: akcipher: Failed to load tfm for %s: %ld\n", driver, PTR_ERR(tfm)); -@@ -2088,112 +2496,23 @@ static int alg_test_null(const struct al +@@ -2088,112 +2501,23 @@ static int alg_test_null(const struct al return 0; } @@ -1741,7 +1769,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2201,12 +2520,7 @@ static const struct alg_test_desc alg_te +@@ -2201,12 +2525,7 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1755,7 +1783,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2214,12 +2528,7 @@ static const struct alg_test_desc alg_te +@@ -2214,12 +2533,7 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1769,7 +1797,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2228,12 +2537,7 @@ static const struct alg_test_desc alg_te +@@ -2228,12 +2542,7 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -1783,7 +1811,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2245,18 +2549,8 @@ static const struct alg_test_desc alg_te +@@ -2245,18 +2554,8 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1804,7 +1832,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2268,12 +2562,7 @@ static const struct alg_test_desc alg_te +@@ -2268,12 +2567,7 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1818,7 +1846,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2282,12 +2571,7 @@ static const struct alg_test_desc alg_te +@@ -2282,12 +2576,7 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -1832,7 +1860,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2296,12 +2580,7 @@ static const struct alg_test_desc alg_te +@@ -2296,12 +2585,7 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -1846,7 +1874,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2309,12 +2588,7 @@ static const struct alg_test_desc alg_te +@@ -2309,12 +2593,7 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1860,7 +1888,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2323,12 +2597,7 @@ static const struct alg_test_desc alg_te +@@ -2323,12 +2602,7 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -1874,7 +1902,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2344,12 +2613,7 @@ static const struct alg_test_desc alg_te +@@ -2344,12 +2618,7 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1888,7 +1916,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2358,12 +2622,7 @@ static const struct alg_test_desc alg_te +@@ -2358,12 +2627,7 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -1902,7 +1930,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2380,12 +2639,7 @@ static const struct alg_test_desc alg_te +@@ -2380,12 +2644,7 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1916,7 +1944,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2393,12 +2647,7 @@ static const struct alg_test_desc alg_te +@@ -2393,12 +2652,7 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -1930,7 +1958,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2407,12 +2656,7 @@ static const struct alg_test_desc alg_te +@@ -2407,12 +2661,7 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -1944,7 +1972,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2429,14 +2673,8 @@ static const struct alg_test_desc alg_te +@@ -2429,14 +2678,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .cipher = { @@ -1961,7 +1989,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2444,14 +2682,8 @@ static const struct alg_test_desc alg_te +@@ -2444,14 +2687,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -1978,7 +2006,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2459,14 +2691,8 @@ static const struct alg_test_desc alg_te +@@ -2459,14 +2696,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -1995,7 +2023,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2474,14 +2700,8 @@ static const struct alg_test_desc alg_te +@@ -2474,14 +2705,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2012,7 +2040,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2489,14 +2709,8 @@ static const struct alg_test_desc alg_te +@@ -2489,14 +2714,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2029,7 +2057,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2504,14 +2718,8 @@ static const struct alg_test_desc alg_te +@@ -2504,14 +2723,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2046,7 +2074,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2519,14 +2727,8 @@ static const struct alg_test_desc alg_te +@@ -2519,14 +2732,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2063,7 +2091,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2535,14 +2737,8 @@ static const struct alg_test_desc alg_te +@@ -2535,14 +2742,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .cipher = { @@ -2080,7 +2108,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2550,14 +2746,8 @@ static const struct alg_test_desc alg_te +@@ -2550,14 +2751,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2097,7 +2125,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2565,30 +2755,25 @@ static const struct alg_test_desc alg_te +@@ -2565,30 +2760,25 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2139,7 +2167,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2596,14 +2781,8 @@ static const struct alg_test_desc alg_te +@@ -2596,14 +2786,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2156,7 +2184,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2611,20 +2790,14 @@ static const struct alg_test_desc alg_te +@@ -2611,20 +2795,14 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .test = alg_test_hash, .suite = { @@ -2179,7 +2207,7 @@ Signed-off-by: Yangbo Lu } }, { .alg = "compress_null", -@@ -2633,94 +2806,30 @@ static const struct alg_test_desc alg_te +@@ -2633,94 +2811,30 @@ static const struct alg_test_desc alg_te .alg = "crc32", .test = alg_test_hash, .suite = { @@ -2279,7 +2307,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2728,14 +2837,8 @@ static const struct alg_test_desc alg_te +@@ -2728,14 +2842,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2296,7 +2324,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2743,14 +2846,8 @@ static const struct alg_test_desc alg_te +@@ -2743,14 +2851,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2313,7 +2341,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2758,14 +2855,8 @@ static const struct alg_test_desc alg_te +@@ -2758,14 +2860,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2330,7 +2358,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2773,14 +2864,8 @@ static const struct alg_test_desc alg_te +@@ -2773,14 +2869,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2347,7 +2375,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2788,29 +2873,18 @@ static const struct alg_test_desc alg_te +@@ -2788,29 +2878,18 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2382,7 +2410,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2818,14 +2892,8 @@ static const struct alg_test_desc alg_te +@@ -2818,14 +2897,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2399,7 +2427,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2833,14 +2901,8 @@ static const struct alg_test_desc alg_te +@@ -2833,14 +2906,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2416,7 +2444,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2848,14 +2910,8 @@ static const struct alg_test_desc alg_te +@@ -2848,14 +2915,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2433,7 +2461,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2864,14 +2920,8 @@ static const struct alg_test_desc alg_te +@@ -2864,14 +2925,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .comp = { @@ -2450,7 +2478,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -2879,10 +2929,7 @@ static const struct alg_test_desc alg_te +@@ -2879,10 +2934,7 @@ static const struct alg_test_desc alg_te .test = alg_test_kpp, .fips_allowed = 1, .suite = { @@ -2462,7 +2490,7 @@ Signed-off-by: Yangbo Lu } }, { .alg = "digest_null", -@@ -2892,30 +2939,21 @@ static const struct alg_test_desc alg_te +@@ -2892,30 +2944,21 @@ static const struct alg_test_desc alg_te .test = alg_test_drbg, .fips_allowed = 1, .suite = { @@ -2496,7 +2524,7 @@ Signed-off-by: Yangbo Lu } }, { /* -@@ -2930,11 +2968,7 @@ static const struct alg_test_desc alg_te +@@ -2930,11 +2973,7 @@ static const struct alg_test_desc alg_te .test = alg_test_drbg, .fips_allowed = 1, .suite = { @@ -2509,7 +2537,7 @@ Signed-off-by: Yangbo Lu } }, { /* covered by drbg_nopr_hmac_sha256 test */ -@@ -2954,10 +2988,7 @@ static const struct alg_test_desc alg_te +@@ -2954,10 +2993,7 @@ static const struct alg_test_desc alg_te .test = alg_test_drbg, .fips_allowed = 1, .suite = { @@ -2521,7 +2549,7 @@ Signed-off-by: Yangbo Lu } }, { /* covered by drbg_nopr_sha256 test */ -@@ -2973,10 +3004,7 @@ static const struct alg_test_desc alg_te +@@ -2973,10 +3009,7 @@ static const struct alg_test_desc alg_te .test = alg_test_drbg, .fips_allowed = 1, .suite = { @@ -2533,7 +2561,7 @@ Signed-off-by: Yangbo Lu } }, { /* covered by drbg_pr_ctr_aes128 test */ -@@ -2996,10 +3024,7 @@ static const struct alg_test_desc alg_te +@@ -2996,10 +3029,7 @@ static const struct alg_test_desc alg_te .test = alg_test_drbg, .fips_allowed = 1, .suite = { @@ -2545,7 +2573,7 @@ Signed-off-by: Yangbo Lu } }, { /* covered by drbg_pr_hmac_sha256 test */ -@@ -3019,10 +3044,7 @@ static const struct alg_test_desc alg_te +@@ -3019,10 +3049,7 @@ static const struct alg_test_desc alg_te .test = alg_test_drbg, .fips_allowed = 1, .suite = { @@ -2557,7 +2585,7 @@ Signed-off-by: Yangbo Lu } }, { /* covered by drbg_pr_sha256 test */ -@@ -3034,23 +3056,13 @@ static const struct alg_test_desc alg_te +@@ -3034,23 +3061,13 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .test = alg_test_null, }, { @@ -2583,7 +2611,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3058,14 +3070,8 @@ static const struct alg_test_desc alg_te +@@ -3058,14 +3075,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2600,7 +2628,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3073,14 +3079,8 @@ static const struct alg_test_desc alg_te +@@ -3073,14 +3084,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2617,7 +2645,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3088,14 +3088,8 @@ static const struct alg_test_desc alg_te +@@ -3088,14 +3093,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2634,7 +2662,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3103,14 +3097,8 @@ static const struct alg_test_desc alg_te +@@ -3103,14 +3102,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2651,7 +2679,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3118,14 +3106,8 @@ static const struct alg_test_desc alg_te +@@ -3118,14 +3111,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2668,7 +2696,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3133,14 +3115,8 @@ static const struct alg_test_desc alg_te +@@ -3133,14 +3120,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2685,7 +2713,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3151,14 +3127,8 @@ static const struct alg_test_desc alg_te +@@ -3151,14 +3132,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2702,7 +2730,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3167,14 +3137,8 @@ static const struct alg_test_desc alg_te +@@ -3167,14 +3142,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .cipher = { @@ -2719,7 +2747,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3197,14 +3161,8 @@ static const struct alg_test_desc alg_te +@@ -3197,14 +3166,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2736,7 +2764,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3212,14 +3170,8 @@ static const struct alg_test_desc alg_te +@@ -3212,14 +3175,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2753,7 +2781,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3227,14 +3179,8 @@ static const struct alg_test_desc alg_te +@@ -3227,14 +3184,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2770,7 +2798,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3242,14 +3188,8 @@ static const struct alg_test_desc alg_te +@@ -3242,14 +3193,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2787,7 +2815,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3257,14 +3197,8 @@ static const struct alg_test_desc alg_te +@@ -3257,14 +3202,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2804,7 +2832,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3272,14 +3206,8 @@ static const struct alg_test_desc alg_te +@@ -3272,14 +3211,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2821,7 +2849,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3287,14 +3215,8 @@ static const struct alg_test_desc alg_te +@@ -3287,14 +3220,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2838,7 +2866,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3302,14 +3224,8 @@ static const struct alg_test_desc alg_te +@@ -3302,14 +3229,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -2855,7 +2883,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3317,10 +3233,7 @@ static const struct alg_test_desc alg_te +@@ -3317,10 +3238,7 @@ static const struct alg_test_desc alg_te .test = alg_test_kpp, .fips_allowed = 1, .suite = { @@ -2867,7 +2895,7 @@ Signed-off-by: Yangbo Lu } }, { .alg = "gcm(aes)", -@@ -3328,14 +3241,8 @@ static const struct alg_test_desc alg_te +@@ -3328,14 +3246,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -2884,7 +2912,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3343,136 +3250,94 @@ static const struct alg_test_desc alg_te +@@ -3343,136 +3255,94 @@ static const struct alg_test_desc alg_te .test = alg_test_hash, .fips_allowed = 1, .suite = { @@ -3035,7 +3063,7 @@ Signed-off-by: Yangbo Lu } }, { .alg = "jitterentropy_rng", -@@ -3484,14 +3349,8 @@ static const struct alg_test_desc alg_te +@@ -3484,14 +3354,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .cipher = { @@ -3052,7 +3080,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3499,14 +3358,8 @@ static const struct alg_test_desc alg_te +@@ -3499,14 +3363,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3069,7 +3097,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3514,14 +3367,8 @@ static const struct alg_test_desc alg_te +@@ -3514,14 +3372,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3086,7 +3114,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3529,14 +3376,8 @@ static const struct alg_test_desc alg_te +@@ -3529,14 +3381,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3103,7 +3131,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3544,14 +3385,8 @@ static const struct alg_test_desc alg_te +@@ -3544,14 +3390,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3120,7 +3148,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3559,14 +3394,8 @@ static const struct alg_test_desc alg_te +@@ -3559,14 +3399,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3137,7 +3165,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3575,14 +3404,8 @@ static const struct alg_test_desc alg_te +@@ -3575,14 +3409,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .comp = { @@ -3154,7 +3182,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3591,14 +3414,8 @@ static const struct alg_test_desc alg_te +@@ -3591,14 +3419,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .comp = { @@ -3171,7 +3199,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3607,42 +3424,27 @@ static const struct alg_test_desc alg_te +@@ -3607,42 +3429,27 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .comp = { @@ -3219,7 +3247,7 @@ Signed-off-by: Yangbo Lu } }, { .alg = "ofb(aes)", -@@ -3650,14 +3452,8 @@ static const struct alg_test_desc alg_te +@@ -3650,14 +3457,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .cipher = { @@ -3236,7 +3264,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3665,24 +3461,15 @@ static const struct alg_test_desc alg_te +@@ -3665,24 +3466,15 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3264,7 +3292,7 @@ Signed-off-by: Yangbo Lu } }, { .alg = "rfc3686(ctr(aes))", -@@ -3690,14 +3477,8 @@ static const struct alg_test_desc alg_te +@@ -3690,14 +3482,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .cipher = { @@ -3281,7 +3309,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3706,14 +3487,8 @@ static const struct alg_test_desc alg_te +@@ -3706,14 +3492,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -3298,7 +3326,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3722,14 +3497,8 @@ static const struct alg_test_desc alg_te +@@ -3722,14 +3502,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .aead = { @@ -3315,7 +3343,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3737,14 +3506,8 @@ static const struct alg_test_desc alg_te +@@ -3737,14 +3511,8 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -3332,7 +3360,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3752,14 +3515,8 @@ static const struct alg_test_desc alg_te +@@ -3752,14 +3520,8 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -3349,7 +3377,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3767,71 +3524,47 @@ static const struct alg_test_desc alg_te +@@ -3767,71 +3529,47 @@ static const struct alg_test_desc alg_te .test = alg_test_aead, .suite = { .aead = { @@ -3429,7 +3457,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -3839,162 +3572,120 @@ static const struct alg_test_desc alg_te +@@ -3839,162 +3577,120 @@ static const struct alg_test_desc alg_te .test = alg_test_hash, .fips_allowed = 1, .suite = { @@ -3617,7 +3645,7 @@ Signed-off-by: Yangbo Lu } }, { .alg = "xts(aes)", -@@ -4002,14 +3693,8 @@ static const struct alg_test_desc alg_te +@@ -4002,14 +3698,8 @@ static const struct alg_test_desc alg_te .fips_allowed = 1, .suite = { .cipher = { @@ -3634,7 +3662,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -4017,14 +3702,8 @@ static const struct alg_test_desc alg_te +@@ -4017,14 +3707,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3651,7 +3679,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -4032,14 +3711,8 @@ static const struct alg_test_desc alg_te +@@ -4032,14 +3716,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3668,7 +3696,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -4047,14 +3720,8 @@ static const struct alg_test_desc alg_te +@@ -4047,14 +3725,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -3685,7 +3713,7 @@ Signed-off-by: Yangbo Lu } } }, { -@@ -4062,14 +3729,8 @@ static const struct alg_test_desc alg_te +@@ -4062,14 +3734,8 @@ static const struct alg_test_desc alg_te .test = alg_test_skcipher, .suite = { .cipher = { @@ -6987,7 +7015,7 @@ Signed-off-by: Yangbo Lu default y select CRYPTO_RNG select HW_RANDOM -@@ -124,13 +149,26 @@ config CRYPTO_DEV_FSL_CAAM_RNG_API +@@ -124,13 +149,31 @@ config CRYPTO_DEV_FSL_CAAM_RNG_API To compile this as a module, choose M here: the module will be called caamrng. @@ -7011,6 +7039,7 @@ Signed-off-by: Yangbo Lu + select CRYPTO_BLKCIPHER + select CRYPTO_AUTHENC + select CRYPTO_AEAD ++ select CRYPTO_HASH + ---help--- + CAAM driver for QorIQ Data Path Acceleration Architecture 2. + It handles DPSECI DPAA2 objects that sit on the Management Complex @@ -7023,9 +7052,13 @@ Signed-off-by: Yangbo Lu + def_tristate (CRYPTO_DEV_FSL_CAAM_CRYPTO_API || \ + CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI || \ + CRYPTO_DEV_FSL_DPAA2_CAAM) ++ ++config CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC ++ def_tristate (CRYPTO_DEV_FSL_CAAM_AHASH_API || \ ++ CRYPTO_DEV_FSL_DPAA2_CAAM) --- a/drivers/crypto/caam/Makefile +++ b/drivers/crypto/caam/Makefile -@@ -5,13 +5,26 @@ ifeq ($(CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG +@@ -5,13 +5,27 @@ ifeq ($(CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG ccflags-y := -DDEBUG endif @@ -7038,6 +7071,7 @@ Signed-off-by: Yangbo Lu +obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI) += caamalg_qi.o +obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC) += caamalg_desc.o obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API) += caamhash.o ++obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC) += caamhash_desc.o obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API) += caamrng.o obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API) += caam_pkc.o @@ -7166,7 +7200,7 @@ Signed-off-by: Yangbo Lu bool rfc3686; bool geniv; }; -@@ -163,302 +96,67 @@ struct caam_aead_alg { +@@ -163,302 +96,70 @@ struct caam_aead_alg { bool registered; }; @@ -7308,6 +7342,7 @@ Signed-off-by: Yangbo Lu struct device *jrdev = ctx->jrdev; - bool keys_fit_inline = false; - u32 *key_jump_cmd, *jump_cmd, *read_move_cmd, *write_move_cmd; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(jrdev->parent); u32 *desc; + int rem_bytes = CAAM_DESC_BYTES_MAX - AEAD_DESC_JOB_IO_LEN - + ctx->adata.keylen_pad; @@ -7394,7 +7429,8 @@ Signed-off-by: Yangbo Lu - DUMP_PREFIX_ADDRESS, 16, 4, desc, - desc_bytes(desc), 1); -#endif -+ cnstr_shdsc_aead_null_encap(desc, &ctx->adata, ctx->authsize); ++ cnstr_shdsc_aead_null_encap(desc, &ctx->adata, ctx->authsize, ++ ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_enc_dma, + desc_bytes(desc), DMA_TO_DEVICE); @@ -7490,18 +7526,20 @@ Signed-off-by: Yangbo Lu - desc_bytes(desc), 1); -#endif + desc = ctx->sh_desc_dec; -+ cnstr_shdsc_aead_null_decap(desc, &ctx->adata, ctx->authsize); ++ cnstr_shdsc_aead_null_decap(desc, &ctx->adata, ctx->authsize, ++ ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_dec_dma, + desc_bytes(desc), DMA_TO_DEVICE); return 0; } -@@ -470,11 +168,11 @@ static int aead_set_sh_desc(struct crypt +@@ -470,11 +171,12 @@ static int aead_set_sh_desc(struct crypt unsigned int ivsize = crypto_aead_ivsize(aead); struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; - bool keys_fit_inline; - u32 geniv, moveiv; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(jrdev->parent); u32 ctx1_iv_off = 0; - u32 *desc; - const bool ctr_mode = ((ctx->class1_alg_type & OP_ALG_AAI_MASK) == @@ -7512,7 +7550,7 @@ Signed-off-by: Yangbo Lu OP_ALG_AAI_CTR_MOD128); const bool is_rfc3686 = alg->caam.rfc3686; -@@ -482,7 +180,7 @@ static int aead_set_sh_desc(struct crypt +@@ -482,7 +184,7 @@ static int aead_set_sh_desc(struct crypt return 0; /* NULL encryption / decryption */ @@ -7521,7 +7559,7 @@ Signed-off-by: Yangbo Lu return aead_null_set_sh_desc(aead); /* -@@ -497,8 +195,14 @@ static int aead_set_sh_desc(struct crypt +@@ -497,8 +199,14 @@ static int aead_set_sh_desc(struct crypt * RFC3686 specific: * CONTEXT1[255:128] = {NONCE, IV, COUNTER} */ @@ -7537,7 +7575,7 @@ Signed-off-by: Yangbo Lu if (alg->caam.geniv) goto skip_enc; -@@ -507,146 +211,64 @@ static int aead_set_sh_desc(struct crypt +@@ -507,146 +215,64 @@ static int aead_set_sh_desc(struct crypt * Job Descriptor and Shared Descriptors * must all fit into the 64-word Descriptor h/w Buffer */ @@ -7557,33 +7595,31 @@ Signed-off-by: Yangbo Lu - /* Class 2 operation */ - append_operation(desc, ctx->class2_alg_type | - OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT); +- +- /* Read and write assoclen bytes */ +- append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); +- append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); + if (desc_inline_query(DESC_AEAD_ENC_LEN + + (is_rfc3686 ? DESC_AEAD_CTR_RFC3686_LEN : 0), + AUTHENC_DESC_JOB_IO_LEN, data_len, &inl_mask, + ARRAY_SIZE(data_len)) < 0) + return -EINVAL; -- /* Read and write assoclen bytes */ -- append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); -- append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); +- /* Skip assoc data */ +- append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); + if (inl_mask & 1) + ctx->adata.key_virt = ctx->key; + else + ctx->adata.key_dma = ctx->key_dma; -- /* Skip assoc data */ -- append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); +- /* read assoc before reading payload */ +- append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG | +- FIFOLDST_VLF); + if (inl_mask & 2) + ctx->cdata.key_virt = ctx->key + ctx->adata.keylen_pad; + else + ctx->cdata.key_dma = ctx->key_dma + ctx->adata.keylen_pad; -- /* read assoc before reading payload */ -- append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_MSG | -- FIFOLDST_VLF); -+ ctx->adata.key_inline = !!(inl_mask & 1); -+ ctx->cdata.key_inline = !!(inl_mask & 2); - - /* Load Counter into CONTEXT1 reg */ - if (is_rfc3686) - append_load_imm_be32(desc, 1, LDST_IMM | LDST_CLASS_1_CCB | @@ -7603,7 +7639,9 @@ Signed-off-by: Yangbo Lu - /* Write ICV */ - append_seq_store(desc, ctx->authsize, LDST_CLASS_2_CCB | - LDST_SRCDST_BYTE_CONTEXT); -- ++ ctx->adata.key_inline = !!(inl_mask & 1); ++ ctx->cdata.key_inline = !!(inl_mask & 2); + - ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc, - desc_bytes(desc), - DMA_TO_DEVICE); @@ -7620,7 +7658,7 @@ Signed-off-by: Yangbo Lu + desc = ctx->sh_desc_enc; + cnstr_shdsc_aead_encap(desc, &ctx->cdata, &ctx->adata, ivsize, + ctx->authsize, is_rfc3686, nonce, ctx1_iv_off, -+ false); ++ false, ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_enc_dma, + desc_bytes(desc), DMA_TO_DEVICE); @@ -7720,13 +7758,13 @@ Signed-off-by: Yangbo Lu + desc = ctx->sh_desc_dec; + cnstr_shdsc_aead_decap(desc, &ctx->cdata, &ctx->adata, ivsize, + ctx->authsize, alg->caam.geniv, is_rfc3686, -+ nonce, ctx1_iv_off, false); ++ nonce, ctx1_iv_off, false, ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_dec_dma, + desc_bytes(desc), DMA_TO_DEVICE); if (!alg->caam.geniv) goto skip_givenc; -@@ -655,107 +277,32 @@ skip_enc: +@@ -655,107 +281,32 @@ skip_enc: * Job Descriptor and Shared Descriptors * must all fit into the 64-word Descriptor h/w Buffer */ @@ -7850,13 +7888,13 @@ Signed-off-by: Yangbo Lu + desc = ctx->sh_desc_enc; + cnstr_shdsc_aead_givencap(desc, &ctx->cdata, &ctx->adata, ivsize, + ctx->authsize, is_rfc3686, nonce, -+ ctx1_iv_off, false); ++ ctx1_iv_off, false, ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_enc_dma, + desc_bytes(desc), DMA_TO_DEVICE); skip_givenc: return 0; -@@ -776,12 +323,12 @@ static int gcm_set_sh_desc(struct crypto +@@ -776,12 +327,12 @@ static int gcm_set_sh_desc(struct crypto { struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; @@ -7873,7 +7911,7 @@ Signed-off-by: Yangbo Lu return 0; /* -@@ -789,175 +336,35 @@ static int gcm_set_sh_desc(struct crypto +@@ -789,175 +340,35 @@ static int gcm_set_sh_desc(struct crypto * Job Descriptor and Shared Descriptor * must fit into the 64-word Descriptor h/w Buffer */ @@ -8069,7 +8107,7 @@ Signed-off-by: Yangbo Lu return 0; } -@@ -976,11 +383,12 @@ static int rfc4106_set_sh_desc(struct cr +@@ -976,11 +387,12 @@ static int rfc4106_set_sh_desc(struct cr { struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; @@ -8085,7 +8123,7 @@ Signed-off-by: Yangbo Lu return 0; /* -@@ -988,148 +396,37 @@ static int rfc4106_set_sh_desc(struct cr +@@ -988,148 +400,37 @@ static int rfc4106_set_sh_desc(struct cr * Job Descriptor and Shared Descriptor * must fit into the 64-word Descriptor h/w Buffer */ @@ -8256,7 +8294,7 @@ Signed-off-by: Yangbo Lu return 0; } -@@ -1149,12 +446,12 @@ static int rfc4543_set_sh_desc(struct cr +@@ -1149,12 +450,12 @@ static int rfc4543_set_sh_desc(struct cr { struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; @@ -8273,7 +8311,7 @@ Signed-off-by: Yangbo Lu return 0; /* -@@ -1162,151 +459,37 @@ static int rfc4543_set_sh_desc(struct cr +@@ -1162,151 +463,37 @@ static int rfc4543_set_sh_desc(struct cr * Job Descriptor and Shared Descriptor * must fit into the 64-word Descriptor h/w Buffer */ @@ -8447,7 +8485,7 @@ Signed-off-by: Yangbo Lu return 0; } -@@ -1322,19 +505,9 @@ static int rfc4543_setauthsize(struct cr +@@ -1322,74 +509,67 @@ static int rfc4543_setauthsize(struct cr return 0; } @@ -8466,8 +8504,10 @@ Signed-off-by: Yangbo Lu - static const u8 mdpadlen[] = { 16, 20, 32, 32, 64, 64 }; struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(jrdev->parent); struct crypto_authenc_keys keys; -@@ -1343,53 +516,32 @@ static int aead_setkey(struct crypto_aea + int ret = 0; + if (crypto_authenc_extractkeys(&keys, key, keylen) != 0) goto badkey; @@ -8490,6 +8530,27 @@ Signed-off-by: Yangbo Lu #endif - ret = gen_split_aead_key(ctx, keys.authkey, keys.authkeylen); ++ /* ++ * If DKP is supported, use it in the shared descriptor to generate ++ * the split key. ++ */ ++ if (ctrlpriv->era >= 6) { ++ ctx->adata.keylen = keys.authkeylen; ++ ctx->adata.keylen_pad = split_key_len(ctx->adata.algtype & ++ OP_ALG_ALGSEL_MASK); ++ ++ if (ctx->adata.keylen_pad + keys.enckeylen > CAAM_MAX_KEY_SIZE) ++ goto badkey; ++ ++ memcpy(ctx->key, keys.authkey, keys.authkeylen); ++ memcpy(ctx->key + ctx->adata.keylen_pad, keys.enckey, ++ keys.enckeylen); ++ dma_sync_single_for_device(jrdev, ctx->key_dma, ++ ctx->adata.keylen_pad + ++ keys.enckeylen, DMA_TO_DEVICE); ++ goto skip_split_key; ++ } ++ + ret = gen_split_key(ctx->jrdev, ctx->key, &ctx->adata, keys.authkey, + keys.authkeylen, CAAM_MAX_KEY_SIZE - + keys.enckeylen); @@ -8515,7 +8576,7 @@ Signed-off-by: Yangbo Lu - ctx->split_key_pad_len + keys.enckeylen, 1); + ctx->adata.keylen_pad + keys.enckeylen, 1); #endif -- + - ctx->enckeylen = keys.enckeylen; - - ret = aead_set_sh_desc(aead); @@ -8525,12 +8586,13 @@ Signed-off-by: Yangbo Lu - } - - return ret; ++skip_split_key: + ctx->cdata.keylen = keys.enckeylen; + return aead_set_sh_desc(aead); badkey: crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN); return -EINVAL; -@@ -1400,7 +552,6 @@ static int gcm_setkey(struct crypto_aead +@@ -1400,7 +580,6 @@ static int gcm_setkey(struct crypto_aead { struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; @@ -8538,7 +8600,7 @@ Signed-off-by: Yangbo Lu #ifdef DEBUG print_hex_dump(KERN_ERR, "key in @"__stringify(__LINE__)": ", -@@ -1408,21 +559,10 @@ static int gcm_setkey(struct crypto_aead +@@ -1408,21 +587,10 @@ static int gcm_setkey(struct crypto_aead #endif memcpy(ctx->key, key, keylen); @@ -8549,21 +8611,21 @@ Signed-off-by: Yangbo Lu - return -ENOMEM; - } - ctx->enckeylen = keylen; -- ++ dma_sync_single_for_device(jrdev, ctx->key_dma, keylen, DMA_TO_DEVICE); ++ ctx->cdata.keylen = keylen; + - ret = gcm_set_sh_desc(aead); - if (ret) { - dma_unmap_single(jrdev, ctx->key_dma, ctx->enckeylen, - DMA_TO_DEVICE); - } -+ dma_sync_single_for_device(jrdev, ctx->key_dma, keylen, DMA_TO_DEVICE); -+ ctx->cdata.keylen = keylen; - +- - return ret; + return gcm_set_sh_desc(aead); } static int rfc4106_setkey(struct crypto_aead *aead, -@@ -1430,7 +570,6 @@ static int rfc4106_setkey(struct crypto_ +@@ -1430,7 +598,6 @@ static int rfc4106_setkey(struct crypto_ { struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; @@ -8571,7 +8633,7 @@ Signed-off-by: Yangbo Lu if (keylen < 4) return -EINVAL; -@@ -1446,22 +585,10 @@ static int rfc4106_setkey(struct crypto_ +@@ -1446,22 +613,10 @@ static int rfc4106_setkey(struct crypto_ * The last four bytes of the key material are used as the salt value * in the nonce. Update the AES key length. */ @@ -8598,7 +8660,7 @@ Signed-off-by: Yangbo Lu } static int rfc4543_setkey(struct crypto_aead *aead, -@@ -1469,7 +596,6 @@ static int rfc4543_setkey(struct crypto_ +@@ -1469,7 +624,6 @@ static int rfc4543_setkey(struct crypto_ { struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; @@ -8606,7 +8668,7 @@ Signed-off-by: Yangbo Lu if (keylen < 4) return -EINVAL; -@@ -1485,43 +611,28 @@ static int rfc4543_setkey(struct crypto_ +@@ -1485,43 +639,28 @@ static int rfc4543_setkey(struct crypto_ * The last four bytes of the key material are used as the salt value * in the nonce. Update the AES key length. */ @@ -8657,7 +8719,7 @@ Signed-off-by: Yangbo Lu #ifdef DEBUG print_hex_dump(KERN_ERR, "key in @"__stringify(__LINE__)": ", DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); -@@ -1544,215 +655,33 @@ static int ablkcipher_setkey(struct cryp +@@ -1544,215 +683,33 @@ static int ablkcipher_setkey(struct cryp keylen -= CTR_RFC3686_NONCE_SIZE; } @@ -8890,7 +8952,7 @@ Signed-off-by: Yangbo Lu } static int xts_ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher, -@@ -1760,8 +689,7 @@ static int xts_ablkcipher_setkey(struct +@@ -1760,8 +717,7 @@ static int xts_ablkcipher_setkey(struct { struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher); struct device *jrdev = ctx->jrdev; @@ -8900,7 +8962,7 @@ Signed-off-by: Yangbo Lu if (keylen != 2 * AES_MIN_KEY_SIZE && keylen != 2 * AES_MAX_KEY_SIZE) { crypto_ablkcipher_set_flags(ablkcipher, -@@ -1771,126 +699,38 @@ static int xts_ablkcipher_setkey(struct +@@ -1771,126 +727,38 @@ static int xts_ablkcipher_setkey(struct } memcpy(ctx->key, key, keylen); @@ -9040,7 +9102,7 @@ Signed-off-by: Yangbo Lu int sec4_sg_bytes; dma_addr_t sec4_sg_dma; struct sec4_sg_entry *sec4_sg; -@@ -1899,12 +739,12 @@ struct aead_edesc { +@@ -1899,12 +767,12 @@ struct aead_edesc { /* * ablkcipher_edesc - s/w-extended ablkcipher descriptor @@ -9056,7 +9118,7 @@ Signed-off-by: Yangbo Lu * @hw_desc: the h/w job descriptor followed by any referenced link tables */ struct ablkcipher_edesc { -@@ -1924,10 +764,11 @@ static void caam_unmap(struct device *de +@@ -1924,10 +792,11 @@ static void caam_unmap(struct device *de int sec4_sg_bytes) { if (dst != src) { @@ -9071,7 +9133,7 @@ Signed-off-by: Yangbo Lu } if (iv_dma) -@@ -2021,8 +862,7 @@ static void ablkcipher_encrypt_done(stru +@@ -2021,8 +890,7 @@ static void ablkcipher_encrypt_done(stru dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); #endif @@ -9081,7 +9143,7 @@ Signed-off-by: Yangbo Lu if (err) caam_jr_strstatus(jrdev, err); -@@ -2031,10 +871,10 @@ static void ablkcipher_encrypt_done(stru +@@ -2031,10 +899,10 @@ static void ablkcipher_encrypt_done(stru print_hex_dump(KERN_ERR, "dstiv @"__stringify(__LINE__)": ", DUMP_PREFIX_ADDRESS, 16, 4, req->info, edesc->src_nents > 1 ? 100 : ivsize, 1); @@ -9095,7 +9157,7 @@ Signed-off-by: Yangbo Lu ablkcipher_unmap(jrdev, edesc, req); -@@ -2062,8 +902,7 @@ static void ablkcipher_decrypt_done(stru +@@ -2062,8 +930,7 @@ static void ablkcipher_decrypt_done(stru dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); #endif @@ -9105,7 +9167,7 @@ Signed-off-by: Yangbo Lu if (err) caam_jr_strstatus(jrdev, err); -@@ -2071,10 +910,10 @@ static void ablkcipher_decrypt_done(stru +@@ -2071,10 +938,10 @@ static void ablkcipher_decrypt_done(stru print_hex_dump(KERN_ERR, "dstiv @"__stringify(__LINE__)": ", DUMP_PREFIX_ADDRESS, 16, 4, req->info, ivsize, 1); @@ -9119,7 +9181,7 @@ Signed-off-by: Yangbo Lu ablkcipher_unmap(jrdev, edesc, req); -@@ -2114,7 +953,7 @@ static void init_aead_job(struct aead_re +@@ -2114,7 +981,7 @@ static void init_aead_job(struct aead_re init_job_desc_shared(desc, ptr, len, HDR_SHARE_DEFER | HDR_REVERSE); if (all_contig) { @@ -9128,7 +9190,7 @@ Signed-off-by: Yangbo Lu in_options = 0; } else { src_dma = edesc->sec4_sg_dma; -@@ -2129,7 +968,7 @@ static void init_aead_job(struct aead_re +@@ -2129,7 +996,7 @@ static void init_aead_job(struct aead_re out_options = in_options; if (unlikely(req->src != req->dst)) { @@ -9137,7 +9199,25 @@ Signed-off-by: Yangbo Lu dst_dma = sg_dma_address(req->dst); } else { dst_dma = edesc->sec4_sg_dma + -@@ -2175,7 +1014,7 @@ static void init_gcm_job(struct aead_req +@@ -2147,9 +1014,6 @@ static void init_aead_job(struct aead_re + append_seq_out_ptr(desc, dst_dma, + req->assoclen + req->cryptlen - authsize, + out_options); +- +- /* REG3 = assoclen */ +- append_math_add_imm_u32(desc, REG3, ZERO, IMM, req->assoclen); + } + + static void init_gcm_job(struct aead_request *req, +@@ -2164,6 +1028,7 @@ static void init_gcm_job(struct aead_req + unsigned int last; + + init_aead_job(req, edesc, all_contig, encrypt); ++ append_math_add_imm_u32(desc, REG3, ZERO, IMM, req->assoclen); + + /* BUG This should not be specific to generic GCM. */ + last = 0; +@@ -2175,7 +1040,7 @@ static void init_gcm_job(struct aead_req FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1 | 12 | last); /* Append Salt */ if (!generic_gcm) @@ -9146,16 +9226,33 @@ Signed-off-by: Yangbo Lu /* Append IV */ append_data(desc, req->iv, ivsize); /* End of blank commands */ -@@ -2190,7 +1029,7 @@ static void init_authenc_job(struct aead +@@ -2190,7 +1055,8 @@ static void init_authenc_job(struct aead struct caam_aead_alg, aead); unsigned int ivsize = crypto_aead_ivsize(aead); struct caam_ctx *ctx = crypto_aead_ctx(aead); - const bool ctr_mode = ((ctx->class1_alg_type & OP_ALG_AAI_MASK) == ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctx->jrdev->parent); + const bool ctr_mode = ((ctx->cdata.algtype & OP_ALG_AAI_MASK) == OP_ALG_AAI_CTR_MOD128); const bool is_rfc3686 = alg->caam.rfc3686; u32 *desc = edesc->hw_desc; -@@ -2236,16 +1075,15 @@ static void init_ablkcipher_job(u32 *sh_ +@@ -2213,6 +1079,15 @@ static void init_authenc_job(struct aead + + init_aead_job(req, edesc, all_contig, encrypt); + ++ /* ++ * {REG3, DPOVRD} = assoclen, depending on whether MATH command supports ++ * having DPOVRD as destination. ++ */ ++ if (ctrlpriv->era < 3) ++ append_math_add_imm_u32(desc, REG3, ZERO, IMM, req->assoclen); ++ else ++ append_math_add_imm_u32(desc, DPOVRD, ZERO, IMM, req->assoclen); ++ + if (ivsize && ((is_rfc3686 && encrypt) || !alg->caam.geniv)) + append_load_as_imm(desc, req->iv, ivsize, + LDST_CLASS_1_CCB | +@@ -2236,16 +1111,15 @@ static void init_ablkcipher_job(u32 *sh_ int len, sec4_sg_index = 0; #ifdef DEBUG @@ -9177,7 +9274,7 @@ Signed-off-by: Yangbo Lu len = desc_len(sh_desc); init_job_desc_shared(desc, ptr, len, HDR_SHARE_DEFER | HDR_REVERSE); -@@ -2261,7 +1099,7 @@ static void init_ablkcipher_job(u32 *sh_ +@@ -2261,7 +1135,7 @@ static void init_ablkcipher_job(u32 *sh_ append_seq_in_ptr(desc, src_dma, req->nbytes + ivsize, in_options); if (likely(req->src == req->dst)) { @@ -9186,7 +9283,7 @@ Signed-off-by: Yangbo Lu dst_dma = sg_dma_address(req->src); } else { dst_dma = edesc->sec4_sg_dma + -@@ -2269,7 +1107,7 @@ static void init_ablkcipher_job(u32 *sh_ +@@ -2269,7 +1143,7 @@ static void init_ablkcipher_job(u32 *sh_ out_options = LDST_SGF; } } else { @@ -9195,7 +9292,7 @@ Signed-off-by: Yangbo Lu dst_dma = sg_dma_address(req->dst); } else { dst_dma = edesc->sec4_sg_dma + -@@ -2296,20 +1134,18 @@ static void init_ablkcipher_giv_job(u32 +@@ -2296,20 +1170,18 @@ static void init_ablkcipher_giv_job(u32 int len, sec4_sg_index = 0; #ifdef DEBUG @@ -9220,7 +9317,7 @@ Signed-off-by: Yangbo Lu src_dma = sg_dma_address(req->src); in_options = 0; } else { -@@ -2340,87 +1176,100 @@ static struct aead_edesc *aead_edesc_all +@@ -2340,87 +1212,100 @@ static struct aead_edesc *aead_edesc_all struct crypto_aead *aead = crypto_aead_reqtfm(req); struct caam_ctx *ctx = crypto_aead_ctx(aead); struct device *jrdev = ctx->jrdev; @@ -9376,7 +9473,7 @@ Signed-off-by: Yangbo Lu edesc->sec4_sg + sec4_sg_index, 0); } -@@ -2573,13 +1422,9 @@ static int aead_decrypt(struct aead_requ +@@ -2573,13 +1458,9 @@ static int aead_decrypt(struct aead_requ u32 *desc; int ret = 0; @@ -9393,7 +9490,7 @@ Signed-off-by: Yangbo Lu /* allocate extended descriptor */ edesc = aead_edesc_alloc(req, AUTHENC_DESC_JOB_IO_LEN, -@@ -2619,51 +1464,80 @@ static struct ablkcipher_edesc *ablkciph +@@ -2619,51 +1500,80 @@ static struct ablkcipher_edesc *ablkciph struct device *jrdev = ctx->jrdev; gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? GFP_KERNEL : GFP_ATOMIC; @@ -9497,7 +9594,7 @@ Signed-off-by: Yangbo Lu return ERR_PTR(-ENOMEM); } -@@ -2673,23 +1547,24 @@ static struct ablkcipher_edesc *ablkciph +@@ -2673,23 +1583,24 @@ static struct ablkcipher_edesc *ablkciph edesc->sec4_sg = (void *)edesc + sizeof(struct ablkcipher_edesc) + desc_bytes; @@ -9529,7 +9626,7 @@ Signed-off-by: Yangbo Lu return ERR_PTR(-ENOMEM); } -@@ -2701,7 +1576,7 @@ static struct ablkcipher_edesc *ablkciph +@@ -2701,7 +1612,7 @@ static struct ablkcipher_edesc *ablkciph sec4_sg_bytes, 1); #endif @@ -9538,7 +9635,7 @@ Signed-off-by: Yangbo Lu return edesc; } -@@ -2792,30 +1667,54 @@ static struct ablkcipher_edesc *ablkciph +@@ -2792,30 +1703,54 @@ static struct ablkcipher_edesc *ablkciph struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req); struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher); struct device *jrdev = ctx->jrdev; @@ -9555,10 +9652,10 @@ Signed-off-by: Yangbo Lu + bool out_contig; int ivsize = crypto_ablkcipher_ivsize(ablkcipher); - int sec4_sg_index; -- -- src_nents = sg_count(req->src, req->nbytes); + int dst_sg_idx, sec4_sg_ents, sec4_sg_bytes; +- src_nents = sg_count(req->src, req->nbytes); +- - if (unlikely(req->dst != req->src)) - dst_nents = sg_count(req->dst, req->nbytes); + src_nents = sg_nents_for_len(req->src, req->nbytes); @@ -9609,7 +9706,7 @@ Signed-off-by: Yangbo Lu } /* -@@ -2825,21 +1724,29 @@ static struct ablkcipher_edesc *ablkciph +@@ -2825,21 +1760,29 @@ static struct ablkcipher_edesc *ablkciph iv_dma = dma_map_single(jrdev, greq->giv, ivsize, DMA_TO_DEVICE); if (dma_mapping_error(jrdev, iv_dma)) { dev_err(jrdev, "unable to map IV\n"); @@ -9645,7 +9742,7 @@ Signed-off-by: Yangbo Lu return ERR_PTR(-ENOMEM); } -@@ -2849,24 +1756,24 @@ static struct ablkcipher_edesc *ablkciph +@@ -2849,24 +1792,24 @@ static struct ablkcipher_edesc *ablkciph edesc->sec4_sg = (void *)edesc + sizeof(struct ablkcipher_edesc) + desc_bytes; @@ -9680,7 +9777,7 @@ Signed-off-by: Yangbo Lu return ERR_PTR(-ENOMEM); } edesc->iv_dma = iv_dma; -@@ -2878,7 +1785,7 @@ static struct ablkcipher_edesc *ablkciph +@@ -2878,7 +1821,7 @@ static struct ablkcipher_edesc *ablkciph sec4_sg_bytes, 1); #endif @@ -9689,7 +9786,7 @@ Signed-off-by: Yangbo Lu return edesc; } -@@ -2889,7 +1796,7 @@ static int ablkcipher_givencrypt(struct +@@ -2889,7 +1832,7 @@ static int ablkcipher_givencrypt(struct struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req); struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher); struct device *jrdev = ctx->jrdev; @@ -9698,7 +9795,7 @@ Signed-off-by: Yangbo Lu u32 *desc; int ret = 0; -@@ -2933,7 +1840,6 @@ struct caam_alg_template { +@@ -2933,7 +1876,6 @@ struct caam_alg_template { } template_u; u32 class1_alg_type; u32 class2_alg_type; @@ -9706,7 +9803,7 @@ Signed-off-by: Yangbo Lu }; static struct caam_alg_template driver_algs[] = { -@@ -3118,7 +2024,6 @@ static struct caam_aead_alg driver_aeads +@@ -3118,7 +2060,6 @@ static struct caam_aead_alg driver_aeads .caam = { .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9714,7 +9811,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3140,7 +2045,6 @@ static struct caam_aead_alg driver_aeads +@@ -3140,7 +2081,6 @@ static struct caam_aead_alg driver_aeads .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9722,7 +9819,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3162,7 +2066,6 @@ static struct caam_aead_alg driver_aeads +@@ -3162,7 +2102,6 @@ static struct caam_aead_alg driver_aeads .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9730,7 +9827,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3184,7 +2087,6 @@ static struct caam_aead_alg driver_aeads +@@ -3184,7 +2123,6 @@ static struct caam_aead_alg driver_aeads .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9738,7 +9835,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3206,7 +2108,6 @@ static struct caam_aead_alg driver_aeads +@@ -3206,7 +2144,6 @@ static struct caam_aead_alg driver_aeads .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9746,7 +9843,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3228,7 +2129,6 @@ static struct caam_aead_alg driver_aeads +@@ -3228,7 +2165,6 @@ static struct caam_aead_alg driver_aeads .caam = { .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9754,7 +9851,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3250,7 +2150,6 @@ static struct caam_aead_alg driver_aeads +@@ -3250,7 +2186,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9762,7 +9859,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3273,7 +2172,6 @@ static struct caam_aead_alg driver_aeads +@@ -3273,7 +2208,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9770,7 +9867,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3296,7 +2194,6 @@ static struct caam_aead_alg driver_aeads +@@ -3296,7 +2230,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9778,7 +9875,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3319,7 +2216,6 @@ static struct caam_aead_alg driver_aeads +@@ -3319,7 +2252,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9786,7 +9883,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3342,7 +2238,6 @@ static struct caam_aead_alg driver_aeads +@@ -3342,7 +2274,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9794,7 +9891,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3365,7 +2260,6 @@ static struct caam_aead_alg driver_aeads +@@ -3365,7 +2296,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9802,7 +9899,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3388,7 +2282,6 @@ static struct caam_aead_alg driver_aeads +@@ -3388,7 +2318,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9810,7 +9907,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3411,7 +2304,6 @@ static struct caam_aead_alg driver_aeads +@@ -3411,7 +2340,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9818,7 +9915,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3434,7 +2326,6 @@ static struct caam_aead_alg driver_aeads +@@ -3434,7 +2362,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9826,7 +9923,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3457,7 +2348,6 @@ static struct caam_aead_alg driver_aeads +@@ -3457,7 +2384,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9834,7 +9931,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3480,7 +2370,6 @@ static struct caam_aead_alg driver_aeads +@@ -3480,7 +2406,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9842,7 +9939,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3503,7 +2392,6 @@ static struct caam_aead_alg driver_aeads +@@ -3503,7 +2428,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9850,7 +9947,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3526,7 +2414,6 @@ static struct caam_aead_alg driver_aeads +@@ -3526,7 +2450,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9858,7 +9955,7 @@ Signed-off-by: Yangbo Lu } }, { -@@ -3549,7 +2436,6 @@ static struct caam_aead_alg driver_aeads +@@ -3549,7 +2472,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9866,7 +9963,7 @@ Signed-off-by: Yangbo Lu .geniv = true, } }, -@@ -3573,7 +2459,6 @@ static struct caam_aead_alg driver_aeads +@@ -3573,7 +2495,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9874,7 +9971,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3597,7 +2482,6 @@ static struct caam_aead_alg driver_aeads +@@ -3597,7 +2518,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9882,7 +9979,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3621,7 +2505,6 @@ static struct caam_aead_alg driver_aeads +@@ -3621,7 +2541,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9890,7 +9987,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3645,7 +2528,6 @@ static struct caam_aead_alg driver_aeads +@@ -3645,7 +2564,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9898,7 +9995,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3669,7 +2551,6 @@ static struct caam_aead_alg driver_aeads +@@ -3669,7 +2587,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9906,7 +10003,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3693,7 +2574,6 @@ static struct caam_aead_alg driver_aeads +@@ -3693,7 +2610,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9914,7 +10011,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3717,7 +2597,6 @@ static struct caam_aead_alg driver_aeads +@@ -3717,7 +2633,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9922,7 +10019,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3741,7 +2620,6 @@ static struct caam_aead_alg driver_aeads +@@ -3741,7 +2656,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9930,7 +10027,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3765,7 +2643,6 @@ static struct caam_aead_alg driver_aeads +@@ -3765,7 +2679,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9938,7 +10035,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3789,7 +2666,6 @@ static struct caam_aead_alg driver_aeads +@@ -3789,7 +2702,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9946,7 +10043,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3812,7 +2688,6 @@ static struct caam_aead_alg driver_aeads +@@ -3812,7 +2724,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9954,7 +10051,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3835,7 +2710,6 @@ static struct caam_aead_alg driver_aeads +@@ -3835,7 +2746,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9962,7 +10059,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3858,7 +2732,6 @@ static struct caam_aead_alg driver_aeads +@@ -3858,7 +2768,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9970,7 +10067,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3881,7 +2754,6 @@ static struct caam_aead_alg driver_aeads +@@ -3881,7 +2790,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9978,7 +10075,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3904,7 +2776,6 @@ static struct caam_aead_alg driver_aeads +@@ -3904,7 +2812,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9986,7 +10083,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3927,7 +2798,6 @@ static struct caam_aead_alg driver_aeads +@@ -3927,7 +2834,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -9994,7 +10091,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3950,7 +2820,6 @@ static struct caam_aead_alg driver_aeads +@@ -3950,7 +2856,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10002,7 +10099,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -3973,7 +2842,6 @@ static struct caam_aead_alg driver_aeads +@@ -3973,7 +2878,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10010,7 +10107,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -3996,7 +2864,6 @@ static struct caam_aead_alg driver_aeads +@@ -3996,7 +2900,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10018,7 +10115,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -4019,7 +2886,6 @@ static struct caam_aead_alg driver_aeads +@@ -4019,7 +2922,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10026,7 +10123,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -4042,7 +2908,6 @@ static struct caam_aead_alg driver_aeads +@@ -4042,7 +2944,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10034,7 +10131,7 @@ Signed-off-by: Yangbo Lu }, }, { -@@ -4065,7 +2930,6 @@ static struct caam_aead_alg driver_aeads +@@ -4065,7 +2966,6 @@ static struct caam_aead_alg driver_aeads .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10042,7 +10139,7 @@ Signed-off-by: Yangbo Lu .geniv = true, }, }, -@@ -4090,7 +2954,6 @@ static struct caam_aead_alg driver_aeads +@@ -4090,7 +2990,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10050,7 +10147,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, }, }, -@@ -4115,7 +2978,6 @@ static struct caam_aead_alg driver_aeads +@@ -4115,7 +3014,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10058,7 +10155,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, .geniv = true, }, -@@ -4141,7 +3003,6 @@ static struct caam_aead_alg driver_aeads +@@ -4141,7 +3039,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10066,7 +10163,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, }, }, -@@ -4166,7 +3027,6 @@ static struct caam_aead_alg driver_aeads +@@ -4166,7 +3063,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10074,7 +10171,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, .geniv = true, }, -@@ -4192,7 +3052,6 @@ static struct caam_aead_alg driver_aeads +@@ -4192,7 +3088,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10082,7 +10179,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, }, }, -@@ -4217,7 +3076,6 @@ static struct caam_aead_alg driver_aeads +@@ -4217,7 +3112,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10090,7 +10187,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, .geniv = true, }, -@@ -4243,7 +3101,6 @@ static struct caam_aead_alg driver_aeads +@@ -4243,7 +3137,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10098,7 +10195,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, }, }, -@@ -4268,7 +3125,6 @@ static struct caam_aead_alg driver_aeads +@@ -4268,7 +3161,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10106,7 +10203,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, .geniv = true, }, -@@ -4294,7 +3150,6 @@ static struct caam_aead_alg driver_aeads +@@ -4294,7 +3186,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10114,7 +10211,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, }, }, -@@ -4319,7 +3174,6 @@ static struct caam_aead_alg driver_aeads +@@ -4319,7 +3210,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10122,7 +10219,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, .geniv = true, }, -@@ -4345,7 +3199,6 @@ static struct caam_aead_alg driver_aeads +@@ -4345,7 +3235,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10130,7 +10227,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, }, }, -@@ -4370,7 +3223,6 @@ static struct caam_aead_alg driver_aeads +@@ -4370,7 +3259,6 @@ static struct caam_aead_alg driver_aeads OP_ALG_AAI_CTR_MOD128, .class2_alg_type = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC_PRECOMP, @@ -10138,7 +10235,7 @@ Signed-off-by: Yangbo Lu .rfc3686 = true, .geniv = true, }, -@@ -4385,16 +3237,34 @@ struct caam_crypto_alg { +@@ -4385,16 +3273,34 @@ struct caam_crypto_alg { static int caam_init_common(struct caam_ctx *ctx, struct caam_alg_entry *caam) { @@ -10176,7 +10273,7 @@ Signed-off-by: Yangbo Lu return 0; } -@@ -4421,25 +3291,9 @@ static int caam_aead_init(struct crypto_ +@@ -4421,25 +3327,9 @@ static int caam_aead_init(struct crypto_ static void caam_exit_common(struct caam_ctx *ctx) { @@ -10205,7 +10302,7 @@ Signed-off-by: Yangbo Lu caam_jr_free(ctx->jrdev); } -@@ -4515,7 +3369,6 @@ static struct caam_crypto_alg *caam_alg_ +@@ -4515,7 +3405,6 @@ static struct caam_crypto_alg *caam_alg_ t_alg->caam.class1_alg_type = template->class1_alg_type; t_alg->caam.class2_alg_type = template->class2_alg_type; @@ -10215,7 +10312,7 @@ Signed-off-by: Yangbo Lu } --- /dev/null +++ b/drivers/crypto/caam/caamalg_desc.c -@@ -0,0 +1,1913 @@ +@@ -0,0 +1,1961 @@ +/* + * Shared descriptors for aead, ablkcipher algorithms + * @@ -10263,16 +10360,16 @@ Signed-off-by: Yangbo Lu + * cnstr_shdsc_aead_null_encap - IPSec ESP encapsulation shared descriptor + * (non-protocol) with no (null) encryption. + * @desc: pointer to buffer used for descriptor construction -+ * @adata: pointer to authentication transform definitions. Note that since a -+ * split key is to be used, the size of the split key itself is -+ * specified. Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, -+ * SHA224, SHA256, SHA384, SHA512} ANDed with OP_ALG_AAI_HMAC_PRECOMP. ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. Valid algorithm values - one of ++ * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed ++ * with OP_ALG_AAI_HMAC_PRECOMP. + * @icvsize: integrity check value (ICV) size (truncated or full) -+ * -+ * Note: Requires an MDHA split key. ++ * @era: SEC Era + */ +void cnstr_shdsc_aead_null_encap(u32 * const desc, struct alginfo *adata, -+ unsigned int icvsize) ++ unsigned int icvsize, int era) +{ + u32 *key_jump_cmd, *read_move_cmd, *write_move_cmd; + @@ -10281,13 +10378,18 @@ Signed-off-by: Yangbo Lu + /* Skip if already shared */ + key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL | + JUMP_COND_SHRD); -+ if (adata->key_inline) -+ append_key_as_imm(desc, adata->key_virt, adata->keylen_pad, -+ adata->keylen, CLASS_2 | KEY_DEST_MDHA_SPLIT | -+ KEY_ENC); -+ else -+ append_key(desc, adata->key_dma, adata->keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ if (era < 6) { ++ if (adata->key_inline) ++ append_key_as_imm(desc, adata->key_virt, ++ adata->keylen_pad, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | ++ KEY_ENC); ++ else ++ append_key(desc, adata->key_dma, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ } else { ++ append_proto_dkp(desc, adata); ++ } + set_jump_tgt_here(desc, key_jump_cmd); + + /* assoclen + cryptlen = seqinlen */ @@ -10339,16 +10441,16 @@ Signed-off-by: Yangbo Lu + * cnstr_shdsc_aead_null_decap - IPSec ESP decapsulation shared descriptor + * (non-protocol) with no (null) decryption. + * @desc: pointer to buffer used for descriptor construction -+ * @adata: pointer to authentication transform definitions. Note that since a -+ * split key is to be used, the size of the split key itself is -+ * specified. Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, -+ * SHA224, SHA256, SHA384, SHA512} ANDed with OP_ALG_AAI_HMAC_PRECOMP. ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. Valid algorithm values - one of ++ * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed ++ * with OP_ALG_AAI_HMAC_PRECOMP. + * @icvsize: integrity check value (ICV) size (truncated or full) -+ * -+ * Note: Requires an MDHA split key. ++ * @era: SEC Era + */ +void cnstr_shdsc_aead_null_decap(u32 * const desc, struct alginfo *adata, -+ unsigned int icvsize) ++ unsigned int icvsize, int era) +{ + u32 *key_jump_cmd, *read_move_cmd, *write_move_cmd, *jump_cmd; + @@ -10357,13 +10459,18 @@ Signed-off-by: Yangbo Lu + /* Skip if already shared */ + key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL | + JUMP_COND_SHRD); -+ if (adata->key_inline) -+ append_key_as_imm(desc, adata->key_virt, adata->keylen_pad, -+ adata->keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); -+ else -+ append_key(desc, adata->key_dma, adata->keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ if (era < 6) { ++ if (adata->key_inline) ++ append_key_as_imm(desc, adata->key_virt, ++ adata->keylen_pad, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | ++ KEY_ENC); ++ else ++ append_key(desc, adata->key_dma, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ } else { ++ append_proto_dkp(desc, adata); ++ } + set_jump_tgt_here(desc, key_jump_cmd); + + /* Class 2 operation */ @@ -10422,7 +10529,7 @@ Signed-off-by: Yangbo Lu +static void init_sh_desc_key_aead(u32 * const desc, + struct alginfo * const cdata, + struct alginfo * const adata, -+ const bool is_rfc3686, u32 *nonce) ++ const bool is_rfc3686, u32 *nonce, int era) +{ + u32 *key_jump_cmd; + unsigned int enckeylen = cdata->keylen; @@ -10442,13 +10549,18 @@ Signed-off-by: Yangbo Lu + if (is_rfc3686) + enckeylen -= CTR_RFC3686_NONCE_SIZE; + -+ if (adata->key_inline) -+ append_key_as_imm(desc, adata->key_virt, adata->keylen_pad, -+ adata->keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); -+ else -+ append_key(desc, adata->key_dma, adata->keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ if (era < 6) { ++ if (adata->key_inline) ++ append_key_as_imm(desc, adata->key_virt, ++ adata->keylen_pad, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | ++ KEY_ENC); ++ else ++ append_key(desc, adata->key_dma, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ } else { ++ append_proto_dkp(desc, adata); ++ } + + if (cdata->key_inline) + append_key_as_imm(desc, cdata->key_virt, enckeylen, @@ -10479,26 +10591,27 @@ Signed-off-by: Yangbo Lu + * @cdata: pointer to block cipher transform definitions + * Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed + * with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128. -+ * @adata: pointer to authentication transform definitions. Note that since a -+ * split key is to be used, the size of the split key itself is -+ * specified. Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, -+ * SHA224, SHA256, SHA384, SHA512} ANDed with OP_ALG_AAI_HMAC_PRECOMP. ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. Valid algorithm values - one of ++ * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed ++ * with OP_ALG_AAI_HMAC_PRECOMP. + * @ivsize: initialization vector size + * @icvsize: integrity check value (ICV) size (truncated or full) + * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template + * @nonce: pointer to rfc3686 nonce + * @ctx1_iv_off: IV offset in CONTEXT1 register + * @is_qi: true when called from caam/qi -+ * -+ * Note: Requires an MDHA split key. ++ * @era: SEC Era + */ +void cnstr_shdsc_aead_encap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int ivsize, + unsigned int icvsize, const bool is_rfc3686, -+ u32 *nonce, const u32 ctx1_iv_off, const bool is_qi) ++ u32 *nonce, const u32 ctx1_iv_off, const bool is_qi, ++ int era) +{ + /* Note: Context registers are saved. */ -+ init_sh_desc_key_aead(desc, cdata, adata, is_rfc3686, nonce); ++ init_sh_desc_key_aead(desc, cdata, adata, is_rfc3686, nonce, era); + + /* Class 2 operation */ + append_operation(desc, adata->algtype | OP_ALG_AS_INITFINAL | @@ -10524,8 +10637,13 @@ Signed-off-by: Yangbo Lu + } + + /* Read and write assoclen bytes */ -+ append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); -+ append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); ++ if (is_qi || era < 3) { ++ append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); ++ append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); ++ } else { ++ append_math_add(desc, VARSEQINLEN, ZERO, DPOVRD, CAAM_CMD_SZ); ++ append_math_add(desc, VARSEQOUTLEN, ZERO, DPOVRD, CAAM_CMD_SZ); ++ } + + /* Skip assoc data */ + append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); @@ -10568,27 +10686,27 @@ Signed-off-by: Yangbo Lu + * @cdata: pointer to block cipher transform definitions + * Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed + * with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128. -+ * @adata: pointer to authentication transform definitions. Note that since a -+ * split key is to be used, the size of the split key itself is -+ * specified. Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, -+ * SHA224, SHA256, SHA384, SHA512} ANDed with OP_ALG_AAI_HMAC_PRECOMP. ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. Valid algorithm values - one of ++ * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed ++ * with OP_ALG_AAI_HMAC_PRECOMP. + * @ivsize: initialization vector size + * @icvsize: integrity check value (ICV) size (truncated or full) + * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template + * @nonce: pointer to rfc3686 nonce + * @ctx1_iv_off: IV offset in CONTEXT1 register + * @is_qi: true when called from caam/qi -+ * -+ * Note: Requires an MDHA split key. ++ * @era: SEC Era + */ +void cnstr_shdsc_aead_decap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int ivsize, + unsigned int icvsize, const bool geniv, + const bool is_rfc3686, u32 *nonce, -+ const u32 ctx1_iv_off, const bool is_qi) ++ const u32 ctx1_iv_off, const bool is_qi, int era) +{ + /* Note: Context registers are saved. */ -+ init_sh_desc_key_aead(desc, cdata, adata, is_rfc3686, nonce); ++ init_sh_desc_key_aead(desc, cdata, adata, is_rfc3686, nonce, era); + + /* Class 2 operation */ + append_operation(desc, adata->algtype | OP_ALG_AS_INITFINAL | @@ -10615,11 +10733,23 @@ Signed-off-by: Yangbo Lu + } + + /* Read and write assoclen bytes */ -+ append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); -+ if (geniv) -+ append_math_add_imm_u32(desc, VARSEQOUTLEN, REG3, IMM, ivsize); -+ else -+ append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); ++ if (is_qi || era < 3) { ++ append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); ++ if (geniv) ++ append_math_add_imm_u32(desc, VARSEQOUTLEN, REG3, IMM, ++ ivsize); ++ else ++ append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, ++ CAAM_CMD_SZ); ++ } else { ++ append_math_add(desc, VARSEQINLEN, ZERO, DPOVRD, CAAM_CMD_SZ); ++ if (geniv) ++ append_math_add_imm_u32(desc, VARSEQOUTLEN, DPOVRD, IMM, ++ ivsize); ++ else ++ append_math_add(desc, VARSEQOUTLEN, ZERO, DPOVRD, ++ CAAM_CMD_SZ); ++ } + + /* Skip assoc data */ + append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); @@ -10674,29 +10804,29 @@ Signed-off-by: Yangbo Lu + * @cdata: pointer to block cipher transform definitions + * Valid algorithm values - one of OP_ALG_ALGSEL_{AES, DES, 3DES} ANDed + * with OP_ALG_AAI_CBC or OP_ALG_AAI_CTR_MOD128. -+ * @adata: pointer to authentication transform definitions. Note that since a -+ * split key is to be used, the size of the split key itself is -+ * specified. Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, -+ * SHA224, SHA256, SHA384, SHA512} ANDed with OP_ALG_AAI_HMAC_PRECOMP. ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. Valid algorithm values - one of ++ * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed ++ * with OP_ALG_AAI_HMAC_PRECOMP. + * @ivsize: initialization vector size + * @icvsize: integrity check value (ICV) size (truncated or full) + * @is_rfc3686: true when ctr(aes) is wrapped by rfc3686 template + * @nonce: pointer to rfc3686 nonce + * @ctx1_iv_off: IV offset in CONTEXT1 register + * @is_qi: true when called from caam/qi -+ * -+ * Note: Requires an MDHA split key. ++ * @era: SEC Era + */ +void cnstr_shdsc_aead_givencap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int ivsize, + unsigned int icvsize, const bool is_rfc3686, + u32 *nonce, const u32 ctx1_iv_off, -+ const bool is_qi) ++ const bool is_qi, int era) +{ + u32 geniv, moveiv; + + /* Note: Context registers are saved. */ -+ init_sh_desc_key_aead(desc, cdata, adata, is_rfc3686, nonce); ++ init_sh_desc_key_aead(desc, cdata, adata, is_rfc3686, nonce, era); + + if (is_qi) { + u32 *wait_load_cmd; @@ -10746,8 +10876,13 @@ Signed-off-by: Yangbo Lu + OP_ALG_ENCRYPT); + + /* Read and write assoclen bytes */ -+ append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); -+ append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); ++ if (is_qi || era < 3) { ++ append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ); ++ append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ); ++ } else { ++ append_math_add(desc, VARSEQINLEN, ZERO, DPOVRD, CAAM_CMD_SZ); ++ append_math_add(desc, VARSEQOUTLEN, ZERO, DPOVRD, CAAM_CMD_SZ); ++ } + + /* Skip assoc data */ + append_seq_fifo_store(desc, 0, FIFOST_TYPE_SKIP | FIFOLDST_VLF); @@ -10806,19 +10941,20 @@ Signed-off-by: Yangbo Lu + * @cdata: pointer to block cipher transform definitions + * Valid algorithm values - one of OP_ALG_ALGSEL_AES ANDed + * with OP_ALG_AAI_CBC -+ * @adata: pointer to authentication transform definitions. Note that since a -+ * split key is to be used, the size of the split key itself is -+ * specified. Valid algorithm values OP_ALG_ALGSEL_SHA1 ANDed with -+ * OP_ALG_AAI_HMAC_PRECOMP. ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. Valid algorithm values OP_ALG_ALGSEL_SHA1 ++ * ANDed with OP_ALG_AAI_HMAC_PRECOMP. + * @assoclen: associated data length + * @ivsize: initialization vector size + * @authsize: authentication data size + * @blocksize: block cipher size ++ * @era: SEC Era + */ +void cnstr_shdsc_tls_encap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int assoclen, + unsigned int ivsize, unsigned int authsize, -+ unsigned int blocksize) ++ unsigned int blocksize, int era) +{ + u32 *key_jump_cmd, *zero_payload_jump_cmd; + u32 genpad, idx_ld_datasz, idx_ld_pad, stidx; @@ -10846,13 +10982,18 @@ Signed-off-by: Yangbo Lu + key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL | + JUMP_COND_SHRD); + -+ if (adata->key_inline) -+ append_key_as_imm(desc, adata->key_virt, adata->keylen_pad, -+ adata->keylen, CLASS_2 | KEY_DEST_MDHA_SPLIT | -+ KEY_ENC); -+ else -+ append_key(desc, adata->key_dma, adata->keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ if (era < 6) { ++ if (adata->key_inline) ++ append_key_as_imm(desc, adata->key_virt, ++ adata->keylen_pad, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | ++ KEY_ENC); ++ else ++ append_key(desc, adata->key_dma, adata->keylen, ++ CLASS_2 | KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ } else { ++ append_proto_dkp(desc, adata); ++ } + + if (cdata->key_inline) + append_key_as_imm(desc, cdata->key_virt, cdata->keylen, @@ -10959,19 +11100,20 @@ Signed-off-by: Yangbo Lu + * @cdata: pointer to block cipher transform definitions + * Valid algorithm values - one of OP_ALG_ALGSEL_AES ANDed + * with OP_ALG_AAI_CBC -+ * @adata: pointer to authentication transform definitions. Note that since a -+ * split key is to be used, the size of the split key itself is -+ * specified. Valid algorithm values OP_ALG_ALGSEL_ SHA1 ANDed with -+ * OP_ALG_AAI_HMAC_PRECOMP. ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. Valid algorithm values OP_ALG_ALGSEL_SHA1 ++ * ANDed with OP_ALG_AAI_HMAC_PRECOMP. + * @assoclen: associated data length + * @ivsize: initialization vector size + * @authsize: authentication data size + * @blocksize: block cipher size ++ * @era: SEC Era + */ +void cnstr_shdsc_tls_decap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int assoclen, + unsigned int ivsize, unsigned int authsize, -+ unsigned int blocksize) ++ unsigned int blocksize, int era) +{ + u32 stidx, jumpback; + u32 *key_jump_cmd, *zero_payload_jump_cmd, *skip_zero_jump_cmd; @@ -10989,8 +11131,11 @@ Signed-off-by: Yangbo Lu + key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL | + JUMP_COND_SHRD); + -+ append_key(desc, adata->key_dma, adata->keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ if (era < 6) ++ append_key(desc, adata->key_dma, adata->keylen, CLASS_2 | ++ KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ else ++ append_proto_dkp(desc, adata); + + append_key(desc, cdata->key_dma, cdata->keylen, CLASS_1 | + KEY_DEST_CLASS_REG); @@ -11836,7 +11981,7 @@ Signed-off-by: Yangbo Lu + + /* Load nonce into CONTEXT1 reg */ + if (is_rfc3686) { -+ u8 *nonce = cdata->key_virt + cdata->keylen; ++ const u8 *nonce = cdata->key_virt + cdata->keylen; + + append_load_as_imm(desc, nonce, CTR_RFC3686_NONCE_SIZE, + LDST_CLASS_IND_CCB | @@ -11901,7 +12046,7 @@ Signed-off-by: Yangbo Lu + + /* Load nonce into CONTEXT1 reg */ + if (is_rfc3686) { -+ u8 *nonce = cdata->key_virt + cdata->keylen; ++ const u8 *nonce = cdata->key_virt + cdata->keylen; + + append_load_as_imm(desc, nonce, CTR_RFC3686_NONCE_SIZE, + LDST_CLASS_IND_CCB | @@ -11970,7 +12115,7 @@ Signed-off-by: Yangbo Lu + + /* Load Nonce into CONTEXT1 reg */ + if (is_rfc3686) { -+ u8 *nonce = cdata->key_virt + cdata->keylen; ++ const u8 *nonce = cdata->key_virt + cdata->keylen; + + append_load_as_imm(desc, nonce, CTR_RFC3686_NONCE_SIZE, + LDST_CLASS_IND_CCB | @@ -12185,38 +12330,38 @@ Signed-off-by: Yangbo Lu + 15 * CAAM_CMD_SZ) + +void cnstr_shdsc_aead_null_encap(u32 * const desc, struct alginfo *adata, -+ unsigned int icvsize); ++ unsigned int icvsize, int era); + +void cnstr_shdsc_aead_null_decap(u32 * const desc, struct alginfo *adata, -+ unsigned int icvsize); ++ unsigned int icvsize, int era); + +void cnstr_shdsc_aead_encap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int ivsize, + unsigned int icvsize, const bool is_rfc3686, + u32 *nonce, const u32 ctx1_iv_off, -+ const bool is_qi); ++ const bool is_qi, int era); + +void cnstr_shdsc_aead_decap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int ivsize, + unsigned int icvsize, const bool geniv, + const bool is_rfc3686, u32 *nonce, -+ const u32 ctx1_iv_off, const bool is_qi); ++ const u32 ctx1_iv_off, const bool is_qi, int era); + +void cnstr_shdsc_aead_givencap(u32 * const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int ivsize, + unsigned int icvsize, const bool is_rfc3686, + u32 *nonce, const u32 ctx1_iv_off, -+ const bool is_qi); ++ const bool is_qi, int era); + +void cnstr_shdsc_tls_encap(u32 *const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int assoclen, + unsigned int ivsize, unsigned int authsize, -+ unsigned int blocksize); ++ unsigned int blocksize, int era); + +void cnstr_shdsc_tls_decap(u32 *const desc, struct alginfo *cdata, + struct alginfo *adata, unsigned int assoclen, + unsigned int ivsize, unsigned int authsize, -+ unsigned int blocksize); ++ unsigned int blocksize, int era); + +void cnstr_shdsc_gcm_encap(u32 * const desc, struct alginfo *cdata, + unsigned int ivsize, unsigned int icvsize, @@ -12261,7 +12406,7 @@ Signed-off-by: Yangbo Lu +#endif /* _CAAMALG_DESC_H_ */ --- /dev/null +++ b/drivers/crypto/caam/caamalg_qi.c -@@ -0,0 +1,2877 @@ +@@ -0,0 +1,2929 @@ +/* + * Freescale FSL CAAM support for crypto API over QI backend. + * Based on caamalg.c @@ -12338,6 +12483,7 @@ Signed-off-by: Yangbo Lu + const bool ctr_mode = ((ctx->cdata.algtype & OP_ALG_AAI_MASK) == + OP_ALG_AAI_CTR_MOD128); + const bool is_rfc3686 = alg->caam.rfc3686; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctx->jrdev->parent); + + if (!ctx->cdata.keylen || !ctx->authsize) + return 0; @@ -12388,7 +12534,7 @@ Signed-off-by: Yangbo Lu + + cnstr_shdsc_aead_encap(ctx->sh_desc_enc, &ctx->cdata, &ctx->adata, + ivsize, ctx->authsize, is_rfc3686, nonce, -+ ctx1_iv_off, true); ++ ctx1_iv_off, true, ctrlpriv->era); + +skip_enc: + /* aead_decrypt shared descriptor */ @@ -12413,7 +12559,8 @@ Signed-off-by: Yangbo Lu + + cnstr_shdsc_aead_decap(ctx->sh_desc_dec, &ctx->cdata, &ctx->adata, + ivsize, ctx->authsize, alg->caam.geniv, -+ is_rfc3686, nonce, ctx1_iv_off, true); ++ is_rfc3686, nonce, ctx1_iv_off, true, ++ ctrlpriv->era); + + if (!alg->caam.geniv) + goto skip_givenc; @@ -12440,7 +12587,7 @@ Signed-off-by: Yangbo Lu + + cnstr_shdsc_aead_givencap(ctx->sh_desc_enc, &ctx->cdata, &ctx->adata, + ivsize, ctx->authsize, is_rfc3686, nonce, -+ ctx1_iv_off, true); ++ ctx1_iv_off, true, ctrlpriv->era); + +skip_givenc: + return 0; @@ -12461,6 +12608,7 @@ Signed-off-by: Yangbo Lu +{ + struct caam_ctx *ctx = crypto_aead_ctx(aead); + struct device *jrdev = ctx->jrdev; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(jrdev->parent); + struct crypto_authenc_keys keys; + int ret = 0; + @@ -12475,6 +12623,27 @@ Signed-off-by: Yangbo Lu + DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); +#endif + ++ /* ++ * If DKP is supported, use it in the shared descriptor to generate ++ * the split key. ++ */ ++ if (ctrlpriv->era >= 6) { ++ ctx->adata.keylen = keys.authkeylen; ++ ctx->adata.keylen_pad = split_key_len(ctx->adata.algtype & ++ OP_ALG_ALGSEL_MASK); ++ ++ if (ctx->adata.keylen_pad + keys.enckeylen > CAAM_MAX_KEY_SIZE) ++ goto badkey; ++ ++ memcpy(ctx->key, keys.authkey, keys.authkeylen); ++ memcpy(ctx->key + ctx->adata.keylen_pad, keys.enckey, ++ keys.enckeylen); ++ dma_sync_single_for_device(jrdev, ctx->key_dma, ++ ctx->adata.keylen_pad + ++ keys.enckeylen, DMA_TO_DEVICE); ++ goto skip_split_key; ++ } ++ + ret = gen_split_key(jrdev, ctx->key, &ctx->adata, keys.authkey, + keys.authkeylen, CAAM_MAX_KEY_SIZE - + keys.enckeylen); @@ -12491,6 +12660,7 @@ Signed-off-by: Yangbo Lu + ctx->adata.keylen_pad + keys.enckeylen, 1); +#endif + ++skip_split_key: + ctx->cdata.keylen = keys.enckeylen; + + ret = aead_set_sh_desc(aead); @@ -12530,6 +12700,7 @@ Signed-off-by: Yangbo Lu + unsigned int assoclen = 13; /* always 13 bytes for TLS */ + unsigned int data_len[2]; + u32 inl_mask; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctx->jrdev->parent); + + if (!ctx->cdata.keylen || !ctx->authsize) + return 0; @@ -12560,17 +12731,20 @@ Signed-off-by: Yangbo Lu + ctx->cdata.key_inline = !!(inl_mask & 2); + + cnstr_shdsc_tls_encap(ctx->sh_desc_enc, &ctx->cdata, &ctx->adata, -+ assoclen, ivsize, ctx->authsize, blocksize); ++ assoclen, ivsize, ctx->authsize, blocksize, ++ ctrlpriv->era); + + /* + * TLS 1.0 decrypt shared descriptor + * Keys do not fit inline, regardless of algorithms used + */ ++ ctx->adata.key_inline = false; + ctx->adata.key_dma = ctx->key_dma; + ctx->cdata.key_dma = ctx->key_dma + ctx->adata.keylen_pad; + + cnstr_shdsc_tls_decap(ctx->sh_desc_dec, &ctx->cdata, &ctx->adata, -+ assoclen, ivsize, ctx->authsize, blocksize); ++ assoclen, ivsize, ctx->authsize, blocksize, ++ ctrlpriv->era); + + return 0; +} @@ -12590,6 +12764,7 @@ Signed-off-by: Yangbo Lu +{ + struct caam_ctx *ctx = crypto_aead_ctx(tls); + struct device *jrdev = ctx->jrdev; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(jrdev->parent); + struct crypto_authenc_keys keys; + int ret = 0; + @@ -12604,6 +12779,27 @@ Signed-off-by: Yangbo Lu + DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); +#endif + ++ /* ++ * If DKP is supported, use it in the shared descriptor to generate ++ * the split key. ++ */ ++ if (ctrlpriv->era >= 6) { ++ ctx->adata.keylen = keys.authkeylen; ++ ctx->adata.keylen_pad = split_key_len(ctx->adata.algtype & ++ OP_ALG_ALGSEL_MASK); ++ ++ if (ctx->adata.keylen_pad + keys.enckeylen > CAAM_MAX_KEY_SIZE) ++ goto badkey; ++ ++ memcpy(ctx->key, keys.authkey, keys.authkeylen); ++ memcpy(ctx->key + ctx->adata.keylen_pad, keys.enckey, ++ keys.enckeylen); ++ dma_sync_single_for_device(jrdev, ctx->key_dma, ++ ctx->adata.keylen_pad + ++ keys.enckeylen, DMA_TO_DEVICE); ++ goto skip_split_key; ++ } ++ + ret = gen_split_key(jrdev, ctx->key, &ctx->adata, keys.authkey, + keys.authkeylen, CAAM_MAX_KEY_SIZE - + keys.enckeylen); @@ -12623,6 +12819,7 @@ Signed-off-by: Yangbo Lu + ctx->adata.keylen_pad + keys.enckeylen, 1); +#endif + ++skip_split_key: + ctx->cdata.keylen = keys.enckeylen; + + ret = tls_set_sh_desc(tls); @@ -15141,7 +15338,7 @@ Signed-off-by: Yangbo Lu +MODULE_AUTHOR("Freescale Semiconductor"); --- /dev/null +++ b/drivers/crypto/caam/caamalg_qi2.c -@@ -0,0 +1,4428 @@ +@@ -0,0 +1,5920 @@ +/* + * Copyright 2015-2016 Freescale Semiconductor Inc. + * Copyright 2017 NXP @@ -15186,6 +15383,7 @@ Signed-off-by: Yangbo Lu +#include "sg_sw_qm2.h" +#include "key_gen.h" +#include "caamalg_desc.h" ++#include "caamhash_desc.h" +#include "../../../drivers/staging/fsl-mc/include/mc.h" +#include "../../../drivers/staging/fsl-mc/include/dpaa2-io.h" +#include "../../../drivers/staging/fsl-mc/include/dpaa2-fd.h" @@ -15232,6 +15430,7 @@ Signed-off-by: Yangbo Lu + * caam_ctx - per-session context + * @flc: Flow Contexts array + * @key: virtual address of the key(s): [authentication key], encryption key ++ * @flc_dma: I/O virtual addresses of the Flow Contexts + * @key_dma: I/O virtual address of the key + * @dev: dpseci device + * @adata: authentication algorithm details @@ -15241,6 +15440,7 @@ Signed-off-by: Yangbo Lu +struct caam_ctx { + struct caam_flc flc[NUM_OP]; + u8 key[CAAM_MAX_KEY_SIZE]; ++ dma_addr_t flc_dma[NUM_OP]; + dma_addr_t key_dma; + struct device *dev; + struct alginfo adata; @@ -15298,6 +15498,8 @@ Signed-off-by: Yangbo Lu + case CRYPTO_ALG_TYPE_AEAD: + return aead_request_ctx(container_of(areq, struct aead_request, + base)); ++ case CRYPTO_ALG_TYPE_AHASH: ++ return ahash_request_ctx(ahash_request_cast(areq)); + default: + return ERR_PTR(-EINVAL); + } @@ -15333,6 +15535,7 @@ Signed-off-by: Yangbo Lu + struct caam_ctx *ctx = crypto_aead_ctx(aead); + unsigned int ivsize = crypto_aead_ivsize(aead); + struct device *dev = ctx->dev; ++ struct dpaa2_caam_priv *priv = dev_get_drvdata(dev); + struct caam_flc *flc; + u32 *desc; + u32 ctx1_iv_off = 0; @@ -15394,19 +15597,17 @@ Signed-off-by: Yangbo Lu + if (alg->caam.geniv) + cnstr_shdsc_aead_givencap(desc, &ctx->cdata, &ctx->adata, + ivsize, ctx->authsize, is_rfc3686, -+ nonce, ctx1_iv_off, true); ++ nonce, ctx1_iv_off, true, ++ priv->sec_attr.era); + else + cnstr_shdsc_aead_encap(desc, &ctx->cdata, &ctx->adata, + ivsize, ctx->authsize, is_rfc3686, nonce, -+ ctx1_iv_off, true); ++ ctx1_iv_off, true, priv->sec_attr.era); + + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[ENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* aead_decrypt shared descriptor */ + if (desc_inline_query(DESC_QI_AEAD_DEC_LEN + @@ -15430,18 +15631,14 @@ Signed-off-by: Yangbo Lu + + flc = &ctx->flc[DECRYPT]; + desc = flc->sh_desc; -+ + cnstr_shdsc_aead_decap(desc, &ctx->cdata, &ctx->adata, + ivsize, ctx->authsize, alg->caam.geniv, -+ is_rfc3686, nonce, ctx1_iv_off, true); -+ ++ is_rfc3686, nonce, ctx1_iv_off, true, ++ priv->sec_attr.era); + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[DECRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + return 0; +} @@ -15477,137 +15674,12 @@ Signed-off-by: Yangbo Lu + complete(&res->completion); +} + -+static int gen_split_key_sh(struct device *dev, u8 *key_out, -+ struct alginfo * const adata, const u8 *key_in, -+ u32 keylen) -+{ -+ struct caam_request *req_ctx; -+ u32 *desc; -+ struct split_key_sh_result result; -+ dma_addr_t dma_addr_in, dma_addr_out; -+ struct caam_flc *flc; -+ struct dpaa2_fl_entry *in_fle, *out_fle; -+ int ret = -ENOMEM; -+ -+ req_ctx = kzalloc(sizeof(*req_ctx), GFP_KERNEL | GFP_DMA); -+ if (!req_ctx) -+ return -ENOMEM; -+ -+ in_fle = &req_ctx->fd_flt[1]; -+ out_fle = &req_ctx->fd_flt[0]; -+ -+ flc = kzalloc(sizeof(*flc), GFP_KERNEL | GFP_DMA); -+ if (!flc) -+ goto err_flc; -+ -+ dma_addr_in = dma_map_single(dev, (void *)key_in, keylen, -+ DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, dma_addr_in)) { -+ dev_err(dev, "unable to map key input memory\n"); -+ goto err_dma_addr_in; -+ } -+ -+ dma_addr_out = dma_map_single(dev, key_out, adata->keylen_pad, -+ DMA_FROM_DEVICE); -+ if (dma_mapping_error(dev, dma_addr_out)) { -+ dev_err(dev, "unable to map key output memory\n"); -+ goto err_dma_addr_out; -+ } -+ -+ desc = flc->sh_desc; -+ -+ init_sh_desc(desc, 0); -+ append_key(desc, dma_addr_in, keylen, CLASS_2 | KEY_DEST_CLASS_REG); -+ -+ /* Sets MDHA up into an HMAC-INIT */ -+ append_operation(desc, (adata->algtype & OP_ALG_ALGSEL_MASK) | -+ OP_ALG_AAI_HMAC | OP_TYPE_CLASS2_ALG | OP_ALG_DECRYPT | -+ OP_ALG_AS_INIT); -+ -+ /* -+ * do a FIFO_LOAD of zero, this will trigger the internal key expansion -+ * into both pads inside MDHA -+ */ -+ append_fifo_load_as_imm(desc, NULL, 0, LDST_CLASS_2_CCB | -+ FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST2); -+ -+ /* -+ * FIFO_STORE with the explicit split-key content store -+ * (0x26 output type) -+ */ -+ append_fifo_store(desc, dma_addr_out, adata->keylen, -+ LDST_CLASS_2_CCB | FIFOST_TYPE_SPLIT_KEK); -+ -+ flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ goto err_flc_dma; -+ } -+ -+ dpaa2_fl_set_final(in_fle, true); -+ dpaa2_fl_set_format(in_fle, dpaa2_fl_single); -+ dpaa2_fl_set_addr(in_fle, dma_addr_in); -+ dpaa2_fl_set_len(in_fle, keylen); -+ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); -+ dpaa2_fl_set_addr(out_fle, dma_addr_out); -+ dpaa2_fl_set_len(out_fle, adata->keylen_pad); -+ -+#ifdef DEBUG -+ print_hex_dump(KERN_ERR, "ctx.key@" __stringify(__LINE__)": ", -+ DUMP_PREFIX_ADDRESS, 16, 4, key_in, keylen, 1); -+ print_hex_dump(KERN_ERR, "desc@" __stringify(__LINE__)": ", -+ DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); -+#endif -+ -+ result.err = 0; -+ init_completion(&result.completion); -+ result.dev = dev; -+ -+ req_ctx->flc = flc; -+ req_ctx->cbk = split_key_sh_done; -+ req_ctx->ctx = &result; -+ -+ ret = dpaa2_caam_enqueue(dev, req_ctx); -+ if (ret == -EINPROGRESS) { -+ /* in progress */ -+ wait_for_completion(&result.completion); -+ ret = result.err; -+#ifdef DEBUG -+ print_hex_dump(KERN_ERR, "ctx.key@" __stringify(__LINE__)": ", -+ DUMP_PREFIX_ADDRESS, 16, 4, key_out, -+ adata->keylen_pad, 1); -+#endif -+ } -+ -+ dma_unmap_single(dev, flc->flc_dma, sizeof(flc->flc) + desc_bytes(desc), -+ DMA_TO_DEVICE); -+err_flc_dma: -+ dma_unmap_single(dev, dma_addr_out, adata->keylen_pad, DMA_FROM_DEVICE); -+err_dma_addr_out: -+ dma_unmap_single(dev, dma_addr_in, keylen, DMA_TO_DEVICE); -+err_dma_addr_in: -+ kfree(flc); -+err_flc: -+ kfree(req_ctx); -+ return ret; -+} -+ -+static int gen_split_aead_key(struct caam_ctx *ctx, const u8 *key_in, -+ u32 authkeylen) -+{ -+ return gen_split_key_sh(ctx->dev, ctx->key, &ctx->adata, key_in, -+ authkeylen); -+} -+ +static int aead_setkey(struct crypto_aead *aead, const u8 *key, + unsigned int keylen) +{ + struct caam_ctx *ctx = crypto_aead_ctx(aead); + struct device *dev = ctx->dev; + struct crypto_authenc_keys keys; -+ int ret; + + if (crypto_authenc_extractkeys(&keys, key, keylen) != 0) + goto badkey; @@ -15620,34 +15692,17 @@ Signed-off-by: Yangbo Lu + DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); +#endif + -+ ctx->adata.keylen = split_key_len(ctx->adata.algtype & -+ OP_ALG_ALGSEL_MASK); -+ ctx->adata.keylen_pad = split_key_pad_len(ctx->adata.algtype & -+ OP_ALG_ALGSEL_MASK); -+ -+#ifdef DEBUG -+ dev_err(dev, "split keylen %d split keylen padded %d\n", -+ ctx->adata.keylen, ctx->adata.keylen_pad); -+ print_hex_dump(KERN_ERR, "ctx.key@" __stringify(__LINE__)": ", -+ DUMP_PREFIX_ADDRESS, 16, 4, keys.authkey, keylen, 1); -+#endif ++ ctx->adata.keylen = keys.authkeylen; ++ ctx->adata.keylen_pad = split_key_len(ctx->adata.algtype & ++ OP_ALG_ALGSEL_MASK); + + if (ctx->adata.keylen_pad + keys.enckeylen > CAAM_MAX_KEY_SIZE) + goto badkey; + -+ ret = gen_split_aead_key(ctx, keys.authkey, keys.authkeylen); -+ if (ret) -+ goto badkey; -+ -+ /* postpend encryption key to auth split key */ ++ memcpy(ctx->key, keys.authkey, keys.authkeylen); + memcpy(ctx->key + ctx->adata.keylen_pad, keys.enckey, keys.enckeylen); -+ -+ ctx->key_dma = dma_map_single(dev, ctx->key, ctx->adata.keylen_pad + -+ keys.enckeylen, DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, ctx->key_dma)) { -+ dev_err(dev, "unable to map key i/o memory\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->key_dma, ctx->adata.keylen_pad + ++ keys.enckeylen, DMA_BIDIRECTIONAL); +#ifdef DEBUG + print_hex_dump(KERN_ERR, "ctx.key@" __stringify(__LINE__)": ", + DUMP_PREFIX_ADDRESS, 16, 4, ctx->key, @@ -15656,12 +15711,7 @@ Signed-off-by: Yangbo Lu + + ctx->cdata.keylen = keys.enckeylen; + -+ ret = aead_set_sh_desc(aead); -+ if (ret) -+ dma_unmap_single(dev, ctx->key_dma, ctx->adata.keylen_pad + -+ keys.enckeylen, DMA_TO_DEVICE); -+ -+ return ret; ++ return aead_set_sh_desc(aead); +badkey: + crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -EINVAL; @@ -16045,6 +16095,7 @@ Signed-off-by: Yangbo Lu + unsigned int ivsize = crypto_aead_ivsize(tls); + unsigned int blocksize = crypto_aead_blocksize(tls); + struct device *dev = ctx->dev; ++ struct dpaa2_caam_priv *priv = dev_get_drvdata(dev); + struct caam_flc *flc; + u32 *desc; + unsigned int assoclen = 13; /* always 13 bytes for TLS */ @@ -16081,39 +16132,30 @@ Signed-off-by: Yangbo Lu + + flc = &ctx->flc[ENCRYPT]; + desc = flc->sh_desc; -+ + cnstr_shdsc_tls_encap(desc, &ctx->cdata, &ctx->adata, -+ assoclen, ivsize, ctx->authsize, blocksize); -+ ++ assoclen, ivsize, ctx->authsize, blocksize, ++ priv->sec_attr.era); + flc->flc[1] = desc_len(desc); -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[ENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* + * TLS 1.0 decrypt shared descriptor + * Keys do not fit inline, regardless of algorithms used + */ ++ ctx->adata.key_inline = false; + ctx->adata.key_dma = ctx->key_dma; + ctx->cdata.key_dma = ctx->key_dma + ctx->adata.keylen_pad; + + flc = &ctx->flc[DECRYPT]; + desc = flc->sh_desc; -+ + cnstr_shdsc_tls_decap(desc, &ctx->cdata, &ctx->adata, assoclen, ivsize, -+ ctx->authsize, blocksize); -+ ++ ctx->authsize, blocksize, priv->sec_attr.era); + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[DECRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + return 0; +} @@ -16124,7 +16166,6 @@ Signed-off-by: Yangbo Lu + struct caam_ctx *ctx = crypto_aead_ctx(tls); + struct device *dev = ctx->dev; + struct crypto_authenc_keys keys; -+ int ret; + + if (crypto_authenc_extractkeys(&keys, key, keylen) != 0) + goto badkey; @@ -16137,35 +16178,17 @@ Signed-off-by: Yangbo Lu + DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); +#endif + -+ ctx->adata.keylen = split_key_len(ctx->adata.algtype & -+ OP_ALG_ALGSEL_MASK); -+ ctx->adata.keylen_pad = split_key_pad_len(ctx->adata.algtype & -+ OP_ALG_ALGSEL_MASK); -+ -+#ifdef DEBUG -+ dev_err(dev, "split keylen %d split keylen padded %d\n", -+ ctx->adata.keylen, ctx->adata.keylen_pad); -+ print_hex_dump(KERN_ERR, "ctx.key@" __stringify(__LINE__)": ", -+ DUMP_PREFIX_ADDRESS, 16, 4, keys.authkey, -+ keys.authkeylen + keys.enckeylen, 1); -+#endif ++ ctx->adata.keylen = keys.authkeylen; ++ ctx->adata.keylen_pad = split_key_len(ctx->adata.algtype & ++ OP_ALG_ALGSEL_MASK); + + if (ctx->adata.keylen_pad + keys.enckeylen > CAAM_MAX_KEY_SIZE) + goto badkey; + -+ ret = gen_split_aead_key(ctx, keys.authkey, keys.authkeylen); -+ if (ret) -+ goto badkey; -+ -+ /* postpend encryption key to auth split key */ ++ memcpy(ctx->key, keys.authkey, keys.authkeylen); + memcpy(ctx->key + ctx->adata.keylen_pad, keys.enckey, keys.enckeylen); -+ -+ ctx->key_dma = dma_map_single(dev, ctx->key, ctx->adata.keylen_pad + -+ keys.enckeylen, DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, ctx->key_dma)) { -+ dev_err(dev, "unable to map key i/o memory\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->key_dma, ctx->adata.keylen_pad + ++ keys.enckeylen, DMA_BIDIRECTIONAL); +#ifdef DEBUG + print_hex_dump(KERN_ERR, "ctx.key@" __stringify(__LINE__)": ", + DUMP_PREFIX_ADDRESS, 16, 4, ctx->key, @@ -16174,12 +16197,7 @@ Signed-off-by: Yangbo Lu + + ctx->cdata.keylen = keys.enckeylen; + -+ ret = tls_set_sh_desc(tls); -+ if (ret) -+ dma_unmap_single(dev, ctx->key_dma, ctx->adata.keylen_pad + -+ keys.enckeylen, DMA_TO_DEVICE); -+ -+ return ret; ++ return tls_set_sh_desc(tls); +badkey: + crypto_aead_set_flags(tls, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -EINVAL; @@ -16224,14 +16242,10 @@ Signed-off-by: Yangbo Lu + flc = &ctx->flc[ENCRYPT]; + desc = flc->sh_desc; + cnstr_shdsc_gcm_encap(desc, &ctx->cdata, ivsize, ctx->authsize, true); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[ENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* + * Job Descriptor and Shared Descriptors @@ -16248,14 +16262,10 @@ Signed-off-by: Yangbo Lu + flc = &ctx->flc[DECRYPT]; + desc = flc->sh_desc; + cnstr_shdsc_gcm_decap(desc, &ctx->cdata, ivsize, ctx->authsize, true); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[DECRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + return 0; +} @@ -16275,7 +16285,6 @@ Signed-off-by: Yangbo Lu +{ + struct caam_ctx *ctx = crypto_aead_ctx(aead); + struct device *dev = ctx->dev; -+ int ret; + +#ifdef DEBUG + print_hex_dump(KERN_ERR, "key in @" __stringify(__LINE__)": ", @@ -16283,19 +16292,11 @@ Signed-off-by: Yangbo Lu +#endif + + memcpy(ctx->key, key, keylen); -+ ctx->key_dma = dma_map_single(dev, ctx->key, keylen, DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, ctx->key_dma)) { -+ dev_err(dev, "unable to map key i/o memory\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->key_dma, keylen, ++ DMA_BIDIRECTIONAL); + ctx->cdata.keylen = keylen; + -+ ret = gcm_set_sh_desc(aead); -+ if (ret) -+ dma_unmap_single(dev, ctx->key_dma, ctx->cdata.keylen, -+ DMA_TO_DEVICE); -+ -+ return ret; ++ return gcm_set_sh_desc(aead); +} + +static int rfc4106_set_sh_desc(struct crypto_aead *aead) @@ -16329,14 +16330,10 @@ Signed-off-by: Yangbo Lu + desc = flc->sh_desc; + cnstr_shdsc_rfc4106_encap(desc, &ctx->cdata, ivsize, ctx->authsize, + true); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[ENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* + * Job Descriptor and Shared Descriptors @@ -16353,14 +16350,10 @@ Signed-off-by: Yangbo Lu + desc = flc->sh_desc; + cnstr_shdsc_rfc4106_decap(desc, &ctx->cdata, ivsize, ctx->authsize, + true); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[DECRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + return 0; +} @@ -16381,7 +16374,6 @@ Signed-off-by: Yangbo Lu +{ + struct caam_ctx *ctx = crypto_aead_ctx(aead); + struct device *dev = ctx->dev; -+ int ret; + + if (keylen < 4) + return -EINVAL; @@ -16397,19 +16389,10 @@ Signed-off-by: Yangbo Lu + * in the nonce. Update the AES key length. + */ + ctx->cdata.keylen = keylen - 4; -+ ctx->key_dma = dma_map_single(dev, ctx->key, ctx->cdata.keylen, -+ DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, ctx->key_dma)) { -+ dev_err(dev, "unable to map key i/o memory\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->key_dma, ctx->cdata.keylen, ++ DMA_BIDIRECTIONAL); + -+ ret = rfc4106_set_sh_desc(aead); -+ if (ret) -+ dma_unmap_single(dev, ctx->key_dma, ctx->cdata.keylen, -+ DMA_TO_DEVICE); -+ -+ return ret; ++ return rfc4106_set_sh_desc(aead); +} + +static int rfc4543_set_sh_desc(struct crypto_aead *aead) @@ -16443,14 +16426,10 @@ Signed-off-by: Yangbo Lu + desc = flc->sh_desc; + cnstr_shdsc_rfc4543_encap(desc, &ctx->cdata, ivsize, ctx->authsize, + true); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[ENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* + * Job Descriptor and Shared Descriptors @@ -16467,14 +16446,10 @@ Signed-off-by: Yangbo Lu + desc = flc->sh_desc; + cnstr_shdsc_rfc4543_decap(desc, &ctx->cdata, ivsize, ctx->authsize, + true); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[DECRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + return 0; +} @@ -16495,7 +16470,6 @@ Signed-off-by: Yangbo Lu +{ + struct caam_ctx *ctx = crypto_aead_ctx(aead); + struct device *dev = ctx->dev; -+ int ret; + + if (keylen < 4) + return -EINVAL; @@ -16511,19 +16485,10 @@ Signed-off-by: Yangbo Lu + * in the nonce. Update the AES key length. + */ + ctx->cdata.keylen = keylen - 4; -+ ctx->key_dma = dma_map_single(dev, ctx->key, ctx->cdata.keylen, -+ DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, ctx->key_dma)) { -+ dev_err(dev, "unable to map key i/o memory\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->key_dma, ctx->cdata.keylen, ++ DMA_BIDIRECTIONAL); + -+ ret = rfc4543_set_sh_desc(aead); -+ if (ret) -+ dma_unmap_single(dev, ctx->key_dma, ctx->cdata.keylen, -+ DMA_TO_DEVICE); -+ -+ return ret; ++ return rfc4543_set_sh_desc(aead); +} + +static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher, @@ -16541,7 +16506,6 @@ Signed-off-by: Yangbo Lu + OP_ALG_AAI_CTR_MOD128); + const bool is_rfc3686 = (ctr_mode && strstr(alg_name, "rfc3686")); + -+ memcpy(ctx->key, key, keylen); +#ifdef DEBUG + print_hex_dump(KERN_ERR, "key in @" __stringify(__LINE__)": ", + DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); @@ -16564,59 +16528,39 @@ Signed-off-by: Yangbo Lu + keylen -= CTR_RFC3686_NONCE_SIZE; + } + -+ ctx->key_dma = dma_map_single(dev, ctx->key, keylen, DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, ctx->key_dma)) { -+ dev_err(dev, "unable to map key i/o memory\n"); -+ return -ENOMEM; -+ } + ctx->cdata.keylen = keylen; -+ ctx->cdata.key_virt = ctx->key; ++ ctx->cdata.key_virt = key; + ctx->cdata.key_inline = true; + + /* ablkcipher_encrypt shared descriptor */ + flc = &ctx->flc[ENCRYPT]; + desc = flc->sh_desc; -+ + cnstr_shdsc_ablkcipher_encap(desc, &ctx->cdata, ivsize, + is_rfc3686, ctx1_iv_off); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[ENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* ablkcipher_decrypt shared descriptor */ + flc = &ctx->flc[DECRYPT]; + desc = flc->sh_desc; -+ + cnstr_shdsc_ablkcipher_decap(desc, &ctx->cdata, ivsize, + is_rfc3686, ctx1_iv_off); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[DECRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* ablkcipher_givencrypt shared descriptor */ + flc = &ctx->flc[GIVENCRYPT]; + desc = flc->sh_desc; -+ + cnstr_shdsc_ablkcipher_givencap(desc, &ctx->cdata, + ivsize, is_rfc3686, ctx1_iv_off); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[GIVENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + return 0; +} @@ -16636,42 +16580,27 @@ Signed-off-by: Yangbo Lu + return -EINVAL; + } + -+ memcpy(ctx->key, key, keylen); -+ ctx->key_dma = dma_map_single(dev, ctx->key, keylen, DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, ctx->key_dma)) { -+ dev_err(dev, "unable to map key i/o memory\n"); -+ return -ENOMEM; -+ } + ctx->cdata.keylen = keylen; -+ ctx->cdata.key_virt = ctx->key; ++ ctx->cdata.key_virt = key; + ctx->cdata.key_inline = true; + + /* xts_ablkcipher_encrypt shared descriptor */ + flc = &ctx->flc[ENCRYPT]; + desc = flc->sh_desc; + cnstr_shdsc_xts_ablkcipher_encap(desc, &ctx->cdata); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[ENCRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + /* xts_ablkcipher_decrypt shared descriptor */ + flc = &ctx->flc[DECRYPT]; + desc = flc->sh_desc; -+ + cnstr_shdsc_xts_ablkcipher_decap(desc, &ctx->cdata); -+ + flc->flc[1] = desc_len(desc); /* SDL */ -+ flc->flc_dma = dma_map_single(dev, flc, sizeof(flc->flc) + -+ desc_bytes(desc), DMA_TO_DEVICE); -+ if (dma_mapping_error(dev, flc->flc_dma)) { -+ dev_err(dev, "unable to map shared descriptor\n"); -+ return -ENOMEM; -+ } ++ dma_sync_single_for_device(dev, ctx->flc_dma[DECRYPT], ++ sizeof(flc->flc) + desc_bytes(desc), ++ DMA_BIDIRECTIONAL); + + return 0; +} @@ -17084,6 +17013,7 @@ Signed-off-by: Yangbo Lu + return PTR_ERR(edesc); + + caam_req->flc = &ctx->flc[ENCRYPT]; ++ caam_req->flc_dma = ctx->flc_dma[ENCRYPT]; + caam_req->op_type = ENCRYPT; + caam_req->cbk = aead_encrypt_done; + caam_req->ctx = &req->base; @@ -17112,6 +17042,7 @@ Signed-off-by: Yangbo Lu + return PTR_ERR(edesc); + + caam_req->flc = &ctx->flc[DECRYPT]; ++ caam_req->flc_dma = ctx->flc_dma[DECRYPT]; + caam_req->op_type = DECRYPT; + caam_req->cbk = aead_decrypt_done; + caam_req->ctx = &req->base; @@ -17197,6 +17128,7 @@ Signed-off-by: Yangbo Lu + return PTR_ERR(edesc); + + caam_req->flc = &ctx->flc[ENCRYPT]; ++ caam_req->flc_dma = ctx->flc_dma[ENCRYPT]; + caam_req->op_type = ENCRYPT; + caam_req->cbk = tls_encrypt_done; + caam_req->ctx = &req->base; @@ -17225,6 +17157,7 @@ Signed-off-by: Yangbo Lu + return PTR_ERR(edesc); + + caam_req->flc = &ctx->flc[DECRYPT]; ++ caam_req->flc_dma = ctx->flc_dma[DECRYPT]; + caam_req->op_type = DECRYPT; + caam_req->cbk = tls_decrypt_done; + caam_req->ctx = &req->base; @@ -17311,6 +17244,7 @@ Signed-off-by: Yangbo Lu + return PTR_ERR(edesc); + + caam_req->flc = &ctx->flc[ENCRYPT]; ++ caam_req->flc_dma = ctx->flc_dma[ENCRYPT]; + caam_req->op_type = ENCRYPT; + caam_req->cbk = ablkcipher_done; + caam_req->ctx = &req->base; @@ -17340,6 +17274,7 @@ Signed-off-by: Yangbo Lu + return PTR_ERR(edesc); + + caam_req->flc = &ctx->flc[GIVENCRYPT]; ++ caam_req->flc_dma = ctx->flc_dma[GIVENCRYPT]; + caam_req->op_type = GIVENCRYPT; + caam_req->cbk = ablkcipher_done; + caam_req->ctx = &req->base; @@ -17368,6 +17303,7 @@ Signed-off-by: Yangbo Lu + return PTR_ERR(edesc); + + caam_req->flc = &ctx->flc[DECRYPT]; ++ caam_req->flc_dma = ctx->flc_dma[DECRYPT]; + caam_req->op_type = DECRYPT; + caam_req->cbk = ablkcipher_done; + caam_req->ctx = &req->base; @@ -17394,6 +17330,8 @@ Signed-off-by: Yangbo Lu + struct caam_crypto_alg *caam_alg = container_of(alg, typeof(*caam_alg), + crypto_alg); + struct caam_ctx *ctx = crypto_tfm_ctx(tfm); ++ dma_addr_t dma_addr; ++ int i; + + /* copy descriptor header template value */ + ctx->cdata.algtype = OP_TYPE_CLASS1_ALG | @@ -17403,6 +17341,19 @@ Signed-off-by: Yangbo Lu + + ctx->dev = caam_alg->caam.dev; + ++ dma_addr = dma_map_single_attrs(ctx->dev, ctx->flc, ++ offsetof(struct caam_ctx, flc_dma), ++ DMA_BIDIRECTIONAL, ++ DMA_ATTR_SKIP_CPU_SYNC); ++ if (dma_mapping_error(ctx->dev, dma_addr)) { ++ dev_err(ctx->dev, "unable to map key, shared descriptors\n"); ++ return -ENOMEM; ++ } ++ ++ for (i = 0; i < NUM_OP; i++) ++ ctx->flc_dma[i] = dma_addr + i * sizeof(ctx->flc[i]); ++ ctx->key_dma = dma_addr + NUM_OP * sizeof(ctx->flc[0]); ++ + return 0; +} + @@ -17423,21 +17374,9 @@ Signed-off-by: Yangbo Lu + +static void caam_exit_common(struct caam_ctx *ctx) +{ -+ int i; -+ -+ for (i = 0; i < NUM_OP; i++) { -+ if (!ctx->flc[i].flc_dma) -+ continue; -+ dma_unmap_single(ctx->dev, ctx->flc[i].flc_dma, -+ sizeof(ctx->flc[i].flc) + -+ desc_bytes(ctx->flc[i].sh_desc), -+ DMA_TO_DEVICE); -+ } -+ -+ if (ctx->key_dma) -+ dma_unmap_single(ctx->dev, ctx->key_dma, -+ ctx->cdata.keylen + ctx->adata.keylen_pad, -+ DMA_TO_DEVICE); ++ dma_unmap_single_attrs(ctx->dev, ctx->flc_dma[0], ++ offsetof(struct caam_ctx, flc_dma), ++ DMA_BIDIRECTIONAL, DMA_ATTR_SKIP_CPU_SYNC); +} + +static void caam_cra_exit(struct crypto_tfm *tfm) @@ -18806,6 +18745,1690 @@ Signed-off-by: Yangbo Lu + alg->exit = caam_cra_exit_aead; +} + ++/* max hash key is max split key size */ ++#define CAAM_MAX_HASH_KEY_SIZE (SHA512_DIGEST_SIZE * 2) ++ ++#define CAAM_MAX_HASH_BLOCK_SIZE SHA512_BLOCK_SIZE ++#define CAAM_MAX_HASH_DIGEST_SIZE SHA512_DIGEST_SIZE ++ ++#define DESC_HASH_MAX_USED_BYTES (DESC_AHASH_FINAL_LEN + \ ++ CAAM_MAX_HASH_KEY_SIZE) ++#define DESC_HASH_MAX_USED_LEN (DESC_HASH_MAX_USED_BYTES / CAAM_CMD_SZ) ++ ++/* caam context sizes for hashes: running digest + 8 */ ++#define HASH_MSG_LEN 8 ++#define MAX_CTX_LEN (HASH_MSG_LEN + SHA512_DIGEST_SIZE) ++ ++enum hash_optype { ++ UPDATE = 0, ++ UPDATE_FIRST, ++ FINALIZE, ++ DIGEST, ++ HASH_NUM_OP ++}; ++ ++/** ++ * caam_hash_ctx - ahash per-session context ++ * @flc: Flow Contexts array ++ * @flc_dma: I/O virtual addresses of the Flow Contexts ++ * @key: virtual address of the authentication key ++ * @dev: dpseci device ++ * @ctx_len: size of Context Register ++ * @adata: hashing algorithm details ++ */ ++struct caam_hash_ctx { ++ struct caam_flc flc[HASH_NUM_OP]; ++ dma_addr_t flc_dma[HASH_NUM_OP]; ++ u8 key[CAAM_MAX_HASH_KEY_SIZE]; ++ struct device *dev; ++ int ctx_len; ++ struct alginfo adata; ++}; ++ ++/* ahash state */ ++struct caam_hash_state { ++ struct caam_request caam_req; ++ dma_addr_t buf_dma; ++ dma_addr_t ctx_dma; ++ u8 buf_0[CAAM_MAX_HASH_BLOCK_SIZE] ____cacheline_aligned; ++ int buflen_0; ++ u8 buf_1[CAAM_MAX_HASH_BLOCK_SIZE] ____cacheline_aligned; ++ int buflen_1; ++ u8 caam_ctx[MAX_CTX_LEN] ____cacheline_aligned; ++ int (*update)(struct ahash_request *req); ++ int (*final)(struct ahash_request *req); ++ int (*finup)(struct ahash_request *req); ++ int current_buf; ++}; ++ ++struct caam_export_state { ++ u8 buf[CAAM_MAX_HASH_BLOCK_SIZE]; ++ u8 caam_ctx[MAX_CTX_LEN]; ++ int buflen; ++ int (*update)(struct ahash_request *req); ++ int (*final)(struct ahash_request *req); ++ int (*finup)(struct ahash_request *req); ++}; ++ ++static inline void switch_buf(struct caam_hash_state *state) ++{ ++ state->current_buf ^= 1; ++} ++ ++static inline u8 *current_buf(struct caam_hash_state *state) ++{ ++ return state->current_buf ? state->buf_1 : state->buf_0; ++} ++ ++static inline u8 *alt_buf(struct caam_hash_state *state) ++{ ++ return state->current_buf ? state->buf_0 : state->buf_1; ++} ++ ++static inline int *current_buflen(struct caam_hash_state *state) ++{ ++ return state->current_buf ? &state->buflen_1 : &state->buflen_0; ++} ++ ++static inline int *alt_buflen(struct caam_hash_state *state) ++{ ++ return state->current_buf ? &state->buflen_0 : &state->buflen_1; ++} ++ ++/* Map current buffer in state (if length > 0) and put it in link table */ ++static inline int buf_map_to_qm_sg(struct device *dev, ++ struct dpaa2_sg_entry *qm_sg, ++ struct caam_hash_state *state) ++{ ++ int buflen = *current_buflen(state); ++ ++ if (!buflen) ++ return 0; ++ ++ state->buf_dma = dma_map_single(dev, current_buf(state), buflen, ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(dev, state->buf_dma)) { ++ dev_err(dev, "unable to map buf\n"); ++ state->buf_dma = 0; ++ return -ENOMEM; ++ } ++ ++ dma_to_qm_sg_one(qm_sg, state->buf_dma, buflen, 0); ++ ++ return 0; ++} ++ ++/* Map state->caam_ctx, and add it to link table */ ++static inline int ctx_map_to_qm_sg(struct device *dev, ++ struct caam_hash_state *state, int ctx_len, ++ struct dpaa2_sg_entry *qm_sg, u32 flag) ++{ ++ state->ctx_dma = dma_map_single(dev, state->caam_ctx, ctx_len, flag); ++ if (dma_mapping_error(dev, state->ctx_dma)) { ++ dev_err(dev, "unable to map ctx\n"); ++ state->ctx_dma = 0; ++ return -ENOMEM; ++ } ++ ++ dma_to_qm_sg_one(qm_sg, state->ctx_dma, ctx_len, 0); ++ ++ return 0; ++} ++ ++static int ahash_set_sh_desc(struct crypto_ahash *ahash) ++{ ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ int digestsize = crypto_ahash_digestsize(ahash); ++ struct dpaa2_caam_priv *priv = dev_get_drvdata(ctx->dev); ++ struct caam_flc *flc; ++ u32 *desc; ++ ++ ctx->adata.key_virt = ctx->key; ++ ctx->adata.key_inline = true; ++ ++ /* ahash_update shared descriptor */ ++ flc = &ctx->flc[UPDATE]; ++ desc = flc->sh_desc; ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_UPDATE, ctx->ctx_len, ++ ctx->ctx_len, true, priv->sec_attr.era); ++ flc->flc[1] = desc_len(desc); /* SDL */ ++ dma_sync_single_for_device(ctx->dev, ctx->flc_dma[UPDATE], ++ desc_bytes(desc), DMA_BIDIRECTIONAL); ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, ++ "ahash update shdesc@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); ++#endif ++ ++ /* ahash_update_first shared descriptor */ ++ flc = &ctx->flc[UPDATE_FIRST]; ++ desc = flc->sh_desc; ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_INIT, ctx->ctx_len, ++ ctx->ctx_len, false, priv->sec_attr.era); ++ flc->flc[1] = desc_len(desc); /* SDL */ ++ dma_sync_single_for_device(ctx->dev, ctx->flc_dma[UPDATE_FIRST], ++ desc_bytes(desc), DMA_BIDIRECTIONAL); ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, ++ "ahash update first shdesc@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); ++#endif ++ ++ /* ahash_final shared descriptor */ ++ flc = &ctx->flc[FINALIZE]; ++ desc = flc->sh_desc; ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_FINALIZE, digestsize, ++ ctx->ctx_len, true, priv->sec_attr.era); ++ flc->flc[1] = desc_len(desc); /* SDL */ ++ dma_sync_single_for_device(ctx->dev, ctx->flc_dma[FINALIZE], ++ desc_bytes(desc), DMA_BIDIRECTIONAL); ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, ++ "ahash final shdesc@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); ++#endif ++ ++ /* ahash_digest shared descriptor */ ++ flc = &ctx->flc[DIGEST]; ++ desc = flc->sh_desc; ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_INITFINAL, digestsize, ++ ctx->ctx_len, false, priv->sec_attr.era); ++ flc->flc[1] = desc_len(desc); /* SDL */ ++ dma_sync_single_for_device(ctx->dev, ctx->flc_dma[DIGEST], ++ desc_bytes(desc), DMA_BIDIRECTIONAL); ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, ++ "ahash digest shdesc@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); ++#endif ++ ++ return 0; ++} ++ ++/* Digest hash size if it is too large */ ++static int hash_digest_key(struct caam_hash_ctx *ctx, const u8 *key_in, ++ u32 *keylen, u8 *key_out, u32 digestsize) ++{ ++ struct caam_request *req_ctx; ++ u32 *desc; ++ struct split_key_sh_result result; ++ dma_addr_t src_dma, dst_dma; ++ struct caam_flc *flc; ++ dma_addr_t flc_dma; ++ int ret = -ENOMEM; ++ struct dpaa2_fl_entry *in_fle, *out_fle; ++ ++ req_ctx = kzalloc(sizeof(*req_ctx), GFP_KERNEL | GFP_DMA); ++ if (!req_ctx) ++ return -ENOMEM; ++ ++ in_fle = &req_ctx->fd_flt[1]; ++ out_fle = &req_ctx->fd_flt[0]; ++ ++ flc = kzalloc(sizeof(*flc), GFP_KERNEL | GFP_DMA); ++ if (!flc) ++ goto err_flc; ++ ++ src_dma = dma_map_single(ctx->dev, (void *)key_in, *keylen, ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, src_dma)) { ++ dev_err(ctx->dev, "unable to map key input memory\n"); ++ goto err_src_dma; ++ } ++ dst_dma = dma_map_single(ctx->dev, (void *)key_out, digestsize, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, dst_dma)) { ++ dev_err(ctx->dev, "unable to map key output memory\n"); ++ goto err_dst_dma; ++ } ++ ++ desc = flc->sh_desc; ++ ++ init_sh_desc(desc, 0); ++ ++ /* descriptor to perform unkeyed hash on key_in */ ++ append_operation(desc, ctx->adata.algtype | OP_ALG_ENCRYPT | ++ OP_ALG_AS_INITFINAL); ++ append_seq_fifo_load(desc, *keylen, FIFOLD_CLASS_CLASS2 | ++ FIFOLD_TYPE_LAST2 | FIFOLD_TYPE_MSG); ++ append_seq_store(desc, digestsize, LDST_CLASS_2_CCB | ++ LDST_SRCDST_BYTE_CONTEXT); ++ ++ flc->flc[1] = desc_len(desc); /* SDL */ ++ flc_dma = dma_map_single(ctx->dev, flc, sizeof(flc->flc) + ++ desc_bytes(desc), DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, flc_dma)) { ++ dev_err(ctx->dev, "unable to map shared descriptor\n"); ++ goto err_flc_dma; ++ } ++ ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(in_fle, src_dma); ++ dpaa2_fl_set_len(in_fle, *keylen); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, dst_dma); ++ dpaa2_fl_set_len(out_fle, digestsize); ++ ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "key_in@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, key_in, *keylen, 1); ++ print_hex_dump(KERN_ERR, "shdesc@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); ++#endif ++ ++ result.err = 0; ++ init_completion(&result.completion); ++ result.dev = ctx->dev; ++ ++ req_ctx->flc = flc; ++ req_ctx->flc_dma = flc_dma; ++ req_ctx->cbk = split_key_sh_done; ++ req_ctx->ctx = &result; ++ ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret == -EINPROGRESS) { ++ /* in progress */ ++ wait_for_completion(&result.completion); ++ ret = result.err; ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, ++ "digested key@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, key_in, digestsize, ++ 1); ++#endif ++ } ++ ++ dma_unmap_single(ctx->dev, flc_dma, sizeof(flc->flc) + desc_bytes(desc), ++ DMA_TO_DEVICE); ++err_flc_dma: ++ dma_unmap_single(ctx->dev, dst_dma, digestsize, DMA_FROM_DEVICE); ++err_dst_dma: ++ dma_unmap_single(ctx->dev, src_dma, *keylen, DMA_TO_DEVICE); ++err_src_dma: ++ kfree(flc); ++err_flc: ++ kfree(req_ctx); ++ ++ *keylen = digestsize; ++ ++ return ret; ++} ++ ++static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key, ++ unsigned int keylen) ++{ ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ unsigned int blocksize = crypto_tfm_alg_blocksize(&ahash->base); ++ unsigned int digestsize = crypto_ahash_digestsize(ahash); ++ int ret; ++ u8 *hashed_key = NULL; ++ ++#ifdef DEBUG ++ dev_err(ctx->dev, "keylen %d blocksize %d\n", keylen, blocksize); ++#endif ++ ++ if (keylen > blocksize) { ++ hashed_key = kmalloc_array(digestsize, sizeof(*hashed_key), ++ GFP_KERNEL | GFP_DMA); ++ if (!hashed_key) ++ return -ENOMEM; ++ ret = hash_digest_key(ctx, key, &keylen, hashed_key, ++ digestsize); ++ if (ret) ++ goto bad_free_key; ++ key = hashed_key; ++ } ++ ++ ctx->adata.keylen = keylen; ++ ctx->adata.keylen_pad = split_key_len(ctx->adata.algtype & ++ OP_ALG_ALGSEL_MASK); ++ if (ctx->adata.keylen_pad > CAAM_MAX_HASH_KEY_SIZE) ++ goto bad_free_key; ++ ++ memcpy(ctx->key, key, keylen); ++ ++ kfree(hashed_key); ++ return ahash_set_sh_desc(ahash); ++bad_free_key: ++ kfree(hashed_key); ++ crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); ++ return -EINVAL; ++} ++ ++static inline void ahash_unmap(struct device *dev, struct ahash_edesc *edesc, ++ struct ahash_request *req, int dst_len) ++{ ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ ++ if (edesc->src_nents) ++ dma_unmap_sg(dev, req->src, edesc->src_nents, DMA_TO_DEVICE); ++ if (edesc->dst_dma) ++ dma_unmap_single(dev, edesc->dst_dma, dst_len, DMA_FROM_DEVICE); ++ ++ if (edesc->qm_sg_bytes) ++ dma_unmap_single(dev, edesc->qm_sg_dma, edesc->qm_sg_bytes, ++ DMA_TO_DEVICE); ++ ++ if (state->buf_dma) { ++ dma_unmap_single(dev, state->buf_dma, *current_buflen(state), ++ DMA_TO_DEVICE); ++ state->buf_dma = 0; ++ } ++} ++ ++static inline void ahash_unmap_ctx(struct device *dev, ++ struct ahash_edesc *edesc, ++ struct ahash_request *req, int dst_len, ++ u32 flag) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ ++ if (state->ctx_dma) { ++ dma_unmap_single(dev, state->ctx_dma, ctx->ctx_len, flag); ++ state->ctx_dma = 0; ++ } ++ ahash_unmap(dev, edesc, req, dst_len); ++} ++ ++static void ahash_done(void *cbk_ctx, u32 status) ++{ ++ struct crypto_async_request *areq = cbk_ctx; ++ struct ahash_request *req = ahash_request_cast(areq); ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct ahash_edesc *edesc = state->caam_req.edesc; ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ int digestsize = crypto_ahash_digestsize(ahash); ++ int ecode = 0; ++ ++#ifdef DEBUG ++ dev_err(ctx->dev, "%s %d: err 0x%x\n", __func__, __LINE__, status); ++#endif ++ ++ if (unlikely(status)) { ++ caam_qi2_strstatus(ctx->dev, status); ++ ecode = -EIO; ++ } ++ ++ ahash_unmap(ctx->dev, edesc, req, digestsize); ++ qi_cache_free(edesc); ++ ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "ctx@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, ++ ctx->ctx_len, 1); ++ if (req->result) ++ print_hex_dump(KERN_ERR, "result@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, req->result, ++ digestsize, 1); ++#endif ++ ++ req->base.complete(&req->base, ecode); ++} ++ ++static void ahash_done_bi(void *cbk_ctx, u32 status) ++{ ++ struct crypto_async_request *areq = cbk_ctx; ++ struct ahash_request *req = ahash_request_cast(areq); ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct ahash_edesc *edesc = state->caam_req.edesc; ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ int ecode = 0; ++#ifdef DEBUG ++ int digestsize = crypto_ahash_digestsize(ahash); ++ ++ dev_err(ctx->dev, "%s %d: err 0x%x\n", __func__, __LINE__, status); ++#endif ++ ++ if (unlikely(status)) { ++ caam_qi2_strstatus(ctx->dev, status); ++ ecode = -EIO; ++ } ++ ++ ahash_unmap_ctx(ctx->dev, edesc, req, ctx->ctx_len, DMA_BIDIRECTIONAL); ++ switch_buf(state); ++ qi_cache_free(edesc); ++ ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "ctx@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, ++ ctx->ctx_len, 1); ++ if (req->result) ++ print_hex_dump(KERN_ERR, "result@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, req->result, ++ digestsize, 1); ++#endif ++ ++ req->base.complete(&req->base, ecode); ++} ++ ++static void ahash_done_ctx_src(void *cbk_ctx, u32 status) ++{ ++ struct crypto_async_request *areq = cbk_ctx; ++ struct ahash_request *req = ahash_request_cast(areq); ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct ahash_edesc *edesc = state->caam_req.edesc; ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ int digestsize = crypto_ahash_digestsize(ahash); ++ int ecode = 0; ++ ++#ifdef DEBUG ++ dev_err(ctx->dev, "%s %d: err 0x%x\n", __func__, __LINE__, status); ++#endif ++ ++ if (unlikely(status)) { ++ caam_qi2_strstatus(ctx->dev, status); ++ ecode = -EIO; ++ } ++ ++ ahash_unmap_ctx(ctx->dev, edesc, req, digestsize, DMA_TO_DEVICE); ++ qi_cache_free(edesc); ++ ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "ctx@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, ++ ctx->ctx_len, 1); ++ if (req->result) ++ print_hex_dump(KERN_ERR, "result@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, req->result, ++ digestsize, 1); ++#endif ++ ++ req->base.complete(&req->base, ecode); ++} ++ ++static void ahash_done_ctx_dst(void *cbk_ctx, u32 status) ++{ ++ struct crypto_async_request *areq = cbk_ctx; ++ struct ahash_request *req = ahash_request_cast(areq); ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct ahash_edesc *edesc = state->caam_req.edesc; ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ int ecode = 0; ++#ifdef DEBUG ++ int digestsize = crypto_ahash_digestsize(ahash); ++ ++ dev_err(ctx->dev, "%s %d: err 0x%x\n", __func__, __LINE__, status); ++#endif ++ ++ if (unlikely(status)) { ++ caam_qi2_strstatus(ctx->dev, status); ++ ecode = -EIO; ++ } ++ ++ ahash_unmap_ctx(ctx->dev, edesc, req, ctx->ctx_len, DMA_FROM_DEVICE); ++ switch_buf(state); ++ qi_cache_free(edesc); ++ ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "ctx@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, ++ ctx->ctx_len, 1); ++ if (req->result) ++ print_hex_dump(KERN_ERR, "result@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, req->result, ++ digestsize, 1); ++#endif ++ ++ req->base.complete(&req->base, ecode); ++} ++ ++static int ahash_update_ctx(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ u8 *buf = current_buf(state); ++ int *buflen = current_buflen(state); ++ u8 *next_buf = alt_buf(state); ++ int *next_buflen = alt_buflen(state), last_buflen; ++ int in_len = *buflen + req->nbytes, to_hash; ++ int src_nents, mapped_nents, qm_sg_bytes, qm_sg_src_index; ++ struct ahash_edesc *edesc; ++ int ret = 0; ++ ++ last_buflen = *next_buflen; ++ *next_buflen = in_len & (crypto_tfm_alg_blocksize(&ahash->base) - 1); ++ to_hash = in_len - *next_buflen; ++ ++ if (to_hash) { ++ struct dpaa2_sg_entry *sg_table; ++ ++ src_nents = sg_nents_for_len(req->src, ++ req->nbytes - (*next_buflen)); ++ if (src_nents < 0) { ++ dev_err(ctx->dev, "Invalid number of src SG.\n"); ++ return src_nents; ++ } ++ ++ if (src_nents) { ++ mapped_nents = dma_map_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ if (!mapped_nents) { ++ dev_err(ctx->dev, "unable to DMA map source\n"); ++ return -ENOMEM; ++ } ++ } else { ++ mapped_nents = 0; ++ } ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) { ++ dma_unmap_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ return -ENOMEM; ++ } ++ ++ edesc->src_nents = src_nents; ++ qm_sg_src_index = 1 + (*buflen ? 1 : 0); ++ qm_sg_bytes = (qm_sg_src_index + mapped_nents) * ++ sizeof(*sg_table); ++ sg_table = &edesc->sgt[0]; ++ ++ ret = ctx_map_to_qm_sg(ctx->dev, state, ctx->ctx_len, sg_table, ++ DMA_BIDIRECTIONAL); ++ if (ret) ++ goto unmap_ctx; ++ ++ ret = buf_map_to_qm_sg(ctx->dev, sg_table + 1, state); ++ if (ret) ++ goto unmap_ctx; ++ ++ if (mapped_nents) { ++ sg_to_qm_sg_last(req->src, mapped_nents, ++ sg_table + qm_sg_src_index, 0); ++ if (*next_buflen) ++ scatterwalk_map_and_copy(next_buf, req->src, ++ to_hash - *buflen, ++ *next_buflen, 0); ++ } else { ++ dpaa2_sg_set_final(sg_table + qm_sg_src_index - 1, ++ true); ++ } ++ ++ edesc->qm_sg_dma = dma_map_single(ctx->dev, sg_table, ++ qm_sg_bytes, DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->qm_sg_dma)) { ++ dev_err(ctx->dev, "unable to map S/G table\n"); ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ edesc->qm_sg_bytes = qm_sg_bytes; ++ ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_sg); ++ dpaa2_fl_set_addr(in_fle, edesc->qm_sg_dma); ++ dpaa2_fl_set_len(in_fle, ctx->ctx_len + to_hash); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, state->ctx_dma); ++ dpaa2_fl_set_len(out_fle, ctx->ctx_len); ++ ++ req_ctx->flc = &ctx->flc[UPDATE]; ++ req_ctx->flc_dma = ctx->flc_dma[UPDATE]; ++ req_ctx->cbk = ahash_done_bi; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret != -EINPROGRESS && ++ !(ret == -EBUSY && ++ req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ goto unmap_ctx; ++ } else if (*next_buflen) { ++ scatterwalk_map_and_copy(buf + *buflen, req->src, 0, ++ req->nbytes, 0); ++ *buflen = *next_buflen; ++ *next_buflen = last_buflen; ++ } ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "buf@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, buf, *buflen, 1); ++ print_hex_dump(KERN_ERR, "next buf@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, next_buf, ++ *next_buflen, 1); ++#endif ++ ++ return ret; ++unmap_ctx: ++ ahash_unmap_ctx(ctx->dev, edesc, req, ctx->ctx_len, DMA_BIDIRECTIONAL); ++ qi_cache_free(edesc); ++ return ret; ++} ++ ++static int ahash_final_ctx(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ int buflen = *current_buflen(state); ++ int qm_sg_bytes, qm_sg_src_index; ++ int digestsize = crypto_ahash_digestsize(ahash); ++ struct ahash_edesc *edesc; ++ struct dpaa2_sg_entry *sg_table; ++ int ret; ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) ++ return -ENOMEM; ++ ++ qm_sg_src_index = 1 + (buflen ? 1 : 0); ++ qm_sg_bytes = qm_sg_src_index * sizeof(*sg_table); ++ sg_table = &edesc->sgt[0]; ++ ++ ret = ctx_map_to_qm_sg(ctx->dev, state, ctx->ctx_len, sg_table, ++ DMA_TO_DEVICE); ++ if (ret) ++ goto unmap_ctx; ++ ++ ret = buf_map_to_qm_sg(ctx->dev, sg_table + 1, state); ++ if (ret) ++ goto unmap_ctx; ++ ++ dpaa2_sg_set_final(sg_table + qm_sg_src_index - 1, true); ++ ++ edesc->qm_sg_dma = dma_map_single(ctx->dev, sg_table, qm_sg_bytes, ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->qm_sg_dma)) { ++ dev_err(ctx->dev, "unable to map S/G table\n"); ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ edesc->qm_sg_bytes = qm_sg_bytes; ++ ++ edesc->dst_dma = dma_map_single(ctx->dev, req->result, digestsize, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->dst_dma)) { ++ dev_err(ctx->dev, "unable to map dst\n"); ++ edesc->dst_dma = 0; ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_sg); ++ dpaa2_fl_set_addr(in_fle, edesc->qm_sg_dma); ++ dpaa2_fl_set_len(in_fle, ctx->ctx_len + buflen); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, edesc->dst_dma); ++ dpaa2_fl_set_len(out_fle, digestsize); ++ ++ req_ctx->flc = &ctx->flc[FINALIZE]; ++ req_ctx->flc_dma = ctx->flc_dma[FINALIZE]; ++ req_ctx->cbk = ahash_done_ctx_src; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret == -EINPROGRESS || ++ (ret == -EBUSY && req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ return ret; ++ ++unmap_ctx: ++ ahash_unmap_ctx(ctx->dev, edesc, req, digestsize, DMA_FROM_DEVICE); ++ qi_cache_free(edesc); ++ return ret; ++} ++ ++static int ahash_finup_ctx(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ int buflen = *current_buflen(state); ++ int qm_sg_bytes, qm_sg_src_index; ++ int src_nents, mapped_nents; ++ int digestsize = crypto_ahash_digestsize(ahash); ++ struct ahash_edesc *edesc; ++ struct dpaa2_sg_entry *sg_table; ++ int ret; ++ ++ src_nents = sg_nents_for_len(req->src, req->nbytes); ++ if (src_nents < 0) { ++ dev_err(ctx->dev, "Invalid number of src SG.\n"); ++ return src_nents; ++ } ++ ++ if (src_nents) { ++ mapped_nents = dma_map_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ if (!mapped_nents) { ++ dev_err(ctx->dev, "unable to DMA map source\n"); ++ return -ENOMEM; ++ } ++ } else { ++ mapped_nents = 0; ++ } ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) { ++ dma_unmap_sg(ctx->dev, req->src, src_nents, DMA_TO_DEVICE); ++ return -ENOMEM; ++ } ++ ++ edesc->src_nents = src_nents; ++ qm_sg_src_index = 1 + (buflen ? 1 : 0); ++ qm_sg_bytes = (qm_sg_src_index + mapped_nents) * sizeof(*sg_table); ++ sg_table = &edesc->sgt[0]; ++ ++ ret = ctx_map_to_qm_sg(ctx->dev, state, ctx->ctx_len, sg_table, ++ DMA_TO_DEVICE); ++ if (ret) ++ goto unmap_ctx; ++ ++ ret = buf_map_to_qm_sg(ctx->dev, sg_table + 1, state); ++ if (ret) ++ goto unmap_ctx; ++ ++ sg_to_qm_sg_last(req->src, mapped_nents, sg_table + qm_sg_src_index, 0); ++ ++ edesc->qm_sg_dma = dma_map_single(ctx->dev, sg_table, qm_sg_bytes, ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->qm_sg_dma)) { ++ dev_err(ctx->dev, "unable to map S/G table\n"); ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ edesc->qm_sg_bytes = qm_sg_bytes; ++ ++ edesc->dst_dma = dma_map_single(ctx->dev, req->result, digestsize, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->dst_dma)) { ++ dev_err(ctx->dev, "unable to map dst\n"); ++ edesc->dst_dma = 0; ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_sg); ++ dpaa2_fl_set_addr(in_fle, edesc->qm_sg_dma); ++ dpaa2_fl_set_len(in_fle, ctx->ctx_len + buflen + req->nbytes); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, edesc->dst_dma); ++ dpaa2_fl_set_len(out_fle, digestsize); ++ ++ req_ctx->flc = &ctx->flc[FINALIZE]; ++ req_ctx->flc_dma = ctx->flc_dma[FINALIZE]; ++ req_ctx->cbk = ahash_done_ctx_src; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret == -EINPROGRESS || ++ (ret == -EBUSY && req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ return ret; ++ ++unmap_ctx: ++ ahash_unmap_ctx(ctx->dev, edesc, req, digestsize, DMA_FROM_DEVICE); ++ qi_cache_free(edesc); ++ return ret; ++} ++ ++static int ahash_digest(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ int digestsize = crypto_ahash_digestsize(ahash); ++ int src_nents, mapped_nents; ++ struct ahash_edesc *edesc; ++ int ret = -ENOMEM; ++ ++ state->buf_dma = 0; ++ ++ src_nents = sg_nents_for_len(req->src, req->nbytes); ++ if (src_nents < 0) { ++ dev_err(ctx->dev, "Invalid number of src SG.\n"); ++ return src_nents; ++ } ++ ++ if (src_nents) { ++ mapped_nents = dma_map_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ if (!mapped_nents) { ++ dev_err(ctx->dev, "unable to map source for DMA\n"); ++ return ret; ++ } ++ } else { ++ mapped_nents = 0; ++ } ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) { ++ dma_unmap_sg(ctx->dev, req->src, src_nents, DMA_TO_DEVICE); ++ return ret; ++ } ++ ++ edesc->src_nents = src_nents; ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ ++ if (mapped_nents > 1) { ++ int qm_sg_bytes; ++ struct dpaa2_sg_entry *sg_table = &edesc->sgt[0]; ++ ++ qm_sg_bytes = mapped_nents * sizeof(*sg_table); ++ sg_to_qm_sg_last(req->src, mapped_nents, sg_table, 0); ++ edesc->qm_sg_dma = dma_map_single(ctx->dev, sg_table, ++ qm_sg_bytes, DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->qm_sg_dma)) { ++ dev_err(ctx->dev, "unable to map S/G table\n"); ++ goto unmap; ++ } ++ edesc->qm_sg_bytes = qm_sg_bytes; ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_sg); ++ dpaa2_fl_set_addr(in_fle, edesc->qm_sg_dma); ++ } else { ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(in_fle, sg_dma_address(req->src)); ++ } ++ ++ edesc->dst_dma = dma_map_single(ctx->dev, req->result, digestsize, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->dst_dma)) { ++ dev_err(ctx->dev, "unable to map dst\n"); ++ edesc->dst_dma = 0; ++ goto unmap; ++ } ++ ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_len(in_fle, req->nbytes); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, edesc->dst_dma); ++ dpaa2_fl_set_len(out_fle, digestsize); ++ ++ req_ctx->flc = &ctx->flc[DIGEST]; ++ req_ctx->flc_dma = ctx->flc_dma[DIGEST]; ++ req_ctx->cbk = ahash_done; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret == -EINPROGRESS || ++ (ret == -EBUSY && req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ return ret; ++ ++unmap: ++ ahash_unmap(ctx->dev, edesc, req, digestsize); ++ qi_cache_free(edesc); ++ return ret; ++} ++ ++static int ahash_final_no_ctx(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ u8 *buf = current_buf(state); ++ int buflen = *current_buflen(state); ++ int digestsize = crypto_ahash_digestsize(ahash); ++ struct ahash_edesc *edesc; ++ int ret = -ENOMEM; ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) ++ return ret; ++ ++ state->buf_dma = dma_map_single(ctx->dev, buf, buflen, DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, state->buf_dma)) { ++ dev_err(ctx->dev, "unable to map src\n"); ++ goto unmap; ++ } ++ ++ edesc->dst_dma = dma_map_single(ctx->dev, req->result, digestsize, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->dst_dma)) { ++ dev_err(ctx->dev, "unable to map dst\n"); ++ edesc->dst_dma = 0; ++ goto unmap; ++ } ++ ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(in_fle, state->buf_dma); ++ dpaa2_fl_set_len(in_fle, buflen); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, edesc->dst_dma); ++ dpaa2_fl_set_len(out_fle, digestsize); ++ ++ req_ctx->flc = &ctx->flc[DIGEST]; ++ req_ctx->flc_dma = ctx->flc_dma[DIGEST]; ++ req_ctx->cbk = ahash_done; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret == -EINPROGRESS || ++ (ret == -EBUSY && req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ return ret; ++ ++unmap: ++ ahash_unmap(ctx->dev, edesc, req, digestsize); ++ qi_cache_free(edesc); ++ return ret; ++} ++ ++static int ahash_update_no_ctx(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ u8 *buf = current_buf(state); ++ int *buflen = current_buflen(state); ++ u8 *next_buf = alt_buf(state); ++ int *next_buflen = alt_buflen(state); ++ int in_len = *buflen + req->nbytes, to_hash; ++ int qm_sg_bytes, src_nents, mapped_nents; ++ struct ahash_edesc *edesc; ++ int ret = 0; ++ ++ *next_buflen = in_len & (crypto_tfm_alg_blocksize(&ahash->base) - 1); ++ to_hash = in_len - *next_buflen; ++ ++ if (to_hash) { ++ struct dpaa2_sg_entry *sg_table; ++ ++ src_nents = sg_nents_for_len(req->src, ++ req->nbytes - *next_buflen); ++ if (src_nents < 0) { ++ dev_err(ctx->dev, "Invalid number of src SG.\n"); ++ return src_nents; ++ } ++ ++ if (src_nents) { ++ mapped_nents = dma_map_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ if (!mapped_nents) { ++ dev_err(ctx->dev, "unable to DMA map source\n"); ++ return -ENOMEM; ++ } ++ } else { ++ mapped_nents = 0; ++ } ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) { ++ dma_unmap_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ return -ENOMEM; ++ } ++ ++ edesc->src_nents = src_nents; ++ qm_sg_bytes = (1 + mapped_nents) * sizeof(*sg_table); ++ sg_table = &edesc->sgt[0]; ++ ++ ret = buf_map_to_qm_sg(ctx->dev, sg_table, state); ++ if (ret) ++ goto unmap_ctx; ++ ++ sg_to_qm_sg_last(req->src, mapped_nents, sg_table + 1, 0); ++ ++ if (*next_buflen) ++ scatterwalk_map_and_copy(next_buf, req->src, ++ to_hash - *buflen, ++ *next_buflen, 0); ++ ++ edesc->qm_sg_dma = dma_map_single(ctx->dev, sg_table, ++ qm_sg_bytes, DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->qm_sg_dma)) { ++ dev_err(ctx->dev, "unable to map S/G table\n"); ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ edesc->qm_sg_bytes = qm_sg_bytes; ++ ++ state->ctx_dma = dma_map_single(ctx->dev, state->caam_ctx, ++ ctx->ctx_len, DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, state->ctx_dma)) { ++ dev_err(ctx->dev, "unable to map ctx\n"); ++ state->ctx_dma = 0; ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_sg); ++ dpaa2_fl_set_addr(in_fle, edesc->qm_sg_dma); ++ dpaa2_fl_set_len(in_fle, to_hash); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, state->ctx_dma); ++ dpaa2_fl_set_len(out_fle, ctx->ctx_len); ++ ++ req_ctx->flc = &ctx->flc[UPDATE_FIRST]; ++ req_ctx->flc_dma = ctx->flc_dma[UPDATE_FIRST]; ++ req_ctx->cbk = ahash_done_ctx_dst; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret != -EINPROGRESS && ++ !(ret == -EBUSY && ++ req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ goto unmap_ctx; ++ ++ state->update = ahash_update_ctx; ++ state->finup = ahash_finup_ctx; ++ state->final = ahash_final_ctx; ++ } else if (*next_buflen) { ++ scatterwalk_map_and_copy(buf + *buflen, req->src, 0, ++ req->nbytes, 0); ++ *buflen = *next_buflen; ++ *next_buflen = 0; ++ } ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "buf@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, buf, *buflen, 1); ++ print_hex_dump(KERN_ERR, "next buf@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, next_buf, ++ *next_buflen, 1); ++#endif ++ ++ return ret; ++unmap_ctx: ++ ahash_unmap_ctx(ctx->dev, edesc, req, ctx->ctx_len, DMA_TO_DEVICE); ++ qi_cache_free(edesc); ++ return ret; ++} ++ ++static int ahash_finup_no_ctx(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ int buflen = *current_buflen(state); ++ int qm_sg_bytes, src_nents, mapped_nents; ++ int digestsize = crypto_ahash_digestsize(ahash); ++ struct ahash_edesc *edesc; ++ struct dpaa2_sg_entry *sg_table; ++ int ret; ++ ++ src_nents = sg_nents_for_len(req->src, req->nbytes); ++ if (src_nents < 0) { ++ dev_err(ctx->dev, "Invalid number of src SG.\n"); ++ return src_nents; ++ } ++ ++ if (src_nents) { ++ mapped_nents = dma_map_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ if (!mapped_nents) { ++ dev_err(ctx->dev, "unable to DMA map source\n"); ++ return -ENOMEM; ++ } ++ } else { ++ mapped_nents = 0; ++ } ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) { ++ dma_unmap_sg(ctx->dev, req->src, src_nents, DMA_TO_DEVICE); ++ return -ENOMEM; ++ } ++ ++ edesc->src_nents = src_nents; ++ qm_sg_bytes = (2 + mapped_nents) * sizeof(*sg_table); ++ sg_table = &edesc->sgt[0]; ++ ++ ret = buf_map_to_qm_sg(ctx->dev, sg_table, state); ++ if (ret) ++ goto unmap; ++ ++ sg_to_qm_sg_last(req->src, mapped_nents, sg_table + 1, 0); ++ ++ edesc->qm_sg_dma = dma_map_single(ctx->dev, sg_table, qm_sg_bytes, ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->qm_sg_dma)) { ++ dev_err(ctx->dev, "unable to map S/G table\n"); ++ ret = -ENOMEM; ++ goto unmap; ++ } ++ edesc->qm_sg_bytes = qm_sg_bytes; ++ ++ edesc->dst_dma = dma_map_single(ctx->dev, req->result, digestsize, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->dst_dma)) { ++ dev_err(ctx->dev, "unable to map dst\n"); ++ edesc->dst_dma = 0; ++ ret = -ENOMEM; ++ goto unmap; ++ } ++ ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_sg); ++ dpaa2_fl_set_addr(in_fle, edesc->qm_sg_dma); ++ dpaa2_fl_set_len(in_fle, buflen + req->nbytes); ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, edesc->dst_dma); ++ dpaa2_fl_set_len(out_fle, digestsize); ++ ++ req_ctx->flc = &ctx->flc[DIGEST]; ++ req_ctx->flc_dma = ctx->flc_dma[DIGEST]; ++ req_ctx->cbk = ahash_done; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret != -EINPROGRESS && ++ !(ret == -EBUSY && req->base.flags & CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ goto unmap; ++ ++ return ret; ++unmap: ++ ahash_unmap(ctx->dev, edesc, req, digestsize); ++ qi_cache_free(edesc); ++ return -ENOMEM; ++} ++ ++static int ahash_update_first(struct ahash_request *req) ++{ ++ struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); ++ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_request *req_ctx = &state->caam_req; ++ struct dpaa2_fl_entry *in_fle = &req_ctx->fd_flt[1]; ++ struct dpaa2_fl_entry *out_fle = &req_ctx->fd_flt[0]; ++ gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ? ++ GFP_KERNEL : GFP_ATOMIC; ++ u8 *next_buf = alt_buf(state); ++ int *next_buflen = alt_buflen(state); ++ int to_hash; ++ int src_nents, mapped_nents; ++ struct ahash_edesc *edesc; ++ int ret = 0; ++ ++ *next_buflen = req->nbytes & (crypto_tfm_alg_blocksize(&ahash->base) - ++ 1); ++ to_hash = req->nbytes - *next_buflen; ++ ++ if (to_hash) { ++ struct dpaa2_sg_entry *sg_table; ++ ++ src_nents = sg_nents_for_len(req->src, ++ req->nbytes - (*next_buflen)); ++ if (src_nents < 0) { ++ dev_err(ctx->dev, "Invalid number of src SG.\n"); ++ return src_nents; ++ } ++ ++ if (src_nents) { ++ mapped_nents = dma_map_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ if (!mapped_nents) { ++ dev_err(ctx->dev, "unable to map source for DMA\n"); ++ return -ENOMEM; ++ } ++ } else { ++ mapped_nents = 0; ++ } ++ ++ /* allocate space for base edesc and link tables */ ++ edesc = qi_cache_zalloc(GFP_DMA | flags); ++ if (!edesc) { ++ dma_unmap_sg(ctx->dev, req->src, src_nents, ++ DMA_TO_DEVICE); ++ return -ENOMEM; ++ } ++ ++ edesc->src_nents = src_nents; ++ sg_table = &edesc->sgt[0]; ++ ++ memset(&req_ctx->fd_flt, 0, sizeof(req_ctx->fd_flt)); ++ dpaa2_fl_set_final(in_fle, true); ++ dpaa2_fl_set_len(in_fle, to_hash); ++ ++ if (mapped_nents > 1) { ++ int qm_sg_bytes; ++ ++ sg_to_qm_sg_last(req->src, mapped_nents, sg_table, 0); ++ qm_sg_bytes = mapped_nents * sizeof(*sg_table); ++ edesc->qm_sg_dma = dma_map_single(ctx->dev, sg_table, ++ qm_sg_bytes, ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(ctx->dev, edesc->qm_sg_dma)) { ++ dev_err(ctx->dev, "unable to map S/G table\n"); ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ edesc->qm_sg_bytes = qm_sg_bytes; ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_sg); ++ dpaa2_fl_set_addr(in_fle, edesc->qm_sg_dma); ++ } else { ++ dpaa2_fl_set_format(in_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(in_fle, sg_dma_address(req->src)); ++ } ++ ++ if (*next_buflen) ++ scatterwalk_map_and_copy(next_buf, req->src, to_hash, ++ *next_buflen, 0); ++ ++ state->ctx_dma = dma_map_single(ctx->dev, state->caam_ctx, ++ ctx->ctx_len, DMA_FROM_DEVICE); ++ if (dma_mapping_error(ctx->dev, state->ctx_dma)) { ++ dev_err(ctx->dev, "unable to map ctx\n"); ++ state->ctx_dma = 0; ++ ret = -ENOMEM; ++ goto unmap_ctx; ++ } ++ ++ dpaa2_fl_set_format(out_fle, dpaa2_fl_single); ++ dpaa2_fl_set_addr(out_fle, state->ctx_dma); ++ dpaa2_fl_set_len(out_fle, ctx->ctx_len); ++ ++ req_ctx->flc = &ctx->flc[UPDATE_FIRST]; ++ req_ctx->flc_dma = ctx->flc_dma[UPDATE_FIRST]; ++ req_ctx->cbk = ahash_done_ctx_dst; ++ req_ctx->ctx = &req->base; ++ req_ctx->edesc = edesc; ++ ++ ret = dpaa2_caam_enqueue(ctx->dev, req_ctx); ++ if (ret != -EINPROGRESS && ++ !(ret == -EBUSY && req->base.flags & ++ CRYPTO_TFM_REQ_MAY_BACKLOG)) ++ goto unmap_ctx; ++ ++ state->update = ahash_update_ctx; ++ state->finup = ahash_finup_ctx; ++ state->final = ahash_final_ctx; ++ } else if (*next_buflen) { ++ state->update = ahash_update_no_ctx; ++ state->finup = ahash_finup_no_ctx; ++ state->final = ahash_final_no_ctx; ++ scatterwalk_map_and_copy(next_buf, req->src, 0, ++ req->nbytes, 0); ++ switch_buf(state); ++ } ++#ifdef DEBUG ++ print_hex_dump(KERN_ERR, "next buf@" __stringify(__LINE__)": ", ++ DUMP_PREFIX_ADDRESS, 16, 4, next_buf, *next_buflen, 1); ++#endif ++ ++ return ret; ++unmap_ctx: ++ ahash_unmap_ctx(ctx->dev, edesc, req, ctx->ctx_len, DMA_TO_DEVICE); ++ qi_cache_free(edesc); ++ return ret; ++} ++ ++static int ahash_finup_first(struct ahash_request *req) ++{ ++ return ahash_digest(req); ++} ++ ++static int ahash_init(struct ahash_request *req) ++{ ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ ++ state->update = ahash_update_first; ++ state->finup = ahash_finup_first; ++ state->final = ahash_final_no_ctx; ++ ++ state->ctx_dma = 0; ++ state->current_buf = 0; ++ state->buf_dma = 0; ++ state->buflen_0 = 0; ++ state->buflen_1 = 0; ++ ++ return 0; ++} ++ ++static int ahash_update(struct ahash_request *req) ++{ ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ ++ return state->update(req); ++} ++ ++static int ahash_finup(struct ahash_request *req) ++{ ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ ++ return state->finup(req); ++} ++ ++static int ahash_final(struct ahash_request *req) ++{ ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ ++ return state->final(req); ++} ++ ++static int ahash_export(struct ahash_request *req, void *out) ++{ ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ struct caam_export_state *export = out; ++ int len; ++ u8 *buf; ++ ++ if (state->current_buf) { ++ buf = state->buf_1; ++ len = state->buflen_1; ++ } else { ++ buf = state->buf_0; ++ len = state->buflen_0; ++ } ++ ++ memcpy(export->buf, buf, len); ++ memcpy(export->caam_ctx, state->caam_ctx, sizeof(export->caam_ctx)); ++ export->buflen = len; ++ export->update = state->update; ++ export->final = state->final; ++ export->finup = state->finup; ++ ++ return 0; ++} ++ ++static int ahash_import(struct ahash_request *req, const void *in) ++{ ++ struct caam_hash_state *state = ahash_request_ctx(req); ++ const struct caam_export_state *export = in; ++ ++ memset(state, 0, sizeof(*state)); ++ memcpy(state->buf_0, export->buf, export->buflen); ++ memcpy(state->caam_ctx, export->caam_ctx, sizeof(state->caam_ctx)); ++ state->buflen_0 = export->buflen; ++ state->update = export->update; ++ state->final = export->final; ++ state->finup = export->finup; ++ ++ return 0; ++} ++ ++struct caam_hash_template { ++ char name[CRYPTO_MAX_ALG_NAME]; ++ char driver_name[CRYPTO_MAX_ALG_NAME]; ++ char hmac_name[CRYPTO_MAX_ALG_NAME]; ++ char hmac_driver_name[CRYPTO_MAX_ALG_NAME]; ++ unsigned int blocksize; ++ struct ahash_alg template_ahash; ++ u32 alg_type; ++}; ++ ++/* ahash descriptors */ ++static struct caam_hash_template driver_hash[] = { ++ { ++ .name = "sha1", ++ .driver_name = "sha1-caam-qi2", ++ .hmac_name = "hmac(sha1)", ++ .hmac_driver_name = "hmac-sha1-caam-qi2", ++ .blocksize = SHA1_BLOCK_SIZE, ++ .template_ahash = { ++ .init = ahash_init, ++ .update = ahash_update, ++ .final = ahash_final, ++ .finup = ahash_finup, ++ .digest = ahash_digest, ++ .export = ahash_export, ++ .import = ahash_import, ++ .setkey = ahash_setkey, ++ .halg = { ++ .digestsize = SHA1_DIGEST_SIZE, ++ .statesize = sizeof(struct caam_export_state), ++ }, ++ }, ++ .alg_type = OP_ALG_ALGSEL_SHA1, ++ }, { ++ .name = "sha224", ++ .driver_name = "sha224-caam-qi2", ++ .hmac_name = "hmac(sha224)", ++ .hmac_driver_name = "hmac-sha224-caam-qi2", ++ .blocksize = SHA224_BLOCK_SIZE, ++ .template_ahash = { ++ .init = ahash_init, ++ .update = ahash_update, ++ .final = ahash_final, ++ .finup = ahash_finup, ++ .digest = ahash_digest, ++ .export = ahash_export, ++ .import = ahash_import, ++ .setkey = ahash_setkey, ++ .halg = { ++ .digestsize = SHA224_DIGEST_SIZE, ++ .statesize = sizeof(struct caam_export_state), ++ }, ++ }, ++ .alg_type = OP_ALG_ALGSEL_SHA224, ++ }, { ++ .name = "sha256", ++ .driver_name = "sha256-caam-qi2", ++ .hmac_name = "hmac(sha256)", ++ .hmac_driver_name = "hmac-sha256-caam-qi2", ++ .blocksize = SHA256_BLOCK_SIZE, ++ .template_ahash = { ++ .init = ahash_init, ++ .update = ahash_update, ++ .final = ahash_final, ++ .finup = ahash_finup, ++ .digest = ahash_digest, ++ .export = ahash_export, ++ .import = ahash_import, ++ .setkey = ahash_setkey, ++ .halg = { ++ .digestsize = SHA256_DIGEST_SIZE, ++ .statesize = sizeof(struct caam_export_state), ++ }, ++ }, ++ .alg_type = OP_ALG_ALGSEL_SHA256, ++ }, { ++ .name = "sha384", ++ .driver_name = "sha384-caam-qi2", ++ .hmac_name = "hmac(sha384)", ++ .hmac_driver_name = "hmac-sha384-caam-qi2", ++ .blocksize = SHA384_BLOCK_SIZE, ++ .template_ahash = { ++ .init = ahash_init, ++ .update = ahash_update, ++ .final = ahash_final, ++ .finup = ahash_finup, ++ .digest = ahash_digest, ++ .export = ahash_export, ++ .import = ahash_import, ++ .setkey = ahash_setkey, ++ .halg = { ++ .digestsize = SHA384_DIGEST_SIZE, ++ .statesize = sizeof(struct caam_export_state), ++ }, ++ }, ++ .alg_type = OP_ALG_ALGSEL_SHA384, ++ }, { ++ .name = "sha512", ++ .driver_name = "sha512-caam-qi2", ++ .hmac_name = "hmac(sha512)", ++ .hmac_driver_name = "hmac-sha512-caam-qi2", ++ .blocksize = SHA512_BLOCK_SIZE, ++ .template_ahash = { ++ .init = ahash_init, ++ .update = ahash_update, ++ .final = ahash_final, ++ .finup = ahash_finup, ++ .digest = ahash_digest, ++ .export = ahash_export, ++ .import = ahash_import, ++ .setkey = ahash_setkey, ++ .halg = { ++ .digestsize = SHA512_DIGEST_SIZE, ++ .statesize = sizeof(struct caam_export_state), ++ }, ++ }, ++ .alg_type = OP_ALG_ALGSEL_SHA512, ++ }, { ++ .name = "md5", ++ .driver_name = "md5-caam-qi2", ++ .hmac_name = "hmac(md5)", ++ .hmac_driver_name = "hmac-md5-caam-qi2", ++ .blocksize = MD5_BLOCK_WORDS * 4, ++ .template_ahash = { ++ .init = ahash_init, ++ .update = ahash_update, ++ .final = ahash_final, ++ .finup = ahash_finup, ++ .digest = ahash_digest, ++ .export = ahash_export, ++ .import = ahash_import, ++ .setkey = ahash_setkey, ++ .halg = { ++ .digestsize = MD5_DIGEST_SIZE, ++ .statesize = sizeof(struct caam_export_state), ++ }, ++ }, ++ .alg_type = OP_ALG_ALGSEL_MD5, ++ } ++}; ++ ++struct caam_hash_alg { ++ struct list_head entry; ++ struct device *dev; ++ int alg_type; ++ struct ahash_alg ahash_alg; ++}; ++ ++static int caam_hash_cra_init(struct crypto_tfm *tfm) ++{ ++ struct crypto_ahash *ahash = __crypto_ahash_cast(tfm); ++ struct crypto_alg *base = tfm->__crt_alg; ++ struct hash_alg_common *halg = ++ container_of(base, struct hash_alg_common, base); ++ struct ahash_alg *alg = ++ container_of(halg, struct ahash_alg, halg); ++ struct caam_hash_alg *caam_hash = ++ container_of(alg, struct caam_hash_alg, ahash_alg); ++ struct caam_hash_ctx *ctx = crypto_tfm_ctx(tfm); ++ /* Sizes for MDHA running digests: MD5, SHA1, 224, 256, 384, 512 */ ++ static const u8 runninglen[] = { HASH_MSG_LEN + MD5_DIGEST_SIZE, ++ HASH_MSG_LEN + SHA1_DIGEST_SIZE, ++ HASH_MSG_LEN + 32, ++ HASH_MSG_LEN + SHA256_DIGEST_SIZE, ++ HASH_MSG_LEN + 64, ++ HASH_MSG_LEN + SHA512_DIGEST_SIZE }; ++ dma_addr_t dma_addr; ++ int i; ++ ++ ctx->dev = caam_hash->dev; ++ ++ dma_addr = dma_map_single_attrs(ctx->dev, ctx->flc, sizeof(ctx->flc), ++ DMA_BIDIRECTIONAL, ++ DMA_ATTR_SKIP_CPU_SYNC); ++ if (dma_mapping_error(ctx->dev, dma_addr)) { ++ dev_err(ctx->dev, "unable to map shared descriptors\n"); ++ return -ENOMEM; ++ } ++ ++ for (i = 0; i < HASH_NUM_OP; i++) ++ ctx->flc_dma[i] = dma_addr + i * sizeof(ctx->flc[i]); ++ ++ /* copy descriptor header template value */ ++ ctx->adata.algtype = OP_TYPE_CLASS2_ALG | caam_hash->alg_type; ++ ++ ctx->ctx_len = runninglen[(ctx->adata.algtype & ++ OP_ALG_ALGSEL_SUBMASK) >> ++ OP_ALG_ALGSEL_SHIFT]; ++ ++ crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), ++ sizeof(struct caam_hash_state)); ++ ++ return ahash_set_sh_desc(ahash); ++} ++ ++static void caam_hash_cra_exit(struct crypto_tfm *tfm) ++{ ++ struct caam_hash_ctx *ctx = crypto_tfm_ctx(tfm); ++ ++ dma_unmap_single_attrs(ctx->dev, ctx->flc_dma[0], sizeof(ctx->flc), ++ DMA_BIDIRECTIONAL, DMA_ATTR_SKIP_CPU_SYNC); ++} ++ ++static struct caam_hash_alg *caam_hash_alloc(struct device *dev, ++ struct caam_hash_template *template, bool keyed) ++{ ++ struct caam_hash_alg *t_alg; ++ struct ahash_alg *halg; ++ struct crypto_alg *alg; ++ ++ t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL); ++ if (!t_alg) ++ return ERR_PTR(-ENOMEM); ++ ++ t_alg->ahash_alg = template->template_ahash; ++ halg = &t_alg->ahash_alg; ++ alg = &halg->halg.base; ++ ++ if (keyed) { ++ snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", ++ template->hmac_name); ++ snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", ++ template->hmac_driver_name); ++ } else { ++ snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", ++ template->name); ++ snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", ++ template->driver_name); ++ } ++ alg->cra_module = THIS_MODULE; ++ alg->cra_init = caam_hash_cra_init; ++ alg->cra_exit = caam_hash_cra_exit; ++ alg->cra_ctxsize = sizeof(struct caam_hash_ctx); ++ alg->cra_priority = CAAM_CRA_PRIORITY; ++ alg->cra_blocksize = template->blocksize; ++ alg->cra_alignmask = 0; ++ alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_TYPE_AHASH; ++ alg->cra_type = &crypto_ahash_type; ++ ++ t_alg->alg_type = template->alg_type; ++ t_alg->dev = dev; ++ ++ return t_alg; ++} ++ +static void dpaa2_caam_fqdan_cb(struct dpaa2_io_notification_ctx *nctx) +{ + struct dpaa2_caam_priv_per_cpu *ppriv; @@ -19266,6 +20889,7 @@ Signed-off-by: Yangbo Lu +} + +static struct list_head alg_list; ++static struct list_head hash_list; + +static int dpaa2_caam_probe(struct fsl_mc_device *dpseci_dev) +{ @@ -19429,6 +21053,61 @@ Signed-off-by: Yangbo Lu + if (registered) + dev_info(dev, "algorithms registered in /proc/crypto\n"); + ++ /* register hash algorithms the device supports */ ++ INIT_LIST_HEAD(&hash_list); ++ ++ /* ++ * Skip registration of any hashing algorithms if MD block ++ * is not present. ++ */ ++ if (!priv->sec_attr.md_acc_num) ++ return 0; ++ ++ for (i = 0; i < ARRAY_SIZE(driver_hash); i++) { ++ struct caam_hash_alg *t_alg; ++ struct caam_hash_template *alg = driver_hash + i; ++ ++ /* register hmac version */ ++ t_alg = caam_hash_alloc(dev, alg, true); ++ if (IS_ERR(t_alg)) { ++ err = PTR_ERR(t_alg); ++ dev_warn(dev, "%s hash alg allocation failed: %d\n", ++ alg->driver_name, err); ++ continue; ++ } ++ ++ err = crypto_register_ahash(&t_alg->ahash_alg); ++ if (err) { ++ dev_warn(dev, "%s alg registration failed: %d\n", ++ t_alg->ahash_alg.halg.base.cra_driver_name, ++ err); ++ kfree(t_alg); ++ } else { ++ list_add_tail(&t_alg->entry, &hash_list); ++ } ++ ++ /* register unkeyed version */ ++ t_alg = caam_hash_alloc(dev, alg, false); ++ if (IS_ERR(t_alg)) { ++ err = PTR_ERR(t_alg); ++ dev_warn(dev, "%s alg allocation failed: %d\n", ++ alg->driver_name, err); ++ continue; ++ } ++ ++ err = crypto_register_ahash(&t_alg->ahash_alg); ++ if (err) { ++ dev_warn(dev, "%s alg registration failed: %d\n", ++ t_alg->ahash_alg.halg.base.cra_driver_name, ++ err); ++ kfree(t_alg); ++ } else { ++ list_add_tail(&t_alg->entry, &hash_list); ++ } ++ } ++ if (!list_empty(&hash_list)) ++ dev_info(dev, "hash algorithms registered in /proc/crypto\n"); ++ + return err; + +err_bind: @@ -19473,6 +21152,16 @@ Signed-off-by: Yangbo Lu + } + } + ++ if (hash_list.next) { ++ struct caam_hash_alg *t_hash_alg, *p; ++ ++ list_for_each_entry_safe(t_hash_alg, p, &hash_list, entry) { ++ crypto_unregister_ahash(&t_hash_alg->ahash_alg); ++ list_del(&t_hash_alg->entry); ++ kfree(t_hash_alg); ++ } ++ } ++ + dpaa2_dpseci_disable(priv); + dpaa2_dpseci_dpio_free(priv); + dpaa2_dpseci_free(priv); @@ -19503,7 +21192,7 @@ Signed-off-by: Yangbo Lu + } + } + -+ dpaa2_fl_set_flc(&req->fd_flt[1], req->flc->flc_dma); ++ dpaa2_fl_set_flc(&req->fd_flt[1], req->flc_dma); + + req->fd_flt_dma = dma_map_single(dev, req->fd_flt, sizeof(req->fd_flt), + DMA_BIDIRECTIONAL); @@ -19516,7 +21205,7 @@ Signed-off-by: Yangbo Lu + dpaa2_fd_set_format(&fd, dpaa2_fd_list); + dpaa2_fd_set_addr(&fd, req->fd_flt_dma); + dpaa2_fd_set_len(&fd, req->fd_flt[1].len); -+ dpaa2_fd_set_flc(&fd, req->flc->flc_dma); ++ dpaa2_fd_set_flc(&fd, req->flc_dma); + + /* + * There is no guarantee that preemption is disabled here, @@ -19572,7 +21261,7 @@ Signed-off-by: Yangbo Lu +module_fsl_mc_driver(dpaa2_caam_driver); --- /dev/null +++ b/drivers/crypto/caam/caamalg_qi2.h -@@ -0,0 +1,265 @@ +@@ -0,0 +1,281 @@ +/* + * Copyright 2015-2016 Freescale Semiconductor Inc. + * Copyright 2017 NXP @@ -19788,16 +21477,30 @@ Signed-off-by: Yangbo Lu + struct dpaa2_sg_entry sgt[0]; +}; + ++/* ++ * ahash_edesc - s/w-extended ahash descriptor ++ * @dst_dma: I/O virtual address of req->result ++ * @qm_sg_dma: I/O virtual address of h/w link table ++ * @src_nents: number of segments in input scatterlist ++ * @qm_sg_bytes: length of dma mapped qm_sg space ++ * @sgt: pointer to h/w link table ++ */ ++struct ahash_edesc { ++ dma_addr_t dst_dma; ++ dma_addr_t qm_sg_dma; ++ int src_nents; ++ int qm_sg_bytes; ++ struct dpaa2_sg_entry sgt[0]; ++}; ++ +/** + * caam_flc - Flow Context (FLC) + * @flc: Flow Context options + * @sh_desc: Shared Descriptor -+ * @flc_dma: DMA address of the Flow Context + */ +struct caam_flc { + u32 flc[16]; + u32 sh_desc[MAX_SDLEN]; -+ dma_addr_t flc_dma; +} ____cacheline_aligned; + +enum optype { @@ -19815,6 +21518,7 @@ Signed-off-by: Yangbo Lu + * fd_flt[1] - FLE pointing to input buffer + * @fd_flt_dma: DMA address for the frame list table + * @flc: Flow Context ++ * @flc_dma: I/O virtual address of Flow Context + * @op_type: operation type + * @cbk: Callback function to invoke when job is completed + * @ctx: arbit context attached with request by the application @@ -19824,6 +21528,7 @@ Signed-off-by: Yangbo Lu + struct dpaa2_fl_entry fd_flt[2]; + dma_addr_t fd_flt_dma; + struct caam_flc *flc; ++ dma_addr_t flc_dma; + enum optype op_type; + void (*cbk)(void *ctx, u32 err); + void *ctx; @@ -19840,16 +21545,30 @@ Signed-off-by: Yangbo Lu +#endif /* _CAAMALG_QI2_H_ */ --- a/drivers/crypto/caam/caamhash.c +++ b/drivers/crypto/caam/caamhash.c -@@ -72,7 +72,7 @@ +@@ -62,6 +62,7 @@ + #include "error.h" + #include "sg_sw_sec4.h" + #include "key_gen.h" ++#include "caamhash_desc.h" + + #define CAAM_CRA_PRIORITY 3000 + +@@ -71,14 +72,6 @@ + #define CAAM_MAX_HASH_BLOCK_SIZE SHA512_BLOCK_SIZE #define CAAM_MAX_HASH_DIGEST_SIZE SHA512_DIGEST_SIZE - /* length of descriptors text */ +-/* length of descriptors text */ -#define DESC_AHASH_BASE (4 * CAAM_CMD_SZ) -+#define DESC_AHASH_BASE (3 * CAAM_CMD_SZ) - #define DESC_AHASH_UPDATE_LEN (6 * CAAM_CMD_SZ) - #define DESC_AHASH_UPDATE_FIRST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ) - #define DESC_AHASH_FINAL_LEN (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ) -@@ -103,20 +103,14 @@ struct caam_hash_ctx { +-#define DESC_AHASH_UPDATE_LEN (6 * CAAM_CMD_SZ) +-#define DESC_AHASH_UPDATE_FIRST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ) +-#define DESC_AHASH_FINAL_LEN (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ) +-#define DESC_AHASH_FINUP_LEN (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ) +-#define DESC_AHASH_DIGEST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ) +- + #define DESC_HASH_MAX_USED_BYTES (DESC_AHASH_FINAL_LEN + \ + CAAM_MAX_HASH_KEY_SIZE) + #define DESC_HASH_MAX_USED_LEN (DESC_HASH_MAX_USED_BYTES / CAAM_CMD_SZ) +@@ -103,20 +96,14 @@ struct caam_hash_ctx { u32 sh_desc_update_first[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; u32 sh_desc_fin[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; u32 sh_desc_digest[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; @@ -19871,7 +21590,7 @@ Signed-off-by: Yangbo Lu }; /* ahash state */ -@@ -143,6 +137,31 @@ struct caam_export_state { +@@ -143,6 +130,31 @@ struct caam_export_state { int (*finup)(struct ahash_request *req); }; @@ -19903,7 +21622,7 @@ Signed-off-by: Yangbo Lu /* Common job descriptor seq in/out ptr routines */ /* Map state->caam_ctx, and append seq_out_ptr command that points to it */ -@@ -175,36 +194,27 @@ static inline dma_addr_t map_seq_out_ptr +@@ -175,40 +187,31 @@ static inline dma_addr_t map_seq_out_ptr return dst_dma; } @@ -19956,7 +21675,12 @@ Signed-off-by: Yangbo Lu } /* Map state->caam_ctx, and add it to link table */ -@@ -224,89 +234,54 @@ static inline int ctx_map_to_sec4_sg(u32 +-static inline int ctx_map_to_sec4_sg(u32 *desc, struct device *jrdev, ++static inline int ctx_map_to_sec4_sg(struct device *jrdev, + struct caam_hash_state *state, int ctx_len, + struct sec4_sg_entry *sec4_sg, u32 flag) + { +@@ -224,124 +227,22 @@ static inline int ctx_map_to_sec4_sg(u32 return 0; } @@ -19989,39 +21713,25 @@ Signed-off-by: Yangbo Lu - append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD); -} - - /* +-/* - * For ahash read data from seqin following state->caam_ctx, - * and write resulting class2 context to seqout, which may be state->caam_ctx - * or req->result -+ * For ahash update, final and finup (import_ctx = true) -+ * import context, read and write to seqout -+ * For ahash firsts and digest (import_ctx = false) -+ * read and write to seqout - */ +- */ -static inline void ahash_append_load_str(u32 *desc, int digestsize) -+static inline void ahash_gen_sh_desc(u32 *desc, u32 state, int digestsize, -+ struct caam_hash_ctx *ctx, bool import_ctx) - { +-{ - /* Calculate remaining bytes to read */ - append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); -+ u32 op = ctx->adata.algtype; -+ u32 *skip_key_load; - +- - /* Read remaining bytes */ - append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_LAST2 | - FIFOLD_TYPE_MSG | KEY_VLF); -+ init_sh_desc(desc, HDR_SHARE_SERIAL); - +- - /* Store class2 context bytes */ - append_seq_store(desc, digestsize, LDST_CLASS_2_CCB | - LDST_SRCDST_BYTE_CONTEXT); -} -+ /* Append key if it has been set; ahash update excluded */ -+ if ((state != OP_ALG_AS_UPDATE) && (ctx->adata.keylen)) { -+ /* Skip key loading if already shared */ -+ skip_key_load = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL | -+ JUMP_COND_SHRD); - +- -/* - * For ahash update, final and finup, import context, read and write to seqout - */ @@ -20034,60 +21744,44 @@ Signed-off-by: Yangbo Lu - /* Import context from software */ - append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT | - LDST_CLASS_2_CCB | ctx->ctx_len); -+ append_key_as_imm(desc, ctx->key, ctx->adata.keylen_pad, -+ ctx->adata.keylen, CLASS_2 | -+ KEY_DEST_MDHA_SPLIT | KEY_ENC); - +- - /* Class 2 operation */ - append_operation(desc, op | state | OP_ALG_ENCRYPT); -+ set_jump_tgt_here(desc, skip_key_load); - +- - /* - * Load from buf and/or src and write to req->result or state->context - */ - ahash_append_load_str(desc, digestsize); -} -+ op |= OP_ALG_AAI_HMAC_PRECOMP; -+ } - +- -/* For ahash firsts and digest, read and write to seqout */ -static inline void ahash_data_to_out(u32 *desc, u32 op, u32 state, - int digestsize, struct caam_hash_ctx *ctx) -{ - init_sh_desc_key_ahash(desc, ctx); -+ /* If needed, import context from software */ -+ if (import_ctx) -+ append_seq_load(desc, ctx->ctx_len, LDST_CLASS_2_CCB | -+ LDST_SRCDST_BYTE_CONTEXT); - - /* Class 2 operation */ - append_operation(desc, op | state | OP_ALG_ENCRYPT); - - /* - * Load from buf and/or src and write to req->result or state->context -+ * Calculate remaining bytes to read - */ +- +- /* Class 2 operation */ +- append_operation(desc, op | state | OP_ALG_ENCRYPT); +- +- /* +- * Load from buf and/or src and write to req->result or state->context +- */ - ahash_append_load_str(desc, digestsize); -+ append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); -+ /* Read remaining bytes */ -+ append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_LAST2 | -+ FIFOLD_TYPE_MSG | KEY_VLF); -+ /* Store class2 context bytes */ -+ append_seq_store(desc, digestsize, LDST_CLASS_2_CCB | -+ LDST_SRCDST_BYTE_CONTEXT); - } - +-} +- static int ahash_set_sh_desc(struct crypto_ahash *ahash) -@@ -314,34 +289,13 @@ static int ahash_set_sh_desc(struct cryp + { struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); int digestsize = crypto_ahash_digestsize(ahash); struct device *jrdev = ctx->jrdev; - u32 have_key = 0; ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(jrdev->parent); u32 *desc; - if (ctx->split_key_len) - have_key = OP_ALG_AAI_HMAC_PRECOMP; -- ++ ctx->adata.key_virt = ctx->key; + /* ahash_update shared descriptor */ desc = ctx->sh_desc_update; - @@ -20110,13 +21804,14 @@ Signed-off-by: Yangbo Lu - dev_err(jrdev, "unable to map shared descriptor\n"); - return -ENOMEM; - } -+ ahash_gen_sh_desc(desc, OP_ALG_AS_UPDATE, ctx->ctx_len, ctx, true); ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_UPDATE, ctx->ctx_len, ++ ctx->ctx_len, true, ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_update_dma, + desc_bytes(desc), DMA_TO_DEVICE); #ifdef DEBUG print_hex_dump(KERN_ERR, "ahash update shdesc@"__stringify(__LINE__)": ", -@@ -350,17 +304,9 @@ static int ahash_set_sh_desc(struct cryp +@@ -350,17 +251,10 @@ static int ahash_set_sh_desc(struct cryp /* ahash_update_first shared descriptor */ desc = ctx->sh_desc_update_first; @@ -20131,13 +21826,14 @@ Signed-off-by: Yangbo Lu - dev_err(jrdev, "unable to map shared descriptor\n"); - return -ENOMEM; - } -+ ahash_gen_sh_desc(desc, OP_ALG_AS_INIT, ctx->ctx_len, ctx, false); ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_INIT, ctx->ctx_len, ++ ctx->ctx_len, false, ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_update_first_dma, + desc_bytes(desc), DMA_TO_DEVICE); #ifdef DEBUG print_hex_dump(KERN_ERR, "ahash update first shdesc@"__stringify(__LINE__)": ", -@@ -369,53 +315,20 @@ static int ahash_set_sh_desc(struct cryp +@@ -369,53 +263,22 @@ static int ahash_set_sh_desc(struct cryp /* ahash_final shared descriptor */ desc = ctx->sh_desc_fin; @@ -20151,7 +21847,8 @@ Signed-off-by: Yangbo Lu - dev_err(jrdev, "unable to map shared descriptor\n"); - return -ENOMEM; - } -+ ahash_gen_sh_desc(desc, OP_ALG_AS_FINALIZE, digestsize, ctx, true); ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_FINALIZE, digestsize, ++ ctx->ctx_len, true, ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_fin_dma, + desc_bytes(desc), DMA_TO_DEVICE); #ifdef DEBUG @@ -20191,13 +21888,14 @@ Signed-off-by: Yangbo Lu - dev_err(jrdev, "unable to map shared descriptor\n"); - return -ENOMEM; - } -+ ahash_gen_sh_desc(desc, OP_ALG_AS_INITFINAL, digestsize, ctx, false); ++ cnstr_shdsc_ahash(desc, &ctx->adata, OP_ALG_AS_INITFINAL, digestsize, ++ ctx->ctx_len, false, ctrlpriv->era); + dma_sync_single_for_device(jrdev, ctx->sh_desc_digest_dma, + desc_bytes(desc), DMA_TO_DEVICE); #ifdef DEBUG print_hex_dump(KERN_ERR, "ahash digest shdesc@"__stringify(__LINE__)": ", -@@ -426,14 +339,6 @@ static int ahash_set_sh_desc(struct cryp +@@ -426,14 +289,6 @@ static int ahash_set_sh_desc(struct cryp return 0; } @@ -20212,7 +21910,7 @@ Signed-off-by: Yangbo Lu /* Digest hash size if it is too large */ static int hash_digest_key(struct caam_hash_ctx *ctx, const u8 *key_in, u32 *keylen, u8 *key_out, u32 digestsize) -@@ -469,7 +374,7 @@ static int hash_digest_key(struct caam_h +@@ -469,7 +324,7 @@ static int hash_digest_key(struct caam_h } /* Job descriptor to perform unkeyed hash on key_in */ @@ -20221,7 +21919,7 @@ Signed-off-by: Yangbo Lu OP_ALG_AS_INITFINAL); append_seq_in_ptr(desc, src_dma, *keylen, 0); append_seq_fifo_load(desc, *keylen, FIFOLD_CLASS_CLASS2 | -@@ -513,10 +418,7 @@ static int hash_digest_key(struct caam_h +@@ -513,12 +368,10 @@ static int hash_digest_key(struct caam_h static int ahash_setkey(struct crypto_ahash *ahash, const u8 *key, unsigned int keylen) { @@ -20231,8 +21929,11 @@ Signed-off-by: Yangbo Lu - struct device *jrdev = ctx->jrdev; int blocksize = crypto_tfm_alg_blocksize(&ahash->base); int digestsize = crypto_ahash_digestsize(ahash); ++ struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctx->jrdev->parent); int ret; -@@ -539,43 +441,19 @@ static int ahash_setkey(struct crypto_ah + u8 *hashed_key = NULL; + +@@ -539,43 +392,29 @@ static int ahash_setkey(struct crypto_ah key = hashed_key; } @@ -20247,12 +21948,21 @@ Signed-off-by: Yangbo Lu - print_hex_dump(KERN_ERR, "key in @"__stringify(__LINE__)": ", - DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); -#endif -- ++ /* ++ * If DKP is supported, use it in the shared descriptor to generate ++ * the split key. ++ */ ++ if (ctrlpriv->era >= 6) { ++ ctx->adata.key_inline = true; ++ ctx->adata.keylen = keylen; ++ ctx->adata.keylen_pad = split_key_len(ctx->adata.algtype & ++ OP_ALG_ALGSEL_MASK); + - ret = gen_split_hash_key(ctx, key, keylen); -+ ret = gen_split_key(ctx->jrdev, ctx->key, &ctx->adata, key, keylen, -+ CAAM_MAX_HASH_KEY_SIZE); - if (ret) - goto bad_free_key; +- if (ret) +- goto bad_free_key; ++ if (ctx->adata.keylen_pad > CAAM_MAX_HASH_KEY_SIZE) ++ goto bad_free_key; - ctx->key_dma = dma_map_single(jrdev, ctx->key, ctx->split_key_pad_len, - DMA_TO_DEVICE); @@ -20260,13 +21970,18 @@ Signed-off-by: Yangbo Lu - dev_err(jrdev, "unable to map key i/o memory\n"); - ret = -ENOMEM; - goto error_free_key; -- } - #ifdef DEBUG - print_hex_dump(KERN_ERR, "ctx.key@"__stringify(__LINE__)": ", - DUMP_PREFIX_ADDRESS, 16, 4, ctx->key, ++ memcpy(ctx->key, key, keylen); ++ } else { ++ ret = gen_split_key(ctx->jrdev, ctx->key, &ctx->adata, key, ++ keylen, CAAM_MAX_HASH_KEY_SIZE); ++ if (ret) ++ goto bad_free_key; + } +-#ifdef DEBUG +- print_hex_dump(KERN_ERR, "ctx.key@"__stringify(__LINE__)": ", +- DUMP_PREFIX_ADDRESS, 16, 4, ctx->key, - ctx->split_key_pad_len, 1); -+ ctx->adata.keylen_pad, 1); - #endif +-#endif - ret = ahash_set_sh_desc(ahash); - if (ret) { @@ -20280,7 +21995,7 @@ Signed-off-by: Yangbo Lu bad_free_key: kfree(hashed_key); crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); -@@ -604,6 +482,8 @@ static inline void ahash_unmap(struct de +@@ -604,6 +443,8 @@ static inline void ahash_unmap(struct de struct ahash_edesc *edesc, struct ahash_request *req, int dst_len) { @@ -20289,7 +22004,7 @@ Signed-off-by: Yangbo Lu if (edesc->src_nents) dma_unmap_sg(dev, req->src, edesc->src_nents, DMA_TO_DEVICE); if (edesc->dst_dma) -@@ -612,6 +492,12 @@ static inline void ahash_unmap(struct de +@@ -612,6 +453,12 @@ static inline void ahash_unmap(struct de if (edesc->sec4_sg_bytes) dma_unmap_single(dev, edesc->sec4_sg_dma, edesc->sec4_sg_bytes, DMA_TO_DEVICE); @@ -20302,7 +22017,7 @@ Signed-off-by: Yangbo Lu } static inline void ahash_unmap_ctx(struct device *dev, -@@ -643,8 +529,7 @@ static void ahash_done(struct device *jr +@@ -643,8 +490,7 @@ static void ahash_done(struct device *jr dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); #endif @@ -20312,7 +22027,7 @@ Signed-off-by: Yangbo Lu if (err) caam_jr_strstatus(jrdev, err); -@@ -671,19 +556,19 @@ static void ahash_done_bi(struct device +@@ -671,19 +517,19 @@ static void ahash_done_bi(struct device struct ahash_edesc *edesc; struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); @@ -20335,7 +22050,7 @@ Signed-off-by: Yangbo Lu kfree(edesc); #ifdef DEBUG -@@ -713,8 +598,7 @@ static void ahash_done_ctx_src(struct de +@@ -713,8 +559,7 @@ static void ahash_done_ctx_src(struct de dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); #endif @@ -20345,7 +22060,7 @@ Signed-off-by: Yangbo Lu if (err) caam_jr_strstatus(jrdev, err); -@@ -741,19 +625,19 @@ static void ahash_done_ctx_dst(struct de +@@ -741,19 +586,19 @@ static void ahash_done_ctx_dst(struct de struct ahash_edesc *edesc; struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); @@ -20368,7 +22083,7 @@ Signed-off-by: Yangbo Lu kfree(edesc); #ifdef DEBUG -@@ -835,13 +719,12 @@ static int ahash_update_ctx(struct ahash +@@ -835,13 +680,12 @@ static int ahash_update_ctx(struct ahash struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct caam_hash_state *state = ahash_request_ctx(req); struct device *jrdev = ctx->jrdev; @@ -20388,7 +22103,13 @@ Signed-off-by: Yangbo Lu int in_len = *buflen + req->nbytes, to_hash; u32 *desc; int src_nents, mapped_nents, sec4_sg_bytes, sec4_sg_src_index; -@@ -895,10 +778,9 @@ static int ahash_update_ctx(struct ahash +@@ -890,15 +734,14 @@ static int ahash_update_ctx(struct ahash + edesc->src_nents = src_nents; + edesc->sec4_sg_bytes = sec4_sg_bytes; + +- ret = ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, ++ ret = ctx_map_to_sec4_sg(jrdev, state, ctx->ctx_len, + edesc->sec4_sg, DMA_BIDIRECTIONAL); if (ret) goto unmap_ctx; @@ -20402,7 +22123,7 @@ Signed-off-by: Yangbo Lu if (mapped_nents) { sg_to_sec4_sg_last(req->src, mapped_nents, -@@ -909,12 +791,10 @@ static int ahash_update_ctx(struct ahash +@@ -909,12 +752,10 @@ static int ahash_update_ctx(struct ahash to_hash - *buflen, *next_buflen, 0); } else { @@ -20417,7 +22138,7 @@ Signed-off-by: Yangbo Lu desc = edesc->hw_desc; edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, -@@ -969,12 +849,9 @@ static int ahash_final_ctx(struct ahash_ +@@ -969,12 +810,9 @@ static int ahash_final_ctx(struct ahash_ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct caam_hash_state *state = ahash_request_ctx(req); struct device *jrdev = ctx->jrdev; @@ -20433,7 +22154,15 @@ Signed-off-by: Yangbo Lu u32 *desc; int sec4_sg_bytes, sec4_sg_src_index; int digestsize = crypto_ahash_digestsize(ahash); -@@ -1001,11 +878,11 @@ static int ahash_final_ctx(struct ahash_ +@@ -994,18 +832,17 @@ static int ahash_final_ctx(struct ahash_ + desc = edesc->hw_desc; + + edesc->sec4_sg_bytes = sec4_sg_bytes; +- edesc->src_nents = 0; + +- ret = ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, ++ ret = ctx_map_to_sec4_sg(jrdev, state, ctx->ctx_len, + edesc->sec4_sg, DMA_TO_DEVICE); if (ret) goto unmap_ctx; @@ -20450,7 +22179,7 @@ Signed-off-by: Yangbo Lu edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, sec4_sg_bytes, DMA_TO_DEVICE); -@@ -1048,12 +925,9 @@ static int ahash_finup_ctx(struct ahash_ +@@ -1048,12 +885,9 @@ static int ahash_finup_ctx(struct ahash_ struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct caam_hash_state *state = ahash_request_ctx(req); struct device *jrdev = ctx->jrdev; @@ -20466,7 +22195,7 @@ Signed-off-by: Yangbo Lu u32 *desc; int sec4_sg_src_index; int src_nents, mapped_nents; -@@ -1082,7 +956,7 @@ static int ahash_finup_ctx(struct ahash_ +@@ -1082,7 +916,7 @@ static int ahash_finup_ctx(struct ahash_ /* allocate space for base edesc and hw desc commands, link tables */ edesc = ahash_edesc_alloc(ctx, sec4_sg_src_index + mapped_nents, @@ -20475,7 +22204,13 @@ Signed-off-by: Yangbo Lu flags); if (!edesc) { dma_unmap_sg(jrdev, req->src, src_nents, DMA_TO_DEVICE); -@@ -1098,9 +972,9 @@ static int ahash_finup_ctx(struct ahash_ +@@ -1093,14 +927,14 @@ static int ahash_finup_ctx(struct ahash_ + + edesc->src_nents = src_nents; + +- ret = ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, ++ ret = ctx_map_to_sec4_sg(jrdev, state, ctx->ctx_len, + edesc->sec4_sg, DMA_TO_DEVICE); if (ret) goto unmap_ctx; @@ -20488,7 +22223,7 @@ Signed-off-by: Yangbo Lu ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, sec4_sg_src_index, ctx->ctx_len + buflen, -@@ -1136,15 +1010,18 @@ static int ahash_digest(struct ahash_req +@@ -1136,15 +970,18 @@ static int ahash_digest(struct ahash_req { struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); @@ -20509,7 +22244,7 @@ Signed-off-by: Yangbo Lu src_nents = sg_nents_for_len(req->src, req->nbytes); if (src_nents < 0) { dev_err(jrdev, "Invalid number of src SG.\n"); -@@ -1215,10 +1092,10 @@ static int ahash_final_no_ctx(struct aha +@@ -1215,10 +1052,10 @@ static int ahash_final_no_ctx(struct aha struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct caam_hash_state *state = ahash_request_ctx(req); struct device *jrdev = ctx->jrdev; @@ -20524,7 +22259,15 @@ Signed-off-by: Yangbo Lu u32 *desc; int digestsize = crypto_ahash_digestsize(ahash); struct ahash_edesc *edesc; -@@ -1276,13 +1153,12 @@ static int ahash_update_no_ctx(struct ah +@@ -1246,7 +1083,6 @@ static int ahash_final_no_ctx(struct aha + dev_err(jrdev, "unable to map dst\n"); + goto unmap; + } +- edesc->src_nents = 0; + + #ifdef DEBUG + print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", +@@ -1276,13 +1112,12 @@ static int ahash_update_no_ctx(struct ah struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct caam_hash_state *state = ahash_request_ctx(req); struct device *jrdev = ctx->jrdev; @@ -20544,9 +22287,11 @@ Signed-off-by: Yangbo Lu int in_len = *buflen + req->nbytes, to_hash; int sec4_sg_bytes, src_nents, mapped_nents; struct ahash_edesc *edesc; -@@ -1331,8 +1207,10 @@ static int ahash_update_no_ctx(struct ah +@@ -1329,10 +1164,11 @@ static int ahash_update_no_ctx(struct ah + + edesc->src_nents = src_nents; edesc->sec4_sg_bytes = sec4_sg_bytes; - edesc->dst_dma = 0; +- edesc->dst_dma = 0; - state->buf_dma = buf_map_to_sec4_sg(jrdev, edesc->sec4_sg, - buf, *buflen); @@ -20557,7 +22302,7 @@ Signed-off-by: Yangbo Lu sg_to_sec4_sg_last(req->src, mapped_nents, edesc->sec4_sg + 1, 0); -@@ -1342,8 +1220,6 @@ static int ahash_update_no_ctx(struct ah +@@ -1342,8 +1178,6 @@ static int ahash_update_no_ctx(struct ah *next_buflen, 0); } @@ -20566,7 +22311,7 @@ Signed-off-by: Yangbo Lu desc = edesc->hw_desc; edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, -@@ -1403,12 +1279,9 @@ static int ahash_finup_no_ctx(struct aha +@@ -1403,12 +1237,9 @@ static int ahash_finup_no_ctx(struct aha struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct caam_hash_state *state = ahash_request_ctx(req); struct device *jrdev = ctx->jrdev; @@ -20582,7 +22327,7 @@ Signed-off-by: Yangbo Lu u32 *desc; int sec4_sg_bytes, sec4_sg_src_index, src_nents, mapped_nents; int digestsize = crypto_ahash_digestsize(ahash); -@@ -1450,9 +1323,9 @@ static int ahash_finup_no_ctx(struct aha +@@ -1450,9 +1281,9 @@ static int ahash_finup_no_ctx(struct aha edesc->src_nents = src_nents; edesc->sec4_sg_bytes = sec4_sg_bytes; @@ -20595,7 +22340,7 @@ Signed-off-by: Yangbo Lu ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, 1, buflen, req->nbytes); -@@ -1496,11 +1369,10 @@ static int ahash_update_first(struct aha +@@ -1496,11 +1327,10 @@ static int ahash_update_first(struct aha struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); struct caam_hash_state *state = ahash_request_ctx(req); struct device *jrdev = ctx->jrdev; @@ -20611,7 +22356,15 @@ Signed-off-by: Yangbo Lu int to_hash; u32 *desc; int src_nents, mapped_nents; -@@ -1582,6 +1454,7 @@ static int ahash_update_first(struct aha +@@ -1545,7 +1375,6 @@ static int ahash_update_first(struct aha + } + + edesc->src_nents = src_nents; +- edesc->dst_dma = 0; + + ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, 0, 0, + to_hash); +@@ -1582,6 +1411,7 @@ static int ahash_update_first(struct aha state->final = ahash_final_no_ctx; scatterwalk_map_and_copy(next_buf, req->src, 0, req->nbytes, 0); @@ -20619,7 +22372,7 @@ Signed-off-by: Yangbo Lu } #ifdef DEBUG print_hex_dump(KERN_ERR, "next buf@"__stringify(__LINE__)": ", -@@ -1688,7 +1561,6 @@ struct caam_hash_template { +@@ -1688,7 +1518,6 @@ struct caam_hash_template { unsigned int blocksize; struct ahash_alg template_ahash; u32 alg_type; @@ -20627,7 +22380,7 @@ Signed-off-by: Yangbo Lu }; /* ahash descriptors */ -@@ -1714,7 +1586,6 @@ static struct caam_hash_template driver_ +@@ -1714,7 +1543,6 @@ static struct caam_hash_template driver_ }, }, .alg_type = OP_ALG_ALGSEL_SHA1, @@ -20635,7 +22388,7 @@ Signed-off-by: Yangbo Lu }, { .name = "sha224", .driver_name = "sha224-caam", -@@ -1736,7 +1607,6 @@ static struct caam_hash_template driver_ +@@ -1736,7 +1564,6 @@ static struct caam_hash_template driver_ }, }, .alg_type = OP_ALG_ALGSEL_SHA224, @@ -20643,7 +22396,7 @@ Signed-off-by: Yangbo Lu }, { .name = "sha256", .driver_name = "sha256-caam", -@@ -1758,7 +1628,6 @@ static struct caam_hash_template driver_ +@@ -1758,7 +1585,6 @@ static struct caam_hash_template driver_ }, }, .alg_type = OP_ALG_ALGSEL_SHA256, @@ -20651,7 +22404,7 @@ Signed-off-by: Yangbo Lu }, { .name = "sha384", .driver_name = "sha384-caam", -@@ -1780,7 +1649,6 @@ static struct caam_hash_template driver_ +@@ -1780,7 +1606,6 @@ static struct caam_hash_template driver_ }, }, .alg_type = OP_ALG_ALGSEL_SHA384, @@ -20659,7 +22412,7 @@ Signed-off-by: Yangbo Lu }, { .name = "sha512", .driver_name = "sha512-caam", -@@ -1802,7 +1670,6 @@ static struct caam_hash_template driver_ +@@ -1802,7 +1627,6 @@ static struct caam_hash_template driver_ }, }, .alg_type = OP_ALG_ALGSEL_SHA512, @@ -20667,7 +22420,7 @@ Signed-off-by: Yangbo Lu }, { .name = "md5", .driver_name = "md5-caam", -@@ -1824,14 +1691,12 @@ static struct caam_hash_template driver_ +@@ -1824,14 +1648,12 @@ static struct caam_hash_template driver_ }, }, .alg_type = OP_ALG_ALGSEL_MD5, @@ -20682,7 +22435,7 @@ Signed-off-by: Yangbo Lu struct ahash_alg ahash_alg; }; -@@ -1853,6 +1718,7 @@ static int caam_hash_cra_init(struct cry +@@ -1853,6 +1675,7 @@ static int caam_hash_cra_init(struct cry HASH_MSG_LEN + SHA256_DIGEST_SIZE, HASH_MSG_LEN + 64, HASH_MSG_LEN + SHA512_DIGEST_SIZE }; @@ -20690,7 +22443,7 @@ Signed-off-by: Yangbo Lu /* * Get a Job ring from Job Ring driver to ensure in-order -@@ -1863,11 +1729,31 @@ static int caam_hash_cra_init(struct cry +@@ -1863,11 +1686,31 @@ static int caam_hash_cra_init(struct cry pr_err("Job Ring Device allocation for transform failed\n"); return PTR_ERR(ctx->jrdev); } @@ -20725,7 +22478,7 @@ Signed-off-by: Yangbo Lu OP_ALG_ALGSEL_SHIFT]; crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), -@@ -1879,30 +1765,10 @@ static void caam_hash_cra_exit(struct cr +@@ -1879,30 +1722,10 @@ static void caam_hash_cra_exit(struct cr { struct caam_hash_ctx *ctx = crypto_tfm_ctx(tfm); @@ -20760,7 +22513,7 @@ Signed-off-by: Yangbo Lu caam_jr_free(ctx->jrdev); } -@@ -1961,7 +1827,6 @@ caam_hash_alloc(struct caam_hash_templat +@@ -1961,7 +1784,6 @@ caam_hash_alloc(struct caam_hash_templat alg->cra_type = &crypto_ahash_type; t_alg->alg_type = template->alg_type; @@ -20768,6 +22521,169 @@ Signed-off-by: Yangbo Lu return t_alg; } +--- /dev/null ++++ b/drivers/crypto/caam/caamhash_desc.c +@@ -0,0 +1,108 @@ ++/* ++ * Shared descriptors for ahash algorithms ++ * ++ * Copyright 2017 NXP ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the names of the above-listed copyright holders nor the ++ * names of any contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") as published by the Free Software ++ * Foundation, either version 2 of that License or (at your option) any ++ * later version. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++ * POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "compat.h" ++#include "desc_constr.h" ++#include "caamhash_desc.h" ++ ++/** ++ * cnstr_shdsc_ahash - ahash shared descriptor ++ * @desc: pointer to buffer used for descriptor construction ++ * @adata: pointer to authentication transform definitions. ++ * A split key is required for SEC Era < 6; the size of the split key ++ * is specified in this case. ++ * Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, SHA224, ++ * SHA256, SHA384, SHA512}. ++ * @state: algorithm state OP_ALG_AS_{INIT, FINALIZE, INITFINALIZE, UPDATE} ++ * @digestsize: algorithm's digest size ++ * @ctx_len: size of Context Register ++ * @import_ctx: true if previous Context Register needs to be restored ++ * must be true for ahash update and final ++ * must be false for for ahash first and digest ++ * @era: SEC Era ++ */ ++void cnstr_shdsc_ahash(u32 * const desc, struct alginfo *adata, u32 state, ++ int digestsize, int ctx_len, bool import_ctx, int era) ++{ ++ u32 op = adata->algtype; ++ ++ init_sh_desc(desc, HDR_SHARE_SERIAL); ++ ++ /* Append key if it has been set; ahash update excluded */ ++ if (state != OP_ALG_AS_UPDATE && adata->keylen) { ++ u32 *skip_key_load; ++ ++ /* Skip key loading if already shared */ ++ skip_key_load = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL | ++ JUMP_COND_SHRD); ++ ++ if (era < 6) ++ append_key_as_imm(desc, adata->key_virt, ++ adata->keylen_pad, ++ adata->keylen, CLASS_2 | ++ KEY_DEST_MDHA_SPLIT | KEY_ENC); ++ else ++ append_proto_dkp(desc, adata); ++ ++ set_jump_tgt_here(desc, skip_key_load); ++ ++ op |= OP_ALG_AAI_HMAC_PRECOMP; ++ } ++ ++ /* If needed, import context from software */ ++ if (import_ctx) ++ append_seq_load(desc, ctx_len, LDST_CLASS_2_CCB | ++ LDST_SRCDST_BYTE_CONTEXT); ++ ++ /* Class 2 operation */ ++ append_operation(desc, op | state | OP_ALG_ENCRYPT); ++ ++ /* ++ * Load from buf and/or src and write to req->result or state->context ++ * Calculate remaining bytes to read ++ */ ++ append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); ++ /* Read remaining bytes */ ++ append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_LAST2 | ++ FIFOLD_TYPE_MSG | KEY_VLF); ++ /* Store class2 context bytes */ ++ append_seq_store(desc, digestsize, LDST_CLASS_2_CCB | ++ LDST_SRCDST_BYTE_CONTEXT); ++} ++EXPORT_SYMBOL(cnstr_shdsc_ahash); ++ ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_DESCRIPTION("FSL CAAM ahash descriptors support"); ++MODULE_AUTHOR("NXP Semiconductors"); +--- /dev/null ++++ b/drivers/crypto/caam/caamhash_desc.h +@@ -0,0 +1,49 @@ ++/* ++ * Shared descriptors for ahash algorithms ++ * ++ * Copyright 2017 NXP ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions are met: ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * * Neither the names of the above-listed copyright holders nor the ++ * names of any contributors may be used to endorse or promote products ++ * derived from this software without specific prior written permission. ++ * ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") as published by the Free Software ++ * Foundation, either version 2 of that License or (at your option) any ++ * later version. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE ++ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++ * POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef _CAAMHASH_DESC_H_ ++#define _CAAMHASH_DESC_H_ ++ ++/* length of descriptors text */ ++#define DESC_AHASH_BASE (3 * CAAM_CMD_SZ) ++#define DESC_AHASH_UPDATE_LEN (6 * CAAM_CMD_SZ) ++#define DESC_AHASH_UPDATE_FIRST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ) ++#define DESC_AHASH_FINAL_LEN (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ) ++#define DESC_AHASH_DIGEST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ) ++ ++void cnstr_shdsc_ahash(u32 * const desc, struct alginfo *adata, u32 state, ++ int digestsize, int ctx_len, bool import_ctx, int era); ++ ++#endif /* _CAAMHASH_DESC_H_ */ --- a/drivers/crypto/caam/caampkc.c +++ b/drivers/crypto/caam/caampkc.c @@ -18,6 +18,10 @@ @@ -21546,7 +23462,7 @@ Signed-off-by: Yangbo Lu /* * Descriptor to instantiate RNG State Handle 0 in normal mode and -@@ -270,7 +271,7 @@ static int deinstantiate_rng(struct devi +@@ -274,7 +275,7 @@ static int deinstantiate_rng(struct devi /* * If the corresponding bit is set, then it means the state * handle was initialized by us, and thus it needs to be @@ -21555,7 +23471,7 @@ Signed-off-by: Yangbo Lu */ if ((1 << sh_idx) & state_handle_mask) { /* -@@ -303,20 +304,24 @@ static int caam_remove(struct platform_d +@@ -307,20 +308,24 @@ static int caam_remove(struct platform_d struct device *ctrldev; struct caam_drv_private *ctrlpriv; struct caam_ctrl __iomem *ctrl; @@ -21588,7 +23504,7 @@ Signed-off-by: Yangbo Lu deinstantiate_rng(ctrldev, ctrlpriv->rng4_sh_init); /* Shut down debug views */ -@@ -331,8 +336,8 @@ static int caam_remove(struct platform_d +@@ -335,8 +340,8 @@ static int caam_remove(struct platform_d clk_disable_unprepare(ctrlpriv->caam_ipg); clk_disable_unprepare(ctrlpriv->caam_mem); clk_disable_unprepare(ctrlpriv->caam_aclk); @@ -21599,7 +23515,7 @@ Signed-off-by: Yangbo Lu return 0; } -@@ -366,11 +371,8 @@ static void kick_trng(struct platform_de +@@ -370,11 +375,8 @@ static void kick_trng(struct platform_de */ val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK) >> RTSDCTL_ENT_DLY_SHIFT; @@ -21613,7 +23529,7 @@ Signed-off-by: Yangbo Lu val = rd_reg32(&r4tst->rtsdctl); val = (val & ~RTSDCTL_ENT_DLY_MASK) | -@@ -382,15 +384,12 @@ static void kick_trng(struct platform_de +@@ -386,15 +388,12 @@ static void kick_trng(struct platform_de wr_reg32(&r4tst->rtfrqmax, RTFRQMAX_DISABLE); /* read the control register */ val = rd_reg32(&r4tst->rtmctl); @@ -21632,7 +23548,7 @@ Signed-off-by: Yangbo Lu } /** -@@ -411,28 +410,26 @@ int caam_get_era(void) +@@ -415,28 +414,26 @@ int caam_get_era(void) } EXPORT_SYMBOL(caam_get_era); @@ -21676,7 +23592,7 @@ Signed-off-by: Yangbo Lu struct device *dev; struct device_node *nprop, *np; struct caam_ctrl __iomem *ctrl; -@@ -452,9 +449,10 @@ static int caam_probe(struct platform_de +@@ -456,9 +453,10 @@ static int caam_probe(struct platform_de dev = &pdev->dev; dev_set_drvdata(dev, ctrlpriv); @@ -21688,7 +23604,7 @@ Signed-off-by: Yangbo Lu /* Enable clocking */ clk = caam_drv_identify_clk(&pdev->dev, "ipg"); if (IS_ERR(clk)) { -@@ -483,14 +481,16 @@ static int caam_probe(struct platform_de +@@ -487,14 +485,16 @@ static int caam_probe(struct platform_de } ctrlpriv->caam_aclk = clk; @@ -21712,7 +23628,7 @@ Signed-off-by: Yangbo Lu ret = clk_prepare_enable(ctrlpriv->caam_ipg); if (ret < 0) { -@@ -511,11 +511,13 @@ static int caam_probe(struct platform_de +@@ -515,11 +515,13 @@ static int caam_probe(struct platform_de goto disable_caam_mem; } @@ -21731,7 +23647,7 @@ Signed-off-by: Yangbo Lu } /* Get configuration properties from device tree */ -@@ -542,13 +544,13 @@ static int caam_probe(struct platform_de +@@ -546,13 +548,13 @@ static int caam_probe(struct platform_de else BLOCK_OFFSET = PG_SIZE_64K; @@ -21750,7 +23666,7 @@ Signed-off-by: Yangbo Lu BLOCK_OFFSET * DECO_BLOCK_NUMBER ); -@@ -557,12 +559,17 @@ static int caam_probe(struct platform_de +@@ -561,12 +563,17 @@ static int caam_probe(struct platform_de /* * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel, @@ -21773,7 +23689,7 @@ Signed-off-by: Yangbo Lu /* * Read the Compile Time paramters and SCFGR to determine -@@ -590,64 +597,67 @@ static int caam_probe(struct platform_de +@@ -594,64 +601,69 @@ static int caam_probe(struct platform_de JRSTART_JR1_START | JRSTART_JR2_START | JRSTART_JR3_START); @@ -21789,7 +23705,15 @@ Signed-off-by: Yangbo Lu - dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36)); - else - dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); -- ++ ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36)); ++ } else { ++ ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); ++ } ++ if (ret) { ++ dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", ret); ++ goto iounmap_ctrl; ++ } + - /* - * Detect and enable JobRs - * First, find out how many ring spec'ed, allocate references @@ -21800,14 +23724,7 @@ Signed-off-by: Yangbo Lu - if (of_device_is_compatible(np, "fsl,sec-v4.0-job-ring") || - of_device_is_compatible(np, "fsl,sec4.0-job-ring")) - rspec++; -+ ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(36)); -+ } else { -+ ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); -+ } -+ if (ret) { -+ dev_err(dev, "dma_set_mask_and_coherent failed (%d)\n", ret); -+ goto iounmap_ctrl; -+ } ++ ctrlpriv->era = caam_get_era(); - ctrlpriv->jrpdev = devm_kcalloc(&pdev->dev, rspec, - sizeof(*ctrlpriv->jrpdev), GFP_KERNEL); @@ -21880,7 +23797,7 @@ Signed-off-by: Yangbo Lu } /* If no QI and no rings specified, quit and go home */ -@@ -662,8 +672,10 @@ static int caam_probe(struct platform_de +@@ -666,8 +678,10 @@ static int caam_probe(struct platform_de /* * If SEC has RNG version >= 4 and RNG state handle has not been * already instantiated, do RNG instantiation @@ -21892,12 +23809,14 @@ Signed-off-by: Yangbo Lu ctrlpriv->rng4_sh_init = rd_reg32(&ctrl->r4tst[0].rdsta); /* -@@ -731,77 +743,46 @@ static int caam_probe(struct platform_de +@@ -734,78 +748,47 @@ static int caam_probe(struct platform_de + /* Report "alive" for developer to see */ dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id, - caam_get_era()); +- caam_get_era()); - dev_info(dev, "job rings = %d, qi = %d\n", - ctrlpriv->total_jobrs, ctrlpriv->qi_present); ++ ctrlpriv->era); + dev_info(dev, "job rings = %d, qi = %d, dpaa2 = %s\n", + ctrlpriv->total_jobrs, ctrlpriv->qi_present, + caam_dpaa2 ? "yes" : "no"); @@ -22004,7 +23923,7 @@ Signed-off-by: Yangbo Lu ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32); ctrlpriv->ctl_kek = debugfs_create_blob("kek", S_IRUSR | -@@ -809,7 +790,7 @@ static int caam_probe(struct platform_de +@@ -813,7 +796,7 @@ static int caam_probe(struct platform_de ctrlpriv->ctl, &ctrlpriv->ctl_kek_wrap); @@ -22013,7 +23932,7 @@ Signed-off-by: Yangbo Lu ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32); ctrlpriv->ctl_tkek = debugfs_create_blob("tkek", S_IRUSR | -@@ -817,7 +798,7 @@ static int caam_probe(struct platform_de +@@ -821,7 +804,7 @@ static int caam_probe(struct platform_de ctrlpriv->ctl, &ctrlpriv->ctl_tkek_wrap); @@ -22022,7 +23941,7 @@ Signed-off-by: Yangbo Lu ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32); ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk", S_IRUSR | -@@ -828,13 +809,17 @@ static int caam_probe(struct platform_de +@@ -832,13 +815,17 @@ static int caam_probe(struct platform_de return 0; caam_remove: @@ -22041,7 +23960,7 @@ Signed-off-by: Yangbo Lu disable_caam_aclk: clk_disable_unprepare(ctrlpriv->caam_aclk); disable_caam_mem: -@@ -844,17 +829,6 @@ disable_caam_ipg: +@@ -848,17 +835,6 @@ disable_caam_ipg: return ret; } @@ -22148,7 +24067,49 @@ Signed-off-by: Yangbo Lu #define FIFOST_TYPE_SKIP (0x3f << FIFOST_TYPE_SHIFT) /* -@@ -1107,8 +1104,8 @@ struct sec4_sg_entry { +@@ -449,6 +446,18 @@ struct sec4_sg_entry { + #define OP_PCLID_DSAVERIFY (0x16 << OP_PCLID_SHIFT) + #define OP_PCLID_RSAENC_PUBKEY (0x18 << OP_PCLID_SHIFT) + #define OP_PCLID_RSADEC_PRVKEY (0x19 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_MD5 (0x20 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_SHA1 (0x21 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_SHA224 (0x22 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_SHA256 (0x23 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_SHA384 (0x24 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_SHA512 (0x25 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_RIF_MD5 (0x60 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_RIF_SHA1 (0x61 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_RIF_SHA224 (0x62 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_RIF_SHA256 (0x63 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_RIF_SHA384 (0x64 << OP_PCLID_SHIFT) ++#define OP_PCLID_DKP_RIF_SHA512 (0x65 << OP_PCLID_SHIFT) + + /* Assuming OP_TYPE = OP_TYPE_DECAP_PROTOCOL/ENCAP_PROTOCOL */ + #define OP_PCLID_IPSEC (0x01 << OP_PCLID_SHIFT) +@@ -1098,6 +1107,22 @@ struct sec4_sg_entry { + /* MacSec protinfos */ + #define OP_PCL_MACSEC 0x0001 + ++/* Derived Key Protocol (DKP) Protinfo */ ++#define OP_PCL_DKP_SRC_SHIFT 14 ++#define OP_PCL_DKP_SRC_MASK (3 << OP_PCL_DKP_SRC_SHIFT) ++#define OP_PCL_DKP_SRC_IMM (0 << OP_PCL_DKP_SRC_SHIFT) ++#define OP_PCL_DKP_SRC_SEQ (1 << OP_PCL_DKP_SRC_SHIFT) ++#define OP_PCL_DKP_SRC_PTR (2 << OP_PCL_DKP_SRC_SHIFT) ++#define OP_PCL_DKP_SRC_SGF (3 << OP_PCL_DKP_SRC_SHIFT) ++#define OP_PCL_DKP_DST_SHIFT 12 ++#define OP_PCL_DKP_DST_MASK (3 << OP_PCL_DKP_DST_SHIFT) ++#define OP_PCL_DKP_DST_IMM (0 << OP_PCL_DKP_DST_SHIFT) ++#define OP_PCL_DKP_DST_SEQ (1 << OP_PCL_DKP_DST_SHIFT) ++#define OP_PCL_DKP_DST_PTR (2 << OP_PCL_DKP_DST_SHIFT) ++#define OP_PCL_DKP_DST_SGF (3 << OP_PCL_DKP_DST_SHIFT) ++#define OP_PCL_DKP_KEY_SHIFT 0 ++#define OP_PCL_DKP_KEY_MASK (0xfff << OP_PCL_DKP_KEY_SHIFT) ++ + /* PKI unidirectional protocol protinfo bits */ + #define OP_PCL_PKPROT_TEST 0x0008 + #define OP_PCL_PKPROT_DECRYPT 0x0004 +@@ -1107,8 +1132,8 @@ struct sec4_sg_entry { /* For non-protocol/alg-only op commands */ #define OP_ALG_TYPE_SHIFT 24 #define OP_ALG_TYPE_MASK (0x7 << OP_ALG_TYPE_SHIFT) @@ -22159,7 +24120,7 @@ Signed-off-by: Yangbo Lu #define OP_ALG_ALGSEL_SHIFT 16 #define OP_ALG_ALGSEL_MASK (0xff << OP_ALG_ALGSEL_SHIFT) -@@ -1249,7 +1246,7 @@ struct sec4_sg_entry { +@@ -1249,7 +1274,7 @@ struct sec4_sg_entry { #define OP_ALG_PKMODE_MOD_PRIMALITY 0x00f /* PKHA mode copy-memory functions */ @@ -22168,7 +24129,7 @@ Signed-off-by: Yangbo Lu #define OP_ALG_PKMODE_SRC_REG_MASK (7 << OP_ALG_PKMODE_SRC_REG_SHIFT) #define OP_ALG_PKMODE_DST_REG_SHIFT 10 #define OP_ALG_PKMODE_DST_REG_MASK (7 << OP_ALG_PKMODE_DST_REG_SHIFT) -@@ -1445,10 +1442,11 @@ struct sec4_sg_entry { +@@ -1445,10 +1470,11 @@ struct sec4_sg_entry { #define MATH_SRC1_REG2 (0x02 << MATH_SRC1_SHIFT) #define MATH_SRC1_REG3 (0x03 << MATH_SRC1_SHIFT) #define MATH_SRC1_IMM (0x04 << MATH_SRC1_SHIFT) @@ -22181,7 +24142,15 @@ Signed-off-by: Yangbo Lu /* Destination selectors */ #define MATH_DEST_SHIFT 8 -@@ -1629,4 +1627,31 @@ struct sec4_sg_entry { +@@ -1457,6 +1483,7 @@ struct sec4_sg_entry { + #define MATH_DEST_REG1 (0x01 << MATH_DEST_SHIFT) + #define MATH_DEST_REG2 (0x02 << MATH_DEST_SHIFT) + #define MATH_DEST_REG3 (0x03 << MATH_DEST_SHIFT) ++#define MATH_DEST_DPOVRD (0x07 << MATH_DEST_SHIFT) + #define MATH_DEST_SEQINLEN (0x08 << MATH_DEST_SHIFT) + #define MATH_DEST_SEQOUTLEN (0x09 << MATH_DEST_SHIFT) + #define MATH_DEST_VARSEQINLEN (0x0a << MATH_DEST_SHIFT) +@@ -1629,4 +1656,31 @@ struct sec4_sg_entry { /* Frame Descriptor Command for Replacement Job Descriptor */ #define FD_CMD_REPLACE_JOB_DESC 0x20000000 @@ -22312,7 +24281,7 @@ Signed-off-by: Yangbo Lu } -static inline void append_data(u32 *desc, void *data, int len) -+static inline void append_data(u32 * const desc, void *data, int len) ++static inline void append_data(u32 * const desc, const void *data, int len) { u32 *offset = desc_end(desc); @@ -22365,7 +24334,7 @@ Signed-off-by: Yangbo Lu } -static inline void append_cmd_data(u32 *desc, void *data, int len, -+static inline void append_cmd_data(u32 * const desc, void *data, int len, ++static inline void append_cmd_data(u32 * const desc, const void *data, int len, u32 command) { append_cmd(desc, command | IMMEDIATE | len); @@ -22452,7 +24421,7 @@ Signed-off-by: Yangbo Lu #define APPEND_CMD_PTR_TO_IMM(cmd, op) \ -static inline void append_##cmd##_as_imm(u32 *desc, void *data, \ -+static inline void append_##cmd##_as_imm(u32 * const desc, void *data, \ ++static inline void append_##cmd##_as_imm(u32 * const desc, const void *data, \ unsigned int len, u32 options) \ { \ PRINT_POS; \ @@ -22479,7 +24448,7 @@ Signed-off-by: Yangbo Lu */ #define APPEND_CMD_PTR_TO_IMM2(cmd, op) \ -static inline void append_##cmd##_as_imm(u32 *desc, void *data, \ -+static inline void append_##cmd##_as_imm(u32 * const desc, void *data, \ ++static inline void append_##cmd##_as_imm(u32 * const desc, const void *data, \ unsigned int data_len, \ unsigned int len, u32 options) \ { \ @@ -22492,7 +24461,7 @@ Signed-off-by: Yangbo Lu u32 options) \ { \ PRINT_POS; \ -@@ -426,3 +434,66 @@ do { \ +@@ -426,3 +434,107 @@ do { \ APPEND_MATH_IMM_u64(LSHIFT, desc, dest, src0, src1, data) #define append_math_rshift_imm_u64(desc, dest, src0, src1, data) \ APPEND_MATH_IMM_u64(RSHIFT, desc, dest, src0, src1, data) @@ -22514,7 +24483,7 @@ Signed-off-by: Yangbo Lu + unsigned int keylen_pad; + union { + dma_addr_t key_dma; -+ void *key_virt; ++ const void *key_virt; + }; + bool key_inline; +}; @@ -22558,6 +24527,47 @@ Signed-off-by: Yangbo Lu + return (rem_bytes >= 0) ? 0 : -1; +} + ++/** ++ * append_proto_dkp - Derived Key Protocol (DKP): key -> split key ++ * @desc: pointer to buffer used for descriptor construction ++ * @adata: pointer to authentication transform definitions. ++ * keylen should be the length of initial key, while keylen_pad ++ * the length of the derived (split) key. ++ * Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, SHA224, ++ * SHA256, SHA384, SHA512}. ++ */ ++static inline void append_proto_dkp(u32 * const desc, struct alginfo *adata) ++{ ++ u32 protid; ++ ++ /* ++ * Quick & dirty translation from OP_ALG_ALGSEL_{MD5, SHA*} ++ * to OP_PCLID_DKP_{MD5, SHA*} ++ */ ++ protid = (adata->algtype & OP_ALG_ALGSEL_SUBMASK) | ++ (0x20 << OP_ALG_ALGSEL_SHIFT); ++ ++ if (adata->key_inline) { ++ int words; ++ ++ append_operation(desc, OP_TYPE_UNI_PROTOCOL | protid | ++ OP_PCL_DKP_SRC_IMM | OP_PCL_DKP_DST_IMM | ++ adata->keylen); ++ append_data(desc, adata->key_virt, adata->keylen); ++ ++ /* Reserve space in descriptor buffer for the derived key */ ++ words = (ALIGN(adata->keylen_pad, CAAM_CMD_SZ) - ++ ALIGN(adata->keylen, CAAM_CMD_SZ)) / CAAM_CMD_SZ; ++ if (words) ++ (*desc) = cpu_to_caam32(caam32_to_cpu(*desc) + words); ++ } else { ++ append_operation(desc, OP_TYPE_UNI_PROTOCOL | protid | ++ OP_PCL_DKP_SRC_PTR | OP_PCL_DKP_DST_PTR | ++ adata->keylen); ++ append_ptr(desc, adata->key_dma); ++ } ++} ++ +#endif /* DESC_CONSTR_H */ --- /dev/null +++ b/drivers/crypto/caam/dpseci.c @@ -24295,7 +26305,15 @@ Signed-off-by: Yangbo Lu /* Physical-presence section */ struct caam_ctrl __iomem *ctrl; /* controller region */ -@@ -103,11 +102,6 @@ struct caam_drv_private { +@@ -84,6 +83,7 @@ struct caam_drv_private { + u8 qi_present; /* Nonzero if QI present in device */ + int secvio_irq; /* Security violation interrupt number */ + int virt_en; /* Virtualization enabled in CAAM */ ++ int era; /* CAAM Era (internal HW revision) */ + + #define RNG4_MAX_HANDLES 2 + /* RNG4 block */ +@@ -103,11 +103,6 @@ struct caam_drv_private { #ifdef CONFIG_DEBUG_FS struct dentry *dfs_root; struct dentry *ctl; /* controller dir */ @@ -24307,7 +26325,7 @@ Signed-off-by: Yangbo Lu struct debugfs_blob_wrapper ctl_kek_wrap, ctl_tkek_wrap, ctl_tdsk_wrap; struct dentry *ctl_kek, *ctl_tkek, *ctl_tdsk; #endif -@@ -115,4 +109,22 @@ struct caam_drv_private { +@@ -115,4 +110,22 @@ struct caam_drv_private { void caam_jr_algapi_init(struct device *dev); void caam_jr_algapi_remove(struct device *dev); @@ -24829,7 +26847,7 @@ Signed-off-by: Yangbo Lu + + fd.cmd = 0; + fd.format = qm_fd_compound; -+ fd.cong_weight = req->fd_sgt[1].length; ++ fd.cong_weight = caam32_to_cpu(req->fd_sgt[1].length); + fd.addr = dma_map_single(qidev, req->fd_sgt, sizeof(req->fd_sgt), + DMA_BIDIRECTIONAL); + if (dma_mapping_error(qidev, fd.addr)) { diff --git a/target/linux/layerscape/patches-4.9/805-dma-support-layerscape.patch b/target/linux/layerscape/patches-4.9/805-dma-support-layerscape.patch index 94f0a3444..0eeeb9d77 100644 --- a/target/linux/layerscape/patches-4.9/805-dma-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/805-dma-support-layerscape.patch @@ -1,25 +1,25 @@ -From 854c1f0e9574e9b25a55b439608c71e013b34a56 Mon Sep 17 00:00:00 2001 +From 515d590e3d5313110faa4f2c86f7784d9b070fa9 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:12:20 +0800 -Subject: [PATCH] dma: support layerscape +Date: Wed, 17 Jan 2018 15:30:59 +0800 +Subject: [PATCH 17/30] dma: support layerscape -This is a integrated patch for layerscape dma support. +This is an integrated patch for layerscape dma support. Signed-off-by: jiaheng.fan Signed-off-by: Yangbo Lu --- drivers/dma/Kconfig | 31 + drivers/dma/Makefile | 3 + - drivers/dma/caam_dma.c | 563 +++++++++++++++ + drivers/dma/caam_dma.c | 563 ++++++++++++++ drivers/dma/dpaa2-qdma/Kconfig | 8 + drivers/dma/dpaa2-qdma/Makefile | 8 + - drivers/dma/dpaa2-qdma/dpaa2-qdma.c | 986 +++++++++++++++++++++++++ + drivers/dma/dpaa2-qdma/dpaa2-qdma.c | 986 ++++++++++++++++++++++++ drivers/dma/dpaa2-qdma/dpaa2-qdma.h | 262 +++++++ - drivers/dma/dpaa2-qdma/dpdmai.c | 454 ++++++++++++ - drivers/dma/dpaa2-qdma/fsl_dpdmai.h | 521 ++++++++++++++ + drivers/dma/dpaa2-qdma/dpdmai.c | 454 +++++++++++ + drivers/dma/dpaa2-qdma/fsl_dpdmai.h | 521 +++++++++++++ drivers/dma/dpaa2-qdma/fsl_dpdmai_cmd.h | 222 ++++++ - drivers/dma/fsl-qdma.c | 1201 +++++++++++++++++++++++++++++++ - 11 files changed, 4259 insertions(+) + drivers/dma/fsl-qdma.c | 1243 +++++++++++++++++++++++++++++++ + 11 files changed, 4301 insertions(+) create mode 100644 drivers/dma/caam_dma.c create mode 100644 drivers/dma/dpaa2-qdma/Kconfig create mode 100644 drivers/dma/dpaa2-qdma/Makefile @@ -3146,7 +3146,7 @@ Signed-off-by: Yangbo Lu +#endif /* _FSL_DPDMAI_CMD_H */ --- /dev/null +++ b/drivers/dma/fsl-qdma.c -@@ -0,0 +1,1201 @@ +@@ -0,0 +1,1243 @@ +/* + * drivers/dma/fsl-qdma.c + * @@ -3268,67 +3268,111 @@ Signed-off-by: Yangbo Lu + +u64 pre_addr, pre_queue; + ++/* qDMA Command Descriptor Fotmats */ ++ ++/* Compound Command Descriptor Fotmat */ +struct fsl_qdma_ccdf { -+ u8 status; -+ u32 rev1:22; -+ u32 ser:1; -+ u32 rev2:1; -+ u32 rev3:20; -+ u32 offset:9; -+ u32 format:3; ++ __le32 status; /* ser, status */ ++ __le32 cfg; /* format, offset */ + union { + struct { -+ u32 addr_lo; /* low 32-bits of 40-bit address */ -+ u32 addr_hi:8; /* high 8-bits of 40-bit address */ -+ u32 rev4:16; -+ u32 queue:3; -+ u32 rev5:3; -+ u32 dd:2; /* dynamic debug */ -+ }; -+ struct { -+ u64 addr:40; -+ /* More efficient address accessor */ -+ u64 __notaddress:24; -+ }; ++ __le32 addr_lo; /* low 32-bits of 40-bit address */ ++ u8 addr_hi; /* high 8-bits of 40-bit address */ ++ u8 __reserved1[2]; ++ u8 cfg8b_w1; /* dd, queue*/ ++ } __packed; ++ __le64 data; + }; +} __packed; + ++#define QDMA_CCDF_STATUS 20 ++#define QDMA_CCDF_OFFSET 20 ++#define QDMA_CCDF_MASK GENMASK(28, 20) ++#define QDMA_CCDF_FOTMAT BIT(29) ++#define QDMA_CCDF_SER BIT(30) ++ ++static inline u64 qdma_ccdf_addr_get64(const struct fsl_qdma_ccdf *ccdf) ++{ ++ return le64_to_cpu(ccdf->data) & 0xffffffffffLLU; ++} ++static inline u64 qdma_ccdf_get_queue(const struct fsl_qdma_ccdf *ccdf) ++{ ++ return ccdf->cfg8b_w1 & 0xff; ++} ++static inline void qdma_ccdf_addr_set64(struct fsl_qdma_ccdf *ccdf, u64 addr) ++{ ++ ccdf->addr_hi = upper_32_bits(addr); ++ ccdf->addr_lo = cpu_to_le32(lower_32_bits(addr)); ++} ++static inline int qdma_ccdf_get_offset(const struct fsl_qdma_ccdf *ccdf) ++{ ++ return (le32_to_cpu(ccdf->cfg) & QDMA_CCDF_MASK) >> QDMA_CCDF_OFFSET; ++} ++static inline void qdma_ccdf_set_format(struct fsl_qdma_ccdf *ccdf, int offset) ++{ ++ ccdf->cfg = cpu_to_le32(QDMA_CCDF_FOTMAT | offset); ++} ++static inline int qdma_ccdf_get_status(const struct fsl_qdma_ccdf *ccdf) ++{ ++ return (le32_to_cpu(ccdf->status) & QDMA_CCDF_MASK) >> QDMA_CCDF_STATUS; ++} ++static inline void qdma_ccdf_set_ser(struct fsl_qdma_ccdf *ccdf, int status) ++{ ++ ccdf->status = cpu_to_le32(QDMA_CCDF_SER | status); ++} ++/* qDMA Compound S/G Format */ +struct fsl_qdma_csgf { -+ u32 offset:13; -+ u32 rev1:19; -+ u32 length:30; -+ u32 f:1; -+ u32 e:1; ++ __le32 offset; /* offset */ ++ __le32 cfg; /* E bit, F bit, length */ + union { + struct { -+ u32 addr_lo; /* low 32-bits of 40-bit address */ -+ u32 addr_hi:8; /* high 8-bits of 40-bit address */ -+ u32 rev2:24; -+ }; -+ struct { -+ u64 addr:40; -+ /* More efficient address accessor */ -+ u64 __notaddress:24; ++ __le32 addr_lo; /* low 32-bits of 40-bit address */ ++ u8 addr_hi; /* high 8-bits of 40-bit address */ ++ u8 __reserved1[3]; + }; ++ __le64 data; + }; +} __packed; + ++#define QDMA_SG_FIN BIT(30) ++#define QDMA_SG_EXT BIT(31) ++#define QDMA_SG_LEN_MASK GENMASK(29, 0) ++static inline u64 qdma_csgf_addr_get64(const struct fsl_qdma_csgf *sg) ++{ ++ return be64_to_cpu(sg->data) & 0xffffffffffLLU; ++} ++static inline void qdma_csgf_addr_set64(struct fsl_qdma_csgf *sg, u64 addr) ++{ ++ sg->addr_hi = upper_32_bits(addr); ++ sg->addr_lo = cpu_to_le32(lower_32_bits(addr)); ++} ++static inline void qdma_csgf_set_len(struct fsl_qdma_csgf *csgf, int len) ++{ ++ csgf->cfg = cpu_to_le32(len & QDMA_SG_LEN_MASK); ++} ++static inline void qdma_csgf_set_f(struct fsl_qdma_csgf *csgf, int len) ++{ ++ csgf->cfg = cpu_to_le32(QDMA_SG_FIN | (len & QDMA_SG_LEN_MASK)); ++} ++static inline void qdma_csgf_set_e(struct fsl_qdma_csgf *csgf, int len) ++{ ++ csgf->cfg = cpu_to_le32(QDMA_SG_EXT | (len & QDMA_SG_LEN_MASK)); ++} ++ ++/* qDMA Source Descriptor Format */ +struct fsl_qdma_sdf { -+ u32 rev3:32; -+ u32 ssd:12; /* souce stride distance */ -+ u32 sss:12; /* souce stride size */ -+ u32 rev4:8; -+ u32 rev5:32; -+ u32 cmd; ++ __le32 rev3; ++ __le32 cfg; /* rev4, bit[0-11] - ssd, bit[12-23] sss */ ++ __le32 rev5; ++ __le32 cmd; +} __packed; + ++/*qDMA Destination Descriptor Format*/ +struct fsl_qdma_ddf { -+ u32 rev1:32; -+ u32 dsd:12; /* Destination stride distance */ -+ u32 dss:12; /* Destination stride size */ -+ u32 rev2:8; -+ u32 rev3:32; -+ u32 cmd; ++ __le32 rev1; ++ __le32 cfg; /* rev2, bit[0-11] - dsd, bit[12-23] - dss */ ++ __le32 rev3; ++ __le32 cmd; +} __packed; + +struct fsl_qdma_chan { @@ -3453,24 +3497,27 @@ Signed-off-by: Yangbo Lu + + memset(fsl_comp->virt_addr, 0, FSL_QDMA_BASE_BUFFER_SIZE); + /* Head Command Descriptor(Frame Descriptor) */ -+ ccdf->addr = fsl_comp->bus_addr + 16; -+ ccdf->format = 1; /* Compound S/G format */ ++ qdma_ccdf_addr_set64(ccdf, fsl_comp->bus_addr + 16); ++ qdma_ccdf_set_format(ccdf, qdma_ccdf_get_offset(ccdf)); ++ qdma_ccdf_set_ser(ccdf, qdma_ccdf_get_status(ccdf)); + /* Status notification is enqueued to status queue. */ -+ ccdf->ser = 1; + /* Compound Command Descriptor(Frame List Table) */ -+ csgf_desc->addr = fsl_comp->bus_addr + 64; ++ qdma_csgf_addr_set64(csgf_desc, fsl_comp->bus_addr + 64); + /* It must be 32 as Compound S/G Descriptor */ -+ csgf_desc->length = 32; -+ csgf_src->addr = src; -+ csgf_src->length = len; -+ csgf_dest->addr = dst; -+ csgf_dest->length = len; ++ qdma_csgf_set_len(csgf_desc, 32); ++ qdma_csgf_addr_set64(csgf_src, src); ++ qdma_csgf_set_len(csgf_src, len); ++ qdma_csgf_addr_set64(csgf_dest, dst); ++ qdma_csgf_set_len(csgf_dest, len); + /* This entry is the last entry. */ -+ csgf_dest->f = FSL_QDMA_F_LAST_ENTRY; ++ qdma_csgf_set_f(csgf_dest, len); + /* Descriptor Buffer */ -+ sdf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET; -+ ddf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET; -+ ddf->cmd |= FSL_QDMA_CMD_LWC << FSL_QDMA_CMD_LWC_OFFSET; ++ sdf->cmd = cpu_to_le32( ++ FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET); ++ ddf->cmd = cpu_to_le32( ++ FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET); ++ ddf->cmd |= cpu_to_le32( ++ FSL_QDMA_CMD_LWC << FSL_QDMA_CMD_LWC_OFFSET); +} + +static void fsl_qdma_comp_fill_sg( @@ -3494,49 +3541,48 @@ Signed-off-by: Yangbo Lu + csgf_dest = (struct fsl_qdma_csgf *)fsl_comp->virt_addr + 3; + sdf = (struct fsl_qdma_sdf *)fsl_comp->virt_addr + 4; + ddf = (struct fsl_qdma_ddf *)fsl_comp->virt_addr + 5; -+ + memset(fsl_comp->virt_addr, 0, FSL_QDMA_BASE_BUFFER_SIZE); + /* Head Command Descriptor(Frame Descriptor) */ -+ ccdf->addr = fsl_comp->bus_addr + 16; -+ ccdf->format = 1; /* Compound S/G format */ ++ qdma_ccdf_addr_set64(ccdf, fsl_comp->bus_addr + 16); ++ qdma_ccdf_set_format(ccdf, qdma_ccdf_get_offset(ccdf)); + /* Status notification is enqueued to status queue. */ -+ ccdf->ser = 1; ++ qdma_ccdf_set_ser(ccdf, qdma_ccdf_get_status(ccdf)); + + /* Compound Command Descriptor(Frame List Table) */ -+ csgf_desc->addr = fsl_comp->bus_addr + 64; ++ qdma_csgf_addr_set64(csgf_desc, fsl_comp->bus_addr + 64); + /* It must be 32 as Compound S/G Descriptor */ -+ csgf_desc->length = 32; ++ qdma_csgf_set_len(csgf_desc, 32); + + sg_block = fsl_comp->sg_block; -+ csgf_src->addr = sg_block->bus_addr; ++ qdma_csgf_addr_set64(csgf_src, sg_block->bus_addr); + /* This entry link to the s/g entry. */ -+ csgf_src->e = FSL_QDMA_E_SG_TABLE; ++ qdma_csgf_set_e(csgf_src, 32); + + temp = sg_block + fsl_comp->sg_block_src; -+ csgf_dest->addr = temp->bus_addr; ++ qdma_csgf_addr_set64(csgf_dest, temp->bus_addr); + /* This entry is the last entry. */ -+ csgf_dest->f = FSL_QDMA_F_LAST_ENTRY; ++ qdma_csgf_set_f(csgf_dest, 32); + /* This entry link to the s/g entry. */ -+ csgf_dest->e = FSL_QDMA_E_SG_TABLE; ++ qdma_csgf_set_e(csgf_dest, 32); + + for_each_sg(src_sg, sg, src_nents, i) { + temp = sg_block + i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1); + csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr + + i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1); -+ csgf_sg->addr = sg_dma_address(sg); -+ csgf_sg->length = sg_dma_len(sg); ++ qdma_csgf_addr_set64(csgf_sg, sg_dma_address(sg)); ++ qdma_csgf_set_len(csgf_sg, sg_dma_len(sg)); + total_src_len += sg_dma_len(sg); + + if (i == src_nents - 1) -+ csgf_sg->f = FSL_QDMA_F_LAST_ENTRY; ++ qdma_csgf_set_f(csgf_sg, sg_dma_len(sg)); + if (i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) == + FSL_QDMA_EXPECT_SG_ENTRY_NUM - 2) { + csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr + + FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1; + temp = sg_block + + i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) + 1; -+ csgf_sg->addr = temp->bus_addr; -+ csgf_sg->e = FSL_QDMA_E_SG_TABLE; ++ qdma_csgf_addr_set64(csgf_sg, temp->bus_addr); ++ qdma_csgf_set_e(csgf_sg, sg_dma_len(sg)); + } + } + @@ -3545,20 +3591,20 @@ Signed-off-by: Yangbo Lu + temp = sg_block + i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1); + csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr + + i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1); -+ csgf_sg->addr = sg_dma_address(sg); -+ csgf_sg->length = sg_dma_len(sg); ++ qdma_csgf_addr_set64(csgf_sg, sg_dma_address(sg)); ++ qdma_csgf_set_len(csgf_sg, sg_dma_len(sg)); + total_dst_len += sg_dma_len(sg); + + if (i == dst_nents - 1) -+ csgf_sg->f = FSL_QDMA_F_LAST_ENTRY; ++ qdma_csgf_set_f(csgf_sg, sg_dma_len(sg)); + if (i % (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) == + FSL_QDMA_EXPECT_SG_ENTRY_NUM - 2) { + csgf_sg = (struct fsl_qdma_csgf *)temp->virt_addr + + FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1; + temp = sg_block + + i / (FSL_QDMA_EXPECT_SG_ENTRY_NUM - 1) + 1; -+ csgf_sg->addr = temp->bus_addr; -+ csgf_sg->e = FSL_QDMA_E_SG_TABLE; ++ qdma_csgf_addr_set64(csgf_sg, temp->bus_addr); ++ qdma_csgf_set_e(csgf_sg, sg_dma_len(sg)); + } + } + @@ -3566,12 +3612,10 @@ Signed-off-by: Yangbo Lu + dev_err(&fsl_comp->qchan->vchan.chan.dev->device, + "The data length for src and dst isn't match.\n"); + -+ csgf_src->length = total_src_len; -+ csgf_dest->length = total_dst_len; ++ qdma_csgf_set_len(csgf_src, total_src_len); ++ qdma_csgf_set_len(csgf_dest, total_dst_len); + + /* Descriptor Buffer */ -+ sdf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET; -+ ddf->cmd = FSL_QDMA_CMD_RWTTYPE << FSL_QDMA_CMD_RWTTYPE_OFFSET; +} + +/* @@ -3843,13 +3887,12 @@ Signed-off-by: Yangbo Lu + if (reg & FSL_QDMA_BSQSR_QE) + return 0; + status_addr = fsl_status->virt_head; -+ if (status_addr->queue == pre_queue && -+ status_addr->addr == pre_addr) ++ if (qdma_ccdf_get_queue(status_addr) == pre_queue && ++ qdma_ccdf_addr_get64(status_addr) == pre_addr) + duplicate = 1; -+ -+ i = status_addr->queue; -+ pre_queue = status_addr->queue; -+ pre_addr = status_addr->addr; ++ i = qdma_ccdf_get_queue(status_addr); ++ pre_queue = qdma_ccdf_get_queue(status_addr); ++ pre_addr = qdma_ccdf_addr_get64(status_addr); + temp_queue = fsl_queue + i; + spin_lock(&temp_queue->queue_lock); + if (list_empty(&temp_queue->comp_used)) { @@ -3865,8 +3908,7 @@ Signed-off-by: Yangbo Lu + list); + csgf_src = (struct fsl_qdma_csgf *)fsl_comp->virt_addr + + 2; -+ if (fsl_comp->bus_addr + 16 != -+ (dma_addr_t)status_addr->addr) { ++ if (fsl_comp->bus_addr + 16 != pre_addr) { + if (duplicate) + duplicate_handle = 1; + else { @@ -3879,7 +3921,7 @@ Signed-off-by: Yangbo Lu + if (duplicate_handle) { + reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQMR); + reg |= FSL_QDMA_BSQMR_DI; -+ status_addr->addr = 0x0; ++ qdma_ccdf_addr_set64(status_addr, 0x0); + fsl_status->virt_head++; + if (fsl_status->virt_head == fsl_status->cq + + fsl_status->n_cq) @@ -3892,7 +3934,7 @@ Signed-off-by: Yangbo Lu + + reg = qdma_readl(fsl_qdma, block + FSL_QDMA_BSQMR); + reg |= FSL_QDMA_BSQMR_DI; -+ status_addr->addr = 0x0; ++ qdma_ccdf_addr_set64(status_addr, 0x0); + fsl_status->virt_head++; + if (fsl_status->virt_head == fsl_status->cq + fsl_status->n_cq) + fsl_status->virt_head = fsl_status->cq; diff --git a/target/linux/layerscape/patches-4.9/806-flextimer-support-layerscape.patch b/target/linux/layerscape/patches-4.9/806-flextimer-support-layerscape.patch index 7ead7b6ec..9826d822e 100644 --- a/target/linux/layerscape/patches-4.9/806-flextimer-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/806-flextimer-support-layerscape.patch @@ -1,9 +1,9 @@ -From 76cd2ef6b69b67c09480a3248f7b910897f0bb2f Mon Sep 17 00:00:00 2001 +From b92e223750a07b28f175eae97d5ce3978df41be8 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:13:12 +0800 -Subject: [PATCH] flextimer: support layerscape +Date: Wed, 17 Jan 2018 15:32:05 +0800 +Subject: [PATCH 18/30] flextimer: support layerscape -This is a integrated patch for layerscape flextimer support. +This is an integrated patch for layerscape flextimer support. Signed-off-by: Wang Dongsheng Signed-off-by: Meng Yi diff --git a/target/linux/layerscape/patches-4.9/807-gpu-support-layerscape.patch b/target/linux/layerscape/patches-4.9/807-gpu-support-layerscape.patch index cd99f9492..5aea9ea73 100644 --- a/target/linux/layerscape/patches-4.9/807-gpu-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/807-gpu-support-layerscape.patch @@ -1,15 +1,15 @@ -From 4278a546526094dd57bfa3cf7ae2bf34092246db Mon Sep 17 00:00:00 2001 +From 177f92a14d8177124f37db0fafc11182e2dcdd62 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:10:01 +0800 -Subject: [PATCH] gpu: support layerscape +Date: Wed, 17 Jan 2018 15:33:05 +0800 +Subject: [PATCH 19/30] gpu: support layerscape -This is a integrated patch for layerscape dcu support. +This is an integrated patch for layerscape dcu support. Signed-off-by: Alison Wang Signed-off-by: Yangbo Lu --- - drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 18 ++++++++++++++++-- - 1 file changed, 16 insertions(+), 2 deletions(-) + drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c diff --git a/target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch b/target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch index ffda8a6cf..0999832a1 100644 --- a/target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/808-guts-support-layerscape.patch @@ -1,51 +1,20 @@ -From d51e307e4ecf51832c9e3bc30acb5dbd559d5f4d Mon Sep 17 00:00:00 2001 +From 45b0e1589b25ea3106a8c8d18bf653fde95baa9f Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:19:34 +0800 -Subject: [PATCH] guts: support layerscape +Date: Wed, 17 Jan 2018 15:34:22 +0800 +Subject: [PATCH 20/30] guts: support layerscape -This is a integrated patch for layerscape guts support. +This is an integrated patch for layerscape guts support. Signed-off-by: Roy Pledge Signed-off-by: Geert Uytterhoeven Signed-off-by: Amrita Kumari Signed-off-by: Yangbo Lu --- - drivers/base/soc.c | 12 ++- drivers/soc/fsl/guts.c | 238 +++++++++++++++++++++++++++++++++++++++++++++++ include/linux/fsl/guts.h | 125 +++++++++++++++---------- - 3 files changed, 323 insertions(+), 52 deletions(-) + 2 files changed, 315 insertions(+), 48 deletions(-) create mode 100644 drivers/soc/fsl/guts.c ---- a/drivers/base/soc.c -+++ b/drivers/base/soc.c -@@ -167,19 +167,23 @@ static int soc_device_match_one(struct d - const struct soc_device_attribute *match = arg; - - if (match->machine && -- !glob_match(match->machine, soc_dev->attr->machine)) -+ (!soc_dev->attr->machine || -+ !glob_match(match->machine, soc_dev->attr->machine))) - return 0; - - if (match->family && -- !glob_match(match->family, soc_dev->attr->family)) -+ (!soc_dev->attr->family || -+ !glob_match(match->family, soc_dev->attr->family))) - return 0; - - if (match->revision && -- !glob_match(match->revision, soc_dev->attr->revision)) -+ (!soc_dev->attr->revision || -+ !glob_match(match->revision, soc_dev->attr->revision))) - return 0; - - if (match->soc_id && -- !glob_match(match->soc_id, soc_dev->attr->soc_id)) -+ (!soc_dev->attr->soc_id || -+ !glob_match(match->soc_id, soc_dev->attr->soc_id))) - return 0; - - return 1; --- /dev/null +++ b/drivers/soc/fsl/guts.c @@ -0,0 +1,238 @@ diff --git a/target/linux/layerscape/patches-4.9/809-i2c-support-layerscape.patch b/target/linux/layerscape/patches-4.9/809-i2c-support-layerscape.patch index edb61b5c7..0b5f5837f 100644 --- a/target/linux/layerscape/patches-4.9/809-i2c-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/809-i2c-support-layerscape.patch @@ -1,21 +1,180 @@ -From 3c5032fe34f1af50e9e5fe58d40bf93c1717302f Mon Sep 17 00:00:00 2001 +From 659aa30c59fb188b533a7edcb9bd38ac007a2739 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:19:53 +0800 -Subject: [PATCH] i2c: support layerscape +Date: Wed, 17 Jan 2018 15:35:11 +0800 +Subject: [PATCH 21/30] i2c: support layerscape -This is a integrated patch for layerscape i2c support. +This is an integrated patch for layerscape i2c support. Signed-off-by: Zhang Ying-22455 Signed-off-by: Priyanka Jain Signed-off-by: Yangbo Lu --- - drivers/i2c/busses/i2c-imx.c | 10 ++++++++- - drivers/i2c/muxes/i2c-mux-pca954x.c | 43 +++++++++++++++++++++++++++++++++++++ - 2 files changed, 52 insertions(+), 1 deletion(-) + drivers/i2c/busses/i2c-imx.c | 195 +++++++++++++++++++++++++++++++++++- + drivers/i2c/muxes/i2c-mux-pca954x.c | 43 ++++++++ + 2 files changed, 237 insertions(+), 1 deletion(-) --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c -@@ -889,6 +889,14 @@ static int i2c_imx_xfer(struct i2c_adapt +@@ -53,6 +53,11 @@ + #include + #include + #include ++#include ++#include ++#include ++#include ++#include + + /* This will be the driver name the kernel reports */ + #define DRIVER_NAME "imx-i2c" +@@ -117,6 +122,54 @@ + + #define I2C_PM_TIMEOUT 10 /* ms */ + ++enum pinmux_endian_type { ++ BIG_ENDIAN, ++ LITTLE_ENDIAN, ++}; ++ ++struct pinmux_cfg { ++ enum pinmux_endian_type endian; /* endian of RCWPMUXCR0 */ ++ u32 pmuxcr_offset; ++ u32 pmuxcr_set_bit; /* pin mux of RCWPMUXCR0 */ ++}; ++ ++static struct pinmux_cfg ls1012a_pinmux_cfg = { ++ .endian = BIG_ENDIAN, ++ .pmuxcr_offset = 0x430, ++ .pmuxcr_set_bit = 0x10, ++}; ++ ++static struct pinmux_cfg ls1043a_pinmux_cfg = { ++ .endian = BIG_ENDIAN, ++ .pmuxcr_offset = 0x40C, ++ .pmuxcr_set_bit = 0x10, ++}; ++ ++static struct pinmux_cfg ls1046a_pinmux_cfg = { ++ .endian = BIG_ENDIAN, ++ .pmuxcr_offset = 0x40C, ++ .pmuxcr_set_bit = 0x80000000, ++}; ++ ++static const struct of_device_id pinmux_of_match[] = { ++ { .compatible = "fsl,ls1012a-vf610-i2c", .data = &ls1012a_pinmux_cfg}, ++ { .compatible = "fsl,ls1043a-vf610-i2c", .data = &ls1043a_pinmux_cfg}, ++ { .compatible = "fsl,ls1046a-vf610-i2c", .data = &ls1046a_pinmux_cfg}, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, pinmux_of_match); ++ ++/* The SCFG, Supplemental Configuration Unit, provides SoC specific ++ * configuration and status registers for the device. There is a ++ * SDHC IO VSEL control register on SCFG for some platforms. It's ++ * used to support SDHC IO voltage switching. ++ */ ++static const struct of_device_id scfg_device_ids[] = { ++ { .compatible = "fsl,ls1012a-scfg", }, ++ { .compatible = "fsl,ls1043a-scfg", }, ++ { .compatible = "fsl,ls1046a-scfg", }, ++ {} ++}; + /* + * sorted list of clock divider, register value pairs + * taken from table 26-5, p.26-9, Freescale i.MX +@@ -210,6 +263,12 @@ struct imx_i2c_struct { + struct pinctrl_state *pinctrl_pins_gpio; + + struct imx_i2c_dma *dma; ++ int layerscape_bus_recover; ++ int gpio; ++ int need_set_pmuxcr; ++ int pmuxcr_set; ++ int pmuxcr_endian; ++ void __iomem *pmuxcr_addr; + }; + + static const struct imx_i2c_hwdata imx1_i2c_hwdata = { +@@ -879,6 +938,78 @@ static int i2c_imx_read(struct imx_i2c_s + return 0; + } + ++/* ++ * Based on the I2C specification, if the data line (SDA) is ++ * stuck low, the master should send nine * clock pulses. ++ * The I2C slave device that held the bus low should release it ++ * sometime within * those nine clocks. Due to this erratum, ++ * the I2C controller cannot generate nine clock pulses. ++ */ ++static int i2c_imx_recovery_for_layerscape(struct imx_i2c_struct *i2c_imx) ++{ ++ u32 pmuxcr = 0; ++ int ret; ++ unsigned int i, temp; ++ ++ /* configure IICx_SCL/GPIO pin as a GPIO */ ++ if (i2c_imx->need_set_pmuxcr == 1) { ++ pmuxcr = ioread32be(i2c_imx->pmuxcr_addr); ++ if (i2c_imx->pmuxcr_endian == BIG_ENDIAN) ++ iowrite32be(i2c_imx->pmuxcr_set|pmuxcr, ++ i2c_imx->pmuxcr_addr); ++ else ++ iowrite32(i2c_imx->pmuxcr_set|pmuxcr, ++ i2c_imx->pmuxcr_addr); ++ } ++ ++ ret = gpio_request(i2c_imx->gpio, i2c_imx->adapter.name); ++ if (ret) { ++ dev_err(&i2c_imx->adapter.dev, ++ "can't get gpio: %d\n", ret); ++ return ret; ++ } ++ ++ /* Configure GPIO pin as an output and open drain. */ ++ gpio_direction_output(i2c_imx->gpio, 1); ++ udelay(10); ++ ++ /* Write data to generate 9 pulses */ ++ for (i = 0; i < 9; i++) { ++ gpio_set_value(i2c_imx->gpio, 1); ++ udelay(10); ++ gpio_set_value(i2c_imx->gpio, 0); ++ udelay(10); ++ } ++ /* ensure that the last level sent is always high */ ++ gpio_set_value(i2c_imx->gpio, 1); ++ ++ /* ++ * Set I2Cx_IBCR = 0h00 to generate a STOP and then ++ * set I2Cx_IBCR = 0h80 to reset ++ */ ++ temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); ++ temp &= ~(I2CR_MSTA | I2CR_MTX); ++ imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); ++ ++ /* Restore the saved value of the register SCFG_RCWPMUXCR0 */ ++ if (i2c_imx->need_set_pmuxcr == 1) { ++ if (i2c_imx->pmuxcr_endian == BIG_ENDIAN) ++ iowrite32be(pmuxcr, i2c_imx->pmuxcr_addr); ++ else ++ iowrite32(pmuxcr, i2c_imx->pmuxcr_addr); ++ } ++ /* ++ * Set I2C_IBSR[IBAL] to clear the IBAL bit if- ++ * I2C_IBSR[IBAL] = 1 ++ */ ++ temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); ++ if (temp & I2SR_IAL) { ++ temp &= ~I2SR_IAL; ++ imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR); ++ } ++ return 0; ++} ++ + static int i2c_imx_xfer(struct i2c_adapter *adapter, + struct i2c_msg *msgs, int num) + { +@@ -889,6 +1020,19 @@ static int i2c_imx_xfer(struct i2c_adapt dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); @@ -24,13 +183,81 @@ Signed-off-by: Yangbo Lu + * before switching to master mode and attempting a Start cycle + */ + result = i2c_imx_bus_busy(i2c_imx, 0); -+ if (result) -+ goto out; ++ if (result) { ++ /* timeout */ ++ if ((result == -ETIMEDOUT) && (i2c_imx->layerscape_bus_recover == 1)) ++ i2c_imx_recovery_for_layerscape(i2c_imx); ++ else ++ goto out; ++ } + result = pm_runtime_get_sync(i2c_imx->adapter.dev.parent); if (result < 0) goto out; -@@ -1100,7 +1108,7 @@ static int i2c_imx_probe(struct platform +@@ -1031,6 +1175,50 @@ static int i2c_imx_init_recovery_info(st + return 0; + } + ++/* ++ * switch SCL and SDA to their GPIO function and do some bitbanging ++ * for bus recovery. ++ * There are platforms such as Layerscape that don't support pinctrl, so add ++ * workaround for layerscape, it has no effect for other platforms. ++ */ ++static int i2c_imx_init_recovery_for_layerscape( ++ struct imx_i2c_struct *i2c_imx, ++ struct platform_device *pdev) ++{ ++ const struct of_device_id *of_id; ++ struct device_node *np = pdev->dev.of_node; ++ struct pinmux_cfg *pinmux_cfg; ++ struct device_node *scfg_node; ++ void __iomem *scfg_base = NULL; ++ ++ i2c_imx->gpio = of_get_named_gpio(np, "fsl-scl-gpio", 0); ++ if (!gpio_is_valid(i2c_imx->gpio)) { ++ dev_info(&pdev->dev, "fsl-scl-gpio not found\n"); ++ return 0; ++ } ++ pinmux_cfg = devm_kzalloc(&pdev->dev, sizeof(*pinmux_cfg), GFP_KERNEL); ++ if (!pinmux_cfg) ++ return -ENOMEM; ++ ++ i2c_imx->need_set_pmuxcr = 0; ++ of_id = of_match_node(pinmux_of_match, np); ++ if (of_id) { ++ pinmux_cfg = (struct pinmux_cfg *)of_id->data; ++ i2c_imx->pmuxcr_endian = pinmux_cfg->endian; ++ i2c_imx->pmuxcr_set = pinmux_cfg->pmuxcr_set_bit; ++ scfg_node = of_find_matching_node(NULL, scfg_device_ids); ++ if (scfg_node) { ++ scfg_base = of_iomap(scfg_node, 0); ++ if (scfg_base) { ++ i2c_imx->pmuxcr_addr = scfg_base + pinmux_cfg->pmuxcr_offset; ++ i2c_imx->need_set_pmuxcr = 1; ++ } ++ } ++ } ++ i2c_imx->layerscape_bus_recover = 1; ++ return 0; ++} ++ + static u32 i2c_imx_func(struct i2c_adapter *adapter) + { + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL +@@ -1086,6 +1274,11 @@ static int i2c_imx_probe(struct platform + i2c_imx->adapter.dev.of_node = pdev->dev.of_node; + i2c_imx->base = base; + ++ /* Init optional bus recovery for layerscape */ ++ ret = i2c_imx_init_recovery_for_layerscape(i2c_imx, pdev); ++ if (ret) ++ return ret; ++ + /* Get I2C clock */ + i2c_imx->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(i2c_imx->clk)) { +@@ -1100,7 +1293,7 @@ static int i2c_imx_probe(struct platform } /* Request IRQ */ diff --git a/target/linux/layerscape/patches-4.9/810-iommu-support-layerscape.patch b/target/linux/layerscape/patches-4.9/810-iommu-support-layerscape.patch index 71ef5d87a..bbf60211f 100644 --- a/target/linux/layerscape/patches-4.9/810-iommu-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/810-iommu-support-layerscape.patch @@ -1,9 +1,9 @@ -From 152f316e7829f6aeb3a36009e7e5ec0f1d97d770 Mon Sep 17 00:00:00 2001 +From 0a6c701f92e1aa368c44632fa0985e92703354ed Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Wed, 27 Sep 2017 10:33:26 +0800 -Subject: [PATCH] iommu: support layerscape +Date: Wed, 17 Jan 2018 15:35:48 +0800 +Subject: [PATCH 22/30] iommu: support layerscape -This is a integrated patch for layerscape smmu support. +This is an integrated patch for layerscape smmu support. Signed-off-by: Eric Auger Signed-off-by: Robin Murphy @@ -12,7 +12,7 @@ Signed-off-by: Sunil Goutham Signed-off-by: Yangbo Lu --- drivers/iommu/amd_iommu.c | 56 ++++++---- - drivers/iommu/arm-smmu-v3.c | 117 ++++++++++++++------- + drivers/iommu/arm-smmu-v3.c | 111 ++++++++++++++------ drivers/iommu/arm-smmu.c | 100 +++++++++++++++--- drivers/iommu/dma-iommu.c | 242 ++++++++++++++++++++++++++++++++++++------- drivers/iommu/intel-iommu.c | 92 ++++++++++++---- @@ -21,7 +21,7 @@ Signed-off-by: Yangbo Lu drivers/iommu/mtk_iommu_v1.c | 2 + include/linux/dma-iommu.h | 11 ++ include/linux/iommu.h | 55 +++++++--- - 10 files changed, 739 insertions(+), 157 deletions(-) + 10 files changed, 739 insertions(+), 151 deletions(-) --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c diff --git a/target/linux/layerscape/patches-4.9/811-irqchip-support-layerscape.patch b/target/linux/layerscape/patches-4.9/811-irqchip-support-layerscape.patch index ab1630698..3a44f2643 100644 --- a/target/linux/layerscape/patches-4.9/811-irqchip-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/811-irqchip-support-layerscape.patch @@ -1,9 +1,9 @@ -From 1d596855b596db88f10b12a1be6fd19e249be170 Mon Sep 17 00:00:00 2001 +From 5a5ff01c790d49c0f6fd247f68f2fd9a2128ea91 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:13:29 +0800 -Subject: [PATCH] irqchip: support layerscape +Date: Wed, 17 Jan 2018 15:36:28 +0800 +Subject: [PATCH 23/30] irqchip: support layerscape -This is a integrated patch for layerscape gic support. +This is an integrated patch for layerscape gic support. Signed-off-by: Eric Auger Signed-off-by: Zhao Qiang @@ -25,7 +25,7 @@ Signed-off-by: Yangbo Lu +obj-$(CONFIG_QUICC_ENGINE) += irq-qeic.o --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c -@@ -1659,6 +1659,7 @@ static int its_init_domain(struct fwnode +@@ -1658,6 +1658,7 @@ static int its_init_domain(struct fwnode inner_domain->parent = its_parent; inner_domain->bus_token = DOMAIN_BUS_NEXUS; diff --git a/target/linux/layerscape/patches-4.9/812-mmc-layerscape-support.patch b/target/linux/layerscape/patches-4.9/812-mmc-layerscape-support.patch index 6cad565ad..67c32dc4a 100644 --- a/target/linux/layerscape/patches-4.9/812-mmc-layerscape-support.patch +++ b/target/linux/layerscape/patches-4.9/812-mmc-layerscape-support.patch @@ -1,9 +1,9 @@ -From b31046c51c72232363711f0c623df08bf28c37e4 Mon Sep 17 00:00:00 2001 +From 4215d5757595e7ec7ca146c2b901beb177f415d8 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:21:30 +0800 -Subject: [PATCH] mmc: layerscape support +Date: Wed, 17 Jan 2018 15:37:13 +0800 +Subject: [PATCH 24/30] mmc: layerscape support -This is a integrated patch for layerscape mmc support. +This is an integrated patch for layerscape mmc support. Adrian Hunter Jaehoon Chung @@ -12,10 +12,10 @@ Signed-off-by: Yangbo Lu --- drivers/mmc/host/Kconfig | 1 + drivers/mmc/host/sdhci-esdhc.h | 52 +++++--- - drivers/mmc/host/sdhci-of-esdhc.c | 251 ++++++++++++++++++++++++++++++++++++-- + drivers/mmc/host/sdhci-of-esdhc.c | 265 ++++++++++++++++++++++++++++++++++++-- drivers/mmc/host/sdhci.c | 45 ++++--- drivers/mmc/host/sdhci.h | 3 + - 5 files changed, 306 insertions(+), 46 deletions(-) + 5 files changed, 320 insertions(+), 46 deletions(-) --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -217,7 +217,7 @@ Signed-off-by: Yangbo Lu } static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock) -@@ -421,17 +466,34 @@ static void esdhc_of_set_clock(struct sd +@@ -421,12 +466,15 @@ static void esdhc_of_set_clock(struct sd struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host); int pre_div = 1; int div = 1; @@ -234,28 +234,16 @@ Signed-off-by: Yangbo Lu /* Workaround to start pre_div at 2 for VNN < VENDOR_V_23 */ if (esdhc->vendor_ver < VENDOR_V_23) - pre_div = 2; - -+ /* -+ * Limit SD clock to 167MHz for ls1046a according to its datasheet -+ */ -+ if (clock > 167000000 && -+ of_find_compatible_node(NULL, NULL, "fsl,ls1046a-esdhc")) -+ clock = 167000000; -+ -+ /* -+ * Limit SD clock to 125MHz for ls1012a according to its datasheet -+ */ -+ if (clock > 125000000 && -+ of_find_compatible_node(NULL, NULL, "fsl,ls1012a-esdhc")) -+ clock = 125000000; -+ - /* Workaround to reduce the clock frequency for p1010 esdhc */ - if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) { - if (clock > 20000000) -@@ -441,8 +503,8 @@ static void esdhc_of_set_clock(struct sd +@@ -454,9 +502,15 @@ static void esdhc_of_set_clock(struct sd + clock -= 5000000; } ++ /* Workaround to reduce the clock frequency for ls1021a esdhc */ ++ if (of_find_compatible_node(NULL, NULL, "fsl,ls1021a-esdhc")) { ++ if (clock == 50000000) ++ clock = 46500000; ++ } ++ temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); - temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN - | ESDHC_CLOCK_MASK); @@ -264,7 +252,7 @@ Signed-off-by: Yangbo Lu sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); while (host->max_clk / pre_div / 16 > clock && pre_div < 256) -@@ -462,7 +524,20 @@ static void esdhc_of_set_clock(struct sd +@@ -476,7 +530,20 @@ static void esdhc_of_set_clock(struct sd | (div << ESDHC_DIVIDER_SHIFT) | (pre_div << ESDHC_PREDIV_SHIFT)); sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); @@ -286,7 +274,7 @@ Signed-off-by: Yangbo Lu } static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width) -@@ -487,6 +562,33 @@ static void esdhc_pltfm_set_bus_width(st +@@ -501,12 +568,136 @@ static void esdhc_pltfm_set_bus_width(st sdhci_writel(host, ctrl, ESDHC_PROCTL); } @@ -319,11 +307,20 @@ Signed-off-by: Yangbo Lu + static void esdhc_reset(struct sdhci_host *host, u8 mask) { ++ u32 val; ++ sdhci_reset(host, mask); -@@ -495,6 +597,95 @@ static void esdhc_reset(struct sdhci_hos - sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); - } + sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); + sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); ++ ++ if (mask & SDHCI_RESET_ALL) { ++ val = sdhci_readl(host, ESDHC_TBCTL); ++ val &= ~ESDHC_TB_EN; ++ sdhci_writel(host, val, ESDHC_TBCTL); ++ } ++} ++ +/* The SCFG, Supplemental Configuration Unit, provides SoC specific + * configuration and status registers for the device. There is a + * SDHC IO VSEL control register on SCFG for some platforms. It's @@ -411,12 +408,10 @@ Signed-off-by: Yangbo Lu + esdhc_clock_enable(host, true); + + return sdhci_execute_tuning(mmc, opcode); -+} -+ + } + #ifdef CONFIG_PM_SLEEP - static u32 esdhc_proctl; - static int esdhc_of_suspend(struct device *dev) -@@ -575,10 +766,19 @@ static const struct sdhci_pltfm_data sdh +@@ -589,10 +780,19 @@ static const struct sdhci_pltfm_data sdh .ops = &sdhci_esdhc_le_ops, }; @@ -436,7 +431,7 @@ Signed-off-by: Yangbo Lu u16 host_ver; pltfm_host = sdhci_priv(host); -@@ -588,6 +788,36 @@ static void esdhc_init(struct platform_d +@@ -602,6 +802,36 @@ static void esdhc_init(struct platform_d esdhc->vendor_ver = (host_ver & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT; esdhc->spec_ver = host_ver & SDHCI_SPEC_VER_MASK; @@ -473,7 +468,7 @@ Signed-off-by: Yangbo Lu } static int sdhci_esdhc_probe(struct platform_device *pdev) -@@ -610,6 +840,11 @@ static int sdhci_esdhc_probe(struct plat +@@ -624,6 +854,11 @@ static int sdhci_esdhc_probe(struct plat if (IS_ERR(host)) return PTR_ERR(host); diff --git a/target/linux/layerscape/patches-4.9/813-qe-support-layerscape.patch b/target/linux/layerscape/patches-4.9/813-qe-support-layerscape.patch index 3675f3350..c1431306a 100644 --- a/target/linux/layerscape/patches-4.9/813-qe-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/813-qe-support-layerscape.patch @@ -1,9 +1,9 @@ -From adb377019768396f339010ebb9e80fa8384992f7 Mon Sep 17 00:00:00 2001 +From 2ab544f7e943c63c300933d34815e78451cc0c26 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:20:30 +0800 -Subject: [PATCH] qe: support layerscape +Date: Wed, 17 Jan 2018 15:37:56 +0800 +Subject: [PATCH 25/30] qe: support layerscape -This is a integrated patch for layerscape qe support. +This is an integrated patch for layerscape qe support. Signed-off-by: Zhao Qiang Signed-off-by: Yangbo Lu @@ -1267,7 +1267,7 @@ Signed-off-by: Yangbo Lu } EXPORT_SYMBOL(qe_issue_cmd); -@@ -166,8 +182,8 @@ static unsigned int brg_clk = 0; +@@ -169,8 +185,8 @@ static unsigned int brg_clk = 0; unsigned int qe_get_brg_clk(void) { struct device_node *qe; @@ -1275,10 +1275,10 @@ Signed-off-by: Yangbo Lu - const u32 *prop; + u32 val; + int ret; + unsigned int mod; if (brg_clk) - return brg_clk; -@@ -179,9 +195,9 @@ unsigned int qe_get_brg_clk(void) +@@ -183,9 +199,9 @@ unsigned int qe_get_brg_clk(void) return brg_clk; } @@ -1291,7 +1291,7 @@ Signed-off-by: Yangbo Lu of_node_put(qe); -@@ -221,7 +237,7 @@ int qe_setbrg(enum qe_clock brg, unsigne +@@ -234,7 +250,7 @@ int qe_setbrg(enum qe_clock brg, unsigne tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | QE_BRGC_ENABLE | div16; @@ -1300,7 +1300,7 @@ Signed-off-by: Yangbo Lu return 0; } -@@ -355,9 +371,9 @@ static int qe_sdma_init(void) +@@ -368,9 +384,9 @@ static int qe_sdma_init(void) return -ENOMEM; } @@ -1313,7 +1313,7 @@ Signed-off-by: Yangbo Lu return 0; } -@@ -395,14 +411,14 @@ static void qe_upload_microcode(const vo +@@ -408,14 +424,14 @@ static void qe_upload_microcode(const vo "uploading microcode '%s'\n", ucode->id); /* Use auto-increment */ @@ -1332,7 +1332,7 @@ Signed-off-by: Yangbo Lu } /* -@@ -487,7 +503,7 @@ int qe_upload_firmware(const struct qe_f +@@ -500,7 +516,7 @@ int qe_upload_firmware(const struct qe_f * If the microcode calls for it, split the I-RAM. */ if (!firmware->split) @@ -1341,7 +1341,7 @@ Signed-off-by: Yangbo Lu if (firmware->soc.model) printk(KERN_INFO -@@ -521,11 +537,11 @@ int qe_upload_firmware(const struct qe_f +@@ -534,11 +550,11 @@ int qe_upload_firmware(const struct qe_f u32 trap = be32_to_cpu(ucode->traps[j]); if (trap) @@ -1355,7 +1355,7 @@ Signed-off-by: Yangbo Lu } qe_firmware_uploaded = 1; -@@ -644,9 +660,9 @@ EXPORT_SYMBOL(qe_get_num_of_risc); +@@ -657,9 +673,9 @@ EXPORT_SYMBOL(qe_get_num_of_risc); unsigned int qe_get_num_of_snums(void) { struct device_node *qe; @@ -1367,7 +1367,7 @@ Signed-off-by: Yangbo Lu num_of_snums = 28; /* The default number of snum for threads is 28 */ qe = of_find_compatible_node(NULL, NULL, "fsl,qe"); -@@ -660,9 +676,9 @@ unsigned int qe_get_num_of_snums(void) +@@ -673,9 +689,9 @@ unsigned int qe_get_num_of_snums(void) return num_of_snums; } diff --git a/target/linux/layerscape/patches-4.9/814-rtc-support-layerscape.patch b/target/linux/layerscape/patches-4.9/814-rtc-support-layerscape.patch index 0c726fbb7..9510a524d 100644 --- a/target/linux/layerscape/patches-4.9/814-rtc-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/814-rtc-support-layerscape.patch @@ -1,9 +1,9 @@ -From 7e7944c484954ff7b5d53047194e59bfffd1540a Mon Sep 17 00:00:00 2001 +From bda12381598c3df43f4e60362a8cd4af58b7f5b0 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:20:55 +0800 -Subject: [PATCH] rtc: support layerscape +Date: Wed, 17 Jan 2018 15:38:54 +0800 +Subject: [PATCH 26/30] rtc: support layerscape -This is a integrated patch for layerscape rtc support. +This is an integrated patch for layerscape rtc support. Signed-off-by: Zhang Ying-22455 Signed-off-by: Yangbo Lu diff --git a/target/linux/layerscape/patches-4.9/815-spi-support-layerscape.patch b/target/linux/layerscape/patches-4.9/815-spi-support-layerscape.patch index 761680913..22904eec9 100644 --- a/target/linux/layerscape/patches-4.9/815-spi-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/815-spi-support-layerscape.patch @@ -1,9 +1,9 @@ -From a12f522b48a8cb637c1c026b46a76b2ef7983f8d Mon Sep 17 00:00:00 2001 +From 027b679f248f15dea36c6cd6782d6643e2151057 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Mon, 25 Sep 2017 12:12:41 +0800 -Subject: [PATCH] spi: support layerscape +Date: Wed, 17 Jan 2018 15:39:43 +0800 +Subject: [PATCH 27/30] spi: support layerscape -This is a integrated patch for layerscape dspi support. +This is an integrated patch for layerscape dspi support. Signed-off-by: Christophe JAILLET Signed-off-by: Sanchayan Maity @@ -11,9 +11,8 @@ Signed-off-by: Geert Uytterhoeven Signed-off-by: Sanchayan Maity Signed-off-by: Yangbo Lu --- - drivers/spi/Kconfig | 1 + drivers/spi/spi-fsl-dspi.c | 309 ++++++++++++++++++++++++++++++++++++++++++++- - 2 files changed, 305 insertions(+), 5 deletions(-) + 1 file changed, 304 insertions(+), 5 deletions(-) --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c diff --git a/target/linux/layerscape/patches-4.9/816-tty-serial-support-layerscape.patch b/target/linux/layerscape/patches-4.9/816-tty-serial-support-layerscape.patch index a14df9d70..f7119e494 100644 --- a/target/linux/layerscape/patches-4.9/816-tty-serial-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/816-tty-serial-support-layerscape.patch @@ -1,9 +1,9 @@ -From 469daac0faff06209bc1d1390571b860d153a82b Mon Sep 17 00:00:00 2001 +From c35aec61e5bb0faafb2847a0d750ebd7345a4b0f Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Wed, 27 Sep 2017 10:33:47 +0800 -Subject: [PATCH] tty: serial: support layerscape +Date: Wed, 17 Jan 2018 15:40:24 +0800 +Subject: [PATCH 28/30] tty: serial: support layerscape -This is a integrated patch for layerscape uart support. +This is an integrated patch for layerscape uart support. Signed-off-by: Nikita Yushchenko Signed-off-by: Yuan Yao diff --git a/target/linux/layerscape/patches-4.9/817-usb-support-layerscape.patch b/target/linux/layerscape/patches-4.9/817-usb-support-layerscape.patch index 2e7885a69..c01db458a 100644 --- a/target/linux/layerscape/patches-4.9/817-usb-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/817-usb-support-layerscape.patch @@ -1,9 +1,9 @@ -From b14460ee524a34d3b94b44032b52155c4cd708e5 Mon Sep 17 00:00:00 2001 +From a2a97f0d2c07a772899ca09967547bea6c9124c5 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Wed, 27 Sep 2017 10:34:07 +0800 -Subject: [PATCH] usb: support layerscape +Date: Wed, 17 Jan 2018 15:46:03 +0800 +Subject: [PATCH 29/30] usb: support layerscape -This is a integrated patch for layerscape usb support. +This is an integrated patch for layerscape usb support. Signed-off-by: yinbo.zhu Signed-off-by: Ramneek Mehresh @@ -15,29 +15,68 @@ Signed-off-by: Suresh Gupta Signed-off-by: Zhao Chenhui Signed-off-by: Yangbo Lu --- - drivers/net/usb/r8152.c | 4 + + drivers/net/usb/cdc_ether.c | 8 + + drivers/net/usb/r8152.c | 6 + drivers/usb/common/common.c | 50 ++++++ drivers/usb/core/hub.c | 8 + - drivers/usb/dwc3/core.c | 235 ++++++++++++++++++++++++++- - drivers/usb/dwc3/core.h | 46 +++++- - drivers/usb/dwc3/host.c | 15 +- + drivers/usb/dwc3/core.c | 243 ++++++++++++++++++++++++++++- + drivers/usb/dwc3/core.h | 51 ++++++- + drivers/usb/dwc3/ep0.c | 4 +- + drivers/usb/dwc3/gadget.c | 7 + + drivers/usb/dwc3/host.c | 24 ++- drivers/usb/gadget/udc/fsl_udc_core.c | 46 +++--- drivers/usb/gadget/udc/fsl_usb2_udc.h | 16 +- drivers/usb/host/Kconfig | 2 +- - drivers/usb/host/ehci-fsl.c | 289 +++++++++++++++++++++++++++++++--- + drivers/usb/host/ehci-fsl.c | 279 +++++++++++++++++++++++++++++++--- drivers/usb/host/ehci-fsl.h | 3 + - drivers/usb/host/ehci-hub.c | 2 + - drivers/usb/host/ehci.h | 5 + + drivers/usb/host/ehci-hub.c | 4 + + drivers/usb/host/ehci.h | 9 ++ drivers/usb/host/fsl-mph-dr-of.c | 12 ++ + drivers/usb/host/xhci-plat.c | 10 ++ + drivers/usb/host/xhci-ring.c | 29 +++- + drivers/usb/host/xhci.c | 38 ++++- + drivers/usb/host/xhci.h | 5 +- drivers/usb/phy/phy-fsl-usb.c | 59 +++++-- drivers/usb/phy/phy-fsl-usb.h | 8 + include/linux/usb.h | 1 + include/linux/usb/of.h | 2 + - 18 files changed, 730 insertions(+), 73 deletions(-) + 25 files changed, 836 insertions(+), 88 deletions(-) +--- a/drivers/net/usb/cdc_ether.c ++++ b/drivers/net/usb/cdc_ether.c +@@ -532,6 +532,7 @@ static const struct driver_info wwan_inf + #define LENOVO_VENDOR_ID 0x17ef + #define NVIDIA_VENDOR_ID 0x0955 + #define HP_VENDOR_ID 0x03f0 ++#define TPLINK_VENDOR_ID 0x2357 + + static const struct usb_device_id products[] = { + /* BLACKLIST !! +@@ -732,6 +733,13 @@ static const struct usb_device_id produc + USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE), + .driver_info = 0, + }, ++ ++ /* TP-LINK UE300 USB 3.0 Ethernet Adapters (based on Realtek RTL8153) */ ++{ ++ USB_DEVICE_AND_INTERFACE_INFO(TPLINK_VENDOR_ID, 0x0601, USB_CLASS_COMM, ++ USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE), ++ .driver_info = 0, ++}, + + /* WHITELIST!!! + * --- a/drivers/net/usb/r8152.c +++ b/drivers/net/usb/r8152.c -@@ -1816,6 +1816,10 @@ static int rx_bottom(struct r8152 *tp, i +@@ -520,6 +520,7 @@ enum rtl8152_flags { + #define VENDOR_ID_SAMSUNG 0x04e8 + #define VENDOR_ID_LENOVO 0x17ef + #define VENDOR_ID_NVIDIA 0x0955 ++#define VENDOR_ID_TPLINK 0x2357 + + #define MCU_TYPE_PLA 0x0100 + #define MCU_TYPE_USB 0x0000 +@@ -1816,6 +1817,10 @@ static int rx_bottom(struct r8152 *tp, i unsigned int pkt_len; struct sk_buff *skb; @@ -48,6 +87,14 @@ Signed-off-by: Yangbo Lu pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK; if (pkt_len < ETH_ZLEN) break; +@@ -4507,6 +4512,7 @@ static struct usb_device_id rtl8152_tabl + {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)}, + {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)}, + {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)}, ++ {REALTEK_USB_DEVICE(VENDOR_ID_TPLINK, 0x0601)}, + {} + }; + --- a/drivers/usb/common/common.c +++ b/drivers/usb/common/common.c @@ -105,6 +105,56 @@ static const char *const usb_dr_modes[] @@ -171,7 +218,7 @@ Signed-off-by: Yangbo Lu reg &= ~DWC3_GFLADJ_30MHZ_MASK; reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | dwc->fladj; dwc3_writel(dwc->regs, DWC3_GFLADJ, reg); -@@ -579,6 +599,99 @@ static int dwc3_phy_setup(struct dwc3 *d +@@ -585,6 +605,99 @@ static int dwc3_phy_setup(struct dwc3 *d return 0; } @@ -271,7 +318,7 @@ Signed-off-by: Yangbo Lu static void dwc3_core_exit(struct dwc3 *dwc) { dwc3_event_buffers_cleanup(dwc); -@@ -721,6 +834,8 @@ static int dwc3_core_init(struct dwc3 *d +@@ -727,6 +840,8 @@ static int dwc3_core_init(struct dwc3 *d if (ret) goto err1; @@ -280,7 +327,7 @@ Signed-off-by: Yangbo Lu /* Adjust Frame Length */ dwc3_frame_length_adjustment(dwc); -@@ -919,11 +1034,109 @@ static void dwc3_core_exit_mode(struct d +@@ -925,11 +1040,117 @@ static void dwc3_core_exit_mode(struct d } } @@ -325,6 +372,12 @@ Signed-off-by: Yangbo Lu + &hird_threshold); + dwc->usb3_lpm_capable = device_property_read_bool(dev, + "snps,usb3_lpm_capable"); ++ dwc->quirk_reverse_in_out = device_property_read_bool(dev, ++ "snps,quirk_reverse_in_out"); ++ dwc->quirk_stop_transfer_in_block = device_property_read_bool(dev, ++ "snps,quirk_stop_transfer_in_block"); ++ dwc->quirk_stop_ep_in_u1 = device_property_read_bool(dev, ++ "snps,quirk_stop_ep_in_u1"); + + dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize"); + @@ -365,6 +418,8 @@ Signed-off-by: Yangbo Lu + + dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, + "snps,tx_de_emphasis_quirk"); ++ dwc->disable_devinit_u1u2_quirk = device_property_read_bool(dev, ++ "snps,disable_devinit_u1u2"); + device_property_read_u8(dev, "snps,tx_de_emphasis", + &tx_de_emphasis); + device_property_read_string(dev, "snps,hsphy_interface", @@ -390,7 +445,7 @@ Signed-off-by: Yangbo Lu struct resource *res; struct dwc3 *dwc; u8 lpm_nyet_threshold; -@@ -955,6 +1168,11 @@ static int dwc3_probe(struct platform_de +@@ -961,6 +1182,11 @@ static int dwc3_probe(struct platform_de dwc->xhci_resources[0].flags = res->flags; dwc->xhci_resources[0].name = res->name; @@ -402,7 +457,7 @@ Signed-off-by: Yangbo Lu res->start += DWC3_GLOBALS_REGS_START; /* -@@ -997,6 +1215,12 @@ static int dwc3_probe(struct platform_de +@@ -1003,6 +1229,12 @@ static int dwc3_probe(struct platform_de dwc->usb3_lpm_capable = device_property_read_bool(dev, "snps,usb3_lpm_capable"); @@ -415,7 +470,7 @@ Signed-off-by: Yangbo Lu dwc->disable_scramble_quirk = device_property_read_bool(dev, "snps,disable_scramble_quirk"); dwc->u2exit_lfps_quirk = device_property_read_bool(dev, -@@ -1041,6 +1265,8 @@ static int dwc3_probe(struct platform_de +@@ -1047,6 +1279,8 @@ static int dwc3_probe(struct platform_de dwc->hird_threshold = hird_threshold | (dwc->is_utmi_l1_suspend << 4); @@ -424,7 +479,7 @@ Signed-off-by: Yangbo Lu platform_set_drvdata(pdev, dwc); dwc3_cache_hwparams(dwc); -@@ -1064,6 +1290,11 @@ static int dwc3_probe(struct platform_de +@@ -1070,6 +1304,11 @@ static int dwc3_probe(struct platform_de if (ret < 0) goto err1; @@ -479,7 +534,7 @@ Signed-off-by: Yangbo Lu /* Global Debug Queue/FIFO Space Available Register */ #define DWC3_GDBGFIFOSPACE_NUM(n) ((n) & 0x1f) #define DWC3_GDBGFIFOSPACE_TYPE(n) (((n) << 5) & 0x1e0) -@@ -180,7 +207,6 @@ +@@ -182,7 +209,6 @@ #define DWC3_GCTL_CLK_PIPE (1) #define DWC3_GCTL_CLK_PIPEHALF (2) #define DWC3_GCTL_CLK_MASK (3) @@ -487,7 +542,7 @@ Signed-off-by: Yangbo Lu #define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12) #define DWC3_GCTL_PRTCAPDIR(n) ((n) << 12) #define DWC3_GCTL_PRTCAP_HOST 1 -@@ -289,6 +315,10 @@ +@@ -292,6 +318,10 @@ /* Global Frame Length Adjustment Register */ #define DWC3_GFLADJ_30MHZ_SDBND_SEL (1 << 7) #define DWC3_GFLADJ_30MHZ_MASK 0x3f @@ -498,7 +553,7 @@ Signed-off-by: Yangbo Lu /* Global User Control Register 2 */ #define DWC3_GUCTL2_RST_ACTBITLATER (1 << 14) -@@ -753,6 +783,7 @@ struct dwc3_scratchpad_array { +@@ -756,6 +786,7 @@ struct dwc3_scratchpad_array { * @regs: base address for our registers * @regs_size: address space size * @fladj: frame length adjustment @@ -506,7 +561,15 @@ Signed-off-by: Yangbo Lu * @irq_gadget: peripheral controller's IRQ number * @nr_scratch: number of scratch buffers * @u1u2: only used on revisions <1.83a for workaround -@@ -847,6 +878,7 @@ struct dwc3 { +@@ -832,6 +863,7 @@ struct dwc3_scratchpad_array { + * 1 - -3.5dB de-emphasis + * 2 - No de-emphasis + * 3 - Reserved ++ * @disable_devinit_u1u2_quirk: disable device-initiated U1/U2 request. + */ + struct dwc3 { + struct usb_ctrlrequest *ctrl_req; +@@ -850,6 +882,7 @@ struct dwc3 { spinlock_t lock; struct device *dev; @@ -514,7 +577,7 @@ Signed-off-by: Yangbo Lu struct platform_device *xhci; struct resource xhci_resources[DWC3_XHCI_RESOURCES_NUM]; -@@ -872,6 +904,12 @@ struct dwc3 { +@@ -875,6 +908,12 @@ struct dwc3 { enum usb_phy_interface hsphy_mode; u32 fladj; @@ -527,7 +590,7 @@ Signed-off-by: Yangbo Lu u32 irq_gadget; u32 nr_scratch; u32 u1u2; -@@ -948,9 +986,12 @@ struct dwc3 { +@@ -951,9 +990,12 @@ struct dwc3 { unsigned ep0_bounced:1; unsigned ep0_expect_in:1; unsigned has_hibernation:1; @@ -540,7 +603,7 @@ Signed-off-by: Yangbo Lu unsigned pending_events:1; unsigned pullups_connected:1; unsigned setup_packet_pending:1; -@@ -971,9 +1012,12 @@ struct dwc3 { +@@ -974,9 +1016,16 @@ struct dwc3 { unsigned dis_rxdet_inp3_quirk:1; unsigned dis_u2_freeclk_exists_quirk:1; unsigned dis_del_phy_power_chg_quirk:1; @@ -548,11 +611,52 @@ Signed-off-by: Yangbo Lu unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; ++ unsigned disable_devinit_u1u2_quirk:1; ++ unsigned quirk_reverse_in_out:1; ++ unsigned quirk_stop_transfer_in_block:1; ++ unsigned quirk_stop_ep_in_u1:1; + + u16 imod_interval; }; /* -------------------------------------------------------------------------- */ +--- a/drivers/usb/dwc3/ep0.c ++++ b/drivers/usb/dwc3/ep0.c +@@ -360,9 +360,9 @@ static int dwc3_ep0_handle_status(struct + if ((dwc->speed == DWC3_DSTS_SUPERSPEED) || + (dwc->speed == DWC3_DSTS_SUPERSPEED_PLUS)) { + reg = dwc3_readl(dwc->regs, DWC3_DCTL); +- if (reg & DWC3_DCTL_INITU1ENA) ++ if ((reg & DWC3_DCTL_INITU1ENA) && !dwc->disable_devinit_u1u2_quirk) + usb_status |= 1 << USB_DEV_STAT_U1_ENABLED; +- if (reg & DWC3_DCTL_INITU2ENA) ++ if ((reg & DWC3_DCTL_INITU2ENA) && !dwc->disable_devinit_u1u2_quirk) + usb_status |= 1 << USB_DEV_STAT_U2_ENABLED; + } + +--- a/drivers/usb/dwc3/gadget.c ++++ b/drivers/usb/dwc3/gadget.c +@@ -2932,6 +2932,7 @@ static irqreturn_t dwc3_interrupt(int ir + int dwc3_gadget_init(struct dwc3 *dwc) + { + int ret, irq; ++ u32 reg; + struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); + + irq = platform_get_irq_byname(dwc3_pdev, "peripheral"); +@@ -3046,6 +3047,12 @@ int dwc3_gadget_init(struct dwc3 *dwc) + goto err5; + } + ++ if (dwc->disable_devinit_u1u2_quirk) { ++ reg = dwc3_readl(dwc->regs, DWC3_DCTL); ++ reg &= ~(DWC3_DCTL_INITU1ENA | DWC3_DCTL_INITU2ENA); ++ dwc3_writel(dwc->regs, DWC3_DCTL, reg); ++ } ++ + return 0; + + err5: --- a/drivers/usb/dwc3/host.c +++ b/drivers/usb/dwc3/host.c @@ -17,6 +17,8 @@ @@ -588,6 +692,22 @@ Signed-off-by: Yangbo Lu dwc->xhci = xhci; ret = platform_device_add_resources(xhci, dwc->xhci_resources, +@@ -90,6 +101,15 @@ int dwc3_host_init(struct dwc3 *dwc) + + memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props)); + ++ if (dwc->quirk_reverse_in_out) ++ props[prop_idx++].name = "quirk-reverse-in-out"; ++ ++ if (dwc->quirk_stop_transfer_in_block) ++ props[prop_idx++].name = "quirk-stop-transfer-in-block"; ++ ++ if (dwc->quirk_stop_ep_in_u1) ++ props[prop_idx++].name = "quirk-stop-ep-in-u1"; ++ + if (dwc->usb3_lpm_capable) + props[prop_idx++].name = "usb3-lpm-capable"; + --- a/drivers/usb/gadget/udc/fsl_udc_core.c +++ b/drivers/usb/gadget/udc/fsl_udc_core.c @@ -198,7 +198,11 @@ __acquires(ep->udc->lock) @@ -815,15 +935,17 @@ Signed-off-by: Yangbo Lu Variation of ARC USB block used in some Freescale chips. --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c -@@ -37,13 +37,141 @@ +@@ -36,15 +36,127 @@ + #include #include #include - ++#include ++ +#ifdef CONFIG_PPC +#include +#include +#endif -+ + #include "ehci.h" #include "ehci-fsl.h" @@ -864,13 +986,23 @@ Signed-off-by: Yangbo Lu #define DRV_NAME "ehci-fsl" static struct hc_driver __read_mostly fsl_ehci_hc_driver; + +struct ehci_fsl { -+ /* store current hcd state for otg; -+ * have_hcd is true when host drv al already part of otg framework, -+ * otherwise false; -+ * hcd_add is true when otg framework wants to add host -+ * drv as part of otg;flase when it wants to remove it -+ */ ++ struct ehci_hcd ehci; ++ ++#ifdef CONFIG_PM ++struct ehci_regs saved_regs; ++struct ccsr_usb_phy saved_phy_regs; ++/* Saved USB PHY settings, need to restore after deep sleep. */ ++u32 usb_ctrl; ++#endif ++ /* ++ * store current hcd state for otg; ++ * have_hcd is true when host drv al already part of otg framework, ++ * otherwise false; ++ * hcd_add is true when otg framework wants to add host ++ * drv as part of otg;flase when it wants to remove it ++ */ +unsigned have_hcd:1; +unsigned hcd_add:1; +}; @@ -897,7 +1029,7 @@ Signed-off-by: Yangbo Lu + /* host, gadget and otg share same int line */ + retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); + if (retval == 0) -+ ehci_fsl->have_hcd = 1; ++ ehci_fsl->have_hcd = 1; + } else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) { + usb_remove_hcd(hcd); + ehci_fsl->have_hcd = 0; @@ -905,59 +1037,33 @@ Signed-off-by: Yangbo Lu +} +#endif + -+struct ehci_fsl { -+ struct ehci_hcd ehci; -+ -+#ifdef CONFIG_PM -+struct ehci_regs saved_regs; -+struct ccsr_usb_phy saved_phy_regs; -+/* Saved USB PHY settings, need to restore after deep sleep. */ -+u32 usb_ctrl; -+#endif -+ /* -+ * store current hcd state for otg; -+ * have_hcd is true when host drv al already part of otg framework, -+ * otherwise false; -+ * hcd_add is true when otg framework wants to add host -+ * drv as part of otg;flase when it wants to remove it -+ */ -+unsigned have_hcd:1; -+unsigned hcd_add:1; -+}; -+ -+static strut ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) -+{ -+struct ehci_hcd *ehci = hcd_to_ehci(hcd); -+ -+return container_of(ehci, struct ehci_fsl, ehci); -+} -+ +#if defined(CONFIG_FSL_USB2_OTG) || defined(CONFIG_FSL_USB2_OTG_MODULE) +static void do_change_hcd(struct work_struct *work) +{ -+struct ehci_hcd *ehci = container_of(work, struct ehci_hcd, -+change_hcd_work); -+struct usb_hcd *hcd = ehci_to_hcd(ehci); -+struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); -+void __iomem *non_ehci = hcd->regs; -+int retval; ++ struct ehci_hcd *ehci = container_of(work, struct ehci_hcd, ++ change_hcd_work); ++ struct usb_hcd *hcd = ehci_to_hcd(ehci); ++ struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); ++ void __iomem *non_ehci = hcd->regs; ++ int retval; + -+if (ehci_fsl->hcd_add && !ehci_fsl->have_hcd) { -+writel(USBMODE_CM_HOST, non_ehci + FSL_SOC_USB_USBMODE); -+/* host, gadget and otg share same int line */ -+retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); -+if (retval == 0) -+ehci_fsl->have_hcd = 1; -+} else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) { -+ usb_remove_hcd(hcd); -+ehci_fsl->have_hcd = 0; -+} ++ if (ehci_fsl->hcd_add && !ehci_fsl->have_hcd) { ++ writel(USBMODE_CM_HOST, non_ehci + FSL_SOC_USB_USBMODE); ++ /* host, gadget and otg share same int line */ ++ retval = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); ++ if (retval == 0) ++ ehci_fsl->have_hcd = 1; ++ } else if (!ehci_fsl->hcd_add && ehci_fsl->have_hcd) { ++ usb_remove_hcd(hcd); ++ ehci_fsl->have_hcd = 0; ++ } +} +#endif - ++ /* configure so an HC device and id are always provided */ /* always called with process context; sleeping is OK */ -@@ -131,6 +259,12 @@ static int fsl_ehci_drv_probe(struct pla + +@@ -131,6 +243,12 @@ static int fsl_ehci_drv_probe(struct pla clrsetbits_be32(hcd->regs + FSL_SOC_USB_CTRL, CONTROL_REGISTER_W1C_MASK, 0x4); @@ -970,7 +1076,7 @@ Signed-off-by: Yangbo Lu /* * Enable UTMI phy and program PTS field in UTMI mode before asserting * controller reset for USB Controller version 2.5 -@@ -143,16 +277,20 @@ static int fsl_ehci_drv_probe(struct pla +@@ -143,16 +261,20 @@ static int fsl_ehci_drv_probe(struct pla /* Don't need to set host mode here. It will be done by tdi_reset() */ @@ -993,7 +1099,7 @@ Signed-off-by: Yangbo Lu dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n", hcd, ehci, hcd->usb_phy); -@@ -168,6 +306,11 @@ static int fsl_ehci_drv_probe(struct pla +@@ -168,6 +290,11 @@ static int fsl_ehci_drv_probe(struct pla retval = -ENODEV; goto err2; } @@ -1005,17 +1111,16 @@ Signed-off-by: Yangbo Lu } #endif return retval; -@@ -181,6 +324,18 @@ static int fsl_ehci_drv_probe(struct pla +@@ -181,6 +308,17 @@ static int fsl_ehci_drv_probe(struct pla return retval; } -+static bool usb_phy_clk_valid(struct usb_hcd *hcd, -+ enum fsl_usb2_phy_modes phy_mode) ++static bool usb_phy_clk_valid(struct usb_hcd *hcd) +{ + void __iomem *non_ehci = hcd->regs; + bool ret = true; + -+ if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) ++ if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) + ret = false; + + return ret; @@ -1024,7 +1129,7 @@ Signed-off-by: Yangbo Lu static int ehci_fsl_setup_phy(struct usb_hcd *hcd, enum fsl_usb2_phy_modes phy_mode, unsigned int port_offset) -@@ -219,6 +374,21 @@ static int ehci_fsl_setup_phy(struct usb +@@ -219,6 +357,21 @@ static int ehci_fsl_setup_phy(struct usb /* fall through */ case FSL_USB2_PHY_UTMI: case FSL_USB2_PHY_UTMI_DUAL: @@ -1046,7 +1151,16 @@ Signed-off-by: Yangbo Lu if (pdata->have_sysif_regs && pdata->controller_ver) { /* controller version 1.6 or above */ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, -@@ -292,14 +462,9 @@ static int ehci_fsl_usb_setup(struct ehc +@@ -286,20 +439,18 @@ static int ehci_fsl_usb_setup(struct ehc + if (pdata->has_fsl_erratum_a005275 == 1) + ehci->has_fsl_hs_errata = 1; + ++ if (pdata->has_fsl_erratum_a005697 == 1) ++ ehci->has_fsl_susp_errata = 1; ++ + if ((pdata->operating_mode == FSL_USB2_DR_HOST) || + (pdata->operating_mode == FSL_USB2_DR_OTG)) + if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0)) return -EINVAL; if (pdata->operating_mode == FSL_USB2_MPH_HOST) { @@ -1062,7 +1176,7 @@ Signed-off-by: Yangbo Lu ehci->has_fsl_port_bug = 1; if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) -@@ -379,16 +544,57 @@ static int ehci_fsl_setup(struct usb_hcd +@@ -379,16 +530,57 @@ static int ehci_fsl_setup(struct usb_hcd return retval; } @@ -1127,7 +1241,7 @@ Signed-off-by: Yangbo Lu #ifdef CONFIG_PPC_MPC512x static int ehci_fsl_mpc512x_drv_suspend(struct device *dev) -@@ -535,26 +741,43 @@ static inline int ehci_fsl_mpc512x_drv_r +@@ -535,26 +727,45 @@ static inline int ehci_fsl_mpc512x_drv_r } #endif /* CONFIG_PPC_MPC512x */ @@ -1149,7 +1263,9 @@ Signed-off-by: Yangbo Lu + +#ifdef CONFIG_PPC +suspend_state_t pm_state; -+pm_state = pm_suspend_state(); ++/* FIXME:Need to port fsl_pm.h before enable below code. */ ++/*pm_state = pm_suspend_state();*/ ++pm_state = PM_SUSPEND_MEM; + +if (pm_state == PM_SUSPEND_MEM) + ehci_fsl_save_context(hcd); @@ -1178,7 +1294,7 @@ Signed-off-by: Yangbo Lu if (!fsl_deep_sleep()) return 0; -@@ -568,12 +791,34 @@ static int ehci_fsl_drv_resume(struct de +@@ -568,12 +779,36 @@ static int ehci_fsl_drv_resume(struct de struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); struct ehci_hcd *ehci = hcd_to_ehci(hcd); void __iomem *non_ehci = hcd->regs; @@ -1188,7 +1304,9 @@ Signed-off-by: Yangbo Lu + +#ifdef CONFIG_PPC +suspend_state_t pm_state; -+pm_state = pm_suspend_state(); ++/* FIXME:Need to port fsl_pm.h before enable below code.*/ ++/* pm_state = pm_suspend_state(); */ ++pm_state = PM_SUSPEND_MEM; + +if (pm_state == PM_SUSPEND_MEM) + ehci_fsl_restore_context(hcd); @@ -1225,7 +1343,16 @@ Signed-off-by: Yangbo Lu #endif /* _EHCI_FSL_H */ --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c -@@ -305,6 +305,8 @@ static int ehci_bus_suspend (struct usb_ +@@ -278,6 +278,8 @@ static int ehci_bus_suspend (struct usb_ + else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) { + t2 |= PORT_SUSPEND; + set_bit(port, &ehci->bus_suspended); ++ if (ehci_has_fsl_susp_errata(ehci)) ++ usleep_range(10000, 20000); + } + + /* enable remote wakeup on all ports, if told to do so */ +@@ -305,6 +307,8 @@ static int ehci_bus_suspend (struct usb_ USB_PORT_STAT_HIGH_SPEED) fs_idle_delay = true; ehci_writel(ehci, t2, reg); @@ -1246,8 +1373,21 @@ Signed-off-by: Yangbo Lu /* list of itds & sitds completed while now_frame was still active */ struct list_head cached_itd_list; -@@ -706,8 +709,10 @@ ehci_port_speed(struct ehci_hcd *ehci, u +@@ -219,6 +222,7 @@ struct ehci_hcd { /* one per controlle + unsigned no_selective_suspend:1; + unsigned has_fsl_port_bug:1; /* FreeScale */ + unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */ ++ unsigned has_fsl_susp_errata:1; /*Freescale SUSP quirk*/ + unsigned big_endian_mmio:1; + unsigned big_endian_desc:1; + unsigned big_endian_capbase:1; +@@ -704,10 +708,15 @@ ehci_port_speed(struct ehci_hcd *ehci, u + #if defined(CONFIG_PPC_85xx) + /* Some Freescale processors have an erratum (USB A-005275) in which * incoming packets get corrupted in HS mode ++ * Some Freescale processors have an erratum (USB A-005697) in which ++ * we need to wait for 10ms for bus to fo into suspend mode after ++ * setting SUSP bit */ #define ehci_has_fsl_hs_errata(e) ((e)->has_fsl_hs_errata) +#define ehci_has_fsl_susp_errata(e) ((e)->has_fsl_susp_errata) @@ -1278,6 +1418,149 @@ Signed-off-by: Yangbo Lu /* * Determine whether phy_clk_valid needs to be checked +--- a/drivers/usb/host/xhci-plat.c ++++ b/drivers/usb/host/xhci-plat.c +@@ -223,6 +223,16 @@ static int xhci_plat_probe(struct platfo + if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable")) + xhci->quirks |= XHCI_LPM_SUPPORT; + ++ if (device_property_read_bool(&pdev->dev, "quirk-reverse-in-out")) ++ xhci->quirks |= XHCI_REVERSE_IN_OUT; ++ ++ if (device_property_read_bool(&pdev->dev, ++ "quirk-stop-transfer-in-block")) ++ xhci->quirks |= XHCI_STOP_TRANSFER_IN_BLOCK; ++ ++ if (device_property_read_bool(&pdev->dev, "quirk-stop-ep-in-u1")) ++ xhci->quirks |= XHCI_STOP_EP_IN_U1; ++ + if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped")) + xhci->quirks |= XHCI_BROKEN_PORT_PED; + +--- a/drivers/usb/host/xhci-ring.c ++++ b/drivers/usb/host/xhci-ring.c +@@ -1852,14 +1852,17 @@ static int finish_td(struct xhci_hcd *xh + union xhci_trb *event_trb, struct xhci_transfer_event *event, + struct xhci_virt_ep *ep, int *status, bool skip) + { ++ struct xhci_dequeue_state deq_state; + struct xhci_virt_device *xdev; + struct xhci_ring *ep_ring; ++ unsigned int stream_id; + unsigned int slot_id; + int ep_index; + struct urb *urb = NULL; + struct xhci_ep_ctx *ep_ctx; + int ret = 0; + struct urb_priv *urb_priv; ++ u32 remaining; + u32 trb_comp_code; + + slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->flags)); +@@ -1885,13 +1888,29 @@ static int finish_td(struct xhci_hcd *xh + if (trb_comp_code == COMP_STALL || + xhci_requires_manual_halt_cleanup(xhci, ep_ctx, + trb_comp_code)) { +- /* Issue a reset endpoint command to clear the host side +- * halt, followed by a set dequeue command to move the +- * dequeue pointer past the TD. +- * The class driver clears the device side halt later. ++ /* ++ * A-007463: After transaction error, controller switches ++ * control transfer data stage from IN to OUT direction. + */ +- xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index, ++ remaining = EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); ++ if (remaining && xhci_requires_manual_halt_cleanup(xhci, ep_ctx, ++ trb_comp_code) && ++ (xhci->quirks & XHCI_REVERSE_IN_OUT)) { ++ memset(&deq_state, 0, sizeof(deq_state)); ++ xhci_find_new_dequeue_state(xhci, slot_id, ++ ep_index, td->urb->stream_id, td, &deq_state); ++ xhci_queue_new_dequeue_state(xhci, slot_id, ep_index, ++ stream_id, &deq_state); ++ xhci_ring_cmd_db(xhci); ++ } else { ++ /* Issue a reset endpoint command to clear the host side ++ * halt, followed by a set dequeue command to move the ++ * dequeue pointer past the TD. ++ * The class driver clears the device side halt later. ++ */ ++ xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index, + ep_ring->stream_id, td, event_trb); ++ } + } else { + /* Update ring dequeue pointer */ + while (ep_ring->dequeue != td->last_trb) +--- a/drivers/usb/host/xhci.c ++++ b/drivers/usb/host/xhci.c +@@ -1570,14 +1570,38 @@ int xhci_urb_dequeue(struct usb_hcd *hcd + ret = -ENOMEM; + goto done; + } +- ep->ep_state |= EP_HALT_PENDING; +- ep->stop_cmds_pending++; +- ep->stop_cmd_timer.expires = jiffies + ++ /* ++ *A-009611: Issuing an End Transfer command on an IN endpoint. ++ *when a transfer is in progress on USB blocks the transmission ++ *Workaround: Software must wait for all existing TRBs to ++ *complete before issuing End transfer command. ++ */ ++ if ((ep_ring->enqueue == ep_ring->dequeue && ++ (xhci->quirks & XHCI_STOP_TRANSFER_IN_BLOCK)) || ++ !(xhci->quirks & XHCI_STOP_TRANSFER_IN_BLOCK)) { ++ ep->ep_state |= EP_HALT_PENDING; ++ ep->stop_cmds_pending++; ++ ep->stop_cmd_timer.expires = jiffies + + XHCI_STOP_EP_CMD_TIMEOUT * HZ; +- add_timer(&ep->stop_cmd_timer); +- xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id, +- ep_index, 0); +- xhci_ring_cmd_db(xhci); ++ add_timer(&ep->stop_cmd_timer); ++ xhci_queue_stop_endpoint(xhci, command, ++ urb->dev->slot_id, ++ ep_index, 0); ++ xhci_ring_cmd_db(xhci); ++ } ++ ++ /* ++ *A-009668: Stop Endpoint Command does not complete. ++ *Workaround: Instead of issuing a Stop Endpoint Command, ++ *issue a Disable Slot Command with the corresponding slot ID. ++ *Alternately, you can issue an Address Device Command with ++ *BSR=1 ++ */ ++ if ((urb->dev->speed <= USB_SPEED_HIGH) && ++ (xhci->quirks & XHCI_STOP_EP_IN_U1)) { ++ xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT, ++ urb->dev->slot_id); ++ } + } + done: + spin_unlock_irqrestore(&xhci->lock, flags); +--- a/drivers/usb/host/xhci.h ++++ b/drivers/usb/host/xhci.h +@@ -1621,7 +1621,7 @@ struct xhci_hcd { + #define XHCI_STATE_REMOVING (1 << 2) + /* Statistics */ + int error_bitmask; +- unsigned int quirks; ++ u64 quirks; + #define XHCI_LINK_TRB_QUIRK (1 << 0) + #define XHCI_RESET_EP_QUIRK (1 << 1) + #define XHCI_NEC_HOST (1 << 2) +@@ -1657,6 +1657,9 @@ struct xhci_hcd { + #define XHCI_SSIC_PORT_UNUSED (1 << 22) + #define XHCI_NO_64BIT_SUPPORT (1 << 23) + #define XHCI_MISSING_CAS (1 << 24) ++#define XHCI_REVERSE_IN_OUT (1 << 29) ++#define XHCI_STOP_TRANSFER_IN_BLOCK (1 << 30) ++#define XHCI_STOP_EP_IN_U1 (1 << 31) + /* For controller with a broken Port Disable implementation */ + #define XHCI_BROKEN_PORT_PED (1 << 25) + #define XHCI_LIMIT_ENDPOINT_INTERVAL_7 (1 << 26) --- a/drivers/usb/phy/phy-fsl-usb.c +++ b/drivers/usb/phy/phy-fsl-usb.c @@ -1,5 +1,5 @@ diff --git a/target/linux/layerscape/patches-4.9/818-vfio-support-layerscape.patch b/target/linux/layerscape/patches-4.9/818-vfio-support-layerscape.patch index 4854738d3..05806a98d 100644 --- a/target/linux/layerscape/patches-4.9/818-vfio-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.9/818-vfio-support-layerscape.patch @@ -1,9 +1,9 @@ -From 8d82d92ea697145c32bb36d9f39afd5bb0927bc2 Mon Sep 17 00:00:00 2001 +From 954edeee88305fecefe3f681e67a298f06e27974 Mon Sep 17 00:00:00 2001 From: Yangbo Lu -Date: Wed, 27 Sep 2017 10:34:46 +0800 -Subject: [PATCH] vfio: support layerscape +Date: Wed, 17 Jan 2018 15:48:47 +0800 +Subject: [PATCH 30/30] vfio: support layerscape -This is a integrated patch for layerscape vfio support. +This is an integrated patch for layerscape vfio support. Signed-off-by: Bharat Bhushan Signed-off-by: Eric Auger diff --git a/target/linux/layerscape/patches-4.9/819-Revert-usb-kconfig-remove-dependency-FSL_SOC-for-ehc.patch b/target/linux/layerscape/patches-4.9/819-Revert-usb-kconfig-remove-dependency-FSL_SOC-for-ehc.patch deleted file mode 100644 index c2081b2d0..000000000 --- a/target/linux/layerscape/patches-4.9/819-Revert-usb-kconfig-remove-dependency-FSL_SOC-for-ehc.patch +++ /dev/null @@ -1,28 +0,0 @@ -From ba4f9dd74ccb9da91195b3570310754716064ef2 Mon Sep 17 00:00:00 2001 -From: Yangbo Lu -Date: Tue, 10 Oct 2017 15:55:31 +0800 -Subject: [PATCH] Revert "usb: kconfig: remove dependency FSL_SOC for ehci fsl - driver" - -This reverts commit 92042e8b3622a9bbfce0ebfc90edf6cd14d45708 on -LSDK linux (https://github.com/qoriq-open-source/linux). - -The patch reverted allowed to build ehci-fsl driver for non-PPC -platforms, but actually the driver was not ready. - -Signed-off-by: Yangbo Lu ---- - drivers/usb/host/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -165,7 +165,7 @@ config XPS_USB_HCD_XILINX - - config USB_EHCI_FSL - tristate "Support for Freescale PPC on-chip EHCI USB controller" -- depends on USB_EHCI_HCD -+ depends on FSL_SOC - select USB_EHCI_ROOT_HUB_TT - ---help--- - Variation of ARC USB block used in some Freescale chips. diff --git a/target/linux/mcs814x/image/Makefile b/target/linux/mcs814x/image/Makefile index 3afd660c1..ff905b308 100644 --- a/target/linux/mcs814x/image/Makefile +++ b/target/linux/mcs814x/image/Makefile @@ -20,7 +20,7 @@ UIMAGE:=$(BIN_DIR)/$(IMG_PREFIX)-uImage define Image/Build/MkuImage mkimage -A arm -O linux -T kernel -a $(LOADADDR) -C none -e $(LOADADDR) \ - -n 'ARM OpenWrt Linux-$(LINUX_VERSION)' -d $(1) $(2); + -n 'ARM $(VERSION_DIST) Linux-$(LINUX_VERSION)' -d $(1) $(2); endef define Image/Build/DTB diff --git a/target/linux/mediatek/Makefile b/target/linux/mediatek/Makefile index 4ebac09a6..6b30f3b19 100644 --- a/target/linux/mediatek/Makefile +++ b/target/linux/mediatek/Makefile @@ -6,10 +6,10 @@ ARCH:=arm BOARD:=mediatek BOARDNAME:=MediaTek Ralink ARM SUBTARGETS:=32 -FEATURES:=squashfs nand ubifs +FEATURES:=squashfs nand ramdisk fpu MAINTAINER:=John Crispin -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 KERNELNAME:=Image dtbs zImage diff --git a/target/linux/mediatek/base-files/etc/board.d/02_network b/target/linux/mediatek/base-files/etc/board.d/02_network index e071ab27a..8015cf3cc 100755 --- a/target/linux/mediatek/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/base-files/etc/board.d/02_network @@ -9,13 +9,11 @@ mediatek_setup_interfaces() local board="$1" case $board in - 'bananapi,bpi-r2' | \ - 'mediatek,mt7623-rfb-emmc' | \ - 'mediatek,mt7623-rfb-nand-ephy') + 'mediatek,mt7623a-rfb-emmc') ucidef_set_interface_lan "lan0 lan1 lan2 lan3" ucidef_set_interface_wan eth1 ;; - 'mediatek,mt7623-rfb-nand') + 'bananapi,bpi-r2') ucidef_set_interface_lan "lan0 lan1 lan2 lan3" ucidef_set_interface_wan wan ;; diff --git a/target/linux/mediatek/base-files/etc/config/mtkhnat b/target/linux/mediatek/base-files/etc/config/mtkhnat deleted file mode 100644 index a23bd1c22..000000000 --- a/target/linux/mediatek/base-files/etc/config/mtkhnat +++ /dev/null @@ -1,60 +0,0 @@ -config global global - option enable 0 - option upstream 1000000 - option downstream 1000000 - -config queue - option id 0 - option minrate 10 - option maxrate 50 - option weight 7 - option resv 32 - -config queue - option id 1 - option minrate 30 - option maxrate 100 - option weight 7 - option resv 32 - -config queue - option id 2 - option minrate 30 - option maxrate 100 - option weight 7 - option resv 32 - -config queue - option id 3 - option minrate 30 - option maxrate 100 - option weight 7 - option resv 32 - -config queue - option id 4 - option minrate 25 - option maxrate 100 - option weight 7 - option resv 32 - -config queue - option id 5 - option minrate 25 - option maxrate 100 - option weight 7 - option resv 32 - -config queue - option id 6 - option minrate 25 - option maxrate 100 - option weight 7 - option resv 32 - -config queue - option id 7 - option minrate 25 - option maxrate 100 - option weight 7 - option resv 32 diff --git a/target/linux/mediatek/base-files/etc/init.d/mtkhnat b/target/linux/mediatek/base-files/etc/init.d/mtkhnat deleted file mode 100755 index 32011e73a..000000000 --- a/target/linux/mediatek/base-files/etc/init.d/mtkhnat +++ /dev/null @@ -1,13 +0,0 @@ -#!/bin/sh /etc/rc.common - -START=90 - -USE_PROCD=1 -NAME=mtkhnat -PROG=/sbin/mtkhnat - -start_service() { - procd_open_instance - procd_set_param command "${PROG}" - procd_close_instance -} diff --git a/target/linux/mediatek/base-files/etc/uci-defaults/99-firewall b/target/linux/mediatek/base-files/etc/uci-defaults/99-firewall deleted file mode 100755 index 9a0dd9b5f..000000000 --- a/target/linux/mediatek/base-files/etc/uci-defaults/99-firewall +++ /dev/null @@ -1,9 +0,0 @@ -echo "iptables -t mangle -A FORWARD -i br-lan -o eth1 -p tcp -m mark --mark 0/0x7 -j MARK --set-mark 4/0x7" >> /etc/firewall.user -echo "iptables -t mangle -A FORWARD -i br-lan -o eth1 -p udp -m mark --mark 0/0x7 -j MARK --set-mark 5/0x7" >> /etc/firewall.user -echo "iptables -t mangle -A FORWARD -i eth1 -o br-lan -p tcp -m mark --mark 0/0x7 -j MARK --set-mark 4/0x7" >> /etc/firewall.user -echo "iptables -t mangle -A FORWARD -i eth1 -o br-lan -p udp -m mark --mark 0/0x7 -j MARK --set-mark 5/0x7" >> /etc/firewall.user - -echo "iptables -t mangle -A FORWARD -p udp -m mark --mark 0/0xf8 -j MARK --or-mark 0x60" >> /etc/firewall.user -echo "iptables -t mangle -A FORWARD -p tcp -m mark --mark 0/0xf8 -j MARK --or-mark 0xc0" >> /etc/firewall.user - -exit 0 diff --git a/target/linux/mediatek/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/base-files/lib/upgrade/platform.sh index 7161a4b84..0429ca8b8 100755 --- a/target/linux/mediatek/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/base-files/lib/upgrade/platform.sh @@ -6,13 +6,21 @@ platform_do_upgrade() { local tar_file="$1" local board="$(board_name)" - echo "flashing kernel" - tar xf $tar_file sysupgrade-$board/kernel -O | mtd write - kernel + case "$(board_name)" in + mediatek,mt7623-rfb-nand-ephy |\ + mediatek,mt7623-rfb-nand) + nand_do_upgrade $1 + ;; + *) + echo "flashing kernel" + tar xf $tar_file sysupgrade-$board/kernel -O | mtd write - kernel - echo "flashing rootfs" - tar xf $tar_file sysupgrade-$board/root -O | mtd write - rootfs + echo "flashing rootfs" + tar xf $tar_file sysupgrade-$board/root -O | mtd write - rootfs - return 0 + return 0 + ;; + esac } platform_check_image() { @@ -20,13 +28,8 @@ platform_check_image() { local board=$(board_name) case "$board" in - mediatek,mt7623-rfb-nand-ephy |\ - mediatek,mt7623-rfb-nand) - nand_do_platform_check $board $1 - return $? - ;; bananapi,bpi-r2 |\ - mediatek,mt7623-rfb-emmc) + mediatek,mt7623a-rfb-emmc) local kernel_length=`(tar xf $tar_file sysupgrade-$board/kernel -O | wc -c) 2> /dev/null` local rootfs_length=`(tar xf $tar_file sysupgrade-$board/root -O | wc -c) 2> /dev/null` ;; @@ -44,12 +47,3 @@ platform_check_image() { return 0 } - -platform_pre_upgrade() { - case "$(board_name)" in - mediatek,mt7623-rfb-nand-ephy |\ - mediatek,mt7623-rfb-nand) - nand_do_upgrade $1 - ;; - esac -} diff --git a/target/linux/mediatek/base-files/sbin/mtkhnat b/target/linux/mediatek/base-files/sbin/mtkhnat deleted file mode 100755 index fdfc8427c..000000000 --- a/target/linux/mediatek/base-files/sbin/mtkhnat +++ /dev/null @@ -1,64 +0,0 @@ -#!/bin/sh - -. /lib/functions.sh - -config_load mtkhnat -config_get enable global enable 0 - -[ "${enable}" -eq 1 ] || { - echo 0 ${sch_upstream} > /sys/kernel/debug/hnat/scheduler0 - echo 0 ${sch_downstream} > /sys/kernel/debug/hnat/scheduler1 - - rmmod mtkhnat - exit 0 -} - -insmod mtkhnat - -sleep 1 - -config_get sch_upstream global upstream 100000 -config_get sch_downstream global downstream 100000 - -echo 1 ${sch_upstream} > /sys/kernel/debug/hnat/scheduler0 -echo 1 ${sch_downstream} > /sys/kernel/debug/hnat/scheduler1 - -setup_queue() { - local queue_id queue_scheduler queue_minebl queue_maxebl queue_minrate queue_maxrate queue_resv minrate maxrate queue_weight - - config_get queue_id $1 id 0 - config_get queue_minrate $1 minrate 0 - config_get queue_maxrate $1 maxrate 0 - config_get queue_resv $1 resv 22 - config_get queue_weight $1 weight 7 - - [ "${queue_id}" -gt 7 ] && return 0 - - queue_minebl=1 - queue_maxebl=1 - queue_scheduler=0 - - [ "${queue_minrate}" -eq 0 ] && queue_minebl=0 - [ "${queue_maxrate}" -eq 0 ] && queue_maxebl=0 - - minrate=$((sch_upstream * $queue_minrate)) - minrate=$((minrate / 100)) - - maxrate=$((sch_upstream * $queue_maxrate)) - maxrate=$((maxrate / 100)) - - echo 0 ${queue_minebl} ${minrate} ${queue_maxebl} ${maxrate} ${queue_weight} ${queue_resv} > /sys/kernel/debug/hnat/queue${queue_id} - - queue_id=$((queue_id + 8)) - - minrate=$((sch_downstream * $queue_minrate)) - minrate=$((minrate / 100)) - - maxrate=$((sch_downstream * $queue_maxrate)) - maxrate=$((maxrate / 100)) - - echo 1 ${queue_minebl} ${minrate} ${queue_maxebl} ${maxrate} ${queue_weight} ${queue_resv} > /sys/kernel/debug/hnat/queue${queue_id} -} - -config_foreach setup_scheduler scheduler -config_foreach setup_queue queue diff --git a/target/linux/mediatek/config-4.9 b/target/linux/mediatek/config-4.14 similarity index 89% rename from target/linux/mediatek/config-4.9 rename to target/linux/mediatek/config-4.14 index 9d15a7d63..88165045c 100644 --- a/target/linux/mediatek/config-4.9 +++ b/target/linux/mediatek/config-4.14 @@ -1,9 +1,14 @@ +# CONFIG_AHCI_MTK is not set # CONFIG_AIO is not set CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAS_TICK_BROADCAST=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y @@ -14,6 +19,8 @@ CONFIG_ARCH_MULTIPLATFORM=y CONFIG_ARCH_MULTI_V6_V7=y CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y @@ -21,6 +28,7 @@ CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_ARM=y @@ -35,7 +43,7 @@ CONFIG_ARM_HAS_SG_CHAIN=y CONFIG_ARM_L1_CACHE_SHIFT=6 CONFIG_ARM_L1_CACHE_SHIFT_6=y # CONFIG_ARM_LPAE is not set -CONFIG_ARM_MT7623_CPUFREQ=y +CONFIG_ARM_MEDIATEK_CPUFREQ=y CONFIG_ARM_PATCH_IDIV=y CONFIG_ARM_PATCH_PHYS_VIRT=y # CONFIG_ARM_SMMU is not set @@ -46,8 +54,6 @@ CONFIG_ARM_VIRT_EXT=y CONFIG_ATAGS=y CONFIG_AUTO_ZRELADDR=y CONFIG_BLK_MQ_PCI=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 CONFIG_BOUNCE=y # CONFIG_CACHE_L2X0 is not set CONFIG_CC_STACKPROTECTOR=y @@ -56,14 +62,18 @@ CONFIG_CC_STACKPROTECTOR_REGULAR=y CONFIG_CLEANCACHE=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMDLINE="earlyprintk console=ttyS0,115200 rootfstype=squashfs,jffs2" -CONFIG_CMDLINE_EXTEND=y +CONFIG_CMDLINE_FORCE=y CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_MEDIATEK=y CONFIG_COMMON_CLK_MT2701=y +CONFIG_COMMON_CLK_MT2701_BDPSYS=y +CONFIG_COMMON_CLK_MT2701_ETHSYS=y +CONFIG_COMMON_CLK_MT2701_HIFSYS=y +CONFIG_COMMON_CLK_MT2701_IMGSYS=y +CONFIG_COMMON_CLK_MT2701_MMSYS=y +CONFIG_COMMON_CLK_MT2701_VDECSYS=y # CONFIG_COMMON_CLK_MT8135 is not set # CONFIG_COMMON_CLK_MT8173 is not set CONFIG_COMPACTION=y @@ -95,12 +105,14 @@ CONFIG_CPU_PABRT_V7=y CONFIG_CPU_PM=y CONFIG_CPU_RMAP=y # CONFIG_CPU_THERMAL is not set +CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V7=y CONFIG_CPU_V7=y CONFIG_CRC16=y # CONFIG_CRC32_SARWATE is not set CONFIG_CRC32_SLICEBY8=y CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_CTR=y @@ -128,6 +140,7 @@ CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y CONFIG_CRYPTO_WORKQUEUE=y CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_ALIGN_RODATA=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_GPIO=y CONFIG_DEBUG_INFO=y @@ -147,22 +160,29 @@ CONFIG_DEBUG_UNCOMPRESS=y # CONFIG_DEBUG_USER is not set CONFIG_DMADEVICES=y CONFIG_DMA_ENGINE=y +# CONFIG_DMA_NOOP_OPS is not set CONFIG_DMA_OF=y +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set CONFIG_DTC=y CONFIG_EARLY_PRINTK=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y CONFIG_ELF_CORE=y +CONFIG_EXPORTFS=y CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_FREEZER=y +CONFIG_FUTEX_PI=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_IRQ_SHOW_LEVEL=y CONFIG_GENERIC_MSI_IRQ=y @@ -170,12 +190,15 @@ CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y @@ -192,7 +215,6 @@ CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARM_ARCH_TIMER=y CONFIG_HAVE_ARM_SMCCC=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y @@ -202,6 +224,8 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y @@ -238,6 +262,8 @@ CONFIG_ICPLUS_PHY=y CONFIG_IIO=y # CONFIG_IIO_BUFFER is not set # CONFIG_IIO_TRIGGER is not set +CONFIG_INITRAMFS_COMPRESSION="" +# CONFIG_INITRAMFS_FORCE is not set CONFIG_INITRAMFS_ROOT_GID=1000 CONFIG_INITRAMFS_ROOT_UID=1000 CONFIG_INITRAMFS_SOURCE="/openwrt/trunk/build_dir/target-arm_cortex-a7_musl-1.1.14_eabi/root-mediatek /openwrt/trunk/target/linux/generic/image/initramfs-base-files.txt" @@ -253,7 +279,6 @@ CONFIG_IRQ_WORK=y CONFIG_KALLSYMS=y CONFIG_LEDS_MT6323=y CONFIG_LIBFDT=y -CONFIG_LOCKUP_DETECTOR=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y @@ -265,7 +290,8 @@ CONFIG_MACH_MT8127=y # CONFIG_MACH_MT8135 is not set CONFIG_MAGIC_SYSRQ=y CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BOARDINFO=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y CONFIG_MDIO_GPIO=y CONFIG_MEDIATEK_MT6577_AUXADC=y CONFIG_MEDIATEK_WATCHDOG=y @@ -308,14 +334,11 @@ CONFIG_MTK_TIMER=y CONFIG_MULTI_IRQ_HANDLER=y CONFIG_MUTEX_SPIN_ON_OWNER=y CONFIG_NEED_DMA_MAP_STATE=y -# CONFIG_NEON is not set +CONFIG_NEON=y CONFIG_NET_DSA=y -# CONFIG_NET_DSA_HWMON is not set CONFIG_NET_DSA_MT7530=y CONFIG_NET_DSA_TAG_MTK=y CONFIG_NET_FLOW_LIMIT=y -# CONFIG_NET_MEDIATEK_HNAT is not set -CONFIG_NET_MEDIATEK_HW_QOS=y CONFIG_NET_MEDIATEK_SOC=y CONFIG_NET_SWITCHDEV=y # CONFIG_NET_VENDOR_AURORA is not set @@ -347,7 +370,7 @@ CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PCI=y CONFIG_PCIEAER=y CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_MTK=y +CONFIG_PCIE_MEDIATEK=y CONFIG_PCIE_PME=y CONFIG_PCI_DOMAINS=y CONFIG_PCI_DOMAINS_GENERIC=y @@ -356,13 +379,11 @@ CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PERF_USE_VMALLOC=y CONFIG_PGTABLE_LEVELS=2 CONFIG_PHYLIB=y -CONFIG_PHY_MT65XX_USB3=y +CONFIG_PHY_MTK_TPHY=y CONFIG_PINCTRL=y CONFIG_PINCTRL_MT2701=y CONFIG_PINCTRL_MT6397=y -CONFIG_PINCTRL_MT7623=y CONFIG_PINCTRL_MT8127=y -# CONFIG_PINCTRL_MT8135 is not set CONFIG_PINCTRL_MTK=y CONFIG_PM=y CONFIG_PM_CLK=y @@ -374,7 +395,6 @@ CONFIG_PM_OPP=y CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y CONFIG_POWER_RESET=y -# CONFIG_POWER_RESET_BRCMKONA is not set CONFIG_POWER_SUPPLY=y CONFIG_PREEMPT=y CONFIG_PREEMPT_COUNT=y @@ -389,6 +409,7 @@ CONFIG_RAS=y CONFIG_RATIONAL=y CONFIG_RCU_CPU_STALL_TIMEOUT=21 # CONFIG_RCU_EXPERT is not set +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y @@ -398,6 +419,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_MT6323=y +# CONFIG_REGULATOR_MT6380 is not set # CONFIG_REGULATOR_MT6397 is not set # CONFIG_REGULATOR_QCOM_SPMI is not set CONFIG_RESET_CONTROLLER=y @@ -421,7 +443,6 @@ CONFIG_SMP=y CONFIG_SPARSE_IRQ=y CONFIG_SPI=y CONFIG_SPI_BITBANG=y -# CONFIG_SPI_CADENCE_QUADSPI is not set CONFIG_SPI_MASTER=y CONFIG_SPI_MT65XX=y CONFIG_SPMI=y @@ -434,13 +455,18 @@ CONFIG_SWIOTLB=y CONFIG_SWPHY=y CONFIG_SWP_EMULATE=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TASKS_RCU=y CONFIG_THERMAL=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_OF=y +CONFIG_THIN_ARCHIVES=y # CONFIG_THUMB2_KERNEL is not set CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_STATS=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_SRCU=y CONFIG_UBIFS_FS=y # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set CONFIG_UBIFS_FS_LZO=y @@ -451,11 +477,10 @@ CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_USB=y CONFIG_USB_COMMON=y # CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_MTU3 is not set CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_MTK=y -CONFIG_USB_XHCI_PCI=y CONFIG_USB_XHCI_PLATFORM=y CONFIG_USE_OF=y CONFIG_VECTORS_BASE=0xffff0000 diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/_mt7623.dtsi b/target/linux/mediatek/files/arch/arm/boot/dts/_mt7623.dtsi deleted file mode 100644 index 620ad95e7..000000000 --- a/target/linux/mediatek/files/arch/arm/boot/dts/_mt7623.dtsi +++ /dev/null @@ -1,804 +0,0 @@ -/* - * Copyright (c) 2016 MediaTek Inc. - * Author: John Crispin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include "skeleton64.dtsi" - - -/ { - compatible = "mediatek,mt7623"; - interrupt-parent = <&sysirq>; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "mediatek,mt6589-smp"; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x0>; - clocks = <&infracfg CLK_INFRA_CPUSEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points = < - 598000 1150000 - 747500 1150000 - 1040000 1150000 - 1196000 1200000 - 1300000 1300000 - >; - }; - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x1>; - clocks = <&infracfg CLK_INFRA_CPUSEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points = < - 598000 1150000 - 747500 1150000 - 1040000 1150000 - 1196000 1200000 - 1300000 1300000 - >; - }; - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x2>; - clocks = <&infracfg CLK_INFRA_CPUSEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points = < - 598000 1150000 - 747500 1150000 - 1040000 1150000 - 1196000 1200000 - 1300000 1300000 - >; - }; - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - reg = <0x3>; - clocks = <&infracfg CLK_INFRA_CPUSEL>, - <&apmixedsys CLK_APMIXED_MAINPLL>; - clock-names = "cpu", "intermediate"; - operating-points = < - 598000 1150000 - 747500 1150000 - 1040000 1150000 - 1196000 1200000 - 1300000 1300000 - >; - }; - }; - - system_clk: dummy13m { - compatible = "fixed-clock"; - clock-frequency = <13000000>; - #clock-cells = <0>; - }; - - rtc_clk: dummy32k { - compatible = "fixed-clock"; - clock-frequency = <32000>; - #clock-cells = <0>; - clock-output-names = "clk32k"; - }; - - clk26m: dummy26m { - compatible = "fixed-clock"; - clock-frequency = <26000000>; - #clock-cells = <0>; - clock-output-names = "clk26m"; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupt-parent = <&gic>; - interrupts = , - , - , - ; - clock-frequency = <13000000>; - arm,cpu-registers-not-fw-configured; - }; - - topckgen: power-controller@10000000 { - compatible = "mediatek,mt7623-topckgen", - "mediatek,mt2701-topckgen", - "syscon"; - reg = <0 0x10000000 0 0x1000>; - #clock-cells = <1>; - }; - - infracfg: power-controller@10001000 { - compatible = "mediatek,mt7623-infracfg", - "mediatek,mt2701-infracfg", - "syscon"; - reg = <0 0x10001000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pericfg: pericfg@10003000 { - compatible = "mediatek,mt7623-pericfg", - "mediatek,mt2701-pericfg", - "syscon"; - reg = <0 0x10003000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pio: pinctrl@10005000 { - compatible = "mediatek,mt7623-pinctrl"; - reg = <0 0x1000b000 0 0x1000>; - mediatek,pctl-regmap = <&syscfg_pctl_a>; - pins-are-numbered; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - interrupt-parent = <&gic>; - #interrupt-cells = <2>; - interrupts = , - ; - }; - - syscfg_pctl_a: syscfg@10005000 { - compatible = "mediatek,mt7623-pctl-a-syscfg", - "mediatek,mt2701-pctl-a-syscfg", - "syscon"; - reg = <0 0x10005000 0 0x1000>; - }; - - scpsys: scpsys@10006000 { - #power-domain-cells = <1>; - compatible = "mediatek,mt7623-scpsys", - "mediatek,mt2701-scpsys"; - reg = <0 0x10006000 0 0x1000>; - infracfg = <&infracfg>; - clocks = <&clk26m>, - <&topckgen CLK_TOP_MM_SEL>, - <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names = "mfg", "mm", "ethif"; - }; - - watchdog: watchdog@10007000 { - compatible = "mediatek,mt7623-wdt", - "mediatek,mt6589-wdt"; - reg = <0 0x10007000 0 0x100>; - }; - - timer: timer@10008000 { - compatible = "mediatek,mt7623-timer", - "mediatek,mt6577-timer"; - reg = <0 0x10008000 0 0x80>; - interrupts = ; - clocks = <&system_clk>, <&rtc_clk>; - clock-names = "system-clk", "rtc-clk"; - }; - - pwrap: pwrap@1000d000 { - compatible = "mediatek,mt7623-pwrap", - "mediatek,mt2701-pwrap"; - reg = <0 0x1000d000 0 0x1000>; - reg-names = "pwrap"; - interrupts = ; - resets = <&infracfg MT2701_INFRA_PMIC_WRAP_RST>; - reset-names = "pwrap"; - clocks = <&infracfg CLK_INFRA_PMICSPI>, - <&infracfg CLK_INFRA_PMICWRAP>; - clock-names = "spi", "wrap"; - }; - - cir: cir@10013000 { - compatible = "mediatek,mt7623-cir"; - reg = <0 0x10013000 0 0x1000>; - interrupts = ; - clocks = <&infracfg CLK_INFRA_IRRX>; - clock-names = "clk"; - status = "disabled"; - }; - - sysirq: interrupt-controller@10200100 { - compatible = "mediatek,mt7623-sysirq", - "mediatek,mt6577-sysirq"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0 0x10200100 0 0x1c>; - }; - - efuse: efuse@10206000 { - compatible = "mediatek,mt7623-efuse", - "mediatek,efuse"; - reg = <0 0x10206000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - - /* Data cells */ - thermal_calibration: calib@424 { - reg = <0x424 0xc>; - }; - }; - - apmixedsys: apmixedsys@10209000 { - compatible = "mediatek,mt7623-apmixedsys", - "mediatek,mt2701-apmixedsys"; - reg = <0 0x10209000 0 0x1000>; - #clock-cells = <1>; - }; - - rng: rng@1020f000 { - compatible = "mediatek,mt7623-rng"; - reg = <0 0x1020f000 0 0x1000>; - clocks = <&infracfg CLK_INFRA_TRNG>; - clock-names = "rng"; - }; - - gic: interrupt-controller@10211000 { - compatible = "arm,cortex-a7-gic"; - interrupt-controller; - #interrupt-cells = <3>; - interrupt-parent = <&gic>; - reg = <0 0x10211000 0 0x1000>, - <0 0x10212000 0 0x1000>, - <0 0x10214000 0 0x2000>, - <0 0x10216000 0 0x2000>; - }; - - auxadc: adc@11001000 { - compatible = "mediatek,mt7623-auxadc", - "mediatek,mt2701-auxadc"; - reg = <0 0x11001000 0 0x1000>; - clocks = <&pericfg CLK_PERI_AUXADC>; - clock-names = "main"; - #io-channel-cells = <1>; - }; - - uart0: serial@11002000 { - compatible = "mediatek,mt7623-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11002000 0 0x400>; - interrupts = ; - clocks = <&pericfg CLK_PERI_UART0_SEL>, - <&pericfg CLK_PERI_UART0>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart1: serial@11003000 { - compatible = "mediatek,mt7623-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11003000 0 0x400>; - interrupts = ; - clocks = <&pericfg CLK_PERI_UART1_SEL>, - <&pericfg CLK_PERI_UART1>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart2: serial@11004000 { - compatible = "mediatek,mt7623-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11004000 0 0x400>; - interrupts = ; - clocks = <&pericfg CLK_PERI_UART2_SEL>, - <&pericfg CLK_PERI_UART2>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - uart3: serial@11005000 { - compatible = "mediatek,mt7623-uart", - "mediatek,mt6577-uart"; - reg = <0 0x11005000 0 0x400>; - interrupts = ; - clocks = <&pericfg CLK_PERI_UART3_SEL>, - <&pericfg CLK_PERI_UART3>; - clock-names = "baud", "bus"; - status = "disabled"; - }; - - pwm: pwm@11006000 { - compatible = "mediatek,mt7623-pwm"; - - reg = <0 0x11006000 0 0x1000>; - resets = <&pericfg MT2701_PERI_PWM_SW_RST>; - reset-names = "pwm"; - - #pwm-cells = <2>; - clocks = <&topckgen CLK_TOP_PWM_SEL>, - <&pericfg CLK_PERI_PWM>, - <&pericfg CLK_PERI_PWM1>, - <&pericfg CLK_PERI_PWM2>, - <&pericfg CLK_PERI_PWM3>, - <&pericfg CLK_PERI_PWM4>, - <&pericfg CLK_PERI_PWM5>; - clock-names = "top", "main", "pwm1", "pwm2", - "pwm3", "pwm4", "pwm5"; - - status = "disabled"; - }; - - i2c0: i2c@11007000 { - compatible = "mediatek,mt7623-i2c", - "mediatek,mt6577-i2c"; - reg = <0 0x11007000 0 0x70>, - <0 0x11000200 0 0x80>; - interrupts = ; - clock-div = <16>; - clocks = <&pericfg CLK_PERI_I2C0>, - <&pericfg CLK_PERI_AP_DMA>; - clock-names = "main", "dma"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c1: i2c@11008000 { - compatible = "mediatek,mt7623-i2c", - "mediatek,mt6577-i2c"; - reg = <0 0x11008000 0 0x70>, - <0 0x11000280 0 0x80>; - interrupts = ; - clock-div = <16>; - clocks = <&pericfg CLK_PERI_I2C1>, - <&pericfg CLK_PERI_AP_DMA>; - clock-names = "main", "dma"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@11009000 { - compatible = "mediatek,mt7623-i2c", - "mediatek,mt6577-i2c"; - reg = <0 0x11009000 0 0x70>, - <0 0x11000300 0 0x80>; - interrupts = ; - clock-div = <16>; - clocks = <&pericfg CLK_PERI_I2C2>, - <&pericfg CLK_PERI_AP_DMA>; - clock-names = "main", "dma"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi0: spi@1100a000 { - compatible = "mediatek,mt7623-spi", - "mediatek,mt6589-spi"; - reg = <0 0x1100a000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_SPI0>; - clock-names = "main"; - - status = "disabled"; - }; - - thermal: thermal@1100b000 { - #thermal-sensor-cells = <1>; - compatible = "mediatek,mt2701-thermal", - "mediatek,mt2701-thermal"; - reg = <0 0x1100b000 0 0x1000>; - interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; - clocks = <&pericfg CLK_PERI_THERM>, - <&pericfg CLK_PERI_AUXADC>; - clock-names = "therm", "auxadc"; - resets = <&pericfg MT2701_PERI_THERM_SW_RST>; - reset-names = "therm"; - mediatek,auxadc = <&auxadc>; - mediatek,apmixedsys = <&apmixedsys>; - - nvmem-cells = <&thermal_calibration>; - nvmem-cell-names = "calibration-data"; - }; - - spi1: spi@11016000 { - compatible = "mediatek,mt7623-spi", - "mediatek,mt2701-spi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0x11016000 0 0x100>; - interrupts = ; - clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, - <&topckgen CLK_TOP_SPI1_SEL>, - <&pericfg CLK_PERI_SPI1>; - clock-names = "parent-clk", "sel-clk", "spi-clk"; - status = "disabled"; - }; - - spi2: spi@11017000 { - compatible = "mediatek,mt7623-spi", - "mediatek,mt2701-spi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0 0x11017000 0 0x1000>; - interrupts = ; - clocks = <&topckgen CLK_TOP_SYSPLL3_D2>, - <&topckgen CLK_TOP_SPI2_SEL>, - <&pericfg CLK_PERI_SPI2>; - clock-names = "parent-clk", "sel-clk", "spi-clk"; - status = "disabled"; - }; - - nandc: nfi@1100d000 { - compatible = "mediatek,mt7623-nfc", - "mediatek,mt2701-nfc"; - reg = <0 0x1100d000 0 0x1000>; - power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; - interrupts = ; - clocks = <&pericfg CLK_PERI_NFI>, - <&pericfg CLK_PERI_NFI_PAD>; - clock-names = "nfi_clk", "pad_clk"; - status = "disabled"; - ecc-engine = <&bch>; - #address-cells = <1>; - #size-cells = <0>; - }; - - bch: ecc@1100e000 { - compatible = "mediatek,mt7623-ecc", - "mediatek,mt2701-ecc"; - reg = <0 0x1100e000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_NFI_ECC>; - clock-names = "nfiecc_clk"; - status = "disabled"; - }; - - afe: audio-controller@11220000 { - compatible = "mediatek,mt7623-audio", - "mediatek,mt2701-audio"; - reg = <0 0x11220000 0 0x2000>, - <0 0x112a0000 0 0x20000>; - interrupts = ; - power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; - - clocks = <&infracfg CLK_INFRA_AUDIO>, - <&topckgen CLK_TOP_AUD_MUX1_SEL>, - <&topckgen CLK_TOP_AUD_MUX2_SEL>, - <&topckgen CLK_TOP_AUD_MUX1_DIV>, - <&topckgen CLK_TOP_AUD_MUX2_DIV>, - <&topckgen CLK_TOP_AUD_48K_TIMING>, - <&topckgen CLK_TOP_AUD_44K_TIMING>, - <&topckgen CLK_TOP_AUDPLL_MUX_SEL>, - <&topckgen CLK_TOP_APLL_SEL>, - <&topckgen CLK_TOP_AUD1PLL_98M>, - <&topckgen CLK_TOP_AUD2PLL_90M>, - <&topckgen CLK_TOP_HADDS2PLL_98M>, - <&topckgen CLK_TOP_HADDS2PLL_294M>, - <&topckgen CLK_TOP_AUDPLL>, - <&topckgen CLK_TOP_AUDPLL_D4>, - <&topckgen CLK_TOP_AUDPLL_D8>, - <&topckgen CLK_TOP_AUDPLL_D16>, - <&topckgen CLK_TOP_AUDPLL_D24>, - <&topckgen CLK_TOP_AUDINTBUS_SEL>, - <&clk26m>, - <&topckgen CLK_TOP_SYSPLL1_D4>, - <&topckgen CLK_TOP_AUD_K1_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K2_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K3_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K4_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K5_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K6_SRC_SEL>, - <&topckgen CLK_TOP_AUD_K1_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K2_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K3_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K4_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K5_SRC_DIV>, - <&topckgen CLK_TOP_AUD_K6_SRC_DIV>, - <&topckgen CLK_TOP_AUD_I2S1_MCLK>, - <&topckgen CLK_TOP_AUD_I2S2_MCLK>, - <&topckgen CLK_TOP_AUD_I2S3_MCLK>, - <&topckgen CLK_TOP_AUD_I2S4_MCLK>, - <&topckgen CLK_TOP_AUD_I2S5_MCLK>, - <&topckgen CLK_TOP_AUD_I2S6_MCLK>, - <&topckgen CLK_TOP_ASM_M_SEL>, - <&topckgen CLK_TOP_ASM_H_SEL>, - <&topckgen CLK_TOP_UNIVPLL2_D4>, - <&topckgen CLK_TOP_UNIVPLL2_D2>, - <&topckgen CLK_TOP_SYSPLL_D5>; - clock-names = "infra_sys_audio_clk", - "top_audio_mux1_sel", - "top_audio_mux2_sel", - "top_audio_mux1_div", - "top_audio_mux2_div", - "top_audio_48k_timing", - "top_audio_44k_timing", - "top_audpll_mux_sel", - "top_apll_sel", - "top_aud1_pll_98M", - "top_aud2_pll_90M", - "top_hadds2_pll_98M", - "top_hadds2_pll_294M", - "top_audpll", - "top_audpll_d4", - "top_audpll_d8", - "top_audpll_d16", - "top_audpll_d24", - "top_audintbus_sel", - "clk_26m", - "top_syspll1_d4", - "top_aud_k1_src_sel", - "top_aud_k2_src_sel", - "top_aud_k3_src_sel", - "top_aud_k4_src_sel", - "top_aud_k5_src_sel", - "top_aud_k6_src_sel", - "top_aud_k1_src_div", - "top_aud_k2_src_div", - "top_aud_k3_src_div", - "top_aud_k4_src_div", - "top_aud_k5_src_div", - "top_aud_k6_src_div", - "top_aud_i2s1_mclk", - "top_aud_i2s2_mclk", - "top_aud_i2s3_mclk", - "top_aud_i2s4_mclk", - "top_aud_i2s5_mclk", - "top_aud_i2s6_mclk", - "top_asm_m_sel", - "top_asm_h_sel", - "top_univpll2_d4", - "top_univpll2_d2", - "top_syspll_d5"; - }; - - mmc0: mmc@11230000 { - compatible = "mediatek,mt7623-mmc", - "mediatek,mt8135-mmc"; - reg = <0 0x11230000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_MSDC30_0>, - <&topckgen CLK_TOP_MSDC30_0_SEL>; - clock-names = "source", "hclk"; - status = "disabled"; - }; - - mmc1: mmc@11240000 { - compatible = "mediatek,mt7623-mmc", - "mediatek,mt8135-mmc"; - reg = <0 0x11240000 0 0x1000>; - interrupts = ; - clocks = <&pericfg CLK_PERI_MSDC30_1>, - <&topckgen CLK_TOP_MSDC30_1_SEL>; - clock-names = "source", "hclk"; - status = "disabled"; - }; - - usb1: usb@1a1c0000 { - compatible = "mediatek,mt7623-xhci", - "mediatek,mt8173-xhci"; - reg = <0 0x1a1c0000 0 0x1000>, - <0 0x1a1c4700 0 0x0100>; - interrupts = ; - clocks = <&hifsys CLK_HIFSYS_USB0PHY>, - <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names = "sys_ck", "ethif"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; - phys = <&phy_port0 PHY_TYPE_USB3>; - status = "disabled"; - }; - - u3phy1: usb-phy@1a1c4000 { - compatible = "mediatek,mt2701-u3phy", - "mediatek,mt8173-u3phy"; - reg = <0 0x1a1c4000 0 0x0700>; - clocks = <&clk26m>; - clock-names = "u3phya_ref"; - #phy-cells = <1>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - status = "disabled"; - - phy_port0: phy_port0: port@1a1c4800 { - reg = <0 0x1a1c4800 0 0x800>; - #phy-cells = <1>; - status = "okay"; - }; - }; - - usb2: usb@1a240000 { - compatible = "mediatek,mt2701-xhci", - "mediatek,mt8173-xhci"; - reg = <0 0x1a240000 0 0x1000>, - <0 0x1a244700 0 0x0100>; - interrupts = ; - clocks = <&hifsys CLK_HIFSYS_USB1PHY>, - <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names = "sys_ck", "ethif"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; - phys = <&u3phy2 0>; - status = "disabled"; - }; - - u3phy2: usb-phy@1a244000 { - compatible = "mediatek,mt2701-u3phy", - "mediatek,mt8173-u3phy"; - reg = <0 0x1a244000 0 0x0700>, - <0 0x1a244800 0 0x0800>; - clocks = <&clk26m>; - clock-names = "u3phya_ref"; - #phy-cells = <1>; - status = "disabled"; - }; - - hifsys: clock-controller@1a000000 { - compatible = "mediatek,mt7623-hifsys", - "mediatek,mt2701-hifsys", - "syscon"; - reg = <0 0x1a000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pcie: pcie@1a140000 { - compatible = "mediatek,mt7623-pcie"; - device_type = "pci"; - reg = <0 0x1a140000 0 0x8000>, /* PCI-Express registers */ - <0 0x1a149000 0 0x1000>, /* PCI-Express PHY0 */ - <0 0x1a14a000 0 0x1000>, /* PCI-Express PHY1 */ - <0 0x1a244000 0 0x1000>; /* PCI-Express PHY2 */ - reg-names = "pcie", "pcie phy0", "pcie phy1", "pcie phy2"; - interrupts = , - , - ; - interrupt-names = "pcie0", "pcie1", "pcie2"; - clocks = <&topckgen CLK_TOP_ETHIF_SEL>; - clock-names = "pcie"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; - resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>, - <&hifsys MT2701_HIFSYS_PCIE1_RST>, - <&hifsys MT2701_HIFSYS_PCIE2_RST>; - reset-names = "pcie0", "pcie1", "pcie2"; - - mediatek,hifsys = <&hifsys>; - - bus-range = <0x00 0xff>; - #address-cells = <3>; - #size-cells = <2>; - - ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000 /* io space */ - 0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* pci memory */ - - status = "disabled"; - - pcie@1,0 { - device_type = "pci"; - reg = <0x0800 0 0 0 0>; - - #address-cells = <3>; - #size-cells = <2>; - ranges; - }; - - pcie@2,0{ - device_type = "pci"; - reg = <0x1000 0 0 0 0>; - - #address-cells = <3>; - #size-cells = <2>; - ranges; - }; - - pcie@3,0{ - device_type = "pci"; - reg = <0x1800 0 0 0 0>; - - #address-cells = <3>; - #size-cells = <2>; - ranges; - }; - }; - - ethsys: syscon@1b000000 { - compatible = "mediatek,mt7623-ethsys", - "mediatek,mt2701-ethsys", - "syscon"; - reg = <0 0x1b000000 0 0x1000>; - #reset-cells = <1>; - #clock-cells = <1>; - }; - - eth: ethernet@1b100000 { - compatible = "mediatek,mt7623-eth", - "mediatek,mt2701-eth", - "syscon"; - reg = <0 0x1b100000 0 0x20000>; - - clocks = <&topckgen CLK_TOP_ETHIF_SEL>, - <ðsys CLK_ETHSYS_ESW>, - <ðsys CLK_ETHSYS_GP2>, - <ðsys CLK_ETHSYS_GP1>, - <&apmixedsys CLK_APMIXED_TRGPLL>; - clock-names = "ethif", "esw", "gp2", "gp1", "trgpll"; - interrupts = ; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; - - resets = <ðsys 6>; - reset-names = "eth"; - - mediatek,ethsys = <ðsys>; - mediatek,pctl = <&syscfg_pctl_a>; - - #address-cells = <1>; - #size-cells = <0>; - - status = "disabled"; - - gmac1: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - - status = "disabled"; - - phy-mode = "trgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - gmac2: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - - status = "disabled"; - }; - - mdio0: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - hnat: hnat@1b000000 { - compatible = "mediatek,mt7623-hnat"; - reg = <0 0x1b100000 0 0x3000>; - mtketh-wan = "eth1"; - resets = <ðsys 0>; - reset-names = "mtketh"; - }; - - crypto: crypto@1b240000 { - compatible = "mediatek,mt7623-crypto", "mediatek,eip97-crypto"; - reg = <0 0x1b240000 0 0x20000>; - interrupts = , - , - , - , - ; - clocks = <&topckgen CLK_TOP_ETHIF_SEL>, - <ðsys CLK_ETHSYS_CRYPTO>; - clock-names = "ethif","cryp"; - power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>; - }; -}; diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt6323.dtsi b/target/linux/mediatek/files/arch/arm/boot/dts/mt6323.dtsi deleted file mode 100644 index 7c783d6c7..000000000 --- a/target/linux/mediatek/files/arch/arm/boot/dts/mt6323.dtsi +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Copyright (c) 2017 MediaTek Inc. - * Author: John Crispin - * Sean Wang - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -&pwrap { - pmic: mt6323 { - compatible = "mediatek,mt6323"; - interrupt-parent = <&pio>; - interrupts = <150 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <2>; - - mt6323regulator: mt6323regulator{ - compatible = "mediatek,mt6323-regulator"; - - mt6323_vproc_reg: buck_vproc{ - regulator-name = "vproc"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vsys_reg: buck_vsys{ - regulator-name = "vsys"; - regulator-min-microvolt = <1400000>; - regulator-max-microvolt = <2987500>; - regulator-ramp-delay = <25000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vpa_reg: buck_vpa{ - regulator-name = "vpa"; - regulator-min-microvolt = < 500000>; - regulator-max-microvolt = <3650000>; - }; - - mt6323_vtcxo_reg: ldo_vtcxo{ - regulator-name = "vtcxo"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <90>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcn28_reg: ldo_vcn28{ - regulator-name = "vcn28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_bt_reg: ldo_vcn33_bt{ - regulator-name = "vcn33_bt"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{ - regulator-name = "vcn33_wifi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_va_reg: ldo_va{ - regulator-name = "va"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcama_reg: ldo_vcama{ - regulator-name = "vcama"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vio28_reg: ldo_vio28{ - regulator-name = "vio28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vusb_reg: ldo_vusb{ - regulator-name = "vusb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - regulator-boot-on; - }; - - mt6323_vmc_reg: ldo_vmc{ - regulator-name = "vmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vmch_reg: ldo_vmch{ - regulator-name = "vmch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vemc3v3_reg: ldo_vemc3v3{ - regulator-name = "vemc3v3"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vgp1_reg: ldo_vgp1{ - regulator-name = "vgp1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp2_reg: ldo_vgp2{ - regulator-name = "vgp2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp3_reg: ldo_vgp3{ - regulator-name = "vgp3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcn18_reg: ldo_vcn18{ - regulator-name = "vcn18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim1_reg: ldo_vsim1{ - regulator-name = "vsim1"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim2_reg: ldo_vsim2{ - regulator-name = "vsim2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vrtc_reg: ldo_vrtc{ - regulator-name = "vrtc"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamaf_reg: ldo_vcamaf{ - regulator-name = "vcamaf"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vibr_reg: ldo_vibr{ - regulator-name = "vibr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - }; - - mt6323_vrf18_reg: ldo_vrf18{ - regulator-name = "vrf18"; - regulator-min-microvolt = <1825000>; - regulator-max-microvolt = <1825000>; - regulator-enable-ramp-delay = <187>; - }; - - mt6323_vm_reg: ldo_vm{ - regulator-name = "vm"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vio18_reg: ldo_vio18{ - regulator-name = "vio18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamd_reg: ldo_vcamd{ - regulator-name = "vcamd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcamio_reg: ldo_vcamio{ - regulator-name = "vcamio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - }; - }; -}; diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND-ePHY.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND-ePHY.dts deleted file mode 100644 index bcd2df264..000000000 --- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND-ePHY.dts +++ /dev/null @@ -1,523 +0,0 @@ -/* - * Copyright (c) 2016 MediaTek Inc. - * Author: John Crispin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -#include "_mt7623.dtsi" -#include - -/ { - model = "MediaTek MT7623 NAND reference board"; - compatible = "mediatek,mt7623-rfb-nand-ephy", "mediatek,mt7623"; - - chosen { - stdout-path = &uart2; - }; - - memory { - reg = <0 0x80000000 0 0x20000000>; - }; - - usb_p1_vbus: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&pio 135 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; -}; - -&cpu0 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu1 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu2 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu3 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&pwrap { - pmic: mt6323 { - compatible = "mediatek,mt6323"; - interrupt-parent = <&pio>; - interrupts = <150 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <2>; - - mt6323regulator: mt6323regulator{ - compatible = "mediatek,mt6323-regulator"; - - mt6323_vproc_reg: buck_vproc{ - regulator-name = "vproc"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vsys_reg: buck_vsys{ - regulator-name = "vsys"; - regulator-min-microvolt = <1400000>; - regulator-max-microvolt = <2987500>; - regulator-ramp-delay = <25000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vpa_reg: buck_vpa{ - regulator-name = "vpa"; - regulator-min-microvolt = < 500000>; - regulator-max-microvolt = <3650000>; - }; - - mt6323_vtcxo_reg: ldo_vtcxo{ - regulator-name = "vtcxo"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <90>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcn28_reg: ldo_vcn28{ - regulator-name = "vcn28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_bt_reg: ldo_vcn33_bt{ - regulator-name = "vcn33_bt"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{ - regulator-name = "vcn33_wifi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_va_reg: ldo_va{ - regulator-name = "va"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcama_reg: ldo_vcama{ - regulator-name = "vcama"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vio28_reg: ldo_vio28{ - regulator-name = "vio28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vusb_reg: ldo_vusb{ - regulator-name = "vusb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - regulator-boot-on; - }; - - mt6323_vmc_reg: ldo_vmc{ - regulator-name = "vmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vmch_reg: ldo_vmch{ - regulator-name = "vmch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vemc3v3_reg: ldo_vemc3v3{ - regulator-name = "vemc3v3"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vgp1_reg: ldo_vgp1{ - regulator-name = "vgp1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp2_reg: ldo_vgp2{ - regulator-name = "vgp2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp3_reg: ldo_vgp3{ - regulator-name = "vgp3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcn18_reg: ldo_vcn18{ - regulator-name = "vcn18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim1_reg: ldo_vsim1{ - regulator-name = "vsim1"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim2_reg: ldo_vsim2{ - regulator-name = "vsim2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vrtc_reg: ldo_vrtc{ - regulator-name = "vrtc"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamaf_reg: ldo_vcamaf{ - regulator-name = "vcamaf"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vibr_reg: ldo_vibr{ - regulator-name = "vibr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - }; - - mt6323_vrf18_reg: ldo_vrf18{ - regulator-name = "vrf18"; - regulator-min-microvolt = <1825000>; - regulator-max-microvolt = <1825000>; - regulator-enable-ramp-delay = <187>; - }; - - mt6323_vm_reg: ldo_vm{ - regulator-name = "vm"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vio18_reg: ldo_vio18{ - regulator-name = "vio18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamd_reg: ldo_vcamd{ - regulator-name = "vcamd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcamio_reg: ldo_vcamio{ - regulator-name = "vcamio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - }; - - mt6323led: leds { - compatible = "mediatek,mt6323-led"; - #address-cells = <1>; - #size-cells = <0>; - - led@0 { - reg = <0>; - label = "LED0"; - linux,default-trigger = "timer"; - default-state = "on"; - }; - led@1 { - reg = <1>; - label = "LED1"; - default-state = "off"; - }; - led@2 { - reg = <2>; - label = "LED2"; - default-state = "on"; - }; - led@3 { - reg = <3>; - label = "LED3"; - default-state = "on"; - }; - }; - }; -}; - -&uart2 { - status = "okay"; -}; - -&pio { - nand_pins_default: nanddefault { - pins_dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up; - }; - - pins_we { - pinmux = ; - drive-strength = ; - bias-pull-up = ; - }; - - pins_ale { - pinmux = ; - drive-strength = ; - bias-pull-down = ; - }; - }; - - eth_default: eth { - pins_eth { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - - pins_eth_rst { - pinmux = ; - output-low; - }; - }; - - pwm_pins: pwm { - pins_pwm1 { - pinmux = ; - }; - - pins_pwm2 { - pinmux = ; - }; - }; -}; - -&nandc { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins_default>; - nand@0 { - reg = <0>; - spare_per_sector = <64>; - nand-ecc-mode = "hw"; - nand-ecc-strength = <12>; - nand-ecc-step-size = <1024>; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@C0000 { - label = "uboot-env"; - reg = <0xC0000 0x40000>; - }; - - partition@100000 { - label = "factory"; - reg = <0x100000 0x40000>; - }; - - partition@140000 { - label = "kernel"; - reg = <0x140000 0x2000000>; - }; - - partition@2140000 { - label = "recovery"; - reg = <0x2140000 0x2000000>; - }; - - partition@4140000 { - label = "ubi"; - reg = <0x4140000 0x1000000>; - }; - }; - }; -}; -&bch { - status = "okay"; -}; - -&usb1 { - vusb33-supply = <&mt6323_vusb_reg>; - vbus-supply = <&usb_p1_vbus>; - status = "okay"; -}; - -&u3phy1 { - status = "okay"; -}; - -&pcie { - status = "okay"; -}; - -ð { - status = "okay"; -}; - -&gmac1 { - mac-address = [00 11 22 33 44 56]; - status = "okay"; -}; - -&gmac2 { - mac-address = [00 11 22 33 44 55]; - status = "okay"; - - phy-handle = <&phy5>; -}; - -&mdio0 { - switch@0 { - compatible = "mediatek,mt7530"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - pinctrl-names = "default"; - pinctrl-0 = <ð_default>; - - core-supply = <&mt6323_vpa_reg>; - io-supply = <&mt6323_vemc3v3_reg>; - - mediatek,mcm; - resets = <ðsys 2>; - reset-names = "mcm"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - port@0 { - reg = <0>; - label = "lan0"; - }; - - port@1 { - reg = <1>; - label = "lan1"; - }; - - port@2 { - reg = <2>; - label = "lan2"; - }; - - port@3 { - reg = <3>; - label = "lan3"; - }; - - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <&gmac1>; - phy-mode = "trgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - - phy5: ethernet-phy@5 { - reg = <5>; - phy-mode = "rgmii-rxid"; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts deleted file mode 100644 index d9f08d015..000000000 --- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-NAND.dts +++ /dev/null @@ -1,553 +0,0 @@ -/* - * Copyright (c) 2016 MediaTek Inc. - * Author: John Crispin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -#include "_mt7623.dtsi" -#include - -/ { - model = "MediaTek MT7623 NAND reference board"; - compatible = "mediatek,mt7623-rfb-nand", "mediatek,mt7623"; - - chosen { - stdout-path = &uart2; - }; - - memory { - reg = <0 0x80000000 0 0x20000000>; - }; - - usb_p1_vbus: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&pio 135 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; -}; - -&cpu0 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu1 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu2 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu3 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&pwrap { - pmic: mt6323 { - compatible = "mediatek,mt6323"; - interrupt-parent = <&pio>; - interrupts = <150 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <2>; - - mt6323regulator: mt6323regulator{ - compatible = "mediatek,mt6323-regulator"; - - mt6323_vproc_reg: buck_vproc{ - regulator-name = "vproc"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vsys_reg: buck_vsys{ - regulator-name = "vsys"; - regulator-min-microvolt = <1400000>; - regulator-max-microvolt = <2987500>; - regulator-ramp-delay = <25000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vpa_reg: buck_vpa{ - regulator-name = "vpa"; - regulator-min-microvolt = < 500000>; - regulator-max-microvolt = <3650000>; - }; - - mt6323_vtcxo_reg: ldo_vtcxo{ - regulator-name = "vtcxo"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <90>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcn28_reg: ldo_vcn28{ - regulator-name = "vcn28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_bt_reg: ldo_vcn33_bt{ - regulator-name = "vcn33_bt"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{ - regulator-name = "vcn33_wifi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_va_reg: ldo_va{ - regulator-name = "va"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcama_reg: ldo_vcama{ - regulator-name = "vcama"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vio28_reg: ldo_vio28{ - regulator-name = "vio28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vusb_reg: ldo_vusb{ - regulator-name = "vusb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - regulator-boot-on; - }; - - mt6323_vmc_reg: ldo_vmc{ - regulator-name = "vmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vmch_reg: ldo_vmch{ - regulator-name = "vmch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vemc3v3_reg: ldo_vemc3v3{ - regulator-name = "vemc3v3"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vgp1_reg: ldo_vgp1{ - regulator-name = "vgp1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp2_reg: ldo_vgp2{ - regulator-name = "vgp2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp3_reg: ldo_vgp3{ - regulator-name = "vgp3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcn18_reg: ldo_vcn18{ - regulator-name = "vcn18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim1_reg: ldo_vsim1{ - regulator-name = "vsim1"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim2_reg: ldo_vsim2{ - regulator-name = "vsim2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vrtc_reg: ldo_vrtc{ - regulator-name = "vrtc"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamaf_reg: ldo_vcamaf{ - regulator-name = "vcamaf"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vibr_reg: ldo_vibr{ - regulator-name = "vibr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - }; - - mt6323_vrf18_reg: ldo_vrf18{ - regulator-name = "vrf18"; - regulator-min-microvolt = <1825000>; - regulator-max-microvolt = <1825000>; - regulator-enable-ramp-delay = <187>; - }; - - mt6323_vm_reg: ldo_vm{ - regulator-name = "vm"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vio18_reg: ldo_vio18{ - regulator-name = "vio18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamd_reg: ldo_vcamd{ - regulator-name = "vcamd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcamio_reg: ldo_vcamio{ - regulator-name = "vcamio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - }; - - mt6323led: leds { - compatible = "mediatek,mt6323-led"; - #address-cells = <1>; - #size-cells = <0>; - - led@0 { - reg = <0>; - label = "LED0"; - linux,default-trigger = "timer"; - default-state = "on"; - }; - led@1 { - reg = <1>; - label = "LED1"; - default-state = "off"; - }; - led@2 { - reg = <2>; - label = "LED2"; - default-state = "on"; - }; - led@3 { - reg = <3>; - label = "LED3"; - default-state = "on"; - }; - }; - }; -}; - -&uart2 { - status = "okay"; -}; - -&pio { - nand_pins_default: nanddefault { - pins_dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up; - }; - - pins_we { - pinmux = ; - drive-strength = ; - bias-pull-up = ; - }; - - pins_ale { - pinmux = ; - drive-strength = ; - bias-pull-down = ; - }; - }; - - eth_default: eth { - pins_eth { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - - pins_eth_rst { - pinmux = ; - output-low; - }; - }; - - pwm_pins: pwm { - pins_pwm1 { - pinmux = ; - }; - - pins_pwm2 { - pinmux = ; - }; - }; -}; - -&nandc { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&nand_pins_default>; - nand@0 { - reg = <0>; - spare_per_sector = <64>; - nand-ecc-mode = "hw"; - nand-ecc-strength = <12>; - nand-ecc-step-size = <1024>; - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@C0000 { - label = "uboot-env"; - reg = <0xC0000 0x40000>; - }; - - partition@100000 { - label = "factory"; - reg = <0x100000 0x40000>; - }; - - partition@140000 { - label = "kernel"; - reg = <0x140000 0x2000000>; - }; - - partition@2140000 { - label = "recovery"; - reg = <0x2140000 0x2000000>; - }; - - partition@4140000 { - label = "ubi"; - reg = <0x4140000 0x1000000>; - }; - }; - }; -}; -&bch { - status = "okay"; -}; - -&usb1 { - vusb33-supply = <&mt6323_vusb_reg>; - vbus-supply = <&usb_p1_vbus>; - status = "okay"; -}; - -&u3phy1 { - status = "okay"; -}; - -&pcie { - status = "okay"; -}; - -ð { - status = "okay"; -}; - -&gmac1 { - mac-address = [00 11 22 33 44 56]; - status = "okay"; - - phy-mode = "trgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; -}; - -&gmac2 { - mac-address = [00 11 22 33 44 55]; - status = "okay"; - - phy-mode = "trgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; -}; - -&mdio0 { - switch@0 { - compatible = "mediatek,mt7530"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - pinctrl-names = "default"; - pinctrl-0 = <ð_default>; - - core-supply = <&mt6323_vpa_reg>; - io-supply = <&mt6323_vemc3v3_reg>; - - mediatek,mcm; - resets = <ðsys 2>; - reset-names = "mcm"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - port@0 { - reg = <0>; - label = "lan0"; - cpu = <&cpu_port0>; - }; - - port@1 { - reg = <1>; - label = "lan1"; - cpu = <&cpu_port0>; - }; - - port@2 { - reg = <2>; - label = "lan2"; - cpu = <&cpu_port0>; - }; - - port@3 { - reg = <3>; - label = "lan3"; - cpu = <&cpu_port0>; - }; - - port@4 { - reg = <4>; - label = "wan"; - cpu = <&cpu_port1>; - }; - - cpu_port1: port@5 { - reg = <5>; - label = "cpu"; - ethernet = <&gmac2>; - phy-mode = "trgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - cpu_port0: port@6 { - reg = <6>; - label = "cpu"; - ethernet = <&gmac1>; - phy-mode = "trgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts deleted file mode 100644 index 6f45ff686..000000000 --- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-eMMC.dts +++ /dev/null @@ -1,547 +0,0 @@ -/* - * Copyright (c) 2016 MediaTek Inc. - * Author: John Crispin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; - -#include "_mt7623.dtsi" -#include - -/ { - model = "MediaTek MT7623 eMMC reference board"; - compatible = "mediatek,mt7623-rfb-emmc", "mediatek,mt7623"; - - chosen { - stdout-path = &uart2; - bootargs = "earlyprintk block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool) rootfstype=squashfs,jffs2"; - }; - - memory { - reg = <0 0x80000000 0 0x20000000>; - }; - - usb_p1_vbus: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&pio 135 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - switch { - compatible = "mediatek,mt7530"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - dsa,mii-bus = <&mdio0>; - - pinctrl-names = "default"; - pinctrl-0 = <ð_default>; - - core-supply = <&mt6323_vpa_reg>; - io-supply = <&mt6323_vemc3v3_reg>; - - mediatek,mcm; - resets = <ðsys 2>; - reset-names = "mcm"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - port@0 { - reg = <0>; - label = "lan0"; - }; - - port@1 { - reg = <1>; - label = "lan1"; - }; - - port@2 { - reg = <2>; - label = "lan2"; - }; - - port@3 { - reg = <3>; - label = "lan3"; - }; - - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <&gmac1>; - phy-mode = "trgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; -}; - -&cpu0 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu1 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu2 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&cpu3 { - proc-supply = <&mt6323_vproc_reg>; -}; - -&pwrap { - pmic: mt6323 { - compatible = "mediatek,mt6323"; - interrupt-parent = <&pio>; - interrupts = <150 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <2>; - - mt6323regulator: mt6323regulator{ - compatible = "mediatek,mt6323-regulator"; - - mt6323_vproc_reg: buck_vproc{ - regulator-name = "vproc"; - regulator-min-microvolt = < 700000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vsys_reg: buck_vsys{ - regulator-name = "vsys"; - regulator-min-microvolt = <1400000>; - regulator-max-microvolt = <2987500>; - regulator-ramp-delay = <25000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vpa_reg: buck_vpa{ - regulator-name = "vpa"; - regulator-min-microvolt = < 500000>; - regulator-max-microvolt = <3650000>; - }; - - mt6323_vtcxo_reg: ldo_vtcxo{ - regulator-name = "vtcxo"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <90>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcn28_reg: ldo_vcn28{ - regulator-name = "vcn28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_bt_reg: ldo_vcn33_bt{ - regulator-name = "vcn33_bt"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_vcn33_wifi_reg: ldo_vcn33_wifi{ - regulator-name = "vcn33_wifi"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3600000>; - regulator-enable-ramp-delay = <185>; - }; - - mt6323_va_reg: ldo_va{ - regulator-name = "va"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcama_reg: ldo_vcama{ - regulator-name = "vcama"; - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vio28_reg: ldo_vio28{ - regulator-name = "vio28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vusb_reg: ldo_vusb{ - regulator-name = "vusb"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - regulator-boot-on; - }; - - mt6323_vmc_reg: ldo_vmc{ - regulator-name = "vmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vmch_reg: ldo_vmch{ - regulator-name = "vmch"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vemc3v3_reg: ldo_vemc3v3{ - regulator-name = "vemc3v3"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - regulator-boot-on; - }; - - mt6323_vgp1_reg: ldo_vgp1{ - regulator-name = "vgp1"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp2_reg: ldo_vgp2{ - regulator-name = "vgp2"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vgp3_reg: ldo_vgp3{ - regulator-name = "vgp3"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcn18_reg: ldo_vcn18{ - regulator-name = "vcn18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim1_reg: ldo_vsim1{ - regulator-name = "vsim1"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vsim2_reg: ldo_vsim2{ - regulator-name = "vsim2"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vrtc_reg: ldo_vrtc{ - regulator-name = "vrtc"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamaf_reg: ldo_vcamaf{ - regulator-name = "vcamaf"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vibr_reg: ldo_vibr{ - regulator-name = "vibr"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <3300000>; - regulator-enable-ramp-delay = <36>; - }; - - mt6323_vrf18_reg: ldo_vrf18{ - regulator-name = "vrf18"; - regulator-min-microvolt = <1825000>; - regulator-max-microvolt = <1825000>; - regulator-enable-ramp-delay = <187>; - }; - - mt6323_vm_reg: ldo_vm{ - regulator-name = "vm"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vio18_reg: ldo_vio18{ - regulator-name = "vio18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - regulator-always-on; - regulator-boot-on; - }; - - mt6323_vcamd_reg: ldo_vcamd{ - regulator-name = "vcamd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - - mt6323_vcamio_reg: ldo_vcamio{ - regulator-name = "vcamio"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-enable-ramp-delay = <216>; - }; - }; - }; -}; - -&uart2 { - status = "okay"; -}; - -&mmc0 { - status = "okay"; - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&mmc0_pins_default>; - pinctrl-1 = <&mmc0_pins_uhs>; - bus-width = <8>; - max-frequency = <50000000>; - cap-mmc-highspeed; - vmmc-supply = <&mt6323_vemc3v3_reg>; - vqmmc-supply = <&mt6323_vio18_reg>; - non-removable; -}; - -&mmc1 { - status = "okay"; - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&mmc1_pins_default>; - pinctrl-1 = <&mmc1_pins_uhs>; - bus-width = <4>; - max-frequency = <50000000>; - cap-sd-highspeed; - sd-uhs-sdr25; -// cd-gpios = <&pio 132 0>; - vmmc-supply = <&mt6323_vmch_reg>; - vqmmc-supply = <&mt6323_vmc_reg>; -}; - -&pio { - mmc0_pins_default: mmc0default { - pins_cmd_dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - bias-pull-up; - }; - - pins_clk { - pinmux = ; - bias-pull-down; - }; - - pins_rst { - pinmux = ; - bias-pull-up; - }; - }; - - mmc0_pins_uhs: mmc0 { - pins_cmd_dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up = ; - }; - - pins_clk { - pinmux = ; - drive-strength = ; - bias-pull-down = ; - }; - - pins_rst { - pinmux = ; - bias-pull-up; - }; - }; - - mmc1_pins_default: mmc1default { - pins_cmd_dat { - pinmux = , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up = ; - }; - - pins_clk { - pinmux = ; - bias-pull-down; - drive-strength = ; - }; - -// pins_insert { -// pinmux = ; -// bias-pull-up; -// }; - }; - - mmc1_pins_uhs: mmc1 { - pins_cmd_dat { - pinmux = , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up = ; - }; - - pins_clk { - pinmux = ; - drive-strength = ; - bias-pull-down = ; - }; - }; - - eth_default: eth { - pins_eth { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - - pins_eth_rst { - pinmux = ; - output-low; - }; - }; - - pwm_pins: pwm { - pins_pwm1 { - pinmux = ; - }; - - pins_pwm2 { - pinmux = ; - }; - }; -}; - -&usb1 { - vusb33-supply = <&mt6323_vusb_reg>; - vbus-supply = <&usb_p1_vbus>; - status = "okay"; -}; - -&u3phy1 { - status = "okay"; -}; - -&pcie { - status = "okay"; -}; - -ð { - status = "okay"; -}; - -&gmac1 { - mac-address = [00 11 22 33 44 56]; - status = "okay"; -}; - -&gmac2 { - mac-address = [00 11 22 33 44 55]; - status = "okay"; - - phy-handle = <&phy5>; -}; - -&mdio0 { - phy5: ethernet-phy@5 { - reg = <5>; - phy-mode = "rgmii-rxid"; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-evb.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-evb.dts deleted file mode 100644 index ad2a38bd0..000000000 --- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623-evb.dts +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2016 MediaTek Inc. - * Author: John Crispin - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/dts-v1/; -#include "mt7623.dtsi" - -/ { - model = "MediaTek MT7623 evaluation board"; - compatible = "mediatek,mt7623-evb", "mediatek,mt7623"; - - chosen { - stdout-path = &uart2; - }; - - memory { - reg = <0 0x80000000 0 0x40000000>; - }; -/* - pwm_pins: pwm { - pins_pwm1 { - pinmux = ; - }; - - pins_pwm2 { - pinmux = ; - }; - };*/ - -}; - -&uart2 { - status = "okay"; -}; - -/*&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm_pins>; - status = "okay"; -};*/ diff --git a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/target/linux/mediatek/files/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts deleted file mode 100644 index a66956e26..000000000 --- a/target/linux/mediatek/files/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +++ /dev/null @@ -1,443 +0,0 @@ -/* - * Copyright 2017 Sean Wang - * - * SPDX-License-Identifier: (GPL-2.0+ OR MIT) - */ - -/dts-v1/; -#include -#include "_mt7623.dtsi" -#include "mt6323.dtsi" - -/ { - model = "Bananapi BPI-R2"; - compatible = "bananapi,bpi-r2", "mediatek,mt7623"; - - aliases { - serial2 = &uart2; - }; - - chosen { - stdout-path = "serial2:115200n8"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6323_vproc_reg>; - }; - - cpu@1 { - proc-supply = <&mt6323_vproc_reg>; - }; - - cpu@2 { - proc-supply = <&mt6323_vproc_reg>; - }; - - cpu@3 { - proc-supply = <&mt6323_vproc_reg>; - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&key_pins_a>; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 256 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 257 GPIO_ACTIVE_HIGH>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_a>; - - red { - label = "bpi-r2:pio:red"; - gpios = <&pio 239 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - green { - label = "bpi-r2:pio:green"; - gpios = <&pio 240 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - - blue { - label = "bpi-r2:pio:blue"; - gpios = <&pio 241 GPIO_ACTIVE_HIGH>; - default-state = "off"; - }; - }; - - memory@80000000 { - reg = <0 0x80000000 0 0x40000000>; - }; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&cir_pins_a>; - status = "okay"; -}; - -&crypto { - status = "okay"; -}; - -ð { - status = "okay"; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "trgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - switch@0 { - compatible = "mediatek,mt7530"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - pinctrl-names = "default"; - reset-gpios = <&pio 33 0>; - core-supply = <&mt6323_vpa_reg>; - io-supply = <&mt6323_vemc3v3_reg>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - port@0 { - reg = <0>; - label = "wan"; - }; - - port@1 { - reg = <1>; - label = "lan0"; - }; - - port@2 { - reg = <2>; - label = "lan1"; - }; - - port@3 { - reg = <3>; - label = "lan2"; - }; - - port@4 { - reg = <4>; - label = "lan3"; - }; - - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <&gmac0>; - phy-mode = "trgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - }; -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; - status = "okay"; -}; - -&pio { - cir_pins_a:cir@0 { - pins_cir { - pinmux = ; - bias-disable; - }; - }; - - i2c0_pins_a: i2c@0 { - pins_i2c0 { - pinmux = , - ; - bias-disable; - }; - }; - - i2c1_pins_a: i2c@1 { - pin_i2c1 { - pinmux = , - ; - bias-disable; - }; - }; - - i2s0_pins_a: i2s@0 { - pin_i2s0 { - pinmux = , - , - , - , - ; - drive-strength = ; - bias-pull-down; - }; - }; - - i2s1_pins_a: i2s@1 { - pin_i2s1 { - pinmux = , - , - , - , - ; - drive-strength = ; - bias-pull-down; - }; - }; - - key_pins_a: keys@0 { - pins_keys { - pinmux = , - ; - input-enable; - }; - }; - - led_pins_a: leds@0 { - pins_leds { - pinmux = , - , - ; - }; - }; - - mmc0_pins_default: mmc0default { - pins_cmd_dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - bias-pull-up; - }; - - pins_clk { - pinmux = ; - bias-pull-down; - }; - - pins_rst { - pinmux = ; - bias-pull-up; - }; - }; - - mmc0_pins_uhs: mmc0 { - pins_cmd_dat { - pinmux = , - , - , - , - , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up = ; - }; - - pins_clk { - pinmux = ; - drive-strength = ; - bias-pull-down = ; - }; - - pins_rst { - pinmux = ; - bias-pull-up; - }; - }; - - mmc1_pins_default: mmc1default { - pins_cmd_dat { - pinmux = , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up = ; - }; - - pins_clk { - pinmux = ; - bias-pull-down; - drive-strength = ; - }; - }; - - mmc1_pins_uhs: mmc1 { - pins_cmd_dat { - pinmux = , - , - , - , - ; - input-enable; - drive-strength = ; - bias-pull-up = ; - }; - - pins_clk { - pinmux = ; - drive-strength = ; - bias-pull-down = ; - }; - }; - - spi0_pins_a: spi@0 { - pins_spi { - pinmux = , - , - , - ; - bias-disable; - }; - }; - - pwm_pins_a: pwm@0 { - pins_pwm { - pinmux = , - , - , - , - ; - }; - }; - - uart0_pins_a: uart@0 { - pins_dat { - pinmux = , - ; - }; - }; - - uart1_pins_a: uart@1 { - pins_dat { - pinmux = , - ; - }; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm_pins_a>; - status = "okay"; -}; - -&pwrap { - mt6323 { - mt6323led: led { - compatible = "mediatek,mt6323-led"; - #address-cells = <1>; - #size-cells = <0>; - - led@0 { - reg = <0>; - label = "bpi-r2:isink:green"; - default-state = "off"; - }; - led@1 { - reg = <1>; - label = "bpi-r2:isink:red"; - default-state = "off"; - }; - led@2 { - reg = <2>; - label = "bpi-r2:isink:blue"; - default-state = "off"; - }; - }; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins_a>; - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; - status = "disabled"; -}; - -&u3phy1 { - status = "okay"; -}; - -&u3phy2 { - status = "okay"; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&uart1_pins_a>; - status = "disabled"; -}; - -&uart2 { - status = "okay"; -}; - -&usb1 { - vusb33-supply = <&mt6323_vusb_reg>; - status = "okay"; -}; - -&usb2 { - vusb33-supply = <&mt6323_vusb_reg>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files/drivers/char/hw_random/mtk-rng.c b/target/linux/mediatek/files/drivers/char/hw_random/mtk-rng.c deleted file mode 100644 index df8eb54fd..000000000 --- a/target/linux/mediatek/files/drivers/char/hw_random/mtk-rng.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Driver for Mediatek Hardware Random Number Generator - * - * Copyright (C) 2017 Sean Wang - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#define MTK_RNG_DEV KBUILD_MODNAME - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define USEC_POLL 2 -#define TIMEOUT_POLL 20 - -#define RNG_CTRL 0x00 -#define RNG_EN BIT(0) -#define RNG_READY BIT(31) - -#define RNG_DATA 0x08 - -#define to_mtk_rng(p) container_of(p, struct mtk_rng, rng) - -struct mtk_rng { - void __iomem *base; - struct clk *clk; - struct hwrng rng; -}; - -static int mtk_rng_init(struct hwrng *rng) -{ - struct mtk_rng *priv = to_mtk_rng(rng); - u32 val; - int err; - - err = clk_prepare_enable(priv->clk); - if (err) - return err; - - val = readl(priv->base + RNG_CTRL); - val |= RNG_EN; - writel(val, priv->base + RNG_CTRL); - - return 0; -} - -static void mtk_rng_cleanup(struct hwrng *rng) -{ - struct mtk_rng *priv = to_mtk_rng(rng); - u32 val; - - val = readl(priv->base + RNG_CTRL); - val &= ~RNG_EN; - writel(val, priv->base + RNG_CTRL); - - clk_disable_unprepare(priv->clk); -} - -static bool mtk_rng_wait_ready(struct hwrng *rng, bool wait) -{ - struct mtk_rng *priv = to_mtk_rng(rng); - int ready; - - ready = readl(priv->base + RNG_CTRL) & RNG_READY; - if (!ready && wait) - readl_poll_timeout_atomic(priv->base + RNG_CTRL, ready, - ready & RNG_READY, USEC_POLL, - TIMEOUT_POLL); - return !!ready; -} - -static int mtk_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) -{ - struct mtk_rng *priv = to_mtk_rng(rng); - int retval = 0; - - while (max >= sizeof(u32)) { - if (!mtk_rng_wait_ready(rng, wait)) - break; - - *(u32 *)buf = readl(priv->base + RNG_DATA); - retval += sizeof(u32); - buf += sizeof(u32); - max -= sizeof(u32); - } - - return retval || !wait ? retval : -EIO; -} - -static int mtk_rng_probe(struct platform_device *pdev) -{ - struct resource *res; - int ret; - struct mtk_rng *priv; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "no iomem resource\n"); - return -ENXIO; - } - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - priv->rng.name = pdev->name; - priv->rng.init = mtk_rng_init; - priv->rng.cleanup = mtk_rng_cleanup; - priv->rng.read = mtk_rng_read; - - priv->clk = devm_clk_get(&pdev->dev, "rng"); - if (IS_ERR(priv->clk)) { - ret = PTR_ERR(priv->clk); - dev_err(&pdev->dev, "no clock for device: %d\n", ret); - return ret; - } - - priv->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); - - ret = devm_hwrng_register(&pdev->dev, &priv->rng); - if (ret) { - dev_err(&pdev->dev, "failed to register rng device: %d\n", - ret); - return ret; - } - - dev_info(&pdev->dev, "registered RNG driver\n"); - - return 0; -} - -static const struct of_device_id mtk_rng_match[] = { - { .compatible = "mediatek,mt7623-rng" }, - {}, -}; -MODULE_DEVICE_TABLE(of, mtk_rng_match); - -static struct platform_driver mtk_rng_driver = { - .probe = mtk_rng_probe, - .driver = { - .name = MTK_RNG_DEV, - .of_match_table = mtk_rng_match, - }, -}; - -module_platform_driver(mtk_rng_driver); - -MODULE_DESCRIPTION("Mediatek Random Number Generator Driver"); -MODULE_AUTHOR("Sean Wang "); -MODULE_LICENSE("GPL"); diff --git a/target/linux/mediatek/files/drivers/crypto/mediatek/Makefile b/target/linux/mediatek/files/drivers/crypto/mediatek/Makefile deleted file mode 100644 index 187be79c7..000000000 --- a/target/linux/mediatek/files/drivers/crypto/mediatek/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -obj-$(CONFIG_CRYPTO_DEV_MEDIATEK) += mtk-crypto.o -mtk-crypto-objs:= mtk-platform.o mtk-aes.o mtk-sha.o diff --git a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-aes.c b/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-aes.c deleted file mode 100644 index 9e845e866..000000000 --- a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-aes.c +++ /dev/null @@ -1,1304 +0,0 @@ -/* - * Cryptographic API. - * - * Driver for EIP97 AES acceleration. - * - * Copyright (c) 2016 Ryder Lee - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Some ideas are from atmel-aes.c drivers. - */ - -#include -#include "mtk-platform.h" - -#define AES_QUEUE_SIZE 512 -#define AES_BUF_ORDER 2 -#define AES_BUF_SIZE ((PAGE_SIZE << AES_BUF_ORDER) \ - & ~(AES_BLOCK_SIZE - 1)) -#define AES_MAX_STATE_BUF_SIZE SIZE_IN_WORDS(AES_KEYSIZE_256 + \ - AES_BLOCK_SIZE * 2) -#define AES_MAX_CT_SIZE 6 - -#define AES_CT_CTRL_HDR cpu_to_le32(0x00220000) - -/* AES-CBC/ECB/CTR command token */ -#define AES_CMD0 cpu_to_le32(0x05000000) -#define AES_CMD1 cpu_to_le32(0x2d060000) -#define AES_CMD2 cpu_to_le32(0xe4a63806) -/* AES-GCM command token */ -#define AES_GCM_CMD0 cpu_to_le32(0x0b000000) -#define AES_GCM_CMD1 cpu_to_le32(0xa0800000) -#define AES_GCM_CMD2 cpu_to_le32(0x25000010) -#define AES_GCM_CMD3 cpu_to_le32(0x0f020000) -#define AES_GCM_CMD4 cpu_to_le32(0x21e60000) -#define AES_GCM_CMD5 cpu_to_le32(0x40e60000) -#define AES_GCM_CMD6 cpu_to_le32(0xd0070000) - -/* AES transform information word 0 fields */ -#define AES_TFM_BASIC_OUT cpu_to_le32(0x4 << 0) -#define AES_TFM_BASIC_IN cpu_to_le32(0x5 << 0) -#define AES_TFM_GCM_OUT cpu_to_le32(0x6 << 0) -#define AES_TFM_GCM_IN cpu_to_le32(0xf << 0) -#define AES_TFM_SIZE(x) cpu_to_le32((x) << 8) -#define AES_TFM_128BITS cpu_to_le32(0xb << 16) -#define AES_TFM_192BITS cpu_to_le32(0xd << 16) -#define AES_TFM_256BITS cpu_to_le32(0xf << 16) -#define AES_TFM_GHASH_DIGEST cpu_to_le32(0x2 << 21) -#define AES_TFM_GHASH cpu_to_le32(0x4 << 23) -/* AES transform information word 1 fields */ -#define AES_TFM_ECB cpu_to_le32(0x0 << 0) -#define AES_TFM_CBC cpu_to_le32(0x1 << 0) -#define AES_TFM_CTR_INIT cpu_to_le32(0x2 << 0) /* init counter to 1 */ -#define AES_TFM_CTR_LOAD cpu_to_le32(0x6 << 0) /* load/reuse counter */ -#define AES_TFM_3IV cpu_to_le32(0x7 << 5) /* using IV 0-2 */ -#define AES_TFM_FULL_IV cpu_to_le32(0xf << 5) /* using IV 0-3 */ -#define AES_TFM_IV_CTR_MODE cpu_to_le32(0x1 << 10) -#define AES_TFM_ENC_HASH cpu_to_le32(0x1 << 17) - -/* AES flags */ -#define AES_FLAGS_CIPHER_MSK GENMASK(2, 0) -#define AES_FLAGS_ECB BIT(0) -#define AES_FLAGS_CBC BIT(1) -#define AES_FLAGS_CTR BIT(2) -#define AES_FLAGS_GCM BIT(3) -#define AES_FLAGS_ENCRYPT BIT(4) -#define AES_FLAGS_BUSY BIT(5) - -#define AES_AUTH_TAG_ERR cpu_to_le32(BIT(26)) - -/** - * mtk_aes_info - hardware information of AES - * @cmd: command token, hardware instruction - * @tfm: transform state of cipher algorithm. - * @state: contains keys and initial vectors. - * - * Memory layout of GCM buffer: - * /-----------\ - * | AES KEY | 128/196/256 bits - * |-----------| - * | HASH KEY | a string 128 zero bits encrypted using the block cipher - * |-----------| - * | IVs | 4 * 4 bytes - * \-----------/ - * - * The engine requires all these info to do: - * - Commands decoding and control of the engine's data path. - * - Coordinating hardware data fetch and store operations. - * - Result token construction and output. - */ -struct mtk_aes_info { - __le32 cmd[AES_MAX_CT_SIZE]; - __le32 tfm[2]; - __le32 state[AES_MAX_STATE_BUF_SIZE]; -}; - -struct mtk_aes_reqctx { - u64 mode; -}; - -struct mtk_aes_base_ctx { - struct mtk_cryp *cryp; - u32 keylen; - __le32 keymode; - - mtk_aes_fn start; - - struct mtk_aes_info info; - dma_addr_t ct_dma; - dma_addr_t tfm_dma; - - __le32 ct_hdr; - u32 ct_size; -}; - -struct mtk_aes_ctx { - struct mtk_aes_base_ctx base; -}; - -struct mtk_aes_ctr_ctx { - struct mtk_aes_base_ctx base; - - u32 iv[AES_BLOCK_SIZE / sizeof(u32)]; - size_t offset; - struct scatterlist src[2]; - struct scatterlist dst[2]; -}; - -struct mtk_aes_gcm_ctx { - struct mtk_aes_base_ctx base; - - u32 authsize; - size_t textlen; - - struct crypto_skcipher *ctr; -}; - -struct mtk_aes_gcm_setkey_result { - int err; - struct completion completion; -}; - -struct mtk_aes_drv { - struct list_head dev_list; - /* Device list lock */ - spinlock_t lock; -}; - -static struct mtk_aes_drv mtk_aes = { - .dev_list = LIST_HEAD_INIT(mtk_aes.dev_list), - .lock = __SPIN_LOCK_UNLOCKED(mtk_aes.lock), -}; - -static inline u32 mtk_aes_read(struct mtk_cryp *cryp, u32 offset) -{ - return readl_relaxed(cryp->base + offset); -} - -static inline void mtk_aes_write(struct mtk_cryp *cryp, - u32 offset, u32 value) -{ - writel_relaxed(value, cryp->base + offset); -} - -static struct mtk_cryp *mtk_aes_find_dev(struct mtk_aes_base_ctx *ctx) -{ - struct mtk_cryp *cryp = NULL; - struct mtk_cryp *tmp; - - spin_lock_bh(&mtk_aes.lock); - if (!ctx->cryp) { - list_for_each_entry(tmp, &mtk_aes.dev_list, aes_list) { - cryp = tmp; - break; - } - ctx->cryp = cryp; - } else { - cryp = ctx->cryp; - } - spin_unlock_bh(&mtk_aes.lock); - - return cryp; -} - -static inline size_t mtk_aes_padlen(size_t len) -{ - len &= AES_BLOCK_SIZE - 1; - return len ? AES_BLOCK_SIZE - len : 0; -} - -static bool mtk_aes_check_aligned(struct scatterlist *sg, size_t len, - struct mtk_aes_dma *dma) -{ - int nents; - - if (!IS_ALIGNED(len, AES_BLOCK_SIZE)) - return false; - - for (nents = 0; sg; sg = sg_next(sg), ++nents) { - if (!IS_ALIGNED(sg->offset, sizeof(u32))) - return false; - - if (len <= sg->length) { - if (!IS_ALIGNED(len, AES_BLOCK_SIZE)) - return false; - - dma->nents = nents + 1; - dma->remainder = sg->length - len; - sg->length = len; - return true; - } - - if (!IS_ALIGNED(sg->length, AES_BLOCK_SIZE)) - return false; - - len -= sg->length; - } - - return false; -} - -static inline void mtk_aes_set_mode(struct mtk_aes_rec *aes, - const struct mtk_aes_reqctx *rctx) -{ - /* Clear all but persistent flags and set request flags. */ - aes->flags = (aes->flags & AES_FLAGS_BUSY) | rctx->mode; -} - -static inline void mtk_aes_restore_sg(const struct mtk_aes_dma *dma) -{ - struct scatterlist *sg = dma->sg; - int nents = dma->nents; - - if (!dma->remainder) - return; - - while (--nents > 0 && sg) - sg = sg_next(sg); - - if (!sg) - return; - - sg->length += dma->remainder; -} - -static inline void mtk_aes_write_state_le(__le32 *dst, const u32 *src, u32 size) -{ - int i; - - for (i = 0; i < SIZE_IN_WORDS(size); i++) - dst[i] = cpu_to_le32(src[i]); -} - -static inline void mtk_aes_write_state_be(__be32 *dst, const u32 *src, u32 size) -{ - int i; - - for (i = 0; i < SIZE_IN_WORDS(size); i++) - dst[i] = cpu_to_be32(src[i]); -} - -static inline int mtk_aes_complete(struct mtk_cryp *cryp, - struct mtk_aes_rec *aes, - int err) -{ - aes->flags &= ~AES_FLAGS_BUSY; - aes->areq->complete(aes->areq, err); - /* Handle new request */ - tasklet_schedule(&aes->queue_task); - return err; -} - -/* - * Write descriptors for processing. This will configure the engine, load - * the transform information and then start the packet processing. - */ -static int mtk_aes_xmit(struct mtk_cryp *cryp, struct mtk_aes_rec *aes) -{ - struct mtk_ring *ring = cryp->ring[aes->id]; - struct mtk_desc *cmd = NULL, *res = NULL; - struct scatterlist *ssg = aes->src.sg, *dsg = aes->dst.sg; - u32 slen = aes->src.sg_len, dlen = aes->dst.sg_len; - int nents; - - /* Write command descriptors */ - for (nents = 0; nents < slen; ++nents, ssg = sg_next(ssg)) { - cmd = ring->cmd_next; - cmd->hdr = MTK_DESC_BUF_LEN(ssg->length); - cmd->buf = cpu_to_le32(sg_dma_address(ssg)); - - if (nents == 0) { - cmd->hdr |= MTK_DESC_FIRST | - MTK_DESC_CT_LEN(aes->ctx->ct_size); - cmd->ct = cpu_to_le32(aes->ctx->ct_dma); - cmd->ct_hdr = aes->ctx->ct_hdr; - cmd->tfm = cpu_to_le32(aes->ctx->tfm_dma); - } - - /* Shift ring buffer and check boundary */ - if (++ring->cmd_next == ring->cmd_base + MTK_DESC_NUM) - ring->cmd_next = ring->cmd_base; - } - cmd->hdr |= MTK_DESC_LAST; - - /* Prepare result descriptors */ - for (nents = 0; nents < dlen; ++nents, dsg = sg_next(dsg)) { - res = ring->res_next; - res->hdr = MTK_DESC_BUF_LEN(dsg->length); - res->buf = cpu_to_le32(sg_dma_address(dsg)); - - if (nents == 0) - res->hdr |= MTK_DESC_FIRST; - - /* Shift ring buffer and check boundary */ - if (++ring->res_next == ring->res_base + MTK_DESC_NUM) - ring->res_next = ring->res_base; - } - res->hdr |= MTK_DESC_LAST; - - /* Pointer to current result descriptor */ - ring->res_prev = res; - - /* Prepare enough space for authenticated tag */ - if (aes->flags & AES_FLAGS_GCM) - res->hdr += AES_BLOCK_SIZE; - - /* - * Make sure that all changes to the DMA ring are done before we - * start engine. - */ - wmb(); - /* Start DMA transfer */ - mtk_aes_write(cryp, RDR_PREP_COUNT(aes->id), MTK_DESC_CNT(dlen)); - mtk_aes_write(cryp, CDR_PREP_COUNT(aes->id), MTK_DESC_CNT(slen)); - - return -EINPROGRESS; -} - -static void mtk_aes_unmap(struct mtk_cryp *cryp, struct mtk_aes_rec *aes) -{ - struct mtk_aes_base_ctx *ctx = aes->ctx; - - dma_unmap_single(cryp->dev, ctx->ct_dma, sizeof(ctx->info), - DMA_TO_DEVICE); - - if (aes->src.sg == aes->dst.sg) { - dma_unmap_sg(cryp->dev, aes->src.sg, aes->src.nents, - DMA_BIDIRECTIONAL); - - if (aes->src.sg != &aes->aligned_sg) - mtk_aes_restore_sg(&aes->src); - } else { - dma_unmap_sg(cryp->dev, aes->dst.sg, aes->dst.nents, - DMA_FROM_DEVICE); - - if (aes->dst.sg != &aes->aligned_sg) - mtk_aes_restore_sg(&aes->dst); - - dma_unmap_sg(cryp->dev, aes->src.sg, aes->src.nents, - DMA_TO_DEVICE); - - if (aes->src.sg != &aes->aligned_sg) - mtk_aes_restore_sg(&aes->src); - } - - if (aes->dst.sg == &aes->aligned_sg) - sg_copy_from_buffer(aes->real_dst, sg_nents(aes->real_dst), - aes->buf, aes->total); -} - -static int mtk_aes_map(struct mtk_cryp *cryp, struct mtk_aes_rec *aes) -{ - struct mtk_aes_base_ctx *ctx = aes->ctx; - struct mtk_aes_info *info = &ctx->info; - - ctx->ct_dma = dma_map_single(cryp->dev, info, sizeof(*info), - DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(cryp->dev, ctx->ct_dma))) - goto exit; - - ctx->tfm_dma = ctx->ct_dma + sizeof(info->cmd); - - if (aes->src.sg == aes->dst.sg) { - aes->src.sg_len = dma_map_sg(cryp->dev, aes->src.sg, - aes->src.nents, - DMA_BIDIRECTIONAL); - aes->dst.sg_len = aes->src.sg_len; - if (unlikely(!aes->src.sg_len)) - goto sg_map_err; - } else { - aes->src.sg_len = dma_map_sg(cryp->dev, aes->src.sg, - aes->src.nents, DMA_TO_DEVICE); - if (unlikely(!aes->src.sg_len)) - goto sg_map_err; - - aes->dst.sg_len = dma_map_sg(cryp->dev, aes->dst.sg, - aes->dst.nents, DMA_FROM_DEVICE); - if (unlikely(!aes->dst.sg_len)) { - dma_unmap_sg(cryp->dev, aes->src.sg, aes->src.nents, - DMA_TO_DEVICE); - goto sg_map_err; - } - } - - return mtk_aes_xmit(cryp, aes); - -sg_map_err: - dma_unmap_single(cryp->dev, ctx->ct_dma, sizeof(*info), DMA_TO_DEVICE); -exit: - return mtk_aes_complete(cryp, aes, -EINVAL); -} - -/* Initialize transform information of CBC/ECB/CTR mode */ -static void mtk_aes_info_init(struct mtk_cryp *cryp, struct mtk_aes_rec *aes, - size_t len) -{ - struct ablkcipher_request *req = ablkcipher_request_cast(aes->areq); - struct mtk_aes_base_ctx *ctx = aes->ctx; - struct mtk_aes_info *info = &ctx->info; - u32 cnt = 0; - - ctx->ct_hdr = AES_CT_CTRL_HDR | cpu_to_le32(len); - info->cmd[cnt++] = AES_CMD0 | cpu_to_le32(len); - info->cmd[cnt++] = AES_CMD1; - - info->tfm[0] = AES_TFM_SIZE(ctx->keylen) | ctx->keymode; - if (aes->flags & AES_FLAGS_ENCRYPT) - info->tfm[0] |= AES_TFM_BASIC_OUT; - else - info->tfm[0] |= AES_TFM_BASIC_IN; - - switch (aes->flags & AES_FLAGS_CIPHER_MSK) { - case AES_FLAGS_CBC: - info->tfm[1] = AES_TFM_CBC; - break; - case AES_FLAGS_ECB: - info->tfm[1] = AES_TFM_ECB; - goto ecb; - case AES_FLAGS_CTR: - info->tfm[1] = AES_TFM_CTR_LOAD; - goto ctr; - - default: - /* Should not happen... */ - return; - } - - mtk_aes_write_state_le(info->state + ctx->keylen, req->info, - AES_BLOCK_SIZE); -ctr: - info->tfm[0] += AES_TFM_SIZE(SIZE_IN_WORDS(AES_BLOCK_SIZE)); - info->tfm[1] |= AES_TFM_FULL_IV; - info->cmd[cnt++] = AES_CMD2; -ecb: - ctx->ct_size = cnt; -} - -static int mtk_aes_dma(struct mtk_cryp *cryp, struct mtk_aes_rec *aes, - struct scatterlist *src, struct scatterlist *dst, - size_t len) -{ - size_t padlen = 0; - bool src_aligned, dst_aligned; - - aes->total = len; - aes->src.sg = src; - aes->dst.sg = dst; - aes->real_dst = dst; - - src_aligned = mtk_aes_check_aligned(src, len, &aes->src); - if (src == dst) - dst_aligned = src_aligned; - else - dst_aligned = mtk_aes_check_aligned(dst, len, &aes->dst); - - if (!src_aligned || !dst_aligned) { - padlen = mtk_aes_padlen(len); - - if (len + padlen > AES_BUF_SIZE) - return mtk_aes_complete(cryp, aes, -ENOMEM); - - if (!src_aligned) { - sg_copy_to_buffer(src, sg_nents(src), aes->buf, len); - aes->src.sg = &aes->aligned_sg; - aes->src.nents = 1; - aes->src.remainder = 0; - } - - if (!dst_aligned) { - aes->dst.sg = &aes->aligned_sg; - aes->dst.nents = 1; - aes->dst.remainder = 0; - } - - sg_init_table(&aes->aligned_sg, 1); - sg_set_buf(&aes->aligned_sg, aes->buf, len + padlen); - } - - mtk_aes_info_init(cryp, aes, len + padlen); - - return mtk_aes_map(cryp, aes); -} - -static int mtk_aes_handle_queue(struct mtk_cryp *cryp, u8 id, - struct crypto_async_request *new_areq) -{ - struct mtk_aes_rec *aes = cryp->aes[id]; - struct crypto_async_request *areq, *backlog; - struct mtk_aes_base_ctx *ctx; - unsigned long flags; - int ret = 0; - - spin_lock_irqsave(&aes->lock, flags); - if (new_areq) - ret = crypto_enqueue_request(&aes->queue, new_areq); - if (aes->flags & AES_FLAGS_BUSY) { - spin_unlock_irqrestore(&aes->lock, flags); - return ret; - } - backlog = crypto_get_backlog(&aes->queue); - areq = crypto_dequeue_request(&aes->queue); - if (areq) - aes->flags |= AES_FLAGS_BUSY; - spin_unlock_irqrestore(&aes->lock, flags); - - if (!areq) - return ret; - - if (backlog) - backlog->complete(backlog, -EINPROGRESS); - - ctx = crypto_tfm_ctx(areq->tfm); - - aes->areq = areq; - aes->ctx = ctx; - - return ctx->start(cryp, aes); -} - -static int mtk_aes_transfer_complete(struct mtk_cryp *cryp, - struct mtk_aes_rec *aes) -{ - return mtk_aes_complete(cryp, aes, 0); -} - -static int mtk_aes_start(struct mtk_cryp *cryp, struct mtk_aes_rec *aes) -{ - struct ablkcipher_request *req = ablkcipher_request_cast(aes->areq); - struct mtk_aes_reqctx *rctx = ablkcipher_request_ctx(req); - - mtk_aes_set_mode(aes, rctx); - aes->resume = mtk_aes_transfer_complete; - - return mtk_aes_dma(cryp, aes, req->src, req->dst, req->nbytes); -} - -static inline struct mtk_aes_ctr_ctx * -mtk_aes_ctr_ctx_cast(struct mtk_aes_base_ctx *ctx) -{ - return container_of(ctx, struct mtk_aes_ctr_ctx, base); -} - -static int mtk_aes_ctr_transfer(struct mtk_cryp *cryp, struct mtk_aes_rec *aes) -{ - struct mtk_aes_base_ctx *ctx = aes->ctx; - struct mtk_aes_ctr_ctx *cctx = mtk_aes_ctr_ctx_cast(ctx); - struct ablkcipher_request *req = ablkcipher_request_cast(aes->areq); - struct scatterlist *src, *dst; - u32 start, end, ctr, blocks; - size_t datalen; - bool fragmented = false; - - /* Check for transfer completion. */ - cctx->offset += aes->total; - if (cctx->offset >= req->nbytes) - return mtk_aes_transfer_complete(cryp, aes); - - /* Compute data length. */ - datalen = req->nbytes - cctx->offset; - blocks = DIV_ROUND_UP(datalen, AES_BLOCK_SIZE); - ctr = be32_to_cpu(cctx->iv[3]); - - /* Check 32bit counter overflow. */ - start = ctr; - end = start + blocks - 1; - if (end < start) { - ctr |= 0xffffffff; - datalen = AES_BLOCK_SIZE * -start; - fragmented = true; - } - - /* Jump to offset. */ - src = scatterwalk_ffwd(cctx->src, req->src, cctx->offset); - dst = ((req->src == req->dst) ? src : - scatterwalk_ffwd(cctx->dst, req->dst, cctx->offset)); - - /* Write IVs into transform state buffer. */ - mtk_aes_write_state_le(ctx->info.state + ctx->keylen, cctx->iv, - AES_BLOCK_SIZE); - - if (unlikely(fragmented)) { - /* - * Increment the counter manually to cope with the hardware - * counter overflow. - */ - cctx->iv[3] = cpu_to_be32(ctr); - crypto_inc((u8 *)cctx->iv, AES_BLOCK_SIZE); - } - - return mtk_aes_dma(cryp, aes, src, dst, datalen); -} - -static int mtk_aes_ctr_start(struct mtk_cryp *cryp, struct mtk_aes_rec *aes) -{ - struct mtk_aes_ctr_ctx *cctx = mtk_aes_ctr_ctx_cast(aes->ctx); - struct ablkcipher_request *req = ablkcipher_request_cast(aes->areq); - struct mtk_aes_reqctx *rctx = ablkcipher_request_ctx(req); - - mtk_aes_set_mode(aes, rctx); - - memcpy(cctx->iv, req->info, AES_BLOCK_SIZE); - cctx->offset = 0; - aes->total = 0; - aes->resume = mtk_aes_ctr_transfer; - - return mtk_aes_ctr_transfer(cryp, aes); -} - -/* Check and set the AES key to transform state buffer */ -static int mtk_aes_setkey(struct crypto_ablkcipher *tfm, - const u8 *key, u32 keylen) -{ - struct mtk_aes_base_ctx *ctx = crypto_ablkcipher_ctx(tfm); - - switch (keylen) { - case AES_KEYSIZE_128: - ctx->keymode = AES_TFM_128BITS; - break; - case AES_KEYSIZE_192: - ctx->keymode = AES_TFM_192BITS; - break; - case AES_KEYSIZE_256: - ctx->keymode = AES_TFM_256BITS; - break; - - default: - crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN); - return -EINVAL; - } - - ctx->keylen = SIZE_IN_WORDS(keylen); - mtk_aes_write_state_le(ctx->info.state, (const u32 *)key, keylen); - - return 0; -} - -static int mtk_aes_crypt(struct ablkcipher_request *req, u64 mode) -{ - struct mtk_aes_base_ctx *ctx; - struct mtk_aes_reqctx *rctx; - - ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req)); - rctx = ablkcipher_request_ctx(req); - rctx->mode = mode; - - return mtk_aes_handle_queue(ctx->cryp, !(mode & AES_FLAGS_ENCRYPT), - &req->base); -} - -static int mtk_aes_ecb_encrypt(struct ablkcipher_request *req) -{ - return mtk_aes_crypt(req, AES_FLAGS_ENCRYPT | AES_FLAGS_ECB); -} - -static int mtk_aes_ecb_decrypt(struct ablkcipher_request *req) -{ - return mtk_aes_crypt(req, AES_FLAGS_ECB); -} - -static int mtk_aes_cbc_encrypt(struct ablkcipher_request *req) -{ - return mtk_aes_crypt(req, AES_FLAGS_ENCRYPT | AES_FLAGS_CBC); -} - -static int mtk_aes_cbc_decrypt(struct ablkcipher_request *req) -{ - return mtk_aes_crypt(req, AES_FLAGS_CBC); -} - -static int mtk_aes_ctr_encrypt(struct ablkcipher_request *req) -{ - return mtk_aes_crypt(req, AES_FLAGS_ENCRYPT | AES_FLAGS_CTR); -} - -static int mtk_aes_ctr_decrypt(struct ablkcipher_request *req) -{ - return mtk_aes_crypt(req, AES_FLAGS_CTR); -} - -static int mtk_aes_cra_init(struct crypto_tfm *tfm) -{ - struct mtk_aes_ctx *ctx = crypto_tfm_ctx(tfm); - struct mtk_cryp *cryp = NULL; - - cryp = mtk_aes_find_dev(&ctx->base); - if (!cryp) { - pr_err("can't find crypto device\n"); - return -ENODEV; - } - - tfm->crt_ablkcipher.reqsize = sizeof(struct mtk_aes_reqctx); - ctx->base.start = mtk_aes_start; - return 0; -} - -static int mtk_aes_ctr_cra_init(struct crypto_tfm *tfm) -{ - struct mtk_aes_ctx *ctx = crypto_tfm_ctx(tfm); - struct mtk_cryp *cryp = NULL; - - cryp = mtk_aes_find_dev(&ctx->base); - if (!cryp) { - pr_err("can't find crypto device\n"); - return -ENODEV; - } - - tfm->crt_ablkcipher.reqsize = sizeof(struct mtk_aes_reqctx); - ctx->base.start = mtk_aes_ctr_start; - return 0; -} - -static struct crypto_alg aes_algs[] = { -{ - .cra_name = "cbc(aes)", - .cra_driver_name = "cbc-aes-mtk", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | - CRYPTO_ALG_ASYNC, - .cra_init = mtk_aes_cra_init, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_aes_ctx), - .cra_alignmask = 0xf, - .cra_type = &crypto_ablkcipher_type, - .cra_module = THIS_MODULE, - .cra_u.ablkcipher = { - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .setkey = mtk_aes_setkey, - .encrypt = mtk_aes_cbc_encrypt, - .decrypt = mtk_aes_cbc_decrypt, - .ivsize = AES_BLOCK_SIZE, - } -}, -{ - .cra_name = "ecb(aes)", - .cra_driver_name = "ecb-aes-mtk", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | - CRYPTO_ALG_ASYNC, - .cra_init = mtk_aes_cra_init, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_aes_ctx), - .cra_alignmask = 0xf, - .cra_type = &crypto_ablkcipher_type, - .cra_module = THIS_MODULE, - .cra_u.ablkcipher = { - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .setkey = mtk_aes_setkey, - .encrypt = mtk_aes_ecb_encrypt, - .decrypt = mtk_aes_ecb_decrypt, - } -}, -{ - .cra_name = "ctr(aes)", - .cra_driver_name = "ctr-aes-mtk", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | - CRYPTO_ALG_ASYNC, - .cra_init = mtk_aes_ctr_cra_init, - .cra_blocksize = 1, - .cra_ctxsize = sizeof(struct mtk_aes_ctr_ctx), - .cra_alignmask = 0xf, - .cra_type = &crypto_ablkcipher_type, - .cra_module = THIS_MODULE, - .cra_u.ablkcipher = { - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = mtk_aes_setkey, - .encrypt = mtk_aes_ctr_encrypt, - .decrypt = mtk_aes_ctr_decrypt, - } -}, -}; - -static inline struct mtk_aes_gcm_ctx * -mtk_aes_gcm_ctx_cast(struct mtk_aes_base_ctx *ctx) -{ - return container_of(ctx, struct mtk_aes_gcm_ctx, base); -} - -/* - * Engine will verify and compare tag automatically, so we just need - * to check returned status which stored in the result descriptor. - */ -static int mtk_aes_gcm_tag_verify(struct mtk_cryp *cryp, - struct mtk_aes_rec *aes) -{ - u32 status = cryp->ring[aes->id]->res_prev->ct; - - return mtk_aes_complete(cryp, aes, (status & AES_AUTH_TAG_ERR) ? - -EBADMSG : 0); -} - -/* Initialize transform information of GCM mode */ -static void mtk_aes_gcm_info_init(struct mtk_cryp *cryp, - struct mtk_aes_rec *aes, - size_t len) -{ - struct aead_request *req = aead_request_cast(aes->areq); - struct mtk_aes_base_ctx *ctx = aes->ctx; - struct mtk_aes_gcm_ctx *gctx = mtk_aes_gcm_ctx_cast(ctx); - struct mtk_aes_info *info = &ctx->info; - u32 ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req)); - u32 cnt = 0; - - ctx->ct_hdr = AES_CT_CTRL_HDR | len; - - info->cmd[cnt++] = AES_GCM_CMD0 | cpu_to_le32(req->assoclen); - info->cmd[cnt++] = AES_GCM_CMD1 | cpu_to_le32(req->assoclen); - info->cmd[cnt++] = AES_GCM_CMD2; - info->cmd[cnt++] = AES_GCM_CMD3 | cpu_to_le32(gctx->textlen); - - if (aes->flags & AES_FLAGS_ENCRYPT) { - info->cmd[cnt++] = AES_GCM_CMD4 | cpu_to_le32(gctx->authsize); - info->tfm[0] = AES_TFM_GCM_OUT; - } else { - info->cmd[cnt++] = AES_GCM_CMD5 | cpu_to_le32(gctx->authsize); - info->cmd[cnt++] = AES_GCM_CMD6 | cpu_to_le32(gctx->authsize); - info->tfm[0] = AES_TFM_GCM_IN; - } - ctx->ct_size = cnt; - - info->tfm[0] |= AES_TFM_GHASH_DIGEST | AES_TFM_GHASH | AES_TFM_SIZE( - ctx->keylen + SIZE_IN_WORDS(AES_BLOCK_SIZE + ivsize)) | - ctx->keymode; - info->tfm[1] = AES_TFM_CTR_INIT | AES_TFM_IV_CTR_MODE | AES_TFM_3IV | - AES_TFM_ENC_HASH; - - mtk_aes_write_state_le(info->state + ctx->keylen + SIZE_IN_WORDS( - AES_BLOCK_SIZE), (const u32 *)req->iv, ivsize); -} - -static int mtk_aes_gcm_dma(struct mtk_cryp *cryp, struct mtk_aes_rec *aes, - struct scatterlist *src, struct scatterlist *dst, - size_t len) -{ - bool src_aligned, dst_aligned; - - aes->src.sg = src; - aes->dst.sg = dst; - aes->real_dst = dst; - - src_aligned = mtk_aes_check_aligned(src, len, &aes->src); - if (src == dst) - dst_aligned = src_aligned; - else - dst_aligned = mtk_aes_check_aligned(dst, len, &aes->dst); - - if (!src_aligned || !dst_aligned) { - if (aes->total > AES_BUF_SIZE) - return mtk_aes_complete(cryp, aes, -ENOMEM); - - if (!src_aligned) { - sg_copy_to_buffer(src, sg_nents(src), aes->buf, len); - aes->src.sg = &aes->aligned_sg; - aes->src.nents = 1; - aes->src.remainder = 0; - } - - if (!dst_aligned) { - aes->dst.sg = &aes->aligned_sg; - aes->dst.nents = 1; - aes->dst.remainder = 0; - } - - sg_init_table(&aes->aligned_sg, 1); - sg_set_buf(&aes->aligned_sg, aes->buf, aes->total); - } - - mtk_aes_gcm_info_init(cryp, aes, len); - - return mtk_aes_map(cryp, aes); -} - -/* Todo: GMAC */ -static int mtk_aes_gcm_start(struct mtk_cryp *cryp, struct mtk_aes_rec *aes) -{ - struct mtk_aes_gcm_ctx *gctx = mtk_aes_gcm_ctx_cast(aes->ctx); - struct aead_request *req = aead_request_cast(aes->areq); - struct mtk_aes_reqctx *rctx = aead_request_ctx(req); - u32 len = req->assoclen + req->cryptlen; - - mtk_aes_set_mode(aes, rctx); - - if (aes->flags & AES_FLAGS_ENCRYPT) { - u32 tag[4]; - - aes->resume = mtk_aes_transfer_complete; - /* Compute total process length. */ - aes->total = len + gctx->authsize; - /* Compute text length. */ - gctx->textlen = req->cryptlen; - /* Hardware will append authenticated tag to output buffer */ - scatterwalk_map_and_copy(tag, req->dst, len, gctx->authsize, 1); - } else { - aes->resume = mtk_aes_gcm_tag_verify; - aes->total = len; - gctx->textlen = req->cryptlen - gctx->authsize; - } - - return mtk_aes_gcm_dma(cryp, aes, req->src, req->dst, len); -} - -static int mtk_aes_gcm_crypt(struct aead_request *req, u64 mode) -{ - struct mtk_aes_base_ctx *ctx = crypto_aead_ctx(crypto_aead_reqtfm(req)); - struct mtk_aes_reqctx *rctx = aead_request_ctx(req); - - rctx->mode = AES_FLAGS_GCM | mode; - - return mtk_aes_handle_queue(ctx->cryp, !!(mode & AES_FLAGS_ENCRYPT), - &req->base); -} - -static void mtk_gcm_setkey_done(struct crypto_async_request *req, int err) -{ - struct mtk_aes_gcm_setkey_result *result = req->data; - - if (err == -EINPROGRESS) - return; - - result->err = err; - complete(&result->completion); -} - -/* - * Because of the hardware limitation, we need to pre-calculate key(H) - * for the GHASH operation. The result of the encryption operation - * need to be stored in the transform state buffer. - */ -static int mtk_aes_gcm_setkey(struct crypto_aead *aead, const u8 *key, - u32 keylen) -{ - struct mtk_aes_base_ctx *ctx = crypto_aead_ctx(aead); - struct mtk_aes_gcm_ctx *gctx = mtk_aes_gcm_ctx_cast(ctx); - struct crypto_skcipher *ctr = gctx->ctr; - struct { - u32 hash[4]; - u8 iv[8]; - - struct mtk_aes_gcm_setkey_result result; - - struct scatterlist sg[1]; - struct skcipher_request req; - } *data; - int err; - - switch (keylen) { - case AES_KEYSIZE_128: - ctx->keymode = AES_TFM_128BITS; - break; - case AES_KEYSIZE_192: - ctx->keymode = AES_TFM_192BITS; - break; - case AES_KEYSIZE_256: - ctx->keymode = AES_TFM_256BITS; - break; - - default: - crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN); - return -EINVAL; - } - - ctx->keylen = SIZE_IN_WORDS(keylen); - - /* Same as crypto_gcm_setkey() from crypto/gcm.c */ - crypto_skcipher_clear_flags(ctr, CRYPTO_TFM_REQ_MASK); - crypto_skcipher_set_flags(ctr, crypto_aead_get_flags(aead) & - CRYPTO_TFM_REQ_MASK); - err = crypto_skcipher_setkey(ctr, key, keylen); - crypto_aead_set_flags(aead, crypto_skcipher_get_flags(ctr) & - CRYPTO_TFM_RES_MASK); - if (err) - return err; - - data = kzalloc(sizeof(*data) + crypto_skcipher_reqsize(ctr), - GFP_KERNEL); - if (!data) - return -ENOMEM; - - init_completion(&data->result.completion); - sg_init_one(data->sg, &data->hash, AES_BLOCK_SIZE); - skcipher_request_set_tfm(&data->req, ctr); - skcipher_request_set_callback(&data->req, CRYPTO_TFM_REQ_MAY_SLEEP | - CRYPTO_TFM_REQ_MAY_BACKLOG, - mtk_gcm_setkey_done, &data->result); - skcipher_request_set_crypt(&data->req, data->sg, data->sg, - AES_BLOCK_SIZE, data->iv); - - err = crypto_skcipher_encrypt(&data->req); - if (err == -EINPROGRESS || err == -EBUSY) { - err = wait_for_completion_interruptible( - &data->result.completion); - if (!err) - err = data->result.err; - } - if (err) - goto out; - - /* Write key into state buffer */ - mtk_aes_write_state_le(ctx->info.state, (const u32 *)key, keylen); - /* Write key(H) into state buffer */ - mtk_aes_write_state_be(ctx->info.state + ctx->keylen, data->hash, - AES_BLOCK_SIZE); -out: - kzfree(data); - return err; -} - -static int mtk_aes_gcm_setauthsize(struct crypto_aead *aead, - u32 authsize) -{ - struct mtk_aes_base_ctx *ctx = crypto_aead_ctx(aead); - struct mtk_aes_gcm_ctx *gctx = mtk_aes_gcm_ctx_cast(ctx); - - /* Same as crypto_gcm_authsize() from crypto/gcm.c */ - switch (authsize) { - case 8: - case 12: - case 16: - break; - default: - return -EINVAL; - } - - gctx->authsize = authsize; - return 0; -} - -static int mtk_aes_gcm_encrypt(struct aead_request *req) -{ - return mtk_aes_gcm_crypt(req, AES_FLAGS_ENCRYPT); -} - -static int mtk_aes_gcm_decrypt(struct aead_request *req) -{ - return mtk_aes_gcm_crypt(req, 0); -} - -static int mtk_aes_gcm_init(struct crypto_aead *aead) -{ - struct mtk_aes_gcm_ctx *ctx = crypto_aead_ctx(aead); - struct mtk_cryp *cryp = NULL; - - cryp = mtk_aes_find_dev(&ctx->base); - if (!cryp) { - pr_err("can't find crypto device\n"); - return -ENODEV; - } - - ctx->ctr = crypto_alloc_skcipher("ctr(aes)", 0, - CRYPTO_ALG_ASYNC); - if (IS_ERR(ctx->ctr)) { - pr_err("Error allocating ctr(aes)\n"); - return PTR_ERR(ctx->ctr); - } - - crypto_aead_set_reqsize(aead, sizeof(struct mtk_aes_reqctx)); - ctx->base.start = mtk_aes_gcm_start; - return 0; -} - -static void mtk_aes_gcm_exit(struct crypto_aead *aead) -{ - struct mtk_aes_gcm_ctx *ctx = crypto_aead_ctx(aead); - - crypto_free_skcipher(ctx->ctr); -} - -static struct aead_alg aes_gcm_alg = { - .setkey = mtk_aes_gcm_setkey, - .setauthsize = mtk_aes_gcm_setauthsize, - .encrypt = mtk_aes_gcm_encrypt, - .decrypt = mtk_aes_gcm_decrypt, - .init = mtk_aes_gcm_init, - .exit = mtk_aes_gcm_exit, - .ivsize = 12, - .maxauthsize = AES_BLOCK_SIZE, - - .base = { - .cra_name = "gcm(aes)", - .cra_driver_name = "gcm-aes-mtk", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC, - .cra_blocksize = 1, - .cra_ctxsize = sizeof(struct mtk_aes_gcm_ctx), - .cra_alignmask = 0xf, - .cra_module = THIS_MODULE, - }, -}; - -static void mtk_aes_queue_task(unsigned long data) -{ - struct mtk_aes_rec *aes = (struct mtk_aes_rec *)data; - - mtk_aes_handle_queue(aes->cryp, aes->id, NULL); -} - -static void mtk_aes_done_task(unsigned long data) -{ - struct mtk_aes_rec *aes = (struct mtk_aes_rec *)data; - struct mtk_cryp *cryp = aes->cryp; - - mtk_aes_unmap(cryp, aes); - aes->resume(cryp, aes); -} - -static irqreturn_t mtk_aes_irq(int irq, void *dev_id) -{ - struct mtk_aes_rec *aes = (struct mtk_aes_rec *)dev_id; - struct mtk_cryp *cryp = aes->cryp; - u32 val = mtk_aes_read(cryp, RDR_STAT(aes->id)); - - mtk_aes_write(cryp, RDR_STAT(aes->id), val); - - if (likely(AES_FLAGS_BUSY & aes->flags)) { - mtk_aes_write(cryp, RDR_PROC_COUNT(aes->id), MTK_CNT_RST); - mtk_aes_write(cryp, RDR_THRESH(aes->id), - MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE); - - tasklet_schedule(&aes->done_task); - } else { - dev_warn(cryp->dev, "AES interrupt when no active requests.\n"); - } - return IRQ_HANDLED; -} - -/* - * The purpose of creating encryption and decryption records is - * to process outbound/inbound data in parallel, it can improve - * performance in most use cases, such as IPSec VPN, especially - * under heavy network traffic. - */ -static int mtk_aes_record_init(struct mtk_cryp *cryp) -{ - struct mtk_aes_rec **aes = cryp->aes; - int i, err = -ENOMEM; - - for (i = 0; i < MTK_REC_NUM; i++) { - aes[i] = kzalloc(sizeof(**aes), GFP_KERNEL); - if (!aes[i]) - goto err_cleanup; - - aes[i]->buf = (void *)__get_free_pages(GFP_KERNEL, - AES_BUF_ORDER); - if (!aes[i]->buf) - goto err_cleanup; - - aes[i]->cryp = cryp; - - spin_lock_init(&aes[i]->lock); - crypto_init_queue(&aes[i]->queue, AES_QUEUE_SIZE); - - tasklet_init(&aes[i]->queue_task, mtk_aes_queue_task, - (unsigned long)aes[i]); - tasklet_init(&aes[i]->done_task, mtk_aes_done_task, - (unsigned long)aes[i]); - } - - /* Link to ring0 and ring1 respectively */ - aes[0]->id = MTK_RING0; - aes[1]->id = MTK_RING1; - - return 0; - -err_cleanup: - for (; i--; ) { - free_page((unsigned long)aes[i]->buf); - kfree(aes[i]); - } - - return err; -} - -static void mtk_aes_record_free(struct mtk_cryp *cryp) -{ - int i; - - for (i = 0; i < MTK_REC_NUM; i++) { - tasklet_kill(&cryp->aes[i]->done_task); - tasklet_kill(&cryp->aes[i]->queue_task); - - free_page((unsigned long)cryp->aes[i]->buf); - kfree(cryp->aes[i]); - } -} - -static void mtk_aes_unregister_algs(void) -{ - int i; - - crypto_unregister_aead(&aes_gcm_alg); - - for (i = 0; i < ARRAY_SIZE(aes_algs); i++) - crypto_unregister_alg(&aes_algs[i]); -} - -static int mtk_aes_register_algs(void) -{ - int err, i; - - for (i = 0; i < ARRAY_SIZE(aes_algs); i++) { - err = crypto_register_alg(&aes_algs[i]); - if (err) - goto err_aes_algs; - } - - err = crypto_register_aead(&aes_gcm_alg); - if (err) - goto err_aes_algs; - - return 0; - -err_aes_algs: - for (; i--; ) - crypto_unregister_alg(&aes_algs[i]); - - return err; -} - -int mtk_cipher_alg_register(struct mtk_cryp *cryp) -{ - int ret; - - INIT_LIST_HEAD(&cryp->aes_list); - - /* Initialize two cipher records */ - ret = mtk_aes_record_init(cryp); - if (ret) - goto err_record; - - ret = devm_request_irq(cryp->dev, cryp->irq[MTK_RING0], mtk_aes_irq, - 0, "mtk-aes", cryp->aes[0]); - if (ret) { - dev_err(cryp->dev, "unable to request AES irq.\n"); - goto err_res; - } - - ret = devm_request_irq(cryp->dev, cryp->irq[MTK_RING1], mtk_aes_irq, - 0, "mtk-aes", cryp->aes[1]); - if (ret) { - dev_err(cryp->dev, "unable to request AES irq.\n"); - goto err_res; - } - - /* Enable ring0 and ring1 interrupt */ - mtk_aes_write(cryp, AIC_ENABLE_SET(MTK_RING0), MTK_IRQ_RDR0); - mtk_aes_write(cryp, AIC_ENABLE_SET(MTK_RING1), MTK_IRQ_RDR1); - - spin_lock(&mtk_aes.lock); - list_add_tail(&cryp->aes_list, &mtk_aes.dev_list); - spin_unlock(&mtk_aes.lock); - - ret = mtk_aes_register_algs(); - if (ret) - goto err_algs; - - return 0; - -err_algs: - spin_lock(&mtk_aes.lock); - list_del(&cryp->aes_list); - spin_unlock(&mtk_aes.lock); -err_res: - mtk_aes_record_free(cryp); -err_record: - - dev_err(cryp->dev, "mtk-aes initialization failed.\n"); - return ret; -} - -void mtk_cipher_alg_release(struct mtk_cryp *cryp) -{ - spin_lock(&mtk_aes.lock); - list_del(&cryp->aes_list); - spin_unlock(&mtk_aes.lock); - - mtk_aes_unregister_algs(); - mtk_aes_record_free(cryp); -} diff --git a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-platform.c b/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-platform.c deleted file mode 100644 index b6ecc288b..000000000 --- a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-platform.c +++ /dev/null @@ -1,607 +0,0 @@ -/* - * Driver for EIP97 cryptographic accelerator. - * - * Copyright (c) 2016 Ryder Lee - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include "mtk-platform.h" - -#define MTK_BURST_SIZE_MSK GENMASK(7, 4) -#define MTK_BURST_SIZE(x) ((x) << 4) -#define MTK_DESC_SIZE(x) ((x) << 0) -#define MTK_DESC_OFFSET(x) ((x) << 16) -#define MTK_DESC_FETCH_SIZE(x) ((x) << 0) -#define MTK_DESC_FETCH_THRESH(x) ((x) << 16) -#define MTK_DESC_OVL_IRQ_EN BIT(25) -#define MTK_DESC_ATP_PRESENT BIT(30) - -#define MTK_DFSE_IDLE GENMASK(3, 0) -#define MTK_DFSE_THR_CTRL_EN BIT(30) -#define MTK_DFSE_THR_CTRL_RESET BIT(31) -#define MTK_DFSE_RING_ID(x) (((x) >> 12) & GENMASK(3, 0)) -#define MTK_DFSE_MIN_DATA(x) ((x) << 0) -#define MTK_DFSE_MAX_DATA(x) ((x) << 8) -#define MTK_DFE_MIN_CTRL(x) ((x) << 16) -#define MTK_DFE_MAX_CTRL(x) ((x) << 24) - -#define MTK_IN_BUF_MIN_THRESH(x) ((x) << 8) -#define MTK_IN_BUF_MAX_THRESH(x) ((x) << 12) -#define MTK_OUT_BUF_MIN_THRESH(x) ((x) << 0) -#define MTK_OUT_BUF_MAX_THRESH(x) ((x) << 4) -#define MTK_IN_TBUF_SIZE(x) (((x) >> 4) & GENMASK(3, 0)) -#define MTK_IN_DBUF_SIZE(x) (((x) >> 8) & GENMASK(3, 0)) -#define MTK_OUT_DBUF_SIZE(x) (((x) >> 16) & GENMASK(3, 0)) -#define MTK_CMD_FIFO_SIZE(x) (((x) >> 8) & GENMASK(3, 0)) -#define MTK_RES_FIFO_SIZE(x) (((x) >> 12) & GENMASK(3, 0)) - -#define MTK_PE_TK_LOC_AVL BIT(2) -#define MTK_PE_PROC_HELD BIT(14) -#define MTK_PE_TK_TIMEOUT_EN BIT(22) -#define MTK_PE_INPUT_DMA_ERR BIT(0) -#define MTK_PE_OUTPUT_DMA_ERR BIT(1) -#define MTK_PE_PKT_PORC_ERR BIT(2) -#define MTK_PE_PKT_TIMEOUT BIT(3) -#define MTK_PE_FATAL_ERR BIT(14) -#define MTK_PE_INPUT_DMA_ERR_EN BIT(16) -#define MTK_PE_OUTPUT_DMA_ERR_EN BIT(17) -#define MTK_PE_PKT_PORC_ERR_EN BIT(18) -#define MTK_PE_PKT_TIMEOUT_EN BIT(19) -#define MTK_PE_FATAL_ERR_EN BIT(30) -#define MTK_PE_INT_OUT_EN BIT(31) - -#define MTK_HIA_SIGNATURE ((u16)0x35ca) -#define MTK_HIA_DATA_WIDTH(x) (((x) >> 25) & GENMASK(1, 0)) -#define MTK_HIA_DMA_LENGTH(x) (((x) >> 20) & GENMASK(4, 0)) -#define MTK_CDR_STAT_CLR GENMASK(4, 0) -#define MTK_RDR_STAT_CLR GENMASK(7, 0) - -#define MTK_AIC_INT_MSK GENMASK(5, 0) -#define MTK_AIC_VER_MSK (GENMASK(15, 0) | GENMASK(27, 20)) -#define MTK_AIC_VER11 0x011036c9 -#define MTK_AIC_VER12 0x012036c9 -#define MTK_AIC_G_CLR GENMASK(30, 20) - -/** - * EIP97 is an integrated security subsystem to accelerate cryptographic - * functions and protocols to offload the host processor. - * Some important hardware modules are briefly introduced below: - * - * Host Interface Adapter(HIA) - the main interface between the host - * system and the hardware subsystem. It is responsible for attaching - * processing engine to the specific host bus interface and provides a - * standardized software view for off loading tasks to the engine. - * - * Command Descriptor Ring Manager(CDR Manager) - keeps track of how many - * CD the host has prepared in the CDR. It monitors the fill level of its - * CD-FIFO and if there's sufficient space for the next block of descriptors, - * then it fires off a DMA request to fetch a block of CDs. - * - * Data fetch engine(DFE) - It is responsible for parsing the CD and - * setting up the required control and packet data DMA transfers from - * system memory to the processing engine. - * - * Result Descriptor Ring Manager(RDR Manager) - same as CDR Manager, - * but target is result descriptors, Moreover, it also handles the RD - * updates under control of the DSE. For each packet data segment - * processed, the DSE triggers the RDR Manager to write the updated RD. - * If triggered to update, the RDR Manager sets up a DMA operation to - * copy the RD from the DSE to the correct location in the RDR. - * - * Data Store Engine(DSE) - It is responsible for parsing the prepared RD - * and setting up the required control and packet data DMA transfers from - * the processing engine to system memory. - * - * Advanced Interrupt Controllers(AICs) - receive interrupt request signals - * from various sources and combine them into one interrupt output. - * The AICs are used by: - * - One for the HIA global and processing engine interrupts. - * - The others for the descriptor ring interrupts. - */ - -/* Cryptographic engine capabilities */ -struct mtk_sys_cap { - /* host interface adapter */ - u32 hia_ver; - u32 hia_opt; - /* packet engine */ - u32 pkt_eng_opt; - /* global hardware */ - u32 hw_opt; -}; - -static void mtk_desc_ring_link(struct mtk_cryp *cryp, u32 mask) -{ - /* Assign rings to DFE/DSE thread and enable it */ - writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DFE_THR_CTRL); - writel(MTK_DFSE_THR_CTRL_EN | mask, cryp->base + DSE_THR_CTRL); -} - -static void mtk_dfe_dse_buf_setup(struct mtk_cryp *cryp, - struct mtk_sys_cap *cap) -{ - u32 width = MTK_HIA_DATA_WIDTH(cap->hia_opt) + 2; - u32 len = MTK_HIA_DMA_LENGTH(cap->hia_opt) - 1; - u32 ipbuf = min((u32)MTK_IN_DBUF_SIZE(cap->hw_opt) + width, len); - u32 opbuf = min((u32)MTK_OUT_DBUF_SIZE(cap->hw_opt) + width, len); - u32 itbuf = min((u32)MTK_IN_TBUF_SIZE(cap->hw_opt) + width, len); - - writel(MTK_DFSE_MIN_DATA(ipbuf - 1) | - MTK_DFSE_MAX_DATA(ipbuf) | - MTK_DFE_MIN_CTRL(itbuf - 1) | - MTK_DFE_MAX_CTRL(itbuf), - cryp->base + DFE_CFG); - - writel(MTK_DFSE_MIN_DATA(opbuf - 1) | - MTK_DFSE_MAX_DATA(opbuf), - cryp->base + DSE_CFG); - - writel(MTK_IN_BUF_MIN_THRESH(ipbuf - 1) | - MTK_IN_BUF_MAX_THRESH(ipbuf), - cryp->base + PE_IN_DBUF_THRESH); - - writel(MTK_IN_BUF_MIN_THRESH(itbuf - 1) | - MTK_IN_BUF_MAX_THRESH(itbuf), - cryp->base + PE_IN_TBUF_THRESH); - - writel(MTK_OUT_BUF_MIN_THRESH(opbuf - 1) | - MTK_OUT_BUF_MAX_THRESH(opbuf), - cryp->base + PE_OUT_DBUF_THRESH); - - writel(0, cryp->base + PE_OUT_TBUF_THRESH); - writel(0, cryp->base + PE_OUT_BUF_CTRL); -} - -static int mtk_dfe_dse_state_check(struct mtk_cryp *cryp) -{ - int ret = -EINVAL; - u32 val; - - /* Check for completion of all DMA transfers */ - val = readl(cryp->base + DFE_THR_STAT); - if (MTK_DFSE_RING_ID(val) == MTK_DFSE_IDLE) { - val = readl(cryp->base + DSE_THR_STAT); - if (MTK_DFSE_RING_ID(val) == MTK_DFSE_IDLE) - ret = 0; - } - - if (!ret) { - /* Take DFE/DSE thread out of reset */ - writel(0, cryp->base + DFE_THR_CTRL); - writel(0, cryp->base + DSE_THR_CTRL); - } else { - return -EBUSY; - } - - return 0; -} - -static int mtk_dfe_dse_reset(struct mtk_cryp *cryp) -{ - int err; - - /* Reset DSE/DFE and correct system priorities for all rings. */ - writel(MTK_DFSE_THR_CTRL_RESET, cryp->base + DFE_THR_CTRL); - writel(0, cryp->base + DFE_PRIO_0); - writel(0, cryp->base + DFE_PRIO_1); - writel(0, cryp->base + DFE_PRIO_2); - writel(0, cryp->base + DFE_PRIO_3); - - writel(MTK_DFSE_THR_CTRL_RESET, cryp->base + DSE_THR_CTRL); - writel(0, cryp->base + DSE_PRIO_0); - writel(0, cryp->base + DSE_PRIO_1); - writel(0, cryp->base + DSE_PRIO_2); - writel(0, cryp->base + DSE_PRIO_3); - - err = mtk_dfe_dse_state_check(cryp); - if (err) - return err; - - return 0; -} - -static void mtk_cmd_desc_ring_setup(struct mtk_cryp *cryp, - int i, struct mtk_sys_cap *cap) -{ - /* Full descriptor that fits FIFO minus one */ - u32 count = - ((1 << MTK_CMD_FIFO_SIZE(cap->hia_opt)) / MTK_DESC_SZ) - 1; - - /* Temporarily disable external triggering */ - writel(0, cryp->base + CDR_CFG(i)); - - /* Clear CDR count */ - writel(MTK_CNT_RST, cryp->base + CDR_PREP_COUNT(i)); - writel(MTK_CNT_RST, cryp->base + CDR_PROC_COUNT(i)); - - writel(0, cryp->base + CDR_PREP_PNTR(i)); - writel(0, cryp->base + CDR_PROC_PNTR(i)); - writel(0, cryp->base + CDR_DMA_CFG(i)); - - /* Configure CDR host address space */ - writel(0, cryp->base + CDR_BASE_ADDR_HI(i)); - writel(cryp->ring[i]->cmd_dma, cryp->base + CDR_BASE_ADDR_LO(i)); - - writel(MTK_DESC_RING_SZ, cryp->base + CDR_RING_SIZE(i)); - - /* Clear and disable all CDR interrupts */ - writel(MTK_CDR_STAT_CLR, cryp->base + CDR_STAT(i)); - - /* - * Set command descriptor offset and enable additional - * token present in descriptor. - */ - writel(MTK_DESC_SIZE(MTK_DESC_SZ) | - MTK_DESC_OFFSET(MTK_DESC_OFF) | - MTK_DESC_ATP_PRESENT, - cryp->base + CDR_DESC_SIZE(i)); - - writel(MTK_DESC_FETCH_SIZE(count * MTK_DESC_OFF) | - MTK_DESC_FETCH_THRESH(count * MTK_DESC_SZ), - cryp->base + CDR_CFG(i)); -} - -static void mtk_res_desc_ring_setup(struct mtk_cryp *cryp, - int i, struct mtk_sys_cap *cap) -{ - u32 rndup = 2; - u32 count = ((1 << MTK_RES_FIFO_SIZE(cap->hia_opt)) / rndup) - 1; - - /* Temporarily disable external triggering */ - writel(0, cryp->base + RDR_CFG(i)); - - /* Clear RDR count */ - writel(MTK_CNT_RST, cryp->base + RDR_PREP_COUNT(i)); - writel(MTK_CNT_RST, cryp->base + RDR_PROC_COUNT(i)); - - writel(0, cryp->base + RDR_PREP_PNTR(i)); - writel(0, cryp->base + RDR_PROC_PNTR(i)); - writel(0, cryp->base + RDR_DMA_CFG(i)); - - /* Configure RDR host address space */ - writel(0, cryp->base + RDR_BASE_ADDR_HI(i)); - writel(cryp->ring[i]->res_dma, cryp->base + RDR_BASE_ADDR_LO(i)); - - writel(MTK_DESC_RING_SZ, cryp->base + RDR_RING_SIZE(i)); - writel(MTK_RDR_STAT_CLR, cryp->base + RDR_STAT(i)); - - /* - * RDR manager generates update interrupts on a per-completed-packet, - * and the rd_proc_thresh_irq interrupt is fired when proc_pkt_count - * for the RDR exceeds the number of packets. - */ - writel(MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE, - cryp->base + RDR_THRESH(i)); - - /* - * Configure a threshold and time-out value for the processed - * result descriptors (or complete packets) that are written to - * the RDR. - */ - writel(MTK_DESC_SIZE(MTK_DESC_SZ) | MTK_DESC_OFFSET(MTK_DESC_OFF), - cryp->base + RDR_DESC_SIZE(i)); - - /* - * Configure HIA fetch size and fetch threshold that are used to - * fetch blocks of multiple descriptors. - */ - writel(MTK_DESC_FETCH_SIZE(count * MTK_DESC_OFF) | - MTK_DESC_FETCH_THRESH(count * rndup) | - MTK_DESC_OVL_IRQ_EN, - cryp->base + RDR_CFG(i)); -} - -static int mtk_packet_engine_setup(struct mtk_cryp *cryp) -{ - struct mtk_sys_cap cap; - int i, err; - u32 val; - - cap.hia_ver = readl(cryp->base + HIA_VERSION); - cap.hia_opt = readl(cryp->base + HIA_OPTIONS); - cap.hw_opt = readl(cryp->base + EIP97_OPTIONS); - - if (!(((u16)cap.hia_ver) == MTK_HIA_SIGNATURE)) - return -EINVAL; - - /* Configure endianness conversion method for master (DMA) interface */ - writel(0, cryp->base + EIP97_MST_CTRL); - - /* Set HIA burst size */ - val = readl(cryp->base + HIA_MST_CTRL); - val &= ~MTK_BURST_SIZE_MSK; - val |= MTK_BURST_SIZE(5); - writel(val, cryp->base + HIA_MST_CTRL); - - err = mtk_dfe_dse_reset(cryp); - if (err) { - dev_err(cryp->dev, "Failed to reset DFE and DSE.\n"); - return err; - } - - mtk_dfe_dse_buf_setup(cryp, &cap); - - /* Enable the 4 rings for the packet engines. */ - mtk_desc_ring_link(cryp, 0xf); - - for (i = 0; i < MTK_RING_MAX; i++) { - mtk_cmd_desc_ring_setup(cryp, i, &cap); - mtk_res_desc_ring_setup(cryp, i, &cap); - } - - writel(MTK_PE_TK_LOC_AVL | MTK_PE_PROC_HELD | MTK_PE_TK_TIMEOUT_EN, - cryp->base + PE_TOKEN_CTRL_STAT); - - /* Clear all pending interrupts */ - writel(MTK_AIC_G_CLR, cryp->base + AIC_G_ACK); - writel(MTK_PE_INPUT_DMA_ERR | MTK_PE_OUTPUT_DMA_ERR | - MTK_PE_PKT_PORC_ERR | MTK_PE_PKT_TIMEOUT | - MTK_PE_FATAL_ERR | MTK_PE_INPUT_DMA_ERR_EN | - MTK_PE_OUTPUT_DMA_ERR_EN | MTK_PE_PKT_PORC_ERR_EN | - MTK_PE_PKT_TIMEOUT_EN | MTK_PE_FATAL_ERR_EN | - MTK_PE_INT_OUT_EN, - cryp->base + PE_INTERRUPT_CTRL_STAT); - - return 0; -} - -static int mtk_aic_cap_check(struct mtk_cryp *cryp, int hw) -{ - u32 val; - - if (hw == MTK_RING_MAX) - val = readl(cryp->base + AIC_G_VERSION); - else - val = readl(cryp->base + AIC_VERSION(hw)); - - val &= MTK_AIC_VER_MSK; - if (val != MTK_AIC_VER11 && val != MTK_AIC_VER12) - return -ENXIO; - - if (hw == MTK_RING_MAX) - val = readl(cryp->base + AIC_G_OPTIONS); - else - val = readl(cryp->base + AIC_OPTIONS(hw)); - - val &= MTK_AIC_INT_MSK; - if (!val || val > 32) - return -ENXIO; - - return 0; -} - -static int mtk_aic_init(struct mtk_cryp *cryp, int hw) -{ - int err; - - err = mtk_aic_cap_check(cryp, hw); - if (err) - return err; - - /* Disable all interrupts and set initial configuration */ - if (hw == MTK_RING_MAX) { - writel(0, cryp->base + AIC_G_ENABLE_CTRL); - writel(0, cryp->base + AIC_G_POL_CTRL); - writel(0, cryp->base + AIC_G_TYPE_CTRL); - writel(0, cryp->base + AIC_G_ENABLE_SET); - } else { - writel(0, cryp->base + AIC_ENABLE_CTRL(hw)); - writel(0, cryp->base + AIC_POL_CTRL(hw)); - writel(0, cryp->base + AIC_TYPE_CTRL(hw)); - writel(0, cryp->base + AIC_ENABLE_SET(hw)); - } - - return 0; -} - -static int mtk_accelerator_init(struct mtk_cryp *cryp) -{ - int i, err; - - /* Initialize advanced interrupt controller(AIC) */ - for (i = 0; i < MTK_IRQ_NUM; i++) { - err = mtk_aic_init(cryp, i); - if (err) { - dev_err(cryp->dev, "Failed to initialize AIC.\n"); - return err; - } - } - - /* Initialize packet engine */ - err = mtk_packet_engine_setup(cryp); - if (err) { - dev_err(cryp->dev, "Failed to configure packet engine.\n"); - return err; - } - - return 0; -} - -static void mtk_desc_dma_free(struct mtk_cryp *cryp) -{ - int i; - - for (i = 0; i < MTK_RING_MAX; i++) { - dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ, - cryp->ring[i]->res_base, - cryp->ring[i]->res_dma); - dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ, - cryp->ring[i]->cmd_base, - cryp->ring[i]->cmd_dma); - kfree(cryp->ring[i]); - } -} - -static int mtk_desc_ring_alloc(struct mtk_cryp *cryp) -{ - struct mtk_ring **ring = cryp->ring; - int i, err = ENOMEM; - - for (i = 0; i < MTK_RING_MAX; i++) { - ring[i] = kzalloc(sizeof(**ring), GFP_KERNEL); - if (!ring[i]) - goto err_cleanup; - - ring[i]->cmd_base = dma_zalloc_coherent(cryp->dev, - MTK_DESC_RING_SZ, - &ring[i]->cmd_dma, - GFP_KERNEL); - if (!ring[i]->cmd_base) - goto err_cleanup; - - ring[i]->res_base = dma_zalloc_coherent(cryp->dev, - MTK_DESC_RING_SZ, - &ring[i]->res_dma, - GFP_KERNEL); - if (!ring[i]->res_base) - goto err_cleanup; - - ring[i]->cmd_next = ring[i]->cmd_base; - ring[i]->res_next = ring[i]->res_base; - } - return 0; - -err_cleanup: - for (; i--; ) { - dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ, - ring[i]->res_base, ring[i]->res_dma); - dma_free_coherent(cryp->dev, MTK_DESC_RING_SZ, - ring[i]->cmd_base, ring[i]->cmd_dma); - kfree(ring[i]); - } - return err; -} - -static int mtk_crypto_probe(struct platform_device *pdev) -{ - struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct mtk_cryp *cryp; - int i, err; - - cryp = devm_kzalloc(&pdev->dev, sizeof(*cryp), GFP_KERNEL); - if (!cryp) - return -ENOMEM; - - cryp->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(cryp->base)) - return PTR_ERR(cryp->base); - - for (i = 0; i < MTK_IRQ_NUM; i++) { - cryp->irq[i] = platform_get_irq(pdev, i); - if (cryp->irq[i] < 0) { - dev_err(cryp->dev, "no IRQ:%d resource info\n", i); - return -ENXIO; - } - } - - cryp->clk_ethif = devm_clk_get(&pdev->dev, "ethif"); - cryp->clk_cryp = devm_clk_get(&pdev->dev, "cryp"); - if (IS_ERR(cryp->clk_ethif) || IS_ERR(cryp->clk_cryp)) - return -EPROBE_DEFER; - - cryp->dev = &pdev->dev; - pm_runtime_enable(cryp->dev); - pm_runtime_get_sync(cryp->dev); - - err = clk_prepare_enable(cryp->clk_ethif); - if (err) - goto err_clk_ethif; - - err = clk_prepare_enable(cryp->clk_cryp); - if (err) - goto err_clk_cryp; - - /* Allocate four command/result descriptor rings */ - err = mtk_desc_ring_alloc(cryp); - if (err) { - dev_err(cryp->dev, "Unable to allocate descriptor rings.\n"); - goto err_resource; - } - - /* Initialize hardware modules */ - err = mtk_accelerator_init(cryp); - if (err) { - dev_err(cryp->dev, "Failed to initialize cryptographic engine.\n"); - goto err_engine; - } - - err = mtk_cipher_alg_register(cryp); - if (err) { - dev_err(cryp->dev, "Unable to register cipher algorithm.\n"); - goto err_cipher; - } - - err = mtk_hash_alg_register(cryp); - if (err) { - dev_err(cryp->dev, "Unable to register hash algorithm.\n"); - goto err_hash; - } - - platform_set_drvdata(pdev, cryp); - return 0; - -err_hash: - mtk_cipher_alg_release(cryp); -err_cipher: - mtk_dfe_dse_reset(cryp); -err_engine: - mtk_desc_dma_free(cryp); -err_resource: - clk_disable_unprepare(cryp->clk_cryp); -err_clk_cryp: - clk_disable_unprepare(cryp->clk_ethif); -err_clk_ethif: - pm_runtime_put_sync(cryp->dev); - pm_runtime_disable(cryp->dev); - - return err; -} - -static int mtk_crypto_remove(struct platform_device *pdev) -{ - struct mtk_cryp *cryp = platform_get_drvdata(pdev); - - mtk_hash_alg_release(cryp); - mtk_cipher_alg_release(cryp); - mtk_desc_dma_free(cryp); - - clk_disable_unprepare(cryp->clk_cryp); - clk_disable_unprepare(cryp->clk_ethif); - - pm_runtime_put_sync(cryp->dev); - pm_runtime_disable(cryp->dev); - platform_set_drvdata(pdev, NULL); - - return 0; -} - -static const struct of_device_id of_crypto_id[] = { - { .compatible = "mediatek,eip97-crypto" }, - {}, -}; -MODULE_DEVICE_TABLE(of, of_crypto_id); - -static struct platform_driver mtk_crypto_driver = { - .probe = mtk_crypto_probe, - .remove = mtk_crypto_remove, - .driver = { - .name = "mtk-crypto", - .owner = THIS_MODULE, - .of_match_table = of_crypto_id, - }, -}; -module_platform_driver(mtk_crypto_driver); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Ryder Lee "); -MODULE_DESCRIPTION("Cryptographic accelerator driver for EIP97"); diff --git a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-platform.h b/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-platform.h deleted file mode 100644 index 303c152dc..000000000 --- a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-platform.h +++ /dev/null @@ -1,237 +0,0 @@ -/* - * Driver for EIP97 cryptographic accelerator. - * - * Copyright (c) 2016 Ryder Lee - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __MTK_PLATFORM_H_ -#define __MTK_PLATFORM_H_ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "mtk-regs.h" - -#define MTK_RDR_PROC_THRESH BIT(0) -#define MTK_RDR_PROC_MODE BIT(23) -#define MTK_CNT_RST BIT(31) -#define MTK_IRQ_RDR0 BIT(1) -#define MTK_IRQ_RDR1 BIT(3) -#define MTK_IRQ_RDR2 BIT(5) -#define MTK_IRQ_RDR3 BIT(7) - -#define SIZE_IN_WORDS(x) ((x) >> 2) - -/** - * Ring 0/1 are used by AES encrypt and decrypt. - * Ring 2/3 are used by SHA. - */ -enum { - MTK_RING0, - MTK_RING1, - MTK_RING2, - MTK_RING3, - MTK_RING_MAX -}; - -#define MTK_REC_NUM (MTK_RING_MAX / 2) -#define MTK_IRQ_NUM 5 - -/** - * struct mtk_desc - DMA descriptor - * @hdr: the descriptor control header - * @buf: DMA address of input buffer segment - * @ct: DMA address of command token that control operation flow - * @ct_hdr: the command token control header - * @tag: the user-defined field - * @tfm: DMA address of transform state - * @bound: align descriptors offset boundary - * - * Structure passed to the crypto engine to describe where source - * data needs to be fetched and how it needs to be processed. - */ -struct mtk_desc { - __le32 hdr; - __le32 buf; - __le32 ct; - __le32 ct_hdr; - __le32 tag; - __le32 tfm; - __le32 bound[2]; -}; - -#define MTK_DESC_NUM 512 -#define MTK_DESC_OFF SIZE_IN_WORDS(sizeof(struct mtk_desc)) -#define MTK_DESC_SZ (MTK_DESC_OFF - 2) -#define MTK_DESC_RING_SZ ((sizeof(struct mtk_desc) * MTK_DESC_NUM)) -#define MTK_DESC_CNT(x) ((MTK_DESC_OFF * (x)) << 2) -#define MTK_DESC_LAST cpu_to_le32(BIT(22)) -#define MTK_DESC_FIRST cpu_to_le32(BIT(23)) -#define MTK_DESC_BUF_LEN(x) cpu_to_le32(x) -#define MTK_DESC_CT_LEN(x) cpu_to_le32((x) << 24) - -/** - * struct mtk_ring - Descriptor ring - * @cmd_base: pointer to command descriptor ring base - * @cmd_next: pointer to the next command descriptor - * @cmd_dma: DMA address of command descriptor ring - * @res_base: pointer to result descriptor ring base - * @res_next: pointer to the next result descriptor - * @res_prev: pointer to the previous result descriptor - * @res_dma: DMA address of result descriptor ring - * - * A descriptor ring is a circular buffer that is used to manage - * one or more descriptors. There are two type of descriptor rings; - * the command descriptor ring and result descriptor ring. - */ -struct mtk_ring { - struct mtk_desc *cmd_base; - struct mtk_desc *cmd_next; - dma_addr_t cmd_dma; - struct mtk_desc *res_base; - struct mtk_desc *res_next; - struct mtk_desc *res_prev; - dma_addr_t res_dma; -}; - -/** - * struct mtk_aes_dma - Structure that holds sg list info - * @sg: pointer to scatter-gather list - * @nents: number of entries in the sg list - * @remainder: remainder of sg list - * @sg_len: number of entries in the sg mapped list - */ -struct mtk_aes_dma { - struct scatterlist *sg; - int nents; - u32 remainder; - u32 sg_len; -}; - -struct mtk_aes_base_ctx; -struct mtk_aes_rec; -struct mtk_cryp; - -typedef int (*mtk_aes_fn)(struct mtk_cryp *cryp, struct mtk_aes_rec *aes); - -/** - * struct mtk_aes_rec - AES operation record - * @cryp: pointer to Cryptographic device - * @queue: crypto request queue - * @areq: pointer to async request - * @done_task: the tasklet is use in AES interrupt - * @queue_task: the tasklet is used to dequeue request - * @ctx: pointer to current context - * @src: the structure that holds source sg list info - * @dst: the structure that holds destination sg list info - * @aligned_sg: the scatter list is use to alignment - * @real_dst: pointer to the destination sg list - * @resume: pointer to resume function - * @total: request buffer length - * @buf: pointer to page buffer - * @id: the current use of ring - * @flags: it's describing AES operation state - * @lock: the async queue lock - * - * Structure used to record AES execution state. - */ -struct mtk_aes_rec { - struct mtk_cryp *cryp; - struct crypto_queue queue; - struct crypto_async_request *areq; - struct tasklet_struct done_task; - struct tasklet_struct queue_task; - struct mtk_aes_base_ctx *ctx; - struct mtk_aes_dma src; - struct mtk_aes_dma dst; - - struct scatterlist aligned_sg; - struct scatterlist *real_dst; - - mtk_aes_fn resume; - - size_t total; - void *buf; - - u8 id; - unsigned long flags; - /* queue lock */ - spinlock_t lock; -}; - -/** - * struct mtk_sha_rec - SHA operation record - * @cryp: pointer to Cryptographic device - * @queue: crypto request queue - * @req: pointer to ahash request - * @done_task: the tasklet is use in SHA interrupt - * @queue_task: the tasklet is used to dequeue request - * @id: the current use of ring - * @flags: it's describing SHA operation state - * @lock: the async queue lock - * - * Structure used to record SHA execution state. - */ -struct mtk_sha_rec { - struct mtk_cryp *cryp; - struct crypto_queue queue; - struct ahash_request *req; - struct tasklet_struct done_task; - struct tasklet_struct queue_task; - - u8 id; - unsigned long flags; - /* queue lock */ - spinlock_t lock; -}; - -/** - * struct mtk_cryp - Cryptographic device - * @base: pointer to mapped register I/O base - * @dev: pointer to device - * @clk_ethif: pointer to ethif clock - * @clk_cryp: pointer to crypto clock - * @irq: global system and rings IRQ - * @ring: pointer to descriptor rings - * @aes: pointer to operation record of AES - * @sha: pointer to operation record of SHA - * @aes_list: device list of AES - * @sha_list: device list of SHA - * @rec: it's used to select SHA record for tfm - * - * Structure storing cryptographic device information. - */ -struct mtk_cryp { - void __iomem *base; - struct device *dev; - struct clk *clk_ethif; - struct clk *clk_cryp; - int irq[MTK_IRQ_NUM]; - - struct mtk_ring *ring[MTK_RING_MAX]; - struct mtk_aes_rec *aes[MTK_REC_NUM]; - struct mtk_sha_rec *sha[MTK_REC_NUM]; - - struct list_head aes_list; - struct list_head sha_list; - - bool rec; -}; - -int mtk_cipher_alg_register(struct mtk_cryp *cryp); -void mtk_cipher_alg_release(struct mtk_cryp *cryp); -int mtk_hash_alg_register(struct mtk_cryp *cryp); -void mtk_hash_alg_release(struct mtk_cryp *cryp); - -#endif /* __MTK_PLATFORM_H_ */ diff --git a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-regs.h b/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-regs.h deleted file mode 100644 index 94f4eb85b..000000000 --- a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-regs.h +++ /dev/null @@ -1,194 +0,0 @@ -/* - * Support for MediaTek cryptographic accelerator. - * - * Copyright (c) 2016 MediaTek Inc. - * Author: Ryder Lee - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License. - * - */ - -#ifndef __MTK_REGS_H__ -#define __MTK_REGS_H__ - -/* HIA, Command Descriptor Ring Manager */ -#define CDR_BASE_ADDR_LO(x) (0x0 + ((x) << 12)) -#define CDR_BASE_ADDR_HI(x) (0x4 + ((x) << 12)) -#define CDR_DATA_BASE_ADDR_LO(x) (0x8 + ((x) << 12)) -#define CDR_DATA_BASE_ADDR_HI(x) (0xC + ((x) << 12)) -#define CDR_ACD_BASE_ADDR_LO(x) (0x10 + ((x) << 12)) -#define CDR_ACD_BASE_ADDR_HI(x) (0x14 + ((x) << 12)) -#define CDR_RING_SIZE(x) (0x18 + ((x) << 12)) -#define CDR_DESC_SIZE(x) (0x1C + ((x) << 12)) -#define CDR_CFG(x) (0x20 + ((x) << 12)) -#define CDR_DMA_CFG(x) (0x24 + ((x) << 12)) -#define CDR_THRESH(x) (0x28 + ((x) << 12)) -#define CDR_PREP_COUNT(x) (0x2C + ((x) << 12)) -#define CDR_PROC_COUNT(x) (0x30 + ((x) << 12)) -#define CDR_PREP_PNTR(x) (0x34 + ((x) << 12)) -#define CDR_PROC_PNTR(x) (0x38 + ((x) << 12)) -#define CDR_STAT(x) (0x3C + ((x) << 12)) - -/* HIA, Result Descriptor Ring Manager */ -#define RDR_BASE_ADDR_LO(x) (0x800 + ((x) << 12)) -#define RDR_BASE_ADDR_HI(x) (0x804 + ((x) << 12)) -#define RDR_DATA_BASE_ADDR_LO(x) (0x808 + ((x) << 12)) -#define RDR_DATA_BASE_ADDR_HI(x) (0x80C + ((x) << 12)) -#define RDR_ACD_BASE_ADDR_LO(x) (0x810 + ((x) << 12)) -#define RDR_ACD_BASE_ADDR_HI(x) (0x814 + ((x) << 12)) -#define RDR_RING_SIZE(x) (0x818 + ((x) << 12)) -#define RDR_DESC_SIZE(x) (0x81C + ((x) << 12)) -#define RDR_CFG(x) (0x820 + ((x) << 12)) -#define RDR_DMA_CFG(x) (0x824 + ((x) << 12)) -#define RDR_THRESH(x) (0x828 + ((x) << 12)) -#define RDR_PREP_COUNT(x) (0x82C + ((x) << 12)) -#define RDR_PROC_COUNT(x) (0x830 + ((x) << 12)) -#define RDR_PREP_PNTR(x) (0x834 + ((x) << 12)) -#define RDR_PROC_PNTR(x) (0x838 + ((x) << 12)) -#define RDR_STAT(x) (0x83C + ((x) << 12)) - -/* HIA, Ring AIC */ -#define AIC_POL_CTRL(x) (0xE000 - ((x) << 12)) -#define AIC_TYPE_CTRL(x) (0xE004 - ((x) << 12)) -#define AIC_ENABLE_CTRL(x) (0xE008 - ((x) << 12)) -#define AIC_RAW_STAL(x) (0xE00C - ((x) << 12)) -#define AIC_ENABLE_SET(x) (0xE00C - ((x) << 12)) -#define AIC_ENABLED_STAT(x) (0xE010 - ((x) << 12)) -#define AIC_ACK(x) (0xE010 - ((x) << 12)) -#define AIC_ENABLE_CLR(x) (0xE014 - ((x) << 12)) -#define AIC_OPTIONS(x) (0xE018 - ((x) << 12)) -#define AIC_VERSION(x) (0xE01C - ((x) << 12)) - -/* HIA, Global AIC */ -#define AIC_G_POL_CTRL 0xF800 -#define AIC_G_TYPE_CTRL 0xF804 -#define AIC_G_ENABLE_CTRL 0xF808 -#define AIC_G_RAW_STAT 0xF80C -#define AIC_G_ENABLE_SET 0xF80C -#define AIC_G_ENABLED_STAT 0xF810 -#define AIC_G_ACK 0xF810 -#define AIC_G_ENABLE_CLR 0xF814 -#define AIC_G_OPTIONS 0xF818 -#define AIC_G_VERSION 0xF81C - -/* HIA, Data Fetch Engine */ -#define DFE_CFG 0xF000 -#define DFE_PRIO_0 0xF010 -#define DFE_PRIO_1 0xF014 -#define DFE_PRIO_2 0xF018 -#define DFE_PRIO_3 0xF01C - -/* HIA, Data Fetch Engine access monitoring for CDR */ -#define DFE_RING_REGION_LO(x) (0xF080 + ((x) << 3)) -#define DFE_RING_REGION_HI(x) (0xF084 + ((x) << 3)) - -/* HIA, Data Fetch Engine thread control and status for thread */ -#define DFE_THR_CTRL 0xF200 -#define DFE_THR_STAT 0xF204 -#define DFE_THR_DESC_CTRL 0xF208 -#define DFE_THR_DESC_DPTR_LO 0xF210 -#define DFE_THR_DESC_DPTR_HI 0xF214 -#define DFE_THR_DESC_ACDPTR_LO 0xF218 -#define DFE_THR_DESC_ACDPTR_HI 0xF21C - -/* HIA, Data Store Engine */ -#define DSE_CFG 0xF400 -#define DSE_PRIO_0 0xF410 -#define DSE_PRIO_1 0xF414 -#define DSE_PRIO_2 0xF418 -#define DSE_PRIO_3 0xF41C - -/* HIA, Data Store Engine access monitoring for RDR */ -#define DSE_RING_REGION_LO(x) (0xF480 + ((x) << 3)) -#define DSE_RING_REGION_HI(x) (0xF484 + ((x) << 3)) - -/* HIA, Data Store Engine thread control and status for thread */ -#define DSE_THR_CTRL 0xF600 -#define DSE_THR_STAT 0xF604 -#define DSE_THR_DESC_CTRL 0xF608 -#define DSE_THR_DESC_DPTR_LO 0xF610 -#define DSE_THR_DESC_DPTR_HI 0xF614 -#define DSE_THR_DESC_S_DPTR_LO 0xF618 -#define DSE_THR_DESC_S_DPTR_HI 0xF61C -#define DSE_THR_ERROR_STAT 0xF620 - -/* HIA Global */ -#define HIA_MST_CTRL 0xFFF4 -#define HIA_OPTIONS 0xFFF8 -#define HIA_VERSION 0xFFFC - -/* Processing Engine Input Side, Processing Engine */ -#define PE_IN_DBUF_THRESH 0x10000 -#define PE_IN_TBUF_THRESH 0x10100 - -/* Packet Engine Configuration / Status Registers */ -#define PE_TOKEN_CTRL_STAT 0x11000 -#define PE_FUNCTION_EN 0x11004 -#define PE_CONTEXT_CTRL 0x11008 -#define PE_INTERRUPT_CTRL_STAT 0x11010 -#define PE_CONTEXT_STAT 0x1100C -#define PE_OUT_TRANS_CTRL_STAT 0x11018 -#define PE_OUT_BUF_CTRL 0x1101C - -/* Packet Engine PRNG Registers */ -#define PE_PRNG_STAT 0x11040 -#define PE_PRNG_CTRL 0x11044 -#define PE_PRNG_SEED_L 0x11048 -#define PE_PRNG_SEED_H 0x1104C -#define PE_PRNG_KEY_0_L 0x11050 -#define PE_PRNG_KEY_0_H 0x11054 -#define PE_PRNG_KEY_1_L 0x11058 -#define PE_PRNG_KEY_1_H 0x1105C -#define PE_PRNG_RES_0 0x11060 -#define PE_PRNG_RES_1 0x11064 -#define PE_PRNG_RES_2 0x11068 -#define PE_PRNG_RES_3 0x1106C -#define PE_PRNG_LFSR_L 0x11070 -#define PE_PRNG_LFSR_H 0x11074 - -/* Packet Engine AIC */ -#define PE_EIP96_AIC_POL_CTRL 0x113C0 -#define PE_EIP96_AIC_TYPE_CTRL 0x113C4 -#define PE_EIP96_AIC_ENABLE_CTRL 0x113C8 -#define PE_EIP96_AIC_RAW_STAT 0x113CC -#define PE_EIP96_AIC_ENABLE_SET 0x113CC -#define PE_EIP96_AIC_ENABLED_STAT 0x113D0 -#define PE_EIP96_AIC_ACK 0x113D0 -#define PE_EIP96_AIC_ENABLE_CLR 0x113D4 -#define PE_EIP96_AIC_OPTIONS 0x113D8 -#define PE_EIP96_AIC_VERSION 0x113DC - -/* Packet Engine Options & Version Registers */ -#define PE_EIP96_OPTIONS 0x113F8 -#define PE_EIP96_VERSION 0x113FC - -/* Processing Engine Output Side */ -#define PE_OUT_DBUF_THRESH 0x11C00 -#define PE_OUT_TBUF_THRESH 0x11D00 - -/* Processing Engine Local AIC */ -#define PE_AIC_POL_CTRL 0x11F00 -#define PE_AIC_TYPE_CTRL 0x11F04 -#define PE_AIC_ENABLE_CTRL 0x11F08 -#define PE_AIC_RAW_STAT 0x11F0C -#define PE_AIC_ENABLE_SET 0x11F0C -#define PE_AIC_ENABLED_STAT 0x11F10 -#define PE_AIC_ENABLE_CLR 0x11F14 -#define PE_AIC_OPTIONS 0x11F18 -#define PE_AIC_VERSION 0x11F1C - -/* Processing Engine General Configuration and Version */ -#define PE_IN_FLIGHT 0x11FF0 -#define PE_OPTIONS 0x11FF8 -#define PE_VERSION 0x11FFC - -/* EIP-97 - Global */ -#define EIP97_CLOCK_STATE 0x1FFE4 -#define EIP97_FORCE_CLOCK_ON 0x1FFE8 -#define EIP97_FORCE_CLOCK_OFF 0x1FFEC -#define EIP97_MST_CTRL 0x1FFF4 -#define EIP97_OPTIONS 0x1FFF8 -#define EIP97_VERSION 0x1FFFC -#endif /* __MTK_REGS_H__ */ diff --git a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-sha.c b/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-sha.c deleted file mode 100644 index 2226f12d1..000000000 --- a/target/linux/mediatek/files/drivers/crypto/mediatek/mtk-sha.c +++ /dev/null @@ -1,1358 +0,0 @@ -/* - * Cryptographic API. - * - * Driver for EIP97 SHA1/SHA2(HMAC) acceleration. - * - * Copyright (c) 2016 Ryder Lee - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Some ideas are from atmel-sha.c and omap-sham.c drivers. - */ - -#include -#include "mtk-platform.h" - -#define SHA_ALIGN_MSK (sizeof(u32) - 1) -#define SHA_QUEUE_SIZE 512 -#define SHA_BUF_SIZE ((u32)PAGE_SIZE) - -#define SHA_OP_UPDATE 1 -#define SHA_OP_FINAL 2 - -#define SHA_DATA_LEN_MSK cpu_to_le32(GENMASK(16, 0)) -#define SHA_MAX_DIGEST_BUF_SIZE 32 - -/* SHA command token */ -#define SHA_CT_SIZE 5 -#define SHA_CT_CTRL_HDR cpu_to_le32(0x02220000) -#define SHA_CMD0 cpu_to_le32(0x03020000) -#define SHA_CMD1 cpu_to_le32(0x21060000) -#define SHA_CMD2 cpu_to_le32(0xe0e63802) - -/* SHA transform information */ -#define SHA_TFM_HASH cpu_to_le32(0x2 << 0) -#define SHA_TFM_SIZE(x) cpu_to_le32((x) << 8) -#define SHA_TFM_START cpu_to_le32(0x1 << 4) -#define SHA_TFM_CONTINUE cpu_to_le32(0x1 << 5) -#define SHA_TFM_HASH_STORE cpu_to_le32(0x1 << 19) -#define SHA_TFM_SHA1 cpu_to_le32(0x2 << 23) -#define SHA_TFM_SHA256 cpu_to_le32(0x3 << 23) -#define SHA_TFM_SHA224 cpu_to_le32(0x4 << 23) -#define SHA_TFM_SHA512 cpu_to_le32(0x5 << 23) -#define SHA_TFM_SHA384 cpu_to_le32(0x6 << 23) -#define SHA_TFM_DIGEST(x) cpu_to_le32(((x) & GENMASK(3, 0)) << 24) - -/* SHA flags */ -#define SHA_FLAGS_BUSY BIT(0) -#define SHA_FLAGS_FINAL BIT(1) -#define SHA_FLAGS_FINUP BIT(2) -#define SHA_FLAGS_SG BIT(3) -#define SHA_FLAGS_ALGO_MSK GENMASK(8, 4) -#define SHA_FLAGS_SHA1 BIT(4) -#define SHA_FLAGS_SHA224 BIT(5) -#define SHA_FLAGS_SHA256 BIT(6) -#define SHA_FLAGS_SHA384 BIT(7) -#define SHA_FLAGS_SHA512 BIT(8) -#define SHA_FLAGS_HMAC BIT(9) -#define SHA_FLAGS_PAD BIT(10) - -/** - * mtk_sha_info - hardware information of AES - * @cmd: command token, hardware instruction - * @tfm: transform state of cipher algorithm. - * @state: contains keys and initial vectors. - * - */ -struct mtk_sha_info { - __le32 ctrl[2]; - __le32 cmd[3]; - __le32 tfm[2]; - __le32 digest[SHA_MAX_DIGEST_BUF_SIZE]; -}; - -struct mtk_sha_reqctx { - struct mtk_sha_info info; - unsigned long flags; - unsigned long op; - - u64 digcnt; - size_t bufcnt; - dma_addr_t dma_addr; - - __le32 ct_hdr; - u32 ct_size; - dma_addr_t ct_dma; - dma_addr_t tfm_dma; - - /* Walk state */ - struct scatterlist *sg; - u32 offset; /* Offset in current sg */ - u32 total; /* Total request */ - size_t ds; - size_t bs; - - u8 *buffer; -}; - -struct mtk_sha_hmac_ctx { - struct crypto_shash *shash; - u8 ipad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32)); - u8 opad[SHA512_BLOCK_SIZE] __aligned(sizeof(u32)); -}; - -struct mtk_sha_ctx { - struct mtk_cryp *cryp; - unsigned long flags; - u8 id; - u8 buf[SHA_BUF_SIZE] __aligned(sizeof(u32)); - - struct mtk_sha_hmac_ctx base[0]; -}; - -struct mtk_sha_drv { - struct list_head dev_list; - /* Device list lock */ - spinlock_t lock; -}; - -static struct mtk_sha_drv mtk_sha = { - .dev_list = LIST_HEAD_INIT(mtk_sha.dev_list), - .lock = __SPIN_LOCK_UNLOCKED(mtk_sha.lock), -}; - -static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id, - struct ahash_request *req); - -static inline u32 mtk_sha_read(struct mtk_cryp *cryp, u32 offset) -{ - return readl_relaxed(cryp->base + offset); -} - -static inline void mtk_sha_write(struct mtk_cryp *cryp, - u32 offset, u32 value) -{ - writel_relaxed(value, cryp->base + offset); -} - -static inline void mtk_sha_ring_shift(struct mtk_ring *ring, - struct mtk_desc **cmd_curr, - struct mtk_desc **res_curr, - int *count) -{ - *cmd_curr = ring->cmd_next++; - *res_curr = ring->res_next++; - (*count)++; - - if (ring->cmd_next == ring->cmd_base + MTK_DESC_NUM) { - ring->cmd_next = ring->cmd_base; - ring->res_next = ring->res_base; - } -} - -static struct mtk_cryp *mtk_sha_find_dev(struct mtk_sha_ctx *tctx) -{ - struct mtk_cryp *cryp = NULL; - struct mtk_cryp *tmp; - - spin_lock_bh(&mtk_sha.lock); - if (!tctx->cryp) { - list_for_each_entry(tmp, &mtk_sha.dev_list, sha_list) { - cryp = tmp; - break; - } - tctx->cryp = cryp; - } else { - cryp = tctx->cryp; - } - - /* - * Assign record id to tfm in round-robin fashion, and this - * will help tfm to bind to corresponding descriptor rings. - */ - tctx->id = cryp->rec; - cryp->rec = !cryp->rec; - - spin_unlock_bh(&mtk_sha.lock); - - return cryp; -} - -static int mtk_sha_append_sg(struct mtk_sha_reqctx *ctx) -{ - size_t count; - - while ((ctx->bufcnt < SHA_BUF_SIZE) && ctx->total) { - count = min(ctx->sg->length - ctx->offset, ctx->total); - count = min(count, SHA_BUF_SIZE - ctx->bufcnt); - - if (count <= 0) { - /* - * Check if count <= 0 because the buffer is full or - * because the sg length is 0. In the latest case, - * check if there is another sg in the list, a 0 length - * sg doesn't necessarily mean the end of the sg list. - */ - if ((ctx->sg->length == 0) && !sg_is_last(ctx->sg)) { - ctx->sg = sg_next(ctx->sg); - continue; - } else { - break; - } - } - - scatterwalk_map_and_copy(ctx->buffer + ctx->bufcnt, ctx->sg, - ctx->offset, count, 0); - - ctx->bufcnt += count; - ctx->offset += count; - ctx->total -= count; - - if (ctx->offset == ctx->sg->length) { - ctx->sg = sg_next(ctx->sg); - if (ctx->sg) - ctx->offset = 0; - else - ctx->total = 0; - } - } - - return 0; -} - -/* - * The purpose of this padding is to ensure that the padded message is a - * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512). - * The bit "1" is appended at the end of the message followed by - * "padlen-1" zero bits. Then a 64 bits block (SHA1/SHA224/SHA256) or - * 128 bits block (SHA384/SHA512) equals to the message length in bits - * is appended. - * - * For SHA1/SHA224/SHA256, padlen is calculated as followed: - * - if message length < 56 bytes then padlen = 56 - message length - * - else padlen = 64 + 56 - message length - * - * For SHA384/SHA512, padlen is calculated as followed: - * - if message length < 112 bytes then padlen = 112 - message length - * - else padlen = 128 + 112 - message length - */ -static void mtk_sha_fill_padding(struct mtk_sha_reqctx *ctx, u32 len) -{ - u32 index, padlen; - u64 bits[2]; - u64 size = ctx->digcnt; - - size += ctx->bufcnt; - size += len; - - bits[1] = cpu_to_be64(size << 3); - bits[0] = cpu_to_be64(size >> 61); - - switch (ctx->flags & SHA_FLAGS_ALGO_MSK) { - case SHA_FLAGS_SHA384: - case SHA_FLAGS_SHA512: - index = ctx->bufcnt & 0x7f; - padlen = (index < 112) ? (112 - index) : ((128 + 112) - index); - *(ctx->buffer + ctx->bufcnt) = 0x80; - memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1); - memcpy(ctx->buffer + ctx->bufcnt + padlen, bits, 16); - ctx->bufcnt += padlen + 16; - ctx->flags |= SHA_FLAGS_PAD; - break; - - default: - index = ctx->bufcnt & 0x3f; - padlen = (index < 56) ? (56 - index) : ((64 + 56) - index); - *(ctx->buffer + ctx->bufcnt) = 0x80; - memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen - 1); - memcpy(ctx->buffer + ctx->bufcnt + padlen, &bits[1], 8); - ctx->bufcnt += padlen + 8; - ctx->flags |= SHA_FLAGS_PAD; - break; - } -} - -/* Initialize basic transform information of SHA */ -static void mtk_sha_info_init(struct mtk_sha_reqctx *ctx) -{ - struct mtk_sha_info *info = &ctx->info; - - ctx->ct_hdr = SHA_CT_CTRL_HDR; - ctx->ct_size = SHA_CT_SIZE; - - info->tfm[0] = SHA_TFM_HASH | SHA_TFM_SIZE(SIZE_IN_WORDS(ctx->ds)); - - switch (ctx->flags & SHA_FLAGS_ALGO_MSK) { - case SHA_FLAGS_SHA1: - info->tfm[0] |= SHA_TFM_SHA1; - break; - case SHA_FLAGS_SHA224: - info->tfm[0] |= SHA_TFM_SHA224; - break; - case SHA_FLAGS_SHA256: - info->tfm[0] |= SHA_TFM_SHA256; - break; - case SHA_FLAGS_SHA384: - info->tfm[0] |= SHA_TFM_SHA384; - break; - case SHA_FLAGS_SHA512: - info->tfm[0] |= SHA_TFM_SHA512; - break; - - default: - /* Should not happen... */ - return; - } - - info->tfm[1] = SHA_TFM_HASH_STORE; - info->ctrl[0] = info->tfm[0] | SHA_TFM_CONTINUE | SHA_TFM_START; - info->ctrl[1] = info->tfm[1]; - - info->cmd[0] = SHA_CMD0; - info->cmd[1] = SHA_CMD1; - info->cmd[2] = SHA_CMD2 | SHA_TFM_DIGEST(SIZE_IN_WORDS(ctx->ds)); -} - -/* - * Update input data length field of transform information and - * map it to DMA region. - */ -static int mtk_sha_info_update(struct mtk_cryp *cryp, - struct mtk_sha_rec *sha, - size_t len1, size_t len2) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); - struct mtk_sha_info *info = &ctx->info; - - ctx->ct_hdr &= ~SHA_DATA_LEN_MSK; - ctx->ct_hdr |= cpu_to_le32(len1 + len2); - info->cmd[0] &= ~SHA_DATA_LEN_MSK; - info->cmd[0] |= cpu_to_le32(len1 + len2); - - /* Setting SHA_TFM_START only for the first iteration */ - if (ctx->digcnt) - info->ctrl[0] &= ~SHA_TFM_START; - - ctx->digcnt += len1; - - ctx->ct_dma = dma_map_single(cryp->dev, info, sizeof(*info), - DMA_BIDIRECTIONAL); - if (unlikely(dma_mapping_error(cryp->dev, ctx->ct_dma))) { - dev_err(cryp->dev, "dma %zu bytes error\n", sizeof(*info)); - return -EINVAL; - } - - ctx->tfm_dma = ctx->ct_dma + sizeof(info->ctrl) + sizeof(info->cmd); - - return 0; -} - -/* - * Because of hardware limitation, we must pre-calculate the inner - * and outer digest that need to be processed firstly by engine, then - * apply the result digest to the input message. These complex hashing - * procedures limits HMAC performance, so we use fallback SW encoding. - */ -static int mtk_sha_finish_hmac(struct ahash_request *req) -{ - struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm); - struct mtk_sha_hmac_ctx *bctx = tctx->base; - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - - SHASH_DESC_ON_STACK(shash, bctx->shash); - - shash->tfm = bctx->shash; - shash->flags = 0; /* not CRYPTO_TFM_REQ_MAY_SLEEP */ - - return crypto_shash_init(shash) ?: - crypto_shash_update(shash, bctx->opad, ctx->bs) ?: - crypto_shash_finup(shash, req->result, ctx->ds, req->result); -} - -/* Initialize request context */ -static int mtk_sha_init(struct ahash_request *req) -{ - struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); - struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm); - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - - ctx->flags = 0; - ctx->ds = crypto_ahash_digestsize(tfm); - - switch (ctx->ds) { - case SHA1_DIGEST_SIZE: - ctx->flags |= SHA_FLAGS_SHA1; - ctx->bs = SHA1_BLOCK_SIZE; - break; - case SHA224_DIGEST_SIZE: - ctx->flags |= SHA_FLAGS_SHA224; - ctx->bs = SHA224_BLOCK_SIZE; - break; - case SHA256_DIGEST_SIZE: - ctx->flags |= SHA_FLAGS_SHA256; - ctx->bs = SHA256_BLOCK_SIZE; - break; - case SHA384_DIGEST_SIZE: - ctx->flags |= SHA_FLAGS_SHA384; - ctx->bs = SHA384_BLOCK_SIZE; - break; - case SHA512_DIGEST_SIZE: - ctx->flags |= SHA_FLAGS_SHA512; - ctx->bs = SHA512_BLOCK_SIZE; - break; - default: - return -EINVAL; - } - - ctx->bufcnt = 0; - ctx->digcnt = 0; - ctx->buffer = tctx->buf; - - if (tctx->flags & SHA_FLAGS_HMAC) { - struct mtk_sha_hmac_ctx *bctx = tctx->base; - - memcpy(ctx->buffer, bctx->ipad, ctx->bs); - ctx->bufcnt = ctx->bs; - ctx->flags |= SHA_FLAGS_HMAC; - } - - return 0; -} - -static int mtk_sha_xmit(struct mtk_cryp *cryp, struct mtk_sha_rec *sha, - dma_addr_t addr1, size_t len1, - dma_addr_t addr2, size_t len2) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); - struct mtk_ring *ring = cryp->ring[sha->id]; - struct mtk_desc *cmd, *res; - int err, count = 0; - - err = mtk_sha_info_update(cryp, sha, len1, len2); - if (err) - return err; - - /* Fill in the command/result descriptors */ - mtk_sha_ring_shift(ring, &cmd, &res, &count); - - res->hdr = MTK_DESC_FIRST | MTK_DESC_BUF_LEN(len1); - cmd->hdr = MTK_DESC_FIRST | MTK_DESC_BUF_LEN(len1) | - MTK_DESC_CT_LEN(ctx->ct_size); - cmd->buf = cpu_to_le32(addr1); - cmd->ct = cpu_to_le32(ctx->ct_dma); - cmd->ct_hdr = ctx->ct_hdr; - cmd->tfm = cpu_to_le32(ctx->tfm_dma); - - if (len2) { - mtk_sha_ring_shift(ring, &cmd, &res, &count); - - res->hdr = MTK_DESC_BUF_LEN(len2); - cmd->hdr = MTK_DESC_BUF_LEN(len2); - cmd->buf = cpu_to_le32(addr2); - } - - cmd->hdr |= MTK_DESC_LAST; - res->hdr |= MTK_DESC_LAST; - - /* - * Make sure that all changes to the DMA ring are done before we - * start engine. - */ - wmb(); - /* Start DMA transfer */ - mtk_sha_write(cryp, RDR_PREP_COUNT(sha->id), MTK_DESC_CNT(count)); - mtk_sha_write(cryp, CDR_PREP_COUNT(sha->id), MTK_DESC_CNT(count)); - - return -EINPROGRESS; -} - -static int mtk_sha_dma_map(struct mtk_cryp *cryp, - struct mtk_sha_rec *sha, - struct mtk_sha_reqctx *ctx, - size_t count) -{ - ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer, - SHA_BUF_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) { - dev_err(cryp->dev, "dma map error\n"); - return -EINVAL; - } - - ctx->flags &= ~SHA_FLAGS_SG; - - return mtk_sha_xmit(cryp, sha, ctx->dma_addr, count, 0, 0); -} - -static int mtk_sha_update_slow(struct mtk_cryp *cryp, - struct mtk_sha_rec *sha) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); - size_t count; - u32 final; - - mtk_sha_append_sg(ctx); - - final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total; - - dev_dbg(cryp->dev, "slow: bufcnt: %zu\n", ctx->bufcnt); - - if (final) { - sha->flags |= SHA_FLAGS_FINAL; - mtk_sha_fill_padding(ctx, 0); - } - - if (final || (ctx->bufcnt == SHA_BUF_SIZE && ctx->total)) { - count = ctx->bufcnt; - ctx->bufcnt = 0; - - return mtk_sha_dma_map(cryp, sha, ctx, count); - } - return 0; -} - -static int mtk_sha_update_start(struct mtk_cryp *cryp, - struct mtk_sha_rec *sha) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); - u32 len, final, tail; - struct scatterlist *sg; - - if (!ctx->total) - return 0; - - if (ctx->bufcnt || ctx->offset) - return mtk_sha_update_slow(cryp, sha); - - sg = ctx->sg; - - if (!IS_ALIGNED(sg->offset, sizeof(u32))) - return mtk_sha_update_slow(cryp, sha); - - if (!sg_is_last(sg) && !IS_ALIGNED(sg->length, ctx->bs)) - /* size is not ctx->bs aligned */ - return mtk_sha_update_slow(cryp, sha); - - len = min(ctx->total, sg->length); - - if (sg_is_last(sg)) { - if (!(ctx->flags & SHA_FLAGS_FINUP)) { - /* not last sg must be ctx->bs aligned */ - tail = len & (ctx->bs - 1); - len -= tail; - } - } - - ctx->total -= len; - ctx->offset = len; /* offset where to start slow */ - - final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total; - - /* Add padding */ - if (final) { - size_t count; - - tail = len & (ctx->bs - 1); - len -= tail; - ctx->total += tail; - ctx->offset = len; /* offset where to start slow */ - - sg = ctx->sg; - mtk_sha_append_sg(ctx); - mtk_sha_fill_padding(ctx, len); - - ctx->dma_addr = dma_map_single(cryp->dev, ctx->buffer, - SHA_BUF_SIZE, DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(cryp->dev, ctx->dma_addr))) { - dev_err(cryp->dev, "dma map bytes error\n"); - return -EINVAL; - } - - sha->flags |= SHA_FLAGS_FINAL; - count = ctx->bufcnt; - ctx->bufcnt = 0; - - if (len == 0) { - ctx->flags &= ~SHA_FLAGS_SG; - return mtk_sha_xmit(cryp, sha, ctx->dma_addr, - count, 0, 0); - - } else { - ctx->sg = sg; - if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) { - dev_err(cryp->dev, "dma_map_sg error\n"); - return -EINVAL; - } - - ctx->flags |= SHA_FLAGS_SG; - return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg), - len, ctx->dma_addr, count); - } - } - - if (!dma_map_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE)) { - dev_err(cryp->dev, "dma_map_sg error\n"); - return -EINVAL; - } - - ctx->flags |= SHA_FLAGS_SG; - - return mtk_sha_xmit(cryp, sha, sg_dma_address(ctx->sg), - len, 0, 0); -} - -static int mtk_sha_final_req(struct mtk_cryp *cryp, - struct mtk_sha_rec *sha) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); - size_t count; - - mtk_sha_fill_padding(ctx, 0); - - sha->flags |= SHA_FLAGS_FINAL; - count = ctx->bufcnt; - ctx->bufcnt = 0; - - return mtk_sha_dma_map(cryp, sha, ctx, count); -} - -/* Copy ready hash (+ finalize hmac) */ -static int mtk_sha_finish(struct ahash_request *req) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - __le32 *digest = ctx->info.digest; - u32 *result = (u32 *)req->result; - int i; - - /* Get the hash from the digest buffer */ - for (i = 0; i < SIZE_IN_WORDS(ctx->ds); i++) - result[i] = le32_to_cpu(digest[i]); - - if (ctx->flags & SHA_FLAGS_HMAC) - return mtk_sha_finish_hmac(req); - - return 0; -} - -static void mtk_sha_finish_req(struct mtk_cryp *cryp, - struct mtk_sha_rec *sha, - int err) -{ - if (likely(!err && (SHA_FLAGS_FINAL & sha->flags))) - err = mtk_sha_finish(sha->req); - - sha->flags &= ~(SHA_FLAGS_BUSY | SHA_FLAGS_FINAL); - - sha->req->base.complete(&sha->req->base, err); - - /* Handle new request */ - tasklet_schedule(&sha->queue_task); -} - -static int mtk_sha_handle_queue(struct mtk_cryp *cryp, u8 id, - struct ahash_request *req) -{ - struct mtk_sha_rec *sha = cryp->sha[id]; - struct crypto_async_request *async_req, *backlog; - struct mtk_sha_reqctx *ctx; - unsigned long flags; - int err = 0, ret = 0; - - spin_lock_irqsave(&sha->lock, flags); - if (req) - ret = ahash_enqueue_request(&sha->queue, req); - - if (SHA_FLAGS_BUSY & sha->flags) { - spin_unlock_irqrestore(&sha->lock, flags); - return ret; - } - - backlog = crypto_get_backlog(&sha->queue); - async_req = crypto_dequeue_request(&sha->queue); - if (async_req) - sha->flags |= SHA_FLAGS_BUSY; - spin_unlock_irqrestore(&sha->lock, flags); - - if (!async_req) - return ret; - - if (backlog) - backlog->complete(backlog, -EINPROGRESS); - - req = ahash_request_cast(async_req); - ctx = ahash_request_ctx(req); - - sha->req = req; - - mtk_sha_info_init(ctx); - - if (ctx->op == SHA_OP_UPDATE) { - err = mtk_sha_update_start(cryp, sha); - if (err != -EINPROGRESS && (ctx->flags & SHA_FLAGS_FINUP)) - /* No final() after finup() */ - err = mtk_sha_final_req(cryp, sha); - } else if (ctx->op == SHA_OP_FINAL) { - err = mtk_sha_final_req(cryp, sha); - } - - if (unlikely(err != -EINPROGRESS)) - /* Task will not finish it, so do it here */ - mtk_sha_finish_req(cryp, sha, err); - - return ret; -} - -static int mtk_sha_enqueue(struct ahash_request *req, u32 op) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - struct mtk_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm); - - ctx->op = op; - - return mtk_sha_handle_queue(tctx->cryp, tctx->id, req); -} - -static void mtk_sha_unmap(struct mtk_cryp *cryp, struct mtk_sha_rec *sha) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(sha->req); - - dma_unmap_single(cryp->dev, ctx->ct_dma, sizeof(ctx->info), - DMA_BIDIRECTIONAL); - - if (ctx->flags & SHA_FLAGS_SG) { - dma_unmap_sg(cryp->dev, ctx->sg, 1, DMA_TO_DEVICE); - if (ctx->sg->length == ctx->offset) { - ctx->sg = sg_next(ctx->sg); - if (ctx->sg) - ctx->offset = 0; - } - if (ctx->flags & SHA_FLAGS_PAD) { - dma_unmap_single(cryp->dev, ctx->dma_addr, - SHA_BUF_SIZE, DMA_TO_DEVICE); - } - } else - dma_unmap_single(cryp->dev, ctx->dma_addr, - SHA_BUF_SIZE, DMA_TO_DEVICE); -} - -static void mtk_sha_complete(struct mtk_cryp *cryp, - struct mtk_sha_rec *sha) -{ - int err = 0; - - err = mtk_sha_update_start(cryp, sha); - if (err != -EINPROGRESS) - mtk_sha_finish_req(cryp, sha, err); -} - -static int mtk_sha_update(struct ahash_request *req) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - - ctx->total = req->nbytes; - ctx->sg = req->src; - ctx->offset = 0; - - if ((ctx->bufcnt + ctx->total < SHA_BUF_SIZE) && - !(ctx->flags & SHA_FLAGS_FINUP)) - return mtk_sha_append_sg(ctx); - - return mtk_sha_enqueue(req, SHA_OP_UPDATE); -} - -static int mtk_sha_final(struct ahash_request *req) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - - ctx->flags |= SHA_FLAGS_FINUP; - - if (ctx->flags & SHA_FLAGS_PAD) - return mtk_sha_finish(req); - - return mtk_sha_enqueue(req, SHA_OP_FINAL); -} - -static int mtk_sha_finup(struct ahash_request *req) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - int err1, err2; - - ctx->flags |= SHA_FLAGS_FINUP; - - err1 = mtk_sha_update(req); - if (err1 == -EINPROGRESS || err1 == -EBUSY) - return err1; - /* - * final() has to be always called to cleanup resources - * even if update() failed - */ - err2 = mtk_sha_final(req); - - return err1 ?: err2; -} - -static int mtk_sha_digest(struct ahash_request *req) -{ - return mtk_sha_init(req) ?: mtk_sha_finup(req); -} - -static int mtk_sha_setkey(struct crypto_ahash *tfm, const u8 *key, - u32 keylen) -{ - struct mtk_sha_ctx *tctx = crypto_ahash_ctx(tfm); - struct mtk_sha_hmac_ctx *bctx = tctx->base; - size_t bs = crypto_shash_blocksize(bctx->shash); - size_t ds = crypto_shash_digestsize(bctx->shash); - int err, i; - - SHASH_DESC_ON_STACK(shash, bctx->shash); - - shash->tfm = bctx->shash; - shash->flags = crypto_shash_get_flags(bctx->shash) & - CRYPTO_TFM_REQ_MAY_SLEEP; - - if (keylen > bs) { - err = crypto_shash_digest(shash, key, keylen, bctx->ipad); - if (err) - return err; - keylen = ds; - } else { - memcpy(bctx->ipad, key, keylen); - } - - memset(bctx->ipad + keylen, 0, bs - keylen); - memcpy(bctx->opad, bctx->ipad, bs); - - for (i = 0; i < bs; i++) { - bctx->ipad[i] ^= 0x36; - bctx->opad[i] ^= 0x5c; - } - - return 0; -} - -static int mtk_sha_export(struct ahash_request *req, void *out) -{ - const struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - - memcpy(out, ctx, sizeof(*ctx)); - return 0; -} - -static int mtk_sha_import(struct ahash_request *req, const void *in) -{ - struct mtk_sha_reqctx *ctx = ahash_request_ctx(req); - - memcpy(ctx, in, sizeof(*ctx)); - return 0; -} - -static int mtk_sha_cra_init_alg(struct crypto_tfm *tfm, - const char *alg_base) -{ - struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm); - struct mtk_cryp *cryp = NULL; - - cryp = mtk_sha_find_dev(tctx); - if (!cryp) - return -ENODEV; - - crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), - sizeof(struct mtk_sha_reqctx)); - - if (alg_base) { - struct mtk_sha_hmac_ctx *bctx = tctx->base; - - tctx->flags |= SHA_FLAGS_HMAC; - bctx->shash = crypto_alloc_shash(alg_base, 0, - CRYPTO_ALG_NEED_FALLBACK); - if (IS_ERR(bctx->shash)) { - pr_err("base driver %s could not be loaded.\n", - alg_base); - - return PTR_ERR(bctx->shash); - } - } - return 0; -} - -static int mtk_sha_cra_init(struct crypto_tfm *tfm) -{ - return mtk_sha_cra_init_alg(tfm, NULL); -} - -static int mtk_sha_cra_sha1_init(struct crypto_tfm *tfm) -{ - return mtk_sha_cra_init_alg(tfm, "sha1"); -} - -static int mtk_sha_cra_sha224_init(struct crypto_tfm *tfm) -{ - return mtk_sha_cra_init_alg(tfm, "sha224"); -} - -static int mtk_sha_cra_sha256_init(struct crypto_tfm *tfm) -{ - return mtk_sha_cra_init_alg(tfm, "sha256"); -} - -static int mtk_sha_cra_sha384_init(struct crypto_tfm *tfm) -{ - return mtk_sha_cra_init_alg(tfm, "sha384"); -} - -static int mtk_sha_cra_sha512_init(struct crypto_tfm *tfm) -{ - return mtk_sha_cra_init_alg(tfm, "sha512"); -} - -static void mtk_sha_cra_exit(struct crypto_tfm *tfm) -{ - struct mtk_sha_ctx *tctx = crypto_tfm_ctx(tfm); - - if (tctx->flags & SHA_FLAGS_HMAC) { - struct mtk_sha_hmac_ctx *bctx = tctx->base; - - crypto_free_shash(bctx->shash); - } -} - -static struct ahash_alg algs_sha1_sha224_sha256[] = { -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .halg.digestsize = SHA1_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "sha1", - .cra_driver_name = "mtk-sha1", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC, - .cra_blocksize = SHA1_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .halg.digestsize = SHA224_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "sha224", - .cra_driver_name = "mtk-sha224", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC, - .cra_blocksize = SHA224_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .halg.digestsize = SHA256_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "sha256", - .cra_driver_name = "mtk-sha256", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC, - .cra_blocksize = SHA256_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .setkey = mtk_sha_setkey, - .halg.digestsize = SHA1_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "hmac(sha1)", - .cra_driver_name = "mtk-hmac-sha1", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .cra_blocksize = SHA1_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx) + - sizeof(struct mtk_sha_hmac_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_sha1_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .setkey = mtk_sha_setkey, - .halg.digestsize = SHA224_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "hmac(sha224)", - .cra_driver_name = "mtk-hmac-sha224", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .cra_blocksize = SHA224_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx) + - sizeof(struct mtk_sha_hmac_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_sha224_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .setkey = mtk_sha_setkey, - .halg.digestsize = SHA256_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "hmac(sha256)", - .cra_driver_name = "mtk-hmac-sha256", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .cra_blocksize = SHA256_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx) + - sizeof(struct mtk_sha_hmac_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_sha256_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -}; - -static struct ahash_alg algs_sha384_sha512[] = { -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .halg.digestsize = SHA384_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "sha384", - .cra_driver_name = "mtk-sha384", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC, - .cra_blocksize = SHA384_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .halg.digestsize = SHA512_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "sha512", - .cra_driver_name = "mtk-sha512", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC, - .cra_blocksize = SHA512_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .setkey = mtk_sha_setkey, - .halg.digestsize = SHA384_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "hmac(sha384)", - .cra_driver_name = "mtk-hmac-sha384", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .cra_blocksize = SHA384_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx) + - sizeof(struct mtk_sha_hmac_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_sha384_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -{ - .init = mtk_sha_init, - .update = mtk_sha_update, - .final = mtk_sha_final, - .finup = mtk_sha_finup, - .digest = mtk_sha_digest, - .export = mtk_sha_export, - .import = mtk_sha_import, - .setkey = mtk_sha_setkey, - .halg.digestsize = SHA512_DIGEST_SIZE, - .halg.statesize = sizeof(struct mtk_sha_reqctx), - .halg.base = { - .cra_name = "hmac(sha512)", - .cra_driver_name = "mtk-hmac-sha512", - .cra_priority = 400, - .cra_flags = CRYPTO_ALG_ASYNC | - CRYPTO_ALG_NEED_FALLBACK, - .cra_blocksize = SHA512_BLOCK_SIZE, - .cra_ctxsize = sizeof(struct mtk_sha_ctx) + - sizeof(struct mtk_sha_hmac_ctx), - .cra_alignmask = SHA_ALIGN_MSK, - .cra_module = THIS_MODULE, - .cra_init = mtk_sha_cra_sha512_init, - .cra_exit = mtk_sha_cra_exit, - } -}, -}; - -static void mtk_sha_queue_task(unsigned long data) -{ - struct mtk_sha_rec *sha = (struct mtk_sha_rec *)data; - - mtk_sha_handle_queue(sha->cryp, sha->id - MTK_RING2, NULL); -} - -static void mtk_sha_done_task(unsigned long data) -{ - struct mtk_sha_rec *sha = (struct mtk_sha_rec *)data; - struct mtk_cryp *cryp = sha->cryp; - - mtk_sha_unmap(cryp, sha); - mtk_sha_complete(cryp, sha); -} - -static irqreturn_t mtk_sha_irq(int irq, void *dev_id) -{ - struct mtk_sha_rec *sha = (struct mtk_sha_rec *)dev_id; - struct mtk_cryp *cryp = sha->cryp; - u32 val = mtk_sha_read(cryp, RDR_STAT(sha->id)); - - mtk_sha_write(cryp, RDR_STAT(sha->id), val); - - if (likely((SHA_FLAGS_BUSY & sha->flags))) { - mtk_sha_write(cryp, RDR_PROC_COUNT(sha->id), MTK_CNT_RST); - mtk_sha_write(cryp, RDR_THRESH(sha->id), - MTK_RDR_PROC_THRESH | MTK_RDR_PROC_MODE); - - tasklet_schedule(&sha->done_task); - } else { - dev_warn(cryp->dev, "SHA interrupt when no active requests.\n"); - } - return IRQ_HANDLED; -} - -/* - * The purpose of two SHA records is used to get extra performance. - * It is similar to mtk_aes_record_init(). - */ -static int mtk_sha_record_init(struct mtk_cryp *cryp) -{ - struct mtk_sha_rec **sha = cryp->sha; - int i, err = -ENOMEM; - - for (i = 0; i < MTK_REC_NUM; i++) { - sha[i] = kzalloc(sizeof(**sha), GFP_KERNEL); - if (!sha[i]) - goto err_cleanup; - - sha[i]->cryp = cryp; - - spin_lock_init(&sha[i]->lock); - crypto_init_queue(&sha[i]->queue, SHA_QUEUE_SIZE); - - tasklet_init(&sha[i]->queue_task, mtk_sha_queue_task, - (unsigned long)sha[i]); - tasklet_init(&sha[i]->done_task, mtk_sha_done_task, - (unsigned long)sha[i]); - } - - /* Link to ring2 and ring3 respectively */ - sha[0]->id = MTK_RING2; - sha[1]->id = MTK_RING3; - - cryp->rec = 1; - - return 0; - -err_cleanup: - for (; i--; ) - kfree(sha[i]); - return err; -} - -static void mtk_sha_record_free(struct mtk_cryp *cryp) -{ - int i; - - for (i = 0; i < MTK_REC_NUM; i++) { - tasklet_kill(&cryp->sha[i]->done_task); - tasklet_kill(&cryp->sha[i]->queue_task); - - kfree(cryp->sha[i]); - } -} - -static void mtk_sha_unregister_algs(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++) - crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]); - - for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++) - crypto_unregister_ahash(&algs_sha384_sha512[i]); -} - -static int mtk_sha_register_algs(void) -{ - int err, i; - - for (i = 0; i < ARRAY_SIZE(algs_sha1_sha224_sha256); i++) { - err = crypto_register_ahash(&algs_sha1_sha224_sha256[i]); - if (err) - goto err_sha_224_256_algs; - } - - for (i = 0; i < ARRAY_SIZE(algs_sha384_sha512); i++) { - err = crypto_register_ahash(&algs_sha384_sha512[i]); - if (err) - goto err_sha_384_512_algs; - } - - return 0; - -err_sha_384_512_algs: - for (; i--; ) - crypto_unregister_ahash(&algs_sha384_sha512[i]); - i = ARRAY_SIZE(algs_sha1_sha224_sha256); -err_sha_224_256_algs: - for (; i--; ) - crypto_unregister_ahash(&algs_sha1_sha224_sha256[i]); - - return err; -} - -int mtk_hash_alg_register(struct mtk_cryp *cryp) -{ - int err; - - INIT_LIST_HEAD(&cryp->sha_list); - - /* Initialize two hash records */ - err = mtk_sha_record_init(cryp); - if (err) - goto err_record; - - err = devm_request_irq(cryp->dev, cryp->irq[MTK_RING2], mtk_sha_irq, - 0, "mtk-sha", cryp->sha[0]); - if (err) { - dev_err(cryp->dev, "unable to request sha irq0.\n"); - goto err_res; - } - - err = devm_request_irq(cryp->dev, cryp->irq[MTK_RING3], mtk_sha_irq, - 0, "mtk-sha", cryp->sha[1]); - if (err) { - dev_err(cryp->dev, "unable to request sha irq1.\n"); - goto err_res; - } - - /* Enable ring2 and ring3 interrupt for hash */ - mtk_sha_write(cryp, AIC_ENABLE_SET(MTK_RING2), MTK_IRQ_RDR2); - mtk_sha_write(cryp, AIC_ENABLE_SET(MTK_RING3), MTK_IRQ_RDR3); - - spin_lock(&mtk_sha.lock); - list_add_tail(&cryp->sha_list, &mtk_sha.dev_list); - spin_unlock(&mtk_sha.lock); - - err = mtk_sha_register_algs(); - if (err) - goto err_algs; - - return 0; - -err_algs: - spin_lock(&mtk_sha.lock); - list_del(&cryp->sha_list); - spin_unlock(&mtk_sha.lock); -err_res: - mtk_sha_record_free(cryp); -err_record: - - dev_err(cryp->dev, "mtk-sha initialization failed.\n"); - return err; -} - -void mtk_hash_alg_release(struct mtk_cryp *cryp) -{ - spin_lock(&mtk_sha.lock); - list_del(&cryp->sha_list); - spin_unlock(&mtk_sha.lock); - - mtk_sha_unregister_algs(); - mtk_sha_record_free(cryp); -} diff --git a/target/linux/mediatek/image/32.mk b/target/linux/mediatek/image/32.mk index ea1474dc8..7b7e30312 100644 --- a/target/linux/mediatek/image/32.mk +++ b/target/linux/mediatek/image/32.mk @@ -21,25 +21,12 @@ endif endef COMPAT_BPI-R2:=bananapi,bpi-r2 -COMPAT_EMMC:=mediatek,mt7623-rfb-emmc -COMPAT_NAND:=mediatek,mt7623-rfb-nand -COMPAT_NAND_EPHY:=mediatek,mt7623-rfb-nand-ephy +COMPAT_EMMC:=mediatek,mt7623a-rfb-emmc define Image/Build/squashfs $(call prepare_generic_squashfs,$(KDIR)/root.squashfs) $(CP) $(KDIR)/root.squashfs $(BIN_DIR)/$(IMG_PREFIX)-root.squashfs - $(call Image/Build/SysupgradeCombined,mt7623n-bananapi-bpi-r2,squashfs,$$(COMPAT_EMMC)) - $(call Image/Build/SysupgradeCombined,mt7623-eMMC,squashfs,$$(COMPAT_BPI-R2)) - - $(call Image/BuilduImage,mt7623-NAND) - $(call Image/BuilduImage,mt7623-NAND-ePHY) -ifneq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),) - $(call Image/BuilduImage,mt7623-NAND,-initramfs) - $(call Image/BuilduImage,mt7623-NAND-ePHY,-initramfs) - $(CP) $(KDIR)/uImage-mt7623-NAND-initramfs $(BIN_DIR)/$(IMG_PREFIX)-uImage-NAND-initramfs - $(CP) $(KDIR)/uImage-mt7623-NAND-ePHY-initramfs $(BIN_DIR)/$(IMG_PREFIX)-uImage-NAND-ePHY-initramfs -endif - $(call Image/Build/SysupgradeNAND,mt7623-NAND,$(1),$(KDIR)/uImage-mt7623-NAND,$$(COMPAT_NAND)) - $(call Image/Build/SysupgradeNAND,mt7623-NAND-ePHY,$(1),$(KDIR)/uImage-mt7623-NAND-ePHY,$$(COMPAT_NAND_EPHY)) + $(call Image/Build/SysupgradeCombined,mt7623n-bananapi-bpi-r2,squashfs,$$(COMPAT_BPI-R2)) + $(call Image/Build/SysupgradeCombined,mt7623a-rfb-emmc,squashfs,$$(COMPAT_EMMC)) endef diff --git a/target/linux/mediatek/modules.mk b/target/linux/mediatek/modules.mk deleted file mode 100644 index 52867ae6c..000000000 --- a/target/linux/mediatek/modules.mk +++ /dev/null @@ -1,14 +0,0 @@ -define KernelPackage/mediatek_hnat - SUBMENU:=Network Devices - TITLE:=MT7623 HNAT - DEPENDS:=@TARGET_mediatek +kmod-nf-conntrack - KCONFIG:= CONFIG_NET_MEDIATEK_HNAT=y - FILES:= \ - $(LINUX_DIR)/drivers/net/ethernet/mediatek/mtk_hnat/mtkhnat.ko -endef - -define KernelPackage/mediatek_hnat/description - Kernel modules for MediaTek HW NAT offloading -endef - -$(eval $(call KernelPackage,mediatek_hnat)) diff --git a/target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch b/target/linux/mediatek/patches-4.14/0006-reset-mediatek-mt2701-reset-driver.patch similarity index 66% rename from target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch rename to target/linux/mediatek/patches-4.14/0006-reset-mediatek-mt2701-reset-driver.patch index 12bda9c6b..a0fdc14f7 100644 --- a/target/linux/mediatek/patches-4.9/0006-reset-mediatek-mt2701-reset-driver.patch +++ b/target/linux/mediatek/patches-4.14/0006-reset-mediatek-mt2701-reset-driver.patch @@ -16,21 +16,12 @@ Acked-by: Philipp Zabel --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(str +@@ -771,6 +771,8 @@ static void mtk_infrasys_init_early(stru if (r) pr_err("%s(): could not register clock provider: %d\n", __func__, r); + + mtk_register_reset_controller(node, 2, 0x30); } - CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init); - -@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(stru - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); -+ -+ mtk_register_reset_controller(node, 2, 0x0); - } - CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init); - + CLK_OF_DECLARE_DRIVER(mtk_infra, "mediatek,mt2701-infracfg", + mtk_infrasys_init_early); diff --git a/target/linux/mediatek/patches-4.9/0012-clk-dont-disable-unused-clocks.patch b/target/linux/mediatek/patches-4.14/0012-clk-dont-disable-unused-clocks.patch similarity index 100% rename from target/linux/mediatek/patches-4.9/0012-clk-dont-disable-unused-clocks.patch rename to target/linux/mediatek/patches-4.14/0012-clk-dont-disable-unused-clocks.patch diff --git a/target/linux/mediatek/patches-4.9/0027-net-next-mediatek-fix-DQL-support.patch b/target/linux/mediatek/patches-4.14/0027-net-next-mediatek-fix-DQL-support.patch similarity index 88% rename from target/linux/mediatek/patches-4.9/0027-net-next-mediatek-fix-DQL-support.patch rename to target/linux/mediatek/patches-4.14/0027-net-next-mediatek-fix-DQL-support.patch index d21c8eedb..3ea2f456a 100644 --- a/target/linux/mediatek/patches-4.9/0027-net-next-mediatek-fix-DQL-support.patch +++ b/target/linux/mediatek/patches-4.14/0027-net-next-mediatek-fix-DQL-support.patch @@ -18,7 +18,7 @@ Signed-off-by: John Crispin --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -710,7 +710,16 @@ static int mtk_tx_map(struct sk_buff *sk +@@ -779,7 +779,16 @@ static int mtk_tx_map(struct sk_buff *sk WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) | (!nr_frags * TX_DMA_LS0))); @@ -36,7 +36,7 @@ Signed-off-by: John Crispin skb_tx_timestamp(skb); ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); -@@ -1002,21 +1011,18 @@ static int mtk_poll_tx(struct mtk_eth *e +@@ -1076,20 +1085,17 @@ static int mtk_poll_tx(struct mtk_eth *e struct mtk_tx_dma *desc; struct sk_buff *skb; struct mtk_tx_buf *tx_buf; @@ -45,7 +45,6 @@ Signed-off-by: John Crispin + int total = 0, done = 0; + unsigned int bytes = 0; u32 cpu, dma; - static int condition; - int total = 0, i; - - memset(done, 0, sizeof(done)); @@ -58,12 +57,12 @@ Signed-off-by: John Crispin desc = mtk_qdma_phys_to_virt(ring, cpu); - while ((cpu != dma) && budget) { -+ while ((cpu != dma) && done < budget) { ++ while ((cpu != dma) && (done < budget)) { u32 next_cpu = desc->txd2; int mac = 0; -@@ -1035,9 +1041,8 @@ static int mtk_poll_tx(struct mtk_eth *e - } +@@ -1106,9 +1112,8 @@ static int mtk_poll_tx(struct mtk_eth *e + break; if (skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC) { - bytes[mac] += skb->len; @@ -74,7 +73,7 @@ Signed-off-by: John Crispin } mtk_tx_unmap(eth, tx_buf); -@@ -1049,11 +1054,13 @@ static int mtk_poll_tx(struct mtk_eth *e +@@ -1120,11 +1125,13 @@ static int mtk_poll_tx(struct mtk_eth *e mtk_w32(eth, cpu, MTK_QTX_CRX_PTR); diff --git a/target/linux/mediatek/patches-4.9/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch b/target/linux/mediatek/patches-4.14/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch similarity index 65% rename from target/linux/mediatek/patches-4.9/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch rename to target/linux/mediatek/patches-4.14/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch index 6c96b067d..c01703d07 100644 --- a/target/linux/mediatek/patches-4.9/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch +++ b/target/linux/mediatek/patches-4.14/0032-net-dsa-mediatek-add-support-for-GMAC2-wired-to-ext-.patch @@ -12,7 +12,7 @@ Signed-off-by: John Crispin --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -629,6 +629,11 @@ mt7530_setup(struct dsa_switch *ds) +@@ -991,6 +991,11 @@ mt7530_setup(struct dsa_switch *ds) val = mt7530_read(priv, MT7530_MHWTRAP); val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; val |= MHWTRAP_MANUAL; @@ -24,15 +24,3 @@ Signed-off-by: John Crispin mt7530_write(priv, MT7530_MHWTRAP, val); /* Enable and reset MIB counters */ ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -221,6 +221,9 @@ static void mtk_phy_link_adjust(struct n - netif_carrier_on(dev); - else - netif_carrier_off(dev); -+ -+ if (!of_phy_is_fixed_link(mac->of_node)) -+ phy_print_status(dev->phydev); - } - - static int mtk_phy_connect_node(struct mtk_eth *eth, struct mtk_mac *mac, diff --git a/target/linux/mediatek/patches-4.14/0033-dsa-multi-cpu.patch b/target/linux/mediatek/patches-4.14/0033-dsa-multi-cpu.patch new file mode 100644 index 000000000..5c4edec07 --- /dev/null +++ b/target/linux/mediatek/patches-4.14/0033-dsa-multi-cpu.patch @@ -0,0 +1,268 @@ +--- a/drivers/net/dsa/mt7530.c ++++ b/drivers/net/dsa/mt7530.c +@@ -670,6 +670,9 @@ static int + mt7530_cpu_port_enable(struct mt7530_priv *priv, + int port) + { ++ u8 port_mask = 0; ++ int i; ++ + /* Enable Mediatek header mode on the cpu port */ + mt7530_write(priv, MT7530_PVC_P(port), + PORT_SPEC_TAG); +@@ -686,8 +689,12 @@ mt7530_cpu_port_enable(struct mt7530_pri + /* CPU port gets connected to all user ports of + * the switch + */ ++ for (i = 0; i < MT7530_NUM_PORTS; i++) ++ if ((priv->ds->enabled_port_mask & BIT(i)) && ++ (dsa_port_upstream_port(priv->ds, i) == port)) ++ port_mask |= BIT(i); + mt7530_write(priv, MT7530_PCR_P(port), +- PCR_MATRIX(priv->ds->enabled_port_mask)); ++ PCR_MATRIX(port_mask)); + + return 0; + } +@@ -697,6 +704,7 @@ mt7530_port_enable(struct dsa_switch *ds + struct phy_device *phy) + { + struct mt7530_priv *priv = ds->priv; ++ u8 upstream = dsa_port_upstream_port(ds, port); + + mutex_lock(&priv->reg_mutex); + +@@ -707,7 +715,7 @@ mt7530_port_enable(struct dsa_switch *ds + * restore the port matrix if the port is the member of a certain + * bridge. + */ +- priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT)); ++ priv->ports[port].pm |= PCR_MATRIX(BIT(upstream)); + priv->ports[port].enable = true; + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, + priv->ports[port].pm); +@@ -770,7 +778,8 @@ mt7530_port_bridge_join(struct dsa_switc + struct net_device *bridge) + { + struct mt7530_priv *priv = ds->priv; +- u32 port_bitmap = BIT(MT7530_CPU_PORT); ++ u8 upstream = dsa_port_upstream_port(ds, port); ++ u32 port_bitmap = BIT(upstream); + int i; + + mutex_lock(&priv->reg_mutex); +@@ -808,6 +817,7 @@ mt7530_port_bridge_leave(struct dsa_swit + struct net_device *bridge) + { + struct mt7530_priv *priv = ds->priv; ++ u8 upstream = dsa_port_upstream_port(ds, port); + int i; + + mutex_lock(&priv->reg_mutex); +@@ -832,8 +842,8 @@ mt7530_port_bridge_leave(struct dsa_swit + */ + if (priv->ports[port].enable) + mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, +- PCR_MATRIX(BIT(MT7530_CPU_PORT))); +- priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT)); ++ PCR_MATRIX(BIT(upstream))); ++ priv->ports[port].pm = PCR_MATRIX(BIT(upstream)); + + mutex_unlock(&priv->reg_mutex); + } +@@ -908,15 +918,7 @@ err: + static enum dsa_tag_protocol + mtk_get_tag_protocol(struct dsa_switch *ds) + { +- struct mt7530_priv *priv = ds->priv; +- +- if (!dsa_is_cpu_port(ds, MT7530_CPU_PORT)) { +- dev_warn(priv->dev, +- "port not matched with tagging CPU port\n"); +- return DSA_TAG_PROTO_NONE; +- } else { +- return DSA_TAG_PROTO_MTK; +- } ++ return DSA_TAG_PROTO_MTK; + } + + static int +@@ -989,7 +991,7 @@ mt7530_setup(struct dsa_switch *ds) + + /* Enable Port 6 only; P5 as GMAC5 which currently is not supported */ + val = mt7530_read(priv, MT7530_MHWTRAP); +- val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; ++ val &= ~MHWTRAP_P5_DIS & ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; + val |= MHWTRAP_MANUAL; + if (!dsa_is_cpu_port(ds, 5)) { + val |= MHWTRAP_P5_DIS; +--- a/include/net/dsa.h ++++ b/include/net/dsa.h +@@ -185,6 +185,10 @@ struct dsa_port { + u8 stp_state; + struct net_device *bridge_dev; + struct devlink_port devlink_port; ++ ++ struct net_device *ethernet; ++ int upstream; ++ + /* + * Original copy of the master netdev ethtool_ops + */ +@@ -266,6 +270,11 @@ static inline bool dsa_is_normal_port(st + return !dsa_is_cpu_port(ds, p) && !dsa_is_dsa_port(ds, p); + } + ++static inline bool dsa_is_upstream_port(struct dsa_switch *ds, int p) ++{ ++ return dsa_is_cpu_port(ds, p) || dsa_is_dsa_port(ds, p); ++} ++ + static inline u8 dsa_upstream_port(struct dsa_switch *ds) + { + struct dsa_switch_tree *dst = ds->dst; +@@ -282,6 +291,18 @@ static inline u8 dsa_upstream_port(struc + return ds->rtable[dst->cpu_dp->ds->index]; + } + ++static inline u8 dsa_port_upstream_port(struct dsa_switch *ds, int port) ++{ ++ /* ++ * If this port has a specific upstream cpu port, use it, ++ * otherwise use the switch default. ++ */ ++ if (ds->ports[port].upstream) ++ return ds->ports[port].upstream; ++ else ++ return dsa_upstream_port(ds); ++} ++ + typedef int dsa_fdb_dump_cb_t(const unsigned char *addr, u16 vid, + bool is_static, void *data); + struct dsa_switch_ops { +--- a/net/dsa/dsa2.c ++++ b/net/dsa/dsa2.c +@@ -253,6 +253,8 @@ static int dsa_cpu_port_apply(struct dsa + memset(&port->devlink_port, 0, sizeof(port->devlink_port)); + err = devlink_port_register(ds->devlink, &port->devlink_port, + port->index); ++ if (port->netdev) ++ port->netdev->dsa_ptr = ds->dst; + return err; + } + +@@ -262,6 +264,12 @@ static void dsa_cpu_port_unapply(struct + dsa_cpu_dsa_destroy(port); + port->ds->cpu_port_mask &= ~BIT(port->index); + ++ if (port->netdev) ++ port->netdev->dsa_ptr = NULL; ++ if (port->ethernet) { ++ dev_put(port->ethernet); ++ port->ethernet = NULL; ++ } + } + + static int dsa_user_port_apply(struct dsa_port *port) +@@ -505,10 +513,9 @@ static int dsa_cpu_parse(struct dsa_port + dev_put(ethernet_dev); + } + +- if (!dst->cpu_dp) { ++ if (!dst->cpu_dp) + dst->cpu_dp = port; +- dst->cpu_dp->netdev = ethernet_dev; +- } ++ port->netdev = ethernet_dev; + + /* Initialize cpu_port_mask now for drv->setup() + * to have access to a correct value, just like what +@@ -526,6 +533,29 @@ static int dsa_cpu_parse(struct dsa_port + + dst->rcv = dst->tag_ops->rcv; + ++ dev_hold(ethernet_dev); ++ ds->ports[index].ethernet = ethernet_dev; ++ ds->cpu_port_mask |= BIT(index); ++ ++ return 0; ++} ++ ++static int dsa_user_parse(struct dsa_port *port, u32 index, ++ struct dsa_switch *ds) ++{ ++ struct device_node *cpu_port; ++ const unsigned int *cpu_port_reg; ++ int cpu_port_index; ++ ++ cpu_port = of_parse_phandle(port->dn, "cpu", 0); ++ if (cpu_port) { ++ cpu_port_reg = of_get_property(cpu_port, "reg", NULL); ++ if (!cpu_port_reg) ++ return -EINVAL; ++ cpu_port_index = be32_to_cpup(cpu_port_reg); ++ ds->ports[index].upstream = cpu_port_index; ++ } ++ + return 0; + } + +@@ -533,7 +563,7 @@ static int dsa_ds_parse(struct dsa_switc + { + struct dsa_port *port; + u32 index; +- int err; ++ int err = 0; + + for (index = 0; index < ds->num_ports; index++) { + port = &ds->ports[index]; +@@ -546,6 +576,9 @@ static int dsa_ds_parse(struct dsa_switc + if (err) + return err; + } else { ++ err = dsa_user_parse(port, index, ds); ++ if (err) ++ return err; + /* Initialize enabled_port_mask now for drv->setup() + * to have access to a correct value, just like what + * net/dsa/dsa.c::dsa_switch_setup_one does. +--- a/net/dsa/dsa_priv.h ++++ b/net/dsa/dsa_priv.h +@@ -91,6 +91,8 @@ struct dsa_slave_priv { + + /* TC context */ + struct list_head mall_tc_list; ++ ++ struct net_device *master; + }; + + /* dsa.c */ +@@ -177,6 +179,9 @@ extern const struct dsa_device_ops trail + + static inline struct net_device *dsa_master_netdev(struct dsa_slave_priv *p) + { ++ if (p->master) ++ return p->master; ++ + return p->dp->cpu_dp->netdev; + } + +--- a/net/dsa/slave.c ++++ b/net/dsa/slave.c +@@ -1257,7 +1257,7 @@ int dsa_slave_create(struct dsa_port *po + int ret; + + cpu_dp = ds->dst->cpu_dp; +- master = cpu_dp->netdev; ++ master = ds->ports[port->upstream].ethernet; + + if (!ds->num_tx_queues) + ds->num_tx_queues = 1; +@@ -1295,6 +1295,7 @@ int dsa_slave_create(struct dsa_port *po + p->dp = port; + INIT_LIST_HEAD(&p->mall_tc_list); + p->xmit = dst->tag_ops->xmit; ++ p->master = master; + + p->old_pause = -1; + p->old_link = -1; diff --git a/target/linux/mediatek/patches-4.9/0035-net-mediatek-disable-RX-VLan-offloading.patch b/target/linux/mediatek/patches-4.14/0035-net-mediatek-disable-RX-VLan-offloading.patch similarity index 86% rename from target/linux/mediatek/patches-4.9/0035-net-mediatek-disable-RX-VLan-offloading.patch rename to target/linux/mediatek/patches-4.14/0035-net-mediatek-disable-RX-VLan-offloading.patch index 36321c55c..72a2ece46 100644 --- a/target/linux/mediatek/patches-4.9/0035-net-mediatek-disable-RX-VLan-offloading.patch +++ b/target/linux/mediatek/patches-4.14/0035-net-mediatek-disable-RX-VLan-offloading.patch @@ -11,7 +11,7 @@ Signed-off-by: John Crispin --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -643,8 +643,8 @@ static int mtk_tx_map(struct sk_buff *sk +@@ -709,8 +709,8 @@ static int mtk_tx_map(struct sk_buff *sk txd4 |= TX_DMA_CHKSUM; /* VLAN header offload */ @@ -22,7 +22,7 @@ Signed-off-by: John Crispin mapped_addr = dma_map_single(eth->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE); -@@ -1874,7 +1874,10 @@ static int mtk_hw_init(struct mtk_eth *e +@@ -1980,7 +1980,10 @@ static int mtk_hw_init(struct mtk_eth *e mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); /* Enable RX VLan Offloading */ @@ -32,8 +32,8 @@ Signed-off-by: John Crispin + else + mtk_w32(eth, 0, MTK_CDMP_EG_CTRL); - /* disable delay and normal interrupt */ - mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); + /* enable interrupt delay for RX */ + mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT); --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -34,8 +34,6 @@ diff --git a/target/linux/mediatek/patches-4.9/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch b/target/linux/mediatek/patches-4.14/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch similarity index 91% rename from target/linux/mediatek/patches-4.9/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch rename to target/linux/mediatek/patches-4.14/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch index 4f2c7b2e6..8163e4475 100644 --- a/target/linux/mediatek/patches-4.9/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch +++ b/target/linux/mediatek/patches-4.14/0042-net-next-mediatek-honour-special-tag-bit-inside-RX-D.patch @@ -17,7 +17,7 @@ Signed-off-by: John Crispin --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -933,10 +933,16 @@ static int mtk_poll_rx(struct napi_struc +@@ -999,10 +999,16 @@ static int mtk_poll_rx(struct napi_struc if (!(trxd.rxd2 & RX_DMA_DONE)) break; @@ -36,11 +36,11 @@ Signed-off-by: John Crispin + mac--; + } - netdev = eth->netdev[mac]; - + if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT || + !eth->netdev[mac])) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -284,6 +284,7 @@ +@@ -287,6 +287,7 @@ /* QDMA descriptor rxd4 */ #define RX_DMA_L4_VALID BIT(24) diff --git a/target/linux/mediatek/patches-4.9/0043-net-next-mediatek-enable-special-tag-indication-for-.patch b/target/linux/mediatek/patches-4.14/0043-net-next-mediatek-enable-special-tag-indication-for-.patch similarity index 94% rename from target/linux/mediatek/patches-4.9/0043-net-next-mediatek-enable-special-tag-indication-for-.patch rename to target/linux/mediatek/patches-4.14/0043-net-next-mediatek-enable-special-tag-indication-for-.patch index 2256325c9..a658a572f 100644 --- a/target/linux/mediatek/patches-4.9/0043-net-next-mediatek-enable-special-tag-indication-for-.patch +++ b/target/linux/mediatek/patches-4.14/0043-net-next-mediatek-enable-special-tag-indication-for-.patch @@ -17,7 +17,7 @@ Signed-off-by: John Crispin --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1894,6 +1894,8 @@ static int mtk_hw_init(struct mtk_eth *e +@@ -1984,6 +1984,8 @@ static int mtk_hw_init(struct mtk_eth *e */ val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); @@ -28,7 +28,7 @@ Signed-off-by: John Crispin if (MTK_HW_FEATURES & NETIF_F_HW_VLAN_CTAG_RX) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -76,6 +76,10 @@ +@@ -72,6 +72,10 @@ #define MTK_CDMQ_IG_CTRL 0x1400 #define MTK_CDMQ_STAG_EN BIT(0) diff --git a/target/linux/mediatek/patches-4.9/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch b/target/linux/mediatek/patches-4.14/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch similarity index 95% rename from target/linux/mediatek/patches-4.9/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch rename to target/linux/mediatek/patches-4.14/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch index 51204d400..4a69e7aad 100644 --- a/target/linux/mediatek/patches-4.9/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch +++ b/target/linux/mediatek/patches-4.14/0044-net-next-dsa-mediatek-tell-GDMA-when-we-are-turning-.patch @@ -16,7 +16,7 @@ Signed-off-by: John Crispin --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -742,6 +742,11 @@ mt7530_cpu_port_enable(struct mt7530_pri +@@ -677,6 +677,11 @@ mt7530_cpu_port_enable(struct mt7530_pri mt7530_write(priv, MT7530_PVC_P(port), PORT_SPEC_TAG); diff --git a/target/linux/mediatek/patches-4.9/0045-net-dsa-mediatek-turn-into-platform-driver.patch b/target/linux/mediatek/patches-4.14/0045-net-dsa-mediatek-turn-into-platform-driver.patch similarity index 80% rename from target/linux/mediatek/patches-4.9/0045-net-dsa-mediatek-turn-into-platform-driver.patch rename to target/linux/mediatek/patches-4.14/0045-net-dsa-mediatek-turn-into-platform-driver.patch index c263b0795..87e3e8822 100644 --- a/target/linux/mediatek/patches-4.9/0045-net-dsa-mediatek-turn-into-platform-driver.patch +++ b/target/linux/mediatek/patches-4.14/0045-net-dsa-mediatek-turn-into-platform-driver.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -1035,10 +1035,10 @@ static struct dsa_switch_ops mt7530_swit +@@ -1049,10 +1049,10 @@ static const struct dsa_switch_ops mt753 }; static int @@ -23,7 +23,7 @@ Signed-off-by: John Crispin dn = mdiodev->dev.of_node; -@@ -1086,7 +1086,12 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -1100,7 +1100,12 @@ mt7530_probe(struct mdio_device *mdiodev } } @@ -36,9 +36,9 @@ Signed-off-by: John Crispin + return -EPROBE_DEFER; priv->dev = &mdiodev->dev; priv->ds->priv = priv; - priv->ds->dev = &mdiodev->dev; -@@ -1098,8 +1103,8 @@ mt7530_probe(struct mdio_device *mdiodev - return dsa_register_switch(priv->ds, priv->ds->dev->of_node); + priv->ds->ops = &mt7530_switch_ops; +@@ -1110,8 +1115,8 @@ mt7530_probe(struct mdio_device *mdiodev + return dsa_register_switch(priv->ds); } -static void @@ -48,7 +48,7 @@ Signed-off-by: John Crispin { struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); int ret = 0; -@@ -1116,6 +1121,8 @@ mt7530_remove(struct mdio_device *mdiode +@@ -1128,6 +1133,8 @@ mt7530_remove(struct mdio_device *mdiode dsa_unregister_switch(priv->ds); mutex_destroy(&priv->reg_mutex); @@ -57,7 +57,7 @@ Signed-off-by: John Crispin } static const struct of_device_id mt7530_of_match[] = { -@@ -1123,16 +1130,16 @@ static const struct of_device_id mt7530_ +@@ -1135,16 +1142,16 @@ static const struct of_device_id mt7530_ { /* sentinel */ }, }; diff --git a/target/linux/mediatek/patches-4.14/0046-net-mediatek-add-irq-delay.patch b/target/linux/mediatek/patches-4.14/0046-net-mediatek-add-irq-delay.patch new file mode 100644 index 000000000..3ace7265c --- /dev/null +++ b/target/linux/mediatek/patches-4.14/0046-net-mediatek-add-irq-delay.patch @@ -0,0 +1,21 @@ +From 6e081074df96bf3762c2e6438c383f11a56b0a7e Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Thu, 10 Aug 2017 15:58:04 +0200 +Subject: [PATCH 46/57] net: mediatek: add irq delay + +Signed-off-by: John Crispin +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 ++++++- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +++++++- + 2 files changed, 13 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1995,6 +1995,7 @@ static int mtk_hw_init(struct mtk_eth *e + + /* enable interrupt delay for RX */ + mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_PDMA_DELAY_INT); ++ //mtk_w32(eth, MTK_PDMA_DELAY_RX_DELAY, MTK_QDMA_DELAY_INT); + + /* disable delay and normal interrupt */ + mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); diff --git a/target/linux/mediatek/patches-4.9/0048-net-core-add-RPS-balancer.patch b/target/linux/mediatek/patches-4.14/0048-net-core-add-RPS-balancer.patch similarity index 91% rename from target/linux/mediatek/patches-4.9/0048-net-core-add-RPS-balancer.patch rename to target/linux/mediatek/patches-4.14/0048-net-core-add-RPS-balancer.patch index aeb81e14b..6cb5fa749 100644 --- a/target/linux/mediatek/patches-4.9/0048-net-core-add-RPS-balancer.patch +++ b/target/linux/mediatek/patches-4.14/0048-net-core-add-RPS-balancer.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/net/core/dev.c +++ b/net/core/dev.c -@@ -3551,6 +3551,58 @@ set_rps_cpu(struct net_device *dev, stru +@@ -3636,6 +3636,58 @@ set_rps_cpu(struct net_device *dev, stru return rflow; } @@ -69,7 +69,7 @@ Signed-off-by: John Crispin /* * get_rps_cpu is called from netif_receive_skb and returns the target * CPU from the RPS map of the receiving queue for a given skb. -@@ -3640,7 +3692,7 @@ static int get_rps_cpu(struct net_device +@@ -3725,7 +3777,7 @@ static int get_rps_cpu(struct net_device try_rps: if (map) { @@ -78,7 +78,7 @@ Signed-off-by: John Crispin if (cpu_online(tcpu)) { cpu = tcpu; goto done; -@@ -8431,6 +8483,9 @@ static int __init net_dev_init(void) +@@ -8810,6 +8862,9 @@ static int __init net_dev_init(void) sd->backlog.weight = weight_p; } diff --git a/target/linux/mediatek/patches-4.9/0051-net-mediatek-increase-tx_timeout.patch b/target/linux/mediatek/patches-4.14/0051-net-mediatek-increase-tx_timeout.patch similarity index 92% rename from target/linux/mediatek/patches-4.9/0051-net-mediatek-increase-tx_timeout.patch rename to target/linux/mediatek/patches-4.14/0051-net-mediatek-increase-tx_timeout.patch index 3de3e7343..f4c0fce56 100644 --- a/target/linux/mediatek/patches-4.9/0051-net-mediatek-increase-tx_timeout.patch +++ b/target/linux/mediatek/patches-4.14/0051-net-mediatek-increase-tx_timeout.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -2384,7 +2384,7 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -2454,7 +2454,7 @@ static int mtk_add_mac(struct mtk_eth *e mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; SET_NETDEV_DEV(eth->netdev[id], eth->dev); diff --git a/target/linux/mediatek/patches-4.9/0052-net-phy-add-FC.patch b/target/linux/mediatek/patches-4.14/0052-net-phy-add-FC.patch similarity index 91% rename from target/linux/mediatek/patches-4.9/0052-net-phy-add-FC.patch rename to target/linux/mediatek/patches-4.14/0052-net-phy-add-FC.patch index 32d516ce4..3c4fc5a7c 100644 --- a/target/linux/mediatek/patches-4.9/0052-net-phy-add-FC.patch +++ b/target/linux/mediatek/patches-4.14/0052-net-phy-add-FC.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -1804,7 +1804,7 @@ static struct phy_driver genphy_driver[] +@@ -1929,7 +1929,7 @@ static struct phy_driver genphy_driver = .config_init = genphy_config_init, .features = PHY_GBIT_FEATURES | SUPPORTED_MII | SUPPORTED_AUI | SUPPORTED_FIBRE | diff --git a/target/linux/mediatek/patches-4.9/0062-mdio-atomic.patch b/target/linux/mediatek/patches-4.14/0062-mdio-atomic.patch similarity index 84% rename from target/linux/mediatek/patches-4.9/0062-mdio-atomic.patch rename to target/linux/mediatek/patches-4.14/0062-mdio-atomic.patch index 96e7072a3..9ce66ef48 100644 --- a/target/linux/mediatek/patches-4.9/0062-mdio-atomic.patch +++ b/target/linux/mediatek/patches-4.14/0062-mdio-atomic.patch @@ -1,6 +1,6 @@ --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -97,7 +97,10 @@ static int mtk_mdio_busy_wait(struct mtk +@@ -76,7 +76,10 @@ static int mtk_mdio_busy_wait(struct mtk return 0; if (time_after(jiffies, t_start + PHY_IAC_TIMEOUT)) break; diff --git a/target/linux/mediatek/patches-4.9/0063-atomic-sleep.patch b/target/linux/mediatek/patches-4.14/0063-atomic-sleep.patch similarity index 61% rename from target/linux/mediatek/patches-4.9/0063-atomic-sleep.patch rename to target/linux/mediatek/patches-4.14/0063-atomic-sleep.patch index 095ce74a4..0dde3fdb6 100644 --- a/target/linux/mediatek/patches-4.9/0063-atomic-sleep.patch +++ b/target/linux/mediatek/patches-4.14/0063-atomic-sleep.patch @@ -1,6 +1,14 @@ --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1533,7 +1533,10 @@ static void mtk_hwlro_rx_uninit(struct m +@@ -409,6 +409,7 @@ static int mtk_mdio_init(struct mtk_eth + + snprintf(eth->mii_bus->id, MII_BUS_ID_SIZE, "%s", mii_np->name); + ret = of_mdiobus_register(eth->mii_bus, mii_np); ++printk("%s:%s[%d]%d %p\n", __FILE__, __func__, __LINE__, ret, eth->mii_bus); + + err_put_node: + of_node_put(mii_np); +@@ -1472,7 +1473,10 @@ static void mtk_hwlro_rx_uninit(struct m for (i = 0; i < 10; i++) { val = mtk_r32(eth, MTK_PDMA_LRO_CTRL_DW0); if (val & MTK_LRO_RING_RELINQUISH_DONE) { @@ -12,7 +20,7 @@ continue; } break; -@@ -1951,7 +1954,10 @@ static void mtk_stop_dma(struct mtk_eth +@@ -1868,7 +1872,10 @@ static void mtk_stop_dma(struct mtk_eth for (i = 0; i < 10; i++) { val = mtk_r32(eth, glo_cfg); if (val & (MTK_TX_DMA_BUSY | MTK_RX_DMA_BUSY)) { @@ -24,7 +32,7 @@ continue; } break; -@@ -1996,7 +2002,10 @@ static void ethsys_reset(struct mtk_eth +@@ -1906,7 +1913,10 @@ static void ethsys_reset(struct mtk_eth reset_bits, reset_bits); diff --git a/target/linux/mediatek/patches-4.14/0064-dts.patch b/target/linux/mediatek/patches-4.14/0064-dts.patch new file mode 100644 index 000000000..47fc2b1b2 --- /dev/null +++ b/target/linux/mediatek/patches-4.14/0064-dts.patch @@ -0,0 +1,589 @@ +--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts ++++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts +@@ -21,6 +21,10 @@ + stdout-path = "serial2:115200n8"; + }; + ++ memory { ++ reg = <0 0x80000000 0 0x20000000>; ++ }; ++ + cpus { + cpu@0 { + proc-supply = <&mt6323_vproc_reg>; +@@ -84,6 +88,10 @@ + memory@80000000 { + reg = <0 0x80000000 0 0x40000000>; + }; ++ ++ mt7530: switch@0 { ++ compatible = "mediatek,mt7530"; ++ }; + }; + + &cir { +@@ -111,11 +119,24 @@ + }; + }; + ++ gmac1: mac@1 { ++ compatible = "mediatek,eth-mac"; ++ reg = <1>; ++ phy-mode = "rgmii"; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; +- +- switch@0 { ++ }; ++}; ++ &mt7530 { + compatible = "mediatek,mt7530"; + #address-cells = <1>; + #size-cells = <0>; +@@ -125,6 +146,8 @@ + core-supply = <&mt6323_vpa_reg>; + io-supply = <&mt6323_vemc3v3_reg>; + ++ dsa,mii-bus = <&mdio>; ++ + ports { + #address-cells = <1>; + #size-cells = <0>; +@@ -133,29 +156,46 @@ + port@0 { + reg = <0>; + label = "wan"; ++ cpu = <&cpu_port1>; + }; + + port@1 { + reg = <1>; + label = "lan0"; ++ cpu = <&cpu_port0>; + }; + + port@2 { + reg = <2>; + label = "lan1"; ++ cpu = <&cpu_port0>; + }; + + port@3 { + reg = <3>; + label = "lan2"; ++ cpu = <&cpu_port0>; + }; + + port@4 { + reg = <4>; + label = "lan3"; ++ cpu = <&cpu_port0>; + }; + +- port@6 { ++ cpu_port1: port@5 { ++ reg = <5>; ++ label = "cpu"; ++ ethernet = <&gmac1>; ++ phy-mode = "rgmii"; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ cpu_port0: port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; +@@ -168,8 +208,6 @@ + }; + }; + }; +- }; +-}; + + &i2c0 { + pinctrl-names = "default"; +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -1061,6 +1061,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ + mt6580-evbp1.dtb \ + mt6589-aquaris5.dtb \ + mt6592-evb.dtb \ ++ mt7623a-rfb-emmc.dtb \ + mt7623n-rfb-nand.dtb \ + mt7623n-bananapi-bpi-r2.dtb \ + mt8127-moose.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/mt7623a-rfb-emmc.dts +@@ -0,0 +1,449 @@ ++/* ++ * Copyright 2017 Sean Wang ++ * ++ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ */ ++ ++/dts-v1/; ++#include ++#include "mt7623.dtsi" ++#include "mt6323.dtsi" ++ ++/ { ++ model = "MediaTek MT7623N NAND reference board"; ++ compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623"; ++ ++ aliases { ++ serial2 = &uart2; ++ }; ++ ++ chosen { ++ bootargs = "earlyprintk block2mtd.block2mtd=/dev/mmcblk0,65536,eMMC,5 mtdparts=eMMC:256k(mbr)ro,512k(uboot)ro,256k(config)ro,256k(factory)ro,32M(kernel),32M(recovery),1024M(rootfs),2048M(usrdata),-(bmtpool) rootfstype=squashfs,jffs2"; ++ ++ stdout-path = "serial2:115200n8"; ++ }; ++ ++ memory { ++ reg = <0 0x80000000 0 0x20000000>; ++ }; ++ ++ cpus { ++ cpu@0 { ++ proc-supply = <&mt6323_vproc_reg>; ++ }; ++ ++ cpu@1 { ++ proc-supply = <&mt6323_vproc_reg>; ++ }; ++ ++ cpu@2 { ++ proc-supply = <&mt6323_vproc_reg>; ++ }; ++ ++ cpu@3 { ++ proc-supply = <&mt6323_vproc_reg>; ++ }; ++ }; ++ ++ memory@80000000 { ++ reg = <0 0x80000000 0 0x40000000>; ++ }; ++ ++ mt7530: switch@0 { ++ compatible = "mediatek,mt7530"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++ð { ++ status = "okay"; ++ ++ gmac0: mac@0 { ++ compatible = "mediatek,eth-mac"; ++ reg = <0>; ++ phy-mode = "trgmii"; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ ++ gmac1: mac@1 { ++ compatible = "mediatek,eth-mac"; ++ reg = <1>; ++ phy-mode = "rgmiii-rxid"; ++ phy-handle = <&phy5>; ++ }; ++ ++ mdio: mdio-bus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ phy5: ethernet-phy@5 { ++ reg = <5>; ++ phy-mode = "rgmii-rxid"; ++ }; ++ }; ++}; ++ ++&mt7530 { ++ compatible = "mediatek,mt7530"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ pinctrl-names = "default"; ++ mediatek,mcm; ++ resets = <ðsys 2>; ++ reset-names = "mcm"; ++ core-supply = <&mt6323_vpa_reg>; ++ io-supply = <&mt6323_vemc3v3_reg>; ++ ++ dsa,mii-bus = <&mdio>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ ++ port@0 { ++ reg = <0>; ++ label = "lan0"; ++ cpu = <&cpu_port0>; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "lan1"; ++ cpu = <&cpu_port0>; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "lan2"; ++ cpu = <&cpu_port0>; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "lan3"; ++ cpu = <&cpu_port0>; ++ }; ++ ++ cpu_port0: port@6 { ++ reg = <6>; ++ label = "cpu"; ++ ethernet = <&gmac0>; ++ phy-mode = "trgmii"; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins_a>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins_a>; ++ status = "okay"; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default", "state_uhs"; ++ pinctrl-0 = <&mmc0_pins_default>; ++ pinctrl-1 = <&mmc0_pins_uhs>; ++ status = "okay"; ++ bus-width = <8>; ++ max-frequency = <50000000>; ++ cap-mmc-highspeed; ++ vmmc-supply = <&mt6323_vemc3v3_reg>; ++ vqmmc-supply = <&mt6323_vio18_reg>; ++ non-removable; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default", "state_uhs"; ++ pinctrl-0 = <&mmc1_pins_default>; ++ pinctrl-1 = <&mmc1_pins_uhs>; ++ status = "okay"; ++ bus-width = <4>; ++ max-frequency = <50000000>; ++ cap-sd-highspeed; ++ cd-gpios = <&pio 261 0>; ++ vmmc-supply = <&mt6323_vmch_reg>; ++ vqmmc-supply = <&mt6323_vio18_reg>; ++}; ++ ++&pio { ++ cir_pins_a:cir@0 { ++ pins_cir { ++ pinmux = ; ++ bias-disable; ++ }; ++ }; ++ ++ i2c0_pins_a: i2c@0 { ++ pins_i2c0 { ++ pinmux = , ++ ; ++ bias-disable; ++ }; ++ }; ++ ++ i2c1_pins_a: i2c@1 { ++ pin_i2c1 { ++ pinmux = , ++ ; ++ bias-disable; ++ }; ++ }; ++ ++ i2s0_pins_a: i2s@0 { ++ pin_i2s0 { ++ pinmux = , ++ , ++ , ++ , ++ ; ++ drive-strength = ; ++ bias-pull-down; ++ }; ++ }; ++ ++ i2s1_pins_a: i2s@1 { ++ pin_i2s1 { ++ pinmux = , ++ , ++ , ++ , ++ ; ++ drive-strength = ; ++ bias-pull-down; ++ }; ++ }; ++ ++ mmc0_pins_default: mmc0default { ++ pins_cmd_dat { ++ pinmux = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ input-enable; ++ bias-pull-up; ++ }; ++ ++ pins_clk { ++ pinmux = ; ++ bias-pull-down; ++ }; ++ ++ pins_rst { ++ pinmux = ; ++ bias-pull-up; ++ }; ++ }; ++ ++ mmc0_pins_uhs: mmc0 { ++ pins_cmd_dat { ++ pinmux = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ input-enable; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ ++ pins_clk { ++ pinmux = ; ++ drive-strength = ; ++ bias-pull-down = ; ++ }; ++ ++ pins_rst { ++ pinmux = ; ++ bias-pull-up; ++ }; ++ }; ++ ++ mmc1_pins_default: mmc1default { ++ pins_cmd_dat { ++ pinmux = , ++ , ++ , ++ , ++ ; ++ input-enable; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ ++ pins_clk { ++ pinmux = ; ++ bias-pull-down; ++ drive-strength = ; ++ }; ++ ++ pins_wp { ++ pinmux = ; ++ input-enable; ++ bias-pull-up; ++ }; ++ ++ pins_insert { ++ pinmux = ; ++ bias-pull-up; ++ }; ++ }; ++ ++ mmc1_pins_uhs: mmc1 { ++ pins_cmd_dat { ++ pinmux = , ++ , ++ , ++ , ++ ; ++ input-enable; ++ drive-strength = ; ++ bias-pull-up = ; ++ }; ++ ++ pins_clk { ++ pinmux = ; ++ drive-strength = ; ++ bias-pull-down = ; ++ }; ++ }; ++ ++ pwm_pins_a: pwm@0 { ++ pins_pwm { ++ pinmux = , ++ , ++ , ++ , ++ ; ++ }; ++ }; ++ ++ spi0_pins_a: spi@0 { ++ pins_spi { ++ pinmux = , ++ , ++ , ++ ; ++ bias-disable; ++ }; ++ }; ++ ++ uart0_pins_a: uart@0 { ++ pins_dat { ++ pinmux = , ++ ; ++ }; ++ }; ++ ++ uart1_pins_a: uart@1 { ++ pins_dat { ++ pinmux = , ++ ; ++ }; ++ }; ++}; ++ ++&pwm { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm_pins_a>; ++ status = "okay"; ++}; ++ ++&pwrap { ++ mt6323 { ++ mt6323led: led { ++ compatible = "mediatek,mt6323-led"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ led@0 { ++ reg = <0>; ++ label = "bpi-r2:isink:green"; ++ default-state = "off"; ++ }; ++ ++ led@1 { ++ reg = <1>; ++ label = "bpi-r2:isink:red"; ++ default-state = "off"; ++ }; ++ ++ led@2 { ++ reg = <2>; ++ label = "bpi-r2:isink:blue"; ++ default-state = "off"; ++ }; ++ }; ++ }; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins_a>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "disabled"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins_a>; ++ status = "disabled"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb1 { ++ vusb33-supply = <&mt6323_vusb_reg>; ++ status = "okay"; ++}; ++ ++&usb2 { ++ vusb33-supply = <&mt6323_vusb_reg>; ++ status = "okay"; ++}; ++ ++&u3phy1 { ++ status = "okay"; ++}; ++ ++&u3phy2 { ++ status = "okay"; ++}; ++ +--- a/arch/arm/boot/dts/mt7623.dtsi ++++ b/arch/arm/boot/dts/mt7623.dtsi +@@ -322,6 +322,7 @@ + "syscon"; + reg = <0 0x10209000 0 0x1000>; + #clock-cells = <1>; ++ #reset-cells = <1>; + }; + + rng: rng@1020f000 { diff --git a/target/linux/mediatek/patches-4.9/0001-arch-arm-add-dts-build-code.patch b/target/linux/mediatek/patches-4.9/0001-arch-arm-add-dts-build-code.patch deleted file mode 100644 index ff04a9f1e..000000000 --- a/target/linux/mediatek/patches-4.9/0001-arch-arm-add-dts-build-code.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 9fdcf63545855f3a6f82dee109510f4735e861c8 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 15:54:13 +0200 -Subject: [PATCH 01/57] arch: arm: add dts build code - -Signed-off-by: John Crispin ---- - arch/arm/boot/dts/Makefile | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -950,6 +950,10 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ - mt6589-aquaris5.dtb \ - mt6592-evb.dtb \ - mt7623-evb.dtb \ -+ mt7623-eMMC.dtb \ -+ mt7623-NAND.dtb \ -+ mt7623-NAND-ePHY.dtb \ -+ mt7623n-bananapi-bpi-r2.dtb \ - mt8127-moose.dtb \ - mt8135-evbp1.dtb - dtb-$(CONFIG_ARCH_ZX) += zx296702-ad1.dtb diff --git a/target/linux/mediatek/patches-4.9/0002-dt-bindings-add-MediaTek-PCIe-binding-documentation.patch b/target/linux/mediatek/patches-4.9/0002-dt-bindings-add-MediaTek-PCIe-binding-documentation.patch deleted file mode 100644 index 9dd6fcd01..000000000 --- a/target/linux/mediatek/patches-4.9/0002-dt-bindings-add-MediaTek-PCIe-binding-documentation.patch +++ /dev/null @@ -1,154 +0,0 @@ -From ad2d4df46d8ef6a7aab20f0b668fa7db5257cbea Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Wed, 6 Jan 2016 21:55:10 +0100 -Subject: [PATCH 02/57] dt-bindings: add MediaTek PCIe binding documentation - -Signed-off-by: John Crispin ---- - .../devicetree/bindings/pci/mediatek-pcie.txt | 140 +++++++++++++++++++++ - 1 file changed, 140 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt -@@ -0,0 +1,140 @@ -+Mediatek PCIe controller -+ -+Required properties: -+- compatible: Should be one of: -+ - "mediatek,mt2701-pcie" -+ - "mediatek,mt7623-pcie" -+- device_type: Must be "pci" -+- reg: A list of physical base address and length for each set of controller -+ registers. A list of register ranges to use. Must contain an -+ entry for each entry in the reg-names property. -+- reg-names: Must include the following entries: -+ "pcie": PCIe registers -+ "pcie phy0": PCIe PHY0 registers -+ "pcie phy1": PCIe PHY0 registers -+ "pcie phy2": PCIe PHY0 registers -+- interrupts: A list of interrupt outputs of the controller. Must contain an -+ entry for each entry in the interrupt-names property. -+- interrupt-names: Must include the following entries: -+ "pcie0": The interrupt that is asserted for port0 -+ "pcie1": The interrupt that is asserted for port1 -+ "pcie2": The interrupt that is asserted for port2 -+- bus-range: Range of bus numbers associated with this controller -+- #address-cells: Address representation for root ports (must be 3) -+- #size-cells: Size representation for root ports (must be 2) -+- ranges: Describes the translation of addresses for root ports and standard -+ PCI regions. The entries must be 6 cells each. -+ Please refer to the standard PCI bus binding document for a more detailed -+ explanation. -+- #interrupt-cells: Size representation for interrupts (must be 1) -+- clocks: Must contain an entry for each entry in clock-names. -+ See ../clocks/clock-bindings.txt for details. -+- clock-names: Must include the following entries: -+ - pcie0 -+ - pcie1 -+ - pcie2 -+- resets: Must contain an entry for each entry in reset-names. -+ See ../reset/reset.txt for details. -+- reset-names: Must include the following entries: -+ - pcie0 -+ - pcie1 -+ - pcie2 -+- mediatek,hifsys: Must contain a phandle to the HIFSYS syscon range. -+Root ports are defined as subnodes of the PCIe controller node. -+ -+Required properties: -+- device_type: Must be "pci" -+- assigned-addresses: Address and size of the port configuration registers -+- reg: PCI bus address of the root port -+- #address-cells: Must be 3 -+- #size-cells: Must be 2 -+- ranges: Sub-ranges distributed from the PCIe controller node. An empty -+ property is sufficient. -+ -+Example: -+ -+SoC DTSI: -+ -+ hifsys: clock-controller@1a000000 { -+ compatible = "mediatek,mt7623-hifsys", -+ "mediatek,mt2701-hifsys", -+ "syscon"; -+ reg = <0 0x1a000000 0 0x1000>; -+ #clock-cells = <1>; -+ #reset-cells = <1>; -+ }; -+ -+ pcie-controller@1a140000 { -+ compatible = "mediatek,mt7623-pcie"; -+ device_type = "pci"; -+ reg = <0 0x1a140000 0 0x8000>, /* PCI-Express registers */ -+ <0 0x1a149000 0 0x1000>, /* PCI-Express PHY0 */ -+ <0 0x1a14a000 0 0x1000>, /* PCI-Express PHY1 */ -+ <0 0x1a244000 0 0x1000>; /* PCI-Express PHY2 */ -+ reg-names = "pcie", "pcie phy0", "pcie phy1", "pcie phy2"; -+ interrupts = , -+ , -+ ; -+ interrupt-names = "pcie0", "pcie1", "pcie2"; -+ clocks = <&topckgen CLK_TOP_ETHIF_SEL>; -+ clock-names = "pcie"; -+ power-domains = <&scpsys MT2701_POWER_DOMAIN_HIF>; -+ resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>, -+ <&hifsys MT2701_HIFSYS_PCIE1_RST>, -+ <&hifsys MT2701_HIFSYS_PCIE2_RST>; -+ reset-names = "pcie0", "pice1", "pcie2"; -+ -+ bus-range = <0x00 0xff>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ mediatek,hifsys = <&hifsys>; -+ -+ ranges = <0x81000000 0 0x1a160000 0 0x1a160000 0 0x00010000 /* io space */ -+ 0x83000000 0 0x60000000 0 0x60000000 0 0x10000000>; /* pci memory */ -+ -+ status = "disabled"; -+ -+ pcie@1,0 { -+ device_type = "pci"; -+ reg = <0x0800 0 0 0 0>; -+ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ ranges; -+ -+ status = "disabled"; -+ }; -+ -+ pcie@2,0{ -+ device_type = "pci"; -+ reg = <0x1000 0 0 0 0>; -+ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ ranges; -+ -+ status = "disabled"; -+ }; -+ -+ pcie@3,0{ -+ device_type = "pci"; -+ reg = <0x1800 0 0 0 0>; -+ -+ #address-cells = <3>; -+ #size-cells = <2>; -+ ranges; -+ -+ status = "disabled"; -+ }; -+ }; -+ -+Board DTS: -+ -+ pcie-controller { -+ status = "okay"; -+ -+ pci@1,0 { -+ status = "okay"; -+ }; -+ }; diff --git a/target/linux/mediatek/patches-4.9/0003-PCI-mediatek-add-support-for-PCIe-found-on-MT7623-MT.patch b/target/linux/mediatek/patches-4.9/0003-PCI-mediatek-add-support-for-PCIe-found-on-MT7623-MT.patch deleted file mode 100644 index 43f51ef6b..000000000 --- a/target/linux/mediatek/patches-4.9/0003-PCI-mediatek-add-support-for-PCIe-found-on-MT7623-MT.patch +++ /dev/null @@ -1,698 +0,0 @@ -From 950bd9b0691dd10209c333086a6bdda0108ed3a8 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 5 Jan 2016 20:20:04 +0100 -Subject: [PATCH 03/57] PCI: mediatek: add support for PCIe found on - MT7623/MT2701 - -Add PCIe controller support on MediaTek MT2701/MT7623. The driver supports -a single Root complex (RC) with 3 Root Ports. The SoCs supports a Gen2 -1-lan Link on each port. - -Signed-off-by: John Crispin ---- - arch/arm/mach-mediatek/Kconfig | 1 + - drivers/pci/host/Kconfig | 11 + - drivers/pci/host/Makefile | 1 + - drivers/pci/host/pcie-mediatek.c | 641 +++++++++++++++++++++++++++++++++++++++ - 4 files changed, 654 insertions(+) - create mode 100644 drivers/pci/host/pcie-mediatek.c - ---- a/arch/arm/mach-mediatek/Kconfig -+++ b/arch/arm/mach-mediatek/Kconfig -@@ -25,6 +25,7 @@ config MACH_MT6592 - config MACH_MT7623 - bool "MediaTek MT7623 SoCs support" - default ARCH_MEDIATEK -+ select MIGHT_HAVE_PCI - - config MACH_MT8127 - bool "MediaTek MT8127 SoCs support" ---- a/drivers/pci/host/Kconfig -+++ b/drivers/pci/host/Kconfig -@@ -301,4 +301,15 @@ config VMD - To compile this driver as a module, choose M here: the - module will be called vmd. - -+config PCIE_MTK -+ bool "Mediatek PCIe Controller" -+ depends on MACH_MT2701 || MACH_MT7623 -+ depends on OF -+ depends on PCI -+ help -+ Say Y here if you want to enable PCI controller support on Mediatek MT7623. -+ MT7623 PCIe supports single Root complex (RC) with 3 Root Ports. -+ Each port supports a Gen2 1-lan Link. -+ PCIe include one Host/PCI bridge and 3 PCIe MAC. -+ - endmenu ---- a/drivers/pci/host/Makefile -+++ b/drivers/pci/host/Makefile -@@ -33,3 +33,4 @@ obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-arm - obj-$(CONFIG_PCIE_ARTPEC6) += pcie-artpec6.o - obj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o - obj-$(CONFIG_VMD) += vmd.o -+obj-$(CONFIG_PCIE_MTK) += pcie-mediatek.o ---- /dev/null -+++ b/drivers/pci/host/pcie-mediatek.c -@@ -0,0 +1,641 @@ -+/* -+ * Mediatek MT2701/MT7623 SoC PCIE support -+ * -+ * Copyright (C) 2015 Mediatek -+ * Copyright (C) 2015 Ziv Huang -+ * Copyright (C) 2015 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MEMORY_BASE 0x80000000 -+ -+/* PCIE Registers */ -+#define PCICFG 0x00 -+#define PCIINT 0x08 -+#define PCIENA 0x0c -+#define CFGADDR 0x20 -+#define CFGDATA 0x24 -+#define MEMBASE 0x28 -+#define IOBASE 0x2c -+ -+/* per Port Registers */ -+#define BAR0SETUP 0x10 -+#define IMBASEBAR0 0x18 -+#define PCIE_CLASS 0x34 -+#define PCIE_SISTAT 0x50 -+ -+#define MTK_PCIE_HIGH_PERF BIT(14) -+#define PCIEP0_BASE 0x2000 -+#define PCIEP1_BASE 0x3000 -+#define PCIEP2_BASE 0x4000 -+ -+#define PHY_P0_CTL 0x9000 -+#define PHY_P1_CTL 0xa000 -+#define PHY_P2_CTL 0x4000 -+ -+#define RSTCTL_PCIE0_RST BIT(24) -+#define RSTCTL_PCIE1_RST BIT(25) -+#define RSTCTL_PCIE2_RST BIT(26) -+ -+#define HIFSYS_SYSCFG1 0x14 -+#define HIFSYS_SYSCFG1_PHY2_MASK (0x3 << 20) -+ -+#define MTK_PHY_CLK 0xb00 -+#define MTK_PHY_CLKDRV_OFFSET BIT(2) -+#define MTK_PHY_CLKDRV_OFFSET_MASK 0xe -+#define MTK_PHY_PLL 0xb04 -+#define MTK_PHY_CLKDRV_AMP BIT(30) -+#define MTK_PHY_CLKDRV_AMP_MASK 0xe0000000 -+#define MTK_PHY_REFCLK_SEL 0xc00 -+#define MTK_PHY_XTAL_EXT_EN (BIT(17) | BIT(12)) -+#define MTK_PHY_XTAL_EXT_EN_MASK 0x33000 -+#define MTK_PHY_PLL_BC 0xc08 -+#define MTK_PHY_PLL_BC_PE2H 0xc0 -+#define MTK_PHY_PLL_BC_PE2H_MASK 0x380000 -+#define MTK_PHY_PLL_IC 0xc0c -+#define MTK_PHY_PLL_IC_BR_PE2H BIT(28) -+#define MTK_PHY_PLL_IC_BR_PE2H_MASK 0x30000000 -+#define MTK_PHY_PLL_IC_PE2H BIT(12) -+#define MTK_PHY_PLL_IC_PE2H_MASK 0xf000 -+#define MTK_PHY_PLL_IR 0xc10 -+#define MTK_PHY_PLL_IR_PE2H BIT(17) -+#define MTK_PHY_PLL_IR_PE2H_MASK 0xf0000 -+#define MTK_PHY_PLL_BP 0xc14 -+#define MTK_PHY_PLL_BP_PE2H (BIT(19) | BIT(17)) -+#define MTK_PHY_PLL_BP_PE2H_MASK 0xf0000 -+#define MTK_PHY_SSC_DELTA1 0xc3c -+#define MTK_PHY_SSC_DELTA1_PE2H (0x3c << 16) -+#define MTK_PHY_SSC_DELTA1_PE2H_MASK 0xffff0000 -+#define MTK_PHY_SSC_DELTA 0xc48 -+#define MTK_PHY_SSC_DELTA_PE2H 0x36 -+#define MTK_PHY_SSC_DELTA_PE2H_MASK 0xffff -+ -+#define MAX_PORT_NUM 3 -+ -+struct mtk_pcie_port { -+ int id; -+ int enable; -+ int irq; -+ u32 link; -+ void __iomem *phy_base; -+ struct reset_control *rstc; -+}; -+ -+#define mtk_foreach_port(pcie, p) \ -+ for ((p) = pcie->port; \ -+ (p) != &pcie->port[MAX_PORT_NUM]; (p)++) -+ -+struct mtk_pcie { -+ struct device *dev; -+ void __iomem *pcie_base; -+ struct regmap *hifsys; -+ -+ struct resource io; -+ struct resource pio; -+ struct resource mem; -+ struct resource prefetch; -+ struct resource busn; -+ -+ u32 io_bus_addr; -+ u32 mem_bus_addr; -+ -+ struct clk *clk; -+ -+ struct mtk_pcie_port port[MAX_PORT_NUM]; -+ int pcie_card_link; -+}; -+ -+static struct mtk_pcie_port_data { -+ u32 base; -+ u32 perst_n; -+ u32 interrupt_en; -+} mtk_pcie_port_data[MAX_PORT_NUM] = { -+ { PCIEP0_BASE, BIT(1), BIT(20) }, -+ { PCIEP1_BASE, BIT(2), BIT(21) }, -+ { PCIEP2_BASE, BIT(3), BIT(22) }, -+}; -+ -+static const struct mtk_phy_init { -+ uint32_t reg; -+ uint32_t mask; -+ uint32_t val; -+} mtk_phy_init[] = { -+ { MTK_PHY_REFCLK_SEL, MTK_PHY_XTAL_EXT_EN_MASK, MTK_PHY_XTAL_EXT_EN }, -+ { MTK_PHY_PLL, MTK_PHY_CLKDRV_AMP_MASK, MTK_PHY_CLKDRV_AMP }, -+ { MTK_PHY_CLK, MTK_PHY_CLKDRV_OFFSET_MASK, MTK_PHY_CLKDRV_OFFSET }, -+ { MTK_PHY_SSC_DELTA1, MTK_PHY_SSC_DELTA1_PE2H_MASK, MTK_PHY_SSC_DELTA1_PE2H }, -+ { MTK_PHY_SSC_DELTA, MTK_PHY_SSC_DELTA_PE2H_MASK, MTK_PHY_SSC_DELTA_PE2H }, -+ { MTK_PHY_PLL_IC, MTK_PHY_PLL_IC_BR_PE2H_MASK, MTK_PHY_PLL_IC_BR_PE2H }, -+ { MTK_PHY_PLL_BC, MTK_PHY_PLL_BC_PE2H_MASK, MTK_PHY_PLL_BC_PE2H }, -+ { MTK_PHY_PLL_IR, MTK_PHY_PLL_IR_PE2H_MASK, MTK_PHY_PLL_IR_PE2H }, -+ { MTK_PHY_PLL_IC, MTK_PHY_PLL_IC_PE2H_MASK, MTK_PHY_PLL_IC_PE2H }, -+ { MTK_PHY_PLL_BP, MTK_PHY_PLL_BP_PE2H_MASK, MTK_PHY_PLL_BP_PE2H }, -+}; -+ -+static struct mtk_pcie *sys_to_pcie(struct pci_sys_data *sys) -+{ -+ return sys->private_data; -+} -+ -+static void pcie_w32(struct mtk_pcie *pcie, u32 val, unsigned reg) -+{ -+ iowrite32(val, pcie->pcie_base + reg); -+} -+ -+static u32 pcie_r32(struct mtk_pcie *pcie, unsigned reg) -+{ -+ return ioread32(pcie->pcie_base + reg); -+} -+ -+static void pcie_m32(struct mtk_pcie *pcie, u32 mask, u32 val, unsigned reg) -+{ -+ u32 v = pcie_r32(pcie, reg); -+ -+ v &= mask; -+ v |= val; -+ pcie_w32(pcie, v, reg); -+} -+ -+static int pcie_config_read(struct pci_bus *bus, unsigned int devfn, int where, -+ int size, u32 *val) -+{ -+ struct mtk_pcie *pcie = sys_to_pcie(bus->sysdata); -+ unsigned int slot = PCI_SLOT(devfn); -+ u8 func = PCI_FUNC(devfn); -+ u32 address; -+ u32 data; -+ u32 num = 0; -+ -+ if (bus) -+ num = bus->number; -+ -+ address = (((where & 0xf00) >> 8) << 24) | -+ (num << 16) | -+ (slot << 11) | -+ (func << 8) | -+ (where & 0xfc); -+ -+ pcie_w32(pcie, address, CFGADDR); -+ data = pcie_r32(pcie, CFGDATA); -+ -+ switch (size) { -+ case 1: -+ *val = (data >> ((where & 3) << 3)) & 0xff; -+ break; -+ case 2: -+ *val = (data >> ((where & 3) << 3)) & 0xffff; -+ break; -+ case 4: -+ *val = data; -+ break; -+ } -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+static int pcie_config_write(struct pci_bus *bus, unsigned int devfn, int where, -+ int size, u32 val) -+{ -+ struct mtk_pcie *pcie = sys_to_pcie(bus->sysdata); -+ unsigned int slot = PCI_SLOT(devfn); -+ u8 func = PCI_FUNC(devfn); -+ u32 address; -+ u32 data; -+ u32 num = 0; -+ -+ if (bus) -+ num = bus->number; -+ -+ address = (((where & 0xf00) >> 8) << 24) | -+ (num << 16) | (slot << 11) | (func << 8) | (where & 0xfc); -+ pcie_w32(pcie, address, CFGADDR); -+ data = pcie_r32(pcie, CFGDATA); -+ -+ switch (size) { -+ case 1: -+ data = (data & ~(0xff << ((where & 3) << 3))) | -+ (val << ((where & 3) << 3)); -+ break; -+ case 2: -+ data = (data & ~(0xffff << ((where & 3) << 3))) | -+ (val << ((where & 3) << 3)); -+ break; -+ case 4: -+ data = val; -+ break; -+ } -+ pcie_w32(pcie, data, CFGDATA); -+ -+ return PCIBIOS_SUCCESSFUL; -+} -+ -+static struct pci_ops mtk_pcie_ops = { -+ .read = pcie_config_read, -+ .write = pcie_config_write, -+}; -+ -+static int __init mtk_pcie_setup(int nr, struct pci_sys_data *sys) -+{ -+ struct mtk_pcie *pcie = sys_to_pcie(sys); -+ -+ request_resource(&ioport_resource, &pcie->pio); -+ request_resource(&iomem_resource, &pcie->mem); -+ -+ pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset); -+ pci_add_resource_offset(&sys->resources, &pcie->pio, sys->io_offset); -+ pci_add_resource(&sys->resources, &pcie->busn); -+ -+ return 1; -+} -+ -+static struct pci_bus * __init mtk_pcie_scan_bus(int nr, -+ struct pci_sys_data *sys) -+{ -+ struct mtk_pcie *pcie = sys_to_pcie(sys); -+ struct pci_bus *bus; -+ -+ bus = pci_create_root_bus(pcie->dev, sys->busnr, &mtk_pcie_ops, sys, -+ &sys->resources); -+ if (!bus) -+ return NULL; -+ -+ pci_scan_child_bus(bus); -+ -+ return bus; -+} -+ -+static int __init mtk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ struct mtk_pcie *pcie = sys_to_pcie(dev->bus->sysdata); -+ struct mtk_pcie_port *port; -+ int irq = -1; -+ -+ mtk_foreach_port(pcie, port) -+ if (port->id == slot) -+ irq = port->irq; -+ -+ return irq; -+} -+ -+static void mtk_pcie_configure_phy(struct mtk_pcie *pcie, -+ struct mtk_pcie_port *port) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(mtk_phy_init); i++) { -+ void __iomem *phy_addr = port->phy_base + mtk_phy_init[i].reg; -+ u32 val = ioread32(phy_addr); -+ -+ val &= ~mtk_phy_init[i].mask; -+ val |= mtk_phy_init[i].val; -+ iowrite32(val, phy_addr); -+ } -+ usleep_range(5000, 6000); -+} -+ -+static void mtk_pcie_configure_rc(struct mtk_pcie *pcie, -+ struct mtk_pcie_port *port, -+ struct pci_bus *bus) -+{ -+ u32 val = 0; -+ -+ pcie_config_write(bus, -+ port->id << 3, -+ PCI_BASE_ADDRESS_0, 4, MEMORY_BASE); -+ -+ pcie_config_read(bus, -+ port->id << 3, PCI_BASE_ADDRESS_0, 4, &val); -+ -+ /* Configure RC Credit */ -+ pcie_config_read(bus, port->id << 3, 0x73c, 4, &val); -+ val &= ~(0x9fff) << 16; -+ val |= 0x806c << 16; -+ pcie_config_write(bus, port->id << 3, 0x73c, 4, val); -+ -+ /* Configure RC FTS number */ -+ pcie_config_read(bus, port->id << 3, 0x70c, 4, &val); -+ val &= ~(0xff3) << 8; -+ val |= 0x50 << 8; -+ pcie_config_write(bus, port->id << 3, 0x70c, 4, val); -+} -+ -+static int mtk_pcie_preinit(struct mtk_pcie *pcie) -+{ -+ struct mtk_pcie_port *port; -+ u32 val = 0; -+ struct pci_bus bus; -+ struct pci_sys_data sys; -+ -+ memset(&bus, 0, sizeof(bus)); -+ memset(&sys, 0, sizeof(sys)); -+ bus.sysdata = (void *)&sys; -+ sys.private_data = (void *)pcie; -+ -+ pcibios_min_io = 0; -+ pcibios_min_mem = 0; -+ -+ /* The PHY on Port 2 is shared with USB */ -+ if (pcie->port[2].enable) -+ regmap_update_bits(pcie->hifsys, HIFSYS_SYSCFG1, -+ HIFSYS_SYSCFG1_PHY2_MASK, 0x0); -+ -+ /* PCIe RC Reset */ -+ mtk_foreach_port(pcie, port) -+ if (port->enable) -+ reset_control_assert(port->rstc); -+ usleep_range(1000, 2000); -+ mtk_foreach_port(pcie, port) -+ if (port->enable) -+ reset_control_deassert(port->rstc); -+ usleep_range(1000, 2000); -+ -+ /* Configure PCIe PHY */ -+ mtk_foreach_port(pcie, port) -+ if (port->enable) -+ mtk_pcie_configure_phy(pcie, port); -+ -+ /* PCIe EP reset */ -+ val = 0; -+ mtk_foreach_port(pcie, port) -+ if (port->enable) -+ val |= mtk_pcie_port_data[port->id].perst_n; -+ pcie_w32(pcie, pcie_r32(pcie, PCICFG) | val, PCICFG); -+ usleep_range(1000, 2000); -+ pcie_w32(pcie, pcie_r32(pcie, PCICFG) & ~val, PCICFG); -+ usleep_range(1000, 2000); -+ msleep(100); -+ -+ /* check the link status */ -+ val = 0; -+ mtk_foreach_port(pcie, port) { -+ if (port->enable) { -+ u32 base = mtk_pcie_port_data[port->id].base; -+ -+ if ((pcie_r32(pcie, base + PCIE_SISTAT) & 0x1)) -+ port->link = 1; -+ else -+ reset_control_assert(port->rstc); -+ } -+ } -+ -+ mtk_foreach_port(pcie, port) -+ if (port->link) -+ pcie->pcie_card_link++; -+ -+ if (!pcie->pcie_card_link) -+ return -ENODEV; -+ -+ pcie_w32(pcie, pcie->mem_bus_addr, MEMBASE); -+ pcie_w32(pcie, pcie->io_bus_addr, IOBASE); -+ -+ mtk_foreach_port(pcie, port) { -+ if (port->link) { -+ u32 base = mtk_pcie_port_data[port->id].base; -+ u32 inte = mtk_pcie_port_data[port->id].interrupt_en; -+ -+ pcie_m32(pcie, 0, inte, PCIENA); -+ pcie_w32(pcie, 0x7fff0001, base + BAR0SETUP); -+ pcie_w32(pcie, MEMORY_BASE, base + IMBASEBAR0); -+ pcie_w32(pcie, 0x06040001, base + PCIE_CLASS); -+ } -+ } -+ -+ mtk_foreach_port(pcie, port) -+ if (port->link) -+ mtk_pcie_configure_rc(pcie, port, &bus); -+ -+ return 0; -+} -+ -+static int mtk_pcie_parse_dt(struct mtk_pcie *pcie) -+{ -+ struct device_node *np = pcie->dev->of_node, *port; -+ struct of_pci_range_parser parser; -+ struct of_pci_range range; -+ struct resource res; -+ int err; -+ -+ pcie->hifsys = syscon_regmap_lookup_by_phandle(np, "mediatek,hifsys"); -+ if (IS_ERR(pcie->hifsys)) { -+ dev_err(pcie->dev, "missing \"mediatek,hifsys\" phandle\n"); -+ return PTR_ERR(pcie->hifsys); -+ } -+ -+ if (of_pci_range_parser_init(&parser, np)) { -+ dev_err(pcie->dev, "missing \"ranges\" property\n"); -+ return -EINVAL; -+ } -+ -+ for_each_of_pci_range(&parser, &range) { -+ err = of_pci_range_to_resource(&range, np, &res); -+ if (err < 0) { -+ dev_err(pcie->dev, "failed to read resource range\n"); -+ return err; -+ } -+ -+ switch (res.flags & IORESOURCE_TYPE_BITS) { -+ case IORESOURCE_IO: -+ memcpy(&pcie->pio, &res, sizeof(res)); -+ pcie->pio.start = (resource_size_t)range.pci_addr; -+ pcie->pio.end = (resource_size_t) -+ (range.pci_addr + range.size - 1); -+ pcie->io_bus_addr = (resource_size_t)range.cpu_addr; -+ break; -+ -+ case IORESOURCE_MEM: -+ if (res.flags & IORESOURCE_PREFETCH) { -+ memcpy(&pcie->prefetch, &res, sizeof(res)); -+ pcie->prefetch.name = "prefetchable"; -+ pcie->prefetch.start = -+ (resource_size_t)range.pci_addr; -+ pcie->prefetch.end = (resource_size_t) -+ (range.pci_addr + range.size - 1); -+ } else { -+ memcpy(&pcie->mem, &res, sizeof(res)); -+ pcie->mem.name = "non-prefetchable"; -+ pcie->mem.start = (resource_size_t) -+ range.pci_addr; -+ pcie->prefetch.end = (resource_size_t) -+ (range.pci_addr + range.size - 1); -+ pcie->mem_bus_addr = (resource_size_t) -+ range.cpu_addr; -+ } -+ break; -+ } -+ } -+ -+ err = of_pci_parse_bus_range(np, &pcie->busn); -+ if (err < 0) { -+ dev_err(pcie->dev, "failed to parse ranges property: %d\n", -+ err); -+ pcie->busn.name = np->name; -+ pcie->busn.start = 0; -+ pcie->busn.end = 0xff; -+ pcie->busn.flags = IORESOURCE_BUS; -+ } -+ -+ /* parse root ports */ -+ for_each_child_of_node(np, port) { -+ unsigned int index; -+ char rst[] = "pcie0"; -+ -+ err = of_pci_get_devfn(port); -+ if (err < 0) { -+ dev_err(pcie->dev, "failed to parse address: %d\n", -+ err); -+ return err; -+ } -+ -+ index = PCI_SLOT(err); -+ if (index > MAX_PORT_NUM) { -+ dev_err(pcie->dev, "invalid port number: %d\n", index); -+ continue; -+ } -+ index--; -+ pcie->port[index].id = index; -+ -+ if (!of_device_is_available(port)) -+ continue; -+ -+ rst[4] += index; -+ pcie->port[index].rstc = devm_reset_control_get(pcie->dev, -+ rst); -+ if (!IS_ERR(pcie->port[index].rstc)) -+ pcie->port[index].enable = 1; -+ } -+ return 0; -+} -+ -+static int mtk_pcie_get_resources(struct mtk_pcie *pcie) -+{ -+ struct platform_device *pdev = to_platform_device(pcie->dev); -+ struct mtk_pcie_port *port; -+ struct resource *res; -+ -+ pcie->clk = devm_clk_get(&pdev->dev, "pcie"); -+ if (IS_ERR(pcie->clk)) { -+ dev_err(&pdev->dev, "Failed to get pcie clk\n"); -+ return PTR_ERR(pcie->clk); -+ } -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ pcie->pcie_base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(pcie->pcie_base)) { -+ dev_err(&pdev->dev, "Failed to get pcie range\n"); -+ return PTR_ERR(pcie->pcie_base); -+ } -+ -+ mtk_foreach_port(pcie, port) { -+ if (!port->enable) -+ continue; -+ res = platform_get_resource(pdev, IORESOURCE_MEM, port->id + 1); -+ port->phy_base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(port->phy_base)) { -+ dev_err(&pdev->dev, "Failed to get pcie phy%d range %p\n", -+ port->id, port->phy_base); -+ return PTR_ERR(port->phy_base); -+ } -+ port->irq = platform_get_irq(pdev, port->id); -+ } -+ -+ return clk_prepare_enable(pcie->clk); -+} -+ -+static int mtk_pcie_probe(struct platform_device *pdev) -+{ -+ struct mtk_pcie *pcie; -+ struct hw_pci hw; -+ int ret; -+ -+ pcie = devm_kzalloc(&pdev->dev, sizeof(*pcie), GFP_KERNEL); -+ if (!pcie) -+ return -ENOMEM; -+ -+ pcie->dev = &pdev->dev; -+ ret = mtk_pcie_parse_dt(pcie); -+ if (ret < 0) -+ return ret; -+ -+ pm_runtime_enable(&pdev->dev); -+ pm_runtime_get_sync(&pdev->dev); -+ -+ ret = mtk_pcie_get_resources(pcie); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "failed to request resources: %d\n", ret); -+ goto err_out; -+ } -+ -+ ret = mtk_pcie_preinit(pcie); -+ if (ret) -+ return ret; -+ -+ memset(&hw, 0, sizeof(hw)); -+ hw.nr_controllers = 1; -+ hw.private_data = (void **)&pcie; -+ hw.setup = mtk_pcie_setup; -+ hw.map_irq = mtk_pcie_map_irq; -+ hw.scan = mtk_pcie_scan_bus; -+ -+ pci_common_init_dev(pcie->dev, &hw); -+ platform_set_drvdata(pdev, pcie); -+ -+ return 0; -+ -+err_out: -+ clk_disable_unprepare(pcie->clk); -+ pm_runtime_put_sync(&pdev->dev); -+ pm_runtime_disable(&pdev->dev); -+ -+ return ret; -+} -+ -+static const struct of_device_id mtk_pcie_ids[] = { -+ { .compatible = "mediatek,mt2701-pcie" }, -+ { .compatible = "mediatek,mt7623-pcie" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, mtk_pcie_ids); -+ -+static struct platform_driver mtk_pcie_driver = { -+ .probe = mtk_pcie_probe, -+ .driver = { -+ .name = "mediatek-pcie", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(mtk_pcie_ids), -+ }, -+}; -+ -+static int __init mtk_pcie_init(void) -+{ -+ return platform_driver_register(&mtk_pcie_driver); -+} -+ -+module_init(mtk_pcie_init); diff --git a/target/linux/mediatek/patches-4.9/0004-soc-mediatek-Add-MT2701-power-dt-bindings.patch b/target/linux/mediatek/patches-4.9/0004-soc-mediatek-Add-MT2701-power-dt-bindings.patch deleted file mode 100644 index 8d91b121d..000000000 --- a/target/linux/mediatek/patches-4.9/0004-soc-mediatek-Add-MT2701-power-dt-bindings.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 2f47c01fe3015f4c649849ddffe04f12a122abe2 Mon Sep 17 00:00:00 2001 -From: Shunli Wang -Date: Thu, 20 Oct 2016 16:56:37 +0800 -Subject: [PATCH 04/57] soc: mediatek: Add MT2701 power dt-bindings - -Add power dt-bindings for MT2701. - -Signed-off-by: Shunli Wang -Signed-off-by: James Liao -Acked-by: Rob Herring -Reviewed-by: Kevin Hilman -Signed-off-by: Matthias Brugger ---- - .../devicetree/bindings/soc/mediatek/scpsys.txt | 13 ++++++----- - include/dt-bindings/power/mt2701-power.h | 26 ++++++++++++++++++++++ - 2 files changed, 34 insertions(+), 5 deletions(-) - create mode 100644 include/dt-bindings/power/mt2701-power.h - ---- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt -+++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt -@@ -9,17 +9,20 @@ domain control. - - The driver implements the Generic PM domain bindings described in - power/power_domain.txt. It provides the power domains defined in --include/dt-bindings/power/mt8173-power.h. -+include/dt-bindings/power/mt8173-power.h and mt2701-power.h. - - Required properties: --- compatible: Must be "mediatek,mt8173-scpsys" -+- compatible: Should be one of: -+ - "mediatek,mt2701-scpsys" -+ - "mediatek,mt8173-scpsys" - - #power-domain-cells: Must be 1 - - reg: Address range of the SCPSYS unit - - infracfg: must contain a phandle to the infracfg controller - - clock, clock-names: clocks according to the common clock binding. -- The clocks needed "mm", "mfg", "venc" and "venc_lt". -- These are the clocks which hardware needs to be enabled -- before enabling certain power domains. -+ These are clocks which hardware needs to be -+ enabled before enabling certain power domains. -+ Required clocks for MT2701: "mm", "mfg", "ethif" -+ Required clocks for MT8173: "mm", "mfg", "venc", "venc_lt" - - Optional properties: - - vdec-supply: Power supply for the vdec power domain ---- /dev/null -+++ b/include/dt-bindings/power/mt2701-power.h -@@ -0,0 +1,26 @@ -+/* -+ * Copyright (C) 2015 MediaTek Inc. -+ * -+ * This program is free software: you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef _DT_BINDINGS_POWER_MT2701_POWER_H -+#define _DT_BINDINGS_POWER_MT2701_POWER_H -+ -+#define MT2701_POWER_DOMAIN_CONN 0 -+#define MT2701_POWER_DOMAIN_DISP 1 -+#define MT2701_POWER_DOMAIN_IFR_MSC 2 -+#define MT2701_POWER_DOMAIN_VDEC 3 -+#define MT2701_POWER_DOMAIN_ISP 4 -+#define MT2701_POWER_DOMAIN_BDP 5 -+#define MT2701_POWER_DOMAIN_ETH 6 -+#define MT2701_POWER_DOMAIN_HIF 7 -+ -+#endif /* _DT_BINDINGS_POWER_MT2701_POWER_H */ diff --git a/target/linux/mediatek/patches-4.9/0005-clk-mediatek-Add-MT2701-clock-support.patch b/target/linux/mediatek/patches-4.9/0005-clk-mediatek-Add-MT2701-clock-support.patch deleted file mode 100644 index ef40ba234..000000000 --- a/target/linux/mediatek/patches-4.9/0005-clk-mediatek-Add-MT2701-clock-support.patch +++ /dev/null @@ -1,1431 +0,0 @@ -From f76b34c799d87ab241432b1241f6fc6d9db3ecb6 Mon Sep 17 00:00:00 2001 -From: Shunli Wang -Date: Tue, 5 Jan 2016 14:30:20 +0800 -Subject: [PATCH 05/57] clk: mediatek: Add MT2701 clock support - -Add MT2701 clock support, include topckgen, apmixedsys, -infracfg, pericfg and subsystem clocks. - -Signed-off-by: Shunli Wang -Signed-off-by: James Liao ---- - drivers/clk/mediatek/Kconfig | 8 + - drivers/clk/mediatek/Makefile | 1 + - drivers/clk/mediatek/clk-gate.c | 56 ++ - drivers/clk/mediatek/clk-gate.h | 2 + - drivers/clk/mediatek/clk-mt2701.c | 1210 +++++++++++++++++++++++++++++++++++++ - drivers/clk/mediatek/clk-mtk.c | 25 + - drivers/clk/mediatek/clk-mtk.h | 35 +- - 7 files changed, 1334 insertions(+), 3 deletions(-) - create mode 100644 drivers/clk/mediatek/clk-mt2701.c - ---- a/drivers/clk/mediatek/Kconfig -+++ b/drivers/clk/mediatek/Kconfig -@@ -6,6 +6,14 @@ config COMMON_CLK_MEDIATEK - ---help--- - Mediatek SoCs' clock support. - -+config COMMON_CLK_MT2701 -+ bool "Clock driver for Mediatek MT2701 and MT7623" -+ depends on COMMON_CLK -+ select COMMON_CLK_MEDIATEK -+ default ARCH_MEDIATEK -+ ---help--- -+ This driver supports Mediatek MT2701 and MT7623 clocks. -+ - config COMMON_CLK_MT8135 - bool "Clock driver for Mediatek MT8135" - depends on ARCH_MEDIATEK || COMPILE_TEST ---- a/drivers/clk/mediatek/Makefile -+++ b/drivers/clk/mediatek/Makefile -@@ -1,4 +1,5 @@ - obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o - obj-$(CONFIG_RESET_CONTROLLER) += reset.o -+obj-$(CONFIG_COMMON_CLK_MT2701) += clk-mt2701.o - obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135.o - obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173.o ---- a/drivers/clk/mediatek/clk-gate.c -+++ b/drivers/clk/mediatek/clk-gate.c -@@ -61,6 +61,26 @@ static void mtk_cg_clr_bit(struct clk_hw - regmap_write(cg->regmap, cg->clr_ofs, BIT(cg->bit)); - } - -+static void mtk_cg_set_bit_no_setclr(struct clk_hw *hw) -+{ -+ struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); -+ u32 val; -+ -+ regmap_read(cg->regmap, cg->sta_ofs, &val); -+ val |= BIT(cg->bit); -+ regmap_write(cg->regmap, cg->sta_ofs, val); -+} -+ -+static void mtk_cg_clr_bit_no_setclr(struct clk_hw *hw) -+{ -+ struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); -+ u32 val; -+ -+ regmap_read(cg->regmap, cg->sta_ofs, &val); -+ val &= ~(BIT(cg->bit)); -+ regmap_write(cg->regmap, cg->sta_ofs, val); -+} -+ - static int mtk_cg_enable(struct clk_hw *hw) - { - mtk_cg_clr_bit(hw); -@@ -85,6 +105,30 @@ static void mtk_cg_disable_inv(struct cl - mtk_cg_clr_bit(hw); - } - -+static int mtk_cg_enable_no_setclr(struct clk_hw *hw) -+{ -+ mtk_cg_clr_bit_no_setclr(hw); -+ -+ return 0; -+} -+ -+static void mtk_cg_disable_no_setclr(struct clk_hw *hw) -+{ -+ mtk_cg_set_bit_no_setclr(hw); -+} -+ -+static int mtk_cg_enable_inv_no_setclr(struct clk_hw *hw) -+{ -+ mtk_cg_set_bit_no_setclr(hw); -+ -+ return 0; -+} -+ -+static void mtk_cg_disable_inv_no_setclr(struct clk_hw *hw) -+{ -+ mtk_cg_clr_bit_no_setclr(hw); -+} -+ - const struct clk_ops mtk_clk_gate_ops_setclr = { - .is_enabled = mtk_cg_bit_is_cleared, - .enable = mtk_cg_enable, -@@ -97,6 +141,18 @@ const struct clk_ops mtk_clk_gate_ops_se - .disable = mtk_cg_disable_inv, - }; - -+const struct clk_ops mtk_clk_gate_ops_no_setclr = { -+ .is_enabled = mtk_cg_bit_is_cleared, -+ .enable = mtk_cg_enable_no_setclr, -+ .disable = mtk_cg_disable_no_setclr, -+}; -+ -+const struct clk_ops mtk_clk_gate_ops_no_setclr_inv = { -+ .is_enabled = mtk_cg_bit_is_set, -+ .enable = mtk_cg_enable_inv_no_setclr, -+ .disable = mtk_cg_disable_inv_no_setclr, -+}; -+ - struct clk *mtk_clk_register_gate( - const char *name, - const char *parent_name, ---- a/drivers/clk/mediatek/clk-gate.h -+++ b/drivers/clk/mediatek/clk-gate.h -@@ -36,6 +36,8 @@ static inline struct mtk_clk_gate *to_mt - - extern const struct clk_ops mtk_clk_gate_ops_setclr; - extern const struct clk_ops mtk_clk_gate_ops_setclr_inv; -+extern const struct clk_ops mtk_clk_gate_ops_no_setclr; -+extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv; - - struct clk *mtk_clk_register_gate( - const char *name, ---- /dev/null -+++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -0,0 +1,1210 @@ -+/* -+ * Copyright (c) 2014 MediaTek Inc. -+ * Author: Shunli Wang -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+ -+#include "clk-mtk.h" -+#include "clk-gate.h" -+ -+#include -+ -+static DEFINE_SPINLOCK(lock); -+ -+static const struct mtk_fixed_clk top_fixed_clks[] __initconst = { -+ FIXED_CLK(CLK_TOP_DPI, "dpi_ck", "clk26m", 108 * MHZ), -+ FIXED_CLK(CLK_TOP_DMPLL, "dmpll_ck", "clk26m", 400 * MHZ), -+ FIXED_CLK(CLK_TOP_VENCPLL, "vencpll_ck", "clk26m", 295750000), -+ FIXED_CLK(CLK_TOP_HDMI_0_PIX340M, "hdmi_0_pix340m", "clk26m", 340 * MHZ), -+ FIXED_CLK(CLK_TOP_HDMI_0_DEEP340M, "hdmi_0_deep340m", "clk26m", 340 * MHZ), -+ FIXED_CLK(CLK_TOP_HDMI_0_PLL340M, "hdmi_0_pll340m", "clk26m", 340 * MHZ), -+ FIXED_CLK(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_dig_cts", "clk26m", 300 * MHZ), -+ FIXED_CLK(CLK_TOP_HADDS2_FB, "hadds2_fbclk", "clk26m", 27 * MHZ), -+ FIXED_CLK(CLK_TOP_WBG_DIG_416M, "wbg_dig_ck_416m", "clk26m", 416 * MHZ), -+}; -+ -+static const struct mtk_fixed_factor top_fixed_divs[] __initconst = { -+ FACTOR(CLK_TOP_SYSPLL, "syspll_ck", "mainpll", 1, 1), -+ FACTOR(CLK_TOP_SYSPLL_D2, "syspll_d2", "mainpll", 1, 2), -+ FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3), -+ FACTOR(CLK_TOP_SYSPLL_D5, "syspll_d5", "mainpll", 1, 5), -+ FACTOR(CLK_TOP_SYSPLL_D7, "syspll_d7", "mainpll", 1, 7), -+ FACTOR(CLK_TOP_SYSPLL1_D2, "syspll1_d2", "syspll_d2", 1, 2), -+ FACTOR(CLK_TOP_SYSPLL1_D4, "syspll1_d4", "syspll_d2", 1, 4), -+ FACTOR(CLK_TOP_SYSPLL1_D8, "syspll1_d8", "syspll_d2", 1, 8), -+ FACTOR(CLK_TOP_SYSPLL1_D16, "syspll1_d16", "syspll_d2", 1, 16), -+ FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2), -+ FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1, 4), -+ FACTOR(CLK_TOP_SYSPLL2_D8, "syspll2_d8", "syspll_d3", 1, 8), -+ FACTOR(CLK_TOP_SYSPLL3_D2, "syspll3_d2", "syspll_d5", 1, 2), -+ FACTOR(CLK_TOP_SYSPLL3_D4, "syspll3_d4", "syspll_d5", 1, 4), -+ FACTOR(CLK_TOP_SYSPLL4_D2, "syspll4_d2", "syspll_d7", 1, 2), -+ FACTOR(CLK_TOP_SYSPLL4_D4, "syspll4_d4", "syspll_d7", 1, 4), -+ -+ FACTOR(CLK_TOP_UNIVPLL, "univpll_ck", "univpll", 1, 1), -+ FACTOR(CLK_TOP_UNIVPLL_D2, "univpll_d2", "univpll", 1, 2), -+ FACTOR(CLK_TOP_UNIVPLL_D3, "univpll_d3", "univpll", 1, 3), -+ FACTOR(CLK_TOP_UNIVPLL_D5, "univpll_d5", "univpll", 1, 5), -+ FACTOR(CLK_TOP_UNIVPLL_D7, "univpll_d7", "univpll", 1, 7), -+ FACTOR(CLK_TOP_UNIVPLL_D26, "univpll_d26", "univpll", 1, 26), -+ FACTOR(CLK_TOP_UNIVPLL_D52, "univpll_d52", "univpll", 1, 52), -+ FACTOR(CLK_TOP_UNIVPLL_D108, "univpll_d108", "univpll", 1, 108), -+ FACTOR(CLK_TOP_USB_PHY48M, "USB_PHY48M_CK", "univpll", 1, 26), -+ FACTOR(CLK_TOP_UNIVPLL1_D2, "univpll1_d2", "univpll_d2", 1, 2), -+ FACTOR(CLK_TOP_UNIVPLL1_D4, "univpll1_d4", "univpll_d2", 1, 4), -+ FACTOR(CLK_TOP_UNIVPLL1_D8, "univpll1_d8", "univpll_d2", 1, 8), -+ FACTOR(CLK_TOP_8BDAC, "8bdac_ck", "univpll_d2", 1, 1), -+ FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univpll_d3", 1, 2), -+ FACTOR(CLK_TOP_UNIVPLL2_D4, "univpll2_d4", "univpll_d3", 1, 4), -+ FACTOR(CLK_TOP_UNIVPLL2_D8, "univpll2_d8", "univpll_d3", 1, 8), -+ FACTOR(CLK_TOP_UNIVPLL2_D16, "univpll2_d16", "univpll_d3", 1, 16), -+ FACTOR(CLK_TOP_UNIVPLL2_D32, "univpll2_d32", "univpll_d3", 1, 32), -+ FACTOR(CLK_TOP_UNIVPLL3_D2, "univpll3_d2", "univpll_d5", 1, 2), -+ FACTOR(CLK_TOP_UNIVPLL3_D4, "univpll3_d4", "univpll_d5", 1, 4), -+ FACTOR(CLK_TOP_UNIVPLL3_D8, "univpll3_d8", "univpll_d5", 1, 8), -+ -+ FACTOR(CLK_TOP_MSDCPLL, "msdcpll_ck", "msdcpll", 1, 1), -+ FACTOR(CLK_TOP_MSDCPLL_D2, "msdcpll_d2", "msdcpll", 1, 2), -+ FACTOR(CLK_TOP_MSDCPLL_D4, "msdcpll_d4", "msdcpll", 1, 4), -+ FACTOR(CLK_TOP_MSDCPLL_D8, "msdcpll_d8", "msdcpll", 1, 8), -+ -+ FACTOR(CLK_TOP_MMPLL, "mmpll_ck", "mmpll", 1, 1), -+ FACTOR(CLK_TOP_MMPLL_D2, "mmpll_d2", "mmpll", 1, 2), -+ -+ FACTOR(CLK_TOP_DMPLL_D2, "dmpll_d2", "dmpll_ck", 1, 2), -+ FACTOR(CLK_TOP_DMPLL_D4, "dmpll_d4", "dmpll_ck", 1, 4), -+ FACTOR(CLK_TOP_DMPLL_X2, "dmpll_x2", "dmpll_ck", 1, 1), -+ -+ FACTOR(CLK_TOP_TVDPLL, "tvdpll_ck", "tvdpll", 1, 1), -+ FACTOR(CLK_TOP_TVDPLL_D2, "tvdpll_d2", "tvdpll", 1, 2), -+ FACTOR(CLK_TOP_TVDPLL_D4, "tvdpll_d4", "tvdpll", 1, 4), -+ -+ FACTOR(CLK_TOP_VDECPLL, "vdecpll_ck", "vdecpll", 1, 1), -+ FACTOR(CLK_TOP_TVD2PLL, "tvd2pll_ck", "tvd2pll", 1, 1), -+ FACTOR(CLK_TOP_TVD2PLL_D2, "tvd2pll_d2", "tvd2pll", 1, 2), -+ -+ FACTOR(CLK_TOP_MIPIPLL, "mipipll", "dpi_ck", 1, 1), -+ FACTOR(CLK_TOP_MIPIPLL_D2, "mipipll_d2", "dpi_ck", 1, 2), -+ FACTOR(CLK_TOP_MIPIPLL_D4, "mipipll_d4", "dpi_ck", 1, 4), -+ -+ FACTOR(CLK_TOP_HDMIPLL, "hdmipll_ck", "hdmitx_dig_cts", 1, 1), -+ FACTOR(CLK_TOP_HDMIPLL_D2, "hdmipll_d2", "hdmitx_dig_cts", 1, 2), -+ FACTOR(CLK_TOP_HDMIPLL_D3, "hdmipll_d3", "hdmitx_dig_cts", 1, 3), -+ -+ FACTOR(CLK_TOP_ARMPLL_1P3G, "armpll_1p3g_ck", "armpll", 1, 1), -+ -+ FACTOR(CLK_TOP_AUDPLL, "audpll", "audpll_sel", 1, 1), -+ FACTOR(CLK_TOP_AUDPLL_D4, "audpll_d4", "audpll_sel", 1, 4), -+ FACTOR(CLK_TOP_AUDPLL_D8, "audpll_d8", "audpll_sel", 1, 8), -+ FACTOR(CLK_TOP_AUDPLL_D16, "audpll_d16", "audpll_sel", 1, 16), -+ FACTOR(CLK_TOP_AUDPLL_D24, "audpll_d24", "audpll_sel", 1, 24), -+ -+ FACTOR(CLK_TOP_AUD1PLL_98M, "aud1pll_98m_ck", "aud1pll", 1, 3), -+ FACTOR(CLK_TOP_AUD2PLL_90M, "aud2pll_90m_ck", "aud2pll", 1, 3), -+ FACTOR(CLK_TOP_HADDS2PLL_98M, "hadds2pll_98m", "hadds2pll", 1, 3), -+ FACTOR(CLK_TOP_HADDS2PLL_294M, "hadds2pll_294m", "hadds2pll", 1, 1), -+ FACTOR(CLK_TOP_ETHPLL_500M, "ethpll_500m_ck", "ethpll", 1, 1), -+ FACTOR(CLK_TOP_CLK26M_D8, "clk26m_d8", "clk26m", 1, 8), -+ FACTOR(CLK_TOP_32K_INTERNAL, "32k_internal", "clk26m", 1, 793), -+ FACTOR(CLK_TOP_32K_EXTERNAL, "32k_external", "rtc32k", 1, 1), -+}; -+ -+static const char * const axi_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d2", -+ "syspll_d5", -+ "syspll1_d4", -+ "univpll_d5", -+ "univpll2_d2", -+ "mmpll_d2", -+ "dmpll_d2" -+}; -+ -+static const char * const mem_parents[] __initconst = { -+ "clk26m", -+ "dmpll_ck" -+}; -+ -+static const char * const ddrphycfg_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d8" -+}; -+ -+static const char * const mm_parents[] __initconst = { -+ "clk26m", -+ "vencpll_ck", -+ "syspll1_d2", -+ "syspll1_d4", -+ "univpll_d5", -+ "univpll1_d2", -+ "univpll2_d2", -+ "dmpll_ck" -+}; -+ -+static const char * const pwm_parents[] __initconst = { -+ "clk26m", -+ "univpll2_d4", -+ "univpll3_d2", -+ "univpll1_d4", -+}; -+ -+static const char * const vdec_parents[] __initconst = { -+ "clk26m", -+ "vdecpll_ck", -+ "syspll_d5", -+ "syspll1_d4", -+ "univpll_d5", -+ "univpll2_d2", -+ "vencpll_ck", -+ "msdcpll_d2", -+ "mmpll_d2" -+}; -+ -+static const char * const mfg_parents[] __initconst = { -+ "clk26m", -+ "mmpll_ck", -+ "dmpll_x2_ck", -+ "msdcpll_ck", -+ "clk26m", -+ "syspll_d3", -+ "univpll_d3", -+ "univpll1_d2" -+}; -+ -+static const char * const camtg_parents[] __initconst = { -+ "clk26m", -+ "univpll_d26", -+ "univpll2_d2", -+ "syspll3_d2", -+ "syspll3_d4", -+ "msdcpll_d2", -+ "mmpll_d2" -+}; -+ -+static const char * const uart_parents[] __initconst = { -+ "clk26m", -+ "univpll2_d8" -+}; -+ -+static const char * const spi_parents[] __initconst = { -+ "clk26m", -+ "syspll3_d2", -+ "syspll4_d2", -+ "univpll2_d4", -+ "univpll1_d8" -+}; -+ -+static const char * const usb20_parents[] __initconst = { -+ "clk26m", -+ "univpll1_d8", -+ "univpll3_d4" -+}; -+ -+static const char * const msdc30_parents[] __initconst = { -+ "clk26m", -+ "msdcpll_d2", -+ "syspll2_d2", -+ "syspll1_d4", -+ "univpll1_d4", -+ "univpll2_d4" -+}; -+ -+static const char * const audio_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d16" -+}; -+ -+static const char * const aud_intbus_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d4", -+ "syspll3_d2", -+ "syspll4_d2", -+ "univpll3_d2", -+ "univpll2_d4" -+}; -+ -+static const char * const pmicspi_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d8", -+ "syspll2_d4", -+ "syspll4_d2", -+ "syspll3_d4", -+ "syspll2_d8", -+ "syspll1_d16", -+ "univpll3_d4", -+ "univpll_d26", -+ "dmpll_d2", -+ "dmpll_d4" -+}; -+ -+static const char * const scp_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d8", -+ "dmpll_d2", -+ "dmpll_d4" -+}; -+ -+static const char * const dpi0_parents[] __initconst = { -+ "clk26m", -+ "mipipll", -+ "mipipll_d2", -+ "mipipll_d4", -+ "clk26m", -+ "tvdpll_ck", -+ "tvdpll_d2", -+ "tvdpll_d4" -+}; -+ -+static const char * const dpi1_parents[] __initconst = { -+ "clk26m", -+ "tvdpll_ck", -+ "tvdpll_d2", -+ "tvdpll_d4" -+}; -+ -+static const char * const tve_parents[] __initconst = { -+ "clk26m", -+ "mipipll", -+ "mipipll_d2", -+ "mipipll_d4", -+ "clk26m", -+ "tvdpll_ck", -+ "tvdpll_d2", -+ "tvdpll_d4" -+}; -+ -+static const char * const hdmi_parents[] __initconst = { -+ "clk26m", -+ "hdmipll_ck", -+ "hdmipll_d2", -+ "hdmipll_d3" -+}; -+ -+static const char * const apll_parents[] __initconst = { -+ "clk26m", -+ "audpll", -+ "audpll_d4", -+ "audpll_d8", -+ "audpll_d16", -+ "audpll_d24", -+ "clk26m", -+ "clk26m" -+}; -+ -+static const char * const rtc_parents[] __initconst = { -+ "32k_internal", -+ "32k_external", -+ "clk26m", -+ "univpll3_d8" -+}; -+ -+static const char * const nfi2x_parents[] __initconst = { -+ "clk26m", -+ "syspll2_d2", -+ "syspll_d7", -+ "univpll3_d2", -+ "syspll2_d4", -+ "univpll3_d4", -+ "syspll4_d4", -+ "clk26m" -+}; -+ -+static const char * const emmc_hclk_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d2", -+ "syspll1_d4", -+ "syspll2_d2" -+}; -+ -+static const char * const flash_parents[] __initconst = { -+ "clk26m_d8", -+ "clk26m", -+ "syspll2_d8", -+ "syspll3_d4", -+ "univpll3_d4", -+ "syspll4_d2", -+ "syspll2_d4", -+ "univpll2_d4" -+}; -+ -+static const char * const di_parents[] __initconst = { -+ "clk26m", -+ "tvd2pll_ck", -+ "tvd2pll_d2", -+ "clk26m" -+}; -+ -+static const char * const nr_osd_parents[] __initconst = { -+ "clk26m", -+ "vencpll_ck", -+ "syspll1_d2", -+ "syspll1_d4", -+ "univpll_d5", -+ "univpll1_d2", -+ "univpll2_d2", -+ "dmpll_ck" -+}; -+ -+static const char * const hdmirx_bist_parents[] __initconst = { -+ "clk26m", -+ "syspll_d3", -+ "clk26m", -+ "syspll1_d16", -+ "syspll4_d2", -+ "syspll1_d4", -+ "vencpll_ck", -+ "clk26m" -+}; -+ -+static const char * const intdir_parents[] __initconst = { -+ "clk26m", -+ "mmpll_ck", -+ "syspll_d2", -+ "univpll_d2" -+}; -+ -+static const char * const asm_parents[] __initconst = { -+ "clk26m", -+ "univpll2_d4", -+ "univpll2_d2", -+ "syspll_d5" -+}; -+ -+static const char * const ms_card_parents[] __initconst = { -+ "clk26m", -+ "univpll3_d8", -+ "syspll4_d4" -+}; -+ -+static const char * const ethif_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d2", -+ "syspll_d5", -+ "syspll1_d4", -+ "univpll_d5", -+ "univpll1_d2", -+ "dmpll_ck", -+ "dmpll_d2" -+}; -+ -+static const char * const hdmirx_parents[] __initconst = { -+ "clk26m", -+ "univpll_d52" -+}; -+ -+static const char * const cmsys_parents[] __initconst = { -+ "clk26m", -+ "syspll1_d2", -+ "univpll1_d2", -+ "univpll_d5", -+ "syspll_d5", -+ "syspll2_d2", -+ "syspll1_d4", -+ "syspll3_d2", -+ "syspll2_d4", -+ "syspll1_d8", -+ "clk26m", -+ "clk26m", -+ "clk26m", -+ "clk26m", -+ "clk26m" -+}; -+ -+static const char * const clk_8bdac_parents[] __initconst = { -+ "clkrtc_int", -+ "8bdac_ck_pre", -+ "clk26m", -+ "clk26m" -+}; -+ -+static const char * const aud2dvd_parents[] __initconst = { -+ "a1sys_hp_ck", -+ "a2sys_hp_ck" -+}; -+ -+static const char * const padmclk_parents[] __initconst = { -+ "clk26m", -+ "univpll_d26", -+ "univpll_d52", -+ "univpll_d108", -+ "univpll2_d8", -+ "univpll2_d16", -+ "univpll2_d32" -+}; -+ -+static const char * const aud_mux_parents[] __initconst = { -+ "clk26m", -+ "aud1pll_98m_ck", -+ "aud2pll_90m_ck", -+ "hadds2pll_98m", -+ "audio_ext1_ck", -+ "audio_ext2_ck" -+}; -+ -+static const char * const aud_src_parents[] __initconst = { -+ "aud_mux1_sel", -+ "aud_mux2_sel" -+}; -+ -+static const char * const cpu_parents[] __initconst = { -+ "clk26m", -+ "armpll", -+ "mainpll", -+ "mmpll" -+}; -+ -+static const struct mtk_composite top_muxes[] __initconst = { -+ MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, -+ 0x0040, 0, 3, INVALID_MUX_GATE_BIT), -+ MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents, 0x0040, 8, 1, 15), -+ MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents, 0x0040, 16, 1, 23), -+ MUX_GATE(CLK_TOP_MM_SEL, "mm_sel", mm_parents, 0x0040, 24, 3, 31), -+ -+ MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents, 0x0050, 0, 2, 7), -+ MUX_GATE(CLK_TOP_VDEC_SEL, "vdec_sel", vdec_parents, 0x0050, 8, 4, 15), -+ MUX_GATE(CLK_TOP_MFG_SEL, "mfg_sel", mfg_parents, 0x0050, 16, 3, 23), -+ MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x0050, 24, 3, 31), -+ MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents, 0x0060, 0, 1, 7), -+ -+ MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi_parents, 0x0060, 8, 3, 15), -+ MUX_GATE(CLK_TOP_USB20_SEL, "usb20_sel", usb20_parents, 0x0060, 16, 2, 23), -+ MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_parents, 0x0060, 24, 3, 31), -+ -+ MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_parents, 0x0070, 0, 3, 7), -+ MUX_GATE(CLK_TOP_MSDC30_2_SEL, "msdc30_2_sel", msdc30_parents, 0x0070, 8, 3, 15), -+ MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", msdc30_parents, 0x0070, 16, 1, 23), -+ MUX_GATE(CLK_TOP_AUDINTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, 0x0070, 24, 3, 31), -+ -+ MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x0080, 0, 4, 7), -+ MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents, 0x0080, 8, 2, 15), -+ MUX_GATE(CLK_TOP_DPI0_SEL, "dpi0_sel", dpi0_parents, 0x0080, 16, 3, 23), -+ MUX_GATE(CLK_TOP_DPI1_SEL, "dpi1_sel", dpi1_parents, 0x0080, 24, 2, 31), -+ -+ MUX_GATE(CLK_TOP_TVE_SEL, "tve_sel", tve_parents, 0x0090, 0, 3, 7), -+ MUX_GATE(CLK_TOP_HDMI_SEL, "hdmi_sel", hdmi_parents, 0x0090, 8, 2, 15), -+ MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel", apll_parents, 0x0090, 16, 3, 23), -+ -+ MUX_GATE(CLK_TOP_RTC_SEL, "rtc_sel", rtc_parents, 0x00A0, 0, 2, 7), -+ MUX_GATE(CLK_TOP_NFI2X_SEL, "nfi2x_sel", nfi2x_parents, 0x00A0, 8, 3, 15), -+ MUX_GATE(CLK_TOP_EMMC_HCLK_SEL, "emmc_hclk_sel", emmc_hclk_parents, 0x00A0, 24, 2, 31), -+ -+ MUX_GATE(CLK_TOP_FLASH_SEL, "flash_sel", flash_parents, 0x00B0, 0, 3, 7), -+ MUX_GATE(CLK_TOP_DI_SEL, "di_sel", di_parents, 0x00B0, 8, 2, 15), -+ MUX_GATE(CLK_TOP_NR_SEL, "nr_sel", nr_osd_parents, 0x00B0, 16, 3, 23), -+ MUX_GATE(CLK_TOP_OSD_SEL, "osd_sel", nr_osd_parents, 0x00B0, 24, 3, 31), -+ -+ MUX_GATE(CLK_TOP_HDMIRX_BIST_SEL, "hdmirx_bist_sel", hdmirx_bist_parents, 0x00C0, 0, 3, 7), -+ MUX_GATE(CLK_TOP_INTDIR_SEL, "intdir_sel", intdir_parents, 0x00C0, 8, 2, 15), -+ MUX_GATE(CLK_TOP_ASM_I_SEL, "asm_i_sel", asm_parents, 0x00C0, 16, 2, 23), -+ MUX_GATE(CLK_TOP_ASM_M_SEL, "asm_m_sel", asm_parents, 0x00C0, 24, 3, 31), -+ -+ MUX_GATE(CLK_TOP_ASM_H_SEL, "asm_h_sel", asm_parents, 0x00D0, 0, 2, 7), -+ MUX_GATE(CLK_TOP_MS_CARD_SEL, "ms_card_sel", ms_card_parents, 0x00D0, 16, 2, 23), -+ MUX_GATE(CLK_TOP_ETHIF_SEL, "ethif_sel", ethif_parents, 0x00D0, 24, 3, 31), -+ -+ MUX_GATE(CLK_TOP_HDMIRX26_24_SEL, "hdmirx26_24_sel", hdmirx_parents, 0x00E0, 0, 1, 7), -+ MUX_GATE(CLK_TOP_MSDC30_3_SEL, "msdc30_3_sel", msdc30_parents, 0x00E0, 8, 3, 15), -+ MUX_GATE(CLK_TOP_CMSYS_SEL, "cmsys_sel", cmsys_parents, 0x00E0, 16, 4, 23), -+ -+ MUX_GATE(CLK_TOP_SPI1_SEL, "spi2_sel", spi_parents, 0x00E0, 24, 3, 31), -+ MUX_GATE(CLK_TOP_SPI2_SEL, "spi1_sel", spi_parents, 0x00F0, 0, 3, 7), -+ MUX_GATE(CLK_TOP_8BDAC_SEL, "8bdac_sel", clk_8bdac_parents, 0x00F0, 8, 2, 15), -+ MUX_GATE(CLK_TOP_AUD2DVD_SEL, "aud2dvd_sel", aud2dvd_parents, 0x00F0, 16, 1, 23), -+ -+ MUX(CLK_TOP_PADMCLK_SEL, "padmclk_sel", padmclk_parents, 0x0100, 0, 3), -+ -+ MUX(CLK_TOP_AUD_MUX1_SEL, "aud_mux1_sel", aud_mux_parents, 0x012c, 0, 3), -+ MUX(CLK_TOP_AUD_MUX2_SEL, "aud_mux2_sel", aud_mux_parents, 0x012c, 3, 3), -+ MUX(CLK_TOP_AUDPLL_MUX_SEL, "audpll_sel", aud_mux_parents, 0x012c, 6, 3), -+ MUX_GATE(CLK_TOP_AUD_K1_SRC_SEL, "aud_k1_src_sel", aud_src_parents, 0x012c, 15, 1, 23), -+ MUX_GATE(CLK_TOP_AUD_K2_SRC_SEL, "aud_k2_src_sel", aud_src_parents, 0x012c, 16, 1, 24), -+ MUX_GATE(CLK_TOP_AUD_K3_SRC_SEL, "aud_k3_src_sel", aud_src_parents, 0x012c, 17, 1, 25), -+ MUX_GATE(CLK_TOP_AUD_K4_SRC_SEL, "aud_k4_src_sel", aud_src_parents, 0x012c, 18, 1, 26), -+ MUX_GATE(CLK_TOP_AUD_K5_SRC_SEL, "aud_k5_src_sel", aud_src_parents, 0x012c, 19, 1, 27), -+ MUX_GATE(CLK_TOP_AUD_K6_SRC_SEL, "aud_k6_src_sel", aud_src_parents, 0x012c, 20, 1, 28), -+}; -+ -+static const struct mtk_clk_divider top_adj_divs[] __initconst = { -+ DIV_ADJ(CLK_TOP_AUD_EXTCK1_DIV, "audio_ext1_ck", "aud_ext_ck1", 0x0120, 0, 8), -+ DIV_ADJ(CLK_TOP_AUD_EXTCK2_DIV, "audio_ext2_ck", "aud_ext_ck2", 0x0120, 8, 8), -+ DIV_ADJ(CLK_TOP_AUD_MUX1_DIV, "aud_mux1_div", "aud_mux1_sel", 0x0120, 16, 8), -+ DIV_ADJ(CLK_TOP_AUD_MUX2_DIV, "aud_mux2_div", "aud_mux2_sel", 0x0120, 24, 8), -+ DIV_ADJ(CLK_TOP_AUD_K1_SRC_DIV, "aud_k1_src_div", "aud_k1_src_sel", 0x0124, 0, 8), -+ DIV_ADJ(CLK_TOP_AUD_K2_SRC_DIV, "aud_k2_src_div", "aud_k2_src_sel", 0x0124, 8, 8), -+ DIV_ADJ(CLK_TOP_AUD_K3_SRC_DIV, "aud_k3_src_div", "aud_k3_src_sel", 0x0124, 16, 8), -+ DIV_ADJ(CLK_TOP_AUD_K4_SRC_DIV, "aud_k4_src_div", "aud_k4_src_sel", 0x0124, 24, 8), -+ DIV_ADJ(CLK_TOP_AUD_K5_SRC_DIV, "aud_k5_src_div", "aud_k5_src_sel", 0x0128, 0, 8), -+ DIV_ADJ(CLK_TOP_AUD_K6_SRC_DIV, "aud_k6_src_div", "aud_k6_src_sel", 0x0128, 8, 8), -+}; -+ -+static const struct mtk_gate_regs top_aud_cg_regs __initconst = { -+ .sta_ofs = 0x012C, -+}; -+ -+#define GATE_TOP_AUD(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &top_aud_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr, \ -+ } -+ -+static const struct mtk_gate top_clks[] __initconst = { -+ GATE_TOP_AUD(CLK_TOP_AUD_48K_TIMING, "a1sys_hp_ck", "aud_mux1_div", 21), -+ GATE_TOP_AUD(CLK_TOP_AUD_44K_TIMING, "a2sys_hp_ck", "aud_mux2_div", 22), -+ GATE_TOP_AUD(CLK_TOP_AUD_I2S1_MCLK, "aud_i2s1_mclk", "aud_k1_src_div", 23), -+ GATE_TOP_AUD(CLK_TOP_AUD_I2S2_MCLK, "aud_i2s2_mclk", "aud_k2_src_div", 24), -+ GATE_TOP_AUD(CLK_TOP_AUD_I2S3_MCLK, "aud_i2s3_mclk", "aud_k3_src_div", 25), -+ GATE_TOP_AUD(CLK_TOP_AUD_I2S4_MCLK, "aud_i2s4_mclk", "aud_k4_src_div", 26), -+ GATE_TOP_AUD(CLK_TOP_AUD_I2S5_MCLK, "aud_i2s5_mclk", "aud_k5_src_div", 27), -+ GATE_TOP_AUD(CLK_TOP_AUD_I2S6_MCLK, "aud_i2s6_mclk", "aud_k6_src_div", 28), -+}; -+ -+static void __init mtk_topckgen_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ void __iomem *base; -+ int r; -+ -+ base = of_iomap(node, 0); -+ if (!base) { -+ pr_err("%s(): ioremap failed\n", __func__); -+ return; -+ } -+ -+ clk_data = mtk_alloc_clk_data(CLK_TOP_NR); -+ -+ mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), -+ clk_data); -+ -+ mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs), -+ clk_data); -+ -+ mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), -+ base, &lock, clk_data); -+ -+ mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), -+ base, &lock, clk_data); -+ -+ mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt2701-topckgen", mtk_topckgen_init); -+ -+static const struct mtk_gate_regs infra_cg_regs __initconst = { -+ .set_ofs = 0x0040, -+ .clr_ofs = 0x0044, -+ .sta_ofs = 0x0048, -+}; -+ -+#define GATE_ICG(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &infra_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+static const struct mtk_gate infra_clks[] __initconst = { -+ GATE_ICG(CLK_INFRA_DBG, "dbgclk", "axi_sel", 0), -+ GATE_ICG(CLK_INFRA_SMI, "smi_ck", "mm_sel", 1), -+ GATE_ICG(CLK_INFRA_QAXI_CM4, "cm4_ck", "axi_sel", 2), -+ GATE_ICG(CLK_INFRA_AUD_SPLIN_B, "audio_splin_bck", "hadds2_294m_ck", 4), -+ GATE_ICG(CLK_INFRA_AUDIO, "audio_ck", "clk_null", 5), -+ GATE_ICG(CLK_INFRA_EFUSE, "efuse_ck", "clk26m", 6), -+ GATE_ICG(CLK_INFRA_L2C_SRAM, "l2c_sram_ck", "mm_sel", 7), -+ GATE_ICG(CLK_INFRA_M4U, "m4u_ck", "mem_sel", 8), -+ GATE_ICG(CLK_INFRA_CONNMCU, "connsys_bus", "wbg_dig_ck_416m", 12), -+ GATE_ICG(CLK_INFRA_TRNG, "trng_ck", "axi_sel", 13), -+ GATE_ICG(CLK_INFRA_RAMBUFIF, "rambufif_ck", "mem_sel", 14), -+ GATE_ICG(CLK_INFRA_CPUM, "cpum_ck", "mem_sel", 15), -+ GATE_ICG(CLK_INFRA_KP, "kp_ck", "axi_sel", 16), -+ GATE_ICG(CLK_INFRA_CEC, "cec_ck", "rtc_sel", 18), -+ GATE_ICG(CLK_INFRA_IRRX, "irrx_ck", "axi_sel", 19), -+ GATE_ICG(CLK_INFRA_PMICSPI, "pmicspi_ck", "pmicspi_sel", 22), -+ GATE_ICG(CLK_INFRA_PMICWRAP, "pmicwrap_ck", "axi_sel", 23), -+ GATE_ICG(CLK_INFRA_DDCCI, "ddcci_ck", "axi_sel", 24), -+}; -+ -+static const struct mtk_fixed_factor infra_fixed_divs[] __initconst = { -+ FACTOR(CLK_INFRA_CLK_13M, "clk13m", "clk26m", 1, 2), -+}; -+ -+static void __init mtk_infrasys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_INFRA_NR); -+ -+ mtk_clk_register_gates(node, infra_clks, ARRAY_SIZE(infra_clks), -+ clk_data); -+ mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init); -+ -+static const struct mtk_gate_regs peri0_cg_regs __initconst = { -+ .set_ofs = 0x0008, -+ .clr_ofs = 0x0010, -+ .sta_ofs = 0x0018, -+}; -+ -+static const struct mtk_gate_regs peri1_cg_regs __initconst = { -+ .set_ofs = 0x000c, -+ .clr_ofs = 0x0014, -+ .sta_ofs = 0x001c, -+}; -+ -+#define GATE_PERI0(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &peri0_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+#define GATE_PERI1(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &peri1_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+static const struct mtk_gate peri_clks[] __initconst = { -+ GATE_PERI1(CLK_PERI_USB0_MCU, "usb0_mcu_ck", "axi_sel", 31), -+ GATE_PERI1(CLK_PERI_ETH, "eth_ck", "clk26m", 30), -+ GATE_PERI1(CLK_PERI_SPI0, "spi0_ck", "spi0_sel", 29), -+ GATE_PERI1(CLK_PERI_AUXADC, "auxadc_ck", "clk26m", 28), -+ GATE_PERI0(CLK_PERI_I2C3, "i2c3_ck", "clk26m", 27), -+ GATE_PERI0(CLK_PERI_I2C2, "i2c2_ck", "axi_sel", 26), -+ GATE_PERI0(CLK_PERI_I2C1, "i2c1_ck", "axi_sel", 25), -+ GATE_PERI0(CLK_PERI_I2C0, "i2c0_ck", "axi_sel", 24), -+ GATE_PERI0(CLK_PERI_BTIF, "bitif_ck", "axi_sel", 23), -+ GATE_PERI0(CLK_PERI_UART3, "uart3_ck", "axi_sel", 22), -+ GATE_PERI0(CLK_PERI_UART2, "uart2_ck", "axi_sel", 21), -+ GATE_PERI0(CLK_PERI_UART1, "uart1_ck", "axi_sel", 20), -+ GATE_PERI0(CLK_PERI_UART0, "uart0_ck", "axi_sel", 19), -+ GATE_PERI0(CLK_PERI_NLI, "nli_ck", "axi_sel", 18), -+ GATE_PERI0(CLK_PERI_MSDC50_3, "msdc50_3_ck", "emmc_hclk_sel", 17), -+ GATE_PERI0(CLK_PERI_MSDC30_3, "msdc30_3_ck", "msdc30_3_sel", 16), -+ GATE_PERI0(CLK_PERI_MSDC30_2, "msdc30_2_ck", "msdc30_2_sel", 15), -+ GATE_PERI0(CLK_PERI_MSDC30_1, "msdc30_1_ck", "msdc30_1_sel", 14), -+ GATE_PERI0(CLK_PERI_MSDC30_0, "msdc30_0_ck", "msdc30_0_sel", 13), -+ GATE_PERI0(CLK_PERI_AP_DMA, "ap_dma_ck", "axi_sel", 12), -+ GATE_PERI0(CLK_PERI_USB1, "usb1_ck", "usb20_sel", 11), -+ GATE_PERI0(CLK_PERI_USB0, "usb0_ck", "usb20_sel", 10), -+ GATE_PERI0(CLK_PERI_PWM, "pwm_ck", "axi_sel", 9), -+ GATE_PERI0(CLK_PERI_PWM7, "pwm7_ck", "axi_sel", 8), -+ GATE_PERI0(CLK_PERI_PWM6, "pwm6_ck", "axi_sel", 7), -+ GATE_PERI0(CLK_PERI_PWM5, "pwm5_ck", "axi_sel", 6), -+ GATE_PERI0(CLK_PERI_PWM4, "pwm4_ck", "axi_sel", 5), -+ GATE_PERI0(CLK_PERI_PWM3, "pwm3_ck", "axi_sel", 4), -+ GATE_PERI0(CLK_PERI_PWM2, "pwm2_ck", "axi_sel", 3), -+ GATE_PERI0(CLK_PERI_PWM1, "pwm1_ck", "axi_sel", 2), -+ GATE_PERI0(CLK_PERI_THERM, "therm_ck", "axi_sel", 1), -+ GATE_PERI0(CLK_PERI_NFI, "nfi_ck", "nfi2x_sel", 0), -+ -+ GATE_PERI1(CLK_PERI_FCI, "fci_ck", "ms_card", 11), -+ GATE_PERI1(CLK_PERI_SPI2, "spi2_ck", "spi2_sel", 10), -+ GATE_PERI1(CLK_PERI_SPI1, "spi1_ck", "spi1_sel", 9), -+ GATE_PERI1(CLK_PERI_HOST89_DVD, "host89_dvd_ck", "aud2dvd_sel", 8), -+ GATE_PERI1(CLK_PERI_HOST89_SPI, "host89_spi_ck", "spi0_sel", 7), -+ GATE_PERI1(CLK_PERI_HOST89_INT, "host89_int_ck", "axi_sel", 6), -+ GATE_PERI1(CLK_PERI_FLASH, "flash_ck", "nfi2x_sel", 5), -+ GATE_PERI1(CLK_PERI_NFI_PAD, "nfi_pad_ck", "nfi_sel", 4), -+ GATE_PERI1(CLK_PERI_NFI_ECC, "nfi_ecc_ck", "nfi_sel", 3), -+ GATE_PERI1(CLK_PERI_GCPU, "gcpu_ck", "axi_sel", 2), -+ GATE_PERI1(CLK_PERI_USB_SLV, "usbslv_ck", "axi_sel", 1), -+ GATE_PERI1(CLK_PERI_USB1_MCU, "usb1_mcu_ck", "axi_sel", 0), -+}; -+ -+static const char * const uart_ck_sel_parents[] __initconst = { -+ "clk26m", -+ "uart_sel", -+}; -+ -+static const struct mtk_composite peri_muxs[] __initconst = { -+ MUX(CLK_PERI_UART0_SEL, "uart0_ck_sel", uart_ck_sel_parents, 0x40c, 0, 1), -+ MUX(CLK_PERI_UART1_SEL, "uart1_ck_sel", uart_ck_sel_parents, 0x40c, 1, 1), -+ MUX(CLK_PERI_UART2_SEL, "uart2_ck_sel", uart_ck_sel_parents, 0x40c, 2, 1), -+ MUX(CLK_PERI_UART3_SEL, "uart3_ck_sel", uart_ck_sel_parents, 0x40c, 3, 1), -+}; -+ -+static void __init mtk_pericfg_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ void __iomem *base; -+ int r; -+ -+ base = of_iomap(node, 0); -+ if (!base) { -+ pr_err("%s(): ioremap failed\n", __func__); -+ return; -+ } -+ -+ clk_data = mtk_alloc_clk_data(CLK_PERI_NR); -+ -+ mtk_clk_register_gates(node, peri_clks, ARRAY_SIZE(peri_clks), -+ clk_data); -+ -+ mtk_clk_register_composites(peri_muxs, ARRAY_SIZE(peri_muxs), base, -+ &lock, clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init); -+ -+static const struct mtk_gate_regs disp0_cg_regs __initconst = { -+ .set_ofs = 0x0104, -+ .clr_ofs = 0x0108, -+ .sta_ofs = 0x0100, -+}; -+ -+static const struct mtk_gate_regs disp1_cg_regs __initconst = { -+ .set_ofs = 0x0114, -+ .clr_ofs = 0x0118, -+ .sta_ofs = 0x0110, -+}; -+ -+#define GATE_DISP0(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &disp0_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+#define GATE_DISP1(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &disp1_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+static const struct mtk_gate mm_clks[] __initconst = { -+ GATE_DISP0(CLK_MM_SMI_COMMON, "mm_smi_comm", "mm_sel", 0), -+ GATE_DISP0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1), -+ GATE_DISP0(CLK_MM_CMDQ, "mm_cmdq", "mm_sel", 2), -+ GATE_DISP0(CLK_MM_MUTEX, "mm_mutex", "mm_sel", 3), -+ GATE_DISP0(CLK_MM_DISP_COLOR, "mm_disp_color", "mm_sel", 4), -+ GATE_DISP0(CLK_MM_DISP_BLS, "mm_disp_bls", "mm_sel", 5), -+ GATE_DISP0(CLK_MM_DISP_WDMA, "mm_disp_wdma", "mm_sel", 6), -+ GATE_DISP0(CLK_MM_DISP_RDMA, "mm_disp_rdma", "mm_sel", 7), -+ GATE_DISP0(CLK_MM_DISP_OVL, "mm_disp_ovl", "mm_sel", 8), -+ GATE_DISP0(CLK_MM_MDP_TDSHP, "mm_mdp_tdshp", "mm_sel", 9), -+ GATE_DISP0(CLK_MM_MDP_WROT, "mm_mdp_wrot", "mm_sel", 10), -+ GATE_DISP0(CLK_MM_MDP_WDMA, "mm_mdp_wdma", "mm_sel", 11), -+ GATE_DISP0(CLK_MM_MDP_RSZ1, "mm_mdp_rsz1", "mm_sel", 12), -+ GATE_DISP0(CLK_MM_MDP_RSZ0, "mm_mdp_rsz0", "mm_sel", 13), -+ GATE_DISP0(CLK_MM_MDP_RDMA, "mm_mdp_rdma", "mm_sel", 14), -+ GATE_DISP0(CLK_MM_MDP_BLS_26M, "mm_mdp_bls_26m", "clk26m", 15), -+ GATE_DISP0(CLK_MM_CAM_MDP, "mm_cam_mdp", "mm_sel", 16), -+ GATE_DISP0(CLK_MM_FAKE_ENG, "mm_fake_eng", "mm_sel", 17), -+ GATE_DISP0(CLK_MM_MUTEX_32K, "mm_mutex_32k", "rtc_sel", 18), -+ GATE_DISP0(CLK_MM_DISP_RDMA1, "mm_disp_rdma1", "mm_sel", 19), -+ GATE_DISP0(CLK_MM_DISP_UFOE, "mm_disp_ufoe", "mm_sel", 20), -+ GATE_DISP1(CLK_MM_DSI_ENGINE, "mm_dsi_eng", "mm_sel", 0), -+ GATE_DISP1(CLK_MM_DSI_DIG, "mm_dsi_dig", "dsio_lntc_dsiclk", 1), -+ GATE_DISP1(CLK_MM_DPI_DIGL, "mm_dpi_digl", "dpi0_sel", 2), -+ GATE_DISP1(CLK_MM_DPI_ENGINE, "mm_dpi_eng", "mm_sel", 3), -+ GATE_DISP1(CLK_MM_DPI1_DIGL, "mm_dpi1_digl", "dpi1_sel", 4), -+ GATE_DISP1(CLK_MM_DPI1_ENGINE, "mm_dpi1_eng", "mm_sel", 5), -+ GATE_DISP1(CLK_MM_TVE_OUTPUT, "mm_tve_output", "tve_sel", 6), -+ GATE_DISP1(CLK_MM_TVE_INPUT, "mm_tve_input", "dpi0_sel", 7), -+ GATE_DISP1(CLK_MM_HDMI_PIXEL, "mm_hdmi_pixel", "dpi1_sel", 8), -+ GATE_DISP1(CLK_MM_HDMI_PLL, "mm_hdmi_pll", "hdmi_sel", 9), -+ GATE_DISP1(CLK_MM_HDMI_AUDIO, "mm_hdmi_audio", "apll_sel", 10), -+ GATE_DISP1(CLK_MM_HDMI_SPDIF, "mm_hdmi_spdif", "apll_sel", 11), -+ GATE_DISP1(CLK_MM_TVE_FMM, "mm_tve_fmm", "mm_sel", 14), -+}; -+ -+static void __init mtk_mmsys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_MM_NR); -+ -+ mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_mmsys, "mediatek,mt2701-mmsys", mtk_mmsys_init); -+ -+static const struct mtk_gate_regs img_cg_regs __initconst = { -+ .set_ofs = 0x0004, -+ .clr_ofs = 0x0008, -+ .sta_ofs = 0x0000, -+}; -+ -+#define GATE_IMG(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &img_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr, \ -+ } -+ -+static const struct mtk_gate img_clks[] __initconst = { -+ GATE_IMG(CLK_IMG_SMI_COMM, "img_smi_comm", "mm_sel", 0), -+ GATE_IMG(CLK_IMG_RESZ, "img_resz", "mm_sel", 1), -+ GATE_IMG(CLK_IMG_JPGDEC, "img_jpgdec", "mm_sel", 5), -+ GATE_IMG(CLK_IMG_VENC_LT, "img_venc_lt", "mm_sel", 8), -+ GATE_IMG(CLK_IMG_VENC, "img_venc", "mm_sel", 9), -+}; -+ -+static void __init mtk_imgsys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_IMG_NR); -+ -+ mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_imgsys, "mediatek,mt2701-imgsys", mtk_imgsys_init); -+ -+static const struct mtk_gate_regs vdec0_cg_regs __initconst = { -+ .set_ofs = 0x0000, -+ .clr_ofs = 0x0004, -+ .sta_ofs = 0x0000, -+}; -+ -+static const struct mtk_gate_regs vdec1_cg_regs __initconst = { -+ .set_ofs = 0x0008, -+ .clr_ofs = 0x000c, -+ .sta_ofs = 0x0008, -+}; -+ -+#define GATE_VDEC0(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &vdec0_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr_inv, \ -+ } -+ -+#define GATE_VDEC1(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &vdec1_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr_inv, \ -+ } -+ -+static const struct mtk_gate vdec_clks[] __initconst = { -+ GATE_VDEC0(CLK_VDEC_CKGEN, "vdec_cken", "vdec_sel", 0), -+ GATE_VDEC1(CLK_VDEC_LARB, "vdec_larb_cken", "mm_sel", 0), -+}; -+ -+static void __init mtk_vdecsys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_VDEC_NR); -+ -+ mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_vdecsys, "mediatek,mt2701-vdecsys", mtk_vdecsys_init); -+ -+static const struct mtk_gate_regs hif_cg_regs __initconst = { -+ .sta_ofs = 0x0008, -+}; -+ -+#define GATE_HIF(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &hif_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr_inv, \ -+ } -+ -+static const struct mtk_gate hif_clks[] __initconst = { -+ GATE_HIF(CLK_HIFSYS_USB0PHY, "usb0_phy_clk", "ethpll_500m_ck", 21), -+ GATE_HIF(CLK_HIFSYS_USB1PHY, "usb1_phy_clk", "ethpll_500m_ck", 22), -+ GATE_HIF(CLK_HIFSYS_PCIE0, "pcie0_clk", "ethpll_500m_ck", 24), -+ GATE_HIF(CLK_HIFSYS_PCIE1, "pcie1_clk", "ethpll_500m_ck", 25), -+ GATE_HIF(CLK_HIFSYS_PCIE2, "pcie2_clk", "ethpll_500m_ck", 26), -+}; -+ -+static void __init mtk_hifsys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_HIFSYS_NR); -+ -+ mtk_clk_register_gates(node, hif_clks, ARRAY_SIZE(hif_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init); -+ -+static const struct mtk_gate_regs eth_cg_regs __initconst = { -+ .sta_ofs = 0x0030, -+}; -+ -+#define GATE_eth(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = ð_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_no_setclr_inv, \ -+ } -+ -+static const struct mtk_gate eth_clks[] __initconst = { -+ GATE_HIF(CLK_ETHSYS_HSDMA, "hsdma_clk", "ethif_sel", 5), -+ GATE_HIF(CLK_ETHSYS_ESW, "esw_clk", "ethpll_500m_ck", 6), -+ GATE_HIF(CLK_ETHSYS_GP2, "gp2_clk", "trgpll", 7), -+ GATE_HIF(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8), -+ GATE_HIF(CLK_ETHSYS_PCM, "pcm_clk", "ethif_sel", 11), -+ GATE_HIF(CLK_ETHSYS_GDMA, "gdma_clk", "ethif_sel", 14), -+ GATE_HIF(CLK_ETHSYS_I2S, "i2s_clk", "ethif_sel", 17), -+ GATE_HIF(CLK_ETHSYS_CRYPTO, "crypto_clk", "ethif_sel", 29), -+}; -+ -+static void __init mtk_ethsys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_ETHSYS_NR); -+ -+ mtk_clk_register_gates(node, eth_clks, ARRAY_SIZE(eth_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_ethsys, "mediatek,mt2701-ethsys", mtk_ethsys_init); -+ -+static const struct mtk_gate_regs bdp0_cg_regs __initconst = { -+ .set_ofs = 0x0104, -+ .clr_ofs = 0x0108, -+ .sta_ofs = 0x0100, -+}; -+ -+static const struct mtk_gate_regs bdp1_cg_regs __initconst = { -+ .set_ofs = 0x0114, -+ .clr_ofs = 0x0118, -+ .sta_ofs = 0x0110, -+}; -+ -+#define GATE_BDP0(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &bdp0_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr_inv, \ -+ } -+ -+#define GATE_BDP1(_id, _name, _parent, _shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .regs = &bdp1_cg_regs, \ -+ .shift = _shift, \ -+ .ops = &mtk_clk_gate_ops_setclr_inv, \ -+ } -+ -+static const struct mtk_gate bdp_clks[] __initconst = { -+ GATE_BDP0(CLK_BDP_BRG_BA, "brg_baclk", "mm_sel", 0), -+ GATE_BDP0(CLK_BDP_BRG_DRAM, "brg_dram", "mm_sel", 1), -+ GATE_BDP0(CLK_BDP_LARB_DRAM, "larb_dram", "mm_sel", 2), -+ GATE_BDP0(CLK_BDP_WR_VDI_PXL, "wr_vdi_pxl", "hdmi_0_deep340m", 3), -+ GATE_BDP0(CLK_BDP_WR_VDI_DRAM, "wr_vdi_dram", "mm_sel", 4), -+ GATE_BDP0(CLK_BDP_WR_B, "wr_bclk", "mm_sel", 5), -+ GATE_BDP0(CLK_BDP_DGI_IN, "dgi_in", "dpi1_sel", 6), -+ GATE_BDP0(CLK_BDP_DGI_OUT, "dgi_out", "dpi_sel", 7), -+ GATE_BDP0(CLK_BDP_FMT_MAST_27, "fmt_mast_27", "dpi1_sel", 8), -+ GATE_BDP0(CLK_BDP_FMT_B, "fmt_bclk", "mm_sel", 9), -+ GATE_BDP0(CLK_BDP_OSD_B, "osd_bclk", "mm_sel", 10), -+ GATE_BDP0(CLK_BDP_OSD_DRAM, "osd_dram", "mm_sel", 11), -+ GATE_BDP0(CLK_BDP_OSD_AGENT, "osd_agent", "osd_sel", 12), -+ GATE_BDP0(CLK_BDP_OSD_PXL, "osd_pxl", "dpi1_sel", 13), -+ GATE_BDP0(CLK_BDP_RLE_B, "rle_bclk", "mm_sel", 14), -+ GATE_BDP0(CLK_BDP_RLE_AGENT, "rle_agent", "mm_sel", 15), -+ GATE_BDP0(CLK_BDP_RLE_DRAM, "rle_dram", "mm_sel", 16), -+ GATE_BDP0(CLK_BDP_F27M, "f27m", "di_sel", 17), -+ GATE_BDP0(CLK_BDP_F27M_VDOUT, "f27m_vdout", "di_sel", 18), -+ GATE_BDP0(CLK_BDP_F27_74_74, "f27_74_74", "di_sel", 19), -+ GATE_BDP0(CLK_BDP_F2FS, "f2fs", "di_sel", 20), -+ GATE_BDP0(CLK_BDP_F2FS74_148, "f2fs74_148", "di_sel", 21), -+ GATE_BDP0(CLK_BDP_FB, "fbclk", "mm_sel", 22), -+ GATE_BDP0(CLK_BDP_VDO_DRAM, "vdo_dram", "mm_sel", 23), -+ GATE_BDP0(CLK_BDP_VDO_2FS, "vdo_2fs", "di_sel", 24), -+ GATE_BDP0(CLK_BDP_VDO_B, "vdo_bclk", "mm_sel", 25), -+ GATE_BDP0(CLK_BDP_WR_DI_PXL, "wr_di_pxl", "di_sel", 26), -+ GATE_BDP0(CLK_BDP_WR_DI_DRAM, "wr_di_dram", "mm_sel", 27), -+ GATE_BDP0(CLK_BDP_WR_DI_B, "wr_di_bclk", "mm_sel", 28), -+ GATE_BDP0(CLK_BDP_NR_PXL, "nr_pxl", "nr_sel", 29), -+ GATE_BDP0(CLK_BDP_NR_DRAM, "nr_dram", "mm_sel", 30), -+ GATE_BDP0(CLK_BDP_NR_B, "nr_bclk", "mm_sel", 31), -+ GATE_BDP1(CLK_BDP_RX_F, "rx_fclk", "hadds2_fbclk", 0), -+ GATE_BDP1(CLK_BDP_RX_X, "rx_xclk", "clk26m", 1), -+ GATE_BDP1(CLK_BDP_RXPDT, "rxpdtclk", "hdmi_0_pix340m", 2), -+ GATE_BDP1(CLK_BDP_RX_CSCL_N, "rx_cscl_n", "clk26m", 3), -+ GATE_BDP1(CLK_BDP_RX_CSCL, "rx_cscl", "clk26m", 4), -+ GATE_BDP1(CLK_BDP_RX_DDCSCL_N, "rx_ddcscl_n", "hdmi_scl_rx", 5), -+ GATE_BDP1(CLK_BDP_RX_DDCSCL, "rx_ddcscl", "hdmi_scl_rx", 6), -+ GATE_BDP1(CLK_BDP_RX_VCO, "rx_vcoclk", "hadds2pll_294m", 7), -+ GATE_BDP1(CLK_BDP_RX_DP, "rx_dpclk", "hdmi_0_pll340m", 8), -+ GATE_BDP1(CLK_BDP_RX_P, "rx_pclk", "hdmi_0_pll340m", 9), -+ GATE_BDP1(CLK_BDP_RX_M, "rx_mclk", "hadds2pll_294m", 10), -+ GATE_BDP1(CLK_BDP_RX_PLL, "rx_pllclk", "hdmi_0_pix340m", 11), -+ GATE_BDP1(CLK_BDP_BRG_RT_B, "brg_rt_bclk", "mm_sel", 12), -+ GATE_BDP1(CLK_BDP_BRG_RT_DRAM, "brg_rt_dram", "mm_sel", 13), -+ GATE_BDP1(CLK_BDP_LARBRT_DRAM, "larbrt_dram", "mm_sel", 14), -+ GATE_BDP1(CLK_BDP_TMDS_SYN, "tmds_syn", "hdmi_0_pll340m", 15), -+ GATE_BDP1(CLK_BDP_HDMI_MON, "hdmi_mon", "hdmi_0_mon", 16), -+}; -+ -+static void __init mtk_bdpsys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(CLK_BDP_NR); -+ -+ mtk_clk_register_gates(node, bdp_clks, ARRAY_SIZE(bdp_clks), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_bdpsys, "mediatek,mt2701-bdpsys", mtk_bdpsys_init); -+ -+#define MT8590_PLL_FMAX (2000 * MHZ) -+#define CON0_MT8590_RST_BAR BIT(27) -+ -+#define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ -+ _pd_shift, _tuner_reg, _pcw_reg, _pcw_shift) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .reg = _reg, \ -+ .pwr_reg = _pwr_reg, \ -+ .en_mask = _en_mask, \ -+ .flags = _flags, \ -+ .rst_bar_mask = CON0_MT8590_RST_BAR, \ -+ .fmax = MT8590_PLL_FMAX, \ -+ .pcwbits = _pcwbits, \ -+ .pd_reg = _pd_reg, \ -+ .pd_shift = _pd_shift, \ -+ .tuner_reg = _tuner_reg, \ -+ .pcw_reg = _pcw_reg, \ -+ .pcw_shift = _pcw_shift, \ -+ } -+ -+static const struct mtk_pll_data apmixed_plls[] = { -+ PLL(CLK_APMIXED_ARMPLL, "armpll", 0x200, 0x20c, 0x80000001, 0, -+ 21, 0x204, 24, 0x0, 0x204, 0), -+ PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x210, 0x21c, 0xf0000001, -+ HAVE_RST_BAR, 21, 0x210, 4, 0x0, 0x214, 0), -+ PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x220, 0x22c, 0xf3000001, -+ HAVE_RST_BAR, 7, 0x220, 4, 0x0, 0x224, 14), -+ PLL(CLK_APMIXED_MMPLL, "mmpll", 0x230, 0x23c, 0x00000001, 0, -+ 21, 0x230, 4, 0x0, 0x234, 0), -+ PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x240, 0x24c, 0x00000001, 0, -+ 21, 0x240, 4, 0x0, 0x244, 0), -+ PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x250, 0x25c, 0x00000001, 0, -+ 21, 0x250, 4, 0x0, 0x254, 0), -+ PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x270, 0x27c, 0x00000001, 0, -+ 31, 0x270, 4, 0x0, 0x274, 0), -+ PLL(CLK_APMIXED_TRGPLL, "trgpll", 0x280, 0x28c, 0x00000001, 0, -+ 31, 0x280, 4, 0x0, 0x284, 0), -+ PLL(CLK_APMIXED_ETHPLL, "ethpll", 0x290, 0x29c, 0x00000001, 0, -+ 31, 0x290, 4, 0x0, 0x294, 0), -+ PLL(CLK_APMIXED_VDECPLL, "vdecpll", 0x2a0, 0x2ac, 0x00000001, 0, -+ 31, 0x2a0, 4, 0x0, 0x2a4, 0), -+ PLL(CLK_APMIXED_HADDS2PLL, "hadds2pll", 0x2b0, 0x2bc, 0x00000001, 0, -+ 31, 0x2b0, 4, 0x0, 0x2b4, 0), -+ PLL(CLK_APMIXED_AUD2PLL, "aud2pll", 0x2c0, 0x2cc, 0x00000001, 0, -+ 31, 0x2c0, 4, 0x0, 0x2c4, 0), -+ PLL(CLK_APMIXED_TVD2PLL, "tvd2pll", 0x2d0, 0x2dc, 0x00000001, 0, -+ 21, 0x2d0, 4, 0x0, 0x2d4, 0), -+}; -+ -+static void __init mtk_apmixedsys_init(struct device_node *node) -+{ -+ struct clk_onecell_data *clk_data; -+ int r; -+ -+ clk_data = mtk_alloc_clk_data(ARRAY_SIZE(apmixed_plls)); -+ if (!clk_data) -+ return; -+ -+ mtk_clk_register_plls(node, apmixed_plls, ARRAY_SIZE(apmixed_plls), -+ clk_data); -+ -+ r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); -+ if (r) -+ pr_err("%s(): could not register clock provider: %d\n", -+ __func__, r); -+} -+CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt2701-apmixedsys", -+ mtk_apmixedsys_init); ---- a/drivers/clk/mediatek/clk-mtk.c -+++ b/drivers/clk/mediatek/clk-mtk.c -@@ -244,3 +244,28 @@ void mtk_clk_register_composites(const s - clk_data->clks[mc->id] = clk; - } - } -+ -+void __init mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, -+ int num, void __iomem *base, spinlock_t *lock, -+ struct clk_onecell_data *clk_data) -+{ -+ struct clk *clk; -+ int i; -+ -+ for (i = 0; i < num; i++) { -+ const struct mtk_clk_divider *mcd = &mcds[i]; -+ -+ clk = clk_register_divider(NULL, mcd->name, mcd->parent_name, -+ mcd->flags, base + mcd->div_reg, mcd->div_shift, -+ mcd->div_width, mcd->clk_divider_flags, lock); -+ -+ if (IS_ERR(clk)) { -+ pr_err("Failed to register clk %s: %ld\n", -+ mcd->name, PTR_ERR(clk)); -+ continue; -+ } -+ -+ if (clk_data) -+ clk_data->clks[mcd->id] = clk; -+ } -+} ---- a/drivers/clk/mediatek/clk-mtk.h -+++ b/drivers/clk/mediatek/clk-mtk.h -@@ -121,7 +121,8 @@ struct mtk_composite { - .flags = CLK_SET_RATE_PARENT, \ - } - --#define DIV_GATE(_id, _name, _parent, _gate_reg, _gate_shift, _div_reg, _div_width, _div_shift) { \ -+#define DIV_GATE(_id, _name, _parent, _gate_reg, _gate_shift, _div_reg, \ -+ _div_width, _div_shift) { \ - .id = _id, \ - .parent = _parent, \ - .name = _name, \ -@@ -156,8 +157,36 @@ struct mtk_gate { - const struct clk_ops *ops; - }; - --int mtk_clk_register_gates(struct device_node *node, const struct mtk_gate *clks, -- int num, struct clk_onecell_data *clk_data); -+int mtk_clk_register_gates(struct device_node *node, -+ const struct mtk_gate *clks, int num, -+ struct clk_onecell_data *clk_data); -+ -+struct mtk_clk_divider { -+ int id; -+ const char *name; -+ const char *parent_name; -+ unsigned long flags; -+ -+ uint32_t div_reg; -+ unsigned char div_shift; -+ unsigned char div_width; -+ unsigned char clk_divider_flags; -+ const struct clk_div_table *clk_div_table; -+}; -+ -+#define DIV_ADJ(_id, _name, _parent, _reg, _shift, _width) { \ -+ .id = _id, \ -+ .name = _name, \ -+ .parent_name = _parent, \ -+ .flags = CLK_SET_RATE_PARENT, \ -+ .div_reg = _reg, \ -+ .div_shift = _shift, \ -+ .div_width = _width, \ -+} -+ -+void mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, -+ int num, void __iomem *base, spinlock_t *lock, -+ struct clk_onecell_data *clk_data); - - struct clk_onecell_data *mtk_alloc_clk_data(unsigned int clk_num); - diff --git a/target/linux/mediatek/patches-4.9/0007-ARM-mediatek-Add-MT2701-config-options-for-mediatek-.patch b/target/linux/mediatek/patches-4.9/0007-ARM-mediatek-Add-MT2701-config-options-for-mediatek-.patch deleted file mode 100644 index f38b435c8..000000000 --- a/target/linux/mediatek/patches-4.9/0007-ARM-mediatek-Add-MT2701-config-options-for-mediatek-.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 60c14df3cc898b6b03d66ec725f9705bf431b677 Mon Sep 17 00:00:00 2001 -From: Erin Lo -Date: Mon, 28 Dec 2015 15:09:02 +0800 -Subject: [PATCH 07/57] ARM: mediatek: Add MT2701 config options for mediatek - SoCs. - -The upcoming MTK pinctrl driver have a big pin table for each SoC -and we don't want to bloat the kernel binary if we don't need it. -Add config options so we can build for one SoC only. Add MT2701. - -Signed-off-by: Erin Lo -Acked-by: Linus Walleij ---- - arch/arm/mach-mediatek/Kconfig | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm/mach-mediatek/Kconfig -+++ b/arch/arm/mach-mediatek/Kconfig -@@ -14,6 +14,10 @@ config MACH_MT2701 - bool "MediaTek MT2701 SoCs support" - default ARCH_MEDIATEK - -+config MACH_MT2701 -+ bool "MediaTek MT2701 SoCs support" -+ default ARCH_MEDIATEK -+ - config MACH_MT6589 - bool "MediaTek MT6589 SoCs support" - default ARCH_MEDIATEK diff --git a/target/linux/mediatek/patches-4.9/0008-soc-mediatek-Refine-scpsys-to-support-multiple-platf.patch b/target/linux/mediatek/patches-4.9/0008-soc-mediatek-Refine-scpsys-to-support-multiple-platf.patch deleted file mode 100644 index 1d83e9ae5..000000000 --- a/target/linux/mediatek/patches-4.9/0008-soc-mediatek-Refine-scpsys-to-support-multiple-platf.patch +++ /dev/null @@ -1,487 +0,0 @@ -From b5a1e520d8039c242b2157b511f684ce464d6e21 Mon Sep 17 00:00:00 2001 -From: James Liao -Date: Thu, 20 Oct 2016 16:56:35 +0800 -Subject: [PATCH 08/57] soc: mediatek: Refine scpsys to support multiple - platform - -Refine scpsys driver common code to support multiple SoC / platform. - -Signed-off-by: James Liao -Reviewed-by: Kevin Hilman -Signed-off-by: Matthias Brugger ---- - drivers/soc/mediatek/mtk-scpsys.c | 348 +++++++++++++++++++++++--------------- - 1 file changed, 210 insertions(+), 138 deletions(-) - ---- a/drivers/soc/mediatek/mtk-scpsys.c -+++ b/drivers/soc/mediatek/mtk-scpsys.c -@@ -11,17 +11,15 @@ - * GNU General Public License for more details. - */ - #include --#include -+#include - #include --#include - #include --#include - #include - #include - #include --#include --#include - #include -+#include -+ - #include - - #define SPM_VDE_PWR_CON 0x0210 -@@ -34,6 +32,7 @@ - #define SPM_MFG_2D_PWR_CON 0x02c0 - #define SPM_MFG_ASYNC_PWR_CON 0x02c4 - #define SPM_USB_PWR_CON 0x02cc -+ - #define SPM_PWR_STATUS 0x060c - #define SPM_PWR_STATUS_2ND 0x0610 - -@@ -55,12 +54,21 @@ - #define PWR_STATUS_USB BIT(25) - - enum clk_id { -- MT8173_CLK_NONE, -- MT8173_CLK_MM, -- MT8173_CLK_MFG, -- MT8173_CLK_VENC, -- MT8173_CLK_VENC_LT, -- MT8173_CLK_MAX, -+ CLK_NONE, -+ CLK_MM, -+ CLK_MFG, -+ CLK_VENC, -+ CLK_VENC_LT, -+ CLK_MAX, -+}; -+ -+static const char * const clk_names[] = { -+ NULL, -+ "mm", -+ "mfg", -+ "venc", -+ "venc_lt", -+ NULL, - }; - - #define MAX_CLKS 2 -@@ -76,98 +84,6 @@ struct scp_domain_data { - bool active_wakeup; - }; - --static const struct scp_domain_data scp_domain_data[] = { -- [MT8173_POWER_DOMAIN_VDEC] = { -- .name = "vdec", -- .sta_mask = PWR_STATUS_VDEC, -- .ctl_offs = SPM_VDE_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(12, 12), -- .clk_id = {MT8173_CLK_MM}, -- }, -- [MT8173_POWER_DOMAIN_VENC] = { -- .name = "venc", -- .sta_mask = PWR_STATUS_VENC, -- .ctl_offs = SPM_VEN_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(15, 12), -- .clk_id = {MT8173_CLK_MM, MT8173_CLK_VENC}, -- }, -- [MT8173_POWER_DOMAIN_ISP] = { -- .name = "isp", -- .sta_mask = PWR_STATUS_ISP, -- .ctl_offs = SPM_ISP_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(13, 12), -- .clk_id = {MT8173_CLK_MM}, -- }, -- [MT8173_POWER_DOMAIN_MM] = { -- .name = "mm", -- .sta_mask = PWR_STATUS_DISP, -- .ctl_offs = SPM_DIS_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(12, 12), -- .clk_id = {MT8173_CLK_MM}, -- .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 | -- MT8173_TOP_AXI_PROT_EN_MM_M1, -- }, -- [MT8173_POWER_DOMAIN_VENC_LT] = { -- .name = "venc_lt", -- .sta_mask = PWR_STATUS_VENC_LT, -- .ctl_offs = SPM_VEN2_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(15, 12), -- .clk_id = {MT8173_CLK_MM, MT8173_CLK_VENC_LT}, -- }, -- [MT8173_POWER_DOMAIN_AUDIO] = { -- .name = "audio", -- .sta_mask = PWR_STATUS_AUDIO, -- .ctl_offs = SPM_AUDIO_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(15, 12), -- .clk_id = {MT8173_CLK_NONE}, -- }, -- [MT8173_POWER_DOMAIN_USB] = { -- .name = "usb", -- .sta_mask = PWR_STATUS_USB, -- .ctl_offs = SPM_USB_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(15, 12), -- .clk_id = {MT8173_CLK_NONE}, -- .active_wakeup = true, -- }, -- [MT8173_POWER_DOMAIN_MFG_ASYNC] = { -- .name = "mfg_async", -- .sta_mask = PWR_STATUS_MFG_ASYNC, -- .ctl_offs = SPM_MFG_ASYNC_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = 0, -- .clk_id = {MT8173_CLK_MFG}, -- }, -- [MT8173_POWER_DOMAIN_MFG_2D] = { -- .name = "mfg_2d", -- .sta_mask = PWR_STATUS_MFG_2D, -- .ctl_offs = SPM_MFG_2D_PWR_CON, -- .sram_pdn_bits = GENMASK(11, 8), -- .sram_pdn_ack_bits = GENMASK(13, 12), -- .clk_id = {MT8173_CLK_NONE}, -- }, -- [MT8173_POWER_DOMAIN_MFG] = { -- .name = "mfg", -- .sta_mask = PWR_STATUS_MFG, -- .ctl_offs = SPM_MFG_PWR_CON, -- .sram_pdn_bits = GENMASK(13, 8), -- .sram_pdn_ack_bits = GENMASK(21, 16), -- .clk_id = {MT8173_CLK_NONE}, -- .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S | -- MT8173_TOP_AXI_PROT_EN_MFG_M0 | -- MT8173_TOP_AXI_PROT_EN_MFG_M1 | -- MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT, -- }, --}; -- --#define NUM_DOMAINS ARRAY_SIZE(scp_domain_data) -- - struct scp; - - struct scp_domain { -@@ -179,7 +95,7 @@ struct scp_domain { - }; - - struct scp { -- struct scp_domain domains[NUM_DOMAINS]; -+ struct scp_domain *domains; - struct genpd_onecell_data pd_data; - struct device *dev; - void __iomem *base; -@@ -408,57 +324,55 @@ static bool scpsys_active_wakeup(struct - return scpd->data->active_wakeup; - } - --static int scpsys_probe(struct platform_device *pdev) -+static void init_clks(struct platform_device *pdev, struct clk **clk) -+{ -+ int i; -+ -+ for (i = CLK_NONE + 1; i < CLK_MAX; i++) -+ clk[i] = devm_clk_get(&pdev->dev, clk_names[i]); -+} -+ -+static struct scp *init_scp(struct platform_device *pdev, -+ const struct scp_domain_data *scp_domain_data, int num) - { - struct genpd_onecell_data *pd_data; - struct resource *res; -- int i, j, ret; -+ int i, j; - struct scp *scp; -- struct clk *clk[MT8173_CLK_MAX]; -+ struct clk *clk[CLK_MAX]; - - scp = devm_kzalloc(&pdev->dev, sizeof(*scp), GFP_KERNEL); - if (!scp) -- return -ENOMEM; -+ return ERR_PTR(-ENOMEM); - - scp->dev = &pdev->dev; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - scp->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(scp->base)) -- return PTR_ERR(scp->base); -+ return ERR_CAST(scp->base); -+ -+ scp->domains = devm_kzalloc(&pdev->dev, -+ sizeof(*scp->domains) * num, GFP_KERNEL); -+ if (!scp->domains) -+ return ERR_PTR(-ENOMEM); - - pd_data = &scp->pd_data; - - pd_data->domains = devm_kzalloc(&pdev->dev, -- sizeof(*pd_data->domains) * NUM_DOMAINS, GFP_KERNEL); -+ sizeof(*pd_data->domains) * num, GFP_KERNEL); - if (!pd_data->domains) -- return -ENOMEM; -- -- clk[MT8173_CLK_MM] = devm_clk_get(&pdev->dev, "mm"); -- if (IS_ERR(clk[MT8173_CLK_MM])) -- return PTR_ERR(clk[MT8173_CLK_MM]); -- -- clk[MT8173_CLK_MFG] = devm_clk_get(&pdev->dev, "mfg"); -- if (IS_ERR(clk[MT8173_CLK_MFG])) -- return PTR_ERR(clk[MT8173_CLK_MFG]); -- -- clk[MT8173_CLK_VENC] = devm_clk_get(&pdev->dev, "venc"); -- if (IS_ERR(clk[MT8173_CLK_VENC])) -- return PTR_ERR(clk[MT8173_CLK_VENC]); -- -- clk[MT8173_CLK_VENC_LT] = devm_clk_get(&pdev->dev, "venc_lt"); -- if (IS_ERR(clk[MT8173_CLK_VENC_LT])) -- return PTR_ERR(clk[MT8173_CLK_VENC_LT]); -+ return ERR_PTR(-ENOMEM); - - scp->infracfg = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, - "infracfg"); - if (IS_ERR(scp->infracfg)) { - dev_err(&pdev->dev, "Cannot find infracfg controller: %ld\n", - PTR_ERR(scp->infracfg)); -- return PTR_ERR(scp->infracfg); -+ return ERR_CAST(scp->infracfg); - } - -- for (i = 0; i < NUM_DOMAINS; i++) { -+ for (i = 0; i < num; i++) { - struct scp_domain *scpd = &scp->domains[i]; - const struct scp_domain_data *data = &scp_domain_data[i]; - -@@ -467,13 +381,15 @@ static int scpsys_probe(struct platform_ - if (PTR_ERR(scpd->supply) == -ENODEV) - scpd->supply = NULL; - else -- return PTR_ERR(scpd->supply); -+ return ERR_CAST(scpd->supply); - } - } - -- pd_data->num_domains = NUM_DOMAINS; -+ pd_data->num_domains = num; -+ -+ init_clks(pdev, clk); - -- for (i = 0; i < NUM_DOMAINS; i++) { -+ for (i = 0; i < num; i++) { - struct scp_domain *scpd = &scp->domains[i]; - struct generic_pm_domain *genpd = &scpd->genpd; - const struct scp_domain_data *data = &scp_domain_data[i]; -@@ -482,13 +398,37 @@ static int scpsys_probe(struct platform_ - scpd->scp = scp; - - scpd->data = data; -- for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) -- scpd->clk[j] = clk[data->clk_id[j]]; -+ -+ for (j = 0; j < MAX_CLKS && data->clk_id[j]; j++) { -+ struct clk *c = clk[data->clk_id[j]]; -+ -+ if (IS_ERR(c)) { -+ dev_err(&pdev->dev, "%s: clk unavailable\n", -+ data->name); -+ return ERR_CAST(c); -+ } -+ -+ scpd->clk[j] = c; -+ } - - genpd->name = data->name; - genpd->power_off = scpsys_power_off; - genpd->power_on = scpsys_power_on; - genpd->dev_ops.active_wakeup = scpsys_active_wakeup; -+ } -+ -+ return scp; -+} -+ -+static void mtk_register_power_domains(struct platform_device *pdev, -+ struct scp *scp, int num) -+{ -+ struct genpd_onecell_data *pd_data; -+ int i, ret; -+ -+ for (i = 0; i < num; i++) { -+ struct scp_domain *scpd = &scp->domains[i]; -+ struct generic_pm_domain *genpd = &scpd->genpd; - - /* - * Initially turn on all domains to make the domains usable -@@ -507,6 +447,123 @@ static int scpsys_probe(struct platform_ - * valid. - */ - -+ pd_data = &scp->pd_data; -+ -+ ret = of_genpd_add_provider_onecell(pdev->dev.of_node, pd_data); -+ if (ret) -+ dev_err(&pdev->dev, "Failed to add OF provider: %d\n", ret); -+} -+ -+/* -+ * MT8173 power domain support -+ */ -+ -+static const struct scp_domain_data scp_domain_data_mt8173[] = { -+ [MT8173_POWER_DOMAIN_VDEC] = { -+ .name = "vdec", -+ .sta_mask = PWR_STATUS_VDEC, -+ .ctl_offs = SPM_VDE_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(12, 12), -+ .clk_id = {CLK_MM}, -+ }, -+ [MT8173_POWER_DOMAIN_VENC] = { -+ .name = "venc", -+ .sta_mask = PWR_STATUS_VENC, -+ .ctl_offs = SPM_VEN_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(15, 12), -+ .clk_id = {CLK_MM, CLK_VENC}, -+ }, -+ [MT8173_POWER_DOMAIN_ISP] = { -+ .name = "isp", -+ .sta_mask = PWR_STATUS_ISP, -+ .ctl_offs = SPM_ISP_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(13, 12), -+ .clk_id = {CLK_MM}, -+ }, -+ [MT8173_POWER_DOMAIN_MM] = { -+ .name = "mm", -+ .sta_mask = PWR_STATUS_DISP, -+ .ctl_offs = SPM_DIS_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(12, 12), -+ .clk_id = {CLK_MM}, -+ .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 | -+ MT8173_TOP_AXI_PROT_EN_MM_M1, -+ }, -+ [MT8173_POWER_DOMAIN_VENC_LT] = { -+ .name = "venc_lt", -+ .sta_mask = PWR_STATUS_VENC_LT, -+ .ctl_offs = SPM_VEN2_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(15, 12), -+ .clk_id = {CLK_MM, CLK_VENC_LT}, -+ }, -+ [MT8173_POWER_DOMAIN_AUDIO] = { -+ .name = "audio", -+ .sta_mask = PWR_STATUS_AUDIO, -+ .ctl_offs = SPM_AUDIO_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(15, 12), -+ .clk_id = {CLK_NONE}, -+ }, -+ [MT8173_POWER_DOMAIN_USB] = { -+ .name = "usb", -+ .sta_mask = PWR_STATUS_USB, -+ .ctl_offs = SPM_USB_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(15, 12), -+ .clk_id = {CLK_NONE}, -+ .active_wakeup = true, -+ }, -+ [MT8173_POWER_DOMAIN_MFG_ASYNC] = { -+ .name = "mfg_async", -+ .sta_mask = PWR_STATUS_MFG_ASYNC, -+ .ctl_offs = SPM_MFG_ASYNC_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = 0, -+ .clk_id = {CLK_MFG}, -+ }, -+ [MT8173_POWER_DOMAIN_MFG_2D] = { -+ .name = "mfg_2d", -+ .sta_mask = PWR_STATUS_MFG_2D, -+ .ctl_offs = SPM_MFG_2D_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(13, 12), -+ .clk_id = {CLK_NONE}, -+ }, -+ [MT8173_POWER_DOMAIN_MFG] = { -+ .name = "mfg", -+ .sta_mask = PWR_STATUS_MFG, -+ .ctl_offs = SPM_MFG_PWR_CON, -+ .sram_pdn_bits = GENMASK(13, 8), -+ .sram_pdn_ack_bits = GENMASK(21, 16), -+ .clk_id = {CLK_NONE}, -+ .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S | -+ MT8173_TOP_AXI_PROT_EN_MFG_M0 | -+ MT8173_TOP_AXI_PROT_EN_MFG_M1 | -+ MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT, -+ }, -+}; -+ -+#define NUM_DOMAINS_MT8173 ARRAY_SIZE(scp_domain_data_mt8173) -+ -+static int __init scpsys_probe_mt8173(struct platform_device *pdev) -+{ -+ struct scp *scp; -+ struct genpd_onecell_data *pd_data; -+ int ret; -+ -+ scp = init_scp(pdev, scp_domain_data_mt8173, NUM_DOMAINS_MT8173); -+ if (IS_ERR(scp)) -+ return PTR_ERR(scp); -+ -+ mtk_register_power_domains(pdev, scp, NUM_DOMAINS_MT8173); -+ -+ pd_data = &scp->pd_data; -+ - ret = pm_genpd_add_subdomain(pd_data->domains[MT8173_POWER_DOMAIN_MFG_ASYNC], - pd_data->domains[MT8173_POWER_DOMAIN_MFG_2D]); - if (ret && IS_ENABLED(CONFIG_PM)) -@@ -517,21 +574,36 @@ static int scpsys_probe(struct platform_ - if (ret && IS_ENABLED(CONFIG_PM)) - dev_err(&pdev->dev, "Failed to add subdomain: %d\n", ret); - -- ret = of_genpd_add_provider_onecell(pdev->dev.of_node, pd_data); -- if (ret) -- dev_err(&pdev->dev, "Failed to add OF provider: %d\n", ret); -- - return 0; - } - -+/* -+ * scpsys driver init -+ */ -+ - static const struct of_device_id of_scpsys_match_tbl[] = { - { - .compatible = "mediatek,mt8173-scpsys", -+ .data = scpsys_probe_mt8173, - }, { - /* sentinel */ - } - }; - -+static int scpsys_probe(struct platform_device *pdev) -+{ -+ int (*probe)(struct platform_device *); -+ const struct of_device_id *of_id; -+ -+ of_id = of_match_node(of_scpsys_match_tbl, pdev->dev.of_node); -+ if (!of_id || !of_id->data) -+ return -EINVAL; -+ -+ probe = of_id->data; -+ -+ return probe(pdev); -+} -+ - static struct platform_driver scpsys_drv = { - .probe = scpsys_probe, - .driver = { diff --git a/target/linux/mediatek/patches-4.9/0009-soc-mediatek-Add-MT2701-scpsys-driver.patch b/target/linux/mediatek/patches-4.9/0009-soc-mediatek-Add-MT2701-scpsys-driver.patch deleted file mode 100644 index 0b4763517..000000000 --- a/target/linux/mediatek/patches-4.9/0009-soc-mediatek-Add-MT2701-scpsys-driver.patch +++ /dev/null @@ -1,194 +0,0 @@ -From fb9f97e047f5a831a54cd61529b8cfdc4d413bb6 Mon Sep 17 00:00:00 2001 -From: Shunli Wang -Date: Thu, 20 Oct 2016 16:56:38 +0800 -Subject: [PATCH 09/57] soc: mediatek: Add MT2701 scpsys driver - -Add scpsys driver for MT2701. - -mtk-scpsys now supports MT8173 (arm64) and MT2701 (arm). So it should -be enabled on both arm64 and arm platforms. - -Signed-off-by: Shunli Wang -Signed-off-by: James Liao -Reviewed-by: Kevin Hilman -Signed-off-by: Matthias Brugger ---- - drivers/soc/mediatek/Kconfig | 2 +- - drivers/soc/mediatek/mtk-scpsys.c | 108 +++++++++++++++++++++++++++++++++++++- - 2 files changed, 108 insertions(+), 2 deletions(-) - ---- a/drivers/soc/mediatek/Kconfig -+++ b/drivers/soc/mediatek/Kconfig -@@ -23,7 +23,7 @@ config MTK_PMIC_WRAP - config MTK_SCPSYS - bool "MediaTek SCPSYS Support" - depends on ARCH_MEDIATEK || COMPILE_TEST -- default ARM64 && ARCH_MEDIATEK -+ default ARCH_MEDIATEK - select REGMAP - select MTK_INFRACFG - select PM_GENERIC_DOMAINS if PM ---- a/drivers/soc/mediatek/mtk-scpsys.c -+++ b/drivers/soc/mediatek/mtk-scpsys.c -@@ -20,6 +20,7 @@ - #include - #include - -+#include - #include - - #define SPM_VDE_PWR_CON 0x0210 -@@ -27,8 +28,13 @@ - #define SPM_VEN_PWR_CON 0x0230 - #define SPM_ISP_PWR_CON 0x0238 - #define SPM_DIS_PWR_CON 0x023c -+#define SPM_CONN_PWR_CON 0x0280 - #define SPM_VEN2_PWR_CON 0x0298 --#define SPM_AUDIO_PWR_CON 0x029c -+#define SPM_AUDIO_PWR_CON 0x029c /* MT8173 */ -+#define SPM_BDP_PWR_CON 0x029c /* MT2701 */ -+#define SPM_ETH_PWR_CON 0x02a0 -+#define SPM_HIF_PWR_CON 0x02a4 -+#define SPM_IFR_MSC_PWR_CON 0x02a8 - #define SPM_MFG_2D_PWR_CON 0x02c0 - #define SPM_MFG_ASYNC_PWR_CON 0x02c4 - #define SPM_USB_PWR_CON 0x02cc -@@ -42,10 +48,15 @@ - #define PWR_ON_2ND_BIT BIT(3) - #define PWR_CLK_DIS_BIT BIT(4) - -+#define PWR_STATUS_CONN BIT(1) - #define PWR_STATUS_DISP BIT(3) - #define PWR_STATUS_MFG BIT(4) - #define PWR_STATUS_ISP BIT(5) - #define PWR_STATUS_VDEC BIT(7) -+#define PWR_STATUS_BDP BIT(14) -+#define PWR_STATUS_ETH BIT(15) -+#define PWR_STATUS_HIF BIT(16) -+#define PWR_STATUS_IFR_MSC BIT(17) - #define PWR_STATUS_VENC_LT BIT(20) - #define PWR_STATUS_VENC BIT(21) - #define PWR_STATUS_MFG_2D BIT(22) -@@ -59,6 +70,7 @@ enum clk_id { - CLK_MFG, - CLK_VENC, - CLK_VENC_LT, -+ CLK_ETHIF, - CLK_MAX, - }; - -@@ -68,6 +80,7 @@ static const char * const clk_names[] = - "mfg", - "venc", - "venc_lt", -+ "ethif", - NULL, - }; - -@@ -455,6 +468,96 @@ static void mtk_register_power_domains(s - } - - /* -+ * MT2701 power domain support -+ */ -+ -+static const struct scp_domain_data scp_domain_data_mt2701[] = { -+ [MT2701_POWER_DOMAIN_CONN] = { -+ .name = "conn", -+ .sta_mask = PWR_STATUS_CONN, -+ .ctl_offs = SPM_CONN_PWR_CON, -+ .bus_prot_mask = 0x0104, -+ .clk_id = {CLK_NONE}, -+ .active_wakeup = true, -+ }, -+ [MT2701_POWER_DOMAIN_DISP] = { -+ .name = "disp", -+ .sta_mask = PWR_STATUS_DISP, -+ .ctl_offs = SPM_DIS_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .clk_id = {CLK_MM}, -+ .bus_prot_mask = 0x0002, -+ .active_wakeup = true, -+ }, -+ [MT2701_POWER_DOMAIN_VDEC] = { -+ .name = "vdec", -+ .sta_mask = PWR_STATUS_VDEC, -+ .ctl_offs = SPM_VDE_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(12, 12), -+ .clk_id = {CLK_MM}, -+ .active_wakeup = true, -+ }, -+ [MT2701_POWER_DOMAIN_ISP] = { -+ .name = "isp", -+ .sta_mask = PWR_STATUS_ISP, -+ .ctl_offs = SPM_ISP_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(13, 12), -+ .clk_id = {CLK_MM}, -+ .active_wakeup = true, -+ }, -+ [MT2701_POWER_DOMAIN_BDP] = { -+ .name = "bdp", -+ .sta_mask = PWR_STATUS_BDP, -+ .ctl_offs = SPM_BDP_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .clk_id = {CLK_NONE}, -+ .active_wakeup = true, -+ }, -+ [MT2701_POWER_DOMAIN_ETH] = { -+ .name = "eth", -+ .sta_mask = PWR_STATUS_ETH, -+ .ctl_offs = SPM_ETH_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(15, 12), -+ .clk_id = {CLK_ETHIF}, -+ .active_wakeup = true, -+ }, -+ [MT2701_POWER_DOMAIN_HIF] = { -+ .name = "hif", -+ .sta_mask = PWR_STATUS_HIF, -+ .ctl_offs = SPM_HIF_PWR_CON, -+ .sram_pdn_bits = GENMASK(11, 8), -+ .sram_pdn_ack_bits = GENMASK(15, 12), -+ .clk_id = {CLK_ETHIF}, -+ .active_wakeup = true, -+ }, -+ [MT2701_POWER_DOMAIN_IFR_MSC] = { -+ .name = "ifr_msc", -+ .sta_mask = PWR_STATUS_IFR_MSC, -+ .ctl_offs = SPM_IFR_MSC_PWR_CON, -+ .clk_id = {CLK_NONE}, -+ .active_wakeup = true, -+ }, -+}; -+ -+#define NUM_DOMAINS_MT2701 ARRAY_SIZE(scp_domain_data_mt2701) -+ -+static int __init scpsys_probe_mt2701(struct platform_device *pdev) -+{ -+ struct scp *scp; -+ -+ scp = init_scp(pdev, scp_domain_data_mt2701, NUM_DOMAINS_MT2701); -+ if (IS_ERR(scp)) -+ return PTR_ERR(scp); -+ -+ mtk_register_power_domains(pdev, scp, NUM_DOMAINS_MT2701); -+ -+ return 0; -+} -+ -+/* - * MT8173 power domain support - */ - -@@ -583,6 +686,9 @@ static int __init scpsys_probe_mt8173(st - - static const struct of_device_id of_scpsys_match_tbl[] = { - { -+ .compatible = "mediatek,mt2701-scpsys", -+ .data = scpsys_probe_mt2701, -+ }, { - .compatible = "mediatek,mt8173-scpsys", - .data = scpsys_probe_mt8173, - }, { diff --git a/target/linux/mediatek/patches-4.9/0010-clk-add-hifsys-reset.patch b/target/linux/mediatek/patches-4.9/0010-clk-add-hifsys-reset.patch deleted file mode 100644 index a7ebb060c..000000000 --- a/target/linux/mediatek/patches-4.9/0010-clk-add-hifsys-reset.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 600e2bd5c3019f31e90ec876f4efb6c209cf0d73 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Wed, 6 Jan 2016 20:06:49 +0100 -Subject: [PATCH 10/57] clk: add hifsys reset - -Hi, - -small patch to add hifsys reset bits. Maybe you could add it to the next -version of your patch series. i have teste scpsys and clk on mt7623 today -and it works well. - -thanks, - John - -Signed-off-by: John Crispin ---- - drivers/clk/mediatek/clk-mt2701.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/clk/mediatek/clk-mt2701.c -+++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -1000,6 +1000,8 @@ static void __init mtk_hifsys_init(struc - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); -+ -+ mtk_register_reset_controller(node, 1, 0x34); - } - CLK_OF_DECLARE(mtk_hifsys, "mediatek,mt2701-hifsys", mtk_hifsys_init); - diff --git a/target/linux/mediatek/patches-4.9/0011-scpsys-various-fixes.patch b/target/linux/mediatek/patches-4.9/0011-scpsys-various-fixes.patch deleted file mode 100644 index 8a9da5e67..000000000 --- a/target/linux/mediatek/patches-4.9/0011-scpsys-various-fixes.patch +++ /dev/null @@ -1,20 +0,0 @@ -From 1e889b3d38ab5fb425762da57313b4cc8fc2f165 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sun, 21 Feb 2016 13:52:12 +0100 -Subject: [PATCH 11/57] scpsys: various fixes - ---- - drivers/clk/mediatek/clk-mt2701.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/clk/mediatek/clk-mt2701.c -+++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -1043,6 +1043,8 @@ static void __init mtk_ethsys_init(struc - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); -+ -+ mtk_register_reset_controller(node, 1, 0x34); - } - CLK_OF_DECLARE(mtk_ethsys, "mediatek,mt2701-ethsys", mtk_ethsys_init); - diff --git a/target/linux/mediatek/patches-4.9/0013-clk-mediatek-enable-critical-clocks.patch b/target/linux/mediatek/patches-4.9/0013-clk-mediatek-enable-critical-clocks.patch deleted file mode 100644 index 26257bd42..000000000 --- a/target/linux/mediatek/patches-4.9/0013-clk-mediatek-enable-critical-clocks.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 03bead9276653dc842f6970250bc7eba41faf777 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 31 Mar 2016 06:46:51 +0200 -Subject: [PATCH 13/57] clk: mediatek: enable critical clocks - -Signed-off-by: John Crispin ---- - drivers/clk/mediatek/clk-mt2701.c | 22 ++++++++++++++++++++-- - 1 file changed, 20 insertions(+), 2 deletions(-) - ---- a/drivers/clk/mediatek/clk-mt2701.c -+++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -573,6 +573,20 @@ static const struct mtk_gate top_clks[] - GATE_TOP_AUD(CLK_TOP_AUD_I2S6_MCLK, "aud_i2s6_mclk", "aud_k6_src_div", 28), - }; - -+static struct clk_onecell_data *mt7623_top_clk_data __initdata; -+static struct clk_onecell_data *mt7623_pll_clk_data __initdata; -+ -+static void __init mtk_clk_enable_critical(void) -+{ -+ if (!mt7623_top_clk_data || !mt7623_pll_clk_data) -+ return; -+ -+ clk_prepare_enable(mt7623_pll_clk_data->clks[CLK_APMIXED_ARMPLL]); -+ clk_prepare_enable(mt7623_top_clk_data->clks[CLK_TOP_MEM_SEL]); -+ clk_prepare_enable(mt7623_top_clk_data->clks[CLK_TOP_DDRPHYCFG_SEL]); -+ clk_prepare_enable(mt7623_top_clk_data->clks[CLK_TOP_RTC_SEL]); -+} -+ - static void __init mtk_topckgen_init(struct device_node *node) - { - struct clk_onecell_data *clk_data; -@@ -585,7 +599,7 @@ static void __init mtk_topckgen_init(str - return; - } - -- clk_data = mtk_alloc_clk_data(CLK_TOP_NR); -+ mt7623_top_clk_data = clk_data = mtk_alloc_clk_data(CLK_TOP_NR); - - mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), - clk_data); -@@ -606,6 +620,8 @@ static void __init mtk_topckgen_init(str - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); -+ -+ mtk_clk_enable_critical(); - } - CLK_OF_DECLARE(mtk_topckgen, "mediatek,mt2701-topckgen", mtk_topckgen_init); - -@@ -1202,7 +1218,7 @@ static void __init mtk_apmixedsys_init(s - struct clk_onecell_data *clk_data; - int r; - -- clk_data = mtk_alloc_clk_data(ARRAY_SIZE(apmixed_plls)); -+ mt7623_pll_clk_data = clk_data = mtk_alloc_clk_data(ARRAY_SIZE(apmixed_plls)); - if (!clk_data) - return; - -@@ -1213,6 +1229,8 @@ static void __init mtk_apmixedsys_init(s - if (r) - pr_err("%s(): could not register clock provider: %d\n", - __func__, r); -+ -+ mtk_clk_enable_critical(); - } - CLK_OF_DECLARE(mtk_apmixedsys, "mediatek,mt2701-apmixedsys", - mtk_apmixedsys_init); diff --git a/target/linux/mediatek/patches-4.9/0014-clk-mediatek-Export-CPU-mux-clocks-for-CPU-frequency.patch b/target/linux/mediatek/patches-4.9/0014-clk-mediatek-Export-CPU-mux-clocks-for-CPU-frequency.patch deleted file mode 100644 index 7e19c6f23..000000000 --- a/target/linux/mediatek/patches-4.9/0014-clk-mediatek-Export-CPU-mux-clocks-for-CPU-frequency.patch +++ /dev/null @@ -1,287 +0,0 @@ -From 3a947321d72af191ee87a390295c661c876cc6f4 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 31 Mar 2016 02:26:37 +0200 -Subject: [PATCH 14/57] clk: mediatek: Export CPU mux clocks for CPU frequency - control - -This patch adds CPU mux clocks which are used by Mediatek cpufreq driver -for intermediate clock source switching. - -Signed-off-by: Pi-Cheng Chen ---- - drivers/clk/mediatek/Makefile | 2 +- - drivers/clk/mediatek/clk-cpumux.c | 127 +++++++++++++++++++++++++++++++++ - drivers/clk/mediatek/clk-cpumux.h | 22 ++++++ - drivers/clk/mediatek/clk-mt2701.c | 8 +++ - drivers/clk/mediatek/clk-mt8173.c | 23 ++++++ - include/dt-bindings/clock/mt2701-clk.h | 3 +- - include/dt-bindings/clock/mt8173-clk.h | 4 +- - 7 files changed, 186 insertions(+), 3 deletions(-) - create mode 100644 drivers/clk/mediatek/clk-cpumux.c - create mode 100644 drivers/clk/mediatek/clk-cpumux.h - ---- a/drivers/clk/mediatek/Makefile -+++ b/drivers/clk/mediatek/Makefile -@@ -1,4 +1,4 @@ --obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o -+obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o - obj-$(CONFIG_RESET_CONTROLLER) += reset.o - obj-$(CONFIG_COMMON_CLK_MT2701) += clk-mt2701.o - obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135.o ---- /dev/null -+++ b/drivers/clk/mediatek/clk-cpumux.c -@@ -0,0 +1,127 @@ -+/* -+ * Copyright (c) 2015 Linaro Ltd. -+ * Author: Pi-Cheng Chen -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+ -+#include "clk-mtk.h" -+#include "clk-cpumux.h" -+ -+struct mtk_clk_cpumux { -+ struct clk_hw hw; -+ struct regmap *regmap; -+ u32 reg; -+ u32 mask; -+ u8 shift; -+}; -+ -+static inline struct mtk_clk_cpumux *to_mtk_clk_mux(struct clk_hw *_hw) -+{ -+ return container_of(_hw, struct mtk_clk_cpumux, hw); -+} -+ -+static u8 clk_cpumux_get_parent(struct clk_hw *hw) -+{ -+ struct mtk_clk_cpumux *mux = to_mtk_clk_mux(hw); -+ int num_parents = clk_hw_get_num_parents(hw); -+ unsigned int val; -+ -+ regmap_read(mux->regmap, mux->reg, &val); -+ -+ val >>= mux->shift; -+ val &= mux->mask; -+ -+ if (val >= num_parents) -+ return -EINVAL; -+ -+ return val; -+} -+ -+static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index) -+{ -+ struct mtk_clk_cpumux *mux = to_mtk_clk_mux(hw); -+ u32 mask, val; -+ -+ val = index << mux->shift; -+ mask = mux->mask << mux->shift; -+ -+ return regmap_update_bits(mux->regmap, mux->reg, mask, val); -+} -+ -+static const struct clk_ops clk_cpumux_ops = { -+ .get_parent = clk_cpumux_get_parent, -+ .set_parent = clk_cpumux_set_parent, -+}; -+ -+static struct clk __init *mtk_clk_register_cpumux(const struct mtk_composite *mux, -+ struct regmap *regmap) -+{ -+ struct mtk_clk_cpumux *cpumux; -+ struct clk *clk; -+ struct clk_init_data init; -+ -+ cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL); -+ if (!cpumux) -+ return ERR_PTR(-ENOMEM); -+ -+ init.name = mux->name; -+ init.ops = &clk_cpumux_ops; -+ init.parent_names = mux->parent_names; -+ init.num_parents = mux->num_parents; -+ init.flags = mux->flags; -+ -+ cpumux->reg = mux->mux_reg; -+ cpumux->shift = mux->mux_shift; -+ cpumux->mask = BIT(mux->mux_width) - 1; -+ cpumux->regmap = regmap; -+ cpumux->hw.init = &init; -+ -+ clk = clk_register(NULL, &cpumux->hw); -+ if (IS_ERR(clk)) -+ kfree(cpumux); -+ -+ return clk; -+} -+ -+int __init mtk_clk_register_cpumuxes(struct device_node *node, -+ const struct mtk_composite *clks, int num, -+ struct clk_onecell_data *clk_data) -+{ -+ int i; -+ struct clk *clk; -+ struct regmap *regmap; -+ -+ regmap = syscon_node_to_regmap(node); -+ if (IS_ERR(regmap)) { -+ pr_err("Cannot find regmap for %s: %ld\n", node->full_name, -+ PTR_ERR(regmap)); -+ return PTR_ERR(regmap); -+ } -+ -+ for (i = 0; i < num; i++) { -+ const struct mtk_composite *mux = &clks[i]; -+ -+ clk = mtk_clk_register_cpumux(mux, regmap); -+ if (IS_ERR(clk)) { -+ pr_err("Failed to register clk %s: %ld\n", -+ mux->name, PTR_ERR(clk)); -+ continue; -+ } -+ -+ clk_data->clks[mux->id] = clk; -+ } -+ -+ return 0; -+} ---- /dev/null -+++ b/drivers/clk/mediatek/clk-cpumux.h -@@ -0,0 +1,22 @@ -+/* -+ * Copyright (c) 2015 Linaro Ltd. -+ * Author: Pi-Cheng Chen -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __DRV_CLK_CPUMUX_H -+#define __DRV_CLK_CPUMUX_H -+ -+int mtk_clk_register_cpumuxes(struct device_node *node, -+ const struct mtk_composite *clks, int num, -+ struct clk_onecell_data *clk_data); -+ -+#endif /* __DRV_CLK_CPUMUX_H */ ---- a/drivers/clk/mediatek/clk-mt2701.c -+++ b/drivers/clk/mediatek/clk-mt2701.c -@@ -18,6 +18,7 @@ - - #include "clk-mtk.h" - #include "clk-gate.h" -+#include "clk-cpumux.h" - - #include - -@@ -465,6 +466,10 @@ static const char * const cpu_parents[] - "mmpll" - }; - -+static const struct mtk_composite cpu_muxes[] __initconst = { -+ MUX(CLK_INFRA_CPUSEL, "infra_cpu_sel", cpu_parents, 0x0000, 2, 2), -+}; -+ - static const struct mtk_composite top_muxes[] __initconst = { - MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, - 0x0040, 0, 3, INVALID_MUX_GATE_BIT), -@@ -677,6 +682,9 @@ static void __init mtk_infrasys_init(str - mtk_clk_register_factors(infra_fixed_divs, ARRAY_SIZE(infra_fixed_divs), - clk_data); - -+ mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes), -+ clk_data); -+ - r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); - if (r) - pr_err("%s(): could not register clock provider: %d\n", ---- a/drivers/clk/mediatek/clk-mt8173.c -+++ b/drivers/clk/mediatek/clk-mt8173.c -@@ -18,6 +18,7 @@ - - #include "clk-mtk.h" - #include "clk-gate.h" -+#include "clk-cpumux.h" - - #include - -@@ -525,6 +526,25 @@ static const char * const i2s3_b_ck_pare - "apll2_div5" - }; - -+static const char * const ca53_parents[] __initconst = { -+ "clk26m", -+ "armca7pll", -+ "mainpll", -+ "univpll" -+}; -+ -+static const char * const ca57_parents[] __initconst = { -+ "clk26m", -+ "armca15pll", -+ "mainpll", -+ "univpll" -+}; -+ -+static const struct mtk_composite cpu_muxes[] __initconst = { -+ MUX(CLK_INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2), -+ MUX(CLK_INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2), -+}; -+ - static const struct mtk_composite top_muxes[] __initconst = { - /* CLK_CFG_0 */ - MUX(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3), -@@ -948,6 +968,9 @@ static void __init mtk_infrasys_init(str - clk_data); - mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); - -+ mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes), -+ clk_data); -+ - r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); - if (r) - pr_err("%s(): could not register clock provider: %d\n", ---- a/include/dt-bindings/clock/mt2701-clk.h -+++ b/include/dt-bindings/clock/mt2701-clk.h -@@ -221,7 +221,8 @@ - #define CLK_INFRA_PMICWRAP 17 - #define CLK_INFRA_DDCCI 18 - #define CLK_INFRA_CLK_13M 19 --#define CLK_INFRA_NR 20 -+#define CLK_INFRA_CPUSEL 20 -+#define CLK_INFRA_NR 21 - - /* PERICFG */ - ---- a/include/dt-bindings/clock/mt8173-clk.h -+++ b/include/dt-bindings/clock/mt8173-clk.h -@@ -193,7 +193,9 @@ - #define CLK_INFRA_PMICSPI 10 - #define CLK_INFRA_PMICWRAP 11 - #define CLK_INFRA_CLK_13M 12 --#define CLK_INFRA_NR_CLK 13 -+#define CLK_INFRA_CA53SEL 13 -+#define CLK_INFRA_CA57SEL 14 -+#define CLK_INFRA_NR_CLK 15 - - /* PERI_SYS */ - diff --git a/target/linux/mediatek/patches-4.9/0015-cpufreq-mediatek-add-driver.patch b/target/linux/mediatek/patches-4.9/0015-cpufreq-mediatek-add-driver.patch deleted file mode 100644 index af60025c0..000000000 --- a/target/linux/mediatek/patches-4.9/0015-cpufreq-mediatek-add-driver.patch +++ /dev/null @@ -1,433 +0,0 @@ -From 8aa2c6c4d8b20c0e9c69b15db4a0039d33f8b365 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Wed, 30 Mar 2016 23:48:53 +0200 -Subject: [PATCH 15/57] cpufreq: mediatek: add driver - -Signed-off-by: John Crispin ---- - drivers/cpufreq/Kconfig.arm | 9 + - drivers/cpufreq/Makefile | 1 + - drivers/cpufreq/mt7623-cpufreq.c | 389 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 399 insertions(+) - create mode 100644 drivers/cpufreq/mt7623-cpufreq.c - ---- a/drivers/cpufreq/Kconfig.arm -+++ b/drivers/cpufreq/Kconfig.arm -@@ -74,6 +74,15 @@ config ARM_KIRKWOOD_CPUFREQ - This adds the CPUFreq driver for Marvell Kirkwood - SoCs. - -+config ARM_MT7623_CPUFREQ -+ bool "Mediatek MT7623 CPUFreq support" -+ depends on ARCH_MEDIATEK && REGULATOR -+ depends on ARM || (ARM_CPU_TOPOLOGY && COMPILE_TEST) -+ depends on !CPU_THERMAL || THERMAL=y -+ select PM_OPP -+ help -+ This adds the CPUFreq driver support for Mediatek MT7623 SoC. -+ - config ARM_MT8173_CPUFREQ - tristate "Mediatek MT8173 CPUFreq support" - depends on ARCH_MEDIATEK && REGULATOR ---- a/drivers/cpufreq/Makefile -+++ b/drivers/cpufreq/Makefile -@@ -58,6 +58,7 @@ obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += hi - obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o - obj-$(CONFIG_ARM_INTEGRATOR) += integrator-cpufreq.o - obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o -+obj-$(CONFIG_ARM_MT7623_CPUFREQ) += mt7623-cpufreq.o - obj-$(CONFIG_ARM_MT8173_CPUFREQ) += mt8173-cpufreq.o - obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o - obj-$(CONFIG_ARM_PXA2xx_CPUFREQ) += pxa2xx-cpufreq.o ---- /dev/null -+++ b/drivers/cpufreq/mt7623-cpufreq.c -@@ -0,0 +1,389 @@ -+/* -+ * Copyright (c) 2015 Linaro Ltd. -+ * Author: Pi-Cheng Chen -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define VOLT_TOL (10000) -+ -+/* -+ * When scaling the clock frequency of a CPU clock domain, the clock source -+ * needs to be switched to another stable PLL clock temporarily until -+ * the original PLL becomes stable at target frequency. -+ */ -+struct mtk_cpu_dvfs_info { -+ struct device *cpu_dev; -+ struct regulator *proc_reg; -+ struct clk *cpu_clk; -+ struct clk *inter_clk; -+ struct thermal_cooling_device *cdev; -+ int intermediate_voltage; -+}; -+ -+static int mtk_cpufreq_set_voltage(struct mtk_cpu_dvfs_info *info, int vproc) -+{ -+ return regulator_set_voltage(info->proc_reg, vproc, -+ vproc + VOLT_TOL); -+} -+ -+static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, -+ unsigned int index) -+{ -+ struct cpufreq_frequency_table *freq_table = policy->freq_table; -+ struct clk *cpu_clk = policy->clk; -+ struct clk *armpll = clk_get_parent(cpu_clk); -+ struct mtk_cpu_dvfs_info *info = policy->driver_data; -+ struct device *cpu_dev = info->cpu_dev; -+ struct dev_pm_opp *opp; -+ long freq_hz, old_freq_hz; -+ int vproc, old_vproc, inter_vproc, target_vproc, ret; -+ -+ inter_vproc = info->intermediate_voltage; -+ -+ old_freq_hz = clk_get_rate(cpu_clk); -+ old_vproc = regulator_get_voltage(info->proc_reg); -+ -+ freq_hz = freq_table[index].frequency * 1000; -+ -+ rcu_read_lock(); -+ opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_hz); -+ if (IS_ERR(opp)) { -+ rcu_read_unlock(); -+ pr_err("cpu%d: failed to find OPP for %ld\n", -+ policy->cpu, freq_hz); -+ return PTR_ERR(opp); -+ } -+ vproc = dev_pm_opp_get_voltage(opp); -+ rcu_read_unlock(); -+ -+ /* -+ * If the new voltage or the intermediate voltage is higher than the -+ * current voltage, scale up voltage first. -+ */ -+ target_vproc = (inter_vproc > vproc) ? inter_vproc : vproc; -+ if (old_vproc < target_vproc) { -+ ret = mtk_cpufreq_set_voltage(info, target_vproc); -+ if (ret) { -+ pr_err("cpu%d: failed to scale up voltage!\n", -+ policy->cpu); -+ mtk_cpufreq_set_voltage(info, old_vproc); -+ return ret; -+ } -+ } -+ -+ /* Reparent the CPU clock to intermediate clock. */ -+ ret = clk_set_parent(cpu_clk, info->inter_clk); -+ if (ret) { -+ pr_err("cpu%d: failed to re-parent cpu clock!\n", -+ policy->cpu); -+ mtk_cpufreq_set_voltage(info, old_vproc); -+ WARN_ON(1); -+ return ret; -+ } -+ -+ /* Set the original PLL to target rate. */ -+ ret = clk_set_rate(armpll, freq_hz); -+ if (ret) { -+ pr_err("cpu%d: failed to scale cpu clock rate!\n", -+ policy->cpu); -+ clk_set_parent(cpu_clk, armpll); -+ mtk_cpufreq_set_voltage(info, old_vproc); -+ return ret; -+ } -+ -+ /* Set parent of CPU clock back to the original PLL. */ -+ ret = clk_set_parent(cpu_clk, armpll); -+ if (ret) { -+ pr_err("cpu%d: failed to re-parent cpu clock!\n", -+ policy->cpu); -+ mtk_cpufreq_set_voltage(info, inter_vproc); -+ WARN_ON(1); -+ return ret; -+ } -+ -+ /* -+ * If the new voltage is lower than the intermediate voltage or the -+ * original voltage, scale down to the new voltage. -+ */ -+ if (vproc < inter_vproc || vproc < old_vproc) { -+ ret = mtk_cpufreq_set_voltage(info, vproc); -+ if (ret) { -+ pr_err("cpu%d: failed to scale down voltage!\n", -+ policy->cpu); -+ clk_set_parent(cpu_clk, info->inter_clk); -+ clk_set_rate(armpll, old_freq_hz); -+ clk_set_parent(cpu_clk, armpll); -+ return ret; -+ } -+ } -+ -+ return 0; -+} -+ -+static void mtk_cpufreq_ready(struct cpufreq_policy *policy) -+{ -+ struct mtk_cpu_dvfs_info *info = policy->driver_data; -+ struct device_node *np = of_node_get(info->cpu_dev->of_node); -+ -+ if (WARN_ON(!np)) -+ return; -+ -+ if (of_find_property(np, "#cooling-cells", NULL)) { -+ info->cdev = of_cpufreq_cooling_register(np, -+ policy->related_cpus); -+ -+ if (IS_ERR(info->cdev)) { -+ dev_err(info->cpu_dev, -+ "running cpufreq without cooling device: %ld\n", -+ PTR_ERR(info->cdev)); -+ -+ info->cdev = NULL; -+ } -+ } -+ -+ of_node_put(np); -+} -+ -+static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) -+{ -+ struct device *cpu_dev; -+ struct regulator *proc_reg = ERR_PTR(-ENODEV); -+ struct clk *cpu_clk = ERR_PTR(-ENODEV); -+ struct clk *inter_clk = ERR_PTR(-ENODEV); -+ struct dev_pm_opp *opp; -+ unsigned long rate; -+ int ret; -+ -+ cpu_dev = get_cpu_device(cpu); -+ if (!cpu_dev) { -+ pr_err("failed to get cpu%d device\n", cpu); -+ return -ENODEV; -+ } -+ -+ cpu_clk = clk_get(cpu_dev, "cpu"); -+ if (IS_ERR(cpu_clk)) { -+ if (PTR_ERR(cpu_clk) == -EPROBE_DEFER) -+ pr_warn("cpu clk for cpu%d not ready, retry.\n", cpu); -+ else -+ pr_err("failed to get cpu clk for cpu%d\n", cpu); -+ -+ ret = PTR_ERR(cpu_clk); -+ return ret; -+ } -+ -+ inter_clk = clk_get(cpu_dev, "intermediate"); -+ if (IS_ERR(inter_clk)) { -+ if (PTR_ERR(inter_clk) == -EPROBE_DEFER) -+ pr_warn("intermediate clk for cpu%d not ready, retry.\n", -+ cpu); -+ else -+ pr_err("failed to get intermediate clk for cpu%d\n", -+ cpu); -+ -+ ret = PTR_ERR(inter_clk); -+ goto out_free_resources; -+ } -+ -+ proc_reg = regulator_get_exclusive(cpu_dev, "proc"); -+ if (IS_ERR(proc_reg)) { -+ if (PTR_ERR(proc_reg) == -EPROBE_DEFER) -+ pr_warn("proc regulator for cpu%d not ready, retry.\n", -+ cpu); -+ else -+ pr_err("failed to get proc regulator for cpu%d\n", -+ cpu); -+ -+ ret = PTR_ERR(proc_reg); -+ goto out_free_resources; -+ } -+ -+ ret = dev_pm_opp_of_add_table(cpu_dev); -+ if (ret) { -+ pr_warn("no OPP table for cpu%d\n", cpu); -+ goto out_free_resources; -+ } -+ -+ /* Search a safe voltage for intermediate frequency. */ -+ rate = clk_get_rate(inter_clk); -+ rcu_read_lock(); -+ opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); -+ if (IS_ERR(opp)) { -+ rcu_read_unlock(); -+ pr_err("failed to get intermediate opp for cpu%d\n", cpu); -+ ret = PTR_ERR(opp); -+ goto out_free_opp_table; -+ } -+ info->intermediate_voltage = dev_pm_opp_get_voltage(opp); -+ rcu_read_unlock(); -+ -+ info->cpu_dev = cpu_dev; -+ info->proc_reg = proc_reg; -+ info->cpu_clk = cpu_clk; -+ info->inter_clk = inter_clk; -+ -+ return 0; -+ -+out_free_opp_table: -+ dev_pm_opp_of_remove_table(cpu_dev); -+ -+out_free_resources: -+ if (!IS_ERR(proc_reg)) -+ regulator_put(proc_reg); -+ if (!IS_ERR(cpu_clk)) -+ clk_put(cpu_clk); -+ if (!IS_ERR(inter_clk)) -+ clk_put(inter_clk); -+ -+ return ret; -+} -+ -+static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) -+{ -+ if (!IS_ERR(info->proc_reg)) -+ regulator_put(info->proc_reg); -+ if (!IS_ERR(info->cpu_clk)) -+ clk_put(info->cpu_clk); -+ if (!IS_ERR(info->inter_clk)) -+ clk_put(info->inter_clk); -+ -+ dev_pm_opp_of_remove_table(info->cpu_dev); -+} -+ -+static int mtk_cpufreq_init(struct cpufreq_policy *policy) -+{ -+ struct mtk_cpu_dvfs_info *info; -+ struct cpufreq_frequency_table *freq_table; -+ int ret; -+ -+ info = kzalloc(sizeof(*info), GFP_KERNEL); -+ if (!info) -+ return -ENOMEM; -+ -+ ret = mtk_cpu_dvfs_info_init(info, policy->cpu); -+ if (ret) { -+ pr_err("%s failed to initialize dvfs info for cpu%d\n", -+ __func__, policy->cpu); -+ goto out_free_dvfs_info; -+ } -+ -+ ret = dev_pm_opp_init_cpufreq_table(info->cpu_dev, &freq_table); -+ if (ret) { -+ pr_err("failed to init cpufreq table for cpu%d: %d\n", -+ policy->cpu, ret); -+ goto out_release_dvfs_info; -+ } -+ -+ ret = cpufreq_table_validate_and_show(policy, freq_table); -+ if (ret) { -+ pr_err("%s: invalid frequency table: %d\n", __func__, ret); -+ goto out_free_cpufreq_table; -+ } -+ -+ /* CPUs in the same cluster share a clock and power domain. */ -+ cpumask_setall(policy->cpus); -+ policy->driver_data = info; -+ policy->clk = info->cpu_clk; -+ -+ return 0; -+ -+out_free_cpufreq_table: -+ dev_pm_opp_free_cpufreq_table(info->cpu_dev, &freq_table); -+ -+out_release_dvfs_info: -+ mtk_cpu_dvfs_info_release(info); -+ -+out_free_dvfs_info: -+ kfree(info); -+ -+ return ret; -+} -+ -+static int mtk_cpufreq_exit(struct cpufreq_policy *policy) -+{ -+ struct mtk_cpu_dvfs_info *info = policy->driver_data; -+ -+ cpufreq_cooling_unregister(info->cdev); -+ dev_pm_opp_free_cpufreq_table(info->cpu_dev, &policy->freq_table); -+ mtk_cpu_dvfs_info_release(info); -+ kfree(info); -+ -+ return 0; -+} -+ -+static struct cpufreq_driver mt7623_cpufreq_driver = { -+ .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK, -+ .verify = cpufreq_generic_frequency_table_verify, -+ .target_index = mtk_cpufreq_set_target, -+ .get = cpufreq_generic_get, -+ .init = mtk_cpufreq_init, -+ .exit = mtk_cpufreq_exit, -+ .ready = mtk_cpufreq_ready, -+ .name = "mtk-cpufreq", -+ .attr = cpufreq_generic_attr, -+}; -+ -+static int mt7623_cpufreq_probe(struct platform_device *pdev) -+{ -+ int ret; -+ -+ ret = cpufreq_register_driver(&mt7623_cpufreq_driver); -+ if (ret) -+ pr_err("failed to register mtk cpufreq driver\n"); -+ -+ return ret; -+} -+ -+static struct platform_driver mt7623_cpufreq_platdrv = { -+ .driver = { -+ .name = "mt7623-cpufreq", -+ }, -+ .probe = mt7623_cpufreq_probe, -+}; -+ -+static int mt7623_cpufreq_driver_init(void) -+{ -+ struct platform_device *pdev; -+ int err; -+ -+ if (!of_machine_is_compatible("mediatek,mt7623")) -+ return -ENODEV; -+ -+ err = platform_driver_register(&mt7623_cpufreq_platdrv); -+ if (err) -+ return err; -+ -+ /* -+ * Since there's no place to hold device registration code and no -+ * device tree based way to match cpufreq driver yet, both the driver -+ * and the device registration codes are put here to handle defer -+ * probing. -+ */ -+ pdev = platform_device_register_simple("mt7623-cpufreq", -1, NULL, 0); -+ if (IS_ERR(pdev)) { -+ pr_err("failed to register mtk-cpufreq platform device\n"); -+ return PTR_ERR(pdev); -+ } -+ -+ return 0; -+} -+device_initcall(mt7623_cpufreq_driver_init); diff --git a/target/linux/mediatek/patches-4.9/0016-pwm-add-pwm-mediatek.patch b/target/linux/mediatek/patches-4.9/0016-pwm-add-pwm-mediatek.patch deleted file mode 100644 index 2e8414ea2..000000000 --- a/target/linux/mediatek/patches-4.9/0016-pwm-add-pwm-mediatek.patch +++ /dev/null @@ -1,274 +0,0 @@ -From 201be68268eddb1568c41780a62868cc1666a2de Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 6 May 2016 02:55:48 +0200 -Subject: [PATCH 16/57] pwm: add pwm-mediatek - -Signed-off-by: John Crispin ---- - drivers/pwm/Kconfig | 9 ++ - drivers/pwm/Makefile | 1 + - drivers/pwm/pwm-mediatek.c | 230 +++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 240 insertions(+) - create mode 100644 drivers/pwm/pwm-mediatek.c - ---- a/drivers/pwm/Kconfig -+++ b/drivers/pwm/Kconfig -@@ -282,6 +282,15 @@ config PWM_MTK_DISP - To compile this driver as a module, choose M here: the module - will be called pwm-mtk-disp. - -+config PWM_MEDIATEK -+ tristate "MediaTek PWM support" -+ depends on ARCH_MEDIATEK || COMPILE_TEST -+ help -+ Generic PWM framework driver for Mediatek ARM SoC. -+ -+ To compile this driver as a module, choose M here: the module -+ will be called pwm-mxs. -+ - config PWM_MXS - tristate "Freescale MXS PWM support" - depends on ARCH_MXS && OF ---- a/drivers/pwm/Makefile -+++ b/drivers/pwm/Makefile -@@ -25,6 +25,7 @@ obj-$(CONFIG_PWM_LPSS) += pwm-lpss.o - obj-$(CONFIG_PWM_LPSS_PCI) += pwm-lpss-pci.o - obj-$(CONFIG_PWM_LPSS_PLATFORM) += pwm-lpss-platform.o - obj-$(CONFIG_PWM_MESON) += pwm-meson.o -+obj-$(CONFIG_PWM_MEDIATEK) += pwm-mediatek.o - obj-$(CONFIG_PWM_MTK_DISP) += pwm-mtk-disp.o - obj-$(CONFIG_PWM_MXS) += pwm-mxs.o - obj-$(CONFIG_PWM_OMAP_DMTIMER) += pwm-omap-dmtimer.o ---- /dev/null -+++ b/drivers/pwm/pwm-mediatek.c -@@ -0,0 +1,230 @@ -+/* -+ * Mediatek Pulse Width Modulator driver -+ * -+ * Copyright (C) 2015 John Crispin -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define NUM_PWM 5 -+ -+/* PWM registers and bits definitions */ -+#define PWMCON 0x00 -+#define PWMHDUR 0x04 -+#define PWMLDUR 0x08 -+#define PWMGDUR 0x0c -+#define PWMWAVENUM 0x28 -+#define PWMDWIDTH 0x2c -+#define PWMTHRES 0x30 -+ -+/** -+ * struct mtk_pwm_chip - struct representing pwm chip -+ * -+ * @mmio_base: base address of pwm chip -+ * @chip: linux pwm chip representation -+ */ -+struct mtk_pwm_chip { -+ void __iomem *mmio_base; -+ struct pwm_chip chip; -+ struct clk *clk_top; -+ struct clk *clk_main; -+ struct clk *clk_pwm[NUM_PWM]; -+}; -+ -+static inline struct mtk_pwm_chip *to_mtk_pwm_chip(struct pwm_chip *chip) -+{ -+ return container_of(chip, struct mtk_pwm_chip, chip); -+} -+ -+static inline u32 mtk_pwm_readl(struct mtk_pwm_chip *chip, unsigned int num, -+ unsigned long offset) -+{ -+ return ioread32(chip->mmio_base + 0x10 + (num * 0x40) + offset); -+} -+ -+static inline void mtk_pwm_writel(struct mtk_pwm_chip *chip, -+ unsigned int num, unsigned long offset, -+ unsigned long val) -+{ -+ iowrite32(val, chip->mmio_base + 0x10 + (num * 0x40) + offset); -+} -+ -+static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, -+ int duty_ns, int period_ns) -+{ -+ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip); -+ u32 resolution = 100 / 4; -+ u32 clkdiv = 0; -+ -+ resolution = 1000000000 / (clk_get_rate(pc->clk_pwm[pwm->hwpwm])); -+ -+ while (period_ns / resolution > 8191) { -+ clkdiv++; -+ resolution *= 2; -+ } -+ -+ if (clkdiv > 7) -+ return -1; -+ -+ mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | BIT(3) | clkdiv); -+ mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution); -+ mtk_pwm_writel(pc, pwm->hwpwm, PWMTHRES, duty_ns / resolution); -+ return 0; -+} -+ -+static int mtk_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -+{ -+ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip); -+ u32 val; -+ int ret; -+ -+ ret = clk_prepare(pc->clk_pwm[pwm->hwpwm]); -+ if (ret < 0) -+ return ret; -+ -+ val = ioread32(pc->mmio_base); -+ val |= BIT(pwm->hwpwm); -+ iowrite32(val, pc->mmio_base); -+ -+ return 0; -+} -+ -+static void mtk_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) -+{ -+ struct mtk_pwm_chip *pc = to_mtk_pwm_chip(chip); -+ u32 val; -+ -+ val = ioread32(pc->mmio_base); -+ val &= ~BIT(pwm->hwpwm); -+ iowrite32(val, pc->mmio_base); -+ clk_unprepare(pc->clk_pwm[pwm->hwpwm]); -+} -+ -+static const struct pwm_ops mtk_pwm_ops = { -+ .config = mtk_pwm_config, -+ .enable = mtk_pwm_enable, -+ .disable = mtk_pwm_disable, -+ .owner = THIS_MODULE, -+}; -+ -+static int mtk_pwm_probe(struct platform_device *pdev) -+{ -+ struct mtk_pwm_chip *pc; -+ struct resource *r; -+ int ret; -+ -+ pc = devm_kzalloc(&pdev->dev, sizeof(*pc), GFP_KERNEL); -+ if (!pc) -+ return -ENOMEM; -+ -+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); -+ if (IS_ERR(pc->mmio_base)) -+ return PTR_ERR(pc->mmio_base); -+ -+ pc->clk_main = devm_clk_get(&pdev->dev, "main"); -+ if (IS_ERR(pc->clk_main)) -+ return PTR_ERR(pc->clk_main); -+ -+ pc->clk_top = devm_clk_get(&pdev->dev, "top"); -+ if (IS_ERR(pc->clk_top)) -+ return PTR_ERR(pc->clk_top); -+ -+ pc->clk_pwm[0] = devm_clk_get(&pdev->dev, "pwm1"); -+ if (IS_ERR(pc->clk_pwm[0])) -+ return PTR_ERR(pc->clk_pwm[0]); -+ -+ pc->clk_pwm[1] = devm_clk_get(&pdev->dev, "pwm2"); -+ if (IS_ERR(pc->clk_pwm[1])) -+ return PTR_ERR(pc->clk_pwm[1]); -+ -+ pc->clk_pwm[2] = devm_clk_get(&pdev->dev, "pwm3"); -+ if (IS_ERR(pc->clk_pwm[2])) -+ return PTR_ERR(pc->clk_pwm[2]); -+ -+ pc->clk_pwm[3] = devm_clk_get(&pdev->dev, "pwm4"); -+ if (IS_ERR(pc->clk_pwm[3])) -+ return PTR_ERR(pc->clk_pwm[3]); -+ -+ pc->clk_pwm[4] = devm_clk_get(&pdev->dev, "pwm5"); -+ if (IS_ERR(pc->clk_pwm[4])) -+ return PTR_ERR(pc->clk_pwm[4]); -+ -+ ret = clk_prepare(pc->clk_top); -+ if (ret < 0) -+ return ret; -+ -+ ret = clk_prepare(pc->clk_main); -+ if (ret < 0) -+ goto disable_clk_top; -+ -+ platform_set_drvdata(pdev, pc); -+ -+ pc->chip.dev = &pdev->dev; -+ pc->chip.ops = &mtk_pwm_ops; -+ pc->chip.base = -1; -+ pc->chip.npwm = NUM_PWM; -+ -+ ret = pwmchip_add(&pc->chip); -+ if (ret < 0) { -+ dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret); -+ goto disable_clk_main; -+ } -+ -+ return 0; -+ -+disable_clk_main: -+ clk_unprepare(pc->clk_main); -+disable_clk_top: -+ clk_unprepare(pc->clk_top); -+ -+ return ret; -+} -+ -+static int mtk_pwm_remove(struct platform_device *pdev) -+{ -+ struct mtk_pwm_chip *pc = platform_get_drvdata(pdev); -+ int i; -+ -+ for (i = 0; i < NUM_PWM; i++) -+ pwm_disable(&pc->chip.pwms[i]); -+ -+ return pwmchip_remove(&pc->chip); -+} -+ -+static const struct of_device_id mtk_pwm_of_match[] = { -+ { .compatible = "mediatek,mt7623-pwm" }, -+ { } -+}; -+ -+MODULE_DEVICE_TABLE(of, mtk_pwm_of_match); -+ -+static struct platform_driver mtk_pwm_driver = { -+ .driver = { -+ .name = "mtk-pwm", -+ .owner = THIS_MODULE, -+ .of_match_table = mtk_pwm_of_match, -+ }, -+ .probe = mtk_pwm_probe, -+ .remove = mtk_pwm_remove, -+}; -+ -+module_platform_driver(mtk_pwm_driver); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("John Crispin "); -+MODULE_ALIAS("platform:mtk-pwm"); diff --git a/target/linux/mediatek/patches-4.9/0017-mfd-mt6397-Add-MT6323-LED-support-into-MT6397-driver.patch b/target/linux/mediatek/patches-4.9/0017-mfd-mt6397-Add-MT6323-LED-support-into-MT6397-driver.patch deleted file mode 100644 index 73ac0eead..000000000 --- a/target/linux/mediatek/patches-4.9/0017-mfd-mt6397-Add-MT6323-LED-support-into-MT6397-driver.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 2b866d69f6198701457d29c5886c0ad7865c785f Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Sat, 25 Feb 2017 02:47:21 +0800 -Subject: [PATCH 17/57] mfd: mt6397: Add MT6323 LED support into MT6397 driver - -Add compatible string as "mt6323-led" that will make -the OF core spawn child devices for the LED subnode -of that MT6323 MFD device. - -Signed-off-by: Sean Wang ---- - drivers/mfd/mt6397-core.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/mfd/mt6397-core.c -+++ b/drivers/mfd/mt6397-core.c -@@ -48,6 +48,10 @@ static const struct mfd_cell mt6323_devs - .name = "mt6323-regulator", - .of_compatible = "mediatek,mt6323-regulator" - }, -+ { -+ .name = "mt6323-led", -+ .of_compatible = "mediatek,mt6323-led" -+ }, - }; - - static const struct mfd_cell mt6397_devs[] = { diff --git a/target/linux/mediatek/patches-4.9/0018-dt-bindings-leds-Add-document-bindings-for-leds-mt63.patch b/target/linux/mediatek/patches-4.9/0018-dt-bindings-leds-Add-document-bindings-for-leds-mt63.patch deleted file mode 100644 index ca0ee0443..000000000 --- a/target/linux/mediatek/patches-4.9/0018-dt-bindings-leds-Add-document-bindings-for-leds-mt63.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 424ca23e68b043ce26d6981839ca825ef8637aba Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Mon, 20 Mar 2017 14:47:24 +0800 -Subject: [PATCH 18/57] dt-bindings: leds: Add document bindings for - leds-mt6323 - -This patch adds documentation for devicetree bindings for LED support on -MT6323 PMIC. - -Signed-off-by: Sean Wang ---- - .../devicetree/bindings/leds/leds-mt6323.txt | 60 ++++++++++++++++++++++ - 1 file changed, 60 insertions(+) - create mode 100644 Documentation/devicetree/bindings/leds/leds-mt6323.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/leds/leds-mt6323.txt -@@ -0,0 +1,60 @@ -+Device Tree Bindings for LED support on MT6323 PMIC -+ -+MT6323 LED controller is subfunction provided by MT6323 PMIC, so the LED -+controllers are defined as the subnode of the function node provided by MT6323 -+PMIC controller that is being defined as one kind of Muti-Function Device (MFD) -+using shared bus called PMIC wrapper for each subfunction to access remote -+MT6323 PMIC hardware. -+ -+For MT6323 MFD bindings see: -+Documentation/devicetree/bindings/mfd/mt6397.txt -+For MediaTek PMIC wrapper bindings see: -+Documentation/devicetree/bindings/soc/mediatek/pwrap.txt -+ -+Required properties: -+- compatible : Must be "mediatek,mt6323-led" -+- address-cells : Must be 1 -+- size-cells : Must be 0 -+ -+Each led is represented as a child node of the mediatek,mt6323-led that -+describes the initial behavior for each LED physically and currently only four -+LED child nodes can be supported. -+ -+Required properties for the LED child node: -+- reg : LED channel number (0..3) -+ -+Optional properties for the LED child node: -+- label : See Documentation/devicetree/bindings/leds/common.txt -+- linux,default-trigger : See Documentation/devicetree/bindings/leds/common.txt -+- default-state: See Documentation/devicetree/bindings/leds/common.txt -+ -+Example: -+ -+ mt6323: pmic { -+ compatible = "mediatek,mt6323"; -+ -+ ... -+ -+ mt6323led: leds { -+ compatible = "mediatek,mt6323-led"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ led@0 { -+ reg = <0>; -+ label = "LED0"; -+ linux,default-trigger = "timer"; -+ default-state = "on"; -+ }; -+ led@1 { -+ reg = <1>; -+ label = "LED1"; -+ default-state = "off"; -+ }; -+ led@2 { -+ reg = <2>; -+ label = "LED2"; -+ default-state = "on"; -+ }; -+ }; -+ }; diff --git a/target/linux/mediatek/patches-4.9/0019-dt-bindings-mfd-Add-the-description-for-LED-as-the-s.patch b/target/linux/mediatek/patches-4.9/0019-dt-bindings-mfd-Add-the-description-for-LED-as-the-s.patch deleted file mode 100644 index c8afdc088..000000000 --- a/target/linux/mediatek/patches-4.9/0019-dt-bindings-mfd-Add-the-description-for-LED-as-the-s.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 7c137e4b83f32a67ccf6b39fa455aca71980a21f Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Mon, 20 Mar 2017 14:47:25 +0800 -Subject: [PATCH 19/57] dt-bindings: mfd: Add the description for LED as the - sub module - -This patch adds description for LED as the sub-module on MT6397/MT6323 -multifunction device. - -Signed-off-by: Sean Wang ---- - Documentation/devicetree/bindings/mfd/mt6397.txt | 1 + - 1 file changed, 1 insertion(+) - ---- a/Documentation/devicetree/bindings/mfd/mt6397.txt -+++ b/Documentation/devicetree/bindings/mfd/mt6397.txt -@@ -6,6 +6,7 @@ MT6397/MT6323 is a multifunction device - - Audio codec - - GPIO - - Clock -+- LED - - It is interfaced to host controller using SPI interface by a proprietary hardware - called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. diff --git a/target/linux/mediatek/patches-4.9/0020-leds-Add-LED-support-for-MT6323-PMIC.patch b/target/linux/mediatek/patches-4.9/0020-leds-Add-LED-support-for-MT6323-PMIC.patch deleted file mode 100644 index 37b926de1..000000000 --- a/target/linux/mediatek/patches-4.9/0020-leds-Add-LED-support-for-MT6323-PMIC.patch +++ /dev/null @@ -1,539 +0,0 @@ -From e482f9590f2e831c68bcf85e3f9f4c88bbd3329f Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Mon, 20 Mar 2017 14:47:26 +0800 -Subject: [PATCH 20/57] leds: Add LED support for MT6323 PMIC - -MT6323 PMIC is a multi-function device that includes LED function. -It allows attaching up to 4 LEDs which can either be on, off or dimmed -and/or blinked with the controller. - -Signed-off-by: Sean Wang -Reviewed-by: Jacek Anaszewski ---- - drivers/leds/Kconfig | 8 + - drivers/leds/leds-mt6323.c | 502 +++++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 510 insertions(+) - create mode 100644 drivers/leds/leds-mt6323.c - ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -117,6 +117,14 @@ config LEDS_MIKROTIK_RB532 - This option enables support for the so called "User LED" of - Mikrotik's Routerboard 532. - -+config LEDS_MT6323 -+ tristate "LED Support for Mediatek MT6323 PMIC" -+ depends on LEDS_CLASS -+ depends on MFD_MT6397 -+ help -+ This option enables support for on-chip LED drivers found on -+ Mediatek MT6323 PMIC. -+ - config LEDS_S3C24XX - tristate "LED Support for Samsung S3C24XX GPIO LEDs" - depends on LEDS_CLASS ---- /dev/null -+++ b/drivers/leds/leds-mt6323.c -@@ -0,0 +1,502 @@ -+/* -+ * LED driver for Mediatek MT6323 PMIC -+ * -+ * Copyright (C) 2017 Sean Wang -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* -+ * Register field for MT6323_TOP_CKPDN0 to enable -+ * 32K clock common for LED device. -+ */ -+#define MT6323_RG_DRV_32K_CK_PDN BIT(11) -+#define MT6323_RG_DRV_32K_CK_PDN_MASK BIT(11) -+ -+/* -+ * Register field for MT6323_TOP_CKPDN2 to enable -+ * individual clock for LED device. -+ */ -+#define MT6323_RG_ISINK_CK_PDN(i) BIT(i) -+#define MT6323_RG_ISINK_CK_PDN_MASK(i) BIT(i) -+ -+/* -+ * Register field for MT6323_TOP_CKCON1 to select -+ * clock source. -+ */ -+#define MT6323_RG_ISINK_CK_SEL_MASK(i) (BIT(10) << (i)) -+ -+/* -+ * Register for MT6323_ISINK_CON0 to setup the -+ * duty cycle of the blink. -+ */ -+#define MT6323_ISINK_CON0(i) (MT6323_ISINK0_CON0 + 0x8 * (i)) -+#define MT6323_ISINK_DIM_DUTY_MASK (0x1f << 8) -+#define MT6323_ISINK_DIM_DUTY(i) (((i) << 8) & \ -+ MT6323_ISINK_DIM_DUTY_MASK) -+ -+/* Register to setup the period of the blink. */ -+#define MT6323_ISINK_CON1(i) (MT6323_ISINK0_CON1 + 0x8 * (i)) -+#define MT6323_ISINK_DIM_FSEL_MASK (0xffff) -+#define MT6323_ISINK_DIM_FSEL(i) ((i) & MT6323_ISINK_DIM_FSEL_MASK) -+ -+/* Register to control the brightness. */ -+#define MT6323_ISINK_CON2(i) (MT6323_ISINK0_CON2 + 0x8 * (i)) -+#define MT6323_ISINK_CH_STEP_SHIFT 12 -+#define MT6323_ISINK_CH_STEP_MASK (0x7 << 12) -+#define MT6323_ISINK_CH_STEP(i) (((i) << 12) & \ -+ MT6323_ISINK_CH_STEP_MASK) -+#define MT6323_ISINK_SFSTR0_TC_MASK (0x3 << 1) -+#define MT6323_ISINK_SFSTR0_TC(i) (((i) << 1) & \ -+ MT6323_ISINK_SFSTR0_TC_MASK) -+#define MT6323_ISINK_SFSTR0_EN_MASK BIT(0) -+#define MT6323_ISINK_SFSTR0_EN BIT(0) -+ -+/* Register to LED channel enablement. */ -+#define MT6323_ISINK_CH_EN_MASK(i) BIT(i) -+#define MT6323_ISINK_CH_EN(i) BIT(i) -+ -+#define MT6323_MAX_PERIOD 10000 -+#define MT6323_MAX_LEDS 4 -+#define MT6323_MAX_BRIGHTNESS 6 -+#define MT6323_UNIT_DUTY 3125 -+#define MT6323_CAL_HW_DUTY(o, p) DIV_ROUND_CLOSEST((o) * 100000ul,\ -+ (p) * MT6323_UNIT_DUTY) -+ -+struct mt6323_leds; -+ -+/** -+ * struct mt6323_led - state container for the LED device -+ * @id: the identifier in MT6323 LED device -+ * @parent: the pointer to MT6323 LED controller -+ * @cdev: LED class device for this LED device -+ * @current_brightness: current state of the LED device -+ */ -+struct mt6323_led { -+ int id; -+ struct mt6323_leds *parent; -+ struct led_classdev cdev; -+ enum led_brightness current_brightness; -+}; -+ -+/** -+ * struct mt6323_leds - state container for holding LED controller -+ * of the driver -+ * @dev: the device pointer -+ * @hw: the underlying hardware providing shared -+ * bus for the register operations -+ * @lock: the lock among process context -+ * @led: the array that contains the state of individual -+ * LED device -+ */ -+struct mt6323_leds { -+ struct device *dev; -+ struct mt6397_chip *hw; -+ /* protect among process context */ -+ struct mutex lock; -+ struct mt6323_led *led[MT6323_MAX_LEDS]; -+}; -+ -+static int mt6323_led_hw_brightness(struct led_classdev *cdev, -+ enum led_brightness brightness) -+{ -+ struct mt6323_led *led = container_of(cdev, struct mt6323_led, cdev); -+ struct mt6323_leds *leds = led->parent; -+ struct regmap *regmap = leds->hw->regmap; -+ u32 con2_mask = 0, con2_val = 0; -+ int ret; -+ -+ /* -+ * Setup current output for the corresponding -+ * brightness level. -+ */ -+ con2_mask |= MT6323_ISINK_CH_STEP_MASK | -+ MT6323_ISINK_SFSTR0_TC_MASK | -+ MT6323_ISINK_SFSTR0_EN_MASK; -+ con2_val |= MT6323_ISINK_CH_STEP(brightness - 1) | -+ MT6323_ISINK_SFSTR0_TC(2) | -+ MT6323_ISINK_SFSTR0_EN; -+ -+ ret = regmap_update_bits(regmap, MT6323_ISINK_CON2(led->id), -+ con2_mask, con2_val); -+ return ret; -+} -+ -+static int mt6323_led_hw_off(struct led_classdev *cdev) -+{ -+ struct mt6323_led *led = container_of(cdev, struct mt6323_led, cdev); -+ struct mt6323_leds *leds = led->parent; -+ struct regmap *regmap = leds->hw->regmap; -+ unsigned int status; -+ int ret; -+ -+ status = MT6323_ISINK_CH_EN(led->id); -+ ret = regmap_update_bits(regmap, MT6323_ISINK_EN_CTRL, -+ MT6323_ISINK_CH_EN_MASK(led->id), ~status); -+ if (ret < 0) -+ return ret; -+ -+ usleep_range(100, 300); -+ ret = regmap_update_bits(regmap, MT6323_TOP_CKPDN2, -+ MT6323_RG_ISINK_CK_PDN_MASK(led->id), -+ MT6323_RG_ISINK_CK_PDN(led->id)); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static enum led_brightness -+mt6323_get_led_hw_brightness(struct led_classdev *cdev) -+{ -+ struct mt6323_led *led = container_of(cdev, struct mt6323_led, cdev); -+ struct mt6323_leds *leds = led->parent; -+ struct regmap *regmap = leds->hw->regmap; -+ unsigned int status; -+ int ret; -+ -+ ret = regmap_read(regmap, MT6323_TOP_CKPDN2, &status); -+ if (ret < 0) -+ return ret; -+ -+ if (status & MT6323_RG_ISINK_CK_PDN_MASK(led->id)) -+ return 0; -+ -+ ret = regmap_read(regmap, MT6323_ISINK_EN_CTRL, &status); -+ if (ret < 0) -+ return ret; -+ -+ if (!(status & MT6323_ISINK_CH_EN(led->id))) -+ return 0; -+ -+ ret = regmap_read(regmap, MT6323_ISINK_CON2(led->id), &status); -+ if (ret < 0) -+ return ret; -+ -+ return ((status & MT6323_ISINK_CH_STEP_MASK) -+ >> MT6323_ISINK_CH_STEP_SHIFT) + 1; -+} -+ -+static int mt6323_led_hw_on(struct led_classdev *cdev, -+ enum led_brightness brightness) -+{ -+ struct mt6323_led *led = container_of(cdev, struct mt6323_led, cdev); -+ struct mt6323_leds *leds = led->parent; -+ struct regmap *regmap = leds->hw->regmap; -+ unsigned int status; -+ int ret; -+ -+ /* -+ * Setup required clock source, enable the corresponding -+ * clock and channel and let work with continuous blink as -+ * the default. -+ */ -+ ret = regmap_update_bits(regmap, MT6323_TOP_CKCON1, -+ MT6323_RG_ISINK_CK_SEL_MASK(led->id), 0); -+ if (ret < 0) -+ return ret; -+ -+ status = MT6323_RG_ISINK_CK_PDN(led->id); -+ ret = regmap_update_bits(regmap, MT6323_TOP_CKPDN2, -+ MT6323_RG_ISINK_CK_PDN_MASK(led->id), -+ ~status); -+ if (ret < 0) -+ return ret; -+ -+ usleep_range(100, 300); -+ -+ ret = regmap_update_bits(regmap, MT6323_ISINK_EN_CTRL, -+ MT6323_ISINK_CH_EN_MASK(led->id), -+ MT6323_ISINK_CH_EN(led->id)); -+ if (ret < 0) -+ return ret; -+ -+ ret = mt6323_led_hw_brightness(cdev, brightness); -+ if (ret < 0) -+ return ret; -+ -+ ret = regmap_update_bits(regmap, MT6323_ISINK_CON0(led->id), -+ MT6323_ISINK_DIM_DUTY_MASK, -+ MT6323_ISINK_DIM_DUTY(31)); -+ if (ret < 0) -+ return ret; -+ -+ ret = regmap_update_bits(regmap, MT6323_ISINK_CON1(led->id), -+ MT6323_ISINK_DIM_FSEL_MASK, -+ MT6323_ISINK_DIM_FSEL(1000)); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static int mt6323_led_set_blink(struct led_classdev *cdev, -+ unsigned long *delay_on, -+ unsigned long *delay_off) -+{ -+ struct mt6323_led *led = container_of(cdev, struct mt6323_led, cdev); -+ struct mt6323_leds *leds = led->parent; -+ struct regmap *regmap = leds->hw->regmap; -+ unsigned long period; -+ u8 duty_hw; -+ int ret; -+ -+ /* -+ * Units are in ms, if over the hardware able -+ * to support, fallback into software blink -+ */ -+ period = *delay_on + *delay_off; -+ -+ if (period > MT6323_MAX_PERIOD) -+ return -EINVAL; -+ -+ /* -+ * LED subsystem requires a default user -+ * friendly blink pattern for the LED so using -+ * 1Hz duty cycle 50% here if without specific -+ * value delay_on and delay off being assigned. -+ */ -+ if (!*delay_on && !*delay_off) { -+ *delay_on = 500; -+ *delay_off = 500; -+ } -+ -+ /* -+ * Calculate duty_hw based on the percentage of period during -+ * which the led is ON. -+ */ -+ duty_hw = MT6323_CAL_HW_DUTY(*delay_on, period); -+ -+ /* hardware doesn't support zero duty cycle. */ -+ if (!duty_hw) -+ return -EINVAL; -+ -+ mutex_lock(&leds->lock); -+ /* -+ * Set max_brightness as the software blink behavior -+ * when no blink brightness. -+ */ -+ if (!led->current_brightness) { -+ ret = mt6323_led_hw_on(cdev, cdev->max_brightness); -+ if (ret < 0) -+ goto out; -+ led->current_brightness = cdev->max_brightness; -+ } -+ -+ ret = regmap_update_bits(regmap, MT6323_ISINK_CON0(led->id), -+ MT6323_ISINK_DIM_DUTY_MASK, -+ MT6323_ISINK_DIM_DUTY(duty_hw - 1)); -+ if (ret < 0) -+ goto out; -+ -+ ret = regmap_update_bits(regmap, MT6323_ISINK_CON1(led->id), -+ MT6323_ISINK_DIM_FSEL_MASK, -+ MT6323_ISINK_DIM_FSEL(period - 1)); -+out: -+ mutex_unlock(&leds->lock); -+ -+ return ret; -+} -+ -+static int mt6323_led_set_brightness(struct led_classdev *cdev, -+ enum led_brightness brightness) -+{ -+ struct mt6323_led *led = container_of(cdev, struct mt6323_led, cdev); -+ struct mt6323_leds *leds = led->parent; -+ int ret; -+ -+ mutex_lock(&leds->lock); -+ -+ if (!led->current_brightness && brightness) { -+ ret = mt6323_led_hw_on(cdev, brightness); -+ if (ret < 0) -+ goto out; -+ } else if (brightness) { -+ ret = mt6323_led_hw_brightness(cdev, brightness); -+ if (ret < 0) -+ goto out; -+ } else { -+ ret = mt6323_led_hw_off(cdev); -+ if (ret < 0) -+ goto out; -+ } -+ -+ led->current_brightness = brightness; -+out: -+ mutex_unlock(&leds->lock); -+ -+ return ret; -+} -+ -+static int mt6323_led_set_dt_default(struct led_classdev *cdev, -+ struct device_node *np) -+{ -+ struct mt6323_led *led = container_of(cdev, struct mt6323_led, cdev); -+ const char *state; -+ int ret = 0; -+ -+ led->cdev.name = of_get_property(np, "label", NULL) ? : np->name; -+ led->cdev.default_trigger = of_get_property(np, -+ "linux,default-trigger", -+ NULL); -+ -+ state = of_get_property(np, "default-state", NULL); -+ if (state) { -+ if (!strcmp(state, "keep")) { -+ ret = mt6323_get_led_hw_brightness(cdev); -+ if (ret < 0) -+ return ret; -+ led->current_brightness = ret; -+ ret = 0; -+ } else if (!strcmp(state, "on")) { -+ ret = -+ mt6323_led_set_brightness(cdev, cdev->max_brightness); -+ } else { -+ ret = mt6323_led_set_brightness(cdev, LED_OFF); -+ } -+ } -+ -+ return ret; -+} -+ -+static int mt6323_led_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *child; -+ struct mt6397_chip *hw = dev_get_drvdata(pdev->dev.parent); -+ struct mt6323_leds *leds; -+ struct mt6323_led *led; -+ int ret; -+ unsigned int status; -+ u32 reg; -+ -+ leds = devm_kzalloc(dev, sizeof(*leds), GFP_KERNEL); -+ if (!leds) -+ return -ENOMEM; -+ -+ platform_set_drvdata(pdev, leds); -+ leds->dev = dev; -+ -+ /* -+ * leds->hw points to the underlying bus for the register -+ * controlled. -+ */ -+ leds->hw = hw; -+ mutex_init(&leds->lock); -+ -+ status = MT6323_RG_DRV_32K_CK_PDN; -+ ret = regmap_update_bits(leds->hw->regmap, MT6323_TOP_CKPDN0, -+ MT6323_RG_DRV_32K_CK_PDN_MASK, ~status); -+ if (ret < 0) { -+ dev_err(leds->dev, -+ "Failed to update MT6323_TOP_CKPDN0 Register\n"); -+ return ret; -+ } -+ -+ for_each_available_child_of_node(np, child) { -+ ret = of_property_read_u32(child, "reg", ®); -+ if (ret) { -+ dev_err(dev, "Failed to read led 'reg' property\n"); -+ goto put_child_node; -+ } -+ -+ if (reg < 0 || reg > MT6323_MAX_LEDS || leds->led[reg]) { -+ dev_err(dev, "Invalid led reg %u\n", reg); -+ ret = -EINVAL; -+ goto put_child_node; -+ } -+ -+ led = devm_kzalloc(dev, sizeof(*led), GFP_KERNEL); -+ if (!led) { -+ ret = -ENOMEM; -+ goto put_child_node; -+ } -+ -+ leds->led[reg] = led; -+ leds->led[reg]->id = reg; -+ leds->led[reg]->cdev.max_brightness = MT6323_MAX_BRIGHTNESS; -+ leds->led[reg]->cdev.brightness_set_blocking = -+ mt6323_led_set_brightness; -+ leds->led[reg]->cdev.blink_set = mt6323_led_set_blink; -+ leds->led[reg]->cdev.brightness_get = -+ mt6323_get_led_hw_brightness; -+ leds->led[reg]->parent = leds; -+ -+ ret = mt6323_led_set_dt_default(&leds->led[reg]->cdev, child); -+ if (ret < 0) { -+ dev_err(leds->dev, -+ "Failed to LED set default from devicetree\n"); -+ goto put_child_node; -+ } -+ -+ ret = devm_led_classdev_register(dev, &leds->led[reg]->cdev); -+ if (ret) { -+ dev_err(&pdev->dev, "Failed to register LED: %d\n", -+ ret); -+ goto put_child_node; -+ } -+ leds->led[reg]->cdev.dev->of_node = child; -+ } -+ -+ return 0; -+ -+put_child_node: -+ of_node_put(child); -+ return ret; -+} -+ -+static int mt6323_led_remove(struct platform_device *pdev) -+{ -+ struct mt6323_leds *leds = platform_get_drvdata(pdev); -+ int i; -+ -+ /* Turn the LEDs off on driver removal. */ -+ for (i = 0 ; leds->led[i] ; i++) -+ mt6323_led_hw_off(&leds->led[i]->cdev); -+ -+ regmap_update_bits(leds->hw->regmap, MT6323_TOP_CKPDN0, -+ MT6323_RG_DRV_32K_CK_PDN_MASK, -+ MT6323_RG_DRV_32K_CK_PDN); -+ -+ mutex_destroy(&leds->lock); -+ -+ return 0; -+} -+ -+static const struct of_device_id mt6323_led_dt_match[] = { -+ { .compatible = "mediatek,mt6323-led" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, mt6323_led_dt_match); -+ -+static struct platform_driver mt6323_led_driver = { -+ .probe = mt6323_led_probe, -+ .remove = mt6323_led_remove, -+ .driver = { -+ .name = "mt6323-led", -+ .of_match_table = mt6323_led_dt_match, -+ }, -+}; -+ -+module_platform_driver(mt6323_led_driver); -+ -+MODULE_DESCRIPTION("LED driver for Mediatek MT6323 PMIC"); -+MODULE_AUTHOR("Sean Wang "); -+MODULE_LICENSE("GPL"); diff --git a/target/linux/mediatek/patches-4.9/0021-mfd-mt6397-Align-the-placement-at-which-the-mfd_cell.patch b/target/linux/mediatek/patches-4.9/0021-mfd-mt6397-Align-the-placement-at-which-the-mfd_cell.patch deleted file mode 100644 index 79e11e8c6..000000000 --- a/target/linux/mediatek/patches-4.9/0021-mfd-mt6397-Align-the-placement-at-which-the-mfd_cell.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 6e81b4fee93c004078465589128ba07b6855be02 Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Mon, 20 Mar 2017 14:47:27 +0800 -Subject: [PATCH 21/57] mfd: mt6397: Align the placement at which the mfd_cell - of LED is defined - -Align the placement as which the mfd_cell of LED is defined as the other -members done on the structure. - -Signed-off-by: Sean Wang -Acked-by: Lee Jones ---- - drivers/mfd/mt6397-core.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/mfd/mt6397-core.c -+++ b/drivers/mfd/mt6397-core.c -@@ -47,8 +47,7 @@ static const struct mfd_cell mt6323_devs - { - .name = "mt6323-regulator", - .of_compatible = "mediatek,mt6323-regulator" -- }, -- { -+ }, { - .name = "mt6323-led", - .of_compatible = "mediatek,mt6323-led" - }, diff --git a/target/linux/mediatek/patches-4.9/0022-nand-make-bootrom-work-with-upstream-driver.patch b/target/linux/mediatek/patches-4.9/0022-nand-make-bootrom-work-with-upstream-driver.patch deleted file mode 100644 index f01c84110..000000000 --- a/target/linux/mediatek/patches-4.9/0022-nand-make-bootrom-work-with-upstream-driver.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 453ebd5d6b535388972fcea747025ced3afca5cc Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 14:47:06 +0200 -Subject: [PATCH 22/57] nand: make bootrom work with upstream driver - -Signed-off-by: John Crispin ---- - drivers/mtd/nand/mtk_nand.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/mtd/nand/mtk_nand.c -+++ b/drivers/mtd/nand/mtk_nand.c -@@ -1073,8 +1073,8 @@ static int mtk_nfc_ooblayout_free(struct - if (section >= eccsteps) - return -ERANGE; - -- oob_region->length = fdm->reg_size - fdm->ecc_size; -- oob_region->offset = section * fdm->reg_size + fdm->ecc_size; -+ oob_region->length = fdm->reg_size - 1; -+ oob_region->offset = section * fdm->reg_size + 1; - - return 0; - } -@@ -1114,7 +1114,7 @@ static void mtk_nfc_set_fdm(struct mtk_n - fdm->reg_size = NFI_FDM_MAX_SIZE; - - /* bad block mark storage */ -- fdm->ecc_size = 1; -+ fdm->ecc_size = fdm->reg_size; - } - - static void mtk_nfc_set_bad_mark_ctl(struct mtk_nfc_bad_mark_ctl *bm_ctl, diff --git a/target/linux/mediatek/patches-4.9/0023-rng-add-mediatek-hw-rng.patch b/target/linux/mediatek/patches-4.9/0023-rng-add-mediatek-hw-rng.patch deleted file mode 100644 index 153031b35..000000000 --- a/target/linux/mediatek/patches-4.9/0023-rng-add-mediatek-hw-rng.patch +++ /dev/null @@ -1,81 +0,0 @@ -From 4ad0accdfb0941de1440906461c08bee715378d5 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 15:57:44 +0200 -Subject: [PATCH 23/57] rng: add mediatek hw rng - -Signed-off-by: John Crispin ---- - drivers/char/hw_random/Kconfig | 14 ++++++++++++++ - drivers/char/hw_random/Makefile | 1 + - drivers/crypto/Kconfig | 18 ++++++++++++++++++ - drivers/crypto/Makefile | 1 + - 4 files changed, 34 insertions(+) - ---- a/drivers/char/hw_random/Kconfig -+++ b/drivers/char/hw_random/Kconfig -@@ -166,6 +166,20 @@ config HW_RANDOM_IXP4XX - - If unsure, say Y. - -+config HW_RANDOM_MTK -+ tristate "Mediatek Random Number Generator support" -+ depends on HW_RANDOM -+ depends on ARCH_MEDIATEK || COMPILE_TEST -+ default y -+ ---help--- -+ This driver provides kernel-side support for the Random Number -+ Generator hardware found on Mediatek SoCs. -+ -+ To compile this driver as a module, choose M here. the -+ module will be called mtk-rng. -+ -+ If unsure, say Y. -+ - config HW_RANDOM_OMAP - tristate "OMAP Random Number Generator support" - depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS ---- a/drivers/char/hw_random/Makefile -+++ b/drivers/char/hw_random/Makefile -@@ -35,4 +35,5 @@ obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-r - obj-$(CONFIG_HW_RANDOM_STM32) += stm32-rng.o - obj-$(CONFIG_HW_RANDOM_PIC32) += pic32-rng.o - obj-$(CONFIG_HW_RANDOM_MESON) += meson-rng.o -+obj-$(CONFIG_HW_RANDOM_MTK) += mtk-rng.o - obj-$(CONFIG_HW_RANDOM_CAVIUM) += cavium-rng.o cavium-rng-vf.o ---- a/drivers/crypto/Kconfig -+++ b/drivers/crypto/Kconfig -@@ -553,6 +553,24 @@ config CRYPTO_DEV_ROCKCHIP - This driver interfaces with the hardware crypto accelerator. - Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. - -+config CRYPTO_DEV_MEDIATEK -+ tristate "MediaTek's EIP97 Cryptographic Engine driver" -+ depends on HAS_DMA -+ depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST -+ select CRYPTO_AES -+ select CRYPTO_AEAD -+ select CRYPTO_BLKCIPHER -+ select CRYPTO_CTR -+ select CRYPTO_SHA1 -+ select CRYPTO_SHA256 -+ select CRYPTO_SHA512 -+ select CRYPTO_HMAC -+ help -+ This driver allows you to utilize the hardware crypto accelerator -+ EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... -+ Select this if you want to use it for AES/SHA1/SHA2 algorithms. -+ -+ - source "drivers/crypto/chelsio/Kconfig" - - endif # CRYPTO_HW ---- a/drivers/crypto/Makefile -+++ b/drivers/crypto/Makefile -@@ -10,6 +10,7 @@ obj-$(CONFIG_CRYPTO_DEV_IMGTEC_HASH) += - obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o - obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o - obj-$(CONFIG_CRYPTO_DEV_MARVELL_CESA) += marvell/ -+obj-$(CONFIG_CRYPTO_DEV_MEDIATEK) += mediatek/ - obj-$(CONFIG_CRYPTO_DEV_MXS_DCP) += mxs-dcp.o - obj-$(CONFIG_CRYPTO_DEV_NIAGARA2) += n2_crypto.o - n2_crypto-y := n2_core.o n2_asm.o diff --git a/target/linux/mediatek/patches-4.9/0024-media-rc-add-driver-for-IR-remote-receiver-on-MT7623.patch b/target/linux/mediatek/patches-4.9/0024-media-rc-add-driver-for-IR-remote-receiver-on-MT7623.patch deleted file mode 100644 index fbdfbe904..000000000 --- a/target/linux/mediatek/patches-4.9/0024-media-rc-add-driver-for-IR-remote-receiver-on-MT7623.patch +++ /dev/null @@ -1,1034 +0,0 @@ -From 6e0336d1660725c06b6ab4f5361873538dbaa9f9 Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Fri, 13 Jan 2017 15:35:39 +0800 -Subject: [PATCH 24/57] media: rc: add driver for IR remote receiver on MT7623 - SoC - -This patch adds driver for IR controller on MT7623 SoC. -and should also work on similar Mediatek SoC. Currently -testing successfully on NEC and SONY remote controller -only but it should work on others (lirc, rc-5 and rc-6). - -Signed-off-by: Sean Wang -Reviewed-by: Sean Young ---- - drivers/media/rc/Kconfig | 11 ++ - drivers/media/rc/mtk-cir.c | 329 +++++++++++++++++++++++++++++++++++++++++++++ - 2 files changed, 340 insertions(+) - create mode 100644 drivers/media/rc/mtk-cir.c - ---- a/drivers/media/rc/Kconfig -+++ b/drivers/media/rc/Kconfig -@@ -235,6 +235,17 @@ config IR_MESON - To compile this driver as a module, choose M here: the - module will be called meson-ir. - -+config IR_MTK -+ tristate "Mediatek IR remote receiver" -+ depends on RC_CORE -+ depends on ARCH_MEDIATEK || COMPILE_TEST -+ ---help--- -+ Say Y if you want to use the IR remote receiver available -+ on Mediatek SoCs. -+ -+ To compile this driver as a module, choose M here: the -+ module will be called mtk-cir. -+ - config IR_NUVOTON - tristate "Nuvoton w836x7hg Consumer Infrared Transceiver" - depends on PNP ---- /dev/null -+++ b/drivers/media/rc/mtk-cir.c -@@ -0,0 +1,329 @@ -+/* -+ * Driver for Mediatek IR Receiver Controller -+ * -+ * Copyright (C) 2017 Sean Wang -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MTK_IR_DEV KBUILD_MODNAME -+ -+/* Register to enable PWM and IR */ -+#define MTK_CONFIG_HIGH_REG 0x0c -+/* Enable IR pulse width detection */ -+#define MTK_PWM_EN BIT(13) -+/* Enable IR hardware function */ -+#define MTK_IR_EN BIT(0) -+ -+/* Register to setting sample period */ -+#define MTK_CONFIG_LOW_REG 0x10 -+/* Field to set sample period */ -+#define CHK_PERIOD DIV_ROUND_CLOSEST(MTK_IR_SAMPLE, \ -+ MTK_IR_CLK_PERIOD) -+#define MTK_CHK_PERIOD (((CHK_PERIOD) << 8) & (GENMASK(20, 8))) -+#define MTK_CHK_PERIOD_MASK (GENMASK(20, 8)) -+ -+/* Register to clear state of state machine */ -+#define MTK_IRCLR_REG 0x20 -+/* Bit to restart IR receiving */ -+#define MTK_IRCLR BIT(0) -+ -+/* Register containing pulse width data */ -+#define MTK_CHKDATA_REG(i) (0x88 + 4 * (i)) -+#define MTK_WIDTH_MASK (GENMASK(7, 0)) -+ -+/* Register to enable IR interrupt */ -+#define MTK_IRINT_EN_REG 0xcc -+/* Bit to enable interrupt */ -+#define MTK_IRINT_EN BIT(0) -+ -+/* Register to ack IR interrupt */ -+#define MTK_IRINT_CLR_REG 0xd0 -+/* Bit to clear interrupt status */ -+#define MTK_IRINT_CLR BIT(0) -+ -+/* Maximum count of samples */ -+#define MTK_MAX_SAMPLES 0xff -+/* Indicate the end of IR message */ -+#define MTK_IR_END(v, p) ((v) == MTK_MAX_SAMPLES && (p) == 0) -+/* Number of registers to record the pulse width */ -+#define MTK_CHKDATA_SZ 17 -+/* Source clock frequency */ -+#define MTK_IR_BASE_CLK 273000000 -+/* Frequency after IR internal divider */ -+#define MTK_IR_CLK_FREQ (MTK_IR_BASE_CLK / 4) -+/* Period for MTK_IR_CLK in ns*/ -+#define MTK_IR_CLK_PERIOD DIV_ROUND_CLOSEST(1000000000ul, \ -+ MTK_IR_CLK_FREQ) -+/* Sample period in ns */ -+#define MTK_IR_SAMPLE (MTK_IR_CLK_PERIOD * 0xc00) -+ -+/* struct mtk_ir - This is the main datasructure for holding the state -+ * of the driver -+ * @dev: The device pointer -+ * @rc: The rc instrance -+ * @irq: The IRQ that we are using -+ * @base: The mapped register i/o base -+ * @clk: The clock that we are using -+ */ -+struct mtk_ir { -+ struct device *dev; -+ struct rc_dev *rc; -+ void __iomem *base; -+ int irq; -+ struct clk *clk; -+}; -+ -+static void mtk_w32_mask(struct mtk_ir *ir, u32 val, u32 mask, unsigned int reg) -+{ -+ u32 tmp; -+ -+ tmp = __raw_readl(ir->base + reg); -+ tmp = (tmp & ~mask) | val; -+ __raw_writel(tmp, ir->base + reg); -+} -+ -+static void mtk_w32(struct mtk_ir *ir, u32 val, unsigned int reg) -+{ -+ __raw_writel(val, ir->base + reg); -+} -+ -+static u32 mtk_r32(struct mtk_ir *ir, unsigned int reg) -+{ -+ return __raw_readl(ir->base + reg); -+} -+ -+static inline void mtk_irq_disable(struct mtk_ir *ir, u32 mask) -+{ -+ u32 val; -+ -+ val = mtk_r32(ir, MTK_IRINT_EN_REG); -+ mtk_w32(ir, val & ~mask, MTK_IRINT_EN_REG); -+} -+ -+static inline void mtk_irq_enable(struct mtk_ir *ir, u32 mask) -+{ -+ u32 val; -+ -+ val = mtk_r32(ir, MTK_IRINT_EN_REG); -+ mtk_w32(ir, val | mask, MTK_IRINT_EN_REG); -+} -+ -+static irqreturn_t mtk_ir_irq(int irqno, void *dev_id) -+{ -+ struct mtk_ir *ir = dev_id; -+ u8 wid = 0; -+ u32 i, j, val; -+ DEFINE_IR_RAW_EVENT(rawir); -+ -+ /* Reset decoder state machine explicitly is required -+ * because 1) the longest duration for space MTK IR hardware -+ * could record is not safely long. e.g 12ms if rx resolution -+ * is 46us by default. There is still the risk to satisfying -+ * every decoder to reset themselves through long enough -+ * trailing spaces and 2) the IRQ handler guarantees that -+ * start of IR message is always contained in and starting -+ * from register MTK_CHKDATA_REG(0). -+ */ -+ ir_raw_event_reset(ir->rc); -+ -+ /* First message must be pulse */ -+ rawir.pulse = false; -+ -+ /* Handle all pulse and space IR controller captures */ -+ for (i = 0 ; i < MTK_CHKDATA_SZ ; i++) { -+ val = mtk_r32(ir, MTK_CHKDATA_REG(i)); -+ dev_dbg(ir->dev, "@reg%d=0x%08x\n", i, val); -+ -+ for (j = 0 ; j < 4 ; j++) { -+ wid = (val & (MTK_WIDTH_MASK << j * 8)) >> j * 8; -+ rawir.pulse = !rawir.pulse; -+ rawir.duration = wid * (MTK_IR_SAMPLE + 1); -+ ir_raw_event_store_with_filter(ir->rc, &rawir); -+ } -+ } -+ -+ /* The maximum number of edges the IR controller can -+ * hold is MTK_CHKDATA_SZ * 4. So if received IR messages -+ * is over the limit, the last incomplete IR message would -+ * be appended trailing space and still would be sent into -+ * ir-rc-raw to decode. That helps it is possible that it -+ * has enough information to decode a scancode even if the -+ * trailing end of the message is missing. -+ */ -+ if (!MTK_IR_END(wid, rawir.pulse)) { -+ rawir.pulse = false; -+ rawir.duration = MTK_MAX_SAMPLES * (MTK_IR_SAMPLE + 1); -+ ir_raw_event_store_with_filter(ir->rc, &rawir); -+ } -+ -+ ir_raw_event_handle(ir->rc); -+ -+ /* Restart controller for the next receive that would -+ * clear up all CHKDATA registers -+ */ -+ mtk_w32_mask(ir, 0x1, MTK_IRCLR, MTK_IRCLR_REG); -+ -+ /* Clear interrupt status */ -+ mtk_w32_mask(ir, 0x1, MTK_IRINT_CLR, MTK_IRINT_CLR_REG); -+ -+ return IRQ_HANDLED; -+} -+ -+static int mtk_ir_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct device_node *dn = dev->of_node; -+ struct resource *res; -+ struct mtk_ir *ir; -+ u32 val; -+ int ret = 0; -+ const char *map_name; -+ -+ ir = devm_kzalloc(dev, sizeof(struct mtk_ir), GFP_KERNEL); -+ if (!ir) -+ return -ENOMEM; -+ -+ ir->dev = dev; -+ -+ if (!of_device_is_compatible(dn, "mediatek,mt7623-cir")) -+ return -ENODEV; -+ -+ ir->clk = devm_clk_get(dev, "clk"); -+ if (IS_ERR(ir->clk)) { -+ dev_err(dev, "failed to get a ir clock.\n"); -+ return PTR_ERR(ir->clk); -+ } -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ ir->base = devm_ioremap_resource(dev, res); -+ if (IS_ERR(ir->base)) { -+ dev_err(dev, "failed to map registers\n"); -+ return PTR_ERR(ir->base); -+ } -+ -+ ir->rc = devm_rc_allocate_device(dev, RC_DRIVER_IR_RAW); -+ if (!ir->rc) { -+ dev_err(dev, "failed to allocate device\n"); -+ return -ENOMEM; -+ } -+ -+ ir->rc->priv = ir; -+ ir->rc->input_name = MTK_IR_DEV; -+ ir->rc->input_phys = MTK_IR_DEV "/input0"; -+ ir->rc->input_id.bustype = BUS_HOST; -+ ir->rc->input_id.vendor = 0x0001; -+ ir->rc->input_id.product = 0x0001; -+ ir->rc->input_id.version = 0x0001; -+ map_name = of_get_property(dn, "linux,rc-map-name", NULL); -+ ir->rc->map_name = map_name ?: RC_MAP_EMPTY; -+ ir->rc->dev.parent = dev; -+ ir->rc->driver_name = MTK_IR_DEV; -+ ir->rc->allowed_protocols = RC_BIT_ALL; -+ ir->rc->rx_resolution = MTK_IR_SAMPLE; -+ ir->rc->timeout = MTK_MAX_SAMPLES * (MTK_IR_SAMPLE + 1); -+ -+ ret = devm_rc_register_device(dev, ir->rc); -+ if (ret) { -+ dev_err(dev, "failed to register rc device\n"); -+ return ret; -+ } -+ -+ platform_set_drvdata(pdev, ir); -+ -+ ir->irq = platform_get_irq(pdev, 0); -+ if (ir->irq < 0) { -+ dev_err(dev, "no irq resource\n"); -+ return -ENODEV; -+ } -+ -+ /* Enable interrupt after proper hardware -+ * setup and IRQ handler registration -+ */ -+ if (clk_prepare_enable(ir->clk)) { -+ dev_err(dev, "try to enable ir_clk failed\n"); -+ ret = -EINVAL; -+ goto exit_clkdisable_clk; -+ } -+ -+ mtk_irq_disable(ir, MTK_IRINT_EN); -+ -+ ret = devm_request_irq(dev, ir->irq, mtk_ir_irq, 0, MTK_IR_DEV, ir); -+ if (ret) { -+ dev_err(dev, "failed request irq\n"); -+ goto exit_clkdisable_clk; -+ } -+ -+ /* Enable IR and PWM */ -+ val = mtk_r32(ir, MTK_CONFIG_HIGH_REG); -+ val |= MTK_PWM_EN | MTK_IR_EN; -+ mtk_w32(ir, val, MTK_CONFIG_HIGH_REG); -+ -+ /* Setting sample period */ -+ mtk_w32_mask(ir, MTK_CHK_PERIOD, MTK_CHK_PERIOD_MASK, -+ MTK_CONFIG_LOW_REG); -+ -+ mtk_irq_enable(ir, MTK_IRINT_EN); -+ -+ dev_info(dev, "Initialized MT7623 IR driver, sample period = %luus\n", -+ DIV_ROUND_CLOSEST(MTK_IR_SAMPLE, 1000)); -+ -+ return 0; -+ -+exit_clkdisable_clk: -+ clk_disable_unprepare(ir->clk); -+ -+ return ret; -+} -+ -+static int mtk_ir_remove(struct platform_device *pdev) -+{ -+ struct mtk_ir *ir = platform_get_drvdata(pdev); -+ -+ /* Avoid contention between remove handler and -+ * IRQ handler so that disabling IR interrupt and -+ * waiting for pending IRQ handler to complete -+ */ -+ mtk_irq_disable(ir, MTK_IRINT_EN); -+ synchronize_irq(ir->irq); -+ -+ clk_disable_unprepare(ir->clk); -+ -+ return 0; -+} -+ -+static const struct of_device_id mtk_ir_match[] = { -+ { .compatible = "mediatek,mt7623-cir" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, mtk_ir_match); -+ -+static struct platform_driver mtk_ir_driver = { -+ .probe = mtk_ir_probe, -+ .remove = mtk_ir_remove, -+ .driver = { -+ .name = MTK_IR_DEV, -+ .of_match_table = mtk_ir_match, -+ }, -+}; -+ -+module_platform_driver(mtk_ir_driver); -+ -+MODULE_DESCRIPTION("Mediatek IR Receiver Controller Driver"); -+MODULE_AUTHOR("Sean Wang "); -+MODULE_LICENSE("GPL"); ---- a/drivers/media/rc/Makefile -+++ b/drivers/media/rc/Makefile -@@ -37,3 +37,4 @@ obj-$(CONFIG_IR_TTUSBIR) += ttusbir.o - obj-$(CONFIG_RC_ST) += st_rc.o - obj-$(CONFIG_IR_SUNXI) += sunxi-cir.o - obj-$(CONFIG_IR_IMG) += img-ir/ -+obj-$(CONFIG_IR_MTK) += mtk-cir.o ---- a/drivers/media/rc/rc-main.c -+++ b/drivers/media/rc/rc-main.c -@@ -1355,7 +1355,7 @@ static struct device_type rc_dev_type = - .uevent = rc_dev_uevent, - }; - --struct rc_dev *rc_allocate_device(void) -+struct rc_dev *rc_allocate_device(enum rc_driver_type type) - { - struct rc_dev *dev; - -@@ -1382,6 +1382,8 @@ struct rc_dev *rc_allocate_device(void) - dev->dev.class = &rc_class; - device_initialize(&dev->dev); - -+ dev->driver_type = type; -+ - __module_get(THIS_MODULE); - return dev; - } -@@ -1403,6 +1405,35 @@ void rc_free_device(struct rc_dev *dev) - } - EXPORT_SYMBOL_GPL(rc_free_device); - -+static void devm_rc_alloc_release(struct device *dev, void *res) -+{ -+ rc_free_device(*(struct rc_dev **)res); -+} -+ -+struct rc_dev *devm_rc_allocate_device(struct device *dev, -+ enum rc_driver_type type) -+{ -+ struct rc_dev **dr, *rc; -+ -+ dr = devres_alloc(devm_rc_alloc_release, sizeof(*dr), GFP_KERNEL); -+ if (!dr) -+ return NULL; -+ -+ rc = rc_allocate_device(type); -+ if (!rc) { -+ devres_free(dr); -+ return NULL; -+ } -+ -+ rc->dev.parent = dev; -+ rc->managed_alloc = true; -+ *dr = rc; -+ devres_add(dev, dr); -+ -+ return rc; -+} -+EXPORT_SYMBOL_GPL(devm_rc_allocate_device); -+ - int rc_register_device(struct rc_dev *dev) - { - static bool raw_init = false; /* raw decoders loaded? */ -@@ -1536,6 +1567,33 @@ out_unlock: - } - EXPORT_SYMBOL_GPL(rc_register_device); - -+static void devm_rc_release(struct device *dev, void *res) -+{ -+ rc_unregister_device(*(struct rc_dev **)res); -+} -+ -+int devm_rc_register_device(struct device *parent, struct rc_dev *dev) -+{ -+ struct rc_dev **dr; -+ int ret; -+ -+ dr = devres_alloc(devm_rc_release, sizeof(*dr), GFP_KERNEL); -+ if (!dr) -+ return -ENOMEM; -+ -+ ret = rc_register_device(dev); -+ if (ret) { -+ devres_free(dr); -+ return ret; -+ } -+ -+ *dr = dev; -+ devres_add(parent, dr); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(devm_rc_register_device); -+ - void rc_unregister_device(struct rc_dev *dev) - { - if (!dev) -@@ -1557,7 +1615,8 @@ void rc_unregister_device(struct rc_dev - - ida_simple_remove(&rc_ida, dev->minor); - -- rc_free_device(dev); -+ if (!dev->managed_alloc) -+ rc_free_device(dev); - } - - EXPORT_SYMBOL_GPL(rc_unregister_device); ---- a/include/media/rc-core.h -+++ b/include/media/rc-core.h -@@ -68,6 +68,7 @@ enum rc_filter_type { - * struct rc_dev - represents a remote control device - * @dev: driver model's view of this device - * @initialized: 1 if the device init has completed, 0 otherwise -+ * @managed_alloc: devm_rc_allocate_device was used to create rc_dev - * @sysfs_groups: sysfs attribute groups - * @input_name: name of the input child device - * @input_phys: physical path to the input child device -@@ -131,6 +132,7 @@ enum rc_filter_type { - struct rc_dev { - struct device dev; - atomic_t initialized; -+ bool managed_alloc; - const struct attribute_group *sysfs_groups[5]; - const char *input_name; - const char *input_phys; -@@ -198,9 +200,19 @@ struct rc_dev { - /** - * rc_allocate_device - Allocates a RC device - * -+ * @rc_driver_type: specifies the type of the RC output to be allocated - * returns a pointer to struct rc_dev. - */ --struct rc_dev *rc_allocate_device(void); -+struct rc_dev *rc_allocate_device(enum rc_driver_type); -+ -+/** -+ * devm_rc_allocate_device - Managed RC device allocation -+ * -+ * @dev: pointer to struct device -+ * @rc_driver_type: specifies the type of the RC output to be allocated -+ * returns a pointer to struct rc_dev. -+ */ -+struct rc_dev *devm_rc_allocate_device(struct device *dev, enum rc_driver_type); - - /** - * rc_free_device - Frees a RC device -@@ -217,6 +229,14 @@ void rc_free_device(struct rc_dev *dev); - int rc_register_device(struct rc_dev *dev); - - /** -+ * devm_rc_register_device - Manageded registering of a RC device -+ * -+ * @parent: pointer to struct device. -+ * @dev: pointer to struct rc_dev. -+ */ -+int devm_rc_register_device(struct device *parent, struct rc_dev *dev); -+ -+/** - * rc_unregister_device - Unregisters a RC device - * - * @dev: pointer to struct rc_dev. ---- a/drivers/media/common/siano/smsir.c -+++ b/drivers/media/common/siano/smsir.c -@@ -58,7 +58,7 @@ int sms_ir_init(struct smscore_device_t - struct rc_dev *dev; - - pr_debug("Allocating rc device\n"); -- dev = rc_allocate_device(); -+ dev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!dev) - return -ENOMEM; - ---- a/drivers/media/i2c/ir-kbd-i2c.c -+++ b/drivers/media/i2c/ir-kbd-i2c.c -@@ -428,7 +428,7 @@ static int ir_probe(struct i2c_client *c - * If platform_data doesn't specify rc_dev, initialize it - * internally - */ -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!rc) - return -ENOMEM; - } ---- a/drivers/media/pci/bt8xx/bttv-input.c -+++ b/drivers/media/pci/bt8xx/bttv-input.c -@@ -424,7 +424,7 @@ int bttv_input_init(struct bttv *btv) - return -ENODEV; - - ir = kzalloc(sizeof(*ir),GFP_KERNEL); -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!ir || !rc) - goto err_out_free; - ---- a/drivers/media/pci/cx23885/cx23885-input.c -+++ b/drivers/media/pci/cx23885/cx23885-input.c -@@ -267,7 +267,6 @@ int cx23885_input_init(struct cx23885_de - struct cx23885_kernel_ir *kernel_ir; - struct rc_dev *rc; - char *rc_map; -- enum rc_driver_type driver_type; - u64 allowed_protos; - - int ret; -@@ -352,7 +351,7 @@ int cx23885_input_init(struct cx23885_de - pci_name(dev->pci)); - - /* input device */ -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rc) { - ret = -ENOMEM; - goto err_out_free; -@@ -371,7 +370,6 @@ int cx23885_input_init(struct cx23885_de - rc->input_id.product = dev->pci->device; - } - rc->dev.parent = &dev->pci->dev; -- rc->driver_type = driver_type; - rc->allowed_protocols = allowed_protos; - rc->priv = kernel_ir; - rc->open = cx23885_input_ir_open; ---- a/drivers/media/pci/cx88/cx88-input.c -+++ b/drivers/media/pci/cx88/cx88-input.c -@@ -272,7 +272,7 @@ int cx88_ir_init(struct cx88_core *core, - */ - - ir = kzalloc(sizeof(*ir), GFP_KERNEL); -- dev = rc_allocate_device(); -+ dev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!ir || !dev) - goto err_out_free; - -@@ -482,7 +482,6 @@ int cx88_ir_init(struct cx88_core *core, - dev->scancode_mask = hardware_mask; - - if (ir->sampling) { -- dev->driver_type = RC_DRIVER_IR_RAW; - dev->timeout = 10 * 1000 * 1000; /* 10 ms */ - } else { - dev->driver_type = RC_DRIVER_SCANCODE; ---- a/drivers/media/pci/dm1105/dm1105.c -+++ b/drivers/media/pci/dm1105/dm1105.c -@@ -744,7 +744,7 @@ static int dm1105_ir_init(struct dm1105_ - struct rc_dev *dev; - int err = -ENOMEM; - -- dev = rc_allocate_device(); -+ dev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!dev) - return -ENOMEM; - -@@ -753,7 +753,6 @@ static int dm1105_ir_init(struct dm1105_ - - dev->driver_name = MODULE_NAME; - dev->map_name = RC_MAP_DM1105_NEC; -- dev->driver_type = RC_DRIVER_SCANCODE; - dev->input_name = "DVB on-card IR receiver"; - dev->input_phys = dm1105->ir.input_phys; - dev->input_id.bustype = BUS_PCI; ---- a/drivers/media/pci/mantis/mantis_input.c -+++ b/drivers/media/pci/mantis/mantis_input.c -@@ -39,7 +39,7 @@ int mantis_input_init(struct mantis_pci - struct rc_dev *dev; - int err; - -- dev = rc_allocate_device(); -+ dev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!dev) { - dprintk(MANTIS_ERROR, 1, "Remote device allocation failed"); - err = -ENOMEM; ---- a/drivers/media/pci/saa7134/saa7134-input.c -+++ b/drivers/media/pci/saa7134/saa7134-input.c -@@ -849,7 +849,7 @@ int saa7134_input_init1(struct saa7134_d - } - - ir = kzalloc(sizeof(*ir), GFP_KERNEL); -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!ir || !rc) { - err = -ENOMEM; - goto err_out_free; ---- a/drivers/media/pci/smipcie/smipcie-ir.c -+++ b/drivers/media/pci/smipcie/smipcie-ir.c -@@ -183,7 +183,7 @@ int smi_ir_init(struct smi_dev *dev) - struct rc_dev *rc_dev; - struct smi_rc *ir = &dev->ir; - -- rc_dev = rc_allocate_device(); -+ rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!rc_dev) - return -ENOMEM; - -@@ -202,7 +202,6 @@ int smi_ir_init(struct smi_dev *dev) - rc_dev->input_id.product = dev->pci_dev->subsystem_device; - rc_dev->dev.parent = &dev->pci_dev->dev; - -- rc_dev->driver_type = RC_DRIVER_SCANCODE; - rc_dev->map_name = dev->info->rc_map; - - ir->rc_dev = rc_dev; ---- a/drivers/media/pci/ttpci/budget-ci.c -+++ b/drivers/media/pci/ttpci/budget-ci.c -@@ -177,7 +177,7 @@ static int msp430_ir_init(struct budget_ - struct rc_dev *dev; - int error; - -- dev = rc_allocate_device(); -+ dev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!dev) { - printk(KERN_ERR "budget_ci: IR interface initialisation failed\n"); - return -ENOMEM; ---- a/drivers/media/rc/ati_remote.c -+++ b/drivers/media/rc/ati_remote.c -@@ -765,7 +765,6 @@ static void ati_remote_rc_init(struct at - struct rc_dev *rdev = ati_remote->rdev; - - rdev->priv = ati_remote; -- rdev->driver_type = RC_DRIVER_SCANCODE; - rdev->allowed_protocols = RC_BIT_OTHER; - rdev->driver_name = "ati_remote"; - -@@ -852,7 +851,7 @@ static int ati_remote_probe(struct usb_i - } - - ati_remote = kzalloc(sizeof (struct ati_remote), GFP_KERNEL); -- rc_dev = rc_allocate_device(); -+ rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!ati_remote || !rc_dev) - goto exit_free_dev_rdev; - ---- a/drivers/media/rc/ene_ir.c -+++ b/drivers/media/rc/ene_ir.c -@@ -1012,7 +1012,7 @@ static int ene_probe(struct pnp_dev *pnp - - /* allocate memory */ - dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL); -- rdev = rc_allocate_device(); -+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!dev || !rdev) - goto exit_free_dev_rdev; - ---- a/drivers/media/rc/fintek-cir.c -+++ b/drivers/media/rc/fintek-cir.c -@@ -496,7 +496,7 @@ static int fintek_probe(struct pnp_dev * - return ret; - - /* input device for IR remote (and tx) */ -- rdev = rc_allocate_device(); -+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rdev) - goto exit_free_dev_rdev; - ---- a/drivers/media/rc/gpio-ir-recv.c -+++ b/drivers/media/rc/gpio-ir-recv.c -@@ -143,14 +143,13 @@ static int gpio_ir_recv_probe(struct pla - if (!gpio_dev) - return -ENOMEM; - -- rcdev = rc_allocate_device(); -+ rcdev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rcdev) { - rc = -ENOMEM; - goto err_allocate_device; - } - - rcdev->priv = gpio_dev; -- rcdev->driver_type = RC_DRIVER_IR_RAW; - rcdev->input_name = GPIO_IR_DEVICE_NAME; - rcdev->input_phys = GPIO_IR_DEVICE_NAME "/input0"; - rcdev->input_id.bustype = BUS_HOST; ---- a/drivers/media/rc/igorplugusb.c -+++ b/drivers/media/rc/igorplugusb.c -@@ -190,7 +190,7 @@ static int igorplugusb_probe(struct usb_ - - usb_make_path(udev, ir->phys, sizeof(ir->phys)); - -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rc) - goto fail; - -@@ -198,7 +198,6 @@ static int igorplugusb_probe(struct usb_ - rc->input_phys = ir->phys; - usb_to_input_id(udev, &rc->input_id); - rc->dev.parent = &intf->dev; -- rc->driver_type = RC_DRIVER_IR_RAW; - /* - * This device can only store 36 pulses + spaces, which is not enough - * for the NEC protocol and many others. ---- a/drivers/media/rc/iguanair.c -+++ b/drivers/media/rc/iguanair.c -@@ -431,7 +431,7 @@ static int iguanair_probe(struct usb_int - struct usb_host_interface *idesc; - - ir = kzalloc(sizeof(*ir), GFP_KERNEL); -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!ir || !rc) { - ret = -ENOMEM; - goto out; ---- a/drivers/media/rc/img-ir/img-ir-hw.c -+++ b/drivers/media/rc/img-ir/img-ir-hw.c -@@ -1071,7 +1071,7 @@ int img_ir_probe_hw(struct img_ir_priv * - } - - /* Allocate hardware decoder */ -- hw->rdev = rdev = rc_allocate_device(); -+ hw->rdev = rdev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!rdev) { - dev_err(priv->dev, "cannot allocate input device\n"); - error = -ENOMEM; ---- a/drivers/media/rc/img-ir/img-ir-raw.c -+++ b/drivers/media/rc/img-ir/img-ir-raw.c -@@ -110,7 +110,7 @@ int img_ir_probe_raw(struct img_ir_priv - setup_timer(&raw->timer, img_ir_echo_timer, (unsigned long)priv); - - /* Allocate raw decoder */ -- raw->rdev = rdev = rc_allocate_device(); -+ raw->rdev = rdev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rdev) { - dev_err(priv->dev, "cannot allocate raw input device\n"); - return -ENOMEM; -@@ -118,7 +118,6 @@ int img_ir_probe_raw(struct img_ir_priv - rdev->priv = priv; - rdev->map_name = RC_MAP_EMPTY; - rdev->input_name = "IMG Infrared Decoder Raw"; -- rdev->driver_type = RC_DRIVER_IR_RAW; - - /* Register raw decoder */ - error = rc_register_device(rdev); ---- a/drivers/media/rc/imon.c -+++ b/drivers/media/rc/imon.c -@@ -1951,7 +1951,7 @@ static struct rc_dev *imon_init_rdev(str - const unsigned char fp_packet[] = { 0x40, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x88 }; - -- rdev = rc_allocate_device(); -+ rdev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!rdev) { - dev_err(ictx->dev, "remote control dev allocation failed\n"); - goto out; -@@ -1969,7 +1969,6 @@ static struct rc_dev *imon_init_rdev(str - rdev->dev.parent = ictx->dev; - - rdev->priv = ictx; -- rdev->driver_type = RC_DRIVER_SCANCODE; - rdev->allowed_protocols = RC_BIT_OTHER | RC_BIT_RC6_MCE; /* iMON PAD or MCE */ - rdev->change_protocol = imon_ir_change_protocol; - rdev->driver_name = MOD_NAME; ---- a/drivers/media/rc/ir-hix5hd2.c -+++ b/drivers/media/rc/ir-hix5hd2.c -@@ -222,7 +222,7 @@ static int hix5hd2_ir_probe(struct platf - return priv->irq; - } - -- rdev = rc_allocate_device(); -+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rdev) - return -ENOMEM; - ---- a/drivers/media/rc/ite-cir.c -+++ b/drivers/media/rc/ite-cir.c -@@ -1472,7 +1472,7 @@ static int ite_probe(struct pnp_dev *pde - return ret; - - /* input device for IR remote (and tx) */ -- rdev = rc_allocate_device(); -+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rdev) - goto exit_free_dev_rdev; - itdev->rdev = rdev; ---- a/drivers/media/rc/mceusb.c -+++ b/drivers/media/rc/mceusb.c -@@ -1220,7 +1220,7 @@ static struct rc_dev *mceusb_init_rc_dev - struct rc_dev *rc; - int ret; - -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rc) { - dev_err(dev, "remote dev allocation failed"); - goto out; ---- a/drivers/media/rc/meson-ir.c -+++ b/drivers/media/rc/meson-ir.c -@@ -131,7 +131,7 @@ static int meson_ir_probe(struct platfor - return ir->irq; - } - -- ir->rc = rc_allocate_device(); -+ ir->rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!ir->rc) { - dev_err(dev, "failed to allocate rc device\n"); - return -ENOMEM; ---- a/drivers/media/rc/rc-loopback.c -+++ b/drivers/media/rc/rc-loopback.c -@@ -181,7 +181,7 @@ static int __init loop_init(void) - struct rc_dev *rc; - int ret; - -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rc) { - printk(KERN_ERR DRIVER_NAME ": rc_dev allocation failed\n"); - return -ENOMEM; ---- a/drivers/media/rc/st_rc.c -+++ b/drivers/media/rc/st_rc.c -@@ -235,7 +235,7 @@ static int st_rc_probe(struct platform_d - if (!rc_dev) - return -ENOMEM; - -- rdev = rc_allocate_device(); -+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW); - - if (!rdev) - return -ENOMEM; ---- a/drivers/media/rc/streamzap.c -+++ b/drivers/media/rc/streamzap.c -@@ -291,7 +291,7 @@ static struct rc_dev *streamzap_init_rc_ - struct device *dev = sz->dev; - int ret; - -- rdev = rc_allocate_device(); -+ rdev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!rdev) { - dev_err(dev, "remote dev allocation failed\n"); - goto out; ---- a/drivers/media/rc/sunxi-cir.c -+++ b/drivers/media/rc/sunxi-cir.c -@@ -212,7 +212,7 @@ static int sunxi_ir_probe(struct platfor - goto exit_clkdisable_clk; - } - -- ir->rc = rc_allocate_device(); -+ ir->rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!ir->rc) { - dev_err(dev, "failed to allocate device\n"); - ret = -ENOMEM; ---- a/drivers/media/rc/ttusbir.c -+++ b/drivers/media/rc/ttusbir.c -@@ -205,7 +205,7 @@ static int ttusbir_probe(struct usb_inte - int altsetting = -1; - - tt = kzalloc(sizeof(*tt), GFP_KERNEL); -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!tt || !rc) { - ret = -ENOMEM; - goto out; ---- a/drivers/media/rc/winbond-cir.c -+++ b/drivers/media/rc/winbond-cir.c -@@ -1062,13 +1062,12 @@ wbcir_probe(struct pnp_dev *device, cons - if (err) - goto exit_free_data; - -- data->dev = rc_allocate_device(); -+ data->dev = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!data->dev) { - err = -ENOMEM; - goto exit_unregister_led; - } - -- data->dev->driver_type = RC_DRIVER_IR_RAW; - data->dev->driver_name = DRVNAME; - data->dev->input_name = WBCIR_NAME; - data->dev->input_phys = "wbcir/cir0"; ---- a/drivers/media/usb/au0828/au0828-input.c -+++ b/drivers/media/usb/au0828/au0828-input.c -@@ -298,7 +298,7 @@ int au0828_rc_register(struct au0828_dev - return -ENODEV; - - ir = kzalloc(sizeof(*ir), GFP_KERNEL); -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_IR_RAW); - if (!ir || !rc) - goto error; - -@@ -343,7 +343,6 @@ int au0828_rc_register(struct au0828_dev - rc->input_id.product = le16_to_cpu(dev->usbdev->descriptor.idProduct); - rc->dev.parent = &dev->usbdev->dev; - rc->driver_name = "au0828-input"; -- rc->driver_type = RC_DRIVER_IR_RAW; - rc->allowed_protocols = RC_BIT_NEC | RC_BIT_NECX | RC_BIT_NEC32 | - RC_BIT_RC5; - ---- a/drivers/media/usb/cx231xx/cx231xx-input.c -+++ b/drivers/media/usb/cx231xx/cx231xx-input.c -@@ -72,7 +72,7 @@ int cx231xx_ir_init(struct cx231xx *dev) - - memset(&info, 0, sizeof(struct i2c_board_info)); - memset(&dev->init_data, 0, sizeof(dev->init_data)); -- dev->init_data.rc_dev = rc_allocate_device(); -+ dev->init_data.rc_dev = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!dev->init_data.rc_dev) - return -ENOMEM; - ---- a/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c -+++ b/drivers/media/usb/dvb-usb-v2/dvb_usb_core.c -@@ -147,7 +147,7 @@ static int dvb_usbv2_remote_init(struct - if (!d->rc.map_name) - return 0; - -- dev = rc_allocate_device(); -+ dev = rc_allocate_device(d->rc.driver_type); - if (!dev) { - ret = -ENOMEM; - goto err; -@@ -162,7 +162,6 @@ static int dvb_usbv2_remote_init(struct - /* TODO: likely RC-core should took const char * */ - dev->driver_name = (char *) d->props->driver_name; - dev->map_name = d->rc.map_name; -- dev->driver_type = d->rc.driver_type; - dev->allowed_protocols = d->rc.allowed_protos; - dev->change_protocol = d->rc.change_protocol; - dev->priv = d; ---- a/drivers/media/usb/dvb-usb/dvb-usb-remote.c -+++ b/drivers/media/usb/dvb-usb/dvb-usb-remote.c -@@ -265,7 +265,7 @@ static int rc_core_dvb_usb_remote_init(s - int err, rc_interval; - struct rc_dev *dev; - -- dev = rc_allocate_device(); -+ dev = rc_allocate_device(d->props.rc.core.driver_type); - if (!dev) - return -ENOMEM; - -@@ -273,7 +273,6 @@ static int rc_core_dvb_usb_remote_init(s - dev->map_name = d->props.rc.core.rc_codes; - dev->change_protocol = d->props.rc.core.change_protocol; - dev->allowed_protocols = d->props.rc.core.allowed_protos; -- dev->driver_type = d->props.rc.core.driver_type; - usb_to_input_id(d->udev, &dev->input_id); - dev->input_name = "IR-receiver inside an USB DVB receiver"; - dev->input_phys = d->rc_phys; ---- a/drivers/media/usb/em28xx/em28xx-input.c -+++ b/drivers/media/usb/em28xx/em28xx-input.c -@@ -713,7 +713,7 @@ static int em28xx_ir_init(struct em28xx - ir = kzalloc(sizeof(*ir), GFP_KERNEL); - if (!ir) - return -ENOMEM; -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!rc) - goto error; - ---- a/drivers/media/usb/tm6000/tm6000-input.c -+++ b/drivers/media/usb/tm6000/tm6000-input.c -@@ -429,7 +429,7 @@ int tm6000_ir_init(struct tm6000_core *d - return 0; - - ir = kzalloc(sizeof(*ir), GFP_ATOMIC); -- rc = rc_allocate_device(); -+ rc = rc_allocate_device(RC_DRIVER_SCANCODE); - if (!ir || !rc) - goto out; - -@@ -456,7 +456,6 @@ int tm6000_ir_init(struct tm6000_core *d - ir->polling = 50; - INIT_DELAYED_WORK(&ir->work, tm6000_ir_handle_key); - } -- rc->driver_type = RC_DRIVER_SCANCODE; - - snprintf(ir->name, sizeof(ir->name), "tm5600/60x0 IR (%s)", - dev->name); diff --git a/target/linux/mediatek/patches-4.9/0025-dt-bindings-net-dsa-add-Mediatek-MT7530-binding.patch b/target/linux/mediatek/patches-4.9/0025-dt-bindings-net-dsa-add-Mediatek-MT7530-binding.patch deleted file mode 100644 index 24e13d1a3..000000000 --- a/target/linux/mediatek/patches-4.9/0025-dt-bindings-net-dsa-add-Mediatek-MT7530-binding.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 3b9b46b5705214b16c5356284ad68be32ae56a26 Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Wed, 29 Mar 2017 17:38:19 +0800 -Subject: [PATCH 25/57] dt-bindings: net: dsa: add Mediatek MT7530 binding - -Add device-tree binding for Mediatek MT7530 switch. - -Cc: devicetree@vger.kernel.org -Signed-off-by: Sean Wang -Acked-by: Rob Herring ---- - .../devicetree/bindings/net/dsa/mt7530.txt | 92 ++++++++++++++++++++++ - 1 file changed, 92 insertions(+) - create mode 100644 Documentation/devicetree/bindings/net/dsa/mt7530.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt -@@ -0,0 +1,92 @@ -+Mediatek MT7530 Ethernet switch -+================================ -+ -+Required properties: -+ -+- compatible: Must be compatible = "mediatek,mt7530"; -+- #address-cells: Must be 1. -+- #size-cells: Must be 0. -+- mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part -+ on multi-chip module belong to MT7623A has or the remotely standalone -+ chip as the function MT7623N reference board provided for. -+- core-supply: Phandle to the regulator node necessary for the core power. -+- io-supply: Phandle to the regulator node necessary for the I/O power. -+ See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt -+ for details for the regulator setup on these boards. -+ -+If the property mediatek,mcm isn't defined, following property is required -+ -+- reset-gpios: Should be a gpio specifier for a reset line. -+ -+Else, following properties are required -+ -+- resets : Phandle pointing to the system reset controller with -+ line index for the ethsys. -+- reset-names : Should be set to "mcm". -+ -+Required properties for the child nodes within ports container: -+ -+- reg: Port address described must be 6 for CPU port and from 0 to 5 for -+ user ports. -+- phy-mode: String, must be either "trgmii" or "rgmii" for port labeled -+ "cpu". -+ -+See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional -+required, optional properties and how the integrated switch subnodes must -+be specified. -+ -+Example: -+ -+ &mdio0 { -+ switch@0 { -+ compatible = "mediatek,mt7530"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0>; -+ -+ core-supply = <&mt6323_vpa_reg>; -+ io-supply = <&mt6323_vemc3v3_reg>; -+ reset-gpios = <&pio 33 0>; -+ -+ ports { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <0>; -+ port@0 { -+ reg = <0>; -+ label = "lan0"; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ label = "lan1"; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ label = "lan2"; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ label = "lan3"; -+ }; -+ -+ port@4 { -+ reg = <4>; -+ label = "wan"; -+ }; -+ -+ port@6 { -+ reg = <6>; -+ label = "cpu"; -+ ethernet = <&gmac0>; -+ phy-mode = "trgmii"; -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+ }; -+ }; -+ }; diff --git a/target/linux/mediatek/patches-4.9/0026-net-mediatek-backport-v4.10-driver.patch b/target/linux/mediatek/patches-4.9/0026-net-mediatek-backport-v4.10-driver.patch deleted file mode 100644 index 8a6d59362..000000000 --- a/target/linux/mediatek/patches-4.9/0026-net-mediatek-backport-v4.10-driver.patch +++ /dev/null @@ -1,1788 +0,0 @@ -From 99d9d02a05df503184be094de336e7515fe3e235 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 14:26:29 +0200 -Subject: [PATCH 26/57] net: mediatek: backport v4.10 driver - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 49 ++- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 16 +- - drivers/net/ethernet/mediatek/mtk_hnat/Makefile | 4 + - drivers/net/ethernet/mediatek/mtk_hnat/hnat.c | 315 +++++++++++++++ - drivers/net/ethernet/mediatek/mtk_hnat/hnat.h | 425 +++++++++++++++++++++ - .../net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c | 259 +++++++++++++ - .../net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c | 289 ++++++++++++++ - .../net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h | 44 +++ - 8 files changed, 1378 insertions(+), 23 deletions(-) - create mode 100644 drivers/net/ethernet/mediatek/mtk_hnat/Makefile - create mode 100644 drivers/net/ethernet/mediatek/mtk_hnat/hnat.c - create mode 100644 drivers/net/ethernet/mediatek/mtk_hnat/hnat.h - create mode 100644 drivers/net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c - create mode 100644 drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c - create mode 100644 drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -462,8 +462,8 @@ static void mtk_stats_update(struct mtk_ - } - } - --static struct rtnl_link_stats64 *mtk_get_stats64(struct net_device *dev, -- struct rtnl_link_stats64 *storage) -+static struct rtnl_link_stats64 * mtk_get_stats64(struct net_device *dev, -+ struct rtnl_link_stats64 *storage) - { - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_hw_stats *hw_stats = mac->hw_stats; -@@ -615,7 +615,7 @@ static int mtk_tx_map(struct sk_buff *sk - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - struct mtk_tx_dma *itxd, *txd; -- struct mtk_tx_buf *tx_buf; -+ struct mtk_tx_buf *itx_buf, *tx_buf; - dma_addr_t mapped_addr; - unsigned int nr_frags; - int i, n_desc = 1; -@@ -629,8 +629,8 @@ static int mtk_tx_map(struct sk_buff *sk - fport = (mac->id + 1) << TX_DMA_FPORT_SHIFT; - txd4 |= fport; - -- tx_buf = mtk_desc_to_tx_buf(ring, itxd); -- memset(tx_buf, 0, sizeof(*tx_buf)); -+ itx_buf = mtk_desc_to_tx_buf(ring, itxd); -+ memset(itx_buf, 0, sizeof(*itx_buf)); - - if (gso) - txd4 |= TX_DMA_TSO; -@@ -649,9 +649,11 @@ static int mtk_tx_map(struct sk_buff *sk - return -ENOMEM; - - WRITE_ONCE(itxd->txd1, mapped_addr); -- tx_buf->flags |= MTK_TX_FLAGS_SINGLE0; -- dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); -- dma_unmap_len_set(tx_buf, dma_len0, skb_headlen(skb)); -+ itx_buf->flags |= MTK_TX_FLAGS_SINGLE0; -+ itx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 : -+ MTK_TX_FLAGS_FPORT1; -+ dma_unmap_addr_set(itx_buf, dma_addr0, mapped_addr); -+ dma_unmap_len_set(itx_buf, dma_len0, skb_headlen(skb)); - - /* TX SG offload */ - txd = itxd; -@@ -687,11 +689,13 @@ static int mtk_tx_map(struct sk_buff *sk - last_frag * TX_DMA_LS0)); - WRITE_ONCE(txd->txd4, fport); - -- tx_buf->skb = (struct sk_buff *)MTK_DMA_DUMMY_DESC; - tx_buf = mtk_desc_to_tx_buf(ring, txd); - memset(tx_buf, 0, sizeof(*tx_buf)); -- -+ tx_buf->skb = (struct sk_buff *)MTK_DMA_DUMMY_DESC; - tx_buf->flags |= MTK_TX_FLAGS_PAGE0; -+ tx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 : -+ MTK_TX_FLAGS_FPORT1; -+ - dma_unmap_addr_set(tx_buf, dma_addr0, mapped_addr); - dma_unmap_len_set(tx_buf, dma_len0, frag_map_size); - frag_size -= frag_map_size; -@@ -700,7 +704,7 @@ static int mtk_tx_map(struct sk_buff *sk - } - - /* store skb to cleanup */ -- tx_buf->skb = skb; -+ itx_buf->skb = skb; - - WRITE_ONCE(itxd->txd4, txd4); - WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) | -@@ -845,7 +849,7 @@ static int mtk_start_xmit(struct sk_buff - drop: - spin_unlock(ð->page_lock); - stats->tx_dropped++; -- dev_kfree_skb(skb); -+ dev_kfree_skb_any(skb); - return NETDEV_TX_OK; - } - -@@ -1014,17 +1018,16 @@ static int mtk_poll_tx(struct mtk_eth *e - - while ((cpu != dma) && budget) { - u32 next_cpu = desc->txd2; -- int mac; -+ int mac = 0; - - desc = mtk_qdma_phys_to_virt(ring, desc->txd2); - if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0) - break; - -- mac = (desc->txd4 >> TX_DMA_FPORT_SHIFT) & -- TX_DMA_FPORT_MASK; -- mac--; -- - tx_buf = mtk_desc_to_tx_buf(ring, desc); -+ if (tx_buf->flags & MTK_TX_FLAGS_FPORT1) -+ mac = 1; -+ - skb = tx_buf->skb; - if (!skb) { - condition = 1; -@@ -1848,6 +1851,12 @@ static int mtk_hw_init(struct mtk_eth *e - /* GE2, Force 1000M/FD, FC ON */ - mtk_w32(eth, MAC_MCR_FIXED_LINK, MTK_MAC_MCR(1)); - -+ /* Indicates CDM to parse the MTK special tag from CPU -+ * which also is working out for untag packets. -+ */ -+ val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); -+ mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); -+ - /* Enable RX VLan Offloading */ - mtk_w32(eth, 1, MTK_CDMP_EG_CTRL); - -@@ -1910,10 +1919,9 @@ static int __init mtk_init(struct net_de - - /* If the mac address is invalid, use random mac address */ - if (!is_valid_ether_addr(dev->dev_addr)) { -- random_ether_addr(dev->dev_addr); -+ eth_hw_addr_random(dev); - dev_err(eth->dev, "generated random MAC address %pM\n", - dev->dev_addr); -- dev->addr_assign_type = NET_ADDR_RANDOM; - } - - return mtk_phy_connect(dev); -@@ -2247,7 +2255,6 @@ static const struct net_device_ops mtk_n - .ndo_set_mac_address = mtk_set_mac_address, - .ndo_validate_addr = eth_validate_addr, - .ndo_do_ioctl = mtk_do_ioctl, -- .ndo_change_mtu = eth_change_mtu, - .ndo_tx_timeout = mtk_tx_timeout, - .ndo_get_stats64 = mtk_get_stats64, - .ndo_fix_features = mtk_fix_features, -@@ -2320,6 +2327,8 @@ static int mtk_add_mac(struct mtk_eth *e - eth->netdev[id]->ethtool_ops = &mtk_ethtool_ops; - - eth->netdev[id]->irq = eth->irq[0]; -+ eth->netdev[id]->dev.of_node = np; -+ - return 0; - - free_netdev: ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -70,6 +70,10 @@ - /* Frame Engine Interrupt Grouping Register */ - #define MTK_FE_INT_GRP 0x20 - -+/* CDMP Ingress Control Register */ -+#define MTK_CDMQ_IG_CTRL 0x1400 -+#define MTK_CDMQ_STAG_EN BIT(0) -+ - /* CDMP Exgress Control Register */ - #define MTK_CDMP_EG_CTRL 0x404 - -@@ -406,12 +410,18 @@ struct mtk_hw_stats { - struct u64_stats_sync syncp; - }; - --/* PDMA descriptor can point at 1-2 segments. This enum allows us to track how -- * memory was allocated so that it can be freed properly -- */ - enum mtk_tx_flags { -+ /* PDMA descriptor can point at 1-2 segments. This enum allows us to -+ * track how memory was allocated so that it can be freed properly. -+ */ - MTK_TX_FLAGS_SINGLE0 = 0x01, - MTK_TX_FLAGS_PAGE0 = 0x02, -+ -+ /* MTK_TX_FLAGS_FPORTx allows tracking which port the transmitted -+ * SKB out instead of looking up through hardware TX descriptor. -+ */ -+ MTK_TX_FLAGS_FPORT0 = 0x04, -+ MTK_TX_FLAGS_FPORT1 = 0x08, - }; - - /* This enum allows us to identify how the clock is defined on the array of the ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_hnat/Makefile -@@ -0,0 +1,4 @@ -+ccflags-y=-Werror -+ -+obj-$(CONFIG_NET_MEDIATEK_HNAT) += mtkhnat.o -+mtkhnat-objs := hnat.o hnat_nf_hook.o hnat_debugfs.o ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c -@@ -0,0 +1,315 @@ -+/* This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; version 2 of the License -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Copyright (C) 2014-2016 Sean Wang -+ * Copyright (C) 2016-2017 John Crispin -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "hnat.h" -+ -+struct hnat_priv *host; -+ -+static void cr_set_bits(void __iomem * reg, u32 bs) -+{ -+ u32 val = readl(reg); -+ -+ val |= bs; -+ writel(val, reg); -+} -+ -+static void cr_clr_bits(void __iomem * reg, u32 bs) -+{ -+ u32 val = readl(reg); -+ -+ val &= ~bs; -+ writel(val, reg); -+} -+ -+static void cr_set_field(void __iomem * reg, u32 field, u32 val) -+{ -+ unsigned int tv = readl(reg); -+ -+ tv &= ~field; -+ tv |= ((val) << (ffs((unsigned int)field) - 1)); -+ writel(tv, reg); -+} -+ -+static int hnat_start(void) -+{ -+ u32 foe_table_sz; -+ -+ /* mapp the FOE table */ -+ foe_table_sz = FOE_4TB_SIZ * sizeof(struct foe_entry); -+ host->foe_table_cpu = -+ dma_alloc_coherent(host->dev, foe_table_sz, &host->foe_table_dev, -+ GFP_KERNEL); -+ if (!host->foe_table_cpu) -+ return -1; -+ -+ writel(host->foe_table_dev, host->ppe_base + PPE_TB_BASE); -+ memset(host->foe_table_cpu, 0, foe_table_sz); -+ -+ /* setup hashing */ -+ cr_set_field(host->ppe_base + PPE_TB_CFG, TB_ETRY_NUM, TABLE_4K); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, HASH_MODE, HASH_MODE_1); -+ writel(HASH_SEED_KEY, host->ppe_base + PPE_HASH_SEED); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, XMODE, 0); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, TB_ENTRY_SIZE, ENTRY_64B); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, SMA, SMA_FWD_CPU_BUILD_ENTRY); -+ -+ /* set ip proto */ -+ writel(0xFFFFFFFF, host->ppe_base + PPE_IP_PROT_CHK); -+ -+ /* setup caching */ -+ cr_set_field(host->ppe_base + PPE_CAH_CTRL, CAH_X_MODE, 1); -+ cr_set_field(host->ppe_base + PPE_CAH_CTRL, CAH_X_MODE, 0); -+ cr_set_field(host->ppe_base + PPE_CAH_CTRL, CAH_EN, 1); -+ -+ /* enable FOE */ -+ cr_set_bits(host->ppe_base + PPE_FLOW_CFG, -+ BIT_IPV4_NAT_EN | BIT_IPV4_NAPT_EN | -+ BIT_IPV4_NAT_FRAG_EN | BIT_IPV4_HASH_GREK); -+ -+ /* setup FOE aging */ -+ cr_set_field(host->ppe_base + PPE_TB_CFG, NTU_AGE, 1); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, UNBD_AGE, 1); -+ cr_set_field(host->ppe_base + PPE_UNB_AGE, UNB_MNP, 1000); -+ cr_set_field(host->ppe_base + PPE_UNB_AGE, UNB_DLTA, 3); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, TCP_AGE, 1); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, UDP_AGE, 1); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, FIN_AGE, 1); -+ cr_set_field(host->ppe_base + PPE_BND_AGE_0, UDP_DLTA, 5); -+ cr_set_field(host->ppe_base + PPE_BND_AGE_0, NTU_DLTA, 5); -+ cr_set_field(host->ppe_base + PPE_BND_AGE_1, FIN_DLTA, 5); -+ cr_set_field(host->ppe_base + PPE_BND_AGE_1, TCP_DLTA, 5); -+ -+ /* setup FOE ka */ -+ cr_set_field(host->ppe_base + PPE_TB_CFG, KA_CFG, 3); -+ cr_set_field(host->ppe_base + PPE_KA, KA_T, 1); -+ cr_set_field(host->ppe_base + PPE_KA, TCP_KA, 1); -+ cr_set_field(host->ppe_base + PPE_KA, UDP_KA, 1); -+ cr_set_field(host->ppe_base + PPE_BIND_LMT_1, NTU_KA, 1); -+ -+ /* setup FOE rate limit */ -+ cr_set_field(host->ppe_base + PPE_BIND_LMT_0, QURT_LMT, 16383); -+ cr_set_field(host->ppe_base + PPE_BIND_LMT_0, HALF_LMT, 16383); -+ cr_set_field(host->ppe_base + PPE_BIND_LMT_1, FULL_LMT, 16383); -+ cr_set_field(host->ppe_base + PPE_BNDR, BIND_RATE, 1); -+ -+ /* setup FOE cf gen */ -+ cr_set_field(host->ppe_base + PPE_GLO_CFG, PPE_EN, 1); -+ writel(0, host->ppe_base + PPE_DFT_CPORT); // pdma -+ //writel(0x55555555, host->ppe_base + PPE_DFT_CPORT); //qdma -+ cr_set_field(host->ppe_base + PPE_GLO_CFG, TTL0_DRP, 1); -+ -+ /* fwd packets from gmac to PPE */ -+ cr_clr_bits(host->fe_base + GDMA1_FWD_CFG, GDM1_ALL_FRC_MASK); -+ cr_set_bits(host->fe_base + GDMA1_FWD_CFG, -+ BITS_GDM1_ALL_FRC_P_PPE); -+ cr_clr_bits(host->fe_base + GDMA2_FWD_CFG, GDM2_ALL_FRC_MASK); -+ cr_set_bits(host->fe_base + GDMA2_FWD_CFG, -+ BITS_GDM2_ALL_FRC_P_PPE); -+ -+ dev_info(host->dev, "hwnat start\n"); -+ -+ return 0; -+} -+ -+static int ppe_busy_wait(void) -+{ -+ unsigned long t_start = jiffies; -+ u32 r = 0; -+ -+ while (1) { -+ r = readl((host->ppe_base + 0x0)); -+ if (!(r & BIT(31))) -+ return 0; -+ if (time_after(jiffies, t_start + HZ)) -+ break; -+ usleep_range(10, 20); -+ } -+ -+ dev_err(host->dev, "ppe:%s timeout\n", __func__); -+ -+ return -1; -+} -+ -+static void hnat_stop(void) -+{ -+ u32 foe_table_sz; -+ struct foe_entry *entry, *end; -+ u32 r1 = 0, r2 = 0; -+ -+ /* discard all traffic while we disable the PPE */ -+ cr_clr_bits(host->fe_base + GDMA1_FWD_CFG, GDM1_ALL_FRC_MASK); -+ cr_set_bits(host->fe_base + GDMA1_FWD_CFG, -+ BITS_GDM1_ALL_FRC_P_DISCARD); -+ cr_clr_bits(host->fe_base + GDMA2_FWD_CFG, GDM2_ALL_FRC_MASK); -+ cr_set_bits(host->fe_base + GDMA2_FWD_CFG, -+ BITS_GDM2_ALL_FRC_P_DISCARD); -+ -+ if (ppe_busy_wait()) { -+ reset_control_reset(host->rstc); -+ msleep(2000); -+ return; -+ } -+ -+ entry = host->foe_table_cpu; -+ end = host->foe_table_cpu + FOE_4TB_SIZ; -+ while (entry < end) { -+ entry->bfib1.state = INVALID; -+ entry++; -+ } -+ -+ /* disable caching */ -+ cr_set_field(host->ppe_base + PPE_CAH_CTRL, CAH_X_MODE, 1); -+ cr_set_field(host->ppe_base + PPE_CAH_CTRL, CAH_X_MODE, 0); -+ cr_set_field(host->ppe_base + PPE_CAH_CTRL, CAH_EN, 0); -+ -+ /* flush cache has to be ahead of hnat diable --*/ -+ cr_set_field(host->ppe_base + PPE_GLO_CFG, PPE_EN, 0); -+ -+ /* disable FOE */ -+ cr_clr_bits(host->ppe_base + PPE_FLOW_CFG, -+ BIT_IPV4_NAPT_EN | BIT_IPV4_NAT_EN | -+ BIT_IPV4_NAT_FRAG_EN | -+ BIT_FUC_FOE | BIT_FMC_FOE | BIT_FUC_FOE); -+ -+ /* disable FOE aging */ -+ cr_set_field(host->ppe_base + PPE_TB_CFG, NTU_AGE, 0); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, UNBD_AGE, 0); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, TCP_AGE, 0); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, UDP_AGE, 0); -+ cr_set_field(host->ppe_base + PPE_TB_CFG, FIN_AGE, 0); -+ -+ r1 = readl(host->fe_base + 0x100); -+ r2 = readl(host->fe_base + 0x10c); -+ -+ dev_info(host->dev, "0x100 = 0x%x, 0x10c = 0x%x\n", r1, r2); -+ -+ if (((r1 & 0xff00) >> 0x8) >= (r1 & 0xff) || -+ ((r1 & 0xff00) >> 0x8) >= (r2 & 0xff)) { -+ dev_info(host->dev, "reset pse\n"); -+ writel(0x1, host->fe_base + 0x4); -+ } -+ -+ /* free the FOE table */ -+ foe_table_sz = FOE_4TB_SIZ * sizeof(struct foe_entry); -+ dma_free_coherent(NULL, foe_table_sz, host->foe_table_cpu, -+ host->foe_table_dev); -+ writel(0, host->ppe_base + PPE_TB_BASE); -+ -+ if (ppe_busy_wait()) { -+ reset_control_reset(host->rstc); -+ msleep(2000); -+ return; -+ } -+ -+ /* send all traffic back to the DMA engine */ -+ cr_clr_bits(host->fe_base + GDMA1_FWD_CFG, GDM1_ALL_FRC_MASK); -+ cr_set_bits(host->fe_base + GDMA1_FWD_CFG, -+ BITS_GDM1_ALL_FRC_P_CPU_PDMA); -+ cr_clr_bits(host->fe_base + GDMA2_FWD_CFG, GDM2_ALL_FRC_MASK); -+ cr_set_bits(host->fe_base + GDMA2_FWD_CFG, -+ BITS_GDM2_ALL_FRC_P_CPU_PDMA); -+} -+ -+static int hnat_probe(struct platform_device *pdev) -+{ -+ int err = 0; -+ struct resource *res ; -+ const char *name; -+ struct device_node *np; -+ -+ host = devm_kzalloc(&pdev->dev, sizeof(struct hnat_priv), GFP_KERNEL); -+ if (!host) -+ return -ENOMEM; -+ -+ host->dev = &pdev->dev; -+ np = host->dev->of_node; -+ -+ err = of_property_read_string(np, "mtketh-wan", &name); -+ if (err < 0) -+ return -EINVAL; -+ -+ strncpy(host->wan, (char *)name, IFNAMSIZ); -+ dev_info(&pdev->dev, "wan = %s\n", host->wan); -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!res) -+ return -ENOENT; -+ -+ host->fe_base = devm_ioremap_nocache(&pdev->dev, res->start, -+ res->end - res->start + 1); -+ if (!host->fe_base) -+ return -EADDRNOTAVAIL; -+ -+ host->ppe_base = host->fe_base + 0xe00; -+ err = hnat_init_debugfs(host); -+ if (err) -+ return err; -+ -+ host->rstc = devm_reset_control_get(&pdev->dev, NULL); -+ if (IS_ERR(host->rstc)) -+ return PTR_ERR(host->rstc); -+ -+ err = hnat_start(); -+ if (err) -+ goto err_out; -+ -+ err = hnat_register_nf_hooks(); -+ if (err) -+ goto err_out; -+ -+ return 0; -+ -+err_out: -+ hnat_stop(); -+ hnat_deinit_debugfs(host); -+ return err; -+} -+ -+static int hnat_remove(struct platform_device *pdev) -+{ -+ hnat_unregister_nf_hooks(); -+ hnat_stop(); -+ hnat_deinit_debugfs(host); -+ -+ return 0; -+} -+ -+const struct of_device_id of_hnat_match[] = { -+ { .compatible = "mediatek,mt7623-hnat" }, -+ {}, -+}; -+ -+static struct platform_driver hnat_driver = { -+ .probe = hnat_probe, -+ .remove = hnat_remove, -+ .driver = { -+ .name = "mediatek_soc_hnat", -+ .of_match_table = of_hnat_match, -+ }, -+}; -+ -+module_platform_driver(hnat_driver); -+ -+MODULE_LICENSE("GPL v2"); -+MODULE_AUTHOR("Sean Wang "); -+MODULE_AUTHOR("John Crispin "); -+MODULE_DESCRIPTION("Mediatek Hardware NAT"); ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h -@@ -0,0 +1,425 @@ -+/* This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; version 2 of the License -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Copyright (C) 2014-2016 Sean Wang -+ * Copyright (C) 2016-2017 John Crispin -+ */ -+ -+#include -+#include -+#include -+#include -+ -+/*--------------------------------------------------------------------------*/ -+/* Register Offset*/ -+/*--------------------------------------------------------------------------*/ -+#define PPE_GLO_CFG 0x00 -+#define PPE_FLOW_CFG 0x04 -+#define PPE_IP_PROT_CHK 0x08 -+#define PPE_IP_PROT_0 0x0C -+#define PPE_IP_PROT_1 0x10 -+#define PPE_IP_PROT_2 0x14 -+#define PPE_IP_PROT_3 0x18 -+#define PPE_TB_CFG 0x1C -+#define PPE_TB_BASE 0x20 -+#define PPE_TB_USED 0x24 -+#define PPE_BNDR 0x28 -+#define PPE_BIND_LMT_0 0x2C -+#define PPE_BIND_LMT_1 0x30 -+#define PPE_KA 0x34 -+#define PPE_UNB_AGE 0x38 -+#define PPE_BND_AGE_0 0x3C -+#define PPE_BND_AGE_1 0x40 -+#define PPE_HASH_SEED 0x44 -+#define PPE_DFT_CPORT 0x48 -+#define PPE_MCAST_PPSE 0x84 -+#define PPE_MCAST_L_0 0x88 -+#define PPE_MCAST_H_0 0x8C -+#define PPE_MCAST_L_1 0x90 -+#define PPE_MCAST_H_1 0x94 -+#define PPE_MCAST_L_2 0x98 -+#define PPE_MCAST_H_2 0x9C -+#define PPE_MCAST_L_3 0xA0 -+#define PPE_MCAST_H_3 0xA4 -+#define PPE_MCAST_L_4 0xA8 -+#define PPE_MCAST_H_4 0xAC -+#define PPE_MCAST_L_5 0xB0 -+#define PPE_MCAST_H_5 0xB4 -+#define PPE_MCAST_L_6 0xBC -+#define PPE_MCAST_H_6 0xC0 -+#define PPE_MCAST_L_7 0xC4 -+#define PPE_MCAST_H_7 0xC8 -+#define PPE_MCAST_L_8 0xCC -+#define PPE_MCAST_H_8 0xD0 -+#define PPE_MCAST_L_9 0xD4 -+#define PPE_MCAST_H_9 0xD8 -+#define PPE_MCAST_L_A 0xDC -+#define PPE_MCAST_H_A 0xE0 -+#define PPE_MCAST_L_B 0xE4 -+#define PPE_MCAST_H_B 0xE8 -+#define PPE_MCAST_L_C 0xEC -+#define PPE_MCAST_H_C 0xF0 -+#define PPE_MCAST_L_D 0xF4 -+#define PPE_MCAST_H_D 0xF8 -+#define PPE_MCAST_L_E 0xFC -+#define PPE_MCAST_H_E 0xE0 -+#define PPE_MCAST_L_F 0x100 -+#define PPE_MCAST_H_F 0x104 -+#define PPE_MTU_DRP 0x108 -+#define PPE_MTU_VLYR_0 0x10C -+#define PPE_MTU_VLYR_1 0x110 -+#define PPE_MTU_VLYR_2 0x114 -+#define PPE_VPM_TPID 0x118 -+#define PPE_CAH_CTRL 0x120 -+#define PPE_CAH_TAG_SRH 0x124 -+#define PPE_CAH_LINE_RW 0x128 -+#define PPE_CAH_WDATA 0x12C -+#define PPE_CAH_RDATA 0x130 -+ -+#define GDMA1_FWD_CFG 0x500 -+#define GDMA2_FWD_CFG 0x1500 -+/*--------------------------------------------------------------------------*/ -+/* Register Mask*/ -+/*--------------------------------------------------------------------------*/ -+/* PPE_TB_CFG mask */ -+#define TB_ETRY_NUM (0x7 << 0) /* RW */ -+#define TB_ENTRY_SIZE (0x1 << 3) /* RW */ -+#define SMA (0x3 << 4) /* RW */ -+#define NTU_AGE (0x1 << 7) /* RW */ -+#define UNBD_AGE (0x1 << 8) /* RW */ -+#define TCP_AGE (0x1 << 9) /* RW */ -+#define UDP_AGE (0x1 << 10) /* RW */ -+#define FIN_AGE (0x1 << 11) /* RW */ -+#define KA_CFG (0x3<< 12) -+#define HASH_MODE (0x3 << 14) /* RW */ -+#define XMODE (0x3 << 18) /* RW */ -+ -+/*PPE_CAH_CTRL mask*/ -+#define CAH_EN (0x1 << 0) /* RW */ -+#define CAH_X_MODE (0x1 << 9) /* RW */ -+ -+/*PPE_UNB_AGE mask*/ -+#define UNB_DLTA (0xff << 0) /* RW */ -+#define UNB_MNP (0xffff << 16) /* RW */ -+ -+/*PPE_BND_AGE_0 mask*/ -+#define UDP_DLTA (0xffff << 0) /* RW */ -+#define NTU_DLTA (0xffff << 16) /* RW */ -+ -+/*PPE_BND_AGE_1 mask*/ -+#define TCP_DLTA (0xffff << 0) /* RW */ -+#define FIN_DLTA (0xffff << 16) /* RW */ -+ -+/*PPE_KA mask*/ -+#define KA_T (0xffff << 0) /* RW */ -+#define TCP_KA (0xff << 16) /* RW */ -+#define UDP_KA (0xff << 24) /* RW */ -+ -+/*PPE_BIND_LMT_0 mask*/ -+#define QURT_LMT (0x3ff << 0) /* RW */ -+#define HALF_LMT (0x3ff << 16) /* RW */ -+ -+/*PPE_BIND_LMT_1 mask*/ -+#define FULL_LMT (0x3fff << 0) /* RW */ -+#define NTU_KA (0xff << 16) /* RW */ -+ -+/*PPE_BNDR mask*/ -+#define BIND_RATE (0xffff << 0) /* RW */ -+#define PBND_RD_PRD (0xffff << 16) /* RW */ -+ -+/*PPE_GLO_CFG mask*/ -+#define PPE_EN (0x1 << 0) /* RW */ -+#define TTL0_DRP (0x1 << 4) /* RW */ -+ -+/*GDMA1_FWD_CFG mask */ -+#define GDM1_UFRC_MASK (0x7 << 12) /* RW */ -+#define GDM1_BFRC_MASK (0x7 << 8) /*RW*/ -+#define GDM1_MFRC_MASK (0x7 << 4) /*RW*/ -+#define GDM1_OFRC_MASK (0x7 << 0) /*RW*/ -+#define GDM1_ALL_FRC_MASK (GDM1_UFRC_MASK | GDM1_BFRC_MASK | GDM1_MFRC_MASK | GDM1_OFRC_MASK) -+ -+#define GDM2_UFRC_MASK (0x7 << 12) /* RW */ -+#define GDM2_BFRC_MASK (0x7 << 8) /*RW*/ -+#define GDM2_MFRC_MASK (0x7 << 4) /*RW*/ -+#define GDM2_OFRC_MASK (0x7 << 0) /*RW*/ -+#define GDM2_ALL_FRC_MASK (GDM2_UFRC_MASK | GDM2_BFRC_MASK | GDM2_MFRC_MASK | GDM2_OFRC_MASK) -+ -+/*--------------------------------------------------------------------------*/ -+/* Descriptor Structure */ -+/*--------------------------------------------------------------------------*/ -+#define HNAT_SKB_CB(__skb) ((struct hnat_skb_cb *)&((__skb)->cb[40])) -+struct hnat_skb_cb { -+ __u16 iif; -+}; -+ -+struct hnat_unbind_info_blk { -+ u32 time_stamp:8; -+ u32 pcnt:16; /* packet count */ -+ u32 preb:1; -+ u32 pkt_type:3; -+ u32 state:2; -+ u32 udp:1; -+ u32 sta:1; /* static entry */ -+} __attribute__ ((packed)); -+ -+struct hnat_bind_info_blk { -+ u32 time_stamp:15; -+ u32 ka:1; /* keep alive */ -+ u32 vlan_layer:3; -+ u32 psn:1; /* egress packet has PPPoE session */ -+ u32 vpm:1; /* 0:ethertype remark, 1:0x8100(CR default) */ -+ u32 ps:1; /* packet sampling */ -+ u32 cah:1; /* cacheable flag */ -+ u32 rmt:1; /* remove tunnel ip header (6rd/dslite only) */ -+ u32 ttl:1; -+ u32 pkt_type:3; -+ u32 state:2; -+ u32 udp:1; -+ u32 sta:1; /* static entry */ -+} __attribute__ ((packed)); -+ -+struct hnat_info_blk2 { -+ u32 qid:4; /* QID in Qos Port */ -+ u32 fqos:1; /* force to PSE QoS port */ -+ u32 dp:3; /* force to PSE port x -+ 0:PSE,1:GSW, 2:GMAC,4:PPE,5:QDMA,7=DROP */ -+ u32 mcast:1; /* multicast this packet to CPU */ -+ u32 pcpl:1; /* OSBN */ -+ u32 mlen:1; /* 0:post 1:pre packet length in meter */ -+ u32 alen:1; /* 0:post 1:pre packet length in accounting */ -+ u32 port_mg:6; /* port meter group */ -+ u32 port_ag:6; /* port account group */ -+ u32 dscp:8; /* DSCP value */ -+} __attribute__ ((packed)); -+ -+struct hnat_ipv4_hnapt { -+ union { -+ struct hnat_bind_info_blk bfib1; -+ struct hnat_unbind_info_blk udib1; -+ u32 info_blk1; -+ }; -+ u32 sip; -+ u32 dip; -+ u16 dport; -+ u16 sport; -+ union { -+ struct hnat_info_blk2 iblk2; -+ u32 info_blk2; -+ }; -+ u32 new_sip; -+ u32 new_dip; -+ u16 new_dport; -+ u16 new_sport; -+ u32 resv1; -+ u32 resv2; -+ u32 resv3:26; -+ u32 act_dp:6; /* UDF */ -+ u16 vlan1; -+ u16 etype; -+ u32 dmac_hi; -+ u16 vlan2; -+ u16 dmac_lo; -+ u32 smac_hi; -+ u16 pppoe_id; -+ u16 smac_lo; -+} __attribute__ ((packed)); -+ -+struct foe_entry { -+ union { -+ struct hnat_unbind_info_blk udib1; -+ struct hnat_bind_info_blk bfib1; -+ struct hnat_ipv4_hnapt ipv4_hnapt; -+ }; -+}; -+ -+#define HNAT_AC_BYTE_LO(x) (0x2000 + (x * 16)) -+#define HNAT_AC_BYTE_HI(x) (0x2004 + (x * 16)) -+#define HNAT_AC_PACKET(x) (0x2008 + (x * 16)) -+#define HNAT_COUNTER_MAX 64 -+#define HNAT_AC_TIMER_INTERVAL (HZ) -+ -+struct hnat_accounting { -+ u64 bytes; -+ u64 packets; -+}; -+ -+struct hnat_priv { -+ struct device *dev; -+ void __iomem *fe_base; -+ void __iomem *ppe_base; -+ struct foe_entry *foe_table_cpu; -+ dma_addr_t foe_table_dev; -+ u8 enable; -+ u8 enable1; -+ struct dentry *root; -+ struct debugfs_regset32 *regset; -+ -+ struct timer_list ac_timer; -+ struct hnat_accounting acct[HNAT_COUNTER_MAX]; -+ -+ /*devices we plays for*/ -+ char wan[IFNAMSIZ]; -+ -+ struct reset_control *rstc; -+}; -+ -+enum FoeEntryState { -+ INVALID = 0, -+ UNBIND = 1, -+ BIND = 2, -+ FIN = 3 -+}; -+/*--------------------------------------------------------------------------*/ -+/* Common Definition*/ -+/*--------------------------------------------------------------------------*/ -+ -+#define FOE_4TB_SIZ 4096 -+#define HASH_SEED_KEY 0x12345678 -+ -+/*PPE_TB_CFG value*/ -+#define ENTRY_80B 1 -+#define ENTRY_64B 0 -+#define TABLE_1K 0 -+#define TABLE_2K 1 -+#define TABLE_4K 2 -+#define TABLE_8K 3 -+#define TABLE_16K 4 -+#define SMA_DROP 0 /* Drop the packet */ -+#define SMA_DROP2 1 /* Drop the packet */ -+#define SMA_ONLY_FWD_CPU 2 /* Only Forward to CPU */ -+#define SMA_FWD_CPU_BUILD_ENTRY 3 /* Forward to CPU and build new FOE entry */ -+#define HASH_MODE_0 0 -+#define HASH_MODE_1 1 -+#define HASH_MODE_2 2 -+#define HASH_MODE_3 3 -+ -+/*PPE_FLOW_CFG*/ -+#define BIT_FUC_FOE BIT(2) -+#define BIT_FMC_FOE BIT(1) -+#define BIT_FBC_FOE BIT(0) -+#define BIT_IPV4_NAT_EN BIT(12) -+#define BIT_IPV4_NAPT_EN BIT(13) -+#define BIT_IPV4_NAT_FRAG_EN BIT(17) -+#define BIT_IPV4_HASH_GREK BIT(19) -+ -+/*GDMA1_FWD_CFG value */ -+#define BITS_GDM1_UFRC_P_PPE (NR_PPE_PORT << 12) -+#define BITS_GDM1_BFRC_P_PPE (NR_PPE_PORT << 8) -+#define BITS_GDM1_MFRC_P_PPE (NR_PPE_PORT << 4) -+#define BITS_GDM1_OFRC_P_PPE (NR_PPE_PORT << 0) -+#define BITS_GDM1_ALL_FRC_P_PPE (BITS_GDM1_UFRC_P_PPE | BITS_GDM1_BFRC_P_PPE | BITS_GDM1_MFRC_P_PPE | BITS_GDM1_OFRC_P_PPE) -+ -+#define BITS_GDM1_UFRC_P_CPU_PDMA (NR_PDMA_PORT << 12) -+#define BITS_GDM1_BFRC_P_CPU_PDMA (NR_PDMA_PORT << 8) -+#define BITS_GDM1_MFRC_P_CPU_PDMA (NR_PDMA_PORT << 4) -+#define BITS_GDM1_OFRC_P_CPU_PDMA (NR_PDMA_PORT << 0) -+#define BITS_GDM1_ALL_FRC_P_CPU_PDMA (BITS_GDM1_UFRC_P_CPU_PDMA | BITS_GDM1_BFRC_P_CPU_PDMA | BITS_GDM1_MFRC_P_CPU_PDMA | BITS_GDM1_OFRC_P_CPU_PDMA) -+ -+#define BITS_GDM1_UFRC_P_CPU_QDMA (NR_QDMA_PORT << 12) -+#define BITS_GDM1_BFRC_P_CPU_QDMA (NR_QDMA_PORT << 8) -+#define BITS_GDM1_MFRC_P_CPU_QDMA (NR_QDMA_PORT << 4) -+#define BITS_GDM1_OFRC_P_CPU_QDMA (NR_QDMA_PORT << 0) -+#define BITS_GDM1_ALL_FRC_P_CPU_QDMA (BITS_GDM1_UFRC_P_CPU_QDMA | BITS_GDM1_BFRC_P_CPU_QDMA | BITS_GDM1_MFRC_P_CPU_QDMA | BITS_GDM1_OFRC_P_CPU_QDMA) -+ -+#define BITS_GDM1_UFRC_P_DISCARD (NR_DISCARD << 12) -+#define BITS_GDM1_BFRC_P_DISCARD (NR_DISCARD << 8) -+#define BITS_GDM1_MFRC_P_DISCARD (NR_DISCARD << 4) -+#define BITS_GDM1_OFRC_P_DISCARD (NR_DISCARD << 0) -+#define BITS_GDM1_ALL_FRC_P_DISCARD (BITS_GDM1_UFRC_P_DISCARD | BITS_GDM1_BFRC_P_DISCARD | BITS_GDM1_MFRC_P_DISCARD | BITS_GDM1_OFRC_P_DISCARD) -+ -+#define BITS_GDM2_UFRC_P_PPE (NR_PPE_PORT << 12) -+#define BITS_GDM2_BFRC_P_PPE (NR_PPE_PORT << 8) -+#define BITS_GDM2_MFRC_P_PPE (NR_PPE_PORT << 4) -+#define BITS_GDM2_OFRC_P_PPE (NR_PPE_PORT << 0) -+#define BITS_GDM2_ALL_FRC_P_PPE (BITS_GDM2_UFRC_P_PPE | BITS_GDM2_BFRC_P_PPE | BITS_GDM2_MFRC_P_PPE | BITS_GDM2_OFRC_P_PPE) -+ -+#define BITS_GDM2_UFRC_P_CPU_PDMA (NR_PDMA_PORT << 12) -+#define BITS_GDM2_BFRC_P_CPU_PDMA (NR_PDMA_PORT << 8) -+#define BITS_GDM2_MFRC_P_CPU_PDMA (NR_PDMA_PORT << 4) -+#define BITS_GDM2_OFRC_P_CPU_PDMA (NR_PDMA_PORT << 0) -+#define BITS_GDM2_ALL_FRC_P_CPU_PDMA (BITS_GDM2_UFRC_P_CPU_PDMA | BITS_GDM2_BFRC_P_CPU_PDMA | BITS_GDM2_MFRC_P_CPU_PDMA | BITS_GDM2_OFRC_P_CPU_PDMA) -+ -+#define BITS_GDM2_UFRC_P_CPU_QDMA (NR_QDMA_PORT << 12) -+#define BITS_GDM2_BFRC_P_CPU_QDMA (NR_QDMA_PORT << 8) -+#define BITS_GDM2_MFRC_P_CPU_QDMA (NR_QDMA_PORT << 4) -+#define BITS_GDM2_OFRC_P_CPU_QDMA (NR_QDMA_PORT << 0) -+#define BITS_GDM2_ALL_FRC_P_CPU_QDMA (BITS_GDM2_UFRC_P_CPU_QDMA | BITS_GDM2_BFRC_P_CPU_QDMA | BITS_GDM2_MFRC_P_CPU_QDMA | BITS_GDM2_OFRC_P_CPU_QDMA) -+ -+#define BITS_GDM2_UFRC_P_DISCARD (NR_DISCARD << 12) -+#define BITS_GDM2_BFRC_P_DISCARD (NR_DISCARD << 8) -+#define BITS_GDM2_MFRC_P_DISCARD (NR_DISCARD << 4) -+#define BITS_GDM2_OFRC_P_DISCARD (NR_DISCARD << 0) -+#define BITS_GDM2_ALL_FRC_P_DISCARD (BITS_GDM2_UFRC_P_DISCARD | BITS_GDM2_BFRC_P_DISCARD | BITS_GDM2_MFRC_P_DISCARD | BITS_GDM2_OFRC_P_DISCARD) -+ -+#define hnat_is_enabled(host) (host->enable) -+#define hnat_enabled(host) (host->enable = 1) -+#define hnat_disabled(host) (host->enable = 0) -+#define hnat_is_enabled1(host) (host->enable1) -+#define hnat_enabled1(host) (host->enable1 = 1) -+#define hnat_disabled1(host) (host->enable1 = 0) -+ -+#define entry_hnat_is_bound(e) (e->bfib1.state == BIND) -+#define entry_hnat_state(e) (e->bfib1.state) -+ -+#define skb_hnat_is_hashed(skb) (skb_hnat_entry(skb)!=0x3fff && skb_hnat_entry(skb)< FOE_4TB_SIZ) -+#define FROM_GE_LAN(skb) (HNAT_SKB_CB(skb)->iif == FOE_MAGIC_GE_LAN) -+#define FROM_GE_WAN(skb) (HNAT_SKB_CB(skb)->iif == FOE_MAGIC_GE_WAN) -+#define FROM_GE_PPD(skb) (HNAT_SKB_CB(skb)->iif == FOE_MAGIC_GE_PPD) -+#define FOE_MAGIC_GE_WAN 0x7273 -+#define FOE_MAGIC_GE_LAN 0x7272 -+#define FOE_INVALID 0xffff -+ -+#define TCP_FIN_SYN_RST 0x0C /* Ingress packet is TCP fin/syn/rst (for IPv4 NAPT/DS-Lite or IPv6 5T-route/6RD) */ -+#define UN_HIT 0x0D/* FOE Un-hit */ -+#define HIT_UNBIND 0x0E/* FOE Hit unbind */ -+#define HIT_UNBIND_RATE_REACH 0xf -+#define HNAT_HIT_BIND_OLD_DUP_HDR 0x15 -+#define HNAT_HIT_BIND_FORCE_TO_CPU 0x16 -+ -+#define HIT_BIND_KEEPALIVE_MC_NEW_HDR 0x14 -+#define HIT_BIND_KEEPALIVE_DUP_OLD_HDR 0x15 -+#define IPV4_HNAPT 0 -+#define IPV4_HNAT 1 -+#define IP_FORMAT(addr) \ -+ ((unsigned char *)&addr)[3], \ -+ ((unsigned char *)&addr)[2], \ -+ ((unsigned char *)&addr)[1], \ -+ ((unsigned char *)&addr)[0] -+ -+/*PSE Ports*/ -+#define NR_PDMA_PORT 0 -+#define NR_GMAC1_PORT 1 -+#define NR_GMAC2_PORT 2 -+#define NR_PPE_PORT 4 -+#define NR_QDMA_PORT 5 -+#define NR_DISCARD 7 -+#define IS_LAN(dev) (!strncmp(dev->name, "lan", 3)) -+#define IS_WAN(dev) (!strcmp(dev->name, host->wan)) -+#define IS_BR(dev) (!strncmp(dev->name, "br", 2)) -+#define IS_IPV4_HNAPT(x) (((x)->bfib1.pkt_type == IPV4_HNAPT) ? 1: 0) -+#define IS_IPV4_HNAT(x) (((x)->bfib1.pkt_type == IPV4_HNAT) ? 1 : 0) -+#define IS_IPV4_GRP(x) (IS_IPV4_HNAPT(x) | IS_IPV4_HNAT(x)) -+ -+#define es(entry) (entry_state[entry->bfib1.state]) -+#define ei(entry, end) (FOE_4TB_SIZ - (int)(end - entry)) -+#define pt(entry) (packet_type[entry->ipv4_hnapt.bfib1.pkt_type]) -+#define ipv4_smac(mac,e) ({mac[0]=e->ipv4_hnapt.smac_hi[3]; mac[1]=e->ipv4_hnapt.smac_hi[2];\ -+ mac[2]=e->ipv4_hnapt.smac_hi[1]; mac[3]=e->ipv4_hnapt.smac_hi[0];\ -+ mac[4]=e->ipv4_hnapt.smac_lo[1]; mac[5]=e->ipv4_hnapt.smac_lo[0];}) -+#define ipv4_dmac(mac,e) ({mac[0]=e->ipv4_hnapt.dmac_hi[3]; mac[1]=e->ipv4_hnapt.dmac_hi[2];\ -+ mac[2]=e->ipv4_hnapt.dmac_hi[1]; mac[3]=e->ipv4_hnapt.dmac_hi[0];\ -+ mac[4]=e->ipv4_hnapt.dmac_lo[1]; mac[5]=e->ipv4_hnapt.dmac_lo[0];}) -+ -+extern struct hnat_priv *host; -+ -+extern void hnat_deinit_debugfs(struct hnat_priv *h); -+extern int __init hnat_init_debugfs(struct hnat_priv *h); -+extern int hnat_register_nf_hooks(void); -+extern void hnat_unregister_nf_hooks(void); -+ ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_hnat/hnat_debugfs.c -@@ -0,0 +1,489 @@ -+/* This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; version 2 of the License -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Copyright (C) 2014-2016 Sean Wang -+ * Copyright (C) 2016-2017 John Crispin -+ */ -+ -+#include -+#include -+#include -+ -+#include "hnat.h" -+ -+static const char *entry_state[] = { -+ "INVALID", -+ "UNBIND", -+ "BIND", -+ "FIN" -+}; -+ -+static const char *packet_type[] = { -+ "IPV4_HNAPT", -+ "IPV4_HNAT", -+ "IPV6_1T_ROUTE", -+ "IPV4_DSLITE", -+ "IPV6_3T_ROUTE", -+ "IPV6_5T_ROUTE", -+ "IPV6_6RD", -+}; -+ -+static int hnat_debug_show(struct seq_file *m, void *private) -+{ -+ struct hnat_priv *h = host; -+ struct foe_entry *entry, *end; -+ -+ entry = h->foe_table_cpu; -+ end = h->foe_table_cpu + FOE_4TB_SIZ; -+ while (entry < end) { -+ if (!entry->bfib1.state) { -+ entry++; -+ continue; -+ } -+ -+ if (IS_IPV4_HNAPT(entry)) { -+ __be32 saddr = htonl(entry->ipv4_hnapt.sip); -+ __be32 daddr = htonl(entry->ipv4_hnapt.dip); -+ __be32 nsaddr = htonl(entry->ipv4_hnapt.new_sip); -+ __be32 ndaddr = htonl(entry->ipv4_hnapt.new_dip); -+ unsigned char h_dest[ETH_ALEN]; -+ unsigned char h_source[ETH_ALEN]; -+ -+ *((u32*) h_source) = swab32(entry->ipv4_hnapt.smac_hi); -+ *((u16*) &h_source[4]) = swab16(entry->ipv4_hnapt.smac_lo); -+ *((u32*) h_dest) = swab32(entry->ipv4_hnapt.dmac_hi); -+ *((u16*) &h_dest[4]) = swab16(entry->ipv4_hnapt.dmac_lo); -+ seq_printf(m, -+ "(%p)0x%05x|state=%s|type=%s|%pI4:%d->%pI4:%d=>%pI4:%d->%pI4:%d|%pM=>%pM|etype=0x%04x|info1=0x%x|info2=0x%x|vlan1=%d|vlan2=%d\n", -+ (void *)h->foe_table_dev + ((void *)(entry) - (void *)h->foe_table_cpu), -+ ei(entry, end), es(entry), pt(entry), -+ &saddr, entry->ipv4_hnapt.sport, -+ &daddr, entry->ipv4_hnapt.dport, -+ &nsaddr, entry->ipv4_hnapt.new_sport, -+ &ndaddr, entry->ipv4_hnapt.new_dport, h_source, -+ h_dest, ntohs(entry->ipv4_hnapt.etype), -+ entry->ipv4_hnapt.info_blk1, -+ entry->ipv4_hnapt.info_blk2, -+ entry->ipv4_hnapt.vlan1, -+ entry->ipv4_hnapt.vlan2); -+ } else -+ seq_printf(m, "0x%05x state=%s\n", -+ ei(entry, end), es(entry)); -+ entry++; -+ } -+ -+ return 0; -+} -+ -+static int hnat_debug_open(struct inode *inode, struct file *file) -+{ -+ return single_open(file, hnat_debug_show, file->private_data); -+} -+ -+static const struct file_operations hnat_debug_fops = { -+ .open = hnat_debug_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ -+#define QDMA_TX_SCH_TX 0x1a14 -+ -+static ssize_t hnat_sched_show(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ int id = (int) file->private_data; -+ struct hnat_priv *h = host; -+ u32 reg = readl(h->fe_base + QDMA_TX_SCH_TX); -+ int enable; -+ int max_rate; -+ char *buf; -+ unsigned int len = 0, buf_len = 1500; -+ ssize_t ret_cnt; -+ -+ buf = kzalloc(buf_len, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ -+ if (id) -+ reg >>= 16; -+ reg &= 0xffff; -+ enable = !! (reg & BIT(11)); -+ max_rate = ((reg >> 4) & 0x7f); -+ reg &= 0xf; -+ while (reg--) -+ max_rate *= 10; -+ -+ len += scnprintf(buf + len, buf_len - len, -+ "EN\tMAX\n%d\t%d\n", enable, max_rate); -+ -+ if (len > buf_len) -+ len = buf_len; -+ -+ ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len); -+ -+ kfree(buf); -+ return ret_cnt; -+} -+ -+static ssize_t hnat_sched_write(struct file *file, -+ const char __user *buf, size_t length, loff_t *offset) -+{ -+ int id = (int) file->private_data; -+ struct hnat_priv *h = host; -+ char line[64]; -+ int enable, rate, exp = 0, shift = 0; -+ size_t size; -+ u32 reg = readl(h->fe_base + QDMA_TX_SCH_TX); -+ u32 val = 0; -+ -+ if (length > sizeof(line)) -+ return -EINVAL; -+ -+ if (copy_from_user(line, buf, length)) -+ return -EFAULT; -+ -+ sscanf(line, "%d %d", &enable, &rate); -+ -+ while (rate > 127) { -+ rate /= 10; -+ exp++; -+ } -+ -+ if (enable) -+ val |= BIT(11); -+ val |= (rate & 0x7f) << 4; -+ val |= exp & 0xf; -+ if (id) -+ shift = 16; -+ reg &= ~(0xffff << shift); -+ reg |= val << shift; -+ writel(reg, h->fe_base + QDMA_TX_SCH_TX); -+ -+ size = strlen(line); -+ *offset += size; -+ -+ return length; -+} -+ -+static const struct file_operations hnat_sched_fops = { -+ .open = simple_open, -+ .read = hnat_sched_show, -+ .write = hnat_sched_write, -+ .llseek = default_llseek, -+}; -+ -+#define QTX_CFG(x) (0x1800 + (x * 0x10)) -+#define QTX_SCH(x) (0x1804 + (x * 0x10)) -+ -+static ssize_t hnat_queue_show(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ struct hnat_priv *h = host; -+ int id = (int) file->private_data; -+ u32 reg = readl(h->fe_base + QTX_SCH(id)); -+ u32 cfg = readl(h->fe_base + QTX_CFG(id)); -+ int scheduler = !!(reg & BIT(31)); -+ int min_rate_en = !!(reg & BIT(27)); -+ int min_rate = (reg >> 20) & 0x7f; -+ int min_rate_exp = (reg >> 16) & 0xf; -+ int max_rate_en = !!(reg & BIT(11)); -+ int max_weight = (reg >> 12) & 0xf; -+ int max_rate = (reg >> 4) & 0x7f; -+ int max_rate_exp = reg & 0xf; -+ char *buf; -+ unsigned int len = 0, buf_len = 1500; -+ ssize_t ret_cnt; -+ -+ buf = kzalloc(buf_len, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ while (min_rate_exp--) -+ min_rate *= 10; -+ -+ while (max_rate_exp--) -+ max_rate *= 10; -+ -+ len += scnprintf(buf + len, buf_len - len, -+ "scheduler: %d\nhw resv: %d\nsw resv: %d\n", -+ scheduler, (cfg >> 8) & 0xff, cfg & 0xff); -+ len += scnprintf(buf + len, buf_len - len, -+ "\tEN\tRATE\t\tWEIGHT\n"); -+ len += scnprintf(buf + len, buf_len - len, -+ "max\t%d\t%8d\t%d\n", max_rate_en, max_rate, max_weight); -+ len += scnprintf(buf + len, buf_len - len, -+ "min\t%d\t%8d\t-\n", min_rate_en, min_rate); -+ -+ if (len > buf_len) -+ len = buf_len; -+ -+ ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len); -+ -+ kfree(buf); -+ return ret_cnt; -+} -+ -+static ssize_t hnat_queue_write(struct file *file, -+ const char __user *buf, size_t length, loff_t *offset) -+{ -+ int id = (int) file->private_data; -+ struct hnat_priv *h = host; -+ char line[64]; -+ int max_enable, max_rate, max_exp = 0; -+ int min_enable, min_rate, min_exp = 0; -+ int weight; -+ int resv; -+ int scheduler; -+ size_t size; -+ u32 reg = readl(h->fe_base + QTX_SCH(id)); -+ -+ if (length > sizeof(line)) -+ return -EINVAL; -+ -+ if (copy_from_user(line, buf, length)) -+ return -EFAULT; -+ -+ sscanf(line, "%d %d %d %d %d %d %d", &scheduler, &min_enable, &min_rate, &max_enable, &max_rate, &weight, &resv); -+ -+ while (max_rate > 127) { -+ max_rate /= 10; -+ max_exp++; -+ } -+ -+ while (min_rate > 127) { -+ min_rate /= 10; -+ min_exp++; -+ } -+ -+ reg &= 0x70000000; -+ if (scheduler) -+ reg |= BIT(31); -+ if (min_enable) -+ reg |= BIT(27); -+ reg |= (min_rate & 0x7f) << 20; -+ reg |= (min_exp & 0xf) << 16; -+ if (max_enable) -+ reg |= BIT(11); -+ reg |= (weight & 0xf) << 12; -+ reg |= (max_rate & 0x7f) << 4; -+ reg |= max_exp & 0xf; -+ writel(reg, h->fe_base + QTX_SCH(id)); -+ -+ resv &= 0xff; -+ reg = readl(h->fe_base + QTX_CFG(id)); -+ reg &= 0xffff0000; -+ reg |= (resv << 8) | resv; -+ writel(reg, h->fe_base + QTX_CFG(id)); -+ -+ size = strlen(line); -+ *offset += size; -+ -+ return length; -+} -+ -+static const struct file_operations hnat_queue_fops = { -+ .open = simple_open, -+ .read = hnat_queue_show, -+ .write = hnat_queue_write, -+ .llseek = default_llseek, -+}; -+ -+static void hnat_ac_timer_handle(unsigned long priv) -+{ -+ struct hnat_priv *h = (struct hnat_priv*) priv; -+ int i; -+ -+ for (i = 0; i < HNAT_COUNTER_MAX; i++) { -+ u32 b_hi, b_lo; -+ u64 b; -+ -+ b_lo = readl(h->fe_base + HNAT_AC_BYTE_LO(i)); -+ b_hi = readl(h->fe_base + HNAT_AC_BYTE_HI(i)); -+ b = b_hi; -+ b <<= 32; -+ b += b_lo; -+ h->acct[i].bytes += b; -+ h->acct[i].packets += readl(h->fe_base + HNAT_AC_PACKET(i)); -+ } -+ -+ mod_timer(&h->ac_timer, jiffies + HNAT_AC_TIMER_INTERVAL); -+} -+ -+static ssize_t hnat_counter_show(struct file *file, char __user *user_buf, -+ size_t count, loff_t *ppos) -+{ -+ struct hnat_priv *h = host; -+ int id = (int) file->private_data; -+ char *buf; -+ unsigned int len = 0, buf_len = 1500; -+ ssize_t ret_cnt; -+ int id2 = id + (HNAT_COUNTER_MAX / 2); -+ -+ buf = kzalloc(buf_len, GFP_KERNEL); -+ if (!buf) -+ return -ENOMEM; -+ -+ len += scnprintf(buf + len, buf_len - len, -+ "tx pkts : %llu\ntx bytes: %llu\nrx pktks : %llu\nrx bytes : %llu\n", -+ h->acct[id].packets, h->acct[id].bytes, -+ h->acct[id2].packets, h->acct[id2].bytes); -+ -+ if (len > buf_len) -+ len = buf_len; -+ -+ ret_cnt = simple_read_from_buffer(user_buf, count, ppos, buf, len); -+ -+ kfree(buf); -+ return ret_cnt; -+} -+ -+static const struct file_operations hnat_counter_fops = { -+ .open = simple_open, -+ .read = hnat_counter_show, -+ .llseek = default_llseek, -+}; -+ -+#define dump_register(nm) \ -+{ \ -+ .name = __stringify(nm), \ -+ .offset = PPE_ ##nm , \ -+} -+ -+static const struct debugfs_reg32 hnat_regs[] = { -+ dump_register(GLO_CFG), -+ dump_register(FLOW_CFG), -+ dump_register(IP_PROT_CHK), -+ dump_register(IP_PROT_0), -+ dump_register(IP_PROT_1), -+ dump_register(IP_PROT_2), -+ dump_register(IP_PROT_3), -+ dump_register(TB_CFG), -+ dump_register(TB_BASE), -+ dump_register(TB_USED), -+ dump_register(BNDR), -+ dump_register(BIND_LMT_0), -+ dump_register(BIND_LMT_1), -+ dump_register(KA), -+ dump_register(UNB_AGE), -+ dump_register(BND_AGE_0), -+ dump_register(BND_AGE_1), -+ dump_register(HASH_SEED), -+ dump_register(DFT_CPORT), -+ dump_register(MCAST_PPSE), -+ dump_register(MCAST_L_0), -+ dump_register(MCAST_H_0), -+ dump_register(MCAST_L_1), -+ dump_register(MCAST_H_1), -+ dump_register(MCAST_L_2), -+ dump_register(MCAST_H_2), -+ dump_register(MCAST_L_3), -+ dump_register(MCAST_H_3), -+ dump_register(MCAST_L_4), -+ dump_register(MCAST_H_4), -+ dump_register(MCAST_L_5), -+ dump_register(MCAST_H_5), -+ dump_register(MCAST_L_6), -+ dump_register(MCAST_H_6), -+ dump_register(MCAST_L_7), -+ dump_register(MCAST_H_7), -+ dump_register(MCAST_L_8), -+ dump_register(MCAST_H_8), -+ dump_register(MCAST_L_9), -+ dump_register(MCAST_H_9), -+ dump_register(MCAST_L_A), -+ dump_register(MCAST_H_A), -+ dump_register(MCAST_L_B), -+ dump_register(MCAST_H_B), -+ dump_register(MCAST_L_C), -+ dump_register(MCAST_H_C), -+ dump_register(MCAST_L_D), -+ dump_register(MCAST_H_D), -+ dump_register(MCAST_L_E), -+ dump_register(MCAST_H_E), -+ dump_register(MCAST_L_F), -+ dump_register(MCAST_H_F), -+ dump_register(MTU_DRP), -+ dump_register(MTU_VLYR_0), -+ dump_register(MTU_VLYR_1), -+ dump_register(MTU_VLYR_2), -+ dump_register(VPM_TPID), -+ dump_register(VPM_TPID), -+ dump_register(CAH_CTRL), -+ dump_register(CAH_TAG_SRH), -+ dump_register(CAH_LINE_RW), -+ dump_register(CAH_WDATA), -+ dump_register(CAH_RDATA), -+}; -+ -+int __init hnat_init_debugfs(struct hnat_priv *h) -+{ -+ int ret = 0; -+ struct dentry *root; -+ struct dentry *file; -+ int i; -+ char name[16]; -+ -+ root = debugfs_create_dir("hnat", NULL); -+ if (!root) { -+ dev_err(h->dev, "%s:err at %d\n", __func__, __LINE__); -+ ret = -ENOMEM; -+ goto err0; -+ } -+ h->root = root; -+ h->regset = kzalloc(sizeof(*h->regset), GFP_KERNEL); -+ if (!h->regset) { -+ dev_err(h->dev, "%s:err at %d\n", __func__, __LINE__); -+ ret = -ENOMEM; -+ goto err1; -+ } -+ h->regset->regs = hnat_regs; -+ h->regset->nregs = ARRAY_SIZE(hnat_regs); -+ h->regset->base = h->ppe_base; -+ -+ file = debugfs_create_regset32("regdump", S_IRUGO, root, h->regset); -+ if (!file) { -+ dev_err(h->dev, "%s:err at %d\n", __func__, __LINE__); -+ ret = -ENOMEM; -+ goto err1; -+ } -+ debugfs_create_file("all_entry", S_IRUGO, root, h, &hnat_debug_fops); -+ for (i = 0; i < HNAT_COUNTER_MAX / 2; i++) { -+ snprintf(name, sizeof(name), "counter%d", i); -+ debugfs_create_file(name, S_IRUGO, root, (void *)i, &hnat_counter_fops); -+ } -+ -+ for (i = 0; i < 2; i++) { -+ snprintf(name, sizeof(name), "scheduler%d", i); -+ debugfs_create_file(name, S_IRUGO, root, (void *)i, &hnat_sched_fops); -+ } -+ -+ for (i = 0; i < 16; i++) { -+ snprintf(name, sizeof(name), "queue%d", i); -+ debugfs_create_file(name, S_IRUGO, root, (void *)i, &hnat_queue_fops); -+ } -+ -+ setup_timer(&h->ac_timer, hnat_ac_timer_handle, (unsigned long) h); -+ mod_timer(&h->ac_timer, jiffies + HNAT_AC_TIMER_INTERVAL); -+ -+ return 0; -+ -+ err1: -+ debugfs_remove_recursive(root); -+ err0: -+ return ret; -+} -+ -+void hnat_deinit_debugfs(struct hnat_priv *h) -+{ -+ del_timer(&h->ac_timer); -+ debugfs_remove_recursive(h->root); -+ h->root = NULL; -+} ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c -@@ -0,0 +1,289 @@ -+/* This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; version 2 of the License -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Copyright (C) 2014-2016 Sean Wang -+ * Copyright (C) 2016-2017 John Crispin -+ */ -+ -+#include -+ -+#include -+#include -+#include -+ -+#include "nf_hnat_mtk.h" -+#include "hnat.h" -+ -+#include "../mtk_eth_soc.h" -+ -+static unsigned int skb_to_hnat_info(struct sk_buff *skb, -+ const struct net_device *dev, -+ struct foe_entry *foe) -+{ -+ struct foe_entry entry = { 0 }; -+ int lan = IS_LAN(dev); -+ struct ethhdr *eth; -+ struct iphdr *iph; -+ struct tcphdr *tcph; -+ struct udphdr *udph; -+ int tcp = 0; -+ int ipv4 = 0; -+ u32 gmac; -+ -+ eth = eth_hdr(skb); -+ switch (ntohs(eth->h_proto)) { -+ case ETH_P_IP: -+ ipv4 = 1; -+ break; -+ -+ default: -+ return -1; -+ } -+ -+ iph = ip_hdr(skb); -+ switch (iph->protocol) { -+ case IPPROTO_TCP: -+ tcph = tcp_hdr(skb); -+ tcp = 1; -+ break; -+ -+ case IPPROTO_UDP: -+ udph = udp_hdr(skb); -+ break; -+ -+ default: -+ return -1; -+ } -+ -+ entry.ipv4_hnapt.etype = htons(ETH_P_IP); -+ -+ if (lan) { -+ entry.ipv4_hnapt.etype = htons(ETH_P_8021Q); -+ entry.bfib1.vlan_layer = 1; -+ entry.ipv4_hnapt.vlan1 = BIT(dev->name[3] - '0'); -+ } -+ -+ if (dev->priv_flags & IFF_802_1Q_VLAN) { -+ struct vlan_dev_priv *vlan = vlan_dev_priv(dev); -+ -+ entry.ipv4_hnapt.etype = htons(ETH_P_8021Q); -+ entry.bfib1.vlan_layer = 1; -+ if (lan) -+ entry.ipv4_hnapt.vlan2 = vlan->vlan_id; -+ else -+ entry.ipv4_hnapt.vlan1 = vlan->vlan_id; -+ } -+ -+ entry.ipv4_hnapt.dmac_hi = swab32(*((u32*) eth->h_dest)); -+ entry.ipv4_hnapt.dmac_lo = swab16(*((u16*) ð->h_dest[4])); -+ entry.ipv4_hnapt.smac_hi = swab32(*((u32*) eth->h_source)); -+ entry.ipv4_hnapt.smac_lo = swab16(*((u16*) ð->h_source[4])); -+ entry.ipv4_hnapt.pppoe_id = 0; -+ entry.bfib1.psn = 0; -+ entry.ipv4_hnapt.bfib1.vpm = 1; -+ -+ if (ipv4) -+ entry.ipv4_hnapt.bfib1.pkt_type = IPV4_HNAPT; -+ -+ entry.ipv4_hnapt.new_sip = ntohl(iph->saddr); -+ entry.ipv4_hnapt.new_dip = ntohl(iph->daddr); -+ entry.ipv4_hnapt.iblk2.dscp = iph->tos; -+#if defined(CONFIG_NET_MEDIATEK_HW_QOS) -+ entry.ipv4_hnapt.iblk2.qid = skb->mark & 0x7; -+ if (lan) -+ entry.ipv4_hnapt.iblk2.qid += 8; -+ entry.ipv4_hnapt.iblk2.fqos = 1; -+#endif -+ if (tcp) { -+ entry.ipv4_hnapt.new_sport = ntohs(tcph->source); -+ entry.ipv4_hnapt.new_dport = ntohs(tcph->dest); -+ entry.ipv4_hnapt.bfib1.udp = 0; -+ } else { -+ entry.ipv4_hnapt.new_sport = ntohs(udph->source); -+ entry.ipv4_hnapt.new_dport = ntohs(udph->dest); -+ entry.ipv4_hnapt.bfib1.udp = 1; -+ } -+ -+ if (IS_LAN(dev)) -+ gmac = NR_GMAC1_PORT; -+ else if (IS_WAN(dev)) -+ gmac = NR_GMAC2_PORT; -+ -+ if (is_multicast_ether_addr(ð->h_dest[0])) -+ entry.ipv4_hnapt.iblk2.mcast = 1; -+ else -+ entry.ipv4_hnapt.iblk2.mcast = 0; -+ -+ entry.ipv4_hnapt.iblk2.dp = gmac; -+ entry.ipv4_hnapt.iblk2.port_mg = 0x3f; -+ entry.ipv4_hnapt.iblk2.port_ag = (skb->mark >> 3) & 0x1f; -+ if (IS_LAN(dev)) -+ entry.ipv4_hnapt.iblk2.port_ag += 32; -+ entry.bfib1.time_stamp = readl((host->fe_base + 0x0010)) & (0xFFFF); -+ entry.ipv4_hnapt.bfib1.ttl = 1; -+ entry.ipv4_hnapt.bfib1.cah = 1; -+ entry.ipv4_hnapt.bfib1.ka = 1; -+ entry.bfib1.state = BIND; -+ -+ entry.ipv4_hnapt.sip = foe->ipv4_hnapt.sip; -+ entry.ipv4_hnapt.dip = foe->ipv4_hnapt.dip; -+ entry.ipv4_hnapt.sport = foe->ipv4_hnapt.sport; -+ entry.ipv4_hnapt.dport = foe->ipv4_hnapt.dport; -+ -+ memcpy(foe, &entry, sizeof(entry)); -+ -+ return 0; -+} -+ -+static unsigned int mtk_hnat_nf_post_routing(struct sk_buff *skb, -+ const struct net_device *out, -+ unsigned int (*fn)(struct sk_buff *, const struct net_device *), -+ const char *func) -+{ -+ struct foe_entry *entry; -+ struct nf_conn *ct; -+ enum ip_conntrack_info ctinfo; -+ const struct nf_conn_help *help; -+ -+ if ((skb->mark & 0x7) < 4) -+ return 0; -+ -+ ct = nf_ct_get(skb, &ctinfo); -+ if (!ct) -+ return 0; -+ -+ /* rcu_read_lock()ed by nf_hook_slow */ -+ help = nfct_help(ct); -+ if (help && rcu_dereference(help->helper)) -+ return 0; -+ -+ if ((FROM_GE_WAN(skb) || FROM_GE_LAN(skb)) && -+ skb_hnat_is_hashed(skb) && -+ (skb_hnat_reason(skb) == HIT_BIND_KEEPALIVE_DUP_OLD_HDR)) -+ return -1; -+ -+ if ((IS_LAN(out) && FROM_GE_WAN(skb)) || -+ (IS_WAN(out) && FROM_GE_LAN(skb))) { -+ if (!skb_hnat_is_hashed(skb)) -+ return 0; -+ -+ entry = &host->foe_table_cpu[skb_hnat_entry(skb)]; -+ if (entry_hnat_is_bound(entry)) -+ return 0; -+ -+ if (skb_hnat_reason(skb) == HIT_UNBIND_RATE_REACH && -+ skb_hnat_alg(skb) == 0) { -+ if (fn && fn(skb, out)) -+ return 0; -+ skb_to_hnat_info(skb, out, entry); -+ } -+ } -+ -+ return 0; -+} -+ -+static unsigned int mtk_hnat_nf_pre_routing(void *priv, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ if (IS_WAN(state->in)) -+ HNAT_SKB_CB(skb)->iif = FOE_MAGIC_GE_WAN; -+ else if (IS_LAN(state->in)) -+ HNAT_SKB_CB(skb)->iif = FOE_MAGIC_GE_LAN; -+ else if (!IS_BR(state->in)) -+ HNAT_SKB_CB(skb)->iif = FOE_INVALID; -+ -+ return NF_ACCEPT; -+} -+ -+static unsigned int hnat_get_nexthop(struct sk_buff *skb, const struct net_device *out) { -+ -+ u32 nexthop; -+ struct neighbour *neigh; -+ struct dst_entry *dst = skb_dst(skb); -+ struct rtable *rt = (struct rtable *)dst; -+ struct net_device *dev = (__force struct net_device *)out; -+ -+ rcu_read_lock_bh(); -+ nexthop = (__force u32) rt_nexthop(rt, ip_hdr(skb)->daddr); -+ neigh = __ipv4_neigh_lookup_noref(dev, nexthop); -+ if (unlikely(!neigh)) { -+ dev_err(host->dev, "%s:++ no neigh\n", __func__); -+ return -1; -+ } -+ -+ /* why do we get all zero ethernet address ? */ -+ if (!is_valid_ether_addr(neigh->ha)){ -+ rcu_read_unlock_bh(); -+ return -1; -+ } -+ -+ memcpy(eth_hdr(skb)->h_dest, neigh->ha, ETH_ALEN); -+ memcpy(eth_hdr(skb)->h_source, out->dev_addr, ETH_ALEN); -+ -+ rcu_read_unlock_bh(); -+ -+ return 0; -+} -+ -+static unsigned int mtk_hnat_ipv4_nf_post_routing(void *priv, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ if (!mtk_hnat_nf_post_routing(skb, state->out, hnat_get_nexthop, __func__)) -+ return NF_ACCEPT; -+ -+ return NF_DROP; -+} -+ -+static unsigned int mtk_hnat_br_nf_post_routing(void *priv, -+ struct sk_buff *skb, -+ const struct nf_hook_state *state) -+{ -+ if (!mtk_hnat_nf_post_routing(skb, state->out , 0, __func__)) -+ return NF_ACCEPT; -+ -+ return NF_DROP; -+} -+ -+static struct nf_hook_ops mtk_hnat_nf_ops[] __read_mostly = { -+ { -+ .hook = mtk_hnat_nf_pre_routing, -+ .pf = NFPROTO_IPV4, -+ .hooknum = NF_INET_PRE_ROUTING, -+ .priority = NF_IP_PRI_FIRST, -+ }, { -+ .hook = mtk_hnat_ipv4_nf_post_routing, -+ .pf = NFPROTO_IPV4, -+ .hooknum = NF_INET_POST_ROUTING, -+ .priority = NF_IP_PRI_LAST, -+ }, { -+ .hook = mtk_hnat_nf_pre_routing, -+ .pf = NFPROTO_BRIDGE, -+ .hooknum = NF_BR_PRE_ROUTING, -+ .priority = NF_BR_PRI_FIRST, -+ }, { -+ .hook = mtk_hnat_br_nf_post_routing, -+ .pf = NFPROTO_BRIDGE, -+ .hooknum = NF_BR_POST_ROUTING, -+ .priority = NF_BR_PRI_LAST - 1, -+ }, -+}; -+ -+int hnat_register_nf_hooks(void) -+{ -+ return nf_register_hooks(mtk_hnat_nf_ops, -+ ARRAY_SIZE(mtk_hnat_nf_ops)); -+} -+ -+void hnat_unregister_nf_hooks(void) -+{ -+ nf_unregister_hooks(mtk_hnat_nf_ops, -+ ARRAY_SIZE(mtk_hnat_nf_ops)); -+} ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h -@@ -0,0 +1,44 @@ -+/* This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; version 2 of the License -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Copyright (C) 2014-2016 Sean Wang -+ * Copyright (C) 2016-2017 John Crispin -+ */ -+ -+#ifndef NF_HNAT_MTK_H -+#define NF_HNAT_MTK_H -+ -+#include -+#include -+ -+#define HNAT_SKB_CB2(__skb) ((struct hnat_skb_cb2 *)&((__skb)->cb[44])) -+struct hnat_skb_cb2 { -+ __u32 magic; -+}; -+ -+struct hnat_desc { -+ u32 entry:14; -+ u32 crsn:5; -+ u32 sport:4; -+ u32 alg:9; -+} __attribute__ ((packed)); -+ -+#define skb_hnat_magic(skb) (((struct hnat_desc *)(skb->head))->magic) -+#define skb_hnat_reason(skb) (((struct hnat_desc *)(skb->head))->crsn) -+#define skb_hnat_entry(skb) (((struct hnat_desc *)(skb->head))->entry) -+#define skb_hnat_sport(skb) (((struct hnat_desc *)(skb->head))->sport) -+#define skb_hnat_alg(skb) (((struct hnat_desc *)(skb->head))->alg) -+ -+u32 hnat_tx(struct sk_buff *skb); -+u32 hnat_set_skb_info(struct sk_buff *skb, u32 *rxd); -+u32 hnat_reg(struct net_device *, void __iomem *); -+u32 hnat_unreg(void); -+ -+#endif -+ diff --git a/target/linux/mediatek/patches-4.9/0028-net-next-dsa-add-Mediatek-tag-RX-TX-handler.patch b/target/linux/mediatek/patches-4.9/0028-net-next-dsa-add-Mediatek-tag-RX-TX-handler.patch deleted file mode 100644 index ef545e3db..000000000 --- a/target/linux/mediatek/patches-4.9/0028-net-next-dsa-add-Mediatek-tag-RX-TX-handler.patch +++ /dev/null @@ -1,192 +0,0 @@ -From 5c01c03920c63630864d2b8641924a8c7c6cb62f Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Wed, 29 Mar 2017 17:38:20 +0800 -Subject: [PATCH 28/57] net-next: dsa: add Mediatek tag RX/TX handler - -Add the support for the 4-bytes tag for DSA port distinguishing inserted -allowing receiving and transmitting the packet via the particular port. -The tag is being added after the source MAC address in the ethernet -header. - -Signed-off-by: Sean Wang -Signed-off-by: Landen Chao -Reviewed-by: Andrew Lunn -Reviewed-by: Florian Fainelli ---- - include/net/dsa.h | 1 + - net/dsa/Kconfig | 2 + - net/dsa/Makefile | 1 + - net/dsa/dsa.c | 3 ++ - net/dsa/dsa_priv.h | 3 ++ - net/dsa/tag_mtk.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++++++++ - 6 files changed, 127 insertions(+) - create mode 100644 net/dsa/tag_mtk.c - ---- a/include/net/dsa.h -+++ b/include/net/dsa.h -@@ -27,6 +27,7 @@ enum dsa_tag_protocol { - DSA_TAG_PROTO_EDSA, - DSA_TAG_PROTO_BRCM, - DSA_TAG_PROTO_QCA, -+ DSA_TAG_PROTO_MTK, - DSA_TAG_LAST, /* MUST BE LAST */ - }; - ---- a/net/dsa/Kconfig -+++ b/net/dsa/Kconfig -@@ -42,4 +42,6 @@ config NET_DSA_TAG_TRAILER - config NET_DSA_TAG_QCA - bool - -+config NET_DSA_TAG_MTK -+ bool - endif ---- a/net/dsa/Makefile -+++ b/net/dsa/Makefile -@@ -8,3 +8,4 @@ dsa_core-$(CONFIG_NET_DSA_TAG_DSA) += ta - dsa_core-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o - dsa_core-$(CONFIG_NET_DSA_TAG_TRAILER) += tag_trailer.o - dsa_core-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o -+dsa_core-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o ---- a/net/dsa/dsa.c -+++ b/net/dsa/dsa.c -@@ -57,6 +57,9 @@ const struct dsa_device_ops *dsa_device_ - #ifdef CONFIG_NET_DSA_TAG_QCA - [DSA_TAG_PROTO_QCA] = &qca_netdev_ops, - #endif -+#ifdef CONFIG_NET_DSA_TAG_MTK -+ [DSA_TAG_PROTO_MTK] = &mtk_netdev_ops, -+#endif - [DSA_TAG_PROTO_NONE] = &none_ops, - }; - ---- a/net/dsa/dsa_priv.h -+++ b/net/dsa/dsa_priv.h -@@ -84,4 +84,7 @@ extern const struct dsa_device_ops brcm_ - /* tag_qca.c */ - extern const struct dsa_device_ops qca_netdev_ops; - -+/* tag_mtk.c */ -+extern const struct dsa_device_ops mtk_netdev_ops; -+ - #endif ---- /dev/null -+++ b/net/dsa/tag_mtk.c -@@ -0,0 +1,117 @@ -+/* -+ * Mediatek DSA Tag support -+ * Copyright (C) 2017 Landen Chao -+ * Sean Wang -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 and -+ * only version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include "dsa_priv.h" -+ -+#define MTK_HDR_LEN 4 -+#define MTK_HDR_RECV_SOURCE_PORT_MASK GENMASK(2, 0) -+#define MTK_HDR_XMIT_DP_BIT_MASK GENMASK(5, 0) -+ -+static struct sk_buff *mtk_tag_xmit(struct sk_buff *skb, -+ struct net_device *dev) -+{ -+ struct dsa_slave_priv *p = netdev_priv(dev); -+ u8 *mtk_tag; -+ -+ if (skb_cow_head(skb, MTK_HDR_LEN) < 0) -+ goto out_free; -+ -+ skb_push(skb, MTK_HDR_LEN); -+ -+ memmove(skb->data, skb->data + MTK_HDR_LEN, 2 * ETH_ALEN); -+ -+ /* Build the tag after the MAC Source Address */ -+ mtk_tag = skb->data + 2 * ETH_ALEN; -+ mtk_tag[0] = 0; -+ mtk_tag[1] = (1 << p->dp->index) & MTK_HDR_XMIT_DP_BIT_MASK; -+ mtk_tag[2] = 0; -+ mtk_tag[3] = 0; -+ -+ return skb; -+ -+out_free: -+ kfree_skb(skb); -+ return NULL; -+} -+ -+static int mtk_tag_rcv(struct sk_buff *skb, struct net_device *dev, -+ struct packet_type *pt, struct net_device *orig_dev) -+{ -+ struct dsa_switch_tree *dst = dev->dsa_ptr; -+ struct dsa_switch *ds; -+ int port; -+ __be16 *phdr, hdr; -+ -+ if (unlikely(!dst)) -+ goto out_drop; -+ -+ skb = skb_unshare(skb, GFP_ATOMIC); -+ if (!skb) -+ goto out; -+ -+ if (unlikely(!pskb_may_pull(skb, MTK_HDR_LEN))) -+ goto out_drop; -+ -+ /* The MTK header is added by the switch between src addr -+ * and ethertype at this point, skb->data points to 2 bytes -+ * after src addr so header should be 2 bytes right before. -+ */ -+ phdr = (__be16 *)(skb->data - 2); -+ hdr = ntohs(*phdr); -+ -+ /* Remove MTK tag and recalculate checksum. */ -+ skb_pull_rcsum(skb, MTK_HDR_LEN); -+ -+ memmove(skb->data - ETH_HLEN, -+ skb->data - ETH_HLEN - MTK_HDR_LEN, -+ 2 * ETH_ALEN); -+ -+ /* This protocol doesn't support cascading multiple -+ * switches so it's safe to assume the switch is first -+ * in the tree. -+ */ -+ ds = dst->ds[0]; -+ if (!ds) -+ goto out_drop; -+ -+ /* Get source port information */ -+ port = (hdr & MTK_HDR_RECV_SOURCE_PORT_MASK); -+ if (!ds->ports[port].netdev) -+ goto out_drop; -+ -+ /* Update skb & forward the frame accordingly */ -+ skb_push(skb, ETH_HLEN); -+ -+ skb->pkt_type = PACKET_HOST; -+ skb->dev = ds->ports[port].netdev; -+ skb->protocol = eth_type_trans(skb, skb->dev); -+ -+ skb->dev->stats.rx_packets++; -+ skb->dev->stats.rx_bytes += skb->len; -+ -+ netif_receive_skb(skb); -+ -+ return 0; -+ -+out_drop: -+ kfree_skb(skb); -+out: -+ return 0; -+} -+ -+const struct dsa_device_ops mtk_netdev_ops = { -+ .xmit = mtk_tag_xmit, -+ .rcv = mtk_tag_rcv, -+}; diff --git a/target/linux/mediatek/patches-4.9/0029-net-next-ethernet-mediatek-add-CDM-able-to-recognize.patch b/target/linux/mediatek/patches-4.9/0029-net-next-ethernet-mediatek-add-CDM-able-to-recognize.patch deleted file mode 100644 index 5c7e6e43c..000000000 --- a/target/linux/mediatek/patches-4.9/0029-net-next-ethernet-mediatek-add-CDM-able-to-recognize.patch +++ /dev/null @@ -1,48 +0,0 @@ -From de3c04b820e1d396bf12e88ea87271a84f6fedb7 Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Wed, 29 Mar 2017 17:38:21 +0800 -Subject: [PATCH 29/57] net-next: ethernet: mediatek: add CDM able to recognize - the tag for DSA - -The patch adds the setup for allowing CDM can recognize these packets with -carrying port-distinguishing tag. Otherwise, these tagging packets will be -handled incorrectly by CDM. The setup is also working out for general -untag packets as well. - -Signed-off-by: Sean Wang -Signed-off-by: Landen Chao -Reviewed-by: Andrew Lunn -Reviewed-by: Florian Fainelli ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 6 ++++++ - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++++ - 2 files changed, 10 insertions(+) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1864,6 +1864,12 @@ static int mtk_hw_init(struct mtk_eth *e - val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); - mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); - -+ /* Indicates CDM to parse the MTK special tag from CPU -+ * which also is working out for untag packets. -+ */ -+ val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); -+ mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); -+ - /* Enable RX VLan Offloading */ - mtk_w32(eth, 1, MTK_CDMP_EG_CTRL); - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -74,6 +74,10 @@ - #define MTK_CDMQ_IG_CTRL 0x1400 - #define MTK_CDMQ_STAG_EN BIT(0) - -+/* CDMP Ingress Control Register */ -+#define MTK_CDMQ_IG_CTRL 0x1400 -+#define MTK_CDMQ_STAG_EN BIT(0) -+ - /* CDMP Exgress Control Register */ - #define MTK_CDMP_EG_CTRL 0x404 - diff --git a/target/linux/mediatek/patches-4.9/0030-net-next-dsa-add-dsa-support-for-Mediatek-MT7530-swi.patch b/target/linux/mediatek/patches-4.9/0030-net-next-dsa-add-dsa-support-for-Mediatek-MT7530-swi.patch deleted file mode 100644 index 47a06838a..000000000 --- a/target/linux/mediatek/patches-4.9/0030-net-next-dsa-add-dsa-support-for-Mediatek-MT7530-swi.patch +++ /dev/null @@ -1,1584 +0,0 @@ -From 6a0a62dec3c582db4260f411294770448efc3d6c Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Wed, 29 Mar 2017 17:38:23 +0800 -Subject: [PATCH 30/57] net-next: dsa: add dsa support for Mediatek MT7530 - switch - -MT7530 is a 7-ports Gigabit Ethernet Switch that could be found on -Mediatek router platforms such as MT7623A or MT7623N platform which -includes 7-port Gigabit Ethernet MAC and 5-port Gigabit Ethernet PHY. -Among these ports, The port from 0 to 4 are the user ports connecting -with the remote devices while the port 5 and 6 are the CPU ports -connecting into Mediatek Ethernet GMAC. - -For port 6, it can communicate with the CPU via Mediatek Ethernet GMAC -through either the TRGMII or RGMII which could be controlled by phy-mode -in the dt-bindings to specify which mode is preferred to use. And for -port 5, only RGMII can be specified. However, currently, only port 6 is -being supported in this DSA driver. - -The driver is made with the reference to qca8k and other existing DSA -driver. The most of the essential callbacks of the DSA are already -support in the driver, including tag insert for user port distinguishing, -port control, bridge offloading, STP setup and ethtool operation to allow -DSA to model each user port into a standalone netdevice as the other DSA -driver had done. - -Signed-off-by: Sean Wang -Signed-off-by: Landen Chao ---- - drivers/net/dsa/Kconfig | 8 + - drivers/net/dsa/Makefile | 2 +- - drivers/net/dsa/mt7530.c | 1126 ++++++++++++++++++++++++++++++++++++++++++++++ - drivers/net/dsa/mt7530.h | 390 ++++++++++++++++ - 4 files changed, 1525 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/dsa/mt7530.c - create mode 100644 drivers/net/dsa/mt7530.h - ---- a/drivers/net/dsa/Kconfig -+++ b/drivers/net/dsa/Kconfig -@@ -34,4 +34,12 @@ config NET_DSA_QCA8K - This enables support for the Qualcomm Atheros QCA8K Ethernet - switch chips. - -+config NET_DSA_MT7530 -+ tristate "Mediatek MT7530 Ethernet switch support" -+ depends on NET_DSA -+ select NET_DSA_TAG_MTK -+ ---help--- -+ This enables support for the Mediatek MT7530 Ethernet switch -+ chip. -+ - endmenu ---- a/drivers/net/dsa/Makefile -+++ b/drivers/net/dsa/Makefile -@@ -1,6 +1,6 @@ - obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o - obj-$(CONFIG_NET_DSA_BCM_SF2) += bcm_sf2.o - obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o -- -+obj-$(CONFIG_NET_DSA_MT7530) += mt7530.o - obj-y += b53/ - obj-y += mv88e6xxx/ ---- /dev/null -+++ b/drivers/net/dsa/mt7530.c -@@ -0,0 +1,1126 @@ -+/* -+ * Mediatek MT7530 DSA Switch driver -+ * Copyright (C) 2017 Sean Wang -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mt7530.h" -+ -+/* String, offset, and register size in bytes if different from 4 bytes */ -+static const struct mt7530_mib_desc mt7530_mib[] = { -+ MIB_DESC(1, 0x00, "TxDrop"), -+ MIB_DESC(1, 0x04, "TxCrcErr"), -+ MIB_DESC(1, 0x08, "TxUnicast"), -+ MIB_DESC(1, 0x0c, "TxMulticast"), -+ MIB_DESC(1, 0x10, "TxBroadcast"), -+ MIB_DESC(1, 0x14, "TxCollision"), -+ MIB_DESC(1, 0x18, "TxSingleCollision"), -+ MIB_DESC(1, 0x1c, "TxMultipleCollision"), -+ MIB_DESC(1, 0x20, "TxDeferred"), -+ MIB_DESC(1, 0x24, "TxLateCollision"), -+ MIB_DESC(1, 0x28, "TxExcessiveCollistion"), -+ MIB_DESC(1, 0x2c, "TxPause"), -+ MIB_DESC(1, 0x30, "TxPktSz64"), -+ MIB_DESC(1, 0x34, "TxPktSz65To127"), -+ MIB_DESC(1, 0x38, "TxPktSz128To255"), -+ MIB_DESC(1, 0x3c, "TxPktSz256To511"), -+ MIB_DESC(1, 0x40, "TxPktSz512To1023"), -+ MIB_DESC(1, 0x44, "Tx1024ToMax"), -+ MIB_DESC(2, 0x48, "TxBytes"), -+ MIB_DESC(1, 0x60, "RxDrop"), -+ MIB_DESC(1, 0x64, "RxFiltering"), -+ MIB_DESC(1, 0x6c, "RxMulticast"), -+ MIB_DESC(1, 0x70, "RxBroadcast"), -+ MIB_DESC(1, 0x74, "RxAlignErr"), -+ MIB_DESC(1, 0x78, "RxCrcErr"), -+ MIB_DESC(1, 0x7c, "RxUnderSizeErr"), -+ MIB_DESC(1, 0x80, "RxFragErr"), -+ MIB_DESC(1, 0x84, "RxOverSzErr"), -+ MIB_DESC(1, 0x88, "RxJabberErr"), -+ MIB_DESC(1, 0x8c, "RxPause"), -+ MIB_DESC(1, 0x90, "RxPktSz64"), -+ MIB_DESC(1, 0x94, "RxPktSz65To127"), -+ MIB_DESC(1, 0x98, "RxPktSz128To255"), -+ MIB_DESC(1, 0x9c, "RxPktSz256To511"), -+ MIB_DESC(1, 0xa0, "RxPktSz512To1023"), -+ MIB_DESC(1, 0xa4, "RxPktSz1024ToMax"), -+ MIB_DESC(2, 0xa8, "RxBytes"), -+ MIB_DESC(1, 0xb0, "RxCtrlDrop"), -+ MIB_DESC(1, 0xb4, "RxIngressDrop"), -+ MIB_DESC(1, 0xb8, "RxArlDrop"), -+}; -+ -+static struct mt7530_priv *lpriv; -+static void mt7530_port_disable(struct dsa_switch *ds, int port, -+ struct phy_device *phy); -+static int mt7530_cpu_port_enable(struct mt7530_priv *priv, -+ int port); -+ -+static int -+mt7623_trgmii_write(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ int ret; -+ -+ ret = regmap_write(priv->ethernet, TRGMII_BASE(reg), val); -+ if (ret < 0) -+ dev_err(priv->dev, -+ "failed to priv write register\n"); -+ return ret; -+} -+ -+static u32 -+mt7623_trgmii_read(struct mt7530_priv *priv, u32 reg) -+{ -+ int ret; -+ u32 val; -+ -+ ret = regmap_read(priv->ethernet, TRGMII_BASE(reg), &val); -+ if (ret < 0) { -+ dev_err(priv->dev, -+ "failed to priv read register\n"); -+ return ret; -+ } -+ -+ return val; -+} -+ -+static void -+mt7623_trgmii_rmw(struct mt7530_priv *priv, u32 reg, -+ u32 mask, u32 set) -+{ -+ u32 val; -+ -+ val = mt7623_trgmii_read(priv, reg); -+ val &= ~mask; -+ val |= set; -+ mt7623_trgmii_write(priv, reg, val); -+} -+ -+static void -+mt7623_trgmii_set(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ mt7623_trgmii_rmw(priv, reg, 0, val); -+} -+ -+static void -+mt7623_trgmii_clear(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ mt7623_trgmii_rmw(priv, reg, val, 0); -+} -+ -+static int -+core_read_mmd_indirect(struct mt7530_priv *priv, int prtad, int devad) -+{ -+ struct mii_bus *bus = priv->bus; -+ int value, ret; -+ -+ /* Write the desired MMD Devad */ -+ ret = bus->write(bus, 0, MII_MMD_CTRL, devad); -+ if (ret < 0) -+ goto err; -+ -+ /* Write the desired MMD register address */ -+ ret = bus->write(bus, 0, MII_MMD_DATA, prtad); -+ if (ret < 0) -+ goto err; -+ -+ /* Select the Function : DATA with no post increment */ -+ ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); -+ if (ret < 0) -+ goto err; -+ -+ /* Read the content of the MMD's selected register */ -+ value = bus->read(bus, 0, MII_MMD_DATA); -+ -+ return value; -+err: -+ dev_err(&bus->dev, "failed to read mmd register\n"); -+ -+ return ret; -+} -+ -+static int -+core_write_mmd_indirect(struct mt7530_priv *priv, int prtad, -+ int devad, u32 data) -+{ -+ struct mii_bus *bus = priv->bus; -+ int ret; -+ -+ /* Write the desired MMD Devad */ -+ ret = bus->write(bus, 0, MII_MMD_CTRL, devad); -+ if (ret < 0) -+ goto err; -+ -+ /* Write the desired MMD register address */ -+ ret = bus->write(bus, 0, MII_MMD_DATA, prtad); -+ if (ret < 0) -+ goto err; -+ -+ /* Select the Function : DATA with no post increment */ -+ ret = bus->write(bus, 0, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); -+ if (ret < 0) -+ goto err; -+ -+ /* Write the data into MMD's selected register */ -+ ret = bus->write(bus, 0, MII_MMD_DATA, data); -+err: -+ if (ret < 0) -+ dev_err(&bus->dev, -+ "failed to write mmd register\n"); -+ return ret; -+} -+ -+static void -+core_write(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ struct mii_bus *bus = priv->bus; -+ -+ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); -+ -+ core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val); -+ -+ mutex_unlock(&bus->mdio_lock); -+} -+ -+static void -+core_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set) -+{ -+ struct mii_bus *bus = priv->bus; -+ u32 val; -+ -+ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); -+ -+ val = core_read_mmd_indirect(priv, reg, MDIO_MMD_VEND2); -+ val &= ~mask; -+ val |= set; -+ core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val); -+ -+ mutex_unlock(&bus->mdio_lock); -+} -+ -+static void -+core_set(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ core_rmw(priv, reg, 0, val); -+} -+ -+static void -+core_clear(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ core_rmw(priv, reg, val, 0); -+} -+ -+static int -+mt7530_mii_write(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ struct mii_bus *bus = priv->bus; -+ u16 page, r, lo, hi; -+ int ret; -+ -+ page = (reg >> 6) & 0x3ff; -+ r = (reg >> 2) & 0xf; -+ lo = val & 0xffff; -+ hi = val >> 16; -+ -+ /* MT7530 uses 31 as the pseudo port */ -+ ret = bus->write(bus, 0x1f, 0x1f, page); -+ if (ret < 0) -+ goto err; -+ -+ ret = bus->write(bus, 0x1f, r, lo); -+ if (ret < 0) -+ goto err; -+ -+ ret = bus->write(bus, 0x1f, 0x10, hi); -+err: -+ if (ret < 0) -+ dev_err(&bus->dev, -+ "failed to write mt7530 register\n"); -+ return ret; -+} -+ -+static u32 -+mt7530_mii_read(struct mt7530_priv *priv, u32 reg) -+{ -+ struct mii_bus *bus = priv->bus; -+ u16 page, r, lo, hi; -+ int ret; -+ -+ page = (reg >> 6) & 0x3ff; -+ r = (reg >> 2) & 0xf; -+ -+ /* MT7530 uses 31 as the pseudo port */ -+ ret = bus->write(bus, 0x1f, 0x1f, page); -+ if (ret < 0) { -+ dev_err(&bus->dev, -+ "failed to read mt7530 register\n"); -+ return ret; -+ } -+ -+ lo = bus->read(bus, 0x1f, r); -+ hi = bus->read(bus, 0x1f, 0x10); -+ -+ return (hi << 16) | (lo & 0xffff); -+} -+ -+static void -+mt7530_write(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ struct mii_bus *bus = priv->bus; -+ -+ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); -+ -+ mt7530_mii_write(priv, reg, val); -+ -+ mutex_unlock(&bus->mdio_lock); -+} -+ -+static u32 -+_mt7530_read(u32 reg) -+{ -+ struct mt7530_priv *priv = lpriv; -+ struct mii_bus *bus = priv->bus; -+ u32 val; -+ -+ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); -+ -+ val = mt7530_mii_read(priv, reg); -+ -+ mutex_unlock(&bus->mdio_lock); -+ -+ return val; -+} -+ -+static u32 -+mt7530_read(struct mt7530_priv *priv, u32 reg) -+{ -+ return _mt7530_read(reg); -+} -+ -+static void -+mt7530_rmw(struct mt7530_priv *priv, u32 reg, -+ u32 mask, u32 set) -+{ -+ struct mii_bus *bus = priv->bus; -+ u32 val; -+ -+ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); -+ -+ val = mt7530_mii_read(priv, reg); -+ val &= ~mask; -+ val |= set; -+ mt7530_mii_write(priv, reg, val); -+ -+ mutex_unlock(&bus->mdio_lock); -+} -+ -+static void -+mt7530_set(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ mt7530_rmw(priv, reg, 0, val); -+} -+ -+static void -+mt7530_clear(struct mt7530_priv *priv, u32 reg, u32 val) -+{ -+ mt7530_rmw(priv, reg, val, 0); -+} -+ -+static int -+mt7530_fdb_cmd(struct mt7530_priv *priv, enum mt7530_fdb_cmd cmd, u32 *rsp) -+{ -+ u32 val; -+ int ret; -+ -+ /* Set the command operating upon the MAC address entries */ -+ val = ATC_BUSY | ATC_MAT(0) | cmd; -+ mt7530_write(priv, MT7530_ATC, val); -+ -+ ret = readx_poll_timeout(_mt7530_read, MT7530_ATC, val, -+ !(val & ATC_BUSY), 20, 20000); -+ if (ret < 0) { -+ dev_err(priv->dev, "reset timeout\n"); -+ return ret; -+ } -+ -+ /* Additional sanity for read command if the specified -+ * entry is invalid -+ */ -+ val = mt7530_read(priv, MT7530_ATC); -+ if ((cmd == MT7530_FDB_READ) && (val & ATC_INVALID)) -+ return -EINVAL; -+ -+ if (rsp) -+ *rsp = val; -+ -+ return 0; -+} -+ -+static void -+mt7530_fdb_read(struct mt7530_priv *priv, struct mt7530_fdb *fdb) -+{ -+ u32 reg[3]; -+ int i; -+ -+ /* Read from ARL table into an array */ -+ for (i = 0; i < 3; i++) { -+ reg[i] = mt7530_read(priv, MT7530_TSRA1 + (i * 4)); -+ -+ dev_dbg(priv->dev, "%s(%d) reg[%d]=0x%x\n", -+ __func__, __LINE__, i, reg[i]); -+ } -+ -+ fdb->vid = (reg[1] >> CVID) & CVID_MASK; -+ fdb->aging = (reg[2] >> AGE_TIMER) & AGE_TIMER_MASK; -+ fdb->port_mask = (reg[2] >> PORT_MAP) & PORT_MAP_MASK; -+ fdb->mac[0] = (reg[0] >> MAC_BYTE_0) & MAC_BYTE_MASK; -+ fdb->mac[1] = (reg[0] >> MAC_BYTE_1) & MAC_BYTE_MASK; -+ fdb->mac[2] = (reg[0] >> MAC_BYTE_2) & MAC_BYTE_MASK; -+ fdb->mac[3] = (reg[0] >> MAC_BYTE_3) & MAC_BYTE_MASK; -+ fdb->mac[4] = (reg[1] >> MAC_BYTE_4) & MAC_BYTE_MASK; -+ fdb->mac[5] = (reg[1] >> MAC_BYTE_5) & MAC_BYTE_MASK; -+ fdb->noarp = ((reg[2] >> ENT_STATUS) & ENT_STATUS_MASK) == STATIC_ENT; -+} -+ -+static void -+mt7530_fdb_write(struct mt7530_priv *priv, u16 vid, -+ u8 port_mask, const u8 *mac, -+ u8 aging, u8 type) -+{ -+ u32 reg[3] = { 0 }; -+ int i; -+ -+ reg[1] |= vid & CVID_MASK; -+ reg[2] |= (aging & AGE_TIMER_MASK) << AGE_TIMER; -+ reg[2] |= (port_mask & PORT_MAP_MASK) << PORT_MAP; -+ /* STATIC_ENT indicate that entry is static wouldn't -+ * be aged out and STATIC_EMP specified as erasing an -+ * entry -+ */ -+ reg[2] |= (type & ENT_STATUS_MASK) << ENT_STATUS; -+ reg[1] |= mac[5] << MAC_BYTE_5; -+ reg[1] |= mac[4] << MAC_BYTE_4; -+ reg[0] |= mac[3] << MAC_BYTE_3; -+ reg[0] |= mac[2] << MAC_BYTE_2; -+ reg[0] |= mac[1] << MAC_BYTE_1; -+ reg[0] |= mac[0] << MAC_BYTE_0; -+ -+ /* Write array into the ARL table */ -+ for (i = 0; i < 3; i++) -+ mt7530_write(priv, MT7530_ATA1 + (i * 4), reg[i]); -+} -+ -+static int -+mt7530_pad_clk_setup(struct dsa_switch *ds, int mode) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ u32 ncpo1, ssc_delta, trgint, i; -+ -+ switch (mode) { -+ case PHY_INTERFACE_MODE_RGMII: -+ trgint = 0; -+ ncpo1 = 0x0c80; -+ ssc_delta = 0x87; -+ break; -+ case PHY_INTERFACE_MODE_TRGMII: -+ trgint = 1; -+ ncpo1 = 0x1400; -+ ssc_delta = 0x57; -+ break; -+ default: -+ dev_err(priv->dev, "xMII mode %d not supported\n", mode); -+ return -EINVAL; -+ } -+ -+ mt7530_rmw(priv, MT7530_P6ECR, P6_INTF_MODE_MASK, -+ P6_INTF_MODE(trgint)); -+ -+ /* Lower Tx Driving for TRGMII path */ -+ for (i = 0 ; i < NUM_TRGMII_CTRL ; i++) -+ mt7530_write(priv, MT7530_TRGMII_TD_ODT(i), -+ TD_DM_DRVP(8) | TD_DM_DRVN(8)); -+ -+ /* Setup core clock for MT7530 */ -+ if (!trgint) { -+ /* Disable MT7530 core clock */ -+ core_clear(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); -+ -+ /* Disable PLL, since phy_device has not yet been created -+ * provided for phy_[read,write]_mmd_indirect is called, we -+ * provide our own core_write_mmd_indirect to complete this -+ * function. -+ */ -+ core_write_mmd_indirect(priv, -+ CORE_GSWPLL_GRP1, -+ MDIO_MMD_VEND2, -+ 0); -+ -+ /* Set core clock into 500Mhz */ -+ core_write(priv, CORE_GSWPLL_GRP2, -+ RG_GSWPLL_POSDIV_500M(1) | -+ RG_GSWPLL_FBKDIV_500M(25)); -+ -+ /* Enable PLL */ -+ core_write(priv, CORE_GSWPLL_GRP1, -+ RG_GSWPLL_EN_PRE | -+ RG_GSWPLL_POSDIV_200M(2) | -+ RG_GSWPLL_FBKDIV_200M(32)); -+ -+ /* Enable MT7530 core clock */ -+ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); -+ } -+ -+ /* Setup the MT7530 TRGMII Tx Clock */ -+ core_set(priv, CORE_TRGMII_GSW_CLK_CG, REG_GSWCK_EN); -+ core_write(priv, CORE_PLL_GROUP5, RG_LCDDS_PCW_NCPO1(ncpo1)); -+ core_write(priv, CORE_PLL_GROUP6, RG_LCDDS_PCW_NCPO0(0)); -+ core_write(priv, CORE_PLL_GROUP10, RG_LCDDS_SSC_DELTA(ssc_delta)); -+ core_write(priv, CORE_PLL_GROUP11, RG_LCDDS_SSC_DELTA1(ssc_delta)); -+ core_write(priv, CORE_PLL_GROUP4, -+ RG_SYSPLL_DDSFBK_EN | RG_SYSPLL_BIAS_EN | -+ RG_SYSPLL_BIAS_LPF_EN); -+ core_write(priv, CORE_PLL_GROUP2, -+ RG_SYSPLL_EN_NORMAL | RG_SYSPLL_VODEN | -+ RG_SYSPLL_POSDIV(1)); -+ core_write(priv, CORE_PLL_GROUP7, -+ RG_LCDDS_PCW_NCPO_CHG | RG_LCCDS_C(3) | -+ RG_LCDDS_PWDB | RG_LCDDS_ISO_EN); -+ core_set(priv, CORE_TRGMII_GSW_CLK_CG, -+ REG_GSWCK_EN | REG_TRGMIICK_EN); -+ -+ if (!trgint) -+ for (i = 0 ; i < NUM_TRGMII_CTRL; i++) -+ mt7530_rmw(priv, MT7530_TRGMII_RD(i), -+ RD_TAP_MASK, RD_TAP(16)); -+ else -+ mt7623_trgmii_set(priv, GSW_INTF_MODE, INTF_MODE_TRGMII); -+ -+ return 0; -+} -+ -+static int -+mt7623_pad_clk_setup(struct dsa_switch *ds) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ int i; -+ -+ for (i = 0 ; i < NUM_TRGMII_CTRL; i++) -+ mt7623_trgmii_write(priv, GSW_TRGMII_TD_ODT(i), -+ TD_DM_DRVP(8) | TD_DM_DRVN(8)); -+ -+ mt7623_trgmii_set(priv, GSW_TRGMII_RCK_CTRL, RX_RST | RXC_DQSISEL); -+ mt7623_trgmii_clear(priv, GSW_TRGMII_RCK_CTRL, RX_RST); -+ -+ return 0; -+} -+ -+static void -+mt7530_mib_reset(struct dsa_switch *ds) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ -+ mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_FLUSH); -+ mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_ACTIVATE); -+} -+ -+static void -+mt7530_port_set_status(struct mt7530_priv *priv, int port, int enable) -+{ -+ u32 mask = PMCR_TX_EN | PMCR_RX_EN; -+ -+ if (enable) -+ mt7530_set(priv, MT7530_PMCR_P(port), mask); -+ else -+ mt7530_clear(priv, MT7530_PMCR_P(port), mask); -+} -+ -+static int -+mt7530_setup(struct dsa_switch *ds) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ int ret, i; -+ u32 id, val; -+ struct device_node *dn; -+ -+ /* The parent node of master_netdev which holds the common system -+ * controller also is the container for two GMACs nodes representing -+ * as two netdev instances. -+ */ -+ dn = ds->master_netdev->dev.of_node->parent; -+ priv->ethernet = syscon_node_to_regmap(dn); -+ if (IS_ERR(priv->ethernet)) -+ return PTR_ERR(priv->ethernet); -+ -+ regulator_set_voltage(priv->core_pwr, 1000000, 1000000); -+ ret = regulator_enable(priv->core_pwr); -+ if (ret < 0) { -+ dev_err(priv->dev, -+ "Failed to enable core power: %d\n", ret); -+ return ret; -+ } -+ -+ regulator_set_voltage(priv->io_pwr, 3300000, 3300000); -+ ret = regulator_enable(priv->io_pwr); -+ if (ret < 0) { -+ dev_err(priv->dev, "Failed to enable io pwr: %d\n", -+ ret); -+ return ret; -+ } -+ -+ /* Reset whole chip through gpio pin or memory-mapped registers for -+ * different type of hardware -+ */ -+ if (priv->mcm) { -+ reset_control_assert(priv->rstc); -+ usleep_range(1000, 1100); -+ reset_control_deassert(priv->rstc); -+ } else { -+ gpiod_set_value_cansleep(priv->reset, 0); -+ usleep_range(1000, 1100); -+ gpiod_set_value_cansleep(priv->reset, 1); -+ } -+ -+ /* Waiting for MT7530 got to stable */ -+ ret = readx_poll_timeout(_mt7530_read, MT7530_HWTRAP, val, val != 0, -+ 20, 1000000); -+ if (ret < 0) { -+ dev_err(priv->dev, "reset timeout\n"); -+ return ret; -+ } -+ -+ id = mt7530_read(priv, MT7530_CREV); -+ id >>= CHIP_NAME_SHIFT; -+ if (id != MT7530_ID) { -+ dev_err(priv->dev, "chip %x can't be supported\n", id); -+ return -ENODEV; -+ } -+ -+ /* Reset the switch through internal reset */ -+ mt7530_write(priv, MT7530_SYS_CTRL, -+ SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST | -+ SYS_CTRL_REG_RST); -+ -+ /* Enable Port 6 only; P5 as GMAC5 which currently is not supported */ -+ val = mt7530_read(priv, MT7530_MHWTRAP); -+ val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; -+ val |= MHWTRAP_MANUAL; -+ mt7530_write(priv, MT7530_MHWTRAP, val); -+ -+ /* Enable and reset MIB counters */ -+ mt7530_mib_reset(ds); -+ -+ mt7530_clear(priv, MT7530_MFC, UNU_FFP_MASK); -+ -+ for (i = 0; i < MT7530_NUM_PORTS; i++) { -+ /* Disable forwarding by default on all ports */ -+ mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, -+ PCR_MATRIX_CLR); -+ -+ if (dsa_is_cpu_port(ds, i)) -+ mt7530_cpu_port_enable(priv, i); -+ else -+ mt7530_port_disable(ds, i, NULL); -+ } -+ -+ /* Flush the FDB table */ -+ ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, 0); -+ if (ret < 0) -+ return ret; -+ -+ return 0; -+} -+ -+static int mt7530_phy_read(struct dsa_switch *ds, int port, int regnum) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ -+ return mdiobus_read_nested(priv->bus, port, regnum); -+} -+ -+int mt7530_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ -+ return mdiobus_write_nested(priv->bus, port, regnum, val); -+} -+ -+static void -+mt7530_get_strings(struct dsa_switch *ds, int port, uint8_t *data) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(mt7530_mib); i++) -+ strncpy(data + i * ETH_GSTRING_LEN, mt7530_mib[i].name, -+ ETH_GSTRING_LEN); -+} -+ -+static void -+mt7530_get_ethtool_stats(struct dsa_switch *ds, int port, -+ uint64_t *data) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ const struct mt7530_mib_desc *mib; -+ u32 reg, i; -+ u64 hi; -+ -+ for (i = 0; i < ARRAY_SIZE(mt7530_mib); i++) { -+ mib = &mt7530_mib[i]; -+ reg = MT7530_PORT_MIB_COUNTER(port) + mib->offset; -+ -+ data[i] = mt7530_read(priv, reg); -+ if (mib->size == 2) { -+ hi = mt7530_read(priv, reg + 4); -+ data[i] |= hi << 32; -+ } -+ } -+} -+ -+static int -+mt7530_get_sset_count(struct dsa_switch *ds) -+{ -+ return ARRAY_SIZE(mt7530_mib); -+} -+ -+static void mt7530_adjust_link(struct dsa_switch *ds, int port, -+ struct phy_device *phydev) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ -+ if (phy_is_pseudo_fixed_link(phydev)) { -+ dev_dbg(priv->dev, "phy-mode for master device = %x\n", -+ phydev->interface); -+ -+ /* Setup TX circuit incluing relevant PAD and driving */ -+ mt7530_pad_clk_setup(ds, phydev->interface); -+ -+ /* Setup RX circuit, relevant PAD and driving on the host -+ * which must be placed after the setup on the device side is -+ * all finished. -+ */ -+ mt7623_pad_clk_setup(ds); -+ } -+} -+ -+static int -+mt7530_cpu_port_enable(struct mt7530_priv *priv, -+ int port) -+{ -+ /* Enable Mediatek header mode on the cpu port */ -+ mt7530_write(priv, MT7530_PVC_P(port), -+ PORT_SPEC_TAG); -+ -+ /* Setup the MAC by default for the cpu port */ -+ mt7530_write(priv, MT7530_PMCR_P(port), PMCR_CPUP_LINK); -+ -+ /* Disable auto learning on the cpu port */ -+ mt7530_set(priv, MT7530_PSC_P(port), SA_DIS); -+ -+ /* Unknown unicast frame fordwarding to the cpu port */ -+ mt7530_set(priv, MT7530_MFC, UNU_FFP(BIT(port))); -+ -+ /* CPU port gets connected to all user ports of -+ * the switch -+ */ -+ mt7530_write(priv, MT7530_PCR_P(port), -+ PCR_MATRIX(priv->ds->enabled_port_mask)); -+ -+ return 0; -+} -+ -+static int -+mt7530_port_enable(struct dsa_switch *ds, int port, -+ struct phy_device *phy) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ -+ mutex_lock(&priv->reg_mutex); -+ -+ /* Setup the MAC for the user port */ -+ mt7530_write(priv, MT7530_PMCR_P(port), PMCR_USERP_LINK); -+ -+ /* Allow the user port gets connected to the cpu port and also -+ * restore the port matrix if the port is the member of a certain -+ * bridge. -+ */ -+ priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT)); -+ priv->ports[port].enable = true; -+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, -+ priv->ports[port].pm); -+ mt7530_port_set_status(priv, port, 1); -+ -+ mutex_unlock(&priv->reg_mutex); -+ -+ return 0; -+} -+ -+static void -+mt7530_port_disable(struct dsa_switch *ds, int port, -+ struct phy_device *phy) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ -+ mutex_lock(&priv->reg_mutex); -+ -+ /* Clear up all port matrix which could be restored in the next -+ * enablement for the port. -+ */ -+ priv->ports[port].enable = false; -+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, -+ PCR_MATRIX_CLR); -+ mt7530_port_set_status(priv, port, 0); -+ -+ mutex_unlock(&priv->reg_mutex); -+} -+ -+static void -+mt7530_stp_state_set(struct dsa_switch *ds, int port, u8 state) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ u32 stp_state; -+ -+ switch (state) { -+ case BR_STATE_DISABLED: -+ stp_state = MT7530_STP_DISABLED; -+ break; -+ case BR_STATE_BLOCKING: -+ stp_state = MT7530_STP_BLOCKING; -+ break; -+ case BR_STATE_LISTENING: -+ stp_state = MT7530_STP_LISTENING; -+ break; -+ case BR_STATE_LEARNING: -+ stp_state = MT7530_STP_LEARNING; -+ break; -+ case BR_STATE_FORWARDING: -+ default: -+ stp_state = MT7530_STP_FORWARDING; -+ break; -+ } -+ -+ mt7530_rmw(priv, MT7530_SSP_P(port), FID_PST_MASK, stp_state); -+} -+ -+static int -+mt7530_port_bridge_join(struct dsa_switch *ds, int port, -+ struct net_device *bridge) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ u32 port_bitmap = BIT(MT7530_CPU_PORT); -+ int i; -+ -+ mutex_lock(&priv->reg_mutex); -+ -+ for (i = 0; i < MT7530_NUM_PORTS; i++) { -+ /* Add this port to the port matrix of the other ports in the -+ * same bridge. If the port is disabled, port matrix is kept -+ * and not being setup until the port becomes enabled. -+ */ -+ if (ds->enabled_port_mask & BIT(i) && i != port) { -+ if (ds->ports[i].bridge_dev != bridge) -+ continue; -+ if (priv->ports[i].enable) -+ mt7530_set(priv, MT7530_PCR_P(i), -+ PCR_MATRIX(BIT(port))); -+ priv->ports[i].pm |= PCR_MATRIX(BIT(port)); -+ -+ port_bitmap |= BIT(i); -+ } -+ } -+ -+ /* Add the all other ports to this port matrix. */ -+ if (priv->ports[port].enable) -+ mt7530_rmw(priv, MT7530_PCR_P(port), -+ PCR_MATRIX_MASK, PCR_MATRIX(port_bitmap)); -+ priv->ports[port].pm |= PCR_MATRIX(port_bitmap); -+ -+ mutex_unlock(&priv->reg_mutex); -+ -+ return 0; -+} -+ -+static void -+mt7530_port_bridge_leave(struct dsa_switch *ds, int port, -+ struct net_device *bridge) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ int i; -+ -+ mutex_lock(&priv->reg_mutex); -+ -+ for (i = 0; i < MT7530_NUM_PORTS; i++) { -+ /* Remove this port from the port matrix of the other ports -+ * in the same bridge. If the port is disabled, port matrix -+ * is kept and not being setup until the port becomes enabled. -+ */ -+ if (ds->enabled_port_mask & BIT(i) && i != port) { -+ if (ds->ports[i].bridge_dev != bridge) -+ continue; -+ if (priv->ports[i].enable) -+ mt7530_clear(priv, MT7530_PCR_P(i), -+ PCR_MATRIX(BIT(port))); -+ priv->ports[i].pm &= ~PCR_MATRIX(BIT(port)); -+ } -+ } -+ -+ /* Set the cpu port to be the only one in the port matrix of -+ * this port. -+ */ -+ if (priv->ports[port].enable) -+ mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, -+ PCR_MATRIX(BIT(MT7530_CPU_PORT))); -+ priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT)); -+ -+ mutex_unlock(&priv->reg_mutex); -+} -+ -+static int -+mt7530_port_fdb_prepare(struct dsa_switch *ds, int port, -+ const struct switchdev_obj_port_fdb *fdb, -+ struct switchdev_trans *trans) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ int ret; -+ -+ /* Because auto-learned entrie shares the same FDB table. -+ * an entry is reserved with no port_mask to make sure fdb_add -+ * is called while the entry is still available. -+ */ -+ mutex_lock(&priv->reg_mutex); -+ mt7530_fdb_write(priv, fdb->vid, 0, fdb->addr, -1, STATIC_ENT); -+ ret = mt7530_fdb_cmd(priv, MT7530_FDB_WRITE, 0); -+ mutex_unlock(&priv->reg_mutex); -+ -+ return ret; -+} -+ -+static void -+mt7530_port_fdb_add(struct dsa_switch *ds, int port, -+ const struct switchdev_obj_port_fdb *fdb, -+ struct switchdev_trans *trans) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ u8 port_mask = BIT(port); -+ -+ mutex_lock(&priv->reg_mutex); -+ mt7530_fdb_write(priv, fdb->vid, port_mask, fdb->addr, -1, STATIC_ENT); -+ mt7530_fdb_cmd(priv, MT7530_FDB_WRITE, 0); -+ mutex_unlock(&priv->reg_mutex); -+} -+ -+static int -+mt7530_port_fdb_del(struct dsa_switch *ds, int port, -+ const struct switchdev_obj_port_fdb *fdb) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ int ret; -+ u8 port_mask = BIT(port); -+ -+ mutex_lock(&priv->reg_mutex); -+ mt7530_fdb_write(priv, fdb->vid, port_mask, fdb->addr, -1, STATIC_EMP); -+ ret = mt7530_fdb_cmd(priv, MT7530_FDB_WRITE, 0); -+ mutex_unlock(&priv->reg_mutex); -+ -+ return ret; -+} -+ -+static int -+mt7530_port_fdb_dump(struct dsa_switch *ds, int port, -+ struct switchdev_obj_port_fdb *fdb, -+ int (*cb)(struct switchdev_obj *obj)) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ struct mt7530_fdb _fdb = { 0 }; -+ int cnt = MT7530_NUM_FDB_RECORDS; -+ int ret = 0; -+ u32 rsp = 0; -+ -+ mutex_lock(&priv->reg_mutex); -+ -+ ret = mt7530_fdb_cmd(priv, MT7530_FDB_START, &rsp); -+ if (ret < 0) -+ goto err; -+ -+ do { -+ if (rsp & ATC_SRCH_HIT) { -+ mt7530_fdb_read(priv, &_fdb); -+ if (_fdb.port_mask & BIT(port)) { -+ ether_addr_copy(fdb->addr, _fdb.mac); -+ fdb->vid = _fdb.vid; -+ fdb->ndm_state = _fdb.noarp ? -+ NUD_NOARP : NUD_REACHABLE; -+ ret = cb(&fdb->obj); -+ if (ret < 0) -+ break; -+ } -+ } -+ } while (--cnt && -+ !(rsp & ATC_SRCH_END) && -+ !mt7530_fdb_cmd(priv, MT7530_FDB_NEXT, &rsp)); -+err: -+ mutex_unlock(&priv->reg_mutex); -+ -+ return 0; -+} -+ -+static enum dsa_tag_protocol -+mtk_get_tag_protocol(struct dsa_switch *ds) -+{ -+ struct mt7530_priv *priv = ds->priv; -+ -+ if (!dsa_is_cpu_port(ds, MT7530_CPU_PORT)) { -+ dev_warn(priv->dev, -+ "port not matched with tagging CPU port\n"); -+ return DSA_TAG_PROTO_NONE; -+ } else { -+ return DSA_TAG_PROTO_MTK; -+ } -+} -+ -+static struct dsa_switch_ops mt7530_switch_ops = { -+ .get_tag_protocol = mtk_get_tag_protocol, -+ .setup = mt7530_setup, -+ .get_strings = mt7530_get_strings, -+ .phy_read = mt7530_phy_read, -+ .phy_write = mt7530_phy_write, -+ .get_ethtool_stats = mt7530_get_ethtool_stats, -+ .get_sset_count = mt7530_get_sset_count, -+ .adjust_link = mt7530_adjust_link, -+ .port_enable = mt7530_port_enable, -+ .port_disable = mt7530_port_disable, -+ .port_stp_state_set = mt7530_stp_state_set, -+ .port_bridge_join = mt7530_port_bridge_join, -+ .port_bridge_leave = mt7530_port_bridge_leave, -+ .port_fdb_prepare = mt7530_port_fdb_prepare, -+ .port_fdb_add = mt7530_port_fdb_add, -+ .port_fdb_del = mt7530_port_fdb_del, -+ .port_fdb_dump = mt7530_port_fdb_dump, -+}; -+ -+static int -+mt7530_probe(struct mdio_device *mdiodev) -+{ -+ struct mt7530_priv *priv; -+ struct device_node *dn; -+ -+ dn = mdiodev->dev.of_node; -+ -+ priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ priv->ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS); -+ if (!priv->ds) -+ return -ENOMEM; -+ -+ /* Use medatek,mcm property to distinguish hardware type that would -+ * casues a little bit differences on power-on sequence. -+ */ -+ priv->mcm = of_property_read_bool(dn, "mediatek,mcm"); -+ if (priv->mcm) { -+ dev_info(&mdiodev->dev, "MT7530 adapts as multi-chip module\n"); -+ -+ priv->rstc = devm_reset_control_get(&mdiodev->dev, "mcm"); -+ if (IS_ERR(priv->rstc)) { -+ dev_err(&mdiodev->dev, "Couldn't get our reset line\n"); -+ return PTR_ERR(priv->rstc); -+ } -+ } -+ -+ priv->core_pwr = devm_regulator_get(&mdiodev->dev, "core"); -+ if (IS_ERR(priv->core_pwr)) -+ return PTR_ERR(priv->core_pwr); -+ -+ priv->io_pwr = devm_regulator_get(&mdiodev->dev, "io"); -+ if (IS_ERR(priv->io_pwr)) -+ return PTR_ERR(priv->io_pwr); -+ -+ /* Not MCM that indicates switch works as the remote standalone -+ * integrated circuit so the GPIO pin would be used to complete -+ * the reset, otherwise memory-mapped register accessing used -+ * through syscon provides in the case of MCM. -+ */ -+ if (!priv->mcm) { -+ priv->reset = devm_gpiod_get_optional(&mdiodev->dev, "reset", -+ GPIOD_OUT_LOW); -+ if (IS_ERR(priv->reset)) { -+ dev_err(&mdiodev->dev, "Couldn't get our reset line\n"); -+ return PTR_ERR(priv->reset); -+ } -+ } -+ -+ priv->bus = mdiodev->bus; -+ priv->dev = &mdiodev->dev; -+ priv->ds->priv = priv; -+ priv->ds->ops = &mt7530_switch_ops; -+ mutex_init(&priv->reg_mutex); -+ lpriv = priv; -+ dev_set_drvdata(&mdiodev->dev, priv); -+ -+ return dsa_register_switch(priv->ds, &mdiodev->dev); -+} -+ -+static void -+mt7530_remove(struct mdio_device *mdiodev) -+{ -+ struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); -+ int ret = 0; -+ -+ ret = regulator_disable(priv->core_pwr); -+ if (ret < 0) -+ dev_err(priv->dev, -+ "Failed to disable core power: %d\n", ret); -+ -+ ret = regulator_disable(priv->io_pwr); -+ if (ret < 0) -+ dev_err(priv->dev, "Failed to disable io pwr: %d\n", -+ ret); -+ -+ dsa_unregister_switch(priv->ds); -+ mutex_destroy(&priv->reg_mutex); -+} -+ -+static const struct of_device_id mt7530_of_match[] = { -+ { .compatible = "mediatek,mt7530" }, -+ { /* sentinel */ }, -+}; -+ -+static struct mdio_driver mt7530_mdio_driver = { -+ .probe = mt7530_probe, -+ .remove = mt7530_remove, -+ .mdiodrv.driver = { -+ .name = "mt7530", -+ .of_match_table = mt7530_of_match, -+ }, -+}; -+ -+mdio_module_driver(mt7530_mdio_driver); -+ -+MODULE_AUTHOR("Sean Wang "); -+MODULE_DESCRIPTION("Driver for Mediatek MT7530 Switch"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:mediatek-mt7530"); ---- /dev/null -+++ b/drivers/net/dsa/mt7530.h -@@ -0,0 +1,390 @@ -+/* -+ * Copyright (C) 2017 Sean Wang -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#ifndef __MT7530_H -+#define __MT7530_H -+ -+#define MT7530_NUM_PORTS 7 -+#define MT7530_CPU_PORT 6 -+#define MT7530_NUM_FDB_RECORDS 2048 -+ -+#define NUM_TRGMII_CTRL 5 -+ -+#define TRGMII_BASE(x) (0x10000 + (x)) -+ -+/* Registers to ethsys access */ -+#define ETHSYS_CLKCFG0 0x2c -+#define ETHSYS_TRGMII_CLK_SEL362_5 BIT(11) -+ -+#define SYSC_REG_RSTCTRL 0x34 -+#define RESET_MCM BIT(2) -+ -+/* Registers to mac forward control for unknown frames */ -+#define MT7530_MFC 0x10 -+#define BC_FFP(x) (((x) & 0xff) << 24) -+#define UNM_FFP(x) (((x) & 0xff) << 16) -+#define UNU_FFP(x) (((x) & 0xff) << 8) -+#define UNU_FFP_MASK UNU_FFP(~0) -+ -+/* Registers for address table access */ -+#define MT7530_ATA1 0x74 -+#define STATIC_EMP 0 -+#define STATIC_ENT 3 -+#define MT7530_ATA2 0x78 -+ -+/* Register for address table write data */ -+#define MT7530_ATWD 0x7c -+ -+/* Register for address table control */ -+#define MT7530_ATC 0x80 -+#define ATC_HASH (((x) & 0xfff) << 16) -+#define ATC_BUSY BIT(15) -+#define ATC_SRCH_END BIT(14) -+#define ATC_SRCH_HIT BIT(13) -+#define ATC_INVALID BIT(12) -+#define ATC_MAT(x) (((x) & 0xf) << 8) -+#define ATC_MAT_MACTAB ATC_MAT(0) -+ -+enum mt7530_fdb_cmd { -+ MT7530_FDB_READ = 0, -+ MT7530_FDB_WRITE = 1, -+ MT7530_FDB_FLUSH = 2, -+ MT7530_FDB_START = 4, -+ MT7530_FDB_NEXT = 5, -+}; -+ -+/* Registers for table search read address */ -+#define MT7530_TSRA1 0x84 -+#define MAC_BYTE_0 24 -+#define MAC_BYTE_1 16 -+#define MAC_BYTE_2 8 -+#define MAC_BYTE_3 0 -+#define MAC_BYTE_MASK 0xff -+ -+#define MT7530_TSRA2 0x88 -+#define MAC_BYTE_4 24 -+#define MAC_BYTE_5 16 -+#define CVID 0 -+#define CVID_MASK 0xfff -+ -+#define MT7530_ATRD 0x8C -+#define AGE_TIMER 24 -+#define AGE_TIMER_MASK 0xff -+#define PORT_MAP 4 -+#define PORT_MAP_MASK 0xff -+#define ENT_STATUS 2 -+#define ENT_STATUS_MASK 0x3 -+ -+/* Register for vlan table control */ -+#define MT7530_VTCR 0x90 -+#define VTCR_BUSY BIT(31) -+#define VTCR_FUNC (((x) & 0xf) << 12) -+#define VTCR_FUNC_RD_VID 0x1 -+#define VTCR_FUNC_WR_VID 0x2 -+#define VTCR_FUNC_INV_VID 0x3 -+#define VTCR_FUNC_VAL_VID 0x4 -+#define VTCR_VID ((x) & 0xfff) -+ -+/* Register for setup vlan and acl write data */ -+#define MT7530_VAWD1 0x94 -+#define PORT_STAG BIT(31) -+#define IVL_MAC BIT(30) -+#define PORT_MEM(x) (((x) & 0xff) << 16) -+#define VALID BIT(1) -+ -+#define MT7530_VAWD2 0x98 -+ -+/* Register for port STP state control */ -+#define MT7530_SSP_P(x) (0x2000 + ((x) * 0x100)) -+#define FID_PST(x) ((x) & 0x3) -+#define FID_PST_MASK FID_PST(0x3) -+ -+enum mt7530_stp_state { -+ MT7530_STP_DISABLED = 0, -+ MT7530_STP_BLOCKING = 1, -+ MT7530_STP_LISTENING = 1, -+ MT7530_STP_LEARNING = 2, -+ MT7530_STP_FORWARDING = 3 -+}; -+ -+/* Register for port control */ -+#define MT7530_PCR_P(x) (0x2004 + ((x) * 0x100)) -+#define PORT_VLAN(x) ((x) & 0x3) -+#define PCR_MATRIX(x) (((x) & 0xff) << 16) -+#define PORT_PRI(x) (((x) & 0x7) << 24) -+#define EG_TAG(x) (((x) & 0x3) << 28) -+#define PCR_MATRIX_MASK PCR_MATRIX(0xff) -+#define PCR_MATRIX_CLR PCR_MATRIX(0) -+ -+/* Register for port security control */ -+#define MT7530_PSC_P(x) (0x200c + ((x) * 0x100)) -+#define SA_DIS BIT(4) -+ -+/* Register for port vlan control */ -+#define MT7530_PVC_P(x) (0x2010 + ((x) * 0x100)) -+#define PORT_SPEC_TAG BIT(5) -+#define VLAN_ATTR(x) (((x) & 0x3) << 6) -+#define STAG_VPID (((x) & 0xffff) << 16) -+ -+/* Register for port port-and-protocol based vlan 1 control */ -+#define MT7530_PPBV1_P(x) (0x2014 + ((x) * 0x100)) -+ -+/* Register for port MAC control register */ -+#define MT7530_PMCR_P(x) (0x3000 + ((x) * 0x100)) -+#define PMCR_IFG_XMIT(x) (((x) & 0x3) << 18) -+#define PMCR_MAC_MODE BIT(16) -+#define PMCR_FORCE_MODE BIT(15) -+#define PMCR_TX_EN BIT(14) -+#define PMCR_RX_EN BIT(13) -+#define PMCR_BACKOFF_EN BIT(9) -+#define PMCR_BACKPR_EN BIT(8) -+#define PMCR_TX_FC_EN BIT(5) -+#define PMCR_RX_FC_EN BIT(4) -+#define PMCR_FORCE_SPEED_1000 BIT(3) -+#define PMCR_FORCE_FDX BIT(1) -+#define PMCR_FORCE_LNK BIT(0) -+#define PMCR_COMMON_LINK (PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \ -+ PMCR_BACKOFF_EN | PMCR_BACKPR_EN | \ -+ PMCR_TX_EN | PMCR_RX_EN | \ -+ PMCR_TX_FC_EN | PMCR_RX_FC_EN) -+#define PMCR_CPUP_LINK (PMCR_COMMON_LINK | PMCR_FORCE_MODE | \ -+ PMCR_FORCE_SPEED_1000 | \ -+ PMCR_FORCE_FDX | \ -+ PMCR_FORCE_LNK) -+#define PMCR_USERP_LINK PMCR_COMMON_LINK -+#define PMCR_FIXED_LINK (PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \ -+ PMCR_FORCE_MODE | PMCR_TX_EN | \ -+ PMCR_RX_EN | PMCR_BACKPR_EN | \ -+ PMCR_BACKOFF_EN | \ -+ PMCR_FORCE_SPEED_1000 | \ -+ PMCR_FORCE_FDX | \ -+ PMCR_FORCE_LNK) -+#define PMCR_FIXED_LINK_FC (PMCR_FIXED_LINK | \ -+ PMCR_TX_FC_EN | PMCR_RX_FC_EN) -+ -+#define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100) -+ -+/* Register for MIB */ -+#define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100) -+#define MT7530_MIB_CCR 0x4fe0 -+#define CCR_MIB_ENABLE BIT(31) -+#define CCR_RX_OCT_CNT_GOOD BIT(7) -+#define CCR_RX_OCT_CNT_BAD BIT(6) -+#define CCR_TX_OCT_CNT_GOOD BIT(5) -+#define CCR_TX_OCT_CNT_BAD BIT(4) -+#define CCR_MIB_FLUSH (CCR_RX_OCT_CNT_GOOD | \ -+ CCR_RX_OCT_CNT_BAD | \ -+ CCR_TX_OCT_CNT_GOOD | \ -+ CCR_TX_OCT_CNT_BAD) -+#define CCR_MIB_ACTIVATE (CCR_MIB_ENABLE | \ -+ CCR_RX_OCT_CNT_GOOD | \ -+ CCR_RX_OCT_CNT_BAD | \ -+ CCR_TX_OCT_CNT_GOOD | \ -+ CCR_TX_OCT_CNT_BAD) -+/* Register for system reset */ -+#define MT7530_SYS_CTRL 0x7000 -+#define SYS_CTRL_PHY_RST BIT(2) -+#define SYS_CTRL_SW_RST BIT(1) -+#define SYS_CTRL_REG_RST BIT(0) -+ -+/* Register for hw trap status */ -+#define MT7530_HWTRAP 0x7800 -+ -+/* Register for hw trap modification */ -+#define MT7530_MHWTRAP 0x7804 -+#define MHWTRAP_MANUAL BIT(16) -+#define MHWTRAP_P5_MAC_SEL BIT(13) -+#define MHWTRAP_P6_DIS BIT(8) -+#define MHWTRAP_P5_RGMII_MODE BIT(7) -+#define MHWTRAP_P5_DIS BIT(6) -+#define MHWTRAP_PHY_ACCESS BIT(5) -+ -+/* Register for TOP signal control */ -+#define MT7530_TOP_SIG_CTRL 0x7808 -+#define TOP_SIG_CTRL_NORMAL (BIT(17) | BIT(16)) -+ -+#define MT7530_IO_DRV_CR 0x7810 -+#define P5_IO_CLK_DRV(x) ((x) & 0x3) -+#define P5_IO_DATA_DRV(x) (((x) & 0x3) << 4) -+ -+#define MT7530_P6ECR 0x7830 -+#define P6_INTF_MODE_MASK 0x3 -+#define P6_INTF_MODE(x) ((x) & 0x3) -+ -+/* Registers for TRGMII on the both side */ -+#define MT7530_TRGMII_RCK_CTRL 0x7a00 -+#define GSW_TRGMII_RCK_CTRL 0x300 -+#define RX_RST BIT(31) -+#define RXC_DQSISEL BIT(30) -+#define DQSI1_TAP_MASK (0x7f << 8) -+#define DQSI0_TAP_MASK 0x7f -+#define DQSI1_TAP(x) (((x) & 0x7f) << 8) -+#define DQSI0_TAP(x) ((x) & 0x7f) -+ -+#define MT7530_TRGMII_RCK_RTT 0x7a04 -+#define GSW_TRGMII_RCK_RTT 0x304 -+#define DQS1_GATE BIT(31) -+#define DQS0_GATE BIT(30) -+ -+#define MT7530_TRGMII_RD(x) (0x7a10 + (x) * 8) -+#define GSW_TRGMII_RD(x) (0x310 + (x) * 8) -+#define BSLIP_EN BIT(31) -+#define EDGE_CHK BIT(30) -+#define RD_TAP_MASK 0x7f -+#define RD_TAP(x) ((x) & 0x7f) -+ -+#define GSW_TRGMII_TXCTRL 0x340 -+#define MT7530_TRGMII_TXCTRL 0x7a40 -+#define TRAIN_TXEN BIT(31) -+#define TXC_INV BIT(30) -+#define TX_RST BIT(28) -+ -+#define MT7530_TRGMII_TD_ODT(i) (0x7a54 + 8 * (i)) -+#define GSW_TRGMII_TD_ODT(i) (0x354 + 8 * (i)) -+#define TD_DM_DRVP(x) ((x) & 0xf) -+#define TD_DM_DRVN(x) (((x) & 0xf) << 4) -+ -+#define GSW_INTF_MODE 0x390 -+#define INTF_MODE_TRGMII BIT(1) -+ -+#define MT7530_TRGMII_TCK_CTRL 0x7a78 -+#define TCK_TAP(x) (((x) & 0xf) << 8) -+ -+#define MT7530_P5RGMIIRXCR 0x7b00 -+#define CSR_RGMII_EDGE_ALIGN BIT(8) -+#define CSR_RGMII_RXC_0DEG_CFG(x) ((x) & 0xf) -+ -+#define MT7530_P5RGMIITXCR 0x7b04 -+#define CSR_RGMII_TXC_CFG(x) ((x) & 0x1f) -+ -+#define MT7530_CREV 0x7ffc -+#define CHIP_NAME_SHIFT 16 -+#define MT7530_ID 0x7530 -+ -+/* Registers for core PLL access through mmd indirect */ -+#define CORE_PLL_GROUP2 0x401 -+#define RG_SYSPLL_EN_NORMAL BIT(15) -+#define RG_SYSPLL_VODEN BIT(14) -+#define RG_SYSPLL_LF BIT(13) -+#define RG_SYSPLL_RST_DLY(x) (((x) & 0x3) << 12) -+#define RG_SYSPLL_LVROD_EN BIT(10) -+#define RG_SYSPLL_PREDIV(x) (((x) & 0x3) << 8) -+#define RG_SYSPLL_POSDIV(x) (((x) & 0x3) << 5) -+#define RG_SYSPLL_FBKSEL BIT(4) -+#define RT_SYSPLL_EN_AFE_OLT BIT(0) -+ -+#define CORE_PLL_GROUP4 0x403 -+#define RG_SYSPLL_DDSFBK_EN BIT(12) -+#define RG_SYSPLL_BIAS_EN BIT(11) -+#define RG_SYSPLL_BIAS_LPF_EN BIT(10) -+ -+#define CORE_PLL_GROUP5 0x404 -+#define RG_LCDDS_PCW_NCPO1(x) ((x) & 0xffff) -+ -+#define CORE_PLL_GROUP6 0x405 -+#define RG_LCDDS_PCW_NCPO0(x) ((x) & 0xffff) -+ -+#define CORE_PLL_GROUP7 0x406 -+#define RG_LCDDS_PWDB BIT(15) -+#define RG_LCDDS_ISO_EN BIT(13) -+#define RG_LCCDS_C(x) (((x) & 0x7) << 4) -+#define RG_LCDDS_PCW_NCPO_CHG BIT(3) -+ -+#define CORE_PLL_GROUP10 0x409 -+#define RG_LCDDS_SSC_DELTA(x) ((x) & 0xfff) -+ -+#define CORE_PLL_GROUP11 0x40a -+#define RG_LCDDS_SSC_DELTA1(x) ((x) & 0xfff) -+ -+#define CORE_GSWPLL_GRP1 0x40d -+#define RG_GSWPLL_PREDIV(x) (((x) & 0x3) << 14) -+#define RG_GSWPLL_POSDIV_200M(x) (((x) & 0x3) << 12) -+#define RG_GSWPLL_EN_PRE BIT(11) -+#define RG_GSWPLL_FBKSEL BIT(10) -+#define RG_GSWPLL_BP BIT(9) -+#define RG_GSWPLL_BR BIT(8) -+#define RG_GSWPLL_FBKDIV_200M(x) ((x) & 0xff) -+ -+#define CORE_GSWPLL_GRP2 0x40e -+#define RG_GSWPLL_POSDIV_500M(x) (((x) & 0x3) << 8) -+#define RG_GSWPLL_FBKDIV_500M(x) ((x) & 0xff) -+ -+#define CORE_TRGMII_GSW_CLK_CG 0x410 -+#define REG_GSWCK_EN BIT(0) -+#define REG_TRGMIICK_EN BIT(1) -+ -+#define MIB_DESC(_s, _o, _n) \ -+ { \ -+ .size = (_s), \ -+ .offset = (_o), \ -+ .name = (_n), \ -+ } -+ -+struct mt7530_mib_desc { -+ unsigned int size; -+ unsigned int offset; -+ const char *name; -+}; -+ -+struct mt7530_fdb { -+ u16 vid; -+ u8 port_mask; -+ u8 aging; -+ u8 mac[6]; -+ bool noarp; -+}; -+ -+struct mt7530_port { -+ bool enable; -+ u32 pm; -+}; -+ -+/* struct mt7530_priv - This is the main data structure for holding the state -+ * of the driver -+ * @dev: The device pointer -+ * @ds: The pointer to the dsa core structure -+ * @bus: The bus used for the device and built-in PHY -+ * @rstc: The pointer to reset control used by MCM -+ * @ethernet: The regmap used for access TRGMII-based registers -+ * @core_pwr: The power supplied into the core -+ * @io_pwr: The power supplied into the I/O -+ * @reset: The descriptor for GPIO line tied to its reset pin -+ * @mcm: Flag for distinguishing if standalone IC or module -+ * coupling -+ * @ports: Holding the state among ports -+ * @reg_mutex: The lock for protecting among process accessing -+ * registers -+ */ -+struct mt7530_priv { -+ struct device *dev; -+ struct dsa_switch *ds; -+ struct mii_bus *bus; -+ struct reset_control *rstc; -+ struct regmap *ethernet; -+ struct regulator *core_pwr; -+ struct regulator *io_pwr; -+ struct gpio_desc *reset; -+ bool mcm; -+ -+ struct mt7530_port ports[MT7530_NUM_PORTS]; -+ /* protect among processes for registers access*/ -+ struct mutex reg_mutex; -+}; -+ -+struct mt7530_hw_stats { -+ const char *string; -+ u16 reg; -+ u8 sizeof_stat; -+}; -+ -+#endif /* __MT7530_H */ diff --git a/target/linux/mediatek/patches-4.9/0031-net-dsa-dsa-api-compat.patch b/target/linux/mediatek/patches-4.9/0031-net-dsa-dsa-api-compat.patch deleted file mode 100644 index 9e52be845..000000000 --- a/target/linux/mediatek/patches-4.9/0031-net-dsa-dsa-api-compat.patch +++ /dev/null @@ -1,106 +0,0 @@ -From a319687ac18dcc557a88054282508e061ad8495f Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 14:42:19 +0200 -Subject: [PATCH 31/57] net: dsa: dsa api compat - -make the latest driver work on the old API - -Signed-off-by: John Crispin ---- - drivers/net/dsa/mt7530.c | 14 ++++++++------ - drivers/net/dsa/mt7530.h | 2 ++ - net/dsa/tag_mtk.c | 2 +- - 3 files changed, 11 insertions(+), 7 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -834,6 +834,7 @@ mt7530_port_bridge_join(struct dsa_switc - int i; - - mutex_lock(&priv->reg_mutex); -+ priv->bridge_dev[port] = bridge; - - for (i = 0; i < MT7530_NUM_PORTS; i++) { - /* Add this port to the port matrix of the other ports in the -@@ -841,7 +842,7 @@ mt7530_port_bridge_join(struct dsa_switc - * and not being setup until the port becomes enabled. - */ - if (ds->enabled_port_mask & BIT(i) && i != port) { -- if (ds->ports[i].bridge_dev != bridge) -+ if (priv->bridge_dev[i] != bridge) - continue; - if (priv->ports[i].enable) - mt7530_set(priv, MT7530_PCR_P(i), -@@ -864,8 +865,7 @@ mt7530_port_bridge_join(struct dsa_switc - } - - static void --mt7530_port_bridge_leave(struct dsa_switch *ds, int port, -- struct net_device *bridge) -+mt7530_port_bridge_leave(struct dsa_switch *ds, int port) - { - struct mt7530_priv *priv = ds->priv; - int i; -@@ -878,7 +878,7 @@ mt7530_port_bridge_leave(struct dsa_swit - * is kept and not being setup until the port becomes enabled. - */ - if (ds->enabled_port_mask & BIT(i) && i != port) { -- if (ds->ports[i].bridge_dev != bridge) -+ if (priv->bridge_dev[i] != priv->bridge_dev[port]) - continue; - if (priv->ports[i].enable) - mt7530_clear(priv, MT7530_PCR_P(i), -@@ -890,6 +890,7 @@ mt7530_port_bridge_leave(struct dsa_swit - /* Set the cpu port to be the only one in the port matrix of - * this port. - */ -+ priv->bridge_dev[port] = NULL; - if (priv->ports[port].enable) - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, - PCR_MATRIX(BIT(MT7530_CPU_PORT))); -@@ -1033,7 +1034,7 @@ mt7530_probe(struct mdio_device *mdiodev - if (!priv) - return -ENOMEM; - -- priv->ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS); -+ priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL); - if (!priv->ds) - return -ENOMEM; - -@@ -1076,12 +1077,13 @@ mt7530_probe(struct mdio_device *mdiodev - priv->bus = mdiodev->bus; - priv->dev = &mdiodev->dev; - priv->ds->priv = priv; -+ priv->ds->dev = &mdiodev->dev; - priv->ds->ops = &mt7530_switch_ops; - mutex_init(&priv->reg_mutex); - lpriv = priv; - dev_set_drvdata(&mdiodev->dev, priv); - -- return dsa_register_switch(priv->ds, &mdiodev->dev); -+ return dsa_register_switch(priv->ds, priv->ds->dev->of_node); - } - - static void ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -379,6 +379,8 @@ struct mt7530_priv { - struct mt7530_port ports[MT7530_NUM_PORTS]; - /* protect among processes for registers access*/ - struct mutex reg_mutex; -+ -+ struct net_device *bridge_dev[MT7530_NUM_PORTS]; - }; - - struct mt7530_hw_stats { ---- a/net/dsa/tag_mtk.c -+++ b/net/dsa/tag_mtk.c -@@ -35,7 +35,7 @@ static struct sk_buff *mtk_tag_xmit(stru - /* Build the tag after the MAC Source Address */ - mtk_tag = skb->data + 2 * ETH_ALEN; - mtk_tag[0] = 0; -- mtk_tag[1] = (1 << p->dp->index) & MTK_HDR_XMIT_DP_BIT_MASK; -+ mtk_tag[1] = (1 << p->port) & MTK_HDR_XMIT_DP_BIT_MASK; - mtk_tag[2] = 0; - mtk_tag[3] = 0; - diff --git a/target/linux/mediatek/patches-4.9/0033-net-dsa-add-multi-gmac-support.patch b/target/linux/mediatek/patches-4.9/0033-net-dsa-add-multi-gmac-support.patch deleted file mode 100644 index 8ff2bed8c..000000000 --- a/target/linux/mediatek/patches-4.9/0033-net-dsa-add-multi-gmac-support.patch +++ /dev/null @@ -1,272 +0,0 @@ -From cce5dd6034ed1651ee25c910edee708e6b84a44a Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 14:45:08 +0200 -Subject: [PATCH 33/57] net: dsa: add multi gmac support - -Signed-off-by: John Crispin ---- - drivers/net/dsa/mt7530.c | 10 +--------- - include/net/dsa.h | 21 ++++++++++++++++++++- - net/dsa/dsa2.c | 40 +++++++++++++++++++++++++++++++++------- - net/dsa/dsa_priv.h | 1 + - net/dsa/slave.c | 26 ++++++++++++++++---------- - 5 files changed, 71 insertions(+), 27 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -996,15 +996,7 @@ err: - static enum dsa_tag_protocol - mtk_get_tag_protocol(struct dsa_switch *ds) - { -- struct mt7530_priv *priv = ds->priv; -- -- if (!dsa_is_cpu_port(ds, MT7530_CPU_PORT)) { -- dev_warn(priv->dev, -- "port not matched with tagging CPU port\n"); -- return DSA_TAG_PROTO_NONE; -- } else { -- return DSA_TAG_PROTO_MTK; -- } -+ return DSA_TAG_PROTO_MTK; - } - - static struct dsa_switch_ops mt7530_switch_ops = { ---- a/include/net/dsa.h -+++ b/include/net/dsa.h -@@ -145,6 +145,8 @@ struct dsa_port { - struct device_node *dn; - unsigned int ageing_time; - u8 stp_state; -+ struct net_device *ethernet; -+ int upstream; - }; - - struct dsa_switch { -@@ -205,7 +207,7 @@ struct dsa_switch { - - static inline bool dsa_is_cpu_port(struct dsa_switch *ds, int p) - { -- return !!(ds->index == ds->dst->cpu_switch && p == ds->dst->cpu_port); -+ return !!(ds->cpu_port_mask & (1 << p)); - } - - static inline bool dsa_is_dsa_port(struct dsa_switch *ds, int p) -@@ -218,6 +220,11 @@ static inline bool dsa_is_port_initializ - return ds->enabled_port_mask & (1 << p) && ds->ports[p].netdev; - } - -+static inline bool dsa_is_upstream_port(struct dsa_switch *ds, int p) -+{ -+ return dsa_is_cpu_port(ds, p) || dsa_is_dsa_port(ds, p); -+} -+ - static inline u8 dsa_upstream_port(struct dsa_switch *ds) - { - struct dsa_switch_tree *dst = ds->dst; -@@ -234,6 +241,18 @@ static inline u8 dsa_upstream_port(struc - return ds->rtable[dst->cpu_switch]; - } - -+static inline u8 dsa_port_upstream_port(struct dsa_switch *ds, int port) -+{ -+ /* -+ * If this port has a specific upstream cpu port, use it, -+ * otherwise use the switch default. -+ */ -+ if (ds->ports[port].upstream) -+ return ds->ports[port].upstream; -+ else -+ return dsa_upstream_port(ds); -+} -+ - struct switchdev_trans; - struct switchdev_obj; - struct switchdev_obj_port_fdb; ---- a/net/dsa/dsa2.c -+++ b/net/dsa/dsa2.c -@@ -248,8 +248,6 @@ static int dsa_cpu_port_apply(struct dev - return err; - } - -- ds->cpu_port_mask |= BIT(index); -- - return 0; - } - -@@ -259,6 +257,10 @@ static void dsa_cpu_port_unapply(struct - dsa_cpu_dsa_destroy(port); - ds->cpu_port_mask &= ~BIT(index); - -+ if (ds->ports[index].ethernet) { -+ dev_put(ds->ports[index].ethernet); -+ ds->ports[index].ethernet = NULL; -+ } - } - - static int dsa_user_port_apply(struct device_node *port, u32 index, -@@ -479,6 +481,29 @@ static int dsa_cpu_parse(struct device_n - - dst->rcv = dst->tag_ops->rcv; - -+ dev_hold(ethernet_dev); -+ ds->ports[index].ethernet = ethernet_dev; -+ ds->cpu_port_mask |= BIT(index); -+ -+ return 0; -+} -+ -+static int dsa_user_parse(struct device_node *port, u32 index, -+ struct dsa_switch *ds) -+{ -+ struct device_node *cpu_port; -+ const unsigned int *cpu_port_reg; -+ int cpu_port_index; -+ -+ cpu_port = of_parse_phandle(port, "cpu", 0); -+ if (cpu_port) { -+ cpu_port_reg = of_get_property(cpu_port, "reg", NULL); -+ if (!cpu_port_reg) -+ return -EINVAL; -+ cpu_port_index = be32_to_cpup(cpu_port_reg); -+ ds->ports[index].upstream = cpu_port_index; -+ } -+ - return 0; - } - -@@ -486,18 +511,19 @@ static int dsa_ds_parse(struct dsa_switc - { - struct device_node *port; - u32 index; -- int err; -+ int err = 0; - - for (index = 0; index < DSA_MAX_PORTS; index++) { - port = ds->ports[index].dn; - if (!port) - continue; - -- if (dsa_port_is_cpu(port)) { -+ if (dsa_port_is_cpu(port)) - err = dsa_cpu_parse(port, index, dst, ds); -- if (err) -- return err; -- } -+ else if (!dsa_port_is_dsa(port)) -+ err = dsa_user_parse(port, index, ds); -+ if (err) -+ return err; - } - - pr_info("DSA: switch %d %d parsed\n", dst->tree, ds->index); ---- a/net/dsa/dsa_priv.h -+++ b/net/dsa/dsa_priv.h -@@ -43,6 +43,7 @@ struct dsa_slave_priv { - int old_duplex; - - struct net_device *bridge_dev; -+ struct net_device *master; - #ifdef CONFIG_NET_POLL_CONTROLLER - struct netpoll *netpoll; - #endif ---- a/net/dsa/slave.c -+++ b/net/dsa/slave.c -@@ -61,7 +61,7 @@ static int dsa_slave_get_iflink(const st - { - struct dsa_slave_priv *p = netdev_priv(dev); - -- return p->parent->dst->master_netdev->ifindex; -+ return p->master->ifindex; - } - - static inline bool dsa_port_is_bridged(struct dsa_slave_priv *p) -@@ -96,7 +96,7 @@ static void dsa_port_set_stp_state(struc - static int dsa_slave_open(struct net_device *dev) - { - struct dsa_slave_priv *p = netdev_priv(dev); -- struct net_device *master = p->parent->dst->master_netdev; -+ struct net_device *master = p->master; - struct dsa_switch *ds = p->parent; - u8 stp_state = dsa_port_is_bridged(p) ? - BR_STATE_BLOCKING : BR_STATE_FORWARDING; -@@ -151,7 +151,7 @@ out: - static int dsa_slave_close(struct net_device *dev) - { - struct dsa_slave_priv *p = netdev_priv(dev); -- struct net_device *master = p->parent->dst->master_netdev; -+ struct net_device *master = p->master; - struct dsa_switch *ds = p->parent; - - if (p->phy) -@@ -178,7 +178,7 @@ static int dsa_slave_close(struct net_de - static void dsa_slave_change_rx_flags(struct net_device *dev, int change) - { - struct dsa_slave_priv *p = netdev_priv(dev); -- struct net_device *master = p->parent->dst->master_netdev; -+ struct net_device *master = p->master; - - if (change & IFF_ALLMULTI) - dev_set_allmulti(master, dev->flags & IFF_ALLMULTI ? 1 : -1); -@@ -189,7 +189,7 @@ static void dsa_slave_change_rx_flags(st - static void dsa_slave_set_rx_mode(struct net_device *dev) - { - struct dsa_slave_priv *p = netdev_priv(dev); -- struct net_device *master = p->parent->dst->master_netdev; -+ struct net_device *master = p->master; - - dev_mc_sync(master, dev); - dev_uc_sync(master, dev); -@@ -198,7 +198,7 @@ static void dsa_slave_set_rx_mode(struct - static int dsa_slave_set_mac_address(struct net_device *dev, void *a) - { - struct dsa_slave_priv *p = netdev_priv(dev); -- struct net_device *master = p->parent->dst->master_netdev; -+ struct net_device *master = p->master; - struct sockaddr *addr = a; - int err; - -@@ -633,7 +633,7 @@ static netdev_tx_t dsa_slave_xmit(struct - /* Queue the SKB for transmission on the parent interface, but - * do not modify its EtherType - */ -- nskb->dev = p->parent->dst->master_netdev; -+ nskb->dev = p->master; - dev_queue_xmit(nskb); - - return NETDEV_TX_OK; -@@ -945,7 +945,7 @@ static int dsa_slave_netpoll_setup(struc - { - struct dsa_slave_priv *p = netdev_priv(dev); - struct dsa_switch *ds = p->parent; -- struct net_device *master = ds->dst->master_netdev; -+ struct net_device *master = p->master; - struct netpoll *netpoll; - int err = 0; - -@@ -1233,11 +1233,16 @@ int dsa_slave_create(struct dsa_switch * - struct net_device *master; - struct net_device *slave_dev; - struct dsa_slave_priv *p; -+ int port_cpu = ds->ports[port].upstream; - int ret; - -- master = ds->dst->master_netdev; -- if (ds->master_netdev) -+ if (port_cpu && ds->ports[port_cpu].ethernet) -+ master = ds->ports[port_cpu].ethernet; -+ else if (ds->master_netdev) - master = ds->master_netdev; -+ else -+ master = ds->dst->master_netdev; -+ master->dsa_ptr = (void *)ds->dst; - - slave_dev = alloc_netdev(sizeof(struct dsa_slave_priv), name, - NET_NAME_UNKNOWN, ether_setup); -@@ -1263,6 +1268,7 @@ int dsa_slave_create(struct dsa_switch * - p->parent = ds; - p->port = port; - p->xmit = dst->tag_ops->xmit; -+ p->master = master; - - p->old_pause = -1; - p->old_link = -1; diff --git a/target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch b/target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch deleted file mode 100644 index ae0614681..000000000 --- a/target/linux/mediatek/patches-4.9/0034-net-dsa-mediatek-add-dual-gmac-support.patch +++ /dev/null @@ -1,91 +0,0 @@ -From dcb751a52b2ee69c16db2fef8f92a96ab13b6bb4 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 14:45:34 +0200 -Subject: [PATCH 34/57] net: dsa: mediatek: add dual gmac support - -Signed-off-by: John Crispin ---- - drivers/net/dsa/mt7530.c | 22 ++++++++++++++++------ - 1 file changed, 16 insertions(+), 6 deletions(-) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -627,7 +627,7 @@ mt7530_setup(struct dsa_switch *ds) - - /* Enable Port 6 only; P5 as GMAC5 which currently is not supported */ - val = mt7530_read(priv, MT7530_MHWTRAP); -- val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; -+ val &= ~MHWTRAP_P5_DIS & ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS; - val |= MHWTRAP_MANUAL; - if (!dsa_is_cpu_port(ds, 5)) { - val |= MHWTRAP_P5_DIS; -@@ -735,6 +735,9 @@ static int - mt7530_cpu_port_enable(struct mt7530_priv *priv, - int port) - { -+ u8 port_mask = 0; -+ int i; -+ - /* Enable Mediatek header mode on the cpu port */ - mt7530_write(priv, MT7530_PVC_P(port), - PORT_SPEC_TAG); -@@ -751,8 +754,12 @@ mt7530_cpu_port_enable(struct mt7530_pri - /* CPU port gets connected to all user ports of - * the switch - */ -+ for (i = 0; i < MT7530_NUM_PORTS; i++) -+ if ((priv->ds->enabled_port_mask & BIT(i)) && -+ (dsa_port_upstream_port(priv->ds, i) == port)) -+ port_mask |= BIT(i); - mt7530_write(priv, MT7530_PCR_P(port), -- PCR_MATRIX(priv->ds->enabled_port_mask)); -+ PCR_MATRIX(port_mask)); - - return 0; - } -@@ -762,6 +769,7 @@ mt7530_port_enable(struct dsa_switch *ds - struct phy_device *phy) - { - struct mt7530_priv *priv = ds->priv; -+ u8 upstream = dsa_port_upstream_port(ds, port); - - mutex_lock(&priv->reg_mutex); - -@@ -772,7 +780,7 @@ mt7530_port_enable(struct dsa_switch *ds - * restore the port matrix if the port is the member of a certain - * bridge. - */ -- priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT)); -+ priv->ports[port].pm |= PCR_MATRIX(BIT(upstream)); - priv->ports[port].enable = true; - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, - priv->ports[port].pm); -@@ -835,7 +843,8 @@ mt7530_port_bridge_join(struct dsa_switc - struct net_device *bridge) - { - struct mt7530_priv *priv = ds->priv; -- u32 port_bitmap = BIT(MT7530_CPU_PORT); -+ u8 upstream = dsa_port_upstream_port(ds, port); -+ u32 port_bitmap = BIT(upstream); - int i; - - mutex_lock(&priv->reg_mutex); -@@ -873,6 +882,7 @@ static void - mt7530_port_bridge_leave(struct dsa_switch *ds, int port) - { - struct mt7530_priv *priv = ds->priv; -+ u8 upstream = dsa_port_upstream_port(ds, port); - int i; - - mutex_lock(&priv->reg_mutex); -@@ -898,8 +908,8 @@ mt7530_port_bridge_leave(struct dsa_swit - priv->bridge_dev[port] = NULL; - if (priv->ports[port].enable) - mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, -- PCR_MATRIX(BIT(MT7530_CPU_PORT))); -- priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT)); -+ PCR_MATRIX(BIT(upstream))); -+ priv->ports[port].pm = PCR_MATRIX(BIT(upstream)); - - mutex_unlock(&priv->reg_mutex); - } diff --git a/target/linux/mediatek/patches-4.9/0036-net-next-mediatek-fix-typos-inside-the-header-file.patch b/target/linux/mediatek/patches-4.9/0036-net-next-mediatek-fix-typos-inside-the-header-file.patch deleted file mode 100644 index e96374fdd..000000000 --- a/target/linux/mediatek/patches-4.9/0036-net-next-mediatek-fix-typos-inside-the-header-file.patch +++ /dev/null @@ -1,25 +0,0 @@ -From bf25fbdc7dfb256f267725336e29e232aadd5123 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 21 Jul 2017 08:43:58 +0200 -Subject: [PATCH 36/57] net-next: mediatek: fix typos inside the header file - -Trivial patch fixing 2 typos. - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -525,8 +525,8 @@ struct mtk_rx_ring { - * @pctl: The register map pointing at the range used to setup - * GMAC port drive/slew values - * @dma_refcnt: track how many netdevs are using the DMA engine -- * @tx_ring: Pointer to the memore holding info about the TX ring -- * @rx_ring: Pointer to the memore holding info about the RX ring -+ * @tx_ring: Pointer to the memory holding info about the TX ring -+ * @rx_ring: Pointer to the memory holding info about the RX ring - * @tx_napi: The TX NAPI struct - * @rx_napi: The RX NAPI struct - * @scratch_ring: Newer SoCs need memory for a second HW managed TX ring diff --git a/target/linux/mediatek/patches-4.9/0037-net-next-mediatek-bring-up-QDMA-RX-ring-0.patch b/target/linux/mediatek/patches-4.9/0037-net-next-mediatek-bring-up-QDMA-RX-ring-0.patch deleted file mode 100644 index 9d6a089c5..000000000 --- a/target/linux/mediatek/patches-4.9/0037-net-next-mediatek-bring-up-QDMA-RX-ring-0.patch +++ /dev/null @@ -1,128 +0,0 @@ -From 047a4e7b17322c1b32d8db32a0df9899cb4963a3 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 21 Jul 2017 08:48:38 +0200 -Subject: [PATCH 37/57] net-next: mediatek: bring up QDMA RX ring 0 - -This patch is in peparation for adding HW flow and QoS offloading. For -those features to work, the driver needs to bring up the first QDMA RX -ring. This ring is used by the PPE offloading HW. - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 38 ++++++++++++++++++++--------- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 3 +++ - 2 files changed, 30 insertions(+), 11 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1224,11 +1224,21 @@ static void mtk_tx_clean(struct mtk_eth - - static int mtk_rx_alloc(struct mtk_eth *eth, int ring_no, int rx_flag) - { -- struct mtk_rx_ring *ring = ð->rx_ring[ring_no]; -+ struct mtk_rx_ring *ring; - int rx_data_len, rx_dma_size; - int i; -+ u32 offset = 0; - -- if (rx_flag == MTK_RX_FLAGS_HWLRO) { -+ if (rx_flag & MTK_RX_FLAGS_QDMA) { -+ if (ring_no) -+ return -EINVAL; -+ ring = ð->rx_ring_qdma; -+ offset = 0x1000; -+ } else { -+ ring = ð->rx_ring[ring_no]; -+ } -+ -+ if (rx_flag & MTK_RX_FLAGS_HWLRO) { - rx_data_len = MTK_MAX_LRO_RX_LENGTH; - rx_dma_size = MTK_HW_LRO_DMA_SIZE; - } else { -@@ -1276,17 +1286,16 @@ static int mtk_rx_alloc(struct mtk_eth * - */ - wmb(); - -- mtk_w32(eth, ring->phys, MTK_PRX_BASE_PTR_CFG(ring_no)); -- mtk_w32(eth, rx_dma_size, MTK_PRX_MAX_CNT_CFG(ring_no)); -- mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); -- mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), MTK_PDMA_RST_IDX); -+ mtk_w32(eth, ring->phys, MTK_PRX_BASE_PTR_CFG(ring_no) + offset); -+ mtk_w32(eth, rx_dma_size, MTK_PRX_MAX_CNT_CFG(ring_no) + offset); -+ mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg + offset); -+ mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), MTK_PDMA_RST_IDX + offset); - - return 0; - } - --static void mtk_rx_clean(struct mtk_eth *eth, int ring_no) -+static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring) - { -- struct mtk_rx_ring *ring = ð->rx_ring[ring_no]; - int i; - - if (ring->data && ring->dma) { -@@ -1612,6 +1621,10 @@ static int mtk_dma_init(struct mtk_eth * - if (err) - return err; - -+ err = mtk_rx_alloc(eth, 0, MTK_RX_FLAGS_QDMA); -+ if (err) -+ return err; -+ - err = mtk_rx_alloc(eth, 0, MTK_RX_FLAGS_NORMAL); - if (err) - return err; -@@ -1651,12 +1664,13 @@ static void mtk_dma_free(struct mtk_eth - eth->phy_scratch_ring = 0; - } - mtk_tx_clean(eth); -- mtk_rx_clean(eth, 0); -+ mtk_rx_clean(eth, ð->rx_ring[0]); -+ mtk_rx_clean(eth, ð->rx_ring_qdma); - - if (eth->hwlro) { - mtk_hwlro_rx_uninit(eth); - for (i = 1; i < MTK_MAX_RX_RING_NUM; i++) -- mtk_rx_clean(eth, i); -+ mtk_rx_clean(eth, ð->rx_ring[i]); - } - - kfree(eth->scratch_head); -@@ -1723,7 +1737,9 @@ static int mtk_start_dma(struct mtk_eth - - mtk_w32(eth, - MTK_TX_WB_DDONE | MTK_TX_DMA_EN | -- MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO, -+ MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO | -+ MTK_RX_DMA_EN | MTK_RX_2B_OFFSET | -+ MTK_RX_BT_32DWORDS, - MTK_QDMA_GLO_CFG); - - mtk_w32(eth, ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -484,6 +484,7 @@ struct mtk_tx_ring { - enum mtk_rx_flags { - MTK_RX_FLAGS_NORMAL = 0, - MTK_RX_FLAGS_HWLRO, -+ MTK_RX_FLAGS_QDMA, - }; - - /* struct mtk_rx_ring - This struct holds info describing a RX ring -@@ -527,6 +528,7 @@ struct mtk_rx_ring { - * @dma_refcnt: track how many netdevs are using the DMA engine - * @tx_ring: Pointer to the memory holding info about the TX ring - * @rx_ring: Pointer to the memory holding info about the RX ring -+ * @rx_ring_qdma: Pointer to the memory holding info about the QDMA RX ring - * @tx_napi: The TX NAPI struct - * @rx_napi: The RX NAPI struct - * @scratch_ring: Newer SoCs need memory for a second HW managed TX ring -@@ -556,6 +558,7 @@ struct mtk_eth { - atomic_t dma_refcnt; - struct mtk_tx_ring tx_ring; - struct mtk_rx_ring rx_ring[MTK_MAX_RX_RING_NUM]; -+ struct mtk_rx_ring rx_ring_qdma; - struct napi_struct tx_napi; - struct napi_struct rx_napi; - struct mtk_tx_dma *scratch_ring; diff --git a/target/linux/mediatek/patches-4.9/0038-net-next-dsa-move-struct-dsa_device_ops-to-the-globa.patch b/target/linux/mediatek/patches-4.9/0038-net-next-dsa-move-struct-dsa_device_ops-to-the-globa.patch deleted file mode 100644 index cb1c1b9e9..000000000 --- a/target/linux/mediatek/patches-4.9/0038-net-next-dsa-move-struct-dsa_device_ops-to-the-globa.patch +++ /dev/null @@ -1,46 +0,0 @@ -From b58bf0220f666705e63fe8d361f37c913aee2d8f Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 21 Jul 2017 09:32:54 +0200 -Subject: [PATCH 38/57] net-next: dsa: move struct dsa_device_ops to the global - header file - -We need to access this struct from within the flow_dissector to fix -dissection for packets coming in on DSA devices. - -Signed-off-by: John Crispin ---- - include/net/dsa.h | 7 +++++++ - net/dsa/dsa_priv.h | 6 ------ - 2 files changed, 7 insertions(+), 6 deletions(-) - ---- a/include/net/dsa.h -+++ b/include/net/dsa.h -@@ -88,6 +88,13 @@ struct dsa_platform_data { - - struct packet_type; - -+struct dsa_device_ops { -+ struct sk_buff *(*xmit)(struct sk_buff *skb, struct net_device *dev); -+ int sk_buff *(*rcv)(struct sk_buff *skb, struct net_device *dev, -+ struct packet_type *pt, -+ struct net_device *orig_dev); -+}; -+ - struct dsa_switch_tree { - struct list_head list; - ---- a/net/dsa/dsa_priv.h -+++ b/net/dsa/dsa_priv.h -@@ -15,12 +15,6 @@ - #include - #include - --struct dsa_device_ops { -- struct sk_buff *(*xmit)(struct sk_buff *skb, struct net_device *dev); -- int (*rcv)(struct sk_buff *skb, struct net_device *dev, -- struct packet_type *pt, struct net_device *orig_dev); --}; -- - struct dsa_slave_priv { - struct sk_buff * (*xmit)(struct sk_buff *skb, - struct net_device *dev); diff --git a/target/linux/mediatek/patches-4.9/0039-net-next-dsa-add-flow_dissect-callback-to-struct-dsa.patch b/target/linux/mediatek/patches-4.9/0039-net-next-dsa-add-flow_dissect-callback-to-struct-dsa.patch deleted file mode 100644 index ebc52c83f..000000000 --- a/target/linux/mediatek/patches-4.9/0039-net-next-dsa-add-flow_dissect-callback-to-struct-dsa.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 22e8b65ea4bf8a1fa757137bdcbdefe505fa4044 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 7 Aug 2017 16:35:43 +0200 -Subject: [PATCH 39/57] net-next: dsa: add flow_dissect callback to struct - dsa_device_ops - -When the flow dissector first sees packets coming in on a DSA devices the -802.3 header wont be located where the code expects it to be as the tag -is still present. Adding this new callback allows a DSA device to provide a -new function that the flow_disscetor can use to get the correct offsets -for the protocol field and network header offset. - -Signed-off-by: John Crispin ---- - include/net/dsa.h | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/include/net/dsa.h -+++ b/include/net/dsa.h -@@ -90,9 +90,11 @@ struct packet_type; - - struct dsa_device_ops { - struct sk_buff *(*xmit)(struct sk_buff *skb, struct net_device *dev); -- int sk_buff *(*rcv)(struct sk_buff *skb, struct net_device *dev, -+ int (*rcv)(struct sk_buff *skb, struct net_device *dev, - struct packet_type *pt, - struct net_device *orig_dev); -+ int (*flow_dissect)(const struct sk_buff *skb, __be16 *proto, -+ int *offset); - }; - - struct dsa_switch_tree { diff --git a/target/linux/mediatek/patches-4.9/0040-net-next-tag_mtk-add-flow_dissect-callback-to-the-op.patch b/target/linux/mediatek/patches-4.9/0040-net-next-tag_mtk-add-flow_dissect-callback-to-the-op.patch deleted file mode 100644 index da98a2138..000000000 --- a/target/linux/mediatek/patches-4.9/0040-net-next-tag_mtk-add-flow_dissect-callback-to-the-op.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 9d6806e16e5ea68a49225da1ab065ef0b5d7704b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 7 Aug 2017 16:55:56 +0200 -Subject: [PATCH 40/57] net-next: tag_mtk: add flow_dissect callback to the ops - struct - -The MT7530 inserts the 4 magic header in between the 802.3 address and -protocol field. The patch implements the callback that can be called by -the flow dissector to figure out the real protocol and offset of the -network header. With this patch applied we can properly parse the packet -and thus make hashing function properly. - -Signed-off-by: John Crispin ---- - net/dsa/tag_mtk.c | 14 ++++++++++++-- - 1 file changed, 12 insertions(+), 2 deletions(-) - ---- a/net/dsa/tag_mtk.c -+++ b/net/dsa/tag_mtk.c -@@ -111,7 +111,17 @@ out: - return 0; - } - -+static int mtk_tag_flow_dissect(const struct sk_buff *skb, __be16 *proto, -+ int *offset) -+{ -+ *offset = 4; -+ *proto = ((__be16 *)skb->data)[1]; -+ -+ return 0; -+} -+ - const struct dsa_device_ops mtk_netdev_ops = { -- .xmit = mtk_tag_xmit, -- .rcv = mtk_tag_rcv, -+ .xmit = mtk_tag_xmit, -+ .rcv = mtk_tag_rcv, -+ .flow_dissect = mtk_tag_flow_dissect, - }; diff --git a/target/linux/mediatek/patches-4.9/0041-net-next-dsa-fix-flow-dissection.patch b/target/linux/mediatek/patches-4.9/0041-net-next-dsa-fix-flow-dissection.patch deleted file mode 100644 index 54359623e..000000000 --- a/target/linux/mediatek/patches-4.9/0041-net-next-dsa-fix-flow-dissection.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 04c825484d6ecdcc8ce09b350235c9077eaca6e3 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Wed, 9 Aug 2017 08:20:21 +0200 -Subject: [PATCH 41/57] net-next: dsa: fix flow dissection - -RPS and probably other kernel features are currently broken on some if not -all DSA devices. The root cause of this is that skb_hash will call the -flow_dissector. At this point the skb still contains the magic switch -header and the skb->protocol field is not set up to the correct 802.3 -value yet. By the time the tag specific code is called, removing the header -and =roperly setting the protocol an invalid hash is already set. In the -case of the mt7530 this will result in all flows always having the same -hash. - -This patch makes the flow dissector honour the nh and protocol offset -defined by the dsa tag driver thus fixing dissection, hashing and RPS. - -Signed-off-by: John Crispin ---- - net/core/flow_dissector.c | 14 +++++++++++++- - 1 file changed, 13 insertions(+), 1 deletion(-) - ---- a/net/core/flow_dissector.c -+++ b/net/core/flow_dissector.c -@@ -4,6 +4,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -123,13 +124,23 @@ bool __skb_flow_dissect(const struct sk_ - bool skip_vlan = false; - u8 ip_proto = 0; - bool ret; -- - if (!data) { - data = skb->data; - proto = skb_vlan_tag_present(skb) ? - skb->vlan_proto : skb->protocol; - nhoff = skb_network_offset(skb); - hlen = skb_headlen(skb); -+ if (unlikely(netdev_uses_dsa(skb->dev))) { -+ const struct dsa_device_ops *ops; -+ int offset; -+ -+ ops = skb->dev->dsa_ptr->tag_ops; -+ if (ops->flow_dissect && -+ !ops->flow_dissect(skb, &proto, &offset)) { -+ hlen -= offset; -+ nhoff += offset; -+ } -+ } - } - - /* It is ensured by skb_flow_dissector_init() that control key will -@@ -162,6 +173,7 @@ again: - case htons(ETH_P_IP): { - const struct iphdr *iph; - struct iphdr _iph; -+ - ip: - iph = __skb_header_pointer(skb, nhoff, sizeof(_iph), data, hlen, &_iph); - if (!iph || iph->ihl < 5) diff --git a/target/linux/mediatek/patches-4.9/0046-net-mediatek-add-irq-delay.patch b/target/linux/mediatek/patches-4.9/0046-net-mediatek-add-irq-delay.patch deleted file mode 100644 index 47c3980a6..000000000 --- a/target/linux/mediatek/patches-4.9/0046-net-mediatek-add-irq-delay.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 6e081074df96bf3762c2e6438c383f11a56b0a7e Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 15:58:04 +0200 -Subject: [PATCH 46/57] net: mediatek: add irq delay - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 ++++++- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +++++++- - 2 files changed, 13 insertions(+), 2 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1904,8 +1904,13 @@ static int mtk_hw_init(struct mtk_eth *e - mtk_w32(eth, 0, MTK_CDMP_EG_CTRL); - - /* disable delay and normal interrupt */ -- mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); -+#ifdef MTK_IRQ_DLY -+ mtk_w32(eth, 0x84048404, MTK_PDMA_DELAY_INT); -+ mtk_w32(eth, 0x84048404, MTK_QDMA_DELAY_INT); -+#else - mtk_w32(eth, 0, MTK_PDMA_DELAY_INT); -+ mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); -+#endif - mtk_irq_disable(eth, MTK_QDMA_INT_MASK, ~0); - mtk_irq_disable(eth, MTK_PDMA_INT_MASK, ~0); - mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -12,6 +12,8 @@ - * Copyright (C) 2013-2016 Michael Lee - */ - -+#define MTK_IRQ_DLY -+ - #ifndef MTK_ETH_H - #define MTK_ETH_H - -@@ -220,11 +222,15 @@ - #define MTK_TX_DONE_INT2 BIT(2) - #define MTK_TX_DONE_INT1 BIT(1) - #define MTK_TX_DONE_INT0 BIT(0) -+#ifdef MTK_IRQ_DLY -+#define MTK_RX_DONE_INT BIT(30) -+#define MTK_TX_DONE_INT BIT(28) -+#else - #define MTK_RX_DONE_INT (MTK_RX_DONE_INT0 | MTK_RX_DONE_INT1 | \ - MTK_RX_DONE_INT2 | MTK_RX_DONE_INT3) - #define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \ - MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3) -- -+#endif - /* QDMA Interrupt grouping registers */ - #define MTK_QDMA_INT_GRP1 0x1a20 - #define MTK_QDMA_INT_GRP2 0x1a24 diff --git a/target/linux/mediatek/patches-4.9/0047-net-next-mediatek-split-IRQ-register-locking-into-TX.patch b/target/linux/mediatek/patches-4.9/0047-net-next-mediatek-split-IRQ-register-locking-into-TX.patch deleted file mode 100644 index 27a78a63b..000000000 --- a/target/linux/mediatek/patches-4.9/0047-net-next-mediatek-split-IRQ-register-locking-into-TX.patch +++ /dev/null @@ -1,208 +0,0 @@ -From 5afceece38fa30e3c71e7ed9ac62aa70ba8cfbb1 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Fri, 16 Jun 2017 10:00:30 +0200 -Subject: [PATCH 47/57] net-next: mediatek: split IRQ register locking into TX - and RX - -Originally the driver only utilized the new QDMA engine. The current code -still assumes this is the case when locking the IRQ mask register. Since -RX now runs on the old style PDMA engine we can add a second lock. This -patch reduces the IRQ latency as the TX and RX path no longer need to wait -on each other under heavy load. - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 79 ++++++++++++++++++----------- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 5 +- - 2 files changed, 54 insertions(+), 30 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -372,28 +372,48 @@ static void mtk_mdio_cleanup(struct mtk_ - mdiobus_unregister(eth->mii_bus); - } - --static inline void mtk_irq_disable(struct mtk_eth *eth, -- unsigned reg, u32 mask) -+static inline void mtk_tx_irq_disable(struct mtk_eth *eth, u32 mask) - { - unsigned long flags; - u32 val; - -- spin_lock_irqsave(ð->irq_lock, flags); -- val = mtk_r32(eth, reg); -- mtk_w32(eth, val & ~mask, reg); -- spin_unlock_irqrestore(ð->irq_lock, flags); -+ spin_lock_irqsave(ð->tx_irq_lock, flags); -+ val = mtk_r32(eth, MTK_QDMA_INT_MASK); -+ mtk_w32(eth, val & ~mask, MTK_QDMA_INT_MASK); -+ spin_unlock_irqrestore(ð->tx_irq_lock, flags); - } - --static inline void mtk_irq_enable(struct mtk_eth *eth, -- unsigned reg, u32 mask) -+static inline void mtk_tx_irq_enable(struct mtk_eth *eth, u32 mask) - { - unsigned long flags; - u32 val; - -- spin_lock_irqsave(ð->irq_lock, flags); -- val = mtk_r32(eth, reg); -- mtk_w32(eth, val | mask, reg); -- spin_unlock_irqrestore(ð->irq_lock, flags); -+ spin_lock_irqsave(ð->tx_irq_lock, flags); -+ val = mtk_r32(eth, MTK_QDMA_INT_MASK); -+ mtk_w32(eth, val | mask, MTK_QDMA_INT_MASK); -+ spin_unlock_irqrestore(ð->tx_irq_lock, flags); -+} -+ -+static inline void mtk_rx_irq_disable(struct mtk_eth *eth, u32 mask) -+{ -+ unsigned long flags; -+ u32 val; -+ -+ spin_lock_irqsave(ð->rx_irq_lock, flags); -+ val = mtk_r32(eth, MTK_PDMA_INT_MASK); -+ mtk_w32(eth, val & ~mask, MTK_PDMA_INT_MASK); -+ spin_unlock_irqrestore(ð->rx_irq_lock, flags); -+} -+ -+static inline void mtk_rx_irq_enable(struct mtk_eth *eth, u32 mask) -+{ -+ unsigned long flags; -+ u32 val; -+ -+ spin_lock_irqsave(ð->rx_irq_lock, flags); -+ val = mtk_r32(eth, MTK_PDMA_INT_MASK); -+ mtk_w32(eth, val | mask, MTK_PDMA_INT_MASK); -+ spin_unlock_irqrestore(ð->rx_irq_lock, flags); - } - - static int mtk_set_mac_address(struct net_device *dev, void *p) -@@ -1116,7 +1136,7 @@ static int mtk_napi_tx(struct napi_struc - return budget; - - napi_complete(napi); -- mtk_irq_enable(eth, MTK_QDMA_INT_MASK, MTK_TX_DONE_INT); -+ mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); - - return tx_done; - } -@@ -1150,7 +1170,7 @@ poll_again: - goto poll_again; - } - napi_complete(napi); -- mtk_irq_enable(eth, MTK_PDMA_INT_MASK, MTK_RX_DONE_INT); -+ mtk_rx_irq_enable(eth, MTK_RX_DONE_INT); - - return rx_done + budget - remain_budget; - } -@@ -1699,7 +1719,7 @@ static irqreturn_t mtk_handle_irq_rx(int - - if (likely(napi_schedule_prep(ð->rx_napi))) { - __napi_schedule(ð->rx_napi); -- mtk_irq_disable(eth, MTK_PDMA_INT_MASK, MTK_RX_DONE_INT); -+ mtk_rx_irq_disable(eth, MTK_RX_DONE_INT); - } - - return IRQ_HANDLED; -@@ -1711,7 +1731,7 @@ static irqreturn_t mtk_handle_irq_tx(int - - if (likely(napi_schedule_prep(ð->tx_napi))) { - __napi_schedule(ð->tx_napi); -- mtk_irq_disable(eth, MTK_QDMA_INT_MASK, MTK_TX_DONE_INT); -+ mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); - } - - return IRQ_HANDLED; -@@ -1723,11 +1743,11 @@ static void mtk_poll_controller(struct n - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - -- mtk_irq_disable(eth, MTK_QDMA_INT_MASK, MTK_TX_DONE_INT); -- mtk_irq_disable(eth, MTK_PDMA_INT_MASK, MTK_RX_DONE_INT); -+ mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); -+ mtk_rx_irq_disable(eth, MTK_RX_DONE_INT); - mtk_handle_irq_rx(eth->irq[2], dev); -- mtk_irq_enable(eth, MTK_QDMA_INT_MASK, MTK_TX_DONE_INT); -- mtk_irq_enable(eth, MTK_PDMA_INT_MASK, MTK_RX_DONE_INT); -+ mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); -+ mtk_rx_irq_enable(eth, MTK_RX_DONE_INT); - } - #endif - -@@ -1770,8 +1790,8 @@ static int mtk_open(struct net_device *d - - napi_enable(ð->tx_napi); - napi_enable(ð->rx_napi); -- mtk_irq_enable(eth, MTK_QDMA_INT_MASK, MTK_TX_DONE_INT); -- mtk_irq_enable(eth, MTK_PDMA_INT_MASK, MTK_RX_DONE_INT); -+ mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); -+ mtk_rx_irq_enable(eth, MTK_RX_DONE_INT); - } - atomic_inc(ð->dma_refcnt); - -@@ -1816,8 +1836,8 @@ static int mtk_stop(struct net_device *d - if (!atomic_dec_and_test(ð->dma_refcnt)) - return 0; - -- mtk_irq_disable(eth, MTK_QDMA_INT_MASK, MTK_TX_DONE_INT); -- mtk_irq_disable(eth, MTK_PDMA_INT_MASK, MTK_RX_DONE_INT); -+ mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); -+ mtk_rx_irq_disable(eth, MTK_RX_DONE_INT); - napi_disable(ð->tx_napi); - napi_disable(ð->rx_napi); - -@@ -1911,8 +1931,8 @@ static int mtk_hw_init(struct mtk_eth *e - mtk_w32(eth, 0, MTK_PDMA_DELAY_INT); - mtk_w32(eth, 0, MTK_QDMA_DELAY_INT); - #endif -- mtk_irq_disable(eth, MTK_QDMA_INT_MASK, ~0); -- mtk_irq_disable(eth, MTK_PDMA_INT_MASK, ~0); -+ mtk_tx_irq_disable(eth, ~0); -+ mtk_rx_irq_disable(eth, ~0); - mtk_w32(eth, RST_GL_PSE, MTK_RST_GL); - mtk_w32(eth, 0, MTK_RST_GL); - -@@ -1983,8 +2003,8 @@ static void mtk_uninit(struct net_device - phy_disconnect(dev->phydev); - if (of_phy_is_fixed_link(mac->of_node)) - of_phy_deregister_fixed_link(mac->of_node); -- mtk_irq_disable(eth, MTK_QDMA_INT_MASK, ~0); -- mtk_irq_disable(eth, MTK_PDMA_INT_MASK, ~0); -+ mtk_tx_irq_disable(eth, ~0); -+ mtk_rx_irq_disable(eth, ~0); - } - - static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -@@ -2442,7 +2462,8 @@ static int mtk_probe(struct platform_dev - return PTR_ERR(eth->base); - - spin_lock_init(ð->page_lock); -- spin_lock_init(ð->irq_lock); -+ spin_lock_init(ð->tx_irq_lock); -+ spin_lock_init(ð->rx_irq_lock); - - eth->ethsys = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, - "mediatek,ethsys"); ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -526,6 +526,8 @@ struct mtk_rx_ring { - * @dev: The device pointer - * @base: The mapped register i/o base - * @page_lock: Make sure that register operations are atomic -+ * @tx_irq__lock: Make sure that IRQ register operations are atomic -+ * @rx_irq__lock: Make sure that IRQ register operations are atomic - * @dummy_dev: we run 2 netdevs on 1 physical DMA ring and need a - * dummy for NAPI to work - * @netdev: The netdev instances -@@ -555,7 +557,8 @@ struct mtk_eth { - struct device *dev; - void __iomem *base; - spinlock_t page_lock; -- spinlock_t irq_lock; -+ spinlock_t tx_irq_lock; -+ spinlock_t rx_irq_lock; - struct net_device dummy_dev; - struct net_device *netdev[MTK_MAX_DEVS]; - struct mtk_mac *mac[MTK_MAX_DEVS]; diff --git a/target/linux/mediatek/patches-4.9/0049-net-mediatek-add-rx-queue.patch b/target/linux/mediatek/patches-4.9/0049-net-mediatek-add-rx-queue.patch deleted file mode 100644 index 0146a9dd5..000000000 --- a/target/linux/mediatek/patches-4.9/0049-net-mediatek-add-rx-queue.patch +++ /dev/null @@ -1,20 +0,0 @@ -From 066b30a76a0d13cbd2c0d463f9a1e87efc352679 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 15:58:46 +0200 -Subject: [PATCH 49/57] net: mediatek: add rx queue - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1009,6 +1009,7 @@ static int mtk_poll_rx(struct napi_struc - RX_DMA_VID(trxd.rxd3)) - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), - RX_DMA_VID(trxd.rxd3)); -+ skb_record_rx_queue(skb, 0); - napi_gro_receive(napi, skb); - - ring->data[idx] = new_data; diff --git a/target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch b/target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch deleted file mode 100644 index 3d7df70bb..000000000 --- a/target/linux/mediatek/patches-4.9/0050-net-mediatek-add-trgmii-clock.patch +++ /dev/null @@ -1,21 +0,0 @@ -From 67c4af99af02d86b627a8cde2e99cc4c9699d2ce Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 15:59:08 +0200 -Subject: [PATCH 50/57] net: mediatek: add trgmii clock - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1873,6 +1873,8 @@ static int mtk_hw_init(struct mtk_eth *e - pm_runtime_enable(eth->dev); - pm_runtime_get_sync(eth->dev); - -+ clk_set_rate(eth->clks[MTK_CLK_TRGPLL], 250000000); -+ - clk_prepare_enable(eth->clks[MTK_CLK_ETHIF]); - clk_prepare_enable(eth->clks[MTK_CLK_ESW]); - clk_prepare_enable(eth->clks[MTK_CLK_GP1]); diff --git a/target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch b/target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch deleted file mode 100644 index a41bcb026..000000000 --- a/target/linux/mediatek/patches-4.9/0053-net-dsa-mediatek-add-software-phy-polling.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 53eec2c3580e63fdebfc25ae324f30cd8aa4403b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 16:00:46 +0200 -Subject: [PATCH 53/57] net: dsa: mediatek: add software phy polling - -Signed-off-by: John Crispin ---- - drivers/net/dsa/mt7530.c | 38 ++++++++++++++++++++++++++++++++++++++ - drivers/net/dsa/mt7530.h | 1 + - 2 files changed, 39 insertions(+) - ---- a/drivers/net/dsa/mt7530.c -+++ b/drivers/net/dsa/mt7530.c -@@ -728,6 +728,44 @@ static void mt7530_adjust_link(struct ds - * all finished. - */ - mt7623_pad_clk_setup(ds); -+ } else { -+ u16 lcl_adv = 0, rmt_adv = 0; -+ u8 flowctrl; -+ u32 mcr = PMCR_USERP_LINK | PMCR_FORCE_MODE; -+ -+ switch (phydev->speed) { -+ case SPEED_1000: -+ mcr |= PMCR_FORCE_SPEED_1000; -+ break; -+ case SPEED_100: -+ mcr |= PMCR_FORCE_SPEED_100; -+ break; -+ }; -+ -+ if (phydev->link) -+ mcr |= PMCR_FORCE_LNK; -+ -+ if (phydev->duplex) { -+ mcr |= PMCR_FORCE_FDX; -+ -+ if (phydev->pause) -+ rmt_adv = LPA_PAUSE_CAP; -+ if (phydev->asym_pause) -+ rmt_adv |= LPA_PAUSE_ASYM; -+ -+ if (phydev->advertising & ADVERTISED_Pause) -+ lcl_adv |= ADVERTISE_PAUSE_CAP; -+ if (phydev->advertising & ADVERTISED_Asym_Pause) -+ lcl_adv |= ADVERTISE_PAUSE_ASYM; -+ -+ flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv); -+ -+ if (flowctrl & FLOW_CTRL_TX) -+ mcr |= PMCR_TX_FC_EN; -+ if (flowctrl & FLOW_CTRL_RX) -+ mcr |= PMCR_RX_FC_EN; -+ } -+ mt7530_write(priv, MT7530_PMCR_P(port), mcr); - } - } - ---- a/drivers/net/dsa/mt7530.h -+++ b/drivers/net/dsa/mt7530.h -@@ -155,6 +155,7 @@ enum mt7530_stp_state { - #define PMCR_TX_FC_EN BIT(5) - #define PMCR_RX_FC_EN BIT(4) - #define PMCR_FORCE_SPEED_1000 BIT(3) -+#define PMCR_FORCE_SPEED_100 BIT(2) - #define PMCR_FORCE_FDX BIT(1) - #define PMCR_FORCE_LNK BIT(0) - #define PMCR_COMMON_LINK (PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \ diff --git a/target/linux/mediatek/patches-4.9/0054-net-ethernet-mediatek-fixed-deadlock-captured-by-loc.patch b/target/linux/mediatek/patches-4.9/0054-net-ethernet-mediatek-fixed-deadlock-captured-by-loc.patch deleted file mode 100644 index 29005316e..000000000 --- a/target/linux/mediatek/patches-4.9/0054-net-ethernet-mediatek-fixed-deadlock-captured-by-loc.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 746bf1c3e561aba396cd40e6540245646461117d Mon Sep 17 00:00:00 2001 -From: Sean Wang -Date: Tue, 4 Jul 2017 11:17:36 +0800 -Subject: [PATCH 54/57] net: ethernet: mediatek: fixed deadlock captured by - lockdep - -Lockdep found an inconsistent lock state when mtk_get_stats64 is called -in user context while NAPI updates MAC statistics in softirq. - -Use spin_trylock_bh/spin_unlock_bh fix following lockdep warning. - -[ 81.321030] WARNING: inconsistent lock state -[ 81.325266] 4.12.0-rc1-00035-gd9dda65 #32 Not tainted -[ 81.330273] -------------------------------- -[ 81.334505] inconsistent {SOFTIRQ-ON-W} -> {IN-SOFTIRQ-W} usage. -[ 81.340464] ksoftirqd/0/7 [HC0[0]:SC1[1]:HE1:SE0] takes: -[ 81.345731] (&syncp->seq#2){+.?...}, at: [] mtk_handle_status_irq.part.6+0x70/0x84 -[ 81.354219] {SOFTIRQ-ON-W} state was registered at: -[ 81.359062] lock_acquire+0xfc/0x2b0 -[ 81.362696] mtk_stats_update_mac+0x60/0x2c0 -[ 81.367017] mtk_get_stats64+0x17c/0x18c -[ 81.370995] dev_get_stats+0x48/0xbc -[ 81.374628] rtnl_fill_stats+0x48/0x128 -[ 81.378520] rtnl_fill_ifinfo+0x4ac/0xd1c -[ 81.382584] rtmsg_ifinfo_build_skb+0x7c/0xe0 -[ 81.386991] rtmsg_ifinfo.part.5+0x24/0x54 -[ 81.391139] rtmsg_ifinfo+0x24/0x28 -[ 81.394685] __dev_notify_flags+0xa4/0xac -[ 81.398749] dev_change_flags+0x50/0x58 -[ 81.402640] devinet_ioctl+0x768/0x85c -[ 81.406444] inet_ioctl+0x1a4/0x1d0 -[ 81.409990] sock_ioctl+0x16c/0x33c -[ 81.413538] do_vfs_ioctl+0xb4/0xa34 -[ 81.417169] SyS_ioctl+0x44/0x6c -[ 81.420458] ret_fast_syscall+0x0/0x1c -[ 81.424260] irq event stamp: 3354692 -[ 81.427806] hardirqs last enabled at (3354692): [] net_rx_action+0xc0/0x504 -[ 81.435660] hardirqs last disabled at (3354691): [] net_rx_action+0x8c/0x504 -[ 81.443515] softirqs last enabled at (3354106): [] __do_softirq+0x4b4/0x614 -[ 81.451370] softirqs last disabled at (3354109): [] run_ksoftirqd+0x44/0x80 -[ 81.459134] -[ 81.459134] other info that might help us debug this: -[ 81.465608] Possible unsafe locking scenario: -[ 81.465608] -[ 81.471478] CPU0 -[ 81.473900] ---- -[ 81.476321] lock(&syncp->seq#2); -[ 81.479701] -[ 81.482294] lock(&syncp->seq#2); -[ 81.485847] -[ 81.485847] *** DEADLOCK *** -[ 81.485847] -[ 81.491720] 1 lock held by ksoftirqd/0/7: -[ 81.495693] #0: (&(&mac->hw_stats->stats_lock)->rlock){+.+...}, at: [] mtk_handle_status_irq.part.6+0x48/0x84 -[ 81.506579] -[ 81.506579] stack backtrace: -[ 81.510904] CPU: 0 PID: 7 Comm: ksoftirqd/0 Not tainted 4.12.0-rc1-00035-gd9dda65 #32 -[ 81.518668] Hardware name: Mediatek Cortex-A7 (Device Tree) -[ 81.524208] [] (unwind_backtrace) from [] (show_stack+0x20/0x24) -[ 81.531899] [] (show_stack) from [] (dump_stack+0xb4/0xe0) -[ 81.539072] [] (dump_stack) from [] (print_usage_bug+0x234/0x2e0) -[ 81.546846] [] (print_usage_bug) from [] (mark_lock+0x63c/0x7bc) -[ 81.554532] [] (mark_lock) from [] (__lock_acquire+0x654/0x1bfc) -[ 81.562217] [] (__lock_acquire) from [] (lock_acquire+0xfc/0x2b0) -[ 81.569990] [] (lock_acquire) from [] (mtk_stats_update_mac+0x60/0x2c0) -[ 81.578283] [] (mtk_stats_update_mac) from [] (mtk_handle_status_irq.part.6+0x70/0x84) -[ 81.587865] [] (mtk_handle_status_irq.part.6) from [] (mtk_napi_tx+0x358/0x37c) -[ 81.596845] [] (mtk_napi_tx) from [] (net_rx_action+0x244/0x504) -[ 81.604533] [] (net_rx_action) from [] (__do_softirq+0x134/0x614) -[ 81.612306] [] (__do_softirq) from [] (run_ksoftirqd+0x44/0x80) -[ 81.619907] [] (run_ksoftirqd) from [] (smpboot_thread_fn+0x14c/0x25c) -[ 81.628110] [] (smpboot_thread_fn) from [] (kthread+0x150/0x180) -[ 81.635798] [] (kthread) from [] (ret_from_fork+0x14/0x24) - -Signed-off-by: Sean Wang ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -493,9 +493,9 @@ static struct rtnl_link_stats64 * mtk_ge - unsigned int start; - - if (netif_running(dev) && netif_device_present(dev)) { -- if (spin_trylock(&hw_stats->stats_lock)) { -+ if (spin_trylock_bh(&hw_stats->stats_lock)) { - mtk_stats_update_mac(mac); -- spin_unlock(&hw_stats->stats_lock); -+ spin_unlock_bh(&hw_stats->stats_lock); - } - } - -@@ -2229,9 +2229,9 @@ static void mtk_get_ethtool_stats(struct - return; - - if (netif_running(dev) && netif_device_present(dev)) { -- if (spin_trylock(&hwstats->stats_lock)) { -+ if (spin_trylock_bh(&hwstats->stats_lock)) { - mtk_stats_update_mac(mac); -- spin_unlock(&hwstats->stats_lock); -+ spin_unlock_bh(&hwstats->stats_lock); - } - } - diff --git a/target/linux/mediatek/patches-4.9/0055-net-ethernet-mediatek-avoid-potential-invalid-memory.patch b/target/linux/mediatek/patches-4.9/0055-net-ethernet-mediatek-avoid-potential-invalid-memory.patch deleted file mode 100644 index 6598e8208..000000000 --- a/target/linux/mediatek/patches-4.9/0055-net-ethernet-mediatek-avoid-potential-invalid-memory.patch +++ /dev/null @@ -1,31 +0,0 @@ -From a3360b3543b9fb833ba691019e396e72293a313f Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 16:31:45 +0200 -Subject: [PATCH 55/57] net: ethernet: mediatek: avoid potential invalid memory - access - -Potential dangerous invalid memory might be accessed if invalid mac value -reflected from the forward port field in rxd4 caused by possible potential -hardware defects. So added a simple sanity checker to avoid the kind of -situation happening. - -Signed-off-by: Sean Wang -Acked-by: John Crispin -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -964,6 +964,10 @@ static int mtk_poll_rx(struct napi_struc - mac--; - } - -+ if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT || -+ !eth->netdev[mac])) -+ goto release_desc; -+ - netdev = eth->netdev[mac]; - - if (unlikely(test_bit(MTK_RESETTING, ð->state))) diff --git a/target/linux/mediatek/patches-4.9/0056-net-mediatek-add-hw-nat-support.patch b/target/linux/mediatek/patches-4.9/0056-net-mediatek-add-hw-nat-support.patch deleted file mode 100644 index d1d6ed473..000000000 --- a/target/linux/mediatek/patches-4.9/0056-net-mediatek-add-hw-nat-support.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 043efc0e619e04661be2b1889382db2fdd378145 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 16:34:36 +0200 -Subject: [PATCH 56/57] net: mediatek: add hw nat support - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/Kconfig | 7 +++++++ - drivers/net/ethernet/mediatek/Makefile | 1 + - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 13 +++++++++++++ - net/netfilter/nf_conntrack_proto_tcp.c | 19 +++++++++++++++++++ - 4 files changed, 40 insertions(+) - ---- a/drivers/net/ethernet/mediatek/Kconfig -+++ b/drivers/net/ethernet/mediatek/Kconfig -@@ -14,4 +14,11 @@ config NET_MEDIATEK_SOC - This driver supports the gigabit ethernet MACs in the - MediaTek MT2701/MT7623 chipset family. - -+config NET_MEDIATEK_HNAT -+ tristate "MediaTek MT7623 hardware NAT support" -+ depends on NET_MEDIATEK_SOC && NF_CONNTRACK && NF_CONNTRACK_IPV4 && IP_NF_NAT && IP_NF_TARGET_MASQUERADE -+ ---help--- -+ This driver supports the hardwaer NAT in the -+ MediaTek MT2701/MT7623 chipset family. -+ - endif #NET_VENDOR_MEDIATEK ---- a/drivers/net/ethernet/mediatek/Makefile -+++ b/drivers/net/ethernet/mediatek/Makefile -@@ -3,3 +3,4 @@ - # - - obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth_soc.o -+obj-$(CONFIG_NET_MEDIATEK_HNAT) += mtk_hnat/ ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -23,6 +23,10 @@ - #include - #include - -+#if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE) -+#include "mtk_hnat/nf_hnat_mtk.h" -+#endif -+ - #include "mtk_eth_soc.h" - - static int mtk_msg_level = -1; -@@ -649,6 +653,11 @@ static int mtk_tx_map(struct sk_buff *sk - return -ENOMEM; - - /* set the forward port */ -+#if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE) -+ if (HNAT_SKB_CB2(skb)->magic == 0x78681415) -+ fport |= 0x4 << TX_DMA_FPORT_SHIFT; -+ else -+#endif - fport = (mac->id + 1) << TX_DMA_FPORT_SHIFT; - txd4 |= fport; - -@@ -1013,6 +1022,10 @@ static int mtk_poll_rx(struct napi_struc - RX_DMA_VID(trxd.rxd3)) - __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), - RX_DMA_VID(trxd.rxd3)); -+#if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE) -+ *(u32 *)(skb->head) = trxd.rxd4; -+ skb_hnat_alg(skb) = 0; -+#endif - skb_record_rx_queue(skb, 0); - napi_gro_receive(napi, skb); - ---- a/net/netfilter/nf_conntrack_proto_tcp.c -+++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -19,6 +20,7 @@ - #include - #include - -+#include - #include - - #include -@@ -53,6 +55,11 @@ static int nf_ct_tcp_max_retrans __read_ - /* FIXME: Examine ipfilter's timeouts and conntrack transitions more - closely. They're more complex. --RR */ - -+#ifndef IPV4_DEVCONF_DFLT -+ #define IPV4_DEVCONF_DFLT(net, attr) \ -+ IPV4_DEVCONF((*net->ipv4.devconf_dflt), attr) -+#endif -+ - static const char *const tcp_conntrack_names[] = { - "NONE", - "SYN_SENT", -@@ -519,6 +526,18 @@ static bool tcp_in_window(const struct n - if (nf_ct_tcp_no_window_check) - return true; - -+ if (net) { -+ if ((net->ipv4.devconf_all && net->ipv4.devconf_dflt && net->ipv6.devconf_all) && -+ net->ipv6.devconf_dflt) { -+ if ((IPV4_DEVCONF_DFLT(net, FORWARDING) || -+ IPV4_DEVCONF_ALL(net, FORWARDING)) || -+ (net->ipv6.devconf_all->forwarding || -+ net->ipv6.devconf_dflt->forwarding)) { -+ return true; -+ } -+ } -+ } -+ - /* - * Get the required data from the packet. - */ diff --git a/target/linux/mediatek/patches-4.9/0057-net-mediatek-add-HW-QoS-support.patch b/target/linux/mediatek/patches-4.9/0057-net-mediatek-add-HW-QoS-support.patch deleted file mode 100644 index f6284583a..000000000 --- a/target/linux/mediatek/patches-4.9/0057-net-mediatek-add-HW-QoS-support.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 660c13dfbacbf37f090a66a2b14f0c5ce7cbec81 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Thu, 10 Aug 2017 16:38:27 +0200 -Subject: [PATCH 57/57] net: mediatek: add HW QoS support - -Signed-off-by: John Crispin ---- - drivers/net/ethernet/mediatek/Kconfig | 7 ++++ - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 60 ++++++++++++++++++++++++++++- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +- - 3 files changed, 66 insertions(+), 3 deletions(-) - ---- a/drivers/net/ethernet/mediatek/Kconfig -+++ b/drivers/net/ethernet/mediatek/Kconfig -@@ -21,4 +21,11 @@ config NET_MEDIATEK_HNAT - This driver supports the hardwaer NAT in the - MediaTek MT2701/MT7623 chipset family. - -+config NET_MEDIATEK_HW_QOS -+ tristate "MediaTek MT7623 hardware QoS support" -+ depends on NET_MEDIATEK_SOC -+ ---help--- -+ This driver supports the hardware QoS in the -+ MediaTek MT2701/MT7623 chipset family. -+ - endif #NET_VENDOR_MEDIATEK ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -23,6 +23,17 @@ - #include - #include - -+#if defined(CONFIG_NET_MEDIATEK_HW_QOS) -+struct mtk_ioctl_reg { -+ unsigned int off; -+ unsigned int val; -+}; -+ -+#define REG_HQOS_MAX 0x3FFF -+#define RAETH_QDMA_REG_READ 0x89F8 -+#define RAETH_QDMA_REG_WRITE 0x89F9 -+#endif -+ - #if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE) - #include "mtk_hnat/nf_hnat_mtk.h" - #endif -@@ -646,7 +657,7 @@ static int mtk_tx_map(struct sk_buff *sk - dma_addr_t mapped_addr; - unsigned int nr_frags; - int i, n_desc = 1; -- u32 txd4 = 0, fport; -+ u32 txd3 = 0, txd4 = 0, fport; - - itxd = ring->next_free; - if (itxd == ring->last_free) -@@ -675,6 +686,12 @@ static int mtk_tx_map(struct sk_buff *sk - // if (skb_vlan_tag_present(skb)) - // txd4 |= TX_DMA_INS_VLAN | skb_vlan_tag_get(skb); - -+#ifdef CONFIG_NET_MEDIATEK_HW_QOS -+ txd3 |= skb->mark & 0x7; -+ if (mac->id) -+ txd3 += 8; -+#endif -+ - mapped_addr = dma_map_single(eth->dev, skb->data, - skb_headlen(skb), DMA_TO_DEVICE); - if (unlikely(dma_mapping_error(eth->dev, mapped_addr))) -@@ -718,7 +735,8 @@ static int mtk_tx_map(struct sk_buff *sk - WRITE_ONCE(txd->txd1, mapped_addr); - WRITE_ONCE(txd->txd3, (TX_DMA_SWC | - TX_DMA_PLEN0(frag_map_size) | -- last_frag * TX_DMA_LS0)); -+ last_frag * TX_DMA_LS0 | -+ txd3)); - WRITE_ONCE(txd->txd4, fport); - - tx_buf = mtk_desc_to_tx_buf(ring, txd); -@@ -2029,7 +2047,31 @@ static void mtk_uninit(struct net_device - - static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) - { -+#if defined(CONFIG_NET_MEDIATEK_HW_QOS) -+ struct mtk_mac *mac = netdev_priv(dev); -+ struct mtk_eth *eth = mac->hw; -+ struct mtk_ioctl_reg reg; -+#endif -+ - switch (cmd) { -+#if defined(CONFIG_NET_MEDIATEK_HW_QOS) -+ case RAETH_QDMA_REG_READ: -+ copy_from_user(®, ifr->ifr_data, sizeof(reg)); -+ if (reg.off > REG_HQOS_MAX) -+ return -EINVAL; -+ reg.val = mtk_r32(eth, 0x1800 + reg.off); -+// printk("read reg off:%x val:%x\n", reg.off, reg.val); -+ copy_to_user(ifr->ifr_data, ®, sizeof(reg)); -+ return 0; -+ -+ case RAETH_QDMA_REG_WRITE: -+ copy_from_user(®, ifr->ifr_data, sizeof(reg)); -+ if (reg.off > REG_HQOS_MAX) -+ return -EINVAL; -+ mtk_w32(eth, reg.val, 0x1800 + reg.off); -+// printk("write reg off:%x val:%x\n", reg.off, reg.val); -+ return 0; -+#endif - case SIOCGMIIPHY: - case SIOCGMIIREG: - case SIOCSMIIREG: ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -20,7 +20,7 @@ - #define MTK_QDMA_PAGE_SIZE 2048 - #define MTK_MAX_RX_LENGTH 1536 - #define MTK_TX_DMA_BUF_LEN 0x3fff --#define MTK_DMA_SIZE 256 -+#define MTK_DMA_SIZE 2048 - #define MTK_NAPI_WEIGHT 64 - #define MTK_MAC_COUNT 2 - #define MTK_RX_ETH_HLEN (VLAN_ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN) diff --git a/target/linux/mediatek/patches-4.9/0058-pinctrl-update.patch b/target/linux/mediatek/patches-4.9/0058-pinctrl-update.patch deleted file mode 100644 index 3174b805e..000000000 --- a/target/linux/mediatek/patches-4.9/0058-pinctrl-update.patch +++ /dev/null @@ -1,470 +0,0 @@ ---- a/drivers/pinctrl/mediatek/Kconfig -+++ b/drivers/pinctrl/mediatek/Kconfig -@@ -15,12 +15,6 @@ config PINCTRL_MT2701 - default MACH_MT2701 - select PINCTRL_MTK - --config PINCTRL_MT7623 -- bool "Mediatek MT7623 pin control" if COMPILE_TEST && !MACH_MT7623 -- depends on OF -- default MACH_MT7623 -- select PINCTRL_MTK_COMMON -- - config PINCTRL_MT8135 - bool "Mediatek MT8135 pin control" if COMPILE_TEST && !MACH_MT8135 - depends on OF ---- a/drivers/pinctrl/mediatek/Makefile -+++ b/drivers/pinctrl/mediatek/Makefile -@@ -3,7 +3,6 @@ obj-y += pinctrl-mtk-common.o - - # SoC Drivers - obj-$(CONFIG_PINCTRL_MT2701) += pinctrl-mt2701.o --obj-$(CONFIG_PINCTRL_MT7623) += pinctrl-mt7623.o - obj-$(CONFIG_PINCTRL_MT8135) += pinctrl-mt8135.o - obj-$(CONFIG_PINCTRL_MT8127) += pinctrl-mt8127.o - obj-$(CONFIG_PINCTRL_MT8173) += pinctrl-mt8173.o ---- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c -+++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c -@@ -565,6 +565,7 @@ static int mt2701_pinctrl_probe(struct p - - static const struct of_device_id mt2701_pctrl_match[] = { - { .compatible = "mediatek,mt2701-pinctrl", }, -+ { .compatible = "mediatek,mt7623-pinctrl", }, - {} - }; - MODULE_DEVICE_TABLE(of, mt2701_pctrl_match); ---- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c -+++ /dev/null -@@ -1,379 +0,0 @@ --/* -- * Copyright (c) 2016 John Crispin -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- * -- * This program is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- */ -- --#include --#include --#include --#include --#include --#include --#include -- --#include "pinctrl-mtk-common.h" --#include "pinctrl-mtk-mt7623.h" -- --static const struct mtk_drv_group_desc mt7623_drv_grp[] = { -- /* 0E4E8SR 4/8/12/16 */ -- MTK_DRV_GRP(4, 16, 1, 2, 4), -- /* 0E2E4SR 2/4/6/8 */ -- MTK_DRV_GRP(2, 8, 1, 2, 2), -- /* E8E4E2 2/4/6/8/10/12/14/16 */ -- MTK_DRV_GRP(2, 16, 0, 2, 2) --}; -- --#define DRV_SEL0 0xf50 --#define DRV_SEL1 0xf60 --#define DRV_SEL2 0xf70 --#define DRV_SEL3 0xf80 --#define DRV_SEL4 0xf90 --#define DRV_SEL5 0xfa0 --#define DRV_SEL6 0xfb0 --#define DRV_SEL7 0xfe0 --#define DRV_SEL8 0xfd0 --#define DRV_SEL9 0xff0 --#define DRV_SEL10 0xf00 -- --#define MSDC0_CTRL0 0xcc0 --#define MSDC0_CTRL1 0xcd0 --#define MSDC0_CTRL2 0xce0 --#define MSDC0_CTRL3 0xcf0 --#define MSDC0_CTRL4 0xd00 --#define MSDC0_CTRL5 0xd10 --#define MSDC0_CTRL6 0xd20 --#define MSDC1_CTRL0 0xd30 --#define MSDC1_CTRL1 0xd40 --#define MSDC1_CTRL2 0xd50 --#define MSDC1_CTRL3 0xd60 --#define MSDC1_CTRL4 0xd70 --#define MSDC1_CTRL5 0xd80 --#define MSDC1_CTRL6 0xd90 -- --#define IES_EN0 0xb20 --#define IES_EN1 0xb30 --#define IES_EN2 0xb40 -- --#define SMT_EN0 0xb50 --#define SMT_EN1 0xb60 --#define SMT_EN2 0xb70 -- --static const struct mtk_pin_drv_grp mt7623_pin_drv[] = { -- MTK_PIN_DRV_GRP(0, DRV_SEL0, 0, 1), -- MTK_PIN_DRV_GRP(1, DRV_SEL0, 0, 1), -- MTK_PIN_DRV_GRP(2, DRV_SEL0, 0, 1), -- MTK_PIN_DRV_GRP(3, DRV_SEL0, 0, 1), -- MTK_PIN_DRV_GRP(4, DRV_SEL0, 0, 1), -- MTK_PIN_DRV_GRP(5, DRV_SEL0, 0, 1), -- MTK_PIN_DRV_GRP(6, DRV_SEL0, 0, 1), -- MTK_PIN_DRV_GRP(7, DRV_SEL0, 4, 1), -- MTK_PIN_DRV_GRP(8, DRV_SEL0, 4, 1), -- MTK_PIN_DRV_GRP(9, DRV_SEL0, 4, 1), -- MTK_PIN_DRV_GRP(10, DRV_SEL0, 8, 1), -- MTK_PIN_DRV_GRP(11, DRV_SEL0, 8, 1), -- MTK_PIN_DRV_GRP(12, DRV_SEL0, 8, 1), -- MTK_PIN_DRV_GRP(13, DRV_SEL0, 8, 1), -- MTK_PIN_DRV_GRP(14, DRV_SEL0, 12, 0), -- MTK_PIN_DRV_GRP(15, DRV_SEL0, 12, 0), -- MTK_PIN_DRV_GRP(18, DRV_SEL1, 4, 0), -- MTK_PIN_DRV_GRP(19, DRV_SEL1, 4, 0), -- MTK_PIN_DRV_GRP(20, DRV_SEL1, 4, 0), -- MTK_PIN_DRV_GRP(21, DRV_SEL1, 4, 0), -- MTK_PIN_DRV_GRP(22, DRV_SEL1, 8, 0), -- MTK_PIN_DRV_GRP(23, DRV_SEL1, 8, 0), -- MTK_PIN_DRV_GRP(24, DRV_SEL1, 8, 0), -- MTK_PIN_DRV_GRP(25, DRV_SEL1, 8, 0), -- MTK_PIN_DRV_GRP(26, DRV_SEL1, 8, 0), -- MTK_PIN_DRV_GRP(27, DRV_SEL1, 12, 0), -- MTK_PIN_DRV_GRP(28, DRV_SEL1, 12, 0), -- MTK_PIN_DRV_GRP(29, DRV_SEL1, 12, 0), -- MTK_PIN_DRV_GRP(33, DRV_SEL2, 0, 0), -- MTK_PIN_DRV_GRP(34, DRV_SEL2, 0, 0), -- MTK_PIN_DRV_GRP(35, DRV_SEL2, 0, 0), -- MTK_PIN_DRV_GRP(36, DRV_SEL2, 0, 0), -- MTK_PIN_DRV_GRP(37, DRV_SEL2, 0, 0), -- MTK_PIN_DRV_GRP(39, DRV_SEL2, 8, 1), -- MTK_PIN_DRV_GRP(40, DRV_SEL2, 8, 1), -- MTK_PIN_DRV_GRP(41, DRV_SEL2, 8, 1), -- MTK_PIN_DRV_GRP(42, DRV_SEL2, 8, 1), -- MTK_PIN_DRV_GRP(43, DRV_SEL2, 12, 0), -- MTK_PIN_DRV_GRP(44, DRV_SEL2, 12, 0), -- MTK_PIN_DRV_GRP(45, DRV_SEL2, 12, 0), -- MTK_PIN_DRV_GRP(47, DRV_SEL3, 0, 0), -- MTK_PIN_DRV_GRP(48, DRV_SEL3, 0, 0), -- MTK_PIN_DRV_GRP(49, DRV_SEL3, 4, 0), -- MTK_PIN_DRV_GRP(53, DRV_SEL3, 12, 0), -- MTK_PIN_DRV_GRP(54, DRV_SEL3, 12, 0), -- MTK_PIN_DRV_GRP(55, DRV_SEL3, 12, 0), -- MTK_PIN_DRV_GRP(56, DRV_SEL3, 12, 0), -- MTK_PIN_DRV_GRP(60, DRV_SEL4, 8, 1), -- MTK_PIN_DRV_GRP(61, DRV_SEL4, 8, 1), -- MTK_PIN_DRV_GRP(62, DRV_SEL4, 8, 1), -- MTK_PIN_DRV_GRP(63, DRV_SEL4, 12, 1), -- MTK_PIN_DRV_GRP(64, DRV_SEL4, 12, 1), -- MTK_PIN_DRV_GRP(65, DRV_SEL4, 12, 1), -- MTK_PIN_DRV_GRP(66, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(67, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(68, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(69, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(70, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(71, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(72, DRV_SEL3, 4, 0), -- MTK_PIN_DRV_GRP(73, DRV_SEL3, 4, 0), -- MTK_PIN_DRV_GRP(74, DRV_SEL3, 4, 0), -- MTK_PIN_DRV_GRP(83, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(84, DRV_SEL5, 0, 1), -- MTK_PIN_DRV_GRP(105, MSDC1_CTRL1, 0, 1), -- MTK_PIN_DRV_GRP(106, MSDC1_CTRL0, 0, 1), -- MTK_PIN_DRV_GRP(107, MSDC1_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(108, MSDC1_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(109, MSDC1_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(110, MSDC1_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(111, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(112, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(113, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(114, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(115, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(116, MSDC0_CTRL1, 0, 1), -- MTK_PIN_DRV_GRP(117, MSDC0_CTRL0, 0, 1), -- MTK_PIN_DRV_GRP(118, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(119, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(120, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(121, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(126, DRV_SEL3, 4, 0), -- MTK_PIN_DRV_GRP(199, DRV_SEL0, 4, 1), -- MTK_PIN_DRV_GRP(200, DRV_SEL8, 0, 0), -- MTK_PIN_DRV_GRP(201, DRV_SEL8, 0, 0), -- MTK_PIN_DRV_GRP(203, DRV_SEL8, 4, 0), -- MTK_PIN_DRV_GRP(204, DRV_SEL8, 4, 0), -- MTK_PIN_DRV_GRP(205, DRV_SEL8, 4, 0), -- MTK_PIN_DRV_GRP(206, DRV_SEL8, 4, 0), -- MTK_PIN_DRV_GRP(207, DRV_SEL8, 4, 0), -- MTK_PIN_DRV_GRP(208, DRV_SEL8, 8, 0), -- MTK_PIN_DRV_GRP(209, DRV_SEL8, 8, 0), -- MTK_PIN_DRV_GRP(236, DRV_SEL9, 4, 0), -- MTK_PIN_DRV_GRP(237, DRV_SEL9, 4, 0), -- MTK_PIN_DRV_GRP(238, DRV_SEL9, 4, 0), -- MTK_PIN_DRV_GRP(239, DRV_SEL9, 4, 0), -- MTK_PIN_DRV_GRP(240, DRV_SEL9, 4, 0), -- MTK_PIN_DRV_GRP(241, DRV_SEL9, 4, 0), -- MTK_PIN_DRV_GRP(242, DRV_SEL9, 8, 0), -- MTK_PIN_DRV_GRP(243, DRV_SEL9, 8, 0), -- MTK_PIN_DRV_GRP(257, MSDC0_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(261, MSDC1_CTRL2, 0, 1), -- MTK_PIN_DRV_GRP(262, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(263, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(264, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(265, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(266, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(267, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(268, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(269, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(270, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(271, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(272, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(274, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(275, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(276, DRV_SEL10, 8, 0), -- MTK_PIN_DRV_GRP(278, DRV_SEL2, 8, 1), --}; -- --static const struct mtk_pin_spec_pupd_set_samereg mt7623_spec_pupd[] = { -- MTK_PIN_PUPD_SPEC_SR(105, MSDC1_CTRL1, 8, 9, 10), -- MTK_PIN_PUPD_SPEC_SR(106, MSDC1_CTRL0, 8, 9, 10), -- MTK_PIN_PUPD_SPEC_SR(107, MSDC1_CTRL3, 0, 1, 2), -- MTK_PIN_PUPD_SPEC_SR(108, MSDC1_CTRL3, 4, 5, 6), -- MTK_PIN_PUPD_SPEC_SR(109, MSDC1_CTRL3, 8, 9, 10), -- MTK_PIN_PUPD_SPEC_SR(110, MSDC1_CTRL3, 12, 13, 14), -- MTK_PIN_PUPD_SPEC_SR(111, MSDC0_CTRL4, 12, 13, 14), -- MTK_PIN_PUPD_SPEC_SR(112, MSDC0_CTRL4, 8, 9, 10), -- MTK_PIN_PUPD_SPEC_SR(113, MSDC0_CTRL4, 4, 5, 6), -- MTK_PIN_PUPD_SPEC_SR(114, MSDC0_CTRL4, 0, 1, 2), -- MTK_PIN_PUPD_SPEC_SR(115, MSDC0_CTRL5, 0, 1, 2), -- MTK_PIN_PUPD_SPEC_SR(116, MSDC0_CTRL1, 8, 9, 10), -- MTK_PIN_PUPD_SPEC_SR(117, MSDC0_CTRL0, 8, 9, 10), -- MTK_PIN_PUPD_SPEC_SR(118, MSDC0_CTRL3, 12, 13, 14), -- MTK_PIN_PUPD_SPEC_SR(119, MSDC0_CTRL3, 8, 9, 10), -- MTK_PIN_PUPD_SPEC_SR(120, MSDC0_CTRL3, 4, 5, 6), -- MTK_PIN_PUPD_SPEC_SR(121, MSDC0_CTRL3, 0, 1, 2), --}; -- --static int mt7623_spec_pull_set(struct regmap *regmap, unsigned int pin, -- unsigned char align, bool isup, unsigned int r1r0) --{ -- return mtk_pctrl_spec_pull_set_samereg(regmap, mt7623_spec_pupd, -- ARRAY_SIZE(mt7623_spec_pupd), pin, align, isup, r1r0); --} -- --static const struct mtk_pin_ies_smt_set mt7623_ies_set[] = { -- MTK_PIN_IES_SMT_SPEC(0, 6, IES_EN0, 0), -- MTK_PIN_IES_SMT_SPEC(7, 9, IES_EN0, 1), -- MTK_PIN_IES_SMT_SPEC(10, 13, IES_EN0, 2), -- MTK_PIN_IES_SMT_SPEC(14, 15, IES_EN0, 3), -- MTK_PIN_IES_SMT_SPEC(18, 21, IES_EN0, 5), -- MTK_PIN_IES_SMT_SPEC(22, 26, IES_EN0, 6), -- MTK_PIN_IES_SMT_SPEC(27, 29, IES_EN0, 7), -- MTK_PIN_IES_SMT_SPEC(33, 37, IES_EN0, 8), -- MTK_PIN_IES_SMT_SPEC(39, 42, IES_EN0, 9), -- MTK_PIN_IES_SMT_SPEC(43, 45, IES_EN0, 10), -- MTK_PIN_IES_SMT_SPEC(47, 48, IES_EN0, 11), -- MTK_PIN_IES_SMT_SPEC(49, 49, IES_EN0, 12), -- MTK_PIN_IES_SMT_SPEC(53, 56, IES_EN0, 14), -- MTK_PIN_IES_SMT_SPEC(60, 62, IES_EN1, 0), -- MTK_PIN_IES_SMT_SPEC(63, 65, IES_EN1, 1), -- MTK_PIN_IES_SMT_SPEC(66, 71, IES_EN1, 2), -- MTK_PIN_IES_SMT_SPEC(72, 74, IES_EN0, 12), -- MTK_PIN_IES_SMT_SPEC(75, 76, IES_EN1, 3), -- MTK_PIN_IES_SMT_SPEC(83, 84, IES_EN1, 2), -- MTK_PIN_IES_SMT_SPEC(105, 121, MSDC1_CTRL1, 4), -- MTK_PIN_IES_SMT_SPEC(122, 125, IES_EN1, 7), -- MTK_PIN_IES_SMT_SPEC(126, 126, IES_EN0, 12), -- MTK_PIN_IES_SMT_SPEC(199, 201, IES_EN0, 1), -- MTK_PIN_IES_SMT_SPEC(203, 207, IES_EN2, 2), -- MTK_PIN_IES_SMT_SPEC(208, 209, IES_EN2, 3), -- MTK_PIN_IES_SMT_SPEC(236, 241, IES_EN2, 6), -- MTK_PIN_IES_SMT_SPEC(242, 243, IES_EN2, 7), -- MTK_PIN_IES_SMT_SPEC(261, 261, MSDC1_CTRL2, 4), -- MTK_PIN_IES_SMT_SPEC(262, 272, IES_EN2, 12), -- MTK_PIN_IES_SMT_SPEC(274, 276, IES_EN2, 12), -- MTK_PIN_IES_SMT_SPEC(278, 278, IES_EN2, 13), --}; -- --static const struct mtk_pin_ies_smt_set mt7623_smt_set[] = { -- MTK_PIN_IES_SMT_SPEC(0, 6, SMT_EN0, 0), -- MTK_PIN_IES_SMT_SPEC(7, 9, SMT_EN0, 1), -- MTK_PIN_IES_SMT_SPEC(10, 13, SMT_EN0, 2), -- MTK_PIN_IES_SMT_SPEC(14, 15, SMT_EN0, 3), -- MTK_PIN_IES_SMT_SPEC(18, 21, SMT_EN0, 5), -- MTK_PIN_IES_SMT_SPEC(22, 26, SMT_EN0, 6), -- MTK_PIN_IES_SMT_SPEC(27, 29, SMT_EN0, 7), -- MTK_PIN_IES_SMT_SPEC(33, 37, SMT_EN0, 8), -- MTK_PIN_IES_SMT_SPEC(39, 42, SMT_EN0, 9), -- MTK_PIN_IES_SMT_SPEC(43, 45, SMT_EN0, 10), -- MTK_PIN_IES_SMT_SPEC(47, 48, SMT_EN0, 11), -- MTK_PIN_IES_SMT_SPEC(49, 49, SMT_EN0, 12), -- MTK_PIN_IES_SMT_SPEC(53, 56, SMT_EN0, 14), -- MTK_PIN_IES_SMT_SPEC(60, 62, SMT_EN1, 0), -- MTK_PIN_IES_SMT_SPEC(63, 65, SMT_EN1, 1), -- MTK_PIN_IES_SMT_SPEC(66, 71, SMT_EN1, 2), -- MTK_PIN_IES_SMT_SPEC(72, 74, SMT_EN0, 12), -- MTK_PIN_IES_SMT_SPEC(75, 76, SMT_EN1, 3), -- MTK_PIN_IES_SMT_SPEC(83, 84, SMT_EN1, 2), -- MTK_PIN_IES_SMT_SPEC(105, 106, MSDC1_CTRL1, 11), -- MTK_PIN_IES_SMT_SPEC(107, 107, MSDC1_CTRL3, 3), -- MTK_PIN_IES_SMT_SPEC(108, 108, MSDC1_CTRL3, 7), -- MTK_PIN_IES_SMT_SPEC(109, 109, MSDC1_CTRL3, 11), -- MTK_PIN_IES_SMT_SPEC(110, 111, MSDC1_CTRL3, 15), -- MTK_PIN_IES_SMT_SPEC(112, 112, MSDC0_CTRL4, 11), -- MTK_PIN_IES_SMT_SPEC(113, 113, MSDC0_CTRL4, 7), -- MTK_PIN_IES_SMT_SPEC(114, 115, MSDC0_CTRL4, 3), -- MTK_PIN_IES_SMT_SPEC(116, 117, MSDC0_CTRL1, 11), -- MTK_PIN_IES_SMT_SPEC(118, 118, MSDC0_CTRL3, 15), -- MTK_PIN_IES_SMT_SPEC(119, 119, MSDC0_CTRL3, 11), -- MTK_PIN_IES_SMT_SPEC(120, 120, MSDC0_CTRL3, 7), -- MTK_PIN_IES_SMT_SPEC(121, 121, MSDC0_CTRL3, 3), -- MTK_PIN_IES_SMT_SPEC(122, 125, SMT_EN1, 7), -- MTK_PIN_IES_SMT_SPEC(126, 126, SMT_EN0, 12), -- MTK_PIN_IES_SMT_SPEC(199, 201, SMT_EN0, 1), -- MTK_PIN_IES_SMT_SPEC(203, 207, SMT_EN2, 2), -- MTK_PIN_IES_SMT_SPEC(208, 209, SMT_EN2, 3), -- MTK_PIN_IES_SMT_SPEC(236, 241, SMT_EN2, 6), -- MTK_PIN_IES_SMT_SPEC(242, 243, SMT_EN2, 7), -- MTK_PIN_IES_SMT_SPEC(261, 261, MSDC1_CTRL6, 3), -- MTK_PIN_IES_SMT_SPEC(262, 272, SMT_EN2, 12), -- MTK_PIN_IES_SMT_SPEC(274, 276, SMT_EN2, 12), -- MTK_PIN_IES_SMT_SPEC(278, 278, SMT_EN2, 13), --}; -- --static int mt7623_ies_smt_set(struct regmap *regmap, unsigned int pin, -- unsigned char align, int value, enum pin_config_param arg) --{ -- if (arg == PIN_CONFIG_INPUT_ENABLE) -- return mtk_pconf_spec_set_ies_smt_range(regmap, mt7623_ies_set, -- ARRAY_SIZE(mt7623_ies_set), pin, align, value); -- else if (arg == PIN_CONFIG_INPUT_SCHMITT_ENABLE) -- return mtk_pconf_spec_set_ies_smt_range(regmap, mt7623_smt_set, -- ARRAY_SIZE(mt7623_smt_set), pin, align, value); -- return -EINVAL; --} -- --static const struct mtk_pinctrl_devdata mt7623_pinctrl_data = { -- .pins = mtk_pins_mt7623, -- .npins = ARRAY_SIZE(mtk_pins_mt7623), -- .grp_desc = mt7623_drv_grp, -- .n_grp_cls = ARRAY_SIZE(mt7623_drv_grp), -- .pin_drv_grp = mt7623_pin_drv, -- .n_pin_drv_grps = ARRAY_SIZE(mt7623_pin_drv), -- .spec_pull_set = mt7623_spec_pull_set, -- .spec_ies_smt_set = mt7623_ies_smt_set, -- .dir_offset = 0x0000, -- .pullen_offset = 0x0150, -- .pullsel_offset = 0x0280, -- .dout_offset = 0x0500, -- .din_offset = 0x0630, -- .pinmux_offset = 0x0760, -- .type1_start = 280, -- .type1_end = 280, -- .port_shf = 4, -- .port_mask = 0x1f, -- .port_align = 4, -- .eint_offsets = { -- .name = "mt7623_eint", -- .stat = 0x000, -- .ack = 0x040, -- .mask = 0x080, -- .mask_set = 0x0c0, -- .mask_clr = 0x100, -- .sens = 0x140, -- .sens_set = 0x180, -- .sens_clr = 0x1c0, -- .soft = 0x200, -- .soft_set = 0x240, -- .soft_clr = 0x280, -- .pol = 0x300, -- .pol_set = 0x340, -- .pol_clr = 0x380, -- .dom_en = 0x400, -- .dbnc_ctrl = 0x500, -- .dbnc_set = 0x600, -- .dbnc_clr = 0x700, -- .port_mask = 6, -- .ports = 6, -- }, -- .ap_num = 169, -- .db_cnt = 16, --}; -- --static int mt7623_pinctrl_probe(struct platform_device *pdev) --{ -- return mtk_pctrl_init(pdev, &mt7623_pinctrl_data, NULL); --} -- --static const struct of_device_id mt7623_pctrl_match[] = { -- { .compatible = "mediatek,mt7623-pinctrl", }, -- {} --}; --MODULE_DEVICE_TABLE(of, mt7623_pctrl_match); -- --static struct platform_driver mtk_pinctrl_driver = { -- .probe = mt7623_pinctrl_probe, -- .driver = { -- .name = "mediatek-mt7623-pinctrl", -- .of_match_table = mt7623_pctrl_match, -- }, --}; -- --static int __init mtk_pinctrl_init(void) --{ -- return platform_driver_register(&mtk_pinctrl_driver); --} -- --arch_initcall(mtk_pinctrl_init); ---- a/include/dt-bindings/pinctrl/mt7623-pinfunc.h -+++ b/include/dt-bindings/pinctrl/mt7623-pinfunc.h -@@ -185,6 +185,12 @@ - #define MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MO (MTK_PIN_NO(56) | 1) - #define MT7623_PIN_56_SPI0_MO_FUNC_SPI0_MI (MTK_PIN_NO(56) | 2) - -+#define MT7623_PIN_57_SDA1_FUNC_GPIO57 (MTK_PIN_NO(57) | 0) -+#define MT7623_PIN_57_SDA1_FUNC_SDA1 (MTK_PIN_NO(57) | 1) -+ -+#define MT7623_PIN_58_SCL1_FUNC_GPIO58 (MTK_PIN_NO(58) | 0) -+#define MT7623_PIN_58_SCL1_FUNC_SCL1 (MTK_PIN_NO(58) | 1) -+ - #define MT7623_PIN_60_WB_RSTB_FUNC_GPIO60 (MTK_PIN_NO(60) | 0) - #define MT7623_PIN_60_WB_RSTB_FUNC_WB_RSTB (MTK_PIN_NO(60) | 1) - -@@ -244,6 +250,22 @@ - #define MT7623_PIN_76_SCL0_FUNC_GPIO76 (MTK_PIN_NO(76) | 0) - #define MT7623_PIN_76_SCL0_FUNC_SCL0 (MTK_PIN_NO(76) | 1) - -+#define MT7623_PIN_79_URXD0_FUNC_GPIO79 (MTK_PIN_NO(79) | 0) -+#define MT7623_PIN_79_URXD0_FUNC_URXD0 (MTK_PIN_NO(79) | 1) -+#define MT7623_PIN_79_URXD0_FUNC_UTXD0 (MTK_PIN_NO(79) | 2) -+ -+#define MT7623_PIN_80_UTXD0_FUNC_GPIO80 (MTK_PIN_NO(80) | 0) -+#define MT7623_PIN_80_UTXD0_FUNC_UTXD0 (MTK_PIN_NO(80) | 1) -+#define MT7623_PIN_80_UTXD0_FUNC_URXD0 (MTK_PIN_NO(80) | 2) -+ -+#define MT7623_PIN_81_URXD1_FUNC_GPIO81 (MTK_PIN_NO(81) | 0) -+#define MT7623_PIN_81_URXD1_FUNC_URXD1 (MTK_PIN_NO(81) | 1) -+#define MT7623_PIN_81_URXD1_FUNC_UTXD1 (MTK_PIN_NO(81) | 2) -+ -+#define MT7623_PIN_82_UTXD1_FUNC_GPIO82 (MTK_PIN_NO(82) | 0) -+#define MT7623_PIN_82_UTXD1_FUNC_UTXD1 (MTK_PIN_NO(82) | 1) -+#define MT7623_PIN_82_UTXD1_FUNC_URXD1 (MTK_PIN_NO(82) | 2) -+ - #define MT7623_PIN_83_LCM_RST_FUNC_GPIO83 (MTK_PIN_NO(83) | 0) - #define MT7623_PIN_83_LCM_RST_FUNC_LCM_RST (MTK_PIN_NO(83) | 1) - -@@ -351,10 +373,10 @@ - #define MT7623_PIN_122_GPIO122_FUNC_SDA2 (MTK_PIN_NO(122) | 4) - #define MT7623_PIN_122_GPIO122_FUNC_URXD0 (MTK_PIN_NO(122) | 5) - --#define MT7623_PIN_123_GPIO123_FUNC_GPIO123 (MTK_PIN_NO(123) | 0) --#define MT7623_PIN_123_GPIO123_FUNC_TEST (MTK_PIN_NO(123) | 1) --#define MT7623_PIN_123_GPIO123_FUNC_SCL2 (MTK_PIN_NO(123) | 4) --#define MT7623_PIN_123_GPIO123_FUNC_UTXD0 (MTK_PIN_NO(123) | 5) -+#define MT7623_PIN_123_HTPLG_FUNC_GPIO123 (MTK_PIN_NO(123) | 0) -+#define MT7623_PIN_123_HTPLG_FUNC_HTPLG (MTK_PIN_NO(123) | 1) -+#define MT7623_PIN_123_HTPLG_FUNC_SCL2 (MTK_PIN_NO(123) | 4) -+#define MT7623_PIN_123_HTPLG_FUNC_UTXD0 (MTK_PIN_NO(123) | 5) - - #define MT7623_PIN_124_GPIO124_FUNC_GPIO124 (MTK_PIN_NO(124) | 0) - #define MT7623_PIN_124_GPIO124_FUNC_TEST (MTK_PIN_NO(124) | 1) diff --git a/target/linux/mediatek/patches-4.9/0059-eth-fixes.patch b/target/linux/mediatek/patches-4.9/0059-eth-fixes.patch deleted file mode 100644 index c15596186..000000000 --- a/target/linux/mediatek/patches-4.9/0059-eth-fixes.patch +++ /dev/null @@ -1,511 +0,0 @@ ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -24,6 +24,7 @@ - #include - - #if defined(CONFIG_NET_MEDIATEK_HW_QOS) -+ - struct mtk_ioctl_reg { - unsigned int off; - unsigned int val; -@@ -32,6 +33,13 @@ struct mtk_ioctl_reg { - #define REG_HQOS_MAX 0x3FFF - #define RAETH_QDMA_REG_READ 0x89F8 - #define RAETH_QDMA_REG_WRITE 0x89F9 -+#define RAETH_QDMA_QUEUE_MAPPING 0x89FA -+ -+unsigned int M2Q_table[16] = {0}; -+unsigned int lan_wan_separate = 0; -+ -+EXPORT_SYMBOL_GPL(M2Q_table); -+ - #endif - - #if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE) -@@ -225,7 +233,7 @@ static void mtk_phy_link_adjust(struct n - if (flowctrl & FLOW_CTRL_RX) - mcr |= MAC_MCR_FORCE_RX_FC; - -- netif_dbg(mac->hw, link, dev, "rx pause %s, tx pause %s\n", -+ netif_info(mac->hw, link, dev, "rx pause %s, tx pause %s\n", - flowctrl & FLOW_CTRL_RX ? "enabled" : "disabled", - flowctrl & FLOW_CTRL_TX ? "enabled" : "disabled"); - } -@@ -508,9 +516,9 @@ static struct rtnl_link_stats64 * mtk_ge - unsigned int start; - - if (netif_running(dev) && netif_device_present(dev)) { -- if (spin_trylock_bh(&hw_stats->stats_lock)) { -+ if (spin_trylock(&hw_stats->stats_lock)) { - mtk_stats_update_mac(mac); -- spin_unlock_bh(&hw_stats->stats_lock); -+ spin_unlock(&hw_stats->stats_lock); - } - } - -@@ -690,6 +698,7 @@ static int mtk_tx_map(struct sk_buff *sk - txd3 |= skb->mark & 0x7; - if (mac->id) - txd3 += 8; -+ txd3 = 0; - #endif - - mapped_addr = dma_map_single(eth->dev, skb->data, -@@ -760,16 +769,7 @@ static int mtk_tx_map(struct sk_buff *sk - WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) | - (!nr_frags * TX_DMA_LS0))); - -- /* we have a single DMA ring so BQL needs to be updated for all devices -- * sitting on this ring -- */ -- for (i = 0; i < MTK_MAC_COUNT; i++) { -- if (!eth->netdev[i]) -- continue; -- -- netdev_sent_queue(eth->netdev[i], skb->len); -- } -- -+ netdev_sent_queue(dev, skb->len); - skb_tx_timestamp(skb); - - ring->next_free = mtk_qdma_phys_to_virt(ring, txd->txd2); -@@ -980,20 +980,9 @@ static int mtk_poll_rx(struct napi_struc - if (!(trxd.rxd2 & RX_DMA_DONE)) - break; - -- /* find out which mac the packet comes from. If the special tag is -- * we can assume that the traffic is coming from the builtin mt7530 -- * and the DSA driver has loaded. FPORT will be the physical switch -- * port in this case rather than the FE forward port id. */ -- if (!(trxd.rxd4 & RX_DMA_SP_TAG)) { -- /* values start at 1 */ -- mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) & -- RX_DMA_FPORT_MASK; -- mac--; -- } -- -- if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT || -- !eth->netdev[mac])) -- goto release_desc; -+ /* find out which mac the packet come from. values start at 1 */ -+ mac = (trxd.rxd4 >> 22) & 0x1; -+ mac = (mac + 1) % 2; - - netdev = eth->netdev[mac]; - -@@ -1017,6 +1006,9 @@ static int mtk_poll_rx(struct napi_struc - } - - /* receive data */ -+ if (mac < 0 || mac > 2) -+ mac = 0; -+ - skb = build_skb(data, ring->frag_size); - if (unlikely(!skb)) { - skb_free_frag(new_data); -@@ -1076,18 +1068,21 @@ static int mtk_poll_tx(struct mtk_eth *e - struct mtk_tx_dma *desc; - struct sk_buff *skb; - struct mtk_tx_buf *tx_buf; -- int total = 0, done = 0; -- unsigned int bytes = 0; -+ unsigned int done[MTK_MAX_DEVS]; -+ unsigned int bytes[MTK_MAX_DEVS]; - u32 cpu, dma; - static int condition; -- int i; -+ int total = 0, i; -+ -+ memset(done, 0, sizeof(done)); -+ memset(bytes, 0, sizeof(bytes)); - - cpu = mtk_r32(eth, MTK_QTX_CRX_PTR); - dma = mtk_r32(eth, MTK_QTX_DRX_PTR); - - desc = mtk_qdma_phys_to_virt(ring, cpu); - -- while ((cpu != dma) && done < budget) { -+ while ((cpu != dma) && budget) { - u32 next_cpu = desc->txd2; - int mac = 0; - -@@ -1106,8 +1101,9 @@ static int mtk_poll_tx(struct mtk_eth *e - } - - if (skb != (struct sk_buff *)MTK_DMA_DUMMY_DESC) { -- bytes += skb->len; -- done++; -+ bytes[mac] += skb->len; -+ done[mac]++; -+ budget--; - } - mtk_tx_unmap(eth, tx_buf); - -@@ -1119,13 +1115,11 @@ static int mtk_poll_tx(struct mtk_eth *e - - mtk_w32(eth, cpu, MTK_QTX_CRX_PTR); - -- /* we have a single DMA ring so BQL needs to be updated for all devices -- * sitting on this ring -- */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -- if (!eth->netdev[i]) -+ if (!eth->netdev[i] || !done[i]) - continue; -- netdev_completed_queue(eth->netdev[i], done, bytes); -+ netdev_completed_queue(eth->netdev[i], done[i], bytes[i]); -+ total += done[i]; - } - - if (mtk_queue_stopped(eth) && -@@ -1286,21 +1280,11 @@ static void mtk_tx_clean(struct mtk_eth - - static int mtk_rx_alloc(struct mtk_eth *eth, int ring_no, int rx_flag) - { -- struct mtk_rx_ring *ring; -+ struct mtk_rx_ring *ring = ð->rx_ring[ring_no]; - int rx_data_len, rx_dma_size; - int i; -- u32 offset = 0; -- -- if (rx_flag & MTK_RX_FLAGS_QDMA) { -- if (ring_no) -- return -EINVAL; -- ring = ð->rx_ring_qdma; -- offset = 0x1000; -- } else { -- ring = ð->rx_ring[ring_no]; -- } - -- if (rx_flag & MTK_RX_FLAGS_HWLRO) { -+ if (rx_flag == MTK_RX_FLAGS_HWLRO) { - rx_data_len = MTK_MAX_LRO_RX_LENGTH; - rx_dma_size = MTK_HW_LRO_DMA_SIZE; - } else { -@@ -1348,16 +1332,104 @@ static int mtk_rx_alloc(struct mtk_eth * - */ - wmb(); - -- mtk_w32(eth, ring->phys, MTK_PRX_BASE_PTR_CFG(ring_no) + offset); -- mtk_w32(eth, rx_dma_size, MTK_PRX_MAX_CNT_CFG(ring_no) + offset); -- mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg + offset); -- mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), MTK_PDMA_RST_IDX + offset); -+ mtk_w32(eth, ring->phys, MTK_PRX_BASE_PTR_CFG(ring_no)); -+ mtk_w32(eth, rx_dma_size, MTK_PRX_MAX_CNT_CFG(ring_no)); -+ mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); -+ mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), MTK_PDMA_RST_IDX); - - return 0; - } - --static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring) -+static int mtk_rx_alloc_qdma(struct mtk_eth *eth, int rx_flag) - { -+ struct mtk_rx_ring *ring = ð->rx_ring_qdma; -+ int rx_data_len, rx_dma_size; -+ int i; -+ -+ rx_data_len = ETH_DATA_LEN; -+ rx_dma_size = MTK_DMA_SIZE; -+ -+ ring->frag_size = mtk_max_frag_size(rx_data_len); -+ ring->buf_size = mtk_max_buf_size(ring->frag_size); -+ ring->data = kcalloc(rx_dma_size, sizeof(*ring->data), -+ GFP_KERNEL); -+ if (!ring->data) -+ return -ENOMEM; -+ -+ for (i = 0; i < rx_dma_size; i++) { -+ ring->data[i] = netdev_alloc_frag(ring->frag_size); -+ if (!ring->data[i]) -+ return -ENOMEM; -+ } -+ -+ ring->dma = dma_alloc_coherent(eth->dev, -+ rx_dma_size * sizeof(*ring->dma), -+ &ring->phys, -+ GFP_ATOMIC | __GFP_ZERO); -+ if (!ring->dma) -+ return -ENOMEM; -+ -+ for (i = 0; i < rx_dma_size; i++) { -+ dma_addr_t dma_addr = dma_map_single(eth->dev, -+ ring->data[i] + NET_SKB_PAD, -+ ring->buf_size, -+ DMA_FROM_DEVICE); -+ if (unlikely(dma_mapping_error(eth->dev, dma_addr))) -+ return -ENOMEM; -+ ring->dma[i].rxd1 = (unsigned int)dma_addr; -+ -+ ring->dma[i].rxd2 = RX_DMA_PLEN0(ring->buf_size); -+ } -+ ring->dma_size = rx_dma_size; -+ ring->calc_idx_update = false; -+ ring->calc_idx = rx_dma_size - 1; -+ ring->crx_idx_reg = MTK_QRX_CRX_IDX_CFG(0); -+ /* make sure that all changes to the dma ring are flushed before we -+ * continue -+ */ -+ wmb(); -+ -+ mtk_w32(eth, ring->phys, MTK_QRX_BASE_PTR_CFG(0)); -+ mtk_w32(eth, rx_dma_size, MTK_QRX_MAX_CNT_CFG(0)); -+ mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg); -+ mtk_w32(eth, MTK_PST_DRX_IDX_CFG(0), MTK_QDMA_RST_IDX); -+ -+ return 0; -+} -+ -+static void mtk_rx_clean(struct mtk_eth *eth, int ring_no) -+{ -+ struct mtk_rx_ring *ring = ð->rx_ring[ring_no]; -+ int i; -+ -+ if (ring->data && ring->dma) { -+ for (i = 0; i < ring->dma_size; i++) { -+ if (!ring->data[i]) -+ continue; -+ if (!ring->dma[i].rxd1) -+ continue; -+ dma_unmap_single(eth->dev, -+ ring->dma[i].rxd1, -+ ring->buf_size, -+ DMA_FROM_DEVICE); -+ skb_free_frag(ring->data[i]); -+ } -+ kfree(ring->data); -+ ring->data = NULL; -+ } -+ -+ if (ring->dma) { -+ dma_free_coherent(eth->dev, -+ ring->dma_size * sizeof(*ring->dma), -+ ring->dma, -+ ring->phys); -+ ring->dma = NULL; -+ } -+} -+ -+static void mtk_rx_clean_qdma(struct mtk_eth *eth) -+{ -+ struct mtk_rx_ring *ring = ð->rx_ring_qdma; - int i; - - if (ring->data && ring->dma) { -@@ -1683,7 +1755,7 @@ static int mtk_dma_init(struct mtk_eth * - if (err) - return err; - -- err = mtk_rx_alloc(eth, 0, MTK_RX_FLAGS_QDMA); -+ err = mtk_rx_alloc_qdma(eth, MTK_RX_FLAGS_NORMAL); - if (err) - return err; - -@@ -1702,6 +1774,7 @@ static int mtk_dma_init(struct mtk_eth * - return err; - } - -+ - /* Enable random early drop and set drop threshold automatically */ - mtk_w32(eth, FC_THRES_DROP_MODE | FC_THRES_DROP_EN | FC_THRES_MIN, - MTK_QDMA_FC_THRES); -@@ -1726,13 +1799,13 @@ static void mtk_dma_free(struct mtk_eth - eth->phy_scratch_ring = 0; - } - mtk_tx_clean(eth); -- mtk_rx_clean(eth, ð->rx_ring[0]); -- mtk_rx_clean(eth, ð->rx_ring_qdma); -+ mtk_rx_clean(eth, 0); -+ mtk_rx_clean_qdma(eth); - - if (eth->hwlro) { - mtk_hwlro_rx_uninit(eth); - for (i = 1; i < MTK_MAX_RX_RING_NUM; i++) -- mtk_rx_clean(eth, ð->rx_ring[i]); -+ mtk_rx_clean(eth, i); - } - - kfree(eth->scratch_head); -@@ -1947,20 +2020,14 @@ static int mtk_hw_init(struct mtk_eth *e - val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); - mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); - -- /* Indicates CDM to parse the MTK special tag from CPU -- * which also is working out for untag packets. -- */ -- val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); -- mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); -- val = mtk_r32(eth, MTK_CDMP_IG_CTRL); -- mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL); -- - /* Enable RX VLan Offloading */ - if (MTK_HW_FEATURES & NETIF_F_HW_VLAN_CTAG_RX) - mtk_w32(eth, 1, MTK_CDMP_EG_CTRL); - else - mtk_w32(eth, 0, MTK_CDMP_EG_CTRL); - -+ mtk_w32(eth, 0x81000001, MTK_CDMP_IG_CTRL); -+ - /* disable delay and normal interrupt */ - #ifdef MTK_IRQ_DLY - mtk_w32(eth, 0x84048404, MTK_PDMA_DELAY_INT); -@@ -1990,6 +2057,9 @@ static int mtk_hw_init(struct mtk_eth *e - /* Enable RX checksum */ - val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN; - -+ if (!i) -+ val |= BIT(24); -+ - /* setup the mac dma */ - mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i)); - } -@@ -2069,7 +2139,18 @@ static int mtk_do_ioctl(struct net_devic - if (reg.off > REG_HQOS_MAX) - return -EINVAL; - mtk_w32(eth, reg.val, 0x1800 + reg.off); --// printk("write reg off:%x val:%x\n", reg.off, reg.val); -+ printk("write reg off:%x val:%x\n", reg.off, reg.val); -+ return 0; -+ -+ case RAETH_QDMA_QUEUE_MAPPING: -+ copy_from_user(®, ifr->ifr_data, sizeof(reg)); -+ if ((reg.off & 0x100) == 0x100) { -+ lan_wan_separate = 1; -+ reg.off &= 0xff; -+ } else { -+ lan_wan_separate = 0; -+ } -+ M2Q_table[reg.off] = reg.val; - return 0; - #endif - case SIOCGMIIPHY: -@@ -2288,9 +2369,9 @@ static void mtk_get_ethtool_stats(struct - return; - - if (netif_running(dev) && netif_device_present(dev)) { -- if (spin_trylock_bh(&hwstats->stats_lock)) { -+ if (spin_trylock(&hwstats->stats_lock)) { - mtk_stats_update_mac(mac); -- spin_unlock_bh(&hwstats->stats_lock); -+ spin_unlock(&hwstats->stats_lock); - } - } - -@@ -2443,7 +2524,7 @@ static int mtk_add_mac(struct mtk_eth *e - mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; - - SET_NETDEV_DEV(eth->netdev[id], eth->dev); -- eth->netdev[id]->watchdog_timeo = 30 * HZ; -+ eth->netdev[id]->watchdog_timeo = 15 * HZ; - eth->netdev[id]->netdev_ops = &mtk_netdev_ops; - eth->netdev[id]->base_addr = (unsigned long)eth->base; - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -80,7 +80,6 @@ - - /* CDMP Ingress Control Register */ - #define MTK_CDMP_IG_CTRL 0x400 --#define MTK_CDMP_STAG_EN BIT(0) - - /* CDMP Exgress Control Register */ - #define MTK_CDMP_EG_CTRL 0x404 -@@ -91,12 +90,27 @@ - #define MTK_GDMA_TCS_EN BIT(21) - #define MTK_GDMA_UCS_EN BIT(20) - -+/* GDMA Ingress Control Register */ -+#define MTK_GDMA1_IG_CTRL(x) (0x500 + (x * 0x1000)) -+ - /* Unicast Filter MAC Address Register - Low */ - #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) - - /* Unicast Filter MAC Address Register - High */ - #define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000)) - -+/* QDMA RX Base Pointer Register */ -+#define MTK_QRX_BASE_PTR0 0x1900 -+#define MTK_QRX_BASE_PTR_CFG(x) (MTK_QRX_BASE_PTR0 + (x * 0x10)) -+ -+/* QDMA RX Maximum Count Register */ -+#define MTK_QRX_MAX_CNT0 0x1904 -+#define MTK_QRX_MAX_CNT_CFG(x) (MTK_QRX_MAX_CNT0 + (x * 0x10)) -+ -+/* QDMA RX CPU Pointer Register */ -+#define MTK_QRX_CRX_IDX0 0x1908 -+#define MTK_QRX_CRX_IDX_CFG(x) (MTK_QRX_CRX_IDX0 + (x * 0x10)) -+ - /* PDMA RX Base Pointer Register */ - #define MTK_PRX_BASE_PTR0 0x900 - #define MTK_PRX_BASE_PTR_CFG(x) (MTK_PRX_BASE_PTR0 + (x * 0x10)) -@@ -240,7 +254,10 @@ - #define MTK_QDMA_INT_MASK 0x1A1C - - /* QDMA Interrupt Mask Register */ -+#define MTK_QDMA_HRED1 0x1A40 - #define MTK_QDMA_HRED2 0x1A44 -+#define MTK_QDMA_SRED1 0x1A48 -+#define MTK_QDMA_SRED2 0x1A4c - - /* QDMA TX Forward CPU Pointer Register */ - #define MTK_QTX_CTX_PTR 0x1B00 -@@ -275,6 +292,7 @@ - #define TX_DMA_TSO BIT(28) - #define TX_DMA_FPORT_SHIFT 25 - #define TX_DMA_FPORT_MASK 0x7 -+#define TX_DMA_VQID0 BIT(17) - #define TX_DMA_INS_VLAN BIT(16) - - /* QDMA descriptor txd3 */ -@@ -294,7 +312,6 @@ - - /* QDMA descriptor rxd4 */ - #define RX_DMA_L4_VALID BIT(24) --#define RX_DMA_SP_TAG BIT(22) - #define RX_DMA_FPORT_SHIFT 19 - #define RX_DMA_FPORT_MASK 0x7 - -@@ -310,6 +327,7 @@ - - /* Mac control registers */ - #define MTK_MAC_MCR(x) (0x10100 + (x * 0x100)) -+#define MTK_MAC_MSR(x) (0x10108 + (x * 0x100)) - #define MAC_MCR_MAX_RX_1536 BIT(24) - #define MAC_MCR_IPG_CFG (BIT(18) | BIT(16)) - #define MAC_MCR_FORCE_MODE BIT(15) -@@ -495,7 +513,6 @@ struct mtk_tx_ring { - enum mtk_rx_flags { - MTK_RX_FLAGS_NORMAL = 0, - MTK_RX_FLAGS_HWLRO, -- MTK_RX_FLAGS_QDMA, - }; - - /* struct mtk_rx_ring - This struct holds info describing a RX ring -@@ -539,9 +556,9 @@ struct mtk_rx_ring { - * @pctl: The register map pointing at the range used to setup - * GMAC port drive/slew values - * @dma_refcnt: track how many netdevs are using the DMA engine -- * @tx_ring: Pointer to the memory holding info about the TX ring -- * @rx_ring: Pointer to the memory holding info about the RX ring -- * @rx_ring_qdma: Pointer to the memory holding info about the QDMA RX ring -+ * @tx_ring: Pointer to the memore holding info about the TX ring -+ * @rx_ring: Pointer to the memore holding info about the RX ring -+ * @rx_ring_qdma: Pointer to the memore holding info about the RX ring (QDMA) - * @tx_napi: The TX NAPI struct - * @rx_napi: The RX NAPI struct - * @scratch_ring: Newer SoCs need memory for a second HW managed TX ring -@@ -563,6 +580,7 @@ struct mtk_eth { - struct net_device *netdev[MTK_MAX_DEVS]; - struct mtk_mac *mac[MTK_MAX_DEVS]; - int irq[3]; -+ cpumask_t affinity_mask[3]; - u32 msg_enable; - unsigned long sysclk; - struct regmap *ethsys; -@@ -615,4 +633,6 @@ void mtk_stats_update_mac(struct mtk_mac - void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg); - u32 mtk_r32(struct mtk_eth *eth, unsigned reg); - -+extern unsigned int M2Q_table[16]; -+ - #endif /* MTK_ETH_H */ diff --git a/target/linux/mediatek/patches-4.9/0060-eth-debug.patch b/target/linux/mediatek/patches-4.9/0060-eth-debug.patch deleted file mode 100644 index 902a72ed8..000000000 --- a/target/linux/mediatek/patches-4.9/0060-eth-debug.patch +++ /dev/null @@ -1,69 +0,0 @@ ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -851,6 +851,7 @@ static void mtk_stop_queue(struct mtk_et - continue; - netif_stop_queue(eth->netdev[i]); - } -+ mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); - } - - static int mtk_start_xmit(struct sk_buff *skb, struct net_device *dev) -@@ -1885,6 +1886,19 @@ static int mtk_start_dma(struct mtk_eth - return 0; - } - -+#define NAPI_TIMER_EXPIRE HZ -+ -+static void napi_timer_handler(unsigned long priv) -+{ -+ struct mtk_eth *eth = (struct mtk_eth*) priv; -+ -+ mtk_wake_queue(eth); -+ mtk_handle_irq_rx(0, eth); -+ mtk_handle_irq_tx(0, eth); -+ -+ mod_timer(ð->napi_timer, jiffies + NAPI_TIMER_EXPIRE); -+} -+ - static int mtk_open(struct net_device *dev) - { - struct mtk_mac *mac = netdev_priv(dev); -@@ -1901,6 +1915,9 @@ static int mtk_open(struct net_device *d - napi_enable(ð->rx_napi); - mtk_tx_irq_enable(eth, MTK_TX_DONE_INT); - mtk_rx_irq_enable(eth, MTK_RX_DONE_INT); -+ -+ setup_timer(ð->napi_timer, napi_timer_handler, (unsigned long) eth); -+ mod_timer(ð->napi_timer, jiffies + NAPI_TIMER_EXPIRE); - } - atomic_inc(ð->dma_refcnt); - -@@ -1945,6 +1962,8 @@ static int mtk_stop(struct net_device *d - if (!atomic_dec_and_test(ð->dma_refcnt)) - return 0; - -+ del_timer(ð->napi_timer); -+ - mtk_tx_irq_disable(eth, MTK_TX_DONE_INT); - mtk_rx_irq_disable(eth, MTK_RX_DONE_INT); - napi_disable(ð->tx_napi); -@@ -2524,7 +2543,7 @@ static int mtk_add_mac(struct mtk_eth *e - mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; - - SET_NETDEV_DEV(eth->netdev[id], eth->dev); -- eth->netdev[id]->watchdog_timeo = 15 * HZ; -+ eth->netdev[id]->watchdog_timeo = 30 * HZ; - eth->netdev[id]->netdev_ops = &mtk_netdev_ops; - eth->netdev[id]->base_addr = (unsigned long)eth->base; - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -601,6 +601,8 @@ struct mtk_eth { - struct mii_bus *mii_bus; - struct work_struct pending_work; - unsigned long state; -+ -+ struct timer_list napi_timer; - }; - - /* struct mtk_mac - the structure that holds the info about the MACs of the diff --git a/target/linux/mediatek/patches-4.9/0061-eth-up_down_lock.patch b/target/linux/mediatek/patches-4.9/0061-eth-up_down_lock.patch deleted file mode 100644 index e6f1cf69d..000000000 --- a/target/linux/mediatek/patches-4.9/0061-eth-up_down_lock.patch +++ /dev/null @@ -1,72 +0,0 @@ ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1904,12 +1904,16 @@ static int mtk_open(struct net_device *d - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - -+ spin_lock(ð->iface_lock); -+ - /* we run 2 netdevs on the same dma ring so we only bring it up once */ - if (!atomic_read(ð->dma_refcnt)) { - int err = mtk_start_dma(eth); - -- if (err) -+ if (err) { -+ spin_unlock(ð->iface_lock); - return err; -+ } - - napi_enable(ð->tx_napi); - napi_enable(ð->rx_napi); -@@ -1923,6 +1927,7 @@ static int mtk_open(struct net_device *d - - phy_start(dev->phydev); - netif_start_queue(dev); -+ spin_unlock(ð->iface_lock); - - return 0; - } -@@ -1955,12 +1960,15 @@ static int mtk_stop(struct net_device *d - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - -+ spin_lock(ð->iface_lock); - netif_tx_disable(dev); - phy_stop(dev->phydev); - - /* only shutdown DMA if this is the last user */ -- if (!atomic_dec_and_test(ð->dma_refcnt)) -+ if (!atomic_dec_and_test(ð->dma_refcnt)) { -+ spin_unlock(ð->iface_lock); - return 0; -+ } - - del_timer(ð->napi_timer); - -@@ -1974,6 +1982,8 @@ static int mtk_stop(struct net_device *d - - mtk_dma_free(eth); - -+ spin_unlock(ð->iface_lock); -+ - return 0; - } - -@@ -2623,6 +2633,7 @@ static int mtk_probe(struct platform_dev - if (IS_ERR(eth->base)) - return PTR_ERR(eth->base); - -+ spin_lock_init(ð->iface_lock); - spin_lock_init(ð->page_lock); - spin_lock_init(ð->tx_irq_lock); - spin_lock_init(ð->rx_irq_lock); ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -573,6 +573,7 @@ struct mtk_rx_ring { - struct mtk_eth { - struct device *dev; - void __iomem *base; -+ spinlock_t iface_lock; - spinlock_t page_lock; - spinlock_t tx_irq_lock; - spinlock_t rx_irq_lock; diff --git a/target/linux/mpc85xx/base-files/lib/upgrade/platform.sh b/target/linux/mpc85xx/base-files/lib/upgrade/platform.sh index 67e8324c2..1108b3fd6 100755 --- a/target/linux/mpc85xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/mpc85xx/base-files/lib/upgrade/platform.sh @@ -10,13 +10,3 @@ platform_check_image() { } # use default for platform_do_upgrade() - -disable_watchdog() { - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} - -append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/mpc85xx/image/Makefile b/target/linux/mpc85xx/image/Makefile index 7ae6e27b3..4dd1f1732 100644 --- a/target/linux/mpc85xx/image/Makefile +++ b/target/linux/mpc85xx/image/Makefile @@ -16,16 +16,6 @@ define Device/Default KERNEL := kernel-bin endef -define Build/append-uImage-fakeramdisk-hdr - rm -f $@.fakeramdisk - $(STAGING_DIR_HOST)/bin/mkimage \ - -A $(LINUX_KARCH) -O linux -T ramdisk -C none \ - -n 'fakeramdisk' \ - -s \ - $@.fakeramdisk - cat $@.fakeramdisk >> $@ -endef - define Build/tplink-v1-image $(STAGING_DIR_HOST)/bin/mktplinkfw \ -H $(TPLINK_HWID) -W $(TPLINK_HWREV) -F $(TPLINK_FLASHLAYOUT) \ @@ -68,7 +58,7 @@ define Device/hiveap-330 IMAGES := fdt.bin sysupgrade.bin IMAGE/fdt.bin := append-dtb IMAGE/sysupgrade.bin := append-dtb | pad-to 256k | check-size 256k | \ - append-uImage-fakeramdisk-hdr | pad-to 256k | check-size 512k | \ + append-uImage-fakehdr ramdisk | pad-to 256k | check-size 512k | \ append-rootfs | pad-rootfs $$(BLOCKSIZE) | pad-to 41216k | check-size 41216k | \ append-kernel | append-metadata endef diff --git a/target/linux/mpc85xx/patches-4.9/102-powerpc-add-cmdline-override.patch b/target/linux/mpc85xx/patches-4.9/102-powerpc-add-cmdline-override.patch index 3d59927d1..c70ac1bb9 100644 --- a/target/linux/mpc85xx/patches-4.9/102-powerpc-add-cmdline-override.patch +++ b/target/linux/mpc85xx/patches-4.9/102-powerpc-add-cmdline-override.patch @@ -1,6 +1,6 @@ --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig -@@ -707,6 +707,14 @@ config CMDLINE_FORCE +@@ -708,6 +708,14 @@ config CMDLINE_FORCE This is useful if you cannot or don't want to change the command-line options your boot loader passes to the kernel. diff --git a/target/linux/mvebu/config-4.9 b/target/linux/mvebu/config-4.9 deleted file mode 100644 index 743f667fb..000000000 --- a/target/linux/mvebu/config-4.9 +++ /dev/null @@ -1,457 +0,0 @@ -CONFIG_AHCI_MVEBU=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAS_TICK_BROADCAST=y -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MULTIPLATFORM=y -# CONFIG_ARCH_MULTI_CPU_AUTO is not set -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MVEBU=y -CONFIG_ARCH_NR_GPIO=0 -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -CONFIG_ARMADA_370_CLK=y -CONFIG_ARMADA_370_XP_IRQ=y -CONFIG_ARMADA_370_XP_TIMER=y -CONFIG_ARMADA_38X_CLK=y -CONFIG_ARMADA_THERMAL=y -CONFIG_ARMADA_XP_CLK=y -CONFIG_ARM_APPENDED_DTB=y -CONFIG_ARM_ATAG_DTB_COMPAT=y -# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set -CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_720789=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -# CONFIG_ARM_LPAE is not set -CONFIG_ARM_MVEBU_V7_CPUIDLE=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -# CONFIG_ARM_THUMBEE is not set -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -# CONFIG_BINFMT_FLAT is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BOUNCE=y -# CONFIG_CACHE_FEROCEON_L2 is not set -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_COMMON_CLK=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_BPREDICT_DISABLE is not set -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_PJ4B=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_ABLK_HELPER=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -# CONFIG_CRYPTO_AES_ARM_CE is not set -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_MARVELL_CESA=y -# CONFIG_CRYPTO_GHASH_ARM_CE is not set -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -# CONFIG_CRYPTO_SHA1_ARM_CE is not set -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256_ARM=y -# CONFIG_CRYPTO_SHA2_ARM_CE is not set -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_MVEBU_UART0=y -# CONFIG_DEBUG_MVEBU_UART0_ALTERNATE is not set -# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set -CONFIG_DEBUG_UART_8250=y -# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set -CONFIG_DEBUG_UART_8250_SHIFT=2 -# CONFIG_DEBUG_UART_8250_WORD is not set -CONFIG_DEBUG_UART_PHYS=0xd0012000 -CONFIG_DEBUG_UART_VIRT=0xfec12000 -CONFIG_DEBUG_UNCOMPRESS=y -CONFIG_DEBUG_USER=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_ENGINE_RAID=y -CONFIG_DMA_OF=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EXT4_FS=y -# CONFIG_F2FS_CHECK_FS is not set -CONFIG_F2FS_FS=y -# CONFIG_F2FS_FS_SECURITY is not set -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_STAT_FS=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FS_MBCACHE=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_MVEBU=y -CONFIG_GPIO_MVEBU_PWM=y -CONFIG_GPIO_PCA953X=y -# CONFIG_GPIO_PCA953X_IRQ is not set -CONFIG_GPIO_SYSFS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_BITREVERSE=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARM_SCU=y -CONFIG_HAVE_ARM_SMCCC=y -CONFIG_HAVE_ARM_TWD=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_SMP=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HIGHMEM=y -# CONFIG_HIGHPTE is not set -CONFIG_HOTPLUG_CPU=y -CONFIG_HWBM=y -CONFIG_HWMON=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MV64XXX=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IOMMU_HELPER=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_DEBUG=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_IWMMXT is not set -CONFIG_JBD2=y -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PCA963X=y -CONFIG_LEDS_TLC591XX=y -CONFIG_LEDS_TRIGGER_DISK=y -CONFIG_LIBFDT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MACH_ARMADA_370=y -# CONFIG_MACH_ARMADA_375 is not set -CONFIG_MACH_ARMADA_38X=y -# CONFIG_MACH_ARMADA_39X is not set -CONFIG_MACH_ARMADA_XP=y -# CONFIG_MACH_DOVE is not set -CONFIG_MACH_MVEBU_ANY=y -CONFIG_MACH_MVEBU_V7=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_MANGLE_BOOTARGS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BOARDINFO=y -CONFIG_MDIO_I2C=y -CONFIG_MEMORY=y -# CONFIG_MFD_MAX77620 is not set -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGHT_HAVE_PCI=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_MVSDIO=y -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MMC_SDHCI_PXAV3=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_PXA3xx=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -# CONFIG_MTD_UBI_FASTMAP is not set -# CONFIG_MTD_UBI_GLUEBI is not set -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MULTI_IRQ_HANDLER=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_MVEBU_CLK_COMMON=y -CONFIG_MVEBU_CLK_COREDIV=y -CONFIG_MVEBU_CLK_CPU=y -CONFIG_MVEBU_DEVBUS=y -CONFIG_MVEBU_MBUS=y -CONFIG_MVMDIO=y -CONFIG_MVNETA=y -CONFIG_MVNETA_BM=y -CONFIG_MVNETA_BM_ENABLE=y -CONFIG_MVSW61XX_PHY=y -CONFIG_MV_XOR=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NLS=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=4 -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_ADDRESS_PCI=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_PCI=y -CONFIG_OF_PCI_IRQ=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_ORION_WATCHDOG=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCI_MVEBU=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_ARMADA_370=y -CONFIG_PINCTRL_ARMADA_38X=y -CONFIG_PINCTRL_ARMADA_XP=y -CONFIG_PINCTRL_MVEBU=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PJ4B_ERRATA_4742=y -# CONFIG_PL310_ERRATA_588369 is not set -# CONFIG_PL310_ERRATA_727915 is not set -# CONFIG_PL310_ERRATA_753970 is not set -# CONFIG_PL310_ERRATA_769419 is not set -CONFIG_PLAT_ORION=y -CONFIG_PM_OPP=y -CONFIG_PWM=y -CONFIG_PWM_SYSFS=y -CONFIG_RATIONAL=y -CONFIG_RCU_STALL_COMMON=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_SPI=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_ARMADA38X=y -CONFIG_RTC_DRV_MV=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_SATA_MV=y -# CONFIG_SCHED_INFO is not set -CONFIG_SCSI=y -CONFIG_SENSORS_PWM_FAN=y -CONFIG_SENSORS_TMP421=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_MVEBU_CONSOLE=y -CONFIG_SERIAL_MVEBU_UART=y -CONFIG_SG_POOL=y -CONFIG_SFP=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -# CONFIG_SPI_CADENCE_QUADSPI is not set -CONFIG_SPI_MASTER=y -CONFIG_SPI_ORION=y -CONFIG_SRAM=y -CONFIG_SRCU=y -CONFIG_SWCONFIG=y -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -# CONFIG_THUMB2_KERNEL is not set -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_STATS=y -CONFIG_TREE_RCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set -CONFIG_UBIFS_FS_LZO=y -CONFIG_UBIFS_FS_ZLIB=y -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_ORION=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_LEDS_TRIGGER_USBPORT=y -CONFIG_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_MVEBU=y -CONFIG_USB_XHCI_PCI=y -CONFIG_USB_XHCI_PLATFORM=y -CONFIG_USE_OF=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-rango.dts b/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-rango.dts deleted file mode 100644 index ac4ac1b1b..000000000 --- a/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-rango.dts +++ /dev/null @@ -1,455 +0,0 @@ -/* - * Device Tree file for the Linksys WRT3200ACM (Rango) - * - * Copyright (C) 2016 Imre Kaloz - * - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include -#include -#include "armada-385.dtsi" - -/ { - model = "Linksys WRT3200ACM"; - compatible = "linksys,rango", "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; /* 512 MB */ - }; - - soc { - ranges = ; - - internal-regs { - - spi@10600 { - status = "disabled"; - }; - - i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - - tmp421@4c { - compatible = "ti,tmp421"; - reg = <0x4c>; - }; - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nxp,pca9635"; - reg = <0x68>; - - wan_amber@0 { - label = "rango:amber:wan"; - reg = <0x0>; - }; - - wan_white@1 { - label = "rango:white:wan"; - reg = <0x1>; - }; - - usb2@5 { - label = "rango:white:usb2"; - reg = <0x5>; - }; - - usb3_1@6 { - label = "rango:white:usb3_1"; - reg = <0x6>; - }; - - usb3_2@7 { - label = "rango:white:usb3_2"; - reg = <0x7>; - }; - - wps_white@8 { - label = "rango:white:wps"; - reg = <0x8>; - }; - - wps_amber@9 { - label = "rango:amber:wps"; - reg = <0x9>; - }; - }; - }; - - /* J10: VCC, NC, RX, NC, TX, GND */ - serial@12000 { - status = "okay"; - }; - - ethernet@70000 { - status = "okay"; - phy-mode = "rgmii-id"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - ethernet@34000 { - status = "okay"; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <2>; - bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - mdio { - status = "okay"; - }; - - bm@c8000 { - status = "okay"; - }; - - sata@a8000 { - status = "okay"; - }; - - sdhci@d8000 { - pinctrl-names = "default"; - pinctrl-0 = <&sdhci_pins>; - no-1-8-v; - broken-cd; - wp-inverted; - bus-width = <8>; - status = "okay"; - }; - - /* USB part of the eSATA/USB 2.0 port */ - usb@58000 { - status = "okay"; - }; - - usb3@f8000 { - status = "okay"; - usb-phy = <&usb3_phy>; - }; - - flash@d0000 { - status = "okay"; - num-cs = <1>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x200000>; /* 2MB */ - read-only; - }; - - partition@200000 { - label = "u_env"; - reg = <0x200000 0x20000>; /* 128KB */ - }; - - partition@220000 { - label = "s_env"; - reg = <0x220000 0x40000>; /* 256KB */ - }; - - partition@7e0000 { - label = "devinfo"; - reg = <0x7e0000 0x40000>; /* 256KB */ - read-only; - }; - - partition@820000 { - label = "sysdiag"; - reg = <0x820000 0x1e0000>; /* 1920KB */ - read-only; - }; - - /* kernel1 overlaps with rootfs1 by design */ - partition@a00000 { - label = "kernel1"; - reg = <0xa00000 0x5000000>; /* 80MB */ - }; - - partition@1000000 { - label = "rootfs1"; - reg = <0x1000000 0x4a00000>; /* 74MB */ - }; - - /* kernel2 overlaps with rootfs2 by design */ - partition@5a00000 { - label = "kernel2"; - reg = <0x5a00000 0x5000000>; /* 80MB */ - }; - - partition@6000000 { - label = "rootfs2"; - reg = <0x6000000 0x4a00000>; /* 74MB */ - }; - - /* - * 86MB, last MB is for the BBT, not writable - */ - partition@aa00000 { - label = "syscfg"; - reg = <0xaa00000 0x5600000>; - }; - - /* - * Unused area between "s_env" and "devinfo". - * Moved here because otherwise the renumbered - * partitions would break the bootloader - * supplied bootargs - */ - partition@180000 { - label = "unused_area"; - reg = <0x260000 0x5c0000>; /* 5.75MB */ - }; - }; - }; - - bm-bppi { - status = "okay"; - }; - - pcie-controller { - status = "okay"; - - pcie@1,0 { - /* Marvell 88W8964, 5GHz-only */ - status = "okay"; - - mwlwifi { - marvell,2ghz = <0>; - marvell,chainmask = <4 4>; - }; - - }; - - pcie@2,0 { - /* Marvell 88W8964, 2GHz-only */ - status = "okay"; - - mwlwifi { - marvell,5ghz = <0>; - marvell,chainmask = <4 4>; - }; - - }; - }; - }; - - usb3_phy: usb3_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <®_xhci0_vbus>; - }; - - reg_xhci0_vbus: xhci0-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci0_vbus_pins>; - regulator-name = "xhci0-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>; - }; - - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&reset_key_pin &wps_key_pin>; - pinctrl-names = "default"; - - button@1 { - label = "WPS"; - linux,code = ; - gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; - }; - - button@2 { - label = "Factory Reset Button"; - linux,code = ; - gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&power_led_pin &sata_led_pin &wlan_2g_led_pin &wlan_5g_led_pin>; - pinctrl-names = "default"; - - sata { - label = "rango:white:sata"; - gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; - linux,default-trigger = "disk-activity"; - }; - - wlan_2g { - label = "rango:white:wlan_2g"; - gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; - }; - - wlan_5g { - label = "rango:white:wlan_5g"; - gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; - }; - - power { - label = "rango:white:power"; - gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - dsa@0 { - compatible = "marvell,dsa"; - #address-cells = <2>; - #size-cells = <0>; - - dsa,ethernet = <ð2>; - dsa,mii-bus = <&mdio>; - - switch@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */ - - port@0 { - reg = <0>; - label = "lan4"; - }; - - port@1 { - reg = <1>; - label = "lan3"; - }; - - port@2 { - reg = <2>; - label = "lan2"; - }; - - port@3 { - reg = <3>; - label = "lan1"; - }; - - port@4 { - reg = <4>; - label = "wan"; - }; - - port@5 { - reg = <5>; - label = "cpu"; - }; - }; - }; - - mvsw61xx { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,88e6352"; - status = "okay"; - reg = <0x10>; - - mii-bus = <&mdio>; - cpu-port-0 = <5>; - cpu-port-1 = <6>; - }; - -}; - -&pinctrl { - sata_led_pin: sata-led-pin { - marvell,pins = "mpp21"; - marvell,function = "gpio"; - }; - - wps_key_pin: wps-key-pin { - marvell,pins = "mpp24"; - marvell,function = "gpio"; - }; - - reset_key_pin: reset-key-pin { - marvell,pins = "mpp29"; - marvell,function = "gpio"; - }; - - wlan_2g_led_pin: wlan-2g-led-pin { - marvell,pins = "mpp45"; - marvell,function = "gpio"; - }; - - wlan_5g_led_pin: wlan-5g-led-pin { - marvell,pins = "mpp46"; - marvell,function = "gpio"; - }; - - xhci0_vbus_pins: xhci0-vbus-pins { - marvell,pins = "mpp47"; - marvell,function = "gpio"; - }; - - power_led_pin: power-led-pin { - marvell,pins = "mpp56"; - marvell,function = "gpio"; - }; -}; diff --git a/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-shelby.dts b/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-shelby.dts deleted file mode 100644 index f8dd193ef..000000000 --- a/target/linux/mvebu/files-4.4/arch/arm/boot/dts/armada-385-linksys-shelby.dts +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Device Tree file for the Linksys WRT1900ACS (Shelby) - * - * Copyright (C) 2015 Imre Kaloz - * - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "armada-385-linksys.dtsi" - -/ { - model = "Linksys WRT1900ACS"; - compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - - soc { - internal-regs{ - i2c@11000 { - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - - wan_amber@0 { - label = "shelby:amber:wan"; - reg = <0x0>; - }; - - wan_white@1 { - label = "shelby:white:wan"; - reg = <0x1>; - }; - - wlan_2g@2 { - label = "shelby:white:wlan_2g"; - reg = <0x2>; - }; - - wlan_5g@3 { - label = "shelby:white:wlan_5g"; - reg = <0x3>; - }; - - usb2@5 { - label = "shelby:white:usb2"; - reg = <0x5>; - }; - - usb3_1@6 { - label = "shelby:white:usb3_1"; - reg = <0x6>; - }; - - usb3_2@7 { - label = "shelby:white:usb3_2"; - reg = <0x7>; - }; - - wps_white@8 { - label = "shelby:white:wps"; - reg = <0x8>; - }; - - wps_amber@9 { - label = "shelby:amber:wps"; - reg = <0x9>; - }; - }; - }; - }; - }; - - gpio-leds { - power { - label = "shelby:white:power"; - }; - - sata { - label = "shelby:white:sata"; - linux,default-trigger = "disk-activity"; - }; - }; -}; diff --git a/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-rango.dts b/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-rango.dts deleted file mode 100644 index ac4ac1b1b..000000000 --- a/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-rango.dts +++ /dev/null @@ -1,455 +0,0 @@ -/* - * Device Tree file for the Linksys WRT3200ACM (Rango) - * - * Copyright (C) 2016 Imre Kaloz - * - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include -#include -#include "armada-385.dtsi" - -/ { - model = "Linksys WRT3200ACM"; - compatible = "linksys,rango", "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - memory { - device_type = "memory"; - reg = <0x00000000 0x20000000>; /* 512 MB */ - }; - - soc { - ranges = ; - - internal-regs { - - spi@10600 { - status = "disabled"; - }; - - i2c@11000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - - tmp421@4c { - compatible = "ti,tmp421"; - reg = <0x4c>; - }; - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nxp,pca9635"; - reg = <0x68>; - - wan_amber@0 { - label = "rango:amber:wan"; - reg = <0x0>; - }; - - wan_white@1 { - label = "rango:white:wan"; - reg = <0x1>; - }; - - usb2@5 { - label = "rango:white:usb2"; - reg = <0x5>; - }; - - usb3_1@6 { - label = "rango:white:usb3_1"; - reg = <0x6>; - }; - - usb3_2@7 { - label = "rango:white:usb3_2"; - reg = <0x7>; - }; - - wps_white@8 { - label = "rango:white:wps"; - reg = <0x8>; - }; - - wps_amber@9 { - label = "rango:amber:wps"; - reg = <0x9>; - }; - }; - }; - - /* J10: VCC, NC, RX, NC, TX, GND */ - serial@12000 { - status = "okay"; - }; - - ethernet@70000 { - status = "okay"; - phy-mode = "rgmii-id"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - ethernet@34000 { - status = "okay"; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <2>; - bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - mdio { - status = "okay"; - }; - - bm@c8000 { - status = "okay"; - }; - - sata@a8000 { - status = "okay"; - }; - - sdhci@d8000 { - pinctrl-names = "default"; - pinctrl-0 = <&sdhci_pins>; - no-1-8-v; - broken-cd; - wp-inverted; - bus-width = <8>; - status = "okay"; - }; - - /* USB part of the eSATA/USB 2.0 port */ - usb@58000 { - status = "okay"; - }; - - usb3@f8000 { - status = "okay"; - usb-phy = <&usb3_phy>; - }; - - flash@d0000 { - status = "okay"; - num-cs = <1>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x200000>; /* 2MB */ - read-only; - }; - - partition@200000 { - label = "u_env"; - reg = <0x200000 0x20000>; /* 128KB */ - }; - - partition@220000 { - label = "s_env"; - reg = <0x220000 0x40000>; /* 256KB */ - }; - - partition@7e0000 { - label = "devinfo"; - reg = <0x7e0000 0x40000>; /* 256KB */ - read-only; - }; - - partition@820000 { - label = "sysdiag"; - reg = <0x820000 0x1e0000>; /* 1920KB */ - read-only; - }; - - /* kernel1 overlaps with rootfs1 by design */ - partition@a00000 { - label = "kernel1"; - reg = <0xa00000 0x5000000>; /* 80MB */ - }; - - partition@1000000 { - label = "rootfs1"; - reg = <0x1000000 0x4a00000>; /* 74MB */ - }; - - /* kernel2 overlaps with rootfs2 by design */ - partition@5a00000 { - label = "kernel2"; - reg = <0x5a00000 0x5000000>; /* 80MB */ - }; - - partition@6000000 { - label = "rootfs2"; - reg = <0x6000000 0x4a00000>; /* 74MB */ - }; - - /* - * 86MB, last MB is for the BBT, not writable - */ - partition@aa00000 { - label = "syscfg"; - reg = <0xaa00000 0x5600000>; - }; - - /* - * Unused area between "s_env" and "devinfo". - * Moved here because otherwise the renumbered - * partitions would break the bootloader - * supplied bootargs - */ - partition@180000 { - label = "unused_area"; - reg = <0x260000 0x5c0000>; /* 5.75MB */ - }; - }; - }; - - bm-bppi { - status = "okay"; - }; - - pcie-controller { - status = "okay"; - - pcie@1,0 { - /* Marvell 88W8964, 5GHz-only */ - status = "okay"; - - mwlwifi { - marvell,2ghz = <0>; - marvell,chainmask = <4 4>; - }; - - }; - - pcie@2,0 { - /* Marvell 88W8964, 2GHz-only */ - status = "okay"; - - mwlwifi { - marvell,5ghz = <0>; - marvell,chainmask = <4 4>; - }; - - }; - }; - }; - - usb3_phy: usb3_phy { - compatible = "usb-nop-xceiv"; - vcc-supply = <®_xhci0_vbus>; - }; - - reg_xhci0_vbus: xhci0-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; - pinctrl-0 = <&xhci0_vbus_pins>; - regulator-name = "xhci0-vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - enable-active-high; - gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>; - }; - - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-0 = <&reset_key_pin &wps_key_pin>; - pinctrl-names = "default"; - - button@1 { - label = "WPS"; - linux,code = ; - gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; - }; - - button@2 { - label = "Factory Reset Button"; - linux,code = ; - gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&power_led_pin &sata_led_pin &wlan_2g_led_pin &wlan_5g_led_pin>; - pinctrl-names = "default"; - - sata { - label = "rango:white:sata"; - gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; - linux,default-trigger = "disk-activity"; - }; - - wlan_2g { - label = "rango:white:wlan_2g"; - gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; - }; - - wlan_5g { - label = "rango:white:wlan_5g"; - gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; - }; - - power { - label = "rango:white:power"; - gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; - default-state = "on"; - }; - }; - - dsa@0 { - compatible = "marvell,dsa"; - #address-cells = <2>; - #size-cells = <0>; - - dsa,ethernet = <ð2>; - dsa,mii-bus = <&mdio>; - - switch@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0>; /* MDIO address 0, switch 0 in tree */ - - port@0 { - reg = <0>; - label = "lan4"; - }; - - port@1 { - reg = <1>; - label = "lan3"; - }; - - port@2 { - reg = <2>; - label = "lan2"; - }; - - port@3 { - reg = <3>; - label = "lan1"; - }; - - port@4 { - reg = <4>; - label = "wan"; - }; - - port@5 { - reg = <5>; - label = "cpu"; - }; - }; - }; - - mvsw61xx { - #address-cells = <1>; - #size-cells = <0>; - compatible = "marvell,88e6352"; - status = "okay"; - reg = <0x10>; - - mii-bus = <&mdio>; - cpu-port-0 = <5>; - cpu-port-1 = <6>; - }; - -}; - -&pinctrl { - sata_led_pin: sata-led-pin { - marvell,pins = "mpp21"; - marvell,function = "gpio"; - }; - - wps_key_pin: wps-key-pin { - marvell,pins = "mpp24"; - marvell,function = "gpio"; - }; - - reset_key_pin: reset-key-pin { - marvell,pins = "mpp29"; - marvell,function = "gpio"; - }; - - wlan_2g_led_pin: wlan-2g-led-pin { - marvell,pins = "mpp45"; - marvell,function = "gpio"; - }; - - wlan_5g_led_pin: wlan-5g-led-pin { - marvell,pins = "mpp46"; - marvell,function = "gpio"; - }; - - xhci0_vbus_pins: xhci0-vbus-pins { - marvell,pins = "mpp47"; - marvell,function = "gpio"; - }; - - power_led_pin: power-led-pin { - marvell,pins = "mpp56"; - marvell,function = "gpio"; - }; -}; diff --git a/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-shelby.dts b/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-shelby.dts deleted file mode 100644 index f8dd193ef..000000000 --- a/target/linux/mvebu/files-4.9/arch/arm/boot/dts/armada-385-linksys-shelby.dts +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Device Tree file for the Linksys WRT1900ACS (Shelby) - * - * Copyright (C) 2015 Imre Kaloz - * - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without - * any warranty of any kind, whether express or implied. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/dts-v1/; -#include "armada-385-linksys.dtsi" - -/ { - model = "Linksys WRT1900ACS"; - compatible = "linksys,shelby", "linksys,armada385", "marvell,armada385", - "marvell,armada380"; - - soc { - internal-regs{ - i2c@11000 { - - pca9635@68 { - #address-cells = <1>; - #size-cells = <0>; - - wan_amber@0 { - label = "shelby:amber:wan"; - reg = <0x0>; - }; - - wan_white@1 { - label = "shelby:white:wan"; - reg = <0x1>; - }; - - wlan_2g@2 { - label = "shelby:white:wlan_2g"; - reg = <0x2>; - }; - - wlan_5g@3 { - label = "shelby:white:wlan_5g"; - reg = <0x3>; - }; - - usb2@5 { - label = "shelby:white:usb2"; - reg = <0x5>; - }; - - usb3_1@6 { - label = "shelby:white:usb3_1"; - reg = <0x6>; - }; - - usb3_2@7 { - label = "shelby:white:usb3_2"; - reg = <0x7>; - }; - - wps_white@8 { - label = "shelby:white:wps"; - reg = <0x8>; - }; - - wps_amber@9 { - label = "shelby:amber:wps"; - reg = <0x9>; - }; - }; - }; - }; - }; - - gpio-leds { - power { - label = "shelby:white:power"; - }; - - sata { - label = "shelby:white:sata"; - linux,default-trigger = "disk-activity"; - }; - }; -}; diff --git a/target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch b/target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch index 1960326f0..2e135e684 100644 --- a/target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch +++ b/target/linux/mvebu/patches-4.14/408-sfp-move-module-eeprom-ethtool-access-into-netdev-co.patch @@ -129,7 +129,7 @@ Signed-off-by: Russell King /* 802.11 specific */ struct wireless_dev; /* 802.15.4 specific */ -@@ -1908,6 +1909,7 @@ struct net_device { +@@ -1932,6 +1933,7 @@ struct net_device { struct netprio_map __rcu *priomap; #endif struct phy_device *phydev; diff --git a/target/linux/mvebu/patches-4.4/002-add_powertables.patch b/target/linux/mvebu/patches-4.4/002-add_powertables.patch deleted file mode 100644 index a5a47e4ab..000000000 --- a/target/linux/mvebu/patches-4.4/002-add_powertables.patch +++ /dev/null @@ -1,748 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -86,12 +86,100 @@ - pcie@2,0 { - /* Port 0, Lane 1 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>; -+ -+ ETSI = -+ <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; - }; - - /* Second mini-PCIe port */ - pcie@3,0 { - /* Port 0, Lane 3 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>; -+ -+ ETSI = -+ <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>; -+ }; -+ }; - }; - }; - ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -100,6 +100,212 @@ - }; - }; - }; -+ -+ pcie-controller { -+ pcie@1,0 { -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; -+ CA = -+ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+ }; -+ -+ pcie@2,0 { -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+ }; -+ }; - }; - - gpio-leds { ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -100,6 +100,212 @@ - }; - }; - }; -+ -+ pcie-controller { -+ pcie@1,0 { -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>; -+ CA = -+ <36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; -+ CN = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>; -+ ETSI = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>; -+ FCC = -+ <36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; -+ }; -+ }; -+ }; -+ -+ pcie@2,0 { -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>; -+ CN = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+ }; -+ }; - }; - - gpio-leds { ---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts -@@ -100,6 +100,212 @@ - }; - }; - }; -+ -+ pcie-controller { -+ pcie@1,0 { -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; -+ CA = -+ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+ }; -+ -+ pcie@2,0 { -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+ }; -+ }; - }; - - gpio-leds { diff --git a/target/linux/mvebu/patches-4.4/003-add_switch_nodes.patch b/target/linux/mvebu/patches-4.4/003-add_switch_nodes.patch deleted file mode 100644 index 1502b6b14..000000000 --- a/target/linux/mvebu/patches-4.4/003-add_switch_nodes.patch +++ /dev/null @@ -1,40 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -467,6 +467,16 @@ - }; - }; - }; -+ -+ mvsw61xx { -+ compatible = "marvell,88e6172"; -+ status = "okay"; -+ reg = <0x10>; -+ -+ mii-bus = <&mdio>; -+ cpu-port-0 = <5>; -+ cpu-port-1 = <6>; -+ }; - }; - - &pinctrl { ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -309,6 +309,18 @@ - }; - }; - }; -+ -+ mvsw61xx { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "marvell,88e6176"; -+ status = "okay"; -+ reg = <0x10>; -+ -+ mii-bus = <&mdio>; -+ cpu-port-0 = <5>; -+ cpu-port-1 = <6>; -+ }; - }; - - &pinctrl { diff --git a/target/linux/mvebu/patches-4.4/010-build_new_dtbs.patch b/target/linux/mvebu/patches-4.4/010-build_new_dtbs.patch deleted file mode 100644 index 6ba9ee6e8..000000000 --- a/target/linux/mvebu/patches-4.4/010-build_new_dtbs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -748,6 +748,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-db-ap.dtb \ - armada-385-linksys-caiman.dtb \ - armada-385-linksys-cobra.dtb \ -+ armada-385-linksys-rango.dtb \ -+ armada-385-linksys-shelby.dtb \ - armada-388-db.dtb \ - armada-388-gp.dtb \ - armada-388-rd.dtb diff --git a/target/linux/mvebu/patches-4.4/020-mtd-nand-pxa3xx_nand-add-support-for-partial-chunks.patch b/target/linux/mvebu/patches-4.4/020-mtd-nand-pxa3xx_nand-add-support-for-partial-chunks.patch deleted file mode 100644 index 2e6709781..000000000 --- a/target/linux/mvebu/patches-4.4/020-mtd-nand-pxa3xx_nand-add-support-for-partial-chunks.patch +++ /dev/null @@ -1,428 +0,0 @@ -From: Thomas Petazzoni -Date: Wed, 10 Feb 2016 14:54:21 +0100 -Subject: [PATCH] mtd: nand: pxa3xx_nand: add support for partial chunks - -This commit is needed to properly support the 8-bits ECC configuration -with 4KB pages. - -When pages larger than 2 KB are used on platforms using the PXA3xx -NAND controller, the reading/programming operations need to be split -in chunks of 2 KBs or less because the controller FIFO is limited to -about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to -this requirement, the data layout on NAND is a bit strange, with ECC -interleaved with data, at the end of each chunk. - -When a 4-bits ECC configuration is used with 4 KB pages, the physical -data layout on the NAND looks like this: - -| 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC | - -So the data chunks have an equal size, 2080 bytes for each chunk, -which the driver supports properly. - -When a 8-bits ECC configuration is used with 4KB pages, the physical -data layout on the NAND looks like this: - -| 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC | - -So, the spare area is stored in its own chunk, which has a different -size than the other chunks. Since OOB is not used by UBIFS, the initial -implementation of the driver has chosen to not support reading this -additional "spare" chunk of data. - -Unfortunately, Marvell has chosen to store the BBT signature in the -OOB area. Therefore, if the driver doesn't read this spare area, Linux -has no way of finding the BBT. It thinks there is no BBT, and rewrites -one, which U-Boot does not recognize, causing compatibility problems -between the bootloader and the kernel in terms of NAND usage. - -To fix this, this commit implements the support for reading a partial -last chunk. This support is currently only useful for the case of 8 -bits ECC with 4 KB pages, but it will be useful in the future to -enable other configurations such as 12 bits and 16 bits ECC with 4 KB -pages, or 8 bits ECC with 8 KB pages, etc. All those configurations -have a "last" chunk that doesn't have the same size as the other -chunks. - -In order to implement reading of the last chunk, this commit: - - - Adds a number of new fields to the pxa3xx_nand_info to describe how - many full chunks and how many chunks we have, the size of full - chunks and partial chunks, both in terms of data area and spare - area. - - - Fills in the step_chunk_size and step_spare_size variables to - describe how much data and spare should be read/written for the - current read/program step. - - - Reworks the state machine to accommodate doing the additional read - or program step when a last partial chunk is used. - -This commit has been tested on a Marvell Armada 398 DB board, with a -4KB page NAND, tested in both 4 bits ECC and 8 bits ECC -configurations. Robert Jarzmik has tested on some PXA platforms. - -Signed-off-by: Thomas Petazzoni -Tested-by: Robert Jarzmik -Acked-by: Ezequiel Garcia -Signed-off-by: Brian Norris ---- - ---- a/drivers/mtd/nand/pxa3xx_nand.c -+++ b/drivers/mtd/nand/pxa3xx_nand.c -@@ -228,15 +228,44 @@ struct pxa3xx_nand_info { - int use_spare; /* use spare ? */ - int need_wait; - -- unsigned int data_size; /* data to be read from FIFO */ -- unsigned int chunk_size; /* split commands chunk size */ -- unsigned int oob_size; -+ /* Amount of real data per full chunk */ -+ unsigned int chunk_size; -+ -+ /* Amount of spare data per full chunk */ - unsigned int spare_size; -+ -+ /* Number of full chunks (i.e chunk_size + spare_size) */ -+ unsigned int nfullchunks; -+ -+ /* -+ * Total number of chunks. If equal to nfullchunks, then there -+ * are only full chunks. Otherwise, there is one last chunk of -+ * size (last_chunk_size + last_spare_size) -+ */ -+ unsigned int ntotalchunks; -+ -+ /* Amount of real data in the last chunk */ -+ unsigned int last_chunk_size; -+ -+ /* Amount of spare data in the last chunk */ -+ unsigned int last_spare_size; -+ - unsigned int ecc_size; - unsigned int ecc_err_cnt; - unsigned int max_bitflips; - int retcode; - -+ /* -+ * Variables only valid during command -+ * execution. step_chunk_size and step_spare_size is the -+ * amount of real data and spare data in the current -+ * chunk. cur_chunk is the current chunk being -+ * read/programmed. -+ */ -+ unsigned int step_chunk_size; -+ unsigned int step_spare_size; -+ unsigned int cur_chunk; -+ - /* cached register value */ - uint32_t reg_ndcr; - uint32_t ndtr0cs0; -@@ -531,25 +560,6 @@ static int pxa3xx_nand_init(struct pxa3x - return 0; - } - --/* -- * Set the data and OOB size, depending on the selected -- * spare and ECC configuration. -- * Only applicable to READ0, READOOB and PAGEPROG commands. -- */ --static void pxa3xx_set_datasize(struct pxa3xx_nand_info *info, -- struct mtd_info *mtd) --{ -- int oob_enable = info->reg_ndcr & NDCR_SPARE_EN; -- -- info->data_size = mtd->writesize; -- if (!oob_enable) -- return; -- -- info->oob_size = info->spare_size; -- if (!info->use_ecc) -- info->oob_size += info->ecc_size; --} -- - /** - * NOTE: it is a must to set ND_RUN firstly, then write - * command buffer, otherwise, it does not work. -@@ -665,28 +675,28 @@ static void drain_fifo(struct pxa3xx_nan - - static void handle_data_pio(struct pxa3xx_nand_info *info) - { -- unsigned int do_bytes = min(info->data_size, info->chunk_size); -- - switch (info->state) { - case STATE_PIO_WRITING: -- writesl(info->mmio_base + NDDB, -- info->data_buff + info->data_buff_pos, -- DIV_ROUND_UP(do_bytes, 4)); -+ if (info->step_chunk_size) -+ writesl(info->mmio_base + NDDB, -+ info->data_buff + info->data_buff_pos, -+ DIV_ROUND_UP(info->step_chunk_size, 4)); - -- if (info->oob_size > 0) -+ if (info->step_spare_size) - writesl(info->mmio_base + NDDB, - info->oob_buff + info->oob_buff_pos, -- DIV_ROUND_UP(info->oob_size, 4)); -+ DIV_ROUND_UP(info->step_spare_size, 4)); - break; - case STATE_PIO_READING: -- drain_fifo(info, -- info->data_buff + info->data_buff_pos, -- DIV_ROUND_UP(do_bytes, 4)); -+ if (info->step_chunk_size) -+ drain_fifo(info, -+ info->data_buff + info->data_buff_pos, -+ DIV_ROUND_UP(info->step_chunk_size, 4)); - -- if (info->oob_size > 0) -+ if (info->step_spare_size) - drain_fifo(info, - info->oob_buff + info->oob_buff_pos, -- DIV_ROUND_UP(info->oob_size, 4)); -+ DIV_ROUND_UP(info->step_spare_size, 4)); - break; - default: - dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__, -@@ -695,9 +705,8 @@ static void handle_data_pio(struct pxa3x - } - - /* Update buffer pointers for multi-page read/write */ -- info->data_buff_pos += do_bytes; -- info->oob_buff_pos += info->oob_size; -- info->data_size -= do_bytes; -+ info->data_buff_pos += info->step_chunk_size; -+ info->oob_buff_pos += info->step_spare_size; - } - - static void pxa3xx_nand_data_dma_irq(void *data) -@@ -738,8 +747,9 @@ static void start_data_dma(struct pxa3xx - info->state); - BUG(); - } -- info->sg.length = info->data_size + -- (info->oob_size ? info->spare_size + info->ecc_size : 0); -+ info->sg.length = info->chunk_size; -+ if (info->use_spare) -+ info->sg.length += info->spare_size + info->ecc_size; - dma_map_sg(info->dma_chan->device->dev, &info->sg, 1, info->dma_dir); - - tx = dmaengine_prep_slave_sg(info->dma_chan, &info->sg, 1, direction, -@@ -900,9 +910,11 @@ static void prepare_start_command(struct - /* reset data and oob column point to handle data */ - info->buf_start = 0; - info->buf_count = 0; -- info->oob_size = 0; - info->data_buff_pos = 0; - info->oob_buff_pos = 0; -+ info->step_chunk_size = 0; -+ info->step_spare_size = 0; -+ info->cur_chunk = 0; - info->use_ecc = 0; - info->use_spare = 1; - info->retcode = ERR_NONE; -@@ -914,8 +926,6 @@ static void prepare_start_command(struct - case NAND_CMD_READ0: - case NAND_CMD_PAGEPROG: - info->use_ecc = 1; -- case NAND_CMD_READOOB: -- pxa3xx_set_datasize(info, mtd); - break; - case NAND_CMD_PARAM: - info->use_spare = 0; -@@ -974,6 +984,14 @@ static int prepare_set_command(struct px - if (command == NAND_CMD_READOOB) - info->buf_start += mtd->writesize; - -+ if (info->cur_chunk < info->nfullchunks) { -+ info->step_chunk_size = info->chunk_size; -+ info->step_spare_size = info->spare_size; -+ } else { -+ info->step_chunk_size = info->last_chunk_size; -+ info->step_spare_size = info->last_spare_size; -+ } -+ - /* - * Multiple page read needs an 'extended command type' field, - * which is either naked-read or last-read according to the -@@ -985,8 +1003,8 @@ static int prepare_set_command(struct px - info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8) - | NDCB0_LEN_OVRD - | NDCB0_EXT_CMD_TYPE(ext_cmd_type); -- info->ndcb3 = info->chunk_size + -- info->oob_size; -+ info->ndcb3 = info->step_chunk_size + -+ info->step_spare_size; - } - - set_command_address(info, mtd->writesize, column, page_addr); -@@ -1006,8 +1024,6 @@ static int prepare_set_command(struct px - | NDCB0_EXT_CMD_TYPE(ext_cmd_type) - | addr_cycle - | command; -- /* No data transfer in this case */ -- info->data_size = 0; - exec_cmd = 1; - } - break; -@@ -1019,6 +1035,14 @@ static int prepare_set_command(struct px - break; - } - -+ if (info->cur_chunk < info->nfullchunks) { -+ info->step_chunk_size = info->chunk_size; -+ info->step_spare_size = info->spare_size; -+ } else { -+ info->step_chunk_size = info->last_chunk_size; -+ info->step_spare_size = info->last_spare_size; -+ } -+ - /* Second command setting for large pages */ - if (mtd->writesize > PAGE_CHUNK_SIZE) { - /* -@@ -1029,14 +1053,14 @@ static int prepare_set_command(struct px - info->ndcb0 |= NDCB0_CMD_TYPE(0x1) - | NDCB0_LEN_OVRD - | NDCB0_EXT_CMD_TYPE(ext_cmd_type); -- info->ndcb3 = info->chunk_size + -- info->oob_size; -+ info->ndcb3 = info->step_chunk_size + -+ info->step_spare_size; - - /* - * This is the command dispatch that completes a chunked - * page program operation. - */ -- if (info->data_size == 0) { -+ if (info->cur_chunk == info->ntotalchunks) { - info->ndcb0 = NDCB0_CMD_TYPE(0x1) - | NDCB0_EXT_CMD_TYPE(ext_cmd_type) - | command; -@@ -1063,7 +1087,7 @@ static int prepare_set_command(struct px - | command; - info->ndcb1 = (column & 0xFF); - info->ndcb3 = INIT_BUFFER_SIZE; -- info->data_size = INIT_BUFFER_SIZE; -+ info->step_chunk_size = INIT_BUFFER_SIZE; - break; - - case NAND_CMD_READID: -@@ -1073,7 +1097,7 @@ static int prepare_set_command(struct px - | command; - info->ndcb1 = (column & 0xFF); - -- info->data_size = 8; -+ info->step_chunk_size = 8; - break; - case NAND_CMD_STATUS: - info->buf_count = 1; -@@ -1081,7 +1105,7 @@ static int prepare_set_command(struct px - | NDCB0_ADDR_CYC(1) - | command; - -- info->data_size = 8; -+ info->step_chunk_size = 8; - break; - - case NAND_CMD_ERASE1: -@@ -1220,6 +1244,7 @@ static void nand_cmdfunc_extended(struct - init_completion(&info->dev_ready); - do { - info->state = STATE_PREPARED; -+ - exec_cmd = prepare_set_command(info, command, ext_cmd_type, - column, page_addr); - if (!exec_cmd) { -@@ -1239,22 +1264,30 @@ static void nand_cmdfunc_extended(struct - break; - } - -+ /* Only a few commands need several steps */ -+ if (command != NAND_CMD_PAGEPROG && -+ command != NAND_CMD_READ0 && -+ command != NAND_CMD_READOOB) -+ break; -+ -+ info->cur_chunk++; -+ - /* Check if the sequence is complete */ -- if (info->data_size == 0 && command != NAND_CMD_PAGEPROG) -+ if (info->cur_chunk == info->ntotalchunks && command != NAND_CMD_PAGEPROG) - break; - - /* - * After a splitted program command sequence has issued - * the command dispatch, the command sequence is complete. - */ -- if (info->data_size == 0 && -+ if (info->cur_chunk == (info->ntotalchunks + 1) && - command == NAND_CMD_PAGEPROG && - ext_cmd_type == EXT_CMD_TYPE_DISPATCH) - break; - - if (command == NAND_CMD_READ0 || command == NAND_CMD_READOOB) { - /* Last read: issue a 'last naked read' */ -- if (info->data_size == info->chunk_size) -+ if (info->cur_chunk == info->ntotalchunks - 1) - ext_cmd_type = EXT_CMD_TYPE_LAST_RW; - else - ext_cmd_type = EXT_CMD_TYPE_NAKED_RW; -@@ -1264,7 +1297,7 @@ static void nand_cmdfunc_extended(struct - * the command dispatch must be issued to complete. - */ - } else if (command == NAND_CMD_PAGEPROG && -- info->data_size == 0) { -+ info->cur_chunk == info->ntotalchunks) { - ext_cmd_type = EXT_CMD_TYPE_DISPATCH; - } - } while (1); -@@ -1514,6 +1547,8 @@ static int pxa_ecc_init(struct pxa3xx_na - int strength, int ecc_stepsize, int page_size) - { - if (strength == 1 && ecc_stepsize == 512 && page_size == 2048) { -+ info->nfullchunks = 1; -+ info->ntotalchunks = 1; - info->chunk_size = 2048; - info->spare_size = 40; - info->ecc_size = 24; -@@ -1522,6 +1557,8 @@ static int pxa_ecc_init(struct pxa3xx_na - ecc->strength = 1; - - } else if (strength == 1 && ecc_stepsize == 512 && page_size == 512) { -+ info->nfullchunks = 1; -+ info->ntotalchunks = 1; - info->chunk_size = 512; - info->spare_size = 8; - info->ecc_size = 8; -@@ -1535,6 +1572,8 @@ static int pxa_ecc_init(struct pxa3xx_na - */ - } else if (strength == 4 && ecc_stepsize == 512 && page_size == 2048) { - info->ecc_bch = 1; -+ info->nfullchunks = 1; -+ info->ntotalchunks = 1; - info->chunk_size = 2048; - info->spare_size = 32; - info->ecc_size = 32; -@@ -1545,6 +1584,8 @@ static int pxa_ecc_init(struct pxa3xx_na - - } else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) { - info->ecc_bch = 1; -+ info->nfullchunks = 2; -+ info->ntotalchunks = 2; - info->chunk_size = 2048; - info->spare_size = 32; - info->ecc_size = 32; -@@ -1559,8 +1600,12 @@ static int pxa_ecc_init(struct pxa3xx_na - */ - } else if (strength == 8 && ecc_stepsize == 512 && page_size == 4096) { - info->ecc_bch = 1; -+ info->nfullchunks = 4; -+ info->ntotalchunks = 5; - info->chunk_size = 1024; - info->spare_size = 0; -+ info->last_chunk_size = 0; -+ info->last_spare_size = 64; - info->ecc_size = 32; - ecc->mode = NAND_ECC_HW; - ecc->size = info->chunk_size; diff --git a/target/linux/mvebu/patches-4.4/021-mtd-pxa3xx_nand-Increase-the-initial-chunk-size.patch b/target/linux/mvebu/patches-4.4/021-mtd-pxa3xx_nand-Increase-the-initial-chunk-size.patch deleted file mode 100644 index 0b0e047c0..000000000 --- a/target/linux/mvebu/patches-4.4/021-mtd-pxa3xx_nand-Increase-the-initial-chunk-size.patch +++ /dev/null @@ -1,42 +0,0 @@ -From: =?UTF-8?q?Ezequiel=20Garc=C3=ADa?= -Date: Wed, 4 Nov 2015 13:13:41 -0300 -Subject: [PATCH] mtd: pxa3xx_nand: Increase the initial chunk size - -The chunk size represents the size of the data chunks, which -is used by the controllers that allow to split transfered data. - -However, the initial chunk size is used in a non-splitted way, -during device identification. Therefore, it must be large enough -for all the NAND commands issued during device identification. -This includes NAND_CMD_PARAM which was recently changed to -transfer up to 2048 bytes (for the redundant parameter pages). - -Thus, the initial chunk size should be 2048 as well. - -On Armada 370/XP platforms (NFCv2) booted without the keep-config -devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM -command: - - [..] - pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device - pxa3xx-nand f10d0000.nand: Wait time out!!! - nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38 - nand: Micron MT29F8G08ABABAWP - nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224 - -Signed-off-by: Ezequiel Garcia -Acked-by: Robert Jarzmik -Signed-off-by: Brian Norris ---- - ---- a/drivers/mtd/nand/pxa3xx_nand.c -+++ b/drivers/mtd/nand/pxa3xx_nand.c -@@ -1637,7 +1637,7 @@ static int pxa3xx_nand_scan(struct mtd_i - goto KEEP_CONFIG; - - /* Set a default chunk size */ -- info->chunk_size = 512; -+ info->chunk_size = PAGE_CHUNK_SIZE; - - ret = pxa3xx_nand_config_flash(info); - if (ret) diff --git a/target/linux/mvebu/patches-4.4/022-mtd-pxa3xx_nand-Fix-initial-controller-configuration.patch b/target/linux/mvebu/patches-4.4/022-mtd-pxa3xx_nand-Fix-initial-controller-configuration.patch deleted file mode 100644 index 7d07fb942..000000000 --- a/target/linux/mvebu/patches-4.4/022-mtd-pxa3xx_nand-Fix-initial-controller-configuration.patch +++ /dev/null @@ -1,104 +0,0 @@ -From: =?UTF-8?q?Ezequiel=20Garc=C3=ADa?= -Date: Wed, 4 Nov 2015 13:13:42 -0300 -Subject: [PATCH] mtd: pxa3xx_nand: Fix initial controller configuration - -The Data Flash Control Register (NDCR) contains two types -of parameters: those that are needed for device identification, -and those that can only be set after device identification. - -Therefore, the driver can't set them all at once and instead -needs to configure the first group before nand_scan_ident() -and the second group later. - -Let's split pxa3xx_nand_config in two halves, and set the -parameters that depend on the device geometry once this is known. - -Signed-off-by: Ezequiel Garcia -Signed-off-by: Brian Norris ---- - ---- a/drivers/mtd/nand/pxa3xx_nand.c -+++ b/drivers/mtd/nand/pxa3xx_nand.c -@@ -1420,34 +1420,43 @@ static int pxa3xx_nand_waitfunc(struct m - return NAND_STATUS_READY; - } - --static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info) -+static int pxa3xx_nand_config_ident(struct pxa3xx_nand_info *info) - { - struct platform_device *pdev = info->pdev; - struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(&pdev->dev); -- struct pxa3xx_nand_host *host = info->host[info->cs]; -- struct mtd_info *mtd = host->mtd; -- struct nand_chip *chip = mtd->priv; - -- /* configure default flash values */ -+ /* Configure default flash values */ -+ info->chunk_size = PAGE_CHUNK_SIZE; - info->reg_ndcr = 0x0; /* enable all interrupts */ - info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0; - info->reg_ndcr |= NDCR_RD_ID_CNT(READ_ID_BYTES); -- info->reg_ndcr |= NDCR_SPARE_EN; /* enable spare by default */ -+ info->reg_ndcr |= NDCR_SPARE_EN; -+ -+ return 0; -+} -+ -+static void pxa3xx_nand_config_tail(struct pxa3xx_nand_info *info) -+{ -+ struct pxa3xx_nand_host *host = info->host[info->cs]; -+ struct mtd_info *mtd = host->mtd; -+ struct nand_chip *chip = mtd->priv; -+ - info->reg_ndcr |= (host->col_addr_cycles == 2) ? NDCR_RA_START : 0; - info->reg_ndcr |= (chip->page_shift == 6) ? NDCR_PG_PER_BLK : 0; - info->reg_ndcr |= (mtd->writesize == 2048) ? NDCR_PAGE_SZ : 0; -- -- return 0; - } - - static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info) - { -+ struct platform_device *pdev = info->pdev; -+ struct pxa3xx_nand_platform_data *pdata = dev_get_platdata(&pdev->dev); - uint32_t ndcr = nand_readl(info, NDCR); - - /* Set an initial chunk size */ - info->chunk_size = ndcr & NDCR_PAGE_SZ ? 2048 : 512; - info->reg_ndcr = ndcr & - ~(NDCR_INT_MASK | NDCR_ND_ARB_EN | NFCV1_NDCR_ARB_CNTL); -+ info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0; - info->ndtr0cs0 = nand_readl(info, NDTR0CS0); - info->ndtr1cs0 = nand_readl(info, NDTR1CS0); - return 0; -@@ -1636,10 +1645,7 @@ static int pxa3xx_nand_scan(struct mtd_i - if (pdata->keep_config && !pxa3xx_nand_detect_config(info)) - goto KEEP_CONFIG; - -- /* Set a default chunk size */ -- info->chunk_size = PAGE_CHUNK_SIZE; -- -- ret = pxa3xx_nand_config_flash(info); -+ ret = pxa3xx_nand_config_ident(info); - if (ret) - return ret; - -@@ -1652,7 +1658,6 @@ static int pxa3xx_nand_scan(struct mtd_i - } - - KEEP_CONFIG: -- info->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0; - if (info->reg_ndcr & NDCR_DWIDTH_M) - chip->options |= NAND_BUSWIDTH_16; - -@@ -1737,6 +1742,10 @@ KEEP_CONFIG: - host->row_addr_cycles = 3; - else - host->row_addr_cycles = 2; -+ -+ if (!pdata->keep_config) -+ pxa3xx_nand_config_tail(info); -+ - return nand_scan_tail(mtd); - } - diff --git a/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch b/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch deleted file mode 100644 index 58687f36a..000000000 --- a/target/linux/mvebu/patches-4.4/023-bus-mvebu-mbus-provide-api-for-obtaining-IO-and-DRAM.patch +++ /dev/null @@ -1,94 +0,0 @@ -From: Marcin Wojtas -Date: Mon, 14 Mar 2016 09:39:02 +0100 -Subject: [PATCH] bus: mvebu-mbus: provide api for obtaining IO and DRAM window - information - -This commit enables finding appropriate mbus window and obtaining its -target id and attribute for given physical address in two separate -routines, both for IO and DRAM windows. This functionality -is needed for Armada XP/38x Network Controller's Buffer Manager and -PnC configuration. - -[gregory.clement@free-electrons.com: Fix size test for -mvebu_mbus_get_dram_win_info] - -Signed-off-by: Marcin Wojtas -[DRAM window information reference in LKv3.10] -Signed-off-by: Evan Wang -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/bus/mvebu-mbus.c -+++ b/drivers/bus/mvebu-mbus.c -@@ -948,6 +948,58 @@ void mvebu_mbus_get_pcie_io_aperture(str - *res = mbus_state.pcie_io_aperture; - } - -+int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr) -+{ -+ const struct mbus_dram_target_info *dram; -+ int i; -+ -+ /* Get dram info */ -+ dram = mv_mbus_dram_info(); -+ if (!dram) { -+ pr_err("missing DRAM information\n"); -+ return -ENODEV; -+ } -+ -+ /* Try to find matching DRAM window for phyaddr */ -+ for (i = 0; i < dram->num_cs; i++) { -+ const struct mbus_dram_window *cs = dram->cs + i; -+ -+ if (cs->base <= phyaddr && -+ phyaddr <= (cs->base + cs->size - 1)) { -+ *target = dram->mbus_dram_target_id; -+ *attr = cs->mbus_attr; -+ return 0; -+ } -+ } -+ -+ pr_err("invalid dram address 0x%x\n", phyaddr); -+ return -EINVAL; -+} -+EXPORT_SYMBOL_GPL(mvebu_mbus_get_dram_win_info); -+ -+int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target, -+ u8 *attr) -+{ -+ int win; -+ -+ for (win = 0; win < mbus_state.soc->num_wins; win++) { -+ u64 wbase; -+ int enabled; -+ -+ mvebu_mbus_read_window(&mbus_state, win, &enabled, &wbase, -+ size, target, attr, NULL); -+ -+ if (!enabled) -+ continue; -+ -+ if (wbase <= phyaddr && phyaddr <= wbase + *size) -+ return win; -+ } -+ -+ return -EINVAL; -+} -+EXPORT_SYMBOL_GPL(mvebu_mbus_get_io_win_info); -+ - static __init int mvebu_mbus_debugfs_init(void) - { - struct mvebu_mbus_state *s = &mbus_state; ---- a/include/linux/mbus.h -+++ b/include/linux/mbus.h -@@ -69,6 +69,9 @@ static inline const struct mbus_dram_tar - int mvebu_mbus_save_cpu_target(u32 *store_addr); - void mvebu_mbus_get_pcie_mem_aperture(struct resource *res); - void mvebu_mbus_get_pcie_io_aperture(struct resource *res); -+int mvebu_mbus_get_dram_win_info(phys_addr_t phyaddr, u8 *target, u8 *attr); -+int mvebu_mbus_get_io_win_info(phys_addr_t phyaddr, u32 *size, u8 *target, -+ u8 *attr); - int mvebu_mbus_add_window_remap_by_id(unsigned int target, - unsigned int attribute, - phys_addr_t base, size_t size, diff --git a/target/linux/mvebu/patches-4.4/030-mvneta-consolidate-autoneg-enabling.patch b/target/linux/mvebu/patches-4.4/030-mvneta-consolidate-autoneg-enabling.patch deleted file mode 100644 index fbee3d288..000000000 --- a/target/linux/mvebu/patches-4.4/030-mvneta-consolidate-autoneg-enabling.patch +++ /dev/null @@ -1,55 +0,0 @@ -From: Stas Sergeev -Date: Wed, 2 Dec 2015 20:33:56 +0300 -Subject: [PATCH] mvneta: consolidate autoneg enabling - -This moves autoneg-related bit manipulations to the single place. - -CC: Thomas Petazzoni -CC: netdev@vger.kernel.org -CC: linux-kernel@vger.kernel.org - -Signed-off-by: Stas Sergeev -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -1071,15 +1071,28 @@ static void mvneta_defaults_set(struct m - MVNETA_GMAC_AN_SPEED_EN | - MVNETA_GMAC_AN_DUPLEX_EN; - mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ - val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); - val |= MVNETA_GMAC_1MS_CLOCK_ENABLE; - mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -+ -+ val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -+ val |= MVNETA_GMAC2_INBAND_AN_ENABLE; -+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); - } else { - val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); - val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE | - MVNETA_GMAC_AN_SPEED_EN | - MVNETA_GMAC_AN_DUPLEX_EN); - mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ -+ val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -+ val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -+ -+ val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -+ val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE; -+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); - } - - mvneta_set_ucast_table(pp, -1); -@@ -3232,9 +3245,6 @@ static int mvneta_port_power_up(struct m - return -EINVAL; - } - -- if (pp->use_inband_status) -- ctrl |= MVNETA_GMAC2_INBAND_AN_ENABLE; -- - /* Cancel Port Reset */ - ctrl &= ~MVNETA_GMAC2_PORT_RESET; - mvreg_write(pp, MVNETA_GMAC_CTRL_2, ctrl); diff --git a/target/linux/mvebu/patches-4.4/031-mvneta-implement-ethtool-autonegotiation-control.patch b/target/linux/mvebu/patches-4.4/031-mvneta-implement-ethtool-autonegotiation-control.patch deleted file mode 100644 index 3154d7cfb..000000000 --- a/target/linux/mvebu/patches-4.4/031-mvneta-implement-ethtool-autonegotiation-control.patch +++ /dev/null @@ -1,165 +0,0 @@ -From: Stas Sergeev -Date: Wed, 2 Dec 2015 20:35:11 +0300 -Subject: [PATCH] mvneta: implement ethtool autonegotiation control - -This patch allows to do -ethtool -s eth0 autoneg off -ethtool -s eth0 autoneg on -to disable or enable autonegotiation at run-time. -Without that functionality, the only way to control the autonegotiation -is to modify the device tree. - -This is needed if you plan to use the same kernel with -different ethernet switches, the ones that support the in-band -status and the ones that not. - -CC: Thomas Petazzoni -CC: netdev@vger.kernel.org -CC: linux-kernel@vger.kernel.org - -Signed-off-by: Stas Sergeev -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -371,7 +371,7 @@ struct mvneta_port { - unsigned int duplex; - unsigned int speed; - unsigned int tx_csum_limit; -- int use_inband_status:1; -+ unsigned int use_inband_status:1; - - u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)]; - }; -@@ -977,6 +977,44 @@ static void mvneta_set_other_mcast_table - mvreg_write(pp, MVNETA_DA_FILT_OTH_MCAST + offset, val); - } - -+static void mvneta_set_autoneg(struct mvneta_port *pp, int enable) -+{ -+ u32 val; -+ -+ if (enable) { -+ val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ val &= ~(MVNETA_GMAC_FORCE_LINK_PASS | -+ MVNETA_GMAC_FORCE_LINK_DOWN | -+ MVNETA_GMAC_AN_FLOW_CTRL_EN); -+ val |= MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_AN_SPEED_EN | -+ MVNETA_GMAC_AN_DUPLEX_EN; -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ -+ val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -+ val |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -+ -+ val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -+ val |= MVNETA_GMAC2_INBAND_AN_ENABLE; -+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -+ } else { -+ val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_AN_SPEED_EN | -+ MVNETA_GMAC_AN_DUPLEX_EN); -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ -+ val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -+ val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -+ -+ val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -+ val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE; -+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -+ } -+} -+ - /* This method sets defaults to the NETA port: - * Clears interrupt Cause and Mask registers. - * Clears all MAC tables. -@@ -1062,39 +1100,7 @@ static void mvneta_defaults_set(struct m - val &= ~MVNETA_PHY_POLLING_ENABLE; - mvreg_write(pp, MVNETA_UNIT_CONTROL, val); - -- if (pp->use_inband_status) { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_FORCE_LINK_PASS | -- MVNETA_GMAC_FORCE_LINK_DOWN | -- MVNETA_GMAC_AN_FLOW_CTRL_EN); -- val |= MVNETA_GMAC_INBAND_AN_ENABLE | -- MVNETA_GMAC_AN_SPEED_EN | -- MVNETA_GMAC_AN_DUPLEX_EN; -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -- val |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -- val |= MVNETA_GMAC2_INBAND_AN_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -- } else { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE | -- MVNETA_GMAC_AN_SPEED_EN | -- MVNETA_GMAC_AN_DUPLEX_EN); -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -- val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -- val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -- } -- -+ mvneta_set_autoneg(pp, pp->use_inband_status); - mvneta_set_ucast_table(pp, -1); - mvneta_set_special_mcast_table(pp, -1); - mvneta_set_other_mcast_table(pp, -1); -@@ -2958,10 +2964,43 @@ int mvneta_ethtool_get_settings(struct n - int mvneta_ethtool_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) - { - struct mvneta_port *pp = netdev_priv(dev); -+ struct phy_device *phydev = pp->phy_dev; - -- if (!pp->phy_dev) -+ if (!phydev) - return -ENODEV; - -+ if ((cmd->autoneg == AUTONEG_ENABLE) != pp->use_inband_status) { -+ u32 val; -+ -+ mvneta_set_autoneg(pp, cmd->autoneg == AUTONEG_ENABLE); -+ -+ if (cmd->autoneg == AUTONEG_DISABLE) { -+ val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED | -+ MVNETA_GMAC_CONFIG_GMII_SPEED | -+ MVNETA_GMAC_CONFIG_FULL_DUPLEX); -+ -+ if (phydev->duplex) -+ val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; -+ -+ if (phydev->speed == SPEED_1000) -+ val |= MVNETA_GMAC_CONFIG_GMII_SPEED; -+ else if (phydev->speed == SPEED_100) -+ val |= MVNETA_GMAC_CONFIG_MII_SPEED; -+ -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ } -+ -+ pp->use_inband_status = (cmd->autoneg == AUTONEG_ENABLE); -+ netdev_info(pp->dev, "autoneg status set to %i\n", -+ pp->use_inband_status); -+ -+ if (netif_running(dev)) { -+ mvneta_port_down(pp); -+ mvneta_port_up(pp); -+ } -+ } -+ - return phy_ethtool_sset(pp->phy_dev, cmd); - } - diff --git a/target/linux/mvebu/patches-4.4/032-net-mvneta-Make-the-default-queue-related-for-each-p.patch b/target/linux/mvebu/patches-4.4/032-net-mvneta-Make-the-default-queue-related-for-each-p.patch deleted file mode 100644 index 3be47abc8..000000000 --- a/target/linux/mvebu/patches-4.4/032-net-mvneta-Make-the-default-queue-related-for-each-p.patch +++ /dev/null @@ -1,131 +0,0 @@ -From: Gregory CLEMENT -Date: Wed, 9 Dec 2015 18:23:48 +0100 -Subject: [PATCH] net: mvneta: Make the default queue related for each port - -Instead of using the same default queue for all the port. Move it in the -port struct. It will allow have a different default queue for each port. - -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -356,6 +356,7 @@ struct mvneta_port { - struct mvneta_tx_queue *txqs; - struct net_device *dev; - struct notifier_block cpu_notifier; -+ int rxq_def; - - /* Core clock */ - struct clk *clk; -@@ -819,7 +820,7 @@ static void mvneta_port_up(struct mvneta - mvreg_write(pp, MVNETA_TXQ_CMD, q_map); - - /* Enable all initialized RXQs. */ -- mvreg_write(pp, MVNETA_RXQ_CMD, BIT(rxq_def)); -+ mvreg_write(pp, MVNETA_RXQ_CMD, BIT(pp->rxq_def)); - } - - /* Stop the Ethernet port activity */ -@@ -1071,7 +1072,7 @@ static void mvneta_defaults_set(struct m - mvreg_write(pp, MVNETA_ACC_MODE, val); - - /* Update val of portCfg register accordingly with all RxQueue types */ -- val = MVNETA_PORT_CONFIG_DEFL_VALUE(rxq_def); -+ val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def); - mvreg_write(pp, MVNETA_PORT_CONFIG, val); - - val = 0; -@@ -2105,19 +2106,19 @@ static void mvneta_set_rx_mode(struct ne - if (dev->flags & IFF_PROMISC) { - /* Accept all: Multicast + Unicast */ - mvneta_rx_unicast_promisc_set(pp, 1); -- mvneta_set_ucast_table(pp, rxq_def); -- mvneta_set_special_mcast_table(pp, rxq_def); -- mvneta_set_other_mcast_table(pp, rxq_def); -+ mvneta_set_ucast_table(pp, pp->rxq_def); -+ mvneta_set_special_mcast_table(pp, pp->rxq_def); -+ mvneta_set_other_mcast_table(pp, pp->rxq_def); - } else { - /* Accept single Unicast */ - mvneta_rx_unicast_promisc_set(pp, 0); - mvneta_set_ucast_table(pp, -1); -- mvneta_mac_addr_set(pp, dev->dev_addr, rxq_def); -+ mvneta_mac_addr_set(pp, dev->dev_addr, pp->rxq_def); - - if (dev->flags & IFF_ALLMULTI) { - /* Accept all multicast */ -- mvneta_set_special_mcast_table(pp, rxq_def); -- mvneta_set_other_mcast_table(pp, rxq_def); -+ mvneta_set_special_mcast_table(pp, pp->rxq_def); -+ mvneta_set_other_mcast_table(pp, pp->rxq_def); - } else { - /* Accept only initialized multicast */ - mvneta_set_special_mcast_table(pp, -1); -@@ -2126,7 +2127,7 @@ static void mvneta_set_rx_mode(struct ne - if (!netdev_mc_empty(dev)) { - netdev_for_each_mc_addr(ha, dev) { - mvneta_mcast_addr_set(pp, ha->addr, -- rxq_def); -+ pp->rxq_def); - } - } - } -@@ -2209,7 +2210,7 @@ static int mvneta_poll(struct napi_struc - * RX packets - */ - cause_rx_tx |= port->cause_rx_tx; -- rx_done = mvneta_rx(pp, budget, &pp->rxqs[rxq_def]); -+ rx_done = mvneta_rx(pp, budget, &pp->rxqs[pp->rxq_def]); - budget -= rx_done; - - if (budget > 0) { -@@ -2422,17 +2423,17 @@ static void mvneta_cleanup_txqs(struct m - /* Cleanup all Rx queues */ - static void mvneta_cleanup_rxqs(struct mvneta_port *pp) - { -- mvneta_rxq_deinit(pp, &pp->rxqs[rxq_def]); -+ mvneta_rxq_deinit(pp, &pp->rxqs[pp->rxq_def]); - } - - - /* Init all Rx queues */ - static int mvneta_setup_rxqs(struct mvneta_port *pp) - { -- int err = mvneta_rxq_init(pp, &pp->rxqs[rxq_def]); -+ int err = mvneta_rxq_init(pp, &pp->rxqs[pp->rxq_def]); - if (err) { - netdev_err(pp->dev, "%s: can't create rxq=%d\n", -- __func__, rxq_def); -+ __func__, pp->rxq_def); - mvneta_cleanup_rxqs(pp); - return err; - } -@@ -2638,7 +2639,7 @@ static int mvneta_set_mac_addr(struct ne - mvneta_mac_addr_set(pp, dev->dev_addr, -1); - - /* Set new addr in hw */ -- mvneta_mac_addr_set(pp, sockaddr->sa_data, rxq_def); -+ mvneta_mac_addr_set(pp, sockaddr->sa_data, pp->rxq_def); - - eth_commit_mac_addr_change(dev, addr); - return 0; -@@ -2757,7 +2758,7 @@ static void mvneta_percpu_elect(struct m - { - int online_cpu_idx, cpu, i = 0; - -- online_cpu_idx = rxq_def % num_online_cpus(); -+ online_cpu_idx = pp->rxq_def % num_online_cpus(); - - for_each_online_cpu(cpu) { - if (i == online_cpu_idx) -@@ -3365,6 +3366,8 @@ static int mvneta_probe(struct platform_ - strcmp(managed, "in-band-status") == 0); - pp->cpu_notifier.notifier_call = mvneta_percpu_notifier; - -+ pp->rxq_def = rxq_def; -+ - pp->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(pp->clk)) { - err = PTR_ERR(pp->clk); diff --git a/target/linux/mvebu/patches-4.4/033-net-mvneta-Associate-RX-queues-with-each-CPU.patch b/target/linux/mvebu/patches-4.4/033-net-mvneta-Associate-RX-queues-with-each-CPU.patch deleted file mode 100644 index a08d5fdcb..000000000 --- a/target/linux/mvebu/patches-4.4/033-net-mvneta-Associate-RX-queues-with-each-CPU.patch +++ /dev/null @@ -1,278 +0,0 @@ -From: Gregory CLEMENT -Date: Wed, 9 Dec 2015 18:23:49 +0100 -Subject: [PATCH] net: mvneta: Associate RX queues with each CPU - -We enable the percpu interrupt for all the CPU and we just associate a -CPU to a few queue at the neta level. The mapping between the CPUs and -the queues is static. The queues are associated to the CPU module the -number of CPUs. However currently we only use on RX queue for a given -Ethernet port. - -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -110,9 +110,16 @@ - #define MVNETA_CPU_MAP(cpu) (0x2540 + ((cpu) << 2)) - #define MVNETA_CPU_RXQ_ACCESS_ALL_MASK 0x000000ff - #define MVNETA_CPU_TXQ_ACCESS_ALL_MASK 0x0000ff00 -+#define MVNETA_CPU_RXQ_ACCESS(rxq) BIT(rxq) - #define MVNETA_RXQ_TIME_COAL_REG(q) (0x2580 + ((q) << 2)) - --/* Exception Interrupt Port/Queue Cause register */ -+/* Exception Interrupt Port/Queue Cause register -+ * -+ * Their behavior depend of the mapping done using the PCPX2Q -+ * registers. For a given CPU if the bit associated to a queue is not -+ * set, then for the register a read from this CPU will always return -+ * 0 and a write won't do anything -+ */ - - #define MVNETA_INTR_NEW_CAUSE 0x25a0 - #define MVNETA_INTR_NEW_MASK 0x25a4 -@@ -820,7 +827,13 @@ static void mvneta_port_up(struct mvneta - mvreg_write(pp, MVNETA_TXQ_CMD, q_map); - - /* Enable all initialized RXQs. */ -- mvreg_write(pp, MVNETA_RXQ_CMD, BIT(pp->rxq_def)); -+ for (queue = 0; queue < rxq_number; queue++) { -+ struct mvneta_rx_queue *rxq = &pp->rxqs[queue]; -+ -+ if (rxq->descs != NULL) -+ q_map |= (1 << queue); -+ } -+ mvreg_write(pp, MVNETA_RXQ_CMD, q_map); - } - - /* Stop the Ethernet port activity */ -@@ -1030,6 +1043,7 @@ static void mvneta_defaults_set(struct m - int cpu; - int queue; - u32 val; -+ int max_cpu = num_present_cpus(); - - /* Clear all Cause registers */ - mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0); -@@ -1045,13 +1059,23 @@ static void mvneta_defaults_set(struct m - /* Enable MBUS Retry bit16 */ - mvreg_write(pp, MVNETA_MBUS_RETRY, 0x20); - -- /* Set CPU queue access map - all CPUs have access to all RX -- * queues and to all TX queues -+ /* Set CPU queue access map. CPUs are assigned to the RX -+ * queues modulo their number and all the TX queues are -+ * assigned to the CPU associated to the default RX queue. - */ -- for_each_present_cpu(cpu) -- mvreg_write(pp, MVNETA_CPU_MAP(cpu), -- (MVNETA_CPU_RXQ_ACCESS_ALL_MASK | -- MVNETA_CPU_TXQ_ACCESS_ALL_MASK)); -+ for_each_present_cpu(cpu) { -+ int rxq_map = 0, txq_map = 0; -+ int rxq; -+ -+ for (rxq = 0; rxq < rxq_number; rxq++) -+ if ((rxq % max_cpu) == cpu) -+ rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq); -+ -+ if (cpu == rxq_def) -+ txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK; -+ -+ mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); -+ } - - /* Reset RX and TX DMAs */ - mvreg_write(pp, MVNETA_PORT_RX_RESET, MVNETA_PORT_RX_DMA_RESET); -@@ -2178,6 +2202,7 @@ static int mvneta_poll(struct napi_struc - { - int rx_done = 0; - u32 cause_rx_tx; -+ int rx_queue; - struct mvneta_port *pp = netdev_priv(napi->dev); - struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports); - -@@ -2209,8 +2234,15 @@ static int mvneta_poll(struct napi_struc - /* For the case where the last mvneta_poll did not process all - * RX packets - */ -+ rx_queue = fls(((cause_rx_tx >> 8) & 0xff)); -+ - cause_rx_tx |= port->cause_rx_tx; -- rx_done = mvneta_rx(pp, budget, &pp->rxqs[pp->rxq_def]); -+ -+ if (rx_queue) { -+ rx_queue = rx_queue - 1; -+ rx_done = mvneta_rx(pp, budget, &pp->rxqs[rx_queue]); -+ } -+ - budget -= rx_done; - - if (budget > 0) { -@@ -2423,19 +2455,27 @@ static void mvneta_cleanup_txqs(struct m - /* Cleanup all Rx queues */ - static void mvneta_cleanup_rxqs(struct mvneta_port *pp) - { -- mvneta_rxq_deinit(pp, &pp->rxqs[pp->rxq_def]); -+ int queue; -+ -+ for (queue = 0; queue < txq_number; queue++) -+ mvneta_rxq_deinit(pp, &pp->rxqs[queue]); - } - - - /* Init all Rx queues */ - static int mvneta_setup_rxqs(struct mvneta_port *pp) - { -- int err = mvneta_rxq_init(pp, &pp->rxqs[pp->rxq_def]); -- if (err) { -- netdev_err(pp->dev, "%s: can't create rxq=%d\n", -- __func__, pp->rxq_def); -- mvneta_cleanup_rxqs(pp); -- return err; -+ int queue; -+ -+ for (queue = 0; queue < rxq_number; queue++) { -+ int err = mvneta_rxq_init(pp, &pp->rxqs[queue]); -+ -+ if (err) { -+ netdev_err(pp->dev, "%s: can't create rxq=%d\n", -+ __func__, queue); -+ mvneta_cleanup_rxqs(pp); -+ return err; -+ } - } - - return 0; -@@ -2459,6 +2499,19 @@ static int mvneta_setup_txqs(struct mvne - return 0; - } - -+static void mvneta_percpu_unmask_interrupt(void *arg) -+{ -+ struct mvneta_port *pp = arg; -+ -+ /* All the queue are unmasked, but actually only the ones -+ * maped to this CPU will be unmasked -+ */ -+ mvreg_write(pp, MVNETA_INTR_NEW_MASK, -+ MVNETA_RX_INTR_MASK_ALL | -+ MVNETA_TX_INTR_MASK_ALL | -+ MVNETA_MISCINTR_INTR_MASK); -+} -+ - static void mvneta_start_dev(struct mvneta_port *pp) - { - unsigned int cpu; -@@ -2476,11 +2529,10 @@ static void mvneta_start_dev(struct mvne - napi_enable(&port->napi); - } - -- /* Unmask interrupts */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, -- MVNETA_RX_INTR_MASK(rxq_number) | -- MVNETA_TX_INTR_MASK(txq_number) | -- MVNETA_MISCINTR_INTR_MASK); -+ /* Unmask interrupts. It has to be done from each CPU */ -+ for_each_online_cpu(cpu) -+ smp_call_function_single(cpu, mvneta_percpu_unmask_interrupt, -+ pp, true); - mvreg_write(pp, MVNETA_INTR_MISC_MASK, - MVNETA_CAUSE_PHY_STATUS_CHANGE | - MVNETA_CAUSE_LINK_CHANGE | -@@ -2756,22 +2808,35 @@ static void mvneta_percpu_disable(void * - - static void mvneta_percpu_elect(struct mvneta_port *pp) - { -- int online_cpu_idx, cpu, i = 0; -+ int online_cpu_idx, max_cpu, cpu, i = 0; - - online_cpu_idx = pp->rxq_def % num_online_cpus(); -+ max_cpu = num_present_cpus(); - - for_each_online_cpu(cpu) { -- if (i == online_cpu_idx) -- /* Enable per-CPU interrupt on the one CPU we -- * just elected -+ int rxq_map = 0, txq_map = 0; -+ int rxq; -+ -+ for (rxq = 0; rxq < rxq_number; rxq++) -+ if ((rxq % max_cpu) == cpu) -+ rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq); -+ -+ if (i == online_cpu_idx) { -+ /* Map the default receive queue and transmit -+ * queue to the elected CPU - */ -- smp_call_function_single(cpu, mvneta_percpu_enable, -- pp, true); -- else -- /* Disable per-CPU interrupt on all the other CPU */ -- smp_call_function_single(cpu, mvneta_percpu_disable, -- pp, true); -+ rxq_map |= MVNETA_CPU_RXQ_ACCESS(pp->rxq_def); -+ txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK; -+ } -+ mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); -+ -+ /* Update the interrupt mask on each CPU according the -+ * new mapping -+ */ -+ smp_call_function_single(cpu, mvneta_percpu_unmask_interrupt, -+ pp, true); - i++; -+ - } - }; - -@@ -2806,12 +2871,22 @@ static int mvneta_percpu_notifier(struct - mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); - napi_enable(&port->napi); - -+ -+ /* Enable per-CPU interrupts on the CPU that is -+ * brought up. -+ */ -+ smp_call_function_single(cpu, mvneta_percpu_enable, -+ pp, true); -+ - /* Enable per-CPU interrupt on the one CPU we care - * about. - */ - mvneta_percpu_elect(pp); - -- /* Unmask all ethernet port interrupts */ -+ /* Unmask all ethernet port interrupts, as this -+ * notifier is called for each CPU then the CPU to -+ * Queue mapping is applied -+ */ - mvreg_write(pp, MVNETA_INTR_NEW_MASK, - MVNETA_RX_INTR_MASK(rxq_number) | - MVNETA_TX_INTR_MASK(txq_number) | -@@ -2862,7 +2937,7 @@ static int mvneta_percpu_notifier(struct - static int mvneta_open(struct net_device *dev) - { - struct mvneta_port *pp = netdev_priv(dev); -- int ret; -+ int ret, cpu; - - pp->pkt_size = MVNETA_RX_PKT_SIZE(pp->dev->mtu); - pp->frag_size = SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(pp->pkt_size)) + -@@ -2892,8 +2967,13 @@ static int mvneta_open(struct net_device - */ - mvneta_percpu_disable(pp); - -- /* Elect a CPU to handle our RX queue interrupt */ -- mvneta_percpu_elect(pp); -+ /* Enable per-CPU interrupt on all the CPU to handle our RX -+ * queue interrupts -+ */ -+ for_each_online_cpu(cpu) -+ smp_call_function_single(cpu, mvneta_percpu_enable, -+ pp, true); -+ - - /* Register a CPU notifier to handle the case where our CPU - * might be taken offline. diff --git a/target/linux/mvebu/patches-4.4/034-net-mvneta-Add-naive-RSS-support.patch b/target/linux/mvebu/patches-4.4/034-net-mvneta-Add-naive-RSS-support.patch deleted file mode 100644 index ee2c71b5e..000000000 --- a/target/linux/mvebu/patches-4.4/034-net-mvneta-Add-naive-RSS-support.patch +++ /dev/null @@ -1,191 +0,0 @@ -From: Gregory CLEMENT -Date: Wed, 9 Dec 2015 18:23:50 +0100 -Subject: [PATCH] net: mvneta: Add naive RSS support - -This patch adds the support for the RSS related ethtool -function. Currently it only uses one entry in the indirection table which -allows associating an mvneta interface to a given CPU. - -Signed-off-by: Gregory CLEMENT -Tested-by: Marcin Wojtas -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -261,6 +261,11 @@ - - #define MVNETA_TX_MTU_MAX 0x3ffff - -+/* The RSS lookup table actually has 256 entries but we do not use -+ * them yet -+ */ -+#define MVNETA_RSS_LU_TABLE_SIZE 1 -+ - /* TSO header size */ - #define TSO_HEADER_SIZE 128 - -@@ -382,6 +387,8 @@ struct mvneta_port { - unsigned int use_inband_status:1; - - u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)]; -+ -+ u32 indir[MVNETA_RSS_LU_TABLE_SIZE]; - }; - - /* The mvneta_tx_desc and mvneta_rx_desc structures describe the -@@ -1071,7 +1078,7 @@ static void mvneta_defaults_set(struct m - if ((rxq % max_cpu) == cpu) - rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq); - -- if (cpu == rxq_def) -+ if (cpu == pp->rxq_def) - txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK; - - mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); -@@ -2512,6 +2519,18 @@ static void mvneta_percpu_unmask_interru - MVNETA_MISCINTR_INTR_MASK); - } - -+static void mvneta_percpu_mask_interrupt(void *arg) -+{ -+ struct mvneta_port *pp = arg; -+ -+ /* All the queue are masked, but actually only the ones -+ * maped to this CPU will be masked -+ */ -+ mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0); -+ mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0); -+ mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); -+} -+ - static void mvneta_start_dev(struct mvneta_port *pp) - { - unsigned int cpu; -@@ -3233,6 +3252,106 @@ static int mvneta_ethtool_get_sset_count - return -EOPNOTSUPP; - } - -+static u32 mvneta_ethtool_get_rxfh_indir_size(struct net_device *dev) -+{ -+ return MVNETA_RSS_LU_TABLE_SIZE; -+} -+ -+static int mvneta_ethtool_get_rxnfc(struct net_device *dev, -+ struct ethtool_rxnfc *info, -+ u32 *rules __always_unused) -+{ -+ switch (info->cmd) { -+ case ETHTOOL_GRXRINGS: -+ info->data = rxq_number; -+ return 0; -+ case ETHTOOL_GRXFH: -+ return -EOPNOTSUPP; -+ default: -+ return -EOPNOTSUPP; -+ } -+} -+ -+static int mvneta_config_rss(struct mvneta_port *pp) -+{ -+ int cpu; -+ u32 val; -+ -+ netif_tx_stop_all_queues(pp->dev); -+ -+ for_each_online_cpu(cpu) -+ smp_call_function_single(cpu, mvneta_percpu_mask_interrupt, -+ pp, true); -+ -+ /* We have to synchronise on the napi of each CPU */ -+ for_each_online_cpu(cpu) { -+ struct mvneta_pcpu_port *pcpu_port = -+ per_cpu_ptr(pp->ports, cpu); -+ -+ napi_synchronize(&pcpu_port->napi); -+ napi_disable(&pcpu_port->napi); -+ } -+ -+ pp->rxq_def = pp->indir[0]; -+ -+ /* Update unicast mapping */ -+ mvneta_set_rx_mode(pp->dev); -+ -+ /* Update val of portCfg register accordingly with all RxQueue types */ -+ val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def); -+ mvreg_write(pp, MVNETA_PORT_CONFIG, val); -+ -+ /* Update the elected CPU matching the new rxq_def */ -+ mvneta_percpu_elect(pp); -+ -+ /* We have to synchronise on the napi of each CPU */ -+ for_each_online_cpu(cpu) { -+ struct mvneta_pcpu_port *pcpu_port = -+ per_cpu_ptr(pp->ports, cpu); -+ -+ napi_enable(&pcpu_port->napi); -+ } -+ -+ netif_tx_start_all_queues(pp->dev); -+ -+ return 0; -+} -+ -+static int mvneta_ethtool_set_rxfh(struct net_device *dev, const u32 *indir, -+ const u8 *key, const u8 hfunc) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ /* We require at least one supported parameter to be changed -+ * and no change in any of the unsupported parameters -+ */ -+ if (key || -+ (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)) -+ return -EOPNOTSUPP; -+ -+ if (!indir) -+ return 0; -+ -+ memcpy(pp->indir, indir, MVNETA_RSS_LU_TABLE_SIZE); -+ -+ return mvneta_config_rss(pp); -+} -+ -+static int mvneta_ethtool_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, -+ u8 *hfunc) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ if (hfunc) -+ *hfunc = ETH_RSS_HASH_TOP; -+ -+ if (!indir) -+ return 0; -+ -+ memcpy(indir, pp->indir, MVNETA_RSS_LU_TABLE_SIZE); -+ -+ return 0; -+} -+ - static const struct net_device_ops mvneta_netdev_ops = { - .ndo_open = mvneta_open, - .ndo_stop = mvneta_stop, -@@ -3257,6 +3376,10 @@ const struct ethtool_ops mvneta_eth_tool - .get_strings = mvneta_ethtool_get_strings, - .get_ethtool_stats = mvneta_ethtool_get_stats, - .get_sset_count = mvneta_ethtool_get_sset_count, -+ .get_rxfh_indir_size = mvneta_ethtool_get_rxfh_indir_size, -+ .get_rxnfc = mvneta_ethtool_get_rxnfc, -+ .get_rxfh = mvneta_ethtool_get_rxfh, -+ .set_rxfh = mvneta_ethtool_set_rxfh, - }; - - /* Initialize hw */ -@@ -3448,6 +3571,8 @@ static int mvneta_probe(struct platform_ - - pp->rxq_def = rxq_def; - -+ pp->indir[0] = rxq_def; -+ - pp->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(pp->clk)) { - err = PTR_ERR(pp->clk); diff --git a/target/linux/mvebu/patches-4.4/035-net-mvneta-Configure-XPS-support.patch b/target/linux/mvebu/patches-4.4/035-net-mvneta-Configure-XPS-support.patch deleted file mode 100644 index 7389466b6..000000000 --- a/target/linux/mvebu/patches-4.4/035-net-mvneta-Configure-XPS-support.patch +++ /dev/null @@ -1,124 +0,0 @@ -From: Gregory CLEMENT -Date: Wed, 9 Dec 2015 18:23:51 +0100 -Subject: [PATCH] net: mvneta: Configure XPS support - -With this patch each CPU is associated with its own set of TX queues. - -It also setup the XPS with an initial configuration which set the -affinity matching the hardware configuration. - -Suggested-by: Arnd Bergmann -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -111,6 +111,7 @@ - #define MVNETA_CPU_RXQ_ACCESS_ALL_MASK 0x000000ff - #define MVNETA_CPU_TXQ_ACCESS_ALL_MASK 0x0000ff00 - #define MVNETA_CPU_RXQ_ACCESS(rxq) BIT(rxq) -+#define MVNETA_CPU_TXQ_ACCESS(txq) BIT(txq + 8) - #define MVNETA_RXQ_TIME_COAL_REG(q) (0x2580 + ((q) << 2)) - - /* Exception Interrupt Port/Queue Cause register -@@ -514,6 +515,9 @@ struct mvneta_tx_queue { - - /* DMA address of TSO headers */ - dma_addr_t tso_hdrs_phys; -+ -+ /* Affinity mask for CPUs*/ -+ cpumask_t affinity_mask; - }; - - struct mvneta_rx_queue { -@@ -1066,20 +1070,30 @@ static void mvneta_defaults_set(struct m - /* Enable MBUS Retry bit16 */ - mvreg_write(pp, MVNETA_MBUS_RETRY, 0x20); - -- /* Set CPU queue access map. CPUs are assigned to the RX -- * queues modulo their number and all the TX queues are -- * assigned to the CPU associated to the default RX queue. -+ /* Set CPU queue access map. CPUs are assigned to the RX and -+ * TX queues modulo their number. If there is only one TX -+ * queue then it is assigned to the CPU associated to the -+ * default RX queue. - */ - for_each_present_cpu(cpu) { - int rxq_map = 0, txq_map = 0; -- int rxq; -+ int rxq, txq; - - for (rxq = 0; rxq < rxq_number; rxq++) - if ((rxq % max_cpu) == cpu) - rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq); - -- if (cpu == pp->rxq_def) -- txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK; -+ for (txq = 0; txq < txq_number; txq++) -+ if ((txq % max_cpu) == cpu) -+ txq_map |= MVNETA_CPU_TXQ_ACCESS(txq); -+ -+ /* With only one TX queue we configure a special case -+ * which will allow to get all the irq on a single -+ * CPU -+ */ -+ if (txq_number == 1) -+ txq_map = (cpu == pp->rxq_def) ? -+ MVNETA_CPU_TXQ_ACCESS(1) : 0; - - mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); - } -@@ -2366,6 +2380,8 @@ static void mvneta_rxq_deinit(struct mvn - static int mvneta_txq_init(struct mvneta_port *pp, - struct mvneta_tx_queue *txq) - { -+ int cpu; -+ - txq->size = pp->tx_ring_size; - - /* A queue must always have room for at least one skb. -@@ -2418,6 +2434,14 @@ static int mvneta_txq_init(struct mvneta - } - mvneta_tx_done_pkts_coal_set(pp, txq, txq->done_pkts_coal); - -+ /* Setup XPS mapping */ -+ if (txq_number > 1) -+ cpu = txq->id % num_present_cpus(); -+ else -+ cpu = pp->rxq_def % num_present_cpus(); -+ cpumask_set_cpu(cpu, &txq->affinity_mask); -+ netif_set_xps_queue(pp->dev, &txq->affinity_mask, txq->id); -+ - return 0; - } - -@@ -2840,13 +2864,23 @@ static void mvneta_percpu_elect(struct m - if ((rxq % max_cpu) == cpu) - rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq); - -- if (i == online_cpu_idx) { -- /* Map the default receive queue and transmit -- * queue to the elected CPU -+ if (i == online_cpu_idx) -+ /* Map the default receive queue queue to the -+ * elected CPU - */ - rxq_map |= MVNETA_CPU_RXQ_ACCESS(pp->rxq_def); -- txq_map = MVNETA_CPU_TXQ_ACCESS_ALL_MASK; -- } -+ -+ /* We update the TX queue map only if we have one -+ * queue. In this case we associate the TX queue to -+ * the CPU bound to the default RX queue -+ */ -+ if (txq_number == 1) -+ txq_map = (i == online_cpu_idx) ? -+ MVNETA_CPU_TXQ_ACCESS(1) : 0; -+ else -+ txq_map = mvreg_read(pp, MVNETA_CPU_MAP(cpu)) & -+ MVNETA_CPU_TXQ_ACCESS_ALL_MASK; -+ - mvreg_write(pp, MVNETA_CPU_MAP(cpu), rxq_map | txq_map); - - /* Update the interrupt mask on each CPU according the diff --git a/target/linux/mvebu/patches-4.4/036-net-mvneta-fix-trivial-cut-off-issue-in-mvneta_ethto.patch b/target/linux/mvebu/patches-4.4/036-net-mvneta-fix-trivial-cut-off-issue-in-mvneta_ethto.patch deleted file mode 100644 index e79a11a4f..000000000 --- a/target/linux/mvebu/patches-4.4/036-net-mvneta-fix-trivial-cut-off-issue-in-mvneta_ethto.patch +++ /dev/null @@ -1,46 +0,0 @@ -From: Jisheng Zhang -Date: Wed, 20 Jan 2016 16:36:25 +0800 -Subject: [PATCH] net: mvneta: fix trivial cut-off issue in - mvneta_ethtool_update_stats - -When s->type is T_REG_64, the high 32bits are lost in val. This patch -fixes this trivial issue. - -Signed-off-by: Jisheng Zhang -Fixes: 9b0cdefa4cd5 ("net: mvneta: add ethtool statistics") -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3244,26 +3244,25 @@ static void mvneta_ethtool_update_stats( - const struct mvneta_statistic *s; - void __iomem *base = pp->base; - u32 high, low, val; -+ u64 val64; - int i; - - for (i = 0, s = mvneta_statistics; - s < mvneta_statistics + ARRAY_SIZE(mvneta_statistics); - s++, i++) { -- val = 0; -- - switch (s->type) { - case T_REG_32: - val = readl_relaxed(base + s->offset); -+ pp->ethtool_stats[i] += val; - break; - case T_REG_64: - /* Docs say to read low 32-bit then high */ - low = readl_relaxed(base + s->offset); - high = readl_relaxed(base + s->offset + 4); -- val = (u64)high << 32 | low; -+ val64 = (u64)high << 32 | low; -+ pp->ethtool_stats[i] += val64; - break; - } -- -- pp->ethtool_stats[i] += val; - } - } - diff --git a/target/linux/mvebu/patches-4.4/038-net-mvneta-Fix-the-CPU-choice-in-mvneta_percpu_elect.patch b/target/linux/mvebu/patches-4.4/038-net-mvneta-Fix-the-CPU-choice-in-mvneta_percpu_elect.patch deleted file mode 100644 index 3423307c1..000000000 --- a/target/linux/mvebu/patches-4.4/038-net-mvneta-Fix-the-CPU-choice-in-mvneta_percpu_elect.patch +++ /dev/null @@ -1,57 +0,0 @@ -From: Gregory CLEMENT -Date: Thu, 4 Feb 2016 22:09:24 +0100 -Subject: [PATCH] net: mvneta: Fix the CPU choice in mvneta_percpu_elect - -When passing to the management of multiple RX queue, the -mvneta_percpu_elect function was broken. The use of the modulo can lead -to elect the wrong cpu. For example with rxq_def=2, if the CPU 2 goes -offline and then online, we ended with the third RX queue activated in -the same time on CPU 0 and CPU2, which lead to a kernel crash. - -With this fix, we don't try to get "the closer" CPU if the default CPU is -gone, now we just use CPU 0 which always be there. Thanks to this, the -code becomes more readable, easier to maintain and more predicable. - -Cc: stable@vger.kernel.org -Fixes: 2dcf75e2793c ("net: mvneta: Associate RX queues with each CPU") -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -2851,9 +2851,14 @@ static void mvneta_percpu_disable(void * - - static void mvneta_percpu_elect(struct mvneta_port *pp) - { -- int online_cpu_idx, max_cpu, cpu, i = 0; -+ int elected_cpu = 0, max_cpu, cpu, i = 0; -+ -+ /* Use the cpu associated to the rxq when it is online, in all -+ * the other cases, use the cpu 0 which can't be offline. -+ */ -+ if (cpu_online(pp->rxq_def)) -+ elected_cpu = pp->rxq_def; - -- online_cpu_idx = pp->rxq_def % num_online_cpus(); - max_cpu = num_present_cpus(); - - for_each_online_cpu(cpu) { -@@ -2864,7 +2869,7 @@ static void mvneta_percpu_elect(struct m - if ((rxq % max_cpu) == cpu) - rxq_map |= MVNETA_CPU_RXQ_ACCESS(rxq); - -- if (i == online_cpu_idx) -+ if (cpu == elected_cpu) - /* Map the default receive queue queue to the - * elected CPU - */ -@@ -2875,7 +2880,7 @@ static void mvneta_percpu_elect(struct m - * the CPU bound to the default RX queue - */ - if (txq_number == 1) -- txq_map = (i == online_cpu_idx) ? -+ txq_map = (cpu == elected_cpu) ? - MVNETA_CPU_TXQ_ACCESS(1) : 0; - else - txq_map = mvreg_read(pp, MVNETA_CPU_MAP(cpu)) & diff --git a/target/linux/mvebu/patches-4.4/039-net-mvneta-Use-on_each_cpu-when-possible.patch b/target/linux/mvebu/patches-4.4/039-net-mvneta-Use-on_each_cpu-when-possible.patch deleted file mode 100644 index 8d22df0f9..000000000 --- a/target/linux/mvebu/patches-4.4/039-net-mvneta-Use-on_each_cpu-when-possible.patch +++ /dev/null @@ -1,68 +0,0 @@ -From: Gregory CLEMENT -Date: Thu, 4 Feb 2016 22:09:25 +0100 -Subject: [PATCH] net: mvneta: Use on_each_cpu when possible - -Instead of using a for_each_* loop in which we just call the -smp_call_function_single macro, it is more simple to directly use the -on_each_cpu macro. Moreover, this macro ensures that the calls will be -done all at once. - -Suggested-by: Russell King -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -2557,7 +2557,7 @@ static void mvneta_percpu_mask_interrupt - - static void mvneta_start_dev(struct mvneta_port *pp) - { -- unsigned int cpu; -+ int cpu; - - mvneta_max_rx_size_set(pp, pp->pkt_size); - mvneta_txq_max_tx_size_set(pp, pp->pkt_size); -@@ -2573,9 +2573,8 @@ static void mvneta_start_dev(struct mvne - } - - /* Unmask interrupts. It has to be done from each CPU */ -- for_each_online_cpu(cpu) -- smp_call_function_single(cpu, mvneta_percpu_unmask_interrupt, -- pp, true); -+ on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true); -+ - mvreg_write(pp, MVNETA_INTR_MISC_MASK, - MVNETA_CAUSE_PHY_STATUS_CHANGE | - MVNETA_CAUSE_LINK_CHANGE | -@@ -2995,7 +2994,7 @@ static int mvneta_percpu_notifier(struct - static int mvneta_open(struct net_device *dev) - { - struct mvneta_port *pp = netdev_priv(dev); -- int ret, cpu; -+ int ret; - - pp->pkt_size = MVNETA_RX_PKT_SIZE(pp->dev->mtu); - pp->frag_size = SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(pp->pkt_size)) + -@@ -3028,9 +3027,7 @@ static int mvneta_open(struct net_device - /* Enable per-CPU interrupt on all the CPU to handle our RX - * queue interrupts - */ -- for_each_online_cpu(cpu) -- smp_call_function_single(cpu, mvneta_percpu_enable, -- pp, true); -+ on_each_cpu(mvneta_percpu_enable, pp, true); - - - /* Register a CPU notifier to handle the case where our CPU -@@ -3317,9 +3314,7 @@ static int mvneta_config_rss(struct mvn - - netif_tx_stop_all_queues(pp->dev); - -- for_each_online_cpu(cpu) -- smp_call_function_single(cpu, mvneta_percpu_mask_interrupt, -- pp, true); -+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true); - - /* We have to synchronise on the napi of each CPU */ - for_each_online_cpu(cpu) { diff --git a/target/linux/mvebu/patches-4.4/040-net-mvneta-Modify-the-queue-related-fields-from-each.patch b/target/linux/mvebu/patches-4.4/040-net-mvneta-Modify-the-queue-related-fields-from-each.patch deleted file mode 100644 index acb6c94bb..000000000 --- a/target/linux/mvebu/patches-4.4/040-net-mvneta-Modify-the-queue-related-fields-from-each.patch +++ /dev/null @@ -1,179 +0,0 @@ -From: Gregory CLEMENT -Date: Thu, 4 Feb 2016 22:09:27 +0100 -Subject: [PATCH] net: mvneta: Modify the queue related fields from each cpu - -In the MVNETA_INTR_* registers, the queues related fields are per cpu, -according to the datasheet (comment in [] are added by me): -"In a multi-CPU system, bits of RX[or TX] queues for which the access by -the reading[or writing] CPU is disabled are read as 0, and cannot be -cleared[or written]." - -That means that each time we want to manipulate these bits we had to do -it on each cpu and not only on the current cpu. - -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -1040,6 +1040,43 @@ static void mvneta_set_autoneg(struct mv - } - } - -+static void mvneta_percpu_unmask_interrupt(void *arg) -+{ -+ struct mvneta_port *pp = arg; -+ -+ /* All the queue are unmasked, but actually only the ones -+ * mapped to this CPU will be unmasked -+ */ -+ mvreg_write(pp, MVNETA_INTR_NEW_MASK, -+ MVNETA_RX_INTR_MASK_ALL | -+ MVNETA_TX_INTR_MASK_ALL | -+ MVNETA_MISCINTR_INTR_MASK); -+} -+ -+static void mvneta_percpu_mask_interrupt(void *arg) -+{ -+ struct mvneta_port *pp = arg; -+ -+ /* All the queue are masked, but actually only the ones -+ * mapped to this CPU will be masked -+ */ -+ mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0); -+ mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0); -+ mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); -+} -+ -+static void mvneta_percpu_clear_intr_cause(void *arg) -+{ -+ struct mvneta_port *pp = arg; -+ -+ /* All the queue are cleared, but actually only the ones -+ * mapped to this CPU will be cleared -+ */ -+ mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0); -+ mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0); -+ mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0); -+} -+ - /* This method sets defaults to the NETA port: - * Clears interrupt Cause and Mask registers. - * Clears all MAC tables. -@@ -1057,14 +1094,10 @@ static void mvneta_defaults_set(struct m - int max_cpu = num_present_cpus(); - - /* Clear all Cause registers */ -- mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0); -- mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0); -- mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0); -+ on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true); - - /* Mask all interrupts */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); -+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true); - mvreg_write(pp, MVNETA_INTR_ENABLE, 0); - - /* Enable MBUS Retry bit16 */ -@@ -2530,31 +2563,6 @@ static int mvneta_setup_txqs(struct mvne - return 0; - } - --static void mvneta_percpu_unmask_interrupt(void *arg) --{ -- struct mvneta_port *pp = arg; -- -- /* All the queue are unmasked, but actually only the ones -- * maped to this CPU will be unmasked -- */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, -- MVNETA_RX_INTR_MASK_ALL | -- MVNETA_TX_INTR_MASK_ALL | -- MVNETA_MISCINTR_INTR_MASK); --} -- --static void mvneta_percpu_mask_interrupt(void *arg) --{ -- struct mvneta_port *pp = arg; -- -- /* All the queue are masked, but actually only the ones -- * maped to this CPU will be masked -- */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); --} -- - static void mvneta_start_dev(struct mvneta_port *pp) - { - int cpu; -@@ -2605,13 +2613,10 @@ static void mvneta_stop_dev(struct mvnet - mvneta_port_disable(pp); - - /* Clear all ethernet port interrupts */ -- mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0); -- mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0); -+ on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true); - - /* Mask all ethernet port interrupts */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); -+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true); - - mvneta_tx_reset(pp); - mvneta_rx_reset(pp); -@@ -2923,9 +2928,7 @@ static int mvneta_percpu_notifier(struct - } - - /* Mask all ethernet port interrupts */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); -+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true); - napi_enable(&port->napi); - - -@@ -2940,14 +2943,8 @@ static int mvneta_percpu_notifier(struct - */ - mvneta_percpu_elect(pp); - -- /* Unmask all ethernet port interrupts, as this -- * notifier is called for each CPU then the CPU to -- * Queue mapping is applied -- */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, -- MVNETA_RX_INTR_MASK(rxq_number) | -- MVNETA_TX_INTR_MASK(txq_number) | -- MVNETA_MISCINTR_INTR_MASK); -+ /* Unmask all ethernet port interrupts */ -+ on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true); - mvreg_write(pp, MVNETA_INTR_MISC_MASK, - MVNETA_CAUSE_PHY_STATUS_CHANGE | - MVNETA_CAUSE_LINK_CHANGE | -@@ -2958,9 +2955,7 @@ static int mvneta_percpu_notifier(struct - case CPU_DOWN_PREPARE_FROZEN: - netif_tx_stop_all_queues(pp->dev); - /* Mask all ethernet port interrupts */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0); -- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0); -+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true); - - napi_synchronize(&port->napi); - napi_disable(&port->napi); -@@ -2976,10 +2971,7 @@ static int mvneta_percpu_notifier(struct - /* Check if a new CPU must be elected now this on is down */ - mvneta_percpu_elect(pp); - /* Unmask all ethernet port interrupts */ -- mvreg_write(pp, MVNETA_INTR_NEW_MASK, -- MVNETA_RX_INTR_MASK(rxq_number) | -- MVNETA_TX_INTR_MASK(txq_number) | -- MVNETA_MISCINTR_INTR_MASK); -+ on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true); - mvreg_write(pp, MVNETA_INTR_MISC_MASK, - MVNETA_CAUSE_PHY_STATUS_CHANGE | - MVNETA_CAUSE_LINK_CHANGE | diff --git a/target/linux/mvebu/patches-4.4/041-net-mvneta-The-mvneta_percpu_elect-function-should-b.patch b/target/linux/mvebu/patches-4.4/041-net-mvneta-The-mvneta_percpu_elect-function-should-b.patch deleted file mode 100644 index 1d3d6aaf1..000000000 --- a/target/linux/mvebu/patches-4.4/041-net-mvneta-The-mvneta_percpu_elect-function-should-b.patch +++ /dev/null @@ -1,68 +0,0 @@ -From: Gregory CLEMENT -Date: Thu, 4 Feb 2016 22:09:28 +0100 -Subject: [PATCH] net: mvneta: The mvneta_percpu_elect function should be - atomic - -Electing a CPU must be done in an atomic way: it should be done after or -before the removal/insertion of a CPU and this function is not reentrant. - -During the loop of mvneta_percpu_elect we associates the queues to the -CPUs, if there is a topology change during this loop, then the mapping -between the CPUs and the queues could be wrong. During this loop the -interrupt mask is also updating for each CPUs, It should not be changed -in the same time by other part of the driver. - -This patch adds spinlock to create the needed critical sections. - -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -370,6 +370,10 @@ struct mvneta_port { - struct net_device *dev; - struct notifier_block cpu_notifier; - int rxq_def; -+ /* Protect the access to the percpu interrupt registers, -+ * ensuring that the configuration remains coherent. -+ */ -+ spinlock_t lock; - - /* Core clock */ - struct clk *clk; -@@ -2857,6 +2861,12 @@ static void mvneta_percpu_elect(struct m - { - int elected_cpu = 0, max_cpu, cpu, i = 0; - -+ /* Electing a CPU must be done in an atomic way: it should be -+ * done after or before the removal/insertion of a CPU and -+ * this function is not reentrant. -+ */ -+ spin_lock(&pp->lock); -+ - /* Use the cpu associated to the rxq when it is online, in all - * the other cases, use the cpu 0 which can't be offline. - */ -@@ -2900,6 +2910,7 @@ static void mvneta_percpu_elect(struct m - i++; - - } -+ spin_unlock(&pp->lock); - }; - - static int mvneta_percpu_notifier(struct notifier_block *nfb, -@@ -2954,8 +2965,13 @@ static int mvneta_percpu_notifier(struct - case CPU_DOWN_PREPARE: - case CPU_DOWN_PREPARE_FROZEN: - netif_tx_stop_all_queues(pp->dev); -+ /* Thanks to this lock we are sure that any pending -+ * cpu election is done -+ */ -+ spin_lock(&pp->lock); - /* Mask all ethernet port interrupts */ - on_each_cpu(mvneta_percpu_mask_interrupt, pp, true); -+ spin_unlock(&pp->lock); - - napi_synchronize(&port->napi); - napi_disable(&port->napi); diff --git a/target/linux/mvebu/patches-4.4/042-net-mvneta-Fix-race-condition-during-stopping.patch b/target/linux/mvebu/patches-4.4/042-net-mvneta-Fix-race-condition-during-stopping.patch deleted file mode 100644 index 878229cbf..000000000 --- a/target/linux/mvebu/patches-4.4/042-net-mvneta-Fix-race-condition-during-stopping.patch +++ /dev/null @@ -1,128 +0,0 @@ -From: Gregory CLEMENT -Date: Thu, 4 Feb 2016 22:09:29 +0100 -Subject: [PATCH] net: mvneta: Fix race condition during stopping - -When stopping the port, the CPU notifier are still there whereas the -mvneta_stop_dev function calls mvneta_percpu_disable() on each CPUs. -It was possible to have a new CPU coming at this point which could be -racy. - -This patch adds a flag preventing executing the code notifier for a new -CPU when the port is stopping. It also uses the spinlock introduces -previously. To avoid the deadlock, the lock has been moved outside the -mvneta_percpu_elect function. - -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -374,6 +374,7 @@ struct mvneta_port { - * ensuring that the configuration remains coherent. - */ - spinlock_t lock; -+ bool is_stopped; - - /* Core clock */ - struct clk *clk; -@@ -2857,16 +2858,14 @@ static void mvneta_percpu_disable(void * - disable_percpu_irq(pp->dev->irq); - } - -+/* Electing a CPU must be done in an atomic way: it should be done -+ * after or before the removal/insertion of a CPU and this function is -+ * not reentrant. -+ */ - static void mvneta_percpu_elect(struct mvneta_port *pp) - { - int elected_cpu = 0, max_cpu, cpu, i = 0; - -- /* Electing a CPU must be done in an atomic way: it should be -- * done after or before the removal/insertion of a CPU and -- * this function is not reentrant. -- */ -- spin_lock(&pp->lock); -- - /* Use the cpu associated to the rxq when it is online, in all - * the other cases, use the cpu 0 which can't be offline. - */ -@@ -2910,7 +2909,6 @@ static void mvneta_percpu_elect(struct m - i++; - - } -- spin_unlock(&pp->lock); - }; - - static int mvneta_percpu_notifier(struct notifier_block *nfb, -@@ -2924,6 +2922,14 @@ static int mvneta_percpu_notifier(struct - switch (action) { - case CPU_ONLINE: - case CPU_ONLINE_FROZEN: -+ spin_lock(&pp->lock); -+ /* Configuring the driver for a new CPU while the -+ * driver is stopping is racy, so just avoid it. -+ */ -+ if (pp->is_stopped) { -+ spin_unlock(&pp->lock); -+ break; -+ } - netif_tx_stop_all_queues(pp->dev); - - /* We have to synchronise on tha napi of each CPU -@@ -2961,6 +2967,7 @@ static int mvneta_percpu_notifier(struct - MVNETA_CAUSE_LINK_CHANGE | - MVNETA_CAUSE_PSC_SYNC_CHANGE); - netif_tx_start_all_queues(pp->dev); -+ spin_unlock(&pp->lock); - break; - case CPU_DOWN_PREPARE: - case CPU_DOWN_PREPARE_FROZEN: -@@ -2985,7 +2992,9 @@ static int mvneta_percpu_notifier(struct - case CPU_DEAD: - case CPU_DEAD_FROZEN: - /* Check if a new CPU must be elected now this on is down */ -+ spin_lock(&pp->lock); - mvneta_percpu_elect(pp); -+ spin_unlock(&pp->lock); - /* Unmask all ethernet port interrupts */ - on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true); - mvreg_write(pp, MVNETA_INTR_MISC_MASK, -@@ -3037,7 +3046,7 @@ static int mvneta_open(struct net_device - */ - on_each_cpu(mvneta_percpu_enable, pp, true); - -- -+ pp->is_stopped = false; - /* Register a CPU notifier to handle the case where our CPU - * might be taken offline. - */ -@@ -3070,9 +3079,18 @@ static int mvneta_stop(struct net_device - { - struct mvneta_port *pp = netdev_priv(dev); - -+ /* Inform that we are stopping so we don't want to setup the -+ * driver for new CPUs in the notifiers -+ */ -+ spin_lock(&pp->lock); -+ pp->is_stopped = true; - mvneta_stop_dev(pp); - mvneta_mdio_remove(pp); - unregister_cpu_notifier(&pp->cpu_notifier); -+ /* Now that the notifier are unregistered, we can release le -+ * lock -+ */ -+ spin_unlock(&pp->lock); - on_each_cpu(mvneta_percpu_disable, pp, true); - free_percpu_irq(dev->irq, pp->ports); - mvneta_cleanup_rxqs(pp); -@@ -3343,7 +3361,9 @@ static int mvneta_config_rss(struct mvn - mvreg_write(pp, MVNETA_PORT_CONFIG, val); - - /* Update the elected CPU matching the new rxq_def */ -+ spin_lock(&pp->lock); - mvneta_percpu_elect(pp); -+ spin_unlock(&pp->lock); - - /* We have to synchronise on the napi of each CPU */ - for_each_online_cpu(cpu) { diff --git a/target/linux/mvebu/patches-4.4/043-net-mvneta-sort-the-headers-in-alphabetic-order.patch b/target/linux/mvebu/patches-4.4/043-net-mvneta-sort-the-headers-in-alphabetic-order.patch deleted file mode 100644 index 502c2584d..000000000 --- a/target/linux/mvebu/patches-4.4/043-net-mvneta-sort-the-headers-in-alphabetic-order.patch +++ /dev/null @@ -1,56 +0,0 @@ -From: Jisheng Zhang -Date: Wed, 20 Jan 2016 19:27:22 +0800 -Subject: [PATCH] net: mvneta: sort the headers in alphabetic order - -Sorting the headers in alphabetic order will help to reduce the conflict -when adding new headers in the future. - -Signed-off-by: Jisheng Zhang -Acked-by: Thomas Petazzoni -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -11,28 +11,28 @@ - * warranty of any kind, whether express or implied. - */ - --#include --#include -+#include -+#include - #include --#include --#include -+#include - #include --#include --#include - #include --#include --#include --#include - #include --#include -+#include -+#include -+#include -+#include - #include -+#include - #include - #include - #include --#include - #include --#include --#include -+#include -+#include -+#include -+#include -+#include - - /* Registers */ - #define MVNETA_RXQ_CONFIG_REG(q) (0x1400 + ((q) << 2)) diff --git a/target/linux/mvebu/patches-4.4/044-net-add-a-hardware-buffer-management-helper-API.patch b/target/linux/mvebu/patches-4.4/044-net-add-a-hardware-buffer-management-helper-API.patch deleted file mode 100644 index d4bc6a008..000000000 --- a/target/linux/mvebu/patches-4.4/044-net-add-a-hardware-buffer-management-helper-API.patch +++ /dev/null @@ -1,159 +0,0 @@ -From: Gregory CLEMENT -Date: Mon, 14 Mar 2016 09:39:04 +0100 -Subject: [PATCH] net: add a hardware buffer management helper API - -This basic implementation allows to share code between driver using -hardware buffer management. As the code is hardware agnostic, there is -few helpers, most of the optimization brought by the an HW BM has to be -done at driver level. - -Tested-by: Sebastian Careba -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - create mode 100644 include/net/hwbm.h - create mode 100644 net/core/hwbm.c - ---- /dev/null -+++ b/include/net/hwbm.h -@@ -0,0 +1,28 @@ -+#ifndef _HWBM_H -+#define _HWBM_H -+ -+struct hwbm_pool { -+ /* Capacity of the pool */ -+ int size; -+ /* Size of the buffers managed */ -+ int frag_size; -+ /* Number of buffers currently used by this pool */ -+ int buf_num; -+ /* constructor called during alocation */ -+ int (*construct)(struct hwbm_pool *bm_pool, void *buf); -+ /* protect acces to the buffer counter*/ -+ spinlock_t lock; -+ /* private data */ -+ void *priv; -+}; -+#ifdef CONFIG_HWBM -+void hwbm_buf_free(struct hwbm_pool *bm_pool, void *buf); -+int hwbm_pool_refill(struct hwbm_pool *bm_pool, gfp_t gfp); -+int hwbm_pool_add(struct hwbm_pool *bm_pool, unsigned int buf_num, gfp_t gfp); -+#else -+void hwbm_buf_free(struct hwbm_pool *bm_pool, void *buf) {} -+int hwbm_pool_refill(struct hwbm_pool *bm_pool, gfp_t gfp) { return 0; } -+int hwbm_pool_add(struct hwbm_pool *bm_pool, unsigned int buf_num, gfp_t gfp) -+{ return 0; } -+#endif /* CONFIG_HWBM */ -+#endif /* _HWBM_H */ ---- a/net/Kconfig -+++ b/net/Kconfig -@@ -259,6 +259,9 @@ config XPS - depends on SMP - default y - -+config HWBM -+ bool -+ - config CGROUP_NET_PRIO - bool "Network priority cgroup" - depends on CGROUPS ---- a/net/core/Makefile -+++ b/net/core/Makefile -@@ -14,6 +14,7 @@ obj-y += dev.o ethtool.o dev_addr_ - obj-$(CONFIG_SOCK_DIAG) += sock_diag.o - obj-$(CONFIG_XFRM) += flow.o - obj-y += net-sysfs.o -+obj-$(CONFIG_HWBM) += hwbm.o - obj-$(CONFIG_PROC_FS) += net-procfs.o - obj-$(CONFIG_NET_PKTGEN) += pktgen.o - obj-$(CONFIG_NETPOLL) += netpoll.o ---- /dev/null -+++ b/net/core/hwbm.c -@@ -0,0 +1,87 @@ -+/* Support for hardware buffer manager. -+ * -+ * Copyright (C) 2016 Marvell -+ * -+ * Gregory CLEMENT -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+#include -+#include -+#include -+#include -+ -+void hwbm_buf_free(struct hwbm_pool *bm_pool, void *buf) -+{ -+ if (likely(bm_pool->frag_size <= PAGE_SIZE)) -+ skb_free_frag(buf); -+ else -+ kfree(buf); -+} -+EXPORT_SYMBOL_GPL(hwbm_buf_free); -+ -+/* Refill processing for HW buffer management */ -+int hwbm_pool_refill(struct hwbm_pool *bm_pool, gfp_t gfp) -+{ -+ int frag_size = bm_pool->frag_size; -+ void *buf; -+ -+ if (likely(frag_size <= PAGE_SIZE)) -+ buf = netdev_alloc_frag(frag_size); -+ else -+ buf = kmalloc(frag_size, gfp); -+ -+ if (!buf) -+ return -ENOMEM; -+ -+ if (bm_pool->construct) -+ if (bm_pool->construct(bm_pool, buf)) { -+ hwbm_buf_free(bm_pool, buf); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(hwbm_pool_refill); -+ -+int hwbm_pool_add(struct hwbm_pool *bm_pool, unsigned int buf_num, gfp_t gfp) -+{ -+ int err, i; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&bm_pool->lock, flags); -+ if (bm_pool->buf_num == bm_pool->size) { -+ pr_warn("pool already filled\n"); -+ return bm_pool->buf_num; -+ } -+ -+ if (buf_num + bm_pool->buf_num > bm_pool->size) { -+ pr_warn("cannot allocate %d buffers for pool\n", -+ buf_num); -+ return 0; -+ } -+ -+ if ((buf_num + bm_pool->buf_num) < bm_pool->buf_num) { -+ pr_warn("Adding %d buffers to the %d current buffers will overflow\n", -+ buf_num, bm_pool->buf_num); -+ return 0; -+ } -+ -+ for (i = 0; i < buf_num; i++) { -+ err = hwbm_pool_refill(bm_pool, gfp); -+ if (err < 0) -+ break; -+ } -+ -+ /* Update BM driver with number of buffers added to pool */ -+ bm_pool->buf_num += i; -+ -+ pr_debug("hwpm pool: %d of %d buffers added\n", i, buf_num); -+ spin_unlock_irqrestore(&bm_pool->lock, flags); -+ -+ return i; -+} -+EXPORT_SYMBOL_GPL(hwbm_pool_add); diff --git a/target/linux/mvebu/patches-4.4/045-net-mvneta-bm-add-support-for-hardware-buffer-manage.patch b/target/linux/mvebu/patches-4.4/045-net-mvneta-bm-add-support-for-hardware-buffer-manage.patch deleted file mode 100644 index a1b5ca8c6..000000000 --- a/target/linux/mvebu/patches-4.4/045-net-mvneta-bm-add-support-for-hardware-buffer-manage.patch +++ /dev/null @@ -1,1684 +0,0 @@ -From: Marcin Wojtas -Date: Mon, 14 Mar 2016 09:39:03 +0100 -Subject: [PATCH] net: mvneta: bm: add support for hardware buffer management - -Buffer manager (BM) is a dedicated hardware unit that can be used by all -ethernet ports of Armada XP and 38x SoC's. It allows to offload CPU on RX -path by sparing DRAM access on refilling buffer pool, hardware-based -filling of descriptor ring data and better memory utilization due to HW -arbitration for using 'short' pools for small packets. - -Tests performed with A388 SoC working as a network bridge between two -packet generators showed increase of maximum processed 64B packets by -~20k (~555k packets with BM enabled vs ~535 packets without BM). Also -when pushing 1500B-packets with a line rate achieved, CPU load decreased -from around 25% without BM to 20% with BM. - -BM comprise up to 4 buffer pointers' (BP) rings kept in DRAM, which -are called external BP pools - BPPE. Allocating and releasing buffer -pointers (BP) to/from BPPE is performed indirectly by write/read access -to a dedicated internal SRAM, where internal BP pools (BPPI) are placed. -BM hardware controls status of BPPE automatically, as well as assigning -proper buffers to RX descriptors. For more details please refer to -Functional Specification of Armada XP or 38x SoC. - -In order to enable support for a separate hardware block, common for all -ports, a new driver has to be implemented ('mvneta_bm'). It provides -initialization sequence of address space, clocks, registers, SRAM, -empty pools' structures and also obtaining optional configuration -from DT (please refer to device tree binding documentation). mvneta_bm -exposes also a necessary API to mvneta driver, as well as a dedicated -structure with BM information (bm_priv), whose presence is used as a -flag notifying of BM usage by port. It has to be ensured that mvneta_bm -probe is executed prior to the ones in ports' driver. In case BM is not -used or its probe fails, mvneta falls back to use software buffer -management. - -A sequence executed in mvneta_probe function is modified in order to have -an access to needed resources before possible port's BM initialization is -done. According to port-pools mapping provided by DT appropriate registers -are configured and the buffer pools are filled. RX path is modified -accordingly. Becaues the hardware allows a wide variety of configuration -options, following assumptions are made: -* using BM mechanisms can be selectively disabled/enabled basing - on DT configuration among the ports -* 'long' pool's single buffer size is tied to port's MTU -* using 'long' pool by port is obligatory and it cannot be shared -* using 'short' pool for smaller packets is optional -* one 'short' pool can be shared among all ports - -This commit enables hardware buffer management operation cooperating with -existing mvneta driver. New device tree binding documentation is added and -the one of mvneta is updated accordingly. - -[gregory.clement@free-electrons.com: removed the suspend/resume part] - -Signed-off-by: Marcin Wojtas -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - create mode 100644 Documentation/devicetree/bindings/net/marvell-neta-bm.txt - create mode 100644 drivers/net/ethernet/marvell/mvneta_bm.c - create mode 100644 drivers/net/ethernet/marvell/mvneta_bm.h - ---- a/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt -+++ b/Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt -@@ -13,15 +13,30 @@ Optional properties: - Value is presented in bytes. If not used, by default 1600B is set for - "marvell,armada-370-neta" and 9800B for others. - -+Optional properties (valid only for Armada XP/38x): -+ -+- buffer-manager: a phandle to a buffer manager node. Please refer to -+ Documentation/devicetree/bindings/net/marvell-neta-bm.txt -+- bm,pool-long: ID of a pool, that will accept all packets of a size -+ higher than 'short' pool's threshold (if set) and up to MTU value. -+ Obligatory, when the port is supposed to use hardware -+ buffer management. -+- bm,pool-short: ID of a pool, that will be used for accepting -+ packets of a size lower than given threshold. If not set, the port -+ will use a single 'long' pool for all packets, as defined above. -+ - Example: - --ethernet@d0070000 { -+ethernet@70000 { - compatible = "marvell,armada-370-neta"; -- reg = <0xd0070000 0x2500>; -+ reg = <0x70000 0x2500>; - interrupts = <8>; - clocks = <&gate_clk 4>; - tx-csum-limit = <9800> - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <1>; - }; ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/marvell-neta-bm.txt -@@ -0,0 +1,49 @@ -+* Marvell Armada 380/XP Buffer Manager driver (BM) -+ -+Required properties: -+ -+- compatible: should be "marvell,armada-380-neta-bm". -+- reg: address and length of the register set for the device. -+- clocks: a pointer to the reference clock for this device. -+- internal-mem: a phandle to BM internal SRAM definition. -+ -+Optional properties (port): -+ -+- pool<0 : 3>,capacity: size of external buffer pointers' ring maintained -+ in DRAM. Can be set for each pool (id 0 : 3) separately. The value has -+ to be chosen between 128 and 16352 and it also has to be aligned to 32. -+ Otherwise the driver would adjust a given number or choose default if -+ not set. -+- pool<0 : 3>,pkt-size: maximum size of a packet accepted by a given buffer -+ pointers' pool (id 0 : 3). It will be taken into consideration only when pool -+ type is 'short'. For 'long' ones it would be overridden by port's MTU. -+ If not set a driver will choose a default value. -+ -+In order to see how to hook the BM to a given ethernet port, please -+refer to Documentation/devicetree/bindings/net/marvell-armada-370-neta.txt. -+ -+Example: -+ -+- main node: -+ -+bm: bm@c8000 { -+ compatible = "marvell,armada-380-neta-bm"; -+ reg = <0xc8000 0xac>; -+ clocks = <&gateclk 13>; -+ internal-mem = <&bm_bppi>; -+ status = "okay"; -+ pool2,capacity = <4096>; -+ pool1,pkt-size = <512>; -+}; -+ -+- internal SRAM node: -+ -+bm_bppi: bm-bppi { -+ compatible = "mmio-sram"; -+ reg = ; -+ ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ clocks = <&gateclk 13>; -+ status = "okay"; -+}; ---- a/drivers/net/ethernet/marvell/Kconfig -+++ b/drivers/net/ethernet/marvell/Kconfig -@@ -40,6 +40,19 @@ config MVMDIO - - This driver is used by the MV643XX_ETH and MVNETA drivers. - -+config MVNETA_BM -+ tristate "Marvell Armada 38x/XP network interface BM support" -+ depends on MVNETA -+ ---help--- -+ This driver supports auxiliary block of the network -+ interface units in the Marvell ARMADA XP and ARMADA 38x SoC -+ family, which is called buffer manager. -+ -+ This driver, when enabled, strictly cooperates with mvneta -+ driver and is common for all network ports of the devices, -+ even for Armada 370 SoC, which doesn't support hardware -+ buffer management. -+ - config MVNETA - tristate "Marvell Armada 370/38x/XP network interface support" - depends on PLAT_ORION ---- a/drivers/net/ethernet/marvell/Makefile -+++ b/drivers/net/ethernet/marvell/Makefile -@@ -4,6 +4,7 @@ - - obj-$(CONFIG_MVMDIO) += mvmdio.o - obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o -+obj-$(CONFIG_MVNETA_BM) += mvneta_bm.o - obj-$(CONFIG_MVNETA) += mvneta.o - obj-$(CONFIG_MVPP2) += mvpp2.o - obj-$(CONFIG_PXA168_ETH) += pxa168_eth.o ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include "mvneta_bm.h" - #include - #include - #include -@@ -37,6 +38,10 @@ - /* Registers */ - #define MVNETA_RXQ_CONFIG_REG(q) (0x1400 + ((q) << 2)) - #define MVNETA_RXQ_HW_BUF_ALLOC BIT(0) -+#define MVNETA_RXQ_SHORT_POOL_ID_SHIFT 4 -+#define MVNETA_RXQ_SHORT_POOL_ID_MASK 0x30 -+#define MVNETA_RXQ_LONG_POOL_ID_SHIFT 6 -+#define MVNETA_RXQ_LONG_POOL_ID_MASK 0xc0 - #define MVNETA_RXQ_PKT_OFFSET_ALL_MASK (0xf << 8) - #define MVNETA_RXQ_PKT_OFFSET_MASK(offs) ((offs) << 8) - #define MVNETA_RXQ_THRESHOLD_REG(q) (0x14c0 + ((q) << 2)) -@@ -50,6 +55,9 @@ - #define MVNETA_RXQ_STATUS_UPDATE_REG(q) (0x1500 + ((q) << 2)) - #define MVNETA_RXQ_ADD_NON_OCCUPIED_SHIFT 16 - #define MVNETA_RXQ_ADD_NON_OCCUPIED_MAX 255 -+#define MVNETA_PORT_POOL_BUFFER_SZ_REG(pool) (0x1700 + ((pool) << 2)) -+#define MVNETA_PORT_POOL_BUFFER_SZ_SHIFT 3 -+#define MVNETA_PORT_POOL_BUFFER_SZ_MASK 0xfff8 - #define MVNETA_PORT_RX_RESET 0x1cc0 - #define MVNETA_PORT_RX_DMA_RESET BIT(0) - #define MVNETA_PHY_ADDR 0x2000 -@@ -107,6 +115,7 @@ - #define MVNETA_GMAC_CLOCK_DIVIDER 0x24f4 - #define MVNETA_GMAC_1MS_CLOCK_ENABLE BIT(31) - #define MVNETA_ACC_MODE 0x2500 -+#define MVNETA_BM_ADDRESS 0x2504 - #define MVNETA_CPU_MAP(cpu) (0x2540 + ((cpu) << 2)) - #define MVNETA_CPU_RXQ_ACCESS_ALL_MASK 0x000000ff - #define MVNETA_CPU_TXQ_ACCESS_ALL_MASK 0x0000ff00 -@@ -253,7 +262,10 @@ - #define MVNETA_CPU_D_CACHE_LINE_SIZE 32 - #define MVNETA_TX_CSUM_DEF_SIZE 1600 - #define MVNETA_TX_CSUM_MAX_SIZE 9800 --#define MVNETA_ACC_MODE_EXT 1 -+#define MVNETA_ACC_MODE_EXT1 1 -+#define MVNETA_ACC_MODE_EXT2 2 -+ -+#define MVNETA_MAX_DECODE_WIN 6 - - /* Timeout constants */ - #define MVNETA_TX_DISABLE_TIMEOUT_MSEC 1000 -@@ -293,7 +305,8 @@ - ((addr >= txq->tso_hdrs_phys) && \ - (addr < txq->tso_hdrs_phys + txq->size * TSO_HEADER_SIZE)) - --#define MVNETA_RX_BUF_SIZE(pkt_size) ((pkt_size) + NET_SKB_PAD) -+#define MVNETA_RX_GET_BM_POOL_ID(rxd) \ -+ (((rxd)->status & MVNETA_RXD_BM_POOL_MASK) >> MVNETA_RXD_BM_POOL_SHIFT) - - struct mvneta_statistic { - unsigned short offset; -@@ -359,6 +372,7 @@ struct mvneta_pcpu_port { - }; - - struct mvneta_port { -+ u8 id; - struct mvneta_pcpu_port __percpu *ports; - struct mvneta_pcpu_stats __percpu *stats; - -@@ -392,6 +406,11 @@ struct mvneta_port { - unsigned int tx_csum_limit; - unsigned int use_inband_status:1; - -+ struct mvneta_bm *bm_priv; -+ struct mvneta_bm_pool *pool_long; -+ struct mvneta_bm_pool *pool_short; -+ int bm_win_id; -+ - u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)]; - - u32 indir[MVNETA_RSS_LU_TABLE_SIZE]; -@@ -417,6 +436,8 @@ struct mvneta_port { - #define MVNETA_TX_L4_CSUM_NOT BIT(31) - - #define MVNETA_RXD_ERR_CRC 0x0 -+#define MVNETA_RXD_BM_POOL_SHIFT 13 -+#define MVNETA_RXD_BM_POOL_MASK (BIT(13) | BIT(14)) - #define MVNETA_RXD_ERR_SUMMARY BIT(16) - #define MVNETA_RXD_ERR_OVERRUN BIT(17) - #define MVNETA_RXD_ERR_LEN BIT(18) -@@ -561,6 +582,9 @@ static int rxq_def; - - static int rx_copybreak __read_mostly = 256; - -+/* HW BM need that each port be identify by a unique ID */ -+static int global_port_id; -+ - #define MVNETA_DRIVER_NAME "mvneta" - #define MVNETA_DRIVER_VERSION "1.0" - -@@ -827,6 +851,214 @@ static void mvneta_rxq_bm_disable(struct - mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); - } - -+/* Enable buffer management (BM) */ -+static void mvneta_rxq_bm_enable(struct mvneta_port *pp, -+ struct mvneta_rx_queue *rxq) -+{ -+ u32 val; -+ -+ val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); -+ val |= MVNETA_RXQ_HW_BUF_ALLOC; -+ mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); -+} -+ -+/* Notify HW about port's assignment of pool for bigger packets */ -+static void mvneta_rxq_long_pool_set(struct mvneta_port *pp, -+ struct mvneta_rx_queue *rxq) -+{ -+ u32 val; -+ -+ val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); -+ val &= ~MVNETA_RXQ_LONG_POOL_ID_MASK; -+ val |= (pp->pool_long->id << MVNETA_RXQ_LONG_POOL_ID_SHIFT); -+ -+ mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); -+} -+ -+/* Notify HW about port's assignment of pool for smaller packets */ -+static void mvneta_rxq_short_pool_set(struct mvneta_port *pp, -+ struct mvneta_rx_queue *rxq) -+{ -+ u32 val; -+ -+ val = mvreg_read(pp, MVNETA_RXQ_CONFIG_REG(rxq->id)); -+ val &= ~MVNETA_RXQ_SHORT_POOL_ID_MASK; -+ val |= (pp->pool_short->id << MVNETA_RXQ_SHORT_POOL_ID_SHIFT); -+ -+ mvreg_write(pp, MVNETA_RXQ_CONFIG_REG(rxq->id), val); -+} -+ -+/* Set port's receive buffer size for assigned BM pool */ -+static inline void mvneta_bm_pool_bufsize_set(struct mvneta_port *pp, -+ int buf_size, -+ u8 pool_id) -+{ -+ u32 val; -+ -+ if (!IS_ALIGNED(buf_size, 8)) { -+ dev_warn(pp->dev->dev.parent, -+ "illegal buf_size value %d, round to %d\n", -+ buf_size, ALIGN(buf_size, 8)); -+ buf_size = ALIGN(buf_size, 8); -+ } -+ -+ val = mvreg_read(pp, MVNETA_PORT_POOL_BUFFER_SZ_REG(pool_id)); -+ val |= buf_size & MVNETA_PORT_POOL_BUFFER_SZ_MASK; -+ mvreg_write(pp, MVNETA_PORT_POOL_BUFFER_SZ_REG(pool_id), val); -+} -+ -+/* Configure MBUS window in order to enable access BM internal SRAM */ -+static int mvneta_mbus_io_win_set(struct mvneta_port *pp, u32 base, u32 wsize, -+ u8 target, u8 attr) -+{ -+ u32 win_enable, win_protect; -+ int i; -+ -+ win_enable = mvreg_read(pp, MVNETA_BASE_ADDR_ENABLE); -+ -+ if (pp->bm_win_id < 0) { -+ /* Find first not occupied window */ -+ for (i = 0; i < MVNETA_MAX_DECODE_WIN; i++) { -+ if (win_enable & (1 << i)) { -+ pp->bm_win_id = i; -+ break; -+ } -+ } -+ if (i == MVNETA_MAX_DECODE_WIN) -+ return -ENOMEM; -+ } else { -+ i = pp->bm_win_id; -+ } -+ -+ mvreg_write(pp, MVNETA_WIN_BASE(i), 0); -+ mvreg_write(pp, MVNETA_WIN_SIZE(i), 0); -+ -+ if (i < 4) -+ mvreg_write(pp, MVNETA_WIN_REMAP(i), 0); -+ -+ mvreg_write(pp, MVNETA_WIN_BASE(i), (base & 0xffff0000) | -+ (attr << 8) | target); -+ -+ mvreg_write(pp, MVNETA_WIN_SIZE(i), (wsize - 1) & 0xffff0000); -+ -+ win_protect = mvreg_read(pp, MVNETA_ACCESS_PROTECT_ENABLE); -+ win_protect |= 3 << (2 * i); -+ mvreg_write(pp, MVNETA_ACCESS_PROTECT_ENABLE, win_protect); -+ -+ win_enable &= ~(1 << i); -+ mvreg_write(pp, MVNETA_BASE_ADDR_ENABLE, win_enable); -+ -+ return 0; -+} -+ -+/* Assign and initialize pools for port. In case of fail -+ * buffer manager will remain disabled for current port. -+ */ -+static int mvneta_bm_port_init(struct platform_device *pdev, -+ struct mvneta_port *pp) -+{ -+ struct device_node *dn = pdev->dev.of_node; -+ u32 long_pool_id, short_pool_id, wsize; -+ u8 target, attr; -+ int err; -+ -+ /* Get BM window information */ -+ err = mvebu_mbus_get_io_win_info(pp->bm_priv->bppi_phys_addr, &wsize, -+ &target, &attr); -+ if (err < 0) -+ return err; -+ -+ pp->bm_win_id = -1; -+ -+ /* Open NETA -> BM window */ -+ err = mvneta_mbus_io_win_set(pp, pp->bm_priv->bppi_phys_addr, wsize, -+ target, attr); -+ if (err < 0) { -+ netdev_info(pp->dev, "fail to configure mbus window to BM\n"); -+ return err; -+ } -+ -+ if (of_property_read_u32(dn, "bm,pool-long", &long_pool_id)) { -+ netdev_info(pp->dev, "missing long pool id\n"); -+ return -EINVAL; -+ } -+ -+ /* Create port's long pool depending on mtu */ -+ pp->pool_long = mvneta_bm_pool_use(pp->bm_priv, long_pool_id, -+ MVNETA_BM_LONG, pp->id, -+ MVNETA_RX_PKT_SIZE(pp->dev->mtu)); -+ if (!pp->pool_long) { -+ netdev_info(pp->dev, "fail to obtain long pool for port\n"); -+ return -ENOMEM; -+ } -+ -+ pp->pool_long->port_map |= 1 << pp->id; -+ -+ mvneta_bm_pool_bufsize_set(pp, pp->pool_long->buf_size, -+ pp->pool_long->id); -+ -+ /* If short pool id is not defined, assume using single pool */ -+ if (of_property_read_u32(dn, "bm,pool-short", &short_pool_id)) -+ short_pool_id = long_pool_id; -+ -+ /* Create port's short pool */ -+ pp->pool_short = mvneta_bm_pool_use(pp->bm_priv, short_pool_id, -+ MVNETA_BM_SHORT, pp->id, -+ MVNETA_BM_SHORT_PKT_SIZE); -+ if (!pp->pool_short) { -+ netdev_info(pp->dev, "fail to obtain short pool for port\n"); -+ mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); -+ return -ENOMEM; -+ } -+ -+ if (short_pool_id != long_pool_id) { -+ pp->pool_short->port_map |= 1 << pp->id; -+ mvneta_bm_pool_bufsize_set(pp, pp->pool_short->buf_size, -+ pp->pool_short->id); -+ } -+ -+ return 0; -+} -+ -+/* Update settings of a pool for bigger packets */ -+static void mvneta_bm_update_mtu(struct mvneta_port *pp, int mtu) -+{ -+ struct mvneta_bm_pool *bm_pool = pp->pool_long; -+ int num; -+ -+ /* Release all buffers from long pool */ -+ mvneta_bm_bufs_free(pp->bm_priv, bm_pool, 1 << pp->id); -+ if (bm_pool->buf_num) { -+ WARN(1, "cannot free all buffers in pool %d\n", -+ bm_pool->id); -+ goto bm_mtu_err; -+ } -+ -+ bm_pool->pkt_size = MVNETA_RX_PKT_SIZE(mtu); -+ bm_pool->buf_size = MVNETA_RX_BUF_SIZE(bm_pool->pkt_size); -+ bm_pool->frag_size = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + -+ SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(bm_pool->pkt_size)); -+ -+ /* Fill entire long pool */ -+ num = mvneta_bm_bufs_add(pp->bm_priv, bm_pool, bm_pool->size); -+ if (num != bm_pool->size) { -+ WARN(1, "pool %d: %d of %d allocated\n", -+ bm_pool->id, num, bm_pool->size); -+ goto bm_mtu_err; -+ } -+ mvneta_bm_pool_bufsize_set(pp, bm_pool->buf_size, bm_pool->id); -+ -+ return; -+ -+bm_mtu_err: -+ mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); -+ mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, 1 << pp->id); -+ -+ pp->bm_priv = NULL; -+ mvreg_write(pp, MVNETA_ACC_MODE, MVNETA_ACC_MODE_EXT1); -+ netdev_info(pp->dev, "fail to update MTU, fall back to software BM\n"); -+} -+ - /* Start the Ethernet port RX and TX activity */ - static void mvneta_port_up(struct mvneta_port *pp) - { -@@ -1151,9 +1383,17 @@ static void mvneta_defaults_set(struct m - mvreg_write(pp, MVNETA_PORT_RX_RESET, 0); - - /* Set Port Acceleration Mode */ -- val = MVNETA_ACC_MODE_EXT; -+ if (pp->bm_priv) -+ /* HW buffer management + legacy parser */ -+ val = MVNETA_ACC_MODE_EXT2; -+ else -+ /* SW buffer management + legacy parser */ -+ val = MVNETA_ACC_MODE_EXT1; - mvreg_write(pp, MVNETA_ACC_MODE, val); - -+ if (pp->bm_priv) -+ mvreg_write(pp, MVNETA_BM_ADDRESS, pp->bm_priv->bppi_phys_addr); -+ - /* Update val of portCfg register accordingly with all RxQueue types */ - val = MVNETA_PORT_CONFIG_DEFL_VALUE(pp->rxq_def); - mvreg_write(pp, MVNETA_PORT_CONFIG, val); -@@ -1520,23 +1760,25 @@ static void mvneta_txq_done(struct mvnet - } - } - --static void *mvneta_frag_alloc(const struct mvneta_port *pp) -+void *mvneta_frag_alloc(unsigned int frag_size) - { -- if (likely(pp->frag_size <= PAGE_SIZE)) -- return netdev_alloc_frag(pp->frag_size); -+ if (likely(frag_size <= PAGE_SIZE)) -+ return netdev_alloc_frag(frag_size); - else -- return kmalloc(pp->frag_size, GFP_ATOMIC); -+ return kmalloc(frag_size, GFP_ATOMIC); - } -+EXPORT_SYMBOL_GPL(mvneta_frag_alloc); - --static void mvneta_frag_free(const struct mvneta_port *pp, void *data) -+void mvneta_frag_free(unsigned int frag_size, void *data) - { -- if (likely(pp->frag_size <= PAGE_SIZE)) -+ if (likely(frag_size <= PAGE_SIZE)) - skb_free_frag(data); - else - kfree(data); - } -+EXPORT_SYMBOL_GPL(mvneta_frag_free); - --/* Refill processing */ -+/* Refill processing for SW buffer management */ - static int mvneta_rx_refill(struct mvneta_port *pp, - struct mvneta_rx_desc *rx_desc) - -@@ -1544,7 +1786,7 @@ static int mvneta_rx_refill(struct mvnet - dma_addr_t phys_addr; - void *data; - -- data = mvneta_frag_alloc(pp); -+ data = mvneta_frag_alloc(pp->frag_size); - if (!data) - return -ENOMEM; - -@@ -1552,7 +1794,7 @@ static int mvneta_rx_refill(struct mvnet - MVNETA_RX_BUF_SIZE(pp->pkt_size), - DMA_FROM_DEVICE); - if (unlikely(dma_mapping_error(pp->dev->dev.parent, phys_addr))) { -- mvneta_frag_free(pp, data); -+ mvneta_frag_free(pp->frag_size, data); - return -ENOMEM; - } - -@@ -1598,22 +1840,156 @@ static void mvneta_rxq_drop_pkts(struct - int rx_done, i; - - rx_done = mvneta_rxq_busy_desc_num_get(pp, rxq); -+ if (rx_done) -+ mvneta_rxq_desc_num_update(pp, rxq, rx_done, rx_done); -+ -+ if (pp->bm_priv) { -+ for (i = 0; i < rx_done; i++) { -+ struct mvneta_rx_desc *rx_desc = -+ mvneta_rxq_next_desc_get(rxq); -+ u8 pool_id = MVNETA_RX_GET_BM_POOL_ID(rx_desc); -+ struct mvneta_bm_pool *bm_pool; -+ -+ bm_pool = &pp->bm_priv->bm_pools[pool_id]; -+ /* Return dropped buffer to the pool */ -+ mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, -+ rx_desc->buf_phys_addr); -+ } -+ return; -+ } -+ - for (i = 0; i < rxq->size; i++) { - struct mvneta_rx_desc *rx_desc = rxq->descs + i; - void *data = (void *)rx_desc->buf_cookie; - - dma_unmap_single(pp->dev->dev.parent, rx_desc->buf_phys_addr, - MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE); -- mvneta_frag_free(pp, data); -+ mvneta_frag_free(pp->frag_size, data); - } -+} - -- if (rx_done) -- mvneta_rxq_desc_num_update(pp, rxq, rx_done, rx_done); -+/* Main rx processing when using software buffer management */ -+static int mvneta_rx_swbm(struct mvneta_port *pp, int rx_todo, -+ struct mvneta_rx_queue *rxq) -+{ -+ struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports); -+ struct net_device *dev = pp->dev; -+ int rx_done; -+ u32 rcvd_pkts = 0; -+ u32 rcvd_bytes = 0; -+ -+ /* Get number of received packets */ -+ rx_done = mvneta_rxq_busy_desc_num_get(pp, rxq); -+ -+ if (rx_todo > rx_done) -+ rx_todo = rx_done; -+ -+ rx_done = 0; -+ -+ /* Fairness NAPI loop */ -+ while (rx_done < rx_todo) { -+ struct mvneta_rx_desc *rx_desc = mvneta_rxq_next_desc_get(rxq); -+ struct sk_buff *skb; -+ unsigned char *data; -+ dma_addr_t phys_addr; -+ u32 rx_status, frag_size; -+ int rx_bytes, err; -+ -+ rx_done++; -+ rx_status = rx_desc->status; -+ rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); -+ data = (unsigned char *)rx_desc->buf_cookie; -+ phys_addr = rx_desc->buf_phys_addr; -+ -+ if (!mvneta_rxq_desc_is_first_last(rx_status) || -+ (rx_status & MVNETA_RXD_ERR_SUMMARY)) { -+err_drop_frame: -+ dev->stats.rx_errors++; -+ mvneta_rx_error(pp, rx_desc); -+ /* leave the descriptor untouched */ -+ continue; -+ } -+ -+ if (rx_bytes <= rx_copybreak) { -+ /* better copy a small frame and not unmap the DMA region */ -+ skb = netdev_alloc_skb_ip_align(dev, rx_bytes); -+ if (unlikely(!skb)) -+ goto err_drop_frame; -+ -+ dma_sync_single_range_for_cpu(dev->dev.parent, -+ rx_desc->buf_phys_addr, -+ MVNETA_MH_SIZE + NET_SKB_PAD, -+ rx_bytes, -+ DMA_FROM_DEVICE); -+ memcpy(skb_put(skb, rx_bytes), -+ data + MVNETA_MH_SIZE + NET_SKB_PAD, -+ rx_bytes); -+ -+ skb->protocol = eth_type_trans(skb, dev); -+ mvneta_rx_csum(pp, rx_status, skb); -+ napi_gro_receive(&port->napi, skb); -+ -+ rcvd_pkts++; -+ rcvd_bytes += rx_bytes; -+ -+ /* leave the descriptor and buffer untouched */ -+ continue; -+ } -+ -+ /* Refill processing */ -+ err = mvneta_rx_refill(pp, rx_desc); -+ if (err) { -+ netdev_err(dev, "Linux processing - Can't refill\n"); -+ rxq->missed++; -+ goto err_drop_frame; -+ } -+ -+ frag_size = pp->frag_size; -+ -+ skb = build_skb(data, frag_size > PAGE_SIZE ? 0 : frag_size); -+ -+ /* After refill old buffer has to be unmapped regardless -+ * the skb is successfully built or not. -+ */ -+ dma_unmap_single(dev->dev.parent, phys_addr, -+ MVNETA_RX_BUF_SIZE(pp->pkt_size), -+ DMA_FROM_DEVICE); -+ -+ if (!skb) -+ goto err_drop_frame; -+ -+ rcvd_pkts++; -+ rcvd_bytes += rx_bytes; -+ -+ /* Linux processing */ -+ skb_reserve(skb, MVNETA_MH_SIZE + NET_SKB_PAD); -+ skb_put(skb, rx_bytes); -+ -+ skb->protocol = eth_type_trans(skb, dev); -+ -+ mvneta_rx_csum(pp, rx_status, skb); -+ -+ napi_gro_receive(&port->napi, skb); -+ } -+ -+ if (rcvd_pkts) { -+ struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); -+ -+ u64_stats_update_begin(&stats->syncp); -+ stats->rx_packets += rcvd_pkts; -+ stats->rx_bytes += rcvd_bytes; -+ u64_stats_update_end(&stats->syncp); -+ } -+ -+ /* Update rxq management counters */ -+ mvneta_rxq_desc_num_update(pp, rxq, rx_done, rx_done); -+ -+ return rx_done; - } - --/* Main rx processing */ --static int mvneta_rx(struct mvneta_port *pp, int rx_todo, -- struct mvneta_rx_queue *rxq) -+/* Main rx processing when using hardware buffer management */ -+static int mvneta_rx_hwbm(struct mvneta_port *pp, int rx_todo, -+ struct mvneta_rx_queue *rxq) - { - struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports); - struct net_device *dev = pp->dev; -@@ -1632,21 +2008,29 @@ static int mvneta_rx(struct mvneta_port - /* Fairness NAPI loop */ - while (rx_done < rx_todo) { - struct mvneta_rx_desc *rx_desc = mvneta_rxq_next_desc_get(rxq); -+ struct mvneta_bm_pool *bm_pool = NULL; - struct sk_buff *skb; - unsigned char *data; - dma_addr_t phys_addr; -- u32 rx_status; -+ u32 rx_status, frag_size; - int rx_bytes, err; -+ u8 pool_id; - - rx_done++; - rx_status = rx_desc->status; - rx_bytes = rx_desc->data_size - (ETH_FCS_LEN + MVNETA_MH_SIZE); - data = (unsigned char *)rx_desc->buf_cookie; - phys_addr = rx_desc->buf_phys_addr; -+ pool_id = MVNETA_RX_GET_BM_POOL_ID(rx_desc); -+ bm_pool = &pp->bm_priv->bm_pools[pool_id]; - - if (!mvneta_rxq_desc_is_first_last(rx_status) || - (rx_status & MVNETA_RXD_ERR_SUMMARY)) { -- err_drop_frame: -+err_drop_frame_ret_pool: -+ /* Return the buffer to the pool */ -+ mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, -+ rx_desc->buf_phys_addr); -+err_drop_frame: - dev->stats.rx_errors++; - mvneta_rx_error(pp, rx_desc); - /* leave the descriptor untouched */ -@@ -1657,7 +2041,7 @@ static int mvneta_rx(struct mvneta_port - /* better copy a small frame and not unmap the DMA region */ - skb = netdev_alloc_skb_ip_align(dev, rx_bytes); - if (unlikely(!skb)) -- goto err_drop_frame; -+ goto err_drop_frame_ret_pool; - - dma_sync_single_range_for_cpu(dev->dev.parent, - rx_desc->buf_phys_addr, -@@ -1675,26 +2059,31 @@ static int mvneta_rx(struct mvneta_port - rcvd_pkts++; - rcvd_bytes += rx_bytes; - -+ /* Return the buffer to the pool */ -+ mvneta_bm_pool_put_bp(pp->bm_priv, bm_pool, -+ rx_desc->buf_phys_addr); -+ - /* leave the descriptor and buffer untouched */ - continue; - } - - /* Refill processing */ -- err = mvneta_rx_refill(pp, rx_desc); -+ err = mvneta_bm_pool_refill(pp->bm_priv, bm_pool); - if (err) { - netdev_err(dev, "Linux processing - Can't refill\n"); - rxq->missed++; -- goto err_drop_frame; -+ goto err_drop_frame_ret_pool; - } - -- skb = build_skb(data, pp->frag_size > PAGE_SIZE ? 0 : pp->frag_size); -+ frag_size = bm_pool->frag_size; -+ -+ skb = build_skb(data, frag_size > PAGE_SIZE ? 0 : frag_size); - - /* After refill old buffer has to be unmapped regardless - * the skb is successfully built or not. - */ -- dma_unmap_single(dev->dev.parent, phys_addr, -- MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE); -- -+ dma_unmap_single(&pp->bm_priv->pdev->dev, phys_addr, -+ bm_pool->buf_size, DMA_FROM_DEVICE); - if (!skb) - goto err_drop_frame; - -@@ -2299,7 +2688,10 @@ static int mvneta_poll(struct napi_struc - - if (rx_queue) { - rx_queue = rx_queue - 1; -- rx_done = mvneta_rx(pp, budget, &pp->rxqs[rx_queue]); -+ if (pp->bm_priv) -+ rx_done = mvneta_rx_hwbm(pp, budget, &pp->rxqs[rx_queue]); -+ else -+ rx_done = mvneta_rx_swbm(pp, budget, &pp->rxqs[rx_queue]); - } - - budget -= rx_done; -@@ -2388,9 +2780,17 @@ static int mvneta_rxq_init(struct mvneta - mvneta_rx_pkts_coal_set(pp, rxq, rxq->pkts_coal); - mvneta_rx_time_coal_set(pp, rxq, rxq->time_coal); - -- /* Fill RXQ with buffers from RX pool */ -- mvneta_rxq_buf_size_set(pp, rxq, MVNETA_RX_BUF_SIZE(pp->pkt_size)); -- mvneta_rxq_bm_disable(pp, rxq); -+ if (!pp->bm_priv) { -+ /* Fill RXQ with buffers from RX pool */ -+ mvneta_rxq_buf_size_set(pp, rxq, -+ MVNETA_RX_BUF_SIZE(pp->pkt_size)); -+ mvneta_rxq_bm_disable(pp, rxq); -+ } else { -+ mvneta_rxq_bm_enable(pp, rxq); -+ mvneta_rxq_long_pool_set(pp, rxq); -+ mvneta_rxq_short_pool_set(pp, rxq); -+ } -+ - mvneta_rxq_fill(pp, rxq, rxq->size); - - return 0; -@@ -2663,6 +3063,9 @@ static int mvneta_change_mtu(struct net_ - dev->mtu = mtu; - - if (!netif_running(dev)) { -+ if (pp->bm_priv) -+ mvneta_bm_update_mtu(pp, mtu); -+ - netdev_update_features(dev); - return 0; - } -@@ -2675,6 +3078,9 @@ static int mvneta_change_mtu(struct net_ - mvneta_cleanup_txqs(pp); - mvneta_cleanup_rxqs(pp); - -+ if (pp->bm_priv) -+ mvneta_bm_update_mtu(pp, mtu); -+ - pp->pkt_size = MVNETA_RX_PKT_SIZE(dev->mtu); - pp->frag_size = SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(pp->pkt_size)) + - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); -@@ -3567,6 +3973,7 @@ static int mvneta_probe(struct platform_ - struct resource *res; - struct device_node *dn = pdev->dev.of_node; - struct device_node *phy_node; -+ struct device_node *bm_node; - struct mvneta_port *pp; - struct net_device *dev; - const char *dt_mac_addr; -@@ -3694,26 +4101,39 @@ static int mvneta_probe(struct platform_ - - pp->tx_csum_limit = tx_csum_limit; - -+ dram_target_info = mv_mbus_dram_info(); -+ if (dram_target_info) -+ mvneta_conf_mbus_windows(pp, dram_target_info); -+ - pp->tx_ring_size = MVNETA_MAX_TXD; - pp->rx_ring_size = MVNETA_MAX_RXD; - - pp->dev = dev; - SET_NETDEV_DEV(dev, &pdev->dev); - -+ pp->id = global_port_id++; -+ -+ /* Obtain access to BM resources if enabled and already initialized */ -+ bm_node = of_parse_phandle(dn, "buffer-manager", 0); -+ if (bm_node && bm_node->data) { -+ pp->bm_priv = bm_node->data; -+ err = mvneta_bm_port_init(pdev, pp); -+ if (err < 0) { -+ dev_info(&pdev->dev, "use SW buffer management\n"); -+ pp->bm_priv = NULL; -+ } -+ } -+ - err = mvneta_init(&pdev->dev, pp); - if (err < 0) -- goto err_free_stats; -+ goto err_netdev; - - err = mvneta_port_power_up(pp, phy_mode); - if (err < 0) { - dev_err(&pdev->dev, "can't power up port\n"); -- goto err_free_stats; -+ goto err_netdev; - } - -- dram_target_info = mv_mbus_dram_info(); -- if (dram_target_info) -- mvneta_conf_mbus_windows(pp, dram_target_info); -- - for_each_present_cpu(cpu) { - struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); - -@@ -3748,6 +4168,13 @@ static int mvneta_probe(struct platform_ - - return 0; - -+err_netdev: -+ unregister_netdev(dev); -+ if (pp->bm_priv) { -+ mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); -+ mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, -+ 1 << pp->id); -+ } - err_free_stats: - free_percpu(pp->stats); - err_free_ports: -@@ -3777,6 +4204,12 @@ static int mvneta_remove(struct platform - of_node_put(pp->phy_node); - free_netdev(dev); - -+ if (pp->bm_priv) { -+ mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_long, 1 << pp->id); -+ mvneta_bm_pool_destroy(pp->bm_priv, pp->pool_short, -+ 1 << pp->id); -+ } -+ - return 0; - } - ---- /dev/null -+++ b/drivers/net/ethernet/marvell/mvneta_bm.c -@@ -0,0 +1,546 @@ -+/* -+ * Driver for Marvell NETA network controller Buffer Manager. -+ * -+ * Copyright (C) 2015 Marvell -+ * -+ * Marcin Wojtas -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "mvneta_bm.h" -+ -+#define MVNETA_BM_DRIVER_NAME "mvneta_bm" -+#define MVNETA_BM_DRIVER_VERSION "1.0" -+ -+static void mvneta_bm_write(struct mvneta_bm *priv, u32 offset, u32 data) -+{ -+ writel(data, priv->reg_base + offset); -+} -+ -+static u32 mvneta_bm_read(struct mvneta_bm *priv, u32 offset) -+{ -+ return readl(priv->reg_base + offset); -+} -+ -+static void mvneta_bm_pool_enable(struct mvneta_bm *priv, int pool_id) -+{ -+ u32 val; -+ -+ val = mvneta_bm_read(priv, MVNETA_BM_POOL_BASE_REG(pool_id)); -+ val |= MVNETA_BM_POOL_ENABLE_MASK; -+ mvneta_bm_write(priv, MVNETA_BM_POOL_BASE_REG(pool_id), val); -+ -+ /* Clear BM cause register */ -+ mvneta_bm_write(priv, MVNETA_BM_INTR_CAUSE_REG, 0); -+} -+ -+static void mvneta_bm_pool_disable(struct mvneta_bm *priv, int pool_id) -+{ -+ u32 val; -+ -+ val = mvneta_bm_read(priv, MVNETA_BM_POOL_BASE_REG(pool_id)); -+ val &= ~MVNETA_BM_POOL_ENABLE_MASK; -+ mvneta_bm_write(priv, MVNETA_BM_POOL_BASE_REG(pool_id), val); -+} -+ -+static inline void mvneta_bm_config_set(struct mvneta_bm *priv, u32 mask) -+{ -+ u32 val; -+ -+ val = mvneta_bm_read(priv, MVNETA_BM_CONFIG_REG); -+ val |= mask; -+ mvneta_bm_write(priv, MVNETA_BM_CONFIG_REG, val); -+} -+ -+static inline void mvneta_bm_config_clear(struct mvneta_bm *priv, u32 mask) -+{ -+ u32 val; -+ -+ val = mvneta_bm_read(priv, MVNETA_BM_CONFIG_REG); -+ val &= ~mask; -+ mvneta_bm_write(priv, MVNETA_BM_CONFIG_REG, val); -+} -+ -+static void mvneta_bm_pool_target_set(struct mvneta_bm *priv, int pool_id, -+ u8 target_id, u8 attr) -+{ -+ u32 val; -+ -+ val = mvneta_bm_read(priv, MVNETA_BM_XBAR_POOL_REG(pool_id)); -+ val &= ~MVNETA_BM_TARGET_ID_MASK(pool_id); -+ val &= ~MVNETA_BM_XBAR_ATTR_MASK(pool_id); -+ val |= MVNETA_BM_TARGET_ID_VAL(pool_id, target_id); -+ val |= MVNETA_BM_XBAR_ATTR_VAL(pool_id, attr); -+ -+ mvneta_bm_write(priv, MVNETA_BM_XBAR_POOL_REG(pool_id), val); -+} -+ -+/* Allocate skb for BM pool */ -+void *mvneta_buf_alloc(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -+ dma_addr_t *buf_phys_addr) -+{ -+ void *buf; -+ dma_addr_t phys_addr; -+ -+ buf = mvneta_frag_alloc(bm_pool->frag_size); -+ if (!buf) -+ return NULL; -+ -+ /* In order to update buf_cookie field of RX descriptor properly, -+ * BM hardware expects buf virtual address to be placed in the -+ * first four bytes of mapped buffer. -+ */ -+ *(u32 *)buf = (u32)buf; -+ phys_addr = dma_map_single(&priv->pdev->dev, buf, bm_pool->buf_size, -+ DMA_FROM_DEVICE); -+ if (unlikely(dma_mapping_error(&priv->pdev->dev, phys_addr))) { -+ mvneta_frag_free(bm_pool->frag_size, buf); -+ return NULL; -+ } -+ *buf_phys_addr = phys_addr; -+ -+ return buf; -+} -+ -+/* Refill processing for HW buffer management */ -+int mvneta_bm_pool_refill(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool) -+{ -+ dma_addr_t buf_phys_addr; -+ void *buf; -+ -+ buf = mvneta_buf_alloc(priv, bm_pool, &buf_phys_addr); -+ if (!buf) -+ return -ENOMEM; -+ -+ mvneta_bm_pool_put_bp(priv, bm_pool, buf_phys_addr); -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(mvneta_bm_pool_refill); -+ -+/* Allocate buffers for the pool */ -+int mvneta_bm_bufs_add(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -+ int buf_num) -+{ -+ int err, i; -+ -+ if (bm_pool->buf_num == bm_pool->size) { -+ dev_dbg(&priv->pdev->dev, "pool %d already filled\n", -+ bm_pool->id); -+ return bm_pool->buf_num; -+ } -+ -+ if (buf_num < 0 || -+ (buf_num + bm_pool->buf_num > bm_pool->size)) { -+ dev_err(&priv->pdev->dev, -+ "cannot allocate %d buffers for pool %d\n", -+ buf_num, bm_pool->id); -+ return 0; -+ } -+ -+ for (i = 0; i < buf_num; i++) { -+ err = mvneta_bm_pool_refill(priv, bm_pool); -+ if (err < 0) -+ break; -+ } -+ -+ /* Update BM driver with number of buffers added to pool */ -+ bm_pool->buf_num += i; -+ -+ dev_dbg(&priv->pdev->dev, -+ "%s pool %d: pkt_size=%4d, buf_size=%4d, frag_size=%4d\n", -+ bm_pool->type == MVNETA_BM_SHORT ? "short" : "long", -+ bm_pool->id, bm_pool->pkt_size, bm_pool->buf_size, -+ bm_pool->frag_size); -+ -+ dev_dbg(&priv->pdev->dev, -+ "%s pool %d: %d of %d buffers added\n", -+ bm_pool->type == MVNETA_BM_SHORT ? "short" : "long", -+ bm_pool->id, i, buf_num); -+ -+ return i; -+} -+EXPORT_SYMBOL_GPL(mvneta_bm_bufs_add); -+ -+/* Create pool */ -+static int mvneta_bm_pool_create(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool) -+{ -+ struct platform_device *pdev = priv->pdev; -+ u8 target_id, attr; -+ int size_bytes, err; -+ -+ size_bytes = sizeof(u32) * bm_pool->size; -+ bm_pool->virt_addr = dma_alloc_coherent(&pdev->dev, size_bytes, -+ &bm_pool->phys_addr, -+ GFP_KERNEL); -+ if (!bm_pool->virt_addr) -+ return -ENOMEM; -+ -+ if (!IS_ALIGNED((u32)bm_pool->virt_addr, MVNETA_BM_POOL_PTR_ALIGN)) { -+ dma_free_coherent(&pdev->dev, size_bytes, bm_pool->virt_addr, -+ bm_pool->phys_addr); -+ dev_err(&pdev->dev, "BM pool %d is not %d bytes aligned\n", -+ bm_pool->id, MVNETA_BM_POOL_PTR_ALIGN); -+ return -ENOMEM; -+ } -+ -+ err = mvebu_mbus_get_dram_win_info(bm_pool->phys_addr, &target_id, -+ &attr); -+ if (err < 0) { -+ dma_free_coherent(&pdev->dev, size_bytes, bm_pool->virt_addr, -+ bm_pool->phys_addr); -+ return err; -+ } -+ -+ /* Set pool address */ -+ mvneta_bm_write(priv, MVNETA_BM_POOL_BASE_REG(bm_pool->id), -+ bm_pool->phys_addr); -+ -+ mvneta_bm_pool_target_set(priv, bm_pool->id, target_id, attr); -+ mvneta_bm_pool_enable(priv, bm_pool->id); -+ -+ return 0; -+} -+ -+/* Notify the driver that BM pool is being used as specific type and return the -+ * pool pointer on success -+ */ -+struct mvneta_bm_pool *mvneta_bm_pool_use(struct mvneta_bm *priv, u8 pool_id, -+ enum mvneta_bm_type type, u8 port_id, -+ int pkt_size) -+{ -+ struct mvneta_bm_pool *new_pool = &priv->bm_pools[pool_id]; -+ int num, err; -+ -+ if (new_pool->type == MVNETA_BM_LONG && -+ new_pool->port_map != 1 << port_id) { -+ dev_err(&priv->pdev->dev, -+ "long pool cannot be shared by the ports\n"); -+ return NULL; -+ } -+ -+ if (new_pool->type == MVNETA_BM_SHORT && new_pool->type != type) { -+ dev_err(&priv->pdev->dev, -+ "mixing pools' types between the ports is forbidden\n"); -+ return NULL; -+ } -+ -+ if (new_pool->pkt_size == 0 || type != MVNETA_BM_SHORT) -+ new_pool->pkt_size = pkt_size; -+ -+ /* Allocate buffers in case BM pool hasn't been used yet */ -+ if (new_pool->type == MVNETA_BM_FREE) { -+ new_pool->type = type; -+ new_pool->buf_size = MVNETA_RX_BUF_SIZE(new_pool->pkt_size); -+ new_pool->frag_size = -+ SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(new_pool->pkt_size)) + -+ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); -+ -+ /* Create new pool */ -+ err = mvneta_bm_pool_create(priv, new_pool); -+ if (err) { -+ dev_err(&priv->pdev->dev, "fail to create pool %d\n", -+ new_pool->id); -+ return NULL; -+ } -+ -+ /* Allocate buffers for this pool */ -+ num = mvneta_bm_bufs_add(priv, new_pool, new_pool->size); -+ if (num != new_pool->size) { -+ WARN(1, "pool %d: %d of %d allocated\n", -+ new_pool->id, num, new_pool->size); -+ return NULL; -+ } -+ } -+ -+ return new_pool; -+} -+EXPORT_SYMBOL_GPL(mvneta_bm_pool_use); -+ -+/* Free all buffers from the pool */ -+void mvneta_bm_bufs_free(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -+ u8 port_map) -+{ -+ int i; -+ -+ bm_pool->port_map &= ~port_map; -+ if (bm_pool->port_map) -+ return; -+ -+ mvneta_bm_config_set(priv, MVNETA_BM_EMPTY_LIMIT_MASK); -+ -+ for (i = 0; i < bm_pool->buf_num; i++) { -+ dma_addr_t buf_phys_addr; -+ u32 *vaddr; -+ -+ /* Get buffer physical address (indirect access) */ -+ buf_phys_addr = mvneta_bm_pool_get_bp(priv, bm_pool); -+ -+ /* Work-around to the problems when destroying the pool, -+ * when it occurs that a read access to BPPI returns 0. -+ */ -+ if (buf_phys_addr == 0) -+ continue; -+ -+ vaddr = phys_to_virt(buf_phys_addr); -+ if (!vaddr) -+ break; -+ -+ dma_unmap_single(&priv->pdev->dev, buf_phys_addr, -+ bm_pool->buf_size, DMA_FROM_DEVICE); -+ mvneta_frag_free(bm_pool->frag_size, vaddr); -+ } -+ -+ mvneta_bm_config_clear(priv, MVNETA_BM_EMPTY_LIMIT_MASK); -+ -+ /* Update BM driver with number of buffers removed from pool */ -+ bm_pool->buf_num -= i; -+} -+EXPORT_SYMBOL_GPL(mvneta_bm_bufs_free); -+ -+/* Cleanup pool */ -+void mvneta_bm_pool_destroy(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool, u8 port_map) -+{ -+ bm_pool->port_map &= ~port_map; -+ if (bm_pool->port_map) -+ return; -+ -+ bm_pool->type = MVNETA_BM_FREE; -+ -+ mvneta_bm_bufs_free(priv, bm_pool, port_map); -+ if (bm_pool->buf_num) -+ WARN(1, "cannot free all buffers in pool %d\n", bm_pool->id); -+ -+ if (bm_pool->virt_addr) { -+ dma_free_coherent(&priv->pdev->dev, sizeof(u32) * bm_pool->size, -+ bm_pool->virt_addr, bm_pool->phys_addr); -+ bm_pool->virt_addr = NULL; -+ } -+ -+ mvneta_bm_pool_disable(priv, bm_pool->id); -+} -+EXPORT_SYMBOL_GPL(mvneta_bm_pool_destroy); -+ -+static void mvneta_bm_pools_init(struct mvneta_bm *priv) -+{ -+ struct device_node *dn = priv->pdev->dev.of_node; -+ struct mvneta_bm_pool *bm_pool; -+ char prop[15]; -+ u32 size; -+ int i; -+ -+ /* Activate BM unit */ -+ mvneta_bm_write(priv, MVNETA_BM_COMMAND_REG, MVNETA_BM_START_MASK); -+ -+ /* Create all pools with maximum size */ -+ for (i = 0; i < MVNETA_BM_POOLS_NUM; i++) { -+ bm_pool = &priv->bm_pools[i]; -+ bm_pool->id = i; -+ bm_pool->type = MVNETA_BM_FREE; -+ -+ /* Reset read pointer */ -+ mvneta_bm_write(priv, MVNETA_BM_POOL_READ_PTR_REG(i), 0); -+ -+ /* Reset write pointer */ -+ mvneta_bm_write(priv, MVNETA_BM_POOL_WRITE_PTR_REG(i), 0); -+ -+ /* Configure pool size according to DT or use default value */ -+ sprintf(prop, "pool%d,capacity", i); -+ if (of_property_read_u32(dn, prop, &size)) { -+ size = MVNETA_BM_POOL_CAP_DEF; -+ } else if (size > MVNETA_BM_POOL_CAP_MAX) { -+ dev_warn(&priv->pdev->dev, -+ "Illegal pool %d capacity %d, set to %d\n", -+ i, size, MVNETA_BM_POOL_CAP_MAX); -+ size = MVNETA_BM_POOL_CAP_MAX; -+ } else if (size < MVNETA_BM_POOL_CAP_MIN) { -+ dev_warn(&priv->pdev->dev, -+ "Illegal pool %d capacity %d, set to %d\n", -+ i, size, MVNETA_BM_POOL_CAP_MIN); -+ size = MVNETA_BM_POOL_CAP_MIN; -+ } else if (!IS_ALIGNED(size, MVNETA_BM_POOL_CAP_ALIGN)) { -+ dev_warn(&priv->pdev->dev, -+ "Illegal pool %d capacity %d, round to %d\n", -+ i, size, ALIGN(size, -+ MVNETA_BM_POOL_CAP_ALIGN)); -+ size = ALIGN(size, MVNETA_BM_POOL_CAP_ALIGN); -+ } -+ bm_pool->size = size; -+ -+ mvneta_bm_write(priv, MVNETA_BM_POOL_SIZE_REG(i), -+ bm_pool->size); -+ -+ /* Obtain custom pkt_size from DT */ -+ sprintf(prop, "pool%d,pkt-size", i); -+ if (of_property_read_u32(dn, prop, &bm_pool->pkt_size)) -+ bm_pool->pkt_size = 0; -+ } -+} -+ -+static void mvneta_bm_default_set(struct mvneta_bm *priv) -+{ -+ u32 val; -+ -+ /* Mask BM all interrupts */ -+ mvneta_bm_write(priv, MVNETA_BM_INTR_MASK_REG, 0); -+ -+ /* Clear BM cause register */ -+ mvneta_bm_write(priv, MVNETA_BM_INTR_CAUSE_REG, 0); -+ -+ /* Set BM configuration register */ -+ val = mvneta_bm_read(priv, MVNETA_BM_CONFIG_REG); -+ -+ /* Reduce MaxInBurstSize from 32 BPs to 16 BPs */ -+ val &= ~MVNETA_BM_MAX_IN_BURST_SIZE_MASK; -+ val |= MVNETA_BM_MAX_IN_BURST_SIZE_16BP; -+ mvneta_bm_write(priv, MVNETA_BM_CONFIG_REG, val); -+} -+ -+static int mvneta_bm_init(struct mvneta_bm *priv) -+{ -+ mvneta_bm_default_set(priv); -+ -+ /* Allocate and initialize BM pools structures */ -+ priv->bm_pools = devm_kcalloc(&priv->pdev->dev, MVNETA_BM_POOLS_NUM, -+ sizeof(struct mvneta_bm_pool), -+ GFP_KERNEL); -+ if (!priv->bm_pools) -+ return -ENOMEM; -+ -+ mvneta_bm_pools_init(priv); -+ -+ return 0; -+} -+ -+static int mvneta_bm_get_sram(struct device_node *dn, -+ struct mvneta_bm *priv) -+{ -+ priv->bppi_pool = of_gen_pool_get(dn, "internal-mem", 0); -+ if (!priv->bppi_pool) -+ return -ENOMEM; -+ -+ priv->bppi_virt_addr = gen_pool_dma_alloc(priv->bppi_pool, -+ MVNETA_BM_BPPI_SIZE, -+ &priv->bppi_phys_addr); -+ if (!priv->bppi_virt_addr) -+ return -ENOMEM; -+ -+ return 0; -+} -+ -+static void mvneta_bm_put_sram(struct mvneta_bm *priv) -+{ -+ gen_pool_free(priv->bppi_pool, priv->bppi_phys_addr, -+ MVNETA_BM_BPPI_SIZE); -+} -+ -+static int mvneta_bm_probe(struct platform_device *pdev) -+{ -+ struct device_node *dn = pdev->dev.of_node; -+ struct mvneta_bm *priv; -+ struct resource *res; -+ int err; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(struct mvneta_bm), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ priv->reg_base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(priv->reg_base)) -+ return PTR_ERR(priv->reg_base); -+ -+ priv->clk = devm_clk_get(&pdev->dev, NULL); -+ if (IS_ERR(priv->clk)) -+ return PTR_ERR(priv->clk); -+ err = clk_prepare_enable(priv->clk); -+ if (err < 0) -+ return err; -+ -+ err = mvneta_bm_get_sram(dn, priv); -+ if (err < 0) { -+ dev_err(&pdev->dev, "failed to allocate internal memory\n"); -+ goto err_clk; -+ } -+ -+ priv->pdev = pdev; -+ -+ /* Initialize buffer manager internals */ -+ err = mvneta_bm_init(priv); -+ if (err < 0) { -+ dev_err(&pdev->dev, "failed to initialize controller\n"); -+ goto err_sram; -+ } -+ -+ dn->data = priv; -+ platform_set_drvdata(pdev, priv); -+ -+ dev_info(&pdev->dev, "Buffer Manager for network controller enabled\n"); -+ -+ return 0; -+ -+err_sram: -+ mvneta_bm_put_sram(priv); -+err_clk: -+ clk_disable_unprepare(priv->clk); -+ return err; -+} -+ -+static int mvneta_bm_remove(struct platform_device *pdev) -+{ -+ struct mvneta_bm *priv = platform_get_drvdata(pdev); -+ u8 all_ports_map = 0xff; -+ int i = 0; -+ -+ for (i = 0; i < MVNETA_BM_POOLS_NUM; i++) { -+ struct mvneta_bm_pool *bm_pool = &priv->bm_pools[i]; -+ -+ mvneta_bm_pool_destroy(priv, bm_pool, all_ports_map); -+ } -+ -+ mvneta_bm_put_sram(priv); -+ -+ /* Dectivate BM unit */ -+ mvneta_bm_write(priv, MVNETA_BM_COMMAND_REG, MVNETA_BM_STOP_MASK); -+ -+ clk_disable_unprepare(priv->clk); -+ -+ return 0; -+} -+ -+static const struct of_device_id mvneta_bm_match[] = { -+ { .compatible = "marvell,armada-380-neta-bm" }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, mvneta_bm_match); -+ -+static struct platform_driver mvneta_bm_driver = { -+ .probe = mvneta_bm_probe, -+ .remove = mvneta_bm_remove, -+ .driver = { -+ .name = MVNETA_BM_DRIVER_NAME, -+ .of_match_table = mvneta_bm_match, -+ }, -+}; -+ -+module_platform_driver(mvneta_bm_driver); -+ -+MODULE_DESCRIPTION("Marvell NETA Buffer Manager Driver - www.marvell.com"); -+MODULE_AUTHOR("Marcin Wojtas "); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/drivers/net/ethernet/marvell/mvneta_bm.h -@@ -0,0 +1,189 @@ -+/* -+ * Driver for Marvell NETA network controller Buffer Manager. -+ * -+ * Copyright (C) 2015 Marvell -+ * -+ * Marcin Wojtas -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#ifndef _MVNETA_BM_H_ -+#define _MVNETA_BM_H_ -+ -+/* BM Configuration Register */ -+#define MVNETA_BM_CONFIG_REG 0x0 -+#define MVNETA_BM_STATUS_MASK 0x30 -+#define MVNETA_BM_ACTIVE_MASK BIT(4) -+#define MVNETA_BM_MAX_IN_BURST_SIZE_MASK 0x60000 -+#define MVNETA_BM_MAX_IN_BURST_SIZE_16BP BIT(18) -+#define MVNETA_BM_EMPTY_LIMIT_MASK BIT(19) -+ -+/* BM Activation Register */ -+#define MVNETA_BM_COMMAND_REG 0x4 -+#define MVNETA_BM_START_MASK BIT(0) -+#define MVNETA_BM_STOP_MASK BIT(1) -+#define MVNETA_BM_PAUSE_MASK BIT(2) -+ -+/* BM Xbar interface Register */ -+#define MVNETA_BM_XBAR_01_REG 0x8 -+#define MVNETA_BM_XBAR_23_REG 0xc -+#define MVNETA_BM_XBAR_POOL_REG(pool) \ -+ (((pool) < 2) ? MVNETA_BM_XBAR_01_REG : MVNETA_BM_XBAR_23_REG) -+#define MVNETA_BM_TARGET_ID_OFFS(pool) (((pool) & 1) ? 16 : 0) -+#define MVNETA_BM_TARGET_ID_MASK(pool) \ -+ (0xf << MVNETA_BM_TARGET_ID_OFFS(pool)) -+#define MVNETA_BM_TARGET_ID_VAL(pool, id) \ -+ ((id) << MVNETA_BM_TARGET_ID_OFFS(pool)) -+#define MVNETA_BM_XBAR_ATTR_OFFS(pool) (((pool) & 1) ? 20 : 4) -+#define MVNETA_BM_XBAR_ATTR_MASK(pool) \ -+ (0xff << MVNETA_BM_XBAR_ATTR_OFFS(pool)) -+#define MVNETA_BM_XBAR_ATTR_VAL(pool, attr) \ -+ ((attr) << MVNETA_BM_XBAR_ATTR_OFFS(pool)) -+ -+/* Address of External Buffer Pointers Pool Register */ -+#define MVNETA_BM_POOL_BASE_REG(pool) (0x10 + ((pool) << 4)) -+#define MVNETA_BM_POOL_ENABLE_MASK BIT(0) -+ -+/* External Buffer Pointers Pool RD pointer Register */ -+#define MVNETA_BM_POOL_READ_PTR_REG(pool) (0x14 + ((pool) << 4)) -+#define MVNETA_BM_POOL_SET_READ_PTR_MASK 0xfffc -+#define MVNETA_BM_POOL_GET_READ_PTR_OFFS 16 -+#define MVNETA_BM_POOL_GET_READ_PTR_MASK 0xfffc0000 -+ -+/* External Buffer Pointers Pool WR pointer */ -+#define MVNETA_BM_POOL_WRITE_PTR_REG(pool) (0x18 + ((pool) << 4)) -+#define MVNETA_BM_POOL_SET_WRITE_PTR_OFFS 0 -+#define MVNETA_BM_POOL_SET_WRITE_PTR_MASK 0xfffc -+#define MVNETA_BM_POOL_GET_WRITE_PTR_OFFS 16 -+#define MVNETA_BM_POOL_GET_WRITE_PTR_MASK 0xfffc0000 -+ -+/* External Buffer Pointers Pool Size Register */ -+#define MVNETA_BM_POOL_SIZE_REG(pool) (0x1c + ((pool) << 4)) -+#define MVNETA_BM_POOL_SIZE_MASK 0x3fff -+ -+/* BM Interrupt Cause Register */ -+#define MVNETA_BM_INTR_CAUSE_REG (0x50) -+ -+/* BM interrupt Mask Register */ -+#define MVNETA_BM_INTR_MASK_REG (0x54) -+ -+/* Other definitions */ -+#define MVNETA_BM_SHORT_PKT_SIZE 256 -+#define MVNETA_BM_POOLS_NUM 4 -+#define MVNETA_BM_POOL_CAP_MIN 128 -+#define MVNETA_BM_POOL_CAP_DEF 2048 -+#define MVNETA_BM_POOL_CAP_MAX \ -+ (16 * 1024 - MVNETA_BM_POOL_CAP_ALIGN) -+#define MVNETA_BM_POOL_CAP_ALIGN 32 -+#define MVNETA_BM_POOL_PTR_ALIGN 32 -+ -+#define MVNETA_BM_POOL_ACCESS_OFFS 8 -+ -+#define MVNETA_BM_BPPI_SIZE 0x100000 -+ -+#define MVNETA_RX_BUF_SIZE(pkt_size) ((pkt_size) + NET_SKB_PAD) -+ -+enum mvneta_bm_type { -+ MVNETA_BM_FREE, -+ MVNETA_BM_LONG, -+ MVNETA_BM_SHORT -+}; -+ -+struct mvneta_bm { -+ void __iomem *reg_base; -+ struct clk *clk; -+ struct platform_device *pdev; -+ -+ struct gen_pool *bppi_pool; -+ /* BPPI virtual base address */ -+ void __iomem *bppi_virt_addr; -+ /* BPPI physical base address */ -+ dma_addr_t bppi_phys_addr; -+ -+ /* BM pools */ -+ struct mvneta_bm_pool *bm_pools; -+}; -+ -+struct mvneta_bm_pool { -+ /* Pool number in the range 0-3 */ -+ u8 id; -+ enum mvneta_bm_type type; -+ -+ /* Buffer Pointers Pool External (BPPE) size in number of bytes */ -+ int size; -+ /* Number of buffers used by this pool */ -+ int buf_num; -+ /* Pool buffer size */ -+ int buf_size; -+ /* Packet size */ -+ int pkt_size; -+ /* Single frag size */ -+ u32 frag_size; -+ -+ /* BPPE virtual base address */ -+ u32 *virt_addr; -+ /* BPPE physical base address */ -+ dma_addr_t phys_addr; -+ -+ /* Ports using BM pool */ -+ u8 port_map; -+ -+ struct mvneta_bm *priv; -+}; -+ -+/* Declarations and definitions */ -+void *mvneta_frag_alloc(unsigned int frag_size); -+void mvneta_frag_free(unsigned int frag_size, void *data); -+ -+#if defined(CONFIG_MVNETA_BM) || defined(CONFIG_MVNETA_BM_MODULE) -+void mvneta_bm_pool_destroy(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool, u8 port_map); -+void mvneta_bm_bufs_free(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -+ u8 port_map); -+int mvneta_bm_bufs_add(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -+ int buf_num); -+int mvneta_bm_pool_refill(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool); -+struct mvneta_bm_pool *mvneta_bm_pool_use(struct mvneta_bm *priv, u8 pool_id, -+ enum mvneta_bm_type type, u8 port_id, -+ int pkt_size); -+ -+static inline void mvneta_bm_pool_put_bp(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool, -+ dma_addr_t buf_phys_addr) -+{ -+ writel_relaxed(buf_phys_addr, priv->bppi_virt_addr + -+ (bm_pool->id << MVNETA_BM_POOL_ACCESS_OFFS)); -+} -+ -+static inline u32 mvneta_bm_pool_get_bp(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool) -+{ -+ return readl_relaxed(priv->bppi_virt_addr + -+ (bm_pool->id << MVNETA_BM_POOL_ACCESS_OFFS)); -+} -+#else -+void mvneta_bm_pool_destroy(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool, u8 port_map) {} -+void mvneta_bm_bufs_free(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -+ u8 port_map) {} -+int mvneta_bm_bufs_add(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -+ int buf_num) { return 0; } -+int mvneta_bm_pool_refill(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool) {return 0; } -+struct mvneta_bm_pool *mvneta_bm_pool_use(struct mvneta_bm *priv, u8 pool_id, -+ enum mvneta_bm_type type, u8 port_id, -+ int pkt_size) { return NULL; } -+ -+static inline void mvneta_bm_pool_put_bp(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool, -+ dma_addr_t buf_phys_addr) {} -+ -+static inline u32 mvneta_bm_pool_get_bp(struct mvneta_bm *priv, -+ struct mvneta_bm_pool *bm_pool) -+{ return 0; } -+#endif /* CONFIG_MVNETA_BM */ -+#endif diff --git a/target/linux/mvebu/patches-4.4/046-net-mvneta-Use-the-new-hwbm-framework.patch b/target/linux/mvebu/patches-4.4/046-net-mvneta-Use-the-new-hwbm-framework.patch deleted file mode 100644 index fb9859c5d..000000000 --- a/target/linux/mvebu/patches-4.4/046-net-mvneta-Use-the-new-hwbm-framework.patch +++ /dev/null @@ -1,359 +0,0 @@ -From: Gregory CLEMENT -Date: Mon, 14 Mar 2016 09:39:05 +0100 -Subject: [PATCH] net: mvneta: Use the new hwbm framework - -Now that the hardware buffer management framework had been introduced, -let's use it. - -Tested-by: Sebastian Careba -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/Kconfig -+++ b/drivers/net/ethernet/marvell/Kconfig -@@ -43,6 +43,7 @@ config MVMDIO - config MVNETA_BM - tristate "Marvell Armada 38x/XP network interface BM support" - depends on MVNETA -+ select HWBM - ---help--- - This driver supports auxiliary block of the network - interface units in the Marvell ARMADA XP and ARMADA 38x SoC ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -30,6 +30,7 @@ - #include - #include - #include -+#include - #include "mvneta_bm.h" - #include - #include -@@ -1024,11 +1025,12 @@ static int mvneta_bm_port_init(struct pl - static void mvneta_bm_update_mtu(struct mvneta_port *pp, int mtu) - { - struct mvneta_bm_pool *bm_pool = pp->pool_long; -+ struct hwbm_pool *hwbm_pool = &bm_pool->hwbm_pool; - int num; - - /* Release all buffers from long pool */ - mvneta_bm_bufs_free(pp->bm_priv, bm_pool, 1 << pp->id); -- if (bm_pool->buf_num) { -+ if (hwbm_pool->buf_num) { - WARN(1, "cannot free all buffers in pool %d\n", - bm_pool->id); - goto bm_mtu_err; -@@ -1036,14 +1038,14 @@ static void mvneta_bm_update_mtu(struct - - bm_pool->pkt_size = MVNETA_RX_PKT_SIZE(mtu); - bm_pool->buf_size = MVNETA_RX_BUF_SIZE(bm_pool->pkt_size); -- bm_pool->frag_size = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + -- SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(bm_pool->pkt_size)); -+ hwbm_pool->frag_size = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + -+ SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(bm_pool->pkt_size)); - - /* Fill entire long pool */ -- num = mvneta_bm_bufs_add(pp->bm_priv, bm_pool, bm_pool->size); -- if (num != bm_pool->size) { -+ num = hwbm_pool_add(hwbm_pool, hwbm_pool->size, GFP_ATOMIC); -+ if (num != hwbm_pool->size) { - WARN(1, "pool %d: %d of %d allocated\n", -- bm_pool->id, num, bm_pool->size); -+ bm_pool->id, num, hwbm_pool->size); - goto bm_mtu_err; - } - mvneta_bm_pool_bufsize_set(pp, bm_pool->buf_size, bm_pool->id); -@@ -2068,14 +2070,14 @@ err_drop_frame: - } - - /* Refill processing */ -- err = mvneta_bm_pool_refill(pp->bm_priv, bm_pool); -+ err = hwbm_pool_refill(&bm_pool->hwbm_pool, GFP_ATOMIC); - if (err) { - netdev_err(dev, "Linux processing - Can't refill\n"); - rxq->missed++; - goto err_drop_frame_ret_pool; - } - -- frag_size = bm_pool->frag_size; -+ frag_size = bm_pool->hwbm_pool.frag_size; - - skb = build_skb(data, frag_size > PAGE_SIZE ? 0 : frag_size); - ---- a/drivers/net/ethernet/marvell/mvneta_bm.c -+++ b/drivers/net/ethernet/marvell/mvneta_bm.c -@@ -10,16 +10,17 @@ - * warranty of any kind, whether express or implied. - */ - --#include -+#include - #include --#include --#include --#include -+#include -+#include - #include - #include --#include -+#include - #include --#include -+#include -+#include -+#include - #include "mvneta_bm.h" - - #define MVNETA_BM_DRIVER_NAME "mvneta_bm" -@@ -88,17 +89,13 @@ static void mvneta_bm_pool_target_set(st - mvneta_bm_write(priv, MVNETA_BM_XBAR_POOL_REG(pool_id), val); - } - --/* Allocate skb for BM pool */ --void *mvneta_buf_alloc(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -- dma_addr_t *buf_phys_addr) -+int mvneta_bm_construct(struct hwbm_pool *hwbm_pool, void *buf) - { -- void *buf; -+ struct mvneta_bm_pool *bm_pool = -+ (struct mvneta_bm_pool *)hwbm_pool->priv; -+ struct mvneta_bm *priv = bm_pool->priv; - dma_addr_t phys_addr; - -- buf = mvneta_frag_alloc(bm_pool->frag_size); -- if (!buf) -- return NULL; -- - /* In order to update buf_cookie field of RX descriptor properly, - * BM hardware expects buf virtual address to be placed in the - * first four bytes of mapped buffer. -@@ -106,75 +103,13 @@ void *mvneta_buf_alloc(struct mvneta_bm - *(u32 *)buf = (u32)buf; - phys_addr = dma_map_single(&priv->pdev->dev, buf, bm_pool->buf_size, - DMA_FROM_DEVICE); -- if (unlikely(dma_mapping_error(&priv->pdev->dev, phys_addr))) { -- mvneta_frag_free(bm_pool->frag_size, buf); -- return NULL; -- } -- *buf_phys_addr = phys_addr; -- -- return buf; --} -- --/* Refill processing for HW buffer management */ --int mvneta_bm_pool_refill(struct mvneta_bm *priv, -- struct mvneta_bm_pool *bm_pool) --{ -- dma_addr_t buf_phys_addr; -- void *buf; -- -- buf = mvneta_buf_alloc(priv, bm_pool, &buf_phys_addr); -- if (!buf) -+ if (unlikely(dma_mapping_error(&priv->pdev->dev, phys_addr))) - return -ENOMEM; - -- mvneta_bm_pool_put_bp(priv, bm_pool, buf_phys_addr); -- -+ mvneta_bm_pool_put_bp(priv, bm_pool, phys_addr); - return 0; - } --EXPORT_SYMBOL_GPL(mvneta_bm_pool_refill); -- --/* Allocate buffers for the pool */ --int mvneta_bm_bufs_add(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -- int buf_num) --{ -- int err, i; -- -- if (bm_pool->buf_num == bm_pool->size) { -- dev_dbg(&priv->pdev->dev, "pool %d already filled\n", -- bm_pool->id); -- return bm_pool->buf_num; -- } -- -- if (buf_num < 0 || -- (buf_num + bm_pool->buf_num > bm_pool->size)) { -- dev_err(&priv->pdev->dev, -- "cannot allocate %d buffers for pool %d\n", -- buf_num, bm_pool->id); -- return 0; -- } -- -- for (i = 0; i < buf_num; i++) { -- err = mvneta_bm_pool_refill(priv, bm_pool); -- if (err < 0) -- break; -- } -- -- /* Update BM driver with number of buffers added to pool */ -- bm_pool->buf_num += i; -- -- dev_dbg(&priv->pdev->dev, -- "%s pool %d: pkt_size=%4d, buf_size=%4d, frag_size=%4d\n", -- bm_pool->type == MVNETA_BM_SHORT ? "short" : "long", -- bm_pool->id, bm_pool->pkt_size, bm_pool->buf_size, -- bm_pool->frag_size); -- -- dev_dbg(&priv->pdev->dev, -- "%s pool %d: %d of %d buffers added\n", -- bm_pool->type == MVNETA_BM_SHORT ? "short" : "long", -- bm_pool->id, i, buf_num); -- -- return i; --} --EXPORT_SYMBOL_GPL(mvneta_bm_bufs_add); -+EXPORT_SYMBOL_GPL(mvneta_bm_construct); - - /* Create pool */ - static int mvneta_bm_pool_create(struct mvneta_bm *priv, -@@ -183,8 +118,7 @@ static int mvneta_bm_pool_create(struct - struct platform_device *pdev = priv->pdev; - u8 target_id, attr; - int size_bytes, err; -- -- size_bytes = sizeof(u32) * bm_pool->size; -+ size_bytes = sizeof(u32) * bm_pool->hwbm_pool.size; - bm_pool->virt_addr = dma_alloc_coherent(&pdev->dev, size_bytes, - &bm_pool->phys_addr, - GFP_KERNEL); -@@ -245,11 +179,16 @@ struct mvneta_bm_pool *mvneta_bm_pool_us - - /* Allocate buffers in case BM pool hasn't been used yet */ - if (new_pool->type == MVNETA_BM_FREE) { -+ struct hwbm_pool *hwbm_pool = &new_pool->hwbm_pool; -+ -+ new_pool->priv = priv; - new_pool->type = type; - new_pool->buf_size = MVNETA_RX_BUF_SIZE(new_pool->pkt_size); -- new_pool->frag_size = -+ hwbm_pool->frag_size = - SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(new_pool->pkt_size)) + - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); -+ hwbm_pool->construct = mvneta_bm_construct; -+ hwbm_pool->priv = new_pool; - - /* Create new pool */ - err = mvneta_bm_pool_create(priv, new_pool); -@@ -260,10 +199,10 @@ struct mvneta_bm_pool *mvneta_bm_pool_us - } - - /* Allocate buffers for this pool */ -- num = mvneta_bm_bufs_add(priv, new_pool, new_pool->size); -- if (num != new_pool->size) { -+ num = hwbm_pool_add(hwbm_pool, hwbm_pool->size, GFP_ATOMIC); -+ if (num != hwbm_pool->size) { - WARN(1, "pool %d: %d of %d allocated\n", -- new_pool->id, num, new_pool->size); -+ new_pool->id, num, hwbm_pool->size); - return NULL; - } - } -@@ -284,7 +223,7 @@ void mvneta_bm_bufs_free(struct mvneta_b - - mvneta_bm_config_set(priv, MVNETA_BM_EMPTY_LIMIT_MASK); - -- for (i = 0; i < bm_pool->buf_num; i++) { -+ for (i = 0; i < bm_pool->hwbm_pool.buf_num; i++) { - dma_addr_t buf_phys_addr; - u32 *vaddr; - -@@ -303,13 +242,13 @@ void mvneta_bm_bufs_free(struct mvneta_b - - dma_unmap_single(&priv->pdev->dev, buf_phys_addr, - bm_pool->buf_size, DMA_FROM_DEVICE); -- mvneta_frag_free(bm_pool->frag_size, vaddr); -+ hwbm_buf_free(&bm_pool->hwbm_pool, vaddr); - } - - mvneta_bm_config_clear(priv, MVNETA_BM_EMPTY_LIMIT_MASK); - - /* Update BM driver with number of buffers removed from pool */ -- bm_pool->buf_num -= i; -+ bm_pool->hwbm_pool.buf_num -= i; - } - EXPORT_SYMBOL_GPL(mvneta_bm_bufs_free); - -@@ -317,6 +256,7 @@ EXPORT_SYMBOL_GPL(mvneta_bm_bufs_free); - void mvneta_bm_pool_destroy(struct mvneta_bm *priv, - struct mvneta_bm_pool *bm_pool, u8 port_map) - { -+ struct hwbm_pool *hwbm_pool = &bm_pool->hwbm_pool; - bm_pool->port_map &= ~port_map; - if (bm_pool->port_map) - return; -@@ -324,11 +264,12 @@ void mvneta_bm_pool_destroy(struct mvnet - bm_pool->type = MVNETA_BM_FREE; - - mvneta_bm_bufs_free(priv, bm_pool, port_map); -- if (bm_pool->buf_num) -+ if (hwbm_pool->buf_num) - WARN(1, "cannot free all buffers in pool %d\n", bm_pool->id); - - if (bm_pool->virt_addr) { -- dma_free_coherent(&priv->pdev->dev, sizeof(u32) * bm_pool->size, -+ dma_free_coherent(&priv->pdev->dev, -+ sizeof(u32) * hwbm_pool->size, - bm_pool->virt_addr, bm_pool->phys_addr); - bm_pool->virt_addr = NULL; - } -@@ -381,10 +322,10 @@ static void mvneta_bm_pools_init(struct - MVNETA_BM_POOL_CAP_ALIGN)); - size = ALIGN(size, MVNETA_BM_POOL_CAP_ALIGN); - } -- bm_pool->size = size; -+ bm_pool->hwbm_pool.size = size; - - mvneta_bm_write(priv, MVNETA_BM_POOL_SIZE_REG(i), -- bm_pool->size); -+ bm_pool->hwbm_pool.size); - - /* Obtain custom pkt_size from DT */ - sprintf(prop, "pool%d,pkt-size", i); ---- a/drivers/net/ethernet/marvell/mvneta_bm.h -+++ b/drivers/net/ethernet/marvell/mvneta_bm.h -@@ -108,20 +108,15 @@ struct mvneta_bm { - }; - - struct mvneta_bm_pool { -+ struct hwbm_pool hwbm_pool; - /* Pool number in the range 0-3 */ - u8 id; - enum mvneta_bm_type type; - -- /* Buffer Pointers Pool External (BPPE) size in number of bytes */ -- int size; -- /* Number of buffers used by this pool */ -- int buf_num; -- /* Pool buffer size */ -- int buf_size; - /* Packet size */ - int pkt_size; -- /* Single frag size */ -- u32 frag_size; -+ /* Size of the buffer acces through DMA*/ -+ u32 buf_size; - - /* BPPE virtual base address */ - u32 *virt_addr; -@@ -143,8 +138,7 @@ void mvneta_bm_pool_destroy(struct mvnet - struct mvneta_bm_pool *bm_pool, u8 port_map); - void mvneta_bm_bufs_free(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, - u8 port_map); --int mvneta_bm_bufs_add(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -- int buf_num); -+int mvneta_bm_construct(struct hwbm_pool *hwbm_pool, void *buf); - int mvneta_bm_pool_refill(struct mvneta_bm *priv, - struct mvneta_bm_pool *bm_pool); - struct mvneta_bm_pool *mvneta_bm_pool_use(struct mvneta_bm *priv, u8 pool_id, -@@ -170,8 +164,7 @@ void mvneta_bm_pool_destroy(struct mvnet - struct mvneta_bm_pool *bm_pool, u8 port_map) {} - void mvneta_bm_bufs_free(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, - u8 port_map) {} --int mvneta_bm_bufs_add(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool, -- int buf_num) { return 0; } -+int mvneta_bm_construct(struct hwbm_pool *hwbm_pool, void *buf) { return 0; } - int mvneta_bm_pool_refill(struct mvneta_bm *priv, - struct mvneta_bm_pool *bm_pool) {return 0; } - struct mvneta_bm_pool *mvneta_bm_pool_use(struct mvneta_bm *priv, u8 pool_id, diff --git a/target/linux/mvebu/patches-4.4/047-net-mvneta-Fix-spinlock-usage.patch b/target/linux/mvebu/patches-4.4/047-net-mvneta-Fix-spinlock-usage.patch deleted file mode 100644 index 7058686c2..000000000 --- a/target/linux/mvebu/patches-4.4/047-net-mvneta-Fix-spinlock-usage.patch +++ /dev/null @@ -1,52 +0,0 @@ -From: Gregory CLEMENT -Date: Sat, 12 Mar 2016 18:44:17 +0100 -Subject: [PATCH] net: mvneta: Fix spinlock usage - -In the previous patch, the spinlock was not initialized. While it didn't -cause any trouble yet it could be a problem to use it uninitialized. - -The most annoying part was the critical section protected by the spinlock -in mvneta_stop(). Some of the functions could sleep as pointed when -activated CONFIG_DEBUG_ATOMIC_SLEEP. Actually, in mvneta_stop() we only -need to protect the is_stopped flagged, indeed the code of the notifier -for CPU online is protected by the same spinlock, so when we get the -lock, the notifer work is done. - -Reported-by: Patrick Uiterwijk -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3488,17 +3488,17 @@ static int mvneta_stop(struct net_device - struct mvneta_port *pp = netdev_priv(dev); - - /* Inform that we are stopping so we don't want to setup the -- * driver for new CPUs in the notifiers -+ * driver for new CPUs in the notifiers. The code of the -+ * notifier for CPU online is protected by the same spinlock, -+ * so when we get the lock, the notifer work is done. - */ - spin_lock(&pp->lock); - pp->is_stopped = true; -+ spin_unlock(&pp->lock); -+ - mvneta_stop_dev(pp); - mvneta_mdio_remove(pp); - unregister_cpu_notifier(&pp->cpu_notifier); -- /* Now that the notifier are unregistered, we can release le -- * lock -- */ -- spin_unlock(&pp->lock); - on_each_cpu(mvneta_percpu_disable, pp, true); - free_percpu_irq(dev->irq, pp->ports); - mvneta_cleanup_rxqs(pp); -@@ -4031,6 +4031,7 @@ static int mvneta_probe(struct platform_ - dev->ethtool_ops = &mvneta_eth_tool_ops; - - pp = netdev_priv(dev); -+ spin_lock_init(&pp->lock); - pp->phy_node = phy_node; - pp->phy_interface = phy_mode; - diff --git a/target/linux/mvebu/patches-4.4/048-net-mvneta-fix-error-messages-in-mvneta_port_down-fu.patch b/target/linux/mvebu/patches-4.4/048-net-mvneta-fix-error-messages-in-mvneta_port_down-fu.patch deleted file mode 100644 index fd1f1ae20..000000000 --- a/target/linux/mvebu/patches-4.4/048-net-mvneta-fix-error-messages-in-mvneta_port_down-fu.patch +++ /dev/null @@ -1,33 +0,0 @@ -From: Dmitri Epshtein -Date: Sat, 12 Mar 2016 18:44:19 +0100 -Subject: [PATCH] net: mvneta: fix error messages in mvneta_port_down function - -This commit corrects error printing when shutting down the port. - -[gregory.clement@free-electrons.com: split initial commit in two -individual changes] -Signed-off-by: Dmitri Epshtein -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -1105,7 +1105,7 @@ static void mvneta_port_down(struct mvne - do { - if (count++ >= MVNETA_RX_DISABLE_TIMEOUT_MSEC) { - netdev_warn(pp->dev, -- "TIMEOUT for RX stopped ! rx_queue_cmd: 0x08%x\n", -+ "TIMEOUT for RX stopped ! rx_queue_cmd: 0x%08x\n", - val); - break; - } -@@ -1144,7 +1144,7 @@ static void mvneta_port_down(struct mvne - do { - if (count++ >= MVNETA_TX_FIFO_EMPTY_TIMEOUT) { - netdev_warn(pp->dev, -- "TX FIFO empty timeout status=0x08%x\n", -+ "TX FIFO empty timeout status=0x%08x\n", - val); - break; - } diff --git a/target/linux/mvebu/patches-4.4/049-net-mvneta-replace-MVNETA_CPU_D_CACHE_LINE_SIZE-with.patch b/target/linux/mvebu/patches-4.4/049-net-mvneta-replace-MVNETA_CPU_D_CACHE_LINE_SIZE-with.patch deleted file mode 100644 index 4b319e26a..000000000 --- a/target/linux/mvebu/patches-4.4/049-net-mvneta-replace-MVNETA_CPU_D_CACHE_LINE_SIZE-with.patch +++ /dev/null @@ -1,56 +0,0 @@ -From: Jisheng Zhang -Date: Wed, 30 Mar 2016 19:55:21 +0800 -Subject: [PATCH] net: mvneta: replace MVNETA_CPU_D_CACHE_LINE_SIZE with - L1_CACHE_BYTES - -The mvneta is also used in some Marvell berlin family SoCs which may -have 64bytes cacheline size. Replace the MVNETA_CPU_D_CACHE_LINE_SIZE -usage with L1_CACHE_BYTES. - -And since dma_alloc_coherent() is always cacheline size aligned, so -remove the align checks. - -Signed-off-by: Jisheng Zhang -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -260,7 +260,6 @@ - - #define MVNETA_VLAN_TAG_LEN 4 - --#define MVNETA_CPU_D_CACHE_LINE_SIZE 32 - #define MVNETA_TX_CSUM_DEF_SIZE 1600 - #define MVNETA_TX_CSUM_MAX_SIZE 9800 - #define MVNETA_ACC_MODE_EXT1 1 -@@ -300,7 +299,7 @@ - #define MVNETA_RX_PKT_SIZE(mtu) \ - ALIGN((mtu) + MVNETA_MH_SIZE + MVNETA_VLAN_TAG_LEN + \ - ETH_HLEN + ETH_FCS_LEN, \ -- MVNETA_CPU_D_CACHE_LINE_SIZE) -+ L1_CACHE_BYTES) - - #define IS_TSO_HEADER(txq, addr) \ - ((addr >= txq->tso_hdrs_phys) && \ -@@ -2766,9 +2765,6 @@ static int mvneta_rxq_init(struct mvneta - if (rxq->descs == NULL) - return -ENOMEM; - -- BUG_ON(rxq->descs != -- PTR_ALIGN(rxq->descs, MVNETA_CPU_D_CACHE_LINE_SIZE)); -- - rxq->last_desc = rxq->size - 1; - - /* Set Rx descriptors queue starting address */ -@@ -2839,10 +2835,6 @@ static int mvneta_txq_init(struct mvneta - if (txq->descs == NULL) - return -ENOMEM; - -- /* Make sure descriptor address is cache line size aligned */ -- BUG_ON(txq->descs != -- PTR_ALIGN(txq->descs, MVNETA_CPU_D_CACHE_LINE_SIZE)); -- - txq->last_desc = txq->size - 1; - - /* Set maximum bandwidth for enabled TXQs */ diff --git a/target/linux/mvebu/patches-4.4/050-net-mvneta-fix-changing-MTU-when-using-per-cpu-proce.patch b/target/linux/mvebu/patches-4.4/050-net-mvneta-fix-changing-MTU-when-using-per-cpu-proce.patch deleted file mode 100644 index fdc566351..000000000 --- a/target/linux/mvebu/patches-4.4/050-net-mvneta-fix-changing-MTU-when-using-per-cpu-proce.patch +++ /dev/null @@ -1,75 +0,0 @@ -From: Marcin Wojtas -Date: Fri, 1 Apr 2016 15:21:18 +0200 -Subject: [PATCH] net: mvneta: fix changing MTU when using per-cpu processing - -After enabling per-cpu processing it appeared that under heavy load -changing MTU can result in blocking all port's interrupts and -transmitting data is not possible after the change. - -This commit fixes above issue by disabling percpu interrupts for the -time, when TXQs and RXQs are reconfigured. - -Signed-off-by: Marcin Wojtas -Signed-off-by: David S. Miller ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3044,6 +3044,20 @@ static int mvneta_check_mtu_valid(struct - return mtu; - } - -+static void mvneta_percpu_enable(void *arg) -+{ -+ struct mvneta_port *pp = arg; -+ -+ enable_percpu_irq(pp->dev->irq, IRQ_TYPE_NONE); -+} -+ -+static void mvneta_percpu_disable(void *arg) -+{ -+ struct mvneta_port *pp = arg; -+ -+ disable_percpu_irq(pp->dev->irq); -+} -+ - /* Change the device mtu */ - static int mvneta_change_mtu(struct net_device *dev, int mtu) - { -@@ -3068,6 +3082,7 @@ static int mvneta_change_mtu(struct net_ - * reallocation of the queues - */ - mvneta_stop_dev(pp); -+ on_each_cpu(mvneta_percpu_disable, pp, true); - - mvneta_cleanup_txqs(pp); - mvneta_cleanup_rxqs(pp); -@@ -3091,6 +3106,7 @@ static int mvneta_change_mtu(struct net_ - return ret; - } - -+ on_each_cpu(mvneta_percpu_enable, pp, true); - mvneta_start_dev(pp); - mvneta_port_up(pp); - -@@ -3244,20 +3260,6 @@ static void mvneta_mdio_remove(struct mv - pp->phy_dev = NULL; - } - --static void mvneta_percpu_enable(void *arg) --{ -- struct mvneta_port *pp = arg; -- -- enable_percpu_irq(pp->dev->irq, IRQ_TYPE_NONE); --} -- --static void mvneta_percpu_disable(void *arg) --{ -- struct mvneta_port *pp = arg; -- -- disable_percpu_irq(pp->dev->irq); --} -- - /* Electing a CPU must be done in an atomic way: it should be done - * after or before the removal/insertion of a CPU and this function is - * not reentrant. diff --git a/target/linux/mvebu/patches-4.4/051-ARM-dts-armada-38x-add-buffer-manager-nodes.patch b/target/linux/mvebu/patches-4.4/051-ARM-dts-armada-38x-add-buffer-manager-nodes.patch deleted file mode 100644 index b56de94e3..000000000 --- a/target/linux/mvebu/patches-4.4/051-ARM-dts-armada-38x-add-buffer-manager-nodes.patch +++ /dev/null @@ -1,53 +0,0 @@ -From: Marcin Wojtas -Date: Mon, 14 Mar 2016 09:38:57 +0100 -Subject: [PATCH] ARM: dts: armada-38x: add buffer manager nodes - -Armada 38x network controller supports hardware buffer management (BM). -Since it is now enabled in mvneta driver, appropriate nodes can be added -to armada-38x.dtsi - for the actual common BM unit (bm@c8000) and its -internal SRAM (bm-bppi), which is used for indirect access to buffer -pointer ring residing in DRAM. - -Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional -parameters are supposed to be set in board files. - -Signed-off-by: Marcin Wojtas -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/arch/arm/boot/dts/armada-38x.dtsi -+++ b/arch/arm/boot/dts/armada-38x.dtsi -@@ -540,6 +540,14 @@ - status = "disabled"; - }; - -+ bm: bm@c8000 { -+ compatible = "marvell,armada-380-neta-bm"; -+ reg = <0xc8000 0xac>; -+ clocks = <&gateclk 13>; -+ internal-mem = <&bm_bppi>; -+ status = "disabled"; -+ }; -+ - sata@e0000 { - compatible = "marvell,armada-380-ahci"; - reg = <0xe0000 0x2000>; -@@ -618,6 +626,17 @@ - #size-cells = <1>; - ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>; - }; -+ -+ bm_bppi: bm-bppi { -+ compatible = "mmio-sram"; -+ reg = ; -+ ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ clocks = <&gateclk 13>; -+ no-memory-wc; -+ status = "disabled"; -+ }; - }; - - clocks { diff --git a/target/linux/mvebu/patches-4.4/052-ARM-dts-armada-xp-add-buffer-manager-nodes.patch b/target/linux/mvebu/patches-4.4/052-ARM-dts-armada-xp-add-buffer-manager-nodes.patch deleted file mode 100644 index 65fafd710..000000000 --- a/target/linux/mvebu/patches-4.4/052-ARM-dts-armada-xp-add-buffer-manager-nodes.patch +++ /dev/null @@ -1,53 +0,0 @@ -From: Marcin Wojtas -Date: Mon, 14 Mar 2016 09:38:59 +0100 -Subject: [PATCH] ARM: dts: armada-xp: add buffer manager nodes - -Armada XP network controller supports hardware buffer management (BM). -Since it is now enabled in mvneta driver, appropriate nodes can be added -to armada-xp.dtsi - for the actual common BM unit (bm@c0000) and its -internal SRAM (bm-bppi), which is used for indirect access to buffer -pointer ring residing in DRAM. - -Pools - ports mapping, bm-bppi entry in 'soc' node's ranges and optional -parameters are supposed to be set in board files. - -Signed-off-by: Marcin Wojtas -Signed-off-by: Gregory CLEMENT -Signed-off-by: David S. Miller ---- - ---- a/arch/arm/boot/dts/armada-xp.dtsi -+++ b/arch/arm/boot/dts/armada-xp.dtsi -@@ -253,6 +253,14 @@ - marvell,crypto-sram-size = <0x800>; - }; - -+ bm: bm@c0000 { -+ compatible = "marvell,armada-380-neta-bm"; -+ reg = <0xc0000 0xac>; -+ clocks = <&gateclk 13>; -+ internal-mem = <&bm_bppi>; -+ status = "disabled"; -+ }; -+ - xor@f0900 { - compatible = "marvell,orion-xor"; - reg = <0xF0900 0x100 -@@ -291,6 +299,17 @@ - #size-cells = <1>; - ranges = <0 MBUS_ID(0x09, 0x05) 0 0x800>; - }; -+ -+ bm_bppi: bm-bppi { -+ compatible = "mmio-sram"; -+ reg = ; -+ ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ clocks = <&gateclk 13>; -+ no-memory-wc; -+ status = "disabled"; -+ }; - }; - - clocks { diff --git a/target/linux/mvebu/patches-4.4/053-ARM-dts-Add-SolidRun-Armada-388-Clearfog-A1-DT-file.patch b/target/linux/mvebu/patches-4.4/053-ARM-dts-Add-SolidRun-Armada-388-Clearfog-A1-DT-file.patch deleted file mode 100644 index b25d71071..000000000 --- a/target/linux/mvebu/patches-4.4/053-ARM-dts-Add-SolidRun-Armada-388-Clearfog-A1-DT-file.patch +++ /dev/null @@ -1,611 +0,0 @@ -From 4c945e8556ec7ea5b19d4f8721b212f468656e0d Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 6 Dec 2015 21:52:06 +0000 -Subject: [PATCH] ARM: dts: Add SolidRun Armada 388 Clearfog A1 DT file - -Add support for the SolidRun Armada 388 Clearfog A1 board. This board -has an Armada 388 microsom, dedicated gigabit ethernet, six switched -gigabit ethernet ports, SFP cage, two Mini-PCIe/mSATA slots, a m.2 SATA -slot, and a MikroBUS connector to allow MikroBUS modules to be added. - -This DT file adds support for all board facilities with the exception -of full SFP support. - -Signed-off-by: Russell King -Acked-by: Gregory CLEMENT -Signed-off-by: Gregory CLEMENT ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/armada-388-clearfog.dts | 456 +++++++++++++++++++++ - .../arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 115 ++++++ - 3 files changed, 572 insertions(+) - create mode 100644 arch/arm/boot/dts/armada-388-clearfog.dts - create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -750,6 +750,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-linksys-cobra.dtb \ - armada-385-linksys-rango.dtb \ - armada-385-linksys-shelby.dtb \ -+ armada-388-clearfog.dtb \ - armada-388-db.dtb \ - armada-388-gp.dtb \ - armada-388-rd.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -0,0 +1,456 @@ -+/* -+ * Device Tree file for SolidRun Clearfog revision A1 rev 2.0 (88F6828) -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This file is distributed in the hope that it will be useful -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+#include "armada-388.dtsi" -+#include "armada-38x-solidrun-microsom.dtsi" -+ -+/ { -+ model = "SolidRun Clearfog A1"; -+ compatible = "solidrun,clearfog-a1", "marvell,armada388", -+ "marvell,armada385", "marvell,armada380"; -+ -+ aliases { -+ /* So that mvebu u-boot can update the MAC addresses */ -+ ethernet1 = ð0; -+ ethernet2 = ð1; -+ ethernet3 = ð2; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ soc { -+ internal-regs { -+ ethernet@30000 { -+ phy-mode = "sgmii"; -+ status = "okay"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+ -+ ethernet@34000 { -+ phy-mode = "sgmii"; -+ status = "okay"; -+ -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+ -+ i2c@11000 { -+ /* Is there anything on this? */ -+ clock-frequency = <100000>; -+ pinctrl-0 = <&i2c0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ /* -+ * PCA9655 GPIO expander, up to 1MHz clock. -+ * 0-CON3 CLKREQ# -+ * 1-CON3 PERST# -+ * 2-CON2 PERST# -+ * 3-CON3 W_DISABLE -+ * 4-CON2 CLKREQ# -+ * 5-USB3 overcurrent -+ * 6-USB3 power -+ * 7-CON2 W_DISABLE -+ * 8-JP4 P1 -+ * 9-JP4 P4 -+ * 10-JP4 P5 -+ * 11-m.2 DEVSLP -+ * 12-SFP_LOS -+ * 13-SFP_TX_FAULT -+ * 14-SFP_TX_DISABLE -+ * 15-SFP_MOD_DEF0 -+ */ -+ expander0: gpio-expander@20 { -+ /* -+ * This is how it should be: -+ * compatible = "onnn,pca9655", -+ * "nxp,pca9555"; -+ * but you can't do this because of -+ * the way I2C works. -+ */ -+ compatible = "nxp,pca9555"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ reg = <0x20>; -+ -+ pcie1_0_clkreq { -+ gpio-hog; -+ gpios = <0 GPIO_ACTIVE_LOW>; -+ input; -+ line-name = "pcie1.0-clkreq"; -+ }; -+ pcie1_0_w_disable { -+ gpio-hog; -+ gpios = <3 GPIO_ACTIVE_LOW>; -+ output-low; -+ line-name = "pcie1.0-w-disable"; -+ }; -+ pcie2_0_clkreq { -+ gpio-hog; -+ gpios = <4 GPIO_ACTIVE_LOW>; -+ input; -+ line-name = "pcie2.0-clkreq"; -+ }; -+ pcie2_0_w_disable { -+ gpio-hog; -+ gpios = <7 GPIO_ACTIVE_LOW>; -+ output-low; -+ line-name = "pcie2.0-w-disable"; -+ }; -+ usb3_ilimit { -+ gpio-hog; -+ gpios = <5 GPIO_ACTIVE_LOW>; -+ input; -+ line-name = "usb3-current-limit"; -+ }; -+ usb3_power { -+ gpio-hog; -+ gpios = <6 GPIO_ACTIVE_HIGH>; -+ output-high; -+ line-name = "usb3-power"; -+ }; -+ m2_devslp { -+ gpio-hog; -+ gpios = <11 GPIO_ACTIVE_HIGH>; -+ output-low; -+ line-name = "m.2 devslp"; -+ }; -+ sfp_los { -+ /* SFP loss of signal */ -+ gpio-hog; -+ gpios = <12 GPIO_ACTIVE_HIGH>; -+ input; -+ line-name = "sfp-los"; -+ }; -+ sfp_tx_fault { -+ /* SFP laser fault */ -+ gpio-hog; -+ gpios = <13 GPIO_ACTIVE_HIGH>; -+ input; -+ line-name = "sfp-tx-fault"; -+ }; -+ sfp_tx_disable { -+ /* SFP transmit disable */ -+ gpio-hog; -+ gpios = <14 GPIO_ACTIVE_HIGH>; -+ output-low; -+ line-name = "sfp-tx-disable"; -+ }; -+ sfp_mod_def0 { -+ /* SFP module present */ -+ gpio-hog; -+ gpios = <15 GPIO_ACTIVE_LOW>; -+ input; -+ line-name = "sfp-mod-def0"; -+ }; -+ }; -+ -+ /* The MCP3021 is 100kHz clock only */ -+ mikrobus_adc: mcp3021@4c { -+ compatible = "microchip,mcp3021"; -+ reg = <0x4c>; -+ }; -+ -+ /* Also something at 0x64 */ -+ }; -+ -+ i2c@11100 { -+ /* -+ * Routed to SFP, mikrobus, and PCIe. -+ * SFP limits this to 100kHz, and requires -+ * an AT24C01A/02/04 with address pins tied -+ * low, which takes addresses 0x50 and 0x51. -+ * Mikrobus doesn't specify beyond an I2C -+ * bus being present. -+ * PCIe uses ARP to assign addresses, or -+ * 0x63-0x64. -+ */ -+ clock-frequency = <100000>; -+ pinctrl-0 = <&clearfog_i2c1_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ }; -+ -+ mdio@72004 { -+ pinctrl-0 = <&mdio_pins>; -+ pinctrl-names = "default"; -+ -+ phy_dedicated: ethernet-phy@0 { -+ /* -+ * Annoyingly, the marvell phy driver -+ * configures the LED register, rather -+ * than preserving reset-loaded setting. -+ * We undo that rubbish here. -+ */ -+ marvell,reg-init = <3 16 0 0x101e>; -+ reg = <0>; -+ }; -+ }; -+ -+ pinctrl@18000 { -+ clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { -+ marvell,pins = "mpp46"; -+ marvell,function = "ref"; -+ }; -+ clearfog_dsa0_pins: clearfog-dsa0-pins { -+ marvell,pins = "mpp23", "mpp41"; -+ marvell,function = "gpio"; -+ }; -+ clearfog_i2c1_pins: i2c1-pins { -+ /* SFP, PCIe, mSATA, mikrobus */ -+ marvell,pins = "mpp26", "mpp27"; -+ marvell,function = "i2c1"; -+ }; -+ clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins { -+ marvell,pins = "mpp20"; -+ marvell,function = "gpio"; -+ }; -+ clearfog_sdhci_pins: clearfog-sdhci-pins { -+ marvell,pins = "mpp21", "mpp28", -+ "mpp37", "mpp38", -+ "mpp39", "mpp40"; -+ marvell,function = "sd0"; -+ }; -+ clearfog_spi1_cs_pins: spi1-cs-pins { -+ marvell,pins = "mpp55"; -+ marvell,function = "spi1"; -+ }; -+ mikro_pins: mikro-pins { -+ /* int: mpp22 rst: mpp29 */ -+ marvell,pins = "mpp22", "mpp29"; -+ marvell,function = "gpio"; -+ }; -+ mikro_spi_pins: mikro-spi-pins { -+ marvell,pins = "mpp43"; -+ marvell,function = "spi1"; -+ }; -+ mikro_uart_pins: mikro-uart-pins { -+ marvell,pins = "mpp24", "mpp25"; -+ marvell,function = "ua1"; -+ }; -+ rear_button_pins: rear-button-pins { -+ marvell,pins = "mpp34"; -+ marvell,function = "gpio"; -+ }; -+ }; -+ -+ sata@a8000 { -+ /* pinctrl? */ -+ status = "okay"; -+ }; -+ -+ sata@e0000 { -+ /* pinctrl? */ -+ status = "okay"; -+ }; -+ -+ sdhci@d8000 { -+ bus-width = <4>; -+ cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; -+ no-1-8-v; -+ pinctrl-0 = <&clearfog_sdhci_pins -+ &clearfog_sdhci_cd_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ vmmc = <®_3p3v>; -+ wp-inverted; -+ }; -+ -+ serial@12100 { -+ /* mikrobus uart */ -+ pinctrl-0 = <&mikro_uart_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ }; -+ -+ spi@10680 { -+ /* -+ * We don't seem to have the W25Q32 on the -+ * A1 Rev 2.0 boards, so disable SPI. -+ * CS0: W25Q32 (doesn't appear to be present) -+ * CS1: -+ * CS2: mikrobus -+ */ -+ pinctrl-0 = <&spi1_pins -+ &clearfog_spi1_cs_pins -+ &mikro_spi_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ spi-flash@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "w25q32", "jedec,spi-nor"; -+ reg = <0>; /* Chip select 0 */ -+ spi-max-frequency = <3000000>; -+ status = "disabled"; -+ }; -+ }; -+ -+ usb@58000 { -+ /* CON3, nearest power. */ -+ status = "okay"; -+ }; -+ -+ usb3@f0000 { -+ /* CON2, nearest CPU, USB2 only. */ -+ status = "okay"; -+ }; -+ -+ usb3@f8000 { -+ /* CON7 */ -+ status = "okay"; -+ }; -+ }; -+ -+ pcie-controller { -+ status = "okay"; -+ /* -+ * The two PCIe units are accessible through -+ * the mini-PCIe connectors on the board. -+ */ -+ pcie@2,0 { -+ /* Port 1, Lane 0. CON3, nearest power. */ -+ reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+ }; -+ pcie@3,0 { -+ /* Port 2, Lane 0. CON2, nearest CPU. */ -+ reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ dsa@0 { -+ compatible = "marvell,dsa"; -+ dsa,ethernet = <ð1>; -+ dsa,mii-bus = <&mdio>; -+ pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; -+ pinctrl-names = "default"; -+ #address-cells = <2>; -+ #size-cells = <0>; -+ -+ switch@0 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ reg = <4 0>; -+ -+ port@0 { -+ reg = <0>; -+ label = "lan1"; -+ }; -+ -+ port@1 { -+ reg = <1>; -+ label = "lan2"; -+ }; -+ -+ port@2 { -+ reg = <2>; -+ label = "lan3"; -+ }; -+ -+ port@3 { -+ reg = <3>; -+ label = "lan4"; -+ }; -+ -+ port@4 { -+ reg = <4>; -+ label = "lan5"; -+ }; -+ -+ port@5 { -+ reg = <5>; -+ label = "cpu"; -+ }; -+ -+ port@6 { -+ /* 88E1512 external phy */ -+ reg = <6>; -+ label = "lan6"; -+ fixed-link { -+ speed = <1000>; -+ full-duplex; -+ }; -+ }; -+ }; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-0 = <&rear_button_pins>; -+ pinctrl-names = "default"; -+ -+ button_0 { -+ /* The rear SW3 button */ -+ label = "Rear Button"; -+ gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; -+ linux,can-disable; -+ linux,code = ; -+ }; -+ }; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi -@@ -0,0 +1,115 @@ -+/* -+ * Device Tree file for SolidRun Armada 38x Microsom -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This file is distributed in the hope that it will be useful -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+#include -+#include -+ -+/ { -+ memory { -+ device_type = "memory"; -+ reg = <0x00000000 0x10000000>; /* 256 MB */ -+ }; -+ -+ soc { -+ ranges = ; -+ -+ internal-regs { -+ ethernet@70000 { -+ pinctrl-0 = <&ge0_rgmii_pins>; -+ pinctrl-names = "default"; -+ phy = <&phy_dedicated>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+ }; -+ -+ mdio@72004 { -+ /* -+ * Add the phy clock here, so the phy can be -+ * accessed to read its IDs prior to binding -+ * with the driver. -+ */ -+ pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; -+ pinctrl-names = "default"; -+ -+ phy_dedicated: ethernet-phy@0 { -+ /* -+ * Annoyingly, the marvell phy driver -+ * configures the LED register, rather -+ * than preserving reset-loaded setting. -+ * We undo that rubbish here. -+ */ -+ marvell,reg-init = <3 16 0 0x101e>; -+ reg = <0>; -+ }; -+ }; -+ -+ pinctrl@18000 { -+ microsom_phy_clk_pins: microsom-phy-clk-pins { -+ marvell,pins = "mpp45"; -+ marvell,function = "ref"; -+ }; -+ }; -+ -+ rtc@a3800 { -+ /* -+ * If the rtc doesn't work, run "date reset" -+ * twice in u-boot. -+ */ -+ status = "okay"; -+ }; -+ -+ serial@12000 { -+ pinctrl-0 = <&uart0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ }; -+ }; -+ }; -+}; diff --git a/target/linux/mvebu/patches-4.4/054-ARM-dts-armada-38x-enable-buffer-manager-support-on-.patch b/target/linux/mvebu/patches-4.4/054-ARM-dts-armada-38x-enable-buffer-manager-support-on-.patch deleted file mode 100644 index 705d503c6..000000000 --- a/target/linux/mvebu/patches-4.4/054-ARM-dts-armada-38x-enable-buffer-manager-support-on-.patch +++ /dev/null @@ -1,256 +0,0 @@ -From c49e99c2b25a412623412a461bb751239208b9b3 Mon Sep 17 00:00:00 2001 -From: Marcin Wojtas -Date: Mon, 14 Mar 2016 09:38:58 +0100 -Subject: [PATCH] ARM: dts: armada-38x: enable buffer manager support on Armada - 38x boards - -Since mvneta driver supports using hardware buffer management (BM), in -order to use it, board files have to be adjusted accordingly. This commit -enables BM on: -* A385-DB-AP - each port has its own pool for long and common pool for -short packets, -* A388-ClearFog - same as above, -* A388-DB - to each port unique 'short' and 'long' pools are mapped, -* A388-GP - same as above. - -Moreover appropriate entry is added to 'soc' node ranges, as well as "okay" -status for 'bm' and 'bm-bppi' (internal SRAM) nodes. - -[gregory.clement@free-electrons.com: add suppport for the ClearFog board] - -Signed-off-by: Marcin Wojtas -Signed-off-by: Gregory CLEMENT -Acked-by: Russell King -Signed-off-by: David S. Miller ---- - arch/arm/boot/dts/armada-385-db-ap.dts | 20 +++++++++++++++++++- - arch/arm/boot/dts/armada-388-clearfog.dts | 6 ++++++ - arch/arm/boot/dts/armada-388-db.dts | 17 ++++++++++++++++- - arch/arm/boot/dts/armada-388-gp.dts | 17 ++++++++++++++++- - arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 15 ++++++++++++++- - 5 files changed, 71 insertions(+), 4 deletions(-) - ---- a/arch/arm/boot/dts/armada-385-db-ap.dts -+++ b/arch/arm/boot/dts/armada-385-db-ap.dts -@@ -61,7 +61,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - spi1: spi@10680 { -@@ -138,12 +139,18 @@ - status = "okay"; - phy = <&phy2>; - phy-mode = "sgmii"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <1>; -+ bm,pool-short = <3>; - }; - - ethernet@34000 { - status = "okay"; - phy = <&phy1>; - phy-mode = "sgmii"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <2>; -+ bm,pool-short = <3>; - }; - - ethernet@70000 { -@@ -157,6 +164,13 @@ - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <3>; -+ }; -+ -+ bm@c8000 { -+ status = "okay"; - }; - - nfc: flash@d0000 { -@@ -178,6 +192,10 @@ - }; - }; - -+ bm-bppi { -+ status = "okay"; -+ }; -+ - pcie-controller { - status = "okay"; - ---- a/arch/arm/boot/dts/armada-388-clearfog.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -78,6 +78,9 @@ - internal-regs { - ethernet@30000 { - phy-mode = "sgmii"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <2>; -+ bm,pool-short = <1>; - status = "okay"; - - fixed-link { -@@ -88,6 +91,9 @@ - - ethernet@34000 { - phy-mode = "sgmii"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <3>; -+ bm,pool-short = <1>; - status = "okay"; - - fixed-link { ---- a/arch/arm/boot/dts/armada-388-db.dts -+++ b/arch/arm/boot/dts/armada-388-db.dts -@@ -66,7 +66,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - spi@10600 { -@@ -99,6 +100,9 @@ - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <2>; -+ bm,pool-short = <3>; - }; - - usb@58000 { -@@ -109,6 +113,9 @@ - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <1>; - }; - - mdio@72004 { -@@ -129,6 +136,10 @@ - status = "okay"; - }; - -+ bm@c8000 { -+ status = "okay"; -+ }; -+ - flash@d0000 { - status = "okay"; - num-cs = <1>; -@@ -169,6 +180,10 @@ - }; - }; - -+ bm-bppi { -+ status = "okay"; -+ }; -+ - pcie-controller { - status = "okay"; - /* ---- a/arch/arm/boot/dts/armada-388-gp.dts -+++ b/arch/arm/boot/dts/armada-388-gp.dts -@@ -60,7 +60,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - spi@10600 { -@@ -133,6 +134,9 @@ - status = "okay"; - phy = <&phy1>; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <2>; -+ bm,pool-short = <3>; - }; - - /* CON4 */ -@@ -152,6 +156,9 @@ - status = "okay"; - phy = <&phy0>; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <1>; - }; - - -@@ -186,6 +193,10 @@ - }; - }; - -+ bm@c8000 { -+ status = "okay"; -+ }; -+ - sata@e0000 { - pinctrl-names = "default"; - pinctrl-0 = <&sata2_pins>, <&sata3_pins>; -@@ -240,6 +251,10 @@ - }; - }; - -+ bm-bppi { -+ status = "okay"; -+ }; -+ - pcie-controller { - status = "okay"; - /* ---- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi -+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi -@@ -58,7 +58,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - ethernet@70000 { -@@ -66,6 +67,9 @@ - pinctrl-names = "default"; - phy = <&phy_dedicated>; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <1>; - status = "okay"; - }; - -@@ -110,6 +114,15 @@ - pinctrl-names = "default"; - status = "okay"; - }; -+ -+ bm@c8000 { -+ status = "okay"; -+ }; - }; -+ -+ bm-bppi { -+ status = "okay"; -+ }; -+ - }; - }; diff --git a/target/linux/mvebu/patches-4.4/055-ARM-dts-armada-388-clearfog-remove-duplicate-mdio-en.patch b/target/linux/mvebu/patches-4.4/055-ARM-dts-armada-388-clearfog-remove-duplicate-mdio-en.patch deleted file mode 100644 index 823d514df..000000000 --- a/target/linux/mvebu/patches-4.4/055-ARM-dts-armada-388-clearfog-remove-duplicate-mdio-en.patch +++ /dev/null @@ -1,41 +0,0 @@ -From d261861ab52623e34a25fe6ae76714456edda033 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 10 Jul 2016 16:27:38 +0100 -Subject: [PATCH] ARM: dts: armada-388-clearfog: remove duplicate mdio entry - -The clearfog DTS should not be defining the on-board phy, this device -is located on the microsom. Remove the duplicated definition. - -Reported-by: Jon Nettleton -Signed-off-by: Russell King -Reviewed-by: Andrew Lunn -Signed-off-by: Gregory CLEMENT ---- - arch/arm/boot/dts/armada-388-clearfog.dts | 16 ---------------- - 1 file changed, 16 deletions(-) - ---- a/arch/arm/boot/dts/armada-388-clearfog.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -239,22 +239,6 @@ - status = "okay"; - }; - -- mdio@72004 { -- pinctrl-0 = <&mdio_pins>; -- pinctrl-names = "default"; -- -- phy_dedicated: ethernet-phy@0 { -- /* -- * Annoyingly, the marvell phy driver -- * configures the LED register, rather -- * than preserving reset-loaded setting. -- * We undo that rubbish here. -- */ -- marvell,reg-init = <3 16 0 0x101e>; -- reg = <0>; -- }; -- }; -- - pinctrl@18000 { - clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins { - marvell,pins = "mpp46"; diff --git a/target/linux/mvebu/patches-4.4/100-find_active_root.patch b/target/linux/mvebu/patches-4.4/100-find_active_root.patch deleted file mode 100644 index c997f5b34..000000000 --- a/target/linux/mvebu/patches-4.4/100-find_active_root.patch +++ /dev/null @@ -1,62 +0,0 @@ -The WRT1900AC among other Linksys routers uses a dual-firmware layout. -Dynamically rename the active partition to "ubi". - -Signed-off-by: Imre Kaloz - ---- a/drivers/mtd/ofpart.c -+++ b/drivers/mtd/ofpart.c -@@ -25,6 +25,8 @@ static bool node_has_compatible(struct d - return of_get_property(pp, "compatible", NULL); - } - -+static int mangled_rootblock; -+ - static int parse_ofpart_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -@@ -32,6 +34,7 @@ static int parse_ofpart_partitions(struc - struct device_node *mtd_node; - struct device_node *ofpart_node; - const char *partname; -+ const char *owrtpart = "ubi"; - struct device_node *pp; - int nr_parts, i, ret = 0; - bool dedicated = true; -@@ -110,9 +113,15 @@ static int parse_ofpart_partitions(struc - (*pparts)[i].offset = of_read_number(reg, a_cells); - (*pparts)[i].size = of_read_number(reg + a_cells, s_cells); - -- partname = of_get_property(pp, "label", &len); -- if (!partname) -- partname = of_get_property(pp, "name", &len); -+ if (mangled_rootblock && (i == mangled_rootblock)) { -+ partname = owrtpart; -+ } else { -+ partname = of_get_property(pp, "label", &len); -+ -+ if (!partname) -+ partname = of_get_property(pp, "name", &len); -+ } -+ - (*pparts)[i].name = partname; - - if (of_get_property(pp, "read-only", &len)) -@@ -215,6 +224,18 @@ static int __init ofpart_parser_init(voi - return 0; - } - -+static int __init active_root(char *str) -+{ -+ get_option(&str, &mangled_rootblock); -+ -+ if (!mangled_rootblock) -+ return 1; -+ -+ return 1; -+} -+ -+__setup("mangled_rootblock=", active_root); -+ - static void __exit ofpart_parser_exit(void) - { - deregister_mtd_parser(&ofpart_parser); diff --git a/target/linux/mvebu/patches-4.4/102-revert_i2c_delay.patch b/target/linux/mvebu/patches-4.4/102-revert_i2c_delay.patch deleted file mode 100644 index f97bba2ec..000000000 --- a/target/linux/mvebu/patches-4.4/102-revert_i2c_delay.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp.dtsi -+++ b/arch/arm/boot/dts/armada-xp.dtsi -@@ -98,12 +98,10 @@ - - - i2c0: i2c@11000 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11000 0x100>; - }; - - i2c1: i2c@11100 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11100 0x100>; - }; - diff --git a/target/linux/mvebu/patches-4.4/103-remove-nand-driver-bug.patch b/target/linux/mvebu/patches-4.4/103-remove-nand-driver-bug.patch deleted file mode 100644 index e9cc027b3..000000000 --- a/target/linux/mvebu/patches-4.4/103-remove-nand-driver-bug.patch +++ /dev/null @@ -1,13 +0,0 @@ -Remove a BUG() call that would crash on a race condition that should -otherwise be harmless. - ---- a/drivers/mtd/nand/pxa3xx_nand.c -+++ b/drivers/mtd/nand/pxa3xx_nand.c -@@ -701,7 +701,6 @@ static void handle_data_pio(struct pxa3x - default: - dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__, - info->state); -- BUG(); - } - - /* Update buffer pointers for multi-page read/write */ diff --git a/target/linux/mvebu/patches-4.4/104-linksys_mamba_disable_keep_config.patch b/target/linux/mvebu/patches-4.4/104-linksys_mamba_disable_keep_config.patch deleted file mode 100644 index 4c6b3115e..000000000 --- a/target/linux/mvebu/patches-4.4/104-linksys_mamba_disable_keep_config.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -298,7 +298,6 @@ - nand@d0000 { - status = "okay"; - num-cs = <1>; -- marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - nand-ecc-strength = <4>; diff --git a/target/linux/mvebu/patches-4.4/106-enable-bm-on-linksys-devices.patch b/target/linux/mvebu/patches-4.4/106-enable-bm-on-linksys-devices.patch deleted file mode 100644 index e80bc39a6..000000000 --- a/target/linux/mvebu/patches-4.4/106-enable-bm-on-linksys-devices.patch +++ /dev/null @@ -1,107 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -59,7 +59,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - -@@ -93,6 +94,9 @@ - ethernet@70000 { - status = "okay"; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; -@@ -102,6 +106,9 @@ - ethernet@34000 { - status = "okay"; - phy-mode = "sgmii"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <2>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; -@@ -112,6 +119,10 @@ - status = "okay"; - }; - -+ bm@c8000 { -+ status = "okay"; -+ }; -+ - sata@a8000 { - status = "okay"; - }; -@@ -198,6 +209,10 @@ - }; - }; - -+ bm-bppi { -+ status = "okay"; -+ }; -+ - pcie-controller { - status = "okay"; - ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -71,7 +71,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>; - - pcie-controller { - status = "okay"; -@@ -205,6 +206,9 @@ - pinctrl-names = "default"; - status = "okay"; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; -@@ -216,12 +220,19 @@ - pinctrl-names = "default"; - status = "okay"; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <1>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - -+ bm@c0000 { -+ status = "okay"; -+ }; -+ - /* USB part of the eSATA/USB 2.0 port */ - usb@50000 { - status = "okay"; -@@ -379,6 +390,10 @@ - }; - }; - }; -+ -+ bm-bppi { -+ status = "okay"; -+ }; - }; - - gpio_keys { diff --git a/target/linux/mvebu/patches-4.4/110-pxa3xxx_revert_irq_thread.patch b/target/linux/mvebu/patches-4.4/110-pxa3xxx_revert_irq_thread.patch deleted file mode 100644 index 30da17deb..000000000 --- a/target/linux/mvebu/patches-4.4/110-pxa3xxx_revert_irq_thread.patch +++ /dev/null @@ -1,69 +0,0 @@ -Revert "mtd: pxa3xx-nand: handle PIO in threaded interrupt" - -This reverts commit 24542257a3b987025d4b998ec2d15e556c98ad3f -This upstream change has been causing spurious timeouts on accesses -to the NAND flash if something else on the system is causing -significant latency. - -Nothing guarantees that the thread will run in time, so the -usual timeout is unreliable. - -Signed-off-by: Felix Fietkau - ---- a/drivers/mtd/nand/pxa3xx_nand.c -+++ b/drivers/mtd/nand/pxa3xx_nand.c -@@ -765,24 +765,11 @@ static void start_data_dma(struct pxa3xx - __func__, direction, info->dma_cookie, info->sg.length); - } - --static irqreturn_t pxa3xx_nand_irq_thread(int irq, void *data) --{ -- struct pxa3xx_nand_info *info = data; -- -- handle_data_pio(info); -- -- info->state = STATE_CMD_DONE; -- nand_writel(info, NDSR, NDSR_WRDREQ | NDSR_RDDREQ); -- -- return IRQ_HANDLED; --} -- - static irqreturn_t pxa3xx_nand_irq(int irq, void *devid) - { - struct pxa3xx_nand_info *info = devid; - unsigned int status, is_completed = 0, is_ready = 0; - unsigned int ready, cmd_done; -- irqreturn_t ret = IRQ_HANDLED; - - if (info->cs == 0) { - ready = NDSR_FLASH_RDY; -@@ -824,8 +811,7 @@ static irqreturn_t pxa3xx_nand_irq(int i - } else { - info->state = (status & NDSR_RDDREQ) ? - STATE_PIO_READING : STATE_PIO_WRITING; -- ret = IRQ_WAKE_THREAD; -- goto NORMAL_IRQ_EXIT; -+ handle_data_pio(info); - } - } - if (status & cmd_done) { -@@ -870,7 +856,7 @@ static irqreturn_t pxa3xx_nand_irq(int i - if (is_ready) - complete(&info->dev_ready); - NORMAL_IRQ_EXIT: -- return ret; -+ return IRQ_HANDLED; - } - - static inline int is_buf_blank(uint8_t *buf, size_t len) -@@ -1849,9 +1835,7 @@ static int alloc_nand_resource(struct pl - /* initialize all interrupts to be disabled */ - disable_int(info, NDSR_MASK); - -- ret = request_threaded_irq(irq, pxa3xx_nand_irq, -- pxa3xx_nand_irq_thread, IRQF_ONESHOT, -- pdev->name, info); -+ ret = request_irq(irq, pxa3xx_nand_irq, 0, pdev->name, info); - if (ret < 0) { - dev_err(&pdev->dev, "failed to request IRQ\n"); - goto fail_free_buf; diff --git a/target/linux/mvebu/patches-4.4/120-phy-move-fixed_phy-MII-register-generation-to-a-libr.patch b/target/linux/mvebu/patches-4.4/120-phy-move-fixed_phy-MII-register-generation-to-a-libr.patch deleted file mode 100644 index 0b5042afd..000000000 --- a/target/linux/mvebu/patches-4.4/120-phy-move-fixed_phy-MII-register-generation-to-a-libr.patch +++ /dev/null @@ -1,306 +0,0 @@ -From 4d5621372f6e7ddbfd5879602f82073987bcc722 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 20 Sep 2015 09:57:10 +0100 -Subject: [PATCH 709/744] phy: move fixed_phy MII register generation to a - library - -Move the fixed_phy MII register generation to a library to allow other -software phy implementations to use this code. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/Kconfig | 4 ++ - drivers/net/phy/Makefile | 3 +- - drivers/net/phy/fixed_phy.c | 95 ++------------------------------- - drivers/net/phy/swphy.c | 126 ++++++++++++++++++++++++++++++++++++++++++++ - drivers/net/phy/swphy.h | 8 +++ - 5 files changed, 143 insertions(+), 93 deletions(-) - create mode 100644 drivers/net/phy/swphy.c - create mode 100644 drivers/net/phy/swphy.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -26,6 +26,9 @@ config SWCONFIG_LEDS - bool "Switch LED trigger support" - depends on (SWCONFIG && LEDS_TRIGGERS) - -+config SWPHY -+ bool -+ - comment "MII PHY device drivers" - - config AQUANTIA_PHY -@@ -210,6 +213,7 @@ config RTL8306_PHY - config FIXED_PHY - tristate "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs" - depends on PHYLIB -+ select SWPHY - ---help--- - Adds the platform "fixed" MDIO Bus to cover the boards that use - PHYs that are not connected to the real MDIO bus. ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -1,6 +1,7 @@ - # Makefile for Linux PHY drivers - --libphy-objs := phy.o phy_device.o mdio_bus.o -+libphy-y := phy.o phy_device.o mdio_bus.o -+libphy-$(CONFIG_SWPHY) += swphy.o - - obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o - ---- a/drivers/net/phy/fixed_phy.c -+++ b/drivers/net/phy/fixed_phy.c -@@ -24,6 +24,8 @@ - #include - #include - -+#include "swphy.h" -+ - #define MII_REGS_NUM 29 - - struct fixed_mdio_bus { -@@ -49,101 +51,10 @@ static struct fixed_mdio_bus platform_fm - - static int fixed_phy_update_regs(struct fixed_phy *fp) - { -- u16 bmsr = BMSR_ANEGCAPABLE; -- u16 bmcr = 0; -- u16 lpagb = 0; -- u16 lpa = 0; -- - if (gpio_is_valid(fp->link_gpio)) - fp->status.link = !!gpio_get_value_cansleep(fp->link_gpio); - -- if (fp->status.duplex) { -- switch (fp->status.speed) { -- case 1000: -- bmsr |= BMSR_ESTATEN; -- break; -- case 100: -- bmsr |= BMSR_100FULL; -- break; -- case 10: -- bmsr |= BMSR_10FULL; -- break; -- default: -- break; -- } -- } else { -- switch (fp->status.speed) { -- case 1000: -- bmsr |= BMSR_ESTATEN; -- break; -- case 100: -- bmsr |= BMSR_100HALF; -- break; -- case 10: -- bmsr |= BMSR_10HALF; -- break; -- default: -- break; -- } -- } -- -- if (fp->status.link) { -- bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE; -- -- if (fp->status.duplex) { -- bmcr |= BMCR_FULLDPLX; -- -- switch (fp->status.speed) { -- case 1000: -- bmcr |= BMCR_SPEED1000; -- lpagb |= LPA_1000FULL; -- break; -- case 100: -- bmcr |= BMCR_SPEED100; -- lpa |= LPA_100FULL; -- break; -- case 10: -- lpa |= LPA_10FULL; -- break; -- default: -- pr_warn("fixed phy: unknown speed\n"); -- return -EINVAL; -- } -- } else { -- switch (fp->status.speed) { -- case 1000: -- bmcr |= BMCR_SPEED1000; -- lpagb |= LPA_1000HALF; -- break; -- case 100: -- bmcr |= BMCR_SPEED100; -- lpa |= LPA_100HALF; -- break; -- case 10: -- lpa |= LPA_10HALF; -- break; -- default: -- pr_warn("fixed phy: unknown speed\n"); -- return -EINVAL; -- } -- } -- -- if (fp->status.pause) -- lpa |= LPA_PAUSE_CAP; -- -- if (fp->status.asym_pause) -- lpa |= LPA_PAUSE_ASYM; -- } -- -- fp->regs[MII_PHYSID1] = 0; -- fp->regs[MII_PHYSID2] = 0; -- -- fp->regs[MII_BMSR] = bmsr; -- fp->regs[MII_BMCR] = bmcr; -- fp->regs[MII_LPA] = lpa; -- fp->regs[MII_STAT1000] = lpagb; -- -- return 0; -+ return swphy_update_regs(fp->regs, &fp->status); - } - - static int fixed_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num) ---- /dev/null -+++ b/drivers/net/phy/swphy.c -@@ -0,0 +1,126 @@ -+/* -+ * Software PHY emulation -+ * -+ * Code taken from fixed_phy.c by Russell King -+ * -+ * Author: Vitaly Bordug -+ * Anton Vorontsov -+ * -+ * Copyright (c) 2006-2007 MontaVista Software, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ -+#include -+#include -+#include -+#include -+ -+#include "swphy.h" -+ -+/** -+ * swphy_update_regs - update MII register array with fixed phy state -+ * @regs: array of 32 registers to update -+ * @state: fixed phy status -+ * -+ * Update the array of MII registers with the fixed phy link, speed, -+ * duplex and pause mode settings. -+ */ -+int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state) -+{ -+ u16 bmsr = BMSR_ANEGCAPABLE; -+ u16 bmcr = 0; -+ u16 lpagb = 0; -+ u16 lpa = 0; -+ -+ if (state->duplex) { -+ switch (state->speed) { -+ case 1000: -+ bmsr |= BMSR_ESTATEN; -+ break; -+ case 100: -+ bmsr |= BMSR_100FULL; -+ break; -+ case 10: -+ bmsr |= BMSR_10FULL; -+ break; -+ default: -+ break; -+ } -+ } else { -+ switch (state->speed) { -+ case 1000: -+ bmsr |= BMSR_ESTATEN; -+ break; -+ case 100: -+ bmsr |= BMSR_100HALF; -+ break; -+ case 10: -+ bmsr |= BMSR_10HALF; -+ break; -+ default: -+ break; -+ } -+ } -+ -+ if (state->link) { -+ bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE; -+ -+ if (state->duplex) { -+ bmcr |= BMCR_FULLDPLX; -+ -+ switch (state->speed) { -+ case 1000: -+ bmcr |= BMCR_SPEED1000; -+ lpagb |= LPA_1000FULL; -+ break; -+ case 100: -+ bmcr |= BMCR_SPEED100; -+ lpa |= LPA_100FULL; -+ break; -+ case 10: -+ lpa |= LPA_10FULL; -+ break; -+ default: -+ pr_warn("swphy: unknown speed\n"); -+ return -EINVAL; -+ } -+ } else { -+ switch (state->speed) { -+ case 1000: -+ bmcr |= BMCR_SPEED1000; -+ lpagb |= LPA_1000HALF; -+ break; -+ case 100: -+ bmcr |= BMCR_SPEED100; -+ lpa |= LPA_100HALF; -+ break; -+ case 10: -+ lpa |= LPA_10HALF; -+ break; -+ default: -+ pr_warn("swphy: unknown speed\n"); -+ return -EINVAL; -+ } -+ } -+ -+ if (state->pause) -+ lpa |= LPA_PAUSE_CAP; -+ -+ if (state->asym_pause) -+ lpa |= LPA_PAUSE_ASYM; -+ } -+ -+ regs[MII_PHYSID1] = 0; -+ regs[MII_PHYSID2] = 0; -+ -+ regs[MII_BMSR] = bmsr; -+ regs[MII_BMCR] = bmcr; -+ regs[MII_LPA] = lpa; -+ regs[MII_STAT1000] = lpagb; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(swphy_update_regs); ---- /dev/null -+++ b/drivers/net/phy/swphy.h -@@ -0,0 +1,8 @@ -+#ifndef SWPHY_H -+#define SWPHY_H -+ -+struct fixed_phy_status; -+ -+int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state); -+ -+#endif diff --git a/target/linux/mvebu/patches-4.4/121-phy-convert-swphy-register-generation-to-tabular-for.patch b/target/linux/mvebu/patches-4.4/121-phy-convert-swphy-register-generation-to-tabular-for.patch deleted file mode 100644 index 0d689f39a..000000000 --- a/target/linux/mvebu/patches-4.4/121-phy-convert-swphy-register-generation-to-tabular-for.patch +++ /dev/null @@ -1,203 +0,0 @@ -From cd834fe430f030a63bfa9277bba194e8eef4dbd0 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 20 Sep 2015 10:18:59 +0100 -Subject: [PATCH 710/744] phy: convert swphy register generation to tabular - form - -Convert the swphy register generation to tabular form which allows us -to eliminate multiple switch() statements. This results in a smaller -object code size, more efficient, and easier to add support for faster -speeds. - -Before: - -Idx Name Size VMA LMA File off Algn - 0 .text 00000164 00000000 00000000 00000034 2**2 - - text data bss dec hex filename - 388 0 0 388 184 swphy.o - -After: - -Idx Name Size VMA LMA File off Algn - 0 .text 000000fc 00000000 00000000 00000034 2**2 - 5 .rodata 00000028 00000000 00000000 00000138 2**2 - - text data bss dec hex filename - 324 0 0 324 144 swphy.o - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/swphy.c | 143 ++++++++++++++++++++++++++---------------------- - 1 file changed, 78 insertions(+), 65 deletions(-) - ---- a/drivers/net/phy/swphy.c -+++ b/drivers/net/phy/swphy.c -@@ -20,6 +20,72 @@ - - #include "swphy.h" - -+struct swmii_regs { -+ u16 bmcr; -+ u16 bmsr; -+ u16 lpa; -+ u16 lpagb; -+}; -+ -+enum { -+ SWMII_SPEED_10 = 0, -+ SWMII_SPEED_100, -+ SWMII_SPEED_1000, -+ SWMII_DUPLEX_HALF = 0, -+ SWMII_DUPLEX_FULL, -+}; -+ -+/* -+ * These two tables get bitwise-anded together to produce the final result. -+ * This means the speed table must contain both duplex settings, and the -+ * duplex table must contain all speed settings. -+ */ -+static const struct swmii_regs speed[] = { -+ [SWMII_SPEED_10] = { -+ .bmcr = BMCR_FULLDPLX, -+ .lpa = LPA_10FULL | LPA_10HALF, -+ }, -+ [SWMII_SPEED_100] = { -+ .bmcr = BMCR_FULLDPLX | BMCR_SPEED100, -+ .bmsr = BMSR_100FULL | BMSR_100HALF, -+ .lpa = LPA_100FULL | LPA_100HALF, -+ }, -+ [SWMII_SPEED_1000] = { -+ .bmcr = BMCR_FULLDPLX | BMCR_SPEED1000, -+ .bmsr = BMSR_ESTATEN, -+ .lpagb = LPA_1000FULL | LPA_1000HALF, -+ }, -+}; -+ -+static const struct swmii_regs duplex[] = { -+ [SWMII_DUPLEX_HALF] = { -+ .bmcr = ~BMCR_FULLDPLX, -+ .bmsr = BMSR_ESTATEN | BMSR_100HALF, -+ .lpa = LPA_10HALF | LPA_100HALF, -+ .lpagb = LPA_1000HALF, -+ }, -+ [SWMII_DUPLEX_FULL] = { -+ .bmcr = ~0, -+ .bmsr = BMSR_ESTATEN | BMSR_100FULL, -+ .lpa = LPA_10FULL | LPA_100FULL, -+ .lpagb = LPA_1000FULL, -+ }, -+}; -+ -+static int swphy_decode_speed(int speed) -+{ -+ switch (speed) { -+ case 1000: -+ return SWMII_SPEED_1000; -+ case 100: -+ return SWMII_SPEED_100; -+ case 10: -+ return SWMII_SPEED_10; -+ default: -+ return -EINVAL; -+ } -+} -+ - /** - * swphy_update_regs - update MII register array with fixed phy state - * @regs: array of 32 registers to update -@@ -30,81 +96,28 @@ - */ - int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state) - { -+ int speed_index, duplex_index; - u16 bmsr = BMSR_ANEGCAPABLE; - u16 bmcr = 0; - u16 lpagb = 0; - u16 lpa = 0; - -- if (state->duplex) { -- switch (state->speed) { -- case 1000: -- bmsr |= BMSR_ESTATEN; -- break; -- case 100: -- bmsr |= BMSR_100FULL; -- break; -- case 10: -- bmsr |= BMSR_10FULL; -- break; -- default: -- break; -- } -- } else { -- switch (state->speed) { -- case 1000: -- bmsr |= BMSR_ESTATEN; -- break; -- case 100: -- bmsr |= BMSR_100HALF; -- break; -- case 10: -- bmsr |= BMSR_10HALF; -- break; -- default: -- break; -- } -+ speed_index = swphy_decode_speed(state->speed); -+ if (speed_index < 0) { -+ pr_warn("swphy: unknown speed\n"); -+ return -EINVAL; - } - -+ duplex_index = state->duplex ? SWMII_DUPLEX_FULL : SWMII_DUPLEX_HALF; -+ -+ bmsr |= speed[speed_index].bmsr & duplex[duplex_index].bmsr; -+ - if (state->link) { - bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE; - -- if (state->duplex) { -- bmcr |= BMCR_FULLDPLX; -- -- switch (state->speed) { -- case 1000: -- bmcr |= BMCR_SPEED1000; -- lpagb |= LPA_1000FULL; -- break; -- case 100: -- bmcr |= BMCR_SPEED100; -- lpa |= LPA_100FULL; -- break; -- case 10: -- lpa |= LPA_10FULL; -- break; -- default: -- pr_warn("swphy: unknown speed\n"); -- return -EINVAL; -- } -- } else { -- switch (state->speed) { -- case 1000: -- bmcr |= BMCR_SPEED1000; -- lpagb |= LPA_1000HALF; -- break; -- case 100: -- bmcr |= BMCR_SPEED100; -- lpa |= LPA_100HALF; -- break; -- case 10: -- lpa |= LPA_10HALF; -- break; -- default: -- pr_warn("swphy: unknown speed\n"); -- return -EINVAL; -- } -- } -+ bmcr |= speed[speed_index].bmcr & duplex[duplex_index].bmcr; -+ lpa |= speed[speed_index].lpa & duplex[duplex_index].lpa; -+ lpagb |= speed[speed_index].lpagb & duplex[duplex_index].lpagb; - - if (state->pause) - lpa |= LPA_PAUSE_CAP; diff --git a/target/linux/mvebu/patches-4.4/122-phy-separate-swphy-state-validation-from-register-ge.patch b/target/linux/mvebu/patches-4.4/122-phy-separate-swphy-state-validation-from-register-ge.patch deleted file mode 100644 index 4b332cc8b..000000000 --- a/target/linux/mvebu/patches-4.4/122-phy-separate-swphy-state-validation-from-register-ge.patch +++ /dev/null @@ -1,138 +0,0 @@ -From e07630ad84c7dc145863f079f108154fb7c975e7 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 20 Sep 2015 11:12:15 +0100 -Subject: [PATCH 711/744] phy: separate swphy state validation from register - generation - -Separate out the generation of MII registers from the state validation. -This allows us to simplify the error handing in fixed_phy() by allowing -earlier error detection. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/fixed_phy.c | 15 +++++++-------- - drivers/net/phy/swphy.c | 33 ++++++++++++++++++++++++++------- - drivers/net/phy/swphy.h | 3 ++- - 3 files changed, 35 insertions(+), 16 deletions(-) - ---- a/drivers/net/phy/fixed_phy.c -+++ b/drivers/net/phy/fixed_phy.c -@@ -49,12 +49,12 @@ static struct fixed_mdio_bus platform_fm - .phys = LIST_HEAD_INIT(platform_fmb.phys), - }; - --static int fixed_phy_update_regs(struct fixed_phy *fp) -+static void fixed_phy_update_regs(struct fixed_phy *fp) - { - if (gpio_is_valid(fp->link_gpio)) - fp->status.link = !!gpio_get_value_cansleep(fp->link_gpio); - -- return swphy_update_regs(fp->regs, &fp->status); -+ swphy_update_regs(fp->regs, &fp->status); - } - - static int fixed_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num) -@@ -161,6 +161,10 @@ int fixed_phy_add(unsigned int irq, int - struct fixed_mdio_bus *fmb = &platform_fmb; - struct fixed_phy *fp; - -+ ret = swphy_validate_state(status); -+ if (ret < 0) -+ return ret; -+ - fp = kzalloc(sizeof(*fp), GFP_KERNEL); - if (!fp) - return -ENOMEM; -@@ -180,17 +184,12 @@ int fixed_phy_add(unsigned int irq, int - goto err_regs; - } - -- ret = fixed_phy_update_regs(fp); -- if (ret) -- goto err_gpio; -+ fixed_phy_update_regs(fp); - - list_add_tail(&fp->node, &fmb->phys); - - return 0; - --err_gpio: -- if (gpio_is_valid(fp->link_gpio)) -- gpio_free(fp->link_gpio); - err_regs: - kfree(fp); - return ret; ---- a/drivers/net/phy/swphy.c -+++ b/drivers/net/phy/swphy.c -@@ -87,6 +87,29 @@ static int swphy_decode_speed(int speed) - } - - /** -+ * swphy_validate_state - validate the software phy status -+ * @state: software phy status -+ * -+ * This checks that we can represent the state stored in @state can be -+ * represented in the emulated MII registers. Returns 0 if it can, -+ * otherwise returns -EINVAL. -+ */ -+int swphy_validate_state(const struct fixed_phy_status *state) -+{ -+ int err; -+ -+ if (state->link) { -+ err = swphy_decode_speed(state->speed); -+ if (err < 0) { -+ pr_warn("swphy: unknown speed\n"); -+ return -EINVAL; -+ } -+ } -+ return 0; -+} -+EXPORT_SYMBOL_GPL(swphy_validate_state); -+ -+/** - * swphy_update_regs - update MII register array with fixed phy state - * @regs: array of 32 registers to update - * @state: fixed phy status -@@ -94,7 +117,7 @@ static int swphy_decode_speed(int speed) - * Update the array of MII registers with the fixed phy link, speed, - * duplex and pause mode settings. - */ --int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state) -+void swphy_update_regs(u16 *regs, const struct fixed_phy_status *state) - { - int speed_index, duplex_index; - u16 bmsr = BMSR_ANEGCAPABLE; -@@ -103,10 +126,8 @@ int swphy_update_regs(u16 *regs, const s - u16 lpa = 0; - - speed_index = swphy_decode_speed(state->speed); -- if (speed_index < 0) { -- pr_warn("swphy: unknown speed\n"); -- return -EINVAL; -- } -+ if (WARN_ON(speed_index < 0)) -+ return; - - duplex_index = state->duplex ? SWMII_DUPLEX_FULL : SWMII_DUPLEX_HALF; - -@@ -133,7 +154,5 @@ int swphy_update_regs(u16 *regs, const s - regs[MII_BMCR] = bmcr; - regs[MII_LPA] = lpa; - regs[MII_STAT1000] = lpagb; -- -- return 0; - } - EXPORT_SYMBOL_GPL(swphy_update_regs); ---- a/drivers/net/phy/swphy.h -+++ b/drivers/net/phy/swphy.h -@@ -3,6 +3,7 @@ - - struct fixed_phy_status; - --int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state); -+int swphy_validate_state(const struct fixed_phy_status *state); -+void swphy_update_regs(u16 *regs, const struct fixed_phy_status *state); - - #endif diff --git a/target/linux/mvebu/patches-4.4/123-phy-generate-swphy-registers-on-the-fly.patch b/target/linux/mvebu/patches-4.4/123-phy-generate-swphy-registers-on-the-fly.patch deleted file mode 100644 index 218b902e7..000000000 --- a/target/linux/mvebu/patches-4.4/123-phy-generate-swphy-registers-on-the-fly.patch +++ /dev/null @@ -1,204 +0,0 @@ -From e0f33a88243329da1aa5a90fe10ab25c9fb0a091 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 20 Sep 2015 11:28:39 +0100 -Subject: [PATCH 712/744] phy: generate swphy registers on the fly - -Generate software phy registers as and when requested, rather than -duplicating the state in fixed_phy. This allows us to eliminate -the duplicate storage of of the same data, which is only different -in format. - -As fixed_phy_update_regs() no longer updates register state, rename -it to fixed_phy_update(). - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/fixed_phy.c | 31 +++++------------------------- - drivers/net/phy/swphy.c | 47 ++++++++++++++++++++++++++++++++------------- - drivers/net/phy/swphy.h | 2 +- - 3 files changed, 40 insertions(+), 40 deletions(-) - ---- a/drivers/net/phy/fixed_phy.c -+++ b/drivers/net/phy/fixed_phy.c -@@ -26,8 +26,6 @@ - - #include "swphy.h" - --#define MII_REGS_NUM 29 -- - struct fixed_mdio_bus { - int irqs[PHY_MAX_ADDR]; - struct mii_bus *mii_bus; -@@ -36,7 +34,6 @@ struct fixed_mdio_bus { - - struct fixed_phy { - int addr; -- u16 regs[MII_REGS_NUM]; - struct phy_device *phydev; - struct fixed_phy_status status; - int (*link_update)(struct net_device *, struct fixed_phy_status *); -@@ -49,12 +46,10 @@ static struct fixed_mdio_bus platform_fm - .phys = LIST_HEAD_INIT(platform_fmb.phys), - }; - --static void fixed_phy_update_regs(struct fixed_phy *fp) -+static void fixed_phy_update(struct fixed_phy *fp) - { - if (gpio_is_valid(fp->link_gpio)) - fp->status.link = !!gpio_get_value_cansleep(fp->link_gpio); -- -- swphy_update_regs(fp->regs, &fp->status); - } - - static int fixed_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num) -@@ -62,29 +57,15 @@ static int fixed_mdio_read(struct mii_bu - struct fixed_mdio_bus *fmb = bus->priv; - struct fixed_phy *fp; - -- if (reg_num >= MII_REGS_NUM) -- return -1; -- -- /* We do not support emulating Clause 45 over Clause 22 register reads -- * return an error instead of bogus data. -- */ -- switch (reg_num) { -- case MII_MMD_CTRL: -- case MII_MMD_DATA: -- return -1; -- default: -- break; -- } -- - list_for_each_entry(fp, &fmb->phys, node) { - if (fp->addr == phy_addr) { - /* Issue callback if user registered it. */ - if (fp->link_update) { - fp->link_update(fp->phydev->attached_dev, - &fp->status); -- fixed_phy_update_regs(fp); -+ fixed_phy_update(fp); - } -- return fp->regs[reg_num]; -+ return swphy_read_reg(reg_num, &fp->status); - } - } - -@@ -144,7 +125,7 @@ int fixed_phy_update_state(struct phy_de - _UPD(pause); - _UPD(asym_pause); - #undef _UPD -- fixed_phy_update_regs(fp); -+ fixed_phy_update(fp); - return 0; - } - } -@@ -169,8 +150,6 @@ int fixed_phy_add(unsigned int irq, int - if (!fp) - return -ENOMEM; - -- memset(fp->regs, 0xFF, sizeof(fp->regs[0]) * MII_REGS_NUM); -- - fmb->irqs[phy_addr] = irq; - - fp->addr = phy_addr; -@@ -184,7 +163,7 @@ int fixed_phy_add(unsigned int irq, int - goto err_regs; - } - -- fixed_phy_update_regs(fp); -+ fixed_phy_update(fp); - - list_add_tail(&fp->node, &fmb->phys); - ---- a/drivers/net/phy/swphy.c -+++ b/drivers/net/phy/swphy.c -@@ -20,6 +20,8 @@ - - #include "swphy.h" - -+#define MII_REGS_NUM 29 -+ - struct swmii_regs { - u16 bmcr; - u16 bmsr; -@@ -110,14 +112,13 @@ int swphy_validate_state(const struct fi - EXPORT_SYMBOL_GPL(swphy_validate_state); - - /** -- * swphy_update_regs - update MII register array with fixed phy state -- * @regs: array of 32 registers to update -+ * swphy_read_reg - return a MII register from the fixed phy state -+ * @reg: MII register - * @state: fixed phy status - * -- * Update the array of MII registers with the fixed phy link, speed, -- * duplex and pause mode settings. -+ * Return the MII @reg register generated from the fixed phy state @state. - */ --void swphy_update_regs(u16 *regs, const struct fixed_phy_status *state) -+int swphy_read_reg(int reg, const struct fixed_phy_status *state) - { - int speed_index, duplex_index; - u16 bmsr = BMSR_ANEGCAPABLE; -@@ -125,9 +126,12 @@ void swphy_update_regs(u16 *regs, const - u16 lpagb = 0; - u16 lpa = 0; - -+ if (reg > MII_REGS_NUM) -+ return -1; -+ - speed_index = swphy_decode_speed(state->speed); - if (WARN_ON(speed_index < 0)) -- return; -+ return 0; - - duplex_index = state->duplex ? SWMII_DUPLEX_FULL : SWMII_DUPLEX_HALF; - -@@ -147,12 +151,29 @@ void swphy_update_regs(u16 *regs, const - lpa |= LPA_PAUSE_ASYM; - } - -- regs[MII_PHYSID1] = 0; -- regs[MII_PHYSID2] = 0; -+ switch (reg) { -+ case MII_BMCR: -+ return bmcr; -+ case MII_BMSR: -+ return bmsr; -+ case MII_PHYSID1: -+ case MII_PHYSID2: -+ return 0; -+ case MII_LPA: -+ return lpa; -+ case MII_STAT1000: -+ return lpagb; -+ -+ /* -+ * We do not support emulating Clause 45 over Clause 22 register -+ * reads. Return an error instead of bogus data. -+ */ -+ case MII_MMD_CTRL: -+ case MII_MMD_DATA: -+ return -1; - -- regs[MII_BMSR] = bmsr; -- regs[MII_BMCR] = bmcr; -- regs[MII_LPA] = lpa; -- regs[MII_STAT1000] = lpagb; -+ default: -+ return 0xffff; -+ } - } --EXPORT_SYMBOL_GPL(swphy_update_regs); -+EXPORT_SYMBOL_GPL(swphy_read_reg); ---- a/drivers/net/phy/swphy.h -+++ b/drivers/net/phy/swphy.h -@@ -4,6 +4,6 @@ - struct fixed_phy_status; - - int swphy_validate_state(const struct fixed_phy_status *state); --void swphy_update_regs(u16 *regs, const struct fixed_phy_status *state); -+int swphy_read_reg(int reg, const struct fixed_phy_status *state); - - #endif diff --git a/target/linux/mvebu/patches-4.4/124-phy-improve-safety-of-fixed-phy-MII-register-reading.patch b/target/linux/mvebu/patches-4.4/124-phy-improve-safety-of-fixed-phy-MII-register-reading.patch deleted file mode 100644 index 5167b0710..000000000 --- a/target/linux/mvebu/patches-4.4/124-phy-improve-safety-of-fixed-phy-MII-register-reading.patch +++ /dev/null @@ -1,92 +0,0 @@ -From c36739c3cfd277a4cc9820a29dd0f4b7fbac795b Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 20 Sep 2015 18:31:36 +0100 -Subject: [PATCH 713/744] phy: improve safety of fixed-phy MII register reading - -There is no prevention of a concurrent call to both fixed_mdio_read() -and fixed_phy_update_state(), which can result in the state being -modified while it's being inspected. Fix this by using a seqcount -to detect modifications, and memcpy()ing the state. - -We remain slightly naughty here, calling link_update() and updating -the link status within the read-side loop - which would need rework -of the design to change. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/fixed_phy.c | 28 +++++++++++++++++++++------- - 1 file changed, 21 insertions(+), 7 deletions(-) - ---- a/drivers/net/phy/fixed_phy.c -+++ b/drivers/net/phy/fixed_phy.c -@@ -23,6 +23,7 @@ - #include - #include - #include -+#include - - #include "swphy.h" - -@@ -35,6 +36,7 @@ struct fixed_mdio_bus { - struct fixed_phy { - int addr; - struct phy_device *phydev; -+ seqcount_t seqcount; - struct fixed_phy_status status; - int (*link_update)(struct net_device *, struct fixed_phy_status *); - struct list_head node; -@@ -59,13 +61,21 @@ static int fixed_mdio_read(struct mii_bu - - list_for_each_entry(fp, &fmb->phys, node) { - if (fp->addr == phy_addr) { -- /* Issue callback if user registered it. */ -- if (fp->link_update) { -- fp->link_update(fp->phydev->attached_dev, -- &fp->status); -- fixed_phy_update(fp); -- } -- return swphy_read_reg(reg_num, &fp->status); -+ struct fixed_phy_status state; -+ int s; -+ -+ do { -+ s = read_seqcount_begin(&fp->seqcount); -+ /* Issue callback if user registered it. */ -+ if (fp->link_update) { -+ fp->link_update(fp->phydev->attached_dev, -+ &fp->status); -+ fixed_phy_update(fp); -+ } -+ state = fp->status; -+ } while (read_seqcount_retry(&fp->seqcount, s)); -+ -+ return swphy_read_reg(reg_num, &state); - } - } - -@@ -117,6 +127,7 @@ int fixed_phy_update_state(struct phy_de - - list_for_each_entry(fp, &fmb->phys, node) { - if (fp->addr == phydev->addr) { -+ write_seqcount_begin(&fp->seqcount); - #define _UPD(x) if (changed->x) \ - fp->status.x = status->x - _UPD(link); -@@ -126,6 +137,7 @@ int fixed_phy_update_state(struct phy_de - _UPD(asym_pause); - #undef _UPD - fixed_phy_update(fp); -+ write_seqcount_end(&fp->seqcount); - return 0; - } - } -@@ -150,6 +162,8 @@ int fixed_phy_add(unsigned int irq, int - if (!fp) - return -ENOMEM; - -+ seqcount_init(&fp->seqcount); -+ - fmb->irqs[phy_addr] = irq; - - fp->addr = phy_addr; diff --git a/target/linux/mvebu/patches-4.4/125-phy-provide-a-hook-for-link-up-link-down-events.patch b/target/linux/mvebu/patches-4.4/125-phy-provide-a-hook-for-link-up-link-down-events.patch deleted file mode 100644 index 0a0157be9..000000000 --- a/target/linux/mvebu/patches-4.4/125-phy-provide-a-hook-for-link-up-link-down-events.patch +++ /dev/null @@ -1,183 +0,0 @@ -From d8b4e728f598d3c8a9b219d4679d5de350caa082 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 18 Sep 2015 14:42:16 +0100 -Subject: [PATCH 714/744] phy: provide a hook for link up/link down events - -Sometimes, we need to do additional work between the PHY coming up and -marking the carrier present - for example, we may need to wait for the -PHY to MAC link to finish negotiation. This changes phylib to provide -a notification function pointer which avoids the built-in -netif_carrier_on() and netif_carrier_off() functions. - -Standard ->adjust_link functionality is provided by hooking a helper -into the new ->phy_link_change method. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/phy.c | 42 ++++++++++++++++++++++-------------------- - drivers/net/phy/phy_device.c | 14 ++++++++++++++ - include/linux/phy.h | 1 + - 3 files changed, 37 insertions(+), 20 deletions(-) - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -849,6 +849,16 @@ void phy_start(struct phy_device *phydev - } - EXPORT_SYMBOL(phy_start); - -+static void phy_link_up(struct phy_device *phydev) -+{ -+ phydev->phy_link_change(phydev, true, true); -+} -+ -+static void phy_link_down(struct phy_device *phydev, bool do_carrier) -+{ -+ phydev->phy_link_change(phydev, false, do_carrier); -+} -+ - /** - * phy_state_machine - Handle the state machine - * @work: work_struct that describes the work to be done -@@ -890,8 +900,7 @@ void phy_state_machine(struct work_struc - /* If the link is down, give up on negotiation for now */ - if (!phydev->link) { - phydev->state = PHY_NOLINK; -- netif_carrier_off(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -+ phy_link_down(phydev, true); - break; - } - -@@ -903,9 +912,7 @@ void phy_state_machine(struct work_struc - /* If AN is done, we're running */ - if (err > 0) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -- -+ phy_link_up(phydev); - } else if (0 == phydev->link_timeout--) - needs_aneg = true; - break; -@@ -930,8 +937,7 @@ void phy_state_machine(struct work_struc - } - } - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -+ phy_link_up(phydev); - } - break; - case PHY_FORCING: -@@ -941,13 +947,12 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - if (0 == phydev->link_timeout--) - needs_aneg = true; -+ phy_link_down(phydev, false); - } -- -- phydev->adjust_link(phydev->attached_dev); - break; - case PHY_RUNNING: - /* Only register a CHANGE if we are polling or ignoring -@@ -979,14 +984,12 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - phydev->state = PHY_NOLINK; -- netif_carrier_off(phydev->attached_dev); -+ phy_link_down(phydev, true); - } - -- phydev->adjust_link(phydev->attached_dev); -- - if (phy_interrupt_is_valid(phydev)) - err = phy_config_interrupt(phydev, - PHY_INTERRUPT_ENABLED); -@@ -994,8 +997,7 @@ void phy_state_machine(struct work_struc - case PHY_HALTED: - if (phydev->link) { - phydev->link = 0; -- netif_carrier_off(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -+ phy_link_down(phydev, true); - do_suspend = true; - } - break; -@@ -1015,11 +1017,11 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - phydev->state = PHY_NOLINK; -+ phy_link_down(phydev, false); - } -- phydev->adjust_link(phydev->attached_dev); - } else { - phydev->state = PHY_AN; - phydev->link_timeout = PHY_AN_TIMEOUT; -@@ -1031,11 +1033,11 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - phydev->state = PHY_NOLINK; -+ phy_link_down(phydev, false); - } -- phydev->adjust_link(phydev->attached_dev); - } - break; - } ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -441,6 +441,19 @@ struct phy_device *phy_find_first(struct - } - EXPORT_SYMBOL(phy_find_first); - -+static void phy_link_change(struct phy_device *phydev, bool up, bool do_carrier) -+{ -+ struct net_device *netdev = phydev->attached_dev; -+ -+ if (do_carrier) { -+ if (up) -+ netif_carrier_on(netdev); -+ else -+ netif_carrier_off(netdev); -+ } -+ phydev->adjust_link(netdev); -+} -+ - /** - * phy_prepare_link - prepares the PHY layer to monitor link status - * @phydev: target phy_device struct -@@ -659,6 +672,7 @@ int phy_attach_direct(struct net_device - goto error; - } - -+ phydev->phy_link_change = phy_link_change; - phydev->attached_dev = dev; - dev->phydev = phydev; - ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -429,6 +429,7 @@ struct phy_device { - - u8 mdix; - -+ void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); - void (*adjust_link)(struct net_device *dev); - }; - #define to_phy_device(d) container_of(d, struct phy_device, dev) diff --git a/target/linux/mvebu/patches-4.4/126-phy-marvell-88E1512-add-flow-control-support.patch b/target/linux/mvebu/patches-4.4/126-phy-marvell-88E1512-add-flow-control-support.patch deleted file mode 100644 index cfb020219..000000000 --- a/target/linux/mvebu/patches-4.4/126-phy-marvell-88E1512-add-flow-control-support.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 5eed0bf3bc3e69b20a13d8ffcdf97cb720391637 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 00:34:08 +0100 -Subject: [PATCH 735/744] phy: marvell: 88E1512: add flow control support - -The Marvell PHYs support pause frame advertisments, so we should not be -masking their support off. Add the necessary flag to the Marvell PHY -to allow any MAC level pause frame support to be advertised. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/marvell.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/phy/marvell.c -+++ b/drivers/net/phy/marvell.c -@@ -1148,7 +1148,7 @@ static struct phy_driver marvell_drivers - .phy_id = MARVELL_PHY_ID_88E1510, - .phy_id_mask = MARVELL_PHY_ID_MASK, - .name = "Marvell 88E1510", -- .features = PHY_GBIT_FEATURES, -+ .features = PHY_GBIT_FEATURES | SUPPORTED_Pause, - .flags = PHY_HAS_INTERRUPT, - .config_aneg = &m88e1510_config_aneg, - .read_status = &marvell_read_status, diff --git a/target/linux/mvebu/patches-4.4/127-phy-export-phy_start_machine-for-phylink.patch b/target/linux/mvebu/patches-4.4/127-phy-export-phy_start_machine-for-phylink.patch deleted file mode 100644 index eb73933f3..000000000 --- a/target/linux/mvebu/patches-4.4/127-phy-export-phy_start_machine-for-phylink.patch +++ /dev/null @@ -1,25 +0,0 @@ -From f2a9687b39cda3fb67ecd5eaa88e3545e78c982c Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 16 Oct 2015 12:18:41 +0100 -Subject: [PATCH 715/744] phy: export phy_start_machine() for phylink - -phylink will need phy_start_machine exported, so lets export it as a -GPL symbol. Documentation/networking/phy.txt indicates that this -should be a PHY API function. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/phy.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -568,6 +568,7 @@ void phy_start_machine(struct phy_device - { - queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ); - } -+EXPORT_SYMBOL_GPL(phy_start_machine); - - /** - * phy_stop_machine - stop the PHY state machine tracking diff --git a/target/linux/mvebu/patches-4.4/128-phy-export-phy_speed_to_str-for-phylink.patch b/target/linux/mvebu/patches-4.4/128-phy-export-phy_speed_to_str-for-phylink.patch deleted file mode 100644 index 4fa8a6afb..000000000 --- a/target/linux/mvebu/patches-4.4/128-phy-export-phy_speed_to_str-for-phylink.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 5c77cc2ffd5deb4762d9551409472f2441297fe7 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 18 Oct 2015 19:51:10 +0100 -Subject: [PATCH 716/744] phy: export phy_speed_to_str() for phylink - -phylink would like to reuse phy_speed_to_str() to convert the speed -to a string. Add a prototype and export this helper function. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/phy.c | 3 ++- - include/linux/phy.h | 1 + - 2 files changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -38,7 +38,7 @@ - - #include - --static const char *phy_speed_to_str(int speed) -+const char *phy_speed_to_str(int speed) - { - switch (speed) { - case SPEED_10: -@@ -57,6 +57,7 @@ static const char *phy_speed_to_str(int - return "Unsupported (update phy.c)"; - } - } -+EXPORT_SYMBOL_GPL(phy_speed_to_str); - - #define PHY_STATE_STR(_state) \ - case PHY_##_state: \ ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -823,6 +823,7 @@ int phy_ethtool_gset(struct phy_device * - int phy_ethtool_ioctl(struct phy_device *phydev, void *useraddr); - int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); - int phy_start_interrupts(struct phy_device *phydev); -+const char *phy_speed_to_str(int speed); - void phy_print_status(struct phy_device *phydev); - void phy_device_free(struct phy_device *phydev); - int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); diff --git a/target/linux/mvebu/patches-4.4/129-phy-add-I2C-mdio-bus.patch b/target/linux/mvebu/patches-4.4/129-phy-add-I2C-mdio-bus.patch deleted file mode 100644 index ad26e6b45..000000000 --- a/target/linux/mvebu/patches-4.4/129-phy-add-I2C-mdio-bus.patch +++ /dev/null @@ -1,163 +0,0 @@ -From 7f36ac946bfbd4090b8b94be3661b41ac73e21f4 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 25 Sep 2015 17:43:52 +0100 -Subject: [PATCH 717/744] phy: add I2C mdio bus - -Add an I2C MDIO bus bridge library, to allow phylib to access PHYs which -are connected to an I2C bus instead of the more conventional MDIO bus. -Such PHYs can be found in SFP adapters and SFF modules. - -Signed-off-by: Russell King ---- - drivers/net/phy/Kconfig | 10 ++++++ - drivers/net/phy/Makefile | 1 + - drivers/net/phy/mdio-i2c.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++ - drivers/net/phy/mdio-i2c.h | 19 ++++++++++ - 4 files changed, 120 insertions(+) - create mode 100644 drivers/net/phy/mdio-i2c.c - create mode 100644 drivers/net/phy/mdio-i2c.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -238,6 +238,16 @@ config MDIO_GPIO - To compile this driver as a module, choose M here: the module - will be called mdio-gpio. - -+config MDIO_I2C -+ tristate -+ depends on I2C -+ help -+ Support I2C based PHYs. This provides a MDIO bus bridged -+ to I2C to allow PHYs connected in I2C mode to be accessed -+ using the existing infrastructure. -+ -+ This is library mode. -+ - config MDIO_OCTEON - tristate "Support for MDIO buses on Octeon and ThunderX SOCs" - depends on 64BIT ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -41,6 +41,7 @@ obj-$(CONFIG_SWCONFIG_B53) += b53/ - obj-$(CONFIG_FIXED_PHY) += fixed_phy.o - obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o - obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o -+obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o - obj-$(CONFIG_NATIONAL_PHY) += national.o - obj-$(CONFIG_DP83640_PHY) += dp83640.o - obj-$(CONFIG_DP83848_PHY) += dp83848.o ---- /dev/null -+++ b/drivers/net/phy/mdio-i2c.c -@@ -0,0 +1,90 @@ -+/* -+ * MDIO I2C bridge -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include -+#include -+ -+#include "mdio-i2c.h" -+ -+static int i2c_mii_read(struct mii_bus *bus, int phy_id, int reg) -+{ -+ struct i2c_adapter *i2c = bus->priv; -+ struct i2c_msg msgs[2]; -+ u8 data[2], dev_addr = reg; -+ int bus_addr, ret; -+ -+ bus_addr = 0x40 + phy_id; -+ if (bus_addr == 0x50 || bus_addr == 0x51) -+ return 0xffff; -+ -+ msgs[0].addr = bus_addr; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = &dev_addr; -+ msgs[1].addr = bus_addr; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = sizeof(data); -+ msgs[1].buf = data; -+ -+ ret = i2c_transfer(i2c, msgs, ARRAY_SIZE(msgs)); -+ if (ret != ARRAY_SIZE(msgs)) -+ return 0xffff; -+ -+ return data[0] << 8 | data[1]; -+} -+ -+static int i2c_mii_write(struct mii_bus *bus, int phy_id, int reg, u16 val) -+{ -+ struct i2c_adapter *i2c = bus->priv; -+ struct i2c_msg msg; -+ int bus_addr, ret; -+ u8 data[3]; -+ -+ bus_addr = 0x40 + phy_id; -+ if (bus_addr == 0x50 || bus_addr == 0x51) -+ return 0; -+ -+ data[0] = reg; -+ data[1] = val >> 8; -+ data[2] = val; -+ -+ msg.addr = bus_addr; -+ msg.flags = 0; -+ msg.len = 3; -+ msg.buf = data; -+ -+ ret = i2c_transfer(i2c, &msg, 1); -+ -+ return ret < 0 ? ret : 0; -+} -+ -+struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c) -+{ -+ struct mii_bus *mii; -+ -+ if (!i2c_check_functionality(i2c, I2C_FUNC_I2C)) -+ return ERR_PTR(-EINVAL); -+ -+ mii = mdiobus_alloc(); -+ if (!mii) -+ return ERR_PTR(-ENOMEM); -+ -+ snprintf(mii->id, MII_BUS_ID_SIZE, "i2c:%s", dev_name(parent)); -+ mii->parent = parent; -+ mii->read = i2c_mii_read; -+ mii->write = i2c_mii_write; -+ mii->priv = i2c; -+ -+ return mii; -+} -+EXPORT_SYMBOL_GPL(mdio_i2c_alloc); -+ -+MODULE_AUTHOR("Russell King"); -+MODULE_DESCRIPTION("MDIO I2C bridge library"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/drivers/net/phy/mdio-i2c.h -@@ -0,0 +1,19 @@ -+/* -+ * MDIO I2C bridge -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef MDIO_I2C_H -+#define MDIO_I2C_H -+ -+struct device; -+struct i2c_adapter; -+struct mii_bus; -+ -+struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c); -+ -+#endif diff --git a/target/linux/mvebu/patches-4.4/130-phylink-add-phylink-infrastructure.patch b/target/linux/mvebu/patches-4.4/130-phylink-add-phylink-infrastructure.patch deleted file mode 100644 index 141ea07d2..000000000 --- a/target/linux/mvebu/patches-4.4/130-phylink-add-phylink-infrastructure.patch +++ /dev/null @@ -1,1005 +0,0 @@ -From c6de6de7d3df13822872ac756eebe868d236297a Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 22 Sep 2015 20:52:18 +0100 -Subject: [PATCH 718/744] phylink: add phylink infrastructure - -The link between the ethernet MAC and its PHY has become more complex -as the interface evolves. This is especially true with serdes links, -where the part of the PHY is effectively integrated into the MAC. - -Serdes links can be connected to a variety of devices, including SFF -modules soldered down onto the board with the MAC, a SFP cage with -a hotpluggable SFP module which may contain a PHY or directly modulate -the serdes signals onto optical media with or without a PHY, or even -a classical PHY connection. - -Moreover, the negotiation information on serdes links comes in two -varieties - SGMII mode, where the PHY provides its speed/duplex/flow -control information to the MAC, and 1000base-X mode where both ends -exchange their abilities and each resolve the link capabilities. - -This means we need a more flexible means to support these arrangements, -particularly with the hotpluggable nature of SFP, where the PHY can -be attached or detached after the network device has been brought up. - -Ethtool information can come from multiple sources: -- we may have a PHY operating in either SGMII or 1000base-X mode, in - which case we take ethtool/mii data directly from the PHY. -- we may have a optical SFP module without a PHY, with the MAC - operating in 1000base-X mode - the ethtool/mii data needs to come - from the MAC. -- we may have a copper SFP module with a PHY whic can't be accessed, - which means we need to take ethtool/mii data from the MAC. - -Phylink aims to solve this by providing an intermediary between the -MAC and PHY, providing a safe way for PHYs to be hotplugged, and -allowing a SFP driver to reconfigure the serdes connection. - -Phylink also takes over support of fixed link connections, where -the speed/duplex/flow control are fixed, but link status may be -controlled by a GPIO signal. By avoiding the fixed-phy implementation, -phylink can provide a faster response to link events: fixed-phy has -to wait for phylib to operate its state machine, which can take -several seconds. In comparison, phylink takes milliseconds. - -Signed-off-by: Russell King ---- - drivers/net/phy/Kconfig | 10 + - drivers/net/phy/Makefile | 1 + - drivers/net/phy/phy_device.c | 1 + - drivers/net/phy/phylink.c | 816 +++++++++++++++++++++++++++++++++++++++++++ - include/linux/phy.h | 2 + - include/linux/phylink.h | 70 ++++ - 6 files changed, 900 insertions(+) - create mode 100644 drivers/net/phy/phylink.c - create mode 100644 include/linux/phylink.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -10,6 +10,16 @@ menuconfig PHYLIB - devices. This option provides infrastructure for - managing PHY devices. - -+config PHYLINK -+ tristate -+ depends on NETDEVICES -+ select PHYLIB -+ select SWPHY -+ help -+ PHYlink models the link between the PHY and MAC, allowing fixed -+ configuration links, PHYs, and Serdes links with MAC level -+ autonegotiation modes. -+ - if PHYLIB - - config MDIO_BOARDINFO ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -5,6 +5,7 @@ libphy-$(CONFIG_SWPHY) += swphy.o - - obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o - -+obj-$(CONFIG_PHYLINK) += phylink.o - obj-$(CONFIG_PHYLIB) += libphy.o - obj-$(CONFIG_SWCONFIG) += swconfig.o - obj-$(CONFIG_AQUANTIA_PHY) += aquantia.o ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -754,6 +754,7 @@ void phy_detach(struct phy_device *phyde - phydev->attached_dev->phydev = NULL; - phydev->attached_dev = NULL; - phy_suspend(phydev); -+ phydev->phylink = NULL; - - /* If the device had no specific driver before (i.e. - it - * was using the generic driver), we unbind the device ---- /dev/null -+++ b/drivers/net/phy/phylink.c -@@ -0,0 +1,816 @@ -+/* -+ * phylink models the MAC to optional PHY connection, supporting -+ * technologies such as SFP cages where the PHY is hot-pluggable. -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "swphy.h" -+ -+#define SUPPORTED_INTERFACES \ -+ (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ -+ SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) -+#define ADVERTISED_INTERFACES \ -+ (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ -+ ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) -+ -+enum { -+ PHYLINK_DISABLE_STOPPED, -+}; -+ -+struct phylink { -+ struct net_device *netdev; -+ const struct phylink_mac_ops *ops; -+ struct mutex config_mutex; -+ -+ unsigned long phylink_disable_state; /* bitmask of disables */ -+ struct phy_device *phydev; -+ phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ -+ u8 link_an_mode; /* MLO_AN_xxx */ -+ u8 link_port; /* The current non-phy ethtool port */ -+ u32 link_port_support; /* SUPPORTED_xxx ethtool for ports */ -+ -+ /* The link configuration settings */ -+ struct phylink_link_state link_config; -+ struct gpio_desc *link_gpio; -+ -+ struct mutex state_mutex; /* may be taken within config_mutex */ -+ struct phylink_link_state phy_state; -+ struct work_struct resolve; -+ -+ bool mac_link_up; -+}; -+ -+static const char *phylink_an_mode_str(unsigned int mode) -+{ -+ static const char *modestr[] = { -+ [MLO_AN_PHY] = "phy", -+ [MLO_AN_FIXED] = "fixed", -+ [MLO_AN_SGMII] = "SGMII", -+ [MLO_AN_8023Z] = "802.3z", -+ }; -+ -+ return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; -+} -+ -+static int phylink_parse_fixedlink(struct phylink *pl, struct device_node *np) -+{ -+ struct device_node *fixed_node; -+ int ret, len; -+ -+ fixed_node = of_get_child_by_name(np, "fixed-link"); -+ if (fixed_node) { -+ struct gpio_desc *desc; -+ u32 speed; -+ -+ ret = of_property_read_u32(fixed_node, "speed", &speed); -+ -+ pl->link_an_mode = MLO_AN_FIXED; -+ pl->link_config.link = 1; -+ pl->link_config.an_complete = 1; -+ pl->link_config.speed = speed; -+ pl->link_config.duplex = DUPLEX_HALF; -+ pl->link_config.pause = MLO_PAUSE_NONE; -+ -+ if (of_property_read_bool(fixed_node, "full-duplex")) -+ pl->link_config.duplex = DUPLEX_FULL; -+ if (of_property_read_bool(fixed_node, "pause")) -+ pl->link_config.pause |= MLO_PAUSE_SYM; -+ if (of_property_read_bool(fixed_node, "asym-pause")) -+ pl->link_config.pause |= MLO_PAUSE_ASYM; -+ -+ if (ret == 0) { -+ desc = fwnode_get_named_gpiod(&fixed_node->fwnode, -+ "link-gpios"); -+ -+ if (!IS_ERR(desc)) -+ pl->link_gpio = desc; -+ else if (desc == ERR_PTR(-EPROBE_DEFER)) -+ ret = -EPROBE_DEFER; -+ } -+ of_node_put(fixed_node); -+ } else { -+ const __be32 *fixed_prop; -+ -+ fixed_prop = of_get_property(np, "fixed-link", &len); -+ if (fixed_prop && len == 5 * sizeof(*fixed_prop)) { -+ pl->link_config.duplex = be32_to_cpu(fixed_prop[1]) ? -+ DUPLEX_FULL : DUPLEX_HALF; -+ pl->link_config.speed = be32_to_cpu(fixed_prop[2]); -+ pl->link_config.pause = MLO_PAUSE_NONE; -+ if (be32_to_cpu(fixed_prop[3])) -+ pl->link_config.pause |= MLO_PAUSE_SYM; -+ if (be32_to_cpu(fixed_prop[4])) -+ pl->link_config.pause |= MLO_PAUSE_ASYM; -+ -+ pl->link_an_mode = MLO_AN_FIXED; -+ } -+ ret = 0; -+ } -+ -+ if (pl->link_an_mode == MLO_AN_FIXED) { -+ /* Generate the supported/advertising masks */ -+ if (pl->link_config.pause & MLO_PAUSE_SYM) { -+ pl->link_config.supported |= SUPPORTED_Pause; -+ pl->link_config.advertising |= ADVERTISED_Pause; -+ } -+ if (pl->link_config.pause & MLO_PAUSE_ASYM) { -+ pl->link_config.supported |= SUPPORTED_Asym_Pause; -+ pl->link_config.advertising |= ADVERTISED_Asym_Pause; -+ } -+ -+ if (pl->link_config.speed > SPEED_1000 && -+ pl->link_config.duplex != DUPLEX_FULL) -+ netdev_warn(pl->netdev, "fixed link specifies half duplex for %dMbps link?\n", -+ pl->link_config.speed); -+ -+#define S(spd) \ -+ pl->link_config.supported |= pl->link_config.duplex ? \ -+ SUPPORTED_##spd##_Full : SUPPORTED_##spd##_Half -+#define A(spd) \ -+ pl->link_config.advertising |= pl->link_config.duplex ? \ -+ ADVERTISED_##spd##_Full : ADVERTISED_##spd##_Half -+#define C(spd, tech) \ -+ case spd: \ -+ S(spd##tech); \ -+ A(spd##tech); \ -+ break -+ switch (pl->link_config.speed) { -+ C(10, baseT); -+ C(100, baseT); -+ C(1000, baseT); -+#undef S -+#undef A -+#define S(spd) pl->link_config.supported |= SUPPORTED_##spd##_Full -+#define A(spd) pl->link_config.advertising |= ADVERTISED_##spd##_Full -+ C(2500, baseX); -+ C(10000, baseT); -+ } -+#undef S -+#undef A -+#undef C -+ } -+ return ret; -+} -+ -+static int phylink_parse_managed(struct phylink *pl, struct device_node *np) -+{ -+ const char *managed; -+ -+ if (of_property_read_string(np, "managed", &managed) == 0 && -+ strcmp(managed, "in-band-status") == 0) { -+ if (pl->link_an_mode == MLO_AN_FIXED) { -+ netdev_err(pl->netdev, -+ "can't use both fixed-link and in-band-status\n"); -+ return -EINVAL; -+ } -+ pl->link_an_mode = MLO_AN_SGMII; -+ pl->link_config.an_enabled = true; -+ } -+ -+ return 0; -+} -+ -+ -+static int phylink_get_support(struct phylink *pl, unsigned int mode) -+{ -+ struct phylink_link_state state = pl->link_config; -+ int ret; -+ -+ ret = pl->ops->mac_get_support(pl->netdev, mode, &state); -+ if (ret == 0) { -+ pl->link_an_mode = mode; -+ pl->link_config = state; -+ } -+ -+ return ret; -+} -+ -+static void phylink_mac_config(struct phylink *pl, -+ const struct phylink_link_state *state) -+{ -+ pl->ops->mac_config(pl->netdev, pl->link_an_mode, state); -+} -+ -+static void phylink_mac_an_restart(struct phylink *pl) -+{ -+ if (pl->link_config.an_enabled) -+ pl->ops->mac_an_restart(pl->netdev, pl->link_an_mode); -+} -+ -+static int phylink_get_mac_state(struct phylink *pl, struct phylink_link_state *state) -+{ -+ struct net_device *ndev = pl->netdev; -+ -+ state->supported = pl->link_config.supported; -+ state->advertising = pl->link_config.advertising; -+ state->an_enabled = pl->link_config.an_enabled; -+ state->link = 1; -+ state->sync = 1; -+ -+ return pl->ops->mac_link_state(ndev, state); -+} -+ -+/* The fixed state is... fixed except for the link state, -+ * which may be determined by a GPIO. -+ */ -+static void phylink_get_fixed_state(struct phylink *pl, struct phylink_link_state *state) -+{ -+ *state = pl->link_config; -+ if (pl->link_gpio) -+ state->link = !!gpiod_get_value(pl->link_gpio); -+} -+ -+extern const char *phy_speed_to_str(int speed); -+ -+static void phylink_resolve(struct work_struct *w) -+{ -+ struct phylink *pl = container_of(w, struct phylink, resolve); -+ struct phylink_link_state link_state; -+ struct net_device *ndev = pl->netdev; -+ -+ mutex_lock(&pl->state_mutex); -+ if (pl->phylink_disable_state) { -+ link_state.link = false; -+ } else { -+ switch (pl->link_an_mode) { -+ case MLO_AN_PHY: -+ link_state = pl->phy_state; -+ break; -+ -+ case MLO_AN_FIXED: -+ phylink_get_fixed_state(pl, &link_state); -+ break; -+ -+ case MLO_AN_SGMII: -+ phylink_get_mac_state(pl, &link_state); -+ if (pl->phydev) -+ link_state.link = link_state.link && -+ pl->phy_state.link; -+ break; -+ -+ case MLO_AN_8023Z: -+ phylink_get_mac_state(pl, &link_state); -+ break; -+ } -+ } -+ -+ if (link_state.link != netif_carrier_ok(ndev)) { -+ if (!link_state.link) { -+ netif_carrier_off(ndev); -+ pl->ops->mac_link_down(ndev, pl->link_an_mode); -+ netdev_info(ndev, "Link is Down\n"); -+ } else { -+ /* If we have a PHY, we need the MAC updated with -+ * the current link parameters (eg, in SGMII mode, -+ * with flow control status.) -+ */ -+ if (pl->phydev) -+ phylink_mac_config(pl, &link_state); -+ -+ pl->ops->mac_link_up(ndev, pl->link_an_mode); -+ -+ netif_carrier_on(ndev); -+ -+ netdev_info(ndev, -+ "Link is Up - %s/%s - flow control %s\n", -+ phy_speed_to_str(link_state.speed), -+ link_state.duplex ? "Full" : "Half", -+ link_state.pause ? "rx/tx" : "off"); -+ } -+ } -+ mutex_unlock(&pl->state_mutex); -+} -+ -+static void phylink_run_resolve(struct phylink *pl) -+{ -+ if (!pl->phylink_disable_state) -+ queue_work(system_power_efficient_wq, &pl->resolve); -+} -+ -+struct phylink *phylink_create(struct net_device *ndev, struct device_node *np, -+ phy_interface_t iface, const struct phylink_mac_ops *ops) -+{ -+ struct phylink *pl; -+ int ret; -+ -+ pl = kzalloc(sizeof(*pl), GFP_KERNEL); -+ if (!pl) -+ return ERR_PTR(-ENOMEM); -+ -+ mutex_init(&pl->state_mutex); -+ mutex_init(&pl->config_mutex); -+ INIT_WORK(&pl->resolve, phylink_resolve); -+ pl->netdev = ndev; -+ pl->link_interface = iface; -+ pl->link_port_support = SUPPORTED_MII; -+ pl->link_port = PORT_MII; -+ pl->ops = ops; -+ __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -+ -+ ret = phylink_parse_fixedlink(pl, np); -+ if (ret < 0) { -+ kfree(pl); -+ return ERR_PTR(ret); -+ } -+ -+ ret = phylink_parse_managed(pl, np); -+ if (ret < 0) { -+ kfree(pl); -+ return ERR_PTR(ret); -+ } -+ -+ ret = phylink_get_support(pl, pl->link_an_mode); -+ if (ret) { -+ kfree(pl); -+ return ERR_PTR(ret); -+ } -+ -+ return pl; -+} -+EXPORT_SYMBOL_GPL(phylink_create); -+ -+void phylink_destroy(struct phylink *pl) -+{ -+ cancel_work_sync(&pl->resolve); -+ kfree(pl); -+} -+EXPORT_SYMBOL_GPL(phylink_destroy); -+ -+void phylink_phy_change(struct phy_device *phy, bool up, bool do_carrier) -+{ -+ struct phylink *pl = phy->phylink; -+ -+ mutex_lock(&pl->state_mutex); -+ pl->phy_state.speed = phy->speed; -+ pl->phy_state.duplex = phy->duplex; -+ pl->phy_state.pause = MLO_PAUSE_NONE; -+ if (phy->pause) -+ pl->phy_state.pause |= MLO_PAUSE_SYM; -+ if (phy->asym_pause) -+ pl->phy_state.pause |= MLO_PAUSE_ASYM; -+ pl->phy_state.link = up; -+ mutex_unlock(&pl->state_mutex); -+ -+ phylink_run_resolve(pl); -+ -+ netdev_dbg(pl->netdev, "phy link %s\n", up ? "up" : "down"); -+} -+ -+static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy) -+{ -+ mutex_lock(&pl->config_mutex); -+ phy->phylink = pl; -+ phy->phy_link_change = phylink_phy_change; -+ -+ netdev_info(pl->netdev, -+ "PHY [%s] driver [%s]\n", dev_name(&phy->dev), -+ phy->drv->name); -+ -+ mutex_lock(&pl->state_mutex); -+ pl->phydev = phy; -+ -+ /* Restrict the phy advertisment to the union of the PHY and -+ * MAC-level advert. -+ */ -+ phy->advertising &= ADVERTISED_INTERFACES | -+ pl->link_config.advertising; -+ mutex_unlock(&pl->state_mutex); -+ -+ phy_start_machine(phy); -+ if (phy->irq > 0) -+ phy_start_interrupts(phy); -+ -+ mutex_unlock(&pl->config_mutex); -+ -+ return 0; -+} -+ -+int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) -+{ -+ int ret; -+ -+ ret = phy_attach_direct(pl->netdev, phy, 0, pl->link_interface); -+ if (ret) -+ return ret; -+ -+ ret = phylink_bringup_phy(pl, phy); -+ if (ret) -+ phy_detach(phy); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_connect_phy); -+ -+int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn) -+{ -+ struct device_node *phy_node; -+ struct phy_device *phy_dev; -+ int ret; -+ -+ /* Fixed links are handled without needing a PHY */ -+ if (pl->link_an_mode == MLO_AN_FIXED) -+ return 0; -+ -+ phy_node = of_parse_phandle(dn, "phy-handle", 0); -+ if (!phy_node) -+ phy_node = of_parse_phandle(dn, "phy", 0); -+ if (!phy_node) -+ phy_node = of_parse_phandle(dn, "phy-device", 0); -+ -+ if (!phy_node) { -+ if (pl->link_an_mode == MLO_AN_PHY) { -+ netdev_err(pl->netdev, "unable to find PHY node\n"); -+ return -ENODEV; -+ } -+ return 0; -+ } -+ -+ phy_dev = of_phy_attach(pl->netdev, phy_node, 0, pl->link_interface); -+ /* We're done with the phy_node handle */ -+ of_node_put(phy_node); -+ -+ if (!phy_dev) -+ return -ENODEV; -+ -+ ret = phylink_bringup_phy(pl, phy_dev); -+ if (ret) -+ phy_detach(phy_dev); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_of_phy_connect); -+ -+void phylink_disconnect_phy(struct phylink *pl) -+{ -+ struct phy_device *phy; -+ -+ mutex_lock(&pl->config_mutex); -+ phy = pl->phydev; -+ -+ mutex_lock(&pl->state_mutex); -+ pl->phydev = NULL; -+ mutex_unlock(&pl->state_mutex); -+ flush_work(&pl->resolve); -+ -+ if (phy) -+ phy_disconnect(phy); -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_disconnect_phy); -+ -+void phylink_mac_change(struct phylink *pl, bool up) -+{ -+ phylink_run_resolve(pl); -+ netdev_dbg(pl->netdev, "mac link %s\n", up ? "up" : "down"); -+} -+EXPORT_SYMBOL_GPL(phylink_mac_change); -+ -+void phylink_start(struct phylink *pl) -+{ -+ mutex_lock(&pl->config_mutex); -+ -+ netdev_info(pl->netdev, "configuring for %s link mode\n", -+ phylink_an_mode_str(pl->link_an_mode)); -+ -+ /* Apply the link configuration to the MAC when starting. This allows -+ * a fixed-link to start with the correct parameters, and also -+ * ensures that we set the appropriate advertisment for Serdes links. -+ */ -+ phylink_mac_config(pl, &pl->link_config); -+ -+ clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -+ phylink_run_resolve(pl); -+ -+ if (pl->phydev) -+ phy_start(pl->phydev); -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_start); -+ -+void phylink_stop(struct phylink *pl) -+{ -+ mutex_lock(&pl->config_mutex); -+ -+ if (pl->phydev) -+ phy_stop(pl->phydev); -+ -+ set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -+ flush_work(&pl->resolve); -+ -+ pl->mac_link_up = false; -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_stop); -+ -+static void phylink_get_ethtool(const struct phylink_link_state *state, -+ struct ethtool_cmd *cmd) -+{ -+ cmd->supported &= SUPPORTED_INTERFACES; -+ cmd->supported |= state->supported; -+ cmd->advertising &= ADVERTISED_INTERFACES; -+ cmd->advertising |= state->advertising; -+ ethtool_cmd_speed_set(cmd, state->speed); -+ cmd->duplex = state->duplex; -+ -+ cmd->autoneg = state->an_enabled ? AUTONEG_ENABLE : AUTONEG_DISABLE; -+} -+ -+static int phylink_ethtool_gset(struct phylink *pl, struct ethtool_cmd *cmd) -+{ -+ struct phylink_link_state link_state; -+ int ret; -+ -+ if (pl->phydev) { -+ ret = phy_ethtool_gset(pl->phydev, cmd); -+ if (ret) -+ return ret; -+ -+ cmd->supported &= SUPPORTED_INTERFACES | -+ pl->link_config.supported; -+ } else { -+ cmd->supported = pl->link_port_support; -+ cmd->transceiver = XCVR_EXTERNAL; -+ cmd->port = pl->link_port; -+ } -+ -+ switch (pl->link_an_mode) { -+ case MLO_AN_FIXED: -+ /* We are using fixed settings. Report these as the -+ * current link settings - and note that these also -+ * represent the supported speeds/duplex/pause modes. -+ */ -+ phylink_get_fixed_state(pl, &link_state); -+ phylink_get_ethtool(&link_state, cmd); -+ break; -+ -+ case MLO_AN_SGMII: -+ /* If there is a phy attached, then use the reported -+ * settings from the phy with no modification. -+ */ -+ if (pl->phydev) -+ break; -+ -+ case MLO_AN_8023Z: -+ phylink_get_mac_state(pl, &link_state); -+ -+ /* The MAC is reporting the link results from its own PCS -+ * layer via in-band status. Report these as the current -+ * link settings. -+ */ -+ phylink_get_ethtool(&link_state, cmd); -+ break; -+ } -+ -+ return 0; -+} -+ -+int phylink_ethtool_get_settings(struct phylink *pl, struct ethtool_cmd *cmd) -+{ -+ int ret; -+ -+ mutex_lock(&pl->config_mutex); -+ ret = phylink_ethtool_gset(pl, cmd); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_settings); -+ -+static int phylink_ethtool_sset(struct phylink *pl, struct ethtool_cmd *cmd) -+{ -+ u32 supported; -+ int ret; -+ -+ /* Calculate the union of the MAC support and attached phy support */ -+ supported = pl->link_config.supported; -+ if (pl->phydev) -+ supported &= pl->phydev->supported; -+ -+ /* Mask out unsupported advertisments */ -+ cmd->advertising &= supported; -+ -+ /* FIXME: should we reject autoneg if phy/mac does not support it? */ -+ -+ if (cmd->autoneg == AUTONEG_DISABLE) { -+ /* Autonegotiation disabled, validate speed and duplex */ -+ if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) -+ return -EINVAL; -+ -+ /* FIXME: validate speed/duplex against supported */ -+ -+ cmd->advertising &= ~ADVERTISED_Autoneg; -+ } else { -+ /* Autonegotiation enabled, validate advertisment */ -+ /* FIXME: shouldn't we ensure there's some duplex/speeds set */ -+ if (cmd->advertising == 0) -+ return -EINVAL; -+ -+ cmd->advertising |= ADVERTISED_Autoneg; -+ } -+ -+ /* If we have a fixed link (as specified by firmware), refuse -+ * to enable autonegotiation, or change link parameters. -+ */ -+ if (pl->link_an_mode == MLO_AN_FIXED) { -+ if (cmd->autoneg != AUTONEG_DISABLE || -+ ethtool_cmd_speed(cmd) != pl->link_config.speed || -+ cmd->duplex != pl->link_config.duplex) -+ return -EINVAL; -+ } -+ -+ /* If we have a PHY, configure the phy */ -+ if (pl->phydev) { -+ ret = phy_ethtool_sset(pl->phydev, cmd); -+ if (ret) -+ return ret; -+ } -+ -+ mutex_lock(&pl->state_mutex); -+ /* Configure the MAC to match the new settings */ -+ pl->link_config.advertising = cmd->advertising; -+ pl->link_config.speed = cmd->speed; -+ pl->link_config.duplex = cmd->duplex; -+ pl->link_config.an_enabled = cmd->autoneg != AUTONEG_DISABLE; -+ -+ phylink_mac_config(pl, &pl->link_config); -+ phylink_mac_an_restart(pl); -+ mutex_unlock(&pl->state_mutex); -+ -+ return ret; -+} -+ -+int phylink_ethtool_set_settings(struct phylink *pl, struct ethtool_cmd *cmd) -+{ -+ int ret; -+ -+ if (cmd->autoneg != AUTONEG_DISABLE && cmd->autoneg != AUTONEG_ENABLE) -+ return -EINVAL; -+ -+ mutex_lock(&pl->config_mutex); -+ ret = phylink_ethtool_sset(pl, cmd); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_set_settings); -+ -+/* This emulates MII registers for a fixed-mode phy operating as per the -+ * passed in state. "aneg" defines if we report negotiation is possible. -+ * -+ * FIXME: should deal with negotiation state too. -+ */ -+static int phylink_mii_emul_read(struct net_device *ndev, unsigned int reg, -+ struct phylink_link_state *state, bool aneg) -+{ -+ struct fixed_phy_status fs; -+ int val; -+ -+ fs.link = state->link; -+ fs.speed = state->speed; -+ fs.duplex = state->duplex; -+ fs.pause = state->pause & MLO_PAUSE_SYM; -+ fs.asym_pause = state->pause & MLO_PAUSE_ASYM; -+ -+ val = swphy_read_reg(reg, &fs); -+ if (reg == MII_BMSR) { -+ if (!state->an_complete) -+ val &= ~BMSR_ANEGCOMPLETE; -+ if (!aneg) -+ val &= ~BMSR_ANEGCAPABLE; -+ } -+ return val; -+} -+ -+static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, -+ unsigned int reg) -+{ -+ struct phylink_link_state state; -+ int val = 0xffff; -+ -+ if (pl->phydev && pl->phydev->addr != phy_id) -+ return mdiobus_read(pl->phydev->bus, phy_id, reg); -+ -+ if (!pl->phydev && phy_id != 0) -+ return val; -+ -+ switch (pl->link_an_mode) { -+ case MLO_AN_FIXED: -+ phylink_get_fixed_state(pl, &state); -+ val = phylink_mii_emul_read(pl->netdev, reg, &state, true); -+ break; -+ -+ case MLO_AN_PHY: -+ val = mdiobus_read(pl->phydev->bus, phy_id, reg); -+ break; -+ -+ case MLO_AN_SGMII: -+ if (pl->phydev) { -+ val = mdiobus_read(pl->phydev->bus, -+ pl->phydev->addr, reg); -+ break; -+ } -+ /* No phy, fall through to reading the MAC end */ -+ case MLO_AN_8023Z: -+ val = phylink_get_mac_state(pl, &state); -+ if (val < 0) -+ return val; -+ -+ val = phylink_mii_emul_read(pl->netdev, reg, &state, true); -+ break; -+ } -+ -+ return val & 0xffff; -+} -+ -+static void phylink_mii_write(struct phylink *pl, unsigned int phy_id, -+ unsigned int reg, unsigned int val) -+{ -+ if (pl->phydev && pl->phydev->addr != phy_id) { -+ mdiobus_write(pl->phydev->bus, phy_id, reg, val); -+ return; -+ } -+ -+ if (!pl->phydev && phy_id != 0) -+ return; -+ -+ switch (pl->link_an_mode) { -+ case MLO_AN_FIXED: -+ break; -+ -+ case MLO_AN_PHY: -+ mdiobus_write(pl->phydev->bus, pl->phydev->addr, -+ reg, val); -+ break; -+ -+ case MLO_AN_SGMII: -+ if (pl->phydev) { -+ mdiobus_write(pl->phydev->bus, phy_id, reg, val); -+ break; -+ } -+ /* No phy, fall through to reading the MAC end */ -+ case MLO_AN_8023Z: -+ break; -+ } -+} -+ -+int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) -+{ -+ struct mii_ioctl_data *mii_data = if_mii(ifr); -+ int val, ret; -+ -+ mutex_lock(&pl->config_mutex); -+ -+ switch (cmd) { -+ case SIOCGMIIPHY: -+ mii_data->phy_id = pl->phydev ? pl->phydev->addr : 0; -+ /* fallthrough */ -+ -+ case SIOCGMIIREG: -+ val = phylink_mii_read(pl, mii_data->phy_id, mii_data->reg_num); -+ if (val < 0) { -+ ret = val; -+ } else { -+ mii_data->val_out = val; -+ ret = 0; -+ } -+ break; -+ -+ case SIOCSMIIREG: -+ phylink_mii_write(pl, mii_data->phy_id, mii_data->reg_num, -+ mii_data->val_in); -+ ret = 0; -+ break; -+ -+ default: -+ ret = -EOPNOTSUPP; -+ if (pl->phydev) -+ ret = phy_mii_ioctl(pl->phydev, ifr, cmd); -+ break; -+ } -+ -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_mii_ioctl); -+ -+MODULE_LICENSE("GPL"); ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -143,6 +143,7 @@ static inline const char *phy_modes(phy_ - #define MII_ADDR_C45 (1<<30) - - struct device; -+struct phylink; - struct sk_buff; - - /* -@@ -425,6 +426,7 @@ struct phy_device { - - struct mutex lock; - -+ struct phylink *phylink; - struct net_device *attached_dev; - - u8 mdix; ---- /dev/null -+++ b/include/linux/phylink.h -@@ -0,0 +1,70 @@ -+#ifndef NETDEV_PCS_H -+#define NETDEV_PCS_H -+ -+#include -+#include -+#include -+ -+struct device_node; -+struct ethtool_cmd; -+struct net_device; -+ -+enum { -+ MLO_PAUSE_NONE, -+ MLO_PAUSE_ASYM = BIT(0), -+ MLO_PAUSE_SYM = BIT(1), -+ -+ MLO_AN_PHY = 0, -+ MLO_AN_FIXED, -+ MLO_AN_SGMII, -+ MLO_AN_8023Z, -+}; -+ -+struct phylink_link_state { -+ u32 supported; -+ u32 advertising; -+ u32 lp_advertising; -+ int speed; -+ int duplex; -+ int pause; -+ unsigned int link:1; -+ unsigned int sync:1; -+ unsigned int an_enabled:1; -+ unsigned int an_complete:1; -+}; -+ -+struct phylink_mac_ops { -+ /* Get the ethtool supported mask for the indicated mode */ -+ int (*mac_get_support)(struct net_device *, unsigned int mode, -+ struct phylink_link_state *); -+ -+ /* Read the current link state from the hardware */ -+ int (*mac_link_state)(struct net_device *, struct phylink_link_state *); -+ -+ /* Configure the MAC */ -+ void (*mac_config)(struct net_device *, unsigned int mode, -+ const struct phylink_link_state *); -+ void (*mac_an_restart)(struct net_device *, unsigned int mode); -+ -+ void (*mac_link_down)(struct net_device *, unsigned int mode); -+ void (*mac_link_up)(struct net_device *, unsigned int mode); -+}; -+ -+struct phylink *phylink_create(struct net_device *, struct device_node *, -+ phy_interface_t iface, const struct phylink_mac_ops *ops); -+void phylink_destroy(struct phylink *); -+ -+int phylink_connect_phy(struct phylink *, struct phy_device *); -+int phylink_of_phy_connect(struct phylink *, struct device_node *); -+void phylink_disconnect_phy(struct phylink *); -+ -+void phylink_mac_change(struct phylink *, bool up); -+ -+void phylink_start(struct phylink *); -+void phylink_stop(struct phylink *); -+ -+int phylink_ethtool_get_settings(struct phylink *, struct ethtool_cmd *); -+int phylink_ethtool_set_settings(struct phylink *, struct ethtool_cmd *); -+int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); -+ -+#endif diff --git a/target/linux/mvebu/patches-4.4/131-phylink-add-hooks-for-SFP-support.patch b/target/linux/mvebu/patches-4.4/131-phylink-add-hooks-for-SFP-support.patch deleted file mode 100644 index 64a1c1ff1..000000000 --- a/target/linux/mvebu/patches-4.4/131-phylink-add-hooks-for-SFP-support.patch +++ /dev/null @@ -1,156 +0,0 @@ -From 0a0c4b3dd4f34df4532f254a5940b520015d766f Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 24 Sep 2015 11:01:13 +0100 -Subject: [PATCH 719/744] phylink: add hooks for SFP support - -Add support to phylink for SFP, which needs to control and configure -the ethernet MAC link state. Specifically, SFP needs to: - -1. set the negotiation mode between SGMII and 1000base-X -2. attach and detach the module PHY -3. prevent the link coming up when errors are reported - -In the absence of a PHY, we also need to set the ethtool port type -according to the module plugged in. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 82 +++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/phylink.h | 6 ++++ - 2 files changed, 88 insertions(+) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -29,11 +30,16 @@ - (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ - ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) - -+static LIST_HEAD(phylinks); -+static DEFINE_MUTEX(phylink_mutex); -+ - enum { - PHYLINK_DISABLE_STOPPED, -+ PHYLINK_DISABLE_LINK, - }; - - struct phylink { -+ struct list_head node; - struct net_device *netdev; - const struct phylink_mac_ops *ops; - struct mutex config_mutex; -@@ -341,12 +347,20 @@ struct phylink *phylink_create(struct ne - return ERR_PTR(ret); - } - -+ mutex_lock(&phylink_mutex); -+ list_add_tail(&pl->node, &phylinks); -+ mutex_unlock(&phylink_mutex); -+ - return pl; - } - EXPORT_SYMBOL_GPL(phylink_create); - - void phylink_destroy(struct phylink *pl) - { -+ mutex_lock(&phylink_mutex); -+ list_del(&pl->node); -+ mutex_unlock(&phylink_mutex); -+ - cancel_work_sync(&pl->resolve); - kfree(pl); - } -@@ -813,4 +827,72 @@ int phylink_mii_ioctl(struct phylink *pl - } - EXPORT_SYMBOL_GPL(phylink_mii_ioctl); - -+ -+ -+void phylink_disable(struct phylink *pl) -+{ -+ set_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); -+ flush_work(&pl->resolve); -+ -+ netif_carrier_off(pl->netdev); -+} -+EXPORT_SYMBOL_GPL(phylink_disable); -+ -+void phylink_enable(struct phylink *pl) -+{ -+ clear_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); -+ phylink_run_resolve(pl); -+} -+EXPORT_SYMBOL_GPL(phylink_enable); -+ -+void phylink_set_link_port(struct phylink *pl, u32 support, u8 port) -+{ -+ WARN_ON(support & ~SUPPORTED_INTERFACES); -+ -+ mutex_lock(&pl->config_mutex); -+ pl->link_port_support = support; -+ pl->link_port = port; -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_set_link_port); -+ -+int phylink_set_link_an_mode(struct phylink *pl, unsigned int mode) -+{ -+ int ret = 0; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->link_an_mode != mode) { -+ ret = phylink_get_support(pl, mode); -+ if (ret == 0) { -+ if (!test_bit(PHYLINK_DISABLE_STOPPED, -+ &pl->phylink_disable_state)) -+ phylink_mac_config(pl, &pl->link_config); -+ -+ netdev_info(pl->netdev, "switched to %s link mode\n", -+ phylink_an_mode_str(mode)); -+ } -+ } -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_set_link_an_mode); -+ -+struct phylink *phylink_lookup_by_netdev(struct net_device *ndev) -+{ -+ struct phylink *pl, *found = NULL; -+ -+ mutex_lock(&phylink_mutex); -+ list_for_each_entry(pl, &phylinks, node) -+ if (pl->netdev == ndev) { -+ found = pl; -+ break; -+ } -+ -+ mutex_unlock(&phylink_mutex); -+ -+ return found; -+} -+EXPORT_SYMBOL_GPL(phylink_lookup_by_netdev); -+ - MODULE_LICENSE("GPL"); ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -67,4 +67,10 @@ int phylink_ethtool_get_settings(struct - int phylink_ethtool_set_settings(struct phylink *, struct ethtool_cmd *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - -+void phylink_set_link_port(struct phylink *pl, u32 support, u8 port); -+int phylink_set_link_an_mode(struct phylink *pl, unsigned int mode); -+void phylink_disable(struct phylink *pl); -+void phylink_enable(struct phylink *pl); -+struct phylink *phylink_lookup_by_netdev(struct net_device *ndev); -+ - #endif diff --git a/target/linux/mvebu/patches-4.4/132-sfp-add-phylink-based-SFP-module-support.patch b/target/linux/mvebu/patches-4.4/132-sfp-add-phylink-based-SFP-module-support.patch deleted file mode 100644 index dbfcaccac..000000000 --- a/target/linux/mvebu/patches-4.4/132-sfp-add-phylink-based-SFP-module-support.patch +++ /dev/null @@ -1,1382 +0,0 @@ -From bf0a000960234c0e773fadea47240c3cda0cab02 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 12 Sep 2015 18:43:39 +0100 -Subject: [PATCH 720/744] sfp: add phylink based SFP module support - -Add support for SFP hotpluggable modules via phylink. This supports -both copper and optical SFP modules, which require different Serdes -modes in order to properly negotiate the link. - -Optical SFP modules typically require the Serdes link to be talking -1000base-X mode - this is the gigabit ethernet mode defined by the -802.3 standard. - -Copper SFP modules typically integrate a PHY in the module to convert -from Serdes to copper, and the PHY will be configured by the vendor -to either present a 1000base-X Serdes link (for fixed 1000base-T) or -a SGMII Serdes link. However, this is vendor defined, so we instead -detect the PHY, switch the link to SGMII mode, and use traditional -PHY based negotiation. - -Signed-off-by: Russell King ---- - drivers/net/phy/Kconfig | 5 + - drivers/net/phy/Makefile | 1 + - drivers/net/phy/sfp.c | 986 +++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/sfp.h | 339 ++++++++++++++++ - 4 files changed, 1331 insertions(+) - create mode 100644 drivers/net/phy/sfp.c - create mode 100644 include/linux/sfp.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -230,6 +230,11 @@ config FIXED_PHY - - Currently tested with mpc866ads and mpc8349e-mitx. - -+config SFP -+ tristate "SFP cage support" -+ depends on I2C && PHYLINK -+ select MDIO_I2C -+ - config MDIO_BITBANG - tristate "Support for bitbanged MDIO buses" - help ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -62,3 +62,4 @@ obj-$(CONFIG_MDIO_MOXART) += mdio-moxart - obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o - obj-$(CONFIG_MICROCHIP_PHY) += microchip.o - obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o -+obj-$(CONFIG_SFP) += sfp.o ---- /dev/null -+++ b/drivers/net/phy/sfp.c -@@ -0,0 +1,986 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mdio-i2c.h" -+#include "swphy.h" -+ -+enum { -+ GPIO_MODDEF0, -+ GPIO_LOS, -+ GPIO_TX_FAULT, -+ GPIO_TX_DISABLE, -+ GPIO_RATE_SELECT, -+ GPIO_MAX, -+ -+ SFP_F_PRESENT = BIT(GPIO_MODDEF0), -+ SFP_F_LOS = BIT(GPIO_LOS), -+ SFP_F_TX_FAULT = BIT(GPIO_TX_FAULT), -+ SFP_F_TX_DISABLE = BIT(GPIO_TX_DISABLE), -+ SFP_F_RATE_SELECT = BIT(GPIO_RATE_SELECT), -+ -+ SFP_E_INSERT = 0, -+ SFP_E_REMOVE, -+ SFP_E_DEV_DOWN, -+ SFP_E_DEV_UP, -+ SFP_E_TX_FAULT, -+ SFP_E_TX_CLEAR, -+ SFP_E_LOS_HIGH, -+ SFP_E_LOS_LOW, -+ SFP_E_TIMEOUT, -+ -+ SFP_MOD_EMPTY = 0, -+ SFP_MOD_PROBE, -+ SFP_MOD_PRESENT, -+ SFP_MOD_ERROR, -+ -+ SFP_DEV_DOWN = 0, -+ SFP_DEV_UP, -+ -+ SFP_S_DOWN = 0, -+ SFP_S_INIT, -+ SFP_S_WAIT_LOS, -+ SFP_S_LINK_UP, -+ SFP_S_TX_FAULT, -+ SFP_S_REINIT, -+ SFP_S_TX_DISABLE, -+}; -+ -+static const char *gpio_of_names[] = { -+ "moddef0", -+ "los", -+ "tx-fault", -+ "tx-disable", -+ "rate-select", -+}; -+ -+static const enum gpiod_flags gpio_flags[] = { -+ GPIOD_IN, -+ GPIOD_IN, -+ GPIOD_IN, -+ GPIOD_ASIS, -+ GPIOD_ASIS, -+}; -+ -+#define T_INIT_JIFFIES msecs_to_jiffies(300) -+#define T_RESET_US 10 -+#define T_FAULT_RECOVER msecs_to_jiffies(1000) -+ -+/* SFP module presence detection is poor: the three MOD DEF signals are -+ * the same length on the PCB, which means it's possible for MOD DEF 0 to -+ * connect before the I2C bus on MOD DEF 1/2. Try to work around this -+ * design bug by waiting 50ms before probing, and then retry every 250ms. -+ */ -+#define T_PROBE_INIT msecs_to_jiffies(50) -+#define T_PROBE_RETRY msecs_to_jiffies(250) -+ -+/* -+ * SFP modules appear to always have their PHY configured for bus address -+ * 0x56 (which with mdio-i2c, translates to a PHY address of 22). -+ */ -+#define SFP_PHY_ADDR 22 -+ -+/* -+ * Give this long for the PHY to reset. -+ */ -+#define T_PHY_RESET_MS 50 -+ -+static DEFINE_MUTEX(sfp_mutex); -+ -+struct sfp { -+ struct device *dev; -+ struct i2c_adapter *i2c; -+ struct mii_bus *i2c_mii; -+ struct net_device *ndev; -+ struct phylink *phylink; -+ struct phy_device *mod_phy; -+ -+ unsigned int (*get_state)(struct sfp *); -+ void (*set_state)(struct sfp *, unsigned int); -+ int (*read)(struct sfp *, bool, u8, void *, size_t); -+ -+ struct gpio_desc *gpio[GPIO_MAX]; -+ -+ unsigned int state; -+ struct delayed_work poll; -+ struct delayed_work timeout; -+ struct mutex sm_mutex; -+ unsigned char sm_mod_state; -+ unsigned char sm_dev_state; -+ unsigned short sm_state; -+ unsigned int sm_retries; -+ -+ struct sfp_eeprom_id id; -+ -+ struct notifier_block netdev_nb; -+}; -+ -+static unsigned long poll_jiffies; -+ -+static unsigned int sfp_gpio_get_state(struct sfp *sfp) -+{ -+ unsigned int i, state, v; -+ -+ for (i = state = 0; i < GPIO_MAX; i++) { -+ if (gpio_flags[i] != GPIOD_IN || !sfp->gpio[i]) -+ continue; -+ -+ v = gpiod_get_value_cansleep(sfp->gpio[i]); -+ if (v) -+ state |= BIT(i); -+ } -+ -+ return state; -+} -+ -+static void sfp_gpio_set_state(struct sfp *sfp, unsigned int state) -+{ -+ if (state & SFP_F_PRESENT) { -+ /* If the module is present, drive the signals */ -+ if (sfp->gpio[GPIO_TX_DISABLE]) -+ gpiod_direction_output(sfp->gpio[GPIO_TX_DISABLE], -+ state & SFP_F_TX_DISABLE); -+ if (state & SFP_F_RATE_SELECT) -+ gpiod_direction_output(sfp->gpio[GPIO_RATE_SELECT], -+ state & SFP_F_RATE_SELECT); -+ } else { -+ /* Otherwise, let them float to the pull-ups */ -+ if (sfp->gpio[GPIO_TX_DISABLE]) -+ gpiod_direction_input(sfp->gpio[GPIO_TX_DISABLE]); -+ if (state & SFP_F_RATE_SELECT) -+ gpiod_direction_input(sfp->gpio[GPIO_RATE_SELECT]); -+ } -+} -+ -+static int sfp__i2c_read(struct i2c_adapter *i2c, u8 bus_addr, u8 dev_addr, -+ void *buf, size_t len) -+{ -+ struct i2c_msg msgs[2]; -+ int ret; -+ -+ msgs[0].addr = bus_addr; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = &dev_addr; -+ msgs[1].addr = bus_addr; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = len; -+ msgs[1].buf = buf; -+ -+ ret = i2c_transfer(i2c, msgs, ARRAY_SIZE(msgs)); -+ if (ret < 0) -+ return ret; -+ -+ return ret == ARRAY_SIZE(msgs) ? len : 0; -+} -+ -+static int sfp_i2c_read(struct sfp *sfp, bool a2, u8 addr, void *buf, -+ size_t len) -+{ -+ return sfp__i2c_read(sfp->i2c, a2 ? 0x51 : 0x50, addr, buf, len); -+} -+ -+static int sfp_i2c_configure(struct sfp *sfp, struct i2c_adapter *i2c) -+{ -+ struct mii_bus *i2c_mii; -+ int ret; -+ -+ if (!i2c_check_functionality(i2c, I2C_FUNC_I2C)) -+ return -EINVAL; -+ -+ sfp->i2c = i2c; -+ sfp->read = sfp_i2c_read; -+ -+ i2c_mii = mdio_i2c_alloc(sfp->dev, i2c); -+ if (IS_ERR(i2c_mii)) -+ return PTR_ERR(i2c_mii); -+ -+ i2c_mii->name = "SFP I2C Bus"; -+ i2c_mii->phy_mask = ~0; -+ -+ ret = mdiobus_register(i2c_mii); -+ if (ret < 0) { -+ mdiobus_free(i2c_mii); -+ return ret; -+ } -+ -+ sfp->i2c_mii = i2c_mii; -+ -+ return 0; -+} -+ -+ -+/* Interface */ -+static unsigned int sfp_get_state(struct sfp *sfp) -+{ -+ return sfp->get_state(sfp); -+} -+ -+static void sfp_set_state(struct sfp *sfp, unsigned int state) -+{ -+ sfp->set_state(sfp, state); -+} -+ -+static int sfp_read(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len) -+{ -+ return sfp->read(sfp, a2, addr, buf, len); -+} -+ -+static unsigned int sfp_check(void *buf, size_t len) -+{ -+ u8 *p, check; -+ -+ for (p = buf, check = 0; len; p++, len--) -+ check += *p; -+ -+ return check; -+} -+ -+/* Helpers */ -+static void sfp_module_tx_disable(struct sfp *sfp) -+{ -+ dev_dbg(sfp->dev, "tx disable %u -> %u\n", -+ sfp->state & SFP_F_TX_DISABLE ? 1 : 0, 1); -+ sfp->state |= SFP_F_TX_DISABLE; -+ sfp_set_state(sfp, sfp->state); -+} -+ -+static void sfp_module_tx_enable(struct sfp *sfp) -+{ -+ dev_dbg(sfp->dev, "tx disable %u -> %u\n", -+ sfp->state & SFP_F_TX_DISABLE ? 1 : 0, 0); -+ sfp->state &= ~SFP_F_TX_DISABLE; -+ sfp_set_state(sfp, sfp->state); -+} -+ -+static void sfp_module_tx_fault_reset(struct sfp *sfp) -+{ -+ unsigned int state = sfp->state; -+ -+ if (state & SFP_F_TX_DISABLE) -+ return; -+ -+ sfp_set_state(sfp, state | SFP_F_TX_DISABLE); -+ -+ udelay(T_RESET_US); -+ -+ sfp_set_state(sfp, state); -+} -+ -+/* SFP state machine */ -+static void sfp_sm_set_timer(struct sfp *sfp, unsigned int timeout) -+{ -+ if (timeout) -+ mod_delayed_work(system_power_efficient_wq, &sfp->timeout, -+ timeout); -+ else -+ cancel_delayed_work(&sfp->timeout); -+} -+ -+static void sfp_sm_next(struct sfp *sfp, unsigned int state, -+ unsigned int timeout) -+{ -+ sfp->sm_state = state; -+ sfp_sm_set_timer(sfp, timeout); -+} -+ -+static void sfp_sm_ins_next(struct sfp *sfp, unsigned int state, unsigned int timeout) -+{ -+ sfp->sm_mod_state = state; -+ sfp_sm_set_timer(sfp, timeout); -+} -+ -+static void sfp_sm_phy_detach(struct sfp *sfp) -+{ -+ phy_stop(sfp->mod_phy); -+ if (sfp->phylink) -+ phylink_disconnect_phy(sfp->phylink); -+ phy_device_remove(sfp->mod_phy); -+ phy_device_free(sfp->mod_phy); -+ sfp->mod_phy = NULL; -+} -+ -+static void sfp_sm_probe_phy(struct sfp *sfp) -+{ -+ struct phy_device *phy; -+ int err; -+ -+ msleep(T_PHY_RESET_MS); -+ -+ phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR); -+ if (IS_ERR(phy)) { -+ dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy)); -+ return; -+ } -+ if (!phy) { -+ dev_info(sfp->dev, "no PHY detected\n"); -+ return; -+ } -+ -+ err = phylink_connect_phy(sfp->phylink, phy); -+ if (err) { -+ phy_device_remove(phy); -+ phy_device_free(phy); -+ dev_err(sfp->dev, "phylink_connect_phy failed: %d\n", err); -+ return; -+ } -+ -+ sfp->mod_phy = phy; -+ phy_start(phy); -+} -+ -+static void sfp_sm_link_up(struct sfp *sfp) -+{ -+ if (sfp->phylink) -+ phylink_enable(sfp->phylink); -+ -+ sfp_sm_next(sfp, SFP_S_LINK_UP, 0); -+} -+ -+static void sfp_sm_link_down(struct sfp *sfp) -+{ -+ if (sfp->phylink) -+ phylink_disable(sfp->phylink); -+} -+ -+static void sfp_sm_link_check_los(struct sfp *sfp) -+{ -+ unsigned int los = sfp->state & SFP_F_LOS; -+ -+ /* FIXME: what if neither SFP_OPTIONS_LOS_INVERTED nor -+ * SFP_OPTIONS_LOS_NORMAL are set? For now, we assume -+ * the same as SFP_OPTIONS_LOS_NORMAL set. -+ */ -+ if (sfp->id.ext.options & SFP_OPTIONS_LOS_INVERTED) -+ los ^= SFP_F_LOS; -+ -+ if (los) -+ sfp_sm_next(sfp, SFP_S_WAIT_LOS, 0); -+ else -+ sfp_sm_link_up(sfp); -+} -+ -+static void sfp_sm_fault(struct sfp *sfp, bool warn) -+{ -+ if (sfp->sm_retries && !--sfp->sm_retries) { -+ dev_err(sfp->dev, "module persistently indicates fault, disabling\n"); -+ sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0); -+ } else { -+ if (warn) -+ dev_err(sfp->dev, "module transmit fault indicated\n"); -+ -+ sfp_sm_next(sfp, SFP_S_TX_FAULT, T_FAULT_RECOVER); -+ } -+} -+ -+static void sfp_sm_mod_init(struct sfp *sfp) -+{ -+ sfp_module_tx_enable(sfp); -+ -+ /* Wait t_init before indicating that the link is up, provided the -+ * current state indicates no TX_FAULT. If TX_FAULT clears before -+ * this time, that's fine too. -+ */ -+ sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -+ sfp->sm_retries = 5; -+ -+ if (sfp->phylink) { -+ /* Setting the serdes link mode is guesswork: there's no -+ * field in the EEPROM which indicates what mode should -+ * be used. -+ * -+ * If it's a gigabit-only fiber module, it probably does -+ * not have a PHY, so switch to 802.3z negotiation mode. -+ * Otherwise, switch to SGMII mode (which is required to -+ * support non-gigabit speeds) and probe for a PHY. -+ */ -+ if (!sfp->id.base.e1000_base_t && -+ !sfp->id.base.e100_base_lx && -+ !sfp->id.base.e100_base_fx) { -+ phylink_set_link_an_mode(sfp->phylink, MLO_AN_8023Z); -+ } else { -+ phylink_set_link_an_mode(sfp->phylink, MLO_AN_SGMII); -+ sfp_sm_probe_phy(sfp); -+ } -+ } -+} -+ -+static int sfp_sm_mod_probe(struct sfp *sfp) -+{ -+ /* SFP module inserted - read I2C data */ -+ struct sfp_eeprom_id id; -+ char vendor[17]; -+ char part[17]; -+ char sn[17]; -+ char date[9]; -+ char rev[5]; -+ u8 check; -+ int err; -+ -+ err = sfp_read(sfp, false, 0, &id, sizeof(id)); -+ if (err < 0) { -+ dev_err(sfp->dev, "failed to read EEPROM: %d\n", err); -+ return -EAGAIN; -+ } -+ -+ /* Validate the checksum over the base structure */ -+ check = sfp_check(&id.base, sizeof(id.base) - 1); -+ if (check != id.base.cc_base) { -+ dev_err(sfp->dev, -+ "EEPROM base structure checksum failure: 0x%02x\n", -+ check); -+ return -EINVAL; -+ } -+ -+ check = sfp_check(&id.ext, sizeof(id.ext) - 1); -+ if (check != id.ext.cc_ext) { -+ dev_err(sfp->dev, -+ "EEPROM extended structure checksum failure: 0x%02x\n", -+ check); -+ memset(&id.ext, 0, sizeof(id.ext)); -+ } -+ -+ sfp->id = id; -+ -+ memcpy(vendor, sfp->id.base.vendor_name, 16); -+ vendor[16] = '\0'; -+ memcpy(part, sfp->id.base.vendor_pn, 16); -+ part[16] = '\0'; -+ memcpy(rev, sfp->id.base.vendor_rev, 4); -+ rev[4] = '\0'; -+ memcpy(sn, sfp->id.ext.vendor_sn, 16); -+ sn[16] = '\0'; -+ memcpy(date, sfp->id.ext.datecode, 8); -+ date[8] = '\0'; -+ -+ dev_info(sfp->dev, "module %s %s rev %s sn %s dc %s\n", vendor, part, rev, sn, date); -+ -+ /* We only support SFP modules, not the legacy GBIC modules. */ -+ if (sfp->id.base.phys_id != SFP_PHYS_ID_SFP || -+ sfp->id.base.phys_ext_id != SFP_PHYS_EXT_ID_SFP) { -+ dev_err(sfp->dev, "module is not SFP - phys id 0x%02x 0x%02x\n", -+ sfp->id.base.phys_id, sfp->id.base.phys_ext_id); -+ return -EINVAL; -+ } -+ -+ /* -+ * What isn't clear from the SFP documentation is whether this -+ * specifies the encoding expected on the TD/RD lines, or whether -+ * the TD/RD lines are always 8b10b encoded, but the transceiver -+ * converts. Eg, think of a copper SFP supporting 1G/100M/10M -+ * ethernet: this requires 8b10b encoding for 1G, 4b5b for 100M, -+ * and manchester for 10M. -+ */ -+ /* 1Gbit ethernet requires 8b10b encoding */ -+ if (sfp->id.base.encoding != SFP_ENCODING_8B10B) { -+ dev_err(sfp->dev, "module does not support 8B10B encoding\n"); -+ return -EINVAL; -+ } -+ -+ if (sfp->phylink) { -+ u32 support; -+ u8 port; -+ -+ if (sfp->id.base.e1000_base_t) { -+ support = SUPPORTED_TP; -+ port = PORT_TP; -+ } else { -+ support = SUPPORTED_FIBRE; -+ port = PORT_FIBRE; -+ } -+ phylink_set_link_port(sfp->phylink, support, port); -+ } -+ -+ return 0; -+} -+ -+static void sfp_sm_mod_remove(struct sfp *sfp) -+{ -+ if (sfp->mod_phy) -+ sfp_sm_phy_detach(sfp); -+ -+ sfp_module_tx_disable(sfp); -+ -+ memset(&sfp->id, 0, sizeof(sfp->id)); -+ -+ dev_info(sfp->dev, "module removed\n"); -+} -+ -+static void sfp_sm_event(struct sfp *sfp, unsigned int event) -+{ -+ mutex_lock(&sfp->sm_mutex); -+ -+ dev_dbg(sfp->dev, "SM: enter %u:%u:%u event %u\n", -+ sfp->sm_mod_state, sfp->sm_dev_state, sfp->sm_state, event); -+ -+ /* This state machine tracks the insert/remove state of -+ * the module, and handles probing the on-board EEPROM. -+ */ -+ switch (sfp->sm_mod_state) { -+ default: -+ if (event == SFP_E_INSERT) { -+ sfp_module_tx_disable(sfp); -+ sfp_sm_ins_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT); -+ } -+ break; -+ -+ case SFP_MOD_PROBE: -+ if (event == SFP_E_REMOVE) { -+ sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0); -+ } else if (event == SFP_E_TIMEOUT) { -+ int err = sfp_sm_mod_probe(sfp); -+ -+ if (err == 0) -+ sfp_sm_ins_next(sfp, SFP_MOD_PRESENT, 0); -+ else if (err == -EAGAIN) -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ else -+ sfp_sm_ins_next(sfp, SFP_MOD_ERROR, 0); -+ } -+ break; -+ -+ case SFP_MOD_PRESENT: -+ case SFP_MOD_ERROR: -+ if (event == SFP_E_REMOVE) { -+ sfp_sm_mod_remove(sfp); -+ sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0); -+ } -+ break; -+ } -+ -+ /* This state machine tracks the netdev up/down state */ -+ switch (sfp->sm_dev_state) { -+ default: -+ if (event == SFP_E_DEV_UP) -+ sfp->sm_dev_state = SFP_DEV_UP; -+ break; -+ -+ case SFP_DEV_UP: -+ if (event == SFP_E_DEV_DOWN) { -+ /* If the module has a PHY, avoid raising TX disable -+ * as this resets the PHY. Otherwise, raise it to -+ * turn the laser off. -+ */ -+ if (!sfp->mod_phy) -+ sfp_module_tx_disable(sfp); -+ sfp->sm_dev_state = SFP_DEV_DOWN; -+ } -+ break; -+ } -+ -+ /* Some events are global */ -+ if (sfp->sm_state != SFP_S_DOWN && -+ (sfp->sm_mod_state != SFP_MOD_PRESENT || -+ sfp->sm_dev_state != SFP_DEV_UP)) { -+ if (sfp->sm_state == SFP_S_LINK_UP && -+ sfp->sm_dev_state == SFP_DEV_UP) -+ sfp_sm_link_down(sfp); -+ if (sfp->mod_phy) -+ sfp_sm_phy_detach(sfp); -+ sfp_sm_next(sfp, SFP_S_DOWN, 0); -+ mutex_unlock(&sfp->sm_mutex); -+ return; -+ } -+ -+ /* The main state machine */ -+ switch (sfp->sm_state) { -+ case SFP_S_DOWN: -+ if (sfp->sm_mod_state == SFP_MOD_PRESENT && -+ sfp->sm_dev_state == SFP_DEV_UP) -+ sfp_sm_mod_init(sfp); -+ break; -+ -+ case SFP_S_INIT: -+ if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) -+ sfp_sm_fault(sfp, true); -+ else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) -+ sfp_sm_link_check_los(sfp); -+ break; -+ -+ case SFP_S_WAIT_LOS: -+ if (event == SFP_E_TX_FAULT) -+ sfp_sm_fault(sfp, true); -+ else if (event == -+ (sfp->id.ext.options & SFP_OPTIONS_LOS_INVERTED ? -+ SFP_E_LOS_HIGH : SFP_E_LOS_LOW)) -+ sfp_sm_link_up(sfp); -+ break; -+ -+ case SFP_S_LINK_UP: -+ if (event == SFP_E_TX_FAULT) { -+ sfp_sm_link_down(sfp); -+ sfp_sm_fault(sfp, true); -+ } else if (event == -+ (sfp->id.ext.options & SFP_OPTIONS_LOS_INVERTED ? -+ SFP_E_LOS_LOW : SFP_E_LOS_HIGH)) { -+ sfp_sm_link_down(sfp); -+ sfp_sm_next(sfp, SFP_S_WAIT_LOS, 0); -+ } -+ break; -+ -+ case SFP_S_TX_FAULT: -+ if (event == SFP_E_TIMEOUT) { -+ sfp_module_tx_fault_reset(sfp); -+ sfp_sm_next(sfp, SFP_S_REINIT, T_INIT_JIFFIES); -+ } -+ break; -+ -+ case SFP_S_REINIT: -+ if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) { -+ sfp_sm_fault(sfp, false); -+ } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { -+ dev_info(sfp->dev, "module transmit fault recovered\n"); -+ sfp_sm_link_check_los(sfp); -+ } -+ break; -+ -+ case SFP_S_TX_DISABLE: -+ break; -+ } -+ -+ dev_dbg(sfp->dev, "SM: exit %u:%u:%u\n", -+ sfp->sm_mod_state, sfp->sm_dev_state, sfp->sm_state); -+ -+ mutex_unlock(&sfp->sm_mutex); -+} -+ -+#if 0 -+static int sfp_phy_module_info(struct phy_device *phy, -+ struct ethtool_modinfo *modinfo) -+{ -+ struct sfp *sfp = phy->priv; -+ -+ /* locking... and check module is present */ -+ -+ if (sfp->id.ext.sff8472_compliance) { -+ modinfo->type = ETH_MODULE_SFF_8472; -+ modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; -+ } else { -+ modinfo->type = ETH_MODULE_SFF_8079; -+ modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; -+ } -+ return 0; -+} -+ -+static int sfp_phy_module_eeprom(struct phy_device *phy, -+ struct ethtool_eeprom *ee, u8 *data) -+{ -+ struct sfp *sfp = phy->priv; -+ unsigned int first, last, len; -+ int ret; -+ -+ if (ee->len == 0) -+ return -EINVAL; -+ -+ first = ee->offset; -+ last = ee->offset + ee->len; -+ if (first < ETH_MODULE_SFF_8079_LEN) { -+ len = last; -+ if (len > ETH_MODULE_SFF_8079_LEN) -+ len = ETH_MODULE_SFF_8079_LEN; -+ len -= first; -+ -+ ret = sfp->read(sfp, false, first, data, len); -+ if (ret < 0) -+ return ret; -+ -+ first += len; -+ data += len; -+ } -+ if (first >= ETH_MODULE_SFF_8079_LEN && last > first) { -+ len = last - first; -+ -+ ret = sfp->read(sfp, true, first, data, len); -+ if (ret < 0) -+ return ret; -+ } -+ return 0; -+} -+#endif -+ -+static void sfp_timeout(struct work_struct *work) -+{ -+ struct sfp *sfp = container_of(work, struct sfp, timeout.work); -+ -+ sfp_sm_event(sfp, SFP_E_TIMEOUT); -+} -+ -+static void sfp_check_state(struct sfp *sfp) -+{ -+ unsigned int state, i, changed; -+ -+ state = sfp_get_state(sfp); -+ changed = state ^ sfp->state; -+ changed &= SFP_F_PRESENT | SFP_F_LOS | SFP_F_TX_FAULT; -+ -+ for (i = 0; i < GPIO_MAX; i++) -+ if (changed & BIT(i)) -+ dev_dbg(sfp->dev, "%s %u -> %u\n", gpio_of_names[i], -+ !!(sfp->state & BIT(i)), !!(state & BIT(i))); -+ -+ state |= sfp->state & (SFP_F_TX_DISABLE | SFP_F_RATE_SELECT); -+ sfp->state = state; -+ -+ if (changed & SFP_F_PRESENT) -+ sfp_sm_event(sfp, state & SFP_F_PRESENT ? -+ SFP_E_INSERT : SFP_E_REMOVE); -+ -+ if (changed & SFP_F_TX_FAULT) -+ sfp_sm_event(sfp, state & SFP_F_TX_FAULT ? -+ SFP_E_TX_FAULT : SFP_E_TX_CLEAR); -+ -+ if (changed & SFP_F_LOS) -+ sfp_sm_event(sfp, state & SFP_F_LOS ? -+ SFP_E_LOS_HIGH : SFP_E_LOS_LOW); -+} -+ -+static irqreturn_t sfp_irq(int irq, void *data) -+{ -+ struct sfp *sfp = data; -+ -+ sfp_check_state(sfp); -+ -+ return IRQ_HANDLED; -+} -+ -+static void sfp_poll(struct work_struct *work) -+{ -+ struct sfp *sfp = container_of(work, struct sfp, poll.work); -+ -+ sfp_check_state(sfp); -+ mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); -+} -+ -+static int sfp_netdev_notify(struct notifier_block *nb, unsigned long act, void *data) -+{ -+ struct sfp *sfp = container_of(nb, struct sfp, netdev_nb); -+ struct netdev_notifier_info *info = data; -+ struct net_device *ndev = info->dev; -+ -+ if (!sfp->ndev || ndev != sfp->ndev) -+ return NOTIFY_DONE; -+ -+ switch (act) { -+ case NETDEV_UP: -+ sfp_sm_event(sfp, SFP_E_DEV_UP); -+ break; -+ -+ case NETDEV_GOING_DOWN: -+ sfp_sm_event(sfp, SFP_E_DEV_DOWN); -+ break; -+ -+ case NETDEV_UNREGISTER: -+ if (sfp->mod_phy && sfp->phylink) -+ phylink_disconnect_phy(sfp->phylink); -+ sfp->phylink = NULL; -+ dev_put(sfp->ndev); -+ sfp->ndev = NULL; -+ break; -+ } -+ return NOTIFY_OK; -+} -+ -+static struct sfp *sfp_alloc(struct device *dev) -+{ -+ struct sfp *sfp; -+ -+ sfp = kzalloc(sizeof(*sfp), GFP_KERNEL); -+ if (!sfp) -+ return ERR_PTR(-ENOMEM); -+ -+ sfp->dev = dev; -+ -+ mutex_init(&sfp->sm_mutex); -+ INIT_DELAYED_WORK(&sfp->poll, sfp_poll); -+ INIT_DELAYED_WORK(&sfp->timeout, sfp_timeout); -+ -+ sfp->netdev_nb.notifier_call = sfp_netdev_notify; -+ -+ return sfp; -+} -+ -+static void sfp_destroy(struct sfp *sfp) -+{ -+ cancel_delayed_work_sync(&sfp->poll); -+ cancel_delayed_work_sync(&sfp->timeout); -+ if (sfp->i2c_mii) { -+ mdiobus_unregister(sfp->i2c_mii); -+ mdiobus_free(sfp->i2c_mii); -+ } -+ if (sfp->i2c) -+ i2c_put_adapter(sfp->i2c); -+ of_node_put(sfp->dev->of_node); -+ kfree(sfp); -+} -+ -+static void sfp_cleanup(void *data) -+{ -+ struct sfp *sfp = data; -+ -+ sfp_destroy(sfp); -+} -+ -+static int sfp_probe(struct platform_device *pdev) -+{ -+ struct sfp *sfp; -+ bool poll = false; -+ int irq, err, i; -+ -+ sfp = sfp_alloc(&pdev->dev); -+ if (IS_ERR(sfp)) -+ return PTR_ERR(sfp); -+ -+ platform_set_drvdata(pdev, sfp); -+ -+ err = devm_add_action(sfp->dev, sfp_cleanup, sfp); -+ if (err < 0) -+ return err; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *node = pdev->dev.of_node; -+ struct device_node *np; -+ -+ np = of_parse_phandle(node, "i2c-bus", 0); -+ if (np) { -+ struct i2c_adapter *i2c; -+ -+ i2c = of_find_i2c_adapter_by_node(np); -+ of_node_put(np); -+ if (!i2c) -+ return -EPROBE_DEFER; -+ -+ err = sfp_i2c_configure(sfp, i2c); -+ if (err < 0) { -+ i2c_put_adapter(i2c); -+ return err; -+ } -+ } -+ -+ for (i = 0; i < GPIO_MAX; i++) { -+ sfp->gpio[i] = devm_gpiod_get_optional(sfp->dev, -+ gpio_of_names[i], gpio_flags[i]); -+ if (IS_ERR(sfp->gpio[i])) -+ return PTR_ERR(sfp->gpio[i]); -+ } -+ -+ sfp->get_state = sfp_gpio_get_state; -+ sfp->set_state = sfp_gpio_set_state; -+ -+ np = of_parse_phandle(node, "sfp,ethernet", 0); -+ if (!np) { -+ dev_err(sfp->dev, "missing sfp,ethernet property\n"); -+ return -EINVAL; -+ } -+ -+ sfp->ndev = of_find_net_device_by_node(np); -+ if (!sfp->ndev) { -+ dev_err(sfp->dev, "ethernet device not found\n"); -+ return -EPROBE_DEFER; -+ } -+ -+ dev_hold(sfp->ndev); -+ put_device(&sfp->ndev->dev); -+ -+ sfp->phylink = phylink_lookup_by_netdev(sfp->ndev); -+ if (!sfp->phylink) { -+ dev_err(sfp->dev, "ethernet device not found\n"); -+ return -EPROBE_DEFER; -+ } -+ -+ phylink_disable(sfp->phylink); -+ } -+ -+ sfp->state = sfp_get_state(sfp); -+ if (sfp->gpio[GPIO_TX_DISABLE] && -+ gpiod_get_value_cansleep(sfp->gpio[GPIO_TX_DISABLE])) -+ sfp->state |= SFP_F_TX_DISABLE; -+ if (sfp->gpio[GPIO_RATE_SELECT] && -+ gpiod_get_value_cansleep(sfp->gpio[GPIO_RATE_SELECT])) -+ sfp->state |= SFP_F_RATE_SELECT; -+ sfp_set_state(sfp, sfp->state); -+ sfp_module_tx_disable(sfp); -+ if (sfp->state & SFP_F_PRESENT) -+ sfp_sm_event(sfp, SFP_E_INSERT); -+ -+ for (i = 0; i < GPIO_MAX; i++) { -+ if (gpio_flags[i] != GPIOD_IN || !sfp->gpio[i]) -+ continue; -+ -+ irq = gpiod_to_irq(sfp->gpio[i]); -+ if (!irq) { -+ poll = true; -+ continue; -+ } -+ -+ err = devm_request_threaded_irq(sfp->dev, irq, NULL, sfp_irq, -+ IRQF_ONESHOT | -+ IRQF_TRIGGER_RISING | -+ IRQF_TRIGGER_FALLING, -+ dev_name(sfp->dev), sfp); -+ if (err) -+ poll = true; -+ } -+ -+ if (poll) -+ mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); -+ -+ register_netdevice_notifier(&sfp->netdev_nb); -+ -+ return 0; -+} -+ -+static int sfp_remove(struct platform_device *pdev) -+{ -+ struct sfp *sfp = platform_get_drvdata(pdev); -+ -+ unregister_netdevice_notifier(&sfp->netdev_nb); -+ if (sfp->ndev) -+ dev_put(sfp->ndev); -+ -+ return 0; -+} -+ -+static const struct of_device_id sfp_of_match[] = { -+ { .compatible = "sff,sfp", }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, sfp_of_match); -+ -+static struct platform_driver sfp_driver = { -+ .probe = sfp_probe, -+ .remove = sfp_remove, -+ .driver = { -+ .name = "sfp", -+ .of_match_table = sfp_of_match, -+ }, -+}; -+ -+static int sfp_init(void) -+{ -+ poll_jiffies = msecs_to_jiffies(100); -+ -+ return platform_driver_register(&sfp_driver); -+} -+module_init(sfp_init); -+ -+static void sfp_exit(void) -+{ -+ platform_driver_unregister(&sfp_driver); -+} -+module_exit(sfp_exit); -+ -+MODULE_ALIAS("platform:sfp"); -+MODULE_AUTHOR("Russell King"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/include/linux/sfp.h -@@ -0,0 +1,339 @@ -+#ifndef LINUX_SFP_H -+#define LINUX_SFP_H -+ -+struct __packed sfp_eeprom_base { -+ u8 phys_id; -+ u8 phys_ext_id; -+ u8 connector; -+#if defined __BIG_ENDIAN_BITFIELD -+ u8 e10g_base_er:1; -+ u8 e10g_base_lrm:1; -+ u8 e10g_base_lr:1; -+ u8 e10g_base_sr:1; -+ u8 if_1x_sx:1; -+ u8 if_1x_lx:1; -+ u8 if_1x_copper_active:1; -+ u8 if_1x_copper_passive:1; -+ -+ u8 escon_mmf_1310_led:1; -+ u8 escon_smf_1310_laser:1; -+ u8 sonet_oc192_short_reach:1; -+ u8 sonet_reach_bit1:1; -+ u8 sonet_reach_bit2:1; -+ u8 sonet_oc48_long_reach:1; -+ u8 sonet_oc48_intermediate_reach:1; -+ u8 sonet_oc48_short_reach:1; -+ -+ u8 unallocated_5_7:1; -+ u8 sonet_oc12_smf_long_reach:1; -+ u8 sonet_oc12_smf_intermediate_reach:1; -+ u8 sonet_oc12_short_reach:1; -+ u8 unallocated_5_3:1; -+ u8 sonet_oc3_smf_long_reach:1; -+ u8 sonet_oc3_smf_intermediate_reach:1; -+ u8 sonet_oc3_short_reach:1; -+ -+ u8 e_base_px:1; -+ u8 e_base_bx10:1; -+ u8 e100_base_fx:1; -+ u8 e100_base_lx:1; -+ u8 e1000_base_t:1; -+ u8 e1000_base_cx:1; -+ u8 e1000_base_lx:1; -+ u8 e1000_base_sx:1; -+ -+ u8 fc_ll_v:1; -+ u8 fc_ll_s:1; -+ u8 fc_ll_i:1; -+ u8 fc_ll_l:1; -+ u8 fc_ll_m:1; -+ u8 fc_tech_sa:1; -+ u8 fc_tech_lc:1; -+ u8 fc_tech_electrical_inter_enclosure:1; -+ -+ u8 fc_tech_electrical_intra_enclosure:1; -+ u8 fc_tech_sn:1; -+ u8 fc_tech_sl:1; -+ u8 fc_tech_ll:1; -+ u8 sfp_ct_active:1; -+ u8 sfp_ct_passive:1; -+ u8 unallocated_8_1:1; -+ u8 unallocated_8_0:1; -+ -+ u8 fc_media_tw:1; -+ u8 fc_media_tp:1; -+ u8 fc_media_mi:1; -+ u8 fc_media_tv:1; -+ u8 fc_media_m6:1; -+ u8 fc_media_m5:1; -+ u8 unallocated_9_1:1; -+ u8 fc_media_sm:1; -+ -+ u8 fc_speed_1200:1; -+ u8 fc_speed_800:1; -+ u8 fc_speed_1600:1; -+ u8 fc_speed_400:1; -+ u8 fc_speed_3200:1; -+ u8 fc_speed_200:1; -+ u8 unallocated_10_1:1; -+ u8 fc_speed_100:1; -+#elif defined __LITTLE_ENDIAN_BITFIELD -+ u8 if_1x_copper_passive:1; -+ u8 if_1x_copper_active:1; -+ u8 if_1x_lx:1; -+ u8 if_1x_sx:1; -+ u8 e10g_base_sr:1; -+ u8 e10g_base_lr:1; -+ u8 e10g_base_lrm:1; -+ u8 e10g_base_er:1; -+ -+ u8 sonet_oc3_short_reach:1; -+ u8 sonet_oc3_smf_intermediate_reach:1; -+ u8 sonet_oc3_smf_long_reach:1; -+ u8 unallocated_5_3:1; -+ u8 sonet_oc12_short_reach:1; -+ u8 sonet_oc12_smf_intermediate_reach:1; -+ u8 sonet_oc12_smf_long_reach:1; -+ u8 unallocated_5_7:1; -+ -+ u8 sonet_oc48_short_reach:1; -+ u8 sonet_oc48_intermediate_reach:1; -+ u8 sonet_oc48_long_reach:1; -+ u8 sonet_reach_bit2:1; -+ u8 sonet_reach_bit1:1; -+ u8 sonet_oc192_short_reach:1; -+ u8 escon_smf_1310_laser:1; -+ u8 escon_mmf_1310_led:1; -+ -+ u8 e1000_base_sx:1; -+ u8 e1000_base_lx:1; -+ u8 e1000_base_cx:1; -+ u8 e1000_base_t:1; -+ u8 e100_base_lx:1; -+ u8 e100_base_fx:1; -+ u8 e_base_bx10:1; -+ u8 e_base_px:1; -+ -+ u8 fc_tech_electrical_inter_enclosure:1; -+ u8 fc_tech_lc:1; -+ u8 fc_tech_sa:1; -+ u8 fc_ll_m:1; -+ u8 fc_ll_l:1; -+ u8 fc_ll_i:1; -+ u8 fc_ll_s:1; -+ u8 fc_ll_v:1; -+ -+ u8 unallocated_8_0:1; -+ u8 unallocated_8_1:1; -+ u8 sfp_ct_passive:1; -+ u8 sfp_ct_active:1; -+ u8 fc_tech_ll:1; -+ u8 fc_tech_sl:1; -+ u8 fc_tech_sn:1; -+ u8 fc_tech_electrical_intra_enclosure:1; -+ -+ u8 fc_media_sm:1; -+ u8 unallocated_9_1:1; -+ u8 fc_media_m5:1; -+ u8 fc_media_m6:1; -+ u8 fc_media_tv:1; -+ u8 fc_media_mi:1; -+ u8 fc_media_tp:1; -+ u8 fc_media_tw:1; -+ -+ u8 fc_speed_100:1; -+ u8 unallocated_10_1:1; -+ u8 fc_speed_200:1; -+ u8 fc_speed_3200:1; -+ u8 fc_speed_400:1; -+ u8 fc_speed_1600:1; -+ u8 fc_speed_800:1; -+ u8 fc_speed_1200:1; -+#else -+#error Unknown Endian -+#endif -+ u8 encoding; -+ u8 br_nominal; -+ u8 rate_id; -+ u8 link_len[6]; -+ char vendor_name[16]; -+ u8 reserved36; -+ char vendor_oui[3]; -+ char vendor_pn[16]; -+ char vendor_rev[4]; -+ union { -+ __be16 optical_wavelength; -+ u8 cable_spec; -+ }; -+ u8 reserved62; -+ u8 cc_base; -+}; -+ -+struct __packed sfp_eeprom_ext { -+ __be16 options; -+ u8 br_max; -+ u8 br_min; -+ char vendor_sn[16]; -+ char datecode[8]; -+ u8 diagmon; -+ u8 enhopts; -+ u8 sff8472_compliance; -+ u8 cc_ext; -+}; -+ -+struct __packed sfp_eeprom_id { -+ struct sfp_eeprom_base base; -+ struct sfp_eeprom_ext ext; -+}; -+ -+/* SFP EEPROM registers */ -+enum { -+ SFP_PHYS_ID = 0x00, -+ SFP_PHYS_EXT_ID = 0x01, -+ SFP_CONNECTOR = 0x02, -+ SFP_COMPLIANCE = 0x03, -+ SFP_ENCODING = 0x0b, -+ SFP_BR_NOMINAL = 0x0c, -+ SFP_RATE_ID = 0x0d, -+ SFP_LINK_LEN_SM_KM = 0x0e, -+ SFP_LINK_LEN_SM_100M = 0x0f, -+ SFP_LINK_LEN_50UM_OM2_10M = 0x10, -+ SFP_LINK_LEN_62_5UM_OM1_10M = 0x11, -+ SFP_LINK_LEN_COPPER_1M = 0x12, -+ SFP_LINK_LEN_50UM_OM4_10M = 0x12, -+ SFP_LINK_LEN_50UM_OM3_10M = 0x13, -+ SFP_VENDOR_NAME = 0x14, -+ SFP_VENDOR_OUI = 0x25, -+ SFP_VENDOR_PN = 0x28, -+ SFP_VENDOR_REV = 0x38, -+ SFP_OPTICAL_WAVELENGTH_MSB = 0x3c, -+ SFP_OPTICAL_WAVELENGTH_LSB = 0x3d, -+ SFP_CABLE_SPEC = 0x3c, -+ SFP_CC_BASE = 0x3f, -+ SFP_OPTIONS = 0x40, /* 2 bytes, MSB, LSB */ -+ SFP_BR_MAX = 0x42, -+ SFP_BR_MIN = 0x43, -+ SFP_VENDOR_SN = 0x44, -+ SFP_DATECODE = 0x54, -+ SFP_DIAGMON = 0x5c, -+ SFP_ENHOPTS = 0x5d, -+ SFP_SFF8472_COMPLIANCE = 0x5e, -+ SFP_CC_EXT = 0x5f, -+ -+ SFP_PHYS_ID_SFP = 0x03, -+ SFP_PHYS_EXT_ID_SFP = 0x04, -+ SFP_CONNECTOR_UNSPEC = 0x00, -+ /* codes 01-05 not supportable on SFP, but some modules have single SC */ -+ SFP_CONNECTOR_SC = 0x01, -+ SFP_CONNECTOR_FIBERJACK = 0x06, -+ SFP_CONNECTOR_LC = 0x07, -+ SFP_CONNECTOR_MT_RJ = 0x08, -+ SFP_CONNECTOR_MU = 0x09, -+ SFP_CONNECTOR_SG = 0x0a, -+ SFP_CONNECTOR_OPTICAL_PIGTAIL = 0x0b, -+ SFP_CONNECTOR_HSSDC_II = 0x20, -+ SFP_CONNECTOR_COPPER_PIGTAIL = 0x21, -+ SFP_ENCODING_UNSPEC = 0x00, -+ SFP_ENCODING_8B10B = 0x01, -+ SFP_ENCODING_4B5B = 0x02, -+ SFP_ENCODING_NRZ = 0x03, -+ SFP_ENCODING_MANCHESTER = 0x04, -+ SFP_OPTIONS_HIGH_POWER_LEVEL = BIT(13), -+ SFP_OPTIONS_PAGING_A2 = BIT(12), -+ SFP_OPTIONS_RETIMER = BIT(11), -+ SFP_OPTIONS_COOLED_XCVR = BIT(10), -+ SFP_OPTIONS_POWER_DECL = BIT(9), -+ SFP_OPTIONS_RX_LINEAR_OUT = BIT(8), -+ SFP_OPTIONS_RX_DECISION_THRESH = BIT(7), -+ SFP_OPTIONS_TUNABLE_TX = BIT(6), -+ SFP_OPTIONS_RATE_SELECT = BIT(5), -+ SFP_OPTIONS_TX_DISABLE = BIT(4), -+ SFP_OPTIONS_TX_FAULT = BIT(3), -+ SFP_OPTIONS_LOS_INVERTED = BIT(2), -+ SFP_OPTIONS_LOS_NORMAL = BIT(1), -+ SFP_DIAGMON_DDM = BIT(6), -+ SFP_DIAGMON_INT_CAL = BIT(5), -+ SFP_DIAGMON_EXT_CAL = BIT(4), -+ SFP_DIAGMON_RXPWR_AVG = BIT(3), -+ SFP_DIAGMON_ADDRMODE = BIT(2), -+ SFP_ENHOPTS_ALARMWARN = BIT(7), -+ SFP_ENHOPTS_SOFT_TX_DISABLE = BIT(6), -+ SFP_ENHOPTS_SOFT_TX_FAULT = BIT(5), -+ SFP_ENHOPTS_SOFT_RX_LOS = BIT(4), -+ SFP_ENHOPTS_SOFT_RATE_SELECT = BIT(3), -+ SFP_ENHOPTS_APP_SELECT_SFF8079 = BIT(2), -+ SFP_ENHOPTS_SOFT_RATE_SFF8431 = BIT(1), -+ SFP_SFF8472_COMPLIANCE_NONE = 0x00, -+ SFP_SFF8472_COMPLIANCE_REV9_3 = 0x01, -+ SFP_SFF8472_COMPLIANCE_REV9_5 = 0x02, -+ SFP_SFF8472_COMPLIANCE_REV10_2 = 0x03, -+ SFP_SFF8472_COMPLIANCE_REV10_4 = 0x04, -+ SFP_SFF8472_COMPLIANCE_REV11_0 = 0x05, -+ SFP_SFF8472_COMPLIANCE_REV11_3 = 0x06, -+ SFP_SFF8472_COMPLIANCE_REV11_4 = 0x07, -+ SFP_SFF8472_COMPLIANCE_REV12_0 = 0x08, -+}; -+ -+/* SFP Diagnostics */ -+enum { -+ /* Alarm and warnings stored MSB at lower address then LSB */ -+ SFP_TEMP_HIGH_ALARM = 0x00, -+ SFP_TEMP_LOW_ALARM = 0x02, -+ SFP_TEMP_HIGH_WARN = 0x04, -+ SFP_TEMP_LOW_WARN = 0x06, -+ SFP_VOLT_HIGH_ALARM = 0x08, -+ SFP_VOLT_LOW_ALARM = 0x0a, -+ SFP_VOLT_HIGH_WARN = 0x0c, -+ SFP_VOLT_LOW_WARN = 0x0e, -+ SFP_BIAS_HIGH_ALARM = 0x10, -+ SFP_BIAS_LOW_ALARM = 0x12, -+ SFP_BIAS_HIGH_WARN = 0x14, -+ SFP_BIAS_LOW_WARN = 0x16, -+ SFP_TXPWR_HIGH_ALARM = 0x18, -+ SFP_TXPWR_LOW_ALARM = 0x1a, -+ SFP_TXPWR_HIGH_WARN = 0x1c, -+ SFP_TXPWR_LOW_WARN = 0x1e, -+ SFP_RXPWR_HIGH_ALARM = 0x20, -+ SFP_RXPWR_LOW_ALARM = 0x22, -+ SFP_RXPWR_HIGH_WARN = 0x24, -+ SFP_RXPWR_LOW_WARN = 0x26, -+ SFP_LASER_TEMP_HIGH_ALARM = 0x28, -+ SFP_LASER_TEMP_LOW_ALARM = 0x2a, -+ SFP_LASER_TEMP_HIGH_WARN = 0x2c, -+ SFP_LASER_TEMP_LOW_WARN = 0x2e, -+ SFP_TEC_CUR_HIGH_ALARM = 0x30, -+ SFP_TEC_CUR_LOW_ALARM = 0x32, -+ SFP_TEC_CUR_HIGH_WARN = 0x34, -+ SFP_TEC_CUR_LOW_WARN = 0x36, -+ SFP_CAL_RXPWR4 = 0x38, -+ SFP_CAL_RXPWR3 = 0x3c, -+ SFP_CAL_RXPWR2 = 0x40, -+ SFP_CAL_RXPWR1 = 0x44, -+ SFP_CAL_RXPWR0 = 0x48, -+ SFP_CAL_TXI_SLOPE = 0x4c, -+ SFP_CAL_TXI_OFFSET = 0x4e, -+ SFP_CAL_TXPWR_SLOPE = 0x50, -+ SFP_CAL_TXPWR_OFFSET = 0x52, -+ SFP_CAL_T_SLOPE = 0x54, -+ SFP_CAL_T_OFFSET = 0x56, -+ SFP_CAL_V_SLOPE = 0x58, -+ SFP_CAL_V_OFFSET = 0x5a, -+ SFP_CHKSUM = 0x5f, -+ -+ SFP_TEMP = 0x60, -+ SFP_VCC = 0x62, -+ SFP_TX_BIAS = 0x64, -+ SFP_TX_POWER = 0x66, -+ SFP_RX_POWER = 0x68, -+ SFP_LASER_TEMP = 0x6a, -+ SFP_TEC_CUR = 0x6c, -+ -+ SFP_STATUS = 0x6e, -+ SFP_ALARM = 0x70, -+ -+ SFP_EXT_STATUS = 0x76, -+ SFP_VSL = 0x78, -+ SFP_PAGE = 0x7f, -+}; -+ -+#endif diff --git a/target/linux/mvebu/patches-4.4/133-sfp-display-SFP-module-information.patch b/target/linux/mvebu/patches-4.4/133-sfp-display-SFP-module-information.patch deleted file mode 100644 index bc039ee19..000000000 --- a/target/linux/mvebu/patches-4.4/133-sfp-display-SFP-module-information.patch +++ /dev/null @@ -1,283 +0,0 @@ -From 66c248886538d7ee97ef2fe498061f857d4c906a Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sun, 13 Sep 2015 01:06:31 +0100 -Subject: [PATCH 721/744] sfp: display SFP module information - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 247 +++++++++++++++++++++++++++++++++++++++++++++++++- - 1 file changed, 246 insertions(+), 1 deletion(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -248,6 +248,182 @@ static unsigned int sfp_check(void *buf, - return check; - } - -+static const char *sfp_link_len(char *buf, size_t size, unsigned int length, -+ unsigned int multiplier) -+{ -+ if (length == 0) -+ return "unsupported/unspecified"; -+ -+ if (length == 255) { -+ *buf++ = '>'; -+ size -= 1; -+ length -= 1; -+ } -+ -+ length *= multiplier; -+ -+ if (length >= 1000) -+ snprintf(buf, size, "%u.%0*ukm", -+ length / 1000, -+ multiplier > 100 ? 1 : -+ multiplier > 10 ? 2 : 3, -+ length % 1000); -+ else -+ snprintf(buf, size, "%um", length); -+ -+ return buf; -+} -+ -+struct bitfield { -+ unsigned int mask; -+ unsigned int val; -+ const char *str; -+}; -+ -+static const struct bitfield sfp_options[] = { -+ { -+ .mask = SFP_OPTIONS_HIGH_POWER_LEVEL, -+ .val = SFP_OPTIONS_HIGH_POWER_LEVEL, -+ .str = "hpl", -+ }, { -+ .mask = SFP_OPTIONS_PAGING_A2, -+ .val = SFP_OPTIONS_PAGING_A2, -+ .str = "paginga2", -+ }, { -+ .mask = SFP_OPTIONS_RETIMER, -+ .val = SFP_OPTIONS_RETIMER, -+ .str = "retimer", -+ }, { -+ .mask = SFP_OPTIONS_COOLED_XCVR, -+ .val = SFP_OPTIONS_COOLED_XCVR, -+ .str = "cooled", -+ }, { -+ .mask = SFP_OPTIONS_POWER_DECL, -+ .val = SFP_OPTIONS_POWER_DECL, -+ .str = "powerdecl", -+ }, { -+ .mask = SFP_OPTIONS_RX_LINEAR_OUT, -+ .val = SFP_OPTIONS_RX_LINEAR_OUT, -+ .str = "rxlinear", -+ }, { -+ .mask = SFP_OPTIONS_RX_DECISION_THRESH, -+ .val = SFP_OPTIONS_RX_DECISION_THRESH, -+ .str = "rxthresh", -+ }, { -+ .mask = SFP_OPTIONS_TUNABLE_TX, -+ .val = SFP_OPTIONS_TUNABLE_TX, -+ .str = "tunabletx", -+ }, { -+ .mask = SFP_OPTIONS_RATE_SELECT, -+ .val = SFP_OPTIONS_RATE_SELECT, -+ .str = "ratesel", -+ }, { -+ .mask = SFP_OPTIONS_TX_DISABLE, -+ .val = SFP_OPTIONS_TX_DISABLE, -+ .str = "txdisable", -+ }, { -+ .mask = SFP_OPTIONS_TX_FAULT, -+ .val = SFP_OPTIONS_TX_FAULT, -+ .str = "txfault", -+ }, { -+ .mask = SFP_OPTIONS_LOS_INVERTED, -+ .val = SFP_OPTIONS_LOS_INVERTED, -+ .str = "los-", -+ }, { -+ .mask = SFP_OPTIONS_LOS_NORMAL, -+ .val = SFP_OPTIONS_LOS_NORMAL, -+ .str = "los+", -+ }, { } -+}; -+ -+static const struct bitfield diagmon[] = { -+ { -+ .mask = SFP_DIAGMON_DDM, -+ .val = SFP_DIAGMON_DDM, -+ .str = "ddm", -+ }, { -+ .mask = SFP_DIAGMON_INT_CAL, -+ .val = SFP_DIAGMON_INT_CAL, -+ .str = "intcal", -+ }, { -+ .mask = SFP_DIAGMON_EXT_CAL, -+ .val = SFP_DIAGMON_EXT_CAL, -+ .str = "extcal", -+ }, { -+ .mask = SFP_DIAGMON_RXPWR_AVG, -+ .val = SFP_DIAGMON_RXPWR_AVG, -+ .str = "rxpwravg", -+ }, { } -+}; -+ -+static const char *sfp_bitfield(char *out, size_t outsz, const struct bitfield *bits, unsigned int val) -+{ -+ char *p = out; -+ int n; -+ -+ *p = '\0'; -+ while (bits->mask) { -+ if ((val & bits->mask) == bits->val) { -+ n = snprintf(p, outsz, "%s%s", -+ out != p ? ", " : "", -+ bits->str); -+ if (n == outsz) -+ break; -+ p += n; -+ outsz -= n; -+ } -+ bits++; -+ } -+ -+ return out; -+} -+ -+static const char *sfp_connector(unsigned int connector) -+{ -+ switch (connector) { -+ case SFP_CONNECTOR_UNSPEC: -+ return "unknown/unspecified"; -+ case SFP_CONNECTOR_SC: -+ return "SC"; -+ case SFP_CONNECTOR_FIBERJACK: -+ return "Fiberjack"; -+ case SFP_CONNECTOR_LC: -+ return "LC"; -+ case SFP_CONNECTOR_MT_RJ: -+ return "MT-RJ"; -+ case SFP_CONNECTOR_MU: -+ return "MU"; -+ case SFP_CONNECTOR_SG: -+ return "SG"; -+ case SFP_CONNECTOR_OPTICAL_PIGTAIL: -+ return "Optical pigtail"; -+ case SFP_CONNECTOR_HSSDC_II: -+ return "HSSDC II"; -+ case SFP_CONNECTOR_COPPER_PIGTAIL: -+ return "Copper pigtail"; -+ default: -+ return "unknown"; -+ } -+} -+ -+static const char *sfp_encoding(unsigned int encoding) -+{ -+ switch (encoding) { -+ case SFP_ENCODING_UNSPEC: -+ return "unspecified"; -+ case SFP_ENCODING_8B10B: -+ return "8b10b"; -+ case SFP_ENCODING_4B5B: -+ return "4b5b"; -+ case SFP_ENCODING_NRZ: -+ return "NRZ"; -+ case SFP_ENCODING_MANCHESTER: -+ return "MANCHESTER"; -+ default: -+ return "unknown"; -+ } -+} -+ - /* Helpers */ - static void sfp_module_tx_disable(struct sfp *sfp) - { -@@ -426,6 +602,7 @@ static int sfp_sm_mod_probe(struct sfp * - char sn[17]; - char date[9]; - char rev[5]; -+ char options[80]; - u8 check; - int err; - -@@ -462,10 +639,78 @@ static int sfp_sm_mod_probe(struct sfp * - rev[4] = '\0'; - memcpy(sn, sfp->id.ext.vendor_sn, 16); - sn[16] = '\0'; -- memcpy(date, sfp->id.ext.datecode, 8); -+ date[0] = sfp->id.ext.datecode[4]; -+ date[1] = sfp->id.ext.datecode[5]; -+ date[2] = '-'; -+ date[3] = sfp->id.ext.datecode[2]; -+ date[4] = sfp->id.ext.datecode[3]; -+ date[5] = '-'; -+ date[6] = sfp->id.ext.datecode[0]; -+ date[7] = sfp->id.ext.datecode[1]; - date[8] = '\0'; - - dev_info(sfp->dev, "module %s %s rev %s sn %s dc %s\n", vendor, part, rev, sn, date); -+ dev_info(sfp->dev, " %s connector, encoding %s, nominal bitrate %u.%uGbps +%u%% -%u%%\n", -+ sfp_connector(sfp->id.base.connector), -+ sfp_encoding(sfp->id.base.encoding), -+ sfp->id.base.br_nominal / 10, -+ sfp->id.base.br_nominal % 10, -+ sfp->id.ext.br_max, sfp->id.ext.br_min); -+ dev_info(sfp->dev, " 1000BaseSX%c 1000BaseLX%c 1000BaseCX%c 1000BaseT%c 100BaseTLX%c 1000BaseFX%c BaseBX10%c BasePX%c\n", -+ sfp->id.base.e1000_base_sx ? '+' : '-', -+ sfp->id.base.e1000_base_lx ? '+' : '-', -+ sfp->id.base.e1000_base_cx ? '+' : '-', -+ sfp->id.base.e1000_base_t ? '+' : '-', -+ sfp->id.base.e100_base_lx ? '+' : '-', -+ sfp->id.base.e100_base_fx ? '+' : '-', -+ sfp->id.base.e_base_bx10 ? '+' : '-', -+ sfp->id.base.e_base_px ? '+' : '-'); -+ -+ if (!sfp->id.base.sfp_ct_passive && !sfp->id.base.sfp_ct_active && -+ !sfp->id.base.e1000_base_t) { -+ char len_9um[16], len_om[16]; -+ -+ dev_info(sfp->dev, " Wavelength %unm, fiber lengths:\n", -+ be16_to_cpup(&sfp->id.base.optical_wavelength)); -+ -+ if (sfp->id.base.link_len[0] == 255) -+ strcpy(len_9um, ">254km"); -+ else if (sfp->id.base.link_len[1] && sfp->id.base.link_len[1] != 255) -+ sprintf(len_9um, "%um", -+ sfp->id.base.link_len[1] * 100); -+ else if (sfp->id.base.link_len[0]) -+ sprintf(len_9um, "%ukm", sfp->id.base.link_len[0]); -+ else if (sfp->id.base.link_len[1] == 255) -+ strcpy(len_9um, ">25.4km"); -+ else -+ strcpy(len_9um, "unsupported"); -+ -+ dev_info(sfp->dev, " 9µm SM : %s\n", len_9um); -+ dev_info(sfp->dev, " 62.5µm MM OM1: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[3], 10)); -+ dev_info(sfp->dev, " 50µm MM OM2: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[2], 10)); -+ dev_info(sfp->dev, " 50µm MM OM3: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[5], 10)); -+ dev_info(sfp->dev, " 50µm MM OM4: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[4], 10)); -+ } else { -+ char len[16]; -+ dev_info(sfp->dev, " Copper length: %s\n", -+ sfp_link_len(len, sizeof(len), -+ sfp->id.base.link_len[4], 1)); -+ } -+ -+ dev_info(sfp->dev, " Options: %s\n", -+ sfp_bitfield(options, sizeof(options), sfp_options, -+ be16_to_cpu(sfp->id.ext.options))); -+ dev_info(sfp->dev, " Diagnostics: %s\n", -+ sfp_bitfield(options, sizeof(options), diagmon, -+ sfp->id.ext.diagmon)); - - /* We only support SFP modules, not the legacy GBIC modules. */ - if (sfp->id.base.phys_id != SFP_PHYS_ID_SFP || diff --git a/target/linux/mvebu/patches-4.4/134-net-mvneta-convert-to-phylink.patch b/target/linux/mvebu/patches-4.4/134-net-mvneta-convert-to-phylink.patch deleted file mode 100644 index 3bfaf1582..000000000 --- a/target/linux/mvebu/patches-4.4/134-net-mvneta-convert-to-phylink.patch +++ /dev/null @@ -1,708 +0,0 @@ -From e268be0ddc666f4a98db462cbed2a97637e82b5c Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Wed, 16 Sep 2015 21:27:10 +0100 -Subject: [PATCH 722/744] net: mvneta: convert to phylink - -Convert mvneta to use phylink, which models the MAC to PHY link in -a generic, reusable form. - -Signed-off-by: Russell King ---- - drivers/net/ethernet/marvell/Kconfig | 2 +- - drivers/net/ethernet/marvell/mvneta.c | 451 +++++++++++++++++----------------- - 2 files changed, 227 insertions(+), 226 deletions(-) - ---- a/drivers/net/ethernet/marvell/Kconfig -+++ b/drivers/net/ethernet/marvell/Kconfig -@@ -58,7 +58,7 @@ config MVNETA - tristate "Marvell Armada 370/38x/XP network interface support" - depends on PLAT_ORION - select MVMDIO -- select FIXED_PHY -+ select PHYLINK - ---help--- - This driver supports the network interface units in the - Marvell ARMADA XP, ARMADA 370 and ARMADA 38x SoC family. ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -28,6 +28,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -188,6 +189,7 @@ - #define MVNETA_GMAC_CTRL_0 0x2c00 - #define MVNETA_GMAC_MAX_RX_SIZE_SHIFT 2 - #define MVNETA_GMAC_MAX_RX_SIZE_MASK 0x7ffc -+#define MVNETA_GMAC0_PORT_1000BASE_X BIT(1) - #define MVNETA_GMAC0_PORT_ENABLE BIT(0) - #define MVNETA_GMAC_CTRL_2 0x2c08 - #define MVNETA_GMAC2_INBAND_AN_ENABLE BIT(0) -@@ -203,13 +205,19 @@ - #define MVNETA_GMAC_TX_FLOW_CTRL_ENABLE BIT(5) - #define MVNETA_GMAC_RX_FLOW_CTRL_ACTIVE BIT(6) - #define MVNETA_GMAC_TX_FLOW_CTRL_ACTIVE BIT(7) -+#define MVNETA_GMAC_AN_COMPLETE BIT(11) -+#define MVNETA_GMAC_SYNC_OK BIT(14) - #define MVNETA_GMAC_AUTONEG_CONFIG 0x2c0c - #define MVNETA_GMAC_FORCE_LINK_DOWN BIT(0) - #define MVNETA_GMAC_FORCE_LINK_PASS BIT(1) - #define MVNETA_GMAC_INBAND_AN_ENABLE BIT(2) -+#define MVNETA_GMAC_AN_BYPASS_ENABLE BIT(3) -+#define MVNETA_GMAC_INBAND_RESTART_AN BIT(4) - #define MVNETA_GMAC_CONFIG_MII_SPEED BIT(5) - #define MVNETA_GMAC_CONFIG_GMII_SPEED BIT(6) - #define MVNETA_GMAC_AN_SPEED_EN BIT(7) -+#define MVNETA_GMAC_CONFIG_FLOW_CTRL BIT(8) -+#define MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL BIT(9) - #define MVNETA_GMAC_AN_FLOW_CTRL_EN BIT(11) - #define MVNETA_GMAC_CONFIG_FULL_DUPLEX BIT(12) - #define MVNETA_GMAC_AN_DUPLEX_EN BIT(13) -@@ -396,15 +404,9 @@ struct mvneta_port { - u16 tx_ring_size; - u16 rx_ring_size; - -- struct mii_bus *mii_bus; -- struct phy_device *phy_dev; -- phy_interface_t phy_interface; -- struct device_node *phy_node; -- unsigned int link; -- unsigned int duplex; -- unsigned int speed; -+ struct device_node *dn; - unsigned int tx_csum_limit; -- unsigned int use_inband_status:1; -+ struct phylink *phylink; - - struct mvneta_bm *bm_priv; - struct mvneta_bm_pool *pool_long; -@@ -1177,10 +1179,6 @@ static void mvneta_port_disable(struct m - val &= ~MVNETA_GMAC0_PORT_ENABLE; - mvreg_write(pp, MVNETA_GMAC_CTRL_0, val); - -- pp->link = 0; -- pp->duplex = -1; -- pp->speed = 0; -- - udelay(200); - } - -@@ -1240,44 +1238,6 @@ static void mvneta_set_other_mcast_table - mvreg_write(pp, MVNETA_DA_FILT_OTH_MCAST + offset, val); - } - --static void mvneta_set_autoneg(struct mvneta_port *pp, int enable) --{ -- u32 val; -- -- if (enable) { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_FORCE_LINK_PASS | -- MVNETA_GMAC_FORCE_LINK_DOWN | -- MVNETA_GMAC_AN_FLOW_CTRL_EN); -- val |= MVNETA_GMAC_INBAND_AN_ENABLE | -- MVNETA_GMAC_AN_SPEED_EN | -- MVNETA_GMAC_AN_DUPLEX_EN; -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -- val |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -- val |= MVNETA_GMAC2_INBAND_AN_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -- } else { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE | -- MVNETA_GMAC_AN_SPEED_EN | -- MVNETA_GMAC_AN_DUPLEX_EN); -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -- val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -- val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -- } --} -- - static void mvneta_percpu_unmask_interrupt(void *arg) - { - struct mvneta_port *pp = arg; -@@ -1425,7 +1385,6 @@ static void mvneta_defaults_set(struct m - val &= ~MVNETA_PHY_POLLING_ENABLE; - mvreg_write(pp, MVNETA_UNIT_CONTROL, val); - -- mvneta_set_autoneg(pp, pp->use_inband_status); - mvneta_set_ucast_table(pp, -1); - mvneta_set_special_mcast_table(pp, -1); - mvneta_set_other_mcast_table(pp, -1); -@@ -2618,26 +2577,11 @@ static irqreturn_t mvneta_isr(int irq, v - return IRQ_HANDLED; - } - --static int mvneta_fixed_link_update(struct mvneta_port *pp, -- struct phy_device *phy) -+static void mvneta_link_change(struct mvneta_port *pp) - { -- struct fixed_phy_status status; -- struct fixed_phy_status changed = {}; - u32 gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS); - -- status.link = !!(gmac_stat & MVNETA_GMAC_LINK_UP); -- if (gmac_stat & MVNETA_GMAC_SPEED_1000) -- status.speed = SPEED_1000; -- else if (gmac_stat & MVNETA_GMAC_SPEED_100) -- status.speed = SPEED_100; -- else -- status.speed = SPEED_10; -- status.duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX); -- changed.link = 1; -- changed.speed = 1; -- changed.duplex = 1; -- fixed_phy_update_state(phy, &status, &changed); -- return 0; -+ phylink_mac_change(pp->phylink, !!(gmac_stat & MVNETA_GMAC_LINK_UP)); - } - - /* NAPI handler -@@ -2666,12 +2610,11 @@ static int mvneta_poll(struct napi_struc - u32 cause_misc = mvreg_read(pp, MVNETA_INTR_MISC_CAUSE); - - mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0); -- if (pp->use_inband_status && (cause_misc & -- (MVNETA_CAUSE_PHY_STATUS_CHANGE | -- MVNETA_CAUSE_LINK_CHANGE | -- MVNETA_CAUSE_PSC_SYNC_CHANGE))) { -- mvneta_fixed_link_update(pp, pp->phy_dev); -- } -+ -+ if (cause_misc & (MVNETA_CAUSE_PHY_STATUS_CHANGE | -+ MVNETA_CAUSE_LINK_CHANGE | -+ MVNETA_CAUSE_PSC_SYNC_CHANGE)) -+ mvneta_link_change(pp); - } - - /* Release Tx descriptors */ -@@ -2987,7 +2930,7 @@ static void mvneta_start_dev(struct mvne - MVNETA_CAUSE_LINK_CHANGE | - MVNETA_CAUSE_PSC_SYNC_CHANGE); - -- phy_start(pp->phy_dev); -+ phylink_start(pp->phylink); - netif_tx_start_all_queues(pp->dev); - } - -@@ -2995,7 +2938,7 @@ static void mvneta_stop_dev(struct mvnet - { - unsigned int cpu; - -- phy_stop(pp->phy_dev); -+ phylink_stop(pp->phylink); - - for_each_online_cpu(cpu) { - struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); -@@ -3165,99 +3108,219 @@ static int mvneta_set_mac_addr(struct ne - return 0; - } - --static void mvneta_adjust_link(struct net_device *ndev) -+static int mvneta_mac_support(struct net_device *ndev, unsigned int mode, -+ struct phylink_link_state *state) -+{ -+ switch (mode) { -+ case MLO_AN_8023Z: -+ state->supported = SUPPORTED_1000baseT_Full | -+ SUPPORTED_Autoneg | SUPPORTED_Pause; -+ state->advertising = ADVERTISED_1000baseT_Full | -+ ADVERTISED_Autoneg | ADVERTISED_Pause; -+ state->an_enabled = 1; -+ break; -+ -+ case MLO_AN_FIXED: -+ break; -+ -+ default: -+ state->supported = PHY_10BT_FEATURES | -+ PHY_100BT_FEATURES | -+ SUPPORTED_1000baseT_Full | -+ SUPPORTED_Autoneg; -+ state->advertising = ADVERTISED_10baseT_Half | -+ ADVERTISED_10baseT_Full | -+ ADVERTISED_100baseT_Half | -+ ADVERTISED_100baseT_Full | -+ ADVERTISED_1000baseT_Full | -+ ADVERTISED_Autoneg; -+ state->an_enabled = 1; -+ break; -+ } -+ return 0; -+} -+ -+static int mvneta_mac_link_state(struct net_device *ndev, -+ struct phylink_link_state *state) - { - struct mvneta_port *pp = netdev_priv(ndev); -- struct phy_device *phydev = pp->phy_dev; -- int status_change = 0; -+ u32 gmac_stat; - -- if (phydev->link) { -- if ((pp->speed != phydev->speed) || -- (pp->duplex != phydev->duplex)) { -- u32 val; -- -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED | -- MVNETA_GMAC_CONFIG_GMII_SPEED | -- MVNETA_GMAC_CONFIG_FULL_DUPLEX); -- -- if (phydev->duplex) -- val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; -- -- if (phydev->speed == SPEED_1000) -- val |= MVNETA_GMAC_CONFIG_GMII_SPEED; -- else if (phydev->speed == SPEED_100) -- val |= MVNETA_GMAC_CONFIG_MII_SPEED; -+ gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS); - -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ if (gmac_stat & MVNETA_GMAC_SPEED_1000) -+ state->speed = SPEED_1000; -+ else if (gmac_stat & MVNETA_GMAC_SPEED_100) -+ state->speed = SPEED_100; -+ else -+ state->speed = SPEED_10; - -- pp->duplex = phydev->duplex; -- pp->speed = phydev->speed; -- } -+ state->an_complete = !!(gmac_stat & MVNETA_GMAC_AN_COMPLETE); -+ state->sync = !!(gmac_stat & MVNETA_GMAC_SYNC_OK); -+ state->link = !!(gmac_stat & MVNETA_GMAC_LINK_UP); -+ state->duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX); -+ -+ state->pause = 0; -+ if (gmac_stat & MVNETA_GMAC_RX_FLOW_CTRL_ENABLE) -+ state->pause |= MLO_PAUSE_RX; -+ if (gmac_stat & MVNETA_GMAC_TX_FLOW_CTRL_ENABLE) -+ state->pause |= MLO_PAUSE_TX; -+ -+ return 1; -+} -+ -+static void mvneta_mac_an_restart(struct net_device *ndev, unsigned int mode) -+{ -+ struct mvneta_port *pp = netdev_priv(ndev); -+ -+ if (mode == MLO_AN_8023Z) { -+ u32 gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -+ gmac_an | MVNETA_GMAC_INBAND_RESTART_AN); -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -+ gmac_an & ~MVNETA_GMAC_INBAND_RESTART_AN); - } -+} - -- if (phydev->link != pp->link) { -- if (!phydev->link) { -- pp->duplex = -1; -- pp->speed = 0; -- } -+static void mvneta_mac_config(struct net_device *ndev, unsigned int mode, -+ const struct phylink_link_state *state) -+{ -+ struct mvneta_port *pp = netdev_priv(ndev); -+ u32 new_ctrl0, gmac_ctrl0 = mvreg_read(pp, MVNETA_GMAC_CTRL_0); -+ u32 new_ctrl2, gmac_ctrl2 = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -+ u32 new_clk, gmac_clk = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -+ u32 new_an, gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ -+ new_ctrl0 = gmac_ctrl0 & ~MVNETA_GMAC0_PORT_1000BASE_X; -+ new_ctrl2 = gmac_ctrl2 & ~MVNETA_GMAC2_INBAND_AN_ENABLE; -+ new_clk = gmac_clk & ~MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ new_an = gmac_an & ~(MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_INBAND_RESTART_AN | -+ MVNETA_GMAC_CONFIG_MII_SPEED | -+ MVNETA_GMAC_CONFIG_GMII_SPEED | -+ MVNETA_GMAC_AN_SPEED_EN | -+ MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL | -+ MVNETA_GMAC_CONFIG_FLOW_CTRL | -+ MVNETA_GMAC_AN_FLOW_CTRL_EN | -+ MVNETA_GMAC_CONFIG_FULL_DUPLEX | -+ MVNETA_GMAC_AN_DUPLEX_EN); -+ -+ if (state->advertising & ADVERTISED_Pause) -+ new_an |= MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL; -+ -+ switch (mode) { -+ case MLO_AN_SGMII: -+ /* SGMII mode receives the state from the PHY */ -+ new_ctrl2 |= MVNETA_GMAC2_INBAND_AN_ENABLE; -+ new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | -+ MVNETA_GMAC_FORCE_LINK_PASS)) | -+ MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_AN_SPEED_EN | -+ MVNETA_GMAC_AN_DUPLEX_EN; -+ break; -+ -+ case MLO_AN_8023Z: -+ /* 802.3z negotiation - only 1000base-X */ -+ new_ctrl0 |= MVNETA_GMAC0_PORT_1000BASE_X; -+ new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | -+ MVNETA_GMAC_FORCE_LINK_PASS)) | -+ MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_CONFIG_GMII_SPEED | -+ /* The MAC only supports FD mode */ -+ MVNETA_GMAC_CONFIG_FULL_DUPLEX; -+ -+ if (state->an_enabled) -+ new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN; -+ break; - -- pp->link = phydev->link; -- status_change = 1; -+ default: -+ /* Phy or fixed speed */ -+ if (state->duplex) -+ new_an |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; -+ -+ if (state->speed == SPEED_1000) -+ new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED; -+ else if (state->speed == SPEED_100) -+ new_an |= MVNETA_GMAC_CONFIG_MII_SPEED; -+ break; - } - -- if (status_change) { -- if (phydev->link) { -- if (!pp->use_inband_status) { -- u32 val = mvreg_read(pp, -- MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~MVNETA_GMAC_FORCE_LINK_DOWN; -- val |= MVNETA_GMAC_FORCE_LINK_PASS; -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -- val); -- } -- mvneta_port_up(pp); -- } else { -- if (!pp->use_inband_status) { -- u32 val = mvreg_read(pp, -- MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~MVNETA_GMAC_FORCE_LINK_PASS; -- val |= MVNETA_GMAC_FORCE_LINK_DOWN; -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -- val); -- } -- mvneta_port_down(pp); -- } -- phy_print_status(phydev); -+ /* Armada 370 documentation says we can only change the port mode -+ * and in-band enable when the link is down, so force it down -+ * while making these changes. We also do this for GMAC_CTRL2 */ -+ if ((new_ctrl0 ^ gmac_ctrl0) & MVNETA_GMAC0_PORT_1000BASE_X || -+ (new_ctrl2 ^ gmac_ctrl2) & MVNETA_GMAC2_INBAND_AN_ENABLE || -+ (new_an ^ gmac_an) & MVNETA_GMAC_INBAND_AN_ENABLE) { -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -+ (gmac_an & ~MVNETA_GMAC_FORCE_LINK_PASS) | -+ MVNETA_GMAC_FORCE_LINK_DOWN); -+ } -+ -+ if (new_ctrl0 != gmac_ctrl0) -+ mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0); -+ if (new_ctrl2 != gmac_ctrl2) -+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, new_ctrl2); -+ if (new_clk != gmac_clk) -+ mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, new_clk); -+ if (new_an != gmac_an) -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, new_an); -+} -+ -+static void mvneta_mac_link_down(struct net_device *ndev, unsigned int mode) -+{ -+ struct mvneta_port *pp = netdev_priv(ndev); -+ u32 val; -+ -+ mvneta_port_down(pp); -+ -+ if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) { -+ val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ val &= ~MVNETA_GMAC_FORCE_LINK_PASS; -+ val |= MVNETA_GMAC_FORCE_LINK_DOWN; -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); - } - } - --static int mvneta_mdio_probe(struct mvneta_port *pp) -+static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode, -+ struct phy_device *phy) - { -- struct phy_device *phy_dev; -+ struct mvneta_port *pp = netdev_priv(ndev); -+ u32 val; - -- phy_dev = of_phy_connect(pp->dev, pp->phy_node, mvneta_adjust_link, 0, -- pp->phy_interface); -- if (!phy_dev) { -- netdev_err(pp->dev, "could not find the PHY\n"); -- return -ENODEV; -- } -- -- phy_dev->supported &= PHY_GBIT_FEATURES; -- phy_dev->advertising = phy_dev->supported; -- -- pp->phy_dev = phy_dev; -- pp->link = 0; -- pp->duplex = 0; -- pp->speed = 0; -+ if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) { -+ val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ val &= ~MVNETA_GMAC_FORCE_LINK_DOWN; -+ val |= MVNETA_GMAC_FORCE_LINK_PASS; -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ } - -- return 0; -+ mvneta_port_up(pp); -+} -+ -+static const struct phylink_mac_ops mvneta_phylink_ops = { -+ .mac_get_support = mvneta_mac_support, -+ .mac_link_state = mvneta_mac_link_state, -+ .mac_an_restart = mvneta_mac_an_restart, -+ .mac_config = mvneta_mac_config, -+ .mac_link_down = mvneta_mac_link_down, -+ .mac_link_up = mvneta_mac_link_up, -+}; -+ -+static int mvneta_mdio_probe(struct mvneta_port *pp) -+{ -+ int err = phylink_of_phy_connect(pp->phylink, pp->dn); -+ if (err) -+ netdev_err(pp->dev, "could not attach PHY\n"); -+ -+ return err; - } - - static void mvneta_mdio_remove(struct mvneta_port *pp) - { -- phy_disconnect(pp->phy_dev); -- pp->phy_dev = NULL; -+ phylink_disconnect_phy(pp->phylink); - } - - /* Electing a CPU must be done in an atomic way: it should be done -@@ -3505,10 +3568,7 @@ static int mvneta_ioctl(struct net_devic - { - struct mvneta_port *pp = netdev_priv(dev); - -- if (!pp->phy_dev) -- return -ENOTSUPP; -- -- return phy_mii_ioctl(pp->phy_dev, ifr, cmd); -+ return phylink_mii_ioctl(pp->phylink, ifr, cmd); - } - - /* Ethtool methods */ -@@ -3518,54 +3578,15 @@ int mvneta_ethtool_get_settings(struct n - { - struct mvneta_port *pp = netdev_priv(dev); - -- if (!pp->phy_dev) -- return -ENODEV; -- -- return phy_ethtool_gset(pp->phy_dev, cmd); -+ return phylink_ethtool_get_settings(pp->phylink, cmd); - } - - /* Set settings (phy address, speed) for ethtools */ - int mvneta_ethtool_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) - { - struct mvneta_port *pp = netdev_priv(dev); -- struct phy_device *phydev = pp->phy_dev; -- -- if (!phydev) -- return -ENODEV; - -- if ((cmd->autoneg == AUTONEG_ENABLE) != pp->use_inband_status) { -- u32 val; -- -- mvneta_set_autoneg(pp, cmd->autoneg == AUTONEG_ENABLE); -- -- if (cmd->autoneg == AUTONEG_DISABLE) { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED | -- MVNETA_GMAC_CONFIG_GMII_SPEED | -- MVNETA_GMAC_CONFIG_FULL_DUPLEX); -- -- if (phydev->duplex) -- val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; -- -- if (phydev->speed == SPEED_1000) -- val |= MVNETA_GMAC_CONFIG_GMII_SPEED; -- else if (phydev->speed == SPEED_100) -- val |= MVNETA_GMAC_CONFIG_MII_SPEED; -- -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- } -- -- pp->use_inband_status = (cmd->autoneg == AUTONEG_ENABLE); -- netdev_info(pp->dev, "autoneg status set to %i\n", -- pp->use_inband_status); -- -- if (netif_running(dev)) { -- mvneta_port_down(pp); -- mvneta_port_up(pp); -- } -- } -- -- return phy_ethtool_sset(pp->phy_dev, cmd); -+ return phylink_ethtool_set_settings(pp->phylink, cmd); - } - - /* Set interrupt coalescing for ethtools */ -@@ -3673,7 +3694,8 @@ static void mvneta_ethtool_update_stats( - { - const struct mvneta_statistic *s; - void __iomem *base = pp->base; -- u32 high, low, val; -+ u32 high, low; -+ u64 val; - u64 val64; - int i; - -@@ -3968,14 +3990,13 @@ static int mvneta_probe(struct platform_ - const struct mbus_dram_target_info *dram_target_info; - struct resource *res; - struct device_node *dn = pdev->dev.of_node; -- struct device_node *phy_node; - struct device_node *bm_node; - struct mvneta_port *pp; - struct net_device *dev; -+ struct phylink *phylink; - const char *dt_mac_addr; - char hw_mac_addr[ETH_ALEN]; - const char *mac_from; -- const char *managed; - int tx_csum_limit; - int phy_mode; - int err; -@@ -3991,31 +4012,11 @@ static int mvneta_probe(struct platform_ - goto err_free_netdev; - } - -- phy_node = of_parse_phandle(dn, "phy", 0); -- if (!phy_node) { -- if (!of_phy_is_fixed_link(dn)) { -- dev_err(&pdev->dev, "no PHY specified\n"); -- err = -ENODEV; -- goto err_free_irq; -- } -- -- err = of_phy_register_fixed_link(dn); -- if (err < 0) { -- dev_err(&pdev->dev, "cannot register fixed PHY\n"); -- goto err_free_irq; -- } -- -- /* In the case of a fixed PHY, the DT node associated -- * to the PHY is the Ethernet MAC DT node. -- */ -- phy_node = of_node_get(dn); -- } -- - phy_mode = of_get_phy_mode(dn); - if (phy_mode < 0) { - dev_err(&pdev->dev, "incorrect phy-mode\n"); - err = -EINVAL; -- goto err_put_phy_node; -+ goto err_free_irq; - } - - dev->tx_queue_len = MVNETA_MAX_TXD; -@@ -4026,12 +4027,7 @@ static int mvneta_probe(struct platform_ - - pp = netdev_priv(dev); - spin_lock_init(&pp->lock); -- pp->phy_node = phy_node; -- pp->phy_interface = phy_mode; -- -- err = of_property_read_string(dn, "managed", &managed); -- pp->use_inband_status = (err == 0 && -- strcmp(managed, "in-band-status") == 0); -+ pp->dn = dn; - pp->cpu_notifier.notifier_call = mvneta_percpu_notifier; - - pp->rxq_def = rxq_def; -@@ -4041,7 +4037,7 @@ static int mvneta_probe(struct platform_ - pp->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(pp->clk)) { - err = PTR_ERR(pp->clk); -- goto err_put_phy_node; -+ goto err_free_irq; - } - - clk_prepare_enable(pp->clk); -@@ -4144,6 +4140,14 @@ static int mvneta_probe(struct platform_ - dev->priv_flags |= IFF_UNICAST_FLT | IFF_LIVE_ADDR_CHANGE; - dev->gso_max_segs = MVNETA_MAX_TSO_SEGS; - -+ phylink = phylink_create(dev, dn, phy_mode, &mvneta_phylink_ops); -+ if (IS_ERR(phylink)) { -+ err = PTR_ERR(phylink); -+ goto err_free_stats; -+ } -+ -+ pp->phylink = phylink; -+ - err = register_netdev(dev); - if (err < 0) { - dev_err(&pdev->dev, "failed to register\n"); -@@ -4155,13 +4159,6 @@ static int mvneta_probe(struct platform_ - - platform_set_drvdata(pdev, pp->dev); - -- if (pp->use_inband_status) { -- struct phy_device *phy = of_phy_find_device(dn); -- -- mvneta_fixed_link_update(pp, phy); -- -- put_device(&phy->dev); -- } - - return 0; - -@@ -4173,13 +4170,13 @@ err_netdev: - 1 << pp->id); - } - err_free_stats: -+ if (pp->phylink) -+ phylink_destroy(pp->phylink); - free_percpu(pp->stats); - err_free_ports: - free_percpu(pp->ports); - err_clk: - clk_disable_unprepare(pp->clk); --err_put_phy_node: -- of_node_put(phy_node); - err_free_irq: - irq_dispose_mapping(dev->irq); - err_free_netdev: -@@ -4198,7 +4195,7 @@ static int mvneta_remove(struct platform - free_percpu(pp->ports); - free_percpu(pp->stats); - irq_dispose_mapping(dev->irq); -- of_node_put(pp->phy_node); -+ phylink_destroy(pp->phylink); - free_netdev(dev); - - if (pp->bm_priv) { diff --git a/target/linux/mvebu/patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch b/target/linux/mvebu/patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch deleted file mode 100644 index 58c9aab4a..000000000 --- a/target/linux/mvebu/patches-4.4/135-phy-fixed-phy-remove-fixed_phy_update_state.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 9be436bdb67c1f4aa9f33f2477f94e1f58a0ff02 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Fri, 2 Oct 2015 22:46:54 +0100 -Subject: [PATCH 723/744] phy: fixed-phy: remove fixed_phy_update_state() - -mvneta is the only user of fixed_phy_update_state(), which has been -converted to use phylink instead. Remove fixed_phy_update_state(). - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/fixed_phy.c | 31 ------------------------------- - include/linux/phy_fixed.h | 9 --------- - 2 files changed, 40 deletions(-) - ---- a/drivers/net/phy/fixed_phy.c -+++ b/drivers/net/phy/fixed_phy.c -@@ -115,37 +115,6 @@ int fixed_phy_set_link_update(struct phy - } - EXPORT_SYMBOL_GPL(fixed_phy_set_link_update); - --int fixed_phy_update_state(struct phy_device *phydev, -- const struct fixed_phy_status *status, -- const struct fixed_phy_status *changed) --{ -- struct fixed_mdio_bus *fmb = &platform_fmb; -- struct fixed_phy *fp; -- -- if (!phydev || phydev->bus != fmb->mii_bus) -- return -EINVAL; -- -- list_for_each_entry(fp, &fmb->phys, node) { -- if (fp->addr == phydev->addr) { -- write_seqcount_begin(&fp->seqcount); --#define _UPD(x) if (changed->x) \ -- fp->status.x = status->x -- _UPD(link); -- _UPD(speed); -- _UPD(duplex); -- _UPD(pause); -- _UPD(asym_pause); --#undef _UPD -- fixed_phy_update(fp); -- write_seqcount_end(&fp->seqcount); -- return 0; -- } -- } -- -- return -ENOENT; --} --EXPORT_SYMBOL(fixed_phy_update_state); -- - int fixed_phy_add(unsigned int irq, int phy_addr, - struct fixed_phy_status *status, - int link_gpio) ---- a/include/linux/phy_fixed.h -+++ b/include/linux/phy_fixed.h -@@ -23,9 +23,6 @@ extern void fixed_phy_del(int phy_addr); - extern int fixed_phy_set_link_update(struct phy_device *phydev, - int (*link_update)(struct net_device *, - struct fixed_phy_status *)); --extern int fixed_phy_update_state(struct phy_device *phydev, -- const struct fixed_phy_status *status, -- const struct fixed_phy_status *changed); - #else - static inline int fixed_phy_add(unsigned int irq, int phy_id, - struct fixed_phy_status *status, -@@ -50,12 +47,6 @@ static inline int fixed_phy_set_link_upd - { - return -ENODEV; - } --static inline int fixed_phy_update_state(struct phy_device *phydev, -- const struct fixed_phy_status *status, -- const struct fixed_phy_status *changed) --{ -- return -ENODEV; --} - #endif /* CONFIG_FIXED_PHY */ - - #endif /* __PHY_FIXED_H */ diff --git a/target/linux/mvebu/patches-4.4/136-phylink-add-ethtool-nway_reset-support.patch b/target/linux/mvebu/patches-4.4/136-phylink-add-ethtool-nway_reset-support.patch deleted file mode 100644 index ade904eeb..000000000 --- a/target/linux/mvebu/patches-4.4/136-phylink-add-ethtool-nway_reset-support.patch +++ /dev/null @@ -1,48 +0,0 @@ -From d6bd25b692378ec17bdb1023d398c03c45829947 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 20:27:19 +0100 -Subject: [PATCH 724/744] phylink: add ethtool nway_reset support - -Add ethtool nway_reset support to phylink, to allow userspace to -request a re-negotiation of the link. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 14 ++++++++++++++ - include/linux/phylink.h | 1 + - 2 files changed, 15 insertions(+) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -687,6 +687,20 @@ int phylink_ethtool_set_settings(struct - } - EXPORT_SYMBOL_GPL(phylink_ethtool_set_settings); - -+int phylink_ethtool_nway_reset(struct phylink *pl) -+{ -+ int ret = 0; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = genphy_restart_aneg(pl->phydev); -+ phylink_mac_an_restart(pl); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); -+ - /* This emulates MII registers for a fixed-mode phy operating as per the - * passed in state. "aneg" defines if we report negotiation is possible. - * ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -65,6 +65,7 @@ void phylink_stop(struct phylink *); - - int phylink_ethtool_get_settings(struct phylink *, struct ethtool_cmd *); - int phylink_ethtool_set_settings(struct phylink *, struct ethtool_cmd *); -+int phylink_ethtool_nway_reset(struct phylink *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - - void phylink_set_link_port(struct phylink *pl, u32 support, u8 port); diff --git a/target/linux/mvebu/patches-4.4/137-net-mvneta-add-nway_reset-support.patch b/target/linux/mvebu/patches-4.4/137-net-mvneta-add-nway_reset-support.patch deleted file mode 100644 index 034b59643..000000000 --- a/target/linux/mvebu/patches-4.4/137-net-mvneta-add-nway_reset-support.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 244bee2889d08f876c64c335765a8ea6de0f5381 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 19:40:31 +0100 -Subject: [PATCH 725/744] net: mvneta: add nway_reset support - -Add ethtool nway_reset support to mvneta via phylink, so that userspace -can request the link in whatever mode to be renegotiated via -ethtool -r ethX. - -Signed-off-by: Russell King ---- - drivers/net/ethernet/marvell/mvneta.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3589,6 +3589,13 @@ int mvneta_ethtool_set_settings(struct n - return phylink_ethtool_set_settings(pp->phylink, cmd); - } - -+static int mvneta_ethtool_nway_reset(struct net_device *dev) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_nway_reset(pp->phylink); -+} -+ - /* Set interrupt coalescing for ethtools */ - static int mvneta_ethtool_set_coalesce(struct net_device *dev, - struct ethtool_coalesce *c) -@@ -3853,6 +3860,7 @@ const struct ethtool_ops mvneta_eth_tool - .get_link = ethtool_op_get_link, - .get_settings = mvneta_ethtool_get_settings, - .set_settings = mvneta_ethtool_set_settings, -+ .nway_reset = mvneta_ethtool_nway_reset, - .set_coalesce = mvneta_ethtool_set_coalesce, - .get_coalesce = mvneta_ethtool_get_coalesce, - .get_drvinfo = mvneta_ethtool_get_drvinfo, diff --git a/target/linux/mvebu/patches-4.4/138-phylink-add-flow-control-support.patch b/target/linux/mvebu/patches-4.4/138-phylink-add-flow-control-support.patch deleted file mode 100644 index 95b8a8194..000000000 --- a/target/linux/mvebu/patches-4.4/138-phylink-add-flow-control-support.patch +++ /dev/null @@ -1,262 +0,0 @@ -From f566177aa6661e646b83526f24391a568ffd1a75 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 20:32:07 +0100 -Subject: [PATCH 726/744] phylink: add flow control support - -Add flow control support, including ethtool support, to phylink. We -add support to allow ethtool to get and set the current flow control -settings, and the 802.3 specified resolution for the local and remote -link partner abilities. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 145 +++++++++++++++++++++++++++++++++++++++++----- - include/linux/phylink.h | 8 +++ - 2 files changed, 139 insertions(+), 14 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -91,10 +91,12 @@ static int phylink_parse_fixedlink(struc - pl->link_config.an_complete = 1; - pl->link_config.speed = speed; - pl->link_config.duplex = DUPLEX_HALF; -- pl->link_config.pause = MLO_PAUSE_NONE; - - if (of_property_read_bool(fixed_node, "full-duplex")) - pl->link_config.duplex = DUPLEX_FULL; -+ -+ /* We treat the "pause" and "asym-pause" terminology as -+ * defining the link partner's ability. */ - if (of_property_read_bool(fixed_node, "pause")) - pl->link_config.pause |= MLO_PAUSE_SYM; - if (of_property_read_bool(fixed_node, "asym-pause")) -@@ -118,7 +120,6 @@ static int phylink_parse_fixedlink(struc - pl->link_config.duplex = be32_to_cpu(fixed_prop[1]) ? - DUPLEX_FULL : DUPLEX_HALF; - pl->link_config.speed = be32_to_cpu(fixed_prop[2]); -- pl->link_config.pause = MLO_PAUSE_NONE; - if (be32_to_cpu(fixed_prop[3])) - pl->link_config.pause |= MLO_PAUSE_SYM; - if (be32_to_cpu(fixed_prop[4])) -@@ -130,16 +131,6 @@ static int phylink_parse_fixedlink(struc - } - - if (pl->link_an_mode == MLO_AN_FIXED) { -- /* Generate the supported/advertising masks */ -- if (pl->link_config.pause & MLO_PAUSE_SYM) { -- pl->link_config.supported |= SUPPORTED_Pause; -- pl->link_config.advertising |= ADVERTISED_Pause; -- } -- if (pl->link_config.pause & MLO_PAUSE_ASYM) { -- pl->link_config.supported |= SUPPORTED_Asym_Pause; -- pl->link_config.advertising |= ADVERTISED_Asym_Pause; -- } -- - if (pl->link_config.speed > SPEED_1000 && - pl->link_config.duplex != DUPLEX_FULL) - netdev_warn(pl->netdev, "fixed link specifies half duplex for %dMbps link?\n", -@@ -242,6 +233,56 @@ static void phylink_get_fixed_state(stru - state->link = !!gpiod_get_value(pl->link_gpio); - } - -+/* Flow control is resolved according to our and the link partners -+ * advertisments using the following drawn from the 802.3 specs: -+ * Local device Link partner -+ * Pause AsymDir Pause AsymDir Result -+ * 1 X 1 X TX+RX -+ * 0 1 1 1 RX -+ * 1 1 0 1 TX -+ */ -+static void phylink_resolve_flow(struct phylink *pl, -+ struct phylink_link_state *state) -+{ -+ int new_pause = 0; -+ -+ if (pl->link_config.pause & MLO_PAUSE_AN) { -+ int pause = 0; -+ -+ if (pl->link_config.advertising & ADVERTISED_Pause) -+ pause |= MLO_PAUSE_SYM; -+ if (pl->link_config.advertising & ADVERTISED_Asym_Pause) -+ pause |= MLO_PAUSE_ASYM; -+ -+ pause &= state->pause; -+ -+ if (pause & MLO_PAUSE_SYM) -+ new_pause = MLO_PAUSE_TX | MLO_PAUSE_RX; -+ else if (pause & MLO_PAUSE_ASYM) -+ new_pause = state->pause & MLO_PAUSE_SYM ? -+ MLO_PAUSE_RX : MLO_PAUSE_TX; -+ } else { -+ new_pause = pl->link_config.pause & MLO_PAUSE_TXRX_MASK; -+ } -+ -+ state->pause &= ~MLO_PAUSE_TXRX_MASK; -+ state->pause |= new_pause; -+} -+ -+static const char *phylink_pause_to_str(int pause) -+{ -+ switch (pause & MLO_PAUSE_TXRX_MASK) { -+ case MLO_PAUSE_TX | MLO_PAUSE_RX: -+ return "rx/tx"; -+ case MLO_PAUSE_TX: -+ return "tx"; -+ case MLO_PAUSE_RX: -+ return "rx"; -+ default: -+ return "off"; -+ } -+} -+ - extern const char *phy_speed_to_str(int speed); - - static void phylink_resolve(struct work_struct *w) -@@ -257,6 +298,7 @@ static void phylink_resolve(struct work_ - switch (pl->link_an_mode) { - case MLO_AN_PHY: - link_state = pl->phy_state; -+ phylink_resolve_flow(pl, &link_state); - break; - - case MLO_AN_FIXED: -@@ -265,9 +307,12 @@ static void phylink_resolve(struct work_ - - case MLO_AN_SGMII: - phylink_get_mac_state(pl, &link_state); -- if (pl->phydev) -+ if (pl->phydev) { - link_state.link = link_state.link && - pl->phy_state.link; -+ link_state.pause |= pl->phy_state.pause; -+ phylink_resolve_flow(pl, &link_state); -+ } - break; - - case MLO_AN_8023Z: -@@ -297,7 +342,7 @@ static void phylink_resolve(struct work_ - "Link is Up - %s/%s - flow control %s\n", - phy_speed_to_str(link_state.speed), - link_state.duplex ? "Full" : "Half", -- link_state.pause ? "rx/tx" : "off"); -+ phylink_pause_to_str(link_state.pause)); - } - } - mutex_unlock(&pl->state_mutex); -@@ -326,6 +371,7 @@ struct phylink *phylink_create(struct ne - pl->link_interface = iface; - pl->link_port_support = SUPPORTED_MII; - pl->link_port = PORT_MII; -+ pl->link_config.pause = MLO_PAUSE_AN; - pl->ops = ops; - __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); - -@@ -507,6 +553,7 @@ void phylink_start(struct phylink *pl) - * a fixed-link to start with the correct parameters, and also - * ensures that we set the appropriate advertisment for Serdes links. - */ -+ phylink_resolve_flow(pl, &pl->link_config); - phylink_mac_config(pl, &pl->link_config); - - clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -@@ -701,6 +748,76 @@ int phylink_ethtool_nway_reset(struct ph - } - EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); - -+void phylink_ethtool_get_pauseparam(struct phylink *pl, -+ struct ethtool_pauseparam *pause) -+{ -+ mutex_lock(&pl->config_mutex); -+ -+ pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); -+ pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); -+ pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); -+ -+static int __phylink_ethtool_set_pauseparam(struct phylink *pl, -+ struct ethtool_pauseparam *pause) -+{ -+ struct phylink_link_state *config = &pl->link_config; -+ -+ if (!(config->supported & (SUPPORTED_Pause | SUPPORTED_Asym_Pause))) -+ return -EOPNOTSUPP; -+ -+ if (!(config->supported & SUPPORTED_Asym_Pause) && -+ !pause->autoneg && pause->rx_pause != pause->tx_pause) -+ return -EINVAL; -+ -+ config->pause &= ~(MLO_PAUSE_AN | MLO_PAUSE_TXRX_MASK); -+ -+ if (pause->autoneg) -+ config->pause |= MLO_PAUSE_AN; -+ if (pause->rx_pause) -+ config->pause |= MLO_PAUSE_RX; -+ if (pause->tx_pause) -+ config->pause |= MLO_PAUSE_TX; -+ -+ switch (pl->link_an_mode) { -+ case MLO_AN_PHY: -+ /* Silently mark the carrier down, and then trigger a resolve */ -+ netif_carrier_off(pl->netdev); -+ phylink_run_resolve(pl); -+ break; -+ -+ case MLO_AN_FIXED: -+ /* Should we allow fixed links to change against the config? */ -+ phylink_resolve_flow(pl, config); -+ phylink_mac_config(pl, config); -+ break; -+ -+ case MLO_AN_SGMII: -+ case MLO_AN_8023Z: -+ phylink_mac_config(pl, config); -+ phylink_mac_an_restart(pl); -+ break; -+ } -+ -+ return 0; -+} -+ -+int phylink_ethtool_set_pauseparam(struct phylink *pl, -+ struct ethtool_pauseparam *pause) -+{ -+ int ret; -+ -+ mutex_lock(&pl->config_mutex); -+ ret = __phylink_ethtool_set_pauseparam(pl, pause); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); -+ - /* This emulates MII registers for a fixed-mode phy operating as per the - * passed in state. "aneg" defines if we report negotiation is possible. - * ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -13,6 +13,10 @@ enum { - MLO_PAUSE_NONE, - MLO_PAUSE_ASYM = BIT(0), - MLO_PAUSE_SYM = BIT(1), -+ MLO_PAUSE_RX = BIT(2), -+ MLO_PAUSE_TX = BIT(3), -+ MLO_PAUSE_TXRX_MASK = MLO_PAUSE_TX | MLO_PAUSE_RX, -+ MLO_PAUSE_AN = BIT(4), - - MLO_AN_PHY = 0, - MLO_AN_FIXED, -@@ -66,6 +70,10 @@ void phylink_stop(struct phylink *); - int phylink_ethtool_get_settings(struct phylink *, struct ethtool_cmd *); - int phylink_ethtool_set_settings(struct phylink *, struct ethtool_cmd *); - int phylink_ethtool_nway_reset(struct phylink *); -+void phylink_ethtool_get_pauseparam(struct phylink *, -+ struct ethtool_pauseparam *); -+int phylink_ethtool_set_pauseparam(struct phylink *, -+ struct ethtool_pauseparam *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - - void phylink_set_link_port(struct phylink *pl, u32 support, u8 port); diff --git a/target/linux/mvebu/patches-4.4/139-net-mvneta-add-flow-control-support-via-phylink.patch b/target/linux/mvebu/patches-4.4/139-net-mvneta-add-flow-control-support-via-phylink.patch deleted file mode 100644 index 75cd46e3d..000000000 --- a/target/linux/mvebu/patches-4.4/139-net-mvneta-add-flow-control-support-via-phylink.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 7bd34822b9922beb22a6384d9190646105d259d8 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 17:41:44 +0100 -Subject: [PATCH 727/744] net: mvneta: add flow control support via phylink - -Add flow control support to mvneta, including the ethtool hooks. This -uses the phylink code to calculate the result of autonegotiation where -a phy is attached, and to handle the ethtool settings. - -Signed-off-by: Russell King ---- - drivers/net/ethernet/marvell/mvneta.c | 22 +++++++++++++++++++++- - 1 file changed, 21 insertions(+), 1 deletion(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3208,6 +3208,8 @@ static void mvneta_mac_config(struct net - - if (state->advertising & ADVERTISED_Pause) - new_an |= MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL; -+ if (state->pause & MLO_PAUSE_TXRX_MASK) -+ new_an |= MVNETA_GMAC_CONFIG_FLOW_CTRL; - - switch (mode) { - case MLO_AN_SGMII: -@@ -3232,7 +3234,7 @@ static void mvneta_mac_config(struct net - /* The MAC only supports FD mode */ - MVNETA_GMAC_CONFIG_FULL_DUPLEX; - -- if (state->an_enabled) -+ if (state->pause & MLO_PAUSE_AN && state->an_enabled) - new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN; - break; - -@@ -3685,6 +3687,22 @@ static int mvneta_ethtool_set_ringparam( - return 0; - } - -+static void mvneta_ethtool_get_pauseparam(struct net_device *dev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ phylink_ethtool_get_pauseparam(pp->phylink, pause); -+} -+ -+static int mvneta_ethtool_set_pauseparam(struct net_device *dev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_set_pauseparam(pp->phylink, pause); -+} -+ - static void mvneta_ethtool_get_strings(struct net_device *netdev, u32 sset, - u8 *data) - { -@@ -3866,6 +3884,8 @@ const struct ethtool_ops mvneta_eth_tool - .get_drvinfo = mvneta_ethtool_get_drvinfo, - .get_ringparam = mvneta_ethtool_get_ringparam, - .set_ringparam = mvneta_ethtool_set_ringparam, -+ .get_pauseparam = mvneta_ethtool_get_pauseparam, -+ .set_pauseparam = mvneta_ethtool_set_pauseparam, - .get_strings = mvneta_ethtool_get_strings, - .get_ethtool_stats = mvneta_ethtool_get_stats, - .get_sset_count = mvneta_ethtool_get_sset_count, diff --git a/target/linux/mvebu/patches-4.4/140-net-mvneta-enable-flow-control-for-PHY-connections.patch b/target/linux/mvebu/patches-4.4/140-net-mvneta-enable-flow-control-for-PHY-connections.patch deleted file mode 100644 index e10574c75..000000000 --- a/target/linux/mvebu/patches-4.4/140-net-mvneta-enable-flow-control-for-PHY-connections.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 62f8a12044265df11531750a240e516a5f1ff433 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 00:34:08 +0100 -Subject: [PATCH 728/744] net: mvneta: enable flow control for PHY connections - -Enable flow control support for PHY connections by indicating our -support via the ethtool capabilities. phylink takes care of the -appropriate handling. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/ethernet/marvell/mvneta.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3127,12 +3127,14 @@ static int mvneta_mac_support(struct net - state->supported = PHY_10BT_FEATURES | - PHY_100BT_FEATURES | - SUPPORTED_1000baseT_Full | -+ SUPPORTED_Pause | - SUPPORTED_Autoneg; - state->advertising = ADVERTISED_10baseT_Half | - ADVERTISED_10baseT_Full | - ADVERTISED_100baseT_Half | - ADVERTISED_100baseT_Full | - ADVERTISED_1000baseT_Full | -+ ADVERTISED_Pause | - ADVERTISED_Autoneg; - state->an_enabled = 1; - break; diff --git a/target/linux/mvebu/patches-4.4/141-net-mvneta-enable-flow-control-for-fixed-connections.patch b/target/linux/mvebu/patches-4.4/141-net-mvneta-enable-flow-control-for-fixed-connections.patch deleted file mode 100644 index 16ffab3d4..000000000 --- a/target/linux/mvebu/patches-4.4/141-net-mvneta-enable-flow-control-for-fixed-connections.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 4c3e2dc08a11fb1273ca62467f1d06e59866bad3 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 12 Jul 2016 00:04:13 +0100 -Subject: [PATCH 729/744] net: mvneta: enable flow control for fixed - connections - -Allow symetric flow control to be enabled for fixed link connections as -well as other types of connections by setting the supported and -advertised capability bits. - -Signed-off-by: Russell King ---- - drivers/net/ethernet/marvell/mvneta.c | 11 +++++++---- - 1 file changed, 7 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3114,9 +3114,9 @@ static int mvneta_mac_support(struct net - switch (mode) { - case MLO_AN_8023Z: - state->supported = SUPPORTED_1000baseT_Full | -- SUPPORTED_Autoneg | SUPPORTED_Pause; -+ SUPPORTED_Autoneg; - state->advertising = ADVERTISED_1000baseT_Full | -- ADVERTISED_Autoneg | ADVERTISED_Pause; -+ ADVERTISED_Autoneg; - state->an_enabled = 1; - break; - -@@ -3127,18 +3127,21 @@ static int mvneta_mac_support(struct net - state->supported = PHY_10BT_FEATURES | - PHY_100BT_FEATURES | - SUPPORTED_1000baseT_Full | -- SUPPORTED_Pause | - SUPPORTED_Autoneg; - state->advertising = ADVERTISED_10baseT_Half | - ADVERTISED_10baseT_Full | - ADVERTISED_100baseT_Half | - ADVERTISED_100baseT_Full | - ADVERTISED_1000baseT_Full | -- ADVERTISED_Pause | - ADVERTISED_Autoneg; - state->an_enabled = 1; - break; - } -+ -+ /* All modes support flow control */ -+ state->supported |= SUPPORTED_Pause; -+ state->advertising |= ADVERTISED_Pause; -+ - return 0; - } - diff --git a/target/linux/mvebu/patches-4.4/142-phylink-add-EEE-support.patch b/target/linux/mvebu/patches-4.4/142-phylink-add-EEE-support.patch deleted file mode 100644 index b06ec76b9..000000000 --- a/target/linux/mvebu/patches-4.4/142-phylink-add-EEE-support.patch +++ /dev/null @@ -1,111 +0,0 @@ -From ffba226d73a2be262fff12d30aecf76d107b2ace Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 21:19:53 +0100 -Subject: [PATCH 730/744] phylink: add EEE support - -Add EEE hooks to phylink to allow the phylib EEE functions for the -connected phy to be safely accessed. - -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++- - include/linux/phylink.h | 7 +++++- - 2 files changed, 63 insertions(+), 2 deletions(-) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -334,7 +334,8 @@ static void phylink_resolve(struct work_ - if (pl->phydev) - phylink_mac_config(pl, &link_state); - -- pl->ops->mac_link_up(ndev, pl->link_an_mode); -+ pl->ops->mac_link_up(ndev, pl->link_an_mode, -+ pl->phydev); - - netif_carrier_on(ndev); - -@@ -818,6 +819,61 @@ int phylink_ethtool_set_pauseparam(struc - } - EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); - -+int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) -+{ -+ int ret = -EPROTONOSUPPORT; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = phy_init_eee(pl->phydev, clk_stop_enable); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_init_eee); -+ -+int phylink_get_eee_err(struct phylink *pl) -+{ -+ int ret = 0; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = phy_get_eee_err(pl->phydev); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_get_eee_err); -+ -+int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = phy_ethtool_get_eee(pl->phydev, eee); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); -+ -+int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) { -+ ret = phy_ethtool_set_eee(pl->phydev, eee); -+ if (ret == 0 && eee->eee_enabled) -+ phy_start_aneg(pl->phydev); -+ } -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); -+ - /* This emulates MII registers for a fixed-mode phy operating as per the - * passed in state. "aneg" defines if we report negotiation is possible. - * ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -51,7 +51,8 @@ struct phylink_mac_ops { - void (*mac_an_restart)(struct net_device *, unsigned int mode); - - void (*mac_link_down)(struct net_device *, unsigned int mode); -- void (*mac_link_up)(struct net_device *, unsigned int mode); -+ void (*mac_link_up)(struct net_device *, unsigned int mode, -+ struct phy_device *); - }; - - struct phylink *phylink_create(struct net_device *, struct device_node *, -@@ -74,6 +75,10 @@ void phylink_ethtool_get_pauseparam(stru - struct ethtool_pauseparam *); - int phylink_ethtool_set_pauseparam(struct phylink *, - struct ethtool_pauseparam *); -+int phylink_init_eee(struct phylink *, bool); -+int phylink_get_eee_err(struct phylink *); -+int phylink_ethtool_get_eee(struct phylink *, struct ethtool_eee *); -+int phylink_ethtool_set_eee(struct phylink *, struct ethtool_eee *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - - void phylink_set_link_port(struct phylink *pl, u32 support, u8 port); diff --git a/target/linux/mvebu/patches-4.4/143-net-mvneta-add-EEE-support.patch b/target/linux/mvebu/patches-4.4/143-net-mvneta-add-EEE-support.patch deleted file mode 100644 index b9043561d..000000000 --- a/target/linux/mvebu/patches-4.4/143-net-mvneta-add-EEE-support.patch +++ /dev/null @@ -1,182 +0,0 @@ -From b7dacf514e41d6efff0ccc170f660cc6dc2aeae2 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Tue, 29 Sep 2015 15:17:39 +0100 -Subject: [PATCH 731/744] net: mvneta: add EEE support - -Add EEE support to mvneta. This allows us to enable the low power idle -support at MAC level if there is a PHY attached through phylink which -supports LPI. The appropriate ethtool support is provided to allow the -feature to be controlled, including ethtool statistics for EEE wakeup -errors. - -Signed-off-by: Russell King ---- - drivers/net/ethernet/marvell/mvneta.c | 87 +++++++++++++++++++++++++++++++++++ - 1 file changed, 87 insertions(+) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -243,6 +243,12 @@ - #define MVNETA_TXQ_TOKEN_SIZE_REG(q) (0x3e40 + ((q) << 2)) - #define MVNETA_TXQ_TOKEN_SIZE_MAX 0x7fffffff - -+#define MVNETA_LPI_CTRL_0 0x2cc0 -+#define MVNETA_LPI_CTRL_1 0x2cc4 -+#define MVNETA_LPI_REQUEST_ENABLE BIT(0) -+#define MVNETA_LPI_CTRL_2 0x2cc8 -+#define MVNETA_LPI_STATUS 0x2ccc -+ - #define MVNETA_CAUSE_TXQ_SENT_DESC_ALL_MASK 0xff - - /* Descriptor ring Macros */ -@@ -316,6 +322,11 @@ - #define MVNETA_RX_GET_BM_POOL_ID(rxd) \ - (((rxd)->status & MVNETA_RXD_BM_POOL_MASK) >> MVNETA_RXD_BM_POOL_SHIFT) - -+enum { -+ ETHTOOL_STAT_EEE_WAKEUP, -+ ETHTOOL_MAX_STATS, -+}; -+ - struct mvneta_statistic { - unsigned short offset; - unsigned short type; -@@ -324,6 +335,7 @@ struct mvneta_statistic { - - #define T_REG_32 32 - #define T_REG_64 64 -+#define T_SW 1 - - static const struct mvneta_statistic mvneta_statistics[] = { - { 0x3000, T_REG_64, "good_octets_received", }, -@@ -358,6 +370,7 @@ static const struct mvneta_statistic mvn - { 0x304c, T_REG_32, "broadcast_frames_sent", }, - { 0x3054, T_REG_32, "fc_sent", }, - { 0x300c, T_REG_32, "internal_mac_transmit_err", }, -+ { ETHTOOL_STAT_EEE_WAKEUP, T_SW, "eee_wakeup_errors", }, - }; - - struct mvneta_pcpu_stats { -@@ -413,6 +426,10 @@ struct mvneta_port { - struct mvneta_bm_pool *pool_short; - int bm_win_id; - -+ bool eee_enabled; -+ bool eee_active; -+ bool tx_lpi_enabled; -+ - u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)]; - - u32 indir[MVNETA_RSS_LU_TABLE_SIZE]; -@@ -3276,6 +3293,18 @@ static void mvneta_mac_config(struct net - mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, new_an); - } - -+static void mvneta_set_eee(struct mvneta_port *pp, bool enable) -+{ -+ u32 lpi_ctl1; -+ -+ lpi_ctl1 = mvreg_read(pp, MVNETA_LPI_CTRL_1); -+ if (enable) -+ lpi_ctl1 |= MVNETA_LPI_REQUEST_ENABLE; -+ else -+ lpi_ctl1 &= ~MVNETA_LPI_REQUEST_ENABLE; -+ mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi_ctl1); -+} -+ - static void mvneta_mac_link_down(struct net_device *ndev, unsigned int mode) - { - struct mvneta_port *pp = netdev_priv(ndev); -@@ -3289,6 +3318,9 @@ static void mvneta_mac_link_down(struct - val |= MVNETA_GMAC_FORCE_LINK_DOWN; - mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); - } -+ -+ pp->eee_active = false; -+ mvneta_set_eee(pp, false); - } - - static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode, -@@ -3305,6 +3337,11 @@ static void mvneta_mac_link_up(struct ne - } - - mvneta_port_up(pp); -+ -+ if (phy && pp->eee_enabled) { -+ pp->eee_active = phy_init_eee(phy, 0) >= 0; -+ mvneta_set_eee(pp, pp->eee_active && pp->tx_lpi_enabled); -+ } - } - - static const struct phylink_mac_ops mvneta_phylink_ops = { -@@ -3744,6 +3781,13 @@ static void mvneta_ethtool_update_stats( - val64 = (u64)high << 32 | low; - pp->ethtool_stats[i] += val64; - break; -+ case T_SW: -+ switch (s->offset) { -+ case ETHTOOL_STAT_EEE_WAKEUP: -+ val = phylink_get_eee_err(pp->phylink); -+ break; -+ } -+ break; - } - } - } -@@ -3867,6 +3911,47 @@ static int mvneta_ethtool_get_rxfh(struc - return 0; - } - -+static int mvneta_ethtool_get_eee(struct net_device *dev, -+ struct ethtool_eee *eee) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ u32 lpi_ctl0; -+ -+ lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); -+ -+ eee->eee_enabled = pp->eee_enabled; -+ eee->eee_active = pp->eee_active; -+ eee->tx_lpi_enabled = pp->tx_lpi_enabled; -+ eee->tx_lpi_timer = (lpi_ctl0) >> 8; // * scale; -+ -+ return phylink_ethtool_get_eee(pp->phylink, eee); -+} -+ -+static int mvneta_ethtool_set_eee(struct net_device *dev, -+ struct ethtool_eee *eee) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ u32 lpi_ctl0; -+ -+ /* The Armada 37x documents do not give limits for this other than -+ * it being an 8-bit register. */ -+ if (eee->tx_lpi_enabled && -+ (eee->tx_lpi_timer < 0 || eee->tx_lpi_timer > 255)) -+ return -EINVAL; -+ -+ lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); -+ lpi_ctl0 &= ~(0xff << 8); -+ lpi_ctl0 |= eee->tx_lpi_timer << 8; -+ mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi_ctl0); -+ -+ pp->eee_enabled = eee->eee_enabled; -+ pp->tx_lpi_enabled = eee->tx_lpi_enabled; -+ -+ mvneta_set_eee(pp, eee->tx_lpi_enabled && eee->eee_enabled); -+ -+ return phylink_ethtool_set_eee(pp->phylink, eee); -+} -+ - static const struct net_device_ops mvneta_netdev_ops = { - .ndo_open = mvneta_open, - .ndo_stop = mvneta_stop, -@@ -3898,6 +3983,8 @@ const struct ethtool_ops mvneta_eth_tool - .get_rxnfc = mvneta_ethtool_get_rxnfc, - .get_rxfh = mvneta_ethtool_get_rxfh, - .set_rxfh = mvneta_ethtool_set_rxfh, -+ .get_eee = mvneta_ethtool_get_eee, -+ .set_eee = mvneta_ethtool_set_eee, - }; - - /* Initialize hw */ diff --git a/target/linux/mvebu/patches-4.4/144-phylink-add-module-EEPROM-support.patch b/target/linux/mvebu/patches-4.4/144-phylink-add-module-EEPROM-support.patch deleted file mode 100644 index f57f70dd9..000000000 --- a/target/linux/mvebu/patches-4.4/144-phylink-add-module-EEPROM-support.patch +++ /dev/null @@ -1,137 +0,0 @@ -From 5419ccb638aa5c353ea88815e98953d9fc02e6ca Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 23:10:05 +0100 -Subject: [PATCH 732/744] phylink: add module EEPROM support - -Add support for reading module EEPROMs through phylink. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - drivers/net/phy/phylink.c | 66 +++++++++++++++++++++++++++++++++++++++++++++++ - include/linux/phylink.h | 12 +++++++++ - 2 files changed, 78 insertions(+) - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -60,6 +60,9 @@ struct phylink { - struct work_struct resolve; - - bool mac_link_up; -+ -+ const struct phylink_module_ops *module_ops; -+ void *module_data; - }; - - static const char *phylink_an_mode_str(unsigned int mode) -@@ -819,6 +822,36 @@ int phylink_ethtool_set_pauseparam(struc - } - EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); - -+int phylink_ethtool_get_module_info(struct phylink *pl, -+ struct ethtool_modinfo *modinfo) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->module_ops) -+ ret = pl->module_ops->get_module_info(pl->module_data, -+ modinfo); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_info); -+ -+int phylink_ethtool_get_module_eeprom(struct phylink *pl, -+ struct ethtool_eeprom *ee, u8 *buf) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->module_ops) -+ ret = pl->module_ops->get_module_eeprom(pl->module_data, ee, -+ buf); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_eeprom); -+ - int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) - { - int ret = -EPROTONOSUPPORT; -@@ -1016,6 +1049,39 @@ EXPORT_SYMBOL_GPL(phylink_mii_ioctl); - - - -+int phylink_register_module(struct phylink *pl, void *data, -+ const struct phylink_module_ops *ops) -+{ -+ int ret = -EBUSY; -+ -+ mutex_lock(&pl->config_mutex); -+ if (!pl->module_ops) { -+ pl->module_ops = ops; -+ pl->module_data = data; -+ ret = 0; -+ } -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_register_module); -+ -+int phylink_unregister_module(struct phylink *pl, void *data) -+{ -+ int ret = -EINVAL; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->module_data == data) { -+ pl->module_ops = NULL; -+ pl->module_data = NULL; -+ ret = 0; -+ } -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_unregister_module); -+ - void phylink_disable(struct phylink *pl) - { - set_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -55,6 +55,11 @@ struct phylink_mac_ops { - struct phy_device *); - }; - -+struct phylink_module_ops { -+ int (*get_module_info)(void *, struct ethtool_modinfo *); -+ int (*get_module_eeprom)(void *, struct ethtool_eeprom *, u8 *); -+}; -+ - struct phylink *phylink_create(struct net_device *, struct device_node *, - phy_interface_t iface, const struct phylink_mac_ops *ops); - void phylink_destroy(struct phylink *); -@@ -75,12 +80,19 @@ void phylink_ethtool_get_pauseparam(stru - struct ethtool_pauseparam *); - int phylink_ethtool_set_pauseparam(struct phylink *, - struct ethtool_pauseparam *); -+int phylink_ethtool_get_module_info(struct phylink *, struct ethtool_modinfo *); -+int phylink_ethtool_get_module_eeprom(struct phylink *, -+ struct ethtool_eeprom *, u8 *); - int phylink_init_eee(struct phylink *, bool); - int phylink_get_eee_err(struct phylink *); - int phylink_ethtool_get_eee(struct phylink *, struct ethtool_eee *); - int phylink_ethtool_set_eee(struct phylink *, struct ethtool_eee *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - -+int phylink_register_module(struct phylink *, void *, -+ const struct phylink_module_ops *); -+int phylink_unregister_module(struct phylink *, void *); -+ - void phylink_set_link_port(struct phylink *pl, u32 support, u8 port); - int phylink_set_link_an_mode(struct phylink *pl, unsigned int mode); - void phylink_disable(struct phylink *pl); diff --git a/target/linux/mvebu/patches-4.4/145-net-mvneta-add-module-EEPROM-reading-support.patch b/target/linux/mvebu/patches-4.4/145-net-mvneta-add-module-EEPROM-reading-support.patch deleted file mode 100644 index b3f903908..000000000 --- a/target/linux/mvebu/patches-4.4/145-net-mvneta-add-module-EEPROM-reading-support.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 665e1fe77dedcfc6b5669214ebfd252c803290d4 Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 1 Oct 2015 23:32:39 +0100 -Subject: [PATCH 733/744] net: mvneta: add module EEPROM reading support - -Signed-off-by: Russell King ---- - drivers/net/ethernet/marvell/mvneta.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3911,6 +3911,22 @@ static int mvneta_ethtool_get_rxfh(struc - return 0; - } - -+static int mvneta_ethtool_get_module_info(struct net_device *dev, -+ struct ethtool_modinfo *modinfo) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_get_module_info(pp->phylink, modinfo); -+} -+ -+static int mvneta_ethtool_get_module_eeprom(struct net_device *dev, -+ struct ethtool_eeprom *ee, u8 *buf) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_get_module_eeprom(pp->phylink, ee, buf); -+} -+ - static int mvneta_ethtool_get_eee(struct net_device *dev, - struct ethtool_eee *eee) - { -@@ -3983,6 +3999,8 @@ const struct ethtool_ops mvneta_eth_tool - .get_rxnfc = mvneta_ethtool_get_rxnfc, - .get_rxfh = mvneta_ethtool_get_rxfh, - .set_rxfh = mvneta_ethtool_set_rxfh, -+ .get_module_info = mvneta_ethtool_get_module_info, -+ .get_module_eeprom = mvneta_ethtool_get_module_eeprom, - .get_eee = mvneta_ethtool_get_eee, - .set_eee = mvneta_ethtool_set_eee, - }; diff --git a/target/linux/mvebu/patches-4.4/146-sfp-phylink-hook-up-eeprom-functions.patch b/target/linux/mvebu/patches-4.4/146-sfp-phylink-hook-up-eeprom-functions.patch deleted file mode 100644 index f37e652b8..000000000 --- a/target/linux/mvebu/patches-4.4/146-sfp-phylink-hook-up-eeprom-functions.patch +++ /dev/null @@ -1,68 +0,0 @@ -From a7091ef24223ed39b39c6b73b77c55c8a607f34a Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Thu, 8 Oct 2015 23:49:47 +0100 -Subject: [PATCH 734/744] sfp/phylink: hook up eeprom functions - -Signed-off-by: Russell King ---- - drivers/net/phy/sfp.c | 19 +++++++++++-------- - 1 file changed, 11 insertions(+), 8 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -901,11 +901,9 @@ static void sfp_sm_event(struct sfp *sfp - mutex_unlock(&sfp->sm_mutex); - } - --#if 0 --static int sfp_phy_module_info(struct phy_device *phy, -- struct ethtool_modinfo *modinfo) -+static int sfp_module_info(void *priv, struct ethtool_modinfo *modinfo) - { -- struct sfp *sfp = phy->priv; -+ struct sfp *sfp = priv; - - /* locking... and check module is present */ - -@@ -919,10 +917,9 @@ static int sfp_phy_module_info(struct ph - return 0; - } - --static int sfp_phy_module_eeprom(struct phy_device *phy, -- struct ethtool_eeprom *ee, u8 *data) -+static int sfp_module_eeprom(void *priv, struct ethtool_eeprom *ee, u8 *data) - { -- struct sfp *sfp = phy->priv; -+ struct sfp *sfp = priv; - unsigned int first, last, len; - int ret; - -@@ -953,7 +950,11 @@ static int sfp_phy_module_eeprom(struct - } - return 0; - } --#endif -+ -+static const struct phylink_module_ops sfp_module_ops = { -+ .get_module_info = sfp_module_info, -+ .get_module_eeprom = sfp_module_eeprom, -+}; - - static void sfp_timeout(struct work_struct *work) - { -@@ -1029,6 +1030,7 @@ static int sfp_netdev_notify(struct noti - case NETDEV_UNREGISTER: - if (sfp->mod_phy && sfp->phylink) - phylink_disconnect_phy(sfp->phylink); -+ phylink_unregister_module(sfp->phylink, sfp); - sfp->phylink = NULL; - dev_put(sfp->ndev); - sfp->ndev = NULL; -@@ -1145,6 +1147,7 @@ static int sfp_probe(struct platform_dev - } - - phylink_disable(sfp->phylink); -+ phylink_register_module(sfp->phylink, sfp, &sfp_module_ops); - } - - sfp->state = sfp_get_state(sfp); diff --git a/target/linux/mvebu/patches-4.4/147-net-mvneta-add-BQL-support.patch b/target/linux/mvebu/patches-4.4/147-net-mvneta-add-BQL-support.patch deleted file mode 100644 index 7bd259353..000000000 --- a/target/linux/mvebu/patches-4.4/147-net-mvneta-add-BQL-support.patch +++ /dev/null @@ -1,83 +0,0 @@ ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -1695,8 +1695,10 @@ static struct mvneta_tx_queue *mvneta_tx - - /* Free tx queue skbuffs */ - static void mvneta_txq_bufs_free(struct mvneta_port *pp, -- struct mvneta_tx_queue *txq, int num) -+ struct mvneta_tx_queue *txq, int num, -+ struct netdev_queue *nq) - { -+ unsigned int bytes_compl = 0, pkts_compl = 0; - int i; - - for (i = 0; i < num; i++) { -@@ -1704,6 +1706,11 @@ static void mvneta_txq_bufs_free(struct - txq->txq_get_index; - struct sk_buff *skb = txq->tx_skb[txq->txq_get_index]; - -+ if (skb) { -+ bytes_compl += skb->len; -+ pkts_compl++; -+ } -+ - mvneta_txq_inc_get(txq); - - if (!IS_TSO_HEADER(txq, tx_desc->buf_phys_addr)) -@@ -1714,6 +1721,8 @@ static void mvneta_txq_bufs_free(struct - continue; - dev_kfree_skb_any(skb); - } -+ -+ netdev_tx_completed_queue(nq, pkts_compl, bytes_compl); - } - - /* Handle end of transmission */ -@@ -1727,7 +1736,7 @@ static void mvneta_txq_done(struct mvnet - if (!tx_done) - return; - -- mvneta_txq_bufs_free(pp, txq, tx_done); -+ mvneta_txq_bufs_free(pp, txq, tx_done, nq); - - txq->count -= tx_done; - -@@ -2334,6 +2343,8 @@ out: - struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); - struct netdev_queue *nq = netdev_get_tx_queue(dev, txq_id); - -+ netdev_tx_sent_queue(nq, len); -+ - txq->count += frags; - mvneta_txq_pend_desc_add(pp, txq, frags); - -@@ -2358,9 +2369,10 @@ static void mvneta_txq_done_force(struct - struct mvneta_tx_queue *txq) - - { -+ struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); - int tx_done = txq->count; - -- mvneta_txq_bufs_free(pp, txq, tx_done); -+ mvneta_txq_bufs_free(pp, txq, tx_done, nq); - - /* reset txq */ - txq->count = 0; -@@ -2841,6 +2853,8 @@ static int mvneta_txq_init(struct mvneta - static void mvneta_txq_deinit(struct mvneta_port *pp, - struct mvneta_tx_queue *txq) - { -+ struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); -+ - kfree(txq->tx_skb); - - if (txq->tso_hdrs) -@@ -2852,6 +2866,8 @@ static void mvneta_txq_deinit(struct mvn - txq->size * MVNETA_DESC_ALIGNED_SIZE, - txq->descs, txq->descs_phys); - -+ netdev_tx_reset_queue(nq); -+ - txq->descs = NULL; - txq->last_desc = 0; - txq->next_desc_to_proc = 0; diff --git a/target/linux/mvebu/patches-4.4/202-gpio_mvebu_add_limited_pwm_support.patch b/target/linux/mvebu/patches-4.4/202-gpio_mvebu_add_limited_pwm_support.patch deleted file mode 100644 index b09c89f31..000000000 --- a/target/linux/mvebu/patches-4.4/202-gpio_mvebu_add_limited_pwm_support.patch +++ /dev/null @@ -1,433 +0,0 @@ -Armada 370/XP devices can 'blink' gpio lines with a configurable on -and off period. This can be modelled as a PWM. - -However, there are only two sets of PWM configuration registers for -all the gpio lines. This driver simply allows a single gpio line per -gpio chip of 32 lines to be used as a PWM. Attempts to use more return -EBUSY. - -Due to the interleaving of registers it is not simple to separate the -PWM driver from the gpio driver. Thus the gpio driver has been -extended with a PWM driver. - -Signed-off-by: Andrew Lunn ---- - drivers/gpio/Kconfig | 5 ++ - drivers/gpio/Makefile | 1 + - drivers/gpio/gpio-mvebu-pwm.c | 202 ++++++++++++++++++++++++++++++++++++++++++ - drivers/gpio/gpio-mvebu.c | 37 +++----- - drivers/gpio/gpio-mvebu.h | 79 +++++++++++++++++ - 5 files changed, 299 insertions(+), 25 deletions(-) - create mode 100644 drivers/gpio/gpio-mvebu-pwm.c - create mode 100644 drivers/gpio/gpio-mvebu.h - ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -295,6 +295,11 @@ config GPIO_MVEBU - depends on OF - select GENERIC_IRQ_CHIP - -+config GPIO_MVEBU_PWM -+ def_bool y -+ depends on GPIO_MVEBU -+ depends on PWM -+ - config GPIO_MXC - def_bool y - depends on ARCH_MXC ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -67,6 +67,7 @@ obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc52 - obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o - obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o - obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o -+obj-$(CONFIG_GPIO_MVEBU_PWM) += gpio-mvebu-pwm.o - obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o - obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o - obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o ---- /dev/null -+++ b/drivers/gpio/gpio-mvebu-pwm.c -@@ -0,0 +1,202 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "gpio-mvebu.h" -+#include "gpiolib.h" -+ -+static void __iomem *mvebu_gpioreg_blink_select(struct mvebu_gpio_chip *mvchip) -+{ -+ return mvchip->membase + GPIO_BLINK_CNT_SELECT; -+} -+ -+static inline struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip) -+{ -+ return container_of(chip, struct mvebu_pwm, chip); -+} -+ -+static inline struct mvebu_gpio_chip *to_mvchip(struct mvebu_pwm *pwm) -+{ -+ return container_of(pwm, struct mvebu_gpio_chip, pwm); -+} -+ -+static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ struct gpio_desc *desc = gpio_to_desc(pwmd->pwm); -+ unsigned long flags; -+ int ret = 0; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ if (pwm->used) { -+ ret = -EBUSY; -+ } else { -+ if (!desc) { -+ ret = -ENODEV; -+ goto out; -+ } -+ ret = gpiod_request(desc, "mvebu-pwm"); -+ if (ret) -+ goto out; -+ -+ ret = gpiod_direction_output(desc, 0); -+ if (ret) { -+ gpiod_free(desc); -+ goto out; -+ } -+ -+ pwm->pin = pwmd->pwm - mvchip->chip.base; -+ pwm->used = true; -+ } -+ -+out: -+ spin_unlock_irqrestore(&pwm->lock, flags); -+ return ret; -+} -+ -+static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct gpio_desc *desc = gpio_to_desc(pwmd->pwm); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ gpiod_free(desc); -+ pwm->used = false; -+ spin_unlock_irqrestore(&pwm->lock, flags); -+} -+ -+static int mvebu_pwm_config(struct pwm_chip *chip, struct pwm_device *pwmd, -+ int duty_ns, int period_ns) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ unsigned int on, off; -+ unsigned long long val; -+ u32 u; -+ -+ val = (unsigned long long) pwm->clk_rate * duty_ns; -+ do_div(val, NSEC_PER_SEC); -+ if (val > UINT_MAX) -+ return -EINVAL; -+ if (val) -+ on = val; -+ else -+ on = 1; -+ -+ val = (unsigned long long) pwm->clk_rate * (period_ns - duty_ns); -+ do_div(val, NSEC_PER_SEC); -+ if (val > UINT_MAX) -+ return -EINVAL; -+ if (val) -+ off = val; -+ else -+ off = 1; -+ -+ u = readl_relaxed(mvebu_gpioreg_blink_select(mvchip)); -+ u &= ~(1 << pwm->pin); -+ u |= (pwm->id << pwm->pin); -+ writel_relaxed(u, mvebu_gpioreg_blink_select(mvchip)); -+ -+ writel_relaxed(on, pwm->membase + BLINK_ON_DURATION); -+ writel_relaxed(off, pwm->membase + BLINK_OFF_DURATION); -+ -+ return 0; -+} -+ -+static int mvebu_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ -+ mvebu_gpio_blink(&mvchip->chip, pwm->pin, 1); -+ -+ return 0; -+} -+ -+static void mvebu_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ -+ mvebu_gpio_blink(&mvchip->chip, pwm->pin, 0); -+} -+ -+static const struct pwm_ops mvebu_pwm_ops = { -+ .request = mvebu_pwm_request, -+ .free = mvebu_pwm_free, -+ .config = mvebu_pwm_config, -+ .enable = mvebu_pwm_enable, -+ .disable = mvebu_pwm_disable, -+ .owner = THIS_MODULE, -+}; -+ -+void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) -+{ -+ struct mvebu_pwm *pwm = &mvchip->pwm; -+ -+ pwm->blink_select = readl_relaxed(mvebu_gpioreg_blink_select(mvchip)); -+ pwm->blink_on_duration = -+ readl_relaxed(pwm->membase + BLINK_ON_DURATION); -+ pwm->blink_off_duration = -+ readl_relaxed(pwm->membase + BLINK_OFF_DURATION); -+} -+ -+void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) -+{ -+ struct mvebu_pwm *pwm = &mvchip->pwm; -+ -+ writel_relaxed(pwm->blink_select, mvebu_gpioreg_blink_select(mvchip)); -+ writel_relaxed(pwm->blink_on_duration, -+ pwm->membase + BLINK_ON_DURATION); -+ writel_relaxed(pwm->blink_off_duration, -+ pwm->membase + BLINK_OFF_DURATION); -+} -+ -+/* -+ * Armada 370/XP has simple PWM support for gpio lines. Other SoCs -+ * don't have this hardware. So if we don't have the necessary -+ * resource, it is not an error. -+ */ -+int mvebu_pwm_probe(struct platform_device *pdev, -+ struct mvebu_gpio_chip *mvchip, -+ int id) -+{ -+ struct device *dev = &pdev->dev; -+ struct mvebu_pwm *pwm = &mvchip->pwm; -+ struct resource *res; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"); -+ if (!res) -+ return 0; -+ -+ mvchip->pwm.membase = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(mvchip->pwm.membase)) -+ return PTR_ERR(mvchip->percpu_membase); -+ -+ if (id < 0 || id > 1) -+ return -EINVAL; -+ pwm->id = id; -+ -+ if (IS_ERR(mvchip->clk)) -+ return PTR_ERR(mvchip->clk); -+ -+ pwm->clk_rate = clk_get_rate(mvchip->clk); -+ if (!pwm->clk_rate) { -+ dev_err(dev, "failed to get clock rate\n"); -+ return -EINVAL; -+ } -+ -+ pwm->chip.dev = dev; -+ pwm->chip.ops = &mvebu_pwm_ops; -+ pwm->chip.base = mvchip->chip.base; -+ pwm->chip.npwm = mvchip->chip.ngpio; -+ pwm->chip.can_sleep = false; -+ -+ spin_lock_init(&pwm->lock); -+ -+ return pwmchip_add(&pwm->chip); -+} ---- a/drivers/gpio/gpio-mvebu.c -+++ b/drivers/gpio/gpio-mvebu.c -@@ -42,10 +42,11 @@ - #include - #include - #include -+#include - #include - #include - #include -- -+#include "gpio-mvebu.h" - /* - * GPIO unit register offsets. - */ -@@ -75,24 +76,6 @@ - - #define MVEBU_MAX_GPIO_PER_BANK 32 - --struct mvebu_gpio_chip { -- struct gpio_chip chip; -- spinlock_t lock; -- void __iomem *membase; -- void __iomem *percpu_membase; -- int irqbase; -- struct irq_domain *domain; -- int soc_variant; -- -- /* Used to preserve GPIO registers across suspend/resume */ -- u32 out_reg; -- u32 io_conf_reg; -- u32 blink_en_reg; -- u32 in_pol_reg; -- u32 edge_mask_regs[4]; -- u32 level_mask_regs[4]; --}; -- - /* - * Functions returning addresses of individual registers for a given - * GPIO controller. -@@ -218,7 +201,7 @@ static int mvebu_gpio_get(struct gpio_ch - return (u >> pin) & 1; - } - --static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) -+void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) - { - struct mvebu_gpio_chip *mvchip = - container_of(chip, struct mvebu_gpio_chip, chip); -@@ -607,6 +590,8 @@ static int mvebu_gpio_suspend(struct pla - BUG(); - } - -+ mvebu_pwm_suspend(mvchip); -+ - return 0; - } - -@@ -650,6 +635,8 @@ static int mvebu_gpio_resume(struct plat - BUG(); - } - -+ mvebu_pwm_resume(mvchip); -+ - return 0; - } - -@@ -661,7 +648,6 @@ static int mvebu_gpio_probe(struct platf - struct resource *res; - struct irq_chip_generic *gc; - struct irq_chip_type *ct; -- struct clk *clk; - unsigned int ngpios; - int soc_variant; - int i, cpu, id; -@@ -691,10 +677,10 @@ static int mvebu_gpio_probe(struct platf - return id; - } - -- clk = devm_clk_get(&pdev->dev, NULL); -+ mvchip->clk = devm_clk_get(&pdev->dev, NULL); - /* Not all SoCs require a clock.*/ -- if (!IS_ERR(clk)) -- clk_prepare_enable(clk); -+ if (!IS_ERR(mvchip->clk)) -+ clk_prepare_enable(mvchip->clk); - - mvchip->soc_variant = soc_variant; - mvchip->chip.label = dev_name(&pdev->dev); -@@ -828,7 +814,8 @@ static int mvebu_gpio_probe(struct platf - goto err_generic_chip; - } - -- return 0; -+ /* Armada 370/XP has simple PWM support for gpio lines */ -+ return mvebu_pwm_probe(pdev, mvchip, id); - - err_generic_chip: - irq_remove_generic_chip(gc, IRQ_MSK(ngpios), IRQ_NOREQUEST, ---- /dev/null -+++ b/drivers/gpio/gpio-mvebu.h -@@ -0,0 +1,79 @@ -+/* -+ * Interface between MVEBU GPIO driver and PWM driver for GPIO pins -+ * -+ * Copyright (C) 2015, Andrew Lunn -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef MVEBU_GPIO_PWM_H -+#define MVEBU_GPIO_PWM_H -+ -+#define BLINK_ON_DURATION 0x0 -+#define BLINK_OFF_DURATION 0x4 -+#define GPIO_BLINK_CNT_SELECT 0x0020 -+ -+struct mvebu_pwm { -+ void __iomem *membase; -+ unsigned long clk_rate; -+ bool used; -+ unsigned pin; -+ struct pwm_chip chip; -+ int id; -+ spinlock_t lock; -+ -+ /* Used to preserve GPIO/PWM registers across suspend / -+ * resume */ -+ u32 blink_select; -+ u32 blink_on_duration; -+ u32 blink_off_duration; -+}; -+ -+struct mvebu_gpio_chip { -+ struct gpio_chip chip; -+ spinlock_t lock; -+ void __iomem *membase; -+ void __iomem *percpu_membase; -+ int irqbase; -+ struct irq_domain *domain; -+ int soc_variant; -+ struct clk *clk; -+#ifdef CONFIG_PWM -+ struct mvebu_pwm pwm; -+#endif -+ /* Used to preserve GPIO registers across suspend/resume */ -+ u32 out_reg; -+ u32 io_conf_reg; -+ u32 blink_en_reg; -+ u32 in_pol_reg; -+ u32 edge_mask_regs[4]; -+ u32 level_mask_regs[4]; -+}; -+ -+void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value); -+ -+#ifdef CONFIG_PWM -+int mvebu_pwm_probe(struct platform_device *pdev, -+ struct mvebu_gpio_chip *mvchip, -+ int id); -+void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip); -+void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip); -+#else -+int mvebu_pwm_probe(struct platform_device *pdev, -+ struct mvebu_gpio_chip *mvchip, -+ int id) -+{ -+ return 0; -+} -+ -+void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) -+{ -+} -+ -+void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) -+{ -+} -+#endif -+#endif diff --git a/target/linux/mvebu/patches-4.4/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch b/target/linux/mvebu/patches-4.4/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch deleted file mode 100644 index 48f93944b..000000000 --- a/target/linux/mvebu/patches-4.4/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch +++ /dev/null @@ -1,52 +0,0 @@ -Document the optional parameters needed for PWM operation of gpio -lines. - -Signed-off-by: Andrew Lunn ---- - .../devicetree/bindings/gpio/gpio-mvebu.txt | 31 ++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt -+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt -@@ -38,6 +38,23 @@ Required properties: - - #gpio-cells: Should be two. The first cell is the pin number. The - second cell is reserved for flags, unused at the moment. - -+Optional properties: -+ -+In order to use the gpio lines in PWM mode, some additional optional -+properties are required. Only Armada 370 and XP supports these -+properties. -+ -+- reg: an additional register set is needed, for the GPIO Blink -+ Counter on/off registers. -+ -+- reg-names: Must contain an entry "pwm" corresponding to the -+ additional register range needed for pwm operation. -+ -+- #pwm-cells: Should be two. The first cell is the pin number. The -+ second cell is reserved for flags, unused at the moment. -+ -+- clocks: Must be a phandle to the clock for the gpio controller. -+ - Example: - - gpio0: gpio@d0018100 { -@@ -51,3 +68,17 @@ Example: - #interrupt-cells = <2>; - interrupts = <16>, <17>, <18>, <19>; - }; -+ -+ gpio1: gpio@18140 { -+ compatible = "marvell,orion-gpio"; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; -+ ngpios = <17>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ #pwm-cells = <2>; -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ interrupts = <87>, <88>, <89>; -+ clocks = <&coreclk 0>; -+ }; diff --git a/target/linux/mvebu/patches-4.4/204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch b/target/linux/mvebu/patches-4.4/204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch deleted file mode 100644 index 69bec6c2a..000000000 --- a/target/linux/mvebu/patches-4.4/204-mvebu_xp_add_pwm_properties_to_dtsi_files.patch +++ /dev/null @@ -1,149 +0,0 @@ -Add properties to the gpio nodes to allow them to be also used -as pwm lines. - -Signed-off-by: Andrew Lunn ---- - arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++-- - arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++-- - arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++-- - arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++-- - 4 files changed, 30 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/armada-370.dtsi -+++ b/arch/arm/boot/dts/armada-370.dtsi -@@ -162,24 +162,30 @@ - - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; -+ clocks = <&coreclk 0>; - }; - - gpio2: gpio@18180 { ---- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi -+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi -@@ -203,24 +203,30 @@ - internal-regs { - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <17>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>; -+ clocks = <&coreclk 0>; - }; - }; - }; ---- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi -+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi -@@ -286,24 +286,28 @@ - internal-regs { - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; -+ clocks = <&coreclk 0>; - }; - - gpio2: gpio@18180 { ---- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi -+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi -@@ -324,24 +324,30 @@ - internal-regs { - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; -+ clocks = <&coreclk 0>; - }; - - gpio2: gpio@18180 { diff --git a/target/linux/mvebu/patches-4.4/205-arm_mvebu_enable_pwm_in_defconfig.patch b/target/linux/mvebu/patches-4.4/205-arm_mvebu_enable_pwm_in_defconfig.patch deleted file mode 100644 index b52c60ff9..000000000 --- a/target/linux/mvebu/patches-4.4/205-arm_mvebu_enable_pwm_in_defconfig.patch +++ /dev/null @@ -1,18 +0,0 @@ -Now that the gpio driver also supports PWM operation, enable -the PWM framework in mvebu_v7_defconfig. - -Signed-off-by: Andrew Lunn ---- - arch/arm/configs/mvebu_v7_defconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/configs/mvebu_v7_defconfig -+++ b/arch/arm/configs/mvebu_v7_defconfig -@@ -131,6 +131,7 @@ CONFIG_DMADEVICES=y - CONFIG_MV_XOR=y - # CONFIG_IOMMU_SUPPORT is not set - CONFIG_MEMORY=y -+CONFIG_PWM=y - CONFIG_EXT4_FS=y - CONFIG_ISO9660_FS=y - CONFIG_JOLIET=y diff --git a/target/linux/mvebu/patches-4.4/206-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch b/target/linux/mvebu/patches-4.4/206-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch deleted file mode 100644 index bff58e9b7..000000000 --- a/target/linux/mvebu/patches-4.4/206-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch +++ /dev/null @@ -1,28 +0,0 @@ -The mvebu gpio driver can also perform PWM on some pins. Us the -pwm-fan driver to control the fan of the WRT1900AC, giving us fine -grain control over its speed and hence noise. - -Signed-off-by: Andrew Lunn ---- - arch/arm/boot/dts/armada-xp-wrt1900ac.dts | 8 +++----- - 1 file changed, 3 insertions(+), 5 deletions(-) - ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -428,13 +428,11 @@ - }; - }; - -- gpio_fan { -+ pwm_fan { - /* SUNON HA4010V4-0000-C99 */ -- compatible = "gpio-fan"; -- gpios = <&gpio0 24 0>; - -- gpio-fan,speed-map = <0 0 -- 4500 1>; -+ compatible = "pwm-fan"; -+ pwms = <&gpio0 24 4000 0>; - }; - - dsa@0 { diff --git a/target/linux/mvebu/patches-4.4/207-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-4.4/207-armada-385-rd-mtd-partitions.patch deleted file mode 100644 index fc94d9af5..000000000 --- a/target/linux/mvebu/patches-4.4/207-armada-385-rd-mtd-partitions.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-rd.dts -+++ b/arch/arm/boot/dts/armada-388-rd.dts -@@ -79,6 +79,16 @@ - compatible = "st,m25p128", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0 0x400000>; -+ }; -+ -+ partition@1 { -+ label = "firmware"; -+ reg = <0x400000 0xc00000>; -+ }; - }; - }; - diff --git a/target/linux/mvebu/patches-4.4/208-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-4.4/208-ARM-mvebu-385-ap-Add-partitions.patch deleted file mode 100644 index d2aaeef4a..000000000 --- a/target/linux/mvebu/patches-4.4/208-ARM-mvebu-385-ap-Add-partitions.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Tue, 13 Jan 2015 11:14:09 +0100 -Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions - -Signed-off-by: Maxime Ripard ---- - arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - ---- a/arch/arm/boot/dts/armada-385-db-ap.dts -+++ b/arch/arm/boot/dts/armada-385-db-ap.dts -@@ -184,6 +184,21 @@ - marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; -+ -+ mtd0@00000000 { -+ label = "u-boot"; -+ reg = <0x00000000 0x00800000>; -+ }; -+ -+ mtd1@00800000 { -+ label = "kernel"; -+ reg = <0x00800000 0x00800000>; -+ }; -+ -+ mtd2@01000000 { -+ label = "ubi"; -+ reg = <0x01000000 0x3f000000>; -+ }; - }; - - usb3@f0000 { diff --git a/target/linux/mvebu/patches-4.4/209-clearfog_switch_node.patch b/target/linux/mvebu/patches-4.4/209-clearfog_switch_node.patch deleted file mode 100644 index 55494d093..000000000 --- a/target/linux/mvebu/patches-4.4/209-clearfog_switch_node.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-clearfog.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -430,6 +430,18 @@ - }; - }; - -+ mvsw61xx { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "marvell,88e6176"; -+ status = "okay"; -+ reg = <0x4>; -+ is-indirect; -+ -+ mii-bus = <&mdio>; -+ cpu-port-0 = <5>; -+ }; -+ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&rear_button_pins>; diff --git a/target/linux/mvebu/patches-4.4/210-ARM-dts-armada388-clearfog-add-SFP-module-support.patch b/target/linux/mvebu/patches-4.4/210-ARM-dts-armada388-clearfog-add-SFP-module-support.patch deleted file mode 100644 index 9efcff905..000000000 --- a/target/linux/mvebu/patches-4.4/210-ARM-dts-armada388-clearfog-add-SFP-module-support.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 63ff73593c2f5d3fc1cba479321d192caaca48aa Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 12 Sep 2015 18:43:39 +0100 -Subject: [PATCH 738/744] ARM: dts: armada388-clearfog: add SFP module support - -Add SFP module support for Clearfog using the SFP phylink support. - -Signed-off-by: Russell King ---- - arch/arm/boot/dts/armada-388-clearfog.dts | 44 ++++++++----------------------- - 1 file changed, 11 insertions(+), 33 deletions(-) - ---- a/arch/arm/boot/dts/armada-388-clearfog.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -90,16 +90,12 @@ - }; - - ethernet@34000 { -+ managed = "in-band-status"; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <3>; - bm,pool-short = <1>; - status = "okay"; -- -- fixed-link { -- speed = <1000>; -- full-duplex; -- }; - }; - - i2c@11000 { -@@ -183,34 +179,6 @@ - output-low; - line-name = "m.2 devslp"; - }; -- sfp_los { -- /* SFP loss of signal */ -- gpio-hog; -- gpios = <12 GPIO_ACTIVE_HIGH>; -- input; -- line-name = "sfp-los"; -- }; -- sfp_tx_fault { -- /* SFP laser fault */ -- gpio-hog; -- gpios = <13 GPIO_ACTIVE_HIGH>; -- input; -- line-name = "sfp-tx-fault"; -- }; -- sfp_tx_disable { -- /* SFP transmit disable */ -- gpio-hog; -- gpios = <14 GPIO_ACTIVE_HIGH>; -- output-low; -- line-name = "sfp-tx-disable"; -- }; -- sfp_mod_def0 { -- /* SFP module present */ -- gpio-hog; -- gpios = <15 GPIO_ACTIVE_LOW>; -- input; -- line-name = "sfp-mod-def0"; -- }; - }; - - /* The MCP3021 is 100kHz clock only */ -@@ -374,6 +342,16 @@ - }; - }; - -+ sfp: sfp { -+ compatible = "sff,sfp"; -+ i2c-bus = <&i2c1>; -+ los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; -+ moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>; -+ sfp,ethernet = <ð2>; -+ tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>; -+ tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>; -+ }; -+ - dsa@0 { - compatible = "marvell,dsa"; - dsa,ethernet = <ð1>; diff --git a/target/linux/mvebu/patches-4.4/300-reprobe_sfp_phy.patch b/target/linux/mvebu/patches-4.4/300-reprobe_sfp_phy.patch deleted file mode 100644 index 42614effb..000000000 --- a/target/linux/mvebu/patches-4.4/300-reprobe_sfp_phy.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 28baa5e2635285b178326b301f534ed95c65dd01 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Thu, 29 Sep 2016 11:44:39 +0200 -Subject: [PATCH] sfp: retry phy probe if unsuccessful - -Some phys seem to take longer than 50 ms to come out of reset, so retry -until we find a phy. - -Signed-off-by: Jonas Gorski ---- - drivers/net/phy/sfp.c | 38 +++++++++++++++++++++++++------------- - 1 file changed, 25 insertions(+), 13 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -488,7 +488,7 @@ static void sfp_sm_phy_detach(struct sfp - sfp->mod_phy = NULL; - } - --static void sfp_sm_probe_phy(struct sfp *sfp) -+static int sfp_sm_probe_phy(struct sfp *sfp) - { - struct phy_device *phy; - int err; -@@ -498,11 +498,11 @@ static void sfp_sm_probe_phy(struct sfp - phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR); - if (IS_ERR(phy)) { - dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy)); -- return; -+ return PTR_ERR(phy); - } - if (!phy) { -- dev_info(sfp->dev, "no PHY detected\n"); -- return; -+ dev_dbg(sfp->dev, "no PHY detected\n"); -+ return -EAGAIN; - } - - err = phylink_connect_phy(sfp->phylink, phy); -@@ -510,11 +510,13 @@ static void sfp_sm_probe_phy(struct sfp - phy_device_remove(phy); - phy_device_free(phy); - dev_err(sfp->dev, "phylink_connect_phy failed: %d\n", err); -- return; -+ return err; - } - - sfp->mod_phy = phy; - phy_start(phy); -+ -+ return 0; - } - - static void sfp_sm_link_up(struct sfp *sfp) -@@ -565,13 +567,6 @@ static void sfp_sm_mod_init(struct sfp * - { - sfp_module_tx_enable(sfp); - -- /* Wait t_init before indicating that the link is up, provided the -- * current state indicates no TX_FAULT. If TX_FAULT clears before -- * this time, that's fine too. -- */ -- sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -- sfp->sm_retries = 5; -- - if (sfp->phylink) { - /* Setting the serdes link mode is guesswork: there's no - * field in the EEPROM which indicates what mode should -@@ -587,9 +582,26 @@ static void sfp_sm_mod_init(struct sfp * - !sfp->id.base.e100_base_fx) { - phylink_set_link_an_mode(sfp->phylink, MLO_AN_8023Z); - } else { -+ int ret; -+ - phylink_set_link_an_mode(sfp->phylink, MLO_AN_SGMII); -- sfp_sm_probe_phy(sfp); -+ -+ ret = sfp_sm_probe_phy(sfp); -+ if (ret) { -+ if (ret == -EAGAIN) -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ else -+ sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0); -+ return; -+ } - } -+ -+ /* Wait t_init before indicating that the link is up, provided the -+ * current state indicates no TX_FAULT. If TX_FAULT clears before -+ * this time, that's fine too. -+ */ -+ sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -+ sfp->sm_retries = 5; - } - } - diff --git a/target/linux/mvebu/patches-4.4/400-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-4.4/400-mvneta-tx-queue-workaround.patch deleted file mode 100644 index 5dba311d9..000000000 --- a/target/linux/mvebu/patches-4.4/400-mvneta-tx-queue-workaround.patch +++ /dev/null @@ -1,36 +0,0 @@ -The hardware queue scheduling is apparently configured with fixed -priorities, which creates a nasty fairness issue where traffic from one -CPU can starve traffic from all other CPUs. - -Work around this issue by forcing all tx packets to go through one CPU, -until this issue is fixed properly. - -Signed-off-by: Felix Fietkau ---- ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3984,6 +3984,16 @@ static int mvneta_ethtool_set_eee(struct - return phylink_ethtool_set_eee(pp->phylink, eee); - } - -+static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb, -+ void *accel_priv, -+ select_queue_fallback_t fallback) -+{ -+ /* XXX: hardware queue scheduling is broken, -+ * use only one queue until it is fixed */ -+ return 0; -+} -+ -+ - static const struct net_device_ops mvneta_netdev_ops = { - .ndo_open = mvneta_open, - .ndo_stop = mvneta_stop, -@@ -3994,6 +4004,7 @@ static const struct net_device_ops mvnet - .ndo_fix_features = mvneta_fix_features, - .ndo_get_stats64 = mvneta_get_stats64, - .ndo_do_ioctl = mvneta_ioctl, -+ .ndo_select_queue = mvneta_select_queue, - }; - - const struct ethtool_ops mvneta_eth_tool_ops = { diff --git a/target/linux/mvebu/patches-4.9/002-add_powertables.patch b/target/linux/mvebu/patches-4.9/002-add_powertables.patch deleted file mode 100644 index a5a47e4ab..000000000 --- a/target/linux/mvebu/patches-4.9/002-add_powertables.patch +++ /dev/null @@ -1,748 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -86,12 +86,100 @@ - pcie@2,0 { - /* Port 0, Lane 1 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <1 0 0x17 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x17 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>; -+ -+ ETSI = -+ <1 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0xb 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; - }; - - /* Second mini-PCIe port */ - pcie@3,0 { - /* Port 0, Lane 3 */ - status = "okay"; -+ -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ FCC = -+ <36 0 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x8 0x8 0x8 0x8 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <56 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <60 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <64 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x14 0x14 0x14 0x14 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <153 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <157 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <161 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>, -+ <165 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0 0xf>; -+ -+ ETSI = -+ <36 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <40 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <44 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <48 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <52 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <56 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <60 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <64 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <100 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <104 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <108 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <112 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <116 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <120 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <124 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <128 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <132 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <136 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <140 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>, -+ <149 0 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xc 0xd 0xd 0xd 0xd 0xc 0xc 0xc 0xc 0 0xf>; -+ }; -+ }; - }; - }; - ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -100,6 +100,212 @@ - }; - }; - }; -+ -+ pcie-controller { -+ pcie@1,0 { -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; -+ CA = -+ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+ }; -+ -+ pcie@2,0 { -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+ }; -+ }; - }; - - gpio-leds { ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -100,6 +100,212 @@ - }; - }; - }; -+ -+ pcie-controller { -+ pcie@1,0 { -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <104 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <108 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <112 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <116 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <120 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <124 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <128 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <132 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <136 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <140 0 0x17 0x17 0x17 0x17 0x17 0x17 0x17 0x15 0x17 0x17 0x17 0x14 0x17 0x17 0x17 0x14 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x1a 0x1a 0x17 0x14 0 0xf>; -+ CA = -+ <36 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; -+ CN = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <149 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x16 0x16 0x16 0x15 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0 0xf>; -+ ETSI = -+ <36 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <40 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <44 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <48 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <100 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>, -+ <149 0 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0x11 0 0xf>; -+ FCC = -+ <36 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <40 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <44 0 0x19 0x19 0x18 0x17 0x19 0x19 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <48 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x17 0x17 0x17 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x1a 0x1a 0x18 0x17 0x19 0x19 0x17 0x15 0x18 0x18 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <153 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <157 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <161 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>, -+ <165 0 0x1a 0x1a 0x18 0x17 0x1a 0x1a 0x17 0x15 0x1a 0x1a 0x17 0x14 0x15 0x15 0x15 0x14 0 0xf>; -+ }; -+ }; -+ }; -+ -+ pcie@2,0 { -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <2 2>; -+ marvell,powertable { -+ AU = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x00 0x00 0x00 0x00 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x00 0x00 0x00 0x00 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x00 0x00 0x00 0x00 0 0xf>; -+ CN = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x19 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x10 0x10 0x10 0x10 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x1a 0x19 0x18 0x17 0x19 0x19 0x17 0x16 0x14 0x14 0x14 0x14 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x19 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+ }; -+ }; - }; - - gpio-leds { ---- a/arch/arm/boot/dts/armada-385-linksys-shelby.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-shelby.dts -@@ -100,6 +100,212 @@ - }; - }; - }; -+ -+ pcie-controller { -+ pcie@1,0 { -+ mwlwifi { -+ marvell,2ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <104 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <108 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <112 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <116 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <120 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <124 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <128 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <132 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <136 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <140 0 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0x14 0 0xf>, -+ <149 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <153 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <157 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <161 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>, -+ <165 0 0x19 0x19 0x19 0x17 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0x19 0x19 0x16 0x15 0 0xf>; -+ CA = -+ <36 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <40 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <44 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <48 0 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0x9 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ CN = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0x14 0x14 0x14 0x14 0x13 0x13 0x13 0x13 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>, -+ <165 0 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x13 0x14 0x14 0x14 0x14 0x10 0x10 0x10 0x10 0 0xf>; -+ ETSI = -+ <36 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <40 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <44 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <48 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <52 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <56 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <60 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <64 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <100 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <104 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <108 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <112 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <116 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <120 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <124 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <128 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <132 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <136 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <140 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>, -+ <149 0 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xd 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0xe 0 0xf>; -+ FCC = -+ <36 0 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0 0xf>, -+ <40 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <44 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <48 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0xf 0xf 0xf 0xf 0 0xf>, -+ <52 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <56 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <60 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <64 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <100 0 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <104 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x12 0x12 0x12 0x12 0x10 0x10 0x10 0x10 0 0xf>, -+ <108 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <112 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <116 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <120 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <124 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <128 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <132 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <136 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <140 0 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0x11 0x11 0x11 0x11 0x10 0x10 0x10 0x10 0 0xf>, -+ <149 0 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <153 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <157 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <161 0 0x16 0x16 0x16 0x16 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>, -+ <165 0 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0x15 0 0xf>; -+ }; -+ }; -+ }; -+ -+ pcie@2,0 { -+ mwlwifi { -+ marvell,5ghz = <0>; -+ marvell,chainmask = <4 4>; -+ marvell,powertable { -+ AU = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ CA = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ CN = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <14 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ ETSI = -+ <1 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <12 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>, -+ <13 0 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0xa 0x0 0x0 0x0 0x0 0 0xf>; -+ FCC = -+ <1 0 0x17 0x10 0x10 0x10 0xf 0xf 0xf 0xf 0xe 0xe 0xe 0xe 0x0 0x0 0x0 0x0 0 0xf>, -+ <2 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <3 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <4 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <5 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <6 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <7 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <8 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <9 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <10 0 0x18 0x16 0x16 0x16 0x16 0x16 0x16 0x14 0x11 0x11 0x11 0x11 0x0 0x0 0x0 0x0 0 0xf>, -+ <11 0 0x17 0x12 0x12 0x12 0x13 0x13 0x13 0x13 0xf 0xf 0xf 0xf 0x0 0x0 0x0 0x0 0 0xf>; -+ }; -+ }; -+ }; -+ }; - }; - - gpio-leds { diff --git a/target/linux/mvebu/patches-4.9/003-add_switch_nodes.patch b/target/linux/mvebu/patches-4.9/003-add_switch_nodes.patch deleted file mode 100644 index 38a48d308..000000000 --- a/target/linux/mvebu/patches-4.9/003-add_switch_nodes.patch +++ /dev/null @@ -1,40 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -455,6 +455,16 @@ - }; - }; - }; -+ -+ mvsw61xx { -+ compatible = "marvell,88e6172"; -+ status = "okay"; -+ reg = <0x10>; -+ -+ mii-bus = <&mdio>; -+ cpu-port-0 = <5>; -+ cpu-port-1 = <6>; -+ }; - }; - - &pinctrl { ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -304,6 +304,18 @@ - }; - }; - }; -+ -+ mvsw61xx { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "marvell,88e6176"; -+ status = "okay"; -+ reg = <0x10>; -+ -+ mii-bus = <&mdio>; -+ cpu-port-0 = <5>; -+ cpu-port-1 = <6>; -+ }; - }; - - &pinctrl { diff --git a/target/linux/mvebu/patches-4.9/004-add_sata_disk_activity_trigger.patch b/target/linux/mvebu/patches-4.9/004-add_sata_disk_activity_trigger.patch deleted file mode 100644 index 906e97650..000000000 --- a/target/linux/mvebu/patches-4.9/004-add_sata_disk_activity_trigger.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 172230195068703b78ad5733a09492f5d6814c09 Mon Sep 17 00:00:00 2001 -From: Ansuel Smith -Date: Tue, 28 Feb 2017 14:15:50 +0100 -Subject: [PATCH] ARM: dts: armada: Add default trigger for sata led - -In others board we have the sata led set to function -with the sata led trigger by default. -This patch makes the same for these board that have sata -led but get disabled by not associating it to any trigger. - -Signed-off-by: Ansuel Smith -Acked-by: Jason Cooper -Signed-off-by: Gregory CLEMENT ---- - arch/arm/boot/dts/armada-385-linksys-caiman.dts | 1 + - arch/arm/boot/dts/armada-385-linksys-cobra.dts | 1 + - arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 1 + - 3 files changed, 3 insertions(+) - ---- a/arch/arm/boot/dts/armada-385-linksys-caiman.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-caiman.dts -@@ -315,6 +315,7 @@ - - sata { - label = "caiman:white:sata"; -+ linux,default-trigger = "disk-activity"; - }; - }; - }; ---- a/arch/arm/boot/dts/armada-385-linksys-cobra.dts -+++ b/arch/arm/boot/dts/armada-385-linksys-cobra.dts -@@ -315,6 +315,7 @@ - - sata { - label = "cobra:white:sata"; -+ linux,default-trigger = "disk-activity"; - }; - }; - }; ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -266,6 +266,7 @@ - esata@4 { - label = "mamba:white:esata"; - reg = <0x4>; -+ linux,default-trigger = "disk-activity"; - }; - - usb2@5 { diff --git a/target/linux/mvebu/patches-4.9/010-build_new_dtbs.patch b/target/linux/mvebu/patches-4.9/010-build_new_dtbs.patch deleted file mode 100644 index 1eb647df9..000000000 --- a/target/linux/mvebu/patches-4.9/010-build_new_dtbs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -921,6 +921,8 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-db-ap.dtb \ - armada-385-linksys-caiman.dtb \ - armada-385-linksys-cobra.dtb \ -+ armada-385-linksys-rango.dtb \ -+ armada-385-linksys-shelby.dtb \ - armada-388-clearfog.dtb \ - armada-388-db.dtb \ - armada-388-gp.dtb \ diff --git a/target/linux/mvebu/patches-4.9/102-revert_i2c_delay.patch b/target/linux/mvebu/patches-4.9/102-revert_i2c_delay.patch deleted file mode 100644 index 473bdd997..000000000 --- a/target/linux/mvebu/patches-4.9/102-revert_i2c_delay.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp.dtsi -+++ b/arch/arm/boot/dts/armada-xp.dtsi -@@ -85,12 +85,10 @@ - }; - - i2c0: i2c@11000 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11000 0x100>; - }; - - i2c1: i2c@11100 { -- compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c"; - reg = <0x11100 0x100>; - }; - diff --git a/target/linux/mvebu/patches-4.9/103-remove-nand-driver-bug.patch b/target/linux/mvebu/patches-4.9/103-remove-nand-driver-bug.patch deleted file mode 100644 index 19a2a1e27..000000000 --- a/target/linux/mvebu/patches-4.9/103-remove-nand-driver-bug.patch +++ /dev/null @@ -1,13 +0,0 @@ -Remove a BUG() call that would crash on a race condition that should -otherwise be harmless. - ---- a/drivers/mtd/nand/pxa3xx_nand.c -+++ b/drivers/mtd/nand/pxa3xx_nand.c -@@ -727,7 +727,6 @@ static void handle_data_pio(struct pxa3x - default: - dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__, - info->state); -- BUG(); - } - - /* Update buffer pointers for multi-page read/write */ diff --git a/target/linux/mvebu/patches-4.9/104-linksys_mamba_disable_keep_config.patch b/target/linux/mvebu/patches-4.9/104-linksys_mamba_disable_keep_config.patch deleted file mode 100644 index d569f93a5..000000000 --- a/target/linux/mvebu/patches-4.9/104-linksys_mamba_disable_keep_config.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -299,7 +299,6 @@ - nand@d0000 { - status = "okay"; - num-cs = <1>; -- marvell,nand-keep-config; - marvell,nand-enable-arbiter; - nand-on-flash-bbt; - nand-ecc-strength = <4>; diff --git a/target/linux/mvebu/patches-4.9/106-enable-bm-on-linksys-devices.patch b/target/linux/mvebu/patches-4.9/106-enable-bm-on-linksys-devices.patch deleted file mode 100644 index 86c6756a9..000000000 --- a/target/linux/mvebu/patches-4.9/106-enable-bm-on-linksys-devices.patch +++ /dev/null @@ -1,107 +0,0 @@ ---- a/arch/arm/boot/dts/armada-385-linksys.dtsi -+++ b/arch/arm/boot/dts/armada-385-linksys.dtsi -@@ -59,7 +59,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { - i2c@11000 { -@@ -88,6 +89,9 @@ - ethernet@70000 { - status = "okay"; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; -@@ -97,6 +101,9 @@ - ethernet@34000 { - status = "okay"; - phy-mode = "sgmii"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <2>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; -@@ -107,6 +114,10 @@ - status = "okay"; - }; - -+ bm@c8000 { -+ status = "okay"; -+ }; -+ - sata@a8000 { - status = "okay"; - }; -@@ -193,6 +204,10 @@ - }; - }; - -+ bm-bppi { -+ status = "okay"; -+ }; -+ - pcie-controller { - status = "okay"; - ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -71,7 +71,8 @@ - ranges = ; -+ MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000 -+ MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>; - - pcie-controller { - status = "okay"; -@@ -205,6 +206,9 @@ - pinctrl-names = "default"; - status = "okay"; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; -@@ -216,12 +220,19 @@ - pinctrl-names = "default"; - status = "okay"; - phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <1>; -+ bm,pool-short = <3>; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - -+ bm@c0000 { -+ status = "okay"; -+ }; -+ - /* USB part of the eSATA/USB 2.0 port */ - usb@50000 { - status = "okay"; -@@ -368,6 +379,10 @@ - }; - }; - }; -+ -+ bm-bppi { -+ status = "okay"; -+ }; - }; - - gpio_keys { diff --git a/target/linux/mvebu/patches-4.9/110-pxa3xxx_revert_irq_thread.patch b/target/linux/mvebu/patches-4.9/110-pxa3xxx_revert_irq_thread.patch deleted file mode 100644 index 299f07966..000000000 --- a/target/linux/mvebu/patches-4.9/110-pxa3xxx_revert_irq_thread.patch +++ /dev/null @@ -1,69 +0,0 @@ -Revert "mtd: pxa3xx-nand: handle PIO in threaded interrupt" - -This reverts commit 24542257a3b987025d4b998ec2d15e556c98ad3f -This upstream change has been causing spurious timeouts on accesses -to the NAND flash if something else on the system is causing -significant latency. - -Nothing guarantees that the thread will run in time, so the -usual timeout is unreliable. - -Signed-off-by: Felix Fietkau - ---- a/drivers/mtd/nand/pxa3xx_nand.c -+++ b/drivers/mtd/nand/pxa3xx_nand.c -@@ -791,24 +791,11 @@ static void start_data_dma(struct pxa3xx - __func__, direction, info->dma_cookie, info->sg.length); - } - --static irqreturn_t pxa3xx_nand_irq_thread(int irq, void *data) --{ -- struct pxa3xx_nand_info *info = data; -- -- handle_data_pio(info); -- -- info->state = STATE_CMD_DONE; -- nand_writel(info, NDSR, NDSR_WRDREQ | NDSR_RDDREQ); -- -- return IRQ_HANDLED; --} -- - static irqreturn_t pxa3xx_nand_irq(int irq, void *devid) - { - struct pxa3xx_nand_info *info = devid; - unsigned int status, is_completed = 0, is_ready = 0; - unsigned int ready, cmd_done; -- irqreturn_t ret = IRQ_HANDLED; - - if (info->cs == 0) { - ready = NDSR_FLASH_RDY; -@@ -850,8 +837,7 @@ static irqreturn_t pxa3xx_nand_irq(int i - } else { - info->state = (status & NDSR_RDDREQ) ? - STATE_PIO_READING : STATE_PIO_WRITING; -- ret = IRQ_WAKE_THREAD; -- goto NORMAL_IRQ_EXIT; -+ handle_data_pio(info); - } - } - if (status & cmd_done) { -@@ -896,7 +882,7 @@ static irqreturn_t pxa3xx_nand_irq(int i - if (is_ready) - complete(&info->dev_ready); - NORMAL_IRQ_EXIT: -- return ret; -+ return IRQ_HANDLED; - } - - static inline int is_buf_blank(uint8_t *buf, size_t len) -@@ -1857,9 +1843,7 @@ static int alloc_nand_resource(struct pl - /* initialize all interrupts to be disabled */ - disable_int(info, NDSR_MASK); - -- ret = request_threaded_irq(irq, pxa3xx_nand_irq, -- pxa3xx_nand_irq_thread, IRQF_ONESHOT, -- pdev->name, info); -+ ret = request_irq(irq, pxa3xx_nand_irq, 0, pdev->name, info); - if (ret < 0) { - dev_err(&pdev->dev, "failed to request IRQ\n"); - goto fail_free_buf; diff --git a/target/linux/mvebu/patches-4.9/120-net-mvneta-add-BQL-support.patch b/target/linux/mvebu/patches-4.9/120-net-mvneta-add-BQL-support.patch deleted file mode 100644 index f9d5ac1bb..000000000 --- a/target/linux/mvebu/patches-4.9/120-net-mvneta-add-BQL-support.patch +++ /dev/null @@ -1,83 +0,0 @@ ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -1724,8 +1724,10 @@ static struct mvneta_tx_queue *mvneta_tx - - /* Free tx queue skbuffs */ - static void mvneta_txq_bufs_free(struct mvneta_port *pp, -- struct mvneta_tx_queue *txq, int num) -+ struct mvneta_tx_queue *txq, int num, -+ struct netdev_queue *nq) - { -+ unsigned int bytes_compl = 0, pkts_compl = 0; - int i; - - for (i = 0; i < num; i++) { -@@ -1733,6 +1735,11 @@ static void mvneta_txq_bufs_free(struct - txq->txq_get_index; - struct sk_buff *skb = txq->tx_skb[txq->txq_get_index]; - -+ if (skb) { -+ bytes_compl += skb->len; -+ pkts_compl++; -+ } -+ - mvneta_txq_inc_get(txq); - - if (!IS_TSO_HEADER(txq, tx_desc->buf_phys_addr)) -@@ -1743,6 +1750,8 @@ static void mvneta_txq_bufs_free(struct - continue; - dev_kfree_skb_any(skb); - } -+ -+ netdev_tx_completed_queue(nq, pkts_compl, bytes_compl); - } - - /* Handle end of transmission */ -@@ -1756,7 +1765,7 @@ static void mvneta_txq_done(struct mvnet - if (!tx_done) - return; - -- mvneta_txq_bufs_free(pp, txq, tx_done); -+ mvneta_txq_bufs_free(pp, txq, tx_done, nq); - - txq->count -= tx_done; - -@@ -2363,6 +2372,8 @@ out: - struct mvneta_pcpu_stats *stats = this_cpu_ptr(pp->stats); - struct netdev_queue *nq = netdev_get_tx_queue(dev, txq_id); - -+ netdev_tx_sent_queue(nq, len); -+ - txq->count += frags; - mvneta_txq_pend_desc_add(pp, txq, frags); - -@@ -2387,9 +2398,10 @@ static void mvneta_txq_done_force(struct - struct mvneta_tx_queue *txq) - - { -+ struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); - int tx_done = txq->count; - -- mvneta_txq_bufs_free(pp, txq, tx_done); -+ mvneta_txq_bufs_free(pp, txq, tx_done, nq); - - /* reset txq */ - txq->count = 0; -@@ -2885,6 +2897,8 @@ static int mvneta_txq_init(struct mvneta - static void mvneta_txq_deinit(struct mvneta_port *pp, - struct mvneta_tx_queue *txq) - { -+ struct netdev_queue *nq = netdev_get_tx_queue(pp->dev, txq->id); -+ - kfree(txq->tx_skb); - - if (txq->tso_hdrs) -@@ -2896,6 +2910,8 @@ static void mvneta_txq_deinit(struct mvn - txq->size * MVNETA_DESC_ALIGNED_SIZE, - txq->descs, txq->descs_phys); - -+ netdev_tx_reset_queue(nq); -+ - txq->descs = NULL; - txq->last_desc = 0; - txq->next_desc_to_proc = 0; diff --git a/target/linux/mvebu/patches-4.9/130-irqchip-armada-xp-backport.patch b/target/linux/mvebu/patches-4.9/130-irqchip-armada-xp-backport.patch deleted file mode 100644 index 14cbb7beb..000000000 --- a/target/linux/mvebu/patches-4.9/130-irqchip-armada-xp-backport.patch +++ /dev/null @@ -1,17 +0,0 @@ -Backport a change that updates the effective affinity mask. The Armada IRQ -controller only supports setting the affinity to a single CPU, and the IRQ -subsystem needs to know about that. - -Signed-off-by: Felix Fietkau ---- ---- a/drivers/irqchip/irq-armada-370-xp.c -+++ b/drivers/irqchip/irq-armada-370-xp.c -@@ -251,6 +251,8 @@ static int armada_xp_set_affinity(struct - writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq)); - raw_spin_unlock(&irq_controller_lock); - -+ cpumask_copy(irq_data_get_affinity_mask(d), cpumask_of(cpu)); -+ - return IRQ_SET_MASK_OK; - } - #endif diff --git a/target/linux/mvebu/patches-4.9/200-gpio_mvebu_add_limited_pwm_support.patch b/target/linux/mvebu/patches-4.9/200-gpio_mvebu_add_limited_pwm_support.patch deleted file mode 100644 index 0261b1e53..000000000 --- a/target/linux/mvebu/patches-4.9/200-gpio_mvebu_add_limited_pwm_support.patch +++ /dev/null @@ -1,433 +0,0 @@ -Armada 370/XP devices can 'blink' gpio lines with a configurable on -and off period. This can be modelled as a PWM. - -However, there are only two sets of PWM configuration registers for -all the gpio lines. This driver simply allows a single gpio line per -gpio chip of 32 lines to be used as a PWM. Attempts to use more return -EBUSY. - -Due to the interleaving of registers it is not simple to separate the -PWM driver from the gpio driver. Thus the gpio driver has been -extended with a PWM driver. - -Signed-off-by: Andrew Lunn ---- - drivers/gpio/Kconfig | 5 ++ - drivers/gpio/Makefile | 1 + - drivers/gpio/gpio-mvebu-pwm.c | 202 ++++++++++++++++++++++++++++++++++++++++++ - drivers/gpio/gpio-mvebu.c | 37 +++----- - drivers/gpio/gpio-mvebu.h | 79 +++++++++++++++++ - 5 files changed, 299 insertions(+), 25 deletions(-) - create mode 100644 drivers/gpio/gpio-mvebu-pwm.c - create mode 100644 drivers/gpio/gpio-mvebu.h - ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -319,6 +319,11 @@ config GPIO_MVEBU - depends on OF_GPIO - select GENERIC_IRQ_CHIP - -+config GPIO_MVEBU_PWM -+ def_bool y -+ depends on GPIO_MVEBU -+ depends on PWM -+ - config GPIO_MXC - def_bool y - depends on ARCH_MXC ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -81,6 +81,7 @@ obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc52 - obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o - obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o - obj-$(CONFIG_GPIO_MVEBU) += gpio-mvebu.o -+obj-$(CONFIG_GPIO_MVEBU_PWM) += gpio-mvebu-pwm.o - obj-$(CONFIG_GPIO_MXC) += gpio-mxc.o - obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o - obj-$(CONFIG_GPIO_OCTEON) += gpio-octeon.o ---- /dev/null -+++ b/drivers/gpio/gpio-mvebu-pwm.c -@@ -0,0 +1,202 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include "gpio-mvebu.h" -+#include "gpiolib.h" -+ -+static void __iomem *mvebu_gpioreg_blink_select(struct mvebu_gpio_chip *mvchip) -+{ -+ return mvchip->membase + GPIO_BLINK_CNT_SELECT; -+} -+ -+static inline struct mvebu_pwm *to_mvebu_pwm(struct pwm_chip *chip) -+{ -+ return container_of(chip, struct mvebu_pwm, chip); -+} -+ -+static inline struct mvebu_gpio_chip *to_mvchip(struct mvebu_pwm *pwm) -+{ -+ return container_of(pwm, struct mvebu_gpio_chip, pwm); -+} -+ -+static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ struct gpio_desc *desc = gpio_to_desc(pwmd->pwm); -+ unsigned long flags; -+ int ret = 0; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ if (pwm->used) { -+ ret = -EBUSY; -+ } else { -+ if (!desc) { -+ ret = -ENODEV; -+ goto out; -+ } -+ ret = gpiod_request(desc, "mvebu-pwm"); -+ if (ret) -+ goto out; -+ -+ ret = gpiod_direction_output(desc, 0); -+ if (ret) { -+ gpiod_free(desc); -+ goto out; -+ } -+ -+ pwm->pin = pwmd->pwm - mvchip->chip.base; -+ pwm->used = true; -+ } -+ -+out: -+ spin_unlock_irqrestore(&pwm->lock, flags); -+ return ret; -+} -+ -+static void mvebu_pwm_free(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct gpio_desc *desc = gpio_to_desc(pwmd->pwm); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&pwm->lock, flags); -+ gpiod_free(desc); -+ pwm->used = false; -+ spin_unlock_irqrestore(&pwm->lock, flags); -+} -+ -+static int mvebu_pwm_config(struct pwm_chip *chip, struct pwm_device *pwmd, -+ int duty_ns, int period_ns) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ unsigned int on, off; -+ unsigned long long val; -+ u32 u; -+ -+ val = (unsigned long long) pwm->clk_rate * duty_ns; -+ do_div(val, NSEC_PER_SEC); -+ if (val > UINT_MAX) -+ return -EINVAL; -+ if (val) -+ on = val; -+ else -+ on = 1; -+ -+ val = (unsigned long long) pwm->clk_rate * (period_ns - duty_ns); -+ do_div(val, NSEC_PER_SEC); -+ if (val > UINT_MAX) -+ return -EINVAL; -+ if (val) -+ off = val; -+ else -+ off = 1; -+ -+ u = readl_relaxed(mvebu_gpioreg_blink_select(mvchip)); -+ u &= ~(1 << pwm->pin); -+ u |= (pwm->id << pwm->pin); -+ writel_relaxed(u, mvebu_gpioreg_blink_select(mvchip)); -+ -+ writel_relaxed(on, pwm->membase + BLINK_ON_DURATION); -+ writel_relaxed(off, pwm->membase + BLINK_OFF_DURATION); -+ -+ return 0; -+} -+ -+static int mvebu_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ -+ mvebu_gpio_blink(&mvchip->chip, pwm->pin, 1); -+ -+ return 0; -+} -+ -+static void mvebu_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwmd) -+{ -+ struct mvebu_pwm *pwm = to_mvebu_pwm(chip); -+ struct mvebu_gpio_chip *mvchip = to_mvchip(pwm); -+ -+ mvebu_gpio_blink(&mvchip->chip, pwm->pin, 0); -+} -+ -+static const struct pwm_ops mvebu_pwm_ops = { -+ .request = mvebu_pwm_request, -+ .free = mvebu_pwm_free, -+ .config = mvebu_pwm_config, -+ .enable = mvebu_pwm_enable, -+ .disable = mvebu_pwm_disable, -+ .owner = THIS_MODULE, -+}; -+ -+void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) -+{ -+ struct mvebu_pwm *pwm = &mvchip->pwm; -+ -+ pwm->blink_select = readl_relaxed(mvebu_gpioreg_blink_select(mvchip)); -+ pwm->blink_on_duration = -+ readl_relaxed(pwm->membase + BLINK_ON_DURATION); -+ pwm->blink_off_duration = -+ readl_relaxed(pwm->membase + BLINK_OFF_DURATION); -+} -+ -+void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) -+{ -+ struct mvebu_pwm *pwm = &mvchip->pwm; -+ -+ writel_relaxed(pwm->blink_select, mvebu_gpioreg_blink_select(mvchip)); -+ writel_relaxed(pwm->blink_on_duration, -+ pwm->membase + BLINK_ON_DURATION); -+ writel_relaxed(pwm->blink_off_duration, -+ pwm->membase + BLINK_OFF_DURATION); -+} -+ -+/* -+ * Armada 370/XP has simple PWM support for gpio lines. Other SoCs -+ * don't have this hardware. So if we don't have the necessary -+ * resource, it is not an error. -+ */ -+int mvebu_pwm_probe(struct platform_device *pdev, -+ struct mvebu_gpio_chip *mvchip, -+ int id) -+{ -+ struct device *dev = &pdev->dev; -+ struct mvebu_pwm *pwm = &mvchip->pwm; -+ struct resource *res; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pwm"); -+ if (!res) -+ return 0; -+ -+ mvchip->pwm.membase = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(mvchip->pwm.membase)) -+ return PTR_ERR(mvchip->percpu_membase); -+ -+ if (id < 0 || id > 1) -+ return -EINVAL; -+ pwm->id = id; -+ -+ if (IS_ERR(mvchip->clk)) -+ return PTR_ERR(mvchip->clk); -+ -+ pwm->clk_rate = clk_get_rate(mvchip->clk); -+ if (!pwm->clk_rate) { -+ dev_err(dev, "failed to get clock rate\n"); -+ return -EINVAL; -+ } -+ -+ pwm->chip.dev = dev; -+ pwm->chip.ops = &mvebu_pwm_ops; -+ pwm->chip.base = mvchip->chip.base; -+ pwm->chip.npwm = mvchip->chip.ngpio; -+ pwm->chip.can_sleep = false; -+ -+ spin_lock_init(&pwm->lock); -+ -+ return pwmchip_add(&pwm->chip); -+} ---- a/drivers/gpio/gpio-mvebu.c -+++ b/drivers/gpio/gpio-mvebu.c -@@ -42,10 +42,11 @@ - #include - #include - #include -+#include - #include - #include - #include -- -+#include "gpio-mvebu.h" - /* - * GPIO unit register offsets. - */ -@@ -75,24 +76,6 @@ - - #define MVEBU_MAX_GPIO_PER_BANK 32 - --struct mvebu_gpio_chip { -- struct gpio_chip chip; -- spinlock_t lock; -- void __iomem *membase; -- void __iomem *percpu_membase; -- int irqbase; -- struct irq_domain *domain; -- int soc_variant; -- -- /* Used to preserve GPIO registers across suspend/resume */ -- u32 out_reg; -- u32 io_conf_reg; -- u32 blink_en_reg; -- u32 in_pol_reg; -- u32 edge_mask_regs[4]; -- u32 level_mask_regs[4]; --}; -- - /* - * Functions returning addresses of individual registers for a given - * GPIO controller. -@@ -216,7 +199,7 @@ static int mvebu_gpio_get(struct gpio_ch - return (u >> pin) & 1; - } - --static void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) -+void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value) - { - struct mvebu_gpio_chip *mvchip = gpiochip_get_data(chip); - unsigned long flags; -@@ -596,6 +579,8 @@ static int mvebu_gpio_suspend(struct pla - BUG(); - } - -+ mvebu_pwm_suspend(mvchip); -+ - return 0; - } - -@@ -639,6 +624,8 @@ static int mvebu_gpio_resume(struct plat - BUG(); - } - -+ mvebu_pwm_resume(mvchip); -+ - return 0; - } - -@@ -650,7 +637,6 @@ static int mvebu_gpio_probe(struct platf - struct resource *res; - struct irq_chip_generic *gc; - struct irq_chip_type *ct; -- struct clk *clk; - unsigned int ngpios; - bool have_irqs; - int soc_variant; -@@ -684,10 +670,10 @@ static int mvebu_gpio_probe(struct platf - return id; - } - -- clk = devm_clk_get(&pdev->dev, NULL); -+ mvchip->clk = devm_clk_get(&pdev->dev, NULL); - /* Not all SoCs require a clock.*/ -- if (!IS_ERR(clk)) -- clk_prepare_enable(clk); -+ if (!IS_ERR(mvchip->clk)) -+ clk_prepare_enable(mvchip->clk); - - mvchip->soc_variant = soc_variant; - mvchip->chip.label = dev_name(&pdev->dev); -@@ -814,7 +800,8 @@ static int mvebu_gpio_probe(struct platf - mvchip); - } - -- return 0; -+ /* Armada 370/XP has simple PWM support for gpio lines */ -+ return mvebu_pwm_probe(pdev, mvchip, id); - - err_domain: - irq_domain_remove(mvchip->domain); ---- /dev/null -+++ b/drivers/gpio/gpio-mvebu.h -@@ -0,0 +1,79 @@ -+/* -+ * Interface between MVEBU GPIO driver and PWM driver for GPIO pins -+ * -+ * Copyright (C) 2015, Andrew Lunn -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#ifndef MVEBU_GPIO_PWM_H -+#define MVEBU_GPIO_PWM_H -+ -+#define BLINK_ON_DURATION 0x0 -+#define BLINK_OFF_DURATION 0x4 -+#define GPIO_BLINK_CNT_SELECT 0x0020 -+ -+struct mvebu_pwm { -+ void __iomem *membase; -+ unsigned long clk_rate; -+ bool used; -+ unsigned pin; -+ struct pwm_chip chip; -+ int id; -+ spinlock_t lock; -+ -+ /* Used to preserve GPIO/PWM registers across suspend / -+ * resume */ -+ u32 blink_select; -+ u32 blink_on_duration; -+ u32 blink_off_duration; -+}; -+ -+struct mvebu_gpio_chip { -+ struct gpio_chip chip; -+ spinlock_t lock; -+ void __iomem *membase; -+ void __iomem *percpu_membase; -+ int irqbase; -+ struct irq_domain *domain; -+ int soc_variant; -+ struct clk *clk; -+#ifdef CONFIG_PWM -+ struct mvebu_pwm pwm; -+#endif -+ /* Used to preserve GPIO registers across suspend/resume */ -+ u32 out_reg; -+ u32 io_conf_reg; -+ u32 blink_en_reg; -+ u32 in_pol_reg; -+ u32 edge_mask_regs[4]; -+ u32 level_mask_regs[4]; -+}; -+ -+void mvebu_gpio_blink(struct gpio_chip *chip, unsigned pin, int value); -+ -+#ifdef CONFIG_PWM -+int mvebu_pwm_probe(struct platform_device *pdev, -+ struct mvebu_gpio_chip *mvchip, -+ int id); -+void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip); -+void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip); -+#else -+int mvebu_pwm_probe(struct platform_device *pdev, -+ struct mvebu_gpio_chip *mvchip, -+ int id) -+{ -+ return 0; -+} -+ -+void mvebu_pwm_suspend(struct mvebu_gpio_chip *mvchip) -+{ -+} -+ -+void mvebu_pwm_resume(struct mvebu_gpio_chip *mvchip) -+{ -+} -+#endif -+#endif diff --git a/target/linux/mvebu/patches-4.9/201-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch b/target/linux/mvebu/patches-4.9/201-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch deleted file mode 100644 index 48f93944b..000000000 --- a/target/linux/mvebu/patches-4.9/201-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch +++ /dev/null @@ -1,52 +0,0 @@ -Document the optional parameters needed for PWM operation of gpio -lines. - -Signed-off-by: Andrew Lunn ---- - .../devicetree/bindings/gpio/gpio-mvebu.txt | 31 ++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt -+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt -@@ -38,6 +38,23 @@ Required properties: - - #gpio-cells: Should be two. The first cell is the pin number. The - second cell is reserved for flags, unused at the moment. - -+Optional properties: -+ -+In order to use the gpio lines in PWM mode, some additional optional -+properties are required. Only Armada 370 and XP supports these -+properties. -+ -+- reg: an additional register set is needed, for the GPIO Blink -+ Counter on/off registers. -+ -+- reg-names: Must contain an entry "pwm" corresponding to the -+ additional register range needed for pwm operation. -+ -+- #pwm-cells: Should be two. The first cell is the pin number. The -+ second cell is reserved for flags, unused at the moment. -+ -+- clocks: Must be a phandle to the clock for the gpio controller. -+ - Example: - - gpio0: gpio@d0018100 { -@@ -51,3 +68,17 @@ Example: - #interrupt-cells = <2>; - interrupts = <16>, <17>, <18>, <19>; - }; -+ -+ gpio1: gpio@18140 { -+ compatible = "marvell,orion-gpio"; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; -+ ngpios = <17>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ #pwm-cells = <2>; -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ interrupts = <87>, <88>, <89>; -+ clocks = <&coreclk 0>; -+ }; diff --git a/target/linux/mvebu/patches-4.9/202-mvebu_xp_add_pwm_properties_to_dtsi_files.patch b/target/linux/mvebu/patches-4.9/202-mvebu_xp_add_pwm_properties_to_dtsi_files.patch deleted file mode 100644 index 90e951e2d..000000000 --- a/target/linux/mvebu/patches-4.9/202-mvebu_xp_add_pwm_properties_to_dtsi_files.patch +++ /dev/null @@ -1,149 +0,0 @@ -Add properties to the gpio nodes to allow them to be also used -as pwm lines. - -Signed-off-by: Andrew Lunn ---- - arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++-- - arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++-- - arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++-- - arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++-- - 4 files changed, 30 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/armada-370.dtsi -+++ b/arch/arm/boot/dts/armada-370.dtsi -@@ -144,24 +144,30 @@ - - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; -+ clocks = <&coreclk 0>; - }; - - gpio2: gpio@18180 { ---- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi -+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi -@@ -203,24 +203,30 @@ - internal-regs { - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <17>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>; -+ clocks = <&coreclk 0>; - }; - }; - }; ---- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi -+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi -@@ -286,24 +286,28 @@ - internal-regs { - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; -+ clocks = <&coreclk 0>; - }; - - gpio2: gpio@18180 { ---- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi -+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi -@@ -324,24 +324,30 @@ - internal-regs { - gpio0: gpio@18100 { - compatible = "marvell,orion-gpio"; -- reg = <0x18100 0x40>; -+ reg = <0x18100 0x40>, <0x181c0 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <82>, <83>, <84>, <85>; -+ clocks = <&coreclk 0>; - }; - - gpio1: gpio@18140 { - compatible = "marvell,orion-gpio"; -- reg = <0x18140 0x40>; -+ reg = <0x18140 0x40>, <0x181c8 0x08>; -+ reg-names = "gpio", "pwm"; - ngpios = <32>; - gpio-controller; - #gpio-cells = <2>; -+ #pwm-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupts = <87>, <88>, <89>, <90>; -+ clocks = <&coreclk 0>; - }; - - gpio2: gpio@18180 { diff --git a/target/linux/mvebu/patches-4.9/203-arm_mvebu_enable_pwm_in_defconfig.patch b/target/linux/mvebu/patches-4.9/203-arm_mvebu_enable_pwm_in_defconfig.patch deleted file mode 100644 index 21eb24da2..000000000 --- a/target/linux/mvebu/patches-4.9/203-arm_mvebu_enable_pwm_in_defconfig.patch +++ /dev/null @@ -1,18 +0,0 @@ -Now that the gpio driver also supports PWM operation, enable -the PWM framework in mvebu_v7_defconfig. - -Signed-off-by: Andrew Lunn ---- - arch/arm/configs/mvebu_v7_defconfig | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/configs/mvebu_v7_defconfig -+++ b/arch/arm/configs/mvebu_v7_defconfig -@@ -135,6 +135,7 @@ CONFIG_DMADEVICES=y - CONFIG_MV_XOR=y - # CONFIG_IOMMU_SUPPORT is not set - CONFIG_MEMORY=y -+CONFIG_PWM=y - CONFIG_EXT4_FS=y - CONFIG_ISO9660_FS=y - CONFIG_JOLIET=y diff --git a/target/linux/mvebu/patches-4.9/204-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch b/target/linux/mvebu/patches-4.9/204-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch deleted file mode 100644 index caf5bd4ae..000000000 --- a/target/linux/mvebu/patches-4.9/204-mvebu_wrt1900ac_use_pwm-fan_rather_than_gpio-fan.patch +++ /dev/null @@ -1,28 +0,0 @@ -The mvebu gpio driver can also perform PWM on some pins. Us the -pwm-fan driver to control the fan of the WRT1900AC, giving us fine -grain control over its speed and hence noise. - -Signed-off-by: Andrew Lunn ---- - arch/arm/boot/dts/armada-xp-wrt1900ac.dts | 8 +++----- - 1 file changed, 3 insertions(+), 5 deletions(-) - ---- a/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -+++ b/arch/arm/boot/dts/armada-xp-linksys-mamba.dts -@@ -417,13 +417,11 @@ - }; - }; - -- gpio_fan { -+ pwm_fan { - /* SUNON HA4010V4-0000-C99 */ -- compatible = "gpio-fan"; -- gpios = <&gpio0 24 0>; - -- gpio-fan,speed-map = <0 0 -- 4500 1>; -+ compatible = "pwm-fan"; -+ pwms = <&gpio0 24 4000 0>; - }; - - dsa@0 { diff --git a/target/linux/mvebu/patches-4.9/205-armada-385-rd-mtd-partitions.patch b/target/linux/mvebu/patches-4.9/205-armada-385-rd-mtd-partitions.patch deleted file mode 100644 index e75a5eebd..000000000 --- a/target/linux/mvebu/patches-4.9/205-armada-385-rd-mtd-partitions.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-rd.dts -+++ b/arch/arm/boot/dts/armada-388-rd.dts -@@ -140,6 +140,16 @@ - compatible = "st,m25p128", "jedec,spi-nor"; - reg = <0>; /* Chip select 0 */ - spi-max-frequency = <108000000>; -+ -+ partition@0 { -+ label = "uboot"; -+ reg = <0 0x400000>; -+ }; -+ -+ partition@1 { -+ label = "firmware"; -+ reg = <0x400000 0xc00000>; -+ }; - }; - }; - diff --git a/target/linux/mvebu/patches-4.9/206-ARM-mvebu-385-ap-Add-partitions.patch b/target/linux/mvebu/patches-4.9/206-ARM-mvebu-385-ap-Add-partitions.patch deleted file mode 100644 index b7af27236..000000000 --- a/target/linux/mvebu/patches-4.9/206-ARM-mvebu-385-ap-Add-partitions.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 9861f93a59142a3131870df2521eb2deb73026d7 Mon Sep 17 00:00:00 2001 -From: Maxime Ripard -Date: Tue, 13 Jan 2015 11:14:09 +0100 -Subject: [PATCH 2/2] ARM: mvebu: 385-ap: Add partitions - -Signed-off-by: Maxime Ripard ---- - arch/arm/boot/dts/armada-385-db-ap.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - ---- a/arch/arm/boot/dts/armada-385-db-ap.dts -+++ b/arch/arm/boot/dts/armada-385-db-ap.dts -@@ -181,19 +181,19 @@ - #size-cells = <1>; - - partition@0 { -- label = "U-Boot"; -+ label = "u-boot"; - reg = <0x00000000 0x00800000>; - read-only; - }; - - partition@800000 { -- label = "uImage"; -+ label = "kernel"; - reg = <0x00800000 0x00400000>; - read-only; - }; - - partition@c00000 { -- label = "Root"; -+ label = "ubi"; - reg = <0x00c00000 0x3f400000>; - }; - }; diff --git a/target/linux/mvebu/patches-4.9/210-clearfog_switch_node.patch b/target/linux/mvebu/patches-4.9/210-clearfog_switch_node.patch deleted file mode 100644 index 022dc6f5d..000000000 --- a/target/linux/mvebu/patches-4.9/210-clearfog_switch_node.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/arch/arm/boot/dts/armada-388-clearfog.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -406,6 +406,18 @@ - }; - }; - -+ mvsw61xx { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "marvell,88e6176"; -+ status = "okay"; -+ reg = <0x4>; -+ is-indirect; -+ -+ mii-bus = <&mdio>; -+ cpu-port-0 = <5>; -+ }; -+ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-0 = <&rear_button_pins>; diff --git a/target/linux/mvebu/patches-4.9/220-ARM-dts-armada388-clearfog-add-SFP-module-support.patch b/target/linux/mvebu/patches-4.9/220-ARM-dts-armada388-clearfog-add-SFP-module-support.patch deleted file mode 100644 index e7aa5c4cb..000000000 --- a/target/linux/mvebu/patches-4.9/220-ARM-dts-armada388-clearfog-add-SFP-module-support.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 63ff73593c2f5d3fc1cba479321d192caaca48aa Mon Sep 17 00:00:00 2001 -From: Russell King -Date: Sat, 12 Sep 2015 18:43:39 +0100 -Subject: [PATCH 738/744] ARM: dts: armada388-clearfog: add SFP module support - -Add SFP module support for Clearfog using the SFP phylink support. - -Signed-off-by: Russell King ---- - arch/arm/boot/dts/armada-388-clearfog.dts | 44 ++++++++----------------------- - 1 file changed, 11 insertions(+), 33 deletions(-) - ---- a/arch/arm/boot/dts/armada-388-clearfog.dts -+++ b/arch/arm/boot/dts/armada-388-clearfog.dts -@@ -90,16 +90,12 @@ - }; - - ethernet@34000 { -+ managed = "in-band-status"; - phy-mode = "sgmii"; - buffer-manager = <&bm>; - bm,pool-long = <3>; - bm,pool-short = <1>; - status = "okay"; -- -- fixed-link { -- speed = <1000>; -- full-duplex; -- }; - }; - - i2c@11000 { -@@ -183,34 +179,6 @@ - output-low; - line-name = "m.2 devslp"; - }; -- sfp_los { -- /* SFP loss of signal */ -- gpio-hog; -- gpios = <12 GPIO_ACTIVE_HIGH>; -- input; -- line-name = "sfp-los"; -- }; -- sfp_tx_fault { -- /* SFP laser fault */ -- gpio-hog; -- gpios = <13 GPIO_ACTIVE_HIGH>; -- input; -- line-name = "sfp-tx-fault"; -- }; -- sfp_tx_disable { -- /* SFP transmit disable */ -- gpio-hog; -- gpios = <14 GPIO_ACTIVE_HIGH>; -- output-low; -- line-name = "sfp-tx-disable"; -- }; -- sfp_mod_def0 { -- /* SFP module present */ -- gpio-hog; -- gpios = <15 GPIO_ACTIVE_LOW>; -- input; -- line-name = "sfp-mod-def0"; -- }; - }; - - /* The MCP3021 is 100kHz clock only */ -@@ -350,6 +318,16 @@ - }; - }; - -+ sfp: sfp { -+ compatible = "sff,sfp"; -+ i2c-bus = <&i2c1>; -+ los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; -+ moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>; -+ sfp,ethernet = <ð2>; -+ tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>; -+ tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>; -+ }; -+ - dsa@0 { - compatible = "marvell,dsa"; - dsa,ethernet = <ð1>; diff --git a/target/linux/mvebu/patches-4.9/300-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-4.9/300-mvneta-tx-queue-workaround.patch deleted file mode 100644 index d5486e738..000000000 --- a/target/linux/mvebu/patches-4.9/300-mvneta-tx-queue-workaround.patch +++ /dev/null @@ -1,36 +0,0 @@ -The hardware queue scheduling is apparently configured with fixed -priorities, which creates a nasty fairness issue where traffic from one -CPU can starve traffic from all other CPUs. - -Work around this issue by forcing all tx packets to go through one CPU, -until this issue is fixed properly. - -Signed-off-by: Felix Fietkau ---- ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3838,6 +3838,16 @@ static int mvneta_ethtool_get_rxfh(struc - return 0; - } - -+static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb, -+ void *accel_priv, -+ select_queue_fallback_t fallback) -+{ -+ /* XXX: hardware queue scheduling is broken, -+ * use only one queue until it is fixed */ -+ return 0; -+} -+ -+ - static const struct net_device_ops mvneta_netdev_ops = { - .ndo_open = mvneta_open, - .ndo_stop = mvneta_stop, -@@ -3848,6 +3858,7 @@ static const struct net_device_ops mvnet - .ndo_fix_features = mvneta_fix_features, - .ndo_get_stats64 = mvneta_get_stats64, - .ndo_do_ioctl = mvneta_ioctl, -+ .ndo_select_queue = mvneta_select_queue, - }; - - const struct ethtool_ops mvneta_eth_tool_ops = { diff --git a/target/linux/mvebu/patches-4.9/400-phy-provide-a-hook-for-link-up-link-down-events.patch b/target/linux/mvebu/patches-4.9/400-phy-provide-a-hook-for-link-up-link-down-events.patch deleted file mode 100644 index cac2e6ea6..000000000 --- a/target/linux/mvebu/patches-4.9/400-phy-provide-a-hook-for-link-up-link-down-events.patch +++ /dev/null @@ -1,177 +0,0 @@ -From: Russell King -Date: Sun, 12 Feb 2017 17:27:17 +0100 -Subject: [PATCH] phy: provide a hook for link up/link down events - -Sometimes, we need to do additional work between the PHY coming up and -marking the carrier present - for example, we may need to wait for the -PHY to MAC link to finish negotiation. This changes phylib to provide -a notification function pointer which avoids the built-in -netif_carrier_on() and netif_carrier_off() functions. - -Standard ->adjust_link functionality is provided by hooking a helper -into the new ->phy_link_change method. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -991,6 +991,16 @@ void phy_start(struct phy_device *phydev - } - EXPORT_SYMBOL(phy_start); - -+static void phy_link_up(struct phy_device *phydev) -+{ -+ phydev->phy_link_change(phydev, true, true); -+} -+ -+static void phy_link_down(struct phy_device *phydev, bool do_carrier) -+{ -+ phydev->phy_link_change(phydev, false, do_carrier); -+} -+ - /** - * phy_state_machine - Handle the state machine - * @work: work_struct that describes the work to be done -@@ -1032,8 +1042,7 @@ void phy_state_machine(struct work_struc - /* If the link is down, give up on negotiation for now */ - if (!phydev->link) { - phydev->state = PHY_NOLINK; -- netif_carrier_off(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -+ phy_link_down(phydev, true); - break; - } - -@@ -1045,9 +1054,7 @@ void phy_state_machine(struct work_struc - /* If AN is done, we're running */ - if (err > 0) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -- -+ phy_link_up(phydev); - } else if (0 == phydev->link_timeout--) - needs_aneg = true; - break; -@@ -1072,8 +1079,7 @@ void phy_state_machine(struct work_struc - } - } - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -+ phy_link_up(phydev); - } - break; - case PHY_FORCING: -@@ -1083,13 +1089,12 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - if (0 == phydev->link_timeout--) - needs_aneg = true; -+ phy_link_down(phydev, false); - } -- -- phydev->adjust_link(phydev->attached_dev); - break; - case PHY_RUNNING: - /* Only register a CHANGE if we are polling and link changed -@@ -1121,14 +1126,12 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - phydev->state = PHY_NOLINK; -- netif_carrier_off(phydev->attached_dev); -+ phy_link_down(phydev, true); - } - -- phydev->adjust_link(phydev->attached_dev); -- - if (phy_interrupt_is_valid(phydev)) - err = phy_config_interrupt(phydev, - PHY_INTERRUPT_ENABLED); -@@ -1136,8 +1139,7 @@ void phy_state_machine(struct work_struc - case PHY_HALTED: - if (phydev->link) { - phydev->link = 0; -- netif_carrier_off(phydev->attached_dev); -- phydev->adjust_link(phydev->attached_dev); -+ phy_link_down(phydev, true); - do_suspend = true; - } - break; -@@ -1157,11 +1159,11 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - phydev->state = PHY_NOLINK; -+ phy_link_down(phydev, false); - } -- phydev->adjust_link(phydev->attached_dev); - } else { - phydev->state = PHY_AN; - phydev->link_timeout = PHY_AN_TIMEOUT; -@@ -1173,11 +1175,11 @@ void phy_state_machine(struct work_struc - - if (phydev->link) { - phydev->state = PHY_RUNNING; -- netif_carrier_on(phydev->attached_dev); -+ phy_link_up(phydev); - } else { - phydev->state = PHY_NOLINK; -+ phy_link_down(phydev, false); - } -- phydev->adjust_link(phydev->attached_dev); - } - break; - } ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -645,6 +645,19 @@ struct phy_device *phy_find_first(struct - } - EXPORT_SYMBOL(phy_find_first); - -+static void phy_link_change(struct phy_device *phydev, bool up, bool do_carrier) -+{ -+ struct net_device *netdev = phydev->attached_dev; -+ -+ if (do_carrier) { -+ if (up) -+ netif_carrier_on(netdev); -+ else -+ netif_carrier_off(netdev); -+ } -+ phydev->adjust_link(netdev); -+} -+ - /** - * phy_prepare_link - prepares the PHY layer to monitor link status - * @phydev: target phy_device struct -@@ -910,6 +923,7 @@ int phy_attach_direct(struct net_device - goto error; - } - -+ phydev->phy_link_change = phy_link_change; - phydev->attached_dev = dev; - dev->phydev = phydev; - ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -425,6 +425,7 @@ struct phy_device { - - u8 mdix; - -+ void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier); - void (*adjust_link)(struct net_device *dev); - }; - #define to_phy_device(d) container_of(to_mdio_device(d), \ diff --git a/target/linux/mvebu/patches-4.9/401-net-phy-move-phy-MMD-accessors-to-phy-core.c.patch b/target/linux/mvebu/patches-4.9/401-net-phy-move-phy-MMD-accessors-to-phy-core.c.patch deleted file mode 100644 index 481d3d5e1..000000000 --- a/target/linux/mvebu/patches-4.9/401-net-phy-move-phy-MMD-accessors-to-phy-core.c.patch +++ /dev/null @@ -1,292 +0,0 @@ -From: Russell King -Date: Wed, 4 Jan 2017 10:46:43 +0000 -Subject: [PATCH] net: phy: move phy MMD accessors to phy-core.c - -Move the phy_(read|write)__mmd() helpers out of line, they will become -our main MMD accessor functions, and so will be a little more complex. -This complexity doesn't belong in an inline function. Also move the -_indirect variants as well to keep like functionality together. - -Signed-off-by: Russell King ---- - create mode 100644 drivers/net/phy/phy-core.c - ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -1,6 +1,7 @@ - # Makefile for Linux PHY drivers and MDIO bus drivers - --libphy-y := phy.o phy_device.o mdio_bus.o mdio_device.o -+libphy-y := phy.o phy_device.o mdio_bus.o mdio_device.o \ -+ phy-core.o - libphy-$(CONFIG_SWPHY) += swphy.o - - obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -1216,91 +1216,6 @@ void phy_mac_interrupt(struct phy_device - } - EXPORT_SYMBOL(phy_mac_interrupt); - --static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad, -- int addr) --{ -- /* Write the desired MMD Devad */ -- bus->write(bus, addr, MII_MMD_CTRL, devad); -- -- /* Write the desired MMD register address */ -- bus->write(bus, addr, MII_MMD_DATA, prtad); -- -- /* Select the Function : DATA with no post increment */ -- bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); --} -- --/** -- * phy_read_mmd_indirect - reads data from the MMD registers -- * @phydev: The PHY device bus -- * @prtad: MMD Address -- * @devad: MMD DEVAD -- * -- * Description: it reads data from the MMD registers (clause 22 to access to -- * clause 45) of the specified phy address. -- * To read these register we have: -- * 1) Write reg 13 // DEVAD -- * 2) Write reg 14 // MMD Address -- * 3) Write reg 13 // MMD Data Command for MMD DEVAD -- * 3) Read reg 14 // Read MMD data -- */ --int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad) --{ -- struct phy_driver *phydrv = phydev->drv; -- int addr = phydev->mdio.addr; -- int value = -1; -- -- if (!phydrv->read_mmd_indirect) { -- struct mii_bus *bus = phydev->mdio.bus; -- -- mutex_lock(&bus->mdio_lock); -- mmd_phy_indirect(bus, prtad, devad, addr); -- -- /* Read the content of the MMD's selected register */ -- value = bus->read(bus, addr, MII_MMD_DATA); -- mutex_unlock(&bus->mdio_lock); -- } else { -- value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr); -- } -- return value; --} --EXPORT_SYMBOL(phy_read_mmd_indirect); -- --/** -- * phy_write_mmd_indirect - writes data to the MMD registers -- * @phydev: The PHY device -- * @prtad: MMD Address -- * @devad: MMD DEVAD -- * @data: data to write in the MMD register -- * -- * Description: Write data from the MMD registers of the specified -- * phy address. -- * To write these register we have: -- * 1) Write reg 13 // DEVAD -- * 2) Write reg 14 // MMD Address -- * 3) Write reg 13 // MMD Data Command for MMD DEVAD -- * 3) Write reg 14 // Write MMD data -- */ --void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, -- int devad, u32 data) --{ -- struct phy_driver *phydrv = phydev->drv; -- int addr = phydev->mdio.addr; -- -- if (!phydrv->write_mmd_indirect) { -- struct mii_bus *bus = phydev->mdio.bus; -- -- mutex_lock(&bus->mdio_lock); -- mmd_phy_indirect(bus, prtad, devad, addr); -- -- /* Write the data into MMD's selected register */ -- bus->write(bus, addr, MII_MMD_DATA, data); -- mutex_unlock(&bus->mdio_lock); -- } else { -- phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data); -- } --} --EXPORT_SYMBOL(phy_write_mmd_indirect); -- - /** - * phy_init_eee - init and check the EEE feature - * @phydev: target phy_device struct ---- /dev/null -+++ b/drivers/net/phy/phy-core.c -@@ -0,0 +1,135 @@ -+/* -+ * Core PHY library, taken from phy.c -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ -+#include -+#include -+ -+static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad, -+ int addr) -+{ -+ /* Write the desired MMD Devad */ -+ bus->write(bus, addr, MII_MMD_CTRL, devad); -+ -+ /* Write the desired MMD register address */ -+ bus->write(bus, addr, MII_MMD_DATA, prtad); -+ -+ /* Select the Function : DATA with no post increment */ -+ bus->write(bus, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR)); -+} -+ -+/** -+ * phy_read_mmd_indirect - reads data from the MMD registers -+ * @phydev: The PHY device bus -+ * @prtad: MMD Address -+ * @devad: MMD DEVAD -+ * -+ * Description: it reads data from the MMD registers (clause 22 to access to -+ * clause 45) of the specified phy address. -+ * To read these register we have: -+ * 1) Write reg 13 // DEVAD -+ * 2) Write reg 14 // MMD Address -+ * 3) Write reg 13 // MMD Data Command for MMD DEVAD -+ * 3) Read reg 14 // Read MMD data -+ */ -+int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, int devad) -+{ -+ struct phy_driver *phydrv = phydev->drv; -+ int addr = phydev->mdio.addr; -+ int value = -1; -+ -+ if (!phydrv->read_mmd_indirect) { -+ struct mii_bus *bus = phydev->mdio.bus; -+ -+ mutex_lock(&bus->mdio_lock); -+ mmd_phy_indirect(bus, prtad, devad, addr); -+ -+ /* Read the content of the MMD's selected register */ -+ value = bus->read(bus, addr, MII_MMD_DATA); -+ mutex_unlock(&bus->mdio_lock); -+ } else { -+ value = phydrv->read_mmd_indirect(phydev, prtad, devad, addr); -+ } -+ return value; -+} -+EXPORT_SYMBOL(phy_read_mmd_indirect); -+ -+/** -+ * phy_read_mmd - Convenience function for reading a register -+ * from an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to read from -+ * @regnum: The register on the MMD to read -+ * -+ * Same rules as for phy_read(); -+ */ -+int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) -+{ -+ if (!phydev->is_c45) -+ return -EOPNOTSUPP; -+ -+ return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, -+ MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); -+} -+EXPORT_SYMBOL(phy_read_mmd); -+ -+/** -+ * phy_write_mmd_indirect - writes data to the MMD registers -+ * @phydev: The PHY device -+ * @prtad: MMD Address -+ * @devad: MMD DEVAD -+ * @data: data to write in the MMD register -+ * -+ * Description: Write data from the MMD registers of the specified -+ * phy address. -+ * To write these register we have: -+ * 1) Write reg 13 // DEVAD -+ * 2) Write reg 14 // MMD Address -+ * 3) Write reg 13 // MMD Data Command for MMD DEVAD -+ * 3) Write reg 14 // Write MMD data -+ */ -+void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, -+ int devad, u32 data) -+{ -+ struct phy_driver *phydrv = phydev->drv; -+ int addr = phydev->mdio.addr; -+ -+ if (!phydrv->write_mmd_indirect) { -+ struct mii_bus *bus = phydev->mdio.bus; -+ -+ mutex_lock(&bus->mdio_lock); -+ mmd_phy_indirect(bus, prtad, devad, addr); -+ -+ /* Write the data into MMD's selected register */ -+ bus->write(bus, addr, MII_MMD_DATA, data); -+ mutex_unlock(&bus->mdio_lock); -+ } else { -+ phydrv->write_mmd_indirect(phydev, prtad, devad, addr, data); -+ } -+} -+EXPORT_SYMBOL(phy_write_mmd_indirect); -+ -+/** -+ * phy_write_mmd - Convenience function for writing a register -+ * on an MMD on a given PHY. -+ * @phydev: The phy_device struct -+ * @devad: The MMD to read from -+ * @regnum: The register on the MMD to read -+ * @val: value to write to @regnum -+ * -+ * Same rules as for phy_write(); -+ */ -+int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) -+{ -+ if (!phydev->is_c45) -+ return -EOPNOTSUPP; -+ -+ regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); -+ -+ return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); -+} -+EXPORT_SYMBOL(phy_write_mmd); ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -626,14 +626,7 @@ struct phy_fixup { - * - * Same rules as for phy_read(); - */ --static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) --{ -- if (!phydev->is_c45) -- return -EOPNOTSUPP; -- -- return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, -- MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); --} -+int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum); - - /** - * phy_read_mmd_indirect - reads data from the MMD registers -@@ -738,16 +731,7 @@ static inline bool phy_is_pseudo_fixed_l - * - * Same rules as for phy_write(); - */ --static inline int phy_write_mmd(struct phy_device *phydev, int devad, -- u32 regnum, u16 val) --{ -- if (!phydev->is_c45) -- return -EOPNOTSUPP; -- -- regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); -- -- return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); --} -+int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val); - - /** - * phy_write_mmd_indirect - writes data to the MMD registers diff --git a/target/linux/mvebu/patches-4.9/402-net-phy-make-phy_-read-write-_mmd-generic-MMD-access.patch b/target/linux/mvebu/patches-4.9/402-net-phy-make-phy_-read-write-_mmd-generic-MMD-access.patch deleted file mode 100644 index 33d467794..000000000 --- a/target/linux/mvebu/patches-4.9/402-net-phy-make-phy_-read-write-_mmd-generic-MMD-access.patch +++ /dev/null @@ -1,97 +0,0 @@ -From: Russell King -Date: Wed, 4 Jan 2017 19:20:21 +0000 -Subject: [PATCH] net: phy: make phy_(read|write)_mmd() generic MMD - accessors - -Make phy_(read|write)_mmd() generic 802.3 clause 45 register accessors -for both Clause 22 and Clause 45 PHYs, using either the direct register -reading for Clause 45, or the indirect method for Clause 22 PHYs. -Allow this behaviour to be overriden by PHY drivers where necessary. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy-core.c -+++ b/drivers/net/phy/phy-core.c -@@ -69,11 +69,18 @@ EXPORT_SYMBOL(phy_read_mmd_indirect); - */ - int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) - { -- if (!phydev->is_c45) -- return -EOPNOTSUPP; -+ if (regnum > (u16)~0 || devad > 32) -+ return -EINVAL; - -- return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, -- MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); -+ if (phydev->drv->read_mmd) -+ return phydev->drv->read_mmd(phydev, devad, regnum); -+ -+ if (phydev->is_c45) { -+ u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff); -+ return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, addr); -+ } -+ -+ return phy_read_mmd_indirect(phydev, regnum, devad); - } - EXPORT_SYMBOL(phy_read_mmd); - -@@ -125,11 +132,21 @@ EXPORT_SYMBOL(phy_write_mmd_indirect); - */ - int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) - { -- if (!phydev->is_c45) -- return -EOPNOTSUPP; -+ if (regnum > (u16)~0 || devad > 32) -+ return -EINVAL; -+ -+ if (phydev->drv->read_mmd) -+ return phydev->drv->write_mmd(phydev, devad, regnum, val); -+ -+ if (phydev->is_c45) { -+ u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff); -+ -+ return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, -+ addr, val); -+ } - -- regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); -+ phy_write_mmd_indirect(phydev, regnum, devad, val); - -- return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val); -+ return 0; - } - EXPORT_SYMBOL(phy_write_mmd); ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -569,6 +569,30 @@ struct phy_driver { - */ - void (*link_change_notify)(struct phy_device *dev); - -+ /* -+ * Phy specific driver override for reading a MMD register. -+ * This function is optional for PHY specific drivers. When -+ * not provided, the default MMD read function will be used -+ * by phy_read_mmd(), which will use either a direct read for -+ * Clause 45 PHYs or an indirect read for Clause 22 PHYs. -+ * devnum is the MMD device number within the PHY device, -+ * regnum is the register within the selected MMD device. -+ */ -+ int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum); -+ -+ /* -+ * Phy specific driver override for writing a MMD register. -+ * This function is optional for PHY specific drivers. When -+ * not provided, the default MMD write function will be used -+ * by phy_write_mmd(), which will use either a direct write for -+ * Clause 45 PHYs, or an indirect write for Clause 22 PHYs. -+ * devnum is the MMD device number within the PHY device, -+ * regnum is the register within the selected MMD device. -+ * val is the value to be written. -+ */ -+ int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum, -+ u16 val); -+ - /* A function provided by a phy specific driver to override the - * the PHY driver framework support for reading a MMD register - * from the PHY. If not supported, return -1. This function is diff --git a/target/linux/mvebu/patches-4.9/403-net-phy-avoid-setting-unsupported-EEE-advertisments.patch b/target/linux/mvebu/patches-4.9/403-net-phy-avoid-setting-unsupported-EEE-advertisments.patch deleted file mode 100644 index 1ef8c922a..000000000 --- a/target/linux/mvebu/patches-4.9/403-net-phy-avoid-setting-unsupported-EEE-advertisments.patch +++ /dev/null @@ -1,57 +0,0 @@ -From: Russell King -Date: Wed, 4 Jan 2017 21:00:51 +0000 -Subject: [PATCH] net: phy: avoid setting unsupported EEE advertisments - -We currently allow userspace to set any EEE advertisments it desires, -whether or not the PHY supports them. For example: - - # ethtool --set-eee eth1 advertise 0xffffffff - # ethtool --show-eee eth1 - EEE Settings for eth1: - EEE status: disabled - Tx LPI: disabled - Supported EEE link modes: 100baseT/Full - 1000baseT/Full - 10000baseT/Full - Advertised EEE link modes: 100baseT/Full - 1000baseT/Full - 1000baseKX/Full - 10000baseT/Full - 10000baseKX4/Full - 10000baseKR/Full - -Clearly, this is not sane, we should only allow link modes that are -supported to be advertised (as we do elsewhere.) Ensure that we mask -the MDIO_AN_EEE_ADV value with the capabilities retrieved from the -MDIO_PCS_EEE_ABLE register. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -1352,14 +1352,19 @@ EXPORT_SYMBOL(phy_ethtool_get_eee); - */ - int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data) - { -- int val = ethtool_adv_to_mmd_eee_adv_t(data->advertised); -+ int cap, adv; - -- /* Mask prohibited EEE modes */ -- val &= ~phydev->eee_broken_modes; -+ /* Get Supported EEE */ -+ cap = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); -+ if (cap < 0) -+ return cap; -+ -+ adv = ethtool_adv_to_mmd_eee_adv_t(data->advertised) & cap; - -- phy_write_mmd_indirect(phydev, MDIO_AN_EEE_ADV, MDIO_MMD_AN, val); -+ /* Mask prohibited EEE modes */ -+ adv &= ~phydev->eee_broken_modes; - -- return 0; -+ return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); - } - EXPORT_SYMBOL(phy_ethtool_set_eee); - diff --git a/target/linux/mvebu/patches-4.9/404-net-phy-restart-phy-autonegotiation-after-EEE-advert.patch b/target/linux/mvebu/patches-4.9/404-net-phy-restart-phy-autonegotiation-after-EEE-advert.patch deleted file mode 100644 index c768075d3..000000000 --- a/target/linux/mvebu/patches-4.9/404-net-phy-restart-phy-autonegotiation-after-EEE-advert.patch +++ /dev/null @@ -1,53 +0,0 @@ -From: Russell King -Date: Thu, 5 Jan 2017 12:21:09 +0000 -Subject: [PATCH] net: phy: restart phy autonegotiation after EEE - advertisment change - -When the EEE advertisment is changed, we should restart autonegotiation -to update the link partner with the new EEE settings. Add this trigger -but only if the advertisment has changed. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -1352,19 +1352,36 @@ EXPORT_SYMBOL(phy_ethtool_get_eee); - */ - int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data) - { -- int cap, adv; -+ int cap, old_adv, adv, ret; - - /* Get Supported EEE */ - cap = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); - if (cap < 0) - return cap; - -+ old_adv = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); -+ if (old_adv < 0) -+ return old_adv; -+ - adv = ethtool_adv_to_mmd_eee_adv_t(data->advertised) & cap; - - /* Mask prohibited EEE modes */ - adv &= ~phydev->eee_broken_modes; - -- return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); -+ if (old_adv != adv) { -+ ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); -+ if (ret < 0) -+ return ret; -+ -+ /* Restart autonegotiation so the new modes get sent to the -+ * link partner. -+ */ -+ ret = phy_restart_aneg(phydev); -+ if (ret < 0) -+ return ret; -+ } -+ -+ return 0; - } - EXPORT_SYMBOL(phy_ethtool_set_eee); - diff --git a/target/linux/mvebu/patches-4.9/405-net-phy-allow-EEE-with-SGMII-interface-modes.patch b/target/linux/mvebu/patches-4.9/405-net-phy-allow-EEE-with-SGMII-interface-modes.patch deleted file mode 100644 index e5f6da4be..000000000 --- a/target/linux/mvebu/patches-4.9/405-net-phy-allow-EEE-with-SGMII-interface-modes.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: Russell King -Date: Thu, 5 Jan 2017 09:34:42 +0000 -Subject: [PATCH] net: phy: allow EEE with SGMII interface modes - -As EEE is able to work in SGMII mode as well, add it to the list of -permissable EEE modes that phy_init_eee() will accept. This is -necessary so that EEE can work with an 88E1512 connected in SGMII mode. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -1236,6 +1236,7 @@ int phy_init_eee(struct phy_device *phyd - if ((phydev->duplex == DUPLEX_FULL) && - ((phydev->interface == PHY_INTERFACE_MODE_MII) || - (phydev->interface == PHY_INTERFACE_MODE_GMII) || -+ phydev->interface == PHY_INTERFACE_MODE_SGMII || - phy_interface_is_rgmii(phydev) || - phy_is_internal(phydev))) { - int eee_lp, eee_cap, eee_adv; diff --git a/target/linux/mvebu/patches-4.9/406-net-phy-improve-phylib-correctness-for-non-autoneg-s.patch b/target/linux/mvebu/patches-4.9/406-net-phy-improve-phylib-correctness-for-non-autoneg-s.patch deleted file mode 100644 index 16516c684..000000000 --- a/target/linux/mvebu/patches-4.9/406-net-phy-improve-phylib-correctness-for-non-autoneg-s.patch +++ /dev/null @@ -1,199 +0,0 @@ -From: Russell King -Date: Thu, 5 Jan 2017 16:32:14 +0000 -Subject: [PATCH] net: phy: improve phylib correctness for non-autoneg - settings - -phylib has some undesirable behaviour when forcing a link mode through -ethtool. phylib uses this code: - - idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex), - features); - -to find an index in the settings table. phy_find_setting() starts at -index 0, and scans upwards looking for an exact speed and duplex match. -When it doesn't find it, it returns MAX_NUM_SETTINGS - 1, which is -10baseT-Half duplex. - -phy_find_valid() then scans from the point (and effectively only checks -one entry) before bailing out, returning MAX_NUM_SETTINGS - 1. - -phy_sanitize_settings() then sets ->speed to SPEED_10 and ->duplex to -DUPLEX_HALF whether or not 10baseT-Half is supported or not. This goes -against all the comments against these functions, and 10baseT-Half may -not even be supported by the hardware. - -Rework these functions, introducing a new method of scanning the table. -There are two modes of lookup that phylib wants: exact, and inexact. - -- in exact mode, we return either an exact match or failure -- in inexact mode, we return an exact match if it exists, a match at - the highest speed that is not greater than the requested speed - (ignoring duplex), or failing that, the lowest supported speed, or - failure. - -The biggest difference is that we always check whether the entry is -supported before further consideration, so all unsupported entries are -not considered as candidates. - -This results in arguably saner behaviour, better matches the comments, -and is probably what users would expect. - -This becomes important as ethernet speeds increase, PHYs exist which do -not support the 10Mbit speeds, and half-duplex is likely to become -obsolete - it's already not even an option on 10Gbit and faster links. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -160,7 +160,9 @@ struct phy_setting { - u32 setting; - }; - --/* A mapping of all SUPPORTED settings to speed/duplex */ -+/* A mapping of all SUPPORTED settings to speed/duplex. This table -+ * must be grouped by speed and sorted in descending match priority -+ * - iow, descending speed. */ - static const struct phy_setting settings[] = { - { - .speed = SPEED_10000, -@@ -219,45 +221,70 @@ static const struct phy_setting settings - }, - }; - --#define MAX_NUM_SETTINGS ARRAY_SIZE(settings) -- - /** -- * phy_find_setting - find a PHY settings array entry that matches speed & duplex -+ * phy_lookup_setting - lookup a PHY setting - * @speed: speed to match - * @duplex: duplex to match -+ * @feature: allowed link modes -+ * @exact: an exact match is required -+ * -+ * Search the settings array for a setting that matches the speed and -+ * duplex, and which is supported. -+ * -+ * If @exact is unset, either an exact match or %NULL for no match will -+ * be returned. - * -- * Description: Searches the settings array for the setting which -- * matches the desired speed and duplex, and returns the index -- * of that setting. Returns the index of the last setting if -- * none of the others match. -+ * If @exact is set, an exact match, the fastest supported setting at -+ * or below the specified speed, the slowest supported setting, or if -+ * they all fail, %NULL will be returned. - */ --static inline unsigned int phy_find_setting(int speed, int duplex) -+static const struct phy_setting * -+phy_lookup_setting(int speed, int duplex, u32 features, bool exact) - { -- unsigned int idx = 0; -+ const struct phy_setting *p, *match = NULL, *last = NULL; -+ int i; - -- while (idx < ARRAY_SIZE(settings) && -- (settings[idx].speed != speed || settings[idx].duplex != duplex)) -- idx++; -+ for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { -+ if (p->setting & features) { -+ last = p; -+ if (p->speed == speed && p->duplex == duplex) { -+ /* Exact match for speed and duplex */ -+ match = p; -+ break; -+ } else if (!exact) { -+ if (!match && p->speed <= speed) -+ /* Candidate */ -+ match = p; -+ -+ if (p->speed < speed) -+ break; -+ } -+ } -+ } - -- return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1; -+ if (!match && !exact) -+ match = last; -+ -+ return match; - } - - /** -- * phy_find_valid - find a PHY setting that matches the requested features mask -- * @idx: The first index in settings[] to search -- * @features: A mask of the valid settings -+ * phy_find_valid - find a PHY setting that matches the requested parameters -+ * @speed: desired speed -+ * @duplex: desired duplex -+ * @supported: mask of supported link modes - * -- * Description: Returns the index of the first valid setting less -- * than or equal to the one pointed to by idx, as determined by -- * the mask in features. Returns the index of the last setting -- * if nothing else matches. -+ * Locate a supported phy setting that is, in priority order: -+ * - an exact match for the specified speed and duplex mode -+ * - a match for the specified speed, or slower speed -+ * - the slowest supported speed -+ * Returns the matched phy_setting entry, or %NULL if no supported phy -+ * settings were found. - */ --static inline unsigned int phy_find_valid(unsigned int idx, u32 features) -+static const struct phy_setting * -+phy_find_valid(int speed, int duplex, u32 supported) - { -- while (idx < MAX_NUM_SETTINGS && !(settings[idx].setting & features)) -- idx++; -- -- return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1; -+ return phy_lookup_setting(speed, duplex, supported, false); - } - - /** -@@ -271,12 +298,7 @@ static inline unsigned int phy_find_vali - */ - static inline bool phy_check_valid(int speed, int duplex, u32 features) - { -- unsigned int idx; -- -- idx = phy_find_valid(phy_find_setting(speed, duplex), features); -- -- return settings[idx].speed == speed && settings[idx].duplex == duplex && -- (settings[idx].setting & features); -+ return !!phy_lookup_setting(speed, duplex, features, true); - } - - /** -@@ -289,18 +311,22 @@ static inline bool phy_check_valid(int s - */ - static void phy_sanitize_settings(struct phy_device *phydev) - { -+ const struct phy_setting *setting; - u32 features = phydev->supported; -- unsigned int idx; - - /* Sanitize settings based on PHY capabilities */ - if ((features & SUPPORTED_Autoneg) == 0) - phydev->autoneg = AUTONEG_DISABLE; - -- idx = phy_find_valid(phy_find_setting(phydev->speed, phydev->duplex), -- features); -- -- phydev->speed = settings[idx].speed; -- phydev->duplex = settings[idx].duplex; -+ setting = phy_find_valid(phydev->speed, phydev->duplex, features); -+ if (setting) { -+ phydev->speed = setting->speed; -+ phydev->duplex = setting->duplex; -+ } else { -+ /* We failed to find anything (no supported speeds?) */ -+ phydev->speed = SPEED_UNKNOWN; -+ phydev->duplex = DUPLEX_UNKNOWN; -+ } - } - - /** diff --git a/target/linux/mvebu/patches-4.9/407-net-phy-add-802.3-clause-45-support-to-phylib.patch b/target/linux/mvebu/patches-4.9/407-net-phy-add-802.3-clause-45-support-to-phylib.patch deleted file mode 100644 index fcf73e429..000000000 --- a/target/linux/mvebu/patches-4.9/407-net-phy-add-802.3-clause-45-support-to-phylib.patch +++ /dev/null @@ -1,323 +0,0 @@ -From: Russell King -Date: Thu, 29 Dec 2016 11:03:09 +0000 -Subject: [PATCH] net: phy: add 802.3 clause 45 support to phylib - -Add generic helpers for 802.3 clause 45 PHYs for >= 10Gbps support. - -Signed-off-by: Russell King ---- - create mode 100644 drivers/net/phy/phy-c45.c - ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -1,7 +1,7 @@ - # Makefile for Linux PHY drivers and MDIO bus drivers - - libphy-y := phy.o phy_device.o mdio_bus.o mdio_device.o \ -- phy-core.o -+ phy-c45.o phy-core.o - libphy-$(CONFIG_SWPHY) += swphy.o - - obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o ---- /dev/null -+++ b/drivers/net/phy/phy-c45.c -@@ -0,0 +1,234 @@ -+/* -+ * Clause 45 PHY support -+ */ -+#include -+#include -+#include -+#include -+#include -+ -+/** -+ * genphy_c45_setup_forced - configures a forced speed -+ * @phydev: target phy_device struct -+ */ -+int genphy_c45_pma_setup_forced(struct phy_device *phydev) -+{ -+ int ctrl1, ctrl2, ret; -+ -+ /* Half duplex is not supported */ -+ if (phydev->duplex != DUPLEX_FULL) -+ return -EINVAL; -+ -+ ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); -+ if (ctrl1 < 0) -+ return ctrl1; -+ -+ ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2); -+ if (ctrl2 < 0) -+ return ctrl2; -+ -+ ctrl1 &= ~MDIO_CTRL1_SPEEDSEL; -+ /* PMA/PMD type selection is 1.7.5:0 not 1.7.3:0. See 45.2.1.6.1. */ -+ ctrl2 &= ~(MDIO_PMA_CTRL2_TYPE | 0x30); -+ -+ switch (phydev->speed) { -+ case SPEED_10: -+ ctrl2 |= MDIO_PMA_CTRL2_10BT; -+ break; -+ case SPEED_100: -+ ctrl1 |= MDIO_PMA_CTRL1_SPEED100; -+ ctrl2 |= MDIO_PMA_CTRL2_100BTX; -+ break; -+ case SPEED_1000: -+ ctrl1 |= MDIO_PMA_CTRL1_SPEED1000; -+ /* Assume 1000base-T */ -+ ctrl2 |= MDIO_PMA_CTRL2_1000BT; -+ break; -+ case SPEED_10000: -+ ctrl1 |= MDIO_CTRL1_SPEED10G; -+ /* Assume 10Gbase-T */ -+ ctrl2 |= MDIO_PMA_CTRL2_10GBT; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1); -+ if (ret < 0) -+ return ret; -+ -+ return phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2); -+} -+EXPORT_SYMBOL_GPL(genphy_c45_pma_setup_forced); -+ -+/** -+ * genphy_c45_an_disable_aneg - disable auto-negotiation -+ * @phydev: target phy_device struct -+ * -+ * Disable auto-negotiation in the Clause 45 PHY. The link parameters -+ * parameters are controlled through the PMA/PMD MMD registers. -+ * -+ * Returns zero on success, negative errno code on failure. -+ */ -+int genphy_c45_an_disable_aneg(struct phy_device *phydev) -+{ -+ int val; -+ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); -+ if (val < 0) -+ return val; -+ -+ val &= ~(MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART); -+ -+ return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val); -+} -+EXPORT_SYMBOL_GPL(genphy_c45_an_disable_aneg); -+ -+/** -+ * genphy_c45_restart_aneg - Enable and restart auto-negotiation -+ * @phydev: target phy_device struct -+ * -+ * This assumes that the auto-negotiation MMD is present. -+ * -+ * Enable and restart auto-negotiation. -+ */ -+int genphy_c45_restart_aneg(struct phy_device *phydev) -+{ -+ int val; -+ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); -+ if (val < 0) -+ return val; -+ -+ val |= MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART; -+ -+ return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val); -+} -+EXPORT_SYMBOL_GPL(genphy_c45_restart_aneg); -+ -+/** -+ * genphy_c45_aneg_done - return auto-negotiation complete status -+ * @phydev: target phy_device struct -+ * -+ * This assumes that the auto-negotiation MMD is present. -+ * -+ * Reads the status register from the auto-negotiation MMD, returning: -+ * - positive if auto-negotiation is complete -+ * - negative errno code on error -+ * - zero otherwise -+ */ -+int genphy_c45_aneg_done(struct phy_device *phydev) -+{ -+ int val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); -+ -+ return val < 0 ? val : val & MDIO_AN_STAT1_COMPLETE ? 1 : 0; -+} -+EXPORT_SYMBOL_GPL(genphy_c45_aneg_done); -+ -+/** -+ * genphy_c45_read_link - read the overall link status from the MMDs -+ * @phydev: target phy_device struct -+ * @mmd_mask: MMDs to read status from -+ * -+ * Read the link status from the specified MMDs, and if they all indicate -+ * that the link is up, return positive. If an error is encountered, -+ * a negative errno will be returned, otherwise zero. -+ */ -+int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask) -+{ -+ int val, devad; -+ bool link = true; -+ -+ while (mmd_mask) { -+ devad = __ffs(mmd_mask); -+ mmd_mask &= ~BIT(devad); -+ -+ val = phy_read_mmd(phydev, devad, MDIO_STAT1); -+ if (val < 0) -+ return val; -+ -+ /* Read twice because link state is latched and a -+ * read moves the current state into the register -+ */ -+ val = phy_read_mmd(phydev, devad, MDIO_STAT1); -+ if (val < 0) -+ return val; -+ -+ if (!(val & MDIO_STAT1_LSTATUS)) -+ link = false; -+ } -+ -+ return link; -+} -+EXPORT_SYMBOL_GPL(genphy_c45_read_link); -+ -+/** -+ * genphy_c45_read_lpa - read the link partner advertisment and pause -+ * @phydev: target phy_device struct -+ * -+ * Read the Clause 45 defined base (7.19) and 10G (7.33) status registers, -+ * filling in the link partner advertisment, pause and asym_pause members -+ * in @phydev. This assumes that the auto-negotiation MMD is present, and -+ * the backplane bit (7.48.0) is clear. Clause 45 PHY drivers are expected -+ * to fill in the remainder of the link partner advert from vendor registers. -+ */ -+int genphy_c45_read_lpa(struct phy_device *phydev) -+{ -+ int val; -+ -+ /* Read the link partner's base page advertisment */ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); -+ if (val < 0) -+ return val; -+ -+ phydev->lp_advertising = mii_lpa_to_ethtool_lpa_t(val); -+ phydev->pause = val & LPA_PAUSE_CAP ? 1 : 0; -+ phydev->asym_pause = val & LPA_PAUSE_ASYM ? 1 : 0; -+ -+ /* Read the link partner's 10G advertisment */ -+ val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); -+ if (val < 0) -+ return val; -+ -+ if (val & MDIO_AN_10GBT_STAT_LP10G) -+ phydev->lp_advertising |= ADVERTISED_10000baseT_Full; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(genphy_c45_read_lpa); -+ -+/** -+ * genphy_c45_read_pma - read link speed etc from PMA -+ * @phydev: target phy_device struct -+ */ -+int genphy_c45_read_pma(struct phy_device *phydev) -+{ -+ int val; -+ -+ val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); -+ if (val < 0) -+ return val; -+ -+ switch (val & MDIO_CTRL1_SPEEDSEL) { -+ case 0: -+ phydev->speed = SPEED_10; -+ break; -+ case MDIO_PMA_CTRL1_SPEED100: -+ phydev->speed = SPEED_100; -+ break; -+ case MDIO_PMA_CTRL1_SPEED1000: -+ phydev->speed = SPEED_1000; -+ break; -+ case MDIO_CTRL1_SPEED10G: -+ phydev->speed = SPEED_10000; -+ break; -+ default: -+ phydev->speed = SPEED_UNKNOWN; -+ break; -+ } -+ -+ phydev->duplex = DUPLEX_FULL; -+ -+ return 0; -+} -+EXPORT_SYMBOL_GPL(genphy_c45_read_pma); ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1452,27 +1452,19 @@ EXPORT_SYMBOL(genphy_read_status); - - static int gen10g_read_status(struct phy_device *phydev) - { -- int devad, reg; - u32 mmd_mask = phydev->c45_ids.devices_in_package; -- -- phydev->link = 1; -+ int ret; - - /* For now just lie and say it's 10G all the time */ - phydev->speed = SPEED_10000; - phydev->duplex = DUPLEX_FULL; - -- for (devad = 0; mmd_mask; devad++, mmd_mask = mmd_mask >> 1) { -- if (!(mmd_mask & 1)) -- continue; -- -- /* Read twice because link state is latched and a -- * read moves the current state into the register -- */ -- phy_read_mmd(phydev, devad, MDIO_STAT1); -- reg = phy_read_mmd(phydev, devad, MDIO_STAT1); -- if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS)) -- phydev->link = 0; -- } -+ /* Avoid reading the vendor MMDs */ -+ mmd_mask &= ~(BIT(MDIO_MMD_VEND1) | BIT(MDIO_MMD_VEND2)); -+ -+ ret = genphy_c45_read_link(phydev, mmd_mask); -+ -+ phydev->link = ret > 0 ? 1 : 0; - - return 0; - } ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -817,6 +817,8 @@ static inline const char *phydev_name(co - void phy_attached_print(struct phy_device *phydev, const char *fmt, ...) - __printf(2, 3); - void phy_attached_info(struct phy_device *phydev); -+ -+/* Clause 22 PHY */ - int genphy_config_init(struct phy_device *phydev); - int genphy_setup_forced(struct phy_device *phydev); - int genphy_restart_aneg(struct phy_device *phydev); -@@ -831,6 +833,16 @@ static inline int genphy_no_soft_reset(s - { - return 0; - } -+ -+/* Clause 45 PHY */ -+int genphy_c45_restart_aneg(struct phy_device *phydev); -+int genphy_c45_aneg_done(struct phy_device *phydev); -+int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask); -+int genphy_c45_read_lpa(struct phy_device *phydev); -+int genphy_c45_read_pma(struct phy_device *phydev); -+int genphy_c45_pma_setup_forced(struct phy_device *phydev); -+int genphy_c45_an_disable_aneg(struct phy_device *phydev); -+ - void phy_driver_unregister(struct phy_driver *drv); - void phy_drivers_unregister(struct phy_driver *drv, int n); - int phy_driver_register(struct phy_driver *new_driver, struct module *owner); diff --git a/target/linux/mvebu/patches-4.9/408-net-phy-hook-up-clause-45-autonegotiation-restart.patch b/target/linux/mvebu/patches-4.9/408-net-phy-hook-up-clause-45-autonegotiation-restart.patch deleted file mode 100644 index 3c4618b60..000000000 --- a/target/linux/mvebu/patches-4.9/408-net-phy-hook-up-clause-45-autonegotiation-restart.patch +++ /dev/null @@ -1,54 +0,0 @@ -From: Russell King -Date: Fri, 13 Jan 2017 11:17:30 +0000 -Subject: [PATCH] net: phy: hook up clause 45 autonegotiation restart - -genphy_restart_aneg() can only restart autonegotiation on clause 22 -PHYs. Add a phy_restart_aneg() function which selects between the -clause 22 and clause 45 restart functionality depending on the PHY -type. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -134,6 +134,24 @@ static int phy_config_interrupt(struct p - return 0; - } - -+/** -+ * phy_restart_aneg - restart auto-negotiation -+ * @phydev: target phy_device struct -+ * -+ * Restart the autonegotiation on @phydev. Returns >= 0 on success or -+ * negative errno on error. -+ */ -+static int phy_restart_aneg(struct phy_device *phydev) -+{ -+ int ret; -+ -+ if (phydev->is_c45) -+ ret = genphy_c45_restart_aneg(phydev); -+ else -+ ret = genphy_restart_aneg(phydev); -+ -+ return ret; -+} - - /** - * phy_aneg_done - return auto-negotiation status -@@ -1451,3 +1469,14 @@ int phy_ethtool_set_link_ksettings(struc - return phy_ethtool_ksettings_set(phydev, cmd); - } - EXPORT_SYMBOL(phy_ethtool_set_link_ksettings); -+ -+int phy_ethtool_nway_reset(struct net_device *ndev) -+{ -+ struct phy_device *phydev = ndev->phydev; -+ -+ if (!phydev) -+ return -ENODEV; -+ -+ return phy_restart_aneg(phydev); -+} -+EXPORT_SYMBOL(phy_ethtool_nway_reset); diff --git a/target/linux/mvebu/patches-4.9/409-net-phy-don-t-double-read-clause-45-status-register.patch b/target/linux/mvebu/patches-4.9/409-net-phy-don-t-double-read-clause-45-status-register.patch deleted file mode 100644 index ee53fe038..000000000 --- a/target/linux/mvebu/patches-4.9/409-net-phy-don-t-double-read-clause-45-status-register.patch +++ /dev/null @@ -1,35 +0,0 @@ -From: Russell King -Date: Thu, 5 Jan 2017 00:23:40 +0000 -Subject: [PATCH] net: phy: don't double-read clause 45 status register - -One of the design decisions behind the link status bit in the status -register is that it latches low on link loss. This is so that link loss -events are not missed. Double-reading the status register means that we -always read the current state of the link, clearing any link loss event. - -This can cause problems - for example, if the link has negotiated a -different set of operating parameters, these will not be communicated -to the MAC as the PHY state machine will still think that the link has -remained active. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy-c45.c -+++ b/drivers/net/phy/phy-c45.c -@@ -143,12 +143,9 @@ int genphy_c45_read_link(struct phy_devi - devad = __ffs(mmd_mask); - mmd_mask &= ~BIT(devad); - -- val = phy_read_mmd(phydev, devad, MDIO_STAT1); -- if (val < 0) -- return val; -- -- /* Read twice because link state is latched and a -- * read moves the current state into the register -+ /* The link state is latched low so that momentary link -+ * drops can be detected. Do not double-read the status -+ * register if the link is down. - */ - val = phy_read_mmd(phydev, devad, MDIO_STAT1); - if (val < 0) diff --git a/target/linux/mvebu/patches-4.9/410-net-phy-allow-settings-table-to-support-more-than-32.patch b/target/linux/mvebu/patches-4.9/410-net-phy-allow-settings-table-to-support-more-than-32.patch deleted file mode 100644 index b6d850577..000000000 --- a/target/linux/mvebu/patches-4.9/410-net-phy-allow-settings-table-to-support-more-than-32.patch +++ /dev/null @@ -1,142 +0,0 @@ -From: Russell King -Date: Thu, 5 Jan 2017 16:32:14 +0000 -Subject: [PATCH] net: phy: allow settings table to support more than 32 - link modes - -Allow the phy settings table to support more than 32 link modes by -switching to the ethtool link mode bit number representation, rather -than storing the mask. This will allow phylink and other ethtool -code to share the settings table to look up settings. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -175,7 +175,7 @@ static inline int phy_aneg_done(struct p - struct phy_setting { - int speed; - int duplex; -- u32 setting; -+ int bit; - }; - - /* A mapping of all SUPPORTED settings to speed/duplex. This table -@@ -185,57 +185,57 @@ static const struct phy_setting settings - { - .speed = SPEED_10000, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_10000baseKR_Full, -+ .bit = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, - }, - { - .speed = SPEED_10000, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_10000baseKX4_Full, -+ .bit = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, - }, - { - .speed = SPEED_10000, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_10000baseT_Full, -+ .bit = ETHTOOL_LINK_MODE_10000baseT_Full_BIT, - }, - { - .speed = SPEED_2500, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_2500baseX_Full, -+ .bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT, - }, - { - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_1000baseKX_Full, -+ .bit = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, - }, - { - .speed = SPEED_1000, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_1000baseT_Full, -+ .bit = ETHTOOL_LINK_MODE_1000baseT_Full_BIT, - }, - { - .speed = SPEED_1000, - .duplex = DUPLEX_HALF, -- .setting = SUPPORTED_1000baseT_Half, -+ .bit = ETHTOOL_LINK_MODE_1000baseT_Half_BIT, - }, - { - .speed = SPEED_100, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_100baseT_Full, -+ .bit = ETHTOOL_LINK_MODE_100baseT_Full_BIT, - }, - { - .speed = SPEED_100, - .duplex = DUPLEX_HALF, -- .setting = SUPPORTED_100baseT_Half, -+ .bit = ETHTOOL_LINK_MODE_100baseT_Half_BIT, - }, - { - .speed = SPEED_10, - .duplex = DUPLEX_FULL, -- .setting = SUPPORTED_10baseT_Full, -+ .bit = ETHTOOL_LINK_MODE_10baseT_Full_BIT, - }, - { - .speed = SPEED_10, - .duplex = DUPLEX_HALF, -- .setting = SUPPORTED_10baseT_Half, -+ .bit = ETHTOOL_LINK_MODE_10baseT_Half_BIT, - }, - }; - -@@ -243,7 +243,8 @@ static const struct phy_setting settings - * phy_lookup_setting - lookup a PHY setting - * @speed: speed to match - * @duplex: duplex to match -- * @feature: allowed link modes -+ * @mask: allowed link modes -+ * @maxbit: bit size of link modes - * @exact: an exact match is required - * - * Search the settings array for a setting that matches the speed and -@@ -257,13 +258,14 @@ static const struct phy_setting settings - * they all fail, %NULL will be returned. - */ - static const struct phy_setting * --phy_lookup_setting(int speed, int duplex, u32 features, bool exact) -+phy_lookup_setting(int speed, int duplex, const unsigned long *mask, -+ size_t maxbit, bool exact) - { - const struct phy_setting *p, *match = NULL, *last = NULL; - int i; - - for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { -- if (p->setting & features) { -+ if (p->bit < maxbit && test_bit(p->bit, mask)) { - last = p; - if (p->speed == speed && p->duplex == duplex) { - /* Exact match for speed and duplex */ -@@ -302,7 +304,9 @@ phy_lookup_setting(int speed, int duplex - static const struct phy_setting * - phy_find_valid(int speed, int duplex, u32 supported) - { -- return phy_lookup_setting(speed, duplex, supported, false); -+ unsigned long mask = supported; -+ -+ return phy_lookup_setting(speed, duplex, &mask, BITS_PER_LONG, false); - } - - /** -@@ -316,7 +320,9 @@ phy_find_valid(int speed, int duplex, u3 - */ - static inline bool phy_check_valid(int speed, int duplex, u32 features) - { -- return !!phy_lookup_setting(speed, duplex, features, true); -+ unsigned long mask = features; -+ -+ return !!phy_lookup_setting(speed, duplex, &mask, BITS_PER_LONG, true); - } - - /** diff --git a/target/linux/mvebu/patches-4.9/411-net-phy-split-out-PHY-speed-and-duplex-string-genera.patch b/target/linux/mvebu/patches-4.9/411-net-phy-split-out-PHY-speed-and-duplex-string-genera.patch deleted file mode 100644 index 2f0039b11..000000000 --- a/target/linux/mvebu/patches-4.9/411-net-phy-split-out-PHY-speed-and-duplex-string-genera.patch +++ /dev/null @@ -1,103 +0,0 @@ -From: Russell King -Date: Mon, 2 Jan 2017 17:52:18 +0000 -Subject: [PATCH] net: phy: split out PHY speed and duplex string - generation - -Other code would like to make use of this, so make the speed and duplex -string generation visible, and place it in a separate file. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -38,26 +38,6 @@ - - #include - --static const char *phy_speed_to_str(int speed) --{ -- switch (speed) { -- case SPEED_10: -- return "10Mbps"; -- case SPEED_100: -- return "100Mbps"; -- case SPEED_1000: -- return "1Gbps"; -- case SPEED_2500: -- return "2.5Gbps"; -- case SPEED_10000: -- return "10Gbps"; -- case SPEED_UNKNOWN: -- return "Unknown"; -- default: -- return "Unsupported (update phy.c)"; -- } --} -- - #define PHY_STATE_STR(_state) \ - case PHY_##_state: \ - return __stringify(_state); \ -@@ -93,7 +73,7 @@ void phy_print_status(struct phy_device - netdev_info(phydev->attached_dev, - "Link is Up - %s/%s - flow control %s\n", - phy_speed_to_str(phydev->speed), -- DUPLEX_FULL == phydev->duplex ? "Full" : "Half", -+ phy_duplex_to_str(phydev->duplex), - phydev->pause ? "rx/tx" : "off"); - } else { - netdev_info(phydev->attached_dev, "Link is Down\n"); ---- a/drivers/net/phy/phy-core.c -+++ b/drivers/net/phy/phy-core.c -@@ -9,6 +9,39 @@ - #include - #include - -+const char *phy_speed_to_str(int speed) -+{ -+ switch (speed) { -+ case SPEED_10: -+ return "10Mbps"; -+ case SPEED_100: -+ return "100Mbps"; -+ case SPEED_1000: -+ return "1Gbps"; -+ case SPEED_2500: -+ return "2.5Gbps"; -+ case SPEED_10000: -+ return "10Gbps"; -+ case SPEED_UNKNOWN: -+ return "Unknown"; -+ default: -+ return "Unsupported (update phy-core.c)"; -+ } -+} -+EXPORT_SYMBOL_GPL(phy_speed_to_str); -+ -+const char *phy_duplex_to_str(unsigned int duplex) -+{ -+ if (duplex == DUPLEX_HALF) -+ return "Half"; -+ if (duplex == DUPLEX_FULL) -+ return "Full"; -+ if (duplex == DUPLEX_UNKNOWN) -+ return "Unknown"; -+ return "Unsupported (update phy-core.c)"; -+} -+EXPORT_SYMBOL_GPL(phy_duplex_to_str); -+ - static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad, - int addr) - { ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -641,6 +641,9 @@ struct phy_fixup { - int (*run)(struct phy_device *phydev); - }; - -+const char *phy_speed_to_str(int speed); -+const char *phy_duplex_to_str(unsigned int duplex); -+ - /** - * phy_read_mmd - Convenience function for reading a register - * from an MMD on a given PHY. diff --git a/target/linux/mvebu/patches-4.9/412-net-phy-move-phy_lookup_setting-and-guts-of-phy_supp.patch b/target/linux/mvebu/patches-4.9/412-net-phy-move-phy_lookup_setting-and-guts-of-phy_supp.patch deleted file mode 100644 index 8ead41cd6..000000000 --- a/target/linux/mvebu/patches-4.9/412-net-phy-move-phy_lookup_setting-and-guts-of-phy_supp.patch +++ /dev/null @@ -1,329 +0,0 @@ -From: Russell King -Date: Thu, 5 Jan 2017 16:47:39 +0000 -Subject: [PATCH] net: phy: move phy_lookup_setting() and guts of - phy_supported_speeds() to phy-core - -phy_lookup_setting() provides useful functionality in ethtool code -outside phylib. Move it to phy-core and allow it to be re-used (eg, -in phylink) rather than duplicated elsewhere. Note that this supports -the larger linkmode space. - -As we move the phy settings table, we also need to move the guts of -phy_supported_speeds() as well. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -149,125 +149,6 @@ static inline int phy_aneg_done(struct p - return genphy_aneg_done(phydev); - } - --/* A structure for mapping a particular speed and duplex -- * combination to a particular SUPPORTED and ADVERTISED value -- */ --struct phy_setting { -- int speed; -- int duplex; -- int bit; --}; -- --/* A mapping of all SUPPORTED settings to speed/duplex. This table -- * must be grouped by speed and sorted in descending match priority -- * - iow, descending speed. */ --static const struct phy_setting settings[] = { -- { -- .speed = SPEED_10000, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, -- }, -- { -- .speed = SPEED_10000, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, -- }, -- { -- .speed = SPEED_10000, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_10000baseT_Full_BIT, -- }, -- { -- .speed = SPEED_2500, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT, -- }, -- { -- .speed = SPEED_1000, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, -- }, -- { -- .speed = SPEED_1000, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_1000baseT_Full_BIT, -- }, -- { -- .speed = SPEED_1000, -- .duplex = DUPLEX_HALF, -- .bit = ETHTOOL_LINK_MODE_1000baseT_Half_BIT, -- }, -- { -- .speed = SPEED_100, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_100baseT_Full_BIT, -- }, -- { -- .speed = SPEED_100, -- .duplex = DUPLEX_HALF, -- .bit = ETHTOOL_LINK_MODE_100baseT_Half_BIT, -- }, -- { -- .speed = SPEED_10, -- .duplex = DUPLEX_FULL, -- .bit = ETHTOOL_LINK_MODE_10baseT_Full_BIT, -- }, -- { -- .speed = SPEED_10, -- .duplex = DUPLEX_HALF, -- .bit = ETHTOOL_LINK_MODE_10baseT_Half_BIT, -- }, --}; -- --/** -- * phy_lookup_setting - lookup a PHY setting -- * @speed: speed to match -- * @duplex: duplex to match -- * @mask: allowed link modes -- * @maxbit: bit size of link modes -- * @exact: an exact match is required -- * -- * Search the settings array for a setting that matches the speed and -- * duplex, and which is supported. -- * -- * If @exact is unset, either an exact match or %NULL for no match will -- * be returned. -- * -- * If @exact is set, an exact match, the fastest supported setting at -- * or below the specified speed, the slowest supported setting, or if -- * they all fail, %NULL will be returned. -- */ --static const struct phy_setting * --phy_lookup_setting(int speed, int duplex, const unsigned long *mask, -- size_t maxbit, bool exact) --{ -- const struct phy_setting *p, *match = NULL, *last = NULL; -- int i; -- -- for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { -- if (p->bit < maxbit && test_bit(p->bit, mask)) { -- last = p; -- if (p->speed == speed && p->duplex == duplex) { -- /* Exact match for speed and duplex */ -- match = p; -- break; -- } else if (!exact) { -- if (!match && p->speed <= speed) -- /* Candidate */ -- match = p; -- -- if (p->speed < speed) -- break; -- } -- } -- } -- -- if (!match && !exact) -- match = last; -- -- return match; --} -- - /** - * phy_find_valid - find a PHY setting that matches the requested parameters - * @speed: desired speed -@@ -290,6 +171,25 @@ phy_find_valid(int speed, int duplex, u3 - } - - /** -+ * phy_supported_speeds - return all speeds currently supported by a phy device -+ * @phy: The phy device to return supported speeds of. -+ * @speeds: buffer to store supported speeds in. -+ * @size: size of speeds buffer. -+ * -+ * Description: Returns the number of supported speeds, and fills the speeds -+ * buffer with the supported speeds. If speeds buffer is too small to contain -+ * all currently supported speeds, will return as many speeds as can fit. -+ */ -+unsigned int phy_supported_speeds(struct phy_device *phy, -+ unsigned int *speeds, -+ unsigned int size) -+{ -+ unsigned long supported = phy->supported; -+ -+ return phy_speeds(speeds, size, &supported, BITS_PER_LONG); -+} -+ -+/** - * phy_check_valid - check if there is a valid PHY setting which matches - * speed, duplex, and feature mask - * @speed: speed to match ---- a/drivers/net/phy/phy-core.c -+++ b/drivers/net/phy/phy-core.c -@@ -42,6 +42,132 @@ const char *phy_duplex_to_str(unsigned i - } - EXPORT_SYMBOL_GPL(phy_duplex_to_str); - -+/* A mapping of all SUPPORTED settings to speed/duplex. This table -+ * must be grouped by speed and sorted in descending match priority -+ * - iow, descending speed. */ -+static const struct phy_setting settings[] = { -+ { -+ .speed = SPEED_10000, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, -+ }, -+ { -+ .speed = SPEED_10000, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, -+ }, -+ { -+ .speed = SPEED_10000, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_10000baseT_Full_BIT, -+ }, -+ { -+ .speed = SPEED_2500, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT, -+ }, -+ { -+ .speed = SPEED_1000, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, -+ }, -+ { -+ .speed = SPEED_1000, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_1000baseT_Full_BIT, -+ }, -+ { -+ .speed = SPEED_1000, -+ .duplex = DUPLEX_HALF, -+ .bit = ETHTOOL_LINK_MODE_1000baseT_Half_BIT, -+ }, -+ { -+ .speed = SPEED_100, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_100baseT_Full_BIT, -+ }, -+ { -+ .speed = SPEED_100, -+ .duplex = DUPLEX_HALF, -+ .bit = ETHTOOL_LINK_MODE_100baseT_Half_BIT, -+ }, -+ { -+ .speed = SPEED_10, -+ .duplex = DUPLEX_FULL, -+ .bit = ETHTOOL_LINK_MODE_10baseT_Full_BIT, -+ }, -+ { -+ .speed = SPEED_10, -+ .duplex = DUPLEX_HALF, -+ .bit = ETHTOOL_LINK_MODE_10baseT_Half_BIT, -+ }, -+}; -+ -+/** -+ * phy_lookup_setting - lookup a PHY setting -+ * @speed: speed to match -+ * @duplex: duplex to match -+ * @mask: allowed link modes -+ * @maxbit: bit size of link modes -+ * @exact: an exact match is required -+ * -+ * Search the settings array for a setting that matches the speed and -+ * duplex, and which is supported. -+ * -+ * If @exact is unset, either an exact match or %NULL for no match will -+ * be returned. -+ * -+ * If @exact is set, an exact match, the fastest supported setting at -+ * or below the specified speed, the slowest supported setting, or if -+ * they all fail, %NULL will be returned. -+ */ -+const struct phy_setting * -+phy_lookup_setting(int speed, int duplex, const unsigned long *mask, -+ size_t maxbit, bool exact) -+{ -+ const struct phy_setting *p, *match = NULL, *last = NULL; -+ int i; -+ -+ for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) { -+ if (p->bit < maxbit && test_bit(p->bit, mask)) { -+ last = p; -+ if (p->speed == speed && p->duplex == duplex) { -+ /* Exact match for speed and duplex */ -+ match = p; -+ break; -+ } else if (!exact) { -+ if (!match && p->speed <= speed) -+ /* Candidate */ -+ match = p; -+ -+ if (p->speed < speed) -+ break; -+ } -+ } -+ } -+ -+ if (!match && !exact) -+ match = last; -+ -+ return match; -+} -+EXPORT_SYMBOL_GPL(phy_lookup_setting); -+ -+size_t phy_speeds(unsigned int *speeds, size_t size, -+ unsigned long *mask, size_t maxbit) -+{ -+ size_t count; -+ int i; -+ -+ for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++) -+ if (settings[i].bit < maxbit && -+ test_bit(settings[i].bit, mask) && -+ (count == 0 || speeds[count - 1] != settings[i].speed)) -+ speeds[count++] = settings[i].speed; -+ -+ return count; -+} -+ - static inline void mmd_phy_indirect(struct mii_bus *bus, int prtad, int devad, - int addr) - { ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -644,6 +644,21 @@ struct phy_fixup { - const char *phy_speed_to_str(int speed); - const char *phy_duplex_to_str(unsigned int duplex); - -+/* A structure for mapping a particular speed and duplex -+ * combination to a particular SUPPORTED and ADVERTISED value -+ */ -+struct phy_setting { -+ u32 speed; -+ u8 duplex; -+ u8 bit; -+}; -+ -+const struct phy_setting * -+phy_lookup_setting(int speed, int duplex, const unsigned long *mask, -+ size_t maxbit, bool exact); -+size_t phy_speeds(unsigned int *speeds, size_t size, -+ unsigned long *mask, size_t maxbit); -+ - /** - * phy_read_mmd - Convenience function for reading a register - * from an MMD on a given PHY. diff --git a/target/linux/mvebu/patches-4.9/413-phy-export-phy_start_machine-for-phylink.patch b/target/linux/mvebu/patches-4.9/413-phy-export-phy_start_machine-for-phylink.patch deleted file mode 100644 index 44cf92439..000000000 --- a/target/linux/mvebu/patches-4.9/413-phy-export-phy_start_machine-for-phylink.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Russell King -Date: Fri, 16 Oct 2015 12:18:41 +0100 -Subject: [PATCH] phy: export phy_start_machine() for phylink - -phylink will need phy_start_machine exported, so lets export it as a -GPL symbol. Documentation/networking/phy.txt indicates that this -should be a PHY API function. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phy.c -+++ b/drivers/net/phy/phy.c -@@ -612,6 +612,7 @@ void phy_start_machine(struct phy_device - { - queue_delayed_work(system_power_efficient_wq, &phydev->state_queue, HZ); - } -+EXPORT_SYMBOL_GPL(phy_start_machine); - - /** - * phy_trigger_machine - trigger the state machine to run diff --git a/target/linux/mvebu/patches-4.9/414-phy-add-I2C-mdio-bus.patch b/target/linux/mvebu/patches-4.9/414-phy-add-I2C-mdio-bus.patch deleted file mode 100644 index c389817c6..000000000 --- a/target/linux/mvebu/patches-4.9/414-phy-add-I2C-mdio-bus.patch +++ /dev/null @@ -1,180 +0,0 @@ -From: Russell King -Date: Fri, 25 Sep 2015 17:43:52 +0100 -Subject: [PATCH] phy: add I2C mdio bus - -Add an I2C MDIO bus bridge library, to allow phylib to access PHYs which -are connected to an I2C bus instead of the more conventional MDIO bus. -Such PHYs can be found in SFP adapters and SFF modules. - -Since PHYs appear at I2C bus address 0x40..0x5f, and 0x50/0x51 are -reserved for SFP EEPROMs/diagnostics, we must not allow the MDIO bus -to access these I2C addresses. - -Signed-off-by: Russell King ---- - create mode 100644 drivers/net/phy/mdio-i2c.c - create mode 100644 drivers/net/phy/mdio-i2c.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -105,6 +105,16 @@ config MDIO_HISI_FEMAC - This module provides a driver for the MDIO busses found in the - Hisilicon SoC that have an Fast Ethernet MAC. - -+config MDIO_I2C -+ tristate -+ depends on I2C -+ help -+ Support I2C based PHYs. This provides a MDIO bus bridged -+ to I2C to allow PHYs connected in I2C mode to be accessed -+ using the existing infrastructure. -+ -+ This is library mode. -+ - config MDIO_MOXART - tristate "MOXA ART MDIO interface support" - depends on ARCH_MOXART ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -33,6 +33,7 @@ obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += md - obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o - obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o - obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o -+obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o - obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o - obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o - obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o ---- /dev/null -+++ b/drivers/net/phy/mdio-i2c.c -@@ -0,0 +1,109 @@ -+/* -+ * MDIO I2C bridge -+ * -+ * Copyright (C) 2015-2016 Russell King -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * Network PHYs can appear on I2C buses when they are part of SFP module. -+ * This driver exposes these PHYs to the networking PHY code, allowing -+ * our PHY drivers access to these PHYs, and so allowing configuration -+ * of their settings. -+ */ -+#include -+#include -+ -+#include "mdio-i2c.h" -+ -+/* -+ * I2C bus addresses 0x50 and 0x51 are normally an EEPROM, which is -+ * specified to be present in SFP modules. These correspond with PHY -+ * addresses 16 and 17. Disallow access to these "phy" addresses. -+ */ -+static bool i2c_mii_valid_phy_id(int phy_id) -+{ -+ return phy_id != 0x10 && phy_id != 0x11; -+} -+ -+static unsigned int i2c_mii_phy_addr(int phy_id) -+{ -+ return phy_id + 0x40; -+} -+ -+static int i2c_mii_read(struct mii_bus *bus, int phy_id, int reg) -+{ -+ struct i2c_adapter *i2c = bus->priv; -+ struct i2c_msg msgs[2]; -+ u8 data[2], dev_addr = reg; -+ int bus_addr, ret; -+ -+ if (!i2c_mii_valid_phy_id(phy_id)) -+ return 0xffff; -+ -+ bus_addr = i2c_mii_phy_addr(phy_id); -+ msgs[0].addr = bus_addr; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = &dev_addr; -+ msgs[1].addr = bus_addr; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = sizeof(data); -+ msgs[1].buf = data; -+ -+ ret = i2c_transfer(i2c, msgs, ARRAY_SIZE(msgs)); -+ if (ret != ARRAY_SIZE(msgs)) -+ return 0xffff; -+ -+ return data[0] << 8 | data[1]; -+} -+ -+static int i2c_mii_write(struct mii_bus *bus, int phy_id, int reg, u16 val) -+{ -+ struct i2c_adapter *i2c = bus->priv; -+ struct i2c_msg msg; -+ int ret; -+ u8 data[3]; -+ -+ if (!i2c_mii_valid_phy_id(phy_id)) -+ return 0; -+ -+ data[0] = reg; -+ data[1] = val >> 8; -+ data[2] = val; -+ -+ msg.addr = i2c_mii_phy_addr(phy_id); -+ msg.flags = 0; -+ msg.len = 3; -+ msg.buf = data; -+ -+ ret = i2c_transfer(i2c, &msg, 1); -+ -+ return ret < 0 ? ret : 0; -+} -+ -+struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c) -+{ -+ struct mii_bus *mii; -+ -+ if (!i2c_check_functionality(i2c, I2C_FUNC_I2C)) -+ return ERR_PTR(-EINVAL); -+ -+ mii = mdiobus_alloc(); -+ if (!mii) -+ return ERR_PTR(-ENOMEM); -+ -+ snprintf(mii->id, MII_BUS_ID_SIZE, "i2c:%s", dev_name(parent)); -+ mii->parent = parent; -+ mii->read = i2c_mii_read; -+ mii->write = i2c_mii_write; -+ mii->priv = i2c; -+ -+ return mii; -+} -+EXPORT_SYMBOL_GPL(mdio_i2c_alloc); -+ -+MODULE_AUTHOR("Russell King"); -+MODULE_DESCRIPTION("MDIO I2C bridge library"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/drivers/net/phy/mdio-i2c.h -@@ -0,0 +1,19 @@ -+/* -+ * MDIO I2C bridge -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef MDIO_I2C_H -+#define MDIO_I2C_H -+ -+struct device; -+struct i2c_adapter; -+struct mii_bus; -+ -+struct mii_bus *mdio_i2c_alloc(struct device *parent, struct i2c_adapter *i2c); -+ -+#endif diff --git a/target/linux/mvebu/patches-4.9/415-phylink-add-phylink-infrastructure.patch b/target/linux/mvebu/patches-4.9/415-phylink-add-phylink-infrastructure.patch deleted file mode 100644 index cf9b2061c..000000000 --- a/target/linux/mvebu/patches-4.9/415-phylink-add-phylink-infrastructure.patch +++ /dev/null @@ -1,1120 +0,0 @@ -From: Russell King -Date: Tue, 22 Sep 2015 20:52:18 +0100 -Subject: [PATCH] phylink: add phylink infrastructure - -The link between the ethernet MAC and its PHY has become more complex -as the interface evolves. This is especially true with serdes links, -where the part of the PHY is effectively integrated into the MAC. - -Serdes links can be connected to a variety of devices, including SFF -modules soldered down onto the board with the MAC, a SFP cage with -a hotpluggable SFP module which may contain a PHY or directly modulate -the serdes signals onto optical media with or without a PHY, or even -a classical PHY connection. - -Moreover, the negotiation information on serdes links comes in two -varieties - SGMII mode, where the PHY provides its speed/duplex/flow -control information to the MAC, and 1000base-X mode where both ends -exchange their abilities and each resolve the link capabilities. - -This means we need a more flexible means to support these arrangements, -particularly with the hotpluggable nature of SFP, where the PHY can -be attached or detached after the network device has been brought up. - -Ethtool information can come from multiple sources: -- we may have a PHY operating in either SGMII or 1000base-X mode, in - which case we take ethtool/mii data directly from the PHY. -- we may have a optical SFP module without a PHY, with the MAC - operating in 1000base-X mode - the ethtool/mii data needs to come - from the MAC. -- we may have a copper SFP module with a PHY whic can't be accessed, - which means we need to take ethtool/mii data from the MAC. - -Phylink aims to solve this by providing an intermediary between the -MAC and PHY, providing a safe way for PHYs to be hotplugged, and -allowing a SFP driver to reconfigure the serdes connection. - -Phylink also takes over support of fixed link connections, where the -speed/duplex/flow control are fixed, but link status may be controlled -by a GPIO signal. By avoiding the fixed-phy implementation, phylink -can provide a faster response to link events: fixed-phy has to wait for -phylib to operate its state machine, which can take several seconds. -In comparison, phylink takes milliseconds. - -Signed-off-by: Russell King - -- remove sync status -- rework supported and advertisment handling -- add 1000base-x speed for fixed links -- use functionality exported from phy-core, reworking - __phylink_ethtool_ksettings_set for it ---- - create mode 100644 drivers/net/phy/phylink.c - create mode 100644 include/linux/phylink.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -10,6 +10,16 @@ menuconfig PHYLIB - devices. This option provides infrastructure for - managing PHY devices. - -+config PHYLINK -+ tristate -+ depends on NETDEVICES -+ select PHYLIB -+ select SWPHY -+ help -+ PHYlink models the link between the PHY and MAC, allowing fixed -+ configuration links, PHYs, and Serdes links with MAC level -+ autonegotiation modes. -+ - if PHYLIB - - config SWPHY ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -6,6 +6,7 @@ libphy-$(CONFIG_SWPHY) += swphy.o - - obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o - -+obj-$(CONFIG_PHYLINK) += phylink.o - obj-$(CONFIG_PHYLIB) += libphy.o - - obj-$(CONFIG_SWCONFIG) += swconfig.o ---- a/drivers/net/phy/phy_device.c -+++ b/drivers/net/phy/phy_device.c -@@ -1021,6 +1021,7 @@ void phy_detach(struct phy_device *phyde - phydev->attached_dev->phydev = NULL; - phydev->attached_dev = NULL; - phy_suspend(phydev); -+ phydev->phylink = NULL; - - module_put(phydev->mdio.dev.driver->owner); - ---- /dev/null -+++ b/drivers/net/phy/phylink.c -@@ -0,0 +1,903 @@ -+/* -+ * phylink models the MAC to optional PHY connection, supporting -+ * technologies such as SFP cages where the PHY is hot-pluggable. -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "swphy.h" -+ -+#define SUPPORTED_INTERFACES \ -+ (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ -+ SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) -+#define ADVERTISED_INTERFACES \ -+ (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ -+ ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) -+ -+enum { -+ PHYLINK_DISABLE_STOPPED, -+}; -+ -+struct phylink { -+ struct net_device *netdev; -+ const struct phylink_mac_ops *ops; -+ struct mutex config_mutex; -+ -+ unsigned long phylink_disable_state; /* bitmask of disables */ -+ struct phy_device *phydev; -+ phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ -+ u8 link_an_mode; /* MLO_AN_xxx */ -+ u8 link_port; /* The current non-phy ethtool port */ -+ /* ethtool supported mask for ports */ -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); -+ -+ /* The link configuration settings */ -+ struct phylink_link_state link_config; -+ struct gpio_desc *link_gpio; -+ -+ struct mutex state_mutex; /* may be taken within config_mutex */ -+ struct phylink_link_state phy_state; -+ struct work_struct resolve; -+ -+ const struct phylink_module_ops *module_ops; -+ void *module_data; -+}; -+ -+static inline void linkmode_zero(unsigned long *dst) -+{ -+ bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS); -+} -+ -+static inline void linkmode_copy(unsigned long *dst, const unsigned long *src) -+{ -+ bitmap_copy(dst, src, __ETHTOOL_LINK_MODE_MASK_NBITS); -+} -+ -+static inline void linkmode_and(unsigned long *dst, const unsigned long *a, -+ const unsigned long *b) -+{ -+ bitmap_and(dst, a, b, __ETHTOOL_LINK_MODE_MASK_NBITS); -+} -+ -+static inline void linkmode_or(unsigned long *dst, const unsigned long *a, -+ const unsigned long *b) -+{ -+ bitmap_or(dst, a, b, __ETHTOOL_LINK_MODE_MASK_NBITS); -+} -+ -+static inline bool linkmode_empty(const unsigned long *src) -+{ -+ return bitmap_empty(src, __ETHTOOL_LINK_MODE_MASK_NBITS); -+} -+ -+static void phylink_set_port_bits(unsigned long *bits) -+{ -+ __set_bit(ETHTOOL_LINK_MODE_TP_BIT, bits); -+ __set_bit(ETHTOOL_LINK_MODE_AUI_BIT, bits); -+ __set_bit(ETHTOOL_LINK_MODE_MII_BIT, bits); -+ __set_bit(ETHTOOL_LINK_MODE_FIBRE_BIT, bits); -+ __set_bit(ETHTOOL_LINK_MODE_BNC_BIT, bits); -+ __set_bit(ETHTOOL_LINK_MODE_Backplane_BIT, bits); -+} -+ -+static const char *phylink_an_mode_str(unsigned int mode) -+{ -+ static const char *modestr[] = { -+ [MLO_AN_PHY] = "phy", -+ [MLO_AN_FIXED] = "fixed", -+ [MLO_AN_SGMII] = "SGMII", -+ [MLO_AN_8023Z] = "802.3z", -+ }; -+ -+ return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; -+} -+ -+static int phylink_parse_fixedlink(struct phylink *pl, struct device_node *np) -+{ -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; -+ struct device_node *fixed_node; -+ const struct phy_setting *s; -+ struct gpio_desc *desc; -+ const __be32 *fixed_prop; -+ u32 speed; -+ int ret, len; -+ -+ fixed_node = of_get_child_by_name(np, "fixed-link"); -+ if (fixed_node) { -+ ret = of_property_read_u32(fixed_node, "speed", &speed); -+ -+ pl->link_config.speed = speed; -+ pl->link_config.duplex = DUPLEX_HALF; -+ -+ if (of_property_read_bool(fixed_node, "full-duplex")) -+ pl->link_config.duplex = DUPLEX_FULL; -+ if (of_property_read_bool(fixed_node, "pause")) -+ pl->link_config.pause |= MLO_PAUSE_SYM; -+ if (of_property_read_bool(fixed_node, "asym-pause")) -+ pl->link_config.pause |= MLO_PAUSE_ASYM; -+ -+ if (ret == 0) { -+ desc = fwnode_get_named_gpiod(&fixed_node->fwnode, -+ "link-gpios"); -+ -+ if (!IS_ERR(desc)) -+ pl->link_gpio = desc; -+ else if (desc == ERR_PTR(-EPROBE_DEFER)) -+ ret = -EPROBE_DEFER; -+ } -+ of_node_put(fixed_node); -+ -+ if (ret) -+ return ret; -+ } else { -+ fixed_prop = of_get_property(np, "fixed-link", &len); -+ if (!fixed_prop) { -+ netdev_err(pl->netdev, "broken fixed-link?\n"); -+ return -EINVAL; -+ } -+ if (len == 5 * sizeof(*fixed_prop)) { -+ pl->link_config.duplex = be32_to_cpu(fixed_prop[1]) ? -+ DUPLEX_FULL : DUPLEX_HALF; -+ pl->link_config.speed = be32_to_cpu(fixed_prop[2]); -+ if (be32_to_cpu(fixed_prop[3])) -+ pl->link_config.pause |= MLO_PAUSE_SYM; -+ if (be32_to_cpu(fixed_prop[4])) -+ pl->link_config.pause |= MLO_PAUSE_ASYM; -+ } -+ } -+ -+ bitmap_fill(mask, __ETHTOOL_LINK_MODE_MASK_NBITS); -+ pl->ops->validate_support(pl->netdev, MLO_AN_FIXED, mask); -+ -+ pl->link_config.link = 1; -+ pl->link_config.an_complete = 1; -+ -+ if (pl->link_config.speed > SPEED_1000 && -+ pl->link_config.duplex != DUPLEX_FULL) -+ netdev_warn(pl->netdev, "fixed link specifies half duplex for %dMbps link?\n", -+ pl->link_config.speed); -+ -+ s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, -+ mask, __ETHTOOL_LINK_MODE_MASK_NBITS, true); -+ if (s) { -+ __set_bit(s->bit, pl->supported); -+ } else { -+ netdev_warn(pl->netdev, "fixed link %s duplex %dMbps not recognised\n", -+ pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", -+ pl->link_config.speed); -+ } -+ return 0; -+} -+ -+static int phylink_parse_mode(struct phylink *pl, struct device_node *np) -+{ -+ struct device_node *dn; -+ const char *managed; -+ -+ dn = of_get_child_by_name(np, "fixed-link"); -+ if (dn || of_find_property(np, "fixed-link", NULL)) -+ pl->link_an_mode = MLO_AN_FIXED; -+ of_node_put(dn); -+ -+ if (of_property_read_string(np, "managed", &managed) == 0 && -+ strcmp(managed, "in-band-status") == 0) { -+ if (pl->link_an_mode == MLO_AN_FIXED) { -+ netdev_err(pl->netdev, -+ "can't use both fixed-link and in-band-status\n"); -+ return -EINVAL; -+ } -+ phylink_set(pl->supported, 10baseT_Half); -+ phylink_set(pl->supported, 10baseT_Full); -+ phylink_set(pl->supported, 100baseT_Half); -+ phylink_set(pl->supported, 100baseT_Full); -+ phylink_set(pl->supported, 1000baseT_Half); -+ phylink_set(pl->supported, 1000baseT_Full); -+ phylink_set(pl->supported, Asym_Pause); -+ phylink_set(pl->supported, Pause); -+ pl->link_an_mode = MLO_AN_SGMII; -+ pl->link_config.an_enabled = true; -+ pl->ops->validate_support(pl->netdev, pl->link_an_mode, -+ pl->supported); -+ } -+ -+ return 0; -+} -+ -+ -+static void phylink_init_advert(struct phylink *pl, unsigned int mode, -+ const unsigned long *supported, -+ unsigned long *advertising) -+{ -+ linkmode_copy(advertising, supported); -+ if (pl->ops->validate_advert) -+ pl->ops->validate_advert(pl->netdev, mode, supported, -+ advertising); -+} -+ -+static void phylink_mac_config(struct phylink *pl, -+ const struct phylink_link_state *state) -+{ -+ netdev_dbg(pl->netdev, -+ "%s: mode=%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", -+ __func__, phylink_an_mode_str(pl->link_an_mode), -+ phy_speed_to_str(state->speed), -+ phy_duplex_to_str(state->duplex), -+ __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, -+ state->pause, state->link, state->an_enabled); -+ -+ pl->ops->mac_config(pl->netdev, pl->link_an_mode, state); -+} -+ -+static void phylink_mac_an_restart(struct phylink *pl) -+{ -+ if (pl->link_config.an_enabled) -+ pl->ops->mac_an_restart(pl->netdev, pl->link_an_mode); -+} -+ -+static int phylink_get_mac_state(struct phylink *pl, struct phylink_link_state *state) -+{ -+ struct net_device *ndev = pl->netdev; -+ -+ linkmode_copy(state->advertising, pl->link_config.advertising); -+ linkmode_zero(state->lp_advertising); -+ state->an_enabled = pl->link_config.an_enabled; -+ state->link = 1; -+ -+ return pl->ops->mac_link_state(ndev, state); -+} -+ -+/* The fixed state is... fixed except for the link state, -+ * which may be determined by a GPIO. -+ */ -+static void phylink_get_fixed_state(struct phylink *pl, struct phylink_link_state *state) -+{ -+ *state = pl->link_config; -+ if (pl->link_gpio) -+ state->link = !!gpiod_get_value(pl->link_gpio); -+} -+ -+static void phylink_resolve(struct work_struct *w) -+{ -+ struct phylink *pl = container_of(w, struct phylink, resolve); -+ struct phylink_link_state link_state; -+ struct net_device *ndev = pl->netdev; -+ -+ mutex_lock(&pl->state_mutex); -+ if (pl->phylink_disable_state) { -+ link_state.link = false; -+ } else { -+ switch (pl->link_an_mode) { -+ case MLO_AN_PHY: -+ link_state = pl->phy_state; -+ break; -+ -+ case MLO_AN_FIXED: -+ phylink_get_fixed_state(pl, &link_state); -+ break; -+ -+ case MLO_AN_SGMII: -+ phylink_get_mac_state(pl, &link_state); -+ if (pl->phydev) -+ link_state.link = link_state.link && -+ pl->phy_state.link; -+ break; -+ -+ case MLO_AN_8023Z: -+ phylink_get_mac_state(pl, &link_state); -+ break; -+ } -+ } -+ -+ if (link_state.link != netif_carrier_ok(ndev)) { -+ if (!link_state.link) { -+ netif_carrier_off(ndev); -+ pl->ops->mac_link_down(ndev, pl->link_an_mode); -+ netdev_info(ndev, "Link is Down\n"); -+ } else { -+ /* If we have a PHY, we need the MAC updated with -+ * the current link parameters (eg, in SGMII mode, -+ * with flow control status.) -+ */ -+ if (pl->phydev) -+ phylink_mac_config(pl, &link_state); -+ -+ pl->ops->mac_link_up(ndev, pl->link_an_mode); -+ -+ netif_carrier_on(ndev); -+ -+ netdev_info(ndev, -+ "Link is Up - %s/%s - flow control %s\n", -+ phy_speed_to_str(link_state.speed), -+ phy_duplex_to_str(link_state.duplex), -+ link_state.pause ? "rx/tx" : "off"); -+ } -+ } -+ mutex_unlock(&pl->state_mutex); -+} -+ -+static void phylink_run_resolve(struct phylink *pl) -+{ -+ if (!pl->phylink_disable_state) -+ queue_work(system_power_efficient_wq, &pl->resolve); -+} -+ -+struct phylink *phylink_create(struct net_device *ndev, struct device_node *np, -+ phy_interface_t iface, const struct phylink_mac_ops *ops) -+{ -+ struct phylink *pl; -+ int ret; -+ -+ pl = kzalloc(sizeof(*pl), GFP_KERNEL); -+ if (!pl) -+ return ERR_PTR(-ENOMEM); -+ -+ mutex_init(&pl->state_mutex); -+ mutex_init(&pl->config_mutex); -+ INIT_WORK(&pl->resolve, phylink_resolve); -+ pl->netdev = ndev; -+ pl->link_interface = iface; -+ pl->link_port = PORT_MII; -+ pl->link_config.speed = SPEED_UNKNOWN; -+ pl->link_config.duplex = DUPLEX_UNKNOWN; -+ pl->ops = ops; -+ __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -+ -+ ret = phylink_parse_mode(pl, np); -+ if (ret < 0) { -+ kfree(pl); -+ return ERR_PTR(ret); -+ } -+ -+ if (pl->link_an_mode == MLO_AN_FIXED) { -+ ret = phylink_parse_fixedlink(pl, np); -+ if (ret < 0) { -+ kfree(pl); -+ return ERR_PTR(ret); -+ } -+ } -+ -+ phylink_set(pl->supported, MII); -+ phylink_init_advert(pl, pl->link_an_mode, pl->supported, -+ pl->link_config.advertising); -+ -+ return pl; -+} -+EXPORT_SYMBOL_GPL(phylink_create); -+ -+void phylink_destroy(struct phylink *pl) -+{ -+ cancel_work_sync(&pl->resolve); -+ kfree(pl); -+} -+EXPORT_SYMBOL_GPL(phylink_destroy); -+ -+void phylink_phy_change(struct phy_device *phydev, bool up, bool do_carrier) -+{ -+ struct phylink *pl = phydev->phylink; -+ -+ mutex_lock(&pl->state_mutex); -+ pl->phy_state.speed = phydev->speed; -+ pl->phy_state.duplex = phydev->duplex; -+ pl->phy_state.pause = MLO_PAUSE_NONE; -+ if (phydev->pause) -+ pl->phy_state.pause |= MLO_PAUSE_SYM; -+ if (phydev->asym_pause) -+ pl->phy_state.pause |= MLO_PAUSE_ASYM; -+ pl->phy_state.link = up; -+ mutex_unlock(&pl->state_mutex); -+ -+ phylink_run_resolve(pl); -+ -+ netdev_dbg(pl->netdev, "phy link %s %s/%s\n", up ? "up" : "down", -+ phy_speed_to_str(phydev->speed), -+ phy_duplex_to_str(phydev->duplex)); -+} -+ -+static int phylink_empty_linkmode(const unsigned long *linkmode) -+{ -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; -+ -+ phylink_set_port_bits(tmp); -+ phylink_set(tmp, Autoneg); -+ phylink_set(tmp, Pause); -+ phylink_set(tmp, Asym_Pause); -+ -+ bitmap_andnot(tmp, linkmode, tmp, __ETHTOOL_LINK_MODE_MASK_NBITS); -+ -+ return linkmode_empty(tmp); -+} -+ -+static int phylink_validate_support(struct phylink *pl, int mode, -+ unsigned long *mask) -+{ -+ pl->ops->validate_support(pl->netdev, mode, mask); -+ -+ return phylink_empty_linkmode(mask) ? -EINVAL : 0; -+} -+ -+static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy) -+{ -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); -+ u32 advertising; -+ int ret; -+ -+ ethtool_convert_legacy_u32_to_link_mode(mask, phy->supported); -+ ret = phylink_validate_support(pl, pl->link_an_mode, mask); -+ if (ret) -+ return ret; -+ -+ mutex_lock(&pl->config_mutex); -+ phy->phylink = pl; -+ phy->phy_link_change = phylink_phy_change; -+ -+ netdev_info(pl->netdev, -+ "PHY [%s] driver [%s]\n", dev_name(&phy->mdio.dev), -+ phy->drv->name); -+ -+ mutex_lock(&pl->state_mutex); -+ pl->phydev = phy; -+ linkmode_copy(pl->supported, mask); -+ -+ /* Restrict the phy advertisment according to the MAC support. */ -+ ethtool_convert_link_mode_to_legacy_u32(&advertising, mask); -+ phy->advertising &= ADVERTISED_INTERFACES | advertising; -+ ethtool_convert_legacy_u32_to_link_mode(pl->link_config.advertising, -+ phy->advertising); -+ mutex_unlock(&pl->state_mutex); -+ -+ netdev_dbg(pl->netdev, -+ "phy: setting supported %*pb advertising 0x%08x\n", -+ __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, -+ phy->advertising); -+ -+ phy_start_machine(phy); -+ if (phy->irq > 0) -+ phy_start_interrupts(phy); -+ -+ mutex_unlock(&pl->config_mutex); -+ -+ return 0; -+} -+ -+int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) -+{ -+ int ret; -+ -+ ret = phy_attach_direct(pl->netdev, phy, 0, pl->link_interface); -+ if (ret) -+ return ret; -+ -+ ret = phylink_bringup_phy(pl, phy); -+ if (ret) -+ phy_detach(phy); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_connect_phy); -+ -+int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn) -+{ -+ struct device_node *phy_node; -+ struct phy_device *phy_dev; -+ int ret; -+ -+ /* Fixed links are handled without needing a PHY */ -+ if (pl->link_an_mode == MLO_AN_FIXED) -+ return 0; -+ -+ phy_node = of_parse_phandle(dn, "phy-handle", 0); -+ if (!phy_node) -+ phy_node = of_parse_phandle(dn, "phy", 0); -+ if (!phy_node) -+ phy_node = of_parse_phandle(dn, "phy-device", 0); -+ -+ if (!phy_node) { -+ if (pl->link_an_mode == MLO_AN_PHY) { -+ netdev_err(pl->netdev, "unable to find PHY node\n"); -+ return -ENODEV; -+ } -+ return 0; -+ } -+ -+ phy_dev = of_phy_attach(pl->netdev, phy_node, 0, pl->link_interface); -+ /* We're done with the phy_node handle */ -+ of_node_put(phy_node); -+ -+ if (!phy_dev) -+ return -ENODEV; -+ -+ ret = phylink_bringup_phy(pl, phy_dev); -+ if (ret) -+ phy_detach(phy_dev); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_of_phy_connect); -+ -+void phylink_disconnect_phy(struct phylink *pl) -+{ -+ struct phy_device *phy; -+ -+ mutex_lock(&pl->config_mutex); -+ phy = pl->phydev; -+ -+ mutex_lock(&pl->state_mutex); -+ pl->phydev = NULL; -+ mutex_unlock(&pl->state_mutex); -+ flush_work(&pl->resolve); -+ -+ if (phy) -+ phy_disconnect(phy); -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_disconnect_phy); -+ -+void phylink_mac_change(struct phylink *pl, bool up) -+{ -+ phylink_run_resolve(pl); -+ netdev_dbg(pl->netdev, "mac link %s\n", up ? "up" : "down"); -+} -+EXPORT_SYMBOL_GPL(phylink_mac_change); -+ -+void phylink_start(struct phylink *pl) -+{ -+ mutex_lock(&pl->config_mutex); -+ -+ netdev_info(pl->netdev, "configuring for %s link mode\n", -+ phylink_an_mode_str(pl->link_an_mode)); -+ -+ /* Apply the link configuration to the MAC when starting. This allows -+ * a fixed-link to start with the correct parameters, and also -+ * ensures that we set the appropriate advertisment for Serdes links. -+ */ -+ phylink_mac_config(pl, &pl->link_config); -+ -+ clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -+ phylink_run_resolve(pl); -+ -+ if (pl->phydev) -+ phy_start(pl->phydev); -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_start); -+ -+void phylink_stop(struct phylink *pl) -+{ -+ mutex_lock(&pl->config_mutex); -+ -+ if (pl->phydev) -+ phy_stop(pl->phydev); -+ -+ set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -+ flush_work(&pl->resolve); -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_stop); -+ -+static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) -+{ -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); -+ -+ linkmode_zero(mask); -+ phylink_set_port_bits(mask); -+ -+ linkmode_and(dst, dst, mask); -+ linkmode_or(dst, dst, b); -+} -+ -+static void phylink_get_ksettings(const struct phylink_link_state *state, -+ struct ethtool_link_ksettings *kset) -+{ -+ phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); -+ linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); -+ kset->base.speed = state->speed; -+ kset->base.duplex = state->duplex; -+ kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : -+ AUTONEG_DISABLE; -+} -+ -+static int __phylink_ethtool_ksettings_get(struct phylink *pl, -+ struct ethtool_link_ksettings *kset) -+{ -+ struct phylink_link_state link_state; -+ int ret; -+ -+ if (pl->phydev) { -+ ret = phy_ethtool_ksettings_get(pl->phydev, kset); -+ if (ret) -+ return ret; -+ } else { -+ kset->base.port = pl->link_port; -+ } -+ -+ linkmode_copy(kset->link_modes.supported, pl->supported); -+ -+ switch (pl->link_an_mode) { -+ case MLO_AN_FIXED: -+ /* We are using fixed settings. Report these as the -+ * current link settings - and note that these also -+ * represent the supported speeds/duplex/pause modes. -+ */ -+ phylink_get_fixed_state(pl, &link_state); -+ phylink_get_ksettings(&link_state, kset); -+ break; -+ -+ case MLO_AN_SGMII: -+ /* If there is a phy attached, then use the reported -+ * settings from the phy with no modification. -+ */ -+ if (pl->phydev) -+ break; -+ -+ case MLO_AN_8023Z: -+ phylink_get_mac_state(pl, &link_state); -+ -+ /* The MAC is reporting the link results from its own PCS -+ * layer via in-band status. Report these as the current -+ * link settings. -+ */ -+ phylink_get_ksettings(&link_state, kset); -+ break; -+ } -+ -+ return 0; -+} -+ -+int phylink_ethtool_ksettings_get(struct phylink *pl, -+ struct ethtool_link_ksettings *kset) -+{ -+ int ret; -+ -+ mutex_lock(&pl->config_mutex); -+ ret = __phylink_ethtool_ksettings_get(pl, kset); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); -+ -+static int __phylink_ethtool_ksettings_set(struct phylink *pl, -+ const struct ethtool_link_ksettings *kset) -+{ -+ struct ethtool_link_ksettings our_kset = *kset; -+ int ret; -+ -+ /* Mask out unsupported advertisments */ -+ linkmode_and(our_kset.link_modes.advertising, -+ kset->link_modes.advertising, pl->supported); -+ -+ if (pl->ops->validate_advert) -+ pl->ops->validate_advert(pl->netdev, pl->link_an_mode, -+ pl->supported, -+ our_kset.link_modes.advertising); -+ -+ /* FIXME: should we reject autoneg if phy/mac does not support it? */ -+ -+ if (kset->base.autoneg == AUTONEG_DISABLE) { -+ const struct phy_setting *s; -+ -+ /* Autonegotiation disabled, select a suitable speed and -+ * duplex. -+ */ -+ s = phy_lookup_setting(kset->base.speed, kset->base.duplex, -+ pl->supported, -+ __ETHTOOL_LINK_MODE_MASK_NBITS, false); -+ if (!s) -+ return -EINVAL; -+ -+ /* If we have a fixed link (as specified by firmware), refuse -+ * to change link parameters. -+ */ -+ if (pl->link_an_mode == MLO_AN_FIXED && -+ (s->speed != pl->link_config.speed || -+ s->duplex != pl->link_config.duplex)) -+ return -EINVAL; -+ -+ our_kset.base.speed = s->speed; -+ our_kset.base.duplex = s->duplex; -+ -+ __clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, -+ our_kset.link_modes.advertising); -+ } else { -+ /* If we have a fixed link, refuse to enable autonegotiation */ -+ if (pl->link_an_mode == MLO_AN_FIXED) -+ return -EINVAL; -+ -+ /* Autonegotiation enabled, validate advertisment */ -+ if (phylink_empty_linkmode(our_kset.link_modes.advertising)) -+ return -EINVAL; -+ -+ __set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, -+ our_kset.link_modes.advertising); -+ } -+ -+ /* If we have a PHY, configure the phy */ -+ if (pl->phydev) { -+ ret = phy_ethtool_ksettings_set(pl->phydev, &our_kset); -+ if (ret) -+ return ret; -+ } -+ -+ mutex_lock(&pl->state_mutex); -+ /* Configure the MAC to match the new settings */ -+ linkmode_copy(pl->link_config.advertising, our_kset.link_modes.advertising); -+ pl->link_config.speed = our_kset.base.speed; -+ pl->link_config.duplex = our_kset.base.duplex; -+ pl->link_config.an_enabled = our_kset.base.autoneg != AUTONEG_DISABLE; -+ -+ if (!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { -+ phylink_mac_config(pl, &pl->link_config); -+ phylink_mac_an_restart(pl); -+ } -+ mutex_unlock(&pl->state_mutex); -+ -+ return ret; -+} -+ -+int phylink_ethtool_ksettings_set(struct phylink *pl, -+ const struct ethtool_link_ksettings *kset) -+{ -+ int ret; -+ -+ if (kset->base.autoneg != AUTONEG_DISABLE && -+ kset->base.autoneg != AUTONEG_ENABLE) -+ return -EINVAL; -+ -+ mutex_lock(&pl->config_mutex); -+ ret = __phylink_ethtool_ksettings_set(pl, kset); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); -+ -+/* This emulates MII registers for a fixed-mode phy operating as per the -+ * passed in state. "aneg" defines if we report negotiation is possible. -+ * -+ * FIXME: should deal with negotiation state too. -+ */ -+static int phylink_mii_emul_read(struct net_device *ndev, unsigned int reg, -+ struct phylink_link_state *state, bool aneg) -+{ -+ struct fixed_phy_status fs; -+ int val; -+ -+ fs.link = state->link; -+ fs.speed = state->speed; -+ fs.duplex = state->duplex; -+ fs.pause = state->pause & MLO_PAUSE_SYM; -+ fs.asym_pause = state->pause & MLO_PAUSE_ASYM; -+ -+ val = swphy_read_reg(reg, &fs); -+ if (reg == MII_BMSR) { -+ if (!state->an_complete) -+ val &= ~BMSR_ANEGCOMPLETE; -+ if (!aneg) -+ val &= ~BMSR_ANEGCAPABLE; -+ } -+ return val; -+} -+ -+static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, -+ unsigned int reg) -+{ -+ struct phylink_link_state state; -+ int val = 0xffff; -+ -+ /* PHYs only exist for MLO_AN_PHY and MLO_AN_SGMII */ -+ if (pl->phydev) -+ return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); -+ -+ switch (pl->link_an_mode) { -+ case MLO_AN_FIXED: -+ if (phy_id == 0) { -+ phylink_get_fixed_state(pl, &state); -+ val = phylink_mii_emul_read(pl->netdev, reg, &state, -+ true); -+ } -+ break; -+ -+ case MLO_AN_PHY: -+ return -EOPNOTSUPP; -+ -+ case MLO_AN_SGMII: -+ /* No phy, fall through to 8023z method */ -+ case MLO_AN_8023Z: -+ if (phy_id == 0) { -+ val = phylink_get_mac_state(pl, &state); -+ if (val < 0) -+ return val; -+ -+ val = phylink_mii_emul_read(pl->netdev, reg, &state, -+ true); -+ } -+ break; -+ } -+ -+ return val & 0xffff; -+} -+ -+static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, -+ unsigned int reg, unsigned int val) -+{ -+ /* PHYs only exist for MLO_AN_PHY and MLO_AN_SGMII */ -+ if (pl->phydev) { -+ mdiobus_write(pl->phydev->mdio.bus, phy_id, reg, val); -+ return 0; -+ } -+ -+ switch (pl->link_an_mode) { -+ case MLO_AN_FIXED: -+ break; -+ -+ case MLO_AN_PHY: -+ return -EOPNOTSUPP; -+ -+ case MLO_AN_SGMII: -+ /* No phy, fall through to 8023z method */ -+ case MLO_AN_8023Z: -+ break; -+ } -+ -+ return 0; -+} -+ -+int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) -+{ -+ struct mii_ioctl_data *mii_data = if_mii(ifr); -+ int val, ret; -+ -+ mutex_lock(&pl->config_mutex); -+ -+ switch (cmd) { -+ case SIOCGMIIPHY: -+ mii_data->phy_id = pl->phydev ? pl->phydev->mdio.addr : 0; -+ /* fallthrough */ -+ -+ case SIOCGMIIREG: -+ val = phylink_mii_read(pl, mii_data->phy_id, mii_data->reg_num); -+ if (val < 0) { -+ ret = val; -+ } else { -+ mii_data->val_out = val; -+ ret = 0; -+ } -+ break; -+ -+ case SIOCSMIIREG: -+ ret = phylink_mii_write(pl, mii_data->phy_id, mii_data->reg_num, -+ mii_data->val_in); -+ break; -+ -+ default: -+ ret = -EOPNOTSUPP; -+ if (pl->phydev) -+ ret = phy_mii_ioctl(pl->phydev, ifr, cmd); -+ break; -+ } -+ -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_mii_ioctl); -+ -+MODULE_LICENSE("GPL"); ---- a/include/linux/phy.h -+++ b/include/linux/phy.h -@@ -149,6 +149,7 @@ static inline const char *phy_modes(phy_ - #define MII_ADDR_C45 (1<<30) - - struct device; -+struct phylink; - struct sk_buff; - - /* -@@ -421,6 +422,7 @@ struct phy_device { - - struct mutex lock; - -+ struct phylink *phylink; - struct net_device *attached_dev; - - u8 mdix; ---- /dev/null -+++ b/include/linux/phylink.h -@@ -0,0 +1,100 @@ -+#ifndef NETDEV_PCS_H -+#define NETDEV_PCS_H -+ -+#include -+#include -+#include -+ -+struct device_node; -+struct ethtool_cmd; -+struct net_device; -+ -+enum { -+ MLO_PAUSE_NONE, -+ MLO_PAUSE_ASYM = BIT(0), -+ MLO_PAUSE_SYM = BIT(1), -+ -+ MLO_AN_PHY = 0, -+ MLO_AN_FIXED, -+ MLO_AN_SGMII, -+ MLO_AN_8023Z, -+}; -+ -+struct phylink_link_state { -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); -+ int speed; -+ int duplex; -+ int pause; -+ unsigned int link:1; -+ unsigned int an_enabled:1; -+ unsigned int an_complete:1; -+}; -+ -+struct phylink_mac_ops { -+ /** -+ * @validate_support: -+ * -+ * Validate and update the support mask provided by a PHY or -+ * module. Unsupported link modes should be cleared by the -+ * MAC. -+ * -+ * Note: the PHY may be able to transform from one connection -+ * technology to another, so, eg, don't clear 1000base-X just -+ * because the MAC is unable to support it. This is more about -+ * clearing unsupported speeds and duplex settings. -+ */ -+ void (*validate_support)(struct net_device *, unsigned int mode, -+ unsigned long *support); -+ -+ /** -+ * @validate_advert: -+ * -+ * Validate and update the advertisment mask, clearing bits that -+ * can not be advertised in the chosen mode or with each other. -+ */ -+ void (*validate_advert)(struct net_device *, unsigned int mode, -+ const unsigned long *support, -+ unsigned long *advert); -+ -+ /* Read the current link state from the hardware */ -+ int (*mac_link_state)(struct net_device *, struct phylink_link_state *); -+ -+ /* Configure the MAC */ -+ void (*mac_config)(struct net_device *, unsigned int mode, -+ const struct phylink_link_state *); -+ void (*mac_an_restart)(struct net_device *, unsigned int mode); -+ -+ void (*mac_link_down)(struct net_device *, unsigned int mode); -+ void (*mac_link_up)(struct net_device *, unsigned int mode); -+}; -+ -+struct phylink *phylink_create(struct net_device *, struct device_node *, -+ phy_interface_t iface, const struct phylink_mac_ops *ops); -+void phylink_destroy(struct phylink *); -+ -+int phylink_connect_phy(struct phylink *, struct phy_device *); -+int phylink_of_phy_connect(struct phylink *, struct device_node *); -+void phylink_disconnect_phy(struct phylink *); -+ -+void phylink_mac_change(struct phylink *, bool up); -+ -+void phylink_start(struct phylink *); -+void phylink_stop(struct phylink *); -+ -+int phylink_ethtool_ksettings_get(struct phylink *, -+ struct ethtool_link_ksettings *); -+int phylink_ethtool_ksettings_set(struct phylink *, -+ const struct ethtool_link_ksettings *); -+int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); -+ -+#define phylink_zero(bm) \ -+ bitmap_zero(bm, __ETHTOOL_LINK_MODE_MASK_NBITS) -+#define __phylink_do_bit(op, bm, mode) \ -+ op(ETHTOOL_LINK_MODE_ ## mode ## _BIT, bm) -+ -+#define phylink_set(bm, mode) __phylink_do_bit(__set_bit, bm, mode) -+#define phylink_clear(bm, mode) __phylink_do_bit(__clear_bit, bm, mode) -+#define phylink_test(bm, mode) __phylink_do_bit(test_bit, bm, mode) -+ -+#endif diff --git a/target/linux/mvebu/patches-4.9/416-phylink-add-hooks-for-SFP-support.patch b/target/linux/mvebu/patches-4.9/416-phylink-add-hooks-for-SFP-support.patch deleted file mode 100644 index da44f75db..000000000 --- a/target/linux/mvebu/patches-4.9/416-phylink-add-hooks-for-SFP-support.patch +++ /dev/null @@ -1,177 +0,0 @@ -From: Russell King -Date: Thu, 24 Sep 2015 11:01:13 +0100 -Subject: [PATCH] phylink: add hooks for SFP support - -Add support to phylink for SFP, which needs to control and configure -the ethernet MAC link state. Specifically, SFP needs to: - -1. set the negotiation mode between SGMII and 1000base-X -2. attach and detach the module PHY -3. prevent the link coming up when errors are reported - -In the absence of a PHY, we also need to set the ethtool port type -according to the module plugged in. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King - -- rework phylink_set_link_*(), combining into a single function. ---- - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -11,6 +11,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -29,11 +30,16 @@ - (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ - ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) - -+static LIST_HEAD(phylinks); -+static DEFINE_MUTEX(phylink_mutex); -+ - enum { - PHYLINK_DISABLE_STOPPED, -+ PHYLINK_DISABLE_LINK, - }; - - struct phylink { -+ struct list_head node; - struct net_device *netdev; - const struct phylink_mac_ops *ops; - struct mutex config_mutex; -@@ -375,12 +381,20 @@ struct phylink *phylink_create(struct ne - phylink_init_advert(pl, pl->link_an_mode, pl->supported, - pl->link_config.advertising); - -+ mutex_lock(&phylink_mutex); -+ list_add_tail(&pl->node, &phylinks); -+ mutex_unlock(&phylink_mutex); -+ - return pl; - } - EXPORT_SYMBOL_GPL(phylink_create); - - void phylink_destroy(struct phylink *pl) - { -+ mutex_lock(&phylink_mutex); -+ list_del(&pl->node); -+ mutex_unlock(&phylink_mutex); -+ - cancel_work_sync(&pl->resolve); - kfree(pl); - } -@@ -900,4 +914,93 @@ int phylink_mii_ioctl(struct phylink *pl - } - EXPORT_SYMBOL_GPL(phylink_mii_ioctl); - -+ -+ -+void phylink_disable(struct phylink *pl) -+{ -+ set_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); -+ flush_work(&pl->resolve); -+ -+ netif_carrier_off(pl->netdev); -+} -+EXPORT_SYMBOL_GPL(phylink_disable); -+ -+void phylink_enable(struct phylink *pl) -+{ -+ clear_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); -+ phylink_run_resolve(pl); -+} -+EXPORT_SYMBOL_GPL(phylink_enable); -+ -+int phylink_set_link(struct phylink *pl, unsigned int mode, u8 port, -+ const unsigned long *support) -+{ -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); -+ int ret = 0; -+ -+ netdev_dbg(pl->netdev, "requesting link mode %s with support %*pb\n", -+ phylink_an_mode_str(mode), -+ __ETHTOOL_LINK_MODE_MASK_NBITS, support); -+ -+ if (mode == MLO_AN_FIXED) -+ return -EINVAL; -+ -+ linkmode_copy(mask, support); -+ -+ /* Ignore errors if we're expecting a PHY to attach later */ -+ ret = phylink_validate_support(pl, mode, mask); -+ if (ret && mode != MLO_AN_PHY) -+ return ret; -+ -+ mutex_lock(&pl->config_mutex); -+ if (mode == MLO_AN_8023Z && pl->phydev) { -+ ret = -EINVAL; -+ } else { -+ bool changed = !bitmap_equal(pl->supported, mask, -+ __ETHTOOL_LINK_MODE_MASK_NBITS); -+ if (changed) { -+ linkmode_copy(pl->supported, mask); -+ -+ phylink_init_advert(pl, mode, mask, -+ pl->link_config.advertising); -+ } -+ -+ if (pl->link_an_mode != mode) { -+ pl->link_an_mode = mode; -+ -+ changed = true; -+ -+ netdev_info(pl->netdev, "switched to %s link mode\n", -+ phylink_an_mode_str(mode)); -+ } -+ -+ pl->link_port = port; -+ -+ if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, -+ &pl->phylink_disable_state)) -+ phylink_mac_config(pl, &pl->link_config); -+ } -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_set_link); -+ -+struct phylink *phylink_lookup_by_netdev(struct net_device *ndev) -+{ -+ struct phylink *pl, *found = NULL; -+ -+ mutex_lock(&phylink_mutex); -+ list_for_each_entry(pl, &phylinks, node) -+ if (pl->netdev == ndev) { -+ found = pl; -+ break; -+ } -+ -+ mutex_unlock(&phylink_mutex); -+ -+ return found; -+} -+EXPORT_SYMBOL_GPL(phylink_lookup_by_netdev); -+ - MODULE_LICENSE("GPL"); ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -88,6 +88,12 @@ int phylink_ethtool_ksettings_set(struct - const struct ethtool_link_ksettings *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - -+int phylink_set_link(struct phylink *pl, unsigned int mode, u8 port, -+ const unsigned long *support); -+void phylink_disable(struct phylink *pl); -+void phylink_enable(struct phylink *pl); -+struct phylink *phylink_lookup_by_netdev(struct net_device *ndev); -+ - #define phylink_zero(bm) \ - bitmap_zero(bm, __ETHTOOL_LINK_MODE_MASK_NBITS) - #define __phylink_do_bit(op, bm, mode) \ diff --git a/target/linux/mvebu/patches-4.9/417-sfp-add-phylink-based-SFP-module-support.patch b/target/linux/mvebu/patches-4.9/417-sfp-add-phylink-based-SFP-module-support.patch deleted file mode 100644 index 4abefe623..000000000 --- a/target/linux/mvebu/patches-4.9/417-sfp-add-phylink-based-SFP-module-support.patch +++ /dev/null @@ -1,1477 +0,0 @@ -From: Russell King -Date: Sat, 12 Sep 2015 18:43:39 +0100 -Subject: [PATCH] sfp: add phylink based SFP module support - -Add support for SFP hotpluggable modules via phylink. This supports -both copper and optical SFP modules, which require different Serdes -modes in order to properly negotiate the link. - -Optical SFP modules typically require the Serdes link to be talking -1000base-X mode - this is the gigabit ethernet mode defined by the -802.3 standard. - -Copper SFP modules typically integrate a PHY in the module to convert -from Serdes to copper, and the PHY will be configured by the vendor -to either present a 1000base-X Serdes link (for fixed 1000base-T) or -a SGMII Serdes link. However, this is vendor defined, so we instead -detect the PHY, switch the link to SGMII mode, and use traditional -PHY based negotiation. - -Signed-off-by: Russell King - -- set port and port capability depending on connector type -- move autoneg mode setting to probe function -- set "supported" speed capabilities depending on reported ethernet - capabilities -- checks for short read -- dump eeprom base ID when checksum fails ---- - create mode 100644 drivers/net/phy/sfp.c - create mode 100644 include/linux/sfp.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -256,6 +256,11 @@ endif # RTL8366_SMI - - comment "MII PHY device drivers" - -+config SFP -+ tristate "SFP cage support" -+ depends on I2C && PHYLINK -+ select MDIO_I2C -+ - config AMD_PHY - tristate "AMD PHYs" - ---help--- ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -41,6 +41,8 @@ obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o - obj-$(CONFIG_MDIO_THUNDER) += mdio-thunder.o - obj-$(CONFIG_MDIO_XGENE) += mdio-xgene.o - -+obj-$(CONFIG_SFP) += sfp.o -+ - obj-$(CONFIG_AMD_PHY) += amd.o - obj-$(CONFIG_AQUANTIA_PHY) += aquantia.o - obj-$(CONFIG_AT803X_PHY) += at803x.o ---- /dev/null -+++ b/drivers/net/phy/sfp.c -@@ -0,0 +1,1071 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "mdio-i2c.h" -+#include "swphy.h" -+ -+enum { -+ GPIO_MODDEF0, -+ GPIO_LOS, -+ GPIO_TX_FAULT, -+ GPIO_TX_DISABLE, -+ GPIO_RATE_SELECT, -+ GPIO_MAX, -+ -+ SFP_F_PRESENT = BIT(GPIO_MODDEF0), -+ SFP_F_LOS = BIT(GPIO_LOS), -+ SFP_F_TX_FAULT = BIT(GPIO_TX_FAULT), -+ SFP_F_TX_DISABLE = BIT(GPIO_TX_DISABLE), -+ SFP_F_RATE_SELECT = BIT(GPIO_RATE_SELECT), -+ -+ SFP_E_INSERT = 0, -+ SFP_E_REMOVE, -+ SFP_E_DEV_DOWN, -+ SFP_E_DEV_UP, -+ SFP_E_TX_FAULT, -+ SFP_E_TX_CLEAR, -+ SFP_E_LOS_HIGH, -+ SFP_E_LOS_LOW, -+ SFP_E_TIMEOUT, -+ -+ SFP_MOD_EMPTY = 0, -+ SFP_MOD_PROBE, -+ SFP_MOD_PRESENT, -+ SFP_MOD_ERROR, -+ -+ SFP_DEV_DOWN = 0, -+ SFP_DEV_UP, -+ -+ SFP_S_DOWN = 0, -+ SFP_S_INIT, -+ SFP_S_WAIT_LOS, -+ SFP_S_LINK_UP, -+ SFP_S_TX_FAULT, -+ SFP_S_REINIT, -+ SFP_S_TX_DISABLE, -+}; -+ -+static const char *gpio_of_names[] = { -+ "moddef0", -+ "los", -+ "tx-fault", -+ "tx-disable", -+ "rate-select", -+}; -+ -+static const enum gpiod_flags gpio_flags[] = { -+ GPIOD_IN, -+ GPIOD_IN, -+ GPIOD_IN, -+ GPIOD_ASIS, -+ GPIOD_ASIS, -+}; -+ -+#define T_INIT_JIFFIES msecs_to_jiffies(300) -+#define T_RESET_US 10 -+#define T_FAULT_RECOVER msecs_to_jiffies(1000) -+ -+/* SFP module presence detection is poor: the three MOD DEF signals are -+ * the same length on the PCB, which means it's possible for MOD DEF 0 to -+ * connect before the I2C bus on MOD DEF 1/2. -+ * -+ * The SFP MSA specifies 300ms as t_init (the time taken for TX_FAULT to -+ * be deasserted) but makes no mention of the earliest time before we can -+ * access the I2C EEPROM. However, Avago modules require 300ms. -+ */ -+#define T_PROBE_INIT msecs_to_jiffies(300) -+#define T_PROBE_RETRY msecs_to_jiffies(100) -+ -+/* -+ * SFP modules appear to always have their PHY configured for bus address -+ * 0x56 (which with mdio-i2c, translates to a PHY address of 22). -+ */ -+#define SFP_PHY_ADDR 22 -+ -+/* -+ * Give this long for the PHY to reset. -+ */ -+#define T_PHY_RESET_MS 50 -+ -+static DEFINE_MUTEX(sfp_mutex); -+ -+struct sfp { -+ struct device *dev; -+ struct i2c_adapter *i2c; -+ struct mii_bus *i2c_mii; -+ struct net_device *ndev; -+ struct phylink *phylink; -+ struct phy_device *mod_phy; -+ -+ unsigned int (*get_state)(struct sfp *); -+ void (*set_state)(struct sfp *, unsigned int); -+ int (*read)(struct sfp *, bool, u8, void *, size_t); -+ -+ struct gpio_desc *gpio[GPIO_MAX]; -+ -+ unsigned int state; -+ struct delayed_work poll; -+ struct delayed_work timeout; -+ struct mutex sm_mutex; -+ unsigned char sm_mod_state; -+ unsigned char sm_dev_state; -+ unsigned short sm_state; -+ unsigned int sm_retries; -+ -+ struct sfp_eeprom_id id; -+ -+ struct notifier_block netdev_nb; -+}; -+ -+static unsigned long poll_jiffies; -+ -+static unsigned int sfp_gpio_get_state(struct sfp *sfp) -+{ -+ unsigned int i, state, v; -+ -+ for (i = state = 0; i < GPIO_MAX; i++) { -+ if (gpio_flags[i] != GPIOD_IN || !sfp->gpio[i]) -+ continue; -+ -+ v = gpiod_get_value_cansleep(sfp->gpio[i]); -+ if (v) -+ state |= BIT(i); -+ } -+ -+ return state; -+} -+ -+static void sfp_gpio_set_state(struct sfp *sfp, unsigned int state) -+{ -+ if (state & SFP_F_PRESENT) { -+ /* If the module is present, drive the signals */ -+ if (sfp->gpio[GPIO_TX_DISABLE]) -+ gpiod_direction_output(sfp->gpio[GPIO_TX_DISABLE], -+ state & SFP_F_TX_DISABLE); -+ if (state & SFP_F_RATE_SELECT) -+ gpiod_direction_output(sfp->gpio[GPIO_RATE_SELECT], -+ state & SFP_F_RATE_SELECT); -+ } else { -+ /* Otherwise, let them float to the pull-ups */ -+ if (sfp->gpio[GPIO_TX_DISABLE]) -+ gpiod_direction_input(sfp->gpio[GPIO_TX_DISABLE]); -+ if (state & SFP_F_RATE_SELECT) -+ gpiod_direction_input(sfp->gpio[GPIO_RATE_SELECT]); -+ } -+} -+ -+static int sfp__i2c_read(struct i2c_adapter *i2c, u8 bus_addr, u8 dev_addr, -+ void *buf, size_t len) -+{ -+ struct i2c_msg msgs[2]; -+ int ret; -+ -+ msgs[0].addr = bus_addr; -+ msgs[0].flags = 0; -+ msgs[0].len = 1; -+ msgs[0].buf = &dev_addr; -+ msgs[1].addr = bus_addr; -+ msgs[1].flags = I2C_M_RD; -+ msgs[1].len = len; -+ msgs[1].buf = buf; -+ -+ ret = i2c_transfer(i2c, msgs, ARRAY_SIZE(msgs)); -+ if (ret < 0) -+ return ret; -+ -+ return ret == ARRAY_SIZE(msgs) ? len : 0; -+} -+ -+static int sfp_i2c_read(struct sfp *sfp, bool a2, u8 addr, void *buf, -+ size_t len) -+{ -+ return sfp__i2c_read(sfp->i2c, a2 ? 0x51 : 0x50, addr, buf, len); -+} -+ -+static int sfp_i2c_configure(struct sfp *sfp, struct i2c_adapter *i2c) -+{ -+ struct mii_bus *i2c_mii; -+ int ret; -+ -+ if (!i2c_check_functionality(i2c, I2C_FUNC_I2C)) -+ return -EINVAL; -+ -+ sfp->i2c = i2c; -+ sfp->read = sfp_i2c_read; -+ -+ i2c_mii = mdio_i2c_alloc(sfp->dev, i2c); -+ if (IS_ERR(i2c_mii)) -+ return PTR_ERR(i2c_mii); -+ -+ i2c_mii->name = "SFP I2C Bus"; -+ i2c_mii->phy_mask = ~0; -+ -+ ret = mdiobus_register(i2c_mii); -+ if (ret < 0) { -+ mdiobus_free(i2c_mii); -+ return ret; -+ } -+ -+ sfp->i2c_mii = i2c_mii; -+ -+ return 0; -+} -+ -+ -+/* Interface */ -+static unsigned int sfp_get_state(struct sfp *sfp) -+{ -+ return sfp->get_state(sfp); -+} -+ -+static void sfp_set_state(struct sfp *sfp, unsigned int state) -+{ -+ sfp->set_state(sfp, state); -+} -+ -+static int sfp_read(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len) -+{ -+ return sfp->read(sfp, a2, addr, buf, len); -+} -+ -+static unsigned int sfp_check(void *buf, size_t len) -+{ -+ u8 *p, check; -+ -+ for (p = buf, check = 0; len; p++, len--) -+ check += *p; -+ -+ return check; -+} -+ -+/* Helpers */ -+static void sfp_module_tx_disable(struct sfp *sfp) -+{ -+ dev_dbg(sfp->dev, "tx disable %u -> %u\n", -+ sfp->state & SFP_F_TX_DISABLE ? 1 : 0, 1); -+ sfp->state |= SFP_F_TX_DISABLE; -+ sfp_set_state(sfp, sfp->state); -+} -+ -+static void sfp_module_tx_enable(struct sfp *sfp) -+{ -+ dev_dbg(sfp->dev, "tx disable %u -> %u\n", -+ sfp->state & SFP_F_TX_DISABLE ? 1 : 0, 0); -+ sfp->state &= ~SFP_F_TX_DISABLE; -+ sfp_set_state(sfp, sfp->state); -+} -+ -+static void sfp_module_tx_fault_reset(struct sfp *sfp) -+{ -+ unsigned int state = sfp->state; -+ -+ if (state & SFP_F_TX_DISABLE) -+ return; -+ -+ sfp_set_state(sfp, state | SFP_F_TX_DISABLE); -+ -+ udelay(T_RESET_US); -+ -+ sfp_set_state(sfp, state); -+} -+ -+/* SFP state machine */ -+static void sfp_sm_set_timer(struct sfp *sfp, unsigned int timeout) -+{ -+ if (timeout) -+ mod_delayed_work(system_power_efficient_wq, &sfp->timeout, -+ timeout); -+ else -+ cancel_delayed_work(&sfp->timeout); -+} -+ -+static void sfp_sm_next(struct sfp *sfp, unsigned int state, -+ unsigned int timeout) -+{ -+ sfp->sm_state = state; -+ sfp_sm_set_timer(sfp, timeout); -+} -+ -+static void sfp_sm_ins_next(struct sfp *sfp, unsigned int state, unsigned int timeout) -+{ -+ sfp->sm_mod_state = state; -+ sfp_sm_set_timer(sfp, timeout); -+} -+ -+static void sfp_sm_phy_detach(struct sfp *sfp) -+{ -+ phy_stop(sfp->mod_phy); -+ if (sfp->phylink) -+ phylink_disconnect_phy(sfp->phylink); -+ phy_device_remove(sfp->mod_phy); -+ phy_device_free(sfp->mod_phy); -+ sfp->mod_phy = NULL; -+} -+ -+static void sfp_sm_probe_phy(struct sfp *sfp) -+{ -+ struct phy_device *phy; -+ int err; -+ -+ msleep(T_PHY_RESET_MS); -+ -+ phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR); -+ if (IS_ERR(phy)) { -+ dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy)); -+ return; -+ } -+ if (!phy) { -+ dev_info(sfp->dev, "no PHY detected\n"); -+ return; -+ } -+ -+ if (sfp->phylink) { -+ err = phylink_connect_phy(sfp->phylink, phy); -+ if (err) { -+ phy_device_remove(phy); -+ phy_device_free(phy); -+ dev_err(sfp->dev, "phylink_connect_phy failed: %d\n", -+ err); -+ return; -+ } -+ } -+ -+ sfp->mod_phy = phy; -+ phy_start(phy); -+} -+ -+static void sfp_sm_link_up(struct sfp *sfp) -+{ -+ if (sfp->phylink) -+ phylink_enable(sfp->phylink); -+ -+ sfp_sm_next(sfp, SFP_S_LINK_UP, 0); -+} -+ -+static void sfp_sm_link_down(struct sfp *sfp) -+{ -+ if (sfp->phylink) -+ phylink_disable(sfp->phylink); -+} -+ -+static void sfp_sm_link_check_los(struct sfp *sfp) -+{ -+ unsigned int los = sfp->state & SFP_F_LOS; -+ -+ /* FIXME: what if neither SFP_OPTIONS_LOS_INVERTED nor -+ * SFP_OPTIONS_LOS_NORMAL are set? For now, we assume -+ * the same as SFP_OPTIONS_LOS_NORMAL set. -+ */ -+ if (sfp->id.ext.options & SFP_OPTIONS_LOS_INVERTED) -+ los ^= SFP_F_LOS; -+ -+ if (los) -+ sfp_sm_next(sfp, SFP_S_WAIT_LOS, 0); -+ else -+ sfp_sm_link_up(sfp); -+} -+ -+static void sfp_sm_fault(struct sfp *sfp, bool warn) -+{ -+ if (sfp->sm_retries && !--sfp->sm_retries) { -+ dev_err(sfp->dev, "module persistently indicates fault, disabling\n"); -+ sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0); -+ } else { -+ if (warn) -+ dev_err(sfp->dev, "module transmit fault indicated\n"); -+ -+ sfp_sm_next(sfp, SFP_S_TX_FAULT, T_FAULT_RECOVER); -+ } -+} -+ -+static void sfp_sm_mod_init(struct sfp *sfp) -+{ -+ sfp_module_tx_enable(sfp); -+ -+ /* Wait t_init before indicating that the link is up, provided the -+ * current state indicates no TX_FAULT. If TX_FAULT clears before -+ * this time, that's fine too. -+ */ -+ sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -+ sfp->sm_retries = 5; -+ -+ if (sfp->phylink) { -+ /* Setting the serdes link mode is guesswork: there's no -+ * field in the EEPROM which indicates what mode should -+ * be used. -+ * -+ * If it's a gigabit-only fiber module, it probably does -+ * not have a PHY, so switch to 802.3z negotiation mode. -+ * Otherwise, switch to SGMII mode (which is required to -+ * support non-gigabit speeds) and probe for a PHY. -+ */ -+ if (sfp->id.base.e1000_base_t || -+ sfp->id.base.e100_base_lx || -+ sfp->id.base.e100_base_fx) -+ sfp_sm_probe_phy(sfp); -+ } -+} -+ -+static int sfp_sm_mod_probe(struct sfp *sfp) -+{ -+ /* SFP module inserted - read I2C data */ -+ struct sfp_eeprom_id id; -+ char vendor[17]; -+ char part[17]; -+ char sn[17]; -+ char date[9]; -+ char rev[5]; -+ u8 check; -+ int err; -+ -+ err = sfp_read(sfp, false, 0, &id, sizeof(id)); -+ if (err < 0) { -+ dev_err(sfp->dev, "failed to read EEPROM: %d\n", err); -+ return -EAGAIN; -+ } -+ -+ if (err != sizeof(id)) { -+ dev_err(sfp->dev, "EEPROM short read: %d\n", err); -+ return -EAGAIN; -+ } -+ -+ /* Validate the checksum over the base structure */ -+ check = sfp_check(&id.base, sizeof(id.base) - 1); -+ if (check != id.base.cc_base) { -+ dev_err(sfp->dev, -+ "EEPROM base structure checksum failure: 0x%02x\n", -+ check); -+ print_hex_dump(KERN_ERR, "sfp EE: ", DUMP_PREFIX_OFFSET, -+ 16, 1, &id, sizeof(id.base) - 1, true); -+ return -EINVAL; -+ } -+ -+ check = sfp_check(&id.ext, sizeof(id.ext) - 1); -+ if (check != id.ext.cc_ext) { -+ dev_err(sfp->dev, -+ "EEPROM extended structure checksum failure: 0x%02x\n", -+ check); -+ memset(&id.ext, 0, sizeof(id.ext)); -+ } -+ -+ sfp->id = id; -+ -+ memcpy(vendor, sfp->id.base.vendor_name, 16); -+ vendor[16] = '\0'; -+ memcpy(part, sfp->id.base.vendor_pn, 16); -+ part[16] = '\0'; -+ memcpy(rev, sfp->id.base.vendor_rev, 4); -+ rev[4] = '\0'; -+ memcpy(sn, sfp->id.ext.vendor_sn, 16); -+ sn[16] = '\0'; -+ memcpy(date, sfp->id.ext.datecode, 8); -+ date[8] = '\0'; -+ -+ dev_info(sfp->dev, "module %s %s rev %s sn %s dc %s\n", vendor, part, rev, sn, date); -+ -+ /* We only support SFP modules, not the legacy GBIC modules. */ -+ if (sfp->id.base.phys_id != SFP_PHYS_ID_SFP || -+ sfp->id.base.phys_ext_id != SFP_PHYS_EXT_ID_SFP) { -+ dev_err(sfp->dev, "module is not SFP - phys id 0x%02x 0x%02x\n", -+ sfp->id.base.phys_id, sfp->id.base.phys_ext_id); -+ return -EINVAL; -+ } -+ -+ /* -+ * What isn't clear from the SFP documentation is whether this -+ * specifies the encoding expected on the TD/RD lines, or whether -+ * the TD/RD lines are always 8b10b encoded, but the transceiver -+ * converts. Eg, think of a copper SFP supporting 1G/100M/10M -+ * ethernet: this requires 8b10b encoding for 1G, 4b5b for 100M, -+ * and manchester for 10M. -+ */ -+ /* 1Gbit ethernet requires 8b10b encoding */ -+ if (sfp->id.base.encoding != SFP_ENCODING_8B10B) { -+ dev_err(sfp->dev, "module does not support 8B10B encoding\n"); -+ return -EINVAL; -+ } -+ -+ if (sfp->phylink) { -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(support) = { 0, }; -+ int mode; -+ u8 port; -+ -+ phylink_set(support, Autoneg); -+ phylink_set(support, Pause); -+ phylink_set(support, Asym_Pause); -+ -+ /* Set ethtool support from the compliance fields. */ -+ if (sfp->id.base.e10g_base_sr) -+ phylink_set(support, 10000baseSR_Full); -+ if (sfp->id.base.e10g_base_lr) -+ phylink_set(support, 10000baseLR_Full); -+ if (sfp->id.base.e10g_base_lrm) -+ phylink_set(support, 10000baseLRM_Full); -+ if (sfp->id.base.e10g_base_er) -+ phylink_set(support, 10000baseER_Full); -+ if (sfp->id.base.e1000_base_sx || -+ sfp->id.base.e1000_base_lx || -+ sfp->id.base.e1000_base_cx) -+ phylink_set(support, 1000baseX_Full); -+ if (sfp->id.base.e1000_base_t) { -+ phylink_set(support, 1000baseT_Half); -+ phylink_set(support, 1000baseT_Full); -+ } -+ -+ /* port is the physical connector, set this from the -+ * connector field. -+ */ -+ switch (sfp->id.base.connector) { -+ case SFP_CONNECTOR_SC: -+ case SFP_CONNECTOR_FIBERJACK: -+ case SFP_CONNECTOR_LC: -+ case SFP_CONNECTOR_MT_RJ: -+ case SFP_CONNECTOR_MU: -+ case SFP_CONNECTOR_OPTICAL_PIGTAIL: -+ phylink_set(support, FIBRE); -+ port = PORT_FIBRE; -+ break; -+ -+ case SFP_CONNECTOR_RJ45: -+ phylink_set(support, TP); -+ port = PORT_TP; -+ break; -+ -+ case SFP_CONNECTOR_UNSPEC: -+ if (sfp->id.base.e1000_base_t) { -+ phylink_set(support, TP); -+ port = PORT_TP; -+ break; -+ } -+ /* fallthrough */ -+ case SFP_CONNECTOR_SG: /* guess */ -+ case SFP_CONNECTOR_MPO_1X12: -+ case SFP_CONNECTOR_MPO_2X16: -+ case SFP_CONNECTOR_HSSDC_II: -+ case SFP_CONNECTOR_COPPER_PIGTAIL: -+ case SFP_CONNECTOR_NOSEPARATE: -+ case SFP_CONNECTOR_MXC_2X16: -+ default: -+ /* a guess at the supported link modes */ -+ dev_warn(sfp->dev, "Guessing link modes, please report...\n"); -+ phylink_set(support, 1000baseT_Half); -+ phylink_set(support, 1000baseT_Full); -+ port = PORT_OTHER; -+ break; -+ } -+ -+ /* Setting the serdes link mode is guesswork: there's no -+ * field in the EEPROM which indicates what mode should -+ * be used. -+ * -+ * If it's a gigabit-only fiber module, it probably does -+ * not have a PHY, so switch to 802.3z negotiation mode. -+ * Otherwise, switch to SGMII mode (which is required to -+ * support non-gigabit speeds) and probe for a PHY. -+ */ -+ if (!sfp->id.base.e1000_base_t && -+ !sfp->id.base.e100_base_lx && -+ !sfp->id.base.e100_base_fx) { -+ mode = MLO_AN_8023Z; -+ } else { -+ mode = MLO_AN_SGMII; -+ } -+ -+ phylink_set_link(sfp->phylink, mode, port, support); -+ } -+ -+ return 0; -+} -+ -+static void sfp_sm_mod_remove(struct sfp *sfp) -+{ -+ if (sfp->mod_phy) -+ sfp_sm_phy_detach(sfp); -+ -+ sfp_module_tx_disable(sfp); -+ -+ memset(&sfp->id, 0, sizeof(sfp->id)); -+ -+ dev_info(sfp->dev, "module removed\n"); -+} -+ -+static void sfp_sm_event(struct sfp *sfp, unsigned int event) -+{ -+ mutex_lock(&sfp->sm_mutex); -+ -+ dev_dbg(sfp->dev, "SM: enter %u:%u:%u event %u\n", -+ sfp->sm_mod_state, sfp->sm_dev_state, sfp->sm_state, event); -+ -+ /* This state machine tracks the insert/remove state of -+ * the module, and handles probing the on-board EEPROM. -+ */ -+ switch (sfp->sm_mod_state) { -+ default: -+ if (event == SFP_E_INSERT) { -+ sfp_module_tx_disable(sfp); -+ sfp_sm_ins_next(sfp, SFP_MOD_PROBE, T_PROBE_INIT); -+ } -+ break; -+ -+ case SFP_MOD_PROBE: -+ if (event == SFP_E_REMOVE) { -+ sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0); -+ } else if (event == SFP_E_TIMEOUT) { -+ int err = sfp_sm_mod_probe(sfp); -+ -+ if (err == 0) -+ sfp_sm_ins_next(sfp, SFP_MOD_PRESENT, 0); -+ else if (err == -EAGAIN) -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ else -+ sfp_sm_ins_next(sfp, SFP_MOD_ERROR, 0); -+ } -+ break; -+ -+ case SFP_MOD_PRESENT: -+ case SFP_MOD_ERROR: -+ if (event == SFP_E_REMOVE) { -+ sfp_sm_mod_remove(sfp); -+ sfp_sm_ins_next(sfp, SFP_MOD_EMPTY, 0); -+ } -+ break; -+ } -+ -+ /* This state machine tracks the netdev up/down state */ -+ switch (sfp->sm_dev_state) { -+ default: -+ if (event == SFP_E_DEV_UP) -+ sfp->sm_dev_state = SFP_DEV_UP; -+ break; -+ -+ case SFP_DEV_UP: -+ if (event == SFP_E_DEV_DOWN) { -+ /* If the module has a PHY, avoid raising TX disable -+ * as this resets the PHY. Otherwise, raise it to -+ * turn the laser off. -+ */ -+ if (!sfp->mod_phy) -+ sfp_module_tx_disable(sfp); -+ sfp->sm_dev_state = SFP_DEV_DOWN; -+ } -+ break; -+ } -+ -+ /* Some events are global */ -+ if (sfp->sm_state != SFP_S_DOWN && -+ (sfp->sm_mod_state != SFP_MOD_PRESENT || -+ sfp->sm_dev_state != SFP_DEV_UP)) { -+ if (sfp->sm_state == SFP_S_LINK_UP && -+ sfp->sm_dev_state == SFP_DEV_UP) -+ sfp_sm_link_down(sfp); -+ if (sfp->mod_phy) -+ sfp_sm_phy_detach(sfp); -+ sfp_sm_next(sfp, SFP_S_DOWN, 0); -+ mutex_unlock(&sfp->sm_mutex); -+ return; -+ } -+ -+ /* The main state machine */ -+ switch (sfp->sm_state) { -+ case SFP_S_DOWN: -+ if (sfp->sm_mod_state == SFP_MOD_PRESENT && -+ sfp->sm_dev_state == SFP_DEV_UP) -+ sfp_sm_mod_init(sfp); -+ break; -+ -+ case SFP_S_INIT: -+ if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) -+ sfp_sm_fault(sfp, true); -+ else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) -+ sfp_sm_link_check_los(sfp); -+ break; -+ -+ case SFP_S_WAIT_LOS: -+ if (event == SFP_E_TX_FAULT) -+ sfp_sm_fault(sfp, true); -+ else if (event == -+ (sfp->id.ext.options & SFP_OPTIONS_LOS_INVERTED ? -+ SFP_E_LOS_HIGH : SFP_E_LOS_LOW)) -+ sfp_sm_link_up(sfp); -+ break; -+ -+ case SFP_S_LINK_UP: -+ if (event == SFP_E_TX_FAULT) { -+ sfp_sm_link_down(sfp); -+ sfp_sm_fault(sfp, true); -+ } else if (event == -+ (sfp->id.ext.options & SFP_OPTIONS_LOS_INVERTED ? -+ SFP_E_LOS_LOW : SFP_E_LOS_HIGH)) { -+ sfp_sm_link_down(sfp); -+ sfp_sm_next(sfp, SFP_S_WAIT_LOS, 0); -+ } -+ break; -+ -+ case SFP_S_TX_FAULT: -+ if (event == SFP_E_TIMEOUT) { -+ sfp_module_tx_fault_reset(sfp); -+ sfp_sm_next(sfp, SFP_S_REINIT, T_INIT_JIFFIES); -+ } -+ break; -+ -+ case SFP_S_REINIT: -+ if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) { -+ sfp_sm_fault(sfp, false); -+ } else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) { -+ dev_info(sfp->dev, "module transmit fault recovered\n"); -+ sfp_sm_link_check_los(sfp); -+ } -+ break; -+ -+ case SFP_S_TX_DISABLE: -+ break; -+ } -+ -+ dev_dbg(sfp->dev, "SM: exit %u:%u:%u\n", -+ sfp->sm_mod_state, sfp->sm_dev_state, sfp->sm_state); -+ -+ mutex_unlock(&sfp->sm_mutex); -+} -+ -+#if 0 -+static int sfp_phy_module_info(struct phy_device *phy, -+ struct ethtool_modinfo *modinfo) -+{ -+ struct sfp *sfp = phy->priv; -+ -+ /* locking... and check module is present */ -+ -+ if (sfp->id.ext.sff8472_compliance) { -+ modinfo->type = ETH_MODULE_SFF_8472; -+ modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; -+ } else { -+ modinfo->type = ETH_MODULE_SFF_8079; -+ modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; -+ } -+ return 0; -+} -+ -+static int sfp_phy_module_eeprom(struct phy_device *phy, -+ struct ethtool_eeprom *ee, u8 *data) -+{ -+ struct sfp *sfp = phy->priv; -+ unsigned int first, last, len; -+ int ret; -+ -+ if (ee->len == 0) -+ return -EINVAL; -+ -+ first = ee->offset; -+ last = ee->offset + ee->len; -+ if (first < ETH_MODULE_SFF_8079_LEN) { -+ len = last; -+ if (len > ETH_MODULE_SFF_8079_LEN) -+ len = ETH_MODULE_SFF_8079_LEN; -+ len -= first; -+ -+ ret = sfp->read(sfp, false, first, data, len); -+ if (ret < 0) -+ return ret; -+ -+ first += len; -+ data += len; -+ } -+ if (first >= ETH_MODULE_SFF_8079_LEN && last > first) { -+ len = last - first; -+ -+ ret = sfp->read(sfp, true, first, data, len); -+ if (ret < 0) -+ return ret; -+ } -+ return 0; -+} -+#endif -+ -+static void sfp_timeout(struct work_struct *work) -+{ -+ struct sfp *sfp = container_of(work, struct sfp, timeout.work); -+ -+ sfp_sm_event(sfp, SFP_E_TIMEOUT); -+} -+ -+static void sfp_check_state(struct sfp *sfp) -+{ -+ unsigned int state, i, changed; -+ -+ state = sfp_get_state(sfp); -+ changed = state ^ sfp->state; -+ changed &= SFP_F_PRESENT | SFP_F_LOS | SFP_F_TX_FAULT; -+ -+ for (i = 0; i < GPIO_MAX; i++) -+ if (changed & BIT(i)) -+ dev_dbg(sfp->dev, "%s %u -> %u\n", gpio_of_names[i], -+ !!(sfp->state & BIT(i)), !!(state & BIT(i))); -+ -+ state |= sfp->state & (SFP_F_TX_DISABLE | SFP_F_RATE_SELECT); -+ sfp->state = state; -+ -+ if (changed & SFP_F_PRESENT) -+ sfp_sm_event(sfp, state & SFP_F_PRESENT ? -+ SFP_E_INSERT : SFP_E_REMOVE); -+ -+ if (changed & SFP_F_TX_FAULT) -+ sfp_sm_event(sfp, state & SFP_F_TX_FAULT ? -+ SFP_E_TX_FAULT : SFP_E_TX_CLEAR); -+ -+ if (changed & SFP_F_LOS) -+ sfp_sm_event(sfp, state & SFP_F_LOS ? -+ SFP_E_LOS_HIGH : SFP_E_LOS_LOW); -+} -+ -+static irqreturn_t sfp_irq(int irq, void *data) -+{ -+ struct sfp *sfp = data; -+ -+ sfp_check_state(sfp); -+ -+ return IRQ_HANDLED; -+} -+ -+static void sfp_poll(struct work_struct *work) -+{ -+ struct sfp *sfp = container_of(work, struct sfp, poll.work); -+ -+ sfp_check_state(sfp); -+ mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); -+} -+ -+static int sfp_netdev_notify(struct notifier_block *nb, unsigned long act, void *data) -+{ -+ struct sfp *sfp = container_of(nb, struct sfp, netdev_nb); -+ struct netdev_notifier_info *info = data; -+ struct net_device *ndev = info->dev; -+ -+ if (!sfp->ndev || ndev != sfp->ndev) -+ return NOTIFY_DONE; -+ -+ switch (act) { -+ case NETDEV_UP: -+ sfp_sm_event(sfp, SFP_E_DEV_UP); -+ break; -+ -+ case NETDEV_GOING_DOWN: -+ sfp_sm_event(sfp, SFP_E_DEV_DOWN); -+ break; -+ -+ case NETDEV_UNREGISTER: -+ if (sfp->mod_phy && sfp->phylink) -+ phylink_disconnect_phy(sfp->phylink); -+ sfp->phylink = NULL; -+ dev_put(sfp->ndev); -+ sfp->ndev = NULL; -+ break; -+ } -+ return NOTIFY_OK; -+} -+ -+static struct sfp *sfp_alloc(struct device *dev) -+{ -+ struct sfp *sfp; -+ -+ sfp = kzalloc(sizeof(*sfp), GFP_KERNEL); -+ if (!sfp) -+ return ERR_PTR(-ENOMEM); -+ -+ sfp->dev = dev; -+ -+ mutex_init(&sfp->sm_mutex); -+ INIT_DELAYED_WORK(&sfp->poll, sfp_poll); -+ INIT_DELAYED_WORK(&sfp->timeout, sfp_timeout); -+ -+ sfp->netdev_nb.notifier_call = sfp_netdev_notify; -+ -+ return sfp; -+} -+ -+static void sfp_destroy(struct sfp *sfp) -+{ -+ cancel_delayed_work_sync(&sfp->poll); -+ cancel_delayed_work_sync(&sfp->timeout); -+ if (sfp->i2c_mii) { -+ mdiobus_unregister(sfp->i2c_mii); -+ mdiobus_free(sfp->i2c_mii); -+ } -+ if (sfp->i2c) -+ i2c_put_adapter(sfp->i2c); -+ of_node_put(sfp->dev->of_node); -+ kfree(sfp); -+} -+ -+static void sfp_cleanup(void *data) -+{ -+ struct sfp *sfp = data; -+ -+ sfp_destroy(sfp); -+} -+ -+static int sfp_probe(struct platform_device *pdev) -+{ -+ struct sfp *sfp; -+ bool poll = false; -+ int irq, err, i; -+ -+ sfp = sfp_alloc(&pdev->dev); -+ if (IS_ERR(sfp)) -+ return PTR_ERR(sfp); -+ -+ platform_set_drvdata(pdev, sfp); -+ -+ err = devm_add_action(sfp->dev, sfp_cleanup, sfp); -+ if (err < 0) -+ return err; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *node = pdev->dev.of_node; -+ struct device_node *np; -+ -+ np = of_parse_phandle(node, "i2c-bus", 0); -+ if (np) { -+ struct i2c_adapter *i2c; -+ -+ i2c = of_find_i2c_adapter_by_node(np); -+ of_node_put(np); -+ if (!i2c) -+ return -EPROBE_DEFER; -+ -+ err = sfp_i2c_configure(sfp, i2c); -+ if (err < 0) { -+ i2c_put_adapter(i2c); -+ return err; -+ } -+ } -+ -+ for (i = 0; i < GPIO_MAX; i++) { -+ sfp->gpio[i] = devm_gpiod_get_optional(sfp->dev, -+ gpio_of_names[i], gpio_flags[i]); -+ if (IS_ERR(sfp->gpio[i])) -+ return PTR_ERR(sfp->gpio[i]); -+ } -+ -+ sfp->get_state = sfp_gpio_get_state; -+ sfp->set_state = sfp_gpio_set_state; -+ -+ np = of_parse_phandle(node, "sfp,ethernet", 0); -+ if (!np) { -+ dev_err(sfp->dev, "missing sfp,ethernet property\n"); -+ return -EINVAL; -+ } -+ -+ sfp->ndev = of_find_net_device_by_node(np); -+ if (!sfp->ndev) { -+ dev_err(sfp->dev, "ethernet device not found\n"); -+ return -EPROBE_DEFER; -+ } -+ -+ dev_hold(sfp->ndev); -+ put_device(&sfp->ndev->dev); -+ -+ sfp->phylink = phylink_lookup_by_netdev(sfp->ndev); -+ if (!sfp->phylink) { -+ dev_err(sfp->dev, "phylink for %s not found\n", -+ netdev_name(sfp->ndev)); -+ return -EPROBE_DEFER; -+ } -+ -+ phylink_disable(sfp->phylink); -+ } -+ -+ sfp->state = sfp_get_state(sfp); -+ if (sfp->gpio[GPIO_TX_DISABLE] && -+ gpiod_get_value_cansleep(sfp->gpio[GPIO_TX_DISABLE])) -+ sfp->state |= SFP_F_TX_DISABLE; -+ if (sfp->gpio[GPIO_RATE_SELECT] && -+ gpiod_get_value_cansleep(sfp->gpio[GPIO_RATE_SELECT])) -+ sfp->state |= SFP_F_RATE_SELECT; -+ sfp_set_state(sfp, sfp->state); -+ sfp_module_tx_disable(sfp); -+ if (sfp->state & SFP_F_PRESENT) -+ sfp_sm_event(sfp, SFP_E_INSERT); -+ -+ for (i = 0; i < GPIO_MAX; i++) { -+ if (gpio_flags[i] != GPIOD_IN || !sfp->gpio[i]) -+ continue; -+ -+ irq = gpiod_to_irq(sfp->gpio[i]); -+ if (!irq) { -+ poll = true; -+ continue; -+ } -+ -+ err = devm_request_threaded_irq(sfp->dev, irq, NULL, sfp_irq, -+ IRQF_ONESHOT | -+ IRQF_TRIGGER_RISING | -+ IRQF_TRIGGER_FALLING, -+ dev_name(sfp->dev), sfp); -+ if (err) -+ poll = true; -+ } -+ -+ if (poll) -+ mod_delayed_work(system_wq, &sfp->poll, poll_jiffies); -+ -+ register_netdevice_notifier(&sfp->netdev_nb); -+ -+ return 0; -+} -+ -+static int sfp_remove(struct platform_device *pdev) -+{ -+ struct sfp *sfp = platform_get_drvdata(pdev); -+ -+ unregister_netdevice_notifier(&sfp->netdev_nb); -+ if (sfp->ndev) -+ dev_put(sfp->ndev); -+ -+ return 0; -+} -+ -+static const struct of_device_id sfp_of_match[] = { -+ { .compatible = "sff,sfp", }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, sfp_of_match); -+ -+static struct platform_driver sfp_driver = { -+ .probe = sfp_probe, -+ .remove = sfp_remove, -+ .driver = { -+ .name = "sfp", -+ .of_match_table = sfp_of_match, -+ }, -+}; -+ -+static int sfp_init(void) -+{ -+ poll_jiffies = msecs_to_jiffies(100); -+ -+ return platform_driver_register(&sfp_driver); -+} -+module_init(sfp_init); -+ -+static void sfp_exit(void) -+{ -+ platform_driver_unregister(&sfp_driver); -+} -+module_exit(sfp_exit); -+ -+MODULE_ALIAS("platform:sfp"); -+MODULE_AUTHOR("Russell King"); -+MODULE_LICENSE("GPL v2"); ---- /dev/null -+++ b/include/linux/sfp.h -@@ -0,0 +1,344 @@ -+#ifndef LINUX_SFP_H -+#define LINUX_SFP_H -+ -+struct __packed sfp_eeprom_base { -+ u8 phys_id; -+ u8 phys_ext_id; -+ u8 connector; -+#if defined __BIG_ENDIAN_BITFIELD -+ u8 e10g_base_er:1; -+ u8 e10g_base_lrm:1; -+ u8 e10g_base_lr:1; -+ u8 e10g_base_sr:1; -+ u8 if_1x_sx:1; -+ u8 if_1x_lx:1; -+ u8 if_1x_copper_active:1; -+ u8 if_1x_copper_passive:1; -+ -+ u8 escon_mmf_1310_led:1; -+ u8 escon_smf_1310_laser:1; -+ u8 sonet_oc192_short_reach:1; -+ u8 sonet_reach_bit1:1; -+ u8 sonet_reach_bit2:1; -+ u8 sonet_oc48_long_reach:1; -+ u8 sonet_oc48_intermediate_reach:1; -+ u8 sonet_oc48_short_reach:1; -+ -+ u8 unallocated_5_7:1; -+ u8 sonet_oc12_smf_long_reach:1; -+ u8 sonet_oc12_smf_intermediate_reach:1; -+ u8 sonet_oc12_short_reach:1; -+ u8 unallocated_5_3:1; -+ u8 sonet_oc3_smf_long_reach:1; -+ u8 sonet_oc3_smf_intermediate_reach:1; -+ u8 sonet_oc3_short_reach:1; -+ -+ u8 e_base_px:1; -+ u8 e_base_bx10:1; -+ u8 e100_base_fx:1; -+ u8 e100_base_lx:1; -+ u8 e1000_base_t:1; -+ u8 e1000_base_cx:1; -+ u8 e1000_base_lx:1; -+ u8 e1000_base_sx:1; -+ -+ u8 fc_ll_v:1; -+ u8 fc_ll_s:1; -+ u8 fc_ll_i:1; -+ u8 fc_ll_l:1; -+ u8 fc_ll_m:1; -+ u8 fc_tech_sa:1; -+ u8 fc_tech_lc:1; -+ u8 fc_tech_electrical_inter_enclosure:1; -+ -+ u8 fc_tech_electrical_intra_enclosure:1; -+ u8 fc_tech_sn:1; -+ u8 fc_tech_sl:1; -+ u8 fc_tech_ll:1; -+ u8 sfp_ct_active:1; -+ u8 sfp_ct_passive:1; -+ u8 unallocated_8_1:1; -+ u8 unallocated_8_0:1; -+ -+ u8 fc_media_tw:1; -+ u8 fc_media_tp:1; -+ u8 fc_media_mi:1; -+ u8 fc_media_tv:1; -+ u8 fc_media_m6:1; -+ u8 fc_media_m5:1; -+ u8 unallocated_9_1:1; -+ u8 fc_media_sm:1; -+ -+ u8 fc_speed_1200:1; -+ u8 fc_speed_800:1; -+ u8 fc_speed_1600:1; -+ u8 fc_speed_400:1; -+ u8 fc_speed_3200:1; -+ u8 fc_speed_200:1; -+ u8 unallocated_10_1:1; -+ u8 fc_speed_100:1; -+#elif defined __LITTLE_ENDIAN_BITFIELD -+ u8 if_1x_copper_passive:1; -+ u8 if_1x_copper_active:1; -+ u8 if_1x_lx:1; -+ u8 if_1x_sx:1; -+ u8 e10g_base_sr:1; -+ u8 e10g_base_lr:1; -+ u8 e10g_base_lrm:1; -+ u8 e10g_base_er:1; -+ -+ u8 sonet_oc3_short_reach:1; -+ u8 sonet_oc3_smf_intermediate_reach:1; -+ u8 sonet_oc3_smf_long_reach:1; -+ u8 unallocated_5_3:1; -+ u8 sonet_oc12_short_reach:1; -+ u8 sonet_oc12_smf_intermediate_reach:1; -+ u8 sonet_oc12_smf_long_reach:1; -+ u8 unallocated_5_7:1; -+ -+ u8 sonet_oc48_short_reach:1; -+ u8 sonet_oc48_intermediate_reach:1; -+ u8 sonet_oc48_long_reach:1; -+ u8 sonet_reach_bit2:1; -+ u8 sonet_reach_bit1:1; -+ u8 sonet_oc192_short_reach:1; -+ u8 escon_smf_1310_laser:1; -+ u8 escon_mmf_1310_led:1; -+ -+ u8 e1000_base_sx:1; -+ u8 e1000_base_lx:1; -+ u8 e1000_base_cx:1; -+ u8 e1000_base_t:1; -+ u8 e100_base_lx:1; -+ u8 e100_base_fx:1; -+ u8 e_base_bx10:1; -+ u8 e_base_px:1; -+ -+ u8 fc_tech_electrical_inter_enclosure:1; -+ u8 fc_tech_lc:1; -+ u8 fc_tech_sa:1; -+ u8 fc_ll_m:1; -+ u8 fc_ll_l:1; -+ u8 fc_ll_i:1; -+ u8 fc_ll_s:1; -+ u8 fc_ll_v:1; -+ -+ u8 unallocated_8_0:1; -+ u8 unallocated_8_1:1; -+ u8 sfp_ct_passive:1; -+ u8 sfp_ct_active:1; -+ u8 fc_tech_ll:1; -+ u8 fc_tech_sl:1; -+ u8 fc_tech_sn:1; -+ u8 fc_tech_electrical_intra_enclosure:1; -+ -+ u8 fc_media_sm:1; -+ u8 unallocated_9_1:1; -+ u8 fc_media_m5:1; -+ u8 fc_media_m6:1; -+ u8 fc_media_tv:1; -+ u8 fc_media_mi:1; -+ u8 fc_media_tp:1; -+ u8 fc_media_tw:1; -+ -+ u8 fc_speed_100:1; -+ u8 unallocated_10_1:1; -+ u8 fc_speed_200:1; -+ u8 fc_speed_3200:1; -+ u8 fc_speed_400:1; -+ u8 fc_speed_1600:1; -+ u8 fc_speed_800:1; -+ u8 fc_speed_1200:1; -+#else -+#error Unknown Endian -+#endif -+ u8 encoding; -+ u8 br_nominal; -+ u8 rate_id; -+ u8 link_len[6]; -+ char vendor_name[16]; -+ u8 reserved36; -+ char vendor_oui[3]; -+ char vendor_pn[16]; -+ char vendor_rev[4]; -+ union { -+ __be16 optical_wavelength; -+ u8 cable_spec; -+ }; -+ u8 reserved62; -+ u8 cc_base; -+}; -+ -+struct __packed sfp_eeprom_ext { -+ __be16 options; -+ u8 br_max; -+ u8 br_min; -+ char vendor_sn[16]; -+ char datecode[8]; -+ u8 diagmon; -+ u8 enhopts; -+ u8 sff8472_compliance; -+ u8 cc_ext; -+}; -+ -+struct __packed sfp_eeprom_id { -+ struct sfp_eeprom_base base; -+ struct sfp_eeprom_ext ext; -+}; -+ -+/* SFP EEPROM registers */ -+enum { -+ SFP_PHYS_ID = 0x00, -+ SFP_PHYS_EXT_ID = 0x01, -+ SFP_CONNECTOR = 0x02, -+ SFP_COMPLIANCE = 0x03, -+ SFP_ENCODING = 0x0b, -+ SFP_BR_NOMINAL = 0x0c, -+ SFP_RATE_ID = 0x0d, -+ SFP_LINK_LEN_SM_KM = 0x0e, -+ SFP_LINK_LEN_SM_100M = 0x0f, -+ SFP_LINK_LEN_50UM_OM2_10M = 0x10, -+ SFP_LINK_LEN_62_5UM_OM1_10M = 0x11, -+ SFP_LINK_LEN_COPPER_1M = 0x12, -+ SFP_LINK_LEN_50UM_OM4_10M = 0x12, -+ SFP_LINK_LEN_50UM_OM3_10M = 0x13, -+ SFP_VENDOR_NAME = 0x14, -+ SFP_VENDOR_OUI = 0x25, -+ SFP_VENDOR_PN = 0x28, -+ SFP_VENDOR_REV = 0x38, -+ SFP_OPTICAL_WAVELENGTH_MSB = 0x3c, -+ SFP_OPTICAL_WAVELENGTH_LSB = 0x3d, -+ SFP_CABLE_SPEC = 0x3c, -+ SFP_CC_BASE = 0x3f, -+ SFP_OPTIONS = 0x40, /* 2 bytes, MSB, LSB */ -+ SFP_BR_MAX = 0x42, -+ SFP_BR_MIN = 0x43, -+ SFP_VENDOR_SN = 0x44, -+ SFP_DATECODE = 0x54, -+ SFP_DIAGMON = 0x5c, -+ SFP_ENHOPTS = 0x5d, -+ SFP_SFF8472_COMPLIANCE = 0x5e, -+ SFP_CC_EXT = 0x5f, -+ -+ SFP_PHYS_ID_SFP = 0x03, -+ SFP_PHYS_EXT_ID_SFP = 0x04, -+ SFP_CONNECTOR_UNSPEC = 0x00, -+ /* codes 01-05 not supportable on SFP, but some modules have single SC */ -+ SFP_CONNECTOR_SC = 0x01, -+ SFP_CONNECTOR_FIBERJACK = 0x06, -+ SFP_CONNECTOR_LC = 0x07, -+ SFP_CONNECTOR_MT_RJ = 0x08, -+ SFP_CONNECTOR_MU = 0x09, -+ SFP_CONNECTOR_SG = 0x0a, -+ SFP_CONNECTOR_OPTICAL_PIGTAIL = 0x0b, -+ SFP_CONNECTOR_MPO_1X12 = 0x0c, -+ SFP_CONNECTOR_MPO_2X16 = 0x0d, -+ SFP_CONNECTOR_HSSDC_II = 0x20, -+ SFP_CONNECTOR_COPPER_PIGTAIL = 0x21, -+ SFP_CONNECTOR_RJ45 = 0x22, -+ SFP_CONNECTOR_NOSEPARATE = 0x23, -+ SFP_CONNECTOR_MXC_2X16 = 0x24, -+ SFP_ENCODING_UNSPEC = 0x00, -+ SFP_ENCODING_8B10B = 0x01, -+ SFP_ENCODING_4B5B = 0x02, -+ SFP_ENCODING_NRZ = 0x03, -+ SFP_ENCODING_MANCHESTER = 0x04, -+ SFP_OPTIONS_HIGH_POWER_LEVEL = BIT(13), -+ SFP_OPTIONS_PAGING_A2 = BIT(12), -+ SFP_OPTIONS_RETIMER = BIT(11), -+ SFP_OPTIONS_COOLED_XCVR = BIT(10), -+ SFP_OPTIONS_POWER_DECL = BIT(9), -+ SFP_OPTIONS_RX_LINEAR_OUT = BIT(8), -+ SFP_OPTIONS_RX_DECISION_THRESH = BIT(7), -+ SFP_OPTIONS_TUNABLE_TX = BIT(6), -+ SFP_OPTIONS_RATE_SELECT = BIT(5), -+ SFP_OPTIONS_TX_DISABLE = BIT(4), -+ SFP_OPTIONS_TX_FAULT = BIT(3), -+ SFP_OPTIONS_LOS_INVERTED = BIT(2), -+ SFP_OPTIONS_LOS_NORMAL = BIT(1), -+ SFP_DIAGMON_DDM = BIT(6), -+ SFP_DIAGMON_INT_CAL = BIT(5), -+ SFP_DIAGMON_EXT_CAL = BIT(4), -+ SFP_DIAGMON_RXPWR_AVG = BIT(3), -+ SFP_DIAGMON_ADDRMODE = BIT(2), -+ SFP_ENHOPTS_ALARMWARN = BIT(7), -+ SFP_ENHOPTS_SOFT_TX_DISABLE = BIT(6), -+ SFP_ENHOPTS_SOFT_TX_FAULT = BIT(5), -+ SFP_ENHOPTS_SOFT_RX_LOS = BIT(4), -+ SFP_ENHOPTS_SOFT_RATE_SELECT = BIT(3), -+ SFP_ENHOPTS_APP_SELECT_SFF8079 = BIT(2), -+ SFP_ENHOPTS_SOFT_RATE_SFF8431 = BIT(1), -+ SFP_SFF8472_COMPLIANCE_NONE = 0x00, -+ SFP_SFF8472_COMPLIANCE_REV9_3 = 0x01, -+ SFP_SFF8472_COMPLIANCE_REV9_5 = 0x02, -+ SFP_SFF8472_COMPLIANCE_REV10_2 = 0x03, -+ SFP_SFF8472_COMPLIANCE_REV10_4 = 0x04, -+ SFP_SFF8472_COMPLIANCE_REV11_0 = 0x05, -+ SFP_SFF8472_COMPLIANCE_REV11_3 = 0x06, -+ SFP_SFF8472_COMPLIANCE_REV11_4 = 0x07, -+ SFP_SFF8472_COMPLIANCE_REV12_0 = 0x08, -+}; -+ -+/* SFP Diagnostics */ -+enum { -+ /* Alarm and warnings stored MSB at lower address then LSB */ -+ SFP_TEMP_HIGH_ALARM = 0x00, -+ SFP_TEMP_LOW_ALARM = 0x02, -+ SFP_TEMP_HIGH_WARN = 0x04, -+ SFP_TEMP_LOW_WARN = 0x06, -+ SFP_VOLT_HIGH_ALARM = 0x08, -+ SFP_VOLT_LOW_ALARM = 0x0a, -+ SFP_VOLT_HIGH_WARN = 0x0c, -+ SFP_VOLT_LOW_WARN = 0x0e, -+ SFP_BIAS_HIGH_ALARM = 0x10, -+ SFP_BIAS_LOW_ALARM = 0x12, -+ SFP_BIAS_HIGH_WARN = 0x14, -+ SFP_BIAS_LOW_WARN = 0x16, -+ SFP_TXPWR_HIGH_ALARM = 0x18, -+ SFP_TXPWR_LOW_ALARM = 0x1a, -+ SFP_TXPWR_HIGH_WARN = 0x1c, -+ SFP_TXPWR_LOW_WARN = 0x1e, -+ SFP_RXPWR_HIGH_ALARM = 0x20, -+ SFP_RXPWR_LOW_ALARM = 0x22, -+ SFP_RXPWR_HIGH_WARN = 0x24, -+ SFP_RXPWR_LOW_WARN = 0x26, -+ SFP_LASER_TEMP_HIGH_ALARM = 0x28, -+ SFP_LASER_TEMP_LOW_ALARM = 0x2a, -+ SFP_LASER_TEMP_HIGH_WARN = 0x2c, -+ SFP_LASER_TEMP_LOW_WARN = 0x2e, -+ SFP_TEC_CUR_HIGH_ALARM = 0x30, -+ SFP_TEC_CUR_LOW_ALARM = 0x32, -+ SFP_TEC_CUR_HIGH_WARN = 0x34, -+ SFP_TEC_CUR_LOW_WARN = 0x36, -+ SFP_CAL_RXPWR4 = 0x38, -+ SFP_CAL_RXPWR3 = 0x3c, -+ SFP_CAL_RXPWR2 = 0x40, -+ SFP_CAL_RXPWR1 = 0x44, -+ SFP_CAL_RXPWR0 = 0x48, -+ SFP_CAL_TXI_SLOPE = 0x4c, -+ SFP_CAL_TXI_OFFSET = 0x4e, -+ SFP_CAL_TXPWR_SLOPE = 0x50, -+ SFP_CAL_TXPWR_OFFSET = 0x52, -+ SFP_CAL_T_SLOPE = 0x54, -+ SFP_CAL_T_OFFSET = 0x56, -+ SFP_CAL_V_SLOPE = 0x58, -+ SFP_CAL_V_OFFSET = 0x5a, -+ SFP_CHKSUM = 0x5f, -+ -+ SFP_TEMP = 0x60, -+ SFP_VCC = 0x62, -+ SFP_TX_BIAS = 0x64, -+ SFP_TX_POWER = 0x66, -+ SFP_RX_POWER = 0x68, -+ SFP_LASER_TEMP = 0x6a, -+ SFP_TEC_CUR = 0x6c, -+ -+ SFP_STATUS = 0x6e, -+ SFP_ALARM = 0x70, -+ -+ SFP_EXT_STATUS = 0x76, -+ SFP_VSL = 0x78, -+ SFP_PAGE = 0x7f, -+}; -+ -+#endif diff --git a/target/linux/mvebu/patches-4.9/418-sfp-display-SFP-module-information.patch b/target/linux/mvebu/patches-4.9/418-sfp-display-SFP-module-information.patch deleted file mode 100644 index f0f2edae9..000000000 --- a/target/linux/mvebu/patches-4.9/418-sfp-display-SFP-module-information.patch +++ /dev/null @@ -1,280 +0,0 @@ -From: Russell King -Date: Sun, 13 Sep 2015 01:06:31 +0100 -Subject: [PATCH] sfp: display SFP module information - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -251,6 +251,182 @@ static unsigned int sfp_check(void *buf, - return check; - } - -+static const char *sfp_link_len(char *buf, size_t size, unsigned int length, -+ unsigned int multiplier) -+{ -+ if (length == 0) -+ return "unsupported/unspecified"; -+ -+ if (length == 255) { -+ *buf++ = '>'; -+ size -= 1; -+ length -= 1; -+ } -+ -+ length *= multiplier; -+ -+ if (length >= 1000) -+ snprintf(buf, size, "%u.%0*ukm", -+ length / 1000, -+ multiplier > 100 ? 1 : -+ multiplier > 10 ? 2 : 3, -+ length % 1000); -+ else -+ snprintf(buf, size, "%um", length); -+ -+ return buf; -+} -+ -+struct bitfield { -+ unsigned int mask; -+ unsigned int val; -+ const char *str; -+}; -+ -+static const struct bitfield sfp_options[] = { -+ { -+ .mask = SFP_OPTIONS_HIGH_POWER_LEVEL, -+ .val = SFP_OPTIONS_HIGH_POWER_LEVEL, -+ .str = "hpl", -+ }, { -+ .mask = SFP_OPTIONS_PAGING_A2, -+ .val = SFP_OPTIONS_PAGING_A2, -+ .str = "paginga2", -+ }, { -+ .mask = SFP_OPTIONS_RETIMER, -+ .val = SFP_OPTIONS_RETIMER, -+ .str = "retimer", -+ }, { -+ .mask = SFP_OPTIONS_COOLED_XCVR, -+ .val = SFP_OPTIONS_COOLED_XCVR, -+ .str = "cooled", -+ }, { -+ .mask = SFP_OPTIONS_POWER_DECL, -+ .val = SFP_OPTIONS_POWER_DECL, -+ .str = "powerdecl", -+ }, { -+ .mask = SFP_OPTIONS_RX_LINEAR_OUT, -+ .val = SFP_OPTIONS_RX_LINEAR_OUT, -+ .str = "rxlinear", -+ }, { -+ .mask = SFP_OPTIONS_RX_DECISION_THRESH, -+ .val = SFP_OPTIONS_RX_DECISION_THRESH, -+ .str = "rxthresh", -+ }, { -+ .mask = SFP_OPTIONS_TUNABLE_TX, -+ .val = SFP_OPTIONS_TUNABLE_TX, -+ .str = "tunabletx", -+ }, { -+ .mask = SFP_OPTIONS_RATE_SELECT, -+ .val = SFP_OPTIONS_RATE_SELECT, -+ .str = "ratesel", -+ }, { -+ .mask = SFP_OPTIONS_TX_DISABLE, -+ .val = SFP_OPTIONS_TX_DISABLE, -+ .str = "txdisable", -+ }, { -+ .mask = SFP_OPTIONS_TX_FAULT, -+ .val = SFP_OPTIONS_TX_FAULT, -+ .str = "txfault", -+ }, { -+ .mask = SFP_OPTIONS_LOS_INVERTED, -+ .val = SFP_OPTIONS_LOS_INVERTED, -+ .str = "los-", -+ }, { -+ .mask = SFP_OPTIONS_LOS_NORMAL, -+ .val = SFP_OPTIONS_LOS_NORMAL, -+ .str = "los+", -+ }, { } -+}; -+ -+static const struct bitfield diagmon[] = { -+ { -+ .mask = SFP_DIAGMON_DDM, -+ .val = SFP_DIAGMON_DDM, -+ .str = "ddm", -+ }, { -+ .mask = SFP_DIAGMON_INT_CAL, -+ .val = SFP_DIAGMON_INT_CAL, -+ .str = "intcal", -+ }, { -+ .mask = SFP_DIAGMON_EXT_CAL, -+ .val = SFP_DIAGMON_EXT_CAL, -+ .str = "extcal", -+ }, { -+ .mask = SFP_DIAGMON_RXPWR_AVG, -+ .val = SFP_DIAGMON_RXPWR_AVG, -+ .str = "rxpwravg", -+ }, { } -+}; -+ -+static const char *sfp_bitfield(char *out, size_t outsz, const struct bitfield *bits, unsigned int val) -+{ -+ char *p = out; -+ int n; -+ -+ *p = '\0'; -+ while (bits->mask) { -+ if ((val & bits->mask) == bits->val) { -+ n = snprintf(p, outsz, "%s%s", -+ out != p ? ", " : "", -+ bits->str); -+ if (n == outsz) -+ break; -+ p += n; -+ outsz -= n; -+ } -+ bits++; -+ } -+ -+ return out; -+} -+ -+static const char *sfp_connector(unsigned int connector) -+{ -+ switch (connector) { -+ case SFP_CONNECTOR_UNSPEC: -+ return "unknown/unspecified"; -+ case SFP_CONNECTOR_SC: -+ return "SC"; -+ case SFP_CONNECTOR_FIBERJACK: -+ return "Fiberjack"; -+ case SFP_CONNECTOR_LC: -+ return "LC"; -+ case SFP_CONNECTOR_MT_RJ: -+ return "MT-RJ"; -+ case SFP_CONNECTOR_MU: -+ return "MU"; -+ case SFP_CONNECTOR_SG: -+ return "SG"; -+ case SFP_CONNECTOR_OPTICAL_PIGTAIL: -+ return "Optical pigtail"; -+ case SFP_CONNECTOR_HSSDC_II: -+ return "HSSDC II"; -+ case SFP_CONNECTOR_COPPER_PIGTAIL: -+ return "Copper pigtail"; -+ default: -+ return "unknown"; -+ } -+} -+ -+static const char *sfp_encoding(unsigned int encoding) -+{ -+ switch (encoding) { -+ case SFP_ENCODING_UNSPEC: -+ return "unspecified"; -+ case SFP_ENCODING_8B10B: -+ return "8b10b"; -+ case SFP_ENCODING_4B5B: -+ return "4b5b"; -+ case SFP_ENCODING_NRZ: -+ return "NRZ"; -+ case SFP_ENCODING_MANCHESTER: -+ return "MANCHESTER"; -+ default: -+ return "unknown"; -+ } -+} -+ - /* Helpers */ - static void sfp_module_tx_disable(struct sfp *sfp) - { -@@ -428,6 +604,7 @@ static int sfp_sm_mod_probe(struct sfp * - char sn[17]; - char date[9]; - char rev[5]; -+ char options[80]; - u8 check; - int err; - -@@ -471,10 +648,78 @@ static int sfp_sm_mod_probe(struct sfp * - rev[4] = '\0'; - memcpy(sn, sfp->id.ext.vendor_sn, 16); - sn[16] = '\0'; -- memcpy(date, sfp->id.ext.datecode, 8); -+ date[0] = sfp->id.ext.datecode[4]; -+ date[1] = sfp->id.ext.datecode[5]; -+ date[2] = '-'; -+ date[3] = sfp->id.ext.datecode[2]; -+ date[4] = sfp->id.ext.datecode[3]; -+ date[5] = '-'; -+ date[6] = sfp->id.ext.datecode[0]; -+ date[7] = sfp->id.ext.datecode[1]; - date[8] = '\0'; - - dev_info(sfp->dev, "module %s %s rev %s sn %s dc %s\n", vendor, part, rev, sn, date); -+ dev_info(sfp->dev, " %s connector, encoding %s, nominal bitrate %u.%uGbps +%u%% -%u%%\n", -+ sfp_connector(sfp->id.base.connector), -+ sfp_encoding(sfp->id.base.encoding), -+ sfp->id.base.br_nominal / 10, -+ sfp->id.base.br_nominal % 10, -+ sfp->id.ext.br_max, sfp->id.ext.br_min); -+ dev_info(sfp->dev, " 1000BaseSX%c 1000BaseLX%c 1000BaseCX%c 1000BaseT%c 100BaseTLX%c 1000BaseFX%c BaseBX10%c BasePX%c\n", -+ sfp->id.base.e1000_base_sx ? '+' : '-', -+ sfp->id.base.e1000_base_lx ? '+' : '-', -+ sfp->id.base.e1000_base_cx ? '+' : '-', -+ sfp->id.base.e1000_base_t ? '+' : '-', -+ sfp->id.base.e100_base_lx ? '+' : '-', -+ sfp->id.base.e100_base_fx ? '+' : '-', -+ sfp->id.base.e_base_bx10 ? '+' : '-', -+ sfp->id.base.e_base_px ? '+' : '-'); -+ -+ if (!sfp->id.base.sfp_ct_passive && !sfp->id.base.sfp_ct_active && -+ !sfp->id.base.e1000_base_t) { -+ char len_9um[16], len_om[16]; -+ -+ dev_info(sfp->dev, " Wavelength %unm, fiber lengths:\n", -+ be16_to_cpup(&sfp->id.base.optical_wavelength)); -+ -+ if (sfp->id.base.link_len[0] == 255) -+ strcpy(len_9um, ">254km"); -+ else if (sfp->id.base.link_len[1] && sfp->id.base.link_len[1] != 255) -+ sprintf(len_9um, "%um", -+ sfp->id.base.link_len[1] * 100); -+ else if (sfp->id.base.link_len[0]) -+ sprintf(len_9um, "%ukm", sfp->id.base.link_len[0]); -+ else if (sfp->id.base.link_len[1] == 255) -+ strcpy(len_9um, ">25.4km"); -+ else -+ strcpy(len_9um, "unsupported"); -+ -+ dev_info(sfp->dev, " 9µm SM : %s\n", len_9um); -+ dev_info(sfp->dev, " 62.5µm MM OM1: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[3], 10)); -+ dev_info(sfp->dev, " 50µm MM OM2: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[2], 10)); -+ dev_info(sfp->dev, " 50µm MM OM3: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[5], 10)); -+ dev_info(sfp->dev, " 50µm MM OM4: %s\n", -+ sfp_link_len(len_om, sizeof(len_om), -+ sfp->id.base.link_len[4], 10)); -+ } else { -+ char len[16]; -+ dev_info(sfp->dev, " Copper length: %s\n", -+ sfp_link_len(len, sizeof(len), -+ sfp->id.base.link_len[4], 1)); -+ } -+ -+ dev_info(sfp->dev, " Options: %s\n", -+ sfp_bitfield(options, sizeof(options), sfp_options, -+ be16_to_cpu(sfp->id.ext.options))); -+ dev_info(sfp->dev, " Diagnostics: %s\n", -+ sfp_bitfield(options, sizeof(options), diagmon, -+ sfp->id.ext.diagmon)); - - /* We only support SFP modules, not the legacy GBIC modules. */ - if (sfp->id.base.phys_id != SFP_PHYS_ID_SFP || diff --git a/target/linux/mvebu/patches-4.9/419-net-mvneta-convert-to-phylink.patch b/target/linux/mvebu/patches-4.9/419-net-mvneta-convert-to-phylink.patch deleted file mode 100644 index b62dadd2f..000000000 --- a/target/linux/mvebu/patches-4.9/419-net-mvneta-convert-to-phylink.patch +++ /dev/null @@ -1,754 +0,0 @@ -From: Russell King -Date: Wed, 16 Sep 2015 21:27:10 +0100 -Subject: [PATCH] net: mvneta: convert to phylink - -Convert mvneta to use phylink, which models the MAC to PHY link in -a generic, reusable form. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/Kconfig -+++ b/drivers/net/ethernet/marvell/Kconfig -@@ -57,7 +57,7 @@ config MVNETA - tristate "Marvell Armada 370/38x/XP network interface support" - depends on PLAT_ORION - select MVMDIO -- select FIXED_PHY -+ select PHYLINK - ---help--- - This driver supports the network interface units in the - Marvell ARMADA XP, ARMADA 370 and ARMADA 38x SoC family. ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -29,6 +29,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -189,6 +190,7 @@ - #define MVNETA_GMAC_CTRL_0 0x2c00 - #define MVNETA_GMAC_MAX_RX_SIZE_SHIFT 2 - #define MVNETA_GMAC_MAX_RX_SIZE_MASK 0x7ffc -+#define MVNETA_GMAC0_PORT_1000BASE_X BIT(1) - #define MVNETA_GMAC0_PORT_ENABLE BIT(0) - #define MVNETA_GMAC_CTRL_2 0x2c08 - #define MVNETA_GMAC2_INBAND_AN_ENABLE BIT(0) -@@ -204,13 +206,19 @@ - #define MVNETA_GMAC_TX_FLOW_CTRL_ENABLE BIT(5) - #define MVNETA_GMAC_RX_FLOW_CTRL_ACTIVE BIT(6) - #define MVNETA_GMAC_TX_FLOW_CTRL_ACTIVE BIT(7) -+#define MVNETA_GMAC_AN_COMPLETE BIT(11) -+#define MVNETA_GMAC_SYNC_OK BIT(14) - #define MVNETA_GMAC_AUTONEG_CONFIG 0x2c0c - #define MVNETA_GMAC_FORCE_LINK_DOWN BIT(0) - #define MVNETA_GMAC_FORCE_LINK_PASS BIT(1) - #define MVNETA_GMAC_INBAND_AN_ENABLE BIT(2) -+#define MVNETA_GMAC_AN_BYPASS_ENABLE BIT(3) -+#define MVNETA_GMAC_INBAND_RESTART_AN BIT(4) - #define MVNETA_GMAC_CONFIG_MII_SPEED BIT(5) - #define MVNETA_GMAC_CONFIG_GMII_SPEED BIT(6) - #define MVNETA_GMAC_AN_SPEED_EN BIT(7) -+#define MVNETA_GMAC_CONFIG_FLOW_CTRL BIT(8) -+#define MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL BIT(9) - #define MVNETA_GMAC_AN_FLOW_CTRL_EN BIT(11) - #define MVNETA_GMAC_CONFIG_FULL_DUPLEX BIT(12) - #define MVNETA_GMAC_AN_DUPLEX_EN BIT(13) -@@ -400,14 +408,9 @@ struct mvneta_port { - u16 tx_ring_size; - u16 rx_ring_size; - -- struct mii_bus *mii_bus; -- phy_interface_t phy_interface; -- struct device_node *phy_node; -- unsigned int link; -- unsigned int duplex; -- unsigned int speed; -+ struct device_node *dn; - unsigned int tx_csum_limit; -- unsigned int use_inband_status:1; -+ struct phylink *phylink; - - struct mvneta_bm *bm_priv; - struct mvneta_bm_pool *pool_long; -@@ -1182,10 +1185,6 @@ static void mvneta_port_disable(struct m - val &= ~MVNETA_GMAC0_PORT_ENABLE; - mvreg_write(pp, MVNETA_GMAC_CTRL_0, val); - -- pp->link = 0; -- pp->duplex = -1; -- pp->speed = 0; -- - udelay(200); - } - -@@ -1245,44 +1244,6 @@ static void mvneta_set_other_mcast_table - mvreg_write(pp, MVNETA_DA_FILT_OTH_MCAST + offset, val); - } - --static void mvneta_set_autoneg(struct mvneta_port *pp, int enable) --{ -- u32 val; -- -- if (enable) { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_FORCE_LINK_PASS | -- MVNETA_GMAC_FORCE_LINK_DOWN | -- MVNETA_GMAC_AN_FLOW_CTRL_EN); -- val |= MVNETA_GMAC_INBAND_AN_ENABLE | -- MVNETA_GMAC_AN_SPEED_EN | -- MVNETA_GMAC_AN_DUPLEX_EN; -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -- val |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -- val |= MVNETA_GMAC2_INBAND_AN_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -- } else { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE | -- MVNETA_GMAC_AN_SPEED_EN | -- MVNETA_GMAC_AN_DUPLEX_EN); -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -- val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val); -- -- val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -- val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE; -- mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); -- } --} -- - static void mvneta_percpu_unmask_interrupt(void *arg) - { - struct mvneta_port *pp = arg; -@@ -1430,7 +1391,6 @@ static void mvneta_defaults_set(struct m - val &= ~MVNETA_PHY_POLLING_ENABLE; - mvreg_write(pp, MVNETA_UNIT_CONTROL, val); - -- mvneta_set_autoneg(pp, pp->use_inband_status); - mvneta_set_ucast_table(pp, -1); - mvneta_set_special_mcast_table(pp, -1); - mvneta_set_other_mcast_table(pp, -1); -@@ -2635,26 +2595,11 @@ static irqreturn_t mvneta_isr(int irq, v - return IRQ_HANDLED; - } - --static int mvneta_fixed_link_update(struct mvneta_port *pp, -- struct phy_device *phy) -+static void mvneta_link_change(struct mvneta_port *pp) - { -- struct fixed_phy_status status; -- struct fixed_phy_status changed = {}; - u32 gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS); - -- status.link = !!(gmac_stat & MVNETA_GMAC_LINK_UP); -- if (gmac_stat & MVNETA_GMAC_SPEED_1000) -- status.speed = SPEED_1000; -- else if (gmac_stat & MVNETA_GMAC_SPEED_100) -- status.speed = SPEED_100; -- else -- status.speed = SPEED_10; -- status.duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX); -- changed.link = 1; -- changed.speed = 1; -- changed.duplex = 1; -- fixed_phy_update_state(phy, &status, &changed); -- return 0; -+ phylink_mac_change(pp->phylink, !!(gmac_stat & MVNETA_GMAC_LINK_UP)); - } - - /* NAPI handler -@@ -2670,7 +2615,6 @@ static int mvneta_poll(struct napi_struc - u32 cause_rx_tx; - int rx_queue; - struct mvneta_port *pp = netdev_priv(napi->dev); -- struct net_device *ndev = pp->dev; - struct mvneta_pcpu_port *port = this_cpu_ptr(pp->ports); - - if (!netif_running(pp->dev)) { -@@ -2684,12 +2628,11 @@ static int mvneta_poll(struct napi_struc - u32 cause_misc = mvreg_read(pp, MVNETA_INTR_MISC_CAUSE); - - mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0); -- if (pp->use_inband_status && (cause_misc & -- (MVNETA_CAUSE_PHY_STATUS_CHANGE | -- MVNETA_CAUSE_LINK_CHANGE | -- MVNETA_CAUSE_PSC_SYNC_CHANGE))) { -- mvneta_fixed_link_update(pp, ndev->phydev); -- } -+ -+ if (cause_misc & (MVNETA_CAUSE_PHY_STATUS_CHANGE | -+ MVNETA_CAUSE_LINK_CHANGE | -+ MVNETA_CAUSE_PSC_SYNC_CHANGE)) -+ mvneta_link_change(pp); - } - - /* Release Tx descriptors */ -@@ -2985,7 +2928,6 @@ static int mvneta_setup_txqs(struct mvne - static void mvneta_start_dev(struct mvneta_port *pp) - { - int cpu; -- struct net_device *ndev = pp->dev; - - mvneta_max_rx_size_set(pp, pp->pkt_size); - mvneta_txq_max_tx_size_set(pp, pp->pkt_size); -@@ -3008,16 +2950,15 @@ static void mvneta_start_dev(struct mvne - MVNETA_CAUSE_LINK_CHANGE | - MVNETA_CAUSE_PSC_SYNC_CHANGE); - -- phy_start(ndev->phydev); -+ phylink_start(pp->phylink); - netif_tx_start_all_queues(pp->dev); - } - - static void mvneta_stop_dev(struct mvneta_port *pp) - { - unsigned int cpu; -- struct net_device *ndev = pp->dev; - -- phy_stop(ndev->phydev); -+ phylink_stop(pp->phylink); - - for_each_online_cpu(cpu) { - struct mvneta_pcpu_port *port = per_cpu_ptr(pp->ports, cpu); -@@ -3187,99 +3128,210 @@ static int mvneta_set_mac_addr(struct ne - return 0; - } - --static void mvneta_adjust_link(struct net_device *ndev) -+static void mvneta_validate_support(struct net_device *ndev, unsigned int mode, -+ unsigned long *support) -+{ -+ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; -+ -+ /* Allow all the expected bits */ -+ phylink_set(mask, Autoneg); -+ phylink_set(mask, TP); -+ phylink_set(mask, AUI); -+ phylink_set(mask, MII); -+ phylink_set(mask, FIBRE); -+ phylink_set(mask, BNC); -+ phylink_set(mask, Backplane); -+ -+ /* Half-duplex at speeds higher than 100Mbit is unsupported */ -+ phylink_set(mask, 1000baseT_Full); -+ phylink_set(mask, 1000baseX_Full); -+ -+ if (mode != MLO_AN_8023Z) { -+ /* 10M and 100M are only supported in non-802.3z mode */ -+ phylink_set(mask, 10baseT_Half); -+ phylink_set(mask, 10baseT_Full); -+ phylink_set(mask, 100baseT_Half); -+ phylink_set(mask, 100baseT_Full); -+ } else { -+ phylink_set(mask, Pause); -+ } -+ -+ bitmap_and(support, support, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); -+} -+ -+static int mvneta_mac_link_state(struct net_device *ndev, -+ struct phylink_link_state *state) - { - struct mvneta_port *pp = netdev_priv(ndev); -- struct phy_device *phydev = ndev->phydev; -- int status_change = 0; -+ u32 gmac_stat; - -- if (phydev->link) { -- if ((pp->speed != phydev->speed) || -- (pp->duplex != phydev->duplex)) { -- u32 val; -- -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED | -- MVNETA_GMAC_CONFIG_GMII_SPEED | -- MVNETA_GMAC_CONFIG_FULL_DUPLEX); -- -- if (phydev->duplex) -- val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; -- -- if (phydev->speed == SPEED_1000) -- val |= MVNETA_GMAC_CONFIG_GMII_SPEED; -- else if (phydev->speed == SPEED_100) -- val |= MVNETA_GMAC_CONFIG_MII_SPEED; -+ gmac_stat = mvreg_read(pp, MVNETA_GMAC_STATUS); - -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -+ if (gmac_stat & MVNETA_GMAC_SPEED_1000) -+ state->speed = SPEED_1000; -+ else if (gmac_stat & MVNETA_GMAC_SPEED_100) -+ state->speed = SPEED_100; -+ else -+ state->speed = SPEED_10; - -- pp->duplex = phydev->duplex; -- pp->speed = phydev->speed; -- } -+ state->an_complete = !!(gmac_stat & MVNETA_GMAC_AN_COMPLETE); -+ state->link = !!(gmac_stat & MVNETA_GMAC_LINK_UP); -+ state->duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX); -+ -+ return 1; -+} -+ -+static void mvneta_mac_an_restart(struct net_device *ndev, unsigned int mode) -+{ -+ struct mvneta_port *pp = netdev_priv(ndev); -+ -+ if (mode == MLO_AN_8023Z) { -+ u32 gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -+ gmac_an | MVNETA_GMAC_INBAND_RESTART_AN); -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -+ gmac_an & ~MVNETA_GMAC_INBAND_RESTART_AN); - } -+} - -- if (phydev->link != pp->link) { -- if (!phydev->link) { -- pp->duplex = -1; -- pp->speed = 0; -- } -+static void mvneta_mac_config(struct net_device *ndev, unsigned int mode, -+ const struct phylink_link_state *state) -+{ -+ struct mvneta_port *pp = netdev_priv(ndev); -+ u32 new_ctrl0, gmac_ctrl0 = mvreg_read(pp, MVNETA_GMAC_CTRL_0); -+ u32 new_ctrl2, gmac_ctrl2 = mvreg_read(pp, MVNETA_GMAC_CTRL_2); -+ u32 new_clk, gmac_clk = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER); -+ u32 new_an, gmac_an = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ -+ new_ctrl0 = gmac_ctrl0 & ~MVNETA_GMAC0_PORT_1000BASE_X; -+ new_ctrl2 = gmac_ctrl2 & ~MVNETA_GMAC2_INBAND_AN_ENABLE; -+ new_clk = gmac_clk & ~MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ new_an = gmac_an & ~(MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_INBAND_RESTART_AN | -+ MVNETA_GMAC_CONFIG_MII_SPEED | -+ MVNETA_GMAC_CONFIG_GMII_SPEED | -+ MVNETA_GMAC_AN_SPEED_EN | -+ MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL | -+ MVNETA_GMAC_CONFIG_FLOW_CTRL | -+ MVNETA_GMAC_AN_FLOW_CTRL_EN | -+ MVNETA_GMAC_CONFIG_FULL_DUPLEX | -+ MVNETA_GMAC_AN_DUPLEX_EN); -+ -+ if (phylink_test(state->advertising, Pause)) -+ new_an |= MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL; -+ -+ switch (mode) { -+ case MLO_AN_SGMII: -+ /* SGMII mode receives the state from the PHY */ -+ new_ctrl2 |= MVNETA_GMAC2_INBAND_AN_ENABLE; -+ new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | -+ MVNETA_GMAC_FORCE_LINK_PASS)) | -+ MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_AN_SPEED_EN | -+ MVNETA_GMAC_AN_DUPLEX_EN; -+ break; - -- pp->link = phydev->link; -- status_change = 1; -+ case MLO_AN_8023Z: -+ /* 802.3z negotiation - only 1000base-X */ -+ new_ctrl0 |= MVNETA_GMAC0_PORT_1000BASE_X; -+ new_clk |= MVNETA_GMAC_1MS_CLOCK_ENABLE; -+ new_an = (new_an & ~(MVNETA_GMAC_FORCE_LINK_DOWN | -+ MVNETA_GMAC_FORCE_LINK_PASS)) | -+ MVNETA_GMAC_INBAND_AN_ENABLE | -+ MVNETA_GMAC_CONFIG_GMII_SPEED | -+ /* The MAC only supports FD mode */ -+ MVNETA_GMAC_CONFIG_FULL_DUPLEX; -+ -+ if (state->an_enabled) -+ new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN; -+ break; -+ -+ default: -+ /* Phy or fixed speed */ -+ if (state->duplex) -+ new_an |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; -+ -+ if (state->speed == SPEED_1000) -+ new_an |= MVNETA_GMAC_CONFIG_GMII_SPEED; -+ else if (state->speed == SPEED_100) -+ new_an |= MVNETA_GMAC_CONFIG_MII_SPEED; -+ break; - } - -- if (status_change) { -- if (phydev->link) { -- if (!pp->use_inband_status) { -- u32 val = mvreg_read(pp, -- MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~MVNETA_GMAC_FORCE_LINK_DOWN; -- val |= MVNETA_GMAC_FORCE_LINK_PASS; -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -- val); -- } -- mvneta_port_up(pp); -- } else { -- if (!pp->use_inband_status) { -- u32 val = mvreg_read(pp, -- MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~MVNETA_GMAC_FORCE_LINK_PASS; -- val |= MVNETA_GMAC_FORCE_LINK_DOWN; -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -- val); -- } -- mvneta_port_down(pp); -- } -- phy_print_status(phydev); -+ /* Armada 370 documentation says we can only change the port mode -+ * and in-band enable when the link is down, so force it down -+ * while making these changes. We also do this for GMAC_CTRL2 */ -+ if ((new_ctrl0 ^ gmac_ctrl0) & MVNETA_GMAC0_PORT_1000BASE_X || -+ (new_ctrl2 ^ gmac_ctrl2) & MVNETA_GMAC2_INBAND_AN_ENABLE || -+ (new_an ^ gmac_an) & MVNETA_GMAC_INBAND_AN_ENABLE) { -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, -+ (gmac_an & ~MVNETA_GMAC_FORCE_LINK_PASS) | -+ MVNETA_GMAC_FORCE_LINK_DOWN); -+ } -+ -+ if (new_ctrl0 != gmac_ctrl0) -+ mvreg_write(pp, MVNETA_GMAC_CTRL_0, new_ctrl0); -+ if (new_ctrl2 != gmac_ctrl2) -+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, new_ctrl2); -+ if (new_clk != gmac_clk) -+ mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, new_clk); -+ if (new_an != gmac_an) -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, new_an); -+} -+ -+static void mvneta_mac_link_down(struct net_device *ndev, unsigned int mode) -+{ -+ struct mvneta_port *pp = netdev_priv(ndev); -+ u32 val; -+ -+ mvneta_port_down(pp); -+ -+ if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) { -+ val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ val &= ~MVNETA_GMAC_FORCE_LINK_PASS; -+ val |= MVNETA_GMAC_FORCE_LINK_DOWN; -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); - } - } - --static int mvneta_mdio_probe(struct mvneta_port *pp) -+static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode) - { -- struct phy_device *phy_dev; -+ struct mvneta_port *pp = netdev_priv(ndev); -+ u32 val; - -- phy_dev = of_phy_connect(pp->dev, pp->phy_node, mvneta_adjust_link, 0, -- pp->phy_interface); -- if (!phy_dev) { -- netdev_err(pp->dev, "could not find the PHY\n"); -- return -ENODEV; -+ if (mode == MLO_AN_PHY || mode == MLO_AN_FIXED) { -+ val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -+ val &= ~MVNETA_GMAC_FORCE_LINK_DOWN; -+ val |= MVNETA_GMAC_FORCE_LINK_PASS; -+ mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); - } - -- phy_dev->supported &= PHY_GBIT_FEATURES; -- phy_dev->advertising = phy_dev->supported; -+ mvneta_port_up(pp); -+} - -- pp->link = 0; -- pp->duplex = 0; -- pp->speed = 0; -+static const struct phylink_mac_ops mvneta_phylink_ops = { -+ .validate_support = mvneta_validate_support, -+ .mac_link_state = mvneta_mac_link_state, -+ .mac_an_restart = mvneta_mac_an_restart, -+ .mac_config = mvneta_mac_config, -+ .mac_link_down = mvneta_mac_link_down, -+ .mac_link_up = mvneta_mac_link_up, -+}; - -- return 0; -+static int mvneta_mdio_probe(struct mvneta_port *pp) -+{ -+ int err = phylink_of_phy_connect(pp->phylink, pp->dn); -+ if (err) -+ netdev_err(pp->dev, "could not attach PHY\n"); -+ -+ return err; - } - - static void mvneta_mdio_remove(struct mvneta_port *pp) - { -- struct net_device *ndev = pp->dev; -- -- phy_disconnect(ndev->phydev); -+ phylink_disconnect_phy(pp->phylink); - } - - /* Electing a CPU must be done in an atomic way: it should be done -@@ -3537,10 +3589,9 @@ static int mvneta_stop(struct net_device - - static int mvneta_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) - { -- if (!dev->phydev) -- return -ENOTSUPP; -+ struct mvneta_port *pp = netdev_priv(dev); - -- return phy_mii_ioctl(dev->phydev, ifr, cmd); -+ return phylink_mii_ioctl(pp->phylink, ifr, cmd); - } - - /* Ethtool methods */ -@@ -3551,44 +3602,18 @@ mvneta_ethtool_set_link_ksettings(struct - const struct ethtool_link_ksettings *cmd) - { - struct mvneta_port *pp = netdev_priv(ndev); -- struct phy_device *phydev = ndev->phydev; -- -- if (!phydev) -- return -ENODEV; - -- if ((cmd->base.autoneg == AUTONEG_ENABLE) != pp->use_inband_status) { -- u32 val; -- -- mvneta_set_autoneg(pp, cmd->base.autoneg == AUTONEG_ENABLE); -- -- if (cmd->base.autoneg == AUTONEG_DISABLE) { -- val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); -- val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED | -- MVNETA_GMAC_CONFIG_GMII_SPEED | -- MVNETA_GMAC_CONFIG_FULL_DUPLEX); -- -- if (phydev->duplex) -- val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; -- -- if (phydev->speed == SPEED_1000) -- val |= MVNETA_GMAC_CONFIG_GMII_SPEED; -- else if (phydev->speed == SPEED_100) -- val |= MVNETA_GMAC_CONFIG_MII_SPEED; -- -- mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); -- } -+ return phylink_ethtool_ksettings_set(pp->phylink, cmd); -+} - -- pp->use_inband_status = (cmd->base.autoneg == AUTONEG_ENABLE); -- netdev_info(pp->dev, "autoneg status set to %i\n", -- pp->use_inband_status); -- -- if (netif_running(ndev)) { -- mvneta_port_down(pp); -- mvneta_port_up(pp); -- } -- } -+/* Get link ksettings for ethtools */ -+static int -+mvneta_ethtool_get_link_ksettings(struct net_device *ndev, -+ struct ethtool_link_ksettings *cmd) -+{ -+ struct mvneta_port *pp = netdev_priv(ndev); - -- return phy_ethtool_ksettings_set(ndev->phydev, cmd); -+ return phylink_ethtool_ksettings_get(pp->phylink, cmd); - } - - /* Set interrupt coalescing for ethtools */ -@@ -3696,26 +3721,28 @@ static void mvneta_ethtool_update_stats( - { - const struct mvneta_statistic *s; - void __iomem *base = pp->base; -- u32 high, low, val; -- u64 val64; -+ u32 high, low; -+ u64 val; - int i; - - for (i = 0, s = mvneta_statistics; - s < mvneta_statistics + ARRAY_SIZE(mvneta_statistics); - s++, i++) { -+ val = 0; -+ - switch (s->type) { - case T_REG_32: - val = readl_relaxed(base + s->offset); -- pp->ethtool_stats[i] += val; - break; - case T_REG_64: - /* Docs say to read low 32-bit then high */ - low = readl_relaxed(base + s->offset); - high = readl_relaxed(base + s->offset + 4); -- val64 = (u64)high << 32 | low; -- pp->ethtool_stats[i] += val64; -+ val = (u64)high << 32 | low; - break; - } -+ -+ pp->ethtool_stats[i] += val; - } - } - -@@ -3875,7 +3902,7 @@ const struct ethtool_ops mvneta_eth_tool - .get_rxnfc = mvneta_ethtool_get_rxnfc, - .get_rxfh = mvneta_ethtool_get_rxfh, - .set_rxfh = mvneta_ethtool_set_rxfh, -- .get_link_ksettings = phy_ethtool_get_link_ksettings, -+ .get_link_ksettings = mvneta_ethtool_get_link_ksettings, - .set_link_ksettings = mvneta_ethtool_set_link_ksettings, - }; - -@@ -4002,14 +4029,13 @@ static int mvneta_probe(struct platform_ - const struct mbus_dram_target_info *dram_target_info; - struct resource *res; - struct device_node *dn = pdev->dev.of_node; -- struct device_node *phy_node; - struct device_node *bm_node; - struct mvneta_port *pp; - struct net_device *dev; -+ struct phylink *phylink; - const char *dt_mac_addr; - char hw_mac_addr[ETH_ALEN]; - const char *mac_from; -- const char *managed; - int tx_csum_limit; - int phy_mode; - int err; -@@ -4025,31 +4051,11 @@ static int mvneta_probe(struct platform_ - goto err_free_netdev; - } - -- phy_node = of_parse_phandle(dn, "phy", 0); -- if (!phy_node) { -- if (!of_phy_is_fixed_link(dn)) { -- dev_err(&pdev->dev, "no PHY specified\n"); -- err = -ENODEV; -- goto err_free_irq; -- } -- -- err = of_phy_register_fixed_link(dn); -- if (err < 0) { -- dev_err(&pdev->dev, "cannot register fixed PHY\n"); -- goto err_free_irq; -- } -- -- /* In the case of a fixed PHY, the DT node associated -- * to the PHY is the Ethernet MAC DT node. -- */ -- phy_node = of_node_get(dn); -- } -- - phy_mode = of_get_phy_mode(dn); - if (phy_mode < 0) { - dev_err(&pdev->dev, "incorrect phy-mode\n"); - err = -EINVAL; -- goto err_put_phy_node; -+ goto err_free_irq; - } - - dev->tx_queue_len = MVNETA_MAX_TXD; -@@ -4060,12 +4066,7 @@ static int mvneta_probe(struct platform_ - - pp = netdev_priv(dev); - spin_lock_init(&pp->lock); -- pp->phy_node = phy_node; -- pp->phy_interface = phy_mode; -- -- err = of_property_read_string(dn, "managed", &managed); -- pp->use_inband_status = (err == 0 && -- strcmp(managed, "in-band-status") == 0); -+ pp->dn = dn; - - pp->rxq_def = rxq_def; - -@@ -4076,7 +4077,7 @@ static int mvneta_probe(struct platform_ - pp->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(pp->clk)) { - err = PTR_ERR(pp->clk); -- goto err_put_phy_node; -+ goto err_free_irq; - } - - clk_prepare_enable(pp->clk); -@@ -4184,6 +4185,14 @@ static int mvneta_probe(struct platform_ - dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; - dev->gso_max_segs = MVNETA_MAX_TSO_SEGS; - -+ phylink = phylink_create(dev, dn, phy_mode, &mvneta_phylink_ops); -+ if (IS_ERR(phylink)) { -+ err = PTR_ERR(phylink); -+ goto err_free_stats; -+ } -+ -+ pp->phylink = phylink; -+ - err = register_netdev(dev); - if (err < 0) { - dev_err(&pdev->dev, "failed to register\n"); -@@ -4195,14 +4204,6 @@ static int mvneta_probe(struct platform_ - - platform_set_drvdata(pdev, pp->dev); - -- if (pp->use_inband_status) { -- struct phy_device *phy = of_phy_find_device(dn); -- -- mvneta_fixed_link_update(pp, phy); -- -- put_device(&phy->mdio.dev); -- } -- - return 0; - - err_netdev: -@@ -4213,16 +4214,14 @@ err_netdev: - 1 << pp->id); - } - err_free_stats: -+ if (pp->phylink) -+ phylink_destroy(pp->phylink); - free_percpu(pp->stats); - err_free_ports: - free_percpu(pp->ports); - err_clk: - clk_disable_unprepare(pp->clk_bus); - clk_disable_unprepare(pp->clk); --err_put_phy_node: -- of_node_put(phy_node); -- if (of_phy_is_fixed_link(dn)) -- of_phy_deregister_fixed_link(dn); - err_free_irq: - irq_dispose_mapping(dev->irq); - err_free_netdev: -@@ -4234,7 +4233,6 @@ err_free_netdev: - static int mvneta_remove(struct platform_device *pdev) - { - struct net_device *dev = platform_get_drvdata(pdev); -- struct device_node *dn = pdev->dev.of_node; - struct mvneta_port *pp = netdev_priv(dev); - - unregister_netdev(dev); -@@ -4242,10 +4240,8 @@ static int mvneta_remove(struct platform - clk_disable_unprepare(pp->clk); - free_percpu(pp->ports); - free_percpu(pp->stats); -- if (of_phy_is_fixed_link(dn)) -- of_phy_deregister_fixed_link(dn); - irq_dispose_mapping(dev->irq); -- of_node_put(pp->phy_node); -+ phylink_destroy(pp->phylink); - free_netdev(dev); - - if (pp->bm_priv) { diff --git a/target/linux/mvebu/patches-4.9/420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch b/target/linux/mvebu/patches-4.9/420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch deleted file mode 100644 index 6d35b5005..000000000 --- a/target/linux/mvebu/patches-4.9/420-net-mvneta-disable-MVNETA_CAUSE_PSC_SYNC_CHANGE-inte.patch +++ /dev/null @@ -1,58 +0,0 @@ -From: Russell King -Date: Sat, 24 Dec 2016 10:27:08 +0000 -Subject: [PATCH] net: mvneta: disable MVNETA_CAUSE_PSC_SYNC_CHANGE - interrupt - -The PSC sync change interrupt can fire multiple times while the link is -down. As this isn't information we make use of, it's pointless having -the interrupt enabled, so let's disable this interrupt. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -2630,9 +2630,11 @@ static int mvneta_poll(struct napi_struc - mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0); - - if (cause_misc & (MVNETA_CAUSE_PHY_STATUS_CHANGE | -- MVNETA_CAUSE_LINK_CHANGE | -- MVNETA_CAUSE_PSC_SYNC_CHANGE)) -+ MVNETA_CAUSE_LINK_CHANGE)) { -+ printk(KERN_DEBUG "%s: cause 0x%08x:0x%08x\n", -+ __func__, cause_rx_tx, cause_misc); - mvneta_link_change(pp); -+ } - } - - /* Release Tx descriptors */ -@@ -2947,8 +2949,7 @@ static void mvneta_start_dev(struct mvne - - mvreg_write(pp, MVNETA_INTR_MISC_MASK, - MVNETA_CAUSE_PHY_STATUS_CHANGE | -- MVNETA_CAUSE_LINK_CHANGE | -- MVNETA_CAUSE_PSC_SYNC_CHANGE); -+ MVNETA_CAUSE_LINK_CHANGE); - - phylink_start(pp->phylink); - netif_tx_start_all_queues(pp->dev); -@@ -3439,8 +3440,7 @@ static int mvneta_cpu_online(unsigned in - on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true); - mvreg_write(pp, MVNETA_INTR_MISC_MASK, - MVNETA_CAUSE_PHY_STATUS_CHANGE | -- MVNETA_CAUSE_LINK_CHANGE | -- MVNETA_CAUSE_PSC_SYNC_CHANGE); -+ MVNETA_CAUSE_LINK_CHANGE); - netif_tx_start_all_queues(pp->dev); - spin_unlock(&pp->lock); - return 0; -@@ -3481,8 +3481,7 @@ static int mvneta_cpu_dead(unsigned int - on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true); - mvreg_write(pp, MVNETA_INTR_MISC_MASK, - MVNETA_CAUSE_PHY_STATUS_CHANGE | -- MVNETA_CAUSE_LINK_CHANGE | -- MVNETA_CAUSE_PSC_SYNC_CHANGE); -+ MVNETA_CAUSE_LINK_CHANGE); - netif_tx_start_all_queues(pp->dev); - return 0; - } diff --git a/target/linux/mvebu/patches-4.9/421-phylink-add-ethtool-nway_reset-support.patch b/target/linux/mvebu/patches-4.9/421-phylink-add-ethtool-nway_reset-support.patch deleted file mode 100644 index d4436a732..000000000 --- a/target/linux/mvebu/patches-4.9/421-phylink-add-ethtool-nway_reset-support.patch +++ /dev/null @@ -1,44 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 20:27:19 +0100 -Subject: [PATCH] phylink: add ethtool nway_reset support - -Add ethtool nway_reset support to phylink, to allow userspace to -request a re-negotiation of the link. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -783,6 +783,20 @@ int phylink_ethtool_ksettings_set(struct - } - EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); - -+int phylink_ethtool_nway_reset(struct phylink *pl) -+{ -+ int ret = 0; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = genphy_restart_aneg(pl->phydev); -+ phylink_mac_an_restart(pl); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); -+ - /* This emulates MII registers for a fixed-mode phy operating as per the - * passed in state. "aneg" defines if we report negotiation is possible. - * ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -86,6 +86,7 @@ int phylink_ethtool_ksettings_get(struct - struct ethtool_link_ksettings *); - int phylink_ethtool_ksettings_set(struct phylink *, - const struct ethtool_link_ksettings *); -+int phylink_ethtool_nway_reset(struct phylink *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - - int phylink_set_link(struct phylink *pl, unsigned int mode, u8 port, diff --git a/target/linux/mvebu/patches-4.9/422-net-mvneta-add-nway_reset-support.patch b/target/linux/mvebu/patches-4.9/422-net-mvneta-add-nway_reset-support.patch deleted file mode 100644 index 20c23ba2a..000000000 --- a/target/linux/mvebu/patches-4.9/422-net-mvneta-add-nway_reset-support.patch +++ /dev/null @@ -1,35 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 19:40:31 +0100 -Subject: [PATCH] net: mvneta: add nway_reset support - -Add ethtool nway_reset support to mvneta via phylink, so that userspace -can request the link in whatever mode to be renegotiated via -ethtool -r ethX. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3615,6 +3615,13 @@ mvneta_ethtool_get_link_ksettings(struct - return phylink_ethtool_ksettings_get(pp->phylink, cmd); - } - -+static int mvneta_ethtool_nway_reset(struct net_device *dev) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_nway_reset(pp->phylink); -+} -+ - /* Set interrupt coalescing for ethtools */ - static int mvneta_ethtool_set_coalesce(struct net_device *dev, - struct ethtool_coalesce *c) -@@ -3888,6 +3895,7 @@ static const struct net_device_ops mvnet - }; - - const struct ethtool_ops mvneta_eth_tool_ops = { -+ .nway_reset = mvneta_ethtool_nway_reset, - .get_link = ethtool_op_get_link, - .set_coalesce = mvneta_ethtool_set_coalesce, - .get_coalesce = mvneta_ethtool_get_coalesce, diff --git a/target/linux/mvebu/patches-4.9/423-phylink-add-flow-control-support.patch b/target/linux/mvebu/patches-4.9/423-phylink-add-flow-control-support.patch deleted file mode 100644 index b0359f19a..000000000 --- a/target/linux/mvebu/patches-4.9/423-phylink-add-flow-control-support.patch +++ /dev/null @@ -1,232 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 20:32:07 +0100 -Subject: [PATCH] phylink: add flow control support - -Add flow control support, including ethtool support, to phylink. We -add support to allow ethtool to get and set the current flow control -settings, and the 802.3 specified resolution for the local and remote -link partner abilities. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -132,6 +132,9 @@ static int phylink_parse_fixedlink(struc - - if (of_property_read_bool(fixed_node, "full-duplex")) - pl->link_config.duplex = DUPLEX_FULL; -+ -+ /* We treat the "pause" and "asym-pause" terminology as -+ * defining the link partner's ability. */ - if (of_property_read_bool(fixed_node, "pause")) - pl->link_config.pause |= MLO_PAUSE_SYM; - if (of_property_read_bool(fixed_node, "asym-pause")) -@@ -277,6 +280,56 @@ static void phylink_get_fixed_state(stru - state->link = !!gpiod_get_value(pl->link_gpio); - } - -+/* Flow control is resolved according to our and the link partners -+ * advertisments using the following drawn from the 802.3 specs: -+ * Local device Link partner -+ * Pause AsymDir Pause AsymDir Result -+ * 1 X 1 X TX+RX -+ * 0 1 1 1 RX -+ * 1 1 0 1 TX -+ */ -+static void phylink_resolve_flow(struct phylink *pl, -+ struct phylink_link_state *state) -+{ -+ int new_pause = 0; -+ -+ if (pl->link_config.pause & MLO_PAUSE_AN) { -+ int pause = 0; -+ -+ if (phylink_test(pl->link_config.advertising, Pause)) -+ pause |= MLO_PAUSE_SYM; -+ if (phylink_test(pl->link_config.advertising, Asym_Pause)) -+ pause |= MLO_PAUSE_ASYM; -+ -+ pause &= state->pause; -+ -+ if (pause & MLO_PAUSE_SYM) -+ new_pause = MLO_PAUSE_TX | MLO_PAUSE_RX; -+ else if (pause & MLO_PAUSE_ASYM) -+ new_pause = state->pause & MLO_PAUSE_SYM ? -+ MLO_PAUSE_RX : MLO_PAUSE_TX; -+ } else { -+ new_pause = pl->link_config.pause & MLO_PAUSE_TXRX_MASK; -+ } -+ -+ state->pause &= ~MLO_PAUSE_TXRX_MASK; -+ state->pause |= new_pause; -+} -+ -+static const char *phylink_pause_to_str(int pause) -+{ -+ switch (pause & MLO_PAUSE_TXRX_MASK) { -+ case MLO_PAUSE_TX | MLO_PAUSE_RX: -+ return "rx/tx"; -+ case MLO_PAUSE_TX: -+ return "tx"; -+ case MLO_PAUSE_RX: -+ return "rx"; -+ default: -+ return "off"; -+ } -+} -+ - static void phylink_resolve(struct work_struct *w) - { - struct phylink *pl = container_of(w, struct phylink, resolve); -@@ -290,6 +343,7 @@ static void phylink_resolve(struct work_ - switch (pl->link_an_mode) { - case MLO_AN_PHY: - link_state = pl->phy_state; -+ phylink_resolve_flow(pl, &link_state); - break; - - case MLO_AN_FIXED: -@@ -298,9 +352,12 @@ static void phylink_resolve(struct work_ - - case MLO_AN_SGMII: - phylink_get_mac_state(pl, &link_state); -- if (pl->phydev) -+ if (pl->phydev) { - link_state.link = link_state.link && - pl->phy_state.link; -+ link_state.pause |= pl->phy_state.pause; -+ phylink_resolve_flow(pl, &link_state); -+ } - break; - - case MLO_AN_8023Z: -@@ -330,7 +387,7 @@ static void phylink_resolve(struct work_ - "Link is Up - %s/%s - flow control %s\n", - phy_speed_to_str(link_state.speed), - phy_duplex_to_str(link_state.duplex), -- link_state.pause ? "rx/tx" : "off"); -+ phylink_pause_to_str(link_state.pause)); - } - } - mutex_unlock(&pl->state_mutex); -@@ -358,6 +415,7 @@ struct phylink *phylink_create(struct ne - pl->netdev = ndev; - pl->link_interface = iface; - pl->link_port = PORT_MII; -+ pl->link_config.pause = MLO_PAUSE_AN; - pl->link_config.speed = SPEED_UNKNOWN; - pl->link_config.duplex = DUPLEX_UNKNOWN; - pl->ops = ops; -@@ -580,6 +638,7 @@ void phylink_start(struct phylink *pl) - * a fixed-link to start with the correct parameters, and also - * ensures that we set the appropriate advertisment for Serdes links. - */ -+ phylink_resolve_flow(pl, &pl->link_config); - phylink_mac_config(pl, &pl->link_config); - - clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); -@@ -797,6 +856,79 @@ int phylink_ethtool_nway_reset(struct ph - } - EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); - -+void phylink_ethtool_get_pauseparam(struct phylink *pl, -+ struct ethtool_pauseparam *pause) -+{ -+ mutex_lock(&pl->config_mutex); -+ -+ pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); -+ pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); -+ pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); -+ -+ mutex_unlock(&pl->config_mutex); -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); -+ -+static int __phylink_ethtool_set_pauseparam(struct phylink *pl, -+ struct ethtool_pauseparam *pause) -+{ -+ struct phylink_link_state *config = &pl->link_config; -+ -+ if (!phylink_test(pl->supported, Pause) && -+ !phylink_test(pl->supported, Asym_Pause)) -+ return -EOPNOTSUPP; -+ -+ if (!phylink_test(pl->supported, Asym_Pause) && -+ !pause->autoneg && pause->rx_pause != pause->tx_pause) -+ return -EINVAL; -+ -+ config->pause &= ~(MLO_PAUSE_AN | MLO_PAUSE_TXRX_MASK); -+ -+ if (pause->autoneg) -+ config->pause |= MLO_PAUSE_AN; -+ if (pause->rx_pause) -+ config->pause |= MLO_PAUSE_RX; -+ if (pause->tx_pause) -+ config->pause |= MLO_PAUSE_TX; -+ -+ if (!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) { -+ switch (pl->link_an_mode) { -+ case MLO_AN_PHY: -+ /* Silently mark the carrier down, and then trigger a resolve */ -+ netif_carrier_off(pl->netdev); -+ phylink_run_resolve(pl); -+ break; -+ -+ case MLO_AN_FIXED: -+ /* Should we allow fixed links to change against the config? */ -+ phylink_resolve_flow(pl, config); -+ phylink_mac_config(pl, config); -+ break; -+ -+ case MLO_AN_SGMII: -+ case MLO_AN_8023Z: -+ phylink_mac_config(pl, config); -+ phylink_mac_an_restart(pl); -+ break; -+ } -+ } -+ -+ return 0; -+} -+ -+int phylink_ethtool_set_pauseparam(struct phylink *pl, -+ struct ethtool_pauseparam *pause) -+{ -+ int ret; -+ -+ mutex_lock(&pl->config_mutex); -+ ret = __phylink_ethtool_set_pauseparam(pl, pause); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); -+ - /* This emulates MII registers for a fixed-mode phy operating as per the - * passed in state. "aneg" defines if we report negotiation is possible. - * ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -13,6 +13,10 @@ enum { - MLO_PAUSE_NONE, - MLO_PAUSE_ASYM = BIT(0), - MLO_PAUSE_SYM = BIT(1), -+ MLO_PAUSE_RX = BIT(2), -+ MLO_PAUSE_TX = BIT(3), -+ MLO_PAUSE_TXRX_MASK = MLO_PAUSE_TX | MLO_PAUSE_RX, -+ MLO_PAUSE_AN = BIT(4), - - MLO_AN_PHY = 0, - MLO_AN_FIXED, -@@ -87,6 +91,10 @@ int phylink_ethtool_ksettings_get(struct - int phylink_ethtool_ksettings_set(struct phylink *, - const struct ethtool_link_ksettings *); - int phylink_ethtool_nway_reset(struct phylink *); -+void phylink_ethtool_get_pauseparam(struct phylink *, -+ struct ethtool_pauseparam *); -+int phylink_ethtool_set_pauseparam(struct phylink *, -+ struct ethtool_pauseparam *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - - int phylink_set_link(struct phylink *pl, unsigned int mode, u8 port, diff --git a/target/linux/mvebu/patches-4.9/424-net-mvneta-add-flow-control-support-via-phylink.patch b/target/linux/mvebu/patches-4.9/424-net-mvneta-add-flow-control-support-via-phylink.patch deleted file mode 100644 index 3f778953e..000000000 --- a/target/linux/mvebu/patches-4.9/424-net-mvneta-add-flow-control-support-via-phylink.patch +++ /dev/null @@ -1,76 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 17:41:44 +0100 -Subject: [PATCH] net: mvneta: add flow control support via phylink - -Add flow control support to mvneta, including the ethtool hooks. This -uses the phylink code to calculate the result of autonegotiation where -a phy is attached, and to handle the ethtool settings. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3179,6 +3179,12 @@ static int mvneta_mac_link_state(struct - state->link = !!(gmac_stat & MVNETA_GMAC_LINK_UP); - state->duplex = !!(gmac_stat & MVNETA_GMAC_FULL_DUPLEX); - -+ state->pause = 0; -+ if (gmac_stat & MVNETA_GMAC_RX_FLOW_CTRL_ENABLE) -+ state->pause |= MLO_PAUSE_RX; -+ if (gmac_stat & MVNETA_GMAC_TX_FLOW_CTRL_ENABLE) -+ state->pause |= MLO_PAUSE_TX; -+ - return 1; - } - -@@ -3221,6 +3227,8 @@ static void mvneta_mac_config(struct net - - if (phylink_test(state->advertising, Pause)) - new_an |= MVNETA_GMAC_ADVERT_SYM_FLOW_CTRL; -+ if (state->pause & MLO_PAUSE_TXRX_MASK) -+ new_an |= MVNETA_GMAC_CONFIG_FLOW_CTRL; - - switch (mode) { - case MLO_AN_SGMII: -@@ -3245,7 +3253,7 @@ static void mvneta_mac_config(struct net - /* The MAC only supports FD mode */ - MVNETA_GMAC_CONFIG_FULL_DUPLEX; - -- if (state->an_enabled) -+ if (state->pause & MLO_PAUSE_AN && state->an_enabled) - new_an |= MVNETA_GMAC_AN_FLOW_CTRL_EN; - break; - -@@ -3711,6 +3719,22 @@ static int mvneta_ethtool_set_ringparam( - return 0; - } - -+static void mvneta_ethtool_get_pauseparam(struct net_device *dev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ phylink_ethtool_get_pauseparam(pp->phylink, pause); -+} -+ -+static int mvneta_ethtool_set_pauseparam(struct net_device *dev, -+ struct ethtool_pauseparam *pause) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_set_pauseparam(pp->phylink, pause); -+} -+ - static void mvneta_ethtool_get_strings(struct net_device *netdev, u32 sset, - u8 *data) - { -@@ -3902,6 +3926,8 @@ const struct ethtool_ops mvneta_eth_tool - .get_drvinfo = mvneta_ethtool_get_drvinfo, - .get_ringparam = mvneta_ethtool_get_ringparam, - .set_ringparam = mvneta_ethtool_set_ringparam, -+ .get_pauseparam = mvneta_ethtool_get_pauseparam, -+ .set_pauseparam = mvneta_ethtool_set_pauseparam, - .get_strings = mvneta_ethtool_get_strings, - .get_ethtool_stats = mvneta_ethtool_get_stats, - .get_sset_count = mvneta_ethtool_get_sset_count, diff --git a/target/linux/mvebu/patches-4.9/425-net-mvneta-enable-flow-control-for-PHY-connections.patch b/target/linux/mvebu/patches-4.9/425-net-mvneta-enable-flow-control-for-PHY-connections.patch deleted file mode 100644 index f2d14afda..000000000 --- a/target/linux/mvebu/patches-4.9/425-net-mvneta-enable-flow-control-for-PHY-connections.patch +++ /dev/null @@ -1,28 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 00:34:08 +0100 -Subject: [PATCH] net: mvneta: enable flow control for PHY connections - -Enable flow control support for PHY connections by indicating our -support via the ethtool capabilities. phylink takes care of the -appropriate handling. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3153,10 +3153,11 @@ static void mvneta_validate_support(stru - phylink_set(mask, 10baseT_Full); - phylink_set(mask, 100baseT_Half); - phylink_set(mask, 100baseT_Full); -- } else { -- phylink_set(mask, Pause); - } - -+ if (mode != MLO_AN_FIXED) -+ phylink_set(mask, Pause); -+ - bitmap_and(support, support, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); - } - diff --git a/target/linux/mvebu/patches-4.9/426-net-mvneta-enable-flow-control-for-fixed-connections.patch b/target/linux/mvebu/patches-4.9/426-net-mvneta-enable-flow-control-for-fixed-connections.patch deleted file mode 100644 index bac74ca4e..000000000 --- a/target/linux/mvebu/patches-4.9/426-net-mvneta-enable-flow-control-for-fixed-connections.patch +++ /dev/null @@ -1,32 +0,0 @@ -From: Russell King -Date: Tue, 12 Jul 2016 00:04:13 +0100 -Subject: [PATCH] net: mvneta: enable flow control for fixed connections - -Allow symetric flow control to be enabled for fixed link connections as -well as other types of connections by setting the supported and -advertised capability bits. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3143,6 +3143,8 @@ static void mvneta_validate_support(stru - phylink_set(mask, BNC); - phylink_set(mask, Backplane); - -+ /* Asymmetric pause is unsupported */ -+ phylink_set(mask, Pause); - /* Half-duplex at speeds higher than 100Mbit is unsupported */ - phylink_set(mask, 1000baseT_Full); - phylink_set(mask, 1000baseX_Full); -@@ -3155,9 +3157,6 @@ static void mvneta_validate_support(stru - phylink_set(mask, 100baseT_Full); - } - -- if (mode != MLO_AN_FIXED) -- phylink_set(mask, Pause); -- - bitmap_and(support, support, mask, __ETHTOOL_LINK_MODE_MASK_NBITS); - } - diff --git a/target/linux/mvebu/patches-4.9/427-phylink-add-EEE-support.patch b/target/linux/mvebu/patches-4.9/427-phylink-add-EEE-support.patch deleted file mode 100644 index bc7e5eeeb..000000000 --- a/target/linux/mvebu/patches-4.9/427-phylink-add-EEE-support.patch +++ /dev/null @@ -1,116 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 21:19:53 +0100 -Subject: [PATCH] phylink: add EEE support - -Add EEE hooks to phylink to allow the phylib EEE functions for the -connected phy to be safely accessed. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3305,7 +3305,8 @@ static void mvneta_mac_link_down(struct - } - } - --static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode) -+static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode, -+ struct phy_device *phy) - { - struct mvneta_port *pp = netdev_priv(ndev); - u32 val; ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -379,7 +379,8 @@ static void phylink_resolve(struct work_ - if (pl->phydev) - phylink_mac_config(pl, &link_state); - -- pl->ops->mac_link_up(ndev, pl->link_an_mode); -+ pl->ops->mac_link_up(ndev, pl->link_an_mode, -+ pl->phydev); - - netif_carrier_on(ndev); - -@@ -929,6 +930,58 @@ int phylink_ethtool_set_pauseparam(struc - } - EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); - -+int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) -+{ -+ int ret = -EPROTONOSUPPORT; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = phy_init_eee(pl->phydev, clk_stop_enable); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_init_eee); -+ -+int phylink_get_eee_err(struct phylink *pl) -+{ -+ int ret = 0; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = phy_get_eee_err(pl->phydev); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_get_eee_err); -+ -+int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = phy_ethtool_get_eee(pl->phydev, eee); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); -+ -+int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->phydev) -+ ret = phy_ethtool_set_eee(pl->phydev, eee); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); -+ - /* This emulates MII registers for a fixed-mode phy operating as per the - * passed in state. "aneg" defines if we report negotiation is possible. - * ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -70,7 +70,8 @@ struct phylink_mac_ops { - void (*mac_an_restart)(struct net_device *, unsigned int mode); - - void (*mac_link_down)(struct net_device *, unsigned int mode); -- void (*mac_link_up)(struct net_device *, unsigned int mode); -+ void (*mac_link_up)(struct net_device *, unsigned int mode, -+ struct phy_device *); - }; - - struct phylink *phylink_create(struct net_device *, struct device_node *, -@@ -95,6 +96,10 @@ void phylink_ethtool_get_pauseparam(stru - struct ethtool_pauseparam *); - int phylink_ethtool_set_pauseparam(struct phylink *, - struct ethtool_pauseparam *); -+int phylink_init_eee(struct phylink *, bool); -+int phylink_get_eee_err(struct phylink *); -+int phylink_ethtool_get_eee(struct phylink *, struct ethtool_eee *); -+int phylink_ethtool_set_eee(struct phylink *, struct ethtool_eee *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - - int phylink_set_link(struct phylink *pl, unsigned int mode, u8 port, diff --git a/target/linux/mvebu/patches-4.9/428-net-mvneta-add-EEE-support.patch b/target/linux/mvebu/patches-4.9/428-net-mvneta-add-EEE-support.patch deleted file mode 100644 index 3a20a06be..000000000 --- a/target/linux/mvebu/patches-4.9/428-net-mvneta-add-EEE-support.patch +++ /dev/null @@ -1,179 +0,0 @@ -From: Russell King -Date: Tue, 29 Sep 2015 15:17:39 +0100 -Subject: [PATCH] net: mvneta: add EEE support - -Add EEE support to mvneta. This allows us to enable the low power idle -support at MAC level if there is a PHY attached through phylink which -supports LPI. The appropriate ethtool support is provided to allow the -feature to be controlled, including ethtool statistics for EEE wakeup -errors. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -244,6 +244,12 @@ - #define MVNETA_TXQ_TOKEN_SIZE_REG(q) (0x3e40 + ((q) << 2)) - #define MVNETA_TXQ_TOKEN_SIZE_MAX 0x7fffffff - -+#define MVNETA_LPI_CTRL_0 0x2cc0 -+#define MVNETA_LPI_CTRL_1 0x2cc4 -+#define MVNETA_LPI_REQUEST_ENABLE BIT(0) -+#define MVNETA_LPI_CTRL_2 0x2cc8 -+#define MVNETA_LPI_STATUS 0x2ccc -+ - #define MVNETA_CAUSE_TXQ_SENT_DESC_ALL_MASK 0xff - - /* Descriptor ring Macros */ -@@ -317,6 +323,11 @@ - #define MVNETA_RX_GET_BM_POOL_ID(rxd) \ - (((rxd)->status & MVNETA_RXD_BM_POOL_MASK) >> MVNETA_RXD_BM_POOL_SHIFT) - -+enum { -+ ETHTOOL_STAT_EEE_WAKEUP, -+ ETHTOOL_MAX_STATS, -+}; -+ - struct mvneta_statistic { - unsigned short offset; - unsigned short type; -@@ -325,6 +336,7 @@ struct mvneta_statistic { - - #define T_REG_32 32 - #define T_REG_64 64 -+#define T_SW 1 - - static const struct mvneta_statistic mvneta_statistics[] = { - { 0x3000, T_REG_64, "good_octets_received", }, -@@ -359,6 +371,7 @@ static const struct mvneta_statistic mvn - { 0x304c, T_REG_32, "broadcast_frames_sent", }, - { 0x3054, T_REG_32, "fc_sent", }, - { 0x300c, T_REG_32, "internal_mac_transmit_err", }, -+ { ETHTOOL_STAT_EEE_WAKEUP, T_SW, "eee_wakeup_errors", }, - }; - - struct mvneta_pcpu_stats { -@@ -417,6 +430,10 @@ struct mvneta_port { - struct mvneta_bm_pool *pool_short; - int bm_win_id; - -+ bool eee_enabled; -+ bool eee_active; -+ bool tx_lpi_enabled; -+ - u64 ethtool_stats[ARRAY_SIZE(mvneta_statistics)]; - - u32 indir[MVNETA_RSS_LU_TABLE_SIZE]; -@@ -3290,6 +3307,18 @@ static void mvneta_mac_config(struct net - mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, new_an); - } - -+static void mvneta_set_eee(struct mvneta_port *pp, bool enable) -+{ -+ u32 lpi_ctl1; -+ -+ lpi_ctl1 = mvreg_read(pp, MVNETA_LPI_CTRL_1); -+ if (enable) -+ lpi_ctl1 |= MVNETA_LPI_REQUEST_ENABLE; -+ else -+ lpi_ctl1 &= ~MVNETA_LPI_REQUEST_ENABLE; -+ mvreg_write(pp, MVNETA_LPI_CTRL_1, lpi_ctl1); -+} -+ - static void mvneta_mac_link_down(struct net_device *ndev, unsigned int mode) - { - struct mvneta_port *pp = netdev_priv(ndev); -@@ -3303,6 +3332,9 @@ static void mvneta_mac_link_down(struct - val |= MVNETA_GMAC_FORCE_LINK_DOWN; - mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val); - } -+ -+ pp->eee_active = false; -+ mvneta_set_eee(pp, false); - } - - static void mvneta_mac_link_up(struct net_device *ndev, unsigned int mode, -@@ -3319,6 +3351,11 @@ static void mvneta_mac_link_up(struct ne - } - - mvneta_port_up(pp); -+ -+ if (phy && pp->eee_enabled) { -+ pp->eee_active = phy_init_eee(phy, 0) >= 0; -+ mvneta_set_eee(pp, pp->eee_active && pp->tx_lpi_enabled); -+ } - } - - static const struct phylink_mac_ops mvneta_phylink_ops = { -@@ -3771,6 +3808,13 @@ static void mvneta_ethtool_update_stats( - high = readl_relaxed(base + s->offset + 4); - val = (u64)high << 32 | low; - break; -+ case T_SW: -+ switch (s->offset) { -+ case ETHTOOL_STAT_EEE_WAKEUP: -+ val = phylink_get_eee_err(pp->phylink); -+ break; -+ } -+ break; - } - - pp->ethtool_stats[i] += val; -@@ -3906,6 +3950,47 @@ static u16 mvneta_select_queue(struct ne - } - - -+static int mvneta_ethtool_get_eee(struct net_device *dev, -+ struct ethtool_eee *eee) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ u32 lpi_ctl0; -+ -+ lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); -+ -+ eee->eee_enabled = pp->eee_enabled; -+ eee->eee_active = pp->eee_active; -+ eee->tx_lpi_enabled = pp->tx_lpi_enabled; -+ eee->tx_lpi_timer = (lpi_ctl0) >> 8; // * scale; -+ -+ return phylink_ethtool_get_eee(pp->phylink, eee); -+} -+ -+static int mvneta_ethtool_set_eee(struct net_device *dev, -+ struct ethtool_eee *eee) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ u32 lpi_ctl0; -+ -+ /* The Armada 37x documents do not give limits for this other than -+ * it being an 8-bit register. */ -+ if (eee->tx_lpi_enabled && -+ (eee->tx_lpi_timer < 0 || eee->tx_lpi_timer > 255)) -+ return -EINVAL; -+ -+ lpi_ctl0 = mvreg_read(pp, MVNETA_LPI_CTRL_0); -+ lpi_ctl0 &= ~(0xff << 8); -+ lpi_ctl0 |= eee->tx_lpi_timer << 8; -+ mvreg_write(pp, MVNETA_LPI_CTRL_0, lpi_ctl0); -+ -+ pp->eee_enabled = eee->eee_enabled; -+ pp->tx_lpi_enabled = eee->tx_lpi_enabled; -+ -+ mvneta_set_eee(pp, eee->tx_lpi_enabled && eee->eee_enabled); -+ -+ return phylink_ethtool_set_eee(pp->phylink, eee); -+} -+ - static const struct net_device_ops mvneta_netdev_ops = { - .ndo_open = mvneta_open, - .ndo_stop = mvneta_stop, -@@ -3938,6 +4023,8 @@ const struct ethtool_ops mvneta_eth_tool - .set_rxfh = mvneta_ethtool_set_rxfh, - .get_link_ksettings = mvneta_ethtool_get_link_ksettings, - .set_link_ksettings = mvneta_ethtool_set_link_ksettings, -+ .get_eee = mvneta_ethtool_get_eee, -+ .set_eee = mvneta_ethtool_set_eee, - }; - - /* Initialize hw */ diff --git a/target/linux/mvebu/patches-4.9/429-phylink-add-module-EEPROM-support.patch b/target/linux/mvebu/patches-4.9/429-phylink-add-module-EEPROM-support.patch deleted file mode 100644 index 88853ca4a..000000000 --- a/target/linux/mvebu/patches-4.9/429-phylink-add-module-EEPROM-support.patch +++ /dev/null @@ -1,123 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 23:10:05 +0100 -Subject: [PATCH] phylink: add module EEPROM support - -Add support for reading module EEPROMs through phylink. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -930,6 +930,36 @@ int phylink_ethtool_set_pauseparam(struc - } - EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); - -+int phylink_ethtool_get_module_info(struct phylink *pl, -+ struct ethtool_modinfo *modinfo) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->module_ops) -+ ret = pl->module_ops->get_module_info(pl->module_data, -+ modinfo); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_info); -+ -+int phylink_ethtool_get_module_eeprom(struct phylink *pl, -+ struct ethtool_eeprom *ee, u8 *buf) -+{ -+ int ret = -EOPNOTSUPP; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->module_ops) -+ ret = pl->module_ops->get_module_eeprom(pl->module_data, ee, -+ buf); -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_ethtool_get_module_eeprom); -+ - int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) - { - int ret = -EPROTONOSUPPORT; -@@ -1115,6 +1145,39 @@ EXPORT_SYMBOL_GPL(phylink_mii_ioctl); - - - -+int phylink_register_module(struct phylink *pl, void *data, -+ const struct phylink_module_ops *ops) -+{ -+ int ret = -EBUSY; -+ -+ mutex_lock(&pl->config_mutex); -+ if (!pl->module_ops) { -+ pl->module_ops = ops; -+ pl->module_data = data; -+ ret = 0; -+ } -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_register_module); -+ -+int phylink_unregister_module(struct phylink *pl, void *data) -+{ -+ int ret = -EINVAL; -+ -+ mutex_lock(&pl->config_mutex); -+ if (pl->module_data == data) { -+ pl->module_ops = NULL; -+ pl->module_data = NULL; -+ ret = 0; -+ } -+ mutex_unlock(&pl->config_mutex); -+ -+ return ret; -+} -+EXPORT_SYMBOL_GPL(phylink_unregister_module); -+ - void phylink_disable(struct phylink *pl) - { - set_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state); ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -74,6 +74,11 @@ struct phylink_mac_ops { - struct phy_device *); - }; - -+struct phylink_module_ops { -+ int (*get_module_info)(void *, struct ethtool_modinfo *); -+ int (*get_module_eeprom)(void *, struct ethtool_eeprom *, u8 *); -+}; -+ - struct phylink *phylink_create(struct net_device *, struct device_node *, - phy_interface_t iface, const struct phylink_mac_ops *ops); - void phylink_destroy(struct phylink *); -@@ -96,12 +101,19 @@ void phylink_ethtool_get_pauseparam(stru - struct ethtool_pauseparam *); - int phylink_ethtool_set_pauseparam(struct phylink *, - struct ethtool_pauseparam *); -+int phylink_ethtool_get_module_info(struct phylink *, struct ethtool_modinfo *); -+int phylink_ethtool_get_module_eeprom(struct phylink *, -+ struct ethtool_eeprom *, u8 *); - int phylink_init_eee(struct phylink *, bool); - int phylink_get_eee_err(struct phylink *); - int phylink_ethtool_get_eee(struct phylink *, struct ethtool_eee *); - int phylink_ethtool_set_eee(struct phylink *, struct ethtool_eee *); - int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); - -+int phylink_register_module(struct phylink *, void *, -+ const struct phylink_module_ops *); -+int phylink_unregister_module(struct phylink *, void *); -+ - int phylink_set_link(struct phylink *pl, unsigned int mode, u8 port, - const unsigned long *support); - void phylink_disable(struct phylink *pl); diff --git a/target/linux/mvebu/patches-4.9/430-net-mvneta-add-module-EEPROM-reading-support.patch b/target/linux/mvebu/patches-4.9/430-net-mvneta-add-module-EEPROM-reading-support.patch deleted file mode 100644 index 834bbe9a3..000000000 --- a/target/linux/mvebu/patches-4.9/430-net-mvneta-add-module-EEPROM-reading-support.patch +++ /dev/null @@ -1,41 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 23:32:39 +0100 -Subject: [PATCH] net: mvneta: add module EEPROM reading support - -Signed-off-by: Russell King ---- - ---- a/drivers/net/ethernet/marvell/mvneta.c -+++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -3950,6 +3950,22 @@ static u16 mvneta_select_queue(struct ne - } - - -+static int mvneta_ethtool_get_module_info(struct net_device *dev, -+ struct ethtool_modinfo *modinfo) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_get_module_info(pp->phylink, modinfo); -+} -+ -+static int mvneta_ethtool_get_module_eeprom(struct net_device *dev, -+ struct ethtool_eeprom *ee, u8 *buf) -+{ -+ struct mvneta_port *pp = netdev_priv(dev); -+ -+ return phylink_ethtool_get_module_eeprom(pp->phylink, ee, buf); -+} -+ - static int mvneta_ethtool_get_eee(struct net_device *dev, - struct ethtool_eee *eee) - { -@@ -4023,6 +4039,8 @@ const struct ethtool_ops mvneta_eth_tool - .set_rxfh = mvneta_ethtool_set_rxfh, - .get_link_ksettings = mvneta_ethtool_get_link_ksettings, - .set_link_ksettings = mvneta_ethtool_set_link_ksettings, -+ .get_module_info = mvneta_ethtool_get_module_info, -+ .get_module_eeprom = mvneta_ethtool_get_module_eeprom, - .get_eee = mvneta_ethtool_get_eee, - .set_eee = mvneta_ethtool_set_eee, - }; diff --git a/target/linux/mvebu/patches-4.9/431-sfp-phylink-hook-up-eeprom-functions.patch b/target/linux/mvebu/patches-4.9/431-sfp-phylink-hook-up-eeprom-functions.patch deleted file mode 100644 index 9f049aaa4..000000000 --- a/target/linux/mvebu/patches-4.9/431-sfp-phylink-hook-up-eeprom-functions.patch +++ /dev/null @@ -1,65 +0,0 @@ -From: Russell King -Date: Thu, 8 Oct 2015 23:49:47 +0100 -Subject: [PATCH] sfp/phylink: hook up eeprom functions - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -985,11 +985,9 @@ static void sfp_sm_event(struct sfp *sfp - mutex_unlock(&sfp->sm_mutex); - } - --#if 0 --static int sfp_phy_module_info(struct phy_device *phy, -- struct ethtool_modinfo *modinfo) -+static int sfp_module_info(void *priv, struct ethtool_modinfo *modinfo) - { -- struct sfp *sfp = phy->priv; -+ struct sfp *sfp = priv; - - /* locking... and check module is present */ - -@@ -1003,10 +1001,9 @@ static int sfp_phy_module_info(struct ph - return 0; - } - --static int sfp_phy_module_eeprom(struct phy_device *phy, -- struct ethtool_eeprom *ee, u8 *data) -+static int sfp_module_eeprom(void *priv, struct ethtool_eeprom *ee, u8 *data) - { -- struct sfp *sfp = phy->priv; -+ struct sfp *sfp = priv; - unsigned int first, last, len; - int ret; - -@@ -1037,7 +1034,11 @@ static int sfp_phy_module_eeprom(struct - } - return 0; - } --#endif -+ -+static const struct phylink_module_ops sfp_module_ops = { -+ .get_module_info = sfp_module_info, -+ .get_module_eeprom = sfp_module_eeprom, -+}; - - static void sfp_timeout(struct work_struct *work) - { -@@ -1113,6 +1114,7 @@ static int sfp_netdev_notify(struct noti - case NETDEV_UNREGISTER: - if (sfp->mod_phy && sfp->phylink) - phylink_disconnect_phy(sfp->phylink); -+ phylink_unregister_module(sfp->phylink, sfp); - sfp->phylink = NULL; - dev_put(sfp->ndev); - sfp->ndev = NULL; -@@ -1230,6 +1232,7 @@ static int sfp_probe(struct platform_dev - } - - phylink_disable(sfp->phylink); -+ phylink_register_module(sfp->phylink, sfp, &sfp_module_ops); - } - - sfp->state = sfp_get_state(sfp); diff --git a/target/linux/mvebu/patches-4.9/432-phy-marvell-88E1512-add-flow-control-support.patch b/target/linux/mvebu/patches-4.9/432-phy-marvell-88E1512-add-flow-control-support.patch deleted file mode 100644 index f694b82af..000000000 --- a/target/linux/mvebu/patches-4.9/432-phy-marvell-88E1512-add-flow-control-support.patch +++ /dev/null @@ -1,24 +0,0 @@ -From: Russell King -Date: Thu, 1 Oct 2015 00:34:08 +0100 -Subject: [PATCH] phy: marvell: 88E1512: add flow control support - -The Marvell PHYs support pause frame advertisments, so we should not be -masking their support off. Add the necessary flag to the Marvell PHY -to allow any MAC level pause frame support to be advertised. - -Reviewed-by: Florian Fainelli -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/marvell.c -+++ b/drivers/net/phy/marvell.c -@@ -1678,7 +1678,8 @@ static struct phy_driver marvell_drivers - .phy_id = MARVELL_PHY_ID_88E1510, - .phy_id_mask = MARVELL_PHY_ID_MASK, - .name = "Marvell 88E1510", -- .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE, -+ .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE | -+ SUPPORTED_Pause, - .flags = PHY_HAS_INTERRUPT, - .probe = marvell_probe, - .config_init = &m88e1510_config_init, diff --git a/target/linux/mvebu/patches-4.9/433-phy-marvell-88E1111-add-flow-control-support.patch b/target/linux/mvebu/patches-4.9/433-phy-marvell-88E1111-add-flow-control-support.patch deleted file mode 100644 index cf525a29c..000000000 --- a/target/linux/mvebu/patches-4.9/433-phy-marvell-88E1111-add-flow-control-support.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Russell King -Date: Tue, 12 Jul 2016 16:45:43 +0100 -Subject: [PATCH] phy: marvell: 88E1111: add flow control support - -The Marvell PHYs support pause frame advertisments, so we should not be -masking their support off. Add the necessary flag to the Marvell PHY -to allow any MAC level pause frame support to be advertised. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/marvell.c -+++ b/drivers/net/phy/marvell.c -@@ -1530,7 +1530,7 @@ static struct phy_driver marvell_drivers - .phy_id = MARVELL_PHY_ID_88E1111, - .phy_id_mask = MARVELL_PHY_ID_MASK, - .name = "Marvell 88E1111", -- .features = PHY_GBIT_FEATURES, -+ .features = PHY_GBIT_FEATURES | SUPPORTED_Pause, - .flags = PHY_HAS_INTERRUPT, - .probe = marvell_probe, - .config_init = &m88e1111_config_init, diff --git a/target/linux/mvebu/patches-4.9/434-phy-marvell-88E1540-add-flow-control-support.patch b/target/linux/mvebu/patches-4.9/434-phy-marvell-88E1540-add-flow-control-support.patch deleted file mode 100644 index 607d173fc..000000000 --- a/target/linux/mvebu/patches-4.9/434-phy-marvell-88E1540-add-flow-control-support.patch +++ /dev/null @@ -1,22 +0,0 @@ -From: Russell King -Date: Tue, 12 Jul 2016 16:45:43 +0100 -Subject: [PATCH] phy: marvell: 88E1540: add flow control support - -The Marvell PHYs support pause frame advertisments, so we should not be -masking their support off. Add the necessary flag to the Marvell PHY -to allow any MAC level pause frame support to be advertised. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/marvell.c -+++ b/drivers/net/phy/marvell.c -@@ -1698,7 +1698,7 @@ static struct phy_driver marvell_drivers - .phy_id = MARVELL_PHY_ID_88E1540, - .phy_id_mask = MARVELL_PHY_ID_MASK, - .name = "Marvell 88E1540", -- .features = PHY_GBIT_FEATURES, -+ .features = PHY_GBIT_FEATURES | SUPPORTED_Pause, - .flags = PHY_HAS_INTERRUPT, - .probe = marvell_probe, - .config_init = &marvell_config_init, diff --git a/target/linux/mvebu/patches-4.9/436-phylink-propagate-PHY-interface-mode-to-MAC-driver.patch b/target/linux/mvebu/patches-4.9/436-phylink-propagate-PHY-interface-mode-to-MAC-driver.patch deleted file mode 100644 index 9b872b82d..000000000 --- a/target/linux/mvebu/patches-4.9/436-phylink-propagate-PHY-interface-mode-to-MAC-driver.patch +++ /dev/null @@ -1,126 +0,0 @@ -From: Russell King -Date: Tue, 3 Jan 2017 18:34:17 +0000 -Subject: [PATCH] phylink: propagate PHY interface mode to MAC driver - -Some 10Gigabit PHYs automatically switch the mode of their host -interface depending on their negotiated speed. We need to communicate -this to the MAC driver so the MAC can switch its host interface to -match the PHYs new operating mode. Provide the current PHY interface -mode to the MAC driver. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -242,8 +242,9 @@ static void phylink_mac_config(struct ph - const struct phylink_link_state *state) - { - netdev_dbg(pl->netdev, -- "%s: mode=%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", -+ "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", - __func__, phylink_an_mode_str(pl->link_an_mode), -+ phy_modes(state->interface), - phy_speed_to_str(state->speed), - phy_duplex_to_str(state->duplex), - __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, -@@ -264,6 +265,7 @@ static int phylink_get_mac_state(struct - - linkmode_copy(state->advertising, pl->link_config.advertising); - linkmode_zero(state->lp_advertising); -+ state->interface = pl->link_config.interface; - state->an_enabled = pl->link_config.an_enabled; - state->link = 1; - -@@ -344,19 +346,38 @@ static void phylink_resolve(struct work_ - case MLO_AN_PHY: - link_state = pl->phy_state; - phylink_resolve_flow(pl, &link_state); -+ phylink_mac_config(pl, &link_state); - break; - - case MLO_AN_FIXED: - phylink_get_fixed_state(pl, &link_state); -+ phylink_mac_config(pl, &link_state); - break; - - case MLO_AN_SGMII: - phylink_get_mac_state(pl, &link_state); - if (pl->phydev) { -+ bool changed = false; -+ - link_state.link = link_state.link && - pl->phy_state.link; -- link_state.pause |= pl->phy_state.pause; -- phylink_resolve_flow(pl, &link_state); -+ -+ if (pl->phy_state.interface != -+ link_state.interface) { -+ link_state.interface = pl->phy_state.interface; -+ changed = true; -+ } -+ -+ /* Propagate the flow control from the PHY -+ * to the MAC. Also propagate the interface -+ * if changed. -+ */ -+ if (pl->phy_state.link || changed) { -+ link_state.pause |= pl->phy_state.pause; -+ phylink_resolve_flow(pl, &link_state); -+ -+ phylink_mac_config(pl, &link_state); -+ } - } - break; - -@@ -372,13 +393,6 @@ static void phylink_resolve(struct work_ - pl->ops->mac_link_down(ndev, pl->link_an_mode); - netdev_info(ndev, "Link is Down\n"); - } else { -- /* If we have a PHY, we need the MAC updated with -- * the current link parameters (eg, in SGMII mode, -- * with flow control status.) -- */ -- if (pl->phydev) -- phylink_mac_config(pl, &link_state); -- - pl->ops->mac_link_up(ndev, pl->link_an_mode, - pl->phydev); - -@@ -414,8 +428,10 @@ struct phylink *phylink_create(struct ne - mutex_init(&pl->config_mutex); - INIT_WORK(&pl->resolve, phylink_resolve); - pl->netdev = ndev; -+ pl->phy_state.interface = iface; - pl->link_interface = iface; - pl->link_port = PORT_MII; -+ pl->link_config.interface = iface; - pl->link_config.pause = MLO_PAUSE_AN; - pl->link_config.speed = SPEED_UNKNOWN; - pl->link_config.duplex = DUPLEX_UNKNOWN; -@@ -471,12 +487,14 @@ void phylink_phy_change(struct phy_devic - pl->phy_state.pause |= MLO_PAUSE_SYM; - if (phydev->asym_pause) - pl->phy_state.pause |= MLO_PAUSE_ASYM; -+ pl->phy_state.interface = phydev->interface; - pl->phy_state.link = up; - mutex_unlock(&pl->state_mutex); - - phylink_run_resolve(pl); - -- netdev_dbg(pl->netdev, "phy link %s %s/%s\n", up ? "up" : "down", -+ netdev_dbg(pl->netdev, "phy link %s %s/%s/%s\n", up ? "up" : "down", -+ phy_modes(phydev->interface), - phy_speed_to_str(phydev->speed), - phy_duplex_to_str(phydev->duplex)); - } ---- a/include/linux/phylink.h -+++ b/include/linux/phylink.h -@@ -27,6 +27,7 @@ enum { - struct phylink_link_state { - __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); - __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); -+ phy_interface_t interface; /* PHY_INTERFACE_xxx */ - int speed; - int duplex; - int pause; diff --git a/target/linux/mvebu/patches-4.9/437-phylink-ensure-link-drops-are-reported.patch b/target/linux/mvebu/patches-4.9/437-phylink-ensure-link-drops-are-reported.patch deleted file mode 100644 index 854419747..000000000 --- a/target/linux/mvebu/patches-4.9/437-phylink-ensure-link-drops-are-reported.patch +++ /dev/null @@ -1,52 +0,0 @@ -From: Russell King -Date: Mon, 19 Dec 2016 12:17:57 +0000 -Subject: [PATCH] phylink: ensure link drops are reported - -When the MAC reports a link failure, it can be momentary. Ensure -that the event is reported by latching the loss of link, so that the -worker reports link down. - -Signed-off-by: Russell King ---- - ---- a/drivers/net/phy/phylink.c -+++ b/drivers/net/phy/phylink.c -@@ -60,6 +60,8 @@ struct phylink { - struct phylink_link_state phy_state; - struct work_struct resolve; - -+ bool mac_link_dropped; -+ - const struct phylink_module_ops *module_ops; - void *module_data; - }; -@@ -340,6 +342,9 @@ static void phylink_resolve(struct work_ - - mutex_lock(&pl->state_mutex); - if (pl->phylink_disable_state) { -+ pl->mac_link_dropped = false; -+ link_state.link = false; -+ } else if (pl->mac_link_dropped) { - link_state.link = false; - } else { - switch (pl->link_an_mode) { -@@ -405,6 +410,10 @@ static void phylink_resolve(struct work_ - phylink_pause_to_str(link_state.pause)); - } - } -+ if (!link_state.link && pl->mac_link_dropped) { -+ pl->mac_link_dropped = false; -+ queue_work(system_power_efficient_wq, &pl->resolve); -+ } - mutex_unlock(&pl->state_mutex); - } - -@@ -641,6 +650,8 @@ EXPORT_SYMBOL_GPL(phylink_disconnect_phy - - void phylink_mac_change(struct phylink *pl, bool up) - { -+ if (!up) -+ pl->mac_link_dropped = true; - phylink_run_resolve(pl); - netdev_dbg(pl->netdev, "mac link %s\n", up ? "up" : "down"); - } diff --git a/target/linux/mvebu/patches-4.9/450-reprobe_sfp_phy.patch b/target/linux/mvebu/patches-4.9/450-reprobe_sfp_phy.patch deleted file mode 100644 index 69eaa3773..000000000 --- a/target/linux/mvebu/patches-4.9/450-reprobe_sfp_phy.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 28baa5e2635285b178326b301f534ed95c65dd01 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Thu, 29 Sep 2016 11:44:39 +0200 -Subject: [PATCH] sfp: retry phy probe if unsuccessful - -Some phys seem to take longer than 50 ms to come out of reset, so retry -until we find a phy. - -Signed-off-by: Jonas Gorski ---- - drivers/net/phy/sfp.c | 38 +++++++++++++++++++++++++------------- - 1 file changed, 25 insertions(+), 13 deletions(-) - ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -491,7 +491,7 @@ static void sfp_sm_phy_detach(struct sfp - sfp->mod_phy = NULL; - } - --static void sfp_sm_probe_phy(struct sfp *sfp) -+static int sfp_sm_probe_phy(struct sfp *sfp) - { - struct phy_device *phy; - int err; -@@ -500,12 +500,12 @@ static void sfp_sm_probe_phy(struct sfp - - phy = mdiobus_scan(sfp->i2c_mii, SFP_PHY_ADDR); - if (IS_ERR(phy)) { -+ if (PTR_ERR(phy) == -ENODEV) { -+ dev_dbg(sfp->dev, "no PHY detected\n"); -+ return -EAGAIN; -+ } - dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy)); -- return; -- } -- if (!phy) { -- dev_info(sfp->dev, "no PHY detected\n"); -- return; -+ return PTR_ERR(phy); - } - - if (sfp->phylink) { -@@ -515,12 +515,14 @@ static void sfp_sm_probe_phy(struct sfp - phy_device_free(phy); - dev_err(sfp->dev, "phylink_connect_phy failed: %d\n", - err); -- return; -+ return err; - } - } - - sfp->mod_phy = phy; - phy_start(phy); -+ -+ return 0; - } - - static void sfp_sm_link_up(struct sfp *sfp) -@@ -569,30 +571,41 @@ static void sfp_sm_fault(struct sfp *sfp - - static void sfp_sm_mod_init(struct sfp *sfp) - { -+ int ret = 0; -+ - sfp_module_tx_enable(sfp); - -- /* Wait t_init before indicating that the link is up, provided the -- * current state indicates no TX_FAULT. If TX_FAULT clears before -- * this time, that's fine too. -- */ -- sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -- sfp->sm_retries = 5; -+ if (!sfp->phylink) -+ return; - -- if (sfp->phylink) { -- /* Setting the serdes link mode is guesswork: there's no -- * field in the EEPROM which indicates what mode should -- * be used. -- * -- * If it's a gigabit-only fiber module, it probably does -- * not have a PHY, so switch to 802.3z negotiation mode. -- * Otherwise, switch to SGMII mode (which is required to -- * support non-gigabit speeds) and probe for a PHY. -+ /* Setting the serdes link mode is guesswork: there's no -+ * field in the EEPROM which indicates what mode should -+ * be used. -+ * -+ * If it's a gigabit-only fiber module, it probably does -+ * not have a PHY, so switch to 802.3z negotiation mode. -+ * Otherwise, switch to SGMII mode (which is required to -+ * support non-gigabit speeds) and probe for a PHY. -+ */ -+ if (sfp->id.base.e1000_base_t || -+ sfp->id.base.e100_base_lx || -+ sfp->id.base.e100_base_fx) -+ ret = sfp_sm_probe_phy(sfp); -+ -+ if (!ret) { -+ /* Wait t_init before indicating that the link is up, provided -+ * the current state indicates no TX_FAULT. If TX_FAULT clears -+ * this time, that's fine too. - */ -- if (sfp->id.base.e1000_base_t || -- sfp->id.base.e100_base_lx || -- sfp->id.base.e100_base_fx) -- sfp_sm_probe_phy(sfp); -+ sfp_sm_next(sfp, SFP_S_INIT, T_INIT_JIFFIES); -+ sfp->sm_retries = 5; -+ return; - } -+ -+ if (ret == -EAGAIN) -+ sfp_sm_set_timer(sfp, T_PROBE_RETRY); -+ else -+ sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0); - } - - static int sfp_sm_mod_probe(struct sfp *sfp) diff --git a/target/linux/mvebu/patches-4.9/471-add-ClearFog-Base-device-tree-files.patch b/target/linux/mvebu/patches-4.9/471-add-ClearFog-Base-device-tree-files.patch deleted file mode 100644 index c075c4b02..000000000 --- a/target/linux/mvebu/patches-4.9/471-add-ClearFog-Base-device-tree-files.patch +++ /dev/null @@ -1,540 +0,0 @@ -From b4ac5820bdc98ee24a2f73b8bd7fdf7f82db3a46 Mon Sep 17 00:00:00 2001 -From: Marko Ratkaj -Date: Fri, 7 Apr 2017 11:02:30 +0200 -Subject: [PATCH 2/2] add ClearFog Base device tree files - -Signed-off-by: Marko Ratkaj ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/armada-388-clearfog-base.dts | 161 ++++++++++++ - arch/arm/boot/dts/armada-388-clearfog.dtsi | 282 +++++++++++++++++++++ - .../dts/armada-38x-solidrun-microsom-emmc.dtsi | 62 +++++ - 4 files changed, 506 insertions(+) - create mode 100644 arch/arm/boot/dts/armada-388-clearfog-base.dts - create mode 100644 arch/arm/boot/dts/armada-388-clearfog.dtsi - create mode 100644 arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -925,6 +925,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-linksys-shelby.dtb \ - armada-388-clearfog.dtb \ - armada-388-clearfog-pro.dtb \ -+ armada-388-clearfog-base.dtb \ - armada-388-db.dtb \ - armada-388-gp.dtb \ - armada-388-rd.dtb ---- /dev/null -+++ b/arch/arm/boot/dts/armada-388-clearfog-base.dts -@@ -0,0 +1,161 @@ -+/* -+ * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828) -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+#include "armada-388-clearfog.dtsi" -+#include "armada-38x-solidrun-microsom-emmc.dtsi" -+ -+/ { -+ model = "SolidRun Clearfog Base A1"; -+ compatible = "solidrun,clearfog-base-a1", -+ "solidrun,clearfog-a1", "marvell,armada388", -+ "marvell,armada385", "marvell,armada380"; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ pinctrl-0 = <&rear_button_pins>; -+ pinctrl-names = "default"; -+ -+ button_0 { -+ /* The rear SW3 button */ -+ label = "Rear Button"; -+ gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; -+ linux,can-disable; -+ linux,code = ; -+ }; -+ }; -+}; -+ -+ð1 { -+ phy = <&phy1>; -+}; -+ -+&gpio0 { -+ phy1_reset { -+ gpio-hog; -+ gpios = <19 GPIO_ACTIVE_LOW>; -+ output-low; -+ line-name = "phy1-reset"; -+ }; -+}; -+ -+&mdio { -+ pinctrl-0 = <&mdio_pins µsom_phy_clk_pins &clearfog_phy_pins>; -+ phy1: ethernet-phy@1 { -+ /* -+ * Annoyingly, the marvell phy driver configures the LED -+ * register, rather than preserving reset-loaded setting. -+ * We undo that rubbish here. -+ */ -+ marvell,reg-init = <3 16 0 0x101e>; -+ reg = <1>; -+ }; -+}; -+ -+&pinctrl { -+ /* phy1 reset */ -+ clearfog_phy_pins: clearfog-phy-pins { -+ marvell,pins = "mpp19"; -+ marvell,function = "gpio"; -+ }; -+ rear_button_pins: rear-button-pins { -+ marvell,pins = "mpp44"; -+ marvell,function = "gpio"; -+ }; -+}; -+ -+/* -+MPP -+18: pu gpio pca9655 int -+19: gpio phy reset -+20: pu gpio sd0 detect -+21: sd0:cmd -+22: pd gpio mikro int -+23: -+ -+24: ua1:rxd mikro rx -+25: ua1:txd mikro tx -+26: pu i2c1:sck -+27: pu i2c1:sda -+28: sd0:clk -+29: pd gpio mikro rst -+30: -+31: -+ -+32: -+33: -+34: -+35: -+36: -+37: sd0:d3 -+38: sd0:d0 -+39: sd0:d1 -+ -+40: sd0:d2 -+41: -+42: -+43: spi1:cs2 mikro cs -+44: gpio rear button sw3 -+45: ref:clk_out0 phy#0 clock -+46: ref:clk_out1 phy#1 clock -+47: -+ -+48: gpio J18 spare gpio -+49: gpio U10 I2C_IRQ(GNSS) -+50: gpio board id? -+51: -+52: -+53: -+54: gpio mikro pwm -+55: -+ -+56: pu spi1:mosi mikro mosi -+57: pd spi1:sck mikro sck -+58: spi1:miso mikro miso -+59: -+*/ ---- /dev/null -+++ b/arch/arm/boot/dts/armada-388-clearfog.dtsi -@@ -0,0 +1,282 @@ -+/* -+ * Device Tree include file for SolidRun Clearfog 88F6828 based boards -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This file is distributed in the hope that it will be useful -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include "armada-388.dtsi" -+#include "armada-38x-solidrun-microsom.dtsi" -+ -+/ { -+ aliases { -+ /* So that mvebu u-boot can update the MAC addresses */ -+ ethernet1 = ð0; -+ ethernet2 = ð1; -+ ethernet3 = ð2; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:115200n8"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ soc { -+ internal-regs { -+ sata@a8000 { -+ /* pinctrl? */ -+ status = "okay"; -+ }; -+ -+ sata@e0000 { -+ /* pinctrl? */ -+ status = "okay"; -+ }; -+ -+ sdhci@d8000 { -+ bus-width = <4>; -+ cd-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>; -+ no-1-8-v; -+ pinctrl-0 = <µsom_sdhci_pins -+ &clearfog_sdhci_cd_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ vmmc = <®_3p3v>; -+ wp-inverted; -+ }; -+ -+ usb@58000 { -+ /* CON3, nearest power. */ -+ status = "okay"; -+ }; -+ -+ usb3@f8000 { -+ /* CON7 */ -+ status = "okay"; -+ }; -+ }; -+ -+ pcie-controller { -+ status = "okay"; -+ /* -+ * The two PCIe units are accessible through -+ * the mini-PCIe connectors on the board. -+ */ -+ pcie@2,0 { -+ /* Port 1, Lane 0. CON3, nearest power. */ -+ reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ sfp: sfp { -+ compatible = "sff,sfp"; -+ i2c-bus = <&i2c1>; -+ los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>; -+ moddef0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>; -+ sfp,ethernet = <ð2>; -+ tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>; -+ tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>; -+ }; -+}; -+ -+ð1 { -+ /* ethernet@30000 */ -+ bm,pool-long = <2>; -+ bm,pool-short = <1>; -+ buffer-manager = <&bm>; -+ phy-mode = "sgmii"; -+ status = "okay"; -+}; -+ -+ð2 { -+ /* ethernet@34000 */ -+ bm,pool-long = <3>; -+ bm,pool-short = <1>; -+ buffer-manager = <&bm>; -+ managed = "in-band-status"; -+ phy-mode = "sgmii"; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ pinctrl-0 = <&i2c0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ /* -+ * PCA9655 GPIO expander, up to 1MHz clock. -+ * 0-CON3 CLKREQ# -+ * 1-CON3 PERST# -+ * 2- -+ * 3-CON3 W_DISABLE -+ * 4- -+ * 5-USB3 overcurrent -+ * 6-USB3 power -+ * 7- -+ * 8-JP4 P1 -+ * 9-JP4 P4 -+ * 10-JP4 P5 -+ * 11-m.2 DEVSLP -+ * 12-SFP_LOS -+ * 13-SFP_TX_FAULT -+ * 14-SFP_TX_DISABLE -+ * 15-SFP_MOD_DEF0 -+ */ -+ expander0: gpio-expander@20 { -+ /* -+ * This is how it should be: -+ * compatible = "onnn,pca9655", "nxp,pca9555"; -+ * but you can't do this because of the way I2C works. -+ */ -+ compatible = "nxp,pca9555"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ reg = <0x20>; -+ -+ pcie1_0_clkreq { -+ gpio-hog; -+ gpios = <0 GPIO_ACTIVE_LOW>; -+ input; -+ line-name = "pcie1.0-clkreq"; -+ }; -+ pcie1_0_w_disable { -+ gpio-hog; -+ gpios = <3 GPIO_ACTIVE_LOW>; -+ output-low; -+ line-name = "pcie1.0-w-disable"; -+ }; -+ usb3_ilimit { -+ gpio-hog; -+ gpios = <5 GPIO_ACTIVE_LOW>; -+ input; -+ line-name = "usb3-current-limit"; -+ }; -+ usb3_power { -+ gpio-hog; -+ gpios = <6 GPIO_ACTIVE_HIGH>; -+ output-high; -+ line-name = "usb3-power"; -+ }; -+ m2_devslp { -+ gpio-hog; -+ gpios = <11 GPIO_ACTIVE_HIGH>; -+ output-low; -+ line-name = "m.2 devslp"; -+ }; -+ }; -+ -+ /* The MCP3021 supports standard and fast modes */ -+ mikrobus_adc: mcp3021@4c { -+ compatible = "microchip,mcp3021"; -+ reg = <0x4c>; -+ }; -+}; -+ -+&i2c1 { -+ /* -+ * Routed to SFP, mikrobus, and PCIe. -+ * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with -+ * address pins tied low, which takes addresses 0x50 and 0x51. -+ * Mikrobus doesn't specify beyond an I2C bus being present. -+ * PCIe uses ARP to assign addresses, or 0x63-0x64. -+ */ -+ clock-frequency = <100000>; -+ pinctrl-0 = <&clearfog_i2c1_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ clearfog_i2c1_pins: i2c1-pins { -+ /* SFP, PCIe, mSATA, mikrobus */ -+ marvell,pins = "mpp26", "mpp27"; -+ marvell,function = "i2c1"; -+ }; -+ clearfog_sdhci_cd_pins: clearfog-sdhci-cd-pins { -+ marvell,pins = "mpp20"; -+ marvell,function = "gpio"; -+ }; -+ mikro_pins: mikro-pins { -+ /* int: mpp22 rst: mpp29 */ -+ marvell,pins = "mpp22", "mpp29"; -+ marvell,function = "gpio"; -+ }; -+ mikro_spi_pins: mikro-spi-pins { -+ marvell,pins = "mpp43"; -+ marvell,function = "spi1"; -+ }; -+ mikro_uart_pins: mikro-uart-pins { -+ marvell,pins = "mpp24", "mpp25"; -+ marvell,function = "ua1"; -+ }; -+}; -+ -+&spi1 { -+ /* -+ * Add SPI CS pins for clearfog: -+ * CS0: W25Q32 (not populated on uSOM) -+ * CS1: PIC microcontroller (Pro models) -+ * CS2: mikrobus -+ */ -+ pinctrl-0 = <&spi1_pins &mikro_spi_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ -+&uart1 { -+ /* mikrobus uart */ -+ pinctrl-0 = <&mikro_uart_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom-emmc.dtsi -@@ -0,0 +1,62 @@ -+/* -+ * Device Tree file for SolidRun Armada 38x Microsom add-on for eMMC -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This file is distributed in the hope that it will be useful -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+/ { -+ soc { -+ internal-regs { -+ sdhci@d8000 { -+ bus-width = <4>; -+ no-1-8-v; -+ non-removable; -+ pinctrl-0 = <µsom_sdhci_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ wp-inverted; -+ }; -+ }; -+ }; -+}; diff --git a/target/linux/mvebu/patches-4.9/472-armada-solidrun-microsom-backport-improvements.patch b/target/linux/mvebu/patches-4.9/472-armada-solidrun-microsom-backport-improvements.patch deleted file mode 100644 index 9195d4e79..000000000 --- a/target/linux/mvebu/patches-4.9/472-armada-solidrun-microsom-backport-improvements.patch +++ /dev/null @@ -1,185 +0,0 @@ -From fc5783a00be9251196091be6b9cdd54fe196630b Mon Sep 17 00:00:00 2001 -From: Marko Ratkaj -Date: Fri, 7 Apr 2017 11:24:19 +0200 -Subject: [PATCH] armada-38x-solidrun-microsom backport improvements from - upstream - -Signed-off-by: Marko Ratkaj ---- - .../arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 130 ++++++++++++--------- - 1 file changed, 74 insertions(+), 56 deletions(-) - ---- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi -+++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi -@@ -17,17 +17,17 @@ - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * -- * This file is distributed in the hope that it will be useful -+ * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * -- * Or, alternatively -+ * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use -+ * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following -@@ -36,11 +36,11 @@ - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * -- * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. -@@ -62,45 +62,6 @@ - MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; - - internal-regs { -- ethernet@70000 { -- pinctrl-0 = <&ge0_rgmii_pins>; -- pinctrl-names = "default"; -- phy = <&phy_dedicated>; -- phy-mode = "rgmii-id"; -- buffer-manager = <&bm>; -- bm,pool-long = <0>; -- bm,pool-short = <1>; -- status = "okay"; -- }; -- -- mdio@72004 { -- /* -- * Add the phy clock here, so the phy can be -- * accessed to read its IDs prior to binding -- * with the driver. -- */ -- pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; -- pinctrl-names = "default"; -- -- phy_dedicated: ethernet-phy@0 { -- /* -- * Annoyingly, the marvell phy driver -- * configures the LED register, rather -- * than preserving reset-loaded setting. -- * We undo that rubbish here. -- */ -- marvell,reg-init = <3 16 0 0x101e>; -- reg = <0>; -- }; -- }; -- -- pinctrl@18000 { -- microsom_phy_clk_pins: microsom-phy-clk-pins { -- marvell,pins = "mpp45"; -- marvell,function = "ref"; -- }; -- }; -- - rtc@a3800 { - /* - * If the rtc doesn't work, run "date reset" -@@ -108,21 +69,78 @@ - */ - status = "okay"; - }; -+ }; -+ }; -+}; - -- serial@12000 { -- pinctrl-0 = <&uart0_pins>; -- pinctrl-names = "default"; -- status = "okay"; -- }; -+&bm { -+ status = "okay"; -+}; - -- bm@c8000 { -- status = "okay"; -- }; -- }; -+&bm_bppi { -+ status = "okay"; -+}; - -- bm-bppi { -- status = "okay"; -- }; -+ð0 { -+ /* ethernet@70000 */ -+ pinctrl-0 = <&ge0_rgmii_pins>; -+ pinctrl-names = "default"; -+ phy = <&phy_dedicated>; -+ phy-mode = "rgmii-id"; -+ buffer-manager = <&bm>; -+ bm,pool-long = <0>; -+ bm,pool-short = <1>; -+ status = "okay"; -+}; - -+&mdio { -+ /* -+ * Add the phy clock here, so the phy can be accessed to read its -+ * IDs prior to binding with the driver. -+ */ -+ pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; -+ pinctrl-names = "default"; -+ -+ phy_dedicated: ethernet-phy@0 { -+ /* -+ * Annoyingly, the marvell phy driver configures the LED -+ * register, rather than preserving reset-loaded setting. -+ * We undo that rubbish here. -+ */ -+ marvell,reg-init = <3 16 0 0x101e>; -+ reg = <0>; - }; - }; -+ -+&pinctrl { -+ microsom_phy_clk_pins: microsom-phy-clk-pins { -+ marvell,pins = "mpp45"; -+ marvell,function = "ref"; -+ }; -+ /* Optional eMMC */ -+ microsom_sdhci_pins: microsom-sdhci-pins { -+ marvell,pins = "mpp21", "mpp28", "mpp37", -+ "mpp38", "mpp39", "mpp40"; -+ marvell,function = "sd0"; -+ }; -+}; -+ -+&spi1 { -+ /* The microsom has an optional W25Q32 on board, connected to CS0 */ -+ pinctrl-0 = <&spi1_pins>; -+ -+ w25q32: spi-flash@0 { -+ #address-cells = <1>; -+ #size-cells = <1>; -+ compatible = "w25q32", "jedec,spi-nor"; -+ reg = <0>; /* Chip select 0 */ -+ spi-max-frequency = <3000000>; -+ status = "disabled"; -+ }; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; diff --git a/target/linux/mvebu/patches-4.9/473-fix-marvell-phy-initialization-issues.patch b/target/linux/mvebu/patches-4.9/473-fix-marvell-phy-initialization-issues.patch deleted file mode 100644 index eca7e121e..000000000 --- a/target/linux/mvebu/patches-4.9/473-fix-marvell-phy-initialization-issues.patch +++ /dev/null @@ -1,51 +0,0 @@ -From: Marko Ratkaj -Date: Fri, 7 Apr 2017 13:30:30 +0200 -Subject: [PATCH] fix marvell phy initialization issues - -Fix Marvell PHYs initialization issues and optimize -logic for page changing during init - -Board affected with initialization bug: - SolidRun ClearFog Base - -Signed-off-by: Marko Ratkaj ---- - drivers/net/phy/marvell.c | 9 ++++----- - 1 file changed, 4 insertions(+), 5 deletions(-) - ---- a/drivers/net/phy/marvell.c -+++ b/drivers/net/phy/marvell.c -@@ -369,7 +369,7 @@ static int m88e1111_config_aneg(struct p - static int marvell_of_reg_init(struct phy_device *phydev) - { - const __be32 *paddr; -- int len, i, saved_page, current_page, page_changed, ret; -+ int len, i, saved_page, current_page, ret; - - if (!phydev->mdio.dev.of_node) - return 0; -@@ -382,7 +382,6 @@ static int marvell_of_reg_init(struct ph - saved_page = phy_read(phydev, MII_MARVELL_PHY_PAGE); - if (saved_page < 0) - return saved_page; -- page_changed = 0; - current_page = saved_page; - - ret = 0; -@@ -396,7 +395,6 @@ static int marvell_of_reg_init(struct ph - - if (reg_page != current_page) { - current_page = reg_page; -- page_changed = 1; - ret = phy_write(phydev, MII_MARVELL_PHY_PAGE, reg_page); - if (ret < 0) - goto err; -@@ -419,7 +417,7 @@ static int marvell_of_reg_init(struct ph - - } - err: -- if (page_changed) { -+ if (current_page != saved_page) { - i = phy_write(phydev, MII_MARVELL_PHY_PAGE, saved_page); - if (ret == 0) - ret = i; diff --git a/target/linux/mxs/Makefile b/target/linux/mxs/Makefile index 29c879f13..39064ae1a 100644 --- a/target/linux/mxs/Makefile +++ b/target/linux/mxs/Makefile @@ -13,7 +13,7 @@ FEATURES:=ext4 rtc usb gpio CPU_TYPE:=arm926ej-s MAINTAINER:=Zoltan HERPAI -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 KERNELNAME:=zImage dtbs define Target/Description diff --git a/target/linux/mxs/config-4.9 b/target/linux/mxs/config-4.14 similarity index 89% rename from target/linux/mxs/config-4.9 rename to target/linux/mxs/config-4.14 index f94d1e3ee..6e01aea42 100644 --- a/target/linux/mxs/config-4.9 +++ b/target/linux/mxs/config-4.14 @@ -1,8 +1,12 @@ CONFIG_ALIGNMENT_TRAP=y CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_SET_MEMORY=y CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y @@ -14,6 +18,8 @@ CONFIG_ARCH_MULTI_V4_V5=y CONFIG_ARCH_MULTI_V5=y CONFIG_ARCH_MXS=y CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y @@ -21,6 +27,7 @@ CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_ARM=y @@ -40,8 +47,6 @@ CONFIG_AUTO_ZRELADDR=y # CONFIG_CACHE_L2X0 is not set CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y -CONFIG_CLKSRC_OF=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMDLINE="console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait" CONFIG_CMDLINE_FROM_BOOTLOADER=y @@ -62,6 +67,7 @@ CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE_GOV_MENU=y CONFIG_CPU_PABRT_LEGACY=y CONFIG_CPU_PM=y +CONFIG_CPU_THUMB_CAPABLE=y CONFIG_CPU_TLB_V4WBI=y CONFIG_CPU_USE_DOMAINS=y CONFIG_CRC16=y @@ -77,12 +83,16 @@ CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DEBUG_ALIGN_RODATA=y CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" # CONFIG_DEBUG_UART_8250 is not set # CONFIG_DEBUG_USER is not set CONFIG_DMADEVICES=y CONFIG_DMA_ENGINE=y +# CONFIG_DMA_NOOP_OPS is not set CONFIG_DMA_OF=y +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set CONFIG_DTC=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y @@ -93,10 +103,12 @@ CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_FRAME_POINTER=y CONFIG_FS_MBCACHE=y +CONFIG_FUTEX_PI=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IO=y @@ -109,11 +121,13 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y # CONFIG_GIANFAR is not set +CONFIG_GLOB=y CONFIG_GPIOLIB=y CONFIG_GPIO_GENERIC=y CONFIG_GPIO_GENERIC_PLATFORM=y CONFIG_GPIO_MXS=y CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDIRQS_SW_RESEND=y CONFIG_HAS_DMA=y @@ -128,7 +142,6 @@ CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_TRACEHOOK=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CBPF_JIT=y CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y @@ -138,6 +151,8 @@ CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DMA_API_DEBUG=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y @@ -173,7 +188,6 @@ CONFIG_IIO_BUFFER=y CONFIG_IIO_KFIFO_BUF=y CONFIG_IIO_SYSFS_TRIGGER=y CONFIG_IIO_TRIGGER=y -CONFIG_IIO_TRIGGERED_BUFFER=y CONFIG_INITRAMFS_SOURCE="" CONFIG_INPUT=y CONFIG_IOMMU_HELPER=y @@ -185,7 +199,10 @@ CONFIG_IRQ_WORK=y # CONFIG_ISDN is not set CONFIG_JBD2=y CONFIG_LIBFDT=y -CONFIG_MDIO_BOARDINFO=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MFD_CORE=y +CONFIG_MFD_MXS_LRADC=y CONFIG_MIGHT_HAVE_PCI=y CONFIG_MMC=y CONFIG_MMC_BLOCK=y @@ -194,7 +211,6 @@ CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MTD_PHYSMAP_OF is not set CONFIG_MULTI_IRQ_HANDLER=y CONFIG_MXS_DMA=y -CONFIG_MXS_LRADC=y CONFIG_MXS_TIMER=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_KUSER_HELPERS=y @@ -231,8 +247,10 @@ CONFIG_PM_CLK=y # CONFIG_PM_DEBUG is not set CONFIG_POWER_SUPPLY=y CONFIG_PPS=y +CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13 CONFIG_PTP_1588_CLOCK=y CONFIG_RATIONAL=y +# CONFIG_RCU_NEED_SEGCBLIST is not set # CONFIG_RCU_STALL_COMMON is not set CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y @@ -241,6 +259,7 @@ CONFIG_REGMAP_SPI=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y +CONFIG_RESET_CONTROLLER=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_STMP=y CONFIG_RTC_I2C_AND_SPI=y @@ -271,7 +290,11 @@ CONFIG_STMP_DEVICE=y CONFIG_SWIOTLB=y CONFIG_SWPHY=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THIN_ARCHIVES=y CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TINY_SRCU=y CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" CONFIG_USB=y CONFIG_USB_CHIPIDEA=y diff --git a/target/linux/mxs/files/arch/arm/boot/dts/imx28-duckbill.dts b/target/linux/mxs/files/arch/arm/boot/dts/imx28-duckbill.dts deleted file mode 100644 index 305b4d063..000000000 --- a/target/linux/mxs/files/arch/arm/boot/dts/imx28-duckbill.dts +++ /dev/null @@ -1,139 +0,0 @@ -/* - * Copyright (C) 2013-2014 Michael Heimpold - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -#include "imx28.dtsi" - -/ { - model = "I2SE Duckbill"; - compatible = "i2se,duckbill", "fsl,imx28"; - - memory { - reg = <0x40000000 0x08000000>; - }; - - apb@80000000 { - apbh@80000000 { - ssp0: ssp@80010000 { - compatible = "fsl,imx28-mmc"; - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_4bit_pins_a - &mmc0_cd_cfg &mmc0_sck_cfg>; - bus-width = <4>; - vmmc-supply = <®_3p3v>; - status = "okay"; - }; - - ssp2: ssp@80014000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx28-spi"; - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pins_a>; - status = "okay"; - - spidev: spidev@0 { - compatible = "spidev"; - reg = <0>; - spi-max-frequency = <1000000>; - }; - }; - - pinctrl@80018000 { - pinctrl-names = "default"; - pinctrl-0 = <&hog_pins_a>; - - hog_pins_a: hog@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */ - >; - fsl,drive-strength = ; - fsl,voltage = ; - fsl,pull-up = ; - }; - - led_pins_a: led_gpio@0 { - reg = <0>; - fsl,pinmux-ids = < - MX28_PAD_AUART1_RX__GPIO_3_4 - MX28_PAD_AUART1_TX__GPIO_3_5 - >; - fsl,drive-strength = ; - fsl,voltage = ; - fsl,pull-up = ; - }; - }; - }; - - apbx@80040000 { - i2c0: i2c@80058000 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; - status = "okay"; - }; - - duart: serial@80074000 { - pinctrl-names = "default"; - pinctrl-0 = <&duart_pins_a>; - status = "okay"; - }; - - usbphy0: usbphy@8007c000 { - status = "okay"; - }; - }; - }; - - ahb@80080000 { - usb0: usb@80080000 { - status = "okay"; - }; - - mac0: ethernet@800f0000 { - phy-mode = "rmii"; - pinctrl-names = "default"; - pinctrl-0 = <&mac0_pins_a>; - phy-supply = <®_3p3v>; - phy-reset-gpios = <&gpio2 7 1>; - phy-reset-duration = <100>; - status = "okay"; - }; - }; - - regulators { - compatible = "simple-bus"; - - reg_3p3v: 3p3v { - compatible = "regulator-fixed"; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&led_pins_a>; - - status { - label = "duckbill:green:status"; - gpios = <&gpio3 5 0>; - }; - - failure { - label = "duckbill:red:status"; - gpios = <&gpio3 4 0>; - }; - }; -}; diff --git a/target/linux/mxs/patches-4.9/110-crypto-mxsdcp-provide-importexport.patch b/target/linux/mxs/patches-4.14/110-crypto-mxsdcp-provide-importexport.patch similarity index 100% rename from target/linux/mxs/patches-4.9/110-crypto-mxsdcp-provide-importexport.patch rename to target/linux/mxs/patches-4.14/110-crypto-mxsdcp-provide-importexport.patch diff --git a/target/linux/octeon/Makefile b/target/linux/octeon/Makefile index 254f22119..bbf1296c2 100644 --- a/target/linux/octeon/Makefile +++ b/target/linux/octeon/Makefile @@ -13,7 +13,7 @@ FEATURES:=squashfs ramdisk pci usb CPU_TYPE:=octeon MAINTAINER:=John Crispin -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 define Target/Description Build firmware images for Cavium Networks Octeon-based boards. diff --git a/target/linux/octeontx/Makefile b/target/linux/octeontx/Makefile new file mode 100644 index 000000000..e7f6b2d3c --- /dev/null +++ b/target/linux/octeontx/Makefile @@ -0,0 +1,26 @@ +# +# Copyright (C) 2018 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk + +ARCH:=aarch64 +BOARD:=octeontx +BOARDNAME:=Octeon-TX +FEATURES:=targz pcie gpio rtc usb fpu + +MAINTAINER:=Tim Harvey + +KERNEL_PATCHVER:=4.14 + +define Target/Description + Build images for Octeon-TX CN80XX/CN81XX based boards +endef + +include $(INCLUDE_DIR)/target.mk + +KERNELNAME:=Image + +$(eval $(call BuildTarget)) diff --git a/target/linux/octeontx/base-files/etc/board.d/02_network b/target/linux/octeontx/base-files/etc/board.d/02_network new file mode 100644 index 000000000..743e0f2ed --- /dev/null +++ b/target/linux/octeontx/base-files/etc/board.d/02_network @@ -0,0 +1,17 @@ +#!/bin/sh +# +# Copyright (C) 2018 OpenWrt.org +# + +. ./lib/functions/uci-defaults.sh + +board=$(board_name) + +board_config_update + +case "$board" in +esac + +board_config_flush + +exit 0 diff --git a/target/linux/octeontx/base-files/etc/inittab b/target/linux/octeontx/base-files/etc/inittab new file mode 100644 index 000000000..be235d879 --- /dev/null +++ b/target/linux/octeontx/base-files/etc/inittab @@ -0,0 +1,5 @@ +::sysinit:/etc/init.d/rcS S boot +::shutdown:/etc/init.d/rcS K shutdown +tts/0::askfirst:/usr/libexec/login.sh +ttyAMA0::askfirst:/usr/libexec/login.sh +tty1::askfirst:/usr/libexec/login.sh diff --git a/target/linux/octeontx/config-4.14 b/target/linux/octeontx/config-4.14 new file mode 100644 index 000000000..6e70c9d32 --- /dev/null +++ b/target/linux/octeontx/config-4.14 @@ -0,0 +1,550 @@ +CONFIG_64BIT=y +# CONFIG_ACPI is not set +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y +CONFIG_ARCH_HAS_KCOV=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y +CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_THUNDER=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_ARCH_WANT_FRAME_POINTERS=y +CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y +CONFIG_ARM64=y +# CONFIG_ARM64_16K_PAGES is not set +CONFIG_ARM64_4K_PAGES=y +# CONFIG_ARM64_64K_PAGES is not set +CONFIG_ARM64_CONT_SHIFT=4 +CONFIG_ARM64_CRYPTO=y +CONFIG_ARM64_HW_AFDBM=y +# CONFIG_ARM64_LSE_ATOMICS is not set +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PAN=y +# CONFIG_ARM64_PMEM is not set +# CONFIG_ARM64_PTDUMP_CORE is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set +# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set +CONFIG_ARM64_UAO=y +CONFIG_ARM64_VA_BITS=48 +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARM64_VHE=y +# CONFIG_ARMV8_DEPRECATED is not set +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_CPUIDLE=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_PSCI_FW=y +CONFIG_ARM_SBSA_WATCHDOG=y +# CONFIG_ARM_SP805_WATCHDOG is not set +CONFIG_ATA=y +# CONFIG_ATA_SFF is not set +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_BATTERY_BQ27XXX=y +# CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM is not set +CONFIG_BATTERY_BQ27XXX_I2C=y +# CONFIG_BCM_FLEXRM_MBOX is not set +CONFIG_BLK_CGROUP=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BOUNCE=y +CONFIG_BPF_JIT=y +CONFIG_CAN=y +# CONFIG_CFS_BANDWIDTH is not set +CONFIG_CGROUPS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_DEVICE=y +# CONFIG_CGROUP_FREEZER is not set +CONFIG_CGROUP_HUGETLB=y +# CONFIG_CGROUP_NET_CLASSID is not set +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLK_QORIQ=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMA=y +CONFIG_CMA_ALIGNMENT=8 +CONFIG_CMA_AREAS=7 +# CONFIG_CMA_DEBUG is not set +# CONFIG_CMA_DEBUGFS is not set +CONFIG_CMA_SIZE_MBYTES=16 +# CONFIG_CMA_SIZE_SEL_MAX is not set +CONFIG_CMA_SIZE_SEL_MBYTES=y +# CONFIG_CMA_SIZE_SEL_MIN is not set +# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_CS2000_CP=y +# CONFIG_COMMON_CLK_VERSATILE is not set +CONFIG_COMMON_CLK_XGENE=y +CONFIG_COMPACTION=y +CONFIG_COMPAT=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_CONFIGFS_FS=y +CONFIG_CPUSETS=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +CONFIG_CPU_IDLE=y +# CONFIG_CPU_IDLE_GOV_LADDER is not set +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CRASH_CORE=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRC7=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AES_ARM64=y +# CONFIG_CRYPTO_AES_ARM64_BS is not set +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_ANSI_CPRNG=y +# CONFIG_CRYPTO_CHACHA20_NEON is not set +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32_ARM64_CE is not set +CONFIG_CRYPTO_CRCT10DIF=y +# CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +# CONFIG_CRYPTO_SHA512_ARM64 is not set +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_DEBUG_BLK_CGROUP is not set +CONFIG_DEFAULT_IOSCHED="noop" +CONFIG_DEFAULT_NOOP=y +CONFIG_DMADEVICES=y +CONFIG_DMA_CMA=y +CONFIG_DMA_ENGINE=y +# CONFIG_DMA_NOOP_OPS is not set +CONFIG_DMA_OF=y +CONFIG_DMA_SHARED_BUFFER=y +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set +CONFIG_DTC=y +CONFIG_DT_IDLE_STATES=y +CONFIG_EDAC=y +# CONFIG_EDAC_DEBUG is not set +CONFIG_EDAC_LEGACY_SYSFS=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC_THUNDERX=y +# CONFIG_EDAC_XGENE is not set +CONFIG_EEPROM_AT24=y +CONFIG_EXPORTFS=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +# CONFIG_F2FS_CHECK_FS is not set +CONFIG_F2FS_FS=y +# CONFIG_F2FS_FS_SECURITY is not set +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_STAT_FS=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FANOTIFY=y +CONFIG_FAT_FS=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FRAME_POINTER=y +CONFIG_FREEZER=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FUTEX_PI=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_THUNDERX=y +# CONFIG_GRO_CELLS is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARCH_VMAP_STACK=y +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_CMPXCHG_DOUBLE=y +CONFIG_HAVE_CMPXCHG_LOCAL=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_BUGVERBOSE=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_PATA_PLATFORM=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SETUP_PER_CPU_AREA=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_UID16=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HWSPINLOCK=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_CAVIUM=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_SMBUS=y +CONFIG_I2C_THUNDERX=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IOMMU_HELPER=y +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_IRQ_WORK=y +# CONFIG_ISDN is not set +CONFIG_JBD2=y +CONFIG_JUMP_LABEL=y +CONFIG_KEXEC=y +CONFIG_KEXEC_CORE=y +CONFIG_KSM=y +CONFIG_LIBFDT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MDIO_BUS=y +CONFIG_MDIO_CAVIUM=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_THUNDER=y +CONFIG_MEMCG=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMCG_SWAP_ENABLED=y +CONFIG_MEMORY_BALLOON=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MEMTEST=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CAVIUM_THUNDERX=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MSDOS_FS=y +# CONFIG_MTD is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_MULTIPLE_NODES=y +CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_SG_DMA_LENGTH=y +# CONFIG_NET_CLS_CGROUP is not set +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NODES_SHIFT=2 +CONFIG_NO_BOOTMEM=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=64 +CONFIG_NUMA=y +CONFIG_NUMA_BALANCING=y +CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_ADDRESS_PCI=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_NUMA=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OPTEE=y +CONFIG_PADATA=y +CONFIG_PAGE_COUNTER=y +CONFIG_PARAVIRT=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_KIRIN is not set +CONFIG_PCIE_PME=y +CONFIG_PCI_ATS=y +CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_ECAM=y +# CONFIG_PCI_HISI is not set +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCI_HOST_THUNDER_ECAM=y +CONFIG_PCI_HOST_THUNDER_PEM=y +CONFIG_PCI_IOV=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +# CONFIG_PCI_XGENE is not set +CONFIG_PGTABLE_LEVELS=4 +CONFIG_PHYLIB=y +CONFIG_PHYS_ADDR_T_64BIT=y +# CONFIG_PHY_XGENE is not set +CONFIG_PM=y +CONFIG_PM_CLK=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_STD_PARTITION="" +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_SUPPLY=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_PROC_VMCORE=y +CONFIG_RADIX_TREE_MULTIORDER=y +# CONFIG_RANDOMIZE_BASE is not set +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_REBOOT_MODE=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_SPI=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1672=y +CONFIG_RTC_I2C_AND_SPI=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_SCHED_INFO=y +CONFIG_SCHED_MC=y +CONFIG_SCSI=y +# CONFIG_SCSI_LOWLEVEL is not set +# CONFIG_SCSI_PROC_FS is not set +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_XILINX_PS_UART=y +CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_THUNDERX=y +CONFIG_SRAM=y +CONFIG_SRCU=y +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SYNC_FILE=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_TASK_XACCT=y +CONFIG_TEE=y +CONFIG_THIN_ARCHIVES=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_THUNDER_NIC_BGX=y +CONFIG_THUNDER_NIC_PF=y +CONFIG_THUNDER_NIC_RGX=y +CONFIG_THUNDER_NIC_VF=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_TRANSPARENT_HUGE_PAGECACHE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +# CONFIG_USB_EHCI_HCD is not set +CONFIG_USB_PCI=y +CONFIG_USB_SUPPORT=y +# CONFIG_USB_UHCI_HCD is not set +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PCI=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_BALLOON=y +# CONFIG_VIRTIO_BLK is not set +# CONFIG_VIRTIO_CONSOLE is not set +CONFIG_VIRTIO_MMIO=y +# CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES is not set +# CONFIG_VIRTIO_NET is not set +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VMAP_STACK=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y diff --git a/target/linux/octeontx/image/Makefile b/target/linux/octeontx/image/Makefile new file mode 100644 index 000000000..203f0ea5c --- /dev/null +++ b/target/linux/octeontx/image/Makefile @@ -0,0 +1,21 @@ +# +# Copyright (C) 2018 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/image.mk + +define Image/Build/Initramfs + $(CP) $(KERNEL_BUILD_DIR)/vmlinux $(BIN_DIR)/$(IMG_PREFIX)-vmlinux + $(CP) $(KERNEL_BUILD_DIR)/vmlinux-initramfs $(BIN_DIR)/$(IMG_PREFIX)-vmlinux-initramfs +endef + +define Image/Build + $(call Image/Build/$(1)) + cp $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1).img + cp $(KDIR)/vmlinux $(BIN_DIR)/$(IMG_PREFIX)-vmlinux +endef + +$(eval $(call BuildImage)) diff --git a/target/linux/octeontx/patches-4.14/0001-net-thunderx-add-support-for-rgmii-internal-delay-mo.patch b/target/linux/octeontx/patches-4.14/0001-net-thunderx-add-support-for-rgmii-internal-delay-mo.patch new file mode 100644 index 000000000..efd13da5e --- /dev/null +++ b/target/linux/octeontx/patches-4.14/0001-net-thunderx-add-support-for-rgmii-internal-delay-mo.patch @@ -0,0 +1,139 @@ +From 69a99101748bb1bdb2730393ef48bc152c4d244a Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Tue, 12 Dec 2017 12:49:55 -0800 +Subject: [PATCH] net: thunderx: add support for rgmii internal delay modes + +The XCV_DLL_CTL is being configured with the assumption that +phy-mode is rgmii-txid (PHY_INTERFACE_MODE_RGMII_TXID) which is not always +the case. + +This patch parses the phy-mode property and uses it to configure CXV_DLL_CTL +properly. + +Signed-off-by: Tim Harvey +--- + drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 13 +++++++--- + drivers/net/ethernet/cavium/thunder/thunder_bgx.h | 2 +- + drivers/net/ethernet/cavium/thunder/thunder_xcv.c | 31 ++++++++++++++++++----- + 3 files changed, 35 insertions(+), 11 deletions(-) + +--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c ++++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c +@@ -55,6 +55,7 @@ struct bgx { + struct pci_dev *pdev; + bool is_dlm; + bool is_rgx; ++ int phy_mode; + }; + + static struct bgx *bgx_vnic[MAX_BGX_THUNDER]; +@@ -841,12 +842,12 @@ static void bgx_poll_for_link(struct wor + queue_delayed_work(lmac->check_link, &lmac->dwork, HZ * 2); + } + +-static int phy_interface_mode(u8 lmac_type) ++static int phy_interface_mode(struct bgx *bgx, u8 lmac_type) + { + if (lmac_type == BGX_MODE_QSGMII) + return PHY_INTERFACE_MODE_QSGMII; + if (lmac_type == BGX_MODE_RGMII) +- return PHY_INTERFACE_MODE_RGMII; ++ return bgx->phy_mode; + + return PHY_INTERFACE_MODE_SGMII; + } +@@ -912,7 +913,8 @@ static int bgx_lmac_enable(struct bgx *b + + if (phy_connect_direct(&lmac->netdev, lmac->phydev, + bgx_lmac_handler, +- phy_interface_mode(lmac->lmac_type))) ++ phy_interface_mode(bgx, ++ lmac->lmac_type))) + return -ENODEV; + + phy_start_aneg(lmac->phydev); +@@ -1287,6 +1289,8 @@ static int bgx_init_of_phy(struct bgx *b + bgx->lmac[lmac].lmacid = lmac; + + phy_np = of_parse_phandle(node, "phy-handle", 0); ++ if (phy_np) ++ bgx->phy_mode = of_get_phy_mode(phy_np); + /* If there is no phy or defective firmware presents + * this cortina phy, for which there is no driver + * support, ignore it. +@@ -1390,7 +1394,6 @@ static int bgx_probe(struct pci_dev *pde + bgx->max_lmac = 1; + bgx->bgx_id = MAX_BGX_PER_CN81XX - 1; + bgx_vnic[bgx->bgx_id] = bgx; +- xcv_init_hw(); + } + + /* On 81xx all are DLMs and on 83xx there are 3 BGX QLMs and one +@@ -1407,6 +1410,8 @@ static int bgx_probe(struct pci_dev *pde + if (err) + goto err_enable; + ++ if (bgx->is_rgx) ++ xcv_init_hw(bgx->phy_mode); + bgx_init_hw(bgx); + + /* Enable all LMACs */ +--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.h ++++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.h +@@ -226,7 +226,7 @@ void bgx_lmac_internal_loopback(int node + void bgx_lmac_get_pfc(int node, int bgx_idx, int lmacid, void *pause); + void bgx_lmac_set_pfc(int node, int bgx_idx, int lmacid, void *pause); + +-void xcv_init_hw(void); ++void xcv_init_hw(int phy_mode); + void xcv_setup_link(bool link_up, int link_speed); + + u64 bgx_get_rx_stats(int node, int bgx_idx, int lmac, int idx); +--- a/drivers/net/ethernet/cavium/thunder/thunder_xcv.c ++++ b/drivers/net/ethernet/cavium/thunder/thunder_xcv.c +@@ -65,7 +65,7 @@ MODULE_LICENSE("GPL v2"); + MODULE_VERSION(DRV_VERSION); + MODULE_DEVICE_TABLE(pci, xcv_id_table); + +-void xcv_init_hw(void) ++void xcv_init_hw(int phy_mode) + { + u64 cfg; + +@@ -81,12 +81,31 @@ void xcv_init_hw(void) + /* Wait for DLL to lock */ + msleep(1); + +- /* Configure DLL - enable or bypass +- * TX no bypass, RX bypass +- */ ++ /* enable/bypass DLL providing MAC based internal TX/RX delays */ + cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL); +- cfg &= ~0xFF03; +- cfg |= CLKRX_BYP; ++ cfg &= ~0xffff00; ++ switch (phy_mode) { ++ /* RX and TX delays are added by the MAC */ ++ case PHY_INTERFACE_MODE_RGMII: ++ break; ++ /* internal RX and TX delays provided by the PHY */ ++ case PHY_INTERFACE_MODE_RGMII_ID: ++ cfg |= CLKRX_BYP; ++ cfg |= CLKTX_BYP; ++ break; ++ /* internal RX delay provided by the PHY, the MAC ++ * should not add an RX delay in this case ++ */ ++ case PHY_INTERFACE_MODE_RGMII_RXID: ++ cfg |= CLKRX_BYP; ++ break; ++ /* internal TX delay provided by the PHY, the MAC ++ * should not add an TX delay in this case ++ */ ++ case PHY_INTERFACE_MODE_RGMII_TXID: ++ cfg |= CLKRX_BYP; ++ break; ++ } + writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL); + + /* Enable compensation controller and force the diff --git a/target/linux/octeontx/patches-4.14/0001-net-thunderx-workaround-BGX-TX-Underflow-issue.patch b/target/linux/octeontx/patches-4.14/0001-net-thunderx-workaround-BGX-TX-Underflow-issue.patch new file mode 100644 index 000000000..ef7aef3a8 --- /dev/null +++ b/target/linux/octeontx/patches-4.14/0001-net-thunderx-workaround-BGX-TX-Underflow-issue.patch @@ -0,0 +1,110 @@ +From b1e7791e688620c9bb8476ac2d0bc99abeb7f825 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Fri, 29 Dec 2017 16:48:04 -0800 +Subject: [PATCH] net: thunderx: workaround BGX TX Underflow issue + +While it is not yet understood why a TX underflow can easily occur +for SGMII interfaces resulting in a TX wedge. It has been found that +disabling/re-enabling the LMAC resolves the issue. + +Signed-off-by: Tim Harvey +--- + drivers/net/ethernet/cavium/thunder/thunder_bgx.c | 54 +++++++++++++++++++++++ + drivers/net/ethernet/cavium/thunder/thunder_bgx.h | 9 ++++ + 2 files changed, 63 insertions(+) + +--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.c ++++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.c +@@ -1344,6 +1344,54 @@ static int bgx_init_phy(struct bgx *bgx) + return bgx_init_of_phy(bgx); + } + ++static irqreturn_t bgx_intr_handler(int irq, void *data) ++{ ++ struct bgx *bgx = (struct bgx *)data; ++ struct device *dev = &bgx->pdev->dev; ++ u64 status, val; ++ int lmac; ++ ++ for (lmac = 0; lmac < bgx->lmac_count; lmac++) { ++ status = bgx_reg_read(bgx, lmac, BGX_GMP_GMI_TXX_INT); ++ if (status & GMI_TXX_INT_UNDFLW) { ++ dev_err(dev, "BGX%d lmac%d UNDFLW\n", bgx->bgx_id, ++ lmac); ++ val = bgx_reg_read(bgx, lmac, BGX_CMRX_CFG); ++ val &= ~CMR_EN; ++ bgx_reg_write(bgx, lmac, BGX_CMRX_CFG, val); ++ val |= CMR_EN; ++ bgx_reg_write(bgx, lmac, BGX_CMRX_CFG, val); ++ } ++ /* clear interrupts */ ++ bgx_reg_write(bgx, lmac, BGX_GMP_GMI_TXX_INT, status); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int bgx_register_intr(struct pci_dev *pdev) ++{ ++ struct bgx *bgx = pci_get_drvdata(pdev); ++ struct device *dev = &pdev->dev; ++ int num_vec, ret; ++ char irq_name[32]; ++ ++ /* Enable MSI-X */ ++ num_vec = pci_msix_vec_count(pdev); ++ ret = pci_alloc_irq_vectors(pdev, num_vec, num_vec, PCI_IRQ_MSIX); ++ if (ret < 0) { ++ dev_err(dev, "Req for #%d msix vectors failed\n", num_vec); ++ return 1; ++ } ++ sprintf(irq_name, "BGX%d", bgx->bgx_id); ++ ret = request_irq(pci_irq_vector(pdev, GMPX_GMI_TX_INT), ++ bgx_intr_handler, 0, irq_name, bgx); ++ if (ret) ++ return 1; ++ ++ return 0; ++} ++ + static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + { + int err; +@@ -1414,6 +1462,8 @@ static int bgx_probe(struct pci_dev *pde + xcv_init_hw(bgx->phy_mode); + bgx_init_hw(bgx); + ++ bgx_register_intr(pdev); ++ + /* Enable all LMACs */ + for (lmac = 0; lmac < bgx->lmac_count; lmac++) { + err = bgx_lmac_enable(bgx, lmac); +@@ -1424,6 +1474,10 @@ static int bgx_probe(struct pci_dev *pde + bgx_lmac_disable(bgx, --lmac); + goto err_enable; + } ++ ++ /* enable TX FIFO Underflow interrupt */ ++ bgx_reg_modify(bgx, lmac, BGX_GMP_GMI_TXX_INT_ENA_W1S, ++ GMI_TXX_INT_UNDFLW); + } + + return 0; +--- a/drivers/net/ethernet/cavium/thunder/thunder_bgx.h ++++ b/drivers/net/ethernet/cavium/thunder/thunder_bgx.h +@@ -179,6 +179,15 @@ + #define BGX_GMP_GMI_TXX_BURST 0x38228 + #define BGX_GMP_GMI_TXX_MIN_PKT 0x38240 + #define BGX_GMP_GMI_TXX_SGMII_CTL 0x38300 ++#define BGX_GMP_GMI_TXX_INT 0x38500 ++#define BGX_GMP_GMI_TXX_INT_W1S 0x38508 ++#define BGX_GMP_GMI_TXX_INT_ENA_W1C 0x38510 ++#define BGX_GMP_GMI_TXX_INT_ENA_W1S 0x38518 ++#define GMI_TXX_INT_PTP_LOST BIT_ULL(4) ++#define GMI_TXX_INT_LATE_COL BIT_ULL(3) ++#define GMI_TXX_INT_XSDEF BIT_ULL(2) ++#define GMI_TXX_INT_XSCOL BIT_ULL(1) ++#define GMI_TXX_INT_UNDFLW BIT_ULL(0) + + #define BGX_MSIX_VEC_0_29_ADDR 0x400000 /* +(0..29) << 4 */ + #define BGX_MSIX_VEC_0_29_CTL 0x400008 diff --git a/target/linux/omap/Makefile b/target/linux/omap/Makefile index d8c0fd88e..539aded43 100644 --- a/target/linux/omap/Makefile +++ b/target/linux/omap/Makefile @@ -14,7 +14,7 @@ FEATURES:=usb usbgadget ext4 targz fpu audio display nand ubifs CPU_TYPE:=cortex-a8 CPU_SUBTYPE:=vfpv3 -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 MAINTAINER:=Alexander Couzens diff --git a/target/linux/omap/config-4.4 b/target/linux/omap/config-4.14 similarity index 90% rename from target/linux/omap/config-4.4 rename to target/linux/omap/config-4.14 index ed1cdc643..bfff0a76a 100644 --- a/target/linux/omap/config-4.4 +++ b/target/linux/omap/config-4.14 @@ -1,8 +1,7 @@ CONFIG_ALIGNMENT_TRAP=y CONFIG_AM335X_CONTROL_USB=y CONFIG_AM335X_PHY_USB=y -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y CONFIG_ARCH_HAS_BANDGAP=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y @@ -23,7 +22,6 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_ARCH_OMAP2PLUS_TYPICAL=y CONFIG_ARCH_OMAP3=y CONFIG_ARCH_OMAP4=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y @@ -33,13 +31,13 @@ CONFIG_ARCH_USE_BUILTIN_BSWAP=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y CONFIG_ARM=y CONFIG_ARM_APPENDED_DTB=y CONFIG_ARM_ATAG_DTB_COMPAT=y # CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_ERRATA_430973=y CONFIG_ARM_ERRATA_720789=y CONFIG_ARM_ERRATA_754322=y CONFIG_ARM_ERRATA_775420=y @@ -50,6 +48,8 @@ CONFIG_ARM_L1_CACHE_SHIFT=6 CONFIG_ARM_L1_CACHE_SHIFT_6=y # CONFIG_ARM_LPAE is not set CONFIG_ARM_OMAP2PLUS_CPUFREQ=y +CONFIG_ARM_TI_CPUFREQ=y +CONFIG_ARM_PATCH_IDIV=y CONFIG_ARM_PATCH_PHYS_VIRT=y CONFIG_ARM_THUMB=y CONFIG_ARM_THUMBEE=y @@ -58,8 +58,10 @@ CONFIG_ASSOCIATIVE_ARRAY=y CONFIG_AT803X_PHY=y CONFIG_ATA=y CONFIG_AUDIT=y -# CONFIG_AUDITSYSCALL is not set +CONFIG_AUDITSYSCALL=y CONFIG_AUDIT_GENERIC=y +CONFIG_AUDIT_TREE=y +CONFIG_AUDIT_WATCH=y CONFIG_AUTO_ZRELADDR=y CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_LCD_SUPPORT=y @@ -82,7 +84,7 @@ CONFIG_CLKSRC_MMIO=y CONFIG_CLKSRC_OF=y CONFIG_CLKSRC_PROBE=y CONFIG_CLKSRC_TI_32K=y -# CONFIG_CLK_TWL6040 is not set +CONFIG_CLK_TWL6040=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMA=y CONFIG_CMA_ALIGNMENT=8 @@ -97,9 +99,11 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y CONFIG_CMDLINE="root=/dev/mmcblk0p2 rootwait console=ttyO2,115200" CONFIG_COMMON_CLK=y # CONFIG_COMMON_CLK_PALMAS is not set +# CONFIG_COMMON_CLK_TI_ADPLL is not set CONFIG_CONFIGFS_FS=y CONFIG_CONNECTOR=y CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y CONFIG_CPU_32v6K=y CONFIG_CPU_32v7=y CONFIG_CPU_ABRT_EV7=y @@ -112,6 +116,7 @@ CONFIG_CPU_CP15_MMU=y CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_GOV_ATTR_SET=y CONFIG_CPU_FREQ_GOV_COMMON=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y @@ -139,23 +144,36 @@ CONFIG_CRC_ITU_T=y CONFIG_CRC_T10DIF=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_CBC=y CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CTR=y CONFIG_CRYPTO_DEFLATE=y CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_OMAP=y CONFIG_CRYPTO_DEV_OMAP_AES=y CONFIG_CRYPTO_DEV_OMAP_DES=y CONFIG_CRYPTO_DEV_OMAP_SHAM=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_ENGINE=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_HMAC=y CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_LZO=y CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_NULL=y CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_SEQIV=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_SHA256=y CONFIG_CRYPTO_SHA512=y @@ -170,20 +188,6 @@ CONFIG_DEBUG_MUTEXES=y CONFIG_DEBUG_SPINLOCK=y # CONFIG_DEBUG_UART_8250 is not set # CONFIG_DEBUG_USER is not set -CONFIG_DISPLAY_CONNECTOR_ANALOG_TV=y -CONFIG_DISPLAY_CONNECTOR_DVI=y -CONFIG_DISPLAY_CONNECTOR_HDMI=y -# CONFIG_DISPLAY_ENCODER_OPA362 is not set -CONFIG_DISPLAY_ENCODER_TFP410=y -CONFIG_DISPLAY_ENCODER_TPD12S015=y -CONFIG_DISPLAY_PANEL_DPI=y -CONFIG_DISPLAY_PANEL_DSI_CM=y -CONFIG_DISPLAY_PANEL_LGPHILIPS_LB035Q02=y -CONFIG_DISPLAY_PANEL_NEC_NL8048HL11=y -CONFIG_DISPLAY_PANEL_SHARP_LS037V7DW01=y -CONFIG_DISPLAY_PANEL_SONY_ACX565AKM=y -CONFIG_DISPLAY_PANEL_TPO_TD028TTEC1=y -CONFIG_DISPLAY_PANEL_TPO_TD043MTEA1=y CONFIG_DM9000=y # CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set CONFIG_DMADEVICES=y @@ -191,8 +195,30 @@ CONFIG_DMA_CMA=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y CONFIG_DMA_OMAP=y +CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DNS_RESOLVER=y +CONFIG_DRM=y +CONFIG_DRM_BRIDGE=y +CONFIG_DRM_KMS_HELPER=y +CONFIG_DRM_OMAP=y +CONFIG_DRM_OMAP_CONNECTOR_ANALOG_TV=y +CONFIG_DRM_OMAP_CONNECTOR_DVI=y +CONFIG_DRM_OMAP_CONNECTOR_HDMI=y +# CONFIG_DRM_OMAP_ENCODER_OPA362 is not set +CONFIG_DRM_OMAP_ENCODER_TFP410=y +CONFIG_DRM_OMAP_ENCODER_TPD12S015=y +CONFIG_DRM_OMAP_NUM_CRTCS=1 +CONFIG_DRM_OMAP_PANEL_DPI=y +CONFIG_DRM_OMAP_PANEL_DSI_CM=y +# CONFIG_DRM_PANEL_LVDS is not set +# CONFIG_DRM_PANEL_SITRONIX_ST7789V is not set +CONFIG_DRM_OMAP_PANEL_LGPHILIPS_LB035Q02=y +CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=y +CONFIG_DRM_OMAP_PANEL_SHARP_LS037V7DW01=y +CONFIG_DRM_OMAP_PANEL_SONY_ACX565AKM=y +CONFIG_DRM_OMAP_PANEL_TPO_TD028TTEC1=y +CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1=y CONFIG_DTC=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y @@ -208,7 +234,9 @@ CONFIG_EXTCON_PALMAS=y CONFIG_EXTCON_USB_GPIO=y CONFIG_FANOTIFY=y CONFIG_FAT_FS=y +CONFIG_FB_CMDLINE=y CONFIG_FHANDLE=y +CONFIG_FIXED_PHY=y CONFIG_FIX_EARLYCON_MEM=y CONFIG_FRAME_POINTER=y CONFIG_FS_MBCACHE=y @@ -217,6 +245,7 @@ CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_BUG=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_IDLE_POLL_SETUP=y CONFIG_GENERIC_IO=y CONFIG_GENERIC_IRQ_CHIP=y @@ -232,13 +261,13 @@ CONFIG_GENERIC_STRNLEN_USER=y CONFIG_GLOB=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_DEVRES=y CONFIG_GPIO_OMAP=y CONFIG_GPIO_PALMAS=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_PCF857X=y CONFIG_GPIO_SYSFS=y +# CONFIG_GPIO_TPS65218 is not set CONFIG_GPIO_TPS65910=y CONFIG_GPIO_TWL4030=y CONFIG_GPIO_TWL6040=y @@ -257,9 +286,10 @@ CONFIG_HAVE_ARCH_PFN_VALID=y CONFIG_HAVE_ARCH_SECCOMP_FILTER=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_ARM_SCU=y +CONFIG_HAVE_ARM_SMCCC=y CONFIG_HAVE_ARM_TWD=y # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_BPF_JIT=y +CONFIG_HAVE_CBPF_JIT=y CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y @@ -267,7 +297,6 @@ CONFIG_HAVE_CONTEXT_TRACKING=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y @@ -299,6 +328,7 @@ CONFIG_HSI_BOARDINFO=y CONFIG_HWMON=y CONFIG_HZ_FIXED=0 CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=y CONFIG_I2C_OMAP=y @@ -341,11 +371,9 @@ CONFIG_LOCKDEP=y CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y -# CONFIG_MACH_NOKIA_RX51 is not set # CONFIG_MACH_OMAP3517EVM is not set # CONFIG_MACH_OMAP3_PANDORA is not set CONFIG_MACH_OMAP_GENERIC=y -# CONFIG_MACH_OMAP_LDP is not set CONFIG_MAGIC_SYSRQ=y CONFIG_MDIO_BOARDINFO=y CONFIG_MEMORY=y @@ -395,26 +423,10 @@ CONFIG_MULTI_IRQ_HANDLER=y # CONFIG_MUSB_PIO_ONLY is not set CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEON=y -# CONFIG_NET_CADENCE is not set CONFIG_NET_FLOW_LIMIT=y CONFIG_NET_KEY=y CONFIG_NET_KEY_MIGRATE=y CONFIG_NET_PTP_CLASSIFY=y -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CIRRUS is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_HISILICON is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICROCHIP is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -# CONFIG_NET_VENDOR_QUALCOMM is not set -# CONFIG_NET_VENDOR_SAMSUNG is not set -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_FS=y CONFIG_NFS_USE_KERNEL_DNS=y @@ -437,7 +449,6 @@ CONFIG_OF_FLATTREE=y CONFIG_OF_GPIO=y CONFIG_OF_IRQ=y CONFIG_OF_MDIO=y -CONFIG_OF_MTD=y CONFIG_OF_NET=y CONFIG_OF_RESERVED_MEM=y CONFIG_OID_REGISTRY=y @@ -481,7 +492,6 @@ CONFIG_OUTER_CACHE=y CONFIG_OUTER_CACHE_SYNC=y CONFIG_PADATA=y CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PCI is not set # CONFIG_PCI_DOMAINS_GENERIC is not set # CONFIG_PCI_SYSCALL is not set CONFIG_PERF_USE_VMALLOC=y @@ -514,6 +524,7 @@ CONFIG_PROVE_LOCKING=y CONFIG_PROVE_RCU=y CONFIG_PTP_1588_CLOCK=y CONFIG_PWM=y +# CONFIG_PWM_OMAP_DMTIMER is not set CONFIG_PWM_SYSFS=y CONFIG_PWM_TIECAP=y CONFIG_PWM_TIEHRPWM=y @@ -556,9 +567,12 @@ CONFIG_RTC_DRV_OMAP=y CONFIG_RTC_DRV_PALMAS=y # CONFIG_RTC_DRV_TPS65910 is not set CONFIG_RTC_DRV_TWL4030=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_AHCI_DM816 is not set CONFIG_SCHEDSTATS=y CONFIG_SCHED_INFO=y CONFIG_SCHED_MC=y @@ -583,6 +597,8 @@ CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_OMAP=y CONFIG_SERIAL_OMAP_CONSOLE=y CONFIG_SERIO=y +CONFIG_SG_POOL=y +CONFIG_SG_SPLIT=y CONFIG_SMC91X=y CONFIG_SMP=y CONFIG_SMP_ON_UP=y @@ -593,7 +609,7 @@ CONFIG_SND=y # CONFIG_SND_COMPRESS_OFFLOAD is not set CONFIG_SND_DAVINCI_SOC_MCASP=y CONFIG_SND_DMAENGINE_PCM=y -# CONFIG_SND_EDMA_SOC is not set +CONFIG_SND_JACK=y CONFIG_SND_MIXER_OSS=y CONFIG_SND_OMAP_SOC=y CONFIG_SND_OMAP_SOC_DMIC=y @@ -606,6 +622,7 @@ CONFIG_SND_OMAP_SOC_OMAP_TWL4030=y CONFIG_SND_PCM=y CONFIG_SND_PCM_OSS=y CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_SIMPLE_CARD_UTILS=y CONFIG_SND_SOC=y CONFIG_SND_SOC_DMIC=y CONFIG_SND_SOC_I2C_AND_SPI=y @@ -633,10 +650,12 @@ CONFIG_STACKTRACE=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=y CONFIG_SWIOTLB=y +CONFIG_SWPHY=y CONFIG_SWP_EMULATE=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_THERMAL=y CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 CONFIG_THERMAL_GOV_FAIR_SHARE=y CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THERMAL_GOV_USER_SPACE=y @@ -675,7 +694,6 @@ CONFIG_UBIFS_FS_ZLIB=y CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" CONFIG_UNINLINE_SPIN_UNLOCK=y CONFIG_USB=y -# CONFIG_USB_AUDIO is not set CONFIG_USB_COMMON=y CONFIG_USB_DWC3=y CONFIG_USB_DWC3_DUAL_ROLE=y @@ -685,7 +703,6 @@ CONFIG_USB_DWC3_OMAP=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD_OMAP=y # CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_ETH is not set CONFIG_USB_GADGET=y CONFIG_USB_INVENTRA_DMA=y CONFIG_USB_MUSB_AM335X_CHILD=y @@ -717,4 +734,3 @@ CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZLIB_DEFLATE=y CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/omap/patches-4.4/001-omap4_pandaboard-wlan_fix.patch b/target/linux/omap/patches-4.4/001-omap4_pandaboard-wlan_fix.patch deleted file mode 100644 index 5a6f76fd1..000000000 --- a/target/linux/omap/patches-4.4/001-omap4_pandaboard-wlan_fix.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/arm/mach-omap2/twl-common.c -+++ b/arch/arm/mach-omap2/twl-common.c -@@ -368,6 +368,7 @@ static struct regulator_init_data omap4_ - static struct regulator_init_data omap4_clk32kg_idata = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, -+ .always_on = true, - }, - }; - diff --git a/target/linux/orion/config-4.4 b/target/linux/orion/config-4.4 deleted file mode 100644 index 4b39639d5..000000000 --- a/target/linux/orion/config-4.4 +++ /dev/null @@ -1,244 +0,0 @@ -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -# CONFIG_ARCH_HAS_SG_CHAIN is not set -CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_ORION5X=y -# CONFIG_ARCH_ORION5X_DT is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARM=y -# CONFIG_ARM_CPU_SUSPEND is not set -CONFIG_ARM_L1_CACHE_SHIFT=5 -CONFIG_ARM_PATCH_PHYS_VIRT=y -# CONFIG_ARM_THUMB is not set -CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -# CONFIG_CACHE_L2X0 is not set -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200 earlyprintk" -CONFIG_CMDLINE_FORCE=y -CONFIG_COMMON_CLK=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5T=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_FEROCEON=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FEROCEON=y -CONFIG_CPU_FEROCEON_OLD_ID=y -# CONFIG_CPU_ICACHE_DISABLE is not set -CONFIG_CPU_PABRT_LEGACY=y -CONFIG_CPU_TLB_FEROCEON=y -CONFIG_CPU_USE_DOMAINS=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_DEV_MARVELL_CESA=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" -CONFIG_DEBUG_LL_UART_8250=y -CONFIG_DEBUG_UART_8250=y -# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set -CONFIG_DEBUG_UART_8250_SHIFT=2 -# CONFIG_DEBUG_UART_8250_WORD is not set -CONFIG_DEBUG_UART_PHYS=0xf1012000 -CONFIG_DEBUG_UART_VIRT=0xfe012000 -# CONFIG_DEBUG_USER is not set -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_ENGINE_RAID=y -CONFIG_DMA_OF=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FRAME_POINTER=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_DEVRES=y -CONFIG_GPIO_MVEBU=y -CONFIG_GPIO_SYSFS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -# CONFIG_HAVE_ARCH_BITREVERSE is not set -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_PFN_VALID=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_BPF_JIT=y -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_PROC_CPU=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_MV64XXX=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IOMMU_HELPER=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_LEDS_GPIO=y -CONFIG_LIBFDT=y -# CONFIG_MACH_D2NET_DT is not set -# CONFIG_MACH_DB88F5281 is not set -# CONFIG_MACH_DNS323 is not set -# CONFIG_MACH_DT2 is not set -# CONFIG_MACH_KUROBOX_PRO is not set -# CONFIG_MACH_LINKSTATION_LSCHL is not set -# CONFIG_MACH_LINKSTATION_LS_HGL is not set -# CONFIG_MACH_LINKSTATION_MINI is not set -# CONFIG_MACH_LINKSTATION_PRO is not set -# CONFIG_MACH_MSS2_DT is not set -# CONFIG_MACH_MV2120 is not set -# CONFIG_MACH_NET2BIG is not set -# CONFIG_MACH_RD88F5181L_FXO is not set -# CONFIG_MACH_RD88F5181L_GE is not set -# CONFIG_MACH_RD88F5182 is not set -# CONFIG_MACH_RD88F5182_DT is not set -# CONFIG_MACH_RD88F6183AP_GE is not set -CONFIG_MACH_TERASTATION_PRO2=y -# CONFIG_MACH_TS209 is not set -# CONFIG_MACH_TS409 is not set -# CONFIG_MACH_TS78XX is not set -CONFIG_MACH_WN802T=y -CONFIG_MACH_WNR854T=y -CONFIG_MACH_WRT350N_V2=y -CONFIG_MDIO_BOARDINFO=y -CONFIG_MMC=y -CONFIG_MMC_MVSDIO=y -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MULTI_IRQ_HANDLER=y -CONFIG_MV643XX_ETH=y -CONFIG_MVEBU_MBUS=y -CONFIG_MVMDIO=y -# CONFIG_MVNETA is not set -CONFIG_MV_XOR=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_KUSER_HELPERS=y -CONFIG_NEED_PER_CPU_KM=y -# CONFIG_NET_VENDOR_AURORA is not set -CONFIG_NO_BOOTMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_ADDRESS_PCI=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_MDIO=y -CONFIG_OF_MTD=y -CONFIG_OF_NET=y -CONFIG_OF_PCI=y -CONFIG_OF_PCI_IRQ=y -CONFIG_OF_RESERVED_MEM=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_ORION_WATCHDOG=y -CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PCI=y -# CONFIG_PCI_DOMAINS_GENERIC is not set -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PLAT_ORION=y -CONFIG_PLAT_ORION_LEGACY=y -CONFIG_RATIONAL=y -# CONFIG_RCU_EXPERT is not set -# CONFIG_RCU_STALL_COMMON is not set -CONFIG_RTC_CLASS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCHED_INFO is not set -# CONFIG_SCSI_DMA is not set -CONFIG_SERIAL_8250_FSL=y -CONFIG_SPLIT_PTLOCK_CPUS=999999 -CONFIG_SRAM=y -CONFIG_SRCU=y -CONFIG_SWIOTLB=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h" -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y -CONFIG_VECTORS_BASE=0xffff0000 -# CONFIG_VFP is not set -CONFIG_WATCHDOG_CORE=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/orion/patches-4.4/000-arm_openwrt_machtypes.patch b/target/linux/orion/patches-4.4/000-arm_openwrt_machtypes.patch deleted file mode 100644 index 764f99228..000000000 --- a/target/linux/orion/patches-4.4/000-arm_openwrt_machtypes.patch +++ /dev/null @@ -1,8 +0,0 @@ ---- a/arch/arm/tools/mach-types -+++ b/arch/arm/tools/mach-types -@@ -1006,3 +1006,5 @@ eco5_bx2 MACH_ECO5_BX2 ECO5_BX2 4572 - eukrea_cpuimx28sd MACH_EUKREA_CPUIMX28SD EUKREA_CPUIMX28SD 4573 - domotab MACH_DOMOTAB DOMOTAB 4574 - pfla03 MACH_PFLA03 PFLA03 4575 -+dt2 MACH_DT2 DT2 1514 -+wn802t MACH_WN802T WN802T 3306 diff --git a/target/linux/orion/patches-4.4/100-wrt350nv2_openwrt_partition_map.patch b/target/linux/orion/patches-4.4/100-wrt350nv2_openwrt_partition_map.patch deleted file mode 100644 index 89c2c9420..000000000 --- a/target/linux/orion/patches-4.4/100-wrt350nv2_openwrt_partition_map.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c -+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c -@@ -134,11 +134,11 @@ static struct mtd_partition wrt350n_v2_n - { - .name = "kernel", - .offset = 0x00000000, -- .size = 0x00760000, -+ .size = 0x00140000, // change to kernel mtd size here (1/3) - }, { - .name = "rootfs", -- .offset = 0x001a0000, -- .size = 0x005c0000, -+ .offset = 0x00140000, // change to kernel mtd size here (2/3) -+ .size = 0x00610000, // adopt to kernel mtd size here (3/3) = 0x00750000 - - }, { - .name = "lang", - .offset = 0x00760000, -@@ -151,6 +151,14 @@ static struct mtd_partition wrt350n_v2_n - .name = "u-boot", - .offset = 0x007c0000, - .size = 0x00040000, -+ }, { -+ .name = "eRcOmM_do_not_touch", -+ .offset = 0x00750000, -+ .size = 0x00010000, // erasesize -+ }, { -+ .name = "image", // for sysupgrade -+ .offset = 0x00000000, -+ .size = 0x00750000, - }, - }; - diff --git a/target/linux/orion/patches-4.4/101-wnr854t_partition_map.patch b/target/linux/orion/patches-4.4/101-wnr854t_partition_map.patch deleted file mode 100644 index 881cfb773..000000000 --- a/target/linux/orion/patches-4.4/101-wnr854t_partition_map.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/arch/arm/mach-orion5x/wnr854t-setup.c -+++ b/arch/arm/mach-orion5x/wnr854t-setup.c -@@ -57,15 +57,19 @@ static struct mtd_partition wnr854t_nor_ - { - .name = "kernel", - .offset = 0x00000000, -- .size = 0x00100000, -+ .size = 0x00140000, - }, { - .name = "rootfs", -- .offset = 0x00100000, -- .size = 0x00660000, -+ .offset = 0x00140000, -+ .size = 0x00620000, - }, { - .name = "uboot", - .offset = 0x00760000, - .size = 0x00040000, -+ }, { -+ .name = "image", // for sysupgrade -+ .offset = 0x00000000, -+ .size = 0x00760000, - }, - }; - diff --git a/target/linux/orion/patches-4.4/200-dt2_board_support.patch b/target/linux/orion/patches-4.4/200-dt2_board_support.patch deleted file mode 100644 index 3d2efffe6..000000000 --- a/target/linux/orion/patches-4.4/200-dt2_board_support.patch +++ /dev/null @@ -1,570 +0,0 @@ -Index: linux-3.18.43/arch/arm/mach-orion5x/Kconfig -=================================================================== ---- linux-3.18.43.orig/arch/arm/mach-orion5x/Kconfig -+++ linux-3.18.43/arch/arm/mach-orion5x/Kconfig -@@ -36,6 +36,13 @@ config MACH_RD88F5182_DT - Say 'Y' here if you want your kernel to support the Marvell - Orion-NAS (88F5182) RD2, Flattened Device Tree. - -+config MACH_DT2 -+ bool "Freecom DataTank Gateway" -+ select I2C_BOARDINFO -+ help -+ Say 'Y' here if you want your kernel to support the -+ Freecom DataTank Gateway -+ - config MACH_KUROBOX_PRO - bool "KuroBox Pro" - select I2C_BOARDINFO -Index: linux-3.18.43/arch/arm/mach-orion5x/Makefile -=================================================================== ---- linux-3.18.43.orig/arch/arm/mach-orion5x/Makefile -+++ linux-3.18.43/arch/arm/mach-orion5x/Makefile -@@ -14,6 +14,7 @@ obj-$(CONFIG_MACH_TS78XX) += ts78xx-setu - obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o - obj-$(CONFIG_MACH_NET2BIG) += net2big-setup.o - obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o -+obj-$(CONFIG_MACH_DT2) += dt2-setup.o - obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o - obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o - obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o -Index: linux-3.18.43/arch/arm/mach-orion5x/dt2-common.h -=================================================================== ---- /dev/null -+++ linux-3.18.43/arch/arm/mach-orion5x/dt2-common.h -@@ -0,0 +1,82 @@ -+#ifndef __INC_DT2_COMMON_H -+#define __INC_DT2_COMMON_H -+ -+#define ATAG_MV_UBOOT 0x41000403 -+ -+struct tag_mv_uboot { -+ u32 uboot_version; -+ u32 tclk; -+ u32 sysclk; -+ u32 isUsbHost; -+ u32 overEthAddr; -+ u8 dt2_eeprom[256]; -+}; -+ -+#define DT2_EEPROM_ADDR 0x50 -+#define DT2_EEPROM_OFFSET 0 -+#define DT2_EEPROM_LENGTH 256 -+ -+#define DT2_SERIAL_NUMBER_DEFAULT "run on default\0" -+#define DT2_REVISION_DEFAULT_INIT 0xFF -+#define DT2_CONFIG_FLAGS_DEFAULT 0x00 -+ -+#define _PACKED_ __attribute__((packed)) -+ -+struct DT2_EEPROM_SD_CONFIG { -+ unsigned int ram_1; -+ unsigned int ram_2; -+ unsigned int ram_3; -+ unsigned int ram_4; -+ unsigned char ram_5; -+ unsigned char ram_6; -+ unsigned short ram_7; -+ unsigned int magic_id; -+ } _PACKED_; // 24 Bytes in total -+ -+struct DT2_EEPROM_FC_CONFIG { -+ unsigned char rtc_sts_mask; -+ unsigned char rtc_sts_init; -+ unsigned char rtc_int_mask; -+ unsigned char rtc_int_init; -+ unsigned char rtc_atrim_init; -+ unsigned char rtc_dtrim_init; -+ unsigned char dummy1; -+ unsigned char dummy2; -+ unsigned char dt2_config_flags; /* 0x80 to load rtc_values to RTC */ -+ unsigned char dt2_revision; /* upper nibble is HW, lower nibble is FW */ -+ unsigned char dt2_serial_number[16]; /* Serial number of DT-2 */ -+ } _PACKED_; // 26 Bytes in total -+ -+#define CFG_LOAD_RTC_VALUES 0x80 -+ -+struct DT2_EEPROM_GW_CONFIG { -+ unsigned int dummy1; -+ unsigned int dummy2; -+ unsigned int dummy3; -+ unsigned char dummy4; -+ unsigned char tos_video_val1; -+ unsigned char tos_video_val2; -+ unsigned char tos_voip_val; -+ unsigned char qos_igmp_cfg; -+ unsigned char num_of_ifs; -+ unsigned short vlan_ports_if[3]; -+ unsigned char mac_addr[3][6]; -+ } _PACKED_; // 42 Bytes in total -+ -+#define _SIZE_OF_ALL_STRUCTS_ (sizeof(struct DT2_EEPROM_SD_CONFIG) + sizeof(struct DT2_EEPROM_FC_CONFIG) + sizeof(struct DT2_EEPROM_GW_CONFIG)) -+ -+// MV = EEPROM - SD - FC - GW - CRC -+struct DT2_EEPROM_MV_CONFIG { -+ unsigned int reg_addr[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)]; -+ unsigned int reg_data[(DT2_EEPROM_LENGTH - _SIZE_OF_ALL_STRUCTS_ - sizeof(unsigned int)) / (sizeof(unsigned int) * 2)]; -+ } _PACKED_; -+ -+struct DT2_EEPROM_STRUCT { -+ struct DT2_EEPROM_MV_CONFIG mv; -+ struct DT2_EEPROM_SD_CONFIG sd; -+ struct DT2_EEPROM_FC_CONFIG fc; -+ struct DT2_EEPROM_GW_CONFIG gw; -+ unsigned int crc; -+ } _PACKED_; -+ -+#endif -Index: linux-3.18.43/arch/arm/mach-orion5x/dt2-setup.c -=================================================================== ---- /dev/null -+++ linux-3.18.43/arch/arm/mach-orion5x/dt2-setup.c -@@ -0,0 +1,448 @@ -+/* -+ * arch/arm/mach-orion5x/dt2-setup.c -+ * -+ * Freecom DataTank Gateway Setup -+ * -+ * Copyright (C) 2009 Zintis Petersons -+ * -+ * This file is licensed under the terms of the GNU General Public -+ * License version 2. This program is licensed "as is" without any -+ * warranty of any kind, whether express or implied. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "common.h" -+#include "mpp.h" -+ -+/***************************************************************************** -+ * DT2 local -+ ****************************************************************************/ -+#include -+#include "dt2-common.h" -+ -+u32 mvUbootVer = 0; -+u32 mvTclk = 166666667; -+u32 mvSysclk = 200000000; -+u32 mvIsUsbHost = 1; -+u32 overEthAddr = 0; -+u32 gBoardId = -1; -+struct DT2_EEPROM_STRUCT dt2_eeprom; -+ -+/***************************************************************************** -+ * DT2 Info -+ ****************************************************************************/ -+/* -+ * PCI -+ */ -+ -+#define DT2_PCI_SLOT0_OFFS 7 -+#define DT2_PCI_SLOT0_IRQ_A_PIN 3 -+#define DT2_PCI_SLOT0_IRQ_B_PIN 2 -+ -+#define DT2_PIN_GPIO_SYNC 25 -+#define DT2_PIN_GPIO_POWER 24 -+#define DT2_PIN_GPIO_UNPLUG1 23 -+#define DT2_PIN_GPIO_UNPLUG2 22 -+#define DT2_PIN_GPIO_RESET 4 -+ -+#define DT2_NOR_BOOT_BASE 0xf4000000 -+#define DT2_NOR_BOOT_SIZE SZ_512K -+ -+#define DT2_LEDS_BASE 0xfa000000 -+#define DT2_LEDS_SIZE SZ_1K -+ -+/***************************************************************************** -+ * 512K NOR Flash on Device bus Boot CS -+ ****************************************************************************/ -+ -+static struct mtd_partition dt2_partitions[] = { -+ { -+ .name = "u-boot", -+ .size = 0x00080000, -+ .offset = 0, -+ }, -+}; -+ -+static struct physmap_flash_data dt2_nor_flash_data = { -+ .width = 1, /* 8 bit bus width */ -+ .parts = dt2_partitions, -+ .nr_parts = ARRAY_SIZE(dt2_partitions) -+}; -+ -+static struct resource dt2_nor_flash_resource = { -+ .flags = IORESOURCE_MEM, -+ .start = DT2_NOR_BOOT_BASE, -+ .end = DT2_NOR_BOOT_BASE + DT2_NOR_BOOT_SIZE - 1, -+}; -+ -+static struct platform_device dt2_nor_flash = { -+ .name = "physmap-flash", -+ .id = 0, -+ .dev = { -+ .platform_data = &dt2_nor_flash_data, -+ }, -+ .resource = &dt2_nor_flash_resource, -+ .num_resources = 1, -+}; -+ -+/***************************************************************************** -+ * PCI -+ ****************************************************************************/ -+ -+void __init dt2_pci_preinit(void) -+{ -+ int pin, irq; -+ -+ /* -+ * Configure PCI GPIO IRQ pins -+ */ -+ pin = DT2_PCI_SLOT0_IRQ_A_PIN; -+ if (gpio_request(pin, "PCI IntA") == 0) { -+ if (gpio_direction_input(pin) == 0) { -+ irq = gpio_to_irq(pin); -+ irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW); -+ printk (KERN_INFO "PCI IntA IRQ: %d\n", irq); -+ } else { -+ printk(KERN_ERR "dt2_pci_preinit failed to " -+ "irq_set_irq_type pin %d\n", pin); -+ gpio_free(pin); -+ } -+ } else { -+ printk(KERN_ERR "dt2_pci_preinit failed to request gpio %d\n", pin); -+ } -+ -+ pin = DT2_PCI_SLOT0_IRQ_B_PIN; -+ if (gpio_request(pin, "PCI IntB") == 0) { -+ if (gpio_direction_input(pin) == 0) { -+ irq = gpio_to_irq(pin); -+ irq_set_irq_type(irq, IRQ_TYPE_LEVEL_LOW); -+ printk (KERN_INFO "PCI IntB IRQ: %d\n", irq); -+ } else { -+ printk(KERN_ERR "dt2_pci_preinit failed to " -+ "irq_set_irq_type pin %d\n", pin); -+ gpio_free(pin); -+ } -+ } else { -+ printk(KERN_ERR "dt2_pci_preinit failed to gpio_request %d\n", pin); -+ } -+} -+ -+static int __init dt2_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ int irq; -+ -+ /* -+ * Check for devices with hard-wired IRQs. -+ */ -+ irq = orion5x_pci_map_irq(dev, slot, pin); -+ if (irq != -1){ -+ printk(KERN_INFO "orion5x_pci_map_irq: %d\n", irq); -+ return irq; -+ } -+ -+ /* -+ * PCI IRQs are connected via GPIOs -+ */ -+ switch (slot - DT2_PCI_SLOT0_OFFS) { -+ case 0: -+ if (pin == 1){ -+ irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_A_PIN); -+ printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_A_PIN: %d\n", irq); -+ } -+ else { -+ irq = gpio_to_irq(DT2_PCI_SLOT0_IRQ_B_PIN); -+ printk(KERN_INFO "dt2_pci_map_irq DT2_PCI_SLOT0_IRQ_B_PIN: %d\n", irq); -+ } -+ default: -+ irq = -1; -+ printk(KERN_INFO "dt2_pci_map_irq IRQ: %d\n", irq); -+ } -+ -+ return irq; -+} -+ -+static struct hw_pci dt2_pci __initdata = { -+ .nr_controllers = 2, -+ .preinit = dt2_pci_preinit, -+ .setup = orion5x_pci_sys_setup, -+ .scan = orion5x_pci_sys_scan_bus, -+ .map_irq = dt2_pci_map_irq, -+}; -+ -+static int __init dt2_pci_init(void) -+{ -+ if (machine_is_dt2()) -+ pci_common_init(&dt2_pci); -+ -+ return 0; -+} -+ -+subsys_initcall(dt2_pci_init); -+ -+/***************************************************************************** -+ * Ethernet -+ ****************************************************************************/ -+ -+static struct mv643xx_eth_platform_data dt2_eth_data = { -+ .phy_addr = MV643XX_ETH_PHY_NONE, -+ .speed = SPEED_1000, -+ .duplex = DUPLEX_FULL, -+}; -+ -+static struct dsa_chip_data dt2_switch_chip_data = { -+ .port_names[0] = "wan", -+ .port_names[1] = "lan1", -+ .port_names[2] = "lan2", -+ .port_names[3] = "cpu", -+ .port_names[4] = "lan3", -+ .port_names[5] = "lan4", -+}; -+ -+static struct dsa_platform_data dt2_switch_plat_data = { -+ .nr_chips = 1, -+ .chip = &dt2_switch_chip_data, -+}; -+ -+/***************************************************************************** -+ * RTC ISL1208 on I2C bus -+ ****************************************************************************/ -+static struct i2c_board_info __initdata dt2_i2c_rtc = { -+ I2C_BOARD_INFO("isl1208", 0x6F), -+}; -+ -+/***************************************************************************** -+ * Sata -+ ****************************************************************************/ -+static struct mv_sata_platform_data dt2_sata_data = { -+ .n_ports = 2, -+}; -+ -+/***************************************************************************** -+ * General Setup -+ ****************************************************************************/ -+static unsigned int dt2_mpp_modes[] __initdata = { -+ MPP0_GPIO, // RTC interrupt -+ MPP1_GPIO, // 88e6131 interrupt -+ MPP2_GPIO, // PCI_intB -+ MPP3_GPIO, // PCI_intA -+ MPP4_GPIO, // reset button switch -+ MPP5_GPIO, -+ MPP6_GPIO, -+ MPP7_GPIO, -+ MPP8_GPIO, -+ MPP9_GIGE, /* GE_RXERR */ -+ MPP10_GPIO, // usb -+ MPP11_GPIO, // usb -+ MPP12_GIGE, // GE_TXD[4] -+ MPP13_GIGE, // GE_TXD[5] -+ MPP14_GIGE, // GE_TXD[6] -+ MPP15_GIGE, // GE_TXD[7] -+ MPP16_GIGE, // GE_RXD[4] -+ MPP17_GIGE, // GE_RXD[5] -+ MPP18_GIGE, // GE_RXD[6] -+ MPP19_GIGE, // GE_RXD[7] -+ 0, -+}; -+ -+/***************************************************************************** -+ * LEDS -+ ****************************************************************************/ -+static struct platform_device dt2_leds = { -+ .name = "dt2-led", -+ .id = -1, -+}; -+ -+/**************************************************************************** -+ * GPIO key -+ ****************************************************************************/ -+static irqreturn_t dt2_reset_handler(int irq, void *dev_id) -+{ -+ /* This is the paper-clip reset which does an emergency reboot. */ -+ printk(KERN_INFO "Restarting system.\n"); -+ machine_restart(NULL); -+ -+ /* This should never be reached. */ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t dt2_power_handler(int irq, void *dev_id) -+{ -+ printk(KERN_INFO "Shutting down system.\n"); -+ machine_power_off(); -+ return IRQ_HANDLED; -+} -+ -+static void __init dt2_init(void) -+{ -+ /* -+ * Setup basic Orion functions. Need to be called early. -+ */ -+ orion5x_init(); -+ -+ orion5x_mpp_conf(dt2_mpp_modes); -+ -+ /* -+ * Configure peripherals. -+ */ -+ -+ orion5x_uart0_init(); -+ orion5x_ehci0_init(); -+ orion5x_ehci1_init(); -+ orion5x_i2c_init(); -+ orion5x_sata_init(&dt2_sata_data); -+ orion5x_xor_init(); -+ -+ printk(KERN_INFO "U-Boot parameters:\n"); -+ printk(KERN_INFO "Sys Clk = %d, Tclk = %d, BoardID = 0x%02x\n", mvSysclk, mvTclk, gBoardId); -+ -+ printk(KERN_INFO "Serial: %s\n", dt2_eeprom.fc.dt2_serial_number); -+ printk(KERN_INFO "Revision: %016x\n", dt2_eeprom.fc.dt2_revision); -+ printk(KERN_INFO "DT2: Using MAC address %pM for port 0\n", -+ dt2_eeprom.gw.mac_addr[0]); -+ printk(KERN_INFO "DT2: Using MAC address %pM for port 1\n", -+ dt2_eeprom.gw.mac_addr[1]); -+ -+ orion5x_eth_init(&dt2_eth_data); -+ memcpy(dt2_eth_data.mac_addr, dt2_eeprom.gw.mac_addr[0], 6); -+ orion5x_eth_switch_init(&dt2_switch_plat_data, NO_IRQ); -+ -+ i2c_register_board_info(0, &dt2_i2c_rtc, 1); -+ -+ mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, -+ ORION_MBUS_DEVBUS_BOOT_ATTR, -+ DT2_NOR_BOOT_BASE, DT2_NOR_BOOT_SIZE); -+ -+ platform_device_register(&dt2_nor_flash); -+ -+ mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(0), -+ ORION_MBUS_DEVBUS_ATTR(0), -+ DT2_LEDS_BASE, DT2_LEDS_SIZE); -+ platform_device_register(&dt2_leds); -+ -+ if (request_irq(gpio_to_irq(DT2_PIN_GPIO_RESET), &dt2_reset_handler, -+ IRQF_TRIGGER_LOW, -+ "DT2: Reset button", NULL) < 0) { -+ -+ printk("DT2: Reset Button IRQ %d not available\n", -+ gpio_to_irq(DT2_PIN_GPIO_RESET)); -+ } -+ -+ if (request_irq(gpio_to_irq(DT2_PIN_GPIO_POWER), &dt2_power_handler, -+ IRQF_TRIGGER_LOW, -+ "DT2: Power button", NULL) < 0) { -+ -+ printk(KERN_DEBUG "DT2: Power Button IRQ %d not available\n", -+ gpio_to_irq(DT2_PIN_GPIO_POWER)); -+ } -+} -+ -+static int __init parse_tag_dt2_uboot(const struct tag *t) -+{ -+ struct tag_mv_uboot *mv_uboot; -+ -+ // Get pointer to our block -+ mv_uboot = (struct tag_mv_uboot*)&t->u; -+ mvTclk = mv_uboot->tclk; -+ mvSysclk = mv_uboot->sysclk; -+ mvUbootVer = mv_uboot->uboot_version; -+ mvIsUsbHost = mv_uboot->isUsbHost; -+ -+ // Some clock fixups -+ if(mvTclk == 166000000) mvTclk = 166666667; -+ else if(mvTclk == 133000000) mvTclk = 133333333; -+ else if(mvSysclk == 166000000) mvSysclk = 166666667; -+ -+ gBoardId = (mvUbootVer & 0xff); -+ -+ //DT2 specific data -+ memcpy(&dt2_eeprom, mv_uboot->dt2_eeprom, sizeof(struct DT2_EEPROM_STRUCT)); -+ -+ return 0; -+} -+__tagtable(ATAG_MV_UBOOT, parse_tag_dt2_uboot); -+ -+/* -+ * This is OpenWrt specific fixup. It includes code from original "tag_fixup_mem32" to -+ * fixup bogus memory tags and also fixes kernel cmdline by adding " init=/etc/preinit" -+ * at the end. It is important to flash OpenWrt image from original Freecom firmware. -+ * -+ * Vanilla kernel should use "tag_fixup_mem32" function. -+ */ -+static void __init openwrt_fixup(struct tag *t, char **from) -+{ -+ char *p = NULL; -+ static char openwrt_init_tag[] __initdata = " init=/etc/preinit"; -+ -+ for (; t->hdr.size; t = tag_next(t)){ -+ /* Locate the Freecom cmdline */ -+ if (t->hdr.tag == ATAG_CMDLINE) { -+ p = t->u.cmdline.cmdline; -+ printk("%s(%d): Found cmdline '%s' at 0x%0lx\n", -+ __FUNCTION__, __LINE__, p, (unsigned long)p); -+ } -+ /* -+ * Many orion-based systems have buggy bootloader implementations. -+ * This is a common fixup for bogus memory tags. -+ */ -+ if (t->hdr.tag == ATAG_MEM && -+ (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK || -+ t->u.mem.start & ~PAGE_MASK)) { -+ printk(KERN_WARNING -+ "Clearing invalid memory bank %dKB@0x%08x\n", -+ t->u.mem.size / 1024, t->u.mem.start); -+ t->hdr.tag = 0; -+ } -+ } -+ -+ printk("%s(%d): End of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t); -+ -+ /* Overwrite the end of the table with a new cmdline tag. */ -+ t->hdr.tag = ATAG_CMDLINE; -+ t->hdr.size = -+ (sizeof (struct tag_header) + -+ strlen(p) + strlen(openwrt_init_tag) + 1 + 4) >> 2; -+ -+ strlcpy(t->u.cmdline.cmdline, p, COMMAND_LINE_SIZE); -+ strlcpy(t->u.cmdline.cmdline + strlen(p), openwrt_init_tag, -+ COMMAND_LINE_SIZE - strlen(p)); -+ -+ printk("%s(%d): New cmdline '%s' at 0x%0lx\n", -+ __FUNCTION__, __LINE__, -+ t->u.cmdline.cmdline, (unsigned long)t->u.cmdline.cmdline); -+ -+ t = tag_next(t); -+ -+ printk("%s(%d): New end of table at 0x%0lx\n", __FUNCTION__, __LINE__, (unsigned long)t); -+ -+ t->hdr.tag = ATAG_NONE; -+ t->hdr.size = 0; -+} -+ -+/* Warning: Freecom uses their own custom bootloader with mach-type (=1500) */ -+MACHINE_START(DT2, "Freecom DataTank Gateway") -+ /* Maintainer: Zintis Petersons */ -+ .atag_offset = 0x100, -+ .init_machine = dt2_init, -+ .map_io = orion5x_map_io, -+ .init_irq = orion5x_init_irq, -+ .init_time = orion5x_timer_init, -+ .fixup = openwrt_fixup, //tag_fixup_mem32, -+MACHINE_END diff --git a/target/linux/orion/patches-4.4/210-wn802t_support.patch b/target/linux/orion/patches-4.4/210-wn802t_support.patch deleted file mode 100644 index e7827edd2..000000000 --- a/target/linux/orion/patches-4.4/210-wn802t_support.patch +++ /dev/null @@ -1,75 +0,0 @@ ---- a/arch/arm/mach-orion5x/Kconfig -+++ b/arch/arm/mach-orion5x/Kconfig -@@ -147,10 +147,13 @@ config MACH_MSS2_DT - Maxtor Shared Storage II platform. - - config MACH_WNR854T -- bool "Netgear WNR854T" -+ bool "Netgear WNR854T / WN802T" - help - Say 'Y' here if you want your kernel to support the -- Netgear WNR854T platform. -+ Netgear WNR854T or WN802T platform. -+ -+config MACH_WN802T -+ def_bool MACH_WNR854T - - config MACH_RD88F5181L_GE - bool "Marvell Orion-VoIP GE Reference Design" ---- a/arch/arm/mach-orion5x/wnr854t-setup.c -+++ b/arch/arm/mach-orion5x/wnr854t-setup.c -@@ -115,6 +115,15 @@ static struct dsa_platform_data wnr854t_ - .chip = &wnr854t_switch_chip_data, - }; - -+static struct dsa_chip_data wn802t_switch_chip_data = { -+ .port_names[2] = "wan", -+ .port_names[3] = "cpu", -+}; -+ -+static struct dsa_platform_data wn802t_switch_plat_data = { -+ .nr_chips = 1, -+ .chip = &wn802t_switch_chip_data, -+}; - static void __init wnr854t_init(void) - { - /* -@@ -128,7 +137,12 @@ static void __init wnr854t_init(void) - * Configure peripherals. - */ - orion5x_eth_init(&wnr854t_eth_data); -- orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ); -+ -+ if (machine_is_wn802t()) -+ orion5x_eth_switch_init(&wn802t_switch_plat_data, NO_IRQ); -+ else -+ orion5x_eth_switch_init(&wnr854t_switch_plat_data, NO_IRQ); -+ - orion5x_uart0_init(); - - mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET, -@@ -168,7 +182,7 @@ static struct hw_pci wnr854t_pci __initd - - static int __init wnr854t_pci_init(void) - { -- if (machine_is_wnr854t()) -+ if (machine_is_wnr854t() || machine_is_wn802t()) - pci_common_init(&wnr854t_pci); - - return 0; -@@ -186,3 +200,15 @@ MACHINE_START(WNR854T, "Netgear WNR854T" - .fixup = tag_fixup_mem32, - .restart = orion5x_restart, - MACHINE_END -+ -+MACHINE_START(WN802T, "Netgear WN802T") -+ /* Maintainer: Imre Kaloz */ -+ .atag_offset = 0x100, -+ .init_machine = wnr854t_init, -+ .map_io = orion5x_map_io, -+ .init_early = orion5x_init_early, -+ .init_irq = orion5x_init_irq, -+ .init_time = orion5x_timer_init, -+ .fixup = tag_fixup_mem32, -+ .restart = orion5x_restart, -+MACHINE_END diff --git a/target/linux/oxnas/base-files/lib/upgrade/platform.sh b/target/linux/oxnas/base-files/lib/upgrade/platform.sh index 6652e14f1..059d75f9a 100644 --- a/target/linux/oxnas/base-files/lib/upgrade/platform.sh +++ b/target/linux/oxnas/base-files/lib/upgrade/platform.sh @@ -13,16 +13,6 @@ platform_check_image() { return $? } -platform_pre_upgrade() { +platform_do_upgrade() { nand_do_upgrade $1 } - -disable_watchdog() { - killall watchdog - ( ps | grep -v 'grep' | grep '/dev/watchdog' ) && { - echo 'Could not disable watchdog' - return 1 - } -} - -append sysupgrade_pre_upgrade disable_watchdog diff --git a/target/linux/oxnas/patches-4.4/0072-mtd-backport-v4.7-0day-patches-from-Boris.patch b/target/linux/oxnas/patches-4.4/0072-mtd-backport-v4.7-0day-patches-from-Boris.patch index 9f4b04447..204d6e0bc 100644 --- a/target/linux/oxnas/patches-4.4/0072-mtd-backport-v4.7-0day-patches-from-Boris.patch +++ b/target/linux/oxnas/patches-4.4/0072-mtd-backport-v4.7-0day-patches-from-Boris.patch @@ -2335,16 +2335,16 @@ Signed-off-by: John Crispin oob, ops, toread); oobreadlen -= toread; } -@@ -2024,7 +2078,7 @@ static int nand_do_read_oob(struct mtd_i - struct mtd_oob_ops *ops) +@@ -2025,7 +2079,7 @@ static int nand_do_read_oob(struct mtd_i { + unsigned int max_bitflips = 0; int page, realpage, chipnr; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mtd_ecc_stats stats; int readlen = ops->ooblen; int len; -@@ -2036,10 +2090,7 @@ static int nand_do_read_oob(struct mtd_i +@@ -2037,10 +2091,7 @@ static int nand_do_read_oob(struct mtd_i stats = mtd->ecc_stats; @@ -2356,7 +2356,7 @@ Signed-off-by: John Crispin if (unlikely(ops->ooboffs >= len)) { pr_debug("%s: attempt to start read outside oob\n", -@@ -2073,7 +2124,7 @@ static int nand_do_read_oob(struct mtd_i +@@ -2074,7 +2125,7 @@ static int nand_do_read_oob(struct mtd_i break; len = min(len, readlen); @@ -2365,7 +2365,7 @@ Signed-off-by: John Crispin if (chip->options & NAND_NEED_READRDY) { /* Apply delay or wait for ready/busy pin */ -@@ -2232,19 +2283,20 @@ static int nand_write_page_swecc(struct +@@ -2235,19 +2286,20 @@ static int nand_write_page_swecc(struct const uint8_t *buf, int oob_required, int page) { @@ -2390,7 +2390,7 @@ Signed-off-by: John Crispin return chip->ecc.write_page_raw(mtd, chip, buf, 1, page); } -@@ -2261,12 +2313,11 @@ static int nand_write_page_hwecc(struct +@@ -2264,12 +2316,11 @@ static int nand_write_page_hwecc(struct const uint8_t *buf, int oob_required, int page) { @@ -2404,7 +2404,7 @@ Signed-off-by: John Crispin for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { chip->ecc.hwctl(mtd, NAND_ECC_WRITE); -@@ -2274,8 +2325,10 @@ static int nand_write_page_hwecc(struct +@@ -2277,8 +2328,10 @@ static int nand_write_page_hwecc(struct chip->ecc.calculate(mtd, p, &ecc_calc[i]); } @@ -2417,7 +2417,7 @@ Signed-off-by: John Crispin chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); -@@ -2303,11 +2356,10 @@ static int nand_write_subpage_hwecc(stru +@@ -2306,11 +2359,10 @@ static int nand_write_subpage_hwecc(stru int ecc_size = chip->ecc.size; int ecc_bytes = chip->ecc.bytes; int ecc_steps = chip->ecc.steps; @@ -2430,7 +2430,7 @@ Signed-off-by: John Crispin for (step = 0; step < ecc_steps; step++) { /* configure controller for WRITE access */ -@@ -2335,8 +2387,10 @@ static int nand_write_subpage_hwecc(stru +@@ -2338,8 +2390,10 @@ static int nand_write_subpage_hwecc(stru /* copy calculated ECC for whole page to chip->buffer->oob */ /* this include masked-value(0xFF) for unwritten subpages */ ecc_calc = chip->buffers->ecccalc; @@ -2443,7 +2443,7 @@ Signed-off-by: John Crispin /* write OOB buffer to NAND device */ chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); -@@ -2472,7 +2526,8 @@ static int nand_write_page(struct mtd_in +@@ -2475,7 +2529,8 @@ static int nand_write_page(struct mtd_in static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len, struct mtd_oob_ops *ops) { @@ -2453,7 +2453,7 @@ Signed-off-by: John Crispin /* * Initialise to all 0xFF, to avoid the possibility of left over OOB -@@ -2487,31 +2542,12 @@ static uint8_t *nand_fill_oob(struct mtd +@@ -2490,31 +2545,12 @@ static uint8_t *nand_fill_oob(struct mtd memcpy(chip->oob_poi + ops->ooboffs, oob, len); return oob + len; @@ -2491,7 +2491,7 @@ Signed-off-by: John Crispin default: BUG(); } -@@ -2532,12 +2568,11 @@ static int nand_do_write_ops(struct mtd_ +@@ -2535,12 +2571,11 @@ static int nand_do_write_ops(struct mtd_ struct mtd_oob_ops *ops) { int chipnr, realpage, page, blockmask, column; @@ -2506,7 +2506,7 @@ Signed-off-by: John Crispin uint8_t *oob = ops->oobbuf; uint8_t *buf = ops->datbuf; -@@ -2662,7 +2697,7 @@ err_out: +@@ -2665,7 +2700,7 @@ err_out: static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const uint8_t *buf) { @@ -2515,7 +2515,7 @@ Signed-off-by: John Crispin int chipnr = (int)(to >> chip->chip_shift); struct mtd_oob_ops ops; int ret; -@@ -2725,15 +2760,12 @@ static int nand_do_write_oob(struct mtd_ +@@ -2728,15 +2763,12 @@ static int nand_do_write_oob(struct mtd_ struct mtd_oob_ops *ops) { int chipnr, page, status, len; @@ -2533,7 +2533,7 @@ Signed-off-by: John Crispin /* Do not allow write past end of page */ if ((ops->ooboffs + ops->ooblen) > len) { -@@ -2850,7 +2882,7 @@ out: +@@ -2853,7 +2885,7 @@ out: */ static int single_erase(struct mtd_info *mtd, int page) { @@ -2542,7 +2542,7 @@ Signed-off-by: John Crispin /* Send commands to erase a block */ chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); -@@ -2882,7 +2914,7 @@ int nand_erase_nand(struct mtd_info *mtd +@@ -2885,7 +2917,7 @@ int nand_erase_nand(struct mtd_info *mtd int allowbbt) { int page, status, pages_per_block, ret, chipnr; @@ -2551,7 +2551,7 @@ Signed-off-by: John Crispin loff_t len; pr_debug("%s: start = 0x%012llx, len = %llu\n", -@@ -2921,7 +2953,7 @@ int nand_erase_nand(struct mtd_info *mtd +@@ -2924,7 +2956,7 @@ int nand_erase_nand(struct mtd_info *mtd while (len) { /* Check if we have a bad block, we do not erase bad blocks! */ if (nand_block_checkbad(mtd, ((loff_t) page) << @@ -2560,7 +2560,7 @@ Signed-off-by: John Crispin pr_warn("%s: attempt to erase a bad block at page 0x%08x\n", __func__, page); instr->state = MTD_ERASE_FAILED; -@@ -3008,7 +3040,20 @@ static void nand_sync(struct mtd_info *m +@@ -3011,7 +3043,20 @@ static void nand_sync(struct mtd_info *m */ static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) { @@ -2582,7 +2582,7 @@ Signed-off-by: John Crispin } /** -@@ -3097,7 +3142,7 @@ static int nand_suspend(struct mtd_info +@@ -3100,7 +3145,7 @@ static int nand_suspend(struct mtd_info */ static void nand_resume(struct mtd_info *mtd) { @@ -2591,7 +2591,7 @@ Signed-off-by: John Crispin if (chip->state == FL_PM_SUSPENDED) nand_release_device(mtd); -@@ -3269,7 +3314,7 @@ ext_out: +@@ -3272,7 +3317,7 @@ ext_out: static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode) { @@ -2600,7 +2600,7 @@ Signed-off-by: John Crispin uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode}; return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY, -@@ -3940,10 +3985,13 @@ ident_done: +@@ -3943,10 +3988,13 @@ ident_done: return type; } @@ -2617,7 +2617,7 @@ Signed-off-by: John Crispin if (of_get_nand_bus_width(dn) == 16) chip->options |= NAND_BUSWIDTH_16; -@@ -3952,6 +4000,7 @@ static int nand_dt_init(struct mtd_info +@@ -3955,6 +4003,7 @@ static int nand_dt_init(struct mtd_info chip->bbt_options |= NAND_BBT_USE_FLASH; ecc_mode = of_get_nand_ecc_mode(dn); @@ -2625,7 +2625,7 @@ Signed-off-by: John Crispin ecc_strength = of_get_nand_ecc_strength(dn); ecc_step = of_get_nand_ecc_step_size(dn); -@@ -3964,6 +4013,9 @@ static int nand_dt_init(struct mtd_info +@@ -3967,6 +4016,9 @@ static int nand_dt_init(struct mtd_info if (ecc_mode >= 0) chip->ecc.mode = ecc_mode; @@ -2635,7 +2635,7 @@ Signed-off-by: John Crispin if (ecc_strength >= 0) chip->ecc.strength = ecc_strength; -@@ -3987,15 +4039,16 @@ int nand_scan_ident(struct mtd_info *mtd +@@ -3990,15 +4042,16 @@ int nand_scan_ident(struct mtd_info *mtd struct nand_flash_dev *table) { int i, nand_maf_id, nand_dev_id; @@ -2658,7 +2658,7 @@ Signed-off-by: John Crispin if (!mtd->name && mtd->dev.parent) mtd->name = dev_name(mtd->dev.parent); -@@ -4058,7 +4111,7 @@ EXPORT_SYMBOL(nand_scan_ident); +@@ -4061,7 +4114,7 @@ EXPORT_SYMBOL(nand_scan_ident); */ static bool nand_ecc_strength_good(struct mtd_info *mtd) { @@ -2667,7 +2667,7 @@ Signed-off-by: John Crispin struct nand_ecc_ctrl *ecc = &chip->ecc; int corr, ds_corr; -@@ -4086,10 +4139,10 @@ static bool nand_ecc_strength_good(struc +@@ -4089,10 +4142,10 @@ static bool nand_ecc_strength_good(struc */ int nand_scan_tail(struct mtd_info *mtd) { @@ -2680,7 +2680,7 @@ Signed-off-by: John Crispin /* New bad blocks should be marked in OOB, flash-based BBT, or both */ BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && -@@ -4116,19 +4169,15 @@ int nand_scan_tail(struct mtd_info *mtd) +@@ -4119,19 +4172,15 @@ int nand_scan_tail(struct mtd_info *mtd) /* * If no default placement scheme is given, select an appropriate one. */ @@ -2703,7 +2703,7 @@ Signed-off-by: John Crispin break; default: pr_warn("No oob scheme defined for oobsize %d\n", -@@ -4171,7 +4220,7 @@ int nand_scan_tail(struct mtd_info *mtd) +@@ -4174,7 +4223,7 @@ int nand_scan_tail(struct mtd_info *mtd) ecc->write_oob = nand_write_oob_std; if (!ecc->read_subpage) ecc->read_subpage = nand_read_subpage; @@ -2712,7 +2712,7 @@ Signed-off-by: John Crispin ecc->write_subpage = nand_write_subpage_hwecc; case NAND_ECC_HW_SYNDROME: -@@ -4249,10 +4298,8 @@ int nand_scan_tail(struct mtd_info *mtd) +@@ -4252,10 +4301,8 @@ int nand_scan_tail(struct mtd_info *mtd) } /* See nand_bch_init() for details. */ @@ -2725,7 +2725,7 @@ Signed-off-by: John Crispin if (!ecc->priv) { pr_warn("BCH ECC initialization failed!\n"); BUG(); -@@ -4283,20 +4330,9 @@ int nand_scan_tail(struct mtd_info *mtd) +@@ -4286,20 +4333,9 @@ int nand_scan_tail(struct mtd_info *mtd) if (!ecc->write_oob_raw) ecc->write_oob_raw = ecc->write_oob; @@ -2749,7 +2749,7 @@ Signed-off-by: John Crispin /* * Set the number of read / write steps for one page depending on ECC -@@ -4309,6 +4345,21 @@ int nand_scan_tail(struct mtd_info *mtd) +@@ -4312,6 +4348,21 @@ int nand_scan_tail(struct mtd_info *mtd) } ecc->total = ecc->steps * ecc->bytes; @@ -2771,7 +2771,7 @@ Signed-off-by: John Crispin /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { switch (ecc->steps) { -@@ -4365,10 +4416,6 @@ int nand_scan_tail(struct mtd_info *mtd) +@@ -4368,10 +4419,6 @@ int nand_scan_tail(struct mtd_info *mtd) mtd->_block_markbad = nand_block_markbad; mtd->writebufsize = mtd->writesize; @@ -2782,7 +2782,7 @@ Signed-off-by: John Crispin /* * Initialize bitflip_threshold to its default prior scan_bbt() call. * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be -@@ -4424,7 +4471,7 @@ EXPORT_SYMBOL(nand_scan); +@@ -4427,7 +4474,7 @@ EXPORT_SYMBOL(nand_scan); */ void nand_release(struct mtd_info *mtd) { @@ -4993,7 +4993,7 @@ Signed-off-by: John Crispin /* * NAND Flash Manufacturer ID Codes */ -@@ -850,7 +911,6 @@ extern int nand_do_read(struct mtd_info +@@ -851,7 +912,6 @@ extern int nand_do_read(struct mtd_info * @chip_delay: R/B delay value in us * @options: Option flags, e.g. 16bit buswidth * @bbt_options: BBT option flags, e.g. NAND_BBT_USE_FLASH @@ -5001,7 +5001,7 @@ Signed-off-by: John Crispin * @part_probe_types: NULL-terminated array of probe types */ struct platform_nand_chip { -@@ -858,7 +918,6 @@ struct platform_nand_chip { +@@ -859,7 +919,6 @@ struct platform_nand_chip { int chip_offset; int nr_partitions; struct mtd_partition *partitions; @@ -5009,7 +5009,7 @@ Signed-off-by: John Crispin int chip_delay; unsigned int options; unsigned int bbt_options; -@@ -908,15 +967,6 @@ struct platform_nand_data { +@@ -909,15 +968,6 @@ struct platform_nand_data { struct platform_nand_ctrl ctrl; }; @@ -5142,7 +5142,7 @@ Signed-off-by: John Crispin long long offset, long long length); --- a/include/linux/mtd/sh_flctl.h +++ b/include/linux/mtd/sh_flctl.h -@@ -143,11 +143,11 @@ enum flctl_ecc_res_t { +@@ -143,7 +143,6 @@ enum flctl_ecc_res_t { struct dma_chan; struct sh_flctl { @@ -5150,12 +5150,7 @@ Signed-off-by: John Crispin struct nand_chip chip; struct platform_device *pdev; struct dev_pm_qos_request pm_qos; - void __iomem *reg; -+ resource_size_t fifo; - - uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */ - int read_bytes; -@@ -186,7 +186,7 @@ struct sh_flctl_platform_data { +@@ -187,7 +186,7 @@ struct sh_flctl_platform_data { static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo) { diff --git a/target/linux/oxnas/patches-4.4/0074-mtd-nand-import-nand_hw_control_init.patch b/target/linux/oxnas/patches-4.4/0074-mtd-nand-import-nand_hw_control_init.patch index aefcfd98a..8ff28b3bc 100644 --- a/target/linux/oxnas/patches-4.4/0074-mtd-nand-import-nand_hw_control_init.patch +++ b/target/linux/oxnas/patches-4.4/0074-mtd-nand-import-nand_hw_control_init.patch @@ -39,7 +39,7 @@ Signed-off-by: Boris Brezillon info->platform = plat; --- a/drivers/mtd/nand/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/brcmnand/brcmnand.c -@@ -2156,8 +2156,7 @@ int brcmnand_probe(struct platform_devic +@@ -2149,8 +2149,7 @@ int brcmnand_probe(struct platform_devic init_completion(&ctrl->done); init_completion(&ctrl->dma_done); @@ -87,7 +87,7 @@ Signed-off-by: Boris Brezillon } --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c -@@ -3205,8 +3205,7 @@ static void nand_set_defaults(struct nan +@@ -3208,8 +3208,7 @@ static void nand_set_defaults(struct nan if (!chip->controller) { chip->controller = &chip->hwcontrol; @@ -135,7 +135,7 @@ Signed-off-by: Boris Brezillon --- a/drivers/mtd/nand/sunxi_nand.c +++ b/drivers/mtd/nand/sunxi_nand.c -@@ -1426,8 +1426,7 @@ static int sunxi_nfc_probe(struct platfo +@@ -1432,8 +1432,7 @@ static int sunxi_nfc_probe(struct platfo return -ENOMEM; nfc->dev = dev; diff --git a/target/linux/oxnas/patches-4.4/800-oxnas-ehci.patch b/target/linux/oxnas/patches-4.4/800-oxnas-ehci.patch index 5b25afc95..7f26de6b1 100644 --- a/target/linux/oxnas/patches-4.4/800-oxnas-ehci.patch +++ b/target/linux/oxnas/patches-4.4/800-oxnas-ehci.patch @@ -1,6 +1,6 @@ --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig -@@ -313,6 +313,13 @@ config USB_OCTEON_EHCI +@@ -315,6 +315,13 @@ config USB_OCTEON_EHCI USB 2.0 device support. All CN6XXX based chips with USB are supported. diff --git a/target/linux/oxnas/patches-4.4/999-libata-hacks.patch b/target/linux/oxnas/patches-4.4/999-libata-hacks.patch index 1f4799dd8..ac278ab23 100644 --- a/target/linux/oxnas/patches-4.4/999-libata-hacks.patch +++ b/target/linux/oxnas/patches-4.4/999-libata-hacks.patch @@ -15,7 +15,7 @@ /* initialize internal qc */ /* XXX: Tag 0 is used for drivers with legacy EH as some -@@ -4787,6 +4795,9 @@ struct ata_queued_cmd *ata_qc_new_init(s +@@ -4788,6 +4796,9 @@ struct ata_queued_cmd *ata_qc_new_init(s if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) return NULL; @@ -25,7 +25,7 @@ /* libsas case */ if (ap->flags & ATA_FLAG_SAS_HOST) { tag = ata_sas_allocate_tag(ap); -@@ -4832,6 +4843,8 @@ void ata_qc_free(struct ata_queued_cmd * +@@ -4833,6 +4844,8 @@ void ata_qc_free(struct ata_queued_cmd * qc->tag = ATA_TAG_POISON; if (ap->flags & ATA_FLAG_SAS_HOST) ata_sas_free_tag(tag, ap); diff --git a/target/linux/pistachio/Makefile b/target/linux/pistachio/Makefile index 630fb56fd..dab7f0d62 100644 --- a/target/linux/pistachio/Makefile +++ b/target/linux/pistachio/Makefile @@ -14,7 +14,7 @@ CPU_TYPE:=24kc CPU_SUBTYPE:=24kf MAINTAINER:= -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/pistachio/base-files/lib/upgrade/platform.sh b/target/linux/pistachio/base-files/lib/upgrade/platform.sh index 4edc06bf9..d7d2ba065 100755 --- a/target/linux/pistachio/base-files/lib/upgrade/platform.sh +++ b/target/linux/pistachio/base-files/lib/upgrade/platform.sh @@ -18,7 +18,7 @@ platform_check_image() return $? } -platform_pre_upgrade() { +platform_do_upgrade() { # TODO no need to switch to ramfs with dual partitions in # fact we don't even want to reboot as part of seamless # upgrades. Instead just upgrade opposite partition and mark diff --git a/target/linux/pistachio/config-4.9 b/target/linux/pistachio/config-4.14 similarity index 88% rename from target/linux/pistachio/config-4.9 rename to target/linux/pistachio/config-4.14 index a417a6b06..4c5cd579b 100644 --- a/target/linux/pistachio/config-4.9 +++ b/target/linux/pistachio/config-4.14 @@ -4,27 +4,34 @@ CONFIG_ARCH_DISCARD_MEMBLOCK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y # CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set # CONFIG_ARCH_HAS_SG_CHAIN is not set +# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set +# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_SD=y +CONFIG_BLK_SCSI_REQUEST=y CONFIG_BOARD_SCACHE=y -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 CONFIG_BOOT_ELF32=y CONFIG_CEVT_R4K=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MIPS_GIC=y -CONFIG_CLKSRC_OF=y CONFIG_CLKSRC_PISTACHIO=y -CONFIG_CLKSRC_PROBE=y CONFIG_CLONE_BACKWARDS=y CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_BOSTON is not set CONFIG_CONNECTOR=y CONFIG_CPU_GENERIC_DUMP_TLB=y CONFIG_CPU_HAS_PREFETCH=y @@ -50,6 +57,7 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y CONFIG_CPU_SUPPORTS_MSA=y CONFIG_CRC16=y CONFIG_CRC_CCITT=y +CONFIG_CRYPTO_ACOMP2=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_CBC=y @@ -72,35 +80,46 @@ CONFIG_CSRC_R4K=y CONFIG_DMADEVICES=y CONFIG_DMA_ENGINE=y CONFIG_DMA_NONCOHERENT=y +# CONFIG_DMA_NOOP_OPS is not set CONFIG_DMA_OF=y CONFIG_DMA_VIRTUAL_CHANNELS=y +# CONFIG_DMA_VIRT_OPS is not set +# CONFIG_DRM_LIB_RANDOM is not set CONFIG_DTC=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set CONFIG_DWMAC_GENERIC=y CONFIG_EARLY_PRINTK=y CONFIG_EARLY_PRINTK_8250=y +CONFIG_EXPORTFS=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_SECURITY=y CONFIG_FIXED_PHY=y CONFIG_FS_MBCACHE=y CONFIG_FS_POSIX_ACL=y +CONFIG_FUTEX_PI=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_IO=y CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y CONFIG_GENERIC_IRQ_IPI=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_PCI_IOMAP=y CONFIG_GENERIC_PHY=y CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GPIOLIB=y CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDWARE_WATCHPOINTS=y CONFIG_HAS_DMA=y @@ -118,6 +137,7 @@ CONFIG_HAVE_CC_STACKPROTECTOR=y CONFIG_HAVE_CLK=y CONFIG_HAVE_CLK_PREPARE=y CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_COPY_THREAD_TLS=y CONFIG_HAVE_C_RECORDMCOUNT=y CONFIG_HAVE_DEBUG_KMEMLEAK=y CONFIG_HAVE_DEBUG_STACKOVERFLOW=y @@ -141,7 +161,6 @@ CONFIG_HAVE_OPROFILE=y CONFIG_HAVE_PERF_EVENTS=y CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HOTPLUG_CPU=y CONFIG_I2C=y CONFIG_I2C_BOARDINFO=y @@ -159,15 +178,14 @@ CONFIG_JBD2=y CONFIG_LEDS_PWM=y CONFIG_LIBFDT=y CONFIG_LKDTM=y -CONFIG_LOCKUP_DETECTOR=y CONFIG_LOG_BUF_SHIFT=18 CONFIG_LZO_COMPRESS=y CONFIG_LZO_DECOMPRESS=y CONFIG_MACH_PISTACHIO=y CONFIG_MAGIC_SYSRQ=y CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 -CONFIG_MDIO_BOARDINFO=y -# CONFIG_MFD_MAX77620 is not set +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y CONFIG_MFD_SYSCON=y CONFIG_MICREL_PHY=y CONFIG_MIPS=y @@ -186,7 +204,6 @@ CONFIG_MIPS_CPS_PM=y CONFIG_MIPS_CPU_SCACHE=y # CONFIG_MIPS_ELF_APPENDED_DTB is not set CONFIG_MIPS_EXTERNAL_TIMER=y -CONFIG_MIPS_FPU_EMULATOR=y CONFIG_MIPS_GIC=y # CONFIG_MIPS_HUGE_TLB_SUPPORT is not set CONFIG_MIPS_L1_CACHE_SHIFT=5 @@ -211,7 +228,6 @@ CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_M25P80=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_ECC=y -# CONFIG_MTD_PHYSMAP_OF_VERSATILE is not set CONFIG_MTD_SPI_NAND=y CONFIG_MTD_SPI_NAND_DEVICES=y CONFIG_MTD_SPI_NOR=y @@ -264,7 +280,10 @@ CONFIG_PTP_1588_CLOCK=y CONFIG_PWM=y CONFIG_PWM_IMG=y CONFIG_PWM_SYSFS=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y CONFIG_RATIONAL=y +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y CONFIG_REGMAP=y CONFIG_REGMAP_I2C=y @@ -309,10 +328,13 @@ CONFIG_SYS_SUPPORTS_RELOCATABLE=y CONFIG_SYS_SUPPORTS_SCHED_SMT=y CONFIG_SYS_SUPPORTS_SMP=y CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_THIN_ARCHIVES=y CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_STATS=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y CONFIG_TMPFS_POSIX_ACL=y CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y CONFIG_UBIFS_FS=y # CONFIG_UBIFS_FS_ADVANCED_COMPR is not set CONFIG_UBIFS_FS_LZO=y @@ -325,7 +347,6 @@ CONFIG_USB_DWC2_DUAL_ROLE=y # CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set CONFIG_USB_EHCI_HCD=y # CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_ETH is not set CONFIG_USB_GADGET=y CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y diff --git a/target/linux/pistachio/patches-4.9/101-dmaengine-img-mdc-Handle-early-status-read.patch b/target/linux/pistachio/patches-4.14/101-dmaengine-img-mdc-Handle-early-status-read.patch similarity index 96% rename from target/linux/pistachio/patches-4.9/101-dmaengine-img-mdc-Handle-early-status-read.patch rename to target/linux/pistachio/patches-4.14/101-dmaengine-img-mdc-Handle-early-status-read.patch index 338918217..92293f879 100644 --- a/target/linux/pistachio/patches-4.9/101-dmaengine-img-mdc-Handle-early-status-read.patch +++ b/target/linux/pistachio/patches-4.14/101-dmaengine-img-mdc-Handle-early-status-read.patch @@ -16,7 +16,7 @@ Signed-off-by: Damien Horsley --- a/drivers/dma/img-mdc-dma.c +++ b/drivers/dma/img-mdc-dma.c -@@ -623,25 +623,33 @@ static enum dma_status mdc_tx_status(str +@@ -620,25 +620,33 @@ static enum dma_status mdc_tx_status(str (MDC_CMDS_PROCESSED_CMDS_DONE_MASK + 1); /* diff --git a/target/linux/pistachio/patches-4.9/102-spi-img-spfi-Implement-dual-and-quad-mode.patch b/target/linux/pistachio/patches-4.14/102-spi-img-spfi-Implement-dual-and-quad-mode.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/102-spi-img-spfi-Implement-dual-and-quad-mode.patch rename to target/linux/pistachio/patches-4.14/102-spi-img-spfi-Implement-dual-and-quad-mode.patch diff --git a/target/linux/pistachio/patches-4.9/103-spi-img-spfi-set-device-select-bits-for-SPFI-port-st.patch b/target/linux/pistachio/patches-4.14/103-spi-img-spfi-set-device-select-bits-for-SPFI-port-st.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/103-spi-img-spfi-set-device-select-bits-for-SPFI-port-st.patch rename to target/linux/pistachio/patches-4.14/103-spi-img-spfi-set-device-select-bits-for-SPFI-port-st.patch diff --git a/target/linux/pistachio/patches-4.9/104-spi-img-spfi-use-device-0-configuration-for-all-devi.patch b/target/linux/pistachio/patches-4.14/104-spi-img-spfi-use-device-0-configuration-for-all-devi.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/104-spi-img-spfi-use-device-0-configuration-for-all-devi.patch rename to target/linux/pistachio/patches-4.14/104-spi-img-spfi-use-device-0-configuration-for-all-devi.patch diff --git a/target/linux/pistachio/patches-4.9/105-spi-img-spfi-RX-maximum-burst-size-for-DMA-is-8.patch b/target/linux/pistachio/patches-4.14/105-spi-img-spfi-RX-maximum-burst-size-for-DMA-is-8.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/105-spi-img-spfi-RX-maximum-burst-size-for-DMA-is-8.patch rename to target/linux/pistachio/patches-4.14/105-spi-img-spfi-RX-maximum-burst-size-for-DMA-is-8.patch diff --git a/target/linux/pistachio/patches-4.9/106-spi-img-spfi-finish-every-transfer-cleanly.patch b/target/linux/pistachio/patches-4.14/106-spi-img-spfi-finish-every-transfer-cleanly.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/106-spi-img-spfi-finish-every-transfer-cleanly.patch rename to target/linux/pistachio/patches-4.14/106-spi-img-spfi-finish-every-transfer-cleanly.patch diff --git a/target/linux/pistachio/patches-4.9/107-clockevents-Retry-programming-min-delta-up-to-10-tim.patch b/target/linux/pistachio/patches-4.14/107-clockevents-Retry-programming-min-delta-up-to-10-tim.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/107-clockevents-Retry-programming-min-delta-up-to-10-tim.patch rename to target/linux/pistachio/patches-4.14/107-clockevents-Retry-programming-min-delta-up-to-10-tim.patch diff --git a/target/linux/pistachio/patches-4.9/108-clk-pistachio-Fix-wrong-SDHost-card-speed.patch b/target/linux/pistachio/patches-4.14/108-clk-pistachio-Fix-wrong-SDHost-card-speed.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/108-clk-pistachio-Fix-wrong-SDHost-card-speed.patch rename to target/linux/pistachio/patches-4.14/108-clk-pistachio-Fix-wrong-SDHost-card-speed.patch diff --git a/target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch b/target/linux/pistachio/patches-4.14/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch rename to target/linux/pistachio/patches-4.14/109-MIPS-DTS-img-marduk-switch-mmc-to-1-bit-mode.patch diff --git a/target/linux/pistachio/patches-4.9/401-mtd-nor-support-mtd-name-from-device-tree.patch b/target/linux/pistachio/patches-4.14/401-mtd-nor-support-mtd-name-from-device-tree.patch similarity index 88% rename from target/linux/pistachio/patches-4.9/401-mtd-nor-support-mtd-name-from-device-tree.patch rename to target/linux/pistachio/patches-4.14/401-mtd-nor-support-mtd-name-from-device-tree.patch index 20ca71ea8..eeb1e4dee 100644 --- a/target/linux/pistachio/patches-4.9/401-mtd-nor-support-mtd-name-from-device-tree.patch +++ b/target/linux/pistachio/patches-4.14/401-mtd-nor-support-mtd-name-from-device-tree.patch @@ -10,7 +10,7 @@ Signed-off-by: Abhimanyu Vishwakarma --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1541,6 +1541,7 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -2650,6 +2650,7 @@ int spi_nor_scan(struct spi_nor *nor, co struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; struct device_node *np = spi_nor_get_flash_node(nor); @@ -18,7 +18,7 @@ Signed-off-by: Abhimanyu Vishwakarma int ret; int i; -@@ -1606,7 +1607,12 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -2725,7 +2726,12 @@ int spi_nor_scan(struct spi_nor *nor, co spi_nor_wait_till_ready(nor); } diff --git a/target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch b/target/linux/pistachio/patches-4.14/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch similarity index 95% rename from target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch rename to target/linux/pistachio/patches-4.14/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch index f360613f9..3311de645 100644 --- a/target/linux/pistachio/patches-4.9/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch +++ b/target/linux/pistachio/patches-4.14/411-mtd-nand-Check-length-of-ID-before-reading-bits-per-.patch @@ -21,7 +21,7 @@ Signed-off-by: Ezequiel Garcia --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c -@@ -4043,7 +4043,8 @@ static bool find_full_id_nand(struct mtd +@@ -3803,7 +3803,8 @@ static bool find_full_id_nand(struct nan mtd->erasesize = type->erasesize; mtd->oobsize = type->oobsize; diff --git a/target/linux/pistachio/patches-4.9/412-mtd-nand-Add-JEDEC-manufacturer-ID-for-Gigadevice.patch b/target/linux/pistachio/patches-4.14/412-mtd-nand-Add-JEDEC-manufacturer-ID-for-Gigadevice.patch similarity index 71% rename from target/linux/pistachio/patches-4.9/412-mtd-nand-Add-JEDEC-manufacturer-ID-for-Gigadevice.patch rename to target/linux/pistachio/patches-4.14/412-mtd-nand-Add-JEDEC-manufacturer-ID-for-Gigadevice.patch index eceb30400..cb629a412 100644 --- a/target/linux/pistachio/patches-4.9/412-mtd-nand-Add-JEDEC-manufacturer-ID-for-Gigadevice.patch +++ b/target/linux/pistachio/patches-4.14/412-mtd-nand-Add-JEDEC-manufacturer-ID-for-Gigadevice.patch @@ -10,26 +10,26 @@ This commit adds Gigadevice to the list of manufacturer ID and name strings. Signed-off-by: Ezequiel Garcia --- drivers/mtd/nand/nand_ids.c | 1 + - include/linux/mtd/nand.h | 1 + + include/linux/mtd/rawnand.h | 1 + 2 files changed, 2 insertions(+) --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c -@@ -182,6 +182,7 @@ struct nand_manufacturers nand_manuf_ids +@@ -184,6 +184,7 @@ static const struct nand_manufacturer na {NAND_MFR_SANDISK, "SanDisk"}, {NAND_MFR_INTEL, "Intel"}, {NAND_MFR_ATO, "ATO"}, + {NAND_MFR_GIGADEVICE, "Gigadevice"}, - {0x0, "Unknown"} + {NAND_MFR_WINBOND, "Winbond"}, }; ---- a/include/linux/mtd/nand.h -+++ b/include/linux/mtd/nand.h -@@ -928,6 +928,7 @@ static inline void nand_set_controller_d +--- a/include/linux/mtd/rawnand.h ++++ b/include/linux/mtd/rawnand.h +@@ -1016,6 +1016,7 @@ static inline void *nand_get_manufacture #define NAND_MFR_SANDISK 0x45 #define NAND_MFR_INTEL 0x89 #define NAND_MFR_ATO 0x9b +#define NAND_MFR_GIGADEVICE 0xc8 + #define NAND_MFR_WINBOND 0xef + - /* The maximum expected count of bytes in the NAND ID sequence */ - #define NAND_MAX_ID_LEN 8 diff --git a/target/linux/pistachio/patches-4.9/413-mtd-Introduce-SPI-NAND-framework.patch b/target/linux/pistachio/patches-4.14/413-mtd-Introduce-SPI-NAND-framework.patch similarity index 99% rename from target/linux/pistachio/patches-4.9/413-mtd-Introduce-SPI-NAND-framework.patch rename to target/linux/pistachio/patches-4.14/413-mtd-Introduce-SPI-NAND-framework.patch index b13dde711..fe93b2114 100644 --- a/target/linux/pistachio/patches-4.9/413-mtd-Introduce-SPI-NAND-framework.patch +++ b/target/linux/pistachio/patches-4.14/413-mtd-Introduce-SPI-NAND-framework.patch @@ -57,7 +57,7 @@ Signed-off-by: Ian Pozella source "drivers/mtd/ubi/Kconfig" --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile -@@ -36,5 +36,6 @@ inftl-objs := inftlcore.o inftlmount.o +@@ -37,5 +37,6 @@ inftl-objs := inftlcore.o inftlmount.o obj-y += chips/ lpddr/ maps/ devices/ nand/ onenand/ tests/ @@ -100,7 +100,7 @@ Signed-off-by: Ian Pozella +#include +#include +#include -+#include ++#include +#include +#include +#include @@ -662,7 +662,7 @@ Signed-off-by: Ian Pozella +#define __LINUX_MTD_SPI_NAND_H + +#include -+#include ++#include + +struct spi_nand { + struct nand_chip nand_chip; diff --git a/target/linux/pistachio/patches-4.9/414-mtd-spi-nand-Support-Gigadevice-GD5F.patch b/target/linux/pistachio/patches-4.14/414-mtd-spi-nand-Support-Gigadevice-GD5F.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/414-mtd-spi-nand-Support-Gigadevice-GD5F.patch rename to target/linux/pistachio/patches-4.14/414-mtd-spi-nand-Support-Gigadevice-GD5F.patch diff --git a/target/linux/pistachio/patches-4.9/901-MIPS-DTS-img-marduk-add-nor-partition-name.patch b/target/linux/pistachio/patches-4.14/901-MIPS-DTS-img-marduk-add-nor-partition-name.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/901-MIPS-DTS-img-marduk-add-nor-partition-name.patch rename to target/linux/pistachio/patches-4.14/901-MIPS-DTS-img-marduk-add-nor-partition-name.patch diff --git a/target/linux/pistachio/patches-4.9/902-MIPS-DTS-img-marduk-add-nand-device-support.patch b/target/linux/pistachio/patches-4.14/902-MIPS-DTS-img-marduk-add-nand-device-support.patch similarity index 100% rename from target/linux/pistachio/patches-4.9/902-MIPS-DTS-img-marduk-add-nand-device-support.patch rename to target/linux/pistachio/patches-4.14/902-MIPS-DTS-img-marduk-add-nand-device-support.patch diff --git a/target/linux/pistachio/patches-4.9/001-MIPS-DTS-Add-base-device-tree-for-Pistachio-SoC.patch b/target/linux/pistachio/patches-4.9/001-MIPS-DTS-Add-base-device-tree-for-Pistachio-SoC.patch deleted file mode 100644 index 35aa5536f..000000000 --- a/target/linux/pistachio/patches-4.9/001-MIPS-DTS-Add-base-device-tree-for-Pistachio-SoC.patch +++ /dev/null @@ -1,983 +0,0 @@ -From 8efda11baddf344cbfab01dc016a8fef9bb64641 Mon Sep 17 00:00:00 2001 -From: Rahul Bedarkar -Date: Fri, 14 Oct 2016 11:25:54 +0530 -Subject: MIPS: DTS: Add base device tree for Pistachio SoC - -Add support for the base Device Tree for Imagination Technologies' -Pistachio SoC. - -This commit supports the following peripherals: - - * Clocks - * Pinctrl and GPIO - * UART - * SPI - * I2C - * PWM - * ADC - * Watchdog - * Ethernet - * MMC - * DMA engine - * Crypto - * I2S - * SPDIF - * Internal DAC - * Timer - * USB - * IR - * Interrupt Controller - -Signed-off-by: Rahul Bedarkar -Acked-by: James Hartley -Cc: Rob Herring -Cc: Mark Rutland -Cc: linux-mips@linux-mips.org -Cc: devicetree@vger.kernel.org -Cc: linux-kernel@vger.kernel.org -Patchwork: https://patchwork.linux-mips.org/patch/14393/ -Signed-off-by: Ralf Baechle ---- - MAINTAINERS | 2 +- - arch/mips/boot/dts/img/pistachio.dtsi | 924 ++++++++++++++++++++++++++++++++++ - 2 files changed, 925 insertions(+), 1 deletion(-) - create mode 100644 arch/mips/boot/dts/img/pistachio.dtsi - ---- a/MAINTAINERS -+++ b/MAINTAINERS -@@ -9569,7 +9569,7 @@ L: linux-mips@linux-mips.org - S: Maintained - F: arch/mips/pistachio/ - F: arch/mips/include/asm/mach-pistachio/ --F: arch/mips/boot/dts/pistachio/ -+F: arch/mips/boot/dts/img/pistachio* - F: arch/mips/configs/pistachio*_defconfig - - PKTCDVD DRIVER ---- /dev/null -+++ b/arch/mips/boot/dts/img/pistachio.dtsi -@@ -0,0 +1,924 @@ -+/* -+ * Copyright (C) 2015, 2016 Imagination Technologies Ltd. -+ * Copyright (C) 2015 Google, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+/ { -+ compatible = "img,pistachio"; -+ -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ interrupt-parent = <&gic>; -+ -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "mti,interaptiv"; -+ reg = <0>; -+ clocks = <&clk_core CLK_MIPS_PLL>; -+ clock-names = "cpu"; -+ clock-latency = <1000>; -+ operating-points = < -+ /* kHz uV(dummy) */ -+ 546000 1150000 -+ 520000 1100000 -+ 494000 1000000 -+ 468000 950000 -+ 442000 900000 -+ 416000 800000 -+ >; -+ }; -+ }; -+ -+ i2c0: i2c@18100000 { -+ compatible = "img,scb-i2c"; -+ reg = <0x18100000 0x200>; -+ interrupts = ; -+ clocks = <&clk_periph PERIPH_CLK_I2C0>, -+ <&cr_periph SYS_CLK_I2C0>; -+ clock-names = "scb", "sys"; -+ assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>, -+ <&clk_periph PERIPH_CLK_I2C0_DIV>; -+ assigned-clock-rates = <100000000>, <33333334>; -+ status = "disabled"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c1: i2c@18100200 { -+ compatible = "img,scb-i2c"; -+ reg = <0x18100200 0x200>; -+ interrupts = ; -+ clocks = <&clk_periph PERIPH_CLK_I2C1>, -+ <&cr_periph SYS_CLK_I2C1>; -+ clock-names = "scb", "sys"; -+ assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>, -+ <&clk_periph PERIPH_CLK_I2C1_DIV>; -+ assigned-clock-rates = <100000000>, <33333334>; -+ status = "disabled"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c2: i2c@18100400 { -+ compatible = "img,scb-i2c"; -+ reg = <0x18100400 0x200>; -+ interrupts = ; -+ clocks = <&clk_periph PERIPH_CLK_I2C2>, -+ <&cr_periph SYS_CLK_I2C2>; -+ clock-names = "scb", "sys"; -+ assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>, -+ <&clk_periph PERIPH_CLK_I2C2_DIV>; -+ assigned-clock-rates = <100000000>, <33333334>; -+ status = "disabled"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c2_pins>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2c3: i2c@18100600 { -+ compatible = "img,scb-i2c"; -+ reg = <0x18100600 0x200>; -+ interrupts = ; -+ clocks = <&clk_periph PERIPH_CLK_I2C3>, -+ <&cr_periph SYS_CLK_I2C3>; -+ clock-names = "scb", "sys"; -+ assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>, -+ <&clk_periph PERIPH_CLK_I2C3_DIV>; -+ assigned-clock-rates = <100000000>, <33333334>; -+ status = "disabled"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c3_pins>; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ i2s_in: i2s-in@18100800 { -+ compatible = "img,i2s-in"; -+ reg = <0x18100800 0x200>; -+ interrupts = ; -+ dmas = <&mdc 30 0xffffffff 0>; -+ dma-names = "rx"; -+ clocks = <&cr_periph SYS_CLK_I2S_IN>; -+ clock-names = "sys"; -+ img,i2s-channels = <6>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_in_pins>; -+ status = "disabled"; -+ -+ #sound-dai-cells = <0>; -+ }; -+ -+ i2s_out: i2s-out@18100a00 { -+ compatible = "img,i2s-out"; -+ reg = <0x18100a00 0x200>; -+ interrupts = ; -+ dmas = <&mdc 23 0xffffffff 0>; -+ dma-names = "tx"; -+ clocks = <&cr_periph SYS_CLK_I2S_OUT>, -+ <&clk_core CLK_I2S>; -+ clock-names = "sys", "ref"; -+ assigned-clocks = <&clk_core CLK_I2S_DIV>; -+ assigned-clock-rates = <12288000>; -+ img,i2s-channels = <6>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_out_pins>; -+ status = "disabled"; -+ resets = <&pistachio_reset PISTACHIO_RESET_I2S_OUT>; -+ reset-names = "rst"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ parallel_out: parallel-audio-out@18100c00 { -+ compatible = "img,parallel-out"; -+ reg = <0x18100c00 0x100>; -+ interrupts = ; -+ dmas = <&mdc 16 0xffffffff 0>; -+ dma-names = "tx"; -+ clocks = <&cr_periph SYS_CLK_PAUD_OUT>, -+ <&clk_core CLK_AUDIO_DAC>; -+ clock-names = "sys", "ref"; -+ assigned-clocks = <&clk_core CLK_AUDIO_DAC_DIV>; -+ assigned-clock-rates = <12288000>; -+ status = "disabled"; -+ resets = <&pistachio_reset PISTACHIO_RESET_PRL_OUT>; -+ reset-names = "rst"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ spdif_out: spdif-out@18100d00 { -+ compatible = "img,spdif-out"; -+ reg = <0x18100d00 0x100>; -+ interrupts = ; -+ dmas = <&mdc 14 0xffffffff 0>; -+ dma-names = "tx"; -+ clocks = <&cr_periph SYS_CLK_SPDIF_OUT>, -+ <&clk_core CLK_SPDIF>; -+ clock-names = "sys", "ref"; -+ assigned-clocks = <&clk_core CLK_SPDIF_DIV>; -+ assigned-clock-rates = <12288000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spdif_out_pin>; -+ status = "disabled"; -+ resets = <&pistachio_reset PISTACHIO_RESET_SPDIF_OUT>; -+ reset-names = "rst"; -+ #sound-dai-cells = <0>; -+ }; -+ -+ spdif_in: spdif-in@18100e00 { -+ compatible = "img,spdif-in"; -+ reg = <0x18100e00 0x100>; -+ interrupts = ; -+ dmas = <&mdc 15 0xffffffff 0>; -+ dma-names = "rx"; -+ clocks = <&cr_periph SYS_CLK_SPDIF_IN>; -+ clock-names = "sys"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spdif_in_pin>; -+ status = "disabled"; -+ -+ #sound-dai-cells = <0>; -+ }; -+ -+ internal_dac: internal-dac { -+ compatible = "img,pistachio-internal-dac"; -+ img,cr-top = <&cr_top>; -+ img,voltage-select = <1>; -+ -+ #sound-dai-cells = <0>; -+ }; -+ -+ spfi0: spi@18100f00 { -+ compatible = "img,spfi"; -+ reg = <0x18100f00 0x100>; -+ interrupts = ; -+ clocks = <&clk_core CLK_SPI0>, <&cr_periph SYS_CLK_SPI0_MASTER>; -+ clock-names = "sys", "spfi"; -+ dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>; -+ dma-names = "rx", "tx"; -+ spfi-max-frequency = <50000000>; -+ status = "disabled"; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ spfi1: spi@18101000 { -+ compatible = "img,spfi"; -+ reg = <0x18101000 0x100>; -+ interrupts = ; -+ clocks = <&clk_core CLK_SPI1>, <&cr_periph SYS_CLK_SPI1>; -+ clock-names = "sys", "spfi"; -+ dmas = <&mdc 1 0xffffffff 0>, <&mdc 2 0xffffffff 0>; -+ dma-names = "rx", "tx"; -+ img,supports-quad-mode; -+ spfi-max-frequency = <50000000>; -+ status = "disabled"; -+ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ -+ pwm: pwm@18101300 { -+ compatible = "img,pistachio-pwm"; -+ reg = <0x18101300 0x100>; -+ clocks = <&clk_periph PERIPH_CLK_PWM>, -+ <&cr_periph SYS_CLK_PWM>; -+ clock-names = "pwm", "sys"; -+ img,cr-periph = <&cr_periph>; -+ #pwm-cells = <2>; -+ status = "disabled"; -+ }; -+ -+ uart0: uart@18101400 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x18101400 0x100>; -+ interrupts = ; -+ clocks = <&clk_core CLK_UART0>, <&cr_periph SYS_CLK_UART0>; -+ clock-names = "baudclk", "apb_pclk"; -+ assigned-clocks = <&clk_core CLK_UART0_INTERNAL_DIV>, -+ <&clk_core CLK_UART0_DIV>; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ pinctrl-0 = <&uart0_pins>, <&uart0_rts_cts_pins>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ }; -+ -+ uart1: uart@18101500 { -+ compatible = "snps,dw-apb-uart"; -+ reg = <0x18101500 0x100>; -+ interrupts = ; -+ clocks = <&clk_core CLK_UART1>, <&cr_periph SYS_CLK_UART1>; -+ clock-names = "baudclk", "apb_pclk"; -+ assigned-clocks = <&clk_core CLK_UART1_INTERNAL_DIV>, -+ <&clk_core CLK_UART1_DIV>; -+ assigned-clock-rates = <114278400>, <1843200>; -+ reg-shift = <2>; -+ reg-io-width = <4>; -+ pinctrl-0 = <&uart1_pins>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ }; -+ -+ adc: adc@18101600 { -+ compatible = "cosmic,10001-adc"; -+ reg = <0x18101600 0x24>; -+ adc-reserved-channels = <0x30>; -+ clocks = <&clk_core CLK_AUX_ADC>; -+ clock-names = "adc"; -+ assigned-clocks = <&clk_core CLK_AUX_ADC_INTERNAL_DIV>, -+ <&clk_core CLK_AUX_ADC_DIV>; -+ assigned-clock-rates = <100000000>, <1000000>; -+ status = "disabled"; -+ -+ #io-channel-cells = <1>; -+ }; -+ -+ pinctrl: pinctrl@18101c00 { -+ compatible = "img,pistachio-system-pinctrl"; -+ reg = <0x18101c00 0x400>; -+ -+ gpio0: gpio0 { -+ interrupts = ; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-ranges = <&pinctrl 0 0 16>; -+ -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ }; -+ -+ gpio1: gpio1 { -+ interrupts = ; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-ranges = <&pinctrl 0 16 16>; -+ -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ }; -+ -+ gpio2: gpio2 { -+ interrupts = ; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-ranges = <&pinctrl 0 32 16>; -+ -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ }; -+ -+ gpio3: gpio3 { -+ interrupts = ; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-ranges = <&pinctrl 0 48 16>; -+ -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ }; -+ -+ gpio4: gpio4 { -+ interrupts = ; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-ranges = <&pinctrl 0 64 16>; -+ -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ }; -+ -+ gpio5: gpio5 { -+ interrupts = ; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-ranges = <&pinctrl 0 80 10>; -+ -+ interrupt-controller; -+ #interrupt-cells = <2>; -+ }; -+ -+ i2c0_pins: i2c0-pins { -+ pin_i2c0: i2c0 { -+ pins = "mfio28", "mfio29"; -+ function = "i2c0"; -+ drive-strength = <4>; -+ }; -+ }; -+ -+ i2c1_pins: i2c1-pins { -+ pin_i2c1: i2c1 { -+ pins = "mfio30", "mfio31"; -+ function = "i2c1"; -+ drive-strength = <4>; -+ }; -+ }; -+ -+ i2c2_pins: i2c2-pins { -+ pin_i2c2: i2c2 { -+ pins = "mfio32", "mfio33"; -+ function = "i2c2"; -+ drive-strength = <4>; -+ }; -+ }; -+ -+ i2c3_pins: i2c3-pins { -+ pin_i2c3: i2c3 { -+ pins = "mfio34", "mfio35"; -+ function = "i2c3"; -+ drive-strength = <4>; -+ }; -+ }; -+ -+ spim0_pins: spim0-pins { -+ pin_spim0: spim0 { -+ pins = "mfio9", "mfio10"; -+ function = "spim0"; -+ drive-strength = <4>; -+ }; -+ spim0_clk: spim0-clk { -+ pins = "mfio8"; -+ function = "spim0"; -+ drive-strength = <4>; -+ }; -+ }; -+ -+ spim0_cs0_alt_pin: spim0-cs0-alt-pin { -+ spim0-cs0 { -+ pins = "mfio2"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim0_cs1_pin: spim0-cs1-pin { -+ spim0-cs1 { -+ pins = "mfio1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim0_cs2_pin: spim0-cs2-pin { -+ spim0-cs2 { -+ pins = "mfio55"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim0_cs2_alt_pin: spim0-cs2-alt-pin { -+ spim0-cs2 { -+ pins = "mfio28"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim0_cs3_pin: spim0-cs3-pin { -+ spim0-cs3 { -+ pins = "mfio56"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim0_cs3_alt_pin: spim0-cs3-alt-pin { -+ spim0-cs3 { -+ pins = "mfio29"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim0_cs4_pin: spim0-cs4-pin { -+ spim0-cs4 { -+ pins = "mfio57"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim0_cs4_alt_pin: spim0-cs4-alt-pin { -+ spim0-cs4 { -+ pins = "mfio30"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_pins: spim1-pins { -+ spim1 { -+ pins = "mfio3", "mfio4", "mfio5"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_quad_pins: spim1-quad-pins { -+ spim1-quad { -+ pins = "mfio6", "mfio7"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs0_pin: spim1-cs0-pins { -+ spim1-cs0 { -+ pins = "mfio0"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs1_pin: spim1-cs1-pin { -+ spim1-cs1 { -+ pins = "mfio1"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs1_alt_pin: spim1-cs1-alt-pin { -+ spim1-cs1 { -+ pins = "mfio58"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs2_pin: spim1-cs2-pin { -+ spim1-cs2 { -+ pins = "mfio2"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs2_alt0_pin: spim1-cs2-alt0-pin { -+ spim1-cs2 { -+ pins = "mfio31"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs2_alt1_pin: spim1-cs2-alt1-pin { -+ spim1-cs2 { -+ pins = "mfio55"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs3_pin: spim1-cs3-pin { -+ spim1-cs3 { -+ pins = "mfio56"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spim1_cs4_pin: spim1-cs4-pin { -+ spim1-cs4 { -+ pins = "mfio57"; -+ function = "spim1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ uart0_pins: uart0-pins { -+ uart0 { -+ pins = "mfio55", "mfio56"; -+ function = "uart0"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ uart0_rts_cts_pins: uart0-rts-cts-pins { -+ uart0-rts-cts { -+ pins = "mfio57", "mfio58"; -+ function = "uart0"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ uart1_pins: uart1-pins { -+ uart1 { -+ pins = "mfio59", "mfio60"; -+ function = "uart1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ uart1_rts_cts_pins: uart1-rts-cts-pins { -+ uart1-rts-cts { -+ pins = "mfio1", "mfio2"; -+ function = "uart1"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ enet_pins: enet-pins { -+ pin_enet: enet { -+ pins = "mfio63", "mfio64", "mfio65", "mfio66", -+ "mfio67", "mfio68", "mfio69", "mfio70"; -+ function = "eth"; -+ slew-rate = <1>; -+ drive-strength = <4>; -+ }; -+ pin_enet_phy_clk: enet-phy-clk { -+ pins = "mfio71"; -+ function = "eth"; -+ slew-rate = <1>; -+ drive-strength = <8>; -+ }; -+ }; -+ -+ sdhost_pins: sdhost-pins { -+ pin_sdhost_clk: sdhost-clk { -+ pins = "mfio15"; -+ function = "sdhost"; -+ slew-rate = <1>; -+ drive-strength = <4>; -+ }; -+ pin_sdhost_cmd: sdhost-cmd { -+ pins = "mfio16"; -+ function = "sdhost"; -+ slew-rate = <1>; -+ drive-strength = <4>; -+ }; -+ pin_sdhost_data: sdhost-data { -+ pins = "mfio17", "mfio18", "mfio19", "mfio20", -+ "mfio21", "mfio22", "mfio23", "mfio24"; -+ function = "sdhost"; -+ slew-rate = <1>; -+ drive-strength = <4>; -+ }; -+ pin_sdhost_power_select: sdhost-power-select { -+ pins = "mfio25"; -+ function = "sdhost"; -+ slew-rate = <1>; -+ drive-strength = <2>; -+ }; -+ pin_sdhost_card_detect: sdhost-card-detect { -+ pins = "mfio26"; -+ function = "sdhost"; -+ drive-strength = <2>; -+ }; -+ pin_sdhost_write_protect: sdhost-write-protect { -+ pins = "mfio27"; -+ function = "sdhost"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ ir_pin: ir-pin { -+ ir-data { -+ pins = "mfio72"; -+ function = "ir"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ pwmpdm0_pin: pwmpdm0-pin { -+ pwmpdm0 { -+ pins = "mfio73"; -+ function = "pwmpdm"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ pwmpdm1_pin: pwmpdm1-pin { -+ pwmpdm1 { -+ pins = "mfio74"; -+ function = "pwmpdm"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ pwmpdm2_pin: pwmpdm2-pin { -+ pwmpdm2 { -+ pins = "mfio75"; -+ function = "pwmpdm"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ pwmpdm3_pin: pwmpdm3-pin { -+ pwmpdm3 { -+ pins = "mfio76"; -+ function = "pwmpdm"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ dac_clk_pin: dac-clk-pin { -+ pin_dac_clk: dac-clk { -+ pins = "mfio45"; -+ function = "i2s_dac_clk"; -+ drive-strength = <4>; -+ }; -+ }; -+ -+ i2s_mclk_pin: i2s-mclk-pin { -+ pin_i2s_mclk: i2s-mclk { -+ pins = "mfio36"; -+ function = "i2s_out"; -+ drive-strength = <4>; -+ }; -+ }; -+ -+ spdif_out_pin: spdif-out-pin { -+ spdif-out { -+ pins = "mfio61"; -+ function = "spdif_out"; -+ slew-rate = <1>; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ spdif_in_pin: spdif-in-pin { -+ spdif-in { -+ pins = "mfio62"; -+ function = "spdif_in"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ i2s_out_pins: i2s-out-pins { -+ pins_i2s_out_clk: i2s-out-clk { -+ pins = "mfio37", "mfio38"; -+ function = "i2s_out"; -+ drive-strength = <4>; -+ }; -+ pins_i2s_out: i2s-out { -+ pins = "mfio39", "mfio40", -+ "mfio41", "mfio42", -+ "mfio43", "mfio44"; -+ function = "i2s_out"; -+ drive-strength = <2>; -+ }; -+ }; -+ -+ i2s_in_pins: i2s-in-pins { -+ i2s-in { -+ pins = "mfio47", "mfio48", "mfio49", -+ "mfio50", "mfio51", "mfio52", -+ "mfio53", "mfio54"; -+ function = "i2s_in"; -+ drive-strength = <2>; -+ }; -+ }; -+ }; -+ -+ timer: timer@18102000 { -+ compatible = "img,pistachio-gptimer"; -+ reg = <0x18102000 0x100>; -+ interrupts = ; -+ clocks = <&clk_periph PERIPH_CLK_COUNTER_FAST>, -+ <&cr_periph SYS_CLK_TIMER>; -+ clock-names = "fast", "sys"; -+ img,cr-periph = <&cr_periph>; -+ }; -+ -+ wdt: watchdog@18102100 { -+ compatible = "img,pdc-wdt"; -+ reg = <0x18102100 0x100>; -+ interrupts = ; -+ clocks = <&clk_periph PERIPH_CLK_WD>, <&cr_periph SYS_CLK_WD>; -+ clock-names = "wdt", "sys"; -+ assigned-clocks = <&clk_periph PERIPH_CLK_WD_PRE_DIV>, -+ <&clk_periph PERIPH_CLK_WD_DIV>; -+ assigned-clock-rates = <4000000>, <32768>; -+ }; -+ -+ ir: ir@18102200 { -+ compatible = "img,ir-rev1"; -+ reg = <0x18102200 0x100>; -+ interrupts = ; -+ clocks = <&clk_periph PERIPH_CLK_IR>, <&cr_periph SYS_CLK_IR>; -+ clock-names = "core", "sys"; -+ assigned-clocks = <&clk_periph PERIPH_CLK_IR_PRE_DIV>, -+ <&clk_periph PERIPH_CLK_IR_DIV>; -+ assigned-clock-rates = <4000000>, <32768>; -+ pinctrl-0 = <&ir_pin>; -+ pinctrl-names = "default"; -+ status = "disabled"; -+ }; -+ -+ usb: usb@18120000 { -+ compatible = "snps,dwc2"; -+ reg = <0x18120000 0x1c000>; -+ interrupts = ; -+ phys = <&usb_phy>; -+ phy-names = "usb2-phy"; -+ g-tx-fifo-size = <256 256 256 256>; -+ status = "disabled"; -+ }; -+ -+ enet: ethernet@18140000 { -+ compatible = "snps,dwmac"; -+ reg = <0x18140000 0x2000>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ clocks = <&clk_core CLK_ENET>, <&cr_periph SYS_CLK_ENET>; -+ clock-names = "stmmaceth", "pclk"; -+ assigned-clocks = <&clk_core CLK_ENET_MUX>, -+ <&clk_core CLK_ENET_DIV>; -+ assigned-clock-parents = <&clk_core CLK_SYS_INTERNAL_DIV>; -+ assigned-clock-rates = <0>, <50000000>; -+ pinctrl-0 = <&enet_pins>; -+ pinctrl-names = "default"; -+ phy-mode = "rmii"; -+ status = "disabled"; -+ }; -+ -+ sdhost: mmc@18142000 { -+ compatible = "img,pistachio-dw-mshc"; -+ reg = <0x18142000 0x400>; -+ interrupts = ; -+ clocks = <&clk_core CLK_SD_HOST>, <&cr_periph SYS_CLK_SD_HOST>; -+ clock-names = "ciu", "biu"; -+ pinctrl-0 = <&sdhost_pins>; -+ pinctrl-names = "default"; -+ fifo-depth = <0x20>; -+ num-slots = <1>; -+ clock-frequency = <50000000>; -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ status = "disabled"; -+ }; -+ -+ sram: sram@1b000000 { -+ compatible = "mmio-sram"; -+ reg = <0x1b000000 0x10000>; -+ }; -+ -+ mdc: dma-controller@18143000 { -+ compatible = "img,pistachio-mdc-dma"; -+ reg = <0x18143000 0x1000>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ , -+ ; -+ clocks = <&cr_periph SYS_CLK_MDC>; -+ clock-names = "sys"; -+ -+ img,max-burst-multiplier = <16>; -+ img,cr-periph = <&cr_periph>; -+ -+ #dma-cells = <3>; -+ }; -+ -+ clk_core: clk@18144000 { -+ compatible = "img,pistachio-clk", "syscon"; -+ clocks = <&xtal>, <&cr_top EXT_CLK_AUDIO_IN>, -+ <&cr_top EXT_CLK_ENET_IN>; -+ clock-names = "xtal", "audio_refclk_ext_gate", -+ "ext_enet_in_gate"; -+ reg = <0x18144000 0x800>; -+ #clock-cells = <1>; -+ }; -+ -+ clk_periph: clk@18144800 { -+ compatible = "img,pistachio-clk-periph"; -+ reg = <0x18144800 0x1000>; -+ clocks = <&clk_core CLK_PERIPH_SYS>; -+ clock-names = "periph_sys_core"; -+ #clock-cells = <1>; -+ }; -+ -+ cr_periph: clk@18148000 { -+ compatible = "img,pistachio-cr-periph", "syscon", "simple-bus"; -+ reg = <0x18148000 0x1000>; -+ clocks = <&clk_periph PERIPH_CLK_SYS>; -+ clock-names = "sys"; -+ #clock-cells = <1>; -+ -+ pistachio_reset: reset-controller { -+ compatible = "img,pistachio-reset"; -+ #reset-cells = <1>; -+ }; -+ }; -+ -+ cr_top: clk@18149000 { -+ compatible = "img,pistachio-cr-top", "syscon"; -+ reg = <0x18149000 0x200>; -+ #clock-cells = <1>; -+ }; -+ -+ hash: hash@18149600 { -+ compatible = "img,hash-accelerator"; -+ reg = <0x18149600 0x100>, <0x18101100 0x4>; -+ interrupts = ; -+ dmas = <&mdc 8 0xffffffff 0>; -+ dma-names = "tx"; -+ clocks = <&cr_periph SYS_CLK_HASH>, -+ <&clk_periph PERIPH_CLK_ROM>; -+ clock-names = "sys", "hash"; -+ }; -+ -+ gic: interrupt-controller@1bdc0000 { -+ compatible = "mti,gic"; -+ reg = <0x1bdc0000 0x20000>; -+ -+ interrupt-controller; -+ #interrupt-cells = <3>; -+ -+ timer { -+ compatible = "mti,gic-timer"; -+ interrupts = ; -+ clocks = <&clk_core CLK_MIPS>; -+ }; -+ }; -+ -+ usb_phy: usb-phy { -+ compatible = "img,pistachio-usb-phy"; -+ clocks = <&clk_core CLK_USB_PHY>; -+ clock-names = "usb_phy"; -+ assigned-clocks = <&clk_core CLK_USB_PHY_DIV>; -+ assigned-clock-rates = <50000000>; -+ img,refclk = <0x2>; -+ img,cr-top = <&cr_top>; -+ #phy-cells = <0>; -+ }; -+ -+ xtal: xtal { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <52000000>; -+ clock-output-names = "xtal"; -+ }; -+}; diff --git a/target/linux/pistachio/patches-4.9/002-MIPS-DTS-img-add-device-tree-for-Marduk-board.patch b/target/linux/pistachio/patches-4.9/002-MIPS-DTS-img-add-device-tree-for-Marduk-board.patch deleted file mode 100644 index a922ad663..000000000 --- a/target/linux/pistachio/patches-4.9/002-MIPS-DTS-img-add-device-tree-for-Marduk-board.patch +++ /dev/null @@ -1,230 +0,0 @@ -From a189771546b304250cf18b26748edfefb857adbf Mon Sep 17 00:00:00 2001 -From: Rahul Bedarkar -Date: Fri, 14 Oct 2016 11:25:55 +0530 -Subject: MIPS: DTS: img: add device tree for Marduk board - -Add support for Imagination Technologies' Marduk board which is based -on Pistachio SoC. It is also known as Creator Ci40. Marduk is legacy -name and will be there for decades. - -Documentation for this board can be found on -https://docs.creatordev.io/ci40/ - -This patch adds initial support for board with following peripherals: - -* PWM based heartbeat LED -* GPIO based buttons -* SPI NOR flash on SPI1 -* UART0 and UART1 -* SD card -* Ethernet -* USB -* PWM -* ADC -* I2C - -(apply from https://patchwork.linux-mips.org/project/linux-mips/list/?submitter=7165) - -Signed-off-by: Rahul Bedarkar -Acked-by: Rob Herring -Acked-by: James Hartley ---- - .../bindings/mips/img/pistachio-marduk.txt | 10 ++ - arch/mips/boot/dts/img/Makefile | 9 ++ - arch/mips/boot/dts/img/pistachio_marduk.dts | 163 +++++++++++++++++++++ - 3 files changed, 182 insertions(+) - create mode 100644 Documentation/devicetree/bindings/mips/img/pistachio-marduk.txt - create mode 100644 arch/mips/boot/dts/img/Makefile - create mode 100644 arch/mips/boot/dts/img/pistachio_marduk.dts - ---- /dev/null -+++ b/Documentation/devicetree/bindings/mips/img/pistachio-marduk.txt -@@ -0,0 +1,10 @@ -+Imagination Technologies' Pistachio SoC based Marduk Board -+========================================================== -+ -+Compatible string must be "img,pistachio-marduk", "img,pistachio" -+ -+Hardware and other related documentation is available at -+https://docs.creatordev.io/ci40/ -+ -+It is also known as Creator Ci40. Marduk is legacy name and will -+be there for decades. ---- /dev/null -+++ b/arch/mips/boot/dts/img/Makefile -@@ -0,0 +1,9 @@ -+dtb-$(CONFIG_MACH_PISTACHIO) += pistachio_marduk.dtb -+ -+obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) -+ -+# Force kbuild to make empty built-in.o if necessary -+obj- += dummy.o -+ -+always := $(dtb-y) -+clean-files := *.dtb *.dtb.S ---- /dev/null -+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts -@@ -0,0 +1,163 @@ -+/* -+ * Copyright (C) 2015, 2016 Imagination Technologies Ltd. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * IMG Marduk board is also known as Creator Ci40. -+ */ -+ -+/dts-v1/; -+ -+#include "pistachio.dtsi" -+ -+/ { -+ model = "IMG Marduk (Creator Ci40)"; -+ compatible = "img,pistachio-marduk", "img,pistachio"; -+ -+ aliases { -+ serial0 = &uart0; -+ serial1 = &uart1; -+ ethernet0 = &enet; -+ spi0 = &spfi0; -+ spi1 = &spfi1; -+ }; -+ -+ chosen { -+ bootargs = "root=/dev/sda1 rootwait ro lpj=723968"; -+ stdout-path = "serial1:115200"; -+ }; -+ -+ memory { -+ device_type = "memory"; -+ reg = <0x00000000 0x10000000>; -+ }; -+ -+ reg_1v8: fixed-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "aux_adc_vref"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-boot-on; -+ }; -+ -+ internal_dac_supply: internal-dac-supply { -+ compatible = "regulator-fixed"; -+ regulator-name = "internal_dac_supply"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ }; -+ -+ leds { -+ compatible = "pwm-leds"; -+ heartbeat { -+ label = "marduk:red:heartbeat"; -+ pwms = <&pwm 3 300000>; -+ max-brightness = <255>; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ keys { -+ compatible = "gpio-keys"; -+ button@1 { -+ label = "Button 1"; -+ linux,code = <0x101>; /* BTN_1 */ -+ gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; -+ }; -+ button@2 { -+ label = "Button 2"; -+ linux,code = <0x102>; /* BTN_2 */ -+ gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&internal_dac { -+ VDD-supply = <&internal_dac_supply>; -+}; -+ -+&spfi1 { -+ status = "okay"; -+ -+ pinctrl-0 = <&spim1_pins>, <&spim1_quad_pins>, <&spim1_cs0_pin>, -+ <&spim1_cs1_pin>; -+ pinctrl-names = "default"; -+ cs-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>, <&gpio0 1 GPIO_ACTIVE_HIGH>; -+ -+ flash@0 { -+ compatible = "spansion,s25fl016k", "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <50000000>; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+ assigned-clock-rates = <114278400>, <1843200>; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&usb { -+ status = "okay"; -+}; -+ -+&enet { -+ status = "okay"; -+}; -+ -+&pin_enet { -+ drive-strength = <2>; -+}; -+ -+&pin_enet_phy_clk { -+ drive-strength = <2>; -+}; -+ -+&sdhost { -+ status = "okay"; -+ bus-width = <4>; -+ disable-wp; -+}; -+ -+&pin_sdhost_cmd { -+ drive-strength = <2>; -+}; -+ -+&pin_sdhost_data { -+ drive-strength = <2>; -+}; -+ -+&pwm { -+ status = "okay"; -+ -+ pinctrl-0 = <&pwmpdm0_pin>, <&pwmpdm1_pin>, <&pwmpdm2_pin>, -+ <&pwmpdm3_pin>; -+ pinctrl-names = "default"; -+}; -+ -+&adc { -+ status = "okay"; -+ vref-supply = <®_1v8>; -+ adc-reserved-channels = <0x10>; -+}; -+ -+&i2c2 { -+ status = "okay"; -+ clock-frequency = <400000>; -+ -+ tpm@20 { -+ compatible = "infineon,slb9645tt"; -+ reg = <0x20>; -+ }; -+ -+}; -+ -+&i2c3 { -+ status = "okay"; -+ clock-frequency = <400000>; -+}; diff --git a/target/linux/pistachio/patches-4.9/003-MIPS-DTS-add-img-directory-to-Makefile.patch b/target/linux/pistachio/patches-4.9/003-MIPS-DTS-add-img-directory-to-Makefile.patch deleted file mode 100644 index aaeccab16..000000000 --- a/target/linux/pistachio/patches-4.9/003-MIPS-DTS-add-img-directory-to-Makefile.patch +++ /dev/null @@ -1,22 +0,0 @@ -From a907fdeb3f057e4c4b3960ca864b460dc1fa687a Mon Sep 17 00:00:00 2001 -From: Ian Pozella -Date: Thu, 16 Feb 2017 10:42:22 +0000 -Subject: MIPS: DTS: add img directory to Makefile - -An img directory exists for the Pistchio Soc but the directory -itself isn't in the dts Makefile meaning the dtbs never get built. - -Signed-off-by: Ian Pozella ---- - arch/mips/boot/dts/Makefile | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/mips/boot/dts/Makefile -+++ b/arch/mips/boot/dts/Makefile -@@ -1,5 +1,6 @@ - dts-dirs += brcm - dts-dirs += cavium-octeon -+dts-dirs += img - dts-dirs += ingenic - dts-dirs += lantiq - dts-dirs += mti diff --git a/target/linux/pistachio/patches-4.9/701-net-micrel-Disable-PME.patch b/target/linux/pistachio/patches-4.9/701-net-micrel-Disable-PME.patch deleted file mode 100644 index 046f00cd4..000000000 --- a/target/linux/pistachio/patches-4.9/701-net-micrel-Disable-PME.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 5e84aec87108e0481af7495a1e9a9953d8590d70 Mon Sep 17 00:00:00 2001 -From: Xue Liu -Date: Mon, 6 Feb 2017 17:43:19 +0000 -Subject: net: micrel: Disable PME - -Disable PME for Micrel phy driver allowing the Ethernet ports LED -driver to work on marduk platform. - -Signed-off-by: Xue Liu ---- - drivers/net/phy/micrel.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/phy/micrel.c -+++ b/drivers/net/phy/micrel.c -@@ -273,6 +273,7 @@ static int kszphy_config_init(struct phy - struct kszphy_priv *priv = phydev->priv; - const struct kszphy_type *type; - int ret; -+ int temp = 0; - - if (!priv) - return 0; -@@ -308,6 +309,11 @@ static int kszphy_config_init(struct phy - return ret; - } - -+ /* disable PME */ -+ temp = phy_read(phydev, 0x16); -+ temp &= ~(1 << 15); -+ phy_write(phydev, 0x16, temp); -+ - return 0; - } - diff --git a/target/linux/ramips/Makefile b/target/linux/ramips/Makefile index e401a3f73..887b5909e 100644 --- a/target/linux/ramips/Makefile +++ b/target/linux/ramips/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk ARCH:=mipsel BOARD:=ramips BOARDNAME:=MediaTek Ralink MIPS -SUBTARGETS:=mt7620 mt7620nand mt7621 mt76x8 rt288x rt305x rt3883 +SUBTARGETS:=mt7620 mt7621 mt76x8 rt288x rt305x rt3883 FEATURES:=squashfs gpio MAINTAINER:=John Crispin diff --git a/target/linux/ramips/base-files/etc/board.d/01_leds b/target/linux/ramips/base-files/etc/board.d/01_leds index de5ee6461..b5de38876 100755 --- a/target/linux/ramips/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/base-files/etc/board.d/01_leds @@ -265,14 +265,12 @@ miniembplug) set_usb_led "$boardname:green:mobile" ;; mir3g) - ucidef_set_led_default "power" "power" "$boardname:blue:status" "1" ucidef_set_led_switch "wan-amber" "WAN (amber)" "$boardname:amber:wan" "switch0" "0x02" "0x08" ucidef_set_led_switch "lan1-amber" "LAN1 (amber)" "$boardname:amber:lan1" "switch0" "0x08" "0x08" ucidef_set_led_switch "lan2-amber" "LAN2 (amber)" "$boardname:amber:lan2" "switch0" "0x04" "0x08" ;; -xiaomi,miwifi-r3|\ miwifi-mini) - ucidef_set_led_default "power" "power" "$boardname:blue:status" "1" + ucidef_set_led_default "power" "power" "$boardname:red:status" "1" ;; mlw221|\ mlwg2) @@ -337,8 +335,6 @@ px-4885-8M) set_wifi_led "px-4885:orange:wifi" set_usb_led "px-4885:blue:storage" ;; -r6220b|\ -r6220a|\ r6220) ucidef_set_led_netdev "wan" "wan" "$boardname:green:wan" eth0.2 set_wifi_led "$boardname:green:wifi" diff --git a/target/linux/ramips/base-files/etc/board.d/02_network b/target/linux/ramips/base-files/etc/board.d/02_network index a6d0e4463..b7e5fb6ff 100755 --- a/target/linux/ramips/base-files/etc/board.d/02_network +++ b/target/linux/ramips/base-files/etc/board.d/02_network @@ -85,7 +85,6 @@ ramips_setup_interfaces() dlink,dwr-921-c1|\ ew1200|\ firewrt|\ - puppies|\ hc5661a|\ hc5962|\ hlk-rm04|\ @@ -106,8 +105,6 @@ ramips_setup_interfaces() pbr-m1|\ psg1208|\ psg1218a|\ - r6220b|\ - r6220a|\ r6220|\ rt-n12p|\ sap-g3200u3|\ @@ -153,10 +150,6 @@ ramips_setup_interfaces() wrh-300cr) ucidef_set_interface_lan "eth0" ;; - xiaomi,miwifi-r3) - ucidef_add_switch "switch0" \ - "1:lan" "4:lan" "0:wan" "6@eth0" - ;; mir3g) ucidef_add_switch "switch0" \ "2:lan:2" "3:lan:1" "1:wan" "6t@eth0" @@ -478,9 +471,7 @@ ramips_setup_macs() ;; mir3g) lan_mac=$(mtd_get_mac_binary Factory 0xe006) - wan_mac=$(macaddr_setbit_la "$lan_mac") ;; - xiaomi,miwifi-r3|\ miwifi-mini) wan_mac=$(cat /sys/class/net/eth0/address) lan_mac=$(macaddr_setbit_la "$wan_mac") @@ -506,8 +497,6 @@ ramips_setup_macs() lan_mac=$(mtd_get_mac_binary factory 40) wan_mac=$(mtd_get_mac_binary factory 46) ;; - r6220b|\ - r6220a|\ r6220) wan_mac=$(mtd_get_mac_binary factory 4) lan_mac=$(macaddr_add "$wan_mac" 1) diff --git a/target/linux/ramips/base-files/etc/diag.sh b/target/linux/ramips/base-files/etc/diag.sh index 9b18dd8d9..d84bdff3a 100644 --- a/target/linux/ramips/base-files/etc/diag.sh +++ b/target/linux/ramips/base-files/etc/diag.sh @@ -37,8 +37,6 @@ get_status_led() { nbg-419n|\ nbg-419n2|\ pwh2004|\ - r6220b|\ - r6220a|\ r6220|\ tplink,c20-v4|\ tplink,c50-v3|\ @@ -163,8 +161,6 @@ get_status_led() { k2p|\ m3|\ mir3g|\ - xiaomi,miwifi-r3|\ - miwifi-mini|\ miwifi-nano) status_led="$boardname:blue:status" ;; @@ -208,6 +204,7 @@ get_status_led() { m4-8M) status_led="m4:blue:status" ;; + miwifi-mini|\ zte-q7) status_led="$boardname:red:status" ;; diff --git a/target/linux/ramips/base-files/lib/ramips.sh b/target/linux/ramips/base-files/lib/ramips.sh index dd3600853..75474fbc6 100755 --- a/target/linux/ramips/base-files/lib/ramips.sh +++ b/target/linux/ramips/base-files/lib/ramips.sh @@ -196,9 +196,6 @@ ramips_board_detect() { *"FireWRT") name="firewrt" ;; - *"Openwrt Puppies") - name="puppies" - ;; *"Fonera 2.0N") name="fonera20n" ;; @@ -418,12 +415,6 @@ ramips_board_detect() { *"Q7") name="zte-q7" ;; - *"R6220B") - name="r6220b" - ;; - *"R6220A") - name="r6220a" - ;; *"R6220") name="r6220" ;; diff --git a/target/linux/ramips/base-files/lib/upgrade/platform.sh b/target/linux/ramips/base-files/lib/upgrade/platform.sh index e9c6ac09f..0a43f2992 100755 --- a/target/linux/ramips/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/base-files/lib/upgrade/platform.sh @@ -59,7 +59,6 @@ platform_check_image() { ex3700|\ f7c027|\ firewrt|\ - puppies|\ fonera20n|\ freestation5|\ gb-pc1|\ @@ -283,14 +282,11 @@ platform_check_image() { return 0 ;; hc5962|\ - xiaomi,miwifi-r3|\ mir3g|\ - r6220b|\ - r6220a|\ r6220|\ ubnt-erx|\ ubnt-erx-sfp) - nand_do_platform_check "${board//,/_}" "$1" + nand_do_platform_check "$board" "$1" return $?; ;; re350-v1) @@ -330,10 +326,7 @@ platform_do_upgrade() { case "$board" in hc5962|\ - xiaomi,miwifi-r3|\ mir3g|\ - r6220b|\ - r6220a|\ r6220|\ ubnt-erx|\ ubnt-erx-sfp) diff --git a/target/linux/ramips/dts/AI-BR100.dts b/target/linux/ramips/dts/AI-BR100.dts index 687a78a10..b0100f63b 100644 --- a/target/linux/ramips/dts/AI-BR100.dts +++ b/target/linux/ramips/dts/AI-BR100.dts @@ -98,8 +98,6 @@ }; ðernet { - pinctrl-names = "default"; - pinctrl-0 = <&ephy_pins>; mtd-mac-address = <&factory 0x4>; mediatek,portmap = "llllw"; }; diff --git a/target/linux/ramips/dts/GL-MT300A.dts b/target/linux/ramips/dts/GL-MT300A.dts index c69d81645..ed954ce87 100644 --- a/target/linux/ramips/dts/GL-MT300A.dts +++ b/target/linux/ramips/dts/GL-MT300A.dts @@ -131,8 +131,6 @@ }; ðernet { - pinctrl-names = "default"; - pinctrl-0 = <&ephy_pins>; mtd-mac-address = <&factory 0x4000>; mediatek,portmap = "wllll"; }; diff --git a/target/linux/ramips/dts/GL-MT750.dts b/target/linux/ramips/dts/GL-MT750.dts index 2b5bf558e..007f745b6 100644 --- a/target/linux/ramips/dts/GL-MT750.dts +++ b/target/linux/ramips/dts/GL-MT750.dts @@ -126,8 +126,6 @@ }; ðernet { - pinctrl-names = "default"; - pinctrl-0 = <&ephy_pins>; mtd-mac-address = <&factory 0x4000>; mediatek,portmap = "llllw"; }; diff --git a/target/linux/ramips/dts/MIWIFI-R3.dts b/target/linux/ramips/dts/MIWIFI-R3.dts deleted file mode 100644 index 4e15f51a1..000000000 --- a/target/linux/ramips/dts/MIWIFI-R3.dts +++ /dev/null @@ -1,172 +0,0 @@ -/dts-v1/; - -#include "mt7620a.dtsi" - -#include -#include - -/ { - compatible = "xiaomi,miwifi-r3", "ralink,mt7620a-soc"; - model = "Xiaomi Mi Router R3"; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x8000000>; - }; - - chosen { - bootargs = "console=ttyS0,115200"; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; - poll-interval = <20>; - - reset { - label = "reset"; - gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - - blue { - label = "miwifi-r3:blue:status"; - gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; - }; - - yellow { - label = "miwifi-r3:yellow:status"; - gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; - }; - - red { - label = "miwifi-r3:red:status"; - gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; - }; - }; - - nand { - status = "okay"; - #address-cells = <1>; - #size-cells = <1>; - compatible = "mtk,mt7620-nand"; - - partition@0 { - label = "Bootloader"; - reg = <0x0 0x40000>; - read-only; - }; - - partition@40000 { - label = "Config"; - reg = <0x40000 0x40000>; - }; - - partition@80000 { - label = "Bdata"; - reg = <0x80000 0x40000>; - read-only; - }; - - factory: partition@0xc0000 { - label = "Factory"; - reg = <0xc0000 0x40000>; - read-only; - }; - - partition@100000 { - label = "crash"; - reg = <0x100000 0x40000>; - read-only; - }; - - partition@140000 { - label = "crash_syslog"; - reg = <0x140000 0x40000>; - read-only; - }; - - partition@180000 { - label = "reserved0"; - reg = <0x180000 0x80000>; - read-only; - }; - - partition@200000 { - label = "kernel0_rsvd"; - reg = <0x200000 0x400000>; - }; - - partition@600000 { - label = "kernel"; - reg = <0x600000 0x400000>; - }; - - /* ubi partition is the result of squashing - * next consequent stock partitions: - * - rootfs0 (rootfs partition for stock kernel0), - * - rootfs1 (rootfs partition for stock failsafe kernel1), - * - overlay (used as ubi overlay in stock fw) - * resulting 117,5MiB space for packages. - */ - partition@a00000 { - label = "ubi"; - reg = <0xa00000 0x7600000>; - }; - }; -}; - -&gpio1 { - status = "okay"; -}; - -&ehci { - status = "okay"; -}; - -&ohci { - status = "okay"; -}; - -ðernet { - pinctrl-names = "default"; - pinctrl-0 = <&ephy_pins>; - mtd-mac-address = <&factory 0x28>; - mediatek,portmap = "llllw"; -}; - -&wmac { - ralink,mtd-eeprom = <&factory 0>; -}; - -&pcie { - status = "okay"; - - pcie-bridge { - mt76@0,0 { - reg = <0x0000 0 0 0 0>; - device_type = "pci"; - mediatek,mtd-eeprom = <&factory 0x8000>; - ieee80211-freq-limit = <5000000 6000000>; - }; - }; -}; - -&pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "rgmii1"; - ralink,function = "gpio"; - }; - - pa { - ralink,group = "pa"; - ralink,function = "pa"; - }; - }; -}; diff --git a/target/linux/ramips/dts/PUPPIES.dts b/target/linux/ramips/dts/PUPPIES.dts deleted file mode 100644 index af213a34a..000000000 --- a/target/linux/ramips/dts/PUPPIES.dts +++ /dev/null @@ -1,114 +0,0 @@ -/dts-v1/; - -#include "mt7621.dtsi" - -/ { - compatible = "mediatek,mt7621-eval-board", "mediatek,mt7621-soc"; - model = "Openwrt Puppies"; - - chosen { - bootargs = "console=ttyS0,57600"; - }; - - gpio-leds { - compatible = "gpio-leds"; - - power { - label = "puppies:green:power"; - gpios = <&gpio0 22 1>; - }; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; - poll-interval = <20>; - - reset { - label = "reset"; - gpios = <&gpio0 18 1>; - linux,code = <0x198>; - }; - - power { - label = "power"; - gpios = <&gpio0 23 1>; - linux,code = <0x116>; - }; - }; -}; - -&sdhci { - status = "okay"; -}; - -&spi0 { - status = "okay"; - - m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "w25q128"; - reg = <0>; - linux,modalias = "m25p80"; - spi-max-frequency = <10000000>; - m25p,chunked-io = <32>; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x30000>; - read-only; - }; - - partition@30000 { - label = "u-boot-env"; - reg = <0x30000 0x10000>; - }; - - factory: partition@40000 { - label = "factory"; - reg = <0x40000 0x10000>; - }; - - partition@50000 { - label = "firmware"; - reg = <0x50000 0xfb0000>; - }; - }; -}; - -&pcie { - status = "okay"; - - pcie0 { - mt76@0,0 { - reg = <0x0000 0 0 0 0>; - device_type = "pci"; - mediatek,mtd-eeprom = <&factory 0x8000>; - mediatek,2ghz = <0>; - }; - }; - - pcie1 { - mt76@1,0 { - reg = <0x0000 0 0 0 0>; - device_type = "pci"; - mediatek,mtd-eeprom = <&factory 0x0000>; - mediatek,5ghz = <0>; - }; - }; -}; - -ðernet { - mtd-mac-address = <&factory 0xe000>; -}; - -&pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "wdt", "rgmii2"; - ralink,function = "gpio"; - }; - }; -}; diff --git a/target/linux/ramips/dts/R6220A.dts b/target/linux/ramips/dts/R6220A.dts deleted file mode 100644 index 0d96c86bd..000000000 --- a/target/linux/ramips/dts/R6220A.dts +++ /dev/null @@ -1,158 +0,0 @@ -/dts-v1/; - -#include "mt7621.dtsi" - -#include -#include - -/ { - compatible = "netgear,r6220a", "mediatek,mt7621-soc"; - model = "Netgear R6220A"; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x8000000>; - }; - - chosen { - bootargs = "console=ttyS0,57600"; - }; - - gpio-leds { - compatible = "gpio-leds"; - - power { - label = "r6220a:green:power"; - gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; - }; - - usb { - label = "r6220a:green:usb"; - gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; - }; - - internet { - label = "r6220a:green:wan"; - gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; - }; - - wifi { - label = "r6220a:green:wifi"; - gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "r6220a:green:wps"; - gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; - poll-interval = <20>; - - wps { - label = "wps"; - gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - linux,code = ; - }; - - wifi { - label = "wifi"; - gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; - linux,code = ; - }; - }; - - gpio_export { - compatible = "gpio-export"; - #size-cells = <0>; - - usbpower { - gpio-export,name = "usbpower"; - gpio-export,output = <1>; - gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&nand { - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x100000>; - read-only; - }; - - partition@100000 { - label = "SC PID"; - reg = <0x100000 0x100000>; - read-only; - }; - - partition@200000 { - label = "kernel"; - reg = <0x200000 0x400000>; - }; - - partition@600000 { - label = "ubi"; - reg = <0x600000 0x1c00000>; - }; - - factory: partition@2de0000 { - label = "factory"; - reg = <0x2de0000 0x100000>; - read-only; - }; - - partition@4200000 { - label = "reserved"; - reg = <0x4200000 0x3c00000>; - read-only; - }; -}; - -&pcie { - status = "okay"; - - pcie0 { - mt76@0,0 { - reg = <0x0000 0 0 0 0>; - device_type = "pci"; - mediatek,mtd-eeprom = <&factory 0x8000>; - ieee80211-freq-limit = <5000000 6000000>; - }; - }; - - pcie1 { - mt76@1,0 { - reg = <0x0000 0 0 0 0>; - device_type = "pci"; - mediatek,mtd-eeprom = <&factory 0x0000>; - ieee80211-freq-limit = <2400000 2500000>; - }; - }; -}; - -ðernet { - mtd-mac-address = <&factory 0x00000004>; -}; - -&pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "uart3", "jtag"; - ralink,function = "gpio"; - }; - }; -}; diff --git a/target/linux/ramips/dts/R6220B.dts b/target/linux/ramips/dts/R6220B.dts deleted file mode 100644 index 6a639386e..000000000 --- a/target/linux/ramips/dts/R6220B.dts +++ /dev/null @@ -1,158 +0,0 @@ -/dts-v1/; - -#include "mt7621.dtsi" - -#include -#include - -/ { - compatible = "netgear,r6220b", "mediatek,mt7621-soc"; - model = "Netgear R6220B"; - - memory@0 { - device_type = "memory"; - reg = <0x0 0x8000000>; - }; - - chosen { - bootargs = "console=ttyS0,57600"; - }; - - gpio-leds { - compatible = "gpio-leds"; - - power { - label = "r6220b:green:power"; - gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; - }; - - usb { - label = "r6220b:green:usb"; - gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; - }; - - internet { - label = "r6220b:green:wan"; - gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; - }; - - wifi { - label = "r6220b:green:wifi"; - gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "r6220b:green:wps"; - gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; - }; - }; - - gpio-keys-polled { - compatible = "gpio-keys-polled"; - #address-cells = <1>; - #size-cells = <0>; - poll-interval = <20>; - - wps { - label = "wps"; - gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - linux,code = ; - }; - - wifi { - label = "wifi"; - gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; - linux,code = ; - }; - }; - - gpio_export { - compatible = "gpio-export"; - #size-cells = <0>; - - usbpower { - gpio-export,name = "usbpower"; - gpio-export,output = <1>; - gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&nand { - status = "okay"; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x100000>; - read-only; - }; - - partition@100000 { - label = "SC PID"; - reg = <0x100000 0x100000>; - read-only; - }; - - partition@200000 { - label = "kernel"; - reg = <0x200000 0x400000>; - }; - - partition@600000 { - label = "ubi"; - reg = <0x600000 0x1c00000>; - }; - - factory: partition@2da0000 { - label = "factory"; - reg = <0x2da0000 0x100000>; - read-only; - }; - - partition@4200000 { - label = "reserved"; - reg = <0x4200000 0x3c00000>; - read-only; - }; -}; - -&pcie { - status = "okay"; - - pcie0 { - mt76@0,0 { - reg = <0x0000 0 0 0 0>; - device_type = "pci"; - mediatek,mtd-eeprom = <&factory 0x8000>; - ieee80211-freq-limit = <5000000 6000000>; - }; - }; - - pcie1 { - mt76@1,0 { - reg = <0x0000 0 0 0 0>; - device_type = "pci"; - mediatek,mtd-eeprom = <&factory 0x0000>; - ieee80211-freq-limit = <2400000 2500000>; - }; - }; -}; - -ðernet { - mtd-mac-address = <&factory 0x00000004>; -}; - -&pinctrl { - state_default: pinctrl0 { - gpio { - ralink,group = "uart3", "jtag"; - ralink,function = "gpio"; - }; - }; -}; diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi index b5edf506f..df2ed37c9 100644 --- a/target/linux/ramips/dts/mt7628an.dtsi +++ b/target/linux/ramips/dts/mt7628an.dtsi @@ -373,7 +373,7 @@ }; usbphy: usbphy@10120000 { - compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy"; + compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy"; reg = <0x10120000 0x1000>; #phy-cells = <0>; diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mdio.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mdio.c index c01055227..b2a31589b 100644 --- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mdio.c +++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mdio.c @@ -57,6 +57,7 @@ static void fe_phy_link_adjust(struct net_device *dev) } } } + spin_unlock_irqrestore(&priv->phy->lock, flags); } int fe_connect_phy_node(struct fe_priv *priv, struct device_node *phy_node) diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mtk_eth_soc.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mtk_eth_soc.c index 49505eab8..d0d88b92c 100644 --- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mtk_eth_soc.c +++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mtk/mtk_eth_soc.c @@ -477,9 +477,9 @@ static void fe_get_stats64(struct net_device *dev, } if (netif_running(dev) && netif_device_present(dev)) { - if (spin_trylock(&hwstats->stats_lock)) { + if (spin_trylock_bh(&hwstats->stats_lock)) { fe_stats_update(priv); - spin_unlock(&hwstats->stats_lock); + spin_unlock_bh(&hwstats->stats_lock); } } @@ -1581,6 +1581,7 @@ static int fe_probe(struct platform_device *pdev) priv->tx_ring.tx_ring_size = NUM_DMA_DESC; priv->rx_ring.rx_ring_size = NUM_DMA_DESC; INIT_WORK(&priv->pending_work, fe_pending_work); + u64_stats_init(&priv->hw_stats->syncp); napi_weight = 16; if (priv->flags & FE_FLAG_NAPI_WEIGHT) { diff --git a/target/linux/ramips/image/Makefile b/target/linux/ramips/image/Makefile index 446daccab..13934c5b0 100644 --- a/target/linux/ramips/image/Makefile +++ b/target/linux/ramips/image/Makefile @@ -228,10 +228,6 @@ ifeq ($(SUBTARGET),mt7620) include mt7620.mk endif -ifeq ($(SUBTARGET),mt7620nand) -include mt7620nand.mk -endif - ifeq ($(SUBTARGET),mt7621) include mt7621.mk endif diff --git a/target/linux/ramips/image/mt7620.mk b/target/linux/ramips/image/mt7620.mk index 8a20818a9..102a846e0 100644 --- a/target/linux/ramips/image/mt7620.mk +++ b/target/linux/ramips/image/mt7620.mk @@ -201,7 +201,7 @@ define Device/ex2700 BLOCKSIZE := 4k IMAGE_SIZE := $(ralink_default_fw_size_4M) IMAGES += factory.bin - KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | append-uImage-fakeroot-hdr + KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | append-uImage-fakehdr filesystem IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \ netgear-dni DEVICE_PACKAGES := -kmod-mt76 @@ -403,14 +403,14 @@ TARGET_DEVICES += oy-0001 define Device/psg1208 DTS := PSG1208 - DEVICE_TITLE := Phicomm PSG1208 (K1) + DEVICE_TITLE := Phicomm PSG1208 DEVICE_PACKAGES := kmod-mt76 endef TARGET_DEVICES += psg1208 define Device/psg1218a DTS := PSG1218A - DEVICE_TITLE := Phicomm PSG1218 rev.Ax (K2) + DEVICE_TITLE := Phicomm PSG1218 rev.Ax DEVICE_PACKAGES := kmod-mt76x2 SUPPORTED_DEVICES += psg1218 endef @@ -418,7 +418,7 @@ TARGET_DEVICES += psg1218a define Device/psg1218b DTS := PSG1218B - DEVICE_TITLE := Phicomm PSG1218 rev.Bx (K2C) + DEVICE_TITLE := Phicomm PSG1218 rev.Bx DEVICE_PACKAGES := kmod-mt76x2 SUPPORTED_DEVICES += psg1218 endef @@ -512,7 +512,7 @@ define Device/wn3000rpv3 DTS := WN3000RPV3 BLOCKSIZE := 4k IMAGES += factory.bin - KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | append-uImage-fakeroot-hdr + KERNEL := $(KERNEL_DTB) | uImage lzma | pad-offset 64k 64 | append-uImage-fakehdr filesystem IMAGE/factory.bin := $$(sysupgrade_bin) | check-size $$$$(IMAGE_SIZE) | \ netgear-dni DEVICE_TITLE := Netgear WN3000RPv3 diff --git a/target/linux/ramips/image/mt7620nand.mk b/target/linux/ramips/image/mt7620nand.mk deleted file mode 100644 index ecdf1cef4..000000000 --- a/target/linux/ramips/image/mt7620nand.mk +++ /dev/null @@ -1,22 +0,0 @@ -# -# MT7620A Profiles -# - -DEVICE_VARS += - -define Device/xiaomi_miwifi-r3 - DTS := MIWIFI-R3 - BLOCKSIZE := 128k - PAGESIZE := 2048 - KERNEL_SIZE := 4096k - KERNEL := $(KERNEL_DTB) | uImage lzma - IMAGE_SIZE := 32768k - UBINIZE_OPTS := -E 5 - IMAGES := sysupgrade.tar kernel1.bin rootfs0.bin - IMAGE/kernel1.bin := append-kernel | check-size $$$$(KERNEL_SIZE) - IMAGE/rootfs0.bin := append-ubi | check-size $$$$(IMAGE_SIZE) - IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata - DEVICE_TITLE := Xiaomi Mi Router R3 - DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-mt76x2 uboot-envtools -endef -TARGET_DEVICES += xiaomi_miwifi-r3 diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index cb2286f34..d78175cf7 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -32,7 +32,7 @@ define Device/11acnas DTS := 11ACNAS IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := WeVO 11AC NAS Router - DEVICE_PACKAGES := kmod-mt7603 kmod-usb3 kmod-usb-ledtrig-usbport + DEVICE_PACKAGES := kmod-mt7603 kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += 11acnas @@ -53,7 +53,7 @@ define Device/dir-860l-b1 seama-seal -m "signature=wrgac13_dlink.2013gui_dir860lb" | \ check-size $$$$(IMAGE_SIZE) DEVICE_TITLE := D-Link DIR-860L B1 - DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport + DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += dir-860l-b1 @@ -71,7 +71,7 @@ define Device/ew1200 DEVICE_TITLE := AFOUNDRY EW1200 DEVICE_PACKAGES := \ kmod-ata-core kmod-ata-ahci kmod-mt76x2 kmod-mt7603 kmod-usb3 \ - kmod-usb-ledtrig-usbport + kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += ew1200 @@ -79,7 +79,7 @@ define Device/firewrt DTS := FIREWRT IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := Firefly FireWRT - DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport + DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += firewrt @@ -110,7 +110,7 @@ define Device/hc5962 IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata IMAGE/factory.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | check-size $$$$(IMAGE_SIZE) DEVICE_TITLE := HiWiFi HC5962 - DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 + DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 wpad-mini endef TARGET_DEVICES += hc5962 @@ -136,7 +136,7 @@ define Device/mir3g DEVICE_TITLE := Xiaomi Mi Router 3G SUPPORTED_DEVICES += R3G DEVICE_PACKAGES := \ - kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport \ + kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini \ uboot-envtools endef TARGET_DEVICES += mir3g @@ -154,7 +154,7 @@ define Device/newifi-d1 IMAGE_SIZE := $(ralink_default_fw_size_32M) DEVICE_TITLE := Newifi D1 DEVICE_PACKAGES := \ - kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport + kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += newifi-d1 @@ -167,56 +167,16 @@ define Device/d-team_newifi-d2 endef TARGET_DEVICES += d-team_newifi-d2 -define Device/puppies - DTS := PUPPIES - IMAGE_SIZE := $(ralink_default_fw_size_16M) - DEVICE_TITLE := Puppies Device - DEVICE_PACKAGES := uboot-envtools -endef -TARGET_DEVICES += puppies - define Device/pbr-m1 DTS := PBR-M1 IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := PBR-M1 DEVICE_PACKAGES := \ kmod-ata-core kmod-ata-ahci kmod-mt7603 kmod-mt76x2 kmod-sdhci-mt7620 \ - kmod-usb3 kmod-usb-ledtrig-usbport + kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += pbr-m1 -define Device/r6220b - DTS := R6220B - BLOCKSIZE := 128k - PAGESIZE := 2048 - KERNEL_SIZE := 4096k - KERNEL := $(KERNEL_DTB) | uImage lzma - IMAGE_SIZE := 28672k - UBINIZE_OPTS := -E 5 - IMAGES := sysupgrade.tar kernel.bin rootfs.bin - IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata - IMAGE/kernel.bin := append-kernel - IMAGE/rootfs.bin := append-ubi | check-size $$$$(IMAGE_SIZE) - DEVICE_TITLE := Netgear R6220B - DEVICE_PACKAGES := \ - kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport -endef -define Device/r6220a - DTS := R6220A - BLOCKSIZE := 128k - PAGESIZE := 2048 - KERNEL_SIZE := 4096k - KERNEL := $(KERNEL_DTB) | uImage lzma - IMAGE_SIZE := 28672k - UBINIZE_OPTS := -E 5 - IMAGES := sysupgrade.tar kernel.bin rootfs.bin - IMAGE/sysupgrade.tar := sysupgrade-tar | append-metadata - IMAGE/kernel.bin := append-kernel - IMAGE/rootfs.bin := append-ubi | check-size $$$$(IMAGE_SIZE) - DEVICE_TITLE := Netgear R6220A - DEVICE_PACKAGES := \ - kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport -endef define Device/r6220 DTS := R6220 BLOCKSIZE := 128k @@ -231,9 +191,9 @@ define Device/r6220 IMAGE/rootfs.bin := append-ubi | check-size $$$$(IMAGE_SIZE) DEVICE_TITLE := Netgear R6220 DEVICE_PACKAGES := \ - kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport + kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef -TARGET_DEVICES += r6220b r6220a r6220 +TARGET_DEVICES += r6220 define Device/rb750gr3 DTS := RB750Gr3 @@ -246,7 +206,7 @@ TARGET_DEVICES += rb750gr3 define Device/re350-v1 DTS := RE350 DEVICE_TITLE := TP-LINK RE350 v1 - DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 + DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 wpad-mini TPLINK_BOARD_ID := RE350-V1 TPLINK_HWID := 0x0 TPLINK_HWREV := 0 @@ -262,14 +222,14 @@ TARGET_DEVICES += re350-v1 define Device/re6500 DTS := RE6500 DEVICE_TITLE := Linksys RE6500 - DEVICE_PACKAGES := kmod-mt76x2 + DEVICE_PACKAGES := kmod-mt76x2 wpad-mini endef TARGET_DEVICES += re6500 define Device/sap-g3200u3 DTS := SAP-G3200U3 DEVICE_TITLE := STORYLiNK SAP-G3200U3 - DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport + DEVICE_PACKAGES := kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += sap-g3200u3 @@ -279,7 +239,7 @@ define Device/sk-wb8 DEVICE_TITLE := SamKnows Whitebox 8 DEVICE_PACKAGES := \ kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport \ - uboot-envtools + uboot-envtools wpad-mini endef TARGET_DEVICES += sk-wb8 @@ -331,7 +291,8 @@ define Device/w2914nsv2 IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := WeVO W2914NS v2 DEVICE_PACKAGES := \ - kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport kmod-mt76 + kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-usb-ledtrig-usbport kmod-mt76 \ + wpad-mini endef TARGET_DEVICES += w2914nsv2 @@ -355,7 +316,7 @@ define Device/witi DEVICE_TITLE := MQmaker WiTi DEVICE_PACKAGES := \ kmod-ata-core kmod-ata-ahci kmod-mt76x2 kmod-sdhci-mt7620 kmod-usb3 \ - kmod-usb-ledtrig-usbport + kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += witi @@ -363,7 +324,7 @@ define Device/wndr3700v5 DTS := WNDR3700V5 IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := Netgear WNDR3700v5 - DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 + DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 kmod-usb3 wpad-mini endef TARGET_DEVICES += wndr3700v5 @@ -381,7 +342,7 @@ define Device/wsr-1166 IMAGE/sysupgrade.bin := trx | pad-rootfs | append-metadata IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := Buffalo WSR-1166 - DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 + DEVICE_PACKAGES := kmod-mt7603 kmod-mt76x2 wpad-mini endef TARGET_DEVICES += wsr-1166 @@ -389,7 +350,7 @@ define Device/wsr-600 DTS := WSR-600 IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := Buffalo WSR-600 - DEVICE_PACKAGES := kmod-mt7603 kmod-rt2800-pci + DEVICE_PACKAGES := kmod-mt7603 kmod-rt2800-pci wpad-mini endef TARGET_DEVICES += wsr-600 @@ -398,7 +359,7 @@ define Device/zbt-we1326 IMAGE_SIZE := $(ralink_default_fw_size_16M) DEVICE_TITLE := ZBT WE1326 DEVICE_PACKAGES := \ - kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-sdhci-mt7620 + kmod-mt7603 kmod-mt76x2 kmod-usb3 kmod-sdhci-mt7620 wpad-mini endef TARGET_DEVICES += zbt-we1326 @@ -408,7 +369,7 @@ define Device/zbtlink_zbt-we3526 DEVICE_TITLE := ZBT WE3526 DEVICE_PACKAGES := \ kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \ - kmod-usb3 kmod-usb-ledtrig-usbport + kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += zbtlink_zbt-we3526 @@ -418,7 +379,7 @@ define Device/zbt-wg2626 DEVICE_TITLE := ZBT WG2626 DEVICE_PACKAGES := \ kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt76x2 kmod-usb3 \ - kmod-usb-ledtrig-usbport + kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += zbt-wg2626 @@ -429,7 +390,7 @@ define Device/zbt-wg3526-16M DEVICE_TITLE := ZBT WG3526 (16MB flash) DEVICE_PACKAGES := \ kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \ - kmod-usb3 kmod-usb-ledtrig-usbport + kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += zbt-wg3526-16M @@ -440,7 +401,7 @@ define Device/zbt-wg3526-32M DEVICE_TITLE := ZBT WG3526 (32MB flash) DEVICE_PACKAGES := \ kmod-ata-core kmod-ata-ahci kmod-sdhci-mt7620 kmod-mt7603 kmod-mt76x2 \ - kmod-usb3 kmod-usb-ledtrig-usbport + kmod-usb3 kmod-usb-ledtrig-usbport wpad-mini endef TARGET_DEVICES += zbt-wg3526-32M diff --git a/target/linux/ramips/image/rt305x.mk b/target/linux/ramips/image/rt305x.mk index a3259dd29..bc1941f90 100644 --- a/target/linux/ramips/image/rt305x.mk +++ b/target/linux/ramips/image/rt305x.mk @@ -652,7 +652,7 @@ TARGET_DEVICES += rt-n10-plus define Device/rt-n13u DTS := RT-N13U DEVICE_TITLE := Asus RT-N13U - DEVICE_PACKAGES := kmod-leds-gpio kmod-rt2800-pci kmod-usb-dwc2 + DEVICE_PACKAGES := kmod-leds-gpio kmod-rt2800-pci wpad-mini kmod-usb-dwc2 endef TARGET_DEVICES += rt-n13u diff --git a/target/linux/ramips/mt7620/config-4.14 b/target/linux/ramips/mt7620/config-4.14 index 07b597c41..3e006e2ef 100644 --- a/target/linux/ramips/mt7620/config-4.14 +++ b/target/linux/ramips/mt7620/config-4.14 @@ -159,7 +159,6 @@ CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MTD_CFI_INTELEXT is not set CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_M25P80=y -# CONFIG_MTD_NAND_MT7620 is not set CONFIG_MTD_PHYSMAP=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y diff --git a/target/linux/ramips/mt7620nand/profiles/00-default.mk b/target/linux/ramips/mt7620nand/profiles/00-default.mk deleted file mode 100644 index 912d28880..000000000 --- a/target/linux/ramips/mt7620nand/profiles/00-default.mk +++ /dev/null @@ -1,17 +0,0 @@ -# -# Copyright (C) 2011 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -define Profile/Default - NAME:=Default Profile - PACKAGES:= kmod-usb-core kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport - PRIORITY:=1 -endef - -define Profile/Default/Description - Default package set compatible with most boards. -endef -$(eval $(call Profile,Default)) diff --git a/target/linux/ramips/mt7620nand/target.mk b/target/linux/ramips/mt7620nand/target.mk deleted file mode 100644 index 178c85668..000000000 --- a/target/linux/ramips/mt7620nand/target.mk +++ /dev/null @@ -1,15 +0,0 @@ -# -# Copyright (C) 2009 OpenWrt.org -# - -SUBTARGET:=mt7620nand -BOARDNAME:=MT7620 based boards with NAND flash -FEATURES+=nand usb -CPU_TYPE:=24kc - -DEFAULT_PACKAGES += kmod-rt2800-pci kmod-rt2800-soc wpad-mini - -define Target/Description - Build firmware images for Ralink MT7620 based boards with NAND flash. -endef - diff --git a/target/linux/ramips/mt7621/target.mk b/target/linux/ramips/mt7621/target.mk index 73d2b751e..3c965abbe 100644 --- a/target/linux/ramips/mt7621/target.mk +++ b/target/linux/ramips/mt7621/target.mk @@ -7,8 +7,6 @@ BOARDNAME:=MT7621 based boards FEATURES+=nand ramdisk rtc usb CPU_TYPE:=24kc -DEFAULT_PACKAGES += wpad-mini - define Target/Description Build firmware images for Ralink MT7621 based boards. endef diff --git a/target/linux/ramips/mt76x8/config-4.14 b/target/linux/ramips/mt76x8/config-4.14 index c8a20929a..0939aa4d4 100644 --- a/target/linux/ramips/mt76x8/config-4.14 +++ b/target/linux/ramips/mt76x8/config-4.14 @@ -159,7 +159,6 @@ CONFIG_MT7621_WDT=y # CONFIG_MTD_CFI_INTELEXT is not set CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_M25P80=y -# CONFIG_MTD_NAND_MT7620 is not set CONFIG_MTD_PHYSMAP=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPLIT_FIRMWARE=y diff --git a/target/linux/ramips/patches-4.14/0032-USB-dwc2-add-device_reset.patch b/target/linux/ramips/patches-4.14/0032-USB-dwc2-add-device_reset.patch index 623eaf729..7d3352e92 100644 --- a/target/linux/ramips/patches-4.14/0032-USB-dwc2-add-device_reset.patch +++ b/target/linux/ramips/patches-4.14/0032-USB-dwc2-add-device_reset.patch @@ -18,7 +18,7 @@ Signed-off-by: John Crispin #include #include -@@ -5072,6 +5073,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hso +@@ -5075,6 +5076,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hso retval = -ENOMEM; diff --git a/target/linux/ramips/patches-4.14/0038-mtd-ralink-add-mt7620-nand-driver.patch b/target/linux/ramips/patches-4.14/0038-mtd-ralink-add-mt7620-nand-driver.patch deleted file mode 100644 index 04b6e8fef..000000000 --- a/target/linux/ramips/patches-4.14/0038-mtd-ralink-add-mt7620-nand-driver.patch +++ /dev/null @@ -1,2385 +0,0 @@ -From 71b417d65f77cc115544cd404c5330d54d596d2a Mon Sep 17 00:00:00 2001 -From: Chen Minqiang -Date: Sat, 10 Mar 2018 14:04:36 +0800 -Subject: [PATCH 38/53] mtd: ralink: add mt7620 nand driver - -refine && code clean up - -Signed-off-by: Chen Minqiang ---- - drivers/mtd/maps/Kconfig | 4 + - drivers/mtd/maps/Makefile | 2 + - drivers/mtd/maps/ralink_nand.c | 2098 ++++++++++++++++++++++++++++++++++++++++ - drivers/mtd/maps/ralink_nand.h | 232 +++++ - 4 files changed, 2336 insertions(+) - create mode 100644 drivers/mtd/maps/ralink_nand.c - create mode 100644 drivers/mtd/maps/ralink_nand.h - -diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig -index 542fdf8..0f09ab5 100644 ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -419,4 +419,8 @@ config MTD_LATCH_ADDR - - If compiled as a module, it will be called latch-addr-flash. - -+config MTD_NAND_MT7620 -+ tristate "Support for NAND on Mediatek MT7620" -+ depends on RALINK && SOC_MT7620 -+ - endmenu -diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile -index b849aaf..8e65523 100644 ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -48,3 +48,5 @@ obj-$(CONFIG_MTD_VMU) += vmu-flash.o - obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o - obj-$(CONFIG_MTD_LATCH_ADDR) += latch-addr-flash.o - obj-$(CONFIG_MTD_LANTIQ) += lantiq-flash.o -+obj-$(CONFIG_MTD_NAND_MT7620) += ralink_nand.o -+ -diff --git a/drivers/mtd/maps/ralink_nand.c b/drivers/mtd/maps/ralink_nand.c -new file mode 100644 -index 0000000..370bbb2 ---- /dev/null -+++ b/drivers/mtd/maps/ralink_nand.c -@@ -0,0 +1,2098 @@ -+#define DEBUG -+#include -+#undef DEBUG -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "ralink_nand.h" -+#ifdef RANDOM_GEN_BAD_BLOCK -+#include -+#endif -+ -+#define LARGE_MTD_BOOT_PART_SIZE (CFG_BLOCKSIZE<<2) -+#define LARGE_MTD_CONFIG_PART_SIZE (CFG_BLOCKSIZE<<2) -+#define LARGE_MTD_FACTORY_PART_SIZE (CFG_BLOCKSIZE<<1) -+ -+#define BLOCK_ALIGNED(a) ((a) & (CFG_BLOCKSIZE - 1)) -+ -+#define READ_STATUS_RETRY 1000 -+ -+struct nand_ecclayout { -+ __u32 eccbytes; -+ __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE]; -+ __u32 oobavail; -+ struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES_LARGE]; -+}; -+ -+struct mtd_info *ranfc_mtd = NULL; -+ -+int skipbbt = 0; -+int ranfc_debug = 1; -+static int ranfc_bbt = 1; -+#if defined (WORKAROUND_RX_BUF_OV) -+static int ranfc_verify = 1; -+#endif -+static u32 nand_addrlen; -+ -+#if 0 -+module_param(ranfc_debug, int, 0644); -+module_param(ranfc_bbt, int, 0644); -+module_param(ranfc_verify, int, 0644); -+#endif -+ -+#if 0 -+#define ra_dbg(args...) do { if (ranfc_debug) printk(args); } while(0) -+#else -+#define ra_dbg(args...) -+#endif -+ -+#define CLEAR_INT_STATUS() ra_outl(NFC_INT_ST, ra_inl(NFC_INT_ST)) -+#define NFC_TRANS_DONE() (ra_inl(NFC_INT_ST) & INT_ST_ND_DONE) -+ -+int is_nand_page_2048 = 0; -+const unsigned int nand_size_map[2][3] = {{25, 30, 30}, {20, 27, 30}}; -+ -+static int nfc_wait_ready(int snooze_ms); -+ -+static const char * const mtk_probe_types[] = { "cmdlinepart", "ofpart", NULL }; -+ -+/** -+ * reset nand chip -+ */ -+static int nfc_chip_reset(void) -+{ -+ int status; -+ -+ //ra_dbg("%s:\n", __func__); -+ -+ // reset nand flash -+ ra_outl(NFC_CMD1, 0x0); -+ ra_outl(NFC_CMD2, 0xff); -+ ra_outl(NFC_ADDR, 0x0); -+ ra_outl(NFC_CONF, 0x0411); -+ -+ status = nfc_wait_ready(5); //erase wait 5us -+ if (status & NAND_STATUS_FAIL) { -+ printk("%s: fail \n", __func__); -+ } -+ -+ return (int)(status & NAND_STATUS_FAIL); -+} -+ -+/** -+ * clear NFC and flash chip. -+ */ -+static int nfc_all_reset(void) -+{ -+ int retry; -+ -+ ra_dbg("%s: \n", __func__); -+ -+ // reset controller -+ ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer -+ ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer -+ -+ CLEAR_INT_STATUS(); -+ -+ retry = READ_STATUS_RETRY; -+ while ((ra_inl(NFC_INT_ST) & 0x02) != 0x02 && retry--); -+ if (retry <= 0) { -+ printk("nfc_all_reset: clean buffer fail \n"); -+ return -1; -+ } -+ -+ retry = READ_STATUS_RETRY; -+ while ((ra_inl(NFC_STATUS) & 0x1) != 0x0 && retry--) { //fixme, controller is busy ? -+ udelay(1); -+ } -+ -+ nfc_chip_reset(); -+ -+ return 0; -+} -+ -+/** NOTICE: only called by nfc_wait_ready(). -+ * @return -1, nfc can not get transction done -+ * @return 0, ok. -+ */ -+static int _nfc_read_status(char *status) -+{ -+ unsigned long cmd1, conf; -+ int int_st, nfc_st; -+ int retry; -+ -+ cmd1 = 0x70; -+ conf = 0x000101 | (1 << 20); -+ -+ //fixme, should we check nfc status? -+ CLEAR_INT_STATUS(); -+ -+ ra_outl(NFC_CMD1, cmd1); -+ ra_outl(NFC_CONF, conf); -+ -+ /* FIXME, -+ * 1. since we have no wired ready signal, directly -+ * calling this function is not gurantee to read right status under ready state. -+ * 2. the other side, we can not determine how long to become ready, this timeout retry is nonsense. -+ * 3. SUGGESTION: call nfc_read_status() from nfc_wait_ready(), -+ * that is aware about caller (in sementics) and has snooze plused nfc ND_DONE. -+ */ -+ retry = READ_STATUS_RETRY; -+ do { -+ nfc_st = ra_inl(NFC_STATUS); -+ int_st = ra_inl(NFC_INT_ST); -+ -+ ndelay(10); -+ } while (!(int_st & INT_ST_RX_BUF_RDY) && retry--); -+ -+ if (!(int_st & INT_ST_RX_BUF_RDY)) { -+ printk("nfc_read_status: NFC fail, int_st(%x), retry:%x. nfc:%x, reset nfc and flash. \n", -+ int_st, retry, nfc_st); -+ nfc_all_reset(); -+ *status = NAND_STATUS_FAIL; -+ return -1; -+ } -+ -+ *status = (char)(le32_to_cpu(ra_inl(NFC_DATA)) & 0x0ff); -+ return 0; -+} -+ -+/** -+ * @return !0, chip protect. -+ * @return 0, chip not protected. -+ */ -+static int nfc_check_wp(void) -+{ -+ /* Check the WP bit */ -+#if !defined CONFIG_NOT_SUPPORT_WP -+ return !!(ra_inl(NFC_CTRL) & 0x01); -+#else -+ char result = 0; -+ int ret; -+ -+ ret = _nfc_read_status(&result); -+ //FIXME, if ret < 0 -+ -+ return !(result & NAND_STATUS_WP); -+#endif -+} -+ -+#if !defined CONFIG_NOT_SUPPORT_RB -+/* -+ * @return !0, chip ready. -+ * @return 0, chip busy. -+ */ -+static int nfc_device_ready(void) -+{ -+ /* Check the ready */ -+ return !!(ra_inl(NFC_STATUS) & 0x04); -+} -+#endif -+ -+/** -+ * generic function to get data from flash. -+ * @return data length reading from flash. -+ */ -+static int _ra_nand_pull_data(char *buf, int len, int use_gdma) -+{ -+#ifdef RW_DATA_BY_BYTE -+ char *p = buf; -+#else -+ __u32 *p = (__u32 *)buf; -+#endif -+ int retry, int_st; -+ unsigned int ret_data; -+ int ret_size; -+ -+ // receive data by use_gdma -+ if (use_gdma) { -+ //if (_ra_nand_dma_pull((unsigned long)p, len)) { -+ if (1) { -+ printk("%s: fail \n", __func__); -+ len = -1; //return error -+ } -+ -+ return len; -+ } -+ -+ //fixme: retry count size? -+ retry = READ_STATUS_RETRY; -+ // no gdma -+ while (len > 0) { -+ int_st = ra_inl(NFC_INT_ST); -+ if (int_st & INT_ST_RX_BUF_RDY) { -+ -+ ret_data = ra_inl(NFC_DATA); -+ ra_outl(NFC_INT_ST, INT_ST_RX_BUF_RDY); -+#ifdef RW_DATA_BY_BYTE -+ ret_size = sizeof(unsigned int); -+ ret_size = min(ret_size, len); -+ len -= ret_size; -+ while (ret_size-- > 0) { -+ //nfc is little endian -+ *p++ = ret_data & 0x0ff; -+ ret_data >>= 8; -+ } -+#else -+ ret_size = min(len, 4); -+ len -= ret_size; -+ if (ret_size == 4) -+ *p++ = ret_data; -+ else { -+ __u8 *q = (__u8 *)p; -+ while (ret_size-- > 0) { -+ *q++ = ret_data & 0x0ff; -+ ret_data >>= 8; -+ } -+ p = (__u32 *)q; -+ } -+#endif -+ retry = READ_STATUS_RETRY; -+ } -+ else if (int_st & INT_ST_ND_DONE) { -+ break; -+ } -+ else { -+ udelay(1); -+ if (retry-- < 0) -+ break; -+ } -+ } -+ -+#ifdef RW_DATA_BY_BYTE -+ return (int)(p - buf); -+#else -+ return ((int)p - (int)buf); -+#endif -+} -+ -+/** -+ * generic function to put data into flash. -+ * @return data length writing into flash. -+ */ -+static int _ra_nand_push_data(char *buf, int len, int use_gdma) -+{ -+#ifdef RW_DATA_BY_BYTE -+ char *p = buf; -+#else -+ __u32 *p = (__u32 *)buf; -+#endif -+ int retry, int_st; -+ unsigned int tx_data = 0; -+ int tx_size, iter = 0; -+ -+ // receive data by use_gdma -+ if (use_gdma) { -+ //if (_ra_nand_dma_push((unsigned long)p, len)) -+ if (1) -+ len = 0; -+ printk("%s: fail \n", __func__); -+ return len; -+ } -+ -+ // no gdma -+ retry = READ_STATUS_RETRY; -+ while (len > 0) { -+ int_st = ra_inl(NFC_INT_ST); -+ if (int_st & INT_ST_TX_BUF_RDY) { -+#ifdef RW_DATA_BY_BYTE -+ tx_size = min(len, (int)sizeof(unsigned long)); -+ for (iter = 0; iter < tx_size; iter++) { -+ tx_data |= (*p++ << (8*iter)); -+ } -+#else -+ tx_size = min(len, 4); -+ if (tx_size == 4) -+ tx_data = (*p++); -+ else { -+ __u8 *q = (__u8 *)p; -+ for (iter = 0; iter < tx_size; iter++) -+ tx_data |= (*q++ << (8*iter)); -+ p = (__u32 *)q; -+ } -+#endif -+ ra_outl(NFC_INT_ST, INT_ST_TX_BUF_RDY); -+ ra_outl(NFC_DATA, tx_data); -+ len -= tx_size; -+ retry = READ_STATUS_RETRY; -+ } -+ else if (int_st & INT_ST_ND_DONE) { -+ break; -+ } -+ else { -+ udelay(1); -+ if (retry-- < 0) { -+ ra_dbg("%s p:%p buf:%p \n", __func__, p, buf); -+ break; -+ } -+ } -+ } -+ -+#ifdef RW_DATA_BY_BYTE -+ return (int)(p - buf); -+#else -+ return ((int)p - (int)buf); -+#endif -+} -+ -+static int nfc_select_chip(struct ra_nand_chip *ra, int chipnr) -+{ -+#if (CONFIG_NUMCHIPS == 1) -+ if (!(chipnr < CONFIG_NUMCHIPS)) -+ return -1; -+ return 0; -+#else -+ BUG(); -+#endif -+} -+ -+/** @return -1: chip_select fail -+ * 0 : both CE and WP==0 are OK -+ * 1 : CE OK and WP==1 -+ */ -+static int nfc_enable_chip(struct ra_nand_chip *ra, unsigned int offs, int read_only) -+{ -+ int chipnr = offs >> ra->chip_shift; -+ -+ ra_dbg("%s: offs:%x read_only:%x \n", __func__, offs, read_only); -+ -+ chipnr = nfc_select_chip(ra, chipnr); -+ if (chipnr < 0) { -+ printk("%s: chip select error, offs(%x)\n", __func__, offs); -+ return -1; -+ } -+ -+ if (!read_only) -+ return nfc_check_wp(); -+ -+ return 0; -+} -+ -+/** wait nand chip becomeing ready and return queried status. -+ * @param snooze: sleep time in ms unit before polling device ready. -+ * @return status of nand chip -+ * @return NAN_STATUS_FAIL if something unexpected. -+ */ -+static int nfc_wait_ready(int snooze_ms) -+{ -+ int retry; -+ char status; -+ -+ // wait nfc idle, -+ if (snooze_ms == 0) -+ snooze_ms = 1; -+ else -+ schedule_timeout(snooze_ms * HZ / 1000); -+ -+ snooze_ms = retry = snooze_ms *1000000 / 100 ; // ndelay(100) -+ -+ while (!NFC_TRANS_DONE() && retry--) { -+ if (!cond_resched()) -+ ndelay(100); -+ } -+ -+ if (!NFC_TRANS_DONE()) { -+ printk("nfc_wait_ready: no transaction done \n"); -+ return NAND_STATUS_FAIL; -+ } -+ -+#if !defined (CONFIG_NOT_SUPPORT_RB) -+ //fixme -+ while(!(status = nfc_device_ready()) && retry--) { -+ ndelay(100); -+ } -+ -+ if (status == 0) { -+ printk("nfc_wait_ready: no device ready. \n"); -+ return NAND_STATUS_FAIL; -+ } -+ -+ _nfc_read_status(&status); -+ return status; -+#else -+ -+ while(retry--) { -+ _nfc_read_status(&status); -+ if (status & NAND_STATUS_READY) -+ break; -+ ndelay(100); -+ } -+ if (retry<0) -+ printk("nfc_wait_ready 2: no device ready, status(%x). \n", status); -+ -+ return status; -+#endif -+} -+ -+/** -+ * return 0: erase OK -+ * return -EIO: fail -+ */ -+int nfc_erase_block(struct ra_nand_chip *ra, int row_addr) -+{ -+ unsigned long cmd1, cmd2, bus_addr, conf; -+ char status; -+ -+ cmd1 = 0x60; -+ cmd2 = 0xd0; -+ bus_addr = row_addr; -+ conf = 0x00511 | ((CFG_ROW_ADDR_CYCLE)<<16); -+ -+ // set NFC -+ ra_dbg("%s: cmd1: %lx, cmd2:%lx bus_addr: %lx, conf: %lx \n", -+ __func__, cmd1, cmd2, bus_addr, conf); -+ -+ //fixme, should we check nfc status? -+ CLEAR_INT_STATUS(); -+ -+ ra_outl(NFC_CMD1, cmd1); -+ ra_outl(NFC_CMD2, cmd2); -+ ra_outl(NFC_ADDR, bus_addr); -+ ra_outl(NFC_CONF, conf); -+ -+ status = nfc_wait_ready(3); //erase wait 3ms -+ if (status & NAND_STATUS_FAIL) { -+ printk("%s: fail \n", __func__); -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+static inline int _nfc_read_raw_data(int cmd1, int cmd2, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags) -+{ -+ int ret; -+ -+ CLEAR_INT_STATUS(); -+ ra_outl(NFC_CMD1, cmd1); -+ ra_outl(NFC_CMD2, cmd2); -+ ra_outl(NFC_ADDR, bus_addr); -+#if defined (CONFIG_SOC_MT7620) -+ ra_outl(NFC_ADDR2, bus_addr2); -+#endif -+ ra_outl(NFC_CONF, conf); -+ -+ ret = _ra_nand_pull_data(buf, len, 0); -+ if (ret != len) { -+ ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len); -+ return NAND_STATUS_FAIL; -+ } -+ -+ //FIXME, this section is not necessary -+ ret = nfc_wait_ready(0); //wait ready -+ /* to prevent the DATA FIFO 's old data from next operation */ -+ ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer -+ ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer -+ -+ if (ret & NAND_STATUS_FAIL) { -+ printk("%s: fail \n", __func__); -+ return NAND_STATUS_FAIL; -+ } -+ -+ return 0; -+} -+ -+static inline int _nfc_write_raw_data(int cmd1, int cmd3, int bus_addr, int bus_addr2, int conf, char *buf, int len, int flags) -+{ -+ int ret; -+ -+ CLEAR_INT_STATUS(); -+ ra_outl(NFC_CMD1, cmd1); -+ ra_outl(NFC_CMD3, cmd3); -+ ra_outl(NFC_ADDR, bus_addr); -+#if defined (CONFIG_SOC_MT7620) -+ ra_outl(NFC_ADDR2, bus_addr2); -+#endif -+ ra_outl(NFC_CONF, conf); -+ -+ ret = _ra_nand_push_data(buf, len, 0); -+ if (ret != len) { -+ ra_dbg("%s: ret:%x (%x) \n", __func__, ret, len); -+ return NAND_STATUS_FAIL; -+ } -+ -+ ret = nfc_wait_ready(1); //write wait 1ms -+ /* to prevent the DATA FIFO 's old data from next operation */ -+ ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x02); //clear data buffer -+ ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) & ~0x02); //clear data buffer -+ -+ if (ret & NAND_STATUS_FAIL) { -+ printk("%s: fail \n", __func__); -+ return NAND_STATUS_FAIL; -+ } -+ -+ return 0; -+} -+ -+/** -+ * @return !0: fail -+ * @return 0: OK -+ */ -+int nfc_read_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags) -+{ -+ unsigned int cmd1 = 0, cmd2 = 0, conf = 0; -+ unsigned int bus_addr = 0, bus_addr2 = 0; -+ unsigned int ecc_en; -+ int use_gdma; -+ int status; -+ -+ int pages_perblock = 1<<(ra->erase_shift - ra->page_shift); -+ // constrain of nfc read function -+ -+#if defined (WORKAROUND_RX_BUF_OV) -+ BUG_ON (len > 60); //problem of rx-buffer overrun -+#endif -+ BUG_ON (offs >> ra->oob_shift); //page boundry -+ BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) > -+ ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry -+ -+ use_gdma = flags & FLAG_USE_GDMA; -+ ecc_en = flags & FLAG_ECC_EN; -+ bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<> (CFG_COLUMN_ADDR_CYCLE*8); -+ cmd1 = 0x0; -+ cmd2 = 0x30; -+ conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20); -+ } -+ else { -+ cmd1 = 0x50; -+ conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20); -+ } -+ if (ecc_en) -+ conf |= (1<<3); -+ if (use_gdma) -+ conf |= (1<<2); -+ -+ ra_dbg("%s: cmd1:%x, bus_addr:%x, conf:%x, len:%x, flag:%x\n", -+ __func__, cmd1, bus_addr, conf, len, flags); -+ -+ status = _nfc_read_raw_data(cmd1, cmd2, bus_addr, bus_addr2, conf, buf, len, flags); -+ if (status & NAND_STATUS_FAIL) { -+ printk("%s: fail\n", __func__); -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+/** -+ * @return !0: fail -+ * @return 0: OK -+ */ -+int nfc_write_oob(struct ra_nand_chip *ra, int page, unsigned int offs, char *buf, int len, int flags) -+{ -+ unsigned int cmd1 = 0, cmd3=0, conf = 0; -+ unsigned int bus_addr = 0, bus_addr2 = 0; -+ int use_gdma; -+ int status; -+ -+ int pages_perblock = 1<<(ra->erase_shift - ra->page_shift); -+ // constrain of nfc read function -+ -+ BUG_ON (offs >> ra->oob_shift); //page boundry -+ BUG_ON ((unsigned int)(((offs + len) >> ra->oob_shift) + page) > -+ ((page + pages_perblock) & ~(pages_perblock-1))); //block boundry -+ -+ use_gdma = flags & FLAG_USE_GDMA; -+ bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<> (CFG_COLUMN_ADDR_CYCLE*8); -+ conf = 0x001123 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20); -+ } -+ else { -+ cmd1 = 0x08050; -+ cmd3 = 0x10; -+ conf = 0x001223 | ((CFG_ADDR_CYCLE)<<16) | ((len) << 20); -+ } -+ if (use_gdma) -+ conf |= (1<<2); -+ -+ // set NFC -+ ra_dbg("%s: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n", -+ __func__, cmd1, cmd3, bus_addr, conf, len); -+ -+ status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, len, flags); -+ if (status & NAND_STATUS_FAIL) { -+ printk("%s: fail \n", __func__); -+ return -EIO; -+ } -+ -+ return 0; -+} -+ -+ -+int nfc_read_page(struct ra_nand_chip *ra, char *buf, int page, int flags); -+int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags); -+ -+ -+#if !defined (WORKAROUND_RX_BUF_OV) -+static int one_bit_correction(char *ecc, char *expected, int *bytes, int *bits); -+int nfc_ecc_verify(struct ra_nand_chip *ra, char *buf, int page, int mode) -+{ -+ int ret, i; -+ char *p, *e; -+ int ecc; -+ -+ //ra_dbg("%s, page:%x mode:%d\n", __func__, page, mode); -+ -+ if (mode == FL_WRITING) { -+ int len = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; -+ int conf = 0x000141| ((CFG_ADDR_CYCLE)<<16) | (len << 20); -+ conf |= (1<<3); //(ecc_en) -+ //conf |= (1<<2); // (use_gdma) -+ -+ p = ra->readback_buffers; -+ ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN); -+ if (ret == 0) -+ goto ecc_check; -+ -+ //FIXME, double comfirm -+ printk("%s: read back fail, try again \n",__func__); -+ ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_ECC_EN); -+ if (ret != 0) { -+ printk("\t%s: read back fail agian \n",__func__); -+ goto bad_block; -+ } -+ } -+ else if (mode == FL_READING) { -+ p = buf; -+ } -+ else -+ return -2; -+ -+ecc_check: -+ p += CFG_PAGESIZE; -+ if (!is_nand_page_2048) { -+ ecc = ra_inl(NFC_ECC); -+ if (ecc == 0) //clean page. -+ return 0; -+ e = (char*)&ecc; -+ for (i=0; ireadback_buffers, page, FLAG_NONE); -+ if (ret != 0) //double comfirm -+ ret = nfc_read_page(ra, ra->readback_buffers, page, FLAG_NONE); -+ -+ if (ret != 0) { -+ printk("%s: mode:%x read back fail \n", __func__, mode); -+ return -1; -+ } -+ return memcmp(buf, ra->readback_buffers, 1<page_shift); -+ } -+ -+ if (mode == FL_READING) { -+#if 0 -+ if (ra->sandbox_page == 0) -+ return 0; -+ -+ ret = nfc_write_page(ra, buf, ra->sandbox_page, FLAG_USE_GDMA | FLAG_ECC_EN); -+ if (ret != 0) { -+ printk("%s, fail write sandbox_page \n", __func__); -+ return -1; -+ } -+#else -+ /** @note: -+ * The following command is actually not 'write' command to drive NFC to write flash. -+ * However, it can make NFC to calculate ECC, that will be used to compare with original ones. -+ * --YT -+ */ -+ unsigned int conf = 0x001223| (CFG_ADDR_CYCLE<<16) | (0x200 << 20) | (1<<3) | (1<<2); -+ _nfc_write_raw_data(0xff, 0xff, ra->sandbox_page<page_shift, conf, buf, 0x200, FLAG_USE_GDMA); -+#endif -+ -+ ecc = ra_inl(NFC_ECC); -+ if (ecc == 0) //clean page. -+ return 0; -+ e = (char*)&ecc; -+ p = buf + (1<page_shift); -+ for (i=0; i 0) { -+ int len; -+#if defined (WORKAROUND_RX_BUF_OV) -+ len = min(60, size); -+#else -+ len = size; -+#endif -+ bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)) | (offs & ((1<> (CFG_COLUMN_ADDR_CYCLE*8); -+ cmd1 = 0x0; -+ cmd2 = 0x30; -+ conf = 0x000511| ((CFG_ADDR_CYCLE)<<16) | (len << 20); -+ } -+ else { -+ if (offs & ~(CFG_PAGESIZE-1)) -+ cmd1 = 0x50; -+ else if (offs & ~((1<buffers_page = -1; //cached -+ } -+ -+ return 0; -+} -+ -+ -+/** -+ * @return -EIO, fail to write -+ * @return 0, OK -+ */ -+int nfc_write_page(struct ra_nand_chip *ra, char *buf, int page, int flags) -+{ -+ unsigned int cmd1 = 0, cmd3, conf = 0; -+ unsigned int bus_addr = 0, bus_addr2 = 0; -+ unsigned int ecc_en; -+ int use_gdma; -+ int size; -+ char status; -+ uint8_t *oob = buf + (1<page_shift); -+ -+ use_gdma = flags & FLAG_USE_GDMA; -+ ecc_en = flags & FLAG_ECC_EN; -+ -+ oob[ra->badblockpos] = 0xff; //tag as good block. -+ ra->buffers_page = -1; //cached -+ -+ page = page & (CFG_CHIPSIZE-1); //chip boundary -+ size = CFG_PAGESIZE + CFG_PAGE_OOBSIZE; //add oobsize -+ bus_addr = (page << (CFG_COLUMN_ADDR_CYCLE*8)); //write_page always write from offset 0. -+ -+ if (is_nand_page_2048) { -+ bus_addr2 = page >> (CFG_COLUMN_ADDR_CYCLE*8); -+ cmd1 = 0x80; -+ cmd3 = 0x10; -+ conf = 0x001123| ((CFG_ADDR_CYCLE)<<16) | (size << 20); -+ } -+ else { -+ cmd1 = 0x8000; -+ cmd3 = 0x10; -+ conf = 0x001223| ((CFG_ADDR_CYCLE)<<16) | (size << 20); -+ } -+ if (ecc_en) -+ conf |= (1<<3); //enable ecc -+ if (use_gdma) -+ conf |= (1<<2); -+ -+ // set NFC -+ ra_dbg("nfc_write_page: cmd1: %x, cmd3: %x bus_addr: %x, conf: %x, len:%x\n", -+ cmd1, cmd3, bus_addr, conf, size); -+ -+ status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags); -+ if (status & NAND_STATUS_FAIL) { -+ printk("%s: fail \n", __func__); -+ return -EIO; -+ } -+ -+ -+ if (flags & FLAG_VERIFY) { // verify and correct ecc -+ status = nfc_ecc_verify(ra, buf, page, FL_WRITING); -+ -+#ifdef RANDOM_GEN_BAD_BLOCK -+ if (((random32() & 0x1ff) == 0x0) && (page >= 0x100)) // randomly create bad block -+ { -+ printk("hmm... create a bad block at page %x\n", (bus_addr >> 16)); -+ status = -1; -+ } -+#endif -+ -+ if (status != 0) { -+ printk("%s: ecc_verify fail: ret:%x \n", __func__, status); -+ oob[ra->badblockpos] = 0x33; -+ page -= page % (CFG_BLOCKSIZE/CFG_PAGESIZE); -+ printk("create a bad block at page %x\n", page); -+ if (!is_nand_page_2048) -+ status = nfc_write_oob(ra, page, ra->badblockpos, oob+ra->badblockpos, 1, flags); -+ else -+ { -+ status = _nfc_write_raw_data(cmd1, cmd3, bus_addr, bus_addr2, conf, buf, size, flags); -+ nfc_write_oob(ra, page, 0, oob, 16, FLAG_NONE); -+ } -+ return -EBADMSG; -+ } -+ } -+ -+ ra->buffers_page = page; //cached -+ return 0; -+} -+ -+ -+ -+/************************************************************* -+ * nand internal process -+ *************************************************************/ -+ -+/** -+ * nand_release_device - [GENERIC] release chip -+ * @mtd: MTD device structure -+ * -+ * Deselect, release chip lock and wake up anyone waiting on the device -+ */ -+static void nand_release_device(struct ra_nand_chip *ra) -+{ -+ /* De-select the NAND device */ -+ nfc_select_chip(ra, -1); -+ -+ /* Release the controller and the chip */ -+ ra->state = FL_READY; -+ -+ mutex_unlock(ra->controller); -+} -+ -+/** -+ * nand_get_device - [GENERIC] Get chip for selected access -+ * @chip: the nand chip descriptor -+ * @mtd: MTD device structure -+ * @new_state: the state which is requested -+ * -+ * Get the device and lock it for exclusive access -+ */ -+static int -+nand_get_device(struct ra_nand_chip *ra, int new_state) -+{ -+ int ret = 0; -+ -+ ret = mutex_lock_interruptible(ra->controller); -+ if (!ret) -+ ra->state = new_state; -+ -+ return ret; -+} -+ -+/************************************************************* -+ * nand internal process -+ *************************************************************/ -+ -+int ra_nand_bbt_get(struct ra_nand_chip *ra, int block) -+{ -+ int byte, bits; -+ bits = block * BBTTAG_BITS; -+ -+ byte = bits / 8; -+ bits = bits % 8; -+ -+ return (ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK; -+} -+ -+int ra_nand_bbt_set(struct ra_nand_chip *ra, int block, int tag) -+{ -+ int byte, bits; -+ bits = block * BBTTAG_BITS; -+ -+ byte = bits / 8; -+ bits = bits % 8; -+ -+ // If previous tag is bad, dont overwrite it -+ if (((ra->bbt[byte] >> bits) & BBTTAG_BITS_MASK) == BBT_TAG_BAD) -+ { -+ return BBT_TAG_BAD; -+ } -+ -+ ra->bbt[byte] = (ra->bbt[byte] & ~(BBTTAG_BITS_MASK << bits)) | ((tag & BBTTAG_BITS_MASK) << bits); -+ -+ return tag; -+} -+ -+/** -+ * nand_block_checkbad - [GENERIC] Check if a block is marked bad -+ * @mtd: MTD device structure -+ * @ofs: offset from device start -+ * -+ * Check, if the block is bad. Either by reading the bad block table or -+ * calling of the scan function. -+ */ -+int nand_block_checkbad(struct ra_nand_chip *ra, loff_t offs) -+{ -+ int page, block; -+ int ret = 4; -+ unsigned int tag; -+ char *str[]= {"UNK", "RES", "BAD", "GOOD"}; -+ -+ if (ranfc_bbt == 0) -+ return 0; -+ -+ { -+ // align with chip -+ -+ offs = offs & ((1<chip_shift) -1); -+ -+ page = offs >> ra->page_shift; -+ block = offs >> ra->erase_shift; -+ } -+ -+ tag = ra_nand_bbt_get(ra, block); -+ -+ if (tag == BBT_TAG_UNKNOWN) { -+ ret = nfc_read_oob(ra, page, ra->badblockpos, (char*)&tag, 1, FLAG_NONE); -+ if (ret == 0) -+ tag = ((le32_to_cpu(tag) & 0x0ff) == 0x0ff) ? BBT_TAG_GOOD : BBT_TAG_BAD; -+ else -+ tag = BBT_TAG_BAD; -+ -+ ra_nand_bbt_set(ra, block, tag); -+ } -+ -+ if (tag != BBT_TAG_GOOD) { -+ printk("%s: offs:%x tag: %s \n", __func__, (unsigned int)offs, str[tag]); -+ return 1; -+ } -+ else -+ return 0; -+} -+ -+/** -+ * nand_block_markbad - -+ */ -+int nand_block_markbad(struct ra_nand_chip *ra, loff_t offs) -+{ -+ int page, block; -+ int ret = 4; -+ unsigned int tag; -+ char *ecc; -+ -+ // align with chip -+ ra_dbg("%s offs: %x \n", __func__, (int)offs); -+ -+ offs = offs & ((1<chip_shift) -1); -+ -+ page = offs >> ra->page_shift; -+ block = offs >> ra->erase_shift; -+ -+ tag = ra_nand_bbt_get(ra, block); -+ -+ if (tag == BBT_TAG_BAD) { -+ printk("%s: mark repeatedly \n", __func__); -+ return 0; -+ } -+ -+ // new tag as bad -+ tag =BBT_TAG_BAD; -+ ret = nfc_read_page(ra, ra->buffers, page, FLAG_NONE); -+ if (ret != 0) { -+ printk("%s: fail to read bad block tag \n", __func__); -+ goto tag_bbt; -+ } -+ -+ ecc = &ra->buffers[(1<page_shift)+ra->badblockpos]; -+ if (*ecc == (char)0x0ff) { -+ //tag into flash -+ *ecc = (char)tag; -+ ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA); -+ if (ret) -+ printk("%s: fail to write bad block tag \n", __func__); -+ } -+ -+tag_bbt: -+ //update bbt -+ ra_nand_bbt_set(ra, block, tag); -+ -+ return 0; -+} -+ -+#if defined (WORKAROUND_RX_BUF_OV) -+/** -+ * to find a bad block for ecc verify of read_page -+ */ -+unsigned int nand_bbt_find_sandbox(struct ra_nand_chip *ra) -+{ -+ loff_t offs = 0; -+ int chipsize = 1 << ra->chip_shift; -+ int blocksize = 1 << ra->erase_shift; -+ -+ -+ while (offs < chipsize) { -+ if (nand_block_checkbad(ra, offs)) //scan and verify the unknown tag -+ break; -+ offs += blocksize; -+ } -+ -+ if (offs >= chipsize) { -+ offs = chipsize - blocksize; -+ } -+ -+ ra_nand_bbt_set(ra, (unsigned int)offs>>ra->erase_shift, BBT_TAG_RES); // tag bbt only, instead of update badblockpos of flash. -+ return (offs >> ra->page_shift); -+} -+#endif -+ -+/** -+ * nand_erase_nand - [Internal] erase block(s) -+ * @mtd: MTD device structure -+ * @instr: erase instruction -+ * @allowbbt: allow erasing the bbt area -+ * -+ * Erase one ore more blocks -+ */ -+static int _nand_erase_nand(struct ra_nand_chip *ra, struct erase_info *instr) -+{ -+ int page, len, status, ret; -+ unsigned int addr, blocksize = 1<erase_shift; -+ -+ ra_dbg("%s: start:%x, len:%x \n", __func__, -+ (unsigned int)instr->addr, (unsigned int)instr->len); -+ -+//#define BLOCK_ALIGNED(a) ((a) & (blocksize - 1)) // already defined -+ -+ if (BLOCK_ALIGNED(instr->addr) || BLOCK_ALIGNED(instr->len)) { -+ ra_dbg("%s: erase block not aligned, addr:%x len:%x\n", __func__, instr->addr, instr->len); -+ return -EINVAL; -+ } -+ -+ instr->fail_addr = 0xffffffff; -+ -+ len = instr->len; -+ addr = instr->addr; -+ instr->state = MTD_ERASING; -+ -+ while (len) { -+ -+ page = (int)(addr >> ra->page_shift); -+ -+ /* select device and check wp */ -+ if (nfc_enable_chip(ra, addr, 0)) { -+ printk("%s: nand is write protected \n", __func__); -+ instr->state = MTD_ERASE_FAILED; -+ goto erase_exit; -+ } -+ -+ /* if we have a bad block, we do not erase bad blocks */ -+ if (nand_block_checkbad(ra, addr)) { -+ printk(KERN_WARNING "nand_erase: attempt to erase a " -+ "bad block at 0x%08x\n", addr); -+ instr->state = MTD_ERASE_FAILED; -+ goto erase_exit; -+ } -+ -+ /* -+ * Invalidate the page cache, if we erase the block which -+ * contains the current cached page -+ */ -+ if (BLOCK_ALIGNED(addr) == BLOCK_ALIGNED(ra->buffers_page << ra->page_shift)) -+ ra->buffers_page = -1; -+ -+ status = nfc_erase_block(ra, page); -+ /* See if block erase succeeded */ -+ if (status) { -+ printk("%s: failed erase, page 0x%08x\n", __func__, page); -+ instr->state = MTD_ERASE_FAILED; -+ instr->fail_addr = (page << ra->page_shift); -+ goto erase_exit; -+ } -+ -+ /* Increment page address and decrement length */ -+ len -= blocksize; -+ addr += blocksize; -+ -+ } -+ instr->state = MTD_ERASE_DONE; -+ -+erase_exit: -+ -+ ret = ((instr->state == MTD_ERASE_DONE) ? 0 : -EIO); -+ /* Do call back function */ -+ if (!ret) -+ mtd_erase_callback(instr); -+ -+ if (ret) { -+ ra_nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD); -+ } -+ -+ /* Return more or less happy */ -+ return ret; -+} -+ -+static int -+nand_write_oob_buf(struct ra_nand_chip *ra, uint8_t *buf, uint8_t *oob, size_t size, -+ int mode, int ooboffs) -+{ -+ size_t oobsize = 1<oob_shift; -+ struct nand_oobfree *free; -+ uint32_t woffs = ooboffs; -+ int retsize = 0; -+ -+ ra_dbg("%s: size:%x, mode:%x, offs:%x \n", __func__, size, mode, ooboffs); -+ -+ switch(mode) { -+ case MTD_OPS_PLACE_OOB: -+ case MTD_OPS_RAW: -+ if (ooboffs > oobsize) -+ return -1; -+ -+ size = min(size, oobsize - ooboffs); -+ memcpy(buf + ooboffs, oob, size); -+ retsize = size; -+ break; -+ -+ case MTD_OPS_AUTO_OOB: -+ if (ooboffs > ra->oob->oobavail) -+ return -1; -+ -+ while (size) { -+ for(free = ra->oob->oobfree; free->length && size; free++) { -+ int wlen = free->length - woffs; -+ int bytes = 0; -+ -+ /* Write request not from offset 0 ? */ -+ if (wlen <= 0) { -+ woffs = -wlen; -+ continue; -+ } -+ -+ bytes = min_t(size_t, size, wlen); -+ memcpy (buf + free->offset + woffs, oob, bytes); -+ woffs = 0; -+ oob += bytes; -+ size -= bytes; -+ retsize += bytes; -+ } -+ buf += oobsize; -+ } -+ break; -+ -+ default: -+ BUG(); -+ } -+ -+ return retsize; -+} -+ -+static int nand_read_oob_buf(struct ra_nand_chip *ra, uint8_t *oob, size_t size, -+ int mode, int ooboffs) -+{ -+ size_t oobsize = 1<oob_shift; -+ uint8_t *buf = ra->buffers + (1<page_shift); -+ int retsize=0; -+ -+ ra_dbg("%s: size:%x, mode:%x, offs:%x \n", __func__, size, mode, ooboffs); -+ -+ switch(mode) { -+ case MTD_OPS_PLACE_OOB: -+ case MTD_OPS_RAW: -+ if (ooboffs > oobsize) -+ return -1; -+ -+ size = min(size, oobsize - ooboffs); -+ memcpy(oob, buf + ooboffs, size); -+ return size; -+ -+ case MTD_OPS_AUTO_OOB: { -+ struct nand_oobfree *free; -+ uint32_t woffs = ooboffs; -+ -+ if (ooboffs > ra->oob->oobavail) -+ return -1; -+ -+ size = min(size, ra->oob->oobavail - ooboffs); -+ for(free = ra->oob->oobfree; free->length && size; free++) { -+ int wlen = free->length - woffs; -+ int bytes = 0; -+ -+ /* Write request not from offset 0 ? */ -+ if (wlen <= 0) { -+ woffs = -wlen; -+ continue; -+ } -+ -+ bytes = min_t(size_t, size, wlen); -+ memcpy (oob, buf + free->offset + woffs, bytes); -+ woffs = 0; -+ oob += bytes; -+ size -= bytes; -+ retsize += bytes; -+ } -+ return retsize; -+ } -+ default: -+ BUG(); -+ } -+ -+ return -1; -+} -+ -+/** -+ * nand_do_write_ops - [Internal] NAND write with ECC -+ * @mtd: MTD device structure -+ * @to: offset to write to -+ * @ops: oob operations description structure -+ * -+ * NAND write with ECC -+ */ -+static int nand_do_write_ops(struct ra_nand_chip *ra, loff_t to, -+ struct mtd_oob_ops *ops) -+{ -+ int page; -+ uint32_t datalen = ops->len; -+ uint32_t ooblen = ops->ooblen; -+ uint8_t *oob = ops->oobbuf; -+ uint8_t *data = ops->datbuf; -+ int pagesize = (1<page_shift); -+ int pagemask = (pagesize -1); -+ int oobsize = 1<oob_shift; -+ loff_t addr = to; -+ //int i = 0; //for ra_dbg only -+ -+ ra_dbg("%s: to:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x oobmode:%x \n", -+ __func__, (unsigned int)to, data, oob, datalen, ooblen, ops->ooboffs, ops->mode); -+ -+ ops->retlen = 0; -+ ops->oobretlen = 0; -+ -+ -+ /* Invalidate the page cache, when we write to the cached page */ -+ ra->buffers_page = -1; -+ -+ -+ if (data ==0) -+ datalen = 0; -+ -+ // oob sequential (burst) write -+ if (datalen == 0 && ooblen) { -+ int len = ((ooblen + ops->ooboffs) + (ra->oob->oobavail - 1)) / ra->oob->oobavail * oobsize; -+ -+ /* select chip, and check if it is write protected */ -+ if (nfc_enable_chip(ra, addr, 0)) -+ return -EIO; -+ -+ //FIXME, need sanity check of block boundary -+ page = (int)((to & ((1<chip_shift)-1)) >> ra->page_shift); //chip boundary -+ memset(ra->buffers, 0x0ff, pagesize); -+ //fixme, should we reserve the original content? -+ if (ops->mode == MTD_OPS_AUTO_OOB) { -+ nfc_read_oob(ra, page, 0, ra->buffers, len, FLAG_NONE); -+ } -+ //prepare buffers -+ if (ooblen != 8) -+ { -+ nand_write_oob_buf(ra, ra->buffers, oob, ooblen, ops->mode, ops->ooboffs); -+ // write out buffer to chip -+ nfc_write_oob(ra, page, 0, ra->buffers, len, FLAG_USE_GDMA); -+ } -+ -+ ops->oobretlen = ooblen; -+ ooblen = 0; -+ } -+ -+ // data sequential (burst) write -+ if (datalen && ooblen == 0) { -+ // ranfc can not support write_data_burst, since hw-ecc and fifo constraints.. -+ } -+ -+ // page write -+ while(datalen || ooblen) { -+ int len; -+ int ret; -+ int offs; -+ int ecc_en = 0; -+ -+ ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n", -+ __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs); -+ -+ page = (int)((addr & ((1<chip_shift)-1)) >> ra->page_shift); //chip boundary -+ -+ /* select chip, and check if it is write protected */ -+ if (nfc_enable_chip(ra, addr, 0)) -+ return -EIO; -+ -+ // oob write -+ if (ops->mode == MTD_OPS_AUTO_OOB) { -+ //fixme, this path is not yet varified -+ nfc_read_oob(ra, page, 0, ra->buffers + pagesize, oobsize, FLAG_NONE); -+ } -+ if (oob && ooblen > 0) { -+ len = nand_write_oob_buf(ra, ra->buffers + pagesize, oob, ooblen, ops->mode, ops->ooboffs); -+ if (len < 0) -+ return -EINVAL; -+ -+ oob += len; -+ ops->oobretlen += len; -+ ooblen -= len; -+ } -+ -+ // data write -+ offs = addr & pagemask; -+ len = min_t(size_t, datalen, pagesize - offs); -+ if (data && len > 0) { -+ memcpy(ra->buffers + offs, data, len); // we can not sure ops->buf wether is DMA-able. -+ -+ data += len; -+ datalen -= len; -+ ops->retlen += len; -+ -+ ecc_en = FLAG_ECC_EN; -+ } -+ ret = nfc_write_page(ra, ra->buffers, page, FLAG_USE_GDMA | FLAG_VERIFY | -+ ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0 : ecc_en )); -+ if (ret) { -+ ra_nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD); -+ return ret; -+ } -+ -+ ra_nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD); -+ -+ addr = (page+1) << ra->page_shift; -+ -+ } -+ return 0; -+} -+ -+/** -+ * nand_do_read_ops - [Internal] Read data with ECC -+ * -+ * @mtd: MTD device structure -+ * @from: offset to read from -+ * @ops: oob ops structure -+ * -+ * Internal function. Called with chip held. -+ */ -+static int nand_do_read_ops(struct ra_nand_chip *ra, loff_t from, -+ struct mtd_oob_ops *ops) -+{ -+ int page; -+ uint32_t datalen = ops->len; -+ uint32_t ooblen = ops->ooblen; -+ uint8_t *oob = ops->oobbuf; -+ uint8_t *data = ops->datbuf; -+ int pagesize = (1<page_shift); -+ int pagemask = (pagesize -1); -+ loff_t addr = from; -+ //int i = 0; //for ra_dbg only -+ -+ ra_dbg("%s: addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n", -+ __func__, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs); -+ -+ ops->retlen = 0; -+ ops->oobretlen = 0; -+ if (data == 0) -+ datalen = 0; -+ -+ -+ while(datalen || ooblen) { -+ int len; -+ int ret; -+ int offs; -+ -+ ra_dbg("%s (%d): addr:%x, ops data:%p, oob:%p datalen:%x ooblen:%x, ooboffs:%x \n", -+ __func__, i++, (unsigned int)addr, data, oob, datalen, ooblen, ops->ooboffs); -+ /* select chip */ -+ if (nfc_enable_chip(ra, addr, 1) < 0) -+ return -EIO; -+ -+ page = (int)((addr & ((1<chip_shift)-1)) >> ra->page_shift); -+ -+ ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY | -+ ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN )); -+ //FIXME, something strange here, some page needs 2 more tries to guarantee read success. -+ if (ret) { -+ printk("read again:\n"); -+ ret = nfc_read_page(ra, ra->buffers, page, FLAG_VERIFY | -+ ((ops->mode == MTD_OPS_RAW || ops->mode == MTD_OPS_PLACE_OOB) ? 0: FLAG_ECC_EN )); -+ -+ if (ret) { -+ printk("read again fail \n"); -+ ra_nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_BAD); -+ if ((ret != -EUCLEAN) && (ret != -EBADMSG)) { -+ return ret; -+ } -+ else { -+ /* ecc verification fail, but data need to be returned. */ -+ } -+ } -+ else { -+ printk(" read agian susccess \n"); -+ } -+ } -+ -+ // oob read -+ if (oob && ooblen > 0) { -+ len = nand_read_oob_buf(ra, oob, ooblen, ops->mode, ops->ooboffs); -+ if (len < 0) { -+ printk("nand_read_oob_buf: fail return %x \n", len); -+ return -EINVAL; -+ } -+ -+ oob += len; -+ ops->oobretlen += len; -+ ooblen -= len; -+ } -+ -+ // data read -+ offs = addr & pagemask; -+ len = min_t(size_t, datalen, pagesize - offs); -+ if (data && len > 0) { -+ memcpy(data, ra->buffers + offs, len); // we can not sure ops->buf wether is DMA-able. -+ -+ data += len; -+ datalen -= len; -+ ops->retlen += len; -+ if (ret) -+ return ret; -+ } -+ -+ -+ ra_nand_bbt_set(ra, addr >> ra->erase_shift, BBT_TAG_GOOD); -+ // address go further to next page, instead of increasing of length of write. This avoids some special cases wrong. -+ addr = (page+1) << ra->page_shift; -+ } -+ return 0; -+} -+ -+static int -+ramtd_nand_erase(struct mtd_info *mtd, struct erase_info *instr) -+{ -+ struct ra_nand_chip *ra = (struct ra_nand_chip *)mtd->priv; -+ int ret; -+ -+ ra_dbg("%s: start:%x, len:%x \n", __func__, -+ (unsigned int)instr->addr, (unsigned int)instr->len); -+ -+ nand_get_device(ra, FL_ERASING); -+ ret = _nand_erase_nand((struct ra_nand_chip *)mtd->priv, instr); -+ nand_release_device(ra); -+ -+ return ret; -+} -+ -+static int -+ramtd_nand_write(struct mtd_info *mtd, loff_t to, size_t len, -+ size_t *retlen, const uint8_t *buf) -+{ -+ struct ra_nand_chip *ra = mtd->priv; -+ struct mtd_oob_ops ops; -+ int ret; -+ -+ ra_dbg("%s: to 0x%x len=0x%x\n", __func__, to, len); -+ -+ if ((to + len) > mtd->size) -+ return -EINVAL; -+ -+ if (!len) -+ return 0; -+ -+ nand_get_device(ra, FL_WRITING); -+ -+ memset(&ops, 0, sizeof(ops)); -+ ops.len = len; -+ ops.datbuf = (uint8_t *)buf; -+ ops.oobbuf = NULL; -+ ops.mode = MTD_OPS_AUTO_OOB; -+ -+ ret = nand_do_write_ops(ra, to, &ops); -+ -+ *retlen = ops.retlen; -+ -+ nand_release_device(ra); -+ -+ return ret; -+} -+ -+static int -+ramtd_nand_read(struct mtd_info *mtd, loff_t from, size_t len, -+ size_t *retlen, uint8_t *buf) -+{ -+ struct ra_nand_chip *ra = mtd->priv; -+ int ret; -+ struct mtd_oob_ops ops; -+ -+ ra_dbg("%s: mtd:%p from:%x, len:%x, buf:%p \n", __func__, mtd, (unsigned int)from, len, buf); -+ -+ /* Do not allow reads past end of device */ -+ if ((from + len) > mtd->size) -+ return -EINVAL; -+ if (!len) -+ return 0; -+ -+ nand_get_device(ra, FL_READING); -+ -+ memset(&ops, 0, sizeof(ops)); -+ ops.len = len; -+ ops.datbuf = buf; -+ ops.oobbuf = NULL; -+ ops.mode = MTD_OPS_AUTO_OOB; -+ -+ ret = nand_do_read_ops(ra, from, &ops); -+ -+ *retlen = ops.retlen; -+ -+ nand_release_device(ra); -+ -+ return ret; -+} -+ -+static int -+ramtd_nand_readoob(struct mtd_info *mtd, loff_t from, -+ struct mtd_oob_ops *ops) -+{ -+ struct ra_nand_chip *ra = mtd->priv; -+ int ret; -+ -+ ra_dbg("%s: \n", __func__); -+ -+ nand_get_device(ra, FL_READING); -+ -+ ret = nand_do_read_ops(ra, from, ops); -+ -+ nand_release_device(ra); -+ -+ return ret; -+} -+ -+static int -+ramtd_nand_writeoob(struct mtd_info *mtd, loff_t to, -+ struct mtd_oob_ops *ops) -+{ -+ struct ra_nand_chip *ra = mtd->priv; -+ int ret; -+ -+ nand_get_device(ra, FL_READING); -+ ret = nand_do_write_ops(ra, to, ops); -+ nand_release_device(ra); -+ -+ return ret; -+} -+ -+static int -+ramtd_nand_block_isbad(struct mtd_info *mtd, loff_t offs) -+{ -+ if (offs > mtd->size) -+ return -EINVAL; -+ -+ return nand_block_checkbad((struct ra_nand_chip *)mtd->priv, offs); -+} -+ -+static int -+ramtd_nand_block_markbad(struct mtd_info *mtd, loff_t ofs) -+{ -+ struct ra_nand_chip *ra = mtd->priv; -+ int ret; -+ -+ ra_dbg("%s: \n", __func__); -+ nand_get_device(ra, FL_WRITING); -+ ret = nand_block_markbad(ra, ofs); -+ nand_release_device(ra); -+ -+ return ret; -+} -+ -+// 1-bit error detection -+static int one_bit_correction(char *ecc1, char *ecc2, int *bytes, int *bits) -+{ -+ // check if ecc and expected are all valid -+ char *p, nibble, crumb; -+ int i, xor, iecc1 = 0, iecc2 = 0; -+ -+ printk("correction : %x %x %x\n", ecc1[0], ecc1[1], ecc1[2]); -+ printk("correction : %x %x %x\n", ecc2[0], ecc2[1], ecc2[2]); -+ -+ p = (char *)ecc1; -+ for (i = 0; i < CONFIG_ECC_BYTES; i++) -+ { -+ nibble = *(p+i) & 0xf; -+ if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) && -+ (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9)) -+ return -1; -+ nibble = ((*(p+i)) >> 4) & 0xf; -+ if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) && -+ (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9)) -+ return -1; -+ } -+ -+ p = (char *)ecc2; -+ for (i = 0; i < CONFIG_ECC_BYTES; i++) -+ { -+ nibble = *(p+i) & 0xf; -+ if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) && -+ (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9)) -+ return -1; -+ nibble = ((*(p+i)) >> 4) & 0xf; -+ if ((nibble != 0x0) && (nibble != 0xf) && (nibble != 0x3) && (nibble != 0xc) && -+ (nibble != 0x5) && (nibble != 0xa) && (nibble != 0x6) && (nibble != 0x9)) -+ return -1; -+ } -+ -+ memcpy(&iecc1, ecc1, 3); -+ memcpy(&iecc2, ecc2, 3); -+ -+ xor = iecc1 ^ iecc2; -+ printk("xor = %x (%x %x)\n", xor, iecc1, iecc2); -+ -+ *bytes = 0; -+ for (i = 0; i < 9; i++) -+ { -+ crumb = (xor >> (2*i)) & 0x3; -+ if ((crumb == 0x0) || (crumb == 0x3)) -+ return -1; -+ if (crumb == 0x2) -+ *bytes += (1 << i); -+ } -+ -+ *bits = 0; -+ for (i = 0; i < 3; i++) -+ { -+ crumb = (xor >> (18 + 2*i)) & 0x3; -+ if ((crumb == 0x0) || (crumb == 0x3)) -+ return -1; -+ if (crumb == 0x2) -+ *bits += (1 << i); -+ } -+ -+ return 0; -+} -+ -+/************************************************************ -+ * the init/exit section. -+ */ -+ -+static struct nand_ecclayout ra_oob_layout = { -+ .eccbytes = CONFIG_ECC_BYTES, -+ .eccpos = {5, 6, 7}, -+ .oobfree = { -+ {.offset = 0, .length = 4}, -+ {.offset = 8, .length = 8}, -+ {.offset = 0, .length = 0} -+ }, -+#define RA_CHIP_OOB_AVAIL (4+8) -+ .oobavail = RA_CHIP_OOB_AVAIL, -+ // 5th byte is bad-block flag. -+}; -+ -+static int -+mtk_nand_probe(struct platform_device *pdev) -+{ -+ struct mtd_part_parser_data ppdata; -+ struct ra_nand_chip *ra; -+ int alloc_size, bbt_size, buffers_size, reg, err; -+ unsigned char chip_mode = 12; -+ -+ /* if(ra_check_flash_type()!=BOOT_FROM_NAND) { -+ return 0; -+ }*/ -+ -+ //FIXME: config 512 or 2048-byte page according to HWCONF -+#if defined (CONFIG_SOC_MT7620) -+ ra_outl(RALINK_SYSCTL_BASE+0x60, ra_inl(RALINK_SYSCTL_BASE+0x60) & ~(0x3<<18)); -+ reg = ra_inl(RALINK_SYSCTL_BASE+0x10); -+ chip_mode = (reg & 0x0F); -+ if((chip_mode==1)||(chip_mode==11)) { -+ ra_or(NFC_CONF1, 1); -+ is_nand_page_2048 = 1; -+ nand_addrlen = ((chip_mode!=11) ? 4 : 5); -+ printk("!!! nand page size = 2048, addr len=%d\n", nand_addrlen); -+ } -+ else { -+ ra_and(NFC_CONF1, ~1); -+ is_nand_page_2048 = 0; -+ nand_addrlen = ((chip_mode!=10) ? 3 : 4); -+ printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen); -+ } -+#else -+ is_nand_page_2048 = 0; -+ nand_addrlen = 3; -+ printk("!!! nand page size = 512, addr len=%d\n", nand_addrlen); -+#endif -+ -+#if defined (CONFIG_SOC_MT7620) -+ //config ECC location -+ ra_and(NFC_CONF1, 0xfff000ff); -+ ra_or(NFC_CONF1, ((CONFIG_ECC_OFFSET + 2) << 16) + -+ ((CONFIG_ECC_OFFSET + 1) << 12) + -+ (CONFIG_ECC_OFFSET << 8)); -+#endif -+ -+#define ALIGNE_16(a) (((unsigned long)(a)+15) & ~15) -+ buffers_size = ALIGNE_16((1<buffers -+ bbt_size = BBTTAG_BITS * (1<<(CONFIG_CHIP_SIZE_BIT - (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT))) / 8; //ra->bbt -+ bbt_size = ALIGNE_16(bbt_size); -+ -+ alloc_size = buffers_size + bbt_size; -+ alloc_size += buffers_size; //for ra->readback_buffers -+ alloc_size += sizeof(*ra); -+ alloc_size += sizeof(*ranfc_mtd); -+ -+ //make sure gpio-0 is input -+ ra_outl(RALINK_PIO_BASE+0x24, ra_inl(RALINK_PIO_BASE+0x24) & ~0x01); -+ -+ ra = (struct ra_nand_chip *)kzalloc(alloc_size, GFP_KERNEL | GFP_DMA); -+ if (!ra) { -+ printk("%s: mem alloc fail \n", __func__); -+ return -ENOMEM; -+ } -+ memset(ra, 0, alloc_size); -+ -+ //dynamic -+ ra->buffers = (char *)((char *)ra + sizeof(*ra)); -+ ra->readback_buffers = ra->buffers + buffers_size; -+ ra->bbt = ra->readback_buffers + buffers_size; -+ ranfc_mtd = (struct mtd_info *)(ra->bbt + bbt_size); -+ -+ //static -+ ra->numchips = CONFIG_NUMCHIPS; -+ ra->chip_shift = CONFIG_CHIP_SIZE_BIT; -+ ra->page_shift = CONFIG_PAGE_SIZE_BIT; -+ ra->oob_shift = CONFIG_OOBSIZE_PER_PAGE_BIT; -+ ra->erase_shift = (CONFIG_PAGE_SIZE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT); -+ ra->badblockpos = CONFIG_BAD_BLOCK_POS; -+ ra_oob_layout.eccpos[0] = CONFIG_ECC_OFFSET; -+ ra_oob_layout.eccpos[1] = CONFIG_ECC_OFFSET + 1; -+ ra_oob_layout.eccpos[2] = CONFIG_ECC_OFFSET + 2; -+ ra->oob = &ra_oob_layout; -+ ra->buffers_page = -1; -+ -+#if defined (WORKAROUND_RX_BUF_OV) -+ if (ranfc_verify) { -+ ra->sandbox_page = nand_bbt_find_sandbox(ra); -+ } -+#endif -+ ra_outl(NFC_CTRL, ra_inl(NFC_CTRL) | 0x01); //set wp to high -+ nfc_all_reset(); -+ -+ ranfc_mtd->type = MTD_NANDFLASH; -+ ranfc_mtd->flags = MTD_CAP_NANDFLASH; -+ ranfc_mtd->size = CONFIG_NUMCHIPS * CFG_CHIPSIZE; -+ ranfc_mtd->erasesize = CFG_BLOCKSIZE; -+ ranfc_mtd->writesize = CFG_PAGESIZE; -+ ranfc_mtd->writebufsize = ranfc_mtd->writesize; -+ ranfc_mtd->oobsize = CFG_PAGE_OOBSIZE; -+ ranfc_mtd->oobavail = RA_CHIP_OOB_AVAIL; -+ ranfc_mtd->name = "ra_nfc"; -+ //ranfc_mtd->index -+ //ranfc_mtd->ecclayout = &ra_oob_layout; -+ //ranfc_mtd->numberaseregions -+ //ranfc_mtd->eraseregions -+ //ranfc_mtd->bansize -+ ranfc_mtd->_erase = ramtd_nand_erase; -+ //ranfc_mtd->point -+ //ranfc_mtd->unpoint -+ ranfc_mtd->_read = ramtd_nand_read; -+ ranfc_mtd->_write = ramtd_nand_write; -+ ranfc_mtd->_read_oob = ramtd_nand_readoob; -+ ranfc_mtd->_write_oob = ramtd_nand_writeoob; -+ //ranfc_mtd->get_fact_prot_info; ranfc_mtd->read_fact_prot_reg; -+ //ranfc_mtd->get_user_prot_info; ranfc_mtd->read_user_prot_reg; -+ //ranfc_mtd->write_user_prot_reg; ranfc_mtd->lock_user_prot_reg; -+ //ranfc_mtd->writev; ranfc_mtd->sync; ranfc_mtd->lock; ranfc_mtd->unlock; ranfc_mtd->suspend; ranfc_mtd->resume; -+ ranfc_mtd->_block_isbad = ramtd_nand_block_isbad; -+ ranfc_mtd->_block_markbad = ramtd_nand_block_markbad; -+ //ranfc_mtd->reboot_notifier -+ //ranfc_mtd->ecc_stats; -+ // subpage_sht; -+ -+ //ranfc_mtd->get_device; ranfc_mtd->put_device -+ ranfc_mtd->priv = ra; -+ -+ ranfc_mtd->owner = THIS_MODULE; -+ ra->controller = &ra->hwcontrol; -+ mutex_init(ra->controller); -+ -+ printk("%s: alloc %x, at %p , btt(%p, %x), ranfc_mtd:%p\n", -+ __func__ , alloc_size, ra, ra->bbt, bbt_size, ranfc_mtd); -+ -+ mtd_set_of_node(ranfc_mtd, pdev->dev.of_node); -+ err = mtd_device_parse_register(ranfc_mtd, mtk_probe_types, -+ &ppdata, NULL, 0); -+ -+ return err; -+} -+ -+static int -+mtk_nand_remove(struct platform_device *pdev) -+{ -+ struct ra_nand_chip *ra; -+ -+ if (ranfc_mtd) { -+ ra = (struct ra_nand_chip *)ranfc_mtd->priv; -+ -+ /* Deregister partitions */ -+ //del_mtd_partitions(ranfc_mtd); -+ kfree(ra); -+ } -+ return 0; -+} -+ -+static const struct of_device_id mtk_nand_match[] = { -+ { .compatible = "mtk,mt7620-nand" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, mtk_nand_match); -+ -+static struct platform_driver mtk_nand_driver = { -+ .probe = mtk_nand_probe, -+ .remove = mtk_nand_remove, -+ .driver = { -+ .name = "mt7620_nand", -+ .owner = THIS_MODULE, -+ .of_match_table = mtk_nand_match, -+ }, -+}; -+ -+module_platform_driver(mtk_nand_driver); -+ -+MODULE_LICENSE("GPL"); -diff --git a/drivers/mtd/maps/ralink_nand.h b/drivers/mtd/maps/ralink_nand.h -new file mode 100644 -index 0000000..30a0c37 ---- /dev/null -+++ b/drivers/mtd/maps/ralink_nand.h -@@ -0,0 +1,232 @@ -+#ifndef RT2880_NAND_H -+#define RT2880_NAND_H -+ -+#include -+ -+//#include "gdma.h" -+ -+#define RALINK_SYSCTL_BASE 0xB0000000 -+#define RALINK_PIO_BASE 0xB0000600 -+#define RALINK_NAND_CTRL_BASE 0xB0000810 -+#define CONFIG_RALINK_MT7620 -+ -+#define SKIP_BAD_BLOCK -+//#define RANDOM_GEN_BAD_BLOCK -+ -+#define ra_inl(addr) (*(volatile unsigned int *)(addr)) -+#define ra_outl(addr, value) (*(volatile unsigned int *)(addr) = (value)) -+#define ra_aor(addr, a_mask, o_value) ra_outl(addr, (ra_inl(addr) & (a_mask)) | (o_value)) -+#define ra_and(addr, a_mask) ra_aor(addr, a_mask, 0) -+#define ra_or(addr, o_value) ra_aor(addr, -1, o_value) -+ -+ -+#define CONFIG_NUMCHIPS 1 -+#define CONFIG_NOT_SUPPORT_WP //rt3052 has no WP signal for chip. -+//#define CONFIG_NOT_SUPPORT_RB -+ -+extern int is_nand_page_2048; -+extern const unsigned int nand_size_map[2][3]; -+ -+//chip -+// chip geometry: SAMSUNG small size 32MB. -+#define CONFIG_CHIP_SIZE_BIT (nand_size_map[is_nand_page_2048][nand_addrlen-3]) //! (1<=32)? 31 : CONFIG_CHIP_SIZE_BIT)) -+//#define CFG_CHIPSIZE (1 << CONFIG_CHIP_SIZE_BIT) -+#define CFG_PAGESIZE (1 << CONFIG_PAGE_SIZE_BIT) -+#define CFG_BLOCKSIZE (CFG_PAGESIZE << CONFIG_NUMPAGE_PER_BLOCK_BIT) -+#define CFG_NUMPAGE (1 << (CONFIG_CHIP_SIZE_BIT - CONFIG_PAGE_SIZE_BIT)) -+#define CFG_NUMBLOCK (CFG_NUMPAGE >> CONFIG_NUMPAGE_PER_BLOCK_BIT) -+#define CFG_BLOCK_OOBSIZE (1 << (CONFIG_OOBSIZE_PER_PAGE_BIT + CONFIG_NUMPAGE_PER_BLOCK_BIT)) -+#define CFG_PAGE_OOBSIZE (1 << CONFIG_OOBSIZE_PER_PAGE_BIT) -+ -+#define NAND_BLOCK_ALIGN(addr) ((addr) & (CFG_BLOCKSIZE-1)) -+#define NAND_PAGE_ALIGN(addr) ((addr) & (CFG_PAGESIZE-1)) -+ -+ -+#define NFC_BASE RALINK_NAND_CTRL_BASE -+#define NFC_CTRL (NFC_BASE + 0x0) -+#define NFC_CONF (NFC_BASE + 0x4) -+#define NFC_CMD1 (NFC_BASE + 0x8) -+#define NFC_CMD2 (NFC_BASE + 0xc) -+#define NFC_CMD3 (NFC_BASE + 0x10) -+#define NFC_ADDR (NFC_BASE + 0x14) -+#define NFC_DATA (NFC_BASE + 0x18) -+#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \ -+ defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621) -+#define NFC_ECC (NFC_BASE + 0x30) -+#else -+#define NFC_ECC (NFC_BASE + 0x1c) -+#endif -+#define NFC_STATUS (NFC_BASE + 0x20) -+#define NFC_INT_EN (NFC_BASE + 0x24) -+#define NFC_INT_ST (NFC_BASE + 0x28) -+#if defined (CONFIG_RALINK_RT6855) || defined (CONFIG_RALINK_RT6855A) || \ -+ defined (CONFIG_RALINK_MT7620) || defined (CONFIG_RALINK_MT7621) -+#define NFC_CONF1 (NFC_BASE + 0x2c) -+#define NFC_ECC_P1 (NFC_BASE + 0x30) -+#define NFC_ECC_P2 (NFC_BASE + 0x34) -+#define NFC_ECC_P3 (NFC_BASE + 0x38) -+#define NFC_ECC_P4 (NFC_BASE + 0x3c) -+#define NFC_ECC_ERR1 (NFC_BASE + 0x40) -+#define NFC_ECC_ERR2 (NFC_BASE + 0x44) -+#define NFC_ECC_ERR3 (NFC_BASE + 0x48) -+#define NFC_ECC_ERR4 (NFC_BASE + 0x4c) -+#define NFC_ADDR2 (NFC_BASE + 0x50) -+#endif -+ -+enum _int_stat { -+ INT_ST_ND_DONE = 1<<0, -+ INT_ST_TX_BUF_RDY = 1<<1, -+ INT_ST_RX_BUF_RDY = 1<<2, -+ INT_ST_ECC_ERR = 1<<3, -+ INT_ST_TX_TRAS_ERR = 1<<4, -+ INT_ST_RX_TRAS_ERR = 1<<5, -+ INT_ST_TX_KICK_ERR = 1<<6, -+ INT_ST_RX_KICK_ERR = 1<<7 -+}; -+ -+ -+//#define WORKAROUND_RX_BUF_OV 1 -+ -+ -+/************************************************************* -+ * stolen from nand.h -+ *************************************************************/ -+ -+/* -+ * Standard NAND flash commands -+ */ -+#define NAND_CMD_READ0 0 -+#define NAND_CMD_READ1 1 -+#define NAND_CMD_RNDOUT 5 -+#define NAND_CMD_PAGEPROG 0x10 -+#define NAND_CMD_READOOB 0x50 -+#define NAND_CMD_ERASE1 0x60 -+#define NAND_CMD_STATUS 0x70 -+#define NAND_CMD_STATUS_MULTI 0x71 -+#define NAND_CMD_SEQIN 0x80 -+#define NAND_CMD_RNDIN 0x85 -+#define NAND_CMD_READID 0x90 -+#define NAND_CMD_ERASE2 0xd0 -+#define NAND_CMD_RESET 0xff -+ -+/* Extended commands for large page devices */ -+#define NAND_CMD_READSTART 0x30 -+#define NAND_CMD_RNDOUTSTART 0xE0 -+#define NAND_CMD_CACHEDPROG 0x15 -+ -+/* Extended commands for AG-AND device */ -+/* -+ * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but -+ * there is no way to distinguish that from NAND_CMD_READ0 -+ * until the remaining sequence of commands has been completed -+ * so add a high order bit and mask it off in the command. -+ */ -+#define NAND_CMD_DEPLETE1 0x100 -+#define NAND_CMD_DEPLETE2 0x38 -+#define NAND_CMD_STATUS_MULTI 0x71 -+#define NAND_CMD_STATUS_ERROR 0x72 -+/* multi-bank error status (banks 0-3) */ -+#define NAND_CMD_STATUS_ERROR0 0x73 -+#define NAND_CMD_STATUS_ERROR1 0x74 -+#define NAND_CMD_STATUS_ERROR2 0x75 -+#define NAND_CMD_STATUS_ERROR3 0x76 -+#define NAND_CMD_STATUS_RESET 0x7f -+#define NAND_CMD_STATUS_CLEAR 0xff -+ -+#define NAND_CMD_NONE -1 -+ -+/* Status bits */ -+#define NAND_STATUS_FAIL 0x01 -+#define NAND_STATUS_FAIL_N1 0x02 -+#define NAND_STATUS_TRUE_READY 0x20 -+#define NAND_STATUS_READY 0x40 -+#define NAND_STATUS_WP 0x80 -+ -+typedef enum { -+ FL_READY, -+ FL_READING, -+ FL_WRITING, -+ FL_ERASING, -+ FL_SYNCING, -+ FL_CACHEDPRG, -+ FL_PM_SUSPENDED, -+} nand_state_t; -+ -+/*************************************************************/ -+ -+ -+ -+typedef enum _ra_flags { -+ FLAG_NONE = 0, -+ FLAG_ECC_EN = (1<<0), -+ FLAG_USE_GDMA = (1<<1), -+ FLAG_VERIFY = (1<<2), -+} RA_FLAGS; -+ -+ -+#define BBTTAG_BITS 2 -+#define BBTTAG_BITS_MASK ((1< obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o --- /dev/null +++ b/drivers/spi/spi-mt7621.c -@@ -0,0 +1,491 @@ +@@ -0,0 +1,488 @@ +/* + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver + * @@ -106,7 +106,6 @@ Signed-off-by: John Crispin + unsigned int sys_freq; + unsigned int speed; + struct clk *clk; -+ spinlock_t lock; + + struct mt7621_spi_ops *ops; +}; @@ -438,7 +437,6 @@ Signed-off-by: John Crispin + const struct of_device_id *match; + struct spi_master *master; + struct mt7621_spi *rs; -+ unsigned long flags; + void __iomem *base; + struct resource *r; + int status = 0; @@ -490,7 +488,6 @@ Signed-off-by: John Crispin + rs->sys_freq = clk_get_rate(rs->clk); + rs->ops = ops; + dev_info(&pdev->dev, "sys_freq: %u\n", rs->sys_freq); -+ spin_lock_irqsave(&rs->lock, flags); + + device_reset(&pdev->dev); + diff --git a/target/linux/ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch b/target/linux/ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch index b8819e53e..2e7cc33c8 100644 --- a/target/linux/ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch +++ b/target/linux/ramips/patches-4.14/0053-mtd-spi-nor-add-w25q256-3b-mode-switch.patch @@ -125,7 +125,7 @@ Signed-off-by: Felix Fietkau { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, -@@ -1220,6 +1272,9 @@ static int spi_nor_read(struct mtd_info +@@ -1224,6 +1276,9 @@ static int spi_nor_read(struct mtd_info if (ret) return ret; @@ -135,7 +135,7 @@ Signed-off-by: Felix Fietkau while (len) { loff_t addr = from; -@@ -1244,6 +1299,18 @@ static int spi_nor_read(struct mtd_info +@@ -1248,6 +1303,18 @@ static int spi_nor_read(struct mtd_info ret = 0; read_err: @@ -154,7 +154,7 @@ Signed-off-by: Felix Fietkau spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_READ); return ret; } -@@ -1345,6 +1412,10 @@ static int spi_nor_write(struct mtd_info +@@ -1349,6 +1416,10 @@ static int spi_nor_write(struct mtd_info if (ret) return ret; @@ -165,7 +165,7 @@ Signed-off-by: Felix Fietkau for (i = 0; i < len; ) { ssize_t written; loff_t addr = to + i; -@@ -1385,6 +1456,7 @@ static int spi_nor_write(struct mtd_info +@@ -1389,6 +1460,7 @@ static int spi_nor_write(struct mtd_info } write_err: @@ -173,7 +173,7 @@ Signed-off-by: Felix Fietkau spi_nor_unlock_and_unprep(nor, SPI_NOR_OPS_WRITE); return ret; } -@@ -2801,8 +2873,10 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -2805,8 +2877,10 @@ int spi_nor_scan(struct spi_nor *nor, co } else if (mtd->size > 0x1000000) { /* enable 4-byte addressing if the device exceeds 16MiB */ nor->addr_width = 4; diff --git a/target/linux/ramips/patches-4.14/999-fix-m25p-shutdown.patch b/target/linux/ramips/patches-4.14/999-fix-m25p-shutdown.patch deleted file mode 100644 index 0b825d61e..000000000 --- a/target/linux/ramips/patches-4.14/999-fix-m25p-shutdown.patch +++ /dev/null @@ -1,34 +0,0 @@ -diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c -index 24e1ea3..b1ff69a 100644 ---- a/drivers/mtd/devices/m25p80.c -+++ b/drivers/mtd/devices/m25p80.c -@@ -313,6 +313,21 @@ static int m25p_remove(struct spi_device *spi) - return mtd_device_unregister(&flash->spi_nor.mtd); - } - -+static void m25p_shutdown(struct spi_device *spi) -+{ -+ struct m25p *flash = spi_get_drvdata(spi); -+ -+ if ((&flash->spi_nor)->addr_width > 3) { -+ printk(KERN_INFO "m25p80: exit 4-byte address mode\n"); -+ flash->command[0] = SPINOR_OP_EX4B; // exit 4-byte address mode: 0xe9 -+ spi_write(flash->spi, flash->command, 1); -+ flash->command[0] = 0x66; // enable reset -+ spi_write(flash->spi, flash->command, 1); -+ flash->command[0] = 0x99; // reset -+ spi_write(flash->spi, flash->command, 1); -+ } -+} -+ - /* - * Do NOT add to this array without reading the following: - * -@@ -387,6 +402,7 @@ static struct spi_driver m25p80_driver = { - .id_table = m25p_ids, - .probe = m25p_probe, - .remove = m25p_remove, -+ .shutdown = m25p_shutdown, - - /* REVISIT: many of these chips have deep power-down modes, which - * should clearly be entered on suspend() to minimize power use. diff --git a/target/linux/ramips/rt305x/config-4.14 b/target/linux/ramips/rt305x/config-4.14 index 3efacf04c..dadf88e03 100644 --- a/target/linux/ramips/rt305x/config-4.14 +++ b/target/linux/ramips/rt305x/config-4.14 @@ -133,7 +133,6 @@ CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MTD_CFI_INTELEXT is not set CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_M25P80=y -# CONFIG_MTD_NAND_MT7620 is not set CONFIG_MTD_PHYSMAP=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y diff --git a/target/linux/rb532/base-files/lib/upgrade/platform.sh b/target/linux/rb532/base-files/lib/upgrade/platform.sh index 2beccc598..a6a6e9b8d 100644 --- a/target/linux/rb532/base-files/lib/upgrade/platform.sh +++ b/target/linux/rb532/base-files/lib/upgrade/platform.sh @@ -10,15 +10,11 @@ platform_check_image() { return 0; } -platform_pre_upgrade() { - nand_do_upgrade "$1" -} - platform_nand_pre_upgrade() { mtd erase kernel tar xf "$1" "sysupgrade-$(board_name)/kernel" -O | nandwrite -o /dev/mtd0 - } platform_do_upgrade() { - default_do_upgrade "$ARGV" + nand_do_upgrade "$1" } diff --git a/target/linux/sunxi/Makefile b/target/linux/sunxi/Makefile index 982eecbcb..8d09d4e93 100644 --- a/target/linux/sunxi/Makefile +++ b/target/linux/sunxi/Makefile @@ -14,7 +14,7 @@ FEATURES:=fpu usb ext4 display rtc squashfs SUBTARGETS:=cortexa8 cortexa7 cortexa53 MAINTAINER:=Zoltan HERPAI -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 KERNELNAME:=zImage dtbs # A10: Cortex-A8 diff --git a/target/linux/sunxi/base-files/etc/board.d/02_network b/target/linux/sunxi/base-files/etc/board.d/02_network index 782f3ec0d..984d5b3be 100755 --- a/target/linux/sunxi/base-files/etc/board.d/02_network +++ b/target/linux/sunxi/base-files/etc/board.d/02_network @@ -15,6 +15,9 @@ case "$(board_name)" in ucidef_add_switch "switch0" \ "4:lan:1" "0:lan:2" "1:lan:3" "2:lan:4" "3:wan" "8@eth0" ;; +"xunlong,orangepi-r1") + ucidef_set_interfaces_lan_wan "eth0" "eth1" + ;; *) ucidef_set_interface_lan 'eth0' ;; diff --git a/target/linux/sunxi/config-4.14 b/target/linux/sunxi/config-4.14 new file mode 100644 index 000000000..94deb5a57 --- /dev/null +++ b/target/linux/sunxi/config-4.14 @@ -0,0 +1,604 @@ +# CONFIG_AHCI_SUNXI is not set +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_ARCH_AXXIA is not set +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_ARCH_HAS_SET_MEMORY=y +CONFIG_ARCH_HAS_SG_CHAIN=y +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_ARCH_HAS_TICK_BROADCAST=y +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +# CONFIG_ARCH_MULTI_CPU_AUTO is not set +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NR_GPIO=416 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +CONFIG_ARCH_SUNXI=y +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +# CONFIG_ARCH_WANTS_THP_SWAP is not set +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_ARM=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_ERRATA_643719=y +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_LPAE=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_PMU=y +CONFIG_ARM_PSCI=y +CONFIG_ARM_PSCI_FW=y +CONFIG_ARM_THUMB=y +# CONFIG_ARM_THUMBEE is not set +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_ATA=y +CONFIG_ATAGS=y +# CONFIG_ATA_SFF is not set +CONFIG_AUTO_ZRELADDR=y +CONFIG_AXP20X_POWER=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BINFMT_MISC=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BOUNCE=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_CACHE_L2X0=y +CONFIG_CAN=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPACTION=y +CONFIG_CONFIGFS_FS=y +CONFIG_CONNECTOR=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_COREDUMP=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +# CONFIG_CPU_BIG_ENDIAN is not set +# CONFIG_CPU_BPREDICT_DISABLE is not set +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_SUN4I_SS=y +CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEBUG_MEMORY_INIT=y +# CONFIG_DEBUG_UART_8250 is not set +# CONFIG_DEBUG_USER is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +# CONFIG_DMA_NOOP_OPS is not set +CONFIG_DMA_OF=y +CONFIG_DMA_SUN4I=y +CONFIG_DMA_SUN6I=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +# CONFIG_DMA_VIRT_OPS is not set +CONFIG_DNOTIFY=y +# CONFIG_DRM_LIB_RANDOM is not set +CONFIG_DTC=y +CONFIG_DUMMY_CONSOLE=y +# CONFIG_DWMAC_DWC_QOS_ETH is not set +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_SUN8I is not set +CONFIG_DWMAC_SUNXI=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ELF_CORE=y +# CONFIG_EMBEDDED is not set +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +CONFIG_EXPORTFS=y +CONFIG_EXT4_FS=y +CONFIG_EXTCON=y +# CONFIG_F2FS_CHECK_FS is not set +CONFIG_F2FS_FS=y +# CONFIG_F2FS_FS_SECURITY is not set +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_STAT_FS=y +CONFIG_FAT_FS=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CMDLINE=y +CONFIG_FB_FOREIGN_ENDIAN=y +CONFIG_FB_LITTLE_ENDIAN=y +CONFIG_FB_MODE_HELPERS=y +# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set +CONFIG_FB_SIMPLE=y +CONFIG_FB_TILEBLITTING=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +# CONFIG_FONTS is not set +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FONT_SUPPORT=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FRAME_WARN=2048 +CONFIG_FREEZER=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FUTEX_PI=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_AXP209=y +CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_HAVE_ARCH_BITREVERSE=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_ARM_ARCH_TIMER=y +CONFIG_HAVE_ARM_SMCCC=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_GENERIC_GUP=y +CONFIG_HAVE_HW_BREAKPOINT=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_KVM_ARCH_TLB_FLUSH_ALL=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_HAVE_RCU_TABLE_FREE=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SMP=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_UID16=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HOTPLUG_CPU=y +# CONFIG_HUGETLBFS is not set +CONFIG_HWMON=y +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=y +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_MV64XXX=y +CONFIG_I2C_SUN6I_P2WI=y +CONFIG_IIO=y +# CONFIG_IIO_BUFFER is not set +# CONFIG_IIO_TRIGGER is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INPUT=y +CONFIG_INPUT_AXP20X_PEK=y +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_IOMMU_HELPER=y +CONFIG_IOSCHED_CFQ=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +CONFIG_KALLSYMS=y +# CONFIG_KERNEL_MODE_NEON is not set +CONFIG_KEYBOARD_SUN4I_LRADC=y +CONFIG_KSM=y +CONFIG_KVM=y +CONFIG_KVM_ARM_HOST=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_MMIO=y +CONFIG_KVM_VFIO=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_PLATFORM=y +CONFIG_LEDS_GPIO=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +CONFIG_LIBFDT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_MACH_SUN4I=y +CONFIG_MACH_SUN5I=y +CONFIG_MACH_SUN6I=y +CONFIG_MACH_SUN7I=y +CONFIG_MACH_SUN8I=y +CONFIG_MACH_SUN9I=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_SUN4I=y +CONFIG_MEDIA_SUPPORT=y +# CONFIG_MFD_AC100 is not set +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_AXP20X_RSB=y +CONFIG_MFD_CORE=y +CONFIG_MFD_SUN6I_PRCM=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_SUNXI=y +CONFIG_MMU_NOTIFIER=y +CONFIG_MODULES_TREE_LOOKUP=y +CONFIG_MODULES_USE_ELF_REL=y +# CONFIG_MTD is not set +CONFIG_MULTI_IRQ_HANDLER=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_VENDOR_ALLWINNER=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NO_BOOTMEM=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=8 +CONFIG_NVMEM=y +CONFIG_NVMEM_SUNXI_SID=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OF_RESERVED_MEM=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PARTITION_ADVANCED is not set +# CONFIG_PCI_DOMAINS_GENERIC is not set +# CONFIG_PCI_SYSCALL is not set +CONFIG_PERF_EVENTS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_SUN4I_USB=y +CONFIG_PHY_SUN9I_USB=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_SINGLE is not set +CONFIG_PINCTRL_SUN4I_A10=y +# CONFIG_PINCTRL_SUN50I_A64 is not set +# CONFIG_PINCTRL_SUN50I_A64_R is not set +# CONFIG_PINCTRL_SUN50I_H5 is not set +CONFIG_PINCTRL_SUN5I=y +CONFIG_PINCTRL_SUN6I_A31=y +CONFIG_PINCTRL_SUN6I_A31_R=y +CONFIG_PINCTRL_SUN8I_A23=y +CONFIG_PINCTRL_SUN8I_A23_R=y +CONFIG_PINCTRL_SUN8I_A33=y +CONFIG_PINCTRL_SUN8I_A83T=y +CONFIG_PINCTRL_SUN8I_A83T_R=y +CONFIG_PINCTRL_SUN8I_H3=y +CONFIG_PINCTRL_SUN8I_H3_R=y +CONFIG_PINCTRL_SUN8I_V3S=y +CONFIG_PINCTRL_SUN9I_A80=y +CONFIG_PINCTRL_SUN9I_A80_R=y +CONFIG_PINCTRL_SUNXI=y +# CONFIG_PL310_ERRATA_588369 is not set +# CONFIG_PL310_ERRATA_727915 is not set +# CONFIG_PL310_ERRATA_753970 is not set +# CONFIG_PL310_ERRATA_769419 is not set +CONFIG_PM=y +CONFIG_PM_CLK=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_OPP=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_SUPPLY=y +CONFIG_PPS=y +CONFIG_PREEMPT=y +CONFIG_PREEMPT_COUNT=y +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_PREEMPT_RCU=y +CONFIG_PRINTK_TIME=y +CONFIG_PROC_EVENTS=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PWM=y +CONFIG_PWM_SUN4I=y +CONFIG_PWM_SYSFS=y +CONFIG_RATIONAL=y +# CONFIG_RCU_BOOST is not set +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_SPI=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_RELAY=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SUNXI=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_SATA_PMP=y +# CONFIG_SCHED_INFO is not set +CONFIG_SCSI=y +CONFIG_SDIO_UART=y +CONFIG_SECURITYFS=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_NR_UARTS=8 +CONFIG_SERIAL_8250_RUNTIME_UARTS=8 +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SND=y +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +CONFIG_SND_PCM=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SUN4I_I2S is not set +# CONFIG_SND_SUN4I_SPDIF is not set +# CONFIG_SND_SUN8I_CODEC is not set +# CONFIG_SND_SUN8I_CODEC_ANALOG is not set +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_SUN4I=y +CONFIG_SPI_SUN6I=y +CONFIG_SRCU=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +CONFIG_SUN4I_A10_CCU=y +# CONFIG_SUN4I_EMAC is not set +CONFIG_SUN4I_TIMER=y +CONFIG_SUN5I_CCU=y +CONFIG_SUN5I_HSTIMER=y +CONFIG_SUN6I_A31_CCU=y +CONFIG_SUN8I_A23_CCU=y +CONFIG_SUN8I_A33_CCU=y +CONFIG_SUN8I_A83T_CCU=y +CONFIG_SUN8I_DE2_CCU=y +CONFIG_SUN8I_H3_CCU=y +CONFIG_SUN8I_R40_CCU=y +CONFIG_SUN8I_R_CCU=y +CONFIG_SUN8I_V3S_CCU=y +CONFIG_SUN9I_A80_CCU=y +CONFIG_SUNXI_CCU=y +CONFIG_SUNXI_RSB=y +CONFIG_SUNXI_SRAM=y +CONFIG_SUNXI_WATCHDOG=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_B53=y +# CONFIG_SWCONFIG_B53_MMAP_DRIVER is not set +CONFIG_SWCONFIG_B53_PHY_DRIVER=y +CONFIG_SWCONFIG_B53_PHY_FIXUP=y +# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_TASKS_RCU=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_THIN_ARCHIVES=y +# CONFIG_THUMB2_KERNEL is not set +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TOUCHSCREEN_PROPERTIES=y +CONFIG_TOUCHSCREEN_SUN4I=y +CONFIG_TREE_SRCU=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNINLINE_SPIN_UNLOCK=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_COMMON=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_HOST=y +# CONFIG_USB_DWC2_TRACK_MISSED_SOFS is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_GADGET=y +CONFIG_USB_NET_DRIVERS=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USERIO=y +CONFIG_USE_OF=y +CONFIG_VDSO=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_VFAT_FS=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_VHOST=y +CONFIG_VHOST_NET=y +CONFIG_VIRTUALIZATION=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_WATCHDOG_CORE=y +# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set +CONFIG_XPS=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 diff --git a/target/linux/sunxi/config-4.9 b/target/linux/sunxi/config-4.9 index bf2111dc0..4a74fd1f4 100644 --- a/target/linux/sunxi/config-4.9 +++ b/target/linux/sunxi/config-4.9 @@ -117,6 +117,7 @@ CONFIG_CRYPTO_CRC32C=y CONFIG_CRYPTO_CRCT10DIF=y CONFIG_CRYPTO_DES=y CONFIG_CRYPTO_DEV_SUN4I_SS=y +CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y CONFIG_CRYPTO_HW=y @@ -124,6 +125,7 @@ CONFIG_CRYPTO_MANAGER=y CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y CONFIG_CRYPTO_RNG2=y CONFIG_CRYPTO_SHA1=y CONFIG_CRYPTO_WORKQUEUE=y diff --git a/target/linux/sunxi/cortexa53/config-default b/target/linux/sunxi/cortexa53/config-default index bb94574da..ef67c0ea1 100644 --- a/target/linux/sunxi/cortexa53/config-default +++ b/target/linux/sunxi/cortexa53/config-default @@ -1,17 +1,21 @@ CONFIG_64BIT=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_GIGANTIC_PAGE=y +CONFIG_ARCH_HAS_FORTIFY_SOURCE=y CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y CONFIG_ARCH_HAS_KCOV=y CONFIG_ARCH_MMAP_RND_BITS=18 CONFIG_ARCH_MMAP_RND_BITS_MAX=24 CONFIG_ARCH_MMAP_RND_BITS_MIN=18 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +CONFIG_ARCH_PROC_KCORE_TEXT=y CONFIG_ARCH_SELECT_MEMORY_MODEL=y CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_SPARSEMEM_ENABLE=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y CONFIG_ARCH_WANT_FRAME_POINTERS=y @@ -26,8 +30,12 @@ CONFIG_ARM64_CONT_SHIFT=4 # CONFIG_ARM64_LSE_ATOMICS is not set CONFIG_ARM64_PAGE_SHIFT=12 # CONFIG_ARM64_PAN is not set +# CONFIG_ARM64_PMEM is not set # CONFIG_ARM64_PTDUMP is not set +# CONFIG_ARM64_PTDUMP_CORE is not set +# CONFIG_ARM64_PTDUMP_DEBUGFS is not set # CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set +# CONFIG_ARM64_SW_TTBR0_PAN is not set # CONFIG_ARM64_UAO is not set CONFIG_ARM64_VA_BITS=39 CONFIG_ARM64_VA_BITS_39=y @@ -35,35 +43,31 @@ CONFIG_ARM64_VA_BITS_39=y # CONFIG_ARM64_VHE is not set CONFIG_ARM_AMBA=y CONFIG_ARM_GIC_V3=y -# CONFIG_ARM_SBSA_WATCHDOG is not set # CONFIG_ARM_SP805_WATCHDOG is not set CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y # CONFIG_COMMON_CLK_VERSATILE is not set CONFIG_COMMON_CLK_XGENE=y # CONFIG_COMPAT is not set # CONFIG_DEBUG_ALIGN_RODATA is not set -CONFIG_DEBUG_RODATA=y CONFIG_DWMAC_SUN8I=y CONFIG_FRAME_POINTER=y # CONFIG_FSL_ERRATUM_A008585 is not set CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CPU_AUTOPROBE=y CONFIG_GENERIC_CSUM=y CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_HAVE_ARCH_KASAN=y +CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_HAVE_CMPXCHG_DOUBLE=y CONFIG_HAVE_CMPXCHG_LOCAL=y CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_EBPF_JIT=y -CONFIG_HAVE_KVM_MSI=y CONFIG_HAVE_MEMORY_PRESENT=y CONFIG_HAVE_PATA_PLATFORM=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_KERNEL_MODE_NEON=y CONFIG_KVM_ARM_PMU=y -CONFIG_KVM_ARM_VGIC_V3_ITS=y +CONFIG_MDIO_BUS_MUX=y CONFIG_MODULES_USE_ELF_RELA=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NO_IOPORT_MAP=y @@ -71,26 +75,26 @@ CONFIG_NO_IOPORT_MAP=y CONFIG_PARTITION_PERCPU=y # CONFIG_PCI_DOMAINS is not set # CONFIG_PHY_XGENE is not set -# CONFIG_PINCTRL_GR8 is not set # CONFIG_PINCTRL_SUN4I_A10 is not set CONFIG_PINCTRL_SUN50I_A64=y -# CONFIG_PINCTRL_SUN5I_A10S is not set -# CONFIG_PINCTRL_SUN5I_A13 is not set +CONFIG_PINCTRL_SUN50I_A64_R=y +CONFIG_PINCTRL_SUN50I_H5=y +# CONFIG_PINCTRL_SUN5I is not set # CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31S is not set # CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN7I_A20 is not set # CONFIG_PINCTRL_SUN8I_A23 is not set # CONFIG_PINCTRL_SUN8I_A23_R is not set # CONFIG_PINCTRL_SUN8I_A33 is not set # CONFIG_PINCTRL_SUN8I_A83T is not set +# CONFIG_PINCTRL_SUN8I_A83T_R is not set # CONFIG_PINCTRL_SUN8I_H3 is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set +# CONFIG_PINCTRL_SUN8I_V3S is not set # CONFIG_PINCTRL_SUN9I_A80 is not set # CONFIG_PINCTRL_SUN9I_A80_R is not set # CONFIG_RANDOMIZE_BASE is not set -# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_REALTEK_PHY=y # CONFIG_SERIAL_AMBA_PL011 is not set +CONFIG_SOUND_OSS_CORE_PRECLAIM=y CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_MANUAL=y @@ -98,3 +102,5 @@ CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SUN50I_A64_CCU=y CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_VMAP_STACK=y diff --git a/target/linux/sunxi/cortexa7/config-default b/target/linux/sunxi/cortexa7/config-default index 14912981d..cf41ddb4e 100644 --- a/target/linux/sunxi/cortexa7/config-default +++ b/target/linux/sunxi/cortexa7/config-default @@ -1,8 +1,10 @@ CONFIG_DWMAC_SUN8I=y -CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y # CONFIG_MACH_SUN4I is not set # CONFIG_MACH_SUN5I is not set # CONFIG_PINCTRL_GR8 is not set # CONFIG_PINCTRL_SUN4I_A10 is not set # CONFIG_PINCTRL_SUN5I_A10S is not set # CONFIG_PINCTRL_SUN5I_A13 is not set +CONFIG_MDIO_BUS_MUX=y +# CONFIG_PINCTRL_SUN5I is not set +# CONFIG_SUN4I_A10_CCU is not set diff --git a/target/linux/sunxi/cortexa8/config-default b/target/linux/sunxi/cortexa8/config-default index 93e48956e..fa40deb6f 100644 --- a/target/linux/sunxi/cortexa8/config-default +++ b/target/linux/sunxi/cortexa8/config-default @@ -1,7 +1,6 @@ # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set # CONFIG_ARM_ERRATA_643719 is not set # CONFIG_ARM_LPAE is not set -CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y # CONFIG_MACH_SUN6I is not set # CONFIG_MACH_SUN7I is not set # CONFIG_MACH_SUN8I is not set diff --git a/target/linux/sunxi/image/cortex-a53.mk b/target/linux/sunxi/image/cortex-a53.mk index bbb253f0a..344071b94 100644 --- a/target/linux/sunxi/image/cortex-a53.mk +++ b/target/linux/sunxi/image/cortex-a53.mk @@ -7,6 +7,16 @@ # ifeq ($(SUBTARGET),cortexa53) +define Device/sun50i-h5-nanopi-neo-plus2 + DEVICE_TITLE:=Nanopi NEO Plus2 (H5) + SUPPORTED_DEVICES:=nanopi-neo-plus2 + SUNXI_DTS:=allwinner/sun50i-h5-nanopi-neo-plus2 + KERNEL_NAME := Image + KERNEL := kernel-bin +endef + +TARGET_DEVICES += sun50i-h5-nanopi-neo-plus2 + define Device/sun50i-a64-pine64-plus DEVICE_TITLE:=Pine64 Plus A64 SUPPORTED_DEVICES:=pine64,pine64-plus @@ -17,4 +27,25 @@ endef TARGET_DEVICES += sun50i-a64-pine64-plus +define Device/sun50i-a64-sopine-baseboard + DEVICE_TITLE:=Pine64 Sopine + SUPPORTED_DEVICES:=pine64,sopine-baseboard + SUNXI_DTS:=allwinner/sun50i-a64-sopine-baseboard + KERNEL_NAME := Image + KERNEL := kernel-bin +endef + +TARGET_DEVICES += sun50i-a64-sopine-baseboard + + +define Device/sun50i-h5-orangepi-zero-plus + DEVICE_TITLE:=Xunlong Orange Pi Zero Plus + SUPPORTED_DEVICES:=xunlong,orangepi-zero-plus + SUNXI_DTS:=allwinner/sun50i-h5-orangepi-zero-plus + KERNEL_NAME := Image + KERNEL := kernel-bin +endef + +TARGET_DEVICES += sun50i-h5-orangepi-zero-plus + endif diff --git a/target/linux/sunxi/image/cortex-a7.mk b/target/linux/sunxi/image/cortex-a7.mk index 229b055e6..986b6395c 100644 --- a/target/linux/sunxi/image/cortex-a7.mk +++ b/target/linux/sunxi/image/cortex-a7.mk @@ -139,6 +139,16 @@ endef TARGET_DEVICES += sun8i-h3-nanopi-neo +define Device/sun8i-h3-orangepi-pc + DEVICE_TITLE:=Xunlong Orange Pi PC + DEVICE_PACKAGES:=kmod-rtc-sunxi kmod-gpio-button-hotplug + SUPPORTED_DEVICES:=xunlong,orangepi-pc + SUNXI_DTS:=sun8i-h3-orangepi-pc +endef + +TARGET_DEVICES += sun8i-h3-orangepi-pc + + define Device/sun8i-h3-orangepi-plus DEVICE_TITLE:=Xunlong Orange Pi Plus DEVICE_PACKAGES:=kmod-rtc-sunxi diff --git a/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch new file mode 100644 index 000000000..3a9668b64 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch @@ -0,0 +1,33 @@ +From b5beecb580376cd8d959eb990abece6a748a3ce3 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 24 Oct 2017 19:57:12 +0200 +Subject: [PATCH] net: stmmac: snps, dwmac-mdio MDIOs are automatically + registered + +stmmac bindings docs said that its mdio node must have +compatible = "snps,dwmac-mdio"; +Since dwmac-sun8i does not have any good reasons to not doing it, all +their MDIO node must have it. + +Since these compatible is automatically registered, dwmac-sun8i compatible +does not need to be in need_mdio_ids. + +Signed-off-by: Corentin Labbe +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ---- + 1 file changed, 4 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +@@ -318,10 +318,6 @@ static int stmmac_dt_phy(struct plat_stm + bool mdio = true; + static const struct of_device_id need_mdio_ids[] = { + { .compatible = "snps,dwc-qos-ethernet-4.10" }, +- { .compatible = "allwinner,sun8i-a83t-emac" }, +- { .compatible = "allwinner,sun8i-h3-emac" }, +- { .compatible = "allwinner,sun8i-v3s-emac" }, +- { .compatible = "allwinner,sun50i-a64-emac" }, + {}, + }; + diff --git a/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch new file mode 100644 index 000000000..8e0527f3d --- /dev/null +++ b/target/linux/sunxi/patches-4.14/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch @@ -0,0 +1,506 @@ +From 634db83b82658f4641d8026e340c6027cf74a6bb Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 24 Oct 2017 19:57:13 +0200 +Subject: [PATCH] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs + +The Allwinner H3 SoC have two distinct MDIO bus, only one could be +active at the same time. +The selection of the active MDIO bus are done via some bits in the EMAC +register of the system controller. + +This patch implement this MDIO switch via a custom MDIO-mux. + +Signed-off-by: Corentin Labbe +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++-------- + 2 files changed, 224 insertions(+), 130 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig ++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig +@@ -159,6 +159,7 @@ config DWMAC_SUN8I + tristate "Allwinner sun8i GMAC support" + default ARCH_SUNXI + depends on OF && (ARCH_SUNXI || COMPILE_TEST) ++ select MDIO_BUS_MUX + ---help--- + Support for Allwinner H3 A83T A64 EMAC ethernet controllers. + +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -41,14 +42,14 @@ + * This value is used for disabling properly EMAC + * and used as a good starting value in case of the + * boot process(uboot) leave some stuff. +- * @internal_phy: Does the MAC embed an internal PHY ++ * @soc_has_internal_phy: Does the MAC embed an internal PHY + * @support_mii: Does the MAC handle MII + * @support_rmii: Does the MAC handle RMII + * @support_rgmii: Does the MAC handle RGMII + */ + struct emac_variant { + u32 default_syscon_value; +- int internal_phy; ++ bool soc_has_internal_phy; + bool support_mii; + bool support_rmii; + bool support_rgmii; +@@ -61,7 +62,8 @@ struct emac_variant { + * @rst_ephy: reference to the optional EPHY reset for the internal PHY + * @variant: reference to the current board variant + * @regmap: regmap for using the syscon +- * @use_internal_phy: Does the current PHY choice imply using the internal PHY ++ * @internal_phy_powered: Does the internal PHY is enabled ++ * @mux_handle: Internal pointer used by mdio-mux lib + */ + struct sunxi_priv_data { + struct clk *tx_clk; +@@ -70,12 +72,13 @@ struct sunxi_priv_data { + struct reset_control *rst_ephy; + const struct emac_variant *variant; + struct regmap *regmap; +- bool use_internal_phy; ++ bool internal_phy_powered; ++ void *mux_handle; + }; + + static const struct emac_variant emac_variant_h3 = { + .default_syscon_value = 0x58000, +- .internal_phy = PHY_INTERFACE_MODE_MII, ++ .soc_has_internal_phy = true, + .support_mii = true, + .support_rmii = true, + .support_rgmii = true +@@ -83,20 +86,20 @@ static const struct emac_variant emac_va + + static const struct emac_variant emac_variant_v3s = { + .default_syscon_value = 0x38000, +- .internal_phy = PHY_INTERFACE_MODE_MII, ++ .soc_has_internal_phy = true, + .support_mii = true + }; + + static const struct emac_variant emac_variant_a83t = { + .default_syscon_value = 0, +- .internal_phy = 0, ++ .soc_has_internal_phy = false, + .support_mii = true, + .support_rgmii = true + }; + + static const struct emac_variant emac_variant_a64 = { + .default_syscon_value = 0, +- .internal_phy = 0, ++ .soc_has_internal_phy = false, + .support_mii = true, + .support_rmii = true, + .support_rgmii = true +@@ -195,6 +198,9 @@ static const struct emac_variant emac_va + #define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */ + #define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */ + #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ ++#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT) ++#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1 ++#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2 + + /* H3/A64 specific bits */ + #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ +@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmm + return 0; + } + ++/* Search in mdio-mux node for internal PHY node and get its clk/reset */ ++static int get_ephy_nodes(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ struct device_node *mdio_mux, *iphynode; ++ struct device_node *mdio_internal; ++ int ret; ++ ++ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux"); ++ if (!mdio_mux) { ++ dev_err(priv->device, "Cannot get mdio-mux node\n"); ++ return -ENODEV; ++ } ++ ++ mdio_internal = of_find_compatible_node(mdio_mux, NULL, ++ "allwinner,sun8i-h3-mdio-internal"); ++ if (!mdio_internal) { ++ dev_err(priv->device, "Cannot get internal_mdio node\n"); ++ return -ENODEV; ++ } ++ ++ /* Seek for internal PHY */ ++ for_each_child_of_node(mdio_internal, iphynode) { ++ gmac->ephy_clk = of_clk_get(iphynode, 0); ++ if (IS_ERR(gmac->ephy_clk)) ++ continue; ++ gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL); ++ if (IS_ERR(gmac->rst_ephy)) { ++ ret = PTR_ERR(gmac->rst_ephy); ++ if (ret == -EPROBE_DEFER) ++ return ret; ++ continue; ++ } ++ dev_info(priv->device, "Found internal PHY node\n"); ++ return 0; ++ } ++ return -ENODEV; ++} ++ ++static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ int ret; ++ ++ if (gmac->internal_phy_powered) { ++ dev_warn(priv->device, "Internal PHY already powered\n"); ++ return 0; ++ } ++ ++ dev_info(priv->device, "Powering internal PHY\n"); ++ ret = clk_prepare_enable(gmac->ephy_clk); ++ if (ret) { ++ dev_err(priv->device, "Cannot enable internal PHY\n"); ++ return ret; ++ } ++ ++ /* Make sure the EPHY is properly reseted, as U-Boot may leave ++ * it at deasserted state, and thus it may fail to reset EMAC. ++ */ ++ reset_control_assert(gmac->rst_ephy); ++ ++ ret = reset_control_deassert(gmac->rst_ephy); ++ if (ret) { ++ dev_err(priv->device, "Cannot deassert internal phy\n"); ++ clk_disable_unprepare(gmac->ephy_clk); ++ return ret; ++ } ++ ++ gmac->internal_phy_powered = true; ++ ++ return 0; ++} ++ ++static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) ++{ ++ if (!gmac->internal_phy_powered) ++ return 0; ++ ++ clk_disable_unprepare(gmac->ephy_clk); ++ reset_control_assert(gmac->rst_ephy); ++ gmac->internal_phy_powered = false; ++ return 0; ++} ++ ++/* MDIO multiplexing switch function ++ * This function is called by the mdio-mux layer when it thinks the mdio bus ++ * multiplexer needs to switch. ++ * 'current_child' is the current value of the mux register ++ * 'desired_child' is the value of the 'reg' property of the target child MDIO ++ * node. ++ * The first time this function is called, current_child == -1. ++ * If current_child == desired_child, then the mux is already set to the ++ * correct bus. ++ */ ++static int mdio_mux_syscon_switch_fn(int current_child, int desired_child, ++ void *data) ++{ ++ struct stmmac_priv *priv = data; ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ u32 reg, val; ++ int ret = 0; ++ bool need_power_ephy = false; ++ ++ if (current_child ^ desired_child) { ++ regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®); ++ switch (desired_child) { ++ case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID: ++ dev_info(priv->device, "Switch mux to internal PHY"); ++ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT; ++ ++ need_power_ephy = true; ++ break; ++ case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID: ++ dev_info(priv->device, "Switch mux to external PHY"); ++ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN; ++ need_power_ephy = false; ++ break; ++ default: ++ dev_err(priv->device, "Invalid child ID %x\n", ++ desired_child); ++ return -EINVAL; ++ } ++ regmap_write(gmac->regmap, SYSCON_EMAC_REG, val); ++ if (need_power_ephy) { ++ ret = sun8i_dwmac_power_internal_phy(priv); ++ if (ret) ++ return ret; ++ } else { ++ sun8i_dwmac_unpower_internal_phy(gmac); ++ } ++ /* After changing syscon value, the MAC need reset or it will ++ * use the last value (and so the last PHY set). ++ */ ++ ret = sun8i_dwmac_reset(priv); ++ } ++ return ret; ++} ++ ++static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv) ++{ ++ int ret; ++ struct device_node *mdio_mux; ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ ++ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux"); ++ if (!mdio_mux) ++ return -ENODEV; ++ ++ ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn, ++ &gmac->mux_handle, priv, priv->mii); ++ return ret; ++} ++ + static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) + { + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; +@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct + "Current syscon value is not the default %x (expect %x)\n", + val, reg); + +- if (gmac->variant->internal_phy) { +- if (!gmac->use_internal_phy) { +- /* switch to external PHY interface */ +- reg &= ~H3_EPHY_SELECT; +- } else { +- reg |= H3_EPHY_SELECT; +- reg &= ~H3_EPHY_SHUTDOWN; +- dev_dbg(priv->device, "Select internal_phy %x\n", reg); +- +- if (of_property_read_bool(priv->plat->phy_node, +- "allwinner,leds-active-low")) +- reg |= H3_EPHY_LED_POL; +- else +- reg &= ~H3_EPHY_LED_POL; +- +- /* Force EPHY xtal frequency to 24MHz. */ +- reg |= H3_EPHY_CLK_SEL; +- +- ret = of_mdio_parse_addr(priv->device, +- priv->plat->phy_node); +- if (ret < 0) { +- dev_err(priv->device, "Could not parse MDIO addr\n"); +- return ret; +- } +- /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY +- * address. No need to mask it again. +- */ +- reg |= ret << H3_EPHY_ADDR_SHIFT; ++ if (gmac->variant->soc_has_internal_phy) { ++ if (of_property_read_bool(priv->plat->phy_node, ++ "allwinner,leds-active-low")) ++ reg |= H3_EPHY_LED_POL; ++ else ++ reg &= ~H3_EPHY_LED_POL; ++ ++ /* Force EPHY xtal frequency to 24MHz. */ ++ reg |= H3_EPHY_CLK_SEL; ++ ++ ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node); ++ if (ret < 0) { ++ dev_err(priv->device, "Could not parse MDIO addr\n"); ++ return ret; + } ++ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY ++ * address. No need to mask it again. ++ */ ++ reg |= 1 << H3_EPHY_ADDR_SHIFT; + } + + if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { +@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(str + regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); + } + +-static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) ++static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + { +- struct sunxi_priv_data *gmac = priv->plat->bsp_priv; +- int ret; +- +- if (!gmac->use_internal_phy) +- return 0; ++ struct sunxi_priv_data *gmac = priv; + +- ret = clk_prepare_enable(gmac->ephy_clk); +- if (ret) { +- dev_err(priv->device, "Cannot enable ephy\n"); +- return ret; ++ if (gmac->variant->soc_has_internal_phy) { ++ /* sun8i_dwmac_exit could be called with mdiomux uninit */ ++ if (gmac->mux_handle) ++ mdio_mux_uninit(gmac->mux_handle); ++ if (gmac->internal_phy_powered) ++ sun8i_dwmac_unpower_internal_phy(gmac); + } + +- /* Make sure the EPHY is properly reseted, as U-Boot may leave +- * it at deasserted state, and thus it may fail to reset EMAC. +- */ +- reset_control_assert(gmac->rst_ephy); +- +- ret = reset_control_deassert(gmac->rst_ephy); +- if (ret) { +- dev_err(priv->device, "Cannot deassert ephy\n"); +- clk_disable_unprepare(gmac->ephy_clk); +- return ret; +- } +- +- return 0; +-} +- +-static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) +-{ +- if (!gmac->use_internal_phy) +- return 0; +- +- clk_disable_unprepare(gmac->ephy_clk); +- reset_control_assert(gmac->rst_ephy); +- return 0; +-} +- +-/* sun8i_power_phy() - Activate the PHY: +- * In case of error, no need to call sun8i_unpower_phy(), +- * it will be called anyway by sun8i_dwmac_exit() +- */ +-static int sun8i_power_phy(struct stmmac_priv *priv) +-{ +- int ret; +- +- ret = sun8i_dwmac_power_internal_phy(priv); +- if (ret) +- return ret; +- +- ret = sun8i_dwmac_set_syscon(priv); +- if (ret) +- return ret; +- +- /* After changing syscon value, the MAC need reset or it will use +- * the last value (and so the last PHY set. +- */ +- ret = sun8i_dwmac_reset(priv); +- if (ret) +- return ret; +- return 0; +-} +- +-static void sun8i_unpower_phy(struct sunxi_priv_data *gmac) +-{ + sun8i_dwmac_unset_syscon(gmac); +- sun8i_dwmac_unpower_internal_phy(gmac); +-} +- +-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) +-{ +- struct sunxi_priv_data *gmac = priv; + +- sun8i_unpower_phy(gmac); ++ reset_control_put(gmac->rst_ephy); + + clk_disable_unprepare(gmac->tx_clk); + +@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwm + if (!mac) + return NULL; + +- ret = sun8i_power_phy(priv); ++ ret = sun8i_dwmac_set_syscon(priv); + if (ret) + return NULL; + +@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct plat + struct sunxi_priv_data *gmac; + struct device *dev = &pdev->dev; + int ret; ++ struct stmmac_priv *priv; ++ struct net_device *ndev; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) +@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct plat + } + + plat_dat->interface = of_get_phy_mode(dev->of_node); +- if (plat_dat->interface == gmac->variant->internal_phy) { +- dev_info(&pdev->dev, "Will use internal PHY\n"); +- gmac->use_internal_phy = true; +- gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); +- if (IS_ERR(gmac->ephy_clk)) { +- ret = PTR_ERR(gmac->ephy_clk); +- dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret); +- return -EINVAL; +- } +- +- gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL); +- if (IS_ERR(gmac->rst_ephy)) { +- ret = PTR_ERR(gmac->rst_ephy); +- if (ret == -EPROBE_DEFER) +- return ret; +- dev_err(&pdev->dev, "No EPHY reset control found %d\n", +- ret); +- return -EINVAL; +- } +- } else { +- dev_info(&pdev->dev, "Will use external PHY\n"); +- gmac->use_internal_phy = false; +- } + + /* platform data specifying hardware features and callbacks. + * hardware features were copied from Allwinner drivers. +@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct plat + + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (ret) +- sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); ++ goto dwmac_exit; ++ ++ ndev = dev_get_drvdata(&pdev->dev); ++ priv = netdev_priv(ndev); ++ /* The mux must be registered after parent MDIO ++ * so after stmmac_dvr_probe() ++ */ ++ if (gmac->variant->soc_has_internal_phy) { ++ ret = get_ephy_nodes(priv); ++ if (ret) ++ goto dwmac_exit; ++ ret = sun8i_dwmac_register_mdio_mux(priv); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register mux\n"); ++ goto dwmac_mux; ++ } ++ } else { ++ ret = sun8i_dwmac_reset(priv); ++ if (ret) ++ goto dwmac_exit; ++ } + + return ret; ++dwmac_mux: ++ sun8i_dwmac_unset_syscon(gmac); ++dwmac_exit: ++ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); ++return ret; + } + + static const struct of_device_id sun8i_dwmac_match[] = { diff --git a/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch new file mode 100644 index 000000000..2f4358505 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/003-net-stmmac-sun8i-Restore-the-compatibles.patch @@ -0,0 +1,35 @@ +From a8ff8ccb45d37efa64476958fc5e9a8d9716b23b Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 24 Oct 2017 19:57:14 +0200 +Subject: [PATCH] net: stmmac: sun8i: Restore the compatibles + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore compatibles about dwmac-sun8i +This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles") + +Signed-off-by: Corentin Labbe +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -1072,6 +1072,14 @@ return ret; + } + + static const struct of_device_id sun8i_dwmac_match[] = { ++ { .compatible = "allwinner,sun8i-h3-emac", ++ .data = &emac_variant_h3 }, ++ { .compatible = "allwinner,sun8i-v3s-emac", ++ .data = &emac_variant_v3s }, ++ { .compatible = "allwinner,sun8i-a83t-emac", ++ .data = &emac_variant_a83t }, ++ { .compatible = "allwinner,sun50i-a64-emac", ++ .data = &emac_variant_a64 }, + { } + }; + MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); diff --git a/target/linux/sunxi/patches-4.14/004-net-stmmac-dwmac-sun8i-fix-allwinner-leds-active-low.patch b/target/linux/sunxi/patches-4.14/004-net-stmmac-dwmac-sun8i-fix-allwinner-leds-active-low.patch new file mode 100644 index 000000000..b8b5b53b3 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/004-net-stmmac-dwmac-sun8i-fix-allwinner-leds-active-low.patch @@ -0,0 +1,29 @@ +From 1c08ac0c4bd8e9d66c4dde29bc496c3b430dd028 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 28 Nov 2017 17:48:22 +0100 +Subject: net: stmmac: dwmac-sun8i: fix allwinner,leds-active-low handling + +The driver expect "allwinner,leds-active-low" to be in PHY node, but +the binding doc expect it to be in MAC node. + +Since all board DT use it also in MAC node, the driver need to search +allwinner,leds-active-low in MAC node. + +Signed-off-by: Corentin Labbe +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -808,8 +808,7 @@ static int sun8i_dwmac_set_syscon(struct + val, reg); + + if (gmac->variant->soc_has_internal_phy) { +- if (of_property_read_bool(priv->plat->phy_node, +- "allwinner,leds-active-low")) ++ if (of_property_read_bool(node, "allwinner,leds-active-low")) + reg |= H3_EPHY_LED_POL; + else + reg &= ~H3_EPHY_LED_POL; diff --git a/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch new file mode 100644 index 000000000..b89278d5d --- /dev/null +++ b/target/linux/sunxi/patches-4.14/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch @@ -0,0 +1,292 @@ +From 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 31 Oct 2017 09:19:12 +0100 +Subject: [PATCH] ARM: dts: sunxi: Restore EMAC changes (boards) + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore all boards DT about dwmac-sun8i +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 +++++++ + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++++++++++++++ + arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 29 +++++++++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 ++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 +++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 ++++ + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 +++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 +++++++++++++ + 10 files changed, 131 insertions(+) + +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts +@@ -56,6 +56,8 @@ + + aliases { + serial0 = &uart0; ++ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &xr819; + }; + +@@ -102,6 +104,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>; +--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +@@ -52,6 +52,7 @@ + compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +@@ -114,6 +115,24 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +@@ -45,6 +45,16 @@ + / { + model = "FriendlyArm NanoPi M1 Plus"; + compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3"; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &ehci1 { +@@ -55,6 +65,25 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ + &ohci1 { + status = "okay"; + }; +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts +@@ -46,3 +46,10 @@ + model = "FriendlyARM NanoPi NEO"; + compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; + }; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts +@@ -54,6 +54,7 @@ + aliases { + serial0 = &uart0; + /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ++ ethernet0 = &emac; + ethernet1 = &rtl8189; + }; + +@@ -117,6 +118,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -97,6 +98,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts +@@ -53,6 +53,11 @@ + }; + }; + ++&emac { ++ /* LEDs changed to active high on the plus */ ++ /delete-property/ allwinner,leds-active-low; ++}; ++ + &mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts +@@ -52,6 +52,7 @@ + compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -113,6 +114,13 @@ + status = "okay"; + }; + ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +@@ -47,6 +47,10 @@ + model = "Xunlong Orange Pi Plus / Plus 2"; + compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; + ++ aliases { ++ ethernet0 = &emac; ++ }; ++ + reg_gmac_3v3: gmac-3v3 { + compatible = "regulator-fixed"; + regulator-name = "gmac-3v3"; +@@ -74,6 +78,24 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_8bit_pins>; +--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts ++++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts +@@ -61,3 +61,19 @@ + gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ + }; + }; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; diff --git a/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch new file mode 100644 index 000000000..9e7319b4c --- /dev/null +++ b/target/linux/sunxi/patches-4.14/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch @@ -0,0 +1,54 @@ +From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 31 Oct 2017 09:19:10 +0100 +Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore sunxi-h3-h5.dtsi +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -391,6 +391,32 @@ + clocks = <&osc24M>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x10000>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ }; ++ + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; diff --git a/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch new file mode 100644 index 000000000..2db4f1360 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch @@ -0,0 +1,59 @@ +From 776245ae02f63ba2b94596b892c597676e190e78 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 31 Oct 2017 09:19:11 +0100 +Subject: [PATCH] ARM: dts: sunxi: h3/h5: represent the mdio switch used by + sun8i-h3-emac + +Since dwmac-sun8i could use either an integrated PHY or an external PHY +(which could be at same MDIO address), we need to represent this selection +by a MDIO switch. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Reviewed-by: Andrew Lunn +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++---- + 1 file changed, 27 insertions(+), 4 deletions(-) + +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -408,11 +408,34 @@ + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; +- int_mii_phy: ethernet-phy@1 { +- compatible = "ethernet-phy-ieee802.3-c22"; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio-mux { ++ compatible = "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ /* Only one MDIO is usable at the time */ ++ internal_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; + reg = <1>; +- clocks = <&ccu CLK_BUS_EPHY>; +- resets = <&ccu RST_BUS_EPHY>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ ++ external_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; + }; + }; + }; diff --git a/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch new file mode 100644 index 000000000..af4a92158 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch @@ -0,0 +1,184 @@ +From 94f442886711c6c4f4383a1c5a6994a788ba05d8 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 31 Oct 2017 09:19:13 +0100 +Subject: [PATCH] arm64: dts: allwinner: A64: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore arm64 DT about dwmac-sun8i for A64 +This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Signed-off-by: Maxime Ripard +--- + .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++++++++++++++++ + .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 +++++++++++++++ + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +++++++++++++++++ + .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++++++++++++++++ + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 ++++++++++++++++++++ + 5 files changed, 84 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +@@ -51,6 +51,7 @@ + compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + }; +@@ -69,6 +70,14 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -79,6 +88,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts +@@ -48,3 +48,18 @@ + + /* TODO: Camera, touchscreen, etc. */ + }; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -51,6 +51,7 @@ + compatible = "pine64,pine64", "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; +@@ -71,6 +72,15 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rmii_pins>; ++ phy-mode = "rmii"; ++ phy-handle = <&ext_rmii_phy1>; ++ status = "okay"; ++ ++}; ++ + &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +@@ -81,6 +91,13 @@ + bias-pull-up; + }; + ++&mdio { ++ ext_rmii_phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +@@ -53,6 +53,7 @@ + "allwinner,sun50i-a64"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -76,6 +77,21 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &mmc2 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -449,6 +449,26 @@ + #size-cells = <0>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun50i-a64-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x10000>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ status = "disabled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++ + gic: interrupt-controller@1c81000 { + compatible = "arm,gic-400"; + reg = <0x01c81000 0x1000>, diff --git a/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch new file mode 100644 index 000000000..40efc9f3e --- /dev/null +++ b/target/linux/sunxi/patches-4.14/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch @@ -0,0 +1,28 @@ +From 16416084e06e1ebff51a9e7721a8cc4ccc186f28 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 31 Oct 2017 09:19:15 +0100 +Subject: [PATCH] arm64: dts: allwinner: add snps,dwmac-mdio compatible to + emac/mdio + +stmmac bindings docs said that its mdio node must have +compatible = "snps,dwmac-mdio"; +Since dwmac-sun8i does not have any good reasons to not doing it, all +their MDIO node must have it. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -464,6 +464,7 @@ + #size-cells = <0>; + + mdio: mdio { ++ compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; diff --git a/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch new file mode 100644 index 000000000..b2c9d75ad --- /dev/null +++ b/target/linux/sunxi/patches-4.14/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch @@ -0,0 +1,120 @@ +From 44a94c7ef989317de81e3e7f84385be2bf1b5fe2 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 31 Oct 2017 09:19:14 +0100 +Subject: [PATCH] arm64: dts: allwinner: H5: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore arm64 DT about dwmac-sun8i for H5 +This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++ + .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++ + .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +++++++++++++++++ + 3 files changed, 51 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts +@@ -50,6 +50,7 @@ + compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -108,6 +109,22 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@7 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +@@ -59,6 +59,7 @@ + }; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -136,6 +137,22 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts +@@ -54,6 +54,7 @@ + compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5"; + + aliases { ++ ethernet0 = &emac; + serial0 = &uart0; + }; + +@@ -143,6 +144,22 @@ + status = "okay"; + }; + ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; diff --git a/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch new file mode 100644 index 000000000..295fff2e7 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch @@ -0,0 +1,51 @@ +From bdfe4cebea11476d278b1b98dd0f7cdac8269d62 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Fri, 10 Nov 2017 17:26:54 +0800 +Subject: [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several + boards + +On several A64 boards the Ethernet PHY is powered by the DC1SW regulator +on the AXP803 PMIC. + +Add phy-handle property to these boards' emac node. + +Signed-off-by: Icenowy Zheng +Acked-by: Corentin LABBE +Tested-by: Corentin LABBE +Signed-off-by: Maxime Ripard +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 + + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 + + arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 + + 3 files changed, 3 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +@@ -75,6 +75,7 @@ + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + }; + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -77,6 +77,7 @@ + pinctrl-0 = <&rmii_pins>; + phy-mode = "rmii"; + phy-handle = <&ext_rmii_phy1>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + + }; +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +@@ -82,6 +82,7 @@ + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + }; + diff --git a/target/linux/mvebu/patches-4.9/470-ClearFog-renamed-upstream.patch b/target/linux/sunxi/patches-4.14/060-ARM-dts-sun8i-add-support-for-Orange-Pi-R1.patch similarity index 50% rename from target/linux/mvebu/patches-4.9/470-ClearFog-renamed-upstream.patch rename to target/linux/sunxi/patches-4.14/060-ARM-dts-sun8i-add-support-for-Orange-Pi-R1.patch index 3eeda9fd3..e9d448792 100644 --- a/target/linux/mvebu/patches-4.9/470-ClearFog-renamed-upstream.patch +++ b/target/linux/sunxi/patches-4.14/060-ARM-dts-sun8i-add-support-for-Orange-Pi-R1.patch @@ -1,37 +1,37 @@ -From b0db8cc1fe7eab722bc1f7c386132b3905d67f30 Mon Sep 17 00:00:00 2001 -From: Marko Ratkaj -Date: Fri, 7 Apr 2017 11:01:26 +0200 -Subject: [PATCH 1/2] ClearFog renamed upstream +From 74942cd5dfe4ac4fd982fe58118bc69346a2bd18 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Sun, 12 Nov 2017 20:41:29 +0800 +Subject: [PATCH] ARM: dts: sun8i: add support for Orange Pi R1 -Signed-off-by: Marko Ratkaj +Orange Pi R1 is a board design based on Orange Pi Zero, with XR819 Wi-Fi +chip replaced by RTL8189ETV Wi-Fi module and the USB Type-A jack +replaced by an onboard USB RTL8152B USB-Ethernet adapter. + +Add support for it. + +Signed-off-by: Icenowy Zheng +Signed-off-by: Maxime Ripard --- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/armada-388-clearfog-pro.dts | 55 +++++++++++++++++++++++++++ - 2 files changed, 56 insertions(+) - create mode 100644 arch/arm/boot/dts/armada-388-clearfog-pro.dts + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts | 73 +++++++++++++++++++++++++ + 2 files changed, 74 insertions(+) + create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -924,6 +924,7 @@ dtb-$(CONFIG_MACH_ARMADA_38X) += \ - armada-385-linksys-rango.dtb \ - armada-385-linksys-shelby.dtb \ - armada-388-clearfog.dtb \ -+ armada-388-clearfog-pro.dtb \ - armada-388-db.dtb \ - armada-388-gp.dtb \ - armada-388-rd.dtb +@@ -916,6 +916,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ + sun8i-a83t-allwinner-h8homlet-v2.dtb \ + sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-cubietruck-plus.dtb \ ++ sun8i-h2-plus-orangepi-r1.dtb \ + sun8i-h2-plus-orangepi-zero.dtb \ + sun8i-h3-bananapi-m2-plus.dtb \ + sun8i-h3-beelink-x2.dtb \ --- /dev/null -+++ b/arch/arm/boot/dts/armada-388-clearfog-pro.dts -@@ -0,0 +1,55 @@ ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts +@@ -0,0 +1,73 @@ +/* -+ * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828) -+ * -+ * Copyright (C) 2015 Russell King -+ * -+ * This board is in development; the contents of this file work with -+ * the A1 rev 2.0 of the board, which does not represent final -+ * production board. Things will change, don't expect this file to -+ * remain compatible info the future. ++ * Copyright (C) 2017 Icenowy Zheng + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual @@ -39,8 +39,9 @@ Signed-off-by: Marko Ratkaj + * whole. + * + * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -70,11 +71,35 @@ Signed-off-by: Marko Ratkaj + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ -+#include "armada-388-clearfog.dts" ++ ++/* Orange Pi R1 is based on Orange Pi Zero design */ ++#include "sun8i-h2-plus-orangepi-zero.dts" + +/ { -+ model = "SolidRun Clearfog Pro A1"; -+ compatible = "solidrun,clearfog-pro-a1", -+ "solidrun,clearfog-a1", "marvell,armada388", -+ "marvell,armada385", "marvell,armada380"; ++ model = "Xunlong Orange Pi R1"; ++ compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus"; ++ ++ /delete-node/ reg_vcc_wifi; ++ ++ aliases { ++ ethernet1 = &rtl8189etv; ++ }; ++}; ++ ++&ohci1 { ++ /* ++ * RTL8152B USB-Ethernet adapter is connected to USB1, ++ * and it's a USB 2.0 device. So the OHCI1 controller ++ * can be left disabled. ++ */ ++ status = "disabled"; ++}; ++ ++&mmc1 { ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ ++ rtl8189etv: sdio_wifi@1 { ++ reg = <1>; ++ }; +}; diff --git a/target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch b/target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch new file mode 100644 index 000000000..9c0e64a90 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch @@ -0,0 +1,242 @@ +From 54cc3330c2334a0cea8cafc105a29c5d67f9fd32 Mon Sep 17 00:00:00 2001 +From: Antony Antony +Date: Fri, 2 Mar 2018 10:50:48 +0100 +Subject: [PATCH] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support + +Add initial DT for NanoPi NEO Plus2 by FriendlyARM +- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU +- 1 GB DDR3 RAM +- 8GB eMMC flash (Samsung KLM8G1WEPD-B031) +- micro SD card slot +- Gigabit Ethernet (external RTL8211E-VB-CG chip) +- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module) +- 2x USB 2.0 host ports & 2x USB via headers + +Kernel 4.15 commit d7341305863b +Kernel 4.16 commit 27d7f9297027 + +Signed-off-by: Antony Antony + +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-or + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb + + always := $(dtb-y) + subdir-y := $(dts-dirs) +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts +@@ -0,0 +1,210 @@ ++/* ++ * Copyright (C) 2017 Antony Antony ++ * Copyright (C) 2016 ARM Ltd. ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun50i-h5.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "FriendlyARM NanoPi NEO Plus2"; ++ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5"; ++ ++ aliases { ++ ethernet0 = &emac; ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr { ++ label = "nanopi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ ++ status { ++ label = "nanopi:red:status"; ++ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ pinctrl-names = "default"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vdd_cpux: gpio-regulator { ++ compatible = "regulator-gpio"; ++ pinctrl-names = "default"; ++ regulator-name = "vdd-cpux"; ++ regulator-type = "voltage"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-ramp-delay = <50>; /* 4ms */ ++ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; ++ gpios-states = <0x1>; ++ states = <1100000 0x0 ++ 1300000 0x1>; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ ++ post-power-on-delay-ms = <200>; ++ }; ++}; ++ ++&codec { ++ allwinner,audio-routing = ++ "Line Out", "LINEOUT", ++ "MIC1", "Mic", ++ "Mic", "MBIAS"; ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@7 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* USB Type-A ports' VBUS is always on */ ++ status = "okay"; ++}; diff --git a/target/linux/sunxi/patches-4.14/115-musb-ignore-vbus-errors.patch b/target/linux/sunxi/patches-4.14/115-musb-ignore-vbus-errors.patch new file mode 100644 index 000000000..ea9187e37 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/115-musb-ignore-vbus-errors.patch @@ -0,0 +1,26 @@ +From fce20ac5d8c98f1a8ea5298051d9fa669e455f04 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Tue, 4 Aug 2015 23:22:45 +0200 +Subject: [PATCH] musb: sunxi: Ignore VBus errors in host-only mode + +For some unclear reason sometimes we get VBus errors in host-only mode, +even though we do not have any vbus-detection then. Ignore these. + +Signed-off-by: Hans de Goede +--- + drivers/usb/musb/sunxi.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/usb/musb/sunxi.c ++++ b/drivers/usb/musb/sunxi.c +@@ -192,6 +192,10 @@ static irqreturn_t sunxi_musb_interrupt( + musb_writeb(musb->mregs, MUSB_FADDR, 0); + } + ++ /* Ignore Vbus errors when in host only mode */ ++ if (musb->port_mode == MUSB_PORT_MODE_HOST) ++ musb->int_usb &= ~MUSB_INTR_VBUSERROR; ++ + musb->int_tx = readw(musb->mregs + SUNXI_MUSB_INTRTX); + if (musb->int_tx) + writew(musb->int_tx, musb->mregs + SUNXI_MUSB_INTRTX); diff --git a/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch b/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch new file mode 100644 index 000000000..8e8fdafca --- /dev/null +++ b/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch @@ -0,0 +1,92 @@ +From 5f0bb9d0bc545ef53a83f7bd176fdc0736eed8e5 Mon Sep 17 00:00:00 2001 +From: Jens Kuske +Date: Tue, 27 Oct 2015 17:50:24 +0100 +Subject: [PATCH] reset: sunxi: Add Allwinner H3 bus resets + +The H3 bus resets have some holes between the registers, so we add +an of_xlate() function to skip them according to the datasheet. + +Signed-off-by: Jens Kuske +--- + .../bindings/reset/allwinner,sunxi-clock-reset.txt | 1 + + drivers/reset/reset-sunxi.c | 30 +++++++++++++++++++--- + 2 files changed, 28 insertions(+), 3 deletions(-) + +--- a/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt ++++ b/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt +@@ -8,6 +8,7 @@ Required properties: + - compatible: Should be one of the following: + "allwinner,sun6i-a31-ahb1-reset" + "allwinner,sun6i-a31-clock-reset" ++ "allwinner,sun8i-h3-bus-reset" + - reg: should be register base and length as documented in the + datasheet + - #reset-cells: 1, see below +--- a/drivers/reset/reset-sunxi.c ++++ b/drivers/reset/reset-sunxi.c +@@ -77,7 +77,9 @@ static const struct reset_control_ops su + .deassert = sunxi_reset_deassert, + }; + +-static int sunxi_reset_init(struct device_node *np) ++static int sunxi_reset_init(struct device_node *np, ++ int (*of_xlate)(struct reset_controller_dev *rcdev, ++ const struct of_phandle_args *reset_spec)) + { + struct sunxi_reset_data *data; + struct resource res; +@@ -110,6 +112,7 @@ static int sunxi_reset_init(struct devic + data->rcdev.nr_resets = size * 8; + data->rcdev.ops = &sunxi_reset_ops; + data->rcdev.of_node = np; ++ data->rcdev.of_xlate = of_xlate; + + return reset_controller_register(&data->rcdev); + +@@ -118,6 +121,21 @@ err_alloc: + return ret; + }; + ++static int sun8i_h3_bus_reset_xlate(struct reset_controller_dev *rcdev, ++ const struct of_phandle_args *reset_spec) ++{ ++ unsigned int index = reset_spec->args[0]; ++ ++ if (index < 96) ++ return index; ++ else if (index < 128) ++ return index + 32; ++ else if (index < 160) ++ return index + 64; ++ else ++ return -EINVAL; ++} ++ + /* + * These are the reset controller we need to initialize early on in + * our system, before we can even think of using a regular device +@@ -125,15 +143,21 @@ err_alloc: + */ + static const struct of_device_id sunxi_early_reset_dt_ids[] __initconst = { + { .compatible = "allwinner,sun6i-a31-ahb1-reset", }, ++ { .compatible = "allwinner,sun8i-h3-bus-reset", .data = sun8i_h3_bus_reset_xlate, }, + { /* sentinel */ }, + }; + + void __init sun6i_reset_init(void) + { + struct device_node *np; +- +- for_each_matching_node(np, sunxi_early_reset_dt_ids) +- sunxi_reset_init(np); ++ const struct of_device_id *match; ++ int (*of_xlate)(struct reset_controller_dev *rcdev, ++ const struct of_phandle_args *reset_spec); ++ ++ for_each_matching_node_and_match(np, sunxi_early_reset_dt_ids, &match) { ++ of_xlate = match->data; ++ sunxi_reset_init(np, of_xlate); ++ } + } + + /* diff --git a/target/linux/sunxi/patches-4.14/201-ARM-dts-sun8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch b/target/linux/sunxi/patches-4.14/201-ARM-dts-sun8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch new file mode 100644 index 000000000..905a70531 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/201-ARM-dts-sun8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch @@ -0,0 +1,48 @@ +From b76dc5927f6442df913f03ed261c5bff18a98df6 Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Thu, 28 Dec 2017 21:01:56 +0800 +Subject: [PATCH] ARM: dts: sun8i: fix USB Ethernet of Orange Pi R1 + +Orange Pi R1 uses a Realtek RTL8152B USB Ethernet chip, which is easily +seen on the board but not show in the schematics. A regulator for the +power of the RTL8152B chip is hidden, which uses the same pin with the +Wi-Fi regulator on the original Orange Pi Zero. + +Add this regulator back to the device tree, and bind it to USB1. + +Signed-off-by: Icenowy Zheng +--- + arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts +@@ -49,6 +49,20 @@ + + /delete-node/ reg_vcc_wifi; + ++ /* ++ * Ths pin of this regulator is the same with the Wi-Fi extra ++ * regulator on the original Zero. However it's used for USB ++ * Ethernet rather than the Wi-Fi now. ++ */ ++ reg_vcc_usb_eth: reg-vcc-usb-ethernet { ++ compatible = "regulator-fixed"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-name = "vcc-usb-ethernet"; ++ enable-active-high; ++ gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>; ++ }; ++ + aliases { + ethernet1 = &rtl8189etv; + }; +@@ -71,3 +85,7 @@ + reg = <1>; + }; + }; ++ ++&usbphy { ++ usb1_vbus-supply = <®_vcc_usb_eth>; ++}; diff --git a/target/linux/sunxi/patches-4.14/202-ARM-dts-sun8i-activate-SPI-on-Orange-Pi-R1.patch b/target/linux/sunxi/patches-4.14/202-ARM-dts-sun8i-activate-SPI-on-Orange-Pi-R1.patch new file mode 100644 index 000000000..3f03c1163 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/202-ARM-dts-sun8i-activate-SPI-on-Orange-Pi-R1.patch @@ -0,0 +1,29 @@ +From 4a36ec1f82db3fa34d766dec5062b4de06b50f7f Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Thu, 28 Dec 2017 14:11:36 +0100 +Subject: [PATCH] ARM: dts: sun8i: activate SPI on Orange Pi R1 + +This board has a SPI flash, activate it also in device tree by default. + +Signed-off-by: Hauke Mehrtens +--- + arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts ++++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts +@@ -68,6 +68,14 @@ + }; + }; + ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "mxicy,mx25l12805d", "jedec,spi-nor"; ++ }; ++}; ++ + &ohci1 { + /* + * RTL8152B USB-Ethernet adapter is connected to USB1, diff --git a/target/linux/sunxi/patches-4.14/220-ARM-dts-orange-pi-zero-plus.patch b/target/linux/sunxi/patches-4.14/220-ARM-dts-orange-pi-zero-plus.patch new file mode 100644 index 000000000..2eedb915d --- /dev/null +++ b/target/linux/sunxi/patches-4.14/220-ARM-dts-orange-pi-zero-plus.patch @@ -0,0 +1,185 @@ +From 0e2da1a792a21e3933e17727920ed3c35a3ba57a Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Sun, 11 Mar 2018 15:13:30 +0100 +Subject: [PATCH] arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus + +The Xunlong Orange Pi Zero Plus is single board computer. +- H5 Quad-core 64-bit Cortex-A53 +- 512MB DDR3 +- microSD slot +- Debug TTL UART +- 1000M/100M/10M Ethernet RJ45 +- Realtek RTL8189FTV +- Spi flash (2MB) +- One USB 2.0 HOST, One USB 2.0 OTG + +This is based on a patch from armbian: +https://github.com/armbian/build/blob/master/patch/kernel/sunxi-next/sunxi-add-orangepi-zero-plus.patch + +Signed-off-by: Hauke Mehrtens +--- + arch/arm64/boot/dts/allwinner/Makefile | 1 + + .../dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 147 +++++++++++++++++++++ + 2 files changed, 148 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts + +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-p + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts +@@ -0,0 +1,147 @@ ++/* ++ * Copyright (C) 2016 ARM Ltd. ++ * Copyright (C) 2018 Hauke Mehrtens ++ * ++ * SPDX-License-Identifier: (GPL-2.0+ OR X11) ++ */ ++ ++/dts-v1/; ++#include "sun50i-h5.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "Xunlong Orange Pi Zero Plus"; ++ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5"; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ aliases { ++ ethernet0 = &emac; ++ ethernet1 = &rtl8189ftv; ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr { ++ label = "orangepi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */ ++ default-state = "on"; ++ }; ++ ++ status { ++ label = "orangepi:red:status"; ++ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */ ++ }; ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ ++ }; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ ++&mmc0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ status = "okay"; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ /* ++ * Explicitly define the sdio device, so that we can add an ethernet ++ * alias for it (which e.g. makes u-boot set a mac-address). ++ */ ++ rtl8189ftv: sdio_wifi@1 { ++ reg = <1>; ++ }; ++}; ++ ++&spi0 { ++ status = "okay"; ++ ++ flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "mxicy,mx25l1606e", "winbond,w25q128"; ++ reg = <0>; ++ spi-max-frequency = <40000000>; ++ }; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ /* USB Type-A ports' VBUS is always on */ ++ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ ++ status = "okay"; ++}; diff --git a/target/linux/sunxi/patches-4.14/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch b/target/linux/sunxi/patches-4.14/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch new file mode 100644 index 000000000..3f8a3418a --- /dev/null +++ b/target/linux/sunxi/patches-4.14/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch @@ -0,0 +1,88 @@ +From 49cd9ea6dc8d68eb519ccd9f31c9730dec8a181a Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Thu, 8 Mar 2018 22:14:50 +0100 +Subject: [PATCH] Revert "ARM: dts: sun7i: Add BCM53125 switch nodes to the + lamobo-r1 board" + +This reverts the changes needed for the upstream b53 DSA switch driver +to use the OpenWrt b43 swconfig switch driver. + +This reverts commit 0cdefd5b5485ee6eb3512a75739d09a4090176ed. +This reverts commit d7b9eaff5f0ca00726336b4c0c3c29decf30412a. +--- + arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 60 ++----------------------------- + 1 file changed, 3 insertions(+), 57 deletions(-) + +--- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts ++++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts +@@ -109,67 +109,13 @@ + &gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_rgmii_a>; ++ phy = <&phy1>; + phy-mode = "rgmii"; + phy-supply = <®_gmac_3v3>; + status = "okay"; + +- fixed-link { +- speed = <1000>; +- full-duplex; +- }; +- +- mdio { +- compatible = "snps,dwmac-mdio"; +- #address-cells = <1>; +- #size-cells = <0>; +- +- switch: ethernet-switch@1e { +- compatible = "brcm,bcm53125"; +- reg = <30>; +- #address-cells = <1>; +- #size-cells = <0>; +- +- ports { +- #address-cells = <1>; +- #size-cells = <0>; +- +- port0: port@0 { +- reg = <0>; +- label = "lan2"; +- }; +- +- port1: port@1 { +- reg = <1>; +- label = "lan3"; +- }; +- +- port2: port@2 { +- reg = <2>; +- label = "lan4"; +- }; +- +- port3: port@3 { +- reg = <3>; +- label = "wan"; +- }; +- +- port4: port@4 { +- reg = <4>; +- label = "lan1"; +- }; +- +- port8: port@8 { +- reg = <8>; +- label = "cpu"; +- ethernet = <&gmac>; +- phy-mode = "rgmii-txid"; +- fixed-link { +- speed = <1000>; +- full-duplex; +- }; +- }; +- }; +- }; ++ phy1: ethernet-phy@1 { ++ reg = <1>; + }; + }; + diff --git a/target/linux/sunxi/patches-4.9/0001-arm64-sunxi-always-enable-reset-controller.patch b/target/linux/sunxi/patches-4.9/0001-arm64-sunxi-always-enable-reset-controller.patch deleted file mode 100644 index e23475218..000000000 --- a/target/linux/sunxi/patches-4.9/0001-arm64-sunxi-always-enable-reset-controller.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 900a9020af7a023f9b64c919fddf8a7486108962 Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann -Date: Tue, 18 Apr 2017 15:55:51 +0200 -Subject: arm64: sunxi: always enable reset controller - -The sunxi clk driver causes a link error when the reset controller -subsystem is disabled: - -drivers/clk/built-in.o: In function `sun4i_ve_clk_setup': -:(.init.text+0xd040): undefined reference to `reset_controller_register' -drivers/clk/built-in.o: In function `sun4i_a10_display_init': -:(.init.text+0xe5e0): undefined reference to `reset_controller_register' -drivers/clk/built-in.o: In function `sunxi_usb_clk_setup': -:(.init.text+0x10074): undefined reference to `reset_controller_register' - -We already force it to be enabled on arm32 and some other arm64 platforms, -but not on arm64/sunxi. This adds the respective Kconfig statements to -also select it here. - -Signed-off-by: Arnd Bergmann -Acked-by: Maxime Ripard ---- - arch/arm64/Kconfig.platforms | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/Kconfig.platforms -+++ b/arch/arm64/Kconfig.platforms -@@ -2,9 +2,11 @@ menu "Platform selection" - - config ARCH_SUNXI - bool "Allwinner sunxi 64-bit SoC Family" -+ select ARCH_HAS_RESET_CONTROLLER - select GENERIC_IRQ_CHIP - select PINCTRL - select PINCTRL_SUN50I_A64 -+ select RESET_CONTROLLER - help - This enables support for Allwinner sunxi based SoCs like the A64. - diff --git a/target/linux/sunxi/patches-4.9/0003-clk-sunxi-ng-Remove-the-use-of-rational-computations.patch b/target/linux/sunxi/patches-4.9/0003-clk-sunxi-ng-Remove-the-use-of-rational-computations.patch index 6b8f46eae..9146a2bb4 100644 --- a/target/linux/sunxi/patches-4.9/0003-clk-sunxi-ng-Remove-the-use-of-rational-computations.patch +++ b/target/linux/sunxi/patches-4.9/0003-clk-sunxi-ng-Remove-the-use-of-rational-computations.patch @@ -19,7 +19,7 @@ Acked-by: Chen-Yu Tsai --- a/drivers/clk/sunxi-ng/Kconfig +++ b/drivers/clk/sunxi-ng/Kconfig -@@ -35,17 +35,14 @@ config SUNXI_CCU_NK +@@ -36,17 +36,14 @@ config SUNXI_CCU_NK config SUNXI_CCU_NKM bool diff --git a/target/linux/sunxi/patches-4.9/0007-clk-sunxi-ng-Add-A64-clocks.patch b/target/linux/sunxi/patches-4.9/0007-clk-sunxi-ng-Add-A64-clocks.patch index fa0bae92b..1039a83b4 100644 --- a/target/linux/sunxi/patches-4.9/0007-clk-sunxi-ng-Add-A64-clocks.patch +++ b/target/linux/sunxi/patches-4.9/0007-clk-sunxi-ng-Add-A64-clocks.patch @@ -34,7 +34,7 @@ Signed-off-by: Maxime Ripard - clocks: phandle to the oscillators feeding the CCU. Two are needed: --- a/drivers/clk/sunxi-ng/Kconfig +++ b/drivers/clk/sunxi-ng/Kconfig -@@ -53,6 +53,17 @@ config SUNXI_CCU_MP +@@ -54,6 +54,17 @@ config SUNXI_CCU_MP # SoC Drivers diff --git a/target/linux/uml/patches-4.4/000-um-Avoid-longjmp-setjmp-symbol-clashes-with-libpthre.patch b/target/linux/uml/patches-4.4/000-um-Avoid-longjmp-setjmp-symbol-clashes-with-libpthre.patch deleted file mode 100644 index 02149eea7..000000000 --- a/target/linux/uml/patches-4.4/000-um-Avoid-longjmp-setjmp-symbol-clashes-with-libpthre.patch +++ /dev/null @@ -1,130 +0,0 @@ -From f44f1e7da7c8e3f4575d5d61c4df978496903fcc Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Tue, 23 May 2017 17:32:31 -0700 -Subject: [PATCH] um: Avoid longjmp/setjmp symbol clashes with libpthread.a - -[ Upstream commit f44f1e7da7c8e3f4575d5d61c4df978496903fcc ] - -Building a statically linked UML kernel on a Centos 6.9 host resulted in -the following linking failure (GCC 4.4, glibc-2.12): - -/usr/lib/gcc/x86_64-redhat-linux/4.4.7/../../../../lib64/libpthread.a(libpthread.o): -In function `siglongjmp': -(.text+0x8490): multiple definition of `longjmp' -arch/x86/um/built-in.o:/local/users/fainelli/openwrt/trunk/build_dir/target-x86_64_musl/linux-uml/linux-4.4.69/arch/x86/um/setjmp_64.S:44: -first defined here -/usr/lib/gcc/x86_64-redhat-linux/4.4.7/../../../../lib64/libpthread.a(libpthread.o): -In function `sem_open': -(.text+0x77cd): warning: the use of `mktemp' is dangerous, better use -`mkstemp' -collect2: ld returned 1 exit status -make[4]: *** [vmlinux] Error 1 - -Adopt a solution similar to the one done for vmap where we define -longjmp/setjmp to be kernel_longjmp/setjmp. In the process, make sure we -do rename the functions in arch/x86/um/setjmp_*.S accordingly. - -Fixes: a7df4716d195 ("um: link with -lpthread") -Signed-off-by: Florian Fainelli -Signed-off-by: Richard Weinberger ---- - arch/um/Makefile | 4 ++++ - arch/x86/um/setjmp_32.S | 16 ++++++++-------- - arch/x86/um/setjmp_64.S | 16 ++++++++-------- - 3 files changed, 20 insertions(+), 16 deletions(-) - ---- a/arch/um/Makefile -+++ b/arch/um/Makefile -@@ -59,10 +59,14 @@ KBUILD_CPPFLAGS += -I$(srctree)/$(HOST_D - # Same things for in6addr_loopback and mktime - found in libc. For these two we - # only get link-time error, luckily. - # -+# -Dlongjmp=kernel_longjmp prevents anything from referencing the libpthread.a -+# embedded copy of longjmp, same thing for setjmp. -+# - # These apply to USER_CFLAGS to. - - KBUILD_CFLAGS += $(CFLAGS) $(CFLAGS-y) -D__arch_um__ \ - $(ARCH_INCLUDE) $(MODE_INCLUDE) -Dvmap=kernel_vmap \ -+ -Dlongjmp=kernel_longjmp -Dsetjmp=kernel_setjmp \ - -Din6addr_loopback=kernel_in6addr_loopback \ - -Din6addr_any=kernel_in6addr_any -Dstrrchr=kernel_strrchr - ---- a/arch/x86/um/setjmp_32.S -+++ b/arch/x86/um/setjmp_32.S -@@ -16,9 +16,9 @@ - - .text - .align 4 -- .globl setjmp -- .type setjmp, @function --setjmp: -+ .globl kernel_setjmp -+ .type kernel_setjmp, @function -+kernel_setjmp: - #ifdef _REGPARM - movl %eax,%edx - #else -@@ -35,13 +35,13 @@ setjmp: - movl %ecx,20(%edx) # Return address - ret - -- .size setjmp,.-setjmp -+ .size kernel_setjmp,.-kernel_setjmp - - .text - .align 4 -- .globl longjmp -- .type longjmp, @function --longjmp: -+ .globl kernel_longjmp -+ .type kernel_longjmp, @function -+kernel_longjmp: - #ifdef _REGPARM - xchgl %eax,%edx - #else -@@ -55,4 +55,4 @@ longjmp: - movl 16(%edx),%edi - jmp *20(%edx) - -- .size longjmp,.-longjmp -+ .size kernel_longjmp,.-kernel_longjmp ---- a/arch/x86/um/setjmp_64.S -+++ b/arch/x86/um/setjmp_64.S -@@ -18,9 +18,9 @@ - - .text - .align 4 -- .globl setjmp -- .type setjmp, @function --setjmp: -+ .globl kernel_setjmp -+ .type kernel_setjmp, @function -+kernel_setjmp: - pop %rsi # Return address, and adjust the stack - xorl %eax,%eax # Return value - movq %rbx,(%rdi) -@@ -34,13 +34,13 @@ setjmp: - movq %rsi,56(%rdi) # Return address - ret - -- .size setjmp,.-setjmp -+ .size kernel_setjmp,.-kernel_setjmp - - .text - .align 4 -- .globl longjmp -- .type longjmp, @function --longjmp: -+ .globl kernel_longjmp -+ .type kernel_longjmp, @function -+kernel_longjmp: - movl %esi,%eax # Return value (int) - movq (%rdi),%rbx - movq 8(%rdi),%rsp -@@ -51,4 +51,4 @@ longjmp: - movq 48(%rdi),%r15 - jmp *56(%rdi) - -- .size longjmp,.-longjmp -+ .size kernel_longjmp,.-kernel_longjmp diff --git a/target/linux/uml/patches-4.4/101-mconsole-exec.patch b/target/linux/uml/patches-4.4/101-mconsole-exec.patch deleted file mode 100644 index 879b106bf..000000000 --- a/target/linux/uml/patches-4.4/101-mconsole-exec.patch +++ /dev/null @@ -1,211 +0,0 @@ -# -# Minimalist mconsole exec patch -# -# 3.10 version (with bit more synchronous behavior) by fingon at iki dot fi -# Adaptation to kernel 3.3.8 made by David Fernández (david at dit.upm.es) for -# Starting point: mconsole-exec-2.6.30.patch for kernel 2.6.30 -# Author of original patch: Paolo Giarrusso, aka Blaisorblade -# (http://www.user-mode-linux.org/~blaisorblade) -# -# Known misfeatures: -# -# - If output is too long, blocks (and breaks horribly) -# (this misfeature from 3.10 patches, when minimalizing the patch; -# workaround: redirect to a shared filesystem if long output is expected) -# -# - Nothing useful is done with stdin -# ---- a/arch/um/drivers/mconsole.h -+++ b/arch/um/drivers/mconsole.h -@@ -85,6 +85,7 @@ extern void mconsole_cad(struct mc_reque - extern void mconsole_stop(struct mc_request *req); - extern void mconsole_go(struct mc_request *req); - extern void mconsole_log(struct mc_request *req); -+extern void mconsole_exec(struct mc_request *req); - extern void mconsole_proc(struct mc_request *req); - extern void mconsole_stack(struct mc_request *req); - ---- a/arch/um/drivers/mconsole_kern.c -+++ b/arch/um/drivers/mconsole_kern.c -@@ -4,6 +4,7 @@ - * Licensed under the GPL - */ - -+#include "linux/kmod.h" - #include - #include - #include -@@ -24,6 +25,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -121,6 +123,59 @@ void mconsole_log(struct mc_request *req - mconsole_reply(req, "", 0, 0); - } - -+void mconsole_exec(struct mc_request *req) -+{ -+ struct subprocess_info *sub_info; -+ int res, len; -+ struct file *out; -+ char buf[MCONSOLE_MAX_DATA]; -+ -+ char *envp[] = { -+ "HOME=/", "TERM=linux", -+ "PATH=/sbin:/bin:/usr/sbin:/usr/bin:/usr/local/sbin:/usr/local/bin", -+ NULL -+ }; -+ char *argv[] = { -+ "/bin/sh", "-c", -+ req->request.data + strlen("exec "), -+ NULL -+ }; -+ -+ sub_info = call_usermodehelper_setup("/bin/sh", argv, envp, GFP_ATOMIC, NULL, NULL, NULL); -+ if (sub_info == NULL) { -+ mconsole_reply(req, "call_usermodehelper_setup failed", 1, 0); -+ return; -+ } -+ res = call_usermodehelper_stdoutpipe(sub_info, &out); -+ if (res < 0) { -+ kfree(sub_info); -+ mconsole_reply(req, "call_usermodehelper_stdoutpipe failed", 1, 0); -+ return; -+ } -+ -+ res = call_usermodehelper_exec(sub_info, UMH_WAIT_PROC); -+ if (res < 0) { -+ kfree(sub_info); -+ mconsole_reply(req, "call_usermodehelper_exec failed", 1, 0); -+ return; -+ } -+ -+ for (;;) { -+ len = out->f_op->read(out, buf, sizeof(buf), &out->f_pos); -+ if (len < 0) { -+ mconsole_reply(req, "reading output failed", 1, 0); -+ break; -+ } -+ if (len == 0) -+ break; -+ mconsole_reply_len(req, buf, len, 0, 1); -+ } -+ fput(out); -+ -+ mconsole_reply_len(req, NULL, 0, 0, 0); -+} -+ -+ - void mconsole_proc(struct mc_request *req) - { - struct vfsmount *mnt = task_active_pid_ns(current)->proc_mnt; -@@ -187,6 +242,7 @@ void mconsole_proc(struct mc_request *re - stop - pause the UML; it will do nothing until it receives a 'go' \n\ - go - continue the UML after a 'stop' \n\ - log - make UML enter into the kernel log\n\ -+ exec - pass to /bin/sh -c synchronously\n\ - proc - returns the contents of the UML's /proc/\n\ - stack - returns the stack of the specified pid\n\ - " ---- a/arch/um/drivers/mconsole_user.c -+++ b/arch/um/drivers/mconsole_user.c -@@ -30,6 +30,7 @@ static struct mconsole_command commands[ - { "stop", mconsole_stop, MCONSOLE_PROC }, - { "go", mconsole_go, MCONSOLE_INTR }, - { "log", mconsole_log, MCONSOLE_INTR }, -+ { "exec", mconsole_exec, MCONSOLE_PROC }, - { "proc", mconsole_proc, MCONSOLE_PROC }, - { "stack", mconsole_stack, MCONSOLE_INTR }, - }; ---- a/arch/um/os-Linux/file.c -+++ b/arch/um/os-Linux/file.c -@@ -535,6 +535,8 @@ int os_create_unix_socket(const char *fi - - addr.sun_family = AF_UNIX; - -+ if (len > sizeof(addr.sun_path)) -+ len = sizeof(addr.sun_path); - snprintf(addr.sun_path, len, "%s", file); - - err = bind(sock, (struct sockaddr *) &addr, sizeof(addr)); ---- a/include/linux/kmod.h -+++ b/include/linux/kmod.h -@@ -62,6 +62,7 @@ struct subprocess_info { - int wait; - int retval; - int (*init)(struct subprocess_info *info, struct cred *new); -+ struct file *stdout; - void (*cleanup)(struct subprocess_info *info); - void *data; - }; -@@ -102,4 +103,6 @@ extern int usermodehelper_read_trylock(v - extern long usermodehelper_read_lock_wait(long timeout); - extern void usermodehelper_read_unlock(void); - -+int call_usermodehelper_stdoutpipe(struct subprocess_info *sub_info, struct file **filp); -+ - #endif /* __LINUX_KMOD_H__ */ ---- a/kernel/kmod.c -+++ b/kernel/kmod.c -@@ -39,6 +39,7 @@ - #include - #include - #include -+#include - #include - - #include -@@ -222,6 +223,28 @@ static int call_usermodehelper_exec_asyn - flush_signal_handlers(current, 1); - spin_unlock_irq(¤t->sighand->siglock); - -+ /* Install output when needed */ -+ if (sub_info->stdout) { -+ struct files_struct *f = current->files; -+ struct fdtable *fdt; -+ -+ sys_close(1); -+ sys_close(2); -+ get_file(sub_info->stdout); -+ fd_install(1, sub_info->stdout); -+ fd_install(2, sub_info->stdout); -+ spin_lock(&f->file_lock); -+ fdt = files_fdtable(f); -+ __set_bit(1, fdt->open_fds); -+ __clear_bit(1, fdt->close_on_exec); -+ __set_bit(2, fdt->open_fds); -+ __clear_bit(2, fdt->close_on_exec); -+ spin_unlock(&f->file_lock); -+ -+ /* disallow core files */ -+ current->signal->rlim[RLIMIT_CORE] = (struct rlimit){0, 0}; -+ } -+ - /* - * Our parent (unbound workqueue) runs with elevated scheduling - * priority. Avoid propagating that into the userspace child. -@@ -540,6 +563,20 @@ struct subprocess_info *call_usermodehel - } - EXPORT_SYMBOL(call_usermodehelper_setup); - -+int call_usermodehelper_stdoutpipe(struct subprocess_info *sub_info, -+ struct file **filp) -+{ -+ struct file *f[2]; -+ -+ if (create_pipe_files(f, 0)<0) -+ return PTR_ERR(f); -+ sub_info->stdout = f[1]; -+ *filp = f[0]; -+ return 0; -+} -+EXPORT_SYMBOL(call_usermodehelper_stdoutpipe); -+ -+ - /** - * call_usermodehelper_exec - start a usermode application - * @sub_info: information about the subprocessa diff --git a/target/linux/uml/patches-4.4/102-pseudo-random-mac.patch b/target/linux/uml/patches-4.4/102-pseudo-random-mac.patch deleted file mode 100644 index fc54f603c..000000000 --- a/target/linux/uml/patches-4.4/102-pseudo-random-mac.patch +++ /dev/null @@ -1,124 +0,0 @@ -=============================================================================== - -This patch makes MAC addresses of network interfaces predictable. In -particular, it adds a small routine that computes MAC addresses of based on -a SHA1 hash of the virtual machine name and interface ID. - -TECHNICAL INFORMATION: - -Applies to vanilla kernel 3.9.4. - -=============================================================================== ---- a/arch/um/Kconfig.net -+++ b/arch/um/Kconfig.net -@@ -21,6 +21,19 @@ config UML_NET - enable at least one of the following transport options to actually - make use of UML networking. - -+config UML_NET_RANDOM_MAC -+ bool "Use random MAC addresses for network interfaces" -+ default n -+ depends on UML_NET -+ help -+ Virtual network devices inside a User-Mode Linux instance must be -+ assigned a MAC (Ethernet) address. If none is specified on the UML -+ command line, one must be automatically computed. If this option is -+ enabled, a randomly generated address is used. Otherwise, if this -+ option is disabled, the address is generated from a SHA1 hash of -+ the umid of the UML instance and the interface name. The latter choice -+ is useful to make MAC addresses predictable. -+ - config UML_NET_ETHERTAP - bool "Ethertap transport" - depends on UML_NET ---- a/arch/um/drivers/net_kern.c -+++ b/arch/um/drivers/net_kern.c -@@ -25,6 +25,13 @@ - #include - #include - -+#include -+#include -+#include -+#include -+#include -+#include "os.h" -+ - #define DRIVER_NAME "uml-netdev" - - static DEFINE_SPINLOCK(opened_lock); -@@ -295,11 +302,47 @@ static void uml_net_user_timer_expire(un - #endif - } - -+#ifndef CONFIG_UML_NET_RANDOM_MAC -+ -+/* Compute a SHA1 hash of the UML instance's id and -+ * * an interface name. */ -+static int compute_hash(const char *umid, const char *ifname, char *hash) { -+ char vmif[1024]; -+ struct scatterlist sg; -+ struct crypto_hash *tfm; -+ struct hash_desc desc; -+ -+ strcpy (vmif, umid); -+ strcat (vmif, ifname); -+ -+ tfm = crypto_alloc_hash("sha1", 0, CRYPTO_ALG_ASYNC); -+ if (IS_ERR(tfm)) -+ return 1; -+ -+ desc.tfm = tfm; -+ desc.flags = 0; -+ -+ sg_init_table(&sg, 1); -+ sg_set_buf(&sg, vmif, strlen(vmif)); -+ -+ if (crypto_hash_digest(&desc, &sg, strlen(vmif), hash)) { -+ crypto_free_hash(tfm); -+ return 1; -+ } -+ -+ crypto_free_hash(tfm); -+ -+ return 0; -+} -+ -+#endif -+ - static void setup_etheraddr(struct net_device *dev, char *str) - { - unsigned char *addr = dev->dev_addr; - char *end; - int i; -+ u8 hash[SHA1_DIGEST_SIZE]; - - if (str == NULL) - goto random; -@@ -340,9 +383,26 @@ static void setup_etheraddr(struct net_d - return; - - random: -+#ifdef CONFIG_UML_NET_RANDOM_MAC - printk(KERN_INFO - "Choosing a random ethernet address for device %s\n", dev->name); - eth_hw_addr_random(dev); -+#else -+ printk(KERN_INFO -+ "Computing a digest to use as ethernet address for device %s\n", dev->name); -+ if (compute_hash(get_umid(), dev->name, hash)) { -+ printk(KERN_WARNING -+ "Could not compute digest to use as ethernet address for device %s. " -+ "Using random address instead.\n", dev->name); -+ random_ether_addr(addr); -+ } -+ else { -+ for (i=0; i < 6; i++) -+ addr[i] = (hash[i] + hash[i+6]) % 0x100; -+ } -+ addr [0] &= 0xfe; /* clear multicast bit */ -+ addr [0] |= 0x02; /* set local assignment bit (IEEE802) */ -+#endif - } - - static DEFINE_SPINLOCK(devices_lock); diff --git a/target/linux/x86/64/config-default b/target/linux/x86/64/config-default index f2ed18797..920ecdc52 100644 --- a/target/linux/x86/64/config-default +++ b/target/linux/x86/64/config-default @@ -6,6 +6,7 @@ CONFIG_ACPI_BATTERY=y CONFIG_ACPI_BUTTON=y # CONFIG_ACPI_CMPC is not set CONFIG_ACPI_CONTAINER=y +CONFIG_ACPI_CPPC_LIB=y CONFIG_ACPI_CPU_FREQ_PSS=y # CONFIG_ACPI_CUSTOM_DSDT is not set # CONFIG_ACPI_DEBUG is not set @@ -15,45 +16,48 @@ CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_FAN=y CONFIG_ACPI_HOTPLUG_CPU=y CONFIG_ACPI_HOTPLUG_IOAPIC=y -# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set +# CONFIG_ACPI_I2C_OPREGION is not set CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -# CONFIG_ACPI_NFIT is not set # CONFIG_ACPI_PCI_SLOT is not set CONFIG_ACPI_PROCESSOR=y # CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y # CONFIG_ACPI_PROCFS_POWER is not set CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y # CONFIG_ACPI_SBS is not set CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_THERMAL=y -# CONFIG_ACPI_VIDEO is not set # CONFIG_ACPI_WMI is not set CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig" -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y +CONFIG_ARCH_HAS_ADD_PAGES=y +CONFIG_ARCH_HAS_KCOV=y CONFIG_ARCH_HAS_PMEM_API=y -CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11" +CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y +CONFIG_ARCH_HAS_ZONE_DEVICE=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y -CONFIG_ARCH_PHYS_ADDR_T_64BIT=y +CONFIG_ARCH_MMAP_RND_BITS=28 +CONFIG_ARCH_MMAP_RND_BITS_MAX=32 +CONFIG_ARCH_MMAP_RND_BITS_MIN=28 CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y -CONFIG_ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH=y +CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_AUDIT_ARCH=y -# CONFIG_BACKLIGHT_APPLE is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y CONFIG_BACKLIGHT_GENERIC=y CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_MQ_VIRTIO=y # CONFIG_BOOTPARAM_HOTPLUG_CPU0 is not set CONFIG_CALGARY_IOMMU=y CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT=y CONFIG_CONNECTOR=y +# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set CONFIG_CPU_RMAP=y CONFIG_CRC_T10DIF=y -CONFIG_CRYPTO_ABLK_HELPER=y CONFIG_CRYPTO_AEAD=y CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_AES_NI_INTEL=y @@ -69,6 +73,7 @@ CONFIG_CRYPTO_CRCT10DIF=y # CONFIG_CRYPTO_CRCT10DIF_PCLMUL is not set CONFIG_CRYPTO_CRYPTD=y # CONFIG_CRYPTO_DES3_EDE_X86_64 is not set +CONFIG_CRYPTO_ECB=y CONFIG_CRYPTO_GF128MUL=y CONFIG_CRYPTO_GLUE_HELPER_X86=y CONFIG_CRYPTO_LRW=y @@ -82,17 +87,24 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set # CONFIG_CRYPTO_SHA1_MB is not set # CONFIG_CRYPTO_SHA1_SSSE3 is not set +# CONFIG_CRYPTO_SHA256_MB is not set # CONFIG_CRYPTO_SHA256_SSSE3 is not set +# CONFIG_CRYPTO_SHA512_MB is not set # CONFIG_CRYPTO_SHA512_SSSE3 is not set +CONFIG_CRYPTO_SIMD=y # CONFIG_CRYPTO_SKEIN is not set # CONFIG_CRYPTO_TWOFISH_AVX_X86_64 is not set # CONFIG_CRYPTO_TWOFISH_X86_64 is not set # CONFIG_CRYPTO_TWOFISH_X86_64_3WAY is not set CONFIG_CRYPTO_XTS=y # CONFIG_DEBUG_HOTPLUG_CPU0 is not set +# CONFIG_DPTF_POWER is not set # CONFIG_EARLY_PRINTK_EFI is not set CONFIG_EFI=y CONFIG_EFIVAR_FS=m +# CONFIG_EFI_BOOTLOADER_CONTROL is not set +# CONFIG_EFI_CAPSULE_LOADER is not set +# CONFIG_EFI_DEV_PATH_PARSER is not set CONFIG_EFI_ESRT=y # CONFIG_EFI_FAKE_MEMMAP is not set # CONFIG_EFI_MIXED is not set @@ -100,6 +112,7 @@ CONFIG_EFI_ESRT=y CONFIG_EFI_RUNTIME_MAP=y CONFIG_EFI_RUNTIME_WRAPPERS=y CONFIG_EFI_STUB=y +# CONFIG_EFI_TEST is not set CONFIG_EFI_VARS=y CONFIG_FB=y CONFIG_FB_CFB_COPYAREA=y @@ -129,32 +142,34 @@ CONFIG_FREEZER=y CONFIG_GART_IOMMU=y CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_CPU=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GPIOLIB=y -# CONFIG_GPIO_104_IDIO_16 is not set +CONFIG_GPIOLIB_IRQCHIP=y CONFIG_GPIO_ACPI=y -# CONFIG_GPIO_AMDPT is not set -CONFIG_GPIO_DEVRES=y -# CONFIG_GPIO_F7188X is not set -# CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set -# CONFIG_GPIO_LYNXPOINT is not set +CONFIG_GPIO_ICH=y +CONFIG_GPIO_IT87=y +CONFIG_GPIO_LYNXPOINT=y +CONFIG_GPIO_SCH=y CONFIG_GPIO_SYSFS=y +CONFIG_HARDLOCKUP_CHECK_TIMESTAMP=y CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y # CONFIG_HAVE_AOUT is not set -CONFIG_HAVE_ARCH_HUGE_VMAP=y CONFIG_HAVE_ARCH_SOFT_DIRTY=y -CONFIG_HAVE_BPF_JIT=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD=y +CONFIG_HAVE_ARCH_VMAP_STACK=y CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_EBPF_JIT=y CONFIG_HAVE_FENTRY=y # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y CONFIG_HAVE_LIVEPATCH=y CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_HAVE_STACK_VALIDATION=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HIBERNATE_CALLBACKS=y -CONFIG_HID=y CONFIG_HID_BATTERY_STRENGTH=y CONFIG_HID_GENERIC=y CONFIG_HID_HYPERV_MOUSE=y @@ -172,6 +187,8 @@ CONFIG_HVC_DRIVER=y CONFIG_HVC_IRQ=y CONFIG_HVC_XEN=y CONFIG_HVC_XEN_FRONTEND=y +CONFIG_HWMON=y +CONFIG_HWMON_VID=y CONFIG_HW_RANDOM_AMD=y CONFIG_HW_RANDOM_INTEL=y CONFIG_HW_RANDOM_VIRTIO=y @@ -181,20 +198,29 @@ CONFIG_HYPERV_BALLOON=y CONFIG_HYPERV_KEYBOARD=y CONFIG_HYPERV_NET=y CONFIG_HYPERV_STORAGE=y +CONFIG_HYPERV_TSCPAGE=y CONFIG_HYPERV_UTILS=y +# CONFIG_HYPERV_VSOCKETS is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y # CONFIG_I7300_IDLE is not set # CONFIG_IA32_EMULATION is not set CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y +# CONFIG_INTEL_INT0002_VGPIO is not set # CONFIG_INTEL_IPS is not set # CONFIG_INTEL_MENLOW is not set # CONFIG_INTEL_MIC_BUS is not set +CONFIG_INTEL_PCH_THERMAL=y # CONFIG_INTEL_PMC_IPC is not set +CONFIG_INTEL_SOC_DTS_IOSF_CORE=y +CONFIG_INTEL_SOC_DTS_THERMAL=y +# CONFIG_INTEL_TURBO_MAX_3 is not set # CONFIG_IOMMU_DEBUG is not set -CONFIG_IOMMU_HELPER=y +CONFIG_IOSF_MBI=y +# CONFIG_IOSF_MBI_DEBUG is not set # CONFIG_ISCSI_IBFT_FIND is not set -# CONFIG_ITCO_VENDOR_SUPPORT is not set -CONFIG_ITCO_WDT=y +CONFIG_KALLSYMS_ABSOLUTE_PERCPU=y # CONFIG_KVM_DEBUG_FS is not set CONFIG_KVM_GUEST=y # CONFIG_LCD_CLASS_DEVICE is not set @@ -202,9 +228,10 @@ CONFIG_LEDS_GPIO=y # CONFIG_LEGACY_VSYSCALL_EMULATE is not set # CONFIG_LEGACY_VSYSCALL_NATIVE is not set CONFIG_LEGACY_VSYSCALL_NONE=y -# CONFIG_LIQUIDIO is not set CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_LPC_ICH=y +CONFIG_LPC_SCH=y +CONFIG_MAILBOX=y # CONFIG_MAXSMP is not set CONFIG_MEMORY_BALLOON=y # CONFIG_MEMORY_HOTPLUG is not set @@ -222,34 +249,34 @@ CONFIG_MMU_NOTIFIER=y CONFIG_MODULES_USE_ELF_RELA=y # CONFIG_MPSC is not set CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NET_FLOW_LIMIT=y CONFIG_NR_CPUS=8 # CONFIG_NUMA is not set CONFIG_OUTPUT_FORMAT="elf64-x86-64" CONFIG_PADATA=y +CONFIG_PAGE_TABLE_ISOLATION=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_CLOCK=y # CONFIG_PARAVIRT_DEBUG is not set CONFIG_PARAVIRT_SPINLOCKS=y -# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set CONFIG_PATA_AMD=y CONFIG_PATA_ATIIXP=y CONFIG_PATA_MPIIX=y CONFIG_PATA_OLDPIIX=y CONFIG_PATA_PLATFORM=y CONFIG_PATA_VIA=y +CONFIG_PCC=y CONFIG_PCIEAER=y CONFIG_PCIEPORTBUS=y CONFIG_PCIE_PME=y -CONFIG_PCI_BUS_ADDR_T_64BIT=y +CONFIG_PCI_HYPERV=y # CONFIG_PCI_MMCONFIG is not set CONFIG_PCI_XEN=y CONFIG_PGTABLE_LEVELS=4 CONFIG_PHYSICAL_ALIGN=0x1000000 -CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PM=y # CONFIG_PMIC_OPREGION is not set +CONFIG_PM_CLK=y # CONFIG_PM_DEBUG is not set CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y @@ -262,17 +289,29 @@ CONFIG_QUEUED_RWLOCKS=y CONFIG_QUEUED_SPINLOCKS=y # CONFIG_RANDOMIZE_BASE is not set CONFIG_RAS=y +CONFIG_RCU_NEED_SEGCBLIST=y CONFIG_RCU_STALL_COMMON=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y CONFIG_RELOCATABLE=y +CONFIG_RESET_ATTACK_MITIGATION=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y +CONFIG_RTC_I2C_AND_SPI=y CONFIG_RWSEM_SPIN_ON_OWNER=y # CONFIG_SAMSUNG_Q10 is not set CONFIG_SATA_AHCI=y CONFIG_SCHED_MC=y +CONFIG_SCHED_MC_PRIO=y CONFIG_SCHED_SMT=y # CONFIG_SCIF_BUS is not set CONFIG_SCSI_VIRTIO=y +CONFIG_SENSORS_CORETEMP=y +CONFIG_SENSORS_FAM15H_POWER=y +CONFIG_SENSORS_I5500=y +CONFIG_SENSORS_K10TEMP=y +CONFIG_SENSORS_K8TEMP=y +CONFIG_SENSORS_VIA_CPUTEMP=y CONFIG_SERIAL_8250_PNP=y CONFIG_SMP=y CONFIG_SPARSEMEM=y @@ -282,30 +321,24 @@ CONFIG_SPARSEMEM_MANUAL=y # CONFIG_SPARSEMEM_VMEMMAP is not set CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y # CONFIG_SURFACE_PRO3_BUTTON is not set -CONFIG_SWIOTLB=y CONFIG_SWIOTLB_XEN=y CONFIG_SYS_HYPERVISOR=y -# CONFIG_THUNDER_NIC_BGX is not set -# CONFIG_THUNDER_NIC_PF is not set -# CONFIG_THUNDER_NIC_VF is not set +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_WRITABLE_TRIPS=y # CONFIG_TOSHIBA_BT_RFKILL is not set CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +# CONFIG_UNWINDER_ORC is not set CONFIG_UCS2_STRING=y # CONFIG_UNISYSSPAR is not set -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PCI=y -# CONFIG_USB_OHCI_HCD_PLATFORM is not set CONFIG_USB_STORAGE=y -CONFIG_USB_UHCI_HCD=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_PCI=y # CONFIG_USB_XHCI_PLATFORM is not set CONFIG_VGACON_SOFT_SCROLLBACK=y +# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 CONFIG_VIRTIO=y CONFIG_VIRTIO_BALLOON=y @@ -316,7 +349,10 @@ CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_PCI=y CONFIG_VIRTIO_PCI_LEGACY=y +# CONFIG_VIRTIO_VSOCKETS is not set CONFIG_VIRT_DRIVERS=y +CONFIG_VMAP_STACK=y +# CONFIG_VMD is not set CONFIG_VMWARE_BALLOON=y CONFIG_VMWARE_PVSCSI=y CONFIG_VMWARE_VMCI=y @@ -325,6 +361,7 @@ CONFIG_VMXNET3=y CONFIG_VSOCKETS=y CONFIG_VT_CONSOLE_SLEEP=y CONFIG_WATCHDOG_CORE=y +# CONFIG_X86_5LEVEL is not set CONFIG_X86_64=y CONFIG_X86_64_SMP=y CONFIG_X86_ACPI_CPUFREQ=y @@ -332,18 +369,20 @@ CONFIG_X86_ACPI_CPUFREQ=y CONFIG_X86_AMD_FREQ_SENSITIVITY=y # CONFIG_X86_AMD_PLATFORM_DEVICE is not set CONFIG_X86_CMOV=y -CONFIG_X86_CMPXCHG64=y +CONFIG_X86_CPUID=y CONFIG_X86_DEBUGCTLMSR=y CONFIG_X86_DEV_DMA_OPS=y CONFIG_X86_DIRECT_GBPAGES=y # CONFIG_X86_INTEL_LPSS is not set +# CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS is not set +# CONFIG_X86_INTEL_MPX is not set +CONFIG_X86_INTEL_PSTATE=y CONFIG_X86_MINIMUM_CPU_FAMILY=64 -# CONFIG_X86_MSR is not set # CONFIG_X86_PCC_CPUFREQ is not set +CONFIG_X86_PKG_TEMP_THERMAL=y # CONFIG_X86_PMEM_LEGACY is not set CONFIG_X86_PM_TIMER=y # CONFIG_X86_POWERNOW_K8 is not set -CONFIG_X86_TSC=y # CONFIG_X86_VSYSCALL_EMULATION is not set CONFIG_X86_X2APIC=y # CONFIG_X86_X32 is not set @@ -370,8 +409,11 @@ CONFIG_XEN_HAVE_VPMU=y CONFIG_XEN_NETDEV_FRONTEND=y CONFIG_XEN_PCIDEV_FRONTEND=y CONFIG_XEN_PRIVCMD=y +CONFIG_XEN_PV=y CONFIG_XEN_PVH=y CONFIG_XEN_PVHVM=y +CONFIG_XEN_PVHVM_SMP=y +CONFIG_XEN_PV_SMP=y CONFIG_XEN_SAVE_RESTORE=y CONFIG_XEN_SCRUB_PAGES=y CONFIG_XEN_SCSI_FRONTEND=y @@ -381,30 +423,3 @@ CONFIG_XEN_WDT=y CONFIG_XEN_XENBUS_FRONTEND=y CONFIG_XPS=y CONFIG_ZONE_DMA32=y -CONFIG_ARCH_MMAP_RND_BITS=28 -CONFIG_ARCH_MMAP_RND_BITS_MAX=32 -CONFIG_ARCH_MMAP_RND_BITS_MIN=28 -CONFIG_VMAP_STACK=y -CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS=y -# CONFIG_PCI_HYPERV is not set -CONFIG_VMD=n -CONFIG_VIRTIO_VSOCKETS=n -CONFIG_SATA_ZPODD=n -# CONFIG_EFI_BOOTLOADER_CONTROL is not set -# CONFIG_EFI_CAPSULE_LOADER is not set -# CONFIG_EFI_DEV_PATH_PARSER is not set -# CONFIG_EFI_TEST is not set -CONFIG_CPU_HOTPLUG_STATE_CONTROL=n -CONFIG_PAGE_TABLE_ISOLATION=y -CONFIG_CRYPTO_SHA256_MB=n -CONFIG_CRYPTO_SHA512_MB=n -CONFIG_XEN_PV=y -CONFIG_SCHED_MC_PRIO=y -# CONFIG_X86_5LEVEL is not set -# CONFIG_X86_INTEL_MPX is not set -# CONFIG_HYPERV_VSOCKETS is not set -# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set -# CONFIG_INTEL_INT0002_VGPIO is not set -# CONFIG_INTEL_TURBO_MAX_3 is not set -CONFIG_RESET_ATTACK_MITIGATION=y -# CONFIG_UNWINDER_ORC is not set diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index 9e3a8556b..1a7e822c1 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -13,7 +13,7 @@ FEATURES:=squashfs ext4 vdi vmdk pcmcia targz fpu SUBTARGETS:=generic legacy geode 64 MAINTAINER:=Felix Fietkau -KERNEL_PATCHVER:=4.14 +KERNEL_PATCHVER:=4.9 KERNELNAME:=bzImage diff --git a/target/linux/x86/base-files/lib/preinit/02_load_x86_ucode b/target/linux/x86/base-files/lib/preinit/02_load_x86_ucode new file mode 100644 index 000000000..fb309c75c --- /dev/null +++ b/target/linux/x86/base-files/lib/preinit/02_load_x86_ucode @@ -0,0 +1,10 @@ +#!/bin/sh +# Copyright (C) 2018 OpenWrt.org + +do_load_x86_ucode() { + if [ -e "/sys/devices/system/cpu/microcode/reload" ]; then + echo 1 > /sys/devices/system/cpu/microcode/reload + fi +} + +boot_hook_add preinit_main do_load_x86_ucode diff --git a/target/linux/x86/config-4.14 b/target/linux/x86/config-4.14 index bfc60e033..fa0595c28 100644 --- a/target/linux/x86/config-4.14 +++ b/target/linux/x86/config-4.14 @@ -1,30 +1,6 @@ # CONFIG_60XX_WDT is not set # CONFIG_64BIT is not set -CONFIG_ACPI=y -CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y -# CONFIG_ACPI_CMPC is not set -# CONFIG_ACPI_CONTAINER is not set -CONFIG_ACPI_CPU_FREQ_PSS=y -# CONFIG_ACPI_CUSTOM_DSDT is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DEBUGGER is not set -# CONFIG_ACPI_DOCK is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -CONFIG_ACPI_FAN=y -CONFIG_ACPI_HOTPLUG_IOAPIC=y -CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_PROCESSOR_CSTATE=y -CONFIG_ACPI_PROCESSOR_IDLE=y -# CONFIG_ACPI_PROCFS_POWER is not set -CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y -CONFIG_ACPI_THERMAL=y -# CONFIG_ACPI_WMI is not set +# CONFIG_ACPI is not set # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set # CONFIG_ALIM1535_WDT is not set @@ -36,7 +12,6 @@ CONFIG_ARCH_DISCARD_MEMBLOCK=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y @@ -53,7 +28,6 @@ CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y # CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set @@ -114,7 +88,6 @@ CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_RMAP=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_CYRIX_32=y @@ -124,17 +97,12 @@ CONFIG_CPU_SUP_UMC_32=y # CONFIG_CRASHLOG is not set CONFIG_CRASH_CORE=y CONFIG_CRC16=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_AES_586=y CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32_PCLMUL is not set CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG2=y # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set CONFIG_CRYPTO_WORKQUEUE=y @@ -157,7 +125,6 @@ CONFIG_DMIID=y CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y CONFIG_DMI_SYSFS=y CONFIG_DNOTIFY=y -# CONFIG_DPTF_POWER is not set # CONFIG_DRM_LIB_RANDOM is not set CONFIG_DUMMY_CONSOLE=y CONFIG_EARLY_PRINTK=y @@ -165,10 +132,14 @@ CONFIG_EARLY_PRINTK=y CONFIG_EDAC_ATOMIC_SCRUB=y CONFIG_EDAC_SUPPORT=y # CONFIG_EDD is not set -# CONFIG_EFI_DEV_PATH_PARSER is not set # CONFIG_EUROTECH_WDT is not set CONFIG_EXPORTFS=y CONFIG_EXT4_FS=y +# CONFIG_F2FS_CHECK_FS is not set +CONFIG_F2FS_FS=y +# CONFIG_F2FS_FS_SECURITY is not set +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_STAT_FS=y # CONFIG_F71808E_WDT is not set CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_FIRMWARE_MEMMAP=y @@ -193,14 +164,11 @@ CONFIG_GENERIC_EARLY_IOREMAP=y CONFIG_GENERIC_FIND_FIRST_BIT=y CONFIG_GENERIC_IO=y CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y CONFIG_GENERIC_IRQ_SHOW=y CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PENDING_IRQ=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y @@ -213,8 +181,6 @@ CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y # CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ACPI_APEI=y -CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_AOUT=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y @@ -279,14 +245,11 @@ CONFIG_HIGHMEM=y # CONFIG_HIGHMEM4G is not set CONFIG_HIGHMEM64G=y # CONFIG_HIGHPTE is not set -# CONFIG_HPET is not set CONFIG_HPET_EMULATE_RTC=y CONFIG_HPET_TIMER=y -# CONFIG_HP_ACCEL is not set # CONFIG_HP_WATCHDOG is not set CONFIG_HT_IRQ=y # CONFIG_HUGETLBFS is not set -CONFIG_HWMON=y CONFIG_HW_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_GEODE=y @@ -304,10 +267,7 @@ CONFIG_INITRAMFS_SOURCE="" CONFIG_INPUT=y CONFIG_INPUT_KEYBOARD=y CONFIG_INSTRUCTION_DECODER=y -# CONFIG_INTEL_IPS is not set -# CONFIG_INTEL_MENLOW is not set # CONFIG_INTEL_PCH_THERMAL is not set -# CONFIG_INTEL_PMC_IPC is not set # CONFIG_INTEL_POWERCLAMP is not set # CONFIG_INTEL_RDT is not set # CONFIG_INTEL_SOC_DTS_THERMAL is not set @@ -328,7 +288,6 @@ CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_WORK=y # CONFIG_ISA is not set CONFIG_ISA_DMA_API=y -# CONFIG_ISCSI_IBFT_FIND is not set # CONFIG_IT8712F_WDT is not set # CONFIG_IT87_WDT is not set # CONFIG_ITCO_WDT is not set @@ -339,7 +298,6 @@ CONFIG_KEXEC_CORE=y CONFIG_KEYBOARD_ATKBD=y # CONFIG_LEDS_CLEVO_MAIL is not set CONFIG_LIBNVDIMM=y -CONFIG_LOCK_SPIN_ON_OWNER=y # CONFIG_M486 is not set # CONFIG_M586 is not set CONFIG_M586MMX=y @@ -353,11 +311,13 @@ CONFIG_M586MMX=y # CONFIG_MDIO_BUS is not set # CONFIG_MEFFICEON is not set # CONFIG_MELAN is not set -# CONFIG_MFD_INTEL_LPSS_ACPI is not set # CONFIG_MFD_INTEL_LPSS_PCI is not set # CONFIG_MGEODEGX1 is not set # CONFIG_MGEODE_LX is not set -# CONFIG_MICROCODE is not set +CONFIG_MICROCODE=y +CONFIG_MICROCODE_AMD=y +CONFIG_MICROCODE_INTEL=y +CONFIG_MICROCODE_OLD_INTERFACE=y # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MK8 is not set @@ -371,7 +331,6 @@ CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MTD is not set CONFIG_MTRR=y # CONFIG_MTRR_SANITIZER is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y # CONFIG_MVIAC3_2 is not set # CONFIG_MVIAC7 is not set # CONFIG_MWINCHIP3D is not set @@ -382,15 +341,15 @@ CONFIG_ND_BTT=y CONFIG_ND_CLAIM=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_KM=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_NEED_SG_DMA_LENGTH=y # CONFIG_NET5501 is not set -CONFIG_NET_FLOW_LIMIT=y # CONFIG_NET_NS is not set CONFIG_NLS=y # CONFIG_NOHIGHMEM is not set CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=8 +CONFIG_NR_CPUS=1 # CONFIG_NSC_GPIO is not set CONFIG_NVRAM=y # CONFIG_OF is not set @@ -399,7 +358,6 @@ CONFIG_OLD_SIGSUSPEND3=y CONFIG_OPROFILE_NMI_TIMER=y # CONFIG_OPTIMIZE_INLINING is not set CONFIG_OUTPUT_FORMAT="elf32-i386" -CONFIG_PADATA=y CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PC104=y # CONFIG_PC8736x_GPIO is not set @@ -415,7 +373,6 @@ CONFIG_PCI_GOANY=y # CONFIG_PCI_GOMMCONFIG is not set CONFIG_PCI_LABEL=y CONFIG_PCI_LOCKLESS_CONFIG=y -CONFIG_PCI_MMCONFIG=y CONFIG_PCI_MSI=y CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PCSPKR_PLATFORM=y @@ -428,32 +385,20 @@ CONFIG_PHYSICAL_ALIGN=0x100000 CONFIG_PHYSICAL_START=0x1000000 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PMC_ATOM=y -# CONFIG_PMIC_OPREGION is not set -CONFIG_PNP=y -CONFIG_PNPACPI=y -CONFIG_PNP_DEBUG_MESSAGES=y CONFIG_POWER_SUPPLY=y # CONFIG_PROCESSOR_SELECT is not set CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set # CONFIG_PUNIT_ATOM_DEBUG is not set -# CONFIG_PVPANIC is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y CONFIG_RATIONAL=y -CONFIG_RCU_NEED_SEGCBLIST=y -CONFIG_RCU_STALL_COMMON=y +# CONFIG_RCU_NEED_SEGCBLIST is not set +# CONFIG_RCU_STALL_COMMON is not set CONFIG_RD_BZIP2=y CONFIG_RD_GZIP=y -# CONFIG_RETPOLINE is not set -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y +CONFIG_RETPOLINE=y CONFIG_RTC_CLASS=y CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SAMSUNG_Q10 is not set -CONFIG_SATA_AHCI=y # CONFIG_SBC7240_WDT is not set # CONFIG_SBC8360_WDT is not set # CONFIG_SBC_EPX_C3_WATCHDOG is not set @@ -465,26 +410,18 @@ CONFIG_SCx200=y CONFIG_SCx200HR_TIMER=y # CONFIG_SCx200_GPIO is not set # CONFIG_SCx200_WDT is not set -CONFIG_SENSORS_CORETEMP=y -CONFIG_SENSORS_FAM15H_POWER=y -CONFIG_SENSORS_K10TEMP=y -CONFIG_SENSORS_K8TEMP=y -CONFIG_SENSORS_VIA686A=y # CONFIG_SERIAL_8250_FSL is not set CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_PNP=y CONFIG_SERIO=y CONFIG_SERIO_I8042=y CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_SERPORT=y CONFIG_SG_POOL=y -CONFIG_SMP=y # CONFIG_SMSC37B787_WDT is not set # CONFIG_SMSC_SCH311X_WDT is not set CONFIG_SPARSEMEM_STATIC=y CONFIG_SPARSE_IRQ=y CONFIG_SRCU=y -# CONFIG_SURFACE_PRO3_BUTTON is not set CONFIG_SWIOTLB=y CONFIG_SYSCTL_EXCEPTION_TRACE=y # CONFIG_TELCLOCK is not set @@ -495,12 +432,11 @@ CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THIN_ARCHIVES=y CONFIG_THREAD_INFO_IN_TASK=y CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y # CONFIG_TOSHIBA is not set -# CONFIG_TOSHIBA_BT_RFKILL is not set -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y CONFIG_UNWINDER_FRAME_POINTER=y # CONFIG_UNWINDER_GUESS is not set +CONFIG_UP_LATE_INIT=y CONFIG_USB=y CONFIG_USB_COMMON=y CONFIG_USB_EHCI_HCD=y @@ -511,7 +447,6 @@ CONFIG_USB_HIDDEV=y CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_HCD_PLATFORM is not set CONFIG_USB_PCI=y -CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y # CONFIG_USB_UHCI_HCD is not set # CONFIG_USERIO is not set @@ -531,27 +466,19 @@ CONFIG_X86=y CONFIG_X86_32=y # CONFIG_X86_32_IRIS is not set CONFIG_X86_32_LAZY_GS=y -CONFIG_X86_32_SMP=y -CONFIG_X86_ACPI_CPUFREQ=y -CONFIG_X86_ACPI_CPUFREQ_CPB=y CONFIG_X86_ALIGNMENT_16=y -# CONFIG_X86_AMD_FREQ_SENSITIVITY is not set -# CONFIG_X86_AMD_PLATFORM_DEVICE is not set # CONFIG_X86_ANCIENT_MCE is not set -# CONFIG_X86_BIGSMP is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_CMPXCHG64=y # CONFIG_X86_CPUFREQ_NFORCE2 is not set # CONFIG_X86_CPUID is not set # CONFIG_X86_DEBUG_FPU is not set # CONFIG_X86_EXTENDED_PLATFORM is not set -# CONFIG_X86_E_POWERSAVER is not set CONFIG_X86_F00F_BUG=y CONFIG_X86_FAST_FEATURE_TESTS=y CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_GENERIC=y # CONFIG_X86_GX_SUSPMOD is not set -# CONFIG_X86_INTEL_LPSS is not set # CONFIG_X86_INTEL_PSTATE is not set CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_INTERNODE_CACHE_SHIFT=6 @@ -559,7 +486,6 @@ CONFIG_X86_IO_APIC=y CONFIG_X86_L1_CACHE_SHIFT=6 # CONFIG_X86_LEGACY_VM86 is not set CONFIG_X86_LOCAL_APIC=y -# CONFIG_X86_LONGHAUL is not set # CONFIG_X86_LONGRUN is not set CONFIG_X86_MCE=y # CONFIG_X86_MCELOG_LEGACY is not set @@ -573,14 +499,11 @@ CONFIG_X86_MSR=y # CONFIG_X86_P4_CLOCKMOD is not set CONFIG_X86_PAE=y CONFIG_X86_PAT=y -# CONFIG_X86_PCC_CPUFREQ is not set CONFIG_X86_PLATFORM_DEVICES=y CONFIG_X86_PMEM_LEGACY=y CONFIG_X86_PMEM_LEGACY_DEVICE=y -CONFIG_X86_PM_TIMER=y # CONFIG_X86_POWERNOW_K6 is not set # CONFIG_X86_POWERNOW_K7 is not set -# CONFIG_X86_POWERNOW_K8 is not set CONFIG_X86_PPRO_FENCE=y # CONFIG_X86_PTDUMP is not set # CONFIG_X86_PTDUMP_CORE is not set @@ -595,8 +518,9 @@ CONFIG_X86_RESERVE_LOW=64 CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y CONFIG_X86_THERMAL_VECTOR=y CONFIG_X86_TSC=y +CONFIG_X86_UP_APIC=y +CONFIG_X86_UP_IOAPIC=y CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_XPS=y CONFIG_XZ_DEC_BCJ=y CONFIG_XZ_DEC_X86=y CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/x86/config-4.4 b/target/linux/x86/config-4.4 deleted file mode 100644 index 26bb124b8..000000000 --- a/target/linux/x86/config-4.4 +++ /dev/null @@ -1,459 +0,0 @@ -# CONFIG_60XX_WDT is not set -# CONFIG_64BIT is not set -# CONFIG_ACPI is not set -# CONFIG_ACQUIRE_WDT is not set -# CONFIG_ADVANTECH_WDT is not set -# CONFIG_ALIM1535_WDT is not set -# CONFIG_ALIX is not set -CONFIG_AMD_NB=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" -CONFIG_ARCH_DISCARD_MEMBLOCK=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FAST_MULTIPLIER=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_MMIO_FLUSH=y -CONFIG_ARCH_HAS_SG_CHAIN=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-ecx -fcall-saved-edx" -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -# CONFIG_ARCH_RANDOM is not set -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USES_PG_UNCACHED=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANTS_DYNAMIC_TASK_STRUCT=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_GENERAL_HUGETLB=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y -CONFIG_ATA=y -CONFIG_ATA_GENERIC=y -CONFIG_ATA_PIIX=y -CONFIG_BINFMT_MISC=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BOUNCE=y -CONFIG_CLKBLD_I8253=y -CONFIG_CLKEVT_I8253=y -CONFIG_CLKSRC_I8253=y -CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y -CONFIG_CLOCKSOURCE_WATCHDOG=y -CONFIG_CLONE_BACKWARDS=y -# CONFIG_COMPAT_VDSO is not set -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_CPU5_WDT is not set -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_GOV_COMMON=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_SUP_AMD=y -CONFIG_CPU_SUP_CENTAUR=y -CONFIG_CPU_SUP_CYRIX_32=y -CONFIG_CPU_SUP_INTEL=y -CONFIG_CPU_SUP_TRANSMETA_32=y -CONFIG_CPU_SUP_UMC_32=y -# CONFIG_CRASHLOG is not set -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_586=y -CONFIG_CRYPTO_CRC32C=y -# CONFIG_CRYPTO_CRC32_PCLMUL is not set -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -# CONFIG_CRYPTO_SERPENT_SSE2_586 is not set -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CX_ECAT is not set -CONFIG_DCACHE_WORD_ACCESS=y -# CONFIG_DCDBAS is not set -# CONFIG_DEBUG_BOOT_PARAMS is not set -# CONFIG_DEBUG_ENTRY is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_NMI_SELFTEST is not set -# CONFIG_DEBUG_TLBFLUSH is not set -# CONFIG_DEBUG_VIRTUAL is not set -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DEFAULT_IO_DELAY_TYPE=0 -# CONFIG_DELL_RBU is not set -CONFIG_DMI=y -CONFIG_DMIID=y -CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y -CONFIG_DMI_SYSFS=y -CONFIG_DNOTIFY=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EARLY_PRINTK=y -# CONFIG_EARLY_PRINTK_DBGP is not set -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -# CONFIG_EDD is not set -# CONFIG_EUROTECH_WDT is not set -CONFIG_EXT4_FS=y -# CONFIG_F2FS_CHECK_FS is not set -CONFIG_F2FS_FS=y -# CONFIG_F2FS_FS_SECURITY is not set -CONFIG_F2FS_FS_XATTR=y -CONFIG_F2FS_STAT_FS=y -# CONFIG_F71808E_WDT is not set -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_FIRMWARE_MEMMAP=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FS_MBCACHE=y -CONFIG_FUSION=y -# CONFIG_FUSION_CTL is not set -# CONFIG_FUSION_LOGGING is not set -CONFIG_FUSION_MAX_SGE=128 -CONFIG_FUSION_SPI=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_IO=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GEOS is not set -CONFIG_GLOB=y -# CONFIG_GOOGLE_FIRMWARE is not set -# CONFIG_HANGCHECK_TIMER is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_AOUT=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -# CONFIG_HAVE_ARCH_BITREVERSE is not set -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_KMEMCHECK=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y -CONFIG_HAVE_ATOMIC_IOMAP=y -# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set -CONFIG_HAVE_CC_STACKPROTECTOR=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_HW_BREAKPOINT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KPROBES_ON_FTRACE=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_MEMBLOCK=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y -CONFIG_HAVE_MMIOTRACE_SUPPORT=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_OPTPROBES=y -CONFIG_HAVE_PCSPKR_PLATFORM=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_EVENTS_NMI=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_UID16=y -CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y -CONFIG_HAVE_USER_RETURN_NOTIFIER=y -CONFIG_HIGHMEM=y -CONFIG_HIGHMEM4G=y -# CONFIG_HIGHPTE is not set -CONFIG_HPET_EMULATE_RTC=y -CONFIG_HPET_TIMER=y -# CONFIG_HP_WATCHDOG is not set -CONFIG_HT_IRQ=y -# CONFIG_HUGETLBFS is not set -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_GEODE=y -CONFIG_HW_RANDOM_VIA=y -# CONFIG_HYPERVISOR_GUEST is not set -CONFIG_HZ_PERIODIC=y -CONFIG_I8253_LOCK=y -# CONFIG_I8K is not set -# CONFIG_IB700_WDT is not set -# CONFIG_IBMASR is not set -# CONFIG_IBM_RTL is not set -# CONFIG_IE6XX_WDT is not set -CONFIG_ILLEGAL_POINTER_VALUE=0 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_INSTRUCTION_DECODER=y -# CONFIG_INTEL_PCH_THERMAL is not set -# CONFIG_INTEL_POWERCLAMP is not set -# CONFIG_INTEL_SOC_DTS_THERMAL is not set -# CONFIG_IOMMU_STRESS is not set -# CONFIG_IOSF_MBI is not set -CONFIG_IO_DELAY_0X80=y -# CONFIG_IO_DELAY_0XED is not set -# CONFIG_IO_DELAY_NONE is not set -CONFIG_IO_DELAY_TYPE_0X80=0 -CONFIG_IO_DELAY_TYPE_0XED=1 -CONFIG_IO_DELAY_TYPE_NONE=3 -CONFIG_IO_DELAY_TYPE_UDELAY=2 -# CONFIG_IO_DELAY_UDELAY is not set -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -# CONFIG_ISA is not set -CONFIG_ISA_DMA_API=y -# CONFIG_IT8712F_WDT is not set -# CONFIG_IT87_WDT is not set -# CONFIG_ITCO_WDT is not set -CONFIG_JBD2=y -CONFIG_KALLSYMS=y -CONFIG_KEXEC=y -CONFIG_KEXEC_CORE=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_LEDS_CLEVO_MAIL is not set -CONFIG_M486=y -# CONFIG_M586 is not set -# CONFIG_M586MMX is not set -# CONFIG_M586TSC is not set -# CONFIG_M686 is not set -# CONFIG_MACHZ_WDT is not set -# CONFIG_MATOM is not set -# CONFIG_MCORE2 is not set -# CONFIG_MCRUSOE is not set -# CONFIG_MCYRIXIII is not set -# CONFIG_MEFFICEON is not set -# CONFIG_MELAN is not set -# CONFIG_MFD_INTEL_LPSS_PCI is not set -# CONFIG_MGEODEGX1 is not set -# CONFIG_MGEODE_LX is not set -# CONFIG_MICROCODE is not set -# CONFIG_MK6 is not set -# CONFIG_MK7 is not set -# CONFIG_MK8 is not set -# CONFIG_MODIFY_LDT_SYSCALL is not set -CONFIG_MODULES_TREE_LOOKUP=y -CONFIG_MODULES_USE_ELF_REL=y -# CONFIG_MPENTIUM4 is not set -# CONFIG_MPENTIUMII is not set -# CONFIG_MPENTIUMIII is not set -# CONFIG_MPENTIUMM is not set -# CONFIG_MTD is not set -CONFIG_MTRR=y -# CONFIG_MTRR_SANITIZER is not set -# CONFIG_MVIAC3_2 is not set -# CONFIG_MVIAC7 is not set -# CONFIG_MWINCHIP3D is not set -# CONFIG_MWINCHIPC6 is not set -CONFIG_NAMESPACES=y -CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y -CONFIG_NEED_SG_DMA_LENGTH=y -# CONFIG_NET5501 is not set -# CONFIG_NET_NS is not set -CONFIG_NLS=y -# CONFIG_NOHIGHMEM is not set -CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=1 -# CONFIG_NSC_GPIO is not set -CONFIG_NVRAM=y -# CONFIG_OF is not set -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -# CONFIG_OLPC is not set -CONFIG_OPROFILE_NMI_TIMER=y -# CONFIG_OPTIMIZE_INLINING is not set -CONFIG_OUTPUT_FORMAT="elf32-i386" -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PC8736x_GPIO is not set -# CONFIG_PC87413_WDT is not set -CONFIG_PCI=y -CONFIG_PCI_BIOS=y -CONFIG_PCI_DIRECT=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_GOANY=y -# CONFIG_PCI_GOBIOS is not set -# CONFIG_PCI_GODIRECT is not set -# CONFIG_PCI_GOMMCONFIG is not set -CONFIG_PCI_LABEL=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCSPKR_PLATFORM=y -CONFIG_PERF_EVENTS=y -CONFIG_PERF_EVENTS_INTEL_UNCORE=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYSICAL_ALIGN=0x100000 -CONFIG_PHYSICAL_START=0x1000000 -CONFIG_PMC_ATOM=y -CONFIG_POWER_SUPPLY=y -# CONFIG_PROCESSOR_SELECT is not set -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -# CONFIG_PUNIT_ATOM_DEBUG is not set -CONFIG_RATIONAL=y -# CONFIG_RCU_STALL_COMMON is not set -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -# CONFIG_RELOCATABLE is not set -CONFIG_RTC_CLASS=y -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SBC7240_WDT is not set -# CONFIG_SBC8360_WDT is not set -# CONFIG_SBC_EPX_C3_WATCHDOG is not set -# CONFIG_SC1200_WDT is not set -CONFIG_SCHED_HRTICK=y -# CONFIG_SCHED_INFO is not set -CONFIG_SCSI=y -CONFIG_SCSI_SPI_ATTRS=y -CONFIG_SCx200=y -CONFIG_SCx200HR_TIMER=y -# CONFIG_SCx200_GPIO is not set -# CONFIG_SCx200_WDT is not set -# CONFIG_SERIAL_8250_FSL is not set -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIO=y -# CONFIG_SERIO_CT82C710 is not set -CONFIG_SERIO_I8042=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SMSC37B787_WDT is not set -# CONFIG_SMSC_SCH311X_WDT is not set -CONFIG_SPARSEMEM_STATIC=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_STRICT_DEVMEM=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -# CONFIG_TELCLOCK is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_TICK_CPU_ACCOUNTING=y -# CONFIG_TOSHIBA is not set -CONFIG_UP_LATE_INIT=y -CONFIG_USB_SUPPORT=y -# CONFIG_USERIO is not set -# CONFIG_USER_NS is not set -CONFIG_USER_STACKTRACE_SUPPORT=y -# CONFIG_VGACON_SOFT_SCROLLBACK is not set -CONFIG_VGA_CONSOLE=y -# CONFIG_VIA_WDT is not set -# CONFIG_VM86 is not set -# CONFIG_VMWARE_VMCI is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_WAFER_WDT is not set -CONFIG_X86=y -CONFIG_X86_32=y -# CONFIG_X86_32_IRIS is not set -CONFIG_X86_32_LAZY_GS=y -CONFIG_X86_ALIGNMENT_16=y -# CONFIG_X86_ANCIENT_MCE is not set -# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set -# CONFIG_X86_CPUFREQ_NFORCE2 is not set -# CONFIG_X86_CPUID is not set -# CONFIG_X86_DEBUG_FPU is not set -# CONFIG_X86_EXTENDED_PLATFORM is not set -CONFIG_X86_F00F_BUG=y -CONFIG_X86_FEATURE_NAMES=y -CONFIG_X86_GENERIC=y -# CONFIG_X86_GX_SUSPMOD is not set -# CONFIG_X86_INTEL_MPX is not set -# CONFIG_X86_INTEL_PSTATE is not set -CONFIG_X86_INTEL_USERCOPY=y -CONFIG_X86_INTERNODE_CACHE_SHIFT=6 -CONFIG_X86_INVD_BUG=y -CONFIG_X86_IO_APIC=y -CONFIG_X86_L1_CACHE_SHIFT=6 -# CONFIG_X86_LEGACY_VM86 is not set -CONFIG_X86_LOCAL_APIC=y -# CONFIG_X86_LONGRUN is not set -CONFIG_X86_MCE=y -CONFIG_X86_MCE_AMD=y -# CONFIG_X86_MCE_INJECT is not set -CONFIG_X86_MCE_INTEL=y -CONFIG_X86_MCE_THRESHOLD=y -CONFIG_X86_MINIMUM_CPU_FAMILY=4 -CONFIG_X86_MPPARSE=y -CONFIG_X86_MSR=y -# CONFIG_X86_P4_CLOCKMOD is not set -CONFIG_X86_PAT=y -CONFIG_X86_PLATFORM_DEVICES=y -# CONFIG_X86_POWERNOW_K6 is not set -# CONFIG_X86_POWERNOW_K7 is not set -CONFIG_X86_PPRO_FENCE=y -# CONFIG_X86_PTDUMP is not set -# CONFIG_X86_PTDUMP_CORE is not set -# CONFIG_X86_REBOOTFIXUPS is not set -CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y -CONFIG_X86_RESERVE_LOW=64 -# CONFIG_X86_SMAP is not set -# CONFIG_X86_SPEEDSTEP_CENTRINO is not set -# CONFIG_X86_SPEEDSTEP_ICH is not set -# CONFIG_X86_SPEEDSTEP_LIB is not set -# CONFIG_X86_SPEEDSTEP_SMI is not set -CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y -CONFIG_X86_THERMAL_VECTOR=y -CONFIG_X86_UP_APIC=y -CONFIG_X86_UP_IOAPIC=y -CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_X86=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/x86/config-4.9 b/target/linux/x86/config-4.9 index 723b58093..af4c5e9e3 100644 --- a/target/linux/x86/config-4.9 +++ b/target/linux/x86/config-4.9 @@ -1,30 +1,6 @@ # CONFIG_60XX_WDT is not set # CONFIG_64BIT is not set -CONFIG_ACPI=y -CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y -# CONFIG_ACPI_CMPC is not set -# CONFIG_ACPI_CONTAINER is not set -CONFIG_ACPI_CPU_FREQ_PSS=y -# CONFIG_ACPI_CUSTOM_DSDT is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DEBUGGER is not set -# CONFIG_ACPI_DOCK is not set -# CONFIG_ACPI_EC_DEBUGFS is not set -CONFIG_ACPI_FAN=y -CONFIG_ACPI_HOTPLUG_IOAPIC=y -CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set -CONFIG_ACPI_PROCESSOR_CSTATE=y -CONFIG_ACPI_PROCESSOR_IDLE=y -# CONFIG_ACPI_PROCFS_POWER is not set -CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y -CONFIG_ACPI_THERMAL=y -# CONFIG_ACPI_WMI is not set +# CONFIG_ACPI is not set # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set # CONFIG_ALIM1535_WDT is not set @@ -36,7 +12,6 @@ CONFIG_ARCH_DISCARD_MEMBLOCK=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y -CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y CONFIG_ARCH_HAS_CPU_RELAX=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y @@ -47,7 +22,6 @@ CONFIG_ARCH_HAS_SG_CHAIN=y CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y CONFIG_ARCH_PHYS_ADDR_T_64BIT=y @@ -72,7 +46,6 @@ CONFIG_ARCH_WANT_GENERAL_HUGETLB=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_ATA=y -CONFIG_ATA_ACPI=y CONFIG_ATA_GENERIC=y CONFIG_ATA_PIIX=y CONFIG_BINFMT_MISC=y @@ -106,7 +79,6 @@ CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_FREQ_STAT_DETAILS=y CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_RMAP=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_CYRIX_32=y @@ -115,17 +87,12 @@ CONFIG_CPU_SUP_TRANSMETA_32=y CONFIG_CPU_SUP_UMC_32=y # CONFIG_CRASHLOG is not set CONFIG_CRC16=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y CONFIG_CRYPTO_AES_586=y CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32_PCLMUL is not set CONFIG_CRYPTO_HASH=y CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG2=y # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set CONFIG_CRYPTO_WORKQUEUE=y @@ -148,7 +115,6 @@ CONFIG_DMIID=y CONFIG_DMI_SCAN_MACHINE_NON_EFI_FALLBACK=y CONFIG_DMI_SYSFS=y CONFIG_DNOTIFY=y -# CONFIG_DPTF_POWER is not set CONFIG_DUMMY_CONSOLE=y CONFIG_EARLY_PRINTK=y # CONFIG_EARLY_PRINTK_DBGP is not set @@ -157,6 +123,11 @@ CONFIG_EDAC_SUPPORT=y # CONFIG_EDD is not set # CONFIG_EUROTECH_WDT is not set CONFIG_EXT4_FS=y +# CONFIG_F2FS_CHECK_FS is not set +CONFIG_F2FS_FS=y +# CONFIG_F2FS_FS_SECURITY is not set +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_STAT_FS=y # CONFIG_F71808E_WDT is not set CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_FIRMWARE_MEMMAP=y @@ -184,8 +155,6 @@ CONFIG_GENERIC_ISA_DMA=y CONFIG_GENERIC_MSI_IRQ=y CONFIG_GENERIC_MSI_IRQ_DOMAIN=y CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PENDING_IRQ=y -CONFIG_GENERIC_PHY=y CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_STRNCPY_FROM_USER=y CONFIG_GENERIC_STRNLEN_USER=y @@ -198,8 +167,6 @@ CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y # CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set -CONFIG_HAVE_ACPI_APEI=y -CONFIG_HAVE_ACPI_APEI_NMI=y CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y CONFIG_HAVE_AOUT=y CONFIG_HAVE_ARCH_AUDITSYSCALL=y @@ -258,15 +225,11 @@ CONFIG_HIGHMEM=y # CONFIG_HIGHMEM4G is not set CONFIG_HIGHMEM64G=y # CONFIG_HIGHPTE is not set -# CONFIG_HPET is not set CONFIG_HPET_EMULATE_RTC=y CONFIG_HPET_TIMER=y -# CONFIG_HP_ACCEL is not set # CONFIG_HP_WATCHDOG is not set CONFIG_HT_IRQ=y # CONFIG_HUGETLBFS is not set -CONFIG_HWMON=y -CONFIG_HWMON_VID=y CONFIG_HW_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_GEODE=y @@ -284,10 +247,7 @@ CONFIG_INITRAMFS_SOURCE="" CONFIG_INPUT=y CONFIG_INPUT_KEYBOARD=y CONFIG_INSTRUCTION_DECODER=y -# CONFIG_INTEL_IPS is not set -# CONFIG_INTEL_MENLOW is not set # CONFIG_INTEL_PCH_THERMAL is not set -# CONFIG_INTEL_PMC_IPC is not set # CONFIG_INTEL_POWERCLAMP is not set # CONFIG_INTEL_SOC_DTS_THERMAL is not set CONFIG_IOMMU_HELPER=y @@ -307,7 +267,6 @@ CONFIG_IRQ_FORCED_THREADING=y CONFIG_IRQ_WORK=y # CONFIG_ISA is not set CONFIG_ISA_DMA_API=y -# CONFIG_ISCSI_IBFT_FIND is not set # CONFIG_IT8712F_WDT is not set # CONFIG_IT87_WDT is not set # CONFIG_ITCO_WDT is not set @@ -318,7 +277,6 @@ CONFIG_KEXEC_CORE=y CONFIG_KEYBOARD_ATKBD=y # CONFIG_LEDS_CLEVO_MAIL is not set CONFIG_LIBNVDIMM=y -CONFIG_LOCK_SPIN_ON_OWNER=y # CONFIG_M486 is not set # CONFIG_M586 is not set CONFIG_M586MMX=y @@ -331,22 +289,16 @@ CONFIG_M586MMX=y # CONFIG_MCYRIXIII is not set # CONFIG_MEFFICEON is not set # CONFIG_MELAN is not set -# CONFIG_MFD_INTEL_LPSS_ACPI is not set # CONFIG_MFD_INTEL_LPSS_PCI is not set # CONFIG_MGEODEGX1 is not set # CONFIG_MGEODE_LX is not set -# CONFIG_MICROCODE is not set +CONFIG_MICROCODE=y +CONFIG_MICROCODE_AMD=y +CONFIG_MICROCODE_INTEL=y +CONFIG_MICROCODE_OLD_INTERFACE=y # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MK8 is not set -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_SDHCI_PCI is not set -# CONFIG_MMC_SDHCI_PLTFM is not set -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MMC_USHC=y -# CONFIG_MMC_WBSD is not set # CONFIG_MODIFY_LDT_SYSCALL is not set CONFIG_MODULES_TREE_LOOKUP=y CONFIG_MODULES_USE_ELF_REL=y @@ -357,7 +309,6 @@ CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MTD is not set CONFIG_MTRR=y # CONFIG_MTRR_SANITIZER is not set -CONFIG_MUTEX_SPIN_ON_OWNER=y # CONFIG_MVIAC3_2 is not set # CONFIG_MVIAC7 is not set # CONFIG_MWINCHIP3D is not set @@ -368,15 +319,15 @@ CONFIG_ND_BTT=y CONFIG_ND_CLAIM=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y +CONFIG_NEED_PER_CPU_KM=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_NEED_SG_DMA_LENGTH=y # CONFIG_NET5501 is not set -CONFIG_NET_FLOW_LIMIT=y # CONFIG_NET_NS is not set CONFIG_NLS=y # CONFIG_NOHIGHMEM is not set CONFIG_NO_BOOTMEM=y -CONFIG_NR_CPUS=8 +CONFIG_NR_CPUS=1 # CONFIG_NSC_GPIO is not set CONFIG_NVME_CORE=y CONFIG_NVRAM=y @@ -386,13 +337,7 @@ CONFIG_OLD_SIGSUSPEND3=y CONFIG_OPROFILE_NMI_TIMER=y # CONFIG_OPTIMIZE_INLINING is not set CONFIG_OUTPUT_FORMAT="elf32-i386" -CONFIG_PADATA=y CONFIG_PAGE_OFFSET=0xC0000000 -CONFIG_PATA_ACPI=y -CONFIG_PATA_ALI=y -CONFIG_PATA_AMD=y -CONFIG_PATA_MPIIX=y -CONFIG_PATA_SCH=y # CONFIG_PC8736x_GPIO is not set # CONFIG_PC87413_WDT is not set CONFIG_PCI=y @@ -405,7 +350,6 @@ CONFIG_PCI_GOANY=y # CONFIG_PCI_GODIRECT is not set # CONFIG_PCI_GOMMCONFIG is not set CONFIG_PCI_LABEL=y -CONFIG_PCI_MMCONFIG=y CONFIG_PCI_MSI=y CONFIG_PCI_MSI_IRQ_DOMAIN=y CONFIG_PCSPKR_PLATFORM=y @@ -418,34 +362,18 @@ CONFIG_PHYSICAL_ALIGN=0x100000 CONFIG_PHYSICAL_START=0x1000000 CONFIG_PHYS_ADDR_T_64BIT=y CONFIG_PMC_ATOM=y -# CONFIG_PMIC_OPREGION is not set -CONFIG_PNP=y -CONFIG_PNPACPI=y -CONFIG_PNP_DEBUG_MESSAGES=y CONFIG_POWER_SUPPLY=y # CONFIG_PROCESSOR_SELECT is not set CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set # CONFIG_PUNIT_ATOM_DEBUG is not set -# CONFIG_PVPANIC is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_RCU_STALL_COMMON=y +# CONFIG_RCU_STALL_COMMON is not set CONFIG_RD_BZIP2=y CONFIG_RD_GZIP=y -# CONFIG_RETPOLINE is not set -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y +CONFIG_RETPOLINE=y CONFIG_RTC_CLASS=y CONFIG_RTC_MC146818_LIB=y -CONFIG_RWSEM_SPIN_ON_OWNER=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SAMSUNG_Q10 is not set -CONFIG_SATA_AHCI=y -CONFIG_SATA_AHCI_PLATFORM=y -CONFIG_SATA_MV=y -CONFIG_SATA_NV=y -CONFIG_SATA_VIA=y # CONFIG_SBC7240_WDT is not set # CONFIG_SBC8360_WDT is not set # CONFIG_SBC_EPX_C3_WATCHDOG is not set @@ -457,30 +385,20 @@ CONFIG_SCx200=y CONFIG_SCx200HR_TIMER=y # CONFIG_SCx200_GPIO is not set # CONFIG_SCx200_WDT is not set -CONFIG_SENSORS_CORETEMP=y -CONFIG_SENSORS_FAM15H_POWER=y -CONFIG_SENSORS_I5500=y -CONFIG_SENSORS_K10TEMP=y -CONFIG_SENSORS_K8TEMP=y -CONFIG_SENSORS_VIA_CPUTEMP=y # CONFIG_SERIAL_8250_FSL is not set CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_PNP=y CONFIG_SERIO=y # CONFIG_SERIO_CT82C710 is not set CONFIG_SERIO_I8042=y CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_SERPORT=y CONFIG_SG_POOL=y -# CONFIG_SHORTCUT_FE is not set -CONFIG_SMP=y # CONFIG_SMSC37B787_WDT is not set # CONFIG_SMSC_SCH311X_WDT is not set CONFIG_SPARSEMEM_STATIC=y CONFIG_SPARSE_IRQ=y CONFIG_SRCU=y CONFIG_STRICT_DEVMEM=y -# CONFIG_SURFACE_PRO3_BUTTON is not set CONFIG_SWIOTLB=y CONFIG_SYSCTL_EXCEPTION_TRACE=y # CONFIG_TELCLOCK is not set @@ -490,8 +408,7 @@ CONFIG_THERMAL_GOV_STEP_WISE=y CONFIG_THREAD_INFO_IN_TASK=y CONFIG_TICK_CPU_ACCOUNTING=y # CONFIG_TOSHIBA is not set -# CONFIG_TOSHIBA_BT_RFKILL is not set -CONFIG_TREE_RCU=y +CONFIG_UP_LATE_INIT=y CONFIG_USB=y CONFIG_USB_COMMON=y CONFIG_USB_EHCI_HCD=y @@ -501,7 +418,6 @@ CONFIG_USB_HID=y CONFIG_USB_HIDDEV=y CONFIG_USB_OHCI_HCD=y # CONFIG_USB_OHCI_HCD_PLATFORM is not set -CONFIG_USB_STORAGE=y CONFIG_USB_SUPPORT=y CONFIG_USB_UHCI_HCD=y # CONFIG_USERIO is not set @@ -521,27 +437,19 @@ CONFIG_X86=y CONFIG_X86_32=y # CONFIG_X86_32_IRIS is not set CONFIG_X86_32_LAZY_GS=y -CONFIG_X86_32_SMP=y -CONFIG_X86_ACPI_CPUFREQ=y -CONFIG_X86_ACPI_CPUFREQ_CPB=y CONFIG_X86_ALIGNMENT_16=y -# CONFIG_X86_AMD_FREQ_SENSITIVITY is not set -# CONFIG_X86_AMD_PLATFORM_DEVICE is not set # CONFIG_X86_ANCIENT_MCE is not set -# CONFIG_X86_BIGSMP is not set # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set CONFIG_X86_CMPXCHG64=y # CONFIG_X86_CPUFREQ_NFORCE2 is not set # CONFIG_X86_CPUID is not set # CONFIG_X86_DEBUG_FPU is not set # CONFIG_X86_EXTENDED_PLATFORM is not set -# CONFIG_X86_E_POWERSAVER is not set CONFIG_X86_F00F_BUG=y CONFIG_X86_FAST_FEATURE_TESTS=y CONFIG_X86_FEATURE_NAMES=y CONFIG_X86_GENERIC=y # CONFIG_X86_GX_SUSPMOD is not set -# CONFIG_X86_INTEL_LPSS is not set # CONFIG_X86_INTEL_MPX is not set # CONFIG_X86_INTEL_PSTATE is not set CONFIG_X86_INTEL_USERCOPY=y @@ -550,7 +458,6 @@ CONFIG_X86_IO_APIC=y CONFIG_X86_L1_CACHE_SHIFT=6 # CONFIG_X86_LEGACY_VM86 is not set CONFIG_X86_LOCAL_APIC=y -# CONFIG_X86_LONGHAUL is not set # CONFIG_X86_LONGRUN is not set CONFIG_X86_MCE=y CONFIG_X86_MCE_AMD=y @@ -563,14 +470,11 @@ CONFIG_X86_MSR=y # CONFIG_X86_P4_CLOCKMOD is not set CONFIG_X86_PAE=y CONFIG_X86_PAT=y -# CONFIG_X86_PCC_CPUFREQ is not set CONFIG_X86_PLATFORM_DEVICES=y CONFIG_X86_PMEM_LEGACY=y CONFIG_X86_PMEM_LEGACY_DEVICE=y -CONFIG_X86_PM_TIMER=y # CONFIG_X86_POWERNOW_K6 is not set # CONFIG_X86_POWERNOW_K7 is not set -# CONFIG_X86_POWERNOW_K8 is not set CONFIG_X86_PPRO_FENCE=y # CONFIG_X86_PTDUMP is not set # CONFIG_X86_PTDUMP_CORE is not set @@ -585,8 +489,9 @@ CONFIG_X86_RESERVE_LOW=64 CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y CONFIG_X86_THERMAL_VECTOR=y CONFIG_X86_TSC=y +CONFIG_X86_UP_APIC=y +CONFIG_X86_UP_IOAPIC=y CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_XPS=y CONFIG_XZ_DEC_BCJ=y CONFIG_XZ_DEC_X86=y CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/x86/geode/config-default b/target/linux/x86/geode/config-default index d1c8f5a97..b564b940e 100644 --- a/target/linux/x86/geode/config-default +++ b/target/linux/x86/geode/config-default @@ -1,3 +1,4 @@ +# CONFIG_104_QUAD_8 is not set # CONFIG_3C515 is not set CONFIG_8139CP=y CONFIG_8139TOO=y @@ -7,7 +8,7 @@ CONFIG_8139TOO_PIO=y # CONFIG_8139_OLD_RX_RESET is not set CONFIG_ACPI=y CONFIG_ACPI_AC=y -CONFIG_ACPI_BATTERY=y +# CONFIG_ACPI_BATTERY is not set # CONFIG_ACPI_CMPC is not set # CONFIG_ACPI_CONTAINER is not set CONFIG_ACPI_CPU_FREQ_PSS=y @@ -19,11 +20,11 @@ CONFIG_ACPI_CPU_FREQ_PSS=y CONFIG_ACPI_FAN=y CONFIG_ACPI_HOTPLUG_IOAPIC=y CONFIG_ACPI_I2C_OPREGION=y -# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y # CONFIG_ACPI_PCI_SLOT is not set CONFIG_ACPI_PROCESSOR=y # CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set +CONFIG_ACPI_PROCESSOR_CSTATE=y CONFIG_ACPI_PROCESSOR_IDLE=y # CONFIG_ACPI_PROCFS_POWER is not set CONFIG_ACPI_REV_OVERRIDE_POSSIBLE=y @@ -32,29 +33,29 @@ CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_WMI is not set CONFIG_ALIX=y +CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y # CONFIG_ATA_PIIX is not set CONFIG_CS5535_CLOCK_EVENT_SRC=y CONFIG_CS5535_MFGPT=y CONFIG_CS5535_MFGPT_DEFAULT_IRQ=7 -# CONFIG_EFI is not set +# CONFIG_DPTF_POWER is not set +# CONFIG_EBC_C384_WDT is not set +# CONFIG_EFI_DEV_PATH_PARSER is not set # CONFIG_EISA is not set # CONFIG_EL3 is not set CONFIG_GEODE_WDT=y CONFIG_GEOS=y CONFIG_GPIOLIB=y +# CONFIG_GPIO_104_DIO_48E is not set # CONFIG_GPIO_104_IDIO_16 is not set +# CONFIG_GPIO_104_IDI_48 is not set CONFIG_GPIO_ACPI=y -# CONFIG_GPIO_AMDPT is not set CONFIG_GPIO_CS5535=y -CONFIG_GPIO_DEVRES=y -# CONFIG_GPIO_F7188X is not set -# CONFIG_GPIO_INTEL_MID is not set -# CONFIG_GPIO_IT87 is not set -# CONFIG_GPIO_LYNXPOINT is not set CONFIG_GPIO_SYSFS=y CONFIG_HAVE_ACPI_APEI=y CONFIG_HAVE_ACPI_APEI_NMI=y +CONFIG_HIGHMEM4G=y # CONFIG_HIGHMEM64G is not set # CONFIG_HPET is not set # CONFIG_HP_ACCEL is not set @@ -64,15 +65,18 @@ CONFIG_I2C_ALGOBIT=y CONFIG_I2C_ALGOPCA=y CONFIG_I2C_ALGOPCF=y CONFIG_I2C_BOARDINFO=y +# CONFIG_INTEL_INT0002_VGPIO is not set # CONFIG_INTEL_IPS is not set # CONFIG_INTEL_MENLOW is not set # CONFIG_INTEL_PMC_IPC is not set +# CONFIG_INTEL_SOC_PMIC_CHTWC is not set CONFIG_ISA=y # CONFIG_ISAPNP is not set +CONFIG_ISA_BUS_API=y # CONFIG_ISCSI_IBFT_FIND is not set # CONFIG_LANCE is not set CONFIG_LEDS_GPIO=y -# CONFIG_M486 is not set +# CONFIG_M586MMX is not set # CONFIG_MDA_CONSOLE is not set CONFIG_MFD_CORE=y CONFIG_MFD_CS5535=y @@ -82,6 +86,7 @@ CONFIG_MGEODEGX1=y CONFIG_NATSEMI=y CONFIG_NET5501=y CONFIG_NSC_GPIO=y +# CONFIG_OLPC is not set CONFIG_PATA_CS5520=y CONFIG_PATA_CS5530=y CONFIG_PATA_CS5535=y @@ -90,12 +95,17 @@ CONFIG_PATA_SC1200=y CONFIG_PC8736x_GPIO=y CONFIG_PCI_MMCONFIG=y # CONFIG_PCWATCHDOG is not set +CONFIG_PGTABLE_LEVELS=2 +# CONFIG_PHYS_ADDR_T_64BIT is not set # CONFIG_PMIC_OPREGION is not set CONFIG_PNP=y CONFIG_PNPACPI=y # CONFIG_PNPBIOS is not set CONFIG_PNP_DEBUG_MESSAGES=y # CONFIG_PVPANIC is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_RTC_I2C_AND_SPI=y # CONFIG_SAMSUNG_Q10 is not set CONFIG_SC1200_WDT=y CONFIG_SCx200_ACB=y @@ -104,16 +114,10 @@ CONFIG_SENSORS_LM90=y CONFIG_SERIAL_8250_PNP=y # CONFIG_SURFACE_PRO3_BUTTON is not set # CONFIG_TOSHIBA_BT_RFKILL is not set -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -CONFIG_USB_EHCI_PCI=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PCI=y -# CONFIG_USB_OHCI_HCD_PLATFORM is not set # CONFIG_USB_UHCI_HCD is not set +CONFIG_USB_OHCI_HCD_PCI=y CONFIG_VGACON_SOFT_SCROLLBACK=y +# CONFIG_VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT is not set CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 CONFIG_VIA_RHINE=y CONFIG_VIA_RHINE_MMIO=y @@ -126,8 +130,7 @@ CONFIG_X86_DEBUGCTLMSR=y # CONFIG_X86_INTEL_LPSS is not set # CONFIG_X86_LONGHAUL is not set # CONFIG_X86_MCE is not set +CONFIG_X86_MINIMUM_CPU_FAMILY=4 # CONFIG_X86_PCC_CPUFREQ is not set CONFIG_X86_PM_TIMER=y -# CONFIG_X86_PPRO_FENCE is not set CONFIG_X86_REBOOTFIXUPS=y -CONFIG_X86_TSC=y diff --git a/target/linux/x86/image/Makefile b/target/linux/x86/image/Makefile index 830bca6e4..8a3cb327e 100644 --- a/target/linux/x86/image/Makefile +++ b/target/linux/x86/image/Makefile @@ -10,9 +10,6 @@ include $(INCLUDE_DIR)/image.mk export PATH=$(TARGET_PATH):/sbin GRUB2_MODULES = biosdisk boot chain configfile ext2 linux ls part_msdos reboot serial vga -GRUB2_MODULES_LEGACY = $(GRUB2_MODULES) -GRUB2_MODULES_LEGACY += part_gpt search fat exfat -GRUB2_MODULES_EFI = boot chain configfile ext2 linux ls part_msdos reboot serial part_gpt part_msdos search fat exfat ext2 efi_gop efi_uga gfxterm GRUB2_MODULES_ISO = biosdisk boot chain configfile iso9660 linux ls part_msdos reboot serial vga GRUB_TERMINALS = GRUB_SERIAL_CONFIG = @@ -45,8 +42,6 @@ ifneq ($(GRUB_TERMINALS),) endif SIGNATURE:=$(shell perl -e 'printf("%08x", rand(0xFFFFFFFF))') -EFI_SIGNATURE:=$(shell perl -e 'printf("%08x-%04x-%04x-%04x-%06x%06x", rand(0xFFFFFFFF), rand(0xFFFF), rand(0xFFFF), rand(0xFFFF), rand(0xFFFFFF), rand(0xFFFFFF))') - ROOTPART:=$(call qstrip,$(CONFIG_TARGET_ROOTFS_PARTNAME)) ROOTPART:=$(if $(ROOTPART),$(ROOTPART),PARTUUID=$(SIGNATURE)-02) @@ -56,7 +51,7 @@ ifneq ($(CONFIG_TARGET_x86_xen_domu),) GRUB_ROOT = xen/xvda,msdos1 endif -ifneq ($(CONFIG_GRUB_IMAGES)$(CONFIG_EFI_IMAGES),) +ifneq ($(CONFIG_GRUB_IMAGES),) BOOTOPTS:=$(call qstrip,$(CONFIG_GRUB_BOOTOPTS)) @@ -68,90 +63,6 @@ ifneq ($(CONFIG_GRUB_IMAGES)$(CONFIG_EFI_IMAGES),) root=$(ROOTPART) rootfstype=squashfs rootwait endef - ifneq ($(CONFIG_EFI_IMAGES),) - - define Image/cmdline/efi - $(subst $(SIGNATURE)-02,$2,$(call Image/cmdline/$(1))) - endef - - define Image/Build/efi - # left here because the image builder doesnt need these - rm -rf $(KDIR)/root.grub/ || true - $(INSTALL_DIR) $(KDIR)/root.grub/boot/grub $(KDIR)/grub2 - $(CP) $(KDIR)/bzImage $(KDIR)/root.grub/boot/vmlinuz - echo '(hd0) $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img' > $(KDIR)/grub2/device.map - sed \ - -e 's#@SERIAL_CONFIG@#$(strip $(GRUB_SERIAL_CONFIG))#g' \ - -e 's#@TERMINAL_CONFIG@#$(strip $(GRUB_TERMINAL_CONFIG))#g' \ - -e 's#@CMDLINE@#$(strip $(call Image/cmdline/efi,$(1),$(EFI_SIGNATURE)) $(BOOTOPTS) $(GRUB_CONSOLE_CMDLINE))#g' \ - -e 's#@TIMEOUT@#$(GRUB_TIMEOUT)#g' \ - -e 's#set root.*#search --file /boot/grub/$(SIGNATURE).cfg --set=root#g' \ - ./grub.cfg > $(KDIR)/root.grub/boot/grub/grub.cfg - $(CP) $(KDIR)/root.grub/boot/grub/grub.cfg $(KDIR)/root.grub/boot/grub/$(SIGNATURE).cfg - grub-mkimage \ - -d $(STAGING_DIR_HOST)/lib/grub/i386-pc \ - -o $(KDIR)/grub2/core.img \ - -O i386-pc \ - -p '(hd0,gpt1)/boot/grub' \ - -c $(KDIR)/root.grub/boot/grub/grub.cfg \ - $(GRUB2_MODULES_LEGACY) - $(CP) $(STAGING_DIR_HOST)/lib/grub/i386-pc/*.img $(KDIR)/grub2/ - - # Build the efi grub version - rm -rf $(KDIR)/grub2.efi/ || true - $(INSTALL_DIR) $(KDIR)/grub2.efi/efi/boot/ - - # Generate the grub search root config (grub will search for the $(SIGNATURE).cfg file placed on the boot partition as grub does not support search of GPT UUID yet) - echo "search --file /boot/grub/$(SIGNATURE).cfg --set=root" > $(KDIR)/grub2.efi/efi/boot/grub.cfg - echo "configfile /boot/grub/grub.cfg" >> $(KDIR)/grub2.efi/efi/boot/grub.cfg - - # Create the EFI grub binary - grub-mkimage-efi \ - -d $(STAGING_DIR_HOST)/lib/grub/x86_64-efi \ - -o $(KDIR)/grub2.efi/efi/boot/bootx64.efi \ - -O x86_64-efi \ - -p /efi/boot \ - -c $(KDIR)/grub2.efi/efi/boot/grub.cfg \ - $(GRUB2_MODULES_EFI) - - # Generate the EFI VFAT bootfs - rm $(KDIR)/kernel.efi || true - mkfs.fat -C $(KDIR)/kernel.efi -S 512 1024 - mcopy -s -i "$(KDIR)/kernel.efi" $(KDIR)/grub2.efi/* ::/ - - SIGNATURE="$(SIGNATURE)" PATH="$(TARGET_PATH)" ./gen_image_efi.sh \ - $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img \ - $(CONFIG_TARGET_KERNEL_PARTSIZE) $(KDIR)/root.grub \ - 1 $(KDIR)/kernel.efi \ - 1 \ - $(CONFIG_TARGET_ROOTFS_PARTSIZE) $(KDIR)/root.$(1) \ - 256 - - # Setup legacy bios for hybrid MBR (optional) - grub-bios-setup \ - --device-map="$(KDIR)/grub2/device.map" \ - -d "$(KDIR)/grub2" \ - -r "hd0,msdos1" \ - "$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" - - # Convert the MBR partition to GPT and set EFI ROOTFS signature - dd if=/dev/zero of="$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" bs=512 count=33 conv=notrunc oflag=append - sgdisk -g "$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" - sgdisk -t 2:EF00 "$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" - sgdisk -t 3:EF02 "$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" - sgdisk -u 4:$(EFI_SIGNATURE) "$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" - sgdisk -h "$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" - - # Setup EFI grub - grub-bios-setup-efi \ - --device-map="$(KDIR)/grub2/device.map" \ - -d "$(KDIR)/grub2" \ - -r "hd0,gpt1" \ - "$(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img" - endef - endif - - ifneq ($(CONFIG_GRUB_IMAGES),) define Image/Build/grub2 # left here because the image builder doesnt need these $(INSTALL_DIR) $(KDIR)/root.grub/boot/grub $(KDIR)/grub2 @@ -183,8 +94,6 @@ ifneq ($(CONFIG_GRUB_IMAGES)$(CONFIG_EFI_IMAGES),) -r "hd0,msdos1" \ "$(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).img" endef - endif - endif define Image/Build/squashfs @@ -224,14 +133,6 @@ ifneq ($(CONFIG_VDI_IMAGES),) # XXX: VBoxManage insists on setting perms to 0600 chmod 0644 $(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).vdi endef - define Image/Build/vdi_efi - rm $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).vdi || true - qemu-img convert -f raw -O vdi \ - $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img \ - $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).vdi - # XXX: VBoxManage insists on setting perms to 0600 - chmod 0644 $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).vdi - endef endif ifneq ($(CONFIG_VMDK_IMAGES),) @@ -241,37 +142,11 @@ ifneq ($(CONFIG_VMDK_IMAGES),) $(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).img \ $(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).vmdk endef - define Image/Build/vmdk_efi - rm $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).vmdk || true - qemu-img convert -f raw -O vmdk \ - $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img \ - $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).vmdk - endef -endif - -ifneq ($(CONFIG_VHD_IMAGES),) - define Image/Build/vhd - rm $(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).vhd || true - qemu-img convert -f raw -O vpc \ - $(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).img \ - $(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).vhd - endef - define Image/Build/vhd_efi - rm $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).vmdk || true - qemu-img convert -f raw -O vpc \ - $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img \ - $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).vhd - endef endif define Image/Build/gzip - gzip -f9n $(BIN_DIR)/$(IMG_PREFIX)-rootfs-$(1).img -ifneq ($(CONFIG_GRUB_IMAGES),) gzip -f9n $(BIN_DIR)/$(IMG_PREFIX)-combined-$(1).img -endif -ifneq ($(CONFIG_EFI_IMAGES),) - gzip -f9n $(BIN_DIR)/$(IMG_PREFIX)-uefi-gpt-$(1).img -endif + gzip -f9n $(BIN_DIR)/$(IMG_PREFIX)-rootfs-$(1).img endef ifneq ($(CONFIG_TARGET_IMAGES_GZIP),) @@ -299,17 +174,8 @@ define Image/Build $(call Image/Build/$(1)) ifneq ($(1),iso) $(call Image/Build/grub2,$(1)) - $(call Image/Build/efi,$(1)) -ifneq ($(CONFIG_GRUB_IMAGES),) $(call Image/Build/vdi,$(1)) $(call Image/Build/vmdk,$(1)) - $(call Image/Build/vhd,$(1)) -endif -ifneq ($(CONFIG_EFI_IMAGES),) - $(call Image/Build/vdi_efi,$(1)) - $(call Image/Build/vmdk_efi,$(1)) - $(call Image/Build/vhd_efi,$(1)) -endif $(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-rootfs-$(1).img else $(CP) $(KDIR)/root.iso $(BIN_DIR)/$(IMG_PREFIX).iso diff --git a/target/linux/x86/image/gen_image_efi.sh b/target/linux/x86/image/gen_image_efi.sh deleted file mode 100755 index 3ecb25fed..000000000 --- a/target/linux/x86/image/gen_image_efi.sh +++ /dev/null @@ -1,44 +0,0 @@ -#!/usr/bin/env bash -set -x -[ $# == 8 -o $# == 9 ] || { - echo "SYNTAX: $0 []" - exit 1 -} - -OUTPUT="$1" -KERNELSIZE="$2" -KERNELDIR="$3" -EFISIZE="$4" -EFIIMAGE="$5" -EFIGRUBSIZE="$6" -ROOTFSSIZE="$7" -ROOTFSIMAGE="$8" -ALIGN="$9" - -rm -f "$OUTPUT" - -head=16 -sect=63 -cyl=$(( ($KERNELSIZE + $EFISIZE + $EFIGRUBSIZE + $ROOTFSSIZE) * 1024 * 1024 / ($head * $sect * 512) )) - -# create partition table -set `ptgen -o "$OUTPUT" -h $head -s $sect -p ${KERNELSIZE}m -p ${EFISIZE}m -p ${EFIGRUBSIZE}m -p ${ROOTFSSIZE}m ${ALIGN:+-l $ALIGN} ${SIGNATURE:+-S 0x$SIGNATURE}` - -KERNELOFFSET="$(($1 / 512))" -KERNELSIZE="$2" -EFIOFFSET="$(($3 / 512))" -EFISIZE="$(($4 / 512))" -EFIGRUBOFFSET="$(($5 / 512))" -EFIGRUBSIZE="$(($6 / 512))" -ROOTFSOFFSET="$(($7 / 512))" -ROOTFSSIZE="$(($8 / 512))" - -dd if=/dev/zero of="$OUTPUT" bs=512 seek="$ROOTFSOFFSET" conv=notrunc count="$ROOTFSSIZE" -dd if="$ROOTFSIMAGE" of="$OUTPUT" bs=512 seek="$ROOTFSOFFSET" conv=notrunc -dd if="$EFIIMAGE" of="$OUTPUT" bs=512 seek="$EFIOFFSET" conv=notrunc - -[ -n "$NOGRUB" ] && exit 0 - -make_ext4fs -J -l "$KERNELSIZE" "$OUTPUT.kernel" "$KERNELDIR" -dd if="$OUTPUT.kernel" of="$OUTPUT" bs=512 seek="$KERNELOFFSET" conv=notrunc -rm -f "$OUTPUT.kernel" diff --git a/target/linux/x86/patches-4.4/011-tune_lzma_options.patch b/target/linux/x86/patches-4.4/011-tune_lzma_options.patch deleted file mode 100644 index 5f8f5d821..000000000 --- a/target/linux/x86/patches-4.4/011-tune_lzma_options.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/scripts/Makefile.lib -+++ b/scripts/Makefile.lib -@@ -324,7 +324,7 @@ cmd_bzip2 = (cat $(filter-out FORCE,$^) - - quiet_cmd_lzma = LZMA $@ - cmd_lzma = (cat $(filter-out FORCE,$^) | \ -- lzma e -d20 -lc1 -lp2 -pb2 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ -+ lzma e -lc8 -eos -si -so && $(call size_append, $(filter-out FORCE,$^))) > $@ || \ - (rm -f $@ ; false) - - quiet_cmd_lzo = LZO $@ ---- a/arch/x86/include/asm/boot.h -+++ b/arch/x86/include/asm/boot.h -@@ -23,7 +23,7 @@ - #error "Invalid value for CONFIG_PHYSICAL_ALIGN" - #endif - --#ifdef CONFIG_KERNEL_BZIP2 -+#if defined(CONFIG_KERNEL_BZIP2) || defined(CONFIG_KERNEL_LZMA) - #define BOOT_HEAP_SIZE 0x400000 - #else /* !CONFIG_KERNEL_BZIP2 */ - diff --git a/target/linux/x86/patches-4.4/097-0001-sp5100_tco-Add-AMD-Mullins-platform-support.patch b/target/linux/x86/patches-4.4/097-0001-sp5100_tco-Add-AMD-Mullins-platform-support.patch deleted file mode 100644 index 70169abbe..000000000 --- a/target/linux/x86/patches-4.4/097-0001-sp5100_tco-Add-AMD-Mullins-platform-support.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 190aa4304de6fe2185d96392ddf56580fa133e99 Mon Sep 17 00:00:00 2001 -From: Denis Turischev -Date: Tue, 24 Nov 2015 10:46:12 +0200 -Subject: [PATCH] sp5100_tco: Add AMD Mullins platform support - -AMD Mullins watchdog is fully compatible to the previous Hudson chipset, -reuse the existent sp5100_tco driver. - -Signed-off-by: Denis Turischev -Signed-off-by: Guenter Roeck -Signed-off-by: Wim Van Sebroeck ---- - drivers/watchdog/sp5100_tco.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/watchdog/sp5100_tco.c -+++ b/drivers/watchdog/sp5100_tco.c -@@ -306,6 +306,8 @@ static struct miscdevice sp5100_tco_misc - static const struct pci_device_id sp5100_tco_pci_tbl[] = { - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID, - PCI_ANY_ID, }, -+ { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, PCI_ANY_ID, -+ PCI_ANY_ID, }, - { 0, }, /* End of list */ - }; - MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl); diff --git a/target/linux/x86/patches-4.4/097-0002-sp5100_tco-Add-AMD-Carrizo-platform-support.patch b/target/linux/x86/patches-4.4/097-0002-sp5100_tco-Add-AMD-Carrizo-platform-support.patch deleted file mode 100644 index 33862a25d..000000000 --- a/target/linux/x86/patches-4.4/097-0002-sp5100_tco-Add-AMD-Carrizo-platform-support.patch +++ /dev/null @@ -1,27 +0,0 @@ -From cca118fa2a0a94e0f0b3c8dd1dda922cdee45089 Mon Sep 17 00:00:00 2001 -From: Huang Rui -Date: Mon, 23 Nov 2015 18:07:36 +0800 -Subject: [PATCH] sp5100_tco: Add AMD Carrizo platform support - -sp5100_tco watchdog is also supported on AMD KernCZ chipset of Carrizo -platform. - -Signed-off-by: Huang Rui -Cc: Denis Turischev -Signed-off-by: Guenter Roeck -Signed-off-by: Wim Van Sebroeck ---- - drivers/watchdog/sp5100_tco.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/watchdog/sp5100_tco.c -+++ b/drivers/watchdog/sp5100_tco.c -@@ -308,6 +308,8 @@ static const struct pci_device_id sp5100 - PCI_ANY_ID, }, - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, PCI_ANY_ID, - PCI_ANY_ID, }, -+ { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, PCI_ANY_ID, -+ PCI_ANY_ID, }, - { 0, }, /* End of list */ - }; - MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl); diff --git a/target/linux/x86/patches-4.4/097-0003-sp5100_tco-fix-the-device-check-for-SB800-and-later-chipsets.patch b/target/linux/x86/patches-4.4/097-0003-sp5100_tco-fix-the-device-check-for-SB800-and-later-chipsets.patch deleted file mode 100644 index 8f16fa990..000000000 --- a/target/linux/x86/patches-4.4/097-0003-sp5100_tco-fix-the-device-check-for-SB800-and-later-chipsets.patch +++ /dev/null @@ -1,76 +0,0 @@ -From bdecfcdb5461834aab24002bb18d3cbdd907b7fb Mon Sep 17 00:00:00 2001 -From: Huang Rui -Date: Mon, 23 Nov 2015 18:07:35 +0800 -Subject: [PATCH] sp5100_tco: fix the device check for SB800 and later chipsets - -For SB800 and later chipsets, the register definitions are the same -with SB800. And for SB700 and older chipsets, the definitions should -be same with SP5100/SB7x0. - -Signed-off-by: Huang Rui -Cc: Denis Turischev -Signed-off-by: Guenter Roeck -Signed-off-by: Wim Van Sebroeck ---- - drivers/watchdog/sp5100_tco.c | 28 ++++++++++++++++------------ - 1 file changed, 16 insertions(+), 12 deletions(-) - ---- a/drivers/watchdog/sp5100_tco.c -+++ b/drivers/watchdog/sp5100_tco.c -@@ -335,21 +335,24 @@ static unsigned char sp5100_tco_setupdev - if (!sp5100_tco_pci) - return 0; - -- pr_info("PCI Revision ID: 0x%x\n", sp5100_tco_pci->revision); -+ pr_info("PCI Vendor ID: 0x%x, Device ID: 0x%x, Revision ID: 0x%x\n", -+ sp5100_tco_pci->vendor, sp5100_tco_pci->device, -+ sp5100_tco_pci->revision); - - /* - * Determine type of southbridge chipset. - */ -- if (sp5100_tco_pci->revision >= 0x40) { -- dev_name = SB800_DEVNAME; -- index_reg = SB800_IO_PM_INDEX_REG; -- data_reg = SB800_IO_PM_DATA_REG; -- base_addr = SB800_PM_WATCHDOG_BASE; -- } else { -+ if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && -+ sp5100_tco_pci->revision < 0x40) { - dev_name = SP5100_DEVNAME; - index_reg = SP5100_IO_PM_INDEX_REG; - data_reg = SP5100_IO_PM_DATA_REG; - base_addr = SP5100_PM_WATCHDOG_BASE; -+ } else { -+ dev_name = SB800_DEVNAME; -+ index_reg = SB800_IO_PM_INDEX_REG; -+ data_reg = SB800_IO_PM_DATA_REG; -+ base_addr = SB800_PM_WATCHDOG_BASE; - } - - /* Request the IO ports used by this driver */ -@@ -385,7 +388,12 @@ static unsigned char sp5100_tco_setupdev - * Secondly, Find the watchdog timer MMIO address - * from SBResource_MMIO register. - */ -- if (sp5100_tco_pci->revision >= 0x40) { -+ if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && -+ sp5100_tco_pci->revision < 0x40) { -+ /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */ -+ pci_read_config_dword(sp5100_tco_pci, -+ SP5100_SB_RESOURCE_MMIO_BASE, &val); -+ } else { - /* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */ - outb(SB800_PM_ACPI_MMIO_EN+3, SB800_IO_PM_INDEX_REG); - val = inb(SB800_IO_PM_DATA_REG); -@@ -395,10 +403,6 @@ static unsigned char sp5100_tco_setupdev - val = val << 8 | inb(SB800_IO_PM_DATA_REG); - outb(SB800_PM_ACPI_MMIO_EN+0, SB800_IO_PM_INDEX_REG); - val = val << 8 | inb(SB800_IO_PM_DATA_REG); -- } else { -- /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */ -- pci_read_config_dword(sp5100_tco_pci, -- SP5100_SB_RESOURCE_MMIO_BASE, &val); - } - - /* The SBResource_MMIO is enabled and mapped memory space? */ diff --git a/target/linux/x86/patches-4.4/097-0004-watchdog-sp5100_tco-properly-check-for-new-register-.patch b/target/linux/x86/patches-4.4/097-0004-watchdog-sp5100_tco-properly-check-for-new-register-.patch deleted file mode 100644 index 103aa4853..000000000 --- a/target/linux/x86/patches-4.4/097-0004-watchdog-sp5100_tco-properly-check-for-new-register-.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 46856fabe40cc80f92134683cdec7dc0fc8f4000 Mon Sep 17 00:00:00 2001 -From: Lucas Stach -Date: Tue, 3 May 2016 19:15:58 +0200 -Subject: [PATCH] watchdog: sp5100_tco: properly check for new register layouts - -Commits 190aa4304de6 (Add AMD Mullins platform support) and -cca118fa2a0a94 (Add AMD Carrizo platform support) enabled the -driver on a lot more devices, but the following commit missed -a single location in the code when checking if the SB800 register -offsets should be used. This leads to the wrong register being -written which in turn causes ACPI to go haywire. - -Fix this by introducing a helper function to check for the new -register layout and use this consistently. - -https://bugzilla.kernel.org/show_bug.cgi?id=114201 -https://bugzilla.redhat.com/show_bug.cgi?id=1329910 -Fixes: bdecfcdb5461 (sp5100_tco: fix the device check for SB800 -and later chipsets) -Cc: stable@vger.kernel.org (4.5+) -Signed-off-by: Lucas Stach -Signed-off-by: Guenter Roeck -Signed-off-by: Wim Van Sebroeck ---- - drivers/watchdog/sp5100_tco.c | 15 ++++++++++----- - 1 file changed, 10 insertions(+), 5 deletions(-) - ---- a/drivers/watchdog/sp5100_tco.c -+++ b/drivers/watchdog/sp5100_tco.c -@@ -73,6 +73,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog can - /* - * Some TCO specific functions - */ -+ -+static bool tco_has_sp5100_reg_layout(struct pci_dev *dev) -+{ -+ return dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && -+ dev->revision < 0x40; -+} -+ - static void tco_timer_start(void) - { - u32 val; -@@ -129,7 +136,7 @@ static void tco_timer_enable(void) - { - int val; - -- if (sp5100_tco_pci->revision >= 0x40) { -+ if (!tco_has_sp5100_reg_layout(sp5100_tco_pci)) { - /* For SB800 or later */ - /* Set the Watchdog timer resolution to 1 sec */ - outb(SB800_PM_WATCHDOG_CONFIG, SB800_IO_PM_INDEX_REG); -@@ -342,8 +349,7 @@ static unsigned char sp5100_tco_setupdev - /* - * Determine type of southbridge chipset. - */ -- if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && -- sp5100_tco_pci->revision < 0x40) { -+ if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) { - dev_name = SP5100_DEVNAME; - index_reg = SP5100_IO_PM_INDEX_REG; - data_reg = SP5100_IO_PM_DATA_REG; -@@ -388,8 +394,7 @@ static unsigned char sp5100_tco_setupdev - * Secondly, Find the watchdog timer MMIO address - * from SBResource_MMIO register. - */ -- if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS && -- sp5100_tco_pci->revision < 0x40) { -+ if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) { - /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */ - pci_read_config_dword(sp5100_tco_pci, - SP5100_SB_RESOURCE_MMIO_BASE, &val); diff --git a/target/linux/x86/patches-4.4/100-fix_cs5535_clockevt.patch b/target/linux/x86/patches-4.4/100-fix_cs5535_clockevt.patch deleted file mode 100644 index c3a7fce9c..000000000 --- a/target/linux/x86/patches-4.4/100-fix_cs5535_clockevt.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/clocksource/cs5535-clockevt.c -+++ b/drivers/clocksource/cs5535-clockevt.c -@@ -130,7 +130,8 @@ static irqreturn_t mfgpt_tick(int irq, v - cs5535_mfgpt_write(cs5535_event_clock, MFGPT_REG_SETUP, - MFGPT_SETUP_CNTEN | MFGPT_SETUP_CMP2); - -- cs5535_clockevent.event_handler(&cs5535_clockevent); -+ if (cs5535_clockevent.event_handler) -+ cs5535_clockevent.event_handler(&cs5535_clockevent); - return IRQ_HANDLED; - } - diff --git a/toolchain/Config.in b/toolchain/Config.in index 3de2b108b..96acf1e5c 100644 --- a/toolchain/Config.in +++ b/toolchain/Config.in @@ -268,7 +268,6 @@ comment "Debuggers" config GDB bool - depends on !(aarch64 || aarch64_be) prompt "Build gdb" if TOOLCHAINOPTS default y if !EXTERNAL_TOOLCHAIN help diff --git a/toolchain/binutils/Config.in b/toolchain/binutils/Config.in index 56bcd162a..df80684e6 100644 --- a/toolchain/binutils/Config.in +++ b/toolchain/binutils/Config.in @@ -2,7 +2,7 @@ choice prompt "Binutils Version" if TOOLCHAINOPTS - default BINUTILS_USE_VERSION_2_28 if !arc + default BINUTILS_USE_VERSION_2_29_1 if !arc default BINUTILS_USE_VERSION_2_29_ARC if arc help Select the version of binutils you wish to use. @@ -27,6 +27,11 @@ choice bool "Binutils 2.29.1" select BINUTILS_VERSION_2_29_1 + config BINUTILS_USE_VERSION_2_30 + depends on !arc + bool "Binutils 2.30" + select BINUTILS_VERSION_2_30 + endchoice config EXTRA_BINUTILS_CONFIG_OPTIONS diff --git a/toolchain/binutils/Config.version b/toolchain/binutils/Config.version index 159a25f10..a81f20fea 100644 --- a/toolchain/binutils/Config.version +++ b/toolchain/binutils/Config.version @@ -1,20 +1,20 @@ config BINUTILS_VERSION_2_27 bool -config BINUTILS_VERSION_2_28 - default y if (!TOOLCHAINOPTS && !arc) - bool - config BINUTILS_VERSION_2_29_ARC default y if (!TOOLCHAINOPTS && arc) bool config BINUTILS_VERSION_2_29_1 + default y if (!TOOLCHAINOPTS && !arc) + bool + +config BINUTILS_VERSION_2_30 bool config BINUTILS_VERSION string default "2.27" if BINUTILS_VERSION_2_27 - default "2.28" if BINUTILS_VERSION_2_28 default "2.29.1" if BINUTILS_VERSION_2_29_1 + default "2.30" if BINUTILS_VERSION_2_30 default "arc-2017.09" if BINUTILS_VERSION_2_29_ARC diff --git a/toolchain/binutils/Makefile b/toolchain/binutils/Makefile index c46d29933..f6889cb0e 100644 --- a/toolchain/binutils/Makefile +++ b/toolchain/binutils/Makefile @@ -13,18 +13,20 @@ BIN_VERSION:=$(PKG_VERSION) PKG_SOURCE_URL:=@GNU/binutils/ PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 +TAR_OPTIONS += --exclude='*.rej' + ifeq ($(PKG_VERSION),2.27) PKG_HASH:=369737ce51587f92466041a97ab7d2358c6d9e1b6490b3940eb09fb0a9a6ac88 endif -ifeq ($(PKG_VERSION),2.28) - PKG_HASH:=6297433ee120b11b4b0a1c8f3512d7d73501753142ab9e2daa13c5a3edd32a72 -endif - ifeq ($(PKG_VERSION),2.29.1) PKG_HASH:=1509dff41369fb70aed23682351b663b56db894034773e6dbf7d5d6071fc55cc endif +ifeq ($(PKG_VERSION),2.30) + PKG_HASH:=efeade848067e9a03f1918b1da0d37aaffa0b0127a06b5e9236229851d9d0c09 +endif + ifneq ($(CONFIG_BINUTILS_VERSION_2_29_ARC),) PKG_REV:=arc-2017.09-release PKG_SOURCE_URL:=https://github.com/foss-for-synopsys-dwc-arc-processors/binutils-gdb/archive/$(PKG_REV)/ diff --git a/toolchain/binutils/patches/2.28/001-ELF-BFD-Limit-_bfd_elf_link_renumber_dynsyms-call-in.patch b/toolchain/binutils/patches/2.28/001-ELF-BFD-Limit-_bfd_elf_link_renumber_dynsyms-call-in.patch deleted file mode 100644 index e2587b81e..000000000 --- a/toolchain/binutils/patches/2.28/001-ELF-BFD-Limit-_bfd_elf_link_renumber_dynsyms-call-in.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 2424aef3a744bc6ca4099a655065c70a63f0fb49 Mon Sep 17 00:00:00 2001 -From: "Maciej W. Rozycki" -Date: Wed, 26 Apr 2017 22:18:13 +0100 -Subject: ELF/BFD: Limit `_bfd_elf_link_renumber_dynsyms' call in section GC - -Consistently call `_bfd_elf_link_renumber_dynsyms' only if linking a -dynamic binary, complementing code in `bfd_elf_size_dynsym_hash_dynstr' -and commit ccabcbe51e85 ("New attempt at fixing MIPS --gc-sections et -al."), . - - bfd/ - * elflink.c (elf_gc_sweep): Only call - `_bfd_elf_link_renumber_dynsyms' if dynamic sections have been - created. - -(backported from commit c46cec3a8cfe02fbe0f6c67ba53abc5369c5c659) ---- - bfd/ChangeLog | 6 ++++++ - bfd/elflink.c | 3 ++- - 2 files changed, 8 insertions(+), 1 deletion(-) - -diff --git a/bfd/ChangeLog b/bfd/ChangeLog -index 85c6a817e5..537ebb5e2c 100644 ---- a/bfd/ChangeLog -+++ b/bfd/ChangeLog -@@ -1,3 +1,9 @@ -+2017-04-26 Maciej W. Rozycki -+ -+ * elflink.c (elf_gc_sweep): Only call -+ `_bfd_elf_link_renumber_dynsyms' if dynamic sections have been -+ created. -+ - 2017-03-02 Tristan Gingold - - * version.m4: Bump version to 2.28 -diff --git a/bfd/elflink.c b/bfd/elflink.c -index 69b66f2831..75d6543dcc 100644 ---- a/bfd/elflink.c -+++ b/bfd/elflink.c -@@ -12986,7 +12986,8 @@ elf_gc_sweep (bfd *abfd, struct bfd_link_info *info) - elf_link_hash_traverse (elf_hash_table (info), elf_gc_sweep_symbol, - &sweep_info); - -- _bfd_elf_link_renumber_dynsyms (abfd, info, §ion_sym_count); -+ if (elf_hash_table (info)->dynamic_sections_created) -+ _bfd_elf_link_renumber_dynsyms (abfd, info, §ion_sym_count); - return TRUE; - } - --- -2.11.0 - diff --git a/toolchain/binutils/patches/2.28/002-PR-ld-21334-Always-call-_bfd_elf_link_renumber_dynsy.patch b/toolchain/binutils/patches/2.28/002-PR-ld-21334-Always-call-_bfd_elf_link_renumber_dynsy.patch deleted file mode 100644 index 7cfbaa615..000000000 --- a/toolchain/binutils/patches/2.28/002-PR-ld-21334-Always-call-_bfd_elf_link_renumber_dynsy.patch +++ /dev/null @@ -1,184 +0,0 @@ -From 51ffcfc2c67b4c4aa1620fb4c9834c38d150e1c5 Mon Sep 17 00:00:00 2001 -From: "Maciej W. Rozycki" -Date: Wed, 26 Apr 2017 22:23:44 +0100 -Subject: PR ld/21334: Always call `_bfd_elf_link_renumber_dynsyms' if required - -Complement commit e17b0c351f0b ("MIPS/BFD: Respect the ELF gABI dynamic -symbol table sort requirement") and correct an inconsistency in dynamic -symbol accounting data causing an assertion failure in the MIPS backend: - -ld: BFD (GNU Binutils) 2.28.51.20170330 assertion fail -../../binutils-gdb/bfd/elfxx-mips.c:3860 - -in the course of making a GOT entry in a static binary to satisfy a GOT -relocation present in input, due to the local dynamic symbol count not -having been established. - -To do so let backends request `_bfd_elf_link_renumber_dynsyms' to be -always called, rather than where a dynamic binary is linked only, and -then make this request in the MIPS backend. - - bfd/ - PR ld/21334 - * elf-bfd.h (elf_backend_data): Add `always_renumber_dynsyms' - member. - * elfxx-target.h [!elf_backend_always_renumber_dynsyms] - (elf_backend_always_renumber_dynsyms): Define. - (elfNN_bed): Initialize `always_renumber_dynsyms' member. - * elfxx-mips.h (elf_backend_always_renumber_dynsyms): Define. - * elflink.c (bfd_elf_size_dynsym_hash_dynstr): Also call - `_bfd_elf_link_renumber_dynsyms' if the backend has requested - it. - (elf_gc_sweep): Likewise. - -(backported from commit 23ec1e32b1ab714649a7c25e49b5d721fe3bd3db) ---- - bfd/ChangeLog | 14 ++++++++++++++ - bfd/elf-bfd.h | 4 ++++ - bfd/elflink.c | 34 +++++++++++++++++++++++----------- - bfd/elfxx-mips.h | 1 + - bfd/elfxx-target.h | 6 +++++- - 5 files changed, 47 insertions(+), 12 deletions(-) - -diff --git a/bfd/ChangeLog b/bfd/ChangeLog -index 537ebb5e2c..3f10bc55f2 100644 ---- a/bfd/ChangeLog -+++ b/bfd/ChangeLog -@@ -1,5 +1,19 @@ - 2017-04-26 Maciej W. Rozycki - -+ PR ld/21334 -+ * elf-bfd.h (elf_backend_data): Add `always_renumber_dynsyms' -+ member. -+ * elfxx-target.h [!elf_backend_always_renumber_dynsyms] -+ (elf_backend_always_renumber_dynsyms): Define. -+ (elfNN_bed): Initialize `always_renumber_dynsyms' member. -+ * elfxx-mips.h (elf_backend_always_renumber_dynsyms): Define. -+ * elflink.c (bfd_elf_size_dynsym_hash_dynstr): Also call -+ `_bfd_elf_link_renumber_dynsyms' if the backend has requested -+ it. -+ (elf_gc_sweep): Likewise. -+ -+2017-04-26 Maciej W. Rozycki -+ - * elflink.c (elf_gc_sweep): Only call - `_bfd_elf_link_renumber_dynsyms' if dynamic sections have been - created. -diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h -index 5de9ab6ca6..dc4bd87f89 100644 ---- a/bfd/elf-bfd.h -+++ b/bfd/elf-bfd.h -@@ -1478,6 +1478,10 @@ struct elf_backend_data - /* Address of protected data defined in the shared library may be - external, i.e., due to copy relocation. */ - unsigned extern_protected_data : 1; -+ -+ /* True if `_bfd_elf_link_renumber_dynsyms' must be called even for -+ static binaries. */ -+ unsigned always_renumber_dynsyms : 1; - }; - - /* Information about reloc sections associated with a bfd_elf_section_data -diff --git a/bfd/elflink.c b/bfd/elflink.c -index 75d6543dcc..507f2b6259 100644 ---- a/bfd/elflink.c -+++ b/bfd/elflink.c -@@ -6710,6 +6710,8 @@ bfd_boolean - bfd_elf_size_dynsym_hash_dynstr (bfd *output_bfd, struct bfd_link_info *info) - { - const struct elf_backend_data *bed; -+ unsigned long section_sym_count; -+ bfd_size_type dynsymcount; - - if (!is_elf_hash_table (info->hash)) - return TRUE; -@@ -6717,24 +6719,30 @@ bfd_elf_size_dynsym_hash_dynstr (bfd *output_bfd, struct bfd_link_info *info) - bed = get_elf_backend_data (output_bfd); - (*bed->elf_backend_init_index_section) (output_bfd, info); - -+ /* Assign dynsym indices. In a shared library we generate a section -+ symbol for each output section, which come first. Next come all -+ of the back-end allocated local dynamic syms, followed by the rest -+ of the global symbols. -+ -+ This is usually not needed for static binaries, however backends -+ can request to always do it, e.g. the MIPS backend uses dynamic -+ symbol counts to lay out GOT, which will be produced in the -+ presence of GOT relocations even in static binaries (holding fixed -+ data in that case, to satisfy those relocations). */ -+ -+ if (elf_hash_table (info)->dynamic_sections_created -+ || bed->always_renumber_dynsyms) -+ dynsymcount = _bfd_elf_link_renumber_dynsyms (output_bfd, info, -+ §ion_sym_count); -+ - if (elf_hash_table (info)->dynamic_sections_created) - { - bfd *dynobj; - asection *s; -- bfd_size_type dynsymcount; -- unsigned long section_sym_count; - unsigned int dtagcount; - - dynobj = elf_hash_table (info)->dynobj; - -- /* Assign dynsym indicies. In a shared library we generate a -- section symbol for each output section, which come first. -- Next come all of the back-end allocated local dynamic syms, -- followed by the rest of the global symbols. */ -- -- dynsymcount = _bfd_elf_link_renumber_dynsyms (output_bfd, info, -- §ion_sym_count); -- - /* Work out the size of the symbol version section. */ - s = bfd_get_linker_section (dynobj, ".gnu.version"); - BFD_ASSERT (s != NULL); -@@ -12986,7 +12994,11 @@ elf_gc_sweep (bfd *abfd, struct bfd_link_info *info) - elf_link_hash_traverse (elf_hash_table (info), elf_gc_sweep_symbol, - &sweep_info); - -- if (elf_hash_table (info)->dynamic_sections_created) -+ /* We need to reassign dynsym indices now that symbols may have -+ been removed. See the call in `bfd_elf_size_dynsym_hash_dynstr' -+ for the details of the conditions used here. */ -+ if (elf_hash_table (info)->dynamic_sections_created -+ || bed->always_renumber_dynsyms) - _bfd_elf_link_renumber_dynsyms (abfd, info, §ion_sym_count); - return TRUE; - } -diff --git a/bfd/elfxx-mips.h b/bfd/elfxx-mips.h -index fa5b5d2de9..274129b2e5 100644 ---- a/bfd/elfxx-mips.h -+++ b/bfd/elfxx-mips.h -@@ -196,3 +196,4 @@ literal_reloc_p (int r_type) - #define elf_backend_post_process_headers _bfd_mips_post_process_headers - #define elf_backend_compact_eh_encoding _bfd_mips_elf_compact_eh_encoding - #define elf_backend_cant_unwind_opcode _bfd_mips_elf_cant_unwind_opcode -+#define elf_backend_always_renumber_dynsyms TRUE -diff --git a/bfd/elfxx-target.h b/bfd/elfxx-target.h -index d063fb7f1b..d07600c15d 100644 ---- a/bfd/elfxx-target.h -+++ b/bfd/elfxx-target.h -@@ -126,6 +126,9 @@ - #ifndef elf_backend_extern_protected_data - #define elf_backend_extern_protected_data 0 - #endif -+#ifndef elf_backend_always_renumber_dynsyms -+#define elf_backend_always_renumber_dynsyms FALSE -+#endif - #ifndef elf_backend_stack_align - #define elf_backend_stack_align 16 - #endif -@@ -866,7 +869,8 @@ static struct elf_backend_data elfNN_bed = - elf_backend_no_page_alias, - elf_backend_default_execstack, - elf_backend_caches_rawsize, -- elf_backend_extern_protected_data -+ elf_backend_extern_protected_data, -+ elf_backend_always_renumber_dynsyms - }; - - /* Forward declaration for use when initialising alternative_target field. */ --- -2.11.0 - diff --git a/toolchain/binutils/patches/2.28/300-001_ld_makefile_patch.patch b/toolchain/binutils/patches/2.30/300-001_ld_makefile_patch.patch similarity index 92% rename from toolchain/binutils/patches/2.28/300-001_ld_makefile_patch.patch rename to toolchain/binutils/patches/2.30/300-001_ld_makefile_patch.patch index e4cec7f69..4365197f7 100644 --- a/toolchain/binutils/patches/2.28/300-001_ld_makefile_patch.patch +++ b/toolchain/binutils/patches/2.30/300-001_ld_makefile_patch.patch @@ -11,7 +11,7 @@ EMULATION_OFILES = @EMULATION_OFILES@ --- a/ld/Makefile.in +++ b/ld/Makefile.in -@@ -451,7 +451,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS) +@@ -446,7 +446,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS) # We put the scripts in the directory $(scriptdir)/ldscripts. # We can't put the scripts in $(datadir) because the SEARCH_DIR # directives need to be different for native and cross linkers. diff --git a/toolchain/binutils/patches/2.28/300-012_check_ldrunpath_length.patch b/toolchain/binutils/patches/2.30/300-012_check_ldrunpath_length.patch similarity index 55% rename from toolchain/binutils/patches/2.28/300-012_check_ldrunpath_length.patch rename to toolchain/binutils/patches/2.30/300-012_check_ldrunpath_length.patch index 95d3f75b8..6f51a7205 100644 --- a/toolchain/binutils/patches/2.28/300-012_check_ldrunpath_length.patch +++ b/toolchain/binutils/patches/2.30/300-012_check_ldrunpath_length.patch @@ -1,15 +1,15 @@ --- a/ld/emultempl/elf32.em +++ b/ld/emultempl/elf32.em -@@ -1244,6 +1244,8 @@ fragment <collect, &bh))) -@@ -7725,6 +7726,7 @@ _bfd_mips_elf_create_dynamic_sections (b +@@ -7889,6 +7890,7 @@ _bfd_mips_elf_create_dynamic_sections (b if (! bfd_elf_link_record_dynamic_symbol (info, h)) return FALSE; diff --git a/toolchain/binutils/patches/2.28/500-Change-default-emulation-for-mips64-linux.patch b/toolchain/binutils/patches/2.30/500-Change-default-emulation-for-mips64-linux.patch similarity index 92% rename from toolchain/binutils/patches/2.28/500-Change-default-emulation-for-mips64-linux.patch rename to toolchain/binutils/patches/2.30/500-Change-default-emulation-for-mips64-linux.patch index 7a8f0ae13..daf118f8c 100644 --- a/toolchain/binutils/patches/2.28/500-Change-default-emulation-for-mips64-linux.patch +++ b/toolchain/binutils/patches/2.30/500-Change-default-emulation-for-mips64-linux.patch @@ -1,6 +1,6 @@ --- a/bfd/config.bfd +++ b/bfd/config.bfd -@@ -1101,12 +1101,12 @@ case "${targ}" in +@@ -1189,12 +1189,12 @@ case "${targ}" in targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec" ;; mips64*el-*-linux*) @@ -19,9 +19,9 @@ targ_defvec=mips_elf32_trad_le_vec --- a/ld/configure.tgt +++ b/ld/configure.tgt -@@ -513,11 +513,11 @@ mips*el-*-vxworks*) targ_emul=elf32elmip +@@ -535,11 +535,11 @@ mips*el-*-vxworks*) targ_emul=elf32elmip mips*-*-vxworks*) targ_emul=elf32ebmipvxworks - targ_extra_emuls="elf32elmipvxworks" ;; + targ_extra_emuls="elf32elmipvxworks" ;; mips*-*-windiss) targ_emul=elf32mipswindiss ;; -mips64*el-*-linux-*) targ_emul=elf32ltsmipn32 - targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip" diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in index 30ac13787..34db20d3a 100644 --- a/toolchain/gcc/Config.in +++ b/toolchain/gcc/Config.in @@ -3,7 +3,7 @@ choice prompt "GCC compiler Version" if TOOLCHAINOPTS default GCC_USE_VERSION_7_1_ARC if arc - default GCC_USE_VERSION_5 + default GCC_USE_VERSION_7 help Select the version of gcc you wish to use. diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version index 307a3657a..50da678a0 100644 --- a/toolchain/gcc/Config.version +++ b/toolchain/gcc/Config.version @@ -2,13 +2,13 @@ config GCC_VERSION_7_1_ARC default y if (!TOOLCHAINOPTS && arc) bool +config GCC_VERSION_5 + default y if GCC_USE_VERSION_5 + bool + config GCC_VERSION string + default "5.5.0" if GCC_VERSION_5 default "arc-2017.09-release" if GCC_VERSION_7_1_ARC default "6.3.0" if GCC_USE_VERSION_6 - default "7.3.0" if GCC_USE_VERSION_7 - default "5.5.0" - -config GCC_VERSION_7_1 - bool - default y if GCC_VERSION_7_1_ARC + default "7.3.0" diff --git a/toolchain/gcc/patches/7.3.0/020-PR-libstdc-81797-Add-.NOTPARALLEL-to-include-Makefil.patch b/toolchain/gcc/patches/7.3.0/020-PR-libstdc-81797-Add-.NOTPARALLEL-to-include-Makefil.patch new file mode 100644 index 000000000..c3981b1dc --- /dev/null +++ b/toolchain/gcc/patches/7.3.0/020-PR-libstdc-81797-Add-.NOTPARALLEL-to-include-Makefil.patch @@ -0,0 +1,178 @@ +From: redi +Date: Mon, 19 Feb 2018 16:02:38 +0000 +Subject: [PATCH] PR libstdc++/81797 Add .NOTPARALLEL to include/Makefile for + darwin + +Backport from mainline +2018-02-15 Jonathan Wakely + + PR libstdc++/81797 + * configure.ac (INCLUDE_DIR_NOTPARALLEL): Define. + * configure: Regenerate. + * include/Makefile.am (INCLUDE_DIR_NOTPARALLEL): Add .NOTPARALLEL when + defined. + * include/Makefile.in: Regenerate. + +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-7-branch@257808 138bc75d-0d04-0410-961f-82ee72b054a4 +--- + +--- a/libstdc++-v3/configure ++++ b/libstdc++-v3/configure +@@ -620,6 +620,8 @@ CPU_DEFINES_SRCDIR + ATOMIC_FLAGS + ATOMIC_WORD_SRCDIR + ATOMICITY_SRCDIR ++INCLUDE_DIR_NOTPARALLEL_FALSE ++INCLUDE_DIR_NOTPARALLEL_TRUE + BUILD_PDF_FALSE + BUILD_PDF_TRUE + PDFLATEX +@@ -11601,7 +11603,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11604 "configure" ++#line 11606 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -11707,7 +11709,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 11710 "configure" ++#line 11712 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -15393,7 +15395,7 @@ $as_echo "$glibcxx_cv_atomic_long_long" + # Fake what AC_TRY_COMPILE does. + + cat > conftest.$ac_ext << EOF +-#line 15396 "configure" ++#line 15398 "configure" + int main() + { + typedef bool atomic_type; +@@ -15428,7 +15430,7 @@ $as_echo "$glibcxx_cv_atomic_bool" >&6; + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15431 "configure" ++#line 15433 "configure" + int main() + { + typedef short atomic_type; +@@ -15463,7 +15465,7 @@ $as_echo "$glibcxx_cv_atomic_short" >&6; + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15466 "configure" ++#line 15468 "configure" + int main() + { + // NB: _Atomic_word not necessarily int. +@@ -15499,7 +15501,7 @@ $as_echo "$glibcxx_cv_atomic_int" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15502 "configure" ++#line 15504 "configure" + int main() + { + typedef long long atomic_type; +@@ -15580,7 +15582,7 @@ $as_echo "$as_me: WARNING: Performance o + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15583 "configure" ++#line 15585 "configure" + int main() + { + _Decimal32 d1; +@@ -15622,7 +15624,7 @@ ac_compiler_gnu=$ac_cv_cxx_compiler_gnu + # unnecessary for this test. + + cat > conftest.$ac_ext << EOF +-#line 15625 "configure" ++#line 15627 "configure" + template + struct same + { typedef T2 type; }; +@@ -15656,7 +15658,7 @@ $as_echo "$enable_int128" >&6; } + rm -f conftest* + + cat > conftest.$ac_ext << EOF +-#line 15659 "configure" ++#line 15661 "configure" + template + struct same + { typedef T2 type; }; +@@ -81219,6 +81221,18 @@ else + fi + + ++case "$build" in ++ *-*-darwin* ) glibcxx_include_dir_notparallel=yes ;; ++ * ) glibcxx_include_dir_notparallel=no ;; ++esac ++ if test $glibcxx_include_dir_notparallel = "yes"; then ++ INCLUDE_DIR_NOTPARALLEL_TRUE= ++ INCLUDE_DIR_NOTPARALLEL_FALSE='#' ++else ++ INCLUDE_DIR_NOTPARALLEL_TRUE='#' ++ INCLUDE_DIR_NOTPARALLEL_FALSE= ++fi ++ + + # Propagate the target-specific source directories through the build chain. + ATOMICITY_SRCDIR=config/${atomicity_dir} +@@ -81913,6 +81927,10 @@ if test -z "${BUILD_PDF_TRUE}" && test - + as_fn_error "conditional \"BUILD_PDF\" was never defined. + Usually this means the macro was only invoked conditionally." "$LINENO" 5 + fi ++if test -z "${INCLUDE_DIR_NOTPARALLEL_TRUE}" && test -z "${INCLUDE_DIR_NOTPARALLEL_FALSE}"; then ++ as_fn_error "conditional \"INCLUDE_DIR_NOTPARALLEL\" was never defined. ++Usually this means the macro was only invoked conditionally." "$LINENO" 5 ++fi + + : ${CONFIG_STATUS=./config.status} + ac_write_fail=0 +--- a/libstdc++-v3/configure.ac ++++ b/libstdc++-v3/configure.ac +@@ -467,6 +467,12 @@ AM_CONDITIONAL(BUILD_PDF, + test $ac_cv_prog_DBLATEX = "yes" && + test $ac_cv_prog_PDFLATEX = "yes") + ++case "$build" in ++ *-*-darwin* ) glibcxx_include_dir_notparallel=yes ;; ++ * ) glibcxx_include_dir_notparallel=no ;; ++esac ++AM_CONDITIONAL(INCLUDE_DIR_NOTPARALLEL, ++ test $glibcxx_include_dir_notparallel = "yes") + + # Propagate the target-specific source directories through the build chain. + ATOMICITY_SRCDIR=config/${atomicity_dir} +--- a/libstdc++-v3/include/Makefile.am ++++ b/libstdc++-v3/include/Makefile.am +@@ -1474,3 +1474,8 @@ $(decimal_headers): ; @: + $(ext_headers): ; @: + $(experimental_headers): ; @: + $(experimental_bits_headers): ; @: ++ ++if INCLUDE_DIR_NOTPARALLEL ++# See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81797 ++.NOTPARALLEL: ++endif +--- a/libstdc++-v3/include/Makefile.in ++++ b/libstdc++-v3/include/Makefile.in +@@ -1897,6 +1897,9 @@ $(ext_headers): ; @: + $(experimental_headers): ; @: + $(experimental_bits_headers): ; @: + ++# See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81797 ++@INCLUDE_DIR_NOTPARALLEL_TRUE@.NOTPARALLEL: ++ + # Tell versions [3.59,3.63) of GNU make to not export all variables. + # Otherwise a system limit (for SysV at least) may be exceeded. + .NOEXPORT: diff --git a/toolchain/gcc/patches/7.3.0/100-PR-rtl-optimization-83496.patch b/toolchain/gcc/patches/7.3.0/100-PR-rtl-optimization-83496.patch new file mode 100644 index 000000000..466a731c5 --- /dev/null +++ b/toolchain/gcc/patches/7.3.0/100-PR-rtl-optimization-83496.patch @@ -0,0 +1,136 @@ +From: ebotcazou +Date: Mon, 26 Feb 2018 16:29:30 +0000 +Subject: [PATCH] PR rtl-optimization/83496 * reorg.c + (steal_delay_list_from_target): Change REDUNDANT array from booleans to + RTXes. Call fix_reg_dead_note on every non-null element. + (steal_delay_list_from_fallthrough): Call fix_reg_dead_note on a + redundant insn, if any. (relax_delay_slots): Likewise. + (update_reg_unused_notes): Rename REDUNDANT_INSN to OTHER_INSN. + +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@257996 138bc75d-0d04-0410-961f-82ee72b054a4 +--- + create mode 120000 gcc/testsuite/gcc.c-torture/execute/20180226-1.c + +--- a/gcc/reorg.c ++++ b/gcc/reorg.c +@@ -1035,7 +1035,8 @@ check_annul_list_true_false (int annul_t + + static void + steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq, +- vec *delay_list, resources *sets, ++ vec *delay_list, ++ struct resources *sets, + struct resources *needed, + struct resources *other_needed, + int slots_to_fill, int *pslots_filled, +@@ -1048,7 +1049,7 @@ steal_delay_list_from_target (rtx_insn * + int used_annul = 0; + int i; + struct resources cc_set; +- bool *redundant; ++ rtx_insn **redundant; + + /* We can't do anything if there are more delay slots in SEQ than we + can handle, or if we don't know that it will be a taken branch. +@@ -1087,7 +1088,7 @@ steal_delay_list_from_target (rtx_insn * + if (! targetm.can_follow_jump (insn, seq->insn (0))) + return; + +- redundant = XALLOCAVEC (bool, XVECLEN (seq, 0)); ++ redundant = XALLOCAVEC (rtx_insn *, XVECLEN (seq, 0)); + for (i = 1; i < seq->len (); i++) + { + rtx_insn *trial = seq->insn (i); +@@ -1151,7 +1152,10 @@ steal_delay_list_from_target (rtx_insn * + we therefore decided not to copy. */ + for (i = 1; i < seq->len (); i++) + if (redundant[i]) +- update_block (seq->insn (i), insn); ++ { ++ fix_reg_dead_note (redundant[i], insn); ++ update_block (seq->insn (i), insn); ++ } + + /* Show the place to which we will be branching. */ + *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0))); +@@ -1198,6 +1202,7 @@ steal_delay_list_from_fallthrough (rtx_i + for (i = 1; i < seq->len (); i++) + { + rtx_insn *trial = seq->insn (i); ++ rtx_insn *prior_insn; + + /* If TRIAL sets CC0, stealing it will move it too far from the use + of CC0. */ +@@ -1209,8 +1214,9 @@ steal_delay_list_from_fallthrough (rtx_i + break; + + /* If this insn was already done, we don't need it. */ +- if (redundant_insn (trial, insn, *delay_list)) ++ if ((prior_insn = redundant_insn (trial, insn, *delay_list))) + { ++ fix_reg_dead_note (prior_insn, insn); + update_block (trial, insn); + delete_from_delay_slot (trial); + continue; +@@ -1790,15 +1796,14 @@ fix_reg_dead_note (rtx_insn *start_insn, + } + } + +-/* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN. ++/* Delete any REG_UNUSED notes that exist on INSN but not on OTHER_INSN. + + This handles the case of udivmodXi4 instructions which optimize their +- output depending on whether any REG_UNUSED notes are present. +- we must make sure that INSN calculates as many results as REDUNDANT_INSN +- does. */ ++ output depending on whether any REG_UNUSED notes are present. We must ++ make sure that INSN calculates as many results as OTHER_INSN does. */ + + static void +-update_reg_unused_notes (rtx_insn *insn, rtx redundant_insn) ++update_reg_unused_notes (rtx_insn *insn, rtx other_insn) + { + rtx link, next; + +@@ -1810,8 +1815,7 @@ update_reg_unused_notes (rtx_insn *insn, + || !REG_P (XEXP (link, 0))) + continue; + +- if (! find_regno_note (redundant_insn, REG_UNUSED, +- REGNO (XEXP (link, 0)))) ++ if (!find_regno_note (other_insn, REG_UNUSED, REGNO (XEXP (link, 0)))) + remove_note (insn, link); + } + } +@@ -2324,9 +2328,8 @@ follow_jumps (rtx label, rtx_insn *jump, + taken and THREAD_IF_TRUE is set. This is used for the branch at the + end of a loop back up to the top. + +- OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the +- thread. I.e., it is the fallthrough code of our jump or the target of the +- jump when we are the only jump going there. ++ OWN_THREAD is true if we are the only user of the thread, i.e. it is ++ the target of the jump when we are the only jump going there. + + If OWN_THREAD is false, it must be the "true" thread of a jump. In that + case, we can only take insns from the head of the thread for our delay +@@ -3117,7 +3120,7 @@ relax_delay_slots (rtx_insn *first) + /* Look at every JUMP_INSN and see if we can improve it. */ + for (insn = first; insn; insn = next) + { +- rtx_insn *other; ++ rtx_insn *other, *prior_insn; + bool crossing; + + next = next_active_insn (insn); +@@ -3223,8 +3226,9 @@ relax_delay_slots (rtx_insn *first) + /* See if the first insn in the delay slot is redundant with some + previous insn. Remove it from the delay slot if so; then set up + to reprocess this insn. */ +- if (redundant_insn (pat->insn (1), delay_insn, vNULL)) ++ if ((prior_insn = redundant_insn (pat->insn (1), delay_insn, vNULL))) + { ++ fix_reg_dead_note (prior_insn, insn); + update_block (pat->insn (1), insn); + delete_from_delay_slot (pat->insn (1)); + next = prev_active_insn (next); diff --git a/toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch new file mode 100644 index 000000000..643c5e68a --- /dev/null +++ b/toolchain/gcc/patches/7.3.0/110-Fix-MIPS-PR-84790.patch @@ -0,0 +1,20 @@ +Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790. +MIPS16 functions have a static assembler prologue which clobbers +registers v0 and v1. Add these register clobbers to function call +instructions. + +--- a/gcc/config/mips/mips.c ++++ b/gcc/config/mips/mips.c +@@ -3098,6 +3098,12 @@ mips_emit_call_insn (rtx pattern, rtx or + emit_insn (gen_update_got_version ()); + } + ++ if (TARGET_MIPS16 && TARGET_USE_GOT) ++ { ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP); ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode)); ++ } ++ + if (TARGET_MIPS16 + && TARGET_EXPLICIT_RELOCS + && TARGET_CALL_CLOBBERED_GP) diff --git a/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch index 84c0fdab6..2d0ae4613 100644 --- a/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch +++ b/toolchain/gcc/patches/7.3.0/300-mips_Os_cpu_rtx_cost_model.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c -@@ -19784,7 +19784,7 @@ mips_option_override (void) +@@ -19790,7 +19790,7 @@ mips_option_override (void) flag_pcc_struct_return = 0; /* Decide which rtx_costs structure to use. */ diff --git a/toolchain/gcc/patches/7.3.0/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches/7.3.0/870-ppc_no_crtsavres.patch index 156468b45..2daff5800 100644 --- a/toolchain/gcc/patches/7.3.0/870-ppc_no_crtsavres.patch +++ b/toolchain/gcc/patches/7.3.0/870-ppc_no_crtsavres.patch @@ -7,7 +7,7 @@ Date: Mon Mar 5 00:51:01 2012 +0000 SVN-Revision: 30814 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c -@@ -26936,7 +26936,7 @@ rs6000_savres_strategy (rs6000_stack_t * +@@ -27001,7 +27001,7 @@ rs6000_savres_strategy (rs6000_stack_t * /* Define cutoff for using out-of-line functions to save registers. */ if (DEFAULT_ABI == ABI_V4 || TARGET_ELF) { diff --git a/toolchain/gcc/patches/7.3.0/910-mbsd_multi.patch b/toolchain/gcc/patches/7.3.0/910-mbsd_multi.patch index 286cfadae..dab427d94 100644 --- a/toolchain/gcc/patches/7.3.0/910-mbsd_multi.patch +++ b/toolchain/gcc/patches/7.3.0/910-mbsd_multi.patch @@ -114,7 +114,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 ; On SVR4 targets, it also controls whether or not to emit a --- a/gcc/opts.c +++ b/gcc/opts.c -@@ -1928,6 +1928,9 @@ common_handle_option (struct gcc_options +@@ -1934,6 +1934,9 @@ common_handle_option (struct gcc_options opts, opts_set, loc, dc); break; @@ -126,7 +126,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 opts->x_warn_larger_than = value != -1; --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -6567,6 +6567,17 @@ This option is only supported for C and +@@ -6569,6 +6569,17 @@ This option is only supported for C and @option{-Wall} and by @option{-Wpedantic}, which can be disabled with @option{-Wno-pointer-sign}. diff --git a/toolchain/gcc/patches/7.3.0/920-specs_nonfatal_getenv.patch b/toolchain/gcc/patches/7.3.0/920-specs_nonfatal_getenv.patch index 69b40621d..a0fdc5f16 100644 --- a/toolchain/gcc/patches/7.3.0/920-specs_nonfatal_getenv.patch +++ b/toolchain/gcc/patches/7.3.0/920-specs_nonfatal_getenv.patch @@ -7,7 +7,7 @@ Date: Sat Apr 21 03:02:39 2012 +0000 --- a/gcc/gcc.c +++ b/gcc/gcc.c -@@ -9280,8 +9280,10 @@ getenv_spec_function (int argc, const ch +@@ -9281,8 +9281,10 @@ getenv_spec_function (int argc, const ch value = varname; if (!value) diff --git a/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch b/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch index 90d10f11e..5affd6f92 100644 --- a/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch +++ b/toolchain/gcc/patches/7.3.0/930-fix-mips-noexecstack.patch @@ -48,7 +48,7 @@ sellcey@mips.com --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c -@@ -22561,6 +22561,9 @@ mips_promote_function_mode (const_tree t +@@ -22567,6 +22567,9 @@ mips_promote_function_mode (const_tree t #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2 diff --git a/toolchain/gcc/patches/7.3.0/940-no-clobber-stamp-bits.patch b/toolchain/gcc/patches/7.3.0/940-no-clobber-stamp-bits.patch index 8b88b4066..1dec4015e 100644 --- a/toolchain/gcc/patches/7.3.0/940-no-clobber-stamp-bits.patch +++ b/toolchain/gcc/patches/7.3.0/940-no-clobber-stamp-bits.patch @@ -22,7 +22,7 @@ Date: Fri Dec 12 17:01:57 2014 +0000 --- a/libstdc++-v3/include/Makefile.in +++ b/libstdc++-v3/include/Makefile.in -@@ -1476,7 +1476,7 @@ stamp-bits: ${bits_headers} +@@ -1475,7 +1475,7 @@ stamp-bits: ${bits_headers} @$(STAMP) stamp-bits stamp-bits-sup: stamp-bits ${bits_sup_headers} diff --git a/toolchain/gcc/patches/7.3.0/950-cpp_file_path_translation.patch b/toolchain/gcc/patches/7.3.0/950-cpp_file_path_translation.patch index 60729dd7f..e1fd55e40 100644 --- a/toolchain/gcc/patches/7.3.0/950-cpp_file_path_translation.patch +++ b/toolchain/gcc/patches/7.3.0/950-cpp_file_path_translation.patch @@ -63,7 +63,7 @@ Forward ported from attachment to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=4 When preprocessing, handle directives, but do not expand macros. --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -11863,6 +11863,12 @@ by @option{-fplugin=@var{name}} instead +@@ -11865,6 +11865,12 @@ by @option{-fplugin=@var{name}} instead @option{-fplugin=@var{path}/@var{name}.so}. This option is not meant to be used by the user, but only passed by the driver. diff --git a/toolchain/glibc/common.mk b/toolchain/glibc/common.mk index 0ffeef0f6..e10c7b1bc 100644 --- a/toolchain/glibc/common.mk +++ b/toolchain/glibc/common.mk @@ -9,13 +9,16 @@ include $(TOPDIR)/rules.mk PKG_NAME:=glibc PKG_VERSION:=2.26 -PKG_SOURCE_URL:=@GNU/libc -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=e54e0a934cd2bc94429be79da5e9385898d2306b9eaf3c92d5a77af96190f6bd - +PKG_SOURCE_PROTO:=git PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION) +PKG_SOURCE_VERSION:=d300041c533a3d837c9f37a099bcc95466860e98 +PKG_MIRROR_HASH:=31e90926a1d3093355aa85c04c68b3d109c3dc3d9f80afe50505e864b32ac784 +PKG_SOURCE_URL:=git://sourceware.org/git/glibc.git +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-$(PKG_SOURCE_VERSION).tar.xz + HOST_BUILD_DIR:=$(BUILD_DIR_TOOLCHAIN)/$(PKG_SOURCE_SUBDIR) CUR_BUILD_DIR:=$(HOST_BUILD_DIR)-$(VARIANT) +PATCH_DIR:=$(PATH_PREFIX)/patches include $(INCLUDE_DIR)/toolchain-build.mk @@ -41,6 +44,7 @@ endif # only -O2 tested by upstream changeset # "Optimize i386 syscall inlining for GCC 5" GLIBC_CONFIGURE:= \ + unset LD_LIBRARY_PATH; \ BUILD_CC="$(HOSTCC)" \ $(TARGET_CONFIGURE_OPTS) \ CFLAGS="-O2 $(filter-out -Os,$(call qstrip,$(TARGET_CFLAGS)))" \ diff --git a/toolchain/musl/common.mk b/toolchain/musl/common.mk index 497aa8df0..87424646c 100644 --- a/toolchain/musl/common.mk +++ b/toolchain/musl/common.mk @@ -8,13 +8,13 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/target.mk PKG_NAME:=musl -PKG_VERSION:=1.1.18 -PKG_RELEASE=2 +PKG_VERSION:=1.1.19 +PKG_RELEASE=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_SUBDIR:=$(PKG_NAME)-$(PKG_VERSION) -PKG_SOURCE_VERSION:=72656157f54c47277b01ec85a6ba7c4084fea6c8 -PKG_MIRROR_HASH:=a3d857c23c94aa96a4ad5f442aaf236e5a189a717273c4e4faf425988d98cd32 +PKG_SOURCE_VERSION:=55df09bfccbfe21fc9dd7d8f94550c0ff25ace04 +PKG_MIRROR_HASH:=eb94e4e7e94221dd8890afd9b29e2562c36cf5585649035349ca1c6c1c354f2b PKG_SOURCE_URL:=git://git.musl-libc.org/musl PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-$(PKG_SOURCE_VERSION).tar.xz diff --git a/toolchain/musl/patches/010-kernel-suppress-some-more-Linux-uapi-definitions.patch b/toolchain/musl/patches/010-kernel-suppress-some-more-Linux-uapi-definitions.patch deleted file mode 100644 index 78b487fae..000000000 --- a/toolchain/musl/patches/010-kernel-suppress-some-more-Linux-uapi-definitions.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 8e85d2c268000b51cc690f3a55a820d8f8a6c0bc Mon Sep 17 00:00:00 2001 -From: Hauke Mehrtens -Date: Thu, 22 Jun 2017 22:04:28 +0200 -Subject: [PATCH] Add additional uapi guards for Linux kernel header files - -With Linux kernel 4.15 it will be possible to guard more parts of the -Linux header files from a libc. Make use of this in musl to guard all -the structures and other definitions from the Linux header files which -are also defined by the header files provided by musl. This will make -musl compile with the unmodified Linux kernel user space headers. - -This extends the definitions done in commit 04983f227238 ("make -netinet/in.h suppress clashing definitions from kernel headers") - -The needed patches were recently accepted for Linux 4.15: -https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c0bace798436bca0fdc221ff61143f1376a9c3de -https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6926e041a8920c8ec27e4e155efa760aa01551fd ---- - include/net/if.h | 7 +++++++ - include/netinet/if_ether.h | 1 + - include/sys/xattr.h | 2 ++ - 3 files changed, 10 insertions(+) - ---- a/include/net/if.h -+++ b/include/net/if.h -@@ -125,6 +125,13 @@ struct ifconf { - #define ifc_req ifc_ifcu.ifcu_req - #define _IOT_ifconf _IOT(_IOTS(struct ifconf),1,0,0,0,0) - -+#define __UAPI_DEF_IF_IFCONF 0 -+#define __UAPI_DEF_IF_IFMAP 0 -+#define __UAPI_DEF_IF_IFNAMSIZ 0 -+#define __UAPI_DEF_IF_IFREQ 0 -+#define __UAPI_DEF_IF_NET_DEVICE_FLAGS 0 -+#define __UAPI_DEF_IF_NET_DEVICE_FLAGS_LOWER_UP_DORMANT_ECHO 0 -+ - #endif - - #ifdef __cplusplus ---- a/include/netinet/if_ether.h -+++ b/include/netinet/if_ether.h -@@ -133,5 +133,6 @@ do { \ - (enaddr)[5] = ((uint8_t *)ipaddr)[3]; \ - } while(0) - -+#define __UAPI_DEF_ETHHDR 0 - - #endif ---- a/include/sys/xattr.h -+++ b/include/sys/xattr.h -@@ -24,6 +24,8 @@ int removexattr(const char *, const char - int lremovexattr(const char *, const char *); - int fremovexattr(int, const char *); - -+#define __UAPI_DEF_XATTR 0 -+ - #ifdef __cplusplus - } - #endif diff --git a/toolchain/musl/patches/110-read_timezone_from_fs.patch b/toolchain/musl/patches/110-read_timezone_from_fs.patch index b4349e736..fb98f7d10 100644 --- a/toolchain/musl/patches/110-read_timezone_from_fs.patch +++ b/toolchain/musl/patches/110-read_timezone_from_fs.patch @@ -24,5 +24,5 @@ + } + if (!s) s = "/etc/localtime"; - if (!*s) s = __gmt; + if (!*s) s = __utc; diff --git a/toolchain/musl/patches/200-add_libssp_nonshared.patch b/toolchain/musl/patches/200-add_libssp_nonshared.patch index 218ca4140..7a2909461 100644 --- a/toolchain/musl/patches/200-add_libssp_nonshared.patch +++ b/toolchain/musl/patches/200-add_libssp_nonshared.patch @@ -21,7 +21,7 @@ Signed-off-by: Steven Barth ALL_TOOLS = obj/musl-gcc WRAPCC_GCC = gcc -@@ -129,7 +129,8 @@ NOSSP_SRCS = $(wildcard crt/*.c) \ +@@ -125,7 +125,8 @@ NOSSP_SRCS = $(wildcard crt/*.c) \ src/thread/__set_thread_area.c src/thread/$(ARCH)/__set_thread_area.c \ src/string/memset.c src/string/$(ARCH)/memset.c \ src/string/memcpy.c src/string/$(ARCH)/memcpy.c \ @@ -31,7 +31,7 @@ Signed-off-by: Steven Barth $(NOSSP_SRCS:%.c=obj/%.o) $(NOSSP_SRCS:%.c=obj/%.lo): CFLAGS_ALL += $(CFLAGS_NOSSP) $(CRT_OBJS): CFLAGS_ALL += -DCRT -@@ -172,6 +173,11 @@ lib/libc.a: $(AOBJS) +@@ -168,6 +169,11 @@ lib/libc.a: $(AOBJS) $(AR) rc $@ $(AOBJS) $(RANLIB) $@ diff --git a/toolchain/musl/patches/300-relative.patch b/toolchain/musl/patches/300-relative.patch index 6e30e0a88..7e1eb7d6b 100644 --- a/toolchain/musl/patches/300-relative.patch +++ b/toolchain/musl/patches/300-relative.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -221,7 +221,7 @@ $(DESTDIR)$(includedir)/%: $(srcdir)/inc +@@ -217,7 +217,7 @@ $(DESTDIR)$(includedir)/%: $(srcdir)/inc $(INSTALL) -D -m 644 $< $@ $(DESTDIR)$(LDSO_PATHNAME): $(DESTDIR)$(libdir)/libc.so diff --git a/toolchain/musl/patches/400-Add-format-attribute-to-some-function-declarations.patch b/toolchain/musl/patches/400-Add-format-attribute-to-some-function-declarations.patch index 67fedae30..915b0b7b4 100644 --- a/toolchain/musl/patches/400-Add-format-attribute-to-some-function-declarations.patch +++ b/toolchain/musl/patches/400-Add-format-attribute-to-some-function-declarations.patch @@ -149,8 +149,8 @@ Signed-off-by: Hauke Mehrtens #endif #ifdef _GNU_SOURCE -@@ -184,6 +192,9 @@ char *fgets_unlocked(char *, int, FILE * - int fputs_unlocked(const char *, FILE *); +@@ -198,6 +206,9 @@ typedef struct _IO_cookie_io_functions_t + FILE *fopencookie(void *, const char *, cookie_io_functions_t); #endif +#undef __fp diff --git a/toolchain/musl/patches/900-iconv_size_hack.patch b/toolchain/musl/patches/900-iconv_size_hack.patch index 41cff5b03..6200262b1 100644 --- a/toolchain/musl/patches/900-iconv_size_hack.patch +++ b/toolchain/musl/patches/900-iconv_size_hack.patch @@ -1,14 +1,14 @@ --- a/src/locale/iconv.c +++ b/src/locale/iconv.c -@@ -42,6 +42,7 @@ static const unsigned char charmaps[] = - "ucs4\0ucs4be\0utf32\0utf32be\0\0\300" - "ucs4le\0utf32le\0\0\303" - "ascii\0usascii\0iso646\0iso646us\0\0\307" +@@ -48,6 +48,7 @@ static const unsigned char charmaps[] = + "utf16\0\0\312" + "ucs4\0utf32\0\0\313" + "ucs2\0\0\314" +#ifdef FULL_ICONV "eucjp\0\0\320" "shiftjis\0sjis\0\0\321" "iso2022jp\0\0\322" -@@ -50,6 +51,7 @@ static const unsigned char charmaps[] = +@@ -56,6 +57,7 @@ static const unsigned char charmaps[] = "gb2312\0\0\332" "big5\0bigfive\0cp950\0big5hkscs\0\0\340" "euckr\0ksc5601\0ksx1001\0cp949\0\0\350" @@ -16,7 +16,7 @@ #include "codepages.h" ; -@@ -60,6 +62,7 @@ static const unsigned short legacy_chars +@@ -66,6 +68,7 @@ static const unsigned short legacy_chars #include "legacychars.h" }; @@ -24,7 +24,7 @@ static const unsigned short jis0208[84][94] = { #include "jis0208.h" }; -@@ -79,6 +82,7 @@ static const unsigned short hkscs[] = { +@@ -85,6 +88,7 @@ static const unsigned short hkscs[] = { static const unsigned short ksc[93][94] = { #include "ksc.h" }; @@ -32,7 +32,7 @@ static const unsigned short rev_jis[] = { #include "revjis.h" -@@ -196,6 +200,7 @@ static unsigned legacy_map(const unsigne +@@ -205,6 +209,7 @@ static unsigned legacy_map(const unsigne return x < 256 ? x : legacy_chars[x-256]; } @@ -40,7 +40,7 @@ static unsigned uni_to_jis(unsigned c) { unsigned nel = sizeof rev_jis / sizeof *rev_jis; -@@ -214,6 +219,7 @@ static unsigned uni_to_jis(unsigned c) +@@ -223,6 +228,7 @@ static unsigned uni_to_jis(unsigned c) } } } @@ -48,15 +48,15 @@ size_t iconv(iconv_t cd, char **restrict in, size_t *restrict inb, char **restrict out, size_t *restrict outb) { -@@ -285,6 +291,7 @@ size_t iconv(iconv_t cd, char **restrict - c = ((c-0xd7c0)<<10) + (d-0xdc00); +@@ -319,6 +325,7 @@ size_t iconv(iconv_t cd, char **restrict } - break; + type = scd->state; + continue; +#ifdef FULL_ICONV case SHIFT_JIS: if (c < 128) break; if (c-0xa1 <= 0xdf-0xa1) { -@@ -476,6 +483,7 @@ size_t iconv(iconv_t cd, char **restrict +@@ -510,6 +517,7 @@ size_t iconv(iconv_t cd, char **restrict c = ksc[c][d]; if (!c) goto ilseq; break; @@ -64,7 +64,7 @@ default: if (!c) break; c = legacy_map(map, c); -@@ -516,6 +524,7 @@ size_t iconv(iconv_t cd, char **restrict +@@ -550,6 +558,7 @@ size_t iconv(iconv_t cd, char **restrict } } goto subst; @@ -72,14 +72,14 @@ case SHIFT_JIS: if (c < 128) goto revout; if (c == 0xa5) { -@@ -589,6 +598,7 @@ size_t iconv(iconv_t cd, char **restrict +@@ -623,6 +632,7 @@ size_t iconv(iconv_t cd, char **restrict *(*out)++ = 'B'; *outb -= 8; break; +#endif + case UCS2: + totype = UCS2BE; case UCS2BE: - case UCS2LE: - case UTF_16BE: --- a/src/locale/codepages.h +++ b/src/locale/codepages.h @@ -129,6 +129,7 @@ diff --git a/tools/Makefile b/tools/Makefile index a95342f50..50bd552d7 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -29,7 +29,6 @@ tools-y += mm-macros missing-macros cmake scons bc findutils gengetopt patchelf tools-y += mtools dosfstools libressl tools-$(CONFIG_TARGET_orion_generic) += wrt350nv2-builder upslug2 tools-$(CONFIG_TARGET_x86) += qemu -tools-$(CONFIG_EFI_IMAGES) += popt gptfdisk tools-$(CONFIG_TARGET_mxs) += elftosb sdimage tools-$(CONFIG_TARGET_ar71xx) += lzma-old squashfs tools-$(CONFIG_USES_MINOR) += kernel2minor @@ -72,7 +71,6 @@ $(curdir)/libressl/compile := $(curdir)/pkg-config/compile $(curdir)/mkimage/compile += $(curdir)/libressl/compile $(curdir)/firmware-utils/compile += $(curdir)/libressl/compile $(curdir)/cmake/compile += $(curdir)/libressl/compile -$(curdir)/gptfdisk/compile += $(curdir)/popt/compile $(curdir)/e2fsprogs/compile ifneq ($(HOST_OS),Linux) tools-y += coreutils diff --git a/tools/ccache/Makefile b/tools/ccache/Makefile index ff8ff6c05..6fc06c10c 100644 --- a/tools/ccache/Makefile +++ b/tools/ccache/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/target.mk PKG_NAME:=ccache -PKG_VERSION:=3.3.4 +PKG_VERSION:=3.3.6 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://download.samba.org/pub/ccache/ \ https://samba.org/ftp/ccache/ -PKG_HASH:=24f15bf389e38c41548c9c259532187774ec0cb9686c3497bbb75504c8dc404f +PKG_HASH:=410a27fdaff64ead6df3fa57fa74bca0eca6b5f6ac77d7288af1256f6b12141d include $(INCLUDE_DIR)/host-build.mk diff --git a/tools/ccache/patches/100-honour-copts.patch b/tools/ccache/patches/100-honour-copts.patch index 141479519..7a17fcb75 100644 --- a/tools/ccache/patches/100-honour-copts.patch +++ b/tools/ccache/patches/100-honour-copts.patch @@ -1,6 +1,6 @@ --- a/ccache.c +++ b/ccache.c -@@ -1790,6 +1790,7 @@ calculate_object_hash(struct args *args, +@@ -1803,6 +1803,7 @@ calculate_object_hash(struct args *args, "CPLUS_INCLUDE_PATH", "OBJC_INCLUDE_PATH", "OBJCPLUS_INCLUDE_PATH", // clang diff --git a/tools/cmake/Makefile b/tools/cmake/Makefile index 22e5d3e85..8211c8d44 100644 --- a/tools/cmake/Makefile +++ b/tools/cmake/Makefile @@ -7,13 +7,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=cmake -PKG_VERSION:=3.9.3 +PKG_VERSION:=3.11.0 PKG_CPE_ID:=cpe:/a:kitware:cmake PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=https://cmake.org/files/v3.9/ \ +PKG_SOURCE_URL:=https://cmake.org/files/v3.11/ \ https://fossies.org/linux/misc/ -PKG_HASH:=8eaf75e1e932159aae98ab5e7491499545554be62a08cbcbc7c75c84b999f28a +PKG_HASH:=c313bee371d4d255be2b4e96fd59b11d58bc550a7c78c021444ae565709a656b HOST_BUILD_PARALLEL:=1 HOST_CONFIGURE_PARALLEL:=1 diff --git a/tools/cmake/patches/010-backport-macos-fix.patch b/tools/cmake/patches/010-backport-macos-fix.patch deleted file mode 100644 index 76e92dcb0..000000000 --- a/tools/cmake/patches/010-backport-macos-fix.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/Source/kwsys/kwsysPlatformTestsCXX.cxx -+++ b/Source/kwsys/kwsysPlatformTestsCXX.cxx -@@ -265,6 +265,12 @@ int main() - #ifdef TEST_KWSYS_CXX_HAS_UTIMENSAT - #include - #include -+#if defined(__APPLE__) -+#include -+#if MAC_OS_X_VERSION_MIN_REQUIRED < 101300 -+#error "utimensat not available on macOS < 10.13" -+#endif -+#endif - int main() - { - struct timespec times[2] = { { 0, UTIME_OMIT }, { 0, UTIME_NOW } }; diff --git a/tools/cmake/patches/100-disable_qt_tests.patch b/tools/cmake/patches/100-disable_qt_tests.patch index f8baafe33..46cdc9456 100644 --- a/tools/cmake/patches/100-disable_qt_tests.patch +++ b/tools/cmake/patches/100-disable_qt_tests.patch @@ -1,6 +1,6 @@ --- a/Tests/RunCMake/CMakeLists.txt +++ b/Tests/RunCMake/CMakeLists.txt -@@ -246,15 +246,6 @@ add_RunCMake_test(no_install_prefix) +@@ -284,15 +284,6 @@ add_RunCMake_test(no_install_prefix) add_RunCMake_test(configure_file) add_RunCMake_test(CTestTimeoutAfterMatch) @@ -18,14 +18,17 @@ add_RunCMake_test(FindPkgConfig) --- a/Tests/CMakeLists.txt +++ b/Tests/CMakeLists.txt -@@ -403,10 +403,6 @@ if(BUILD_TESTING) +@@ -422,13 +422,6 @@ if(BUILD_TESTING) list(APPEND TEST_BUILD_DIRS ${CMake_TEST_INSTALL_PREFIX}) -- if(NOT QT4_FOUND) +- if(NOT DEFINED CMake_TEST_Qt4) +- set(CMake_TEST_Qt4 1) +- endif() +- if(CMake_TEST_Qt4 AND NOT QT4_FOUND) - find_package(Qt4 QUIET) - endif() - - if(QT4_FOUND) + if(CMake_TEST_Qt4 AND QT4_FOUND) # test whether the Qt4 which has been found works, on some machines # which run nightly builds there were errors like "wrong file format" diff --git a/tools/cmake/patches/110-alpine_musl-compat.patch b/tools/cmake/patches/110-alpine_musl-compat.patch deleted file mode 100644 index ae93201e5..000000000 --- a/tools/cmake/patches/110-alpine_musl-compat.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- a/Utilities/cmjsoncpp/include/json/assertions.h -+++ b/Utilities/cmjsoncpp/include/json/assertions.h -@@ -6,12 +6,12 @@ - #ifndef CPPTL_JSON_ASSERTIONS_H_INCLUDED - #define CPPTL_JSON_ASSERTIONS_H_INCLUDED - -+#include -+ - #if !defined(JSON_IS_AMALGAMATION) - #include "config.h" - #endif // if !defined(JSON_IS_AMALGAMATION) - --#include -- - #if JSON_USE_EXCEPTION - #include - #define JSON_ASSERT(condition) \ diff --git a/tools/cmake/patches/120-libarchive-fix-libressl-compat.patch b/tools/cmake/patches/110-libarchive-fix-libressl-compat.patch similarity index 50% rename from tools/cmake/patches/120-libarchive-fix-libressl-compat.patch rename to tools/cmake/patches/110-libarchive-fix-libressl-compat.patch index a56ac2ed0..ba6565b6a 100644 --- a/tools/cmake/patches/120-libarchive-fix-libressl-compat.patch +++ b/tools/cmake/patches/110-libarchive-fix-libressl-compat.patch @@ -9,14 +9,3 @@ #include /* malloc, free */ #include /* memset */ static inline EVP_MD_CTX *EVP_MD_CTX_new(void) ---- a/Utilities/cmlibarchive/libarchive/archive_openssl_hmac_private.h -+++ b/Utilities/cmlibarchive/libarchive/archive_openssl_hmac_private.h -@@ -28,7 +28,7 @@ - #include - #include - --#if OPENSSL_VERSION_NUMBER < 0x10100000L -+#if OPENSSL_VERSION_NUMBER < 0x10100000L || defined(LIBRESSL_VERSION_NUMBER) - #include /* malloc, free */ - #include /* memset */ - static inline HMAC_CTX *HMAC_CTX_new(void) diff --git a/tools/cmake/patches/130-curl-fix-libressl-linking.patch b/tools/cmake/patches/120-curl-fix-libressl-linking.patch similarity index 96% rename from tools/cmake/patches/130-curl-fix-libressl-linking.patch rename to tools/cmake/patches/120-curl-fix-libressl-linking.patch index b5ee61b58..ad5b89750 100644 --- a/tools/cmake/patches/130-curl-fix-libressl-linking.patch +++ b/tools/cmake/patches/120-curl-fix-libressl-linking.patch @@ -20,7 +20,7 @@ Signed-off-by: Jo-Philipp Wich --- --- a/Utilities/cmcurl/CMakeLists.txt +++ b/Utilities/cmcurl/CMakeLists.txt -@@ -456,6 +456,10 @@ if(CMAKE_USE_OPENSSL) +@@ -461,6 +461,10 @@ if(CMAKE_USE_OPENSSL) set(USE_OPENSSL ON) set(HAVE_LIBCRYPTO ON) set(HAVE_LIBSSL ON) diff --git a/tools/cmake/patches/140-bootstrap_parallel_make_flag.patch b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch similarity index 89% rename from tools/cmake/patches/140-bootstrap_parallel_make_flag.patch rename to tools/cmake/patches/130-bootstrap_parallel_make_flag.patch index 734e8cb1c..de5137ee3 100644 --- a/tools/cmake/patches/140-bootstrap_parallel_make_flag.patch +++ b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch @@ -1,6 +1,6 @@ --- a/bootstrap +++ b/bootstrap -@@ -1094,7 +1094,10 @@ int main(){ printf("1%c", (char)0x0a); r +@@ -1149,7 +1149,10 @@ int main(){ printf("1%c", (char)0x0a); r ' > "test.c" cmake_original_make_flags="${cmake_make_flags}" if [ "x${cmake_parallel_make}" != "x" ]; then diff --git a/tools/e2fsprogs/Makefile b/tools/e2fsprogs/Makefile index 36f5c547b..f809df424 100644 --- a/tools/e2fsprogs/Makefile +++ b/tools/e2fsprogs/Makefile @@ -9,8 +9,8 @@ include $(TOPDIR)/rules.mk PKG_NAME:=e2fsprogs PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs -PKG_VERSION:=1.43.7 -PKG_HASH:=2a6367289047d68d9ba6a46cf89ab9a1efd0556cde02a51ebaf414ff51edded9 +PKG_VERSION:=1.44.1 +PKG_HASH:=0ca164c1c87724df904c918b2d7051ef989b51de725db66c67514dbe6dd2b9ef PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile index ca41387b5..7c0180ad4 100644 --- a/tools/firmware-utils/Makefile +++ b/tools/firmware-utils/Makefile @@ -42,7 +42,7 @@ define Host/Compile $(call cc,mkplanexfw sha1) $(call cc,mktplinkfw mktplinkfw-lib md5, -Wall -fgnu89-inline) $(call cc,mktplinkfw2 mktplinkfw-lib md5, -fgnu89-inline) - $(call cc,tplink-safeloader md5, -Wall) + $(call cc,tplink-safeloader md5, -Wall --std=gnu99) $(call cc,pc1crypt) $(call cc,osbridge-crc) $(call cc,wrt400n cyg_crc32) @@ -63,6 +63,7 @@ define Host/Compile $(call cc,mkbrncmdline) $(call cc,mkbrnimg) $(call cc,mkdapimg) + $(call cc,mkdapimg2) $(call cc, mkcameofw, -Wall) $(call cc,seama md5) $(call cc,oseama md5, -Wall) @@ -81,6 +82,7 @@ define Host/Compile $(call cc,mkbuffaloimg, -Wall) $(call cc,zyimage, -Wall) $(call cc,mkdhpimg buffalo-lib, -Wall) + $(call cc,mkdlinkfw mkdlinkfw-lib, -lz -Wall --std=gnu99) endef define Host/Install diff --git a/tools/firmware-utils/src/mkdapimg2.c b/tools/firmware-utils/src/mkdapimg2.c new file mode 100644 index 000000000..aef003c28 --- /dev/null +++ b/tools/firmware-utils/src/mkdapimg2.c @@ -0,0 +1,204 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License, + * version 2 as published by the Free Software Foundation. + * + * (C) Nicolò Veronese + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include // htonl + +// Usage: mkdapimg2 -s signature [-v version] [-r region] +// [-k uImage block size] -i -o +// +// NOTE: The kernel block size is used to know the offset of the rootfs +// in the image file. +// +// The system writes in the uImage partition until the end of uImage +// is reached, after that, the system jumps to the offset specified with the -k +// parameter and begin writing at the beginning of the rootfs MTD partition. +// +// If the -k parameter is the size of the original uImage partition, the system +// continue writing in the rootfs partition starting from the last block +// that has been wrote. (This is useful if the new kernel size is +// different from the original one) +// +// Example: +// ------------------------------------------ +// Creating 7 MTD partitions on "ath-nor0": +// 0x000000000000-0x000000010000 : "u-boot" +// 0x000000010000-0x000000020000 : "ART" +// 0x000000020000-0x000000030000 : "MP" +// 0x000000030000-0x000000040000 : "config" +// 0x000000040000-0x000000120000 : "uImage" +// 0x000000120000-0x000000800000 : "rootfs" +// 0x000000040000-0x000000800000 : "firmware" +// ------------------------------------------ +// +// 0x000000120000-0x000000040000 = 0xE0000 -> 917504 +// +// e.g.: mkdapimg2 -s HONEYBEE-FIRMWARE-DAP-1330 -v 1.00.21 -r Default +// -k 917504 -i sysupgarde.bin -o factory.bin +// +// +// The img_hdr_struct was taken from the D-Link SDK: +// DAP-1330_OSS-firmware_1.00b21/DAP-1330_OSS-firmware_1.00b21/uboot/uboot.patch + +#define MAX_SIGN_LEN 32 +#define MAX_FW_VER_LEN 16 +#define MAX_REG_LEN 8 + +struct img_hdr_struct { + uint32_t hdr_len; + uint32_t checksum; + uint32_t total_size; + uint32_t kernel_size; + char signature[MAX_SIGN_LEN]; + char fw_ver[MAX_FW_VER_LEN]; + char fw_reg[MAX_REG_LEN]; +} imghdr ; + +char *progname; + +void +perrexit(int code, char *msg) +{ + fprintf(stderr, "%s: %s: %s\n", progname, msg, strerror(errno)); + exit(code); +} + +void +usage() +{ + fprintf(stderr, "usage: %s -s signature [-v version] [-r region] [-k uImage part size] -i -o \n", progname); + exit(1); +} + +int +main(int ac, char *av[]) +{ + char signature[MAX_SIGN_LEN]; + char version[MAX_FW_VER_LEN]; + char region[MAX_REG_LEN]; + int kernel = 0; + + FILE *ifile, *ofile; + int c; + + uint32_t cksum; + uint32_t bcnt; + + progname = basename(av[0]); + + memset(signature, 0, sizeof(signature)); + memset(version, 0, sizeof(version)); + memset(region, 0, sizeof(region)); + + while ( 1 ) { + char *ptr; + int c; + + c = getopt(ac, av, "s:v:r:k:i:o:"); + if (c == -1) + break; + + switch (c) { + case 's': + if (strlen(optarg) > MAX_SIGN_LEN + 1) { + fprintf(stderr, "%s: signature exceeds %d chars\n", + progname, MAX_SIGN_LEN); + exit(1); + } + strcpy(signature, optarg); + break; + case 'v': + if (strlen(optarg) > MAX_FW_VER_LEN + 1) { + fprintf(stderr, "%s: version exceeds %d chars\n", + progname, MAX_FW_VER_LEN); + exit(1); + } + strcpy(version, optarg); + break; + case 'r': + if (strlen(optarg) > MAX_REG_LEN + 1) { + fprintf(stderr, "%s: region exceeds %d chars\n", + progname, MAX_REG_LEN); + exit(1); + } + strcpy(region, optarg); + break; + case 'k': + kernel = strtoul(optarg, &ptr, 0); + if(ptr[0] == 'k'){ + kernel *= 1000; + } + break; + case 'i': + if ((ifile = fopen(optarg, "r")) == NULL) + perrexit(1, optarg); + break; + case 'o': + if ((ofile = fopen(optarg, "w")) == NULL) + perrexit(1, optarg); + break; + default: + usage(); + } + } + + if (signature[0] == 0 || ifile == NULL || ofile == NULL) { + usage(); + exit(1); + } + + for (bcnt = 0, cksum = 0 ; (c = fgetc(ifile)) != EOF ; bcnt++) + cksum += c & 0xff; + + if (fseek(ifile, 0, SEEK_SET) < 0) + perrexit(2, "fseek on input"); + + // Fill in the header + memset(&imghdr, 0, sizeof(imghdr)); + imghdr.hdr_len = sizeof(imghdr); + imghdr.checksum = htonl(cksum); + imghdr.total_size = htonl(bcnt); + imghdr.kernel_size = htonl(kernel); + + strncpy(imghdr.signature, signature, MAX_SIGN_LEN); + strncpy(imghdr.fw_ver, version, MAX_FW_VER_LEN); + strncpy(imghdr.fw_reg, region, MAX_REG_LEN); + + if (fwrite(&imghdr, sizeof(imghdr), 1, ofile) < 0) + perrexit(2, "fwrite header on output"); + + while ((c = fgetc(ifile)) != EOF) { + if (fputc(c, ofile) == EOF) + perrexit(2, "fputc on output"); + } + + if (ferror(ifile)) + perrexit(2, "fgetc on input"); + + fclose(ofile); + fclose(ifile); + + fprintf(stderr, "imgHdr.hdr_len = %lu\n", sizeof(imghdr)); + fprintf(stderr, "imgHdr.checksum = 0x%08x\n", cksum); + fprintf(stderr, "imgHdr.total_size = 0x%08x\n", bcnt); + fprintf(stderr, "imgHdr.kernel_size = 0x%08x\n", kernel); + fprintf(stderr, "imgHdr.header = %s\n", signature); + fprintf(stderr, "imgHdr.fw_ver = %s\n", version); + fprintf(stderr, "imgHdr.fw_reg = %s\n", region); + + return 0; +} diff --git a/tools/firmware-utils/src/mkdlinkfw-lib.c b/tools/firmware-utils/src/mkdlinkfw-lib.c new file mode 100644 index 000000000..fcab85623 --- /dev/null +++ b/tools/firmware-utils/src/mkdlinkfw-lib.c @@ -0,0 +1,172 @@ +/* + * mkdlinkfw + * + * Copyright (C) 2018 Paweł Dembicki + * + * This tool is based on mktplinkfw. + * Copyright (C) 2009 Gabor Juhos + * Copyright (C) 2008,2009 Wang Jian + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +#include +#include +#include +#include +#include /* for unlink() */ +#include +#include /* for getopt() */ +#include +#include +#include +#include +#include +#include +#include /*for crc32 */ + +#include "mkdlinkfw-lib.h" + +extern char *progname; + +static unsigned char jffs2_eof_mark[4] = { 0xde, 0xad, 0xc0, 0xde }; + +uint32_t jboot_timestamp(void) +{ + time_t rawtime; + time(&rawtime); + return (((uint32_t) rawtime) - TIMESTAMP_MAGIC) >> 2; +} + +uint16_t jboot_checksum(uint16_t start_val, uint16_t *data, int size) +{ + uint32_t counter = start_val; + uint16_t *ptr = data; + + while (size > 1) { + counter += *ptr; + ++ptr; + while (counter >> 16) + counter = (uint16_t) counter + (counter >> 16); + size -= 2; + } + if (size > 0) { + counter += *(uint8_t *) ptr; + counter -= 0xFF; + } + while (counter >> 16) + counter = (uint16_t) counter + (counter >> 16); + return counter; +} + +int get_file_stat(struct file_info *fdata) +{ + struct stat st; + int res; + + if (fdata->file_name == NULL) + return 0; + + res = stat(fdata->file_name, &st); + if (res) { + ERRS("stat failed on %s", fdata->file_name); + return res; + } + + fdata->file_size = st.st_size; + return 0; +} + +int read_to_buf(const struct file_info *fdata, char *buf) +{ + FILE *f; + int ret = EXIT_FAILURE; + + f = fopen(fdata->file_name, "r"); + if (f == NULL) { + ERRS("could not open \"%s\" for reading", fdata->file_name); + goto out; + } + + errno = 0; + fread(buf, fdata->file_size, 1, f); + if (errno != 0) { + ERRS("unable to read from file \"%s\"", fdata->file_name); + goto out_close; + } + + ret = EXIT_SUCCESS; + + out_close: + fclose(f); + out: + return ret; +} + +int pad_jffs2(char *buf, int currlen, int maxlen) +{ + int len; + uint32_t pad_mask; + + len = currlen; + pad_mask = (4 * 1024) | (64 * 1024); /* EOF at 4KB and at 64KB */ + while ((len < maxlen) && (pad_mask != 0)) { + uint32_t mask; + int i; + + for (i = 10; i < 32; i++) { + mask = 1 << i; + if (pad_mask & mask) + break; + } + + len = ALIGN(len, mask); + + for (i = 10; i < 32; i++) { + mask = 1 << i; + if ((len & (mask - 1)) == 0) + pad_mask &= ~mask; + } + + for (i = 0; i < sizeof(jffs2_eof_mark); i++) + buf[len + i] = jffs2_eof_mark[i]; + + len += sizeof(jffs2_eof_mark); + } + + return len; +} + +int write_fw(const char *ofname, const char *data, int len) +{ + FILE *f; + int ret = EXIT_FAILURE; + + f = fopen(ofname, "w"); + if (f == NULL) { + ERRS("could not open \"%s\" for writing", ofname); + goto out; + } + + errno = 0; + fwrite(data, len, 1, f); + if (errno) { + ERRS("unable to write output file"); + goto out_flush; + } + + DBG("firmware file \"%s\" completed", ofname); + + ret = EXIT_SUCCESS; + + out_flush: + fflush(f); + fclose(f); + if (ret != EXIT_SUCCESS) + unlink(ofname); + out: + return ret; +} diff --git a/tools/firmware-utils/src/mkdlinkfw-lib.h b/tools/firmware-utils/src/mkdlinkfw-lib.h new file mode 100644 index 000000000..d61124cb6 --- /dev/null +++ b/tools/firmware-utils/src/mkdlinkfw-lib.h @@ -0,0 +1,83 @@ +/* + * mkdlinkfw + * + * Copyright (C) 2018 Paweł Dembicki + * + * This tool is based on mktplinkfw. + * Copyright (C) 2009 Gabor Juhos + * Copyright (C) 2008,2009 Wang Jian + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +#ifndef mkdlinkfw_lib_h +#define mkdlinkfw_lib_h + +#define AUH_MAGIC "DLK" +#define AUH_SIZE 80 +#define AUH_LVPS 0x01 +#define AUH_HDR_ID 0x4842 +#define AUH_HDR_VER 0x02 +#define AUH_SEC_ID 0x04 +#define AUH_INFO_TYPE 0x04 + +#define STAG_SIZE 16 +#define STAG_ID 0x04 +#define STAG_MAGIC 0x2B24 +#define STAG_CMARK_FACTORY 0xFF + +#define SCH2_SIZE 40 +#define SCH2_MAGIC 0x2124 +#define SCH2_VER 0x02 + +#define FLAT 0 +#define JZ 1 +#define GZIP 2 +#define LZMA 3 + +#define RAM_ENTRY_ADDR 0x80000000 +#define RAM_LOAD_ADDR 0x80000000 +#define JBOOT_SIZE 0x10000 + +#define ALL_HEADERS_SIZE (AUH_SIZE + STAG_SIZE + SCH2_SIZE) +#define MAX_HEADER_COUNTER 10 +#define TIMESTAMP_MAGIC 0x35016f00L + +#define FACTORY 0 +#define SYSUPGRADE 1 + +#define ALIGN(x, a) ({ typeof(a) __a = (a); (((x) + __a - 1) & ~(__a - 1)); }) + +#define ERR(fmt, ...) do { \ + fflush(0); \ + fprintf(stderr, "[%s] *** error: " fmt "\n", \ + progname, ## __VA_ARGS__); \ +} while (0) + +#define ERRS(fmt, ...) do { \ + int save = errno; \ + fflush(0); \ + fprintf(stderr, "[%s] *** error: " fmt ": %s\n", \ + progname, ## __VA_ARGS__, strerror(save)); \ +} while (0) + +#define DBG(fmt, ...) do { \ + fprintf(stderr, "[%s] " fmt "\n", progname, ## __VA_ARGS__); \ +} while (0) + +struct file_info { + char *file_name; /* name of the file */ + uint32_t file_size; /* length of the file */ +}; + +uint32_t jboot_timestamp(void); +uint16_t jboot_checksum(uint16_t start_val, uint16_t *data, int size); +int get_file_stat(struct file_info *fdata); +int read_to_buf(const struct file_info *fdata, char *buf); +int pad_jffs2(char *buf, int currlen, int maxlen); +int write_fw(const char *ofname, const char *data, int len); + +#endif /* mkdlinkfw_lib_h */ diff --git a/tools/firmware-utils/src/mkdlinkfw.c b/tools/firmware-utils/src/mkdlinkfw.c new file mode 100644 index 000000000..87605004f --- /dev/null +++ b/tools/firmware-utils/src/mkdlinkfw.c @@ -0,0 +1,665 @@ +/* + * mkdlinkfw + * + * Copyright (C) 2018 Paweł Dembicki + * + * This tool is based on mktplinkfw. + * Copyright (C) 2009 Gabor Juhos + * Copyright (C) 2008,2009 Wang Jian + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +#include +#include +#include +#include +#include /* for unlink() */ +#include +#include /* for getopt() */ +#include +#include +#include +#include +#include +#include /*for crc32 */ + +#include "mkdlinkfw-lib.h" + +/* ARM update header 2.0 + * used only in factory images to erase and flash selected area + */ +struct auh_header { + uint8_t rom_id[12]; /* 12-bit rom-id unique per router type */ + uint16_t derange; /* used for scramble header */ + uint16_t image_checksum; /* jboot_checksum of flashed data */ + + uint32_t space1; /* zeros */ + uint32_t space2; /* zeros */ + uint16_t space3; /* zerosu */ + uint8_t lpvs; /* must be 0x01 */ + uint8_t mbz; /* bust be 0 */ + uint32_t time_stamp; /* timestamp calculated in jboot way */ + + uint32_t erase_start; /* erase start address */ + uint32_t erase_length; /* erase length address */ + uint32_t data_offset; /* data start address */ + uint32_t data_length; /* data length address */ + + uint32_t space4; /* zeros */ + uint32_t space5; /* zeros */ + uint32_t space6; /* zeros */ + uint32_t space7; /* zeros */ + + uint16_t header_id; /* magic 0x4842 */ + uint16_t header_version; /* 0x02 for 2.0 */ + uint16_t space8; /* zeros */ + uint8_t section_id; /* section id */ + uint8_t image_info_type; /* (?) 0x04 in factory images */ + uint32_t image_info_offset; /* (?) zeros in factory images */ + uint16_t family_member; /* unique per router type */ + uint16_t header_checksum; /* negated jboot_checksum of header data */ +}; + +struct stag_header { /* used only of sch2 wrapped kernel data */ + uint8_t cmark; /* in factory 0xFF ,in sysuograde must be the same as id */ + uint8_t id; /* 0x04 */ + uint16_t magic; /* magic 0x2B24 */ + uint32_t time_stamp; /* timestamp calculated in jboot way */ + uint32_t image_length; /* lentgh of kernel + sch2 header */ + uint16_t image_checksum; /* negated jboot_checksum of sch2 + kernel */ + uint16_t tag_checksum; /* negated jboot_checksum of stag header data */ +}; + +struct sch2_header { /* used only in kernel partitions */ + uint16_t magic; /* magic 0x2124 */ + uint8_t cp_type; /* 0x00 for flat, 0x01 for jz, 0x02 for gzip, 0x03 for lzma */ + uint8_t version; /* 0x02 for sch2 */ + uint32_t ram_addr; /* ram entry address */ + uint32_t image_len; /* kernel image length */ + uint32_t image_crc32; /* kernel image crc */ + uint32_t start_addr; /* ram start address */ + uint32_t rootfs_addr; /* rootfs flash address */ + uint32_t rootfs_len; /* rootfls length */ + uint32_t rootfs_crc32; /* rootfs crc32 */ + uint32_t header_crc32; /* sch2 header crc32, durring calculation this area is replaced by zero */ + uint16_t header_length; /* sch2 header length: 0x28 */ + uint16_t cmd_line_length; /* cmd line length, known zeros */ +}; + +/* globals */ +static struct file_info inspect_info; +struct file_info kernel_info; +struct file_info rootfs_info; +struct file_info image_info; + +char *ofname; +char *progname; +uint32_t firmware_size; +uint16_t family_member; +char *rom_id[12] = { 0 }; + +char image_type; +int add_jffs2_eof; + +static void usage(int status) +{ + fprintf(stderr, "Usage: %s [OPTIONS...]\n", progname); + fprintf(stderr, + "\n" + "Options:\n" + " -i inspect given firmware file \n" + " -f set family member id (hexval prefixed with 0x)\n" + " -F read image and convert it to FACTORY\n" + " -k read kernel image from the file \n" + " -r read rootfs image from the file \n" + " -o write output to the file \n" + " -s set firmware partition size\n" + " -m set rom id to (12-bit string val: \"DLK*********\")\n" + " -h show this screen\n"); + + exit(status); +} + +void print_auh_header(struct auh_header *printed_header) +{ + printf("\trom_id: %s\n" + "\tderange: 0x%04X\n" + "\timage_checksum: 0x%04X\n" + "\tspace1: 0x%08X\n" + "\tspace2: 0x%08X\n" + "\tspace3: 0x%04X\n" + "\tlpvs: 0x%02X\n" + "\tmbz: 0x%02X\n" + "\ttime_stamp: 0x%08X\n" + "\terase_start: 0x%08X\n" + "\terase_length: 0x%08X\n" + "\tdata_offset: 0x%08X\n" + "\tdata_length: 0x%08X\n" + "\tspace4: 0x%08X\n" + "\tspace5: 0x%08X\n" + "\tspace6: 0x%08X\n" + "\tspace7: 0x%08X\n" + "\theader_id: 0x%04X\n" + "\theader_version: 0x%02X\n" + "\tspace8: 0x%04X\n" + "\tsection_id: 0x%02X\n" + "\timage_info_type: 0x%02X\n" + "\timage_info_offset 0x%08X\n" + "\tfamily_member: 0x%04X\n" + "\theader_checksum: 0x%04X\n", + printed_header->rom_id, + printed_header->derange, + printed_header->image_checksum, + printed_header->space1, + printed_header->space2, + printed_header->space3, + printed_header->lpvs, + printed_header->mbz, + printed_header->time_stamp, + printed_header->erase_start, + printed_header->erase_length, + printed_header->data_offset, + printed_header->data_length, + printed_header->space4, + printed_header->space5, + printed_header->space6, + printed_header->space7, + printed_header->header_id, + printed_header->header_version, + printed_header->space8, + printed_header->section_id, + printed_header->image_info_type, + printed_header->image_info_offset, + printed_header->family_member, printed_header->header_checksum); +} + +void print_stag_header(struct stag_header *printed_header) +{ + printf("\tcmark: 0x%02X\n" + "\tid: 0x%02X\n" + "\tmagic: 0x%04X\n" + "\ttime_stamp: 0x%08X\n" + "\timage_length: 0x%04X\n" + "\timage_checksum: 0x%04X\n" + "\ttag_checksum: 0x%04X\n", + printed_header->cmark, + printed_header->id, + printed_header->magic, + printed_header->time_stamp, + printed_header->image_length, + printed_header->image_checksum, printed_header->tag_checksum); +} + +void print_sch2_header(struct sch2_header *printed_header) +{ + printf("\tmagic: 0x%04X\n" + "\tcp_type: 0x%02X\n" + "\tversion: 0x%02X\n" + "\tram_addr: 0x%08X\n" + "\timage_len: 0x%08X\n" + "\timage_crc32: 0x%08X\n" + "\tstart_addr: 0x%08X\n" + "\trootfs_addr: 0x%08X\n" + "\trootfs_len: 0x%08X\n" + "\trootfs_crc32: 0x%08X\n" + "\theader_crc32: 0x%08X\n" + "\theader_length: 0x%04X\n" + "\tcmd_line_length: 0x%04X\n", + printed_header->magic, + printed_header->cp_type, + printed_header->version, + printed_header->ram_addr, + printed_header->image_len, + printed_header->image_crc32, + printed_header->start_addr, + printed_header->rootfs_addr, + printed_header->rootfs_len, + printed_header->rootfs_crc32, + printed_header->header_crc32, + printed_header->header_length, printed_header->cmd_line_length); +} + +static int find_auh_headers(char *buf) +{ + char *tmp_buf = buf; + struct auh_header *tmp_header[MAX_HEADER_COUNTER]; + int header_counter = 0; + + int ret = EXIT_FAILURE; + + while (tmp_buf - buf <= inspect_info.file_size - AUH_SIZE) { + if (!memcmp(tmp_buf, AUH_MAGIC, 3)) { + if (((struct auh_header *)tmp_buf)->header_checksum == + (uint16_t) ~jboot_checksum(0, (uint16_t *) tmp_buf, + AUH_SIZE - 2)) { + uint16_t checksum = 0; + printf("Find proper AUH header at: 0x%lX!\n", + tmp_buf - buf); + tmp_header[header_counter] = + (struct auh_header *)tmp_buf; + checksum = + jboot_checksum(0, (uint16_t *) ((char *) + tmp_header + [header_counter] + + AUH_SIZE), + tmp_header + [header_counter]->data_length); + if (tmp_header[header_counter]->image_checksum + == checksum) + printf("Image checksum ok.\n"); + else + ERR("Image checksum incorrect! Stored: 0x%X Calculated: 0x%X\n", tmp_header[header_counter]->image_checksum, checksum); + header_counter++; + if (header_counter > MAX_HEADER_COUNTER) + break; + } + } + tmp_buf++; + } + + if (header_counter == 0) + ERR("Can't find proper AUH header!\n"); + else if (header_counter > MAX_HEADER_COUNTER) + ERR("To many AUH headers!\n"); + else { + for (int i = 0; i < header_counter; i++) { + printf("AUH %d:\n", i); + print_auh_header(tmp_header[i]); + } + + ret = EXIT_SUCCESS; + } + + return ret; +} + +static int check_stag_header(char *buf, struct stag_header *header) +{ + + int ret = EXIT_FAILURE; + + uint8_t cmark_tmp = header->cmark; + header->cmark = header->id; + + if (header->tag_checksum == + (uint16_t) ~jboot_checksum(0, (uint16_t *) header, + STAG_SIZE - 2)) { + uint16_t checksum = 0; + printf("Find proper STAG header at: 0x%lX!\n", + (char *)header - buf); + checksum = + jboot_checksum(0, (uint16_t *) ((char *)header + STAG_SIZE), + header->image_length); + if (header->image_checksum == checksum) { + printf("Image checksum ok.\n"); + header->cmark = cmark_tmp; + print_stag_header(header); + ret = EXIT_SUCCESS; + } else + ERR("Image checksum incorrect! Stored: 0x%X Calculated: 0x%X\n", header->image_checksum, checksum); + } else + ERR("STAG header checksum incorrect!"); + + header->cmark = cmark_tmp; + return ret; +} + +static int check_sch2_header(char *buf, struct sch2_header *header) +{ + + int ret = EXIT_FAILURE; + + uint32_t crc32_tmp = header->header_crc32; + header->header_crc32 = 0; + + if (crc32_tmp == crc32(0, (uint8_t *) header, header->header_length)) { + uint32_t crc32_val; + printf("Find proper SCH2 header at: 0x%lX!\n", + (char *)header - buf); + + crc32_val = + crc32(0, (uint8_t *) header + header->header_length, + header->image_len); + if (header->image_crc32 == crc32_val) { + printf("Kernel checksum ok.\n"); + + header->header_crc32 = crc32_tmp; + print_sch2_header(header); + ret = EXIT_SUCCESS; + } else + ERR("Kernel checksum incorrect! Stored: 0x%X Calculated: 0x%X\n", header->image_crc32, crc32_val); + + } else + ERR("SCH2 header checksum incorrect!"); + + header->header_crc32 = crc32_tmp; + return ret; +} + +static int inspect_fw(void) +{ + char *buf; + struct stag_header *stag_header_kernel; + struct sch2_header *sch2_header_kernel; + int ret = EXIT_FAILURE; + + buf = malloc(inspect_info.file_size); + if (!buf) { + ERR("no memory for buffer!\n"); + goto out; + } + + ret = read_to_buf(&inspect_info, buf); + if (ret) + goto out_free_buf; + + ret = find_auh_headers(buf); + if (ret) + goto out_free_buf; + + stag_header_kernel = (struct stag_header *)(buf + AUH_SIZE); + + ret = check_stag_header(buf, stag_header_kernel); + if (ret) + goto out_free_buf; + + sch2_header_kernel = (struct sch2_header *)(buf + AUH_SIZE + STAG_SIZE); + + ret = check_sch2_header(buf, sch2_header_kernel); + if (ret) + goto out_free_buf; + + out_free_buf: + free(buf); + out: + return ret; +} + +static int check_options(void) +{ + int ret; + + if (inspect_info.file_name) { + ret = get_file_stat(&inspect_info); + if (ret) + return ret; + + return 0; + } + + return 0; +} + +int fill_sch2(struct sch2_header *header, char *kernel_ptr, char *rootfs_ptr) +{ + + header->magic = SCH2_MAGIC; + header->cp_type = LZMA; + header->version = SCH2_VER; + header->ram_addr = RAM_LOAD_ADDR; + header->image_len = kernel_info.file_size; + header->image_crc32 = crc32(0, (uint8_t *) kernel_ptr, kernel_info.file_size); + header->start_addr = RAM_ENTRY_ADDR; + header->rootfs_addr = + JBOOT_SIZE + STAG_SIZE + SCH2_SIZE + kernel_info.file_size; + header->rootfs_len = rootfs_info.file_size; + header->rootfs_crc32 = crc32(0, (uint8_t *) rootfs_ptr, rootfs_info.file_size); + header->header_crc32 = 0; + header->header_length = SCH2_SIZE; + header->cmd_line_length = 0; + + header->header_crc32 = crc32(0, (uint8_t *) header, header->header_length); + + return EXIT_SUCCESS; +} + +int fill_stag(struct stag_header *header, uint32_t length) +{ + header->cmark = STAG_ID; + header->id = STAG_ID; + header->magic = STAG_MAGIC; + header->time_stamp = jboot_timestamp(); + header->image_length = length + SCH2_SIZE; + header->image_checksum = + jboot_checksum(0, (uint16_t *) ((char *)header + STAG_SIZE), + header->image_length); + header->tag_checksum = + ~jboot_checksum(0, (uint16_t *) header, STAG_SIZE - 2); + + if (image_type == FACTORY) + header->cmark = STAG_CMARK_FACTORY; + + return EXIT_SUCCESS; +}; + +int fill_auh(struct auh_header *header, uint32_t length) +{ + memcpy(header->rom_id, rom_id, 12); + header->derange = 0; + header->image_checksum = + jboot_checksum(0, (uint16_t *) ((char *)header + AUH_SIZE), length); + header->space1 = 0; + header->space2 = 0; + header->space3 = 0; + header->lpvs = AUH_LVPS; + header->mbz = 0; + header->time_stamp = jboot_timestamp(); + header->erase_start = JBOOT_SIZE; + header->erase_length = firmware_size; + header->data_offset = JBOOT_SIZE; + header->data_length = length; + header->space4 = 0; + header->space5 = 0; + header->space6 = 0; + header->space7 = 0; + header->header_id = AUH_HDR_ID; + header->header_version = AUH_HDR_VER; + header->space8 = 0; + header->section_id = AUH_SEC_ID; + header->image_info_type = AUH_INFO_TYPE; + header->image_info_offset = 0; + header->family_member = family_member; + header->header_checksum = + ~jboot_checksum(0, (uint16_t *) header, AUH_SIZE - 2); + + return EXIT_SUCCESS; +} + +int build_fw(void) +{ + char *buf; + char *kernel_ptr; + char *rootfs_ptr; + int ret = EXIT_FAILURE; + int writelen; + + struct stag_header *stag_header_kernel; + struct sch2_header *sch2_header_kernel; + + if (!kernel_info.file_name | !rootfs_info.file_name) + goto out; + + ret = get_file_stat(&kernel_info); + if (ret) + goto out; + ret = get_file_stat(&rootfs_info); + if (ret) + goto out; + + buf = malloc(firmware_size); + if (!buf) { + ERR("no memory for buffer\n"); + goto out; + } + + if (rootfs_info.file_size + kernel_info.file_size + ALL_HEADERS_SIZE > + firmware_size) { + ERR("data is bigger than firmware_size!\n"); + goto out; + } + + memset(buf, 0xff, firmware_size); + + stag_header_kernel = (struct stag_header *)buf; + + sch2_header_kernel = + (struct sch2_header *)((char *)stag_header_kernel + STAG_SIZE); + kernel_ptr = (char *)sch2_header_kernel + SCH2_SIZE; + + ret = read_to_buf(&kernel_info, kernel_ptr); + if (ret) + goto out_free_buf; + + rootfs_ptr = kernel_ptr + kernel_info.file_size; + + ret = read_to_buf(&rootfs_info, rootfs_ptr); + if (ret) + goto out_free_buf; + + writelen = rootfs_ptr + rootfs_info.file_size - buf; + + fill_sch2(sch2_header_kernel, kernel_ptr, rootfs_ptr); + fill_stag(stag_header_kernel, kernel_info.file_size); + + ret = write_fw(ofname, buf, writelen); + if (ret) + goto out_free_buf; + + ret = EXIT_SUCCESS; + + out_free_buf: + free(buf); + out: + return ret; +} + +int wrap_fw(void) +{ + char *buf; + char *image_ptr; + int ret = EXIT_FAILURE; + int writelen; + + struct auh_header *auh_header_kernel; + + if (!image_info.file_name) + goto out; + + ret = get_file_stat(&image_info); + if (ret) + goto out; + + buf = malloc(firmware_size); + if (!buf) { + ERR("no memory for buffer\n"); + goto out; + } + + if (image_info.file_size + AUH_SIZE > + firmware_size) { + ERR("data is bigger than firmware_size!\n"); + goto out; + } + if (!family_member) { + ERR("No family_member!\n"); + goto out; + } + if (!(rom_id[0])) { + ERR("No rom_id!\n"); + goto out; + } + memset(buf, 0xff, firmware_size); + + image_ptr = (char *)(buf + AUH_SIZE); + + ret = read_to_buf(&image_info, image_ptr); + if (ret) + goto out_free_buf; + + writelen = image_ptr + image_info.file_size - buf; + + auh_header_kernel = (struct auh_header *)buf; + fill_auh(auh_header_kernel, writelen - AUH_SIZE); + + ret = write_fw(ofname, buf, writelen); + if (ret) + goto out_free_buf; + + ret = EXIT_SUCCESS; + + out_free_buf: + free(buf); + out: + return ret; +} + +int main(int argc, char *argv[]) +{ + int ret = EXIT_FAILURE; + + progname = basename(argv[0]); + image_type = SYSUPGRADE; + family_member = 0; + firmware_size = 0; + + while (1) { + int c; + + c = getopt(argc, argv, "f:F:i:hk:m:o:r:s:"); + if (c == -1) + break; + + switch (c) { + case 'f': + sscanf(optarg, "0x%hx", &family_member); + break; + case 'F': + image_info.file_name = optarg; + image_type = FACTORY; + break; + case 'i': + inspect_info.file_name = optarg; + break; + case 'k': + kernel_info.file_name = optarg; + break; + case 'm': + if (strlen(optarg) == 12) + memcpy(rom_id, optarg, 12); + break; + case 'r': + rootfs_info.file_name = optarg; + break; + case 'o': + ofname = optarg; + break; + case 's': + sscanf(optarg, "0x%x", &firmware_size); + break; + default: + usage(EXIT_FAILURE); + break; + } + } + + ret = check_options(); + if (ret) + goto out; + + if (!inspect_info.file_name) { + if (image_type == FACTORY) + ret = wrap_fw(); + else + ret = build_fw(); + } + else + ret = inspect_fw(); + + out: + return ret; + +} diff --git a/tools/firmware-utils/src/mktplinkfw2.c b/tools/firmware-utils/src/mktplinkfw2.c index 3cb5ba083..dead49e7a 100644 --- a/tools/firmware-utils/src/mktplinkfw2.c +++ b/tools/firmware-utils/src/mktplinkfw2.c @@ -124,7 +124,7 @@ char md5salt_boot[MD5SUM_LEN] = { static struct flash_layout layouts[] = { { .id = "4Mmtk", - .fw_max_len = 0x3c0000, + .fw_max_len = 0x3d0000, .kernel_la = 0x80000000, .kernel_ep = 0x80000000, .rootfs_ofs = 0x140000, diff --git a/tools/firmware-utils/src/tplink-safeloader.c b/tools/firmware-utils/src/tplink-safeloader.c index 88e2e88bd..997ffcb09 100644 --- a/tools/firmware-utils/src/tplink-safeloader.c +++ b/tools/firmware-utils/src/tplink-safeloader.c @@ -46,6 +46,7 @@ #include #include +#include #include "md5.h" @@ -139,10 +140,10 @@ static struct device_info boards[] = { {"default-mac", 0x30000, 0x00020}, {"product-info", 0x31100, 0x00100}, {"signature", 0x32000, 0x00400}, - {"os-image", 0x40000, 0x170000}, - {"soft-version", 0x1b0000, 0x00100}, - {"support-list", 0x1b1000, 0x00400}, - {"file-system", 0x1c0000, 0x600000}, + {"os-image", 0x40000, 0x1c0000}, + {"file-system", 0x200000, 0x5b0000}, + {"soft-version", 0x7b0000, 0x00100}, + {"support-list", 0x7b1000, 0x00400}, {"user-config", 0x7c0000, 0x10000}, {"default-config", 0x7d0000, 0x10000}, {"log", 0x7e0000, 0x10000}, @@ -151,7 +152,7 @@ static struct device_info boards[] = { }, .first_sysupgrade_partition = "os-image", - .last_sysupgrade_partition = "file-system", + .last_sysupgrade_partition = "support-list", }, /** Firmware layout for the CPE510/520 */ @@ -177,10 +178,10 @@ static struct device_info boards[] = { {"default-mac", 0x30000, 0x00020}, {"product-info", 0x31100, 0x00100}, {"signature", 0x32000, 0x00400}, - {"os-image", 0x40000, 0x170000}, - {"soft-version", 0x1b0000, 0x00100}, - {"support-list", 0x1b1000, 0x00400}, - {"file-system", 0x1c0000, 0x600000}, + {"os-image", 0x40000, 0x1c0000}, + {"file-system", 0x200000, 0x5b0000}, + {"soft-version", 0x7b0000, 0x00100}, + {"support-list", 0x7b1000, 0x00400}, {"user-config", 0x7c0000, 0x10000}, {"default-config", 0x7d0000, 0x10000}, {"log", 0x7e0000, 0x10000}, @@ -189,7 +190,7 @@ static struct device_info boards[] = { }, .first_sysupgrade_partition = "os-image", - .last_sysupgrade_partition = "file-system", + .last_sysupgrade_partition = "support-list", }, { @@ -209,10 +210,10 @@ static struct device_info boards[] = { {"default-mac", 0x30000, 0x00020}, {"product-info", 0x31100, 0x00100}, {"signature", 0x32000, 0x00400}, - {"os-image", 0x40000, 0x170000}, - {"soft-version", 0x1b0000, 0x00100}, - {"support-list", 0x1b1000, 0x00400}, - {"file-system", 0x1c0000, 0x600000}, + {"os-image", 0x40000, 0x1c0000}, + {"file-system", 0x200000, 0x5b0000}, + {"soft-version", 0x7b0000, 0x00100}, + {"support-list", 0x7b1000, 0x00400}, {"user-config", 0x7c0000, 0x10000}, {"default-config", 0x7d0000, 0x10000}, {"log", 0x7e0000, 0x10000}, @@ -221,7 +222,7 @@ static struct device_info boards[] = { }, .first_sysupgrade_partition = "os-image", - .last_sysupgrade_partition = "file-system", + .last_sysupgrade_partition = "support-list", }, { @@ -241,10 +242,10 @@ static struct device_info boards[] = { {"default-mac", 0x30000, 0x00020}, {"product-info", 0x31100, 0x00100}, {"signature", 0x32000, 0x00400}, - {"os-image", 0x40000, 0x170000}, - {"soft-version", 0x1b0000, 0x00100}, - {"support-list", 0x1b1000, 0x00400}, - {"file-system", 0x1c0000, 0x600000}, + {"os-image", 0x40000, 0x1c0000}, + {"file-system", 0x200000, 0x5b0000}, + {"soft-version", 0x7b0000, 0x00100}, + {"support-list", 0x7b1000, 0x00400}, {"user-config", 0x7c0000, 0x10000}, {"default-config", 0x7d0000, 0x10000}, {"log", 0x7e0000, 0x10000}, @@ -253,7 +254,7 @@ static struct device_info boards[] = { }, .first_sysupgrade_partition = "os-image", - .last_sysupgrade_partition = "file-system", + .last_sysupgrade_partition = "support-list", }, /** Firmware layout for the C2600 */ @@ -450,6 +451,43 @@ static struct device_info boards[] = { .last_sysupgrade_partition = "file-system", }, + /** Firmware layout for the C60v2 */ + { + .id = "ARCHER-C60-V2", + .vendor = "", + .support_list = + "SupportList:\r\n" + "{product_name:Archer C60,product_ver:2.0.0,special_id:42520000}\r\n" + "{product_name:Archer C60,product_ver:2.0.0,special_id:45550000}\r\n" + "{product_name:Archer C60,product_ver:2.0.0,special_id:55530000}\r\n", + .support_trail = '\x00', + .soft_ver = "soft_ver:2.0.0\n", + + .partitions = { + {"factory-boot", 0x00000, 0x1fb00}, + {"default-mac", 0x1fb00, 0x00200}, + {"pin", 0x1fd00, 0x00100}, + {"product-info", 0x1fe00, 0x00100}, + {"device-id", 0x1ff00, 0x00100}, + {"fs-uboot", 0x20000, 0x10000}, + {"os-image", 0x30000, 0x180000}, + {"file-system", 0x1b0000, 0x620000}, + {"soft-version", 0x7d9500, 0x00100}, + {"support-list", 0x7d9600, 0x00100}, + {"extra-para", 0x7d9700, 0x00100}, + {"profile", 0x7d9800, 0x03000}, + {"default-config", 0x7dc800, 0x03000}, + {"partition-table", 0x7df800, 0x00800}, + {"user-config", 0x7e0000, 0x0c000}, + {"certificate", 0x7ec000, 0x04000}, + {"radio", 0x7f0000, 0x10000}, + {NULL, 0, 0} + }, + + .first_sysupgrade_partition = "os-image", + .last_sysupgrade_partition = "file-system", + }, + /** Firmware layout for the C5 */ { .id = "ARCHER-C5-V2", @@ -871,6 +909,49 @@ static struct device_info boards[] = { .last_sysupgrade_partition = "file-system" }, + /** Firmware layout for the RE355 */ + { + .id = "RE355", + .vendor = "", + .support_list = + "SupportList:\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:00000000}\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:55530000}\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:45550000}\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:4A500000}\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:43410000}\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:41550000}\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:4B520000}\r\n" + "{product_name:RE355,product_ver:1.0.0,special_id:55534100}\r\n", + .support_trail = '\x00', + .soft_ver = NULL, + + /** + The flash partition table for RE355; + it is almost the same as the one used by the stock images, + 576KB were moved from file-system to os-image. + */ + .partitions = { + {"fs-uboot", 0x00000, 0x20000}, + {"os-image", 0x20000, 0x180000}, + {"file-system", 0x1a0000, 0x460000}, + {"partition-table", 0x600000, 0x02000}, + {"default-mac", 0x610000, 0x00020}, + {"pin", 0x610100, 0x00020}, + {"product-info", 0x611100, 0x01000}, + {"soft-version", 0x620000, 0x01000}, + {"support-list", 0x621000, 0x01000}, + {"profile", 0x622000, 0x08000}, + {"user-config", 0x630000, 0x10000}, + {"default-config", 0x640000, 0x10000}, + {"radio", 0x7f0000, 0x10000}, + {NULL, 0, 0} + }, + + .first_sysupgrade_partition = "os-image", + .last_sysupgrade_partition = "file-system" + }, + /** Firmware layout for the RE450 */ { .id = "RE450", @@ -1299,6 +1380,7 @@ static void build_image(const char *output, /* Some devices need the extra-para partition to accept the firmware */ if (strcasecmp(info->id, "ARCHER-C25-V1") == 0 || + strcasecmp(info->id, "ARCHER-C60-V2") == 0 || strcasecmp(info->id, "TLWR1043NV5") == 0) { const char mdat[11] = {0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00}; parts[5] = put_data("extra-para", mdat, 11); @@ -1336,6 +1418,9 @@ static void usage(const char *argv0) { "Usage: %s [OPTIONS...]\n" "\n" "Options:\n" + " -h show this help\n" + "\n" + "Create a new image:\n" " -B create image for the board specified with \n" " -k read kernel image from the file \n" " -r read rootfs image from the file \n" @@ -1343,7 +1428,10 @@ static void usage(const char *argv0) { " -V sets the revision number to \n" " -j add jffs2 end-of-filesystem markers\n" " -S create sysupgrade instead of factory image\n" - " -h show this help\n", + "Extract an old image:\n" + " -x extract all oem firmware partition\n" + " -d destination to extract the firmware partition\n" + " -z convert an oem firmware into a sysupgade file. Use -o for output file\n", argv0 ); }; @@ -1360,8 +1448,323 @@ static const struct device_info *find_board(const char *id) return NULL; } +static int add_flash_partition( + struct flash_partition_entry *part_list, + size_t max_entries, + const char *name, + unsigned long base, + unsigned long size) +{ + int ptr; + /* check if the list has a free entry */ + for (ptr = 0; ptr < max_entries; ptr++, part_list++) { + if (part_list->name == NULL && + part_list->base == 0 && + part_list->size == 0) + break; + } + + if (ptr == max_entries) { + error(1, 0, "No free flash part entry available."); + } + + part_list->name = calloc(1, strlen(name) + 1); + memcpy((char *)part_list->name, name, strlen(name)); + part_list->base = base; + part_list->size = size; + + return 0; +} + +/** read the partition table into struct flash_partition_entry */ +static int read_partition_table( + FILE *file, long offset, + struct flash_partition_entry *entries, size_t max_entries, + int type) +{ + char buf[2048]; + char *ptr, *end; + const char *parthdr = NULL; + const char *fwuphdr = "fwup-ptn"; + const char *flashhdr = "partition"; + + /* TODO: search for the partition table */ + + switch(type) { + case 0: + parthdr = fwuphdr; + break; + case 1: + parthdr = flashhdr; + break; + default: + error(1, 0, "Invalid partition table"); + } + + if (fseek(file, offset, SEEK_SET) < 0) + error(1, errno, "Can not seek in the firmware"); + + if (fread(buf, 1, 2048, file) < 0) + error(1, errno, "Can not read fwup-ptn from the firmware"); + + buf[2047] = '\0'; + + /* look for the partition header */ + if (memcmp(buf, parthdr, strlen(parthdr)) != 0) { + fprintf(stderr, "DEBUG: can not find fwuphdr\n"); + return 1; + } + + ptr = buf; + end = buf + sizeof(buf); + while ((ptr + strlen(parthdr)) < end && + memcmp(ptr, parthdr, strlen(parthdr)) == 0) { + char *end_part; + char *end_element; + + char name[32] = { 0 }; + int name_len = 0; + unsigned long base = 0; + unsigned long size = 0; + + end_part = memchr(ptr, '\n', (end - ptr)); + if (end_part == NULL) { + /* in theory this should never happen, because a partition always ends with 0x09, 0x0D, 0x0A */ + break; + } + + for (int i = 0; i <= 4; i++) { + if (end_part <= ptr) + break; + + end_element = memchr(ptr, 0x20, (end_part - ptr)); + if (end_element == NULL) { + error(1, errno, "Ignoring the rest of the partition entries."); + break; + } + + switch (i) { + /* partition header */ + case 0: + ptr = end_element + 1; + continue; + /* name */ + case 1: + name_len = (end_element - ptr) > 31 ? 31 : (end_element - ptr); + strncpy(name, ptr, name_len); + name[name_len] = '\0'; + ptr = end_element + 1; + continue; + + /* string "base" */ + case 2: + ptr = end_element + 1; + continue; + + /* actual base */ + case 3: + base = strtoul(ptr, NULL, 16); + ptr = end_element + 1; + continue; + + /* string "size" */ + case 4: + ptr = end_element + 1; + /* actual size. The last element doesn't have a sepeartor */ + size = strtoul(ptr, NULL, 16); + /* the part ends with 0x09, 0x0d, 0x0a */ + ptr = end_part + 1; + add_flash_partition(entries, max_entries, name, base, size); + continue; + } + } + } + + return 0; +} + +static void write_partition( + FILE *input_file, + size_t firmware_offset, + struct flash_partition_entry *entry, + FILE *output_file) +{ + char buf[4096]; + size_t offset; + + fseek(input_file, entry->base + firmware_offset, SEEK_SET); + + for (offset = 0; sizeof(buf) + offset <= entry->size; offset += sizeof(buf)) { + if (fread(buf, sizeof(buf), 1, input_file) < 0) + error(1, errno, "Can not read partition from input_file"); + + if (fwrite(buf, sizeof(buf), 1, output_file) < 0) + error(1, errno, "Can not write partition to output_file"); + } + /* write last chunk smaller than buffer */ + if (offset < entry->size) { + offset = entry->size - offset; + if (fread(buf, offset, 1, input_file) < 0) + error(1, errno, "Can not read partition from input_file"); + if (fwrite(buf, offset, 1, output_file) < 0) + error(1, errno, "Can not write partition to output_file"); + } +} + +static int extract_firmware_partition(FILE *input_file, size_t firmware_offset, struct flash_partition_entry *entry, const char *output_directory) +{ + FILE *output_file; + char output[PATH_MAX]; + + snprintf(output, PATH_MAX, "%s/%s", output_directory, entry->name); + output_file = fopen(output, "wb+"); + if (output_file == NULL) { + error(1, errno, "Can not open output file %s", output); + } + + write_partition(input_file, firmware_offset, entry, output_file); + + fclose(output_file); + + return 0; +} + +/** extract all partitions from the firmware file */ +static int extract_firmware(const char *input, const char *output_directory) +{ + struct flash_partition_entry entries[16] = { 0 }; + size_t max_entries = 16; + size_t firmware_offset = 0x1014; + FILE *input_file; + + struct stat statbuf; + + /* check input file */ + if (stat(input, &statbuf)) { + error(1, errno, "Can not read input firmware %s", input); + } + + /* check if output directory exists */ + if (stat(output_directory, &statbuf)) { + error(1, errno, "Failed to stat output directory %s", output_directory); + } + + if ((statbuf.st_mode & S_IFMT) != S_IFDIR) { + error(1, errno, "Given output directory is not a directory %s", output_directory); + } + + input_file = fopen(input, "rb"); + + if (read_partition_table(input_file, firmware_offset, entries, 16, 0) != 0) { + error(1, 0, "Error can not read the partition table (fwup-ptn)"); + } + + for (int i = 0; i < max_entries; i++) { + if (entries[i].name == NULL && + entries[i].base == 0 && + entries[i].size == 0) + continue; + + extract_firmware_partition(input_file, firmware_offset, &entries[i], output_directory); + } + + return 0; +} + +static struct flash_partition_entry *find_partition( + struct flash_partition_entry *entries, size_t max_entries, + const char *name, const char *error_msg) +{ + for (int i = 0; i < max_entries; i++, entries++) { + if (strcmp(entries->name, name) == 0) + return entries; + } + + error(1, 0, "%s", error_msg); + return NULL; +} + +static void write_ff(FILE *output_file, size_t size) +{ + char buf[4096]; + int offset; + + memset(buf, 0xff, sizeof(buf)); + + for (offset = 0; offset + sizeof(buf) < size ; offset += sizeof(buf)) { + if (fwrite(buf, sizeof(buf), 1, output_file) < 0) + error(1, errno, "Can not write 0xff to output_file"); + } + + /* write last chunk smaller than buffer */ + if (offset < size) { + offset = size - offset; + if (fwrite(buf, offset, 1, output_file) < 0) + error(1, errno, "Can not write partition to output_file"); + } +} + +static void convert_firmware(const char *input, const char *output) +{ + struct flash_partition_entry fwup[MAX_PARTITIONS] = { 0 }; + struct flash_partition_entry flash[MAX_PARTITIONS] = { 0 }; + struct flash_partition_entry *fwup_os_image = NULL, *fwup_file_system = NULL; + struct flash_partition_entry *flash_os_image = NULL, *flash_file_system = NULL; + struct flash_partition_entry *fwup_partition_table = NULL; + size_t firmware_offset = 0x1014; + FILE *input_file, *output_file; + + struct stat statbuf; + + /* check input file */ + if (stat(input, &statbuf)) { + error(1, errno, "Can not read input firmware %s", input); + } + + input_file = fopen(input, "rb"); + if (!input_file) + error(1, 0, "Can not open input firmware %s", input); + + output_file = fopen(output, "wb"); + if (!output_file) + error(1, 0, "Can not open output firmware %s", output); + + if (read_partition_table(input_file, firmware_offset, fwup, MAX_PARTITIONS, 0) != 0) { + error(1, 0, "Error can not read the partition table (fwup-ptn)"); + } + + fwup_os_image = find_partition(fwup, MAX_PARTITIONS, + "os-image", "Error can not find os-image partition (fwup)"); + fwup_file_system = find_partition(fwup, MAX_PARTITIONS, + "file-system", "Error can not find file-system partition (fwup)"); + fwup_partition_table = find_partition(fwup, MAX_PARTITIONS, + "partition-table", "Error can not find partition-table partition"); + + /* the flash partition table has a 0x00000004 magic haeder */ + if (read_partition_table(input_file, firmware_offset + fwup_partition_table->base + 4, flash, MAX_PARTITIONS, 1) != 0) + error(1, 0, "Error can not read the partition table (flash)"); + + flash_os_image = find_partition(flash, MAX_PARTITIONS, + "os-image", "Error can not find os-image partition (flash)"); + flash_file_system = find_partition(flash, MAX_PARTITIONS, + "file-system", "Error can not find file-system partition (flash)"); + + /* write os_image to 0x0 */ + write_partition(input_file, firmware_offset, fwup_os_image, output_file); + write_ff(output_file, flash_os_image->size - fwup_os_image->size); + + /* write file-system behind os_image */ + fseek(output_file, flash_file_system->base - flash_os_image->base, SEEK_SET); + write_partition(input_file, firmware_offset, fwup_file_system, output_file); + write_ff(output_file, flash_file_system->size - fwup_file_system->size); + + fclose(output_file); + fclose(input_file); +} + int main(int argc, char *argv[]) { const char *board = NULL, *kernel_image = NULL, *rootfs_image = NULL, *output = NULL; + const char *extract_image = NULL, *output_directory = NULL, *convert_image = NULL; bool add_jffs2_eof = false, sysupgrade = false; unsigned rev = 0; const struct device_info *info; @@ -1370,7 +1773,7 @@ int main(int argc, char *argv[]) { while (true) { int c; - c = getopt(argc, argv, "B:k:r:o:V:jSh"); + c = getopt(argc, argv, "B:k:r:o:V:jSh:x:d:z:"); if (c == -1) break; @@ -1407,27 +1810,51 @@ int main(int argc, char *argv[]) { usage(argv[0]); return 0; + case 'd': + output_directory = optarg; + break; + + case 'x': + extract_image = optarg; + break; + + case 'z': + convert_image = optarg; + break; + default: usage(argv[0]); return 1; } } - if (!board) - error(1, 0, "no board has been specified"); - if (!kernel_image) - error(1, 0, "no kernel image has been specified"); - if (!rootfs_image) - error(1, 0, "no rootfs image has been specified"); - if (!output) - error(1, 0, "no output filename has been specified"); + if (extract_image || output_directory) { + if (!extract_image) + error(1, 0, "No factory/oem image given via -x . Output directory is only valid with -x"); + if (!output_directory) + error(1, 0, "Can not extract an image without output directory. Use -d "); + extract_firmware(extract_image, output_directory); + } else if (convert_image) { + if (!output) + error(1, 0, "Can not convert a factory/oem image into sysupgrade image without output file. Use -o "); + convert_firmware(convert_image, output); + } else { + if (!board) + error(1, 0, "no board has been specified"); + if (!kernel_image) + error(1, 0, "no kernel image has been specified"); + if (!rootfs_image) + error(1, 0, "no rootfs image has been specified"); + if (!output) + error(1, 0, "no output filename has been specified"); - info = find_board(board); + info = find_board(board); - if (info == NULL) - error(1, 0, "unsupported board %s", board); + if (info == NULL) + error(1, 0, "unsupported board %s", board); - build_image(output, kernel_image, rootfs_image, rev, add_jffs2_eof, sysupgrade, info); + build_image(output, kernel_image, rootfs_image, rev, add_jffs2_eof, sysupgrade, info); + } return 0; } diff --git a/tools/gptfdisk/Makefile b/tools/gptfdisk/Makefile deleted file mode 100644 index dc5a5eb0d..000000000 --- a/tools/gptfdisk/Makefile +++ /dev/null @@ -1,37 +0,0 @@ -include $(TOPDIR)/rules.mk - -PKG_NAME:=gptfdisk -PKG_VERSION:=1.0.1 - -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=http://www.rodsbooks.com/gdisk/ -PKG_HASH:=864c8aee2efdda50346804d7e6230407d5f42a8ae754df70404dd8b2fdfaeac7 - -HOST_BUILD_PARALLEL := 1 - -include $(INCLUDE_DIR)/host-build.mk - -HOST_CONFIGURE_VARS += \ - MAKEFLAGS="$(HOST_JOBS)" \ - CXXFLAGS="$(HOST_CFLAGS)" - -HOST_CONFIGURE_ARGS := \ - $(if $(MAKE_JOBSERVER),--parallel="$(MAKE_JOBSERVER)") \ - --prefix=$(STAGING_DIR_HOST) - -define Host/Compile - $(MAKE) LDFLAGS="$(HOST_LDFLAGS)" CXXFLAGS="$(HOST_CFLAGS) -I$(STAGING_DIR_HOST)/include/e2fsprogs" -C $(HOST_BUILD_DIR) sgdisk -endef - -define Host/Install - $(INSTALL_BIN) $(HOST_BUILD_DIR)/sgdisk $(STAGING_DIR_HOST)/bin/ -endef - -define Host/Clean - rm -f $(STAGING_DIR_HOST)/bin/sgdisk -endef - -HOSTCC := $(HOSTCC_NOCACHE) -HOSTCXX := $(HOSTCXX_NOCACHE) - -$(eval $(call HostBuild)) diff --git a/tools/libressl/Makefile b/tools/libressl/Makefile index 5679320fb..a068a7c83 100644 --- a/tools/libressl/Makefile +++ b/tools/libressl/Makefile @@ -8,8 +8,8 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libressl -PKG_VERSION:=2.5.4 -PKG_HASH:=107a5b522fbb8318d4c3be668075e5e607296f0a9255d71674caa94571336efa +PKG_VERSION:=2.6.4 +PKG_HASH:=638a20c2f9e99ee283a841cd787ab4d846d1880e180c4e96904fc327d419d11f PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz diff --git a/tools/make-ext4fs/Makefile b/tools/make-ext4fs/Makefile index a886dc0a7..f140101c8 100644 --- a/tools/make-ext4fs/Makefile +++ b/tools/make-ext4fs/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=make-ext4fs -PKG_SOURCE_URL=$(LEDE_GIT)/project/make_ext4fs.git +PKG_SOURCE_URL=$(PROJECT_GIT)/project/make_ext4fs.git PKG_SOURCE_PROTO:=git PKG_SOURCE_DATE:=2016-08-14 PKG_SOURCE_VERSION:=484903e4332be6c317f531b008cb2a841a18c506 diff --git a/tools/mkimage/Makefile b/tools/mkimage/Makefile index bfe60993e..d0ff5f7e3 100644 --- a/tools/mkimage/Makefile +++ b/tools/mkimage/Makefile @@ -7,14 +7,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mkimage -PKG_VERSION:=2014.10 +PKG_VERSION:=2018.03 PKG_SOURCE:=u-boot-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=\ http://mirror2.openwrt.org/sources \ ftp://ftp.denx.de/pub/u-boot -PKG_HASH:=d3b132a7a9b3f3182b7aad71c2dfbd4fc15bea83e12c76134eb3ffefc07d1c71 -PKG_CAT:=bzcat +PKG_HASH:=7e7477534409d5368eb1371ffde6820f0f79780a1a1f676161c48442cb303dfd HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/u-boot-$(PKG_VERSION) @@ -22,25 +21,28 @@ include $(INCLUDE_DIR)/host-build.mk define Host/Prepare $(Host/Prepare/Default) - rm -f \ - $(HOST_BUILD_DIR)/include/errno.h \ - $(HOST_BUILD_DIR)/include/malloc.h \ - $(HOST_BUILD_DIR)/tools/.depend - touch $(HOST_BUILD_DIR)/include/config.mk - touch $(HOST_BUILD_DIR)/include/config.h + mkdir -p $(HOST_BUILD_DIR)/include/config + touch $(HOST_BUILD_DIR)/include/config/auto.conf endef define Host/Compile - $(MAKE) -C $(HOST_BUILD_DIR) defconfig HOSTCFLAGS="$(HOST_CPPFLAGS) $(HOST_CFLAGS)" HOSTLDFLAGS="$(HOST_LDFLAGS)" HOST_LOADLIBES="$$$$(pkg-config --static --libs libcrypto)" - $(MAKE) -C $(HOST_BUILD_DIR) tools-only HOSTCFLAGS="$(HOST_CPPFLAGS) $(HOST_CFLAGS)" HOSTLDFLAGS="$(HOST_LDFLAGS)" HOST_LOADLIBES="$$$$(pkg-config --static --libs libcrypto)" + $(MAKE) -C $(HOST_BUILD_DIR) \ + HOSTCFLAGS="$(HOST_CFLAGS)" \ + HOSTLDFLAGS="$(HOST_LDFLAGS)" \ + no-dot-config-targets=tools-only \ + CONFIG_MKIMAGE_DTC_PATH=dtc \ + CONFIG_FIT_SIGNATURE=y \ + tools-only endef define Host/Install $(CP) $(HOST_BUILD_DIR)/tools/mkimage $(STAGING_DIR_HOST)/bin/ + $(CP) $(HOST_BUILD_DIR)/tools/mkenvimage $(STAGING_DIR_HOST)/bin/ endef define Host/Clean rm -f $(STAGING_DIR_HOST)/bin/mkimage + rm -f $(STAGING_DIR_HOST)/bin/mkenvimage endef $(eval $(call HostBuild)) diff --git a/tools/mkimage/patches/010-freebsd-ulong-fix.patch b/tools/mkimage/patches/010-freebsd-ulong-fix.patch index 1101e72d1..7d891657f 100644 --- a/tools/mkimage/patches/010-freebsd-ulong-fix.patch +++ b/tools/mkimage/patches/010-freebsd-ulong-fix.patch @@ -1,6 +1,6 @@ --- a/include/image.h +++ b/include/image.h -@@ -44,6 +44,10 @@ struct lmb; +@@ -51,6 +51,10 @@ struct lmb; #endif /* USE_HOSTCC */ @@ -8,6 +8,6 @@ +#define ulong unsigned long +#endif + - #if defined(CONFIG_FIT) + #if IMAGE_ENABLE_FIT #include - #include + #include diff --git a/tools/mkimage/patches/030-allow-to-use-different-magic.patch b/tools/mkimage/patches/030-allow-to-use-different-magic.patch index dcab48894..c6de9a0aa 100644 --- a/tools/mkimage/patches/030-allow-to-use-different-magic.patch +++ b/tools/mkimage/patches/030-allow-to-use-different-magic.patch @@ -1,6 +1,6 @@ --- a/tools/mkimage.c +++ b/tools/mkimage.c -@@ -24,6 +24,7 @@ struct image_tool_params params = { +@@ -21,6 +21,7 @@ static struct image_tool_params params = .arch = IH_ARCH_PPC, .type = IH_TYPE_KERNEL, .comp = IH_COMP_GZIP, @@ -8,52 +8,58 @@ .dtc = MKIMAGE_DEFAULT_DTC_OPTIONS, .imagename = "", .imagename2 = "", -@@ -168,6 +169,16 @@ main (int argc, char **argv) - genimg_get_comp_id (*++argv)) < 0) - usage (); - goto NXTARG; -+ case 'M': -+ if (--argc <=0) -+ usage (); -+ params.magic = strtoul (*++argv, &ptr, 16); -+ if (*ptr) { -+ fprintf (stderr, -+ "%s: invalid magic %s\n", -+ params.cmdname, *argv); -+ } -+ goto NXTARG; - case 'D': - if (--argc <= 0) - usage (); -@@ -623,12 +634,13 @@ static void usage(void) - fprintf (stderr, "Usage: %s -l image\n" +@@ -77,11 +78,12 @@ static void usage(const char *msg) " -l ==> list image header information\n", params.cmdname); -- fprintf (stderr, " %s [-x] -A arch -O os -T type -C comp " -+ fprintf (stderr, " %s [-x] -A arch -O os -T type -C comp -M magic " - "-a addr -e ep -n name -d data_file[:data_file...] image\n" - " -A ==> set architecture to 'arch'\n" - " -O ==> set operating system to 'os'\n" - " -T ==> set image type to 'type'\n" - " -C ==> set compression type 'comp'\n" -+ " -M ==> set image magic to 'magic'\n" - " -a ==> set load address to 'addr' (hex)\n" - " -e ==> set entry point to 'ep' (hex)\n" - " -n ==> set image name to 'name'\n" + fprintf(stderr, +- " %s [-x] -A arch -O os -T type -C comp -a addr -e ep -n name -d data_file[:data_file...] image\n" ++ " %s [-x] -A arch -O os -T type -C comp -M magic -a addr -e ep -n name -d data_file[:data_file...] image\n" + " -A ==> set architecture to 'arch'\n" + " -O ==> set operating system to 'os'\n" + " -T ==> set image type to 'type'\n" + " -C ==> set compression type 'comp'\n" ++ " -M ==> set image magic to 'magic'\n" + " -a ==> set load address to 'addr' (hex)\n" + " -e ==> set entry point to 'ep' (hex)\n" + " -n ==> set image name to 'name'\n" +@@ -144,7 +146,7 @@ static void process_args(int argc, char + int opt; + + while ((opt = getopt(argc, argv, +- "a:A:b:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qsT:vVx")) != -1) { ++ "a:A:b:c:C:d:D:e:Ef:Fk:i:K:lM:n:N:p:O:rR:qsT:vVx")) != -1) { + switch (opt) { + case 'a': + params.addr = strtoull(optarg, &ptr, 16); +@@ -222,6 +224,14 @@ static void process_args(int argc, char + case 'l': + params.lflag = 1; + break; ++ case 'M': ++ params.magic = strtoull(optarg, &ptr, 16); ++ if (*ptr) { ++ fprintf(stderr, "%s: invalid magic %s\n", ++ params.cmdname, optarg); ++ exit(EXIT_FAILURE); ++ } ++ break; + case 'n': + params.imagename = optarg; + break; --- a/tools/default_image.c +++ b/tools/default_image.c -@@ -98,7 +98,7 @@ static void image_set_header(void *ptr, - sbuf->st_size - sizeof(image_header_t)); +@@ -106,7 +106,7 @@ static void image_set_header(void *ptr, + imagesize = sbuf->st_size - sizeof(image_header_t); /* Build new header */ - image_set_magic(hdr, IH_MAGIC); + image_set_magic(hdr, params->magic); - image_set_time(hdr, sbuf->st_mtime); - image_set_size(hdr, sbuf->st_size - sizeof(image_header_t)); + image_set_time(hdr, time); + image_set_size(hdr, imagesize); image_set_load(hdr, params->addr); --- a/tools/imagetool.h +++ b/tools/imagetool.h -@@ -44,6 +44,7 @@ struct image_tool_params { +@@ -54,6 +54,7 @@ struct image_tool_params { int arch; int type; int comp; diff --git a/tools/mkimage/patches/040-include_order.patch b/tools/mkimage/patches/040-include_order.patch deleted file mode 100644 index 3b9ecc6bd..000000000 --- a/tools/mkimage/patches/040-include_order.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/tools/Makefile -+++ b/tools/Makefile -@@ -194,7 +194,7 @@ endif # !LOGO_BMP - # Define _GNU_SOURCE to obtain the getline prototype from stdio.h - # - HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \ -- $(patsubst -I%,-idirafter%, $(filter -I%, $(UBOOTINCLUDE))) \ -+ -I$(srctree)/include \ - -I$(srctree)/lib/libfdt \ - -I$(srctree)/tools \ - -DCONFIG_SYS_TEXT_BASE=$(CONFIG_SYS_TEXT_BASE) \ diff --git a/tools/mkimage/patches/050-image_h_portability.patch b/tools/mkimage/patches/050-image_h_portability.patch index b3ad27388..dabab3990 100644 --- a/tools/mkimage/patches/050-image_h_portability.patch +++ b/tools/mkimage/patches/050-image_h_portability.patch @@ -8,7 +8,7 @@ /* Define this to avoid #ifdefs later on */ struct lmb; -@@ -258,13 +257,13 @@ struct lmb; +@@ -308,13 +307,13 @@ enum { * all data in network byte order (aka natural aka bigendian). */ typedef struct image_header { diff --git a/tools/mkimage/patches/060-remove_kernel_includes.patch b/tools/mkimage/patches/060-remove_kernel_includes.patch index fa533cd22..e61d8cc49 100644 --- a/tools/mkimage/patches/060-remove_kernel_includes.patch +++ b/tools/mkimage/patches/060-remove_kernel_includes.patch @@ -1,6 +1,6 @@ --- a/include/compiler.h +++ b/include/compiler.h -@@ -58,6 +58,11 @@ typedef uint8_t __u8; +@@ -66,6 +66,11 @@ typedef uint8_t __u8; typedef uint16_t __u16; typedef uint32_t __u32; typedef unsigned int uint; diff --git a/tools/mkimage/patches/070-socfpgaimage_portability.patch b/tools/mkimage/patches/070-socfpgaimage_portability.patch deleted file mode 100644 index e273c275d..000000000 --- a/tools/mkimage/patches/070-socfpgaimage_portability.patch +++ /dev/null @@ -1,52 +0,0 @@ ---- a/tools/socfpgaimage.c -+++ b/tools/socfpgaimage.c -@@ -74,12 +74,12 @@ static uint16_t hdr_checksum(struct socf - static void build_header(uint8_t *buf, uint8_t version, uint8_t flags, - uint16_t length_bytes) - { -- header.validation = htole32(VALIDATION_WORD); -+ header.validation = cpu_to_le32(VALIDATION_WORD); - header.version = version; - header.flags = flags; -- header.length_u32 = htole16(length_bytes/4); -+ header.length_u32 = cpu_to_le16(length_bytes/4); - header.zero = 0; -- header.checksum = htole16(hdr_checksum(&header)); -+ header.checksum = cpu_to_le16(hdr_checksum(&header)); - - memcpy(buf, &header, sizeof(header)); - } -@@ -92,12 +92,12 @@ static int verify_header(const uint8_t * - { - memcpy(&header, buf, sizeof(header)); - -- if (le32toh(header.validation) != VALIDATION_WORD) -+ if (le32_to_cpu(header.validation) != VALIDATION_WORD) - return -1; -- if (le16toh(header.checksum) != hdr_checksum(&header)) -+ if (le16_to_cpu(header.checksum) != hdr_checksum(&header)) - return -1; - -- return le16toh(header.length_u32) * 4; -+ return le16_to_cpu(header.length_u32) * 4; - } - - /* Sign the buffer and return the signed buffer size */ -@@ -116,7 +116,7 @@ static int sign_buffer(uint8_t *buf, - /* Calculate and apply the CRC */ - calc_crc = ~pbl_crc32(0, (char *)buf, len); - -- *((uint32_t *)(buf + len)) = htole32(calc_crc); -+ *((uint32_t *)(buf + len)) = cpu_to_le32(calc_crc); - - if (!pad_64k) - return len + 4; -@@ -150,7 +150,7 @@ static int verify_buffer(const uint8_t * - - calc_crc = ~pbl_crc32(0, (const char *)buf, len); - -- buf_crc = le32toh(*((uint32_t *)(buf + len))); -+ buf_crc = le32_to_cpu(*((uint32_t *)(buf + len))); - - if (buf_crc != calc_crc) { - fprintf(stderr, "CRC32 does not match (%08x != %08x)\n", diff --git a/tools/mkimage/patches/080-remove_compiler_check.patch b/tools/mkimage/patches/080-remove_compiler_check.patch index 3e71ad5b0..5e0792f25 100644 --- a/tools/mkimage/patches/080-remove_compiler_check.patch +++ b/tools/mkimage/patches/080-remove_compiler_check.patch @@ -1,8 +1,8 @@ ---- a/include/linux/compiler-gcc4.h -+++ b/include/linux/compiler-gcc4.h -@@ -2,13 +2,6 @@ - #error "Please don't include directly, include instead." - #endif +--- a/include/linux/compiler-gcc.h ++++ b/include/linux/compiler-gcc.h +@@ -146,13 +146,6 @@ + + #if GCC_VERSION >= 40000 -/* GCC 4.1.[01] miscompiles __weak */ -#ifdef __KERNEL__ @@ -12,5 +12,5 @@ -#endif - #define __used __attribute__((__used__)) - #define __must_check __attribute__((warn_unused_result)) - #define __compiler_offsetof(a,b) __builtin_offsetof(a,b) + #define __compiler_offsetof(a, b) \ + __builtin_offsetof(a, b) diff --git a/tools/mkimage/patches/090-reproducible-SOURCE_DATE_EPOCH.patch b/tools/mkimage/patches/090-reproducible-SOURCE_DATE_EPOCH.patch deleted file mode 100644 index c238fd62e..000000000 --- a/tools/mkimage/patches/090-reproducible-SOURCE_DATE_EPOCH.patch +++ /dev/null @@ -1,82 +0,0 @@ -From f3f431a712729a1af94d01bd1bfde17a252ff02c Mon Sep 17 00:00:00 2001 -From: Paul Kocialkowski -Date: Sun, 26 Jul 2015 18:48:15 +0200 -Subject: [PATCH] Reproducible U-Boot build support, using SOURCE_DATE_EPOCH - -In order to achieve reproducible builds in U-Boot, timestamps that are defined -at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment -variable allows setting a fixed value for those timestamps. - -Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be -built reproducibly. This is the case for e.g. sunxi devices. - -However, some other devices might need some more tweaks, especially regarding -the image generation tools. - -Signed-off-by: Paul Kocialkowski ---- - Makefile | 7 ++++--- - README | 12 ++++++++++++ - tools/default_image.c | 21 ++++++++++++++++++++- - 3 files changed, 36 insertions(+), 4 deletions(-) - ---- a/README -+++ b/README -@@ -4928,6 +4928,18 @@ within that device. - normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the - virtual address in NOR flash. - -+Reproducible builds -+------------------- -+ -+In order to achieve reproducible builds, timestamps used in the U-Boot build -+process have to be set to a fixed value. -+ -+This is done using the SOURCE_DATE_EPOCH environment variable. -+SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration -+option for U-Boot or an environment variable in U-Boot. -+ -+SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC. -+ - Building the Software: - ====================== - ---- a/tools/default_image.c -+++ b/tools/default_image.c -@@ -89,6 +89,9 @@ static void image_set_header(void *ptr, - struct image_tool_params *params) - { - uint32_t checksum; -+ char *source_date_epoch; -+ struct tm *time_universal; -+ time_t time; - - image_header_t * hdr = (image_header_t *)ptr; - -@@ -97,9 +100,25 @@ static void image_set_header(void *ptr, - sizeof(image_header_t)), - sbuf->st_size - sizeof(image_header_t)); - -+ source_date_epoch = getenv("SOURCE_DATE_EPOCH"); -+ if (source_date_epoch != NULL) { -+ time = (time_t) strtol(source_date_epoch, NULL, 10); -+ -+ time_universal = gmtime(&time); -+ if (time_universal == NULL) { -+ fprintf(stderr, "%s: SOURCE_DATE_EPOCH is not valid\n", -+ __func__); -+ time = 0; -+ } else { -+ time = mktime(time_universal); -+ } -+ } else { -+ time = sbuf->st_mtime; -+ } -+ - /* Build new header */ - image_set_magic(hdr, params->magic); -- image_set_time(hdr, sbuf->st_mtime); -+ image_set_time(hdr, time); - image_set_size(hdr, sbuf->st_size - sizeof(image_header_t)); - image_set_load(hdr, params->addr); - image_set_ep(hdr, params->ep); diff --git a/tools/mkimage/patches/100-freebsd-compat.patch b/tools/mkimage/patches/100-freebsd-compat.patch index e014af570..156728571 100644 --- a/tools/mkimage/patches/100-freebsd-compat.patch +++ b/tools/mkimage/patches/100-freebsd-compat.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -584,7 +584,10 @@ UBOOTINCLUDE := \ +@@ -634,7 +634,10 @@ UBOOTINCLUDE := \ -I$(srctree)/arch/$(ARCH)/include \ -include $(srctree)/include/linux/kconfig.h diff --git a/tools/mkimage/patches/110-fix_musl_build.patch b/tools/mkimage/patches/110-fix_musl_build.patch deleted file mode 100644 index 13f7ab043..000000000 --- a/tools/mkimage/patches/110-fix_musl_build.patch +++ /dev/null @@ -1,67 +0,0 @@ -From: Jörg Krause -Date: Wed, 22 Apr 2015 19:36:22 +0000 (+0200) -Subject: Fix musl build -X-Git-Tag: v2015.07-rc2~281 -X-Git-Url: http://git.denx.de/?p=u-boot.git;a=commitdiff_plain;h=26e355d131a6b56ea78a156c1cee4f6ba0500b37;hp=1cdd9412002000aafcfb6f10cd02069adc66ba49 - -Fix musl build - -This patch fixes cross-compiling U-Boot tools with the musl C library: - * including is needed for ulong - * defining _GNU_SOURCE is needed for loff_t - -Tested for target at91sam9261ek_dataflash_cs3. - -Signed-off-by: Jörg Krause -Cc: Tom Rini ---- - -diff --git a/include/image.h b/include/image.h -index 3844be6..60b924a 100644 ---- a/include/image.h -+++ b/include/image.h -@@ -23,6 +23,7 @@ - struct lmb; - - #ifdef USE_HOSTCC -+#include - - /* new uImage format support enabled on host */ - #define CONFIG_FIT 1 -diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c -index 1173eea..daa02a7 100644 ---- a/tools/env/fw_env.c -+++ b/tools/env/fw_env.c -@@ -8,6 +8,8 @@ - * SPDX-License-Identifier: GPL-2.0+ - */ - -+#define _GNU_SOURCE -+ - #include - #include - #include -diff --git a/tools/imagetool.h b/tools/imagetool.h -index 3e15b4e..b7874f4 100644 ---- a/tools/imagetool.h -+++ b/tools/imagetool.h -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/tools/proftool.c b/tools/proftool.c -index 3482951..9ce7a77 100644 ---- a/tools/proftool.c -+++ b/tools/proftool.c -@@ -16,6 +16,7 @@ - #include - #include - #include -+#include - - #include - #include diff --git a/tools/mkimage/patches/200-rsa-sign-add-support-for-libressl.patch b/tools/mkimage/patches/200-rsa-sign-add-support-for-libressl.patch new file mode 100644 index 000000000..29058e22b --- /dev/null +++ b/tools/mkimage/patches/200-rsa-sign-add-support-for-libressl.patch @@ -0,0 +1,68 @@ +From 69176c8602e29f4bd30457240374800d88dc39ed Mon Sep 17 00:00:00 2001 +From: Hauke Mehrtens +Date: Sat, 14 Apr 2018 22:39:34 +0200 +Subject: [PATCH] rsa-sign: add support for libressl + +--- + lib/rsa/rsa-sign.c | 15 +++++++++------ + 1 file changed, 9 insertions(+), 6 deletions(-) + +--- a/lib/rsa/rsa-sign.c ++++ b/lib/rsa/rsa-sign.c +@@ -21,7 +21,8 @@ + #define HAVE_ERR_REMOVE_THREAD_STATE + #endif + +-#if OPENSSL_VERSION_NUMBER < 0x10100000L ++#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ ++ (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x2070000fL) + static void RSA_get0_key(const RSA *r, + const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) + { +@@ -300,7 +301,8 @@ static int rsa_init(void) + { + int ret; + +-#if OPENSSL_VERSION_NUMBER < 0x10100000L ++#if OPENSSL_VERSION_NUMBER < 0x10100000L || \ ++ (defined(LIBRESSL_VERSION_NUMBER) && LIBRESSL_VERSION_NUMBER < 0x2070000fL) + ret = SSL_library_init(); + #else + ret = OPENSSL_init_ssl(0, NULL); +@@ -309,7 +311,7 @@ static int rsa_init(void) + fprintf(stderr, "Failure to init SSL library\n"); + return -1; + } +-#if OPENSSL_VERSION_NUMBER < 0x10100000L ++#if OPENSSL_VERSION_NUMBER < 0x10100000L || defined(LIBRESSL_VERSION_NUMBER) + SSL_load_error_strings(); + + OpenSSL_add_all_algorithms(); +@@ -355,7 +357,7 @@ err_set_rsa: + err_engine_init: + ENGINE_free(e); + err_engine_by_id: +-#if OPENSSL_VERSION_NUMBER < 0x10100000L ++#if OPENSSL_VERSION_NUMBER < 0x10100000L || defined(LIBRESSL_VERSION_NUMBER) + ENGINE_cleanup(); + #endif + return ret; +@@ -363,7 +365,7 @@ err_engine_by_id: + + static void rsa_remove(void) + { +-#if OPENSSL_VERSION_NUMBER < 0x10100000L ++#if OPENSSL_VERSION_NUMBER < 0x10100000L || defined(LIBRESSL_VERSION_NUMBER) + CRYPTO_cleanup_all_ex_data(); + ERR_free_strings(); + #ifdef HAVE_ERR_REMOVE_THREAD_STATE +@@ -433,7 +435,8 @@ static int rsa_sign_with_key(RSA *rsa, s + ret = rsa_err("Could not obtain signature"); + goto err_sign; + } +- #if OPENSSL_VERSION_NUMBER < 0x10100000L ++ #if OPENSSL_VERSION_NUMBER < 0x10100000L || \ ++ defined(LIBRESSL_VERSION_NUMBER) + EVP_MD_CTX_cleanup(context); + #else + EVP_MD_CTX_reset(context); diff --git a/tools/mkimage/patches/210-link-libcrypto-static.patch b/tools/mkimage/patches/210-link-libcrypto-static.patch new file mode 100644 index 000000000..66412ce43 --- /dev/null +++ b/tools/mkimage/patches/210-link-libcrypto-static.patch @@ -0,0 +1,14 @@ +OpenWrt links the libressl statically against mkimage, make sure all the +needed dependencies are added too. + +--- a/tools/Makefile ++++ b/tools/Makefile +@@ -145,7 +145,7 @@ endif + # MXSImage needs LibSSL + ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_ARMADA_38X)$(CONFIG_ARMADA_39X)$(CONFIG_FIT_SIGNATURE),) + HOSTLOADLIBES_mkimage += \ +- $(shell pkg-config --libs libssl libcrypto 2> /dev/null || echo "-lssl -lcrypto") ++ $(shell pkg-config --libs --static libssl libcrypto 2> /dev/null || echo "-lssl -lcrypto") + + # OS X deprecate openssl in favour of CommonCrypto, supress deprecation + # warnings on those systems diff --git a/tools/mkimage/patches/210-openssl-1.1.x-compat.patch b/tools/mkimage/patches/210-openssl-1.1.x-compat.patch deleted file mode 100644 index b1bc08856..000000000 --- a/tools/mkimage/patches/210-openssl-1.1.x-compat.patch +++ /dev/null @@ -1,97 +0,0 @@ ---- a/lib/rsa/rsa-sign.c -+++ b/lib/rsa/rsa-sign.c -@@ -15,10 +15,25 @@ - #include - #include - --#if OPENSSL_VERSION_NUMBER >= 0x10000000L -+#if OPENSSL_VERSION_NUMBER < 0x10000000L -+#define HAVE_ERR_REMOVE_STATE -+#elif OPENSSL_VERSION_NUMBER < 0x10100000L - #define HAVE_ERR_REMOVE_THREAD_STATE - #endif - -+#if (OPENSSL_VERSION_NUMBER < 0x10100005L) || defined(LIBRESSL_VERSION_NUMBER) -+static void RSA_get0_key(const RSA *r, -+ const BIGNUM **n, const BIGNUM **e, const BIGNUM **d) -+{ -+ if (n != NULL) -+ *n = r->n; -+ if (e != NULL) -+ *e = r->e; -+ if (d != NULL) -+ *d = r->d; -+} -+#endif -+ - static int rsa_err(const char *msg) - { - unsigned long sslErr = ERR_get_error(); -@@ -154,7 +169,8 @@ static void rsa_remove(void) - ERR_free_strings(); - #ifdef HAVE_ERR_REMOVE_THREAD_STATE - ERR_remove_thread_state(NULL); --#else -+#endif -+#ifdef HAVE_ERR_REMOVE_STATE - ERR_remove_state(0); - #endif - EVP_cleanup(); -@@ -210,7 +226,6 @@ static int rsa_sign_with_key(RSA *rsa, s - ret = rsa_err("Could not obtain signature"); - goto err_sign; - } -- EVP_MD_CTX_cleanup(context); - EVP_MD_CTX_destroy(context); - EVP_PKEY_free(key); - -@@ -270,23 +285,26 @@ static int rsa_get_exponent(RSA *key, ui - BIGNUM *bn_te; - uint64_t te; - -+ const BIGNUM *bn_e; -+ RSA_get0_key(key, NULL, &bn_e, NULL); -+ - ret = -EINVAL; - bn_te = NULL; - - if (!e) - goto cleanup; - -- if (BN_num_bits(key->e) > 64) -+ if (BN_num_bits(bn_e) > 64) - goto cleanup; - -- *e = BN_get_word(key->e); -+ *e = BN_get_word(bn_e); - -- if (BN_num_bits(key->e) < 33) { -+ if (BN_num_bits(bn_e) < 33) { - ret = 0; - goto cleanup; - } - -- bn_te = BN_dup(key->e); -+ bn_te = BN_dup(bn_e); - if (!bn_te) - goto cleanup; - -@@ -319,6 +337,9 @@ int rsa_get_params(RSA *key, uint64_t *e - BN_CTX *bn_ctx = BN_CTX_new(); - int ret = 0; - -+ const BIGNUM *bn_n; -+ RSA_get0_key(key, &bn_n, NULL, NULL); -+ - /* Initialize BIGNUMs */ - big1 = BN_new(); - big2 = BN_new(); -@@ -337,7 +358,7 @@ int rsa_get_params(RSA *key, uint64_t *e - if (0 != rsa_get_exponent(key, exponent)) - ret = -1; - -- if (!BN_copy(n, key->n) || !BN_set_word(big1, 1L) || -+ if (!BN_copy(n, bn_n) || !BN_set_word(big1, 1L) || - !BN_set_word(big2, 2L) || !BN_set_word(big32, 32L)) - ret = -1; - diff --git a/tools/mpc/Makefile b/tools/mpc/Makefile index ef9bfc4db..70dca2637 100644 --- a/tools/mpc/Makefile +++ b/tools/mpc/Makefile @@ -7,11 +7,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mpc -PKG_VERSION:=1.0.3 +PKG_VERSION:=1.1.0 PKG_SOURCE_URL:=@GNU/mpc/ PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_HASH:=617decc6ea09889fb08ede330917a00b16809b8db88c29c31bfbb49cbf88ecc3 +PKG_HASH:=6985c538143c1208dcb1ac42cedad6ff52e267b47e5f970183a3e75125b43c2e HOST_BUILD_PARALLEL:=1 diff --git a/tools/mpfr/Makefile b/tools/mpfr/Makefile index f3e337ada..dfff7964c 100644 --- a/tools/mpfr/Makefile +++ b/tools/mpfr/Makefile @@ -7,13 +7,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mpfr -PKG_VERSION:=3.1.6 +PKG_VERSION:=4.0.1 PKG_CPE_ID:=cpe:/a:mpfr:gnu_mpfr PKG_SOURCE_URL:=http://www.mpfr.org/mpfr-$(PKG_VERSION) \ @GNU/mpfr PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=7a62ac1a04408614fccdc506e4844b10cf0ad2c2b1677097f8f35d3a1344a950 +PKG_HASH:=67874a60826303ee2fb6affc6dc0ddd3e749e9bfcb4c8655e3953d0458a6e16e HOST_BUILD_PARALLEL:=1 HOST_FIXUP:=autoreconf diff --git a/tools/mpfr/patches/001-only_src.patch b/tools/mpfr/patches/001-only_src.patch index b983f879c..019928741 100644 --- a/tools/mpfr/patches/001-only_src.patch +++ b/tools/mpfr/patches/001-only_src.patch @@ -4,19 +4,19 @@ # old Automake version. ACLOCAL_AMFLAGS = -I m4 --SUBDIRS = doc src tests tune +-SUBDIRS = doc src tests tune tools/bench +SUBDIRS = src - nobase_dist_doc_DATA = AUTHORS BUGS COPYING COPYING.LESSER NEWS TODO \ - examples/ReadMe examples/divworst.c examples/rndo-add.c examples/sample.c \ + pkgconfigdir = $(libdir)/pkgconfig + pkgconfig_DATA = mpfr.pc --- a/Makefile.in +++ b/Makefile.in -@@ -378,7 +378,7 @@ AUTOMAKE_OPTIONS = gnu +@@ -383,7 +383,7 @@ AUTOMAKE_OPTIONS = gnu # libtoolize and in case some developer needs to switch back to an # old Automake version. ACLOCAL_AMFLAGS = -I m4 --SUBDIRS = doc src tests tune +-SUBDIRS = doc src tests tune tools/bench +SUBDIRS = src + pkgconfigdir = $(libdir)/pkgconfig + pkgconfig_DATA = mpfr.pc nobase_dist_doc_DATA = AUTHORS BUGS COPYING COPYING.LESSER NEWS TODO \ - examples/ReadMe examples/divworst.c examples/rndo-add.c examples/sample.c \ - examples/version.c diff --git a/tools/mpfr/patches/100-freebsd-compat.patch b/tools/mpfr/patches/100-freebsd-compat.patch index fa28a67d9..c357b6873 100644 --- a/tools/mpfr/patches/100-freebsd-compat.patch +++ b/tools/mpfr/patches/100-freebsd-compat.patch @@ -1,6 +1,6 @@ --- a/src/vasprintf.c +++ b/src/vasprintf.c -@@ -42,6 +42,7 @@ http://www.gnu.org/licenses/ or write to +@@ -61,6 +61,7 @@ http://www.gnu.org/licenses/ or write to #endif /* HAVE_VA_COPY */ #ifdef HAVE_WCHAR_H diff --git a/tools/patch/Makefile b/tools/patch/Makefile index 9866e2055..4c4c09bc0 100644 --- a/tools/patch/Makefile +++ b/tools/patch/Makefile @@ -7,11 +7,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=patch -PKG_VERSION:=2.7.5 +PKG_VERSION:=2.7.6 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@GNU/patch -PKG_HASH:=fd95153655d6b95567e623843a0e77b81612d502ecf78a489a4aed7867caa299 +PKG_HASH:=ac610bda97abe0d9f6b7c963255a11dcb196c25e337c61f94e4778d632f1d8fd HOST_BUILD_PARALLEL := 1 diff --git a/tools/patch/patches/001-fix-macos-vasnprintf.patch b/tools/patch/patches/001-fix-macos-vasnprintf.patch deleted file mode 100644 index e41315d34..000000000 --- a/tools/patch/patches/001-fix-macos-vasnprintf.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/lib/vasnprintf.c -+++ b/lib/vasnprintf.c -@@ -4858,7 +4858,11 @@ VASNPRINTF (DCHAR_T *resultbuf, size_t * - #endif - *fbp = dp->conversion; - #if USE_SNPRINTF --# if !(((__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined __UCLIBC__) || ((defined _WIN32 || defined __WIN32__) && ! defined __CYGWIN__)) -+# if ! (((__GLIBC__ > 2 \ -+ || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) \ -+ && !defined __UCLIBC__) \ -+ || (defined __APPLE__ && defined __MACH__) \ -+ || ((defined _WIN32 || defined __WIN32__) && ! defined __CYGWIN__)) - fbp[1] = '%'; - fbp[2] = 'n'; - fbp[3] = '\0'; -@@ -4872,6 +4876,9 @@ VASNPRINTF (DCHAR_T *resultbuf, size_t * - in format strings in writable memory may crash the program - (if compiled with _FORTIFY_SOURCE=2), so we should avoid it - in this situation. */ -+ /* macOS 10.13 High Sierra behaves like glibc with -+ _FORTIFY_SOURCE=2, and older macOS releases -+ presumably do not need %n. */ - /* On native Windows systems (such as mingw), we can avoid using - %n because: - - Although the gl_SNPRINTF_TRUNCATION_C99 test fails, diff --git a/tools/popt/Makefile b/tools/popt/Makefile deleted file mode 100644 index 7d1a1f8ef..000000000 --- a/tools/popt/Makefile +++ /dev/null @@ -1,20 +0,0 @@ -include $(TOPDIR)/rules.mk - -PKG_NAME:=popt -PKG_VERSION:=1.16 -PKG_HASH:=e728ed296fe9f069a0e005003c3d6b2dde3d9cad453422a10d6558616d304cc8 -PKG_RELEASE:=1 - -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=http://rpm5.org/files/popt/ -PKG_LICENSE:=MIT - -HOST_BUILD_PARALLEL:=1 - -include $(INCLUDE_DIR)/host-build.mk - -HOST_CONFIGURE_ARGS += --disable-shared --disable-nls -HOST_CFLAGS += $(FPIC) - -$(eval $(call HostBuild)) - diff --git a/tools/scons/Makefile b/tools/scons/Makefile index a148a5c9c..fc325bff0 100644 --- a/tools/scons/Makefile +++ b/tools/scons/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=scons -PKG_VERSION:=2.5.1 +PKG_VERSION:=3.0.1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=@SF/scons \ http://fossies.org/linux/misc/ -PKG_HASH:=0b25218ae7b46a967db42f2a53721645b3d42874a65f9552ad16ce26d30f51f2 +PKG_HASH:=24475e38d39c19683bc88054524df018fe6949d70fbd4c69e298d39a0269f173 include $(INCLUDE_DIR)/host-build.mk diff --git a/tools/scons/patches/001-platform_env.patch b/tools/scons/patches/001-platform_env.patch index 8aab9041c..2be31470c 100644 --- a/tools/scons/patches/001-platform_env.patch +++ b/tools/scons/patches/001-platform_env.patch @@ -1,6 +1,6 @@ --- a/engine/SCons/Platform/__init__.py +++ b/engine/SCons/Platform/__init__.py -@@ -63,6 +63,8 @@ def platform_default(): +@@ -65,6 +65,8 @@ def platform_default(): care about the machine architecture. """ osname = os.name diff --git a/tools/tar/Makefile b/tools/tar/Makefile index 10a4a8978..baa431e2d 100644 --- a/tools/tar/Makefile +++ b/tools/tar/Makefile @@ -8,11 +8,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=tar PKG_CPE_ID:=cpe:/a:gnu:tar -PKG_VERSION:=1.29 +PKG_VERSION:=1.30 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=@GNU/tar -PKG_HASH:=236b11190c0a3a6885bdb8d61424f2b36a5872869aa3f7f695dea4b4843ae2f2 +PKG_HASH:=87592b86cb037c554375f5868bdd3cc57748aef38d6cb741c81065f0beac63b7 HOST_BUILD_PARALLEL := 1 diff --git a/tools/tar/patches/001-fix-macos-vasnprintf.patch b/tools/tar/patches/001-fix-macos-vasnprintf.patch deleted file mode 100644 index c7dfbf76e..000000000 --- a/tools/tar/patches/001-fix-macos-vasnprintf.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/gnu/vasnprintf.c -+++ b/gnu/vasnprintf.c -@@ -4858,7 +4858,11 @@ VASNPRINTF (DCHAR_T *resultbuf, size_t * - #endif - *fbp = dp->conversion; - #if USE_SNPRINTF --# if !(((__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined __UCLIBC__) || ((defined _WIN32 || defined __WIN32__) && ! defined __CYGWIN__)) -+# if ! (((__GLIBC__ > 2 \ -+ || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) \ -+ && !defined __UCLIBC__) \ -+ || (defined __APPLE__ && defined __MACH__) \ -+ || ((defined _WIN32 || defined __WIN32__) && ! defined __CYGWIN__)) - fbp[1] = '%'; - fbp[2] = 'n'; - fbp[3] = '\0'; -@@ -4872,6 +4876,9 @@ VASNPRINTF (DCHAR_T *resultbuf, size_t * - in format strings in writable memory may crash the program - (if compiled with _FORTIFY_SOURCE=2), so we should avoid it - in this situation. */ -+ /* macOS 10.13 High Sierra behaves like glibc with -+ _FORTIFY_SOURCE=2, and older macOS releases -+ presumably do not need %n. */ - /* On native Windows systems (such as mingw), we can avoid using - %n because: - - Although the gl_SNPRINTF_TRUNCATION_C99 test fails, diff --git a/tools/tar/patches/100-symlink-force-root-name.patch b/tools/tar/patches/100-symlink-force-root-name.patch index 896b4723f..93f889761 100644 --- a/tools/tar/patches/100-symlink-force-root-name.patch +++ b/tools/tar/patches/100-symlink-force-root-name.patch @@ -5,16 +5,21 @@ Signed-off-by: Felix Fietkau --- --- a/src/create.c +++ b/src/create.c -@@ -545,12 +545,8 @@ write_gnu_long_link (struct tar_stat_inf - char *tmpname; +@@ -544,17 +544,8 @@ write_gnu_long_link (struct tar_stat_inf + union block *header; header = start_private_header ("././@LongLink", size, 0); -- uid_to_uname (0, &tmpname); -- UNAME_TO_CHARS (tmpname, header->header.uname); -- free (tmpname); -- gid_to_gname (0, &tmpname); -- GNAME_TO_CHARS (tmpname, header->header.gname); -- free (tmpname); +- if (! numeric_owner_option) +- { +- static char *uname, *gname; +- if (!uname) +- { +- uid_to_uname (0, &uname); +- gid_to_gname (0, &gname); +- } +- UNAME_TO_CHARS (uname, header->header.uname); +- GNAME_TO_CHARS (gname, header->header.gname); +- } + UNAME_TO_CHARS ("root", header->header.uname); + GNAME_TO_CHARS ("root", header->header.gname); diff --git a/tools/tar/patches/110-symlink-force-permissions.patch b/tools/tar/patches/110-symlink-force-permissions.patch index 83dbda6ec..6fb799bc0 100644 --- a/tools/tar/patches/110-symlink-force-permissions.patch +++ b/tools/tar/patches/110-symlink-force-permissions.patch @@ -1,6 +1,6 @@ --- a/src/create.c +++ b/src/create.c -@@ -1851,6 +1851,7 @@ dump_file0 (struct tar_stat_info *st, ch +@@ -1853,6 +1853,7 @@ dump_file0 (struct tar_stat_info *st, ch #ifdef HAVE_READLINK else if (S_ISLNK (st->stat.st_mode)) {