uboot-rockchip: add HINLINK OPC-H68K support

This commit is contained in:
lean 2022-08-28 11:25:59 +08:00
parent ea9e965d33
commit 87f72815e8
2 changed files with 71 additions and 0 deletions

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@ -126,6 +126,17 @@ define U-Boot/nanopi-r4se-rk3399
USE_RKBIN:=1 USE_RKBIN:=1
endef endef
define U-Boot/opc-h68k-rk3568
BUILD_SUBTARGET:=armv8
NAME:=HINLINK OPC-H68K
BUILD_DEVICES:= \
hinlink_opc-h68k-d
DEPENDS:=+PACKAGE_u-boot-opc-h68k-rk3568:arm-trusted-firmware-rk3568
PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
ATF:=rk3568_bl31_v1.28.elf
DDR:=rk3568_ddr_1560MHz_v1.13.bin
endef
define U-Boot/fastrhino-r66s-rk3568 define U-Boot/fastrhino-r66s-rk3568
BUILD_SUBTARGET:=armv8 BUILD_SUBTARGET:=armv8
NAME:=FastRhin-R66S NAME:=FastRhin-R66S
@ -205,6 +216,7 @@ UBOOT_TARGETS := \
nanopi-r2s-rk3328 \ nanopi-r2s-rk3328 \
orangepi-r1-plus-rk3328 \ orangepi-r1-plus-rk3328 \
orangepi-r1-plus-lts-rk3328 \ orangepi-r1-plus-lts-rk3328 \
opc-h68k-rk3568 \
station-p2-rk3568 station-p2-rk3568
UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes

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@ -0,0 +1,59 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00a00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb"
CONFIG_ROCKCHIP_RK3568=y
CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x600000
CONFIG_TARGET_EVB_RK3568=y
CONFIG_DEBUG_UART_BASE=0xFE660000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART=y
CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_ATF=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_REGULATOR_PWM=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y
CONFIG_ERRNO_STR=y