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https://github.com/coolsnowwolf/lede.git
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ipq60xx: replace cpufreq with latest series
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parent
64ed83cc0e
commit
84c08cc0c4
@ -18,7 +18,6 @@
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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non-removable;
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vqmmc-supply = <&ipq6018_l2>;
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status = "okay";
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};
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@ -79,43 +79,48 @@
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};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
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@@ -0,0 +1,39 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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@@ -0,0 +1,44 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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+/*
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+ * ipq6018-mp5496.dtsi describes common properties (e.g. regulators) that
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+ * apply to most devices that make use of the IPQ6018 SoC and MP5496 PMIC.
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+ */
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+
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+#include "ipq6018.dtsi"
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+
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+&rpm_requests {
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+ regulators {
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+ compatible = "qcom,rpm-mp5496-regulators";
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+
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+ ipq6018_s2: s2 {
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+ mp5496_s2: s2 {
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+ regulator-min-microvolt = <725000>;
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+ regulator-max-microvolt = <1062500>;
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+ regulator-always-on;
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+ };
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+
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+ ipq6018_l2: l2 {
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+ mp5496_l2: l2 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-always-on;
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+ };
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+ };
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+};
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+
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+&sdhc {
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+ vqmmc-supply = <&ipq6018_l2>;
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+ vqmmc-supply = <&mp5496_l2>;
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+};
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+
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+&CPU0 {
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+ cpu-supply = <&ipq6018_s2>;
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+ cpu-supply = <&mp5496_s2>;
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+};
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+
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+&CPU1 {
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+ cpu-supply = <&ipq6018_s2>;
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+ cpu-supply = <&mp5496_s2>;
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+};
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+
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+&CPU2 {
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+ cpu-supply = <&ipq6018_s2>;
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+ cpu-supply = <&mp5496_s2>;
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+};
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+
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+&CPU3 {
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+ cpu-supply = <&ipq6018_s2>;
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+ cpu-supply = <&mp5496_s2>;
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+};
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@ -0,0 +1,126 @@
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -43,7 +43,6 @@ cpu0: cpu@0 {
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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- cpu-supply = <&ipq6018_s2>;
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#cooling-cells = <2>;
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};
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@@ -56,7 +55,6 @@ cpu1: cpu@1 {
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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- cpu-supply = <&ipq6018_s2>;
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#cooling-cells = <2>;
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};
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@@ -69,7 +67,6 @@ cpu2: cpu@2 {
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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- cpu-supply = <&ipq6018_s2>;
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#cooling-cells = <2>;
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};
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@@ -82,7 +79,6 @@ cpu3: cpu@3 {
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clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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- cpu-supply = <&ipq6018_s2>;
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#cooling-cells = <2>;
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};
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@@ -119,6 +115,13 @@ opp-1056000000 {
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clock-latency-ns = <200000>;
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};
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+ opp-1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <850000>;
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+ opp-supported-hw = <0x4>;
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+ clock-latency-ns = <200000>;
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+ };
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+
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opp-1320000000 {
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opp-hz = /bits/ 64 <1320000000>;
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opp-microvolt = <862500>;
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@@ -133,6 +136,13 @@ opp-1440000000 {
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clock-latency-ns = <200000>;
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};
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+ opp-1512000000 {
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+ opp-hz = /bits/ 64 <1512000000>;
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+ opp-microvolt = <937500>;
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+ opp-supported-hw = <0x2>;
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+ clock-latency-ns = <200000>;
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+ };
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+
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opp-1608000000 {
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opp-hz = /bits/ 64 <1608000000>;
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opp-microvolt = <987500>;
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@@ -170,16 +180,6 @@ glink-edge {
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rpm_requests: rpm-requests {
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compatible = "qcom,rpm-ipq6018";
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qcom,glink-channels = "rpm_requests";
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-
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- regulators {
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- compatible = "qcom,rpm-mp5496-regulators";
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-
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- ipq6018_s2: s2 {
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- regulator-min-microvolt = <725000>;
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- regulator-max-microvolt = <1062500>;
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- regulator-always-on;
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- };
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- };
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};
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};
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};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi
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@@ -0,0 +1,44 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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+/*
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+ * ipq6018-mp5496.dtsi describes common properties (e.g. regulators) that
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+ * apply to most devices that make use of the IPQ6018 SoC and MP5496 PMIC.
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+ */
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+
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+#include "ipq6018.dtsi"
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+
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+&rpm_requests {
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+ regulators {
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+ compatible = "qcom,rpm-mp5496-regulators";
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+
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+ mp5496_s2: s2 {
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+ regulator-min-microvolt = <725000>;
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+ regulator-max-microvolt = <1062500>;
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+ regulator-always-on;
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+ };
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+
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+ mp5496_l2: l2 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+ };
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+};
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+
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+&sdhc {
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+ vqmmc-supply = <&mp5496_l2>;
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+};
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+
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+&CPU0 {
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+ cpu-supply = <&mp5496_s2>;
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+};
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+
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+&CPU1 {
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+ cpu-supply = <&mp5496_s2>;
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+};
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+
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+&CPU2 {
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+ cpu-supply = <&mp5496_s2>;
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+};
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+
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+&CPU3 {
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+ cpu-supply = <&mp5496_s2>;
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+};
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@ -1,26 +0,0 @@
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From d24bc08bfc66f47d6e0a294a080d62893a7696b5 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Thu, 18 Jan 2024 21:30:21 +0800
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Subject: [PATCH] arm64: dts: qcom: ipq6018: add LDOA2 regulator
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Add LDOA2 regulator of MP5496 to support SDCC voltage scaling.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -179,6 +179,11 @@
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regulator-max-microvolt = <1062500>;
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regulator-always-on;
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};
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+
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+ ipq6018_l2: l2 {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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};
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};
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};
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@ -1,65 +0,0 @@
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From c67a1814bb1d0df290cf1e3f9c966f04aa41b9b9 Mon Sep 17 00:00:00 2001
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From: Mantas Pucka <mantas@8devices.com>
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Date: Tue, 30 Jan 2024 12:43:56 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq6018: change voltage to perf levels for
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CPR4 driver
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Current CPR4 driver requires opp-microvolt to be an abstract
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performance level instead of actual voltage level.
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Signed-off-by: Mantas Pucka <mantas@8devices.com>
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---
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 12 ++++++------
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1 file changed, 6 insertions(+), 6 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -107,42 +107,42 @@
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opp-864000000 {
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opp-hz = /bits/ 64 <864000000>;
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- opp-microvolt = <725000>;
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+ opp-microvolt = <1>;
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opp-supported-hw = <0xf>;
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clock-latency-ns = <200000>;
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};
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opp-1056000000 {
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opp-hz = /bits/ 64 <1056000000>;
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- opp-microvolt = <787500>;
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+ opp-microvolt = <2>;
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opp-supported-hw = <0xf>;
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clock-latency-ns = <200000>;
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};
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opp-1320000000 {
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opp-hz = /bits/ 64 <1320000000>;
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- opp-microvolt = <862500>;
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+ opp-microvolt = <3>;
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opp-supported-hw = <0x3>;
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clock-latency-ns = <200000>;
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};
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opp-1440000000 {
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opp-hz = /bits/ 64 <1440000000>;
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- opp-microvolt = <925000>;
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+ opp-microvolt = <4>;
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opp-supported-hw = <0x3>;
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clock-latency-ns = <200000>;
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};
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opp-1608000000 {
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opp-hz = /bits/ 64 <1608000000>;
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- opp-microvolt = <987500>;
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+ opp-microvolt = <5>;
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opp-supported-hw = <0x1>;
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clock-latency-ns = <200000>;
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};
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opp-1800000000 {
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opp-hz = /bits/ 64 <1800000000>;
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- opp-microvolt = <1062500>;
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+ opp-microvolt = <6>;
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opp-supported-hw = <0x1>;
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clock-latency-ns = <200000>;
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};
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