revert ASUS-RT-ARCH17 support

2025-04-16 04:13:31 +00:00 · 2018-08-23 20:06:19 +08:00 · 2018-08-23 20:06:19 +08:00 · 7a98f4c323
commit 7a98f4c323
parent d7b3db247c
65 changed files with 2383 additions and 13072 deletions
--- a/package/firmware/ipq-wifi/Makefile
+++ b/package/firmware/ipq-wifi/Makefile
@ -14,7 +14,10 @@ define Build/Compile
 endef

 #ALLWIFIBOARDS:=<devicename>
-ALLWIFIBOARDS:=zyxel_wre6606
+# Please send a mail with your device-specific board files upstream.
+# You can find instructions and examples on the linux-wireless wiki:
+# <https://wireless.wiki.kernel.org/en/users/drivers/ath10k/boardfiles>
+ALLWIFIBOARDS:=rt-acrh17 zyxel_nbg6617 zyxel_wre6606
 ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))

 define Package/ipq-wifi-default
@ -48,7 +51,9 @@ Don't install it for any other device!
  PREV_BOARD+=ipq-wifi-$(1)
 endef

+$(eval $(call generate-ipq-wifi-package,rt-acrh17,board-rt-acrh17.bin,ASUS RT-ACRH17/RT-AC82U/RT-AC42U))
 $(eval $(call generate-ipq-wifi-package,zyxel_wre6606,board-zyxel_wre6606.bin,ZyXEL WRE6606))
 #$(eval $(call generate-ipq-wifi-package,<devicename>,<filename>,<displayname>))
+$(eval $(call generate-ipq-wifi-package,zyxel_nbg6617,board-zyxel_nbg6617.bin,ZyXEL NBG6617))

 $(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))
--- a/package/firmware/ipq-wifi/board-rt-acrh17.bin
+++ b/package/firmware/ipq-wifi/board-rt-acrh17.bin
--- a/package/firmware/ipq-wifi/board-zyxel_nbg6617.bin
+++ b/package/firmware/ipq-wifi/board-zyxel_nbg6617.bin
--- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds
+++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds
@ -15,12 +15,22 @@ asus,rt-ac58u)
 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:blue:wlan2G" "phy0tpt"
 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:blue:wlan5G" "phy1tpt"
 	ucidef_set_led_usbport "usb" "USB" "${boardname}:blue:usb" "usb1-port1" "usb2-port1" "usb3-port1" "usb4-port1"
-	ucidef_set_led_netdev "wan" "WAN" "${boardname}:blue:wan" "eth1"
+	ucidef_set_led_switch "wan" "WAN" "${boardname}:blue:wan" "switch0" "0x20"
 	ucidef_set_led_switch "lan" "LAN" "${boardname}:blue:lan" "switch0" "0x1e"
 	;;
+asus,rt-acrh17)
+	ucidef_set_led_default "status" "STATUS" "${boardname}:blue:status" "1"
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:blue:wlan2g" "phy1tpt"
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:blue:wlan5g" "phy0tpt"
+	ucidef_set_led_switch "wan" "WAN(blue)" "${boardname}:blue:wan" "switch0" "0x20"
+	ucidef_set_led_switch "lan1" "LAN1" "${boardname}:blue:lan1" "switch0" "0x02"
+	ucidef_set_led_switch "lan2" "LAN2" "${boardname}:blue:lan2" "switch0" "0x04"
+	ucidef_set_led_switch "lan3" "LAN3" "${boardname}:blue:lan3" "switch0" "0x08"
+	ucidef_set_led_switch "lan4" "LAN4" "${boardname}:blue:lan4" "switch0" "0x10"
+	;;
 avm,fritzbox-4040)
 	ucidef_set_led_wlan "wlan" "WLAN" "fritz4040:green:wlan" "phy0tpt" "phy1tpt"
-	ucidef_set_led_netdev "wan" "WAN" "fritz4040:green:wan" "eth1"
+	ucidef_set_led_switch "wan" "WAN" "fritz4040:green:wan" "switch0" "0x20"
 	ucidef_set_led_switch "lan" "LAN" "fritz4040:green:lan" "switch0" "0x1e"
 	;;
 glinet,gl-b1300)
@ -34,6 +44,11 @@ netgear,ex6150v2)
 meraki,mr33)
 	ucidef_set_interface_lan "eth0"
 	;;
+zyxel,nbg6617)
+	ucidef_set_led_wlan "wlan2g" "WLAN2G" "$board:green:wlan2G" "phy0tpt"
+	ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:green:wlan5G" "phy1tpt"
+	ucidef_set_led_usbport "usb" "USB" "${board}:green:usb" "usb1-port1" "usb2-port1" "usb3-port1" "usb4-port1"
+	;;
 zyxel,wre6606)
 	ucidef_set_led_wlan "wlan2g" "WLAN2G" "${boardname}:green:wlan2g" "phy0tpt"
 	ucidef_set_led_wlan "wlan5g" "WLAN5G" "${boardname}:green:wlan5g" "phy1tpt"
--- a/target/linux/ipq40xx/base-files/etc/board.d/02_network
+++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network
@ -12,35 +12,32 @@ board_config_update
 board=$(board_name)

 case "$board" in
-8dev,jalapeno)
-	ucidef_set_interfaces_lan_wan "eth0" "eth1"
-	;;
-asus,rt-ac58u)
-	CI_UBIPART=UBI_DEV
-	wan_mac_addr=$(mtd_get_mac_binary_ubi Factory 20486)
-	lan_mac_addr=$(mtd_get_mac_binary_ubi Factory 4102)
-	ucidef_set_interfaces_lan_wan "eth0" "eth1"
+asus,rt-ac58u |\
+asus,rt-acrh17)
 	ucidef_add_switch "switch0" \
-		"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan"
+		"0t@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
+	lan_mac_addr=$(cat /sys/class/net/eth0/address)
+	wan_mac_addr=$(macaddr_add "$lan_mac_addr" 1)
 	ucidef_set_interface_macaddr "lan" "$lan_mac_addr"
 	ucidef_set_interface_macaddr "wan" "$wan_mac_addr"
 	;;
 avm,fritzbox-4040)
-	ucidef_set_interfaces_lan_wan "eth0" "eth1"
 	ucidef_add_switch "switch0" \
-		"0u@eth0" "1:lan" "2:lan" "3:lan" "4:lan"
+		"0t@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
 	;;
 compex,wpj428)
-	ucidef_set_interface_lan "eth0 eth1"
+	ucidef_add_switch "switch0" \
+		"0t@eth0" "4:wan" "5:lan"
 	;;
 glinet,gl-b1300)
-	ucidef_set_interfaces_lan_wan "eth0" "eth1"
 	ucidef_add_switch "switch0" \
-		"0u@eth0" "3:lan" "4:lan"
+		"0t@eth0" "3:lan" "4:lan" "5:wan"
 	;;
+8dev,jalapeno |\
 openmesh,a42 |\
 openmesh,a62)
-	ucidef_set_interfaces_lan_wan "eth1" "eth0"
+	ucidef_add_switch "switch0" \
+		"0t@eth0" "4:lan" "5:wan"
 	;;
 meraki,mr33 |\
 netgear,ex6100v2 |\
@ -48,6 +45,14 @@ netgear,ex6150v2 |\
 zyxel,wre6606)
 	ucidef_set_interface_lan "eth0"
 	;;
+zyxel,nbg6617)
+	ucidef_add_switch "switch0" \
+		"0u@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "5:wan:5"
+	lan_mac_addr=$(macaddr_add $(cat /sys/class/net/eth0/address) +2)
+	wan_mac_addr=$(macaddr_add "$lan_mac_addr" +1)
+	ucidef_set_interface_macaddr "lan" "$lan_mac_addr"
+	ucidef_set_interface_macaddr "wan" "$wan_mac_addr"
+	;;
 *)
 	echo "Unsupported hardware. Network interfaces not intialized"
 	;;
--- a/target/linux/ipq40xx/base-files/etc/diag.sh
+++ b/target/linux/ipq40xx/base-files/etc/diag.sh
@ -7,10 +7,6 @@ failsafe="$(get_dt_led failsafe)"
 running="$(get_dt_led running)"
 upgrade="$(get_dt_led upgrade)"

-get_status_led() {
-	status_led="$boot"
-}
-
 set_state() {
 	status_led="$boot"

@ -32,9 +28,11 @@ set_state() {
 		;;
 	upgrade)
 		[ -n "$running" ] && {
-			status_led="$upgrade"
-			status_led_blink_preinit_regular
+			status_led="$running"
+			status_led_off
 		}
+		status_led="$upgrade"
+		status_led_blink_preinit_regular
 		;;
 	done)
 		status_led_off
--- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
@ -112,6 +112,10 @@ case "$FIRMWARE" in
 	;;
 "ath10k/pre-cal-pci-0000:01:00.0.bin")
 	case "$board" in
+	asus,rt-acrh17)
+		CI_UBIPART=UBI_DEV
+		ath10kcal_ubi_extract "Factory" 36864 12064
+		;;
 	openmesh,a62)
 		ath10kcal_extract "0:ART" 36864 12064
 		;;
@ -124,6 +128,7 @@ case "$FIRMWARE" in
 	qcom,ap-dk01.1-c1)
 		ath10kcal_extract "ART" 4096 12064
 		;;
+	asus,rt-acrh17|\
 	asus,rt-ac58u)
 		CI_UBIPART=UBI_DEV
 		ath10kcal_ubi_extract "Factory" 4096 12064
@ -146,6 +151,7 @@ case "$FIRMWARE" in
 	openmesh,a62)
 		ath10kcal_extract "0:ART" 4096 12064
 		;;
+	zyxel,nbg6617 |\
 	zyxel,wre6606)
 		ath10kcal_extract "ART" 4096 12064
 		ath10kcal_patch_mac_crc $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
@ -181,6 +187,7 @@ case "$FIRMWARE" in
 	openmesh,a62)
 		ath10kcal_extract "0:ART" 20480 12064
 		;;
+	zyxel,nbg6617 |\
 	zyxel,wre6606)
 		ath10kcal_extract "ART" 20480 12064
 		ath10kcal_patch_mac_crc $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
--- a/target/linux/ipq40xx/base-files/etc/hotplug.d/net/16_adjust_network
+++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/net/16_adjust_network
@ -0,0 +1,7 @@
+#!/bin/sh
+
+[ -f /lib/adjust_network.sh ] && {
+	. /lib/adjust_network.sh
+
+	adjust_eth_queue
+}
--- a/target/linux/ipq40xx/base-files/etc/init.d/adjust_network
+++ b/target/linux/ipq40xx/base-files/etc/init.d/adjust_network
@ -0,0 +1,18 @@
+#!/bin/sh /etc/rc.common
+# Copyright (C) 2006-2011 OpenWrt.org
+
+START=11
+STOP=98
+
+adjust_smp_affinity() {
+	test -f /lib/adjust_network.sh && {
+		. /lib/adjust_network.sh
+
+		adjust_edma_smp_affinity
+		adjust_radio_smp_affinity
+	}
+}
+
+boot() {
+	adjust_smp_affinity
+}
--- a/target/linux/ipq40xx/base-files/lib/adjust_network.sh
+++ b/target/linux/ipq40xx/base-files/lib/adjust_network.sh
@ -0,0 +1,86 @@
+#!/bin/sh
+# this scripts is used for adjust cpu's choice of interrupts.
+#
+
+################################################
+# Adjust smp_affinity of edma
+# Globals:
+#    None
+# Arguments:
+#    None
+# Returns:
+#    None
+# Remark:
+#    execute only once on start-up.
+################################################
+adjust_edma_smp_affinity() {
+	grep -q edma_eth_ /proc/interrupts || return 0
+	local nr=`cat /proc/cpuinfo | grep processor | wc -l`
+	local cpu=0
+	local tx_irq_num
+
+	for tx_num in `seq 0 1 15` ; do
+		cpu=`printf "%x" $((1<<((tx_num/4+3)%nr)))`
+		tx_irq_num=`grep -m1 edma_eth_tx$tx_num /proc/interrupts | cut -d ':' -f 1 | tail -n1 | tr -d ' '`
+		[ -n "$tx_irq_num" ] && echo $cpu > /proc/irq/$tx_irq_num/smp_affinity
+	done
+
+	for rx_num in `seq 0 1 7` ; do
+		cpu=`printf "%x" $((1<<((rx_num/2)%nr)))`
+		rx_irq_num=`grep -m1 edma_eth_rx$rx_num /proc/interrupts | cut -d ':' -f 1 | tail -n1 | tr -d ' '`
+		[ -n "$rx_irq_num" ] && echo $cpu > /proc/irq/$rx_irq_num/smp_affinity
+	done
+}
+
+################################################
+# Adjust smp_affinity of ath10k for 2G and 5G
+# Globals:
+#    None
+# Arguments:
+#    None
+# Returns:
+#    None
+# Remark:
+#    execute only once on start-up.
+################################################
+adjust_radio_smp_affinity() {
+	local irqs="`grep -E 'ath10k' /proc/interrupts | cut -d ':' -f 1 | tr -d ' '`"
+	local nr=`cat /proc/cpuinfo | grep processor | wc -l`
+	local idx=2
+
+	for irq in $irqs; do
+		cpu=`printf "%x" $((1<<((idx)%nr)))`
+		echo $cpu > /proc/irq/$irq/smp_affinity
+		idx=$((idx+1))
+	done
+}
+
+################################################
+# Adjust queue of eth
+# Globals:
+#    None
+# Arguments:
+#    None
+# Returns:
+#    None
+# Remark:
+#    Each network reboot needs to be executed.
+################################################
+adjust_eth_queue() {
+	local nr=`cat /proc/cpuinfo | grep processor | wc -l`
+	local cpu=`printf "%x" $(((1<<nr)-1))`
+
+	for epath in /sys/class/net/eth[0-9]*; do
+		test -e $epath || break
+		echo $epath | grep -q "\." && continue
+		eth=`basename $epath`
+		for exps in /sys/class/net/$eth/queues/rx-[0-9]*/rps_cpus; do
+			test -e $exps || break
+			echo $cpu > $exps
+			echo 256 > `dirname $exps`/rps_flow_cnt
+		done
+		which ethtool >/dev/null 2>&1 && ethtool -K $eth gro off
+	done
+
+	echo 1024 > /proc/sys/net/core/rps_sock_flow_entries
+}
--- a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
+++ b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh
@ -4,6 +4,12 @@

 preinit_set_mac_address() {
 	case $(board_name) in
+	asus,rt-acrh17|\
+	asus,rt-ac58u)
+		CI_UBIPART=UBI_DEV
+		mac=$(macaddr_add $(mtd_get_mac_binary_ubi Factory 4102) +1)
+		ifconfig eth0 hw ether $mac 2>/dev/null
+		;;
 	meraki,mr33)
 		mac_lan=$(get_mac_binary "/sys/bus/i2c/devices/0-0050/eeprom" 102)
 		[ -n "$mac_lan" ] && ip link set dev eth0 address "$mac_lan"
--- a/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh
+++ b/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh
@ -0,0 +1,19 @@
+#!/bin/sh
+
+set_preinit_iface() {
+	. /lib/functions.sh
+
+	case $(board_name) in
+	asus,rt-ac58u| \
+	avm,fritzbox-4040| \
+	glinet,gl-b1300| \
+	meraki,mr33| \
+	zyxel,nbg6617)
+		ifname=eth0
+		;;
+	*)
+		;;
+	esac
+}
+
+boot_hook_add preinit_main set_preinit_iface
--- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh
@ -4,40 +4,175 @@ REQUIRE_IMAGE_METADATA=1
 RAMFS_COPY_BIN='fw_printenv fw_setenv'
 RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock'

-platform_check_image() {
-	case "$(board_name)" in
-	asus,rt-ac58u)
-		CI_UBIPART="UBI_DEV"
-		local ubidev=$(nand_find_ubi $CI_UBIPART)
-		local asus_root=$(nand_find_volume $ubidev jffs2)
+ubi_kill_if_exist() {
+	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	local c_ubivol="$( nand_find_volume $ubidev $1 )"
+	umount -f /dev/$c_ubivol 2>/dev/null
+	[ "$c_ubivol" ] && ubirmvol /dev/$ubidev -N $1 || true
+	echo "Partition $1 removed."
+}

-		[ -n "$asus_root" ] || return 0
+# idea from @981213
+# Tar sysupgrade for ASUS RT-AC82U/RT-AC58U
+# An ubi repartition is required due to the strange partition table created by Asus.
+# We create all the factory partitions to make sure that the U-boot tftp recovery still works.
+# The reserved kernel partition size should be enough to put the factory image in.
+asus_nand_upgrade_tar() {
+	local kpart_size="$1"
+	local tar_file="$2"

-		cat << EOF
-jffs2 partition is still present.
-There's probably no space left
-to install the filesystem.
+	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+	board_dir=${board_dir%/}

-You need to delete the jffs2 partition first:
-# ubirmvol /dev/ubi0 --name=jffs2
+	local kernel_length=`(tar xf $tar_file ${board_dir}/kernel -O | wc -c) 2> /dev/null`
+	local rootfs_length=`(tar xf $tar_file ${board_dir}/root -O | wc -c) 2> /dev/null`

-Once this is done. Retry.
-EOF
+	local mtdnum="$( find_mtd_index "$CI_UBIPART" )"
+	if [ ! "$mtdnum" ]; then
+		echo "cannot find ubi mtd partition $CI_UBIPART"
 		return 1
-		;;
-	esac
+	fi
+
+	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	if [ ! "$ubidev" ]; then
+		ubiattach -m "$mtdnum"
+		sync
+		ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	fi
+
+	if [ ! "$ubidev" ]; then
+		echo "cannot find ubi device $CI_UBIPART"
+		return 1
+	fi
+
+	local root_ubivol="$( nand_find_volume $ubidev rootfs )"
+	# remove ubiblock device of rootfs
+	local root_ubiblk="ubiblock${root_ubivol:3}"
+	if [ "$root_ubivol" -a -e "/dev/$root_ubiblk" ]; then
+		echo "removing $root_ubiblk"
+		if ! ubiblock -r /dev/$root_ubivol; then
+			echo "cannot remove $root_ubiblk"
+			return 1;
+		fi
+	fi
+
+	ubi_kill_if_exist rootfs_data
+	ubi_kill_if_exist rootfs
+	ubi_kill_if_exist jffs2
+	ubi_kill_if_exist linux2
+	ubi_kill_if_exist linux
+
+	ubimkvol /dev/$ubidev -N linux -s $kpart_size
+	ubimkvol /dev/$ubidev -N linux2 -s $kpart_size
+	ubimkvol /dev/$ubidev -N jffs2 -s 2539520
+	ubimkvol /dev/$ubidev -N rootfs -s $rootfs_length
+	ubimkvol /dev/$ubidev -N rootfs_data -m
+
+	local kern_ubivol="$(nand_find_volume $ubidev $CI_KERNPART)"
+	echo "Kernel at $kern_ubivol.Writing..."
+	tar xf $tar_file ${board_dir}/kernel -O | \
+		ubiupdatevol /dev/$kern_ubivol -s $kernel_length -
+	echo "Done."
+
+	local root_ubivol="$(nand_find_volume $ubidev rootfs)"
+	echo "Rootfs at $root_ubivol.Writing..."
+	tar xf $tar_file ${board_dir}/root -O | \
+		ubiupdatevol /dev/$root_ubivol -s $rootfs_length -
+	echo "Done."
+
+	nand_do_upgrade_success
+}
+
+# idea from @981213
+# Factory image sysupgrade for ASUS RT-AC82U/RT-AC58U
+# Delete all the partitions we created before, create "linux" partition and write factory image in.
+# Skip the first 64bytes which is an uImage header to verify the firmware.
+# The kernel partition size should be the original one.
+asus_nand_upgrade_factory() {
+	local kpart_size="$1"
+	local fw_file="$2"
+
+	local mtdnum="$( find_mtd_index "$CI_UBIPART" )"
+	if [ ! "$mtdnum" ]; then
+		echo "cannot find ubi mtd partition $CI_UBIPART"
+		return 1
+	fi
+
+	local ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	if [ ! "$ubidev" ]; then
+		ubiattach -m "$mtdnum"
+		sync
+		ubidev="$( nand_find_ubi "$CI_UBIPART" )"
+	fi
+
+	if [ ! "$ubidev" ]; then
+		echo "cannot find ubi device $CI_UBIPART"
+		return 1
+	fi
+
+	local root_ubivol="$( nand_find_volume $ubidev rootfs )"
+	# remove ubiblock device of rootfs
+	local root_ubiblk="ubiblock${root_ubivol:3}"
+	if [ "$root_ubivol" -a -e "/dev/$root_ubiblk" ]; then
+		echo "removing $root_ubiblk"
+		if ! ubiblock -r /dev/$root_ubivol; then
+			echo "cannot remove $root_ubiblk"
+			return 1;
+		fi
+	fi
+
+	ubi_kill_if_exist rootfs_data
+	ubi_kill_if_exist rootfs
+	ubi_kill_if_exist jffs2
+	ubi_kill_if_exist linux2
+	ubi_kill_if_exist linux
+
+	ubimkvol /dev/$ubidev -N linux -s $kpart_size
+
+	local kern_ubivol="$(nand_find_volume $ubidev $CI_KERNPART)"
+	echo "Asus linux at $kern_ubivol.Writing..."
+	ubiupdatevol /dev/$kern_ubivol --skip=64 $fw_file
+	echo "Done."
+
+	umount -a
+	reboot -f
+}
+
+platform_check_image() {
 	return 0;
 }

+zyxel_do_upgrade() {
+	local tar_file="$1"
+
+	local board_dir=$(tar tf $tar_file | grep -m 1 '^sysupgrade-.*/$')
+	board_dir=${board_dir%/}
+
+	tar Oxf $tar_file ${board_dir}/kernel | mtd write - kernel
+
+	if [ "$SAVE_CONFIG" -eq 1 ]; then
+		tar Oxf $tar_file ${board_dir}/root | mtd -j "$CONF_TAR" write - rootfs
+	else
+		tar Oxf $tar_file ${board_dir}/root | mtd write - rootfs
+	fi
+}
+
 platform_do_upgrade() {
 	case "$(board_name)" in
 	8dev,jalapeno)
 		nand_do_upgrade "$ARGV"
 		;;
+	asus,rt-acrh17|\
 	asus,rt-ac58u)
+		local magic=$(get_magic_long "$1")
 		CI_UBIPART="UBI_DEV"
 		CI_KERNPART="linux"
-		nand_do_upgrade "$1"
+		if [ "$magic" == "27051956" ]; then
+			echo "Got Asus factory image."
+			asus_nand_upgrade_factory 50409472 "$1"
+		else
+			asus_nand_upgrade_tar 20951040 "$1"
+		fi
 		;;
 	openmesh,a42 |\
 	openmesh,a62)
@ -48,6 +183,9 @@ platform_do_upgrade() {
 		CI_KERNPART="part.safe"
 		nand_do_upgrade "$1"
 		;;
+	zyxel,nbg6617)
+		zyxel_do_upgrade "$1"
+		;;
 	*)
 		default_do_upgrade "$ARGV"
 		;;
@ -56,18 +194,8 @@ platform_do_upgrade() {

 platform_nand_pre_upgrade() {
 	case "$(board_name)" in
-	asus,rt-ac58u)
-		CI_UBIPART="UBI_DEV"
-		CI_KERNPART="linux"
-		;;
 	meraki,mr33)
 		CI_KERNPART="part.safe"
 		;;
 	esac
 }
-
-blink_led() {
-	. /etc/diag.sh; set_state upgrade
-}
-
-append sysupgrade_pre_upgrade blink_led
--- a/target/linux/ipq40xx/config-4.14
+++ b/target/linux/ipq40xx/config-4.14
@ -53,7 +53,6 @@ CONFIG_ARM_L1_CACHE_SHIFT_6=y
 # CONFIG_ARM_LPAE is not set
 CONFIG_ARM_PATCH_IDIV=y
 CONFIG_ARM_PATCH_PHYS_VIRT=y
-CONFIG_ARM_QCOM_CPUIDLE=y
 # CONFIG_ARM_SMMU is not set
 # CONFIG_ARM_SP805_WATCHDOG is not set
 CONFIG_ARM_THUMB=y
@ -65,7 +64,6 @@ CONFIG_AUTO_ZRELADDR=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_MQ_PCI=y
 CONFIG_BOUNCE=y
-CONFIG_BUS_TOPOLOGY_ADHOC=y
 # CONFIG_CACHE_L2X0 is not set
 CONFIG_CLKDEV_LOOKUP=y
 CONFIG_CLKSRC_QCOM=y
@ -283,7 +281,6 @@ CONFIG_MFD_SYSCON=y
 CONFIG_MIGHT_HAVE_CACHE_L2X0=y
 CONFIG_MIGHT_HAVE_PCI=y
 CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MSM_BUS_SCALING=y
 # CONFIG_MSM_GCC_8660 is not set
 # CONFIG_MSM_GCC_8916 is not set
 # CONFIG_MSM_GCC_8960 is not set
@ -359,6 +356,7 @@ CONFIG_PERF_USE_VMALLOC=y
 CONFIG_PGTABLE_LEVELS=2
 CONFIG_PHYLIB=y
 # CONFIG_PHY_QCOM_APQ8064_SATA is not set
+CONFIG_PHY_QCOM_IPQ4019_USB=y
 # CONFIG_PHY_QCOM_IPQ806X_SATA is not set
 # CONFIG_PHY_QCOM_QMP is not set
 # CONFIG_PHY_QCOM_QUSB2 is not set
@ -432,8 +430,9 @@ CONFIG_SMP=y
 CONFIG_SMP_ON_UP=y
 CONFIG_SPARSE_IRQ=y
 CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
+CONFIG_SPI_BITBANG=y
 CONFIG_SPI_GPIO=y
+CONFIG_SPI_MASTER=y
 CONFIG_SPI_QUP=y
 CONFIG_SPMI=y
 CONFIG_SPMI_MSM_PMIC_ARB=y
@ -465,8 +464,6 @@ CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
 CONFIG_USB=y
 CONFIG_USB_COMMON=y
 # CONFIG_USB_EHCI_HCD is not set
-CONFIG_USB_IPQ4019_PHY=y
-CONFIG_USB_PHY=y
 # CONFIG_USB_QCOM_8X16_PHY is not set
 CONFIG_USB_SUPPORT=y
 CONFIG_USE_OF=y
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-a42.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-a42.dts
@ -16,7 +16,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -165,7 +164,7 @@
 	status = "okay";
 };

-&spi_0 {
+&blsp1_spi1 {
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
@ -186,19 +185,7 @@
 };

 &gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
+	vlan_tag = <1 0x31>;
 };

 &usb2_hs_phy {
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-ex61x0v2.dtsi
@ -16,7 +16,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -102,7 +101,7 @@
 	led_spi {
 		compatible = "spi-gpio";
 		#address-cells = <1>;
-		ranges;
+		#size-cells = <0>;

 		gpio-sck = <&tlmm 5 GPIO_ACTIVE_HIGH>;
 		gpio-mosi = <&tlmm 4 GPIO_ACTIVE_HIGH>;
@ -194,7 +193,7 @@
 	};
 };

-&spi_0 {
+&blsp1_spi1 {
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-fritz4040.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-fritz4040.dts
@ -15,7 +15,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -202,7 +201,7 @@
 	status = "okay";
 };

-&spi_0 { /* BLSP1 QUP1 */
+&blsp1_spi1 { /* BLSP1 QUP1 */
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts
@ -16,7 +16,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -145,7 +144,7 @@
 	status = "okay";
 };

-&spi_0 {
+&blsp1_spi1 {
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
@ -231,17 +230,7 @@
 };

 &gmac0 {
-	qcom,poll_required = <1>;
-	qcom,poll_required_dynamic = <1>;
-	qcom,phy_mdio_addr = <3>;
-	vlan_tag = <1 0x10>;
-};
-
-&gmac1 {
-	qcom,poll_required = <1>;
-	qcom,poll_required_dynamic = <1>;
-	qcom,phy_mdio_addr = <4>;
-	vlan_tag = <2 0x20>;
+	vlan_tag = <1 0x31>;
 };

 &wifi0 {
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-nbg6617.dts
@ -0,0 +1,320 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+	model = "ZyXEL NBG6617";
+	compatible = "zyxel,nbg6617", "qcom,ipq4019";
+
+	chosen {
+		/*
+		 * the vendor u-boot adds root and mtdparts cmdline parameters
+		 * which we don't want... but we have to overwrite them or else
+		 * the kernel will take them at face value.
+		 */
+		bootargs-append = " mtdparts= root=31:13";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+		led-upgrade = &power;
+	};
+
+	soc {
+		mdio@90000 {
+			status = "okay";
+		};
+
+		ess-psgmii@98000 {
+			status = "okay";
+		};
+
+		tcsr@1949000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1949000 0x100>;
+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+		};
+
+		tcsr@194b000 {
+			compatible = "qcom,tcsr";
+			reg = <0x194b000 0x100>;
+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+		};
+
+		ess_tcsr@1953000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1953000 0x1000>;
+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+		};
+
+		tcsr@1957000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1957000 0x100>;
+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+		};
+
+		usb2@60f8800 {
+			status = "okay";
+		};
+
+		serial@78af000 {
+			pinctrl-0 = <&serial_pins>;
+			pinctrl-names = "default";
+			status = "okay";
+		};
+
+		usb3@8af8800 {
+			status = "okay";
+		};
+
+		crypto@8e3a000 {
+			status = "okay";
+		};
+
+		watchdog@b017000 {
+			status = "okay";
+		};
+
+		ess-switch@c000000 {
+			status = "okay";
+		};
+
+		edma@c080000 {
+			status = "okay";
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		wlan {
+			label = "wlan";
+			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_RFKILL>;
+			linux,input-type = <EV_SW>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+		pinctrl-0 = <&led_pins>;
+		pinctrl-names = "default";
+
+		power: power {
+			label = "nbg6617:green:power";
+			gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
+		};
+
+		usb {
+			label = "nbg6617:green:usb";
+			gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2G {
+			label = "nbg6617:green:wlan2G";
+			gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan5G {
+			label = "nbg6617:green:wlan5G";
+			gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+		};
+
+		wps {
+			label = "nbg6617:green:wps";
+			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&tlmm {
+	serial_pins: serial_pinmux {
+		mux {
+			pins = "gpio60", "gpio61";
+			function = "blsp_uart0";
+			bias-disable;
+		};
+	};
+	spi_0_pins: spi_0_pinmux {
+		mux {
+			function = "blsp_spi0";
+			pins = "gpio55", "gpio56", "gpio57";
+			drive-strength = <12>;
+			bias-disable;
+		};
+
+		mux_cs {
+			function = "gpio";
+			pins = "gpio54";
+			drive-strength = <2>;
+			bias-disable;
+			output-low;
+		};
+	};
+	led_pins: led_pinmux  {
+		mux {
+			pins = "gpio0", "gpio1", "gpio3", "gpio5", "gpio58";
+			drive-strength = <0x8>;
+			bias-disable;
+			output-low;
+		};
+	};
+};
+
+&blsp1_spi1 { /* BLSP1 QUP1 */
+	pinctrl-0 = <&spi_0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
+
+	mx25l25635f@0 {
+		compatible = "mx25l25635f", "jedec,spi-nor";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		spi-max-frequency = <24000000>;
+		status = "okay";
+		m25p,fast-read;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition0@0 {
+				label = "SBL1";
+				reg = <0x00000000 0x00040000>;
+				read-only;
+			};
+			partition1@40000 {
+				label = "MIBIB";
+				reg = <0x00040000 0x00020000>;
+				read-only;
+			};
+			partition2@60000 {
+				label = "QSEE";
+				reg = <0x00060000 0x00060000>;
+				read-only;
+			};
+			partition3@c0000 {
+				label = "CDT";
+				reg = <0x000c0000 0x00010000>;
+				read-only;
+			};
+			partition4@d0000 {
+				label = "DDRPARAMS";
+				reg = <0x000d0000 0x00010000>;
+				read-only;
+			};
+			partition5@e0000 {
+				label = "APPSBL"; /* u-boot */
+				reg = <0x000e0000 0x00080000>;
+				/* U-Boot Standalone App "zloader" is located at 0x64000 */
+				read-only;
+			};
+			partition6@160000 {
+				label = "APPSBLENV"; /* u-boot env */
+				reg = <0x00160000 0x00010000>;
+			};
+			partition7@170000 {
+				/* make a backup of this partition! */
+				label = "ART";
+				reg = <0x00170000 0x00010000>;
+				read-only;
+			};
+			partition8@180000 {
+				label = "kernel";
+				reg = <0x00180000 0x00400000>;
+			};
+			partition9@580000 {
+				label = "dualflag";
+				reg = <0x00580000 0x00010000>;
+				read-only;
+			};
+			partition10@590000 {
+				label = "header";
+				reg = <0x00590000 0x00010000>;
+			};
+			partition11@5a0000 {
+				label = "romd";
+				reg = <0x005a0000 0x00100000>;
+				read-only;
+			};
+			partition12@6a0000 {
+				label = "not_root_data";
+				/*
+				 * for some strange reason, someone at ZyXEL
+				 * had the "great" idea to put the rootfs_data
+				 * in front of rootfs... Don't do that!
+				 * As a result this one, full MebiByte remains
+				 * unused.
+				 */
+				reg = <0x006a0000 0x00100000>;
+			};
+			partition13@7a0000 {
+				label = "rootfs";
+				reg = <0x007a0000 0x01860000>;
+			};
+		};
+	};
+};
+
+&cryptobam {
+	status = "okay";
+};
+
+&blsp_dma {
+	status = "okay";
+};
+
+&wifi0 {
+	status = "okay";
+};
+
+&wifi1 {
+	status = "okay";
+};
+
+&usb3_ss_phy {
+	status = "okay";
+};
+
+&usb3_hs_phy {
+	status = "okay";
+};
+
+&usb2_hs_phy {
+	status = "okay";
+};
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts
@ -15,7 +15,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -196,7 +195,7 @@
 	};
 };

-&spi_0 { /* BLSP1 QUP1 */
+&blsp1_spi1 { /* BLSP1 QUP1 */
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-wre6606.dts
@ -16,7 +16,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -158,7 +157,7 @@
 	};
 };

-&spi_0 {
+&blsp1_spi1 {
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a62.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-a62.dts
@ -16,7 +16,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -175,7 +174,7 @@
 	status = "okay";
 };

-&spi_0 {
+&blsp1_spi1 {
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
@ -212,19 +211,18 @@
 	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;

-	pcie@0 {
-		reg = <0 0 0 0 0>;
-		#interrupt-cells = <1>;
-		#size-cells = <2>;
+	bridge@0,0 {
+		reg = <0x00000000 0 0 0 0>;
 		#address-cells = <3>;
-		device_type = "pci";
+		#size-cells = <2>;
+		ranges;

-		ath10k@0,0 {
+		wifi2: wifi@0,0 {
 			compatible = "qcom,ath10k";
 			status = "okay";
-			reg = <0 0 0 0 0>;
-			device_type = "pci";
+			reg = <0x00010000 0 0 0 0>;
 			qcom,ath10k-calibration-variant = "OM-A62";
+			ieee80211-freq-limit = <5170000 5350000>;
 		};
 	};
 };
@ -237,4 +235,5 @@
 &wifi1 {
 	status = "okay";
 	qcom,ath10k-calibration-variant = "OM-A62";
+	ieee80211-freq-limit = <5470000 5875000>;
 };
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@ -98,7 +98,7 @@
 			status = "okay";
 		};

-		spi_0: spi@78b5000 {
+		spi0: spi@78b5000 {
 			pinctrl-0 = <&spi_0_pins>;
 			pinctrl-names = "default";
 			status = "okay";
@ -113,7 +113,7 @@
 			};
 		};

-		i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */
+		i2c0: i2c@78b7000 { /* BLSP1 QUP2 */
 			pinctrl-0 = <&i2c_0_pins>;
 			pinctrl-names = "default";

--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-rt-acrh17.dts
@ -0,0 +1,267 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ *
+ */
+
+#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/soc/qcom,tcsr.h>
+
+/ {
+	model = "ASUS RT-ACRH17";
+	compatible = "asus,rt-acrh17", "qcom,ipq4019";
+
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+		led-upgrade = &power;
+	};
+
+	soc {
+		mdio@90000 {
+			status = "okay";
+		};
+
+		ess-psgmii@98000 {
+			status = "okay";
+		};
+
+		tcsr@1949000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1949000 0x100>;
+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+		};
+
+		tcsr@194b000 {
+			compatible = "qcom,tcsr";
+			reg = <0x194b000 0x100>;
+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+		};
+
+		ess_tcsr@1953000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1953000 0x1000>;
+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+		};
+
+		tcsr@1957000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1957000 0x100>;
+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+		};
+
+		usb2@60f8800 {
+			status = "okay";
+		};
+
+		serial@78af000 {
+			pinctrl-0 = <&serial_pins>;
+			pinctrl-names = "default";
+			status = "okay";
+		};
+
+		usb3@8af8800 {
+			status = "okay";
+		};
+
+		crypto@8e3a000 {
+			status = "okay";
+		};
+
+		watchdog@b017000 {
+			status = "okay";
+		};
+
+		ess-switch@c000000 {
+			status = "okay";
+		};
+
+		edma@c080000 {
+			status = "okay";
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power: status {
+			label = "rt-acrh17:blue:status";
+			gpios = <&tlmm 40 GPIO_ACTIVE_LOW>;
+		};
+
+		lan1 {
+			label = "rt-acrh17:blue:lan1";
+			gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
+		};
+
+		lan2 {
+			label = "rt-acrh17:blue:lan2";
+			gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
+		};
+
+		lan3 {
+			label = "rt-acrh17:blue:lan3";
+			gpios = <&tlmm 42 GPIO_ACTIVE_LOW>;
+		};
+
+		lan4 {
+			label = "rt-acrh17:blue:lan4";
+			gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
+		};
+
+		wan_blue {
+			label = "rt-acrh17:blue:wan";
+			gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>;
+		};
+
+		wan_red {
+			label = "rt-acrh17:red:wan";
+			gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>;
+		};
+
+		wlan2g {
+			label = "rt-acrh17:blue:wlan2g";
+			gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
+		};
+
+		wlan5g {
+			label = "rt-acrh17:blue:wlan5g";
+			gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&cryptobam {
+	status = "okay";
+};
+
+&blsp_dma {
+	status = "okay";
+};
+
+&qpic_bam {
+	status = "okay";
+};
+
+&nand {
+	pinctrl-0 = <&nand_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+
+	nand@0 {
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "Bootloader";
+				reg = <0x000000000000 0x000000400000>;
+				read-only;
+			};
+			partition@1 {
+				label = "UBI_DEV";
+				reg = <0x000000400000 0x000007C00000>;
+			};
+		};
+	};
+};
+
+&tlmm {
+	serial_pins: serial_pinmux {
+		mux {
+			pins = "gpio16", "gpio17";
+			function = "blsp_uart0";
+			bias-disable;
+		};
+	};
+
+	nand_pins: nand_pins {
+		pullups {
+			pins = "gpio53", "gpio58",
+				 "gpio59";
+			function = "qpic";
+			bias-pull-up;
+		};
+
+		pulldowns {
+			pins = "gpio55", "gpio56",
+				 "gpio57", "gpio60",
+				 "gpio62", "gpio63", "gpio64",
+				 "gpio65", "gpio66", "gpio67",
+				 "gpio69";
+			function = "qpic";
+			bias-pull-down;
+		};
+	};
+};
+
+&pcie0 {
+	status = "okay";
+	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
+	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+
+	bridge@0,0 {
+		reg = <0x00000000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		wifi2: wifi@0,0 {
+			compatible = "qcom,ath10k";
+			status = "okay";
+			reg = <0x00010000 0 0 0 0>;
+		};
+	};
+};
+
+&wifi0 {
+	status = "okay";
+	qcom,ath10k-calibration-variant = "RT-ACRH17";
+};
+
+&usb3_ss_phy {
+	status = "okay";
+};
+
+&usb3_hs_phy {
+	status = "okay";
+};
+
+&usb2_hs_phy {
+	status = "okay";
+};
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts
@ -17,7 +17,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -163,7 +162,7 @@
 	status = "okay";
 };

-&spi_0 {
+&blsp1_spi1 {
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
@ -234,19 +233,7 @@
 };

 &gmac0 {
-	qcom,phy_mdio_addr = <4>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <2 0x20>;
-};
-
-&gmac1 {
-	qcom,phy_mdio_addr = <3>;
-	qcom,poll_required = <1>;
-	qcom,forced_speed = <1000>;
-	qcom,forced_duplex = <1>;
-	vlan_tag = <1 0x10>;
+	vlan_tag = <1 0x31>;
 };

 &usb3_ss_phy {
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts
@ -148,7 +148,7 @@
 	status = "okay";
 };

-&spi_0 {
+&blsp1_spi1 {
 	pinctrl-0 = <&spi_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
@ -248,6 +248,10 @@
 	};
 };

+&gmac0 {
+	vlan_tag = <1 0x39>;
+};
+
 &usb2_hs_phy {
 	status = "okay";
 };
--- a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts
+++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts
@ -12,7 +12,6 @@
 */

 #include "qcom-ipq4019.dtsi"
-#include "qcom-ipq4019-bus.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/soc/qcom,tcsr.h>
@ -144,7 +143,7 @@
 	vlan_tag = <0 0x20>;
 };

-&i2c_0 {
+&blsp1_i2c3{
 	pinctrl-0 = <&i2c_0_pins>;
 	pinctrl-names = "default";
 	status = "okay";
@ -156,7 +155,7 @@
 	};
 };

-&i2c_1 {
+&blsp1_i2c4{
 	pinctrl-0 = <&i2c_1_pins>;
 	pinctrl-names = "default";
 	status = "okay";
@ -272,6 +271,19 @@
 	status = "okay";
 	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 	wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
+
+	bridge@0,0 {
+		reg = <0x00000000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		ranges;
+
+		wifi2: wifi@0,0 {
+			compatible = "qcom,ath10k";
+			status = "okay";
+			reg = <0x00010000 0 0 0 0>;
+		};
+	};
 };

 &qpic_bam {
--- a/target/linux/ipq40xx/image/Makefile
+++ b/target/linux/ipq40xx/image/Makefile
@ -1,6 +1,8 @@
 include $(TOPDIR)/rules.mk
 include $(INCLUDE_DIR)/image.mk

+DEVICE_VARS += RAS_BOARD RAS_ROOTFS_SIZE RAS_VERSION
+
 define Device/Default
 	PROFILES := Default
 	KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
@ -69,11 +71,30 @@ define Device/asus_rt-ac58u
 #	to add a version... or we are very careful not to add '\0' into that
 #	string and call it a day.... Yeah, we do the latter!
 	UIMAGE_NAME:=$(shell echo -e '\03\01\01\01RT-AC58U')
+	KERNEL_INITRAMFS := $$(KERNEL) | uImage none
+	KERNEL_INITRAMFS_SUFFIX := -factory.trx
 	IMAGES := sysupgrade.bin
 	DEVICE_PACKAGES := kmod-usb-ledtrig-usbport
 endef
 TARGET_DEVICES += asus_rt-ac58u

+define Device/asus_rt-acrh17
+	$(call Device/FitImageLzma)
+	DEVICE_DTS := qcom-ipq4019-rt-acrh17
+	BLOCKSIZE := 128k
+	PAGESIZE := 2048
+	DTB_SIZE := 65536
+	DEVICE_TITLE := Asus RT-ACRH17
+	IMAGE_SIZE := 20439364
+	FILESYSTEMS := squashfs
+	UIMAGE_NAME:=$(shell echo -e '\03\01\01\01RT-AC82U')
+	KERNEL_INITRAMFS := $$(KERNEL) | uImage none
+	KERNEL_INITRAMFS_SUFFIX := -factory.trx
+	IMAGES := sysupgrade.bin
+	DEVICE_PACKAGES := ipq-wifi-rt-acrh17 ath10k-firmware-qca9984
+endef
+TARGET_DEVICES += asus_rt-acrh17
+
 define Device/avm_fritzbox-4040
 	$(call Device/FitImageLzma)
 	DEVICE_DTS := qcom-ipq4018-fritz4040
@ -205,6 +226,26 @@ define Device/qcom_ap-dk04.1-c1
 endef
 TARGET_DEVICES += qcom_ap-dk04.1-c1

+define Device/zyxel_nbg6617
+	$(call Device/FitImageLzma)
+	DEVICE_DTS := qcom-ipq4018-nbg6617
+	DEVICE_TITLE := ZyXEL NBG6617
+	ROOTFS_SIZE := 24960k
+	RAS_BOARD := NBG6617
+	RAS_ROOTFS_SIZE := 19840k
+	RAS_VERSION := "$(VERSION_DIST) $(REVISION)"
+	IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
+	IMAGES := sysupgrade.bin factory.bin
+#	The ZyXEL firmware allows flashing thru the web-gui only when the rootfs is
+#	at least as large as the one of the initial firmware image (not the current
+#	one on the device). This only applies to the Web-UI, the bootlaoder ignores
+#	this minimum-size. However, the larger image can be flashed both ways.
+	IMAGE/factory.bin := append-rootfs | pad-rootfs | check-size $$$$(ROOTFS_SIZE) | make-ras
+	IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-rootfs | check-size $$$$(ROOTFS_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata
+	DEVICE_PACKAGES := ipq-wifi-zyxel_nbg6617 uboot-envtools
+endef
+TARGET_DEVICES += zyxel_nbg6617
+
 define Device/zyxel_wre6606
 	$(call Device/FitImage)
 	DEVICE_TITLE := ZyXEL WRE6606
--- a/target/linux/ipq40xx/patches-4.14/059-ARM-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch
+++ b/target/linux/ipq40xx/patches-4.14/059-ARM-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch
@ -1,29 +0,0 @@
-From 04ca10340f1b4d92e849724d322a7ca225d11539 Mon Sep 17 00:00:00 2001
-From: Lina Iyer <lina.iyer@linaro.org>
-Date: Wed, 25 Mar 2015 14:25:29 -0600
-Subject: [PATCH 59/69] ARM: cpuidle: Add cpuidle support for QCOM cpus
-
-Define ARM_QCOM_CPUIDLE config item to enable cpuidle support.
-
-Cc: Stephen Boyd <sboyd@codeaurora.org>
-Cc: Arnd Bergmann <arnd@arndb.de>
-Cc: Kevin Hilman <khilman@linaro.org>
-Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
-Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
---
- drivers/cpuidle/Kconfig.arm | 7 +++++++
- 1 file changed, 7 insertions(+)
-
--- a/drivers/cpuidle/Kconfig.arm
-+++ b/drivers/cpuidle/Kconfig.arm
-@@ -75,3 +75,10 @@ config ARM_MVEBU_V7_CPUIDLE
- 	depends on ARCH_MVEBU && !ARM64
- 	help
- 	  Select this to enable cpuidle on Armada 370, 38x and XP processors.
-+
-+config ARM_QCOM_CPUIDLE
-+	bool "CPU Idle Driver for QCOM processors"
-+	depends on ARCH_QCOM
-+	select ARM_CPUIDLE
-+	help
-+	  Select this to enable cpuidle on QCOM processors.
--- a/target/linux/ipq40xx/patches-4.14/070-qcom-spm-fix-probe-order.patch
+++ b/target/linux/ipq40xx/patches-4.14/070-qcom-spm-fix-probe-order.patch
@ -1,6 +1,16 @@
-Check for SCM availability before attempting to use SPM
+From 341844c7e06afccd64261719fa388339a589b0a4 Mon Sep 17 00:00:00 2001
+From: Felix Fietkau <nbd@nbd.name>
+Date: Sun, 22 Jul 2018 12:53:04 +0200
+Subject: [PATCH] soc: qcom: spm: add SCM probe dependency
+
+Check for SCM availability before attempting to use SPM. SPM probe will
+fail otherwise.

 Signed-off-by: Felix Fietkau <nbd@nbd.name>
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ drivers/soc/qcom/spm.c | 3 +++
+ 1 file changed, 3 insertions(+)

 --- a/drivers/soc/qcom/spm.c
 +++ b/drivers/soc/qcom/spm.c
--- a/target/linux/ipq40xx/patches-4.14/071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch
+++ b/target/linux/ipq40xx/patches-4.14/071-qcom-ipq4019-use-v2-of-the-kpss-bringup-mechanism.patch
@ -1,23 +1,21 @@
-From 6a6c067b7ce2b3de4efbafddc134afbea3ddc1a3 Mon Sep 17 00:00:00 2001
+From 364123029d8d547336323fbd3d659ecd0bba913f Mon Sep 17 00:00:00 2001
 From: Matthew McClintock <mmcclint@codeaurora.org>
-Date: Fri, 8 Apr 2016 15:26:10 -0500
-Subject: [PATCH] qcom: ipq4019: use v2 of the kpss bringup mechanism
+Date: Mon, 23 Jul 2018 08:41:02 +0200
+Subject: [PATCH 5/8] qcom: ipq4019: use v2 of the kpss bringup mechanism

 v1 was the incorrect choice here and sometimes the board
 would not come up properly.

 Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
 Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: John Crispin <john@phrozen.org>
 ---
-Changes:
-	- moved L2-Cache to be a subnode of cpu0
---
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 32 ++++++++++++++++++++++++--------
- 1 file changed, 24 insertions(+), 8 deletions(-)
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 25 +++++++++++++++++--------
+ 1 file changed, 17 insertions(+), 8 deletions(-)

 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -36,19 +36,27 @@
+@@ -34,7 +34,8 @@
 		cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
@ -27,17 +25,7 @@ Changes:
 			qcom,acc = <&acc0>;
 			qcom,saw = <&saw0>;
 			reg = <0x0>;
- 			clocks = <&gcc GCC_APPS_CLK_SRC>;
- 			clock-frequency = <0>;
- 			operating-points-v2 = <&cpu0_opp_table>;
-+
-+			L2: l2-cache {
-+				compatible = "qcom,arch-cache";
-+				cache-level = <2>;
-+				qcom,saw = <&saw_l2>;
-+			};
- 		};
- 
+@@ -53,7 +54,8 @@
 		cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
@ -47,7 +35,7 @@ Changes:
 			qcom,acc = <&acc1>;
 			qcom,saw = <&saw1>;
 			reg = <0x1>;
-@@ -60,7 +68,8 @@
+@@ -64,7 +66,8 @@
 		cpu@2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
@ -57,7 +45,7 @@ Changes:
 			qcom,acc = <&acc2>;
 			qcom,saw = <&saw2>;
 			reg = <0x2>;
-@@ -72,7 +81,8 @@
+@@ -75,13 +78,20 @@
 		cpu@3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
@ -67,34 +55,46 @@ Changes:
 			qcom,acc = <&acc3>;
 			qcom,saw = <&saw3>;
 			reg = <0x3>;
-@@ -265,22 +275,22 @@
+ 			clocks = <&gcc GCC_APPS_CLK_SRC>;
+ 			clock-frequency = <0>;
+ 		};
+
+		L2: l2-cache {
+			compatible = "cache";
+			cache-level = <2>;
+			qcom,saw = <&saw_l2>;
+		};
+ 	};
+ 
+ 	pmu {
+@@ -213,22 +223,22 @@
 		};
 
                 acc0: clock-controller@b088000 {
 -                        compatible = "qcom,kpss-acc-v1";
-+                        compatible = "qcom,kpss-acc-v2";
+			compatible = "qcom,kpss-acc-v2";
                         reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
                 };
 
                 acc1: clock-controller@b098000 {
 -                        compatible = "qcom,kpss-acc-v1";
-+                        compatible = "qcom,kpss-acc-v2";
+			compatible = "qcom,kpss-acc-v2";
                         reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
                 };
 
                 acc2: clock-controller@b0a8000 {
 -                        compatible = "qcom,kpss-acc-v1";
-+                        compatible = "qcom,kpss-acc-v2";
+			compatible = "qcom,kpss-acc-v2";
                         reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
                 };
 
                 acc3: clock-controller@b0b8000 {
 -                        compatible = "qcom,kpss-acc-v1";
-+                        compatible = "qcom,kpss-acc-v2";
+			compatible = "qcom,kpss-acc-v2";
                         reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
                 };
 
-@@ -308,6 +318,12 @@
+@@ -256,6 +266,12 @@
                         regulator;
                 };
 
--- a/target/linux/ipq40xx/patches-4.14/072-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch
+++ b/target/linux/ipq40xx/patches-4.14/072-qcom-ipq4019-add-cpu-operating-points-for-cpufreq-su.patch
@ -1,19 +1,20 @@
-From 18c3b42575a154343831aec0637aab00e19440e1 Mon Sep 17 00:00:00 2001
+From 544af73985cd14b450bb8e8a6c22b89a555ac729 Mon Sep 17 00:00:00 2001
 From: Matthew McClintock <mmcclint@codeaurora.org>
-Date: Thu, 17 Mar 2016 15:01:09 -0500
-Subject: [PATCH 17/69] qcom: ipq4019: add cpu operating points for cpufreq
+Date: Mon, 23 Jul 2018 09:10:35 +0200
+Subject: [PATCH 6/8] qcom: ipq4019: add cpu operating points for cpufreq
 support

 This adds some operating points for cpu frequeny scaling

 Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
+Signed-off-by: John Crispin <john@phrozen.org>
 ---
 arch/arm/boot/dts/qcom-ipq4019.dtsi | 34 ++++++++++++++++++++++++++--------
 1 file changed, 26 insertions(+), 8 deletions(-)

 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -40,14 +40,7 @@
+@@ -41,14 +41,7 @@
 			reg = <0x0>;
 			clocks = <&gcc GCC_APPS_CLK_SRC>;
 			clock-frequency = <0>;
@ -29,7 +30,7 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
 		};
 
 		cpu@1 {
-@@ -59,6 +52,7 @@
+@@ -61,6 +54,7 @@
 			reg = <0x1>;
 			clocks = <&gcc GCC_APPS_CLK_SRC>;
 			clock-frequency = <0>;
@ -37,7 +38,7 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
 		};
 
 		cpu@2 {
-@@ -70,6 +64,7 @@
+@@ -73,6 +67,7 @@
 			reg = <0x2>;
 			clocks = <&gcc GCC_APPS_CLK_SRC>;
 			clock-frequency = <0>;
@ -45,14 +46,18 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
 		};
 
 		cpu@3 {
-@@ -81,6 +76,29 @@
+@@ -85,6 +80,7 @@
 			reg = <0x3>;
 			clocks = <&gcc GCC_APPS_CLK_SRC>;
 			clock-frequency = <0>;
 +			operating-points-v2 = <&cpu0_opp_table>;
-+		};
-+	};
-+
+ 		};
+ 
+ 		L2: l2-cache {
+@@ -94,6 +90,28 @@
+ 		};
+ 	};
+ 
 +	cpu0_opp_table: opp_table0 {
 +		compatible = "operating-points-v2";
 +		opp-shared;
@ -72,6 +77,9 @@ Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
 +		opp-716000000 {
 +			opp-hz = /bits/ 64 <716000000>;
 +			clock-latency-ns = <256000>;
- 		};
- 	};
- 
+		};
+	};
+
+ 	pmu {
+ 		compatible = "arm,cortex-a7-pmu";
+ 		interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
--- a/target/linux/ipq40xx/patches-4.14/073-qcom-ipq4019-fix-cpu0-s-qcom-saw2-reg-value.patch
+++ b/target/linux/ipq40xx/patches-4.14/073-qcom-ipq4019-fix-cpu0-s-qcom-saw2-reg-value.patch
@ -0,0 +1,33 @@
+From d60e006ec0e425877aacc61c7ece3da0434a8fce Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Mon, 23 Jul 2018 16:34:54 +0200
+Subject: [PATCH 7/8] qcom: ipq4019: fix cpu0's qcom,saw2 reg value
+
+while compiling an ipq4019 target, dtc will complain:
+regulator@b089000 unit address format error, expected "2089000"
+
+The saw0 regulator reg value seems to be
+copied and pasted from qcom-ipq8064.dtsi.
+
+This patch fixes the reg value to match that of the
+unit address which in turn silences the warning.
+(There is no driver for qcom,saw2 right now.
+So this went unnoticed)
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -262,7 +262,7 @@
+ 
+                 saw0: regulator@b089000 {
+                         compatible = "qcom,saw2";
+-                        reg = <0x02089000 0x1000>, <0x0b009000 0x1000>;
+			reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
+                         regulator;
+                 };
+ 
--- a/target/linux/ipq40xx/patches-4.14/074-ARM-qcom-Add-IPQ4019-SoC-support.patch
+++ b/target/linux/ipq40xx/patches-4.14/074-ARM-qcom-Add-IPQ4019-SoC-support.patch
@ -1,11 +1,12 @@
-From e7748d641ae37081e2034869491f1629461ae13c Mon Sep 17 00:00:00 2001
+From 89b43d59ec8c9cda588555eb1f2754dd19ef5144 Mon Sep 17 00:00:00 2001
 From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sat, 19 Nov 2016 00:58:18 +0100
-Subject: [PATCH] ARM: qcom: Add IPQ4019 SoC support
+Date: Sun, 22 Jul 2018 12:07:57 +0200
+Subject: [PATCH 8/8] ARM: qcom: Add IPQ4019 SoC support

 Add support for the Qualcomm Atheros IPQ4019 SoC.

 Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: John Crispin <john@phrozen.org>
 ---
 arch/arm/Makefile          | 1 +
 arch/arm/mach-qcom/Kconfig | 5 +++++
@ -13,14 +14,14 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>

 --- a/arch/arm/Makefile
 +++ b/arch/arm/Makefile
-@@ -149,6 +149,7 @@ textofs-$(CONFIG_SA1111) := 0x00208000
- endif
+@@ -150,6 +150,7 @@ endif
 textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
 textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
-+textofs-$(CONFIG_ARCH_IPQ40XX) := 0x00208000
 textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
+textofs-$(CONFIG_ARCH_IPQ40XX) := 0x00208000
 
 # Machine directory name.  This list is sorted alphanumerically
+ # by CONFIG_* macro name.
 --- a/arch/arm/mach-qcom/Kconfig
 +++ b/arch/arm/mach-qcom/Kconfig
@@ -27,4 +27,9 @@ config ARCH_MDM9615
--- a/target/linux/ipq40xx/patches-4.14/075-dt-bindings-phy-qcom-ipq4019-usb-add-binding-documen.patch
+++ b/target/linux/ipq40xx/patches-4.14/075-dt-bindings-phy-qcom-ipq4019-usb-add-binding-documen.patch
@ -0,0 +1,38 @@
+From 5f01733dc755dfadfa51b7b3c6c160e632fc6002 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Tue, 24 Jul 2018 15:09:36 +0200
+Subject: [PATCH 1/3] dt-bindings: phy-qcom-ipq4019-usb: add binding document
+
+This patch adds the binding documentation for the HS/SS USB PHY found
+inside Qualcom Dakota SoCs.
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ .../bindings/phy/phy-qcom-ipq4019-usb.txt           | 21 +++++++++++++++++++++
+ 1 file changed, 21 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
+
+--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-qcom-ipq4019-usb.txt
+@@ -0,0 +1,21 @@
+Qualcom Dakota HS/SS USB PHY
+
+Required properties:
+ - compatible: "qcom,usb-ss-ipq4019-phy",
+	       "qcom,usb-hs-ipq4019-phy"
+ - reg: offset and length of the registers
+ - #phy-cells: should be 0
+ - resets: the reset controllers as listed below
+ - reset-names: the names of the reset controllers
+	"por_rst" - the POR reset line for SS and HS phys
+	"srif_rst" - the SRIF reset line for HS phys
+Example:
+
+hsphy@a8000 {
+	compatible = "qcom,usb-hs-ipq4019-phy";
+	phy-cells = <0>;
+	reg = <0xa8000 0x40>;
+	resets = <&gcc USB2_HSPHY_POR_ARES>,
+		 <&gcc USB2_HSPHY_S_ARES>;
+	reset-names = "por_rst", "srif_rst";
+};
--- a/target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch
+++ b/target/linux/ipq40xx/patches-4.14/076-phy-qcom-ipq4019-usb-add-driver-for-QCOM-IPQ4019.patch
@ -0,0 +1,233 @@
+From 633f0e08498aebfdb932bd71319b4cb136709499 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Tue, 24 Jul 2018 14:45:49 +0200
+Subject: [PATCH 2/3] phy: qcom-ipq4019-usb: add driver for QCOM/IPQ4019
+
+Add a driver to setup the USB phy on Qualcom Dakota SoCs.
+The driver sets up HS and SS phys. In case of HS some magic values need to
+be written to magic offsets. These were taken from the SDK driver.
+
+Signed-off-by: John Crispin <john@phrozen.org>
+---
+ drivers/phy/qualcomm/Kconfig                |   7 ++
+ drivers/phy/qualcomm/Makefile               |   1 +
+ drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c | 188 ++++++++++++++++++++++++++++
+ 3 files changed, 196 insertions(+)
+ create mode 100644 drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
+
+--- a/drivers/phy/qualcomm/Kconfig
+++ b/drivers/phy/qualcomm/Kconfig
+@@ -8,6 +8,13 @@ config PHY_QCOM_APQ8064_SATA
+ 	depends on OF
+ 	select GENERIC_PHY
+ 
+config PHY_QCOM_IPQ4019_USB
+	tristate "Qualcomm IPQ4019 USB PHY module"
+	depends on OF && ARCH_QCOM
+	select GENERIC_PHY
+	help
+	  Support for the USB PHY on QCOM IPQ4019/Dakota chipsets.
+
+ config PHY_QCOM_IPQ806X_SATA
+ 	tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
+ 	depends on ARCH_QCOM
+--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c
+@@ -0,0 +1,188 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of_platform.h>
+#include <linux/phy/phy.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+/*
+ * Magic registers copied from the SDK driver code
+ */
+#define PHY_CTRL0_ADDR	0x000
+#define PHY_CTRL1_ADDR	0x004
+#define PHY_CTRL2_ADDR	0x008
+#define PHY_CTRL3_ADDR	0x00C
+#define PHY_CTRL4_ADDR	0x010
+#define PHY_MISC_ADDR	0x024
+#define PHY_IPG_ADDR	0x030
+
+#define PHY_CTRL0_VAL	0xA4600015
+#define PHY_CTRL1_VAL	0x09500000
+#define PHY_CTRL2_VAL	0x00058180
+#define PHY_CTRL3_VAL	0x6DB6DCD6
+#define PHY_CTRL4_VAL	0x836DB6DB
+#define PHY_MISC_VAL	0x3803FB0C
+#define PHY_IPG_VAL	0x47323232
+
+struct ipq4019_usb_phy {
+	struct device		*dev;
+	struct phy		*phy;
+	void __iomem		*base;
+	struct reset_control	*por_rst;
+	struct reset_control	*srif_rst;
+};
+
+static int ipq4019_ss_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	reset_control_assert(phy->por_rst);
+	msleep(10);
+
+	return 0;
+}
+
+static int ipq4019_ss_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	ipq4019_ss_phy_power_off(_phy);
+
+	reset_control_deassert(phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_ss_phy_ops = {
+	.power_on	= ipq4019_ss_phy_power_on,
+	.power_off	= ipq4019_ss_phy_power_off,
+};
+
+static int ipq4019_hs_phy_power_off(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	reset_control_assert(phy->por_rst);
+	msleep(10);
+
+	reset_control_assert(phy->srif_rst);
+	msleep(10);
+
+	return 0;
+}
+
+static int ipq4019_hs_phy_power_on(struct phy *_phy)
+{
+	struct ipq4019_usb_phy *phy = phy_get_drvdata(_phy);
+
+	ipq4019_hs_phy_power_off(_phy);
+
+	reset_control_deassert(phy->srif_rst);
+	msleep(10);
+
+	writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
+	writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
+	writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
+	writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
+	writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
+	writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
+	writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
+	msleep(10);
+
+	reset_control_deassert(phy->por_rst);
+
+	return 0;
+}
+
+static struct phy_ops ipq4019_usb_hs_phy_ops = {
+	.power_on	= ipq4019_hs_phy_power_on,
+	.power_off	= ipq4019_hs_phy_power_off,
+};
+
+static const struct of_device_id ipq4019_usb_phy_of_match[] = {
+	{ .compatible = "qcom,usb-hs-ipq4019-phy", .data = &ipq4019_usb_hs_phy_ops},
+	{ .compatible = "qcom,usb-ss-ipq4019-phy", .data = &ipq4019_usb_ss_phy_ops},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, ipq4019_usb_phy_of_match);
+
+static int ipq4019_usb_phy_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct resource *res;
+	struct phy_provider *phy_provider;
+	struct ipq4019_usb_phy *phy;
+	const struct of_device_id *match;
+
+	match = of_match_device(ipq4019_usb_phy_of_match, &pdev->dev);
+	if (!match)
+		return -ENODEV;
+
+	phy = devm_kzalloc(dev, sizeof(*phy), GFP_KERNEL);
+	if (!phy)
+		return -ENOMEM;
+
+	phy->dev = &pdev->dev;
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	phy->base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(phy->base)) {
+		dev_err(dev, "failed to remap register memory\n");
+		return PTR_ERR(phy->base);
+	}
+
+	phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
+	if (IS_ERR(phy->por_rst)) {
+		if (PTR_ERR(phy->por_rst) != -EPROBE_DEFER)
+			dev_err(dev, "POR reset is missing\n");
+		return PTR_ERR(phy->por_rst);
+	}
+
+	phy->srif_rst = devm_reset_control_get_optional(phy->dev, "srif_rst");
+	if (IS_ERR(phy->srif_rst))
+		return PTR_ERR(phy->srif_rst);
+
+	phy->phy = devm_phy_create(dev, NULL, match->data);
+	if (IS_ERR(phy->phy)) {
+		dev_err(dev, "failed to create PHY\n");
+		return PTR_ERR(phy->phy);
+	}
+	phy_set_drvdata(phy->phy, phy);
+
+	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
+
+	return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static struct platform_driver ipq4019_usb_phy_driver = {
+	.probe	= ipq4019_usb_phy_probe,
+	.driver = {
+		.of_match_table	= ipq4019_usb_phy_of_match,
+		.name  = "ipq4019-usb-phy",
+	}
+};
+module_platform_driver(ipq4019_usb_phy_driver);
+
+MODULE_DESCRIPTION("QCOM/IPQ4019 USB phy driver");
+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+MODULE_LICENSE("GPL v2");
+--- a/drivers/phy/qualcomm/Makefile
+++ b/drivers/phy/qualcomm/Makefile
+@@ -1,5 +1,6 @@
+ # SPDX-License-Identifier: GPL-2.0
+ obj-$(CONFIG_PHY_QCOM_APQ8064_SATA)	+= phy-qcom-apq8064-sata.o
+obj-$(CONFIG_PHY_QCOM_IPQ4019_USB)	+= phy-qcom-ipq4019-usb.o
+ obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA)	+= phy-qcom-ipq806x-sata.o
+ obj-$(CONFIG_PHY_QCOM_QMP)		+= phy-qcom-qmp.o
+ obj-$(CONFIG_PHY_QCOM_QUSB2)		+= phy-qcom-qusb2.o
--- a/target/linux/ipq40xx/patches-4.14/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch
+++ b/target/linux/ipq40xx/patches-4.14/306-qcom-ipq4019-add-USB-nodes-to-ipq4019-SoC-device-tre.patch
@ -1,25 +1,15 @@
-From ea5f4d6f4716f3a0bb4fc3614b7a0e8c0df1cb81 Mon Sep 17 00:00:00 2001
-From: Matthew McClintock <mmcclint@codeaurora.org>
-Date: Thu, 17 Mar 2016 16:22:28 -0500
-Subject: [PATCH] qcom: ipq4019: add USB nodes to ipq4019 SoC device tree
+From 1fc7d5523e21ed140fed43c4dde011a3b6d9ba08 Mon Sep 17 00:00:00 2001
+From: John Crispin <john@phrozen.org>
+Date: Tue, 24 Jul 2018 14:47:55 +0200
+Subject: [PATCH 3/3] qcom: ipq4019: add USB devicetree nodes

-This adds the SoC nodes to the ipq4019 device tree and
-enable it for the DK01.1 board.
+This patch makes USB work on the Dakota EVB.

-Signed-off-by: Matthew McClintock <mmcclint@codeaurora.org>
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
-Changes:
-	- replaced space with tab
-	- added sleep and mock_utmi clocks
-	- added registers for usb2 and usb3 parent node
-	- changed compatible to qca,ipa4019-dwc3
-	- updated usb2 and usb3 names
-	  (included the reg - in case they become necessary later)
+Signed-off-by: John Crispin <john@phrozen.org>
 ---
 arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 ++++++++
- arch/arm/boot/dts/qcom-ipq4019.dtsi           | 71 +++++++++++++++++++++++++++
- 2 files changed, 91 insertions(+)
+ arch/arm/boot/dts/qcom-ipq4019.dtsi           | 74 +++++++++++++++++++++++++++
+ 2 files changed, 94 insertions(+)

 --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@ -51,13 +41,14 @@ Changes:
 };
 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -539,5 +539,76 @@
+@@ -410,5 +410,79 @@
 					  "legacy";
 			status = "disabled";
 		};
 +
 +		usb3_ss_phy: ssphy@9a000 {
-+			compatible = "qca,uni-ssphy";
+			compatible = "qcom,usb-ss-ipq4019-phy";
+			#phy-cells = <0>;
 +			reg = <0x9a000 0x800>;
 +			reg-names = "phy_base";
 +			resets = <&gcc USB3_UNIPHY_PHY_ARES>;
@ -66,7 +57,8 @@ Changes:
 +		};
 +
 +		usb3_hs_phy: hsphy@a6000 {
-+			compatible = "qca,baldur-usb3-hsphy";
+			compatible = "qcom,usb-hs-ipq4019-phy";
+			#phy-cells = <0>;
 +			reg = <0xa6000 0x40>;
 +			reg-names = "phy_base";
 +			resets = <&gcc USB3_HSPHY_POR_ARES>, <&gcc USB3_HSPHY_S_ARES>;
@ -75,7 +67,7 @@ Changes:
 +		};
 +
 +		usb3@8af8800 {
-+			compatible = "qca,ipq4019-dwc3";
+			compatible = "qcom,dwc3";
 +			reg = <0x8af8800 0x100>;
 +			#address-cells = <1>;
 +			#size-cells = <1>;
@ -90,14 +82,15 @@ Changes:
 +				compatible = "snps,dwc3";
 +				reg = <0x8a00000 0xf8000>;
 +				interrupts = <0 132 0>;
-+				usb-phy = <&usb3_hs_phy>, <&usb3_ss_phy>;
+				phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
 +				phy-names = "usb2-phy", "usb3-phy";
 +				dr_mode = "host";
 +			};
 +		};
 +
 +		usb2_hs_phy: hsphy@a8000 {
-+			compatible = "qca,baldur-usb2-hsphy";
+			compatible = "qcom,usb-hs-ipq4019-phy";
+			#phy-cells = <0>;
 +			reg = <0xa8000 0x40>;
 +			reg-names = "phy_base";
 +			resets = <&gcc USB2_HSPHY_POR_ARES>, <&gcc USB2_HSPHY_S_ARES>;
@ -106,7 +99,7 @@ Changes:
 +		};
 +
 +		usb2@60f8800 {
-+			compatible = "qca,ipq4019-dwc3";
+			compatible = "qcom,dwc3";
 +			reg = <0x60f8800 0x100>;
 +			#address-cells = <1>;
 +			#size-cells = <1>;
@ -121,7 +114,7 @@ Changes:
 +				compatible = "snps,dwc3";
 +				reg = <0x6000000 0xf8000>;
 +				interrupts = <0 136 0>;
-+				usb-phy = <&usb2_hs_phy>;
+				phys = <&usb2_hs_phy>;
 +				phy-names = "usb2-phy";
 +				dr_mode = "host";
 +			};
--- a/target/linux/ipq40xx/patches-4.14/078-ARM-dts-ipq4019-Add-a-few-peripheral-nodes.patch
+++ b/target/linux/ipq40xx/patches-4.14/078-ARM-dts-ipq4019-Add-a-few-peripheral-nodes.patch
@ -1,42 +1,85 @@
-From patchwork Mon Jan 29 05:11:16 2018
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [02/15] ARM: dts: ipq4019: Add a few peripheral nodes
+From 187519403273f0599c848d20eca9acce8b1807a5 Mon Sep 17 00:00:00 2001
 From: Sricharan R <sricharan@codeaurora.org>
-X-Patchwork-Id: 10189263
-Message-Id: <1517202689-14212-3-git-send-email-sricharan@codeaurora.org>
-To: robh+dt@kernel.org, robh@kernel.org, mark.rutland@arm.com,
- linux@armlinux.org.uk, andy.gross@linaro.org, david.brown@linaro.org, 
- catalin.marinas@arm.com, will.deacon@arm.com, sboyd@codeaurora.org,
- bjorn.andersson@linaro.org, devicetree@vger.kernel.org,
- linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
- linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org
-Cc: sricharan@codeaurora.org
-Date: Mon, 29 Jan 2018 10:41:16 +0530
+Date: Fri, 25 May 2018 11:41:12 +0530
+Subject: [PATCH] ARM: dts: ipq4019: Add a few peripheral nodes

 Now with the driver updates for some peripherals being there,
 add i2c, spi, pcie, bam, qpic-nand, scm nodes to enhance the available
 peripheral support.

+Reviewed-by: Abhishek Sahu <absahu@codeaurora.org>
 Signed-off-by: Sricharan R <sricharan@codeaurora.org>
+Signed-off-by: Andy Gross <andy.gross@linaro.org>
 ---
- arch/arm/boot/dts/qcom-ipq4019.dtsi | 134 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 134 insertions(+)
+ arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi |   2 +-
+ arch/arm/boot/dts/qcom-ipq4019.dtsi           | 156 ++++++++++++++++++++++++--
+ 2 files changed, 146 insertions(+), 12 deletions(-)

+--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+@@ -61,7 +61,7 @@
+ 			status = "ok";
+ 		};
+ 
+-		spi_0: spi@78b5000 {
+		spi@78b5000 {
+ 			pinctrl-0 = <&spi_0_pins>;
+ 			pinctrl-names = "default";
+ 			status = "ok";
 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -25,7 +25,9 @@
+@@ -24,8 +24,10 @@
+ 	interrupt-parent = <&intc>;
 
 	aliases {
- 		spi0 = &spi_0;
-+		spi1 = &spi_1;
- 		i2c0 = &i2c_0;
-+		i2c1 = &i2c_1;
+-		spi0 = &spi_0;
+-		i2c0 = &i2c_0;
+		spi0 = &blsp1_spi1;
+		spi1 = &blsp1_spi2;
+		i2c0 = &blsp1_i2c3;
+		i2c1 = &blsp1_i2c4;
 	};
 
 	cpus {
-@@ -190,6 +192,22 @@
+@@ -132,6 +134,12 @@
+ 		};
+ 	};
+ 
+	firmware {
+		scm {
+			compatible = "qcom,scm-ipq4019";
+		};
+	};
+
+ 	timer {
+ 		compatible = "arm,armv7-timer";
+ 		interrupts = <1 2 0xf08>,
+@@ -177,13 +185,13 @@
+ 			#gpio-cells = <2>;
+ 			interrupt-controller;
+ 			#interrupt-cells = <2>;
+-			interrupts = <0 208 0>;
+			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+ 		};
+ 
+ 		blsp_dma: dma@7884000 {
+ 			compatible = "qcom,bam-v1.7.0";
+ 			reg = <0x07884000 0x23000>;
+-			interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
+			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&gcc GCC_BLSP1_AHB_CLK>;
+ 			clock-names = "bam_clk";
+ 			#dma-cells = <1>;
+@@ -191,7 +199,7 @@
+ 			status = "disabled";
+ 		};
+ 
+-		spi_0: spi@78b5000 {
+		blsp1_spi1: spi@78b5000 { /* BLSP1 QUP1 */
+ 			compatible = "qcom,spi-qup-v2.2.1";
+ 			reg = <0x78b5000 0x600>;
+ 			interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+@@ -200,10 +208,26 @@
 			clock-names = "core", "iface";
 			#address-cells = <1>;
 			#size-cells = <0>;
@ -45,7 +88,7 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
 +			status = "disabled";
 +		};
 +
-+		spi_1: spi@78b6000 { /* BLSP1 QUP2 */
+		blsp1_spi2: spi@78b6000 { /* BLSP1 QUP2 */
 +			compatible = "qcom,spi-qup-v2.2.1";
 +			reg = <0x78b6000 0x600>;
 +			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
@ -59,7 +102,12 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
 			status = "disabled";
 		};
 
-@@ -202,9 +220,24 @@
+-		i2c_0: i2c@78b7000 {
+		blsp1_i2c3: i2c@78b7000 { /* BLSP1 QUP3 */
+ 			compatible = "qcom,i2c-qup-v2.2.1";
+ 			reg = <0x78b7000 0x600>;
+ 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+@@ -212,14 +236,29 @@
 			clock-names = "iface", "core";
 			#address-cells = <1>;
 			#size-cells = <0>;
@ -68,7 +116,7 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
 			status = "disabled";
 		};
 
-+		i2c_1: i2c@78b8000 { /* BLSP1 QUP4 */
+		blsp1_i2c4: i2c@78b8000 { /* BLSP1 QUP4 */
 +			compatible = "qcom,i2c-qup-v2.2.1";
 +			reg = <0x78b8000 0x600>;
 +			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
@ -84,7 +132,31 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
 
 		cryptobam: dma@8e04000 {
 			compatible = "qcom,bam-v1.7.0";
-@@ -311,6 +344,101 @@
+ 			reg = <0x08e04000 0x20000>;
+-			interrupts = <GIC_SPI 207 0>;
+			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+ 			clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
+ 			clock-names = "bam_clk";
+ 			#dma-cells = <1>;
+@@ -293,7 +332,7 @@
+ 		serial@78af000 {
+ 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ 			reg = <0x78af000 0x200>;
+-			interrupts = <0 107 0>;
+			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ 			status = "disabled";
+ 			clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
+ 				<&gcc GCC_BLSP1_AHB_CLK>;
+@@ -305,7 +344,7 @@
+ 		serial@78b0000 {
+ 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ 			reg = <0x78b0000 0x200>;
+-			interrupts = <0 108 0>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ 			status = "disabled";
+ 			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
+ 				<&gcc GCC_BLSP1_AHB_CLK>;
+@@ -327,6 +366,101 @@
 			reg = <0x4ab000 0x4>;
 		};
 
@ -105,7 +177,7 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
 +			ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000
 +				  0x82000000 0 0x48000000 0x48000000 0 0x10000000>;
 +
-+			interrupts = <GIC_SPI 141 IRQ_TYPE_NONE>;
+			interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>;
 +			interrupt-names = "msi";
 +			#interrupt-cells = <1>;
 +			interrupt-map-mask = <0 0 0 0x7>;
@ -186,3 +258,21 @@ Signed-off-by: Sricharan R <sricharan@codeaurora.org>
 		wifi0: wifi@a000000 {
 			compatible = "qcom,ipq4019-wifi";
 			reg = <0xa000000 0x200000>;
+@@ -360,7 +494,7 @@
+ 				     <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
+-				     <GIC_SPI 168 IRQ_TYPE_NONE>;
+				     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ 			interrupt-names =  "msi0",  "msi1",  "msi2",  "msi3",
+ 					   "msi4",  "msi5",  "msi6",  "msi7",
+ 					   "msi8",  "msi9", "msi10", "msi11",
+@@ -402,7 +536,7 @@
+ 				     <GIC_SPI 61 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 62 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 63 IRQ_TYPE_EDGE_RISING>,
+-				     <GIC_SPI 169 IRQ_TYPE_NONE>;
+				     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ 			interrupt-names =  "msi0",  "msi1",  "msi2",  "msi3",
+ 					   "msi4",  "msi5",  "msi6",  "msi7",
+ 					   "msi8",  "msi9", "msi10", "msi11",
--- a/target/linux/ipq40xx/patches-4.14/079-ARM-dts-ipq4019-fix-PCI-range.patch
+++ b/target/linux/ipq40xx/patches-4.14/079-ARM-dts-ipq4019-fix-PCI-range.patch
@ -12,12 +12,12 @@ Signed-off-by: Mathias Kresin <dev@kresin.me>

 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -359,7 +359,7 @@
+@@ -381,7 +381,7 @@
 			#size-cells = <2>;
 
 			ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000
 -				  0x82000000 0 0x48000000 0x48000000 0 0x10000000>;
 +				  0x82000000 0 0x40300000 0x40300000 0 0x400000>;
 
- 			interrupts = <GIC_SPI 141 IRQ_TYPE_NONE>;
+ 			interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>;
 			interrupt-names = "msi";
--- a/target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch
+++ b/target/linux/ipq40xx/patches-4.14/080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch
@ -61,7 +61,7 @@ Origin: other, https://patchwork.kernel.org/patch/10339127/

 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -166,6 +166,7 @@
+@@ -182,6 +182,7 @@
 			compatible = "qcom,ipq4019-pinctrl";
 			reg = <0x01000000 0x300000>;
 			gpio-controller;
--- a/target/linux/ipq40xx/patches-4.14/081-clk-fix-apss-cpu-overclocking.patch
+++ b/target/linux/ipq40xx/patches-4.14/081-clk-fix-apss-cpu-overclocking.patch
@ -1,7 +1,7 @@
-From 12e9319da1adacac92930c899c99f0e1970cac11 Mon Sep 17 00:00:00 2001
+From f2b87dc1028b710ec8ce25808b9d21f92b376184 Mon Sep 17 00:00:00 2001
 From: Christian Lamparter <chunkeey@googlemail.com>
-Date: Thu, 11 Mar 2018 14:41:31 +0100
-Subject: [PATCH] clk: fix apss cpu overclocking
+Date: Sun, 11 Mar 2018 14:41:31 +0100
+Subject: [PATCH 2/2] clk: fix apss cpu overclocking

 There's an interaction issue between the clk changes:"
 clk: qcom: ipq4019: Add the apss cpu pll divider clock node
@ -37,7 +37,11 @@ try to overclock to 761 MHz.

 Fixes: d83dcacea18 ("clk: qcom: ipq4019: Add the apss cpu pll divider clock node")
 Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+Signed-off-by: John Crispin <john@phrozen.org>
 ---
+ drivers/clk/qcom/gcc-ipq4019.c | 34 +++++++++++++++++++++++++++++++---
+ 1 file changed, 31 insertions(+), 3 deletions(-)
+
 --- a/drivers/clk/qcom/gcc-ipq4019.c
 +++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1253,6 +1253,29 @@ static const struct clk_fepll_vco gcc_fe
--- a/target/linux/ipq40xx/patches-4.14/082-ARM-dts-ipq4019-Add-TZ-and-SMEM-reserved-regions.patch
+++ b/target/linux/ipq40xx/patches-4.14/082-ARM-dts-ipq4019-Add-TZ-and-SMEM-reserved-regions.patch
@ -84,5 +84,5 @@ this change qualifies for a stable@vger.kernel.org submission.
 +	};
 +
 	aliases {
- 		spi0 = &spi_0;
- 		spi1 = &spi_1;
+ 		spi0 = &blsp1_spi1;
+ 		spi1 = &blsp1_spi2;
--- a/target/linux/ipq40xx/patches-4.14/083-mtd-nand-add-Winbond-manufacturer-and-chip.patch
+++ b/target/linux/ipq40xx/patches-4.14/083-mtd-nand-add-Winbond-manufacturer-and-chip.patch
--- a/target/linux/ipq40xx/patches-4.14/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch
+++ b/target/linux/ipq40xx/patches-4.14/303-spi-nor-enable-4B-opcodes-for-mx25l25635f.patch
@ -0,0 +1,62 @@
+--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
+@@ -1025,6 +1025,7 @@ static const struct flash_info spi_nor_i
+ 	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
+ 	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
+ 	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ "mx25l25635f", INFO(0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ 	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
+ 	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
+ 	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+@@ -1189,11 +1190,12 @@ static const struct flash_info spi_nor_i
+ 	{ },
+ };
+ 
+-static const struct flash_info *spi_nor_read_id(struct spi_nor *nor)
+static const struct flash_info *spi_nor_read_id(struct spi_nor *nor,
+						const char *name)
+ {
+ 	int			tmp;
+ 	u8			id[SPI_NOR_MAX_ID_LEN];
+-	const struct flash_info	*info;
+	const struct flash_info	*info, *first_match = NULL;
+ 
+ 	tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
+ 	if (tmp < 0) {
+@@ -1204,10 +1206,16 @@ static const struct flash_info *spi_nor_
+ 	for (tmp = 0; tmp < ARRAY_SIZE(spi_nor_ids) - 1; tmp++) {
+ 		info = &spi_nor_ids[tmp];
+ 		if (info->id_len) {
+-			if (!memcmp(info->id, id, info->id_len))
+-				return &spi_nor_ids[tmp];
+			if (!memcmp(info->id, id, info->id_len)) {
+				if (!name || !strcmp(name, info->name))
+					return info;
+				if (!first_match)
+					first_match = info;
+			}
+ 		}
+ 	}
+	if (first_match)
+		return first_match;
+ 	dev_err(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
+ 		id[0], id[1], id[2]);
+ 	return ERR_PTR(-ENODEV);
+@@ -2667,7 +2675,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+ 		info = spi_nor_match_id(name);
+ 	/* Try to auto-detect if chip name wasn't specified or not found */
+ 	if (!info)
+-		info = spi_nor_read_id(nor);
+		info = spi_nor_read_id(nor, NULL);
+ 	if (IS_ERR_OR_NULL(info))
+ 		return -ENOENT;
+ 
+@@ -2678,7 +2686,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+ 	if (name && info->id_len) {
+ 		const struct flash_info *jinfo;
+ 
+-		jinfo = spi_nor_read_id(nor);
+		jinfo = spi_nor_read_id(nor, name);
+ 		if (IS_ERR(jinfo)) {
+ 			return PTR_ERR(jinfo);
+ 		} else if (jinfo != info) {
--- a/target/linux/ipq40xx/patches-4.14/310-msm-adhoc-bus-support.patch
+++ b/target/linux/ipq40xx/patches-4.14/310-msm-adhoc-bus-support.patch
--- a/target/linux/ipq40xx/patches-4.14/400-mtd-ubi-add-quirk-to-autoload-ubi-on-rt-ac58u.patch
+++ b/target/linux/ipq40xx/patches-4.14/400-mtd-ubi-add-quirk-to-autoload-ubi-on-rt-ac58u.patch
@ -17,7 +17,7 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>

 --- a/drivers/mtd/ubi/build.c
 +++ b/drivers/mtd/ubi/build.c
-@@ -1184,6 +1184,9 @@ static void __init ubi_auto_attach(void)
+@@ -1187,6 +1187,9 @@ static void __init ubi_auto_attach(void)
 	mtd = open_mtd_device("ubi");
 	if (IS_ERR(mtd))
 		mtd = open_mtd_device("data");
@ -25,5 +25,5 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
 +	if (IS_ERR(mtd))
 +		mtd = open_mtd_device("UBI_DEV");
 
- 	if (!IS_ERR(mtd)) {
- 		size_t len;
+ 	if (IS_ERR(mtd))
+ 		return;
--- a/target/linux/ipq40xx/patches-4.14/701-dts-ipq4019-add-mdio-node.patch
+++ b/target/linux/ipq40xx/patches-4.14/701-dts-ipq4019-add-mdio-node.patch
@ -15,7 +15,7 @@ so the info might change.

 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -540,6 +540,34 @@
+@@ -562,6 +562,34 @@
 			status = "disabled";
 		};
 
@ -48,5 +48,5 @@ so the info might change.
 +		};
 +
 		usb3_ss_phy: ssphy@9a000 {
- 			compatible = "qca,uni-ssphy";
- 			reg = <0x9a000 0x800>;
+ 			compatible = "qcom,usb-ss-ipq4019-phy";
+ 			#phy-cells = <0>;
--- a/target/linux/ipq40xx/patches-4.14/702-dts-ipq4019-add-PHY-switch-nodes.patch
+++ b/target/linux/ipq40xx/patches-4.14/702-dts-ipq4019-add-PHY-switch-nodes.patch
@ -14,7 +14,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>

 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -568,6 +568,29 @@
+@@ -590,6 +590,29 @@
 			};
 		};
 
@ -42,5 +42,5 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
 +		};
 +
 		usb3_ss_phy: ssphy@9a000 {
- 			compatible = "qca,uni-ssphy";
- 			reg = <0x9a000 0x800>;
+ 			compatible = "qcom,usb-ss-ipq4019-phy";
+ 			#phy-cells = <0>;
--- a/target/linux/ipq40xx/patches-4.14/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch
+++ b/target/linux/ipq40xx/patches-4.14/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch
--- a/target/linux/ipq40xx/patches-4.14/711-dts-ipq4019-add-ethernet-essedma-node.patch
+++ b/target/linux/ipq40xx/patches-4.14/711-dts-ipq4019-add-ethernet-essedma-node.patch
@ -16,16 +16,16 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>

 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -28,6 +28,8 @@
- 		spi1 = &spi_1;
- 		i2c0 = &i2c_0;
- 		i2c1 = &i2c_1;
+@@ -44,6 +44,8 @@
+ 		spi1 = &blsp1_spi2;
+ 		i2c0 = &blsp1_i2c3;
+ 		i2c1 = &blsp1_i2c4;
 +		ethernet0 = &gmac0;
 +		ethernet1 = &gmac1;
 	};
 
 	cpus {
-@@ -591,6 +593,64 @@
+@@ -613,6 +615,64 @@
 			status = "disabled";
 		};
 
@ -88,5 +88,5 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
 +		};
 +
 		usb3_ss_phy: ssphy@9a000 {
- 			compatible = "qca,uni-ssphy";
- 			reg = <0x9a000 0x800>;
+ 			compatible = "qcom,usb-ss-ipq4019-phy";
+ 			#phy-cells = <0>;
--- a/target/linux/ipq40xx/patches-4.14/713-0001-essedma-fixup-ethernet-driver-rx-bug.patch
+++ b/target/linux/ipq40xx/patches-4.14/713-0001-essedma-fixup-ethernet-driver-rx-bug.patch
@ -0,0 +1,144 @@
+From 0bcfbe3c613d6ed8044404bc1cc3c29ff961d89c Mon Sep 17 00:00:00 2001
+From: Chen Minqiang <ptpt52@gmail.com>
+Date: Thu, 15 Mar 2018 04:59:57 +0800
+Subject: [PATCH 1/2] essedma: fixup ethernet driver rx bug
+
+ - modify the error rx ring full conditions
+ - in rare cases, out of memory allocation failure causes the receive queues stop
+   we use the timer to re-alloc rx rings under these circumstances
+
+Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
+---
+ drivers/net/ethernet/qualcomm/essedma/edma.c     | 51 ++++++++++++++++++++++--
+ drivers/net/ethernet/qualcomm/essedma/edma.h     |  3 ++
+ drivers/net/ethernet/qualcomm/essedma/edma_axi.c |  8 ++++
+ 3 files changed, 58 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.c b/drivers/net/ethernet/qualcomm/essedma/edma.c
+index fecc0ba..3f1da93 100644
+--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
+@@ -530,6 +530,47 @@ static int edma_rx_complete_paged(struct sk_buff *skb, u16 num_rfds, u16 length,
+ 	return sw_next_to_clean;
+ }
+ 
+static int edma_rfd_desc_unused(struct edma_rfd_desc_ring *erdr)
+{
+	if (erdr->sw_next_to_clean > erdr->sw_next_to_fill)
+		return erdr->sw_next_to_clean - erdr->sw_next_to_fill - 1;
+	return erdr->count + erdr->sw_next_to_clean - erdr->sw_next_to_fill - 1;
+}
+
+void edma_rx_realloc(unsigned long data)
+{
+	struct edma_per_cpu_queues_info *edma_percpu_info = (struct edma_per_cpu_queues_info *)data;
+	struct edma_common_info *edma_cinfo = edma_percpu_info->edma_cinfo;
+	s32 status = edma_percpu_info->rx_realloc_status;
+
+	while (status) {
+		int queue_id;
+		int ret_count;
+		struct edma_rfd_desc_ring *erdr;
+
+		queue_id = ffs(status) - 1;
+		erdr = edma_cinfo->rfd_ring[queue_id];
+		ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, edma_rfd_desc_unused(erdr), queue_id);
+		if (ret_count == 0) {
+			edma_percpu_info->rx_realloc_status &= ~(1 << queue_id);
+		}
+		status &= ~(1 << queue_id);
+	}
+
+	if (edma_percpu_info->rx_realloc_status) {
+		mod_timer(&edma_percpu_info->rx_realloc_timer, jiffies + HZ);
+	}
+}
+
+static inline void edma_realloc_timer_start(struct napi_struct *napi, int queue_id)
+{
+	struct edma_per_cpu_queues_info *edma_percpu_info = container_of(napi,
+			struct edma_per_cpu_queues_info, napi);
+
+	edma_percpu_info->rx_realloc_status |= (1 << queue_id);
+	mod_timer(&edma_percpu_info->rx_realloc_timer, jiffies + 5 * HZ); /* restart alloc in 5 secs */
+}
+
+ /*
+  * edma_rx_complete()
+  *	Main api called from the poll function to process rx packets.
+@@ -754,10 +795,12 @@ static void edma_rx_complete(struct edma_common_info *edma_cinfo,
+ 	erdr->sw_next_to_clean = sw_next_to_clean;
+ 
+ 	/* Refill here in case refill threshold wasn't reached */
+-	if (likely(cleaned_count)) {
+-		ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
+-		if (ret_count)
+	if (edma_rfd_desc_unused(erdr)) {
+		ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, edma_rfd_desc_unused(erdr), queue_id);
+		if (ret_count) {
+ 			dev_dbg(&pdev->dev, "Not all buffers was reallocated");
+			edma_realloc_timer_start(napi, queue_id);
+		}
+ 		edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
+ 			      erdr->sw_next_to_clean);
+ 	}
+@@ -1801,7 +1844,7 @@ int edma_configure(struct edma_common_info *edma_cinfo)
+ 	/* Allocate the RX buffer */
+ 	for (i = 0, j = 0; i < edma_cinfo->num_rx_queues; i++) {
+ 		struct edma_rfd_desc_ring *ring = edma_cinfo->rfd_ring[j];
+-		ret_count = edma_alloc_rx_buf(edma_cinfo, ring, ring->count, j);
+		ret_count = edma_alloc_rx_buf(edma_cinfo, ring, edma_rfd_desc_unused(ring), j);
+ 		if (ret_count) {
+ 			dev_dbg(&edma_cinfo->pdev->dev, "not all rx buffers allocated\n");
+ 		}
+diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.h b/drivers/net/ethernet/qualcomm/essedma/edma.h
+index 5d6dc73..29c8379 100644
+--- a/drivers/net/ethernet/qualcomm/essedma/edma.h
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.h
+@@ -304,6 +304,8 @@ struct edma_per_cpu_queues_info {
+ 	u32 tx_start; /* tx queue start */
+ 	u32 rx_start; /* rx queue start */
+ 	struct edma_common_info *edma_cinfo; /* edma common info */
+	u32 rx_realloc_status;
+	struct timer_list rx_realloc_timer;
+ };
+ 
+ /* edma specific common info */
+@@ -448,6 +450,7 @@ void edma_change_tx_coalesce(int usecs);
+ void edma_change_rx_coalesce(int usecs);
+ void edma_get_tx_rx_coalesce(u32 *reg_val);
+ void edma_clear_irq_status(void);
+void edma_rx_realloc(unsigned long data);
+ void ess_set_port_status_speed(struct edma_common_info *edma_cinfo,
+                                struct phy_device *phydev, uint8_t port_id);
+ #endif /* _EDMA_H_ */
+diff --git a/drivers/net/ethernet/qualcomm/essedma/edma_axi.c b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+index 81fc1e1..d9f8b52 100644
+--- a/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+@@ -1131,6 +1131,11 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 		edma_cinfo->edma_percpu_info[i].rx_status = 0;
+ 		edma_cinfo->edma_percpu_info[i].edma_cinfo = edma_cinfo;
+ 
+		edma_cinfo->edma_percpu_info[i].rx_realloc_status = 0;
+		init_timer(&edma_cinfo->edma_percpu_info[i].rx_realloc_timer);
+		edma_cinfo->edma_percpu_info[i].rx_realloc_timer.function = edma_rx_realloc;
+		edma_cinfo->edma_percpu_info[i].rx_realloc_timer.data = (unsigned long)&edma_cinfo->edma_percpu_info[i];
+
+ 		/* Request irq per core */
+ 		for (j = edma_cinfo->edma_percpu_info[i].tx_start;
+ 		     j < tx_start[i] + 4; j++) {
+@@ -1259,7 +1264,10 @@ err_configure:
+ err_rmap_add_fail:
+ 	edma_free_irqs(adapter[0]);
+ 	for (i = 0; i < CONFIG_NR_CPUS; i++)
+	{
+ 		napi_disable(&edma_cinfo->edma_percpu_info[i].napi);
+		del_timer_sync(&edma_cinfo->edma_percpu_info[i].rx_realloc_timer);
+	}
+ err_reset:
+ err_unregister_sysctl_tbl:
+ err_rmap_alloc_fail:
+-- 
+2.7.4
+
--- a/target/linux/ipq40xx/patches-4.14/713-0002-essedma-refine-txq-to-be-adaptive-of-cpus-and-netdev.patch
+++ b/target/linux/ipq40xx/patches-4.14/713-0002-essedma-refine-txq-to-be-adaptive-of-cpus-and-netdev.patch
@ -0,0 +1,223 @@
+From 7be0cb35513b07bf74d93d052d57b12e2c654b43 Mon Sep 17 00:00:00 2001
+From: Chen Minqiang <ptpt52@gmail.com>
+Date: Thu, 15 Mar 2018 05:04:37 +0800
+Subject: [PATCH 2/2] essedma: refine txq to be adaptive of cpus and netdev
+
+ - use 4 queue for each cpu if only 1 netdev
+ - use all 16 txqueue if only 1 netdev
+
+Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
+---
+ drivers/net/ethernet/qualcomm/essedma/edma.c     | 22 +++++--------
+ drivers/net/ethernet/qualcomm/essedma/edma.h     |  5 +--
+ drivers/net/ethernet/qualcomm/essedma/edma_axi.c | 40 ++++++++++++++----------
+ 3 files changed, 35 insertions(+), 32 deletions(-)
+
+diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.c b/drivers/net/ethernet/qualcomm/essedma/edma.c
+index 3f1da93..05f9ce9 100644
+--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
+@@ -22,14 +22,6 @@ extern struct net_device *edma_netdev[EDMA_MAX_PORTID_SUPPORTED];
+ bool edma_stp_rstp;
+ u16 edma_ath_eth_type;
+ 
+-/* edma_skb_priority_offset()
+- * 	get edma skb priority
+- */
+-static unsigned int edma_skb_priority_offset(struct sk_buff *skb)
+-{
+-	return (skb->priority >> 2) & 1;
+-}
+-
+ /* edma_alloc_tx_ring()
+  *	Allocate Tx descriptors ring
+  */
+@@ -1042,13 +1034,14 @@ static inline u16 edma_tpd_available(struct edma_common_info *edma_cinfo,
+ /* edma_tx_queue_get()
+  *	Get the starting number of  the queue
+  */
+-static inline int edma_tx_queue_get(struct edma_adapter *adapter,
+static inline int edma_tx_queue_get(struct edma_common_info *edma_cinfo, struct edma_adapter *adapter,
+ 				   struct sk_buff *skb, int txq_id)
+ {
+ 	/* skb->priority is used as an index to skb priority table
+ 	 * and based on packet priority, correspong queue is assigned.
+	 * FIXME we just simple use jiffies for time base balance
+ 	 */
+-	return adapter->tx_start_offset[txq_id] + edma_skb_priority_offset(skb);
+	return adapter->tx_start_offset[txq_id] + (jiffies % edma_cinfo->num_txq_per_core_netdev);
+ }
+ 
+ /* edma_tx_update_hw_idx()
+@@ -1417,8 +1410,9 @@ netdev_tx_t edma_xmit(struct sk_buff *skb,
+ 	}
+ 
+ 	/* this will be one of the 4 TX queues exposed to linux kernel */
+-	txq_id = skb_get_queue_mapping(skb);
+-	queue_id = edma_tx_queue_get(adapter, skb, txq_id);
+	/* XXX what if num_online_cpus() > EDMA_CPU_CORES_SUPPORTED */
+	txq_id = smp_processor_id() % EDMA_CPU_CORES_SUPPORTED;
+	queue_id = edma_tx_queue_get(edma_cinfo, adapter, skb, txq_id);
+ 	etdr = edma_cinfo->tpd_ring[queue_id];
+ 	nq = netdev_get_tx_queue(net_dev, txq_id);
+ 
+@@ -1899,8 +1893,8 @@ void edma_free_irqs(struct edma_adapter *adapter)
+ 	int i, j;
+ 	int k = ((edma_cinfo->num_rx_queues == 4) ? 1 : 2);
+ 
+-	for (i = 0; i < CONFIG_NR_CPUS; i++) {
+-		for (j = edma_cinfo->edma_percpu_info[i].tx_start; j < (edma_cinfo->edma_percpu_info[i].tx_start + 4); j++)
+	for (i = 0; i < num_online_cpus() && i < EDMA_CPU_CORES_SUPPORTED; i++) {
+		for (j = edma_cinfo->edma_percpu_info[i].tx_start; j < (edma_cinfo->edma_percpu_info[i].tx_start + edma_cinfo->num_txq_per_core); j++)
+ 			free_irq(edma_cinfo->tx_irq[j], &edma_cinfo->edma_percpu_info[i]);
+ 
+ 		for (j = edma_cinfo->edma_percpu_info[i].rx_start; j < (edma_cinfo->edma_percpu_info[i].rx_start + k); j++)
+diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.h b/drivers/net/ethernet/qualcomm/essedma/edma.h
+index 29c8379..2ba43e0 100644
+--- a/drivers/net/ethernet/qualcomm/essedma/edma.h
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.h
+@@ -325,6 +325,7 @@ struct edma_common_info {
+ 	u32 from_cpu; /* from CPU TPD field */
+ 	u32 num_rxq_per_core; /* Rx queues per core */
+ 	u32 num_txq_per_core; /* Tx queues per core */
+	u32 num_txq_per_core_netdev; /* Tx queues per core per netdev */
+ 	u16 tx_ring_count; /* Tx ring count */
+ 	u16 rx_ring_count; /* Rx ring*/
+ 	u16 rx_head_buffer_len; /* rx buffer length */
+@@ -332,7 +333,7 @@ struct edma_common_info {
+ 	u32 page_mode; /* Jumbo frame supported flag */
+ 	u32 fraglist_mode; /* fraglist supported flag */
+ 	struct edma_hw hw; /* edma hw specific structure */
+-	struct edma_per_cpu_queues_info edma_percpu_info[CONFIG_NR_CPUS]; /* per cpu information */
+	struct edma_per_cpu_queues_info edma_percpu_info[EDMA_CPU_CORES_SUPPORTED]; /* per cpu information */
+ 	spinlock_t stats_lock; /* protect edma stats area for updation */
+ 
+ 	bool is_single_phy;
+@@ -401,7 +402,7 @@ struct edma_adapter {
+ 	u32 link_state; /* phy link state */
+ 	u32 phy_mdio_addr; /* PHY device address on MII interface */
+ 	u32 poll_required; /* check if link polling is required */
+-	u32 tx_start_offset[CONFIG_NR_CPUS]; /* tx queue start */
+	u32 tx_start_offset[EDMA_CPU_CORES_SUPPORTED]; /* tx queue start */
+ 	u32 default_vlan_tag; /* vlan tag */
+ 	u32 dp_bitmap;
+ 	uint8_t phy_id[MII_BUS_ID_SIZE + 3];
+diff --git a/drivers/net/ethernet/qualcomm/essedma/edma_axi.c b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+index d9f8b52..5824680 100644
+--- a/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma_axi.c
+@@ -721,11 +721,7 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 	int i, j, k, err = 0;
+ 	int portid_bmp;
+ 	int idx = 0, idx_mac = 0;
+-
+-	if (CONFIG_NR_CPUS != EDMA_CPU_CORES_SUPPORTED) {
+-		dev_err(&pdev->dev, "Invalid CPU Cores\n");
+-		return -EINVAL;
+-	}
+	int netdev_group = 2;
+ 
+ 	if ((num_rxq != 4) && (num_rxq != 8)) {
+ 		dev_err(&pdev->dev, "Invalid RX queue, edma probe failed\n");
+@@ -749,7 +745,7 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 	/* Initialize the netdev array before allocation
+ 	 * to avoid double free
+ 	 */
+-	for (i = 0 ; i < edma_cinfo->num_gmac ; i++)
+	for (i = 0 ; i < EDMA_MAX_PORTID_SUPPORTED; i++)
+ 		edma_netdev[i] = NULL;
+ 
+ 	for (i = 0 ; i < edma_cinfo->num_gmac ; i++) {
+@@ -770,8 +766,11 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 
+ 	/* Fill ring details */
+ 	edma_cinfo->num_tx_queues = EDMA_MAX_TRANSMIT_QUEUE;
+-	edma_cinfo->num_txq_per_core = (EDMA_MAX_TRANSMIT_QUEUE / 4);
+	edma_cinfo->num_txq_per_core = (EDMA_MAX_TRANSMIT_QUEUE / num_online_cpus());
+	edma_cinfo->num_txq_per_core_netdev = (EDMA_MAX_TRANSMIT_QUEUE / netdev_group / num_online_cpus());
+ 	edma_cinfo->tx_ring_count = EDMA_TX_RING_SIZE;
+	if (edma_cinfo->num_txq_per_core == 0)
+		edma_cinfo->num_txq_per_core = 1;
+ 
+ 	/* Update num rx queues based on module parameter */
+ 	edma_cinfo->num_rx_queues = num_rxq;
+@@ -941,6 +940,13 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 		idx_mac++;
+ 	}
+ 
+	if (edma_cinfo->num_gmac == 1) {
+		netdev_group = 1;
+		edma_cinfo->num_txq_per_core_netdev = (EDMA_MAX_TRANSMIT_QUEUE / netdev_group / num_online_cpus());
+	}
+	if (edma_cinfo->num_txq_per_core_netdev == 0)
+		edma_cinfo->num_txq_per_core_netdev = 1;
+
+ 	/* Populate the adapter structure register the netdevice */
+ 	for (i = 0; i < edma_cinfo->num_gmac; i++) {
+ 		int k, m;
+@@ -948,17 +954,16 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 		adapter[i] = netdev_priv(edma_netdev[i]);
+ 		adapter[i]->netdev = edma_netdev[i];
+ 		adapter[i]->pdev = pdev;
+-		for (j = 0; j < CONFIG_NR_CPUS; j++) {
+-			m = i % 2;
+-			adapter[i]->tx_start_offset[j] =
+-				((j << EDMA_TX_CPU_START_SHIFT) + (m << 1));
+		for (j = 0; j < num_online_cpus() && j < EDMA_CPU_CORES_SUPPORTED; j++) {
+			m = i % netdev_group;
+			adapter[i]->tx_start_offset[j] = j * edma_cinfo->num_txq_per_core + m * edma_cinfo->num_txq_per_core_netdev;
+ 			/* Share the queues with available net-devices.
+ 			 * For instance , with 5 net-devices
+ 			 * eth0/eth2/eth4 will share q0,q1,q4,q5,q8,q9,q12,q13
+ 			 * and eth1/eth3 will get the remaining.
+ 			 */
+ 			for (k = adapter[i]->tx_start_offset[j]; k <
+-			     (adapter[i]->tx_start_offset[j] + 2); k++) {
+			     (adapter[i]->tx_start_offset[j] + edma_cinfo->num_txq_per_core_netdev); k++) {
+ 				if (edma_fill_netdev(edma_cinfo, k, i, j)) {
+ 					pr_err("Netdev overflow Error\n");
+ 					goto err_register;
+@@ -1111,9 +1116,12 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 	/* populate per_core_info, do a napi_Add, request 16 TX irqs,
+ 	 * 8 RX irqs, do a napi enable
+ 	 */
+-	for (i = 0; i < CONFIG_NR_CPUS; i++) {
+	for (i = 0; i < num_online_cpus() && i < EDMA_MAX_TRANSMIT_QUEUE; i++) {
+ 		u8 rx_start;
+ 
+		tx_mask[i] = (0xFFFF >> (16 - edma_cinfo->num_txq_per_core)) << (i * edma_cinfo->num_txq_per_core);
+		tx_start[i] = i * edma_cinfo->num_txq_per_core;
+
+ 		edma_cinfo->edma_percpu_info[i].napi.state = 0;
+ 
+ 		netif_napi_add(edma_netdev[0],
+@@ -1138,7 +1146,7 @@ static int edma_axi_probe(struct platform_device *pdev)
+ 
+ 		/* Request irq per core */
+ 		for (j = edma_cinfo->edma_percpu_info[i].tx_start;
+-		     j < tx_start[i] + 4; j++) {
+		     j < tx_start[i] + edma_cinfo->num_txq_per_core; j++) {
+ 			sprintf(&edma_tx_irq[j][0], "edma_eth_tx%d", j);
+ 			err = request_irq(edma_cinfo->tx_irq[j],
+ 					  edma_interrupt,
+@@ -1263,7 +1271,7 @@ err_configure:
+ #endif
+ err_rmap_add_fail:
+ 	edma_free_irqs(adapter[0]);
+-	for (i = 0; i < CONFIG_NR_CPUS; i++)
+	for (i = 0; i < num_online_cpus() && i < EDMA_CPU_CORES_SUPPORTED; i++)
+ 	{
+ 		napi_disable(&edma_cinfo->edma_percpu_info[i].napi);
+ 		del_timer_sync(&edma_cinfo->edma_percpu_info[i].rx_realloc_timer);
+@@ -1314,7 +1322,7 @@ static int edma_axi_remove(struct platform_device *pdev)
+ 		unregister_netdev(edma_netdev[i]);
+ 
+ 	edma_stop_rx_tx(hw);
+-	for (i = 0; i < CONFIG_NR_CPUS; i++)
+	for (i = 0; i < num_online_cpus() && i < EDMA_CPU_CORES_SUPPORTED; i++)
+ 		napi_disable(&edma_cinfo->edma_percpu_info[i].napi);
+ 
+ 	edma_irq_disable(edma_cinfo);
+-- 
+2.7.4
+
--- a/target/linux/ipq40xx/patches-4.14/713-essedma-alloc-skb-ip-align.patch
+++ b/target/linux/ipq40xx/patches-4.14/713-essedma-alloc-skb-ip-align.patch
--- a/target/linux/ipq40xx/patches-4.14/820-qcom-ipq4019-Add-IPQ4019-USB-HS-SS-PHY-drivers.patch
+++ b/target/linux/ipq40xx/patches-4.14/820-qcom-ipq4019-Add-IPQ4019-USB-HS-SS-PHY-drivers.patch
@ -1,429 +0,0 @@
-From e73682ec4455c34f3f3edc7f40d90ed297521012 Mon Sep 17 00:00:00 2001
-From: Senthilkumar N L <snlakshm@codeaurora.org>
-Date: Tue, 6 Jan 2015 12:52:23 +0530
-Subject: [PATCH] qcom: ipq4019: Add IPQ4019 USB HS/SS PHY drivers
-
-These drivers handles control and configuration of the HS
-and SS USB PHY transceivers.
-
-Signed-off-by: Senthilkumar N L <snlakshm@codeaurora.org>
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
-
---
-Changed:
-	- replaced spaces with tabs
-	- remove emulation and host variables
---
- drivers/usb/phy/Kconfig          |  11 ++
- drivers/usb/phy/Makefile         |   2 +
- drivers/usb/phy/phy-qca-baldur.c | 233 +++++++++++++++++++++++++++++++++++++++
- drivers/usb/phy/phy-qca-uniphy.c | 141 +++++++++++++++++++++++
- 4 files changed, 387 insertions(+)
- create mode 100644 drivers/usb/phy/phy-qca-baldur.c
- create mode 100644 drivers/usb/phy/phy-qca-uniphy.c
-
--- a/drivers/usb/phy/Kconfig
-+++ b/drivers/usb/phy/Kconfig
-@@ -188,6 +188,17 @@ config USB_MXS_PHY
- 
- 	  MXS Phy is used by some of the i.MX SoCs, for example imx23/28/6x.
- 
-+config USB_IPQ4019_PHY
-+	tristate "IPQ4019 PHY wrappers support"
-+	depends on (USB || USB_GADGET) && ARCH_QCOM
-+	select USB_PHY
-+	help
-+	  Enable this to support the USB PHY transceivers on QCA961x chips.
-+	  It handles PHY initialization, clock management required after
-+	  resetting the hardware and power management.
-+	  This driver is required even for peripheral only or host only
-+	  mode configurations.
-+
- config USB_ULPI
- 	bool "Generic ULPI Transceiver Driver"
- 	depends on ARM || ARM64
--- a/drivers/usb/phy/Makefile
-+++ b/drivers/usb/phy/Makefile
-@@ -21,6 +21,8 @@ obj-$(CONFIG_USB_GPIO_VBUS)		+= phy-gpio
- obj-$(CONFIG_USB_ISP1301)		+= phy-isp1301.o
- obj-$(CONFIG_USB_MSM_OTG)		+= phy-msm-usb.o
- obj-$(CONFIG_USB_QCOM_8X16_PHY)	+= phy-qcom-8x16-usb.o
-+obj-$(CONFIG_USB_IPQ4019_PHY)		+= phy-qca-baldur.o
-+obj-$(CONFIG_USB_IPQ4019_PHY)		+= phy-qca-uniphy.o
- obj-$(CONFIG_USB_MV_OTG)		+= phy-mv-usb.o
- obj-$(CONFIG_USB_MXS_PHY)		+= phy-mxs-usb.o
- obj-$(CONFIG_USB_ULPI)			+= phy-ulpi.o
--- /dev/null
-+++ b/drivers/usb/phy/phy-qca-baldur.c
-@@ -0,0 +1,233 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/regulator/consumer.h>
-+#include <linux/usb/phy.h>
-+#include <linux/reset.h>
-+#include <linux/of_device.h>
-+
-+/**
-+ *  USB Hardware registers
-+ */
-+#define PHY_CTRL0_ADDR	0x000
-+#define PHY_CTRL1_ADDR	0x004
-+#define PHY_CTRL2_ADDR	0x008
-+#define PHY_CTRL3_ADDR	0x00C
-+#define PHY_CTRL4_ADDR	0x010
-+#define PHY_MISC_ADDR	0x024
-+#define PHY_IPG_ADDR	0x030
-+
-+#define PHY_CTRL0_VAL	0xA4600015
-+#define PHY_CTRL1_VAL	0x09500000
-+#define PHY_CTRL2_VAL	0x00058180
-+#define PHY_CTRL3_VAL	0x6DB6DCD6
-+#define PHY_CTRL4_VAL	0x836DB6DB
-+#define PHY_MISC_VAL	0x3803FB0C
-+#define PHY_IPG_VAL	0x47323232
-+
-+#define USB30_HS_PHY_HOST_MODE	(0x01 << 21)
-+#define USB20_HS_PHY_HOST_MODE	(0x01 << 5)
-+
-+/* used to differentiate between USB3 HS and USB2 HS PHY */
-+struct qca_baldur_hs_data {
-+	unsigned int usb3_hs_phy;
-+	unsigned int phy_config_offset;
-+};
-+
-+struct qca_baldur_hs_phy {
-+	struct device *dev;
-+	struct usb_phy phy;
-+
-+	void __iomem *base;
-+	void __iomem *qscratch_base;
-+
-+	struct reset_control *por_rst;
-+	struct reset_control *srif_rst;
-+
-+	const struct qca_baldur_hs_data *data;
-+};
-+
-+#define phy_to_dw_phy(x) container_of((x), struct qca_baldur_hs_phy, phy)
-+
-+static int qca_baldur_phy_read(struct usb_phy *x, u32 reg)
-+{
-+	struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x);
-+
-+	return readl(phy->base + reg);
-+}
-+
-+static int qca_baldur_phy_write(struct usb_phy *x, u32 val, u32 reg)
-+{
-+	struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x);
-+
-+	writel(val, phy->base + reg);
-+	return 0;
-+}
-+
-+static int qca_baldur_hs_phy_init(struct usb_phy *x)
-+{
-+	struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x);
-+
-+	/* assert HS PHY POR reset */
-+	reset_control_assert(phy->por_rst);
-+	msleep(10);
-+
-+	/* assert HS PHY SRIF reset */
-+	reset_control_assert(phy->srif_rst);
-+	msleep(10);
-+
-+	/* deassert HS PHY SRIF reset and program HS PHY registers */
-+	reset_control_deassert(phy->srif_rst);
-+	msleep(10);
-+
-+	/* perform PHY register writes */
-+	writel(PHY_CTRL0_VAL, phy->base + PHY_CTRL0_ADDR);
-+	writel(PHY_CTRL1_VAL, phy->base + PHY_CTRL1_ADDR);
-+	writel(PHY_CTRL2_VAL, phy->base + PHY_CTRL2_ADDR);
-+	writel(PHY_CTRL3_VAL, phy->base + PHY_CTRL3_ADDR);
-+	writel(PHY_CTRL4_VAL, phy->base + PHY_CTRL4_ADDR);
-+	writel(PHY_MISC_VAL, phy->base + PHY_MISC_ADDR);
-+	writel(PHY_IPG_VAL, phy->base + PHY_IPG_ADDR);
-+
-+	msleep(10);
-+
-+	/* de-assert USB3 HS PHY POR reset */
-+	reset_control_deassert(phy->por_rst);
-+
-+	return 0;
-+}
-+
-+static int qca_baldur_hs_get_resources(struct qca_baldur_hs_phy *phy)
-+{
-+	struct platform_device *pdev = to_platform_device(phy->dev);
-+	struct resource *res;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	phy->base = devm_ioremap_resource(phy->dev, res);
-+	if (IS_ERR(phy->base))
-+		return PTR_ERR(phy->base);
-+
-+	phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
-+	if (IS_ERR(phy->por_rst))
-+		return PTR_ERR(phy->por_rst);
-+
-+	phy->srif_rst = devm_reset_control_get(phy->dev, "srif_rst");
-+	if (IS_ERR(phy->srif_rst))
-+		return PTR_ERR(phy->srif_rst);
-+
-+	return 0;
-+}
-+
-+static void qca_baldur_hs_put_resources(struct qca_baldur_hs_phy *phy)
-+{
-+	reset_control_assert(phy->srif_rst);
-+	reset_control_assert(phy->por_rst);
-+}
-+
-+static int qca_baldur_hs_remove(struct platform_device *pdev)
-+{
-+	struct qca_baldur_hs_phy *phy = platform_get_drvdata(pdev);
-+
-+	usb_remove_phy(&phy->phy);
-+	return 0;
-+}
-+
-+static void qca_baldur_hs_phy_shutdown(struct usb_phy *x)
-+{
-+	struct qca_baldur_hs_phy *phy = phy_to_dw_phy(x);
-+
-+	qca_baldur_hs_put_resources(phy);
-+}
-+
-+static struct usb_phy_io_ops qca_baldur_io_ops = {
-+	.read = qca_baldur_phy_read,
-+	.write = qca_baldur_phy_write,
-+};
-+
-+static const struct qca_baldur_hs_data usb3_hs_data = {
-+	.usb3_hs_phy = 1,
-+	.phy_config_offset = USB30_HS_PHY_HOST_MODE,
-+};
-+
-+static const struct qca_baldur_hs_data usb2_hs_data = {
-+	.usb3_hs_phy = 0,
-+	.phy_config_offset = USB20_HS_PHY_HOST_MODE,
-+};
-+
-+static const struct of_device_id qca_baldur_hs_id_table[] = {
-+	{ .compatible = "qca,baldur-usb3-hsphy", .data = &usb3_hs_data },
-+	{ .compatible = "qca,baldur-usb2-hsphy", .data = &usb2_hs_data },
-+	{ /* Sentinel */ }
-+};
-+MODULE_DEVICE_TABLE(of, qca_baldur_hs_id_table);
-+
-+static int qca_baldur_hs_probe(struct platform_device *pdev)
-+{
-+	const struct of_device_id *match;
-+	struct qca_baldur_hs_phy *phy;
-+	int err;
-+
-+	match = of_match_device(qca_baldur_hs_id_table, &pdev->dev);
-+	if (!match)
-+		return -ENODEV;
-+
-+	phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
-+	if (!phy)
-+		return -ENOMEM;
-+
-+	platform_set_drvdata(pdev, phy);
-+	phy->dev = &pdev->dev;
-+
-+	phy->data = match->data;
-+
-+	err = qca_baldur_hs_get_resources(phy);
-+	if (err < 0) {
-+		dev_err(&pdev->dev, "failed to request resources: %d\n", err);
-+		return err;
-+	}
-+
-+	phy->phy.dev = phy->dev;
-+	phy->phy.label = "qca-baldur-hsphy";
-+	phy->phy.init = qca_baldur_hs_phy_init;
-+	phy->phy.shutdown = qca_baldur_hs_phy_shutdown;
-+	phy->phy.type = USB_PHY_TYPE_USB2;
-+	phy->phy.io_ops = &qca_baldur_io_ops;
-+
-+	err = usb_add_phy_dev(&phy->phy);
-+	return err;
-+}
-+
-+static struct platform_driver qca_baldur_hs_driver = {
-+	.probe		= qca_baldur_hs_probe,
-+	.remove		= qca_baldur_hs_remove,
-+	.driver		= {
-+		.name	= "qca-baldur-hsphy",
-+		.owner	= THIS_MODULE,
-+		.of_match_table = qca_baldur_hs_id_table,
-+	},
-+};
-+
-+module_platform_driver(qca_baldur_hs_driver);
-+
-+MODULE_ALIAS("platform:qca-baldur-hsphy");
-+MODULE_LICENSE("Dual BSD/GPL");
-+MODULE_DESCRIPTION("USB3 QCA BALDUR HSPHY driver");
--- /dev/null
-+++ b/drivers/usb/phy/phy-qca-uniphy.c
-@@ -0,0 +1,135 @@
-+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
-+ *
-+ * Permission to use, copy, modify, and/or distribute this software for any
-+ * purpose with or without fee is hereby granted, provided that the above
-+ * copyright notice and this permission notice appear in all copies.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
-+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
-+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
-+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
-+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
-+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
-+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
-+ *
-+ */
-+
-+#include <linux/clk.h>
-+#include <linux/err.h>
-+#include <linux/io.h>
-+#include <linux/module.h>
-+#include <linux/of.h>
-+#include <linux/platform_device.h>
-+#include <linux/regulator/consumer.h>
-+#include <linux/usb/phy.h>
-+#include <linux/reset.h>
-+#include <linux/of_device.h>
-+
-+struct qca_uni_ss_phy {
-+	struct usb_phy phy;
-+	struct device *dev;
-+
-+	void __iomem *base;
-+
-+	struct reset_control *por_rst;
-+};
-+
-+#define phy_to_dw_phy(x) container_of((x), struct qca_uni_ss_phy, phy)
-+
-+static void qca_uni_ss_phy_shutdown(struct usb_phy *x)
-+{
-+	struct qca_uni_ss_phy *phy = phy_to_dw_phy(x);
-+
-+	/* assert SS PHY POR reset */
-+	reset_control_assert(phy->por_rst);
-+}
-+
-+static int qca_uni_ss_phy_init(struct usb_phy *x)
-+{
-+	struct qca_uni_ss_phy *phy = phy_to_dw_phy(x);
-+
-+	/* assert SS PHY POR reset */
-+	reset_control_assert(phy->por_rst);
-+
-+	msleep(20);
-+
-+	/* deassert SS PHY POR reset */
-+	reset_control_deassert(phy->por_rst);
-+
-+	return 0;
-+}
-+
-+static int qca_uni_ss_get_resources(struct platform_device *pdev,
-+		struct qca_uni_ss_phy *phy)
-+{
-+	struct resource *res;
-+
-+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+	phy->base = devm_ioremap_resource(phy->dev, res);
-+	if (IS_ERR(phy->base))
-+		return PTR_ERR(phy->base);
-+
-+	phy->por_rst = devm_reset_control_get(phy->dev, "por_rst");
-+	if (IS_ERR(phy->por_rst))
-+		return PTR_ERR(phy->por_rst);
-+
-+	return 0;
-+}
-+
-+static int qca_uni_ss_remove(struct platform_device *pdev)
-+{
-+	struct qca_uni_ss_phy *phy = platform_get_drvdata(pdev);
-+
-+	usb_remove_phy(&phy->phy);
-+	return 0;
-+}
-+
-+static const struct of_device_id qca_uni_ss_id_table[] = {
-+	{ .compatible = "qca,uni-ssphy" },
-+	{ /* Sentinel */ }
-+};
-+MODULE_DEVICE_TABLE(of, qca_uni_ss_id_table);
-+
-+static int qca_uni_ss_probe(struct platform_device *pdev)
-+{
-+	struct qca_uni_ss_phy *phy;
-+	int ret;
-+
-+	phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
-+	if (!phy)
-+		return -ENOMEM;
-+
-+	platform_set_drvdata(pdev, phy);
-+	phy->dev = &pdev->dev;
-+
-+	ret = qca_uni_ss_get_resources(pdev, phy);
-+	if (ret < 0) {
-+		dev_err(&pdev->dev, "failed to request resources: %d\n", ret);
-+		return ret;
-+	}
-+
-+	phy->phy.dev = phy->dev;
-+	phy->phy.label = "qca-uni-ssphy";
-+	phy->phy.init = qca_uni_ss_phy_init;
-+	phy->phy.shutdown = qca_uni_ss_phy_shutdown;
-+	phy->phy.type = USB_PHY_TYPE_USB3;
-+
-+	ret = usb_add_phy_dev(&phy->phy);
-+	return ret;
-+}
-+
-+static struct platform_driver qca_uni_ss_driver = {
-+	.probe = qca_uni_ss_probe,
-+	.remove	= qca_uni_ss_remove,
-+	.driver = {
-+		.name = "qca-uni-ssphy",
-+		.owner = THIS_MODULE,
-+		.of_match_table = qca_uni_ss_id_table,
-+	},
-+};
-+
-+module_platform_driver(qca_uni_ss_driver);
-+
-+MODULE_ALIAS("platform:qca-uni-ssphy");
-+MODULE_LICENSE("Dual BSD/GPL");
-+MODULE_DESCRIPTION("USB3 QCA UNI SSPHY driver");
--- a/target/linux/ipq40xx/patches-4.14/830-usb-dwc3-register-qca-ipq4019-dwc3-in-dwc3-of-simple.patch
+++ b/target/linux/ipq40xx/patches-4.14/830-usb-dwc3-register-qca-ipq4019-dwc3-in-dwc3-of-simple.patch
@ -1,25 +0,0 @@
-From 08c18ab774368feb610d1eb952957bb1bb35129f Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Sat, 19 Nov 2016 00:52:35 +0100
-Subject: [PATCH 37/38] usb: dwc3: register qca,ipq4019-dwc3 in dwc3-of-simple
-
-For host mode, the dwc3 found in the IPQ4019 can be driven
-by the dwc3-of-simple module. It will get more tricky for
-OTG since they'll need to enable VBUS and reconfigure the
-registers.
-
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
- drivers/usb/dwc3/dwc3-of-simple.c | 1 +
- 1 file changed, 1 insertion(+)
-
--- a/drivers/usb/dwc3/dwc3-of-simple.c
-+++ b/drivers/usb/dwc3/dwc3-of-simple.c
-@@ -176,6 +176,7 @@ static const struct dev_pm_ops dwc3_of_s
- 
- static const struct of_device_id of_dwc3_simple_match[] = {
- 	{ .compatible = "qcom,dwc3" },
-+	{ .compatible = "qca,ipq4019-dwc3" },
- 	{ .compatible = "rockchip,rk3399-dwc3" },
- 	{ .compatible = "xlnx,zynqmp-dwc3" },
- 	{ .compatible = "cavium,octeon-7130-usb-uctl" },
--- a/target/linux/ipq40xx/patches-4.14/864-03-dts-ipq4019-ap-dk01-add-tcsr-config-to-dtsi.patch
+++ b/target/linux/ipq40xx/patches-4.14/864-03-dts-ipq4019-ap-dk01-add-tcsr-config-to-dtsi.patch
@ -1,42 +0,0 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-@@ -15,12 +15,39 @@
-  */
- 
- #include "qcom-ipq4019.dtsi"
-+#include <dt-bindings/soc/qcom,tcsr.h>
- 
- / {
- 	model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
- 	compatible = "qcom,ipq4019";
- 
- 	soc {
-+		tcsr@194b000 {
-+			/* select hostmode */
-+			compatible = "qcom,tcsr";
-+			reg = <0x194b000 0x100>;
-+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
-+			status = "ok";
-+		};
-+
-+		ess_tcsr@1953000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1953000 0x1000>;
-+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
-+		};
-+
-+		tcsr@1949000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1949000 0x100>;
-+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
-+		};
-+
-+		tcsr@1957000 {
-+			compatible = "qcom,tcsr";
-+			reg = <0x1957000 0x100>;
-+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
-+		};
-+
- 		rng@22000 {
- 			status = "ok";
- 		};
--- a/target/linux/ipq40xx/patches-4.14/864-05-dts-ipq4019-ap-dk01-remove-spi-chip-node-from-dtsi.patch
+++ b/target/linux/ipq40xx/patches-4.14/864-05-dts-ipq4019-ap-dk01-remove-spi-chip-node-from-dtsi.patch
@ -1,17 +0,0 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-@@ -93,14 +93,6 @@
- 			pinctrl-names = "default";
- 			status = "ok";
- 			cs-gpios = <&tlmm 54 0>;
-
-			mx25l25635e@0 {
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0>;
-				compatible = "mx25l25635e";
-				spi-max-frequency = <24000000>;
-			};
- 		};
- 
- 		serial@78af000 {
--- a/target/linux/ipq40xx/patches-4.14/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch
+++ b/target/linux/ipq40xx/patches-4.14/864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch
@ -1,74 +0,0 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
-@@ -19,4 +19,71 @@
- / {
- 	model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
- 
-+	memory {
-+		device_type = "memory";
-+		reg = <0x80000000 0x10000000>;
-+	};
-+};
-+
-+&spi_0 {
-+	mx25l25635f@0 {
-+		compatible = "mx25l25635f", "jedec,spi-nor";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		reg = <0>;
-+		spi-max-frequency = <24000000>;
-+
-+		SBL1@0 {
-+			label = "SBL1";
-+			reg = <0x0 0x40000>;
-+			read-only;
-+		};
-+		MIBIB@40000 {
-+			label = "MIBIB";
-+			reg = <0x40000 0x20000>;
-+			read-only;
-+		};
-+		QSEE@60000 {
-+			label = "QSEE";
-+			reg = <0x60000 0x60000>;
-+			read-only;
-+		};
-+		CDT@c0000 {
-+			label = "CDT";
-+			reg = <0xc0000 0x10000>;
-+			read-only;
-+		};
-+		DDRPARAMS@d0000 {
-+			label = "DDRPARAMS";
-+			reg = <0xd0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBLENV@e0000 {
-+			label = "APPSBLENV";
-+			reg = <0xe0000 0x10000>;
-+			read-only;
-+		};
-+		APPSBL@f0000 {
-+			label = "APPSBL";
-+			reg = <0xf0000 0x80000>;
-+			read-only;
-+		};
-+		ART@170000 {
-+			label = "ART";
-+			reg = <0x170000 0x10000>;
-+			read-only;
-+		};
-+		kernel@180000 {
-+			label = "kernel";
-+			reg = <0x180000 0x400000>;
-+		};
-+		rootfs@580000 {
-+			label = "rootfs";
-+			reg = <0x580000 0x1600000>;
-+		};
-+		firmware@180000 {
-+			label = "firmware";
-+			reg = <0x180000 0x1a00000>;
-+		};
-+	};
- };
--- a/target/linux/ipq40xx/patches-4.14/864-08-dts-ipq4019-ap-dk01.1-c1-add-compatible-string.patch
+++ b/target/linux/ipq40xx/patches-4.14/864-08-dts-ipq4019-ap-dk01.1-c1-add-compatible-string.patch
@ -1,10 +0,0 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
-@@ -18,6 +18,7 @@
- 
- / {
- 	model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
-+	compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1", "qcom,ipq4019";
- 
- 	memory {
- 		device_type = "memory";
--- a/target/linux/ipq40xx/patches-4.14/864-09-dts-ipq4019-ap-dk01.1-enable-ethernet.patch
+++ b/target/linux/ipq40xx/patches-4.14/864-09-dts-ipq4019-ap-dk01.1-enable-ethernet.patch
@ -1,25 +0,0 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
-@@ -121,6 +121,22 @@
- 			status = "ok";
- 		};
- 
-+		mdio@90000 {
-+			status = "okay";
-+		};
-+
-+		ess-switch@c000000 {
-+			status = "okay";
-+		};
-+
-+		ess-psgmii@98000 {
-+			status = "okay";
-+		};
-+
-+		edma@c080000 {
-+			status = "okay";
-+		};
-+
- 		usb3_ss_phy: ssphy@9a000 {
- 			status = "ok";
- 		};
--- a/target/linux/ipq40xx/patches-4.14/900-dts-ipq4019-ap-dk01.1.patch
+++ b/target/linux/ipq40xx/patches-4.14/900-dts-ipq4019-ap-dk01.1.patch
@ -0,0 +1,156 @@
+--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+@@ -15,12 +15,39 @@
+  */
+ 
+ #include "qcom-ipq4019.dtsi"
+#include <dt-bindings/soc/qcom,tcsr.h>
+ 
+ / {
+ 	model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
+ 	compatible = "qcom,ipq4019";
+ 
+ 	soc {
+		tcsr@194b000 {
+			/* select hostmode */
+			compatible = "qcom,tcsr";
+			reg = <0x194b000 0x100>;
+			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+			status = "ok";
+		};
+
+		ess_tcsr@1953000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1953000 0x1000>;
+			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+		};
+
+		tcsr@1949000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1949000 0x100>;
+			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+		};
+
+		tcsr@1957000 {
+			compatible = "qcom,tcsr";
+			reg = <0x1957000 0x100>;
+			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+		};
+
+ 		rng@22000 {
+ 			status = "ok";
+ 		};
+@@ -66,14 +93,6 @@
+ 			pinctrl-names = "default";
+ 			status = "ok";
+ 			cs-gpios = <&tlmm 54 0>;
+-
+-			mx25l25635e@0 {
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				reg = <0>;
+-				compatible = "mx25l25635e";
+-				spi-max-frequency = <24000000>;
+-			};
+ 		};
+ 
+ 		serial@78af000 {
+@@ -102,6 +121,22 @@
+ 			status = "ok";
+ 		};
+ 
+		mdio@90000 {
+			status = "okay";
+		};
+
+		ess-switch@c000000 {
+			status = "okay";
+		};
+
+		ess-psgmii@98000 {
+			status = "okay";
+		};
+
+		edma@c080000 {
+			status = "okay";
+		};
+
+ 		usb3_ss_phy: ssphy@9a000 {
+ 			status = "ok";
+ 		};
+--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+@@ -18,5 +18,73 @@
+ 
+ / {
+ 	model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
+	compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1", "qcom,ipq4019";
+ 
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x10000000>;
+	};
+};
+
+&blsp1_spi1 {
+	mx25l25635f@0 {
+		compatible = "mx25l25635f", "jedec,spi-nor";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0>;
+		spi-max-frequency = <24000000>;
+
+		SBL1@0 {
+			label = "SBL1";
+			reg = <0x0 0x40000>;
+			read-only;
+		};
+		MIBIB@40000 {
+			label = "MIBIB";
+			reg = <0x40000 0x20000>;
+			read-only;
+		};
+		QSEE@60000 {
+			label = "QSEE";
+			reg = <0x60000 0x60000>;
+			read-only;
+		};
+		CDT@c0000 {
+			label = "CDT";
+			reg = <0xc0000 0x10000>;
+			read-only;
+		};
+		DDRPARAMS@d0000 {
+			label = "DDRPARAMS";
+			reg = <0xd0000 0x10000>;
+			read-only;
+		};
+		APPSBLENV@e0000 {
+			label = "APPSBLENV";
+			reg = <0xe0000 0x10000>;
+			read-only;
+		};
+		APPSBL@f0000 {
+			label = "APPSBL";
+			reg = <0xf0000 0x80000>;
+			read-only;
+		};
+		ART@170000 {
+			label = "ART";
+			reg = <0x170000 0x10000>;
+			read-only;
+		};
+		kernel@180000 {
+			label = "kernel";
+			reg = <0x180000 0x400000>;
+		};
+		rootfs@580000 {
+			label = "rootfs";
+			reg = <0x580000 0x1600000>;
+		};
+		firmware@180000 {
+			label = "firmware";
+			reg = <0x180000 0x1a00000>;
+		};
+	};
+ };
--- a/target/linux/ipq40xx/patches-4.14/901-arm-boot-add-dts-files.patch
+++ b/target/linux/ipq40xx/patches-4.14/901-arm-boot-add-dts-files.patch
@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>

 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
-@@ -697,7 +697,19 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+@@ -697,7 +697,21 @@ dtb-$(CONFIG_ARCH_QCOM) += \
 	qcom-apq8074-dragonboard.dtb \
 	qcom-apq8084-ifc6540.dtb \
 	qcom-apq8084-mtp.dtb \
@ -19,11 +19,13 @@ Signed-off-by: John Crispin <john@phrozen.org>
 +	qcom-ipq4018-ex6150v2.dtb \
 +	qcom-ipq4018-fritz4040.dtb \
 +	qcom-ipq4018-jalapeno.dtb \
+	qcom-ipq4018-nbg6617.dtb \
 +	qcom-ipq4018-rt-ac58u.dtb \
 +	qcom-ipq4018-wre6606.dtb \
 	qcom-ipq4019-ap.dk01.1-c1.dtb \
 +	qcom-ipq4019-a62.dtb \
 +	qcom-ipq4019-ap.dk04.1-c1.dtb \
+	qcom-ipq4019-rt-acrh17.dtb \
 +	qcom-ipq4028-wpj428.dtb \
 +	qcom-ipq4029-gl-b1300.dtb \
 +	qcom-ipq4029-mr33.dtb \
--- a/target/linux/ipq40xx/patches-4.14/901-essedma-disable-default-vlan-tagging.patch
+++ b/target/linux/ipq40xx/patches-4.14/901-essedma-disable-default-vlan-tagging.patch
@ -0,0 +1,82 @@
+From 42b508d91b7f51b054f383e3aa42089ccab9300d Mon Sep 17 00:00:00 2001
+From: Chen Minqiang <ptpt52@gmail.com>
+Date: Thu, 15 Mar 2018 05:33:46 +0800
+Subject: [PATCH] essedma: disable default vlan tagging
+
+The essedma driver has its own unique take on VLAN management
+and its configuration. In the original SDK, each VLAN is
+assigned one virtual ethernet netdev.
+
+However, this is non-standard. So, this patch does away
+with the default_vlan_tag property the driver is using
+and therefore forces the user to use the kernel's vlan
+feature.
+
+This patch also removes the "qcom,poll_required = <1>;" from
+the essedma node.
+
+Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
+Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
+---
+ arch/arm/boot/dts/qcom-ipq4019.dtsi          |  5 ++---
+ drivers/net/ethernet/qualcomm/essedma/edma.c | 14 +++++---------
+ 2 files changed, 7 insertions(+), 12 deletions(-)
+
+diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+index 3c4617f..7c3af8e 100644
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -598,8 +598,7 @@
+ 			qcom,page-mode = <0>;
+ 			qcom,rx_head_buf_size = <1540>;
+ 			qcom,mdio_supported;
+-			qcom,poll_required = <1>;
+-			qcom,num_gmac = <2>;
+			qcom,num_gmac = <1>;
+ 			interrupts = <0  65 IRQ_TYPE_EDGE_RISING
+ 				      0  66 IRQ_TYPE_EDGE_RISING
+ 				      0  67 IRQ_TYPE_EDGE_RISING
+@@ -637,7 +636,7 @@
+ 
+ 			gmac0: gmac0 {
+ 				local-mac-address = [00 00 00 00 00 00];
+-				vlan_tag = <1 0x1f>;
+				vlan_tag = <1 0x3f>;
+ 			};
+ 
+ 			gmac1: gmac1 {
+diff --git a/drivers/net/ethernet/qualcomm/essedma/edma.c b/drivers/net/ethernet/qualcomm/essedma/edma.c
+index 05f9ce9..a3c0d66 100644
+--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
+@@ -750,13 +750,11 @@ static void edma_rx_complete(struct edma_common_info *edma_cinfo,
+ 			edma_receive_checksum(rd, skb);
+ 
+ 			/* Process VLAN HW acceleration indication provided by HW */
+-			if (unlikely(adapter->default_vlan_tag != rd->rrd4)) {
+-				vlan = rd->rrd4;
+-				if (likely(rd->rrd7 & EDMA_RRD_CVLAN))
+-					__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
+-				else if (rd->rrd1 & EDMA_RRD_SVLAN)
+-					__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan);
+-			}
+			vlan = rd->rrd4;
+			if (likely(rd->rrd7 & EDMA_RRD_CVLAN))
+				__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
+			else if (rd->rrd1 & EDMA_RRD_SVLAN)
+				__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021AD), vlan);
+ 
+ 			/* Update rx statistics */
+ 			adapter->stats.rx_packets++;
+@@ -1434,8 +1432,6 @@ netdev_tx_t edma_xmit(struct sk_buff *skb,
+ 	if (!adapter->edma_cinfo->is_single_phy) {
+ 		if (unlikely(skb_vlan_tag_present(skb)))
+ 			flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_FLAG;
+-		else if (adapter->default_vlan_tag)
+-			flags_transmit |= EDMA_VLAN_TX_TAG_INSERT_DEFAULT_FLAG;
+ 	}
+ 
+ 	/* Check and mark checksum offload */
+-- 
+2.7.4
+
--- a/target/linux/ipq40xx/patches-4.14/999-fix-ipq4019-dtsi.patch
+++ b/target/linux/ipq40xx/patches-4.14/999-fix-ipq4019-dtsi.patch
@ -0,0 +1,158 @@
+diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+index a15993f..94dcb6c 100644
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -204,13 +204,13 @@
+ 			#gpio-cells = <2>;
+ 			interrupt-controller;
+ 			#interrupt-cells = <2>;
+-			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 208 IRQ_TYPE_NONE>;
+ 		};
+ 
+ 		blsp_dma: dma@7884000 {
+ 			compatible = "qcom,bam-v1.7.0";
+ 			reg = <0x07884000 0x23000>;
+-			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
+ 			clocks = <&gcc GCC_BLSP1_AHB_CLK>;
+ 			clock-names = "bam_clk";
+ 			#dma-cells = <1>;
+@@ -277,7 +277,7 @@
+ 		cryptobam: dma@8e04000 {
+ 			compatible = "qcom,bam-v1.7.0";
+ 			reg = <0x08e04000 0x20000>;
+-			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 207 IRQ_TYPE_NONE>;
+ 			clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
+ 			clock-names = "bam_clk";
+ 			#dma-cells = <1>;
+@@ -298,49 +298,49 @@
+ 			status = "disabled";
+ 		};
+ 
+-                acc0: clock-controller@b088000 {
+		acc0: clock-controller@b088000 {
+ 			compatible = "qcom,kpss-acc-v2";
+-                        reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
+-                };
+			reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
+		};
+ 
+-                acc1: clock-controller@b098000 {
+		acc1: clock-controller@b098000 {
+ 			compatible = "qcom,kpss-acc-v2";
+-                        reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
+-                };
+			reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
+		};
+ 
+-                acc2: clock-controller@b0a8000 {
+		acc2: clock-controller@b0a8000 {
+ 			compatible = "qcom,kpss-acc-v2";
+-                        reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
+-                };
+			reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
+		};
+ 
+-                acc3: clock-controller@b0b8000 {
+		acc3: clock-controller@b0b8000 {
+ 			compatible = "qcom,kpss-acc-v2";
+-                        reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
+-                };
+			reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
+		};
+ 
+-                saw0: regulator@b089000 {
+-                        compatible = "qcom,saw2";
+		saw0: regulator@b089000 {
+			compatible = "qcom,saw2";
+ 			reg = <0x0b089000 0x1000>, <0x0b009000 0x1000>;
+-                        regulator;
+-                };
+-
+-                saw1: regulator@b099000 {
+-                        compatible = "qcom,saw2";
+-                        reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
+-                        regulator;
+-                };
+-
+-                saw2: regulator@b0a9000 {
+-                        compatible = "qcom,saw2";
+-                        reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
+-                        regulator;
+-                };
+-
+-                saw3: regulator@b0b9000 {
+-                        compatible = "qcom,saw2";
+-                        reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
+-                        regulator;
+-                };
+			regulator;
+		};
+
+		saw1: regulator@b099000 {
+			compatible = "qcom,saw2";
+			reg = <0x0b099000 0x1000>, <0x0b009000 0x1000>;
+			regulator;
+		};
+
+		saw2: regulator@b0a9000 {
+			compatible = "qcom,saw2";
+			reg = <0x0b0a9000 0x1000>, <0x0b009000 0x1000>;
+			regulator;
+		};
+
+		saw3: regulator@b0b9000 {
+			compatible = "qcom,saw2";
+			reg = <0x0b0b9000 0x1000>, <0x0b009000 0x1000>;
+			regulator;
+		};
+ 
+ 		saw_l2: regulator@b012000 {
+ 			compatible = "qcom,saw2";
+@@ -351,7 +351,7 @@
+ 		serial@78af000 {
+ 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ 			reg = <0x78af000 0x200>;
+-			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 107 IRQ_TYPE_NONE>;
+ 			status = "disabled";
+ 			clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>,
+ 				<&gcc GCC_BLSP1_AHB_CLK>;
+@@ -363,7 +363,7 @@
+ 		serial@78b0000 {
+ 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+ 			reg = <0x78b0000 0x200>;
+-			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
+ 			status = "disabled";
+ 			clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
+ 				<&gcc GCC_BLSP1_AHB_CLK>;
+@@ -402,7 +402,7 @@
+ 			ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000
+ 				  0x82000000 0 0x40300000 0x40300000 0 0x400000>;
+ 
+-			interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>;
+			interrupts = <GIC_SPI 141 IRQ_TYPE_NONE>;
+ 			interrupt-names = "msi";
+ 			#interrupt-cells = <1>;
+ 			interrupt-map-mask = <0 0 0 0x7>;
+@@ -513,7 +513,7 @@
+ 				     <GIC_SPI 45 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 46 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 47 IRQ_TYPE_EDGE_RISING>,
+-				     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 168 IRQ_TYPE_NONE>;
+ 			interrupt-names =  "msi0",  "msi1",  "msi2",  "msi3",
+ 					   "msi4",  "msi5",  "msi6",  "msi7",
+ 					   "msi8",  "msi9", "msi10", "msi11",
+@@ -555,7 +555,7 @@
+ 				     <GIC_SPI 61 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 62 IRQ_TYPE_EDGE_RISING>,
+ 				     <GIC_SPI 63 IRQ_TYPE_EDGE_RISING>,
+-				     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+				     <GIC_SPI 169 IRQ_TYPE_NONE>;
+ 			interrupt-names =  "msi0",  "msi1",  "msi2",  "msi3",
+ 					   "msi4",  "msi5",  "msi6",  "msi7",
+ 					   "msi8",  "msi9", "msi10", "msi11",