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rockchip：fix doornet device parsing error resulting in missing compilation (#8994)
* Update armv8.mk * rockchip:fix device tree custom parsing error * rockchip:fix device tree custom parsing error * rockchip:add doornet1-add-rk3328-dmc-relate-node * rockchip:fix device tree custom parsing error * rockchip:refresh add device dtb configuration * Add files via upload * rockchip:add 1.5 second delay mode for ethernet * rockchip:add 1.5 second delay mode for ethernet * Update 205-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch * Update 205-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch * Update armv8.mk * Delete 808-arm64-dts-doornet1-add-rk3328-dmc-relate-node.patch * Update armv8.mk
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commit
7a988e46cf
@ -10,7 +10,7 @@ define Device/embedfire_doornet1
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IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-bin | gzip | append-metadata
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DEVICE_PACKAGES := kmod-usb-net-rtl8152 kmod-rtl8821cu
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endef
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#TARGET_DEVICES += embedfire_doornet1
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TARGET_DEVICES += embedfire_doornet1
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define Device/embedfire_doornet2
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DEVICE_VENDOR := EmbedFire
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@ -18,9 +18,9 @@ define Device/embedfire_doornet2
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SOC := rk3399
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UBOOT_DEVICE_NAME := doornet2-rk3399
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IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-bin | gzip | append-metadata
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DEVICE_PACKAGES := kmod-r8168 kmod-rtl8821cu -urngd
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DEVICE_PACKAGES := kmod-r8169 kmod-rtl8821cu -urngd
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endef
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#TARGET_DEVICES += embedfire_doornet2
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TARGET_DEVICES += embedfire_doornet2
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define Device/friendlyarm_nanopi-neo3
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DEVICE_VENDOR := FriendlyARM
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@ -1,9 +1,19 @@
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
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@@ -0,0 +1,412 @@
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@@ -0,0 +1,419 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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+ * Copyright (c) 2021 EmbedFire <embedfire@embedfire.com>
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+ */
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+
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+/dts-v1/;
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@ -21,6 +31,8 @@
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+ led-failsafe = &sys_led;
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+ led-running = &sys_led;
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+ led-upgrade = &sys_led;
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+ // mmc1 = &sdmmc;
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+ // mmc0 = &emmc;
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+ };
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+
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+ chosen {
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@ -78,6 +90,11 @@
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+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
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+ label = "doornet1:green:wan";
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+ };
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+
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+ wifi_enable: wifi_enable {
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+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ label = "wifi-enable";
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+ };
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+ };
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+
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+ vcc_io_sdio: sdmmcio-regulator {
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@ -93,8 +110,8 @@
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+ regulator-settling-time-us = <5000>;
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+ regulator-type = "voltage";
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+ startup-delay-us = <2000>;
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+ states = <1800000 0x1>,
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+ <3300000 0x0>;
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+ states = <1800000 0x1
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+ 3300000 0x0>;
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+ vin-supply = <&vcc_io_33>;
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+ };
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+
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@ -140,34 +157,16 @@
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+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
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+ clock_in_out = "input";
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+ phy-handle = <&rtl8211f>;
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+ phy-mode = "rgmii";
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+ phy-supply = <&vcc_io_33>;
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+ pinctrl-0 = <&rgmiim1_pins>;
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+ pinctrl-names = "default";
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+ snps,aal;
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+ snps,rxpbl = <0x4>;
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+ snps,txpbl = <0x4>;
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+ tx_delay = <0x24>;
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+ rx_delay = <0x58>;
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+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ snps,reset-delays-us = <0 1000000 50000>;
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+ snps,reset-active-low;
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+ tx_delay = <0x18>;
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+ rx_delay = <0x24>;
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+ status = "okay";
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+
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+ mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rtl8211f: ethernet-phy@1 {
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+ compatible = "ethernet-phy-id001c.c916",
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+ "ethernet-phy-ieee802.3-c22";
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+ reg = <1>;
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+ pinctrl-0 = <ð_phy_reset_pin>;
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+ pinctrl-names = "default";
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <50000>;
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+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+&i2c1 {
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@ -329,6 +328,10 @@
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+ wan_led_pin: wan-led-pin {
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+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ wifi_pin: wifi_pin{
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+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+
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+ pmic {
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@ -363,6 +366,20 @@
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+ status = "okay";
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+};
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+
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+&emmc {
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ max-frequency = <150000000>;
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+ mmc-ddr-1_8v;
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+ mmc-hs200-1_8v;
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+ non-removable;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
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+ vmmc-supply = <&vcc_io_33>;
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+ vqmmc-supply = <&vcc18_emmc>;
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+ status = "okay";
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+};
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+
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+&tsadc {
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+ rockchip,hw-tshut-mode = <0>;
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+ rockchip,hw-tshut-polarity = <0>;
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@ -413,13 +430,5 @@
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+ realtek,led-data = <0x87>;
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+ };
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+};
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
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--
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2.25.1
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@ -274,8 +274,8 @@
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+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 100000 50000>;
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+ tx_delay = <0x13>;
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+ rx_delay = <0x0e>;
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+ tx_delay = <0x28>;
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+ rx_delay = <0x11>;
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+ status = "okay";
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+};
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+
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@ -766,3 +766,29 @@
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+ status = "okay";
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+};
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+
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--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
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@@ -363,6 +363,11 @@ int stmmac_mdio_register(struct net_device *ndev)
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goto bus_register_fail;
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}
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+ stmmac_mdio_write(new_bus,0,31,2627);
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+ stmmac_mdio_write(new_bus,0,25,0x1801);
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+ stmmac_mdio_write(new_bus,0,31,0);
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+ stmmac_mdio_write(new_bus,0,0,0x8000);
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+
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if (priv->plat->phy_node || mdio_node)
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goto bus_register_done;
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--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
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+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
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@@ -2191,6 +2191,8 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
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if (priv->extend_desc && (priv->mode == STMMAC_RING_MODE))
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atds = 1;
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+ msleep(1500);
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+
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ret = stmmac_reset(priv, priv->ioaddr);
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if (ret) {
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dev_err(priv->device, "Failed to reset the dma\n");
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@ -0,0 +1,124 @@
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From 2184ab853067b484ba5677e35f1a6955a5c023a1 Mon Sep 17 00:00:00 2001
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From: wowowow <you@example.com>
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Date: Wed, 20 Oct 2021 13:46:46 +0800
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Subject: [PATCH] arm64-dts-doornet1-add-rk3328-dmc-relate-node
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---
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.../boot/dts/rockchip/rk3328-doornet1.dts | 73 +++++++++++++++++++
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1 file changed, 73 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
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index 8333351..d984163 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
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@@ -7,6 +7,7 @@
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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+#include "rk3328-dram-nanopi2-timing.dtsi"
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#include "rk3328.dtsi"
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/ {
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@@ -56,6 +57,72 @@
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enable-active-high;
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};
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+ dmc: dmc {
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+ compatible = "rockchip,rk3328-dmc";
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+ devfreq-events = <&dfi>;
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+ center-supply = <&vdd_log>;
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+ clocks = <&cru SCLK_DDRCLK>;
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+ clock-names = "dmc_clk";
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+ operating-points-v2 = <&dmc_opp_table>;
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+ ddr_timing = <&ddr_timing>;
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+ upthreshold = <40>;
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+ downdifferential = <20>;
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+ auto-min-freq = <786000>;
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+ auto-freq-en = <1>;
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+ #cooling-cells = <2>;
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+ status = "okay";
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+
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+ ddr_power_model: ddr_power_model {
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+ compatible = "ddr_power_model";
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+ dynamic-power-coefficient = <120>;
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+ static-power-coefficient = <200>;
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+ ts = <32000 4700 (-80) 2>;
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+ thermal-zone = "soc-thermal";
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+ };
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+ };
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+
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+ dmc_opp_table: dmc-opp-table {
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+ compatible = "operating-points-v2";
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+
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+ rockchip,leakage-voltage-sel = <
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+ 1 10 0
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+ 11 254 1
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+ >;
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+ nvmem-cells = <&logic_leakage>;
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+ nvmem-cell-names = "ddr_leakage";
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+
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+ opp-786000000 {
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+ opp-hz = /bits/ 64 <786000000>;
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+ opp-microvolt = <1075000>;
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+ opp-microvolt-L0 = <1075000>;
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+ opp-microvolt-L1 = <1050000>;
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+ };
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+ opp-798000000 {
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+ opp-hz = /bits/ 64 <798000000>;
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+ opp-microvolt = <1075000>;
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+ opp-microvolt-L0 = <1075000>;
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+ opp-microvolt-L1 = <1050000>;
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+ };
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+ opp-840000000 {
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+ opp-hz = /bits/ 64 <840000000>;
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+ opp-microvolt = <1075000>;
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+ opp-microvolt-L0 = <1075000>;
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+ opp-microvolt-L1 = <1050000>;
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+ };
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+ opp-924000000 {
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+ opp-hz = /bits/ 64 <924000000>;
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+ opp-microvolt = <1100000>;
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+ opp-microvolt-L0 = <1100000>;
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+ opp-microvolt-L1 = <1075000>;
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+ };
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+ opp-1056000000 {
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+ opp-hz = /bits/ 64 <1056000000>;
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+ opp-microvolt = <1175000>;
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+ opp-microvolt-L0 = <1175000>;
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+ opp-microvolt-L1 = <1150000>;
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+ };
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+ };
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+
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leds {
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compatible = "gpio-leds";
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pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
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@@ -138,6 +205,10 @@
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cpu-supply = <&vdd_arm>;
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};
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+&dfi {
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+ status = "okay";
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+};
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+
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&gmac2io {
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assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
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@@ -201,6 +272,7 @@
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1075000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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@@ -215,6 +287,7 @@
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regulator-name = "vdd_arm";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1225000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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--
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2.25.1
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@ -1,15 +1,26 @@
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---- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
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@@ -0,0 +1,412 @@
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@@ -0,0 +1,495 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
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+ * Copyright (c) 2021 EmbedFire <embedfire@embedfire.com>
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+ */
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/gpio/gpio.h>
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+#include "rk3328-dram-nanopi2-timing.dtsi"
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+#include "rk3328.dtsi"
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+
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+/ {
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@ -21,6 +32,8 @@
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+ led-failsafe = &sys_led;
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+ led-running = &sys_led;
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+ led-upgrade = &sys_led;
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+ // mmc1 = &sdmmc;
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+ // mmc0 = &emmc;
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+ };
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+
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+ chosen {
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@ -59,6 +72,72 @@
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+ enable-active-high;
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+ };
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+
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+ dmc: dmc {
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+ compatible = "rockchip,rk3328-dmc";
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+ devfreq-events = <&dfi>;
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+ center-supply = <&vdd_log>;
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+ clocks = <&cru SCLK_DDRCLK>;
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+ clock-names = "dmc_clk";
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+ operating-points-v2 = <&dmc_opp_table>;
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+ ddr_timing = <&ddr_timing>;
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+ upthreshold = <40>;
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+ downdifferential = <20>;
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+ auto-min-freq = <786000>;
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+ auto-freq-en = <1>;
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+ #cooling-cells = <2>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ ddr_power_model: ddr_power_model {
|
||||
+ compatible = "ddr_power_model";
|
||||
+ dynamic-power-coefficient = <120>;
|
||||
+ static-power-coefficient = <200>;
|
||||
+ ts = <32000 4700 (-80) 2>;
|
||||
+ thermal-zone = "soc-thermal";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ dmc_opp_table: dmc-opp-table {
|
||||
+ compatible = "operating-points-v2";
|
||||
+
|
||||
+ rockchip,leakage-voltage-sel = <
|
||||
+ 1 10 0
|
||||
+ 11 254 1
|
||||
+ >;
|
||||
+ nvmem-cells = <&logic_leakage>;
|
||||
+ nvmem-cell-names = "ddr_leakage";
|
||||
+
|
||||
+ opp-786000000 {
|
||||
+ opp-hz = /bits/ 64 <786000000>;
|
||||
+ opp-microvolt = <1075000>;
|
||||
+ opp-microvolt-L0 = <1075000>;
|
||||
+ opp-microvolt-L1 = <1050000>;
|
||||
+ };
|
||||
+ opp-798000000 {
|
||||
+ opp-hz = /bits/ 64 <798000000>;
|
||||
+ opp-microvolt = <1075000>;
|
||||
+ opp-microvolt-L0 = <1075000>;
|
||||
+ opp-microvolt-L1 = <1050000>;
|
||||
+ };
|
||||
+ opp-840000000 {
|
||||
+ opp-hz = /bits/ 64 <840000000>;
|
||||
+ opp-microvolt = <1075000>;
|
||||
+ opp-microvolt-L0 = <1075000>;
|
||||
+ opp-microvolt-L1 = <1050000>;
|
||||
+ };
|
||||
+ opp-924000000 {
|
||||
+ opp-hz = /bits/ 64 <924000000>;
|
||||
+ opp-microvolt = <1100000>;
|
||||
+ opp-microvolt-L0 = <1100000>;
|
||||
+ opp-microvolt-L1 = <1075000>;
|
||||
+ };
|
||||
+ opp-1056000000 {
|
||||
+ opp-hz = /bits/ 64 <1056000000>;
|
||||
+ opp-microvolt = <1175000>;
|
||||
+ opp-microvolt-L0 = <1175000>;
|
||||
+ opp-microvolt-L1 = <1150000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
|
||||
@ -78,6 +157,11 @@
|
||||
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "doornet1:green:wan";
|
||||
+ };
|
||||
+
|
||||
+ wifi_enable: wifi_enable {
|
||||
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "wifi-enable";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_io_sdio: sdmmcio-regulator {
|
||||
@ -93,8 +177,8 @@
|
||||
+ regulator-settling-time-us = <5000>;
|
||||
+ regulator-type = "voltage";
|
||||
+ startup-delay-us = <2000>;
|
||||
+ states = <1800000 0x1>,
|
||||
+ <3300000 0x0>;
|
||||
+ states = <1800000 0x1
|
||||
+ 3300000 0x0>;
|
||||
+ vin-supply = <&vcc_io_33>;
|
||||
+ };
|
||||
+
|
||||
@ -136,38 +220,24 @@
|
||||
+ cpu-supply = <&vdd_arm>;
|
||||
+};
|
||||
+
|
||||
+&dfi {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gmac2io {
|
||||
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
||||
+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
|
||||
+ clock_in_out = "input";
|
||||
+ phy-handle = <&rtl8211f>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-supply = <&vcc_io_33>;
|
||||
+ pinctrl-0 = <&rgmiim1_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ snps,aal;
|
||||
+ snps,rxpbl = <0x4>;
|
||||
+ snps,txpbl = <0x4>;
|
||||
+ tx_delay = <0x24>;
|
||||
+ rx_delay = <0x58>;
|
||||
+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-delays-us = <0 1000000 50000>;
|
||||
+ snps,reset-active-low;
|
||||
+ tx_delay = <0x18>;
|
||||
+ rx_delay = <0x24>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ rtl8211f: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-id001c.c916",
|
||||
+ "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ pinctrl-0 = <ð_phy_reset_pin>;
|
||||
+ pinctrl-names = "default";
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <50000>;
|
||||
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
@ -199,6 +269,7 @@
|
||||
+ regulator-name = "vdd_log";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-init-microvolt = <1075000>;
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
@ -213,6 +284,7 @@
|
||||
+ regulator-name = "vdd_arm";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-init-microvolt = <1225000>;
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1450000>;
|
||||
+ regulator-ramp-delay = <12500>;
|
||||
@ -329,6 +401,10 @@
|
||||
+ wan_led_pin: wan-led-pin {
|
||||
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_pin: wifi_pin{
|
||||
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
@ -363,6 +439,20 @@
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&emmc {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <150000000>;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
|
||||
+ vmmc-supply = <&vcc_io_33>;
|
||||
+ vqmmc-supply = <&vcc18_emmc>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <0>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
@ -402,24 +492,20 @@
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usbdrd_dwc3 {
|
||||
+&usbdrd3 {
|
||||
+ dr_mode = "host";
|
||||
+ status = "okay";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ usb-eth@2 {
|
||||
+ compatible = "realtek,rtl8153";
|
||||
+ /* Second port is for USB 3.0 */
|
||||
+ rtl8153: device@2 {
|
||||
+ compatible = "usbbda,8153";
|
||||
+ reg = <2>;
|
||||
+
|
||||
+ realtek,led-data = <0x87>;
|
||||
+ };
|
||||
+};
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
|
||||
\ No newline at end of file
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@ -274,8 +274,8 @@
|
||||
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-active-low;
|
||||
+ snps,reset-delays-us = <0 100000 50000>;
|
||||
+ tx_delay = <0x13>;
|
||||
+ rx_delay = <0x0e>;
|
||||
+ tx_delay = <0x28>;
|
||||
+ rx_delay = <0x11>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
@ -766,3 +766,29 @@
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
|
||||
@@ -363,6 +363,11 @@ int stmmac_mdio_register(struct net_device *ndev)
|
||||
goto bus_register_fail;
|
||||
}
|
||||
|
||||
+ stmmac_mdio_write(new_bus,0,31,2627);
|
||||
+ stmmac_mdio_write(new_bus,0,25,0x1801);
|
||||
+ stmmac_mdio_write(new_bus,0,31,0);
|
||||
+ stmmac_mdio_write(new_bus,0,0,0x8000);
|
||||
+
|
||||
if (priv->plat->phy_node || mdio_node)
|
||||
goto bus_register_done;
|
||||
|
||||
|
||||
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
|
||||
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
|
||||
@@ -2191,6 +2191,8 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
|
||||
if (priv->extend_desc && (priv->mode == STMMAC_RING_MODE))
|
||||
atds = 1;
|
||||
|
||||
+ msleep(1500);
|
||||
+
|
||||
ret = stmmac_reset(priv, priv->ioaddr);
|
||||
if (ret) {
|
||||
dev_err(priv->device, "Failed to reset the dma\n");
|
||||
|
||||
@ -35,11 +35,9 @@ to status_led in accordance with the board schematics.
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -8,8 +8,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
|
||||
@@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
|
||||
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
|
||||
|
||||
@ -9,10 +9,10 @@
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
|
||||
@@ -0,0 +1,412 @@
|
||||
@@ -0,0 +1,419 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
|
||||
+ * Copyright (c) 2021 EmbedFire <embedfire@embedfire.com>
|
||||
+ */
|
||||
+
|
||||
+/dts-v1/;
|
||||
@ -30,6 +30,8 @@
|
||||
+ led-failsafe = &sys_led;
|
||||
+ led-running = &sys_led;
|
||||
+ led-upgrade = &sys_led;
|
||||
+ // mmc1 = &sdmmc;
|
||||
+ // mmc0 = &emmc;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
@ -87,6 +89,11 @@
|
||||
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "doornet1:green:wan";
|
||||
+ };
|
||||
+
|
||||
+ wifi_enable: wifi_enable {
|
||||
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
+ label = "wifi-enable";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_io_sdio: sdmmcio-regulator {
|
||||
@ -149,34 +156,16 @@
|
||||
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
|
||||
+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
|
||||
+ clock_in_out = "input";
|
||||
+ phy-handle = <&rtl8211f>;
|
||||
+ phy-mode = "rgmii";
|
||||
+ phy-supply = <&vcc_io_33>;
|
||||
+ pinctrl-0 = <&rgmiim1_pins>;
|
||||
+ pinctrl-names = "default";
|
||||
+ snps,aal;
|
||||
+ snps,rxpbl = <0x4>;
|
||||
+ snps,txpbl = <0x4>;
|
||||
+ tx_delay = <0x24>;
|
||||
+ rx_delay = <0x58>;
|
||||
+ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ snps,reset-delays-us = <0 1000000 50000>;
|
||||
+ snps,reset-active-low;
|
||||
+ tx_delay = <0xf>;
|
||||
+ rx_delay = <0x68>;
|
||||
+ status = "okay";
|
||||
+
|
||||
+ mdio {
|
||||
+ compatible = "snps,dwmac-mdio";
|
||||
+ #address-cells = <1>;
|
||||
+ #size-cells = <0>;
|
||||
+
|
||||
+ rtl8211f: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-id001c.c916",
|
||||
+ "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ pinctrl-0 = <ð_phy_reset_pin>;
|
||||
+ pinctrl-names = "default";
|
||||
+ reset-assert-us = <10000>;
|
||||
+ reset-deassert-us = <50000>;
|
||||
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
@ -338,6 +327,10 @@
|
||||
+ wan_led_pin: wan-led-pin {
|
||||
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_pin: wifi_pin{
|
||||
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
@ -372,6 +365,20 @@
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&emmc {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <150000000>;
|
||||
+ mmc-ddr-1_8v;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
|
||||
+ vmmc-supply = <&vcc_io_33>;
|
||||
+ vqmmc-supply = <&vcc18_emmc>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <0>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
@ -422,3 +429,5 @@
|
||||
+ realtek,led-data = <0x87>;
|
||||
+ };
|
||||
+};
|
||||
--
|
||||
2.25.1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user