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rockchip：fix doornet device parsing error resulting in missing compilation (#8994)

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* Update armv8.mk

* rockchip:fix device tree custom parsing error

* rockchip:fix device tree custom parsing error

* rockchip:add doornet1-add-rk3328-dmc-relate-node

* rockchip:fix device tree custom parsing error

* rockchip:refresh add device dtb configuration

* Add files via upload

* rockchip:add 1.5 second delay mode for ethernet

* rockchip:add 1.5 second delay mode for ethernet

* Update 205-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch

* Update 205-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch

* Update armv8.mk

* Delete 808-arm64-dts-doornet1-add-rk3328-dmc-relate-node.patch

* Update armv8.mk
This commit is contained in:
google-you-ok? 2022-03-04 00:06:46 +08:00 committed by GitHub
parent 05e206921e
commit 7a988e46cf
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GPG Key ID: 4AEE18F83AFDEB23
8 changed files with 391 additions and 113 deletions
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6
target/linux/rockchip/image/armv8.mk
View File

@ -10,7 +10,7 @@ define Device/embedfire_doornet1
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-bin | gzip | append-metadata IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-bin | gzip | append-metadata
DEVICE_PACKAGES := kmod-usb-net-rtl8152 kmod-rtl8821cu DEVICE_PACKAGES := kmod-usb-net-rtl8152 kmod-rtl8821cu
endef endef
#TARGET_DEVICES += embedfire_doornet1 TARGET_DEVICES += embedfire_doornet1
define Device/embedfire_doornet2 define Device/embedfire_doornet2
DEVICE_VENDOR := EmbedFire DEVICE_VENDOR := EmbedFire
@ -18,9 +18,9 @@ define Device/embedfire_doornet2
SOC := rk3399 SOC := rk3399
UBOOT_DEVICE_NAME := doornet2-rk3399 UBOOT_DEVICE_NAME := doornet2-rk3399
IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-bin | gzip | append-metadata IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r4s | pine64-bin | gzip | append-metadata
DEVICE_PACKAGES := kmod-r8168 kmod-rtl8821cu -urngd DEVICE_PACKAGES := kmod-r8169 kmod-rtl8821cu -urngd
endef endef
#TARGET_DEVICES += embedfire_doornet2 TARGET_DEVICES += embedfire_doornet2
define Device/friendlyarm_nanopi-neo3 define Device/friendlyarm_nanopi-neo3
DEVICE_VENDOR := FriendlyARM DEVICE_VENDOR := FriendlyARM

83
target/linux/rockchip/patches-5.10/203-rockchip-rk3328-Add-support-for-EmbedFire-DoorNet1.patch
View File

@ -1,9 +1,19 @@
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
--- /dev/null --- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
@@ -0,0 +1,412 @@ @@ -0,0 +1,419 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/* +/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net> + * Copyright (c) 2021 EmbedFire <embedfire@embedfire.com>
+ */ + */
+ +
+/dts-v1/; +/dts-v1/;
@ -21,6 +31,8 @@
+ led-failsafe = &sys_led; + led-failsafe = &sys_led;
+ led-running = &sys_led; + led-running = &sys_led;
+ led-upgrade = &sys_led; + led-upgrade = &sys_led;
+ // mmc1 = &sdmmc;
+ // mmc0 = &emmc;
+ }; + };
+ +
+ chosen { + chosen {
@ -78,6 +90,11 @@
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "doornet1:green:wan"; + label = "doornet1:green:wan";
+ }; + };
+
+ wifi_enable: wifi_enable {
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "wifi-enable";
+ };
+ }; + };
+ +
+ vcc_io_sdio: sdmmcio-regulator { + vcc_io_sdio: sdmmcio-regulator {
@ -93,8 +110,8 @@
+ regulator-settling-time-us = <5000>; + regulator-settling-time-us = <5000>;
+ regulator-type = "voltage"; + regulator-type = "voltage";
+ startup-delay-us = <2000>; + startup-delay-us = <2000>;
+ states = <1800000 0x1>, + states = <1800000 0x1
+ <3300000 0x0>; + 3300000 0x0>;
+ vin-supply = <&vcc_io_33>; + vin-supply = <&vcc_io_33>;
+ }; + };
+ +
@ -140,34 +157,16 @@
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
+ clock_in_out = "input"; + clock_in_out = "input";
+ phy-handle = <&rtl8211f>;
+ phy-mode = "rgmii"; + phy-mode = "rgmii";
+ phy-supply = <&vcc_io_33>; + phy-supply = <&vcc_io_33>;
+ pinctrl-0 = <&rgmiim1_pins>; + pinctrl-0 = <&rgmiim1_pins>;
+ pinctrl-names = "default"; + pinctrl-names = "default";
+ snps,aal; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ snps,rxpbl = <0x4>; + snps,reset-delays-us = <0 1000000 50000>;
+ snps,txpbl = <0x4>; + snps,reset-active-low;
+ tx_delay = <0x24>; + tx_delay = <0x18>;
+ rx_delay = <0x58>; + rx_delay = <0x24>;
+ status = "okay"; + status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211f: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ pinctrl-0 = <&eth_phy_reset_pin>;
+ pinctrl-names = "default";
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+}; +};
+ +
+&i2c1 { +&i2c1 {
@ -329,6 +328,10 @@
+ wan_led_pin: wan-led-pin { + wan_led_pin: wan-led-pin {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ }; + };
+
+ wifi_pin: wifi_pin{
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ }; + };
+ +
+ pmic { + pmic {
@ -363,6 +366,20 @@
+ status = "okay"; + status = "okay";
+}; +};
+ +
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <150000000>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ vmmc-supply = <&vcc_io_33>;
+ vqmmc-supply = <&vcc18_emmc>;
+ status = "okay";
+};
+
+&tsadc { +&tsadc {
+ rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>; + rockchip,hw-tshut-polarity = <0>;
@ -413,13 +430,5 @@
+ realtek,led-data = <0x87>; + realtek,led-data = <0x87>;
+ }; + };
+}; +};
--- a/arch/arm64/boot/dts/rockchip/Makefile --
+++ b/arch/arm64/boot/dts/rockchip/Makefile 2.25.1
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb

30
target/linux/rockchip/patches-5.10/205-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
View File

@ -274,8 +274,8 @@
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low; + snps,reset-active-low;
+ snps,reset-delays-us = <0 100000 50000>; + snps,reset-delays-us = <0 100000 50000>;
+ tx_delay = <0x13>; + tx_delay = <0x28>;
+ rx_delay = <0x0e>; + rx_delay = <0x11>;
+ status = "okay"; + status = "okay";
+}; +};
+ +
@ -766,3 +766,29 @@
+ status = "okay"; + status = "okay";
+}; +};
+ +
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -363,6 +363,11 @@ int stmmac_mdio_register(struct net_device *ndev)
goto bus_register_fail;
}
+ stmmac_mdio_write(new_bus,0,31,2627);
+ stmmac_mdio_write(new_bus,0,25,0x1801);
+ stmmac_mdio_write(new_bus,0,31,0);
+ stmmac_mdio_write(new_bus,0,0,0x8000);
+
if (priv->plat->phy_node || mdio_node)
goto bus_register_done;
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -2191,6 +2191,8 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
if (priv->extend_desc && (priv->mode == STMMAC_RING_MODE))
atds = 1;
+ msleep(1500);
+
ret = stmmac_reset(priv, priv->ioaddr);
if (ret) {
dev_err(priv->device, "Failed to reset the dma\n");

124
target/linux/rockchip/patches-5.10/809-arm64-dts-doornet1-add-rk3328-dmc-relate-node.patch Normal file
View File

@ -0,0 +1,124 @@
From 2184ab853067b484ba5677e35f1a6955a5c023a1 Mon Sep 17 00:00:00 2001
From: wowowow <you@example.com>
Date: Wed, 20 Oct 2021 13:46:46 +0800
Subject: [PATCH] arm64-dts-doornet1-add-rk3328-dmc-relate-node
---
.../boot/dts/rockchip/rk3328-doornet1.dts | 73 +++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
index 8333351..d984163 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
@@ -7,6 +7,7 @@
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
+#include "rk3328-dram-nanopi2-timing.dtsi"
#include "rk3328.dtsi"
/ {
@@ -56,6 +57,72 @@
enable-active-high;
};
+ dmc: dmc {
+ compatible = "rockchip,rk3328-dmc";
+ devfreq-events = <&dfi>;
+ center-supply = <&vdd_log>;
+ clocks = <&cru SCLK_DDRCLK>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <&dmc_opp_table>;
+ ddr_timing = <&ddr_timing>;
+ upthreshold = <40>;
+ downdifferential = <20>;
+ auto-min-freq = <786000>;
+ auto-freq-en = <1>;
+ #cooling-cells = <2>;
+ status = "okay";
+
+ ddr_power_model: ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <120>;
+ static-power-coefficient = <200>;
+ ts = <32000 4700 (-80) 2>;
+ thermal-zone = "soc-thermal";
+ };
+ };
+
+ dmc_opp_table: dmc-opp-table {
+ compatible = "operating-points-v2";
+
+ rockchip,leakage-voltage-sel = <
+ 1 10 0
+ 11 254 1
+ >;
+ nvmem-cells = <&logic_leakage>;
+ nvmem-cell-names = "ddr_leakage";
+
+ opp-786000000 {
+ opp-hz = /bits/ 64 <786000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-798000000 {
+ opp-hz = /bits/ 64 <798000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-840000000 {
+ opp-hz = /bits/ 64 <840000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-924000000 {
+ opp-hz = /bits/ 64 <924000000>;
+ opp-microvolt = <1100000>;
+ opp-microvolt-L0 = <1100000>;
+ opp-microvolt-L1 = <1075000>;
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1175000>;
+ opp-microvolt-L0 = <1175000>;
+ opp-microvolt-L1 = <1150000>;
+ };
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
@@ -138,6 +205,10 @@
cpu-supply = <&vdd_arm>;
};
+&dfi {
+ status = "okay";
+};
+
&gmac2io {
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
@@ -201,6 +272,7 @@
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
+ regulator-init-microvolt = <1075000>;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-ramp-delay = <12500>;
@@ -215,6 +287,7 @@
regulator-name = "vdd_arm";
regulator-always-on;
regulator-boot-on;
+ regulator-init-microvolt = <1225000>;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-ramp-delay = <12500>;
--
2.25.1

166
target/linux/rockchip/patches-5.15/203-rockchip-rk3328-Add-support-for-EmbedFire-DoorNet1.patch
View File

@ -1,15 +1,26 @@
---- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
--- /dev/null --- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
@@ -0,0 +1,412 @@ @@ -0,0 +1,495 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/* +/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net> + * Copyright (c) 2021 EmbedFire <embedfire@embedfire.com>
+ */ + */
+ +
+/dts-v1/; +/dts-v1/;
+ +
+#include <dt-bindings/input/input.h> +#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/gpio/gpio.h>
+#include "rk3328-dram-nanopi2-timing.dtsi"
+#include "rk3328.dtsi" +#include "rk3328.dtsi"
+ +
+/ { +/ {
@ -21,6 +32,8 @@
+ led-failsafe = &sys_led; + led-failsafe = &sys_led;
+ led-running = &sys_led; + led-running = &sys_led;
+ led-upgrade = &sys_led; + led-upgrade = &sys_led;
+ // mmc1 = &sdmmc;
+ // mmc0 = &emmc;
+ }; + };
+ +
+ chosen { + chosen {
@ -59,6 +72,72 @@
+ enable-active-high; + enable-active-high;
+ }; + };
+ +
+ dmc: dmc {
+ compatible = "rockchip,rk3328-dmc";
+ devfreq-events = <&dfi>;
+ center-supply = <&vdd_log>;
+ clocks = <&cru SCLK_DDRCLK>;
+ clock-names = "dmc_clk";
+ operating-points-v2 = <&dmc_opp_table>;
+ ddr_timing = <&ddr_timing>;
+ upthreshold = <40>;
+ downdifferential = <20>;
+ auto-min-freq = <786000>;
+ auto-freq-en = <1>;
+ #cooling-cells = <2>;
+ status = "okay";
+
+ ddr_power_model: ddr_power_model {
+ compatible = "ddr_power_model";
+ dynamic-power-coefficient = <120>;
+ static-power-coefficient = <200>;
+ ts = <32000 4700 (-80) 2>;
+ thermal-zone = "soc-thermal";
+ };
+ };
+
+ dmc_opp_table: dmc-opp-table {
+ compatible = "operating-points-v2";
+
+ rockchip,leakage-voltage-sel = <
+ 1 10 0
+ 11 254 1
+ >;
+ nvmem-cells = <&logic_leakage>;
+ nvmem-cell-names = "ddr_leakage";
+
+ opp-786000000 {
+ opp-hz = /bits/ 64 <786000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-798000000 {
+ opp-hz = /bits/ 64 <798000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-840000000 {
+ opp-hz = /bits/ 64 <840000000>;
+ opp-microvolt = <1075000>;
+ opp-microvolt-L0 = <1075000>;
+ opp-microvolt-L1 = <1050000>;
+ };
+ opp-924000000 {
+ opp-hz = /bits/ 64 <924000000>;
+ opp-microvolt = <1100000>;
+ opp-microvolt-L0 = <1100000>;
+ opp-microvolt-L1 = <1075000>;
+ };
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1175000>;
+ opp-microvolt-L0 = <1175000>;
+ opp-microvolt-L1 = <1150000>;
+ };
+ };
+
+ leds { + leds {
+ compatible = "gpio-leds"; + compatible = "gpio-leds";
+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; + pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
@ -78,6 +157,11 @@
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "doornet1:green:wan"; + label = "doornet1:green:wan";
+ }; + };
+
+ wifi_enable: wifi_enable {
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "wifi-enable";
+ };
+ }; + };
+ +
+ vcc_io_sdio: sdmmcio-regulator { + vcc_io_sdio: sdmmcio-regulator {
@ -93,8 +177,8 @@
+ regulator-settling-time-us = <5000>; + regulator-settling-time-us = <5000>;
+ regulator-type = "voltage"; + regulator-type = "voltage";
+ startup-delay-us = <2000>; + startup-delay-us = <2000>;
+ states = <1800000 0x1>, + states = <1800000 0x1
+ <3300000 0x0>; + 3300000 0x0>;
+ vin-supply = <&vcc_io_33>; + vin-supply = <&vcc_io_33>;
+ }; + };
+ +
@ -136,38 +220,24 @@
+ cpu-supply = <&vdd_arm>; + cpu-supply = <&vdd_arm>;
+}; +};
+ +
+&dfi {
+ status = "okay";
+};
+
+&gmac2io { +&gmac2io {
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
+ clock_in_out = "input"; + clock_in_out = "input";
+ phy-handle = <&rtl8211f>;
+ phy-mode = "rgmii"; + phy-mode = "rgmii";
+ phy-supply = <&vcc_io_33>; + phy-supply = <&vcc_io_33>;
+ pinctrl-0 = <&rgmiim1_pins>; + pinctrl-0 = <&rgmiim1_pins>;
+ pinctrl-names = "default"; + pinctrl-names = "default";
+ snps,aal; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ snps,rxpbl = <0x4>; + snps,reset-delays-us = <0 1000000 50000>;
+ snps,txpbl = <0x4>; + snps,reset-active-low;
+ tx_delay = <0x24>; + tx_delay = <0x18>;
+ rx_delay = <0x58>; + rx_delay = <0x24>;
+ status = "okay"; + status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211f: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ pinctrl-0 = <&eth_phy_reset_pin>;
+ pinctrl-names = "default";
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+}; +};
+ +
+&i2c1 { +&i2c1 {
@ -199,6 +269,7 @@
+ regulator-name = "vdd_log"; + regulator-name = "vdd_log";
+ regulator-always-on; + regulator-always-on;
+ regulator-boot-on; + regulator-boot-on;
+ regulator-init-microvolt = <1075000>;
+ regulator-min-microvolt = <712500>; + regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>; + regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>; + regulator-ramp-delay = <12500>;
@ -213,6 +284,7 @@
+ regulator-name = "vdd_arm"; + regulator-name = "vdd_arm";
+ regulator-always-on; + regulator-always-on;
+ regulator-boot-on; + regulator-boot-on;
+ regulator-init-microvolt = <1225000>;
+ regulator-min-microvolt = <712500>; + regulator-min-microvolt = <712500>;
+ regulator-max-microvolt = <1450000>; + regulator-max-microvolt = <1450000>;
+ regulator-ramp-delay = <12500>; + regulator-ramp-delay = <12500>;
@ -329,6 +401,10 @@
+ wan_led_pin: wan-led-pin { + wan_led_pin: wan-led-pin {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ }; + };
+
+ wifi_pin: wifi_pin{
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ }; + };
+ +
+ pmic { + pmic {
@ -363,6 +439,20 @@
+ status = "okay"; + status = "okay";
+}; +};
+ +
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <150000000>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ vmmc-supply = <&vcc_io_33>;
+ vqmmc-supply = <&vcc18_emmc>;
+ status = "okay";
+};
+
+&tsadc { +&tsadc {
+ rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>; + rockchip,hw-tshut-polarity = <0>;
@ -402,24 +492,20 @@
+ status = "okay"; + status = "okay";
+}; +};
+ +
+&usbdrd_dwc3 { +&usbdrd3 {
+ dr_mode = "host"; + dr_mode = "host";
+ status = "okay"; + status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ +
+ usb-eth@2 { + /* Second port is for USB 3.0 */
+ compatible = "realtek,rtl8153"; + rtl8153: device@2 {
+ compatible = "usbbda,8153";
+ reg = <2>; + reg = <2>;
+ +
+ realtek,led-data = <0x87>; + realtek,led-data = <0x87>;
+ }; + };
+}; +};
--- a/arch/arm64/boot/dts/rockchip/Makefile \ No newline at end of file
+++ b/arch/arm64/boot/dts/rockchip/Makefile --
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro 2.25.1
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb

30
target/linux/rockchip/patches-5.15/205-rockchip-rk3399-Add-support-for-EmbedFire-DoorNet2.patch
View File

@ -274,8 +274,8 @@
+ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ snps,reset-active-low; + snps,reset-active-low;
+ snps,reset-delays-us = <0 100000 50000>; + snps,reset-delays-us = <0 100000 50000>;
+ tx_delay = <0x13>; + tx_delay = <0x28>;
+ rx_delay = <0x0e>; + rx_delay = <0x11>;
+ status = "okay"; + status = "okay";
+}; +};
+ +
@ -766,3 +766,29 @@
+ status = "okay"; + status = "okay";
+}; +};
+ +
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -363,6 +363,11 @@ int stmmac_mdio_register(struct net_device *ndev)
goto bus_register_fail;
}
+ stmmac_mdio_write(new_bus,0,31,2627);
+ stmmac_mdio_write(new_bus,0,25,0x1801);
+ stmmac_mdio_write(new_bus,0,31,0);
+ stmmac_mdio_write(new_bus,0,0,0x8000);
+
if (priv->plat->phy_node || mdio_node)
goto bus_register_done;
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -2191,6 +2191,8 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv)
if (priv->extend_desc && (priv->mode == STMMAC_RING_MODE))
atds = 1;
+ msleep(1500);
+
ret = stmmac_reset(priv, priv->ioaddr);
if (ret) {
dev_err(priv->device, "Failed to reset the dma\n");

6
target/linux/rockchip/patches-5.15/207-rockchip-rk3328-add-support-for-FriendlyARM-NanoPi-Neo3.patch
View File

@ -35,11 +35,9 @@ to status_led in accordance with the board schematics.
--- a/arch/arm64/boot/dts/rockchip/Makefile --- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -8,8 +8,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-ro @@ -10,6 +10,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-doornet1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-neo3.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb

59
target/linux/rockchip/patches-5.4/203-rockchip-rk3328-Add-support-for-EmbedFire-DoorNet1.patch
View File

@ -9,10 +9,10 @@
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb
--- /dev/null --- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-doornet1.dts
@@ -0,0 +1,412 @@ @@ -0,0 +1,419 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/* +/*
+ * Copyright (c) 2020 David Bauer <mail@david-bauer.net> + * Copyright (c) 2021 EmbedFire <embedfire@embedfire.com>
+ */ + */
+ +
+/dts-v1/; +/dts-v1/;
@ -30,6 +30,8 @@
+ led-failsafe = &sys_led; + led-failsafe = &sys_led;
+ led-running = &sys_led; + led-running = &sys_led;
+ led-upgrade = &sys_led; + led-upgrade = &sys_led;
+ // mmc1 = &sdmmc;
+ // mmc0 = &emmc;
+ }; + };
+ +
+ chosen { + chosen {
@ -87,6 +89,11 @@
+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
+ label = "doornet1:green:wan"; + label = "doornet1:green:wan";
+ }; + };
+
+ wifi_enable: wifi_enable {
+ gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
+ label = "wifi-enable";
+ };
+ }; + };
+ +
+ vcc_io_sdio: sdmmcio-regulator { + vcc_io_sdio: sdmmcio-regulator {
@ -149,34 +156,16 @@
+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
+ clock_in_out = "input"; + clock_in_out = "input";
+ phy-handle = <&rtl8211f>;
+ phy-mode = "rgmii"; + phy-mode = "rgmii";
+ phy-supply = <&vcc_io_33>; + phy-supply = <&vcc_io_33>;
+ pinctrl-0 = <&rgmiim1_pins>; + pinctrl-0 = <&rgmiim1_pins>;
+ pinctrl-names = "default"; + pinctrl-names = "default";
+ snps,aal; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ snps,rxpbl = <0x4>; + snps,reset-delays-us = <0 1000000 50000>;
+ snps,txpbl = <0x4>; + snps,reset-active-low;
+ tx_delay = <0x24>; + tx_delay = <0xf>;
+ rx_delay = <0x58>; + rx_delay = <0x68>;
+ status = "okay"; + status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtl8211f: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916",
+ "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ pinctrl-0 = <&eth_phy_reset_pin>;
+ pinctrl-names = "default";
+ reset-assert-us = <10000>;
+ reset-deassert-us = <50000>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+ };
+}; +};
+ +
+&i2c1 { +&i2c1 {
@ -338,6 +327,10 @@
+ wan_led_pin: wan-led-pin { + wan_led_pin: wan-led-pin {
+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ }; + };
+
+ wifi_pin: wifi_pin{
+ rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ }; + };
+ +
+ pmic { + pmic {
@ -372,6 +365,20 @@
+ status = "okay"; + status = "okay";
+}; +};
+ +
+&emmc {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ max-frequency = <150000000>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+ vmmc-supply = <&vcc_io_33>;
+ vqmmc-supply = <&vcc18_emmc>;
+ status = "okay";
+};
+
+&tsadc { +&tsadc {
+ rockchip,hw-tshut-mode = <0>; + rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>; + rockchip,hw-tshut-polarity = <0>;
@ -422,3 +429,5 @@
+ realtek,led-data = <0x87>; + realtek,led-data = <0x87>;
+ }; + };
+}; +};
--
2.25.1