mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-04-16 04:13:31 +00:00
qca-nss-dp: add kernel 5.15 support
This commit is contained in:
lean
parent
ddc3641e5b
commit
76351e33bf
@ -3,11 +3,11 @@ include $(TOPDIR)/rules.mk
|
|||||||
PKG_NAME:=qca-nss-dp
|
PKG_NAME:=qca-nss-dp
|
||||||
PKG_RELEASE:=$(AUTORELEASE)
|
PKG_RELEASE:=$(AUTORELEASE)
|
||||||
|
|
||||||
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/cc-qrdk/oss/lklm/nss-dp
|
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-dp.git
|
||||||
PKG_SOURCE_PROTO:=git
|
PKG_SOURCE_PROTO:=git
|
||||||
PKG_SOURCE_DATE:=2021-03-26
|
PKG_SOURCE_DATE:=2022-06-15
|
||||||
PKG_SOURCE_VERSION:=e0c89348d5ad99559ce2fbe15d37b3b5bc66aa03
|
PKG_SOURCE_VERSION:=1465dd2aa5f5d9bd36d5b6cd24afed7b6e904bda
|
||||||
PKG_MIRROR_HASH:=f369f0c3b33b5f4ad6d0a6ad6ac5495f63c9ecaf94e4e7fa345169f3e44fcf45
|
PKG_MIRROR_HASH:=f483a93ca5c05b6ab16d55bd7d130a83964d76fff150f1edfd7d2a5ac2bb48d4
|
||||||
|
|
||||||
PKG_BUILD_PARALLEL:=1
|
PKG_BUILD_PARALLEL:=1
|
||||||
|
|
||||||
@ -21,7 +21,7 @@ define KernelPackage/qca-nss-dp
|
|||||||
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) +kmod-qca-ssdk-nohnat
|
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) +kmod-qca-ssdk-nohnat
|
||||||
TITLE:=Kernel driver for NSS data plane
|
TITLE:=Kernel driver for NSS data plane
|
||||||
FILES:=$(PKG_BUILD_DIR)/qca-nss-dp.ko
|
FILES:=$(PKG_BUILD_DIR)/qca-nss-dp.ko
|
||||||
AUTOLOAD:=$(call AutoLoad,31,qca-nss-dp)
|
AUTOLOAD:=$(call AutoLoad,31,qca-nss-dp,1)
|
||||||
endef
|
endef
|
||||||
|
|
||||||
define KernelPackage/qca-nss-dp/Description
|
define KernelPackage/qca-nss-dp/Description
|
||||||
@ -38,22 +38,16 @@ EXTRA_CFLAGS+= \
|
|||||||
|
|
||||||
NSS_DP_HAL_DIR:=$(PKG_BUILD_DIR)/hal
|
NSS_DP_HAL_DIR:=$(PKG_BUILD_DIR)/hal
|
||||||
define Build/Configure
|
define Build/Configure
|
||||||
$(LN) $(NSS_DP_HAL_DIR)/arch/$(CONFIG_TARGET_BOARD)/nss_$(CONFIG_TARGET_BOARD).h \
|
$(LN) $(NSS_DP_HAL_DIR)/soc_ops/$(CONFIG_TARGET_BOARD)/nss_$(CONFIG_TARGET_BOARD).h \
|
||||||
$(PKG_BUILD_DIR)/exports/nss_dp_arch.h
|
$(PKG_BUILD_DIR)/exports/nss_dp_arch.h
|
||||||
endef
|
endef
|
||||||
|
|
||||||
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
|
|
||||||
SOC="ipq807x_64"
|
|
||||||
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
|
|
||||||
SOC="ipq60xx_64"
|
|
||||||
endif
|
|
||||||
|
|
||||||
define Build/Compile
|
define Build/Compile
|
||||||
+$(MAKE) -C "$(LINUX_DIR)" \
|
+$(MAKE) -C "$(LINUX_DIR)" \
|
||||||
CROSS_COMPILE="$(TARGET_CROSS)" \
|
CROSS_COMPILE="$(TARGET_CROSS)" \
|
||||||
ARCH="$(LINUX_KARCH)" \
|
ARCH="$(LINUX_KARCH)" \
|
||||||
M="$(PKG_BUILD_DIR)" \
|
M="$(PKG_BUILD_DIR)" \
|
||||||
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC="$(SOC)" \
|
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC="$(CONFIG_TARGET_BOARD)" \
|
||||||
$(KERNEL_MAKE_FLAGS) \
|
$(KERNEL_MAKE_FLAGS) \
|
||||||
$(PKG_JOBS) \
|
$(PKG_JOBS) \
|
||||||
modules
|
modules
|
||||||
|
|||||||
@ -1,16 +1,16 @@
|
|||||||
From 40979666b4371012405715ffa61ab5760fcdc6b3 Mon Sep 17 00:00:00 2001
|
From 40979666b4371012405715ffa61ab5760fcdc6b3 Mon Sep 17 00:00:00 2001
|
||||||
Message-Id: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
Message-Id: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
||||||
From: Baruch Siach <baruch@tkos.co.il>
|
From: Baruch Siach <baruch@tkos.co.il>
|
||||||
Date: Mon, 3 May 2021 20:07:36 +0300
|
Date: Mon, 3 May 2021 20:07:36 +0300
|
||||||
Subject: [PATCH 1/3] edma_tx_rx: support newer kernels time stamping API
|
Subject: [PATCH 1/3] edma_tx_rx: support newer kernels time stamping API
|
||||||
|
|
||||||
---
|
---
|
||||||
hal/edma/edma_tx_rx.c | 11 +++++++++++
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 11 +++++++++++
|
||||||
1 file changed, 11 insertions(+)
|
1 file changed, 11 insertions(+)
|
||||||
|
|
||||||
--- a/hal/edma/edma_tx_rx.c
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
+++ b/hal/edma/edma_tx_rx.c
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
@@ -226,10 +226,16 @@ void nss_phy_tstamp_rx_buf(__attribute__
|
@@ -227,10 +227,16 @@ void nss_phy_tstamp_rx_buf(__attribute__
|
||||||
* set to the correct PTP class value by calling ptp_classify_raw
|
* set to the correct PTP class value by calling ptp_classify_raw
|
||||||
* in drv->rxtstamp function.
|
* in drv->rxtstamp function.
|
||||||
*/
|
*/
|
||||||
@ -27,7 +27,7 @@ Subject: [PATCH 1/3] edma_tx_rx: support newer kernels time stamping API
|
|||||||
|
|
||||||
netif_receive_skb(skb);
|
netif_receive_skb(skb);
|
||||||
}
|
}
|
||||||
@@ -247,9 +253,14 @@ void nss_phy_tstamp_tx_buf(struct net_de
|
@@ -248,9 +254,14 @@ void nss_phy_tstamp_tx_buf(struct net_de
|
||||||
* set to the correct PTP class value by calling ptp_classify_raw
|
* set to the correct PTP class value by calling ptp_classify_raw
|
||||||
* in the drv->txtstamp function.
|
* in the drv->txtstamp function.
|
||||||
*/
|
*/
|
||||||
|
|||||||
@ -1,29 +1,29 @@
|
|||||||
From cef7873a2d77df13ee702d902ed4e06b2248904b Mon Sep 17 00:00:00 2001
|
From cef7873a2d77df13ee702d902ed4e06b2248904b Mon Sep 17 00:00:00 2001
|
||||||
Message-Id: <cef7873a2d77df13ee702d902ed4e06b2248904b.1620066716.git.baruch@tkos.co.il>
|
Message-Id: <cef7873a2d77df13ee702d902ed4e06b2248904b.1620066716.git.baruch@tkos.co.il>
|
||||||
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
||||||
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
||||||
From: Baruch Siach <baruch@tkos.co.il>
|
From: Baruch Siach <baruch@tkos.co.il>
|
||||||
Date: Mon, 3 May 2021 20:17:22 +0300
|
Date: Mon, 3 May 2021 20:17:22 +0300
|
||||||
Subject: [PATCH 2/3] nss_dp_main: make phy mode code compatible with newer
|
Subject: [PATCH 2/3] nss_dp_main: make phy mode code compatible with newer
|
||||||
kernels
|
kernels
|
||||||
|
|
||||||
---
|
---
|
||||||
include/nss_dp_dev.h | 4 ++--
|
include/nss_dp_dev.h | 4 ++--
|
||||||
nss_dp_main.c | 4 ++++
|
nss_dp_main.c | 4 ++++
|
||||||
2 files changed, 6 insertions(+), 2 deletions(-)
|
2 files changed, 6 insertions(+), 2 deletions(-)
|
||||||
|
|
||||||
--- a/include/nss_dp_dev.h
|
--- a/include/nss_dp_dev.h
|
||||||
+++ b/include/nss_dp_dev.h
|
+++ b/include/nss_dp_dev.h
|
||||||
@@ -25,7 +25,7 @@
|
@@ -22,7 +22,7 @@
|
||||||
|
#include <linux/etherdevice.h>
|
||||||
#include <linux/netdevice.h>
|
#include <linux/netdevice.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/if_vlan.h>
|
|
||||||
-#include <linux/switch.h>
|
-#include <linux/switch.h>
|
||||||
+#include <linux/phy.h>
|
+#include <linux/phy.h>
|
||||||
|
#include <linux/version.h>
|
||||||
|
|
||||||
#include "nss_dp_api_if.h"
|
#include "nss_dp_api_if.h"
|
||||||
#include "nss_dp_hal_if.h"
|
@@ -99,7 +99,7 @@ struct nss_dp_dev {
|
||||||
@@ -46,7 +46,7 @@ struct nss_dp_dev {
|
|
||||||
/* Phy related stuff */
|
/* Phy related stuff */
|
||||||
struct phy_device *phydev; /* Phy device */
|
struct phy_device *phydev; /* Phy device */
|
||||||
struct mii_bus *miibus; /* MII bus */
|
struct mii_bus *miibus; /* MII bus */
|
||||||
@ -34,7 +34,7 @@ Subject: [PATCH 2/3] nss_dp_main: make phy mode code compatible with newer
|
|||||||
uint32_t forced_speed; /* Forced speed? */
|
uint32_t forced_speed; /* Forced speed? */
|
||||||
--- a/nss_dp_main.c
|
--- a/nss_dp_main.c
|
||||||
+++ b/nss_dp_main.c
|
+++ b/nss_dp_main.c
|
||||||
@@ -463,7 +463,11 @@ static int32_t nss_dp_of_get_pdata(struc
|
@@ -584,7 +584,11 @@ static int32_t nss_dp_of_get_pdata(struc
|
||||||
hal_pdata->netdev = netdev;
|
hal_pdata->netdev = netdev;
|
||||||
hal_pdata->macid = dp_priv->macid;
|
hal_pdata->macid = dp_priv->macid;
|
||||||
|
|
||||||
|
|||||||
@ -1,21 +1,21 @@
|
|||||||
From c8c52512ff48bee578901c381a42f027e79eadf9 Mon Sep 17 00:00:00 2001
|
From c8c52512ff48bee578901c381a42f027e79eadf9 Mon Sep 17 00:00:00 2001
|
||||||
Message-Id: <c8c52512ff48bee578901c381a42f027e79eadf9.1620066716.git.baruch@tkos.co.il>
|
Message-Id: <c8c52512ff48bee578901c381a42f027e79eadf9.1620066716.git.baruch@tkos.co.il>
|
||||||
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
||||||
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
|
||||||
From: Baruch Siach <baruch@tkos.co.il>
|
From: Baruch Siach <baruch@tkos.co.il>
|
||||||
Date: Mon, 3 May 2021 20:20:29 +0300
|
Date: Mon, 3 May 2021 20:20:29 +0300
|
||||||
Subject: [PATCH 3/3] Drop _nocache variants of ioremap()
|
Subject: [PATCH 3/3] Drop _nocache variants of ioremap()
|
||||||
|
|
||||||
Recent kernels removed them.
|
Recent kernels removed them.
|
||||||
---
|
---
|
||||||
hal/edma/edma_data_plane.c | 2 +-
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 2 +-
|
||||||
hal/gmac_hal_ops/qcom/qcom_if.c | 2 +-
|
hal/gmac_ops/qcom/qcom_if.c | 2 +-
|
||||||
hal/gmac_hal_ops/syn/xgmac/syn_if.c | 2 +-
|
hal/gmac_ops/syn/xgmac/syn_if.c | 2 +-
|
||||||
3 files changed, 3 insertions(+), 3 deletions(-)
|
3 files changed, 3 insertions(+), 3 deletions(-)
|
||||||
|
|
||||||
--- a/hal/edma/edma_data_plane.c
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
+++ b/hal/edma/edma_data_plane.c
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
@@ -797,7 +797,7 @@ int edma_init(void)
|
@@ -279,7 +279,7 @@ int edma_init(void)
|
||||||
/*
|
/*
|
||||||
* Remap register resource
|
* Remap register resource
|
||||||
*/
|
*/
|
||||||
@ -24,9 +24,9 @@ Recent kernels removed them.
|
|||||||
resource_size(edma_hw.reg_resource));
|
resource_size(edma_hw.reg_resource));
|
||||||
if (!edma_hw.reg_base) {
|
if (!edma_hw.reg_base) {
|
||||||
pr_warn("Unable to remap EDMA register memory.\n");
|
pr_warn("Unable to remap EDMA register memory.\n");
|
||||||
--- a/hal/gmac_hal_ops/qcom/qcom_if.c
|
--- a/hal/gmac_ops/qcom/qcom_if.c
|
||||||
+++ b/hal/gmac_hal_ops/qcom/qcom_if.c
|
+++ b/hal/gmac_ops/qcom/qcom_if.c
|
||||||
@@ -400,7 +400,7 @@ static void *qcom_init(struct gmac_hal_p
|
@@ -418,7 +418,7 @@ static void *qcom_init(struct nss_gmac_h
|
||||||
qhd->nghd.mac_id = gmacpdata->macid;
|
qhd->nghd.mac_id = gmacpdata->macid;
|
||||||
|
|
||||||
/* Populate the mac base addresses */
|
/* Populate the mac base addresses */
|
||||||
@ -35,9 +35,9 @@ Recent kernels removed them.
|
|||||||
res->start, resource_size(res));
|
res->start, resource_size(res));
|
||||||
if (!qhd->nghd.mac_base) {
|
if (!qhd->nghd.mac_base) {
|
||||||
netdev_dbg(ndev, "ioremap fail.\n");
|
netdev_dbg(ndev, "ioremap fail.\n");
|
||||||
--- a/hal/gmac_hal_ops/syn/xgmac/syn_if.c
|
--- a/hal/gmac_ops/syn/xgmac/syn_if.c
|
||||||
+++ b/hal/gmac_hal_ops/syn/xgmac/syn_if.c
|
+++ b/hal/gmac_ops/syn/xgmac/syn_if.c
|
||||||
@@ -422,7 +422,7 @@ static void *syn_init(struct gmac_hal_pl
|
@@ -432,7 +432,7 @@ static void *syn_init(struct nss_gmac_ha
|
||||||
|
|
||||||
/* Populate the mac base addresses */
|
/* Populate the mac base addresses */
|
||||||
shd->nghd.mac_base =
|
shd->nghd.mac_base =
|
||||||
|
|||||||
@ -9,12 +9,12 @@ cause NAPI over budget warnings.
|
|||||||
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
|
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
|
||||||
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||||
---
|
---
|
||||||
hal/edma/edma_tx_rx.c | 4 ++--
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 4 ++--
|
||||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||||
|
|
||||||
--- a/hal/edma/edma_tx_rx.c
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
+++ b/hal/edma/edma_tx_rx.c
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
@@ -458,12 +458,12 @@ int edma_napi(struct napi_struct *napi,
|
@@ -459,12 +459,12 @@ int edma_napi(struct napi_struct *napi,
|
||||||
|
|
||||||
for (i = 0; i < ehw->txcmpl_rings; i++) {
|
for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||||
txcmpl_ring = &ehw->txcmpl_ring[i];
|
txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||||
|
|||||||
@ -14,13 +14,13 @@ So use NAPI_POLL_WEIGHT as the weight.
|
|||||||
|
|
||||||
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||||
---
|
---
|
||||||
hal/edma/edma_data_plane.c | 2 +-
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 2 +-
|
||||||
hal/edma/edma_data_plane.h | 1 -
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 1 -
|
||||||
2 files changed, 1 insertion(+), 2 deletions(-)
|
2 files changed, 1 insertion(+), 2 deletions(-)
|
||||||
|
|
||||||
--- a/hal/edma/edma_data_plane.c
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
+++ b/hal/edma/edma_data_plane.c
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
@@ -582,7 +582,7 @@ static int edma_register_netdevice(struc
|
@@ -837,7 +837,7 @@ static int edma_register_netdevice(struc
|
||||||
*/
|
*/
|
||||||
if (!edma_hw.napi_added) {
|
if (!edma_hw.napi_added) {
|
||||||
netif_napi_add(netdev, &edma_hw.napi, edma_napi,
|
netif_napi_add(netdev, &edma_hw.napi, edma_napi,
|
||||||
@ -29,13 +29,13 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
|
|||||||
/*
|
/*
|
||||||
* Register the interrupt handlers and enable interrupts
|
* Register the interrupt handlers and enable interrupts
|
||||||
*/
|
*/
|
||||||
--- a/hal/edma/edma_data_plane.h
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
+++ b/hal/edma/edma_data_plane.h
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
@@ -27,7 +27,6 @@
|
@@ -26,7 +26,6 @@
|
||||||
#define EDMA_RX_PREHDR_SIZE (sizeof(struct edma_rx_preheader))
|
#define EDMA_RX_PREHDR_SIZE (sizeof(struct edma_rx_preheader))
|
||||||
#define EDMA_TX_PREHDR_SIZE (sizeof(struct edma_tx_preheader))
|
#define EDMA_TX_PREHDR_SIZE (sizeof(struct edma_tx_preheader))
|
||||||
#define EDMA_RING_SIZE 128
|
#define EDMA_RING_SIZE 128
|
||||||
-#define EDMA_NAPI_WORK 100
|
-#define EDMA_NAPI_WORK 100
|
||||||
#define EDMA_START_GMACS NSS_DP_START_IFNUM
|
#define EDMA_START_GMACS NSS_DP_HAL_START_IFNUM
|
||||||
#define EDMA_MAX_GMACS NSS_DP_HAL_MAX_PORTS
|
#define EDMA_MAX_GMACS NSS_DP_HAL_MAX_PORTS
|
||||||
#define EDMA_TX_PKT_MIN_SIZE 33 /* IPQ807x EDMA needs a minimum packet size of 33 bytes */
|
#define EDMA_TX_PKT_MIN_SIZE 33 /* IPQ807x EDMA needs a minimum packet size of 33 bytes */
|
||||||
|
|||||||
@ -13,13 +13,11 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
|
|||||||
nss_dp_main.c | 13 ++++---------
|
nss_dp_main.c | 13 ++++---------
|
||||||
1 file changed, 4 insertions(+), 9 deletions(-)
|
1 file changed, 4 insertions(+), 9 deletions(-)
|
||||||
|
|
||||||
diff --git a/nss_dp_main.c b/nss_dp_main.c
|
|
||||||
index 5580b13..28df280 100644
|
|
||||||
--- a/nss_dp_main.c
|
--- a/nss_dp_main.c
|
||||||
+++ b/nss_dp_main.c
|
+++ b/nss_dp_main.c
|
||||||
@@ -434,9 +434,10 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
|
@@ -555,9 +555,10 @@ static int32_t nss_dp_of_get_pdata(struc
|
||||||
struct net_device *netdev,
|
struct net_device *netdev,
|
||||||
struct gmac_hal_platform_data *hal_pdata)
|
struct nss_gmac_hal_platform_data *hal_pdata)
|
||||||
{
|
{
|
||||||
- uint8_t *maddr;
|
- uint8_t *maddr;
|
||||||
+ u8 maddr[ETH_ALEN];
|
+ u8 maddr[ETH_ALEN];
|
||||||
@ -29,7 +27,7 @@ index 5580b13..28df280 100644
|
|||||||
|
|
||||||
dp_priv = netdev_priv(netdev);
|
dp_priv = netdev_priv(netdev);
|
||||||
|
|
||||||
@@ -475,14 +476,8 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
|
@@ -600,14 +601,8 @@ static int32_t nss_dp_of_get_pdata(struc
|
||||||
of_property_read_u32(np, "qcom,forced-speed", &dp_priv->forced_speed);
|
of_property_read_u32(np, "qcom,forced-speed", &dp_priv->forced_speed);
|
||||||
of_property_read_u32(np, "qcom,forced-duplex", &dp_priv->forced_duplex);
|
of_property_read_u32(np, "qcom,forced-duplex", &dp_priv->forced_duplex);
|
||||||
|
|
||||||
@ -46,5 +44,3 @@ index 5580b13..28df280 100644
|
|||||||
ether_addr_copy(netdev->dev_addr, maddr);
|
ether_addr_copy(netdev->dev_addr, maddr);
|
||||||
} else {
|
} else {
|
||||||
random_ether_addr(netdev->dev_addr);
|
random_ether_addr(netdev->dev_addr);
|
||||||
--
|
|
||||||
2.31.1
|
|
||||||
|
|||||||
@ -0,0 +1,29 @@
|
|||||||
|
From 5da62ba19f554bf437752a44360fb5ae9f1a7f5e Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Marko <robimarko@gmail.com>
|
||||||
|
Date: Tue, 8 Mar 2022 10:48:32 +0100
|
||||||
|
Subject: [PATCH] NSS-DP: implement ethernet IOCTL-s
|
||||||
|
|
||||||
|
Since kernel 5.15 ethernet/PHY related IOCTL-s have been split from the
|
||||||
|
generic IOCTL netdev op.
|
||||||
|
So, implement the new op instead of the generic one which is considered
|
||||||
|
for private IOCTL-s only now for 5.15+.
|
||||||
|
|
||||||
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||||
|
---
|
||||||
|
nss_dp_main.c | 4 ++++
|
||||||
|
1 file changed, 4 insertions(+)
|
||||||
|
|
||||||
|
--- a/nss_dp_main.c
|
||||||
|
+++ b/nss_dp_main.c
|
||||||
|
@@ -532,7 +532,11 @@ static const struct net_device_ops nss_d
|
||||||
|
.ndo_set_mac_address = nss_dp_set_mac_address,
|
||||||
|
.ndo_validate_addr = eth_validate_addr,
|
||||||
|
.ndo_change_mtu = nss_dp_change_mtu,
|
||||||
|
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0))
|
||||||
|
.ndo_do_ioctl = nss_dp_do_ioctl,
|
||||||
|
+#else
|
||||||
|
+ .ndo_eth_ioctl = nss_dp_do_ioctl,
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0))
|
||||||
|
.ndo_bridge_setlink = switchdev_port_bridge_setlink,
|
||||||
@ -0,0 +1,48 @@
|
|||||||
|
From c9afdcdd2642485a6476906be9da2e811090fc7a Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Marko <robimarko@gmail.com>
|
||||||
|
Date: Fri, 18 Mar 2022 18:06:03 +0100
|
||||||
|
Subject: [PATCH] switchdev: remove the transaction structure
|
||||||
|
|
||||||
|
Since 5.12 there is no transaction structure anymore, so drop it for
|
||||||
|
5.12 and newer.
|
||||||
|
|
||||||
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||||
|
---
|
||||||
|
nss_dp_switchdev.c | 10 ++++++++++
|
||||||
|
1 file changed, 10 insertions(+)
|
||||||
|
|
||||||
|
--- a/nss_dp_switchdev.c
|
||||||
|
+++ b/nss_dp_switchdev.c
|
||||||
|
@@ -279,13 +279,19 @@ void nss_dp_switchdev_setup(struct net_d
|
||||||
|
* Sets attributes
|
||||||
|
*/
|
||||||
|
static int nss_dp_port_attr_set(struct net_device *dev,
|
||||||
|
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
|
||||||
|
const struct switchdev_attr *attr,
|
||||||
|
struct switchdev_trans *trans)
|
||||||
|
+#else
|
||||||
|
+ const struct switchdev_attr *attr)
|
||||||
|
+#endif
|
||||||
|
{
|
||||||
|
struct nss_dp_dev *dp_priv = (struct nss_dp_dev *)netdev_priv(dev);
|
||||||
|
|
||||||
|
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
|
||||||
|
if (switchdev_trans_ph_prepare(trans))
|
||||||
|
return 0;
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
switch (attr->id) {
|
||||||
|
case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
|
||||||
|
@@ -309,8 +315,12 @@ static int nss_dp_switchdev_port_attr_se
|
||||||
|
{
|
||||||
|
int err;
|
||||||
|
|
||||||
|
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
|
||||||
|
err = nss_dp_port_attr_set(netdev, port_attr_info->attr,
|
||||||
|
port_attr_info->trans);
|
||||||
|
+#else
|
||||||
|
+ err = nss_dp_port_attr_set(netdev, port_attr_info->attr);
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
port_attr_info->handled = true;
|
||||||
|
return notifier_from_errno(err);
|
||||||
@ -0,0 +1,51 @@
|
|||||||
|
From f95868d54301c0f54e968ec9d978c9caa02ee425 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Marko <robimarko@gmail.com>
|
||||||
|
Date: Fri, 18 Mar 2022 18:24:18 +0100
|
||||||
|
Subject: [PATCH] switchdev: use new switchdev flags
|
||||||
|
|
||||||
|
Since kernel 5.12 switched utilizes a new way of setting the flags by
|
||||||
|
using a dedicated structure with flags and mask.
|
||||||
|
|
||||||
|
So fix using kernels 5.12 and later.
|
||||||
|
|
||||||
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||||
|
---
|
||||||
|
include/nss_dp_dev.h | 7 +++++++
|
||||||
|
nss_dp_switchdev.c | 2 +-
|
||||||
|
2 files changed, 8 insertions(+), 1 deletion(-)
|
||||||
|
|
||||||
|
--- a/include/nss_dp_dev.h
|
||||||
|
+++ b/include/nss_dp_dev.h
|
||||||
|
@@ -24,6 +24,9 @@
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
#include <linux/phy.h>
|
||||||
|
#include <linux/version.h>
|
||||||
|
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 12, 0))
|
||||||
|
+#include <net/switchdev.h>
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
#include "nss_dp_api_if.h"
|
||||||
|
#include "nss_dp_hal_if.h"
|
||||||
|
@@ -126,7 +129,11 @@ struct nss_dp_dev {
|
||||||
|
/* switchdev related attributes */
|
||||||
|
#ifdef CONFIG_NET_SWITCHDEV
|
||||||
|
u8 stp_state; /* STP state of this physical port */
|
||||||
|
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 12, 0))
|
||||||
|
unsigned long brport_flags; /* bridge port flags */
|
||||||
|
+#else
|
||||||
|
+ struct switchdev_brport_flags brport_flags; /* bridge port flags */
|
||||||
|
+#endif
|
||||||
|
#endif
|
||||||
|
uint32_t rx_page_mode; /* page mode for Rx processing */
|
||||||
|
uint32_t rx_jumbo_mru; /* Jumbo mru value for Rx processing */
|
||||||
|
--- a/nss_dp_switchdev.c
|
||||||
|
+++ b/nss_dp_switchdev.c
|
||||||
|
@@ -296,7 +296,7 @@ static int nss_dp_port_attr_set(struct n
|
||||||
|
switch (attr->id) {
|
||||||
|
case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
|
||||||
|
dp_priv->brport_flags = attr->u.brport_flags;
|
||||||
|
- netdev_dbg(dev, "set brport_flags %lu\n", attr->u.brport_flags);
|
||||||
|
+ netdev_dbg(dev, "set brport_flags %lu\n", attr->u.brport_flags.val);
|
||||||
|
return 0;
|
||||||
|
case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
|
||||||
|
return nss_dp_stp_state_set(dp_priv, attr->u.stp_state);
|
||||||
@ -0,0 +1,110 @@
|
|||||||
|
From d16102cad769f430144ca8094d928762b445e9b0 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Marko <robimarko@gmail.com>
|
||||||
|
Date: Fri, 18 Mar 2022 22:02:01 +0100
|
||||||
|
Subject: [PATCH] switchdev: fix FDB roaming
|
||||||
|
|
||||||
|
Try and solve the roaming issue by trying to replicate what NSS bridge
|
||||||
|
module is doing, but by utilizing switchdev FDB notifiers instead of
|
||||||
|
adding new notifiers to the bridge code.
|
||||||
|
|
||||||
|
We register a new non-blocking switchdev notifier and simply wait for
|
||||||
|
notification, and then process the SWITCHDEV_FDB_DEL_TO_DEVICE
|
||||||
|
notifications.
|
||||||
|
|
||||||
|
Those tell us that a certain FDB entry should be removed, then a VSI ID
|
||||||
|
is fetched for the physical PPE port and using that VSI ID and the
|
||||||
|
notification provided MAC adress existing FDB entry gets removed.
|
||||||
|
|
||||||
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||||
|
---
|
||||||
|
nss_dp_switchdev.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++
|
||||||
|
1 file changed, 61 insertions(+)
|
||||||
|
|
||||||
|
--- a/nss_dp_switchdev.c
|
||||||
|
+++ b/nss_dp_switchdev.c
|
||||||
|
@@ -24,6 +24,8 @@
|
||||||
|
#include "nss_dp_dev.h"
|
||||||
|
#include "fal/fal_stp.h"
|
||||||
|
#include "fal/fal_ctrlpkt.h"
|
||||||
|
+#include "fal/fal_fdb.h"
|
||||||
|
+#include "ref/ref_vsi.h"
|
||||||
|
|
||||||
|
#define NSS_DP_SWITCH_ID 0
|
||||||
|
#define NSS_DP_SW_ETHTYPE_PID 0 /* PPE ethtype profile ID for slow protocols */
|
||||||
|
@@ -348,10 +350,64 @@ static int nss_dp_switchdev_event(struct
|
||||||
|
return NOTIFY_DONE;
|
||||||
|
}
|
||||||
|
|
||||||
|
+static int nss_dp_switchdev_fdb_del_event(struct net_device *netdev,
|
||||||
|
+ struct switchdev_notifier_fdb_info *fdb_info)
|
||||||
|
+{
|
||||||
|
+ struct nss_dp_dev *dp_priv = (struct nss_dp_dev *)netdev_priv(netdev);
|
||||||
|
+ fal_fdb_entry_t entry;
|
||||||
|
+ a_uint32_t vsi_id;
|
||||||
|
+ sw_error_t rv;
|
||||||
|
+
|
||||||
|
+ netdev_dbg(netdev, "FDB DEL %pM port %d\n", fdb_info->addr, dp_priv->macid);
|
||||||
|
+
|
||||||
|
+ rv = ppe_port_vsi_get(NSS_DP_SWITCH_ID, dp_priv->macid, &vsi_id);
|
||||||
|
+ if (rv) {
|
||||||
|
+ netdev_err(netdev, "cannot get VSI ID for port %d\n", dp_priv->macid);
|
||||||
|
+ return notifier_from_errno(rv);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ memset(&entry, 0, sizeof(entry));
|
||||||
|
+ memcpy(&entry.addr, fdb_info->addr, ETH_ALEN);
|
||||||
|
+ entry.fid = vsi_id;
|
||||||
|
+
|
||||||
|
+ rv = fal_fdb_entry_del_bymac(NSS_DP_SWITCH_ID, &entry);
|
||||||
|
+ if (rv) {
|
||||||
|
+ netdev_err(netdev, "FDB entry delete failed with MAC %pM and fid %d\n",
|
||||||
|
+ &entry.addr, entry.fid);
|
||||||
|
+ return notifier_from_errno(rv);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ return notifier_from_errno(rv);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int nss_dp_fdb_switchdev_event(struct notifier_block *nb,
|
||||||
|
+ unsigned long event, void *ptr)
|
||||||
|
+{
|
||||||
|
+ struct net_device *dev = switchdev_notifier_info_to_dev(ptr);
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * Handle switchdev event only for physical devices
|
||||||
|
+ */
|
||||||
|
+ if (!nss_dp_is_phy_dev(dev)) {
|
||||||
|
+ return NOTIFY_DONE;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ switch (event) {
|
||||||
|
+ case SWITCHDEV_FDB_DEL_TO_DEVICE:
|
||||||
|
+ return nss_dp_switchdev_fdb_del_event(dev, ptr);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ return NOTIFY_DONE;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
static struct notifier_block nss_dp_switchdev_notifier = {
|
||||||
|
.notifier_call = nss_dp_switchdev_event,
|
||||||
|
};
|
||||||
|
|
||||||
|
+static struct notifier_block nss_dp_switchdev_fdb_notifier = {
|
||||||
|
+ .notifier_call = nss_dp_fdb_switchdev_event,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
static bool switch_init_done;
|
||||||
|
|
||||||
|
/*
|
||||||
|
@@ -366,6 +422,11 @@ void nss_dp_switchdev_setup(struct net_d
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
+ err = register_switchdev_notifier(&nss_dp_switchdev_fdb_notifier);
|
||||||
|
+ if (err) {
|
||||||
|
+ netdev_dbg(dev, "%px:Failed to register switchdev FDB notifier\n", dev);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
err = register_switchdev_blocking_notifier(&nss_dp_switchdev_notifier);
|
||||||
|
if (err) {
|
||||||
|
netdev_dbg(dev, "%px:Failed to register switchdev notifier\n", dev);
|
||||||
@ -0,0 +1,31 @@
|
|||||||
|
From 7e4ae2d6285095794d73d2f2ce61404f61d4e633 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Ansuel Smith <ansuelsmth@gmail.com>
|
||||||
|
Date: Tue, 17 May 2022 15:55:36 +0200
|
||||||
|
Subject: [PATCH 11/11] treewide: fix confusing printing of registered netdev
|
||||||
|
|
||||||
|
Net core implementation changed and now printing the netdev name cause
|
||||||
|
confusing printing if done before register_netdev. Move the old printing
|
||||||
|
to dbg and add an additional info log right after register_netdev to
|
||||||
|
give the user some info on correct nss-dp probe.
|
||||||
|
|
||||||
|
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
nss_dp_main.c | 3 +++
|
||||||
|
1 files changed, 3 insertions(+), 0 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/nss_dp_main.c b/nss_dp_main.c
|
||||||
|
index c0ae9d6..441c300 100644
|
||||||
|
--- a/nss_dp_main.c
|
||||||
|
+++ b/nss_dp_main.c
|
||||||
|
@@ -875,6 +875,9 @@ static int32_t nss_dp_probe(struct platform_device *pdev)
|
||||||
|
goto phy_setup_fail;
|
||||||
|
}
|
||||||
|
|
||||||
|
+ netdev_info(netdev, "Registered netdev %s(qcom-id:%d)\n",
|
||||||
|
+ netdev->name, port_id);
|
||||||
|
+
|
||||||
|
dp_global_ctx.nss_dp[dp_priv->macid - 1] = dp_priv;
|
||||||
|
dp_global_ctx.slowproto_acl_bm = 0;
|
||||||
|
|
||||||
|
--
|
||||||
|
2.34.1
|
||||||
@ -0,0 +1,189 @@
|
|||||||
|
From 8293a26ca56ee2e9a88e4efb5dcc7f647803cd8c Mon Sep 17 00:00:00 2001
|
||||||
|
From: Alexandru Gagniuc <mr.nuke.me@gmail.com>
|
||||||
|
Date: Sun, 5 Jun 2022 21:45:09 -0500
|
||||||
|
Subject: [PATCH] nss_dp_main: Use a 'phy-handle' property to connect to the
|
||||||
|
PHY
|
||||||
|
|
||||||
|
The original method of connecting a PHY to the ethernet controller
|
||||||
|
requires the "qcom,link-poll", and "qcom,phy-mdio-addr" devicetree
|
||||||
|
properties. This is redundant. The PHY node already contains the MDIO
|
||||||
|
address, and attaching a PHY implies "link-poll".
|
||||||
|
|
||||||
|
Allow using a "phy-handle" property. Remove the following properties,
|
||||||
|
as they are no longer used:
|
||||||
|
* "qcom,link-poll"
|
||||||
|
* "qcom,phy-mdio-addr"
|
||||||
|
* "mdio-bus"
|
||||||
|
* "qcom,forced-speed"
|
||||||
|
* "qcom,forced-duplex"
|
||||||
|
|
||||||
|
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
|
||||||
|
---
|
||||||
|
include/nss_dp_dev.h | 5 +--
|
||||||
|
nss_dp_main.c | 91 +++++---------------------------------------
|
||||||
|
2 files changed, 10 insertions(+), 86 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/include/nss_dp_dev.h b/include/nss_dp_dev.h
|
||||||
|
index 19b3e78..63a857a 100644
|
||||||
|
--- a/include/nss_dp_dev.h
|
||||||
|
+++ b/include/nss_dp_dev.h
|
||||||
|
@@ -100,13 +100,10 @@ struct nss_dp_dev {
|
||||||
|
unsigned long drv_flags; /* Driver specific feature flags */
|
||||||
|
|
||||||
|
/* Phy related stuff */
|
||||||
|
+ struct device_node *phy_node;
|
||||||
|
struct phy_device *phydev; /* Phy device */
|
||||||
|
struct mii_bus *miibus; /* MII bus */
|
||||||
|
phy_interface_t phy_mii_type; /* RGMII/SGMII/QSGMII */
|
||||||
|
- uint32_t phy_mdio_addr; /* Mdio address */
|
||||||
|
- bool link_poll; /* Link polling enable? */
|
||||||
|
- uint32_t forced_speed; /* Forced speed? */
|
||||||
|
- uint32_t forced_duplex; /* Forced duplex? */
|
||||||
|
uint32_t link_state; /* Current link state */
|
||||||
|
uint32_t pause; /* Current flow control settings */
|
||||||
|
|
||||||
|
diff --git a/nss_dp_main.c b/nss_dp_main.c
|
||||||
|
index 441c300..a1e8627 100644
|
||||||
|
--- a/nss_dp_main.c
|
||||||
|
+++ b/nss_dp_main.c
|
||||||
|
@@ -399,7 +399,7 @@ static int nss_dp_open(struct net_device *netdev)
|
||||||
|
|
||||||
|
netif_start_queue(netdev);
|
||||||
|
|
||||||
|
- if (!dp_priv->link_poll) {
|
||||||
|
+ if (!dp_priv->phydev) {
|
||||||
|
/* Notify data plane link is up */
|
||||||
|
if (dp_priv->data_plane_ops->link_state(dp_priv->dpc, 1)) {
|
||||||
|
netdev_dbg(netdev, "Data plane set link failed\n");
|
||||||
|
@@ -576,6 +576,8 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
|
||||||
|
return -EFAULT;
|
||||||
|
}
|
||||||
|
|
||||||
|
+ dp_priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
|
||||||
|
+
|
||||||
|
if (of_property_read_u32(np, "qcom,mactype", &hal_pdata->mactype)) {
|
||||||
|
pr_err("%s: error reading mactype\n", np->name);
|
||||||
|
return -EFAULT;
|
||||||
|
@@ -594,16 +596,6 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
|
||||||
|
#else
|
||||||
|
of_get_phy_mode(np, &dp_priv->phy_mii_type);
|
||||||
|
#endif
|
||||||
|
- dp_priv->link_poll = of_property_read_bool(np, "qcom,link-poll");
|
||||||
|
- if (of_property_read_u32(np, "qcom,phy-mdio-addr",
|
||||||
|
- &dp_priv->phy_mdio_addr) && dp_priv->link_poll) {
|
||||||
|
- pr_err("%s: mdio addr required if link polling is enabled\n",
|
||||||
|
- np->name);
|
||||||
|
- return -EFAULT;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- of_property_read_u32(np, "qcom,forced-speed", &dp_priv->forced_speed);
|
||||||
|
- of_property_read_u32(np, "qcom,forced-duplex", &dp_priv->forced_duplex);
|
||||||
|
|
||||||
|
ret = of_get_mac_address(np, maddr);
|
||||||
|
if (!ret && is_valid_ether_addr(maddr)) {
|
||||||
|
@@ -636,50 +628,6 @@ static int32_t nss_dp_of_get_pdata(struct device_node *np,
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
-/*
|
||||||
|
- * nss_dp_mdio_attach()
|
||||||
|
- */
|
||||||
|
-static struct mii_bus *nss_dp_mdio_attach(struct platform_device *pdev)
|
||||||
|
-{
|
||||||
|
- struct device_node *mdio_node;
|
||||||
|
- struct platform_device *mdio_plat;
|
||||||
|
- struct ipq40xx_mdio_data *mdio_data;
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- * Find mii_bus using "mdio-bus" handle.
|
||||||
|
- */
|
||||||
|
- mdio_node = of_parse_phandle(pdev->dev.of_node, "mdio-bus", 0);
|
||||||
|
- if (mdio_node) {
|
||||||
|
- return of_mdio_find_bus(mdio_node);
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- mdio_node = of_find_compatible_node(NULL, NULL, "qcom,qca-mdio");
|
||||||
|
- if (!mdio_node) {
|
||||||
|
- mdio_node = of_find_compatible_node(NULL, NULL,
|
||||||
|
- "qcom,ipq40xx-mdio");
|
||||||
|
- if (!mdio_node) {
|
||||||
|
- dev_err(&pdev->dev, "cannot find mdio node by phandle\n");
|
||||||
|
- return NULL;
|
||||||
|
- }
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- mdio_plat = of_find_device_by_node(mdio_node);
|
||||||
|
- if (!mdio_plat) {
|
||||||
|
- dev_err(&pdev->dev, "cannot find platform device from mdio node\n");
|
||||||
|
- of_node_put(mdio_node);
|
||||||
|
- return NULL;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- mdio_data = dev_get_drvdata(&mdio_plat->dev);
|
||||||
|
- if (!mdio_data) {
|
||||||
|
- dev_err(&pdev->dev, "cannot get mii bus reference from device data\n");
|
||||||
|
- of_node_put(mdio_node);
|
||||||
|
- return NULL;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- return mdio_data->mii_bus;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
#ifdef CONFIG_NET_SWITCHDEV
|
||||||
|
/*
|
||||||
|
* nss_dp_is_phy_dev()
|
||||||
|
@@ -738,7 +686,6 @@ static int32_t nss_dp_probe(struct platform_device *pdev)
|
||||||
|
struct device_node *np = pdev->dev.of_node;
|
||||||
|
struct nss_gmac_hal_platform_data gmac_hal_pdata;
|
||||||
|
int32_t ret = 0;
|
||||||
|
- uint8_t phy_id[MII_BUS_ID_SIZE + 3];
|
||||||
|
#if defined(NSS_DP_PPE_SUPPORT)
|
||||||
|
uint32_t vsi_id;
|
||||||
|
fal_port_t port_id;
|
||||||
|
@@ -813,37 +760,17 @@ static int32_t nss_dp_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
|
dp_priv->drv_flags |= NSS_DP_PRIV_FLAG(INIT_DONE);
|
||||||
|
|
||||||
|
- if (dp_priv->link_poll) {
|
||||||
|
- dp_priv->miibus = nss_dp_mdio_attach(pdev);
|
||||||
|
- if (!dp_priv->miibus) {
|
||||||
|
- netdev_dbg(netdev, "failed to find miibus\n");
|
||||||
|
- goto phy_setup_fail;
|
||||||
|
- }
|
||||||
|
- snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
|
||||||
|
- dp_priv->miibus->id, dp_priv->phy_mdio_addr);
|
||||||
|
-
|
||||||
|
+ if (dp_priv->phy_node) {
|
||||||
|
SET_NETDEV_DEV(netdev, &pdev->dev);
|
||||||
|
-
|
||||||
|
- dp_priv->phydev = phy_connect(netdev, phy_id,
|
||||||
|
- &nss_dp_adjust_link,
|
||||||
|
- dp_priv->phy_mii_type);
|
||||||
|
+ dp_priv->phydev = of_phy_connect(netdev, dp_priv->phy_node,
|
||||||
|
+ &nss_dp_adjust_link, 0,
|
||||||
|
+ dp_priv->phy_mii_type);
|
||||||
|
if (IS_ERR(dp_priv->phydev)) {
|
||||||
|
- netdev_dbg(netdev, "failed to connect to phy device\n");
|
||||||
|
+ dev_err(&pdev->dev, "Could not attach to PHY\n");
|
||||||
|
goto phy_setup_fail;
|
||||||
|
}
|
||||||
|
|
||||||
|
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0))
|
||||||
|
- dp_priv->phydev->advertising |=
|
||||||
|
- (ADVERTISED_Pause | ADVERTISED_Asym_Pause);
|
||||||
|
- dp_priv->phydev->supported |=
|
||||||
|
- (SUPPORTED_Pause | SUPPORTED_Asym_Pause);
|
||||||
|
-#else
|
||||||
|
- linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, dp_priv->phydev->advertising);
|
||||||
|
- linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, dp_priv->phydev->advertising);
|
||||||
|
-
|
||||||
|
- linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, dp_priv->phydev->supported);
|
||||||
|
- linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, dp_priv->phydev->supported);
|
||||||
|
-#endif
|
||||||
|
+ phy_attached_info(dp_priv->phydev);
|
||||||
|
}
|
||||||
|
|
||||||
|
#if defined(NSS_DP_PPE_SUPPORT)
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,46 @@
|
|||||||
|
From 57b521e876986844dfe34457f39c62dc8100424d Mon Sep 17 00:00:00 2001
|
||||||
|
From: Robert Marko <robimarko@gmail.com>
|
||||||
|
Date: Thu, 23 Jun 2022 14:18:50 +0200
|
||||||
|
Subject: [PATCH] nss-dp: edma-v1: switch to napi_gro_receive
|
||||||
|
|
||||||
|
Utilize napi_gro_receive instead of plain netif_receive_skb on EDMA v1.
|
||||||
|
It provides significant performance improvements when testing with iperf3.
|
||||||
|
|
||||||
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
||||||
|
---
|
||||||
|
Makefile | 2 +-
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 4 ++++
|
||||||
|
2 files changed, 5 insertions(+), 1 deletion(-)
|
||||||
|
|
||||||
|
diff --git a/Makefile b/Makefile
|
||||||
|
index 8e81317..dcfa8ca 100644
|
||||||
|
--- a/Makefile
|
||||||
|
+++ b/Makefile
|
||||||
|
@@ -25,7 +25,7 @@ qca-nss-dp-objs += hal/dp_ops/edma_dp/edma_v1/edma_cfg.o \
|
||||||
|
hal/gmac_ops/qcom/qcom_if.o \
|
||||||
|
hal/gmac_ops/syn/xgmac/syn_if.o
|
||||||
|
NSS_DP_INCLUDE += -I$(obj)/hal/dp_ops/edma_dp/edma_v1/include
|
||||||
|
-ccflags-y += -DNSS_DP_PPE_SUPPORT
|
||||||
|
+ccflags-y += -DNSS_DP_PPE_SUPPORT -DNSS_DP_ENABLE_NAPI_GRO
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(SoC),$(filter $(SoC),ipq807x))
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 5780a30..6ee1451 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -411,7 +411,11 @@ static uint32_t edma_clean_rx(struct edma_hw *ehw,
|
||||||
|
NSS_PTP_EVENT_SERVICE_CODE))
|
||||||
|
nss_phy_tstamp_rx_buf(ndev, skb);
|
||||||
|
else
|
||||||
|
+#if defined(NSS_DP_ENABLE_NAPI_GRO)
|
||||||
|
+ napi_gro_receive(&ehw->napi, skb);
|
||||||
|
+#else
|
||||||
|
netif_receive_skb(skb);
|
||||||
|
+#endif
|
||||||
|
|
||||||
|
next_rx_desc:
|
||||||
|
/*
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,239 @@
|
|||||||
|
From e80ad87476fe55f602c4e76f6b1068036b34b7a0 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
Date: Fri, 24 Jun 2022 15:04:44 +0200
|
||||||
|
Subject: [PATCH 1/3] edma_v1: convert rx/tx_store to idr implementation
|
||||||
|
|
||||||
|
Convert rx/tx store to idr implementation to correctly scale in
|
||||||
|
preparation for support of multiqueue implementation.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 32 +++++++++----
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 8 +++-
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 49 ++++++++++++++------
|
||||||
|
3 files changed, 63 insertions(+), 26 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
index fbd315a..2e98aaf 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
@@ -72,8 +72,12 @@ static void edma_cleanup_rxfill_ring_res(struct edma_hw *ehw,
|
||||||
|
* Get sk_buff and free it
|
||||||
|
*/
|
||||||
|
store_idx = rxph->opaque;
|
||||||
|
- skb = ehw->rx_skb_store[store_idx];
|
||||||
|
- ehw->rx_skb_store[store_idx] = NULL;
|
||||||
|
+
|
||||||
|
+ spin_lock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+ skb = idr_find(&ehw->rx_skb_idr, store_idx);
|
||||||
|
+ idr_remove(&ehw->rx_skb_idr, store_idx);
|
||||||
|
+ spin_unlock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
dev_kfree_skb_any(skb);
|
||||||
|
cons_idx++;
|
||||||
|
if (cons_idx == rxfill_ring->count)
|
||||||
|
@@ -173,8 +177,12 @@ static void edma_cleanup_rxdesc_ring_res(struct edma_hw *ehw,
|
||||||
|
dma_unmap_single(&pdev->dev, rxdesc_desc->buffer_addr,
|
||||||
|
ehw->rx_alloc_size, DMA_FROM_DEVICE);
|
||||||
|
store_idx = rxph->opaque;
|
||||||
|
- skb = ehw->rx_skb_store[store_idx];
|
||||||
|
- ehw->rx_skb_store[store_idx] = NULL;
|
||||||
|
+
|
||||||
|
+ spin_lock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+ skb = idr_find(&ehw->rx_skb_idr, store_idx);
|
||||||
|
+ idr_remove(&ehw->rx_skb_idr, store_idx);
|
||||||
|
+ spin_unlock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
dev_kfree_skb_any(skb);
|
||||||
|
|
||||||
|
/*
|
||||||
|
@@ -270,8 +278,11 @@ static void edma_cleanup_txdesc_ring_res(struct edma_hw *ehw,
|
||||||
|
while (cons_idx != prod_idx) {
|
||||||
|
txdesc = EDMA_TXDESC_DESC(txdesc_ring, cons_idx);
|
||||||
|
store_idx = txdesc->buffer_addr;
|
||||||
|
- skb = ehw->tx_skb_store[store_idx];
|
||||||
|
- ehw->tx_skb_store[store_idx] = NULL;
|
||||||
|
+
|
||||||
|
+ spin_lock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
+ skb = idr_find(&ehw->tx_skb_idr, store_idx);
|
||||||
|
+ idr_remove(&ehw->tx_skb_idr, store_idx);
|
||||||
|
+ spin_unlock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
|
||||||
|
buf_len = (txdesc->word1 & EDMA_TXDESC_DATA_LENGTH_MASK) >>
|
||||||
|
EDMA_TXDESC_DATA_LENGTH_SHIFT;
|
||||||
|
@@ -675,10 +686,11 @@ static void edma_configure_rings(struct edma_hw *ehw)
|
||||||
|
/*
|
||||||
|
* Initialize the store
|
||||||
|
*/
|
||||||
|
- for (i = 0; i < EDMA_RING_SIZE; i++) {
|
||||||
|
- ehw->tx_skb_store[i] = NULL;
|
||||||
|
- ehw->rx_skb_store[i] = NULL;
|
||||||
|
- }
|
||||||
|
+ idr_init(&ehw->rx_skb_idr);
|
||||||
|
+ spin_lock_init(&ehw->rx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
+ idr_init(&ehw->tx_skb_idr);
|
||||||
|
+ spin_lock_init(&ehw->tx_skb_idr_lock);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Configure TXDESC ring
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
index 0b28fe8..2bbe478 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
@@ -44,6 +44,8 @@
|
||||||
|
#define EDMA_RXPH_SRC_INFO_TYPE_GET(rxph) (((rxph)->src_info >> 8) & 0xf0)
|
||||||
|
#define EDMA_RXPH_SERVICE_CODE_GET(rxph) (((rxph)->rx_pre4) & 0xff)
|
||||||
|
|
||||||
|
+#define EDMA_TX_IDR_MAX EDMA_RING_SIZE * EDMA_MAX_TXDESC_RINGS
|
||||||
|
+#define EDMA_RX_IDR_MAX EDMA_RING_SIZE * EDMA_MAX_RXDESC_RINGS
|
||||||
|
/*
|
||||||
|
* Tx descriptor
|
||||||
|
*/
|
||||||
|
@@ -202,8 +204,10 @@ struct edma_hw {
|
||||||
|
/*
|
||||||
|
* Store for tx and rx skbs
|
||||||
|
*/
|
||||||
|
- struct sk_buff *rx_skb_store[EDMA_RING_SIZE];
|
||||||
|
- struct sk_buff *tx_skb_store[EDMA_RING_SIZE];
|
||||||
|
+ struct idr rx_skb_idr;
|
||||||
|
+ spinlock_t rx_skb_idr_lock;
|
||||||
|
+ struct idr tx_skb_idr;
|
||||||
|
+ spinlock_t tx_skb_idr_lock;
|
||||||
|
|
||||||
|
struct edma_rxfill_ring *rxfill_ring;
|
||||||
|
/* Rx Fill Ring, SW is producer */
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 5780a30..8cded66 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -37,9 +37,9 @@ int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||||
|
uint16_t cons, next, counter;
|
||||||
|
struct edma_rxfill_desc *rxfill_desc;
|
||||||
|
uint32_t reg_data = 0;
|
||||||
|
- uint32_t store_index = 0;
|
||||||
|
uint32_t alloc_size = ehw->rx_alloc_size;
|
||||||
|
struct edma_rx_preheader *rxph = NULL;
|
||||||
|
+ int store_index;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Read RXFILL ring producer index
|
||||||
|
@@ -82,12 +82,16 @@ int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||||
|
/*
|
||||||
|
* Store the skb in the rx store
|
||||||
|
*/
|
||||||
|
- store_index = next;
|
||||||
|
- if (ehw->rx_skb_store[store_index] != NULL) {
|
||||||
|
+ spin_lock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+ store_index = idr_alloc(&ehw->rx_skb_idr,
|
||||||
|
+ skb, 0, EDMA_RX_IDR_MAX, GFP_ATOMIC);
|
||||||
|
+ spin_unlock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
+ if (store_index < 0) {
|
||||||
|
dev_kfree_skb_any(skb);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
- ehw->rx_skb_store[store_index] = skb;
|
||||||
|
+
|
||||||
|
memcpy((uint8_t *)&rxph->opaque, (uint8_t *)&store_index, 4);
|
||||||
|
/*
|
||||||
|
* Save buffer size in RXFILL descriptor
|
||||||
|
@@ -106,7 +110,9 @@ int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||||
|
|
||||||
|
if (!rxfill_desc->buffer_addr) {
|
||||||
|
dev_kfree_skb_any(skb);
|
||||||
|
- ehw->rx_skb_store[store_index] = NULL;
|
||||||
|
+ spin_lock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+ idr_remove(&ehw->rx_skb_idr, store_index);
|
||||||
|
+ spin_unlock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -173,15 +179,19 @@ uint32_t edma_clean_tx(struct edma_hw *ehw,
|
||||||
|
* buffer address (opaque) of txcmpl
|
||||||
|
*/
|
||||||
|
store_index = txcmpl->buffer_addr;
|
||||||
|
- skb = ehw->tx_skb_store[store_index];
|
||||||
|
- ehw->tx_skb_store[store_index] = NULL;
|
||||||
|
+ spin_lock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
+ skb = idr_find(&ehw->tx_skb_idr, store_index);
|
||||||
|
|
||||||
|
if (unlikely(!skb)) {
|
||||||
|
pr_warn("Invalid skb: cons_idx:%u prod_idx:%u status %x\n",
|
||||||
|
cons_idx, prod_idx, txcmpl->status);
|
||||||
|
+ spin_unlock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
goto next_txcmpl_desc;
|
||||||
|
}
|
||||||
|
|
||||||
|
+ idr_remove(&ehw->tx_skb_idr, store_index);
|
||||||
|
+ spin_unlock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
len = skb_headlen(skb);
|
||||||
|
daddr = (dma_addr_t)virt_to_phys(skb->data);
|
||||||
|
|
||||||
|
@@ -322,14 +332,19 @@ static uint32_t edma_clean_rx(struct edma_hw *ehw,
|
||||||
|
DMA_FROM_DEVICE);
|
||||||
|
|
||||||
|
store_index = rxph->opaque;
|
||||||
|
- skb = ehw->rx_skb_store[store_index];
|
||||||
|
- ehw->rx_skb_store[store_index] = NULL;
|
||||||
|
+ spin_lock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+ skb = idr_find(&ehw->rx_skb_idr, store_index);
|
||||||
|
+
|
||||||
|
if (unlikely(!skb)) {
|
||||||
|
+ spin_unlock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
pr_warn("WARN: empty skb reference in rx_store:%d\n",
|
||||||
|
cons_idx);
|
||||||
|
goto next_rx_desc;
|
||||||
|
}
|
||||||
|
|
||||||
|
+ idr_remove(&ehw->rx_skb_idr, store_index);
|
||||||
|
+ spin_unlock_bh(&ehw->rx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
/*
|
||||||
|
* Check src_info from Rx preheader
|
||||||
|
*/
|
||||||
|
@@ -539,7 +554,7 @@ enum edma_tx edma_ring_xmit(struct edma_hw *ehw,
|
||||||
|
uint16_t buf_len;
|
||||||
|
uint16_t hw_next_to_use, hw_next_to_clean, chk_idx;
|
||||||
|
uint32_t data;
|
||||||
|
- uint32_t store_index = 0;
|
||||||
|
+ int store_index = 0;
|
||||||
|
struct edma_tx_preheader *txph = NULL;
|
||||||
|
|
||||||
|
/*
|
||||||
|
@@ -616,13 +631,16 @@ enum edma_tx edma_ring_xmit(struct edma_hw *ehw,
|
||||||
|
/*
|
||||||
|
* Store the skb in tx_store
|
||||||
|
*/
|
||||||
|
- store_index = hw_next_to_use & (txdesc_ring->count - 1);
|
||||||
|
- if (unlikely(ehw->tx_skb_store[store_index] != NULL)) {
|
||||||
|
+ spin_lock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
+ store_index = idr_alloc(&ehw->tx_skb_idr,
|
||||||
|
+ skb, 0, EDMA_RX_IDR_MAX, GFP_ATOMIC);
|
||||||
|
+ spin_unlock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
+ if (unlikely(store_index < 0)) {
|
||||||
|
spin_unlock_bh(&txdesc_ring->tx_lock);
|
||||||
|
return EDMA_TX_DESC;
|
||||||
|
}
|
||||||
|
|
||||||
|
- ehw->tx_skb_store[store_index] = skb;
|
||||||
|
memcpy(skb->data, &store_index, 4);
|
||||||
|
|
||||||
|
/*
|
||||||
|
@@ -645,7 +663,10 @@ enum edma_tx edma_ring_xmit(struct edma_hw *ehw,
|
||||||
|
*/
|
||||||
|
dev_kfree_skb_any(skb);
|
||||||
|
|
||||||
|
- ehw->tx_skb_store[store_index] = NULL;
|
||||||
|
+ spin_lock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
+ idr_remove(&ehw->tx_skb_idr, store_index);
|
||||||
|
+ spin_unlock_bh(&ehw->tx_skb_idr_lock);
|
||||||
|
+
|
||||||
|
spin_unlock_bh(&txdesc_ring->tx_lock);
|
||||||
|
return EDMA_TX_OK;
|
||||||
|
}
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,125 @@
|
|||||||
|
From b7fe6524ef7e1b3579141030a784b311c913f721 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
Date: Fri, 24 Jun 2022 16:33:07 +0200
|
||||||
|
Subject: [PATCH 1/2] edma_v1: move rxfill to specific irq handler
|
||||||
|
|
||||||
|
Move rxfill logic to specific irq handler.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 2 +-
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 1 +
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 52 +++++++++++++-------
|
||||||
|
3 files changed, 36 insertions(+), 19 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
index 1d748db..65bd0db 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
@@ -731,7 +731,7 @@ static int edma_irq_init(void)
|
||||||
|
*/
|
||||||
|
for (i = 0; i < edma_hw.rxfill_rings; i++) {
|
||||||
|
err = request_irq(edma_hw.rxfill_intr[i],
|
||||||
|
- edma_handle_irq, IRQF_SHARED,
|
||||||
|
+ edma_rx_fill_handle_irq, IRQF_SHARED,
|
||||||
|
"edma_rxfill", (void *)edma_hw.pdev);
|
||||||
|
if (err) {
|
||||||
|
pr_debug("RXFILL ring IRQ:%d request failed\n",
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
index 2bbe478..d0237ba 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
@@ -283,6 +283,7 @@ enum edma_tx edma_ring_xmit(struct edma_hw *ehw,
|
||||||
|
uint32_t edma_clean_tx(struct edma_hw *ehw,
|
||||||
|
struct edma_txcmpl_ring *txcmpl_ring);
|
||||||
|
irqreturn_t edma_handle_irq(int irq, void *ctx);
|
||||||
|
+irqreturn_t edma_rx_fill_handle_irq(int irq, void *ctx);
|
||||||
|
irqreturn_t edma_handle_misc_irq(int irq, void *ctx);
|
||||||
|
int edma_napi(struct napi_struct *napi, int budget);
|
||||||
|
void edma_cleanup_rings(struct edma_hw *ehw);
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 355fe83..374c90f 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -740,11 +740,9 @@ irqreturn_t edma_handle_irq(int irq, void *ctx)
|
||||||
|
uint32_t reg_data = 0;
|
||||||
|
uint32_t rxdesc_intr_status = 0;
|
||||||
|
uint32_t txcmpl_intr_status = 0;
|
||||||
|
- uint32_t rxfill_intr_status = 0;
|
||||||
|
int i;
|
||||||
|
struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||||
|
struct edma_rxdesc_ring *rxdesc_ring = NULL;
|
||||||
|
- struct edma_rxfill_ring *rxfill_ring = NULL;
|
||||||
|
struct edma_hw *ehw = NULL;
|
||||||
|
struct platform_device *pdev = (struct platform_device *)ctx;
|
||||||
|
|
||||||
|
@@ -788,9 +786,40 @@ irqreturn_t edma_handle_irq(int irq, void *ctx)
|
||||||
|
EDMA_MASK_INT_DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
+ if ((rxdesc_intr_status == 0) && (txcmpl_intr_status == 0))
|
||||||
|
+ return IRQ_NONE;
|
||||||
|
+
|
||||||
|
+ for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
+ rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
+ edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ EDMA_MASK_INT_DISABLE);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
/*
|
||||||
|
- * Read RxFill intr status
|
||||||
|
+ *TODO - per core NAPI
|
||||||
|
*/
|
||||||
|
+ if (rxdesc_intr_status || txcmpl_intr_status)
|
||||||
|
+ if (likely(napi_schedule_prep(&ehw->napi)))
|
||||||
|
+ __napi_schedule(&ehw->napi);
|
||||||
|
+
|
||||||
|
+ return IRQ_HANDLED;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+irqreturn_t edma_rx_fill_handle_irq(int irq, void *ctx)
|
||||||
|
+{
|
||||||
|
+ struct platform_device *pdev = (struct platform_device *)ctx;
|
||||||
|
+ struct edma_rxfill_ring *rxfill_ring;
|
||||||
|
+ uint32_t rxfill_intr_status;
|
||||||
|
+ struct edma_hw *ehw;
|
||||||
|
+ uint32_t reg_data;
|
||||||
|
+ int i;
|
||||||
|
+
|
||||||
|
+ ehw = platform_get_drvdata(pdev);
|
||||||
|
+ if (!ehw) {
|
||||||
|
+ pr_info("Unable to retrieve platrofm data");
|
||||||
|
+ return IRQ_HANDLED;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
for (i = 0; i < ehw->rxfill_rings; i++) {
|
||||||
|
rxfill_ring = &ehw->rxfill_ring[i];
|
||||||
|
reg_data = edma_reg_read(
|
||||||
|
@@ -806,22 +835,9 @@ irqreturn_t edma_handle_irq(int irq, void *ctx)
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
- if ((rxdesc_intr_status == 0) && (txcmpl_intr_status == 0) &&
|
||||||
|
- (rxfill_intr_status == 0))
|
||||||
|
+ if (!rxfill_intr_status)
|
||||||
|
return IRQ_NONE;
|
||||||
|
|
||||||
|
- for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
- rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- EDMA_MASK_INT_DISABLE);
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- *TODO - per core NAPI
|
||||||
|
- */
|
||||||
|
- if (rxdesc_intr_status || txcmpl_intr_status || rxfill_intr_status)
|
||||||
|
- if (likely(napi_schedule_prep(&ehw->napi)))
|
||||||
|
- __napi_schedule(&ehw->napi);
|
||||||
|
-
|
||||||
|
return IRQ_HANDLED;
|
||||||
|
}
|
||||||
|
+
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,313 @@
|
|||||||
|
From 0c0f9befa1ae766add49e1aa70a9028809526ad0 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
Date: Fri, 24 Jun 2022 16:35:55 +0200
|
||||||
|
Subject: [PATCH 3/6] edma_v1: split rx and tx napi path and irq handler
|
||||||
|
|
||||||
|
Split rx and tx napi and irq handler to own handler.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 18 ++-
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 10 +-
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 131 +++++++++++++------
|
||||||
|
3 files changed, 109 insertions(+), 50 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
index 65bd0db..8932f40 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
@@ -407,7 +407,8 @@ void edma_cleanup(bool is_dp_override)
|
||||||
|
synchronize_irq(edma_hw.misc_intr);
|
||||||
|
free_irq(edma_hw.misc_intr, (void *)(edma_hw.pdev));
|
||||||
|
|
||||||
|
- netif_napi_del(&edma_hw.napi);
|
||||||
|
+ netif_napi_del(&edma_hw.rx_napi);
|
||||||
|
+ netif_napi_del(&edma_hw.tx_napi);
|
||||||
|
edma_hw.napi_added = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -451,7 +452,8 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
|
||||||
|
if (edma_hw.active++ != 0)
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
|
||||||
|
- napi_enable(&edma_hw.napi);
|
||||||
|
+ napi_enable(&edma_hw.rx_napi);
|
||||||
|
+ napi_enable(&edma_hw.tx_napi);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable the interrupt masks.
|
||||||
|
@@ -478,7 +480,8 @@ static int edma_if_close(struct nss_dp_data_plane_ctx *dpc)
|
||||||
|
/*
|
||||||
|
* Disable NAPI
|
||||||
|
*/
|
||||||
|
- napi_disable(&edma_hw.napi);
|
||||||
|
+ napi_disable(&edma_hw.rx_napi);
|
||||||
|
+ napi_disable(&edma_hw.tx_napi);
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -716,7 +719,7 @@ static int edma_irq_init(void)
|
||||||
|
*/
|
||||||
|
for (i = 0; i < edma_hw.txcmpl_rings; i++) {
|
||||||
|
err = request_irq(edma_hw.txcmpl_intr[i],
|
||||||
|
- edma_handle_irq, IRQF_SHARED,
|
||||||
|
+ edma_tx_handle_irq, IRQF_SHARED,
|
||||||
|
"edma_txcmpl", (void *)edma_hw.pdev);
|
||||||
|
if (err) {
|
||||||
|
pr_debug("TXCMPL ring IRQ:%d request failed\n",
|
||||||
|
@@ -745,7 +748,7 @@ static int edma_irq_init(void)
|
||||||
|
*/
|
||||||
|
for (i = 0; i < edma_hw.rxdesc_rings; i++) {
|
||||||
|
err = request_irq(edma_hw.rxdesc_intr[i],
|
||||||
|
- edma_handle_irq, IRQF_SHARED,
|
||||||
|
+ edma_rx_handle_irq, IRQF_SHARED,
|
||||||
|
"edma_rxdesc", (void *)edma_hw.pdev);
|
||||||
|
if (err) {
|
||||||
|
pr_debug("RXDESC ring IRQ:%d request failed\n",
|
||||||
|
@@ -836,7 +839,10 @@ static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
|
||||||
|
* NAPI add
|
||||||
|
*/
|
||||||
|
if (!edma_hw.napi_added) {
|
||||||
|
- netif_napi_add(netdev, &edma_hw.napi, edma_napi,
|
||||||
|
+ netif_napi_add(netdev, &edma_hw.rx_napi, edma_rx_napi,
|
||||||
|
+ NAPI_POLL_WEIGHT);
|
||||||
|
+
|
||||||
|
+ netif_tx_napi_add(netdev, &edma_hw.tx_napi, edma_tx_napi,
|
||||||
|
NAPI_POLL_WEIGHT);
|
||||||
|
/*
|
||||||
|
* Register the interrupt handlers and enable interrupts
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
index d0237ba..a45fb99 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
@@ -172,7 +172,9 @@ enum edma_tx {
|
||||||
|
* EDMA private data structure
|
||||||
|
*/
|
||||||
|
struct edma_hw {
|
||||||
|
- struct napi_struct napi;
|
||||||
|
+ struct napi_struct rx_napi;
|
||||||
|
+ /* napi structure */
|
||||||
|
+ struct napi_struct tx_napi;
|
||||||
|
/* napi structure */
|
||||||
|
struct net_device *netdev_arr[EDMA_MAX_GMACS];
|
||||||
|
/* netdev for each gmac port */
|
||||||
|
@@ -282,10 +284,12 @@ enum edma_tx edma_ring_xmit(struct edma_hw *ehw,
|
||||||
|
struct edma_txdesc_ring *txdesc_ring);
|
||||||
|
uint32_t edma_clean_tx(struct edma_hw *ehw,
|
||||||
|
struct edma_txcmpl_ring *txcmpl_ring);
|
||||||
|
-irqreturn_t edma_handle_irq(int irq, void *ctx);
|
||||||
|
+irqreturn_t edma_tx_handle_irq(int irq, void *ctx);
|
||||||
|
+irqreturn_t edma_rx_handle_irq(int irq, void *ctx);
|
||||||
|
irqreturn_t edma_rx_fill_handle_irq(int irq, void *ctx);
|
||||||
|
irqreturn_t edma_handle_misc_irq(int irq, void *ctx);
|
||||||
|
-int edma_napi(struct napi_struct *napi, int budget);
|
||||||
|
+int edma_rx_napi(struct napi_struct *napi, int budget);
|
||||||
|
+int edma_tx_napi(struct napi_struct *napi, int budget);
|
||||||
|
void edma_cleanup_rings(struct edma_hw *ehw);
|
||||||
|
int edma_hw_init(struct edma_hw *ehw);
|
||||||
|
#endif /* __NSS_DP_EDMA_DATAPLANE__ */
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 7c84455..ace8140 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -456,14 +456,12 @@ next_rx_desc:
|
||||||
|
* edma_napi()
|
||||||
|
* EDMA NAPI handler
|
||||||
|
*/
|
||||||
|
-int edma_napi(struct napi_struct *napi, int budget)
|
||||||
|
+int edma_rx_napi(struct napi_struct *napi, int budget)
|
||||||
|
{
|
||||||
|
- struct edma_hw *ehw = container_of(napi, struct edma_hw, napi);
|
||||||
|
- struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||||
|
+ struct edma_hw *ehw = container_of(napi, struct edma_hw, rx_napi);
|
||||||
|
struct edma_rxdesc_ring *rxdesc_ring = NULL;
|
||||||
|
struct edma_rxfill_ring *rxfill_ring = NULL;
|
||||||
|
|
||||||
|
- struct net_device *ndev;
|
||||||
|
int work_done = 0;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
@@ -472,16 +470,56 @@ int edma_napi(struct napi_struct *napi, int budget)
|
||||||
|
work_done += edma_clean_rx(ehw, budget, rxdesc_ring);
|
||||||
|
}
|
||||||
|
|
||||||
|
+ /*
|
||||||
|
+ * TODO - rework and fix the budget control
|
||||||
|
+ */
|
||||||
|
+ if (work_done < budget) {
|
||||||
|
+ /*
|
||||||
|
+ * TODO per core NAPI
|
||||||
|
+ */
|
||||||
|
+ napi_complete(napi);
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * Set RXDESC ring interrupt mask
|
||||||
|
+ */
|
||||||
|
+ for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
+ rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
+ edma_reg_write(
|
||||||
|
+ EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ ehw->rxdesc_intr_mask);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * Set RXFILL ring interrupt mask
|
||||||
|
+ */
|
||||||
|
+ for (i = 0; i < ehw->rxfill_rings; i++) {
|
||||||
|
+ rxfill_ring = &ehw->rxfill_ring[i];
|
||||||
|
+ edma_reg_write(EDMA_REG_RXFILL_INT_MASK(
|
||||||
|
+ rxfill_ring->id),
|
||||||
|
+ edma_hw.rxfill_intr_mask);
|
||||||
|
+ }
|
||||||
|
+ }
|
||||||
|
+ return work_done;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/*
|
||||||
|
+ * edma_napi()
|
||||||
|
+ * EDMA NAPI handler
|
||||||
|
+ */
|
||||||
|
+int edma_tx_napi(struct napi_struct *napi, int budget)
|
||||||
|
+{
|
||||||
|
+ struct edma_hw *ehw = container_of(napi, struct edma_hw, tx_napi);
|
||||||
|
+ struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||||
|
+
|
||||||
|
+ struct net_device *ndev;
|
||||||
|
+ int work_done = 0;
|
||||||
|
+ int i;
|
||||||
|
+
|
||||||
|
for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||||
|
txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||||
|
edma_clean_tx(ehw, txcmpl_ring);
|
||||||
|
}
|
||||||
|
|
||||||
|
- for (i = 0; i < ehw->rxfill_rings; i++) {
|
||||||
|
- rxfill_ring = &ehw->rxfill_ring[i];
|
||||||
|
- edma_alloc_rx_buffer(ehw, rxfill_ring);
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
/*
|
||||||
|
* Resume netdev Tx queue
|
||||||
|
*/
|
||||||
|
@@ -508,16 +546,6 @@ int edma_napi(struct napi_struct *napi, int budget)
|
||||||
|
*/
|
||||||
|
napi_complete(napi);
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Set RXDESC ring interrupt mask
|
||||||
|
- */
|
||||||
|
- for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
- rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
- edma_reg_write(
|
||||||
|
- EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- ehw->rxdesc_intr_mask);
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
/*
|
||||||
|
* Set TXCMPL ring interrupt mask
|
||||||
|
*/
|
||||||
|
@@ -527,15 +555,6 @@ int edma_napi(struct napi_struct *napi, int budget)
|
||||||
|
ehw->txcmpl_intr_mask);
|
||||||
|
}
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Set RXFILL ring interrupt mask
|
||||||
|
- */
|
||||||
|
- for (i = 0; i < ehw->rxfill_rings; i++) {
|
||||||
|
- rxfill_ring = &ehw->rxfill_ring[i];
|
||||||
|
- edma_reg_write(EDMA_REG_RXFILL_INT_MASK(
|
||||||
|
- rxfill_ring->id),
|
||||||
|
- edma_hw.rxfill_intr_mask);
|
||||||
|
- }
|
||||||
|
}
|
||||||
|
return work_done;
|
||||||
|
}
|
||||||
|
@@ -736,13 +755,11 @@ irqreturn_t edma_handle_misc_irq(int irq, void *ctx)
|
||||||
|
* edma_handle_irq()
|
||||||
|
* Process IRQ and schedule napi
|
||||||
|
*/
|
||||||
|
-irqreturn_t edma_handle_irq(int irq, void *ctx)
|
||||||
|
+irqreturn_t edma_rx_handle_irq(int irq, void *ctx)
|
||||||
|
{
|
||||||
|
uint32_t reg_data = 0;
|
||||||
|
uint32_t rxdesc_intr_status = 0;
|
||||||
|
- uint32_t txcmpl_intr_status = 0;
|
||||||
|
int i;
|
||||||
|
- struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||||
|
struct edma_rxdesc_ring *rxdesc_ring = NULL;
|
||||||
|
struct edma_hw *ehw = NULL;
|
||||||
|
struct platform_device *pdev = (struct platform_device *)ctx;
|
||||||
|
@@ -770,6 +787,44 @@ irqreturn_t edma_handle_irq(int irq, void *ctx)
|
||||||
|
EDMA_MASK_INT_DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
+ if (rxdesc_intr_status == 0)
|
||||||
|
+ return IRQ_NONE;
|
||||||
|
+
|
||||||
|
+ for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
+ rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
+ edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ EDMA_MASK_INT_DISABLE);
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ *TODO - per core NAPI
|
||||||
|
+ */
|
||||||
|
+ if (rxdesc_intr_status)
|
||||||
|
+ if (likely(napi_schedule_prep(&ehw->rx_napi)))
|
||||||
|
+ __napi_schedule(&ehw->rx_napi);
|
||||||
|
+
|
||||||
|
+ return IRQ_HANDLED;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+/*
|
||||||
|
+ * edma_handle_irq()
|
||||||
|
+ * Process IRQ and schedule napi
|
||||||
|
+ */
|
||||||
|
+irqreturn_t edma_tx_handle_irq(int irq, void *ctx)
|
||||||
|
+{
|
||||||
|
+ uint32_t reg_data = 0;
|
||||||
|
+ uint32_t txcmpl_intr_status = 0;
|
||||||
|
+ int i;
|
||||||
|
+ struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||||
|
+ struct edma_hw *ehw = NULL;
|
||||||
|
+ struct platform_device *pdev = (struct platform_device *)ctx;
|
||||||
|
+
|
||||||
|
+ ehw = platform_get_drvdata(pdev);
|
||||||
|
+ if (!ehw) {
|
||||||
|
+ pr_info("Unable to retrieve platrofm data");
|
||||||
|
+ return IRQ_HANDLED;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
/*
|
||||||
|
* Read TxCmpl intr status
|
||||||
|
*/
|
||||||
|
@@ -787,21 +842,15 @@ irqreturn_t edma_handle_irq(int irq, void *ctx)
|
||||||
|
EDMA_MASK_INT_DISABLE);
|
||||||
|
}
|
||||||
|
|
||||||
|
- if ((rxdesc_intr_status == 0) && (txcmpl_intr_status == 0))
|
||||||
|
+ if (txcmpl_intr_status == 0)
|
||||||
|
return IRQ_NONE;
|
||||||
|
|
||||||
|
- for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
- rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- EDMA_MASK_INT_DISABLE);
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
/*
|
||||||
|
*TODO - per core NAPI
|
||||||
|
*/
|
||||||
|
- if (rxdesc_intr_status || txcmpl_intr_status)
|
||||||
|
- if (likely(napi_schedule_prep(&ehw->napi)))
|
||||||
|
- __napi_schedule(&ehw->napi);
|
||||||
|
+ if (txcmpl_intr_status)
|
||||||
|
+ if (likely(napi_schedule_prep(&ehw->tx_napi)))
|
||||||
|
+ __napi_schedule(&ehw->tx_napi);
|
||||||
|
|
||||||
|
return IRQ_HANDLED;
|
||||||
|
}
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,267 @@
|
|||||||
|
From 21ffe52de4834569486619b93a059a7a92000827 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
Date: Fri, 24 Jun 2022 18:07:32 +0200
|
||||||
|
Subject: [PATCH 18/21] edma_v1: move rx napi to per ring implementation
|
||||||
|
|
||||||
|
Move rx napi to per ring implementation.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 1 +
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 25 +++++--
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 4 +-
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 76 +++++++-------------
|
||||||
|
4 files changed, 47 insertions(+), 59 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
index 2e98aaf..20d055e 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
@@ -410,6 +410,7 @@ static int edma_setup_ring_resources(struct edma_hw *ehw)
|
||||||
|
*/
|
||||||
|
for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
+ rxdesc_ring->ehw = ehw;
|
||||||
|
rxdesc_ring->count = EDMA_RING_SIZE;
|
||||||
|
rxdesc_ring->id = ehw->rxdesc_ring_start + i;
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
index 8932f40..565564a 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
@@ -407,7 +407,9 @@ void edma_cleanup(bool is_dp_override)
|
||||||
|
synchronize_irq(edma_hw.misc_intr);
|
||||||
|
free_irq(edma_hw.misc_intr, (void *)(edma_hw.pdev));
|
||||||
|
|
||||||
|
- netif_napi_del(&edma_hw.rx_napi);
|
||||||
|
+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
+ netif_napi_del(&edma_hw.rxdesc_ring[i].napi);
|
||||||
|
+
|
||||||
|
netif_napi_del(&edma_hw.tx_napi);
|
||||||
|
edma_hw.napi_added = 0;
|
||||||
|
}
|
||||||
|
@@ -443,6 +445,8 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
|
||||||
|
uint32_t tx_desc_ring, uint32_t rx_desc_ring,
|
||||||
|
uint32_t mode)
|
||||||
|
{
|
||||||
|
+ int i;
|
||||||
|
+
|
||||||
|
if (!dpc->dev)
|
||||||
|
return NSS_DP_FAILURE;
|
||||||
|
|
||||||
|
@@ -452,7 +456,9 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
|
||||||
|
if (edma_hw.active++ != 0)
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
|
||||||
|
- napi_enable(&edma_hw.rx_napi);
|
||||||
|
+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
+ napi_enable(&edma_hw.rxdesc_ring[i].napi);
|
||||||
|
+
|
||||||
|
napi_enable(&edma_hw.tx_napi);
|
||||||
|
|
||||||
|
/*
|
||||||
|
@@ -469,6 +475,8 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
|
||||||
|
*/
|
||||||
|
static int edma_if_close(struct nss_dp_data_plane_ctx *dpc)
|
||||||
|
{
|
||||||
|
+ int i;
|
||||||
|
+
|
||||||
|
if (--edma_hw.active != 0)
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
|
||||||
|
@@ -480,7 +488,9 @@ static int edma_if_close(struct nss_dp_data_plane_ctx *dpc)
|
||||||
|
/*
|
||||||
|
* Disable NAPI
|
||||||
|
*/
|
||||||
|
- napi_disable(&edma_hw.rx_napi);
|
||||||
|
+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
+ napi_disable(&edma_hw.rxdesc_ring[i].napi);
|
||||||
|
+
|
||||||
|
napi_disable(&edma_hw.tx_napi);
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
}
|
||||||
|
@@ -749,7 +759,7 @@ static int edma_irq_init(void)
|
||||||
|
for (i = 0; i < edma_hw.rxdesc_rings; i++) {
|
||||||
|
err = request_irq(edma_hw.rxdesc_intr[i],
|
||||||
|
edma_rx_handle_irq, IRQF_SHARED,
|
||||||
|
- "edma_rxdesc", (void *)edma_hw.pdev);
|
||||||
|
+ "edma_rxdesc", (void *)&edma_hw.rxdesc_ring[i]);
|
||||||
|
if (err) {
|
||||||
|
pr_debug("RXDESC ring IRQ:%d request failed\n",
|
||||||
|
edma_hw.rxdesc_intr[i]);
|
||||||
|
@@ -814,6 +824,8 @@ rx_fill_ring_intr_req_fail:
|
||||||
|
*/
|
||||||
|
static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
|
||||||
|
{
|
||||||
|
+ int i;
|
||||||
|
+
|
||||||
|
if (!netdev) {
|
||||||
|
pr_info("nss_dp_edma: Invalid netdev pointer %px\n", netdev);
|
||||||
|
return -EINVAL;
|
||||||
|
@@ -839,8 +851,9 @@ static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
|
||||||
|
* NAPI add
|
||||||
|
*/
|
||||||
|
if (!edma_hw.napi_added) {
|
||||||
|
- netif_napi_add(netdev, &edma_hw.rx_napi, edma_rx_napi,
|
||||||
|
- NAPI_POLL_WEIGHT);
|
||||||
|
+ for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
+ netif_napi_add(netdev, &edma_hw.rxdesc_ring[i].napi, edma_rx_napi,
|
||||||
|
+ NAPI_POLL_WEIGHT);
|
||||||
|
|
||||||
|
netif_tx_napi_add(netdev, &edma_hw.tx_napi, edma_tx_napi,
|
||||||
|
NAPI_POLL_WEIGHT);
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
index a45fb99..01a6453 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
@@ -116,6 +116,8 @@ struct edma_rxfill_ring {
|
||||||
|
* RxDesc ring
|
||||||
|
*/
|
||||||
|
struct edma_rxdesc_ring {
|
||||||
|
+ struct napi_struct napi; /* napi structure */
|
||||||
|
+ struct edma_hw *ehw;
|
||||||
|
uint32_t id; /* RXDESC ring number */
|
||||||
|
struct edma_rxfill_ring *rxfill; /* RXFILL ring used */
|
||||||
|
void *desc; /* descriptor ring virtual address */
|
||||||
|
@@ -172,8 +174,6 @@ enum edma_tx {
|
||||||
|
* EDMA private data structure
|
||||||
|
*/
|
||||||
|
struct edma_hw {
|
||||||
|
- struct napi_struct rx_napi;
|
||||||
|
- /* napi structure */
|
||||||
|
struct napi_struct tx_napi;
|
||||||
|
/* napi structure */
|
||||||
|
struct net_device *netdev_arr[EDMA_MAX_GMACS];
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 1fb8cbf..1d2fa8a 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -427,7 +427,7 @@ static uint32_t edma_clean_rx(struct edma_hw *ehw,
|
||||||
|
nss_phy_tstamp_rx_buf(ndev, skb);
|
||||||
|
else
|
||||||
|
#if defined(NSS_DP_ENABLE_NAPI_GRO)
|
||||||
|
- napi_gro_receive(&ehw->napi, skb);
|
||||||
|
+ napi_gro_receive(&rxdesc_ring->napi, skb);
|
||||||
|
#else
|
||||||
|
netif_receive_skb(skb);
|
||||||
|
#endif
|
||||||
|
@@ -462,17 +462,13 @@ next_rx_desc:
|
||||||
|
*/
|
||||||
|
int edma_rx_napi(struct napi_struct *napi, int budget)
|
||||||
|
{
|
||||||
|
- struct edma_hw *ehw = container_of(napi, struct edma_hw, rx_napi);
|
||||||
|
- struct edma_rxdesc_ring *rxdesc_ring = NULL;
|
||||||
|
- struct edma_rxfill_ring *rxfill_ring = NULL;
|
||||||
|
+ struct edma_rxdesc_ring *rxdesc_ring = container_of(napi, struct edma_rxdesc_ring, napi);
|
||||||
|
+ struct edma_rxfill_ring *rxfill_ring = rxdesc_ring->rxfill;
|
||||||
|
+ struct edma_hw *ehw = rxdesc_ring->ehw;
|
||||||
|
|
||||||
|
int work_done = 0;
|
||||||
|
- int i;
|
||||||
|
|
||||||
|
- for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
- rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
- work_done += edma_clean_rx(ehw, budget, rxdesc_ring);
|
||||||
|
- }
|
||||||
|
+ work_done += edma_clean_rx(ehw, budget, rxdesc_ring);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* TODO - rework and fix the budget control
|
||||||
|
@@ -486,22 +482,15 @@ int edma_rx_napi(struct napi_struct *napi, int budget)
|
||||||
|
/*
|
||||||
|
* Set RXDESC ring interrupt mask
|
||||||
|
*/
|
||||||
|
- for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
- rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
- edma_reg_write(
|
||||||
|
- EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- ehw->rxdesc_intr_mask);
|
||||||
|
- }
|
||||||
|
+ edma_reg_write(
|
||||||
|
+ EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ ehw->rxdesc_intr_mask);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Set RXFILL ring interrupt mask
|
||||||
|
*/
|
||||||
|
- for (i = 0; i < ehw->rxfill_rings; i++) {
|
||||||
|
- rxfill_ring = &ehw->rxfill_ring[i];
|
||||||
|
- edma_reg_write(EDMA_REG_RXFILL_INT_MASK(
|
||||||
|
- rxfill_ring->id),
|
||||||
|
- edma_hw.rxfill_intr_mask);
|
||||||
|
- }
|
||||||
|
+ edma_reg_write(EDMA_REG_RXFILL_INT_MASK(rxfill_ring->id),
|
||||||
|
+ edma_hw.rxfill_intr_mask);
|
||||||
|
}
|
||||||
|
return work_done;
|
||||||
|
}
|
||||||
|
@@ -761,51 +750,36 @@ irqreturn_t edma_handle_misc_irq(int irq, void *ctx)
|
||||||
|
*/
|
||||||
|
irqreturn_t edma_rx_handle_irq(int irq, void *ctx)
|
||||||
|
{
|
||||||
|
- uint32_t reg_data = 0;
|
||||||
|
+ struct edma_rxdesc_ring *rxdesc_ring = (struct edma_rxdesc_ring *)ctx;
|
||||||
|
uint32_t rxdesc_intr_status = 0;
|
||||||
|
- int i;
|
||||||
|
- struct edma_rxdesc_ring *rxdesc_ring = NULL;
|
||||||
|
- struct edma_hw *ehw = NULL;
|
||||||
|
- struct platform_device *pdev = (struct platform_device *)ctx;
|
||||||
|
-
|
||||||
|
- ehw = platform_get_drvdata(pdev);
|
||||||
|
- if (!ehw) {
|
||||||
|
- pr_info("Unable to retrieve platrofm data");
|
||||||
|
- return IRQ_HANDLED;
|
||||||
|
- }
|
||||||
|
+ uint32_t reg_data = 0;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Read RxDesc intr status
|
||||||
|
*/
|
||||||
|
- for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
- rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
- reg_data = edma_reg_read(
|
||||||
|
- EDMA_REG_RXDESC_INT_STAT(rxdesc_ring->id));
|
||||||
|
- rxdesc_intr_status |= reg_data &
|
||||||
|
- EDMA_RXDESC_RING_INT_STATUS_MASK;
|
||||||
|
+ reg_data = edma_reg_read(
|
||||||
|
+ EDMA_REG_RXDESC_INT_STAT(rxdesc_ring->id));
|
||||||
|
+ rxdesc_intr_status |= reg_data &
|
||||||
|
+ EDMA_RXDESC_RING_INT_STATUS_MASK;
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Disable RxDesc intr
|
||||||
|
- */
|
||||||
|
- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- EDMA_MASK_INT_DISABLE);
|
||||||
|
- }
|
||||||
|
+ /*
|
||||||
|
+ * Disable RxDesc intr
|
||||||
|
+ */
|
||||||
|
+ edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ EDMA_MASK_INT_DISABLE);
|
||||||
|
|
||||||
|
if (rxdesc_intr_status == 0)
|
||||||
|
return IRQ_NONE;
|
||||||
|
|
||||||
|
- for (i = 0; i < ehw->rxdesc_rings; i++) {
|
||||||
|
- rxdesc_ring = &ehw->rxdesc_ring[i];
|
||||||
|
- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- EDMA_MASK_INT_DISABLE);
|
||||||
|
- }
|
||||||
|
+ edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ EDMA_MASK_INT_DISABLE);
|
||||||
|
|
||||||
|
/*
|
||||||
|
*TODO - per core NAPI
|
||||||
|
*/
|
||||||
|
if (rxdesc_intr_status)
|
||||||
|
- if (likely(napi_schedule_prep(&ehw->rx_napi)))
|
||||||
|
- __napi_schedule(&ehw->rx_napi);
|
||||||
|
+ if (likely(napi_schedule_prep(&rxdesc_ring->napi)))
|
||||||
|
+ __napi_schedule(&rxdesc_ring->napi);
|
||||||
|
|
||||||
|
return IRQ_HANDLED;
|
||||||
|
}
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,206 @@
|
|||||||
|
From de169603dcfa7a33026587c4cef9938cc6c28b1e Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
Date: Fri, 24 Jun 2022 18:25:16 +0200
|
||||||
|
Subject: [PATCH 19/21] edma_v1: move tx napi to per ring implementation
|
||||||
|
|
||||||
|
Move tx napi to per ring implementation.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 1 +
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 17 +++---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 4 +-
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 55 +++++++-------------
|
||||||
|
4 files changed, 32 insertions(+), 45 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
index 20d055e..6f2c082 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
@@ -373,6 +373,7 @@ static int edma_setup_ring_resources(struct edma_hw *ehw)
|
||||||
|
*/
|
||||||
|
for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||||
|
txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||||
|
+ txcmpl_ring->ehw = ehw;
|
||||||
|
txcmpl_ring->count = EDMA_RING_SIZE;
|
||||||
|
txcmpl_ring->id = ehw->txcmpl_ring_start + i;
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
index 565564a..49c7f8c 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
@@ -410,7 +410,8 @@ void edma_cleanup(bool is_dp_override)
|
||||||
|
for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
netif_napi_del(&edma_hw.rxdesc_ring[i].napi);
|
||||||
|
|
||||||
|
- netif_napi_del(&edma_hw.tx_napi);
|
||||||
|
+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
|
||||||
|
+ netif_napi_del(&edma_hw.txcmpl_ring[i].napi);
|
||||||
|
edma_hw.napi_added = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -459,7 +460,8 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
|
||||||
|
for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
napi_enable(&edma_hw.rxdesc_ring[i].napi);
|
||||||
|
|
||||||
|
- napi_enable(&edma_hw.tx_napi);
|
||||||
|
+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
|
||||||
|
+ napi_enable(&edma_hw.txcmpl_ring[i].napi);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable the interrupt masks.
|
||||||
|
@@ -491,7 +493,9 @@ static int edma_if_close(struct nss_dp_data_plane_ctx *dpc)
|
||||||
|
for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
napi_disable(&edma_hw.rxdesc_ring[i].napi);
|
||||||
|
|
||||||
|
- napi_disable(&edma_hw.tx_napi);
|
||||||
|
+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
|
||||||
|
+ napi_disable(&edma_hw.txcmpl_ring[i].napi);
|
||||||
|
+
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -730,7 +734,7 @@ static int edma_irq_init(void)
|
||||||
|
for (i = 0; i < edma_hw.txcmpl_rings; i++) {
|
||||||
|
err = request_irq(edma_hw.txcmpl_intr[i],
|
||||||
|
edma_tx_handle_irq, IRQF_SHARED,
|
||||||
|
- "edma_txcmpl", (void *)edma_hw.pdev);
|
||||||
|
+ "edma_txcmpl", (void *)&edma_hw.txcmpl_ring[i]);
|
||||||
|
if (err) {
|
||||||
|
pr_debug("TXCMPL ring IRQ:%d request failed\n",
|
||||||
|
edma_hw.txcmpl_intr[i]);
|
||||||
|
@@ -855,8 +859,9 @@ static int edma_register_netdevice(struct net_device *netdev, uint32_t macid)
|
||||||
|
netif_napi_add(netdev, &edma_hw.rxdesc_ring[i].napi, edma_rx_napi,
|
||||||
|
NAPI_POLL_WEIGHT);
|
||||||
|
|
||||||
|
- netif_tx_napi_add(netdev, &edma_hw.tx_napi, edma_tx_napi,
|
||||||
|
- NAPI_POLL_WEIGHT);
|
||||||
|
+ for (i = 0; i < edma_hw.txcmpl_rings; i++)
|
||||||
|
+ netif_tx_napi_add(netdev, &edma_hw.txcmpl_ring[i].napi, edma_tx_napi,
|
||||||
|
+ NAPI_POLL_WEIGHT);
|
||||||
|
/*
|
||||||
|
* Register the interrupt handlers and enable interrupts
|
||||||
|
*/
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
index 01a6453..8ec7e35 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
@@ -95,6 +95,8 @@ struct edma_txdesc_ring {
|
||||||
|
* TxCmpl ring
|
||||||
|
*/
|
||||||
|
struct edma_txcmpl_ring {
|
||||||
|
+ struct napi_struct napi; /* napi structure */
|
||||||
|
+ struct edma_hw *ehw;
|
||||||
|
uint32_t id; /* TXCMPL ring number */
|
||||||
|
void *desc; /* descriptor ring virtual address */
|
||||||
|
dma_addr_t dma; /* descriptor ring physical address */
|
||||||
|
@@ -174,8 +176,6 @@ enum edma_tx {
|
||||||
|
* EDMA private data structure
|
||||||
|
*/
|
||||||
|
struct edma_hw {
|
||||||
|
- struct napi_struct tx_napi;
|
||||||
|
- /* napi structure */
|
||||||
|
struct net_device *netdev_arr[EDMA_MAX_GMACS];
|
||||||
|
/* netdev for each gmac port */
|
||||||
|
struct device_node *device_node;
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 1d2fa8a..8221a9c 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -501,17 +501,14 @@ int edma_rx_napi(struct napi_struct *napi, int budget)
|
||||||
|
*/
|
||||||
|
int edma_tx_napi(struct napi_struct *napi, int budget)
|
||||||
|
{
|
||||||
|
- struct edma_hw *ehw = container_of(napi, struct edma_hw, tx_napi);
|
||||||
|
- struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||||
|
+ struct edma_txcmpl_ring *txcmpl_ring = container_of(napi, struct edma_txcmpl_ring, napi);
|
||||||
|
+ struct edma_hw *ehw = txcmpl_ring->ehw;
|
||||||
|
|
||||||
|
struct net_device *ndev;
|
||||||
|
int work_done = 0;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
- for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||||
|
- txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||||
|
- edma_clean_tx(ehw, txcmpl_ring);
|
||||||
|
- }
|
||||||
|
+ edma_clean_tx(ehw, txcmpl_ring);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Resume netdev Tx queue
|
||||||
|
@@ -542,12 +539,8 @@ int edma_tx_napi(struct napi_struct *napi, int budget)
|
||||||
|
/*
|
||||||
|
* Set TXCMPL ring interrupt mask
|
||||||
|
*/
|
||||||
|
- for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||||
|
- txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||||
|
- edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
- ehw->txcmpl_intr_mask);
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
+ edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
+ ehw->txcmpl_intr_mask);
|
||||||
|
}
|
||||||
|
return work_done;
|
||||||
|
}
|
||||||
|
@@ -790,35 +783,23 @@ irqreturn_t edma_rx_handle_irq(int irq, void *ctx)
|
||||||
|
*/
|
||||||
|
irqreturn_t edma_tx_handle_irq(int irq, void *ctx)
|
||||||
|
{
|
||||||
|
- uint32_t reg_data = 0;
|
||||||
|
+ struct edma_txcmpl_ring *txcmpl_ring = (struct edma_txcmpl_ring *)ctx;
|
||||||
|
uint32_t txcmpl_intr_status = 0;
|
||||||
|
- int i;
|
||||||
|
- struct edma_txcmpl_ring *txcmpl_ring = NULL;
|
||||||
|
- struct edma_hw *ehw = NULL;
|
||||||
|
- struct platform_device *pdev = (struct platform_device *)ctx;
|
||||||
|
-
|
||||||
|
- ehw = platform_get_drvdata(pdev);
|
||||||
|
- if (!ehw) {
|
||||||
|
- pr_info("Unable to retrieve platrofm data");
|
||||||
|
- return IRQ_HANDLED;
|
||||||
|
- }
|
||||||
|
+ uint32_t reg_data = 0;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Read TxCmpl intr status
|
||||||
|
*/
|
||||||
|
- for (i = 0; i < ehw->txcmpl_rings; i++) {
|
||||||
|
- txcmpl_ring = &ehw->txcmpl_ring[i];
|
||||||
|
- reg_data = edma_reg_read(
|
||||||
|
- EDMA_REG_TX_INT_STAT(txcmpl_ring->id));
|
||||||
|
- txcmpl_intr_status |= reg_data &
|
||||||
|
- EDMA_TXCMPL_RING_INT_STATUS_MASK;
|
||||||
|
+ reg_data = edma_reg_read(
|
||||||
|
+ EDMA_REG_TX_INT_STAT(txcmpl_ring->id));
|
||||||
|
+ txcmpl_intr_status |= reg_data &
|
||||||
|
+ EDMA_TXCMPL_RING_INT_STATUS_MASK;
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Disable TxCmpl intr
|
||||||
|
- */
|
||||||
|
- edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
- EDMA_MASK_INT_DISABLE);
|
||||||
|
- }
|
||||||
|
+ /*
|
||||||
|
+ * Disable TxCmpl intr
|
||||||
|
+ */
|
||||||
|
+ edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
+ EDMA_MASK_INT_DISABLE);
|
||||||
|
|
||||||
|
if (txcmpl_intr_status == 0)
|
||||||
|
return IRQ_NONE;
|
||||||
|
@@ -827,8 +808,8 @@ irqreturn_t edma_tx_handle_irq(int irq, void *ctx)
|
||||||
|
*TODO - per core NAPI
|
||||||
|
*/
|
||||||
|
if (txcmpl_intr_status)
|
||||||
|
- if (likely(napi_schedule_prep(&ehw->tx_napi)))
|
||||||
|
- __napi_schedule(&ehw->tx_napi);
|
||||||
|
+ if (likely(napi_schedule_prep(&txcmpl_ring->napi)))
|
||||||
|
+ __napi_schedule(&txcmpl_ring->napi);
|
||||||
|
|
||||||
|
return IRQ_HANDLED;
|
||||||
|
}
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,112 @@
|
|||||||
|
From 0f7bf6cf6fd536cd5965d596067e469e84559761 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
Date: Fri, 24 Jun 2022 20:04:17 +0200
|
||||||
|
Subject: [PATCH 20/21] edma_v1: add support for threaded napi
|
||||||
|
|
||||||
|
Add required changed to enable threaded napi. Also change rxfill to use
|
||||||
|
napi_alloc_skb.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 5 -----
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 12 ++++++++++--
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h | 4 ++--
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 7 ++++---
|
||||||
|
4 files changed, 16 insertions(+), 12 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
index 6f2c082..33f4297 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
|
||||||
|
@@ -670,11 +670,6 @@ static void edma_configure_rxfill_ring(struct edma_hw *ehw,
|
||||||
|
|
||||||
|
data = rxfill_ring->count & EDMA_RXFILL_RING_SIZE_MASK;
|
||||||
|
edma_reg_write(EDMA_REG_RXFILL_RING_SIZE(rxfill_ring->id), data);
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- * Alloc Rx buffers
|
||||||
|
- */
|
||||||
|
- edma_alloc_rx_buffer(ehw, rxfill_ring);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
index 49c7f8c..3736254 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
|
||||||
|
@@ -457,8 +457,15 @@ static int edma_if_open(struct nss_dp_data_plane_ctx *dpc,
|
||||||
|
if (edma_hw.active++ != 0)
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
|
||||||
|
- for (i = 0; i < edma_hw.rxdesc_rings; i++)
|
||||||
|
- napi_enable(&edma_hw.rxdesc_ring[i].napi);
|
||||||
|
+ for (i = 0; i < edma_hw.rxdesc_rings; i++) {
|
||||||
|
+ struct edma_rxdesc_ring *rxdesc_ring = &edma_hw.rxdesc_ring[i];
|
||||||
|
+ /*
|
||||||
|
+ * Alloc Rx buffers
|
||||||
|
+ */
|
||||||
|
+ edma_alloc_rx_buffer(&edma_hw, &rxdesc_ring->napi, rxdesc_ring->rxfill);
|
||||||
|
+
|
||||||
|
+ napi_enable(&rxdesc_ring->napi);
|
||||||
|
+ }
|
||||||
|
|
||||||
|
for (i = 0; i < edma_hw.txcmpl_rings; i++)
|
||||||
|
napi_enable(&edma_hw.txcmpl_ring[i].napi);
|
||||||
|
@@ -899,6 +906,7 @@ static int edma_if_init(struct nss_dp_data_plane_ctx *dpc)
|
||||||
|
* Headroom needed for Tx preheader
|
||||||
|
*/
|
||||||
|
netdev->needed_headroom += EDMA_TX_PREHDR_SIZE;
|
||||||
|
+ dev_set_threaded(netdev, true);
|
||||||
|
|
||||||
|
return NSS_DP_SUCCESS;
|
||||||
|
}
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
index 8ec7e35..7f8a8d4 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.h
|
||||||
|
@@ -276,8 +276,8 @@ extern struct edma_hw edma_hw;
|
||||||
|
uint32_t edma_reg_read(uint32_t reg_off);
|
||||||
|
void edma_reg_write(uint32_t reg_off, uint32_t val);
|
||||||
|
|
||||||
|
-int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||||
|
- struct edma_rxfill_ring *rxfill_ring);
|
||||||
|
+int edma_alloc_rx_buffer(struct edma_hw *ehw, struct napi_struct *napi,
|
||||||
|
+ struct edma_rxfill_ring *rxfill_ring);
|
||||||
|
enum edma_tx edma_ring_xmit(struct edma_hw *ehw,
|
||||||
|
struct net_device *netdev,
|
||||||
|
struct sk_buff *skb,
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 8221a9c..001f883 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -29,7 +29,8 @@
|
||||||
|
* Alloc Rx buffers for one RxFill ring
|
||||||
|
*/
|
||||||
|
int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||||
|
- struct edma_rxfill_ring *rxfill_ring)
|
||||||
|
+ struct napi_struct *napi,
|
||||||
|
+ struct edma_rxfill_ring *rxfill_ring)
|
||||||
|
{
|
||||||
|
struct platform_device *pdev = ehw->pdev;
|
||||||
|
struct sk_buff *skb;
|
||||||
|
@@ -64,7 +65,7 @@ int edma_alloc_rx_buffer(struct edma_hw *ehw,
|
||||||
|
/*
|
||||||
|
* Allocate buffer
|
||||||
|
*/
|
||||||
|
- skb = dev_alloc_skb(alloc_size);
|
||||||
|
+ skb = napi_alloc_skb(napi, alloc_size);
|
||||||
|
if (unlikely(!skb))
|
||||||
|
break;
|
||||||
|
|
||||||
|
@@ -445,7 +446,7 @@ next_rx_desc:
|
||||||
|
work_done++;
|
||||||
|
}
|
||||||
|
|
||||||
|
- edma_alloc_rx_buffer(ehw, rxdesc_ring->rxfill);
|
||||||
|
+ edma_alloc_rx_buffer(ehw, &rxdesc_ring->napi, rxdesc_ring->rxfill);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* make sure the consumer index is updated
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -0,0 +1,204 @@
|
|||||||
|
From 1e1543fb908e382001881d2aad7ab9d4a903c0ee Mon Sep 17 00:00:00 2001
|
||||||
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
Date: Fri, 24 Jun 2022 22:08:25 +0200
|
||||||
|
Subject: [PATCH] edma_v1: improve handling with rx/tx irq and napi pool
|
||||||
|
|
||||||
|
Correctly disable interrupt and schedule napi instead of consuming the
|
||||||
|
entire ring and emit napi_complete.
|
||||||
|
|
||||||
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||||
|
---
|
||||||
|
hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c | 133 ++++++++----------------
|
||||||
|
1 file changed, 46 insertions(+), 87 deletions(-)
|
||||||
|
|
||||||
|
diff --git a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
index 2bf1467..82fb697 100644
|
||||||
|
--- a/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_tx_rx.c
|
||||||
|
@@ -460,35 +460,30 @@ next_rx_desc:
|
||||||
|
int edma_rx_napi(struct napi_struct *napi, int budget)
|
||||||
|
{
|
||||||
|
struct edma_rxdesc_ring *rxdesc_ring = container_of(napi, struct edma_rxdesc_ring, napi);
|
||||||
|
- struct edma_rxfill_ring *rxfill_ring = rxdesc_ring->rxfill;
|
||||||
|
struct edma_hw *ehw = rxdesc_ring->ehw;
|
||||||
|
+ uint32_t status;
|
||||||
|
|
||||||
|
int work_done = 0;
|
||||||
|
|
||||||
|
- work_done += edma_clean_rx(ehw, budget, rxdesc_ring);
|
||||||
|
+ do {
|
||||||
|
+ work_done += edma_clean_rx(ehw, budget, rxdesc_ring);
|
||||||
|
+ if (likely(work_done >= budget)) {
|
||||||
|
+ return work_done;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ status = EDMA_RXDESC_RING_INT_STATUS_MASK & edma_reg_read(
|
||||||
|
+ EDMA_REG_RXDESC_INT_STAT(rxdesc_ring->id));
|
||||||
|
+ } while (likely(status));
|
||||||
|
+
|
||||||
|
+ napi_complete(napi);
|
||||||
|
|
||||||
|
/*
|
||||||
|
- * TODO - rework and fix the budget control
|
||||||
|
+ * Set RXDESC ring interrupt mask
|
||||||
|
*/
|
||||||
|
- if (work_done < budget) {
|
||||||
|
- /*
|
||||||
|
- * TODO per core NAPI
|
||||||
|
- */
|
||||||
|
- napi_complete(napi);
|
||||||
|
+ edma_reg_write(
|
||||||
|
+ EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ ehw->rxdesc_intr_mask);
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Set RXDESC ring interrupt mask
|
||||||
|
- */
|
||||||
|
- edma_reg_write(
|
||||||
|
- EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- ehw->rxdesc_intr_mask);
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- * Set RXFILL ring interrupt mask
|
||||||
|
- */
|
||||||
|
- edma_reg_write(EDMA_REG_RXFILL_INT_MASK(rxfill_ring->id),
|
||||||
|
- edma_hw.rxfill_intr_mask);
|
||||||
|
- }
|
||||||
|
return work_done;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -503,10 +498,27 @@ int edma_tx_napi(struct napi_struct *napi, int budget)
|
||||||
|
|
||||||
|
struct net_device *ndev;
|
||||||
|
int work_done = 0;
|
||||||
|
+ uint32_t status;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
- edma_clean_tx(ehw, txcmpl_ring);
|
||||||
|
+ do {
|
||||||
|
+ work_done += edma_clean_tx(ehw, txcmpl_ring);
|
||||||
|
+ if (work_done >= budget) {
|
||||||
|
+ goto exit;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ status = EDMA_TXCMPL_RING_INT_STATUS_MASK & edma_reg_read(EDMA_REG_TX_INT_STAT(txcmpl_ring->id));
|
||||||
|
+ } while (status);
|
||||||
|
|
||||||
|
+ napi_complete(napi);
|
||||||
|
+
|
||||||
|
+ /*
|
||||||
|
+ * Set TXCMPL ring interrupt mask
|
||||||
|
+ */
|
||||||
|
+ edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
+ ehw->txcmpl_intr_mask);
|
||||||
|
+
|
||||||
|
+exit:
|
||||||
|
/*
|
||||||
|
* Resume netdev Tx queue
|
||||||
|
*/
|
||||||
|
@@ -524,21 +536,6 @@ int edma_tx_napi(struct napi_struct *napi, int budget)
|
||||||
|
netif_start_queue(ndev);
|
||||||
|
}
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * TODO - rework and fix the budget control
|
||||||
|
- */
|
||||||
|
- if (work_done < budget) {
|
||||||
|
- /*
|
||||||
|
- * TODO per core NAPI
|
||||||
|
- */
|
||||||
|
- napi_complete(napi);
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- * Set TXCMPL ring interrupt mask
|
||||||
|
- */
|
||||||
|
- edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
- ehw->txcmpl_intr_mask);
|
||||||
|
- }
|
||||||
|
return work_done;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -741,35 +738,14 @@ irqreturn_t edma_handle_misc_irq(int irq, void *ctx)
|
||||||
|
irqreturn_t edma_rx_handle_irq(int irq, void *ctx)
|
||||||
|
{
|
||||||
|
struct edma_rxdesc_ring *rxdesc_ring = (struct edma_rxdesc_ring *)ctx;
|
||||||
|
- uint32_t rxdesc_intr_status = 0;
|
||||||
|
- uint32_t reg_data = 0;
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Read RxDesc intr status
|
||||||
|
- */
|
||||||
|
- reg_data = edma_reg_read(
|
||||||
|
- EDMA_REG_RXDESC_INT_STAT(rxdesc_ring->id));
|
||||||
|
- rxdesc_intr_status |= reg_data &
|
||||||
|
- EDMA_RXDESC_RING_INT_STATUS_MASK;
|
||||||
|
+ if (likely(napi_schedule_prep(&rxdesc_ring->napi))) {
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Disable RxDesc intr
|
||||||
|
- */
|
||||||
|
- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
+ edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
EDMA_MASK_INT_DISABLE);
|
||||||
|
|
||||||
|
- if (rxdesc_intr_status == 0)
|
||||||
|
- return IRQ_NONE;
|
||||||
|
-
|
||||||
|
- edma_reg_write(EDMA_REG_RXDESC_INT_MASK(rxdesc_ring->id),
|
||||||
|
- EDMA_MASK_INT_DISABLE);
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- *TODO - per core NAPI
|
||||||
|
- */
|
||||||
|
- if (rxdesc_intr_status)
|
||||||
|
- if (likely(napi_schedule_prep(&rxdesc_ring->napi)))
|
||||||
|
- __napi_schedule(&rxdesc_ring->napi);
|
||||||
|
+ __napi_schedule(&rxdesc_ring->napi);
|
||||||
|
+ }
|
||||||
|
|
||||||
|
return IRQ_HANDLED;
|
||||||
|
}
|
||||||
|
@@ -781,32 +757,15 @@ irqreturn_t edma_rx_handle_irq(int irq, void *ctx)
|
||||||
|
irqreturn_t edma_tx_handle_irq(int irq, void *ctx)
|
||||||
|
{
|
||||||
|
struct edma_txcmpl_ring *txcmpl_ring = (struct edma_txcmpl_ring *)ctx;
|
||||||
|
- uint32_t txcmpl_intr_status = 0;
|
||||||
|
- uint32_t reg_data = 0;
|
||||||
|
|
||||||
|
- /*
|
||||||
|
- * Read TxCmpl intr status
|
||||||
|
- */
|
||||||
|
- reg_data = edma_reg_read(
|
||||||
|
- EDMA_REG_TX_INT_STAT(txcmpl_ring->id));
|
||||||
|
- txcmpl_intr_status |= reg_data &
|
||||||
|
- EDMA_TXCMPL_RING_INT_STATUS_MASK;
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- * Disable TxCmpl intr
|
||||||
|
- */
|
||||||
|
- edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
- EDMA_MASK_INT_DISABLE);
|
||||||
|
-
|
||||||
|
- if (txcmpl_intr_status == 0)
|
||||||
|
- return IRQ_NONE;
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- *TODO - per core NAPI
|
||||||
|
- */
|
||||||
|
- if (txcmpl_intr_status)
|
||||||
|
- if (likely(napi_schedule_prep(&txcmpl_ring->napi)))
|
||||||
|
- __napi_schedule(&txcmpl_ring->napi);
|
||||||
|
+ if (likely(napi_schedule_prep(&txcmpl_ring->napi))) {
|
||||||
|
+ /*
|
||||||
|
+ * Disable TxCmpl intr
|
||||||
|
+ */
|
||||||
|
+ edma_reg_write(EDMA_REG_TX_INT_MASK(txcmpl_ring->id),
|
||||||
|
+ EDMA_MASK_INT_DISABLE);
|
||||||
|
+ __napi_schedule(&txcmpl_ring->napi);
|
||||||
|
+ }
|
||||||
|
|
||||||
|
return IRQ_HANDLED;
|
||||||
|
}
|
||||||
|
--
|
||||||
|
2.36.1
|
||||||
|
|
||||||
@ -23,13 +23,13 @@ define Device/UbiFit
|
|||||||
IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata
|
IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata
|
||||||
endef
|
endef
|
||||||
|
|
||||||
define Device/qihoo_v6
|
define Device/qihoo_360v6
|
||||||
$(call Device/FitImage)
|
$(call Device/FitImage)
|
||||||
DEVICE_VENDOR := Qihoo
|
DEVICE_VENDOR := Qihoo
|
||||||
DEVICE_MODEL := 360v6
|
DEVICE_MODEL := 360v6
|
||||||
SOC := ipq6018
|
SOC := ipq6018
|
||||||
endef
|
endef
|
||||||
TARGET_DEVICES += qihoo_v6
|
TARGET_DEVICES += qihoo_360v6
|
||||||
|
|
||||||
define Device/eap610-outdoor
|
define Device/eap610-outdoor
|
||||||
$(call Device/FitImage)
|
$(call Device/FitImage)
|
||||||
|
|||||||
@ -20,7 +20,7 @@ index 70516508be56..27a7e3f98465 100644
|
|||||||
dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
|
dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
|
||||||
dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb
|
dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb
|
||||||
dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb
|
dtb-$(CONFIG_ARCH_QCOM) += ipq6018-cp01-c1.dtb
|
||||||
+dtb-$(CONFIG_ARCH_QCOM) += ipq6018-qihoo-v6.dtb
|
+dtb-$(CONFIG_ARCH_QCOM) += ipq6018-360v6.dtb
|
||||||
+dtb-$(CONFIG_ARCH_QCOM) += ipq6018-eap610-outdoor.dtb
|
+dtb-$(CONFIG_ARCH_QCOM) += ipq6018-eap610-outdoor.dtb
|
||||||
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb
|
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk01.dtb
|
||||||
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb
|
dtb-$(CONFIG_ARCH_QCOM) += ipq8074-hk10-c1.dtb
|
||||||
Loading…
Reference in New Issue
Block a user