From 718ac376b954eace1f52f4f84e9994db620ed34b Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Thu, 19 Sep 2024 22:14:36 +0800 Subject: [PATCH] kernel: bump 6.1 to 6.1.111 --- include/kernel-6.1 | 4 +- ...ilicon-Labs-EM3581-device-compatible.patch | 32 - ..._generic-add-support-for-Telit-FE990.patch | 33 - .../901-usb-add-more-modem-support.patch | 28 - .../arch/arm64/boot/dts/qcom/ipq6018.dtsi | 1193 +++++++++++++++++ ...-dts-qcom-ipq6018-fix-NAND-node-name.patch | 28 - ...pq6018-align-TLMM-pin-configuration-.patch | 19 - ...-ipq6018-move-ARMv8-timer-out-of-SoC.patch | 52 - ...dts-qcom-ipq6018-Sort-nodes-properly.patch | 605 --------- ...com-ipq6018-Add-remove-some-newlines.patch | 92 -- ...4-dts-qcom-ipq6018-Use-lowercase-hex.patch | 25 - ...m-ipq6018-align-RPM-G-Link-node-with.patch | 28 - ...-add-few-more-reserved-memory-region.patch | 34 - ...com-enable-the-download-mode-support.patch | 10 - ...om-ipq6018-correct-qrng-unit-address.patch | 29 - ...ipq6018-add-unit-address-to-soc-node.patch | 28 - ...m64-dts-qcom-ipq6018-add-QFPROM-node.patch | 34 - ...-qcom-ipq6018-drop-incorrect-SPI-bus.patch | 37 - ...dts-qcom-Add-rpm-proc-node-for-GLINK.patch | 93 -- ...ts-qcom-ipq6018-include-the-GPLL0-as.patch | 35 - ...4-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch | 85 -- ...-arm64-dts-qcom-ipq6018-add-pwm-node.patch | 45 - ...-ipq6018-Add-remaining-QUP-UART-node.patch | 66 - ...c-Add-non-secure-Q6-bringup-sequence.patch | 29 - ...0133-arm64-dts-ipq6018-Add-WLAN-node.patch | 122 -- ...ts-ipq6018-add-reserved-memory-nodes.patch | 24 - ...4-dts-qcom-ipq6018-enable-sdhci-node.patch | 29 - ...4-dts-qcom-ipq6018-add-thermal-nodes.patch | 146 -- ...rm64-dts-qcom-ipq6018-rework-cpufreq.patch | 79 -- ...rm64-dts-ipq6018-add-label-to-clocks.patch | 11 - 30 files changed, 1195 insertions(+), 1880 deletions(-) delete mode 100644 target/linux/generic/backport-6.1/412-v6.3-01-spidev-Add-Silicon-Labs-EM3581-device-compatible.patch delete mode 100644 target/linux/generic/backport-6.1/860-v6.6-bus-mhi-host-pci_generic-add-support-for-Telit-FE990.patch delete mode 100644 target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch create mode 100644 target/linux/qualcommax/files-6.1/arch/arm64/boot/dts/qcom/ipq6018.dtsi delete mode 100644 target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0105-arm64-dts-qcom-ipq6018-add-pwm-node.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0109-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-Add-WLAN-node.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch delete mode 100644 target/linux/qualcommax/patches-6.1/0903-arm64-dts-ipq6018-add-label-to-clocks.patch diff --git a/include/kernel-6.1 b/include/kernel-6.1 index ebec105b2..e8b62179b 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .100 -LINUX_KERNEL_HASH-6.1.100 = b9aa6ec1a00f234d6c6f2d428fbb0a6bf459606c259263df978f86685b65a8b9 +LINUX_VERSION-6.1 = .111 +LINUX_KERNEL_HASH-6.1.111 = c47298fa1d410bc5dcfb0662bc2cdbe86f5b0d12a1baac297e1ded7b6722edb0 diff --git a/target/linux/generic/backport-6.1/412-v6.3-01-spidev-Add-Silicon-Labs-EM3581-device-compatible.patch b/target/linux/generic/backport-6.1/412-v6.3-01-spidev-Add-Silicon-Labs-EM3581-device-compatible.patch deleted file mode 100644 index cc05fa6b7..000000000 --- a/target/linux/generic/backport-6.1/412-v6.3-01-spidev-Add-Silicon-Labs-EM3581-device-compatible.patch +++ /dev/null @@ -1,32 +0,0 @@ -From c67d90e058550403a3e6f9b05bfcdcfa12b1815c Mon Sep 17 00:00:00 2001 -From: Vincent Tremblay -Date: Mon, 26 Dec 2022 21:35:48 -0500 -Subject: [PATCH] spidev: Add Silicon Labs EM3581 device compatible - -Add compatible string for Silicon Labs EM3581 device. - -Signed-off-by: Vincent Tremblay -Link: https://lore.kernel.org/r/20221227023550.569547-2-vincent@vtremblay.dev -Signed-off-by: Mark Brown ---- - drivers/spi/spidev.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/spi/spidev.c -+++ b/drivers/spi/spidev.c -@@ -700,6 +700,7 @@ static const struct spi_device_id spidev - { .name = "m53cpld" }, - { .name = "spi-petra" }, - { .name = "spi-authenta" }, -+ { .name = "em3581" }, - {}, - }; - MODULE_DEVICE_TABLE(spi, spidev_spi_ids); -@@ -726,6 +727,7 @@ static const struct of_device_id spidev_ - { .compatible = "menlo,m53cpld", .data = &spidev_of_check }, - { .compatible = "cisco,spi-petra", .data = &spidev_of_check }, - { .compatible = "micron,spi-authenta", .data = &spidev_of_check }, -+ { .compatible = "silabs,em3581", .data = &spidev_of_check }, - {}, - }; - MODULE_DEVICE_TABLE(of, spidev_dt_ids); diff --git a/target/linux/generic/backport-6.1/860-v6.6-bus-mhi-host-pci_generic-add-support-for-Telit-FE990.patch b/target/linux/generic/backport-6.1/860-v6.6-bus-mhi-host-pci_generic-add-support-for-Telit-FE990.patch deleted file mode 100644 index 40fdfc613..000000000 --- a/target/linux/generic/backport-6.1/860-v6.6-bus-mhi-host-pci_generic-add-support-for-Telit-FE990.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 30001cf3a19a2f676a0e23c2c3a511c4a8903284 Mon Sep 17 00:00:00 2001 -From: Daniele Palmas -Date: Fri, 4 Aug 2023 11:40:39 +0200 -Subject: [PATCH 11/13] bus: mhi: host: pci_generic: add support for Telit - FE990 modem - -Add support for Telit FE990 that has the same configuration as FN990: - -$ lspci -vv -04:00.0 Unassigned class [ff00]: Qualcomm Device 0308 - Subsystem: Device 1c5d:2015 - -Signed-off-by: Daniele Palmas -Reviewed-by: Manivannan Sadhasivam -Link: https://lore.kernel.org/r/20230804094039.365102-1-dnlplm@gmail.com -[mani: minor update to commit subject and adjusted comment] -Signed-off-by: Manivannan Sadhasivam ---- - drivers/bus/mhi/host/pci_generic.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/bus/mhi/host/pci_generic.c -+++ b/drivers/bus/mhi/host/pci_generic.c -@@ -595,6 +595,9 @@ static const struct pci_device_id mhi_pc - /* Telit FN990 */ - { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0308, 0x1c5d, 0x2010), - .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, -+ /* Telit FE990 */ -+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0308, 0x1c5d, 0x2015), -+ .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, - { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308), - .driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info }, - { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1001), /* EM120R-GL (sdx24) */ diff --git a/target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch b/target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch deleted file mode 100644 index b7b517703..000000000 --- a/target/linux/generic/pending-6.1/901-usb-add-more-modem-support.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/net/usb/qmi_wwan.c -+++ b/drivers/net/usb/qmi_wwan.c -@@ -1433,6 +1433,9 @@ static const struct usb_device_id produc - {QMI_FIXED_INTF(0x2692, 0x9025, 4)}, /* Cellient MPL200 (rebranded Qualcomm 05c6:9025) */ - {QMI_QUIRK_SET_DTR(0x1546, 0x1342, 4)}, /* u-blox LARA-L6 */ - {QMI_QUIRK_SET_DTR(0x33f8, 0x0104, 4)}, /* Rolling RW101 RMNET */ -+ {QMI_FIXED_INTF(0x2077, 0x2002, 4)}, /* T&W TW04C */ -+ {QMI_FIXED_INTF(0x2077, 0x2003, 4)}, /* T&W TW12G */ -+ {QMI_FIXED_INTF(0x2077, 0x2004, 4)}, /* T&W TW510M */ - - /* 4. Gobi 1000 devices */ - {QMI_GOBI1K_DEVICE(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */ ---- a/drivers/usb/serial/option.c -+++ b/drivers/usb/serial/option.c -@@ -2322,9 +2322,13 @@ static const struct usb_device_id option - { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0a06, 0xff) }, /* Fibocom FM650-CN (RNDIS mode) */ - { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0a07, 0xff) }, /* Fibocom FM650-CN (MBIM mode) */ - { USB_DEVICE_INTERFACE_CLASS(0x2df3, 0x9d03, 0xff) }, /* LongSung M5710 */ -+ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1402, 0xff) }, /* GosunCn GM800 (Download mode) */ -+ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1403, 0xff) }, /* GosunCn GM800 (rmnet, old) */ - { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1404, 0xff) }, /* GosunCn GM500 RNDIS */ - { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1405, 0xff) }, /* GosunCn GM500 MBIM */ - { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1406, 0xff) }, /* GosunCn GM500 ECM/NCM */ -+ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1421, 0xff) }, /* GosunCn GM800 (rmnet) */ -+ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1422, 0xff) }, /* GosunCn GM800 (EAP) */ - { USB_DEVICE(0x33f8, 0x0104), /* Rolling RW101-GL (laptop RMNET) */ - .driver_info = RSVD(4) | RSVD(5) }, - { USB_DEVICE_INTERFACE_CLASS(0x33f8, 0x01a2, 0xff) }, /* Rolling RW101-GL (laptop MBIM) */ diff --git a/target/linux/qualcommax/files-6.1/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/target/linux/qualcommax/files-6.1/arch/arm64/boot/dts/qcom/ipq6018.dtsi new file mode 100644 index 000000000..66a9ec705 --- /dev/null +++ b/target/linux/qualcommax/files-6.1/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -0,0 +1,1193 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * IPQ6018 SoC device tree source + * + * Copyright (c) 2019, The Linux Foundation. All rights reserved. + */ + +#include +#include +#include +#include + +/ { + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&intc>; + + clocks: clocks { + sleep_clk: sleep-clk { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + + xo: xo { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + #clock-cells = <0>; + }; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + enable-method = "psci"; + next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x1>; + next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + }; + + CPU2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x2>; + next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + }; + + CPU3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + enable-method = "psci"; + reg = <0x3>; + next-level-cache = <&L2_0>; + clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; + clock-names = "cpu"; + operating-points-v2 = <&cpu_opp_table>; + }; + + L2_0: l2-cache { + compatible = "cache"; + cache-level = <0x2>; + }; + }; + + firmware { + scm { + compatible = "qcom,scm-ipq6018", "qcom,scm"; + qcom,dload-mode = <&tcsr 0x6100>; + }; + }; + + cpu_opp_table: opp-table-cpu { + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&cpu_speed_bin>; + opp-shared; + + opp-864000000 { + opp-hz = /bits/ 64 <864000000>; + opp-microvolt = <725000>; + opp-supported-hw = <0xf>; + clock-latency-ns = <200000>; + }; + + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <787500>; + opp-supported-hw = <0xf>; + clock-latency-ns = <200000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x4>; + clock-latency-ns = <200000>; + }; + + opp-1320000000 { + opp-hz = /bits/ 64 <1320000000>; + opp-microvolt = <862500>; + opp-supported-hw = <0x3>; + clock-latency-ns = <200000>; + }; + + opp-1440000000 { + opp-hz = /bits/ 64 <1440000000>; + opp-microvolt = <925000>; + opp-supported-hw = <0x3>; + clock-latency-ns = <200000>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <937500>; + opp-supported-hw = <0x2>; + clock-latency-ns = <200000>; + }; + + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <987500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <200000>; + }; + + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <1062500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <200000>; + }; + }; + + pmuv8: pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + }; + + psci: psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + rpm: remoteproc { + compatible = "qcom,ipq6018-rpm-proc", "qcom,rpm-proc"; + + glink-edge { + compatible = "qcom,glink-rpm"; + interrupts = ; + qcom,rpm-msg-ram = <&rpm_msg_ram>; + mboxes = <&apcs_glb 0>; + + rpm_requests: rpm-requests { + compatible = "qcom,rpm-ipq6018"; + qcom,glink-channels = "rpm_requests"; + }; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + rpm_msg_ram: memory@60000 { + reg = <0x0 0x00060000 0x0 0x6000>; + no-map; + }; + + bootloader@4a100000 { + reg = <0x0 0x4a100000 0x0 0x400000>; + no-map; + }; + + sbl@4a500000 { + reg = <0x0 0x4a500000 0x0 0x100000>; + no-map; + }; + + tz: memory@4a600000 { + reg = <0x0 0x4a600000 0x0 0x400000>; + no-map; + }; + + smem_region: memory@4aa00000 { + reg = <0x0 0x4aa00000 0x0 0x100000>; + no-map; + }; + + q6_region: memory@4ab00000 { + reg = <0x0 0x4ab00000 0x0 0x5500000>; + no-map; + }; + + nss_region: nss@40000000 { + no-map; + reg = <0x0 0x40000000 0x0 0x01000000>; + }; + + q6_etr_region: q6_etr_dump@50000000 { + reg = <0x0 0x50000000 0x0 0x100000>; + no-map; + }; + + m3_dump_region: m3_dump@50100000 { + reg = <0x0 0x50100000 0x0 0x100000>; + no-map; + }; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem_region>; + hwlocks = <&tcsr_mutex 3>; + }; + + soc: soc@0 { + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0 0x0 0xffffffff>; + dma-ranges; + compatible = "simple-bus"; + + qusb_phy_1: qusb@59000 { + compatible = "qcom,ipq6018-qusb2-phy"; + reg = <0x0 0x00059000 0x0 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, + <&xo>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2_1_PHY_BCR>; + status = "disabled"; + }; + + ssphy_0: ssphy@78000 { + compatible = "qcom,ipq6018-qmp-usb3-phy"; + reg = <0x0 0x00078000 0x0 0x1c4>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_USB0_AUX_CLK>, + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>; + clock-names = "aux", "cfg_ahb", "ref"; + + resets = <&gcc GCC_USB0_PHY_BCR>, + <&gcc GCC_USB3PHY_0_PHY_BCR>; + reset-names = "phy","common"; + status = "disabled"; + + usb0_ssphy: phy@78200 { + reg = <0x0 0x00078200 0x0 0x130>, /* Tx */ + <0x0 0x00078400 0x0 0x200>, /* Rx */ + <0x0 0x00078800 0x0 0x1f8>, /* PCS */ + <0x0 0x00078600 0x0 0x044>; /* PCS misc */ + #phy-cells = <0>; + #clock-cells = <0>; + clocks = <&gcc GCC_USB0_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "gcc_usb0_pipe_clk_src"; + }; + }; + + qusb_phy_0: qusb@79000 { + compatible = "qcom,ipq6018-qusb2-phy"; + reg = <0x0 0x00079000 0x0 0x180>; + #phy-cells = <0>; + + clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, + <&xo>; + clock-names = "cfg_ahb", "ref"; + + resets = <&gcc GCC_QUSB2_0_PHY_BCR>; + status = "disabled"; + }; + + pcie_phy: phy@84000 { + compatible = "qcom,ipq6018-qmp-pcie-phy"; + reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ + status = "disabled"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_PCIE0_AUX_CLK>, + <&gcc GCC_PCIE0_AHB_CLK>; + clock-names = "aux", "cfg_ahb"; + + resets = <&gcc GCC_PCIE0_PHY_BCR>, + <&gcc GCC_PCIE0PHY_PHY_BCR>; + reset-names = "phy", + "common"; + + pcie_phy0: phy@84200 { + reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ + <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ + <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ + <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ + #phy-cells = <0>; + + clocks = <&gcc GCC_PCIE0_PIPE_CLK>; + clock-names = "pipe0"; + clock-output-names = "gcc_pcie0_pipe_clk_src"; + #clock-cells = <0>; + }; + }; + + mdio: mdio@90000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; + reg = <0x0 0x00090000 0x0 0x64>; + clocks = <&gcc GCC_MDIO_AHB_CLK>; + clock-names = "gcc_mdio_ahb_clk"; + status = "disabled"; + }; + + qfprom: efuse@a4000 { + compatible = "qcom,ipq6018-qfprom", "qcom,qfprom"; + reg = <0x0 0x000a4000 0x0 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + + cpu_speed_bin: cpu-speed-bin@135 { + reg = <0x135 0x1>; + bits = <7 1>; + }; + }; + + prng: qrng@e3000 { + compatible = "qcom,prng-ee"; + reg = <0x0 0x000e3000 0x0 0x1000>; + clocks = <&gcc GCC_PRNG_AHB_CLK>; + clock-names = "core"; + }; + + tsens: thermal-sensor@4a9000 { + compatible = "qcom,ipq6018-tsens", "qcom,ipq8074-tsens"; + reg = <0x0 0x4a9000 0x0 0x1000>, /* TM */ + <0x0 0x4a8000 0x0 0x1000>; /* SROT */ + interrupts = ; + interrupt-names = "combined"; + #qcom,sensors = <16>; + #thermal-sensor-cells = <1>; + }; + + cryptobam: dma-controller@704000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x0 0x00704000 0x0 0x20000>; + interrupts = ; + clocks = <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <1>; + qcom,controlled-remotely; + }; + + crypto: crypto@73a000 { + compatible = "qcom,crypto-v5.1"; + reg = <0x0 0x0073a000 0x0 0x6000>; + clocks = <&gcc GCC_CRYPTO_AHB_CLK>, + <&gcc GCC_CRYPTO_AXI_CLK>, + <&gcc GCC_CRYPTO_CLK>; + clock-names = "iface", "bus", "core"; + dmas = <&cryptobam 2>, <&cryptobam 3>; + dma-names = "rx", "tx"; + }; + + tlmm: pinctrl@1000000 { + compatible = "qcom,ipq6018-pinctrl"; + reg = <0x0 0x01000000 0x0 0x300000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 80>; + interrupt-controller; + #interrupt-cells = <2>; + + serial_3_pins: serial3-state { + pins = "gpio44", "gpio45"; + function = "blsp2_uart"; + drive-strength = <8>; + bias-pull-down; + }; + + qpic_pins: qpic-state { + pins = "gpio1", "gpio3", "gpio4", + "gpio5", "gpio6", "gpio7", + "gpio8", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", + "gpio15", "gpio17"; + function = "qpic_pad"; + drive-strength = <8>; + bias-disable; + }; + }; + + gcc: gcc@1800000 { + compatible = "qcom,gcc-ipq6018"; + reg = <0x0 0x01800000 0x0 0x80000>; + clocks = <&xo>, <&sleep_clk>; + clock-names = "xo", "sleep_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + tcsr_mutex: hwlock@1905000 { + compatible = "qcom,ipq6018-tcsr-mutex", "qcom,tcsr-mutex"; + reg = <0x0 0x01905000 0x0 0x20000>; + #hwlock-cells = <1>; + }; + + tcsr: syscon@1937000 { + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; + reg = <0x0 0x01937000 0x0 0x21000>; + ranges = <0x0 0x0 0x01937000 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + + pwm: pwm@a010 { + compatible = "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + status = "disabled"; + }; + }; + + usb2: usb@70f8800 { + compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; + reg = <0x0 0x070f8800 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + clocks = <&gcc GCC_USB1_MASTER_CLK>, + <&gcc GCC_USB1_SLEEP_CLK>, + <&gcc GCC_USB1_MOCK_UTMI_CLK>; + clock-names = "core", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>, + <&gcc GCC_USB1_MOCK_UTMI_CLK>; + assigned-clock-rates = <133330000>, + <24000000>; + resets = <&gcc GCC_USB1_BCR>; + status = "disabled"; + + dwc_1: usb@7000000 { + compatible = "snps,dwc3"; + reg = <0x0 0x07000000 0x0 0xcd00>; + interrupts = ; + phys = <&qusb_phy_1>; + phy-names = "usb2-phy"; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode = "host"; + }; + }; + + sdhc: mmc@7804000 { + compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x0 0x7804000 0x0 0x1000>, + <0x0 0x7805000 0x0 0x1000>; + reg-names = "hc", "cqhci"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>, + <&xo>; + clock-names = "iface", "core", "xo"; + resets = <&gcc GCC_SDCC1_BCR>; + max-frequency = <192000000>; + + status = "disabled"; + }; + + blsp_dma: dma-controller@7884000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x0 0x07884000 0x0 0x2b000>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + }; + + blsp1_uart1: serial@78af000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0 0x78af000 0x0 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + blsp1_uart2: serial@78b0000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0 0x78b0000 0x0 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + blsp1_uart3: serial@78b1000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0 0x078b1000 0x0 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + blsp1_uart4: serial@78b2000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0 0x078b2000 0x0 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART4_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + blsp1_uart5: serial@78b3000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0 0x78b3000 0x0 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART5_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + blsp1_uart6: serial@78b4000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0x0 0x078b4000 0x0 0x200>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + status = "disabled"; + }; + + blsp1_spi1: spi@78b5000 { + compatible = "qcom,spi-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x078b5000 0x0 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + dmas = <&blsp_dma 12>, <&blsp_dma 13>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + blsp1_spi2: spi@78b6000 { + compatible = "qcom,spi-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x078b6000 0x0 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + dmas = <&blsp_dma 14>, <&blsp_dma 15>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + blsp1_i2c2: i2c@78b6000 { + compatible = "qcom,i2c-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x078b6000 0x0 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + clock-frequency = <400000>; + dmas = <&blsp_dma 14>, <&blsp_dma 15>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + blsp1_i2c3: i2c@78b7000 { + compatible = "qcom,i2c-qup-v2.2.1"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0x078b7000 0x0 0x600>; + interrupts = ; + clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; + clock-frequency = <400000>; + dmas = <&blsp_dma 16>, <&blsp_dma 17>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + qpic_bam: dma-controller@7984000 { + compatible = "qcom,bam-v1.7.0"; + reg = <0x0 0x07984000 0x0 0x1a000>; + interrupts = ; + clocks = <&gcc GCC_QPIC_AHB_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + status = "disabled"; + }; + + qpic_nand: nand-controller@79b0000 { + compatible = "qcom,ipq6018-nand"; + reg = <0x0 0x079b0000 0x0 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&gcc GCC_QPIC_CLK>, + <&gcc GCC_QPIC_AHB_CLK>; + clock-names = "core", "aon"; + + dmas = <&qpic_bam 0>, + <&qpic_bam 1>, + <&qpic_bam 2>; + dma-names = "tx", "rx", "cmd"; + pinctrl-0 = <&qpic_pins>; + pinctrl-names = "default"; + status = "disabled"; + }; + + usb3: usb@8af8800 { + compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; + reg = <0x0 0x08af8800 0x0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_SLEEP_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, + <&gcc GCC_USB0_MASTER_CLK>, + <&gcc GCC_USB0_MOCK_UTMI_CLK>; + assigned-clock-rates = <133330000>, + <133330000>, + <24000000>; + + resets = <&gcc GCC_USB0_BCR>; + status = "disabled"; + + dwc_0: usb@8a00000 { + compatible = "snps,dwc3"; + reg = <0x0 0x08a00000 0x0 0xcd00>; + interrupts = ; + phys = <&qusb_phy_0>, <&usb0_ssphy>; + phy-names = "usb2-phy", "usb3-phy"; + clocks = <&xo>; + clock-names = "ref"; + tx-fifo-resize; + snps,is-utmi-l1-suspend; + snps,hird-threshold = /bits/ 8 <0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_u3_susphy_quirk; + dr_mode = "host"; + }; + }; + + intc: interrupt-controller@b000000 { + compatible = "qcom,msm-qgic2"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-controller; + #interrupt-cells = <0x3>; + reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/ + <0x0 0x0b002000 0x0 0x1000>, /*GICC*/ + <0x0 0x0b001000 0x0 0x1000>, /*GICH*/ + <0x0 0x0b004000 0x0 0x1000>; /*GICV*/ + interrupts = ; + ranges = <0 0 0 0xb00a000 0 0xffd>; + + v2m@0 { + compatible = "arm,gic-v2m-frame"; + msi-controller; + reg = <0x0 0x0 0x0 0xffd>; + }; + }; + + watchdog@b017000 { + compatible = "qcom,kpss-wdt"; + interrupts = ; + reg = <0x0 0x0b017000 0x0 0x40>; + clocks = <&sleep_clk>; + timeout-sec = <10>; + }; + + apcs_glb: mailbox@b111000 { + compatible = "qcom,ipq6018-apcs-apps-global"; + reg = <0x0 0x0b111000 0x0 0x1000>; + #clock-cells = <1>; + clocks = <&a53pll>, <&xo>, <&gcc GPLL0>; + clock-names = "pll", "xo", "gpll0"; + #mbox-cells = <1>; + }; + + a53pll: clock@b116000 { + compatible = "qcom,ipq6018-a53pll"; + reg = <0x0 0x0b116000 0x0 0x40>; + #clock-cells = <0>; + clocks = <&xo>; + clock-names = "xo"; + }; + + timer@b120000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0x10000000>; + compatible = "arm,armv7-timer-mem"; + reg = <0x0 0x0b120000 0x0 0x1000>; + + frame@b120000 { + frame-number = <0>; + interrupts = , + ; + reg = <0x0b121000 0x1000>, + <0x0b122000 0x1000>; + }; + + frame@b123000 { + frame-number = <1>; + interrupts = ; + reg = <0x0b123000 0x1000>; + status = "disabled"; + }; + + frame@b124000 { + frame-number = <2>; + interrupts = ; + reg = <0x0b124000 0x1000>; + status = "disabled"; + }; + + frame@b125000 { + frame-number = <3>; + interrupts = ; + reg = <0x0b125000 0x1000>; + status = "disabled"; + }; + + frame@b126000 { + frame-number = <4>; + interrupts = ; + reg = <0x0b126000 0x1000>; + status = "disabled"; + }; + + frame@b127000 { + frame-number = <5>; + interrupts = ; + reg = <0x0b127000 0x1000>; + status = "disabled"; + }; + + frame@b128000 { + frame-number = <6>; + interrupts = ; + reg = <0x0b128000 0x1000>; + status = "disabled"; + }; + }; + + wifi: wifi@c000000 { + compatible = "qcom,ipq6018-wifi"; + reg = <0x0 0xc000000 0x0 0x1000000>; + + interrupts = <0 320 IRQ_TYPE_EDGE_RISING>, + <0 319 IRQ_TYPE_EDGE_RISING>, + <0 318 IRQ_TYPE_EDGE_RISING>, + <0 316 IRQ_TYPE_EDGE_RISING>, + <0 315 IRQ_TYPE_EDGE_RISING>, + <0 314 IRQ_TYPE_EDGE_RISING>, + <0 311 IRQ_TYPE_EDGE_RISING>, + <0 310 IRQ_TYPE_EDGE_RISING>, + <0 411 IRQ_TYPE_EDGE_RISING>, + <0 410 IRQ_TYPE_EDGE_RISING>, + <0 40 IRQ_TYPE_EDGE_RISING>, + <0 39 IRQ_TYPE_EDGE_RISING>, + <0 302 IRQ_TYPE_EDGE_RISING>, + <0 301 IRQ_TYPE_EDGE_RISING>, + <0 37 IRQ_TYPE_EDGE_RISING>, + <0 36 IRQ_TYPE_EDGE_RISING>, + <0 296 IRQ_TYPE_EDGE_RISING>, + <0 295 IRQ_TYPE_EDGE_RISING>, + <0 294 IRQ_TYPE_EDGE_RISING>, + <0 293 IRQ_TYPE_EDGE_RISING>, + <0 292 IRQ_TYPE_EDGE_RISING>, + <0 291 IRQ_TYPE_EDGE_RISING>, + <0 290 IRQ_TYPE_EDGE_RISING>, + <0 289 IRQ_TYPE_EDGE_RISING>, + <0 288 IRQ_TYPE_EDGE_RISING>, + <0 239 IRQ_TYPE_EDGE_RISING>, + <0 236 IRQ_TYPE_EDGE_RISING>, + <0 235 IRQ_TYPE_EDGE_RISING>, + <0 234 IRQ_TYPE_EDGE_RISING>, + <0 233 IRQ_TYPE_EDGE_RISING>, + <0 232 IRQ_TYPE_EDGE_RISING>, + <0 231 IRQ_TYPE_EDGE_RISING>, + <0 230 IRQ_TYPE_EDGE_RISING>, + <0 229 IRQ_TYPE_EDGE_RISING>, + <0 228 IRQ_TYPE_EDGE_RISING>, + <0 224 IRQ_TYPE_EDGE_RISING>, + <0 223 IRQ_TYPE_EDGE_RISING>, + <0 203 IRQ_TYPE_EDGE_RISING>, + <0 183 IRQ_TYPE_EDGE_RISING>, + <0 180 IRQ_TYPE_EDGE_RISING>, + <0 179 IRQ_TYPE_EDGE_RISING>, + <0 178 IRQ_TYPE_EDGE_RISING>, + <0 177 IRQ_TYPE_EDGE_RISING>, + <0 176 IRQ_TYPE_EDGE_RISING>, + <0 163 IRQ_TYPE_EDGE_RISING>, + <0 162 IRQ_TYPE_EDGE_RISING>, + <0 160 IRQ_TYPE_EDGE_RISING>, + <0 414 IRQ_TYPE_EDGE_RISING>, + <0 159 IRQ_TYPE_EDGE_RISING>, + <0 158 IRQ_TYPE_EDGE_RISING>, + <0 157 IRQ_TYPE_EDGE_RISING>, + <0 156 IRQ_TYPE_EDGE_RISING>; + + interrupt-names = "misc-pulse1", + "misc-latch", + "sw-exception", + "ce0", + "ce1", + "ce2", + "ce3", + "ce4", + "ce5", + "ce6", + "ce7", + "ce8", + "ce9", + "ce10", + "ce11", + "host2wbm-desc-feed", + "host2reo-re-injection", + "host2reo-command", + "host2rxdma-monitor-ring3", + "host2rxdma-monitor-ring2", + "host2rxdma-monitor-ring1", + "reo2ost-exception", + "wbm2host-rx-release", + "reo2host-status", + "reo2host-destination-ring4", + "reo2host-destination-ring3", + "reo2host-destination-ring2", + "reo2host-destination-ring1", + "rxdma2host-monitor-destination-mac3", + "rxdma2host-monitor-destination-mac2", + "rxdma2host-monitor-destination-mac1", + "ppdu-end-interrupts-mac3", + "ppdu-end-interrupts-mac2", + "ppdu-end-interrupts-mac1", + "rxdma2host-monitor-status-ring-mac3", + "rxdma2host-monitor-status-ring-mac2", + "rxdma2host-monitor-status-ring-mac1", + "host2rxdma-host-buf-ring-mac3", + "host2rxdma-host-buf-ring-mac2", + "host2rxdma-host-buf-ring-mac1", + "rxdma2host-destination-ring-mac3", + "rxdma2host-destination-ring-mac2", + "rxdma2host-destination-ring-mac1", + "host2tcl-input-ring4", + "host2tcl-input-ring3", + "host2tcl-input-ring2", + "host2tcl-input-ring1", + "wbm2host-tx-completions-ring4", + "wbm2host-tx-completions-ring3", + "wbm2host-tx-completions-ring2", + "wbm2host-tx-completions-ring1", + "tcl2host-status-ring"; + qcom,rproc = <&q6v5_wcss>; + status = "disabled"; + }; + + q6v5_wcss: remoteproc@cd00000 { + compatible = "qcom,ipq6018-wcss-pil"; + reg = <0x0 0x0cd00000 0x0 0x4040>, + <0x0 0x004ab000 0x0 0x20>; + reg-names = "qdsp6", + "rmb"; + interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 0 0>, + <&wcss_smp2p_in 1 0>, + <&wcss_smp2p_in 2 0>, + <&wcss_smp2p_in 3 0>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + resets = <&gcc GCC_WCSSAON_RESET>, + <&gcc GCC_WCSS_BCR>, + <&gcc GCC_WCSS_Q6_BCR>; + + reset-names = "wcss_aon_reset", + "wcss_reset", + "wcss_q6_reset"; + + clocks = <&gcc GCC_PRNG_AHB_CLK>, + <&gcc GCC_SYS_NOC_WCSS_AHB_CLK>, + <&gcc GCC_Q6SS_ATBM_CLK>, + <&gcc GCC_Q6SS_PCLKDBG_CLK>, + <&gcc GCC_Q6_TSCTR_1TO2_CLK>; + clock-names = "prng", + "gcc_sys_noc_wcss_ahb_clk", + "gcc_q6ss_atbm_clk", + "gcc_q6ss_pclkdbg_clk", + "gcc_q6_tsctr_1to2_clk"; + assigned-clocks = <&gcc GCC_SYS_NOC_WCSS_AHB_CLK>, + <&gcc GCC_Q6SS_PCLKDBG_CLK>, + <&gcc GCC_Q6_TSCTR_1TO2_CLK>, + <&gcc GCC_Q6SS_ATBM_CLK>; + assigned-clock-rates = <133333333>, + <600000000>, + <600000000>, + <240000000>; + + qcom,halt-regs = <&tcsr 0x18000 0x1b000 0xe000>; + + qcom,smem-states = <&wcss_smp2p_out 0>, + <&wcss_smp2p_out 1>; + qcom,smem-state-names = "shutdown", + "stop"; + + memory-region = <&q6_region>; + + glink-edge { + interrupts = ; + label = "rtr"; + qcom,remote-pid = <1>; + mboxes = <&apcs_glb 8>; + + qrtr_requests { + qcom,glink-channels = "IPCRTR"; + }; + }; + }; + + pcie0: pci@20000000 { + compatible = "qcom,pcie-ipq6018"; + reg = <0x0 0x20000000 0x0 0xf1d>, + <0x0 0x20000f20 0x0 0xa8>, + <0x0 0x20001000 0x0 0x1000>, + <0x0 0x80000 0x0 0x4000>, + <0x0 0x20100000 0x0 0x1000>; + reg-names = "dbi", "elbi", "atu", "parf", "config"; + + device_type = "pci"; + linux,pci-domain = <0>; + bus-range = <0x00 0xff>; + num-lanes = <1>; + max-link-speed = <3>; + #address-cells = <3>; + #size-cells = <2>; + + phys = <&pcie_phy0>; + phy-names = "pciephy"; + + ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>, + <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>; + + interrupts = ; + interrupt-names = "msi"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ + <0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ + <0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ + <0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ + + clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, + <&gcc GCC_PCIE0_AXI_M_CLK>, + <&gcc GCC_PCIE0_AXI_S_CLK>, + <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, + <&gcc PCIE0_RCHNG_CLK>; + clock-names = "iface", + "axi_m", + "axi_s", + "axi_bridge", + "rchng"; + + resets = <&gcc GCC_PCIE0_PIPE_ARES>, + <&gcc GCC_PCIE0_SLEEP_ARES>, + <&gcc GCC_PCIE0_CORE_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, + <&gcc GCC_PCIE0_AHB_ARES>, + <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, + <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; + reset-names = "pipe", + "sleep", + "sticky", + "axi_m", + "axi_s", + "ahb", + "axi_m_sticky", + "axi_s_sticky"; + + status = "disabled"; + }; + }; + + thermal-zones { + nss-top-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 4>; + + trips { + nss-top-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + nss0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 5>; + + trips { + nss-0-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + wcss-phya0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 7>; + + trips { + wcss-phya0-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + wcss-phya1-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 8>; + + trips { + wcss-phya1-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + cluster_thermal: cluster-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 13>; + + trips { + cluster-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + lpass-qsdp6-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 14>; + + trips { + lpass-qsdp6-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + package-top-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 15>; + + trips { + package-top-crit { + temperature = <110000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + wcss: wcss-smp2p { + compatible = "qcom,smp2p"; + qcom,smem = <435>, <428>; + + interrupt-parent = <&intc>; + interrupts = ; + + mboxes = <&apcs_glb 9>; + + qcom,local-pid = <0>; + qcom,remote-pid = <1>; + + wcss_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + #qcom,smem-state-cells = <1>; + }; + + wcss_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; diff --git a/target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch b/target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch deleted file mode 100644 index a87ae4b8a..000000000 --- a/target/linux/qualcommax/patches-6.1/0008-v6.2-arm64-dts-qcom-ipq6018-fix-NAND-node-name.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 8857b0ab6a562c473c5bded0efda9390b82a84d4 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Tue, 27 Sep 2022 22:12:17 +0200 -Subject: [PATCH] arm64: dts: qcom: ipq6018: fix NAND node name - -Per schema it should be nand-controller@79b0000 instead of nand@79b0000. -Fix it to match nand-controller.yaml requirements. - -Signed-off-by: Robert Marko -Reviewed-by: Krzysztof Kozlowski -Reviewed-by: Neil Armstrong -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20220927201218.1264506-1-robimarko@gmail.com ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -348,7 +348,7 @@ - status = "disabled"; - }; - -- qpic_nand: nand@79b0000 { -+ qpic_nand: nand-controller@79b0000 { - compatible = "qcom,ipq6018-nand"; - reg = <0x0 0x079b0000 0x0 0x10000>; - #address-cells = <1>; diff --git a/target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch b/target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch index ceaf68bf7..4caa5a38d 100644 --- a/target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch +++ b/target/linux/qualcommax/patches-6.1/0018-v6.2-arm64-dts-qcom-ipq6018-align-TLMM-pin-configuration-.patch @@ -35,22 +35,3 @@ Link: https://lore.kernel.org/r/20221006124659.217540-3-krzysztof.kozlowski@lina pins = "gpio38", "gpio39", "gpio40", "gpio41"; function = "blsp0_spi"; drive-strength = <8>; ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -218,14 +218,14 @@ - interrupt-controller; - #interrupt-cells = <2>; - -- serial_3_pins: serial3-pinmux { -+ serial_3_pins: serial3-state { - pins = "gpio44", "gpio45"; - function = "blsp2_uart"; - drive-strength = <8>; - bias-pull-down; - }; - -- qpic_pins: qpic-pins { -+ qpic_pins: qpic-state { - pins = "gpio1", "gpio3", "gpio4", - "gpio5", "gpio6", "gpio7", - "gpio8", "gpio10", "gpio11", diff --git a/target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch b/target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch deleted file mode 100644 index c3e94a2ae..000000000 --- a/target/linux/qualcommax/patches-6.1/0033-v6.2-arm64-dts-qcom-ipq6018-move-ARMv8-timer-out-of-SoC.patch +++ /dev/null @@ -1,52 +0,0 @@ -From feeef118fda562cf9081edef8ad464d89db070f4 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Tue, 27 Sep 2022 22:12:18 +0200 -Subject: [PATCH] arm64: dts: qcom: ipq6018: move ARMv8 timer out of SoC node - -The ARM timer is usually considered not part of SoC node, just like -other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning: - -arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'} - From schema: dtschema/schemas/simple-bus.yaml - -Signed-off-by: Robert Marko -Reviewed-by: Krzysztof Kozlowski -Reviewed-by: Neil Armstrong -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20220927201218.1264506-2-robimarko@gmail.com ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -510,14 +510,6 @@ - clock-names = "xo"; - }; - -- timer { -- compatible = "arm,armv8-timer"; -- interrupts = , -- , -- , -- ; -- }; -- - timer@b120000 { - #address-cells = <1>; - #size-cells = <1>; -@@ -769,6 +761,14 @@ - }; - }; - -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+ - wcss: wcss-smp2p { - compatible = "qcom,smp2p"; - qcom,smem = <435>, <428>; diff --git a/target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch b/target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch deleted file mode 100644 index ad32e64fe..000000000 --- a/target/linux/qualcommax/patches-6.1/0034-v6.3-arm64-dts-qcom-ipq6018-Sort-nodes-properly.patch +++ /dev/null @@ -1,605 +0,0 @@ -From 2c6e322a41c5e1ca45be50b9d5fbcda62dc23a0d Mon Sep 17 00:00:00 2001 -From: Konrad Dybcio -Date: Mon, 2 Jan 2023 10:46:28 +0100 -Subject: [PATCH] arm64: dts: qcom: ipq6018: Sort nodes properly - -Order nodes by unit address if one exists and alphabetically otherwise. - -Signed-off-by: Konrad Dybcio -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230102094642.74254-4-konrad.dybcio@linaro.org ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 562 +++++++++++++------------- - 1 file changed, 281 insertions(+), 281 deletions(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -87,6 +87,12 @@ - }; - }; - -+ firmware { -+ scm { -+ compatible = "qcom,scm-ipq6018", "qcom,scm"; -+ }; -+ }; -+ - cpu_opp_table: opp-table-cpu { - compatible = "operating-points-v2"; - opp-shared; -@@ -123,12 +129,6 @@ - }; - }; - -- firmware { -- scm { -- compatible = "qcom,scm-ipq6018", "qcom,scm"; -- }; -- }; -- - pmuv8: pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = ; -+ qcom,rpm-msg-ram = <&rpm_msg_ram>; -+ mboxes = <&apcs_glb 0>; -+ -+ rpm_requests: glink-channel { -+ compatible = "qcom,rpm-ipq6018"; -+ qcom,glink-channels = "rpm_requests"; -+ -+ regulators { -+ compatible = "qcom,rpm-mp5496-regulators"; -+ -+ ipq6018_s2: s2 { -+ regulator-min-microvolt = <725000>; -+ regulator-max-microvolt = <1062500>; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ }; -+ - smem { - compatible = "qcom,smem"; - memory-region = <&smem_region>; -@@ -179,6 +201,102 @@ - dma-ranges; - compatible = "simple-bus"; - -+ qusb_phy_1: qusb@59000 { -+ compatible = "qcom,ipq6018-qusb2-phy"; -+ reg = <0x0 0x00059000 0x0 0x180>; -+ #phy-cells = <0>; -+ -+ clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, -+ <&xo>; -+ clock-names = "cfg_ahb", "ref"; -+ -+ resets = <&gcc GCC_QUSB2_1_PHY_BCR>; -+ status = "disabled"; -+ }; -+ -+ ssphy_0: ssphy@78000 { -+ compatible = "qcom,ipq6018-qmp-usb3-phy"; -+ reg = <0x0 0x00078000 0x0 0x1c4>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ clocks = <&gcc GCC_USB0_AUX_CLK>, -+ <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>; -+ clock-names = "aux", "cfg_ahb", "ref"; -+ -+ resets = <&gcc GCC_USB0_PHY_BCR>, -+ <&gcc GCC_USB3PHY_0_PHY_BCR>; -+ reset-names = "phy","common"; -+ status = "disabled"; -+ -+ usb0_ssphy: phy@78200 { -+ reg = <0x0 0x00078200 0x0 0x130>, /* Tx */ -+ <0x0 0x00078400 0x0 0x200>, /* Rx */ -+ <0x0 0x00078800 0x0 0x1f8>, /* PCS */ -+ <0x0 0x00078600 0x0 0x044>; /* PCS misc */ -+ #phy-cells = <0>; -+ #clock-cells = <0>; -+ clocks = <&gcc GCC_USB0_PIPE_CLK>; -+ clock-names = "pipe0"; -+ clock-output-names = "gcc_usb0_pipe_clk_src"; -+ }; -+ }; -+ -+ qusb_phy_0: qusb@79000 { -+ compatible = "qcom,ipq6018-qusb2-phy"; -+ reg = <0x0 0x00079000 0x0 0x180>; -+ #phy-cells = <0>; -+ -+ clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, -+ <&xo>; -+ clock-names = "cfg_ahb", "ref"; -+ -+ resets = <&gcc GCC_QUSB2_0_PHY_BCR>; -+ status = "disabled"; -+ }; -+ -+ pcie_phy: phy@84000 { -+ compatible = "qcom,ipq6018-qmp-pcie-phy"; -+ reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ -+ status = "disabled"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ clocks = <&gcc GCC_PCIE0_AUX_CLK>, -+ <&gcc GCC_PCIE0_AHB_CLK>; -+ clock-names = "aux", "cfg_ahb"; -+ -+ resets = <&gcc GCC_PCIE0_PHY_BCR>, -+ <&gcc GCC_PCIE0PHY_PHY_BCR>; -+ reset-names = "phy", -+ "common"; -+ -+ pcie_phy0: phy@84200 { -+ reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ -+ <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ -+ <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ -+ <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ -+ #phy-cells = <0>; -+ -+ clocks = <&gcc GCC_PCIE0_PIPE_CLK>; -+ clock-names = "pipe0"; -+ clock-output-names = "gcc_pcie0_pipe_clk_src"; -+ #clock-cells = <0>; -+ }; -+ }; -+ -+ mdio: mdio@90000 { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; -+ reg = <0x0 0x00090000 0x0 0x64>; -+ clocks = <&gcc GCC_MDIO_AHB_CLK>; -+ clock-names = "gcc_mdio_ahb_clk"; -+ status = "disabled"; -+ }; -+ - prng: qrng@e1000 { - compatible = "qcom,prng-ee"; - reg = <0x0 0x000e3000 0x0 0x1000>; -@@ -257,6 +375,41 @@ - reg = <0x0 0x01937000 0x0 0x21000>; - }; - -+ usb2: usb@70f8800 { -+ compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; -+ reg = <0x0 0x070F8800 0x0 0x400>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ clocks = <&gcc GCC_USB1_MASTER_CLK>, -+ <&gcc GCC_USB1_SLEEP_CLK>, -+ <&gcc GCC_USB1_MOCK_UTMI_CLK>; -+ clock-names = "core", -+ "sleep", -+ "mock_utmi"; -+ -+ assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>, -+ <&gcc GCC_USB1_MOCK_UTMI_CLK>; -+ assigned-clock-rates = <133330000>, -+ <24000000>; -+ resets = <&gcc GCC_USB1_BCR>; -+ status = "disabled"; -+ -+ dwc_1: usb@7000000 { -+ compatible = "snps,dwc3"; -+ reg = <0x0 0x07000000 0x0 0xcd00>; -+ interrupts = ; -+ phys = <&qusb_phy_1>; -+ phy-names = "usb2-phy"; -+ tx-fifo-resize; -+ snps,is-utmi-l1-suspend; -+ snps,hird-threshold = /bits/ 8 <0x0>; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_u3_susphy_quirk; -+ dr_mode = "host"; -+ }; -+ }; -+ - blsp_dma: dma-controller@7884000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x0 0x07884000 0x0 0x2b000>; -@@ -366,6 +519,49 @@ - status = "disabled"; - }; - -+ usb3: usb@8af8800 { -+ compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; -+ reg = <0x0 0x08af8800 0x0 0x400>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, -+ <&gcc GCC_USB0_MASTER_CLK>, -+ <&gcc GCC_USB0_SLEEP_CLK>, -+ <&gcc GCC_USB0_MOCK_UTMI_CLK>; -+ clock-names = "cfg_noc", -+ "core", -+ "sleep", -+ "mock_utmi"; -+ -+ assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, -+ <&gcc GCC_USB0_MASTER_CLK>, -+ <&gcc GCC_USB0_MOCK_UTMI_CLK>; -+ assigned-clock-rates = <133330000>, -+ <133330000>, -+ <24000000>; -+ -+ resets = <&gcc GCC_USB0_BCR>; -+ status = "disabled"; -+ -+ dwc_0: usb@8a00000 { -+ compatible = "snps,dwc3"; -+ reg = <0x0 0x08a00000 0x0 0xcd00>; -+ interrupts = ; -+ phys = <&qusb_phy_0>, <&usb0_ssphy>; -+ phy-names = "usb2-phy", "usb3-phy"; -+ clocks = <&xo>; -+ clock-names = "ref"; -+ tx-fifo-resize; -+ snps,is-utmi-l1-suspend; -+ snps,hird-threshold = /bits/ 8 <0x0>; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_u3_susphy_quirk; -+ dr_mode = "host"; -+ }; -+ }; -+ - intc: interrupt-controller@b000000 { - compatible = "qcom,msm-qgic2"; - #address-cells = <2>; -@@ -386,105 +582,6 @@ - }; - }; - -- pcie_phy: phy@84000 { -- compatible = "qcom,ipq6018-qmp-pcie-phy"; -- reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */ -- status = "disabled"; -- #address-cells = <2>; -- #size-cells = <2>; -- ranges; -- -- clocks = <&gcc GCC_PCIE0_AUX_CLK>, -- <&gcc GCC_PCIE0_AHB_CLK>; -- clock-names = "aux", "cfg_ahb"; -- -- resets = <&gcc GCC_PCIE0_PHY_BCR>, -- <&gcc GCC_PCIE0PHY_PHY_BCR>; -- reset-names = "phy", -- "common"; -- -- pcie_phy0: phy@84200 { -- reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */ -- <0x0 0x00084400 0x0 0x200>, /* Serdes Rx */ -- <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */ -- <0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */ -- #phy-cells = <0>; -- -- clocks = <&gcc GCC_PCIE0_PIPE_CLK>; -- clock-names = "pipe0"; -- clock-output-names = "gcc_pcie0_pipe_clk_src"; -- #clock-cells = <0>; -- }; -- }; -- -- pcie0: pci@20000000 { -- compatible = "qcom,pcie-ipq6018"; -- reg = <0x0 0x20000000 0x0 0xf1d>, -- <0x0 0x20000f20 0x0 0xa8>, -- <0x0 0x20001000 0x0 0x1000>, -- <0x0 0x80000 0x0 0x4000>, -- <0x0 0x20100000 0x0 0x1000>; -- reg-names = "dbi", "elbi", "atu", "parf", "config"; -- -- device_type = "pci"; -- linux,pci-domain = <0>; -- bus-range = <0x00 0xff>; -- num-lanes = <1>; -- max-link-speed = <3>; -- #address-cells = <3>; -- #size-cells = <2>; -- -- phys = <&pcie_phy0>; -- phy-names = "pciephy"; -- -- ranges = <0x81000000 0x0 0x00000000 0x0 0x20200000 0x0 0x10000>, -- <0x82000000 0x0 0x20220000 0x0 0x20220000 0x0 0xfde0000>; -- -- interrupts = ; -- interrupt-names = "msi"; -- -- #interrupt-cells = <1>; -- interrupt-map-mask = <0 0 0 0x7>; -- interrupt-map = <0 0 0 1 &intc 0 75 -- IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -- <0 0 0 2 &intc 0 78 -- IRQ_TYPE_LEVEL_HIGH>, /* int_b */ -- <0 0 0 3 &intc 0 79 -- IRQ_TYPE_LEVEL_HIGH>, /* int_c */ -- <0 0 0 4 &intc 0 83 -- IRQ_TYPE_LEVEL_HIGH>; /* int_d */ -- -- clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, -- <&gcc GCC_PCIE0_AXI_M_CLK>, -- <&gcc GCC_PCIE0_AXI_S_CLK>, -- <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, -- <&gcc PCIE0_RCHNG_CLK>; -- clock-names = "iface", -- "axi_m", -- "axi_s", -- "axi_bridge", -- "rchng"; -- -- resets = <&gcc GCC_PCIE0_PIPE_ARES>, -- <&gcc GCC_PCIE0_SLEEP_ARES>, -- <&gcc GCC_PCIE0_CORE_STICKY_ARES>, -- <&gcc GCC_PCIE0_AXI_MASTER_ARES>, -- <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, -- <&gcc GCC_PCIE0_AHB_ARES>, -- <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, -- <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; -- reset-names = "pipe", -- "sleep", -- "sticky", -- "axi_m", -- "axi_s", -- "ahb", -- "axi_m_sticky", -- "axi_s_sticky"; -- -- status = "disabled"; -- }; -- - watchdog@b017000 { - compatible = "qcom,kpss-wdt"; - interrupts = ; -@@ -617,147 +714,74 @@ - }; - }; - -- mdio: mdio@90000 { -- #address-cells = <1>; -- #size-cells = <0>; -- compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio"; -- reg = <0x0 0x00090000 0x0 0x64>; -- clocks = <&gcc GCC_MDIO_AHB_CLK>; -- clock-names = "gcc_mdio_ahb_clk"; -- status = "disabled"; -- }; -- -- qusb_phy_1: qusb@59000 { -- compatible = "qcom,ipq6018-qusb2-phy"; -- reg = <0x0 0x00059000 0x0 0x180>; -- #phy-cells = <0>; -- -- clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, -- <&xo>; -- clock-names = "cfg_ahb", "ref"; -- -- resets = <&gcc GCC_QUSB2_1_PHY_BCR>; -- status = "disabled"; -- }; -- -- usb2: usb@70f8800 { -- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; -- reg = <0x0 0x070F8800 0x0 0x400>; -- #address-cells = <2>; -- #size-cells = <2>; -- ranges; -- clocks = <&gcc GCC_USB1_MASTER_CLK>, -- <&gcc GCC_USB1_SLEEP_CLK>, -- <&gcc GCC_USB1_MOCK_UTMI_CLK>; -- clock-names = "core", -- "sleep", -- "mock_utmi"; -- -- assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>, -- <&gcc GCC_USB1_MOCK_UTMI_CLK>; -- assigned-clock-rates = <133330000>, -- <24000000>; -- resets = <&gcc GCC_USB1_BCR>; -- status = "disabled"; -- -- dwc_1: usb@7000000 { -- compatible = "snps,dwc3"; -- reg = <0x0 0x07000000 0x0 0xcd00>; -- interrupts = ; -- phys = <&qusb_phy_1>; -- phy-names = "usb2-phy"; -- tx-fifo-resize; -- snps,is-utmi-l1-suspend; -- snps,hird-threshold = /bits/ 8 <0x0>; -- snps,dis_u2_susphy_quirk; -- snps,dis_u3_susphy_quirk; -- dr_mode = "host"; -- }; -- }; -+ pcie0: pci@20000000 { -+ compatible = "qcom,pcie-ipq6018"; -+ reg = <0x0 0x20000000 0x0 0xf1d>, -+ <0x0 0x20000f20 0x0 0xa8>, -+ <0x0 0x20001000 0x0 0x1000>, -+ <0x0 0x80000 0x0 0x4000>, -+ <0x0 0x20100000 0x0 0x1000>; -+ reg-names = "dbi", "elbi", "atu", "parf", "config"; - -- ssphy_0: ssphy@78000 { -- compatible = "qcom,ipq6018-qmp-usb3-phy"; -- reg = <0x0 0x00078000 0x0 0x1c4>; -- #address-cells = <2>; -+ device_type = "pci"; -+ linux,pci-domain = <0>; -+ bus-range = <0x00 0xff>; -+ num-lanes = <1>; -+ max-link-speed = <3>; -+ #address-cells = <3>; - #size-cells = <2>; -- ranges; -- -- clocks = <&gcc GCC_USB0_AUX_CLK>, -- <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>; -- clock-names = "aux", "cfg_ahb", "ref"; -- -- resets = <&gcc GCC_USB0_PHY_BCR>, -- <&gcc GCC_USB3PHY_0_PHY_BCR>; -- reset-names = "phy","common"; -- status = "disabled"; -- -- usb0_ssphy: phy@78200 { -- reg = <0x0 0x00078200 0x0 0x130>, /* Tx */ -- <0x0 0x00078400 0x0 0x200>, /* Rx */ -- <0x0 0x00078800 0x0 0x1f8>, /* PCS */ -- <0x0 0x00078600 0x0 0x044>; /* PCS misc */ -- #phy-cells = <0>; -- #clock-cells = <0>; -- clocks = <&gcc GCC_USB0_PIPE_CLK>; -- clock-names = "pipe0"; -- clock-output-names = "gcc_usb0_pipe_clk_src"; -- }; -- }; - -- qusb_phy_0: qusb@79000 { -- compatible = "qcom,ipq6018-qusb2-phy"; -- reg = <0x0 0x00079000 0x0 0x180>; -- #phy-cells = <0>; -+ phys = <&pcie_phy0>; -+ phy-names = "pciephy"; - -- clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, -- <&xo>; -- clock-names = "cfg_ahb", "ref"; -+ ranges = <0x81000000 0 0x20200000 0 0x20200000 -+ 0 0x10000>, /* downstream I/O */ -+ <0x82000000 0 0x20220000 0 0x20220000 -+ 0 0xfde0000>; /* non-prefetchable memory */ - -- resets = <&gcc GCC_QUSB2_0_PHY_BCR>; -- status = "disabled"; -- }; -+ interrupts = ; -+ interrupt-names = "msi"; - -- usb3: usb@8af8800 { -- compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; -- reg = <0x0 0x8af8800 0x0 0x400>; -- #address-cells = <2>; -- #size-cells = <2>; -- ranges; -+ #interrupt-cells = <1>; -+ interrupt-map-mask = <0 0 0 0x7>; -+ interrupt-map = <0 0 0 1 &intc 0 75 -+ IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -+ <0 0 0 2 &intc 0 78 -+ IRQ_TYPE_LEVEL_HIGH>, /* int_b */ -+ <0 0 0 3 &intc 0 79 -+ IRQ_TYPE_LEVEL_HIGH>, /* int_c */ -+ <0 0 0 4 &intc 0 83 -+ IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - -- clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, -- <&gcc GCC_USB0_MASTER_CLK>, -- <&gcc GCC_USB0_SLEEP_CLK>, -- <&gcc GCC_USB0_MOCK_UTMI_CLK>; -- clock-names = "cfg_noc", -- "core", -- "sleep", -- "mock_utmi"; -+ clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, -+ <&gcc GCC_PCIE0_AXI_M_CLK>, -+ <&gcc GCC_PCIE0_AXI_S_CLK>, -+ <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>, -+ <&gcc PCIE0_RCHNG_CLK>; -+ clock-names = "iface", -+ "axi_m", -+ "axi_s", -+ "axi_bridge", -+ "rchng"; - -- assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>, -- <&gcc GCC_USB0_MASTER_CLK>, -- <&gcc GCC_USB0_MOCK_UTMI_CLK>; -- assigned-clock-rates = <133330000>, -- <133330000>, -- <24000000>; -+ resets = <&gcc GCC_PCIE0_PIPE_ARES>, -+ <&gcc GCC_PCIE0_SLEEP_ARES>, -+ <&gcc GCC_PCIE0_CORE_STICKY_ARES>, -+ <&gcc GCC_PCIE0_AXI_MASTER_ARES>, -+ <&gcc GCC_PCIE0_AXI_SLAVE_ARES>, -+ <&gcc GCC_PCIE0_AHB_ARES>, -+ <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>, -+ <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>; -+ reset-names = "pipe", -+ "sleep", -+ "sticky", -+ "axi_m", -+ "axi_s", -+ "ahb", -+ "axi_m_sticky", -+ "axi_s_sticky"; - -- resets = <&gcc GCC_USB0_BCR>; - status = "disabled"; -- -- dwc_0: usb@8a00000 { -- compatible = "snps,dwc3"; -- reg = <0x0 0x8a00000 0x0 0xcd00>; -- interrupts = ; -- phys = <&qusb_phy_0>, <&usb0_ssphy>; -- phy-names = "usb2-phy", "usb3-phy"; -- clocks = <&xo>; -- clock-names = "ref"; -- tx-fifo-resize; -- snps,is-utmi-l1-suspend; -- snps,hird-threshold = /bits/ 8 <0x0>; -- snps,dis_u2_susphy_quirk; -- snps,dis_u3_susphy_quirk; -- dr_mode = "host"; -- }; - }; - }; - -@@ -792,26 +816,4 @@ - #interrupt-cells = <2>; - }; - }; -- -- rpm-glink { -- compatible = "qcom,glink-rpm"; -- interrupts = ; -- qcom,rpm-msg-ram = <&rpm_msg_ram>; -- mboxes = <&apcs_glb 0>; -- -- rpm_requests: glink-channel { -- compatible = "qcom,rpm-ipq6018"; -- qcom,glink-channels = "rpm_requests"; -- -- regulators { -- compatible = "qcom,rpm-mp5496-regulators"; -- -- ipq6018_s2: s2 { -- regulator-min-microvolt = <725000>; -- regulator-max-microvolt = <1062500>; -- regulator-always-on; -- }; -- }; -- }; -- }; - }; diff --git a/target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch b/target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch deleted file mode 100644 index a883e305d..000000000 --- a/target/linux/qualcommax/patches-6.1/0035-v6.3-arm64-dts-qcom-ipq6018-Add-remove-some-newlines.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 6db9ed9a128cbae1423d043f3debd8bfa77783fd Mon Sep 17 00:00:00 2001 -From: Konrad Dybcio -Date: Mon, 2 Jan 2023 10:46:29 +0100 -Subject: [PATCH] arm64: dts: qcom: ipq6018: Add/remove some newlines - -Some lines were broken very aggresively, presumably to fit under 80 chars -and some places could have used a newline, particularly between subsequent -nodes. Address all that and remove redundant comments near PCIe ranges -while at it so as not to exceed 100 chars needlessly. - -Signed-off-by: Konrad Dybcio -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230102094642.74254-5-konrad.dybcio@linaro.org ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 26 ++++++++++++-------------- - 1 file changed, 12 insertions(+), 14 deletions(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -102,26 +102,31 @@ - opp-microvolt = <725000>; - clock-latency-ns = <200000>; - }; -+ - opp-1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-microvolt = <787500>; - clock-latency-ns = <200000>; - }; -+ - opp-1320000000 { - opp-hz = /bits/ 64 <1320000000>; - opp-microvolt = <862500>; - clock-latency-ns = <200000>; - }; -+ - opp-1440000000 { - opp-hz = /bits/ 64 <1440000000>; - opp-microvolt = <925000>; - clock-latency-ns = <200000>; - }; -+ - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <987500>; - clock-latency-ns = <200000>; - }; -+ - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1062500>; -@@ -131,8 +136,7 @@ - - pmuv8: pmu { - compatible = "arm,cortex-a53-pmu"; -- interrupts = ; -+ interrupts = ; - }; - - psci: psci { -@@ -734,24 +738,18 @@ - phys = <&pcie_phy0>; - phy-names = "pciephy"; - -- ranges = <0x81000000 0 0x20200000 0 0x20200000 -- 0 0x10000>, /* downstream I/O */ -- <0x82000000 0 0x20220000 0 0x20220000 -- 0 0xfde0000>; /* non-prefetchable memory */ -+ ranges = <0x81000000 0 0x20200000 0 0x20200000 0 0x10000>, -+ <0x82000000 0 0x20220000 0 0x20220000 0 0xfde0000>; - - interrupts = ; - interrupt-names = "msi"; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0x7>; -- interrupt-map = <0 0 0 1 &intc 0 75 -- IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -- <0 0 0 2 &intc 0 78 -- IRQ_TYPE_LEVEL_HIGH>, /* int_b */ -- <0 0 0 3 &intc 0 79 -- IRQ_TYPE_LEVEL_HIGH>, /* int_c */ -- <0 0 0 4 &intc 0 83 -- IRQ_TYPE_LEVEL_HIGH>; /* int_d */ -+ interrupt-map = <0 0 0 1 &intc 0 75 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ -+ <0 0 0 2 &intc 0 78 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ -+ <0 0 0 3 &intc 0 79 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ -+ <0 0 0 4 &intc 0 83 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ - - clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>, - <&gcc GCC_PCIE0_AXI_M_CLK>, diff --git a/target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch b/target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch deleted file mode 100644 index 35aa46bb1..000000000 --- a/target/linux/qualcommax/patches-6.1/0036-v6.3-arm64-dts-qcom-ipq6018-Use-lowercase-hex.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 7356ae3e10abd1d71f06ff0b8a8e72aa7c955c57 Mon Sep 17 00:00:00 2001 -From: Konrad Dybcio -Date: Mon, 2 Jan 2023 10:46:30 +0100 -Subject: [PATCH] arm64: dts: qcom: ipq6018: Use lowercase hex - -One value escaped my previous lowercase hexification. Take care of it. - -Signed-off-by: Konrad Dybcio -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230102094642.74254-6-konrad.dybcio@linaro.org ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -381,7 +381,7 @@ - - usb2: usb@70f8800 { - compatible = "qcom,ipq6018-dwc3", "qcom,dwc3"; -- reg = <0x0 0x070F8800 0x0 0x400>; -+ reg = <0x0 0x070f8800 0x0 0x400>; - #address-cells = <2>; - #size-cells = <2>; - ranges; diff --git a/target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch b/target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch deleted file mode 100644 index c939d126b..000000000 --- a/target/linux/qualcommax/patches-6.1/0037-v6.3-arm64-dts-qcom-ipq6018-align-RPM-G-Link-node-with.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 679ee73bbee28cab441008f8cca38160cc8f3d05 Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Wed, 8 Feb 2023 11:15:39 +0100 -Subject: [PATCH] arm64: dts: qcom: ipq6018: align RPM G-Link node with - bindings - -Bindings expect (and most of DTS use) the RPM G-Link node name to be -"rpm-requests". - -Signed-off-by: Krzysztof Kozlowski -Reviewed-by: Dmitry Baryshkov -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230208101545.45711-1-krzysztof.kozlowski@linaro.org ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -176,7 +176,7 @@ - qcom,rpm-msg-ram = <&rpm_msg_ram>; - mboxes = <&apcs_glb 0>; - -- rpm_requests: glink-channel { -+ rpm_requests: rpm-requests { - compatible = "qcom,rpm-ipq6018"; - qcom,glink-channels = "rpm_requests"; - diff --git a/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch b/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch index d1280b528..ee25fe24c 100644 --- a/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch +++ b/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch @@ -24,40 +24,6 @@ Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++-- 2 files changed, 25 insertions(+), 5 deletions(-) ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -154,18 +154,28 @@ - no-map; - }; - -+ bootloader@4a100000 { -+ reg = <0x0 0x4a100000 0x0 0x400000>; -+ no-map; -+ }; -+ -+ sbl@4a500000 { -+ reg = <0x0 0x4a500000 0x0 0x100000>; -+ no-map; -+ }; -+ - tz: memory@4a600000 { -- reg = <0x0 0x4a600000 0x0 0x00400000>; -+ reg = <0x0 0x4a600000 0x0 0x400000>; - no-map; - }; - - smem_region: memory@4aa00000 { -- reg = <0x0 0x4aa00000 0x0 0x00100000>; -+ reg = <0x0 0x4aa00000 0x0 0x100000>; - no-map; - }; - - q6_region: memory@4ab00000 { -- reg = <0x0 0x4ab00000 0x0 0x05500000>; -+ reg = <0x0 0x4ab00000 0x0 0x5500000>; - no-map; - }; - }; --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -85,17 +85,27 @@ diff --git a/target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch b/target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch index 6dd185f6e..47378de31 100644 --- a/target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch +++ b/target/linux/qualcommax/patches-6.1/0040-v6.5-arm64-dts-qcom-enable-the-download-mode-support.patch @@ -15,16 +15,6 @@ Link: https://lore.kernel.org/r/20230526110653.27777-3-quic_viswanat@quicinc.com arch/arm64/boot/dts/qcom/ipq8074.dtsi | 6 ++++++ 2 files changed, 7 insertions(+) ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -90,6 +90,7 @@ - firmware { - scm { - compatible = "qcom,scm-ipq6018", "qcom,scm"; -+ qcom,dload-mode = <&tcsr 0x6100>; - }; - }; - --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -112,6 +112,7 @@ diff --git a/target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch b/target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch deleted file mode 100644 index e9b92b596..000000000 --- a/target/linux/qualcommax/patches-6.1/0041-v6.5-arm64-dts-qcom-ipq6018-correct-qrng-unit-address.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 085058786a7890dd44ec623fe5ac74db870f6b93 Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Wed, 19 Apr 2023 23:18:39 +0200 -Subject: [PATCH] arm64: dts: qcom: ipq6018: correct qrng unit address - -Match unit-address to reg entry to fix dtbs W=1 warnings: - - Warning (simple_bus_reg): /soc/qrng@e1000: simple-bus unit address format error, expected "e3000" - -Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes") -Signed-off-by: Krzysztof Kozlowski -Reviewed-by: Konrad Dybcio -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230419211856.79332-1-krzysztof.kozlowski@linaro.org ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -312,7 +312,7 @@ - status = "disabled"; - }; - -- prng: qrng@e1000 { -+ prng: qrng@e3000 { - compatible = "qcom,prng-ee"; - reg = <0x0 0x000e3000 0x0 0x1000>; - clocks = <&gcc GCC_PRNG_AHB_CLK>; diff --git a/target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch b/target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch deleted file mode 100644 index 821c9890c..000000000 --- a/target/linux/qualcommax/patches-6.1/0042-v6.5-arm64-dts-qcom-ipq6018-add-unit-address-to-soc-node.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 393595d4ffbd0a1fafd5548f8de1b8487a037cf2 Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Thu, 20 Apr 2023 08:36:04 +0200 -Subject: [PATCH] arm64: dts: qcom: ipq6018: add unit address to soc node - -"soc" node is supposed to have unit address: - - Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name - -Signed-off-by: Krzysztof Kozlowski -Reviewed-by: Konrad Dybcio -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230420063610.11068-1-krzysztof.kozlowski@linaro.org ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -209,7 +209,7 @@ - hwlocks = <&tcsr_mutex 3>; - }; - -- soc: soc { -+ soc: soc@0 { - #address-cells = <2>; - #size-cells = <2>; - ranges = <0 0 0 0 0x0 0xffffffff>; diff --git a/target/linux/qualcommax/patches-6.1/0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch b/target/linux/qualcommax/patches-6.1/0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch deleted file mode 100644 index 68895c5c9..000000000 --- a/target/linux/qualcommax/patches-6.1/0043-v6.5-arm64-dts-qcom-ipq6018-add-QFPROM-node.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 546f0617a22a481f3ca1f7e058aea0c40517c64e Mon Sep 17 00:00:00 2001 -From: Kathiravan T -Date: Fri, 26 May 2023 18:23:04 +0530 -Subject: [PATCH] arm64: dts: qcom: ipq6018: add QFPROM node - -IPQ6018 has efuse region to determine the various HW quirks. Lets -add the initial support and the individual fuses will be added as they -are required. - -Signed-off-by: Kathiravan T -Reviewed-by: Dmitry Baryshkov -Reviewed-by: Konrad Dybcio -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230526125305.19626-4-quic_kathirav@quicinc.com ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -312,6 +312,13 @@ - status = "disabled"; - }; - -+ qfprom: efuse@a4000 { -+ compatible = "qcom,ipq6018-qfprom", "qcom,qfprom"; -+ reg = <0x0 0x000a4000 0x0 0x2000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ }; -+ - prng: qrng@e3000 { - compatible = "qcom,prng-ee"; - reg = <0x0 0x000e3000 0x0 0x1000>; diff --git a/target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch b/target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch deleted file mode 100644 index b2057e588..000000000 --- a/target/linux/qualcommax/patches-6.1/0044-v6.5-arm64-dts-qcom-ipq6018-drop-incorrect-SPI-bus.patch +++ /dev/null @@ -1,37 +0,0 @@ -From b8420d478aa3fc739fcdba6b4b945850b356cb3b Mon Sep 17 00:00:00 2001 -From: Krzysztof Kozlowski -Date: Sun, 16 Apr 2023 14:37:25 +0200 -Subject: [PATCH] arm64: dts: qcom: ipq6018: drop incorrect SPI bus - spi-max-frequency - -The spi-max-frequency property belongs to SPI devices, not SPI -controller: - - ipq6018-cp01-c1.dtb: spi@78b5000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected) - -Signed-off-by: Krzysztof Kozlowski -Reviewed-by: Konrad Dybcio -Signed-off-by: Bjorn Andersson -Link: https://lore.kernel.org/r/20230416123730.300863-1-krzysztof.kozlowski@linaro.org ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 -- - 1 file changed, 2 deletions(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -458,7 +458,6 @@ - #size-cells = <0>; - reg = <0x0 0x078b5000 0x0 0x600>; - interrupts = ; -- spi-max-frequency = <50000000>; - clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; -@@ -473,7 +472,6 @@ - #size-cells = <0>; - reg = <0x0 0x078b6000 0x0 0x600>; - interrupts = ; -- spi-max-frequency = <50000000>; - clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; diff --git a/target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch b/target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch deleted file mode 100644 index 746a391b4..000000000 --- a/target/linux/qualcommax/patches-6.1/0051-v6.6-arm64-dts-qcom-Add-rpm-proc-node-for-GLINK.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 7e1acc8b92a3b67db1e5255adae2851d58d74434 Mon Sep 17 00:00:00 2001 -From: Stephan Gerhold -Date: Thu, 15 Jun 2023 18:50:44 +0200 -Subject: [PATCH] arm64: dts: qcom: Add rpm-proc node for GLINK gplatforms - -Rather than having the RPM GLINK channels as the only child of a dummy -top-level rpm-glink node, switch to representing the RPM as remoteproc -like all the other remoteprocs (modem DSP, ...). - -This allows assigning additional subdevices to it like the MPM -interrupt-controller or rpm-master-stats. - -Tested-by: Konrad Dybcio # SM6375 -Signed-off-by: Stephan Gerhold -Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-11-a07dcdefd918@gerhold.net -Signed-off-by: Bjorn Andersson ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 48 ++++---- - arch/arm64/boot/dts/qcom/ipq9574.dtsi | 28 +++-- - arch/arm64/boot/dts/qcom/msm8996.dtsi | 113 +++++++++---------- - arch/arm64/boot/dts/qcom/msm8998.dtsi | 102 ++++++++--------- - arch/arm64/boot/dts/qcom/qcm2290.dtsi | 126 ++++++++++----------- - arch/arm64/boot/dts/qcom/qcs404.dtsi | 152 +++++++++++++------------- - arch/arm64/boot/dts/qcom/sdm630.dtsi | 132 +++++++++++----------- - arch/arm64/boot/dts/qcom/sm6115.dtsi | 128 +++++++++++----------- - arch/arm64/boot/dts/qcom/sm6125.dtsi | 140 ++++++++++++------------ - arch/arm64/boot/dts/qcom/sm6375.dtsi | 126 ++++++++++----------- - 10 files changed, 566 insertions(+), 529 deletions(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -145,6 +145,32 @@ - method = "smc"; - }; - -+ rpm: remoteproc { -+ compatible = "qcom,ipq6018-rpm-proc", "qcom,rpm-proc"; -+ -+ glink-edge { -+ compatible = "qcom,glink-rpm"; -+ interrupts = ; -+ qcom,rpm-msg-ram = <&rpm_msg_ram>; -+ mboxes = <&apcs_glb 0>; -+ -+ rpm_requests: rpm-requests { -+ compatible = "qcom,rpm-ipq6018"; -+ qcom,glink-channels = "rpm_requests"; -+ -+ regulators { -+ compatible = "qcom,rpm-mp5496-regulators"; -+ -+ ipq6018_s2: s2 { -+ regulator-min-microvolt = <725000>; -+ regulator-max-microvolt = <1062500>; -+ regulator-always-on; -+ }; -+ }; -+ }; -+ }; -+ }; -+ - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; -@@ -181,28 +207,6 @@ - }; - }; - -- rpm-glink { -- compatible = "qcom,glink-rpm"; -- interrupts = ; -- qcom,rpm-msg-ram = <&rpm_msg_ram>; -- mboxes = <&apcs_glb 0>; -- -- rpm_requests: rpm-requests { -- compatible = "qcom,rpm-ipq6018"; -- qcom,glink-channels = "rpm_requests"; -- -- regulators { -- compatible = "qcom,rpm-mp5496-regulators"; -- -- ipq6018_s2: s2 { -- regulator-min-microvolt = <725000>; -- regulator-max-microvolt = <1062500>; -- regulator-always-on; -- }; -- }; -- }; -- }; -- - smem { - compatible = "qcom,smem"; - memory-region = <&smem_region>; diff --git a/target/linux/qualcommax/patches-6.1/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch b/target/linux/qualcommax/patches-6.1/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch deleted file mode 100644 index b70d7bf69..000000000 --- a/target/linux/qualcommax/patches-6.1/0052-v6.7-arm64-dts-qcom-ipq6018-include-the-GPLL0-as.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 0133c7af3aa0420778d106cb90db708cfa45f2c6 Mon Sep 17 00:00:00 2001 -From: Kathiravan Thirumoorthy -Date: Thu, 14 Sep 2023 12:29:59 +0530 -Subject: [PATCH] arm64: dts: qcom: ipq6018: include the GPLL0 as clock - provider for mailbox - -While the kernel is booting up, APSS clock / CPU clock will be running -at 800MHz with GPLL0 as source. Once the cpufreq driver is available, -APSS PLL will be configured to the rate based on the opp table and the -source also will be changed to APSS_PLL_EARLY. So allow the mailbox to -consume the GPLL0, with this inclusion, CPU Freq correctly reports that -CPU is running at 800MHz rather than 24MHz. - -Signed-off-by: Kathiravan Thirumoorthy -Reviewed-by: Konrad Dybcio -Link: https://lore.kernel.org/r/20230913-gpll_cleanup-v2-9-c8ceb1a37680@quicinc.com -[bjorn: Updated commit message, as requested by Kathiravan] -Signed-off-by: Bjorn Andersson ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -618,8 +618,8 @@ - compatible = "qcom,ipq6018-apcs-apps-global"; - reg = <0x0 0x0b111000 0x0 0x1000>; - #clock-cells = <1>; -- clocks = <&a53pll>, <&xo>; -- clock-names = "pll", "xo"; -+ clocks = <&a53pll>, <&xo>, <&gcc GPLL0>; -+ clock-names = "pll", "xo", "gpll0"; - #mbox-cells = <1>; - }; - diff --git a/target/linux/qualcommax/patches-6.1/0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch b/target/linux/qualcommax/patches-6.1/0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch deleted file mode 100644 index 1369a90a8..000000000 --- a/target/linux/qualcommax/patches-6.1/0054-v6.8-arm64-dts-qcom-ipq6018-use-CPUFreq-NVMEM.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 83afcf14edb9217e58837eb119da96d734a4b3b1 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Sat, 21 Oct 2023 14:00:07 +0200 -Subject: [PATCH] arm64: dts: qcom: ipq6018: use CPUFreq NVMEM - -IPQ6018 comes in multiple SKU-s and some of them dont support all of the -OPP-s that are current set, so lets utilize CPUFreq NVMEM to allow only -supported OPP-s based on the SoC dynamically. - -As an example, IPQ6018 is generaly rated at 1.8GHz but some silicon only -goes up to 1.5GHz and is marked as such via an eFuse. - -Signed-off-by: Robert Marko -Reviewed-by: Konrad Dybcio -Link: https://lore.kernel.org/r/20231021120048.231239-1-robimarko@gmail.com -Signed-off-by: Bjorn Andersson ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 14 +++++++++++++- - 1 file changed, 13 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -95,42 +95,49 @@ - }; - - cpu_opp_table: opp-table-cpu { -- compatible = "operating-points-v2"; -+ compatible = "operating-points-v2-kryo-cpu"; -+ nvmem-cells = <&cpu_speed_bin>; - opp-shared; - - opp-864000000 { - opp-hz = /bits/ 64 <864000000>; - opp-microvolt = <725000>; -+ opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - }; - - opp-1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-microvolt = <787500>; -+ opp-supported-hw = <0xf>; - clock-latency-ns = <200000>; - }; - - opp-1320000000 { - opp-hz = /bits/ 64 <1320000000>; - opp-microvolt = <862500>; -+ opp-supported-hw = <0x3>; - clock-latency-ns = <200000>; - }; - - opp-1440000000 { - opp-hz = /bits/ 64 <1440000000>; - opp-microvolt = <925000>; -+ opp-supported-hw = <0x3>; - clock-latency-ns = <200000>; - }; - - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <987500>; -+ opp-supported-hw = <0x1>; - clock-latency-ns = <200000>; - }; - - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1062500>; -+ opp-supported-hw = <0x1>; - clock-latency-ns = <200000>; - }; - }; -@@ -321,6 +328,11 @@ - reg = <0x0 0x000a4000 0x0 0x2000>; - #address-cells = <1>; - #size-cells = <1>; -+ -+ cpu_speed_bin: cpu-speed-bin@135 { -+ reg = <0x135 0x1>; -+ bits = <7 1>; -+ }; - }; - - prng: qrng@e3000 { diff --git a/target/linux/qualcommax/patches-6.1/0105-arm64-dts-qcom-ipq6018-add-pwm-node.patch b/target/linux/qualcommax/patches-6.1/0105-arm64-dts-qcom-ipq6018-add-pwm-node.patch deleted file mode 100644 index 66b41b835..000000000 --- a/target/linux/qualcommax/patches-6.1/0105-arm64-dts-qcom-ipq6018-add-pwm-node.patch +++ /dev/null @@ -1,45 +0,0 @@ -From b4a32d218d424b81a58fbd419e1114b1c1f76168 Mon Sep 17 00:00:00 2001 -From: Devi Priya -Date: Thu, 5 Oct 2023 21:35:50 +0530 -Subject: [PATCH] pwm: driver for qualcomm ipq6018 pwm block - -Describe the PWM block on IPQ6018. - -The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add -&pwm as child of &tcsr. - -Add also ipq6018 specific compatible string. - -Reviewed-by: Krzysztof Kozlowski -Co-developed-by: Baruch Siach -Signed-off-by: Baruch Siach -Signed-off-by: Devi Priya ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++- - 1 file changed, 14 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -409,8 +409,21 @@ - }; - - tcsr: syscon@1937000 { -- compatible = "qcom,tcsr-ipq6018", "syscon"; -+ compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; - reg = <0x0 0x01937000 0x0 0x21000>; -+ ranges = <0x0 0x0 0x01937000 0x21000>; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ -+ pwm: pwm@a010 { -+ compatible = "qcom,ipq6018-pwm"; -+ reg = <0xa010 0x20>; -+ clocks = <&gcc GCC_ADSS_PWM_CLK>; -+ assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; -+ assigned-clock-rates = <100000000>; -+ #pwm-cells = <2>; -+ status = "disabled"; -+ }; - }; - - usb2: usb@70f8800 { diff --git a/target/linux/qualcommax/patches-6.1/0109-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch b/target/linux/qualcommax/patches-6.1/0109-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch deleted file mode 100644 index 0c958f0b5..000000000 --- a/target/linux/qualcommax/patches-6.1/0109-arm64-dts-ipq6018-Add-remaining-QUP-UART-node.patch +++ /dev/null @@ -1,66 +0,0 @@ ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -471,6 +471,26 @@ - qcom,ee = <0>; - }; - -+ blsp1_uart1: serial@78af000 { -+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; -+ reg = <0x0 0x78af000 0x0 0x200>; -+ interrupts = ; -+ clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, -+ <&gcc GCC_BLSP1_AHB_CLK>; -+ clock-names = "core", "iface"; -+ status = "disabled"; -+ }; -+ -+ blsp1_uart2: serial@78b0000 { -+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; -+ reg = <0x0 0x78b0000 0x0 0x200>; -+ interrupts = ; -+ clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, -+ <&gcc GCC_BLSP1_AHB_CLK>; -+ clock-names = "core", "iface"; -+ status = "disabled"; -+ }; -+ - blsp1_uart3: serial@78b1000 { - compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x0 0x078b1000 0x0 0x200>; -@@ -479,6 +499,36 @@ - <&gcc GCC_BLSP1_AHB_CLK>; - clock-names = "core", "iface"; - status = "disabled"; -+ }; -+ -+ blsp1_uart4: serial@78b2000 { -+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; -+ reg = <0x0 0x078b2000 0x0 0x200>; -+ interrupts = ; -+ clocks = <&gcc GCC_BLSP1_UART4_APPS_CLK>, -+ <&gcc GCC_BLSP1_AHB_CLK>; -+ clock-names = "core", "iface"; -+ status = "disabled"; -+ }; -+ -+ blsp1_uart5: serial@78b3000 { -+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; -+ reg = <0x0 0x78b3000 0x0 0x200>; -+ interrupts = ; -+ clocks = <&gcc GCC_BLSP1_UART5_APPS_CLK>, -+ <&gcc GCC_BLSP1_AHB_CLK>; -+ clock-names = "core", "iface"; -+ status = "disabled"; -+ }; -+ -+ blsp1_uart6: serial@78b4000 { -+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; -+ reg = <0x0 0x078b4000 0x0 0x200>; -+ interrupts = ; -+ clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>, -+ <&gcc GCC_BLSP1_AHB_CLK>; -+ clock-names = "core", "iface"; -+ status = "disabled"; - }; - - blsp1_spi1: spi@78b5000 { diff --git a/target/linux/qualcommax/patches-6.1/0132-ipq6018-rproc-Add-non-secure-Q6-bringup-sequence.patch b/target/linux/qualcommax/patches-6.1/0132-ipq6018-rproc-Add-non-secure-Q6-bringup-sequence.patch index b771c160c..c72d50f3d 100644 --- a/target/linux/qualcommax/patches-6.1/0132-ipq6018-rproc-Add-non-secure-Q6-bringup-sequence.patch +++ b/target/linux/qualcommax/patches-6.1/0132-ipq6018-rproc-Add-non-secure-Q6-bringup-sequence.patch @@ -12,35 +12,6 @@ Signed-off-by: Manikanta Mylavarapu drivers/remoteproc/qcom_q6v5_wcss.c | 235 +++++++++++++++++++++++--- 2 files changed, 232 insertions(+), 23 deletions(-) ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -789,8 +789,24 @@ - "wcss_reset", - "wcss_q6_reset"; - -- clocks = <&gcc GCC_PRNG_AHB_CLK>; -- clock-names = "prng"; -+ clocks = <&gcc GCC_PRNG_AHB_CLK>, -+ <&gcc GCC_SYS_NOC_WCSS_AHB_CLK>, -+ <&gcc GCC_Q6SS_ATBM_CLK>, -+ <&gcc GCC_Q6SS_PCLKDBG_CLK>, -+ <&gcc GCC_Q6_TSCTR_1TO2_CLK>; -+ clock-names = "prng", -+ "gcc_sys_noc_wcss_ahb_clk", -+ "gcc_q6ss_atbm_clk", -+ "gcc_q6ss_pclkdbg_clk", -+ "gcc_q6_tsctr_1to2_clk"; -+ assigned-clocks = <&gcc GCC_SYS_NOC_WCSS_AHB_CLK>, -+ <&gcc GCC_Q6SS_PCLKDBG_CLK>, -+ <&gcc GCC_Q6_TSCTR_1TO2_CLK>, -+ <&gcc GCC_Q6SS_ATBM_CLK>; -+ assigned-clock-rates = <133333333>, -+ <600000000>, -+ <600000000>, -+ <240000000>; - - qcom,halt-regs = <&tcsr 0x18000 0x1b000 0xe000>; - --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -12,6 +12,7 @@ diff --git a/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-Add-WLAN-node.patch b/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-Add-WLAN-node.patch deleted file mode 100644 index 8b127cff4..000000000 --- a/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-Add-WLAN-node.patch +++ /dev/null @@ -1,122 +0,0 @@ ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -764,6 +764,119 @@ - }; - }; - -+ wifi: wifi@c000000 { -+ compatible = "qcom,ipq6018-wifi"; -+ reg = <0x0 0xc000000 0x0 0x1000000>; -+ -+ interrupts = <0 320 IRQ_TYPE_EDGE_RISING>, -+ <0 319 IRQ_TYPE_EDGE_RISING>, -+ <0 318 IRQ_TYPE_EDGE_RISING>, -+ <0 316 IRQ_TYPE_EDGE_RISING>, -+ <0 315 IRQ_TYPE_EDGE_RISING>, -+ <0 314 IRQ_TYPE_EDGE_RISING>, -+ <0 311 IRQ_TYPE_EDGE_RISING>, -+ <0 310 IRQ_TYPE_EDGE_RISING>, -+ <0 411 IRQ_TYPE_EDGE_RISING>, -+ <0 410 IRQ_TYPE_EDGE_RISING>, -+ <0 40 IRQ_TYPE_EDGE_RISING>, -+ <0 39 IRQ_TYPE_EDGE_RISING>, -+ <0 302 IRQ_TYPE_EDGE_RISING>, -+ <0 301 IRQ_TYPE_EDGE_RISING>, -+ <0 37 IRQ_TYPE_EDGE_RISING>, -+ <0 36 IRQ_TYPE_EDGE_RISING>, -+ <0 296 IRQ_TYPE_EDGE_RISING>, -+ <0 295 IRQ_TYPE_EDGE_RISING>, -+ <0 294 IRQ_TYPE_EDGE_RISING>, -+ <0 293 IRQ_TYPE_EDGE_RISING>, -+ <0 292 IRQ_TYPE_EDGE_RISING>, -+ <0 291 IRQ_TYPE_EDGE_RISING>, -+ <0 290 IRQ_TYPE_EDGE_RISING>, -+ <0 289 IRQ_TYPE_EDGE_RISING>, -+ <0 288 IRQ_TYPE_EDGE_RISING>, -+ <0 239 IRQ_TYPE_EDGE_RISING>, -+ <0 236 IRQ_TYPE_EDGE_RISING>, -+ <0 235 IRQ_TYPE_EDGE_RISING>, -+ <0 234 IRQ_TYPE_EDGE_RISING>, -+ <0 233 IRQ_TYPE_EDGE_RISING>, -+ <0 232 IRQ_TYPE_EDGE_RISING>, -+ <0 231 IRQ_TYPE_EDGE_RISING>, -+ <0 230 IRQ_TYPE_EDGE_RISING>, -+ <0 229 IRQ_TYPE_EDGE_RISING>, -+ <0 228 IRQ_TYPE_EDGE_RISING>, -+ <0 224 IRQ_TYPE_EDGE_RISING>, -+ <0 223 IRQ_TYPE_EDGE_RISING>, -+ <0 203 IRQ_TYPE_EDGE_RISING>, -+ <0 183 IRQ_TYPE_EDGE_RISING>, -+ <0 180 IRQ_TYPE_EDGE_RISING>, -+ <0 179 IRQ_TYPE_EDGE_RISING>, -+ <0 178 IRQ_TYPE_EDGE_RISING>, -+ <0 177 IRQ_TYPE_EDGE_RISING>, -+ <0 176 IRQ_TYPE_EDGE_RISING>, -+ <0 163 IRQ_TYPE_EDGE_RISING>, -+ <0 162 IRQ_TYPE_EDGE_RISING>, -+ <0 160 IRQ_TYPE_EDGE_RISING>, -+ <0 414 IRQ_TYPE_EDGE_RISING>, -+ <0 159 IRQ_TYPE_EDGE_RISING>, -+ <0 158 IRQ_TYPE_EDGE_RISING>, -+ <0 157 IRQ_TYPE_EDGE_RISING>, -+ <0 156 IRQ_TYPE_EDGE_RISING>; -+ -+ interrupt-names = "misc-pulse1", -+ "misc-latch", -+ "sw-exception", -+ "ce0", -+ "ce1", -+ "ce2", -+ "ce3", -+ "ce4", -+ "ce5", -+ "ce6", -+ "ce7", -+ "ce8", -+ "ce9", -+ "ce10", -+ "ce11", -+ "host2wbm-desc-feed", -+ "host2reo-re-injection", -+ "host2reo-command", -+ "host2rxdma-monitor-ring3", -+ "host2rxdma-monitor-ring2", -+ "host2rxdma-monitor-ring1", -+ "reo2ost-exception", -+ "wbm2host-rx-release", -+ "reo2host-status", -+ "reo2host-destination-ring4", -+ "reo2host-destination-ring3", -+ "reo2host-destination-ring2", -+ "reo2host-destination-ring1", -+ "rxdma2host-monitor-destination-mac3", -+ "rxdma2host-monitor-destination-mac2", -+ "rxdma2host-monitor-destination-mac1", -+ "ppdu-end-interrupts-mac3", -+ "ppdu-end-interrupts-mac2", -+ "ppdu-end-interrupts-mac1", -+ "rxdma2host-monitor-status-ring-mac3", -+ "rxdma2host-monitor-status-ring-mac2", -+ "rxdma2host-monitor-status-ring-mac1", -+ "host2rxdma-host-buf-ring-mac3", -+ "host2rxdma-host-buf-ring-mac2", -+ "host2rxdma-host-buf-ring-mac1", -+ "rxdma2host-destination-ring-mac3", -+ "rxdma2host-destination-ring-mac2", -+ "rxdma2host-destination-ring-mac1", -+ "host2tcl-input-ring4", -+ "host2tcl-input-ring3", -+ "host2tcl-input-ring2", -+ "host2tcl-input-ring1", -+ "wbm2host-tx-completions-ring4", -+ "wbm2host-tx-completions-ring3", -+ "wbm2host-tx-completions-ring2", -+ "wbm2host-tx-completions-ring1", -+ "tcl2host-status-ring"; -+ qcom,rproc = <&q6v5_wcss>; -+ status = "disabled"; -+ }; -+ - q6v5_wcss: remoteproc@cd00000 { - compatible = "qcom,ipq6018-wcss-pil"; - reg = <0x0 0x0cd00000 0x0 0x4040>, diff --git a/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch b/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch deleted file mode 100644 index b6790f02e..000000000 --- a/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -212,6 +212,21 @@ - reg = <0x0 0x4ab00000 0x0 0x5500000>; - no-map; - }; -+ -+ nss_region: nss@40000000 { -+ no-map; -+ reg = <0x0 0x40000000 0x0 0x01000000>; -+ }; -+ -+ q6_etr_region: q6_etr_dump@50000000 { -+ reg = <0x0 0x50000000 0x0 0x100000>; -+ no-map; -+ }; -+ -+ m3_dump_region: m3_dump@50100000 { -+ reg = <0x0 0x50100000 0x0 0x100000>; -+ no-map; -+ }; - }; - - smem { diff --git a/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch b/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch deleted file mode 100644 index 8a2ed48d0..000000000 --- a/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -476,6 +476,26 @@ - }; - }; - -+ sdhc: mmc@7804000 { -+ compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5"; -+ reg = <0x0 0x7804000 0x0 0x1000>, -+ <0x0 0x7805000 0x0 0x1000>; -+ reg-names = "hc", "cqhci"; -+ -+ interrupts = , -+ ; -+ interrupt-names = "hc_irq", "pwr_irq"; -+ -+ clocks = <&gcc GCC_SDCC1_AHB_CLK>, -+ <&gcc GCC_SDCC1_APPS_CLK>, -+ <&xo>; -+ clock-names = "iface", "core", "xo"; -+ resets = <&gcc GCC_SDCC1_BCR>; -+ max-frequency = <192000000>; -+ -+ status = "disabled"; -+ }; -+ - blsp_dma: dma-controller@7884000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x0 0x07884000 0x0 0x2b000>; diff --git a/target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch b/target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch deleted file mode 100644 index 14d0c3044..000000000 --- a/target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch +++ /dev/null @@ -1,146 +0,0 @@ -From d2e727bd0a259de2d6d329e3c659b8a1b6fbbc8b Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Sun, 15 Oct 2023 22:55:43 +0200 -Subject: [PATCH] arm64: dts: qcom: ipq6018: add thermal nodes - -IPQ6018 has a tsens v2.3.1 peripheral which monitors temperatures around -the various subsystems on the die. - -Signed-off-by: Robert Marko ---- - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 117 ++++++++++++++++++++++++++ - 1 file changed, 117 insertions(+) - ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -357,6 +357,16 @@ - clock-names = "core"; - }; - -+ tsens: thermal-sensor@4a9000 { -+ compatible = "qcom,ipq6018-tsens", "qcom,ipq8074-tsens"; -+ reg = <0x0 0x4a9000 0x0 0x1000>, /* TM */ -+ <0x0 0x4a8000 0x0 0x1000>; /* SROT */ -+ interrupts = ; -+ interrupt-names = "combined"; -+ #qcom,sensors = <16>; -+ #thermal-sensor-cells = <1>; -+ }; -+ - cryptobam: dma-controller@704000 { - compatible = "qcom,bam-v1.7.0"; - reg = <0x0 0x00704000 0x0 0x20000>; -@@ -1042,6 +1052,113 @@ - }; - }; - -+ thermal-zones { -+ nss-top-thermal { -+ polling-delay-passive = <250>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&tsens 4>; -+ -+ trips { -+ nss-top-crit { -+ temperature = <110000>; -+ hysteresis = <1000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ nss0-thermal { -+ polling-delay-passive = <250>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&tsens 5>; -+ -+ trips { -+ nss-0-crit { -+ temperature = <110000>; -+ hysteresis = <1000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ wcss-phya0-thermal { -+ polling-delay-passive = <250>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&tsens 7>; -+ -+ trips { -+ wcss-phya0-crit { -+ temperature = <110000>; -+ hysteresis = <1000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ wcss-phya1-thermal { -+ polling-delay-passive = <250>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&tsens 8>; -+ -+ trips { -+ wcss-phya1-crit { -+ temperature = <110000>; -+ hysteresis = <1000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ cluster_thermal: cluster-thermal { -+ polling-delay-passive = <250>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&tsens 13>; -+ -+ trips { -+ cluster-crit { -+ temperature = <110000>; -+ hysteresis = <1000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ lpass-qsdp6-thermal { -+ polling-delay-passive = <250>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&tsens 14>; -+ -+ trips { -+ lpass-qsdp6-crit { -+ temperature = <110000>; -+ hysteresis = <1000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ -+ package-top-thermal { -+ polling-delay-passive = <250>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&tsens 15>; -+ -+ trips { -+ package-top-crit { -+ temperature = <110000>; -+ hysteresis = <1000>; -+ type = "critical"; -+ }; -+ }; -+ }; -+ }; -+ - timer { - compatible = "arm,armv8-timer"; - interrupts = , diff --git a/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch b/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch index 667fdce2c..9f7801ff4 100644 --- a/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch +++ b/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch @@ -1,82 +1,3 @@ ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -42,7 +42,6 @@ - clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; - clock-names = "cpu"; - operating-points-v2 = <&cpu_opp_table>; -- cpu-supply = <&ipq6018_s2>; - }; - - CPU1: cpu@1 { -@@ -54,7 +53,6 @@ - clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; - clock-names = "cpu"; - operating-points-v2 = <&cpu_opp_table>; -- cpu-supply = <&ipq6018_s2>; - }; - - CPU2: cpu@2 { -@@ -66,7 +64,6 @@ - clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; - clock-names = "cpu"; - operating-points-v2 = <&cpu_opp_table>; -- cpu-supply = <&ipq6018_s2>; - }; - - CPU3: cpu@3 { -@@ -78,7 +75,6 @@ - clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; - clock-names = "cpu"; - operating-points-v2 = <&cpu_opp_table>; -- cpu-supply = <&ipq6018_s2>; - }; - - L2_0: l2-cache { -@@ -113,6 +109,13 @@ - clock-latency-ns = <200000>; - }; - -+ opp-1200000000 { -+ opp-hz = /bits/ 64 <1200000000>; -+ opp-microvolt = <850000>; -+ opp-supported-hw = <0x4>; -+ clock-latency-ns = <200000>; -+ }; -+ - opp-1320000000 { - opp-hz = /bits/ 64 <1320000000>; - opp-microvolt = <862500>; -@@ -127,6 +130,13 @@ - clock-latency-ns = <200000>; - }; - -+ opp-1512000000 { -+ opp-hz = /bits/ 64 <1512000000>; -+ opp-microvolt = <937500>; -+ opp-supported-hw = <0x2>; -+ clock-latency-ns = <200000>; -+ }; -+ - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <987500>; -@@ -164,16 +174,6 @@ - rpm_requests: rpm-requests { - compatible = "qcom,rpm-ipq6018"; - qcom,glink-channels = "rpm_requests"; -- -- regulators { -- compatible = "qcom,rpm-mp5496-regulators"; -- -- ipq6018_s2: s2 { -- regulator-min-microvolt = <725000>; -- regulator-max-microvolt = <1062500>; -- regulator-always-on; -- }; -- }; - }; - }; - }; --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi @@ -0,0 +1,39 @@ diff --git a/target/linux/qualcommax/patches-6.1/0903-arm64-dts-ipq6018-add-label-to-clocks.patch b/target/linux/qualcommax/patches-6.1/0903-arm64-dts-ipq6018-add-label-to-clocks.patch deleted file mode 100644 index 75c45a2ce..000000000 --- a/target/linux/qualcommax/patches-6.1/0903-arm64-dts-ipq6018-add-label-to-clocks.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -15,7 +15,7 @@ - #size-cells = <2>; - interrupt-parent = <&intc>; - -- clocks { -+ clocks: clocks { - sleep_clk: sleep-clk { - compatible = "fixed-clock"; - clock-frequency = <32000>;