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kernel: bump 6.12 to 6.12.16

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coolsnowwolf 2025-02-25 14:12:02 +08:00
parent b32c0de796
commit 6fbd06a3a0
2 changed files with 2 additions and 30 deletions
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4
include/kernel-6.12
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@ -1,2 +1,2 @@
LINUX_VERSION-6.12 = .12
LINUX_KERNEL_HASH-6.12.12 = e98942d17ef7063b3f2d6d7692bf24899e2e021cf832d19b55308ec8e8e08eff
LINUX_VERSION-6.12 = .16
LINUX_KERNEL_HASH-6.12.16 = 5f81362a694f51520bff9faecb73f1cc9bc7bece6fdd10d5c27e348df39d7dc4

28
target/linux/rockchip/patches-6.12/220-phy-rockchip-naneng-combphy-fix-phy-reset.patch
View File

@ -1,31 +1,3 @@
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -264,6 +264,7 @@
assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>;
assigned-clock-rates = <100000000>;
resets = <&cru SRST_PIPEPHY0>;
+ reset-names = "phy";
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf0>;
#phy-cells = <1>;
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1775,6 +1775,7 @@
assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>;
assigned-clock-rates = <100000000>;
resets = <&cru SRST_PIPEPHY1>;
+ reset-names = "phy";
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf1>;
#phy-cells = <1>;
@@ -1791,6 +1792,7 @@
assigned-clocks = <&pmucru CLK_PCIEPHY2_REF>;
assigned-clock-rates = <100000000>;
resets = <&cru SRST_PIPEPHY2>;
+ reset-names = "phy";
rockchip,pipe-grf = <&pipegrf>;
rockchip,pipe-phy-grf = <&pipe_phy_grf2>;
#phy-cells = <1>;
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
@@ -324,7 +324,10 @@ static int rockchip_combphy_parse_dt(str