mirror of
https://github.com/coolsnowwolf/lede.git
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ipq60xx: add GL.iNet GL-AX1800 support
This commit is contained in:
parent
e4dedaf402
commit
6c52d1ded1
@ -0,0 +1,51 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ipq6000-glinet.dtsi"
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/ {
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model = "GL.iNet GL-AX1800";
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compatible = "glinet,gl-ax1800", "qcom,ipq6018";
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aliases {
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ethernet0 = &dp1;
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ethernet1 = &dp2;
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label-mac-device = &dp1;
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};
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};
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&switch {
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switch_lan_bmp = <0x3c>; /* lan port bitmap */
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switch_wan_bmp = <0x02>; /* wan port bitmap */
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};
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&dp1 {
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status = "okay";
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phy-handle = <&qca8075_0>;
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label = "wan";
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};
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&dp2 {
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status = "okay";
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phy-handle = <&qca8075_1>;
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label = "lan1";
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};
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&dp3 {
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status = "okay";
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phy-handle = <&qca8075_2>;
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label = "lan2";
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};
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&dp4 {
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status = "okay";
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phy-handle = <&qca8075_3>;
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label = "lan3";
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};
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&dp5 {
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status = "okay";
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phy-handle = <&qca8075_4>;
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label = "lan4";
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};
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@ -0,0 +1,117 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ipq6000-glinet.dtsi"
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/ {
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model = "GL.iNet GL-AXT1800";
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compatible = "glinet,gl-axt1800", "qcom,ipq6018";
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aliases {
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ethernet0 = &dp1;
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ethernet1 = &dp3;
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label-mac-device = &dp1;
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};
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vcc_sd: regulator-vcc-sd {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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vcc_fan: regulator-vcc-fan {
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compatible = "regulator-fixed";
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regulator-name = "vcc_fan";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&tlmm 29 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-boot-on;
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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fan-supply = <&vcc_fan>;
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pwms = <&pwm 1 40000 0>;
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pinctrl-0 = <&fan_pins>;
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pinctrl-names = "default";
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cooling-levels = <36 128 192 255>;
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#cooling-cells = <2>;
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};
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};
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&tlmm {
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fan_pins: fan-pins {
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speed {
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pins = "gpio31";
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function = "gpio";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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pwm_pins: pwm-pins {
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pwm {
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pins = "gpio30";
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function = "pwm13";
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drive-strength = <8>;
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};
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};
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sd_pins: sd-pins {
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sd {
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pins = "gpio62";
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function = "sd_card";
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bias-pull-up;
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};
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ldo {
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pins = "gpio66";
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function = "gpio";
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bias-pull-up;
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};
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};
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};
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&pwm {
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pinctrl-0 = <&pwm_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&sdhc {
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mmc-ddr-1_8v;
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bus-width = <4>;
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cd-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&sd_pins>;
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pinctrl-names = "default";
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vqmmc-supply = <&vcc_sd>;
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status = "okay";
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};
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&switch {
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switch_lan_bmp = <0x0c>; /* lan port bitmap */
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switch_wan_bmp = <0x02>; /* wan port bitmap */
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};
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&dp1 {
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status = "okay";
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phy-handle = <&qca8075_0>;
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label = "wan";
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};
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&dp2 {
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status = "okay";
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phy-handle = <&qca8075_1>;
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label = "lan2";
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};
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&dp3 {
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status = "okay";
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phy-handle = <&qca8075_2>;
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label = "lan1";
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};
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@ -0,0 +1,231 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ipq6018-512m.dtsi"
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#include "ipq6018-ess.dtsi"
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#include "ipq6000-opp.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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led-boot = &led_run;
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led-failsafe = &led_run;
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led-running = &led_run;
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led-upgrade = &led_run;
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serial0 = &blsp1_uart3;
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serial1 = &blsp1_uart4;
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serial2 = &blsp1_uart5;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs-append = " root=/dev/ubiblock0_1";
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};
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keys {
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compatible = "gpio-keys";
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switch {
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label = "switch";
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
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};
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_run: run {
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label = "blue:run";
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gpio = <&tlmm 37 GPIO_ACTIVE_HIGH>;
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};
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system {
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label = "white:system";
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gpio = <&tlmm 35 GPIO_ACTIVE_HIGH>;
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};
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};
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reg_usb_vbus: regulator-usb-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&tlmm 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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};
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};
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&tlmm {
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mdio_pins: mdio-pins {
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mdc {
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pins = "gpio64";
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function = "mdc";
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drive-strength = <8>;
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bias-pull-up;
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};
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mdio {
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pins = "gpio65";
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function = "mdio";
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drive-strength = <8>;
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bias-pull-up;
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};
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};
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tluart_pins: tluart-pins {
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mux {
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pins = "gpio75", "gpio76";
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function = "blsp3_uart";
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drive-strength = <8>;
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bias-disable;
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};
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};
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hsuart_pins: hsuart-pins {
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mux {
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pins = "gpio57", "gpio58";
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function = "blsp4_uart";
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drive-strength = <8>;
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bias-disable;
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};
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};
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};
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&blsp1_uart3 {
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pinctrl-0 = <&serial_3_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&blsp1_uart4 {
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pinctrl-0 = <&tluart_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&blsp1_uart5 {
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pinctrl-0 = <&hsuart_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&qpic_bam {
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status = "okay";
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};
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&qpic_nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <8>;
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partitions {
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compatible = "qcom,smem-part";
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};
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};
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};
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&qusb_phy_0 {
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status = "okay";
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};
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&ssphy_0 {
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status = "okay";
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};
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&usb3 {
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vbus-supply = <®_usb_vbus>;
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status = "okay";
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};
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&rpm {
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status = "disabled";
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};
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&mdio {
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status = "okay";
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pinctrl-0 = <&mdio_pins>;
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pinctrl-names = "default";
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reset-gpios = <&tlmm 74 GPIO_ACTIVE_LOW>;
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qca8075_0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0>;
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};
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qca8075_1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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};
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qca8075_2: ethernet-phy@2 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <2>;
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};
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qca8075_3: ethernet-phy@3 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <3>;
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};
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qca8075_4: ethernet-phy@4 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <4>;
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};
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};
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&switch {
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status = "okay";
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switch_cpu_bmp = <0x1>; /* cpu port bitmap */
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switch_mac_mode = <0x0>; /* mac mode for uniphy 0*/
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switch_mac_mode1 = <0xff>; /* mac mode for uniphy 1*/
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switch_mac_mode2 = <0xff>; /* mac mode for uniphy 2*/
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qcom,port_phyinfo {
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port@0 {
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port_id = <1>;
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phy_address = <0>;
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};
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port@1 {
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port_id = <2>;
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phy_address = <1>;
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};
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port@2 {
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port_id = <3>;
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phy_address = <2>;
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};
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port@3 {
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port_id = <4>;
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phy_address = <3>;
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};
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port@4 {
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port_id = <5>;
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phy_address = <4>;
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};
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};
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};
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&edma {
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status = "okay";
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};
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&wifi {
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status = "okay";
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qcom,ath11k-fw-memory-mode = <1>;
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};
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@ -17,6 +17,32 @@ define Device/UbiFit
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IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
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endef
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define Device/glinet_gl-ax1800
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$(call Device/FitImage)
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$(call Device/UbiFit)
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DEVICE_VENDOR := GL.iNet
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DEVICE_MODEL := GL-AX1800
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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DEVICE_DTS_CONFIG := config@cp03-c1
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SOC := ipq6000
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DEVICE_PACKAGES := ipq-wifi-glinet_gl-ax1800
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endef
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TARGET_DEVICES += glinet_gl-ax1800
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define Device/glinet_gl-axt1800
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$(call Device/FitImage)
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$(call Device/UbiFit)
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DEVICE_VENDOR := GL.iNet
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DEVICE_MODEL := GL-AXT1800
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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DEVICE_DTS_CONFIG := config@cp03-c1
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SOC := ipq6000
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DEVICE_PACKAGES := ipq-wifi-glinet_gl-axt1800 kmod-hwmon-gpiofan
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endef
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TARGET_DEVICES += glinet_gl-axt1800
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define Device/linksys_mr7350
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$(call Device/FitImage)
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DEVICE_VENDOR := Linksys
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@ -11,9 +11,13 @@ ipq60xx_setup_interfaces()
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local board="$1"
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case "$board" in
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glinet,gl-ax1800|\
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linksys,mr7350)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
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;;
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glinet,gl-axt1800)
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ucidef_set_interfaces_lan_wan "lan1 lan2" "wan"
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;;
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qihoo,360v6|\
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xiaomi,rm1800)
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ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan"
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@ -9,6 +9,8 @@ board=$(board_name)
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case "$FIRMWARE" in
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"ath11k/IPQ6018/hw1.0/cal-ahb-c000000.wifi.bin")
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case "$board" in
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glinet,gl-ax1800|\
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glinet,gl-axt1800|\
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linksys,mr7350|\
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qihoo,360v6)
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caldata_extract "0:art" 0x1000 0x20000
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@ -10,6 +10,11 @@ PHYNBR=${DEVPATH##*/phy}
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board=$(board_name)
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case "$board" in
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glinet,gl-ax1800|\
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glinet,gl-axt1800)
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[ "$PHYNBR" = "0" ] && macaddr_add $(get_mac_label) 3 > /sys${DEVPATH}/macaddress
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[ "$PHYNBR" = "1" ] && macaddr_add $(get_mac_label) 2 > /sys${DEVPATH}/macaddress
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;;
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linksys,mr7350)
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addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
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[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
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@ -10,6 +10,10 @@ platform_check_image() {
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platform_do_upgrade() {
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case "$(board_name)" in
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glinet,gl-ax1800|\
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glinet,gl-axt1800)
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nand_do_upgrade "$1"
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;;
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linksys,mr7350)
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boot_part="$(fw_printenv -n boot_part)"
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if [ "$boot_part" -eq "1" ]; then
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@ -0,0 +1,20 @@
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--- a/drivers/mtd/nand/raw/internals.h
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+++ b/drivers/mtd/nand/raw/internals.h
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@@ -18,6 +18,7 @@
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*/
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#define NAND_MFR_AMD 0x01
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#define NAND_MFR_ATO 0x9b
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+#define NAND_MFR_DOSILICON 0xf8
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#define NAND_MFR_EON 0x92
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#define NAND_MFR_ESMT 0xc8
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#define NAND_MFR_FUJITSU 0x04
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--- a/drivers/mtd/nand/raw/nand_ids.c
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+++ b/drivers/mtd/nand/raw/nand_ids.c
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@@ -178,6 +178,7 @@ struct nand_flash_dev nand_flash_ids[] =
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static const struct nand_manufacturer_desc nand_manufacturer_descs[] = {
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{NAND_MFR_AMD, "AMD/Spansion", &amd_nand_manuf_ops},
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{NAND_MFR_ATO, "ATO"},
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+ {NAND_MFR_DOSILICON, "Dosilicon"},
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{NAND_MFR_EON, "Eon"},
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{NAND_MFR_ESMT, "ESMT", &esmt_nand_manuf_ops},
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{NAND_MFR_FUJITSU, "Fujitsu"},
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