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qualcommax: ipq6018-ess: Add dp5-syn node

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coolsnowwolf 2025-05-27 17:58:31 +08:00
parent ccbeeff256
commit 68aeaffef5
1 changed files with 441 additions and 418 deletions
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113
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-ess.dtsi
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@ -1,28 +1,50 @@
// SPDX-License-Identifier: GPL-2.0-only #include <dt-bindings/net/qcom-ipq-ess.h>
&clocks {
bias_pll_cc_clk {
compatible = "fixed-clock";
clock-frequency = <300000000>;
#clock-cells = <0>;
};
bias_pll_nss_noc_clk {
compatible = "fixed-clock";
clock-frequency = <416500000>;
#clock-cells = <0>;
};
};
&soc { &soc {
bias_pll_cc_clk: bias-pll-cc-clk {
compatible = "fixed-clock";
clock-frequency = <300000000>;
clock-output-names = "bias_pll_cc_clk";
#clock-cells = <0>;
};
bias_pll_nss_noc_clk: bias-pll-nss-noc-clk {
compatible = "fixed-clock";
clock-frequency = <416500000>;
clock-output-names = "bias_pll_nss_noc_clk";
#clock-cells = <0>;
};
edma: edma@3ab00000 {
compatible = "qcom,edma";
reg = <0x0 0x3ab00000 0x0 0xabe00>;
reg-names = "edma-reg-base";
qcom,txdesc-ring-start = <23>;
qcom,txdesc-rings = <1>;
qcom,txcmpl-ring-start = <23>;
qcom,txcmpl-rings = <1>;
qcom,rxfill-ring-start = <7>;
qcom,rxfill-rings = <1>;
qcom,rxdesc-ring-start = <15>;
qcom,rxdesc-rings = <1>;
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
resets = <&gcc GCC_EDMA_HW_RESET>;
reset-names = "edma_rst";
status = "disabled";
};
ess_instance: ess-instance {
#address-cells = <1>;
#size-cells = <1>;
num_devices = <1>;
switch: ess-switch@3a000000 { switch: ess-switch@3a000000 {
compatible = "qcom,ess-switch-ipq60xx"; compatible = "qcom,ess-switch-ipq60xx";
reg = <0x3a000000 0x1000000>; reg = <0x3a000000 0x1000000>;
switch_access_mode = "local bus"; switch_access_mode = "local bus";
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_inner_bmp = <0xc0>; /*inner port bitmap*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>, clocks = <&gcc GCC_CMN_12GPLL_AHB_CLK>,
<&gcc GCC_CMN_12GPLL_SYS_CLK>, <&gcc GCC_CMN_12GPLL_SYS_CLK>,
<&gcc GCC_UNIPHY0_AHB_CLK>, <&gcc GCC_UNIPHY0_AHB_CLK>,
@ -135,8 +157,18 @@
"uniphy0_port_4_5_rst", "uniphy0_port_4_5_rst",
"uniphy0_port_4_rst"; "uniphy0_port_4_rst";
mdio-bus = <&mdio>; mdio-bus = <&mdio>;
switch_cpu_bmp = <ESS_PORT0>; /* cpu port bitmap */
switch_inner_bmp = <(ESS_PORT6 | ESS_PORT7)>; /*inner port bitmap*/
switch_mac_mode = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 0 */
switch_mac_mode1 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 1 */
switch_mac_mode2 = <MAC_MODE_DISABLED>; /* MAC mode for UNIPHY instance 2 */
status = "disabled"; status = "disabled";
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
port_scheduler_resource { port_scheduler_resource {
port@0 { port@0 {
port_id = <0>; port_id = <0>;
@ -235,7 +267,7 @@
ucast_queue = <0 4 8>; ucast_queue = <0 4 8>;
/*multicast queues*/ /*multicast queues*/
mcast_queue = <256 260>; mcast_queue = <256 260>;
/*sp cpri cdrr epri edrr*/ /*sp cpricdrrepriedrr*/
cfg = <0 0 0 0 0>; cfg = <0 0 0 0 0>;
}; };
group@1 { group@1 {
@ -416,26 +448,6 @@
reg = <0x7a00000 0x30000>; reg = <0x7a00000 0x30000>;
uniphy_access_mode = "local bus"; uniphy_access_mode = "local bus";
}; };
edma: edma@3ab00000 {
compatible = "qcom,edma";
reg = <0x0 0x3ab00000 0x0 0xabe00>;
reg-names = "edma-reg-base";
qcom,txdesc-ring-start = <23>;
qcom,txdesc-rings = <1>;
qcom,txcmpl-ring-start = <23>;
qcom,txcmpl-rings = <1>;
qcom,rxfill-ring-start = <7>;
qcom,rxfill-rings = <1>;
qcom,rxdesc-ring-start = <15>;
qcom,rxdesc-rings = <1>;
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
resets = <&gcc GCC_EDMA_HW_RESET>;
reset-names = "edma_rst";
status = "disabled";
}; };
dp1: dp1 { dp1: dp1 {
@ -445,7 +457,7 @@
reg = <0x0 0x3a001000 0x0 0x200>; reg = <0x0 0x3a001000 0x0 0x200>;
qcom,mactype = <0>; qcom,mactype = <0>;
local-mac-address = [000000000000]; local-mac-address = [000000000000];
phy-mode = "sgmii"; phy-mode = "psgmii";
status = "disabled"; status = "disabled";
}; };
@ -456,7 +468,7 @@
reg = <0x0 0x3a001200 0x0 0x200>; reg = <0x0 0x3a001200 0x0 0x200>;
qcom,mactype = <0>; qcom,mactype = <0>;
local-mac-address = [000000000000]; local-mac-address = [000000000000];
phy-mode = "sgmii"; phy-mode = "psgmii";
status = "disabled"; status = "disabled";
}; };
@ -467,7 +479,7 @@
reg = <0x0 0x3a001400 0x0 0x200>; reg = <0x0 0x3a001400 0x0 0x200>;
qcom,mactype = <0>; qcom,mactype = <0>;
local-mac-address = [000000000000]; local-mac-address = [000000000000];
phy-mode = "sgmii"; phy-mode = "psgmii";
status = "disabled"; status = "disabled";
}; };
@ -478,7 +490,7 @@
reg = <0x0 0x3a001600 0x0 0x200>; reg = <0x0 0x3a001600 0x0 0x200>;
qcom,mactype = <0>; qcom,mactype = <0>;
local-mac-address = [000000000000]; local-mac-address = [000000000000];
phy-mode = "sgmii"; phy-mode = "psgmii";
status = "disabled"; status = "disabled";
}; };
@ -489,7 +501,18 @@
reg = <0x0 0x3a001800 0x0 0x200>; reg = <0x0 0x3a001800 0x0 0x200>;
qcom,mactype = <0>; qcom,mactype = <0>;
local-mac-address = [000000000000]; local-mac-address = [000000000000];
phy-mode = "sgmii"; phy-mode = "psgmii";
status = "disabled";
};
dp5_syn: dp5-syn {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x0 0x3a003000 0x0 0x3fff>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
phy-mode = "usxgmii";
status = "disabled"; status = "disabled";
}; };
}; };