diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 69ce25dae..1e81b0f17 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -104,17 +104,6 @@ define U-Boot/nanopi-r4se-rk3399 USE_RKBIN:=1 endef -define U-Boot/nanopi-r5s-rk3568 - BUILD_SUBTARGET:=armv8 - NAME:=NanoPi R5S - BUILD_DEVICES:= \ - friendlyarm_nanopi-r5s - DEPENDS:=+PACKAGE_u-boot-nanopi-r5s-rk3568:arm-trusted-firmware-rk3568 - PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor - ATF:=rk3568_bl31_v1.28.elf - DDR:=rk3568_ddr_1560MHz_v1.13.bin -endef - define U-Boot/rock-pi-4-rk3399 BUILD_SUBTARGET:=armv8 NAME:=Rock Pi 4 @@ -238,6 +227,28 @@ define U-Boot/station-p2-rk3568 DDR:=rk3568_ddr_1560MHz_v1.13.bin endef +define U-Boot/nanopi-r5s-rk3568 + BUILD_SUBTARGET:=armv8 + NAME:=NanoPi R5S + BUILD_DEVICES:= \ + friendlyarm_nanopi-r5s + DEPENDS:=+PACKAGE_u-boot-nanopi-r5s-rk3568:arm-trusted-firmware-rk3568 + PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor + ATF:=rk3568_bl31_v1.28.elf + DDR:=rk3568_ddr_1560MHz_v1.13.bin +endef + +define U-Boot/nanopi-r5c-rk3568 + BUILD_SUBTARGET:=armv8 + NAME:=NanoPi R5C + BUILD_DEVICES:= \ + friendlyarm_nanopi-r5c + DEPENDS:=+PACKAGE_u-boot-nanopi-r5c-rk3568:arm-trusted-firmware-rk3568 + PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor + ATF:=rk3568_bl31_v1.28.elf + DDR:=rk3568_ddr_1560MHz_v1.13.bin +endef + UBOOT_TARGETS := \ mrkaio-m68s-rk3568 \ opc-h68k-rk3568 \ @@ -250,6 +261,7 @@ UBOOT_TARGETS := \ nanopi-r4s-rk3399 \ nanopi-r4se-rk3399 \ nanopi-r5s-rk3568 \ + nanopi-r5c-rk3568 \ rock-pi-4-rk3399 \ rockpro64-rk3399 \ rongpin-king3399-rk3399 \ diff --git a/package/boot/uboot-rockchip/patches/316-uboot-add-NanoPi-R5C-board.patch b/package/boot/uboot-rockchip/patches/316-uboot-add-NanoPi-R5C-board.patch new file mode 100755 index 000000000..93722b55b --- /dev/null +++ b/package/boot/uboot-rockchip/patches/316-uboot-add-NanoPi-R5C-board.patch @@ -0,0 +1,224 @@ +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -179,7 +179,8 @@ + rk3568-photonicat.dtb \ + rk3566-quartz64-a.dtb \ + rk3568-rock-3a.dtb \ +- rk3568-radxa-e25.dtb ++ rk3568-radxa-e25.dtb \ ++ rk3568-nanopi-r5c.dtb + + dtb-$(CONFIG_ROCKCHIP_RV1108) += \ + rv1108-elgin-r1.dtb \ +--- /dev/null ++++ b/arch/arm/dts/rk3568-nanopi-r5c.dts +@@ -0,0 +1,9 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++#include "rk3568-evb.dts" ++ ++/ { ++ model = "FriendlyElec NanoPi R5C"; ++ compatible = "friendlyelec,nanopi-r5c", "rockchip,rk3568"; ++}; +--- /dev/null ++++ b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi +@@ -0,0 +1,25 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2021 Rockchip Electronics Co., Ltd ++ */ ++ ++#include "rk3568-u-boot.dtsi" ++ ++/ { ++ chosen { ++ stdout-path = &uart2; ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; ++ }; ++}; ++ ++&sdmmc0 { ++ bus-width = <4>; ++ u-boot,dm-spl; ++ u-boot,spl-fifo-mode; ++}; ++ ++&uart2 { ++ clock-frequency = <24000000>; ++ u-boot,dm-spl; ++ status = "okay"; ++}; +--- a/arch/arm/mach-rockchip/rk3568/Kconfig ++++ b/arch/arm/mach-rockchip/rk3568/Kconfig +@@ -18,6 +18,11 @@ + help + NanoPi R5S FriendlyElec is a board for Rockchp RK3568. + ++config TARGET_NANOPI_R5C_RK3568 ++ bool "NanoPi R5C board" ++ help ++ NanoPi R5C FriendlyElec is a board for Rockchp RK3568. ++ + config TARGET_QUARTZ64_A_RK3566 + bool "Quartz64 Model A RK3566 development board" + help +@@ -40,6 +45,7 @@ + source "board/rockchip/bpi-r2-pro-rk3568/Kconfig" + source "board/rockchip/evb_rk3568/Kconfig" + source "board/friendlyelec/nanopi-r5s-rk3568/Kconfig" ++source "board/friendlyelec/nanopi-r5c-rk3568/Kconfig" + source "board/pine64/quartz64-a-rk3566/Kconfig" + + endif +--- /dev/null ++++ b/board/friendlyelec/nanopi-r5c-rk3568/Kconfig +@@ -0,0 +1,15 @@ ++if TARGET_NANOPI_R5C_RK3568 ++ ++config SYS_BOARD ++ default "nanopi-r5c-rk3568" ++ ++config SYS_VENDOR ++ default "friendlyelec" ++ ++config SYS_CONFIG_NAME ++ default "nanopi-r5c-rk3568" ++ ++config BOARD_SPECIFIC_OPTIONS # dummy ++ def_bool y ++ ++endif +--- /dev/null ++++ b/board/friendlyelec/nanopi-r5c-rk3568/Makefile +@@ -0,0 +1,4 @@ ++# SPDX-License-Identifier: GPL-2.0+ ++# ++ ++obj-y += nanopi-r5c-rk3568.o +--- /dev/null ++++ b/board/friendlyelec/nanopi-r5c-rk3568/nanopi-r5c-rk3568.c +@@ -0,0 +1,4 @@ ++ // SPDX-License-Identifier: GPL-2.0+ ++/* ++ * ++ */ +--- /dev/null ++++ b/configs/nanopi-r5c-rk3568_defconfig +@@ -0,0 +1,98 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00a00000 ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y ++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y ++CONFIG_SPL_MMC=y ++CONFIG_SPL_SERIAL=y ++CONFIG_SPL_STACK_R_ADDR=0x600000 ++CONFIG_TARGET_NANOPI_R5C_RK3568=y ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART=y ++CONFIG_SYS_LOAD_ADDR=0xc00800 ++CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2 ++CONFIG_API=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_OF_SYSTEM_SETUP=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5c.dtb" ++# CONFIG_SYS_DEVICE_NULLDEV is not set ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_LOAD_IMAGE_V2=y ++CONFIG_CMD_BIND=y ++CONFIG_CMD_CLK=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_PMIC=y ++CONFIG_CMD_REGULATOR=y ++# CONFIG_SPL_DOS_PARTITION is not set ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_SPL_DM_WARN=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_SYSCON=y ++CONFIG_SPL_CLK=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_MMC_HS200_SUPPORT=y ++CONFIG_SPL_MMC_HS200_SUPPORT=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_SPL_PMIC_RK8XX=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_SPL_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_SPL_RAM=y ++CONFIG_DM_RESET=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_PSCI=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_ROCKCHIP_USB2_PHY=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_HOST_ETHER=y ++CONFIG_USB_ETHER_LAN75XX=y ++CONFIG_USB_ETHER_LAN78XX=y ++CONFIG_USB_ETHER_SMSC95XX=y ++CONFIG_ERRNO_STR=y +--- /dev/null ++++ b/include/configs/nanopi-r5c-rk3568.h +@@ -0,0 +1,14 @@ ++/* SPDX-License-Identifier: GPL-2.0+ */ ++ ++#ifndef __NANOPI_R5C_RK3568_H ++#define __NANOPI_R5C_RK3568_H ++ ++#include ++ ++#define CONFIG_SUPPORT_EMMC_RPMB ++ ++#define ROCKCHIP_DEVICE_SETTINGS \ ++ "stdout=serial,vidconsole\0" \ ++ "stderr=serial,vidconsole\0" ++ ++#endif diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index 3158ebb91..79bfe651a 100755 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -27,6 +27,10 @@ friendlyarm,nanopi-r5s) ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth1" ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "eth2" ;; +friendlyarm,nanopi-r5c) + ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0" + ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1" + ;; hinlink,opc-h66k|\ hinlink,opc-h68k) ucidef_set_led_netdev "wan" "WAN" "blue:net" "eth0" diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index 8bdefcbb6..8cb271b5f 100755 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -26,6 +26,7 @@ rockchip_setup_interfaces() ;; fastrhino,r66s|\ firefly,rk3568-roc-pc|\ + friendlyarm,nanopi-r5c|\ radxa,e25) ucidef_set_interfaces_lan_wan 'eth0' 'eth1' ;; @@ -87,6 +88,7 @@ rockchip_setup_macs() friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r5s|\ + friendlyarm,nanopi-r5c|\ sharevdi,guangmiao-g4c|\ rocktech,mpc1903) wan_mac=$(generate_mac_from_mmc_cid) diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index 704ca1f9f..06b914d47 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -29,6 +29,7 @@ set_interface_core() { case "$(board_name)" in fastrhino,r66s|\ +friendlyarm,nanopi-r5c|\ firefly,rk3568-roc-pc) set_interface_core 2 "eth0" set_interface_core 4 "eth1" diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts new file mode 100755 index 000000000..9b58c3027 --- /dev/null +++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts @@ -0,0 +1,745 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyarm.com) + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model = "FriendlyElec NanoPi R5C"; + compatible = "friendlyarm,nanopi-r5c","rockchip,rk3568"; + + aliases { + mmc0 = &sdmmc0; + mmc1 = &sdhci; + + led-boot = &sys_led; + led-failsafe = &sys_led; + led-running = &sys_led; + led-upgrade = &sys_led; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + +#ifdef DTS_NO_LEGACY + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; +#endif + + gpio_keys: gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key1_pin>; + + button@1 { + debounce-interval = <50>; + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; + label = "K1"; + linux,code = ; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&sys_led_pin>, <&lan_led_pin>, + <&wan_led_pin>, <&wlan_led_pin>; + pinctrl-names = "default"; + + sys_led: led-0 { + gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; + label = "red:power"; + }; + + lan_led: led-1 { + gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; + label = "green:lan"; + }; + + wan_led: led-2 { + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + label = "green:wan"; + }; + wlan_led: led-3 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + label = "green:wlan"; + }; + }; + + vdd_usbc: vdd-usbc { + compatible = "regulator-fixed"; + regulator-name = "vdd_usbc"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vdd_usbc>; + }; + + vcc3v3_sysp: vcc3v3-sysp { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sysp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vdd_usbc>; + }; + + vcc5v0_sysp: vcc5v0-sysp { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sysp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc3v3_sysp>; + }; + + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sysp>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + }; + + vcc5v0_otg: vcc5v0-otg-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sysp>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_otg_en>; + }; + + vcc3v3_pcie: vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + enable-active-high; + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc3v3_sysp>; + }; + + m2_wlan_radio: m2-wlan-radio { + compatible = "rfkill-gpio"; + type = "wlan"; + shutdown-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; + }; +}; + +&combphy0 { + status = "okay"; +}; + +&combphy1 { + status = "okay"; +}; + +&combphy2 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +#ifdef DTS_NO_LEGACY +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; + rockchip,phy-table = + <92812500 0x8009 0x0000 0x0270>, + <165000000 0x800b 0x0000 0x026d>, + <185625000 0x800b 0x0000 0x01ed>, + <297000000 0x800b 0x0000 0x01ad>, + <594000000 0x8029 0x0000 0x0088>, + <000000000 0x0000 0x0000 0x0000>; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; +#endif + +&i2c0 { + i2c-scl-rising-time-ns = <160>; + i2c-scl-falling-time-ns = <30>; + clock-frequency = <400000>; + status = "okay"; + + vdd_cpu: tcs4525@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <2300>; + fcs,suspend-voltage-selector = <1>; + vin-supply = <&vcc3v3_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = ; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c5 { + i2c-scl-rising-time-ns = <160>; + i2c-scl-falling-time-ns = <30>; + clock-frequency = <400000>; + status = "okay"; + + hym8563: hym8563@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = ; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + wakeup-source; + }; +}; + +#ifdef DTS_NO_LEGACY +&i2s0_8ch { + status = "okay"; +}; +#endif + +&pcie2x1 { + num-lanes = <1>; + num-viewport = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&m2_wlan_disable_pin>; + reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&pcie30phy { + data-lanes = <1 2>; + status = "okay"; +}; + +&pcie3x1 { + num-lanes = <1>; + num-viewport = <4>; + rockchip,bifurcation; + rockchip,init-delay-ms = <100>; + reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + status = "okay"; + + pcie@10 { + reg = <0x00100000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + r8125_2: pcie@10,0 { + reg = <0x000000 0 0 0 0>; + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + }; +}; + +&pcie3x2 { + num-viewport = <4>; + rockchip,bifurcation; + reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; + + pcie@20 { + reg = <0x00200000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + r8125_1: pcie@20,0 { + reg = <0x000000 0 0 0 0>; + local-mac-address = [ 00 00 00 00 00 00 ]; + }; + }; +}; + +&pinctrl { + gpio-key { + key1_pin: key1-pin { + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + sys_led_pin: sys-led-pin { + rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + lan_led_pin: lan-led-pin { + rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wan_led_pin: wan-led-pin { + rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + wlan_led_pin: wlan-led-pin { + rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + m2-pins { + m2_wlan_disable_pin: m2-wlan-disable-pin { + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm0 { + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + no-sdio; + no-sd; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; + status = "okay"; +}; + +&sdmmc0 { + max-frequency = <150000000>; + no-sdio; + no-mmc; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + dr_mode = "host"; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + status = "okay"; +}; + +&usb2phy1_otg { + status = "okay"; +}; + +#ifdef DTS_NO_LEGACY +&vop { + status = "okay"; + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + support-multi-area; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; +#endif diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index f15f8f26b..56066c53d 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -121,6 +121,16 @@ define Device/friendlyarm_nanopi-r5s endef TARGET_DEVICES += friendlyarm_nanopi-r5s +define Device/friendlyarm_nanopi-r5c + DEVICE_VENDOR := FriendlyARM + DEVICE_MODEL := NanoPi R5C + SOC := rk3568 + UBOOT_DEVICE_NAME := nanopi-r5c-rk3568 + IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata + DEVICE_PACKAGES := kmod-r8125 +endef +TARGET_DEVICES += friendlyarm_nanopi-r5c + define Device/firefly_station-p2 DEVICE_VENDOR := Firefly DEVICE_MODEL := Station P2 diff --git a/target/linux/rockchip/patches-5.15/210-rockchip-rk356x-add-support-for-new-boards.patch b/target/linux/rockchip/patches-5.15/210-rockchip-rk356x-add-support-for-new-boards.patch index b0acb2a95..cffe7967d 100644 --- a/target/linux/rockchip/patches-5.15/210-rockchip-rk356x-add-support-for-new-boards.patch +++ b/target/linux/rockchip/patches-5.15/210-rockchip-rk356x-add-support-for-new-boards.patch @@ -7,6 +7,7 @@ +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-photonicat.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h66k.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb diff --git a/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch b/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch index 24dd615d8..1b9783c32 100644 --- a/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch +++ b/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch @@ -8,6 +8,7 @@ +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-mrkaio-m68s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h66k.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-r66s.dtb